aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJens Axboe <jens.axboe@oracle.com>2010-03-19 03:05:10 -0400
committerJens Axboe <jens.axboe@oracle.com>2010-03-19 03:05:10 -0400
commitb4b7a4ef097f288f724420b473dbf92a89c0ab7e (patch)
tree23ad8101e3e77c32a8d1e1b95a9c1cd7f7a475b7
parente9ce335df51ff782035a15c261a3c0c9892a1767 (diff)
parenta3d3203e4bb40f253b1541e310dc0f9305be7c84 (diff)
Merge branch 'master' into for-linus
Conflicts: block/Kconfig Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
-rw-r--r--.gitignore20
-rw-r--r--Documentation/DMA-API.txt122
-rw-r--r--Documentation/DocBook/mtdnand.tmpl6
-rw-r--r--Documentation/DocBook/v4l/common.xml2
-rw-r--r--Documentation/DocBook/v4l/vidioc-g-parm.xml2
-rw-r--r--Documentation/HOWTO113
-rw-r--r--Documentation/IPMI.txt12
-rw-r--r--Documentation/Makefile4
-rw-r--r--Documentation/PCI/PCI-DMA-mapping.txt352
-rw-r--r--Documentation/SubmitChecklist8
-rw-r--r--Documentation/arm/Samsung-S3C24XX/CPUfreq.txt4
-rw-r--r--Documentation/arm/Samsung/Overview.txt86
-rwxr-xr-xDocumentation/arm/Samsung/clksrc-change-registers.awk167
-rw-r--r--Documentation/cgroups/cgroup_event_listener.c110
-rw-r--r--Documentation/cgroups/cgroups.txt39
-rw-r--r--Documentation/cgroups/cpusets.txt127
-rw-r--r--Documentation/cgroups/memcg_test.txt47
-rw-r--r--Documentation/cgroups/memory.txt80
-rw-r--r--Documentation/console/console.txt2
-rw-r--r--Documentation/driver-model/platform.txt2
-rw-r--r--Documentation/eisa.txt2
-rw-r--r--Documentation/email-clients.txt30
-rw-r--r--Documentation/feature-removal-schedule.txt7
-rw-r--r--Documentation/filesystems/00-INDEX2
-rw-r--r--Documentation/filesystems/Makefile8
-rw-r--r--Documentation/filesystems/dnotify.txt39
-rw-r--r--Documentation/filesystems/dnotify_test.c34
-rw-r--r--Documentation/filesystems/proc.txt2
-rw-r--r--Documentation/hwmon/abituguru2
-rw-r--r--Documentation/input/rotary-encoder.txt2
-rw-r--r--Documentation/kernel-parameters.txt4
-rw-r--r--Documentation/kobject.txt2
-rw-r--r--Documentation/laptops/00-INDEX6
-rw-r--r--Documentation/laptops/Makefile8
-rw-r--r--Documentation/laptops/dslm.c166
-rw-r--r--Documentation/laptops/laptop-mode.txt170
-rw-r--r--Documentation/networking/skfp.txt2
-rw-r--r--Documentation/networking/timestamping/timestamping.c2
-rw-r--r--Documentation/pnp.txt13
-rw-r--r--Documentation/power/runtime_pm.txt2
-rw-r--r--Documentation/s390/kvm.txt2
-rw-r--r--Documentation/scsi/ChangeLog.lpfc10
-rw-r--r--Documentation/serial/tty.txt4
-rw-r--r--Documentation/sound/alsa/ALSA-Configuration.txt2
-rw-r--r--Documentation/sysctl/vm.txt5
-rw-r--r--Documentation/timers/00-INDEX2
-rw-r--r--Documentation/timers/Makefile8
-rw-r--r--Documentation/timers/hpet.txt273
-rw-r--r--Documentation/timers/hpet_example.c269
-rw-r--r--Documentation/trace/ftrace.txt2
-rw-r--r--Documentation/vm/00-INDEX16
-rw-r--r--Documentation/vm/Makefile2
-rw-r--r--Documentation/vm/hugepage-mmap.c91
-rw-r--r--Documentation/vm/hugepage-shm.c98
-rw-r--r--Documentation/vm/hugetlbpage.txt169
-rw-r--r--Documentation/vm/map_hugetlb.c6
-rw-r--r--Documentation/voyager.txt95
-rw-r--r--MAINTAINERS56
-rw-r--r--Makefile4
-rw-r--r--arch/alpha/Kconfig4
-rw-r--r--arch/alpha/include/asm/dma-mapping.h80
-rw-r--r--arch/alpha/include/asm/pci.h139
-rw-r--r--arch/alpha/include/asm/ptrace.h1
-rw-r--r--arch/alpha/kernel/pci-noop.c101
-rw-r--r--arch/alpha/kernel/pci_iommu.c201
-rw-r--r--arch/alpha/kernel/ptrace.c59
-rw-r--r--arch/arm/Kconfig74
-rw-r--r--arch/arm/Kconfig.debug2
-rw-r--r--arch/arm/Makefile16
-rw-r--r--arch/arm/boot/bootp/init.S2
-rw-r--r--arch/arm/boot/compressed/head.S50
-rw-r--r--arch/arm/boot/compressed/vmlinux.lds.in3
-rw-r--r--arch/arm/common/clkdev.c2
-rw-r--r--arch/arm/common/it8152.c27
-rw-r--r--arch/arm/common/locomo.c362
-rw-r--r--arch/arm/common/sa1111.c112
-rw-r--r--arch/arm/common/scoop.c2
-rw-r--r--arch/arm/configs/ap4evb_defconfig779
-rw-r--r--arch/arm/configs/g3evm_defconfig774
-rw-r--r--arch/arm/configs/g4evm_defconfig779
-rw-r--r--arch/arm/configs/imote2_defconfig2077
-rw-r--r--arch/arm/configs/kirkwood_defconfig126
-rw-r--r--arch/arm/configs/mini2440_defconfig6
-rw-r--r--arch/arm/configs/mmp2_defconfig1194
-rw-r--r--arch/arm/configs/mv78xx0_defconfig1
-rw-r--r--arch/arm/configs/mx1ads_defconfig742
-rw-r--r--arch/arm/configs/mx27_defconfig2
-rw-r--r--arch/arm/configs/mx51_defconfig1286
-rw-r--r--arch/arm/configs/nuc950_defconfig53
-rw-r--r--arch/arm/configs/orion5x_defconfig101
-rw-r--r--arch/arm/configs/pxa168_defconfig229
-rw-r--r--arch/arm/configs/raumfeld_defconfig1898
-rw-r--r--arch/arm/configs/s3c2410_defconfig6
-rw-r--r--arch/arm/configs/s3c6400_defconfig360
-rw-r--r--arch/arm/configs/s5p6440_defconfig969
-rw-r--r--arch/arm/configs/s5p6442_defconfig883
-rw-r--r--arch/arm/configs/s5pc110_defconfig894
-rw-r--r--arch/arm/configs/s5pv210_defconfig894
-rw-r--r--arch/arm/include/asm/dma-mapping.h8
-rw-r--r--arch/arm/include/asm/entry-macro-vic2.S (renamed from arch/arm/mach-s3c6400/include/mach/entry-macro.S)29
-rw-r--r--arch/arm/include/asm/hardware/it8152.h12
-rw-r--r--arch/arm/include/asm/hardware/locomo.h4
-rw-r--r--arch/arm/include/asm/hardware/sa1111.h4
-rw-r--r--arch/arm/include/asm/pci.h11
-rw-r--r--arch/arm/include/asm/ptrace.h2
-rw-r--r--arch/arm/include/asm/unistd.h3
-rw-r--r--arch/arm/kernel/calls.S4
-rw-r--r--arch/arm/kernel/perf_event.c4
-rw-r--r--arch/arm/kernel/ptrace.c60
-rw-r--r--arch/arm/kernel/ptrace.h14
-rw-r--r--arch/arm/kernel/sys_arm.c129
-rw-r--r--arch/arm/kernel/sys_oabi-compat.c3
-rw-r--r--arch/arm/kernel/unwind.c4
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c20
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c11
-rw-r--r--arch/arm/mach-at91/include/mach/at91_mci.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/i2c.h2
-rw-r--r--arch/arm/mach-dove/common.c8
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ts72xx.h2
-rw-r--r--arch/arm/mach-ep93xx/micro9.c2
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c21
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c26
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/hardware.h5
-rw-r--r--arch/arm/mach-kirkwood/Kconfig23
-rw-r--r--arch/arm/mach-kirkwood/Makefile4
-rw-r--r--arch/arm/mach-kirkwood/common.c8
-rw-r--r--arch/arm/mach-kirkwood/netspace_v2-setup.c59
-rw-r--r--arch/arm/mach-kirkwood/openrd-setup.c118
-rw-r--r--arch/arm/mach-kirkwood/openrd_base-setup.c96
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c50
-rw-r--r--arch/arm/mach-mmp/Kconfig35
-rw-r--r--arch/arm/mach-mmp/Makefile10
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c51
-rw-r--r--arch/arm/mach-mmp/common.h4
-rw-r--r--arch/arm/mach-mmp/flint.c123
-rw-r--r--arch/arm/mach-mmp/include/mach/cputype.h9
-rw-r--r--arch/arm/mach-mmp/include/mach/devices.h12
-rw-r--r--arch/arm/mach-mmp/include/mach/entry-macro.S7
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h115
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h240
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h60
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h41
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-icu.h42
-rw-r--r--arch/arm/mach-mmp/include/mach/uncompress.h13
-rw-r--r--arch/arm/mach-mmp/irq-mmp2.c154
-rw-r--r--arch/arm/mach-mmp/irq-pxa168.c (renamed from arch/arm/mach-mmp/irq.c)0
-rw-r--r--arch/arm/mach-mmp/jasper.c80
-rw-r--r--arch/arm/mach-mmp/mmp2.c123
-rw-r--r--arch/arm/mach-mmp/time.c26
-rw-r--r--arch/arm/mach-mv78xx0/Kconfig6
-rw-r--r--arch/arm/mach-mv78xx0/Makefile3
-rw-r--r--arch/arm/mach-mv78xx0/buffalo-wxl-setup.c155
-rw-r--r--arch/arm/mach-mv78xx0/mpp.c96
-rw-r--r--arch/arm/mach-mv78xx0/mpp.h347
-rw-r--r--arch/arm/mach-mx1/Makefile5
-rw-r--r--arch/arm/mach-mx1/mach-mx1ads.c (renamed from arch/arm/mach-mx1/mx1ads.c)8
-rw-r--r--arch/arm/mach-mx1/mach-scb9328.c (renamed from arch/arm/mach-mx1/scb9328.c)4
-rw-r--r--arch/arm/mach-mx2/Kconfig10
-rw-r--r--arch/arm/mach-mx2/Makefile23
-rw-r--r--arch/arm/mach-mx2/clock_imx21.c236
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c33
-rw-r--r--arch/arm/mach-mx2/cpu_imx27.c3
-rw-r--r--arch/arm/mach-mx2/crm_regs.h258
-rw-r--r--arch/arm/mach-mx2/devices.c640
-rw-r--r--arch/arm/mach-mx2/devices.h13
-rw-r--r--arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c2
-rw-r--r--arch/arm/mach-mx2/mach-cpuimx27.c (renamed from arch/arm/mach-mx2/eukrea_cpuimx27.c)19
-rw-r--r--arch/arm/mach-mx2/mach-imx27lite.c (renamed from arch/arm/mach-mx2/mx27lite.c)8
-rw-r--r--arch/arm/mach-mx2/mach-mx21ads.c (renamed from arch/arm/mach-mx2/mx21ads.c)16
-rw-r--r--arch/arm/mach-mx2/mach-mx27_3ds.c (renamed from arch/arm/mach-mx2/mx27pdk.c)8
-rw-r--r--arch/arm/mach-mx2/mach-mx27ads.c (renamed from arch/arm/mach-mx2/mx27ads.c)12
-rw-r--r--arch/arm/mach-mx2/mach-mxt_td60.c (renamed from arch/arm/mach-mx2/mxt_td60.c)10
-rw-r--r--arch/arm/mach-mx2/mach-pca100.c (renamed from arch/arm/mach-mx2/pca100.c)161
-rw-r--r--arch/arm/mach-mx2/mach-pcm038.c (renamed from arch/arm/mach-mx2/pcm038.c)40
-rw-r--r--arch/arm/mach-mx2/mm-imx21.c83
-rw-r--r--arch/arm/mach-mx2/mm-imx27.c (renamed from arch/arm/mach-mx2/generic.c)44
-rw-r--r--arch/arm/mach-mx2/pcm970-baseboard.c6
-rw-r--r--arch/arm/mach-mx2/serial.c48
-rw-r--r--arch/arm/mach-mx25/Kconfig1
-rw-r--r--arch/arm/mach-mx25/Makefile2
-rw-r--r--arch/arm/mach-mx25/clock.c14
-rw-r--r--arch/arm/mach-mx25/devices.c62
-rw-r--r--arch/arm/mach-mx25/devices.h3
-rw-r--r--arch/arm/mach-mx25/mach-mx25pdk.c (renamed from arch/arm/mach-mx25/mx25pdk.c)67
-rw-r--r--arch/arm/mach-mx3/Kconfig2
-rw-r--r--arch/arm/mach-mx3/Makefile32
-rw-r--r--arch/arm/mach-mx3/clock-imx31.c (renamed from arch/arm/mach-mx3/clock.c)5
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c5
-rw-r--r--arch/arm/mach-mx3/cpu.c2
-rw-r--r--arch/arm/mach-mx3/crm_regs.h2
-rw-r--r--arch/arm/mach-mx3/iomux-imx31.c (renamed from arch/arm/mach-mx3/iomux.c)2
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c (renamed from arch/arm/mach-mx3/armadillo5x0.c)14
-rw-r--r--arch/arm/mach-mx3/mach-kzm_arm11_01.c (renamed from arch/arm/mach-mx3/kzmarm11.c)33
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c (renamed from arch/arm/mach-mx3/mx31pdk.c)12
-rw-r--r--arch/arm/mach-mx3/mach-mx31ads.c (renamed from arch/arm/mach-mx3/mx31ads.c)44
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c (renamed from arch/arm/mach-mx3/mx31lilly.c)10
-rw-r--r--arch/arm/mach-mx3/mach-mx31lite.c (renamed from arch/arm/mach-mx3/mx31lite.c)16
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c (renamed from arch/arm/mach-mx3/mx31moboard.c)49
-rw-r--r--arch/arm/mach-mx3/mach-mx35pdk.c (renamed from arch/arm/mach-mx3/mx35pdk.c)6
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c (renamed from arch/arm/mach-mx3/pcm037.c)155
-rw-r--r--arch/arm/mach-mx3/mach-pcm037_eet.c (renamed from arch/arm/mach-mx3/pcm037_eet.c)0
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c (renamed from arch/arm/mach-mx3/pcm043.c)160
-rw-r--r--arch/arm/mach-mx3/mach-qong.c (renamed from arch/arm/mach-mx3/qong.c)20
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c30
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c32
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c39
-rw-r--r--arch/arm/mach-mx3/mx31moboard-smartbot.c162
-rw-r--r--arch/arm/mach-mx5/Kconfig18
-rw-r--r--arch/arm/mach-mx5/Makefile9
-rw-r--r--arch/arm/mach-mx5/Makefile.boot3
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c98
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c825
-rw-r--r--arch/arm/mach-mx5/cpu.c47
-rw-r--r--arch/arm/mach-mx5/crm_regs.h583
-rw-r--r--arch/arm/mach-mx5/devices.c96
-rw-r--r--arch/arm/mach-mx5/devices.h4
-rw-r--r--arch/arm/mach-mx5/mm.c89
-rw-r--r--arch/arm/mach-mxc91231/magx-zn5.c2
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c2
-rw-r--r--[-rwxr-xr-x]arch/arm/mach-omap2/board-3630sdp.c0
-rw-r--r--[-rwxr-xr-x]arch/arm/mach-omap2/board-zoom-peripherals.c0
-rw-r--r--arch/arm/mach-orion5x/Kconfig7
-rw-r--r--arch/arm/mach-orion5x/Makefile1
-rw-r--r--arch/arm/mach-orion5x/common.c4
-rw-r--r--arch/arm/mach-orion5x/d2net-setup.c45
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c36
-rw-r--r--arch/arm/mach-orion5x/ls_hgl-setup.c276
-rw-r--r--arch/arm/mach-orion5x/lsmini-setup.c8
-rw-r--r--arch/arm/mach-pxa/Kconfig35
-rw-r--r--arch/arm/mach-pxa/Makefile5
-rw-r--r--arch/arm/mach-pxa/am300epd.c2
-rw-r--r--arch/arm/mach-pxa/balloon3.c33
-rw-r--r--arch/arm/mach-pxa/capc7117.c158
-rw-r--r--arch/arm/mach-pxa/cm-x255.c21
-rw-r--r--arch/arm/mach-pxa/cm-x270.c83
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c2
-rw-r--r--arch/arm/mach-pxa/corgi_ssp.c2
-rw-r--r--arch/arm/mach-pxa/e740.c6
-rw-r--r--arch/arm/mach-pxa/e750.c6
-rw-r--r--arch/arm/mach-pxa/e800.c9
-rw-r--r--arch/arm/mach-pxa/em-x270.c21
-rw-r--r--arch/arm/mach-pxa/icontrol.c202
-rw-r--r--arch/arm/mach-pxa/idp.c20
-rw-r--r--arch/arm/mach-pxa/imote2.c3
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h10
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h153
-rw-r--r--arch/arm/mach-pxa/include/mach/lpd270.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/lubbock.h11
-rw-r--r--arch/arm/mach-pxa/include/mach/mainstone.h17
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa25x.h32
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa27x.h27
-rw-r--r--arch/arm/mach-pxa/include/mach/mxm8x10.h21
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm027.h7
-rw-r--r--arch/arm/mach-pxa/include/mach/ssp.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h41
-rw-r--r--arch/arm/mach-pxa/include/mach/zeus.h3
-rw-r--r--arch/arm/mach-pxa/lpd270.c6
-rw-r--r--arch/arm/mach-pxa/lubbock.c35
-rw-r--r--arch/arm/mach-pxa/magician.c21
-rw-r--r--arch/arm/mach-pxa/mainstone.c27
-rw-r--r--arch/arm/mach-pxa/mioa701.c24
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c474
-rw-r--r--arch/arm/mach-pxa/palmld.c21
-rw-r--r--arch/arm/mach-pxa/palmt5.c21
-rw-r--r--arch/arm/mach-pxa/palmtc.c21
-rw-r--r--arch/arm/mach-pxa/palmte2.c21
-rw-r--r--arch/arm/mach-pxa/palmtreo.c20
-rw-r--r--arch/arm/mach-pxa/palmtx.c21
-rw-r--r--arch/arm/mach-pxa/palmz72.c22
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c9
-rw-r--r--arch/arm/mach-pxa/poodle.c28
-rw-r--r--arch/arm/mach-pxa/pxa27x.c19
-rw-r--r--arch/arm/mach-pxa/raumfeld.c1108
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c2
-rw-r--r--arch/arm/mach-pxa/spitz.c20
-rw-r--r--arch/arm/mach-pxa/ssp.c5
-rw-r--r--arch/arm/mach-pxa/time.c10
-rw-r--r--arch/arm/mach-pxa/tosa.c117
-rw-r--r--arch/arm/mach-pxa/trizeps4.c27
-rw-r--r--arch/arm/mach-pxa/viper.c8
-rw-r--r--arch/arm/mach-pxa/zeus.c91
-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/h1940-bluetooth.c2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio-track.h (renamed from arch/arm/mach-s3c2410/include/mach/gpio-core.h)1
-rw-r--r--arch/arm/mach-s3c2410/include/mach/pm-core.h (renamed from arch/arm/plat-s3c24xx/include/plat/pm-core.h)2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpio.h10
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h32
-rw-r--r--arch/arm/mach-s3c2410/include/mach/spi-gpio.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/timex.h (renamed from arch/arm/plat-s3c/include/mach/timex.h)2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/vmalloc.h (renamed from arch/arm/plat-s3c/include/mach/vmalloc.h)4
-rw-r--r--arch/arm/mach-s3c2410/mach-amlm5900.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c7
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-otom.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2410.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-tct_hammer.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c2
-rw-r--r--arch/arm/mach-s3c2410/usb-simtec.c4
-rw-r--r--arch/arm/mach-s3c2412/clock.c52
-rw-r--r--arch/arm/mach-s3c2412/dma.c2
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c2
-rw-r--r--arch/arm/mach-s3c2412/mach-smdk2413.c3
-rw-r--r--arch/arm/mach-s3c2412/mach-vstms.c2
-rw-r--r--arch/arm/mach-s3c2440/Kconfig74
-rw-r--r--arch/arm/mach-s3c2440/Makefile11
-rw-r--r--arch/arm/mach-s3c2440/clock.c6
-rw-r--r--arch/arm/mach-s3c2440/dma.c2
-rw-r--r--arch/arm/mach-s3c2440/dsc.c2
-rw-r--r--arch/arm/mach-s3c2440/include/mach/gta02.h (renamed from arch/arm/mach-s3c2442/include/mach/gta02.h)0
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c7
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c (renamed from arch/arm/mach-s3c2442/mach-gta02.c)7
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c8
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c4
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c4
-rw-r--r--arch/arm/mach-s3c2440/s3c2440-pll-12000000.c (renamed from arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c)2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440-pll-16934400.c (renamed from arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c)2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2442.c (renamed from arch/arm/mach-s3c2442/clock.c)22
-rw-r--r--arch/arm/mach-s3c2440/s3c244x-clock.c (renamed from arch/arm/plat-s3c24xx/s3c244x-clock.c)4
-rw-r--r--arch/arm/mach-s3c2440/s3c244x-irq.c (renamed from arch/arm/plat-s3c24xx/s3c244x-irq.c)0
-rw-r--r--arch/arm/mach-s3c2440/s3c244x.c (renamed from arch/arm/plat-s3c24xx/s3c244x.c)3
-rw-r--r--arch/arm/mach-s3c2442/Kconfig37
-rw-r--r--arch/arm/mach-s3c2442/Makefile18
-rw-r--r--arch/arm/mach-s3c2442/s3c2442.c34
-rw-r--r--arch/arm/mach-s3c2443/Kconfig1
-rw-r--r--arch/arm/mach-s3c2443/clock.c842
-rw-r--r--arch/arm/mach-s3c2443/dma.c2
-rw-r--r--arch/arm/mach-s3c2443/mach-smdk2443.c10
-rw-r--r--arch/arm/mach-s3c24a0/include/mach/io.h (renamed from arch/arm/plat-s3c/include/mach/io.h)4
-rw-r--r--arch/arm/mach-s3c6400/Kconfig30
-rw-r--r--arch/arm/mach-s3c6400/Makefile23
-rw-r--r--arch/arm/mach-s3c6400/include/mach/dma.h70
-rw-r--r--arch/arm/mach-s3c6400/include/mach/gpio-core.h21
-rw-r--r--arch/arm/mach-s3c6400/include/mach/irqs.h16
-rw-r--r--arch/arm/mach-s3c6400/include/mach/regs-clock.h16
-rw-r--r--arch/arm/mach-s3c6410/Makefile26
-rw-r--r--arch/arm/mach-s3c6410/setup-sdhci.c68
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig (renamed from arch/arm/mach-s3c6410/Kconfig)87
-rw-r--r--arch/arm/mach-s3c64xx/Makefile (renamed from arch/arm/plat-s3c64xx/Makefile)48
-rw-r--r--arch/arm/mach-s3c64xx/Makefile.boot (renamed from arch/arm/mach-s3c6400/Makefile.boot)0
-rw-r--r--arch/arm/mach-s3c64xx/clock.c809
-rw-r--r--arch/arm/mach-s3c64xx/cpu.c (renamed from arch/arm/plat-s3c64xx/cpu.c)19
-rw-r--r--arch/arm/mach-s3c64xx/cpufreq.c (renamed from arch/arm/plat-s3c64xx/cpufreq.c)0
-rw-r--r--arch/arm/mach-s3c64xx/dev-adc.c46
-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c335
-rw-r--r--arch/arm/mach-s3c64xx/dev-rtc.c43
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c182
-rw-r--r--arch/arm/mach-s3c64xx/dev-uart.c (renamed from arch/arm/plat-s3c64xx/dev-uart.c)29
-rw-r--r--arch/arm/mach-s3c64xx/dma.c (renamed from arch/arm/plat-s3c64xx/dma.c)3
-rw-r--r--arch/arm/mach-s3c64xx/gpiolib.c (renamed from arch/arm/plat-s3c64xx/gpiolib.c)166
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/debug-macro.S (renamed from arch/arm/mach-s3c6400/include/mach/debug-macro.S)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/dma.h (renamed from arch/arm/plat-s3c64xx/include/plat/dma-plat.h)79
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio.h (renamed from arch/arm/mach-s3c6400/include/mach/gpio.h)6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/hardware.h (renamed from arch/arm/mach-s3c6400/include/mach/hardware.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/io.h18
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h (renamed from arch/arm/plat-s3c64xx/include/plat/irqs.h)24
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h (renamed from arch/arm/mach-s3c6400/include/mach/map.h)22
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/memory.h (renamed from arch/arm/mach-s3c6400/include/mach/memory.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pll.h (renamed from arch/arm/plat-s3c64xx/include/plat/pll.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pm-core.h (renamed from arch/arm/plat-s3c64xx/include/plat/pm-core.h)4
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pwm-clock.h (renamed from arch/arm/mach-s3c6400/include/mach/pwm-clock.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-clock.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-clock.h)71
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-fb.h (renamed from arch/arm/mach-s3c6400/include/mach/regs-fb.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-gpio.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-gpio.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-irq.h (renamed from arch/arm/mach-s3c6400/include/mach/regs-irq.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-modem.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-modem.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-srom.h59
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-sys.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-sys.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/s3c6400.h (renamed from arch/arm/plat-s3c64xx/include/plat/s3c6400.h)6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/s3c6410.h (renamed from arch/arm/plat-s3c64xx/include/plat/s3c6410.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/spi-clocks.h18
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/system.h (renamed from arch/arm/mach-s3c6400/include/mach/system.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/tick.h (renamed from arch/arm/mach-s3c6400/include/mach/tick.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/uncompress.h (renamed from arch/arm/mach-s3c6400/include/mach/uncompress.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-s3c64xx/irq-eint.c (renamed from arch/arm/plat-s3c64xx/irq-eint.c)2
-rw-r--r--arch/arm/mach-s3c64xx/irq-pm.c (renamed from arch/arm/plat-s3c64xx/irq-pm.c)2
-rw-r--r--arch/arm/mach-s3c64xx/irq.c69
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c (renamed from arch/arm/mach-s3c6410/mach-anw6410.c)8
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c (renamed from arch/arm/mach-s3c6410/mach-hmt.c)4
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c (renamed from arch/arm/mach-s3c6410/mach-ncp.c)4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c (renamed from arch/arm/mach-s3c6400/mach-smdk6400.c)4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c (renamed from arch/arm/mach-s3c6410/mach-smdk6410.c)337
-rw-r--r--arch/arm/mach-s3c64xx/pm.c (renamed from arch/arm/plat-s3c64xx/pm.c)12
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c (renamed from arch/arm/mach-s3c6400/s3c6400.c)11
-rw-r--r--arch/arm/mach-s3c64xx/s3c6410.c (renamed from arch/arm/mach-s3c6410/cpu.c)24
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c (renamed from arch/arm/plat-s3c64xx/setup-fb-24bpp.c)0
-rw-r--r--arch/arm/mach-s3c64xx/setup-i2c0.c (renamed from arch/arm/plat-s3c64xx/setup-i2c0.c)2
-rw-r--r--arch/arm/mach-s3c64xx/setup-i2c1.c (renamed from arch/arm/plat-s3c64xx/setup-i2c1.c)2
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci-gpio.c (renamed from arch/arm/plat-s3c64xx/setup-sdhci-gpio.c)0
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci.c (renamed from arch/arm/mach-s3c6400/setup-sdhci.c)15
-rw-r--r--arch/arm/mach-s3c64xx/sleep.S (renamed from arch/arm/plat-s3c64xx/sleep.S)6
-rw-r--r--arch/arm/mach-s5p6440/Kconfig21
-rw-r--r--arch/arm/mach-s5p6440/Makefile19
-rw-r--r--arch/arm/mach-s5p6440/Makefile.boot2
-rw-r--r--arch/arm/mach-s5p6440/clock.c698
-rw-r--r--arch/arm/mach-s5p6440/cpu.c114
-rw-r--r--arch/arm/mach-s5p6440/gpio.c322
-rw-r--r--arch/arm/mach-s5p6440/include/mach/debug-macro.S37
-rw-r--r--arch/arm/mach-s5p6440/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-s5p6440/include/mach/gpio.h80
-rw-r--r--arch/arm/mach-s5p6440/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5p6440/include/mach/io.h18
-rw-r--r--arch/arm/mach-s5p6440/include/mach/irqs.h111
-rw-r--r--arch/arm/mach-s5p6440/include/mach/map.h68
-rw-r--r--arch/arm/mach-s5p6440/include/mach/memory.h19
-rw-r--r--arch/arm/mach-s5p6440/include/mach/pwm-clock.h62
-rw-r--r--arch/arm/mach-s5p6440/include/mach/regs-clock.h130
-rw-r--r--arch/arm/mach-s5p6440/include/mach/regs-gpio.h54
-rw-r--r--arch/arm/mach-s5p6440/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5p6440/include/mach/system.h26
-rw-r--r--arch/arm/mach-s5p6440/include/mach/tick.h24
-rw-r--r--arch/arm/mach-s5p6440/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5p6440/include/mach/uncompress.h24
-rw-r--r--arch/arm/mach-s5p6440/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5p6440/init.c52
-rw-r--r--arch/arm/mach-s5p6440/mach-smdk6440.c111
-rw-r--r--arch/arm/mach-s5p6442/Kconfig24
-rw-r--r--arch/arm/mach-s5p6442/Makefile19
-rw-r--r--arch/arm/mach-s5p6442/Makefile.boot2
-rw-r--r--arch/arm/mach-s5p6442/clock.c396
-rw-r--r--arch/arm/mach-s5p6442/cpu.c121
-rw-r--r--arch/arm/mach-s5p6442/include/mach/debug-macro.S36
-rw-r--r--arch/arm/mach-s5p6442/include/mach/entry-macro.S48
-rw-r--r--arch/arm/mach-s5p6442/include/mach/gpio.h123
-rw-r--r--arch/arm/mach-s5p6442/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5p6442/include/mach/io.h17
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h86
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h58
-rw-r--r--arch/arm/mach-s5p6442/include/mach/memory.h19
-rw-r--r--arch/arm/mach-s5p6442/include/mach/pwm-clock.h69
-rw-r--r--arch/arm/mach-s5p6442/include/mach/regs-clock.h103
-rw-r--r--arch/arm/mach-s5p6442/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5p6442/include/mach/system.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/tick.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5p6442/include/mach/uncompress.h24
-rw-r--r--arch/arm/mach-s5p6442/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5p6442/init.c44
-rw-r--r--arch/arm/mach-s5p6442/mach-smdk6442.c91
-rw-r--r--arch/arm/mach-s5pc100/include/mach/gpio-core.h21
-rw-r--r--arch/arm/mach-s5pc100/include/mach/io.h18
-rw-r--r--arch/arm/mach-s5pc100/include/mach/tick.h2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5pc100/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5pc100/setup-sdhci.c4
-rw-r--r--arch/arm/mach-s5pv210/Kconfig40
-rw-r--r--arch/arm/mach-s5pv210/Makefile20
-rw-r--r--arch/arm/mach-s5pv210/Makefile.boot2
-rw-r--r--arch/arm/mach-s5pv210/clock.c454
-rw-r--r--arch/arm/mach-s5pv210/cpu.c126
-rw-r--r--arch/arm/mach-s5pv210/include/mach/debug-macro.S42
-rw-r--r--arch/arm/mach-s5pv210/include/mach/entry-macro.S54
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h129
-rw-r--r--arch/arm/mach-s5pv210/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5pv210/include/mach/io.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h146
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h65
-rw-r--r--arch/arm/mach-s5pv210/include/mach/memory.h23
-rw-r--r--arch/arm/mach-s5pv210/include/mach/pwm-clock.h69
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-clock.h169
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5pv210/include/mach/system.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/tick.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/timex.h29
-rw-r--r--arch/arm/mach-s5pv210/include/mach/uncompress.h24
-rw-r--r--arch/arm/mach-s5pv210/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-s5pv210/init.c44
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c98
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c98
-rw-r--r--arch/arm/mach-sa1100/badge4.c5
-rw-r--r--arch/arm/mach-sa1100/collie.c4
-rw-r--r--arch/arm/mach-sa1100/include/mach/collie.h7
-rw-r--r--arch/arm/mach-sa1100/include/mach/irqs.h91
-rw-r--r--arch/arm/mach-sa1100/jornada720.c5
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c2
-rw-r--r--arch/arm/mach-sa1100/neponset.c5
-rw-r--r--arch/arm/mach-sa1100/time.c8
-rw-r--r--arch/arm/mach-shmobile/Kconfig84
-rw-r--r--arch/arm/mach-shmobile/Makefile22
-rw-r--r--arch/arm/mach-shmobile/Makefile.boot9
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c301
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c211
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c211
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c96
-rw-r--r--arch/arm/mach-shmobile/console.c31
-rw-r--r--arch/arm/mach-shmobile/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h23
-rw-r--r--arch/arm/mach-shmobile/include/mach/dma.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S39
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h48
-rw-r--r--arch/arm/mach-shmobile/include/mach/hardware.h7
-rw-r--r--arch/arm/mach-shmobile/include/mach/io.h9
-rw-r--r--arch/arm/mach-shmobile/include/mach/irqs.h10
-rw-r--r--arch/arm/mach-shmobile/include/mach/memory.h7
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7367.h332
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h434
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7377.h360
-rw-r--r--arch/arm/mach-shmobile/include/mach/system.h14
-rw-r--r--arch/arm/mach-shmobile/include/mach/timex.h6
-rw-r--r--arch/arm/mach-shmobile/include/mach/uncompress.h21
-rw-r--r--arch/arm/mach-shmobile/include/mach/vmalloc.h6
-rw-r--r--arch/arm/mach-shmobile/intc-sh7367.c270
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c369
-rw-r--r--arch/arm/mach-shmobile/intc-sh7377.c350
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7367.c1801
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7372.c1637
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7377.c1767
-rw-r--r--arch/arm/mach-shmobile/setup-sh7367.c198
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c199
-rw-r--r--arch/arm/mach-shmobile/setup-sh7377.c215
-rw-r--r--arch/arm/mach-shmobile/timer.c46
-rw-r--r--arch/arm/mach-u300/core.c4
-rw-r--r--arch/arm/mach-u300/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h8
-rw-r--r--arch/arm/mach-w90x900/cpu.h1
-rw-r--r--arch/arm/mach-w90x900/dev.c42
-rw-r--r--arch/arm/mach-w90x900/include/mach/fb.h83
-rw-r--r--arch/arm/mach-w90x900/include/mach/regs-ldm.h253
-rw-r--r--arch/arm/mach-w90x900/mach-nuc950evb.c47
-rw-r--r--arch/arm/mach-w90x900/nuc950.c4
-rw-r--r--arch/arm/plat-mxc/Kconfig30
-rw-r--r--arch/arm/plat-mxc/Makefile8
-rw-r--r--arch/arm/plat-mxc/audmux-v1.c14
-rw-r--r--arch/arm/plat-mxc/audmux-v2.c9
-rw-r--r--arch/arm/plat-mxc/clock.c1
-rw-r--r--arch/arm/plat-mxc/dma-mx1-mx2.c207
-rw-r--r--arch/arm/plat-mxc/ehci.c122
-rw-r--r--arch/arm/plat-mxc/gpio.c30
-rw-r--r--arch/arm/plat-mxc/include/mach/board-kzmarm11.h18
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31ads.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31moboard.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/clock.h7
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h5
-rw-r--r--arch/arm/plat-mxc/include/mach/debug-macro.S12
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S34
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h9
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx1.h313
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx21.h210
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx25.h24
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx27.h372
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx2x.h425
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h76
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx35.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx51.h326
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v1.h103
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v3.h8
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux.h128
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h20
-rw-r--r--arch/arm/plat-mxc/include/mach/memory.h54
-rw-r--r--arch/arm/plat-mxc/include/mach/mtd-xip.h34
-rw-r--r--arch/arm/plat-mxc/include/mach/mx1.h395
-rw-r--r--arch/arm/plat-mxc/include/mach/mx21.h13
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h36
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h32
-rw-r--r--arch/arm/plat-mxc/include/mach/mx2x.h8
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h33
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h13
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3x.h8
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h454
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h20
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc91231.h58
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_ehci.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/ssi.h18
-rw-r--r--arch/arm/plat-mxc/include/mach/timex.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h3
-rw-r--r--arch/arm/plat-mxc/iomux-mx1-mx2.c157
-rw-r--r--arch/arm/plat-mxc/iomux-v1.c238
-rw-r--r--arch/arm/plat-mxc/time.c41
-rw-r--r--arch/arm/plat-mxc/tzic.c172
-rw-r--r--arch/arm/plat-nomadik/timer.c9
-rw-r--r--arch/arm/plat-s3c/Kconfig215
-rw-r--r--arch/arm/plat-s3c/Makefile45
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig60
-rw-r--r--arch/arm/plat-s3c24xx/Makefile8
-rw-r--r--arch/arm/plat-s3c24xx/clock-dclk.c22
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c4
-rw-r--r--arch/arm/plat-s3c24xx/devs.c59
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/audio-simtec.h (renamed from arch/arm/plat-s3c/include/plat/audio-simtec.h)2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/mci.h9
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2440.h17
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c244x.h (renamed from arch/arm/plat-s3c24xx/s3c244x.h)14
-rw-r--r--arch/arm/plat-s3c64xx/Kconfig71
-rw-r--r--arch/arm/plat-s3c64xx/clock.c300
-rw-r--r--arch/arm/plat-s3c64xx/dev-audio.c167
-rw-r--r--arch/arm/plat-s3c64xx/irq.c256
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c758
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-init.c29
-rw-r--r--arch/arm/plat-s5p/Kconfig25
-rw-r--r--arch/arm/plat-s5p/Makefile19
-rw-r--r--arch/arm/plat-s5p/clock.c149
-rw-r--r--arch/arm/plat-s5p/cpu.c113
-rw-r--r--arch/arm/plat-s5p/dev-uart.c139
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h90
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h34
-rw-r--r--arch/arm/plat-s5p/include/plat/pll.h83
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p-clock.h40
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6440.h37
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6442.h33
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pv210.h33
-rw-r--r--arch/arm/plat-s5p/irq.c72
-rw-r--r--arch/arm/plat-s5p/setup-i2c0.c25
-rw-r--r--arch/arm/plat-s5pc1xx/Kconfig3
-rw-r--r--arch/arm/plat-s5pc1xx/clock.c31
-rw-r--r--arch/arm/plat-s5pc1xx/dev-uart.c29
-rw-r--r--arch/arm/plat-s5pc1xx/gpio-config.c2
-rw-r--r--arch/arm/plat-s5pc1xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s5pc1xx/include/plat/irqs.h19
-rw-r--r--arch/arm/plat-s5pc1xx/include/plat/regs-clock.h119
-rw-r--r--arch/arm/plat-s5pc1xx/irq.c202
-rw-r--r--arch/arm/plat-s5pc1xx/s5pc100-clock.c770
-rw-r--r--arch/arm/plat-samsung/Kconfig229
-rw-r--r--arch/arm/plat-samsung/Makefile45
-rw-r--r--arch/arm/plat-samsung/adc.c (renamed from arch/arm/plat-s3c24xx/adc.c)55
-rw-r--r--arch/arm/plat-samsung/clock-clksrc.c212
-rw-r--r--arch/arm/plat-samsung/clock.c (renamed from arch/arm/plat-s3c/clock.c)75
-rw-r--r--arch/arm/plat-samsung/dev-fb.c (renamed from arch/arm/plat-s3c/dev-fb.c)0
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc.c (renamed from arch/arm/plat-s3c/dev-hsmmc.c)0
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc1.c (renamed from arch/arm/plat-s3c/dev-hsmmc1.c)0
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc2.c (renamed from arch/arm/plat-s3c/dev-hsmmc2.c)0
-rw-r--r--arch/arm/plat-samsung/dev-i2c0.c (renamed from arch/arm/plat-s3c/dev-i2c0.c)0
-rw-r--r--arch/arm/plat-samsung/dev-i2c1.c (renamed from arch/arm/plat-s3c/dev-i2c1.c)0
-rw-r--r--arch/arm/plat-samsung/dev-nand.c (renamed from arch/arm/plat-s3c/dev-nand.c)0
-rw-r--r--arch/arm/plat-samsung/dev-uart.c44
-rw-r--r--arch/arm/plat-samsung/dev-usb-hsotg.c (renamed from arch/arm/plat-s3c/dev-usb-hsotg.c)7
-rw-r--r--arch/arm/plat-samsung/dev-usb.c (renamed from arch/arm/plat-s3c/dev-usb.c)25
-rw-r--r--arch/arm/plat-samsung/dma.c (renamed from arch/arm/plat-s3c/dma.c)4
-rw-r--r--arch/arm/plat-samsung/gpio-config.c (renamed from arch/arm/plat-s3c/gpio-config.c)2
-rw-r--r--arch/arm/plat-samsung/gpio.c (renamed from arch/arm/plat-s3c/gpio.c)2
-rw-r--r--arch/arm/plat-samsung/gpiolib.c199
-rw-r--r--arch/arm/plat-samsung/include/plat/adc.h (renamed from arch/arm/plat-s3c/include/plat/adc.h)4
-rw-r--r--arch/arm/plat-samsung/include/plat/audio.h (renamed from arch/arm/plat-s3c/include/plat/audio.h)10
-rw-r--r--arch/arm/plat-samsung/include/plat/clock-clksrc.h83
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h (renamed from arch/arm/plat-s3c/include/plat/clock.h)36
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu-freq.h (renamed from arch/arm/plat-s3c/include/plat/cpu-freq.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h (renamed from arch/arm/plat-s3c/include/plat/cpu.h)5
-rw-r--r--arch/arm/plat-samsung/include/plat/debug-macro.S (renamed from arch/arm/plat-s3c/include/plat/debug-macro.S)14
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h (renamed from arch/arm/plat-s3c/include/plat/devs.h)11
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-core.h (renamed from arch/arm/plat-s3c/include/plat/dma-core.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-s3c24xx.h (renamed from arch/arm/plat-s3c24xx/include/plat/dma-plat.h)4
-rw-r--r--arch/arm/plat-samsung/include/plat/dma.h (renamed from arch/arm/plat-s3c/include/plat/dma.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/fb.h (renamed from arch/arm/plat-s3c/include/plat/fb.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h (renamed from arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h (renamed from arch/arm/plat-s3c/include/plat/gpio-cfg.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h (renamed from arch/arm/plat-s3c/include/plat/gpio-core.h)30
-rw-r--r--arch/arm/plat-samsung/include/plat/hwmon.h (renamed from arch/arm/plat-s3c/include/plat/hwmon.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/iic-core.h (renamed from arch/arm/plat-s3c/include/plat/iic-core.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/iic.h (renamed from arch/arm/plat-s3c/include/plat/iic.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/irq-uart.h20
-rw-r--r--arch/arm/plat-samsung/include/plat/irq-vic-timer.h (renamed from arch/arm/plat-s3c24xx/include/plat/s3c2442.h)12
-rw-r--r--arch/arm/plat-samsung/include/plat/map-base.h (renamed from arch/arm/plat-s3c/include/plat/map-base.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/nand.h (renamed from arch/arm/plat-s3c/include/plat/nand.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/pm.h (renamed from arch/arm/plat-s3c/include/plat/pm.h)6
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-ac97.h (renamed from arch/arm/plat-s3c/include/plat/regs-ac97.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-adc.h (renamed from arch/arm/plat-s3c/include/plat/regs-adc.h)4
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-fb-v4.h (renamed from arch/arm/plat-s3c/include/plat/regs-fb-v4.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-fb.h (renamed from arch/arm/plat-s3c/include/plat/regs-fb.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-iic.h (renamed from arch/arm/plat-s3c/include/plat/regs-iic.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-irqtype.h (renamed from arch/arm/plat-s3c/include/plat/regs-irqtype.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-nand.h (renamed from arch/arm/plat-s3c/include/plat/regs-nand.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-rtc.h (renamed from arch/arm/plat-s3c/include/plat/regs-rtc.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h (renamed from arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-sdhci.h (renamed from arch/arm/plat-s3c/include/plat/regs-sdhci.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-serial.h (renamed from arch/arm/plat-s3c/include/plat/regs-serial.h)32
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-timer.h (renamed from arch/arm/plat-s3c/include/plat/regs-timer.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h (renamed from arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h (renamed from arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-watchdog.h (renamed from arch/arm/plat-s3c/include/plat/regs-watchdog.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h67
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h (renamed from arch/arm/plat-s3c/include/plat/sdhci.h)43
-rw-r--r--arch/arm/plat-samsung/include/plat/udc-hs.h (renamed from arch/arm/plat-s3c/include/plat/udc-hs.h)4
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h (renamed from arch/arm/plat-s3c/include/plat/uncompress.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/usb-control.h (renamed from arch/arm/plat-s3c/include/plat/usb-control.h)4
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h (renamed from arch/arm/plat-s3c/include/plat/watchdog-reset.h)0
-rw-r--r--arch/arm/plat-samsung/init.c (renamed from arch/arm/plat-s3c/init.c)0
-rw-r--r--arch/arm/plat-samsung/irq-uart.c143
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c86
-rw-r--r--arch/arm/plat-samsung/pm-check.c (renamed from arch/arm/plat-s3c/pm-check.c)8
-rw-r--r--arch/arm/plat-samsung/pm-gpio.c (renamed from arch/arm/plat-s3c/pm-gpio.c)2
-rw-r--r--arch/arm/plat-samsung/pm.c (renamed from arch/arm/plat-s3c/pm.c)8
-rw-r--r--arch/arm/plat-samsung/pwm-clock.c (renamed from arch/arm/plat-s3c/pwm-clock.c)112
-rw-r--r--arch/arm/plat-samsung/pwm.c (renamed from arch/arm/plat-s3c/pwm.c)0
-rw-r--r--arch/arm/plat-samsung/time.c (renamed from arch/arm/plat-s3c/time.c)2
-rw-r--r--arch/avr32/include/asm/ptrace.h2
-rw-r--r--arch/avr32/kernel/ptrace.c53
-rw-r--r--arch/blackfin/include/asm/dma-mapping.h36
-rw-r--r--arch/blackfin/include/asm/nand.h4
-rw-r--r--arch/cris/arch-v10/kernel/entry.S2
-rw-r--r--arch/cris/arch-v10/kernel/ptrace.c51
-rw-r--r--arch/cris/arch-v10/lib/old_checksum.c2
-rw-r--r--arch/cris/arch-v32/kernel/entry.S2
-rw-r--r--arch/cris/arch-v32/kernel/ptrace.c109
-rw-r--r--arch/cris/arch-v32/mm/tlb.c2
-rw-r--r--arch/cris/include/arch-v32/arch/ptrace.h1
-rw-r--r--arch/cris/include/asm/pci.h8
-rw-r--r--arch/cris/include/asm/unistd.h2
-rw-r--r--arch/cris/kernel/sys_cris.c96
-rw-r--r--arch/frv/include/asm/dma-mapping.h41
-rw-r--r--arch/frv/include/asm/pci.h8
-rw-r--r--arch/frv/include/asm/ptrace.h2
-rw-r--r--arch/frv/include/asm/unistd.h1
-rw-r--r--arch/frv/kernel/sys_frv.c89
-rw-r--r--arch/frv/mb93090-mb00/pci-dma-nommu.c30
-rw-r--r--arch/frv/mb93090-mb00/pci-dma.c30
-rw-r--r--arch/h8300/include/asm/io.h2
-rw-r--r--arch/h8300/include/asm/ptrace.h2
-rw-r--r--arch/h8300/include/asm/unistd.h3
-rw-r--r--arch/h8300/kernel/ptrace.c82
-rw-r--r--arch/h8300/kernel/sys_h8300.c138
-rw-r--r--arch/h8300/kernel/syscalls.S4
-rw-r--r--arch/h8300/platform/h8300h/ptrace_h8300h.c6
-rw-r--r--arch/h8300/platform/h8s/ptrace_h8s.c4
-rw-r--r--arch/ia64/Kconfig3
-rw-r--r--arch/ia64/include/asm/compat.h3
-rw-r--r--arch/ia64/include/asm/pci.h14
-rw-r--r--arch/ia64/include/asm/ptrace.h4
-rw-r--r--arch/ia64/kernel/acpi.c3
-rw-r--r--arch/ia64/kernel/topology.c2
-rw-r--r--arch/ia64/sn/kernel/setup.c2
-rw-r--r--arch/m32r/include/asm/ptrace.h2
-rw-r--r--arch/m32r/include/asm/unistd.h1
-rw-r--r--arch/m32r/kernel/ptrace.c97
-rw-r--r--arch/m32r/kernel/sys_m32r.c92
-rw-r--r--arch/m68k/atari/atakeyb.c2
-rw-r--r--arch/m68k/include/asm/fbio.h2
-rw-r--r--arch/m68k/include/asm/io_no.h2
-rw-r--r--arch/m68k/include/asm/ptrace.h8
-rw-r--r--arch/m68k/include/asm/unistd.h3
-rw-r--r--arch/m68k/kernel/entry.S4
-rw-r--r--arch/m68k/kernel/sys_m68k.c131
-rw-r--r--arch/m68knommu/kernel/ptrace.c74
-rw-r--r--arch/m68knommu/kernel/sys_m68k.c136
-rw-r--r--arch/m68knommu/kernel/syscalltable.S4
-rw-r--r--arch/microblaze/kernel/ptrace.c64
-rw-r--r--arch/mips/Kconfig4
-rw-r--r--arch/mips/include/asm/compat.h3
-rw-r--r--arch/mips/include/asm/pci.h22
-rw-r--r--arch/mips/include/asm/unistd.h2
-rw-r--r--arch/mips/kernel/linux32.c16
-rw-r--r--arch/mips/kernel/ptrace.c30
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/syscall.c130
-rw-r--r--arch/mips/txx9/generic/7segled.c5
-rw-r--r--arch/mips/txx9/generic/setup.c1
-rw-r--r--arch/mn10300/include/asm/dma-mapping.h65
-rw-r--r--arch/mn10300/include/asm/ptrace.h2
-rw-r--r--arch/mn10300/include/asm/unistd.h2
-rw-r--r--arch/mn10300/kernel/entry.S2
-rw-r--r--arch/mn10300/kernel/sys_mn10300.c106
-rw-r--r--arch/parisc/Kconfig3
-rw-r--r--arch/parisc/include/asm/compat.h3
-rw-r--r--arch/parisc/include/asm/pci.h14
-rw-r--r--arch/parisc/include/asm/ptrace.h5
-rw-r--r--arch/parisc/kernel/sys_parisc.c15
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/powerpc/Kconfig3
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts4
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts4
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts4
-rw-r--r--arch/powerpc/boot/dts/kmeter1.dts2
-rw-r--r--arch/powerpc/include/asm/compat.h3
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h3
-rw-r--r--arch/powerpc/include/asm/paca.h18
-rw-r--r--arch/powerpc/include/asm/pci.h32
-rw-r--r--arch/powerpc/include/asm/perf_event.h109
-rw-r--r--arch/powerpc/include/asm/perf_event_fsl_emb.h50
-rw-r--r--arch/powerpc/include/asm/perf_event_server.h110
-rw-r--r--arch/powerpc/include/asm/ptrace.h7
-rw-r--r--arch/powerpc/include/asm/reg_booke.h4
-rw-r--r--arch/powerpc/include/asm/reg_fsl_emb.h2
-rw-r--r--arch/powerpc/include/asm/syscalls.h4
-rw-r--r--arch/powerpc/include/asm/systbl.h2
-rw-r--r--arch/powerpc/include/asm/unistd.h2
-rw-r--r--arch/powerpc/kernel/Makefile7
-rw-r--r--arch/powerpc/kernel/cacheinfo.c2
-rw-r--r--arch/powerpc/kernel/cputable.c2
-rw-r--r--arch/powerpc/kernel/e500-pmu.c129
-rw-r--r--arch/powerpc/kernel/head_64.S17
-rw-r--r--arch/powerpc/kernel/legacy_serial.c2
-rw-r--r--arch/powerpc/kernel/paca.c93
-rw-r--r--arch/powerpc/kernel/pci-common.c15
-rw-r--r--arch/powerpc/kernel/perf_event.c8
-rw-r--r--arch/powerpc/kernel/perf_event_fsl_emb.c654
-rw-r--r--arch/powerpc/kernel/prom.c3
-rw-r--r--arch/powerpc/kernel/ptrace.c12
-rw-r--r--arch/powerpc/kernel/setup-common.c3
-rw-r--r--arch/powerpc/kernel/setup_64.c12
-rw-r--r--arch/powerpc/kernel/syscalls.c164
-rw-r--r--arch/powerpc/mm/init_32.c2
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_gpt.c2
-rw-r--r--arch/powerpc/platforms/82xx/pq2ads-pci-pic.c10
-rw-r--r--arch/powerpc/platforms/85xx/socrates_fpga_pic.c34
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig12
-rw-r--r--arch/powerpc/platforms/86xx/gef_gpio.c10
-rw-r--r--arch/powerpc/platforms/86xx/gef_pic.c20
-rw-r--r--arch/powerpc/platforms/86xx/gef_ppc9a.c12
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc310.c12
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc610.c12
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype10
-rw-r--r--arch/powerpc/platforms/iseries/exception.S25
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c42
-rw-r--r--arch/powerpc/platforms/pseries/offline_states.h23
-rw-r--r--arch/powerpc/platforms/pseries/plpar_wrappers.h4
-rw-r--r--arch/powerpc/platforms/pseries/xics.c7
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.h2
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c10
-rw-r--r--arch/s390/crypto/sha_common.c2
-rw-r--r--arch/s390/include/asm/cio.h2
-rw-r--r--arch/s390/include/asm/compat.h3
-rw-r--r--arch/s390/include/asm/ptrace.h3
-rw-r--r--arch/s390/include/asm/qdio.h7
-rw-r--r--arch/s390/include/asm/unistd.h1
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/kernel/entry.h10
-rw-r--r--arch/s390/kernel/sclp.S2
-rw-r--r--arch/s390/kernel/smp.c12
-rw-r--r--arch/s390/kernel/sys_s390.c43
-rw-r--r--arch/s390/kernel/syscalls.S6
-rw-r--r--arch/s390/kernel/time.c59
-rw-r--r--arch/s390/lib/Makefile3
-rw-r--r--arch/s390/mm/cmm.c2
-rw-r--r--arch/score/include/asm/ptrace.h3
-rw-r--r--arch/sh/Kconfig3
-rw-r--r--arch/sh/include/asm/pci.h19
-rw-r--r--arch/sh/include/asm/ptrace.h2
-rw-r--r--arch/sh/include/asm/syscalls.h5
-rw-r--r--arch/sh/include/asm/unistd_32.h2
-rw-r--r--arch/sh/include/asm/unistd_64.h2
-rw-r--r--arch/sh/kernel/cpu/clock.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c2
-rw-r--r--arch/sh/kernel/sys_sh.c115
-rw-r--r--arch/sparc/Kconfig3
-rw-r--r--arch/sparc/include/asm/compat.h3
-rw-r--r--arch/sparc/include/asm/dma-mapping.h14
-rw-r--r--arch/sparc/include/asm/fbio.h2
-rw-r--r--arch/sparc/include/asm/pci_32.h14
-rw-r--r--arch/sparc/include/asm/pci_64.h14
-rw-r--r--arch/sparc/include/asm/unistd.h4
-rw-r--r--arch/sparc/kernel/iommu.c10
-rw-r--r--arch/sparc/kernel/ioport.c11
-rw-r--r--arch/sparc/kernel/perf_event.c4
-rw-r--r--arch/sparc/kernel/sys_sparc_32.c113
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c13
-rw-r--r--arch/sparc/kernel/systbls.h5
-rw-r--r--arch/sparc/kernel/systbls_64.S6
-rw-r--r--arch/um/include/asm/dma-mapping.h8
-rw-r--r--arch/um/include/asm/ptrace-generic.h2
-rw-r--r--arch/um/kernel/ptrace.c70
-rw-r--r--arch/um/kernel/syscall.c45
-rw-r--r--arch/um/sys-i386/shared/sysdep/syscalls.h2
-rw-r--r--arch/um/sys-i386/sys_call_table.S2
-rw-r--r--arch/um/sys-i386/syscalls.c137
-rw-r--r--arch/um/sys-x86_64/syscall_table.c5
-rw-r--r--arch/um/sys-x86_64/syscalls.c14
-rw-r--r--arch/x86/Kconfig7
-rw-r--r--arch/x86/crypto/twofish-i586-asm_32.S10
-rw-r--r--arch/x86/crypto/twofish-x86_64-asm_64.S20
-rw-r--r--arch/x86/ia32/ia32entry.S6
-rw-r--r--arch/x86/ia32/sys_ia32.c76
-rw-r--r--arch/x86/include/asm/compat.h3
-rw-r--r--arch/x86/include/asm/hw_breakpoint.h1
-rw-r--r--arch/x86/include/asm/pci.h28
-rw-r--r--arch/x86/include/asm/perf_event.h16
-rw-r--r--arch/x86/include/asm/ptrace.h7
-rw-r--r--arch/x86/include/asm/sys_ia32.h11
-rw-r--r--arch/x86/include/asm/syscalls.h15
-rw-r--r--arch/x86/include/asm/unistd_32.h4
-rw-r--r--arch/x86/include/asm/unistd_64.h3
-rw-r--r--arch/x86/kernel/acpi/boot.c100
-rw-r--r--arch/x86/kernel/aperture_64.c1
-rw-r--r--arch/x86/kernel/apic/apic_flat_64.c2
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c4
-rw-r--r--arch/x86/kernel/cpu/intel.c3
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c16
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c4
-rw-r--r--arch/x86/kernel/cpu/perf_event.c39
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c37
-rw-r--r--arch/x86/kernel/cpu/perf_event_p6.c8
-rw-r--r--arch/x86/kernel/cpu/perfctr-watchdog.c2
-rw-r--r--arch/x86/kernel/dumpstack_64.c10
-rw-r--r--arch/x86/kernel/head_64.S2
-rw-r--r--arch/x86/kernel/hw_breakpoint.c12
-rw-r--r--arch/x86/kernel/k8.c14
-rw-r--r--arch/x86/kernel/pci-calgary_64.c2
-rw-r--r--arch/x86/kernel/pci-dma.c2
-rw-r--r--arch/x86/kernel/pci-gart_64.c2
-rw-r--r--arch/x86/kernel/process.c2
-rw-r--r--arch/x86/kernel/ptrace.c2
-rw-r--r--arch/x86/kernel/sys_i386_32.c185
-rw-r--r--arch/x86/kernel/sys_x86_64.c12
-rw-r--r--arch/x86/kernel/syscall_table_32.S4
-rw-r--r--arch/x86/kernel/tsc.c2
-rw-r--r--arch/x86/kernel/vmiclock_32.c2
-rw-r--r--arch/x86/mm/pageattr.c25
-rw-r--r--arch/x86/oprofile/op_model_amd.c23
-rw-r--r--arch/x86/oprofile/op_model_ppro.c6
-rw-r--r--arch/x86/xen/smp.c2
-rw-r--r--arch/xtensa/include/asm/pci.h8
-rw-r--r--arch/xtensa/include/asm/ptrace.h1
-rw-r--r--arch/xtensa/kernel/entry.S4
-rw-r--r--arch/xtensa/kernel/ptrace.c56
-rw-r--r--block/Kconfig.iosched2
-rw-r--r--block/blk-cgroup.c53
-rw-r--r--block/blk-cgroup.h10
-rw-r--r--block/blk-integrity.c2
-rw-r--r--block/blk-sysfs.c2
-rw-r--r--block/bsg.c2
-rw-r--r--block/elevator.c2
-rw-r--r--crypto/Kconfig4
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/acpi/Makefile4
-rw-r--r--drivers/acpi/acpica/exmutex.c3
-rw-r--r--drivers/acpi/battery.c86
-rw-r--r--drivers/acpi/bus.c10
-rw-r--r--drivers/acpi/dock.c2
-rw-r--r--drivers/acpi/ec.c33
-rw-r--r--drivers/acpi/internal.h2
-rw-r--r--drivers/acpi/proc.c2
-rw-r--r--drivers/acpi/processor_core.c1118
-rw-r--r--drivers/acpi/processor_driver.c978
-rw-r--r--drivers/acpi/processor_pdc.c209
-rw-r--r--drivers/acpi/processor_throttling.c3
-rw-r--r--drivers/acpi/sbs.c5
-rw-r--r--drivers/acpi/sleep.c19
-rw-r--r--drivers/acpi/system.c2
-rw-r--r--drivers/acpi/thermal.c36
-rw-r--r--drivers/acpi/utils.c45
-rw-r--r--drivers/acpi/video.c28
-rw-r--r--drivers/ata/libata-core.c2
-rw-r--r--drivers/ata/libata-sff.c2
-rw-r--r--drivers/ata/pata_acpi.c2
-rw-r--r--drivers/ata/pata_hpt3x3.c2
-rw-r--r--drivers/ata/pata_pcmcia.c2
-rw-r--r--drivers/auxdisplay/cfag12864bfb.c2
-rw-r--r--drivers/base/Kconfig51
-rw-r--r--drivers/base/bus.c26
-rw-r--r--drivers/base/class.c16
-rw-r--r--drivers/base/core.c46
-rw-r--r--drivers/base/cpu.c105
-rw-r--r--drivers/base/dd.c38
-rw-r--r--drivers/base/devtmpfs.c13
-rw-r--r--drivers/base/firmware_class.c11
-rw-r--r--drivers/base/memory.c20
-rw-r--r--drivers/base/node.c81
-rw-r--r--drivers/base/platform.c76
-rw-r--r--drivers/base/power/main.c20
-rw-r--r--drivers/base/sys.c17
-rw-r--r--drivers/block/drbd/drbd_int.h4
-rw-r--r--drivers/block/drbd/drbd_req.h2
-rw-r--r--drivers/block/floppy.c1493
-rw-r--r--drivers/block/osdblk.c12
-rw-r--r--drivers/block/pktcdvd.c14
-rw-r--r--drivers/char/ChangeLog775
-rw-r--r--drivers/char/agp/Kconfig2
-rw-r--r--drivers/char/agp/intel-agp.c2
-rw-r--r--drivers/char/applicom.c2
-rw-r--r--drivers/char/hvc_iseries.c2
-rw-r--r--drivers/char/hvc_iucv.c6
-rw-r--r--drivers/char/hw_random/n2-drv.c2
-rw-r--r--drivers/char/ip2/i2hw.h2
-rw-r--r--drivers/char/ipmi/ipmi_si_intf.c71
-rw-r--r--drivers/char/mem.c195
-rw-r--r--drivers/char/mmtimer.c2
-rw-r--r--drivers/char/n_tty.c17
-rw-r--r--drivers/char/pty.c2
-rw-r--r--drivers/char/random.c2
-rw-r--r--drivers/char/serial167.c2
-rw-r--r--drivers/char/tty_audit.c1
-rw-r--r--drivers/char/tty_io.c2
-rw-r--r--drivers/char/vt.c6
-rw-r--r--drivers/cpufreq/cpufreq.c2
-rw-r--r--drivers/cpuidle/sysfs.c8
-rw-r--r--drivers/crypto/hifn_795x.c2
-rw-r--r--drivers/dma/coh901318_lli.h2
-rw-r--r--drivers/dma/ioat/dma.c2
-rw-r--r--drivers/dma/ioat/dma.h2
-rw-r--r--drivers/edac/e752x_edac.c117
-rw-r--r--drivers/edac/edac_device_sysfs.c6
-rw-r--r--drivers/edac/edac_mc_sysfs.c4
-rw-r--r--drivers/edac/edac_pci_sysfs.c4
-rw-r--r--drivers/edac/mpc85xx_edac.c163
-rw-r--r--drivers/edac/mpc85xx_edac.h3
-rw-r--r--drivers/firewire/core-device.c5
-rw-r--r--drivers/firmware/edd.c2
-rw-r--r--drivers/firmware/efivars.c2
-rw-r--r--drivers/firmware/iscsi_ibft.c2
-rw-r--r--drivers/firmware/memmap.c2
-rw-r--r--drivers/gpio/gpiolib.c8
-rw-r--r--drivers/gpu/drm/drm_sysfs.c18
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_memory.c2
-rw-r--r--drivers/gpu/drm/via/via_irq.c4
-rw-r--r--drivers/hid/hid-input.c24
-rw-r--r--drivers/i2c/Kconfig9
-rw-r--r--drivers/i2c/Makefile2
-rw-r--r--drivers/i2c/algos/i2c-algo-bit.c9
-rw-r--r--drivers/i2c/algos/i2c-algo-pcf.c2
-rw-r--r--drivers/i2c/busses/i2c-i801.c6
-rw-r--r--drivers/i2c/busses/i2c-omap.c2
-rw-r--r--drivers/i2c/busses/i2c-powermac.c25
-rw-r--r--drivers/i2c/busses/i2c-pxa.c2
-rw-r--r--drivers/i2c/busses/i2c-xiic.c1
-rw-r--r--drivers/i2c/chips/Kconfig19
-rw-r--r--drivers/i2c/chips/Makefile18
-rw-r--r--drivers/i2c/i2c-smbus.c5
-rw-r--r--drivers/ieee1394/nodemgr.c5
-rw-r--r--drivers/ieee1394/pcilynx.c2
-rw-r--r--drivers/infiniband/core/cm.c2
-rw-r--r--drivers/infiniband/core/mad.c3
-rw-r--r--drivers/infiniband/core/sysfs.c2
-rw-r--r--drivers/infiniband/core/ucm.c13
-rw-r--r--drivers/infiniband/core/user_mad.c9
-rw-r--r--drivers/infiniband/core/uverbs_main.c9
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch.c2
-rw-r--r--drivers/infiniband/hw/ehca/ehca_qes.h4
-rw-r--r--drivers/infiniband/hw/ehca/ehca_reqs.c2
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.c8
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.h1
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c30
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.c1
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_cm.c10
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_ib.c9
-rw-r--r--drivers/input/evdev.c2
-rw-r--r--drivers/input/input.c38
-rw-r--r--drivers/input/joystick/gamecon.c2
-rw-r--r--drivers/input/keyboard/bf54x-keys.c2
-rw-r--r--drivers/input/keyboard/locomokbd.c32
-rw-r--r--drivers/input/misc/Kconfig11
-rw-r--r--drivers/input/misc/Makefile1
-rw-r--r--drivers/input/misc/ati_remote2.c14
-rw-r--r--drivers/input/misc/twl4030-vibra.c297
-rw-r--r--drivers/input/misc/winbond-cir.c12
-rw-r--r--drivers/input/misc/wm831x-on.c9
-rw-r--r--drivers/input/misc/yealink.h2
-rw-r--r--drivers/input/mouse/alps.c49
-rw-r--r--drivers/input/mouse/appletouch.c6
-rw-r--r--drivers/input/mousedev.c6
-rw-r--r--drivers/input/serio/i8042-x86ia64io.h10
-rw-r--r--drivers/input/serio/i8042.c26
-rw-r--r--drivers/input/serio/serio_raw.c11
-rw-r--r--drivers/input/sparse-keymap.c6
-rw-r--r--drivers/input/tablet/aiptek.c2
-rw-r--r--drivers/input/tablet/wacom_sys.c4
-rw-r--r--drivers/input/tablet/wacom_wac.c165
-rw-r--r--drivers/input/tablet/wacom_wac.h1
-rw-r--r--drivers/input/touchscreen/Kconfig9
-rw-r--r--drivers/input/touchscreen/ad7877.c2
-rw-r--r--drivers/input/touchscreen/ads7846.c20
-rw-r--r--drivers/isdn/hardware/mISDN/mISDNisar.c4
-rw-r--r--drivers/isdn/i4l/isdn_common.c2
-rw-r--r--drivers/isdn/mISDN/dsp_core.c4
-rw-r--r--drivers/isdn/mISDN/l1oip_core.c4
-rw-r--r--drivers/isdn/sc/hardware.h2
-rw-r--r--drivers/macintosh/therm_pm72.c30
-rw-r--r--drivers/macintosh/therm_pm72.h2
-rw-r--r--drivers/macintosh/windfarm_core.c1
-rw-r--r--drivers/macintosh/windfarm_smu_controls.c1
-rw-r--r--drivers/md/dm-sysfs.c2
-rw-r--r--drivers/md/md.c4
-rw-r--r--drivers/media/IR/ir-keytable.c4
-rw-r--r--drivers/media/dvb/dvb-core/dvb_frontend.h8
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb-remote.c4
-rw-r--r--drivers/media/video/bt8xx/bttv-cards.c4
-rw-r--r--drivers/media/video/gspca/ov519.c2
-rw-r--r--drivers/media/video/omap24xxcam.c2
-rw-r--r--drivers/media/video/pwc/philips.txt2
-rw-r--r--drivers/media/video/sn9c102/sn9c102_sensor.h2
-rw-r--r--drivers/media/video/tea6420.c2
-rw-r--r--drivers/message/i2o/iop.c2
-rw-r--r--drivers/mfd/Kconfig9
-rw-r--r--drivers/mfd/sm501.c12
-rw-r--r--drivers/misc/Kconfig10
-rw-r--r--drivers/misc/Makefile1
-rw-r--r--drivers/misc/eeprom/at24.c1
-rw-r--r--drivers/misc/eeprom/at25.c1
-rw-r--r--drivers/misc/phantom.c13
-rw-r--r--drivers/misc/sgi-gru/grutables.h15
-rw-r--r--drivers/misc/tsl2550.c (renamed from drivers/i2c/chips/tsl2550.c)4
-rw-r--r--drivers/mmc/card/sdio_uart.c2
-rw-r--r--drivers/mmc/core/core.c1
-rw-r--r--drivers/mmc/core/sdio_ops.c36
-rw-r--r--drivers/mmc/core/sdio_ops.h1
-rw-r--r--drivers/mmc/host/msm_sdcc.c4
-rw-r--r--drivers/mmc/host/mxcmmc.c4
-rw-r--r--[-rwxr-xr-x]drivers/mtd/chips/cfi_util.c0
-rw-r--r--drivers/mtd/chips/jedec_probe.c2
-rw-r--r--[-rwxr-xr-x]drivers/mtd/inftlcore.c0
-rw-r--r--drivers/mtd/maps/pismo.c2
-rw-r--r--drivers/mtd/maps/plat-ram.c2
-rw-r--r--drivers/mtd/nand/Kconfig2
-rw-r--r--drivers/mtd/nand/bcm_umi_nand.c4
-rw-r--r--drivers/mtd/nand/mxc_nand.c2
-rw-r--r--drivers/mtd/ubi/build.c3
-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/arm/ks8695net.c2
-rw-r--r--drivers/net/atlx/atl2.h2
-rw-r--r--drivers/net/benet/be.h5
-rw-r--r--drivers/net/benet/be_cmds.c6
-rw-r--r--drivers/net/benet/be_hw.h5
-rw-r--r--drivers/net/benet/be_main.c25
-rw-r--r--drivers/net/bonding/bond_sysfs.c5
-rw-r--r--drivers/net/can/bfin_can.c3
-rw-r--r--drivers/net/can/usb/ems_usb.c4
-rw-r--r--drivers/net/cassini.c2
-rw-r--r--drivers/net/chelsio/sge.c2
-rw-r--r--drivers/net/cpmac.c14
-rw-r--r--drivers/net/cs89x0.c2
-rw-r--r--drivers/net/cxgb3/cxgb3_main.c1
-rw-r--r--drivers/net/cxgb3/sge.c4
-rw-r--r--drivers/net/davinci_emac.c4
-rw-r--r--drivers/net/e1000e/82571.c2
-rw-r--r--drivers/net/e1000e/defines.h2
-rw-r--r--drivers/net/e1000e/ich8lan.c10
-rw-r--r--drivers/net/e1000e/lib.c2
-rw-r--r--drivers/net/gianfar.c5
-rw-r--r--drivers/net/ibmveth.c2
-rw-r--r--drivers/net/igb/igb_main.c2
-rw-r--r--drivers/net/irda/irda-usb.c4
-rw-r--r--drivers/net/irda/sa1100_ir.c2
-rw-r--r--drivers/net/iseries_veth.c4
-rw-r--r--drivers/net/ks8851.c2
-rw-r--r--drivers/net/qlcnic/qlcnic.h13
-rw-r--r--drivers/net/qlcnic/qlcnic_ethtool.c17
-rw-r--r--drivers/net/qlcnic/qlcnic_hw.c32
-rw-r--r--drivers/net/qlcnic/qlcnic_init.c156
-rw-r--r--drivers/net/qlcnic/qlcnic_main.c5
-rw-r--r--drivers/net/qlge/qlge_ethtool.c2
-rw-r--r--drivers/net/qlge/qlge_main.c2
-rw-r--r--drivers/net/r8169.c4
-rw-r--r--drivers/net/s2io.c6
-rw-r--r--drivers/net/sfc/regs.h2
-rw-r--r--drivers/net/skfp/ess.c2
-rw-r--r--drivers/net/sky2.c2
-rw-r--r--drivers/net/smc91x.h42
-rw-r--r--drivers/net/smsc9420.c2
-rw-r--r--drivers/net/spider_net.c4
-rw-r--r--drivers/net/sungem.c2
-rw-r--r--drivers/net/tehuti.c2
-rw-r--r--drivers/net/tg3.c4
-rw-r--r--drivers/net/tokenring/tms380tr.c4
-rw-r--r--drivers/net/tulip/eeprom.c54
-rw-r--r--drivers/net/tun.c2
-rw-r--r--drivers/net/typhoon.c12
-rw-r--r--drivers/net/ucc_geth.c2
-rw-r--r--drivers/net/usb/asix.c30
-rw-r--r--drivers/net/usb/pegasus.h6
-rw-r--r--drivers/net/wan/cosa.c10
-rw-r--r--drivers/net/wan/hdlc_cisco.c8
-rw-r--r--drivers/net/wan/hdlc_x25.c4
-rw-r--r--drivers/net/wimax/i2400m/fw.c2
-rw-r--r--drivers/net/wimax/i2400m/i2400m.h2
-rw-r--r--drivers/net/wimax/i2400m/sdio.c4
-rw-r--r--drivers/net/wimax/i2400m/usb.c4
-rw-r--r--drivers/net/wireless/airo.c3
-rw-r--r--drivers/net/wireless/ath/ar9170/ar9170.h1
-rw-r--r--drivers/net/wireless/ath/ar9170/main.c12
-rw-r--r--drivers/net/wireless/ath/ar9170/usb.c170
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c4
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c41
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h1
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c22
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.c6
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c4
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c19
-rw-r--r--drivers/net/wireless/ipw2x00/libipw.h2
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c37
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c159
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c49
-rw-r--r--drivers/net/wireless/iwmc3200wifi/lmac.h2
-rw-r--r--drivers/net/wireless/rndis_wlan.c66
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c4
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c4
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00debug.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00soc.c1
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00soc.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c8
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c12
-rw-r--r--drivers/parisc/pdc_stable.c2
-rw-r--r--drivers/parport/ChangeLog583
-rw-r--r--drivers/pci/bus.c4
-rw-r--r--drivers/pci/hotplug/acpiphp_glue.c19
-rw-r--r--drivers/pci/hotplug/fakephp.c2
-rw-r--r--drivers/pci/pci-sysfs.c5
-rw-r--r--drivers/pci/pci.c37
-rw-r--r--drivers/pci/slot.c2
-rw-r--r--drivers/pcmcia/ds.c8
-rw-r--r--drivers/pcmcia/sa1111_generic.c25
-rw-r--r--drivers/platform/x86/Kconfig1
-rw-r--r--drivers/platform/x86/dell-wmi.c16
-rw-r--r--drivers/platform/x86/hp-wmi.c19
-rw-r--r--drivers/platform/x86/msi-laptop.c360
-rw-r--r--drivers/platform/x86/panasonic-laptop.c15
-rw-r--r--drivers/platform/x86/sony-laptop.c91
-rw-r--r--drivers/platform/x86/thinkpad_acpi.c4
-rw-r--r--drivers/platform/x86/topstar-laptop.c13
-rw-r--r--drivers/platform/x86/toshiba_acpi.c17
-rw-r--r--drivers/pnp/base.h3
-rw-r--r--drivers/pnp/interface.c7
-rw-r--r--drivers/pnp/pnpacpi/rsparser.c49
-rw-r--r--drivers/pnp/resource.c27
-rw-r--r--drivers/pnp/support.c4
-rw-r--r--drivers/power/power_supply_sysfs.c1
-rw-r--r--drivers/pps/Kconfig2
-rw-r--r--drivers/pps/Makefile1
-rw-r--r--drivers/pps/clients/Kconfig25
-rw-r--r--drivers/pps/clients/Makefile10
-rw-r--r--drivers/pps/clients/pps-ktimer.c123
-rw-r--r--drivers/pps/clients/pps-ldisc.c154
-rw-r--r--drivers/rtc/hctosys.c59
-rw-r--r--drivers/rtc/rtc-ds1742.c1
-rw-r--r--drivers/rtc/rtc-sysfs.c5
-rw-r--r--drivers/s390/block/dasd.c36
-rw-r--r--drivers/s390/block/dasd_3990_erp.c4
-rw-r--r--drivers/s390/block/dasd_devmap.c13
-rw-r--r--drivers/s390/block/dasd_diag.c6
-rw-r--r--drivers/s390/block/dasd_eckd.c27
-rw-r--r--drivers/s390/block/dasd_fba.c10
-rw-r--r--drivers/s390/block/dasd_genhd.c3
-rw-r--r--drivers/s390/block/dasd_int.h7
-rw-r--r--drivers/s390/block/dasd_ioctl.c6
-rw-r--r--drivers/s390/char/raw3270.c2
-rw-r--r--drivers/s390/char/sclp.c2
-rw-r--r--drivers/s390/cio/device.c5
-rw-r--r--drivers/s390/cio/qdio_debug.c1
-rw-r--r--drivers/s390/cio/qdio_main.c3
-rw-r--r--drivers/s390/net/Kconfig10
-rw-r--r--drivers/s390/net/Makefile1
-rw-r--r--drivers/s390/net/qeth_core.h3
-rw-r--r--drivers/s390/net/qeth_core_main.c8
-rw-r--r--drivers/s390/net/qeth_core_sys.c3
-rw-r--r--drivers/s390/net/qeth_l2_main.c16
-rw-r--r--drivers/s390/net/qeth_l3_main.c82
-rw-r--r--drivers/s390/net/smsgiucv.c15
-rw-r--r--drivers/s390/net/smsgiucv.h8
-rw-r--r--drivers/s390/net/smsgiucv_app.c211
-rw-r--r--drivers/s390/scsi/zfcp_qdio.c2
-rw-r--r--drivers/scsi/a100u2w.c2
-rw-r--r--drivers/scsi/initio.c2
-rw-r--r--drivers/scsi/libfc/fc_fcp.c4
-rw-r--r--drivers/scsi/lpfc/lpfc_els.c4
-rw-r--r--drivers/scsi/lpfc/lpfc_scsi.c4
-rw-r--r--drivers/scsi/pcmcia/nsp_cs.h2
-rw-r--r--drivers/scsi/pm8001/pm8001_hwi.c2
-rw-r--r--drivers/scsi/pm8001/pm8001_sas.c2
-rw-r--r--drivers/scsi/pmcraid.h2
-rw-r--r--drivers/scsi/qlogicpti.c2
-rw-r--r--drivers/scsi/sd.c2
-rw-r--r--drivers/scsi/ses.c4
-rw-r--r--drivers/scsi/sgiwd93.c2
-rw-r--r--drivers/scsi/sni_53c710.c2
-rw-r--r--drivers/serial/8250.c16
-rw-r--r--drivers/serial/Kconfig31
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/amba-pl010.c15
-rw-r--r--drivers/serial/imx.c2
-rw-r--r--drivers/serial/s3c2412.c1
-rw-r--r--drivers/serial/s5pv210.c154
-rw-r--r--drivers/serial/samsung.c8
-rw-r--r--drivers/serial/samsung.h19
-rw-r--r--drivers/serial/sh-sci.h22
-rw-r--r--drivers/sh/intc.c10
-rw-r--r--drivers/spi/spi_s3c24xx.c2
-rw-r--r--drivers/staging/asus_oled/asus_oled.c13
-rw-r--r--drivers/uio/Kconfig24
-rw-r--r--drivers/uio/Makefile2
-rw-r--r--drivers/uio/uio.c4
-rw-r--r--drivers/uio/uio_netx.c172
-rw-r--r--drivers/uio/uio_smx.c140
-rw-r--r--drivers/usb/core/driver.c4
-rw-r--r--drivers/usb/gadget/fsl_mx3_udc.c31
-rw-r--r--drivers/usb/gadget/pxa25x_udc.c4
-rw-r--r--drivers/usb/gadget/s3c-hsotg.c2
-rw-r--r--drivers/usb/musb/davinci.c2
-rw-r--r--drivers/usb/musb/musb_regs.h2
-rw-r--r--drivers/usb/serial/cypress_m8.c2
-rw-r--r--drivers/usb/serial/opticon.c2
-rw-r--r--drivers/usb/serial/symbolserial.c2
-rw-r--r--drivers/usb/wusbcore/wusbhc.h2
-rw-r--r--drivers/uwb/driver.c5
-rw-r--r--drivers/uwb/i1480/i1480-est.c4
-rw-r--r--drivers/uwb/umc-bus.c4
-rw-r--r--drivers/uwb/uwb-internal.h4
-rw-r--r--drivers/uwb/uwbd.c2
-rw-r--r--drivers/uwb/wlp/sysfs.c3
-rw-r--r--drivers/video/68328fb.c2
-rw-r--r--drivers/video/Kconfig39
-rw-r--r--drivers/video/Makefile2
-rw-r--r--drivers/video/acornfb.c2
-rw-r--r--drivers/video/arcfb.c2
-rw-r--r--drivers/video/asiliantfb.c4
-rw-r--r--drivers/video/bf54x-lq043fb.c30
-rw-r--r--drivers/video/bfin-lq035q1-fb.c1
-rw-r--r--drivers/video/bfin-t350mcqb-fb.c29
-rw-r--r--drivers/video/broadsheetfb.c738
-rw-r--r--drivers/video/cobalt_lcdfb.c2
-rw-r--r--drivers/video/efifb.c2
-rw-r--r--drivers/video/epson1355fb.c2
-rw-r--r--drivers/video/gbefb.c2
-rw-r--r--drivers/video/hgafb.c2
-rw-r--r--drivers/video/hitfb.c2
-rw-r--r--drivers/video/mb862xx/mb862xxfb.c13
-rw-r--r--drivers/video/mbx/mbxfb.c2
-rw-r--r--drivers/video/modedb.c8
-rw-r--r--drivers/video/nuc900fb.c779
-rw-r--r--drivers/video/nuc900fb.h55
-rw-r--r--drivers/video/omap/lcdc.c2
-rw-r--r--drivers/video/omap2/dss/manager.c2
-rw-r--r--drivers/video/omap2/dss/overlay.c2
-rw-r--r--drivers/video/pm2fb.c2
-rw-r--r--drivers/video/q40fb.c2
-rw-r--r--drivers/video/s1d13xxxfb.c4
-rw-r--r--drivers/video/s3c2410fb.c4
-rw-r--r--drivers/video/sa1100fb.c2
-rw-r--r--drivers/video/sgivwfb.c2
-rw-r--r--drivers/video/sh_mobile_lcdcfb.c2
-rw-r--r--drivers/video/sis/sis_main.c3
-rw-r--r--drivers/video/sm501fb.c2
-rw-r--r--drivers/video/sstfb.c2
-rw-r--r--drivers/video/sunxvr1000.c228
-rw-r--r--drivers/video/vesafb.c2
-rw-r--r--drivers/video/vfb.c2
-rw-r--r--drivers/video/vga16fb.c2
-rw-r--r--drivers/video/via/Makefile2
-rw-r--r--drivers/video/via/chip.h11
-rw-r--r--drivers/video/via/dvi.c233
-rw-r--r--drivers/video/via/dvi.h7
-rw-r--r--drivers/video/via/global.c5
-rw-r--r--drivers/video/via/global.h3
-rw-r--r--drivers/video/via/hw.c330
-rw-r--r--drivers/video/via/hw.h17
-rw-r--r--drivers/video/via/iface.c78
-rw-r--r--drivers/video/via/iface.h38
-rw-r--r--drivers/video/via/lcd.c640
-rw-r--r--drivers/video/via/share.h56
-rw-r--r--drivers/video/via/via_utility.c12
-rw-r--r--drivers/video/via/via_utility.h1
-rw-r--r--drivers/video/via/viafbdev.c518
-rw-r--r--drivers/video/via/viafbdev.h6
-rw-r--r--drivers/video/via/viamode.c180
-rw-r--r--drivers/video/via/viamode.h8
-rw-r--r--drivers/video/w100fb.c2
-rw-r--r--drivers/w1/masters/ds2482.c2
-rw-r--r--drivers/w1/masters/mxc_w1.c4
-rw-r--r--drivers/w1/masters/omap_hdq.c4
-rw-r--r--drivers/w1/w1.c4
-rw-r--r--drivers/watchdog/Kconfig20
-rw-r--r--drivers/watchdog/Makefile2
-rw-r--r--drivers/watchdog/acquirewdt.c2
-rw-r--r--drivers/watchdog/advantechwdt.c2
-rw-r--r--drivers/watchdog/adx_wdt.c2
-rw-r--r--drivers/watchdog/alim1535_wdt.c2
-rw-r--r--drivers/watchdog/alim7101_wdt.c2
-rw-r--r--drivers/watchdog/ar7_wdt.c2
-rw-r--r--drivers/watchdog/at32ap700x_wdt.c2
-rw-r--r--drivers/watchdog/at91rm9200_wdt.c2
-rw-r--r--drivers/watchdog/bcm47xx_wdt.c2
-rw-r--r--drivers/watchdog/bfin_wdt.c56
-rw-r--r--drivers/watchdog/booke_wdt.c2
-rw-r--r--drivers/watchdog/coh901327_wdt.c2
-rw-r--r--drivers/watchdog/cpu5wdt.c2
-rw-r--r--drivers/watchdog/cpwd.c2
-rw-r--r--drivers/watchdog/davinci_wdt.c2
-rw-r--r--drivers/watchdog/ep93xx_wdt.c2
-rw-r--r--drivers/watchdog/eurotechwdt.c2
-rw-r--r--drivers/watchdog/gef_wdt.c16
-rw-r--r--drivers/watchdog/geodewdt.c2
-rw-r--r--drivers/watchdog/hpwdt.c2
-rw-r--r--drivers/watchdog/i6300esb.c101
-rw-r--r--drivers/watchdog/iTCO_wdt.c21
-rw-r--r--drivers/watchdog/ib700wdt.c2
-rw-r--r--drivers/watchdog/indydog.c2
-rw-r--r--drivers/watchdog/it8712f_wdt.c2
-rw-r--r--drivers/watchdog/it87_wdt.c2
-rw-r--r--drivers/watchdog/ixp2000_wdt.c2
-rw-r--r--drivers/watchdog/ixp4xx_wdt.c2
-rw-r--r--drivers/watchdog/ks8695_wdt.c2
-rw-r--r--drivers/watchdog/machzwd.c2
-rw-r--r--drivers/watchdog/max63xx_wdt.c397
-rw-r--r--drivers/watchdog/mixcomwd.c2
-rw-r--r--drivers/watchdog/mpc8xxx_wdt.c2
-rw-r--r--drivers/watchdog/mpcore_wdt.c2
-rw-r--r--drivers/watchdog/mv64x60_wdt.c2
-rw-r--r--drivers/watchdog/pc87413_wdt.c2
-rw-r--r--drivers/watchdog/pcwd.c2
-rw-r--r--drivers/watchdog/pcwd_pci.c2
-rw-r--r--drivers/watchdog/pcwd_usb.c2
-rw-r--r--drivers/watchdog/pika_wdt.c2
-rw-r--r--drivers/watchdog/pnx833x_wdt.c2
-rw-r--r--drivers/watchdog/rc32434_wdt.c2
-rw-r--r--drivers/watchdog/rdc321x_wdt.c2
-rw-r--r--drivers/watchdog/riowd.c2
-rw-r--r--drivers/watchdog/sbc_fitpc2_wdt.c2
-rw-r--r--drivers/watchdog/sch311x_wdt.c2
-rw-r--r--drivers/watchdog/stmp3xxx_wdt.c2
-rw-r--r--drivers/watchdog/ts72xx_wdt.c520
-rw-r--r--drivers/watchdog/txx9wdt.c25
-rw-r--r--drivers/watchdog/w83627hf_wdt.c2
-rw-r--r--drivers/watchdog/w83977f_wdt.c2
-rw-r--r--drivers/watchdog/wdrtas.c2
-rw-r--r--drivers/watchdog/wdt.c2
-rw-r--r--drivers/watchdog/wdt_pci.c2
-rw-r--r--drivers/watchdog/wm831x_wdt.c2
-rw-r--r--drivers/watchdog/wm8350_wdt.c2
-rw-r--r--drivers/xen/sys-hypervisor.c2
-rw-r--r--drivers/zorro/zorro.ids2
-rw-r--r--firmware/bnx2x-e1-5.2.7.0.fw.ihex10178
-rw-r--r--firmware/bnx2x-e1h-5.2.7.0.fw.ihex12847
-rw-r--r--fs/9p/v9fs.h6
-rw-r--r--fs/9p/vfs_dir.c11
-rw-r--r--fs/9p/vfs_file.c4
-rw-r--r--fs/affs/bitmap.c2
-rw-r--r--fs/anon_inodes.c1
-rw-r--r--fs/binfmt_elf_fdpic.c2
-rw-r--r--fs/bio.c7
-rw-r--r--fs/btrfs/disk-io.c4
-rw-r--r--fs/btrfs/extent_io.c4
-rw-r--r--fs/btrfs/extent_map.c2
-rw-r--r--fs/btrfs/free-space-cache.c4
-rw-r--r--fs/btrfs/ordered-data.h2
-rw-r--r--fs/btrfs/ref-cache.h2
-rw-r--r--fs/btrfs/relocation.c4
-rw-r--r--fs/btrfs/super.c5
-rw-r--r--fs/btrfs/sysfs.c4
-rw-r--r--fs/btrfs/transaction.c2
-rw-r--r--fs/buffer.c15
-rw-r--r--fs/cifs/asn1.c2
-rw-r--r--fs/cifs/cifs_dfs_ref.c2
-rw-r--r--fs/cifs/cifssmb.c2
-rw-r--r--fs/compat.c18
-rw-r--r--fs/dlm/lockspace.c2
-rw-r--r--fs/dlm/member.c2
-rw-r--r--fs/ext3/super.c2
-rw-r--r--fs/ext4/mballoc.c2
-rw-r--r--fs/ext4/super.c4
-rw-r--r--fs/fat/inode.c2
-rw-r--r--fs/fat/namei_vfat.c27
-rw-r--r--fs/fscache/Kconfig1
-rw-r--r--fs/fuse/inode.c2
-rw-r--r--fs/gfs2/Kconfig1
-rw-r--r--fs/gfs2/file.c2
-rw-r--r--fs/gfs2/incore.h2
-rw-r--r--fs/gfs2/log.c3
-rw-r--r--fs/gfs2/ops_fstype.c2
-rw-r--r--fs/gfs2/sys.c4
-rw-r--r--fs/jbd/transaction.c2
-rw-r--r--fs/locks.c2
-rw-r--r--fs/mpage.c2
-rw-r--r--fs/namei.c2
-rw-r--r--fs/nfsd/nfs4xdr.c2
-rw-r--r--fs/nilfs2/alloc.h2
-rw-r--r--fs/nilfs2/dat.c2
-rw-r--r--fs/nilfs2/dir.c2
-rw-r--r--fs/nilfs2/gcinode.c4
-rw-r--r--fs/nilfs2/page.c4
-rw-r--r--fs/nilfs2/segbuf.c10
-rw-r--r--fs/nilfs2/segment.c8
-rw-r--r--fs/nilfs2/segment.h4
-rw-r--r--fs/nilfs2/sufile.c2
-rw-r--r--fs/nilfs2/super.c4
-rw-r--r--fs/nilfs2/the_nilfs.c2
-rw-r--r--fs/ntfs/ChangeLog1702
-rw-r--r--fs/ocfs2/cluster/masklog.c2
-rw-r--r--fs/ocfs2/cluster/tcp.c4
-rw-r--r--fs/ocfs2/dlmglue.c2
-rw-r--r--fs/ocfs2/extent_map.c2
-rw-r--r--fs/qnx4/inode.c3
-rw-r--r--fs/reiserfs/bitmap.c2
-rw-r--r--fs/select.c17
-rw-r--r--fs/sysfs/bin.c50
-rw-r--r--fs/sysfs/dir.c132
-rw-r--r--fs/sysfs/file.c47
-rw-r--r--fs/sysfs/inode.c13
-rw-r--r--fs/sysfs/mount.c4
-rw-r--r--fs/sysfs/symlink.c38
-rw-r--r--fs/sysfs/sysfs.h17
-rw-r--r--fs/udf/balloc.c49
-rw-r--r--fs/udf/inode.c36
-rw-r--r--fs/ufs/super.c3
-rw-r--r--fs/ufs/ufs_fs.h15
-rw-r--r--include/acpi/processor.h10
-rw-r--r--include/asm-generic/pci-dma-compat.h15
-rw-r--r--include/linux/acct.h3
-rw-r--r--include/linux/cgroup.h53
-rw-r--r--include/linux/compat.h3
-rw-r--r--include/linux/coredump.h10
-rw-r--r--include/linux/cred.h2
-rw-r--r--include/linux/decompress/mm.h14
-rw-r--r--include/linux/device.h40
-rw-r--r--include/linux/dm9000.h2
-rw-r--r--include/linux/dma-mapping.h24
-rw-r--r--include/linux/ethtool.h24
-rw-r--r--include/linux/hil.h16
-rw-r--r--include/linux/hw_breakpoint.h8
-rw-r--r--include/linux/i2c-algo-bit.h2
-rw-r--r--include/linux/i2c-xiic.h43
-rw-r--r--include/linux/init_task.h8
-rw-r--r--include/linux/input.h20
-rw-r--r--include/linux/iocontext.h2
-rw-r--r--include/linux/ioport.h18
-rw-r--r--include/linux/ipc_namespace.h5
-rw-r--r--include/linux/ipmi_smi.h1
-rw-r--r--include/linux/kmod.h1
-rw-r--r--include/linux/kobject.h14
-rw-r--r--include/linux/lockdep.h4
-rw-r--r--include/linux/lru_cache.h2
-rw-r--r--include/linux/memcontrol.h6
-rw-r--r--include/linux/mm.h8
-rw-r--r--include/linux/mm_types.h2
-rw-r--r--include/linux/mmzone.h2
-rw-r--r--include/linux/module.h1
-rw-r--r--include/linux/msdos_fs.h3
-rw-r--r--include/linux/nodemask.h2
-rw-r--r--include/linux/page_cgroup.h2
-rw-r--r--include/linux/pci-dma.h11
-rw-r--r--include/linux/pci.h3
-rw-r--r--include/linux/perf_event.h27
-rw-r--r--include/linux/platform_device.h9
-rw-r--r--include/linux/poll.h2
-rw-r--r--include/linux/power_supply.h1
-rw-r--r--include/linux/ptrace.h5
-rw-r--r--include/linux/rbtree.h8
-rw-r--r--include/linux/rcupdate.h49
-rw-r--r--include/linux/reboot.h1
-rw-r--r--include/linux/rfkill.h2
-rw-r--r--include/linux/rtc.h6
-rw-r--r--include/linux/rtmutex.h2
-rw-r--r--include/linux/rwlock.h20
-rw-r--r--include/linux/sched.h8
-rw-r--r--include/linux/serial_core.h11
-rw-r--r--include/linux/signal.h2
-rw-r--r--include/linux/snmp.h2
-rw-r--r--include/linux/spi/ads7846.h3
-rw-r--r--include/linux/spinlock.h13
-rw-r--r--include/linux/swap.h9
-rw-r--r--include/linux/syscalls.h11
-rw-r--r--include/linux/sysdev.h21
-rw-r--r--include/linux/sysfs.h61
-rw-r--r--include/linux/taskstats_kern.h7
-rw-r--r--include/linux/tty.h1
-rw-r--r--include/linux/tty_ldisc.h8
-rw-r--r--include/linux/usb.h6
-rw-r--r--include/linux/usb/audio.h2
-rw-r--r--include/linux/virtio.h1
-rw-r--r--include/linux/virtio_9p.h12
-rw-r--r--include/math-emu/op-common.h2
-rw-r--r--include/media/davinci/vpfe_capture.h2
-rw-r--r--include/net/9p/client.h4
-rw-r--r--include/net/ip6_route.h18
-rw-r--r--include/net/ip6_tunnel.h1
-rw-r--r--include/net/irda/irttp.h2
-rw-r--r--include/net/mac80211.h3
-rw-r--r--include/net/net_namespace.h5
-rw-r--r--include/net/sock.h17
-rw-r--r--include/net/tcp.h2
-rw-r--r--include/net/xfrm.h3
-rw-r--r--include/scsi/sg.h3
-rw-r--r--include/sound/asound.h2
-rw-r--r--include/trace/ftrace.h4
-rw-r--r--include/video/broadsheetfb.h23
-rw-r--r--init/Kconfig1
-rw-r--r--ipc/Makefile2
-rw-r--r--ipc/mqueue.c2
-rw-r--r--ipc/shm.c3
-rw-r--r--ipc/syscall.c99
-rw-r--r--kernel/acct.c10
-rw-r--r--kernel/audit.c2
-rw-r--r--kernel/cgroup.c693
-rw-r--r--kernel/exit.c2
-rw-r--r--kernel/fork.c47
-rw-r--r--kernel/hw_breakpoint.c11
-rw-r--r--kernel/irq/chip.c2
-rw-r--r--kernel/irq/devres.c4
-rw-r--r--kernel/ksysfs.c2
-rw-r--r--kernel/lockdep.c1
-rw-r--r--kernel/module.c3
-rw-r--r--kernel/nsproxy.c13
-rw-r--r--kernel/params.c11
-rw-r--r--kernel/perf_event.c49
-rw-r--r--kernel/pid.c4
-rw-r--r--kernel/pid_namespace.c7
-rw-r--r--kernel/rcutree.h21
-rw-r--r--kernel/rcutree_plugin.h8
-rw-r--r--kernel/sched.c8
-rw-r--r--kernel/sched_cpupri.c2
-rw-r--r--kernel/sched_fair.c2
-rw-r--r--kernel/sched_rt.c7
-rw-r--r--kernel/sys.c67
-rw-r--r--kernel/sys_ni.c1
-rw-r--r--kernel/sysctl.c37
-rw-r--r--kernel/time/clocksource.c4
-rw-r--r--kernel/trace/ftrace.c30
-rw-r--r--kernel/trace/ring_buffer.c16
-rw-r--r--kernel/trace/trace.c49
-rw-r--r--kernel/trace/trace.h5
-rw-r--r--kernel/trace/trace_clock.c1
-rw-r--r--kernel/trace/trace_event_profile.c4
-rw-r--r--kernel/trace/trace_functions_graph.c27
-rw-r--r--lib/Kconfig.debug8
-rw-r--r--lib/kobject.c6
-rw-r--r--lib/kobject_uevent.c2
-rw-r--r--lib/vsprintf.c13
-rw-r--r--lib/zlib_inflate/inffast.c72
-rw-r--r--mm/highmem.c2
-rw-r--r--mm/memcontrol.c1386
-rw-r--r--mm/memory.c11
-rw-r--r--mm/memory_hotplug.c6
-rw-r--r--mm/mempolicy.c2
-rw-r--r--mm/mmap.c24
-rw-r--r--mm/nommu.c24
-rw-r--r--mm/oom_kill.c10
-rw-r--r--mm/page_alloc.c85
-rw-r--r--mm/page_cgroup.c34
-rw-r--r--mm/slub.c6
-rw-r--r--mm/swapfile.c31
-rw-r--r--net/9p/client.c16
-rw-r--r--net/9p/trans_virtio.c64
-rw-r--r--net/bluetooth/hci_sysfs.c41
-rw-r--r--net/bluetooth/l2cap.c4
-rw-r--r--net/bluetooth/rfcomm/core.c4
-rw-r--r--net/bluetooth/rfcomm/sock.c4
-rw-r--r--net/bluetooth/sco.c4
-rw-r--r--net/bridge/Kconfig1
-rw-r--r--net/bridge/br_multicast.c19
-rw-r--r--net/bridge/br_private.h2
-rw-r--r--net/bridge/br_sysfs_if.c2
-rw-r--r--net/core/dev_mcast.c5
-rw-r--r--net/core/ethtool.c103
-rw-r--r--net/core/neighbour.c2
-rw-r--r--net/core/sock.c19
-rw-r--r--net/dccp/minisocks.c2
-rw-r--r--net/ipv4/ip_gre.c7
-rw-r--r--net/ipv4/ipconfig.c57
-rw-r--r--net/ipv4/proc.c2
-rw-r--r--net/ipv4/route.c50
-rw-r--r--net/ipv4/tcp_ipv4.c15
-rw-r--r--net/ipv4/tcp_minisocks.c2
-rw-r--r--net/ipv4/tcp_output.c18
-rw-r--r--net/ipv4/tcp_timer.c2
-rw-r--r--net/ipv4/udp.c6
-rw-r--r--net/ipv4/xfrm4_policy.c5
-rw-r--r--net/ipv6/addrconf.c104
-rw-r--r--net/ipv6/fib6_rules.c11
-rw-r--r--net/ipv6/route.c11
-rw-r--r--net/ipv6/tcp_ipv6.c7
-rw-r--r--net/ipv6/udp.c28
-rw-r--r--net/ipv6/xfrm6_policy.c3
-rw-r--r--net/llc/llc_c_ac.c2
-rw-r--r--net/llc/llc_conn.c3
-rw-r--r--net/mac80211/debugfs_netdev.c10
-rw-r--r--net/mac80211/mesh_plink.c2
-rw-r--r--net/mac80211/mlme.c32
-rw-r--r--net/mac80211/rate.h5
-rw-r--r--net/mac80211/sta_info.c1
-rw-r--r--net/netfilter/nf_conntrack_sip.c4
-rw-r--r--net/netfilter/xt_hashlimit.c2
-rw-r--r--net/packet/af_packet.c6
-rw-r--r--net/rfkill/input.c8
-rw-r--r--net/sctp/input.c42
-rw-r--r--net/sctp/sm_sideeffect.c2
-rw-r--r--net/sctp/socket.c3
-rw-r--r--net/sunrpc/xprtrdma/transport.c7
-rw-r--r--net/sunrpc/xprtsock.c9
-rw-r--r--net/tipc/bearer.c37
-rw-r--r--net/tipc/bearer.h2
-rw-r--r--net/tipc/link.c9
-rw-r--r--net/tipc/net.c25
-rw-r--r--net/tipc/socket.c6
-rw-r--r--net/tipc/subscr.c57
-rw-r--r--net/tipc/subscr.h2
-rw-r--r--net/x25/x25_dev.c2
-rw-r--r--net/xfrm/xfrm_policy.c7
-rw-r--r--samples/hw_breakpoint/data_breakpoint.c6
-rw-r--r--samples/kobject/kobject-example.c4
-rw-r--r--samples/kobject/kset-example.c6
-rw-r--r--scripts/gfp-translate2
-rwxr-xr-xscripts/kernel-doc2
-rw-r--r--security/selinux/avc.c6
-rw-r--r--security/tomoyo/common.c1
-rw-r--r--sound/arm/pxa2xx-ac97-lib.c68
-rw-r--r--sound/core/timer.c2
-rw-r--r--sound/isa/opti9xx/miro.c2
-rw-r--r--sound/isa/opti9xx/opti92x-ad1848.c121
-rw-r--r--sound/isa/sb/jazz16.c1
-rw-r--r--sound/oss/coproc.h2
-rw-r--r--sound/oss/v_midi.h5
-rw-r--r--sound/pci/hda/Kconfig2
-rw-r--r--sound/pci/hda/Makefile4
-rw-r--r--sound/pci/hda/hda_codec.c69
-rw-r--r--sound/pci/hda/hda_eld.c6
-rw-r--r--sound/pci/hda/hda_intel.c10
-rw-r--r--sound/pci/hda/patch_hdmi.c849
-rw-r--r--sound/pci/hda/patch_intelhdmi.c821
-rw-r--r--sound/pci/hda/patch_nvhdmi.c275
-rw-r--r--sound/pci/hda/patch_realtek.c18
-rw-r--r--sound/pci/oxygen/xonar_wm87x6.c2
-rw-r--r--sound/pci/riptide/riptide.c6
-rw-r--r--sound/pci/rme9652/hdspm.c2
-rw-r--r--sound/soc/codecs/ak4104.c6
-rw-r--r--sound/soc/codecs/wm8990.c2
-rw-r--r--sound/soc/pxa/pxa-ssp.c93
-rw-r--r--sound/soc/s3c24xx/s3c64xx-i2s.c4
-rw-r--r--sound/soc/soc-core.c14
-rw-r--r--sound/usb/Kconfig6
-rw-r--r--sound/usb/caiaq/midi.h2
-rw-r--r--sound/usb/ua101.c100
-rw-r--r--sound/usb/usbaudio.c57
-rw-r--r--sound/usb/usbaudio.h3
-rw-r--r--sound/usb/usbquirks.h30
-rw-r--r--tools/perf/Documentation/perf-lock.txt29
-rw-r--r--tools/perf/builtin-lock.c148
-rw-r--r--tools/perf/builtin-trace.c4
-rw-r--r--tools/perf/command-list.txt1
-rw-r--r--tools/perf/perf-archive.sh3
-rw-r--r--tools/perf/perf.c2
-rw-r--r--tools/perf/perf.h4
-rw-r--r--tools/perf/util/hist.c2
-rw-r--r--tools/perf/util/probe-event.c2
1756 files changed, 63811 insertions, 49229 deletions
diff --git a/.gitignore b/.gitignore
index efab0ebec859..a2939fc10b22 100644
--- a/.gitignore
+++ b/.gitignore
@@ -34,14 +34,18 @@ modules.builtin
34# 34#
35# Top-level generic files 35# Top-level generic files
36# 36#
37tags 37/tags
38TAGS 38/TAGS
39linux 39/linux
40vmlinux 40/vmlinux
41vmlinuz 41/vmlinuz
42System.map 42/System.map
43Module.markers 43/Module.markers
44Module.symvers 44/Module.symvers
45
46#
47# git files that we don't want to ignore even it they are dot-files
48#
45!.gitignore 49!.gitignore
46!.mailmap 50!.mailmap
47 51
diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt
index 5aceb88b3f8b..05e2ae236865 100644
--- a/Documentation/DMA-API.txt
+++ b/Documentation/DMA-API.txt
@@ -4,20 +4,18 @@
4 James E.J. Bottomley <James.Bottomley@HansenPartnership.com> 4 James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
5 5
6This document describes the DMA API. For a more gentle introduction 6This document describes the DMA API. For a more gentle introduction
7phrased in terms of the pci_ equivalents (and actual examples) see 7of the API (and actual examples) see
8Documentation/PCI/PCI-DMA-mapping.txt. 8Documentation/DMA-API-HOWTO.txt.
9 9
10This API is split into two pieces. Part I describes the API and the 10This API is split into two pieces. Part I describes the API. Part II
11corresponding pci_ API. Part II describes the extensions to the API 11describes the extensions to the API for supporting non-consistent
12for supporting non-consistent memory machines. Unless you know that 12memory machines. Unless you know that your driver absolutely has to
13your driver absolutely has to support non-consistent platforms (this 13support non-consistent platforms (this is usually only legacy
14is usually only legacy platforms) you should only use the API 14platforms) you should only use the API described in part I.
15described in part I.
16 15
17Part I - pci_ and dma_ Equivalent API 16Part I - dma_ API
18------------------------------------- 17-------------------------------------
19 18
20To get the pci_ API, you must #include <linux/pci.h>
21To get the dma_ API, you must #include <linux/dma-mapping.h> 19To get the dma_ API, you must #include <linux/dma-mapping.h>
22 20
23 21
@@ -27,9 +25,6 @@ Part Ia - Using large dma-coherent buffers
27void * 25void *
28dma_alloc_coherent(struct device *dev, size_t size, 26dma_alloc_coherent(struct device *dev, size_t size,
29 dma_addr_t *dma_handle, gfp_t flag) 27 dma_addr_t *dma_handle, gfp_t flag)
30void *
31pci_alloc_consistent(struct pci_dev *dev, size_t size,
32 dma_addr_t *dma_handle)
33 28
34Consistent memory is memory for which a write by either the device or 29Consistent memory is memory for which a write by either the device or
35the processor can immediately be read by the processor or device 30the processor can immediately be read by the processor or device
@@ -53,15 +48,11 @@ The simplest way to do that is to use the dma_pool calls (see below).
53The flag parameter (dma_alloc_coherent only) allows the caller to 48The flag parameter (dma_alloc_coherent only) allows the caller to
54specify the GFP_ flags (see kmalloc) for the allocation (the 49specify the GFP_ flags (see kmalloc) for the allocation (the
55implementation may choose to ignore flags that affect the location of 50implementation may choose to ignore flags that affect the location of
56the returned memory, like GFP_DMA). For pci_alloc_consistent, you 51the returned memory, like GFP_DMA).
57must assume GFP_ATOMIC behaviour.
58 52
59void 53void
60dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 54dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
61 dma_addr_t dma_handle) 55 dma_addr_t dma_handle)
62void
63pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr,
64 dma_addr_t dma_handle)
65 56
66Free the region of consistent memory you previously allocated. dev, 57Free the region of consistent memory you previously allocated. dev,
67size and dma_handle must all be the same as those passed into the 58size and dma_handle must all be the same as those passed into the
@@ -89,10 +80,6 @@ for alignment, like queue heads needing to be aligned on N-byte boundaries.
89 dma_pool_create(const char *name, struct device *dev, 80 dma_pool_create(const char *name, struct device *dev,
90 size_t size, size_t align, size_t alloc); 81 size_t size, size_t align, size_t alloc);
91 82
92 struct pci_pool *
93 pci_pool_create(const char *name, struct pci_device *dev,
94 size_t size, size_t align, size_t alloc);
95
96The pool create() routines initialize a pool of dma-coherent buffers 83The pool create() routines initialize a pool of dma-coherent buffers
97for use with a given device. It must be called in a context which 84for use with a given device. It must be called in a context which
98can sleep. 85can sleep.
@@ -108,9 +95,6 @@ from this pool must not cross 4KByte boundaries.
108 void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags, 95 void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
109 dma_addr_t *dma_handle); 96 dma_addr_t *dma_handle);
110 97
111 void *pci_pool_alloc(struct pci_pool *pool, gfp_t gfp_flags,
112 dma_addr_t *dma_handle);
113
114This allocates memory from the pool; the returned memory will meet the size 98This allocates memory from the pool; the returned memory will meet the size
115and alignment requirements specified at creation time. Pass GFP_ATOMIC to 99and alignment requirements specified at creation time. Pass GFP_ATOMIC to
116prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks), 100prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks),
@@ -122,9 +106,6 @@ pool's device.
122 void dma_pool_free(struct dma_pool *pool, void *vaddr, 106 void dma_pool_free(struct dma_pool *pool, void *vaddr,
123 dma_addr_t addr); 107 dma_addr_t addr);
124 108
125 void pci_pool_free(struct pci_pool *pool, void *vaddr,
126 dma_addr_t addr);
127
128This puts memory back into the pool. The pool is what was passed to 109This puts memory back into the pool. The pool is what was passed to
129the pool allocation routine; the cpu (vaddr) and dma addresses are what 110the pool allocation routine; the cpu (vaddr) and dma addresses are what
130were returned when that routine allocated the memory being freed. 111were returned when that routine allocated the memory being freed.
@@ -132,8 +113,6 @@ were returned when that routine allocated the memory being freed.
132 113
133 void dma_pool_destroy(struct dma_pool *pool); 114 void dma_pool_destroy(struct dma_pool *pool);
134 115
135 void pci_pool_destroy(struct pci_pool *pool);
136
137The pool destroy() routines free the resources of the pool. They must be 116The pool destroy() routines free the resources of the pool. They must be
138called in a context which can sleep. Make sure you've freed all allocated 117called in a context which can sleep. Make sure you've freed all allocated
139memory back to the pool before you destroy it. 118memory back to the pool before you destroy it.
@@ -144,8 +123,6 @@ Part Ic - DMA addressing limitations
144 123
145int 124int
146dma_supported(struct device *dev, u64 mask) 125dma_supported(struct device *dev, u64 mask)
147int
148pci_dma_supported(struct pci_dev *hwdev, u64 mask)
149 126
150Checks to see if the device can support DMA to the memory described by 127Checks to see if the device can support DMA to the memory described by
151mask. 128mask.
@@ -159,8 +136,14 @@ driver writers.
159 136
160int 137int
161dma_set_mask(struct device *dev, u64 mask) 138dma_set_mask(struct device *dev, u64 mask)
139
140Checks to see if the mask is possible and updates the device
141parameters if it is.
142
143Returns: 0 if successful and a negative error if not.
144
162int 145int
163pci_set_dma_mask(struct pci_device *dev, u64 mask) 146dma_set_coherent_mask(struct device *dev, u64 mask)
164 147
165Checks to see if the mask is possible and updates the device 148Checks to see if the mask is possible and updates the device
166parameters if it is. 149parameters if it is.
@@ -187,9 +170,6 @@ Part Id - Streaming DMA mappings
187dma_addr_t 170dma_addr_t
188dma_map_single(struct device *dev, void *cpu_addr, size_t size, 171dma_map_single(struct device *dev, void *cpu_addr, size_t size,
189 enum dma_data_direction direction) 172 enum dma_data_direction direction)
190dma_addr_t
191pci_map_single(struct pci_dev *hwdev, void *cpu_addr, size_t size,
192 int direction)
193 173
194Maps a piece of processor virtual memory so it can be accessed by the 174Maps a piece of processor virtual memory so it can be accessed by the
195device and returns the physical handle of the memory. 175device and returns the physical handle of the memory.
@@ -198,14 +178,10 @@ The direction for both api's may be converted freely by casting.
198However the dma_ API uses a strongly typed enumerator for its 178However the dma_ API uses a strongly typed enumerator for its
199direction: 179direction:
200 180
201DMA_NONE = PCI_DMA_NONE no direction (used for 181DMA_NONE no direction (used for debugging)
202 debugging) 182DMA_TO_DEVICE data is going from the memory to the device
203DMA_TO_DEVICE = PCI_DMA_TODEVICE data is going from the 183DMA_FROM_DEVICE data is coming from the device to the memory
204 memory to the device 184DMA_BIDIRECTIONAL direction isn't known
205DMA_FROM_DEVICE = PCI_DMA_FROMDEVICE data is coming from
206 the device to the
207 memory
208DMA_BIDIRECTIONAL = PCI_DMA_BIDIRECTIONAL direction isn't known
209 185
210Notes: Not all memory regions in a machine can be mapped by this 186Notes: Not all memory regions in a machine can be mapped by this
211API. Further, regions that appear to be physically contiguous in 187API. Further, regions that appear to be physically contiguous in
@@ -268,9 +244,6 @@ cache lines are updated with data that the device may have changed).
268void 244void
269dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 245dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
270 enum dma_data_direction direction) 246 enum dma_data_direction direction)
271void
272pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
273 size_t size, int direction)
274 247
275Unmaps the region previously mapped. All the parameters passed in 248Unmaps the region previously mapped. All the parameters passed in
276must be identical to those passed in (and returned) by the mapping 249must be identical to those passed in (and returned) by the mapping
@@ -280,15 +253,9 @@ dma_addr_t
280dma_map_page(struct device *dev, struct page *page, 253dma_map_page(struct device *dev, struct page *page,
281 unsigned long offset, size_t size, 254 unsigned long offset, size_t size,
282 enum dma_data_direction direction) 255 enum dma_data_direction direction)
283dma_addr_t
284pci_map_page(struct pci_dev *hwdev, struct page *page,
285 unsigned long offset, size_t size, int direction)
286void 256void
287dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, 257dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
288 enum dma_data_direction direction) 258 enum dma_data_direction direction)
289void
290pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
291 size_t size, int direction)
292 259
293API for mapping and unmapping for pages. All the notes and warnings 260API for mapping and unmapping for pages. All the notes and warnings
294for the other mapping APIs apply here. Also, although the <offset> 261for the other mapping APIs apply here. Also, although the <offset>
@@ -299,9 +266,6 @@ cache width is.
299int 266int
300dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 267dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
301 268
302int
303pci_dma_mapping_error(struct pci_dev *hwdev, dma_addr_t dma_addr)
304
305In some circumstances dma_map_single and dma_map_page will fail to create 269In some circumstances dma_map_single and dma_map_page will fail to create
306a mapping. A driver can check for these errors by testing the returned 270a mapping. A driver can check for these errors by testing the returned
307dma address with dma_mapping_error(). A non-zero return value means the mapping 271dma address with dma_mapping_error(). A non-zero return value means the mapping
@@ -311,9 +275,6 @@ reduce current DMA mapping usage or delay and try again later).
311 int 275 int
312 dma_map_sg(struct device *dev, struct scatterlist *sg, 276 dma_map_sg(struct device *dev, struct scatterlist *sg,
313 int nents, enum dma_data_direction direction) 277 int nents, enum dma_data_direction direction)
314 int
315 pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
316 int nents, int direction)
317 278
318Returns: the number of physical segments mapped (this may be shorter 279Returns: the number of physical segments mapped (this may be shorter
319than <nents> passed in if some elements of the scatter/gather list are 280than <nents> passed in if some elements of the scatter/gather list are
@@ -353,9 +314,6 @@ accessed sg->address and sg->length as shown above.
353 void 314 void
354 dma_unmap_sg(struct device *dev, struct scatterlist *sg, 315 dma_unmap_sg(struct device *dev, struct scatterlist *sg,
355 int nhwentries, enum dma_data_direction direction) 316 int nhwentries, enum dma_data_direction direction)
356 void
357 pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
358 int nents, int direction)
359 317
360Unmap the previously mapped scatter/gather list. All the parameters 318Unmap the previously mapped scatter/gather list. All the parameters
361must be the same as those and passed in to the scatter/gather mapping 319must be the same as those and passed in to the scatter/gather mapping
@@ -365,21 +323,23 @@ Note: <nents> must be the number you passed in, *not* the number of
365physical entries returned. 323physical entries returned.
366 324
367void 325void
368dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size, 326dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
369 enum dma_data_direction direction) 327 enum dma_data_direction direction)
370void 328void
371pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, 329dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
372 size_t size, int direction) 330 enum dma_data_direction direction)
373void 331void
374dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, 332dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
375 enum dma_data_direction direction) 333 enum dma_data_direction direction)
376void 334void
377pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, 335dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
378 int nelems, int direction) 336 enum dma_data_direction direction)
379 337
380Synchronise a single contiguous or scatter/gather mapping. All the 338Synchronise a single contiguous or scatter/gather mapping for the cpu
381parameters must be the same as those passed into the single mapping 339and device. With the sync_sg API, all the parameters must be the same
382API. 340as those passed into the single mapping API. With the sync_single API,
341you can use dma_handle and size parameters that aren't identical to
342those passed into the single mapping API to do a partial sync.
383 343
384Notes: You must do this: 344Notes: You must do this:
385 345
@@ -461,9 +421,9 @@ void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr,
461Part II - Advanced dma_ usage 421Part II - Advanced dma_ usage
462----------------------------- 422-----------------------------
463 423
464Warning: These pieces of the DMA API have no PCI equivalent. They 424Warning: These pieces of the DMA API should not be used in the
465should also not be used in the majority of cases, since they cater for 425majority of cases, since they cater for unlikely corner cases that
466unlikely corner cases that don't belong in usual drivers. 426don't belong in usual drivers.
467 427
468If you don't understand how cache line coherency works between a 428If you don't understand how cache line coherency works between a
469processor and an I/O device, you should not be using this part of the 429processor and an I/O device, you should not be using this part of the
@@ -514,16 +474,6 @@ into the width returned by this call. It will also always be a power
514of two for easy alignment. 474of two for easy alignment.
515 475
516void 476void
517dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
518 unsigned long offset, size_t size,
519 enum dma_data_direction direction)
520
521Does a partial sync, starting at offset and continuing for size. You
522must be careful to observe the cache alignment and width when doing
523anything like this. You must also be extra careful about accessing
524memory you intend to sync partially.
525
526void
527dma_cache_sync(struct device *dev, void *vaddr, size_t size, 477dma_cache_sync(struct device *dev, void *vaddr, size_t size,
528 enum dma_data_direction direction) 478 enum dma_data_direction direction)
529 479
diff --git a/Documentation/DocBook/mtdnand.tmpl b/Documentation/DocBook/mtdnand.tmpl
index 5e7d84b48505..133cd6c3f3c1 100644
--- a/Documentation/DocBook/mtdnand.tmpl
+++ b/Documentation/DocBook/mtdnand.tmpl
@@ -488,7 +488,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
488 The ECC bytes must be placed immidiately after the data 488 The ECC bytes must be placed immidiately after the data
489 bytes in order to make the syndrome generator work. This 489 bytes in order to make the syndrome generator work. This
490 is contrary to the usual layout used by software ECC. The 490 is contrary to the usual layout used by software ECC. The
491 seperation of data and out of band area is not longer 491 separation of data and out of band area is not longer
492 possible. The nand driver code handles this layout and 492 possible. The nand driver code handles this layout and
493 the remaining free bytes in the oob area are managed by 493 the remaining free bytes in the oob area are managed by
494 the autoplacement code. Provide a matching oob-layout 494 the autoplacement code. Provide a matching oob-layout
@@ -560,7 +560,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
560 bad blocks. They have factory marked good blocks. The marker pattern 560 bad blocks. They have factory marked good blocks. The marker pattern
561 is erased when the block is erased to be reused. So in case of 561 is erased when the block is erased to be reused. So in case of
562 powerloss before writing the pattern back to the chip this block 562 powerloss before writing the pattern back to the chip this block
563 would be lost and added to the bad blocks. Therefor we scan the 563 would be lost and added to the bad blocks. Therefore we scan the
564 chip(s) when we detect them the first time for good blocks and 564 chip(s) when we detect them the first time for good blocks and
565 store this information in a bad block table before erasing any 565 store this information in a bad block table before erasing any
566 of the blocks. 566 of the blocks.
@@ -1094,7 +1094,7 @@ in this page</entry>
1094 manufacturers specifications. This applies similar to the spare area. 1094 manufacturers specifications. This applies similar to the spare area.
1095 </para> 1095 </para>
1096 <para> 1096 <para>
1097 Therefor NAND aware filesystems must either write in page size chunks 1097 Therefore NAND aware filesystems must either write in page size chunks
1098 or hold a writebuffer to collect smaller writes until they sum up to 1098 or hold a writebuffer to collect smaller writes until they sum up to
1099 pagesize. Available NAND aware filesystems: JFFS2, YAFFS. 1099 pagesize. Available NAND aware filesystems: JFFS2, YAFFS.
1100 </para> 1100 </para>
diff --git a/Documentation/DocBook/v4l/common.xml b/Documentation/DocBook/v4l/common.xml
index c65f0ac9b6ee..cea23e1c4fc6 100644
--- a/Documentation/DocBook/v4l/common.xml
+++ b/Documentation/DocBook/v4l/common.xml
@@ -1170,7 +1170,7 @@ frames per second. If less than this number of frames is to be
1170captured or output, applications can request frame skipping or 1170captured or output, applications can request frame skipping or
1171duplicating on the driver side. This is especially useful when using 1171duplicating on the driver side. This is especially useful when using
1172the &func-read; or &func-write;, which are not augmented by timestamps 1172the &func-read; or &func-write;, which are not augmented by timestamps
1173or sequence counters, and to avoid unneccessary data copying.</para> 1173or sequence counters, and to avoid unnecessary data copying.</para>
1174 1174
1175 <para>Finally these ioctls can be used to determine the number of 1175 <para>Finally these ioctls can be used to determine the number of
1176buffers used internally by a driver in read/write mode. For 1176buffers used internally by a driver in read/write mode. For
diff --git a/Documentation/DocBook/v4l/vidioc-g-parm.xml b/Documentation/DocBook/v4l/vidioc-g-parm.xml
index 78332d365ce9..392aa9e5571e 100644
--- a/Documentation/DocBook/v4l/vidioc-g-parm.xml
+++ b/Documentation/DocBook/v4l/vidioc-g-parm.xml
@@ -55,7 +55,7 @@ captured or output, applications can request frame skipping or
55duplicating on the driver side. This is especially useful when using 55duplicating on the driver side. This is especially useful when using
56the <function>read()</function> or <function>write()</function>, which 56the <function>read()</function> or <function>write()</function>, which
57are not augmented by timestamps or sequence counters, and to avoid 57are not augmented by timestamps or sequence counters, and to avoid
58unneccessary data copying.</para> 58unnecessary data copying.</para>
59 59
60 <para>Further these ioctls can be used to determine the number of 60 <para>Further these ioctls can be used to determine the number of
61buffers used internally by a driver in read/write mode. For 61buffers used internally by a driver in read/write mode. For
diff --git a/Documentation/HOWTO b/Documentation/HOWTO
index 8495fc970391..f5395af88a41 100644
--- a/Documentation/HOWTO
+++ b/Documentation/HOWTO
@@ -221,8 +221,8 @@ branches. These different branches are:
221 - main 2.6.x kernel tree 221 - main 2.6.x kernel tree
222 - 2.6.x.y -stable kernel tree 222 - 2.6.x.y -stable kernel tree
223 - 2.6.x -git kernel patches 223 - 2.6.x -git kernel patches
224 - 2.6.x -mm kernel patches
225 - subsystem specific kernel trees and patches 224 - subsystem specific kernel trees and patches
225 - the 2.6.x -next kernel tree for integration tests
226 226
2272.6.x kernel tree 2272.6.x kernel tree
228----------------- 228-----------------
@@ -232,7 +232,7 @@ process is as follows:
232 - As soon as a new kernel is released a two weeks window is open, 232 - As soon as a new kernel is released a two weeks window is open,
233 during this period of time maintainers can submit big diffs to 233 during this period of time maintainers can submit big diffs to
234 Linus, usually the patches that have already been included in the 234 Linus, usually the patches that have already been included in the
235 -mm kernel for a few weeks. The preferred way to submit big changes 235 -next kernel for a few weeks. The preferred way to submit big changes
236 is using git (the kernel's source management tool, more information 236 is using git (the kernel's source management tool, more information
237 can be found at http://git.or.cz/) but plain patches are also just 237 can be found at http://git.or.cz/) but plain patches are also just
238 fine. 238 fine.
@@ -293,84 +293,43 @@ daily and represent the current state of Linus' tree. They are more
293experimental than -rc kernels since they are generated automatically 293experimental than -rc kernels since they are generated automatically
294without even a cursory glance to see if they are sane. 294without even a cursory glance to see if they are sane.
295 295
2962.6.x -mm kernel patches
297------------------------
298These are experimental kernel patches released by Andrew Morton. Andrew
299takes all of the different subsystem kernel trees and patches and mushes
300them together, along with a lot of patches that have been plucked from
301the linux-kernel mailing list. This tree serves as a proving ground for
302new features and patches. Once a patch has proved its worth in -mm for
303a while Andrew or the subsystem maintainer pushes it on to Linus for
304inclusion in mainline.
305
306It is heavily encouraged that all new patches get tested in the -mm tree
307before they are sent to Linus for inclusion in the main kernel tree. Code
308which does not make an appearance in -mm before the opening of the merge
309window will prove hard to merge into the mainline.
310
311These kernels are not appropriate for use on systems that are supposed
312to be stable and they are more risky to run than any of the other
313branches.
314
315If you wish to help out with the kernel development process, please test
316and use these kernel releases and provide feedback to the linux-kernel
317mailing list if you have any problems, and if everything works properly.
318
319In addition to all the other experimental patches, these kernels usually
320also contain any changes in the mainline -git kernels available at the
321time of release.
322
323The -mm kernels are not released on a fixed schedule, but usually a few
324-mm kernels are released in between each -rc kernel (1 to 3 is common).
325
326Subsystem Specific kernel trees and patches 296Subsystem Specific kernel trees and patches
327------------------------------------------- 297-------------------------------------------
328A number of the different kernel subsystem developers expose their 298The maintainers of the various kernel subsystems --- and also many
329development trees so that others can see what is happening in the 299kernel subsystem developers --- expose their current state of
330different areas of the kernel. These trees are pulled into the -mm 300development in source repositories. That way, others can see what is
331kernel releases as described above. 301happening in the different areas of the kernel. In areas where
332 302development is rapid, a developer may be asked to base his submissions
333Here is a list of some of the different kernel trees available: 303onto such a subsystem kernel tree so that conflicts between the
334 git trees: 304submission and other already ongoing work are avoided.
335 - Kbuild development tree, Sam Ravnborg <sam@ravnborg.org> 305
336 git.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild.git 306Most of these repositories are git trees, but there are also other SCMs
337 307in use, or patch queues being published as quilt series. Addresses of
338 - ACPI development tree, Len Brown <len.brown@intel.com> 308these subsystem repositories are listed in the MAINTAINERS file. Many
339 git.kernel.org:/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6.git 309of them can be browsed at http://git.kernel.org/.
340 310
341 - Block development tree, Jens Axboe <jens.axboe@oracle.com> 311Before a proposed patch is committed to such a subsystem tree, it is
342 git.kernel.org:/pub/scm/linux/kernel/git/axboe/linux-2.6-block.git 312subject to review which primarily happens on mailing lists (see the
343 313respective section below). For several kernel subsystems, this review
344 - DRM development tree, Dave Airlie <airlied@linux.ie> 314process is tracked with the tool patchwork. Patchwork offers a web
345 git.kernel.org:/pub/scm/linux/kernel/git/airlied/drm-2.6.git 315interface which shows patch postings, any comments on a patch or
346 316revisions to it, and maintainers can mark patches as under review,
347 - ia64 development tree, Tony Luck <tony.luck@intel.com> 317accepted, or rejected. Most of these patchwork sites are listed at
348 git.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6.git 318http://patchwork.kernel.org/ or http://patchwork.ozlabs.org/.
349 319
350 - infiniband, Roland Dreier <rolandd@cisco.com> 3202.6.x -next kernel tree for integration tests
351 git.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git 321---------------------------------------------
352 322Before updates from subsystem trees are merged into the mainline 2.6.x
353 - libata, Jeff Garzik <jgarzik@pobox.com> 323tree, they need to be integration-tested. For this purpose, a special
354 git.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git 324testing repository exists into which virtually all subsystem trees are
355 325pulled on an almost daily basis:
356 - network drivers, Jeff Garzik <jgarzik@pobox.com> 326 http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git
357 git.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6.git 327 http://linux.f-seidel.de/linux-next/pmwiki/
358 328
359 - pcmcia, Dominik Brodowski <linux@dominikbrodowski.net> 329This way, the -next kernel gives a summary outlook onto what will be
360 git.kernel.org:/pub/scm/linux/kernel/git/brodo/pcmcia-2.6.git 330expected to go into the mainline kernel at the next merge period.
361 331Adventurous testers are very welcome to runtime-test the -next kernel.
362 - SCSI, James Bottomley <James.Bottomley@hansenpartnership.com>
363 git.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6.git
364
365 - x86, Ingo Molnar <mingo@elte.hu>
366 git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git
367
368 quilt trees:
369 - USB, Driver Core, and I2C, Greg Kroah-Hartman <gregkh@suse.de>
370 kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/
371 332
372 Other kernel trees can be found listed at http://git.kernel.org/ and in
373 the MAINTAINERS file.
374 333
375Bug Reporting 334Bug Reporting
376------------- 335-------------
diff --git a/Documentation/IPMI.txt b/Documentation/IPMI.txt
index bc38283379f0..69dd29ed824e 100644
--- a/Documentation/IPMI.txt
+++ b/Documentation/IPMI.txt
@@ -365,6 +365,7 @@ You can change this at module load time (for a module) with:
365 regshifts=<shift1>,<shift2>,... 365 regshifts=<shift1>,<shift2>,...
366 slave_addrs=<addr1>,<addr2>,... 366 slave_addrs=<addr1>,<addr2>,...
367 force_kipmid=<enable1>,<enable2>,... 367 force_kipmid=<enable1>,<enable2>,...
368 kipmid_max_busy_us=<ustime1>,<ustime2>,...
368 unload_when_empty=[0|1] 369 unload_when_empty=[0|1]
369 370
370Each of these except si_trydefaults is a list, the first item for the 371Each of these except si_trydefaults is a list, the first item for the
@@ -433,6 +434,7 @@ kernel command line as:
433 ipmi_si.regshifts=<shift1>,<shift2>,... 434 ipmi_si.regshifts=<shift1>,<shift2>,...
434 ipmi_si.slave_addrs=<addr1>,<addr2>,... 435 ipmi_si.slave_addrs=<addr1>,<addr2>,...
435 ipmi_si.force_kipmid=<enable1>,<enable2>,... 436 ipmi_si.force_kipmid=<enable1>,<enable2>,...
437 ipmi_si.kipmid_max_busy_us=<ustime1>,<ustime2>,...
436 438
437It works the same as the module parameters of the same names. 439It works the same as the module parameters of the same names.
438 440
@@ -450,6 +452,16 @@ force this thread on or off. If you force it off and don't have
450interrupts, the driver will run VERY slowly. Don't blame me, 452interrupts, the driver will run VERY slowly. Don't blame me,
451these interfaces suck. 453these interfaces suck.
452 454
455Unfortunately, this thread can use a lot of CPU depending on the
456interface's performance. This can waste a lot of CPU and cause
457various issues with detecting idle CPU and using extra power. To
458avoid this, the kipmid_max_busy_us sets the maximum amount of time, in
459microseconds, that kipmid will spin before sleeping for a tick. This
460value sets a balance between performance and CPU waste and needs to be
461tuned to your needs. Maybe, someday, auto-tuning will be added, but
462that's not a simple thing and even the auto-tuning would need to be
463tuned to the user's desired performance.
464
453The driver supports a hot add and remove of interfaces. This way, 465The driver supports a hot add and remove of interfaces. This way,
454interfaces can be added or removed after the kernel is up and running. 466interfaces can be added or removed after the kernel is up and running.
455This is done using /sys/modules/ipmi_si/parameters/hotmod, which is a 467This is done using /sys/modules/ipmi_si/parameters/hotmod, which is a
diff --git a/Documentation/Makefile b/Documentation/Makefile
index 94b945733534..6fc7ea1d1f9d 100644
--- a/Documentation/Makefile
+++ b/Documentation/Makefile
@@ -1,3 +1,3 @@
1obj-m := DocBook/ accounting/ auxdisplay/ connector/ \ 1obj-m := DocBook/ accounting/ auxdisplay/ connector/ \
2 filesystems/configfs/ ia64/ networking/ \ 2 filesystems/ filesystems/configfs/ ia64/ laptops/ networking/ \
3 pcmcia/ spi/ video4linux/ vm/ watchdog/src/ 3 pcmcia/ spi/ timers/ video4linux/ vm/ watchdog/src/
diff --git a/Documentation/PCI/PCI-DMA-mapping.txt b/Documentation/PCI/PCI-DMA-mapping.txt
index ecad88d9fe59..52618ab069ad 100644
--- a/Documentation/PCI/PCI-DMA-mapping.txt
+++ b/Documentation/PCI/PCI-DMA-mapping.txt
@@ -1,12 +1,12 @@
1 Dynamic DMA mapping 1 Dynamic DMA mapping Guide
2 =================== 2 =========================
3 3
4 David S. Miller <davem@redhat.com> 4 David S. Miller <davem@redhat.com>
5 Richard Henderson <rth@cygnus.com> 5 Richard Henderson <rth@cygnus.com>
6 Jakub Jelinek <jakub@redhat.com> 6 Jakub Jelinek <jakub@redhat.com>
7 7
8This document describes the DMA mapping system in terms of the pci_ 8This is a guide to device driver writers on how to use the DMA API
9API. For a similar API that works for generic devices, see 9with example pseudo-code. For a concise description of the API, see
10DMA-API.txt. 10DMA-API.txt.
11 11
12Most of the 64bit platforms have special hardware that translates bus 12Most of the 64bit platforms have special hardware that translates bus
@@ -26,12 +26,15 @@ mapped only for the time they are actually used and unmapped after the DMA
26transfer. 26transfer.
27 27
28The following API will work of course even on platforms where no such 28The following API will work of course even on platforms where no such
29hardware exists, see e.g. arch/x86/include/asm/pci.h for how it is implemented on 29hardware exists.
30top of the virt_to_bus interface. 30
31Note that the DMA API works with any bus independent of the underlying
32microprocessor architecture. You should use the DMA API rather than
33the bus specific DMA API (e.g. pci_dma_*).
31 34
32First of all, you should make sure 35First of all, you should make sure
33 36
34#include <linux/pci.h> 37#include <linux/dma-mapping.h>
35 38
36is in your driver. This file will obtain for you the definition of the 39is in your driver. This file will obtain for you the definition of the
37dma_addr_t (which can hold any valid DMA address for the platform) 40dma_addr_t (which can hold any valid DMA address for the platform)
@@ -78,44 +81,43 @@ for you to DMA from/to.
78 DMA addressing limitations 81 DMA addressing limitations
79 82
80Does your device have any DMA addressing limitations? For example, is 83Does your device have any DMA addressing limitations? For example, is
81your device only capable of driving the low order 24-bits of address 84your device only capable of driving the low order 24-bits of address?
82on the PCI bus for SAC DMA transfers? If so, you need to inform the 85If so, you need to inform the kernel of this fact.
83PCI layer of this fact.
84 86
85By default, the kernel assumes that your device can address the full 87By default, the kernel assumes that your device can address the full
8632-bits in a SAC cycle. For a 64-bit DAC capable device, this needs 8832-bits. For a 64-bit capable device, this needs to be increased.
87to be increased. And for a device with limitations, as discussed in 89And for a device with limitations, as discussed in the previous
88the previous paragraph, it needs to be decreased. 90paragraph, it needs to be decreased.
89 91
90pci_alloc_consistent() by default will return 32-bit DMA addresses. 92Special note about PCI: PCI-X specification requires PCI-X devices to
91PCI-X specification requires PCI-X devices to support 64-bit 93support 64-bit addressing (DAC) for all transactions. And at least
92addressing (DAC) for all transactions. And at least one platform (SGI 94one platform (SGI SN2) requires 64-bit consistent allocations to
93SN2) requires 64-bit consistent allocations to operate correctly when 95operate correctly when the IO bus is in PCI-X mode.
94the IO bus is in PCI-X mode. Therefore, like with pci_set_dma_mask(), 96
95it's good practice to call pci_set_consistent_dma_mask() to set the 97For correct operation, you must interrogate the kernel in your device
96appropriate mask even if your device only supports 32-bit DMA 98probe routine to see if the DMA controller on the machine can properly
97(default) and especially if it's a PCI-X device. 99support the DMA addressing limitation your device has. It is good
98 100style to do this even if your device holds the default setting,
99For correct operation, you must interrogate the PCI layer in your
100device probe routine to see if the PCI controller on the machine can
101properly support the DMA addressing limitation your device has. It is
102good style to do this even if your device holds the default setting,
103because this shows that you did think about these issues wrt. your 101because this shows that you did think about these issues wrt. your
104device. 102device.
105 103
106The query is performed via a call to pci_set_dma_mask(): 104The query is performed via a call to dma_set_mask():
107 105
108 int pci_set_dma_mask(struct pci_dev *pdev, u64 device_mask); 106 int dma_set_mask(struct device *dev, u64 mask);
109 107
110The query for consistent allocations is performed via a call to 108The query for consistent allocations is performed via a call to
111pci_set_consistent_dma_mask(): 109dma_set_coherent_mask():
112 110
113 int pci_set_consistent_dma_mask(struct pci_dev *pdev, u64 device_mask); 111 int dma_set_coherent_mask(struct device *dev, u64 mask);
114 112
115Here, pdev is a pointer to the PCI device struct of your device, and 113Here, dev is a pointer to the device struct of your device, and mask
116device_mask is a bit mask describing which bits of a PCI address your 114is a bit mask describing which bits of an address your device
117device supports. It returns zero if your card can perform DMA 115supports. It returns zero if your card can perform DMA properly on
118properly on the machine given the address mask you provided. 116the machine given the address mask you provided. In general, the
117device struct of your device is embedded in the bus specific device
118struct of your device. For example, a pointer to the device struct of
119your PCI device is pdev->dev (pdev is a pointer to the PCI device
120struct of your device).
119 121
120If it returns non-zero, your device cannot perform DMA properly on 122If it returns non-zero, your device cannot perform DMA properly on
121this platform, and attempting to do so will result in undefined 123this platform, and attempting to do so will result in undefined
@@ -133,31 +135,30 @@ of your driver reports that performance is bad or that the device is not
133even detected, you can ask them for the kernel messages to find out 135even detected, you can ask them for the kernel messages to find out
134exactly why. 136exactly why.
135 137
136The standard 32-bit addressing PCI device would do something like 138The standard 32-bit addressing device would do something like this:
137this:
138 139
139 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { 140 if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
140 printk(KERN_WARNING 141 printk(KERN_WARNING
141 "mydev: No suitable DMA available.\n"); 142 "mydev: No suitable DMA available.\n");
142 goto ignore_this_device; 143 goto ignore_this_device;
143 } 144 }
144 145
145Another common scenario is a 64-bit capable device. The approach 146Another common scenario is a 64-bit capable device. The approach here
146here is to try for 64-bit DAC addressing, but back down to a 147is to try for 64-bit addressing, but back down to a 32-bit mask that
14732-bit mask should that fail. The PCI platform code may fail the 148should not fail. The kernel may fail the 64-bit mask not because the
14864-bit mask not because the platform is not capable of 64-bit 149platform is not capable of 64-bit addressing. Rather, it may fail in
149addressing. Rather, it may fail in this case simply because 150this case simply because 32-bit addressing is done more efficiently
15032-bit SAC addressing is done more efficiently than DAC addressing. 151than 64-bit addressing. For example, Sparc64 PCI SAC addressing is
151Sparc64 is one platform which behaves in this way. 152more efficient than DAC addressing.
152 153
153Here is how you would handle a 64-bit capable device which can drive 154Here is how you would handle a 64-bit capable device which can drive
154all 64-bits when accessing streaming DMA: 155all 64-bits when accessing streaming DMA:
155 156
156 int using_dac; 157 int using_dac;
157 158
158 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { 159 if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
159 using_dac = 1; 160 using_dac = 1;
160 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { 161 } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) {
161 using_dac = 0; 162 using_dac = 0;
162 } else { 163 } else {
163 printk(KERN_WARNING 164 printk(KERN_WARNING
@@ -170,36 +171,36 @@ the case would look like this:
170 171
171 int using_dac, consistent_using_dac; 172 int using_dac, consistent_using_dac;
172 173
173 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { 174 if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
174 using_dac = 1; 175 using_dac = 1;
175 consistent_using_dac = 1; 176 consistent_using_dac = 1;
176 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 177 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
177 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { 178 } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) {
178 using_dac = 0; 179 using_dac = 0;
179 consistent_using_dac = 0; 180 consistent_using_dac = 0;
180 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 181 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
181 } else { 182 } else {
182 printk(KERN_WARNING 183 printk(KERN_WARNING
183 "mydev: No suitable DMA available.\n"); 184 "mydev: No suitable DMA available.\n");
184 goto ignore_this_device; 185 goto ignore_this_device;
185 } 186 }
186 187
187pci_set_consistent_dma_mask() will always be able to set the same or a 188dma_set_coherent_mask() will always be able to set the same or a
188smaller mask as pci_set_dma_mask(). However for the rare case that a 189smaller mask as dma_set_mask(). However for the rare case that a
189device driver only uses consistent allocations, one would have to 190device driver only uses consistent allocations, one would have to
190check the return value from pci_set_consistent_dma_mask(). 191check the return value from dma_set_coherent_mask().
191 192
192Finally, if your device can only drive the low 24-bits of 193Finally, if your device can only drive the low 24-bits of
193address during PCI bus mastering you might do something like: 194address you might do something like:
194 195
195 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(24))) { 196 if (dma_set_mask(dev, DMA_BIT_MASK(24))) {
196 printk(KERN_WARNING 197 printk(KERN_WARNING
197 "mydev: 24-bit DMA addressing not available.\n"); 198 "mydev: 24-bit DMA addressing not available.\n");
198 goto ignore_this_device; 199 goto ignore_this_device;
199 } 200 }
200 201
201When pci_set_dma_mask() is successful, and returns zero, the PCI layer 202When dma_set_mask() is successful, and returns zero, the kernel saves
202saves away this mask you have provided. The PCI layer will use this 203away this mask you have provided. The kernel will use this
203information later when you make DMA mappings. 204information later when you make DMA mappings.
204 205
205There is a case which we are aware of at this time, which is worth 206There is a case which we are aware of at this time, which is worth
@@ -208,7 +209,7 @@ functions (for example a sound card provides playback and record
208functions) and the various different functions have _different_ 209functions) and the various different functions have _different_
209DMA addressing limitations, you may wish to probe each mask and 210DMA addressing limitations, you may wish to probe each mask and
210only provide the functionality which the machine can handle. It 211only provide the functionality which the machine can handle. It
211is important that the last call to pci_set_dma_mask() be for the 212is important that the last call to dma_set_mask() be for the
212most specific mask. 213most specific mask.
213 214
214Here is pseudo-code showing how this might be done: 215Here is pseudo-code showing how this might be done:
@@ -217,17 +218,17 @@ Here is pseudo-code showing how this might be done:
217 #define RECORD_ADDRESS_BITS DMA_BIT_MASK(24) 218 #define RECORD_ADDRESS_BITS DMA_BIT_MASK(24)
218 219
219 struct my_sound_card *card; 220 struct my_sound_card *card;
220 struct pci_dev *pdev; 221 struct device *dev;
221 222
222 ... 223 ...
223 if (!pci_set_dma_mask(pdev, PLAYBACK_ADDRESS_BITS)) { 224 if (!dma_set_mask(dev, PLAYBACK_ADDRESS_BITS)) {
224 card->playback_enabled = 1; 225 card->playback_enabled = 1;
225 } else { 226 } else {
226 card->playback_enabled = 0; 227 card->playback_enabled = 0;
227 printk(KERN_WARNING "%s: Playback disabled due to DMA limitations.\n", 228 printk(KERN_WARNING "%s: Playback disabled due to DMA limitations.\n",
228 card->name); 229 card->name);
229 } 230 }
230 if (!pci_set_dma_mask(pdev, RECORD_ADDRESS_BITS)) { 231 if (!dma_set_mask(dev, RECORD_ADDRESS_BITS)) {
231 card->record_enabled = 1; 232 card->record_enabled = 1;
232 } else { 233 } else {
233 card->record_enabled = 0; 234 card->record_enabled = 0;
@@ -252,8 +253,8 @@ There are two types of DMA mappings:
252 Think of "consistent" as "synchronous" or "coherent". 253 Think of "consistent" as "synchronous" or "coherent".
253 254
254 The current default is to return consistent memory in the low 32 255 The current default is to return consistent memory in the low 32
255 bits of the PCI bus space. However, for future compatibility you 256 bits of the bus space. However, for future compatibility you should
256 should set the consistent mask even if this default is fine for your 257 set the consistent mask even if this default is fine for your
257 driver. 258 driver.
258 259
259 Good examples of what to use consistent mappings for are: 260 Good examples of what to use consistent mappings for are:
@@ -285,9 +286,9 @@ There are two types of DMA mappings:
285 found in PCI bridges (such as by reading a register's value 286 found in PCI bridges (such as by reading a register's value
286 after writing it). 287 after writing it).
287 288
288- Streaming DMA mappings which are usually mapped for one DMA transfer, 289- Streaming DMA mappings which are usually mapped for one DMA
289 unmapped right after it (unless you use pci_dma_sync_* below) and for which 290 transfer, unmapped right after it (unless you use dma_sync_* below)
290 hardware can optimize for sequential accesses. 291 and for which hardware can optimize for sequential accesses.
291 292
292 This of "streaming" as "asynchronous" or "outside the coherency 293 This of "streaming" as "asynchronous" or "outside the coherency
293 domain". 294 domain".
@@ -302,8 +303,8 @@ There are two types of DMA mappings:
302 optimizations the hardware allows. To this end, when using 303 optimizations the hardware allows. To this end, when using
303 such mappings you must be explicit about what you want to happen. 304 such mappings you must be explicit about what you want to happen.
304 305
305Neither type of DMA mapping has alignment restrictions that come 306Neither type of DMA mapping has alignment restrictions that come from
306from PCI, although some devices may have such restrictions. 307the underlying bus, although some devices may have such restrictions.
307Also, systems with caches that aren't DMA-coherent will work better 308Also, systems with caches that aren't DMA-coherent will work better
308when the underlying buffers don't share cache lines with other data. 309when the underlying buffers don't share cache lines with other data.
309 310
@@ -315,33 +316,27 @@ you should do:
315 316
316 dma_addr_t dma_handle; 317 dma_addr_t dma_handle;
317 318
318 cpu_addr = pci_alloc_consistent(pdev, size, &dma_handle); 319 cpu_addr = dma_alloc_coherent(dev, size, &dma_handle, gfp);
319
320where pdev is a struct pci_dev *. This may be called in interrupt context.
321You should use dma_alloc_coherent (see DMA-API.txt) for buses
322where devices don't have struct pci_dev (like ISA, EISA).
323 320
324This argument is needed because the DMA translations may be bus 321where device is a struct device *. This may be called in interrupt
325specific (and often is private to the bus which the device is attached 322context with the GFP_ATOMIC flag.
326to).
327 323
328Size is the length of the region you want to allocate, in bytes. 324Size is the length of the region you want to allocate, in bytes.
329 325
330This routine will allocate RAM for that region, so it acts similarly to 326This routine will allocate RAM for that region, so it acts similarly to
331__get_free_pages (but takes size instead of a page order). If your 327__get_free_pages (but takes size instead of a page order). If your
332driver needs regions sized smaller than a page, you may prefer using 328driver needs regions sized smaller than a page, you may prefer using
333the pci_pool interface, described below. 329the dma_pool interface, described below.
334 330
335The consistent DMA mapping interfaces, for non-NULL pdev, will by 331The consistent DMA mapping interfaces, for non-NULL dev, will by
336default return a DMA address which is SAC (Single Address Cycle) 332default return a DMA address which is 32-bit addressable. Even if the
337addressable. Even if the device indicates (via PCI dma mask) that it 333device indicates (via DMA mask) that it may address the upper 32-bits,
338may address the upper 32-bits and thus perform DAC cycles, consistent 334consistent allocation will only return > 32-bit addresses for DMA if
339allocation will only return > 32-bit PCI addresses for DMA if the 335the consistent DMA mask has been explicitly changed via
340consistent dma mask has been explicitly changed via 336dma_set_coherent_mask(). This is true of the dma_pool interface as
341pci_set_consistent_dma_mask(). This is true of the pci_pool interface 337well.
342as well. 338
343 339dma_alloc_coherent returns two values: the virtual address which you
344pci_alloc_consistent returns two values: the virtual address which you
345can use to access it from the CPU and dma_handle which you pass to the 340can use to access it from the CPU and dma_handle which you pass to the
346card. 341card.
347 342
@@ -354,54 +349,54 @@ buffer you receive will not cross a 64K boundary.
354 349
355To unmap and free such a DMA region, you call: 350To unmap and free such a DMA region, you call:
356 351
357 pci_free_consistent(pdev, size, cpu_addr, dma_handle); 352 dma_free_coherent(dev, size, cpu_addr, dma_handle);
358 353
359where pdev, size are the same as in the above call and cpu_addr and 354where dev, size are the same as in the above call and cpu_addr and
360dma_handle are the values pci_alloc_consistent returned to you. 355dma_handle are the values dma_alloc_coherent returned to you.
361This function may not be called in interrupt context. 356This function may not be called in interrupt context.
362 357
363If your driver needs lots of smaller memory regions, you can write 358If your driver needs lots of smaller memory regions, you can write
364custom code to subdivide pages returned by pci_alloc_consistent, 359custom code to subdivide pages returned by dma_alloc_coherent,
365or you can use the pci_pool API to do that. A pci_pool is like 360or you can use the dma_pool API to do that. A dma_pool is like
366a kmem_cache, but it uses pci_alloc_consistent not __get_free_pages. 361a kmem_cache, but it uses dma_alloc_coherent not __get_free_pages.
367Also, it understands common hardware constraints for alignment, 362Also, it understands common hardware constraints for alignment,
368like queue heads needing to be aligned on N byte boundaries. 363like queue heads needing to be aligned on N byte boundaries.
369 364
370Create a pci_pool like this: 365Create a dma_pool like this:
371 366
372 struct pci_pool *pool; 367 struct dma_pool *pool;
373 368
374 pool = pci_pool_create(name, pdev, size, align, alloc); 369 pool = dma_pool_create(name, dev, size, align, alloc);
375 370
376The "name" is for diagnostics (like a kmem_cache name); pdev and size 371The "name" is for diagnostics (like a kmem_cache name); dev and size
377are as above. The device's hardware alignment requirement for this 372are as above. The device's hardware alignment requirement for this
378type of data is "align" (which is expressed in bytes, and must be a 373type of data is "align" (which is expressed in bytes, and must be a
379power of two). If your device has no boundary crossing restrictions, 374power of two). If your device has no boundary crossing restrictions,
380pass 0 for alloc; passing 4096 says memory allocated from this pool 375pass 0 for alloc; passing 4096 says memory allocated from this pool
381must not cross 4KByte boundaries (but at that time it may be better to 376must not cross 4KByte boundaries (but at that time it may be better to
382go for pci_alloc_consistent directly instead). 377go for dma_alloc_coherent directly instead).
383 378
384Allocate memory from a pci pool like this: 379Allocate memory from a dma pool like this:
385 380
386 cpu_addr = pci_pool_alloc(pool, flags, &dma_handle); 381 cpu_addr = dma_pool_alloc(pool, flags, &dma_handle);
387 382
388flags are SLAB_KERNEL if blocking is permitted (not in_interrupt nor 383flags are SLAB_KERNEL if blocking is permitted (not in_interrupt nor
389holding SMP locks), SLAB_ATOMIC otherwise. Like pci_alloc_consistent, 384holding SMP locks), SLAB_ATOMIC otherwise. Like dma_alloc_coherent,
390this returns two values, cpu_addr and dma_handle. 385this returns two values, cpu_addr and dma_handle.
391 386
392Free memory that was allocated from a pci_pool like this: 387Free memory that was allocated from a dma_pool like this:
393 388
394 pci_pool_free(pool, cpu_addr, dma_handle); 389 dma_pool_free(pool, cpu_addr, dma_handle);
395 390
396where pool is what you passed to pci_pool_alloc, and cpu_addr and 391where pool is what you passed to dma_pool_alloc, and cpu_addr and
397dma_handle are the values pci_pool_alloc returned. This function 392dma_handle are the values dma_pool_alloc returned. This function
398may be called in interrupt context. 393may be called in interrupt context.
399 394
400Destroy a pci_pool by calling: 395Destroy a dma_pool by calling:
401 396
402 pci_pool_destroy(pool); 397 dma_pool_destroy(pool);
403 398
404Make sure you've called pci_pool_free for all memory allocated 399Make sure you've called dma_pool_free for all memory allocated
405from a pool before you destroy the pool. This function may not 400from a pool before you destroy the pool. This function may not
406be called in interrupt context. 401be called in interrupt context.
407 402
@@ -411,15 +406,15 @@ The interfaces described in subsequent portions of this document
411take a DMA direction argument, which is an integer and takes on 406take a DMA direction argument, which is an integer and takes on
412one of the following values: 407one of the following values:
413 408
414 PCI_DMA_BIDIRECTIONAL 409 DMA_BIDIRECTIONAL
415 PCI_DMA_TODEVICE 410 DMA_TO_DEVICE
416 PCI_DMA_FROMDEVICE 411 DMA_FROM_DEVICE
417 PCI_DMA_NONE 412 DMA_NONE
418 413
419One should provide the exact DMA direction if you know it. 414One should provide the exact DMA direction if you know it.
420 415
421PCI_DMA_TODEVICE means "from main memory to the PCI device" 416DMA_TO_DEVICE means "from main memory to the device"
422PCI_DMA_FROMDEVICE means "from the PCI device to main memory" 417DMA_FROM_DEVICE means "from the device to main memory"
423It is the direction in which the data moves during the DMA 418It is the direction in which the data moves during the DMA
424transfer. 419transfer.
425 420
@@ -427,12 +422,12 @@ You are _strongly_ encouraged to specify this as precisely
427as you possibly can. 422as you possibly can.
428 423
429If you absolutely cannot know the direction of the DMA transfer, 424If you absolutely cannot know the direction of the DMA transfer,
430specify PCI_DMA_BIDIRECTIONAL. It means that the DMA can go in 425specify DMA_BIDIRECTIONAL. It means that the DMA can go in
431either direction. The platform guarantees that you may legally 426either direction. The platform guarantees that you may legally
432specify this, and that it will work, but this may be at the 427specify this, and that it will work, but this may be at the
433cost of performance for example. 428cost of performance for example.
434 429
435The value PCI_DMA_NONE is to be used for debugging. One can 430The value DMA_NONE is to be used for debugging. One can
436hold this in a data structure before you come to know the 431hold this in a data structure before you come to know the
437precise direction, and this will help catch cases where your 432precise direction, and this will help catch cases where your
438direction tracking logic has failed to set things up properly. 433direction tracking logic has failed to set things up properly.
@@ -442,21 +437,21 @@ potential platform-specific optimizations of such) is for debugging.
442Some platforms actually have a write permission boolean which DMA 437Some platforms actually have a write permission boolean which DMA
443mappings can be marked with, much like page protections in the user 438mappings can be marked with, much like page protections in the user
444program address space. Such platforms can and do report errors in the 439program address space. Such platforms can and do report errors in the
445kernel logs when the PCI controller hardware detects violation of the 440kernel logs when the DMA controller hardware detects violation of the
446permission setting. 441permission setting.
447 442
448Only streaming mappings specify a direction, consistent mappings 443Only streaming mappings specify a direction, consistent mappings
449implicitly have a direction attribute setting of 444implicitly have a direction attribute setting of
450PCI_DMA_BIDIRECTIONAL. 445DMA_BIDIRECTIONAL.
451 446
452The SCSI subsystem tells you the direction to use in the 447The SCSI subsystem tells you the direction to use in the
453'sc_data_direction' member of the SCSI command your driver is 448'sc_data_direction' member of the SCSI command your driver is
454working on. 449working on.
455 450
456For Networking drivers, it's a rather simple affair. For transmit 451For Networking drivers, it's a rather simple affair. For transmit
457packets, map/unmap them with the PCI_DMA_TODEVICE direction 452packets, map/unmap them with the DMA_TO_DEVICE direction
458specifier. For receive packets, just the opposite, map/unmap them 453specifier. For receive packets, just the opposite, map/unmap them
459with the PCI_DMA_FROMDEVICE direction specifier. 454with the DMA_FROM_DEVICE direction specifier.
460 455
461 Using Streaming DMA mappings 456 Using Streaming DMA mappings
462 457
@@ -467,43 +462,43 @@ scatterlist.
467 462
468To map a single region, you do: 463To map a single region, you do:
469 464
470 struct pci_dev *pdev = mydev->pdev; 465 struct device *dev = &my_dev->dev;
471 dma_addr_t dma_handle; 466 dma_addr_t dma_handle;
472 void *addr = buffer->ptr; 467 void *addr = buffer->ptr;
473 size_t size = buffer->len; 468 size_t size = buffer->len;
474 469
475 dma_handle = pci_map_single(pdev, addr, size, direction); 470 dma_handle = dma_map_single(dev, addr, size, direction);
476 471
477and to unmap it: 472and to unmap it:
478 473
479 pci_unmap_single(pdev, dma_handle, size, direction); 474 dma_unmap_single(dev, dma_handle, size, direction);
480 475
481You should call pci_unmap_single when the DMA activity is finished, e.g. 476You should call dma_unmap_single when the DMA activity is finished, e.g.
482from the interrupt which told you that the DMA transfer is done. 477from the interrupt which told you that the DMA transfer is done.
483 478
484Using cpu pointers like this for single mappings has a disadvantage, 479Using cpu pointers like this for single mappings has a disadvantage,
485you cannot reference HIGHMEM memory in this way. Thus, there is a 480you cannot reference HIGHMEM memory in this way. Thus, there is a
486map/unmap interface pair akin to pci_{map,unmap}_single. These 481map/unmap interface pair akin to dma_{map,unmap}_single. These
487interfaces deal with page/offset pairs instead of cpu pointers. 482interfaces deal with page/offset pairs instead of cpu pointers.
488Specifically: 483Specifically:
489 484
490 struct pci_dev *pdev = mydev->pdev; 485 struct device *dev = &my_dev->dev;
491 dma_addr_t dma_handle; 486 dma_addr_t dma_handle;
492 struct page *page = buffer->page; 487 struct page *page = buffer->page;
493 unsigned long offset = buffer->offset; 488 unsigned long offset = buffer->offset;
494 size_t size = buffer->len; 489 size_t size = buffer->len;
495 490
496 dma_handle = pci_map_page(pdev, page, offset, size, direction); 491 dma_handle = dma_map_page(dev, page, offset, size, direction);
497 492
498 ... 493 ...
499 494
500 pci_unmap_page(pdev, dma_handle, size, direction); 495 dma_unmap_page(dev, dma_handle, size, direction);
501 496
502Here, "offset" means byte offset within the given page. 497Here, "offset" means byte offset within the given page.
503 498
504With scatterlists, you map a region gathered from several regions by: 499With scatterlists, you map a region gathered from several regions by:
505 500
506 int i, count = pci_map_sg(pdev, sglist, nents, direction); 501 int i, count = dma_map_sg(dev, sglist, nents, direction);
507 struct scatterlist *sg; 502 struct scatterlist *sg;
508 503
509 for_each_sg(sglist, sg, count, i) { 504 for_each_sg(sglist, sg, count, i) {
@@ -527,16 +522,16 @@ accessed sg->address and sg->length as shown above.
527 522
528To unmap a scatterlist, just call: 523To unmap a scatterlist, just call:
529 524
530 pci_unmap_sg(pdev, sglist, nents, direction); 525 dma_unmap_sg(dev, sglist, nents, direction);
531 526
532Again, make sure DMA activity has already finished. 527Again, make sure DMA activity has already finished.
533 528
534PLEASE NOTE: The 'nents' argument to the pci_unmap_sg call must be 529PLEASE NOTE: The 'nents' argument to the dma_unmap_sg call must be
535 the _same_ one you passed into the pci_map_sg call, 530 the _same_ one you passed into the dma_map_sg call,
536 it should _NOT_ be the 'count' value _returned_ from the 531 it should _NOT_ be the 'count' value _returned_ from the
537 pci_map_sg call. 532 dma_map_sg call.
538 533
539Every pci_map_{single,sg} call should have its pci_unmap_{single,sg} 534Every dma_map_{single,sg} call should have its dma_unmap_{single,sg}
540counterpart, because the bus address space is a shared resource (although 535counterpart, because the bus address space is a shared resource (although
541in some ports the mapping is per each BUS so less devices contend for the 536in some ports the mapping is per each BUS so less devices contend for the
542same bus address space) and you could render the machine unusable by eating 537same bus address space) and you could render the machine unusable by eating
@@ -547,14 +542,14 @@ the data in between the DMA transfers, the buffer needs to be synced
547properly in order for the cpu and device to see the most uptodate and 542properly in order for the cpu and device to see the most uptodate and
548correct copy of the DMA buffer. 543correct copy of the DMA buffer.
549 544
550So, firstly, just map it with pci_map_{single,sg}, and after each DMA 545So, firstly, just map it with dma_map_{single,sg}, and after each DMA
551transfer call either: 546transfer call either:
552 547
553 pci_dma_sync_single_for_cpu(pdev, dma_handle, size, direction); 548 dma_sync_single_for_cpu(dev, dma_handle, size, direction);
554 549
555or: 550or:
556 551
557 pci_dma_sync_sg_for_cpu(pdev, sglist, nents, direction); 552 dma_sync_sg_for_cpu(dev, sglist, nents, direction);
558 553
559as appropriate. 554as appropriate.
560 555
@@ -562,27 +557,27 @@ Then, if you wish to let the device get at the DMA area again,
562finish accessing the data with the cpu, and then before actually 557finish accessing the data with the cpu, and then before actually
563giving the buffer to the hardware call either: 558giving the buffer to the hardware call either:
564 559
565 pci_dma_sync_single_for_device(pdev, dma_handle, size, direction); 560 dma_sync_single_for_device(dev, dma_handle, size, direction);
566 561
567or: 562or:
568 563
569 pci_dma_sync_sg_for_device(dev, sglist, nents, direction); 564 dma_sync_sg_for_device(dev, sglist, nents, direction);
570 565
571as appropriate. 566as appropriate.
572 567
573After the last DMA transfer call one of the DMA unmap routines 568After the last DMA transfer call one of the DMA unmap routines
574pci_unmap_{single,sg}. If you don't touch the data from the first pci_map_* 569dma_unmap_{single,sg}. If you don't touch the data from the first dma_map_*
575call till pci_unmap_*, then you don't have to call the pci_dma_sync_* 570call till dma_unmap_*, then you don't have to call the dma_sync_*
576routines at all. 571routines at all.
577 572
578Here is pseudo code which shows a situation in which you would need 573Here is pseudo code which shows a situation in which you would need
579to use the pci_dma_sync_*() interfaces. 574to use the dma_sync_*() interfaces.
580 575
581 my_card_setup_receive_buffer(struct my_card *cp, char *buffer, int len) 576 my_card_setup_receive_buffer(struct my_card *cp, char *buffer, int len)
582 { 577 {
583 dma_addr_t mapping; 578 dma_addr_t mapping;
584 579
585 mapping = pci_map_single(cp->pdev, buffer, len, PCI_DMA_FROMDEVICE); 580 mapping = dma_map_single(cp->dev, buffer, len, DMA_FROM_DEVICE);
586 581
587 cp->rx_buf = buffer; 582 cp->rx_buf = buffer;
588 cp->rx_len = len; 583 cp->rx_len = len;
@@ -606,25 +601,25 @@ to use the pci_dma_sync_*() interfaces.
606 * the DMA transfer with the CPU first 601 * the DMA transfer with the CPU first
607 * so that we see updated contents. 602 * so that we see updated contents.
608 */ 603 */
609 pci_dma_sync_single_for_cpu(cp->pdev, cp->rx_dma, 604 dma_sync_single_for_cpu(&cp->dev, cp->rx_dma,
610 cp->rx_len, 605 cp->rx_len,
611 PCI_DMA_FROMDEVICE); 606 DMA_FROM_DEVICE);
612 607
613 /* Now it is safe to examine the buffer. */ 608 /* Now it is safe to examine the buffer. */
614 hp = (struct my_card_header *) cp->rx_buf; 609 hp = (struct my_card_header *) cp->rx_buf;
615 if (header_is_ok(hp)) { 610 if (header_is_ok(hp)) {
616 pci_unmap_single(cp->pdev, cp->rx_dma, cp->rx_len, 611 dma_unmap_single(&cp->dev, cp->rx_dma, cp->rx_len,
617 PCI_DMA_FROMDEVICE); 612 DMA_FROM_DEVICE);
618 pass_to_upper_layers(cp->rx_buf); 613 pass_to_upper_layers(cp->rx_buf);
619 make_and_setup_new_rx_buf(cp); 614 make_and_setup_new_rx_buf(cp);
620 } else { 615 } else {
621 /* Just sync the buffer and give it back 616 /* Just sync the buffer and give it back
622 * to the card. 617 * to the card.
623 */ 618 */
624 pci_dma_sync_single_for_device(cp->pdev, 619 dma_sync_single_for_device(&cp->dev,
625 cp->rx_dma, 620 cp->rx_dma,
626 cp->rx_len, 621 cp->rx_len,
627 PCI_DMA_FROMDEVICE); 622 DMA_FROM_DEVICE);
628 give_rx_buf_to_card(cp); 623 give_rx_buf_to_card(cp);
629 } 624 }
630 } 625 }
@@ -634,19 +629,19 @@ Drivers converted fully to this interface should not use virt_to_bus any
634longer, nor should they use bus_to_virt. Some drivers have to be changed a 629longer, nor should they use bus_to_virt. Some drivers have to be changed a
635little bit, because there is no longer an equivalent to bus_to_virt in the 630little bit, because there is no longer an equivalent to bus_to_virt in the
636dynamic DMA mapping scheme - you have to always store the DMA addresses 631dynamic DMA mapping scheme - you have to always store the DMA addresses
637returned by the pci_alloc_consistent, pci_pool_alloc, and pci_map_single 632returned by the dma_alloc_coherent, dma_pool_alloc, and dma_map_single
638calls (pci_map_sg stores them in the scatterlist itself if the platform 633calls (dma_map_sg stores them in the scatterlist itself if the platform
639supports dynamic DMA mapping in hardware) in your driver structures and/or 634supports dynamic DMA mapping in hardware) in your driver structures and/or
640in the card registers. 635in the card registers.
641 636
642All PCI drivers should be using these interfaces with no exceptions. 637All drivers should be using these interfaces with no exceptions. It
643It is planned to completely remove virt_to_bus() and bus_to_virt() as 638is planned to completely remove virt_to_bus() and bus_to_virt() as
644they are entirely deprecated. Some ports already do not provide these 639they are entirely deprecated. Some ports already do not provide these
645as it is impossible to correctly support them. 640as it is impossible to correctly support them.
646 641
647 Optimizing Unmap State Space Consumption 642 Optimizing Unmap State Space Consumption
648 643
649On many platforms, pci_unmap_{single,page}() is simply a nop. 644On many platforms, dma_unmap_{single,page}() is simply a nop.
650Therefore, keeping track of the mapping address and length is a waste 645Therefore, keeping track of the mapping address and length is a waste
651of space. Instead of filling your drivers up with ifdefs and the like 646of space. Instead of filling your drivers up with ifdefs and the like
652to "work around" this (which would defeat the whole purpose of a 647to "work around" this (which would defeat the whole purpose of a
@@ -655,7 +650,7 @@ portable API) the following facilities are provided.
655Actually, instead of describing the macros one by one, we'll 650Actually, instead of describing the macros one by one, we'll
656transform some example code. 651transform some example code.
657 652
6581) Use DECLARE_PCI_UNMAP_{ADDR,LEN} in state saving structures. 6531) Use DEFINE_DMA_UNMAP_{ADDR,LEN} in state saving structures.
659 Example, before: 654 Example, before:
660 655
661 struct ring_state { 656 struct ring_state {
@@ -668,14 +663,11 @@ transform some example code.
668 663
669 struct ring_state { 664 struct ring_state {
670 struct sk_buff *skb; 665 struct sk_buff *skb;
671 DECLARE_PCI_UNMAP_ADDR(mapping) 666 DEFINE_DMA_UNMAP_ADDR(mapping);
672 DECLARE_PCI_UNMAP_LEN(len) 667 DEFINE_DMA_UNMAP_LEN(len);
673 }; 668 };
674 669
675 NOTE: DO NOT put a semicolon at the end of the DECLARE_*() 6702) Use dma_unmap_{addr,len}_set to set these values.
676 macro.
677
6782) Use pci_unmap_{addr,len}_set to set these values.
679 Example, before: 671 Example, before:
680 672
681 ringp->mapping = FOO; 673 ringp->mapping = FOO;
@@ -683,21 +675,21 @@ transform some example code.
683 675
684 after: 676 after:
685 677
686 pci_unmap_addr_set(ringp, mapping, FOO); 678 dma_unmap_addr_set(ringp, mapping, FOO);
687 pci_unmap_len_set(ringp, len, BAR); 679 dma_unmap_len_set(ringp, len, BAR);
688 680
6893) Use pci_unmap_{addr,len} to access these values. 6813) Use dma_unmap_{addr,len} to access these values.
690 Example, before: 682 Example, before:
691 683
692 pci_unmap_single(pdev, ringp->mapping, ringp->len, 684 dma_unmap_single(dev, ringp->mapping, ringp->len,
693 PCI_DMA_FROMDEVICE); 685 DMA_FROM_DEVICE);
694 686
695 after: 687 after:
696 688
697 pci_unmap_single(pdev, 689 dma_unmap_single(dev,
698 pci_unmap_addr(ringp, mapping), 690 dma_unmap_addr(ringp, mapping),
699 pci_unmap_len(ringp, len), 691 dma_unmap_len(ringp, len),
700 PCI_DMA_FROMDEVICE); 692 DMA_FROM_DEVICE);
701 693
702It really should be self-explanatory. We treat the ADDR and LEN 694It really should be self-explanatory. We treat the ADDR and LEN
703separately, because it is possible for an implementation to only 695separately, because it is possible for an implementation to only
@@ -732,15 +724,15 @@ to "Closing".
732DMA address space is limited on some architectures and an allocation 724DMA address space is limited on some architectures and an allocation
733failure can be determined by: 725failure can be determined by:
734 726
735- checking if pci_alloc_consistent returns NULL or pci_map_sg returns 0 727- checking if dma_alloc_coherent returns NULL or dma_map_sg returns 0
736 728
737- checking the returned dma_addr_t of pci_map_single and pci_map_page 729- checking the returned dma_addr_t of dma_map_single and dma_map_page
738 by using pci_dma_mapping_error(): 730 by using dma_mapping_error():
739 731
740 dma_addr_t dma_handle; 732 dma_addr_t dma_handle;
741 733
742 dma_handle = pci_map_single(pdev, addr, size, direction); 734 dma_handle = dma_map_single(dev, addr, size, direction);
743 if (pci_dma_mapping_error(pdev, dma_handle)) { 735 if (dma_mapping_error(dev, dma_handle)) {
744 /* 736 /*
745 * reduce current DMA mapping usage, 737 * reduce current DMA mapping usage,
746 * delay and try again later or 738 * delay and try again later or
diff --git a/Documentation/SubmitChecklist b/Documentation/SubmitChecklist
index 1053a56be3b1..8916ca48bc95 100644
--- a/Documentation/SubmitChecklist
+++ b/Documentation/SubmitChecklist
@@ -9,10 +9,14 @@ Documentation/SubmittingPatches and elsewhere regarding submitting Linux
9kernel patches. 9kernel patches.
10 10
11 11
121: Builds cleanly with applicable or modified CONFIG options =y, =m, and 121: If you use a facility then #include the file that defines/declares
13 that facility. Don't depend on other header files pulling in ones
14 that you use.
15
162: Builds cleanly with applicable or modified CONFIG options =y, =m, and
13 =n. No gcc warnings/errors, no linker warnings/errors. 17 =n. No gcc warnings/errors, no linker warnings/errors.
14 18
152: Passes allnoconfig, allmodconfig 192b: Passes allnoconfig, allmodconfig
16 20
173: Builds on multiple CPU architectures by using local cross-compile tools 213: Builds on multiple CPU architectures by using local cross-compile tools
18 or some other build farm. 22 or some other build farm.
diff --git a/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt b/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
index 76b3a11e90be..fa968aa99d67 100644
--- a/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
+++ b/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
@@ -14,8 +14,8 @@ Introduction
14 how the clocks are arranged. The first implementation used as single 14 how the clocks are arranged. The first implementation used as single
15 PLL to feed the ARM, memory and peripherals via a series of dividers 15 PLL to feed the ARM, memory and peripherals via a series of dividers
16 and muxes and this is the implementation that is documented here. A 16 and muxes and this is the implementation that is documented here. A
17 newer version where there is a seperate PLL and clock divider for the 17 newer version where there is a separate PLL and clock divider for the
18 ARM core is available as a seperate driver. 18 ARM core is available as a separate driver.
19 19
20 20
21Layout 21Layout
diff --git a/Documentation/arm/Samsung/Overview.txt b/Documentation/arm/Samsung/Overview.txt
new file mode 100644
index 000000000000..7cced1fea9c3
--- /dev/null
+++ b/Documentation/arm/Samsung/Overview.txt
@@ -0,0 +1,86 @@
1 Samsung ARM Linux Overview
2 ==========================
3
4Introduction
5------------
6
7 The Samsung range of ARM SoCs spans many similar devices, from the initial
8 ARM9 through to the newest ARM cores. This document shows an overview of
9 the current kernel support, how to use it and where to find the code
10 that supports this.
11
12 The currently supported SoCs are:
13
14 - S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list
15 - S3C64XX: S3C6400 and S3C6410
16 - S5PC6440
17
18 S5PC100 and S5PC110 support is currently being merged
19
20
21S3C24XX Systems
22---------------
23
24 There is still documentation in Documnetation/arm/Samsung-S3C24XX/ which
25 deals with the architecture and drivers specific to these devices.
26
27 See Documentation/arm/Samsung-S3C24XX/Overview.txt for more information
28 on the implementation details and specific support.
29
30
31Configuration
32-------------
33
34 A number of configurations are supplied, as there is no current way of
35 unifying all the SoCs into one kernel.
36
37 s5p6440_defconfig - S5P6440 specific default configuration
38 s5pc100_defconfig - S5PC100 specific default configuration
39
40
41Layout
42------
43
44 The directory layout is currently being restructured, and consists of
45 several platform directories and then the machine specific directories
46 of the CPUs being built for.
47
48 plat-samsung provides the base for all the implementations, and is the
49 last in the line of include directories that are processed for the build
50 specific information. It contains the base clock, GPIO and device definitions
51 to get the system running.
52
53 plat-s3c is the s3c24xx/s3c64xx platform directory, although it is currently
54 involved in other builds this will be phased out once the relevant code is
55 moved elsewhere.
56
57 plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs.
58
59 plat-s3c64xx is for the s3c64xx specific bits, see the S3C24XX docs.
60
61 plat-s5p is for s5p specific builds, more to be added.
62
63
64 [ to finish ]
65
66
67Port Contributors
68-----------------
69
70 Ben Dooks (BJD)
71 Vincent Sanders
72 Herbert Potzl
73 Arnaud Patard (RTP)
74 Roc Wu
75 Klaus Fetscher
76 Dimitry Andric
77 Shannon Holland
78 Guillaume Gourat (NexVision)
79 Christer Weinigel (wingel) (Acer N30)
80 Lucas Correia Villa Real (S3C2400 port)
81
82
83Document Author
84---------------
85
86Copyright 2009-2010 Ben Dooks <ben-linux@fluff.org>
diff --git a/Documentation/arm/Samsung/clksrc-change-registers.awk b/Documentation/arm/Samsung/clksrc-change-registers.awk
new file mode 100755
index 000000000000..0c50220851fb
--- /dev/null
+++ b/Documentation/arm/Samsung/clksrc-change-registers.awk
@@ -0,0 +1,167 @@
1#!/usr/bin/awk -f
2#
3# Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4#
5# Released under GPLv2
6
7# example usage
8# ./clksrc-change-registers.awk arch/arm/plat-s5pc1xx/include/plat/regs-clock.h < src > dst
9
10function extract_value(s)
11{
12 eqat = index(s, "=")
13 comat = index(s, ",")
14 return substr(s, eqat+2, (comat-eqat)-2)
15}
16
17function remove_brackets(b)
18{
19 return substr(b, 2, length(b)-2)
20}
21
22function splitdefine(l, p)
23{
24 r = split(l, tp)
25
26 p[0] = tp[2]
27 p[1] = remove_brackets(tp[3])
28}
29
30function find_length(f)
31{
32 if (0)
33 printf "find_length " f "\n" > "/dev/stderr"
34
35 if (f ~ /0x1/)
36 return 1
37 else if (f ~ /0x3/)
38 return 2
39 else if (f ~ /0x7/)
40 return 3
41 else if (f ~ /0xf/)
42 return 4
43
44 printf "unknown legnth " f "\n" > "/dev/stderr"
45 exit
46}
47
48function find_shift(s)
49{
50 id = index(s, "<")
51 if (id <= 0) {
52 printf "cannot find shift " s "\n" > "/dev/stderr"
53 exit
54 }
55
56 return substr(s, id+2)
57}
58
59
60BEGIN {
61 if (ARGC < 2) {
62 print "too few arguments" > "/dev/stderr"
63 exit
64 }
65
66# read the header file and find the mask values that we will need
67# to replace and create an associative array of values
68
69 while (getline line < ARGV[1] > 0) {
70 if (line ~ /\#define.*_MASK/ &&
71 !(line ~ /S5PC100_EPLL_MASK/) &&
72 !(line ~ /USB_SIG_MASK/)) {
73 splitdefine(line, fields)
74 name = fields[0]
75 if (0)
76 printf "MASK " line "\n" > "/dev/stderr"
77 dmask[name,0] = find_length(fields[1])
78 dmask[name,1] = find_shift(fields[1])
79 if (0)
80 printf "=> '" name "' LENGTH=" dmask[name,0] " SHIFT=" dmask[name,1] "\n" > "/dev/stderr"
81 } else {
82 }
83 }
84
85 delete ARGV[1]
86}
87
88/clksrc_clk.*=.*{/ {
89 shift=""
90 mask=""
91 divshift=""
92 reg_div=""
93 reg_src=""
94 indent=1
95
96 print $0
97
98 for(; indent >= 1;) {
99 if ((getline line) <= 0) {
100 printf "unexpected end of file" > "/dev/stderr"
101 exit 1;
102 }
103
104 if (line ~ /\.shift/) {
105 shift = extract_value(line)
106 } else if (line ~ /\.mask/) {
107 mask = extract_value(line)
108 } else if (line ~ /\.reg_divider/) {
109 reg_div = extract_value(line)
110 } else if (line ~ /\.reg_source/) {
111 reg_src = extract_value(line)
112 } else if (line ~ /\.divider_shift/) {
113 divshift = extract_value(line)
114 } else if (line ~ /{/) {
115 indent++
116 print line
117 } else if (line ~ /}/) {
118 indent--
119
120 if (indent == 0) {
121 if (0) {
122 printf "shift '" shift "' ='" dmask[shift,0] "'\n" > "/dev/stderr"
123 printf "mask '" mask "'\n" > "/dev/stderr"
124 printf "dshft '" divshift "'\n" > "/dev/stderr"
125 printf "rdiv '" reg_div "'\n" > "/dev/stderr"
126 printf "rsrc '" reg_src "'\n" > "/dev/stderr"
127 }
128
129 generated = mask
130 sub(reg_src, reg_div, generated)
131
132 if (0) {
133 printf "/* rsrc " reg_src " */\n"
134 printf "/* rdiv " reg_div " */\n"
135 printf "/* shift " shift " */\n"
136 printf "/* mask " mask " */\n"
137 printf "/* generated " generated " */\n"
138 }
139
140 if (reg_div != "") {
141 printf "\t.reg_div = { "
142 printf ".reg = " reg_div ", "
143 printf ".shift = " dmask[generated,1] ", "
144 printf ".size = " dmask[generated,0] ", "
145 printf "},\n"
146 }
147
148 printf "\t.reg_src = { "
149 printf ".reg = " reg_src ", "
150 printf ".shift = " dmask[mask,1] ", "
151 printf ".size = " dmask[mask,0] ", "
152
153 printf "},\n"
154
155 }
156
157 print line
158 } else {
159 print line
160 }
161
162 if (0)
163 printf indent ":" line "\n" > "/dev/stderr"
164 }
165}
166
167// && ! /clksrc_clk.*=.*{/ { print $0 }
diff --git a/Documentation/cgroups/cgroup_event_listener.c b/Documentation/cgroups/cgroup_event_listener.c
new file mode 100644
index 000000000000..8c2bfc4a6358
--- /dev/null
+++ b/Documentation/cgroups/cgroup_event_listener.c
@@ -0,0 +1,110 @@
1/*
2 * cgroup_event_listener.c - Simple listener of cgroup events
3 *
4 * Copyright (C) Kirill A. Shutemov <kirill@shutemov.name>
5 */
6
7#include <assert.h>
8#include <errno.h>
9#include <fcntl.h>
10#include <libgen.h>
11#include <limits.h>
12#include <stdio.h>
13#include <string.h>
14#include <unistd.h>
15
16#include <sys/eventfd.h>
17
18#define USAGE_STR "Usage: cgroup_event_listener <path-to-control-file> <args>\n"
19
20int main(int argc, char **argv)
21{
22 int efd = -1;
23 int cfd = -1;
24 int event_control = -1;
25 char event_control_path[PATH_MAX];
26 char line[LINE_MAX];
27 int ret;
28
29 if (argc != 3) {
30 fputs(USAGE_STR, stderr);
31 return 1;
32 }
33
34 cfd = open(argv[1], O_RDONLY);
35 if (cfd == -1) {
36 fprintf(stderr, "Cannot open %s: %s\n", argv[1],
37 strerror(errno));
38 goto out;
39 }
40
41 ret = snprintf(event_control_path, PATH_MAX, "%s/cgroup.event_control",
42 dirname(argv[1]));
43 if (ret >= PATH_MAX) {
44 fputs("Path to cgroup.event_control is too long\n", stderr);
45 goto out;
46 }
47
48 event_control = open(event_control_path, O_WRONLY);
49 if (event_control == -1) {
50 fprintf(stderr, "Cannot open %s: %s\n", event_control_path,
51 strerror(errno));
52 goto out;
53 }
54
55 efd = eventfd(0, 0);
56 if (efd == -1) {
57 perror("eventfd() failed");
58 goto out;
59 }
60
61 ret = snprintf(line, LINE_MAX, "%d %d %s", efd, cfd, argv[2]);
62 if (ret >= LINE_MAX) {
63 fputs("Arguments string is too long\n", stderr);
64 goto out;
65 }
66
67 ret = write(event_control, line, strlen(line) + 1);
68 if (ret == -1) {
69 perror("Cannot write to cgroup.event_control");
70 goto out;
71 }
72
73 while (1) {
74 uint64_t result;
75
76 ret = read(efd, &result, sizeof(result));
77 if (ret == -1) {
78 if (errno == EINTR)
79 continue;
80 perror("Cannot read from eventfd");
81 break;
82 }
83 assert(ret == sizeof(result));
84
85 ret = access(event_control_path, W_OK);
86 if ((ret == -1) && (errno == ENOENT)) {
87 puts("The cgroup seems to have removed.");
88 ret = 0;
89 break;
90 }
91
92 if (ret == -1) {
93 perror("cgroup.event_control "
94 "is not accessable any more");
95 break;
96 }
97
98 printf("%s %s: crossed\n", argv[1], argv[2]);
99 }
100
101out:
102 if (efd >= 0)
103 close(efd);
104 if (event_control >= 0)
105 close(event_control);
106 if (cfd >= 0)
107 close(cfd);
108
109 return (ret != 0);
110}
diff --git a/Documentation/cgroups/cgroups.txt b/Documentation/cgroups/cgroups.txt
index 0b33bfe7dde9..fd588ff0e296 100644
--- a/Documentation/cgroups/cgroups.txt
+++ b/Documentation/cgroups/cgroups.txt
@@ -22,6 +22,8 @@ CONTENTS:
222. Usage Examples and Syntax 222. Usage Examples and Syntax
23 2.1 Basic Usage 23 2.1 Basic Usage
24 2.2 Attaching processes 24 2.2 Attaching processes
25 2.3 Mounting hierarchies by name
26 2.4 Notification API
253. Kernel API 273. Kernel API
26 3.1 Overview 28 3.1 Overview
27 3.2 Synchronization 29 3.2 Synchronization
@@ -434,6 +436,25 @@ you give a subsystem a name.
434The name of the subsystem appears as part of the hierarchy description 436The name of the subsystem appears as part of the hierarchy description
435in /proc/mounts and /proc/<pid>/cgroups. 437in /proc/mounts and /proc/<pid>/cgroups.
436 438
4392.4 Notification API
440--------------------
441
442There is mechanism which allows to get notifications about changing
443status of a cgroup.
444
445To register new notification handler you need:
446 - create a file descriptor for event notification using eventfd(2);
447 - open a control file to be monitored (e.g. memory.usage_in_bytes);
448 - write "<event_fd> <control_fd> <args>" to cgroup.event_control.
449 Interpretation of args is defined by control file implementation;
450
451eventfd will be woken up by control file implementation or when the
452cgroup is removed.
453
454To unregister notification handler just close eventfd.
455
456NOTE: Support of notifications should be implemented for the control
457file. See documentation for the subsystem.
437 458
4383. Kernel API 4593. Kernel API
439============= 460=============
@@ -488,6 +509,11 @@ Each subsystem should:
488- add an entry in linux/cgroup_subsys.h 509- add an entry in linux/cgroup_subsys.h
489- define a cgroup_subsys object called <name>_subsys 510- define a cgroup_subsys object called <name>_subsys
490 511
512If a subsystem can be compiled as a module, it should also have in its
513module initcall a call to cgroup_load_subsys(), and in its exitcall a
514call to cgroup_unload_subsys(). It should also set its_subsys.module =
515THIS_MODULE in its .c file.
516
491Each subsystem may export the following methods. The only mandatory 517Each subsystem may export the following methods. The only mandatory
492methods are create/destroy. Any others that are null are presumed to 518methods are create/destroy. Any others that are null are presumed to
493be successful no-ops. 519be successful no-ops.
@@ -536,10 +562,21 @@ returns an error, this will abort the attach operation. If a NULL
536task is passed, then a successful result indicates that *any* 562task is passed, then a successful result indicates that *any*
537unspecified task can be moved into the cgroup. Note that this isn't 563unspecified task can be moved into the cgroup. Note that this isn't
538called on a fork. If this method returns 0 (success) then this should 564called on a fork. If this method returns 0 (success) then this should
539remain valid while the caller holds cgroup_mutex. If threadgroup is 565remain valid while the caller holds cgroup_mutex and it is ensured that either
566attach() or cancel_attach() will be called in future. If threadgroup is
540true, then a successful result indicates that all threads in the given 567true, then a successful result indicates that all threads in the given
541thread's threadgroup can be moved together. 568thread's threadgroup can be moved together.
542 569
570void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
571 struct task_struct *task, bool threadgroup)
572(cgroup_mutex held by caller)
573
574Called when a task attach operation has failed after can_attach() has succeeded.
575A subsystem whose can_attach() has some side-effects should provide this
576function, so that the subsytem can implement a rollback. If not, not necessary.
577This will be called only about subsystems whose can_attach() operation have
578succeeded.
579
543void attach(struct cgroup_subsys *ss, struct cgroup *cgrp, 580void attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
544 struct cgroup *old_cgrp, struct task_struct *task, 581 struct cgroup *old_cgrp, struct task_struct *task,
545 bool threadgroup) 582 bool threadgroup)
diff --git a/Documentation/cgroups/cpusets.txt b/Documentation/cgroups/cpusets.txt
index 1d7e9784439a..4160df82b3f5 100644
--- a/Documentation/cgroups/cpusets.txt
+++ b/Documentation/cgroups/cpusets.txt
@@ -168,20 +168,20 @@ Each cpuset is represented by a directory in the cgroup file system
168containing (on top of the standard cgroup files) the following 168containing (on top of the standard cgroup files) the following
169files describing that cpuset: 169files describing that cpuset:
170 170
171 - cpus: list of CPUs in that cpuset 171 - cpuset.cpus: list of CPUs in that cpuset
172 - mems: list of Memory Nodes in that cpuset 172 - cpuset.mems: list of Memory Nodes in that cpuset
173 - memory_migrate flag: if set, move pages to cpusets nodes 173 - cpuset.memory_migrate flag: if set, move pages to cpusets nodes
174 - cpu_exclusive flag: is cpu placement exclusive? 174 - cpuset.cpu_exclusive flag: is cpu placement exclusive?
175 - mem_exclusive flag: is memory placement exclusive? 175 - cpuset.mem_exclusive flag: is memory placement exclusive?
176 - mem_hardwall flag: is memory allocation hardwalled 176 - cpuset.mem_hardwall flag: is memory allocation hardwalled
177 - memory_pressure: measure of how much paging pressure in cpuset 177 - cpuset.memory_pressure: measure of how much paging pressure in cpuset
178 - memory_spread_page flag: if set, spread page cache evenly on allowed nodes 178 - cpuset.memory_spread_page flag: if set, spread page cache evenly on allowed nodes
179 - memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes 179 - cpuset.memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes
180 - sched_load_balance flag: if set, load balance within CPUs on that cpuset 180 - cpuset.sched_load_balance flag: if set, load balance within CPUs on that cpuset
181 - sched_relax_domain_level: the searching range when migrating tasks 181 - cpuset.sched_relax_domain_level: the searching range when migrating tasks
182 182
183In addition, the root cpuset only has the following file: 183In addition, the root cpuset only has the following file:
184 - memory_pressure_enabled flag: compute memory_pressure? 184 - cpuset.memory_pressure_enabled flag: compute memory_pressure?
185 185
186New cpusets are created using the mkdir system call or shell 186New cpusets are created using the mkdir system call or shell
187command. The properties of a cpuset, such as its flags, allowed 187command. The properties of a cpuset, such as its flags, allowed
@@ -229,7 +229,7 @@ If a cpuset is cpu or mem exclusive, no other cpuset, other than
229a direct ancestor or descendant, may share any of the same CPUs or 229a direct ancestor or descendant, may share any of the same CPUs or
230Memory Nodes. 230Memory Nodes.
231 231
232A cpuset that is mem_exclusive *or* mem_hardwall is "hardwalled", 232A cpuset that is cpuset.mem_exclusive *or* cpuset.mem_hardwall is "hardwalled",
233i.e. it restricts kernel allocations for page, buffer and other data 233i.e. it restricts kernel allocations for page, buffer and other data
234commonly shared by the kernel across multiple users. All cpusets, 234commonly shared by the kernel across multiple users. All cpusets,
235whether hardwalled or not, restrict allocations of memory for user 235whether hardwalled or not, restrict allocations of memory for user
@@ -304,15 +304,15 @@ times 1000.
304--------------------------- 304---------------------------
305There are two boolean flag files per cpuset that control where the 305There are two boolean flag files per cpuset that control where the
306kernel allocates pages for the file system buffers and related in 306kernel allocates pages for the file system buffers and related in
307kernel data structures. They are called 'memory_spread_page' and 307kernel data structures. They are called 'cpuset.memory_spread_page' and
308'memory_spread_slab'. 308'cpuset.memory_spread_slab'.
309 309
310If the per-cpuset boolean flag file 'memory_spread_page' is set, then 310If the per-cpuset boolean flag file 'cpuset.memory_spread_page' is set, then
311the kernel will spread the file system buffers (page cache) evenly 311the kernel will spread the file system buffers (page cache) evenly
312over all the nodes that the faulting task is allowed to use, instead 312over all the nodes that the faulting task is allowed to use, instead
313of preferring to put those pages on the node where the task is running. 313of preferring to put those pages on the node where the task is running.
314 314
315If the per-cpuset boolean flag file 'memory_spread_slab' is set, 315If the per-cpuset boolean flag file 'cpuset.memory_spread_slab' is set,
316then the kernel will spread some file system related slab caches, 316then the kernel will spread some file system related slab caches,
317such as for inodes and dentries evenly over all the nodes that the 317such as for inodes and dentries evenly over all the nodes that the
318faulting task is allowed to use, instead of preferring to put those 318faulting task is allowed to use, instead of preferring to put those
@@ -337,21 +337,21 @@ their containing tasks memory spread settings. If memory spreading
337is turned off, then the currently specified NUMA mempolicy once again 337is turned off, then the currently specified NUMA mempolicy once again
338applies to memory page allocations. 338applies to memory page allocations.
339 339
340Both 'memory_spread_page' and 'memory_spread_slab' are boolean flag 340Both 'cpuset.memory_spread_page' and 'cpuset.memory_spread_slab' are boolean flag
341files. By default they contain "0", meaning that the feature is off 341files. By default they contain "0", meaning that the feature is off
342for that cpuset. If a "1" is written to that file, then that turns 342for that cpuset. If a "1" is written to that file, then that turns
343the named feature on. 343the named feature on.
344 344
345The implementation is simple. 345The implementation is simple.
346 346
347Setting the flag 'memory_spread_page' turns on a per-process flag 347Setting the flag 'cpuset.memory_spread_page' turns on a per-process flag
348PF_SPREAD_PAGE for each task that is in that cpuset or subsequently 348PF_SPREAD_PAGE for each task that is in that cpuset or subsequently
349joins that cpuset. The page allocation calls for the page cache 349joins that cpuset. The page allocation calls for the page cache
350is modified to perform an inline check for this PF_SPREAD_PAGE task 350is modified to perform an inline check for this PF_SPREAD_PAGE task
351flag, and if set, a call to a new routine cpuset_mem_spread_node() 351flag, and if set, a call to a new routine cpuset_mem_spread_node()
352returns the node to prefer for the allocation. 352returns the node to prefer for the allocation.
353 353
354Similarly, setting 'memory_spread_slab' turns on the flag 354Similarly, setting 'cpuset.memory_spread_slab' turns on the flag
355PF_SPREAD_SLAB, and appropriately marked slab caches will allocate 355PF_SPREAD_SLAB, and appropriately marked slab caches will allocate
356pages from the node returned by cpuset_mem_spread_node(). 356pages from the node returned by cpuset_mem_spread_node().
357 357
@@ -404,24 +404,24 @@ the following two situations:
404 system overhead on those CPUs, including avoiding task load 404 system overhead on those CPUs, including avoiding task load
405 balancing if that is not needed. 405 balancing if that is not needed.
406 406
407When the per-cpuset flag "sched_load_balance" is enabled (the default 407When the per-cpuset flag "cpuset.sched_load_balance" is enabled (the default
408setting), it requests that all the CPUs in that cpusets allowed 'cpus' 408setting), it requests that all the CPUs in that cpusets allowed 'cpuset.cpus'
409be contained in a single sched domain, ensuring that load balancing 409be contained in a single sched domain, ensuring that load balancing
410can move a task (not otherwised pinned, as by sched_setaffinity) 410can move a task (not otherwised pinned, as by sched_setaffinity)
411from any CPU in that cpuset to any other. 411from any CPU in that cpuset to any other.
412 412
413When the per-cpuset flag "sched_load_balance" is disabled, then the 413When the per-cpuset flag "cpuset.sched_load_balance" is disabled, then the
414scheduler will avoid load balancing across the CPUs in that cpuset, 414scheduler will avoid load balancing across the CPUs in that cpuset,
415--except-- in so far as is necessary because some overlapping cpuset 415--except-- in so far as is necessary because some overlapping cpuset
416has "sched_load_balance" enabled. 416has "sched_load_balance" enabled.
417 417
418So, for example, if the top cpuset has the flag "sched_load_balance" 418So, for example, if the top cpuset has the flag "cpuset.sched_load_balance"
419enabled, then the scheduler will have one sched domain covering all 419enabled, then the scheduler will have one sched domain covering all
420CPUs, and the setting of the "sched_load_balance" flag in any other 420CPUs, and the setting of the "cpuset.sched_load_balance" flag in any other
421cpusets won't matter, as we're already fully load balancing. 421cpusets won't matter, as we're already fully load balancing.
422 422
423Therefore in the above two situations, the top cpuset flag 423Therefore in the above two situations, the top cpuset flag
424"sched_load_balance" should be disabled, and only some of the smaller, 424"cpuset.sched_load_balance" should be disabled, and only some of the smaller,
425child cpusets have this flag enabled. 425child cpusets have this flag enabled.
426 426
427When doing this, you don't usually want to leave any unpinned tasks in 427When doing this, you don't usually want to leave any unpinned tasks in
@@ -433,7 +433,7 @@ scheduler might not consider the possibility of load balancing that
433task to that underused CPU. 433task to that underused CPU.
434 434
435Of course, tasks pinned to a particular CPU can be left in a cpuset 435Of course, tasks pinned to a particular CPU can be left in a cpuset
436that disables "sched_load_balance" as those tasks aren't going anywhere 436that disables "cpuset.sched_load_balance" as those tasks aren't going anywhere
437else anyway. 437else anyway.
438 438
439There is an impedance mismatch here, between cpusets and sched domains. 439There is an impedance mismatch here, between cpusets and sched domains.
@@ -443,19 +443,19 @@ overlap and each CPU is in at most one sched domain.
443It is necessary for sched domains to be flat because load balancing 443It is necessary for sched domains to be flat because load balancing
444across partially overlapping sets of CPUs would risk unstable dynamics 444across partially overlapping sets of CPUs would risk unstable dynamics
445that would be beyond our understanding. So if each of two partially 445that would be beyond our understanding. So if each of two partially
446overlapping cpusets enables the flag 'sched_load_balance', then we 446overlapping cpusets enables the flag 'cpuset.sched_load_balance', then we
447form a single sched domain that is a superset of both. We won't move 447form a single sched domain that is a superset of both. We won't move
448a task to a CPU outside it cpuset, but the scheduler load balancing 448a task to a CPU outside it cpuset, but the scheduler load balancing
449code might waste some compute cycles considering that possibility. 449code might waste some compute cycles considering that possibility.
450 450
451This mismatch is why there is not a simple one-to-one relation 451This mismatch is why there is not a simple one-to-one relation
452between which cpusets have the flag "sched_load_balance" enabled, 452between which cpusets have the flag "cpuset.sched_load_balance" enabled,
453and the sched domain configuration. If a cpuset enables the flag, it 453and the sched domain configuration. If a cpuset enables the flag, it
454will get balancing across all its CPUs, but if it disables the flag, 454will get balancing across all its CPUs, but if it disables the flag,
455it will only be assured of no load balancing if no other overlapping 455it will only be assured of no load balancing if no other overlapping
456cpuset enables the flag. 456cpuset enables the flag.
457 457
458If two cpusets have partially overlapping 'cpus' allowed, and only 458If two cpusets have partially overlapping 'cpuset.cpus' allowed, and only
459one of them has this flag enabled, then the other may find its 459one of them has this flag enabled, then the other may find its
460tasks only partially load balanced, just on the overlapping CPUs. 460tasks only partially load balanced, just on the overlapping CPUs.
461This is just the general case of the top_cpuset example given a few 461This is just the general case of the top_cpuset example given a few
@@ -468,23 +468,23 @@ load balancing to the other CPUs.
4681.7.1 sched_load_balance implementation details. 4681.7.1 sched_load_balance implementation details.
469------------------------------------------------ 469------------------------------------------------
470 470
471The per-cpuset flag 'sched_load_balance' defaults to enabled (contrary 471The per-cpuset flag 'cpuset.sched_load_balance' defaults to enabled (contrary
472to most cpuset flags.) When enabled for a cpuset, the kernel will 472to most cpuset flags.) When enabled for a cpuset, the kernel will
473ensure that it can load balance across all the CPUs in that cpuset 473ensure that it can load balance across all the CPUs in that cpuset
474(makes sure that all the CPUs in the cpus_allowed of that cpuset are 474(makes sure that all the CPUs in the cpus_allowed of that cpuset are
475in the same sched domain.) 475in the same sched domain.)
476 476
477If two overlapping cpusets both have 'sched_load_balance' enabled, 477If two overlapping cpusets both have 'cpuset.sched_load_balance' enabled,
478then they will be (must be) both in the same sched domain. 478then they will be (must be) both in the same sched domain.
479 479
480If, as is the default, the top cpuset has 'sched_load_balance' enabled, 480If, as is the default, the top cpuset has 'cpuset.sched_load_balance' enabled,
481then by the above that means there is a single sched domain covering 481then by the above that means there is a single sched domain covering
482the whole system, regardless of any other cpuset settings. 482the whole system, regardless of any other cpuset settings.
483 483
484The kernel commits to user space that it will avoid load balancing 484The kernel commits to user space that it will avoid load balancing
485where it can. It will pick as fine a granularity partition of sched 485where it can. It will pick as fine a granularity partition of sched
486domains as it can while still providing load balancing for any set 486domains as it can while still providing load balancing for any set
487of CPUs allowed to a cpuset having 'sched_load_balance' enabled. 487of CPUs allowed to a cpuset having 'cpuset.sched_load_balance' enabled.
488 488
489The internal kernel cpuset to scheduler interface passes from the 489The internal kernel cpuset to scheduler interface passes from the
490cpuset code to the scheduler code a partition of the load balanced 490cpuset code to the scheduler code a partition of the load balanced
@@ -495,9 +495,9 @@ all the CPUs that must be load balanced.
495The cpuset code builds a new such partition and passes it to the 495The cpuset code builds a new such partition and passes it to the
496scheduler sched domain setup code, to have the sched domains rebuilt 496scheduler sched domain setup code, to have the sched domains rebuilt
497as necessary, whenever: 497as necessary, whenever:
498 - the 'sched_load_balance' flag of a cpuset with non-empty CPUs changes, 498 - the 'cpuset.sched_load_balance' flag of a cpuset with non-empty CPUs changes,
499 - or CPUs come or go from a cpuset with this flag enabled, 499 - or CPUs come or go from a cpuset with this flag enabled,
500 - or 'sched_relax_domain_level' value of a cpuset with non-empty CPUs 500 - or 'cpuset.sched_relax_domain_level' value of a cpuset with non-empty CPUs
501 and with this flag enabled changes, 501 and with this flag enabled changes,
502 - or a cpuset with non-empty CPUs and with this flag enabled is removed, 502 - or a cpuset with non-empty CPUs and with this flag enabled is removed,
503 - or a cpu is offlined/onlined. 503 - or a cpu is offlined/onlined.
@@ -542,7 +542,7 @@ As the result, task B on CPU X need to wait task A or wait load balance
542on the next tick. For some applications in special situation, waiting 542on the next tick. For some applications in special situation, waiting
5431 tick may be too long. 5431 tick may be too long.
544 544
545The 'sched_relax_domain_level' file allows you to request changing 545The 'cpuset.sched_relax_domain_level' file allows you to request changing
546this searching range as you like. This file takes int value which 546this searching range as you like. This file takes int value which
547indicates size of searching range in levels ideally as follows, 547indicates size of searching range in levels ideally as follows,
548otherwise initial value -1 that indicates the cpuset has no request. 548otherwise initial value -1 that indicates the cpuset has no request.
@@ -559,8 +559,8 @@ The system default is architecture dependent. The system default
559can be changed using the relax_domain_level= boot parameter. 559can be changed using the relax_domain_level= boot parameter.
560 560
561This file is per-cpuset and affect the sched domain where the cpuset 561This file is per-cpuset and affect the sched domain where the cpuset
562belongs to. Therefore if the flag 'sched_load_balance' of a cpuset 562belongs to. Therefore if the flag 'cpuset.sched_load_balance' of a cpuset
563is disabled, then 'sched_relax_domain_level' have no effect since 563is disabled, then 'cpuset.sched_relax_domain_level' have no effect since
564there is no sched domain belonging the cpuset. 564there is no sched domain belonging the cpuset.
565 565
566If multiple cpusets are overlapping and hence they form a single sched 566If multiple cpusets are overlapping and hence they form a single sched
@@ -607,9 +607,9 @@ from one cpuset to another, then the kernel will adjust the tasks
607memory placement, as above, the next time that the kernel attempts 607memory placement, as above, the next time that the kernel attempts
608to allocate a page of memory for that task. 608to allocate a page of memory for that task.
609 609
610If a cpuset has its 'cpus' modified, then each task in that cpuset 610If a cpuset has its 'cpuset.cpus' modified, then each task in that cpuset
611will have its allowed CPU placement changed immediately. Similarly, 611will have its allowed CPU placement changed immediately. Similarly,
612if a tasks pid is written to another cpusets 'tasks' file, then its 612if a tasks pid is written to another cpusets 'cpuset.tasks' file, then its
613allowed CPU placement is changed immediately. If such a task had been 613allowed CPU placement is changed immediately. If such a task had been
614bound to some subset of its cpuset using the sched_setaffinity() call, 614bound to some subset of its cpuset using the sched_setaffinity() call,
615the task will be allowed to run on any CPU allowed in its new cpuset, 615the task will be allowed to run on any CPU allowed in its new cpuset,
@@ -622,8 +622,8 @@ and the processor placement is updated immediately.
622Normally, once a page is allocated (given a physical page 622Normally, once a page is allocated (given a physical page
623of main memory) then that page stays on whatever node it 623of main memory) then that page stays on whatever node it
624was allocated, so long as it remains allocated, even if the 624was allocated, so long as it remains allocated, even if the
625cpusets memory placement policy 'mems' subsequently changes. 625cpusets memory placement policy 'cpuset.mems' subsequently changes.
626If the cpuset flag file 'memory_migrate' is set true, then when 626If the cpuset flag file 'cpuset.memory_migrate' is set true, then when
627tasks are attached to that cpuset, any pages that task had 627tasks are attached to that cpuset, any pages that task had
628allocated to it on nodes in its previous cpuset are migrated 628allocated to it on nodes in its previous cpuset are migrated
629to the tasks new cpuset. The relative placement of the page within 629to the tasks new cpuset. The relative placement of the page within
@@ -631,12 +631,12 @@ the cpuset is preserved during these migration operations if possible.
631For example if the page was on the second valid node of the prior cpuset 631For example if the page was on the second valid node of the prior cpuset
632then the page will be placed on the second valid node of the new cpuset. 632then the page will be placed on the second valid node of the new cpuset.
633 633
634Also if 'memory_migrate' is set true, then if that cpusets 634Also if 'cpuset.memory_migrate' is set true, then if that cpusets
635'mems' file is modified, pages allocated to tasks in that 635'cpuset.mems' file is modified, pages allocated to tasks in that
636cpuset, that were on nodes in the previous setting of 'mems', 636cpuset, that were on nodes in the previous setting of 'cpuset.mems',
637will be moved to nodes in the new setting of 'mems.' 637will be moved to nodes in the new setting of 'mems.'
638Pages that were not in the tasks prior cpuset, or in the cpusets 638Pages that were not in the tasks prior cpuset, or in the cpusets
639prior 'mems' setting, will not be moved. 639prior 'cpuset.mems' setting, will not be moved.
640 640
641There is an exception to the above. If hotplug functionality is used 641There is an exception to the above. If hotplug functionality is used
642to remove all the CPUs that are currently assigned to a cpuset, 642to remove all the CPUs that are currently assigned to a cpuset,
@@ -678,8 +678,8 @@ and then start a subshell 'sh' in that cpuset:
678 cd /dev/cpuset 678 cd /dev/cpuset
679 mkdir Charlie 679 mkdir Charlie
680 cd Charlie 680 cd Charlie
681 /bin/echo 2-3 > cpus 681 /bin/echo 2-3 > cpuset.cpus
682 /bin/echo 1 > mems 682 /bin/echo 1 > cpuset.mems
683 /bin/echo $$ > tasks 683 /bin/echo $$ > tasks
684 sh 684 sh
685 # The subshell 'sh' is now running in cpuset Charlie 685 # The subshell 'sh' is now running in cpuset Charlie
@@ -725,10 +725,13 @@ Now you want to do something with this cpuset.
725 725
726In this directory you can find several files: 726In this directory you can find several files:
727# ls 727# ls
728cpu_exclusive memory_migrate mems tasks 728cpuset.cpu_exclusive cpuset.memory_spread_slab
729cpus memory_pressure notify_on_release 729cpuset.cpus cpuset.mems
730mem_exclusive memory_spread_page sched_load_balance 730cpuset.mem_exclusive cpuset.sched_load_balance
731mem_hardwall memory_spread_slab sched_relax_domain_level 731cpuset.mem_hardwall cpuset.sched_relax_domain_level
732cpuset.memory_migrate notify_on_release
733cpuset.memory_pressure tasks
734cpuset.memory_spread_page
732 735
733Reading them will give you information about the state of this cpuset: 736Reading them will give you information about the state of this cpuset:
734the CPUs and Memory Nodes it can use, the processes that are using 737the CPUs and Memory Nodes it can use, the processes that are using
@@ -736,13 +739,13 @@ it, its properties. By writing to these files you can manipulate
736the cpuset. 739the cpuset.
737 740
738Set some flags: 741Set some flags:
739# /bin/echo 1 > cpu_exclusive 742# /bin/echo 1 > cpuset.cpu_exclusive
740 743
741Add some cpus: 744Add some cpus:
742# /bin/echo 0-7 > cpus 745# /bin/echo 0-7 > cpuset.cpus
743 746
744Add some mems: 747Add some mems:
745# /bin/echo 0-7 > mems 748# /bin/echo 0-7 > cpuset.mems
746 749
747Now attach your shell to this cpuset: 750Now attach your shell to this cpuset:
748# /bin/echo $$ > tasks 751# /bin/echo $$ > tasks
@@ -774,28 +777,28 @@ echo "/sbin/cpuset_release_agent" > /dev/cpuset/release_agent
774This is the syntax to use when writing in the cpus or mems files 777This is the syntax to use when writing in the cpus or mems files
775in cpuset directories: 778in cpuset directories:
776 779
777# /bin/echo 1-4 > cpus -> set cpus list to cpus 1,2,3,4 780# /bin/echo 1-4 > cpuset.cpus -> set cpus list to cpus 1,2,3,4
778# /bin/echo 1,2,3,4 > cpus -> set cpus list to cpus 1,2,3,4 781# /bin/echo 1,2,3,4 > cpuset.cpus -> set cpus list to cpus 1,2,3,4
779 782
780To add a CPU to a cpuset, write the new list of CPUs including the 783To add a CPU to a cpuset, write the new list of CPUs including the
781CPU to be added. To add 6 to the above cpuset: 784CPU to be added. To add 6 to the above cpuset:
782 785
783# /bin/echo 1-4,6 > cpus -> set cpus list to cpus 1,2,3,4,6 786# /bin/echo 1-4,6 > cpuset.cpus -> set cpus list to cpus 1,2,3,4,6
784 787
785Similarly to remove a CPU from a cpuset, write the new list of CPUs 788Similarly to remove a CPU from a cpuset, write the new list of CPUs
786without the CPU to be removed. 789without the CPU to be removed.
787 790
788To remove all the CPUs: 791To remove all the CPUs:
789 792
790# /bin/echo "" > cpus -> clear cpus list 793# /bin/echo "" > cpuset.cpus -> clear cpus list
791 794
7922.3 Setting flags 7952.3 Setting flags
793----------------- 796-----------------
794 797
795The syntax is very simple: 798The syntax is very simple:
796 799
797# /bin/echo 1 > cpu_exclusive -> set flag 'cpu_exclusive' 800# /bin/echo 1 > cpuset.cpu_exclusive -> set flag 'cpuset.cpu_exclusive'
798# /bin/echo 0 > cpu_exclusive -> unset flag 'cpu_exclusive' 801# /bin/echo 0 > cpuset.cpu_exclusive -> unset flag 'cpuset.cpu_exclusive'
799 802
8002.4 Attaching processes 8032.4 Attaching processes
801----------------------- 804-----------------------
diff --git a/Documentation/cgroups/memcg_test.txt b/Documentation/cgroups/memcg_test.txt
index 72db89ed0609..f7f68b2ac199 100644
--- a/Documentation/cgroups/memcg_test.txt
+++ b/Documentation/cgroups/memcg_test.txt
@@ -1,6 +1,6 @@
1Memory Resource Controller(Memcg) Implementation Memo. 1Memory Resource Controller(Memcg) Implementation Memo.
2Last Updated: 2009/1/20 2Last Updated: 2010/2
3Base Kernel Version: based on 2.6.29-rc2. 3Base Kernel Version: based on 2.6.33-rc7-mm(candidate for 34).
4 4
5Because VM is getting complex (one of reasons is memcg...), memcg's behavior 5Because VM is getting complex (one of reasons is memcg...), memcg's behavior
6is complex. This is a document for memcg's internal behavior. 6is complex. This is a document for memcg's internal behavior.
@@ -337,7 +337,7 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.
337 race and lock dependency with other cgroup subsystems. 337 race and lock dependency with other cgroup subsystems.
338 338
339 example) 339 example)
340 # mount -t cgroup none /cgroup -t cpuset,memory,cpu,devices 340 # mount -t cgroup none /cgroup -o cpuset,memory,cpu,devices
341 341
342 and do task move, mkdir, rmdir etc...under this. 342 and do task move, mkdir, rmdir etc...under this.
343 343
@@ -348,7 +348,7 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.
348 348
349 For example, test like following is good. 349 For example, test like following is good.
350 (Shell-A) 350 (Shell-A)
351 # mount -t cgroup none /cgroup -t memory 351 # mount -t cgroup none /cgroup -o memory
352 # mkdir /cgroup/test 352 # mkdir /cgroup/test
353 # echo 40M > /cgroup/test/memory.limit_in_bytes 353 # echo 40M > /cgroup/test/memory.limit_in_bytes
354 # echo 0 > /cgroup/test/tasks 354 # echo 0 > /cgroup/test/tasks
@@ -378,3 +378,42 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.
378 #echo 50M > memory.limit_in_bytes 378 #echo 50M > memory.limit_in_bytes
379 #echo 50M > memory.memsw.limit_in_bytes 379 #echo 50M > memory.memsw.limit_in_bytes
380 run 51M of malloc 380 run 51M of malloc
381
382 9.9 Move charges at task migration
383 Charges associated with a task can be moved along with task migration.
384
385 (Shell-A)
386 #mkdir /cgroup/A
387 #echo $$ >/cgroup/A/tasks
388 run some programs which uses some amount of memory in /cgroup/A.
389
390 (Shell-B)
391 #mkdir /cgroup/B
392 #echo 1 >/cgroup/B/memory.move_charge_at_immigrate
393 #echo "pid of the program running in group A" >/cgroup/B/tasks
394
395 You can see charges have been moved by reading *.usage_in_bytes or
396 memory.stat of both A and B.
397 See 8.2 of Documentation/cgroups/memory.txt to see what value should be
398 written to move_charge_at_immigrate.
399
400 9.10 Memory thresholds
401 Memory controler implements memory thresholds using cgroups notification
402 API. You can use Documentation/cgroups/cgroup_event_listener.c to test
403 it.
404
405 (Shell-A) Create cgroup and run event listener
406 # mkdir /cgroup/A
407 # ./cgroup_event_listener /cgroup/A/memory.usage_in_bytes 5M
408
409 (Shell-B) Add task to cgroup and try to allocate and free memory
410 # echo $$ >/cgroup/A/tasks
411 # a="$(dd if=/dev/zero bs=1M count=10)"
412 # a=
413
414 You will see message from cgroup_event_listener every time you cross
415 the thresholds.
416
417 Use /cgroup/A/memory.memsw.usage_in_bytes to test memsw thresholds.
418
419 It's good idea to test root cgroup as well.
diff --git a/Documentation/cgroups/memory.txt b/Documentation/cgroups/memory.txt
index b871f2552b45..f8bc802d70b9 100644
--- a/Documentation/cgroups/memory.txt
+++ b/Documentation/cgroups/memory.txt
@@ -182,6 +182,8 @@ list.
182NOTE: Reclaim does not work for the root cgroup, since we cannot set any 182NOTE: Reclaim does not work for the root cgroup, since we cannot set any
183limits on the root cgroup. 183limits on the root cgroup.
184 184
185Note2: When panic_on_oom is set to "2", the whole system will panic.
186
1852. Locking 1872. Locking
186 188
187The memory controller uses the following hierarchy 189The memory controller uses the following hierarchy
@@ -262,10 +264,12 @@ some of the pages cached in the cgroup (page cache pages).
2624.2 Task migration 2644.2 Task migration
263 265
264When a task migrates from one cgroup to another, it's charge is not 266When a task migrates from one cgroup to another, it's charge is not
265carried forward. The pages allocated from the original cgroup still 267carried forward by default. The pages allocated from the original cgroup still
266remain charged to it, the charge is dropped when the page is freed or 268remain charged to it, the charge is dropped when the page is freed or
267reclaimed. 269reclaimed.
268 270
271Note: You can move charges of a task along with task migration. See 8.
272
2694.3 Removing a cgroup 2734.3 Removing a cgroup
270 274
271A cgroup can be removed by rmdir, but as discussed in sections 4.1 and 4.2, a 275A cgroup can be removed by rmdir, but as discussed in sections 4.1 and 4.2, a
@@ -377,7 +381,8 @@ The feature can be disabled by
377NOTE1: Enabling/disabling will fail if the cgroup already has other 381NOTE1: Enabling/disabling will fail if the cgroup already has other
378cgroups created below it. 382cgroups created below it.
379 383
380NOTE2: This feature can be enabled/disabled per subtree. 384NOTE2: When panic_on_oom is set to "2", the whole system will panic in
385case of an oom event in any cgroup.
381 386
3827. Soft limits 3877. Soft limits
383 388
@@ -414,7 +419,76 @@ NOTE1: Soft limits take effect over a long period of time, since they involve
414NOTE2: It is recommended to set the soft limit always below the hard limit, 419NOTE2: It is recommended to set the soft limit always below the hard limit,
415 otherwise the hard limit will take precedence. 420 otherwise the hard limit will take precedence.
416 421
4178. TODO 4228. Move charges at task migration
423
424Users can move charges associated with a task along with task migration, that
425is, uncharge task's pages from the old cgroup and charge them to the new cgroup.
426This feature is not supported in !CONFIG_MMU environments because of lack of
427page tables.
428
4298.1 Interface
430
431This feature is disabled by default. It can be enabled(and disabled again) by
432writing to memory.move_charge_at_immigrate of the destination cgroup.
433
434If you want to enable it:
435
436# echo (some positive value) > memory.move_charge_at_immigrate
437
438Note: Each bits of move_charge_at_immigrate has its own meaning about what type
439 of charges should be moved. See 8.2 for details.
440Note: Charges are moved only when you move mm->owner, IOW, a leader of a thread
441 group.
442Note: If we cannot find enough space for the task in the destination cgroup, we
443 try to make space by reclaiming memory. Task migration may fail if we
444 cannot make enough space.
445Note: It can take several seconds if you move charges in giga bytes order.
446
447And if you want disable it again:
448
449# echo 0 > memory.move_charge_at_immigrate
450
4518.2 Type of charges which can be move
452
453Each bits of move_charge_at_immigrate has its own meaning about what type of
454charges should be moved.
455
456 bit | what type of charges would be moved ?
457 -----+------------------------------------------------------------------------
458 0 | A charge of an anonymous page(or swap of it) used by the target task.
459 | Those pages and swaps must be used only by the target task. You must
460 | enable Swap Extension(see 2.4) to enable move of swap charges.
461
462Note: Those pages and swaps must be charged to the old cgroup.
463Note: More type of pages(e.g. file cache, shmem,) will be supported by other
464 bits in future.
465
4668.3 TODO
467
468- Add support for other types of pages(e.g. file cache, shmem, etc.).
469- Implement madvise(2) to let users decide the vma to be moved or not to be
470 moved.
471- All of moving charge operations are done under cgroup_mutex. It's not good
472 behavior to hold the mutex too long, so we may need some trick.
473
4749. Memory thresholds
475
476Memory controler implements memory thresholds using cgroups notification
477API (see cgroups.txt). It allows to register multiple memory and memsw
478thresholds and gets notifications when it crosses.
479
480To register a threshold application need:
481 - create an eventfd using eventfd(2);
482 - open memory.usage_in_bytes or memory.memsw.usage_in_bytes;
483 - write string like "<event_fd> <memory.usage_in_bytes> <threshold>" to
484 cgroup.event_control.
485
486Application will be notified through eventfd when memory usage crosses
487threshold in any direction.
488
489It's applicable for root and non-root cgroup.
490
49110. TODO
418 492
4191. Add support for accounting huge pages (as a separate controller) 4931. Add support for accounting huge pages (as a separate controller)
4202. Make per-cgroup scanner reclaim not-shared pages first 4942. Make per-cgroup scanner reclaim not-shared pages first
diff --git a/Documentation/console/console.txt b/Documentation/console/console.txt
index 877a1b26cc3d..926cf1b5e63e 100644
--- a/Documentation/console/console.txt
+++ b/Documentation/console/console.txt
@@ -74,7 +74,7 @@ driver takes over the consoles vacated by the driver. Binding, on the other
74hand, will bind the driver to the consoles that are currently occupied by a 74hand, will bind the driver to the consoles that are currently occupied by a
75system driver. 75system driver.
76 76
77NOTE1: Binding and binding must be selected in Kconfig. It's under: 77NOTE1: Binding and unbinding must be selected in Kconfig. It's under:
78 78
79Device Drivers -> Character devices -> Support for binding and unbinding 79Device Drivers -> Character devices -> Support for binding and unbinding
80console drivers 80console drivers
diff --git a/Documentation/driver-model/platform.txt b/Documentation/driver-model/platform.txt
index 2e2c2ea90ceb..41f41632ee55 100644
--- a/Documentation/driver-model/platform.txt
+++ b/Documentation/driver-model/platform.txt
@@ -192,7 +192,7 @@ command line. This will execute all matching early_param() callbacks.
192User specified early platform devices will be registered at this point. 192User specified early platform devices will be registered at this point.
193For the early serial console case the user can specify port on the 193For the early serial console case the user can specify port on the
194kernel command line as "earlyprintk=serial.0" where "earlyprintk" is 194kernel command line as "earlyprintk=serial.0" where "earlyprintk" is
195the class string, "serial" is the name of the platfrom driver and 195the class string, "serial" is the name of the platform driver and
1960 is the platform device id. If the id is -1 then the dot and the 1960 is the platform device id. If the id is -1 then the dot and the
197id can be omitted. 197id can be omitted.
198 198
diff --git a/Documentation/eisa.txt b/Documentation/eisa.txt
index 60e361ba08c0..f297fc1202ae 100644
--- a/Documentation/eisa.txt
+++ b/Documentation/eisa.txt
@@ -171,7 +171,7 @@ device.
171virtual_root.force_probe : 171virtual_root.force_probe :
172 172
173Force the probing code to probe EISA slots even when it cannot find an 173Force the probing code to probe EISA slots even when it cannot find an
174EISA compliant mainboard (nothing appears on slot 0). Defaultd to 0 174EISA compliant mainboard (nothing appears on slot 0). Defaults to 0
175(don't force), and set to 1 (force probing) when either 175(don't force), and set to 1 (force probing) when either
176CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set. 176CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set.
177 177
diff --git a/Documentation/email-clients.txt b/Documentation/email-clients.txt
index a618efab7b15..945ff3fda433 100644
--- a/Documentation/email-clients.txt
+++ b/Documentation/email-clients.txt
@@ -216,26 +216,14 @@ Works. Use "Insert file..." or external editor.
216~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 216~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
217Gmail (Web GUI) 217Gmail (Web GUI)
218 218
219If you just have to use Gmail to send patches, it CAN be made to work. It 219Does not work for sending patches.
220requires a bit of external help, though. 220
221 221Gmail web client converts tabs to spaces automatically.
222The first problem is that Gmail converts tabs to spaces. This will 222
223totally break your patches. To prevent this, you have to use a different 223At the same time it wraps lines every 78 chars with CRLF style line breaks
224editor. There is a firefox extension called "ViewSourceWith" 224although tab2space problem can be solved with external editor.
225(https://addons.mozilla.org/en-US/firefox/addon/394) which allows you to 225
226edit any text box in the editor of your choice. Configure it to launch 226Another problem is that Gmail will base64-encode any message that has a
227your favorite editor. When you want to send a patch, use this technique. 227non-ASCII character. That includes things like European names.
228Once you have crafted your messsage + patch, save and exit the editor,
229which should reload the Gmail edit box. GMAIL WILL PRESERVE THE TABS.
230Hoorah. Apparently you can cut-n-paste literal tabs, but Gmail will
231convert those to spaces upon sending!
232
233The second problem is that Gmail converts tabs to spaces on replies. If
234you reply to a patch, don't expect to be able to apply it as a patch.
235
236The last problem is that Gmail will base64-encode any message that has a
237non-ASCII character. That includes things like European names. Be aware.
238
239Gmail is not convenient for lkml patches, but CAN be made to work.
240 228
241 ### 229 ###
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index a5cc0db63d7a..ed511af0f79a 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -582,3 +582,10 @@ Why: The paravirt mmu host support is slower than non-paravirt mmu, both
582Who: Avi Kivity <avi@redhat.com> 582Who: Avi Kivity <avi@redhat.com>
583 583
584---------------------------- 584----------------------------
585
586What: "acpi=ht" boot option
587When: 2.6.35
588Why: Useful in 2003, implementation is a hack.
589 Generally invoked by accident today.
590 Seen as doing more harm than good.
591Who: Len Brown <len.brown@intel.com>
diff --git a/Documentation/filesystems/00-INDEX b/Documentation/filesystems/00-INDEX
index 5139b8c9d5af..3bae418c6ad3 100644
--- a/Documentation/filesystems/00-INDEX
+++ b/Documentation/filesystems/00-INDEX
@@ -32,6 +32,8 @@ dlmfs.txt
32 - info on the userspace interface to the OCFS2 DLM. 32 - info on the userspace interface to the OCFS2 DLM.
33dnotify.txt 33dnotify.txt
34 - info about directory notification in Linux. 34 - info about directory notification in Linux.
35dnotify_test.c
36 - example program for dnotify
35ecryptfs.txt 37ecryptfs.txt
36 - docs on eCryptfs: stacked cryptographic filesystem for Linux. 38 - docs on eCryptfs: stacked cryptographic filesystem for Linux.
37exofs.txt 39exofs.txt
diff --git a/Documentation/filesystems/Makefile b/Documentation/filesystems/Makefile
new file mode 100644
index 000000000000..a5dd114da14f
--- /dev/null
+++ b/Documentation/filesystems/Makefile
@@ -0,0 +1,8 @@
1# kbuild trick to avoid linker error. Can be omitted if a module is built.
2obj- := dummy.o
3
4# List of programs to build
5hostprogs-y := dnotify_test
6
7# Tell kbuild to always build the programs
8always := $(hostprogs-y)
diff --git a/Documentation/filesystems/dnotify.txt b/Documentation/filesystems/dnotify.txt
index 9f5d338ddbb8..6baf88f46859 100644
--- a/Documentation/filesystems/dnotify.txt
+++ b/Documentation/filesystems/dnotify.txt
@@ -62,38 +62,9 @@ disabled, fcntl(fd, F_NOTIFY, ...) will return -EINVAL.
62 62
63Example 63Example
64------- 64-------
65See Documentation/filesystems/dnotify_test.c for an example.
65 66
66 #define _GNU_SOURCE /* needed to get the defines */ 67NOTE
67 #include <fcntl.h> /* in glibc 2.2 this has the needed 68----
68 values defined */ 69Beginning with Linux 2.6.13, dnotify has been replaced by inotify.
69 #include <signal.h> 70See Documentation/filesystems/inotify.txt for more information on it.
70 #include <stdio.h>
71 #include <unistd.h>
72
73 static volatile int event_fd;
74
75 static void handler(int sig, siginfo_t *si, void *data)
76 {
77 event_fd = si->si_fd;
78 }
79
80 int main(void)
81 {
82 struct sigaction act;
83 int fd;
84
85 act.sa_sigaction = handler;
86 sigemptyset(&act.sa_mask);
87 act.sa_flags = SA_SIGINFO;
88 sigaction(SIGRTMIN + 1, &act, NULL);
89
90 fd = open(".", O_RDONLY);
91 fcntl(fd, F_SETSIG, SIGRTMIN + 1);
92 fcntl(fd, F_NOTIFY, DN_MODIFY|DN_CREATE|DN_MULTISHOT);
93 /* we will now be notified if any of the files
94 in "." is modified or new files are created */
95 while (1) {
96 pause();
97 printf("Got event on fd=%d\n", event_fd);
98 }
99 }
diff --git a/Documentation/filesystems/dnotify_test.c b/Documentation/filesystems/dnotify_test.c
new file mode 100644
index 000000000000..8b37b4a1e18d
--- /dev/null
+++ b/Documentation/filesystems/dnotify_test.c
@@ -0,0 +1,34 @@
1#define _GNU_SOURCE /* needed to get the defines */
2#include <fcntl.h> /* in glibc 2.2 this has the needed
3 values defined */
4#include <signal.h>
5#include <stdio.h>
6#include <unistd.h>
7
8static volatile int event_fd;
9
10static void handler(int sig, siginfo_t *si, void *data)
11{
12 event_fd = si->si_fd;
13}
14
15int main(void)
16{
17 struct sigaction act;
18 int fd;
19
20 act.sa_sigaction = handler;
21 sigemptyset(&act.sa_mask);
22 act.sa_flags = SA_SIGINFO;
23 sigaction(SIGRTMIN + 1, &act, NULL);
24
25 fd = open(".", O_RDONLY);
26 fcntl(fd, F_SETSIG, SIGRTMIN + 1);
27 fcntl(fd, F_NOTIFY, DN_MODIFY|DN_CREATE|DN_MULTISHOT);
28 /* we will now be notified if any of the files
29 in "." is modified or new files are created */
30 while (1) {
31 pause();
32 printf("Got event on fd=%d\n", event_fd);
33 }
34}
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index 96a44dd95e03..a4f30faa4f1f 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -195,7 +195,7 @@ asynchronous manner and the vaule may not be very precise. To see a precise
195snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table. 195snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table.
196It's slow but very precise. 196It's slow but very precise.
197 197
198Table 1-2: Contents of the statm files (as of 2.6.30-rc7) 198Table 1-2: Contents of the status files (as of 2.6.30-rc7)
199.............................................................................. 199..............................................................................
200 Field Content 200 Field Content
201 Name filename of the executable 201 Name filename of the executable
diff --git a/Documentation/hwmon/abituguru b/Documentation/hwmon/abituguru
index 87ffa0f5ec70..5eb3b9d5f0d5 100644
--- a/Documentation/hwmon/abituguru
+++ b/Documentation/hwmon/abituguru
@@ -30,7 +30,7 @@ Supported chips:
30 bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1 30 bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
31 You may also need to specify the fan_sensors option for these boards 31 You may also need to specify the fan_sensors option for these boards
32 fan_sensors=5 32 fan_sensors=5
33 2) There is a seperate abituguru3 driver for these motherboards, 33 2) There is a separate abituguru3 driver for these motherboards,
34 the abituguru (without the 3 !) driver will not work on these 34 the abituguru (without the 3 !) driver will not work on these
35 motherboards (and visa versa)! 35 motherboards (and visa versa)!
36 36
diff --git a/Documentation/input/rotary-encoder.txt b/Documentation/input/rotary-encoder.txt
index 3a6aec40c0b0..8b4129de1d2d 100644
--- a/Documentation/input/rotary-encoder.txt
+++ b/Documentation/input/rotary-encoder.txt
@@ -75,7 +75,7 @@ and the number of steps or will clamp at the maximum and zero depending on
75the configuration. 75the configuration.
76 76
77Because GPIO to IRQ mapping is platform specific, this information must 77Because GPIO to IRQ mapping is platform specific, this information must
78be given in seperately to the driver. See the example below. 78be given in separately to the driver. See the example below.
79 79
80---------<snip>--------- 80---------<snip>---------
81 81
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 3bc48b0bd3a9..e4cbca58536c 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -200,10 +200,6 @@ and is between 256 and 4096 characters. It is defined in the file
200 acpi_display_output=video 200 acpi_display_output=video
201 See above. 201 See above.
202 202
203 acpi_early_pdc_eval [HW,ACPI] Evaluate processor _PDC methods
204 early. Needed on some platforms to properly
205 initialize the EC.
206
207 acpi_irq_balance [HW,ACPI] 203 acpi_irq_balance [HW,ACPI]
208 ACPI will balance active IRQs 204 ACPI will balance active IRQs
209 default in APIC mode 205 default in APIC mode
diff --git a/Documentation/kobject.txt b/Documentation/kobject.txt
index c79ab996dada..bdb13817e1e9 100644
--- a/Documentation/kobject.txt
+++ b/Documentation/kobject.txt
@@ -266,7 +266,7 @@ kobj_type:
266 266
267 struct kobj_type { 267 struct kobj_type {
268 void (*release)(struct kobject *); 268 void (*release)(struct kobject *);
269 struct sysfs_ops *sysfs_ops; 269 const struct sysfs_ops *sysfs_ops;
270 struct attribute **default_attrs; 270 struct attribute **default_attrs;
271 }; 271 };
272 272
diff --git a/Documentation/laptops/00-INDEX b/Documentation/laptops/00-INDEX
index ee5692b26dd4..fa688538e757 100644
--- a/Documentation/laptops/00-INDEX
+++ b/Documentation/laptops/00-INDEX
@@ -2,6 +2,12 @@
2 - This file 2 - This file
3acer-wmi.txt 3acer-wmi.txt
4 - information on the Acer Laptop WMI Extras driver. 4 - information on the Acer Laptop WMI Extras driver.
5asus-laptop.txt
6 - information on the Asus Laptop Extras driver.
7disk-shock-protection.txt
8 - information on hard disk shock protection.
9dslm.c
10 - Simple Disk Sleep Monitor program
5laptop-mode.txt 11laptop-mode.txt
6 - how to conserve battery power using laptop-mode. 12 - how to conserve battery power using laptop-mode.
7sony-laptop.txt 13sony-laptop.txt
diff --git a/Documentation/laptops/Makefile b/Documentation/laptops/Makefile
new file mode 100644
index 000000000000..5cb144af3c09
--- /dev/null
+++ b/Documentation/laptops/Makefile
@@ -0,0 +1,8 @@
1# kbuild trick to avoid linker error. Can be omitted if a module is built.
2obj- := dummy.o
3
4# List of programs to build
5hostprogs-y := dslm
6
7# Tell kbuild to always build the programs
8always := $(hostprogs-y)
diff --git a/Documentation/laptops/dslm.c b/Documentation/laptops/dslm.c
new file mode 100644
index 000000000000..72ff290c5fc6
--- /dev/null
+++ b/Documentation/laptops/dslm.c
@@ -0,0 +1,166 @@
1/*
2 * dslm.c
3 * Simple Disk Sleep Monitor
4 * by Bartek Kania
5 * Licenced under the GPL
6 */
7#include <unistd.h>
8#include <stdlib.h>
9#include <stdio.h>
10#include <fcntl.h>
11#include <errno.h>
12#include <time.h>
13#include <string.h>
14#include <signal.h>
15#include <sys/ioctl.h>
16#include <linux/hdreg.h>
17
18#ifdef DEBUG
19#define D(x) x
20#else
21#define D(x)
22#endif
23
24int endit = 0;
25
26/* Check if the disk is in powersave-mode
27 * Most of the code is stolen from hdparm.
28 * 1 = active, 0 = standby/sleep, -1 = unknown */
29static int check_powermode(int fd)
30{
31 unsigned char args[4] = {WIN_CHECKPOWERMODE1,0,0,0};
32 int state;
33
34 if (ioctl(fd, HDIO_DRIVE_CMD, &args)
35 && (args[0] = WIN_CHECKPOWERMODE2) /* try again with 0x98 */
36 && ioctl(fd, HDIO_DRIVE_CMD, &args)) {
37 if (errno != EIO || args[0] != 0 || args[1] != 0) {
38 state = -1; /* "unknown"; */
39 } else
40 state = 0; /* "sleeping"; */
41 } else {
42 state = (args[2] == 255) ? 1 : 0;
43 }
44 D(printf(" drive state is: %d\n", state));
45
46 return state;
47}
48
49static char *state_name(int i)
50{
51 if (i == -1) return "unknown";
52 if (i == 0) return "sleeping";
53 if (i == 1) return "active";
54
55 return "internal error";
56}
57
58static char *myctime(time_t time)
59{
60 char *ts = ctime(&time);
61 ts[strlen(ts) - 1] = 0;
62
63 return ts;
64}
65
66static void measure(int fd)
67{
68 time_t start_time;
69 int last_state;
70 time_t last_time;
71 int curr_state;
72 time_t curr_time = 0;
73 time_t time_diff;
74 time_t active_time = 0;
75 time_t sleep_time = 0;
76 time_t unknown_time = 0;
77 time_t total_time = 0;
78 int changes = 0;
79 float tmp;
80
81 printf("Starting measurements\n");
82
83 last_state = check_powermode(fd);
84 start_time = last_time = time(0);
85 printf(" System is in state %s\n\n", state_name(last_state));
86
87 while(!endit) {
88 sleep(1);
89 curr_state = check_powermode(fd);
90
91 if (curr_state != last_state || endit) {
92 changes++;
93 curr_time = time(0);
94 time_diff = curr_time - last_time;
95
96 if (last_state == 1) active_time += time_diff;
97 else if (last_state == 0) sleep_time += time_diff;
98 else unknown_time += time_diff;
99
100 last_state = curr_state;
101 last_time = curr_time;
102
103 printf("%s: State-change to %s\n", myctime(curr_time),
104 state_name(curr_state));
105 }
106 }
107 changes--; /* Compensate for SIGINT */
108
109 total_time = time(0) - start_time;
110 printf("\nTotal running time: %lus\n", curr_time - start_time);
111 printf(" State changed %d times\n", changes);
112
113 tmp = (float)sleep_time / (float)total_time * 100;
114 printf(" Time in sleep state: %lus (%.2f%%)\n", sleep_time, tmp);
115 tmp = (float)active_time / (float)total_time * 100;
116 printf(" Time in active state: %lus (%.2f%%)\n", active_time, tmp);
117 tmp = (float)unknown_time / (float)total_time * 100;
118 printf(" Time in unknown state: %lus (%.2f%%)\n", unknown_time, tmp);
119}
120
121static void ender(int s)
122{
123 endit = 1;
124}
125
126static void usage(void)
127{
128 puts("usage: dslm [-w <time>] <disk>");
129 exit(0);
130}
131
132int main(int argc, char **argv)
133{
134 int fd;
135 char *disk = 0;
136 int settle_time = 60;
137
138 /* Parse the simple command-line */
139 if (argc == 2)
140 disk = argv[1];
141 else if (argc == 4) {
142 settle_time = atoi(argv[2]);
143 disk = argv[3];
144 } else
145 usage();
146
147 if (!(fd = open(disk, O_RDONLY|O_NONBLOCK))) {
148 printf("Can't open %s, because: %s\n", disk, strerror(errno));
149 exit(-1);
150 }
151
152 if (settle_time) {
153 printf("Waiting %d seconds for the system to settle down to "
154 "'normal'\n", settle_time);
155 sleep(settle_time);
156 } else
157 puts("Not waiting for system to settle down");
158
159 signal(SIGINT, ender);
160
161 measure(fd);
162
163 close(fd);
164
165 return 0;
166}
diff --git a/Documentation/laptops/laptop-mode.txt b/Documentation/laptops/laptop-mode.txt
index eeedee11c8c2..2c3c35093023 100644
--- a/Documentation/laptops/laptop-mode.txt
+++ b/Documentation/laptops/laptop-mode.txt
@@ -779,172 +779,4 @@ Monitoring tool
779--------------- 779---------------
780 780
781Bartek Kania submitted this, it can be used to measure how much time your disk 781Bartek Kania submitted this, it can be used to measure how much time your disk
782spends spun up/down. 782spends spun up/down. See Documentation/laptops/dslm.c
783
784---------------------------dslm.c BEGIN-----------------------------------------
785/*
786 * Simple Disk Sleep Monitor
787 * by Bartek Kania
788 * Licenced under the GPL
789 */
790#include <unistd.h>
791#include <stdlib.h>
792#include <stdio.h>
793#include <fcntl.h>
794#include <errno.h>
795#include <time.h>
796#include <string.h>
797#include <signal.h>
798#include <sys/ioctl.h>
799#include <linux/hdreg.h>
800
801#ifdef DEBUG
802#define D(x) x
803#else
804#define D(x)
805#endif
806
807int endit = 0;
808
809/* Check if the disk is in powersave-mode
810 * Most of the code is stolen from hdparm.
811 * 1 = active, 0 = standby/sleep, -1 = unknown */
812int check_powermode(int fd)
813{
814 unsigned char args[4] = {WIN_CHECKPOWERMODE1,0,0,0};
815 int state;
816
817 if (ioctl(fd, HDIO_DRIVE_CMD, &args)
818 && (args[0] = WIN_CHECKPOWERMODE2) /* try again with 0x98 */
819 && ioctl(fd, HDIO_DRIVE_CMD, &args)) {
820 if (errno != EIO || args[0] != 0 || args[1] != 0) {
821 state = -1; /* "unknown"; */
822 } else
823 state = 0; /* "sleeping"; */
824 } else {
825 state = (args[2] == 255) ? 1 : 0;
826 }
827 D(printf(" drive state is: %d\n", state));
828
829 return state;
830}
831
832char *state_name(int i)
833{
834 if (i == -1) return "unknown";
835 if (i == 0) return "sleeping";
836 if (i == 1) return "active";
837
838 return "internal error";
839}
840
841char *myctime(time_t time)
842{
843 char *ts = ctime(&time);
844 ts[strlen(ts) - 1] = 0;
845
846 return ts;
847}
848
849void measure(int fd)
850{
851 time_t start_time;
852 int last_state;
853 time_t last_time;
854 int curr_state;
855 time_t curr_time = 0;
856 time_t time_diff;
857 time_t active_time = 0;
858 time_t sleep_time = 0;
859 time_t unknown_time = 0;
860 time_t total_time = 0;
861 int changes = 0;
862 float tmp;
863
864 printf("Starting measurements\n");
865
866 last_state = check_powermode(fd);
867 start_time = last_time = time(0);
868 printf(" System is in state %s\n\n", state_name(last_state));
869
870 while(!endit) {
871 sleep(1);
872 curr_state = check_powermode(fd);
873
874 if (curr_state != last_state || endit) {
875 changes++;
876 curr_time = time(0);
877 time_diff = curr_time - last_time;
878
879 if (last_state == 1) active_time += time_diff;
880 else if (last_state == 0) sleep_time += time_diff;
881 else unknown_time += time_diff;
882
883 last_state = curr_state;
884 last_time = curr_time;
885
886 printf("%s: State-change to %s\n", myctime(curr_time),
887 state_name(curr_state));
888 }
889 }
890 changes--; /* Compensate for SIGINT */
891
892 total_time = time(0) - start_time;
893 printf("\nTotal running time: %lus\n", curr_time - start_time);
894 printf(" State changed %d times\n", changes);
895
896 tmp = (float)sleep_time / (float)total_time * 100;
897 printf(" Time in sleep state: %lus (%.2f%%)\n", sleep_time, tmp);
898 tmp = (float)active_time / (float)total_time * 100;
899 printf(" Time in active state: %lus (%.2f%%)\n", active_time, tmp);
900 tmp = (float)unknown_time / (float)total_time * 100;
901 printf(" Time in unknown state: %lus (%.2f%%)\n", unknown_time, tmp);
902}
903
904void ender(int s)
905{
906 endit = 1;
907}
908
909void usage()
910{
911 puts("usage: dslm [-w <time>] <disk>");
912 exit(0);
913}
914
915int main(int argc, char **argv)
916{
917 int fd;
918 char *disk = 0;
919 int settle_time = 60;
920
921 /* Parse the simple command-line */
922 if (argc == 2)
923 disk = argv[1];
924 else if (argc == 4) {
925 settle_time = atoi(argv[2]);
926 disk = argv[3];
927 } else
928 usage();
929
930 if (!(fd = open(disk, O_RDONLY|O_NONBLOCK))) {
931 printf("Can't open %s, because: %s\n", disk, strerror(errno));
932 exit(-1);
933 }
934
935 if (settle_time) {
936 printf("Waiting %d seconds for the system to settle down to "
937 "'normal'\n", settle_time);
938 sleep(settle_time);
939 } else
940 puts("Not waiting for system to settle down");
941
942 signal(SIGINT, ender);
943
944 measure(fd);
945
946 close(fd);
947
948 return 0;
949}
950---------------------------dslm.c END-------------------------------------------
diff --git a/Documentation/networking/skfp.txt b/Documentation/networking/skfp.txt
index abfddf81e34a..203ec66c9fb4 100644
--- a/Documentation/networking/skfp.txt
+++ b/Documentation/networking/skfp.txt
@@ -68,7 +68,7 @@ Compaq adapters (not tested):
68======================= 68=======================
69 69
70From v2.01 on, the driver is integrated in the linux kernel sources. 70From v2.01 on, the driver is integrated in the linux kernel sources.
71Therefor, the installation is the same as for any other adapter 71Therefore, the installation is the same as for any other adapter
72supported by the kernel. 72supported by the kernel.
73Refer to the manual of your distribution about the installation 73Refer to the manual of your distribution about the installation
74of network adapters. 74of network adapters.
diff --git a/Documentation/networking/timestamping/timestamping.c b/Documentation/networking/timestamping/timestamping.c
index a7936fe8444a..bab619a48214 100644
--- a/Documentation/networking/timestamping/timestamping.c
+++ b/Documentation/networking/timestamping/timestamping.c
@@ -370,7 +370,7 @@ int main(int argc, char **argv)
370 } 370 }
371 371
372 sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_UDP); 372 sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_UDP);
373 if (socket < 0) 373 if (sock < 0)
374 bail("socket"); 374 bail("socket");
375 375
376 memset(&device, 0, sizeof(device)); 376 memset(&device, 0, sizeof(device));
diff --git a/Documentation/pnp.txt b/Documentation/pnp.txt
index a327db67782a..763e4659bf18 100644
--- a/Documentation/pnp.txt
+++ b/Documentation/pnp.txt
@@ -57,7 +57,7 @@ PC standard floppy disk controller
57# cat resources 57# cat resources
58DISABLED 58DISABLED
59 59
60- Notice the string "DISABLED". THis means the device is not active. 60- Notice the string "DISABLED". This means the device is not active.
61 61
623.) check the device's possible configurations (optional) 623.) check the device's possible configurations (optional)
63# cat options 63# cat options
@@ -139,7 +139,7 @@ Plug and Play but it is planned to be in the near future.
139 139
140Requirements for a Linux PnP protocol: 140Requirements for a Linux PnP protocol:
1411.) the protocol must use EISA IDs 1411.) the protocol must use EISA IDs
1422.) the protocol must inform the PnP Layer of a devices current configuration 1422.) the protocol must inform the PnP Layer of a device's current configuration
143- the ability to set resources is optional but preferred. 143- the ability to set resources is optional but preferred.
144 144
145The following are PnP protocol related functions: 145The following are PnP protocol related functions:
@@ -158,7 +158,7 @@ pnp_remove_device
158- automatically will free mem used by the device and related structures 158- automatically will free mem used by the device and related structures
159 159
160pnp_add_id 160pnp_add_id
161- adds a EISA ID to the list of supported IDs for the specified device 161- adds an EISA ID to the list of supported IDs for the specified device
162 162
163For more information consult the source of a protocol such as 163For more information consult the source of a protocol such as
164/drivers/pnp/pnpbios/core.c. 164/drivers/pnp/pnpbios/core.c.
@@ -167,7 +167,7 @@ For more information consult the source of a protocol such as
167 167
168Linux Plug and Play Drivers 168Linux Plug and Play Drivers
169--------------------------- 169---------------------------
170 This section contains information for linux PnP driver developers. 170 This section contains information for Linux PnP driver developers.
171 171
172The New Way 172The New Way
173........... 173...........
@@ -235,11 +235,10 @@ static int __init serial8250_pnp_init(void)
235The Old Way 235The Old Way
236........... 236...........
237 237
238a series of compatibility functions have been created to make it easy to convert 238A series of compatibility functions have been created to make it easy to convert
239
240ISAPNP drivers. They should serve as a temporary solution only. 239ISAPNP drivers. They should serve as a temporary solution only.
241 240
242they are as follows: 241They are as follows:
243 242
244struct pnp_card *pnp_find_card(unsigned short vendor, 243struct pnp_card *pnp_find_card(unsigned short vendor,
245 unsigned short device, 244 unsigned short device,
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index ab00eeddecaf..55b859b3bc72 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -256,7 +256,7 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h:
256 to suspend the device again in future 256 to suspend the device again in future
257 257
258 int pm_runtime_resume(struct device *dev); 258 int pm_runtime_resume(struct device *dev);
259 - execute the subsystem-leve resume callback for the device; returns 0 on 259 - execute the subsystem-level resume callback for the device; returns 0 on
260 success, 1 if the device's run-time PM status was already 'active' or 260 success, 1 if the device's run-time PM status was already 'active' or
261 error code on failure, where -EAGAIN means it may be safe to attempt to 261 error code on failure, where -EAGAIN means it may be safe to attempt to
262 resume the device again in future, but 'power.runtime_error' should be 262 resume the device again in future, but 'power.runtime_error' should be
diff --git a/Documentation/s390/kvm.txt b/Documentation/s390/kvm.txt
index 6f5ceb0f09fc..85f3280d7ef6 100644
--- a/Documentation/s390/kvm.txt
+++ b/Documentation/s390/kvm.txt
@@ -102,7 +102,7 @@ args: unsigned long
102see also: include/linux/kvm.h 102see also: include/linux/kvm.h
103This ioctl stores the state of the cpu at the guest real address given as 103This ioctl stores the state of the cpu at the guest real address given as
104argument, unless one of the following values defined in include/linux/kvm.h 104argument, unless one of the following values defined in include/linux/kvm.h
105is given as arguement: 105is given as argument:
106KVM_S390_STORE_STATUS_NOADDR - the CPU stores its status to the save area in 106KVM_S390_STORE_STATUS_NOADDR - the CPU stores its status to the save area in
107absolute lowcore as defined by the principles of operation 107absolute lowcore as defined by the principles of operation
108KVM_S390_STORE_STATUS_PREFIXED - the CPU stores its status to the save area in 108KVM_S390_STORE_STATUS_PREFIXED - the CPU stores its status to the save area in
diff --git a/Documentation/scsi/ChangeLog.lpfc b/Documentation/scsi/ChangeLog.lpfc
index ff19a52fe004..2ffc1148eb95 100644
--- a/Documentation/scsi/ChangeLog.lpfc
+++ b/Documentation/scsi/ChangeLog.lpfc
@@ -989,8 +989,8 @@ Changes from 20040709 to 20040716
989 * Remove redundant port_cmp != 2 check in if 989 * Remove redundant port_cmp != 2 check in if
990 (!port_cmp) { .... if (port_cmp != 2).... } 990 (!port_cmp) { .... if (port_cmp != 2).... }
991 * Clock changes: removed struct clk_data and timerList. 991 * Clock changes: removed struct clk_data and timerList.
992 * Clock changes: seperate nodev_tmo and els_retry_delay into 2 992 * Clock changes: separate nodev_tmo and els_retry_delay into 2
993 seperate timers and convert to 1 argument changed 993 separate timers and convert to 1 argument changed
994 LPFC_NODE_FARP_PEND_t to struct lpfc_node_farp_pend convert 994 LPFC_NODE_FARP_PEND_t to struct lpfc_node_farp_pend convert
995 ipfarp_tmo to 1 argument convert target struct tmofunc and 995 ipfarp_tmo to 1 argument convert target struct tmofunc and
996 rtplunfunc to 1 argument * cr_count, cr_delay and 996 rtplunfunc to 1 argument * cr_count, cr_delay and
@@ -1514,7 +1514,7 @@ Changes from 20040402 to 20040409
1514 * Remove unused elxclock declaration in elx_sli.h. 1514 * Remove unused elxclock declaration in elx_sli.h.
1515 * Since everywhere IOCB_ENTRY is used, the return value is cast, 1515 * Since everywhere IOCB_ENTRY is used, the return value is cast,
1516 move the cast into the macro. 1516 move the cast into the macro.
1517 * Split ioctls out into seperate files 1517 * Split ioctls out into separate files
1518 1518
1519Changes from 20040326 to 20040402 1519Changes from 20040326 to 20040402
1520 1520
@@ -1534,7 +1534,7 @@ Changes from 20040326 to 20040402
1534 * Unused variable cleanup 1534 * Unused variable cleanup
1535 * Use Linux list macros for DMABUF_t 1535 * Use Linux list macros for DMABUF_t
1536 * Break up ioctls into 3 sections, dfc, util, hbaapi 1536 * Break up ioctls into 3 sections, dfc, util, hbaapi
1537 rearranged code so this could be easily seperated into a 1537 rearranged code so this could be easily separated into a
1538 differnet module later All 3 are currently turned on by 1538 differnet module later All 3 are currently turned on by
1539 defines in lpfc_ioctl.c LPFC_DFC_IOCTL, LPFC_UTIL_IOCTL, 1539 defines in lpfc_ioctl.c LPFC_DFC_IOCTL, LPFC_UTIL_IOCTL,
1540 LPFC_HBAAPI_IOCTL 1540 LPFC_HBAAPI_IOCTL
@@ -1551,7 +1551,7 @@ Changes from 20040326 to 20040402
1551 started by lpfc_online(). lpfc_offline() only stopped 1551 started by lpfc_online(). lpfc_offline() only stopped
1552 els_timeout routine. It now stops all timeout routines 1552 els_timeout routine. It now stops all timeout routines
1553 associated with that hba. 1553 associated with that hba.
1554 * Replace seperate next and prev pointers in struct 1554 * Replace separate next and prev pointers in struct
1555 lpfc_bindlist with list_head type. In elxHBA_t, replace 1555 lpfc_bindlist with list_head type. In elxHBA_t, replace
1556 fc_nlpbind_start and _end with fc_nlpbind_list and use 1556 fc_nlpbind_start and _end with fc_nlpbind_list and use
1557 list_head macros to access it. 1557 list_head macros to access it.
diff --git a/Documentation/serial/tty.txt b/Documentation/serial/tty.txt
index 5e5349a4fcd2..7c900507279f 100644
--- a/Documentation/serial/tty.txt
+++ b/Documentation/serial/tty.txt
@@ -105,6 +105,10 @@ write_wakeup() - May be called at any point between open and close.
105 is permitted to call the driver write method from 105 is permitted to call the driver write method from
106 this function. In such a situation defer it. 106 this function. In such a situation defer it.
107 107
108dcd_change() - Report to the tty line the current DCD pin status
109 changes and the relative timestamp. The timestamp
110 can be NULL.
111
108 112
109Driver Access 113Driver Access
110 114
diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt
index 33df82e3a398..bfcbbf88c44d 100644
--- a/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -1812,7 +1812,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
1812 Module snd-ua101 1812 Module snd-ua101
1813 ---------------- 1813 ----------------
1814 1814
1815 Module for the Edirol UA-101 audio/MIDI interface. 1815 Module for the Edirol UA-101/UA-1000 audio/MIDI interfaces.
1816 1816
1817 This module supports multiple devices, autoprobe and hotplugging. 1817 This module supports multiple devices, autoprobe and hotplugging.
1818 1818
diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt
index fc5790d36cd9..6c7d18c53f84 100644
--- a/Documentation/sysctl/vm.txt
+++ b/Documentation/sysctl/vm.txt
@@ -573,11 +573,14 @@ Because other nodes' memory may be free. This means system total status
573may be not fatal yet. 573may be not fatal yet.
574 574
575If this is set to 2, the kernel panics compulsorily even on the 575If this is set to 2, the kernel panics compulsorily even on the
576above-mentioned. 576above-mentioned. Even oom happens under memory cgroup, the whole
577system panics.
577 578
578The default value is 0. 579The default value is 0.
5791 and 2 are for failover of clustering. Please select either 5801 and 2 are for failover of clustering. Please select either
580according to your policy of failover. 581according to your policy of failover.
582panic_on_oom=2+kdump gives you very strong tool to investigate
583why oom happens. You can get snapshot.
581 584
582============================================================= 585=============================================================
583 586
diff --git a/Documentation/timers/00-INDEX b/Documentation/timers/00-INDEX
index 397dc35e1323..a9248da5cdbc 100644
--- a/Documentation/timers/00-INDEX
+++ b/Documentation/timers/00-INDEX
@@ -4,6 +4,8 @@ highres.txt
4 - High resolution timers and dynamic ticks design notes 4 - High resolution timers and dynamic ticks design notes
5hpet.txt 5hpet.txt
6 - High Precision Event Timer Driver for Linux 6 - High Precision Event Timer Driver for Linux
7hpet_example.c
8 - sample hpet timer test program
7hrtimers.txt 9hrtimers.txt
8 - subsystem for high-resolution kernel timers 10 - subsystem for high-resolution kernel timers
9timer_stats.txt 11timer_stats.txt
diff --git a/Documentation/timers/Makefile b/Documentation/timers/Makefile
new file mode 100644
index 000000000000..c85625f4ab25
--- /dev/null
+++ b/Documentation/timers/Makefile
@@ -0,0 +1,8 @@
1# kbuild trick to avoid linker error. Can be omitted if a module is built.
2obj- := dummy.o
3
4# List of programs to build
5hostprogs-y := hpet_example
6
7# Tell kbuild to always build the programs
8always := $(hostprogs-y)
diff --git a/Documentation/timers/hpet.txt b/Documentation/timers/hpet.txt
index 16d25e6b5a00..767392ffd31e 100644
--- a/Documentation/timers/hpet.txt
+++ b/Documentation/timers/hpet.txt
@@ -26,274 +26,5 @@ initialization. An example of this initialization can be found in
26arch/x86/kernel/hpet.c. 26arch/x86/kernel/hpet.c.
27 27
28The driver provides a userspace API which resembles the API found in the 28The driver provides a userspace API which resembles the API found in the
29RTC driver framework. An example user space program is provided below. 29RTC driver framework. An example user space program is provided in
30 30file:Documentation/timers/hpet_example.c
31#include <stdio.h>
32#include <stdlib.h>
33#include <unistd.h>
34#include <fcntl.h>
35#include <string.h>
36#include <memory.h>
37#include <malloc.h>
38#include <time.h>
39#include <ctype.h>
40#include <sys/types.h>
41#include <sys/wait.h>
42#include <signal.h>
43#include <fcntl.h>
44#include <errno.h>
45#include <sys/time.h>
46#include <linux/hpet.h>
47
48
49extern void hpet_open_close(int, const char **);
50extern void hpet_info(int, const char **);
51extern void hpet_poll(int, const char **);
52extern void hpet_fasync(int, const char **);
53extern void hpet_read(int, const char **);
54
55#include <sys/poll.h>
56#include <sys/ioctl.h>
57#include <signal.h>
58
59struct hpet_command {
60 char *command;
61 void (*func)(int argc, const char ** argv);
62} hpet_command[] = {
63 {
64 "open-close",
65 hpet_open_close
66 },
67 {
68 "info",
69 hpet_info
70 },
71 {
72 "poll",
73 hpet_poll
74 },
75 {
76 "fasync",
77 hpet_fasync
78 },
79};
80
81int
82main(int argc, const char ** argv)
83{
84 int i;
85
86 argc--;
87 argv++;
88
89 if (!argc) {
90 fprintf(stderr, "-hpet: requires command\n");
91 return -1;
92 }
93
94
95 for (i = 0; i < (sizeof (hpet_command) / sizeof (hpet_command[0])); i++)
96 if (!strcmp(argv[0], hpet_command[i].command)) {
97 argc--;
98 argv++;
99 fprintf(stderr, "-hpet: executing %s\n",
100 hpet_command[i].command);
101 hpet_command[i].func(argc, argv);
102 return 0;
103 }
104
105 fprintf(stderr, "do_hpet: command %s not implemented\n", argv[0]);
106
107 return -1;
108}
109
110void
111hpet_open_close(int argc, const char **argv)
112{
113 int fd;
114
115 if (argc != 1) {
116 fprintf(stderr, "hpet_open_close: device-name\n");
117 return;
118 }
119
120 fd = open(argv[0], O_RDONLY);
121 if (fd < 0)
122 fprintf(stderr, "hpet_open_close: open failed\n");
123 else
124 close(fd);
125
126 return;
127}
128
129void
130hpet_info(int argc, const char **argv)
131{
132}
133
134void
135hpet_poll(int argc, const char **argv)
136{
137 unsigned long freq;
138 int iterations, i, fd;
139 struct pollfd pfd;
140 struct hpet_info info;
141 struct timeval stv, etv;
142 struct timezone tz;
143 long usec;
144
145 if (argc != 3) {
146 fprintf(stderr, "hpet_poll: device-name freq iterations\n");
147 return;
148 }
149
150 freq = atoi(argv[1]);
151 iterations = atoi(argv[2]);
152
153 fd = open(argv[0], O_RDONLY);
154
155 if (fd < 0) {
156 fprintf(stderr, "hpet_poll: open of %s failed\n", argv[0]);
157 return;
158 }
159
160 if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
161 fprintf(stderr, "hpet_poll: HPET_IRQFREQ failed\n");
162 goto out;
163 }
164
165 if (ioctl(fd, HPET_INFO, &info) < 0) {
166 fprintf(stderr, "hpet_poll: failed to get info\n");
167 goto out;
168 }
169
170 fprintf(stderr, "hpet_poll: info.hi_flags 0x%lx\n", info.hi_flags);
171
172 if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
173 fprintf(stderr, "hpet_poll: HPET_EPI failed\n");
174 goto out;
175 }
176
177 if (ioctl(fd, HPET_IE_ON, 0) < 0) {
178 fprintf(stderr, "hpet_poll, HPET_IE_ON failed\n");
179 goto out;
180 }
181
182 pfd.fd = fd;
183 pfd.events = POLLIN;
184
185 for (i = 0; i < iterations; i++) {
186 pfd.revents = 0;
187 gettimeofday(&stv, &tz);
188 if (poll(&pfd, 1, -1) < 0)
189 fprintf(stderr, "hpet_poll: poll failed\n");
190 else {
191 long data;
192
193 gettimeofday(&etv, &tz);
194 usec = stv.tv_sec * 1000000 + stv.tv_usec;
195 usec = (etv.tv_sec * 1000000 + etv.tv_usec) - usec;
196
197 fprintf(stderr,
198 "hpet_poll: expired time = 0x%lx\n", usec);
199
200 fprintf(stderr, "hpet_poll: revents = 0x%x\n",
201 pfd.revents);
202
203 if (read(fd, &data, sizeof(data)) != sizeof(data)) {
204 fprintf(stderr, "hpet_poll: read failed\n");
205 }
206 else
207 fprintf(stderr, "hpet_poll: data 0x%lx\n",
208 data);
209 }
210 }
211
212out:
213 close(fd);
214 return;
215}
216
217static int hpet_sigio_count;
218
219static void
220hpet_sigio(int val)
221{
222 fprintf(stderr, "hpet_sigio: called\n");
223 hpet_sigio_count++;
224}
225
226void
227hpet_fasync(int argc, const char **argv)
228{
229 unsigned long freq;
230 int iterations, i, fd, value;
231 sig_t oldsig;
232 struct hpet_info info;
233
234 hpet_sigio_count = 0;
235 fd = -1;
236
237 if ((oldsig = signal(SIGIO, hpet_sigio)) == SIG_ERR) {
238 fprintf(stderr, "hpet_fasync: failed to set signal handler\n");
239 return;
240 }
241
242 if (argc != 3) {
243 fprintf(stderr, "hpet_fasync: device-name freq iterations\n");
244 goto out;
245 }
246
247 fd = open(argv[0], O_RDONLY);
248
249 if (fd < 0) {
250 fprintf(stderr, "hpet_fasync: failed to open %s\n", argv[0]);
251 return;
252 }
253
254
255 if ((fcntl(fd, F_SETOWN, getpid()) == 1) ||
256 ((value = fcntl(fd, F_GETFL)) == 1) ||
257 (fcntl(fd, F_SETFL, value | O_ASYNC) == 1)) {
258 fprintf(stderr, "hpet_fasync: fcntl failed\n");
259 goto out;
260 }
261
262 freq = atoi(argv[1]);
263 iterations = atoi(argv[2]);
264
265 if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
266 fprintf(stderr, "hpet_fasync: HPET_IRQFREQ failed\n");
267 goto out;
268 }
269
270 if (ioctl(fd, HPET_INFO, &info) < 0) {
271 fprintf(stderr, "hpet_fasync: failed to get info\n");
272 goto out;
273 }
274
275 fprintf(stderr, "hpet_fasync: info.hi_flags 0x%lx\n", info.hi_flags);
276
277 if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
278 fprintf(stderr, "hpet_fasync: HPET_EPI failed\n");
279 goto out;
280 }
281
282 if (ioctl(fd, HPET_IE_ON, 0) < 0) {
283 fprintf(stderr, "hpet_fasync, HPET_IE_ON failed\n");
284 goto out;
285 }
286
287 for (i = 0; i < iterations; i++) {
288 (void) pause();
289 fprintf(stderr, "hpet_fasync: count = %d\n", hpet_sigio_count);
290 }
291
292out:
293 signal(SIGIO, oldsig);
294
295 if (fd >= 0)
296 close(fd);
297
298 return;
299}
diff --git a/Documentation/timers/hpet_example.c b/Documentation/timers/hpet_example.c
new file mode 100644
index 000000000000..f9ce2d9fdfd5
--- /dev/null
+++ b/Documentation/timers/hpet_example.c
@@ -0,0 +1,269 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <unistd.h>
4#include <fcntl.h>
5#include <string.h>
6#include <memory.h>
7#include <malloc.h>
8#include <time.h>
9#include <ctype.h>
10#include <sys/types.h>
11#include <sys/wait.h>
12#include <signal.h>
13#include <fcntl.h>
14#include <errno.h>
15#include <sys/time.h>
16#include <linux/hpet.h>
17
18
19extern void hpet_open_close(int, const char **);
20extern void hpet_info(int, const char **);
21extern void hpet_poll(int, const char **);
22extern void hpet_fasync(int, const char **);
23extern void hpet_read(int, const char **);
24
25#include <sys/poll.h>
26#include <sys/ioctl.h>
27#include <signal.h>
28
29struct hpet_command {
30 char *command;
31 void (*func)(int argc, const char ** argv);
32} hpet_command[] = {
33 {
34 "open-close",
35 hpet_open_close
36 },
37 {
38 "info",
39 hpet_info
40 },
41 {
42 "poll",
43 hpet_poll
44 },
45 {
46 "fasync",
47 hpet_fasync
48 },
49};
50
51int
52main(int argc, const char ** argv)
53{
54 int i;
55
56 argc--;
57 argv++;
58
59 if (!argc) {
60 fprintf(stderr, "-hpet: requires command\n");
61 return -1;
62 }
63
64
65 for (i = 0; i < (sizeof (hpet_command) / sizeof (hpet_command[0])); i++)
66 if (!strcmp(argv[0], hpet_command[i].command)) {
67 argc--;
68 argv++;
69 fprintf(stderr, "-hpet: executing %s\n",
70 hpet_command[i].command);
71 hpet_command[i].func(argc, argv);
72 return 0;
73 }
74
75 fprintf(stderr, "do_hpet: command %s not implemented\n", argv[0]);
76
77 return -1;
78}
79
80void
81hpet_open_close(int argc, const char **argv)
82{
83 int fd;
84
85 if (argc != 1) {
86 fprintf(stderr, "hpet_open_close: device-name\n");
87 return;
88 }
89
90 fd = open(argv[0], O_RDONLY);
91 if (fd < 0)
92 fprintf(stderr, "hpet_open_close: open failed\n");
93 else
94 close(fd);
95
96 return;
97}
98
99void
100hpet_info(int argc, const char **argv)
101{
102}
103
104void
105hpet_poll(int argc, const char **argv)
106{
107 unsigned long freq;
108 int iterations, i, fd;
109 struct pollfd pfd;
110 struct hpet_info info;
111 struct timeval stv, etv;
112 struct timezone tz;
113 long usec;
114
115 if (argc != 3) {
116 fprintf(stderr, "hpet_poll: device-name freq iterations\n");
117 return;
118 }
119
120 freq = atoi(argv[1]);
121 iterations = atoi(argv[2]);
122
123 fd = open(argv[0], O_RDONLY);
124
125 if (fd < 0) {
126 fprintf(stderr, "hpet_poll: open of %s failed\n", argv[0]);
127 return;
128 }
129
130 if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
131 fprintf(stderr, "hpet_poll: HPET_IRQFREQ failed\n");
132 goto out;
133 }
134
135 if (ioctl(fd, HPET_INFO, &info) < 0) {
136 fprintf(stderr, "hpet_poll: failed to get info\n");
137 goto out;
138 }
139
140 fprintf(stderr, "hpet_poll: info.hi_flags 0x%lx\n", info.hi_flags);
141
142 if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
143 fprintf(stderr, "hpet_poll: HPET_EPI failed\n");
144 goto out;
145 }
146
147 if (ioctl(fd, HPET_IE_ON, 0) < 0) {
148 fprintf(stderr, "hpet_poll, HPET_IE_ON failed\n");
149 goto out;
150 }
151
152 pfd.fd = fd;
153 pfd.events = POLLIN;
154
155 for (i = 0; i < iterations; i++) {
156 pfd.revents = 0;
157 gettimeofday(&stv, &tz);
158 if (poll(&pfd, 1, -1) < 0)
159 fprintf(stderr, "hpet_poll: poll failed\n");
160 else {
161 long data;
162
163 gettimeofday(&etv, &tz);
164 usec = stv.tv_sec * 1000000 + stv.tv_usec;
165 usec = (etv.tv_sec * 1000000 + etv.tv_usec) - usec;
166
167 fprintf(stderr,
168 "hpet_poll: expired time = 0x%lx\n", usec);
169
170 fprintf(stderr, "hpet_poll: revents = 0x%x\n",
171 pfd.revents);
172
173 if (read(fd, &data, sizeof(data)) != sizeof(data)) {
174 fprintf(stderr, "hpet_poll: read failed\n");
175 }
176 else
177 fprintf(stderr, "hpet_poll: data 0x%lx\n",
178 data);
179 }
180 }
181
182out:
183 close(fd);
184 return;
185}
186
187static int hpet_sigio_count;
188
189static void
190hpet_sigio(int val)
191{
192 fprintf(stderr, "hpet_sigio: called\n");
193 hpet_sigio_count++;
194}
195
196void
197hpet_fasync(int argc, const char **argv)
198{
199 unsigned long freq;
200 int iterations, i, fd, value;
201 sig_t oldsig;
202 struct hpet_info info;
203
204 hpet_sigio_count = 0;
205 fd = -1;
206
207 if ((oldsig = signal(SIGIO, hpet_sigio)) == SIG_ERR) {
208 fprintf(stderr, "hpet_fasync: failed to set signal handler\n");
209 return;
210 }
211
212 if (argc != 3) {
213 fprintf(stderr, "hpet_fasync: device-name freq iterations\n");
214 goto out;
215 }
216
217 fd = open(argv[0], O_RDONLY);
218
219 if (fd < 0) {
220 fprintf(stderr, "hpet_fasync: failed to open %s\n", argv[0]);
221 return;
222 }
223
224
225 if ((fcntl(fd, F_SETOWN, getpid()) == 1) ||
226 ((value = fcntl(fd, F_GETFL)) == 1) ||
227 (fcntl(fd, F_SETFL, value | O_ASYNC) == 1)) {
228 fprintf(stderr, "hpet_fasync: fcntl failed\n");
229 goto out;
230 }
231
232 freq = atoi(argv[1]);
233 iterations = atoi(argv[2]);
234
235 if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
236 fprintf(stderr, "hpet_fasync: HPET_IRQFREQ failed\n");
237 goto out;
238 }
239
240 if (ioctl(fd, HPET_INFO, &info) < 0) {
241 fprintf(stderr, "hpet_fasync: failed to get info\n");
242 goto out;
243 }
244
245 fprintf(stderr, "hpet_fasync: info.hi_flags 0x%lx\n", info.hi_flags);
246
247 if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
248 fprintf(stderr, "hpet_fasync: HPET_EPI failed\n");
249 goto out;
250 }
251
252 if (ioctl(fd, HPET_IE_ON, 0) < 0) {
253 fprintf(stderr, "hpet_fasync, HPET_IE_ON failed\n");
254 goto out;
255 }
256
257 for (i = 0; i < iterations; i++) {
258 (void) pause();
259 fprintf(stderr, "hpet_fasync: count = %d\n", hpet_sigio_count);
260 }
261
262out:
263 signal(SIGIO, oldsig);
264
265 if (fd >= 0)
266 close(fd);
267
268 return;
269}
diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt
index bab3040da548..03485bfbd797 100644
--- a/Documentation/trace/ftrace.txt
+++ b/Documentation/trace/ftrace.txt
@@ -1588,7 +1588,7 @@ module author does not need to worry about it.
1588 1588
1589When tracing is enabled, kstop_machine is called to prevent 1589When tracing is enabled, kstop_machine is called to prevent
1590races with the CPUS executing code being modified (which can 1590races with the CPUS executing code being modified (which can
1591cause the CPU to do undesireable things), and the nops are 1591cause the CPU to do undesirable things), and the nops are
1592patched back to calls. But this time, they do not call mcount 1592patched back to calls. But this time, they do not call mcount
1593(which is just a function stub). They now call into the ftrace 1593(which is just a function stub). They now call into the ftrace
1594infrastructure. 1594infrastructure.
diff --git a/Documentation/vm/00-INDEX b/Documentation/vm/00-INDEX
index e57d6a9dd32b..dca82d7c83d8 100644
--- a/Documentation/vm/00-INDEX
+++ b/Documentation/vm/00-INDEX
@@ -4,23 +4,35 @@ active_mm.txt
4 - An explanation from Linus about tsk->active_mm vs tsk->mm. 4 - An explanation from Linus about tsk->active_mm vs tsk->mm.
5balance 5balance
6 - various information on memory balancing. 6 - various information on memory balancing.
7hugepage-mmap.c
8 - Example app using huge page memory with the mmap system call.
9hugepage-shm.c
10 - Example app using huge page memory with Sys V shared memory system calls.
7hugetlbpage.txt 11hugetlbpage.txt
8 - a brief summary of hugetlbpage support in the Linux kernel. 12 - a brief summary of hugetlbpage support in the Linux kernel.
13hwpoison.txt
14 - explains what hwpoison is
9ksm.txt 15ksm.txt
10 - how to use the Kernel Samepage Merging feature. 16 - how to use the Kernel Samepage Merging feature.
11locking 17locking
12 - info on how locking and synchronization is done in the Linux vm code. 18 - info on how locking and synchronization is done in the Linux vm code.
19map_hugetlb.c
20 - an example program that uses the MAP_HUGETLB mmap flag.
13numa 21numa
14 - information about NUMA specific code in the Linux vm. 22 - information about NUMA specific code in the Linux vm.
15numa_memory_policy.txt 23numa_memory_policy.txt
16 - documentation of concepts and APIs of the 2.6 memory policy support. 24 - documentation of concepts and APIs of the 2.6 memory policy support.
17overcommit-accounting 25overcommit-accounting
18 - description of the Linux kernels overcommit handling modes. 26 - description of the Linux kernels overcommit handling modes.
27page-types.c
28 - Tool for querying page flags
19page_migration 29page_migration
20 - description of page migration in NUMA systems. 30 - description of page migration in NUMA systems.
31pagemap.txt
32 - pagemap, from the userspace perspective
21slabinfo.c 33slabinfo.c
22 - source code for a tool to get reports about slabs. 34 - source code for a tool to get reports about slabs.
23slub.txt 35slub.txt
24 - a short users guide for SLUB. 36 - a short users guide for SLUB.
25map_hugetlb.c 37unevictable-lru.txt
26 - an example program that uses the MAP_HUGETLB mmap flag. 38 - Unevictable LRU infrastructure
diff --git a/Documentation/vm/Makefile b/Documentation/vm/Makefile
index 5bd269b3731a..9dcff328b964 100644
--- a/Documentation/vm/Makefile
+++ b/Documentation/vm/Makefile
@@ -2,7 +2,7 @@
2obj- := dummy.o 2obj- := dummy.o
3 3
4# List of programs to build 4# List of programs to build
5hostprogs-y := slabinfo page-types 5hostprogs-y := slabinfo page-types hugepage-mmap hugepage-shm map_hugetlb
6 6
7# Tell kbuild to always build the programs 7# Tell kbuild to always build the programs
8always := $(hostprogs-y) 8always := $(hostprogs-y)
diff --git a/Documentation/vm/hugepage-mmap.c b/Documentation/vm/hugepage-mmap.c
new file mode 100644
index 000000000000..db0dd9a33d54
--- /dev/null
+++ b/Documentation/vm/hugepage-mmap.c
@@ -0,0 +1,91 @@
1/*
2 * hugepage-mmap:
3 *
4 * Example of using huge page memory in a user application using the mmap
5 * system call. Before running this application, make sure that the
6 * administrator has mounted the hugetlbfs filesystem (on some directory
7 * like /mnt) using the command mount -t hugetlbfs nodev /mnt. In this
8 * example, the app is requesting memory of size 256MB that is backed by
9 * huge pages.
10 *
11 * For the ia64 architecture, the Linux kernel reserves Region number 4 for
12 * huge pages. That means that if one requires a fixed address, a huge page
13 * aligned address starting with 0x800000... will be required. If a fixed
14 * address is not required, the kernel will select an address in the proper
15 * range.
16 * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
17 */
18
19#include <stdlib.h>
20#include <stdio.h>
21#include <unistd.h>
22#include <sys/mman.h>
23#include <fcntl.h>
24
25#define FILE_NAME "/mnt/hugepagefile"
26#define LENGTH (256UL*1024*1024)
27#define PROTECTION (PROT_READ | PROT_WRITE)
28
29/* Only ia64 requires this */
30#ifdef __ia64__
31#define ADDR (void *)(0x8000000000000000UL)
32#define FLAGS (MAP_SHARED | MAP_FIXED)
33#else
34#define ADDR (void *)(0x0UL)
35#define FLAGS (MAP_SHARED)
36#endif
37
38static void check_bytes(char *addr)
39{
40 printf("First hex is %x\n", *((unsigned int *)addr));
41}
42
43static void write_bytes(char *addr)
44{
45 unsigned long i;
46
47 for (i = 0; i < LENGTH; i++)
48 *(addr + i) = (char)i;
49}
50
51static void read_bytes(char *addr)
52{
53 unsigned long i;
54
55 check_bytes(addr);
56 for (i = 0; i < LENGTH; i++)
57 if (*(addr + i) != (char)i) {
58 printf("Mismatch at %lu\n", i);
59 break;
60 }
61}
62
63int main(void)
64{
65 void *addr;
66 int fd;
67
68 fd = open(FILE_NAME, O_CREAT | O_RDWR, 0755);
69 if (fd < 0) {
70 perror("Open failed");
71 exit(1);
72 }
73
74 addr = mmap(ADDR, LENGTH, PROTECTION, FLAGS, fd, 0);
75 if (addr == MAP_FAILED) {
76 perror("mmap");
77 unlink(FILE_NAME);
78 exit(1);
79 }
80
81 printf("Returned address is %p\n", addr);
82 check_bytes(addr);
83 write_bytes(addr);
84 read_bytes(addr);
85
86 munmap(addr, LENGTH);
87 close(fd);
88 unlink(FILE_NAME);
89
90 return 0;
91}
diff --git a/Documentation/vm/hugepage-shm.c b/Documentation/vm/hugepage-shm.c
new file mode 100644
index 000000000000..07956d8592c9
--- /dev/null
+++ b/Documentation/vm/hugepage-shm.c
@@ -0,0 +1,98 @@
1/*
2 * hugepage-shm:
3 *
4 * Example of using huge page memory in a user application using Sys V shared
5 * memory system calls. In this example the app is requesting 256MB of
6 * memory that is backed by huge pages. The application uses the flag
7 * SHM_HUGETLB in the shmget system call to inform the kernel that it is
8 * requesting huge pages.
9 *
10 * For the ia64 architecture, the Linux kernel reserves Region number 4 for
11 * huge pages. That means that if one requires a fixed address, a huge page
12 * aligned address starting with 0x800000... will be required. If a fixed
13 * address is not required, the kernel will select an address in the proper
14 * range.
15 * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
16 *
17 * Note: The default shared memory limit is quite low on many kernels,
18 * you may need to increase it via:
19 *
20 * echo 268435456 > /proc/sys/kernel/shmmax
21 *
22 * This will increase the maximum size per shared memory segment to 256MB.
23 * The other limit that you will hit eventually is shmall which is the
24 * total amount of shared memory in pages. To set it to 16GB on a system
25 * with a 4kB pagesize do:
26 *
27 * echo 4194304 > /proc/sys/kernel/shmall
28 */
29
30#include <stdlib.h>
31#include <stdio.h>
32#include <sys/types.h>
33#include <sys/ipc.h>
34#include <sys/shm.h>
35#include <sys/mman.h>
36
37#ifndef SHM_HUGETLB
38#define SHM_HUGETLB 04000
39#endif
40
41#define LENGTH (256UL*1024*1024)
42
43#define dprintf(x) printf(x)
44
45/* Only ia64 requires this */
46#ifdef __ia64__
47#define ADDR (void *)(0x8000000000000000UL)
48#define SHMAT_FLAGS (SHM_RND)
49#else
50#define ADDR (void *)(0x0UL)
51#define SHMAT_FLAGS (0)
52#endif
53
54int main(void)
55{
56 int shmid;
57 unsigned long i;
58 char *shmaddr;
59
60 if ((shmid = shmget(2, LENGTH,
61 SHM_HUGETLB | IPC_CREAT | SHM_R | SHM_W)) < 0) {
62 perror("shmget");
63 exit(1);
64 }
65 printf("shmid: 0x%x\n", shmid);
66
67 shmaddr = shmat(shmid, ADDR, SHMAT_FLAGS);
68 if (shmaddr == (char *)-1) {
69 perror("Shared memory attach failure");
70 shmctl(shmid, IPC_RMID, NULL);
71 exit(2);
72 }
73 printf("shmaddr: %p\n", shmaddr);
74
75 dprintf("Starting the writes:\n");
76 for (i = 0; i < LENGTH; i++) {
77 shmaddr[i] = (char)(i);
78 if (!(i % (1024 * 1024)))
79 dprintf(".");
80 }
81 dprintf("\n");
82
83 dprintf("Starting the Check...");
84 for (i = 0; i < LENGTH; i++)
85 if (shmaddr[i] != (char)i)
86 printf("\nIndex %lu mismatched\n", i);
87 dprintf("Done.\n");
88
89 if (shmdt((const void *)shmaddr) != 0) {
90 perror("Detach failure");
91 shmctl(shmid, IPC_RMID, NULL);
92 exit(3);
93 }
94
95 shmctl(shmid, IPC_RMID, NULL);
96
97 return 0;
98}
diff --git a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt
index bc31636973e3..457634c1e03e 100644
--- a/Documentation/vm/hugetlbpage.txt
+++ b/Documentation/vm/hugetlbpage.txt
@@ -299,176 +299,11 @@ map_hugetlb.c.
299******************************************************************* 299*******************************************************************
300 300
301/* 301/*
302 * Example of using huge page memory in a user application using Sys V shared 302 * hugepage-shm: see Documentation/vm/hugepage-shm.c
303 * memory system calls. In this example the app is requesting 256MB of
304 * memory that is backed by huge pages. The application uses the flag
305 * SHM_HUGETLB in the shmget system call to inform the kernel that it is
306 * requesting huge pages.
307 *
308 * For the ia64 architecture, the Linux kernel reserves Region number 4 for
309 * huge pages. That means that if one requires a fixed address, a huge page
310 * aligned address starting with 0x800000... will be required. If a fixed
311 * address is not required, the kernel will select an address in the proper
312 * range.
313 * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
314 *
315 * Note: The default shared memory limit is quite low on many kernels,
316 * you may need to increase it via:
317 *
318 * echo 268435456 > /proc/sys/kernel/shmmax
319 *
320 * This will increase the maximum size per shared memory segment to 256MB.
321 * The other limit that you will hit eventually is shmall which is the
322 * total amount of shared memory in pages. To set it to 16GB on a system
323 * with a 4kB pagesize do:
324 *
325 * echo 4194304 > /proc/sys/kernel/shmall
326 */ 303 */
327#include <stdlib.h>
328#include <stdio.h>
329#include <sys/types.h>
330#include <sys/ipc.h>
331#include <sys/shm.h>
332#include <sys/mman.h>
333
334#ifndef SHM_HUGETLB
335#define SHM_HUGETLB 04000
336#endif
337
338#define LENGTH (256UL*1024*1024)
339
340#define dprintf(x) printf(x)
341
342#define ADDR (void *)(0x0UL) /* let kernel choose address */
343#define SHMAT_FLAGS (0)
344
345int main(void)
346{
347 int shmid;
348 unsigned long i;
349 char *shmaddr;
350
351 if ((shmid = shmget(2, LENGTH,
352 SHM_HUGETLB | IPC_CREAT | SHM_R | SHM_W)) < 0) {
353 perror("shmget");
354 exit(1);
355 }
356 printf("shmid: 0x%x\n", shmid);
357
358 shmaddr = shmat(shmid, ADDR, SHMAT_FLAGS);
359 if (shmaddr == (char *)-1) {
360 perror("Shared memory attach failure");
361 shmctl(shmid, IPC_RMID, NULL);
362 exit(2);
363 }
364 printf("shmaddr: %p\n", shmaddr);
365
366 dprintf("Starting the writes:\n");
367 for (i = 0; i < LENGTH; i++) {
368 shmaddr[i] = (char)(i);
369 if (!(i % (1024 * 1024)))
370 dprintf(".");
371 }
372 dprintf("\n");
373
374 dprintf("Starting the Check...");
375 for (i = 0; i < LENGTH; i++)
376 if (shmaddr[i] != (char)i)
377 printf("\nIndex %lu mismatched\n", i);
378 dprintf("Done.\n");
379
380 if (shmdt((const void *)shmaddr) != 0) {
381 perror("Detach failure");
382 shmctl(shmid, IPC_RMID, NULL);
383 exit(3);
384 }
385
386 shmctl(shmid, IPC_RMID, NULL);
387
388 return 0;
389}
390 304
391******************************************************************* 305*******************************************************************
392 306
393/* 307/*
394 * Example of using huge page memory in a user application using the mmap 308 * hugepage-mmap: see Documentation/vm/hugepage-mmap.c
395 * system call. Before running this application, make sure that the
396 * administrator has mounted the hugetlbfs filesystem (on some directory
397 * like /mnt) using the command mount -t hugetlbfs nodev /mnt. In this
398 * example, the app is requesting memory of size 256MB that is backed by
399 * huge pages.
400 *
401 * For the ia64 architecture, the Linux kernel reserves Region number 4 for
402 * huge pages. That means that if one requires a fixed address, a huge page
403 * aligned address starting with 0x800000... will be required. If a fixed
404 * address is not required, the kernel will select an address in the proper
405 * range.
406 * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
407 */ 309 */
408#include <stdlib.h>
409#include <stdio.h>
410#include <unistd.h>
411#include <sys/mman.h>
412#include <fcntl.h>
413
414#define FILE_NAME "/mnt/hugepagefile"
415#define LENGTH (256UL*1024*1024)
416#define PROTECTION (PROT_READ | PROT_WRITE)
417
418#define ADDR (void *)(0x0UL) /* let kernel choose address */
419#define FLAGS (MAP_SHARED)
420
421void check_bytes(char *addr)
422{
423 printf("First hex is %x\n", *((unsigned int *)addr));
424}
425
426void write_bytes(char *addr)
427{
428 unsigned long i;
429
430 for (i = 0; i < LENGTH; i++)
431 *(addr + i) = (char)i;
432}
433
434void read_bytes(char *addr)
435{
436 unsigned long i;
437
438 check_bytes(addr);
439 for (i = 0; i < LENGTH; i++)
440 if (*(addr + i) != (char)i) {
441 printf("Mismatch at %lu\n", i);
442 break;
443 }
444}
445
446int main(void)
447{
448 void *addr;
449 int fd;
450
451 fd = open(FILE_NAME, O_CREAT | O_RDWR, 0755);
452 if (fd < 0) {
453 perror("Open failed");
454 exit(1);
455 }
456
457 addr = mmap(ADDR, LENGTH, PROTECTION, FLAGS, fd, 0);
458 if (addr == MAP_FAILED) {
459 perror("mmap");
460 unlink(FILE_NAME);
461 exit(1);
462 }
463
464 printf("Returned address is %p\n", addr);
465 check_bytes(addr);
466 write_bytes(addr);
467 read_bytes(addr);
468
469 munmap(addr, LENGTH);
470 close(fd);
471 unlink(FILE_NAME);
472
473 return 0;
474}
diff --git a/Documentation/vm/map_hugetlb.c b/Documentation/vm/map_hugetlb.c
index e2bdae37f499..9969c7d9f985 100644
--- a/Documentation/vm/map_hugetlb.c
+++ b/Documentation/vm/map_hugetlb.c
@@ -31,12 +31,12 @@
31#define FLAGS (MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB) 31#define FLAGS (MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB)
32#endif 32#endif
33 33
34void check_bytes(char *addr) 34static void check_bytes(char *addr)
35{ 35{
36 printf("First hex is %x\n", *((unsigned int *)addr)); 36 printf("First hex is %x\n", *((unsigned int *)addr));
37} 37}
38 38
39void write_bytes(char *addr) 39static void write_bytes(char *addr)
40{ 40{
41 unsigned long i; 41 unsigned long i;
42 42
@@ -44,7 +44,7 @@ void write_bytes(char *addr)
44 *(addr + i) = (char)i; 44 *(addr + i) = (char)i;
45} 45}
46 46
47void read_bytes(char *addr) 47static void read_bytes(char *addr)
48{ 48{
49 unsigned long i; 49 unsigned long i;
50 50
diff --git a/Documentation/voyager.txt b/Documentation/voyager.txt
deleted file mode 100644
index 2749af552cdf..000000000000
--- a/Documentation/voyager.txt
+++ /dev/null
@@ -1,95 +0,0 @@
1Running Linux on the Voyager Architecture
2=========================================
3
4For full details and current project status, see
5
6http://www.hansenpartnership.com/voyager
7
8The voyager architecture was designed by NCR in the mid 80s to be a
9fully SMP capable RAS computing architecture built around intel's 486
10chip set. The voyager came in three levels of architectural
11sophistication: 3,4 and 5 --- 1 and 2 never made it out of prototype.
12The linux patches support only the Level 5 voyager architecture (any
13machine class 3435 and above).
14
15The Voyager Architecture
16------------------------
17
18Voyager machines consist of a Baseboard with a 386 diagnostic
19processor, a Power Supply Interface (PSI) a Primary and possibly
20Secondary Microchannel bus and between 2 and 20 voyager slots. The
21voyager slots can be populated with memory and cpu cards (up to 4GB
22memory and from 1 486 to 32 Pentium Pro processors). Internally, the
23voyager has a dual arbitrated system bus and a configuration and test
24bus (CAT). The voyager bus speed is 40MHz. Therefore (since all
25voyager cards are dual ported for each system bus) the maximum
26transfer rate is 320Mb/s but only if you have your slot configuration
27tuned (only memory cards can communicate with both busses at once, CPU
28cards utilise them one at a time).
29
30Voyager SMP
31-----------
32
33Since voyager was the first intel based SMP system, it is slightly
34more primitive than the Intel IO-APIC approach to SMP. Voyager allows
35arbitrary interrupt routing (including processor affinity routing) of
36all 16 PC type interrupts. However it does this by using a modified
375259 master/slave chip set instead of an APIC bus. Additionally,
38voyager supports Cross Processor Interrupts (CPI) equivalent to the
39APIC IPIs. There are two routed voyager interrupt lines provided to
40each slot.
41
42Processor Cards
43---------------
44
45These come in single, dyadic and quad configurations (the quads are
46problematic--see later). The maximum configuration is 8 quad cards
47for 32 way SMP.
48
49Quad Processors
50---------------
51
52Because voyager only supplies two interrupt lines to each Processor
53card, the Quad processors have to be configured (and Bootstrapped) in
54as a pair of Master/Slave processors.
55
56In fact, most Quad cards only accept one VIC interrupt line, so they
57have one interrupt handling processor (called the VIC extended
58processor) and three non-interrupt handling processors.
59
60Current Status
61--------------
62
63The System will boot on Mono, Dyad and Quad cards. There was
64originally a Quad boot problem which has been fixed by proper gdt
65alignment in the initial boot loader. If you still cannot get your
66voyager system to boot, email me at:
67
68<J.E.J.Bottomley@HansenPartnership.com>
69
70
71The Quad cards now support using the separate Quad CPI vectors instead
72of going through the VIC mailbox system.
73
74The Level 4 architecture (3430 and 3360 Machines) should also work
75fine.
76
77Dump Switch
78-----------
79
80The voyager dump switch sends out a broadcast NMI which the voyager
81code intercepts and does a task dump.
82
83Power Switch
84------------
85
86The front panel power switch is intercepted by the kernel and should
87cause a system shutdown and power off.
88
89A Note About Mixed CPU Systems
90------------------------------
91
92Linux isn't designed to handle mixed CPU systems very well. In order
93to get everything going you *must* make sure that your lowest
94capability CPU is used for booting. Also, mixing CPU classes
95(e.g. 486 and 586) is really not going to work very well at all.
diff --git a/MAINTAINERS b/MAINTAINERS
index c8a8b1fd58b3..47cc449d89d8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -666,6 +666,12 @@ T: git://git.pengutronix.de/git/imx/linux-2.6.git
666F: arch/arm/mach-mx*/ 666F: arch/arm/mach-mx*/
667F: arch/arm/plat-mxc/ 667F: arch/arm/plat-mxc/
668 668
669ARM/FREESCALE IMX51
670M: Amit Kucheria <amit.kucheria@canonical.com>
671L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
672S: Maintained
673F: arch/arm/mach-mx5/
674
669ARM/GLOMATION GESBC9312SX MACHINE SUPPORT 675ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
670M: Lennert Buytenhek <kernel@wantstofly.org> 676M: Lennert Buytenhek <kernel@wantstofly.org>
671L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 677L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -939,6 +945,16 @@ W: http://www.fluff.org/ben/linux/
939S: Maintained 945S: Maintained
940F: arch/arm/mach-s3c6410/ 946F: arch/arm/mach-s3c6410/
941 947
948ARM/SHMOBILE ARM ARCHITECTURE
949M: Paul Mundt <lethal@linux-sh.org>
950M: Magnus Damm <magnus.damm@gmail.com>
951L: linux-sh@vger.kernel.org
952T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git
953W: http://oss.renesas.com
954S: Supported
955F: arch/arm/mach-shmobile/
956F: drivers/sh/
957
942ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT 958ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
943M: Lennert Buytenhek <kernel@wantstofly.org> 959M: Lennert Buytenhek <kernel@wantstofly.org>
944L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 960L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1235,6 +1251,13 @@ W: http://blackfin.uclinux.org
1235S: Supported 1251S: Supported
1236F: drivers/rtc/rtc-bfin.c 1252F: drivers/rtc/rtc-bfin.c
1237 1253
1254BLACKFIN SDH DRIVER
1255M: Cliff Cai <cliff.cai@analog.com>
1256L: uclinux-dist-devel@blackfin.uclinux.org
1257W: http://blackfin.uclinux.org
1258S: Supported
1259F: drivers/mmc/host/bfin_sdh.c
1260
1238BLACKFIN SERIAL DRIVER 1261BLACKFIN SERIAL DRIVER
1239M: Sonic Zhang <sonic.zhang@analog.com> 1262M: Sonic Zhang <sonic.zhang@analog.com>
1240L: uclinux-dist-devel@blackfin.uclinux.org 1263L: uclinux-dist-devel@blackfin.uclinux.org
@@ -1382,20 +1405,30 @@ F: arch/x86/include/asm/calgary.h
1382F: arch/x86/include/asm/tce.h 1405F: arch/x86/include/asm/tce.h
1383 1406
1384CAN NETWORK LAYER 1407CAN NETWORK LAYER
1385M: Urs Thuermann <urs.thuermann@volkswagen.de> 1408M: Oliver Hartkopp <socketcan@hartkopp.net>
1386M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de> 1409M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de>
1387L: socketcan-core@lists.berlios.de (subscribers-only) 1410M: Urs Thuermann <urs.thuermann@volkswagen.de>
1411L: socketcan-core@lists.berlios.de
1412L: netdev@vger.kernel.org
1388W: http://developer.berlios.de/projects/socketcan/ 1413W: http://developer.berlios.de/projects/socketcan/
1389S: Maintained 1414S: Maintained
1390F: drivers/net/can/ 1415F: net/can/
1391F: include/linux/can/
1392F: include/linux/can.h 1416F: include/linux/can.h
1417F: include/linux/can/core.h
1418F: include/linux/can/bcm.h
1419F: include/linux/can/raw.h
1393 1420
1394CAN NETWORK DRIVERS 1421CAN NETWORK DRIVERS
1395M: Wolfgang Grandegger <wg@grandegger.com> 1422M: Wolfgang Grandegger <wg@grandegger.com>
1396L: socketcan-core@lists.berlios.de (subscribers-only) 1423L: socketcan-core@lists.berlios.de
1424L: netdev@vger.kernel.org
1397W: http://developer.berlios.de/projects/socketcan/ 1425W: http://developer.berlios.de/projects/socketcan/
1398S: Maintained 1426S: Maintained
1427F: drivers/net/can/
1428F: include/linux/can/dev.h
1429F: include/linux/can/error.h
1430F: include/linux/can/netlink.h
1431F: include/linux/can/platform/
1399 1432
1400CELL BROADBAND ENGINE ARCHITECTURE 1433CELL BROADBAND ENGINE ARCHITECTURE
1401M: Arnd Bergmann <arnd@arndb.de> 1434M: Arnd Bergmann <arnd@arndb.de>
@@ -2107,6 +2140,7 @@ F: drivers/net/eexpress.*
2107ETHERNET BRIDGE 2140ETHERNET BRIDGE
2108M: Stephen Hemminger <shemminger@linux-foundation.org> 2141M: Stephen Hemminger <shemminger@linux-foundation.org>
2109L: bridge@lists.linux-foundation.org 2142L: bridge@lists.linux-foundation.org
2143L: netdev@vger.kernel.org
2110W: http://www.linux-foundation.org/en/Net:Bridge 2144W: http://www.linux-foundation.org/en/Net:Bridge
2111S: Maintained 2145S: Maintained
2112F: include/linux/netfilter_bridge/ 2146F: include/linux/netfilter_bridge/
@@ -2804,7 +2838,7 @@ S: Maintained
2804F: drivers/input/ 2838F: drivers/input/
2805 2839
2806INTEL FRAMEBUFFER DRIVER (excluding 810 and 815) 2840INTEL FRAMEBUFFER DRIVER (excluding 810 and 815)
2807M: Sylvain Meyer <sylvain.meyer@worldonline.fr> 2841M: Maik Broemme <mbroemme@plusserver.de>
2808L: linux-fbdev@vger.kernel.org 2842L: linux-fbdev@vger.kernel.org
2809S: Maintained 2843S: Maintained
2810F: Documentation/fb/intelfb.txt 2844F: Documentation/fb/intelfb.txt
@@ -3621,7 +3655,7 @@ F: mm/
3621 3655
3622MEMORY RESOURCE CONTROLLER 3656MEMORY RESOURCE CONTROLLER
3623M: Balbir Singh <balbir@linux.vnet.ibm.com> 3657M: Balbir Singh <balbir@linux.vnet.ibm.com>
3624M: Pavel Emelyanov <xemul@openvz.org> 3658M: Daisuke Nishimura <nishimura@mxp.nes.nec.co.jp>
3625M: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> 3659M: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
3626L: linux-mm@kvack.org 3660L: linux-mm@kvack.org
3627S: Maintained 3661S: Maintained
@@ -4293,6 +4327,7 @@ PERFORMANCE EVENTS SUBSYSTEM
4293M: Peter Zijlstra <a.p.zijlstra@chello.nl> 4327M: Peter Zijlstra <a.p.zijlstra@chello.nl>
4294M: Paul Mackerras <paulus@samba.org> 4328M: Paul Mackerras <paulus@samba.org>
4295M: Ingo Molnar <mingo@elte.hu> 4329M: Ingo Molnar <mingo@elte.hu>
4330M: Arnaldo Carvalho de Melo <acme@redhat.com>
4296S: Supported 4331S: Supported
4297F: kernel/perf_event.c 4332F: kernel/perf_event.c
4298F: include/linux/perf_event.h 4333F: include/linux/perf_event.h
@@ -4495,6 +4530,13 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
4495T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git 4530T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
4496S: Maintained 4531S: Maintained
4497 4532
4533MMP2 SUPPORT (aka ARMADA610)
4534M: Haojian Zhuang <haojian.zhuang@marvell.com>
4535M: Eric Miao <eric.y.miao@gmail.com>
4536L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
4537T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
4538S: Maintained
4539
4498PXA MMCI DRIVER 4540PXA MMCI DRIVER
4499S: Orphan 4541S: Orphan
4500 4542
diff --git a/Makefile b/Makefile
index 1b24895212d8..08ff02da7ce3 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 2 1VERSION = 2
2PATCHLEVEL = 6 2PATCHLEVEL = 6
3SUBLEVEL = 33 3SUBLEVEL = 34
4EXTRAVERSION = 4EXTRAVERSION = -rc1
5NAME = Man-Eating Seals of Antiquity 5NAME = Man-Eating Seals of Antiquity
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index bd7261ea8f94..75291fdd379f 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -10,6 +10,7 @@ config ALPHA
10 select HAVE_OPROFILE 10 select HAVE_OPROFILE
11 select HAVE_SYSCALL_WRAPPERS 11 select HAVE_SYSCALL_WRAPPERS
12 select HAVE_PERF_EVENTS 12 select HAVE_PERF_EVENTS
13 select HAVE_DMA_ATTRS
13 help 14 help
14 The Alpha is a 64-bit general-purpose processor designed and 15 The Alpha is a 64-bit general-purpose processor designed and
15 marketed by the Digital Equipment Corporation of blessed memory, 16 marketed by the Digital Equipment Corporation of blessed memory,
@@ -58,6 +59,9 @@ config ZONE_DMA
58 bool 59 bool
59 default y 60 default y
60 61
62config NEED_DMA_MAP_STATE
63 def_bool y
64
61config GENERIC_ISA_DMA 65config GENERIC_ISA_DMA
62 bool 66 bool
63 default y 67 default y
diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h
index 04eb5681448c..1bce8169733c 100644
--- a/arch/alpha/include/asm/dma-mapping.h
+++ b/arch/alpha/include/asm/dma-mapping.h
@@ -1,71 +1,49 @@
1#ifndef _ALPHA_DMA_MAPPING_H 1#ifndef _ALPHA_DMA_MAPPING_H
2#define _ALPHA_DMA_MAPPING_H 2#define _ALPHA_DMA_MAPPING_H
3 3
4#include <linux/dma-attrs.h>
4 5
5#ifdef CONFIG_PCI 6extern struct dma_map_ops *dma_ops;
6 7
7#include <linux/pci.h> 8static inline struct dma_map_ops *get_dma_ops(struct device *dev)
9{
10 return dma_ops;
11}
8 12
9#define dma_map_single(dev, va, size, dir) \ 13#include <asm-generic/dma-mapping-common.h>
10 pci_map_single(alpha_gendev_to_pci(dev), va, size, dir)
11#define dma_unmap_single(dev, addr, size, dir) \
12 pci_unmap_single(alpha_gendev_to_pci(dev), addr, size, dir)
13#define dma_alloc_coherent(dev, size, addr, gfp) \
14 __pci_alloc_consistent(alpha_gendev_to_pci(dev), size, addr, gfp)
15#define dma_free_coherent(dev, size, va, addr) \
16 pci_free_consistent(alpha_gendev_to_pci(dev), size, va, addr)
17#define dma_map_page(dev, page, off, size, dir) \
18 pci_map_page(alpha_gendev_to_pci(dev), page, off, size, dir)
19#define dma_unmap_page(dev, addr, size, dir) \
20 pci_unmap_page(alpha_gendev_to_pci(dev), addr, size, dir)
21#define dma_map_sg(dev, sg, nents, dir) \
22 pci_map_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
23#define dma_unmap_sg(dev, sg, nents, dir) \
24 pci_unmap_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
25#define dma_supported(dev, mask) \
26 pci_dma_supported(alpha_gendev_to_pci(dev), mask)
27#define dma_mapping_error(dev, addr) \
28 pci_dma_mapping_error(alpha_gendev_to_pci(dev), addr)
29 14
30#else /* no PCI - no IOMMU. */ 15static inline void *dma_alloc_coherent(struct device *dev, size_t size,
16 dma_addr_t *dma_handle, gfp_t gfp)
17{
18 return get_dma_ops(dev)->alloc_coherent(dev, size, dma_handle, gfp);
19}
31 20
32#include <asm/io.h> /* for virt_to_phys() */ 21static inline void dma_free_coherent(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle)
23{
24 get_dma_ops(dev)->free_coherent(dev, size, vaddr, dma_handle);
25}
33 26
34struct scatterlist; 27static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
35void *dma_alloc_coherent(struct device *dev, size_t size, 28{
36 dma_addr_t *dma_handle, gfp_t gfp); 29 return get_dma_ops(dev)->mapping_error(dev, dma_addr);
37int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 30}
38 enum dma_data_direction direction);
39 31
40#define dma_free_coherent(dev, size, va, addr) \ 32static inline int dma_supported(struct device *dev, u64 mask)
41 free_pages((unsigned long)va, get_order(size)) 33{
42#define dma_supported(dev, mask) (mask < 0x00ffffffUL ? 0 : 1) 34 return get_dma_ops(dev)->dma_supported(dev, mask);
43#define dma_map_single(dev, va, size, dir) virt_to_phys(va) 35}
44#define dma_map_page(dev, page, off, size, dir) (page_to_pa(page) + off)
45 36
46#define dma_unmap_single(dev, addr, size, dir) ((void)0) 37static inline int dma_set_mask(struct device *dev, u64 mask)
47#define dma_unmap_page(dev, addr, size, dir) ((void)0) 38{
48#define dma_unmap_sg(dev, sg, nents, dir) ((void)0) 39 return get_dma_ops(dev)->set_dma_mask(dev, mask);
49 40}
50#define dma_mapping_error(dev, addr) (0)
51
52#endif /* !CONFIG_PCI */
53 41
54#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
55#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
56#define dma_is_consistent(d, h) (1) 44#define dma_is_consistent(d, h) (1)
57 45
58int dma_set_mask(struct device *dev, u64 mask);
59
60#define dma_sync_single_for_cpu(dev, addr, size, dir) ((void)0)
61#define dma_sync_single_for_device(dev, addr, size, dir) ((void)0)
62#define dma_sync_single_range(dev, addr, off, size, dir) ((void)0)
63#define dma_sync_sg_for_cpu(dev, sg, nents, dir) ((void)0)
64#define dma_sync_sg_for_device(dev, sg, nents, dir) ((void)0)
65#define dma_cache_sync(dev, va, size, dir) ((void)0) 46#define dma_cache_sync(dev, va, size, dir) ((void)0)
66#define dma_sync_single_range_for_cpu(dev, addr, offset, size, dir) ((void)0)
67#define dma_sync_single_range_for_device(dev, addr, offset, size, dir) ((void)0)
68
69#define dma_get_cache_alignment() L1_CACHE_BYTES 47#define dma_get_cache_alignment() L1_CACHE_BYTES
70 48
71#endif /* _ALPHA_DMA_MAPPING_H */ 49#endif /* _ALPHA_DMA_MAPPING_H */
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index dd8dcabf160f..28d0497fd3c7 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -70,142 +70,11 @@ extern inline void pcibios_penalize_isa_irq(int irq, int active)
70 decisions. */ 70 decisions. */
71#define PCI_DMA_BUS_IS_PHYS 0 71#define PCI_DMA_BUS_IS_PHYS 0
72 72
73/* Allocate and map kernel buffer using consistent mode DMA for PCI 73#ifdef CONFIG_PCI
74 device. Returns non-NULL cpu-view pointer to the buffer if
75 successful and sets *DMA_ADDRP to the pci side dma address as well,
76 else DMA_ADDRP is undefined. */
77
78extern void *__pci_alloc_consistent(struct pci_dev *, size_t,
79 dma_addr_t *, gfp_t);
80static inline void *
81pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma)
82{
83 return __pci_alloc_consistent(dev, size, dma, GFP_ATOMIC);
84}
85
86/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must
87 be values that were returned from pci_alloc_consistent. SIZE must
88 be the same as what as passed into pci_alloc_consistent.
89 References to the memory and mappings associated with CPU_ADDR or
90 DMA_ADDR past this call are illegal. */
91
92extern void pci_free_consistent(struct pci_dev *, size_t, void *, dma_addr_t);
93
94/* Map a single buffer of the indicate size for PCI DMA in streaming mode.
95 The 32-bit PCI bus mastering address to use is returned. Once the device
96 is given the dma address, the device owns this memory until either
97 pci_unmap_single or pci_dma_sync_single_for_cpu is performed. */
98
99extern dma_addr_t pci_map_single(struct pci_dev *, void *, size_t, int);
100
101/* Likewise, but for a page instead of an address. */
102extern dma_addr_t pci_map_page(struct pci_dev *, struct page *,
103 unsigned long, size_t, int);
104
105/* Test for pci_map_single or pci_map_page having generated an error. */
106
107static inline int
108pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
109{
110 return dma_addr == 0;
111}
112
113/* Unmap a single streaming mode DMA translation. The DMA_ADDR and
114 SIZE must match what was provided for in a previous pci_map_single
115 call. All other usages are undefined. After this call, reads by
116 the cpu to the buffer are guaranteed to see whatever the device
117 wrote there. */
118
119extern void pci_unmap_single(struct pci_dev *, dma_addr_t, size_t, int);
120extern void pci_unmap_page(struct pci_dev *, dma_addr_t, size_t, int);
121
122/* pci_unmap_{single,page} is not a nop, thus... */
123#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
124 dma_addr_t ADDR_NAME;
125#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
126 __u32 LEN_NAME;
127#define pci_unmap_addr(PTR, ADDR_NAME) \
128 ((PTR)->ADDR_NAME)
129#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
130 (((PTR)->ADDR_NAME) = (VAL))
131#define pci_unmap_len(PTR, LEN_NAME) \
132 ((PTR)->LEN_NAME)
133#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
134 (((PTR)->LEN_NAME) = (VAL))
135
136/* Map a set of buffers described by scatterlist in streaming mode for
137 PCI DMA. This is the scatter-gather version of the above
138 pci_map_single interface. Here the scatter gather list elements
139 are each tagged with the appropriate PCI dma address and length.
140 They are obtained via sg_dma_{address,length}(SG).
141
142 NOTE: An implementation may be able to use a smaller number of DMA
143 address/length pairs than there are SG table elements. (for
144 example via virtual mapping capabilities) The routine returns the
145 number of addr/length pairs actually used, at most nents.
146
147 Device ownership issues as mentioned above for pci_map_single are
148 the same here. */
149
150extern int pci_map_sg(struct pci_dev *, struct scatterlist *, int, int);
151
152/* Unmap a set of streaming mode DMA translations. Again, cpu read
153 rules concerning calls here are the same as for pci_unmap_single()
154 above. */
155
156extern void pci_unmap_sg(struct pci_dev *, struct scatterlist *, int, int);
157
158/* Make physical memory consistent for a single streaming mode DMA
159 translation after a transfer and device currently has ownership
160 of the buffer.
161
162 If you perform a pci_map_single() but wish to interrogate the
163 buffer using the cpu, yet do not wish to teardown the PCI dma
164 mapping, you must call this function before doing so. At the next
165 point you give the PCI dma address back to the card, you must first
166 perform a pci_dma_sync_for_device, and then the device again owns
167 the buffer. */
168
169static inline void
170pci_dma_sync_single_for_cpu(struct pci_dev *dev, dma_addr_t dma_addr,
171 long size, int direction)
172{
173 /* Nothing to do. */
174}
175
176static inline void
177pci_dma_sync_single_for_device(struct pci_dev *dev, dma_addr_t dma_addr,
178 size_t size, int direction)
179{
180 /* Nothing to do. */
181}
182
183/* Make physical memory consistent for a set of streaming mode DMA
184 translations after a transfer. The same as pci_dma_sync_single_*
185 but for a scatter-gather list, same rules and usage. */
186
187static inline void
188pci_dma_sync_sg_for_cpu(struct pci_dev *dev, struct scatterlist *sg,
189 int nents, int direction)
190{
191 /* Nothing to do. */
192}
193
194static inline void
195pci_dma_sync_sg_for_device(struct pci_dev *dev, struct scatterlist *sg,
196 int nents, int direction)
197{
198 /* Nothing to do. */
199}
200
201/* Return whether the given PCI device DMA address mask can
202 be supported properly. For example, if your device can
203 only drive the low 24-bits during PCI bus mastering, then
204 you would pass 0x00ffffff as the mask to this function. */
205 74
206extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); 75/* implement the pci_ DMA API in terms of the generic device dma_ one */
76#include <asm-generic/pci-dma-compat.h>
207 77
208#ifdef CONFIG_PCI
209static inline void pci_dma_burst_advice(struct pci_dev *pdev, 78static inline void pci_dma_burst_advice(struct pci_dev *pdev,
210 enum pci_dma_burst_strategy *strat, 79 enum pci_dma_burst_strategy *strat,
211 unsigned long *strategy_parameter) 80 unsigned long *strategy_parameter)
@@ -244,8 +113,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
244 return hose->need_domain_info; 113 return hose->need_domain_info;
245} 114}
246 115
247struct pci_dev *alpha_gendev_to_pci(struct device *dev);
248
249#endif /* __KERNEL__ */ 116#endif /* __KERNEL__ */
250 117
251/* Values for the `which' argument to sys_pciconfig_iobase. */ 118/* Values for the `which' argument to sys_pciconfig_iobase. */
diff --git a/arch/alpha/include/asm/ptrace.h b/arch/alpha/include/asm/ptrace.h
index 32c7a5cddd59..65cf3e28e2f4 100644
--- a/arch/alpha/include/asm/ptrace.h
+++ b/arch/alpha/include/asm/ptrace.h
@@ -68,6 +68,7 @@ struct switch_stack {
68 68
69#ifdef __KERNEL__ 69#ifdef __KERNEL__
70 70
71#define arch_has_single_step() (1)
71#define user_mode(regs) (((regs)->ps & 8) != 0) 72#define user_mode(regs) (((regs)->ps & 8) != 0)
72#define instruction_pointer(regs) ((regs)->pc) 73#define instruction_pointer(regs) ((regs)->pc)
73#define profile_pc(regs) instruction_pointer(regs) 74#define profile_pc(regs) instruction_pointer(regs)
diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c
index c19a376520f4..823a540f9f5b 100644
--- a/arch/alpha/kernel/pci-noop.c
+++ b/arch/alpha/kernel/pci-noop.c
@@ -106,58 +106,8 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
106 return -ENODEV; 106 return -ENODEV;
107} 107}
108 108
109/* Stubs for the routines in pci_iommu.c: */ 109static void *alpha_noop_alloc_coherent(struct device *dev, size_t size,
110 110 dma_addr_t *dma_handle, gfp_t gfp)
111void *
112__pci_alloc_consistent(struct pci_dev *pdev, size_t size,
113 dma_addr_t *dma_addrp, gfp_t gfp)
114{
115 return NULL;
116}
117
118void
119pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr,
120 dma_addr_t dma_addr)
121{
122}
123
124dma_addr_t
125pci_map_single(struct pci_dev *pdev, void *cpu_addr, size_t size,
126 int direction)
127{
128 return (dma_addr_t) 0;
129}
130
131void
132pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
133 int direction)
134{
135}
136
137int
138pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
139 int direction)
140{
141 return 0;
142}
143
144void
145pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
146 int direction)
147{
148}
149
150int
151pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
152{
153 return 0;
154}
155
156/* Generic DMA mapping functions: */
157
158void *
159dma_alloc_coherent(struct device *dev, size_t size,
160 dma_addr_t *dma_handle, gfp_t gfp)
161{ 111{
162 void *ret; 112 void *ret;
163 113
@@ -171,11 +121,22 @@ dma_alloc_coherent(struct device *dev, size_t size,
171 return ret; 121 return ret;
172} 122}
173 123
174EXPORT_SYMBOL(dma_alloc_coherent); 124static void alpha_noop_free_coherent(struct device *dev, size_t size,
125 void *cpu_addr, dma_addr_t dma_addr)
126{
127 free_pages((unsigned long)cpu_addr, get_order(size));
128}
129
130static dma_addr_t alpha_noop_map_page(struct device *dev, struct page *page,
131 unsigned long offset, size_t size,
132 enum dma_data_direction dir,
133 struct dma_attrs *attrs)
134{
135 return page_to_pa(page) + offset;
136}
175 137
176int 138static int alpha_noop_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
177dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 139 enum dma_data_direction dir, struct dma_attrs *attrs)
178 enum dma_data_direction direction)
179{ 140{
180 int i; 141 int i;
181 struct scatterlist *sg; 142 struct scatterlist *sg;
@@ -192,19 +153,37 @@ dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
192 return nents; 153 return nents;
193} 154}
194 155
195EXPORT_SYMBOL(dma_map_sg); 156static int alpha_noop_mapping_error(struct device *dev, dma_addr_t dma_addr)
157{
158 return 0;
159}
160
161static int alpha_noop_supported(struct device *dev, u64 mask)
162{
163 return mask < 0x00ffffffUL ? 0 : 1;
164}
196 165
197int 166static int alpha_noop_set_mask(struct device *dev, u64 mask)
198dma_set_mask(struct device *dev, u64 mask)
199{ 167{
200 if (!dev->dma_mask || !dma_supported(dev, mask)) 168 if (!dev->dma_mask || !dma_supported(dev, mask))
201 return -EIO; 169 return -EIO;
202 170
203 *dev->dma_mask = mask; 171 *dev->dma_mask = mask;
204
205 return 0; 172 return 0;
206} 173}
207EXPORT_SYMBOL(dma_set_mask); 174
175struct dma_map_ops alpha_noop_ops = {
176 .alloc_coherent = alpha_noop_alloc_coherent,
177 .free_coherent = alpha_noop_free_coherent,
178 .map_page = alpha_noop_map_page,
179 .map_sg = alpha_noop_map_sg,
180 .mapping_error = alpha_noop_mapping_error,
181 .dma_supported = alpha_noop_supported,
182 .set_dma_mask = alpha_noop_set_mask,
183};
184
185struct dma_map_ops *dma_ops = &alpha_noop_ops;
186EXPORT_SYMBOL(dma_ops);
208 187
209void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 188void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
210{ 189{
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 8449504f5e0b..ce9e54c887fa 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -216,10 +216,30 @@ iommu_arena_free(struct pci_iommu_arena *arena, long ofs, long n)
216 for (i = 0; i < n; ++i) 216 for (i = 0; i < n; ++i)
217 p[i] = 0; 217 p[i] = 0;
218} 218}
219 219
220/* True if the machine supports DAC addressing, and DEV can 220/*
221 make use of it given MASK. */ 221 * True if the machine supports DAC addressing, and DEV can
222static int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask); 222 * make use of it given MASK.
223 */
224static int pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
225{
226 dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
227 int ok = 1;
228
229 /* If this is not set, the machine doesn't support DAC at all. */
230 if (dac_offset == 0)
231 ok = 0;
232
233 /* The device has to be able to address our DAC bit. */
234 if ((dac_offset & dev->dma_mask) != dac_offset)
235 ok = 0;
236
237 /* If both conditions above are met, we are fine. */
238 DBGA("pci_dac_dma_supported %s from %p\n",
239 ok ? "yes" : "no", __builtin_return_address(0));
240
241 return ok;
242}
223 243
224/* Map a single buffer of the indicated size for PCI DMA in streaming 244/* Map a single buffer of the indicated size for PCI DMA in streaming
225 mode. The 32-bit PCI bus mastering address to use is returned. 245 mode. The 32-bit PCI bus mastering address to use is returned.
@@ -301,23 +321,36 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,
301 return ret; 321 return ret;
302} 322}
303 323
304dma_addr_t 324/* Helper for generic DMA-mapping functions. */
305pci_map_single(struct pci_dev *pdev, void *cpu_addr, size_t size, int dir) 325static struct pci_dev *alpha_gendev_to_pci(struct device *dev)
306{ 326{
307 int dac_allowed; 327 if (dev && dev->bus == &pci_bus_type)
328 return to_pci_dev(dev);
308 329
309 if (dir == PCI_DMA_NONE) 330 /* Assume that non-PCI devices asking for DMA are either ISA or EISA,
310 BUG(); 331 BUG() otherwise. */
332 BUG_ON(!isa_bridge);
311 333
312 dac_allowed = pdev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0; 334 /* Assume non-busmaster ISA DMA when dma_mask is not set (the ISA
313 return pci_map_single_1(pdev, cpu_addr, size, dac_allowed); 335 bridge is bus master then). */
336 if (!dev || !dev->dma_mask || !*dev->dma_mask)
337 return isa_bridge;
338
339 /* For EISA bus masters, return isa_bridge (it might have smaller
340 dma_mask due to wiring limitations). */
341 if (*dev->dma_mask >= isa_bridge->dma_mask)
342 return isa_bridge;
343
344 /* This assumes ISA bus master with dma_mask 0xffffff. */
345 return NULL;
314} 346}
315EXPORT_SYMBOL(pci_map_single);
316 347
317dma_addr_t 348static dma_addr_t alpha_pci_map_page(struct device *dev, struct page *page,
318pci_map_page(struct pci_dev *pdev, struct page *page, unsigned long offset, 349 unsigned long offset, size_t size,
319 size_t size, int dir) 350 enum dma_data_direction dir,
351 struct dma_attrs *attrs)
320{ 352{
353 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
321 int dac_allowed; 354 int dac_allowed;
322 355
323 if (dir == PCI_DMA_NONE) 356 if (dir == PCI_DMA_NONE)
@@ -327,7 +360,6 @@ pci_map_page(struct pci_dev *pdev, struct page *page, unsigned long offset,
327 return pci_map_single_1(pdev, (char *)page_address(page) + offset, 360 return pci_map_single_1(pdev, (char *)page_address(page) + offset,
328 size, dac_allowed); 361 size, dac_allowed);
329} 362}
330EXPORT_SYMBOL(pci_map_page);
331 363
332/* Unmap a single streaming mode DMA translation. The DMA_ADDR and 364/* Unmap a single streaming mode DMA translation. The DMA_ADDR and
333 SIZE must match what was provided for in a previous pci_map_single 365 SIZE must match what was provided for in a previous pci_map_single
@@ -335,16 +367,17 @@ EXPORT_SYMBOL(pci_map_page);
335 the cpu to the buffer are guaranteed to see whatever the device 367 the cpu to the buffer are guaranteed to see whatever the device
336 wrote there. */ 368 wrote there. */
337 369
338void 370static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr,
339pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, 371 size_t size, enum dma_data_direction dir,
340 int direction) 372 struct dma_attrs *attrs)
341{ 373{
342 unsigned long flags; 374 unsigned long flags;
375 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
343 struct pci_controller *hose = pdev ? pdev->sysdata : pci_isa_hose; 376 struct pci_controller *hose = pdev ? pdev->sysdata : pci_isa_hose;
344 struct pci_iommu_arena *arena; 377 struct pci_iommu_arena *arena;
345 long dma_ofs, npages; 378 long dma_ofs, npages;
346 379
347 if (direction == PCI_DMA_NONE) 380 if (dir == PCI_DMA_NONE)
348 BUG(); 381 BUG();
349 382
350 if (dma_addr >= __direct_map_base 383 if (dma_addr >= __direct_map_base
@@ -393,25 +426,16 @@ pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
393 DBGA2("pci_unmap_single: sg [%llx,%zx] np %ld from %p\n", 426 DBGA2("pci_unmap_single: sg [%llx,%zx] np %ld from %p\n",
394 dma_addr, size, npages, __builtin_return_address(0)); 427 dma_addr, size, npages, __builtin_return_address(0));
395} 428}
396EXPORT_SYMBOL(pci_unmap_single);
397
398void
399pci_unmap_page(struct pci_dev *pdev, dma_addr_t dma_addr,
400 size_t size, int direction)
401{
402 pci_unmap_single(pdev, dma_addr, size, direction);
403}
404EXPORT_SYMBOL(pci_unmap_page);
405 429
406/* Allocate and map kernel buffer using consistent mode DMA for PCI 430/* Allocate and map kernel buffer using consistent mode DMA for PCI
407 device. Returns non-NULL cpu-view pointer to the buffer if 431 device. Returns non-NULL cpu-view pointer to the buffer if
408 successful and sets *DMA_ADDRP to the pci side dma address as well, 432 successful and sets *DMA_ADDRP to the pci side dma address as well,
409 else DMA_ADDRP is undefined. */ 433 else DMA_ADDRP is undefined. */
410 434
411void * 435static void *alpha_pci_alloc_coherent(struct device *dev, size_t size,
412__pci_alloc_consistent(struct pci_dev *pdev, size_t size, 436 dma_addr_t *dma_addrp, gfp_t gfp)
413 dma_addr_t *dma_addrp, gfp_t gfp)
414{ 437{
438 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
415 void *cpu_addr; 439 void *cpu_addr;
416 long order = get_order(size); 440 long order = get_order(size);
417 441
@@ -439,13 +463,12 @@ try_again:
439 gfp |= GFP_DMA; 463 gfp |= GFP_DMA;
440 goto try_again; 464 goto try_again;
441 } 465 }
442 466
443 DBGA2("pci_alloc_consistent: %zx -> [%p,%llx] from %p\n", 467 DBGA2("pci_alloc_consistent: %zx -> [%p,%llx] from %p\n",
444 size, cpu_addr, *dma_addrp, __builtin_return_address(0)); 468 size, cpu_addr, *dma_addrp, __builtin_return_address(0));
445 469
446 return cpu_addr; 470 return cpu_addr;
447} 471}
448EXPORT_SYMBOL(__pci_alloc_consistent);
449 472
450/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must 473/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must
451 be values that were returned from pci_alloc_consistent. SIZE must 474 be values that were returned from pci_alloc_consistent. SIZE must
@@ -453,17 +476,16 @@ EXPORT_SYMBOL(__pci_alloc_consistent);
453 References to the memory and mappings associated with CPU_ADDR or 476 References to the memory and mappings associated with CPU_ADDR or
454 DMA_ADDR past this call are illegal. */ 477 DMA_ADDR past this call are illegal. */
455 478
456void 479static void alpha_pci_free_coherent(struct device *dev, size_t size,
457pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr, 480 void *cpu_addr, dma_addr_t dma_addr)
458 dma_addr_t dma_addr)
459{ 481{
482 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
460 pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL); 483 pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL);
461 free_pages((unsigned long)cpu_addr, get_order(size)); 484 free_pages((unsigned long)cpu_addr, get_order(size));
462 485
463 DBGA2("pci_free_consistent: [%llx,%zx] from %p\n", 486 DBGA2("pci_free_consistent: [%llx,%zx] from %p\n",
464 dma_addr, size, __builtin_return_address(0)); 487 dma_addr, size, __builtin_return_address(0));
465} 488}
466EXPORT_SYMBOL(pci_free_consistent);
467 489
468/* Classify the elements of the scatterlist. Write dma_address 490/* Classify the elements of the scatterlist. Write dma_address
469 of each element with: 491 of each element with:
@@ -626,23 +648,21 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end,
626 return 1; 648 return 1;
627} 649}
628 650
629int 651static int alpha_pci_map_sg(struct device *dev, struct scatterlist *sg,
630pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents, 652 int nents, enum dma_data_direction dir,
631 int direction) 653 struct dma_attrs *attrs)
632{ 654{
655 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
633 struct scatterlist *start, *end, *out; 656 struct scatterlist *start, *end, *out;
634 struct pci_controller *hose; 657 struct pci_controller *hose;
635 struct pci_iommu_arena *arena; 658 struct pci_iommu_arena *arena;
636 dma_addr_t max_dma; 659 dma_addr_t max_dma;
637 int dac_allowed; 660 int dac_allowed;
638 struct device *dev;
639 661
640 if (direction == PCI_DMA_NONE) 662 if (dir == PCI_DMA_NONE)
641 BUG(); 663 BUG();
642 664
643 dac_allowed = pdev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0; 665 dac_allowed = dev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0;
644
645 dev = pdev ? &pdev->dev : NULL;
646 666
647 /* Fast path single entry scatterlists. */ 667 /* Fast path single entry scatterlists. */
648 if (nents == 1) { 668 if (nents == 1) {
@@ -699,19 +719,19 @@ pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
699 /* Some allocation failed while mapping the scatterlist 719 /* Some allocation failed while mapping the scatterlist
700 entries. Unmap them now. */ 720 entries. Unmap them now. */
701 if (out > start) 721 if (out > start)
702 pci_unmap_sg(pdev, start, out - start, direction); 722 pci_unmap_sg(pdev, start, out - start, dir);
703 return 0; 723 return 0;
704} 724}
705EXPORT_SYMBOL(pci_map_sg);
706 725
707/* Unmap a set of streaming mode DMA translations. Again, cpu read 726/* Unmap a set of streaming mode DMA translations. Again, cpu read
708 rules concerning calls here are the same as for pci_unmap_single() 727 rules concerning calls here are the same as for pci_unmap_single()
709 above. */ 728 above. */
710 729
711void 730static void alpha_pci_unmap_sg(struct device *dev, struct scatterlist *sg,
712pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents, 731 int nents, enum dma_data_direction dir,
713 int direction) 732 struct dma_attrs *attrs)
714{ 733{
734 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
715 unsigned long flags; 735 unsigned long flags;
716 struct pci_controller *hose; 736 struct pci_controller *hose;
717 struct pci_iommu_arena *arena; 737 struct pci_iommu_arena *arena;
@@ -719,7 +739,7 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
719 dma_addr_t max_dma; 739 dma_addr_t max_dma;
720 dma_addr_t fbeg, fend; 740 dma_addr_t fbeg, fend;
721 741
722 if (direction == PCI_DMA_NONE) 742 if (dir == PCI_DMA_NONE)
723 BUG(); 743 BUG();
724 744
725 if (! alpha_mv.mv_pci_tbi) 745 if (! alpha_mv.mv_pci_tbi)
@@ -783,15 +803,13 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
783 803
784 DBGA("pci_unmap_sg: %ld entries\n", nents - (end - sg)); 804 DBGA("pci_unmap_sg: %ld entries\n", nents - (end - sg));
785} 805}
786EXPORT_SYMBOL(pci_unmap_sg);
787
788 806
789/* Return whether the given PCI device DMA address mask can be 807/* Return whether the given PCI device DMA address mask can be
790 supported properly. */ 808 supported properly. */
791 809
792int 810static int alpha_pci_supported(struct device *dev, u64 mask)
793pci_dma_supported(struct pci_dev *pdev, u64 mask)
794{ 811{
812 struct pci_dev *pdev = alpha_gendev_to_pci(dev);
795 struct pci_controller *hose; 813 struct pci_controller *hose;
796 struct pci_iommu_arena *arena; 814 struct pci_iommu_arena *arena;
797 815
@@ -818,7 +836,6 @@ pci_dma_supported(struct pci_dev *pdev, u64 mask)
818 836
819 return 0; 837 return 0;
820} 838}
821EXPORT_SYMBOL(pci_dma_supported);
822 839
823 840
824/* 841/*
@@ -918,66 +935,32 @@ iommu_unbind(struct pci_iommu_arena *arena, long pg_start, long pg_count)
918 return 0; 935 return 0;
919} 936}
920 937
921/* True if the machine supports DAC addressing, and DEV can 938static int alpha_pci_mapping_error(struct device *dev, dma_addr_t dma_addr)
922 make use of it given MASK. */
923
924static int
925pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
926{
927 dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
928 int ok = 1;
929
930 /* If this is not set, the machine doesn't support DAC at all. */
931 if (dac_offset == 0)
932 ok = 0;
933
934 /* The device has to be able to address our DAC bit. */
935 if ((dac_offset & dev->dma_mask) != dac_offset)
936 ok = 0;
937
938 /* If both conditions above are met, we are fine. */
939 DBGA("pci_dac_dma_supported %s from %p\n",
940 ok ? "yes" : "no", __builtin_return_address(0));
941
942 return ok;
943}
944
945/* Helper for generic DMA-mapping functions. */
946
947struct pci_dev *
948alpha_gendev_to_pci(struct device *dev)
949{ 939{
950 if (dev && dev->bus == &pci_bus_type) 940 return dma_addr == 0;
951 return to_pci_dev(dev);
952
953 /* Assume that non-PCI devices asking for DMA are either ISA or EISA,
954 BUG() otherwise. */
955 BUG_ON(!isa_bridge);
956
957 /* Assume non-busmaster ISA DMA when dma_mask is not set (the ISA
958 bridge is bus master then). */
959 if (!dev || !dev->dma_mask || !*dev->dma_mask)
960 return isa_bridge;
961
962 /* For EISA bus masters, return isa_bridge (it might have smaller
963 dma_mask due to wiring limitations). */
964 if (*dev->dma_mask >= isa_bridge->dma_mask)
965 return isa_bridge;
966
967 /* This assumes ISA bus master with dma_mask 0xffffff. */
968 return NULL;
969} 941}
970EXPORT_SYMBOL(alpha_gendev_to_pci);
971 942
972int 943static int alpha_pci_set_mask(struct device *dev, u64 mask)
973dma_set_mask(struct device *dev, u64 mask)
974{ 944{
975 if (!dev->dma_mask || 945 if (!dev->dma_mask ||
976 !pci_dma_supported(alpha_gendev_to_pci(dev), mask)) 946 !pci_dma_supported(alpha_gendev_to_pci(dev), mask))
977 return -EIO; 947 return -EIO;
978 948
979 *dev->dma_mask = mask; 949 *dev->dma_mask = mask;
980
981 return 0; 950 return 0;
982} 951}
983EXPORT_SYMBOL(dma_set_mask); 952
953struct dma_map_ops alpha_pci_ops = {
954 .alloc_coherent = alpha_pci_alloc_coherent,
955 .free_coherent = alpha_pci_free_coherent,
956 .map_page = alpha_pci_map_page,
957 .unmap_page = alpha_pci_unmap_page,
958 .map_sg = alpha_pci_map_sg,
959 .unmap_sg = alpha_pci_unmap_sg,
960 .mapping_error = alpha_pci_mapping_error,
961 .dma_supported = alpha_pci_supported,
962 .set_dma_mask = alpha_pci_set_mask,
963};
964
965struct dma_map_ops *dma_ops = &alpha_pci_ops;
966EXPORT_SYMBOL(dma_ops);
diff --git a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c
index e072041d19f8..9acadc6b16a0 100644
--- a/arch/alpha/kernel/ptrace.c
+++ b/arch/alpha/kernel/ptrace.c
@@ -249,6 +249,17 @@ ptrace_cancel_bpt(struct task_struct * child)
249 return (nsaved != 0); 249 return (nsaved != 0);
250} 250}
251 251
252void user_enable_single_step(struct task_struct *child)
253{
254 /* Mark single stepping. */
255 task_thread_info(child)->bpt_nsaved = -1;
256}
257
258void user_disable_single_step(struct task_struct *child)
259{
260 ptrace_cancel_bpt(child);
261}
262
252/* 263/*
253 * Called by kernel/ptrace.c when detaching.. 264 * Called by kernel/ptrace.c when detaching..
254 * 265 *
@@ -256,7 +267,7 @@ ptrace_cancel_bpt(struct task_struct * child)
256 */ 267 */
257void ptrace_disable(struct task_struct *child) 268void ptrace_disable(struct task_struct *child)
258{ 269{
259 ptrace_cancel_bpt(child); 270 user_disable_single_step(child);
260} 271}
261 272
262long arch_ptrace(struct task_struct *child, long request, long addr, long data) 273long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -295,52 +306,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
295 DBG(DBG_MEM, ("poke $%ld<-%#lx\n", addr, data)); 306 DBG(DBG_MEM, ("poke $%ld<-%#lx\n", addr, data));
296 ret = put_reg(child, addr, data); 307 ret = put_reg(child, addr, data);
297 break; 308 break;
298
299 case PTRACE_SYSCALL:
300 /* continue and stop at next (return from) syscall */
301 case PTRACE_CONT: /* restart after signal. */
302 ret = -EIO;
303 if (!valid_signal(data))
304 break;
305 if (request == PTRACE_SYSCALL)
306 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
307 else
308 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
309 child->exit_code = data;
310 /* make sure single-step breakpoint is gone. */
311 ptrace_cancel_bpt(child);
312 wake_up_process(child);
313 ret = 0;
314 break;
315
316 /*
317 * Make the child exit. Best I can do is send it a sigkill.
318 * perhaps it should be put in the status that it wants to
319 * exit.
320 */
321 case PTRACE_KILL:
322 ret = 0;
323 if (child->exit_state == EXIT_ZOMBIE)
324 break;
325 child->exit_code = SIGKILL;
326 /* make sure single-step breakpoint is gone. */
327 ptrace_cancel_bpt(child);
328 wake_up_process(child);
329 break;
330
331 case PTRACE_SINGLESTEP: /* execute single instruction. */
332 ret = -EIO;
333 if (!valid_signal(data))
334 break;
335 /* Mark single stepping. */
336 task_thread_info(child)->bpt_nsaved = -1;
337 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
338 child->exit_code = data;
339 wake_up_process(child);
340 /* give it a chance to run. */
341 ret = 0;
342 break;
343
344 default: 309 default:
345 ret = ptrace_request(child, request, addr, data); 310 ret = ptrace_request(child, request, addr, data);
346 break; 311 break;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3b181284970f..cadfe2ee66a5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -155,6 +155,9 @@ config ARCH_MAY_HAVE_PC_FDC
155config ZONE_DMA 155config ZONE_DMA
156 bool 156 bool
157 157
158config NEED_DMA_MAP_STATE
159 def_bool y
160
158config GENERIC_ISA_DMA 161config GENERIC_ISA_DMA
159 bool 162 bool
160 163
@@ -321,10 +324,9 @@ config ARCH_MXC
321 bool "Freescale MXC/iMX-based" 324 bool "Freescale MXC/iMX-based"
322 select GENERIC_TIME 325 select GENERIC_TIME
323 select GENERIC_CLOCKEVENTS 326 select GENERIC_CLOCKEVENTS
324 select ARCH_MTD_XIP
325 select GENERIC_GPIO
326 select ARCH_REQUIRE_GPIOLIB 327 select ARCH_REQUIRE_GPIOLIB
327 select HAVE_CLK 328 select HAVE_CLK
329 select COMMON_CLKDEV
328 help 330 help
329 Support for Freescale MXC/iMX-based family of processors 331 Support for Freescale MXC/iMX-based family of processors
330 332
@@ -508,7 +510,7 @@ config ARCH_ORION5X
508 Orion-2 (5281), Orion-1-90 (6183). 510 Orion-2 (5281), Orion-1-90 (6183).
509 511
510config ARCH_MMP 512config ARCH_MMP
511 bool "Marvell PXA168/910" 513 bool "Marvell PXA168/910/MMP2"
512 depends on MMU 514 depends on MMU
513 select GENERIC_GPIO 515 select GENERIC_GPIO
514 select ARCH_REQUIRE_GPIOLIB 516 select ARCH_REQUIRE_GPIOLIB
@@ -519,7 +521,7 @@ config ARCH_MMP
519 select TICK_ONESHOT 521 select TICK_ONESHOT
520 select PLAT_PXA 522 select PLAT_PXA
521 help 523 help
522 Support for Marvell's PXA168/910 processor line. 524 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
523 525
524config ARCH_KS8695 526config ARCH_KS8695
525 bool "Micrel/Kendin KS8695" 527 bool "Micrel/Kendin KS8695"
@@ -605,6 +607,11 @@ config ARCH_MSM
605 interface to the ARM9 modem processor which runs the baseband stack 607 interface to the ARM9 modem processor which runs the baseband stack
606 and controls some vital subsystems (clock and power control, etc). 608 and controls some vital subsystems (clock and power control, etc).
607 609
610config ARCH_SHMOBILE
611 bool "Renesas SH-Mobile"
612 help
613 Support for Renesas's SH-Mobile ARM platforms
614
608config ARCH_RPC 615config ARCH_RPC
609 bool "RiscPC" 616 bool "RiscPC"
610 select ARCH_ACORN 617 select ARCH_ACORN
@@ -648,12 +655,43 @@ config ARCH_S3C2410
648 655
649config ARCH_S3C64XX 656config ARCH_S3C64XX
650 bool "Samsung S3C64XX" 657 bool "Samsung S3C64XX"
658 select PLAT_SAMSUNG
659 select CPU_V6
651 select GENERIC_GPIO 660 select GENERIC_GPIO
661 select ARM_VIC
652 select HAVE_CLK 662 select HAVE_CLK
663 select NO_IOPORT
653 select ARCH_HAS_CPUFREQ 664 select ARCH_HAS_CPUFREQ
665 select ARCH_REQUIRE_GPIOLIB
666 select SAMSUNG_CLKSRC
667 select SAMSUNG_IRQ_VIC_TIMER
668 select SAMSUNG_IRQ_UART
669 select S3C_GPIO_TRACK
670 select S3C_GPIO_PULL_UPDOWN
671 select S3C_GPIO_CFG_S3C24XX
672 select S3C_GPIO_CFG_S3C64XX
673 select S3C_DEV_NAND
674 select USB_ARCH_HAS_OHCI
675 select SAMSUNG_GPIOLIB_4BIT
654 help 676 help
655 Samsung S3C64XX series based systems 677 Samsung S3C64XX series based systems
656 678
679config ARCH_S5P6440
680 bool "Samsung S5P6440"
681 select CPU_V6
682 select GENERIC_GPIO
683 select HAVE_CLK
684 help
685 Samsung S5P6440 CPU based systems
686
687config ARCH_S5P6442
688 bool "Samsung S5P6442"
689 select CPU_V6
690 select GENERIC_GPIO
691 select HAVE_CLK
692 help
693 Samsung S5P6442 CPU based systems
694
657config ARCH_S5PC1XX 695config ARCH_S5PC1XX
658 bool "Samsung S5PC1XX" 696 bool "Samsung S5PC1XX"
659 select GENERIC_GPIO 697 select GENERIC_GPIO
@@ -663,6 +701,15 @@ config ARCH_S5PC1XX
663 help 701 help
664 Samsung S5PC1XX series based systems 702 Samsung S5PC1XX series based systems
665 703
704config ARCH_S5PV210
705 bool "Samsung S5PV210/S5PC110"
706 select CPU_V7
707 select GENERIC_GPIO
708 select HAVE_CLK
709 select ARM_L1_CACHE_SHIFT_6
710 help
711 Samsung S5PV210/S5PC110 series based systems
712
666config ARCH_SHARK 713config ARCH_SHARK
667 bool "Shark" 714 bool "Shark"
668 select CPU_SA110 715 select CPU_SA110
@@ -828,8 +875,7 @@ source "arch/arm/mach-sa1100/Kconfig"
828 875
829source "arch/arm/plat-samsung/Kconfig" 876source "arch/arm/plat-samsung/Kconfig"
830source "arch/arm/plat-s3c24xx/Kconfig" 877source "arch/arm/plat-s3c24xx/Kconfig"
831source "arch/arm/plat-s3c64xx/Kconfig" 878source "arch/arm/plat-s5p/Kconfig"
832source "arch/arm/plat-s3c/Kconfig"
833source "arch/arm/plat-s5pc1xx/Kconfig" 879source "arch/arm/plat-s5pc1xx/Kconfig"
834 880
835if ARCH_S3C2410 881if ARCH_S3C2410
@@ -837,21 +883,27 @@ source "arch/arm/mach-s3c2400/Kconfig"
837source "arch/arm/mach-s3c2410/Kconfig" 883source "arch/arm/mach-s3c2410/Kconfig"
838source "arch/arm/mach-s3c2412/Kconfig" 884source "arch/arm/mach-s3c2412/Kconfig"
839source "arch/arm/mach-s3c2440/Kconfig" 885source "arch/arm/mach-s3c2440/Kconfig"
840source "arch/arm/mach-s3c2442/Kconfig"
841source "arch/arm/mach-s3c2443/Kconfig" 886source "arch/arm/mach-s3c2443/Kconfig"
842endif 887endif
843 888
844if ARCH_S3C64XX 889if ARCH_S3C64XX
845source "arch/arm/mach-s3c6400/Kconfig" 890source "arch/arm/mach-s3c64xx/Kconfig"
846source "arch/arm/mach-s3c6410/Kconfig"
847endif 891endif
848 892
849source "arch/arm/plat-stmp3xxx/Kconfig" 893source "arch/arm/mach-s5p6440/Kconfig"
894
895source "arch/arm/mach-s5p6442/Kconfig"
850 896
851if ARCH_S5PC1XX 897if ARCH_S5PC1XX
852source "arch/arm/mach-s5pc100/Kconfig" 898source "arch/arm/mach-s5pc100/Kconfig"
853endif 899endif
854 900
901source "arch/arm/mach-s5pv210/Kconfig"
902
903source "arch/arm/mach-shmobile/Kconfig"
904
905source "arch/arm/plat-stmp3xxx/Kconfig"
906
855source "arch/arm/mach-u300/Kconfig" 907source "arch/arm/mach-u300/Kconfig"
856 908
857source "arch/arm/mach-ux500/Kconfig" 909source "arch/arm/mach-ux500/Kconfig"
@@ -1117,7 +1169,7 @@ source kernel/Kconfig.preempt
1117config HZ 1169config HZ
1118 int 1170 int
1119 default 128 if ARCH_L7200 1171 default 128 if ARCH_L7200
1120 default 200 if ARCH_EBSA110 || ARCH_S3C2410 1172 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
1121 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1173 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1122 default AT91_TIMER_HZ if ARCH_AT91 1174 default AT91_TIMER_HZ if ARCH_AT91
1123 default 100 1175 default 100
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5cb9326df7a7..91344af75f39 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2
117 cause the debug messages to appear on the first serial port. 117 cause the debug messages to appear on the first serial port.
118 118
119config DEBUG_S3C_UART 119config DEBUG_S3C_UART
120 depends on PLAT_S3C 120 depends on PLAT_SAMSUNG
121 int "S3C UART to use for low-level debug" 121 int "S3C UART to use for low-level debug"
122 default "0" 122 default "0"
123 help 123 help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 81f54ca30788..ed820e737a8a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1) := mx1
146machine-$(CONFIG_ARCH_MX2) := mx2 146machine-$(CONFIG_ARCH_MX2) := mx2
147machine-$(CONFIG_ARCH_MX25) := mx25 147machine-$(CONFIG_ARCH_MX25) := mx25
148machine-$(CONFIG_ARCH_MX3) := mx3 148machine-$(CONFIG_ARCH_MX3) := mx3
149machine-$(CONFIG_ARCH_MX5) := mx5
149machine-$(CONFIG_ARCH_MXC91231) := mxc91231 150machine-$(CONFIG_ARCH_MXC91231) := mxc91231
150machine-$(CONFIG_ARCH_NETX) := netx 151machine-$(CONFIG_ARCH_NETX) := netx
151machine-$(CONFIG_ARCH_NOMADIK) := nomadik 152machine-$(CONFIG_ARCH_NOMADIK) := nomadik
@@ -159,12 +160,16 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008
159machine-$(CONFIG_ARCH_PXA) := pxa 160machine-$(CONFIG_ARCH_PXA) := pxa
160machine-$(CONFIG_ARCH_REALVIEW) := realview 161machine-$(CONFIG_ARCH_REALVIEW) := realview
161machine-$(CONFIG_ARCH_RPC) := rpc 162machine-$(CONFIG_ARCH_RPC) := rpc
162machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 163machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443
163machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 164machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
164machine-$(CONFIG_ARCH_S3C64XX) := s3c6400 s3c6410 165machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
166machine-$(CONFIG_ARCH_S5P6440) := s5p6440
167machine-$(CONFIG_ARCH_S5P6442) := s5p6442
165machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 168machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100
169machine-$(CONFIG_ARCH_S5PV210) := s5pv210
166machine-$(CONFIG_ARCH_SA1100) := sa1100 170machine-$(CONFIG_ARCH_SA1100) := sa1100
167machine-$(CONFIG_ARCH_SHARK) := shark 171machine-$(CONFIG_ARCH_SHARK) := shark
172machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
168machine-$(CONFIG_ARCH_STMP378X) := stmp378x 173machine-$(CONFIG_ARCH_STMP378X) := stmp378x
169machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx 174machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
170machine-$(CONFIG_ARCH_U300) := u300 175machine-$(CONFIG_ARCH_U300) := u300
@@ -178,14 +183,15 @@ machine-$(CONFIG_FOOTBRIDGE) := footbridge
178# by CONFIG_* macro name. 183# by CONFIG_* macro name.
179plat-$(CONFIG_ARCH_MXC) := mxc 184plat-$(CONFIG_ARCH_MXC) := mxc
180plat-$(CONFIG_ARCH_OMAP) := omap 185plat-$(CONFIG_ARCH_OMAP) := omap
186plat-$(CONFIG_ARCH_S3C64XX) := samsung
181plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx 187plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
182plat-$(CONFIG_PLAT_IOP) := iop 188plat-$(CONFIG_PLAT_IOP) := iop
183plat-$(CONFIG_PLAT_NOMADIK) := nomadik 189plat-$(CONFIG_PLAT_NOMADIK) := nomadik
184plat-$(CONFIG_PLAT_ORION) := orion 190plat-$(CONFIG_PLAT_ORION) := orion
185plat-$(CONFIG_PLAT_PXA) := pxa 191plat-$(CONFIG_PLAT_PXA) := pxa
186plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung 192plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung
187plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung 193plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung
188plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung 194plat-$(CONFIG_PLAT_S5P) := s5p samsung
189 195
190ifeq ($(CONFIG_ARCH_EBSA110),y) 196ifeq ($(CONFIG_ARCH_EBSA110),y)
191# This is what happens if you forget the IOCS16 line. 197# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S
index df7bc7068d0f..8b0de41c3dcb 100644
--- a/arch/arm/boot/bootp/init.S
+++ b/arch/arm/boot/bootp/init.S
@@ -49,7 +49,7 @@ _start: add lr, pc, #-0x8 @ lr = current load addr
49/* 49/*
50 * find the end of the tag list, and then add an INITRD tag on the end. 50 * find the end of the tag list, and then add an INITRD tag on the end.
51 * If there is already an INITRD tag, then we ignore it; the last INITRD 51 * If there is already an INITRD tag, then we ignore it; the last INITRD
52 * tag takes precidence. 52 * tag takes precedence.
53 */ 53 */
54taglist: ldr r10, [r9, #0] @ tag length 54taglist: ldr r10, [r9, #0] @ tag length
55 teq r10, #0 @ last tag (zero length)? 55 teq r10, #0 @ last tag (zero length)?
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 99b75aa1c2ec..535a91daaa53 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -170,8 +170,8 @@ not_angel:
170 170
171 .text 171 .text
172 adr r0, LC0 172 adr r0, LC0
173 ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, ip, sp} ) 173 ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
174 THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, ip} ) 174 THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} )
175 THUMB( ldr sp, [r0, #28] ) 175 THUMB( ldr sp, [r0, #28] )
176 subs r0, r0, r1 @ calculate the delta offset 176 subs r0, r0, r1 @ calculate the delta offset
177 177
@@ -182,12 +182,13 @@ not_angel:
182 /* 182 /*
183 * We're running at a different address. We need to fix 183 * We're running at a different address. We need to fix
184 * up various pointers: 184 * up various pointers:
185 * r5 - zImage base address 185 * r5 - zImage base address (_start)
186 * r6 - GOT start 186 * r6 - size of decompressed image
187 * r11 - GOT start
187 * ip - GOT end 188 * ip - GOT end
188 */ 189 */
189 add r5, r5, r0 190 add r5, r5, r0
190 add r6, r6, r0 191 add r11, r11, r0
191 add ip, ip, r0 192 add ip, ip, r0
192 193
193#ifndef CONFIG_ZBOOT_ROM 194#ifndef CONFIG_ZBOOT_ROM
@@ -205,10 +206,10 @@ not_angel:
205 /* 206 /*
206 * Relocate all entries in the GOT table. 207 * Relocate all entries in the GOT table.
207 */ 208 */
2081: ldr r1, [r6, #0] @ relocate entries in the GOT 2091: ldr r1, [r11, #0] @ relocate entries in the GOT
209 add r1, r1, r0 @ table. This fixes up the 210 add r1, r1, r0 @ table. This fixes up the
210 str r1, [r6], #4 @ C references. 211 str r1, [r11], #4 @ C references.
211 cmp r6, ip 212 cmp r11, ip
212 blo 1b 213 blo 1b
213#else 214#else
214 215
@@ -216,12 +217,12 @@ not_angel:
216 * Relocate entries in the GOT table. We only relocate 217 * Relocate entries in the GOT table. We only relocate
217 * the entries that are outside the (relocated) BSS region. 218 * the entries that are outside the (relocated) BSS region.
218 */ 219 */
2191: ldr r1, [r6, #0] @ relocate entries in the GOT 2201: ldr r1, [r11, #0] @ relocate entries in the GOT
220 cmp r1, r2 @ entry < bss_start || 221 cmp r1, r2 @ entry < bss_start ||
221 cmphs r3, r1 @ _end < entry 222 cmphs r3, r1 @ _end < entry
222 addlo r1, r1, r0 @ table. This fixes up the 223 addlo r1, r1, r0 @ table. This fixes up the
223 str r1, [r6], #4 @ C references. 224 str r1, [r11], #4 @ C references.
224 cmp r6, ip 225 cmp r11, ip
225 blo 1b 226 blo 1b
226#endif 227#endif
227 228
@@ -247,6 +248,7 @@ not_relocated: mov r0, #0
247 * Check to see if we will overwrite ourselves. 248 * Check to see if we will overwrite ourselves.
248 * r4 = final kernel address 249 * r4 = final kernel address
249 * r5 = start of this image 250 * r5 = start of this image
251 * r6 = size of decompressed image
250 * r2 = end of malloc space (and therefore this image) 252 * r2 = end of malloc space (and therefore this image)
251 * We basically want: 253 * We basically want:
252 * r4 >= r2 -> OK 254 * r4 >= r2 -> OK
@@ -254,8 +256,7 @@ not_relocated: mov r0, #0
254 */ 256 */
255 cmp r4, r2 257 cmp r4, r2
256 bhs wont_overwrite 258 bhs wont_overwrite
257 sub r3, sp, r5 @ > compressed kernel size 259 add r0, r4, r6
258 add r0, r4, r3, lsl #2 @ allow for 4x expansion
259 cmp r0, r5 260 cmp r0, r5
260 bls wont_overwrite 261 bls wont_overwrite
261 262
@@ -271,7 +272,6 @@ not_relocated: mov r0, #0
271 * r1-r3 = unused 272 * r1-r3 = unused
272 * r4 = kernel execution address 273 * r4 = kernel execution address
273 * r5 = decompressed kernel start 274 * r5 = decompressed kernel start
274 * r6 = processor ID
275 * r7 = architecture ID 275 * r7 = architecture ID
276 * r8 = atags pointer 276 * r8 = atags pointer
277 * r9-r12,r14 = corrupted 277 * r9-r12,r14 = corrupted
@@ -312,7 +312,8 @@ LC0: .word LC0 @ r1
312 .word _end @ r3 312 .word _end @ r3
313 .word zreladdr @ r4 313 .word zreladdr @ r4
314 .word _start @ r5 314 .word _start @ r5
315 .word _got_start @ r6 315 .word _image_size @ r6
316 .word _got_start @ r11
316 .word _got_end @ ip 317 .word _got_end @ ip
317 .word user_stack+4096 @ sp 318 .word user_stack+4096 @ sp
318LC1: .word reloc_end - reloc_start 319LC1: .word reloc_end - reloc_start
@@ -336,7 +337,6 @@ params: ldr r0, =params_phys
336 * 337 *
337 * On entry, 338 * On entry,
338 * r4 = kernel execution address 339 * r4 = kernel execution address
339 * r6 = processor ID
340 * r7 = architecture number 340 * r7 = architecture number
341 * r8 = atags pointer 341 * r8 = atags pointer
342 * r9 = run-time address of "start" (???) 342 * r9 = run-time address of "start" (???)
@@ -542,7 +542,6 @@ __common_mmu_cache_on:
542 * r1-r3 = unused 542 * r1-r3 = unused
543 * r4 = kernel execution address 543 * r4 = kernel execution address
544 * r5 = decompressed kernel start 544 * r5 = decompressed kernel start
545 * r6 = processor ID
546 * r7 = architecture ID 545 * r7 = architecture ID
547 * r8 = atags pointer 546 * r8 = atags pointer
548 * r9-r12,r14 = corrupted 547 * r9-r12,r14 = corrupted
@@ -581,19 +580,19 @@ call_kernel: bl cache_clean_flush
581 * r1 = corrupted 580 * r1 = corrupted
582 * r2 = corrupted 581 * r2 = corrupted
583 * r3 = block offset 582 * r3 = block offset
584 * r6 = corrupted 583 * r9 = corrupted
585 * r12 = corrupted 584 * r12 = corrupted
586 */ 585 */
587 586
588call_cache_fn: adr r12, proc_types 587call_cache_fn: adr r12, proc_types
589#ifdef CONFIG_CPU_CP15 588#ifdef CONFIG_CPU_CP15
590 mrc p15, 0, r6, c0, c0 @ get processor ID 589 mrc p15, 0, r9, c0, c0 @ get processor ID
591#else 590#else
592 ldr r6, =CONFIG_PROCESSOR_ID 591 ldr r9, =CONFIG_PROCESSOR_ID
593#endif 592#endif
5941: ldr r1, [r12, #0] @ get value 5931: ldr r1, [r12, #0] @ get value
595 ldr r2, [r12, #4] @ get mask 594 ldr r2, [r12, #4] @ get mask
596 eor r1, r1, r6 @ (real ^ match) 595 eor r1, r1, r9 @ (real ^ match)
597 tst r1, r2 @ & mask 596 tst r1, r2 @ & mask
598 ARM( addeq pc, r12, r3 ) @ call cache function 597 ARM( addeq pc, r12, r3 ) @ call cache function
599 THUMB( addeq r12, r3 ) 598 THUMB( addeq r12, r3 )
@@ -778,8 +777,7 @@ proc_types:
778 * Turn off the Cache and MMU. ARMv3 does not support 777 * Turn off the Cache and MMU. ARMv3 does not support
779 * reading the control register, but ARMv4 does. 778 * reading the control register, but ARMv4 does.
780 * 779 *
781 * On entry, r6 = processor ID 780 * On exit, r0, r1, r2, r3, r9, r12 corrupted
782 * On exit, r0, r1, r2, r3, r12 corrupted
783 * This routine must preserve: r4, r6, r7 781 * This routine must preserve: r4, r6, r7
784 */ 782 */
785 .align 5 783 .align 5
@@ -852,10 +850,8 @@ __armv3_mmu_cache_off:
852/* 850/*
853 * Clean and flush the cache to maintain consistency. 851 * Clean and flush the cache to maintain consistency.
854 * 852 *
855 * On entry,
856 * r6 = processor ID
857 * On exit, 853 * On exit,
858 * r1, r2, r3, r11, r12 corrupted 854 * r1, r2, r3, r9, r11, r12 corrupted
859 * This routine must preserve: 855 * This routine must preserve:
860 * r0, r4, r5, r6, r7 856 * r0, r4, r5, r6, r7
861 */ 857 */
@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush:
967 mov r2, #64*1024 @ default: 32K dcache size (*2) 963 mov r2, #64*1024 @ default: 32K dcache size (*2)
968 mov r11, #32 @ default: 32 byte line size 964 mov r11, #32 @ default: 32 byte line size
969 mrc p15, 0, r3, c0, c0, 1 @ read cache type 965 mrc p15, 0, r3, c0, c0, 1 @ read cache type
970 teq r3, r6 @ cache ID register present? 966 teq r3, r9 @ cache ID register present?
971 beq no_cache_id 967 beq no_cache_id
972 mov r1, r3, lsr #18 968 mov r1, r3, lsr #18
973 and r1, r1, #7 969 and r1, r1, #7
diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in
index 7ca9ecff652f..d08168941bd6 100644
--- a/arch/arm/boot/compressed/vmlinux.lds.in
+++ b/arch/arm/boot/compressed/vmlinux.lds.in
@@ -43,6 +43,9 @@ SECTIONS
43 43
44 _etext = .; 44 _etext = .;
45 45
46 /* Assume size of decompressed image is 4x the compressed image */
47 _image_size = (_etext - _text) * 4;
48
46 _got_start = .; 49 _got_start = .;
47 .got : { *(.got) } 50 .got : { *(.got) }
48 _got_end = .; 51 _got_end = .;
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
index 446b696196e3..6416d5b5020d 100644
--- a/arch/arm/common/clkdev.c
+++ b/arch/arm/common/clkdev.c
@@ -32,7 +32,7 @@ static DEFINE_MUTEX(clocks_mutex);
32 * If an entry has a device ID, it must match 32 * If an entry has a device ID, it must match
33 * If an entry has a connection ID, it must match 33 * If an entry has a connection ID, it must match
34 * Then we take the most specific entry - with the following 34 * Then we take the most specific entry - with the following
35 * order of precidence: dev+con > dev only > con only. 35 * order of precedence: dev+con > dev only > con only.
36 */ 36 */
37static struct clk *clk_find(const char *dev_id, const char *con_id) 37static struct clk *clk_find(const char *dev_id, const char *con_id)
38{ 38{
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 2793447621c3..ee1d3b85eb65 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -272,33 +272,6 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
272 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); 272 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
273} 273}
274 274
275/*
276 * We override these so we properly do dmabounce otherwise drivers
277 * are able to set the dma_mask to 0xffffffff and we can no longer
278 * trap bounces. :(
279 *
280 * We just return true on everyhing except for < 64MB in which case
281 * we will fail miseralby and die since we can't handle that case.
282 */
283int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
284{
285 dev_dbg(&dev->dev, "%s: %llx\n", __func__, mask);
286 if (mask >= PHYS_OFFSET + SZ_64M - 1)
287 return 0;
288
289 return -EIO;
290}
291
292int
293pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
294{
295 dev_dbg(&dev->dev, "%s: %llx\n", __func__, mask);
296 if (mask >= PHYS_OFFSET + SZ_64M - 1)
297 return 0;
298
299 return -EIO;
300}
301
302int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) 275int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
303{ 276{
304 it8152_io.start = IT8152_IO_BASE + 0x12000; 277 it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index bd36c778c819..90ae00b631c2 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -32,6 +32,12 @@
32 32
33#include <asm/hardware/locomo.h> 33#include <asm/hardware/locomo.h>
34 34
35/* LoCoMo Interrupts */
36#define IRQ_LOCOMO_KEY (0)
37#define IRQ_LOCOMO_GPIO (1)
38#define IRQ_LOCOMO_LT (2)
39#define IRQ_LOCOMO_SPI (3)
40
35/* M62332 output channel selection */ 41/* M62332 output channel selection */
36#define M62332_EVR_CH 1 /* M62332 volume channel number */ 42#define M62332_EVR_CH 1 /* M62332 volume channel number */
37 /* 0 : CH.1 , 1 : CH. 2 */ 43 /* 0 : CH.1 , 1 : CH. 2 */
@@ -58,6 +64,7 @@ struct locomo {
58 struct device *dev; 64 struct device *dev;
59 unsigned long phys; 65 unsigned long phys;
60 unsigned int irq; 66 unsigned int irq;
67 int irq_base;
61 spinlock_t lock; 68 spinlock_t lock;
62 void __iomem *base; 69 void __iomem *base;
63#ifdef CONFIG_PM 70#ifdef CONFIG_PM
@@ -81,9 +88,7 @@ struct locomo_dev_info {
81static struct locomo_dev_info locomo_devices[] = { 88static struct locomo_dev_info locomo_devices[] = {
82 { 89 {
83 .devid = LOCOMO_DEVID_KEYBOARD, 90 .devid = LOCOMO_DEVID_KEYBOARD,
84 .irq = { 91 .irq = { IRQ_LOCOMO_KEY },
85 IRQ_LOCOMO_KEY,
86 },
87 .name = "locomo-keyboard", 92 .name = "locomo-keyboard",
88 .offset = LOCOMO_KEYBOARD, 93 .offset = LOCOMO_KEYBOARD,
89 .length = 16, 94 .length = 16,
@@ -133,53 +138,20 @@ static struct locomo_dev_info locomo_devices[] = {
133 }, 138 },
134}; 139};
135 140
136
137/** LoCoMo interrupt handling stuff.
138 * NOTE: LoCoMo has a 1 to many mapping on all of its IRQs.
139 * that is, there is only one real hardware interrupt
140 * we determine which interrupt it is by reading some IO memory.
141 * We have two levels of expansion, first in the handler for the
142 * hardware interrupt we generate an interrupt
143 * IRQ_LOCOMO_*_BASE and those handlers generate more interrupts
144 *
145 * hardware irq reads LOCOMO_ICR & 0x0f00
146 * IRQ_LOCOMO_KEY_BASE
147 * IRQ_LOCOMO_GPIO_BASE
148 * IRQ_LOCOMO_LT_BASE
149 * IRQ_LOCOMO_SPI_BASE
150 * IRQ_LOCOMO_KEY_BASE reads LOCOMO_KIC & 0x0001
151 * IRQ_LOCOMO_KEY
152 * IRQ_LOCOMO_GPIO_BASE reads LOCOMO_GIR & LOCOMO_GPD & 0xffff
153 * IRQ_LOCOMO_GPIO[0-15]
154 * IRQ_LOCOMO_LT_BASE reads LOCOMO_LTINT & 0x0001
155 * IRQ_LOCOMO_LT
156 * IRQ_LOCOMO_SPI_BASE reads LOCOMO_SPIIR & 0x000F
157 * IRQ_LOCOMO_SPI_RFR
158 * IRQ_LOCOMO_SPI_RFW
159 * IRQ_LOCOMO_SPI_OVRN
160 * IRQ_LOCOMO_SPI_TEND
161 */
162
163#define LOCOMO_IRQ_START (IRQ_LOCOMO_KEY_BASE)
164#define LOCOMO_IRQ_KEY_START (IRQ_LOCOMO_KEY)
165#define LOCOMO_IRQ_GPIO_START (IRQ_LOCOMO_GPIO0)
166#define LOCOMO_IRQ_LT_START (IRQ_LOCOMO_LT)
167#define LOCOMO_IRQ_SPI_START (IRQ_LOCOMO_SPI_RFR)
168
169static void locomo_handler(unsigned int irq, struct irq_desc *desc) 141static void locomo_handler(unsigned int irq, struct irq_desc *desc)
170{ 142{
143 struct locomo *lchip = get_irq_chip_data(irq);
171 int req, i; 144 int req, i;
172 void __iomem *mapbase = get_irq_chip_data(irq);
173 145
174 /* Acknowledge the parent IRQ */ 146 /* Acknowledge the parent IRQ */
175 desc->chip->ack(irq); 147 desc->chip->ack(irq);
176 148
177 /* check why this interrupt was generated */ 149 /* check why this interrupt was generated */
178 req = locomo_readl(mapbase + LOCOMO_ICR) & 0x0f00; 150 req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
179 151
180 if (req) { 152 if (req) {
181 /* generate the next interrupt(s) */ 153 /* generate the next interrupt(s) */
182 irq = LOCOMO_IRQ_START; 154 irq = lchip->irq_base;
183 for (i = 0; i <= 3; i++, irq++) { 155 for (i = 0; i <= 3; i++, irq++) {
184 if (req & (0x0100 << i)) { 156 if (req & (0x0100 << i)) {
185 generic_handle_irq(irq); 157 generic_handle_irq(irq);
@@ -195,20 +167,20 @@ static void locomo_ack_irq(unsigned int irq)
195 167
196static void locomo_mask_irq(unsigned int irq) 168static void locomo_mask_irq(unsigned int irq)
197{ 169{
198 void __iomem *mapbase = get_irq_chip_data(irq); 170 struct locomo *lchip = get_irq_chip_data(irq);
199 unsigned int r; 171 unsigned int r;
200 r = locomo_readl(mapbase + LOCOMO_ICR); 172 r = locomo_readl(lchip->base + LOCOMO_ICR);
201 r &= ~(0x0010 << (irq - LOCOMO_IRQ_START)); 173 r &= ~(0x0010 << (irq - lchip->irq_base));
202 locomo_writel(r, mapbase + LOCOMO_ICR); 174 locomo_writel(r, lchip->base + LOCOMO_ICR);
203} 175}
204 176
205static void locomo_unmask_irq(unsigned int irq) 177static void locomo_unmask_irq(unsigned int irq)
206{ 178{
207 void __iomem *mapbase = get_irq_chip_data(irq); 179 struct locomo *lchip = get_irq_chip_data(irq);
208 unsigned int r; 180 unsigned int r;
209 r = locomo_readl(mapbase + LOCOMO_ICR); 181 r = locomo_readl(lchip->base + LOCOMO_ICR);
210 r |= (0x0010 << (irq - LOCOMO_IRQ_START)); 182 r |= (0x0010 << (irq - lchip->irq_base));
211 locomo_writel(r, mapbase + LOCOMO_ICR); 183 locomo_writel(r, lchip->base + LOCOMO_ICR);
212} 184}
213 185
214static struct irq_chip locomo_chip = { 186static struct irq_chip locomo_chip = {
@@ -218,297 +190,22 @@ static struct irq_chip locomo_chip = {
218 .unmask = locomo_unmask_irq, 190 .unmask = locomo_unmask_irq,
219}; 191};
220 192
221static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
222{
223 void __iomem *mapbase = get_irq_chip_data(irq);
224
225 if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
226 generic_handle_irq(LOCOMO_IRQ_KEY_START);
227 }
228}
229
230static void locomo_key_ack_irq(unsigned int irq)
231{
232 void __iomem *mapbase = get_irq_chip_data(irq);
233 unsigned int r;
234 r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
235 r &= ~(0x0100 << (irq - LOCOMO_IRQ_KEY_START));
236 locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
237}
238
239static void locomo_key_mask_irq(unsigned int irq)
240{
241 void __iomem *mapbase = get_irq_chip_data(irq);
242 unsigned int r;
243 r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
244 r &= ~(0x0010 << (irq - LOCOMO_IRQ_KEY_START));
245 locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
246}
247
248static void locomo_key_unmask_irq(unsigned int irq)
249{
250 void __iomem *mapbase = get_irq_chip_data(irq);
251 unsigned int r;
252 r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
253 r |= (0x0010 << (irq - LOCOMO_IRQ_KEY_START));
254 locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
255}
256
257static struct irq_chip locomo_key_chip = {
258 .name = "LOCOMO-key",
259 .ack = locomo_key_ack_irq,
260 .mask = locomo_key_mask_irq,
261 .unmask = locomo_key_unmask_irq,
262};
263
264static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
265{
266 int req, i;
267 void __iomem *mapbase = get_irq_chip_data(irq);
268
269 req = locomo_readl(mapbase + LOCOMO_GIR) &
270 locomo_readl(mapbase + LOCOMO_GPD) &
271 0xffff;
272
273 if (req) {
274 irq = LOCOMO_IRQ_GPIO_START;
275 for (i = 0; i <= 15; i++, irq++) {
276 if (req & (0x0001 << i)) {
277 generic_handle_irq(irq);
278 }
279 }
280 }
281}
282
283static void locomo_gpio_ack_irq(unsigned int irq)
284{
285 void __iomem *mapbase = get_irq_chip_data(irq);
286 unsigned int r;
287 r = locomo_readl(mapbase + LOCOMO_GWE);
288 r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
289 locomo_writel(r, mapbase + LOCOMO_GWE);
290
291 r = locomo_readl(mapbase + LOCOMO_GIS);
292 r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
293 locomo_writel(r, mapbase + LOCOMO_GIS);
294
295 r = locomo_readl(mapbase + LOCOMO_GWE);
296 r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
297 locomo_writel(r, mapbase + LOCOMO_GWE);
298}
299
300static void locomo_gpio_mask_irq(unsigned int irq)
301{
302 void __iomem *mapbase = get_irq_chip_data(irq);
303 unsigned int r;
304 r = locomo_readl(mapbase + LOCOMO_GIE);
305 r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
306 locomo_writel(r, mapbase + LOCOMO_GIE);
307}
308
309static void locomo_gpio_unmask_irq(unsigned int irq)
310{
311 void __iomem *mapbase = get_irq_chip_data(irq);
312 unsigned int r;
313 r = locomo_readl(mapbase + LOCOMO_GIE);
314 r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
315 locomo_writel(r, mapbase + LOCOMO_GIE);
316}
317
318static int GPIO_IRQ_rising_edge;
319static int GPIO_IRQ_falling_edge;
320
321static int locomo_gpio_type(unsigned int irq, unsigned int type)
322{
323 unsigned int mask;
324 void __iomem *mapbase = get_irq_chip_data(irq);
325
326 mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
327
328 if (type == IRQ_TYPE_PROBE) {
329 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
330 return 0;
331 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
332 }
333
334 if (type & IRQ_TYPE_EDGE_RISING)
335 GPIO_IRQ_rising_edge |= mask;
336 else
337 GPIO_IRQ_rising_edge &= ~mask;
338 if (type & IRQ_TYPE_EDGE_FALLING)
339 GPIO_IRQ_falling_edge |= mask;
340 else
341 GPIO_IRQ_falling_edge &= ~mask;
342 locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE);
343 locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE);
344
345 return 0;
346}
347
348static struct irq_chip locomo_gpio_chip = {
349 .name = "LOCOMO-gpio",
350 .ack = locomo_gpio_ack_irq,
351 .mask = locomo_gpio_mask_irq,
352 .unmask = locomo_gpio_unmask_irq,
353 .set_type = locomo_gpio_type,
354};
355
356static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
357{
358 void __iomem *mapbase = get_irq_chip_data(irq);
359
360 if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
361 generic_handle_irq(LOCOMO_IRQ_LT_START);
362 }
363}
364
365static void locomo_lt_ack_irq(unsigned int irq)
366{
367 void __iomem *mapbase = get_irq_chip_data(irq);
368 unsigned int r;
369 r = locomo_readl(mapbase + LOCOMO_LTINT);
370 r &= ~(0x0100 << (irq - LOCOMO_IRQ_LT_START));
371 locomo_writel(r, mapbase + LOCOMO_LTINT);
372}
373
374static void locomo_lt_mask_irq(unsigned int irq)
375{
376 void __iomem *mapbase = get_irq_chip_data(irq);
377 unsigned int r;
378 r = locomo_readl(mapbase + LOCOMO_LTINT);
379 r &= ~(0x0010 << (irq - LOCOMO_IRQ_LT_START));
380 locomo_writel(r, mapbase + LOCOMO_LTINT);
381}
382
383static void locomo_lt_unmask_irq(unsigned int irq)
384{
385 void __iomem *mapbase = get_irq_chip_data(irq);
386 unsigned int r;
387 r = locomo_readl(mapbase + LOCOMO_LTINT);
388 r |= (0x0010 << (irq - LOCOMO_IRQ_LT_START));
389 locomo_writel(r, mapbase + LOCOMO_LTINT);
390}
391
392static struct irq_chip locomo_lt_chip = {
393 .name = "LOCOMO-lt",
394 .ack = locomo_lt_ack_irq,
395 .mask = locomo_lt_mask_irq,
396 .unmask = locomo_lt_unmask_irq,
397};
398
399static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
400{
401 int req, i;
402 void __iomem *mapbase = get_irq_chip_data(irq);
403
404 req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
405 if (req) {
406 irq = LOCOMO_IRQ_SPI_START;
407
408 for (i = 0; i <= 3; i++, irq++) {
409 if (req & (0x0001 << i)) {
410 generic_handle_irq(irq);
411 }
412 }
413 }
414}
415
416static void locomo_spi_ack_irq(unsigned int irq)
417{
418 void __iomem *mapbase = get_irq_chip_data(irq);
419 unsigned int r;
420 r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
421 r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
422 locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
423
424 r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
425 r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
426 locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
427
428 r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
429 r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
430 locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
431}
432
433static void locomo_spi_mask_irq(unsigned int irq)
434{
435 void __iomem *mapbase = get_irq_chip_data(irq);
436 unsigned int r;
437 r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
438 r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
439 locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
440}
441
442static void locomo_spi_unmask_irq(unsigned int irq)
443{
444 void __iomem *mapbase = get_irq_chip_data(irq);
445 unsigned int r;
446 r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
447 r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
448 locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
449}
450
451static struct irq_chip locomo_spi_chip = {
452 .name = "LOCOMO-spi",
453 .ack = locomo_spi_ack_irq,
454 .mask = locomo_spi_mask_irq,
455 .unmask = locomo_spi_unmask_irq,
456};
457
458static void locomo_setup_irq(struct locomo *lchip) 193static void locomo_setup_irq(struct locomo *lchip)
459{ 194{
460 int irq; 195 int irq = lchip->irq_base;
461 void __iomem *irqbase = lchip->base;
462 196
463 /* 197 /*
464 * Install handler for IRQ_LOCOMO_HW. 198 * Install handler for IRQ_LOCOMO_HW.
465 */ 199 */
466 set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); 200 set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
467 set_irq_chip_data(lchip->irq, irqbase); 201 set_irq_chip_data(lchip->irq, lchip);
468 set_irq_chained_handler(lchip->irq, locomo_handler); 202 set_irq_chained_handler(lchip->irq, locomo_handler);
469 203
470 /* Install handlers for IRQ_LOCOMO_*_BASE */ 204 /* Install handlers for IRQ_LOCOMO_* */
471 set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip); 205 for ( ; irq <= lchip->irq_base + 3; irq++) {
472 set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase); 206 set_irq_chip(irq, &locomo_chip);
473 set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler); 207 set_irq_chip_data(irq, lchip);
474 208 set_irq_handler(irq, handle_level_irq);
475 set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
476 set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
477 set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
478
479 set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
480 set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
481 set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
482
483 set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
484 set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
485 set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
486
487 /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
488 set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
489 set_irq_chip_data(LOCOMO_IRQ_KEY_START, irqbase);
490 set_irq_handler(LOCOMO_IRQ_KEY_START, handle_edge_irq);
491 set_irq_flags(LOCOMO_IRQ_KEY_START, IRQF_VALID | IRQF_PROBE);
492
493 /* install handlers for IRQ_LOCOMO_GPIO_BASE generated interrupts */
494 for (irq = LOCOMO_IRQ_GPIO_START; irq < LOCOMO_IRQ_GPIO_START + 16; irq++) {
495 set_irq_chip(irq, &locomo_gpio_chip);
496 set_irq_chip_data(irq, irqbase);
497 set_irq_handler(irq, handle_edge_irq);
498 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
499 }
500
501 /* install handlers for IRQ_LOCOMO_LT_BASE generated interrupts */
502 set_irq_chip(LOCOMO_IRQ_LT_START, &locomo_lt_chip);
503 set_irq_chip_data(LOCOMO_IRQ_LT_START, irqbase);
504 set_irq_handler(LOCOMO_IRQ_LT_START, handle_edge_irq);
505 set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
506
507 /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
508 for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) {
509 set_irq_chip(irq, &locomo_spi_chip);
510 set_irq_chip_data(irq, irqbase);
511 set_irq_handler(irq, handle_edge_irq);
512 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 209 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
513 } 210 }
514} 211}
@@ -555,7 +252,8 @@ locomo_init_one_child(struct locomo *lchip, struct locomo_dev_info *info)
555 dev->mapbase = 0; 252 dev->mapbase = 0;
556 dev->length = info->length; 253 dev->length = info->length;
557 254
558 memmove(dev->irq, info->irq, sizeof(dev->irq)); 255 dev->irq[0] = (lchip->irq_base == NO_IRQ) ?
256 NO_IRQ : lchip->irq_base + info->irq[0];
559 257
560 ret = device_register(&dev->dev); 258 ret = device_register(&dev->dev);
561 if (ret) { 259 if (ret) {
@@ -672,6 +370,7 @@ static int locomo_resume(struct platform_device *dev)
672static int 370static int
673__locomo_probe(struct device *me, struct resource *mem, int irq) 371__locomo_probe(struct device *me, struct resource *mem, int irq)
674{ 372{
373 struct locomo_platform_data *pdata = me->platform_data;
675 struct locomo *lchip; 374 struct locomo *lchip;
676 unsigned long r; 375 unsigned long r;
677 int i, ret = -ENODEV; 376 int i, ret = -ENODEV;
@@ -687,6 +386,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
687 386
688 lchip->phys = mem->start; 387 lchip->phys = mem->start;
689 lchip->irq = irq; 388 lchip->irq = irq;
389 lchip->irq_base = (pdata) ? pdata->irq_base : NO_IRQ;
690 390
691 /* 391 /*
692 * Map the whole region. This also maps the 392 * Map the whole region. This also maps the
@@ -753,7 +453,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
753 * The interrupt controller must be initialised before any 453 * The interrupt controller must be initialised before any
754 * other device to ensure that the interrupts are available. 454 * other device to ensure that the interrupts are available.
755 */ 455 */
756 if (lchip->irq != NO_IRQ) 456 if (lchip->irq != NO_IRQ && lchip->irq_base != NO_IRQ)
757 locomo_setup_irq(lchip); 457 locomo_setup_irq(lchip);
758 458
759 for (i = 0; i < ARRAY_SIZE(locomo_devices); i++) 459 for (i = 0; i < ARRAY_SIZE(locomo_devices); i++)
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 8ba7044c554d..a52a27c1d9be 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -35,6 +35,58 @@
35 35
36#include <asm/hardware/sa1111.h> 36#include <asm/hardware/sa1111.h>
37 37
38/* SA1111 IRQs */
39#define IRQ_GPAIN0 (0)
40#define IRQ_GPAIN1 (1)
41#define IRQ_GPAIN2 (2)
42#define IRQ_GPAIN3 (3)
43#define IRQ_GPBIN0 (4)
44#define IRQ_GPBIN1 (5)
45#define IRQ_GPBIN2 (6)
46#define IRQ_GPBIN3 (7)
47#define IRQ_GPBIN4 (8)
48#define IRQ_GPBIN5 (9)
49#define IRQ_GPCIN0 (10)
50#define IRQ_GPCIN1 (11)
51#define IRQ_GPCIN2 (12)
52#define IRQ_GPCIN3 (13)
53#define IRQ_GPCIN4 (14)
54#define IRQ_GPCIN5 (15)
55#define IRQ_GPCIN6 (16)
56#define IRQ_GPCIN7 (17)
57#define IRQ_MSTXINT (18)
58#define IRQ_MSRXINT (19)
59#define IRQ_MSSTOPERRINT (20)
60#define IRQ_TPTXINT (21)
61#define IRQ_TPRXINT (22)
62#define IRQ_TPSTOPERRINT (23)
63#define SSPXMTINT (24)
64#define SSPRCVINT (25)
65#define SSPROR (26)
66#define AUDXMTDMADONEA (32)
67#define AUDRCVDMADONEA (33)
68#define AUDXMTDMADONEB (34)
69#define AUDRCVDMADONEB (35)
70#define AUDTFSR (36)
71#define AUDRFSR (37)
72#define AUDTUR (38)
73#define AUDROR (39)
74#define AUDDTS (40)
75#define AUDRDD (41)
76#define AUDSTO (42)
77#define IRQ_USBPWR (43)
78#define IRQ_HCIM (44)
79#define IRQ_HCIBUFFACC (45)
80#define IRQ_HCIRMTWKP (46)
81#define IRQ_NHCIMFCIR (47)
82#define IRQ_USB_PORT_RESUME (48)
83#define IRQ_S0_READY_NINT (49)
84#define IRQ_S1_READY_NINT (50)
85#define IRQ_S0_CD_VALID (51)
86#define IRQ_S1_CD_VALID (52)
87#define IRQ_S0_BVD1_STSCHG (53)
88#define IRQ_S1_BVD1_STSCHG (54)
89
38extern void __init sa1110_mb_enable(void); 90extern void __init sa1110_mb_enable(void);
39 91
40/* 92/*
@@ -49,6 +101,7 @@ struct sa1111 {
49 struct clk *clk; 101 struct clk *clk;
50 unsigned long phys; 102 unsigned long phys;
51 int irq; 103 int irq;
104 int irq_base; /* base for cascaded on-chip IRQs */
52 spinlock_t lock; 105 spinlock_t lock;
53 void __iomem *base; 106 void __iomem *base;
54#ifdef CONFIG_PM 107#ifdef CONFIG_PM
@@ -152,36 +205,37 @@ static void
152sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 205sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
153{ 206{
154 unsigned int stat0, stat1, i; 207 unsigned int stat0, stat1, i;
155 void __iomem *base = get_irq_data(irq); 208 struct sa1111 *sachip = get_irq_data(irq);
209 void __iomem *mapbase = sachip->base + SA1111_INTC;
156 210
157 stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); 211 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
158 stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); 212 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
159 213
160 sa1111_writel(stat0, base + SA1111_INTSTATCLR0); 214 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
161 215
162 desc->chip->ack(irq); 216 desc->chip->ack(irq);
163 217
164 sa1111_writel(stat1, base + SA1111_INTSTATCLR1); 218 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
165 219
166 if (stat0 == 0 && stat1 == 0) { 220 if (stat0 == 0 && stat1 == 0) {
167 do_bad_IRQ(irq, desc); 221 do_bad_IRQ(irq, desc);
168 return; 222 return;
169 } 223 }
170 224
171 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) 225 for (i = 0; stat0; i++, stat0 >>= 1)
172 if (stat0 & 1) 226 if (stat0 & 1)
173 handle_edge_irq(i, irq_desc + i); 227 generic_handle_irq(i + sachip->irq_base);
174 228
175 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) 229 for (i = 32; stat1; i++, stat1 >>= 1)
176 if (stat1 & 1) 230 if (stat1 & 1)
177 handle_edge_irq(i, irq_desc + i); 231 generic_handle_irq(i + sachip->irq_base);
178 232
179 /* For level-based interrupts */ 233 /* For level-based interrupts */
180 desc->chip->unmask(irq); 234 desc->chip->unmask(irq);
181} 235}
182 236
183#define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) 237#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
184#define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) 238#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
185 239
186static void sa1111_ack_irq(unsigned int irq) 240static void sa1111_ack_irq(unsigned int irq)
187{ 241{
@@ -189,7 +243,8 @@ static void sa1111_ack_irq(unsigned int irq)
189 243
190static void sa1111_mask_lowirq(unsigned int irq) 244static void sa1111_mask_lowirq(unsigned int irq)
191{ 245{
192 void __iomem *mapbase = get_irq_chip_data(irq); 246 struct sa1111 *sachip = get_irq_chip_data(irq);
247 void __iomem *mapbase = sachip->base + SA1111_INTC;
193 unsigned long ie0; 248 unsigned long ie0;
194 249
195 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 250 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -199,7 +254,8 @@ static void sa1111_mask_lowirq(unsigned int irq)
199 254
200static void sa1111_unmask_lowirq(unsigned int irq) 255static void sa1111_unmask_lowirq(unsigned int irq)
201{ 256{
202 void __iomem *mapbase = get_irq_chip_data(irq); 257 struct sa1111 *sachip = get_irq_chip_data(irq);
258 void __iomem *mapbase = sachip->base + SA1111_INTC;
203 unsigned long ie0; 259 unsigned long ie0;
204 260
205 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 261 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -216,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigned int irq)
216 */ 272 */
217static int sa1111_retrigger_lowirq(unsigned int irq) 273static int sa1111_retrigger_lowirq(unsigned int irq)
218{ 274{
275 struct sa1111 *sachip = get_irq_chip_data(irq);
276 void __iomem *mapbase = sachip->base + SA1111_INTC;
219 unsigned int mask = SA1111_IRQMASK_LO(irq); 277 unsigned int mask = SA1111_IRQMASK_LO(irq);
220 void __iomem *mapbase = get_irq_chip_data(irq);
221 unsigned long ip0; 278 unsigned long ip0;
222 int i; 279 int i;
223 280
@@ -237,8 +294,9 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
237 294
238static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 295static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
239{ 296{
297 struct sa1111 *sachip = get_irq_chip_data(irq);
298 void __iomem *mapbase = sachip->base + SA1111_INTC;
240 unsigned int mask = SA1111_IRQMASK_LO(irq); 299 unsigned int mask = SA1111_IRQMASK_LO(irq);
241 void __iomem *mapbase = get_irq_chip_data(irq);
242 unsigned long ip0; 300 unsigned long ip0;
243 301
244 if (flags == IRQ_TYPE_PROBE) 302 if (flags == IRQ_TYPE_PROBE)
@@ -260,8 +318,9 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
260 318
261static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 319static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
262{ 320{
321 struct sa1111 *sachip = get_irq_chip_data(irq);
322 void __iomem *mapbase = sachip->base + SA1111_INTC;
263 unsigned int mask = SA1111_IRQMASK_LO(irq); 323 unsigned int mask = SA1111_IRQMASK_LO(irq);
264 void __iomem *mapbase = get_irq_chip_data(irq);
265 unsigned long we0; 324 unsigned long we0;
266 325
267 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 326 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -286,7 +345,8 @@ static struct irq_chip sa1111_low_chip = {
286 345
287static void sa1111_mask_highirq(unsigned int irq) 346static void sa1111_mask_highirq(unsigned int irq)
288{ 347{
289 void __iomem *mapbase = get_irq_chip_data(irq); 348 struct sa1111 *sachip = get_irq_chip_data(irq);
349 void __iomem *mapbase = sachip->base + SA1111_INTC;
290 unsigned long ie1; 350 unsigned long ie1;
291 351
292 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 352 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -296,7 +356,8 @@ static void sa1111_mask_highirq(unsigned int irq)
296 356
297static void sa1111_unmask_highirq(unsigned int irq) 357static void sa1111_unmask_highirq(unsigned int irq)
298{ 358{
299 void __iomem *mapbase = get_irq_chip_data(irq); 359 struct sa1111 *sachip = get_irq_chip_data(irq);
360 void __iomem *mapbase = sachip->base + SA1111_INTC;
300 unsigned long ie1; 361 unsigned long ie1;
301 362
302 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 363 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -313,8 +374,9 @@ static void sa1111_unmask_highirq(unsigned int irq)
313 */ 374 */
314static int sa1111_retrigger_highirq(unsigned int irq) 375static int sa1111_retrigger_highirq(unsigned int irq)
315{ 376{
377 struct sa1111 *sachip = get_irq_chip_data(irq);
378 void __iomem *mapbase = sachip->base + SA1111_INTC;
316 unsigned int mask = SA1111_IRQMASK_HI(irq); 379 unsigned int mask = SA1111_IRQMASK_HI(irq);
317 void __iomem *mapbase = get_irq_chip_data(irq);
318 unsigned long ip1; 380 unsigned long ip1;
319 int i; 381 int i;
320 382
@@ -334,8 +396,9 @@ static int sa1111_retrigger_highirq(unsigned int irq)
334 396
335static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 397static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
336{ 398{
399 struct sa1111 *sachip = get_irq_chip_data(irq);
400 void __iomem *mapbase = sachip->base + SA1111_INTC;
337 unsigned int mask = SA1111_IRQMASK_HI(irq); 401 unsigned int mask = SA1111_IRQMASK_HI(irq);
338 void __iomem *mapbase = get_irq_chip_data(irq);
339 unsigned long ip1; 402 unsigned long ip1;
340 403
341 if (flags == IRQ_TYPE_PROBE) 404 if (flags == IRQ_TYPE_PROBE)
@@ -357,8 +420,9 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
357 420
358static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 421static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
359{ 422{
423 struct sa1111 *sachip = get_irq_chip_data(irq);
424 void __iomem *mapbase = sachip->base + SA1111_INTC;
360 unsigned int mask = SA1111_IRQMASK_HI(irq); 425 unsigned int mask = SA1111_IRQMASK_HI(irq);
361 void __iomem *mapbase = get_irq_chip_data(irq);
362 unsigned long we1; 426 unsigned long we1;
363 427
364 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 428 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -412,14 +476,14 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
412 476
413 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 477 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
414 set_irq_chip(irq, &sa1111_low_chip); 478 set_irq_chip(irq, &sa1111_low_chip);
415 set_irq_chip_data(irq, irqbase); 479 set_irq_chip_data(irq, sachip);
416 set_irq_handler(irq, handle_edge_irq); 480 set_irq_handler(irq, handle_edge_irq);
417 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 481 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
418 } 482 }
419 483
420 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 484 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
421 set_irq_chip(irq, &sa1111_high_chip); 485 set_irq_chip(irq, &sa1111_high_chip);
422 set_irq_chip_data(irq, irqbase); 486 set_irq_chip_data(irq, sachip);
423 set_irq_handler(irq, handle_edge_irq); 487 set_irq_handler(irq, handle_edge_irq);
424 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 488 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
425 } 489 }
@@ -428,7 +492,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
428 * Register SA1111 interrupt 492 * Register SA1111 interrupt
429 */ 493 */
430 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 494 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
431 set_irq_data(sachip->irq, irqbase); 495 set_irq_data(sachip->irq, sachip);
432 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 496 set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
433} 497}
434 498
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 37bda5f3dde3..9012004321dd 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -140,6 +140,7 @@ EXPORT_SYMBOL(reset_scoop);
140EXPORT_SYMBOL(read_scoop_reg); 140EXPORT_SYMBOL(read_scoop_reg);
141EXPORT_SYMBOL(write_scoop_reg); 141EXPORT_SYMBOL(write_scoop_reg);
142 142
143#ifdef CONFIG_PM
143static void check_scoop_reg(struct scoop_dev *sdev) 144static void check_scoop_reg(struct scoop_dev *sdev)
144{ 145{
145 unsigned short mcr; 146 unsigned short mcr;
@@ -149,7 +150,6 @@ static void check_scoop_reg(struct scoop_dev *sdev)
149 iowrite16(0x0101, sdev->base + SCOOP_MCR); 150 iowrite16(0x0101, sdev->base + SCOOP_MCR);
150} 151}
151 152
152#ifdef CONFIG_PM
153static int scoop_suspend(struct platform_device *dev, pm_message_t state) 153static int scoop_suspend(struct platform_device *dev, pm_message_t state)
154{ 154{
155 struct scoop_dev *sdev = platform_get_drvdata(dev); 155 struct scoop_dev *sdev = platform_get_drvdata(dev);
diff --git a/arch/arm/configs/ap4evb_defconfig b/arch/arm/configs/ap4evb_defconfig
new file mode 100644
index 000000000000..e14229be7676
--- /dev/null
+++ b/arch/arm/configs/ap4evb_defconfig
@@ -0,0 +1,779 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc7
4# Mon Feb 8 12:25:36 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_TIME=y
9CONFIG_GENERIC_CLOCKEVENTS=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33CONFIG_HAVE_KERNEL_GZIP=y
34CONFIG_HAVE_KERNEL_LZO=y
35CONFIG_KERNEL_GZIP=y
36# CONFIG_KERNEL_BZIP2 is not set
37# CONFIG_KERNEL_LZMA is not set
38# CONFIG_KERNEL_LZO is not set
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_BSD_PROCESS_ACCT is not set
43
44#
45# RCU Subsystem
46#
47CONFIG_TREE_RCU=y
48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_TINY_RCU is not set
50# CONFIG_RCU_TRACE is not set
51CONFIG_RCU_FANOUT=32
52# CONFIG_RCU_FANOUT_EXACT is not set
53# CONFIG_TREE_RCU_TRACE is not set
54CONFIG_IKCONFIG=y
55CONFIG_IKCONFIG_PROC=y
56CONFIG_LOG_BUF_SHIFT=16
57CONFIG_GROUP_SCHED=y
58CONFIG_FAIR_GROUP_SCHED=y
59# CONFIG_RT_GROUP_SCHED is not set
60CONFIG_USER_SCHED=y
61# CONFIG_CGROUP_SCHED is not set
62# CONFIG_CGROUPS is not set
63# CONFIG_SYSFS_DEPRECATED_V2 is not set
64# CONFIG_RELAY is not set
65CONFIG_NAMESPACES=y
66# CONFIG_UTS_NS is not set
67# CONFIG_IPC_NS is not set
68# CONFIG_USER_NS is not set
69# CONFIG_PID_NS is not set
70CONFIG_BLK_DEV_INITRD=y
71CONFIG_INITRAMFS_SOURCE=""
72CONFIG_RD_GZIP=y
73CONFIG_RD_BZIP2=y
74CONFIG_RD_LZMA=y
75CONFIG_RD_LZO=y
76CONFIG_CC_OPTIMIZE_FOR_SIZE=y
77CONFIG_SYSCTL=y
78CONFIG_ANON_INODES=y
79# CONFIG_EMBEDDED is not set
80CONFIG_UID16=y
81CONFIG_SYSCTL_SYSCALL=y
82CONFIG_KALLSYMS=y
83# CONFIG_KALLSYMS_ALL is not set
84# CONFIG_KALLSYMS_EXTRA_PASS is not set
85CONFIG_HOTPLUG=y
86CONFIG_PRINTK=y
87CONFIG_BUG=y
88CONFIG_ELF_CORE=y
89CONFIG_BASE_FULL=y
90CONFIG_FUTEX=y
91CONFIG_EPOLL=y
92CONFIG_SIGNALFD=y
93CONFIG_TIMERFD=y
94CONFIG_EVENTFD=y
95CONFIG_SHMEM=y
96CONFIG_AIO=y
97
98#
99# Kernel Performance Events And Counters
100#
101CONFIG_VM_EVENT_COUNTERS=y
102CONFIG_COMPAT_BRK=y
103CONFIG_SLAB=y
104# CONFIG_SLUB is not set
105# CONFIG_SLOB is not set
106# CONFIG_PROFILING is not set
107CONFIG_HAVE_OPROFILE=y
108CONFIG_HAVE_KPROBES=y
109CONFIG_HAVE_KRETPROBES=y
110CONFIG_HAVE_CLK=y
111
112#
113# GCOV-based kernel profiling
114#
115# CONFIG_SLOW_WORK is not set
116CONFIG_HAVE_GENERIC_DMA_COHERENT=y
117CONFIG_SLABINFO=y
118CONFIG_RT_MUTEXES=y
119CONFIG_BASE_SMALL=0
120# CONFIG_MODULES is not set
121CONFIG_BLOCK=y
122CONFIG_LBDAF=y
123# CONFIG_BLK_DEV_BSG is not set
124# CONFIG_BLK_DEV_INTEGRITY is not set
125
126#
127# IO Schedulers
128#
129CONFIG_IOSCHED_NOOP=y
130# CONFIG_IOSCHED_DEADLINE is not set
131# CONFIG_IOSCHED_CFQ is not set
132# CONFIG_DEFAULT_DEADLINE is not set
133# CONFIG_DEFAULT_CFQ is not set
134CONFIG_DEFAULT_NOOP=y
135CONFIG_DEFAULT_IOSCHED="noop"
136# CONFIG_INLINE_SPIN_TRYLOCK is not set
137# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
138# CONFIG_INLINE_SPIN_LOCK is not set
139# CONFIG_INLINE_SPIN_LOCK_BH is not set
140# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
141# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
142CONFIG_INLINE_SPIN_UNLOCK=y
143# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
144CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
145# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
146# CONFIG_INLINE_READ_TRYLOCK is not set
147# CONFIG_INLINE_READ_LOCK is not set
148# CONFIG_INLINE_READ_LOCK_BH is not set
149# CONFIG_INLINE_READ_LOCK_IRQ is not set
150# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
151CONFIG_INLINE_READ_UNLOCK=y
152# CONFIG_INLINE_READ_UNLOCK_BH is not set
153CONFIG_INLINE_READ_UNLOCK_IRQ=y
154# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
155# CONFIG_INLINE_WRITE_TRYLOCK is not set
156# CONFIG_INLINE_WRITE_LOCK is not set
157# CONFIG_INLINE_WRITE_LOCK_BH is not set
158# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
159# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
160CONFIG_INLINE_WRITE_UNLOCK=y
161# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
162CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
163# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
164# CONFIG_MUTEX_SPIN_ON_OWNER is not set
165# CONFIG_FREEZER is not set
166
167#
168# System Type
169#
170CONFIG_MMU=y
171# CONFIG_ARCH_AAEC2000 is not set
172# CONFIG_ARCH_INTEGRATOR is not set
173# CONFIG_ARCH_REALVIEW is not set
174# CONFIG_ARCH_VERSATILE is not set
175# CONFIG_ARCH_AT91 is not set
176# CONFIG_ARCH_CLPS711X is not set
177# CONFIG_ARCH_GEMINI is not set
178# CONFIG_ARCH_EBSA110 is not set
179# CONFIG_ARCH_EP93XX is not set
180# CONFIG_ARCH_FOOTBRIDGE is not set
181# CONFIG_ARCH_MXC is not set
182# CONFIG_ARCH_STMP3XXX is not set
183# CONFIG_ARCH_NETX is not set
184# CONFIG_ARCH_H720X is not set
185# CONFIG_ARCH_NOMADIK is not set
186# CONFIG_ARCH_IOP13XX is not set
187# CONFIG_ARCH_IOP32X is not set
188# CONFIG_ARCH_IOP33X is not set
189# CONFIG_ARCH_IXP23XX is not set
190# CONFIG_ARCH_IXP2000 is not set
191# CONFIG_ARCH_IXP4XX is not set
192# CONFIG_ARCH_L7200 is not set
193# CONFIG_ARCH_DOVE is not set
194# CONFIG_ARCH_KIRKWOOD is not set
195# CONFIG_ARCH_LOKI is not set
196# CONFIG_ARCH_MV78XX0 is not set
197# CONFIG_ARCH_ORION5X is not set
198# CONFIG_ARCH_MMP is not set
199# CONFIG_ARCH_KS8695 is not set
200# CONFIG_ARCH_NS9XXX is not set
201# CONFIG_ARCH_W90X900 is not set
202# CONFIG_ARCH_PNX4008 is not set
203# CONFIG_ARCH_PXA is not set
204# CONFIG_ARCH_MSM is not set
205CONFIG_ARCH_SHMOBILE=y
206# CONFIG_ARCH_RPC is not set
207# CONFIG_ARCH_SA1100 is not set
208# CONFIG_ARCH_S3C2410 is not set
209# CONFIG_ARCH_S3C64XX is not set
210# CONFIG_ARCH_S5PC1XX is not set
211# CONFIG_ARCH_SHARK is not set
212# CONFIG_ARCH_LH7A40X is not set
213# CONFIG_ARCH_U300 is not set
214# CONFIG_ARCH_DAVINCI is not set
215# CONFIG_ARCH_OMAP is not set
216# CONFIG_ARCH_BCMRING is not set
217# CONFIG_ARCH_U8500 is not set
218
219#
220# SH-Mobile System Type
221#
222# CONFIG_ARCH_SH7367 is not set
223# CONFIG_ARCH_SH7377 is not set
224CONFIG_ARCH_SH7372=y
225
226#
227# SH-Mobile Board Type
228#
229CONFIG_MACH_AP4EVB=y
230
231#
232# SH-Mobile System Configuration
233#
234
235#
236# Memory configuration
237#
238CONFIG_MEMORY_START=0x40000000
239CONFIG_MEMORY_SIZE=0x10000000
240
241#
242# Timer and clock configuration
243#
244CONFIG_SH_TIMER_CMT=y
245
246#
247# Processor Type
248#
249CONFIG_CPU_32v6K=y
250CONFIG_CPU_V7=y
251CONFIG_CPU_32v7=y
252CONFIG_CPU_ABRT_EV7=y
253CONFIG_CPU_PABRT_V7=y
254CONFIG_CPU_CACHE_V7=y
255CONFIG_CPU_CACHE_VIPT=y
256CONFIG_CPU_COPY_V6=y
257CONFIG_CPU_TLB_V7=y
258CONFIG_CPU_HAS_ASID=y
259CONFIG_CPU_CP15=y
260CONFIG_CPU_CP15_MMU=y
261
262#
263# Processor Features
264#
265CONFIG_ARM_THUMB=y
266# CONFIG_ARM_THUMBEE is not set
267# CONFIG_CPU_ICACHE_DISABLE is not set
268# CONFIG_CPU_DCACHE_DISABLE is not set
269# CONFIG_CPU_BPREDICT_DISABLE is not set
270CONFIG_HAS_TLS_REG=y
271CONFIG_ARM_L1_CACHE_SHIFT=5
272# CONFIG_ARM_ERRATA_430973 is not set
273# CONFIG_ARM_ERRATA_458693 is not set
274# CONFIG_ARM_ERRATA_460075 is not set
275CONFIG_COMMON_CLKDEV=y
276
277#
278# Bus support
279#
280# CONFIG_PCI_SYSCALL is not set
281# CONFIG_ARCH_SUPPORTS_MSI is not set
282# CONFIG_PCCARD is not set
283
284#
285# Kernel Features
286#
287# CONFIG_NO_HZ is not set
288# CONFIG_HIGH_RES_TIMERS is not set
289CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
290CONFIG_VMSPLIT_3G=y
291# CONFIG_VMSPLIT_2G is not set
292# CONFIG_VMSPLIT_1G is not set
293CONFIG_PAGE_OFFSET=0xC0000000
294CONFIG_PREEMPT_NONE=y
295# CONFIG_PREEMPT_VOLUNTARY is not set
296# CONFIG_PREEMPT is not set
297CONFIG_HZ=100
298# CONFIG_THUMB2_KERNEL is not set
299CONFIG_AEABI=y
300# CONFIG_OABI_COMPAT is not set
301# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
302# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
303# CONFIG_HIGHMEM is not set
304CONFIG_SELECT_MEMORY_MODEL=y
305CONFIG_FLATMEM_MANUAL=y
306# CONFIG_DISCONTIGMEM_MANUAL is not set
307# CONFIG_SPARSEMEM_MANUAL is not set
308CONFIG_FLATMEM=y
309CONFIG_FLAT_NODE_MEM_MAP=y
310CONFIG_PAGEFLAGS_EXTENDED=y
311CONFIG_SPLIT_PTLOCK_CPUS=4
312# CONFIG_PHYS_ADDR_T_64BIT is not set
313CONFIG_ZONE_DMA_FLAG=0
314CONFIG_VIRT_TO_BUS=y
315# CONFIG_KSM is not set
316CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
317CONFIG_ALIGNMENT_TRAP=y
318# CONFIG_UACCESS_WITH_MEMCPY is not set
319
320#
321# Boot options
322#
323CONFIG_ZBOOT_ROM_TEXT=0x0
324CONFIG_ZBOOT_ROM_BSS=0x0
325CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=sh-sci.0,115200"
326# CONFIG_XIP_KERNEL is not set
327CONFIG_KEXEC=y
328CONFIG_ATAGS_PROC=y
329
330#
331# CPU Power Management
332#
333# CONFIG_CPU_IDLE is not set
334
335#
336# Floating point emulation
337#
338
339#
340# At least one emulation must be selected
341#
342# CONFIG_VFP is not set
343
344#
345# Userspace binary formats
346#
347CONFIG_BINFMT_ELF=y
348# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
349CONFIG_HAVE_AOUT=y
350# CONFIG_BINFMT_AOUT is not set
351# CONFIG_BINFMT_MISC is not set
352
353#
354# Power management options
355#
356CONFIG_PM=y
357# CONFIG_PM_DEBUG is not set
358# CONFIG_SUSPEND is not set
359# CONFIG_APM_EMULATION is not set
360# CONFIG_PM_RUNTIME is not set
361CONFIG_ARCH_SUSPEND_POSSIBLE=y
362# CONFIG_NET is not set
363
364#
365# Device Drivers
366#
367
368#
369# Generic Driver Options
370#
371CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
372# CONFIG_DEVTMPFS is not set
373CONFIG_STANDALONE=y
374CONFIG_PREVENT_FIRMWARE_BUILD=y
375CONFIG_FW_LOADER=y
376# CONFIG_FIRMWARE_IN_KERNEL is not set
377CONFIG_EXTRA_FIRMWARE=""
378# CONFIG_DEBUG_DRIVER is not set
379# CONFIG_DEBUG_DEVRES is not set
380# CONFIG_SYS_HYPERVISOR is not set
381CONFIG_MTD=y
382# CONFIG_MTD_DEBUG is not set
383CONFIG_MTD_CONCAT=y
384CONFIG_MTD_PARTITIONS=y
385# CONFIG_MTD_REDBOOT_PARTS is not set
386# CONFIG_MTD_CMDLINE_PARTS is not set
387# CONFIG_MTD_AFS_PARTS is not set
388# CONFIG_MTD_AR7_PARTS is not set
389
390#
391# User Modules And Translation Layers
392#
393CONFIG_MTD_CHAR=y
394CONFIG_MTD_BLKDEVS=y
395CONFIG_MTD_BLOCK=y
396# CONFIG_FTL is not set
397# CONFIG_NFTL is not set
398# CONFIG_INFTL is not set
399# CONFIG_RFD_FTL is not set
400# CONFIG_SSFDC is not set
401# CONFIG_MTD_OOPS is not set
402
403#
404# RAM/ROM/Flash chip drivers
405#
406CONFIG_MTD_CFI=y
407# CONFIG_MTD_JEDECPROBE is not set
408CONFIG_MTD_GEN_PROBE=y
409# CONFIG_MTD_CFI_ADV_OPTIONS is not set
410CONFIG_MTD_MAP_BANK_WIDTH_1=y
411CONFIG_MTD_MAP_BANK_WIDTH_2=y
412CONFIG_MTD_MAP_BANK_WIDTH_4=y
413# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
414# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
415# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
416CONFIG_MTD_CFI_I1=y
417CONFIG_MTD_CFI_I2=y
418# CONFIG_MTD_CFI_I4 is not set
419# CONFIG_MTD_CFI_I8 is not set
420CONFIG_MTD_CFI_INTELEXT=y
421# CONFIG_MTD_CFI_AMDSTD is not set
422# CONFIG_MTD_CFI_STAA is not set
423CONFIG_MTD_CFI_UTIL=y
424# CONFIG_MTD_RAM is not set
425# CONFIG_MTD_ROM is not set
426# CONFIG_MTD_ABSENT is not set
427
428#
429# Mapping drivers for chip access
430#
431# CONFIG_MTD_COMPLEX_MAPPINGS is not set
432CONFIG_MTD_PHYSMAP=y
433# CONFIG_MTD_PHYSMAP_COMPAT is not set
434# CONFIG_MTD_ARM_INTEGRATOR is not set
435# CONFIG_MTD_PLATRAM is not set
436
437#
438# Self-contained MTD device drivers
439#
440# CONFIG_MTD_SLRAM is not set
441# CONFIG_MTD_PHRAM is not set
442# CONFIG_MTD_MTDRAM is not set
443# CONFIG_MTD_BLOCK2MTD is not set
444
445#
446# Disk-On-Chip Device Drivers
447#
448# CONFIG_MTD_DOC2000 is not set
449# CONFIG_MTD_DOC2001 is not set
450# CONFIG_MTD_DOC2001PLUS is not set
451CONFIG_MTD_NAND=y
452# CONFIG_MTD_NAND_VERIFY_WRITE is not set
453# CONFIG_MTD_NAND_ECC_SMC is not set
454# CONFIG_MTD_NAND_MUSEUM_IDS is not set
455CONFIG_MTD_NAND_IDS=y
456# CONFIG_MTD_NAND_DISKONCHIP is not set
457# CONFIG_MTD_NAND_NANDSIM is not set
458# CONFIG_MTD_NAND_PLATFORM is not set
459# CONFIG_MTD_ONENAND is not set
460
461#
462# LPDDR flash memory drivers
463#
464# CONFIG_MTD_LPDDR is not set
465
466#
467# UBI - Unsorted block images
468#
469# CONFIG_MTD_UBI is not set
470# CONFIG_PARPORT is not set
471# CONFIG_BLK_DEV is not set
472# CONFIG_MISC_DEVICES is not set
473CONFIG_HAVE_IDE=y
474# CONFIG_IDE is not set
475
476#
477# SCSI device support
478#
479# CONFIG_RAID_ATTRS is not set
480# CONFIG_SCSI is not set
481# CONFIG_SCSI_DMA is not set
482# CONFIG_SCSI_NETLINK is not set
483# CONFIG_ATA is not set
484# CONFIG_MD is not set
485# CONFIG_PHONE is not set
486
487#
488# Input device support
489#
490CONFIG_INPUT=y
491# CONFIG_INPUT_FF_MEMLESS is not set
492# CONFIG_INPUT_POLLDEV is not set
493# CONFIG_INPUT_SPARSEKMAP is not set
494
495#
496# Userland interfaces
497#
498CONFIG_INPUT_MOUSEDEV=y
499# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
500CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
501CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
502# CONFIG_INPUT_JOYDEV is not set
503# CONFIG_INPUT_EVDEV is not set
504# CONFIG_INPUT_EVBUG is not set
505
506#
507# Input Device Drivers
508#
509# CONFIG_INPUT_KEYBOARD is not set
510# CONFIG_INPUT_MOUSE is not set
511# CONFIG_INPUT_JOYSTICK is not set
512# CONFIG_INPUT_TABLET is not set
513# CONFIG_INPUT_TOUCHSCREEN is not set
514# CONFIG_INPUT_MISC is not set
515
516#
517# Hardware I/O ports
518#
519# CONFIG_SERIO is not set
520# CONFIG_GAMEPORT is not set
521
522#
523# Character devices
524#
525CONFIG_VT=y
526CONFIG_CONSOLE_TRANSLATIONS=y
527CONFIG_VT_CONSOLE=y
528CONFIG_HW_CONSOLE=y
529# CONFIG_VT_HW_CONSOLE_BINDING is not set
530CONFIG_DEVKMEM=y
531# CONFIG_SERIAL_NONSTANDARD is not set
532
533#
534# Serial drivers
535#
536# CONFIG_SERIAL_8250 is not set
537
538#
539# Non-8250 serial port support
540#
541CONFIG_SERIAL_SH_SCI=y
542CONFIG_SERIAL_SH_SCI_NR_UARTS=8
543CONFIG_SERIAL_SH_SCI_CONSOLE=y
544CONFIG_SERIAL_CORE=y
545CONFIG_SERIAL_CORE_CONSOLE=y
546CONFIG_UNIX98_PTYS=y
547# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
548# CONFIG_LEGACY_PTYS is not set
549# CONFIG_IPMI_HANDLER is not set
550# CONFIG_HW_RANDOM is not set
551# CONFIG_R3964 is not set
552# CONFIG_RAW_DRIVER is not set
553# CONFIG_TCG_TPM is not set
554# CONFIG_I2C is not set
555# CONFIG_SPI is not set
556
557#
558# PPS support
559#
560# CONFIG_PPS is not set
561# CONFIG_W1 is not set
562# CONFIG_POWER_SUPPLY is not set
563# CONFIG_HWMON is not set
564# CONFIG_THERMAL is not set
565# CONFIG_WATCHDOG is not set
566CONFIG_SSB_POSSIBLE=y
567
568#
569# Sonics Silicon Backplane
570#
571# CONFIG_SSB is not set
572
573#
574# Multifunction device drivers
575#
576# CONFIG_MFD_CORE is not set
577# CONFIG_MFD_SM501 is not set
578# CONFIG_HTC_PASIC3 is not set
579# CONFIG_MFD_TMIO is not set
580# CONFIG_MFD_T7L66XB is not set
581# CONFIG_MFD_TC6387XB is not set
582# CONFIG_REGULATOR is not set
583# CONFIG_MEDIA_SUPPORT is not set
584
585#
586# Graphics support
587#
588# CONFIG_VGASTATE is not set
589# CONFIG_VIDEO_OUTPUT_CONTROL is not set
590# CONFIG_FB is not set
591# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
592
593#
594# Display device support
595#
596# CONFIG_DISPLAY_SUPPORT is not set
597
598#
599# Console display driver support
600#
601# CONFIG_VGA_CONSOLE is not set
602CONFIG_DUMMY_CONSOLE=y
603# CONFIG_SOUND is not set
604# CONFIG_HID_SUPPORT is not set
605# CONFIG_USB_SUPPORT is not set
606# CONFIG_MMC is not set
607# CONFIG_MEMSTICK is not set
608# CONFIG_NEW_LEDS is not set
609# CONFIG_ACCESSIBILITY is not set
610CONFIG_RTC_LIB=y
611# CONFIG_RTC_CLASS is not set
612# CONFIG_DMADEVICES is not set
613# CONFIG_AUXDISPLAY is not set
614# CONFIG_UIO is not set
615
616#
617# TI VLYNQ
618#
619# CONFIG_STAGING is not set
620
621#
622# File systems
623#
624# CONFIG_EXT2_FS is not set
625# CONFIG_EXT3_FS is not set
626# CONFIG_EXT4_FS is not set
627# CONFIG_REISERFS_FS is not set
628# CONFIG_JFS_FS is not set
629# CONFIG_FS_POSIX_ACL is not set
630# CONFIG_XFS_FS is not set
631# CONFIG_GFS2_FS is not set
632# CONFIG_BTRFS_FS is not set
633# CONFIG_NILFS2_FS is not set
634CONFIG_FILE_LOCKING=y
635# CONFIG_FSNOTIFY is not set
636# CONFIG_DNOTIFY is not set
637# CONFIG_INOTIFY is not set
638# CONFIG_INOTIFY_USER is not set
639# CONFIG_QUOTA is not set
640# CONFIG_AUTOFS_FS is not set
641# CONFIG_AUTOFS4_FS is not set
642# CONFIG_FUSE_FS is not set
643
644#
645# Caches
646#
647# CONFIG_FSCACHE is not set
648
649#
650# CD-ROM/DVD Filesystems
651#
652# CONFIG_ISO9660_FS is not set
653# CONFIG_UDF_FS is not set
654
655#
656# DOS/FAT/NT Filesystems
657#
658# CONFIG_MSDOS_FS is not set
659# CONFIG_VFAT_FS is not set
660# CONFIG_NTFS_FS is not set
661
662#
663# Pseudo filesystems
664#
665CONFIG_PROC_FS=y
666CONFIG_PROC_SYSCTL=y
667CONFIG_PROC_PAGE_MONITOR=y
668CONFIG_SYSFS=y
669CONFIG_TMPFS=y
670# CONFIG_TMPFS_POSIX_ACL is not set
671# CONFIG_HUGETLB_PAGE is not set
672# CONFIG_CONFIGFS_FS is not set
673# CONFIG_MISC_FILESYSTEMS is not set
674
675#
676# Partition Types
677#
678# CONFIG_PARTITION_ADVANCED is not set
679CONFIG_MSDOS_PARTITION=y
680# CONFIG_NLS is not set
681
682#
683# Kernel hacking
684#
685# CONFIG_PRINTK_TIME is not set
686CONFIG_ENABLE_WARN_DEPRECATED=y
687CONFIG_ENABLE_MUST_CHECK=y
688CONFIG_FRAME_WARN=1024
689CONFIG_MAGIC_SYSRQ=y
690# CONFIG_STRIP_ASM_SYMS is not set
691# CONFIG_UNUSED_SYMBOLS is not set
692# CONFIG_DEBUG_FS is not set
693# CONFIG_HEADERS_CHECK is not set
694CONFIG_DEBUG_KERNEL=y
695# CONFIG_DEBUG_SHIRQ is not set
696# CONFIG_DETECT_SOFTLOCKUP is not set
697# CONFIG_DETECT_HUNG_TASK is not set
698CONFIG_SCHED_DEBUG=y
699# CONFIG_SCHEDSTATS is not set
700# CONFIG_TIMER_STATS is not set
701# CONFIG_DEBUG_OBJECTS is not set
702# CONFIG_DEBUG_SLAB is not set
703# CONFIG_DEBUG_KMEMLEAK is not set
704# CONFIG_DEBUG_RT_MUTEXES is not set
705# CONFIG_RT_MUTEX_TESTER is not set
706# CONFIG_DEBUG_SPINLOCK is not set
707# CONFIG_DEBUG_MUTEXES is not set
708# CONFIG_DEBUG_LOCK_ALLOC is not set
709# CONFIG_PROVE_LOCKING is not set
710# CONFIG_LOCK_STAT is not set
711# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
712# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
713# CONFIG_DEBUG_KOBJECT is not set
714CONFIG_DEBUG_BUGVERBOSE=y
715# CONFIG_DEBUG_INFO is not set
716# CONFIG_DEBUG_VM is not set
717# CONFIG_DEBUG_WRITECOUNT is not set
718CONFIG_DEBUG_MEMORY_INIT=y
719# CONFIG_DEBUG_LIST is not set
720# CONFIG_DEBUG_SG is not set
721# CONFIG_DEBUG_NOTIFIERS is not set
722# CONFIG_DEBUG_CREDENTIALS is not set
723# CONFIG_BOOT_PRINTK_DELAY is not set
724# CONFIG_RCU_TORTURE_TEST is not set
725# CONFIG_RCU_CPU_STALL_DETECTOR is not set
726# CONFIG_BACKTRACE_SELF_TEST is not set
727# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
728# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
729# CONFIG_FAULT_INJECTION is not set
730# CONFIG_LATENCYTOP is not set
731# CONFIG_SYSCTL_SYSCALL_CHECK is not set
732# CONFIG_PAGE_POISONING is not set
733CONFIG_HAVE_FUNCTION_TRACER=y
734CONFIG_TRACING_SUPPORT=y
735# CONFIG_FTRACE is not set
736# CONFIG_SAMPLES is not set
737CONFIG_HAVE_ARCH_KGDB=y
738# CONFIG_KGDB is not set
739CONFIG_ARM_UNWIND=y
740# CONFIG_DEBUG_USER is not set
741# CONFIG_DEBUG_ERRORS is not set
742# CONFIG_DEBUG_STACK_USAGE is not set
743# CONFIG_DEBUG_LL is not set
744# CONFIG_OC_ETM is not set
745
746#
747# Security options
748#
749# CONFIG_KEYS is not set
750# CONFIG_SECURITY is not set
751# CONFIG_SECURITYFS is not set
752# CONFIG_DEFAULT_SECURITY_SELINUX is not set
753# CONFIG_DEFAULT_SECURITY_SMACK is not set
754# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
755CONFIG_DEFAULT_SECURITY_DAC=y
756CONFIG_DEFAULT_SECURITY=""
757# CONFIG_CRYPTO is not set
758# CONFIG_BINARY_PRINTF is not set
759
760#
761# Library routines
762#
763CONFIG_GENERIC_FIND_LAST_BIT=y
764# CONFIG_CRC_CCITT is not set
765# CONFIG_CRC16 is not set
766# CONFIG_CRC_T10DIF is not set
767# CONFIG_CRC_ITU_T is not set
768# CONFIG_CRC32 is not set
769# CONFIG_CRC7 is not set
770# CONFIG_LIBCRC32C is not set
771CONFIG_ZLIB_INFLATE=y
772CONFIG_LZO_DECOMPRESS=y
773CONFIG_DECOMPRESS_GZIP=y
774CONFIG_DECOMPRESS_BZIP2=y
775CONFIG_DECOMPRESS_LZMA=y
776CONFIG_DECOMPRESS_LZO=y
777CONFIG_HAS_IOMEM=y
778CONFIG_HAS_IOPORT=y
779CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/g3evm_defconfig b/arch/arm/configs/g3evm_defconfig
new file mode 100644
index 000000000000..3c19031961db
--- /dev/null
+++ b/arch/arm/configs/g3evm_defconfig
@@ -0,0 +1,774 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc7
4# Mon Feb 8 12:20:01 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_TIME=y
9CONFIG_GENERIC_CLOCKEVENTS=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33CONFIG_HAVE_KERNEL_GZIP=y
34CONFIG_HAVE_KERNEL_LZO=y
35CONFIG_KERNEL_GZIP=y
36# CONFIG_KERNEL_BZIP2 is not set
37# CONFIG_KERNEL_LZMA is not set
38# CONFIG_KERNEL_LZO is not set
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_BSD_PROCESS_ACCT is not set
43
44#
45# RCU Subsystem
46#
47CONFIG_TREE_RCU=y
48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_TINY_RCU is not set
50# CONFIG_RCU_TRACE is not set
51CONFIG_RCU_FANOUT=32
52# CONFIG_RCU_FANOUT_EXACT is not set
53# CONFIG_TREE_RCU_TRACE is not set
54CONFIG_IKCONFIG=y
55CONFIG_IKCONFIG_PROC=y
56CONFIG_LOG_BUF_SHIFT=16
57CONFIG_GROUP_SCHED=y
58CONFIG_FAIR_GROUP_SCHED=y
59# CONFIG_RT_GROUP_SCHED is not set
60CONFIG_USER_SCHED=y
61# CONFIG_CGROUP_SCHED is not set
62# CONFIG_CGROUPS is not set
63# CONFIG_SYSFS_DEPRECATED_V2 is not set
64# CONFIG_RELAY is not set
65CONFIG_NAMESPACES=y
66# CONFIG_UTS_NS is not set
67# CONFIG_IPC_NS is not set
68# CONFIG_USER_NS is not set
69# CONFIG_PID_NS is not set
70CONFIG_BLK_DEV_INITRD=y
71CONFIG_INITRAMFS_SOURCE=""
72CONFIG_RD_GZIP=y
73CONFIG_RD_BZIP2=y
74CONFIG_RD_LZMA=y
75CONFIG_RD_LZO=y
76CONFIG_CC_OPTIMIZE_FOR_SIZE=y
77CONFIG_SYSCTL=y
78CONFIG_ANON_INODES=y
79# CONFIG_EMBEDDED is not set
80CONFIG_UID16=y
81CONFIG_SYSCTL_SYSCALL=y
82CONFIG_KALLSYMS=y
83# CONFIG_KALLSYMS_ALL is not set
84# CONFIG_KALLSYMS_EXTRA_PASS is not set
85CONFIG_HOTPLUG=y
86CONFIG_PRINTK=y
87CONFIG_BUG=y
88CONFIG_ELF_CORE=y
89CONFIG_BASE_FULL=y
90CONFIG_FUTEX=y
91CONFIG_EPOLL=y
92CONFIG_SIGNALFD=y
93CONFIG_TIMERFD=y
94CONFIG_EVENTFD=y
95CONFIG_SHMEM=y
96CONFIG_AIO=y
97
98#
99# Kernel Performance Events And Counters
100#
101CONFIG_VM_EVENT_COUNTERS=y
102CONFIG_COMPAT_BRK=y
103CONFIG_SLAB=y
104# CONFIG_SLUB is not set
105# CONFIG_SLOB is not set
106# CONFIG_PROFILING is not set
107CONFIG_HAVE_OPROFILE=y
108CONFIG_HAVE_KPROBES=y
109CONFIG_HAVE_KRETPROBES=y
110CONFIG_HAVE_CLK=y
111
112#
113# GCOV-based kernel profiling
114#
115# CONFIG_SLOW_WORK is not set
116CONFIG_HAVE_GENERIC_DMA_COHERENT=y
117CONFIG_SLABINFO=y
118CONFIG_RT_MUTEXES=y
119CONFIG_BASE_SMALL=0
120# CONFIG_MODULES is not set
121CONFIG_BLOCK=y
122CONFIG_LBDAF=y
123# CONFIG_BLK_DEV_BSG is not set
124# CONFIG_BLK_DEV_INTEGRITY is not set
125
126#
127# IO Schedulers
128#
129CONFIG_IOSCHED_NOOP=y
130# CONFIG_IOSCHED_DEADLINE is not set
131# CONFIG_IOSCHED_CFQ is not set
132# CONFIG_DEFAULT_DEADLINE is not set
133# CONFIG_DEFAULT_CFQ is not set
134CONFIG_DEFAULT_NOOP=y
135CONFIG_DEFAULT_IOSCHED="noop"
136# CONFIG_INLINE_SPIN_TRYLOCK is not set
137# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
138# CONFIG_INLINE_SPIN_LOCK is not set
139# CONFIG_INLINE_SPIN_LOCK_BH is not set
140# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
141# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
142CONFIG_INLINE_SPIN_UNLOCK=y
143# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
144CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
145# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
146# CONFIG_INLINE_READ_TRYLOCK is not set
147# CONFIG_INLINE_READ_LOCK is not set
148# CONFIG_INLINE_READ_LOCK_BH is not set
149# CONFIG_INLINE_READ_LOCK_IRQ is not set
150# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
151CONFIG_INLINE_READ_UNLOCK=y
152# CONFIG_INLINE_READ_UNLOCK_BH is not set
153CONFIG_INLINE_READ_UNLOCK_IRQ=y
154# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
155# CONFIG_INLINE_WRITE_TRYLOCK is not set
156# CONFIG_INLINE_WRITE_LOCK is not set
157# CONFIG_INLINE_WRITE_LOCK_BH is not set
158# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
159# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
160CONFIG_INLINE_WRITE_UNLOCK=y
161# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
162CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
163# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
164# CONFIG_MUTEX_SPIN_ON_OWNER is not set
165# CONFIG_FREEZER is not set
166
167#
168# System Type
169#
170CONFIG_MMU=y
171# CONFIG_ARCH_AAEC2000 is not set
172# CONFIG_ARCH_INTEGRATOR is not set
173# CONFIG_ARCH_REALVIEW is not set
174# CONFIG_ARCH_VERSATILE is not set
175# CONFIG_ARCH_AT91 is not set
176# CONFIG_ARCH_CLPS711X is not set
177# CONFIG_ARCH_GEMINI is not set
178# CONFIG_ARCH_EBSA110 is not set
179# CONFIG_ARCH_EP93XX is not set
180# CONFIG_ARCH_FOOTBRIDGE is not set
181# CONFIG_ARCH_MXC is not set
182# CONFIG_ARCH_STMP3XXX is not set
183# CONFIG_ARCH_NETX is not set
184# CONFIG_ARCH_H720X is not set
185# CONFIG_ARCH_NOMADIK is not set
186# CONFIG_ARCH_IOP13XX is not set
187# CONFIG_ARCH_IOP32X is not set
188# CONFIG_ARCH_IOP33X is not set
189# CONFIG_ARCH_IXP23XX is not set
190# CONFIG_ARCH_IXP2000 is not set
191# CONFIG_ARCH_IXP4XX is not set
192# CONFIG_ARCH_L7200 is not set
193# CONFIG_ARCH_DOVE is not set
194# CONFIG_ARCH_KIRKWOOD is not set
195# CONFIG_ARCH_LOKI is not set
196# CONFIG_ARCH_MV78XX0 is not set
197# CONFIG_ARCH_ORION5X is not set
198# CONFIG_ARCH_MMP is not set
199# CONFIG_ARCH_KS8695 is not set
200# CONFIG_ARCH_NS9XXX is not set
201# CONFIG_ARCH_W90X900 is not set
202# CONFIG_ARCH_PNX4008 is not set
203# CONFIG_ARCH_PXA is not set
204# CONFIG_ARCH_MSM is not set
205CONFIG_ARCH_SHMOBILE=y
206# CONFIG_ARCH_RPC is not set
207# CONFIG_ARCH_SA1100 is not set
208# CONFIG_ARCH_S3C2410 is not set
209# CONFIG_ARCH_S3C64XX is not set
210# CONFIG_ARCH_S5PC1XX is not set
211# CONFIG_ARCH_SHARK is not set
212# CONFIG_ARCH_LH7A40X is not set
213# CONFIG_ARCH_U300 is not set
214# CONFIG_ARCH_DAVINCI is not set
215# CONFIG_ARCH_OMAP is not set
216# CONFIG_ARCH_BCMRING is not set
217# CONFIG_ARCH_U8500 is not set
218
219#
220# SH-Mobile System Type
221#
222CONFIG_ARCH_SH7367=y
223# CONFIG_ARCH_SH7377 is not set
224# CONFIG_ARCH_SH7372 is not set
225
226#
227# SH-Mobile Board Type
228#
229CONFIG_MACH_G3EVM=y
230
231#
232# SH-Mobile System Configuration
233#
234
235#
236# Memory configuration
237#
238CONFIG_MEMORY_START=0x50000000
239CONFIG_MEMORY_SIZE=0x08000000
240
241#
242# Timer and clock configuration
243#
244CONFIG_SH_TIMER_CMT=y
245
246#
247# Processor Type
248#
249CONFIG_CPU_V6=y
250# CONFIG_CPU_32v6K is not set
251CONFIG_CPU_32v6=y
252CONFIG_CPU_ABRT_EV6=y
253CONFIG_CPU_PABRT_V6=y
254CONFIG_CPU_CACHE_V6=y
255CONFIG_CPU_CACHE_VIPT=y
256CONFIG_CPU_COPY_V6=y
257CONFIG_CPU_TLB_V6=y
258CONFIG_CPU_HAS_ASID=y
259CONFIG_CPU_CP15=y
260CONFIG_CPU_CP15_MMU=y
261
262#
263# Processor Features
264#
265CONFIG_ARM_THUMB=y
266# CONFIG_CPU_ICACHE_DISABLE is not set
267# CONFIG_CPU_DCACHE_DISABLE is not set
268# CONFIG_CPU_BPREDICT_DISABLE is not set
269CONFIG_ARM_L1_CACHE_SHIFT=5
270# CONFIG_ARM_ERRATA_411920 is not set
271CONFIG_COMMON_CLKDEV=y
272
273#
274# Bus support
275#
276# CONFIG_PCI_SYSCALL is not set
277# CONFIG_ARCH_SUPPORTS_MSI is not set
278# CONFIG_PCCARD is not set
279
280#
281# Kernel Features
282#
283# CONFIG_NO_HZ is not set
284# CONFIG_HIGH_RES_TIMERS is not set
285CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
286CONFIG_VMSPLIT_3G=y
287# CONFIG_VMSPLIT_2G is not set
288# CONFIG_VMSPLIT_1G is not set
289CONFIG_PAGE_OFFSET=0xC0000000
290CONFIG_PREEMPT_NONE=y
291# CONFIG_PREEMPT_VOLUNTARY is not set
292# CONFIG_PREEMPT is not set
293CONFIG_HZ=100
294CONFIG_AEABI=y
295# CONFIG_OABI_COMPAT is not set
296# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
297# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
298# CONFIG_HIGHMEM is not set
299CONFIG_SELECT_MEMORY_MODEL=y
300CONFIG_FLATMEM_MANUAL=y
301# CONFIG_DISCONTIGMEM_MANUAL is not set
302# CONFIG_SPARSEMEM_MANUAL is not set
303CONFIG_FLATMEM=y
304CONFIG_FLAT_NODE_MEM_MAP=y
305CONFIG_PAGEFLAGS_EXTENDED=y
306CONFIG_SPLIT_PTLOCK_CPUS=4
307# CONFIG_PHYS_ADDR_T_64BIT is not set
308CONFIG_ZONE_DMA_FLAG=0
309CONFIG_VIRT_TO_BUS=y
310# CONFIG_KSM is not set
311CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
312CONFIG_ALIGNMENT_TRAP=y
313# CONFIG_UACCESS_WITH_MEMCPY is not set
314
315#
316# Boot options
317#
318CONFIG_ZBOOT_ROM_TEXT=0x0
319CONFIG_ZBOOT_ROM_BSS=0x0
320CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200"
321# CONFIG_XIP_KERNEL is not set
322CONFIG_KEXEC=y
323CONFIG_ATAGS_PROC=y
324
325#
326# CPU Power Management
327#
328# CONFIG_CPU_IDLE is not set
329
330#
331# Floating point emulation
332#
333
334#
335# At least one emulation must be selected
336#
337# CONFIG_VFP is not set
338
339#
340# Userspace binary formats
341#
342CONFIG_BINFMT_ELF=y
343# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
344CONFIG_HAVE_AOUT=y
345# CONFIG_BINFMT_AOUT is not set
346# CONFIG_BINFMT_MISC is not set
347
348#
349# Power management options
350#
351CONFIG_PM=y
352# CONFIG_PM_DEBUG is not set
353# CONFIG_SUSPEND is not set
354# CONFIG_APM_EMULATION is not set
355# CONFIG_PM_RUNTIME is not set
356CONFIG_ARCH_SUSPEND_POSSIBLE=y
357# CONFIG_NET is not set
358
359#
360# Device Drivers
361#
362
363#
364# Generic Driver Options
365#
366CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
367# CONFIG_DEVTMPFS is not set
368CONFIG_STANDALONE=y
369CONFIG_PREVENT_FIRMWARE_BUILD=y
370CONFIG_FW_LOADER=y
371# CONFIG_FIRMWARE_IN_KERNEL is not set
372CONFIG_EXTRA_FIRMWARE=""
373# CONFIG_DEBUG_DRIVER is not set
374# CONFIG_DEBUG_DEVRES is not set
375# CONFIG_SYS_HYPERVISOR is not set
376CONFIG_MTD=y
377# CONFIG_MTD_DEBUG is not set
378CONFIG_MTD_CONCAT=y
379CONFIG_MTD_PARTITIONS=y
380# CONFIG_MTD_REDBOOT_PARTS is not set
381# CONFIG_MTD_CMDLINE_PARTS is not set
382# CONFIG_MTD_AFS_PARTS is not set
383# CONFIG_MTD_AR7_PARTS is not set
384
385#
386# User Modules And Translation Layers
387#
388CONFIG_MTD_CHAR=y
389CONFIG_MTD_BLKDEVS=y
390CONFIG_MTD_BLOCK=y
391# CONFIG_FTL is not set
392# CONFIG_NFTL is not set
393# CONFIG_INFTL is not set
394# CONFIG_RFD_FTL is not set
395# CONFIG_SSFDC is not set
396# CONFIG_MTD_OOPS is not set
397
398#
399# RAM/ROM/Flash chip drivers
400#
401CONFIG_MTD_CFI=y
402# CONFIG_MTD_JEDECPROBE is not set
403CONFIG_MTD_GEN_PROBE=y
404# CONFIG_MTD_CFI_ADV_OPTIONS is not set
405CONFIG_MTD_MAP_BANK_WIDTH_1=y
406CONFIG_MTD_MAP_BANK_WIDTH_2=y
407CONFIG_MTD_MAP_BANK_WIDTH_4=y
408# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
409# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
410# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
411CONFIG_MTD_CFI_I1=y
412CONFIG_MTD_CFI_I2=y
413# CONFIG_MTD_CFI_I4 is not set
414# CONFIG_MTD_CFI_I8 is not set
415CONFIG_MTD_CFI_INTELEXT=y
416# CONFIG_MTD_CFI_AMDSTD is not set
417# CONFIG_MTD_CFI_STAA is not set
418CONFIG_MTD_CFI_UTIL=y
419# CONFIG_MTD_RAM is not set
420# CONFIG_MTD_ROM is not set
421# CONFIG_MTD_ABSENT is not set
422
423#
424# Mapping drivers for chip access
425#
426# CONFIG_MTD_COMPLEX_MAPPINGS is not set
427CONFIG_MTD_PHYSMAP=y
428# CONFIG_MTD_PHYSMAP_COMPAT is not set
429# CONFIG_MTD_ARM_INTEGRATOR is not set
430# CONFIG_MTD_PLATRAM is not set
431
432#
433# Self-contained MTD device drivers
434#
435# CONFIG_MTD_SLRAM is not set
436# CONFIG_MTD_PHRAM is not set
437# CONFIG_MTD_MTDRAM is not set
438# CONFIG_MTD_BLOCK2MTD is not set
439
440#
441# Disk-On-Chip Device Drivers
442#
443# CONFIG_MTD_DOC2000 is not set
444# CONFIG_MTD_DOC2001 is not set
445# CONFIG_MTD_DOC2001PLUS is not set
446CONFIG_MTD_NAND=y
447# CONFIG_MTD_NAND_VERIFY_WRITE is not set
448# CONFIG_MTD_NAND_ECC_SMC is not set
449# CONFIG_MTD_NAND_MUSEUM_IDS is not set
450CONFIG_MTD_NAND_IDS=y
451# CONFIG_MTD_NAND_DISKONCHIP is not set
452# CONFIG_MTD_NAND_NANDSIM is not set
453# CONFIG_MTD_NAND_PLATFORM is not set
454# CONFIG_MTD_ONENAND is not set
455
456#
457# LPDDR flash memory drivers
458#
459# CONFIG_MTD_LPDDR is not set
460
461#
462# UBI - Unsorted block images
463#
464# CONFIG_MTD_UBI is not set
465# CONFIG_PARPORT is not set
466# CONFIG_BLK_DEV is not set
467# CONFIG_MISC_DEVICES is not set
468CONFIG_HAVE_IDE=y
469# CONFIG_IDE is not set
470
471#
472# SCSI device support
473#
474# CONFIG_RAID_ATTRS is not set
475# CONFIG_SCSI is not set
476# CONFIG_SCSI_DMA is not set
477# CONFIG_SCSI_NETLINK is not set
478# CONFIG_ATA is not set
479# CONFIG_MD is not set
480# CONFIG_PHONE is not set
481
482#
483# Input device support
484#
485CONFIG_INPUT=y
486# CONFIG_INPUT_FF_MEMLESS is not set
487# CONFIG_INPUT_POLLDEV is not set
488# CONFIG_INPUT_SPARSEKMAP is not set
489
490#
491# Userland interfaces
492#
493CONFIG_INPUT_MOUSEDEV=y
494# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
495CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
496CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
497# CONFIG_INPUT_JOYDEV is not set
498# CONFIG_INPUT_EVDEV is not set
499# CONFIG_INPUT_EVBUG is not set
500
501#
502# Input Device Drivers
503#
504# CONFIG_INPUT_KEYBOARD is not set
505# CONFIG_INPUT_MOUSE is not set
506# CONFIG_INPUT_JOYSTICK is not set
507# CONFIG_INPUT_TABLET is not set
508# CONFIG_INPUT_TOUCHSCREEN is not set
509# CONFIG_INPUT_MISC is not set
510
511#
512# Hardware I/O ports
513#
514# CONFIG_SERIO is not set
515# CONFIG_GAMEPORT is not set
516
517#
518# Character devices
519#
520CONFIG_VT=y
521CONFIG_CONSOLE_TRANSLATIONS=y
522CONFIG_VT_CONSOLE=y
523CONFIG_HW_CONSOLE=y
524# CONFIG_VT_HW_CONSOLE_BINDING is not set
525CONFIG_DEVKMEM=y
526# CONFIG_SERIAL_NONSTANDARD is not set
527
528#
529# Serial drivers
530#
531# CONFIG_SERIAL_8250 is not set
532
533#
534# Non-8250 serial port support
535#
536CONFIG_SERIAL_SH_SCI=y
537CONFIG_SERIAL_SH_SCI_NR_UARTS=8
538CONFIG_SERIAL_SH_SCI_CONSOLE=y
539CONFIG_SERIAL_CORE=y
540CONFIG_SERIAL_CORE_CONSOLE=y
541CONFIG_UNIX98_PTYS=y
542# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
543# CONFIG_LEGACY_PTYS is not set
544# CONFIG_IPMI_HANDLER is not set
545# CONFIG_HW_RANDOM is not set
546# CONFIG_R3964 is not set
547# CONFIG_RAW_DRIVER is not set
548# CONFIG_TCG_TPM is not set
549# CONFIG_I2C is not set
550# CONFIG_SPI is not set
551
552#
553# PPS support
554#
555# CONFIG_PPS is not set
556# CONFIG_W1 is not set
557# CONFIG_POWER_SUPPLY is not set
558# CONFIG_HWMON is not set
559# CONFIG_THERMAL is not set
560# CONFIG_WATCHDOG is not set
561CONFIG_SSB_POSSIBLE=y
562
563#
564# Sonics Silicon Backplane
565#
566# CONFIG_SSB is not set
567
568#
569# Multifunction device drivers
570#
571# CONFIG_MFD_CORE is not set
572# CONFIG_MFD_SM501 is not set
573# CONFIG_HTC_PASIC3 is not set
574# CONFIG_MFD_TMIO is not set
575# CONFIG_MFD_T7L66XB is not set
576# CONFIG_MFD_TC6387XB is not set
577# CONFIG_REGULATOR is not set
578# CONFIG_MEDIA_SUPPORT is not set
579
580#
581# Graphics support
582#
583# CONFIG_VGASTATE is not set
584# CONFIG_VIDEO_OUTPUT_CONTROL is not set
585# CONFIG_FB is not set
586# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
587
588#
589# Display device support
590#
591# CONFIG_DISPLAY_SUPPORT is not set
592
593#
594# Console display driver support
595#
596# CONFIG_VGA_CONSOLE is not set
597CONFIG_DUMMY_CONSOLE=y
598# CONFIG_SOUND is not set
599# CONFIG_HID_SUPPORT is not set
600# CONFIG_USB_SUPPORT is not set
601# CONFIG_MMC is not set
602# CONFIG_MEMSTICK is not set
603# CONFIG_NEW_LEDS is not set
604# CONFIG_ACCESSIBILITY is not set
605CONFIG_RTC_LIB=y
606# CONFIG_RTC_CLASS is not set
607# CONFIG_DMADEVICES is not set
608# CONFIG_AUXDISPLAY is not set
609# CONFIG_UIO is not set
610
611#
612# TI VLYNQ
613#
614# CONFIG_STAGING is not set
615
616#
617# File systems
618#
619# CONFIG_EXT2_FS is not set
620# CONFIG_EXT3_FS is not set
621# CONFIG_EXT4_FS is not set
622# CONFIG_REISERFS_FS is not set
623# CONFIG_JFS_FS is not set
624# CONFIG_FS_POSIX_ACL is not set
625# CONFIG_XFS_FS is not set
626# CONFIG_GFS2_FS is not set
627# CONFIG_BTRFS_FS is not set
628# CONFIG_NILFS2_FS is not set
629CONFIG_FILE_LOCKING=y
630# CONFIG_FSNOTIFY is not set
631# CONFIG_DNOTIFY is not set
632# CONFIG_INOTIFY is not set
633# CONFIG_INOTIFY_USER is not set
634# CONFIG_QUOTA is not set
635# CONFIG_AUTOFS_FS is not set
636# CONFIG_AUTOFS4_FS is not set
637# CONFIG_FUSE_FS is not set
638
639#
640# Caches
641#
642# CONFIG_FSCACHE is not set
643
644#
645# CD-ROM/DVD Filesystems
646#
647# CONFIG_ISO9660_FS is not set
648# CONFIG_UDF_FS is not set
649
650#
651# DOS/FAT/NT Filesystems
652#
653# CONFIG_MSDOS_FS is not set
654# CONFIG_VFAT_FS is not set
655# CONFIG_NTFS_FS is not set
656
657#
658# Pseudo filesystems
659#
660CONFIG_PROC_FS=y
661CONFIG_PROC_SYSCTL=y
662CONFIG_PROC_PAGE_MONITOR=y
663CONFIG_SYSFS=y
664CONFIG_TMPFS=y
665# CONFIG_TMPFS_POSIX_ACL is not set
666# CONFIG_HUGETLB_PAGE is not set
667# CONFIG_CONFIGFS_FS is not set
668# CONFIG_MISC_FILESYSTEMS is not set
669
670#
671# Partition Types
672#
673# CONFIG_PARTITION_ADVANCED is not set
674CONFIG_MSDOS_PARTITION=y
675# CONFIG_NLS is not set
676
677#
678# Kernel hacking
679#
680# CONFIG_PRINTK_TIME is not set
681CONFIG_ENABLE_WARN_DEPRECATED=y
682CONFIG_ENABLE_MUST_CHECK=y
683CONFIG_FRAME_WARN=1024
684CONFIG_MAGIC_SYSRQ=y
685# CONFIG_STRIP_ASM_SYMS is not set
686# CONFIG_UNUSED_SYMBOLS is not set
687# CONFIG_DEBUG_FS is not set
688# CONFIG_HEADERS_CHECK is not set
689CONFIG_DEBUG_KERNEL=y
690# CONFIG_DEBUG_SHIRQ is not set
691# CONFIG_DETECT_SOFTLOCKUP is not set
692# CONFIG_DETECT_HUNG_TASK is not set
693CONFIG_SCHED_DEBUG=y
694# CONFIG_SCHEDSTATS is not set
695# CONFIG_TIMER_STATS is not set
696# CONFIG_DEBUG_OBJECTS is not set
697# CONFIG_DEBUG_SLAB is not set
698# CONFIG_DEBUG_KMEMLEAK is not set
699# CONFIG_DEBUG_RT_MUTEXES is not set
700# CONFIG_RT_MUTEX_TESTER is not set
701# CONFIG_DEBUG_SPINLOCK is not set
702# CONFIG_DEBUG_MUTEXES is not set
703# CONFIG_DEBUG_LOCK_ALLOC is not set
704# CONFIG_PROVE_LOCKING is not set
705# CONFIG_LOCK_STAT is not set
706# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
707# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
708# CONFIG_DEBUG_KOBJECT is not set
709CONFIG_DEBUG_BUGVERBOSE=y
710# CONFIG_DEBUG_INFO is not set
711# CONFIG_DEBUG_VM is not set
712# CONFIG_DEBUG_WRITECOUNT is not set
713CONFIG_DEBUG_MEMORY_INIT=y
714# CONFIG_DEBUG_LIST is not set
715# CONFIG_DEBUG_SG is not set
716# CONFIG_DEBUG_NOTIFIERS is not set
717# CONFIG_DEBUG_CREDENTIALS is not set
718# CONFIG_BOOT_PRINTK_DELAY is not set
719# CONFIG_RCU_TORTURE_TEST is not set
720# CONFIG_RCU_CPU_STALL_DETECTOR is not set
721# CONFIG_BACKTRACE_SELF_TEST is not set
722# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
723# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
724# CONFIG_FAULT_INJECTION is not set
725# CONFIG_LATENCYTOP is not set
726# CONFIG_SYSCTL_SYSCALL_CHECK is not set
727# CONFIG_PAGE_POISONING is not set
728CONFIG_HAVE_FUNCTION_TRACER=y
729CONFIG_TRACING_SUPPORT=y
730# CONFIG_FTRACE is not set
731# CONFIG_SAMPLES is not set
732CONFIG_HAVE_ARCH_KGDB=y
733# CONFIG_KGDB is not set
734CONFIG_ARM_UNWIND=y
735# CONFIG_DEBUG_USER is not set
736# CONFIG_DEBUG_ERRORS is not set
737# CONFIG_DEBUG_STACK_USAGE is not set
738# CONFIG_DEBUG_LL is not set
739# CONFIG_OC_ETM is not set
740
741#
742# Security options
743#
744# CONFIG_KEYS is not set
745# CONFIG_SECURITY is not set
746# CONFIG_SECURITYFS is not set
747# CONFIG_DEFAULT_SECURITY_SELINUX is not set
748# CONFIG_DEFAULT_SECURITY_SMACK is not set
749# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
750CONFIG_DEFAULT_SECURITY_DAC=y
751CONFIG_DEFAULT_SECURITY=""
752# CONFIG_CRYPTO is not set
753# CONFIG_BINARY_PRINTF is not set
754
755#
756# Library routines
757#
758CONFIG_GENERIC_FIND_LAST_BIT=y
759# CONFIG_CRC_CCITT is not set
760# CONFIG_CRC16 is not set
761# CONFIG_CRC_T10DIF is not set
762# CONFIG_CRC_ITU_T is not set
763# CONFIG_CRC32 is not set
764# CONFIG_CRC7 is not set
765# CONFIG_LIBCRC32C is not set
766CONFIG_ZLIB_INFLATE=y
767CONFIG_LZO_DECOMPRESS=y
768CONFIG_DECOMPRESS_GZIP=y
769CONFIG_DECOMPRESS_BZIP2=y
770CONFIG_DECOMPRESS_LZMA=y
771CONFIG_DECOMPRESS_LZO=y
772CONFIG_HAS_IOMEM=y
773CONFIG_HAS_IOPORT=y
774CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/g4evm_defconfig b/arch/arm/configs/g4evm_defconfig
new file mode 100644
index 000000000000..8ee79a537134
--- /dev/null
+++ b/arch/arm/configs/g4evm_defconfig
@@ -0,0 +1,779 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc7
4# Mon Feb 8 12:21:35 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_TIME=y
9CONFIG_GENERIC_CLOCKEVENTS=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33CONFIG_HAVE_KERNEL_GZIP=y
34CONFIG_HAVE_KERNEL_LZO=y
35CONFIG_KERNEL_GZIP=y
36# CONFIG_KERNEL_BZIP2 is not set
37# CONFIG_KERNEL_LZMA is not set
38# CONFIG_KERNEL_LZO is not set
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_BSD_PROCESS_ACCT is not set
43
44#
45# RCU Subsystem
46#
47CONFIG_TREE_RCU=y
48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_TINY_RCU is not set
50# CONFIG_RCU_TRACE is not set
51CONFIG_RCU_FANOUT=32
52# CONFIG_RCU_FANOUT_EXACT is not set
53# CONFIG_TREE_RCU_TRACE is not set
54CONFIG_IKCONFIG=y
55CONFIG_IKCONFIG_PROC=y
56CONFIG_LOG_BUF_SHIFT=16
57CONFIG_GROUP_SCHED=y
58CONFIG_FAIR_GROUP_SCHED=y
59# CONFIG_RT_GROUP_SCHED is not set
60CONFIG_USER_SCHED=y
61# CONFIG_CGROUP_SCHED is not set
62# CONFIG_CGROUPS is not set
63# CONFIG_SYSFS_DEPRECATED_V2 is not set
64# CONFIG_RELAY is not set
65CONFIG_NAMESPACES=y
66# CONFIG_UTS_NS is not set
67# CONFIG_IPC_NS is not set
68# CONFIG_USER_NS is not set
69# CONFIG_PID_NS is not set
70CONFIG_BLK_DEV_INITRD=y
71CONFIG_INITRAMFS_SOURCE=""
72CONFIG_RD_GZIP=y
73CONFIG_RD_BZIP2=y
74CONFIG_RD_LZMA=y
75CONFIG_RD_LZO=y
76CONFIG_CC_OPTIMIZE_FOR_SIZE=y
77CONFIG_SYSCTL=y
78CONFIG_ANON_INODES=y
79# CONFIG_EMBEDDED is not set
80CONFIG_UID16=y
81CONFIG_SYSCTL_SYSCALL=y
82CONFIG_KALLSYMS=y
83# CONFIG_KALLSYMS_ALL is not set
84# CONFIG_KALLSYMS_EXTRA_PASS is not set
85CONFIG_HOTPLUG=y
86CONFIG_PRINTK=y
87CONFIG_BUG=y
88CONFIG_ELF_CORE=y
89CONFIG_BASE_FULL=y
90CONFIG_FUTEX=y
91CONFIG_EPOLL=y
92CONFIG_SIGNALFD=y
93CONFIG_TIMERFD=y
94CONFIG_EVENTFD=y
95CONFIG_SHMEM=y
96CONFIG_AIO=y
97
98#
99# Kernel Performance Events And Counters
100#
101CONFIG_VM_EVENT_COUNTERS=y
102CONFIG_COMPAT_BRK=y
103CONFIG_SLAB=y
104# CONFIG_SLUB is not set
105# CONFIG_SLOB is not set
106# CONFIG_PROFILING is not set
107CONFIG_HAVE_OPROFILE=y
108CONFIG_HAVE_KPROBES=y
109CONFIG_HAVE_KRETPROBES=y
110CONFIG_HAVE_CLK=y
111
112#
113# GCOV-based kernel profiling
114#
115# CONFIG_SLOW_WORK is not set
116CONFIG_HAVE_GENERIC_DMA_COHERENT=y
117CONFIG_SLABINFO=y
118CONFIG_RT_MUTEXES=y
119CONFIG_BASE_SMALL=0
120# CONFIG_MODULES is not set
121CONFIG_BLOCK=y
122CONFIG_LBDAF=y
123# CONFIG_BLK_DEV_BSG is not set
124# CONFIG_BLK_DEV_INTEGRITY is not set
125
126#
127# IO Schedulers
128#
129CONFIG_IOSCHED_NOOP=y
130# CONFIG_IOSCHED_DEADLINE is not set
131# CONFIG_IOSCHED_CFQ is not set
132# CONFIG_DEFAULT_DEADLINE is not set
133# CONFIG_DEFAULT_CFQ is not set
134CONFIG_DEFAULT_NOOP=y
135CONFIG_DEFAULT_IOSCHED="noop"
136# CONFIG_INLINE_SPIN_TRYLOCK is not set
137# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
138# CONFIG_INLINE_SPIN_LOCK is not set
139# CONFIG_INLINE_SPIN_LOCK_BH is not set
140# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
141# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
142CONFIG_INLINE_SPIN_UNLOCK=y
143# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
144CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
145# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
146# CONFIG_INLINE_READ_TRYLOCK is not set
147# CONFIG_INLINE_READ_LOCK is not set
148# CONFIG_INLINE_READ_LOCK_BH is not set
149# CONFIG_INLINE_READ_LOCK_IRQ is not set
150# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
151CONFIG_INLINE_READ_UNLOCK=y
152# CONFIG_INLINE_READ_UNLOCK_BH is not set
153CONFIG_INLINE_READ_UNLOCK_IRQ=y
154# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
155# CONFIG_INLINE_WRITE_TRYLOCK is not set
156# CONFIG_INLINE_WRITE_LOCK is not set
157# CONFIG_INLINE_WRITE_LOCK_BH is not set
158# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
159# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
160CONFIG_INLINE_WRITE_UNLOCK=y
161# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
162CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
163# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
164# CONFIG_MUTEX_SPIN_ON_OWNER is not set
165# CONFIG_FREEZER is not set
166
167#
168# System Type
169#
170CONFIG_MMU=y
171# CONFIG_ARCH_AAEC2000 is not set
172# CONFIG_ARCH_INTEGRATOR is not set
173# CONFIG_ARCH_REALVIEW is not set
174# CONFIG_ARCH_VERSATILE is not set
175# CONFIG_ARCH_AT91 is not set
176# CONFIG_ARCH_CLPS711X is not set
177# CONFIG_ARCH_GEMINI is not set
178# CONFIG_ARCH_EBSA110 is not set
179# CONFIG_ARCH_EP93XX is not set
180# CONFIG_ARCH_FOOTBRIDGE is not set
181# CONFIG_ARCH_MXC is not set
182# CONFIG_ARCH_STMP3XXX is not set
183# CONFIG_ARCH_NETX is not set
184# CONFIG_ARCH_H720X is not set
185# CONFIG_ARCH_NOMADIK is not set
186# CONFIG_ARCH_IOP13XX is not set
187# CONFIG_ARCH_IOP32X is not set
188# CONFIG_ARCH_IOP33X is not set
189# CONFIG_ARCH_IXP23XX is not set
190# CONFIG_ARCH_IXP2000 is not set
191# CONFIG_ARCH_IXP4XX is not set
192# CONFIG_ARCH_L7200 is not set
193# CONFIG_ARCH_DOVE is not set
194# CONFIG_ARCH_KIRKWOOD is not set
195# CONFIG_ARCH_LOKI is not set
196# CONFIG_ARCH_MV78XX0 is not set
197# CONFIG_ARCH_ORION5X is not set
198# CONFIG_ARCH_MMP is not set
199# CONFIG_ARCH_KS8695 is not set
200# CONFIG_ARCH_NS9XXX is not set
201# CONFIG_ARCH_W90X900 is not set
202# CONFIG_ARCH_PNX4008 is not set
203# CONFIG_ARCH_PXA is not set
204# CONFIG_ARCH_MSM is not set
205CONFIG_ARCH_SHMOBILE=y
206# CONFIG_ARCH_RPC is not set
207# CONFIG_ARCH_SA1100 is not set
208# CONFIG_ARCH_S3C2410 is not set
209# CONFIG_ARCH_S3C64XX is not set
210# CONFIG_ARCH_S5PC1XX is not set
211# CONFIG_ARCH_SHARK is not set
212# CONFIG_ARCH_LH7A40X is not set
213# CONFIG_ARCH_U300 is not set
214# CONFIG_ARCH_DAVINCI is not set
215# CONFIG_ARCH_OMAP is not set
216# CONFIG_ARCH_BCMRING is not set
217# CONFIG_ARCH_U8500 is not set
218
219#
220# SH-Mobile System Type
221#
222# CONFIG_ARCH_SH7367 is not set
223CONFIG_ARCH_SH7377=y
224# CONFIG_ARCH_SH7372 is not set
225
226#
227# SH-Mobile Board Type
228#
229CONFIG_MACH_G4EVM=y
230
231#
232# SH-Mobile System Configuration
233#
234
235#
236# Memory configuration
237#
238CONFIG_MEMORY_START=0x40000000
239CONFIG_MEMORY_SIZE=0x08000000
240
241#
242# Timer and clock configuration
243#
244CONFIG_SH_TIMER_CMT=y
245
246#
247# Processor Type
248#
249CONFIG_CPU_32v6K=y
250CONFIG_CPU_V7=y
251CONFIG_CPU_32v7=y
252CONFIG_CPU_ABRT_EV7=y
253CONFIG_CPU_PABRT_V7=y
254CONFIG_CPU_CACHE_V7=y
255CONFIG_CPU_CACHE_VIPT=y
256CONFIG_CPU_COPY_V6=y
257CONFIG_CPU_TLB_V7=y
258CONFIG_CPU_HAS_ASID=y
259CONFIG_CPU_CP15=y
260CONFIG_CPU_CP15_MMU=y
261
262#
263# Processor Features
264#
265CONFIG_ARM_THUMB=y
266# CONFIG_ARM_THUMBEE is not set
267# CONFIG_CPU_ICACHE_DISABLE is not set
268# CONFIG_CPU_DCACHE_DISABLE is not set
269# CONFIG_CPU_BPREDICT_DISABLE is not set
270CONFIG_HAS_TLS_REG=y
271CONFIG_ARM_L1_CACHE_SHIFT=5
272# CONFIG_ARM_ERRATA_430973 is not set
273# CONFIG_ARM_ERRATA_458693 is not set
274# CONFIG_ARM_ERRATA_460075 is not set
275CONFIG_COMMON_CLKDEV=y
276
277#
278# Bus support
279#
280# CONFIG_PCI_SYSCALL is not set
281# CONFIG_ARCH_SUPPORTS_MSI is not set
282# CONFIG_PCCARD is not set
283
284#
285# Kernel Features
286#
287# CONFIG_NO_HZ is not set
288# CONFIG_HIGH_RES_TIMERS is not set
289CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
290CONFIG_VMSPLIT_3G=y
291# CONFIG_VMSPLIT_2G is not set
292# CONFIG_VMSPLIT_1G is not set
293CONFIG_PAGE_OFFSET=0xC0000000
294CONFIG_PREEMPT_NONE=y
295# CONFIG_PREEMPT_VOLUNTARY is not set
296# CONFIG_PREEMPT is not set
297CONFIG_HZ=100
298# CONFIG_THUMB2_KERNEL is not set
299CONFIG_AEABI=y
300# CONFIG_OABI_COMPAT is not set
301# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
302# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
303# CONFIG_HIGHMEM is not set
304CONFIG_SELECT_MEMORY_MODEL=y
305CONFIG_FLATMEM_MANUAL=y
306# CONFIG_DISCONTIGMEM_MANUAL is not set
307# CONFIG_SPARSEMEM_MANUAL is not set
308CONFIG_FLATMEM=y
309CONFIG_FLAT_NODE_MEM_MAP=y
310CONFIG_PAGEFLAGS_EXTENDED=y
311CONFIG_SPLIT_PTLOCK_CPUS=4
312# CONFIG_PHYS_ADDR_T_64BIT is not set
313CONFIG_ZONE_DMA_FLAG=0
314CONFIG_VIRT_TO_BUS=y
315# CONFIG_KSM is not set
316CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
317CONFIG_ALIGNMENT_TRAP=y
318# CONFIG_UACCESS_WITH_MEMCPY is not set
319
320#
321# Boot options
322#
323CONFIG_ZBOOT_ROM_TEXT=0x0
324CONFIG_ZBOOT_ROM_BSS=0x0
325CONFIG_CMDLINE="console=ttySC4,115200 earlyprintk=sh-sci.4,115200"
326# CONFIG_XIP_KERNEL is not set
327CONFIG_KEXEC=y
328CONFIG_ATAGS_PROC=y
329
330#
331# CPU Power Management
332#
333# CONFIG_CPU_IDLE is not set
334
335#
336# Floating point emulation
337#
338
339#
340# At least one emulation must be selected
341#
342# CONFIG_VFP is not set
343
344#
345# Userspace binary formats
346#
347CONFIG_BINFMT_ELF=y
348# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
349CONFIG_HAVE_AOUT=y
350# CONFIG_BINFMT_AOUT is not set
351# CONFIG_BINFMT_MISC is not set
352
353#
354# Power management options
355#
356CONFIG_PM=y
357# CONFIG_PM_DEBUG is not set
358# CONFIG_SUSPEND is not set
359# CONFIG_APM_EMULATION is not set
360# CONFIG_PM_RUNTIME is not set
361CONFIG_ARCH_SUSPEND_POSSIBLE=y
362# CONFIG_NET is not set
363
364#
365# Device Drivers
366#
367
368#
369# Generic Driver Options
370#
371CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
372# CONFIG_DEVTMPFS is not set
373CONFIG_STANDALONE=y
374CONFIG_PREVENT_FIRMWARE_BUILD=y
375CONFIG_FW_LOADER=y
376# CONFIG_FIRMWARE_IN_KERNEL is not set
377CONFIG_EXTRA_FIRMWARE=""
378# CONFIG_DEBUG_DRIVER is not set
379# CONFIG_DEBUG_DEVRES is not set
380# CONFIG_SYS_HYPERVISOR is not set
381CONFIG_MTD=y
382# CONFIG_MTD_DEBUG is not set
383CONFIG_MTD_CONCAT=y
384CONFIG_MTD_PARTITIONS=y
385# CONFIG_MTD_REDBOOT_PARTS is not set
386# CONFIG_MTD_CMDLINE_PARTS is not set
387# CONFIG_MTD_AFS_PARTS is not set
388# CONFIG_MTD_AR7_PARTS is not set
389
390#
391# User Modules And Translation Layers
392#
393CONFIG_MTD_CHAR=y
394CONFIG_MTD_BLKDEVS=y
395CONFIG_MTD_BLOCK=y
396# CONFIG_FTL is not set
397# CONFIG_NFTL is not set
398# CONFIG_INFTL is not set
399# CONFIG_RFD_FTL is not set
400# CONFIG_SSFDC is not set
401# CONFIG_MTD_OOPS is not set
402
403#
404# RAM/ROM/Flash chip drivers
405#
406CONFIG_MTD_CFI=y
407# CONFIG_MTD_JEDECPROBE is not set
408CONFIG_MTD_GEN_PROBE=y
409# CONFIG_MTD_CFI_ADV_OPTIONS is not set
410CONFIG_MTD_MAP_BANK_WIDTH_1=y
411CONFIG_MTD_MAP_BANK_WIDTH_2=y
412CONFIG_MTD_MAP_BANK_WIDTH_4=y
413# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
414# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
415# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
416CONFIG_MTD_CFI_I1=y
417CONFIG_MTD_CFI_I2=y
418# CONFIG_MTD_CFI_I4 is not set
419# CONFIG_MTD_CFI_I8 is not set
420CONFIG_MTD_CFI_INTELEXT=y
421# CONFIG_MTD_CFI_AMDSTD is not set
422# CONFIG_MTD_CFI_STAA is not set
423CONFIG_MTD_CFI_UTIL=y
424# CONFIG_MTD_RAM is not set
425# CONFIG_MTD_ROM is not set
426# CONFIG_MTD_ABSENT is not set
427
428#
429# Mapping drivers for chip access
430#
431# CONFIG_MTD_COMPLEX_MAPPINGS is not set
432CONFIG_MTD_PHYSMAP=y
433# CONFIG_MTD_PHYSMAP_COMPAT is not set
434# CONFIG_MTD_ARM_INTEGRATOR is not set
435# CONFIG_MTD_PLATRAM is not set
436
437#
438# Self-contained MTD device drivers
439#
440# CONFIG_MTD_SLRAM is not set
441# CONFIG_MTD_PHRAM is not set
442# CONFIG_MTD_MTDRAM is not set
443# CONFIG_MTD_BLOCK2MTD is not set
444
445#
446# Disk-On-Chip Device Drivers
447#
448# CONFIG_MTD_DOC2000 is not set
449# CONFIG_MTD_DOC2001 is not set
450# CONFIG_MTD_DOC2001PLUS is not set
451CONFIG_MTD_NAND=y
452# CONFIG_MTD_NAND_VERIFY_WRITE is not set
453# CONFIG_MTD_NAND_ECC_SMC is not set
454# CONFIG_MTD_NAND_MUSEUM_IDS is not set
455CONFIG_MTD_NAND_IDS=y
456# CONFIG_MTD_NAND_DISKONCHIP is not set
457# CONFIG_MTD_NAND_NANDSIM is not set
458# CONFIG_MTD_NAND_PLATFORM is not set
459# CONFIG_MTD_ONENAND is not set
460
461#
462# LPDDR flash memory drivers
463#
464# CONFIG_MTD_LPDDR is not set
465
466#
467# UBI - Unsorted block images
468#
469# CONFIG_MTD_UBI is not set
470# CONFIG_PARPORT is not set
471# CONFIG_BLK_DEV is not set
472# CONFIG_MISC_DEVICES is not set
473CONFIG_HAVE_IDE=y
474# CONFIG_IDE is not set
475
476#
477# SCSI device support
478#
479# CONFIG_RAID_ATTRS is not set
480# CONFIG_SCSI is not set
481# CONFIG_SCSI_DMA is not set
482# CONFIG_SCSI_NETLINK is not set
483# CONFIG_ATA is not set
484# CONFIG_MD is not set
485# CONFIG_PHONE is not set
486
487#
488# Input device support
489#
490CONFIG_INPUT=y
491# CONFIG_INPUT_FF_MEMLESS is not set
492# CONFIG_INPUT_POLLDEV is not set
493# CONFIG_INPUT_SPARSEKMAP is not set
494
495#
496# Userland interfaces
497#
498CONFIG_INPUT_MOUSEDEV=y
499# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
500CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
501CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
502# CONFIG_INPUT_JOYDEV is not set
503# CONFIG_INPUT_EVDEV is not set
504# CONFIG_INPUT_EVBUG is not set
505
506#
507# Input Device Drivers
508#
509# CONFIG_INPUT_KEYBOARD is not set
510# CONFIG_INPUT_MOUSE is not set
511# CONFIG_INPUT_JOYSTICK is not set
512# CONFIG_INPUT_TABLET is not set
513# CONFIG_INPUT_TOUCHSCREEN is not set
514# CONFIG_INPUT_MISC is not set
515
516#
517# Hardware I/O ports
518#
519# CONFIG_SERIO is not set
520# CONFIG_GAMEPORT is not set
521
522#
523# Character devices
524#
525CONFIG_VT=y
526CONFIG_CONSOLE_TRANSLATIONS=y
527CONFIG_VT_CONSOLE=y
528CONFIG_HW_CONSOLE=y
529# CONFIG_VT_HW_CONSOLE_BINDING is not set
530CONFIG_DEVKMEM=y
531# CONFIG_SERIAL_NONSTANDARD is not set
532
533#
534# Serial drivers
535#
536# CONFIG_SERIAL_8250 is not set
537
538#
539# Non-8250 serial port support
540#
541CONFIG_SERIAL_SH_SCI=y
542CONFIG_SERIAL_SH_SCI_NR_UARTS=8
543CONFIG_SERIAL_SH_SCI_CONSOLE=y
544CONFIG_SERIAL_CORE=y
545CONFIG_SERIAL_CORE_CONSOLE=y
546CONFIG_UNIX98_PTYS=y
547# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
548# CONFIG_LEGACY_PTYS is not set
549# CONFIG_IPMI_HANDLER is not set
550# CONFIG_HW_RANDOM is not set
551# CONFIG_R3964 is not set
552# CONFIG_RAW_DRIVER is not set
553# CONFIG_TCG_TPM is not set
554# CONFIG_I2C is not set
555# CONFIG_SPI is not set
556
557#
558# PPS support
559#
560# CONFIG_PPS is not set
561# CONFIG_W1 is not set
562# CONFIG_POWER_SUPPLY is not set
563# CONFIG_HWMON is not set
564# CONFIG_THERMAL is not set
565# CONFIG_WATCHDOG is not set
566CONFIG_SSB_POSSIBLE=y
567
568#
569# Sonics Silicon Backplane
570#
571# CONFIG_SSB is not set
572
573#
574# Multifunction device drivers
575#
576# CONFIG_MFD_CORE is not set
577# CONFIG_MFD_SM501 is not set
578# CONFIG_HTC_PASIC3 is not set
579# CONFIG_MFD_TMIO is not set
580# CONFIG_MFD_T7L66XB is not set
581# CONFIG_MFD_TC6387XB is not set
582# CONFIG_REGULATOR is not set
583# CONFIG_MEDIA_SUPPORT is not set
584
585#
586# Graphics support
587#
588# CONFIG_VGASTATE is not set
589# CONFIG_VIDEO_OUTPUT_CONTROL is not set
590# CONFIG_FB is not set
591# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
592
593#
594# Display device support
595#
596# CONFIG_DISPLAY_SUPPORT is not set
597
598#
599# Console display driver support
600#
601# CONFIG_VGA_CONSOLE is not set
602CONFIG_DUMMY_CONSOLE=y
603# CONFIG_SOUND is not set
604# CONFIG_HID_SUPPORT is not set
605# CONFIG_USB_SUPPORT is not set
606# CONFIG_MMC is not set
607# CONFIG_MEMSTICK is not set
608# CONFIG_NEW_LEDS is not set
609# CONFIG_ACCESSIBILITY is not set
610CONFIG_RTC_LIB=y
611# CONFIG_RTC_CLASS is not set
612# CONFIG_DMADEVICES is not set
613# CONFIG_AUXDISPLAY is not set
614# CONFIG_UIO is not set
615
616#
617# TI VLYNQ
618#
619# CONFIG_STAGING is not set
620
621#
622# File systems
623#
624# CONFIG_EXT2_FS is not set
625# CONFIG_EXT3_FS is not set
626# CONFIG_EXT4_FS is not set
627# CONFIG_REISERFS_FS is not set
628# CONFIG_JFS_FS is not set
629# CONFIG_FS_POSIX_ACL is not set
630# CONFIG_XFS_FS is not set
631# CONFIG_GFS2_FS is not set
632# CONFIG_BTRFS_FS is not set
633# CONFIG_NILFS2_FS is not set
634CONFIG_FILE_LOCKING=y
635# CONFIG_FSNOTIFY is not set
636# CONFIG_DNOTIFY is not set
637# CONFIG_INOTIFY is not set
638# CONFIG_INOTIFY_USER is not set
639# CONFIG_QUOTA is not set
640# CONFIG_AUTOFS_FS is not set
641# CONFIG_AUTOFS4_FS is not set
642# CONFIG_FUSE_FS is not set
643
644#
645# Caches
646#
647# CONFIG_FSCACHE is not set
648
649#
650# CD-ROM/DVD Filesystems
651#
652# CONFIG_ISO9660_FS is not set
653# CONFIG_UDF_FS is not set
654
655#
656# DOS/FAT/NT Filesystems
657#
658# CONFIG_MSDOS_FS is not set
659# CONFIG_VFAT_FS is not set
660# CONFIG_NTFS_FS is not set
661
662#
663# Pseudo filesystems
664#
665CONFIG_PROC_FS=y
666CONFIG_PROC_SYSCTL=y
667CONFIG_PROC_PAGE_MONITOR=y
668CONFIG_SYSFS=y
669CONFIG_TMPFS=y
670# CONFIG_TMPFS_POSIX_ACL is not set
671# CONFIG_HUGETLB_PAGE is not set
672# CONFIG_CONFIGFS_FS is not set
673# CONFIG_MISC_FILESYSTEMS is not set
674
675#
676# Partition Types
677#
678# CONFIG_PARTITION_ADVANCED is not set
679CONFIG_MSDOS_PARTITION=y
680# CONFIG_NLS is not set
681
682#
683# Kernel hacking
684#
685# CONFIG_PRINTK_TIME is not set
686CONFIG_ENABLE_WARN_DEPRECATED=y
687CONFIG_ENABLE_MUST_CHECK=y
688CONFIG_FRAME_WARN=1024
689CONFIG_MAGIC_SYSRQ=y
690# CONFIG_STRIP_ASM_SYMS is not set
691# CONFIG_UNUSED_SYMBOLS is not set
692# CONFIG_DEBUG_FS is not set
693# CONFIG_HEADERS_CHECK is not set
694CONFIG_DEBUG_KERNEL=y
695# CONFIG_DEBUG_SHIRQ is not set
696# CONFIG_DETECT_SOFTLOCKUP is not set
697# CONFIG_DETECT_HUNG_TASK is not set
698CONFIG_SCHED_DEBUG=y
699# CONFIG_SCHEDSTATS is not set
700# CONFIG_TIMER_STATS is not set
701# CONFIG_DEBUG_OBJECTS is not set
702# CONFIG_DEBUG_SLAB is not set
703# CONFIG_DEBUG_KMEMLEAK is not set
704# CONFIG_DEBUG_RT_MUTEXES is not set
705# CONFIG_RT_MUTEX_TESTER is not set
706# CONFIG_DEBUG_SPINLOCK is not set
707# CONFIG_DEBUG_MUTEXES is not set
708# CONFIG_DEBUG_LOCK_ALLOC is not set
709# CONFIG_PROVE_LOCKING is not set
710# CONFIG_LOCK_STAT is not set
711# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
712# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
713# CONFIG_DEBUG_KOBJECT is not set
714CONFIG_DEBUG_BUGVERBOSE=y
715# CONFIG_DEBUG_INFO is not set
716# CONFIG_DEBUG_VM is not set
717# CONFIG_DEBUG_WRITECOUNT is not set
718CONFIG_DEBUG_MEMORY_INIT=y
719# CONFIG_DEBUG_LIST is not set
720# CONFIG_DEBUG_SG is not set
721# CONFIG_DEBUG_NOTIFIERS is not set
722# CONFIG_DEBUG_CREDENTIALS is not set
723# CONFIG_BOOT_PRINTK_DELAY is not set
724# CONFIG_RCU_TORTURE_TEST is not set
725# CONFIG_RCU_CPU_STALL_DETECTOR is not set
726# CONFIG_BACKTRACE_SELF_TEST is not set
727# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
728# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
729# CONFIG_FAULT_INJECTION is not set
730# CONFIG_LATENCYTOP is not set
731# CONFIG_SYSCTL_SYSCALL_CHECK is not set
732# CONFIG_PAGE_POISONING is not set
733CONFIG_HAVE_FUNCTION_TRACER=y
734CONFIG_TRACING_SUPPORT=y
735# CONFIG_FTRACE is not set
736# CONFIG_SAMPLES is not set
737CONFIG_HAVE_ARCH_KGDB=y
738# CONFIG_KGDB is not set
739CONFIG_ARM_UNWIND=y
740# CONFIG_DEBUG_USER is not set
741# CONFIG_DEBUG_ERRORS is not set
742# CONFIG_DEBUG_STACK_USAGE is not set
743# CONFIG_DEBUG_LL is not set
744# CONFIG_OC_ETM is not set
745
746#
747# Security options
748#
749# CONFIG_KEYS is not set
750# CONFIG_SECURITY is not set
751# CONFIG_SECURITYFS is not set
752# CONFIG_DEFAULT_SECURITY_SELINUX is not set
753# CONFIG_DEFAULT_SECURITY_SMACK is not set
754# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
755CONFIG_DEFAULT_SECURITY_DAC=y
756CONFIG_DEFAULT_SECURITY=""
757# CONFIG_CRYPTO is not set
758# CONFIG_BINARY_PRINTF is not set
759
760#
761# Library routines
762#
763CONFIG_GENERIC_FIND_LAST_BIT=y
764# CONFIG_CRC_CCITT is not set
765# CONFIG_CRC16 is not set
766# CONFIG_CRC_T10DIF is not set
767# CONFIG_CRC_ITU_T is not set
768# CONFIG_CRC32 is not set
769# CONFIG_CRC7 is not set
770# CONFIG_LIBCRC32C is not set
771CONFIG_ZLIB_INFLATE=y
772CONFIG_LZO_DECOMPRESS=y
773CONFIG_DECOMPRESS_GZIP=y
774CONFIG_DECOMPRESS_BZIP2=y
775CONFIG_DECOMPRESS_LZMA=y
776CONFIG_DECOMPRESS_LZO=y
777CONFIG_HAS_IOMEM=y
778CONFIG_HAS_IOPORT=y
779CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
new file mode 100644
index 000000000000..95d2becfc664
--- /dev/null
+++ b/arch/arm/configs/imote2_defconfig
@@ -0,0 +1,2077 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc8
4# Sat Feb 13 21:48:53 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_ARCH_HAS_CPUFREQ=y
20CONFIG_GENERIC_HWEIGHT=y
21CONFIG_GENERIC_CALIBRATE_DELAY=y
22CONFIG_ARCH_MTD_XIP=y
23CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
24CONFIG_VECTORS_BASE=0xffff0000
25CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
26CONFIG_CONSTRUCTORS=y
27
28#
29# General setup
30#
31CONFIG_EXPERIMENTAL=y
32CONFIG_BROKEN_ON_SMP=y
33CONFIG_LOCK_KERNEL=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36# CONFIG_LOCALVERSION_AUTO is not set
37CONFIG_HAVE_KERNEL_GZIP=y
38CONFIG_HAVE_KERNEL_LZO=y
39CONFIG_KERNEL_GZIP=y
40# CONFIG_KERNEL_BZIP2 is not set
41# CONFIG_KERNEL_LZMA is not set
42# CONFIG_KERNEL_LZO is not set
43CONFIG_SWAP=y
44CONFIG_SYSVIPC=y
45CONFIG_SYSVIPC_SYSCTL=y
46# CONFIG_POSIX_MQUEUE is not set
47# CONFIG_BSD_PROCESS_ACCT is not set
48# CONFIG_TASKSTATS is not set
49# CONFIG_AUDIT is not set
50
51#
52# RCU Subsystem
53#
54CONFIG_TREE_RCU=y
55# CONFIG_TREE_PREEMPT_RCU is not set
56# CONFIG_TINY_RCU is not set
57# CONFIG_RCU_TRACE is not set
58CONFIG_RCU_FANOUT=32
59# CONFIG_RCU_FANOUT_EXACT is not set
60# CONFIG_TREE_RCU_TRACE is not set
61# CONFIG_IKCONFIG is not set
62CONFIG_LOG_BUF_SHIFT=14
63CONFIG_GROUP_SCHED=y
64CONFIG_FAIR_GROUP_SCHED=y
65# CONFIG_RT_GROUP_SCHED is not set
66CONFIG_USER_SCHED=y
67# CONFIG_CGROUP_SCHED is not set
68# CONFIG_CGROUPS is not set
69CONFIG_SYSFS_DEPRECATED=y
70CONFIG_SYSFS_DEPRECATED_V2=y
71# CONFIG_RELAY is not set
72# CONFIG_NAMESPACES is not set
73CONFIG_BLK_DEV_INITRD=y
74CONFIG_INITRAMFS_SOURCE=""
75CONFIG_RD_GZIP=y
76CONFIG_RD_BZIP2=y
77CONFIG_RD_LZMA=y
78# CONFIG_RD_LZO is not set
79CONFIG_CC_OPTIMIZE_FOR_SIZE=y
80CONFIG_SYSCTL=y
81CONFIG_ANON_INODES=y
82CONFIG_EMBEDDED=y
83CONFIG_UID16=y
84CONFIG_SYSCTL_SYSCALL=y
85CONFIG_KALLSYMS=y
86CONFIG_KALLSYMS_ALL=y
87# CONFIG_KALLSYMS_EXTRA_PASS is not set
88CONFIG_HOTPLUG=y
89CONFIG_PRINTK=y
90CONFIG_BUG=y
91CONFIG_ELF_CORE=y
92CONFIG_BASE_FULL=y
93CONFIG_FUTEX=y
94CONFIG_EPOLL=y
95CONFIG_SIGNALFD=y
96CONFIG_TIMERFD=y
97CONFIG_EVENTFD=y
98CONFIG_SHMEM=y
99CONFIG_AIO=y
100
101#
102# Kernel Performance Events And Counters
103#
104CONFIG_VM_EVENT_COUNTERS=y
105# CONFIG_COMPAT_BRK is not set
106CONFIG_SLAB=y
107# CONFIG_SLUB is not set
108# CONFIG_SLOB is not set
109# CONFIG_PROFILING is not set
110CONFIG_HAVE_OPROFILE=y
111# CONFIG_KPROBES is not set
112CONFIG_HAVE_KPROBES=y
113CONFIG_HAVE_KRETPROBES=y
114CONFIG_HAVE_CLK=y
115
116#
117# GCOV-based kernel profiling
118#
119# CONFIG_GCOV_KERNEL is not set
120CONFIG_SLOW_WORK=y
121# CONFIG_SLOW_WORK_DEBUG is not set
122CONFIG_HAVE_GENERIC_DMA_COHERENT=y
123CONFIG_SLABINFO=y
124CONFIG_RT_MUTEXES=y
125CONFIG_BASE_SMALL=0
126CONFIG_MODULES=y
127# CONFIG_MODULE_FORCE_LOAD is not set
128CONFIG_MODULE_UNLOAD=y
129CONFIG_MODULE_FORCE_UNLOAD=y
130CONFIG_MODVERSIONS=y
131# CONFIG_MODULE_SRCVERSION_ALL is not set
132CONFIG_BLOCK=y
133# CONFIG_LBDAF is not set
134# CONFIG_BLK_DEV_BSG is not set
135# CONFIG_BLK_DEV_INTEGRITY is not set
136
137#
138# IO Schedulers
139#
140CONFIG_IOSCHED_NOOP=y
141CONFIG_IOSCHED_DEADLINE=y
142# CONFIG_IOSCHED_CFQ is not set
143CONFIG_DEFAULT_DEADLINE=y
144# CONFIG_DEFAULT_CFQ is not set
145# CONFIG_DEFAULT_NOOP is not set
146CONFIG_DEFAULT_IOSCHED="deadline"
147# CONFIG_INLINE_SPIN_TRYLOCK is not set
148# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
149# CONFIG_INLINE_SPIN_LOCK is not set
150# CONFIG_INLINE_SPIN_LOCK_BH is not set
151# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
152# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
153# CONFIG_INLINE_SPIN_UNLOCK is not set
154# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
155# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
156# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
157# CONFIG_INLINE_READ_TRYLOCK is not set
158# CONFIG_INLINE_READ_LOCK is not set
159# CONFIG_INLINE_READ_LOCK_BH is not set
160# CONFIG_INLINE_READ_LOCK_IRQ is not set
161# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
162# CONFIG_INLINE_READ_UNLOCK is not set
163# CONFIG_INLINE_READ_UNLOCK_BH is not set
164# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
165# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_WRITE_TRYLOCK is not set
167# CONFIG_INLINE_WRITE_LOCK is not set
168# CONFIG_INLINE_WRITE_LOCK_BH is not set
169# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
170# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
171# CONFIG_INLINE_WRITE_UNLOCK is not set
172# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
173# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
174# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
175# CONFIG_MUTEX_SPIN_ON_OWNER is not set
176CONFIG_FREEZER=y
177
178#
179# System Type
180#
181CONFIG_MMU=y
182# CONFIG_ARCH_AAEC2000 is not set
183# CONFIG_ARCH_INTEGRATOR is not set
184# CONFIG_ARCH_REALVIEW is not set
185# CONFIG_ARCH_VERSATILE is not set
186# CONFIG_ARCH_AT91 is not set
187# CONFIG_ARCH_CLPS711X is not set
188# CONFIG_ARCH_GEMINI is not set
189# CONFIG_ARCH_EBSA110 is not set
190# CONFIG_ARCH_EP93XX is not set
191# CONFIG_ARCH_FOOTBRIDGE is not set
192# CONFIG_ARCH_MXC is not set
193# CONFIG_ARCH_STMP3XXX is not set
194# CONFIG_ARCH_NETX is not set
195# CONFIG_ARCH_H720X is not set
196# CONFIG_ARCH_NOMADIK is not set
197# CONFIG_ARCH_IOP13XX is not set
198# CONFIG_ARCH_IOP32X is not set
199# CONFIG_ARCH_IOP33X is not set
200# CONFIG_ARCH_IXP23XX is not set
201# CONFIG_ARCH_IXP2000 is not set
202# CONFIG_ARCH_IXP4XX is not set
203# CONFIG_ARCH_L7200 is not set
204# CONFIG_ARCH_DOVE is not set
205# CONFIG_ARCH_KIRKWOOD is not set
206# CONFIG_ARCH_LOKI is not set
207# CONFIG_ARCH_MV78XX0 is not set
208# CONFIG_ARCH_ORION5X is not set
209# CONFIG_ARCH_MMP is not set
210# CONFIG_ARCH_KS8695 is not set
211# CONFIG_ARCH_NS9XXX is not set
212# CONFIG_ARCH_W90X900 is not set
213# CONFIG_ARCH_PNX4008 is not set
214CONFIG_ARCH_PXA=y
215# CONFIG_ARCH_MSM is not set
216# CONFIG_ARCH_RPC is not set
217# CONFIG_ARCH_SA1100 is not set
218# CONFIG_ARCH_S3C2410 is not set
219# CONFIG_ARCH_S3C64XX is not set
220# CONFIG_ARCH_S5PC1XX is not set
221# CONFIG_ARCH_SHARK is not set
222# CONFIG_ARCH_LH7A40X is not set
223# CONFIG_ARCH_U300 is not set
224# CONFIG_ARCH_DAVINCI is not set
225# CONFIG_ARCH_OMAP is not set
226# CONFIG_ARCH_BCMRING is not set
227# CONFIG_ARCH_U8500 is not set
228
229#
230# Intel PXA2xx/PXA3xx Implementations
231#
232
233#
234# Intel/Marvell Dev Platforms (sorted by hardware release time)
235#
236# CONFIG_ARCH_LUBBOCK is not set
237# CONFIG_MACH_MAINSTONE is not set
238# CONFIG_MACH_ZYLONITE300 is not set
239# CONFIG_MACH_ZYLONITE320 is not set
240# CONFIG_MACH_LITTLETON is not set
241# CONFIG_MACH_TAVOREVB is not set
242# CONFIG_MACH_SAAR is not set
243
244#
245# Third Party Dev Platforms (sorted by vendor name)
246#
247# CONFIG_ARCH_PXA_IDP is not set
248# CONFIG_ARCH_VIPER is not set
249# CONFIG_MACH_ARCOM_ZEUS is not set
250# CONFIG_MACH_BALLOON3 is not set
251# CONFIG_MACH_CSB726 is not set
252# CONFIG_MACH_ARMCORE is not set
253# CONFIG_MACH_EM_X270 is not set
254# CONFIG_MACH_EXEDA is not set
255# CONFIG_MACH_CM_X300 is not set
256# CONFIG_ARCH_GUMSTIX is not set
257CONFIG_MACH_INTELMOTE2=y
258# CONFIG_MACH_STARGATE2 is not set
259# CONFIG_MACH_XCEP is not set
260# CONFIG_TRIZEPS_PXA is not set
261# CONFIG_MACH_LOGICPD_PXA270 is not set
262# CONFIG_MACH_PCM027 is not set
263# CONFIG_MACH_COLIBRI is not set
264# CONFIG_MACH_COLIBRI300 is not set
265# CONFIG_MACH_COLIBRI320 is not set
266
267#
268# End-user Products (sorted by vendor name)
269#
270# CONFIG_MACH_H4700 is not set
271# CONFIG_MACH_H5000 is not set
272# CONFIG_MACH_HIMALAYA is not set
273# CONFIG_MACH_MAGICIAN is not set
274# CONFIG_MACH_MIOA701 is not set
275# CONFIG_PXA_EZX is not set
276# CONFIG_MACH_MP900C is not set
277# CONFIG_ARCH_PXA_PALM is not set
278# CONFIG_PXA_SHARPSL is not set
279# CONFIG_ARCH_PXA_ESERIES is not set
280CONFIG_PXA27x=y
281CONFIG_PXA_SSP=y
282CONFIG_PXA_HAVE_BOARD_IRQS=y
283CONFIG_PLAT_PXA=y
284
285#
286# Processor Type
287#
288CONFIG_CPU_XSCALE=y
289CONFIG_CPU_32v5=y
290CONFIG_CPU_ABRT_EV5T=y
291CONFIG_CPU_PABRT_LEGACY=y
292CONFIG_CPU_CACHE_VIVT=y
293CONFIG_CPU_TLB_V4WBI=y
294CONFIG_CPU_CP15=y
295CONFIG_CPU_CP15_MMU=y
296
297#
298# Processor Features
299#
300CONFIG_ARM_THUMB=y
301# CONFIG_CPU_DCACHE_DISABLE is not set
302CONFIG_ARM_L1_CACHE_SHIFT=5
303CONFIG_IWMMXT=y
304CONFIG_XSCALE_PMU=y
305CONFIG_COMMON_CLKDEV=y
306
307#
308# Bus support
309#
310# CONFIG_PCI_SYSCALL is not set
311# CONFIG_ARCH_SUPPORTS_MSI is not set
312# CONFIG_PCCARD is not set
313
314#
315# Kernel Features
316#
317CONFIG_TICK_ONESHOT=y
318CONFIG_NO_HZ=y
319CONFIG_HIGH_RES_TIMERS=y
320CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
321CONFIG_VMSPLIT_3G=y
322# CONFIG_VMSPLIT_2G is not set
323# CONFIG_VMSPLIT_1G is not set
324CONFIG_PAGE_OFFSET=0xC0000000
325# CONFIG_PREEMPT_NONE is not set
326# CONFIG_PREEMPT_VOLUNTARY is not set
327CONFIG_PREEMPT=y
328CONFIG_HZ=100
329CONFIG_AEABI=y
330CONFIG_OABI_COMPAT=y
331# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
332# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
333# CONFIG_HIGHMEM is not set
334CONFIG_SELECT_MEMORY_MODEL=y
335CONFIG_FLATMEM_MANUAL=y
336# CONFIG_DISCONTIGMEM_MANUAL is not set
337# CONFIG_SPARSEMEM_MANUAL is not set
338CONFIG_FLATMEM=y
339CONFIG_FLAT_NODE_MEM_MAP=y
340CONFIG_PAGEFLAGS_EXTENDED=y
341CONFIG_SPLIT_PTLOCK_CPUS=999999
342# CONFIG_PHYS_ADDR_T_64BIT is not set
343CONFIG_ZONE_DMA_FLAG=0
344CONFIG_VIRT_TO_BUS=y
345# CONFIG_KSM is not set
346CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
347CONFIG_ALIGNMENT_TRAP=y
348# CONFIG_UACCESS_WITH_MEMCPY is not set
349
350#
351# Boot options
352#
353CONFIG_ZBOOT_ROM_TEXT=0x0
354CONFIG_ZBOOT_ROM_BSS=0x0
355CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
356# CONFIG_XIP_KERNEL is not set
357CONFIG_KEXEC=y
358CONFIG_ATAGS_PROC=y
359
360#
361# CPU Power Management
362#
363CONFIG_CPU_FREQ=y
364CONFIG_CPU_FREQ_TABLE=y
365CONFIG_CPU_FREQ_DEBUG=y
366CONFIG_CPU_FREQ_STAT=y
367# CONFIG_CPU_FREQ_STAT_DETAILS is not set
368CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
369# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
370# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
371# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
372# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
373CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
374CONFIG_CPU_FREQ_GOV_POWERSAVE=m
375CONFIG_CPU_FREQ_GOV_USERSPACE=m
376CONFIG_CPU_FREQ_GOV_ONDEMAND=m
377CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
378CONFIG_CPU_IDLE=y
379CONFIG_CPU_IDLE_GOV_LADDER=y
380CONFIG_CPU_IDLE_GOV_MENU=y
381
382#
383# Floating point emulation
384#
385
386#
387# At least one emulation must be selected
388#
389CONFIG_FPE_NWFPE=y
390# CONFIG_FPE_NWFPE_XP is not set
391# CONFIG_FPE_FASTFPE is not set
392
393#
394# Userspace binary formats
395#
396CONFIG_BINFMT_ELF=y
397# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
398CONFIG_HAVE_AOUT=y
399CONFIG_BINFMT_AOUT=m
400CONFIG_BINFMT_MISC=m
401
402#
403# Power management options
404#
405CONFIG_PM=y
406# CONFIG_PM_DEBUG is not set
407CONFIG_PM_SLEEP=y
408CONFIG_SUSPEND=y
409CONFIG_SUSPEND_FREEZER=y
410CONFIG_APM_EMULATION=y
411CONFIG_PM_RUNTIME=y
412CONFIG_ARCH_SUSPEND_POSSIBLE=y
413CONFIG_NET=y
414
415#
416# Networking options
417#
418CONFIG_PACKET=y
419CONFIG_PACKET_MMAP=y
420CONFIG_UNIX=y
421CONFIG_XFRM=y
422# CONFIG_XFRM_USER is not set
423# CONFIG_XFRM_SUB_POLICY is not set
424# CONFIG_XFRM_MIGRATE is not set
425# CONFIG_XFRM_STATISTICS is not set
426CONFIG_XFRM_IPCOMP=m
427# CONFIG_NET_KEY is not set
428CONFIG_INET=y
429# CONFIG_IP_MULTICAST is not set
430# CONFIG_IP_ADVANCED_ROUTER is not set
431CONFIG_IP_FIB_HASH=y
432CONFIG_IP_PNP=y
433CONFIG_IP_PNP_DHCP=y
434CONFIG_IP_PNP_BOOTP=y
435CONFIG_IP_PNP_RARP=y
436# CONFIG_NET_IPIP is not set
437# CONFIG_NET_IPGRE is not set
438# CONFIG_ARPD is not set
439CONFIG_SYN_COOKIES=y
440# CONFIG_INET_AH is not set
441# CONFIG_INET_ESP is not set
442# CONFIG_INET_IPCOMP is not set
443# CONFIG_INET_XFRM_TUNNEL is not set
444CONFIG_INET_TUNNEL=m
445# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
446# CONFIG_INET_XFRM_MODE_TUNNEL is not set
447# CONFIG_INET_XFRM_MODE_BEET is not set
448# CONFIG_INET_LRO is not set
449# CONFIG_INET_DIAG is not set
450# CONFIG_TCP_CONG_ADVANCED is not set
451CONFIG_TCP_CONG_CUBIC=y
452CONFIG_DEFAULT_TCP_CONG="cubic"
453# CONFIG_TCP_MD5SIG is not set
454CONFIG_IPV6=m
455# CONFIG_IPV6_PRIVACY is not set
456# CONFIG_IPV6_ROUTER_PREF is not set
457# CONFIG_IPV6_OPTIMISTIC_DAD is not set
458CONFIG_INET6_AH=m
459CONFIG_INET6_ESP=m
460CONFIG_INET6_IPCOMP=m
461CONFIG_IPV6_MIP6=m
462CONFIG_INET6_XFRM_TUNNEL=m
463CONFIG_INET6_TUNNEL=m
464CONFIG_INET6_XFRM_MODE_TRANSPORT=m
465CONFIG_INET6_XFRM_MODE_TUNNEL=m
466CONFIG_INET6_XFRM_MODE_BEET=m
467# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
468CONFIG_IPV6_SIT=m
469# CONFIG_IPV6_SIT_6RD is not set
470CONFIG_IPV6_NDISC_NODETYPE=y
471CONFIG_IPV6_TUNNEL=m
472CONFIG_IPV6_MULTIPLE_TABLES=y
473CONFIG_IPV6_SUBTREES=y
474# CONFIG_IPV6_MROUTE is not set
475# CONFIG_NETWORK_SECMARK is not set
476CONFIG_NETFILTER=y
477# CONFIG_NETFILTER_DEBUG is not set
478CONFIG_NETFILTER_ADVANCED=y
479CONFIG_BRIDGE_NETFILTER=y
480
481#
482# Core Netfilter Configuration
483#
484CONFIG_NETFILTER_NETLINK=m
485CONFIG_NETFILTER_NETLINK_QUEUE=m
486CONFIG_NETFILTER_NETLINK_LOG=m
487CONFIG_NF_CONNTRACK=m
488CONFIG_NF_CT_ACCT=y
489CONFIG_NF_CONNTRACK_MARK=y
490CONFIG_NF_CONNTRACK_EVENTS=y
491# CONFIG_NF_CT_PROTO_DCCP is not set
492CONFIG_NF_CT_PROTO_GRE=m
493CONFIG_NF_CT_PROTO_SCTP=m
494CONFIG_NF_CT_PROTO_UDPLITE=m
495CONFIG_NF_CONNTRACK_AMANDA=m
496CONFIG_NF_CONNTRACK_FTP=m
497CONFIG_NF_CONNTRACK_H323=m
498CONFIG_NF_CONNTRACK_IRC=m
499CONFIG_NF_CONNTRACK_NETBIOS_NS=m
500CONFIG_NF_CONNTRACK_PPTP=m
501CONFIG_NF_CONNTRACK_SANE=m
502CONFIG_NF_CONNTRACK_SIP=m
503CONFIG_NF_CONNTRACK_TFTP=m
504CONFIG_NF_CT_NETLINK=m
505# CONFIG_NETFILTER_TPROXY is not set
506CONFIG_NETFILTER_XTABLES=m
507CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
508# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
509# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
510CONFIG_NETFILTER_XT_TARGET_HL=m
511CONFIG_NETFILTER_XT_TARGET_LED=m
512CONFIG_NETFILTER_XT_TARGET_MARK=m
513CONFIG_NETFILTER_XT_TARGET_NFLOG=m
514CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
515# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
516# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
517# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
518CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
519# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
520# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
521CONFIG_NETFILTER_XT_MATCH_COMMENT=m
522CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
523CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
524CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
525CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
526CONFIG_NETFILTER_XT_MATCH_DCCP=m
527CONFIG_NETFILTER_XT_MATCH_DSCP=m
528CONFIG_NETFILTER_XT_MATCH_ESP=m
529CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
530CONFIG_NETFILTER_XT_MATCH_HELPER=m
531CONFIG_NETFILTER_XT_MATCH_HL=m
532# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
533CONFIG_NETFILTER_XT_MATCH_LENGTH=m
534CONFIG_NETFILTER_XT_MATCH_LIMIT=m
535CONFIG_NETFILTER_XT_MATCH_MAC=m
536CONFIG_NETFILTER_XT_MATCH_MARK=m
537CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
538# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
539CONFIG_NETFILTER_XT_MATCH_POLICY=m
540# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
541CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
542CONFIG_NETFILTER_XT_MATCH_QUOTA=m
543# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
544CONFIG_NETFILTER_XT_MATCH_REALM=m
545# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
546CONFIG_NETFILTER_XT_MATCH_SCTP=m
547CONFIG_NETFILTER_XT_MATCH_STATE=m
548CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
549CONFIG_NETFILTER_XT_MATCH_STRING=m
550CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
551CONFIG_NETFILTER_XT_MATCH_TIME=m
552CONFIG_NETFILTER_XT_MATCH_U32=m
553# CONFIG_NETFILTER_XT_MATCH_OSF is not set
554# CONFIG_IP_VS is not set
555
556#
557# IP: Netfilter Configuration
558#
559CONFIG_NF_DEFRAG_IPV4=m
560CONFIG_NF_CONNTRACK_IPV4=m
561CONFIG_NF_CONNTRACK_PROC_COMPAT=y
562CONFIG_IP_NF_QUEUE=m
563CONFIG_IP_NF_IPTABLES=m
564CONFIG_IP_NF_MATCH_ADDRTYPE=m
565CONFIG_IP_NF_MATCH_AH=m
566CONFIG_IP_NF_MATCH_ECN=m
567CONFIG_IP_NF_MATCH_TTL=m
568CONFIG_IP_NF_FILTER=m
569CONFIG_IP_NF_TARGET_REJECT=m
570CONFIG_IP_NF_TARGET_LOG=m
571CONFIG_IP_NF_TARGET_ULOG=m
572CONFIG_NF_NAT=m
573CONFIG_NF_NAT_NEEDED=y
574CONFIG_IP_NF_TARGET_MASQUERADE=m
575CONFIG_IP_NF_TARGET_NETMAP=m
576CONFIG_IP_NF_TARGET_REDIRECT=m
577CONFIG_NF_NAT_SNMP_BASIC=m
578CONFIG_NF_NAT_PROTO_GRE=m
579CONFIG_NF_NAT_PROTO_UDPLITE=m
580CONFIG_NF_NAT_PROTO_SCTP=m
581CONFIG_NF_NAT_FTP=m
582CONFIG_NF_NAT_IRC=m
583CONFIG_NF_NAT_TFTP=m
584CONFIG_NF_NAT_AMANDA=m
585CONFIG_NF_NAT_PPTP=m
586CONFIG_NF_NAT_H323=m
587CONFIG_NF_NAT_SIP=m
588CONFIG_IP_NF_MANGLE=m
589CONFIG_IP_NF_TARGET_CLUSTERIP=m
590CONFIG_IP_NF_TARGET_ECN=m
591CONFIG_IP_NF_TARGET_TTL=m
592CONFIG_IP_NF_RAW=m
593CONFIG_IP_NF_ARPTABLES=m
594CONFIG_IP_NF_ARPFILTER=m
595CONFIG_IP_NF_ARP_MANGLE=m
596
597#
598# IPv6: Netfilter Configuration
599#
600CONFIG_NF_CONNTRACK_IPV6=m
601CONFIG_IP6_NF_QUEUE=m
602CONFIG_IP6_NF_IPTABLES=m
603CONFIG_IP6_NF_MATCH_AH=m
604CONFIG_IP6_NF_MATCH_EUI64=m
605CONFIG_IP6_NF_MATCH_FRAG=m
606CONFIG_IP6_NF_MATCH_OPTS=m
607CONFIG_IP6_NF_MATCH_HL=m
608CONFIG_IP6_NF_MATCH_IPV6HEADER=m
609CONFIG_IP6_NF_MATCH_MH=m
610CONFIG_IP6_NF_MATCH_RT=m
611CONFIG_IP6_NF_TARGET_HL=m
612CONFIG_IP6_NF_TARGET_LOG=m
613CONFIG_IP6_NF_FILTER=m
614CONFIG_IP6_NF_TARGET_REJECT=m
615CONFIG_IP6_NF_MANGLE=m
616CONFIG_IP6_NF_RAW=m
617# CONFIG_BRIDGE_NF_EBTABLES is not set
618# CONFIG_IP_DCCP is not set
619# CONFIG_IP_SCTP is not set
620# CONFIG_RDS is not set
621# CONFIG_TIPC is not set
622# CONFIG_ATM is not set
623CONFIG_STP=m
624CONFIG_BRIDGE=m
625# CONFIG_NET_DSA is not set
626# CONFIG_VLAN_8021Q is not set
627# CONFIG_DECNET is not set
628CONFIG_LLC=m
629# CONFIG_LLC2 is not set
630# CONFIG_IPX is not set
631# CONFIG_ATALK is not set
632# CONFIG_X25 is not set
633# CONFIG_LAPB is not set
634# CONFIG_ECONET is not set
635# CONFIG_WAN_ROUTER is not set
636# CONFIG_PHONET is not set
637CONFIG_IEEE802154=y
638# CONFIG_NET_SCHED is not set
639CONFIG_NET_CLS_ROUTE=y
640# CONFIG_DCB is not set
641
642#
643# Network testing
644#
645# CONFIG_NET_PKTGEN is not set
646# CONFIG_HAMRADIO is not set
647# CONFIG_CAN is not set
648# CONFIG_IRDA is not set
649CONFIG_BT=y
650CONFIG_BT_L2CAP=y
651CONFIG_BT_SCO=y
652CONFIG_BT_RFCOMM=y
653CONFIG_BT_RFCOMM_TTY=y
654CONFIG_BT_BNEP=y
655CONFIG_BT_BNEP_MC_FILTER=y
656CONFIG_BT_BNEP_PROTO_FILTER=y
657CONFIG_BT_HIDP=y
658
659#
660# Bluetooth device drivers
661#
662CONFIG_BT_HCIBTUSB=m
663CONFIG_BT_HCIBTSDIO=m
664CONFIG_BT_HCIUART=y
665CONFIG_BT_HCIUART_H4=y
666# CONFIG_BT_HCIUART_BCSP is not set
667# CONFIG_BT_HCIUART_LL is not set
668CONFIG_BT_HCIBCM203X=m
669CONFIG_BT_HCIBPA10X=m
670CONFIG_BT_HCIBFUSB=m
671CONFIG_BT_HCIVHCI=m
672CONFIG_BT_MRVL=m
673CONFIG_BT_MRVL_SDIO=m
674# CONFIG_BT_ATH3K is not set
675# CONFIG_AF_RXRPC is not set
676CONFIG_FIB_RULES=y
677# CONFIG_WIRELESS is not set
678# CONFIG_WIMAX is not set
679# CONFIG_RFKILL is not set
680# CONFIG_NET_9P is not set
681
682#
683# Device Drivers
684#
685
686#
687# Generic Driver Options
688#
689CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
690# CONFIG_DEVTMPFS is not set
691CONFIG_STANDALONE=y
692CONFIG_PREVENT_FIRMWARE_BUILD=y
693CONFIG_FW_LOADER=m
694CONFIG_FIRMWARE_IN_KERNEL=y
695CONFIG_EXTRA_FIRMWARE=""
696# CONFIG_DEBUG_DRIVER is not set
697# CONFIG_DEBUG_DEVRES is not set
698# CONFIG_SYS_HYPERVISOR is not set
699CONFIG_CONNECTOR=m
700CONFIG_MTD=y
701# CONFIG_MTD_DEBUG is not set
702# CONFIG_MTD_TESTS is not set
703# CONFIG_MTD_CONCAT is not set
704CONFIG_MTD_PARTITIONS=y
705# CONFIG_MTD_REDBOOT_PARTS is not set
706# CONFIG_MTD_CMDLINE_PARTS is not set
707# CONFIG_MTD_AFS_PARTS is not set
708# CONFIG_MTD_AR7_PARTS is not set
709
710#
711# User Modules And Translation Layers
712#
713CONFIG_MTD_CHAR=y
714CONFIG_HAVE_MTD_OTP=y
715CONFIG_MTD_BLKDEVS=y
716CONFIG_MTD_BLOCK=y
717# CONFIG_FTL is not set
718# CONFIG_NFTL is not set
719# CONFIG_INFTL is not set
720# CONFIG_RFD_FTL is not set
721# CONFIG_SSFDC is not set
722# CONFIG_MTD_OOPS is not set
723
724#
725# RAM/ROM/Flash chip drivers
726#
727CONFIG_MTD_CFI=y
728# CONFIG_MTD_JEDECPROBE is not set
729CONFIG_MTD_GEN_PROBE=y
730CONFIG_MTD_CFI_ADV_OPTIONS=y
731CONFIG_MTD_CFI_NOSWAP=y
732# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
733# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
734CONFIG_MTD_CFI_GEOMETRY=y
735# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
736CONFIG_MTD_MAP_BANK_WIDTH_2=y
737# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
738# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
739# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
740# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
741CONFIG_MTD_CFI_I1=y
742# CONFIG_MTD_CFI_I2 is not set
743# CONFIG_MTD_CFI_I4 is not set
744# CONFIG_MTD_CFI_I8 is not set
745CONFIG_MTD_OTP=y
746CONFIG_MTD_CFI_INTELEXT=y
747# CONFIG_MTD_CFI_AMDSTD is not set
748# CONFIG_MTD_CFI_STAA is not set
749CONFIG_MTD_CFI_UTIL=y
750# CONFIG_MTD_RAM is not set
751# CONFIG_MTD_ROM is not set
752# CONFIG_MTD_ABSENT is not set
753# CONFIG_MTD_XIP is not set
754
755#
756# Mapping drivers for chip access
757#
758# CONFIG_MTD_COMPLEX_MAPPINGS is not set
759# CONFIG_MTD_PHYSMAP is not set
760CONFIG_MTD_PXA2XX=y
761# CONFIG_MTD_ARM_INTEGRATOR is not set
762# CONFIG_MTD_PLATRAM is not set
763
764#
765# Self-contained MTD device drivers
766#
767# CONFIG_MTD_DATAFLASH is not set
768# CONFIG_MTD_M25P80 is not set
769# CONFIG_MTD_SST25L is not set
770# CONFIG_MTD_SLRAM is not set
771# CONFIG_MTD_PHRAM is not set
772# CONFIG_MTD_MTDRAM is not set
773# CONFIG_MTD_BLOCK2MTD is not set
774
775#
776# Disk-On-Chip Device Drivers
777#
778# CONFIG_MTD_DOC2000 is not set
779# CONFIG_MTD_DOC2001 is not set
780# CONFIG_MTD_DOC2001PLUS is not set
781# CONFIG_MTD_NAND is not set
782# CONFIG_MTD_ONENAND is not set
783
784#
785# LPDDR flash memory drivers
786#
787# CONFIG_MTD_LPDDR is not set
788
789#
790# UBI - Unsorted block images
791#
792# CONFIG_MTD_UBI is not set
793# CONFIG_PARPORT is not set
794CONFIG_BLK_DEV=y
795# CONFIG_BLK_DEV_COW_COMMON is not set
796CONFIG_BLK_DEV_LOOP=m
797CONFIG_BLK_DEV_CRYPTOLOOP=m
798# CONFIG_BLK_DEV_DRBD is not set
799CONFIG_BLK_DEV_NBD=m
800# CONFIG_BLK_DEV_UB is not set
801CONFIG_BLK_DEV_RAM=y
802CONFIG_BLK_DEV_RAM_COUNT=16
803CONFIG_BLK_DEV_RAM_SIZE=4096
804# CONFIG_BLK_DEV_XIP is not set
805# CONFIG_CDROM_PKTCDVD is not set
806# CONFIG_ATA_OVER_ETH is not set
807# CONFIG_MG_DISK is not set
808# CONFIG_MISC_DEVICES is not set
809CONFIG_HAVE_IDE=y
810# CONFIG_IDE is not set
811
812#
813# SCSI device support
814#
815# CONFIG_RAID_ATTRS is not set
816# CONFIG_SCSI is not set
817# CONFIG_SCSI_DMA is not set
818# CONFIG_SCSI_NETLINK is not set
819# CONFIG_ATA is not set
820# CONFIG_MD is not set
821CONFIG_NETDEVICES=y
822CONFIG_DUMMY=y
823# CONFIG_BONDING is not set
824# CONFIG_MACVLAN is not set
825# CONFIG_EQUALIZER is not set
826# CONFIG_TUN is not set
827# CONFIG_VETH is not set
828# CONFIG_NET_ETHERNET is not set
829# CONFIG_NETDEV_1000 is not set
830# CONFIG_NETDEV_10000 is not set
831# CONFIG_WLAN is not set
832
833#
834# Enable WiMAX (Networking options) to see the WiMAX drivers
835#
836
837#
838# USB Network Adapters
839#
840# CONFIG_USB_CATC is not set
841# CONFIG_USB_KAWETH is not set
842# CONFIG_USB_PEGASUS is not set
843# CONFIG_USB_RTL8150 is not set
844# CONFIG_USB_USBNET is not set
845# CONFIG_WAN is not set
846CONFIG_IEEE802154_DRIVERS=y
847# CONFIG_IEEE802154_FAKEHARD is not set
848CONFIG_PPP=m
849CONFIG_PPP_MULTILINK=y
850CONFIG_PPP_FILTER=y
851CONFIG_PPP_ASYNC=m
852CONFIG_PPP_SYNC_TTY=m
853CONFIG_PPP_DEFLATE=m
854CONFIG_PPP_BSDCOMP=m
855# CONFIG_PPP_MPPE is not set
856# CONFIG_PPPOE is not set
857# CONFIG_PPPOL2TP is not set
858# CONFIG_SLIP is not set
859CONFIG_SLHC=m
860# CONFIG_NETCONSOLE is not set
861# CONFIG_NETPOLL is not set
862# CONFIG_NET_POLL_CONTROLLER is not set
863# CONFIG_ISDN is not set
864# CONFIG_PHONE is not set
865
866#
867# Input device support
868#
869CONFIG_INPUT=y
870# CONFIG_INPUT_FF_MEMLESS is not set
871# CONFIG_INPUT_POLLDEV is not set
872# CONFIG_INPUT_SPARSEKMAP is not set
873
874#
875# Userland interfaces
876#
877# CONFIG_INPUT_MOUSEDEV is not set
878# CONFIG_INPUT_JOYDEV is not set
879CONFIG_INPUT_EVDEV=y
880# CONFIG_INPUT_EVBUG is not set
881# CONFIG_INPUT_APMPOWER is not set
882
883#
884# Input Device Drivers
885#
886CONFIG_INPUT_KEYBOARD=y
887# CONFIG_KEYBOARD_ADP5588 is not set
888# CONFIG_KEYBOARD_ATKBD is not set
889# CONFIG_QT2160 is not set
890# CONFIG_KEYBOARD_LKKBD is not set
891CONFIG_KEYBOARD_GPIO=y
892# CONFIG_KEYBOARD_MATRIX is not set
893# CONFIG_KEYBOARD_LM8323 is not set
894# CONFIG_KEYBOARD_MAX7359 is not set
895# CONFIG_KEYBOARD_NEWTON is not set
896# CONFIG_KEYBOARD_OPENCORES is not set
897CONFIG_KEYBOARD_PXA27x=y
898# CONFIG_KEYBOARD_STOWAWAY is not set
899# CONFIG_KEYBOARD_SUNKBD is not set
900# CONFIG_KEYBOARD_XTKBD is not set
901# CONFIG_INPUT_MOUSE is not set
902# CONFIG_INPUT_JOYSTICK is not set
903# CONFIG_INPUT_TABLET is not set
904CONFIG_INPUT_TOUCHSCREEN=y
905# CONFIG_TOUCHSCREEN_ADS7846 is not set
906# CONFIG_TOUCHSCREEN_AD7877 is not set
907# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
908# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
909# CONFIG_TOUCHSCREEN_AD7879 is not set
910CONFIG_TOUCHSCREEN_DA9034=y
911# CONFIG_TOUCHSCREEN_DYNAPRO is not set
912# CONFIG_TOUCHSCREEN_EETI is not set
913# CONFIG_TOUCHSCREEN_FUJITSU is not set
914# CONFIG_TOUCHSCREEN_GUNZE is not set
915# CONFIG_TOUCHSCREEN_ELO is not set
916# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
917# CONFIG_TOUCHSCREEN_MCS5000 is not set
918# CONFIG_TOUCHSCREEN_MTOUCH is not set
919# CONFIG_TOUCHSCREEN_INEXIO is not set
920# CONFIG_TOUCHSCREEN_MK712 is not set
921# CONFIG_TOUCHSCREEN_PENMOUNT is not set
922# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
923# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
924# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
925# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
926# CONFIG_TOUCHSCREEN_TSC2007 is not set
927# CONFIG_TOUCHSCREEN_W90X900 is not set
928CONFIG_INPUT_MISC=y
929# CONFIG_INPUT_ATI_REMOTE is not set
930# CONFIG_INPUT_ATI_REMOTE2 is not set
931# CONFIG_INPUT_KEYSPAN_REMOTE is not set
932# CONFIG_INPUT_POWERMATE is not set
933# CONFIG_INPUT_YEALINK is not set
934# CONFIG_INPUT_CM109 is not set
935CONFIG_INPUT_UINPUT=y
936# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
937
938#
939# Hardware I/O ports
940#
941# CONFIG_SERIO is not set
942# CONFIG_GAMEPORT is not set
943
944#
945# Character devices
946#
947CONFIG_VT=y
948CONFIG_CONSOLE_TRANSLATIONS=y
949CONFIG_VT_CONSOLE=y
950CONFIG_HW_CONSOLE=y
951# CONFIG_VT_HW_CONSOLE_BINDING is not set
952CONFIG_DEVKMEM=y
953# CONFIG_SERIAL_NONSTANDARD is not set
954
955#
956# Serial drivers
957#
958# CONFIG_SERIAL_8250 is not set
959
960#
961# Non-8250 serial port support
962#
963# CONFIG_SERIAL_MAX3100 is not set
964CONFIG_SERIAL_PXA=y
965CONFIG_SERIAL_PXA_CONSOLE=y
966CONFIG_SERIAL_CORE=y
967CONFIG_SERIAL_CORE_CONSOLE=y
968CONFIG_UNIX98_PTYS=y
969# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
970CONFIG_LEGACY_PTYS=y
971CONFIG_LEGACY_PTY_COUNT=8
972# CONFIG_IPMI_HANDLER is not set
973# CONFIG_HW_RANDOM is not set
974# CONFIG_R3964 is not set
975# CONFIG_RAW_DRIVER is not set
976# CONFIG_TCG_TPM is not set
977CONFIG_I2C=y
978CONFIG_I2C_BOARDINFO=y
979CONFIG_I2C_COMPAT=y
980CONFIG_I2C_CHARDEV=y
981CONFIG_I2C_HELPER_AUTO=y
982
983#
984# I2C Hardware Bus support
985#
986
987#
988# I2C system bus drivers (mostly embedded / system-on-chip)
989#
990# CONFIG_I2C_DESIGNWARE is not set
991# CONFIG_I2C_GPIO is not set
992# CONFIG_I2C_OCORES is not set
993CONFIG_I2C_PXA=y
994# CONFIG_I2C_PXA_SLAVE is not set
995# CONFIG_I2C_SIMTEC is not set
996
997#
998# External I2C/SMBus adapter drivers
999#
1000# CONFIG_I2C_PARPORT_LIGHT is not set
1001# CONFIG_I2C_TAOS_EVM is not set
1002# CONFIG_I2C_TINY_USB is not set
1003
1004#
1005# Other I2C/SMBus bus drivers
1006#
1007# CONFIG_I2C_PCA_PLATFORM is not set
1008# CONFIG_I2C_STUB is not set
1009
1010#
1011# Miscellaneous I2C Chip support
1012#
1013# CONFIG_SENSORS_TSL2550 is not set
1014# CONFIG_I2C_DEBUG_CORE is not set
1015# CONFIG_I2C_DEBUG_ALGO is not set
1016# CONFIG_I2C_DEBUG_BUS is not set
1017# CONFIG_I2C_DEBUG_CHIP is not set
1018CONFIG_SPI=y
1019# CONFIG_SPI_DEBUG is not set
1020CONFIG_SPI_MASTER=y
1021
1022#
1023# SPI Master Controller Drivers
1024#
1025# CONFIG_SPI_BITBANG is not set
1026# CONFIG_SPI_GPIO is not set
1027CONFIG_SPI_PXA2XX=y
1028# CONFIG_SPI_XILINX is not set
1029# CONFIG_SPI_DESIGNWARE is not set
1030
1031#
1032# SPI Protocol Masters
1033#
1034# CONFIG_SPI_SPIDEV is not set
1035# CONFIG_SPI_TLE62X0 is not set
1036
1037#
1038# PPS support
1039#
1040# CONFIG_PPS is not set
1041CONFIG_ARCH_REQUIRE_GPIOLIB=y
1042CONFIG_GPIOLIB=y
1043# CONFIG_DEBUG_GPIO is not set
1044CONFIG_GPIO_SYSFS=y
1045
1046#
1047# Memory mapped GPIO expanders:
1048#
1049
1050#
1051# I2C GPIO expanders:
1052#
1053# CONFIG_GPIO_MAX732X is not set
1054# CONFIG_GPIO_PCA953X is not set
1055# CONFIG_GPIO_PCF857X is not set
1056# CONFIG_GPIO_ADP5588 is not set
1057
1058#
1059# PCI GPIO expanders:
1060#
1061
1062#
1063# SPI GPIO expanders:
1064#
1065# CONFIG_GPIO_MAX7301 is not set
1066# CONFIG_GPIO_MCP23S08 is not set
1067# CONFIG_GPIO_MC33880 is not set
1068
1069#
1070# AC97 GPIO expanders:
1071#
1072# CONFIG_W1 is not set
1073CONFIG_POWER_SUPPLY=y
1074# CONFIG_POWER_SUPPLY_DEBUG is not set
1075# CONFIG_PDA_POWER is not set
1076# CONFIG_APM_POWER is not set
1077# CONFIG_BATTERY_DS2760 is not set
1078# CONFIG_BATTERY_DS2782 is not set
1079# CONFIG_BATTERY_BQ27x00 is not set
1080# CONFIG_BATTERY_DA9030 is not set
1081# CONFIG_BATTERY_MAX17040 is not set
1082# CONFIG_HWMON is not set
1083# CONFIG_THERMAL is not set
1084# CONFIG_WATCHDOG is not set
1085CONFIG_SSB_POSSIBLE=y
1086
1087#
1088# Sonics Silicon Backplane
1089#
1090# CONFIG_SSB is not set
1091
1092#
1093# Multifunction device drivers
1094#
1095# CONFIG_MFD_CORE is not set
1096# CONFIG_MFD_SM501 is not set
1097# CONFIG_MFD_ASIC3 is not set
1098# CONFIG_HTC_EGPIO is not set
1099# CONFIG_HTC_PASIC3 is not set
1100# CONFIG_TPS65010 is not set
1101# CONFIG_TWL4030_CORE is not set
1102# CONFIG_MFD_TMIO is not set
1103# CONFIG_MFD_T7L66XB is not set
1104# CONFIG_MFD_TC6387XB is not set
1105# CONFIG_MFD_TC6393XB is not set
1106CONFIG_PMIC_DA903X=y
1107# CONFIG_PMIC_ADP5520 is not set
1108# CONFIG_MFD_WM8400 is not set
1109# CONFIG_MFD_WM831X is not set
1110# CONFIG_MFD_WM8350_I2C is not set
1111# CONFIG_MFD_PCF50633 is not set
1112# CONFIG_MFD_MC13783 is not set
1113# CONFIG_AB3100_CORE is not set
1114# CONFIG_EZX_PCAP is not set
1115# CONFIG_MFD_88PM8607 is not set
1116# CONFIG_AB4500_CORE is not set
1117CONFIG_REGULATOR=y
1118CONFIG_REGULATOR_DEBUG=y
1119# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1120CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
1121CONFIG_REGULATOR_USERSPACE_CONSUMER=y
1122# CONFIG_REGULATOR_BQ24022 is not set
1123# CONFIG_REGULATOR_MAX1586 is not set
1124# CONFIG_REGULATOR_MAX8660 is not set
1125CONFIG_REGULATOR_DA903X=y
1126# CONFIG_REGULATOR_LP3971 is not set
1127# CONFIG_REGULATOR_TPS65023 is not set
1128# CONFIG_REGULATOR_TPS6507X is not set
1129CONFIG_MEDIA_SUPPORT=y
1130
1131#
1132# Multimedia core support
1133#
1134CONFIG_VIDEO_DEV=y
1135CONFIG_VIDEO_V4L2_COMMON=y
1136CONFIG_VIDEO_ALLOW_V4L1=y
1137CONFIG_VIDEO_V4L1_COMPAT=y
1138# CONFIG_DVB_CORE is not set
1139CONFIG_VIDEO_MEDIA=y
1140
1141#
1142# Multimedia drivers
1143#
1144CONFIG_IR_CORE=y
1145CONFIG_VIDEO_IR=y
1146# CONFIG_MEDIA_ATTACH is not set
1147CONFIG_MEDIA_TUNER=y
1148CONFIG_MEDIA_TUNER_CUSTOMISE=y
1149# CONFIG_MEDIA_TUNER_SIMPLE is not set
1150# CONFIG_MEDIA_TUNER_TDA8290 is not set
1151# CONFIG_MEDIA_TUNER_TDA827X is not set
1152# CONFIG_MEDIA_TUNER_TDA18271 is not set
1153# CONFIG_MEDIA_TUNER_TDA9887 is not set
1154# CONFIG_MEDIA_TUNER_TEA5761 is not set
1155# CONFIG_MEDIA_TUNER_TEA5767 is not set
1156# CONFIG_MEDIA_TUNER_MT20XX is not set
1157# CONFIG_MEDIA_TUNER_MT2060 is not set
1158# CONFIG_MEDIA_TUNER_MT2266 is not set
1159# CONFIG_MEDIA_TUNER_MT2131 is not set
1160# CONFIG_MEDIA_TUNER_QT1010 is not set
1161# CONFIG_MEDIA_TUNER_XC2028 is not set
1162# CONFIG_MEDIA_TUNER_XC5000 is not set
1163# CONFIG_MEDIA_TUNER_MXL5005S is not set
1164# CONFIG_MEDIA_TUNER_MXL5007T is not set
1165# CONFIG_MEDIA_TUNER_MC44S803 is not set
1166CONFIG_MEDIA_TUNER_MAX2165=m
1167CONFIG_VIDEO_V4L2=y
1168CONFIG_VIDEO_V4L1=y
1169CONFIG_VIDEOBUF_GEN=y
1170CONFIG_VIDEOBUF_DMA_SG=y
1171CONFIG_VIDEO_CAPTURE_DRIVERS=y
1172# CONFIG_VIDEO_ADV_DEBUG is not set
1173# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
1174# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
1175CONFIG_VIDEO_IR_I2C=y
1176
1177#
1178# Encoders/decoders and other helper chips
1179#
1180
1181#
1182# Audio decoders
1183#
1184# CONFIG_VIDEO_TVAUDIO is not set
1185# CONFIG_VIDEO_TDA7432 is not set
1186# CONFIG_VIDEO_TDA9840 is not set
1187# CONFIG_VIDEO_TDA9875 is not set
1188# CONFIG_VIDEO_TEA6415C is not set
1189# CONFIG_VIDEO_TEA6420 is not set
1190# CONFIG_VIDEO_MSP3400 is not set
1191# CONFIG_VIDEO_CS5345 is not set
1192# CONFIG_VIDEO_CS53L32A is not set
1193# CONFIG_VIDEO_M52790 is not set
1194# CONFIG_VIDEO_TLV320AIC23B is not set
1195# CONFIG_VIDEO_WM8775 is not set
1196# CONFIG_VIDEO_WM8739 is not set
1197# CONFIG_VIDEO_VP27SMPX is not set
1198
1199#
1200# RDS decoders
1201#
1202# CONFIG_VIDEO_SAA6588 is not set
1203
1204#
1205# Video decoders
1206#
1207# CONFIG_VIDEO_ADV7180 is not set
1208# CONFIG_VIDEO_BT819 is not set
1209# CONFIG_VIDEO_BT856 is not set
1210# CONFIG_VIDEO_BT866 is not set
1211# CONFIG_VIDEO_KS0127 is not set
1212# CONFIG_VIDEO_OV7670 is not set
1213# CONFIG_VIDEO_MT9V011 is not set
1214# CONFIG_VIDEO_TCM825X is not set
1215# CONFIG_VIDEO_SAA7110 is not set
1216# CONFIG_VIDEO_SAA711X is not set
1217# CONFIG_VIDEO_SAA717X is not set
1218# CONFIG_VIDEO_SAA7191 is not set
1219# CONFIG_VIDEO_TVP514X is not set
1220# CONFIG_VIDEO_TVP5150 is not set
1221# CONFIG_VIDEO_VPX3220 is not set
1222
1223#
1224# Video and audio decoders
1225#
1226# CONFIG_VIDEO_CX25840 is not set
1227
1228#
1229# MPEG video encoders
1230#
1231# CONFIG_VIDEO_CX2341X is not set
1232
1233#
1234# Video encoders
1235#
1236# CONFIG_VIDEO_SAA7127 is not set
1237# CONFIG_VIDEO_SAA7185 is not set
1238# CONFIG_VIDEO_ADV7170 is not set
1239# CONFIG_VIDEO_ADV7175 is not set
1240# CONFIG_VIDEO_THS7303 is not set
1241# CONFIG_VIDEO_ADV7343 is not set
1242
1243#
1244# Video improvement chips
1245#
1246# CONFIG_VIDEO_UPD64031A is not set
1247# CONFIG_VIDEO_UPD64083 is not set
1248# CONFIG_VIDEO_VIVI is not set
1249# CONFIG_VIDEO_CPIA is not set
1250# CONFIG_VIDEO_CPIA2 is not set
1251# CONFIG_VIDEO_SAA5246A is not set
1252# CONFIG_VIDEO_SAA5249 is not set
1253CONFIG_SOC_CAMERA=y
1254# CONFIG_SOC_CAMERA_MT9M001 is not set
1255CONFIG_SOC_CAMERA_MT9M111=y
1256# CONFIG_SOC_CAMERA_MT9T031 is not set
1257# CONFIG_SOC_CAMERA_MT9T112 is not set
1258# CONFIG_SOC_CAMERA_MT9V022 is not set
1259# CONFIG_SOC_CAMERA_RJ54N1 is not set
1260# CONFIG_SOC_CAMERA_TW9910 is not set
1261# CONFIG_SOC_CAMERA_PLATFORM is not set
1262# CONFIG_SOC_CAMERA_OV772X is not set
1263# CONFIG_SOC_CAMERA_OV9640 is not set
1264CONFIG_VIDEO_PXA27x=y
1265# CONFIG_VIDEO_SH_MOBILE_CEU is not set
1266# CONFIG_V4L_USB_DRIVERS is not set
1267CONFIG_RADIO_ADAPTERS=y
1268# CONFIG_I2C_SI4713 is not set
1269# CONFIG_RADIO_SI4713 is not set
1270# CONFIG_USB_DSBR is not set
1271# CONFIG_RADIO_SI470X is not set
1272# CONFIG_USB_MR800 is not set
1273CONFIG_RADIO_TEA5764=y
1274CONFIG_RADIO_TEA5764_XTAL=y
1275# CONFIG_RADIO_TEF6862 is not set
1276# CONFIG_DAB is not set
1277
1278#
1279# Graphics support
1280#
1281# CONFIG_VGASTATE is not set
1282# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1283CONFIG_FB=y
1284# CONFIG_FIRMWARE_EDID is not set
1285# CONFIG_FB_DDC is not set
1286# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1287CONFIG_FB_CFB_FILLRECT=y
1288CONFIG_FB_CFB_COPYAREA=y
1289CONFIG_FB_CFB_IMAGEBLIT=y
1290# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1291# CONFIG_FB_SYS_FILLRECT is not set
1292# CONFIG_FB_SYS_COPYAREA is not set
1293# CONFIG_FB_SYS_IMAGEBLIT is not set
1294# CONFIG_FB_FOREIGN_ENDIAN is not set
1295# CONFIG_FB_SYS_FOPS is not set
1296# CONFIG_FB_SVGALIB is not set
1297# CONFIG_FB_MACMODES is not set
1298# CONFIG_FB_BACKLIGHT is not set
1299# CONFIG_FB_MODE_HELPERS is not set
1300# CONFIG_FB_TILEBLITTING is not set
1301
1302#
1303# Frame buffer hardware drivers
1304#
1305# CONFIG_FB_UVESA is not set
1306# CONFIG_FB_S1D13XXX is not set
1307CONFIG_FB_PXA=y
1308CONFIG_FB_PXA_OVERLAY=y
1309# CONFIG_FB_PXA_SMARTPANEL is not set
1310CONFIG_FB_PXA_PARAMETERS=y
1311# CONFIG_FB_MBX is not set
1312# CONFIG_FB_W100 is not set
1313# CONFIG_FB_VIRTUAL is not set
1314# CONFIG_FB_METRONOME is not set
1315# CONFIG_FB_MB862XX is not set
1316# CONFIG_FB_BROADSHEET is not set
1317CONFIG_BACKLIGHT_LCD_SUPPORT=y
1318# CONFIG_LCD_CLASS_DEVICE is not set
1319CONFIG_BACKLIGHT_CLASS_DEVICE=y
1320CONFIG_BACKLIGHT_GENERIC=y
1321# CONFIG_BACKLIGHT_DA903X is not set
1322
1323#
1324# Display device support
1325#
1326# CONFIG_DISPLAY_SUPPORT is not set
1327
1328#
1329# Console display driver support
1330#
1331# CONFIG_VGA_CONSOLE is not set
1332CONFIG_DUMMY_CONSOLE=y
1333CONFIG_FRAMEBUFFER_CONSOLE=y
1334# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1335# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1336CONFIG_FONTS=y
1337# CONFIG_FONT_8x8 is not set
1338# CONFIG_FONT_8x16 is not set
1339# CONFIG_FONT_6x11 is not set
1340# CONFIG_FONT_7x14 is not set
1341# CONFIG_FONT_PEARL_8x8 is not set
1342# CONFIG_FONT_ACORN_8x8 is not set
1343CONFIG_FONT_MINI_4x6=y
1344# CONFIG_FONT_SUN8x16 is not set
1345# CONFIG_FONT_SUN12x22 is not set
1346# CONFIG_FONT_10x18 is not set
1347# CONFIG_LOGO is not set
1348CONFIG_SOUND=y
1349CONFIG_SOUND_OSS_CORE=y
1350CONFIG_SOUND_OSS_CORE_PRECLAIM=y
1351CONFIG_SND=y
1352CONFIG_SND_TIMER=y
1353CONFIG_SND_PCM=y
1354CONFIG_SND_JACK=y
1355# CONFIG_SND_SEQUENCER is not set
1356CONFIG_SND_OSSEMUL=y
1357CONFIG_SND_MIXER_OSS=y
1358CONFIG_SND_PCM_OSS=y
1359CONFIG_SND_PCM_OSS_PLUGINS=y
1360# CONFIG_SND_HRTIMER is not set
1361# CONFIG_SND_DYNAMIC_MINORS is not set
1362CONFIG_SND_SUPPORT_OLD_API=y
1363CONFIG_SND_VERBOSE_PROCFS=y
1364# CONFIG_SND_VERBOSE_PRINTK is not set
1365# CONFIG_SND_DEBUG is not set
1366# CONFIG_SND_RAWMIDI_SEQ is not set
1367# CONFIG_SND_OPL3_LIB_SEQ is not set
1368# CONFIG_SND_OPL4_LIB_SEQ is not set
1369# CONFIG_SND_SBAWE_SEQ is not set
1370# CONFIG_SND_EMU10K1_SEQ is not set
1371# CONFIG_SND_DRIVERS is not set
1372# CONFIG_SND_ARM is not set
1373CONFIG_SND_PXA2XX_LIB=y
1374# CONFIG_SND_SPI is not set
1375# CONFIG_SND_USB is not set
1376CONFIG_SND_SOC=y
1377CONFIG_SND_PXA2XX_SOC=y
1378# CONFIG_SND_PXA2XX_SOC_IMOTE2 is not set
1379CONFIG_SND_SOC_I2C_AND_SPI=y
1380# CONFIG_SND_SOC_ALL_CODECS is not set
1381# CONFIG_SOUND_PRIME is not set
1382CONFIG_HID_SUPPORT=y
1383CONFIG_HID=y
1384# CONFIG_HIDRAW is not set
1385
1386#
1387# USB Input Devices
1388#
1389# CONFIG_USB_HID is not set
1390# CONFIG_HID_PID is not set
1391
1392#
1393# USB HID Boot Protocol drivers
1394#
1395# CONFIG_USB_KBD is not set
1396# CONFIG_USB_MOUSE is not set
1397
1398#
1399# Special HID drivers
1400#
1401CONFIG_HID_APPLE=m
1402# CONFIG_HID_WACOM is not set
1403CONFIG_USB_SUPPORT=y
1404CONFIG_USB_ARCH_HAS_HCD=y
1405CONFIG_USB_ARCH_HAS_OHCI=y
1406# CONFIG_USB_ARCH_HAS_EHCI is not set
1407CONFIG_USB=y
1408# CONFIG_USB_DEBUG is not set
1409# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1410
1411#
1412# Miscellaneous USB options
1413#
1414# CONFIG_USB_DEVICEFS is not set
1415# CONFIG_USB_DEVICE_CLASS is not set
1416# CONFIG_USB_DYNAMIC_MINORS is not set
1417# CONFIG_USB_SUSPEND is not set
1418# CONFIG_USB_OTG is not set
1419# CONFIG_USB_OTG_WHITELIST is not set
1420# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1421# CONFIG_USB_MON is not set
1422# CONFIG_USB_WUSB is not set
1423# CONFIG_USB_WUSB_CBAF is not set
1424
1425#
1426# USB Host Controller Drivers
1427#
1428# CONFIG_USB_C67X00_HCD is not set
1429# CONFIG_USB_OXU210HP_HCD is not set
1430# CONFIG_USB_ISP116X_HCD is not set
1431# CONFIG_USB_ISP1760_HCD is not set
1432# CONFIG_USB_ISP1362_HCD is not set
1433CONFIG_USB_OHCI_HCD=y
1434# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1435# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1436CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1437# CONFIG_USB_SL811_HCD is not set
1438# CONFIG_USB_R8A66597_HCD is not set
1439# CONFIG_USB_HWA_HCD is not set
1440# CONFIG_USB_MUSB_HDRC is not set
1441# CONFIG_USB_GADGET_MUSB_HDRC is not set
1442
1443#
1444# USB Device Class drivers
1445#
1446# CONFIG_USB_ACM is not set
1447# CONFIG_USB_PRINTER is not set
1448# CONFIG_USB_WDM is not set
1449# CONFIG_USB_TMC is not set
1450
1451#
1452# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1453#
1454
1455#
1456# also be needed; see USB_STORAGE Help for more info
1457#
1458# CONFIG_USB_LIBUSUAL is not set
1459
1460#
1461# USB Imaging devices
1462#
1463# CONFIG_USB_MDC800 is not set
1464
1465#
1466# USB port drivers
1467#
1468# CONFIG_USB_SERIAL is not set
1469
1470#
1471# USB Miscellaneous drivers
1472#
1473# CONFIG_USB_EMI62 is not set
1474# CONFIG_USB_EMI26 is not set
1475# CONFIG_USB_ADUTUX is not set
1476# CONFIG_USB_SEVSEG is not set
1477# CONFIG_USB_RIO500 is not set
1478# CONFIG_USB_LEGOTOWER is not set
1479# CONFIG_USB_LCD is not set
1480# CONFIG_USB_BERRY_CHARGE is not set
1481# CONFIG_USB_LED is not set
1482# CONFIG_USB_CYPRESS_CY7C63 is not set
1483# CONFIG_USB_CYTHERM is not set
1484# CONFIG_USB_IDMOUSE is not set
1485# CONFIG_USB_FTDI_ELAN is not set
1486# CONFIG_USB_APPLEDISPLAY is not set
1487# CONFIG_USB_LD is not set
1488# CONFIG_USB_TRANCEVIBRATOR is not set
1489# CONFIG_USB_IOWARRIOR is not set
1490# CONFIG_USB_TEST is not set
1491# CONFIG_USB_ISIGHTFW is not set
1492# CONFIG_USB_VST is not set
1493CONFIG_USB_GADGET=y
1494# CONFIG_USB_GADGET_DEBUG is not set
1495# CONFIG_USB_GADGET_DEBUG_FILES is not set
1496# CONFIG_USB_GADGET_DEBUG_FS is not set
1497CONFIG_USB_GADGET_VBUS_DRAW=2
1498CONFIG_USB_GADGET_SELECTED=y
1499# CONFIG_USB_GADGET_AT91 is not set
1500# CONFIG_USB_GADGET_ATMEL_USBA is not set
1501# CONFIG_USB_GADGET_FSL_USB2 is not set
1502# CONFIG_USB_GADGET_LH7A40X is not set
1503# CONFIG_USB_GADGET_OMAP is not set
1504# CONFIG_USB_GADGET_PXA25X is not set
1505# CONFIG_USB_GADGET_R8A66597 is not set
1506CONFIG_USB_GADGET_PXA27X=y
1507CONFIG_USB_PXA27X=y
1508# CONFIG_USB_GADGET_S3C_HSOTG is not set
1509# CONFIG_USB_GADGET_IMX is not set
1510# CONFIG_USB_GADGET_S3C2410 is not set
1511# CONFIG_USB_GADGET_M66592 is not set
1512# CONFIG_USB_GADGET_AMD5536UDC is not set
1513# CONFIG_USB_GADGET_FSL_QE is not set
1514# CONFIG_USB_GADGET_CI13XXX is not set
1515# CONFIG_USB_GADGET_NET2280 is not set
1516# CONFIG_USB_GADGET_GOKU is not set
1517# CONFIG_USB_GADGET_LANGWELL is not set
1518# CONFIG_USB_GADGET_DUMMY_HCD is not set
1519# CONFIG_USB_GADGET_DUALSPEED is not set
1520# CONFIG_USB_ZERO is not set
1521# CONFIG_USB_AUDIO is not set
1522CONFIG_USB_ETH=y
1523# CONFIG_USB_ETH_RNDIS is not set
1524# CONFIG_USB_ETH_EEM is not set
1525# CONFIG_USB_GADGETFS is not set
1526# CONFIG_USB_FILE_STORAGE is not set
1527# CONFIG_USB_MASS_STORAGE is not set
1528# CONFIG_USB_G_SERIAL is not set
1529# CONFIG_USB_MIDI_GADGET is not set
1530# CONFIG_USB_G_PRINTER is not set
1531# CONFIG_USB_CDC_COMPOSITE is not set
1532# CONFIG_USB_G_MULTI is not set
1533
1534#
1535# OTG and related infrastructure
1536#
1537CONFIG_USB_OTG_UTILS=y
1538# CONFIG_USB_GPIO_VBUS is not set
1539# CONFIG_USB_ULPI is not set
1540# CONFIG_NOP_USB_XCEIV is not set
1541CONFIG_MMC=y
1542# CONFIG_MMC_DEBUG is not set
1543CONFIG_MMC_UNSAFE_RESUME=y
1544
1545#
1546# MMC/SD/SDIO Card Drivers
1547#
1548CONFIG_MMC_BLOCK=y
1549CONFIG_MMC_BLOCK_BOUNCE=y
1550CONFIG_SDIO_UART=m
1551# CONFIG_MMC_TEST is not set
1552
1553#
1554# MMC/SD/SDIO Host Controller Drivers
1555#
1556CONFIG_MMC_PXA=y
1557# CONFIG_MMC_SDHCI is not set
1558# CONFIG_MMC_AT91 is not set
1559# CONFIG_MMC_ATMELMCI is not set
1560CONFIG_MMC_SPI=y
1561# CONFIG_MEMSTICK is not set
1562CONFIG_NEW_LEDS=y
1563CONFIG_LEDS_CLASS=y
1564
1565#
1566# LED drivers
1567#
1568# CONFIG_LEDS_PCA9532 is not set
1569# CONFIG_LEDS_GPIO is not set
1570CONFIG_LEDS_LP3944=y
1571# CONFIG_LEDS_PCA955X is not set
1572# CONFIG_LEDS_DA903X is not set
1573# CONFIG_LEDS_DAC124S085 is not set
1574# CONFIG_LEDS_REGULATOR is not set
1575# CONFIG_LEDS_BD2802 is not set
1576# CONFIG_LEDS_LT3593 is not set
1577
1578#
1579# LED Triggers
1580#
1581CONFIG_LEDS_TRIGGERS=y
1582CONFIG_LEDS_TRIGGER_TIMER=y
1583CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1584CONFIG_LEDS_TRIGGER_BACKLIGHT=y
1585CONFIG_LEDS_TRIGGER_GPIO=y
1586CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
1587
1588#
1589# iptables trigger is under Netfilter config (LED target)
1590#
1591# CONFIG_ACCESSIBILITY is not set
1592CONFIG_RTC_LIB=y
1593CONFIG_RTC_CLASS=y
1594CONFIG_RTC_HCTOSYS=y
1595CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1596# CONFIG_RTC_DEBUG is not set
1597
1598#
1599# RTC interfaces
1600#
1601CONFIG_RTC_INTF_SYSFS=y
1602CONFIG_RTC_INTF_PROC=y
1603CONFIG_RTC_INTF_DEV=y
1604# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1605# CONFIG_RTC_DRV_TEST is not set
1606
1607#
1608# I2C RTC drivers
1609#
1610# CONFIG_RTC_DRV_DS1307 is not set
1611# CONFIG_RTC_DRV_DS1374 is not set
1612# CONFIG_RTC_DRV_DS1672 is not set
1613# CONFIG_RTC_DRV_MAX6900 is not set
1614# CONFIG_RTC_DRV_RS5C372 is not set
1615# CONFIG_RTC_DRV_ISL1208 is not set
1616# CONFIG_RTC_DRV_X1205 is not set
1617# CONFIG_RTC_DRV_PCF8563 is not set
1618# CONFIG_RTC_DRV_PCF8583 is not set
1619# CONFIG_RTC_DRV_M41T80 is not set
1620# CONFIG_RTC_DRV_BQ32K is not set
1621# CONFIG_RTC_DRV_S35390A is not set
1622# CONFIG_RTC_DRV_FM3130 is not set
1623# CONFIG_RTC_DRV_RX8581 is not set
1624# CONFIG_RTC_DRV_RX8025 is not set
1625
1626#
1627# SPI RTC drivers
1628#
1629# CONFIG_RTC_DRV_M41T94 is not set
1630# CONFIG_RTC_DRV_DS1305 is not set
1631# CONFIG_RTC_DRV_DS1390 is not set
1632# CONFIG_RTC_DRV_MAX6902 is not set
1633# CONFIG_RTC_DRV_R9701 is not set
1634# CONFIG_RTC_DRV_RS5C348 is not set
1635# CONFIG_RTC_DRV_DS3234 is not set
1636# CONFIG_RTC_DRV_PCF2123 is not set
1637
1638#
1639# Platform RTC drivers
1640#
1641# CONFIG_RTC_DRV_CMOS is not set
1642# CONFIG_RTC_DRV_DS1286 is not set
1643# CONFIG_RTC_DRV_DS1511 is not set
1644# CONFIG_RTC_DRV_DS1553 is not set
1645# CONFIG_RTC_DRV_DS1742 is not set
1646# CONFIG_RTC_DRV_STK17TA8 is not set
1647# CONFIG_RTC_DRV_M48T86 is not set
1648# CONFIG_RTC_DRV_M48T35 is not set
1649# CONFIG_RTC_DRV_M48T59 is not set
1650# CONFIG_RTC_DRV_MSM6242 is not set
1651# CONFIG_RTC_DRV_BQ4802 is not set
1652# CONFIG_RTC_DRV_RP5C01 is not set
1653# CONFIG_RTC_DRV_V3020 is not set
1654
1655#
1656# on-CPU RTC drivers
1657#
1658# CONFIG_RTC_DRV_SA1100 is not set
1659# CONFIG_RTC_DRV_PXA is not set
1660# CONFIG_DMADEVICES is not set
1661# CONFIG_AUXDISPLAY is not set
1662# CONFIG_UIO is not set
1663
1664#
1665# TI VLYNQ
1666#
1667# CONFIG_STAGING is not set
1668
1669#
1670# File systems
1671#
1672CONFIG_EXT2_FS=y
1673# CONFIG_EXT2_FS_XATTR is not set
1674# CONFIG_EXT2_FS_XIP is not set
1675CONFIG_EXT3_FS=m
1676# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1677CONFIG_EXT3_FS_XATTR=y
1678# CONFIG_EXT3_FS_POSIX_ACL is not set
1679# CONFIG_EXT3_FS_SECURITY is not set
1680# CONFIG_EXT4_FS is not set
1681CONFIG_JBD=m
1682# CONFIG_JBD_DEBUG is not set
1683CONFIG_FS_MBCACHE=m
1684CONFIG_REISERFS_FS=m
1685# CONFIG_REISERFS_CHECK is not set
1686# CONFIG_REISERFS_PROC_INFO is not set
1687CONFIG_REISERFS_FS_XATTR=y
1688CONFIG_REISERFS_FS_POSIX_ACL=y
1689CONFIG_REISERFS_FS_SECURITY=y
1690# CONFIG_JFS_FS is not set
1691CONFIG_FS_POSIX_ACL=y
1692CONFIG_XFS_FS=m
1693# CONFIG_XFS_QUOTA is not set
1694# CONFIG_XFS_POSIX_ACL is not set
1695# CONFIG_XFS_RT is not set
1696# CONFIG_XFS_DEBUG is not set
1697# CONFIG_OCFS2_FS is not set
1698# CONFIG_BTRFS_FS is not set
1699# CONFIG_NILFS2_FS is not set
1700CONFIG_FILE_LOCKING=y
1701CONFIG_FSNOTIFY=y
1702CONFIG_DNOTIFY=y
1703CONFIG_INOTIFY=y
1704CONFIG_INOTIFY_USER=y
1705# CONFIG_QUOTA is not set
1706CONFIG_AUTOFS_FS=y
1707CONFIG_AUTOFS4_FS=y
1708CONFIG_FUSE_FS=m
1709CONFIG_CUSE=m
1710
1711#
1712# Caches
1713#
1714# CONFIG_FSCACHE is not set
1715
1716#
1717# CD-ROM/DVD Filesystems
1718#
1719CONFIG_ISO9660_FS=m
1720CONFIG_JOLIET=y
1721CONFIG_ZISOFS=y
1722# CONFIG_UDF_FS is not set
1723
1724#
1725# DOS/FAT/NT Filesystems
1726#
1727CONFIG_FAT_FS=m
1728CONFIG_MSDOS_FS=m
1729CONFIG_VFAT_FS=m
1730CONFIG_FAT_DEFAULT_CODEPAGE=437
1731CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1732# CONFIG_NTFS_FS is not set
1733
1734#
1735# Pseudo filesystems
1736#
1737CONFIG_PROC_FS=y
1738CONFIG_PROC_SYSCTL=y
1739CONFIG_PROC_PAGE_MONITOR=y
1740CONFIG_SYSFS=y
1741CONFIG_TMPFS=y
1742# CONFIG_TMPFS_POSIX_ACL is not set
1743# CONFIG_HUGETLB_PAGE is not set
1744# CONFIG_CONFIGFS_FS is not set
1745CONFIG_MISC_FILESYSTEMS=y
1746# CONFIG_ADFS_FS is not set
1747# CONFIG_AFFS_FS is not set
1748# CONFIG_HFS_FS is not set
1749# CONFIG_HFSPLUS_FS is not set
1750# CONFIG_BEFS_FS is not set
1751# CONFIG_BFS_FS is not set
1752# CONFIG_EFS_FS is not set
1753CONFIG_JFFS2_FS=m
1754CONFIG_JFFS2_FS_DEBUG=0
1755CONFIG_JFFS2_FS_WRITEBUFFER=y
1756# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1757# CONFIG_JFFS2_SUMMARY is not set
1758# CONFIG_JFFS2_FS_XATTR is not set
1759CONFIG_JFFS2_COMPRESSION_OPTIONS=y
1760CONFIG_JFFS2_ZLIB=y
1761CONFIG_JFFS2_LZO=y
1762CONFIG_JFFS2_RTIME=y
1763CONFIG_JFFS2_RUBIN=y
1764# CONFIG_JFFS2_CMODE_NONE is not set
1765CONFIG_JFFS2_CMODE_PRIORITY=y
1766# CONFIG_JFFS2_CMODE_SIZE is not set
1767# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
1768CONFIG_CRAMFS=m
1769CONFIG_SQUASHFS=m
1770# CONFIG_SQUASHFS_EMBEDDED is not set
1771CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
1772# CONFIG_VXFS_FS is not set
1773# CONFIG_MINIX_FS is not set
1774# CONFIG_OMFS_FS is not set
1775# CONFIG_HPFS_FS is not set
1776# CONFIG_QNX4FS_FS is not set
1777CONFIG_ROMFS_FS=m
1778CONFIG_ROMFS_BACKED_BY_BLOCK=y
1779# CONFIG_ROMFS_BACKED_BY_MTD is not set
1780# CONFIG_ROMFS_BACKED_BY_BOTH is not set
1781CONFIG_ROMFS_ON_BLOCK=y
1782# CONFIG_SYSV_FS is not set
1783# CONFIG_UFS_FS is not set
1784CONFIG_NETWORK_FILESYSTEMS=y
1785CONFIG_NFS_FS=y
1786CONFIG_NFS_V3=y
1787CONFIG_NFS_V3_ACL=y
1788# CONFIG_NFS_V4 is not set
1789# CONFIG_ROOT_NFS is not set
1790CONFIG_NFSD=m
1791CONFIG_NFSD_V2_ACL=y
1792CONFIG_NFSD_V3=y
1793CONFIG_NFSD_V3_ACL=y
1794# CONFIG_NFSD_V4 is not set
1795CONFIG_LOCKD=y
1796CONFIG_LOCKD_V4=y
1797CONFIG_EXPORTFS=m
1798CONFIG_NFS_ACL_SUPPORT=y
1799CONFIG_NFS_COMMON=y
1800CONFIG_SUNRPC=y
1801# CONFIG_RPCSEC_GSS_KRB5 is not set
1802# CONFIG_RPCSEC_GSS_SPKM3 is not set
1803CONFIG_SMB_FS=m
1804# CONFIG_SMB_NLS_DEFAULT is not set
1805CONFIG_CIFS=m
1806CONFIG_CIFS_STATS=y
1807# CONFIG_CIFS_STATS2 is not set
1808CONFIG_CIFS_WEAK_PW_HASH=y
1809CONFIG_CIFS_XATTR=y
1810CONFIG_CIFS_POSIX=y
1811# CONFIG_CIFS_DEBUG2 is not set
1812# CONFIG_CIFS_EXPERIMENTAL is not set
1813# CONFIG_NCP_FS is not set
1814# CONFIG_CODA_FS is not set
1815# CONFIG_AFS_FS is not set
1816
1817#
1818# Partition Types
1819#
1820# CONFIG_PARTITION_ADVANCED is not set
1821CONFIG_MSDOS_PARTITION=y
1822CONFIG_NLS=y
1823CONFIG_NLS_DEFAULT="iso8859-1"
1824CONFIG_NLS_CODEPAGE_437=m
1825CONFIG_NLS_CODEPAGE_737=m
1826CONFIG_NLS_CODEPAGE_775=m
1827CONFIG_NLS_CODEPAGE_850=m
1828CONFIG_NLS_CODEPAGE_852=m
1829CONFIG_NLS_CODEPAGE_855=m
1830CONFIG_NLS_CODEPAGE_857=m
1831CONFIG_NLS_CODEPAGE_860=m
1832CONFIG_NLS_CODEPAGE_861=m
1833CONFIG_NLS_CODEPAGE_862=m
1834CONFIG_NLS_CODEPAGE_863=m
1835CONFIG_NLS_CODEPAGE_864=m
1836CONFIG_NLS_CODEPAGE_865=m
1837CONFIG_NLS_CODEPAGE_866=m
1838CONFIG_NLS_CODEPAGE_869=m
1839CONFIG_NLS_CODEPAGE_936=m
1840CONFIG_NLS_CODEPAGE_950=m
1841CONFIG_NLS_CODEPAGE_932=m
1842CONFIG_NLS_CODEPAGE_949=m
1843CONFIG_NLS_CODEPAGE_874=m
1844CONFIG_NLS_ISO8859_8=m
1845CONFIG_NLS_CODEPAGE_1250=m
1846CONFIG_NLS_CODEPAGE_1251=m
1847CONFIG_NLS_ASCII=m
1848CONFIG_NLS_ISO8859_1=m
1849CONFIG_NLS_ISO8859_2=m
1850CONFIG_NLS_ISO8859_3=m
1851CONFIG_NLS_ISO8859_4=m
1852CONFIG_NLS_ISO8859_5=m
1853CONFIG_NLS_ISO8859_6=m
1854CONFIG_NLS_ISO8859_7=m
1855CONFIG_NLS_ISO8859_9=m
1856CONFIG_NLS_ISO8859_13=m
1857CONFIG_NLS_ISO8859_14=m
1858CONFIG_NLS_ISO8859_15=m
1859CONFIG_NLS_KOI8_R=m
1860CONFIG_NLS_KOI8_U=m
1861CONFIG_NLS_UTF8=m
1862# CONFIG_DLM is not set
1863
1864#
1865# Kernel hacking
1866#
1867CONFIG_PRINTK_TIME=y
1868CONFIG_ENABLE_WARN_DEPRECATED=y
1869CONFIG_ENABLE_MUST_CHECK=y
1870CONFIG_FRAME_WARN=1024
1871# CONFIG_MAGIC_SYSRQ is not set
1872# CONFIG_STRIP_ASM_SYMS is not set
1873# CONFIG_UNUSED_SYMBOLS is not set
1874CONFIG_DEBUG_FS=y
1875# CONFIG_HEADERS_CHECK is not set
1876CONFIG_DEBUG_KERNEL=y
1877# CONFIG_DEBUG_SHIRQ is not set
1878CONFIG_DETECT_SOFTLOCKUP=y
1879# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1880CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1881CONFIG_DETECT_HUNG_TASK=y
1882# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1883CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1884# CONFIG_SCHED_DEBUG is not set
1885# CONFIG_SCHEDSTATS is not set
1886# CONFIG_TIMER_STATS is not set
1887# CONFIG_DEBUG_OBJECTS is not set
1888# CONFIG_DEBUG_SLAB is not set
1889# CONFIG_DEBUG_KMEMLEAK is not set
1890CONFIG_DEBUG_PREEMPT=y
1891CONFIG_DEBUG_RT_MUTEXES=y
1892CONFIG_DEBUG_PI_LIST=y
1893# CONFIG_RT_MUTEX_TESTER is not set
1894CONFIG_DEBUG_SPINLOCK=y
1895CONFIG_DEBUG_MUTEXES=y
1896CONFIG_DEBUG_LOCK_ALLOC=y
1897CONFIG_PROVE_LOCKING=y
1898CONFIG_LOCKDEP=y
1899# CONFIG_LOCK_STAT is not set
1900# CONFIG_DEBUG_LOCKDEP is not set
1901CONFIG_TRACE_IRQFLAGS=y
1902# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1903# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1904CONFIG_STACKTRACE=y
1905# CONFIG_DEBUG_KOBJECT is not set
1906CONFIG_DEBUG_BUGVERBOSE=y
1907# CONFIG_DEBUG_INFO is not set
1908# CONFIG_DEBUG_VM is not set
1909# CONFIG_DEBUG_WRITECOUNT is not set
1910# CONFIG_DEBUG_MEMORY_INIT is not set
1911# CONFIG_DEBUG_LIST is not set
1912# CONFIG_DEBUG_SG is not set
1913# CONFIG_DEBUG_NOTIFIERS is not set
1914# CONFIG_DEBUG_CREDENTIALS is not set
1915# CONFIG_BOOT_PRINTK_DELAY is not set
1916# CONFIG_RCU_TORTURE_TEST is not set
1917# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1918# CONFIG_BACKTRACE_SELF_TEST is not set
1919# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1920# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1921# CONFIG_FAULT_INJECTION is not set
1922# CONFIG_LATENCYTOP is not set
1923# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1924# CONFIG_PAGE_POISONING is not set
1925CONFIG_HAVE_FUNCTION_TRACER=y
1926CONFIG_TRACING_SUPPORT=y
1927# CONFIG_FTRACE is not set
1928# CONFIG_DYNAMIC_DEBUG is not set
1929# CONFIG_SAMPLES is not set
1930CONFIG_HAVE_ARCH_KGDB=y
1931# CONFIG_KGDB is not set
1932CONFIG_ARM_UNWIND=y
1933CONFIG_DEBUG_USER=y
1934CONFIG_DEBUG_ERRORS=y
1935# CONFIG_DEBUG_STACK_USAGE is not set
1936# CONFIG_DEBUG_LL is not set
1937# CONFIG_OC_ETM is not set
1938
1939#
1940# Security options
1941#
1942# CONFIG_KEYS is not set
1943# CONFIG_SECURITY is not set
1944# CONFIG_SECURITYFS is not set
1945# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1946# CONFIG_DEFAULT_SECURITY_SMACK is not set
1947# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1948CONFIG_DEFAULT_SECURITY_DAC=y
1949CONFIG_DEFAULT_SECURITY=""
1950CONFIG_CRYPTO=y
1951
1952#
1953# Crypto core or helper
1954#
1955CONFIG_CRYPTO_ALGAPI=m
1956CONFIG_CRYPTO_ALGAPI2=m
1957CONFIG_CRYPTO_AEAD=m
1958CONFIG_CRYPTO_AEAD2=m
1959CONFIG_CRYPTO_BLKCIPHER=m
1960CONFIG_CRYPTO_BLKCIPHER2=m
1961CONFIG_CRYPTO_HASH=m
1962CONFIG_CRYPTO_HASH2=m
1963CONFIG_CRYPTO_RNG2=m
1964CONFIG_CRYPTO_PCOMP=m
1965CONFIG_CRYPTO_MANAGER=m
1966CONFIG_CRYPTO_MANAGER2=m
1967CONFIG_CRYPTO_GF128MUL=m
1968CONFIG_CRYPTO_NULL=m
1969CONFIG_CRYPTO_WORKQUEUE=m
1970CONFIG_CRYPTO_CRYPTD=m
1971CONFIG_CRYPTO_AUTHENC=m
1972CONFIG_CRYPTO_TEST=m
1973
1974#
1975# Authenticated Encryption with Associated Data
1976#
1977# CONFIG_CRYPTO_CCM is not set
1978# CONFIG_CRYPTO_GCM is not set
1979# CONFIG_CRYPTO_SEQIV is not set
1980
1981#
1982# Block modes
1983#
1984CONFIG_CRYPTO_CBC=m
1985# CONFIG_CRYPTO_CTR is not set
1986# CONFIG_CRYPTO_CTS is not set
1987CONFIG_CRYPTO_ECB=m
1988CONFIG_CRYPTO_LRW=m
1989CONFIG_CRYPTO_PCBC=m
1990CONFIG_CRYPTO_XTS=m
1991
1992#
1993# Hash modes
1994#
1995CONFIG_CRYPTO_HMAC=m
1996CONFIG_CRYPTO_XCBC=m
1997CONFIG_CRYPTO_VMAC=m
1998
1999#
2000# Digest
2001#
2002CONFIG_CRYPTO_CRC32C=m
2003CONFIG_CRYPTO_GHASH=m
2004CONFIG_CRYPTO_MD4=m
2005CONFIG_CRYPTO_MD5=m
2006CONFIG_CRYPTO_MICHAEL_MIC=m
2007# CONFIG_CRYPTO_RMD128 is not set
2008# CONFIG_CRYPTO_RMD160 is not set
2009# CONFIG_CRYPTO_RMD256 is not set
2010# CONFIG_CRYPTO_RMD320 is not set
2011CONFIG_CRYPTO_SHA1=m
2012CONFIG_CRYPTO_SHA256=m
2013CONFIG_CRYPTO_SHA512=m
2014CONFIG_CRYPTO_TGR192=m
2015# CONFIG_CRYPTO_WP512 is not set
2016
2017#
2018# Ciphers
2019#
2020CONFIG_CRYPTO_AES=m
2021# CONFIG_CRYPTO_ANUBIS is not set
2022CONFIG_CRYPTO_ARC4=m
2023CONFIG_CRYPTO_BLOWFISH=m
2024# CONFIG_CRYPTO_CAMELLIA is not set
2025CONFIG_CRYPTO_CAST5=m
2026CONFIG_CRYPTO_CAST6=m
2027CONFIG_CRYPTO_DES=m
2028CONFIG_CRYPTO_FCRYPT=m
2029CONFIG_CRYPTO_KHAZAD=m
2030# CONFIG_CRYPTO_SALSA20 is not set
2031CONFIG_CRYPTO_SEED=m
2032CONFIG_CRYPTO_SERPENT=m
2033CONFIG_CRYPTO_TEA=m
2034CONFIG_CRYPTO_TWOFISH=m
2035CONFIG_CRYPTO_TWOFISH_COMMON=m
2036
2037#
2038# Compression
2039#
2040CONFIG_CRYPTO_DEFLATE=m
2041# CONFIG_CRYPTO_ZLIB is not set
2042# CONFIG_CRYPTO_LZO is not set
2043
2044#
2045# Random Number Generation
2046#
2047# CONFIG_CRYPTO_ANSI_CPRNG is not set
2048CONFIG_CRYPTO_HW=y
2049# CONFIG_BINARY_PRINTF is not set
2050
2051#
2052# Library routines
2053#
2054CONFIG_BITREVERSE=y
2055CONFIG_GENERIC_FIND_LAST_BIT=y
2056CONFIG_CRC_CCITT=m
2057CONFIG_CRC16=y
2058# CONFIG_CRC_T10DIF is not set
2059CONFIG_CRC_ITU_T=y
2060CONFIG_CRC32=y
2061CONFIG_CRC7=y
2062CONFIG_LIBCRC32C=m
2063CONFIG_ZLIB_INFLATE=y
2064CONFIG_ZLIB_DEFLATE=m
2065CONFIG_LZO_COMPRESS=m
2066CONFIG_LZO_DECOMPRESS=m
2067CONFIG_DECOMPRESS_GZIP=y
2068CONFIG_DECOMPRESS_BZIP2=y
2069CONFIG_DECOMPRESS_LZMA=y
2070CONFIG_TEXTSEARCH=y
2071CONFIG_TEXTSEARCH_KMP=m
2072CONFIG_TEXTSEARCH_BM=m
2073CONFIG_TEXTSEARCH_FSM=m
2074CONFIG_HAS_IOMEM=y
2075CONFIG_HAS_IOPORT=y
2076CONFIG_HAS_DMA=y
2077CONFIG_NLATTR=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 5fc44c94b0ad..4611d3ce451a 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32-rc6 3# Linux kernel version: 2.6.33-rc6
4# Sat Nov 7 20:31:18 2009 4# Thu Feb 4 23:08:54 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -32,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32 32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION="" 33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y 34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
35CONFIG_SWAP=y 41CONFIG_SWAP=y
36CONFIG_SYSVIPC=y 42CONFIG_SYSVIPC=y
37CONFIG_SYSVIPC_SYSCTL=y 43CONFIG_SYSVIPC_SYSCTL=y
@@ -45,6 +51,7 @@ CONFIG_SYSVIPC_SYSCTL=y
45# 51#
46CONFIG_TREE_RCU=y 52CONFIG_TREE_RCU=y
47# CONFIG_TREE_PREEMPT_RCU is not set 53# CONFIG_TREE_PREEMPT_RCU is not set
54# CONFIG_TINY_RCU is not set
48# CONFIG_RCU_TRACE is not set 55# CONFIG_RCU_TRACE is not set
49CONFIG_RCU_FANOUT=32 56CONFIG_RCU_FANOUT=32
50# CONFIG_RCU_FANOUT_EXACT is not set 57# CONFIG_RCU_FANOUT_EXACT is not set
@@ -127,14 +134,41 @@ CONFIG_LBDAF=y
127# IO Schedulers 134# IO Schedulers
128# 135#
129CONFIG_IOSCHED_NOOP=y 136CONFIG_IOSCHED_NOOP=y
130CONFIG_IOSCHED_AS=y
131CONFIG_IOSCHED_DEADLINE=y 137CONFIG_IOSCHED_DEADLINE=y
132CONFIG_IOSCHED_CFQ=y 138CONFIG_IOSCHED_CFQ=y
133# CONFIG_DEFAULT_AS is not set
134# CONFIG_DEFAULT_DEADLINE is not set 139# CONFIG_DEFAULT_DEADLINE is not set
135CONFIG_DEFAULT_CFQ=y 140CONFIG_DEFAULT_CFQ=y
136# CONFIG_DEFAULT_NOOP is not set 141# CONFIG_DEFAULT_NOOP is not set
137CONFIG_DEFAULT_IOSCHED="cfq" 142CONFIG_DEFAULT_IOSCHED="cfq"
143# CONFIG_INLINE_SPIN_TRYLOCK is not set
144# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
145# CONFIG_INLINE_SPIN_LOCK is not set
146# CONFIG_INLINE_SPIN_LOCK_BH is not set
147# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
149# CONFIG_INLINE_SPIN_UNLOCK is not set
150# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
151# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
152# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
153# CONFIG_INLINE_READ_TRYLOCK is not set
154# CONFIG_INLINE_READ_LOCK is not set
155# CONFIG_INLINE_READ_LOCK_BH is not set
156# CONFIG_INLINE_READ_LOCK_IRQ is not set
157# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
158# CONFIG_INLINE_READ_UNLOCK is not set
159# CONFIG_INLINE_READ_UNLOCK_BH is not set
160# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
161# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
162# CONFIG_INLINE_WRITE_TRYLOCK is not set
163# CONFIG_INLINE_WRITE_LOCK is not set
164# CONFIG_INLINE_WRITE_LOCK_BH is not set
165# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
167# CONFIG_INLINE_WRITE_UNLOCK is not set
168# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
169# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
170# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
171# CONFIG_MUTEX_SPIN_ON_OWNER is not set
138# CONFIG_FREEZER is not set 172# CONFIG_FREEZER is not set
139 173
140# 174#
@@ -163,6 +197,7 @@ CONFIG_MMU=y
163# CONFIG_ARCH_IXP2000 is not set 197# CONFIG_ARCH_IXP2000 is not set
164# CONFIG_ARCH_IXP4XX is not set 198# CONFIG_ARCH_IXP4XX is not set
165# CONFIG_ARCH_L7200 is not set 199# CONFIG_ARCH_L7200 is not set
200# CONFIG_ARCH_DOVE is not set
166CONFIG_ARCH_KIRKWOOD=y 201CONFIG_ARCH_KIRKWOOD=y
167# CONFIG_ARCH_LOKI is not set 202# CONFIG_ARCH_LOKI is not set
168# CONFIG_ARCH_MV78XX0 is not set 203# CONFIG_ARCH_MV78XX0 is not set
@@ -185,6 +220,7 @@ CONFIG_ARCH_KIRKWOOD=y
185# CONFIG_ARCH_DAVINCI is not set 220# CONFIG_ARCH_DAVINCI is not set
186# CONFIG_ARCH_OMAP is not set 221# CONFIG_ARCH_OMAP is not set
187# CONFIG_ARCH_BCMRING is not set 222# CONFIG_ARCH_BCMRING is not set
223# CONFIG_ARCH_U8500 is not set
188 224
189# 225#
190# Marvell Kirkwood Implementations 226# Marvell Kirkwood Implementations
@@ -195,7 +231,11 @@ CONFIG_MACH_RD88F6281=y
195CONFIG_MACH_MV88F6281GTW_GE=y 231CONFIG_MACH_MV88F6281GTW_GE=y
196CONFIG_MACH_SHEEVAPLUG=y 232CONFIG_MACH_SHEEVAPLUG=y
197CONFIG_MACH_TS219=y 233CONFIG_MACH_TS219=y
234CONFIG_MACH_TS41X=y
235CONFIG_MACH_OPENRD=y
198CONFIG_MACH_OPENRD_BASE=y 236CONFIG_MACH_OPENRD_BASE=y
237CONFIG_MACH_OPENRD_CLIENT=y
238CONFIG_MACH_NETSPACE_V2=y
199CONFIG_PLAT_ORION=y 239CONFIG_PLAT_ORION=y
200 240
201# 241#
@@ -262,12 +302,10 @@ CONFIG_FLATMEM_MANUAL=y
262CONFIG_FLATMEM=y 302CONFIG_FLATMEM=y
263CONFIG_FLAT_NODE_MEM_MAP=y 303CONFIG_FLAT_NODE_MEM_MAP=y
264CONFIG_PAGEFLAGS_EXTENDED=y 304CONFIG_PAGEFLAGS_EXTENDED=y
265CONFIG_SPLIT_PTLOCK_CPUS=4096 305CONFIG_SPLIT_PTLOCK_CPUS=999999
266# CONFIG_PHYS_ADDR_T_64BIT is not set 306# CONFIG_PHYS_ADDR_T_64BIT is not set
267CONFIG_ZONE_DMA_FLAG=0 307CONFIG_ZONE_DMA_FLAG=0
268CONFIG_VIRT_TO_BUS=y 308CONFIG_VIRT_TO_BUS=y
269CONFIG_HAVE_MLOCK=y
270CONFIG_HAVE_MLOCKED_PAGE_BIT=y
271# CONFIG_KSM is not set 309# CONFIG_KSM is not set
272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 310CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
273CONFIG_ALIGNMENT_TRAP=y 311CONFIG_ALIGNMENT_TRAP=y
@@ -398,15 +436,18 @@ CONFIG_NET_PKTGEN=m
398# CONFIG_BT is not set 436# CONFIG_BT is not set
399# CONFIG_AF_RXRPC is not set 437# CONFIG_AF_RXRPC is not set
400CONFIG_WIRELESS=y 438CONFIG_WIRELESS=y
439CONFIG_WIRELESS_EXT=y
440CONFIG_WEXT_CORE=y
441CONFIG_WEXT_PROC=y
442CONFIG_WEXT_SPY=y
401CONFIG_CFG80211=y 443CONFIG_CFG80211=y
402# CONFIG_NL80211_TESTMODE is not set 444# CONFIG_NL80211_TESTMODE is not set
403# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set 445# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
404# CONFIG_CFG80211_REG_DEBUG is not set 446# CONFIG_CFG80211_REG_DEBUG is not set
405CONFIG_CFG80211_DEFAULT_PS=y 447CONFIG_CFG80211_DEFAULT_PS=y
406CONFIG_CFG80211_DEFAULT_PS_VALUE=1
407# CONFIG_CFG80211_DEBUGFS is not set 448# CONFIG_CFG80211_DEBUGFS is not set
408CONFIG_WIRELESS_OLD_REGULATORY=y 449CONFIG_WIRELESS_OLD_REGULATORY=y
409CONFIG_WIRELESS_EXT=y 450CONFIG_CFG80211_WEXT=y
410CONFIG_WIRELESS_EXT_SYSFS=y 451CONFIG_WIRELESS_EXT_SYSFS=y
411CONFIG_LIB80211=y 452CONFIG_LIB80211=y
412# CONFIG_LIB80211_DEBUG is not set 453# CONFIG_LIB80211_DEBUG is not set
@@ -556,6 +597,10 @@ CONFIG_BLK_DEV=y
556# CONFIG_BLK_DEV_COW_COMMON is not set 597# CONFIG_BLK_DEV_COW_COMMON is not set
557CONFIG_BLK_DEV_LOOP=y 598CONFIG_BLK_DEV_LOOP=y
558# CONFIG_BLK_DEV_CRYPTOLOOP is not set 599# CONFIG_BLK_DEV_CRYPTOLOOP is not set
600
601#
602# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
603#
559# CONFIG_BLK_DEV_NBD is not set 604# CONFIG_BLK_DEV_NBD is not set
560# CONFIG_BLK_DEV_SX8 is not set 605# CONFIG_BLK_DEV_SX8 is not set
561# CONFIG_BLK_DEV_UB is not set 606# CONFIG_BLK_DEV_UB is not set
@@ -606,7 +651,9 @@ CONFIG_SCSI_LOWLEVEL=y
606# CONFIG_SCSI_BNX2_ISCSI is not set 651# CONFIG_SCSI_BNX2_ISCSI is not set
607# CONFIG_BE2ISCSI is not set 652# CONFIG_BE2ISCSI is not set
608# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 653# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
654# CONFIG_SCSI_HPSA is not set
609# CONFIG_SCSI_3W_9XXX is not set 655# CONFIG_SCSI_3W_9XXX is not set
656# CONFIG_SCSI_3W_SAS is not set
610# CONFIG_SCSI_ACARD is not set 657# CONFIG_SCSI_ACARD is not set
611# CONFIG_SCSI_AACRAID is not set 658# CONFIG_SCSI_AACRAID is not set
612# CONFIG_SCSI_AIC7XXX is not set 659# CONFIG_SCSI_AIC7XXX is not set
@@ -642,6 +689,7 @@ CONFIG_SCSI_LOWLEVEL=y
642# CONFIG_SCSI_NSP32 is not set 689# CONFIG_SCSI_NSP32 is not set
643# CONFIG_SCSI_DEBUG is not set 690# CONFIG_SCSI_DEBUG is not set
644# CONFIG_SCSI_PMCRAID is not set 691# CONFIG_SCSI_PMCRAID is not set
692# CONFIG_SCSI_PM8001 is not set
645# CONFIG_SCSI_SRP is not set 693# CONFIG_SCSI_SRP is not set
646# CONFIG_SCSI_BFA_FC is not set 694# CONFIG_SCSI_BFA_FC is not set
647# CONFIG_SCSI_DH is not set 695# CONFIG_SCSI_DH is not set
@@ -696,15 +744,16 @@ CONFIG_SATA_MV=y
696# CONFIG_PATA_NS87415 is not set 744# CONFIG_PATA_NS87415 is not set
697# CONFIG_PATA_OPTI is not set 745# CONFIG_PATA_OPTI is not set
698# CONFIG_PATA_OPTIDMA is not set 746# CONFIG_PATA_OPTIDMA is not set
747# CONFIG_PATA_PDC2027X is not set
699# CONFIG_PATA_PDC_OLD is not set 748# CONFIG_PATA_PDC_OLD is not set
700# CONFIG_PATA_RADISYS is not set 749# CONFIG_PATA_RADISYS is not set
701# CONFIG_PATA_RDC is not set 750# CONFIG_PATA_RDC is not set
702# CONFIG_PATA_RZ1000 is not set 751# CONFIG_PATA_RZ1000 is not set
703# CONFIG_PATA_SC1200 is not set 752# CONFIG_PATA_SC1200 is not set
704# CONFIG_PATA_SERVERWORKS is not set 753# CONFIG_PATA_SERVERWORKS is not set
705# CONFIG_PATA_PDC2027X is not set
706# CONFIG_PATA_SIL680 is not set 754# CONFIG_PATA_SIL680 is not set
707# CONFIG_PATA_SIS is not set 755# CONFIG_PATA_SIS is not set
756# CONFIG_PATA_TOSHIBA is not set
708# CONFIG_PATA_VIA is not set 757# CONFIG_PATA_VIA is not set
709# CONFIG_PATA_WINBOND is not set 758# CONFIG_PATA_WINBOND is not set
710# CONFIG_PATA_SCH is not set 759# CONFIG_PATA_SCH is not set
@@ -720,7 +769,7 @@ CONFIG_SATA_MV=y
720# 769#
721 770
722# 771#
723# See the help texts for more information. 772# The newer stack is recommended.
724# 773#
725# CONFIG_FIREWIRE is not set 774# CONFIG_FIREWIRE is not set
726# CONFIG_IEEE1394 is not set 775# CONFIG_IEEE1394 is not set
@@ -828,13 +877,6 @@ CONFIG_MV643XX_ETH=y
828# CONFIG_NETDEV_10000 is not set 877# CONFIG_NETDEV_10000 is not set
829# CONFIG_TR is not set 878# CONFIG_TR is not set
830CONFIG_WLAN=y 879CONFIG_WLAN=y
831# CONFIG_WLAN_PRE80211 is not set
832CONFIG_WLAN_80211=y
833CONFIG_LIBERTAS=y
834# CONFIG_LIBERTAS_USB is not set
835CONFIG_LIBERTAS_SDIO=y
836# CONFIG_LIBERTAS_SPI is not set
837# CONFIG_LIBERTAS_DEBUG is not set
838# CONFIG_LIBERTAS_THINFIRM is not set 880# CONFIG_LIBERTAS_THINFIRM is not set
839# CONFIG_ATMEL is not set 881# CONFIG_ATMEL is not set
840# CONFIG_AT76C50X_USB is not set 882# CONFIG_AT76C50X_USB is not set
@@ -846,19 +888,24 @@ CONFIG_LIBERTAS_SDIO=y
846# CONFIG_ADM8211 is not set 888# CONFIG_ADM8211 is not set
847# CONFIG_MAC80211_HWSIM is not set 889# CONFIG_MAC80211_HWSIM is not set
848# CONFIG_MWL8K is not set 890# CONFIG_MWL8K is not set
849# CONFIG_P54_COMMON is not set
850# CONFIG_ATH_COMMON is not set 891# CONFIG_ATH_COMMON is not set
892# CONFIG_B43 is not set
893# CONFIG_B43LEGACY is not set
894# CONFIG_HOSTAP is not set
851# CONFIG_IPW2100 is not set 895# CONFIG_IPW2100 is not set
852# CONFIG_IPW2200 is not set 896# CONFIG_IPW2200 is not set
853# CONFIG_IWLWIFI is not set 897# CONFIG_IWLWIFI is not set
854# CONFIG_HOSTAP is not set 898# CONFIG_IWM is not set
855# CONFIG_B43 is not set 899CONFIG_LIBERTAS=y
856# CONFIG_B43LEGACY is not set 900# CONFIG_LIBERTAS_USB is not set
857# CONFIG_ZD1211RW is not set 901CONFIG_LIBERTAS_SDIO=y
858# CONFIG_RT2X00 is not set 902# CONFIG_LIBERTAS_SPI is not set
903# CONFIG_LIBERTAS_DEBUG is not set
859# CONFIG_HERMES is not set 904# CONFIG_HERMES is not set
905# CONFIG_P54_COMMON is not set
906# CONFIG_RT2X00 is not set
860# CONFIG_WL12XX is not set 907# CONFIG_WL12XX is not set
861# CONFIG_IWM is not set 908# CONFIG_ZD1211RW is not set
862 909
863# 910#
864# Enable WiMAX (Networking options) to see the WiMAX drivers 911# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -881,6 +928,7 @@ CONFIG_LIBERTAS_SDIO=y
881# CONFIG_NETCONSOLE is not set 928# CONFIG_NETCONSOLE is not set
882# CONFIG_NETPOLL is not set 929# CONFIG_NETPOLL is not set
883# CONFIG_NET_POLL_CONTROLLER is not set 930# CONFIG_NET_POLL_CONTROLLER is not set
931# CONFIG_VMXNET3 is not set
884# CONFIG_ISDN is not set 932# CONFIG_ISDN is not set
885# CONFIG_PHONE is not set 933# CONFIG_PHONE is not set
886 934
@@ -890,6 +938,7 @@ CONFIG_LIBERTAS_SDIO=y
890CONFIG_INPUT=y 938CONFIG_INPUT=y
891# CONFIG_INPUT_FF_MEMLESS is not set 939# CONFIG_INPUT_FF_MEMLESS is not set
892# CONFIG_INPUT_POLLDEV is not set 940# CONFIG_INPUT_POLLDEV is not set
941# CONFIG_INPUT_SPARSEKMAP is not set
893 942
894# 943#
895# Userland interfaces 944# Userland interfaces
@@ -933,6 +982,7 @@ CONFIG_SERIO_SERPORT=y
933# CONFIG_SERIO_PCIPS2 is not set 982# CONFIG_SERIO_PCIPS2 is not set
934CONFIG_SERIO_LIBPS2=y 983CONFIG_SERIO_LIBPS2=y
935# CONFIG_SERIO_RAW is not set 984# CONFIG_SERIO_RAW is not set
985# CONFIG_SERIO_ALTERA_PS2 is not set
936# CONFIG_GAMEPORT is not set 986# CONFIG_GAMEPORT is not set
937 987
938# 988#
@@ -1019,11 +1069,6 @@ CONFIG_I2C_MV64XXX=y
1019# CONFIG_I2C_TINY_USB is not set 1069# CONFIG_I2C_TINY_USB is not set
1020 1070
1021# 1071#
1022# Graphics adapter I2C/DDC channel drivers
1023#
1024# CONFIG_I2C_VOODOO3 is not set
1025
1026#
1027# Other I2C/SMBus bus drivers 1072# Other I2C/SMBus bus drivers
1028# 1073#
1029# CONFIG_I2C_PCA_PLATFORM is not set 1074# CONFIG_I2C_PCA_PLATFORM is not set
@@ -1032,7 +1077,6 @@ CONFIG_I2C_MV64XXX=y
1032# 1077#
1033# Miscellaneous I2C Chip support 1078# Miscellaneous I2C Chip support
1034# 1079#
1035# CONFIG_DS1682 is not set
1036# CONFIG_SENSORS_TSL2550 is not set 1080# CONFIG_SENSORS_TSL2550 is not set
1037# CONFIG_I2C_DEBUG_CORE is not set 1081# CONFIG_I2C_DEBUG_CORE is not set
1038# CONFIG_I2C_DEBUG_ALGO is not set 1082# CONFIG_I2C_DEBUG_ALGO is not set
@@ -1048,6 +1092,8 @@ CONFIG_SPI_MASTER=y
1048# CONFIG_SPI_BITBANG is not set 1092# CONFIG_SPI_BITBANG is not set
1049# CONFIG_SPI_GPIO is not set 1093# CONFIG_SPI_GPIO is not set
1050CONFIG_SPI_ORION=y 1094CONFIG_SPI_ORION=y
1095# CONFIG_SPI_XILINX is not set
1096# CONFIG_SPI_DESIGNWARE is not set
1051 1097
1052# 1098#
1053# SPI Protocol Masters 1099# SPI Protocol Masters
@@ -1074,10 +1120,12 @@ CONFIG_GPIO_SYSFS=y
1074# CONFIG_GPIO_MAX732X is not set 1120# CONFIG_GPIO_MAX732X is not set
1075# CONFIG_GPIO_PCA953X is not set 1121# CONFIG_GPIO_PCA953X is not set
1076# CONFIG_GPIO_PCF857X is not set 1122# CONFIG_GPIO_PCF857X is not set
1123# CONFIG_GPIO_ADP5588 is not set
1077 1124
1078# 1125#
1079# PCI GPIO expanders: 1126# PCI GPIO expanders:
1080# 1127#
1128# CONFIG_GPIO_CS5535 is not set
1081# CONFIG_GPIO_BT8XX is not set 1129# CONFIG_GPIO_BT8XX is not set
1082# CONFIG_GPIO_LANGWELL is not set 1130# CONFIG_GPIO_LANGWELL is not set
1083 1131
@@ -1116,6 +1164,7 @@ CONFIG_SSB_POSSIBLE=y
1116# CONFIG_MFD_TMIO is not set 1164# CONFIG_MFD_TMIO is not set
1117# CONFIG_MFD_TC6393XB is not set 1165# CONFIG_MFD_TC6393XB is not set
1118# CONFIG_PMIC_DA903X is not set 1166# CONFIG_PMIC_DA903X is not set
1167# CONFIG_PMIC_ADP5520 is not set
1119# CONFIG_MFD_WM8400 is not set 1168# CONFIG_MFD_WM8400 is not set
1120# CONFIG_MFD_WM831X is not set 1169# CONFIG_MFD_WM831X is not set
1121# CONFIG_MFD_WM8350_I2C is not set 1170# CONFIG_MFD_WM8350_I2C is not set
@@ -1123,6 +1172,8 @@ CONFIG_SSB_POSSIBLE=y
1123# CONFIG_MFD_MC13783 is not set 1172# CONFIG_MFD_MC13783 is not set
1124# CONFIG_AB3100_CORE is not set 1173# CONFIG_AB3100_CORE is not set
1125# CONFIG_EZX_PCAP is not set 1174# CONFIG_EZX_PCAP is not set
1175# CONFIG_MFD_88PM8607 is not set
1176# CONFIG_AB4500_CORE is not set
1126# CONFIG_REGULATOR is not set 1177# CONFIG_REGULATOR is not set
1127# CONFIG_MEDIA_SUPPORT is not set 1178# CONFIG_MEDIA_SUPPORT is not set
1128 1179
@@ -1305,6 +1356,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
1305# OTG and related infrastructure 1356# OTG and related infrastructure
1306# 1357#
1307# CONFIG_USB_GPIO_VBUS is not set 1358# CONFIG_USB_GPIO_VBUS is not set
1359# CONFIG_USB_ULPI is not set
1308# CONFIG_NOP_USB_XCEIV is not set 1360# CONFIG_NOP_USB_XCEIV is not set
1309# CONFIG_UWB is not set 1361# CONFIG_UWB is not set
1310CONFIG_MMC=y 1362CONFIG_MMC=y
@@ -1344,6 +1396,7 @@ CONFIG_LEDS_GPIO_PLATFORM=y
1344# CONFIG_LEDS_PCA955X is not set 1396# CONFIG_LEDS_PCA955X is not set
1345# CONFIG_LEDS_DAC124S085 is not set 1397# CONFIG_LEDS_DAC124S085 is not set
1346# CONFIG_LEDS_BD2802 is not set 1398# CONFIG_LEDS_BD2802 is not set
1399# CONFIG_LEDS_LT3593 is not set
1347 1400
1348# 1401#
1349# LED Triggers 1402# LED Triggers
@@ -1388,6 +1441,7 @@ CONFIG_RTC_INTF_DEV=y
1388# CONFIG_RTC_DRV_PCF8563 is not set 1441# CONFIG_RTC_DRV_PCF8563 is not set
1389# CONFIG_RTC_DRV_PCF8583 is not set 1442# CONFIG_RTC_DRV_PCF8583 is not set
1390# CONFIG_RTC_DRV_M41T80 is not set 1443# CONFIG_RTC_DRV_M41T80 is not set
1444# CONFIG_RTC_DRV_BQ32K is not set
1391CONFIG_RTC_DRV_S35390A=y 1445CONFIG_RTC_DRV_S35390A=y
1392# CONFIG_RTC_DRV_FM3130 is not set 1446# CONFIG_RTC_DRV_FM3130 is not set
1393# CONFIG_RTC_DRV_RX8581 is not set 1447# CONFIG_RTC_DRV_RX8581 is not set
@@ -1417,7 +1471,9 @@ CONFIG_RTC_DRV_S35390A=y
1417# CONFIG_RTC_DRV_M48T86 is not set 1471# CONFIG_RTC_DRV_M48T86 is not set
1418# CONFIG_RTC_DRV_M48T35 is not set 1472# CONFIG_RTC_DRV_M48T35 is not set
1419# CONFIG_RTC_DRV_M48T59 is not set 1473# CONFIG_RTC_DRV_M48T59 is not set
1474# CONFIG_RTC_DRV_MSM6242 is not set
1420# CONFIG_RTC_DRV_BQ4802 is not set 1475# CONFIG_RTC_DRV_BQ4802 is not set
1476# CONFIG_RTC_DRV_RP5C01 is not set
1421# CONFIG_RTC_DRV_V3020 is not set 1477# CONFIG_RTC_DRV_V3020 is not set
1422 1478
1423# 1479#
@@ -1684,7 +1740,9 @@ CONFIG_DEBUG_USER=y
1684CONFIG_DEBUG_ERRORS=y 1740CONFIG_DEBUG_ERRORS=y
1685# CONFIG_DEBUG_STACK_USAGE is not set 1741# CONFIG_DEBUG_STACK_USAGE is not set
1686CONFIG_DEBUG_LL=y 1742CONFIG_DEBUG_LL=y
1743# CONFIG_EARLY_PRINTK is not set
1687# CONFIG_DEBUG_ICEDCC is not set 1744# CONFIG_DEBUG_ICEDCC is not set
1745# CONFIG_OC_ETM is not set
1688 1746
1689# 1747#
1690# Security options 1748# Security options
@@ -1692,7 +1750,11 @@ CONFIG_DEBUG_LL=y
1692# CONFIG_KEYS is not set 1750# CONFIG_KEYS is not set
1693# CONFIG_SECURITY is not set 1751# CONFIG_SECURITY is not set
1694# CONFIG_SECURITYFS is not set 1752# CONFIG_SECURITYFS is not set
1695# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1753# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1754# CONFIG_DEFAULT_SECURITY_SMACK is not set
1755# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1756CONFIG_DEFAULT_SECURITY_DAC=y
1757CONFIG_DEFAULT_SECURITY=""
1696CONFIG_CRYPTO=y 1758CONFIG_CRYPTO=y
1697 1759
1698# 1760#
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index d2a90eb844a9..ff44bd1615c0 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -184,7 +184,7 @@ CONFIG_S3C24XX_PWM=y
184CONFIG_S3C24XX_GPIO_EXTRA=0 184CONFIG_S3C24XX_GPIO_EXTRA=0
185CONFIG_S3C2410_DMA=y 185CONFIG_S3C2410_DMA=y
186# CONFIG_S3C2410_DMA_DEBUG is not set 186# CONFIG_S3C2410_DMA_DEBUG is not set
187CONFIG_S3C24XX_ADC=y 187CONFIG_S3C_ADC=y
188CONFIG_PLAT_S3C=y 188CONFIG_PLAT_S3C=y
189CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y 189CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y
190CONFIG_CPU_LLSERIAL_S3C2440=y 190CONFIG_CPU_LLSERIAL_S3C2440=y
@@ -199,8 +199,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
199# 199#
200# Power management 200# Power management
201# 201#
202# CONFIG_S3C2410_PM_DEBUG is not set 202# CONFIG_SAMSUNG_PM_DEBUG is not set
203# CONFIG_S3C2410_PM_CHECK is not set 203# CONFIG_SAMSUNG_PM_CHECK is not set
204CONFIG_S3C_LOWLEVEL_UART_PORT=0 204CONFIG_S3C_LOWLEVEL_UART_PORT=0
205CONFIG_S3C_GPIO_SPACE=0 205CONFIG_S3C_GPIO_SPACE=0
206 206
diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig
new file mode 100644
index 000000000000..03f76cfc941c
--- /dev/null
+++ b/arch/arm/configs/mmp2_defconfig
@@ -0,0 +1,1194 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2
4# Tue Jan 5 13:55:22 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_SWAP=y
36CONFIG_SYSVIPC=y
37CONFIG_SYSVIPC_SYSCTL=y
38# CONFIG_POSIX_MQUEUE is not set
39# CONFIG_BSD_PROCESS_ACCT is not set
40# CONFIG_TASKSTATS is not set
41# CONFIG_AUDIT is not set
42
43#
44# RCU Subsystem
45#
46CONFIG_TREE_RCU=y
47# CONFIG_TREE_PREEMPT_RCU is not set
48# CONFIG_TINY_RCU is not set
49# CONFIG_RCU_TRACE is not set
50CONFIG_RCU_FANOUT=32
51# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_IKCONFIG is not set
54CONFIG_LOG_BUF_SHIFT=14
55# CONFIG_GROUP_SCHED is not set
56# CONFIG_CGROUPS is not set
57CONFIG_SYSFS_DEPRECATED=y
58CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_RELAY is not set
60CONFIG_NAMESPACES=y
61# CONFIG_UTS_NS is not set
62# CONFIG_IPC_NS is not set
63# CONFIG_USER_NS is not set
64# CONFIG_PID_NS is not set
65# CONFIG_NET_NS is not set
66# CONFIG_BLK_DEV_INITRD is not set
67CONFIG_CC_OPTIMIZE_FOR_SIZE=y
68CONFIG_SYSCTL=y
69CONFIG_ANON_INODES=y
70# CONFIG_EMBEDDED is not set
71CONFIG_UID16=y
72CONFIG_SYSCTL_SYSCALL=y
73CONFIG_KALLSYMS=y
74# CONFIG_KALLSYMS_ALL is not set
75# CONFIG_KALLSYMS_EXTRA_PASS is not set
76CONFIG_HOTPLUG=y
77CONFIG_PRINTK=y
78CONFIG_BUG=y
79CONFIG_ELF_CORE=y
80CONFIG_BASE_FULL=y
81CONFIG_FUTEX=y
82CONFIG_EPOLL=y
83CONFIG_SIGNALFD=y
84CONFIG_TIMERFD=y
85CONFIG_EVENTFD=y
86CONFIG_SHMEM=y
87CONFIG_AIO=y
88
89#
90# Kernel Performance Events And Counters
91#
92CONFIG_VM_EVENT_COUNTERS=y
93CONFIG_COMPAT_BRK=y
94CONFIG_SLAB=y
95# CONFIG_SLUB is not set
96# CONFIG_SLOB is not set
97# CONFIG_PROFILING is not set
98CONFIG_HAVE_OPROFILE=y
99# CONFIG_KPROBES is not set
100CONFIG_HAVE_KPROBES=y
101CONFIG_HAVE_KRETPROBES=y
102CONFIG_HAVE_CLK=y
103
104#
105# GCOV-based kernel profiling
106#
107# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y
110CONFIG_RT_MUTEXES=y
111CONFIG_BASE_SMALL=0
112CONFIG_MODULES=y
113# CONFIG_MODULE_FORCE_LOAD is not set
114CONFIG_MODULE_UNLOAD=y
115CONFIG_MODULE_FORCE_UNLOAD=y
116# CONFIG_MODVERSIONS is not set
117# CONFIG_MODULE_SRCVERSION_ALL is not set
118CONFIG_BLOCK=y
119CONFIG_LBDAF=y
120# CONFIG_BLK_DEV_BSG is not set
121# CONFIG_BLK_DEV_INTEGRITY is not set
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127CONFIG_IOSCHED_DEADLINE=y
128CONFIG_IOSCHED_CFQ=y
129# CONFIG_DEFAULT_DEADLINE is not set
130CONFIG_DEFAULT_CFQ=y
131# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="cfq"
133# CONFIG_INLINE_SPIN_TRYLOCK is not set
134# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
135# CONFIG_INLINE_SPIN_LOCK is not set
136# CONFIG_INLINE_SPIN_LOCK_BH is not set
137# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
138# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
139# CONFIG_INLINE_SPIN_UNLOCK is not set
140# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
141# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
142# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
143# CONFIG_INLINE_READ_TRYLOCK is not set
144# CONFIG_INLINE_READ_LOCK is not set
145# CONFIG_INLINE_READ_LOCK_BH is not set
146# CONFIG_INLINE_READ_LOCK_IRQ is not set
147# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
148# CONFIG_INLINE_READ_UNLOCK is not set
149# CONFIG_INLINE_READ_UNLOCK_BH is not set
150# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
151# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
152# CONFIG_INLINE_WRITE_TRYLOCK is not set
153# CONFIG_INLINE_WRITE_LOCK is not set
154# CONFIG_INLINE_WRITE_LOCK_BH is not set
155# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
156# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
157# CONFIG_INLINE_WRITE_UNLOCK is not set
158# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
159# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
160# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
161# CONFIG_MUTEX_SPIN_ON_OWNER is not set
162# CONFIG_FREEZER is not set
163
164#
165# System Type
166#
167CONFIG_MMU=y
168# CONFIG_ARCH_AAEC2000 is not set
169# CONFIG_ARCH_INTEGRATOR is not set
170# CONFIG_ARCH_REALVIEW is not set
171# CONFIG_ARCH_VERSATILE is not set
172# CONFIG_ARCH_AT91 is not set
173# CONFIG_ARCH_CLPS711X is not set
174# CONFIG_ARCH_GEMINI is not set
175# CONFIG_ARCH_EBSA110 is not set
176# CONFIG_ARCH_EP93XX is not set
177# CONFIG_ARCH_FOOTBRIDGE is not set
178# CONFIG_ARCH_MXC is not set
179# CONFIG_ARCH_STMP3XXX is not set
180# CONFIG_ARCH_NETX is not set
181# CONFIG_ARCH_H720X is not set
182# CONFIG_ARCH_NOMADIK is not set
183# CONFIG_ARCH_IOP13XX is not set
184# CONFIG_ARCH_IOP32X is not set
185# CONFIG_ARCH_IOP33X is not set
186# CONFIG_ARCH_IXP23XX is not set
187# CONFIG_ARCH_IXP2000 is not set
188# CONFIG_ARCH_IXP4XX is not set
189# CONFIG_ARCH_L7200 is not set
190# CONFIG_ARCH_DOVE is not set
191# CONFIG_ARCH_KIRKWOOD is not set
192# CONFIG_ARCH_LOKI is not set
193# CONFIG_ARCH_MV78XX0 is not set
194# CONFIG_ARCH_ORION5X is not set
195CONFIG_ARCH_MMP=y
196# CONFIG_ARCH_KS8695 is not set
197# CONFIG_ARCH_NS9XXX is not set
198# CONFIG_ARCH_W90X900 is not set
199# CONFIG_ARCH_PNX4008 is not set
200# CONFIG_ARCH_PXA is not set
201# CONFIG_ARCH_MSM is not set
202# CONFIG_ARCH_RPC is not set
203# CONFIG_ARCH_SA1100 is not set
204# CONFIG_ARCH_S3C2410 is not set
205# CONFIG_ARCH_S3C64XX is not set
206# CONFIG_ARCH_S5PC1XX is not set
207# CONFIG_ARCH_SHARK is not set
208# CONFIG_ARCH_LH7A40X is not set
209# CONFIG_ARCH_U300 is not set
210# CONFIG_ARCH_DAVINCI is not set
211# CONFIG_ARCH_OMAP is not set
212# CONFIG_ARCH_BCMRING is not set
213# CONFIG_ARCH_U8500 is not set
214# CONFIG_MACH_TAVOREVB is not set
215
216#
217# Marvell PXA168/910/MMP2 Implmentations
218#
219# CONFIG_MACH_ASPENITE is not set
220# CONFIG_MACH_ZYLONITE2 is not set
221# CONFIG_MACH_TTC_DKB is not set
222CONFIG_MACH_FLINT=y
223CONFIG_CPU_MMP2=y
224CONFIG_PLAT_PXA=y
225
226#
227# Processor Type
228#
229CONFIG_CPU_V6=y
230CONFIG_CPU_32v6K=y
231CONFIG_CPU_32v6=y
232CONFIG_CPU_ABRT_EV6=y
233CONFIG_CPU_PABRT_V6=y
234CONFIG_CPU_CACHE_V6=y
235CONFIG_CPU_CACHE_VIPT=y
236CONFIG_CPU_COPY_V6=y
237CONFIG_CPU_TLB_V6=y
238CONFIG_CPU_HAS_ASID=y
239CONFIG_CPU_CP15=y
240CONFIG_CPU_CP15_MMU=y
241
242#
243# Processor Features
244#
245CONFIG_ARM_THUMB=y
246# CONFIG_CPU_ICACHE_DISABLE is not set
247# CONFIG_CPU_DCACHE_DISABLE is not set
248# CONFIG_CPU_BPREDICT_DISABLE is not set
249CONFIG_ARM_L1_CACHE_SHIFT=5
250# CONFIG_ARM_ERRATA_411920 is not set
251CONFIG_COMMON_CLKDEV=y
252
253#
254# Bus support
255#
256# CONFIG_PCI_SYSCALL is not set
257# CONFIG_ARCH_SUPPORTS_MSI is not set
258# CONFIG_PCCARD is not set
259
260#
261# Kernel Features
262#
263CONFIG_TICK_ONESHOT=y
264# CONFIG_NO_HZ is not set
265CONFIG_HIGH_RES_TIMERS=y
266CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
267CONFIG_VMSPLIT_3G=y
268# CONFIG_VMSPLIT_2G is not set
269# CONFIG_VMSPLIT_1G is not set
270CONFIG_PAGE_OFFSET=0xC0000000
271# CONFIG_PREEMPT_NONE is not set
272# CONFIG_PREEMPT_VOLUNTARY is not set
273CONFIG_PREEMPT=y
274CONFIG_HZ=100
275CONFIG_AEABI=y
276CONFIG_OABI_COMPAT=y
277# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
278# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
279# CONFIG_HIGHMEM is not set
280CONFIG_SELECT_MEMORY_MODEL=y
281CONFIG_FLATMEM_MANUAL=y
282# CONFIG_DISCONTIGMEM_MANUAL is not set
283# CONFIG_SPARSEMEM_MANUAL is not set
284CONFIG_FLATMEM=y
285CONFIG_FLAT_NODE_MEM_MAP=y
286CONFIG_PAGEFLAGS_EXTENDED=y
287CONFIG_SPLIT_PTLOCK_CPUS=4
288# CONFIG_PHYS_ADDR_T_64BIT is not set
289CONFIG_ZONE_DMA_FLAG=0
290CONFIG_VIRT_TO_BUS=y
291# CONFIG_KSM is not set
292CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
293CONFIG_ALIGNMENT_TRAP=y
294# CONFIG_UACCESS_WITH_MEMCPY is not set
295
296#
297# Boot options
298#
299CONFIG_ZBOOT_ROM_TEXT=0x0
300CONFIG_ZBOOT_ROM_BSS=0x0
301CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M user_debug=255"
302# CONFIG_XIP_KERNEL is not set
303# CONFIG_KEXEC is not set
304
305#
306# CPU Power Management
307#
308# CONFIG_CPU_IDLE is not set
309
310#
311# Floating point emulation
312#
313
314#
315# At least one emulation must be selected
316#
317# CONFIG_FPE_NWFPE is not set
318# CONFIG_FPE_FASTFPE is not set
319CONFIG_VFP=y
320
321#
322# Userspace binary formats
323#
324CONFIG_BINFMT_ELF=y
325# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
326CONFIG_HAVE_AOUT=y
327# CONFIG_BINFMT_AOUT is not set
328# CONFIG_BINFMT_MISC is not set
329
330#
331# Power management options
332#
333# CONFIG_PM is not set
334CONFIG_ARCH_SUSPEND_POSSIBLE=y
335CONFIG_NET=y
336
337#
338# Networking options
339#
340CONFIG_PACKET=y
341# CONFIG_PACKET_MMAP is not set
342CONFIG_UNIX=y
343CONFIG_XFRM=y
344# CONFIG_XFRM_USER is not set
345# CONFIG_XFRM_SUB_POLICY is not set
346# CONFIG_XFRM_MIGRATE is not set
347# CONFIG_XFRM_STATISTICS is not set
348# CONFIG_NET_KEY is not set
349CONFIG_INET=y
350# CONFIG_IP_MULTICAST is not set
351# CONFIG_IP_ADVANCED_ROUTER is not set
352CONFIG_IP_FIB_HASH=y
353CONFIG_IP_PNP=y
354# CONFIG_IP_PNP_DHCP is not set
355# CONFIG_IP_PNP_BOOTP is not set
356# CONFIG_IP_PNP_RARP is not set
357# CONFIG_NET_IPIP is not set
358# CONFIG_NET_IPGRE is not set
359# CONFIG_ARPD is not set
360# CONFIG_SYN_COOKIES is not set
361# CONFIG_INET_AH is not set
362# CONFIG_INET_ESP is not set
363# CONFIG_INET_IPCOMP is not set
364# CONFIG_INET_XFRM_TUNNEL is not set
365# CONFIG_INET_TUNNEL is not set
366CONFIG_INET_XFRM_MODE_TRANSPORT=y
367CONFIG_INET_XFRM_MODE_TUNNEL=y
368CONFIG_INET_XFRM_MODE_BEET=y
369# CONFIG_INET_LRO is not set
370CONFIG_INET_DIAG=y
371CONFIG_INET_TCP_DIAG=y
372# CONFIG_TCP_CONG_ADVANCED is not set
373CONFIG_TCP_CONG_CUBIC=y
374CONFIG_DEFAULT_TCP_CONG="cubic"
375# CONFIG_TCP_MD5SIG is not set
376# CONFIG_IPV6 is not set
377# CONFIG_NETWORK_SECMARK is not set
378# CONFIG_NETFILTER is not set
379# CONFIG_IP_DCCP is not set
380# CONFIG_IP_SCTP is not set
381# CONFIG_RDS is not set
382# CONFIG_TIPC is not set
383# CONFIG_ATM is not set
384# CONFIG_BRIDGE is not set
385# CONFIG_NET_DSA is not set
386# CONFIG_VLAN_8021Q is not set
387# CONFIG_DECNET is not set
388# CONFIG_LLC2 is not set
389# CONFIG_IPX is not set
390# CONFIG_ATALK is not set
391# CONFIG_X25 is not set
392# CONFIG_LAPB is not set
393# CONFIG_ECONET is not set
394# CONFIG_WAN_ROUTER is not set
395# CONFIG_PHONET is not set
396# CONFIG_IEEE802154 is not set
397# CONFIG_NET_SCHED is not set
398# CONFIG_DCB is not set
399
400#
401# Network testing
402#
403# CONFIG_NET_PKTGEN is not set
404# CONFIG_HAMRADIO is not set
405# CONFIG_CAN is not set
406# CONFIG_IRDA is not set
407# CONFIG_BT is not set
408# CONFIG_AF_RXRPC is not set
409CONFIG_WIRELESS=y
410# CONFIG_CFG80211 is not set
411# CONFIG_LIB80211 is not set
412
413#
414# CFG80211 needs to be enabled for MAC80211
415#
416# CONFIG_WIMAX is not set
417# CONFIG_RFKILL is not set
418# CONFIG_NET_9P is not set
419
420#
421# Device Drivers
422#
423
424#
425# Generic Driver Options
426#
427CONFIG_UEVENT_HELPER_PATH=""
428# CONFIG_DEVTMPFS is not set
429# CONFIG_STANDALONE is not set
430# CONFIG_PREVENT_FIRMWARE_BUILD is not set
431CONFIG_FW_LOADER=y
432CONFIG_FIRMWARE_IN_KERNEL=y
433CONFIG_EXTRA_FIRMWARE=""
434# CONFIG_DEBUG_DRIVER is not set
435# CONFIG_DEBUG_DEVRES is not set
436# CONFIG_SYS_HYPERVISOR is not set
437# CONFIG_CONNECTOR is not set
438CONFIG_MTD=y
439# CONFIG_MTD_DEBUG is not set
440# CONFIG_MTD_TESTS is not set
441# CONFIG_MTD_CONCAT is not set
442CONFIG_MTD_PARTITIONS=y
443# CONFIG_MTD_REDBOOT_PARTS is not set
444CONFIG_MTD_CMDLINE_PARTS=y
445# CONFIG_MTD_AFS_PARTS is not set
446# CONFIG_MTD_AR7_PARTS is not set
447
448#
449# User Modules And Translation Layers
450#
451# CONFIG_MTD_CHAR is not set
452CONFIG_MTD_BLKDEVS=y
453CONFIG_MTD_BLOCK=y
454# CONFIG_FTL is not set
455# CONFIG_NFTL is not set
456# CONFIG_INFTL is not set
457# CONFIG_RFD_FTL is not set
458# CONFIG_SSFDC is not set
459# CONFIG_MTD_OOPS is not set
460
461#
462# RAM/ROM/Flash chip drivers
463#
464# CONFIG_MTD_CFI is not set
465# CONFIG_MTD_JEDECPROBE is not set
466CONFIG_MTD_MAP_BANK_WIDTH_1=y
467CONFIG_MTD_MAP_BANK_WIDTH_2=y
468CONFIG_MTD_MAP_BANK_WIDTH_4=y
469# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
470# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
471# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
472CONFIG_MTD_CFI_I1=y
473CONFIG_MTD_CFI_I2=y
474# CONFIG_MTD_CFI_I4 is not set
475# CONFIG_MTD_CFI_I8 is not set
476# CONFIG_MTD_RAM is not set
477# CONFIG_MTD_ROM is not set
478# CONFIG_MTD_ABSENT is not set
479
480#
481# Mapping drivers for chip access
482#
483# CONFIG_MTD_COMPLEX_MAPPINGS is not set
484# CONFIG_MTD_PLATRAM is not set
485
486#
487# Self-contained MTD device drivers
488#
489# CONFIG_MTD_SLRAM is not set
490# CONFIG_MTD_PHRAM is not set
491# CONFIG_MTD_MTDRAM is not set
492# CONFIG_MTD_BLOCK2MTD is not set
493
494#
495# Disk-On-Chip Device Drivers
496#
497# CONFIG_MTD_DOC2000 is not set
498# CONFIG_MTD_DOC2001 is not set
499# CONFIG_MTD_DOC2001PLUS is not set
500CONFIG_MTD_NAND=y
501# CONFIG_MTD_NAND_VERIFY_WRITE is not set
502# CONFIG_MTD_NAND_ECC_SMC is not set
503# CONFIG_MTD_NAND_MUSEUM_IDS is not set
504# CONFIG_MTD_NAND_GPIO is not set
505CONFIG_MTD_NAND_IDS=y
506# CONFIG_MTD_NAND_DISKONCHIP is not set
507# CONFIG_MTD_NAND_PXA3xx is not set
508# CONFIG_MTD_NAND_NANDSIM is not set
509# CONFIG_MTD_NAND_PLATFORM is not set
510CONFIG_MTD_ONENAND=y
511# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
512CONFIG_MTD_ONENAND_GENERIC=y
513# CONFIG_MTD_ONENAND_OTP is not set
514# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
515# CONFIG_MTD_ONENAND_SIM is not set
516
517#
518# LPDDR flash memory drivers
519#
520# CONFIG_MTD_LPDDR is not set
521
522#
523# UBI - Unsorted block images
524#
525# CONFIG_MTD_UBI is not set
526# CONFIG_PARPORT is not set
527# CONFIG_BLK_DEV is not set
528# CONFIG_MISC_DEVICES is not set
529CONFIG_HAVE_IDE=y
530# CONFIG_IDE is not set
531
532#
533# SCSI device support
534#
535# CONFIG_RAID_ATTRS is not set
536# CONFIG_SCSI is not set
537# CONFIG_SCSI_DMA is not set
538# CONFIG_SCSI_NETLINK is not set
539# CONFIG_ATA is not set
540# CONFIG_MD is not set
541CONFIG_NETDEVICES=y
542# CONFIG_DUMMY is not set
543# CONFIG_BONDING is not set
544# CONFIG_MACVLAN is not set
545# CONFIG_EQUALIZER is not set
546# CONFIG_TUN is not set
547# CONFIG_VETH is not set
548# CONFIG_PHYLIB is not set
549CONFIG_NET_ETHERNET=y
550CONFIG_MII=y
551# CONFIG_AX88796 is not set
552CONFIG_SMC91X=y
553# CONFIG_DM9000 is not set
554# CONFIG_ETHOC is not set
555# CONFIG_SMC911X is not set
556# CONFIG_SMSC911X is not set
557# CONFIG_DNET is not set
558# CONFIG_IBM_NEW_EMAC_ZMII is not set
559# CONFIG_IBM_NEW_EMAC_RGMII is not set
560# CONFIG_IBM_NEW_EMAC_TAH is not set
561# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
562# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
563# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
564# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
565# CONFIG_B44 is not set
566# CONFIG_KS8842 is not set
567# CONFIG_KS8851_MLL is not set
568# CONFIG_NETDEV_1000 is not set
569# CONFIG_NETDEV_10000 is not set
570CONFIG_WLAN=y
571# CONFIG_HOSTAP is not set
572
573#
574# Enable WiMAX (Networking options) to see the WiMAX drivers
575#
576# CONFIG_WAN is not set
577# CONFIG_PPP is not set
578# CONFIG_SLIP is not set
579# CONFIG_NETCONSOLE is not set
580# CONFIG_NETPOLL is not set
581# CONFIG_NET_POLL_CONTROLLER is not set
582# CONFIG_ISDN is not set
583# CONFIG_PHONE is not set
584
585#
586# Input device support
587#
588CONFIG_INPUT=y
589# CONFIG_INPUT_FF_MEMLESS is not set
590# CONFIG_INPUT_POLLDEV is not set
591# CONFIG_INPUT_SPARSEKMAP is not set
592
593#
594# Userland interfaces
595#
596CONFIG_INPUT_MOUSEDEV=y
597# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
598CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
599CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
600# CONFIG_INPUT_JOYDEV is not set
601# CONFIG_INPUT_EVDEV is not set
602# CONFIG_INPUT_EVBUG is not set
603
604#
605# Input Device Drivers
606#
607# CONFIG_INPUT_KEYBOARD is not set
608# CONFIG_INPUT_MOUSE is not set
609# CONFIG_INPUT_JOYSTICK is not set
610# CONFIG_INPUT_TABLET is not set
611# CONFIG_INPUT_TOUCHSCREEN is not set
612# CONFIG_INPUT_MISC is not set
613
614#
615# Hardware I/O ports
616#
617# CONFIG_SERIO is not set
618# CONFIG_GAMEPORT is not set
619
620#
621# Character devices
622#
623CONFIG_VT=y
624CONFIG_CONSOLE_TRANSLATIONS=y
625CONFIG_VT_CONSOLE=y
626CONFIG_HW_CONSOLE=y
627# CONFIG_VT_HW_CONSOLE_BINDING is not set
628CONFIG_DEVKMEM=y
629# CONFIG_SERIAL_NONSTANDARD is not set
630
631#
632# Serial drivers
633#
634# CONFIG_SERIAL_8250 is not set
635
636#
637# Non-8250 serial port support
638#
639CONFIG_SERIAL_PXA=y
640CONFIG_SERIAL_PXA_CONSOLE=y
641CONFIG_SERIAL_CORE=y
642CONFIG_SERIAL_CORE_CONSOLE=y
643CONFIG_UNIX98_PTYS=y
644# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
645# CONFIG_LEGACY_PTYS is not set
646# CONFIG_IPMI_HANDLER is not set
647# CONFIG_HW_RANDOM is not set
648# CONFIG_R3964 is not set
649# CONFIG_RAW_DRIVER is not set
650# CONFIG_TCG_TPM is not set
651CONFIG_I2C=y
652CONFIG_I2C_BOARDINFO=y
653CONFIG_I2C_COMPAT=y
654# CONFIG_I2C_CHARDEV is not set
655CONFIG_I2C_HELPER_AUTO=y
656
657#
658# I2C Hardware Bus support
659#
660
661#
662# I2C system bus drivers (mostly embedded / system-on-chip)
663#
664# CONFIG_I2C_DESIGNWARE is not set
665# CONFIG_I2C_GPIO is not set
666# CONFIG_I2C_OCORES is not set
667CONFIG_I2C_PXA=y
668# CONFIG_I2C_PXA_SLAVE is not set
669# CONFIG_I2C_SIMTEC is not set
670
671#
672# External I2C/SMBus adapter drivers
673#
674# CONFIG_I2C_PARPORT_LIGHT is not set
675# CONFIG_I2C_TAOS_EVM is not set
676
677#
678# Other I2C/SMBus bus drivers
679#
680# CONFIG_I2C_PCA_PLATFORM is not set
681# CONFIG_I2C_STUB is not set
682
683#
684# Miscellaneous I2C Chip support
685#
686# CONFIG_SENSORS_TSL2550 is not set
687# CONFIG_I2C_DEBUG_CORE is not set
688# CONFIG_I2C_DEBUG_ALGO is not set
689# CONFIG_I2C_DEBUG_BUS is not set
690# CONFIG_I2C_DEBUG_CHIP is not set
691# CONFIG_SPI is not set
692
693#
694# PPS support
695#
696# CONFIG_PPS is not set
697CONFIG_ARCH_REQUIRE_GPIOLIB=y
698CONFIG_GPIOLIB=y
699# CONFIG_DEBUG_GPIO is not set
700# CONFIG_GPIO_SYSFS is not set
701
702#
703# Memory mapped GPIO expanders:
704#
705
706#
707# I2C GPIO expanders:
708#
709# CONFIG_GPIO_MAX732X is not set
710# CONFIG_GPIO_PCA953X is not set
711# CONFIG_GPIO_PCF857X is not set
712
713#
714# PCI GPIO expanders:
715#
716
717#
718# SPI GPIO expanders:
719#
720
721#
722# AC97 GPIO expanders:
723#
724# CONFIG_W1 is not set
725# CONFIG_POWER_SUPPLY is not set
726# CONFIG_HWMON is not set
727# CONFIG_THERMAL is not set
728# CONFIG_WATCHDOG is not set
729CONFIG_SSB_POSSIBLE=y
730
731#
732# Sonics Silicon Backplane
733#
734# CONFIG_SSB is not set
735
736#
737# Multifunction device drivers
738#
739CONFIG_MFD_CORE=y
740# CONFIG_MFD_SM501 is not set
741# CONFIG_MFD_ASIC3 is not set
742# CONFIG_HTC_EGPIO is not set
743# CONFIG_HTC_PASIC3 is not set
744# CONFIG_TPS65010 is not set
745# CONFIG_TWL4030_CORE is not set
746# CONFIG_MFD_TMIO is not set
747# CONFIG_MFD_T7L66XB is not set
748# CONFIG_MFD_TC6387XB is not set
749# CONFIG_MFD_TC6393XB is not set
750# CONFIG_PMIC_DA903X is not set
751# CONFIG_PMIC_ADP5520 is not set
752# CONFIG_MFD_WM8400 is not set
753# CONFIG_MFD_WM831X is not set
754# CONFIG_MFD_WM8350_I2C is not set
755# CONFIG_MFD_PCF50633 is not set
756# CONFIG_AB3100_CORE is not set
757CONFIG_MFD_88PM8607=y
758CONFIG_REGULATOR=y
759# CONFIG_REGULATOR_DEBUG is not set
760# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
761# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
762# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
763# CONFIG_REGULATOR_BQ24022 is not set
764# CONFIG_REGULATOR_MAX1586 is not set
765CONFIG_REGULATOR_MAX8660=y
766# CONFIG_REGULATOR_LP3971 is not set
767# CONFIG_REGULATOR_TPS65023 is not set
768# CONFIG_REGULATOR_TPS6507X is not set
769CONFIG_REGULATOR_88PM8607=y
770# CONFIG_MEDIA_SUPPORT is not set
771
772#
773# Graphics support
774#
775# CONFIG_VGASTATE is not set
776# CONFIG_VIDEO_OUTPUT_CONTROL is not set
777# CONFIG_FB is not set
778CONFIG_BACKLIGHT_LCD_SUPPORT=y
779CONFIG_LCD_CLASS_DEVICE=y
780# CONFIG_LCD_ILI9320 is not set
781# CONFIG_LCD_PLATFORM is not set
782CONFIG_BACKLIGHT_CLASS_DEVICE=y
783CONFIG_BACKLIGHT_GENERIC=y
784
785#
786# Display device support
787#
788# CONFIG_DISPLAY_SUPPORT is not set
789
790#
791# Console display driver support
792#
793# CONFIG_VGA_CONSOLE is not set
794CONFIG_DUMMY_CONSOLE=y
795# CONFIG_SOUND is not set
796# CONFIG_HID_SUPPORT is not set
797# CONFIG_USB_SUPPORT is not set
798# CONFIG_MMC is not set
799# CONFIG_MEMSTICK is not set
800# CONFIG_NEW_LEDS is not set
801# CONFIG_ACCESSIBILITY is not set
802CONFIG_RTC_LIB=y
803CONFIG_RTC_CLASS=y
804CONFIG_RTC_HCTOSYS=y
805CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
806# CONFIG_RTC_DEBUG is not set
807
808#
809# RTC interfaces
810#
811CONFIG_RTC_INTF_SYSFS=y
812CONFIG_RTC_INTF_PROC=y
813CONFIG_RTC_INTF_DEV=y
814# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
815# CONFIG_RTC_DRV_TEST is not set
816
817#
818# I2C RTC drivers
819#
820# CONFIG_RTC_DRV_DS1307 is not set
821# CONFIG_RTC_DRV_DS1374 is not set
822# CONFIG_RTC_DRV_DS1672 is not set
823# CONFIG_RTC_DRV_MAX6900 is not set
824# CONFIG_RTC_DRV_RS5C372 is not set
825# CONFIG_RTC_DRV_ISL1208 is not set
826# CONFIG_RTC_DRV_X1205 is not set
827# CONFIG_RTC_DRV_PCF8563 is not set
828# CONFIG_RTC_DRV_PCF8583 is not set
829# CONFIG_RTC_DRV_M41T80 is not set
830# CONFIG_RTC_DRV_BQ32K is not set
831# CONFIG_RTC_DRV_S35390A is not set
832# CONFIG_RTC_DRV_FM3130 is not set
833# CONFIG_RTC_DRV_RX8581 is not set
834# CONFIG_RTC_DRV_RX8025 is not set
835
836#
837# SPI RTC drivers
838#
839
840#
841# Platform RTC drivers
842#
843# CONFIG_RTC_DRV_CMOS is not set
844# CONFIG_RTC_DRV_DS1286 is not set
845# CONFIG_RTC_DRV_DS1511 is not set
846# CONFIG_RTC_DRV_DS1553 is not set
847# CONFIG_RTC_DRV_DS1742 is not set
848# CONFIG_RTC_DRV_STK17TA8 is not set
849# CONFIG_RTC_DRV_M48T86 is not set
850# CONFIG_RTC_DRV_M48T35 is not set
851# CONFIG_RTC_DRV_M48T59 is not set
852# CONFIG_RTC_DRV_MSM6242 is not set
853# CONFIG_RTC_DRV_BQ4802 is not set
854# CONFIG_RTC_DRV_RP5C01 is not set
855# CONFIG_RTC_DRV_V3020 is not set
856
857#
858# on-CPU RTC drivers
859#
860# CONFIG_DMADEVICES is not set
861# CONFIG_AUXDISPLAY is not set
862# CONFIG_UIO is not set
863
864#
865# TI VLYNQ
866#
867# CONFIG_STAGING is not set
868
869#
870# File systems
871#
872# CONFIG_EXT2_FS is not set
873# CONFIG_EXT3_FS is not set
874# CONFIG_EXT4_FS is not set
875CONFIG_EXT4_USE_FOR_EXT23=y
876# CONFIG_REISERFS_FS is not set
877# CONFIG_JFS_FS is not set
878CONFIG_FS_POSIX_ACL=y
879# CONFIG_XFS_FS is not set
880# CONFIG_GFS2_FS is not set
881# CONFIG_OCFS2_FS is not set
882# CONFIG_BTRFS_FS is not set
883# CONFIG_NILFS2_FS is not set
884CONFIG_FILE_LOCKING=y
885CONFIG_FSNOTIFY=y
886CONFIG_DNOTIFY=y
887CONFIG_INOTIFY=y
888CONFIG_INOTIFY_USER=y
889# CONFIG_QUOTA is not set
890# CONFIG_AUTOFS_FS is not set
891# CONFIG_AUTOFS4_FS is not set
892# CONFIG_FUSE_FS is not set
893CONFIG_GENERIC_ACL=y
894
895#
896# Caches
897#
898# CONFIG_FSCACHE is not set
899
900#
901# CD-ROM/DVD Filesystems
902#
903# CONFIG_ISO9660_FS is not set
904# CONFIG_UDF_FS is not set
905
906#
907# DOS/FAT/NT Filesystems
908#
909# CONFIG_MSDOS_FS is not set
910# CONFIG_VFAT_FS is not set
911# CONFIG_NTFS_FS is not set
912
913#
914# Pseudo filesystems
915#
916CONFIG_PROC_FS=y
917CONFIG_PROC_SYSCTL=y
918CONFIG_PROC_PAGE_MONITOR=y
919CONFIG_SYSFS=y
920CONFIG_TMPFS=y
921CONFIG_TMPFS_POSIX_ACL=y
922# CONFIG_HUGETLB_PAGE is not set
923# CONFIG_CONFIGFS_FS is not set
924CONFIG_MISC_FILESYSTEMS=y
925# CONFIG_ADFS_FS is not set
926# CONFIG_AFFS_FS is not set
927# CONFIG_HFS_FS is not set
928# CONFIG_HFSPLUS_FS is not set
929# CONFIG_BEFS_FS is not set
930# CONFIG_BFS_FS is not set
931# CONFIG_EFS_FS is not set
932CONFIG_JFFS2_FS=y
933CONFIG_JFFS2_FS_DEBUG=0
934CONFIG_JFFS2_FS_WRITEBUFFER=y
935# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
936# CONFIG_JFFS2_SUMMARY is not set
937# CONFIG_JFFS2_FS_XATTR is not set
938# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
939CONFIG_JFFS2_ZLIB=y
940# CONFIG_JFFS2_LZO is not set
941CONFIG_JFFS2_RTIME=y
942# CONFIG_JFFS2_RUBIN is not set
943CONFIG_CRAMFS=y
944# CONFIG_SQUASHFS is not set
945# CONFIG_VXFS_FS is not set
946# CONFIG_MINIX_FS is not set
947# CONFIG_OMFS_FS is not set
948# CONFIG_HPFS_FS is not set
949# CONFIG_QNX4FS_FS is not set
950# CONFIG_ROMFS_FS is not set
951# CONFIG_SYSV_FS is not set
952# CONFIG_UFS_FS is not set
953CONFIG_NETWORK_FILESYSTEMS=y
954CONFIG_NFS_FS=y
955CONFIG_NFS_V3=y
956CONFIG_NFS_V3_ACL=y
957CONFIG_NFS_V4=y
958# CONFIG_NFS_V4_1 is not set
959CONFIG_ROOT_NFS=y
960# CONFIG_NFSD is not set
961CONFIG_LOCKD=y
962CONFIG_LOCKD_V4=y
963CONFIG_NFS_ACL_SUPPORT=y
964CONFIG_NFS_COMMON=y
965CONFIG_SUNRPC=y
966CONFIG_SUNRPC_GSS=y
967CONFIG_RPCSEC_GSS_KRB5=y
968# CONFIG_RPCSEC_GSS_SPKM3 is not set
969# CONFIG_SMB_FS is not set
970# CONFIG_CIFS is not set
971# CONFIG_NCP_FS is not set
972# CONFIG_CODA_FS is not set
973# CONFIG_AFS_FS is not set
974
975#
976# Partition Types
977#
978# CONFIG_PARTITION_ADVANCED is not set
979CONFIG_MSDOS_PARTITION=y
980# CONFIG_NLS is not set
981# CONFIG_DLM is not set
982
983#
984# Kernel hacking
985#
986CONFIG_PRINTK_TIME=y
987CONFIG_ENABLE_WARN_DEPRECATED=y
988CONFIG_ENABLE_MUST_CHECK=y
989CONFIG_FRAME_WARN=1024
990CONFIG_MAGIC_SYSRQ=y
991# CONFIG_STRIP_ASM_SYMS is not set
992# CONFIG_UNUSED_SYMBOLS is not set
993# CONFIG_DEBUG_FS is not set
994# CONFIG_HEADERS_CHECK is not set
995CONFIG_DEBUG_KERNEL=y
996# CONFIG_DEBUG_SHIRQ is not set
997CONFIG_DETECT_SOFTLOCKUP=y
998# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
999CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1000CONFIG_DETECT_HUNG_TASK=y
1001# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1002CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1003CONFIG_SCHED_DEBUG=y
1004# CONFIG_SCHEDSTATS is not set
1005# CONFIG_TIMER_STATS is not set
1006# CONFIG_DEBUG_OBJECTS is not set
1007# CONFIG_DEBUG_SLAB is not set
1008# CONFIG_DEBUG_KMEMLEAK is not set
1009# CONFIG_DEBUG_PREEMPT is not set
1010# CONFIG_DEBUG_RT_MUTEXES is not set
1011# CONFIG_RT_MUTEX_TESTER is not set
1012# CONFIG_DEBUG_SPINLOCK is not set
1013# CONFIG_DEBUG_MUTEXES is not set
1014# CONFIG_DEBUG_LOCK_ALLOC is not set
1015# CONFIG_PROVE_LOCKING is not set
1016# CONFIG_LOCK_STAT is not set
1017# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1018# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1019# CONFIG_DEBUG_KOBJECT is not set
1020CONFIG_DEBUG_BUGVERBOSE=y
1021CONFIG_DEBUG_INFO=y
1022# CONFIG_DEBUG_VM is not set
1023# CONFIG_DEBUG_WRITECOUNT is not set
1024CONFIG_DEBUG_MEMORY_INIT=y
1025# CONFIG_DEBUG_LIST is not set
1026# CONFIG_DEBUG_SG is not set
1027# CONFIG_DEBUG_NOTIFIERS is not set
1028# CONFIG_DEBUG_CREDENTIALS is not set
1029# CONFIG_BOOT_PRINTK_DELAY is not set
1030# CONFIG_RCU_TORTURE_TEST is not set
1031# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1032# CONFIG_BACKTRACE_SELF_TEST is not set
1033# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1034# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1035# CONFIG_FAULT_INJECTION is not set
1036# CONFIG_LATENCYTOP is not set
1037# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1038# CONFIG_PAGE_POISONING is not set
1039CONFIG_HAVE_FUNCTION_TRACER=y
1040CONFIG_TRACING_SUPPORT=y
1041CONFIG_FTRACE=y
1042# CONFIG_FUNCTION_TRACER is not set
1043# CONFIG_IRQSOFF_TRACER is not set
1044# CONFIG_PREEMPT_TRACER is not set
1045# CONFIG_SCHED_TRACER is not set
1046# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1047# CONFIG_BOOT_TRACER is not set
1048CONFIG_BRANCH_PROFILE_NONE=y
1049# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1050# CONFIG_PROFILE_ALL_BRANCHES is not set
1051# CONFIG_STACK_TRACER is not set
1052# CONFIG_KMEMTRACE is not set
1053# CONFIG_WORKQUEUE_TRACER is not set
1054# CONFIG_BLK_DEV_IO_TRACE is not set
1055# CONFIG_SAMPLES is not set
1056CONFIG_HAVE_ARCH_KGDB=y
1057# CONFIG_KGDB is not set
1058CONFIG_ARM_UNWIND=y
1059CONFIG_DEBUG_USER=y
1060CONFIG_DEBUG_ERRORS=y
1061# CONFIG_DEBUG_STACK_USAGE is not set
1062CONFIG_DEBUG_LL=y
1063# CONFIG_EARLY_PRINTK is not set
1064# CONFIG_DEBUG_ICEDCC is not set
1065# CONFIG_OC_ETM is not set
1066
1067#
1068# Security options
1069#
1070# CONFIG_KEYS is not set
1071# CONFIG_SECURITY is not set
1072# CONFIG_SECURITYFS is not set
1073# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1074# CONFIG_DEFAULT_SECURITY_SMACK is not set
1075# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1076CONFIG_DEFAULT_SECURITY_DAC=y
1077CONFIG_DEFAULT_SECURITY=""
1078CONFIG_CRYPTO=y
1079
1080#
1081# Crypto core or helper
1082#
1083CONFIG_CRYPTO_ALGAPI=y
1084CONFIG_CRYPTO_ALGAPI2=y
1085CONFIG_CRYPTO_AEAD2=y
1086CONFIG_CRYPTO_BLKCIPHER=y
1087CONFIG_CRYPTO_BLKCIPHER2=y
1088CONFIG_CRYPTO_HASH=y
1089CONFIG_CRYPTO_HASH2=y
1090CONFIG_CRYPTO_RNG2=y
1091CONFIG_CRYPTO_PCOMP=y
1092CONFIG_CRYPTO_MANAGER=y
1093CONFIG_CRYPTO_MANAGER2=y
1094# CONFIG_CRYPTO_GF128MUL is not set
1095# CONFIG_CRYPTO_NULL is not set
1096CONFIG_CRYPTO_WORKQUEUE=y
1097# CONFIG_CRYPTO_CRYPTD is not set
1098# CONFIG_CRYPTO_AUTHENC is not set
1099# CONFIG_CRYPTO_TEST is not set
1100
1101#
1102# Authenticated Encryption with Associated Data
1103#
1104# CONFIG_CRYPTO_CCM is not set
1105# CONFIG_CRYPTO_GCM is not set
1106# CONFIG_CRYPTO_SEQIV is not set
1107
1108#
1109# Block modes
1110#
1111CONFIG_CRYPTO_CBC=y
1112# CONFIG_CRYPTO_CTR is not set
1113# CONFIG_CRYPTO_CTS is not set
1114# CONFIG_CRYPTO_ECB is not set
1115# CONFIG_CRYPTO_LRW is not set
1116# CONFIG_CRYPTO_PCBC is not set
1117# CONFIG_CRYPTO_XTS is not set
1118
1119#
1120# Hash modes
1121#
1122# CONFIG_CRYPTO_HMAC is not set
1123# CONFIG_CRYPTO_XCBC is not set
1124# CONFIG_CRYPTO_VMAC is not set
1125
1126#
1127# Digest
1128#
1129# CONFIG_CRYPTO_CRC32C is not set
1130# CONFIG_CRYPTO_GHASH is not set
1131# CONFIG_CRYPTO_MD4 is not set
1132CONFIG_CRYPTO_MD5=y
1133# CONFIG_CRYPTO_MICHAEL_MIC is not set
1134# CONFIG_CRYPTO_RMD128 is not set
1135# CONFIG_CRYPTO_RMD160 is not set
1136# CONFIG_CRYPTO_RMD256 is not set
1137# CONFIG_CRYPTO_RMD320 is not set
1138# CONFIG_CRYPTO_SHA1 is not set
1139# CONFIG_CRYPTO_SHA256 is not set
1140# CONFIG_CRYPTO_SHA512 is not set
1141# CONFIG_CRYPTO_TGR192 is not set
1142# CONFIG_CRYPTO_WP512 is not set
1143
1144#
1145# Ciphers
1146#
1147# CONFIG_CRYPTO_AES is not set
1148# CONFIG_CRYPTO_ANUBIS is not set
1149# CONFIG_CRYPTO_ARC4 is not set
1150# CONFIG_CRYPTO_BLOWFISH is not set
1151# CONFIG_CRYPTO_CAMELLIA is not set
1152# CONFIG_CRYPTO_CAST5 is not set
1153# CONFIG_CRYPTO_CAST6 is not set
1154CONFIG_CRYPTO_DES=y
1155# CONFIG_CRYPTO_FCRYPT is not set
1156# CONFIG_CRYPTO_KHAZAD is not set
1157# CONFIG_CRYPTO_SALSA20 is not set
1158# CONFIG_CRYPTO_SEED is not set
1159# CONFIG_CRYPTO_SERPENT is not set
1160# CONFIG_CRYPTO_TEA is not set
1161# CONFIG_CRYPTO_TWOFISH is not set
1162
1163#
1164# Compression
1165#
1166# CONFIG_CRYPTO_DEFLATE is not set
1167# CONFIG_CRYPTO_ZLIB is not set
1168# CONFIG_CRYPTO_LZO is not set
1169
1170#
1171# Random Number Generation
1172#
1173# CONFIG_CRYPTO_ANSI_CPRNG is not set
1174CONFIG_CRYPTO_HW=y
1175# CONFIG_BINARY_PRINTF is not set
1176
1177#
1178# Library routines
1179#
1180CONFIG_BITREVERSE=y
1181CONFIG_GENERIC_FIND_LAST_BIT=y
1182CONFIG_CRC_CCITT=y
1183# CONFIG_CRC16 is not set
1184# CONFIG_CRC_T10DIF is not set
1185# CONFIG_CRC_ITU_T is not set
1186CONFIG_CRC32=y
1187# CONFIG_CRC7 is not set
1188# CONFIG_LIBCRC32C is not set
1189CONFIG_ZLIB_INFLATE=y
1190CONFIG_ZLIB_DEFLATE=y
1191CONFIG_HAS_IOMEM=y
1192CONFIG_HAS_IOPORT=y
1193CONFIG_HAS_DMA=y
1194CONFIG_NLATTR=y
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index 6afa2c108eaa..da4710dd1da1 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -176,6 +176,7 @@ CONFIG_ARCH_MV78XX0=y
176# 176#
177CONFIG_MACH_DB78X00_BP=y 177CONFIG_MACH_DB78X00_BP=y
178CONFIG_MACH_RD78X00_MASA=y 178CONFIG_MACH_RD78X00_MASA=y
179CONFIG_MACH_TERASTATION_WXL=y
179CONFIG_PLAT_ORION=y 180CONFIG_PLAT_ORION=y
180 181
181# 182#
diff --git a/arch/arm/configs/mx1ads_defconfig b/arch/arm/configs/mx1ads_defconfig
deleted file mode 100644
index 3cabbb6d9276..000000000000
--- a/arch/arm/configs/mx1ads_defconfig
+++ /dev/null
@@ -1,742 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-rc1-bk2
4# Sun Mar 27 02:15:46 2005
5#
6CONFIG_ARM=y
7CONFIG_MMU=y
8CONFIG_UID16=y
9CONFIG_RWSEM_GENERIC_SPINLOCK=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y
11CONFIG_GENERIC_IOMAP=y
12
13#
14# Code maturity level options
15#
16CONFIG_EXPERIMENTAL=y
17CONFIG_CLEAN_COMPILE=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_LOCK_KERNEL=y
20
21#
22# General setup
23#
24CONFIG_LOCALVERSION=""
25CONFIG_SWAP=y
26CONFIG_SYSVIPC=y
27# CONFIG_POSIX_MQUEUE is not set
28# CONFIG_BSD_PROCESS_ACCT is not set
29# CONFIG_SYSCTL is not set
30# CONFIG_AUDIT is not set
31# CONFIG_HOTPLUG is not set
32CONFIG_KOBJECT_UEVENT=y
33# CONFIG_IKCONFIG is not set
34CONFIG_EMBEDDED=y
35# CONFIG_KALLSYMS is not set
36CONFIG_BASE_FULL=y
37CONFIG_FUTEX=y
38CONFIG_EPOLL=y
39CONFIG_CC_OPTIMIZE_FOR_SIZE=y
40CONFIG_SHMEM=y
41CONFIG_CC_ALIGN_FUNCTIONS=0
42CONFIG_CC_ALIGN_LABELS=0
43CONFIG_CC_ALIGN_LOOPS=0
44CONFIG_CC_ALIGN_JUMPS=0
45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
47
48#
49# Loadable module support
50#
51CONFIG_MODULES=y
52CONFIG_MODULE_UNLOAD=y
53# CONFIG_MODULE_FORCE_UNLOAD is not set
54CONFIG_OBSOLETE_MODPARM=y
55# CONFIG_MODVERSIONS is not set
56# CONFIG_MODULE_SRCVERSION_ALL is not set
57CONFIG_KMOD=y
58
59#
60# System Type
61#
62# CONFIG_ARCH_CLPS7500 is not set
63# CONFIG_ARCH_CLPS711X is not set
64# CONFIG_ARCH_CO285 is not set
65# CONFIG_ARCH_EBSA110 is not set
66# CONFIG_ARCH_FOOTBRIDGE is not set
67# CONFIG_ARCH_INTEGRATOR is not set
68# CONFIG_ARCH_IOP3XX is not set
69# CONFIG_ARCH_IXP4XX is not set
70# CONFIG_ARCH_IXP2000 is not set
71# CONFIG_ARCH_L7200 is not set
72# CONFIG_ARCH_PXA is not set
73# CONFIG_ARCH_RPC is not set
74# CONFIG_ARCH_SA1100 is not set
75# CONFIG_ARCH_S3C2410 is not set
76# CONFIG_ARCH_SHARK is not set
77# CONFIG_ARCH_LH7A40X is not set
78# CONFIG_ARCH_OMAP is not set
79# CONFIG_ARCH_VERSATILE is not set
80CONFIG_ARCH_IMX=y
81# CONFIG_ARCH_H720X is not set
82
83#
84# IMX Implementations
85#
86CONFIG_ARCH_MX1ADS=y
87
88#
89# Processor Type
90#
91CONFIG_CPU_ARM920T=y
92CONFIG_CPU_32v4=y
93CONFIG_CPU_ABRT_EV4T=y
94CONFIG_CPU_CACHE_V4WT=y
95CONFIG_CPU_CACHE_VIVT=y
96CONFIG_CPU_COPY_V4WB=y
97CONFIG_CPU_TLB_V4WBI=y
98
99#
100# Processor Features
101#
102# CONFIG_ARM_THUMB is not set
103# CONFIG_CPU_ICACHE_DISABLE is not set
104# CONFIG_CPU_DCACHE_DISABLE is not set
105# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
106
107#
108# Bus support
109#
110CONFIG_ISA=y
111
112#
113# PCCARD (PCMCIA/CardBus) support
114#
115# CONFIG_PCCARD is not set
116
117#
118# Kernel Features
119#
120CONFIG_PREEMPT=y
121# CONFIG_LEDS is not set
122CONFIG_ALIGNMENT_TRAP=y
123
124#
125# Boot options
126#
127CONFIG_ZBOOT_ROM_TEXT=0x0
128CONFIG_ZBOOT_ROM_BSS=0x0
129CONFIG_CMDLINE="console=ttySMX0,57600n8 ip=bootp root=/dev/nfs"
130# CONFIG_XIP_KERNEL is not set
131
132#
133# Floating point emulation
134#
135
136#
137# At least one emulation must be selected
138#
139CONFIG_FPE_NWFPE=y
140CONFIG_FPE_NWFPE_XP=y
141CONFIG_FPE_FASTFPE=y
142
143#
144# Userspace binary formats
145#
146CONFIG_BINFMT_ELF=y
147# CONFIG_BINFMT_AOUT is not set
148# CONFIG_BINFMT_MISC is not set
149# CONFIG_ARTHUR is not set
150
151#
152# Power management options
153#
154# CONFIG_PM is not set
155
156#
157# Device Drivers
158#
159
160#
161# Generic Driver Options
162#
163CONFIG_STANDALONE=y
164CONFIG_PREVENT_FIRMWARE_BUILD=y
165# CONFIG_FW_LOADER is not set
166# CONFIG_DEBUG_DRIVER is not set
167
168#
169# Memory Technology Devices (MTD)
170#
171CONFIG_MTD=y
172# CONFIG_MTD_DEBUG is not set
173# CONFIG_MTD_CONCAT is not set
174CONFIG_MTD_PARTITIONS=y
175# CONFIG_MTD_REDBOOT_PARTS is not set
176# CONFIG_MTD_CMDLINE_PARTS is not set
177# CONFIG_MTD_AFS_PARTS is not set
178
179#
180# User Modules And Translation Layers
181#
182CONFIG_MTD_CHAR=y
183CONFIG_MTD_BLOCK=y
184# CONFIG_FTL is not set
185# CONFIG_NFTL is not set
186# CONFIG_INFTL is not set
187
188#
189# RAM/ROM/Flash chip drivers
190#
191# CONFIG_MTD_CFI is not set
192# CONFIG_MTD_JEDECPROBE is not set
193CONFIG_MTD_MAP_BANK_WIDTH_1=y
194CONFIG_MTD_MAP_BANK_WIDTH_2=y
195CONFIG_MTD_MAP_BANK_WIDTH_4=y
196# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
197# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
198# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
199CONFIG_MTD_CFI_I1=y
200CONFIG_MTD_CFI_I2=y
201# CONFIG_MTD_CFI_I4 is not set
202# CONFIG_MTD_CFI_I8 is not set
203# CONFIG_MTD_RAM is not set
204CONFIG_MTD_ROM=y
205# CONFIG_MTD_ABSENT is not set
206
207#
208# Mapping drivers for chip access
209#
210# CONFIG_MTD_COMPLEX_MAPPINGS is not set
211
212#
213# Self-contained MTD device drivers
214#
215# CONFIG_MTD_SLRAM is not set
216# CONFIG_MTD_PHRAM is not set
217# CONFIG_MTD_MTDRAM is not set
218# CONFIG_MTD_BLKMTD is not set
219# CONFIG_MTD_BLOCK2MTD is not set
220
221#
222# Disk-On-Chip Device Drivers
223#
224# CONFIG_MTD_DOC2000 is not set
225# CONFIG_MTD_DOC2001 is not set
226# CONFIG_MTD_DOC2001PLUS is not set
227
228#
229# NAND Flash Device Drivers
230#
231# CONFIG_MTD_NAND is not set
232
233#
234# Parallel port support
235#
236# CONFIG_PARPORT is not set
237
238#
239# Plug and Play support
240#
241# CONFIG_PNP is not set
242
243#
244# Block devices
245#
246# CONFIG_BLK_DEV_FD is not set
247# CONFIG_BLK_DEV_XD is not set
248# CONFIG_BLK_DEV_COW_COMMON is not set
249CONFIG_BLK_DEV_LOOP=y
250# CONFIG_BLK_DEV_CRYPTOLOOP is not set
251# CONFIG_BLK_DEV_NBD is not set
252# CONFIG_BLK_DEV_RAM is not set
253CONFIG_BLK_DEV_RAM_COUNT=16
254CONFIG_INITRAMFS_SOURCE=""
255# CONFIG_CDROM_PKTCDVD is not set
256
257#
258# IO Schedulers
259#
260CONFIG_IOSCHED_NOOP=y
261# CONFIG_IOSCHED_AS is not set
262CONFIG_IOSCHED_DEADLINE=y
263CONFIG_IOSCHED_CFQ=y
264# CONFIG_ATA_OVER_ETH is not set
265
266#
267# SCSI device support
268#
269# CONFIG_SCSI is not set
270
271#
272# Multi-device support (RAID and LVM)
273#
274# CONFIG_MD is not set
275
276#
277# Fusion MPT device support
278#
279
280#
281# IEEE 1394 (FireWire) support
282#
283
284#
285# I2O device support
286#
287
288#
289# Networking support
290#
291CONFIG_NET=y
292
293#
294# Networking options
295#
296CONFIG_PACKET=m
297CONFIG_PACKET_MMAP=y
298# CONFIG_NETLINK_DEV is not set
299CONFIG_UNIX=y
300# CONFIG_NET_KEY is not set
301CONFIG_INET=y
302# CONFIG_IP_MULTICAST is not set
303# CONFIG_IP_ADVANCED_ROUTER is not set
304CONFIG_IP_PNP=y
305CONFIG_IP_PNP_DHCP=y
306CONFIG_IP_PNP_BOOTP=y
307# CONFIG_IP_PNP_RARP is not set
308# CONFIG_NET_IPIP is not set
309# CONFIG_NET_IPGRE is not set
310# CONFIG_ARPD is not set
311# CONFIG_SYN_COOKIES is not set
312# CONFIG_INET_AH is not set
313# CONFIG_INET_ESP is not set
314# CONFIG_INET_IPCOMP is not set
315# CONFIG_INET_TUNNEL is not set
316CONFIG_IP_TCPDIAG=y
317# CONFIG_IP_TCPDIAG_IPV6 is not set
318# CONFIG_IPV6 is not set
319# CONFIG_NETFILTER is not set
320
321#
322# SCTP Configuration (EXPERIMENTAL)
323#
324# CONFIG_IP_SCTP is not set
325# CONFIG_ATM is not set
326# CONFIG_BRIDGE is not set
327# CONFIG_VLAN_8021Q is not set
328# CONFIG_DECNET is not set
329# CONFIG_LLC2 is not set
330# CONFIG_IPX is not set
331# CONFIG_ATALK is not set
332# CONFIG_X25 is not set
333# CONFIG_LAPB is not set
334# CONFIG_NET_DIVERT is not set
335# CONFIG_ECONET is not set
336# CONFIG_WAN_ROUTER is not set
337
338#
339# QoS and/or fair queueing
340#
341# CONFIG_NET_SCHED is not set
342# CONFIG_NET_CLS_ROUTE is not set
343
344#
345# Network testing
346#
347# CONFIG_NET_PKTGEN is not set
348# CONFIG_NETPOLL is not set
349# CONFIG_NET_POLL_CONTROLLER is not set
350# CONFIG_HAMRADIO is not set
351# CONFIG_IRDA is not set
352# CONFIG_BT is not set
353CONFIG_NETDEVICES=y
354# CONFIG_DUMMY is not set
355# CONFIG_BONDING is not set
356# CONFIG_EQUALIZER is not set
357# CONFIG_TUN is not set
358
359#
360# ARCnet devices
361#
362# CONFIG_ARCNET is not set
363
364#
365# Ethernet (10 or 100Mbit)
366#
367CONFIG_NET_ETHERNET=y
368CONFIG_MII=y
369# CONFIG_NET_VENDOR_3COM is not set
370# CONFIG_LANCE is not set
371# CONFIG_NET_VENDOR_SMC is not set
372# CONFIG_SMC91X is not set
373# CONFIG_NET_VENDOR_RACAL is not set
374# CONFIG_AT1700 is not set
375# CONFIG_DEPCA is not set
376# CONFIG_HP100 is not set
377# CONFIG_NET_ISA is not set
378# CONFIG_NET_PCI is not set
379# CONFIG_NET_POCKET is not set
380
381#
382# Ethernet (1000 Mbit)
383#
384
385#
386# Ethernet (10000 Mbit)
387#
388
389#
390# Token Ring devices
391#
392# CONFIG_TR is not set
393
394#
395# Wireless LAN (non-hamradio)
396#
397# CONFIG_NET_RADIO is not set
398
399#
400# Wan interfaces
401#
402# CONFIG_WAN is not set
403CONFIG_PPP=y
404# CONFIG_PPP_MULTILINK is not set
405CONFIG_PPP_FILTER=y
406CONFIG_PPP_ASYNC=y
407# CONFIG_PPP_SYNC_TTY is not set
408CONFIG_PPP_DEFLATE=y
409CONFIG_PPP_BSDCOMP=y
410# CONFIG_PPPOE is not set
411# CONFIG_SLIP is not set
412# CONFIG_SHAPER is not set
413# CONFIG_NETCONSOLE is not set
414
415#
416# ISDN subsystem
417#
418# CONFIG_ISDN is not set
419
420#
421# Input device support
422#
423# CONFIG_INPUT is not set
424
425#
426# Hardware I/O ports
427#
428# CONFIG_SERIO is not set
429# CONFIG_GAMEPORT is not set
430CONFIG_SOUND_GAMEPORT=y
431
432#
433# Character devices
434#
435# CONFIG_VT is not set
436# CONFIG_SERIAL_NONSTANDARD is not set
437
438#
439# Serial drivers
440#
441# CONFIG_SERIAL_8250 is not set
442
443#
444# Non-8250 serial port support
445#
446CONFIG_SERIAL_IMX=y
447CONFIG_SERIAL_IMX_CONSOLE=y
448CONFIG_SERIAL_CORE=y
449CONFIG_SERIAL_CORE_CONSOLE=y
450CONFIG_UNIX98_PTYS=y
451# CONFIG_LEGACY_PTYS is not set
452
453#
454# IPMI
455#
456# CONFIG_IPMI_HANDLER is not set
457
458#
459# Watchdog Cards
460#
461# CONFIG_WATCHDOG is not set
462# CONFIG_NVRAM is not set
463CONFIG_RTC=m
464# CONFIG_DTLK is not set
465# CONFIG_R3964 is not set
466
467#
468# Ftape, the floppy tape device driver
469#
470# CONFIG_DRM is not set
471# CONFIG_RAW_DRIVER is not set
472
473#
474# TPM devices
475#
476# CONFIG_TCG_TPM is not set
477
478#
479# I2C support
480#
481# CONFIG_I2C is not set
482
483#
484# Misc devices
485#
486
487#
488# Multimedia devices
489#
490# CONFIG_VIDEO_DEV is not set
491
492#
493# Digital Video Broadcasting Devices
494#
495# CONFIG_DVB is not set
496
497#
498# Graphics support
499#
500# CONFIG_FB is not set
501
502#
503# Sound
504#
505# CONFIG_SOUND is not set
506
507#
508# USB support
509#
510CONFIG_USB_ARCH_HAS_HCD=y
511# CONFIG_USB_ARCH_HAS_OHCI is not set
512# CONFIG_USB is not set
513
514#
515# USB Gadget Support
516#
517# CONFIG_USB_GADGET is not set
518
519#
520# MMC/SD Card support
521#
522# CONFIG_MMC is not set
523
524#
525# File systems
526#
527# CONFIG_EXT2_FS is not set
528# CONFIG_EXT3_FS is not set
529# CONFIG_JBD is not set
530# CONFIG_REISERFS_FS is not set
531# CONFIG_JFS_FS is not set
532
533#
534# XFS support
535#
536# CONFIG_XFS_FS is not set
537# CONFIG_MINIX_FS is not set
538# CONFIG_ROMFS_FS is not set
539# CONFIG_QUOTA is not set
540CONFIG_DNOTIFY=y
541# CONFIG_AUTOFS_FS is not set
542# CONFIG_AUTOFS4_FS is not set
543
544#
545# CD-ROM/DVD Filesystems
546#
547# CONFIG_ISO9660_FS is not set
548# CONFIG_UDF_FS is not set
549
550#
551# DOS/FAT/NT Filesystems
552#
553CONFIG_FAT_FS=y
554CONFIG_MSDOS_FS=y
555CONFIG_VFAT_FS=y
556CONFIG_FAT_DEFAULT_CODEPAGE=437
557CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
558# CONFIG_NTFS_FS is not set
559
560#
561# Pseudo filesystems
562#
563CONFIG_PROC_FS=y
564CONFIG_SYSFS=y
565CONFIG_DEVFS_FS=y
566CONFIG_DEVFS_MOUNT=y
567# CONFIG_DEVFS_DEBUG is not set
568# CONFIG_DEVPTS_FS_XATTR is not set
569CONFIG_TMPFS=y
570# CONFIG_TMPFS_XATTR is not set
571# CONFIG_HUGETLB_PAGE is not set
572CONFIG_RAMFS=y
573
574#
575# Miscellaneous filesystems
576#
577# CONFIG_ADFS_FS is not set
578# CONFIG_AFFS_FS is not set
579# CONFIG_HFS_FS is not set
580# CONFIG_HFSPLUS_FS is not set
581# CONFIG_BEFS_FS is not set
582# CONFIG_BFS_FS is not set
583# CONFIG_EFS_FS is not set
584# CONFIG_JFFS_FS is not set
585CONFIG_JFFS2_FS=y
586CONFIG_JFFS2_FS_DEBUG=0
587# CONFIG_JFFS2_FS_NAND is not set
588# CONFIG_JFFS2_FS_NOR_ECC is not set
589# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
590CONFIG_JFFS2_ZLIB=y
591CONFIG_JFFS2_RTIME=y
592# CONFIG_JFFS2_RUBIN is not set
593CONFIG_CRAMFS=y
594# CONFIG_VXFS_FS is not set
595# CONFIG_HPFS_FS is not set
596# CONFIG_QNX4FS_FS is not set
597# CONFIG_SYSV_FS is not set
598# CONFIG_UFS_FS is not set
599
600#
601# Network File Systems
602#
603CONFIG_NFS_FS=y
604CONFIG_NFS_V3=y
605# CONFIG_NFS_V4 is not set
606# CONFIG_NFS_DIRECTIO is not set
607# CONFIG_NFSD is not set
608CONFIG_ROOT_NFS=y
609CONFIG_LOCKD=y
610CONFIG_LOCKD_V4=y
611CONFIG_SUNRPC=y
612# CONFIG_RPCSEC_GSS_KRB5 is not set
613# CONFIG_RPCSEC_GSS_SPKM3 is not set
614# CONFIG_SMB_FS is not set
615# CONFIG_CIFS is not set
616# CONFIG_NCP_FS is not set
617# CONFIG_CODA_FS is not set
618# CONFIG_AFS_FS is not set
619
620#
621# Partition Types
622#
623# CONFIG_PARTITION_ADVANCED is not set
624CONFIG_MSDOS_PARTITION=y
625
626#
627# Native Language Support
628#
629CONFIG_NLS=y
630CONFIG_NLS_DEFAULT="iso8859-1"
631# CONFIG_NLS_CODEPAGE_437 is not set
632# CONFIG_NLS_CODEPAGE_737 is not set
633# CONFIG_NLS_CODEPAGE_775 is not set
634# CONFIG_NLS_CODEPAGE_850 is not set
635# CONFIG_NLS_CODEPAGE_852 is not set
636# CONFIG_NLS_CODEPAGE_855 is not set
637# CONFIG_NLS_CODEPAGE_857 is not set
638# CONFIG_NLS_CODEPAGE_860 is not set
639# CONFIG_NLS_CODEPAGE_861 is not set
640# CONFIG_NLS_CODEPAGE_862 is not set
641# CONFIG_NLS_CODEPAGE_863 is not set
642# CONFIG_NLS_CODEPAGE_864 is not set
643# CONFIG_NLS_CODEPAGE_865 is not set
644# CONFIG_NLS_CODEPAGE_866 is not set
645# CONFIG_NLS_CODEPAGE_869 is not set
646# CONFIG_NLS_CODEPAGE_936 is not set
647# CONFIG_NLS_CODEPAGE_950 is not set
648# CONFIG_NLS_CODEPAGE_932 is not set
649# CONFIG_NLS_CODEPAGE_949 is not set
650# CONFIG_NLS_CODEPAGE_874 is not set
651# CONFIG_NLS_ISO8859_8 is not set
652# CONFIG_NLS_CODEPAGE_1250 is not set
653# CONFIG_NLS_CODEPAGE_1251 is not set
654# CONFIG_NLS_ASCII is not set
655# CONFIG_NLS_ISO8859_1 is not set
656# CONFIG_NLS_ISO8859_2 is not set
657# CONFIG_NLS_ISO8859_3 is not set
658# CONFIG_NLS_ISO8859_4 is not set
659# CONFIG_NLS_ISO8859_5 is not set
660# CONFIG_NLS_ISO8859_6 is not set
661# CONFIG_NLS_ISO8859_7 is not set
662# CONFIG_NLS_ISO8859_9 is not set
663# CONFIG_NLS_ISO8859_13 is not set
664# CONFIG_NLS_ISO8859_14 is not set
665# CONFIG_NLS_ISO8859_15 is not set
666# CONFIG_NLS_KOI8_R is not set
667# CONFIG_NLS_KOI8_U is not set
668# CONFIG_NLS_UTF8 is not set
669
670#
671# Profiling support
672#
673# CONFIG_PROFILING is not set
674
675#
676# Kernel hacking
677#
678# CONFIG_PRINTK_TIME is not set
679CONFIG_DEBUG_KERNEL=y
680CONFIG_MAGIC_SYSRQ=y
681CONFIG_LOG_BUF_SHIFT=14
682# CONFIG_SCHEDSTATS is not set
683# CONFIG_DEBUG_SLAB is not set
684CONFIG_DEBUG_PREEMPT=y
685# CONFIG_DEBUG_SPINLOCK is not set
686# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
687# CONFIG_DEBUG_KOBJECT is not set
688CONFIG_DEBUG_BUGVERBOSE=y
689CONFIG_DEBUG_INFO=y
690# CONFIG_DEBUG_FS is not set
691CONFIG_FRAME_POINTER=y
692CONFIG_DEBUG_USER=y
693CONFIG_DEBUG_ERRORS=y
694# CONFIG_DEBUG_LL is not set
695
696#
697# Security options
698#
699# CONFIG_KEYS is not set
700# CONFIG_SECURITY is not set
701
702#
703# Cryptographic options
704#
705CONFIG_CRYPTO=y
706# CONFIG_CRYPTO_HMAC is not set
707# CONFIG_CRYPTO_NULL is not set
708# CONFIG_CRYPTO_MD4 is not set
709# CONFIG_CRYPTO_MD5 is not set
710# CONFIG_CRYPTO_SHA1 is not set
711# CONFIG_CRYPTO_SHA256 is not set
712# CONFIG_CRYPTO_SHA512 is not set
713# CONFIG_CRYPTO_WP512 is not set
714# CONFIG_CRYPTO_TGR192 is not set
715# CONFIG_CRYPTO_DES is not set
716# CONFIG_CRYPTO_BLOWFISH is not set
717# CONFIG_CRYPTO_TWOFISH is not set
718# CONFIG_CRYPTO_SERPENT is not set
719# CONFIG_CRYPTO_AES is not set
720# CONFIG_CRYPTO_CAST5 is not set
721# CONFIG_CRYPTO_CAST6 is not set
722# CONFIG_CRYPTO_TEA is not set
723# CONFIG_CRYPTO_ARC4 is not set
724# CONFIG_CRYPTO_KHAZAD is not set
725# CONFIG_CRYPTO_ANUBIS is not set
726# CONFIG_CRYPTO_DEFLATE is not set
727# CONFIG_CRYPTO_MICHAEL_MIC is not set
728# CONFIG_CRYPTO_CRC32C is not set
729# CONFIG_CRYPTO_TEST is not set
730
731#
732# Hardware crypto devices
733#
734
735#
736# Library routines
737#
738CONFIG_CRC_CCITT=y
739CONFIG_CRC32=y
740# CONFIG_LIBCRC32C is not set
741CONFIG_ZLIB_INFLATE=y
742CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index edfdd6faf800..b4c1366e9e0d 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y
200CONFIG_MACH_PCM038=y 200CONFIG_MACH_PCM038=y
201CONFIG_MACH_PCM970_BASEBOARD=y 201CONFIG_MACH_PCM970_BASEBOARD=y
202CONFIG_MACH_MX27_3DS=y 202CONFIG_MACH_MX27_3DS=y
203CONFIG_MACH_MX27LITE=y 203CONFIG_MACH_IMX27LITE=y
204CONFIG_MXC_IRQ_PRIOR=y 204CONFIG_MXC_IRQ_PRIOR=y
205CONFIG_MXC_PWM=y 205CONFIG_MXC_PWM=y
206 206
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
new file mode 100644
index 000000000000..c88e9527a8ec
--- /dev/null
+++ b/arch/arm/configs/mx51_defconfig
@@ -0,0 +1,1286 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc6
4# Tue Feb 2 15:20:48 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_ARCH_MTD_XIP=y
22CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
23CONFIG_VECTORS_BASE=0xffff0000
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
25CONFIG_CONSTRUCTORS=y
26
27#
28# General setup
29#
30CONFIG_EXPERIMENTAL=y
31CONFIG_BROKEN_ON_SMP=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34# CONFIG_LOCALVERSION_AUTO is not set
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
41CONFIG_SWAP=y
42CONFIG_SYSVIPC=y
43CONFIG_SYSVIPC_SYSCTL=y
44# CONFIG_POSIX_MQUEUE is not set
45# CONFIG_BSD_PROCESS_ACCT is not set
46# CONFIG_TASKSTATS is not set
47# CONFIG_AUDIT is not set
48
49#
50# RCU Subsystem
51#
52CONFIG_TREE_RCU=y
53# CONFIG_TREE_PREEMPT_RCU is not set
54# CONFIG_TINY_RCU is not set
55# CONFIG_RCU_TRACE is not set
56CONFIG_RCU_FANOUT=32
57# CONFIG_RCU_FANOUT_EXACT is not set
58# CONFIG_TREE_RCU_TRACE is not set
59# CONFIG_IKCONFIG is not set
60CONFIG_LOG_BUF_SHIFT=18
61# CONFIG_GROUP_SCHED is not set
62# CONFIG_CGROUPS is not set
63# CONFIG_SYSFS_DEPRECATED_V2 is not set
64CONFIG_RELAY=y
65# CONFIG_NAMESPACES is not set
66# CONFIG_BLK_DEV_INITRD is not set
67CONFIG_CC_OPTIMIZE_FOR_SIZE=y
68CONFIG_SYSCTL=y
69CONFIG_ANON_INODES=y
70CONFIG_EMBEDDED=y
71CONFIG_UID16=y
72CONFIG_SYSCTL_SYSCALL=y
73CONFIG_KALLSYMS=y
74# CONFIG_KALLSYMS_ALL is not set
75# CONFIG_KALLSYMS_EXTRA_PASS is not set
76CONFIG_HOTPLUG=y
77CONFIG_PRINTK=y
78CONFIG_BUG=y
79CONFIG_ELF_CORE=y
80CONFIG_BASE_FULL=y
81CONFIG_FUTEX=y
82CONFIG_EPOLL=y
83CONFIG_SIGNALFD=y
84CONFIG_TIMERFD=y
85CONFIG_EVENTFD=y
86CONFIG_SHMEM=y
87CONFIG_AIO=y
88
89#
90# Kernel Performance Events And Counters
91#
92CONFIG_VM_EVENT_COUNTERS=y
93# CONFIG_SLUB_DEBUG is not set
94# CONFIG_COMPAT_BRK is not set
95# CONFIG_SLAB is not set
96CONFIG_SLUB=y
97# CONFIG_SLOB is not set
98# CONFIG_PROFILING is not set
99CONFIG_HAVE_OPROFILE=y
100# CONFIG_KPROBES is not set
101CONFIG_HAVE_KPROBES=y
102CONFIG_HAVE_KRETPROBES=y
103CONFIG_HAVE_CLK=y
104
105#
106# GCOV-based kernel profiling
107#
108# CONFIG_GCOV_KERNEL is not set
109# CONFIG_SLOW_WORK is not set
110CONFIG_HAVE_GENERIC_DMA_COHERENT=y
111CONFIG_RT_MUTEXES=y
112CONFIG_BASE_SMALL=0
113CONFIG_MODULES=y
114# CONFIG_MODULE_FORCE_LOAD is not set
115CONFIG_MODULE_UNLOAD=y
116# CONFIG_MODULE_FORCE_UNLOAD is not set
117CONFIG_MODVERSIONS=y
118CONFIG_MODULE_SRCVERSION_ALL=y
119CONFIG_BLOCK=y
120# CONFIG_LBDAF is not set
121# CONFIG_BLK_DEV_BSG is not set
122# CONFIG_BLK_DEV_INTEGRITY is not set
123
124#
125# IO Schedulers
126#
127CONFIG_IOSCHED_NOOP=y
128CONFIG_IOSCHED_DEADLINE=y
129CONFIG_IOSCHED_CFQ=y
130# CONFIG_DEFAULT_DEADLINE is not set
131CONFIG_DEFAULT_CFQ=y
132# CONFIG_DEFAULT_NOOP is not set
133CONFIG_DEFAULT_IOSCHED="cfq"
134# CONFIG_INLINE_SPIN_TRYLOCK is not set
135# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
136# CONFIG_INLINE_SPIN_LOCK is not set
137# CONFIG_INLINE_SPIN_LOCK_BH is not set
138# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
139# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
140CONFIG_INLINE_SPIN_UNLOCK=y
141# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
142CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
143# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
144# CONFIG_INLINE_READ_TRYLOCK is not set
145# CONFIG_INLINE_READ_LOCK is not set
146# CONFIG_INLINE_READ_LOCK_BH is not set
147# CONFIG_INLINE_READ_LOCK_IRQ is not set
148# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
149CONFIG_INLINE_READ_UNLOCK=y
150# CONFIG_INLINE_READ_UNLOCK_BH is not set
151CONFIG_INLINE_READ_UNLOCK_IRQ=y
152# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
153# CONFIG_INLINE_WRITE_TRYLOCK is not set
154# CONFIG_INLINE_WRITE_LOCK is not set
155# CONFIG_INLINE_WRITE_LOCK_BH is not set
156# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
157# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
158CONFIG_INLINE_WRITE_UNLOCK=y
159# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
160CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
161# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
162# CONFIG_MUTEX_SPIN_ON_OWNER is not set
163CONFIG_FREEZER=y
164
165#
166# System Type
167#
168CONFIG_MMU=y
169# CONFIG_ARCH_AAEC2000 is not set
170# CONFIG_ARCH_INTEGRATOR is not set
171# CONFIG_ARCH_REALVIEW is not set
172# CONFIG_ARCH_VERSATILE is not set
173# CONFIG_ARCH_AT91 is not set
174# CONFIG_ARCH_CLPS711X is not set
175# CONFIG_ARCH_GEMINI is not set
176# CONFIG_ARCH_EBSA110 is not set
177# CONFIG_ARCH_EP93XX is not set
178# CONFIG_ARCH_FOOTBRIDGE is not set
179CONFIG_ARCH_MXC=y
180# CONFIG_ARCH_STMP3XXX is not set
181# CONFIG_ARCH_NETX is not set
182# CONFIG_ARCH_H720X is not set
183# CONFIG_ARCH_NOMADIK is not set
184# CONFIG_ARCH_IOP13XX is not set
185# CONFIG_ARCH_IOP32X is not set
186# CONFIG_ARCH_IOP33X is not set
187# CONFIG_ARCH_IXP23XX is not set
188# CONFIG_ARCH_IXP2000 is not set
189# CONFIG_ARCH_IXP4XX is not set
190# CONFIG_ARCH_L7200 is not set
191# CONFIG_ARCH_DOVE is not set
192# CONFIG_ARCH_KIRKWOOD is not set
193# CONFIG_ARCH_LOKI is not set
194# CONFIG_ARCH_MV78XX0 is not set
195# CONFIG_ARCH_ORION5X is not set
196# CONFIG_ARCH_MMP is not set
197# CONFIG_ARCH_KS8695 is not set
198# CONFIG_ARCH_NS9XXX is not set
199# CONFIG_ARCH_W90X900 is not set
200# CONFIG_ARCH_PNX4008 is not set
201# CONFIG_ARCH_PXA is not set
202# CONFIG_ARCH_MSM is not set
203# CONFIG_ARCH_RPC is not set
204# CONFIG_ARCH_SA1100 is not set
205# CONFIG_ARCH_S3C2410 is not set
206# CONFIG_ARCH_S3C64XX is not set
207# CONFIG_ARCH_S5PC1XX is not set
208# CONFIG_ARCH_SHARK is not set
209# CONFIG_ARCH_LH7A40X is not set
210# CONFIG_ARCH_U300 is not set
211# CONFIG_ARCH_DAVINCI is not set
212# CONFIG_ARCH_OMAP is not set
213# CONFIG_ARCH_BCMRING is not set
214# CONFIG_ARCH_U8500 is not set
215
216#
217# Freescale MXC Implementations
218#
219# CONFIG_ARCH_MX1 is not set
220# CONFIG_ARCH_MX2 is not set
221# CONFIG_ARCH_MX25 is not set
222# CONFIG_ARCH_MX3 is not set
223# CONFIG_ARCH_MXC91231 is not set
224CONFIG_ARCH_MX5=y
225CONFIG_ARCH_MX51=y
226
227#
228# MX5 platforms:
229#
230CONFIG_MACH_MX51_BABBAGE=y
231# CONFIG_MXC_IRQ_PRIOR is not set
232CONFIG_MXC_TZIC=y
233# CONFIG_MXC_PWM is not set
234CONFIG_ARCH_MXC_IOMUX_V3=y
235
236#
237# Processor Type
238#
239CONFIG_CPU_32v6K=y
240CONFIG_CPU_V7=y
241CONFIG_CPU_32v7=y
242CONFIG_CPU_ABRT_EV7=y
243CONFIG_CPU_PABRT_V7=y
244CONFIG_CPU_CACHE_V7=y
245CONFIG_CPU_CACHE_VIPT=y
246CONFIG_CPU_COPY_V6=y
247CONFIG_CPU_TLB_V7=y
248CONFIG_CPU_HAS_ASID=y
249CONFIG_CPU_CP15=y
250CONFIG_CPU_CP15_MMU=y
251
252#
253# Processor Features
254#
255CONFIG_ARM_THUMB=y
256# CONFIG_ARM_THUMBEE is not set
257# CONFIG_CPU_ICACHE_DISABLE is not set
258# CONFIG_CPU_DCACHE_DISABLE is not set
259# CONFIG_CPU_BPREDICT_DISABLE is not set
260CONFIG_HAS_TLS_REG=y
261CONFIG_ARM_L1_CACHE_SHIFT=5
262# CONFIG_ARM_ERRATA_430973 is not set
263# CONFIG_ARM_ERRATA_458693 is not set
264# CONFIG_ARM_ERRATA_460075 is not set
265CONFIG_COMMON_CLKDEV=y
266
267#
268# Bus support
269#
270# CONFIG_PCI_SYSCALL is not set
271# CONFIG_ARCH_SUPPORTS_MSI is not set
272# CONFIG_PCCARD is not set
273
274#
275# Kernel Features
276#
277CONFIG_TICK_ONESHOT=y
278CONFIG_NO_HZ=y
279CONFIG_HIGH_RES_TIMERS=y
280CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
281CONFIG_VMSPLIT_3G=y
282# CONFIG_VMSPLIT_2G is not set
283# CONFIG_VMSPLIT_1G is not set
284CONFIG_PAGE_OFFSET=0xC0000000
285# CONFIG_PREEMPT_NONE is not set
286CONFIG_PREEMPT_VOLUNTARY=y
287# CONFIG_PREEMPT is not set
288CONFIG_HZ=100
289# CONFIG_THUMB2_KERNEL is not set
290CONFIG_AEABI=y
291# CONFIG_OABI_COMPAT is not set
292# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
293# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
294# CONFIG_HIGHMEM is not set
295CONFIG_SELECT_MEMORY_MODEL=y
296CONFIG_FLATMEM_MANUAL=y
297# CONFIG_DISCONTIGMEM_MANUAL is not set
298# CONFIG_SPARSEMEM_MANUAL is not set
299CONFIG_FLATMEM=y
300CONFIG_FLAT_NODE_MEM_MAP=y
301CONFIG_PAGEFLAGS_EXTENDED=y
302CONFIG_SPLIT_PTLOCK_CPUS=4
303# CONFIG_PHYS_ADDR_T_64BIT is not set
304CONFIG_ZONE_DMA_FLAG=0
305CONFIG_VIRT_TO_BUS=y
306# CONFIG_KSM is not set
307CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
308CONFIG_ALIGNMENT_TRAP=y
309# CONFIG_UACCESS_WITH_MEMCPY is not set
310
311#
312# Boot options
313#
314CONFIG_ZBOOT_ROM_TEXT=0
315CONFIG_ZBOOT_ROM_BSS=0
316CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.101:/shared/nfs ip=dhcp"
317# CONFIG_XIP_KERNEL is not set
318# CONFIG_KEXEC is not set
319
320#
321# CPU Power Management
322#
323# CONFIG_CPU_IDLE is not set
324
325#
326# Floating point emulation
327#
328
329#
330# At least one emulation must be selected
331#
332CONFIG_VFP=y
333CONFIG_VFPv3=y
334CONFIG_NEON=y
335
336#
337# Userspace binary formats
338#
339CONFIG_BINFMT_ELF=y
340# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
341CONFIG_HAVE_AOUT=y
342# CONFIG_BINFMT_AOUT is not set
343CONFIG_BINFMT_MISC=m
344
345#
346# Power management options
347#
348CONFIG_PM=y
349CONFIG_PM_DEBUG=y
350# CONFIG_PM_VERBOSE is not set
351CONFIG_CAN_PM_TRACE=y
352CONFIG_PM_SLEEP=y
353CONFIG_SUSPEND=y
354CONFIG_PM_TEST_SUSPEND=y
355CONFIG_SUSPEND_FREEZER=y
356# CONFIG_APM_EMULATION is not set
357# CONFIG_PM_RUNTIME is not set
358CONFIG_ARCH_SUSPEND_POSSIBLE=y
359CONFIG_NET=y
360
361#
362# Networking options
363#
364CONFIG_PACKET=y
365CONFIG_PACKET_MMAP=y
366CONFIG_UNIX=y
367# CONFIG_NET_KEY is not set
368CONFIG_INET=y
369# CONFIG_IP_MULTICAST is not set
370# CONFIG_IP_ADVANCED_ROUTER is not set
371CONFIG_IP_FIB_HASH=y
372CONFIG_IP_PNP=y
373CONFIG_IP_PNP_DHCP=y
374# CONFIG_IP_PNP_BOOTP is not set
375# CONFIG_IP_PNP_RARP is not set
376# CONFIG_NET_IPIP is not set
377# CONFIG_NET_IPGRE is not set
378# CONFIG_ARPD is not set
379# CONFIG_SYN_COOKIES is not set
380# CONFIG_INET_AH is not set
381# CONFIG_INET_ESP is not set
382# CONFIG_INET_IPCOMP is not set
383# CONFIG_INET_XFRM_TUNNEL is not set
384# CONFIG_INET_TUNNEL is not set
385# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
386# CONFIG_INET_XFRM_MODE_TUNNEL is not set
387# CONFIG_INET_XFRM_MODE_BEET is not set
388# CONFIG_INET_LRO is not set
389CONFIG_INET_DIAG=y
390CONFIG_INET_TCP_DIAG=y
391# CONFIG_TCP_CONG_ADVANCED is not set
392CONFIG_TCP_CONG_CUBIC=y
393CONFIG_DEFAULT_TCP_CONG="cubic"
394# CONFIG_TCP_MD5SIG is not set
395# CONFIG_IPV6 is not set
396# CONFIG_NETWORK_SECMARK is not set
397# CONFIG_NETFILTER is not set
398# CONFIG_IP_DCCP is not set
399# CONFIG_IP_SCTP is not set
400# CONFIG_RDS is not set
401# CONFIG_TIPC is not set
402# CONFIG_ATM is not set
403# CONFIG_BRIDGE is not set
404# CONFIG_NET_DSA is not set
405# CONFIG_VLAN_8021Q is not set
406# CONFIG_DECNET is not set
407# CONFIG_LLC2 is not set
408# CONFIG_IPX is not set
409# CONFIG_ATALK is not set
410# CONFIG_X25 is not set
411# CONFIG_LAPB is not set
412# CONFIG_ECONET is not set
413# CONFIG_WAN_ROUTER is not set
414# CONFIG_PHONET is not set
415# CONFIG_IEEE802154 is not set
416# CONFIG_NET_SCHED is not set
417# CONFIG_DCB is not set
418
419#
420# Network testing
421#
422# CONFIG_NET_PKTGEN is not set
423# CONFIG_HAMRADIO is not set
424# CONFIG_CAN is not set
425# CONFIG_IRDA is not set
426# CONFIG_BT is not set
427# CONFIG_AF_RXRPC is not set
428# CONFIG_WIRELESS is not set
429# CONFIG_WIMAX is not set
430# CONFIG_RFKILL is not set
431# CONFIG_NET_9P is not set
432
433#
434# Device Drivers
435#
436
437#
438# Generic Driver Options
439#
440CONFIG_UEVENT_HELPER_PATH=""
441# CONFIG_STANDALONE is not set
442CONFIG_PREVENT_FIRMWARE_BUILD=y
443CONFIG_FW_LOADER=y
444CONFIG_FIRMWARE_IN_KERNEL=y
445CONFIG_EXTRA_FIRMWARE=""
446# CONFIG_DEBUG_DRIVER is not set
447# CONFIG_DEBUG_DEVRES is not set
448# CONFIG_SYS_HYPERVISOR is not set
449CONFIG_CONNECTOR=y
450CONFIG_PROC_EVENTS=y
451# CONFIG_MTD is not set
452# CONFIG_PARPORT is not set
453CONFIG_BLK_DEV=y
454# CONFIG_BLK_DEV_COW_COMMON is not set
455CONFIG_BLK_DEV_LOOP=y
456# CONFIG_BLK_DEV_CRYPTOLOOP is not set
457# CONFIG_BLK_DEV_DRBD is not set
458# CONFIG_BLK_DEV_NBD is not set
459CONFIG_BLK_DEV_RAM=y
460CONFIG_BLK_DEV_RAM_COUNT=16
461CONFIG_BLK_DEV_RAM_SIZE=65536
462# CONFIG_BLK_DEV_XIP is not set
463# CONFIG_CDROM_PKTCDVD is not set
464# CONFIG_ATA_OVER_ETH is not set
465# CONFIG_MG_DISK is not set
466# CONFIG_MISC_DEVICES is not set
467CONFIG_HAVE_IDE=y
468# CONFIG_IDE is not set
469
470#
471# SCSI device support
472#
473# CONFIG_RAID_ATTRS is not set
474CONFIG_SCSI=y
475CONFIG_SCSI_DMA=y
476# CONFIG_SCSI_TGT is not set
477# CONFIG_SCSI_NETLINK is not set
478# CONFIG_SCSI_PROC_FS is not set
479
480#
481# SCSI support type (disk, tape, CD-ROM)
482#
483CONFIG_BLK_DEV_SD=y
484# CONFIG_CHR_DEV_ST is not set
485# CONFIG_CHR_DEV_OSST is not set
486# CONFIG_BLK_DEV_SR is not set
487# CONFIG_CHR_DEV_SG is not set
488# CONFIG_CHR_DEV_SCH is not set
489CONFIG_SCSI_MULTI_LUN=y
490CONFIG_SCSI_CONSTANTS=y
491CONFIG_SCSI_LOGGING=y
492CONFIG_SCSI_SCAN_ASYNC=y
493CONFIG_SCSI_WAIT_SCAN=m
494
495#
496# SCSI Transports
497#
498# CONFIG_SCSI_SPI_ATTRS is not set
499# CONFIG_SCSI_FC_ATTRS is not set
500# CONFIG_SCSI_ISCSI_ATTRS is not set
501# CONFIG_SCSI_SAS_LIBSAS is not set
502# CONFIG_SCSI_SRP_ATTRS is not set
503# CONFIG_SCSI_LOWLEVEL is not set
504# CONFIG_SCSI_DH is not set
505# CONFIG_SCSI_OSD_INITIATOR is not set
506CONFIG_ATA=m
507# CONFIG_ATA_NONSTANDARD is not set
508CONFIG_ATA_VERBOSE_ERROR=y
509CONFIG_SATA_PMP=y
510CONFIG_ATA_SFF=y
511# CONFIG_SATA_MV is not set
512# CONFIG_PATA_PLATFORM is not set
513# CONFIG_MD is not set
514CONFIG_NETDEVICES=y
515# CONFIG_DUMMY is not set
516# CONFIG_BONDING is not set
517# CONFIG_MACVLAN is not set
518# CONFIG_EQUALIZER is not set
519# CONFIG_TUN is not set
520# CONFIG_VETH is not set
521CONFIG_PHYLIB=y
522
523#
524# MII PHY device drivers
525#
526CONFIG_MARVELL_PHY=y
527CONFIG_DAVICOM_PHY=y
528CONFIG_QSEMI_PHY=y
529CONFIG_LXT_PHY=y
530CONFIG_CICADA_PHY=y
531CONFIG_VITESSE_PHY=y
532CONFIG_SMSC_PHY=y
533CONFIG_BROADCOM_PHY=y
534CONFIG_ICPLUS_PHY=y
535CONFIG_REALTEK_PHY=y
536CONFIG_NATIONAL_PHY=y
537CONFIG_STE10XP=y
538CONFIG_LSI_ET1011C_PHY=y
539CONFIG_FIXED_PHY=y
540CONFIG_MDIO_BITBANG=y
541CONFIG_MDIO_GPIO=y
542CONFIG_NET_ETHERNET=y
543CONFIG_MII=m
544# CONFIG_AX88796 is not set
545# CONFIG_SMC91X is not set
546# CONFIG_DM9000 is not set
547# CONFIG_ETHOC is not set
548# CONFIG_SMC911X is not set
549# CONFIG_SMSC911X is not set
550# CONFIG_DNET is not set
551# CONFIG_IBM_NEW_EMAC_ZMII is not set
552# CONFIG_IBM_NEW_EMAC_RGMII is not set
553# CONFIG_IBM_NEW_EMAC_TAH is not set
554# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
555# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
556# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
557# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
558# CONFIG_B44 is not set
559# CONFIG_KS8842 is not set
560# CONFIG_KS8851_MLL is not set
561CONFIG_FEC=y
562# CONFIG_FEC2 is not set
563# CONFIG_NETDEV_1000 is not set
564# CONFIG_NETDEV_10000 is not set
565# CONFIG_WLAN is not set
566
567#
568# Enable WiMAX (Networking options) to see the WiMAX drivers
569#
570# CONFIG_WAN is not set
571# CONFIG_PPP is not set
572# CONFIG_SLIP is not set
573# CONFIG_NETCONSOLE is not set
574# CONFIG_NETPOLL is not set
575# CONFIG_NET_POLL_CONTROLLER is not set
576# CONFIG_ISDN is not set
577# CONFIG_PHONE is not set
578
579#
580# Input device support
581#
582CONFIG_INPUT=y
583CONFIG_INPUT_FF_MEMLESS=m
584# CONFIG_INPUT_POLLDEV is not set
585# CONFIG_INPUT_SPARSEKMAP is not set
586
587#
588# Userland interfaces
589#
590CONFIG_INPUT_MOUSEDEV=y
591# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
592CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
593CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
594# CONFIG_INPUT_JOYDEV is not set
595CONFIG_INPUT_EVDEV=y
596CONFIG_INPUT_EVBUG=m
597
598#
599# Input Device Drivers
600#
601CONFIG_INPUT_KEYBOARD=y
602# CONFIG_KEYBOARD_ADP5588 is not set
603CONFIG_KEYBOARD_ATKBD=y
604# CONFIG_QT2160 is not set
605# CONFIG_KEYBOARD_LKKBD is not set
606# CONFIG_KEYBOARD_GPIO is not set
607# CONFIG_KEYBOARD_MATRIX is not set
608# CONFIG_KEYBOARD_LM8323 is not set
609# CONFIG_KEYBOARD_MAX7359 is not set
610# CONFIG_KEYBOARD_NEWTON is not set
611# CONFIG_KEYBOARD_OPENCORES is not set
612# CONFIG_KEYBOARD_STOWAWAY is not set
613# CONFIG_KEYBOARD_SUNKBD is not set
614# CONFIG_KEYBOARD_XTKBD is not set
615CONFIG_INPUT_MOUSE=y
616CONFIG_MOUSE_PS2=m
617CONFIG_MOUSE_PS2_ALPS=y
618CONFIG_MOUSE_PS2_LOGIPS2PP=y
619CONFIG_MOUSE_PS2_SYNAPTICS=y
620CONFIG_MOUSE_PS2_TRACKPOINT=y
621CONFIG_MOUSE_PS2_ELANTECH=y
622# CONFIG_MOUSE_PS2_SENTELIC is not set
623# CONFIG_MOUSE_PS2_TOUCHKIT is not set
624# CONFIG_MOUSE_SERIAL is not set
625# CONFIG_MOUSE_VSXXXAA is not set
626# CONFIG_MOUSE_GPIO is not set
627# CONFIG_MOUSE_SYNAPTICS_I2C is not set
628# CONFIG_INPUT_JOYSTICK is not set
629# CONFIG_INPUT_TABLET is not set
630# CONFIG_INPUT_TOUCHSCREEN is not set
631# CONFIG_INPUT_MISC is not set
632
633#
634# Hardware I/O ports
635#
636CONFIG_SERIO=y
637CONFIG_SERIO_SERPORT=m
638CONFIG_SERIO_LIBPS2=y
639# CONFIG_SERIO_RAW is not set
640# CONFIG_SERIO_ALTERA_PS2 is not set
641# CONFIG_GAMEPORT is not set
642
643#
644# Character devices
645#
646CONFIG_VT=y
647CONFIG_CONSOLE_TRANSLATIONS=y
648CONFIG_VT_CONSOLE=y
649CONFIG_HW_CONSOLE=y
650CONFIG_VT_HW_CONSOLE_BINDING=y
651# CONFIG_DEVKMEM is not set
652# CONFIG_SERIAL_NONSTANDARD is not set
653
654#
655# Serial drivers
656#
657# CONFIG_SERIAL_8250 is not set
658
659#
660# Non-8250 serial port support
661#
662CONFIG_SERIAL_IMX=y
663CONFIG_SERIAL_IMX_CONSOLE=y
664CONFIG_SERIAL_CORE=y
665CONFIG_SERIAL_CORE_CONSOLE=y
666CONFIG_UNIX98_PTYS=y
667# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
668# CONFIG_LEGACY_PTYS is not set
669# CONFIG_IPMI_HANDLER is not set
670CONFIG_HW_RANDOM=y
671# CONFIG_HW_RANDOM_TIMERIOMEM is not set
672# CONFIG_R3964 is not set
673# CONFIG_RAW_DRIVER is not set
674# CONFIG_TCG_TPM is not set
675CONFIG_I2C=y
676CONFIG_I2C_BOARDINFO=y
677# CONFIG_I2C_COMPAT is not set
678CONFIG_I2C_CHARDEV=m
679# CONFIG_I2C_HELPER_AUTO is not set
680
681#
682# I2C Algorithms
683#
684CONFIG_I2C_ALGOBIT=m
685CONFIG_I2C_ALGOPCF=m
686CONFIG_I2C_ALGOPCA=m
687
688#
689# I2C Hardware Bus support
690#
691
692#
693# I2C system bus drivers (mostly embedded / system-on-chip)
694#
695# CONFIG_I2C_DESIGNWARE is not set
696# CONFIG_I2C_GPIO is not set
697# CONFIG_I2C_IMX is not set
698# CONFIG_I2C_OCORES is not set
699# CONFIG_I2C_SIMTEC is not set
700
701#
702# External I2C/SMBus adapter drivers
703#
704# CONFIG_I2C_PARPORT_LIGHT is not set
705# CONFIG_I2C_TAOS_EVM is not set
706
707#
708# Other I2C/SMBus bus drivers
709#
710# CONFIG_I2C_PCA_PLATFORM is not set
711# CONFIG_I2C_STUB is not set
712
713#
714# Miscellaneous I2C Chip support
715#
716# CONFIG_SENSORS_TSL2550 is not set
717# CONFIG_I2C_DEBUG_CORE is not set
718# CONFIG_I2C_DEBUG_ALGO is not set
719# CONFIG_I2C_DEBUG_BUS is not set
720# CONFIG_I2C_DEBUG_CHIP is not set
721# CONFIG_SPI is not set
722
723#
724# PPS support
725#
726# CONFIG_PPS is not set
727CONFIG_ARCH_REQUIRE_GPIOLIB=y
728CONFIG_GPIOLIB=y
729# CONFIG_DEBUG_GPIO is not set
730CONFIG_GPIO_SYSFS=y
731
732#
733# Memory mapped GPIO expanders:
734#
735
736#
737# I2C GPIO expanders:
738#
739# CONFIG_GPIO_MAX732X is not set
740# CONFIG_GPIO_PCA953X is not set
741# CONFIG_GPIO_PCF857X is not set
742# CONFIG_GPIO_ADP5588 is not set
743
744#
745# PCI GPIO expanders:
746#
747
748#
749# SPI GPIO expanders:
750#
751
752#
753# AC97 GPIO expanders:
754#
755# CONFIG_W1 is not set
756# CONFIG_POWER_SUPPLY is not set
757# CONFIG_HWMON is not set
758# CONFIG_THERMAL is not set
759# CONFIG_WATCHDOG is not set
760CONFIG_SSB_POSSIBLE=y
761
762#
763# Sonics Silicon Backplane
764#
765# CONFIG_SSB is not set
766
767#
768# Multifunction device drivers
769#
770# CONFIG_MFD_CORE is not set
771# CONFIG_MFD_SM501 is not set
772# CONFIG_MFD_ASIC3 is not set
773# CONFIG_HTC_EGPIO is not set
774# CONFIG_HTC_PASIC3 is not set
775# CONFIG_TPS65010 is not set
776# CONFIG_TWL4030_CORE is not set
777# CONFIG_MFD_TMIO is not set
778# CONFIG_MFD_T7L66XB is not set
779# CONFIG_MFD_TC6387XB is not set
780# CONFIG_MFD_TC6393XB is not set
781# CONFIG_PMIC_DA903X is not set
782# CONFIG_PMIC_ADP5520 is not set
783# CONFIG_MFD_WM8400 is not set
784# CONFIG_MFD_WM831X is not set
785# CONFIG_MFD_WM8350_I2C is not set
786# CONFIG_MFD_PCF50633 is not set
787# CONFIG_AB3100_CORE is not set
788# CONFIG_MFD_88PM8607 is not set
789# CONFIG_REGULATOR is not set
790# CONFIG_MEDIA_SUPPORT is not set
791
792#
793# Graphics support
794#
795# CONFIG_VGASTATE is not set
796# CONFIG_VIDEO_OUTPUT_CONTROL is not set
797# CONFIG_FB is not set
798# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
799
800#
801# Display device support
802#
803# CONFIG_DISPLAY_SUPPORT is not set
804
805#
806# Console display driver support
807#
808# CONFIG_VGA_CONSOLE is not set
809CONFIG_DUMMY_CONSOLE=y
810# CONFIG_SOUND is not set
811# CONFIG_HID_SUPPORT is not set
812# CONFIG_USB_SUPPORT is not set
813CONFIG_MMC=y
814# CONFIG_MMC_DEBUG is not set
815# CONFIG_MMC_UNSAFE_RESUME is not set
816
817#
818# MMC/SD/SDIO Card Drivers
819#
820CONFIG_MMC_BLOCK=m
821CONFIG_MMC_BLOCK_BOUNCE=y
822# CONFIG_SDIO_UART is not set
823# CONFIG_MMC_TEST is not set
824
825#
826# MMC/SD/SDIO Host Controller Drivers
827#
828CONFIG_MMC_SDHCI=m
829# CONFIG_MMC_SDHCI_PLTFM is not set
830# CONFIG_MMC_AT91 is not set
831# CONFIG_MMC_ATMELMCI is not set
832# CONFIG_MMC_MXC is not set
833# CONFIG_MEMSTICK is not set
834CONFIG_NEW_LEDS=y
835CONFIG_LEDS_CLASS=m
836
837#
838# LED drivers
839#
840# CONFIG_LEDS_PCA9532 is not set
841# CONFIG_LEDS_GPIO is not set
842# CONFIG_LEDS_LP3944 is not set
843# CONFIG_LEDS_PCA955X is not set
844# CONFIG_LEDS_BD2802 is not set
845# CONFIG_LEDS_LT3593 is not set
846
847#
848# LED Triggers
849#
850# CONFIG_LEDS_TRIGGERS is not set
851# CONFIG_ACCESSIBILITY is not set
852CONFIG_RTC_LIB=y
853CONFIG_RTC_CLASS=y
854CONFIG_RTC_HCTOSYS=y
855CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
856# CONFIG_RTC_DEBUG is not set
857
858#
859# RTC interfaces
860#
861CONFIG_RTC_INTF_SYSFS=y
862CONFIG_RTC_INTF_PROC=y
863CONFIG_RTC_INTF_DEV=y
864CONFIG_RTC_INTF_DEV_UIE_EMUL=y
865# CONFIG_RTC_DRV_TEST is not set
866
867#
868# I2C RTC drivers
869#
870# CONFIG_RTC_DRV_DS1307 is not set
871# CONFIG_RTC_DRV_DS1374 is not set
872# CONFIG_RTC_DRV_DS1672 is not set
873# CONFIG_RTC_DRV_MAX6900 is not set
874# CONFIG_RTC_DRV_RS5C372 is not set
875# CONFIG_RTC_DRV_ISL1208 is not set
876# CONFIG_RTC_DRV_X1205 is not set
877# CONFIG_RTC_DRV_PCF8563 is not set
878# CONFIG_RTC_DRV_PCF8583 is not set
879# CONFIG_RTC_DRV_M41T80 is not set
880# CONFIG_RTC_DRV_BQ32K is not set
881# CONFIG_RTC_DRV_S35390A is not set
882# CONFIG_RTC_DRV_FM3130 is not set
883# CONFIG_RTC_DRV_RX8581 is not set
884# CONFIG_RTC_DRV_RX8025 is not set
885
886#
887# SPI RTC drivers
888#
889
890#
891# Platform RTC drivers
892#
893# CONFIG_RTC_DRV_CMOS is not set
894# CONFIG_RTC_DRV_DS1286 is not set
895# CONFIG_RTC_DRV_DS1511 is not set
896# CONFIG_RTC_DRV_DS1553 is not set
897# CONFIG_RTC_DRV_DS1742 is not set
898# CONFIG_RTC_DRV_STK17TA8 is not set
899# CONFIG_RTC_DRV_M48T86 is not set
900# CONFIG_RTC_DRV_M48T35 is not set
901# CONFIG_RTC_DRV_M48T59 is not set
902# CONFIG_RTC_DRV_MSM6242 is not set
903# CONFIG_RTC_MXC is not set
904# CONFIG_RTC_DRV_BQ4802 is not set
905# CONFIG_RTC_DRV_RP5C01 is not set
906# CONFIG_RTC_DRV_V3020 is not set
907
908#
909# on-CPU RTC drivers
910#
911# CONFIG_DMADEVICES is not set
912# CONFIG_AUXDISPLAY is not set
913# CONFIG_UIO is not set
914
915#
916# TI VLYNQ
917#
918# CONFIG_STAGING is not set
919
920#
921# File systems
922#
923CONFIG_EXT2_FS=y
924CONFIG_EXT2_FS_XATTR=y
925CONFIG_EXT2_FS_POSIX_ACL=y
926CONFIG_EXT2_FS_SECURITY=y
927# CONFIG_EXT2_FS_XIP is not set
928CONFIG_EXT3_FS=y
929CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
930CONFIG_EXT3_FS_XATTR=y
931CONFIG_EXT3_FS_POSIX_ACL=y
932CONFIG_EXT3_FS_SECURITY=y
933CONFIG_EXT4_FS=y
934CONFIG_EXT4_FS_XATTR=y
935CONFIG_EXT4_FS_POSIX_ACL=y
936CONFIG_EXT4_FS_SECURITY=y
937# CONFIG_EXT4_DEBUG is not set
938CONFIG_JBD=y
939# CONFIG_JBD_DEBUG is not set
940CONFIG_JBD2=y
941# CONFIG_JBD2_DEBUG is not set
942CONFIG_FS_MBCACHE=y
943# CONFIG_REISERFS_FS is not set
944# CONFIG_JFS_FS is not set
945CONFIG_FS_POSIX_ACL=y
946# CONFIG_XFS_FS is not set
947# CONFIG_OCFS2_FS is not set
948# CONFIG_BTRFS_FS is not set
949# CONFIG_NILFS2_FS is not set
950CONFIG_FILE_LOCKING=y
951CONFIG_FSNOTIFY=y
952CONFIG_DNOTIFY=y
953CONFIG_INOTIFY=y
954CONFIG_INOTIFY_USER=y
955CONFIG_QUOTA=y
956CONFIG_QUOTA_NETLINK_INTERFACE=y
957# CONFIG_PRINT_QUOTA_WARNING is not set
958# CONFIG_QFMT_V1 is not set
959# CONFIG_QFMT_V2 is not set
960CONFIG_QUOTACTL=y
961CONFIG_AUTOFS_FS=y
962CONFIG_AUTOFS4_FS=y
963CONFIG_FUSE_FS=y
964# CONFIG_CUSE is not set
965
966#
967# Caches
968#
969# CONFIG_FSCACHE is not set
970
971#
972# CD-ROM/DVD Filesystems
973#
974CONFIG_ISO9660_FS=m
975CONFIG_JOLIET=y
976CONFIG_ZISOFS=y
977CONFIG_UDF_FS=m
978CONFIG_UDF_NLS=y
979
980#
981# DOS/FAT/NT Filesystems
982#
983CONFIG_FAT_FS=y
984CONFIG_MSDOS_FS=m
985CONFIG_VFAT_FS=y
986CONFIG_FAT_DEFAULT_CODEPAGE=437
987CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
988# CONFIG_NTFS_FS is not set
989
990#
991# Pseudo filesystems
992#
993CONFIG_PROC_FS=y
994CONFIG_PROC_SYSCTL=y
995CONFIG_PROC_PAGE_MONITOR=y
996CONFIG_SYSFS=y
997# CONFIG_TMPFS is not set
998# CONFIG_HUGETLB_PAGE is not set
999CONFIG_CONFIGFS_FS=m
1000CONFIG_MISC_FILESYSTEMS=y
1001# CONFIG_ADFS_FS is not set
1002# CONFIG_AFFS_FS is not set
1003# CONFIG_ECRYPT_FS is not set
1004# CONFIG_HFS_FS is not set
1005# CONFIG_HFSPLUS_FS is not set
1006# CONFIG_BEFS_FS is not set
1007# CONFIG_BFS_FS is not set
1008# CONFIG_EFS_FS is not set
1009# CONFIG_CRAMFS is not set
1010# CONFIG_SQUASHFS is not set
1011# CONFIG_VXFS_FS is not set
1012# CONFIG_MINIX_FS is not set
1013# CONFIG_OMFS_FS is not set
1014# CONFIG_HPFS_FS is not set
1015# CONFIG_QNX4FS_FS is not set
1016# CONFIG_ROMFS_FS is not set
1017# CONFIG_SYSV_FS is not set
1018# CONFIG_UFS_FS is not set
1019CONFIG_NETWORK_FILESYSTEMS=y
1020CONFIG_NFS_FS=y
1021CONFIG_NFS_V3=y
1022CONFIG_NFS_V3_ACL=y
1023CONFIG_NFS_V4=y
1024# CONFIG_NFS_V4_1 is not set
1025CONFIG_ROOT_NFS=y
1026# CONFIG_NFSD is not set
1027CONFIG_LOCKD=y
1028CONFIG_LOCKD_V4=y
1029CONFIG_NFS_ACL_SUPPORT=y
1030CONFIG_NFS_COMMON=y
1031CONFIG_SUNRPC=y
1032CONFIG_SUNRPC_GSS=y
1033CONFIG_RPCSEC_GSS_KRB5=y
1034# CONFIG_RPCSEC_GSS_SPKM3 is not set
1035# CONFIG_SMB_FS is not set
1036# CONFIG_CIFS is not set
1037# CONFIG_NCP_FS is not set
1038# CONFIG_CODA_FS is not set
1039# CONFIG_AFS_FS is not set
1040
1041#
1042# Partition Types
1043#
1044# CONFIG_PARTITION_ADVANCED is not set
1045CONFIG_MSDOS_PARTITION=y
1046CONFIG_NLS=y
1047CONFIG_NLS_DEFAULT="cp437"
1048CONFIG_NLS_CODEPAGE_437=y
1049# CONFIG_NLS_CODEPAGE_737 is not set
1050# CONFIG_NLS_CODEPAGE_775 is not set
1051# CONFIG_NLS_CODEPAGE_850 is not set
1052# CONFIG_NLS_CODEPAGE_852 is not set
1053# CONFIG_NLS_CODEPAGE_855 is not set
1054# CONFIG_NLS_CODEPAGE_857 is not set
1055# CONFIG_NLS_CODEPAGE_860 is not set
1056# CONFIG_NLS_CODEPAGE_861 is not set
1057# CONFIG_NLS_CODEPAGE_862 is not set
1058# CONFIG_NLS_CODEPAGE_863 is not set
1059# CONFIG_NLS_CODEPAGE_864 is not set
1060# CONFIG_NLS_CODEPAGE_865 is not set
1061# CONFIG_NLS_CODEPAGE_866 is not set
1062# CONFIG_NLS_CODEPAGE_869 is not set
1063# CONFIG_NLS_CODEPAGE_936 is not set
1064# CONFIG_NLS_CODEPAGE_950 is not set
1065# CONFIG_NLS_CODEPAGE_932 is not set
1066# CONFIG_NLS_CODEPAGE_949 is not set
1067# CONFIG_NLS_CODEPAGE_874 is not set
1068# CONFIG_NLS_ISO8859_8 is not set
1069# CONFIG_NLS_CODEPAGE_1250 is not set
1070# CONFIG_NLS_CODEPAGE_1251 is not set
1071CONFIG_NLS_ASCII=y
1072CONFIG_NLS_ISO8859_1=m
1073# CONFIG_NLS_ISO8859_2 is not set
1074# CONFIG_NLS_ISO8859_3 is not set
1075# CONFIG_NLS_ISO8859_4 is not set
1076# CONFIG_NLS_ISO8859_5 is not set
1077# CONFIG_NLS_ISO8859_6 is not set
1078# CONFIG_NLS_ISO8859_7 is not set
1079# CONFIG_NLS_ISO8859_9 is not set
1080# CONFIG_NLS_ISO8859_13 is not set
1081# CONFIG_NLS_ISO8859_14 is not set
1082CONFIG_NLS_ISO8859_15=m
1083# CONFIG_NLS_KOI8_R is not set
1084# CONFIG_NLS_KOI8_U is not set
1085CONFIG_NLS_UTF8=y
1086# CONFIG_DLM is not set
1087
1088#
1089# Kernel hacking
1090#
1091# CONFIG_PRINTK_TIME is not set
1092CONFIG_ENABLE_WARN_DEPRECATED=y
1093CONFIG_ENABLE_MUST_CHECK=y
1094CONFIG_FRAME_WARN=1024
1095CONFIG_MAGIC_SYSRQ=y
1096# CONFIG_STRIP_ASM_SYMS is not set
1097# CONFIG_UNUSED_SYMBOLS is not set
1098CONFIG_DEBUG_FS=y
1099# CONFIG_HEADERS_CHECK is not set
1100CONFIG_DEBUG_KERNEL=y
1101# CONFIG_DEBUG_SHIRQ is not set
1102# CONFIG_DETECT_SOFTLOCKUP is not set
1103# CONFIG_DETECT_HUNG_TASK is not set
1104# CONFIG_SCHED_DEBUG is not set
1105# CONFIG_SCHEDSTATS is not set
1106# CONFIG_TIMER_STATS is not set
1107# CONFIG_DEBUG_OBJECTS is not set
1108# CONFIG_DEBUG_KMEMLEAK is not set
1109# CONFIG_DEBUG_RT_MUTEXES is not set
1110# CONFIG_RT_MUTEX_TESTER is not set
1111# CONFIG_DEBUG_SPINLOCK is not set
1112# CONFIG_DEBUG_MUTEXES is not set
1113# CONFIG_DEBUG_LOCK_ALLOC is not set
1114# CONFIG_PROVE_LOCKING is not set
1115# CONFIG_LOCK_STAT is not set
1116# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1117# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1118# CONFIG_DEBUG_KOBJECT is not set
1119# CONFIG_DEBUG_BUGVERBOSE is not set
1120# CONFIG_DEBUG_INFO is not set
1121# CONFIG_DEBUG_VM is not set
1122# CONFIG_DEBUG_WRITECOUNT is not set
1123# CONFIG_DEBUG_MEMORY_INIT is not set
1124# CONFIG_DEBUG_LIST is not set
1125# CONFIG_DEBUG_SG is not set
1126# CONFIG_DEBUG_NOTIFIERS is not set
1127# CONFIG_DEBUG_CREDENTIALS is not set
1128CONFIG_FRAME_POINTER=y
1129# CONFIG_BOOT_PRINTK_DELAY is not set
1130# CONFIG_RCU_TORTURE_TEST is not set
1131# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1132# CONFIG_BACKTRACE_SELF_TEST is not set
1133# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1134# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1135# CONFIG_FAULT_INJECTION is not set
1136# CONFIG_LATENCYTOP is not set
1137# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1138# CONFIG_PAGE_POISONING is not set
1139CONFIG_HAVE_FUNCTION_TRACER=y
1140CONFIG_TRACING_SUPPORT=y
1141# CONFIG_FTRACE is not set
1142# CONFIG_DYNAMIC_DEBUG is not set
1143# CONFIG_SAMPLES is not set
1144CONFIG_HAVE_ARCH_KGDB=y
1145# CONFIG_KGDB is not set
1146# CONFIG_ARM_UNWIND is not set
1147# CONFIG_DEBUG_USER is not set
1148# CONFIG_DEBUG_ERRORS is not set
1149# CONFIG_DEBUG_STACK_USAGE is not set
1150CONFIG_DEBUG_LL=y
1151CONFIG_EARLY_PRINTK=y
1152# CONFIG_DEBUG_ICEDCC is not set
1153# CONFIG_OC_ETM is not set
1154
1155#
1156# Security options
1157#
1158CONFIG_KEYS=y
1159# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
1160# CONFIG_SECURITY is not set
1161CONFIG_SECURITYFS=y
1162# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1163# CONFIG_DEFAULT_SECURITY_SMACK is not set
1164# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1165CONFIG_DEFAULT_SECURITY_DAC=y
1166CONFIG_DEFAULT_SECURITY=""
1167CONFIG_CRYPTO=y
1168
1169#
1170# Crypto core or helper
1171#
1172CONFIG_CRYPTO_ALGAPI=y
1173CONFIG_CRYPTO_ALGAPI2=y
1174CONFIG_CRYPTO_AEAD2=y
1175CONFIG_CRYPTO_BLKCIPHER=y
1176CONFIG_CRYPTO_BLKCIPHER2=y
1177CONFIG_CRYPTO_HASH=y
1178CONFIG_CRYPTO_HASH2=y
1179CONFIG_CRYPTO_RNG2=y
1180CONFIG_CRYPTO_PCOMP=y
1181CONFIG_CRYPTO_MANAGER=y
1182CONFIG_CRYPTO_MANAGER2=y
1183# CONFIG_CRYPTO_GF128MUL is not set
1184# CONFIG_CRYPTO_NULL is not set
1185CONFIG_CRYPTO_WORKQUEUE=y
1186# CONFIG_CRYPTO_CRYPTD is not set
1187# CONFIG_CRYPTO_AUTHENC is not set
1188# CONFIG_CRYPTO_TEST is not set
1189
1190#
1191# Authenticated Encryption with Associated Data
1192#
1193# CONFIG_CRYPTO_CCM is not set
1194# CONFIG_CRYPTO_GCM is not set
1195# CONFIG_CRYPTO_SEQIV is not set
1196
1197#
1198# Block modes
1199#
1200CONFIG_CRYPTO_CBC=y
1201# CONFIG_CRYPTO_CTR is not set
1202# CONFIG_CRYPTO_CTS is not set
1203# CONFIG_CRYPTO_ECB is not set
1204# CONFIG_CRYPTO_LRW is not set
1205# CONFIG_CRYPTO_PCBC is not set
1206# CONFIG_CRYPTO_XTS is not set
1207
1208#
1209# Hash modes
1210#
1211# CONFIG_CRYPTO_HMAC is not set
1212# CONFIG_CRYPTO_XCBC is not set
1213# CONFIG_CRYPTO_VMAC is not set
1214
1215#
1216# Digest
1217#
1218CONFIG_CRYPTO_CRC32C=m
1219# CONFIG_CRYPTO_GHASH is not set
1220# CONFIG_CRYPTO_MD4 is not set
1221CONFIG_CRYPTO_MD5=y
1222# CONFIG_CRYPTO_MICHAEL_MIC is not set
1223# CONFIG_CRYPTO_RMD128 is not set
1224# CONFIG_CRYPTO_RMD160 is not set
1225# CONFIG_CRYPTO_RMD256 is not set
1226# CONFIG_CRYPTO_RMD320 is not set
1227# CONFIG_CRYPTO_SHA1 is not set
1228# CONFIG_CRYPTO_SHA256 is not set
1229# CONFIG_CRYPTO_SHA512 is not set
1230# CONFIG_CRYPTO_TGR192 is not set
1231# CONFIG_CRYPTO_WP512 is not set
1232
1233#
1234# Ciphers
1235#
1236# CONFIG_CRYPTO_AES is not set
1237# CONFIG_CRYPTO_ANUBIS is not set
1238# CONFIG_CRYPTO_ARC4 is not set
1239# CONFIG_CRYPTO_BLOWFISH is not set
1240# CONFIG_CRYPTO_CAMELLIA is not set
1241# CONFIG_CRYPTO_CAST5 is not set
1242# CONFIG_CRYPTO_CAST6 is not set
1243CONFIG_CRYPTO_DES=y
1244# CONFIG_CRYPTO_FCRYPT is not set
1245# CONFIG_CRYPTO_KHAZAD is not set
1246# CONFIG_CRYPTO_SALSA20 is not set
1247# CONFIG_CRYPTO_SEED is not set
1248# CONFIG_CRYPTO_SERPENT is not set
1249# CONFIG_CRYPTO_TEA is not set
1250# CONFIG_CRYPTO_TWOFISH is not set
1251
1252#
1253# Compression
1254#
1255CONFIG_CRYPTO_DEFLATE=y
1256# CONFIG_CRYPTO_ZLIB is not set
1257CONFIG_CRYPTO_LZO=y
1258
1259#
1260# Random Number Generation
1261#
1262# CONFIG_CRYPTO_ANSI_CPRNG is not set
1263# CONFIG_CRYPTO_HW is not set
1264# CONFIG_BINARY_PRINTF is not set
1265
1266#
1267# Library routines
1268#
1269CONFIG_BITREVERSE=y
1270CONFIG_RATIONAL=y
1271CONFIG_GENERIC_FIND_LAST_BIT=y
1272CONFIG_CRC_CCITT=m
1273CONFIG_CRC16=y
1274CONFIG_CRC_T10DIF=y
1275CONFIG_CRC_ITU_T=m
1276CONFIG_CRC32=y
1277CONFIG_CRC7=m
1278CONFIG_LIBCRC32C=m
1279CONFIG_ZLIB_INFLATE=y
1280CONFIG_ZLIB_DEFLATE=y
1281CONFIG_LZO_COMPRESS=y
1282CONFIG_LZO_DECOMPRESS=y
1283CONFIG_HAS_IOMEM=y
1284CONFIG_HAS_IOPORT=y
1285CONFIG_HAS_DMA=y
1286CONFIG_NLATTR=y
diff --git a/arch/arm/configs/nuc950_defconfig b/arch/arm/configs/nuc950_defconfig
index 97300ec478dd..51cc2a260cbb 100644
--- a/arch/arm/configs/nuc950_defconfig
+++ b/arch/arm/configs/nuc950_defconfig
@@ -590,8 +590,40 @@ CONFIG_SSB_POSSIBLE=y
590# 590#
591# CONFIG_VGASTATE is not set 591# CONFIG_VGASTATE is not set
592# CONFIG_VIDEO_OUTPUT_CONTROL is not set 592# CONFIG_VIDEO_OUTPUT_CONTROL is not set
593# CONFIG_FB is not set
594# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 593# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
594CONFIG_FB=y
595# CONFIG_FIRMWARE_EDID is not set
596# CONFIG_FB_DDC is not set
597# CONFIG_FB_BOOT_VESA_SUPPORT is not set
598CONFIG_FB_CFB_FILLRECT=y
599CONFIG_FB_CFB_COPYAREA=y
600CONFIG_FB_CFB_IMAGEBLIT=y
601# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
602# CONFIG_FB_SYS_FILLRECT is not set
603# CONFIG_FB_SYS_COPYAREA is not set
604# CONFIG_FB_SYS_IMAGEBLIT is not set
605# CONFIG_FB_FOREIGN_ENDIAN is not set
606# CONFIG_FB_SYS_FOPS is not set
607# CONFIG_FB_SVGALIB is not set
608# CONFIG_FB_MACMODES is not set
609# CONFIG_FB_BACKLIGHT is not set
610# CONFIG_FB_MODE_HELPERS is not set
611# CONFIG_FB_TILEBLITTING is not set
612
613#
614# Frame buffer hardware drivers
615#
616# CONFIG_FB_S1D13XXX is not set
617CONFIG_FB_NUC900=y
618CONFIG_GPM1040A0_320X240=y
619CONFIG_FB_NUC900_DEBUG=y
620# CONFIG_FB_VIRTUAL is not set
621# CONFIG_FB_METRONOME is not set
622# CONFIG_FB_MB862XX is not set
623# CONFIG_FB_BROADSHEET is not set
624# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
625
626
595 627
596# 628#
597# Display device support 629# Display device support
@@ -603,6 +635,25 @@ CONFIG_SSB_POSSIBLE=y
603# 635#
604# CONFIG_VGA_CONSOLE is not set 636# CONFIG_VGA_CONSOLE is not set
605CONFIG_DUMMY_CONSOLE=y 637CONFIG_DUMMY_CONSOLE=y
638CONFIG_FRAMEBUFFER_CONSOLE=y
639CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
640# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
641CONFIG_FONTS=y
642# CONFIG_FONT_8x8 is not set
643CONFIG_FONT_8x16=y
644# CONFIG_FONT_6x11 is not set
645# CONFIG_FONT_7x14 is not set
646# CONFIG_FONT_PEARL_8x8 is not set
647# CONFIG_FONT_ACORN_8x8 is not set
648# CONFIG_FONT_MINI_4x6 is not set
649# CONFIG_FONT_SUN8x16 is not set
650# CONFIG_FONT_SUN12x22 is not set
651# CONFIG_FONT_10x18 is not set
652CONFIG_LOGO=y
653# CONFIG_LOGO_LINUX_MONO is not set
654# CONFIG_LOGO_LINUX_VGA16 is not set
655CONFIG_LOGO_LINUX_CLUT224=y
656
606# CONFIG_SOUND is not set 657# CONFIG_SOUND is not set
607# CONFIG_HID_SUPPORT is not set 658# CONFIG_HID_SUPPORT is not set
608CONFIG_USB_SUPPORT=y 659CONFIG_USB_SUPPORT=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 85b05d3e279b..ee1ebd8dfa80 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32-rc6 3# Linux kernel version: 2.6.33-rc6
4# Sat Nov 7 20:52:21 2009 4# Thu Feb 4 23:30:00 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -32,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32 32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION="" 33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y 34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
35CONFIG_SWAP=y 41CONFIG_SWAP=y
36CONFIG_SYSVIPC=y 42CONFIG_SYSVIPC=y
37CONFIG_SYSVIPC_SYSCTL=y 43CONFIG_SYSVIPC_SYSCTL=y
@@ -45,6 +51,7 @@ CONFIG_SYSVIPC_SYSCTL=y
45# 51#
46CONFIG_TREE_RCU=y 52CONFIG_TREE_RCU=y
47# CONFIG_TREE_PREEMPT_RCU is not set 53# CONFIG_TREE_PREEMPT_RCU is not set
54# CONFIG_TINY_RCU is not set
48# CONFIG_RCU_TRACE is not set 55# CONFIG_RCU_TRACE is not set
49CONFIG_RCU_FANOUT=32 56CONFIG_RCU_FANOUT=32
50# CONFIG_RCU_FANOUT_EXACT is not set 57# CONFIG_RCU_FANOUT_EXACT is not set
@@ -122,14 +129,41 @@ CONFIG_LBDAF=y
122# IO Schedulers 129# IO Schedulers
123# 130#
124CONFIG_IOSCHED_NOOP=y 131CONFIG_IOSCHED_NOOP=y
125CONFIG_IOSCHED_AS=y
126CONFIG_IOSCHED_DEADLINE=y 132CONFIG_IOSCHED_DEADLINE=y
127CONFIG_IOSCHED_CFQ=y 133CONFIG_IOSCHED_CFQ=y
128# CONFIG_DEFAULT_AS is not set
129# CONFIG_DEFAULT_DEADLINE is not set 134# CONFIG_DEFAULT_DEADLINE is not set
130CONFIG_DEFAULT_CFQ=y 135CONFIG_DEFAULT_CFQ=y
131# CONFIG_DEFAULT_NOOP is not set 136# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="cfq" 137CONFIG_DEFAULT_IOSCHED="cfq"
138# CONFIG_INLINE_SPIN_TRYLOCK is not set
139# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
140# CONFIG_INLINE_SPIN_LOCK is not set
141# CONFIG_INLINE_SPIN_LOCK_BH is not set
142# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
144# CONFIG_INLINE_SPIN_UNLOCK is not set
145# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
146# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
148# CONFIG_INLINE_READ_TRYLOCK is not set
149# CONFIG_INLINE_READ_LOCK is not set
150# CONFIG_INLINE_READ_LOCK_BH is not set
151# CONFIG_INLINE_READ_LOCK_IRQ is not set
152# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
153# CONFIG_INLINE_READ_UNLOCK is not set
154# CONFIG_INLINE_READ_UNLOCK_BH is not set
155# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
157# CONFIG_INLINE_WRITE_TRYLOCK is not set
158# CONFIG_INLINE_WRITE_LOCK is not set
159# CONFIG_INLINE_WRITE_LOCK_BH is not set
160# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
162# CONFIG_INLINE_WRITE_UNLOCK is not set
163# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
164# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
166# CONFIG_MUTEX_SPIN_ON_OWNER is not set
133# CONFIG_FREEZER is not set 167# CONFIG_FREEZER is not set
134 168
135# 169#
@@ -158,6 +192,7 @@ CONFIG_MMU=y
158# CONFIG_ARCH_IXP2000 is not set 192# CONFIG_ARCH_IXP2000 is not set
159# CONFIG_ARCH_IXP4XX is not set 193# CONFIG_ARCH_IXP4XX is not set
160# CONFIG_ARCH_L7200 is not set 194# CONFIG_ARCH_L7200 is not set
195# CONFIG_ARCH_DOVE is not set
161# CONFIG_ARCH_KIRKWOOD is not set 196# CONFIG_ARCH_KIRKWOOD is not set
162# CONFIG_ARCH_LOKI is not set 197# CONFIG_ARCH_LOKI is not set
163# CONFIG_ARCH_MV78XX0 is not set 198# CONFIG_ARCH_MV78XX0 is not set
@@ -180,6 +215,7 @@ CONFIG_ARCH_ORION5X=y
180# CONFIG_ARCH_DAVINCI is not set 215# CONFIG_ARCH_DAVINCI is not set
181# CONFIG_ARCH_OMAP is not set 216# CONFIG_ARCH_OMAP is not set
182# CONFIG_ARCH_BCMRING is not set 217# CONFIG_ARCH_BCMRING is not set
218# CONFIG_ARCH_U8500 is not set
183 219
184# 220#
185# Orion Implementations 221# Orion Implementations
@@ -192,6 +228,7 @@ CONFIG_MACH_TS209=y
192CONFIG_MACH_TERASTATION_PRO2=y 228CONFIG_MACH_TERASTATION_PRO2=y
193CONFIG_MACH_LINKSTATION_PRO=y 229CONFIG_MACH_LINKSTATION_PRO=y
194CONFIG_MACH_LINKSTATION_MINI=y 230CONFIG_MACH_LINKSTATION_MINI=y
231CONFIG_MACH_LINKSTATION_LS_HGL=y
195CONFIG_MACH_TS409=y 232CONFIG_MACH_TS409=y
196CONFIG_MACH_WRT350N_V2=y 233CONFIG_MACH_WRT350N_V2=y
197CONFIG_MACH_TS78XX=y 234CONFIG_MACH_TS78XX=y
@@ -268,12 +305,10 @@ CONFIG_FLATMEM_MANUAL=y
268CONFIG_FLATMEM=y 305CONFIG_FLATMEM=y
269CONFIG_FLAT_NODE_MEM_MAP=y 306CONFIG_FLAT_NODE_MEM_MAP=y
270CONFIG_PAGEFLAGS_EXTENDED=y 307CONFIG_PAGEFLAGS_EXTENDED=y
271CONFIG_SPLIT_PTLOCK_CPUS=4096 308CONFIG_SPLIT_PTLOCK_CPUS=999999
272# CONFIG_PHYS_ADDR_T_64BIT is not set 309# CONFIG_PHYS_ADDR_T_64BIT is not set
273CONFIG_ZONE_DMA_FLAG=0 310CONFIG_ZONE_DMA_FLAG=0
274CONFIG_VIRT_TO_BUS=y 311CONFIG_VIRT_TO_BUS=y
275CONFIG_HAVE_MLOCK=y
276CONFIG_HAVE_MLOCKED_PAGE_BIT=y
277# CONFIG_KSM is not set 312# CONFIG_KSM is not set
278CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 313CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
279CONFIG_LEDS=y 314CONFIG_LEDS=y
@@ -412,10 +447,6 @@ CONFIG_NET_PKTGEN=m
412# CONFIG_AF_RXRPC is not set 447# CONFIG_AF_RXRPC is not set
413CONFIG_WIRELESS=y 448CONFIG_WIRELESS=y
414# CONFIG_CFG80211 is not set 449# CONFIG_CFG80211 is not set
415CONFIG_CFG80211_DEFAULT_PS_VALUE=0
416# CONFIG_WIRELESS_OLD_REGULATORY is not set
417CONFIG_WIRELESS_EXT=y
418CONFIG_WIRELESS_EXT_SYSFS=y
419# CONFIG_LIB80211 is not set 450# CONFIG_LIB80211 is not set
420 451
421# 452#
@@ -554,6 +585,10 @@ CONFIG_BLK_DEV=y
554# CONFIG_BLK_DEV_COW_COMMON is not set 585# CONFIG_BLK_DEV_COW_COMMON is not set
555CONFIG_BLK_DEV_LOOP=y 586CONFIG_BLK_DEV_LOOP=y
556# CONFIG_BLK_DEV_CRYPTOLOOP is not set 587# CONFIG_BLK_DEV_CRYPTOLOOP is not set
588
589#
590# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
591#
557# CONFIG_BLK_DEV_NBD is not set 592# CONFIG_BLK_DEV_NBD is not set
558# CONFIG_BLK_DEV_SX8 is not set 593# CONFIG_BLK_DEV_SX8 is not set
559# CONFIG_BLK_DEV_UB is not set 594# CONFIG_BLK_DEV_UB is not set
@@ -562,6 +597,7 @@ CONFIG_BLK_DEV_LOOP=y
562# CONFIG_ATA_OVER_ETH is not set 597# CONFIG_ATA_OVER_ETH is not set
563# CONFIG_MG_DISK is not set 598# CONFIG_MG_DISK is not set
564CONFIG_MISC_DEVICES=y 599CONFIG_MISC_DEVICES=y
600# CONFIG_AD525X_DPOT is not set
565# CONFIG_PHANTOM is not set 601# CONFIG_PHANTOM is not set
566# CONFIG_SGI_IOC4 is not set 602# CONFIG_SGI_IOC4 is not set
567# CONFIG_TIFM_CORE is not set 603# CONFIG_TIFM_CORE is not set
@@ -569,6 +605,7 @@ CONFIG_MISC_DEVICES=y
569# CONFIG_ENCLOSURE_SERVICES is not set 605# CONFIG_ENCLOSURE_SERVICES is not set
570# CONFIG_HP_ILO is not set 606# CONFIG_HP_ILO is not set
571# CONFIG_ISL29003 is not set 607# CONFIG_ISL29003 is not set
608# CONFIG_DS1682 is not set
572# CONFIG_C2PORT is not set 609# CONFIG_C2PORT is not set
573 610
574# 611#
@@ -621,7 +658,9 @@ CONFIG_SCSI_LOWLEVEL=y
621# CONFIG_SCSI_BNX2_ISCSI is not set 658# CONFIG_SCSI_BNX2_ISCSI is not set
622# CONFIG_BE2ISCSI is not set 659# CONFIG_BE2ISCSI is not set
623# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 660# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
661# CONFIG_SCSI_HPSA is not set
624# CONFIG_SCSI_3W_9XXX is not set 662# CONFIG_SCSI_3W_9XXX is not set
663# CONFIG_SCSI_3W_SAS is not set
625# CONFIG_SCSI_ACARD is not set 664# CONFIG_SCSI_ACARD is not set
626# CONFIG_SCSI_AACRAID is not set 665# CONFIG_SCSI_AACRAID is not set
627# CONFIG_SCSI_AIC7XXX is not set 666# CONFIG_SCSI_AIC7XXX is not set
@@ -657,6 +696,7 @@ CONFIG_SCSI_LOWLEVEL=y
657# CONFIG_SCSI_NSP32 is not set 696# CONFIG_SCSI_NSP32 is not set
658# CONFIG_SCSI_DEBUG is not set 697# CONFIG_SCSI_DEBUG is not set
659# CONFIG_SCSI_PMCRAID is not set 698# CONFIG_SCSI_PMCRAID is not set
699# CONFIG_SCSI_PM8001 is not set
660# CONFIG_SCSI_SRP is not set 700# CONFIG_SCSI_SRP is not set
661# CONFIG_SCSI_BFA_FC is not set 701# CONFIG_SCSI_BFA_FC is not set
662# CONFIG_SCSI_DH is not set 702# CONFIG_SCSI_DH is not set
@@ -711,15 +751,16 @@ CONFIG_SATA_MV=y
711# CONFIG_PATA_NS87415 is not set 751# CONFIG_PATA_NS87415 is not set
712# CONFIG_PATA_OPTI is not set 752# CONFIG_PATA_OPTI is not set
713# CONFIG_PATA_OPTIDMA is not set 753# CONFIG_PATA_OPTIDMA is not set
754# CONFIG_PATA_PDC2027X is not set
714# CONFIG_PATA_PDC_OLD is not set 755# CONFIG_PATA_PDC_OLD is not set
715# CONFIG_PATA_RADISYS is not set 756# CONFIG_PATA_RADISYS is not set
716# CONFIG_PATA_RDC is not set 757# CONFIG_PATA_RDC is not set
717# CONFIG_PATA_RZ1000 is not set 758# CONFIG_PATA_RZ1000 is not set
718# CONFIG_PATA_SC1200 is not set 759# CONFIG_PATA_SC1200 is not set
719# CONFIG_PATA_SERVERWORKS is not set 760# CONFIG_PATA_SERVERWORKS is not set
720# CONFIG_PATA_PDC2027X is not set
721# CONFIG_PATA_SIL680 is not set 761# CONFIG_PATA_SIL680 is not set
722# CONFIG_PATA_SIS is not set 762# CONFIG_PATA_SIS is not set
763# CONFIG_PATA_TOSHIBA is not set
723# CONFIG_PATA_VIA is not set 764# CONFIG_PATA_VIA is not set
724# CONFIG_PATA_WINBOND is not set 765# CONFIG_PATA_WINBOND is not set
725# CONFIG_PATA_PLATFORM is not set 766# CONFIG_PATA_PLATFORM is not set
@@ -736,7 +777,7 @@ CONFIG_SATA_MV=y
736# 777#
737 778
738# 779#
739# See the help texts for more information. 780# The newer stack is recommended.
740# 781#
741# CONFIG_FIREWIRE is not set 782# CONFIG_FIREWIRE is not set
742# CONFIG_IEEE1394 is not set 783# CONFIG_IEEE1394 is not set
@@ -842,8 +883,10 @@ CONFIG_MV643XX_ETH=y
842# CONFIG_NETDEV_10000 is not set 883# CONFIG_NETDEV_10000 is not set
843# CONFIG_TR is not set 884# CONFIG_TR is not set
844CONFIG_WLAN=y 885CONFIG_WLAN=y
845# CONFIG_WLAN_PRE80211 is not set 886# CONFIG_ATMEL is not set
846# CONFIG_WLAN_80211 is not set 887# CONFIG_PRISM54 is not set
888# CONFIG_USB_ZD1201 is not set
889# CONFIG_HOSTAP is not set
847 890
848# 891#
849# Enable WiMAX (Networking options) to see the WiMAX drivers 892# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -866,6 +909,7 @@ CONFIG_WLAN=y
866# CONFIG_NETCONSOLE is not set 909# CONFIG_NETCONSOLE is not set
867# CONFIG_NETPOLL is not set 910# CONFIG_NETPOLL is not set
868# CONFIG_NET_POLL_CONTROLLER is not set 911# CONFIG_NET_POLL_CONTROLLER is not set
912# CONFIG_VMXNET3 is not set
869# CONFIG_ISDN is not set 913# CONFIG_ISDN is not set
870# CONFIG_PHONE is not set 914# CONFIG_PHONE is not set
871 915
@@ -875,6 +919,7 @@ CONFIG_WLAN=y
875CONFIG_INPUT=y 919CONFIG_INPUT=y
876# CONFIG_INPUT_FF_MEMLESS is not set 920# CONFIG_INPUT_FF_MEMLESS is not set
877# CONFIG_INPUT_POLLDEV is not set 921# CONFIG_INPUT_POLLDEV is not set
922# CONFIG_INPUT_SPARSEKMAP is not set
878 923
879# 924#
880# Userland interfaces 925# Userland interfaces
@@ -993,11 +1038,6 @@ CONFIG_I2C_MV64XXX=y
993# CONFIG_I2C_TINY_USB is not set 1038# CONFIG_I2C_TINY_USB is not set
994 1039
995# 1040#
996# Graphics adapter I2C/DDC channel drivers
997#
998# CONFIG_I2C_VOODOO3 is not set
999
1000#
1001# Other I2C/SMBus bus drivers 1041# Other I2C/SMBus bus drivers
1002# 1042#
1003# CONFIG_I2C_PCA_PLATFORM is not set 1043# CONFIG_I2C_PCA_PLATFORM is not set
@@ -1006,7 +1046,6 @@ CONFIG_I2C_MV64XXX=y
1006# 1046#
1007# Miscellaneous I2C Chip support 1047# Miscellaneous I2C Chip support
1008# 1048#
1009# CONFIG_DS1682 is not set
1010# CONFIG_SENSORS_TSL2550 is not set 1049# CONFIG_SENSORS_TSL2550 is not set
1011# CONFIG_I2C_DEBUG_CORE is not set 1050# CONFIG_I2C_DEBUG_CORE is not set
1012# CONFIG_I2C_DEBUG_ALGO is not set 1051# CONFIG_I2C_DEBUG_ALGO is not set
@@ -1033,10 +1072,12 @@ CONFIG_GPIO_SYSFS=y
1033# CONFIG_GPIO_MAX732X is not set 1072# CONFIG_GPIO_MAX732X is not set
1034# CONFIG_GPIO_PCA953X is not set 1073# CONFIG_GPIO_PCA953X is not set
1035# CONFIG_GPIO_PCF857X is not set 1074# CONFIG_GPIO_PCF857X is not set
1075# CONFIG_GPIO_ADP5588 is not set
1036 1076
1037# 1077#
1038# PCI GPIO expanders: 1078# PCI GPIO expanders:
1039# 1079#
1080# CONFIG_GPIO_CS5535 is not set
1040# CONFIG_GPIO_BT8XX is not set 1081# CONFIG_GPIO_BT8XX is not set
1041# CONFIG_GPIO_LANGWELL is not set 1082# CONFIG_GPIO_LANGWELL is not set
1042 1083
@@ -1079,6 +1120,7 @@ CONFIG_HWMON=y
1079# CONFIG_SENSORS_GL520SM is not set 1120# CONFIG_SENSORS_GL520SM is not set
1080# CONFIG_SENSORS_IT87 is not set 1121# CONFIG_SENSORS_IT87 is not set
1081# CONFIG_SENSORS_LM63 is not set 1122# CONFIG_SENSORS_LM63 is not set
1123# CONFIG_SENSORS_LM73 is not set
1082CONFIG_SENSORS_LM75=y 1124CONFIG_SENSORS_LM75=y
1083# CONFIG_SENSORS_LM77 is not set 1125# CONFIG_SENSORS_LM77 is not set
1084# CONFIG_SENSORS_LM78 is not set 1126# CONFIG_SENSORS_LM78 is not set
@@ -1104,6 +1146,7 @@ CONFIG_SENSORS_LM75=y
1104# CONFIG_SENSORS_SMSC47M192 is not set 1146# CONFIG_SENSORS_SMSC47M192 is not set
1105# CONFIG_SENSORS_SMSC47B397 is not set 1147# CONFIG_SENSORS_SMSC47B397 is not set
1106# CONFIG_SENSORS_ADS7828 is not set 1148# CONFIG_SENSORS_ADS7828 is not set
1149# CONFIG_SENSORS_AMC6821 is not set
1107# CONFIG_SENSORS_THMC50 is not set 1150# CONFIG_SENSORS_THMC50 is not set
1108# CONFIG_SENSORS_TMP401 is not set 1151# CONFIG_SENSORS_TMP401 is not set
1109# CONFIG_SENSORS_TMP421 is not set 1152# CONFIG_SENSORS_TMP421 is not set
@@ -1118,6 +1161,7 @@ CONFIG_SENSORS_LM75=y
1118# CONFIG_SENSORS_W83L786NG is not set 1161# CONFIG_SENSORS_W83L786NG is not set
1119# CONFIG_SENSORS_W83627HF is not set 1162# CONFIG_SENSORS_W83627HF is not set
1120# CONFIG_SENSORS_W83627EHF is not set 1163# CONFIG_SENSORS_W83627EHF is not set
1164# CONFIG_SENSORS_LIS3_I2C is not set
1121# CONFIG_THERMAL is not set 1165# CONFIG_THERMAL is not set
1122# CONFIG_WATCHDOG is not set 1166# CONFIG_WATCHDOG is not set
1123CONFIG_SSB_POSSIBLE=y 1167CONFIG_SSB_POSSIBLE=y
@@ -1140,11 +1184,13 @@ CONFIG_SSB_POSSIBLE=y
1140# CONFIG_MFD_TMIO is not set 1184# CONFIG_MFD_TMIO is not set
1141# CONFIG_MFD_TC6393XB is not set 1185# CONFIG_MFD_TC6393XB is not set
1142# CONFIG_PMIC_DA903X is not set 1186# CONFIG_PMIC_DA903X is not set
1187# CONFIG_PMIC_ADP5520 is not set
1143# CONFIG_MFD_WM8400 is not set 1188# CONFIG_MFD_WM8400 is not set
1144# CONFIG_MFD_WM831X is not set 1189# CONFIG_MFD_WM831X is not set
1145# CONFIG_MFD_WM8350_I2C is not set 1190# CONFIG_MFD_WM8350_I2C is not set
1146# CONFIG_MFD_PCF50633 is not set 1191# CONFIG_MFD_PCF50633 is not set
1147# CONFIG_AB3100_CORE is not set 1192# CONFIG_AB3100_CORE is not set
1193# CONFIG_MFD_88PM8607 is not set
1148# CONFIG_REGULATOR is not set 1194# CONFIG_REGULATOR is not set
1149# CONFIG_MEDIA_SUPPORT is not set 1195# CONFIG_MEDIA_SUPPORT is not set
1150 1196
@@ -1316,6 +1362,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
1316# OTG and related infrastructure 1362# OTG and related infrastructure
1317# 1363#
1318# CONFIG_USB_GPIO_VBUS is not set 1364# CONFIG_USB_GPIO_VBUS is not set
1365# CONFIG_USB_ULPI is not set
1319# CONFIG_NOP_USB_XCEIV is not set 1366# CONFIG_NOP_USB_XCEIV is not set
1320# CONFIG_UWB is not set 1367# CONFIG_UWB is not set
1321# CONFIG_MMC is not set 1368# CONFIG_MMC is not set
@@ -1332,6 +1379,7 @@ CONFIG_LEDS_GPIO_PLATFORM=y
1332# CONFIG_LEDS_LP3944 is not set 1379# CONFIG_LEDS_LP3944 is not set
1333# CONFIG_LEDS_PCA955X is not set 1380# CONFIG_LEDS_PCA955X is not set
1334# CONFIG_LEDS_BD2802 is not set 1381# CONFIG_LEDS_BD2802 is not set
1382# CONFIG_LEDS_LT3593 is not set
1335 1383
1336# 1384#
1337# LED Triggers 1385# LED Triggers
@@ -1377,6 +1425,7 @@ CONFIG_RTC_DRV_PCF8563=y
1377# CONFIG_RTC_DRV_PCF8583 is not set 1425# CONFIG_RTC_DRV_PCF8583 is not set
1378CONFIG_RTC_DRV_M41T80=y 1426CONFIG_RTC_DRV_M41T80=y
1379# CONFIG_RTC_DRV_M41T80_WDT is not set 1427# CONFIG_RTC_DRV_M41T80_WDT is not set
1428# CONFIG_RTC_DRV_BQ32K is not set
1380CONFIG_RTC_DRV_S35390A=y 1429CONFIG_RTC_DRV_S35390A=y
1381# CONFIG_RTC_DRV_FM3130 is not set 1430# CONFIG_RTC_DRV_FM3130 is not set
1382# CONFIG_RTC_DRV_RX8581 is not set 1431# CONFIG_RTC_DRV_RX8581 is not set
@@ -1398,7 +1447,9 @@ CONFIG_RTC_DRV_S35390A=y
1398CONFIG_RTC_DRV_M48T86=y 1447CONFIG_RTC_DRV_M48T86=y
1399# CONFIG_RTC_DRV_M48T35 is not set 1448# CONFIG_RTC_DRV_M48T35 is not set
1400# CONFIG_RTC_DRV_M48T59 is not set 1449# CONFIG_RTC_DRV_M48T59 is not set
1450# CONFIG_RTC_DRV_MSM6242 is not set
1401# CONFIG_RTC_DRV_BQ4802 is not set 1451# CONFIG_RTC_DRV_BQ4802 is not set
1452# CONFIG_RTC_DRV_RP5C01 is not set
1402# CONFIG_RTC_DRV_V3020 is not set 1453# CONFIG_RTC_DRV_V3020 is not set
1403 1454
1404# 1455#
@@ -1686,7 +1737,9 @@ CONFIG_DEBUG_USER=y
1686CONFIG_DEBUG_ERRORS=y 1737CONFIG_DEBUG_ERRORS=y
1687# CONFIG_DEBUG_STACK_USAGE is not set 1738# CONFIG_DEBUG_STACK_USAGE is not set
1688CONFIG_DEBUG_LL=y 1739CONFIG_DEBUG_LL=y
1740# CONFIG_EARLY_PRINTK is not set
1689# CONFIG_DEBUG_ICEDCC is not set 1741# CONFIG_DEBUG_ICEDCC is not set
1742# CONFIG_OC_ETM is not set
1690 1743
1691# 1744#
1692# Security options 1745# Security options
@@ -1694,7 +1747,11 @@ CONFIG_DEBUG_LL=y
1694# CONFIG_KEYS is not set 1747# CONFIG_KEYS is not set
1695# CONFIG_SECURITY is not set 1748# CONFIG_SECURITY is not set
1696# CONFIG_SECURITYFS is not set 1749# CONFIG_SECURITYFS is not set
1697# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1750# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1751# CONFIG_DEFAULT_SECURITY_SMACK is not set
1752# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1753CONFIG_DEFAULT_SECURITY_DAC=y
1754CONFIG_DEFAULT_SECURITY=""
1698CONFIG_CRYPTO=y 1755CONFIG_CRYPTO=y
1699 1756
1700# 1757#
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
index 791b8c39aefc..113511f91eb7 100644
--- a/arch/arm/configs/pxa168_defconfig
+++ b/arch/arm/configs/pxa168_defconfig
@@ -1,15 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3 3# Linux kernel version: 2.6.33-rc3
4# Fri Mar 20 13:43:13 2009 4# Tue Jan 12 08:57:10 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y 9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 11CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 12CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y 13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,13 +16,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y 16CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y 17CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y 18CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y 19CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y 20CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000 22CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
28 25
29# 26#
30# General setup 27# General setup
@@ -35,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
35CONFIG_INIT_ENV_ARG_LIMIT=32 32CONFIG_INIT_ENV_ARG_LIMIT=32
36CONFIG_LOCALVERSION="" 33CONFIG_LOCALVERSION=""
37CONFIG_LOCALVERSION_AUTO=y 34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
38CONFIG_SWAP=y 41CONFIG_SWAP=y
39CONFIG_SYSVIPC=y 42CONFIG_SYSVIPC=y
40CONFIG_SYSVIPC_SYSCTL=y 43CONFIG_SYSVIPC_SYSCTL=y
@@ -46,11 +49,13 @@ CONFIG_SYSVIPC_SYSCTL=y
46# 49#
47# RCU Subsystem 50# RCU Subsystem
48# 51#
49CONFIG_CLASSIC_RCU=y 52CONFIG_TREE_RCU=y
50# CONFIG_TREE_RCU is not set 53# CONFIG_TREE_PREEMPT_RCU is not set
51# CONFIG_PREEMPT_RCU is not set 54# CONFIG_TINY_RCU is not set
55# CONFIG_RCU_TRACE is not set
56CONFIG_RCU_FANOUT=32
57# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set 58# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
54# CONFIG_IKCONFIG is not set 59# CONFIG_IKCONFIG is not set
55CONFIG_LOG_BUF_SHIFT=14 60CONFIG_LOG_BUF_SHIFT=14
56# CONFIG_GROUP_SCHED is not set 61# CONFIG_GROUP_SCHED is not set
@@ -64,10 +69,10 @@ CONFIG_NAMESPACES=y
64# CONFIG_USER_NS is not set 69# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set 70# CONFIG_PID_NS is not set
66# CONFIG_NET_NS is not set 71# CONFIG_NET_NS is not set
67CONFIG_BLK_DEV_INITRD=y 72# CONFIG_BLK_DEV_INITRD is not set
68CONFIG_INITRAMFS_SOURCE=""
69CONFIG_CC_OPTIMIZE_FOR_SIZE=y 73CONFIG_CC_OPTIMIZE_FOR_SIZE=y
70CONFIG_SYSCTL=y 74CONFIG_SYSCTL=y
75CONFIG_ANON_INODES=y
71# CONFIG_EMBEDDED is not set 76# CONFIG_EMBEDDED is not set
72CONFIG_UID16=y 77CONFIG_UID16=y
73CONFIG_SYSCTL_SYSCALL=y 78CONFIG_SYSCTL_SYSCALL=y
@@ -78,17 +83,20 @@ CONFIG_HOTPLUG=y
78CONFIG_PRINTK=y 83CONFIG_PRINTK=y
79CONFIG_BUG=y 84CONFIG_BUG=y
80CONFIG_ELF_CORE=y 85CONFIG_ELF_CORE=y
81CONFIG_COMPAT_BRK=y
82CONFIG_BASE_FULL=y 86CONFIG_BASE_FULL=y
83CONFIG_FUTEX=y 87CONFIG_FUTEX=y
84CONFIG_ANON_INODES=y
85CONFIG_EPOLL=y 88CONFIG_EPOLL=y
86CONFIG_SIGNALFD=y 89CONFIG_SIGNALFD=y
87CONFIG_TIMERFD=y 90CONFIG_TIMERFD=y
88CONFIG_EVENTFD=y 91CONFIG_EVENTFD=y
89CONFIG_SHMEM=y 92CONFIG_SHMEM=y
90CONFIG_AIO=y 93CONFIG_AIO=y
94
95#
96# Kernel Performance Events And Counters
97#
91CONFIG_VM_EVENT_COUNTERS=y 98CONFIG_VM_EVENT_COUNTERS=y
99CONFIG_COMPAT_BRK=y
92CONFIG_SLAB=y 100CONFIG_SLAB=y
93# CONFIG_SLUB is not set 101# CONFIG_SLUB is not set
94# CONFIG_SLOB is not set 102# CONFIG_SLOB is not set
@@ -98,6 +106,11 @@ CONFIG_HAVE_OPROFILE=y
98CONFIG_HAVE_KPROBES=y 106CONFIG_HAVE_KPROBES=y
99CONFIG_HAVE_KRETPROBES=y 107CONFIG_HAVE_KRETPROBES=y
100CONFIG_HAVE_CLK=y 108CONFIG_HAVE_CLK=y
109
110#
111# GCOV-based kernel profiling
112#
113# CONFIG_SLOW_WORK is not set
101CONFIG_HAVE_GENERIC_DMA_COHERENT=y 114CONFIG_HAVE_GENERIC_DMA_COHERENT=y
102CONFIG_SLABINFO=y 115CONFIG_SLABINFO=y
103CONFIG_RT_MUTEXES=y 116CONFIG_RT_MUTEXES=y
@@ -109,8 +122,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
109# CONFIG_MODVERSIONS is not set 122# CONFIG_MODVERSIONS is not set
110# CONFIG_MODULE_SRCVERSION_ALL is not set 123# CONFIG_MODULE_SRCVERSION_ALL is not set
111CONFIG_BLOCK=y 124CONFIG_BLOCK=y
112# CONFIG_LBD is not set 125CONFIG_LBDAF=y
113# CONFIG_BLK_DEV_IO_TRACE is not set
114# CONFIG_BLK_DEV_BSG is not set 126# CONFIG_BLK_DEV_BSG is not set
115# CONFIG_BLK_DEV_INTEGRITY is not set 127# CONFIG_BLK_DEV_INTEGRITY is not set
116 128
@@ -118,31 +130,62 @@ CONFIG_BLOCK=y
118# IO Schedulers 130# IO Schedulers
119# 131#
120CONFIG_IOSCHED_NOOP=y 132CONFIG_IOSCHED_NOOP=y
121CONFIG_IOSCHED_AS=y
122CONFIG_IOSCHED_DEADLINE=y 133CONFIG_IOSCHED_DEADLINE=y
123CONFIG_IOSCHED_CFQ=y 134CONFIG_IOSCHED_CFQ=y
124# CONFIG_DEFAULT_AS is not set
125# CONFIG_DEFAULT_DEADLINE is not set 135# CONFIG_DEFAULT_DEADLINE is not set
126CONFIG_DEFAULT_CFQ=y 136CONFIG_DEFAULT_CFQ=y
127# CONFIG_DEFAULT_NOOP is not set 137# CONFIG_DEFAULT_NOOP is not set
128CONFIG_DEFAULT_IOSCHED="cfq" 138CONFIG_DEFAULT_IOSCHED="cfq"
139# CONFIG_INLINE_SPIN_TRYLOCK is not set
140# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK is not set
142# CONFIG_INLINE_SPIN_LOCK_BH is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
144# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
145# CONFIG_INLINE_SPIN_UNLOCK is not set
146# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
149# CONFIG_INLINE_READ_TRYLOCK is not set
150# CONFIG_INLINE_READ_LOCK is not set
151# CONFIG_INLINE_READ_LOCK_BH is not set
152# CONFIG_INLINE_READ_LOCK_IRQ is not set
153# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
154# CONFIG_INLINE_READ_UNLOCK is not set
155# CONFIG_INLINE_READ_UNLOCK_BH is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
157# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
158# CONFIG_INLINE_WRITE_TRYLOCK is not set
159# CONFIG_INLINE_WRITE_LOCK is not set
160# CONFIG_INLINE_WRITE_LOCK_BH is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
162# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
163# CONFIG_INLINE_WRITE_UNLOCK is not set
164# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
167# CONFIG_MUTEX_SPIN_ON_OWNER is not set
129# CONFIG_FREEZER is not set 168# CONFIG_FREEZER is not set
130 169
131# 170#
132# System Type 171# System Type
133# 172#
173CONFIG_MMU=y
134# CONFIG_ARCH_AAEC2000 is not set 174# CONFIG_ARCH_AAEC2000 is not set
135# CONFIG_ARCH_INTEGRATOR is not set 175# CONFIG_ARCH_INTEGRATOR is not set
136# CONFIG_ARCH_REALVIEW is not set 176# CONFIG_ARCH_REALVIEW is not set
137# CONFIG_ARCH_VERSATILE is not set 177# CONFIG_ARCH_VERSATILE is not set
138# CONFIG_ARCH_AT91 is not set 178# CONFIG_ARCH_AT91 is not set
139# CONFIG_ARCH_CLPS711X is not set 179# CONFIG_ARCH_CLPS711X is not set
180# CONFIG_ARCH_GEMINI is not set
140# CONFIG_ARCH_EBSA110 is not set 181# CONFIG_ARCH_EBSA110 is not set
141# CONFIG_ARCH_EP93XX is not set 182# CONFIG_ARCH_EP93XX is not set
142# CONFIG_ARCH_FOOTBRIDGE is not set 183# CONFIG_ARCH_FOOTBRIDGE is not set
184# CONFIG_ARCH_MXC is not set
185# CONFIG_ARCH_STMP3XXX is not set
143# CONFIG_ARCH_NETX is not set 186# CONFIG_ARCH_NETX is not set
144# CONFIG_ARCH_H720X is not set 187# CONFIG_ARCH_H720X is not set
145# CONFIG_ARCH_IMX is not set 188# CONFIG_ARCH_NOMADIK is not set
146# CONFIG_ARCH_IOP13XX is not set 189# CONFIG_ARCH_IOP13XX is not set
147# CONFIG_ARCH_IOP32X is not set 190# CONFIG_ARCH_IOP32X is not set
148# CONFIG_ARCH_IOP33X is not set 191# CONFIG_ARCH_IOP33X is not set
@@ -150,26 +193,30 @@ CONFIG_DEFAULT_IOSCHED="cfq"
150# CONFIG_ARCH_IXP2000 is not set 193# CONFIG_ARCH_IXP2000 is not set
151# CONFIG_ARCH_IXP4XX is not set 194# CONFIG_ARCH_IXP4XX is not set
152# CONFIG_ARCH_L7200 is not set 195# CONFIG_ARCH_L7200 is not set
196# CONFIG_ARCH_DOVE is not set
153# CONFIG_ARCH_KIRKWOOD is not set 197# CONFIG_ARCH_KIRKWOOD is not set
154# CONFIG_ARCH_KS8695 is not set
155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set 198# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set 199# CONFIG_ARCH_MV78XX0 is not set
158# CONFIG_ARCH_MXC is not set
159# CONFIG_ARCH_ORION5X is not set 200# CONFIG_ARCH_ORION5X is not set
201CONFIG_ARCH_MMP=y
202# CONFIG_ARCH_KS8695 is not set
203# CONFIG_ARCH_NS9XXX is not set
204# CONFIG_ARCH_W90X900 is not set
160# CONFIG_ARCH_PNX4008 is not set 205# CONFIG_ARCH_PNX4008 is not set
161# CONFIG_ARCH_PXA is not set 206# CONFIG_ARCH_PXA is not set
162CONFIG_ARCH_MMP=y 207# CONFIG_ARCH_MSM is not set
163# CONFIG_ARCH_RPC is not set 208# CONFIG_ARCH_RPC is not set
164# CONFIG_ARCH_SA1100 is not set 209# CONFIG_ARCH_SA1100 is not set
165# CONFIG_ARCH_S3C2410 is not set 210# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set 211# CONFIG_ARCH_S3C64XX is not set
212# CONFIG_ARCH_S5PC1XX is not set
167# CONFIG_ARCH_SHARK is not set 213# CONFIG_ARCH_SHARK is not set
168# CONFIG_ARCH_LH7A40X is not set 214# CONFIG_ARCH_LH7A40X is not set
215# CONFIG_ARCH_U300 is not set
169# CONFIG_ARCH_DAVINCI is not set 216# CONFIG_ARCH_DAVINCI is not set
170# CONFIG_ARCH_OMAP is not set 217# CONFIG_ARCH_OMAP is not set
171# CONFIG_ARCH_MSM is not set 218# CONFIG_ARCH_BCMRING is not set
172# CONFIG_ARCH_W90X900 is not set 219# CONFIG_ARCH_U8500 is not set
173# CONFIG_MACH_TAVOREVB is not set 220# CONFIG_MACH_TAVOREVB is not set
174 221
175# 222#
@@ -177,6 +224,7 @@ CONFIG_ARCH_MMP=y
177# 224#
178CONFIG_MACH_ASPENITE=y 225CONFIG_MACH_ASPENITE=y
179CONFIG_MACH_ZYLONITE2=y 226CONFIG_MACH_ZYLONITE2=y
227CONFIG_MACH_AVENGERS_LITE=y
180# CONFIG_MACH_TTC_DKB is not set 228# CONFIG_MACH_TTC_DKB is not set
181CONFIG_CPU_PXA168=y 229CONFIG_CPU_PXA168=y
182CONFIG_PLAT_PXA=y 230CONFIG_PLAT_PXA=y
@@ -187,7 +235,7 @@ CONFIG_PLAT_PXA=y
187CONFIG_CPU_MOHAWK=y 235CONFIG_CPU_MOHAWK=y
188CONFIG_CPU_32v5=y 236CONFIG_CPU_32v5=y
189CONFIG_CPU_ABRT_EV5T=y 237CONFIG_CPU_ABRT_EV5T=y
190CONFIG_CPU_PABRT_NOIFAR=y 238CONFIG_CPU_PABRT_LEGACY=y
191CONFIG_CPU_CACHE_VIVT=y 239CONFIG_CPU_CACHE_VIVT=y
192CONFIG_CPU_COPY_V4WB=y 240CONFIG_CPU_COPY_V4WB=y
193CONFIG_CPU_TLB_V4WBI=y 241CONFIG_CPU_TLB_V4WBI=y
@@ -201,7 +249,7 @@ CONFIG_ARM_THUMB=y
201# CONFIG_CPU_ICACHE_DISABLE is not set 249# CONFIG_CPU_ICACHE_DISABLE is not set
202# CONFIG_CPU_DCACHE_DISABLE is not set 250# CONFIG_CPU_DCACHE_DISABLE is not set
203# CONFIG_CPU_BPREDICT_DISABLE is not set 251# CONFIG_CPU_BPREDICT_DISABLE is not set
204# CONFIG_OUTER_CACHE is not set 252CONFIG_ARM_L1_CACHE_SHIFT=5
205CONFIG_IWMMXT=y 253CONFIG_IWMMXT=y
206CONFIG_COMMON_CLKDEV=y 254CONFIG_COMMON_CLKDEV=y
207 255
@@ -223,13 +271,15 @@ CONFIG_VMSPLIT_3G=y
223# CONFIG_VMSPLIT_2G is not set 271# CONFIG_VMSPLIT_2G is not set
224# CONFIG_VMSPLIT_1G is not set 272# CONFIG_VMSPLIT_1G is not set
225CONFIG_PAGE_OFFSET=0xC0000000 273CONFIG_PAGE_OFFSET=0xC0000000
274# CONFIG_PREEMPT_NONE is not set
275# CONFIG_PREEMPT_VOLUNTARY is not set
226CONFIG_PREEMPT=y 276CONFIG_PREEMPT=y
227CONFIG_HZ=100 277CONFIG_HZ=100
228CONFIG_AEABI=y 278CONFIG_AEABI=y
229CONFIG_OABI_COMPAT=y 279CONFIG_OABI_COMPAT=y
230CONFIG_ARCH_FLATMEM_HAS_HOLES=y
231# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set 280# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
232# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set 281# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
282# CONFIG_HIGHMEM is not set
233CONFIG_SELECT_MEMORY_MODEL=y 283CONFIG_SELECT_MEMORY_MODEL=y
234CONFIG_FLATMEM_MANUAL=y 284CONFIG_FLATMEM_MANUAL=y
235# CONFIG_DISCONTIGMEM_MANUAL is not set 285# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -237,12 +287,14 @@ CONFIG_FLATMEM_MANUAL=y
237CONFIG_FLATMEM=y 287CONFIG_FLATMEM=y
238CONFIG_FLAT_NODE_MEM_MAP=y 288CONFIG_FLAT_NODE_MEM_MAP=y
239CONFIG_PAGEFLAGS_EXTENDED=y 289CONFIG_PAGEFLAGS_EXTENDED=y
240CONFIG_SPLIT_PTLOCK_CPUS=4096 290CONFIG_SPLIT_PTLOCK_CPUS=999999
241# CONFIG_PHYS_ADDR_T_64BIT is not set 291# CONFIG_PHYS_ADDR_T_64BIT is not set
242CONFIG_ZONE_DMA_FLAG=0 292CONFIG_ZONE_DMA_FLAG=0
243CONFIG_VIRT_TO_BUS=y 293CONFIG_VIRT_TO_BUS=y
244CONFIG_UNEVICTABLE_LRU=y 294# CONFIG_KSM is not set
295CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
245CONFIG_ALIGNMENT_TRAP=y 296CONFIG_ALIGNMENT_TRAP=y
297# CONFIG_UACCESS_WITH_MEMCPY is not set
246 298
247# 299#
248# Boot options 300# Boot options
@@ -288,7 +340,6 @@ CONFIG_NET=y
288# 340#
289# Networking options 341# Networking options
290# 342#
291CONFIG_COMPAT_NET_DEV_OPS=y
292CONFIG_PACKET=y 343CONFIG_PACKET=y
293# CONFIG_PACKET_MMAP is not set 344# CONFIG_PACKET_MMAP is not set
294CONFIG_UNIX=y 345CONFIG_UNIX=y
@@ -330,6 +381,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
330# CONFIG_NETFILTER is not set 381# CONFIG_NETFILTER is not set
331# CONFIG_IP_DCCP is not set 382# CONFIG_IP_DCCP is not set
332# CONFIG_IP_SCTP is not set 383# CONFIG_IP_SCTP is not set
384# CONFIG_RDS is not set
333# CONFIG_TIPC is not set 385# CONFIG_TIPC is not set
334# CONFIG_ATM is not set 386# CONFIG_ATM is not set
335# CONFIG_BRIDGE is not set 387# CONFIG_BRIDGE is not set
@@ -343,6 +395,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
343# CONFIG_LAPB is not set 395# CONFIG_LAPB is not set
344# CONFIG_ECONET is not set 396# CONFIG_ECONET is not set
345# CONFIG_WAN_ROUTER is not set 397# CONFIG_WAN_ROUTER is not set
398# CONFIG_PHONET is not set
399# CONFIG_IEEE802154 is not set
346# CONFIG_NET_SCHED is not set 400# CONFIG_NET_SCHED is not set
347# CONFIG_DCB is not set 401# CONFIG_DCB is not set
348 402
@@ -355,13 +409,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
355# CONFIG_IRDA is not set 409# CONFIG_IRDA is not set
356# CONFIG_BT is not set 410# CONFIG_BT is not set
357# CONFIG_AF_RXRPC is not set 411# CONFIG_AF_RXRPC is not set
358# CONFIG_PHONET is not set
359CONFIG_WIRELESS=y 412CONFIG_WIRELESS=y
360# CONFIG_CFG80211 is not set 413# CONFIG_CFG80211 is not set
361CONFIG_WIRELESS_OLD_REGULATORY=y
362# CONFIG_WIRELESS_EXT is not set
363# CONFIG_LIB80211 is not set 414# CONFIG_LIB80211 is not set
364# CONFIG_MAC80211 is not set 415
416#
417# CFG80211 needs to be enabled for MAC80211
418#
365# CONFIG_WIMAX is not set 419# CONFIG_WIMAX is not set
366# CONFIG_RFKILL is not set 420# CONFIG_RFKILL is not set
367# CONFIG_NET_9P is not set 421# CONFIG_NET_9P is not set
@@ -374,6 +428,7 @@ CONFIG_WIRELESS_OLD_REGULATORY=y
374# Generic Driver Options 428# Generic Driver Options
375# 429#
376CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 430CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
431# CONFIG_DEVTMPFS is not set
377# CONFIG_STANDALONE is not set 432# CONFIG_STANDALONE is not set
378# CONFIG_PREVENT_FIRMWARE_BUILD is not set 433# CONFIG_PREVENT_FIRMWARE_BUILD is not set
379CONFIG_FW_LOADER=y 434CONFIG_FW_LOADER=y
@@ -412,8 +467,10 @@ CONFIG_MII=y
412# CONFIG_AX88796 is not set 467# CONFIG_AX88796 is not set
413CONFIG_SMC91X=y 468CONFIG_SMC91X=y
414# CONFIG_DM9000 is not set 469# CONFIG_DM9000 is not set
470# CONFIG_ETHOC is not set
415# CONFIG_SMC911X is not set 471# CONFIG_SMC911X is not set
416# CONFIG_SMSC911X is not set 472# CONFIG_SMSC911X is not set
473# CONFIG_DNET is not set
417# CONFIG_IBM_NEW_EMAC_ZMII is not set 474# CONFIG_IBM_NEW_EMAC_ZMII is not set
418# CONFIG_IBM_NEW_EMAC_RGMII is not set 475# CONFIG_IBM_NEW_EMAC_RGMII is not set
419# CONFIG_IBM_NEW_EMAC_TAH is not set 476# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -422,15 +479,12 @@ CONFIG_SMC91X=y
422# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 479# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
423# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 480# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
424# CONFIG_B44 is not set 481# CONFIG_B44 is not set
482# CONFIG_KS8842 is not set
483# CONFIG_KS8851_MLL is not set
425# CONFIG_NETDEV_1000 is not set 484# CONFIG_NETDEV_1000 is not set
426# CONFIG_NETDEV_10000 is not set 485# CONFIG_NETDEV_10000 is not set
427 486CONFIG_WLAN=y
428# 487# CONFIG_HOSTAP is not set
429# Wireless LAN
430#
431# CONFIG_WLAN_PRE80211 is not set
432# CONFIG_WLAN_80211 is not set
433# CONFIG_IWLWIFI_LEDS is not set
434 488
435# 489#
436# Enable WiMAX (Networking options) to see the WiMAX drivers 490# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -442,6 +496,7 @@ CONFIG_SMC91X=y
442# CONFIG_NETPOLL is not set 496# CONFIG_NETPOLL is not set
443# CONFIG_NET_POLL_CONTROLLER is not set 497# CONFIG_NET_POLL_CONTROLLER is not set
444# CONFIG_ISDN is not set 498# CONFIG_ISDN is not set
499# CONFIG_PHONE is not set
445 500
446# 501#
447# Input device support 502# Input device support
@@ -449,6 +504,7 @@ CONFIG_SMC91X=y
449CONFIG_INPUT=y 504CONFIG_INPUT=y
450# CONFIG_INPUT_FF_MEMLESS is not set 505# CONFIG_INPUT_FF_MEMLESS is not set
451# CONFIG_INPUT_POLLDEV is not set 506# CONFIG_INPUT_POLLDEV is not set
507# CONFIG_INPUT_SPARSEKMAP is not set
452 508
453# 509#
454# Userland interfaces 510# Userland interfaces
@@ -510,6 +566,11 @@ CONFIG_UNIX98_PTYS=y
510# CONFIG_TCG_TPM is not set 566# CONFIG_TCG_TPM is not set
511# CONFIG_I2C is not set 567# CONFIG_I2C is not set
512# CONFIG_SPI is not set 568# CONFIG_SPI is not set
569
570#
571# PPS support
572#
573# CONFIG_PPS is not set
513CONFIG_ARCH_REQUIRE_GPIOLIB=y 574CONFIG_ARCH_REQUIRE_GPIOLIB=y
514CONFIG_GPIOLIB=y 575CONFIG_GPIOLIB=y
515# CONFIG_DEBUG_GPIO is not set 576# CONFIG_DEBUG_GPIO is not set
@@ -530,11 +591,14 @@ CONFIG_GPIOLIB=y
530# 591#
531# SPI GPIO expanders: 592# SPI GPIO expanders:
532# 593#
594
595#
596# AC97 GPIO expanders:
597#
533# CONFIG_W1 is not set 598# CONFIG_W1 is not set
534# CONFIG_POWER_SUPPLY is not set 599# CONFIG_POWER_SUPPLY is not set
535# CONFIG_HWMON is not set 600# CONFIG_HWMON is not set
536# CONFIG_THERMAL is not set 601# CONFIG_THERMAL is not set
537# CONFIG_THERMAL_HWMON is not set
538# CONFIG_WATCHDOG is not set 602# CONFIG_WATCHDOG is not set
539CONFIG_SSB_POSSIBLE=y 603CONFIG_SSB_POSSIBLE=y
540 604
@@ -555,22 +619,8 @@ CONFIG_SSB_POSSIBLE=y
555# CONFIG_MFD_T7L66XB is not set 619# CONFIG_MFD_T7L66XB is not set
556# CONFIG_MFD_TC6387XB is not set 620# CONFIG_MFD_TC6387XB is not set
557# CONFIG_MFD_TC6393XB is not set 621# CONFIG_MFD_TC6393XB is not set
558 622# CONFIG_REGULATOR is not set
559# 623# CONFIG_MEDIA_SUPPORT is not set
560# Multimedia devices
561#
562
563#
564# Multimedia core support
565#
566# CONFIG_VIDEO_DEV is not set
567# CONFIG_DVB_CORE is not set
568# CONFIG_VIDEO_MEDIA is not set
569
570#
571# Multimedia drivers
572#
573# CONFIG_DAB is not set
574 624
575# 625#
576# Graphics support 626# Graphics support
@@ -595,13 +645,17 @@ CONFIG_DUMMY_CONSOLE=y
595# CONFIG_USB_SUPPORT is not set 645# CONFIG_USB_SUPPORT is not set
596# CONFIG_MMC is not set 646# CONFIG_MMC is not set
597# CONFIG_MEMSTICK is not set 647# CONFIG_MEMSTICK is not set
598# CONFIG_ACCESSIBILITY is not set
599# CONFIG_NEW_LEDS is not set 648# CONFIG_NEW_LEDS is not set
649# CONFIG_ACCESSIBILITY is not set
600CONFIG_RTC_LIB=y 650CONFIG_RTC_LIB=y
601# CONFIG_RTC_CLASS is not set 651# CONFIG_RTC_CLASS is not set
602# CONFIG_DMADEVICES is not set 652# CONFIG_DMADEVICES is not set
603# CONFIG_REGULATOR is not set 653# CONFIG_AUXDISPLAY is not set
604# CONFIG_UIO is not set 654# CONFIG_UIO is not set
655
656#
657# TI VLYNQ
658#
605# CONFIG_STAGING is not set 659# CONFIG_STAGING is not set
606 660
607# 661#
@@ -613,10 +667,13 @@ CONFIG_RTC_LIB=y
613# CONFIG_REISERFS_FS is not set 667# CONFIG_REISERFS_FS is not set
614# CONFIG_JFS_FS is not set 668# CONFIG_JFS_FS is not set
615CONFIG_FS_POSIX_ACL=y 669CONFIG_FS_POSIX_ACL=y
616CONFIG_FILE_LOCKING=y
617# CONFIG_XFS_FS is not set 670# CONFIG_XFS_FS is not set
671# CONFIG_GFS2_FS is not set
618# CONFIG_OCFS2_FS is not set 672# CONFIG_OCFS2_FS is not set
619# CONFIG_BTRFS_FS is not set 673# CONFIG_BTRFS_FS is not set
674# CONFIG_NILFS2_FS is not set
675CONFIG_FILE_LOCKING=y
676CONFIG_FSNOTIFY=y
620CONFIG_DNOTIFY=y 677CONFIG_DNOTIFY=y
621CONFIG_INOTIFY=y 678CONFIG_INOTIFY=y
622CONFIG_INOTIFY_USER=y 679CONFIG_INOTIFY_USER=y
@@ -627,6 +684,11 @@ CONFIG_INOTIFY_USER=y
627CONFIG_GENERIC_ACL=y 684CONFIG_GENERIC_ACL=y
628 685
629# 686#
687# Caches
688#
689# CONFIG_FSCACHE is not set
690
691#
630# CD-ROM/DVD Filesystems 692# CD-ROM/DVD Filesystems
631# 693#
632# CONFIG_ISO9660_FS is not set 694# CONFIG_ISO9660_FS is not set
@@ -673,6 +735,7 @@ CONFIG_NFS_FS=y
673CONFIG_NFS_V3=y 735CONFIG_NFS_V3=y
674CONFIG_NFS_V3_ACL=y 736CONFIG_NFS_V3_ACL=y
675CONFIG_NFS_V4=y 737CONFIG_NFS_V4=y
738# CONFIG_NFS_V4_1 is not set
676CONFIG_ROOT_NFS=y 739CONFIG_ROOT_NFS=y
677# CONFIG_NFSD is not set 740# CONFIG_NFSD is not set
678CONFIG_LOCKD=y 741CONFIG_LOCKD=y
@@ -681,7 +744,6 @@ CONFIG_NFS_ACL_SUPPORT=y
681CONFIG_NFS_COMMON=y 744CONFIG_NFS_COMMON=y
682CONFIG_SUNRPC=y 745CONFIG_SUNRPC=y
683CONFIG_SUNRPC_GSS=y 746CONFIG_SUNRPC_GSS=y
684# CONFIG_SUNRPC_REGISTER_V4 is not set
685CONFIG_RPCSEC_GSS_KRB5=y 747CONFIG_RPCSEC_GSS_KRB5=y
686# CONFIG_RPCSEC_GSS_SPKM3 is not set 748# CONFIG_RPCSEC_GSS_SPKM3 is not set
687# CONFIG_SMB_FS is not set 749# CONFIG_SMB_FS is not set
@@ -706,6 +768,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
706CONFIG_ENABLE_MUST_CHECK=y 768CONFIG_ENABLE_MUST_CHECK=y
707CONFIG_FRAME_WARN=1024 769CONFIG_FRAME_WARN=1024
708CONFIG_MAGIC_SYSRQ=y 770CONFIG_MAGIC_SYSRQ=y
771# CONFIG_STRIP_ASM_SYMS is not set
709# CONFIG_UNUSED_SYMBOLS is not set 772# CONFIG_UNUSED_SYMBOLS is not set
710# CONFIG_DEBUG_FS is not set 773# CONFIG_DEBUG_FS is not set
711# CONFIG_HEADERS_CHECK is not set 774# CONFIG_HEADERS_CHECK is not set
@@ -714,11 +777,15 @@ CONFIG_DEBUG_KERNEL=y
714CONFIG_DETECT_SOFTLOCKUP=y 777CONFIG_DETECT_SOFTLOCKUP=y
715# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 778# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
716CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 779CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
780CONFIG_DETECT_HUNG_TASK=y
781# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
782CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
717CONFIG_SCHED_DEBUG=y 783CONFIG_SCHED_DEBUG=y
718# CONFIG_SCHEDSTATS is not set 784# CONFIG_SCHEDSTATS is not set
719# CONFIG_TIMER_STATS is not set 785# CONFIG_TIMER_STATS is not set
720# CONFIG_DEBUG_OBJECTS is not set 786# CONFIG_DEBUG_OBJECTS is not set
721# CONFIG_DEBUG_SLAB is not set 787# CONFIG_DEBUG_SLAB is not set
788# CONFIG_DEBUG_KMEMLEAK is not set
722# CONFIG_DEBUG_PREEMPT is not set 789# CONFIG_DEBUG_PREEMPT is not set
723# CONFIG_DEBUG_RT_MUTEXES is not set 790# CONFIG_DEBUG_RT_MUTEXES is not set
724# CONFIG_RT_MUTEX_TESTER is not set 791# CONFIG_RT_MUTEX_TESTER is not set
@@ -738,28 +805,33 @@ CONFIG_DEBUG_MEMORY_INIT=y
738# CONFIG_DEBUG_LIST is not set 805# CONFIG_DEBUG_LIST is not set
739# CONFIG_DEBUG_SG is not set 806# CONFIG_DEBUG_SG is not set
740# CONFIG_DEBUG_NOTIFIERS is not set 807# CONFIG_DEBUG_NOTIFIERS is not set
808# CONFIG_DEBUG_CREDENTIALS is not set
741# CONFIG_BOOT_PRINTK_DELAY is not set 809# CONFIG_BOOT_PRINTK_DELAY is not set
742# CONFIG_RCU_TORTURE_TEST is not set 810# CONFIG_RCU_TORTURE_TEST is not set
743# CONFIG_RCU_CPU_STALL_DETECTOR is not set 811# CONFIG_RCU_CPU_STALL_DETECTOR is not set
744# CONFIG_BACKTRACE_SELF_TEST is not set 812# CONFIG_BACKTRACE_SELF_TEST is not set
745# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 813# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
814# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
746# CONFIG_FAULT_INJECTION is not set 815# CONFIG_FAULT_INJECTION is not set
747# CONFIG_LATENCYTOP is not set 816# CONFIG_LATENCYTOP is not set
748# CONFIG_SYSCTL_SYSCALL_CHECK is not set 817# CONFIG_SYSCTL_SYSCALL_CHECK is not set
818# CONFIG_PAGE_POISONING is not set
749CONFIG_HAVE_FUNCTION_TRACER=y 819CONFIG_HAVE_FUNCTION_TRACER=y
750 820CONFIG_TRACING_SUPPORT=y
751# 821CONFIG_FTRACE=y
752# Tracers
753#
754# CONFIG_FUNCTION_TRACER is not set 822# CONFIG_FUNCTION_TRACER is not set
755# CONFIG_IRQSOFF_TRACER is not set 823# CONFIG_IRQSOFF_TRACER is not set
756# CONFIG_PREEMPT_TRACER is not set 824# CONFIG_PREEMPT_TRACER is not set
757# CONFIG_SCHED_TRACER is not set 825# CONFIG_SCHED_TRACER is not set
758# CONFIG_CONTEXT_SWITCH_TRACER is not set 826# CONFIG_ENABLE_DEFAULT_TRACERS is not set
759# CONFIG_BOOT_TRACER is not set 827# CONFIG_BOOT_TRACER is not set
760# CONFIG_TRACE_BRANCH_PROFILING is not set 828CONFIG_BRANCH_PROFILE_NONE=y
829# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
830# CONFIG_PROFILE_ALL_BRANCHES is not set
761# CONFIG_STACK_TRACER is not set 831# CONFIG_STACK_TRACER is not set
762# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 832# CONFIG_KMEMTRACE is not set
833# CONFIG_WORKQUEUE_TRACER is not set
834# CONFIG_BLK_DEV_IO_TRACE is not set
763# CONFIG_SAMPLES is not set 835# CONFIG_SAMPLES is not set
764CONFIG_HAVE_ARCH_KGDB=y 836CONFIG_HAVE_ARCH_KGDB=y
765# CONFIG_KGDB is not set 837# CONFIG_KGDB is not set
@@ -768,7 +840,9 @@ CONFIG_DEBUG_USER=y
768CONFIG_DEBUG_ERRORS=y 840CONFIG_DEBUG_ERRORS=y
769# CONFIG_DEBUG_STACK_USAGE is not set 841# CONFIG_DEBUG_STACK_USAGE is not set
770CONFIG_DEBUG_LL=y 842CONFIG_DEBUG_LL=y
843# CONFIG_EARLY_PRINTK is not set
771# CONFIG_DEBUG_ICEDCC is not set 844# CONFIG_DEBUG_ICEDCC is not set
845# CONFIG_OC_ETM is not set
772 846
773# 847#
774# Security options 848# Security options
@@ -776,13 +850,16 @@ CONFIG_DEBUG_LL=y
776# CONFIG_KEYS is not set 850# CONFIG_KEYS is not set
777# CONFIG_SECURITY is not set 851# CONFIG_SECURITY is not set
778# CONFIG_SECURITYFS is not set 852# CONFIG_SECURITYFS is not set
779# CONFIG_SECURITY_FILE_CAPABILITIES is not set 853# CONFIG_DEFAULT_SECURITY_SELINUX is not set
854# CONFIG_DEFAULT_SECURITY_SMACK is not set
855# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
856CONFIG_DEFAULT_SECURITY_DAC=y
857CONFIG_DEFAULT_SECURITY=""
780CONFIG_CRYPTO=y 858CONFIG_CRYPTO=y
781 859
782# 860#
783# Crypto core or helper 861# Crypto core or helper
784# 862#
785# CONFIG_CRYPTO_FIPS is not set
786CONFIG_CRYPTO_ALGAPI=y 863CONFIG_CRYPTO_ALGAPI=y
787CONFIG_CRYPTO_ALGAPI2=y 864CONFIG_CRYPTO_ALGAPI2=y
788CONFIG_CRYPTO_AEAD2=y 865CONFIG_CRYPTO_AEAD2=y
@@ -791,10 +868,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y
791CONFIG_CRYPTO_HASH=y 868CONFIG_CRYPTO_HASH=y
792CONFIG_CRYPTO_HASH2=y 869CONFIG_CRYPTO_HASH2=y
793CONFIG_CRYPTO_RNG2=y 870CONFIG_CRYPTO_RNG2=y
871CONFIG_CRYPTO_PCOMP=y
794CONFIG_CRYPTO_MANAGER=y 872CONFIG_CRYPTO_MANAGER=y
795CONFIG_CRYPTO_MANAGER2=y 873CONFIG_CRYPTO_MANAGER2=y
796# CONFIG_CRYPTO_GF128MUL is not set 874# CONFIG_CRYPTO_GF128MUL is not set
797# CONFIG_CRYPTO_NULL is not set 875# CONFIG_CRYPTO_NULL is not set
876CONFIG_CRYPTO_WORKQUEUE=y
798# CONFIG_CRYPTO_CRYPTD is not set 877# CONFIG_CRYPTO_CRYPTD is not set
799# CONFIG_CRYPTO_AUTHENC is not set 878# CONFIG_CRYPTO_AUTHENC is not set
800# CONFIG_CRYPTO_TEST is not set 879# CONFIG_CRYPTO_TEST is not set
@@ -822,11 +901,13 @@ CONFIG_CRYPTO_CBC=y
822# 901#
823# CONFIG_CRYPTO_HMAC is not set 902# CONFIG_CRYPTO_HMAC is not set
824# CONFIG_CRYPTO_XCBC is not set 903# CONFIG_CRYPTO_XCBC is not set
904# CONFIG_CRYPTO_VMAC is not set
825 905
826# 906#
827# Digest 907# Digest
828# 908#
829# CONFIG_CRYPTO_CRC32C is not set 909# CONFIG_CRYPTO_CRC32C is not set
910# CONFIG_CRYPTO_GHASH is not set
830# CONFIG_CRYPTO_MD4 is not set 911# CONFIG_CRYPTO_MD4 is not set
831CONFIG_CRYPTO_MD5=y 912CONFIG_CRYPTO_MD5=y
832# CONFIG_CRYPTO_MICHAEL_MIC is not set 913# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -863,6 +944,7 @@ CONFIG_CRYPTO_DES=y
863# Compression 944# Compression
864# 945#
865# CONFIG_CRYPTO_DEFLATE is not set 946# CONFIG_CRYPTO_DEFLATE is not set
947# CONFIG_CRYPTO_ZLIB is not set
866# CONFIG_CRYPTO_LZO is not set 948# CONFIG_CRYPTO_LZO is not set
867 949
868# 950#
@@ -870,6 +952,7 @@ CONFIG_CRYPTO_DES=y
870# 952#
871# CONFIG_CRYPTO_ANSI_CPRNG is not set 953# CONFIG_CRYPTO_ANSI_CPRNG is not set
872CONFIG_CRYPTO_HW=y 954CONFIG_CRYPTO_HW=y
955# CONFIG_BINARY_PRINTF is not set
873 956
874# 957#
875# Library routines 958# Library routines
@@ -884,7 +967,7 @@ CONFIG_CRC32=y
884# CONFIG_CRC7 is not set 967# CONFIG_CRC7 is not set
885# CONFIG_LIBCRC32C is not set 968# CONFIG_LIBCRC32C is not set
886CONFIG_ZLIB_INFLATE=y 969CONFIG_ZLIB_INFLATE=y
887CONFIG_PLIST=y
888CONFIG_HAS_IOMEM=y 970CONFIG_HAS_IOMEM=y
889CONFIG_HAS_IOPORT=y 971CONFIG_HAS_IOPORT=y
890CONFIG_HAS_DMA=y 972CONFIG_HAS_DMA=y
973CONFIG_NLATTR=y
diff --git a/arch/arm/configs/raumfeld_defconfig b/arch/arm/configs/raumfeld_defconfig
new file mode 100644
index 000000000000..acb1a8f30e31
--- /dev/null
+++ b/arch/arm/configs/raumfeld_defconfig
@@ -0,0 +1,1898 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32-rc5
4# Sun Nov 1 21:57:32 2009
5#
6CONFIG_ARM=y
7CONFIG_HAVE_PWM=y
8CONFIG_SYS_SUPPORTS_APM_EMULATION=y
9CONFIG_GENERIC_GPIO=y
10CONFIG_GENERIC_TIME=y
11CONFIG_GENERIC_CLOCKEVENTS=y
12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_STACKTRACE_SUPPORT=y
14CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20CONFIG_ARCH_HAS_CPUFREQ=y
21CONFIG_GENERIC_HWEIGHT=y
22CONFIG_GENERIC_CALIBRATE_DELAY=y
23CONFIG_ARCH_MTD_XIP=y
24CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
25CONFIG_VECTORS_BASE=0xffff0000
26CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
27CONFIG_CONSTRUCTORS=y
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36# CONFIG_LOCALVERSION_AUTO is not set
37# CONFIG_SWAP is not set
38# CONFIG_SYSVIPC is not set
39# CONFIG_POSIX_MQUEUE is not set
40# CONFIG_BSD_PROCESS_ACCT is not set
41# CONFIG_TASKSTATS is not set
42# CONFIG_AUDIT is not set
43
44#
45# RCU Subsystem
46#
47CONFIG_TREE_RCU=y
48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_RCU_TRACE is not set
50CONFIG_RCU_FANOUT=32
51# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_IKCONFIG is not set
54CONFIG_LOG_BUF_SHIFT=17
55# CONFIG_GROUP_SCHED is not set
56# CONFIG_CGROUPS is not set
57# CONFIG_SYSFS_DEPRECATED_V2 is not set
58# CONFIG_RELAY is not set
59CONFIG_NAMESPACES=y
60# CONFIG_UTS_NS is not set
61# CONFIG_USER_NS is not set
62# CONFIG_PID_NS is not set
63# CONFIG_NET_NS is not set
64# CONFIG_BLK_DEV_INITRD is not set
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73# CONFIG_KALLSYMS_EXTRA_PASS is not set
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86
87#
88# Kernel Performance Events And Counters
89#
90CONFIG_VM_EVENT_COUNTERS=y
91CONFIG_SLUB_DEBUG=y
92CONFIG_COMPAT_BRK=y
93# CONFIG_SLAB is not set
94CONFIG_SLUB=y
95# CONFIG_SLOB is not set
96# CONFIG_PROFILING is not set
97CONFIG_HAVE_OPROFILE=y
98# CONFIG_KPROBES is not set
99CONFIG_HAVE_KPROBES=y
100CONFIG_HAVE_KRETPROBES=y
101CONFIG_HAVE_CLK=y
102
103#
104# GCOV-based kernel profiling
105#
106CONFIG_SLOW_WORK=y
107CONFIG_HAVE_GENERIC_DMA_COHERENT=y
108CONFIG_SLABINFO=y
109CONFIG_RT_MUTEXES=y
110CONFIG_BASE_SMALL=0
111CONFIG_MODULES=y
112# CONFIG_MODULE_FORCE_LOAD is not set
113CONFIG_MODULE_UNLOAD=y
114# CONFIG_MODULE_FORCE_UNLOAD is not set
115# CONFIG_MODVERSIONS is not set
116# CONFIG_MODULE_SRCVERSION_ALL is not set
117CONFIG_BLOCK=y
118# CONFIG_LBDAF is not set
119# CONFIG_BLK_DEV_BSG is not set
120# CONFIG_BLK_DEV_INTEGRITY is not set
121
122#
123# IO Schedulers
124#
125CONFIG_IOSCHED_NOOP=y
126CONFIG_IOSCHED_AS=y
127CONFIG_IOSCHED_DEADLINE=y
128CONFIG_IOSCHED_CFQ=y
129# CONFIG_DEFAULT_AS is not set
130# CONFIG_DEFAULT_DEADLINE is not set
131CONFIG_DEFAULT_CFQ=y
132# CONFIG_DEFAULT_NOOP is not set
133CONFIG_DEFAULT_IOSCHED="cfq"
134CONFIG_FREEZER=y
135
136#
137# System Type
138#
139CONFIG_MMU=y
140# CONFIG_ARCH_AAEC2000 is not set
141# CONFIG_ARCH_INTEGRATOR is not set
142# CONFIG_ARCH_REALVIEW is not set
143# CONFIG_ARCH_VERSATILE is not set
144# CONFIG_ARCH_AT91 is not set
145# CONFIG_ARCH_CLPS711X is not set
146# CONFIG_ARCH_GEMINI is not set
147# CONFIG_ARCH_EBSA110 is not set
148# CONFIG_ARCH_EP93XX is not set
149# CONFIG_ARCH_FOOTBRIDGE is not set
150# CONFIG_ARCH_MXC is not set
151# CONFIG_ARCH_STMP3XXX is not set
152# CONFIG_ARCH_NETX is not set
153# CONFIG_ARCH_H720X is not set
154# CONFIG_ARCH_NOMADIK is not set
155# CONFIG_ARCH_IOP13XX is not set
156# CONFIG_ARCH_IOP32X is not set
157# CONFIG_ARCH_IOP33X is not set
158# CONFIG_ARCH_IXP23XX is not set
159# CONFIG_ARCH_IXP2000 is not set
160# CONFIG_ARCH_IXP4XX is not set
161# CONFIG_ARCH_L7200 is not set
162# CONFIG_ARCH_KIRKWOOD is not set
163# CONFIG_ARCH_LOKI is not set
164# CONFIG_ARCH_MV78XX0 is not set
165# CONFIG_ARCH_ORION5X is not set
166# CONFIG_ARCH_MMP is not set
167# CONFIG_ARCH_KS8695 is not set
168# CONFIG_ARCH_NS9XXX is not set
169# CONFIG_ARCH_W90X900 is not set
170# CONFIG_ARCH_PNX4008 is not set
171CONFIG_ARCH_PXA=y
172# CONFIG_ARCH_MSM is not set
173# CONFIG_ARCH_RPC is not set
174# CONFIG_ARCH_SA1100 is not set
175# CONFIG_ARCH_S3C2410 is not set
176# CONFIG_ARCH_S3C64XX is not set
177# CONFIG_ARCH_S5PC1XX is not set
178# CONFIG_ARCH_SHARK is not set
179# CONFIG_ARCH_LH7A40X is not set
180# CONFIG_ARCH_U300 is not set
181# CONFIG_ARCH_DAVINCI is not set
182# CONFIG_ARCH_OMAP is not set
183# CONFIG_ARCH_BCMRING is not set
184
185#
186# Intel PXA2xx/PXA3xx Implementations
187#
188
189#
190# Supported PXA3xx Processor Variants
191#
192CONFIG_CPU_PXA300=y
193# CONFIG_CPU_PXA310 is not set
194CONFIG_CPU_PXA320=y
195# CONFIG_CPU_PXA930 is not set
196# CONFIG_CPU_PXA935 is not set
197# CONFIG_CPU_PXA950 is not set
198
199#
200# Intel/Marvell Dev Platforms (sorted by hardware release time)
201#
202# CONFIG_ARCH_LUBBOCK is not set
203# CONFIG_MACH_MAINSTONE is not set
204# CONFIG_MACH_ZYLONITE is not set
205# CONFIG_MACH_LITTLETON is not set
206# CONFIG_MACH_TAVOREVB is not set
207# CONFIG_MACH_SAAR is not set
208
209#
210# Third Party Dev Platforms (sorted by vendor name)
211#
212# CONFIG_ARCH_PXA_IDP is not set
213# CONFIG_ARCH_VIPER is not set
214# CONFIG_MACH_BALLOON3 is not set
215# CONFIG_MACH_CSB726 is not set
216# CONFIG_MACH_ARMCORE is not set
217# CONFIG_MACH_EM_X270 is not set
218# CONFIG_MACH_EXEDA is not set
219# CONFIG_MACH_CM_X300 is not set
220# CONFIG_ARCH_GUMSTIX is not set
221# CONFIG_MACH_INTELMOTE2 is not set
222# CONFIG_MACH_STARGATE2 is not set
223# CONFIG_MACH_XCEP is not set
224# CONFIG_TRIZEPS_PXA is not set
225# CONFIG_MACH_LOGICPD_PXA270 is not set
226# CONFIG_MACH_PCM027 is not set
227# CONFIG_MACH_COLIBRI is not set
228# CONFIG_MACH_COLIBRI300 is not set
229# CONFIG_MACH_COLIBRI320 is not set
230
231#
232# End-user Products (sorted by vendor name)
233#
234# CONFIG_MACH_H4700 is not set
235# CONFIG_MACH_H5000 is not set
236# CONFIG_MACH_HIMALAYA is not set
237# CONFIG_MACH_MAGICIAN is not set
238# CONFIG_MACH_MIOA701 is not set
239# CONFIG_PXA_EZX is not set
240# CONFIG_MACH_MP900C is not set
241# CONFIG_ARCH_PXA_PALM is not set
242CONFIG_MACH_RAUMFELD_RC=y
243CONFIG_MACH_RAUMFELD_CONNECTOR=y
244CONFIG_MACH_RAUMFELD_PROTO=y
245CONFIG_MACH_RAUMFELD_SPEAKER=y
246# CONFIG_PXA_SHARPSL is not set
247# CONFIG_ARCH_PXA_ESERIES is not set
248CONFIG_PXA3xx=y
249CONFIG_PXA_SSP=y
250CONFIG_PLAT_PXA=y
251
252#
253# Processor Type
254#
255CONFIG_CPU_32=y
256CONFIG_CPU_XSC3=y
257CONFIG_CPU_32v5=y
258CONFIG_CPU_ABRT_EV5T=y
259CONFIG_CPU_PABRT_LEGACY=y
260CONFIG_CPU_CACHE_VIVT=y
261CONFIG_CPU_TLB_V4WBI=y
262CONFIG_CPU_CP15=y
263CONFIG_CPU_CP15_MMU=y
264CONFIG_IO_36=y
265
266#
267# Processor Features
268#
269CONFIG_ARM_THUMB=y
270# CONFIG_CPU_DCACHE_DISABLE is not set
271# CONFIG_CPU_BPREDICT_DISABLE is not set
272CONFIG_OUTER_CACHE=y
273CONFIG_CACHE_XSC3L2=y
274CONFIG_ARM_L1_CACHE_SHIFT=5
275CONFIG_IWMMXT=y
276CONFIG_COMMON_CLKDEV=y
277
278#
279# Bus support
280#
281# CONFIG_PCI_SYSCALL is not set
282# CONFIG_ARCH_SUPPORTS_MSI is not set
283# CONFIG_PCCARD is not set
284
285#
286# Kernel Features
287#
288CONFIG_TICK_ONESHOT=y
289CONFIG_NO_HZ=y
290# CONFIG_HIGH_RES_TIMERS is not set
291CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
292CONFIG_VMSPLIT_3G=y
293# CONFIG_VMSPLIT_2G is not set
294# CONFIG_VMSPLIT_1G is not set
295CONFIG_PAGE_OFFSET=0xC0000000
296CONFIG_PREEMPT_NONE=y
297# CONFIG_PREEMPT_VOLUNTARY is not set
298# CONFIG_PREEMPT is not set
299CONFIG_HZ=100
300CONFIG_AEABI=y
301# CONFIG_OABI_COMPAT is not set
302# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
303# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
304# CONFIG_HIGHMEM is not set
305CONFIG_SELECT_MEMORY_MODEL=y
306CONFIG_FLATMEM_MANUAL=y
307# CONFIG_DISCONTIGMEM_MANUAL is not set
308# CONFIG_SPARSEMEM_MANUAL is not set
309CONFIG_FLATMEM=y
310CONFIG_FLAT_NODE_MEM_MAP=y
311CONFIG_PAGEFLAGS_EXTENDED=y
312CONFIG_SPLIT_PTLOCK_CPUS=4096
313# CONFIG_PHYS_ADDR_T_64BIT is not set
314CONFIG_ZONE_DMA_FLAG=0
315CONFIG_VIRT_TO_BUS=y
316CONFIG_HAVE_MLOCK=y
317CONFIG_HAVE_MLOCKED_PAGE_BIT=y
318# CONFIG_KSM is not set
319CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
320CONFIG_ALIGNMENT_TRAP=y
321# CONFIG_UACCESS_WITH_MEMCPY is not set
322
323#
324# Boot options
325#
326CONFIG_ZBOOT_ROM_TEXT=0
327CONFIG_ZBOOT_ROM_BSS=0
328CONFIG_CMDLINE="console=ttyS0,115200 rw"
329# CONFIG_XIP_KERNEL is not set
330# CONFIG_KEXEC is not set
331
332#
333# CPU Power Management
334#
335CONFIG_CPU_FREQ=y
336CONFIG_CPU_FREQ_TABLE=y
337# CONFIG_CPU_FREQ_DEBUG is not set
338CONFIG_CPU_FREQ_STAT=y
339# CONFIG_CPU_FREQ_STAT_DETAILS is not set
340CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
341# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
342# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
343# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
344# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
345CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
346# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
347# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
348# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
349# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
350CONFIG_CPU_IDLE=y
351CONFIG_CPU_IDLE_GOV_LADDER=y
352CONFIG_CPU_IDLE_GOV_MENU=y
353
354#
355# Floating point emulation
356#
357
358#
359# At least one emulation must be selected
360#
361
362#
363# Userspace binary formats
364#
365CONFIG_BINFMT_ELF=y
366# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
367CONFIG_HAVE_AOUT=y
368# CONFIG_BINFMT_AOUT is not set
369# CONFIG_BINFMT_MISC is not set
370
371#
372# Power management options
373#
374CONFIG_PM=y
375# CONFIG_PM_DEBUG is not set
376CONFIG_PM_SLEEP=y
377CONFIG_SUSPEND=y
378CONFIG_SUSPEND_FREEZER=y
379CONFIG_APM_EMULATION=y
380# CONFIG_PM_RUNTIME is not set
381CONFIG_ARCH_SUSPEND_POSSIBLE=y
382CONFIG_NET=y
383
384#
385# Networking options
386#
387CONFIG_PACKET=y
388CONFIG_PACKET_MMAP=y
389CONFIG_UNIX=y
390CONFIG_XFRM=y
391# CONFIG_XFRM_USER is not set
392# CONFIG_XFRM_SUB_POLICY is not set
393# CONFIG_XFRM_MIGRATE is not set
394# CONFIG_XFRM_STATISTICS is not set
395# CONFIG_NET_KEY is not set
396CONFIG_INET=y
397CONFIG_IP_MULTICAST=y
398# CONFIG_IP_ADVANCED_ROUTER is not set
399CONFIG_IP_FIB_HASH=y
400CONFIG_IP_PNP=y
401# CONFIG_IP_PNP_DHCP is not set
402# CONFIG_IP_PNP_BOOTP is not set
403# CONFIG_IP_PNP_RARP is not set
404# CONFIG_NET_IPIP is not set
405# CONFIG_NET_IPGRE is not set
406# CONFIG_IP_MROUTE is not set
407# CONFIG_ARPD is not set
408CONFIG_SYN_COOKIES=y
409# CONFIG_INET_AH is not set
410# CONFIG_INET_ESP is not set
411# CONFIG_INET_IPCOMP is not set
412# CONFIG_INET_XFRM_TUNNEL is not set
413CONFIG_INET_TUNNEL=y
414CONFIG_INET_XFRM_MODE_TRANSPORT=y
415CONFIG_INET_XFRM_MODE_TUNNEL=y
416CONFIG_INET_XFRM_MODE_BEET=y
417# CONFIG_INET_LRO is not set
418CONFIG_INET_DIAG=y
419CONFIG_INET_TCP_DIAG=y
420# CONFIG_TCP_CONG_ADVANCED is not set
421CONFIG_TCP_CONG_CUBIC=y
422CONFIG_DEFAULT_TCP_CONG="cubic"
423# CONFIG_TCP_MD5SIG is not set
424CONFIG_IPV6=y
425# CONFIG_IPV6_PRIVACY is not set
426# CONFIG_IPV6_ROUTER_PREF is not set
427# CONFIG_IPV6_OPTIMISTIC_DAD is not set
428# CONFIG_INET6_AH is not set
429# CONFIG_INET6_ESP is not set
430# CONFIG_INET6_IPCOMP is not set
431# CONFIG_IPV6_MIP6 is not set
432# CONFIG_INET6_XFRM_TUNNEL is not set
433# CONFIG_INET6_TUNNEL is not set
434CONFIG_INET6_XFRM_MODE_TRANSPORT=y
435CONFIG_INET6_XFRM_MODE_TUNNEL=y
436CONFIG_INET6_XFRM_MODE_BEET=y
437# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
438CONFIG_IPV6_SIT=y
439CONFIG_IPV6_NDISC_NODETYPE=y
440# CONFIG_IPV6_TUNNEL is not set
441# CONFIG_IPV6_MULTIPLE_TABLES is not set
442# CONFIG_IPV6_MROUTE is not set
443# CONFIG_NETWORK_SECMARK is not set
444# CONFIG_NETFILTER is not set
445# CONFIG_IP_DCCP is not set
446# CONFIG_IP_SCTP is not set
447# CONFIG_RDS is not set
448# CONFIG_TIPC is not set
449# CONFIG_ATM is not set
450# CONFIG_BRIDGE is not set
451# CONFIG_NET_DSA is not set
452# CONFIG_VLAN_8021Q is not set
453# CONFIG_DECNET is not set
454# CONFIG_LLC2 is not set
455# CONFIG_IPX is not set
456# CONFIG_ATALK is not set
457# CONFIG_X25 is not set
458# CONFIG_LAPB is not set
459# CONFIG_ECONET is not set
460# CONFIG_WAN_ROUTER is not set
461# CONFIG_PHONET is not set
462# CONFIG_IEEE802154 is not set
463# CONFIG_NET_SCHED is not set
464# CONFIG_DCB is not set
465
466#
467# Network testing
468#
469# CONFIG_NET_PKTGEN is not set
470# CONFIG_HAMRADIO is not set
471# CONFIG_CAN is not set
472# CONFIG_IRDA is not set
473# CONFIG_BT is not set
474# CONFIG_AF_RXRPC is not set
475CONFIG_WIRELESS=y
476CONFIG_CFG80211=y
477# CONFIG_NL80211_TESTMODE is not set
478# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
479CONFIG_CFG80211_REG_DEBUG=y
480CONFIG_CFG80211_DEFAULT_PS=y
481CONFIG_CFG80211_DEFAULT_PS_VALUE=1
482CONFIG_WIRELESS_OLD_REGULATORY=y
483CONFIG_WIRELESS_EXT=y
484CONFIG_WIRELESS_EXT_SYSFS=y
485CONFIG_LIB80211=y
486# CONFIG_LIB80211_DEBUG is not set
487CONFIG_MAC80211=y
488CONFIG_MAC80211_RC_MINSTREL=y
489# CONFIG_MAC80211_RC_DEFAULT_PID is not set
490CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
491CONFIG_MAC80211_RC_DEFAULT="minstrel"
492# CONFIG_MAC80211_MESH is not set
493# CONFIG_MAC80211_LEDS is not set
494# CONFIG_MAC80211_DEBUG_MENU is not set
495# CONFIG_WIMAX is not set
496# CONFIG_RFKILL is not set
497# CONFIG_NET_9P is not set
498
499#
500# Device Drivers
501#
502
503#
504# Generic Driver Options
505#
506CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
507# CONFIG_DEVTMPFS is not set
508CONFIG_STANDALONE=y
509CONFIG_PREVENT_FIRMWARE_BUILD=y
510CONFIG_FW_LOADER=y
511CONFIG_FIRMWARE_IN_KERNEL=y
512CONFIG_EXTRA_FIRMWARE=""
513# CONFIG_DEBUG_DRIVER is not set
514# CONFIG_DEBUG_DEVRES is not set
515# CONFIG_SYS_HYPERVISOR is not set
516# CONFIG_CONNECTOR is not set
517CONFIG_MTD=y
518# CONFIG_MTD_DEBUG is not set
519# CONFIG_MTD_TESTS is not set
520CONFIG_MTD_CONCAT=y
521CONFIG_MTD_PARTITIONS=y
522# CONFIG_MTD_REDBOOT_PARTS is not set
523# CONFIG_MTD_CMDLINE_PARTS is not set
524# CONFIG_MTD_AFS_PARTS is not set
525# CONFIG_MTD_AR7_PARTS is not set
526
527#
528# User Modules And Translation Layers
529#
530CONFIG_MTD_CHAR=y
531CONFIG_MTD_BLKDEVS=y
532CONFIG_MTD_BLOCK=y
533# CONFIG_FTL is not set
534CONFIG_NFTL=y
535CONFIG_NFTL_RW=y
536# CONFIG_INFTL is not set
537# CONFIG_RFD_FTL is not set
538# CONFIG_SSFDC is not set
539# CONFIG_MTD_OOPS is not set
540
541#
542# RAM/ROM/Flash chip drivers
543#
544# CONFIG_MTD_CFI is not set
545# CONFIG_MTD_JEDECPROBE is not set
546CONFIG_MTD_MAP_BANK_WIDTH_1=y
547CONFIG_MTD_MAP_BANK_WIDTH_2=y
548CONFIG_MTD_MAP_BANK_WIDTH_4=y
549# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
550# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
551# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
552CONFIG_MTD_CFI_I1=y
553CONFIG_MTD_CFI_I2=y
554# CONFIG_MTD_CFI_I4 is not set
555# CONFIG_MTD_CFI_I8 is not set
556# CONFIG_MTD_RAM is not set
557# CONFIG_MTD_ROM is not set
558# CONFIG_MTD_ABSENT is not set
559
560#
561# Mapping drivers for chip access
562#
563# CONFIG_MTD_COMPLEX_MAPPINGS is not set
564# CONFIG_MTD_PLATRAM is not set
565
566#
567# Self-contained MTD device drivers
568#
569# CONFIG_MTD_DATAFLASH is not set
570# CONFIG_MTD_M25P80 is not set
571# CONFIG_MTD_SST25L is not set
572# CONFIG_MTD_SLRAM is not set
573# CONFIG_MTD_PHRAM is not set
574# CONFIG_MTD_MTDRAM is not set
575CONFIG_MTD_BLOCK2MTD=y
576
577#
578# Disk-On-Chip Device Drivers
579#
580# CONFIG_MTD_DOC2000 is not set
581# CONFIG_MTD_DOC2001 is not set
582# CONFIG_MTD_DOC2001PLUS is not set
583CONFIG_MTD_NAND=y
584# CONFIG_MTD_NAND_VERIFY_WRITE is not set
585# CONFIG_MTD_NAND_ECC_SMC is not set
586# CONFIG_MTD_NAND_MUSEUM_IDS is not set
587# CONFIG_MTD_NAND_H1900 is not set
588# CONFIG_MTD_NAND_GPIO is not set
589CONFIG_MTD_NAND_IDS=y
590# CONFIG_MTD_NAND_DISKONCHIP is not set
591# CONFIG_MTD_NAND_SHARPSL is not set
592CONFIG_MTD_NAND_PXA3xx=y
593# CONFIG_MTD_NAND_PXA3xx_BUILTIN is not set
594# CONFIG_MTD_NAND_NANDSIM is not set
595# CONFIG_MTD_NAND_PLATFORM is not set
596# CONFIG_MTD_ALAUDA is not set
597# CONFIG_MTD_ONENAND is not set
598
599#
600# LPDDR flash memory drivers
601#
602# CONFIG_MTD_LPDDR is not set
603
604#
605# UBI - Unsorted block images
606#
607CONFIG_MTD_UBI=y
608CONFIG_MTD_UBI_WL_THRESHOLD=4096
609CONFIG_MTD_UBI_BEB_RESERVE=1
610# CONFIG_MTD_UBI_GLUEBI is not set
611
612#
613# UBI debugging options
614#
615# CONFIG_MTD_UBI_DEBUG is not set
616# CONFIG_PARPORT is not set
617CONFIG_BLK_DEV=y
618# CONFIG_BLK_DEV_COW_COMMON is not set
619CONFIG_BLK_DEV_LOOP=y
620# CONFIG_BLK_DEV_CRYPTOLOOP is not set
621# CONFIG_BLK_DEV_NBD is not set
622# CONFIG_BLK_DEV_UB is not set
623# CONFIG_BLK_DEV_RAM is not set
624# CONFIG_CDROM_PKTCDVD is not set
625# CONFIG_ATA_OVER_ETH is not set
626# CONFIG_MG_DISK is not set
627CONFIG_MISC_DEVICES=y
628# CONFIG_ICS932S401 is not set
629# CONFIG_ENCLOSURE_SERVICES is not set
630CONFIG_ISL29003=y
631CONFIG_TI_DAC7512=y
632# CONFIG_C2PORT is not set
633
634#
635# EEPROM support
636#
637# CONFIG_EEPROM_AT24 is not set
638# CONFIG_EEPROM_AT25 is not set
639# CONFIG_EEPROM_LEGACY is not set
640# CONFIG_EEPROM_MAX6875 is not set
641# CONFIG_EEPROM_93CX6 is not set
642CONFIG_HAVE_IDE=y
643# CONFIG_IDE is not set
644
645#
646# SCSI device support
647#
648# CONFIG_RAID_ATTRS is not set
649CONFIG_SCSI=y
650CONFIG_SCSI_DMA=y
651# CONFIG_SCSI_TGT is not set
652# CONFIG_SCSI_NETLINK is not set
653CONFIG_SCSI_PROC_FS=y
654
655#
656# SCSI support type (disk, tape, CD-ROM)
657#
658CONFIG_BLK_DEV_SD=y
659# CONFIG_CHR_DEV_ST is not set
660# CONFIG_CHR_DEV_OSST is not set
661# CONFIG_BLK_DEV_SR is not set
662CONFIG_CHR_DEV_SG=y
663# CONFIG_CHR_DEV_SCH is not set
664# CONFIG_SCSI_MULTI_LUN is not set
665# CONFIG_SCSI_CONSTANTS is not set
666# CONFIG_SCSI_LOGGING is not set
667# CONFIG_SCSI_SCAN_ASYNC is not set
668CONFIG_SCSI_WAIT_SCAN=m
669
670#
671# SCSI Transports
672#
673# CONFIG_SCSI_SPI_ATTRS is not set
674# CONFIG_SCSI_FC_ATTRS is not set
675# CONFIG_SCSI_ISCSI_ATTRS is not set
676# CONFIG_SCSI_SAS_LIBSAS is not set
677# CONFIG_SCSI_SRP_ATTRS is not set
678CONFIG_SCSI_LOWLEVEL=y
679# CONFIG_ISCSI_TCP is not set
680# CONFIG_LIBFC is not set
681# CONFIG_LIBFCOE is not set
682# CONFIG_SCSI_DEBUG is not set
683# CONFIG_SCSI_DH is not set
684# CONFIG_SCSI_OSD_INITIATOR is not set
685# CONFIG_ATA is not set
686# CONFIG_MD is not set
687CONFIG_NETDEVICES=y
688# CONFIG_DUMMY is not set
689# CONFIG_BONDING is not set
690# CONFIG_MACVLAN is not set
691# CONFIG_EQUALIZER is not set
692# CONFIG_TUN is not set
693# CONFIG_VETH is not set
694CONFIG_PHYLIB=y
695
696#
697# MII PHY device drivers
698#
699# CONFIG_MARVELL_PHY is not set
700# CONFIG_DAVICOM_PHY is not set
701# CONFIG_QSEMI_PHY is not set
702# CONFIG_LXT_PHY is not set
703# CONFIG_CICADA_PHY is not set
704# CONFIG_VITESSE_PHY is not set
705# CONFIG_SMSC_PHY is not set
706# CONFIG_BROADCOM_PHY is not set
707# CONFIG_ICPLUS_PHY is not set
708# CONFIG_REALTEK_PHY is not set
709# CONFIG_NATIONAL_PHY is not set
710# CONFIG_STE10XP is not set
711# CONFIG_LSI_ET1011C_PHY is not set
712# CONFIG_FIXED_PHY is not set
713# CONFIG_MDIO_BITBANG is not set
714CONFIG_NET_ETHERNET=y
715CONFIG_MII=y
716# CONFIG_AX88796 is not set
717# CONFIG_SMC91X is not set
718# CONFIG_DM9000 is not set
719# CONFIG_ENC28J60 is not set
720# CONFIG_ETHOC is not set
721# CONFIG_SMC911X is not set
722CONFIG_SMSC911X=y
723# CONFIG_DNET is not set
724# CONFIG_IBM_NEW_EMAC_ZMII is not set
725# CONFIG_IBM_NEW_EMAC_RGMII is not set
726# CONFIG_IBM_NEW_EMAC_TAH is not set
727# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
728# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
729# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
730# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
731# CONFIG_B44 is not set
732# CONFIG_KS8842 is not set
733# CONFIG_KS8851 is not set
734# CONFIG_KS8851_MLL is not set
735# CONFIG_NETDEV_1000 is not set
736# CONFIG_NETDEV_10000 is not set
737CONFIG_WLAN=y
738# CONFIG_WLAN_PRE80211 is not set
739CONFIG_WLAN_80211=y
740CONFIG_LIBERTAS=y
741# CONFIG_LIBERTAS_USB is not set
742CONFIG_LIBERTAS_SDIO=m
743# CONFIG_LIBERTAS_SPI is not set
744# CONFIG_LIBERTAS_DEBUG is not set
745# CONFIG_LIBERTAS_THINFIRM is not set
746# CONFIG_AT76C50X_USB is not set
747# CONFIG_USB_ZD1201 is not set
748# CONFIG_USB_NET_RNDIS_WLAN is not set
749# CONFIG_RTL8187 is not set
750# CONFIG_MAC80211_HWSIM is not set
751# CONFIG_P54_COMMON is not set
752# CONFIG_ATH_COMMON is not set
753# CONFIG_HOSTAP is not set
754# CONFIG_B43 is not set
755# CONFIG_B43LEGACY is not set
756# CONFIG_ZD1211RW is not set
757# CONFIG_RT2X00 is not set
758# CONFIG_WL12XX is not set
759# CONFIG_IWM is not set
760
761#
762# Enable WiMAX (Networking options) to see the WiMAX drivers
763#
764
765#
766# USB Network Adapters
767#
768# CONFIG_USB_CATC is not set
769# CONFIG_USB_KAWETH is not set
770# CONFIG_USB_PEGASUS is not set
771# CONFIG_USB_RTL8150 is not set
772CONFIG_USB_USBNET=y
773# CONFIG_USB_NET_AX8817X is not set
774CONFIG_USB_NET_CDCETHER=y
775# CONFIG_USB_NET_CDC_EEM is not set
776# CONFIG_USB_NET_DM9601 is not set
777# CONFIG_USB_NET_SMSC95XX is not set
778# CONFIG_USB_NET_GL620A is not set
779# CONFIG_USB_NET_NET1080 is not set
780# CONFIG_USB_NET_PLUSB is not set
781CONFIG_USB_NET_MCS7830=y
782# CONFIG_USB_NET_RNDIS_HOST is not set
783# CONFIG_USB_NET_CDC_SUBSET is not set
784# CONFIG_USB_NET_ZAURUS is not set
785# CONFIG_USB_NET_INT51X1 is not set
786# CONFIG_WAN is not set
787# CONFIG_PPP is not set
788# CONFIG_SLIP is not set
789# CONFIG_NETCONSOLE is not set
790# CONFIG_NETPOLL is not set
791# CONFIG_NET_POLL_CONTROLLER is not set
792# CONFIG_ISDN is not set
793# CONFIG_PHONE is not set
794
795#
796# Input device support
797#
798CONFIG_INPUT=y
799# CONFIG_INPUT_FF_MEMLESS is not set
800CONFIG_INPUT_POLLDEV=y
801
802#
803# Userland interfaces
804#
805CONFIG_INPUT_MOUSEDEV=y
806CONFIG_INPUT_MOUSEDEV_PSAUX=y
807CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
808CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
809# CONFIG_INPUT_JOYDEV is not set
810CONFIG_INPUT_EVDEV=y
811# CONFIG_INPUT_EVBUG is not set
812
813#
814# Input Device Drivers
815#
816CONFIG_INPUT_KEYBOARD=y
817# CONFIG_KEYBOARD_ADP5588 is not set
818CONFIG_KEYBOARD_ATKBD=y
819# CONFIG_QT2160 is not set
820# CONFIG_KEYBOARD_LKKBD is not set
821CONFIG_KEYBOARD_GPIO=y
822# CONFIG_KEYBOARD_MATRIX is not set
823# CONFIG_KEYBOARD_LM8323 is not set
824# CONFIG_KEYBOARD_MAX7359 is not set
825# CONFIG_KEYBOARD_NEWTON is not set
826# CONFIG_KEYBOARD_OPENCORES is not set
827# CONFIG_KEYBOARD_PXA27x is not set
828# CONFIG_KEYBOARD_STOWAWAY is not set
829# CONFIG_KEYBOARD_SUNKBD is not set
830# CONFIG_KEYBOARD_XTKBD is not set
831# CONFIG_INPUT_MOUSE is not set
832# CONFIG_INPUT_JOYSTICK is not set
833# CONFIG_INPUT_TABLET is not set
834CONFIG_INPUT_TOUCHSCREEN=y
835# CONFIG_TOUCHSCREEN_ADS7846 is not set
836# CONFIG_TOUCHSCREEN_AD7877 is not set
837# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
838# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
839# CONFIG_TOUCHSCREEN_AD7879 is not set
840CONFIG_TOUCHSCREEN_EETI=m
841# CONFIG_TOUCHSCREEN_FUJITSU is not set
842# CONFIG_TOUCHSCREEN_GUNZE is not set
843# CONFIG_TOUCHSCREEN_ELO is not set
844# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
845# CONFIG_TOUCHSCREEN_MCS5000 is not set
846# CONFIG_TOUCHSCREEN_MTOUCH is not set
847# CONFIG_TOUCHSCREEN_INEXIO is not set
848# CONFIG_TOUCHSCREEN_MK712 is not set
849# CONFIG_TOUCHSCREEN_PENMOUNT is not set
850# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
851# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
852# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
853# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
854# CONFIG_TOUCHSCREEN_TSC2007 is not set
855# CONFIG_TOUCHSCREEN_W90X900 is not set
856CONFIG_INPUT_MISC=y
857# CONFIG_INPUT_ATI_REMOTE is not set
858# CONFIG_INPUT_ATI_REMOTE2 is not set
859# CONFIG_INPUT_KEYSPAN_REMOTE is not set
860# CONFIG_INPUT_POWERMATE is not set
861# CONFIG_INPUT_YEALINK is not set
862# CONFIG_INPUT_CM109 is not set
863# CONFIG_INPUT_UINPUT is not set
864CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
865
866#
867# Hardware I/O ports
868#
869CONFIG_SERIO=y
870CONFIG_SERIO_SERPORT=y
871CONFIG_SERIO_LIBPS2=y
872# CONFIG_SERIO_RAW is not set
873# CONFIG_GAMEPORT is not set
874
875#
876# Character devices
877#
878CONFIG_VT=y
879CONFIG_CONSOLE_TRANSLATIONS=y
880CONFIG_VT_CONSOLE=y
881CONFIG_HW_CONSOLE=y
882# CONFIG_VT_HW_CONSOLE_BINDING is not set
883CONFIG_DEVKMEM=y
884# CONFIG_SERIAL_NONSTANDARD is not set
885
886#
887# Serial drivers
888#
889# CONFIG_SERIAL_8250 is not set
890
891#
892# Non-8250 serial port support
893#
894# CONFIG_SERIAL_MAX3100 is not set
895CONFIG_SERIAL_PXA=y
896CONFIG_SERIAL_PXA_CONSOLE=y
897CONFIG_SERIAL_CORE=y
898CONFIG_SERIAL_CORE_CONSOLE=y
899CONFIG_UNIX98_PTYS=y
900# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
901CONFIG_LEGACY_PTYS=y
902CONFIG_LEGACY_PTY_COUNT=256
903# CONFIG_IPMI_HANDLER is not set
904CONFIG_HW_RANDOM=y
905# CONFIG_HW_RANDOM_TIMERIOMEM is not set
906# CONFIG_R3964 is not set
907# CONFIG_RAW_DRIVER is not set
908# CONFIG_TCG_TPM is not set
909CONFIG_I2C=y
910CONFIG_I2C_BOARDINFO=y
911CONFIG_I2C_COMPAT=y
912CONFIG_I2C_CHARDEV=y
913CONFIG_I2C_HELPER_AUTO=y
914
915#
916# I2C Hardware Bus support
917#
918
919#
920# I2C system bus drivers (mostly embedded / system-on-chip)
921#
922# CONFIG_I2C_DESIGNWARE is not set
923# CONFIG_I2C_GPIO is not set
924# CONFIG_I2C_OCORES is not set
925CONFIG_I2C_PXA=y
926# CONFIG_I2C_PXA_SLAVE is not set
927# CONFIG_I2C_SIMTEC is not set
928
929#
930# External I2C/SMBus adapter drivers
931#
932# CONFIG_I2C_PARPORT_LIGHT is not set
933# CONFIG_I2C_TAOS_EVM is not set
934# CONFIG_I2C_TINY_USB is not set
935
936#
937# Other I2C/SMBus bus drivers
938#
939# CONFIG_I2C_PCA_PLATFORM is not set
940# CONFIG_I2C_STUB is not set
941
942#
943# Miscellaneous I2C Chip support
944#
945# CONFIG_DS1682 is not set
946# CONFIG_SENSORS_TSL2550 is not set
947# CONFIG_I2C_DEBUG_CORE is not set
948# CONFIG_I2C_DEBUG_ALGO is not set
949# CONFIG_I2C_DEBUG_BUS is not set
950# CONFIG_I2C_DEBUG_CHIP is not set
951CONFIG_SPI=y
952CONFIG_SPI_DEBUG=y
953CONFIG_SPI_MASTER=y
954
955#
956# SPI Master Controller Drivers
957#
958CONFIG_SPI_BITBANG=y
959CONFIG_SPI_GPIO=y
960# CONFIG_SPI_PXA2XX is not set
961
962#
963# SPI Protocol Masters
964#
965CONFIG_SPI_SPIDEV=y
966# CONFIG_SPI_TLE62X0 is not set
967
968#
969# PPS support
970#
971# CONFIG_PPS is not set
972CONFIG_ARCH_REQUIRE_GPIOLIB=y
973CONFIG_GPIOLIB=y
974CONFIG_DEBUG_GPIO=y
975# CONFIG_GPIO_SYSFS is not set
976
977#
978# Memory mapped GPIO expanders:
979#
980
981#
982# I2C GPIO expanders:
983#
984# CONFIG_GPIO_MAX732X is not set
985# CONFIG_GPIO_PCA953X is not set
986# CONFIG_GPIO_PCF857X is not set
987
988#
989# PCI GPIO expanders:
990#
991
992#
993# SPI GPIO expanders:
994#
995# CONFIG_GPIO_MAX7301 is not set
996# CONFIG_GPIO_MCP23S08 is not set
997# CONFIG_GPIO_MC33880 is not set
998
999#
1000# AC97 GPIO expanders:
1001#
1002CONFIG_W1=m
1003
1004#
1005# 1-wire Bus Masters
1006#
1007# CONFIG_W1_MASTER_DS2490 is not set
1008# CONFIG_W1_MASTER_DS2482 is not set
1009# CONFIG_W1_MASTER_DS1WM is not set
1010CONFIG_W1_MASTER_GPIO=m
1011
1012#
1013# 1-wire Slaves
1014#
1015# CONFIG_W1_SLAVE_THERM is not set
1016# CONFIG_W1_SLAVE_SMEM is not set
1017# CONFIG_W1_SLAVE_DS2431 is not set
1018# CONFIG_W1_SLAVE_DS2433 is not set
1019CONFIG_W1_SLAVE_DS2760=m
1020# CONFIG_W1_SLAVE_BQ27000 is not set
1021CONFIG_POWER_SUPPLY=y
1022# CONFIG_POWER_SUPPLY_DEBUG is not set
1023CONFIG_PDA_POWER=y
1024# CONFIG_APM_POWER is not set
1025CONFIG_BATTERY_DS2760=m
1026# CONFIG_BATTERY_DS2782 is not set
1027# CONFIG_BATTERY_BQ27x00 is not set
1028# CONFIG_BATTERY_MAX17040 is not set
1029CONFIG_HWMON=y
1030# CONFIG_HWMON_VID is not set
1031# CONFIG_HWMON_DEBUG_CHIP is not set
1032
1033#
1034# Native drivers
1035#
1036# CONFIG_SENSORS_AD7414 is not set
1037# CONFIG_SENSORS_AD7418 is not set
1038# CONFIG_SENSORS_ADCXX is not set
1039# CONFIG_SENSORS_ADM1021 is not set
1040# CONFIG_SENSORS_ADM1025 is not set
1041# CONFIG_SENSORS_ADM1026 is not set
1042# CONFIG_SENSORS_ADM1029 is not set
1043# CONFIG_SENSORS_ADM1031 is not set
1044# CONFIG_SENSORS_ADM9240 is not set
1045# CONFIG_SENSORS_ADT7462 is not set
1046# CONFIG_SENSORS_ADT7470 is not set
1047# CONFIG_SENSORS_ADT7473 is not set
1048# CONFIG_SENSORS_ADT7475 is not set
1049# CONFIG_SENSORS_ATXP1 is not set
1050# CONFIG_SENSORS_DS1621 is not set
1051# CONFIG_SENSORS_F71805F is not set
1052# CONFIG_SENSORS_F71882FG is not set
1053# CONFIG_SENSORS_F75375S is not set
1054# CONFIG_SENSORS_G760A is not set
1055# CONFIG_SENSORS_GL518SM is not set
1056# CONFIG_SENSORS_GL520SM is not set
1057# CONFIG_SENSORS_IT87 is not set
1058# CONFIG_SENSORS_LM63 is not set
1059# CONFIG_SENSORS_LM70 is not set
1060# CONFIG_SENSORS_LM75 is not set
1061# CONFIG_SENSORS_LM77 is not set
1062# CONFIG_SENSORS_LM78 is not set
1063# CONFIG_SENSORS_LM80 is not set
1064# CONFIG_SENSORS_LM83 is not set
1065# CONFIG_SENSORS_LM85 is not set
1066# CONFIG_SENSORS_LM87 is not set
1067# CONFIG_SENSORS_LM90 is not set
1068# CONFIG_SENSORS_LM92 is not set
1069# CONFIG_SENSORS_LM93 is not set
1070# CONFIG_SENSORS_LTC4215 is not set
1071# CONFIG_SENSORS_LTC4245 is not set
1072# CONFIG_SENSORS_LM95241 is not set
1073# CONFIG_SENSORS_MAX1111 is not set
1074# CONFIG_SENSORS_MAX1619 is not set
1075# CONFIG_SENSORS_MAX6650 is not set
1076# CONFIG_SENSORS_PC87360 is not set
1077# CONFIG_SENSORS_PC87427 is not set
1078# CONFIG_SENSORS_PCF8591 is not set
1079# CONFIG_SENSORS_SHT15 is not set
1080# CONFIG_SENSORS_DME1737 is not set
1081# CONFIG_SENSORS_SMSC47M1 is not set
1082# CONFIG_SENSORS_SMSC47M192 is not set
1083# CONFIG_SENSORS_SMSC47B397 is not set
1084# CONFIG_SENSORS_ADS7828 is not set
1085# CONFIG_SENSORS_THMC50 is not set
1086# CONFIG_SENSORS_TMP401 is not set
1087# CONFIG_SENSORS_TMP421 is not set
1088# CONFIG_SENSORS_VT1211 is not set
1089# CONFIG_SENSORS_W83781D is not set
1090# CONFIG_SENSORS_W83791D is not set
1091# CONFIG_SENSORS_W83792D is not set
1092# CONFIG_SENSORS_W83793 is not set
1093# CONFIG_SENSORS_W83L785TS is not set
1094# CONFIG_SENSORS_W83L786NG is not set
1095# CONFIG_SENSORS_W83627HF is not set
1096# CONFIG_SENSORS_W83627EHF is not set
1097CONFIG_SENSORS_LIS3_SPI=y
1098# CONFIG_THERMAL is not set
1099# CONFIG_WATCHDOG is not set
1100CONFIG_SSB_POSSIBLE=y
1101
1102#
1103# Sonics Silicon Backplane
1104#
1105# CONFIG_SSB is not set
1106
1107#
1108# Multifunction device drivers
1109#
1110# CONFIG_MFD_CORE is not set
1111# CONFIG_MFD_SM501 is not set
1112# CONFIG_MFD_ASIC3 is not set
1113# CONFIG_HTC_EGPIO is not set
1114# CONFIG_HTC_PASIC3 is not set
1115# CONFIG_TPS65010 is not set
1116# CONFIG_TWL4030_CORE is not set
1117# CONFIG_MFD_TMIO is not set
1118# CONFIG_MFD_T7L66XB is not set
1119# CONFIG_MFD_TC6387XB is not set
1120# CONFIG_MFD_TC6393XB is not set
1121# CONFIG_PMIC_DA903X is not set
1122# CONFIG_MFD_WM8400 is not set
1123# CONFIG_MFD_WM831X is not set
1124# CONFIG_MFD_WM8350_I2C is not set
1125# CONFIG_MFD_PCF50633 is not set
1126# CONFIG_MFD_MC13783 is not set
1127# CONFIG_AB3100_CORE is not set
1128# CONFIG_EZX_PCAP is not set
1129CONFIG_REGULATOR=y
1130CONFIG_REGULATOR_DEBUG=y
1131CONFIG_REGULATOR_FIXED_VOLTAGE=y
1132# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1133# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
1134# CONFIG_REGULATOR_BQ24022 is not set
1135# CONFIG_REGULATOR_MAX1586 is not set
1136CONFIG_REGULATOR_MAX8660=y
1137# CONFIG_REGULATOR_LP3971 is not set
1138# CONFIG_REGULATOR_TPS65023 is not set
1139# CONFIG_REGULATOR_TPS6507X is not set
1140# CONFIG_MEDIA_SUPPORT is not set
1141
1142#
1143# Graphics support
1144#
1145# CONFIG_VGASTATE is not set
1146# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1147CONFIG_FB=y
1148# CONFIG_FIRMWARE_EDID is not set
1149# CONFIG_FB_DDC is not set
1150# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1151CONFIG_FB_CFB_FILLRECT=y
1152CONFIG_FB_CFB_COPYAREA=y
1153CONFIG_FB_CFB_IMAGEBLIT=y
1154# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1155# CONFIG_FB_SYS_FILLRECT is not set
1156# CONFIG_FB_SYS_COPYAREA is not set
1157# CONFIG_FB_SYS_IMAGEBLIT is not set
1158# CONFIG_FB_FOREIGN_ENDIAN is not set
1159# CONFIG_FB_SYS_FOPS is not set
1160# CONFIG_FB_SVGALIB is not set
1161# CONFIG_FB_MACMODES is not set
1162# CONFIG_FB_BACKLIGHT is not set
1163# CONFIG_FB_MODE_HELPERS is not set
1164# CONFIG_FB_TILEBLITTING is not set
1165
1166#
1167# Frame buffer hardware drivers
1168#
1169# CONFIG_FB_S1D13XXX is not set
1170CONFIG_FB_PXA=y
1171# CONFIG_FB_PXA_OVERLAY is not set
1172# CONFIG_FB_PXA_SMARTPANEL is not set
1173# CONFIG_FB_PXA_PARAMETERS is not set
1174CONFIG_PXA3XX_GCU=y
1175# CONFIG_FB_MBX is not set
1176# CONFIG_FB_W100 is not set
1177# CONFIG_FB_VIRTUAL is not set
1178# CONFIG_FB_METRONOME is not set
1179# CONFIG_FB_MB862XX is not set
1180# CONFIG_FB_BROADSHEET is not set
1181CONFIG_BACKLIGHT_LCD_SUPPORT=y
1182# CONFIG_LCD_CLASS_DEVICE is not set
1183CONFIG_BACKLIGHT_CLASS_DEVICE=y
1184# CONFIG_BACKLIGHT_GENERIC is not set
1185CONFIG_BACKLIGHT_PWM=y
1186
1187#
1188# Display device support
1189#
1190# CONFIG_DISPLAY_SUPPORT is not set
1191
1192#
1193# Console display driver support
1194#
1195# CONFIG_VGA_CONSOLE is not set
1196CONFIG_DUMMY_CONSOLE=y
1197CONFIG_FRAMEBUFFER_CONSOLE=y
1198# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1199# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1200# CONFIG_FONTS is not set
1201CONFIG_FONT_8x8=y
1202CONFIG_FONT_8x16=y
1203CONFIG_LOGO=y
1204# CONFIG_LOGO_LINUX_MONO is not set
1205# CONFIG_LOGO_LINUX_VGA16 is not set
1206# CONFIG_LOGO_LINUX_CLUT224 is not set
1207CONFIG_LOGO_RAUMFELD_CLUT224=y
1208CONFIG_SOUND=y
1209# CONFIG_SOUND_OSS_CORE is not set
1210CONFIG_SND=y
1211CONFIG_SND_TIMER=y
1212CONFIG_SND_PCM=y
1213CONFIG_SND_JACK=y
1214# CONFIG_SND_SEQUENCER is not set
1215# CONFIG_SND_MIXER_OSS is not set
1216# CONFIG_SND_PCM_OSS is not set
1217# CONFIG_SND_DYNAMIC_MINORS is not set
1218CONFIG_SND_SUPPORT_OLD_API=y
1219CONFIG_SND_VERBOSE_PROCFS=y
1220# CONFIG_SND_VERBOSE_PRINTK is not set
1221# CONFIG_SND_DEBUG is not set
1222# CONFIG_SND_RAWMIDI_SEQ is not set
1223# CONFIG_SND_OPL3_LIB_SEQ is not set
1224# CONFIG_SND_OPL4_LIB_SEQ is not set
1225# CONFIG_SND_SBAWE_SEQ is not set
1226# CONFIG_SND_EMU10K1_SEQ is not set
1227# CONFIG_SND_DRIVERS is not set
1228CONFIG_SND_ARM=y
1229CONFIG_SND_PXA2XX_LIB=y
1230# CONFIG_SND_PXA2XX_AC97 is not set
1231CONFIG_SND_SPI=y
1232# CONFIG_SND_USB is not set
1233CONFIG_SND_SOC=y
1234CONFIG_SND_PXA2XX_SOC=y
1235CONFIG_SND_PXA_SOC_SSP=y
1236CONFIG_SND_SOC_RAUMFELD=y
1237CONFIG_SND_SOC_I2C_AND_SPI=y
1238# CONFIG_SND_SOC_ALL_CODECS is not set
1239CONFIG_SND_SOC_AK4104=y
1240CONFIG_SND_SOC_CS4270=y
1241# CONFIG_SOUND_PRIME is not set
1242CONFIG_HID_SUPPORT=y
1243CONFIG_HID=y
1244# CONFIG_HIDRAW is not set
1245
1246#
1247# USB Input Devices
1248#
1249CONFIG_USB_HID=y
1250# CONFIG_HID_PID is not set
1251# CONFIG_USB_HIDDEV is not set
1252
1253#
1254# Special HID drivers
1255#
1256CONFIG_HID_A4TECH=y
1257CONFIG_HID_APPLE=y
1258CONFIG_HID_BELKIN=y
1259CONFIG_HID_CHERRY=y
1260CONFIG_HID_CHICONY=y
1261CONFIG_HID_CYPRESS=y
1262CONFIG_HID_DRAGONRISE=y
1263# CONFIG_DRAGONRISE_FF is not set
1264CONFIG_HID_EZKEY=y
1265CONFIG_HID_KYE=y
1266CONFIG_HID_GYRATION=y
1267CONFIG_HID_TWINHAN=y
1268CONFIG_HID_KENSINGTON=y
1269CONFIG_HID_LOGITECH=y
1270# CONFIG_LOGITECH_FF is not set
1271# CONFIG_LOGIRUMBLEPAD2_FF is not set
1272CONFIG_HID_MICROSOFT=y
1273CONFIG_HID_MONTEREY=y
1274CONFIG_HID_NTRIG=y
1275CONFIG_HID_PANTHERLORD=y
1276# CONFIG_PANTHERLORD_FF is not set
1277CONFIG_HID_PETALYNX=y
1278CONFIG_HID_SAMSUNG=y
1279CONFIG_HID_SONY=y
1280CONFIG_HID_SUNPLUS=y
1281CONFIG_HID_GREENASIA=y
1282# CONFIG_GREENASIA_FF is not set
1283CONFIG_HID_SMARTJOYPLUS=y
1284# CONFIG_SMARTJOYPLUS_FF is not set
1285CONFIG_HID_TOPSEED=y
1286CONFIG_HID_THRUSTMASTER=y
1287# CONFIG_THRUSTMASTER_FF is not set
1288CONFIG_HID_ZEROPLUS=y
1289# CONFIG_ZEROPLUS_FF is not set
1290CONFIG_USB_SUPPORT=y
1291CONFIG_USB_ARCH_HAS_HCD=y
1292CONFIG_USB_ARCH_HAS_OHCI=y
1293# CONFIG_USB_ARCH_HAS_EHCI is not set
1294CONFIG_USB=y
1295CONFIG_USB_DEBUG=y
1296CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
1297
1298#
1299# Miscellaneous USB options
1300#
1301# CONFIG_USB_DEVICEFS is not set
1302CONFIG_USB_DEVICE_CLASS=y
1303# CONFIG_USB_DYNAMIC_MINORS is not set
1304# CONFIG_USB_SUSPEND is not set
1305# CONFIG_USB_OTG is not set
1306CONFIG_USB_MON=y
1307# CONFIG_USB_WUSB is not set
1308# CONFIG_USB_WUSB_CBAF is not set
1309
1310#
1311# USB Host Controller Drivers
1312#
1313# CONFIG_USB_C67X00_HCD is not set
1314# CONFIG_USB_OXU210HP_HCD is not set
1315# CONFIG_USB_ISP116X_HCD is not set
1316# CONFIG_USB_ISP1760_HCD is not set
1317# CONFIG_USB_ISP1362_HCD is not set
1318CONFIG_USB_OHCI_HCD=y
1319# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1320# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1321CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1322# CONFIG_USB_SL811_HCD is not set
1323# CONFIG_USB_R8A66597_HCD is not set
1324# CONFIG_USB_HWA_HCD is not set
1325# CONFIG_USB_MUSB_HDRC is not set
1326
1327#
1328# USB Device Class drivers
1329#
1330# CONFIG_USB_ACM is not set
1331# CONFIG_USB_PRINTER is not set
1332# CONFIG_USB_WDM is not set
1333# CONFIG_USB_TMC is not set
1334
1335#
1336# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1337#
1338
1339#
1340# also be needed; see USB_STORAGE Help for more info
1341#
1342CONFIG_USB_STORAGE=y
1343# CONFIG_USB_STORAGE_DEBUG is not set
1344# CONFIG_USB_STORAGE_DATAFAB is not set
1345CONFIG_USB_STORAGE_FREECOM=y
1346CONFIG_USB_STORAGE_ISD200=y
1347CONFIG_USB_STORAGE_USBAT=y
1348CONFIG_USB_STORAGE_SDDR09=y
1349CONFIG_USB_STORAGE_SDDR55=y
1350# CONFIG_USB_STORAGE_JUMPSHOT is not set
1351# CONFIG_USB_STORAGE_ALAUDA is not set
1352# CONFIG_USB_STORAGE_ONETOUCH is not set
1353# CONFIG_USB_STORAGE_KARMA is not set
1354# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1355# CONFIG_USB_LIBUSUAL is not set
1356
1357#
1358# USB Imaging devices
1359#
1360# CONFIG_USB_MDC800 is not set
1361# CONFIG_USB_MICROTEK is not set
1362
1363#
1364# USB port drivers
1365#
1366# CONFIG_USB_SERIAL is not set
1367
1368#
1369# USB Miscellaneous drivers
1370#
1371# CONFIG_USB_EMI62 is not set
1372# CONFIG_USB_EMI26 is not set
1373# CONFIG_USB_ADUTUX is not set
1374# CONFIG_USB_SEVSEG is not set
1375# CONFIG_USB_RIO500 is not set
1376# CONFIG_USB_LEGOTOWER is not set
1377# CONFIG_USB_LCD is not set
1378# CONFIG_USB_BERRY_CHARGE is not set
1379# CONFIG_USB_LED is not set
1380# CONFIG_USB_CYPRESS_CY7C63 is not set
1381# CONFIG_USB_CYTHERM is not set
1382# CONFIG_USB_IDMOUSE is not set
1383# CONFIG_USB_FTDI_ELAN is not set
1384# CONFIG_USB_APPLEDISPLAY is not set
1385# CONFIG_USB_LD is not set
1386# CONFIG_USB_TRANCEVIBRATOR is not set
1387# CONFIG_USB_IOWARRIOR is not set
1388# CONFIG_USB_TEST is not set
1389# CONFIG_USB_ISIGHTFW is not set
1390# CONFIG_USB_VST is not set
1391# CONFIG_USB_GADGET is not set
1392
1393#
1394# OTG and related infrastructure
1395#
1396# CONFIG_USB_GPIO_VBUS is not set
1397# CONFIG_NOP_USB_XCEIV is not set
1398CONFIG_MMC=y
1399# CONFIG_MMC_DEBUG is not set
1400# CONFIG_MMC_UNSAFE_RESUME is not set
1401
1402#
1403# MMC/SD/SDIO Card Drivers
1404#
1405CONFIG_MMC_BLOCK=y
1406CONFIG_MMC_BLOCK_BOUNCE=y
1407# CONFIG_SDIO_UART is not set
1408# CONFIG_MMC_TEST is not set
1409
1410#
1411# MMC/SD/SDIO Host Controller Drivers
1412#
1413CONFIG_MMC_PXA=m
1414# CONFIG_MMC_SDHCI is not set
1415# CONFIG_MMC_AT91 is not set
1416# CONFIG_MMC_ATMELMCI is not set
1417# CONFIG_MMC_SPI is not set
1418# CONFIG_MEMSTICK is not set
1419CONFIG_NEW_LEDS=y
1420CONFIG_LEDS_CLASS=y
1421
1422#
1423# LED drivers
1424#
1425# CONFIG_LEDS_PCA9532 is not set
1426CONFIG_LEDS_GPIO=y
1427CONFIG_LEDS_GPIO_PLATFORM=y
1428# CONFIG_LEDS_LP3944 is not set
1429# CONFIG_LEDS_PCA955X is not set
1430# CONFIG_LEDS_DAC124S085 is not set
1431# CONFIG_LEDS_PWM is not set
1432# CONFIG_LEDS_BD2802 is not set
1433CONFIG_LEDS_LT3593=y
1434
1435#
1436# LED Triggers
1437#
1438CONFIG_LEDS_TRIGGERS=y
1439# CONFIG_LEDS_TRIGGER_TIMER is not set
1440# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1441CONFIG_LEDS_TRIGGER_BACKLIGHT=y
1442# CONFIG_LEDS_TRIGGER_GPIO is not set
1443# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1444
1445#
1446# iptables trigger is under Netfilter config (LED target)
1447#
1448# CONFIG_ACCESSIBILITY is not set
1449CONFIG_RTC_LIB=y
1450CONFIG_RTC_CLASS=y
1451CONFIG_RTC_HCTOSYS=y
1452CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1453# CONFIG_RTC_DEBUG is not set
1454
1455#
1456# RTC interfaces
1457#
1458CONFIG_RTC_INTF_SYSFS=y
1459CONFIG_RTC_INTF_PROC=y
1460CONFIG_RTC_INTF_DEV=y
1461# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1462# CONFIG_RTC_DRV_TEST is not set
1463
1464#
1465# I2C RTC drivers
1466#
1467# CONFIG_RTC_DRV_DS1307 is not set
1468# CONFIG_RTC_DRV_DS1374 is not set
1469# CONFIG_RTC_DRV_DS1672 is not set
1470# CONFIG_RTC_DRV_MAX6900 is not set
1471# CONFIG_RTC_DRV_RS5C372 is not set
1472# CONFIG_RTC_DRV_ISL1208 is not set
1473# CONFIG_RTC_DRV_X1205 is not set
1474# CONFIG_RTC_DRV_PCF8563 is not set
1475# CONFIG_RTC_DRV_PCF8583 is not set
1476# CONFIG_RTC_DRV_M41T80 is not set
1477# CONFIG_RTC_DRV_S35390A is not set
1478# CONFIG_RTC_DRV_FM3130 is not set
1479# CONFIG_RTC_DRV_RX8581 is not set
1480# CONFIG_RTC_DRV_RX8025 is not set
1481
1482#
1483# SPI RTC drivers
1484#
1485# CONFIG_RTC_DRV_M41T94 is not set
1486# CONFIG_RTC_DRV_DS1305 is not set
1487# CONFIG_RTC_DRV_DS1390 is not set
1488# CONFIG_RTC_DRV_MAX6902 is not set
1489# CONFIG_RTC_DRV_R9701 is not set
1490# CONFIG_RTC_DRV_RS5C348 is not set
1491# CONFIG_RTC_DRV_DS3234 is not set
1492# CONFIG_RTC_DRV_PCF2123 is not set
1493
1494#
1495# Platform RTC drivers
1496#
1497# CONFIG_RTC_DRV_CMOS is not set
1498# CONFIG_RTC_DRV_DS1286 is not set
1499# CONFIG_RTC_DRV_DS1511 is not set
1500# CONFIG_RTC_DRV_DS1553 is not set
1501# CONFIG_RTC_DRV_DS1742 is not set
1502# CONFIG_RTC_DRV_STK17TA8 is not set
1503# CONFIG_RTC_DRV_M48T86 is not set
1504# CONFIG_RTC_DRV_M48T35 is not set
1505# CONFIG_RTC_DRV_M48T59 is not set
1506# CONFIG_RTC_DRV_BQ4802 is not set
1507# CONFIG_RTC_DRV_V3020 is not set
1508
1509#
1510# on-CPU RTC drivers
1511#
1512# CONFIG_RTC_DRV_SA1100 is not set
1513CONFIG_RTC_DRV_PXA=y
1514CONFIG_DMADEVICES=y
1515
1516#
1517# DMA Devices
1518#
1519# CONFIG_AUXDISPLAY is not set
1520CONFIG_UIO=y
1521# CONFIG_UIO_PDRV is not set
1522# CONFIG_UIO_PDRV_GENIRQ is not set
1523# CONFIG_UIO_SMX is not set
1524# CONFIG_UIO_SERCOS3 is not set
1525
1526#
1527# TI VLYNQ
1528#
1529# CONFIG_STAGING is not set
1530
1531#
1532# File systems
1533#
1534CONFIG_EXT2_FS=y
1535# CONFIG_EXT2_FS_XATTR is not set
1536CONFIG_EXT2_FS_XIP=y
1537CONFIG_EXT3_FS=y
1538# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1539CONFIG_EXT3_FS_XATTR=y
1540# CONFIG_EXT3_FS_POSIX_ACL is not set
1541# CONFIG_EXT3_FS_SECURITY is not set
1542# CONFIG_EXT4_FS is not set
1543CONFIG_FS_XIP=y
1544CONFIG_JBD=y
1545CONFIG_FS_MBCACHE=y
1546# CONFIG_REISERFS_FS is not set
1547# CONFIG_JFS_FS is not set
1548# CONFIG_FS_POSIX_ACL is not set
1549# CONFIG_XFS_FS is not set
1550# CONFIG_OCFS2_FS is not set
1551# CONFIG_BTRFS_FS is not set
1552# CONFIG_NILFS2_FS is not set
1553CONFIG_FILE_LOCKING=y
1554CONFIG_FSNOTIFY=y
1555CONFIG_DNOTIFY=y
1556CONFIG_INOTIFY=y
1557CONFIG_INOTIFY_USER=y
1558# CONFIG_QUOTA is not set
1559# CONFIG_AUTOFS_FS is not set
1560# CONFIG_AUTOFS4_FS is not set
1561# CONFIG_FUSE_FS is not set
1562
1563#
1564# Caches
1565#
1566CONFIG_FSCACHE=y
1567CONFIG_FSCACHE_STATS=y
1568# CONFIG_FSCACHE_HISTOGRAM is not set
1569# CONFIG_FSCACHE_DEBUG is not set
1570CONFIG_CACHEFILES=y
1571# CONFIG_CACHEFILES_DEBUG is not set
1572# CONFIG_CACHEFILES_HISTOGRAM is not set
1573
1574#
1575# CD-ROM/DVD Filesystems
1576#
1577# CONFIG_ISO9660_FS is not set
1578# CONFIG_UDF_FS is not set
1579
1580#
1581# DOS/FAT/NT Filesystems
1582#
1583CONFIG_FAT_FS=y
1584CONFIG_MSDOS_FS=y
1585CONFIG_VFAT_FS=y
1586CONFIG_FAT_DEFAULT_CODEPAGE=437
1587CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1588# CONFIG_NTFS_FS is not set
1589
1590#
1591# Pseudo filesystems
1592#
1593CONFIG_PROC_FS=y
1594CONFIG_PROC_SYSCTL=y
1595CONFIG_PROC_PAGE_MONITOR=y
1596CONFIG_SYSFS=y
1597CONFIG_TMPFS=y
1598# CONFIG_TMPFS_POSIX_ACL is not set
1599# CONFIG_HUGETLB_PAGE is not set
1600# CONFIG_CONFIGFS_FS is not set
1601CONFIG_MISC_FILESYSTEMS=y
1602# CONFIG_ADFS_FS is not set
1603# CONFIG_AFFS_FS is not set
1604# CONFIG_HFS_FS is not set
1605# CONFIG_HFSPLUS_FS is not set
1606# CONFIG_BEFS_FS is not set
1607# CONFIG_BFS_FS is not set
1608# CONFIG_EFS_FS is not set
1609# CONFIG_JFFS2_FS is not set
1610CONFIG_UBIFS_FS=y
1611# CONFIG_UBIFS_FS_XATTR is not set
1612# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
1613CONFIG_UBIFS_FS_LZO=y
1614CONFIG_UBIFS_FS_ZLIB=y
1615# CONFIG_UBIFS_FS_DEBUG is not set
1616# CONFIG_CRAMFS is not set
1617# CONFIG_SQUASHFS is not set
1618# CONFIG_VXFS_FS is not set
1619# CONFIG_MINIX_FS is not set
1620# CONFIG_OMFS_FS is not set
1621# CONFIG_HPFS_FS is not set
1622# CONFIG_QNX4FS_FS is not set
1623# CONFIG_ROMFS_FS is not set
1624# CONFIG_SYSV_FS is not set
1625# CONFIG_UFS_FS is not set
1626CONFIG_NETWORK_FILESYSTEMS=y
1627CONFIG_NFS_FS=y
1628CONFIG_NFS_V3=y
1629# CONFIG_NFS_V3_ACL is not set
1630# CONFIG_NFS_V4 is not set
1631CONFIG_ROOT_NFS=y
1632CONFIG_NFS_FSCACHE=y
1633# CONFIG_NFSD is not set
1634CONFIG_LOCKD=y
1635CONFIG_LOCKD_V4=y
1636CONFIG_NFS_COMMON=y
1637CONFIG_SUNRPC=y
1638# CONFIG_RPCSEC_GSS_KRB5 is not set
1639# CONFIG_RPCSEC_GSS_SPKM3 is not set
1640# CONFIG_SMB_FS is not set
1641# CONFIG_CIFS is not set
1642# CONFIG_NCP_FS is not set
1643# CONFIG_CODA_FS is not set
1644# CONFIG_AFS_FS is not set
1645
1646#
1647# Partition Types
1648#
1649# CONFIG_PARTITION_ADVANCED is not set
1650CONFIG_MSDOS_PARTITION=y
1651CONFIG_NLS=y
1652CONFIG_NLS_DEFAULT="iso8859-1"
1653CONFIG_NLS_CODEPAGE_437=y
1654CONFIG_NLS_CODEPAGE_737=y
1655CONFIG_NLS_CODEPAGE_775=y
1656CONFIG_NLS_CODEPAGE_850=y
1657CONFIG_NLS_CODEPAGE_852=y
1658CONFIG_NLS_CODEPAGE_855=y
1659CONFIG_NLS_CODEPAGE_857=y
1660CONFIG_NLS_CODEPAGE_860=y
1661CONFIG_NLS_CODEPAGE_861=y
1662CONFIG_NLS_CODEPAGE_862=y
1663CONFIG_NLS_CODEPAGE_863=y
1664CONFIG_NLS_CODEPAGE_864=y
1665CONFIG_NLS_CODEPAGE_865=y
1666CONFIG_NLS_CODEPAGE_866=y
1667CONFIG_NLS_CODEPAGE_869=y
1668CONFIG_NLS_CODEPAGE_936=y
1669CONFIG_NLS_CODEPAGE_950=y
1670CONFIG_NLS_CODEPAGE_932=y
1671CONFIG_NLS_CODEPAGE_949=y
1672CONFIG_NLS_CODEPAGE_874=y
1673CONFIG_NLS_ISO8859_8=y
1674CONFIG_NLS_CODEPAGE_1250=y
1675CONFIG_NLS_CODEPAGE_1251=y
1676CONFIG_NLS_ASCII=y
1677CONFIG_NLS_ISO8859_1=y
1678CONFIG_NLS_ISO8859_2=y
1679CONFIG_NLS_ISO8859_3=y
1680CONFIG_NLS_ISO8859_4=y
1681CONFIG_NLS_ISO8859_5=y
1682CONFIG_NLS_ISO8859_6=y
1683CONFIG_NLS_ISO8859_7=y
1684CONFIG_NLS_ISO8859_9=y
1685CONFIG_NLS_ISO8859_13=y
1686CONFIG_NLS_ISO8859_14=y
1687CONFIG_NLS_ISO8859_15=y
1688CONFIG_NLS_KOI8_R=y
1689CONFIG_NLS_KOI8_U=y
1690CONFIG_NLS_UTF8=y
1691# CONFIG_DLM is not set
1692
1693#
1694# Kernel hacking
1695#
1696CONFIG_PRINTK_TIME=y
1697CONFIG_ENABLE_WARN_DEPRECATED=y
1698CONFIG_ENABLE_MUST_CHECK=y
1699CONFIG_FRAME_WARN=1024
1700# CONFIG_MAGIC_SYSRQ is not set
1701# CONFIG_STRIP_ASM_SYMS is not set
1702# CONFIG_UNUSED_SYMBOLS is not set
1703# CONFIG_DEBUG_FS is not set
1704# CONFIG_HEADERS_CHECK is not set
1705CONFIG_DEBUG_KERNEL=y
1706# CONFIG_DEBUG_SHIRQ is not set
1707CONFIG_DETECT_SOFTLOCKUP=y
1708# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1709CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1710CONFIG_DETECT_HUNG_TASK=y
1711# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1712CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1713CONFIG_SCHED_DEBUG=y
1714# CONFIG_SCHEDSTATS is not set
1715# CONFIG_TIMER_STATS is not set
1716# CONFIG_DEBUG_OBJECTS is not set
1717# CONFIG_SLUB_DEBUG_ON is not set
1718# CONFIG_SLUB_STATS is not set
1719# CONFIG_DEBUG_KMEMLEAK is not set
1720# CONFIG_DEBUG_RT_MUTEXES is not set
1721# CONFIG_RT_MUTEX_TESTER is not set
1722# CONFIG_DEBUG_SPINLOCK is not set
1723# CONFIG_DEBUG_MUTEXES is not set
1724# CONFIG_DEBUG_LOCK_ALLOC is not set
1725# CONFIG_PROVE_LOCKING is not set
1726# CONFIG_LOCK_STAT is not set
1727# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1728# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1729# CONFIG_DEBUG_KOBJECT is not set
1730CONFIG_DEBUG_BUGVERBOSE=y
1731CONFIG_DEBUG_INFO=y
1732# CONFIG_DEBUG_VM is not set
1733# CONFIG_DEBUG_WRITECOUNT is not set
1734CONFIG_DEBUG_MEMORY_INIT=y
1735# CONFIG_DEBUG_LIST is not set
1736# CONFIG_DEBUG_SG is not set
1737# CONFIG_DEBUG_NOTIFIERS is not set
1738# CONFIG_DEBUG_CREDENTIALS is not set
1739# CONFIG_BOOT_PRINTK_DELAY is not set
1740# CONFIG_RCU_TORTURE_TEST is not set
1741# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1742# CONFIG_BACKTRACE_SELF_TEST is not set
1743# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1744# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1745# CONFIG_FAULT_INJECTION is not set
1746# CONFIG_LATENCYTOP is not set
1747# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1748# CONFIG_PAGE_POISONING is not set
1749CONFIG_HAVE_FUNCTION_TRACER=y
1750CONFIG_TRACING_SUPPORT=y
1751CONFIG_FTRACE=y
1752# CONFIG_FUNCTION_TRACER is not set
1753# CONFIG_IRQSOFF_TRACER is not set
1754# CONFIG_SCHED_TRACER is not set
1755# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1756# CONFIG_BOOT_TRACER is not set
1757CONFIG_BRANCH_PROFILE_NONE=y
1758# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1759# CONFIG_PROFILE_ALL_BRANCHES is not set
1760# CONFIG_STACK_TRACER is not set
1761# CONFIG_KMEMTRACE is not set
1762# CONFIG_WORKQUEUE_TRACER is not set
1763# CONFIG_BLK_DEV_IO_TRACE is not set
1764# CONFIG_SAMPLES is not set
1765CONFIG_HAVE_ARCH_KGDB=y
1766# CONFIG_KGDB is not set
1767CONFIG_ARM_UNWIND=y
1768CONFIG_DEBUG_USER=y
1769CONFIG_DEBUG_ERRORS=y
1770# CONFIG_DEBUG_STACK_USAGE is not set
1771CONFIG_DEBUG_LL=y
1772# CONFIG_DEBUG_ICEDCC is not set
1773
1774#
1775# Security options
1776#
1777# CONFIG_KEYS is not set
1778# CONFIG_SECURITY is not set
1779# CONFIG_SECURITYFS is not set
1780# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1781CONFIG_CRYPTO=y
1782
1783#
1784# Crypto core or helper
1785#
1786CONFIG_CRYPTO_ALGAPI=y
1787CONFIG_CRYPTO_ALGAPI2=y
1788CONFIG_CRYPTO_AEAD2=y
1789CONFIG_CRYPTO_BLKCIPHER=y
1790CONFIG_CRYPTO_BLKCIPHER2=y
1791CONFIG_CRYPTO_HASH2=y
1792CONFIG_CRYPTO_RNG2=y
1793CONFIG_CRYPTO_PCOMP=y
1794CONFIG_CRYPTO_MANAGER=y
1795CONFIG_CRYPTO_MANAGER2=y
1796# CONFIG_CRYPTO_GF128MUL is not set
1797# CONFIG_CRYPTO_NULL is not set
1798CONFIG_CRYPTO_WORKQUEUE=y
1799# CONFIG_CRYPTO_CRYPTD is not set
1800# CONFIG_CRYPTO_AUTHENC is not set
1801# CONFIG_CRYPTO_TEST is not set
1802
1803#
1804# Authenticated Encryption with Associated Data
1805#
1806# CONFIG_CRYPTO_CCM is not set
1807# CONFIG_CRYPTO_GCM is not set
1808# CONFIG_CRYPTO_SEQIV is not set
1809
1810#
1811# Block modes
1812#
1813# CONFIG_CRYPTO_CBC is not set
1814# CONFIG_CRYPTO_CTR is not set
1815# CONFIG_CRYPTO_CTS is not set
1816CONFIG_CRYPTO_ECB=y
1817# CONFIG_CRYPTO_LRW is not set
1818# CONFIG_CRYPTO_PCBC is not set
1819# CONFIG_CRYPTO_XTS is not set
1820
1821#
1822# Hash modes
1823#
1824# CONFIG_CRYPTO_HMAC is not set
1825# CONFIG_CRYPTO_XCBC is not set
1826# CONFIG_CRYPTO_VMAC is not set
1827
1828#
1829# Digest
1830#
1831# CONFIG_CRYPTO_CRC32C is not set
1832# CONFIG_CRYPTO_GHASH is not set
1833# CONFIG_CRYPTO_MD4 is not set
1834# CONFIG_CRYPTO_MD5 is not set
1835# CONFIG_CRYPTO_MICHAEL_MIC is not set
1836# CONFIG_CRYPTO_RMD128 is not set
1837# CONFIG_CRYPTO_RMD160 is not set
1838# CONFIG_CRYPTO_RMD256 is not set
1839# CONFIG_CRYPTO_RMD320 is not set
1840# CONFIG_CRYPTO_SHA1 is not set
1841# CONFIG_CRYPTO_SHA256 is not set
1842# CONFIG_CRYPTO_SHA512 is not set
1843# CONFIG_CRYPTO_TGR192 is not set
1844# CONFIG_CRYPTO_WP512 is not set
1845
1846#
1847# Ciphers
1848#
1849CONFIG_CRYPTO_AES=y
1850# CONFIG_CRYPTO_ANUBIS is not set
1851CONFIG_CRYPTO_ARC4=y
1852# CONFIG_CRYPTO_BLOWFISH is not set
1853# CONFIG_CRYPTO_CAMELLIA is not set
1854# CONFIG_CRYPTO_CAST5 is not set
1855# CONFIG_CRYPTO_CAST6 is not set
1856# CONFIG_CRYPTO_DES is not set
1857# CONFIG_CRYPTO_FCRYPT is not set
1858# CONFIG_CRYPTO_KHAZAD is not set
1859# CONFIG_CRYPTO_SALSA20 is not set
1860# CONFIG_CRYPTO_SEED is not set
1861# CONFIG_CRYPTO_SERPENT is not set
1862# CONFIG_CRYPTO_TEA is not set
1863# CONFIG_CRYPTO_TWOFISH is not set
1864
1865#
1866# Compression
1867#
1868CONFIG_CRYPTO_DEFLATE=y
1869# CONFIG_CRYPTO_ZLIB is not set
1870CONFIG_CRYPTO_LZO=y
1871
1872#
1873# Random Number Generation
1874#
1875# CONFIG_CRYPTO_ANSI_CPRNG is not set
1876# CONFIG_CRYPTO_HW is not set
1877# CONFIG_BINARY_PRINTF is not set
1878
1879#
1880# Library routines
1881#
1882CONFIG_BITREVERSE=y
1883CONFIG_GENERIC_FIND_LAST_BIT=y
1884# CONFIG_CRC_CCITT is not set
1885CONFIG_CRC16=y
1886# CONFIG_CRC_T10DIF is not set
1887# CONFIG_CRC_ITU_T is not set
1888CONFIG_CRC32=y
1889# CONFIG_CRC7 is not set
1890# CONFIG_LIBCRC32C is not set
1891CONFIG_ZLIB_INFLATE=y
1892CONFIG_ZLIB_DEFLATE=y
1893CONFIG_LZO_COMPRESS=y
1894CONFIG_LZO_DECOMPRESS=y
1895CONFIG_HAS_IOMEM=y
1896CONFIG_HAS_IOPORT=y
1897CONFIG_HAS_DMA=y
1898CONFIG_NLATTR=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 2f10dae02796..8e94c3caeb8c 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -187,7 +187,7 @@ CONFIG_S3C24XX_GPIO_EXTRA128=y
187CONFIG_PM_SIMTEC=y 187CONFIG_PM_SIMTEC=y
188CONFIG_S3C2410_DMA=y 188CONFIG_S3C2410_DMA=y
189# CONFIG_S3C2410_DMA_DEBUG is not set 189# CONFIG_S3C2410_DMA_DEBUG is not set
190CONFIG_S3C24XX_ADC=y 190CONFIG_S3C_ADC=y
191CONFIG_MACH_SMDK=y 191CONFIG_MACH_SMDK=y
192CONFIG_PLAT_S3C=y 192CONFIG_PLAT_S3C=y
193CONFIG_CPU_LLSERIAL_S3C2410=y 193CONFIG_CPU_LLSERIAL_S3C2410=y
@@ -203,8 +203,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
203# 203#
204# Power management 204# Power management
205# 205#
206# CONFIG_S3C2410_PM_DEBUG is not set 206# CONFIG_SAMSUNG_PM_DEBUG is not set
207# CONFIG_S3C2410_PM_CHECK is not set 207# CONFIG_SAMSUNG_PM_CHECK is not set
208CONFIG_S3C_LOWLEVEL_UART_PORT=0 208CONFIG_S3C_LOWLEVEL_UART_PORT=0
209CONFIG_S3C_GPIO_SPACE=0 209CONFIG_S3C_GPIO_SPACE=0
210CONFIG_S3C_DEV_HSMMC=y 210CONFIG_S3C_DEV_HSMMC=y
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
index f56e50fab79b..5e7d4c1b8fc1 100644
--- a/arch/arm/configs/s3c6400_defconfig
+++ b/arch/arm/configs/s3c6400_defconfig
@@ -1,14 +1,11 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc3 3# Linux kernel version: 2.6.33-rc4
4# Mon Nov 3 10:10:30 2008 4# Tue Jan 19 13:12:40 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set
10# CONFIG_GENERIC_CLOCKEVENTS is not set
11CONFIG_MMU=y
12CONFIG_NO_IOPORT=y 9CONFIG_NO_IOPORT=y
13CONFIG_GENERIC_HARDIRQS=y 10CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 11CONFIG_STACKTRACE_SUPPORT=y
@@ -18,13 +15,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y 15CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y 17CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set 18CONFIG_ARCH_HAS_CPUFREQ=y
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y 19CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y 20CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000 22CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
28 25
29# 26#
30# General setup 27# General setup
@@ -34,13 +31,30 @@ CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_LZO=y
36CONFIG_KERNEL_GZIP=y
37# CONFIG_KERNEL_BZIP2 is not set
38# CONFIG_KERNEL_LZMA is not set
39# CONFIG_KERNEL_LZO is not set
37CONFIG_SWAP=y 40CONFIG_SWAP=y
38# CONFIG_SYSVIPC is not set 41# CONFIG_SYSVIPC is not set
39# CONFIG_BSD_PROCESS_ACCT is not set 42# CONFIG_BSD_PROCESS_ACCT is not set
43
44#
45# RCU Subsystem
46#
47CONFIG_TREE_RCU=y
48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_TINY_RCU is not set
50# CONFIG_RCU_TRACE is not set
51CONFIG_RCU_FANOUT=32
52# CONFIG_RCU_FANOUT_EXACT is not set
53# CONFIG_TREE_RCU_TRACE is not set
40# CONFIG_IKCONFIG is not set 54# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=17 55CONFIG_LOG_BUF_SHIFT=17
42# CONFIG_CGROUPS is not set
43# CONFIG_GROUP_SCHED is not set 56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
44CONFIG_SYSFS_DEPRECATED=y 58CONFIG_SYSFS_DEPRECATED=y
45CONFIG_SYSFS_DEPRECATED_V2=y 59CONFIG_SYSFS_DEPRECATED_V2=y
46# CONFIG_RELAY is not set 60# CONFIG_RELAY is not set
@@ -50,8 +64,13 @@ CONFIG_NAMESPACES=y
50# CONFIG_PID_NS is not set 64# CONFIG_PID_NS is not set
51CONFIG_BLK_DEV_INITRD=y 65CONFIG_BLK_DEV_INITRD=y
52CONFIG_INITRAMFS_SOURCE="" 66CONFIG_INITRAMFS_SOURCE=""
67CONFIG_RD_GZIP=y
68CONFIG_RD_BZIP2=y
69CONFIG_RD_LZMA=y
70CONFIG_RD_LZO=y
53CONFIG_CC_OPTIMIZE_FOR_SIZE=y 71CONFIG_CC_OPTIMIZE_FOR_SIZE=y
54CONFIG_SYSCTL=y 72CONFIG_SYSCTL=y
73CONFIG_ANON_INODES=y
55# CONFIG_EMBEDDED is not set 74# CONFIG_EMBEDDED is not set
56CONFIG_UID16=y 75CONFIG_UID16=y
57CONFIG_SYSCTL_SYSCALL=y 76CONFIG_SYSCTL_SYSCALL=y
@@ -62,32 +81,38 @@ CONFIG_HOTPLUG=y
62CONFIG_PRINTK=y 81CONFIG_PRINTK=y
63CONFIG_BUG=y 82CONFIG_BUG=y
64CONFIG_ELF_CORE=y 83CONFIG_ELF_CORE=y
65CONFIG_COMPAT_BRK=y
66CONFIG_BASE_FULL=y 84CONFIG_BASE_FULL=y
67CONFIG_FUTEX=y 85CONFIG_FUTEX=y
68CONFIG_ANON_INODES=y
69CONFIG_EPOLL=y 86CONFIG_EPOLL=y
70CONFIG_SIGNALFD=y 87CONFIG_SIGNALFD=y
71CONFIG_TIMERFD=y 88CONFIG_TIMERFD=y
72CONFIG_EVENTFD=y 89CONFIG_EVENTFD=y
73CONFIG_SHMEM=y 90CONFIG_SHMEM=y
74CONFIG_AIO=y 91CONFIG_AIO=y
92
93#
94# Kernel Performance Events And Counters
95#
75CONFIG_VM_EVENT_COUNTERS=y 96CONFIG_VM_EVENT_COUNTERS=y
76CONFIG_SLUB_DEBUG=y 97CONFIG_SLUB_DEBUG=y
98CONFIG_COMPAT_BRK=y
77# CONFIG_SLAB is not set 99# CONFIG_SLAB is not set
78CONFIG_SLUB=y 100CONFIG_SLUB=y
79# CONFIG_SLOB is not set 101# CONFIG_SLOB is not set
80# CONFIG_PROFILING is not set 102# CONFIG_PROFILING is not set
81# CONFIG_MARKERS is not set
82CONFIG_HAVE_OPROFILE=y 103CONFIG_HAVE_OPROFILE=y
83# CONFIG_KPROBES is not set 104# CONFIG_KPROBES is not set
84CONFIG_HAVE_KPROBES=y 105CONFIG_HAVE_KPROBES=y
85CONFIG_HAVE_KRETPROBES=y 106CONFIG_HAVE_KRETPROBES=y
86CONFIG_HAVE_CLK=y 107CONFIG_HAVE_CLK=y
108
109#
110# GCOV-based kernel profiling
111#
112# CONFIG_SLOW_WORK is not set
87CONFIG_HAVE_GENERIC_DMA_COHERENT=y 113CONFIG_HAVE_GENERIC_DMA_COHERENT=y
88CONFIG_SLABINFO=y 114CONFIG_SLABINFO=y
89CONFIG_RT_MUTEXES=y 115CONFIG_RT_MUTEXES=y
90# CONFIG_TINY_SHMEM is not set
91CONFIG_BASE_SMALL=0 116CONFIG_BASE_SMALL=0
92CONFIG_MODULES=y 117CONFIG_MODULES=y
93# CONFIG_MODULE_FORCE_LOAD is not set 118# CONFIG_MODULE_FORCE_LOAD is not set
@@ -95,11 +120,8 @@ CONFIG_MODULE_UNLOAD=y
95# CONFIG_MODULE_FORCE_UNLOAD is not set 120# CONFIG_MODULE_FORCE_UNLOAD is not set
96# CONFIG_MODVERSIONS is not set 121# CONFIG_MODVERSIONS is not set
97# CONFIG_MODULE_SRCVERSION_ALL is not set 122# CONFIG_MODULE_SRCVERSION_ALL is not set
98CONFIG_KMOD=y
99CONFIG_BLOCK=y 123CONFIG_BLOCK=y
100CONFIG_LBD=y 124CONFIG_LBDAF=y
101# CONFIG_BLK_DEV_IO_TRACE is not set
102CONFIG_LSF=y
103# CONFIG_BLK_DEV_BSG is not set 125# CONFIG_BLK_DEV_BSG is not set
104# CONFIG_BLK_DEV_INTEGRITY is not set 126# CONFIG_BLK_DEV_INTEGRITY is not set
105 127
@@ -107,33 +129,62 @@ CONFIG_LSF=y
107# IO Schedulers 129# IO Schedulers
108# 130#
109CONFIG_IOSCHED_NOOP=y 131CONFIG_IOSCHED_NOOP=y
110CONFIG_IOSCHED_AS=y
111CONFIG_IOSCHED_DEADLINE=y 132CONFIG_IOSCHED_DEADLINE=y
112CONFIG_IOSCHED_CFQ=y 133CONFIG_IOSCHED_CFQ=y
113# CONFIG_DEFAULT_AS is not set
114# CONFIG_DEFAULT_DEADLINE is not set 134# CONFIG_DEFAULT_DEADLINE is not set
115CONFIG_DEFAULT_CFQ=y 135CONFIG_DEFAULT_CFQ=y
116# CONFIG_DEFAULT_NOOP is not set 136# CONFIG_DEFAULT_NOOP is not set
117CONFIG_DEFAULT_IOSCHED="cfq" 137CONFIG_DEFAULT_IOSCHED="cfq"
118CONFIG_CLASSIC_RCU=y 138# CONFIG_INLINE_SPIN_TRYLOCK is not set
139# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
140# CONFIG_INLINE_SPIN_LOCK is not set
141# CONFIG_INLINE_SPIN_LOCK_BH is not set
142# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
144# CONFIG_INLINE_SPIN_UNLOCK is not set
145# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
146# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
148# CONFIG_INLINE_READ_TRYLOCK is not set
149# CONFIG_INLINE_READ_LOCK is not set
150# CONFIG_INLINE_READ_LOCK_BH is not set
151# CONFIG_INLINE_READ_LOCK_IRQ is not set
152# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
153# CONFIG_INLINE_READ_UNLOCK is not set
154# CONFIG_INLINE_READ_UNLOCK_BH is not set
155# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
157# CONFIG_INLINE_WRITE_TRYLOCK is not set
158# CONFIG_INLINE_WRITE_LOCK is not set
159# CONFIG_INLINE_WRITE_LOCK_BH is not set
160# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
162# CONFIG_INLINE_WRITE_UNLOCK is not set
163# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
164# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
166# CONFIG_MUTEX_SPIN_ON_OWNER is not set
119# CONFIG_FREEZER is not set 167# CONFIG_FREEZER is not set
120 168
121# 169#
122# System Type 170# System Type
123# 171#
172CONFIG_MMU=y
124# CONFIG_ARCH_AAEC2000 is not set 173# CONFIG_ARCH_AAEC2000 is not set
125# CONFIG_ARCH_INTEGRATOR is not set 174# CONFIG_ARCH_INTEGRATOR is not set
126# CONFIG_ARCH_REALVIEW is not set 175# CONFIG_ARCH_REALVIEW is not set
127# CONFIG_ARCH_VERSATILE is not set 176# CONFIG_ARCH_VERSATILE is not set
128# CONFIG_ARCH_AT91 is not set 177# CONFIG_ARCH_AT91 is not set
129# CONFIG_ARCH_CLPS7500 is not set
130# CONFIG_ARCH_CLPS711X is not set 178# CONFIG_ARCH_CLPS711X is not set
179# CONFIG_ARCH_GEMINI is not set
131# CONFIG_ARCH_EBSA110 is not set 180# CONFIG_ARCH_EBSA110 is not set
132# CONFIG_ARCH_EP93XX is not set 181# CONFIG_ARCH_EP93XX is not set
133# CONFIG_ARCH_FOOTBRIDGE is not set 182# CONFIG_ARCH_FOOTBRIDGE is not set
183# CONFIG_ARCH_MXC is not set
184# CONFIG_ARCH_STMP3XXX is not set
134# CONFIG_ARCH_NETX is not set 185# CONFIG_ARCH_NETX is not set
135# CONFIG_ARCH_H720X is not set 186# CONFIG_ARCH_H720X is not set
136# CONFIG_ARCH_IMX is not set 187# CONFIG_ARCH_NOMADIK is not set
137# CONFIG_ARCH_IOP13XX is not set 188# CONFIG_ARCH_IOP13XX is not set
138# CONFIG_ARCH_IOP32X is not set 189# CONFIG_ARCH_IOP32X is not set
139# CONFIG_ARCH_IOP33X is not set 190# CONFIG_ARCH_IOP33X is not set
@@ -141,35 +192,62 @@ CONFIG_CLASSIC_RCU=y
141# CONFIG_ARCH_IXP2000 is not set 192# CONFIG_ARCH_IXP2000 is not set
142# CONFIG_ARCH_IXP4XX is not set 193# CONFIG_ARCH_IXP4XX is not set
143# CONFIG_ARCH_L7200 is not set 194# CONFIG_ARCH_L7200 is not set
195# CONFIG_ARCH_DOVE is not set
144# CONFIG_ARCH_KIRKWOOD is not set 196# CONFIG_ARCH_KIRKWOOD is not set
145# CONFIG_ARCH_KS8695 is not set
146# CONFIG_ARCH_NS9XXX is not set
147# CONFIG_ARCH_LOKI is not set 197# CONFIG_ARCH_LOKI is not set
148# CONFIG_ARCH_MV78XX0 is not set 198# CONFIG_ARCH_MV78XX0 is not set
149# CONFIG_ARCH_MXC is not set
150# CONFIG_ARCH_ORION5X is not set 199# CONFIG_ARCH_ORION5X is not set
200# CONFIG_ARCH_MMP is not set
201# CONFIG_ARCH_KS8695 is not set
202# CONFIG_ARCH_NS9XXX is not set
203# CONFIG_ARCH_W90X900 is not set
151# CONFIG_ARCH_PNX4008 is not set 204# CONFIG_ARCH_PNX4008 is not set
152# CONFIG_ARCH_PXA is not set 205# CONFIG_ARCH_PXA is not set
206# CONFIG_ARCH_MSM is not set
153# CONFIG_ARCH_RPC is not set 207# CONFIG_ARCH_RPC is not set
154# CONFIG_ARCH_SA1100 is not set 208# CONFIG_ARCH_SA1100 is not set
155# CONFIG_ARCH_S3C2410 is not set 209# CONFIG_ARCH_S3C2410 is not set
156CONFIG_ARCH_S3C64XX=y 210CONFIG_ARCH_S3C64XX=y
211# CONFIG_ARCH_S5P6440 is not set
212# CONFIG_ARCH_S5PC1XX is not set
157# CONFIG_ARCH_SHARK is not set 213# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 214# CONFIG_ARCH_LH7A40X is not set
215# CONFIG_ARCH_U300 is not set
159# CONFIG_ARCH_DAVINCI is not set 216# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 217# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM is not set 218# CONFIG_ARCH_BCMRING is not set
219# CONFIG_ARCH_U8500 is not set
220CONFIG_PLAT_SAMSUNG=y
221CONFIG_SAMSUNG_CLKSRC=y
222CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
223CONFIG_SAMSUNG_IRQ_UART=y
224CONFIG_S3C_GPIO_CFG_S3C24XX=y
225CONFIG_S3C_GPIO_CFG_S3C64XX=y
226CONFIG_S3C_GPIO_PULL_UPDOWN=y
227CONFIG_SAMSUNG_GPIO_EXTRA=0
228# CONFIG_S3C_ADC is not set
229CONFIG_S3C_DEV_HSMMC=y
230CONFIG_S3C_DEV_HSMMC1=y
231CONFIG_S3C_DEV_I2C1=y
232CONFIG_S3C_DEV_FB=y
233CONFIG_S3C_DEV_USB_HOST=y
234CONFIG_S3C_DEV_USB_HSOTG=y
235CONFIG_S3C_DEV_NAND=y
162CONFIG_PLAT_S3C64XX=y 236CONFIG_PLAT_S3C64XX=y
163CONFIG_CPU_S3C6400_INIT=y 237CONFIG_CPU_S3C6400_INIT=y
164CONFIG_CPU_S3C6400_CLOCK=y 238CONFIG_CPU_S3C6400_CLOCK=y
239# CONFIG_S3C64XX_DMA is not set
165CONFIG_S3C64XX_SETUP_I2C0=y 240CONFIG_S3C64XX_SETUP_I2C0=y
166CONFIG_S3C64XX_SETUP_I2C1=y 241CONFIG_S3C64XX_SETUP_I2C1=y
242CONFIG_S3C64XX_SETUP_FB_24BPP=y
243CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y
167CONFIG_PLAT_S3C=y 244CONFIG_PLAT_S3C=y
168 245
169# 246#
170# Boot options 247# Boot options
171# 248#
172CONFIG_S3C_BOOT_ERROR_RESET=y 249CONFIG_S3C_BOOT_ERROR_RESET=y
250CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
173 251
174# 252#
175# Power management 253# Power management
@@ -177,17 +255,16 @@ CONFIG_S3C_BOOT_ERROR_RESET=y
177CONFIG_S3C_LOWLEVEL_UART_PORT=0 255CONFIG_S3C_LOWLEVEL_UART_PORT=0
178CONFIG_S3C_GPIO_SPACE=0 256CONFIG_S3C_GPIO_SPACE=0
179CONFIG_S3C_GPIO_TRACK=y 257CONFIG_S3C_GPIO_TRACK=y
180CONFIG_S3C_GPIO_PULL_UPDOWN=y 258# CONFIG_MACH_SMDK6400 is not set
181CONFIG_S3C_GPIO_CFG_S3C24XX=y
182CONFIG_S3C_GPIO_CFG_S3C64XX=y
183CONFIG_S3C_DEV_HSMMC=y
184CONFIG_S3C_DEV_HSMMC1=y
185CONFIG_S3C_DEV_I2C1=y
186CONFIG_CPU_S3C6410=y 259CONFIG_CPU_S3C6410=y
187CONFIG_S3C6410_SETUP_SDHCI=y 260CONFIG_S3C6410_SETUP_SDHCI=y
261# CONFIG_MACH_ANW6410 is not set
188CONFIG_MACH_SMDK6410=y 262CONFIG_MACH_SMDK6410=y
189CONFIG_SMDK6410_SD_CH0=y 263CONFIG_SMDK6410_SD_CH0=y
190# CONFIG_SMDK6410_SD_CH1 is not set 264# CONFIG_SMDK6410_SD_CH1 is not set
265# CONFIG_SMDK6410_WM1190_EV1 is not set
266# CONFIG_MACH_NCP is not set
267# CONFIG_MACH_HMT is not set
191 268
192# 269#
193# Processor Type 270# Processor Type
@@ -196,7 +273,7 @@ CONFIG_CPU_V6=y
196CONFIG_CPU_32v6K=y 273CONFIG_CPU_32v6K=y
197CONFIG_CPU_32v6=y 274CONFIG_CPU_32v6=y
198CONFIG_CPU_ABRT_EV6=y 275CONFIG_CPU_ABRT_EV6=y
199CONFIG_CPU_PABRT_NOIFAR=y 276CONFIG_CPU_PABRT_V6=y
200CONFIG_CPU_CACHE_V6=y 277CONFIG_CPU_CACHE_V6=y
201CONFIG_CPU_CACHE_VIPT=y 278CONFIG_CPU_CACHE_VIPT=y
202CONFIG_CPU_COPY_V6=y 279CONFIG_CPU_COPY_V6=y
@@ -212,8 +289,10 @@ CONFIG_ARM_THUMB=y
212# CONFIG_CPU_ICACHE_DISABLE is not set 289# CONFIG_CPU_ICACHE_DISABLE is not set
213# CONFIG_CPU_DCACHE_DISABLE is not set 290# CONFIG_CPU_DCACHE_DISABLE is not set
214# CONFIG_CPU_BPREDICT_DISABLE is not set 291# CONFIG_CPU_BPREDICT_DISABLE is not set
215# CONFIG_OUTER_CACHE is not set 292CONFIG_ARM_L1_CACHE_SHIFT=5
293# CONFIG_ARM_ERRATA_411920 is not set
216CONFIG_ARM_VIC=y 294CONFIG_ARM_VIC=y
295CONFIG_ARM_VIC_NR=2
217 296
218# 297#
219# Bus support 298# Bus support
@@ -229,13 +308,15 @@ CONFIG_VMSPLIT_3G=y
229# CONFIG_VMSPLIT_2G is not set 308# CONFIG_VMSPLIT_2G is not set
230# CONFIG_VMSPLIT_1G is not set 309# CONFIG_VMSPLIT_1G is not set
231CONFIG_PAGE_OFFSET=0xC0000000 310CONFIG_PAGE_OFFSET=0xC0000000
311CONFIG_PREEMPT_NONE=y
312# CONFIG_PREEMPT_VOLUNTARY is not set
232# CONFIG_PREEMPT is not set 313# CONFIG_PREEMPT is not set
233CONFIG_HZ=100 314CONFIG_HZ=100
234CONFIG_AEABI=y 315CONFIG_AEABI=y
235CONFIG_OABI_COMPAT=y 316CONFIG_OABI_COMPAT=y
236CONFIG_ARCH_FLATMEM_HAS_HOLES=y
237# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set 317# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
238# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set 318# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
319# CONFIG_HIGHMEM is not set
239CONFIG_SELECT_MEMORY_MODEL=y 320CONFIG_SELECT_MEMORY_MODEL=y
240CONFIG_FLATMEM_MANUAL=y 321CONFIG_FLATMEM_MANUAL=y
241# CONFIG_DISCONTIGMEM_MANUAL is not set 322# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -243,26 +324,28 @@ CONFIG_FLATMEM_MANUAL=y
243CONFIG_FLATMEM=y 324CONFIG_FLATMEM=y
244CONFIG_FLAT_NODE_MEM_MAP=y 325CONFIG_FLAT_NODE_MEM_MAP=y
245CONFIG_PAGEFLAGS_EXTENDED=y 326CONFIG_PAGEFLAGS_EXTENDED=y
246CONFIG_SPLIT_PTLOCK_CPUS=4 327CONFIG_SPLIT_PTLOCK_CPUS=999999
247# CONFIG_RESOURCES_64BIT is not set
248# CONFIG_PHYS_ADDR_T_64BIT is not set 328# CONFIG_PHYS_ADDR_T_64BIT is not set
249CONFIG_ZONE_DMA_FLAG=0 329CONFIG_ZONE_DMA_FLAG=0
250CONFIG_VIRT_TO_BUS=y 330CONFIG_VIRT_TO_BUS=y
251CONFIG_UNEVICTABLE_LRU=y 331# CONFIG_KSM is not set
332CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
252CONFIG_ALIGNMENT_TRAP=y 333CONFIG_ALIGNMENT_TRAP=y
334# CONFIG_UACCESS_WITH_MEMCPY is not set
253 335
254# 336#
255# Boot options 337# Boot options
256# 338#
257CONFIG_ZBOOT_ROM_TEXT=0 339CONFIG_ZBOOT_ROM_TEXT=0
258CONFIG_ZBOOT_ROM_BSS=0 340CONFIG_ZBOOT_ROM_BSS=0
259CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M" 341CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144"
260# CONFIG_XIP_KERNEL is not set 342# CONFIG_XIP_KERNEL is not set
261# CONFIG_KEXEC is not set 343# CONFIG_KEXEC is not set
262 344
263# 345#
264# CPU Power Management 346# CPU Power Management
265# 347#
348# CONFIG_CPU_FREQ is not set
266# CONFIG_CPU_IDLE is not set 349# CONFIG_CPU_IDLE is not set
267 350
268# 351#
@@ -300,6 +383,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
300# Generic Driver Options 383# Generic Driver Options
301# 384#
302CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 385CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
386# CONFIG_DEVTMPFS is not set
303CONFIG_STANDALONE=y 387CONFIG_STANDALONE=y
304CONFIG_PREVENT_FIRMWARE_BUILD=y 388CONFIG_PREVENT_FIRMWARE_BUILD=y
305CONFIG_FW_LOADER=y 389CONFIG_FW_LOADER=y
@@ -314,14 +398,32 @@ CONFIG_BLK_DEV=y
314# CONFIG_BLK_DEV_COW_COMMON is not set 398# CONFIG_BLK_DEV_COW_COMMON is not set
315CONFIG_BLK_DEV_LOOP=y 399CONFIG_BLK_DEV_LOOP=y
316# CONFIG_BLK_DEV_CRYPTOLOOP is not set 400# CONFIG_BLK_DEV_CRYPTOLOOP is not set
401
402#
403# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
404#
317CONFIG_BLK_DEV_RAM=y 405CONFIG_BLK_DEV_RAM=y
318CONFIG_BLK_DEV_RAM_COUNT=16 406CONFIG_BLK_DEV_RAM_COUNT=16
319CONFIG_BLK_DEV_RAM_SIZE=4096 407CONFIG_BLK_DEV_RAM_SIZE=4096
320# CONFIG_BLK_DEV_XIP is not set 408# CONFIG_BLK_DEV_XIP is not set
321# CONFIG_CDROM_PKTCDVD is not set 409# CONFIG_CDROM_PKTCDVD is not set
410# CONFIG_MG_DISK is not set
322CONFIG_MISC_DEVICES=y 411CONFIG_MISC_DEVICES=y
323# CONFIG_EEPROM_93CX6 is not set 412# CONFIG_AD525X_DPOT is not set
413# CONFIG_ICS932S401 is not set
324# CONFIG_ENCLOSURE_SERVICES is not set 414# CONFIG_ENCLOSURE_SERVICES is not set
415# CONFIG_ISL29003 is not set
416# CONFIG_DS1682 is not set
417# CONFIG_C2PORT is not set
418
419#
420# EEPROM support
421#
422CONFIG_EEPROM_AT24=y
423# CONFIG_EEPROM_LEGACY is not set
424# CONFIG_EEPROM_MAX6875 is not set
425# CONFIG_EEPROM_93CX6 is not set
426# CONFIG_IWMC3200TOP is not set
325CONFIG_HAVE_IDE=y 427CONFIG_HAVE_IDE=y
326# CONFIG_IDE is not set 428# CONFIG_IDE is not set
327 429
@@ -334,6 +436,7 @@ CONFIG_HAVE_IDE=y
334# CONFIG_SCSI_NETLINK is not set 436# CONFIG_SCSI_NETLINK is not set
335# CONFIG_ATA is not set 437# CONFIG_ATA is not set
336# CONFIG_MD is not set 438# CONFIG_MD is not set
439# CONFIG_PHONE is not set
337 440
338# 441#
339# Input device support 442# Input device support
@@ -341,6 +444,7 @@ CONFIG_HAVE_IDE=y
341CONFIG_INPUT=y 444CONFIG_INPUT=y
342# CONFIG_INPUT_FF_MEMLESS is not set 445# CONFIG_INPUT_FF_MEMLESS is not set
343# CONFIG_INPUT_POLLDEV is not set 446# CONFIG_INPUT_POLLDEV is not set
447# CONFIG_INPUT_SPARSEKMAP is not set
344 448
345# 449#
346# Userland interfaces 450# Userland interfaces
@@ -357,27 +461,33 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
357# Input Device Drivers 461# Input Device Drivers
358# 462#
359CONFIG_INPUT_KEYBOARD=y 463CONFIG_INPUT_KEYBOARD=y
464# CONFIG_KEYBOARD_ADP5588 is not set
360CONFIG_KEYBOARD_ATKBD=y 465CONFIG_KEYBOARD_ATKBD=y
361# CONFIG_KEYBOARD_SUNKBD is not set 466# CONFIG_QT2160 is not set
362# CONFIG_KEYBOARD_LKKBD is not set 467# CONFIG_KEYBOARD_LKKBD is not set
363# CONFIG_KEYBOARD_XTKBD is not set 468# CONFIG_KEYBOARD_GPIO is not set
469# CONFIG_KEYBOARD_MATRIX is not set
470# CONFIG_KEYBOARD_MAX7359 is not set
364# CONFIG_KEYBOARD_NEWTON is not set 471# CONFIG_KEYBOARD_NEWTON is not set
472# CONFIG_KEYBOARD_OPENCORES is not set
365# CONFIG_KEYBOARD_STOWAWAY is not set 473# CONFIG_KEYBOARD_STOWAWAY is not set
366# CONFIG_KEYBOARD_GPIO is not set 474# CONFIG_KEYBOARD_SUNKBD is not set
475# CONFIG_KEYBOARD_XTKBD is not set
367CONFIG_INPUT_MOUSE=y 476CONFIG_INPUT_MOUSE=y
368CONFIG_MOUSE_PS2=y 477CONFIG_MOUSE_PS2=y
369CONFIG_MOUSE_PS2_ALPS=y 478CONFIG_MOUSE_PS2_ALPS=y
370CONFIG_MOUSE_PS2_LOGIPS2PP=y 479CONFIG_MOUSE_PS2_LOGIPS2PP=y
371CONFIG_MOUSE_PS2_SYNAPTICS=y 480CONFIG_MOUSE_PS2_SYNAPTICS=y
372CONFIG_MOUSE_PS2_LIFEBOOK=y
373CONFIG_MOUSE_PS2_TRACKPOINT=y 481CONFIG_MOUSE_PS2_TRACKPOINT=y
374# CONFIG_MOUSE_PS2_ELANTECH is not set 482# CONFIG_MOUSE_PS2_ELANTECH is not set
483# CONFIG_MOUSE_PS2_SENTELIC is not set
375# CONFIG_MOUSE_PS2_TOUCHKIT is not set 484# CONFIG_MOUSE_PS2_TOUCHKIT is not set
376# CONFIG_MOUSE_SERIAL is not set 485# CONFIG_MOUSE_SERIAL is not set
377# CONFIG_MOUSE_APPLETOUCH is not set 486# CONFIG_MOUSE_APPLETOUCH is not set
378# CONFIG_MOUSE_BCM5974 is not set 487# CONFIG_MOUSE_BCM5974 is not set
379# CONFIG_MOUSE_VSXXXAA is not set 488# CONFIG_MOUSE_VSXXXAA is not set
380# CONFIG_MOUSE_GPIO is not set 489# CONFIG_MOUSE_GPIO is not set
490# CONFIG_MOUSE_SYNAPTICS_I2C is not set
381# CONFIG_INPUT_JOYSTICK is not set 491# CONFIG_INPUT_JOYSTICK is not set
382# CONFIG_INPUT_TABLET is not set 492# CONFIG_INPUT_TABLET is not set
383# CONFIG_INPUT_TOUCHSCREEN is not set 493# CONFIG_INPUT_TOUCHSCREEN is not set
@@ -390,6 +500,7 @@ CONFIG_SERIO=y
390CONFIG_SERIO_SERPORT=y 500CONFIG_SERIO_SERPORT=y
391CONFIG_SERIO_LIBPS2=y 501CONFIG_SERIO_LIBPS2=y
392# CONFIG_SERIO_RAW is not set 502# CONFIG_SERIO_RAW is not set
503# CONFIG_SERIO_ALTERA_PS2 is not set
393# CONFIG_GAMEPORT is not set 504# CONFIG_GAMEPORT is not set
394 505
395# 506#
@@ -423,16 +534,18 @@ CONFIG_SERIAL_S3C6400=y
423CONFIG_SERIAL_CORE=y 534CONFIG_SERIAL_CORE=y
424CONFIG_SERIAL_CORE_CONSOLE=y 535CONFIG_SERIAL_CORE_CONSOLE=y
425CONFIG_UNIX98_PTYS=y 536CONFIG_UNIX98_PTYS=y
537# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
426CONFIG_LEGACY_PTYS=y 538CONFIG_LEGACY_PTYS=y
427CONFIG_LEGACY_PTY_COUNT=256 539CONFIG_LEGACY_PTY_COUNT=256
428# CONFIG_IPMI_HANDLER is not set 540# CONFIG_IPMI_HANDLER is not set
429CONFIG_HW_RANDOM=y 541CONFIG_HW_RANDOM=y
430# CONFIG_NVRAM is not set 542# CONFIG_HW_RANDOM_TIMERIOMEM is not set
431# CONFIG_R3964 is not set 543# CONFIG_R3964 is not set
432# CONFIG_RAW_DRIVER is not set 544# CONFIG_RAW_DRIVER is not set
433# CONFIG_TCG_TPM is not set 545# CONFIG_TCG_TPM is not set
434CONFIG_I2C=y 546CONFIG_I2C=y
435CONFIG_I2C_BOARDINFO=y 547CONFIG_I2C_BOARDINFO=y
548CONFIG_I2C_COMPAT=y
436CONFIG_I2C_CHARDEV=y 549CONFIG_I2C_CHARDEV=y
437CONFIG_I2C_HELPER_AUTO=y 550CONFIG_I2C_HELPER_AUTO=y
438 551
@@ -443,6 +556,7 @@ CONFIG_I2C_HELPER_AUTO=y
443# 556#
444# I2C system bus drivers (mostly embedded / system-on-chip) 557# I2C system bus drivers (mostly embedded / system-on-chip)
445# 558#
559# CONFIG_I2C_DESIGNWARE is not set
446# CONFIG_I2C_GPIO is not set 560# CONFIG_I2C_GPIO is not set
447# CONFIG_I2C_OCORES is not set 561# CONFIG_I2C_OCORES is not set
448CONFIG_I2C_S3C2410=y 562CONFIG_I2C_S3C2410=y
@@ -463,32 +577,33 @@ CONFIG_I2C_S3C2410=y
463# 577#
464# Miscellaneous I2C Chip support 578# Miscellaneous I2C Chip support
465# 579#
466# CONFIG_DS1682 is not set
467CONFIG_EEPROM_AT24=y
468# CONFIG_EEPROM_LEGACY is not set
469# CONFIG_SENSORS_PCF8574 is not set
470# CONFIG_PCF8575 is not set
471# CONFIG_SENSORS_PCA9539 is not set
472# CONFIG_SENSORS_PCF8591 is not set
473# CONFIG_TPS65010 is not set
474# CONFIG_SENSORS_MAX6875 is not set
475# CONFIG_SENSORS_TSL2550 is not set 580# CONFIG_SENSORS_TSL2550 is not set
476# CONFIG_I2C_DEBUG_CORE is not set 581# CONFIG_I2C_DEBUG_CORE is not set
477# CONFIG_I2C_DEBUG_ALGO is not set 582# CONFIG_I2C_DEBUG_ALGO is not set
478# CONFIG_I2C_DEBUG_BUS is not set 583# CONFIG_I2C_DEBUG_BUS is not set
479# CONFIG_I2C_DEBUG_CHIP is not set 584# CONFIG_I2C_DEBUG_CHIP is not set
480# CONFIG_SPI is not set 585# CONFIG_SPI is not set
586
587#
588# PPS support
589#
590# CONFIG_PPS is not set
481CONFIG_ARCH_REQUIRE_GPIOLIB=y 591CONFIG_ARCH_REQUIRE_GPIOLIB=y
482CONFIG_GPIOLIB=y 592CONFIG_GPIOLIB=y
483# CONFIG_DEBUG_GPIO is not set 593# CONFIG_DEBUG_GPIO is not set
484# CONFIG_GPIO_SYSFS is not set 594# CONFIG_GPIO_SYSFS is not set
485 595
486# 596#
597# Memory mapped GPIO expanders:
598#
599
600#
487# I2C GPIO expanders: 601# I2C GPIO expanders:
488# 602#
489# CONFIG_GPIO_MAX732X is not set 603# CONFIG_GPIO_MAX732X is not set
490# CONFIG_GPIO_PCA953X is not set 604# CONFIG_GPIO_PCA953X is not set
491# CONFIG_GPIO_PCF857X is not set 605# CONFIG_GPIO_PCF857X is not set
606# CONFIG_GPIO_ADP5588 is not set
492 607
493# 608#
494# PCI GPIO expanders: 609# PCI GPIO expanders:
@@ -497,10 +612,19 @@ CONFIG_GPIOLIB=y
497# 612#
498# SPI GPIO expanders: 613# SPI GPIO expanders:
499# 614#
615
616#
617# AC97 GPIO expanders:
618#
500# CONFIG_W1 is not set 619# CONFIG_W1 is not set
501# CONFIG_POWER_SUPPLY is not set 620# CONFIG_POWER_SUPPLY is not set
502CONFIG_HWMON=y 621CONFIG_HWMON=y
503# CONFIG_HWMON_VID is not set 622# CONFIG_HWMON_VID is not set
623# CONFIG_HWMON_DEBUG_CHIP is not set
624
625#
626# Native drivers
627#
504# CONFIG_SENSORS_AD7414 is not set 628# CONFIG_SENSORS_AD7414 is not set
505# CONFIG_SENSORS_AD7418 is not set 629# CONFIG_SENSORS_AD7418 is not set
506# CONFIG_SENSORS_ADM1021 is not set 630# CONFIG_SENSORS_ADM1021 is not set
@@ -509,17 +633,21 @@ CONFIG_HWMON=y
509# CONFIG_SENSORS_ADM1029 is not set 633# CONFIG_SENSORS_ADM1029 is not set
510# CONFIG_SENSORS_ADM1031 is not set 634# CONFIG_SENSORS_ADM1031 is not set
511# CONFIG_SENSORS_ADM9240 is not set 635# CONFIG_SENSORS_ADM9240 is not set
636# CONFIG_SENSORS_ADT7462 is not set
512# CONFIG_SENSORS_ADT7470 is not set 637# CONFIG_SENSORS_ADT7470 is not set
513# CONFIG_SENSORS_ADT7473 is not set 638# CONFIG_SENSORS_ADT7473 is not set
639# CONFIG_SENSORS_ADT7475 is not set
514# CONFIG_SENSORS_ATXP1 is not set 640# CONFIG_SENSORS_ATXP1 is not set
515# CONFIG_SENSORS_DS1621 is not set 641# CONFIG_SENSORS_DS1621 is not set
516# CONFIG_SENSORS_F71805F is not set 642# CONFIG_SENSORS_F71805F is not set
517# CONFIG_SENSORS_F71882FG is not set 643# CONFIG_SENSORS_F71882FG is not set
518# CONFIG_SENSORS_F75375S is not set 644# CONFIG_SENSORS_F75375S is not set
645# CONFIG_SENSORS_G760A is not set
519# CONFIG_SENSORS_GL518SM is not set 646# CONFIG_SENSORS_GL518SM is not set
520# CONFIG_SENSORS_GL520SM is not set 647# CONFIG_SENSORS_GL520SM is not set
521# CONFIG_SENSORS_IT87 is not set 648# CONFIG_SENSORS_IT87 is not set
522# CONFIG_SENSORS_LM63 is not set 649# CONFIG_SENSORS_LM63 is not set
650# CONFIG_SENSORS_LM73 is not set
523# CONFIG_SENSORS_LM75 is not set 651# CONFIG_SENSORS_LM75 is not set
524# CONFIG_SENSORS_LM77 is not set 652# CONFIG_SENSORS_LM77 is not set
525# CONFIG_SENSORS_LM78 is not set 653# CONFIG_SENSORS_LM78 is not set
@@ -530,16 +658,24 @@ CONFIG_HWMON=y
530# CONFIG_SENSORS_LM90 is not set 658# CONFIG_SENSORS_LM90 is not set
531# CONFIG_SENSORS_LM92 is not set 659# CONFIG_SENSORS_LM92 is not set
532# CONFIG_SENSORS_LM93 is not set 660# CONFIG_SENSORS_LM93 is not set
661# CONFIG_SENSORS_LTC4215 is not set
662# CONFIG_SENSORS_LTC4245 is not set
663# CONFIG_SENSORS_LM95241 is not set
533# CONFIG_SENSORS_MAX1619 is not set 664# CONFIG_SENSORS_MAX1619 is not set
534# CONFIG_SENSORS_MAX6650 is not set 665# CONFIG_SENSORS_MAX6650 is not set
535# CONFIG_SENSORS_PC87360 is not set 666# CONFIG_SENSORS_PC87360 is not set
536# CONFIG_SENSORS_PC87427 is not set 667# CONFIG_SENSORS_PC87427 is not set
668# CONFIG_SENSORS_PCF8591 is not set
669# CONFIG_SENSORS_SHT15 is not set
537# CONFIG_SENSORS_DME1737 is not set 670# CONFIG_SENSORS_DME1737 is not set
538# CONFIG_SENSORS_SMSC47M1 is not set 671# CONFIG_SENSORS_SMSC47M1 is not set
539# CONFIG_SENSORS_SMSC47M192 is not set 672# CONFIG_SENSORS_SMSC47M192 is not set
540# CONFIG_SENSORS_SMSC47B397 is not set 673# CONFIG_SENSORS_SMSC47B397 is not set
541# CONFIG_SENSORS_ADS7828 is not set 674# CONFIG_SENSORS_ADS7828 is not set
675# CONFIG_SENSORS_AMC6821 is not set
542# CONFIG_SENSORS_THMC50 is not set 676# CONFIG_SENSORS_THMC50 is not set
677# CONFIG_SENSORS_TMP401 is not set
678# CONFIG_SENSORS_TMP421 is not set
543# CONFIG_SENSORS_VT1211 is not set 679# CONFIG_SENSORS_VT1211 is not set
544# CONFIG_SENSORS_W83781D is not set 680# CONFIG_SENSORS_W83781D is not set
545# CONFIG_SENSORS_W83791D is not set 681# CONFIG_SENSORS_W83791D is not set
@@ -549,15 +685,14 @@ CONFIG_HWMON=y
549# CONFIG_SENSORS_W83L786NG is not set 685# CONFIG_SENSORS_W83L786NG is not set
550# CONFIG_SENSORS_W83627HF is not set 686# CONFIG_SENSORS_W83627HF is not set
551# CONFIG_SENSORS_W83627EHF is not set 687# CONFIG_SENSORS_W83627EHF is not set
552# CONFIG_HWMON_DEBUG_CHIP is not set 688# CONFIG_SENSORS_LIS3_I2C is not set
553# CONFIG_THERMAL is not set 689# CONFIG_THERMAL is not set
554# CONFIG_THERMAL_HWMON is not set
555# CONFIG_WATCHDOG is not set 690# CONFIG_WATCHDOG is not set
691CONFIG_SSB_POSSIBLE=y
556 692
557# 693#
558# Sonics Silicon Backplane 694# Sonics Silicon Backplane
559# 695#
560CONFIG_SSB_POSSIBLE=y
561# CONFIG_SSB is not set 696# CONFIG_SSB is not set
562 697
563# 698#
@@ -568,28 +703,22 @@ CONFIG_SSB_POSSIBLE=y
568# CONFIG_MFD_ASIC3 is not set 703# CONFIG_MFD_ASIC3 is not set
569# CONFIG_HTC_EGPIO is not set 704# CONFIG_HTC_EGPIO is not set
570# CONFIG_HTC_PASIC3 is not set 705# CONFIG_HTC_PASIC3 is not set
706# CONFIG_TPS65010 is not set
707# CONFIG_TWL4030_CORE is not set
571# CONFIG_MFD_TMIO is not set 708# CONFIG_MFD_TMIO is not set
572# CONFIG_MFD_T7L66XB is not set 709# CONFIG_MFD_T7L66XB is not set
573# CONFIG_MFD_TC6387XB is not set 710# CONFIG_MFD_TC6387XB is not set
574# CONFIG_MFD_TC6393XB is not set 711# CONFIG_MFD_TC6393XB is not set
575# CONFIG_PMIC_DA903X is not set 712# CONFIG_PMIC_DA903X is not set
713# CONFIG_PMIC_ADP5520 is not set
576# CONFIG_MFD_WM8400 is not set 714# CONFIG_MFD_WM8400 is not set
715# CONFIG_MFD_WM831X is not set
577# CONFIG_MFD_WM8350_I2C is not set 716# CONFIG_MFD_WM8350_I2C is not set
578 717# CONFIG_MFD_PCF50633 is not set
579# 718# CONFIG_AB3100_CORE is not set
580# Multimedia devices 719# CONFIG_MFD_88PM8607 is not set
581# 720# CONFIG_REGULATOR is not set
582 721# CONFIG_MEDIA_SUPPORT is not set
583#
584# Multimedia core support
585#
586# CONFIG_VIDEO_DEV is not set
587# CONFIG_VIDEO_MEDIA is not set
588
589#
590# Multimedia drivers
591#
592# CONFIG_DAB is not set
593 722
594# 723#
595# Graphics support 724# Graphics support
@@ -612,17 +741,15 @@ CONFIG_DUMMY_CONSOLE=y
612# CONFIG_SOUND is not set 741# CONFIG_SOUND is not set
613CONFIG_HID_SUPPORT=y 742CONFIG_HID_SUPPORT=y
614CONFIG_HID=y 743CONFIG_HID=y
615CONFIG_HID_DEBUG=y
616# CONFIG_HIDRAW is not set 744# CONFIG_HIDRAW is not set
617# CONFIG_HID_PID is not set 745# CONFIG_HID_PID is not set
618 746
619# 747#
620# Special HID drivers 748# Special HID drivers
621# 749#
622# CONFIG_HID_COMPAT is not set
623CONFIG_USB_SUPPORT=y 750CONFIG_USB_SUPPORT=y
624CONFIG_USB_ARCH_HAS_HCD=y 751CONFIG_USB_ARCH_HAS_HCD=y
625# CONFIG_USB_ARCH_HAS_OHCI is not set 752CONFIG_USB_ARCH_HAS_OHCI=y
626# CONFIG_USB_ARCH_HAS_EHCI is not set 753# CONFIG_USB_ARCH_HAS_EHCI is not set
627# CONFIG_USB is not set 754# CONFIG_USB is not set
628 755
@@ -631,9 +758,13 @@ CONFIG_USB_ARCH_HAS_HCD=y
631# 758#
632 759
633# 760#
634# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 761# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
635# 762#
636# CONFIG_USB_GADGET is not set 763# CONFIG_USB_GADGET is not set
764
765#
766# OTG and related infrastructure
767#
637CONFIG_MMC=y 768CONFIG_MMC=y
638CONFIG_MMC_DEBUG=y 769CONFIG_MMC_DEBUG=y
639CONFIG_MMC_UNSAFE_RESUME=y 770CONFIG_MMC_UNSAFE_RESUME=y
@@ -650,22 +781,24 @@ CONFIG_SDIO_UART=y
650# MMC/SD/SDIO Host Controller Drivers 781# MMC/SD/SDIO Host Controller Drivers
651# 782#
652CONFIG_MMC_SDHCI=y 783CONFIG_MMC_SDHCI=y
784# CONFIG_MMC_SDHCI_PLTFM is not set
653CONFIG_MMC_SDHCI_S3C=y 785CONFIG_MMC_SDHCI_S3C=y
786# CONFIG_MMC_SDHCI_S3C_DMA is not set
787# CONFIG_MMC_AT91 is not set
788# CONFIG_MMC_ATMELMCI is not set
654# CONFIG_MEMSTICK is not set 789# CONFIG_MEMSTICK is not set
655# CONFIG_ACCESSIBILITY is not set
656# CONFIG_NEW_LEDS is not set 790# CONFIG_NEW_LEDS is not set
791# CONFIG_ACCESSIBILITY is not set
657CONFIG_RTC_LIB=y 792CONFIG_RTC_LIB=y
658# CONFIG_RTC_CLASS is not set 793# CONFIG_RTC_CLASS is not set
659# CONFIG_DMADEVICES is not set 794# CONFIG_DMADEVICES is not set
795# CONFIG_AUXDISPLAY is not set
796# CONFIG_UIO is not set
660 797
661# 798#
662# Voltage and Current regulators 799# TI VLYNQ
663# 800#
664# CONFIG_REGULATOR is not set 801# CONFIG_STAGING is not set
665# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
666# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
667# CONFIG_REGULATOR_BQ24022 is not set
668# CONFIG_UIO is not set
669 802
670# 803#
671# File systems 804# File systems
@@ -674,6 +807,7 @@ CONFIG_EXT2_FS=y
674# CONFIG_EXT2_FS_XATTR is not set 807# CONFIG_EXT2_FS_XATTR is not set
675# CONFIG_EXT2_FS_XIP is not set 808# CONFIG_EXT2_FS_XIP is not set
676CONFIG_EXT3_FS=y 809CONFIG_EXT3_FS=y
810# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
677CONFIG_EXT3_FS_XATTR=y 811CONFIG_EXT3_FS_XATTR=y
678CONFIG_EXT3_FS_POSIX_ACL=y 812CONFIG_EXT3_FS_POSIX_ACL=y
679CONFIG_EXT3_FS_SECURITY=y 813CONFIG_EXT3_FS_SECURITY=y
@@ -683,9 +817,12 @@ CONFIG_FS_MBCACHE=y
683# CONFIG_REISERFS_FS is not set 817# CONFIG_REISERFS_FS is not set
684# CONFIG_JFS_FS is not set 818# CONFIG_JFS_FS is not set
685CONFIG_FS_POSIX_ACL=y 819CONFIG_FS_POSIX_ACL=y
686CONFIG_FILE_LOCKING=y
687# CONFIG_XFS_FS is not set 820# CONFIG_XFS_FS is not set
688# CONFIG_GFS2_FS is not set 821# CONFIG_GFS2_FS is not set
822# CONFIG_BTRFS_FS is not set
823# CONFIG_NILFS2_FS is not set
824CONFIG_FILE_LOCKING=y
825CONFIG_FSNOTIFY=y
689CONFIG_DNOTIFY=y 826CONFIG_DNOTIFY=y
690CONFIG_INOTIFY=y 827CONFIG_INOTIFY=y
691CONFIG_INOTIFY_USER=y 828CONFIG_INOTIFY_USER=y
@@ -696,6 +833,11 @@ CONFIG_INOTIFY_USER=y
696CONFIG_GENERIC_ACL=y 833CONFIG_GENERIC_ACL=y
697 834
698# 835#
836# Caches
837#
838# CONFIG_FSCACHE is not set
839
840#
699# CD-ROM/DVD Filesystems 841# CD-ROM/DVD Filesystems
700# 842#
701# CONFIG_ISO9660_FS is not set 843# CONFIG_ISO9660_FS is not set
@@ -719,10 +861,7 @@ CONFIG_TMPFS=y
719CONFIG_TMPFS_POSIX_ACL=y 861CONFIG_TMPFS_POSIX_ACL=y
720# CONFIG_HUGETLB_PAGE is not set 862# CONFIG_HUGETLB_PAGE is not set
721# CONFIG_CONFIGFS_FS is not set 863# CONFIG_CONFIGFS_FS is not set
722 864CONFIG_MISC_FILESYSTEMS=y
723#
724# Miscellaneous filesystems
725#
726# CONFIG_ADFS_FS is not set 865# CONFIG_ADFS_FS is not set
727# CONFIG_AFFS_FS is not set 866# CONFIG_AFFS_FS is not set
728# CONFIG_HFS_FS is not set 867# CONFIG_HFS_FS is not set
@@ -731,12 +870,17 @@ CONFIG_TMPFS_POSIX_ACL=y
731# CONFIG_BFS_FS is not set 870# CONFIG_BFS_FS is not set
732# CONFIG_EFS_FS is not set 871# CONFIG_EFS_FS is not set
733CONFIG_CRAMFS=y 872CONFIG_CRAMFS=y
873# CONFIG_SQUASHFS is not set
734# CONFIG_VXFS_FS is not set 874# CONFIG_VXFS_FS is not set
735# CONFIG_MINIX_FS is not set 875# CONFIG_MINIX_FS is not set
736# CONFIG_OMFS_FS is not set 876# CONFIG_OMFS_FS is not set
737# CONFIG_HPFS_FS is not set 877# CONFIG_HPFS_FS is not set
738# CONFIG_QNX4FS_FS is not set 878# CONFIG_QNX4FS_FS is not set
739CONFIG_ROMFS_FS=y 879CONFIG_ROMFS_FS=y
880CONFIG_ROMFS_BACKED_BY_BLOCK=y
881# CONFIG_ROMFS_BACKED_BY_MTD is not set
882# CONFIG_ROMFS_BACKED_BY_BOTH is not set
883CONFIG_ROMFS_ON_BLOCK=y
740# CONFIG_SYSV_FS is not set 884# CONFIG_SYSV_FS is not set
741# CONFIG_UFS_FS is not set 885# CONFIG_UFS_FS is not set
742 886
@@ -755,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
755CONFIG_ENABLE_MUST_CHECK=y 899CONFIG_ENABLE_MUST_CHECK=y
756CONFIG_FRAME_WARN=1024 900CONFIG_FRAME_WARN=1024
757CONFIG_MAGIC_SYSRQ=y 901CONFIG_MAGIC_SYSRQ=y
902# CONFIG_STRIP_ASM_SYMS is not set
758# CONFIG_UNUSED_SYMBOLS is not set 903# CONFIG_UNUSED_SYMBOLS is not set
759# CONFIG_DEBUG_FS is not set 904# CONFIG_DEBUG_FS is not set
760# CONFIG_HEADERS_CHECK is not set 905# CONFIG_HEADERS_CHECK is not set
@@ -763,12 +908,16 @@ CONFIG_DEBUG_KERNEL=y
763CONFIG_DETECT_SOFTLOCKUP=y 908CONFIG_DETECT_SOFTLOCKUP=y
764# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 909# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
765CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 910CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
911CONFIG_DETECT_HUNG_TASK=y
912# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
913CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
766CONFIG_SCHED_DEBUG=y 914CONFIG_SCHED_DEBUG=y
767# CONFIG_SCHEDSTATS is not set 915# CONFIG_SCHEDSTATS is not set
768# CONFIG_TIMER_STATS is not set 916# CONFIG_TIMER_STATS is not set
769# CONFIG_DEBUG_OBJECTS is not set 917# CONFIG_DEBUG_OBJECTS is not set
770# CONFIG_SLUB_DEBUG_ON is not set 918# CONFIG_SLUB_DEBUG_ON is not set
771# CONFIG_SLUB_STATS is not set 919# CONFIG_SLUB_STATS is not set
920# CONFIG_DEBUG_KMEMLEAK is not set
772CONFIG_DEBUG_RT_MUTEXES=y 921CONFIG_DEBUG_RT_MUTEXES=y
773CONFIG_DEBUG_PI_LIST=y 922CONFIG_DEBUG_PI_LIST=y
774# CONFIG_RT_MUTEX_TESTER is not set 923# CONFIG_RT_MUTEX_TESTER is not set
@@ -787,34 +936,43 @@ CONFIG_DEBUG_INFO=y
787CONFIG_DEBUG_MEMORY_INIT=y 936CONFIG_DEBUG_MEMORY_INIT=y
788# CONFIG_DEBUG_LIST is not set 937# CONFIG_DEBUG_LIST is not set
789# CONFIG_DEBUG_SG is not set 938# CONFIG_DEBUG_SG is not set
790CONFIG_FRAME_POINTER=y 939# CONFIG_DEBUG_NOTIFIERS is not set
940# CONFIG_DEBUG_CREDENTIALS is not set
791# CONFIG_BOOT_PRINTK_DELAY is not set 941# CONFIG_BOOT_PRINTK_DELAY is not set
792# CONFIG_RCU_TORTURE_TEST is not set 942# CONFIG_RCU_TORTURE_TEST is not set
793# CONFIG_RCU_CPU_STALL_DETECTOR is not set 943# CONFIG_RCU_CPU_STALL_DETECTOR is not set
794# CONFIG_BACKTRACE_SELF_TEST is not set 944# CONFIG_BACKTRACE_SELF_TEST is not set
795# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 945# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
946# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
796# CONFIG_FAULT_INJECTION is not set 947# CONFIG_FAULT_INJECTION is not set
797# CONFIG_LATENCYTOP is not set 948# CONFIG_LATENCYTOP is not set
798CONFIG_SYSCTL_SYSCALL_CHECK=y 949CONFIG_SYSCTL_SYSCALL_CHECK=y
950# CONFIG_PAGE_POISONING is not set
799CONFIG_HAVE_FUNCTION_TRACER=y 951CONFIG_HAVE_FUNCTION_TRACER=y
800 952CONFIG_TRACING_SUPPORT=y
801# 953CONFIG_FTRACE=y
802# Tracers
803#
804# CONFIG_FUNCTION_TRACER is not set 954# CONFIG_FUNCTION_TRACER is not set
805# CONFIG_SCHED_TRACER is not set 955# CONFIG_SCHED_TRACER is not set
806# CONFIG_CONTEXT_SWITCH_TRACER is not set 956# CONFIG_ENABLE_DEFAULT_TRACERS is not set
807# CONFIG_BOOT_TRACER is not set 957# CONFIG_BOOT_TRACER is not set
958CONFIG_BRANCH_PROFILE_NONE=y
959# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
960# CONFIG_PROFILE_ALL_BRANCHES is not set
808# CONFIG_STACK_TRACER is not set 961# CONFIG_STACK_TRACER is not set
809# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 962# CONFIG_KMEMTRACE is not set
963# CONFIG_WORKQUEUE_TRACER is not set
964# CONFIG_BLK_DEV_IO_TRACE is not set
810# CONFIG_SAMPLES is not set 965# CONFIG_SAMPLES is not set
811CONFIG_HAVE_ARCH_KGDB=y 966CONFIG_HAVE_ARCH_KGDB=y
812# CONFIG_KGDB is not set 967# CONFIG_KGDB is not set
968CONFIG_ARM_UNWIND=y
813CONFIG_DEBUG_USER=y 969CONFIG_DEBUG_USER=y
814CONFIG_DEBUG_ERRORS=y 970CONFIG_DEBUG_ERRORS=y
815# CONFIG_DEBUG_STACK_USAGE is not set 971# CONFIG_DEBUG_STACK_USAGE is not set
816CONFIG_DEBUG_LL=y 972CONFIG_DEBUG_LL=y
973# CONFIG_EARLY_PRINTK is not set
817# CONFIG_DEBUG_ICEDCC is not set 974# CONFIG_DEBUG_ICEDCC is not set
975# CONFIG_OC_ETM is not set
818CONFIG_DEBUG_S3C_UART=0 976CONFIG_DEBUG_S3C_UART=0
819 977
820# 978#
@@ -823,13 +981,19 @@ CONFIG_DEBUG_S3C_UART=0
823# CONFIG_KEYS is not set 981# CONFIG_KEYS is not set
824# CONFIG_SECURITY is not set 982# CONFIG_SECURITY is not set
825# CONFIG_SECURITYFS is not set 983# CONFIG_SECURITYFS is not set
826# CONFIG_SECURITY_FILE_CAPABILITIES is not set 984# CONFIG_DEFAULT_SECURITY_SELINUX is not set
985# CONFIG_DEFAULT_SECURITY_SMACK is not set
986# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
987CONFIG_DEFAULT_SECURITY_DAC=y
988CONFIG_DEFAULT_SECURITY=""
827# CONFIG_CRYPTO is not set 989# CONFIG_CRYPTO is not set
990# CONFIG_BINARY_PRINTF is not set
828 991
829# 992#
830# Library routines 993# Library routines
831# 994#
832CONFIG_BITREVERSE=y 995CONFIG_BITREVERSE=y
996CONFIG_GENERIC_FIND_LAST_BIT=y
833# CONFIG_CRC_CCITT is not set 997# CONFIG_CRC_CCITT is not set
834# CONFIG_CRC16 is not set 998# CONFIG_CRC16 is not set
835# CONFIG_CRC_T10DIF is not set 999# CONFIG_CRC_T10DIF is not set
@@ -838,6 +1002,10 @@ CONFIG_CRC32=y
838# CONFIG_CRC7 is not set 1002# CONFIG_CRC7 is not set
839# CONFIG_LIBCRC32C is not set 1003# CONFIG_LIBCRC32C is not set
840CONFIG_ZLIB_INFLATE=y 1004CONFIG_ZLIB_INFLATE=y
841CONFIG_PLIST=y 1005CONFIG_LZO_DECOMPRESS=y
1006CONFIG_DECOMPRESS_GZIP=y
1007CONFIG_DECOMPRESS_BZIP2=y
1008CONFIG_DECOMPRESS_LZMA=y
1009CONFIG_DECOMPRESS_LZO=y
842CONFIG_HAS_IOMEM=y 1010CONFIG_HAS_IOMEM=y
843CONFIG_HAS_DMA=y 1011CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p6440_defconfig
new file mode 100644
index 000000000000..279a15e53114
--- /dev/null
+++ b/arch/arm/configs/s5p6440_defconfig
@@ -0,0 +1,969 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2
4# Sat Jan 9 16:33:55 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33CONFIG_SWAP=y
34# CONFIG_SYSVIPC is not set
35# CONFIG_BSD_PROCESS_ACCT is not set
36
37#
38# RCU Subsystem
39#
40CONFIG_TREE_RCU=y
41# CONFIG_TREE_PREEMPT_RCU is not set
42# CONFIG_TINY_RCU is not set
43# CONFIG_RCU_TRACE is not set
44CONFIG_RCU_FANOUT=32
45# CONFIG_RCU_FANOUT_EXACT is not set
46# CONFIG_TREE_RCU_TRACE is not set
47# CONFIG_IKCONFIG is not set
48CONFIG_LOG_BUF_SHIFT=17
49# CONFIG_GROUP_SCHED is not set
50# CONFIG_CGROUPS is not set
51CONFIG_SYSFS_DEPRECATED=y
52CONFIG_SYSFS_DEPRECATED_V2=y
53# CONFIG_RELAY is not set
54CONFIG_NAMESPACES=y
55# CONFIG_UTS_NS is not set
56# CONFIG_USER_NS is not set
57# CONFIG_PID_NS is not set
58CONFIG_BLK_DEV_INITRD=y
59CONFIG_INITRAMFS_SOURCE=""
60CONFIG_RD_GZIP=y
61CONFIG_RD_BZIP2=y
62CONFIG_RD_LZMA=y
63CONFIG_CC_OPTIMIZE_FOR_SIZE=y
64CONFIG_SYSCTL=y
65CONFIG_ANON_INODES=y
66# CONFIG_EMBEDDED is not set
67CONFIG_UID16=y
68CONFIG_SYSCTL_SYSCALL=y
69CONFIG_KALLSYMS=y
70CONFIG_KALLSYMS_ALL=y
71# CONFIG_KALLSYMS_EXTRA_PASS is not set
72CONFIG_HOTPLUG=y
73CONFIG_PRINTK=y
74CONFIG_BUG=y
75CONFIG_ELF_CORE=y
76CONFIG_BASE_FULL=y
77CONFIG_FUTEX=y
78CONFIG_EPOLL=y
79CONFIG_SIGNALFD=y
80CONFIG_TIMERFD=y
81CONFIG_EVENTFD=y
82CONFIG_SHMEM=y
83CONFIG_AIO=y
84
85#
86# Kernel Performance Events And Counters
87#
88CONFIG_VM_EVENT_COUNTERS=y
89CONFIG_SLUB_DEBUG=y
90CONFIG_COMPAT_BRK=y
91# CONFIG_SLAB is not set
92CONFIG_SLUB=y
93# CONFIG_SLOB is not set
94# CONFIG_PROFILING is not set
95CONFIG_HAVE_OPROFILE=y
96# CONFIG_KPROBES is not set
97CONFIG_HAVE_KPROBES=y
98CONFIG_HAVE_KRETPROBES=y
99CONFIG_HAVE_CLK=y
100
101#
102# GCOV-based kernel profiling
103#
104# CONFIG_SLOW_WORK is not set
105CONFIG_HAVE_GENERIC_DMA_COHERENT=y
106CONFIG_SLABINFO=y
107CONFIG_RT_MUTEXES=y
108CONFIG_BASE_SMALL=0
109CONFIG_MODULES=y
110# CONFIG_MODULE_FORCE_LOAD is not set
111CONFIG_MODULE_UNLOAD=y
112# CONFIG_MODULE_FORCE_UNLOAD is not set
113# CONFIG_MODVERSIONS is not set
114# CONFIG_MODULE_SRCVERSION_ALL is not set
115CONFIG_BLOCK=y
116CONFIG_LBDAF=y
117# CONFIG_BLK_DEV_BSG is not set
118# CONFIG_BLK_DEV_INTEGRITY is not set
119
120#
121# IO Schedulers
122#
123CONFIG_IOSCHED_NOOP=y
124CONFIG_IOSCHED_DEADLINE=y
125CONFIG_IOSCHED_CFQ=y
126# CONFIG_DEFAULT_DEADLINE is not set
127CONFIG_DEFAULT_CFQ=y
128# CONFIG_DEFAULT_NOOP is not set
129CONFIG_DEFAULT_IOSCHED="cfq"
130# CONFIG_INLINE_SPIN_TRYLOCK is not set
131# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
132# CONFIG_INLINE_SPIN_LOCK is not set
133# CONFIG_INLINE_SPIN_LOCK_BH is not set
134# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
135# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
136# CONFIG_INLINE_SPIN_UNLOCK is not set
137# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
138# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
139# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
140# CONFIG_INLINE_READ_TRYLOCK is not set
141# CONFIG_INLINE_READ_LOCK is not set
142# CONFIG_INLINE_READ_LOCK_BH is not set
143# CONFIG_INLINE_READ_LOCK_IRQ is not set
144# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
145# CONFIG_INLINE_READ_UNLOCK is not set
146# CONFIG_INLINE_READ_UNLOCK_BH is not set
147# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
148# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
149# CONFIG_INLINE_WRITE_TRYLOCK is not set
150# CONFIG_INLINE_WRITE_LOCK is not set
151# CONFIG_INLINE_WRITE_LOCK_BH is not set
152# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
153# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
154# CONFIG_INLINE_WRITE_UNLOCK is not set
155# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
156# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
157# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
158# CONFIG_MUTEX_SPIN_ON_OWNER is not set
159# CONFIG_FREEZER is not set
160
161#
162# System Type
163#
164CONFIG_MMU=y
165# CONFIG_ARCH_AAEC2000 is not set
166# CONFIG_ARCH_INTEGRATOR is not set
167# CONFIG_ARCH_REALVIEW is not set
168# CONFIG_ARCH_VERSATILE is not set
169# CONFIG_ARCH_AT91 is not set
170# CONFIG_ARCH_CLPS711X is not set
171# CONFIG_ARCH_GEMINI is not set
172# CONFIG_ARCH_EBSA110 is not set
173# CONFIG_ARCH_EP93XX is not set
174# CONFIG_ARCH_FOOTBRIDGE is not set
175# CONFIG_ARCH_MXC is not set
176# CONFIG_ARCH_STMP3XXX is not set
177# CONFIG_ARCH_NETX is not set
178# CONFIG_ARCH_H720X is not set
179# CONFIG_ARCH_NOMADIK is not set
180# CONFIG_ARCH_IOP13XX is not set
181# CONFIG_ARCH_IOP32X is not set
182# CONFIG_ARCH_IOP33X is not set
183# CONFIG_ARCH_IXP23XX is not set
184# CONFIG_ARCH_IXP2000 is not set
185# CONFIG_ARCH_IXP4XX is not set
186# CONFIG_ARCH_L7200 is not set
187# CONFIG_ARCH_DOVE is not set
188# CONFIG_ARCH_KIRKWOOD is not set
189# CONFIG_ARCH_LOKI is not set
190# CONFIG_ARCH_MV78XX0 is not set
191# CONFIG_ARCH_ORION5X is not set
192# CONFIG_ARCH_MMP is not set
193# CONFIG_ARCH_KS8695 is not set
194# CONFIG_ARCH_NS9XXX is not set
195# CONFIG_ARCH_W90X900 is not set
196# CONFIG_ARCH_PNX4008 is not set
197# CONFIG_ARCH_PXA is not set
198# CONFIG_ARCH_MSM is not set
199# CONFIG_ARCH_RPC is not set
200# CONFIG_ARCH_SA1100 is not set
201# CONFIG_ARCH_S3C2410 is not set
202# CONFIG_ARCH_S3C64XX is not set
203CONFIG_ARCH_S5P6440=y
204# CONFIG_ARCH_S5PC1XX is not set
205# CONFIG_ARCH_SHARK is not set
206# CONFIG_ARCH_LH7A40X is not set
207# CONFIG_ARCH_U300 is not set
208# CONFIG_ARCH_DAVINCI is not set
209# CONFIG_ARCH_OMAP is not set
210# CONFIG_ARCH_BCMRING is not set
211# CONFIG_ARCH_U8500 is not set
212CONFIG_PLAT_SAMSUNG=y
213CONFIG_SAMSUNG_CLKSRC=y
214CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
215CONFIG_SAMSUNG_IRQ_UART=y
216CONFIG_SAMSUNG_GPIO_EXTRA=0
217CONFIG_PLAT_S3C=y
218
219#
220# Boot options
221#
222CONFIG_S3C_BOOT_ERROR_RESET=y
223CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
224
225#
226# Power management
227#
228CONFIG_S3C_LOWLEVEL_UART_PORT=1
229CONFIG_S3C_GPIO_SPACE=0
230CONFIG_S3C_GPIO_TRACK=y
231CONFIG_PLAT_S5P=y
232CONFIG_CPU_S5P6440_INIT=y
233CONFIG_CPU_S5P6440_CLOCK=y
234CONFIG_CPU_S5P6440=y
235CONFIG_MACH_SMDK6440=y
236
237#
238# Processor Type
239#
240CONFIG_CPU_V6=y
241CONFIG_CPU_32v6K=y
242CONFIG_CPU_32v6=y
243CONFIG_CPU_ABRT_EV6=y
244CONFIG_CPU_PABRT_V6=y
245CONFIG_CPU_CACHE_V6=y
246CONFIG_CPU_CACHE_VIPT=y
247CONFIG_CPU_COPY_V6=y
248CONFIG_CPU_TLB_V6=y
249CONFIG_CPU_HAS_ASID=y
250CONFIG_CPU_CP15=y
251CONFIG_CPU_CP15_MMU=y
252
253#
254# Processor Features
255#
256CONFIG_ARM_THUMB=y
257# CONFIG_CPU_ICACHE_DISABLE is not set
258# CONFIG_CPU_DCACHE_DISABLE is not set
259# CONFIG_CPU_BPREDICT_DISABLE is not set
260CONFIG_ARM_L1_CACHE_SHIFT=5
261# CONFIG_ARM_ERRATA_411920 is not set
262CONFIG_ARM_VIC=y
263CONFIG_ARM_VIC_NR=2
264
265#
266# Bus support
267#
268# CONFIG_PCI_SYSCALL is not set
269# CONFIG_ARCH_SUPPORTS_MSI is not set
270# CONFIG_PCCARD is not set
271
272#
273# Kernel Features
274#
275CONFIG_VMSPLIT_3G=y
276# CONFIG_VMSPLIT_2G is not set
277# CONFIG_VMSPLIT_1G is not set
278CONFIG_PAGE_OFFSET=0xC0000000
279CONFIG_PREEMPT_NONE=y
280# CONFIG_PREEMPT_VOLUNTARY is not set
281# CONFIG_PREEMPT is not set
282CONFIG_HZ=200
283CONFIG_AEABI=y
284CONFIG_OABI_COMPAT=y
285# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
286# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
287# CONFIG_HIGHMEM is not set
288CONFIG_SELECT_MEMORY_MODEL=y
289CONFIG_FLATMEM_MANUAL=y
290# CONFIG_DISCONTIGMEM_MANUAL is not set
291# CONFIG_SPARSEMEM_MANUAL is not set
292CONFIG_FLATMEM=y
293CONFIG_FLAT_NODE_MEM_MAP=y
294CONFIG_PAGEFLAGS_EXTENDED=y
295CONFIG_SPLIT_PTLOCK_CPUS=999999
296# CONFIG_PHYS_ADDR_T_64BIT is not set
297CONFIG_ZONE_DMA_FLAG=0
298CONFIG_VIRT_TO_BUS=y
299# CONFIG_KSM is not set
300CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
301CONFIG_ALIGNMENT_TRAP=y
302# CONFIG_UACCESS_WITH_MEMCPY is not set
303
304#
305# Boot options
306#
307CONFIG_ZBOOT_ROM_TEXT=0
308CONFIG_ZBOOT_ROM_BSS=0
309CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
310# CONFIG_XIP_KERNEL is not set
311# CONFIG_KEXEC is not set
312
313#
314# CPU Power Management
315#
316# CONFIG_CPU_IDLE is not set
317
318#
319# Floating point emulation
320#
321
322#
323# At least one emulation must be selected
324#
325CONFIG_FPE_NWFPE=y
326# CONFIG_FPE_NWFPE_XP is not set
327# CONFIG_FPE_FASTFPE is not set
328# CONFIG_VFP is not set
329
330#
331# Userspace binary formats
332#
333CONFIG_BINFMT_ELF=y
334# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
335CONFIG_HAVE_AOUT=y
336# CONFIG_BINFMT_AOUT is not set
337# CONFIG_BINFMT_MISC is not set
338
339#
340# Power management options
341#
342# CONFIG_PM is not set
343CONFIG_ARCH_SUSPEND_POSSIBLE=y
344# CONFIG_NET is not set
345
346#
347# Device Drivers
348#
349
350#
351# Generic Driver Options
352#
353CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
354# CONFIG_DEVTMPFS is not set
355CONFIG_STANDALONE=y
356# CONFIG_PREVENT_FIRMWARE_BUILD is not set
357CONFIG_FW_LOADER=y
358CONFIG_FIRMWARE_IN_KERNEL=y
359CONFIG_EXTRA_FIRMWARE=""
360# CONFIG_DEBUG_DRIVER is not set
361# CONFIG_DEBUG_DEVRES is not set
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_MTD is not set
364# CONFIG_PARPORT is not set
365CONFIG_BLK_DEV=y
366# CONFIG_BLK_DEV_COW_COMMON is not set
367# CONFIG_BLK_DEV_LOOP is not set
368
369#
370# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
371#
372CONFIG_BLK_DEV_RAM=y
373CONFIG_BLK_DEV_RAM_COUNT=16
374CONFIG_BLK_DEV_RAM_SIZE=8192
375# CONFIG_BLK_DEV_XIP is not set
376# CONFIG_CDROM_PKTCDVD is not set
377# CONFIG_MG_DISK is not set
378# CONFIG_MISC_DEVICES is not set
379CONFIG_HAVE_IDE=y
380# CONFIG_IDE is not set
381
382#
383# SCSI device support
384#
385# CONFIG_RAID_ATTRS is not set
386CONFIG_SCSI=y
387CONFIG_SCSI_DMA=y
388# CONFIG_SCSI_TGT is not set
389# CONFIG_SCSI_NETLINK is not set
390CONFIG_SCSI_PROC_FS=y
391
392#
393# SCSI support type (disk, tape, CD-ROM)
394#
395CONFIG_BLK_DEV_SD=y
396# CONFIG_CHR_DEV_ST is not set
397# CONFIG_CHR_DEV_OSST is not set
398# CONFIG_BLK_DEV_SR is not set
399CONFIG_CHR_DEV_SG=y
400# CONFIG_CHR_DEV_SCH is not set
401# CONFIG_SCSI_MULTI_LUN is not set
402# CONFIG_SCSI_CONSTANTS is not set
403# CONFIG_SCSI_LOGGING is not set
404# CONFIG_SCSI_SCAN_ASYNC is not set
405CONFIG_SCSI_WAIT_SCAN=m
406
407#
408# SCSI Transports
409#
410# CONFIG_SCSI_SPI_ATTRS is not set
411# CONFIG_SCSI_FC_ATTRS is not set
412# CONFIG_SCSI_SAS_LIBSAS is not set
413# CONFIG_SCSI_SRP_ATTRS is not set
414CONFIG_SCSI_LOWLEVEL=y
415# CONFIG_LIBFC is not set
416# CONFIG_LIBFCOE is not set
417# CONFIG_SCSI_DEBUG is not set
418# CONFIG_SCSI_DH is not set
419# CONFIG_SCSI_OSD_INITIATOR is not set
420# CONFIG_ATA is not set
421# CONFIG_MD is not set
422# CONFIG_PHONE is not set
423
424#
425# Input device support
426#
427CONFIG_INPUT=y
428# CONFIG_INPUT_FF_MEMLESS is not set
429# CONFIG_INPUT_POLLDEV is not set
430# CONFIG_INPUT_SPARSEKMAP is not set
431
432#
433# Userland interfaces
434#
435CONFIG_INPUT_MOUSEDEV=y
436CONFIG_INPUT_MOUSEDEV_PSAUX=y
437CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
438CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
439# CONFIG_INPUT_JOYDEV is not set
440CONFIG_INPUT_EVDEV=y
441# CONFIG_INPUT_EVBUG is not set
442
443#
444# Input Device Drivers
445#
446CONFIG_INPUT_KEYBOARD=y
447CONFIG_KEYBOARD_ATKBD=y
448# CONFIG_KEYBOARD_LKKBD is not set
449# CONFIG_KEYBOARD_GPIO is not set
450# CONFIG_KEYBOARD_MATRIX is not set
451# CONFIG_KEYBOARD_NEWTON is not set
452# CONFIG_KEYBOARD_OPENCORES is not set
453# CONFIG_KEYBOARD_STOWAWAY is not set
454# CONFIG_KEYBOARD_SUNKBD is not set
455# CONFIG_KEYBOARD_XTKBD is not set
456CONFIG_INPUT_MOUSE=y
457CONFIG_MOUSE_PS2=y
458CONFIG_MOUSE_PS2_ALPS=y
459CONFIG_MOUSE_PS2_LOGIPS2PP=y
460CONFIG_MOUSE_PS2_SYNAPTICS=y
461CONFIG_MOUSE_PS2_TRACKPOINT=y
462# CONFIG_MOUSE_PS2_ELANTECH is not set
463# CONFIG_MOUSE_PS2_SENTELIC is not set
464# CONFIG_MOUSE_PS2_TOUCHKIT is not set
465# CONFIG_MOUSE_SERIAL is not set
466# CONFIG_MOUSE_VSXXXAA is not set
467# CONFIG_MOUSE_GPIO is not set
468# CONFIG_INPUT_JOYSTICK is not set
469# CONFIG_INPUT_TABLET is not set
470CONFIG_INPUT_TOUCHSCREEN=y
471# CONFIG_TOUCHSCREEN_AD7879 is not set
472# CONFIG_TOUCHSCREEN_DYNAPRO is not set
473# CONFIG_TOUCHSCREEN_FUJITSU is not set
474# CONFIG_TOUCHSCREEN_GUNZE is not set
475# CONFIG_TOUCHSCREEN_ELO is not set
476# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
477# CONFIG_TOUCHSCREEN_MTOUCH is not set
478# CONFIG_TOUCHSCREEN_INEXIO is not set
479# CONFIG_TOUCHSCREEN_MK712 is not set
480# CONFIG_TOUCHSCREEN_PENMOUNT is not set
481# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
482# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
483# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
484# CONFIG_TOUCHSCREEN_W90X900 is not set
485# CONFIG_INPUT_MISC is not set
486
487#
488# Hardware I/O ports
489#
490CONFIG_SERIO=y
491CONFIG_SERIO_SERPORT=y
492CONFIG_SERIO_LIBPS2=y
493# CONFIG_SERIO_RAW is not set
494# CONFIG_SERIO_ALTERA_PS2 is not set
495# CONFIG_GAMEPORT is not set
496
497#
498# Character devices
499#
500CONFIG_VT=y
501CONFIG_CONSOLE_TRANSLATIONS=y
502CONFIG_VT_CONSOLE=y
503CONFIG_HW_CONSOLE=y
504# CONFIG_VT_HW_CONSOLE_BINDING is not set
505CONFIG_DEVKMEM=y
506# CONFIG_SERIAL_NONSTANDARD is not set
507
508#
509# Serial drivers
510#
511CONFIG_SERIAL_8250=y
512# CONFIG_SERIAL_8250_CONSOLE is not set
513CONFIG_SERIAL_8250_NR_UARTS=3
514CONFIG_SERIAL_8250_RUNTIME_UARTS=3
515# CONFIG_SERIAL_8250_EXTENDED is not set
516
517#
518# Non-8250 serial port support
519#
520CONFIG_SERIAL_SAMSUNG=y
521CONFIG_SERIAL_SAMSUNG_UARTS=4
522# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
523CONFIG_SERIAL_SAMSUNG_CONSOLE=y
524CONFIG_SERIAL_S5P6440=y
525CONFIG_SERIAL_CORE=y
526CONFIG_SERIAL_CORE_CONSOLE=y
527CONFIG_UNIX98_PTYS=y
528# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
529CONFIG_LEGACY_PTYS=y
530CONFIG_LEGACY_PTY_COUNT=256
531# CONFIG_IPMI_HANDLER is not set
532CONFIG_HW_RANDOM=y
533# CONFIG_HW_RANDOM_TIMERIOMEM is not set
534# CONFIG_R3964 is not set
535# CONFIG_RAW_DRIVER is not set
536# CONFIG_TCG_TPM is not set
537# CONFIG_I2C is not set
538# CONFIG_SPI is not set
539
540#
541# PPS support
542#
543# CONFIG_PPS is not set
544CONFIG_ARCH_REQUIRE_GPIOLIB=y
545CONFIG_GPIOLIB=y
546# CONFIG_DEBUG_GPIO is not set
547# CONFIG_GPIO_SYSFS is not set
548
549#
550# Memory mapped GPIO expanders:
551#
552
553#
554# I2C GPIO expanders:
555#
556
557#
558# PCI GPIO expanders:
559#
560
561#
562# SPI GPIO expanders:
563#
564
565#
566# AC97 GPIO expanders:
567#
568# CONFIG_W1 is not set
569# CONFIG_POWER_SUPPLY is not set
570# CONFIG_HWMON is not set
571# CONFIG_THERMAL is not set
572# CONFIG_WATCHDOG is not set
573CONFIG_SSB_POSSIBLE=y
574
575#
576# Sonics Silicon Backplane
577#
578# CONFIG_SSB is not set
579
580#
581# Multifunction device drivers
582#
583# CONFIG_MFD_CORE is not set
584# CONFIG_MFD_SM501 is not set
585# CONFIG_MFD_ASIC3 is not set
586# CONFIG_HTC_EGPIO is not set
587# CONFIG_HTC_PASIC3 is not set
588# CONFIG_MFD_TMIO is not set
589# CONFIG_MFD_T7L66XB is not set
590# CONFIG_MFD_TC6387XB is not set
591# CONFIG_MFD_TC6393XB is not set
592# CONFIG_REGULATOR is not set
593# CONFIG_MEDIA_SUPPORT is not set
594
595#
596# Graphics support
597#
598# CONFIG_VGASTATE is not set
599# CONFIG_VIDEO_OUTPUT_CONTROL is not set
600# CONFIG_FB is not set
601# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
602
603#
604# Display device support
605#
606CONFIG_DISPLAY_SUPPORT=y
607
608#
609# Display hardware drivers
610#
611
612#
613# Console display driver support
614#
615# CONFIG_VGA_CONSOLE is not set
616CONFIG_DUMMY_CONSOLE=y
617# CONFIG_SOUND is not set
618# CONFIG_HID_SUPPORT is not set
619# CONFIG_USB_SUPPORT is not set
620# CONFIG_MMC is not set
621# CONFIG_MEMSTICK is not set
622# CONFIG_NEW_LEDS is not set
623# CONFIG_ACCESSIBILITY is not set
624CONFIG_RTC_LIB=y
625# CONFIG_RTC_CLASS is not set
626# CONFIG_DMADEVICES is not set
627# CONFIG_AUXDISPLAY is not set
628# CONFIG_UIO is not set
629
630#
631# TI VLYNQ
632#
633# CONFIG_STAGING is not set
634
635#
636# File systems
637#
638CONFIG_EXT2_FS=y
639# CONFIG_EXT2_FS_XATTR is not set
640# CONFIG_EXT2_FS_XIP is not set
641CONFIG_EXT3_FS=y
642# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
643CONFIG_EXT3_FS_XATTR=y
644CONFIG_EXT3_FS_POSIX_ACL=y
645CONFIG_EXT3_FS_SECURITY=y
646# CONFIG_EXT4_FS is not set
647CONFIG_JBD=y
648CONFIG_FS_MBCACHE=y
649# CONFIG_REISERFS_FS is not set
650# CONFIG_JFS_FS is not set
651CONFIG_FS_POSIX_ACL=y
652# CONFIG_XFS_FS is not set
653# CONFIG_GFS2_FS is not set
654# CONFIG_BTRFS_FS is not set
655# CONFIG_NILFS2_FS is not set
656CONFIG_FILE_LOCKING=y
657CONFIG_FSNOTIFY=y
658CONFIG_DNOTIFY=y
659CONFIG_INOTIFY=y
660CONFIG_INOTIFY_USER=y
661# CONFIG_QUOTA is not set
662# CONFIG_AUTOFS_FS is not set
663# CONFIG_AUTOFS4_FS is not set
664# CONFIG_FUSE_FS is not set
665CONFIG_GENERIC_ACL=y
666
667#
668# Caches
669#
670# CONFIG_FSCACHE is not set
671
672#
673# CD-ROM/DVD Filesystems
674#
675# CONFIG_ISO9660_FS is not set
676# CONFIG_UDF_FS is not set
677
678#
679# DOS/FAT/NT Filesystems
680#
681CONFIG_FAT_FS=y
682CONFIG_MSDOS_FS=y
683CONFIG_VFAT_FS=y
684CONFIG_FAT_DEFAULT_CODEPAGE=437
685CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
686# CONFIG_NTFS_FS is not set
687
688#
689# Pseudo filesystems
690#
691CONFIG_PROC_FS=y
692CONFIG_PROC_SYSCTL=y
693CONFIG_PROC_PAGE_MONITOR=y
694CONFIG_SYSFS=y
695CONFIG_TMPFS=y
696CONFIG_TMPFS_POSIX_ACL=y
697# CONFIG_HUGETLB_PAGE is not set
698# CONFIG_CONFIGFS_FS is not set
699CONFIG_MISC_FILESYSTEMS=y
700# CONFIG_ADFS_FS is not set
701# CONFIG_AFFS_FS is not set
702# CONFIG_HFS_FS is not set
703# CONFIG_HFSPLUS_FS is not set
704# CONFIG_BEFS_FS is not set
705# CONFIG_BFS_FS is not set
706# CONFIG_EFS_FS is not set
707CONFIG_CRAMFS=y
708# CONFIG_SQUASHFS is not set
709# CONFIG_VXFS_FS is not set
710# CONFIG_MINIX_FS is not set
711# CONFIG_OMFS_FS is not set
712# CONFIG_HPFS_FS is not set
713# CONFIG_QNX4FS_FS is not set
714CONFIG_ROMFS_FS=y
715CONFIG_ROMFS_BACKED_BY_BLOCK=y
716# CONFIG_ROMFS_BACKED_BY_MTD is not set
717# CONFIG_ROMFS_BACKED_BY_BOTH is not set
718CONFIG_ROMFS_ON_BLOCK=y
719# CONFIG_SYSV_FS is not set
720# CONFIG_UFS_FS is not set
721
722#
723# Partition Types
724#
725# CONFIG_PARTITION_ADVANCED is not set
726CONFIG_MSDOS_PARTITION=y
727CONFIG_NLS=y
728CONFIG_NLS_DEFAULT="iso8859-1"
729CONFIG_NLS_CODEPAGE_437=y
730# CONFIG_NLS_CODEPAGE_737 is not set
731# CONFIG_NLS_CODEPAGE_775 is not set
732# CONFIG_NLS_CODEPAGE_850 is not set
733# CONFIG_NLS_CODEPAGE_852 is not set
734# CONFIG_NLS_CODEPAGE_855 is not set
735# CONFIG_NLS_CODEPAGE_857 is not set
736# CONFIG_NLS_CODEPAGE_860 is not set
737# CONFIG_NLS_CODEPAGE_861 is not set
738# CONFIG_NLS_CODEPAGE_862 is not set
739# CONFIG_NLS_CODEPAGE_863 is not set
740# CONFIG_NLS_CODEPAGE_864 is not set
741# CONFIG_NLS_CODEPAGE_865 is not set
742# CONFIG_NLS_CODEPAGE_866 is not set
743# CONFIG_NLS_CODEPAGE_869 is not set
744# CONFIG_NLS_CODEPAGE_936 is not set
745# CONFIG_NLS_CODEPAGE_950 is not set
746# CONFIG_NLS_CODEPAGE_932 is not set
747# CONFIG_NLS_CODEPAGE_949 is not set
748# CONFIG_NLS_CODEPAGE_874 is not set
749# CONFIG_NLS_ISO8859_8 is not set
750# CONFIG_NLS_CODEPAGE_1250 is not set
751# CONFIG_NLS_CODEPAGE_1251 is not set
752CONFIG_NLS_ASCII=y
753CONFIG_NLS_ISO8859_1=y
754# CONFIG_NLS_ISO8859_2 is not set
755# CONFIG_NLS_ISO8859_3 is not set
756# CONFIG_NLS_ISO8859_4 is not set
757# CONFIG_NLS_ISO8859_5 is not set
758# CONFIG_NLS_ISO8859_6 is not set
759# CONFIG_NLS_ISO8859_7 is not set
760# CONFIG_NLS_ISO8859_9 is not set
761# CONFIG_NLS_ISO8859_13 is not set
762# CONFIG_NLS_ISO8859_14 is not set
763# CONFIG_NLS_ISO8859_15 is not set
764# CONFIG_NLS_KOI8_R is not set
765# CONFIG_NLS_KOI8_U is not set
766# CONFIG_NLS_UTF8 is not set
767
768#
769# Kernel hacking
770#
771# CONFIG_PRINTK_TIME is not set
772CONFIG_ENABLE_WARN_DEPRECATED=y
773CONFIG_ENABLE_MUST_CHECK=y
774CONFIG_FRAME_WARN=1024
775CONFIG_MAGIC_SYSRQ=y
776# CONFIG_STRIP_ASM_SYMS is not set
777# CONFIG_UNUSED_SYMBOLS is not set
778# CONFIG_DEBUG_FS is not set
779# CONFIG_HEADERS_CHECK is not set
780CONFIG_DEBUG_KERNEL=y
781# CONFIG_DEBUG_SHIRQ is not set
782CONFIG_DETECT_SOFTLOCKUP=y
783# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
784CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
785CONFIG_DETECT_HUNG_TASK=y
786# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
787CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
788CONFIG_SCHED_DEBUG=y
789# CONFIG_SCHEDSTATS is not set
790# CONFIG_TIMER_STATS is not set
791# CONFIG_DEBUG_OBJECTS is not set
792# CONFIG_SLUB_DEBUG_ON is not set
793# CONFIG_SLUB_STATS is not set
794# CONFIG_DEBUG_KMEMLEAK is not set
795CONFIG_DEBUG_RT_MUTEXES=y
796CONFIG_DEBUG_PI_LIST=y
797# CONFIG_RT_MUTEX_TESTER is not set
798CONFIG_DEBUG_SPINLOCK=y
799CONFIG_DEBUG_MUTEXES=y
800# CONFIG_DEBUG_LOCK_ALLOC is not set
801# CONFIG_PROVE_LOCKING is not set
802# CONFIG_LOCK_STAT is not set
803CONFIG_DEBUG_SPINLOCK_SLEEP=y
804# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
805# CONFIG_DEBUG_KOBJECT is not set
806CONFIG_DEBUG_BUGVERBOSE=y
807CONFIG_DEBUG_INFO=y
808# CONFIG_DEBUG_VM is not set
809# CONFIG_DEBUG_WRITECOUNT is not set
810CONFIG_DEBUG_MEMORY_INIT=y
811# CONFIG_DEBUG_LIST is not set
812# CONFIG_DEBUG_SG is not set
813# CONFIG_DEBUG_NOTIFIERS is not set
814# CONFIG_DEBUG_CREDENTIALS is not set
815# CONFIG_BOOT_PRINTK_DELAY is not set
816# CONFIG_RCU_TORTURE_TEST is not set
817# CONFIG_RCU_CPU_STALL_DETECTOR is not set
818# CONFIG_BACKTRACE_SELF_TEST is not set
819# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
820# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
821# CONFIG_FAULT_INJECTION is not set
822# CONFIG_LATENCYTOP is not set
823CONFIG_SYSCTL_SYSCALL_CHECK=y
824# CONFIG_PAGE_POISONING is not set
825CONFIG_HAVE_FUNCTION_TRACER=y
826CONFIG_TRACING_SUPPORT=y
827CONFIG_FTRACE=y
828# CONFIG_FUNCTION_TRACER is not set
829# CONFIG_SCHED_TRACER is not set
830# CONFIG_ENABLE_DEFAULT_TRACERS is not set
831# CONFIG_BOOT_TRACER is not set
832CONFIG_BRANCH_PROFILE_NONE=y
833# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
834# CONFIG_PROFILE_ALL_BRANCHES is not set
835# CONFIG_STACK_TRACER is not set
836# CONFIG_KMEMTRACE is not set
837# CONFIG_WORKQUEUE_TRACER is not set
838# CONFIG_BLK_DEV_IO_TRACE is not set
839# CONFIG_SAMPLES is not set
840CONFIG_HAVE_ARCH_KGDB=y
841# CONFIG_KGDB is not set
842CONFIG_ARM_UNWIND=y
843CONFIG_DEBUG_USER=y
844CONFIG_DEBUG_ERRORS=y
845# CONFIG_DEBUG_STACK_USAGE is not set
846CONFIG_DEBUG_LL=y
847# CONFIG_EARLY_PRINTK is not set
848# CONFIG_DEBUG_ICEDCC is not set
849# CONFIG_OC_ETM is not set
850CONFIG_DEBUG_S3C_UART=1
851
852#
853# Security options
854#
855# CONFIG_KEYS is not set
856# CONFIG_SECURITY is not set
857# CONFIG_SECURITYFS is not set
858# CONFIG_DEFAULT_SECURITY_SELINUX is not set
859# CONFIG_DEFAULT_SECURITY_SMACK is not set
860# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
861CONFIG_DEFAULT_SECURITY_DAC=y
862CONFIG_DEFAULT_SECURITY=""
863CONFIG_CRYPTO=y
864
865#
866# Crypto core or helper
867#
868# CONFIG_CRYPTO_MANAGER is not set
869# CONFIG_CRYPTO_MANAGER2 is not set
870# CONFIG_CRYPTO_GF128MUL is not set
871# CONFIG_CRYPTO_NULL is not set
872# CONFIG_CRYPTO_CRYPTD is not set
873# CONFIG_CRYPTO_AUTHENC is not set
874# CONFIG_CRYPTO_TEST is not set
875
876#
877# Authenticated Encryption with Associated Data
878#
879# CONFIG_CRYPTO_CCM is not set
880# CONFIG_CRYPTO_GCM is not set
881# CONFIG_CRYPTO_SEQIV is not set
882
883#
884# Block modes
885#
886# CONFIG_CRYPTO_CBC is not set
887# CONFIG_CRYPTO_CTR is not set
888# CONFIG_CRYPTO_CTS is not set
889# CONFIG_CRYPTO_ECB is not set
890# CONFIG_CRYPTO_LRW is not set
891# CONFIG_CRYPTO_PCBC is not set
892# CONFIG_CRYPTO_XTS is not set
893
894#
895# Hash modes
896#
897# CONFIG_CRYPTO_HMAC is not set
898# CONFIG_CRYPTO_XCBC is not set
899# CONFIG_CRYPTO_VMAC is not set
900
901#
902# Digest
903#
904# CONFIG_CRYPTO_CRC32C is not set
905# CONFIG_CRYPTO_GHASH is not set
906# CONFIG_CRYPTO_MD4 is not set
907# CONFIG_CRYPTO_MD5 is not set
908# CONFIG_CRYPTO_MICHAEL_MIC is not set
909# CONFIG_CRYPTO_RMD128 is not set
910# CONFIG_CRYPTO_RMD160 is not set
911# CONFIG_CRYPTO_RMD256 is not set
912# CONFIG_CRYPTO_RMD320 is not set
913# CONFIG_CRYPTO_SHA1 is not set
914# CONFIG_CRYPTO_SHA256 is not set
915# CONFIG_CRYPTO_SHA512 is not set
916# CONFIG_CRYPTO_TGR192 is not set
917# CONFIG_CRYPTO_WP512 is not set
918
919#
920# Ciphers
921#
922# CONFIG_CRYPTO_AES is not set
923# CONFIG_CRYPTO_ANUBIS is not set
924# CONFIG_CRYPTO_ARC4 is not set
925# CONFIG_CRYPTO_BLOWFISH is not set
926# CONFIG_CRYPTO_CAMELLIA is not set
927# CONFIG_CRYPTO_CAST5 is not set
928# CONFIG_CRYPTO_CAST6 is not set
929# CONFIG_CRYPTO_DES is not set
930# CONFIG_CRYPTO_FCRYPT is not set
931# CONFIG_CRYPTO_KHAZAD is not set
932# CONFIG_CRYPTO_SALSA20 is not set
933# CONFIG_CRYPTO_SEED is not set
934# CONFIG_CRYPTO_SERPENT is not set
935# CONFIG_CRYPTO_TEA is not set
936# CONFIG_CRYPTO_TWOFISH is not set
937
938#
939# Compression
940#
941# CONFIG_CRYPTO_DEFLATE is not set
942# CONFIG_CRYPTO_ZLIB is not set
943# CONFIG_CRYPTO_LZO is not set
944
945#
946# Random Number Generation
947#
948# CONFIG_CRYPTO_ANSI_CPRNG is not set
949CONFIG_CRYPTO_HW=y
950# CONFIG_BINARY_PRINTF is not set
951
952#
953# Library routines
954#
955CONFIG_BITREVERSE=y
956CONFIG_GENERIC_FIND_LAST_BIT=y
957CONFIG_CRC_CCITT=y
958# CONFIG_CRC16 is not set
959# CONFIG_CRC_T10DIF is not set
960# CONFIG_CRC_ITU_T is not set
961CONFIG_CRC32=y
962# CONFIG_CRC7 is not set
963# CONFIG_LIBCRC32C is not set
964CONFIG_ZLIB_INFLATE=y
965CONFIG_DECOMPRESS_GZIP=y
966CONFIG_DECOMPRESS_BZIP2=y
967CONFIG_DECOMPRESS_LZMA=y
968CONFIG_HAS_IOMEM=y
969CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
new file mode 100644
index 000000000000..74e20bfc0487
--- /dev/null
+++ b/arch/arm/configs/s5p6442_defconfig
@@ -0,0 +1,883 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc4
4# Mon Jan 25 08:50:28 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33CONFIG_HAVE_KERNEL_GZIP=y
34CONFIG_HAVE_KERNEL_LZO=y
35CONFIG_KERNEL_GZIP=y
36# CONFIG_KERNEL_BZIP2 is not set
37# CONFIG_KERNEL_LZMA is not set
38# CONFIG_KERNEL_LZO is not set
39CONFIG_SWAP=y
40# CONFIG_SYSVIPC is not set
41# CONFIG_BSD_PROCESS_ACCT is not set
42
43#
44# RCU Subsystem
45#
46CONFIG_TREE_RCU=y
47# CONFIG_TREE_PREEMPT_RCU is not set
48# CONFIG_TINY_RCU is not set
49# CONFIG_RCU_TRACE is not set
50CONFIG_RCU_FANOUT=32
51# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_IKCONFIG is not set
54CONFIG_LOG_BUF_SHIFT=17
55# CONFIG_GROUP_SCHED is not set
56# CONFIG_CGROUPS is not set
57CONFIG_SYSFS_DEPRECATED=y
58CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_RELAY is not set
60CONFIG_NAMESPACES=y
61# CONFIG_UTS_NS is not set
62# CONFIG_USER_NS is not set
63# CONFIG_PID_NS is not set
64CONFIG_BLK_DEV_INITRD=y
65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67CONFIG_RD_BZIP2=y
68CONFIG_RD_LZMA=y
69CONFIG_RD_LZO=y
70CONFIG_CC_OPTIMIZE_FOR_SIZE=y
71CONFIG_SYSCTL=y
72CONFIG_ANON_INODES=y
73# CONFIG_EMBEDDED is not set
74CONFIG_UID16=y
75CONFIG_SYSCTL_SYSCALL=y
76CONFIG_KALLSYMS=y
77CONFIG_KALLSYMS_ALL=y
78# CONFIG_KALLSYMS_EXTRA_PASS is not set
79CONFIG_HOTPLUG=y
80CONFIG_PRINTK=y
81CONFIG_BUG=y
82CONFIG_ELF_CORE=y
83CONFIG_BASE_FULL=y
84CONFIG_FUTEX=y
85CONFIG_EPOLL=y
86CONFIG_SIGNALFD=y
87CONFIG_TIMERFD=y
88CONFIG_EVENTFD=y
89CONFIG_SHMEM=y
90CONFIG_AIO=y
91
92#
93# Kernel Performance Events And Counters
94#
95CONFIG_VM_EVENT_COUNTERS=y
96CONFIG_SLUB_DEBUG=y
97CONFIG_COMPAT_BRK=y
98# CONFIG_SLAB is not set
99CONFIG_SLUB=y
100# CONFIG_SLOB is not set
101# CONFIG_PROFILING is not set
102CONFIG_HAVE_OPROFILE=y
103# CONFIG_KPROBES is not set
104CONFIG_HAVE_KPROBES=y
105CONFIG_HAVE_KRETPROBES=y
106CONFIG_HAVE_CLK=y
107
108#
109# GCOV-based kernel profiling
110#
111# CONFIG_SLOW_WORK is not set
112CONFIG_HAVE_GENERIC_DMA_COHERENT=y
113CONFIG_SLABINFO=y
114CONFIG_RT_MUTEXES=y
115CONFIG_BASE_SMALL=0
116CONFIG_MODULES=y
117# CONFIG_MODULE_FORCE_LOAD is not set
118CONFIG_MODULE_UNLOAD=y
119# CONFIG_MODULE_FORCE_UNLOAD is not set
120# CONFIG_MODVERSIONS is not set
121# CONFIG_MODULE_SRCVERSION_ALL is not set
122CONFIG_BLOCK=y
123CONFIG_LBDAF=y
124# CONFIG_BLK_DEV_BSG is not set
125# CONFIG_BLK_DEV_INTEGRITY is not set
126
127#
128# IO Schedulers
129#
130CONFIG_IOSCHED_NOOP=y
131CONFIG_IOSCHED_DEADLINE=y
132CONFIG_IOSCHED_CFQ=y
133# CONFIG_DEFAULT_DEADLINE is not set
134CONFIG_DEFAULT_CFQ=y
135# CONFIG_DEFAULT_NOOP is not set
136CONFIG_DEFAULT_IOSCHED="cfq"
137# CONFIG_INLINE_SPIN_TRYLOCK is not set
138# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
139# CONFIG_INLINE_SPIN_LOCK is not set
140# CONFIG_INLINE_SPIN_LOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
142# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
143# CONFIG_INLINE_SPIN_UNLOCK is not set
144# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
145# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
146# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
147# CONFIG_INLINE_READ_TRYLOCK is not set
148# CONFIG_INLINE_READ_LOCK is not set
149# CONFIG_INLINE_READ_LOCK_BH is not set
150# CONFIG_INLINE_READ_LOCK_IRQ is not set
151# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
152# CONFIG_INLINE_READ_UNLOCK is not set
153# CONFIG_INLINE_READ_UNLOCK_BH is not set
154# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
155# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
156# CONFIG_INLINE_WRITE_TRYLOCK is not set
157# CONFIG_INLINE_WRITE_LOCK is not set
158# CONFIG_INLINE_WRITE_LOCK_BH is not set
159# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
160# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
161# CONFIG_INLINE_WRITE_UNLOCK is not set
162# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
163# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
164# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
165# CONFIG_MUTEX_SPIN_ON_OWNER is not set
166# CONFIG_FREEZER is not set
167
168#
169# System Type
170#
171CONFIG_MMU=y
172# CONFIG_ARCH_AAEC2000 is not set
173# CONFIG_ARCH_INTEGRATOR is not set
174# CONFIG_ARCH_REALVIEW is not set
175# CONFIG_ARCH_VERSATILE is not set
176# CONFIG_ARCH_AT91 is not set
177# CONFIG_ARCH_CLPS711X is not set
178# CONFIG_ARCH_GEMINI is not set
179# CONFIG_ARCH_EBSA110 is not set
180# CONFIG_ARCH_EP93XX is not set
181# CONFIG_ARCH_FOOTBRIDGE is not set
182# CONFIG_ARCH_MXC is not set
183# CONFIG_ARCH_STMP3XXX is not set
184# CONFIG_ARCH_NETX is not set
185# CONFIG_ARCH_H720X is not set
186# CONFIG_ARCH_NOMADIK is not set
187# CONFIG_ARCH_IOP13XX is not set
188# CONFIG_ARCH_IOP32X is not set
189# CONFIG_ARCH_IOP33X is not set
190# CONFIG_ARCH_IXP23XX is not set
191# CONFIG_ARCH_IXP2000 is not set
192# CONFIG_ARCH_IXP4XX is not set
193# CONFIG_ARCH_L7200 is not set
194# CONFIG_ARCH_DOVE is not set
195# CONFIG_ARCH_KIRKWOOD is not set
196# CONFIG_ARCH_LOKI is not set
197# CONFIG_ARCH_MV78XX0 is not set
198# CONFIG_ARCH_ORION5X is not set
199# CONFIG_ARCH_MMP is not set
200# CONFIG_ARCH_KS8695 is not set
201# CONFIG_ARCH_NS9XXX is not set
202# CONFIG_ARCH_W90X900 is not set
203# CONFIG_ARCH_PNX4008 is not set
204# CONFIG_ARCH_PXA is not set
205# CONFIG_ARCH_MSM is not set
206# CONFIG_ARCH_RPC is not set
207# CONFIG_ARCH_SA1100 is not set
208# CONFIG_ARCH_S3C2410 is not set
209# CONFIG_ARCH_S3C64XX is not set
210# CONFIG_ARCH_S5P6440 is not set
211CONFIG_ARCH_S5P6442=y
212# CONFIG_ARCH_S5PC1XX is not set
213# CONFIG_ARCH_SHARK is not set
214# CONFIG_ARCH_LH7A40X is not set
215# CONFIG_ARCH_U300 is not set
216# CONFIG_ARCH_DAVINCI is not set
217# CONFIG_ARCH_OMAP is not set
218# CONFIG_ARCH_BCMRING is not set
219# CONFIG_ARCH_U8500 is not set
220CONFIG_PLAT_SAMSUNG=y
221CONFIG_SAMSUNG_CLKSRC=y
222CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
223CONFIG_SAMSUNG_IRQ_UART=y
224CONFIG_SAMSUNG_GPIOLIB_4BIT=y
225CONFIG_S3C_GPIO_CFG_S3C24XX=y
226CONFIG_S3C_GPIO_CFG_S3C64XX=y
227CONFIG_S3C_GPIO_PULL_UPDOWN=y
228CONFIG_SAMSUNG_GPIO_EXTRA=0
229# CONFIG_S3C_ADC is not set
230
231#
232# Power management
233#
234CONFIG_PLAT_S3C=y
235
236#
237# Boot options
238#
239# CONFIG_S3C_BOOT_ERROR_RESET is not set
240CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
241CONFIG_S3C_LOWLEVEL_UART_PORT=1
242CONFIG_S3C_GPIO_SPACE=0
243CONFIG_S3C_GPIO_TRACK=y
244CONFIG_PLAT_S5P=y
245CONFIG_CPU_S5P6442=y
246CONFIG_MACH_SMDK6442=y
247
248#
249# Processor Type
250#
251CONFIG_CPU_V6=y
252CONFIG_CPU_32v6K=y
253CONFIG_CPU_32v6=y
254CONFIG_CPU_ABRT_EV6=y
255CONFIG_CPU_PABRT_V6=y
256CONFIG_CPU_CACHE_V6=y
257CONFIG_CPU_CACHE_VIPT=y
258CONFIG_CPU_COPY_V6=y
259CONFIG_CPU_TLB_V6=y
260CONFIG_CPU_HAS_ASID=y
261CONFIG_CPU_CP15=y
262CONFIG_CPU_CP15_MMU=y
263
264#
265# Processor Features
266#
267CONFIG_ARM_THUMB=y
268# CONFIG_CPU_ICACHE_DISABLE is not set
269# CONFIG_CPU_DCACHE_DISABLE is not set
270# CONFIG_CPU_BPREDICT_DISABLE is not set
271CONFIG_ARM_L1_CACHE_SHIFT=5
272# CONFIG_ARM_ERRATA_411920 is not set
273CONFIG_ARM_VIC=y
274CONFIG_ARM_VIC_NR=2
275
276#
277# Bus support
278#
279# CONFIG_PCI_SYSCALL is not set
280# CONFIG_ARCH_SUPPORTS_MSI is not set
281# CONFIG_PCCARD is not set
282
283#
284# Kernel Features
285#
286CONFIG_VMSPLIT_3G=y
287# CONFIG_VMSPLIT_2G is not set
288# CONFIG_VMSPLIT_1G is not set
289CONFIG_PAGE_OFFSET=0xC0000000
290CONFIG_PREEMPT_NONE=y
291# CONFIG_PREEMPT_VOLUNTARY is not set
292# CONFIG_PREEMPT is not set
293CONFIG_HZ=200
294CONFIG_AEABI=y
295CONFIG_OABI_COMPAT=y
296# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
297# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
298# CONFIG_HIGHMEM is not set
299CONFIG_SELECT_MEMORY_MODEL=y
300CONFIG_FLATMEM_MANUAL=y
301# CONFIG_DISCONTIGMEM_MANUAL is not set
302# CONFIG_SPARSEMEM_MANUAL is not set
303CONFIG_FLATMEM=y
304CONFIG_FLAT_NODE_MEM_MAP=y
305CONFIG_PAGEFLAGS_EXTENDED=y
306CONFIG_SPLIT_PTLOCK_CPUS=999999
307# CONFIG_PHYS_ADDR_T_64BIT is not set
308CONFIG_ZONE_DMA_FLAG=0
309CONFIG_VIRT_TO_BUS=y
310# CONFIG_KSM is not set
311CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
312CONFIG_ALIGNMENT_TRAP=y
313# CONFIG_UACCESS_WITH_MEMCPY is not set
314
315#
316# Boot options
317#
318CONFIG_ZBOOT_ROM_TEXT=0
319CONFIG_ZBOOT_ROM_BSS=0
320CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
321# CONFIG_XIP_KERNEL is not set
322# CONFIG_KEXEC is not set
323
324#
325# CPU Power Management
326#
327# CONFIG_CPU_IDLE is not set
328
329#
330# Floating point emulation
331#
332
333#
334# At least one emulation must be selected
335#
336CONFIG_FPE_NWFPE=y
337# CONFIG_FPE_NWFPE_XP is not set
338# CONFIG_FPE_FASTFPE is not set
339# CONFIG_VFP is not set
340
341#
342# Userspace binary formats
343#
344CONFIG_BINFMT_ELF=y
345# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
346CONFIG_HAVE_AOUT=y
347# CONFIG_BINFMT_AOUT is not set
348# CONFIG_BINFMT_MISC is not set
349
350#
351# Power management options
352#
353# CONFIG_PM is not set
354CONFIG_ARCH_SUSPEND_POSSIBLE=y
355# CONFIG_NET is not set
356
357#
358# Device Drivers
359#
360
361#
362# Generic Driver Options
363#
364CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
365# CONFIG_DEVTMPFS is not set
366CONFIG_STANDALONE=y
367# CONFIG_PREVENT_FIRMWARE_BUILD is not set
368CONFIG_FW_LOADER=y
369CONFIG_FIRMWARE_IN_KERNEL=y
370CONFIG_EXTRA_FIRMWARE=""
371# CONFIG_DEBUG_DRIVER is not set
372# CONFIG_DEBUG_DEVRES is not set
373# CONFIG_SYS_HYPERVISOR is not set
374# CONFIG_MTD is not set
375# CONFIG_PARPORT is not set
376CONFIG_BLK_DEV=y
377# CONFIG_BLK_DEV_COW_COMMON is not set
378CONFIG_BLK_DEV_LOOP=y
379# CONFIG_BLK_DEV_CRYPTOLOOP is not set
380
381#
382# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
383#
384CONFIG_BLK_DEV_RAM=y
385CONFIG_BLK_DEV_RAM_COUNT=16
386CONFIG_BLK_DEV_RAM_SIZE=8192
387# CONFIG_BLK_DEV_XIP is not set
388# CONFIG_CDROM_PKTCDVD is not set
389# CONFIG_MG_DISK is not set
390# CONFIG_MISC_DEVICES is not set
391CONFIG_HAVE_IDE=y
392# CONFIG_IDE is not set
393
394#
395# SCSI device support
396#
397# CONFIG_RAID_ATTRS is not set
398CONFIG_SCSI=y
399CONFIG_SCSI_DMA=y
400# CONFIG_SCSI_TGT is not set
401# CONFIG_SCSI_NETLINK is not set
402CONFIG_SCSI_PROC_FS=y
403
404#
405# SCSI support type (disk, tape, CD-ROM)
406#
407CONFIG_BLK_DEV_SD=y
408# CONFIG_CHR_DEV_ST is not set
409# CONFIG_CHR_DEV_OSST is not set
410# CONFIG_BLK_DEV_SR is not set
411CONFIG_CHR_DEV_SG=y
412# CONFIG_CHR_DEV_SCH is not set
413# CONFIG_SCSI_MULTI_LUN is not set
414# CONFIG_SCSI_CONSTANTS is not set
415# CONFIG_SCSI_LOGGING is not set
416# CONFIG_SCSI_SCAN_ASYNC is not set
417CONFIG_SCSI_WAIT_SCAN=m
418
419#
420# SCSI Transports
421#
422# CONFIG_SCSI_SPI_ATTRS is not set
423# CONFIG_SCSI_FC_ATTRS is not set
424# CONFIG_SCSI_SAS_LIBSAS is not set
425# CONFIG_SCSI_SRP_ATTRS is not set
426CONFIG_SCSI_LOWLEVEL=y
427# CONFIG_LIBFC is not set
428# CONFIG_LIBFCOE is not set
429# CONFIG_SCSI_DEBUG is not set
430# CONFIG_SCSI_DH is not set
431# CONFIG_SCSI_OSD_INITIATOR is not set
432# CONFIG_ATA is not set
433# CONFIG_MD is not set
434# CONFIG_PHONE is not set
435
436#
437# Input device support
438#
439CONFIG_INPUT=y
440# CONFIG_INPUT_FF_MEMLESS is not set
441# CONFIG_INPUT_POLLDEV is not set
442# CONFIG_INPUT_SPARSEKMAP is not set
443
444#
445# Userland interfaces
446#
447CONFIG_INPUT_MOUSEDEV=y
448CONFIG_INPUT_MOUSEDEV_PSAUX=y
449CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
450CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
451# CONFIG_INPUT_JOYDEV is not set
452CONFIG_INPUT_EVDEV=y
453# CONFIG_INPUT_EVBUG is not set
454
455#
456# Input Device Drivers
457#
458# CONFIG_INPUT_KEYBOARD is not set
459# CONFIG_INPUT_MOUSE is not set
460# CONFIG_INPUT_JOYSTICK is not set
461# CONFIG_INPUT_TABLET is not set
462CONFIG_INPUT_TOUCHSCREEN=y
463# CONFIG_TOUCHSCREEN_AD7879 is not set
464# CONFIG_TOUCHSCREEN_DYNAPRO is not set
465# CONFIG_TOUCHSCREEN_FUJITSU is not set
466# CONFIG_TOUCHSCREEN_GUNZE is not set
467# CONFIG_TOUCHSCREEN_ELO is not set
468# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
469# CONFIG_TOUCHSCREEN_MTOUCH is not set
470# CONFIG_TOUCHSCREEN_INEXIO is not set
471# CONFIG_TOUCHSCREEN_MK712 is not set
472# CONFIG_TOUCHSCREEN_PENMOUNT is not set
473# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
474# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
475# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
476# CONFIG_TOUCHSCREEN_W90X900 is not set
477# CONFIG_INPUT_MISC is not set
478
479#
480# Hardware I/O ports
481#
482CONFIG_SERIO=y
483CONFIG_SERIO_SERPORT=y
484# CONFIG_SERIO_RAW is not set
485# CONFIG_SERIO_ALTERA_PS2 is not set
486# CONFIG_GAMEPORT is not set
487
488#
489# Character devices
490#
491CONFIG_VT=y
492CONFIG_CONSOLE_TRANSLATIONS=y
493CONFIG_VT_CONSOLE=y
494CONFIG_HW_CONSOLE=y
495# CONFIG_VT_HW_CONSOLE_BINDING is not set
496CONFIG_DEVKMEM=y
497# CONFIG_SERIAL_NONSTANDARD is not set
498
499#
500# Serial drivers
501#
502CONFIG_SERIAL_8250=y
503# CONFIG_SERIAL_8250_CONSOLE is not set
504CONFIG_SERIAL_8250_NR_UARTS=3
505CONFIG_SERIAL_8250_RUNTIME_UARTS=3
506# CONFIG_SERIAL_8250_EXTENDED is not set
507
508#
509# Non-8250 serial port support
510#
511CONFIG_SERIAL_SAMSUNG=y
512CONFIG_SERIAL_SAMSUNG_UARTS=3
513# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
514CONFIG_SERIAL_SAMSUNG_CONSOLE=y
515CONFIG_SERIAL_S5PV210=y
516CONFIG_SERIAL_CORE=y
517CONFIG_SERIAL_CORE_CONSOLE=y
518CONFIG_UNIX98_PTYS=y
519# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
520CONFIG_LEGACY_PTYS=y
521CONFIG_LEGACY_PTY_COUNT=256
522# CONFIG_IPMI_HANDLER is not set
523CONFIG_HW_RANDOM=y
524# CONFIG_HW_RANDOM_TIMERIOMEM is not set
525# CONFIG_R3964 is not set
526# CONFIG_RAW_DRIVER is not set
527# CONFIG_TCG_TPM is not set
528# CONFIG_I2C is not set
529# CONFIG_SPI is not set
530
531#
532# PPS support
533#
534# CONFIG_PPS is not set
535CONFIG_ARCH_REQUIRE_GPIOLIB=y
536CONFIG_GPIOLIB=y
537# CONFIG_DEBUG_GPIO is not set
538# CONFIG_GPIO_SYSFS is not set
539
540#
541# Memory mapped GPIO expanders:
542#
543
544#
545# I2C GPIO expanders:
546#
547
548#
549# PCI GPIO expanders:
550#
551
552#
553# SPI GPIO expanders:
554#
555
556#
557# AC97 GPIO expanders:
558#
559# CONFIG_W1 is not set
560# CONFIG_POWER_SUPPLY is not set
561# CONFIG_HWMON is not set
562# CONFIG_THERMAL is not set
563# CONFIG_WATCHDOG is not set
564CONFIG_SSB_POSSIBLE=y
565
566#
567# Sonics Silicon Backplane
568#
569# CONFIG_SSB is not set
570
571#
572# Multifunction device drivers
573#
574# CONFIG_MFD_CORE is not set
575# CONFIG_MFD_SM501 is not set
576# CONFIG_MFD_ASIC3 is not set
577# CONFIG_HTC_EGPIO is not set
578# CONFIG_HTC_PASIC3 is not set
579# CONFIG_MFD_TMIO is not set
580# CONFIG_MFD_T7L66XB is not set
581# CONFIG_MFD_TC6387XB is not set
582# CONFIG_MFD_TC6393XB is not set
583# CONFIG_REGULATOR is not set
584# CONFIG_MEDIA_SUPPORT is not set
585
586#
587# Graphics support
588#
589# CONFIG_VGASTATE is not set
590# CONFIG_VIDEO_OUTPUT_CONTROL is not set
591# CONFIG_FB is not set
592# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
593
594#
595# Display device support
596#
597# CONFIG_DISPLAY_SUPPORT is not set
598
599#
600# Console display driver support
601#
602# CONFIG_VGA_CONSOLE is not set
603CONFIG_DUMMY_CONSOLE=y
604# CONFIG_SOUND is not set
605# CONFIG_HID_SUPPORT is not set
606# CONFIG_USB_SUPPORT is not set
607# CONFIG_MMC is not set
608# CONFIG_MEMSTICK is not set
609# CONFIG_NEW_LEDS is not set
610# CONFIG_ACCESSIBILITY is not set
611CONFIG_RTC_LIB=y
612# CONFIG_RTC_CLASS is not set
613# CONFIG_DMADEVICES is not set
614# CONFIG_AUXDISPLAY is not set
615# CONFIG_UIO is not set
616
617#
618# TI VLYNQ
619#
620# CONFIG_STAGING is not set
621
622#
623# File systems
624#
625CONFIG_EXT2_FS=y
626# CONFIG_EXT2_FS_XATTR is not set
627# CONFIG_EXT2_FS_XIP is not set
628# CONFIG_EXT3_FS is not set
629# CONFIG_EXT4_FS is not set
630# CONFIG_REISERFS_FS is not set
631# CONFIG_JFS_FS is not set
632CONFIG_FS_POSIX_ACL=y
633# CONFIG_XFS_FS is not set
634# CONFIG_GFS2_FS is not set
635# CONFIG_BTRFS_FS is not set
636# CONFIG_NILFS2_FS is not set
637CONFIG_FILE_LOCKING=y
638CONFIG_FSNOTIFY=y
639CONFIG_DNOTIFY=y
640CONFIG_INOTIFY=y
641CONFIG_INOTIFY_USER=y
642# CONFIG_QUOTA is not set
643# CONFIG_AUTOFS_FS is not set
644# CONFIG_AUTOFS4_FS is not set
645# CONFIG_FUSE_FS is not set
646CONFIG_GENERIC_ACL=y
647
648#
649# Caches
650#
651# CONFIG_FSCACHE is not set
652
653#
654# CD-ROM/DVD Filesystems
655#
656# CONFIG_ISO9660_FS is not set
657# CONFIG_UDF_FS is not set
658
659#
660# DOS/FAT/NT Filesystems
661#
662CONFIG_FAT_FS=y
663CONFIG_MSDOS_FS=y
664CONFIG_VFAT_FS=y
665CONFIG_FAT_DEFAULT_CODEPAGE=437
666CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
667# CONFIG_NTFS_FS is not set
668
669#
670# Pseudo filesystems
671#
672CONFIG_PROC_FS=y
673CONFIG_PROC_SYSCTL=y
674CONFIG_PROC_PAGE_MONITOR=y
675CONFIG_SYSFS=y
676CONFIG_TMPFS=y
677CONFIG_TMPFS_POSIX_ACL=y
678# CONFIG_HUGETLB_PAGE is not set
679# CONFIG_CONFIGFS_FS is not set
680CONFIG_MISC_FILESYSTEMS=y
681# CONFIG_ADFS_FS is not set
682# CONFIG_AFFS_FS is not set
683# CONFIG_HFS_FS is not set
684# CONFIG_HFSPLUS_FS is not set
685# CONFIG_BEFS_FS is not set
686# CONFIG_BFS_FS is not set
687# CONFIG_EFS_FS is not set
688CONFIG_CRAMFS=y
689# CONFIG_SQUASHFS is not set
690# CONFIG_VXFS_FS is not set
691# CONFIG_MINIX_FS is not set
692# CONFIG_OMFS_FS is not set
693# CONFIG_HPFS_FS is not set
694# CONFIG_QNX4FS_FS is not set
695CONFIG_ROMFS_FS=y
696CONFIG_ROMFS_BACKED_BY_BLOCK=y
697# CONFIG_ROMFS_BACKED_BY_MTD is not set
698# CONFIG_ROMFS_BACKED_BY_BOTH is not set
699CONFIG_ROMFS_ON_BLOCK=y
700# CONFIG_SYSV_FS is not set
701# CONFIG_UFS_FS is not set
702
703#
704# Partition Types
705#
706CONFIG_PARTITION_ADVANCED=y
707# CONFIG_ACORN_PARTITION is not set
708# CONFIG_OSF_PARTITION is not set
709# CONFIG_AMIGA_PARTITION is not set
710# CONFIG_ATARI_PARTITION is not set
711# CONFIG_MAC_PARTITION is not set
712CONFIG_MSDOS_PARTITION=y
713CONFIG_BSD_DISKLABEL=y
714# CONFIG_MINIX_SUBPARTITION is not set
715CONFIG_SOLARIS_X86_PARTITION=y
716# CONFIG_UNIXWARE_DISKLABEL is not set
717# CONFIG_LDM_PARTITION is not set
718# CONFIG_SGI_PARTITION is not set
719# CONFIG_ULTRIX_PARTITION is not set
720# CONFIG_SUN_PARTITION is not set
721# CONFIG_KARMA_PARTITION is not set
722# CONFIG_EFI_PARTITION is not set
723# CONFIG_SYSV68_PARTITION is not set
724CONFIG_NLS=y
725CONFIG_NLS_DEFAULT="iso8859-1"
726CONFIG_NLS_CODEPAGE_437=y
727# CONFIG_NLS_CODEPAGE_737 is not set
728# CONFIG_NLS_CODEPAGE_775 is not set
729# CONFIG_NLS_CODEPAGE_850 is not set
730# CONFIG_NLS_CODEPAGE_852 is not set
731# CONFIG_NLS_CODEPAGE_855 is not set
732# CONFIG_NLS_CODEPAGE_857 is not set
733# CONFIG_NLS_CODEPAGE_860 is not set
734# CONFIG_NLS_CODEPAGE_861 is not set
735# CONFIG_NLS_CODEPAGE_862 is not set
736# CONFIG_NLS_CODEPAGE_863 is not set
737# CONFIG_NLS_CODEPAGE_864 is not set
738# CONFIG_NLS_CODEPAGE_865 is not set
739# CONFIG_NLS_CODEPAGE_866 is not set
740# CONFIG_NLS_CODEPAGE_869 is not set
741# CONFIG_NLS_CODEPAGE_936 is not set
742# CONFIG_NLS_CODEPAGE_950 is not set
743# CONFIG_NLS_CODEPAGE_932 is not set
744# CONFIG_NLS_CODEPAGE_949 is not set
745# CONFIG_NLS_CODEPAGE_874 is not set
746# CONFIG_NLS_ISO8859_8 is not set
747# CONFIG_NLS_CODEPAGE_1250 is not set
748# CONFIG_NLS_CODEPAGE_1251 is not set
749CONFIG_NLS_ASCII=y
750CONFIG_NLS_ISO8859_1=y
751# CONFIG_NLS_ISO8859_2 is not set
752# CONFIG_NLS_ISO8859_3 is not set
753# CONFIG_NLS_ISO8859_4 is not set
754# CONFIG_NLS_ISO8859_5 is not set
755# CONFIG_NLS_ISO8859_6 is not set
756# CONFIG_NLS_ISO8859_7 is not set
757# CONFIG_NLS_ISO8859_9 is not set
758# CONFIG_NLS_ISO8859_13 is not set
759# CONFIG_NLS_ISO8859_14 is not set
760# CONFIG_NLS_ISO8859_15 is not set
761# CONFIG_NLS_KOI8_R is not set
762# CONFIG_NLS_KOI8_U is not set
763# CONFIG_NLS_UTF8 is not set
764
765#
766# Kernel hacking
767#
768# CONFIG_PRINTK_TIME is not set
769CONFIG_ENABLE_WARN_DEPRECATED=y
770CONFIG_ENABLE_MUST_CHECK=y
771CONFIG_FRAME_WARN=1024
772CONFIG_MAGIC_SYSRQ=y
773# CONFIG_STRIP_ASM_SYMS is not set
774# CONFIG_UNUSED_SYMBOLS is not set
775# CONFIG_DEBUG_FS is not set
776# CONFIG_HEADERS_CHECK is not set
777CONFIG_DEBUG_KERNEL=y
778# CONFIG_DEBUG_SHIRQ is not set
779CONFIG_DETECT_SOFTLOCKUP=y
780# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
781CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
782CONFIG_DETECT_HUNG_TASK=y
783# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
784CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
785CONFIG_SCHED_DEBUG=y
786# CONFIG_SCHEDSTATS is not set
787# CONFIG_TIMER_STATS is not set
788# CONFIG_DEBUG_OBJECTS is not set
789# CONFIG_SLUB_DEBUG_ON is not set
790# CONFIG_SLUB_STATS is not set
791# CONFIG_DEBUG_KMEMLEAK is not set
792CONFIG_DEBUG_RT_MUTEXES=y
793CONFIG_DEBUG_PI_LIST=y
794# CONFIG_RT_MUTEX_TESTER is not set
795CONFIG_DEBUG_SPINLOCK=y
796CONFIG_DEBUG_MUTEXES=y
797# CONFIG_DEBUG_LOCK_ALLOC is not set
798# CONFIG_PROVE_LOCKING is not set
799# CONFIG_LOCK_STAT is not set
800CONFIG_DEBUG_SPINLOCK_SLEEP=y
801# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
802# CONFIG_DEBUG_KOBJECT is not set
803CONFIG_DEBUG_BUGVERBOSE=y
804CONFIG_DEBUG_INFO=y
805# CONFIG_DEBUG_VM is not set
806# CONFIG_DEBUG_WRITECOUNT is not set
807CONFIG_DEBUG_MEMORY_INIT=y
808# CONFIG_DEBUG_LIST is not set
809# CONFIG_DEBUG_SG is not set
810# CONFIG_DEBUG_NOTIFIERS is not set
811# CONFIG_DEBUG_CREDENTIALS is not set
812CONFIG_FRAME_POINTER=y
813# CONFIG_BOOT_PRINTK_DELAY is not set
814# CONFIG_RCU_TORTURE_TEST is not set
815# CONFIG_RCU_CPU_STALL_DETECTOR is not set
816# CONFIG_BACKTRACE_SELF_TEST is not set
817# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
818# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
819# CONFIG_FAULT_INJECTION is not set
820# CONFIG_LATENCYTOP is not set
821CONFIG_SYSCTL_SYSCALL_CHECK=y
822# CONFIG_PAGE_POISONING is not set
823CONFIG_HAVE_FUNCTION_TRACER=y
824CONFIG_TRACING_SUPPORT=y
825CONFIG_FTRACE=y
826# CONFIG_FUNCTION_TRACER is not set
827# CONFIG_SCHED_TRACER is not set
828# CONFIG_ENABLE_DEFAULT_TRACERS is not set
829# CONFIG_BOOT_TRACER is not set
830CONFIG_BRANCH_PROFILE_NONE=y
831# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
832# CONFIG_PROFILE_ALL_BRANCHES is not set
833# CONFIG_STACK_TRACER is not set
834# CONFIG_KMEMTRACE is not set
835# CONFIG_WORKQUEUE_TRACER is not set
836# CONFIG_BLK_DEV_IO_TRACE is not set
837# CONFIG_SAMPLES is not set
838CONFIG_HAVE_ARCH_KGDB=y
839# CONFIG_KGDB is not set
840# CONFIG_ARM_UNWIND is not set
841CONFIG_DEBUG_USER=y
842CONFIG_DEBUG_ERRORS=y
843# CONFIG_DEBUG_STACK_USAGE is not set
844CONFIG_DEBUG_LL=y
845# CONFIG_EARLY_PRINTK is not set
846# CONFIG_DEBUG_ICEDCC is not set
847# CONFIG_OC_ETM is not set
848CONFIG_DEBUG_S3C_UART=1
849
850#
851# Security options
852#
853# CONFIG_KEYS is not set
854# CONFIG_SECURITY is not set
855# CONFIG_SECURITYFS is not set
856# CONFIG_DEFAULT_SECURITY_SELINUX is not set
857# CONFIG_DEFAULT_SECURITY_SMACK is not set
858# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
859CONFIG_DEFAULT_SECURITY_DAC=y
860CONFIG_DEFAULT_SECURITY=""
861# CONFIG_CRYPTO is not set
862# CONFIG_BINARY_PRINTF is not set
863
864#
865# Library routines
866#
867CONFIG_BITREVERSE=y
868CONFIG_GENERIC_FIND_LAST_BIT=y
869CONFIG_CRC_CCITT=y
870# CONFIG_CRC16 is not set
871# CONFIG_CRC_T10DIF is not set
872# CONFIG_CRC_ITU_T is not set
873CONFIG_CRC32=y
874# CONFIG_CRC7 is not set
875# CONFIG_LIBCRC32C is not set
876CONFIG_ZLIB_INFLATE=y
877CONFIG_LZO_DECOMPRESS=y
878CONFIG_DECOMPRESS_GZIP=y
879CONFIG_DECOMPRESS_BZIP2=y
880CONFIG_DECOMPRESS_LZMA=y
881CONFIG_DECOMPRESS_LZO=y
882CONFIG_HAS_IOMEM=y
883CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
new file mode 100644
index 000000000000..6ea636131ac8
--- /dev/null
+++ b/arch/arm/configs/s5pc110_defconfig
@@ -0,0 +1,894 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc4
4# Wed Feb 24 15:36:54 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_ARM_L1_CACHE_SHIFT_6=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
41CONFIG_SWAP=y
42# CONFIG_SYSVIPC is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_TREE_RCU=y
49# CONFIG_TREE_PREEMPT_RCU is not set
50# CONFIG_TINY_RCU is not set
51# CONFIG_RCU_TRACE is not set
52CONFIG_RCU_FANOUT=32
53# CONFIG_RCU_FANOUT_EXACT is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_IKCONFIG is not set
56CONFIG_LOG_BUF_SHIFT=17
57# CONFIG_GROUP_SCHED is not set
58# CONFIG_CGROUPS is not set
59CONFIG_SYSFS_DEPRECATED=y
60CONFIG_SYSFS_DEPRECATED_V2=y
61# CONFIG_RELAY is not set
62CONFIG_NAMESPACES=y
63# CONFIG_UTS_NS is not set
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66CONFIG_BLK_DEV_INITRD=y
67CONFIG_INITRAMFS_SOURCE=""
68CONFIG_RD_GZIP=y
69CONFIG_RD_BZIP2=y
70CONFIG_RD_LZMA=y
71CONFIG_RD_LZO=y
72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
75# CONFIG_EMBEDDED is not set
76CONFIG_UID16=y
77CONFIG_SYSCTL_SYSCALL=y
78CONFIG_KALLSYMS=y
79CONFIG_KALLSYMS_ALL=y
80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81CONFIG_HOTPLUG=y
82CONFIG_PRINTK=y
83CONFIG_BUG=y
84CONFIG_ELF_CORE=y
85CONFIG_BASE_FULL=y
86CONFIG_FUTEX=y
87CONFIG_EPOLL=y
88CONFIG_SIGNALFD=y
89CONFIG_TIMERFD=y
90CONFIG_EVENTFD=y
91CONFIG_SHMEM=y
92CONFIG_AIO=y
93
94#
95# Kernel Performance Events And Counters
96#
97CONFIG_VM_EVENT_COUNTERS=y
98CONFIG_SLUB_DEBUG=y
99CONFIG_COMPAT_BRK=y
100# CONFIG_SLAB is not set
101CONFIG_SLUB=y
102# CONFIG_SLOB is not set
103# CONFIG_PROFILING is not set
104CONFIG_HAVE_OPROFILE=y
105# CONFIG_KPROBES is not set
106CONFIG_HAVE_KPROBES=y
107CONFIG_HAVE_KRETPROBES=y
108CONFIG_HAVE_CLK=y
109
110#
111# GCOV-based kernel profiling
112#
113# CONFIG_SLOW_WORK is not set
114CONFIG_HAVE_GENERIC_DMA_COHERENT=y
115CONFIG_SLABINFO=y
116CONFIG_RT_MUTEXES=y
117CONFIG_BASE_SMALL=0
118CONFIG_MODULES=y
119# CONFIG_MODULE_FORCE_LOAD is not set
120CONFIG_MODULE_UNLOAD=y
121# CONFIG_MODULE_FORCE_UNLOAD is not set
122# CONFIG_MODVERSIONS is not set
123# CONFIG_MODULE_SRCVERSION_ALL is not set
124CONFIG_BLOCK=y
125CONFIG_LBDAF=y
126# CONFIG_BLK_DEV_BSG is not set
127# CONFIG_BLK_DEV_INTEGRITY is not set
128
129#
130# IO Schedulers
131#
132CONFIG_IOSCHED_NOOP=y
133CONFIG_IOSCHED_DEADLINE=y
134CONFIG_IOSCHED_CFQ=y
135# CONFIG_DEFAULT_DEADLINE is not set
136CONFIG_DEFAULT_CFQ=y
137# CONFIG_DEFAULT_NOOP is not set
138CONFIG_DEFAULT_IOSCHED="cfq"
139# CONFIG_INLINE_SPIN_TRYLOCK is not set
140# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK is not set
142# CONFIG_INLINE_SPIN_LOCK_BH is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
144# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
145# CONFIG_INLINE_SPIN_UNLOCK is not set
146# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
149# CONFIG_INLINE_READ_TRYLOCK is not set
150# CONFIG_INLINE_READ_LOCK is not set
151# CONFIG_INLINE_READ_LOCK_BH is not set
152# CONFIG_INLINE_READ_LOCK_IRQ is not set
153# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
154# CONFIG_INLINE_READ_UNLOCK is not set
155# CONFIG_INLINE_READ_UNLOCK_BH is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
157# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
158# CONFIG_INLINE_WRITE_TRYLOCK is not set
159# CONFIG_INLINE_WRITE_LOCK is not set
160# CONFIG_INLINE_WRITE_LOCK_BH is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
162# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
163# CONFIG_INLINE_WRITE_UNLOCK is not set
164# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
167# CONFIG_MUTEX_SPIN_ON_OWNER is not set
168# CONFIG_FREEZER is not set
169
170#
171# System Type
172#
173CONFIG_MMU=y
174# CONFIG_ARCH_AAEC2000 is not set
175# CONFIG_ARCH_INTEGRATOR is not set
176# CONFIG_ARCH_REALVIEW is not set
177# CONFIG_ARCH_VERSATILE is not set
178# CONFIG_ARCH_AT91 is not set
179# CONFIG_ARCH_CLPS711X is not set
180# CONFIG_ARCH_GEMINI is not set
181# CONFIG_ARCH_EBSA110 is not set
182# CONFIG_ARCH_EP93XX is not set
183# CONFIG_ARCH_FOOTBRIDGE is not set
184# CONFIG_ARCH_MXC is not set
185# CONFIG_ARCH_STMP3XXX is not set
186# CONFIG_ARCH_NETX is not set
187# CONFIG_ARCH_H720X is not set
188# CONFIG_ARCH_NOMADIK is not set
189# CONFIG_ARCH_IOP13XX is not set
190# CONFIG_ARCH_IOP32X is not set
191# CONFIG_ARCH_IOP33X is not set
192# CONFIG_ARCH_IXP23XX is not set
193# CONFIG_ARCH_IXP2000 is not set
194# CONFIG_ARCH_IXP4XX is not set
195# CONFIG_ARCH_L7200 is not set
196# CONFIG_ARCH_DOVE is not set
197# CONFIG_ARCH_KIRKWOOD is not set
198# CONFIG_ARCH_LOKI is not set
199# CONFIG_ARCH_MV78XX0 is not set
200# CONFIG_ARCH_ORION5X is not set
201# CONFIG_ARCH_MMP is not set
202# CONFIG_ARCH_KS8695 is not set
203# CONFIG_ARCH_NS9XXX is not set
204# CONFIG_ARCH_W90X900 is not set
205# CONFIG_ARCH_PNX4008 is not set
206# CONFIG_ARCH_PXA is not set
207# CONFIG_ARCH_MSM is not set
208# CONFIG_ARCH_RPC is not set
209# CONFIG_ARCH_SA1100 is not set
210# CONFIG_ARCH_S3C2410 is not set
211# CONFIG_ARCH_S3C64XX is not set
212# CONFIG_ARCH_S5P6440 is not set
213# CONFIG_ARCH_S5P6442 is not set
214# CONFIG_ARCH_S5PC1XX is not set
215CONFIG_ARCH_S5PV210=y
216# CONFIG_ARCH_SHARK is not set
217# CONFIG_ARCH_LH7A40X is not set
218# CONFIG_ARCH_U300 is not set
219# CONFIG_ARCH_DAVINCI is not set
220# CONFIG_ARCH_OMAP is not set
221# CONFIG_ARCH_BCMRING is not set
222# CONFIG_ARCH_U8500 is not set
223CONFIG_PLAT_SAMSUNG=y
224
225#
226# Boot options
227#
228# CONFIG_S3C_BOOT_ERROR_RESET is not set
229CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
230CONFIG_S3C_LOWLEVEL_UART_PORT=1
231CONFIG_SAMSUNG_CLKSRC=y
232CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
233CONFIG_SAMSUNG_IRQ_UART=y
234CONFIG_SAMSUNG_GPIOLIB_4BIT=y
235CONFIG_S3C_GPIO_CFG_S3C24XX=y
236CONFIG_S3C_GPIO_CFG_S3C64XX=y
237CONFIG_S3C_GPIO_PULL_UPDOWN=y
238CONFIG_SAMSUNG_GPIO_EXTRA=0
239CONFIG_S3C_GPIO_SPACE=0
240CONFIG_S3C_GPIO_TRACK=y
241# CONFIG_S3C_ADC is not set
242
243#
244# Power management
245#
246CONFIG_PLAT_S5P=y
247CONFIG_CPU_S5PV210=y
248# CONFIG_MACH_SMDKV210 is not set
249CONFIG_MACH_SMDKC110=y
250
251#
252# Processor Type
253#
254CONFIG_CPU_32v6K=y
255CONFIG_CPU_V7=y
256CONFIG_CPU_32v7=y
257CONFIG_CPU_ABRT_EV7=y
258CONFIG_CPU_PABRT_V7=y
259CONFIG_CPU_CACHE_V7=y
260CONFIG_CPU_CACHE_VIPT=y
261CONFIG_CPU_COPY_V6=y
262CONFIG_CPU_TLB_V7=y
263CONFIG_CPU_HAS_ASID=y
264CONFIG_CPU_CP15=y
265CONFIG_CPU_CP15_MMU=y
266
267#
268# Processor Features
269#
270CONFIG_ARM_THUMB=y
271# CONFIG_ARM_THUMBEE is not set
272# CONFIG_CPU_ICACHE_DISABLE is not set
273# CONFIG_CPU_DCACHE_DISABLE is not set
274# CONFIG_CPU_BPREDICT_DISABLE is not set
275CONFIG_HAS_TLS_REG=y
276CONFIG_ARM_L1_CACHE_SHIFT=6
277# CONFIG_ARM_ERRATA_430973 is not set
278# CONFIG_ARM_ERRATA_458693 is not set
279# CONFIG_ARM_ERRATA_460075 is not set
280CONFIG_ARM_VIC=y
281CONFIG_ARM_VIC_NR=2
282
283#
284# Bus support
285#
286# CONFIG_PCI_SYSCALL is not set
287# CONFIG_ARCH_SUPPORTS_MSI is not set
288# CONFIG_PCCARD is not set
289
290#
291# Kernel Features
292#
293# CONFIG_VMSPLIT_3G is not set
294CONFIG_VMSPLIT_2G=y
295# CONFIG_VMSPLIT_1G is not set
296CONFIG_PAGE_OFFSET=0x80000000
297# CONFIG_PREEMPT_NONE is not set
298# CONFIG_PREEMPT_VOLUNTARY is not set
299CONFIG_PREEMPT=y
300CONFIG_HZ=200
301# CONFIG_THUMB2_KERNEL is not set
302CONFIG_AEABI=y
303CONFIG_OABI_COMPAT=y
304CONFIG_ARCH_SPARSEMEM_ENABLE=y
305CONFIG_ARCH_SPARSEMEM_DEFAULT=y
306# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
307# CONFIG_HIGHMEM is not set
308CONFIG_SELECT_MEMORY_MODEL=y
309# CONFIG_FLATMEM_MANUAL is not set
310# CONFIG_DISCONTIGMEM_MANUAL is not set
311CONFIG_SPARSEMEM_MANUAL=y
312CONFIG_SPARSEMEM=y
313CONFIG_HAVE_MEMORY_PRESENT=y
314CONFIG_SPARSEMEM_EXTREME=y
315CONFIG_SPLIT_PTLOCK_CPUS=999999
316# CONFIG_PHYS_ADDR_T_64BIT is not set
317CONFIG_ZONE_DMA_FLAG=0
318CONFIG_VIRT_TO_BUS=y
319# CONFIG_KSM is not set
320CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
321CONFIG_ALIGNMENT_TRAP=y
322# CONFIG_UACCESS_WITH_MEMCPY is not set
323
324#
325# Boot options
326#
327CONFIG_ZBOOT_ROM_TEXT=0
328CONFIG_ZBOOT_ROM_BSS=0
329CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
330# CONFIG_XIP_KERNEL is not set
331# CONFIG_KEXEC is not set
332
333#
334# CPU Power Management
335#
336# CONFIG_CPU_IDLE is not set
337
338#
339# Floating point emulation
340#
341
342#
343# At least one emulation must be selected
344#
345# CONFIG_FPE_NWFPE is not set
346# CONFIG_FPE_FASTFPE is not set
347CONFIG_VFP=y
348CONFIG_VFPv3=y
349CONFIG_NEON=y
350
351#
352# Userspace binary formats
353#
354CONFIG_BINFMT_ELF=y
355# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
356CONFIG_HAVE_AOUT=y
357# CONFIG_BINFMT_AOUT is not set
358# CONFIG_BINFMT_MISC is not set
359
360#
361# Power management options
362#
363# CONFIG_PM is not set
364CONFIG_ARCH_SUSPEND_POSSIBLE=y
365# CONFIG_NET is not set
366
367#
368# Device Drivers
369#
370
371#
372# Generic Driver Options
373#
374CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
375# CONFIG_DEVTMPFS is not set
376CONFIG_STANDALONE=y
377CONFIG_PREVENT_FIRMWARE_BUILD=y
378CONFIG_FW_LOADER=y
379CONFIG_FIRMWARE_IN_KERNEL=y
380CONFIG_EXTRA_FIRMWARE=""
381# CONFIG_DEBUG_DRIVER is not set
382# CONFIG_DEBUG_DEVRES is not set
383# CONFIG_SYS_HYPERVISOR is not set
384# CONFIG_MTD is not set
385# CONFIG_PARPORT is not set
386CONFIG_BLK_DEV=y
387# CONFIG_BLK_DEV_COW_COMMON is not set
388CONFIG_BLK_DEV_LOOP=y
389# CONFIG_BLK_DEV_CRYPTOLOOP is not set
390
391#
392# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
393#
394CONFIG_BLK_DEV_RAM=y
395CONFIG_BLK_DEV_RAM_COUNT=16
396CONFIG_BLK_DEV_RAM_SIZE=8192
397# CONFIG_BLK_DEV_XIP is not set
398# CONFIG_CDROM_PKTCDVD is not set
399# CONFIG_MG_DISK is not set
400# CONFIG_MISC_DEVICES is not set
401CONFIG_HAVE_IDE=y
402# CONFIG_IDE is not set
403
404#
405# SCSI device support
406#
407# CONFIG_RAID_ATTRS is not set
408CONFIG_SCSI=y
409CONFIG_SCSI_DMA=y
410# CONFIG_SCSI_TGT is not set
411# CONFIG_SCSI_NETLINK is not set
412CONFIG_SCSI_PROC_FS=y
413
414#
415# SCSI support type (disk, tape, CD-ROM)
416#
417CONFIG_BLK_DEV_SD=y
418# CONFIG_CHR_DEV_ST is not set
419# CONFIG_CHR_DEV_OSST is not set
420# CONFIG_BLK_DEV_SR is not set
421CONFIG_CHR_DEV_SG=y
422# CONFIG_CHR_DEV_SCH is not set
423# CONFIG_SCSI_MULTI_LUN is not set
424# CONFIG_SCSI_CONSTANTS is not set
425# CONFIG_SCSI_LOGGING is not set
426# CONFIG_SCSI_SCAN_ASYNC is not set
427CONFIG_SCSI_WAIT_SCAN=m
428
429#
430# SCSI Transports
431#
432# CONFIG_SCSI_SPI_ATTRS is not set
433# CONFIG_SCSI_FC_ATTRS is not set
434# CONFIG_SCSI_SAS_LIBSAS is not set
435# CONFIG_SCSI_SRP_ATTRS is not set
436CONFIG_SCSI_LOWLEVEL=y
437# CONFIG_LIBFC is not set
438# CONFIG_LIBFCOE is not set
439# CONFIG_SCSI_DEBUG is not set
440# CONFIG_SCSI_DH is not set
441# CONFIG_SCSI_OSD_INITIATOR is not set
442# CONFIG_ATA is not set
443# CONFIG_MD is not set
444# CONFIG_PHONE is not set
445
446#
447# Input device support
448#
449CONFIG_INPUT=y
450# CONFIG_INPUT_FF_MEMLESS is not set
451# CONFIG_INPUT_POLLDEV is not set
452# CONFIG_INPUT_SPARSEKMAP is not set
453
454#
455# Userland interfaces
456#
457CONFIG_INPUT_MOUSEDEV=y
458CONFIG_INPUT_MOUSEDEV_PSAUX=y
459CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
460CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
461# CONFIG_INPUT_JOYDEV is not set
462CONFIG_INPUT_EVDEV=y
463# CONFIG_INPUT_EVBUG is not set
464
465#
466# Input Device Drivers
467#
468# CONFIG_INPUT_KEYBOARD is not set
469# CONFIG_INPUT_MOUSE is not set
470# CONFIG_INPUT_JOYSTICK is not set
471# CONFIG_INPUT_TABLET is not set
472CONFIG_INPUT_TOUCHSCREEN=y
473# CONFIG_TOUCHSCREEN_AD7879 is not set
474# CONFIG_TOUCHSCREEN_DYNAPRO is not set
475# CONFIG_TOUCHSCREEN_FUJITSU is not set
476# CONFIG_TOUCHSCREEN_GUNZE is not set
477# CONFIG_TOUCHSCREEN_ELO is not set
478# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
479# CONFIG_TOUCHSCREEN_MTOUCH is not set
480# CONFIG_TOUCHSCREEN_INEXIO is not set
481# CONFIG_TOUCHSCREEN_MK712 is not set
482# CONFIG_TOUCHSCREEN_PENMOUNT is not set
483# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
484# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
485# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
486# CONFIG_TOUCHSCREEN_W90X900 is not set
487# CONFIG_INPUT_MISC is not set
488
489#
490# Hardware I/O ports
491#
492CONFIG_SERIO=y
493CONFIG_SERIO_SERPORT=y
494# CONFIG_SERIO_RAW is not set
495# CONFIG_SERIO_ALTERA_PS2 is not set
496# CONFIG_GAMEPORT is not set
497
498#
499# Character devices
500#
501CONFIG_VT=y
502CONFIG_CONSOLE_TRANSLATIONS=y
503CONFIG_VT_CONSOLE=y
504CONFIG_HW_CONSOLE=y
505# CONFIG_VT_HW_CONSOLE_BINDING is not set
506CONFIG_DEVKMEM=y
507# CONFIG_SERIAL_NONSTANDARD is not set
508
509#
510# Serial drivers
511#
512CONFIG_SERIAL_8250=y
513# CONFIG_SERIAL_8250_CONSOLE is not set
514CONFIG_SERIAL_8250_NR_UARTS=4
515CONFIG_SERIAL_8250_RUNTIME_UARTS=4
516# CONFIG_SERIAL_8250_EXTENDED is not set
517
518#
519# Non-8250 serial port support
520#
521CONFIG_SERIAL_SAMSUNG=y
522CONFIG_SERIAL_SAMSUNG_UARTS_4=y
523CONFIG_SERIAL_SAMSUNG_UARTS=4
524# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
525CONFIG_SERIAL_SAMSUNG_CONSOLE=y
526CONFIG_SERIAL_S5PV210=y
527CONFIG_SERIAL_CORE=y
528CONFIG_SERIAL_CORE_CONSOLE=y
529CONFIG_UNIX98_PTYS=y
530# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
531CONFIG_LEGACY_PTYS=y
532CONFIG_LEGACY_PTY_COUNT=256
533# CONFIG_IPMI_HANDLER is not set
534CONFIG_HW_RANDOM=y
535# CONFIG_HW_RANDOM_TIMERIOMEM is not set
536# CONFIG_R3964 is not set
537# CONFIG_RAW_DRIVER is not set
538# CONFIG_TCG_TPM is not set
539# CONFIG_I2C is not set
540# CONFIG_SPI is not set
541
542#
543# PPS support
544#
545# CONFIG_PPS is not set
546CONFIG_ARCH_REQUIRE_GPIOLIB=y
547CONFIG_GPIOLIB=y
548# CONFIG_DEBUG_GPIO is not set
549# CONFIG_GPIO_SYSFS is not set
550
551#
552# Memory mapped GPIO expanders:
553#
554
555#
556# I2C GPIO expanders:
557#
558
559#
560# PCI GPIO expanders:
561#
562
563#
564# SPI GPIO expanders:
565#
566
567#
568# AC97 GPIO expanders:
569#
570# CONFIG_W1 is not set
571# CONFIG_POWER_SUPPLY is not set
572# CONFIG_HWMON is not set
573# CONFIG_THERMAL is not set
574# CONFIG_WATCHDOG is not set
575CONFIG_SSB_POSSIBLE=y
576
577#
578# Sonics Silicon Backplane
579#
580# CONFIG_SSB is not set
581
582#
583# Multifunction device drivers
584#
585# CONFIG_MFD_CORE is not set
586# CONFIG_MFD_SM501 is not set
587# CONFIG_MFD_ASIC3 is not set
588# CONFIG_HTC_EGPIO is not set
589# CONFIG_HTC_PASIC3 is not set
590# CONFIG_MFD_TMIO is not set
591# CONFIG_MFD_T7L66XB is not set
592# CONFIG_MFD_TC6387XB is not set
593# CONFIG_MFD_TC6393XB is not set
594# CONFIG_REGULATOR is not set
595# CONFIG_MEDIA_SUPPORT is not set
596
597#
598# Graphics support
599#
600# CONFIG_VGASTATE is not set
601# CONFIG_VIDEO_OUTPUT_CONTROL is not set
602# CONFIG_FB is not set
603# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
604
605#
606# Display device support
607#
608# CONFIG_DISPLAY_SUPPORT is not set
609
610#
611# Console display driver support
612#
613# CONFIG_VGA_CONSOLE is not set
614CONFIG_DUMMY_CONSOLE=y
615# CONFIG_SOUND is not set
616# CONFIG_HID_SUPPORT is not set
617# CONFIG_USB_SUPPORT is not set
618# CONFIG_MMC is not set
619# CONFIG_MEMSTICK is not set
620# CONFIG_NEW_LEDS is not set
621# CONFIG_ACCESSIBILITY is not set
622CONFIG_RTC_LIB=y
623# CONFIG_RTC_CLASS is not set
624# CONFIG_DMADEVICES is not set
625# CONFIG_AUXDISPLAY is not set
626# CONFIG_UIO is not set
627
628#
629# TI VLYNQ
630#
631# CONFIG_STAGING is not set
632
633#
634# File systems
635#
636CONFIG_EXT2_FS=y
637# CONFIG_EXT2_FS_XATTR is not set
638# CONFIG_EXT2_FS_XIP is not set
639# CONFIG_EXT3_FS is not set
640# CONFIG_EXT4_FS is not set
641# CONFIG_REISERFS_FS is not set
642# CONFIG_JFS_FS is not set
643CONFIG_FS_POSIX_ACL=y
644# CONFIG_XFS_FS is not set
645# CONFIG_GFS2_FS is not set
646# CONFIG_BTRFS_FS is not set
647# CONFIG_NILFS2_FS is not set
648CONFIG_FILE_LOCKING=y
649CONFIG_FSNOTIFY=y
650CONFIG_DNOTIFY=y
651CONFIG_INOTIFY=y
652CONFIG_INOTIFY_USER=y
653# CONFIG_QUOTA is not set
654# CONFIG_AUTOFS_FS is not set
655# CONFIG_AUTOFS4_FS is not set
656# CONFIG_FUSE_FS is not set
657CONFIG_GENERIC_ACL=y
658
659#
660# Caches
661#
662# CONFIG_FSCACHE is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673CONFIG_FAT_FS=y
674CONFIG_MSDOS_FS=y
675CONFIG_VFAT_FS=y
676CONFIG_FAT_DEFAULT_CODEPAGE=437
677CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
678# CONFIG_NTFS_FS is not set
679
680#
681# Pseudo filesystems
682#
683CONFIG_PROC_FS=y
684CONFIG_PROC_SYSCTL=y
685CONFIG_PROC_PAGE_MONITOR=y
686CONFIG_SYSFS=y
687CONFIG_TMPFS=y
688CONFIG_TMPFS_POSIX_ACL=y
689# CONFIG_HUGETLB_PAGE is not set
690# CONFIG_CONFIGFS_FS is not set
691CONFIG_MISC_FILESYSTEMS=y
692# CONFIG_ADFS_FS is not set
693# CONFIG_AFFS_FS is not set
694# CONFIG_HFS_FS is not set
695# CONFIG_HFSPLUS_FS is not set
696# CONFIG_BEFS_FS is not set
697# CONFIG_BFS_FS is not set
698# CONFIG_EFS_FS is not set
699CONFIG_CRAMFS=y
700# CONFIG_SQUASHFS is not set
701# CONFIG_VXFS_FS is not set
702# CONFIG_MINIX_FS is not set
703# CONFIG_OMFS_FS is not set
704# CONFIG_HPFS_FS is not set
705# CONFIG_QNX4FS_FS is not set
706CONFIG_ROMFS_FS=y
707CONFIG_ROMFS_BACKED_BY_BLOCK=y
708# CONFIG_ROMFS_BACKED_BY_MTD is not set
709# CONFIG_ROMFS_BACKED_BY_BOTH is not set
710CONFIG_ROMFS_ON_BLOCK=y
711# CONFIG_SYSV_FS is not set
712# CONFIG_UFS_FS is not set
713
714#
715# Partition Types
716#
717CONFIG_PARTITION_ADVANCED=y
718# CONFIG_ACORN_PARTITION is not set
719# CONFIG_OSF_PARTITION is not set
720# CONFIG_AMIGA_PARTITION is not set
721# CONFIG_ATARI_PARTITION is not set
722# CONFIG_MAC_PARTITION is not set
723CONFIG_MSDOS_PARTITION=y
724CONFIG_BSD_DISKLABEL=y
725# CONFIG_MINIX_SUBPARTITION is not set
726CONFIG_SOLARIS_X86_PARTITION=y
727# CONFIG_UNIXWARE_DISKLABEL is not set
728# CONFIG_LDM_PARTITION is not set
729# CONFIG_SGI_PARTITION is not set
730# CONFIG_ULTRIX_PARTITION is not set
731# CONFIG_SUN_PARTITION is not set
732# CONFIG_KARMA_PARTITION is not set
733# CONFIG_EFI_PARTITION is not set
734# CONFIG_SYSV68_PARTITION is not set
735CONFIG_NLS=y
736CONFIG_NLS_DEFAULT="iso8859-1"
737CONFIG_NLS_CODEPAGE_437=y
738# CONFIG_NLS_CODEPAGE_737 is not set
739# CONFIG_NLS_CODEPAGE_775 is not set
740# CONFIG_NLS_CODEPAGE_850 is not set
741# CONFIG_NLS_CODEPAGE_852 is not set
742# CONFIG_NLS_CODEPAGE_855 is not set
743# CONFIG_NLS_CODEPAGE_857 is not set
744# CONFIG_NLS_CODEPAGE_860 is not set
745# CONFIG_NLS_CODEPAGE_861 is not set
746# CONFIG_NLS_CODEPAGE_862 is not set
747# CONFIG_NLS_CODEPAGE_863 is not set
748# CONFIG_NLS_CODEPAGE_864 is not set
749# CONFIG_NLS_CODEPAGE_865 is not set
750# CONFIG_NLS_CODEPAGE_866 is not set
751# CONFIG_NLS_CODEPAGE_869 is not set
752# CONFIG_NLS_CODEPAGE_936 is not set
753# CONFIG_NLS_CODEPAGE_950 is not set
754# CONFIG_NLS_CODEPAGE_932 is not set
755# CONFIG_NLS_CODEPAGE_949 is not set
756# CONFIG_NLS_CODEPAGE_874 is not set
757# CONFIG_NLS_ISO8859_8 is not set
758# CONFIG_NLS_CODEPAGE_1250 is not set
759# CONFIG_NLS_CODEPAGE_1251 is not set
760CONFIG_NLS_ASCII=y
761CONFIG_NLS_ISO8859_1=y
762# CONFIG_NLS_ISO8859_2 is not set
763# CONFIG_NLS_ISO8859_3 is not set
764# CONFIG_NLS_ISO8859_4 is not set
765# CONFIG_NLS_ISO8859_5 is not set
766# CONFIG_NLS_ISO8859_6 is not set
767# CONFIG_NLS_ISO8859_7 is not set
768# CONFIG_NLS_ISO8859_9 is not set
769# CONFIG_NLS_ISO8859_13 is not set
770# CONFIG_NLS_ISO8859_14 is not set
771# CONFIG_NLS_ISO8859_15 is not set
772# CONFIG_NLS_KOI8_R is not set
773# CONFIG_NLS_KOI8_U is not set
774# CONFIG_NLS_UTF8 is not set
775
776#
777# Kernel hacking
778#
779# CONFIG_PRINTK_TIME is not set
780CONFIG_ENABLE_WARN_DEPRECATED=y
781CONFIG_ENABLE_MUST_CHECK=y
782CONFIG_FRAME_WARN=1024
783CONFIG_MAGIC_SYSRQ=y
784# CONFIG_STRIP_ASM_SYMS is not set
785# CONFIG_UNUSED_SYMBOLS is not set
786# CONFIG_DEBUG_FS is not set
787# CONFIG_HEADERS_CHECK is not set
788CONFIG_DEBUG_KERNEL=y
789# CONFIG_DEBUG_SHIRQ is not set
790CONFIG_DETECT_SOFTLOCKUP=y
791# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
792CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
793CONFIG_DETECT_HUNG_TASK=y
794# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
795CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
796CONFIG_SCHED_DEBUG=y
797# CONFIG_SCHEDSTATS is not set
798# CONFIG_TIMER_STATS is not set
799# CONFIG_DEBUG_OBJECTS is not set
800# CONFIG_SLUB_DEBUG_ON is not set
801# CONFIG_SLUB_STATS is not set
802# CONFIG_DEBUG_KMEMLEAK is not set
803# CONFIG_DEBUG_PREEMPT is not set
804CONFIG_DEBUG_RT_MUTEXES=y
805CONFIG_DEBUG_PI_LIST=y
806# CONFIG_RT_MUTEX_TESTER is not set
807CONFIG_DEBUG_SPINLOCK=y
808CONFIG_DEBUG_MUTEXES=y
809# CONFIG_DEBUG_LOCK_ALLOC is not set
810# CONFIG_PROVE_LOCKING is not set
811# CONFIG_LOCK_STAT is not set
812CONFIG_DEBUG_SPINLOCK_SLEEP=y
813# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
814# CONFIG_DEBUG_KOBJECT is not set
815CONFIG_DEBUG_BUGVERBOSE=y
816CONFIG_DEBUG_INFO=y
817# CONFIG_DEBUG_VM is not set
818# CONFIG_DEBUG_WRITECOUNT is not set
819CONFIG_DEBUG_MEMORY_INIT=y
820# CONFIG_DEBUG_LIST is not set
821# CONFIG_DEBUG_SG is not set
822# CONFIG_DEBUG_NOTIFIERS is not set
823# CONFIG_DEBUG_CREDENTIALS is not set
824# CONFIG_BOOT_PRINTK_DELAY is not set
825# CONFIG_RCU_TORTURE_TEST is not set
826# CONFIG_RCU_CPU_STALL_DETECTOR is not set
827# CONFIG_BACKTRACE_SELF_TEST is not set
828# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
829# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
830# CONFIG_FAULT_INJECTION is not set
831# CONFIG_LATENCYTOP is not set
832CONFIG_SYSCTL_SYSCALL_CHECK=y
833# CONFIG_PAGE_POISONING is not set
834CONFIG_HAVE_FUNCTION_TRACER=y
835CONFIG_TRACING_SUPPORT=y
836CONFIG_FTRACE=y
837# CONFIG_FUNCTION_TRACER is not set
838# CONFIG_SCHED_TRACER is not set
839# CONFIG_ENABLE_DEFAULT_TRACERS is not set
840# CONFIG_BOOT_TRACER is not set
841CONFIG_BRANCH_PROFILE_NONE=y
842# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
843# CONFIG_PROFILE_ALL_BRANCHES is not set
844# CONFIG_STACK_TRACER is not set
845# CONFIG_KMEMTRACE is not set
846# CONFIG_WORKQUEUE_TRACER is not set
847# CONFIG_BLK_DEV_IO_TRACE is not set
848# CONFIG_SAMPLES is not set
849CONFIG_HAVE_ARCH_KGDB=y
850# CONFIG_KGDB is not set
851CONFIG_ARM_UNWIND=y
852CONFIG_DEBUG_USER=y
853CONFIG_DEBUG_ERRORS=y
854# CONFIG_DEBUG_STACK_USAGE is not set
855CONFIG_DEBUG_LL=y
856CONFIG_EARLY_PRINTK=y
857# CONFIG_DEBUG_ICEDCC is not set
858# CONFIG_OC_ETM is not set
859CONFIG_DEBUG_S3C_UART=1
860
861#
862# Security options
863#
864# CONFIG_KEYS is not set
865# CONFIG_SECURITY is not set
866# CONFIG_SECURITYFS is not set
867# CONFIG_DEFAULT_SECURITY_SELINUX is not set
868# CONFIG_DEFAULT_SECURITY_SMACK is not set
869# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
870CONFIG_DEFAULT_SECURITY_DAC=y
871CONFIG_DEFAULT_SECURITY=""
872# CONFIG_CRYPTO is not set
873# CONFIG_BINARY_PRINTF is not set
874
875#
876# Library routines
877#
878CONFIG_BITREVERSE=y
879CONFIG_GENERIC_FIND_LAST_BIT=y
880CONFIG_CRC_CCITT=y
881# CONFIG_CRC16 is not set
882# CONFIG_CRC_T10DIF is not set
883# CONFIG_CRC_ITU_T is not set
884CONFIG_CRC32=y
885# CONFIG_CRC7 is not set
886# CONFIG_LIBCRC32C is not set
887CONFIG_ZLIB_INFLATE=y
888CONFIG_LZO_DECOMPRESS=y
889CONFIG_DECOMPRESS_GZIP=y
890CONFIG_DECOMPRESS_BZIP2=y
891CONFIG_DECOMPRESS_LZMA=y
892CONFIG_DECOMPRESS_LZO=y
893CONFIG_HAS_IOMEM=y
894CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
new file mode 100644
index 000000000000..3f7d47491b54
--- /dev/null
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -0,0 +1,894 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc4
4# Wed Feb 24 15:36:16 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_ARM_L1_CACHE_SHIFT_6=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
41CONFIG_SWAP=y
42# CONFIG_SYSVIPC is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_TREE_RCU=y
49# CONFIG_TREE_PREEMPT_RCU is not set
50# CONFIG_TINY_RCU is not set
51# CONFIG_RCU_TRACE is not set
52CONFIG_RCU_FANOUT=32
53# CONFIG_RCU_FANOUT_EXACT is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_IKCONFIG is not set
56CONFIG_LOG_BUF_SHIFT=17
57# CONFIG_GROUP_SCHED is not set
58# CONFIG_CGROUPS is not set
59CONFIG_SYSFS_DEPRECATED=y
60CONFIG_SYSFS_DEPRECATED_V2=y
61# CONFIG_RELAY is not set
62CONFIG_NAMESPACES=y
63# CONFIG_UTS_NS is not set
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66CONFIG_BLK_DEV_INITRD=y
67CONFIG_INITRAMFS_SOURCE=""
68CONFIG_RD_GZIP=y
69CONFIG_RD_BZIP2=y
70CONFIG_RD_LZMA=y
71CONFIG_RD_LZO=y
72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
75# CONFIG_EMBEDDED is not set
76CONFIG_UID16=y
77CONFIG_SYSCTL_SYSCALL=y
78CONFIG_KALLSYMS=y
79CONFIG_KALLSYMS_ALL=y
80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81CONFIG_HOTPLUG=y
82CONFIG_PRINTK=y
83CONFIG_BUG=y
84CONFIG_ELF_CORE=y
85CONFIG_BASE_FULL=y
86CONFIG_FUTEX=y
87CONFIG_EPOLL=y
88CONFIG_SIGNALFD=y
89CONFIG_TIMERFD=y
90CONFIG_EVENTFD=y
91CONFIG_SHMEM=y
92CONFIG_AIO=y
93
94#
95# Kernel Performance Events And Counters
96#
97CONFIG_VM_EVENT_COUNTERS=y
98CONFIG_SLUB_DEBUG=y
99CONFIG_COMPAT_BRK=y
100# CONFIG_SLAB is not set
101CONFIG_SLUB=y
102# CONFIG_SLOB is not set
103# CONFIG_PROFILING is not set
104CONFIG_HAVE_OPROFILE=y
105# CONFIG_KPROBES is not set
106CONFIG_HAVE_KPROBES=y
107CONFIG_HAVE_KRETPROBES=y
108CONFIG_HAVE_CLK=y
109
110#
111# GCOV-based kernel profiling
112#
113# CONFIG_SLOW_WORK is not set
114CONFIG_HAVE_GENERIC_DMA_COHERENT=y
115CONFIG_SLABINFO=y
116CONFIG_RT_MUTEXES=y
117CONFIG_BASE_SMALL=0
118CONFIG_MODULES=y
119# CONFIG_MODULE_FORCE_LOAD is not set
120CONFIG_MODULE_UNLOAD=y
121# CONFIG_MODULE_FORCE_UNLOAD is not set
122# CONFIG_MODVERSIONS is not set
123# CONFIG_MODULE_SRCVERSION_ALL is not set
124CONFIG_BLOCK=y
125CONFIG_LBDAF=y
126# CONFIG_BLK_DEV_BSG is not set
127# CONFIG_BLK_DEV_INTEGRITY is not set
128
129#
130# IO Schedulers
131#
132CONFIG_IOSCHED_NOOP=y
133CONFIG_IOSCHED_DEADLINE=y
134CONFIG_IOSCHED_CFQ=y
135# CONFIG_DEFAULT_DEADLINE is not set
136CONFIG_DEFAULT_CFQ=y
137# CONFIG_DEFAULT_NOOP is not set
138CONFIG_DEFAULT_IOSCHED="cfq"
139# CONFIG_INLINE_SPIN_TRYLOCK is not set
140# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK is not set
142# CONFIG_INLINE_SPIN_LOCK_BH is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
144# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
145# CONFIG_INLINE_SPIN_UNLOCK is not set
146# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
149# CONFIG_INLINE_READ_TRYLOCK is not set
150# CONFIG_INLINE_READ_LOCK is not set
151# CONFIG_INLINE_READ_LOCK_BH is not set
152# CONFIG_INLINE_READ_LOCK_IRQ is not set
153# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
154# CONFIG_INLINE_READ_UNLOCK is not set
155# CONFIG_INLINE_READ_UNLOCK_BH is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
157# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
158# CONFIG_INLINE_WRITE_TRYLOCK is not set
159# CONFIG_INLINE_WRITE_LOCK is not set
160# CONFIG_INLINE_WRITE_LOCK_BH is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
162# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
163# CONFIG_INLINE_WRITE_UNLOCK is not set
164# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
167# CONFIG_MUTEX_SPIN_ON_OWNER is not set
168# CONFIG_FREEZER is not set
169
170#
171# System Type
172#
173CONFIG_MMU=y
174# CONFIG_ARCH_AAEC2000 is not set
175# CONFIG_ARCH_INTEGRATOR is not set
176# CONFIG_ARCH_REALVIEW is not set
177# CONFIG_ARCH_VERSATILE is not set
178# CONFIG_ARCH_AT91 is not set
179# CONFIG_ARCH_CLPS711X is not set
180# CONFIG_ARCH_GEMINI is not set
181# CONFIG_ARCH_EBSA110 is not set
182# CONFIG_ARCH_EP93XX is not set
183# CONFIG_ARCH_FOOTBRIDGE is not set
184# CONFIG_ARCH_MXC is not set
185# CONFIG_ARCH_STMP3XXX is not set
186# CONFIG_ARCH_NETX is not set
187# CONFIG_ARCH_H720X is not set
188# CONFIG_ARCH_NOMADIK is not set
189# CONFIG_ARCH_IOP13XX is not set
190# CONFIG_ARCH_IOP32X is not set
191# CONFIG_ARCH_IOP33X is not set
192# CONFIG_ARCH_IXP23XX is not set
193# CONFIG_ARCH_IXP2000 is not set
194# CONFIG_ARCH_IXP4XX is not set
195# CONFIG_ARCH_L7200 is not set
196# CONFIG_ARCH_DOVE is not set
197# CONFIG_ARCH_KIRKWOOD is not set
198# CONFIG_ARCH_LOKI is not set
199# CONFIG_ARCH_MV78XX0 is not set
200# CONFIG_ARCH_ORION5X is not set
201# CONFIG_ARCH_MMP is not set
202# CONFIG_ARCH_KS8695 is not set
203# CONFIG_ARCH_NS9XXX is not set
204# CONFIG_ARCH_W90X900 is not set
205# CONFIG_ARCH_PNX4008 is not set
206# CONFIG_ARCH_PXA is not set
207# CONFIG_ARCH_MSM is not set
208# CONFIG_ARCH_RPC is not set
209# CONFIG_ARCH_SA1100 is not set
210# CONFIG_ARCH_S3C2410 is not set
211# CONFIG_ARCH_S3C64XX is not set
212# CONFIG_ARCH_S5P6440 is not set
213# CONFIG_ARCH_S5P6442 is not set
214# CONFIG_ARCH_S5PC1XX is not set
215CONFIG_ARCH_S5PV210=y
216# CONFIG_ARCH_SHARK is not set
217# CONFIG_ARCH_LH7A40X is not set
218# CONFIG_ARCH_U300 is not set
219# CONFIG_ARCH_DAVINCI is not set
220# CONFIG_ARCH_OMAP is not set
221# CONFIG_ARCH_BCMRING is not set
222# CONFIG_ARCH_U8500 is not set
223CONFIG_PLAT_SAMSUNG=y
224
225#
226# Boot options
227#
228# CONFIG_S3C_BOOT_ERROR_RESET is not set
229CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
230CONFIG_S3C_LOWLEVEL_UART_PORT=1
231CONFIG_SAMSUNG_CLKSRC=y
232CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
233CONFIG_SAMSUNG_IRQ_UART=y
234CONFIG_SAMSUNG_GPIOLIB_4BIT=y
235CONFIG_S3C_GPIO_CFG_S3C24XX=y
236CONFIG_S3C_GPIO_CFG_S3C64XX=y
237CONFIG_S3C_GPIO_PULL_UPDOWN=y
238CONFIG_SAMSUNG_GPIO_EXTRA=0
239CONFIG_S3C_GPIO_SPACE=0
240CONFIG_S3C_GPIO_TRACK=y
241# CONFIG_S3C_ADC is not set
242
243#
244# Power management
245#
246CONFIG_PLAT_S5P=y
247CONFIG_CPU_S5PV210=y
248CONFIG_MACH_SMDKV210=y
249# CONFIG_MACH_SMDKC110 is not set
250
251#
252# Processor Type
253#
254CONFIG_CPU_32v6K=y
255CONFIG_CPU_V7=y
256CONFIG_CPU_32v7=y
257CONFIG_CPU_ABRT_EV7=y
258CONFIG_CPU_PABRT_V7=y
259CONFIG_CPU_CACHE_V7=y
260CONFIG_CPU_CACHE_VIPT=y
261CONFIG_CPU_COPY_V6=y
262CONFIG_CPU_TLB_V7=y
263CONFIG_CPU_HAS_ASID=y
264CONFIG_CPU_CP15=y
265CONFIG_CPU_CP15_MMU=y
266
267#
268# Processor Features
269#
270CONFIG_ARM_THUMB=y
271# CONFIG_ARM_THUMBEE is not set
272# CONFIG_CPU_ICACHE_DISABLE is not set
273# CONFIG_CPU_DCACHE_DISABLE is not set
274# CONFIG_CPU_BPREDICT_DISABLE is not set
275CONFIG_HAS_TLS_REG=y
276CONFIG_ARM_L1_CACHE_SHIFT=6
277# CONFIG_ARM_ERRATA_430973 is not set
278# CONFIG_ARM_ERRATA_458693 is not set
279# CONFIG_ARM_ERRATA_460075 is not set
280CONFIG_ARM_VIC=y
281CONFIG_ARM_VIC_NR=2
282
283#
284# Bus support
285#
286# CONFIG_PCI_SYSCALL is not set
287# CONFIG_ARCH_SUPPORTS_MSI is not set
288# CONFIG_PCCARD is not set
289
290#
291# Kernel Features
292#
293# CONFIG_VMSPLIT_3G is not set
294CONFIG_VMSPLIT_2G=y
295# CONFIG_VMSPLIT_1G is not set
296CONFIG_PAGE_OFFSET=0x80000000
297# CONFIG_PREEMPT_NONE is not set
298# CONFIG_PREEMPT_VOLUNTARY is not set
299CONFIG_PREEMPT=y
300CONFIG_HZ=200
301# CONFIG_THUMB2_KERNEL is not set
302CONFIG_AEABI=y
303CONFIG_OABI_COMPAT=y
304CONFIG_ARCH_SPARSEMEM_ENABLE=y
305CONFIG_ARCH_SPARSEMEM_DEFAULT=y
306# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
307# CONFIG_HIGHMEM is not set
308CONFIG_SELECT_MEMORY_MODEL=y
309# CONFIG_FLATMEM_MANUAL is not set
310# CONFIG_DISCONTIGMEM_MANUAL is not set
311CONFIG_SPARSEMEM_MANUAL=y
312CONFIG_SPARSEMEM=y
313CONFIG_HAVE_MEMORY_PRESENT=y
314CONFIG_SPARSEMEM_EXTREME=y
315CONFIG_SPLIT_PTLOCK_CPUS=999999
316# CONFIG_PHYS_ADDR_T_64BIT is not set
317CONFIG_ZONE_DMA_FLAG=0
318CONFIG_VIRT_TO_BUS=y
319# CONFIG_KSM is not set
320CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
321CONFIG_ALIGNMENT_TRAP=y
322# CONFIG_UACCESS_WITH_MEMCPY is not set
323
324#
325# Boot options
326#
327CONFIG_ZBOOT_ROM_TEXT=0
328CONFIG_ZBOOT_ROM_BSS=0
329CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
330# CONFIG_XIP_KERNEL is not set
331# CONFIG_KEXEC is not set
332
333#
334# CPU Power Management
335#
336# CONFIG_CPU_IDLE is not set
337
338#
339# Floating point emulation
340#
341
342#
343# At least one emulation must be selected
344#
345# CONFIG_FPE_NWFPE is not set
346# CONFIG_FPE_FASTFPE is not set
347CONFIG_VFP=y
348CONFIG_VFPv3=y
349CONFIG_NEON=y
350
351#
352# Userspace binary formats
353#
354CONFIG_BINFMT_ELF=y
355# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
356CONFIG_HAVE_AOUT=y
357# CONFIG_BINFMT_AOUT is not set
358# CONFIG_BINFMT_MISC is not set
359
360#
361# Power management options
362#
363# CONFIG_PM is not set
364CONFIG_ARCH_SUSPEND_POSSIBLE=y
365# CONFIG_NET is not set
366
367#
368# Device Drivers
369#
370
371#
372# Generic Driver Options
373#
374CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
375# CONFIG_DEVTMPFS is not set
376CONFIG_STANDALONE=y
377CONFIG_PREVENT_FIRMWARE_BUILD=y
378CONFIG_FW_LOADER=y
379CONFIG_FIRMWARE_IN_KERNEL=y
380CONFIG_EXTRA_FIRMWARE=""
381# CONFIG_DEBUG_DRIVER is not set
382# CONFIG_DEBUG_DEVRES is not set
383# CONFIG_SYS_HYPERVISOR is not set
384# CONFIG_MTD is not set
385# CONFIG_PARPORT is not set
386CONFIG_BLK_DEV=y
387# CONFIG_BLK_DEV_COW_COMMON is not set
388CONFIG_BLK_DEV_LOOP=y
389# CONFIG_BLK_DEV_CRYPTOLOOP is not set
390
391#
392# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
393#
394CONFIG_BLK_DEV_RAM=y
395CONFIG_BLK_DEV_RAM_COUNT=16
396CONFIG_BLK_DEV_RAM_SIZE=8192
397# CONFIG_BLK_DEV_XIP is not set
398# CONFIG_CDROM_PKTCDVD is not set
399# CONFIG_MG_DISK is not set
400# CONFIG_MISC_DEVICES is not set
401CONFIG_HAVE_IDE=y
402# CONFIG_IDE is not set
403
404#
405# SCSI device support
406#
407# CONFIG_RAID_ATTRS is not set
408CONFIG_SCSI=y
409CONFIG_SCSI_DMA=y
410# CONFIG_SCSI_TGT is not set
411# CONFIG_SCSI_NETLINK is not set
412CONFIG_SCSI_PROC_FS=y
413
414#
415# SCSI support type (disk, tape, CD-ROM)
416#
417CONFIG_BLK_DEV_SD=y
418# CONFIG_CHR_DEV_ST is not set
419# CONFIG_CHR_DEV_OSST is not set
420# CONFIG_BLK_DEV_SR is not set
421CONFIG_CHR_DEV_SG=y
422# CONFIG_CHR_DEV_SCH is not set
423# CONFIG_SCSI_MULTI_LUN is not set
424# CONFIG_SCSI_CONSTANTS is not set
425# CONFIG_SCSI_LOGGING is not set
426# CONFIG_SCSI_SCAN_ASYNC is not set
427CONFIG_SCSI_WAIT_SCAN=m
428
429#
430# SCSI Transports
431#
432# CONFIG_SCSI_SPI_ATTRS is not set
433# CONFIG_SCSI_FC_ATTRS is not set
434# CONFIG_SCSI_SAS_LIBSAS is not set
435# CONFIG_SCSI_SRP_ATTRS is not set
436CONFIG_SCSI_LOWLEVEL=y
437# CONFIG_LIBFC is not set
438# CONFIG_LIBFCOE is not set
439# CONFIG_SCSI_DEBUG is not set
440# CONFIG_SCSI_DH is not set
441# CONFIG_SCSI_OSD_INITIATOR is not set
442# CONFIG_ATA is not set
443# CONFIG_MD is not set
444# CONFIG_PHONE is not set
445
446#
447# Input device support
448#
449CONFIG_INPUT=y
450# CONFIG_INPUT_FF_MEMLESS is not set
451# CONFIG_INPUT_POLLDEV is not set
452# CONFIG_INPUT_SPARSEKMAP is not set
453
454#
455# Userland interfaces
456#
457CONFIG_INPUT_MOUSEDEV=y
458CONFIG_INPUT_MOUSEDEV_PSAUX=y
459CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
460CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
461# CONFIG_INPUT_JOYDEV is not set
462CONFIG_INPUT_EVDEV=y
463# CONFIG_INPUT_EVBUG is not set
464
465#
466# Input Device Drivers
467#
468# CONFIG_INPUT_KEYBOARD is not set
469# CONFIG_INPUT_MOUSE is not set
470# CONFIG_INPUT_JOYSTICK is not set
471# CONFIG_INPUT_TABLET is not set
472CONFIG_INPUT_TOUCHSCREEN=y
473# CONFIG_TOUCHSCREEN_AD7879 is not set
474# CONFIG_TOUCHSCREEN_DYNAPRO is not set
475# CONFIG_TOUCHSCREEN_FUJITSU is not set
476# CONFIG_TOUCHSCREEN_GUNZE is not set
477# CONFIG_TOUCHSCREEN_ELO is not set
478# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
479# CONFIG_TOUCHSCREEN_MTOUCH is not set
480# CONFIG_TOUCHSCREEN_INEXIO is not set
481# CONFIG_TOUCHSCREEN_MK712 is not set
482# CONFIG_TOUCHSCREEN_PENMOUNT is not set
483# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
484# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
485# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
486# CONFIG_TOUCHSCREEN_W90X900 is not set
487# CONFIG_INPUT_MISC is not set
488
489#
490# Hardware I/O ports
491#
492CONFIG_SERIO=y
493CONFIG_SERIO_SERPORT=y
494# CONFIG_SERIO_RAW is not set
495# CONFIG_SERIO_ALTERA_PS2 is not set
496# CONFIG_GAMEPORT is not set
497
498#
499# Character devices
500#
501CONFIG_VT=y
502CONFIG_CONSOLE_TRANSLATIONS=y
503CONFIG_VT_CONSOLE=y
504CONFIG_HW_CONSOLE=y
505# CONFIG_VT_HW_CONSOLE_BINDING is not set
506CONFIG_DEVKMEM=y
507# CONFIG_SERIAL_NONSTANDARD is not set
508
509#
510# Serial drivers
511#
512CONFIG_SERIAL_8250=y
513# CONFIG_SERIAL_8250_CONSOLE is not set
514CONFIG_SERIAL_8250_NR_UARTS=4
515CONFIG_SERIAL_8250_RUNTIME_UARTS=4
516# CONFIG_SERIAL_8250_EXTENDED is not set
517
518#
519# Non-8250 serial port support
520#
521CONFIG_SERIAL_SAMSUNG=y
522CONFIG_SERIAL_SAMSUNG_UARTS_4=y
523CONFIG_SERIAL_SAMSUNG_UARTS=4
524# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
525CONFIG_SERIAL_SAMSUNG_CONSOLE=y
526CONFIG_SERIAL_S5PV210=y
527CONFIG_SERIAL_CORE=y
528CONFIG_SERIAL_CORE_CONSOLE=y
529CONFIG_UNIX98_PTYS=y
530# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
531CONFIG_LEGACY_PTYS=y
532CONFIG_LEGACY_PTY_COUNT=256
533# CONFIG_IPMI_HANDLER is not set
534CONFIG_HW_RANDOM=y
535# CONFIG_HW_RANDOM_TIMERIOMEM is not set
536# CONFIG_R3964 is not set
537# CONFIG_RAW_DRIVER is not set
538# CONFIG_TCG_TPM is not set
539# CONFIG_I2C is not set
540# CONFIG_SPI is not set
541
542#
543# PPS support
544#
545# CONFIG_PPS is not set
546CONFIG_ARCH_REQUIRE_GPIOLIB=y
547CONFIG_GPIOLIB=y
548# CONFIG_DEBUG_GPIO is not set
549# CONFIG_GPIO_SYSFS is not set
550
551#
552# Memory mapped GPIO expanders:
553#
554
555#
556# I2C GPIO expanders:
557#
558
559#
560# PCI GPIO expanders:
561#
562
563#
564# SPI GPIO expanders:
565#
566
567#
568# AC97 GPIO expanders:
569#
570# CONFIG_W1 is not set
571# CONFIG_POWER_SUPPLY is not set
572# CONFIG_HWMON is not set
573# CONFIG_THERMAL is not set
574# CONFIG_WATCHDOG is not set
575CONFIG_SSB_POSSIBLE=y
576
577#
578# Sonics Silicon Backplane
579#
580# CONFIG_SSB is not set
581
582#
583# Multifunction device drivers
584#
585# CONFIG_MFD_CORE is not set
586# CONFIG_MFD_SM501 is not set
587# CONFIG_MFD_ASIC3 is not set
588# CONFIG_HTC_EGPIO is not set
589# CONFIG_HTC_PASIC3 is not set
590# CONFIG_MFD_TMIO is not set
591# CONFIG_MFD_T7L66XB is not set
592# CONFIG_MFD_TC6387XB is not set
593# CONFIG_MFD_TC6393XB is not set
594# CONFIG_REGULATOR is not set
595# CONFIG_MEDIA_SUPPORT is not set
596
597#
598# Graphics support
599#
600# CONFIG_VGASTATE is not set
601# CONFIG_VIDEO_OUTPUT_CONTROL is not set
602# CONFIG_FB is not set
603# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
604
605#
606# Display device support
607#
608# CONFIG_DISPLAY_SUPPORT is not set
609
610#
611# Console display driver support
612#
613# CONFIG_VGA_CONSOLE is not set
614CONFIG_DUMMY_CONSOLE=y
615# CONFIG_SOUND is not set
616# CONFIG_HID_SUPPORT is not set
617# CONFIG_USB_SUPPORT is not set
618# CONFIG_MMC is not set
619# CONFIG_MEMSTICK is not set
620# CONFIG_NEW_LEDS is not set
621# CONFIG_ACCESSIBILITY is not set
622CONFIG_RTC_LIB=y
623# CONFIG_RTC_CLASS is not set
624# CONFIG_DMADEVICES is not set
625# CONFIG_AUXDISPLAY is not set
626# CONFIG_UIO is not set
627
628#
629# TI VLYNQ
630#
631# CONFIG_STAGING is not set
632
633#
634# File systems
635#
636CONFIG_EXT2_FS=y
637# CONFIG_EXT2_FS_XATTR is not set
638# CONFIG_EXT2_FS_XIP is not set
639# CONFIG_EXT3_FS is not set
640# CONFIG_EXT4_FS is not set
641# CONFIG_REISERFS_FS is not set
642# CONFIG_JFS_FS is not set
643CONFIG_FS_POSIX_ACL=y
644# CONFIG_XFS_FS is not set
645# CONFIG_GFS2_FS is not set
646# CONFIG_BTRFS_FS is not set
647# CONFIG_NILFS2_FS is not set
648CONFIG_FILE_LOCKING=y
649CONFIG_FSNOTIFY=y
650CONFIG_DNOTIFY=y
651CONFIG_INOTIFY=y
652CONFIG_INOTIFY_USER=y
653# CONFIG_QUOTA is not set
654# CONFIG_AUTOFS_FS is not set
655# CONFIG_AUTOFS4_FS is not set
656# CONFIG_FUSE_FS is not set
657CONFIG_GENERIC_ACL=y
658
659#
660# Caches
661#
662# CONFIG_FSCACHE is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673CONFIG_FAT_FS=y
674CONFIG_MSDOS_FS=y
675CONFIG_VFAT_FS=y
676CONFIG_FAT_DEFAULT_CODEPAGE=437
677CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
678# CONFIG_NTFS_FS is not set
679
680#
681# Pseudo filesystems
682#
683CONFIG_PROC_FS=y
684CONFIG_PROC_SYSCTL=y
685CONFIG_PROC_PAGE_MONITOR=y
686CONFIG_SYSFS=y
687CONFIG_TMPFS=y
688CONFIG_TMPFS_POSIX_ACL=y
689# CONFIG_HUGETLB_PAGE is not set
690# CONFIG_CONFIGFS_FS is not set
691CONFIG_MISC_FILESYSTEMS=y
692# CONFIG_ADFS_FS is not set
693# CONFIG_AFFS_FS is not set
694# CONFIG_HFS_FS is not set
695# CONFIG_HFSPLUS_FS is not set
696# CONFIG_BEFS_FS is not set
697# CONFIG_BFS_FS is not set
698# CONFIG_EFS_FS is not set
699CONFIG_CRAMFS=y
700# CONFIG_SQUASHFS is not set
701# CONFIG_VXFS_FS is not set
702# CONFIG_MINIX_FS is not set
703# CONFIG_OMFS_FS is not set
704# CONFIG_HPFS_FS is not set
705# CONFIG_QNX4FS_FS is not set
706CONFIG_ROMFS_FS=y
707CONFIG_ROMFS_BACKED_BY_BLOCK=y
708# CONFIG_ROMFS_BACKED_BY_MTD is not set
709# CONFIG_ROMFS_BACKED_BY_BOTH is not set
710CONFIG_ROMFS_ON_BLOCK=y
711# CONFIG_SYSV_FS is not set
712# CONFIG_UFS_FS is not set
713
714#
715# Partition Types
716#
717CONFIG_PARTITION_ADVANCED=y
718# CONFIG_ACORN_PARTITION is not set
719# CONFIG_OSF_PARTITION is not set
720# CONFIG_AMIGA_PARTITION is not set
721# CONFIG_ATARI_PARTITION is not set
722# CONFIG_MAC_PARTITION is not set
723CONFIG_MSDOS_PARTITION=y
724CONFIG_BSD_DISKLABEL=y
725# CONFIG_MINIX_SUBPARTITION is not set
726CONFIG_SOLARIS_X86_PARTITION=y
727# CONFIG_UNIXWARE_DISKLABEL is not set
728# CONFIG_LDM_PARTITION is not set
729# CONFIG_SGI_PARTITION is not set
730# CONFIG_ULTRIX_PARTITION is not set
731# CONFIG_SUN_PARTITION is not set
732# CONFIG_KARMA_PARTITION is not set
733# CONFIG_EFI_PARTITION is not set
734# CONFIG_SYSV68_PARTITION is not set
735CONFIG_NLS=y
736CONFIG_NLS_DEFAULT="iso8859-1"
737CONFIG_NLS_CODEPAGE_437=y
738# CONFIG_NLS_CODEPAGE_737 is not set
739# CONFIG_NLS_CODEPAGE_775 is not set
740# CONFIG_NLS_CODEPAGE_850 is not set
741# CONFIG_NLS_CODEPAGE_852 is not set
742# CONFIG_NLS_CODEPAGE_855 is not set
743# CONFIG_NLS_CODEPAGE_857 is not set
744# CONFIG_NLS_CODEPAGE_860 is not set
745# CONFIG_NLS_CODEPAGE_861 is not set
746# CONFIG_NLS_CODEPAGE_862 is not set
747# CONFIG_NLS_CODEPAGE_863 is not set
748# CONFIG_NLS_CODEPAGE_864 is not set
749# CONFIG_NLS_CODEPAGE_865 is not set
750# CONFIG_NLS_CODEPAGE_866 is not set
751# CONFIG_NLS_CODEPAGE_869 is not set
752# CONFIG_NLS_CODEPAGE_936 is not set
753# CONFIG_NLS_CODEPAGE_950 is not set
754# CONFIG_NLS_CODEPAGE_932 is not set
755# CONFIG_NLS_CODEPAGE_949 is not set
756# CONFIG_NLS_CODEPAGE_874 is not set
757# CONFIG_NLS_ISO8859_8 is not set
758# CONFIG_NLS_CODEPAGE_1250 is not set
759# CONFIG_NLS_CODEPAGE_1251 is not set
760CONFIG_NLS_ASCII=y
761CONFIG_NLS_ISO8859_1=y
762# CONFIG_NLS_ISO8859_2 is not set
763# CONFIG_NLS_ISO8859_3 is not set
764# CONFIG_NLS_ISO8859_4 is not set
765# CONFIG_NLS_ISO8859_5 is not set
766# CONFIG_NLS_ISO8859_6 is not set
767# CONFIG_NLS_ISO8859_7 is not set
768# CONFIG_NLS_ISO8859_9 is not set
769# CONFIG_NLS_ISO8859_13 is not set
770# CONFIG_NLS_ISO8859_14 is not set
771# CONFIG_NLS_ISO8859_15 is not set
772# CONFIG_NLS_KOI8_R is not set
773# CONFIG_NLS_KOI8_U is not set
774# CONFIG_NLS_UTF8 is not set
775
776#
777# Kernel hacking
778#
779# CONFIG_PRINTK_TIME is not set
780CONFIG_ENABLE_WARN_DEPRECATED=y
781CONFIG_ENABLE_MUST_CHECK=y
782CONFIG_FRAME_WARN=1024
783CONFIG_MAGIC_SYSRQ=y
784# CONFIG_STRIP_ASM_SYMS is not set
785# CONFIG_UNUSED_SYMBOLS is not set
786# CONFIG_DEBUG_FS is not set
787# CONFIG_HEADERS_CHECK is not set
788CONFIG_DEBUG_KERNEL=y
789# CONFIG_DEBUG_SHIRQ is not set
790CONFIG_DETECT_SOFTLOCKUP=y
791# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
792CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
793CONFIG_DETECT_HUNG_TASK=y
794# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
795CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
796CONFIG_SCHED_DEBUG=y
797# CONFIG_SCHEDSTATS is not set
798# CONFIG_TIMER_STATS is not set
799# CONFIG_DEBUG_OBJECTS is not set
800# CONFIG_SLUB_DEBUG_ON is not set
801# CONFIG_SLUB_STATS is not set
802# CONFIG_DEBUG_KMEMLEAK is not set
803# CONFIG_DEBUG_PREEMPT is not set
804CONFIG_DEBUG_RT_MUTEXES=y
805CONFIG_DEBUG_PI_LIST=y
806# CONFIG_RT_MUTEX_TESTER is not set
807CONFIG_DEBUG_SPINLOCK=y
808CONFIG_DEBUG_MUTEXES=y
809# CONFIG_DEBUG_LOCK_ALLOC is not set
810# CONFIG_PROVE_LOCKING is not set
811# CONFIG_LOCK_STAT is not set
812CONFIG_DEBUG_SPINLOCK_SLEEP=y
813# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
814# CONFIG_DEBUG_KOBJECT is not set
815CONFIG_DEBUG_BUGVERBOSE=y
816CONFIG_DEBUG_INFO=y
817# CONFIG_DEBUG_VM is not set
818# CONFIG_DEBUG_WRITECOUNT is not set
819CONFIG_DEBUG_MEMORY_INIT=y
820# CONFIG_DEBUG_LIST is not set
821# CONFIG_DEBUG_SG is not set
822# CONFIG_DEBUG_NOTIFIERS is not set
823# CONFIG_DEBUG_CREDENTIALS is not set
824# CONFIG_BOOT_PRINTK_DELAY is not set
825# CONFIG_RCU_TORTURE_TEST is not set
826# CONFIG_RCU_CPU_STALL_DETECTOR is not set
827# CONFIG_BACKTRACE_SELF_TEST is not set
828# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
829# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
830# CONFIG_FAULT_INJECTION is not set
831# CONFIG_LATENCYTOP is not set
832CONFIG_SYSCTL_SYSCALL_CHECK=y
833# CONFIG_PAGE_POISONING is not set
834CONFIG_HAVE_FUNCTION_TRACER=y
835CONFIG_TRACING_SUPPORT=y
836CONFIG_FTRACE=y
837# CONFIG_FUNCTION_TRACER is not set
838# CONFIG_SCHED_TRACER is not set
839# CONFIG_ENABLE_DEFAULT_TRACERS is not set
840# CONFIG_BOOT_TRACER is not set
841CONFIG_BRANCH_PROFILE_NONE=y
842# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
843# CONFIG_PROFILE_ALL_BRANCHES is not set
844# CONFIG_STACK_TRACER is not set
845# CONFIG_KMEMTRACE is not set
846# CONFIG_WORKQUEUE_TRACER is not set
847# CONFIG_BLK_DEV_IO_TRACE is not set
848# CONFIG_SAMPLES is not set
849CONFIG_HAVE_ARCH_KGDB=y
850# CONFIG_KGDB is not set
851CONFIG_ARM_UNWIND=y
852CONFIG_DEBUG_USER=y
853CONFIG_DEBUG_ERRORS=y
854# CONFIG_DEBUG_STACK_USAGE is not set
855CONFIG_DEBUG_LL=y
856CONFIG_EARLY_PRINTK=y
857# CONFIG_DEBUG_ICEDCC is not set
858# CONFIG_OC_ETM is not set
859CONFIG_DEBUG_S3C_UART=1
860
861#
862# Security options
863#
864# CONFIG_KEYS is not set
865# CONFIG_SECURITY is not set
866# CONFIG_SECURITYFS is not set
867# CONFIG_DEFAULT_SECURITY_SELINUX is not set
868# CONFIG_DEFAULT_SECURITY_SMACK is not set
869# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
870CONFIG_DEFAULT_SECURITY_DAC=y
871CONFIG_DEFAULT_SECURITY=""
872# CONFIG_CRYPTO is not set
873# CONFIG_BINARY_PRINTF is not set
874
875#
876# Library routines
877#
878CONFIG_BITREVERSE=y
879CONFIG_GENERIC_FIND_LAST_BIT=y
880CONFIG_CRC_CCITT=y
881# CONFIG_CRC16 is not set
882# CONFIG_CRC_T10DIF is not set
883# CONFIG_CRC_ITU_T is not set
884CONFIG_CRC32=y
885# CONFIG_CRC7 is not set
886# CONFIG_LIBCRC32C is not set
887CONFIG_ZLIB_INFLATE=y
888CONFIG_LZO_DECOMPRESS=y
889CONFIG_DECOMPRESS_GZIP=y
890CONFIG_DECOMPRESS_BZIP2=y
891CONFIG_DECOMPRESS_LZMA=y
892CONFIG_DECOMPRESS_LZO=y
893CONFIG_HAS_IOMEM=y
894CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 256ee1c9f51a..69ce0727edb5 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -128,6 +128,14 @@ static inline int dma_supported(struct device *dev, u64 mask)
128 128
129static inline int dma_set_mask(struct device *dev, u64 dma_mask) 129static inline int dma_set_mask(struct device *dev, u64 dma_mask)
130{ 130{
131#ifdef CONFIG_DMABOUNCE
132 if (dev->archdata.dmabounce) {
133 if (dma_mask >= ISA_DMA_THRESHOLD)
134 return 0;
135 else
136 return -EIO;
137 }
138#endif
131 if (!dev->dma_mask || !dma_supported(dev, dma_mask)) 139 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
132 return -EIO; 140 return -EIO;
133 141
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/include/asm/entry-macro-vic2.S
index fbd90d2cf355..3ceb85e43850 100644
--- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S
+++ b/arch/arm/include/asm/entry-macro-vic2.S
@@ -1,26 +1,39 @@
1/* arch/arm/mach-s3c6400/include/mach/entry-macro.S 1/* arch/arm/include/asm/entry-macro-vic2.S
2 *
3 * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
2 * 4 *
3 * Copyright 2008 Openmoko, Inc. 5 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 6 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/ 7 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
7 * 9 *
8 * Low-level IRQ helper macros for the Samsung S3C64XX series 10 * Low-level IRQ helper macros for a device with two VICs
9 * 11 *
10 * This file is licensed under the terms of the GNU General Public 12 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any 13 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied. 14 * warranty of any kind, whether express or implied.
13*/ 15*/
14 16
17/* This should be included from <mach/entry-macro.S> with the necessary
18 * defines for virtual addresses and IRQ bases for the two vics.
19 *
20 * The code needs the following defined:
21 * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
22 * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
23 * VA_VIC0 Virtual address of VIC0
24 * VA_VIC1 Virtual address of VIC1
25 *
26 * Note, code assumes VIC0's virtual address is an ARM immediate constant
27 * away from VIC1.
28*/
29
15#include <asm/hardware/vic.h> 30#include <asm/hardware/vic.h>
16#include <mach/map.h>
17#include <plat/irqs.h>
18 31
19 .macro disable_fiq 32 .macro disable_fiq
20 .endm 33 .endm
21 34
22 .macro get_irqnr_preamble, base, tmp 35 .macro get_irqnr_preamble, base, tmp
23 ldr \base, =S3C_VA_VIC0 36 ldr \base, =VA_VIC0
24 .endm 37 .endm
25 38
26 .macro arch_ret_to_user, tmp1, tmp2 39 .macro arch_ret_to_user, tmp1, tmp2
@@ -29,13 +42,13 @@
29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 42 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30 43
31 @ check the vic0 44 @ check the vic0
32 mov \irqnr, # S3C_IRQ_OFFSET + 31 45 mov \irqnr, #IRQ_VIC0_BASE + 31
33 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] 46 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
34 teq \irqstat, #0 47 teq \irqstat, #0
35 48
36 @ otherwise try vic1 49 @ otherwise try vic1
37 addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) 50 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
38 addeq \irqnr, \irqnr, #32 51 addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
39 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] 52 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
40 teqeq \irqstat, #0 53 teqeq \irqstat, #0
41 54
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 74b5fff7f575..6700c7fc7ebd 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -75,6 +75,18 @@ extern unsigned long it8152_base_address;
75 IT8152_PD_IRQ(1) USB (USBR) 75 IT8152_PD_IRQ(1) USB (USBR)
76 IT8152_PD_IRQ(0) Audio controller (ACR) 76 IT8152_PD_IRQ(0) Audio controller (ACR)
77 */ 77 */
78#define IT8152_IRQ(x) (IRQ_BOARD_END + (x))
79
80/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
81#define IT8152_LD_IRQ_COUNT 9
82#define IT8152_LP_IRQ_COUNT 16
83#define IT8152_PD_IRQ_COUNT 15
84
85/* Priorities: */
86#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
87#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
88#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
89
78/* frequently used interrupts */ 90/* frequently used interrupts */
79#define IT8152_PCISERR IT8152_PD_IRQ(14) 91#define IT8152_PCISERR IT8152_PD_IRQ(14)
80#define IT8152_H2PTADR IT8152_PD_IRQ(13) 92#define IT8152_H2PTADR IT8152_PD_IRQ(13)
diff --git a/arch/arm/include/asm/hardware/locomo.h b/arch/arm/include/asm/hardware/locomo.h
index 954b1be991b4..74e51d6bd93f 100644
--- a/arch/arm/include/asm/hardware/locomo.h
+++ b/arch/arm/include/asm/hardware/locomo.h
@@ -214,4 +214,8 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
214/* Frontlight control */ 214/* Frontlight control */
215void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf); 215void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
216 216
217struct locomo_platform_data {
218 int irq_base; /* IRQ base for cascaded on-chip IRQs */
219};
220
217#endif 221#endif
diff --git a/arch/arm/include/asm/hardware/sa1111.h b/arch/arm/include/asm/hardware/sa1111.h
index 5da2595759e5..92ed254c175b 100644
--- a/arch/arm/include/asm/hardware/sa1111.h
+++ b/arch/arm/include/asm/hardware/sa1111.h
@@ -578,4 +578,8 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int
578void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); 578void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
579void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); 579void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
580 580
581struct sa1111_platform_data {
582 int irq_base; /* base for cascaded on-chip IRQs */
583};
584
581#endif /* _ASM_ARCH_SA1111 */ 585#endif /* _ASM_ARCH_SA1111 */
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 226cddd2fb65..47980118d0a5 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -30,17 +30,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
30 */ 30 */
31#define PCI_DMA_BUS_IS_PHYS (1) 31#define PCI_DMA_BUS_IS_PHYS (1)
32 32
33/*
34 * Whether pci_unmap_{single,page} is a nop depends upon the
35 * configuration.
36 */
37#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
38#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
39#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
40#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
41#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
42#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
43
44#ifdef CONFIG_PCI 33#ifdef CONFIG_PCI
45static inline void pci_dma_burst_advice(struct pci_dev *pdev, 34static inline void pci_dma_burst_advice(struct pci_dev *pdev,
46 enum pci_dma_burst_strategy *strat, 35 enum pci_dma_burst_strategy *strat,
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index eec6e897ceb2..9dcb11e59026 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -128,6 +128,8 @@ struct pt_regs {
128 128
129#ifdef __KERNEL__ 129#ifdef __KERNEL__
130 130
131#define arch_has_single_step() (1)
132
131#define user_mode(regs) \ 133#define user_mode(regs) \
132 (((regs)->ARM_cpsr & 0xf) == 0) 134 (((regs)->ARM_cpsr & 0xf) == 0)
133 135
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index cf9cdaa2d4d4..dd2bf53000fe 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -443,9 +443,12 @@
443#define __ARCH_WANT_SYS_SIGPROCMASK 443#define __ARCH_WANT_SYS_SIGPROCMASK
444#define __ARCH_WANT_SYS_RT_SIGACTION 444#define __ARCH_WANT_SYS_RT_SIGACTION
445#define __ARCH_WANT_SYS_RT_SIGSUSPEND 445#define __ARCH_WANT_SYS_RT_SIGSUSPEND
446#define __ARCH_WANT_SYS_OLD_MMAP
447#define __ARCH_WANT_SYS_OLD_SELECT
446 448
447#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) 449#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
448#define __ARCH_WANT_SYS_TIME 450#define __ARCH_WANT_SYS_TIME
451#define __ARCH_WANT_SYS_IPC
449#define __ARCH_WANT_SYS_OLDUMOUNT 452#define __ARCH_WANT_SYS_OLDUMOUNT
450#define __ARCH_WANT_SYS_ALARM 453#define __ARCH_WANT_SYS_ALARM
451#define __ARCH_WANT_SYS_UTIME 454#define __ARCH_WANT_SYS_UTIME
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9314a2d681f1..37ae301cc47c 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -91,7 +91,7 @@
91 CALL(sys_settimeofday) 91 CALL(sys_settimeofday)
92/* 80 */ CALL(sys_getgroups16) 92/* 80 */ CALL(sys_getgroups16)
93 CALL(sys_setgroups16) 93 CALL(sys_setgroups16)
94 CALL(OBSOLETE(old_select)) /* used by libc4 */ 94 CALL(OBSOLETE(sys_old_select)) /* used by libc4 */
95 CALL(sys_symlink) 95 CALL(sys_symlink)
96 CALL(sys_ni_syscall) /* was sys_lstat */ 96 CALL(sys_ni_syscall) /* was sys_lstat */
97/* 85 */ CALL(sys_readlink) 97/* 85 */ CALL(sys_readlink)
@@ -99,7 +99,7 @@
99 CALL(sys_swapon) 99 CALL(sys_swapon)
100 CALL(sys_reboot) 100 CALL(sys_reboot)
101 CALL(OBSOLETE(sys_old_readdir)) /* used by libc4 */ 101 CALL(OBSOLETE(sys_old_readdir)) /* used by libc4 */
102/* 90 */ CALL(OBSOLETE(old_mmap)) /* used by libc4 */ 102/* 90 */ CALL(OBSOLETE(sys_old_mmap)) /* used by libc4 */
103 CALL(sys_munmap) 103 CALL(sys_munmap)
104 CALL(sys_truncate) 104 CALL(sys_truncate)
105 CALL(sys_ftruncate) 105 CALL(sys_ftruncate)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index c54ceb3d1f97..3875d99cc40f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -965,7 +965,7 @@ armv6pmu_handle_irq(int irq_num,
965 */ 965 */
966 armv6_pmcr_write(pmcr); 966 armv6_pmcr_write(pmcr);
967 967
968 data.addr = 0; 968 perf_sample_data_init(&data, 0);
969 969
970 cpuc = &__get_cpu_var(cpu_hw_events); 970 cpuc = &__get_cpu_var(cpu_hw_events);
971 for (idx = 0; idx <= armpmu->num_events; ++idx) { 971 for (idx = 0; idx <= armpmu->num_events; ++idx) {
@@ -1945,7 +1945,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
1945 */ 1945 */
1946 regs = get_irq_regs(); 1946 regs = get_irq_regs();
1947 1947
1948 data.addr = 0; 1948 perf_sample_data_init(&data, 0);
1949 1949
1950 cpuc = &__get_cpu_var(cpu_hw_events); 1950 cpuc = &__get_cpu_var(cpu_hw_events);
1951 for (idx = 0; idx <= armpmu->num_events; ++idx) { 1951 for (idx = 0; idx <= armpmu->num_events; ++idx) {
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 08f899fb76a6..3f562a7c0a99 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -452,12 +452,23 @@ void ptrace_cancel_bpt(struct task_struct *child)
452 clear_breakpoint(child, &child->thread.debug.bp[i]); 452 clear_breakpoint(child, &child->thread.debug.bp[i]);
453} 453}
454 454
455void user_disable_single_step(struct task_struct *task)
456{
457 task->ptrace &= ~PT_SINGLESTEP;
458 ptrace_cancel_bpt(task);
459}
460
461void user_enable_single_step(struct task_struct *task)
462{
463 task->ptrace |= PT_SINGLESTEP;
464}
465
455/* 466/*
456 * Called by kernel/ptrace.c when detaching.. 467 * Called by kernel/ptrace.c when detaching..
457 */ 468 */
458void ptrace_disable(struct task_struct *child) 469void ptrace_disable(struct task_struct *child)
459{ 470{
460 single_step_disable(child); 471 user_disable_single_step(child);
461} 472}
462 473
463/* 474/*
@@ -753,53 +764,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
753 ret = ptrace_write_user(child, addr, data); 764 ret = ptrace_write_user(child, addr, data);
754 break; 765 break;
755 766
756 /*
757 * continue/restart and stop at next (return from) syscall
758 */
759 case PTRACE_SYSCALL:
760 case PTRACE_CONT:
761 ret = -EIO;
762 if (!valid_signal(data))
763 break;
764 if (request == PTRACE_SYSCALL)
765 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
766 else
767 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
768 child->exit_code = data;
769 single_step_disable(child);
770 wake_up_process(child);
771 ret = 0;
772 break;
773
774 /*
775 * make the child exit. Best I can do is send it a sigkill.
776 * perhaps it should be put in the status that it wants to
777 * exit.
778 */
779 case PTRACE_KILL:
780 single_step_disable(child);
781 if (child->exit_state != EXIT_ZOMBIE) {
782 child->exit_code = SIGKILL;
783 wake_up_process(child);
784 }
785 ret = 0;
786 break;
787
788 /*
789 * execute single instruction.
790 */
791 case PTRACE_SINGLESTEP:
792 ret = -EIO;
793 if (!valid_signal(data))
794 break;
795 single_step_enable(child);
796 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
797 child->exit_code = data;
798 /* give it a chance to run. */
799 wake_up_process(child);
800 ret = 0;
801 break;
802
803 case PTRACE_GETREGS: 767 case PTRACE_GETREGS:
804 ret = ptrace_getregs(child, (void __user *)data); 768 ret = ptrace_getregs(child, (void __user *)data);
805 break; 769 break;
diff --git a/arch/arm/kernel/ptrace.h b/arch/arm/kernel/ptrace.h
index def3b6184a79..3926605b82ea 100644
--- a/arch/arm/kernel/ptrace.h
+++ b/arch/arm/kernel/ptrace.h
@@ -14,20 +14,6 @@ extern void ptrace_set_bpt(struct task_struct *);
14extern void ptrace_break(struct task_struct *, struct pt_regs *); 14extern void ptrace_break(struct task_struct *, struct pt_regs *);
15 15
16/* 16/*
17 * make sure single-step breakpoint is gone.
18 */
19static inline void single_step_disable(struct task_struct *task)
20{
21 task->ptrace &= ~PT_SINGLESTEP;
22 ptrace_cancel_bpt(task);
23}
24
25static inline void single_step_enable(struct task_struct *task)
26{
27 task->ptrace |= PT_SINGLESTEP;
28}
29
30/*
31 * Send SIGTRAP if we're single-stepping 17 * Send SIGTRAP if we're single-stepping
32 */ 18 */
33static inline void single_step_trap(struct task_struct *task) 19static inline void single_step_trap(struct task_struct *task)
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index ae4027bd01bd..4350f75e578c 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -28,135 +28,6 @@
28#include <linux/ipc.h> 28#include <linux/ipc.h>
29#include <linux/uaccess.h> 29#include <linux/uaccess.h>
30 30
31struct mmap_arg_struct {
32 unsigned long addr;
33 unsigned long len;
34 unsigned long prot;
35 unsigned long flags;
36 unsigned long fd;
37 unsigned long offset;
38};
39
40asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
41{
42 int error = -EFAULT;
43 struct mmap_arg_struct a;
44
45 if (copy_from_user(&a, arg, sizeof(a)))
46 goto out;
47
48 error = -EINVAL;
49 if (a.offset & ~PAGE_MASK)
50 goto out;
51
52 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
53out:
54 return error;
55}
56
57/*
58 * Perform the select(nd, in, out, ex, tv) and mmap() system
59 * calls.
60 */
61
62struct sel_arg_struct {
63 unsigned long n;
64 fd_set __user *inp, *outp, *exp;
65 struct timeval __user *tvp;
66};
67
68asmlinkage int old_select(struct sel_arg_struct __user *arg)
69{
70 struct sel_arg_struct a;
71
72 if (copy_from_user(&a, arg, sizeof(a)))
73 return -EFAULT;
74 /* sys_select() does the appropriate kernel locking */
75 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
76}
77
78#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
79/*
80 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
81 *
82 * This is really horribly ugly.
83 */
84asmlinkage int sys_ipc(uint call, int first, int second, int third,
85 void __user *ptr, long fifth)
86{
87 int version, ret;
88
89 version = call >> 16; /* hack for backward compatibility */
90 call &= 0xffff;
91
92 switch (call) {
93 case SEMOP:
94 return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
95 case SEMTIMEDOP:
96 return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
97 (const struct timespec __user *)fifth);
98
99 case SEMGET:
100 return sys_semget (first, second, third);
101 case SEMCTL: {
102 union semun fourth;
103 if (!ptr)
104 return -EINVAL;
105 if (get_user(fourth.__pad, (void __user * __user *) ptr))
106 return -EFAULT;
107 return sys_semctl (first, second, third, fourth);
108 }
109
110 case MSGSND:
111 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
112 second, third);
113 case MSGRCV:
114 switch (version) {
115 case 0: {
116 struct ipc_kludge tmp;
117 if (!ptr)
118 return -EINVAL;
119 if (copy_from_user(&tmp,(struct ipc_kludge __user *)ptr,
120 sizeof (tmp)))
121 return -EFAULT;
122 return sys_msgrcv (first, tmp.msgp, second,
123 tmp.msgtyp, third);
124 }
125 default:
126 return sys_msgrcv (first,
127 (struct msgbuf __user *) ptr,
128 second, fifth, third);
129 }
130 case MSGGET:
131 return sys_msgget ((key_t) first, second);
132 case MSGCTL:
133 return sys_msgctl(first, second, (struct msqid_ds __user *)ptr);
134
135 case SHMAT:
136 switch (version) {
137 default: {
138 ulong raddr;
139 ret = do_shmat(first, (char __user *)ptr, second, &raddr);
140 if (ret)
141 return ret;
142 return put_user(raddr, (ulong __user *)third);
143 }
144 case 1: /* Of course, we don't support iBCS2! */
145 return -EINVAL;
146 }
147 case SHMDT:
148 return sys_shmdt ((char __user *)ptr);
149 case SHMGET:
150 return sys_shmget (first, second, third);
151 case SHMCTL:
152 return sys_shmctl (first, second,
153 (struct shmid_ds __user *) ptr);
154 default:
155 return -ENOSYS;
156 }
157}
158#endif
159
160/* Fork a new task - this creates a new program thread. 31/* Fork a new task - this creates a new program thread.
161 * This is called indirectly via a small wrapper 32 * This is called indirectly via a small wrapper
162 */ 33 */
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index d59a0cd537f0..33ff678e32f2 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -346,9 +346,6 @@ asmlinkage long sys_oabi_semop(int semid, struct oabi_sembuf __user *tsops,
346 return sys_oabi_semtimedop(semid, tsops, nsops, NULL); 346 return sys_oabi_semtimedop(semid, tsops, nsops, NULL);
347} 347}
348 348
349extern asmlinkage int sys_ipc(uint call, int first, int second, int third,
350 void __user *ptr, long fifth);
351
352asmlinkage int sys_oabi_ipc(uint call, int first, int second, int third, 349asmlinkage int sys_oabi_ipc(uint call, int first, int second, int third,
353 void __user *ptr, long fifth) 350 void __user *ptr, long fifth)
354{ 351{
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 786ac2b6914a..50292cd9c120 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -359,7 +359,9 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
359 frame.fp = regs->ARM_fp; 359 frame.fp = regs->ARM_fp;
360 frame.sp = regs->ARM_sp; 360 frame.sp = regs->ARM_sp;
361 frame.lr = regs->ARM_lr; 361 frame.lr = regs->ARM_lr;
362 frame.pc = regs->ARM_pc; 362 /* PC might be corrupted, use LR in that case. */
363 frame.pc = kernel_text_address(regs->ARM_pc)
364 ? regs->ARM_pc : regs->ARM_lr;
363 } else if (tsk == current) { 365 } else if (tsk == current) {
364 frame.fp = (unsigned long)__builtin_frame_address(0); 366 frame.fp = (unsigned long)__builtin_frame_address(0);
365 frame.sp = current_sp; 367 frame.sp = current_sp;
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 309f3511aa20..2500f41d8d2d 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -58,6 +58,12 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
58{ 58{
59 u32 sr = at91_sys_read(AT91_ST_SR) & irqmask; 59 u32 sr = at91_sys_read(AT91_ST_SR) & irqmask;
60 60
61 /*
62 * irqs should be disabled here, but as the irq is shared they are only
63 * guaranteed to be off if the timer irq is registered first.
64 */
65 WARN_ON_ONCE(!irqs_disabled());
66
61 /* simulate "oneshot" timer with alarm */ 67 /* simulate "oneshot" timer with alarm */
62 if (sr & AT91_ST_ALMS) { 68 if (sr & AT91_ST_ALMS) {
63 clkevt.event_handler(&clkevt); 69 clkevt.event_handler(&clkevt);
@@ -132,24 +138,11 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
132static int 138static int
133clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) 139clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
134{ 140{
135 unsigned long flags;
136 u32 alm; 141 u32 alm;
137 int status = 0; 142 int status = 0;
138 143
139 BUG_ON(delta < 2); 144 BUG_ON(delta < 2);
140 145
141 /* Use "raw" primitives so we behave correctly on RT kernels. */
142 raw_local_irq_save(flags);
143
144 /*
145 * According to Thomas Gleixner irqs are already disabled here. Simply
146 * removing raw_local_irq_save above (and the matching
147 * raw_local_irq_restore) was not accepted. See
148 * http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
149 * So for now (2008-11-20) just warn once if irqs were not disabled ...
150 */
151 WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
152
153 /* The alarm IRQ uses absolute time (now+delta), not the relative 146 /* The alarm IRQ uses absolute time (now+delta), not the relative
154 * time (delta) in our calling convention. Like all clockevents 147 * time (delta) in our calling convention. Like all clockevents
155 * using such "match" hardware, we have a race to defend against. 148 * using such "match" hardware, we have a race to defend against.
@@ -169,7 +162,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
169 alm += delta; 162 alm += delta;
170 at91_sys_write(AT91_ST_RTAR, alm); 163 at91_sys_write(AT91_ST_RTAR, alm);
171 164
172 raw_local_irq_restore(flags);
173 return status; 165 return status;
174} 166}
175 167
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4bd56aee4370..608a63240b64 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -62,16 +62,12 @@ static struct clocksource pit_clk = {
62static void 62static void
63pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) 63pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
64{ 64{
65 unsigned long flags;
66
67 switch (mode) { 65 switch (mode) {
68 case CLOCK_EVT_MODE_PERIODIC: 66 case CLOCK_EVT_MODE_PERIODIC:
69 /* update clocksource counter, then enable the IRQ */ 67 /* update clocksource counter */
70 raw_local_irq_save(flags);
71 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 68 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
72 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN 69 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
73 | AT91_PIT_PITIEN); 70 | AT91_PIT_PITIEN);
74 raw_local_irq_restore(flags);
75 break; 71 break;
76 case CLOCK_EVT_MODE_ONESHOT: 72 case CLOCK_EVT_MODE_ONESHOT:
77 BUG(); 73 BUG();
@@ -100,6 +96,11 @@ static struct clock_event_device pit_clkevt = {
100 */ 96 */
101static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) 97static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
102{ 98{
99 /*
100 * irqs should be disabled here, but as the irq is shared they are only
101 * guaranteed to be off if the timer irq is registered first.
102 */
103 WARN_ON_ONCE(!irqs_disabled());
103 104
104 /* The PIT interrupt may be disabled, and is shared */ 105 /* The PIT interrupt may be disabled, and is shared */
105 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) 106 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
index 550d503a1bca..57f8ee154943 100644
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -77,7 +77,7 @@
77 77
78#define AT91_MCI_BLKR 0x18 /* Block Register */ 78#define AT91_MCI_BLKR 0x18 /* Block Register */
79#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ 79#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
80#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */ 80#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block length */
81 81
82#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ 82#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
83#define AT91_MCR_RDR 0x30 /* Receive Data Register */ 83#define AT91_MCR_RDR 0x30 /* Receive Data Register */
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index 39fdceac8414..2312d197dfb7 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * DaVinci I2C controller platfrom_device info 2 * DaVinci I2C controller platform_device info
3 * 3 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> 4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 * 5 *
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 806972a68c87..5da2cf402c81 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -605,7 +605,7 @@ static struct platform_device dove_xor00_channel = {
605 .dev = { 605 .dev = {
606 .dma_mask = &dove_xor0_dmamask, 606 .dma_mask = &dove_xor0_dmamask,
607 .coherent_dma_mask = DMA_BIT_MASK(64), 607 .coherent_dma_mask = DMA_BIT_MASK(64),
608 .platform_data = (void *)&dove_xor00_data, 608 .platform_data = &dove_xor00_data,
609 }, 609 },
610}; 610};
611 611
@@ -631,7 +631,7 @@ static struct platform_device dove_xor01_channel = {
631 .dev = { 631 .dev = {
632 .dma_mask = &dove_xor0_dmamask, 632 .dma_mask = &dove_xor0_dmamask,
633 .coherent_dma_mask = DMA_BIT_MASK(64), 633 .coherent_dma_mask = DMA_BIT_MASK(64),
634 .platform_data = (void *)&dove_xor01_data, 634 .platform_data = &dove_xor01_data,
635 }, 635 },
636}; 636};
637 637
@@ -704,7 +704,7 @@ static struct platform_device dove_xor10_channel = {
704 .dev = { 704 .dev = {
705 .dma_mask = &dove_xor1_dmamask, 705 .dma_mask = &dove_xor1_dmamask,
706 .coherent_dma_mask = DMA_BIT_MASK(64), 706 .coherent_dma_mask = DMA_BIT_MASK(64),
707 .platform_data = (void *)&dove_xor10_data, 707 .platform_data = &dove_xor10_data,
708 }, 708 },
709}; 709};
710 710
@@ -730,7 +730,7 @@ static struct platform_device dove_xor11_channel = {
730 .dev = { 730 .dev = {
731 .dma_mask = &dove_xor1_dmamask, 731 .dma_mask = &dove_xor1_dmamask,
732 .coherent_dma_mask = DMA_BIT_MASK(64), 732 .coherent_dma_mask = DMA_BIT_MASK(64),
733 .platform_data = (void *)&dove_xor11_data, 733 .platform_data = &dove_xor11_data,
734 }, 734 },
735}; 735};
736 736
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
index 3bd934e9a7f1..93107d88ff3a 100644
--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -65,6 +65,8 @@
65#define TS72XX_RTC_DATA_PHYS_BASE 0x11700000 65#define TS72XX_RTC_DATA_PHYS_BASE 0x11700000
66#define TS72XX_RTC_DATA_SIZE 0x00001000 66#define TS72XX_RTC_DATA_SIZE 0x00001000
67 67
68#define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000
69#define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000
68 70
69#ifndef __ASSEMBLY__ 71#ifndef __ASSEMBLY__
70 72
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index f3757a1c5a10..c33360e82868 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -28,7 +28,7 @@
28 * 28 *
29 * Micro9-High has up to 64MB of 32-bit flash on CS1 29 * Micro9-High has up to 64MB of 32-bit flash on CS1
30 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 30 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
31 * Micro9-Lite uses a seperate MTD map driver for flash support 31 * Micro9-Lite uses a separate MTD map driver for flash support
32 * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1 32 * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
33 *************************************************************************/ 33 *************************************************************************/
34static struct physmap_flash_data micro9_flash_data; 34static struct physmap_flash_data micro9_flash_data;
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 259f7822ba52..fac1ec7a60fb 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -166,6 +166,26 @@ static struct platform_device ts72xx_rtc_device = {
166 .num_resources = 0, 166 .num_resources = 0,
167}; 167};
168 168
169static struct resource ts72xx_wdt_resources[] = {
170 {
171 .start = TS72XX_WDT_CONTROL_PHYS_BASE,
172 .end = TS72XX_WDT_CONTROL_PHYS_BASE + SZ_4K - 1,
173 .flags = IORESOURCE_MEM,
174 },
175 {
176 .start = TS72XX_WDT_FEED_PHYS_BASE,
177 .end = TS72XX_WDT_FEED_PHYS_BASE + SZ_4K - 1,
178 .flags = IORESOURCE_MEM,
179 },
180};
181
182static struct platform_device ts72xx_wdt_device = {
183 .name = "ts72xx-wdt",
184 .id = -1,
185 .num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
186 .resource = ts72xx_wdt_resources,
187};
188
169static struct ep93xx_eth_data ts72xx_eth_data = { 189static struct ep93xx_eth_data ts72xx_eth_data = {
170 .phy_id = 1, 190 .phy_id = 1,
171}; 191};
@@ -175,6 +195,7 @@ static void __init ts72xx_init_machine(void)
175 ep93xx_init_devices(); 195 ep93xx_init_devices();
176 ts72xx_register_flash(); 196 ts72xx_register_flash();
177 platform_device_register(&ts72xx_rtc_device); 197 platform_device_register(&ts72xx_rtc_device);
198 platform_device_register(&ts72xx_wdt_device);
178 199
179 ep93xx_register_eth(&ts72xx_eth_data, 1); 200 ep93xx_register_eth(&ts72xx_eth_data, 1);
180} 201}
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index c4a01594c761..e3181534c7f9 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -502,32 +502,6 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
502 return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); 502 return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
503} 503}
504 504
505/*
506 * We override these so we properly do dmabounce otherwise drivers
507 * are able to set the dma_mask to 0xffffffff and we can no longer
508 * trap bounces. :(
509 *
510 * We just return true on everyhing except for < 64MB in which case
511 * we will fail miseralby and die since we can't handle that case.
512 */
513int
514pci_set_dma_mask(struct pci_dev *dev, u64 mask)
515{
516 if (mask >= SZ_64M - 1 )
517 return 0;
518
519 return -EIO;
520}
521
522int
523pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
524{
525 if (mask >= SZ_64M - 1 )
526 return 0;
527
528 return -EIO;
529}
530
531EXPORT_SYMBOL(ixp4xx_pci_read); 505EXPORT_SYMBOL(ixp4xx_pci_read);
532EXPORT_SYMBOL(ixp4xx_pci_write); 506EXPORT_SYMBOL(ixp4xx_pci_write);
533 507
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index f9d1c43e4a54..f91ca6d4fbe8 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -26,11 +26,6 @@
26#define PCIBIOS_MAX_MEM 0x4BFFFFFF 26#define PCIBIOS_MAX_MEM 0x4BFFFFFF
27#endif 27#endif
28 28
29/*
30 * We override the standard dma-mask routines for bouncing.
31 */
32#define HAVE_ARCH_PCI_SET_DMA_MASK
33
34#define pcibios_assign_all_busses() 1 29#define pcibios_assign_all_busses() 1
35 30
36/* Register locations and bits */ 31/* Register locations and bits */
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index f6c6196a51fa..17879a876be6 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -32,6 +32,12 @@ config MACH_SHEEVAPLUG
32 Say 'Y' here if you want your kernel to support the 32 Say 'Y' here if you want your kernel to support the
33 Marvell SheevaPlug Reference Board. 33 Marvell SheevaPlug Reference Board.
34 34
35config MACH_ESATA_SHEEVAPLUG
36 bool "Marvell eSATA SheevaPlug Reference Board"
37 help
38 Say 'Y' here if you want your kernel to support the
39 Marvell eSATA SheevaPlug Reference Board.
40
35config MACH_TS219 41config MACH_TS219
36 bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS" 42 bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS"
37 help 43 help
@@ -46,18 +52,35 @@ config MACH_TS41X
46 QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS 52 QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS
47 devices. 53 devices.
48 54
55config MACH_OPENRD
56 bool
57
49config MACH_OPENRD_BASE 58config MACH_OPENRD_BASE
50 bool "Marvell OpenRD Base Board" 59 bool "Marvell OpenRD Base Board"
60 select MACH_OPENRD
51 help 61 help
52 Say 'Y' here if you want your kernel to support the 62 Say 'Y' here if you want your kernel to support the
53 Marvell OpenRD Base Board. 63 Marvell OpenRD Base Board.
54 64
65config MACH_OPENRD_CLIENT
66 bool "Marvell OpenRD Client Board"
67 select MACH_OPENRD
68 help
69 Say 'Y' here if you want your kernel to support the
70 Marvell OpenRD Client Board.
71
55config MACH_NETSPACE_V2 72config MACH_NETSPACE_V2
56 bool "LaCie Network Space v2 NAS Board" 73 bool "LaCie Network Space v2 NAS Board"
57 help 74 help
58 Say 'Y' here if you want your kernel to support the 75 Say 'Y' here if you want your kernel to support the
59 LaCie Network Space v2 NAS. 76 LaCie Network Space v2 NAS.
60 77
78config MACH_INETSPACE_V2
79 bool "LaCie Internet Space v2 NAS Board"
80 help
81 Say 'Y' here if you want your kernel to support the
82 LaCie Internet Space v2 NAS.
83
61endmenu 84endmenu
62 85
63endif 86endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index d4d7f53b0fb9..a5530e36ba3e 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -5,9 +5,11 @@ obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o
5obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o 5obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
6obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o 6obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o
7obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o 7obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
8obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o
8obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o 9obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
9obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o 10obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
10obj-$(CONFIG_MACH_OPENRD_BASE) += openrd_base-setup.o 11obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o
11obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o 12obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o
13obj-$(CONFIG_MACH_INETSPACE_V2) += netspace_v2-setup.o
12 14
13obj-$(CONFIG_CPU_IDLE) += cpuidle.o 15obj-$(CONFIG_CPU_IDLE) += cpuidle.o
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 242dd0775343..f759ca243925 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -656,7 +656,7 @@ static struct platform_device kirkwood_xor00_channel = {
656 .dev = { 656 .dev = {
657 .dma_mask = &kirkwood_xor_dmamask, 657 .dma_mask = &kirkwood_xor_dmamask,
658 .coherent_dma_mask = DMA_BIT_MASK(64), 658 .coherent_dma_mask = DMA_BIT_MASK(64),
659 .platform_data = (void *)&kirkwood_xor00_data, 659 .platform_data = &kirkwood_xor00_data,
660 }, 660 },
661}; 661};
662 662
@@ -682,7 +682,7 @@ static struct platform_device kirkwood_xor01_channel = {
682 .dev = { 682 .dev = {
683 .dma_mask = &kirkwood_xor_dmamask, 683 .dma_mask = &kirkwood_xor_dmamask,
684 .coherent_dma_mask = DMA_BIT_MASK(64), 684 .coherent_dma_mask = DMA_BIT_MASK(64),
685 .platform_data = (void *)&kirkwood_xor01_data, 685 .platform_data = &kirkwood_xor01_data,
686 }, 686 },
687}; 687};
688 688
@@ -755,7 +755,7 @@ static struct platform_device kirkwood_xor10_channel = {
755 .dev = { 755 .dev = {
756 .dma_mask = &kirkwood_xor_dmamask, 756 .dma_mask = &kirkwood_xor_dmamask,
757 .coherent_dma_mask = DMA_BIT_MASK(64), 757 .coherent_dma_mask = DMA_BIT_MASK(64),
758 .platform_data = (void *)&kirkwood_xor10_data, 758 .platform_data = &kirkwood_xor10_data,
759 }, 759 },
760}; 760};
761 761
@@ -781,7 +781,7 @@ static struct platform_device kirkwood_xor11_channel = {
781 .dev = { 781 .dev = {
782 .dma_mask = &kirkwood_xor_dmamask, 782 .dma_mask = &kirkwood_xor_dmamask,
783 .coherent_dma_mask = DMA_BIT_MASK(64), 783 .coherent_dma_mask = DMA_BIT_MASK(64),
784 .platform_data = (void *)&kirkwood_xor11_data, 784 .platform_data = &kirkwood_xor11_data,
785 }, 785 },
786}; 786};
787 787
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 9a064065bebe..3ae158d72681 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -182,8 +182,14 @@ static struct platform_device netspace_v2_gpio_buttons = {
182 182
183static struct gpio_led netspace_v2_gpio_led_pins[] = { 183static struct gpio_led netspace_v2_gpio_led_pins[] = {
184 { 184 {
185 .name = "ns_v2:red:fail", 185 .name = "ns_v2:blue:sata",
186 .gpio = NETSPACE_V2_GPIO_RED_LED, 186 .default_trigger = "default-on",
187 .gpio = NETSPACE_V2_GPIO_BLUE_LED_CMD,
188 .active_low = 1,
189 },
190 {
191 .name = "ns_v2:red:fail",
192 .gpio = NETSPACE_V2_GPIO_RED_LED,
187 }, 193 },
188}; 194};
189 195
@@ -202,30 +208,19 @@ static struct platform_device netspace_v2_gpio_leds = {
202 208
203static void __init netspace_v2_gpio_leds_init(void) 209static void __init netspace_v2_gpio_leds_init(void)
204{ 210{
205 platform_device_register(&netspace_v2_gpio_leds); 211 int err;
206 212
207 /* 213 /* Configure register slow_led to allow SATA activity LED blinking */
208 * Configure the front blue LED to blink in relation with the SATA 214 err = gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW, "blue LED slow");
209 * activity. 215 if (err == 0) {
210 */ 216 err = gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0);
211 if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 217 if (err)
212 "SATA blue LED slow") != 0) 218 gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
213 return; 219 }
214 if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0) != 0) 220 if (err)
215 goto err_free_1; 221 pr_err("netspace_v2: failed to configure blue LED slow GPIO\n");
216 if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_CMD, 222
217 "SATA blue LED command") != 0) 223 platform_device_register(&netspace_v2_gpio_leds);
218 goto err_free_1;
219 if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_CMD, 0) != 0)
220 goto err_free_2;
221
222 return;
223
224err_free_2:
225 gpio_free(NETSPACE_V2_GPIO_BLUE_LED_CMD);
226err_free_1:
227 gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
228 pr_err("netspace_v2: failed to configure SATA blue LED\n");
229} 224}
230 225
231/***************************************************************************** 226/*****************************************************************************
@@ -314,6 +309,7 @@ static void __init netspace_v2_init(void)
314 pr_err("netspace_v2: failed to configure power-off GPIO\n"); 309 pr_err("netspace_v2: failed to configure power-off GPIO\n");
315} 310}
316 311
312#ifdef CONFIG_MACH_NETSPACE_V2
317MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") 313MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
318 .phys_io = KIRKWOOD_REGS_PHYS_BASE, 314 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
319 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, 315 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
@@ -323,3 +319,16 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
323 .init_irq = kirkwood_init_irq, 319 .init_irq = kirkwood_init_irq,
324 .timer = &netspace_v2_timer, 320 .timer = &netspace_v2_timer,
325MACHINE_END 321MACHINE_END
322#endif
323
324#ifdef CONFIG_MACH_INETSPACE_V2
325MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
326 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
327 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
328 .boot_params = 0x00000100,
329 .init_machine = netspace_v2_init,
330 .map_io = kirkwood_map_io,
331 .init_irq = kirkwood_init_irq,
332 .timer = &netspace_v2_timer,
333MACHINE_END
334#endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
new file mode 100644
index 000000000000..ad3f1ec33796
--- /dev/null
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -0,0 +1,118 @@
1/*
2 * arch/arm/mach-kirkwood/openrd-setup.c
3 *
4 * Marvell OpenRD (Base|Client) Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/nand.h>
15#include <linux/mtd/partitions.h>
16#include <linux/ata_platform.h>
17#include <linux/mv643xx_eth.h>
18#include <asm/mach-types.h>
19#include <asm/mach/arch.h>
20#include <mach/kirkwood.h>
21#include <plat/mvsdio.h>
22#include "common.h"
23#include "mpp.h"
24
25static struct mtd_partition openrd_nand_parts[] = {
26 {
27 .name = "u-boot",
28 .offset = 0,
29 .size = SZ_1M,
30 .mask_flags = MTD_WRITEABLE
31 }, {
32 .name = "uImage",
33 .offset = MTDPART_OFS_NXTBLK,
34 .size = SZ_4M
35 }, {
36 .name = "root",
37 .offset = MTDPART_OFS_NXTBLK,
38 .size = MTDPART_SIZ_FULL
39 },
40};
41
42static struct mv643xx_eth_platform_data openrd_ge00_data = {
43 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
44};
45
46static struct mv643xx_eth_platform_data openrd_ge01_data = {
47 .phy_addr = MV643XX_ETH_PHY_ADDR(24),
48};
49
50static struct mv_sata_platform_data openrd_sata_data = {
51 .n_ports = 2,
52};
53
54static struct mvsdio_platform_data openrd_mvsdio_data = {
55 .gpio_card_detect = 29, /* MPP29 used as SD card detect */
56};
57
58static unsigned int openrd_mpp_config[] __initdata = {
59 MPP29_GPIO,
60 0
61};
62
63static void __init openrd_init(void)
64{
65 /*
66 * Basic setup. Needs to be called early.
67 */
68 kirkwood_init();
69 kirkwood_mpp_conf(openrd_mpp_config);
70
71 kirkwood_uart0_init();
72 kirkwood_nand_init(ARRAY_AND_SIZE(openrd_nand_parts), 25);
73
74 kirkwood_ehci_init();
75
76 kirkwood_ge00_init(&openrd_ge00_data);
77 if (machine_is_openrd_client())
78 kirkwood_ge01_init(&openrd_ge01_data);
79 kirkwood_sata_init(&openrd_sata_data);
80 kirkwood_sdio_init(&openrd_mvsdio_data);
81
82 kirkwood_i2c_init();
83}
84
85static int __init openrd_pci_init(void)
86{
87 if (machine_is_openrd_base() || machine_is_openrd_client())
88 kirkwood_pcie_init();
89
90 return 0;
91}
92subsys_initcall(openrd_pci_init);
93
94#ifdef CONFIG_MACH_OPENRD_BASE
95MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
96 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
97 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
98 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
99 .boot_params = 0x00000100,
100 .init_machine = openrd_init,
101 .map_io = kirkwood_map_io,
102 .init_irq = kirkwood_init_irq,
103 .timer = &kirkwood_timer,
104MACHINE_END
105#endif
106
107#ifdef CONFIG_MACH_OPENRD_CLIENT
108MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
109 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
110 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
111 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
112 .boot_params = 0x00000100,
113 .init_machine = openrd_init,
114 .map_io = kirkwood_map_io,
115 .init_irq = kirkwood_init_irq,
116 .timer = &kirkwood_timer,
117MACHINE_END
118#endif
diff --git a/arch/arm/mach-kirkwood/openrd_base-setup.c b/arch/arm/mach-kirkwood/openrd_base-setup.c
deleted file mode 100644
index 77617c722299..000000000000
--- a/arch/arm/mach-kirkwood/openrd_base-setup.c
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * arch/arm/mach-kirkwood/openrd_base-setup.c
3 *
4 * Marvell OpenRD Base Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/partitions.h>
15#include <linux/ata_platform.h>
16#include <linux/mv643xx_eth.h>
17#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
19#include <mach/kirkwood.h>
20#include <plat/mvsdio.h>
21#include "common.h"
22#include "mpp.h"
23
24static struct mtd_partition openrd_base_nand_parts[] = {
25 {
26 .name = "u-boot",
27 .offset = 0,
28 .size = SZ_1M
29 }, {
30 .name = "uImage",
31 .offset = MTDPART_OFS_NXTBLK,
32 .size = SZ_4M
33 }, {
34 .name = "root",
35 .offset = MTDPART_OFS_NXTBLK,
36 .size = MTDPART_SIZ_FULL
37 },
38};
39
40static struct mv643xx_eth_platform_data openrd_base_ge00_data = {
41 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
42};
43
44static struct mv_sata_platform_data openrd_base_sata_data = {
45 .n_ports = 2,
46};
47
48static struct mvsdio_platform_data openrd_base_mvsdio_data = {
49 .gpio_card_detect = 29, /* MPP29 used as SD card detect */
50};
51
52static unsigned int openrd_base_mpp_config[] __initdata = {
53 MPP29_GPIO,
54 0
55};
56
57static void __init openrd_base_init(void)
58{
59 /*
60 * Basic setup. Needs to be called early.
61 */
62 kirkwood_init();
63 kirkwood_mpp_conf(openrd_base_mpp_config);
64
65 kirkwood_uart0_init();
66 kirkwood_nand_init(ARRAY_AND_SIZE(openrd_base_nand_parts), 25);
67
68 kirkwood_ehci_init();
69
70 kirkwood_ge00_init(&openrd_base_ge00_data);
71 kirkwood_sata_init(&openrd_base_sata_data);
72 kirkwood_sdio_init(&openrd_base_mvsdio_data);
73
74 kirkwood_i2c_init();
75}
76
77static int __init openrd_base_pci_init(void)
78{
79 if (machine_is_openrd_base())
80 kirkwood_pcie_init();
81
82 return 0;
83 }
84subsys_initcall(openrd_base_pci_init);
85
86
87MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
88 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
89 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
90 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
91 .boot_params = 0x00000100,
92 .init_machine = openrd_base_init,
93 .map_io = kirkwood_map_io,
94 .init_irq = kirkwood_init_irq,
95 .timer = &kirkwood_timer,
96MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index c7319eeac8bb..a00879d34d54 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -11,6 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/ata_platform.h>
14#include <linux/mtd/partitions.h> 15#include <linux/mtd/partitions.h>
15#include <linux/mv643xx_eth.h> 16#include <linux/mv643xx_eth.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
@@ -42,10 +43,19 @@ static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
42 .phy_addr = MV643XX_ETH_PHY_ADDR(0), 43 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
43}; 44};
44 45
46static struct mv_sata_platform_data sheeva_esata_sata_data = {
47 .n_ports = 2,
48};
49
45static struct mvsdio_platform_data sheevaplug_mvsdio_data = { 50static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
46 /* unfortunately the CD signal has not been connected */ 51 /* unfortunately the CD signal has not been connected */
47}; 52};
48 53
54static struct mvsdio_platform_data sheeva_esata_mvsdio_data = {
55 .gpio_write_protect = 44, /* MPP44 used as SD write protect */
56 .gpio_card_detect = 47, /* MPP47 used as SD card detect */
57};
58
49static struct gpio_led sheevaplug_led_pins[] = { 59static struct gpio_led sheevaplug_led_pins[] = {
50 { 60 {
51 .name = "plug:green:health", 61 .name = "plug:green:health",
@@ -74,13 +84,26 @@ static unsigned int sheevaplug_mpp_config[] __initdata = {
74 0 84 0
75}; 85};
76 86
87static unsigned int sheeva_esata_mpp_config[] __initdata = {
88 MPP29_GPIO, /* USB Power Enable */
89 MPP44_GPIO, /* SD Write Protect */
90 MPP47_GPIO, /* SD Card Detect */
91 MPP49_GPIO, /* LED Green */
92 0
93};
94
77static void __init sheevaplug_init(void) 95static void __init sheevaplug_init(void)
78{ 96{
79 /* 97 /*
80 * Basic setup. Needs to be called early. 98 * Basic setup. Needs to be called early.
81 */ 99 */
82 kirkwood_init(); 100 kirkwood_init();
83 kirkwood_mpp_conf(sheevaplug_mpp_config); 101
102 /* setup gpio pin select */
103 if (machine_is_sheeva_esata())
104 kirkwood_mpp_conf(sheeva_esata_mpp_config);
105 else
106 kirkwood_mpp_conf(sheevaplug_mpp_config);
84 107
85 kirkwood_uart0_init(); 108 kirkwood_uart0_init();
86 kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25); 109 kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25);
@@ -91,11 +114,21 @@ static void __init sheevaplug_init(void)
91 kirkwood_ehci_init(); 114 kirkwood_ehci_init();
92 115
93 kirkwood_ge00_init(&sheevaplug_ge00_data); 116 kirkwood_ge00_init(&sheevaplug_ge00_data);
94 kirkwood_sdio_init(&sheevaplug_mvsdio_data); 117
118 /* honor lower power consumption for plugs with out eSATA */
119 if (machine_is_sheeva_esata())
120 kirkwood_sata_init(&sheeva_esata_sata_data);
121
122 /* enable sd wp and sd cd on plugs with esata */
123 if (machine_is_sheeva_esata())
124 kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
125 else
126 kirkwood_sdio_init(&sheevaplug_mvsdio_data);
95 127
96 platform_device_register(&sheevaplug_leds); 128 platform_device_register(&sheevaplug_leds);
97} 129}
98 130
131#ifdef CONFIG_MACH_SHEEVAPLUG
99MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") 132MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
100 /* Maintainer: shadi Ammouri <shadi@marvell.com> */ 133 /* Maintainer: shadi Ammouri <shadi@marvell.com> */
101 .phys_io = KIRKWOOD_REGS_PHYS_BASE, 134 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
@@ -106,3 +139,16 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
106 .init_irq = kirkwood_init_irq, 139 .init_irq = kirkwood_init_irq,
107 .timer = &kirkwood_timer, 140 .timer = &kirkwood_timer,
108MACHINE_END 141MACHINE_END
142#endif
143
144#ifdef CONFIG_MACH_ESATA_SHEEVAPLUG
145MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
146 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
147 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
148 .boot_params = 0x00000100,
149 .init_machine = sheevaplug_init,
150 .map_io = kirkwood_map_io,
151 .init_irq = kirkwood_init_irq,
152 .timer = &kirkwood_timer,
153MACHINE_END
154#endif
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index c6a564fc4a7c..6ab843eaa35b 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -1,6 +1,6 @@
1if ARCH_MMP 1if ARCH_MMP
2 2
3menu "Marvell PXA168/910 Implmentations" 3menu "Marvell PXA168/910/MMP2 Implmentations"
4 4
5config MACH_ASPENITE 5config MACH_ASPENITE
6 bool "Marvell's PXA168 Aspenite Development Board" 6 bool "Marvell's PXA168 Aspenite Development Board"
@@ -16,6 +16,13 @@ config MACH_ZYLONITE2
16 Say 'Y' here if you want to support the Marvell PXA168-based 16 Say 'Y' here if you want to support the Marvell PXA168-based
17 Zylonite2 Development Board. 17 Zylonite2 Development Board.
18 18
19config MACH_AVENGERS_LITE
20 bool "Marvell's PXA168 Avengers Lite Development Board"
21 select CPU_PXA168
22 help
23 Say 'Y' here if you want to support the Marvell PXA168-based
24 Avengers Lite Development Board.
25
19config MACH_TAVOREVB 26config MACH_TAVOREVB
20 bool "Marvell's PXA910 TavorEVB Development Board" 27 bool "Marvell's PXA910 TavorEVB Development Board"
21 select CPU_PXA910 28 select CPU_PXA910
@@ -30,6 +37,26 @@ config MACH_TTC_DKB
30 Say 'Y' here if you want to support the Marvell PXA910-based 37 Say 'Y' here if you want to support the Marvell PXA910-based
31 TTC_DKB Development Board. 38 TTC_DKB Development Board.
32 39
40config MACH_FLINT
41 bool "Marvell's Flint Development Platform"
42 select CPU_MMP2
43 help
44 Say 'Y' here if you want to support the Marvell MMP2-based
45 Flint Development Platform.
46 MMP2-based board can't be co-existed with PXA168-based &
47 PXA910-based development board. Since MMP2 is compatible to
48 ARMv6 architecture.
49
50config MACH_MARVELL_JASPER
51 bool "Marvell's Jasper Development Platform"
52 select CPU_MMP2
53 help
54 Say 'Y' here if you want to support the Marvell MMP2-base
55 Jasper Development Platform.
56 MMP2-based board can't be co-existed with PXA168-based &
57 PXA910-based development board. Since MMP2 is compatible to
58 ARMv6 architecture.
59
33endmenu 60endmenu
34 61
35config CPU_PXA168 62config CPU_PXA168
@@ -44,4 +71,10 @@ config CPU_PXA910
44 help 71 help
45 Select code specific to PXA910 72 Select code specific to PXA910
46 73
74config CPU_MMP2
75 bool
76 select CPU_V6
77 select CPU_32v6K
78 help
79 Select code specific to MMP2. MMP2 is ARMv6 compatible.
47endif 80endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 6883e6584883..8b66d06739c4 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,14 +2,18 @@
2# Makefile for Marvell's PXA168 processors line 2# Makefile for Marvell's PXA168 processors line
3# 3#
4 4
5obj-y += common.o clock.o devices.o irq.o time.o 5obj-y += common.o clock.o devices.o time.o
6 6
7# SoC support 7# SoC support
8obj-$(CONFIG_CPU_PXA168) += pxa168.o 8obj-$(CONFIG_CPU_PXA168) += pxa168.o irq-pxa168.o
9obj-$(CONFIG_CPU_PXA910) += pxa910.o 9obj-$(CONFIG_CPU_PXA910) += pxa910.o irq-pxa168.o
10obj-$(CONFIG_CPU_MMP2) += mmp2.o irq-mmp2.o
10 11
11# board support 12# board support
12obj-$(CONFIG_MACH_ASPENITE) += aspenite.o 13obj-$(CONFIG_MACH_ASPENITE) += aspenite.o
13obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o 14obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o
15obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
14obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 16obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
15obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o 17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
18obj-$(CONFIG_MACH_FLINT) += flint.o
19obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
new file mode 100644
index 000000000000..8c3fa5d14f4b
--- /dev/null
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -0,0 +1,51 @@
1/*
2 * linux/arch/arm/mach-mmp/avengers_lite.c
3 *
4 * Support for the Marvell PXA168-based Avengers lite Development Platform.
5 *
6 * Copyright (C) 2009-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16
17#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
19#include <mach/addr-map.h>
20#include <mach/mfp-pxa168.h>
21#include <mach/pxa168.h>
22#include <mach/irqs.h>
23
24
25#include "common.h"
26#include <linux/delay.h>
27
28/* Avengers lite MFP configurations */
29static unsigned long avengers_lite_pin_config_V16F[] __initdata = {
30 /* DEBUG_UART */
31 GPIO88_UART2_TXD,
32 GPIO89_UART2_RXD,
33};
34
35static void __init avengers_lite_init(void)
36{
37 mfp_config(ARRAY_AND_SIZE(avengers_lite_pin_config_V16F));
38
39 /* on-chip devices */
40 pxa168_add_uart(2);
41}
42
43MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
44 .phys_io = APB_PHYS_BASE,
45 .boot_params = 0x00000100,
46 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
47 .map_io = pxa_map_io,
48 .init_irq = pxa168_init_irq,
49 .timer = &pxa168_timer,
50 .init_machine = avengers_lite_init,
51MACHINE_END
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index c33fbbc49417..b4a0ba05a0f4 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -3,11 +3,15 @@
3struct sys_timer; 3struct sys_timer;
4 4
5extern void timer_init(int irq); 5extern void timer_init(int irq);
6extern void mmp2_clear_pmic_int(void);
6 7
7extern struct sys_timer pxa168_timer; 8extern struct sys_timer pxa168_timer;
8extern struct sys_timer pxa910_timer; 9extern struct sys_timer pxa910_timer;
10extern struct sys_timer mmp2_timer;
9extern void __init pxa168_init_irq(void); 11extern void __init pxa168_init_irq(void);
10extern void __init pxa910_init_irq(void); 12extern void __init pxa910_init_irq(void);
13extern void __init mmp2_init_icu(void);
14extern void __init mmp2_init_irq(void);
11 15
12extern void __init icu_init_irq(void); 16extern void __init icu_init_irq(void);
13extern void __init pxa_map_io(void); 17extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
new file mode 100644
index 000000000000..4ec7709a3462
--- /dev/null
+++ b/arch/arm/mach-mmp/flint.c
@@ -0,0 +1,123 @@
1/*
2 * linux/arch/arm/mach-mmp/flint.c
3 *
4 * Support for the Marvell Flint Development Platform.
5 *
6 * Copyright (C) 2009 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/smc91x.h>
17#include <linux/io.h>
18#include <linux/gpio.h>
19
20#include <asm/mach-types.h>
21#include <asm/mach/arch.h>
22#include <mach/addr-map.h>
23#include <mach/mfp-mmp2.h>
24#include <mach/mmp2.h>
25
26#include "common.h"
27
28static unsigned long flint_pin_config[] __initdata = {
29 /* UART1 */
30 GPIO45_UART1_RXD,
31 GPIO46_UART1_TXD,
32
33 /* UART2 */
34 GPIO47_UART2_RXD,
35 GPIO48_UART2_TXD,
36
37 /* SMC */
38 GPIO151_SMC_SCLK,
39 GPIO145_SMC_nCS0,
40 GPIO146_SMC_nCS1,
41 GPIO152_SMC_BE0,
42 GPIO153_SMC_BE1,
43 GPIO154_SMC_IRQ,
44 GPIO113_SMC_RDY,
45
46 /*Ethernet*/
47 GPIO155_GPIO155,
48
49 /* DFI */
50 GPIO168_DFI_D0,
51 GPIO167_DFI_D1,
52 GPIO166_DFI_D2,
53 GPIO165_DFI_D3,
54 GPIO107_DFI_D4,
55 GPIO106_DFI_D5,
56 GPIO105_DFI_D6,
57 GPIO104_DFI_D7,
58 GPIO111_DFI_D8,
59 GPIO164_DFI_D9,
60 GPIO163_DFI_D10,
61 GPIO162_DFI_D11,
62 GPIO161_DFI_D12,
63 GPIO110_DFI_D13,
64 GPIO109_DFI_D14,
65 GPIO108_DFI_D15,
66 GPIO143_ND_nCS0,
67 GPIO144_ND_nCS1,
68 GPIO147_ND_nWE,
69 GPIO148_ND_nRE,
70 GPIO150_ND_ALE,
71 GPIO149_ND_CLE,
72 GPIO112_ND_RDY0,
73 GPIO160_ND_RDY1,
74};
75
76static struct smc91x_platdata flint_smc91x_info = {
77 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
78};
79
80static struct resource smc91x_resources[] = {
81 [0] = {
82 .start = SMC_CS1_PHYS_BASE + 0x300,
83 .end = SMC_CS1_PHYS_BASE + 0xfffff,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = {
87 .start = gpio_to_irq(155),
88 .end = gpio_to_irq(155),
89 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
90 }
91};
92
93static struct platform_device smc91x_device = {
94 .name = "smc91x",
95 .id = 0,
96 .dev = {
97 .platform_data = &flint_smc91x_info,
98 },
99 .num_resources = ARRAY_SIZE(smc91x_resources),
100 .resource = smc91x_resources,
101};
102
103static void __init flint_init(void)
104{
105 mfp_config(ARRAY_AND_SIZE(flint_pin_config));
106
107 /* on-chip devices */
108 mmp2_add_uart(1);
109 mmp2_add_uart(2);
110
111 /* off-chip devices */
112 platform_device_register(&smc91x_device);
113}
114
115MACHINE_START(FLINT, "Flint Development Platform")
116 .phys_io = APB_PHYS_BASE,
117 .boot_params = 0x00000100,
118 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
119 .map_io = pxa_map_io,
120 .init_irq = mmp2_init_irq,
121 .timer = &mmp2_timer,
122 .init_machine = flint_init,
123MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
index 25e797b09083..83b18721d933 100644
--- a/arch/arm/mach-mmp/include/mach/cputype.h
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -8,6 +8,7 @@
8 * 8 *
9 * PXA168 A0 0x41159263 0x56158400 0x00A0A333 9 * PXA168 A0 0x41159263 0x56158400 0x00A0A333
10 * PXA910 Y0 0x41159262 0x56158000 0x00F0C910 10 * PXA910 Y0 0x41159262 0x56158000 0x00F0C910
11 * MMP2 Z0 0x560f5811
11 */ 12 */
12 13
13#ifdef CONFIG_CPU_PXA168 14#ifdef CONFIG_CPU_PXA168
@@ -24,7 +25,15 @@
24# define __cpu_is_pxa910(id) (0) 25# define __cpu_is_pxa910(id) (0)
25#endif 26#endif
26 27
28#ifdef CONFIG_CPU_MMP2
29# define __cpu_is_mmp2(id) \
30 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x58; })
31#else
32# define __cpu_is_mmp2(id) (0)
33#endif
34
27#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); }) 35#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); })
28#define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); }) 36#define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); })
37#define cpu_is_mmp2() ({ __cpu_is_mmp2(read_cpuid_id()); })
29 38
30#endif /* __ASM_MACH_CPUTYPE_H */ 39#endif /* __ASM_MACH_CPUTYPE_H */
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
index 24585397217e..1fa0a492454a 100644
--- a/arch/arm/mach-mmp/include/mach/devices.h
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -34,4 +34,16 @@ struct pxa_device_desc pxa910_device_##_name __initdata = { \
34 .size = _size, \ 34 .size = _size, \
35 .dma = { _dma }, \ 35 .dma = { _dma }, \
36}; 36};
37
38#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
39struct pxa_device_desc mmp2_device_##_name __initdata = { \
40 .dev_name = "mmp2-" #_name, \
41 .drv_name = _drv, \
42 .id = _id, \
43 .irq = IRQ_MMP2_##_irq, \
44 .start = _start, \
45 .size = _size, \
46 .dma = { _dma }, \
47}
48
37extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); 49extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
index 6d3cd35478b5..c42d9d4e892d 100644
--- a/arch/arm/mach-mmp/include/mach/entry-macro.S
+++ b/arch/arm/mach-mmp/include/mach/entry-macro.S
@@ -15,7 +15,12 @@
15 .endm 15 .endm
16 16
17 .macro get_irqnr_preamble, base, tmp 17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =ICU_AP_IRQ_SEL_INT_NUM 18 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
19 and \tmp, \tmp, #0xff00
20 cmp \tmp, #0x5800
21 ldr \base, =ICU_VIRT_BASE
22 addne \base, \base, #0x10c @ PJ1 AP INT SEL register
23 addeq \base, \base, #0x104 @ PJ4 IRQ SEL register
19 .endm 24 .endm
20 25
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index d68871b0f28c..02701196ea03 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -113,10 +113,119 @@
113#define IRQ_PXA910_AP_PMU 60 113#define IRQ_PXA910_AP_PMU 60
114#define IRQ_PXA910_SM_INT 63 /* from PinMux */ 114#define IRQ_PXA910_SM_INT 63 /* from PinMux */
115 115
116#define IRQ_GPIO_START 64 116/*
117#define IRQ_GPIO_NUM 128 117 * Interrupt numbers for MMP2
118 */
119#define IRQ_MMP2_NONE (-1)
120#define IRQ_MMP2_SSP1 0
121#define IRQ_MMP2_SSP2 1
122#define IRQ_MMP2_SSPA1 2
123#define IRQ_MMP2_SSPA2 3
124#define IRQ_MMP2_PMIC_MUX 4 /* PMIC & Charger */
125#define IRQ_MMP2_RTC_MUX 5
126#define IRQ_MMP2_TWSI1 7
127#define IRQ_MMP2_GPU 8
128#define IRQ_MMP2_KEYPAD 9
129#define IRQ_MMP2_ROTARY 10
130#define IRQ_MMP2_TRACKBALL 11
131#define IRQ_MMP2_ONEWIRE 12
132#define IRQ_MMP2_TIMER1 13
133#define IRQ_MMP2_TIMER2 14
134#define IRQ_MMP2_TIMER3 15
135#define IRQ_MMP2_RIPC 16
136#define IRQ_MMP2_TWSI_MUX 17 /* TWSI2 ~ TWSI6 */
137#define IRQ_MMP2_HDMI 19
138#define IRQ_MMP2_SSP3 20
139#define IRQ_MMP2_SSP4 21
140#define IRQ_MMP2_USB_HS1 22
141#define IRQ_MMP2_USB_HS2 23
142#define IRQ_MMP2_UART3 24
143#define IRQ_MMP2_UART1 27
144#define IRQ_MMP2_UART2 28
145#define IRQ_MMP2_MIPI_DSI 29
146#define IRQ_MMP2_CI2 30
147#define IRQ_MMP2_PMU_TIMER1 31
148#define IRQ_MMP2_PMU_TIMER2 32
149#define IRQ_MMP2_PMU_TIMER3 33
150#define IRQ_MMP2_USB_FS 34
151#define IRQ_MMP2_MISC_MUX 35
152#define IRQ_MMP2_WDT1 36
153#define IRQ_MMP2_NAND_DMA 37
154#define IRQ_MMP2_USIM 38
155#define IRQ_MMP2_MMC 39
156#define IRQ_MMP2_WTM 40
157#define IRQ_MMP2_LCD 41
158#define IRQ_MMP2_CI 42
159#define IRQ_MMP2_IRE 43
160#define IRQ_MMP2_USB_OTG 44
161#define IRQ_MMP2_NAND 45
162#define IRQ_MMP2_UART4 46
163#define IRQ_MMP2_DMA_FIQ 47
164#define IRQ_MMP2_DMA_RIQ 48
165#define IRQ_MMP2_GPIO 49
166#define IRQ_MMP2_SSP_MUX 51
167#define IRQ_MMP2_MMC2 52
168#define IRQ_MMP2_MMC3 53
169#define IRQ_MMP2_MMC4 54
170#define IRQ_MMP2_MIPI_HSI 55
171#define IRQ_MMP2_MSP 58
172#define IRQ_MMP2_MIPI_SLIM_DMA 59
173#define IRQ_MMP2_PJ4_FREQ_CHG 60
174#define IRQ_MMP2_MIPI_SLIM 62
175#define IRQ_MMP2_SM 63
176
177#define IRQ_MMP2_MUX_BASE 64
178
179/* secondary interrupt of INT #4 */
180#define IRQ_MMP2_PMIC_BASE (IRQ_MMP2_MUX_BASE)
181#define IRQ_MMP2_CHARGER (IRQ_MMP2_PMIC_BASE + 0)
182#define IRQ_MMP2_PMIC (IRQ_MMP2_PMIC_BASE + 1)
183
184/* secondary interrupt of INT #5 */
185#define IRQ_MMP2_RTC_BASE (IRQ_MMP2_PMIC_BASE + 2)
186#define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0)
187#define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1)
188
189/* secondary interrupt of INT #17 */
190#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_RTC_BASE + 2)
191#define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0)
192#define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1)
193#define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2)
194#define IRQ_MMP2_TWSI5 (IRQ_MMP2_TWSI_BASE + 3)
195#define IRQ_MMP2_TWSI6 (IRQ_MMP2_TWSI_BASE + 4)
196
197/* secondary interrupt of INT #35 */
198#define IRQ_MMP2_MISC_BASE (IRQ_MMP2_TWSI_BASE + 5)
199#define IRQ_MMP2_PERF (IRQ_MMP2_MISC_BASE + 0)
200#define IRQ_MMP2_L2_PA_ECC (IRQ_MMP2_MISC_BASE + 1)
201#define IRQ_MMP2_L2_ECC (IRQ_MMP2_MISC_BASE + 2)
202#define IRQ_MMP2_L2_UECC (IRQ_MMP2_MISC_BASE + 3)
203#define IRQ_MMP2_DDR (IRQ_MMP2_MISC_BASE + 4)
204#define IRQ_MMP2_FAB0_TIMEOUT (IRQ_MMP2_MISC_BASE + 5)
205#define IRQ_MMP2_FAB1_TIMEOUT (IRQ_MMP2_MISC_BASE + 6)
206#define IRQ_MMP2_FAB2_TIMEOUT (IRQ_MMP2_MISC_BASE + 7)
207#define IRQ_MMP2_THERMAL (IRQ_MMP2_MISC_BASE + 9)
208#define IRQ_MMP2_MAIN_PMU (IRQ_MMP2_MISC_BASE + 10)
209#define IRQ_MMP2_WDT2 (IRQ_MMP2_MISC_BASE + 11)
210#define IRQ_MMP2_CORESIGHT (IRQ_MMP2_MISC_BASE + 12)
211#define IRQ_MMP2_COMMTX (IRQ_MMP2_MISC_BASE + 13)
212#define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14)
213
214/* secondary interrupt of INT #51 */
215#define IRQ_MMP2_SSP_BASE (IRQ_MMP2_MISC_BASE + 15)
216#define IRQ_MMP2_SSP1_SRDY (IRQ_MMP2_SSP_BASE + 0)
217#define IRQ_MMP2_SSP3_SRDY (IRQ_MMP2_SSP_BASE + 1)
218
219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2)
220
221#define IRQ_GPIO_START 128
222#define IRQ_GPIO_NUM 192
118#define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) 223#define IRQ_GPIO(x) (IRQ_GPIO_START + (x))
119 224
120#define NR_IRQS (IRQ_GPIO_START + IRQ_GPIO_NUM) 225/* Board IRQ - 64 by default, increase if not enough */
226#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM)
227#define IRQ_BOARD_END (IRQ_BOARD_START + 64)
228
229#define NR_IRQS (IRQ_BOARD_END)
121 230
122#endif /* __ASM_MACH_IRQS_H */ 231#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
new file mode 100644
index 000000000000..9f9f8143e272
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -0,0 +1,240 @@
1#ifndef __ASM_MACH_MFP_MMP2_H
2#define __ASM_MACH_MFP_MMP2_H
3
4#include <mach/mfp.h>
5
6#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
7#define MFP_DRIVE_SLOW (0x2 << 13)
8#define MFP_DRIVE_MEDIUM (0x4 << 13)
9#define MFP_DRIVE_FAST (0x8 << 13)
10
11/* GPIO */
12
13/* DFI */
14#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
15#define GPIO109_DFI_D14 MFP_CFG(GPIO109, AF0)
16#define GPIO110_DFI_D13 MFP_CFG(GPIO110, AF0)
17#define GPIO161_DFI_D12 MFP_CFG(GPIO161, AF0)
18#define GPIO162_DFI_D11 MFP_CFG(GPIO162, AF0)
19#define GPIO163_DFI_D10 MFP_CFG(GPIO163, AF0)
20#define GPIO164_DFI_D9 MFP_CFG(GPIO164, AF0)
21#define GPIO111_DFI_D8 MFP_CFG(GPIO111, AF0)
22#define GPIO104_DFI_D7 MFP_CFG(GPIO104, AF0)
23#define GPIO105_DFI_D6 MFP_CFG(GPIO105, AF0)
24#define GPIO106_DFI_D5 MFP_CFG(GPIO106, AF0)
25#define GPIO107_DFI_D4 MFP_CFG(GPIO107, AF0)
26#define GPIO165_DFI_D3 MFP_CFG(GPIO165, AF0)
27#define GPIO166_DFI_D2 MFP_CFG(GPIO166, AF0)
28#define GPIO167_DFI_D1 MFP_CFG(GPIO167, AF0)
29#define GPIO168_DFI_D0 MFP_CFG(GPIO168, AF0)
30#define GPIO143_ND_nCS0 MFP_CFG(GPIO143, AF0)
31#define GPIO144_ND_nCS1 MFP_CFG(GPIO144, AF0)
32#define GPIO147_ND_nWE MFP_CFG(GPIO147, AF0)
33#define GPIO148_ND_nRE MFP_CFG(GPIO148, AF0)
34#define GPIO150_ND_ALE MFP_CFG(GPIO150, AF0)
35#define GPIO149_ND_CLE MFP_CFG(GPIO149, AF0)
36#define GPIO112_ND_RDY0 MFP_CFG(GPIO112, AF0)
37#define GPIO160_ND_RDY1 MFP_CFG(GPIO160, AF0)
38
39/* Static Memory Controller */
40#define GPIO145_SMC_nCS0 MFP_CFG(GPIO145, AF0)
41#define GPIO146_SMC_nCS1 MFP_CFG(GPIO146, AF0)
42#define GPIO152_SMC_BE0 MFP_CFG(GPIO152, AF0)
43#define GPIO153_SMC_BE1 MFP_CFG(GPIO153, AF0)
44#define GPIO154_SMC_IRQ MFP_CFG(GPIO154, AF0)
45#define GPIO113_SMC_RDY MFP_CFG(GPIO113, AF0)
46#define GPIO151_SMC_SCLK MFP_CFG(GPIO151, AF0)
47
48/* Ethernet */
49#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2)
50#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1)
51
52/* UART1 */
53#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1)
54#define GPIO46_UART1_TXD MFP_CFG(GPIO46, AF1)
55#define GPIO29_UART1_RXD MFP_CFG(GPIO29, AF1)
56#define GPIO30_UART1_TXD MFP_CFG(GPIO30, AF1)
57#define GPIO31_UART1_CTS MFP_CFG(GPIO31, AF1)
58#define GPIO32_UART1_RTS MFP_CFG(GPIO32, AF1)
59
60/* UART2 */
61#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF1)
62#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF1)
63#define GPIO49_UART2_CTS MFP_CFG(GPIO49, AF1)
64#define GPIO50_UART2_RTS MFP_CFG(GPIO50, AF1)
65
66/* UART3 */
67#define GPIO51_UART3_RXD MFP_CFG(GPIO51, AF1)
68#define GPIO52_UART3_TXD MFP_CFG(GPIO52, AF1)
69#define GPIO53_UART3_CTS MFP_CFG(GPIO53, AF1)
70#define GPIO54_UART3_RTS MFP_CFG(GPIO54, AF1)
71
72/* MMC1 */
73#define GPIO124_MMC1_DAT7 MFP_CFG_DRV(GPIO124, AF1, FAST)
74#define GPIO125_MMC1_DAT6 MFP_CFG_DRV(GPIO125, AF1, FAST)
75#define GPIO129_MMC1_DAT5 MFP_CFG_DRV(GPIO129, AF1, FAST)
76#define GPIO130_MMC1_DAT4 MFP_CFG_DRV(GPIO130, AF1, FAST)
77#define GPIO131_MMC1_DAT3 MFP_CFG_DRV(GPIO131, AF1, FAST)
78#define GPIO132_MMC1_DAT2 MFP_CFG_DRV(GPIO132, AF1, FAST)
79#define GPIO133_MMC1_DAT1 MFP_CFG_DRV(GPIO133, AF1, FAST)
80#define GPIO134_MMC1_DAT0 MFP_CFG_DRV(GPIO134, AF1, FAST)
81#define GPIO136_MMC1_CMD MFP_CFG_DRV(GPIO136, AF1, FAST)
82#define GPIO139_MMC1_CLK MFP_CFG_DRV(GPIO139, AF1, FAST)
83#define GPIO140_MMC1_CD MFP_CFG_DRV(GPIO140, AF1, FAST)
84#define GPIO141_MMC1_WP MFP_CFG_DRV(GPIO141, AF1, FAST)
85
86/*MMC2*/
87#define GPIO37_MMC2_DAT3 MFP_CFG_DRV(GPIO37, AF1, FAST)
88#define GPIO38_MMC2_DAT2 MFP_CFG_DRV(GPIO38, AF1, FAST)
89#define GPIO39_MMC2_DAT1 MFP_CFG_DRV(GPIO39, AF1, FAST)
90#define GPIO40_MMC2_DAT0 MFP_CFG_DRV(GPIO40, AF1, FAST)
91#define GPIO41_MMC2_CMD MFP_CFG_DRV(GPIO41, AF1, FAST)
92#define GPIO42_MMC2_CLK MFP_CFG_DRV(GPIO42, AF1, FAST)
93
94/*MMC3*/
95#define GPIO165_MMC3_DAT7 MFP_CFG_DRV(GPIO165, AF2, FAST)
96#define GPIO162_MMC3_DAT6 MFP_CFG_DRV(GPIO162, AF2, FAST)
97#define GPIO166_MMC3_DAT5 MFP_CFG_DRV(GPIO166, AF2, FAST)
98#define GPIO163_MMC3_DAT4 MFP_CFG_DRV(GPIO163, AF2, FAST)
99#define GPIO167_MMC3_DAT3 MFP_CFG_DRV(GPIO167, AF2, FAST)
100#define GPIO164_MMC3_DAT2 MFP_CFG_DRV(GPIO164, AF2, FAST)
101#define GPIO168_MMC3_DAT1 MFP_CFG_DRV(GPIO168, AF2, FAST)
102#define GPIO111_MMC3_DAT0 MFP_CFG_DRV(GPIO111, AF2, FAST)
103#define GPIO112_MMC3_CMD MFP_CFG_DRV(GPIO112, AF2, FAST)
104#define GPIO151_MMC3_CLK MFP_CFG_DRV(GPIO151, AF2, FAST)
105
106/* LCD */
107#define GPIO74_LCD_FCLK MFP_CFG_DRV(GPIO74, AF1, FAST)
108#define GPIO75_LCD_LCLK MFP_CFG_DRV(GPIO75, AF1, FAST)
109#define GPIO76_LCD_PCLK MFP_CFG_DRV(GPIO76, AF1, FAST)
110#define GPIO77_LCD_DENA MFP_CFG_DRV(GPIO77, AF1, FAST)
111#define GPIO78_LCD_DD0 MFP_CFG_DRV(GPIO78, AF1, FAST)
112#define GPIO79_LCD_DD1 MFP_CFG_DRV(GPIO79, AF1, FAST)
113#define GPIO80_LCD_DD2 MFP_CFG_DRV(GPIO80, AF1, FAST)
114#define GPIO81_LCD_DD3 MFP_CFG_DRV(GPIO81, AF1, FAST)
115#define GPIO82_LCD_DD4 MFP_CFG_DRV(GPIO82, AF1, FAST)
116#define GPIO83_LCD_DD5 MFP_CFG_DRV(GPIO83, AF1, FAST)
117#define GPIO84_LCD_DD6 MFP_CFG_DRV(GPIO84, AF1, FAST)
118#define GPIO85_LCD_DD7 MFP_CFG_DRV(GPIO85, AF1, FAST)
119#define GPIO86_LCD_DD8 MFP_CFG_DRV(GPIO86, AF1, FAST)
120#define GPIO87_LCD_DD9 MFP_CFG_DRV(GPIO87, AF1, FAST)
121#define GPIO88_LCD_DD10 MFP_CFG_DRV(GPIO88, AF1, FAST)
122#define GPIO89_LCD_DD11 MFP_CFG_DRV(GPIO89, AF1, FAST)
123#define GPIO90_LCD_DD12 MFP_CFG_DRV(GPIO90, AF1, FAST)
124#define GPIO91_LCD_DD13 MFP_CFG_DRV(GPIO91, AF1, FAST)
125#define GPIO92_LCD_DD14 MFP_CFG_DRV(GPIO92, AF1, FAST)
126#define GPIO93_LCD_DD15 MFP_CFG_DRV(GPIO93, AF1, FAST)
127#define GPIO94_LCD_DD16 MFP_CFG_DRV(GPIO94, AF1, FAST)
128#define GPIO95_LCD_DD17 MFP_CFG_DRV(GPIO95, AF1, FAST)
129#define GPIO96_LCD_DD18 MFP_CFG_DRV(GPIO96, AF1, FAST)
130#define GPIO97_LCD_DD19 MFP_CFG_DRV(GPIO97, AF1, FAST)
131#define GPIO98_LCD_DD20 MFP_CFG_DRV(GPIO98, AF1, FAST)
132#define GPIO99_LCD_DD21 MFP_CFG_DRV(GPIO99, AF1, FAST)
133#define GPIO100_LCD_DD22 MFP_CFG_DRV(GPIO100, AF1, FAST)
134#define GPIO101_LCD_DD23 MFP_CFG_DRV(GPIO101, AF1, FAST)
135#define GPIO94_SPI_DCLK MFP_CFG_DRV(GPIO94, AF3, FAST)
136#define GPIO95_SPI_CS0 MFP_CFG_DRV(GPIO95, AF3, FAST)
137#define GPIO96_SPI_DIN MFP_CFG_DRV(GPIO96, AF3, FAST)
138#define GPIO97_SPI_DOUT MFP_CFG_DRV(GPIO97, AF3, FAST)
139#define GPIO98_LCD_RST MFP_CFG_DRV(GPIO98, AF0, FAST)
140
141#define GPIO114_MN_CLK_OUT MFP_CFG_DRV(GPIO114, AF1, FAST)
142
143/*LCD TV path*/
144#define GPIO124_LCD_DD24 MFP_CFG_DRV(GPIO124, AF2, FAST)
145#define GPIO125_LCD_DD25 MFP_CFG_DRV(GPIO125, AF2, FAST)
146#define GPIO126_LCD_DD33 MFP_CFG_DRV(GPIO126, AF2, FAST)
147#define GPIO127_LCD_DD26 MFP_CFG_DRV(GPIO127, AF2, FAST)
148#define GPIO128_LCD_DD27 MFP_CFG_DRV(GPIO128, AF2, FAST)
149#define GPIO129_LCD_DD28 MFP_CFG_DRV(GPIO129, AF2, FAST)
150#define GPIO130_LCD_DD29 MFP_CFG_DRV(GPIO130, AF2, FAST)
151#define GPIO135_LCD_DD30 MFP_CFG_DRV(GPIO135, AF2, FAST)
152#define GPIO137_LCD_DD31 MFP_CFG_DRV(GPIO137, AF2, FAST)
153#define GPIO138_LCD_DD32 MFP_CFG_DRV(GPIO138, AF2, FAST)
154#define GPIO140_LCD_DD34 MFP_CFG_DRV(GPIO140, AF2, FAST)
155#define GPIO141_LCD_DD35 MFP_CFG_DRV(GPIO141, AF2, FAST)
156
157/* I2C */
158#define GPIO43_TWSI2_SCL MFP_CFG_DRV(GPIO43, AF1, SLOW)
159#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW)
160#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW)
161#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW)
162#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW)
163#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW)
164#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW)
165#define GPIO98_TWSI6_SDA MFP_CFG_DRV(GPIO98, AF2, SLOW)
166
167/* SSPA1 */
168#define GPIO24_I2S_SYSCLK MFP_CFG(GPIO24, AF1)
169#define GPIO25_I2S_BITCLK MFP_CFG(GPIO25, AF1)
170#define GPIO26_I2S_SYNC MFP_CFG(GPIO26, AF1)
171#define GPIO27_I2S_DATA_OUT MFP_CFG(GPIO27, AF1)
172#define GPIO28_I2S_SDATA_IN MFP_CFG(GPIO28, AF1)
173#define GPIO114_I2S_MCLK MFP_CFG(GPIO114, AF1)
174
175/* SSPA2 */
176#define GPIO33_SSPA2_CLK MFP_CFG(GPIO33, AF1)
177#define GPIO34_SSPA2_FRM MFP_CFG(GPIO34, AF1)
178#define GPIO35_SSPA2_TXD MFP_CFG(GPIO35, AF1)
179#define GPIO36_SSPA2_RXD MFP_CFG(GPIO36, AF1)
180
181/* Keypad */
182#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1)
183#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1)
184#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1)
185#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1)
186#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1)
187#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1)
188#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1)
189#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1)
190#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1)
191#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1)
192#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1)
193#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1)
194#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1)
195#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1)
196#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1)
197#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1)
198#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1)
199#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1)
200#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1)
201#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1)
202#define GPIO20_KP_DKIN4 MFP_CFG(GPIO20, AF1)
203#define GPIO21_KP_DKIN5 MFP_CFG(GPIO21, AF1)
204#define GPIO22_KP_DKIN6 MFP_CFG(GPIO22, AF1)
205#define GPIO23_KP_DKIN7 MFP_CFG(GPIO23, AF1)
206
207/* CAMERA */
208#define GPIO59_CCIC_IN7 MFP_CFG_DRV(GPIO59, AF1, FAST)
209#define GPIO60_CCIC_IN6 MFP_CFG_DRV(GPIO60, AF1, FAST)
210#define GPIO61_CCIC_IN5 MFP_CFG_DRV(GPIO61, AF1, FAST)
211#define GPIO62_CCIC_IN4 MFP_CFG_DRV(GPIO62, AF1, FAST)
212#define GPIO63_CCIC_IN3 MFP_CFG_DRV(GPIO63, AF1, FAST)
213#define GPIO64_CCIC_IN2 MFP_CFG_DRV(GPIO64, AF1, FAST)
214#define GPIO65_CCIC_IN1 MFP_CFG_DRV(GPIO65, AF1, FAST)
215#define GPIO66_CCIC_IN0 MFP_CFG_DRV(GPIO66, AF1, FAST)
216#define GPIO67_CAM_HSYNC MFP_CFG_DRV(GPIO67, AF1, FAST)
217#define GPIO68_CAM_VSYNC MFP_CFG_DRV(GPIO68, AF1, FAST)
218#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST)
219#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST)
220
221/* Wifi */
222#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0)
223#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0)
224#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0)
225#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0)
226#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0)
227#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0)
228#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0)
229#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0)
230
231/* Codec*/
232#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0)
233
234#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0)
235
236/* PMIC */
237#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0)
238
239#endif /* __ASM_MACH_MFP_MMP2_H */
240
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index 3b216bf41e7f..ded43c455ec3 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -193,7 +193,9 @@
193#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3) 193#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3)
194#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) 194#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3)
195 195
196/* UART1 */ 196/* UART */
197#define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2)
198#define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2)
197#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) 199#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST)
198#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST) 200#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST)
199#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST) 201#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST)
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
new file mode 100644
index 000000000000..459f3be9cfb2
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -0,0 +1,60 @@
1#ifndef __ASM_MACH_MMP2_H
2#define __ASM_MACH_MMP2_H
3
4#include <linux/i2c.h>
5#include <mach/devices.h>
6#include <plat/i2c.h>
7
8extern struct pxa_device_desc mmp2_device_uart1;
9extern struct pxa_device_desc mmp2_device_uart2;
10extern struct pxa_device_desc mmp2_device_uart3;
11extern struct pxa_device_desc mmp2_device_uart4;
12extern struct pxa_device_desc mmp2_device_twsi1;
13extern struct pxa_device_desc mmp2_device_twsi2;
14extern struct pxa_device_desc mmp2_device_twsi3;
15extern struct pxa_device_desc mmp2_device_twsi4;
16extern struct pxa_device_desc mmp2_device_twsi5;
17extern struct pxa_device_desc mmp2_device_twsi6;
18
19static inline int mmp2_add_uart(int id)
20{
21 struct pxa_device_desc *d = NULL;
22
23 switch (id) {
24 case 1: d = &mmp2_device_uart1; break;
25 case 2: d = &mmp2_device_uart2; break;
26 case 3: d = &mmp2_device_uart3; break;
27 case 4: d = &mmp2_device_uart4; break;
28 default:
29 return -EINVAL;
30 }
31
32 return pxa_register_device(d, NULL, 0);
33}
34
35static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
36 struct i2c_board_info *info, unsigned size)
37{
38 struct pxa_device_desc *d = NULL;
39 int ret;
40
41 switch (id) {
42 case 0: d = &mmp2_device_twsi1; break;
43 case 1: d = &mmp2_device_twsi2; break;
44 case 2: d = &mmp2_device_twsi3; break;
45 case 3: d = &mmp2_device_twsi4; break;
46 case 4: d = &mmp2_device_twsi5; break;
47 case 5: d = &mmp2_device_twsi6; break;
48 default:
49 return -EINVAL;
50 }
51
52 ret = i2c_register_board_info(id, info, size);
53 if (ret)
54 return ret;
55
56 return pxa_register_device(d, data, sizeof(*data));
57}
58
59#endif /* __ASM_MACH_MMP2_H */
60
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 98ccbee4bd0c..712af03fd1af 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -69,6 +69,47 @@
69#define APBC_PXA910_ASFAR APBC_REG(0x050) 69#define APBC_PXA910_ASFAR APBC_REG(0x050)
70#define APBC_PXA910_ASSAR APBC_REG(0x054) 70#define APBC_PXA910_ASSAR APBC_REG(0x054)
71 71
72/*
73 * APB Clock register offsets for MMP2
74 */
75#define APBC_MMP2_RTC APBC_REG(0x000)
76#define APBC_MMP2_TWSI1 APBC_REG(0x004)
77#define APBC_MMP2_TWSI2 APBC_REG(0x008)
78#define APBC_MMP2_TWSI3 APBC_REG(0x00c)
79#define APBC_MMP2_TWSI4 APBC_REG(0x010)
80#define APBC_MMP2_ONEWIRE APBC_REG(0x014)
81#define APBC_MMP2_KPC APBC_REG(0x018)
82#define APBC_MMP2_TB_ROTARY APBC_REG(0x01c)
83#define APBC_MMP2_SW_JTAG APBC_REG(0x020)
84#define APBC_MMP2_TIMERS APBC_REG(0x024)
85#define APBC_MMP2_UART1 APBC_REG(0x02c)
86#define APBC_MMP2_UART2 APBC_REG(0x030)
87#define APBC_MMP2_UART3 APBC_REG(0x034)
88#define APBC_MMP2_GPIO APBC_REG(0x038)
89#define APBC_MMP2_PWM0 APBC_REG(0x03c)
90#define APBC_MMP2_PWM1 APBC_REG(0x040)
91#define APBC_MMP2_PWM2 APBC_REG(0x044)
92#define APBC_MMP2_PWM3 APBC_REG(0x048)
93#define APBC_MMP2_SSP0 APBC_REG(0x04c)
94#define APBC_MMP2_SSP1 APBC_REG(0x050)
95#define APBC_MMP2_SSP2 APBC_REG(0x054)
96#define APBC_MMP2_SSP3 APBC_REG(0x058)
97#define APBC_MMP2_SSP4 APBC_REG(0x05c)
98#define APBC_MMP2_SSP5 APBC_REG(0x060)
99#define APBC_MMP2_AIB APBC_REG(0x064)
100#define APBC_MMP2_ASFAR APBC_REG(0x068)
101#define APBC_MMP2_ASSAR APBC_REG(0x06c)
102#define APBC_MMP2_USIM APBC_REG(0x070)
103#define APBC_MMP2_MPMU APBC_REG(0x074)
104#define APBC_MMP2_IPC APBC_REG(0x078)
105#define APBC_MMP2_TWSI5 APBC_REG(0x07c)
106#define APBC_MMP2_TWSI6 APBC_REG(0x080)
107#define APBC_MMP2_TWSI_INTSTS APBC_REG(0x084)
108#define APBC_MMP2_UART4 APBC_REG(0x088)
109#define APBC_MMP2_RIPC APBC_REG(0x08c)
110#define APBC_MMP2_THSENS1 APBC_REG(0x090) /* Thermal Sensor */
111#define APBC_MMP2_THSENS_INTSTS APBC_REG(0x0a4)
112
72/* Common APB clock register bit definitions */ 113/* Common APB clock register bit definitions */
73#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ 114#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
74#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */ 115#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
diff --git a/arch/arm/mach-mmp/include/mach/regs-icu.h b/arch/arm/mach-mmp/include/mach/regs-icu.h
index e5f08723e0cc..f882d91894be 100644
--- a/arch/arm/mach-mmp/include/mach/regs-icu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-icu.h
@@ -17,10 +17,12 @@
17#define ICU_REG(x) (ICU_VIRT_BASE + (x)) 17#define ICU_REG(x) (ICU_VIRT_BASE + (x))
18 18
19#define ICU_INT_CONF(n) ICU_REG((n) << 2) 19#define ICU_INT_CONF(n) ICU_REG((n) << 2)
20#define ICU_INT_CONF_MASK (0xf)
21
22/************ PXA168/PXA910 (MMP) *********************/
20#define ICU_INT_CONF_AP_INT (1 << 6) 23#define ICU_INT_CONF_AP_INT (1 << 6)
21#define ICU_INT_CONF_CP_INT (1 << 5) 24#define ICU_INT_CONF_CP_INT (1 << 5)
22#define ICU_INT_CONF_IRQ (1 << 4) 25#define ICU_INT_CONF_IRQ (1 << 4)
23#define ICU_INT_CONF_MASK (0xf)
24 26
25#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */ 27#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */
26#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */ 28#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */
@@ -28,4 +30,42 @@
28#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */ 30#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */
29#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */ 31#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */
30 32
33/************************** MMP2 ***********************/
34
35/*
36 * IRQ0/FIQ0 is routed to SP IRQ/FIQ.
37 * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
38 */
39#define ICU_INT_ROUTE_SP_IRQ (1 << 4)
40#define ICU_INT_ROUTE_PJ4_IRQ (1 << 5)
41#define ICU_INT_ROUTE_PJ4_FIQ (1 << 6)
42
43#define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138)
44#define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c)
45#define MMP2_ICU_PJ4_FIQ_STATUS0 ICU_REG(0x140)
46#define MMP2_ICU_PJ4_FIQ_STATUS1 ICU_REG(0x144)
47
48#define MMP2_ICU_INT4_STATUS ICU_REG(0x150)
49#define MMP2_ICU_INT5_STATUS ICU_REG(0x154)
50#define MMP2_ICU_INT17_STATUS ICU_REG(0x158)
51#define MMP2_ICU_INT35_STATUS ICU_REG(0x15c)
52#define MMP2_ICU_INT51_STATUS ICU_REG(0x160)
53
54#define MMP2_ICU_INT4_MASK ICU_REG(0x168)
55#define MMP2_ICU_INT5_MASK ICU_REG(0x16C)
56#define MMP2_ICU_INT17_MASK ICU_REG(0x170)
57#define MMP2_ICU_INT35_MASK ICU_REG(0x174)
58#define MMP2_ICU_INT51_MASK ICU_REG(0x178)
59
60#define MMP2_ICU_SP_IRQ_SEL ICU_REG(0x100)
61#define MMP2_ICU_PJ4_IRQ_SEL ICU_REG(0x104)
62#define MMP2_ICU_PJ4_FIQ_SEL ICU_REG(0x108)
63
64#define MMP2_ICU_INVERT ICU_REG(0x164)
65
66#define MMP2_ICU_INV_PMIC (1 << 0)
67#define MMP2_ICU_INV_PERF (1 << 1)
68#define MMP2_ICU_INV_COMMTX (1 << 2)
69#define MMP2_ICU_INV_COMMRX (1 << 3)
70
31#endif /* __ASM_MACH_ICU_H */ 71#endif /* __ASM_MACH_ICU_H */
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
index c93d5fa5865c..a7dcc5307216 100644
--- a/arch/arm/mach-mmp/include/mach/uncompress.h
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -8,15 +8,16 @@
8 8
9#include <linux/serial_reg.h> 9#include <linux/serial_reg.h>
10#include <mach/addr-map.h> 10#include <mach/addr-map.h>
11#include <asm/mach-types.h>
11 12
12#define UART1_BASE (APB_PHYS_BASE + 0x36000) 13#define UART1_BASE (APB_PHYS_BASE + 0x36000)
13#define UART2_BASE (APB_PHYS_BASE + 0x17000) 14#define UART2_BASE (APB_PHYS_BASE + 0x17000)
14#define UART3_BASE (APB_PHYS_BASE + 0x18000) 15#define UART3_BASE (APB_PHYS_BASE + 0x18000)
15 16
17static volatile unsigned long *UART = (unsigned long *)UART2_BASE;
18
16static inline void putc(char c) 19static inline void putc(char c)
17{ 20{
18 volatile unsigned long *UART = (unsigned long *)UART2_BASE;
19
20 /* UART enabled? */ 21 /* UART enabled? */
21 if (!(UART[UART_IER] & UART_IER_UUE)) 22 if (!(UART[UART_IER] & UART_IER_UUE))
22 return; 23 return;
@@ -34,8 +35,14 @@ static inline void flush(void)
34{ 35{
35} 36}
36 37
38static inline void arch_decomp_setup(void)
39{
40 if (machine_is_avengers_lite())
41 UART = (unsigned long *)UART3_BASE;
42}
43
37/* 44/*
38 * nothing to do 45 * nothing to do
39 */ 46 */
40#define arch_decomp_setup() 47
41#define arch_decomp_wdog() 48#define arch_decomp_wdog()
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
new file mode 100644
index 000000000000..cb18221c0af3
--- /dev/null
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -0,0 +1,154 @@
1/*
2 * linux/arch/arm/mach-mmp/irq-mmp2.c
3 *
4 * Generic IRQ handling, GPIO IRQ demultiplexing, etc.
5 *
6 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
7 * Copyright: Marvell International Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17
18#include <mach/regs-icu.h>
19
20#include "common.h"
21
22static void icu_mask_irq(unsigned int irq)
23{
24 uint32_t r = __raw_readl(ICU_INT_CONF(irq));
25
26 r &= ~ICU_INT_ROUTE_PJ4_IRQ;
27 __raw_writel(r, ICU_INT_CONF(irq));
28}
29
30static void icu_unmask_irq(unsigned int irq)
31{
32 uint32_t r = __raw_readl(ICU_INT_CONF(irq));
33
34 r |= ICU_INT_ROUTE_PJ4_IRQ;
35 __raw_writel(r, ICU_INT_CONF(irq));
36}
37
38static struct irq_chip icu_irq_chip = {
39 .name = "icu_irq",
40 .mask = icu_mask_irq,
41 .mask_ack = icu_mask_irq,
42 .unmask = icu_unmask_irq,
43};
44
45static void pmic_irq_ack(unsigned int irq)
46{
47 if (irq == IRQ_MMP2_PMIC)
48 mmp2_clear_pmic_int();
49}
50
51#define SECOND_IRQ_MASK(_name_, irq_base, prefix) \
52static void _name_##_mask_irq(unsigned int irq) \
53{ \
54 uint32_t r; \
55 r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base)); \
56 __raw_writel(r, prefix##_MASK); \
57}
58
59#define SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \
60static void _name_##_unmask_irq(unsigned int irq) \
61{ \
62 uint32_t r; \
63 r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base)); \
64 __raw_writel(r, prefix##_MASK); \
65}
66
67#define SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \
68static void _name_##_irq_demux(unsigned int irq, struct irq_desc *desc) \
69{ \
70 unsigned long status, mask, n; \
71 mask = __raw_readl(prefix##_MASK); \
72 while (1) { \
73 status = __raw_readl(prefix##_STATUS) & ~mask; \
74 if (status == 0) \
75 break; \
76 n = find_first_bit(&status, BITS_PER_LONG); \
77 while (n < BITS_PER_LONG) { \
78 generic_handle_irq(irq_base + n); \
79 n = find_next_bit(&status, BITS_PER_LONG, n+1); \
80 } \
81 } \
82}
83
84#define SECOND_IRQ_CHIP(_name_, irq_base, prefix) \
85SECOND_IRQ_MASK(_name_, irq_base, prefix) \
86SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \
87SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \
88static struct irq_chip _name_##_irq_chip = { \
89 .name = #_name_, \
90 .mask = _name_##_mask_irq, \
91 .unmask = _name_##_unmask_irq, \
92}
93
94SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);
95SECOND_IRQ_CHIP(rtc, IRQ_MMP2_RTC_BASE, MMP2_ICU_INT5);
96SECOND_IRQ_CHIP(twsi, IRQ_MMP2_TWSI_BASE, MMP2_ICU_INT17);
97SECOND_IRQ_CHIP(misc, IRQ_MMP2_MISC_BASE, MMP2_ICU_INT35);
98SECOND_IRQ_CHIP(ssp, IRQ_MMP2_SSP_BASE, MMP2_ICU_INT51);
99
100static void init_mux_irq(struct irq_chip *chip, int start, int num)
101{
102 int irq;
103
104 for (irq = start; num > 0; irq++, num--) {
105 /* mask and clear the IRQ */
106 chip->mask(irq);
107 if (chip->ack)
108 chip->ack(irq);
109
110 set_irq_chip(irq, chip);
111 set_irq_flags(irq, IRQF_VALID);
112 set_irq_handler(irq, handle_level_irq);
113 }
114}
115
116void __init mmp2_init_icu(void)
117{
118 int irq;
119
120 for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
121 icu_mask_irq(irq);
122 set_irq_chip(irq, &icu_irq_chip);
123 set_irq_flags(irq, IRQF_VALID);
124
125 switch (irq) {
126 case IRQ_MMP2_PMIC_MUX:
127 case IRQ_MMP2_RTC_MUX:
128 case IRQ_MMP2_TWSI_MUX:
129 case IRQ_MMP2_MISC_MUX:
130 case IRQ_MMP2_SSP_MUX:
131 break;
132 default:
133 set_irq_handler(irq, handle_level_irq);
134 break;
135 }
136 }
137
138 /* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register
139 * to be written to clear the interrupt
140 */
141 pmic_irq_chip.ack = pmic_irq_ack;
142
143 init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);
144 init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);
145 init_mux_irq(&twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5);
146 init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
147 init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
148
149 set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
150 set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
151 set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
152 set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
153 set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
154}
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq-pxa168.c
index 52ff2f065eba..52ff2f065eba 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
new file mode 100644
index 000000000000..cfd4d66ef800
--- /dev/null
+++ b/arch/arm/mach-mmp/jasper.c
@@ -0,0 +1,80 @@
1/*
2 * linux/arch/arm/mach-mmp/jasper.c
3 *
4 * Support for the Marvell Jasper Development Platform.
5 *
6 * Copyright (C) 2009-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/gpio.h>
18
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <mach/addr-map.h>
22#include <mach/mfp-mmp2.h>
23#include <mach/mmp2.h>
24
25#include "common.h"
26
27static unsigned long jasper_pin_config[] __initdata = {
28 /* UART1 */
29 GPIO29_UART1_RXD,
30 GPIO30_UART1_TXD,
31
32 /* UART3 */
33 GPIO51_UART3_RXD,
34 GPIO52_UART3_TXD,
35
36 /* DFI */
37 GPIO168_DFI_D0,
38 GPIO167_DFI_D1,
39 GPIO166_DFI_D2,
40 GPIO165_DFI_D3,
41 GPIO107_DFI_D4,
42 GPIO106_DFI_D5,
43 GPIO105_DFI_D6,
44 GPIO104_DFI_D7,
45 GPIO111_DFI_D8,
46 GPIO164_DFI_D9,
47 GPIO163_DFI_D10,
48 GPIO162_DFI_D11,
49 GPIO161_DFI_D12,
50 GPIO110_DFI_D13,
51 GPIO109_DFI_D14,
52 GPIO108_DFI_D15,
53 GPIO143_ND_nCS0,
54 GPIO144_ND_nCS1,
55 GPIO147_ND_nWE,
56 GPIO148_ND_nRE,
57 GPIO150_ND_ALE,
58 GPIO149_ND_CLE,
59 GPIO112_ND_RDY0,
60 GPIO160_ND_RDY1,
61};
62
63static void __init jasper_init(void)
64{
65 mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
66
67 /* on-chip devices */
68 mmp2_add_uart(1);
69 mmp2_add_uart(3);
70}
71
72MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
73 .phys_io = APB_PHYS_BASE,
74 .boot_params = 0x00000100,
75 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
76 .map_io = pxa_map_io,
77 .init_irq = mmp2_init_irq,
78 .timer = &mmp2_timer,
79 .init_machine = jasper_init,
80MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
new file mode 100644
index 000000000000..72eb9daeea99
--- /dev/null
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -0,0 +1,123 @@
1/*
2 * linux/arch/arm/mach-mmp/mmp2.c
3 *
4 * code name MMP2
5 *
6 * Copyright (C) 2009 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/io.h>
17
18#include <mach/addr-map.h>
19#include <mach/regs-apbc.h>
20#include <mach/regs-apmu.h>
21#include <mach/cputype.h>
22#include <mach/irqs.h>
23#include <mach/mfp.h>
24#include <mach/gpio.h>
25#include <mach/devices.h>
26
27#include "common.h"
28#include "clock.h"
29
30#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
31
32#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
33
34static struct mfp_addr_map mmp2_addr_map[] __initdata = {
35 MFP_ADDR(PMIC_INT, 0x2c4),
36
37 MFP_ADDR_END,
38};
39
40void mmp2_clear_pmic_int(void)
41{
42 unsigned long mfpr_pmic, data;
43
44 mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
45 data = __raw_readl(mfpr_pmic);
46 __raw_writel(data | (1 << 6), mfpr_pmic);
47 __raw_writel(data, mfpr_pmic);
48}
49
50static void __init mmp2_init_gpio(void)
51{
52 int i;
53
54 /* enable GPIO clock */
55 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
56
57 /* unmask GPIO edge detection for all 6 banks -- APMASKx */
58 for (i = 0; i < 6; i++)
59 __raw_writel(0xffffffff, APMASK(i));
60
61 pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
62}
63
64void __init mmp2_init_irq(void)
65{
66 mmp2_init_icu();
67 mmp2_init_gpio();
68}
69
70/* APB peripheral clocks */
71static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
72static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
73static APBC_CLK(uart3, MMP2_UART3, 1, 26000000);
74static APBC_CLK(uart4, MMP2_UART4, 1, 26000000);
75static APBC_CLK(twsi1, MMP2_TWSI1, 0, 26000000);
76static APBC_CLK(twsi2, MMP2_TWSI2, 0, 26000000);
77static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
78static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
79static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
80static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
81static APBC_CLK(rtc, MMP2_RTC, 0, 32768);
82
83static APMU_CLK(nand, NAND, 0xbf, 100000000);
84
85static struct clk_lookup mmp2_clkregs[] = {
86 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
87 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
88 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
89 INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
90 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
91 INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
92 INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
93 INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
94 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
95 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
96 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
97};
98
99static int __init mmp2_init(void)
100{
101 if (cpu_is_mmp2()) {
102 mfp_init_base(MFPR_VIRT_BASE);
103 mfp_init_addr(mmp2_addr_map);
104 clks_register(ARRAY_AND_SIZE(mmp2_clkregs));
105 }
106
107 return 0;
108}
109postcore_initcall(mmp2_init);
110
111/* on-chip devices */
112MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
113MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
114MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
115MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19);
116MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70);
117MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70);
118MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70);
119MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
120MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
121MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
122MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
123
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index a8400bb891e7..cf75694e9687 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -30,7 +30,10 @@
30 30
31#include <mach/addr-map.h> 31#include <mach/addr-map.h>
32#include <mach/regs-timers.h> 32#include <mach/regs-timers.h>
33#include <mach/regs-apbc.h>
33#include <mach/irqs.h> 34#include <mach/irqs.h>
35#include <mach/cputype.h>
36#include <asm/mach/time.h>
34 37
35#include "clock.h" 38#include "clock.h"
36 39
@@ -158,7 +161,7 @@ static void __init timer_config(void)
158 161
159 __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */ 162 __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */
160 163
161 ccr &= TMR_CCR_CS_0(0x3); 164 ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3);
162 __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); 165 __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR);
163 166
164 /* free-running mode */ 167 /* free-running mode */
@@ -197,3 +200,24 @@ void __init timer_init(int irq)
197 clocksource_register(&cksrc); 200 clocksource_register(&cksrc);
198 clockevents_register_device(&ckevt); 201 clockevents_register_device(&ckevt);
199} 202}
203
204static void __init mmp2_timer_init(void)
205{
206 unsigned long clk_rst;
207
208 __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
209
210 /*
211 * enable bus/functional clock, enable 6.5MHz (divider 4),
212 * release reset
213 */
214 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
215 __raw_writel(clk_rst, APBC_MMP2_TIMERS);
216
217 timer_init(IRQ_MMP2_TIMER1);
218}
219
220struct sys_timer mmp2_timer = {
221 .init = mmp2_timer_init,
222};
223
diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig
index 6fbe68fe4412..f2d309d0619e 100644
--- a/arch/arm/mach-mv78xx0/Kconfig
+++ b/arch/arm/mach-mv78xx0/Kconfig
@@ -14,6 +14,12 @@ config MACH_RD78X00_MASA
14 Say 'Y' here if you want your kernel to support the 14 Say 'Y' here if you want your kernel to support the
15 Marvell RD-78x00-mASA Reference Design. 15 Marvell RD-78x00-mASA Reference Design.
16 16
17config MACH_TERASTATION_WXL
18 bool "Buffalo WLX (Terastation Duo) NAS"
19 help
20 Say 'Y' here if you want your kernel to support the
21 Buffalo WXL Nas.
22
17endmenu 23endmenu
18 24
19endif 25endif
diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile
index da628b7f3bb6..67a13f9bfe64 100644
--- a/arch/arm/mach-mv78xx0/Makefile
+++ b/arch/arm/mach-mv78xx0/Makefile
@@ -1,3 +1,4 @@
1obj-y += common.o addr-map.o irq.o pcie.o 1obj-y += common.o addr-map.o mpp.o irq.o pcie.o
2obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o 2obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o
3obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o 3obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
4obj-$(CONFIG_MACH_TERASTATION_WXL) += buffalo-wxl-setup.o
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
new file mode 100644
index 000000000000..61e5e583603b
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -0,0 +1,155 @@
1/*
2 * arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
3 *
4 * Buffalo WXL (Terastation Duo) Setup routines
5 *
6 * sebastien requiem <sebastien@requiem.fr>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/ata_platform.h>
17#include <linux/mv643xx_eth.h>
18#include <linux/ethtool.h>
19#include <linux/i2c.h>
20#include <mach/mv78xx0.h>
21#include <asm/mach-types.h>
22#include <asm/mach/arch.h>
23#include "common.h"
24#include "mpp.h"
25
26
27/* This arch has 2 Giga Ethernet */
28
29static struct mv643xx_eth_platform_data db78x00_ge00_data = {
30 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
31};
32
33static struct mv643xx_eth_platform_data db78x00_ge01_data = {
34 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
35};
36
37
38/* 2 SATA controller supporting HotPlug */
39
40static struct mv_sata_platform_data db78x00_sata_data = {
41 .n_ports = 2,
42};
43
44static struct i2c_board_info __initdata db78x00_i2c_rtc = {
45 I2C_BOARD_INFO("ds1338", 0x68),
46};
47
48
49static unsigned int wxl_mpp_config[] __initdata = {
50 MPP0_GE1_TXCLK,
51 MPP1_GE1_TXCTL,
52 MPP2_GE1_RXCTL,
53 MPP3_GE1_RXCLK,
54 MPP4_GE1_TXD0,
55 MPP5_GE1_TXD1,
56 MPP6_GE1_TXD2,
57 MPP7_GE1_TXD3,
58 MPP8_GE1_RXD0,
59 MPP9_GE1_RXD1,
60 MPP10_GE1_RXD2,
61 MPP11_GE1_RXD3,
62 MPP12_GPIO,
63 MPP13_SYSRST_OUTn,
64 MPP14_SATA1_ACTn,
65 MPP15_SATA0_ACTn,
66 MPP16_GPIO,
67 MPP17_GPIO,
68 MPP18_GPIO,
69 MPP19_GPIO,
70 MPP20_GPIO,
71 MPP21_GPIO,
72 MPP22_GPIO,
73 MPP23_GPIO,
74 MPP24_UA2_TXD,
75 MPP25_UA2_RXD,
76 MPP26_UA2_CTSn,
77 MPP27_UA2_RTSn,
78 MPP28_GPIO,
79 MPP29_SYSRST_OUTn,
80 MPP30_GPIO,
81 MPP31_GPIO,
82 MPP32_GPIO,
83 MPP33_GPIO,
84 MPP34_GPIO,
85 MPP35_GPIO,
86 MPP36_GPIO,
87 MPP37_GPIO,
88 MPP38_GPIO,
89 MPP39_GPIO,
90 MPP40_UNUSED,
91 MPP41_UNUSED,
92 MPP42_UNUSED,
93 MPP43_UNUSED,
94 MPP44_UNUSED,
95 MPP45_UNUSED,
96 MPP46_UNUSED,
97 MPP47_UNUSED,
98 MPP48_SATA1_ACTn,
99 MPP49_SATA0_ACTn,
100 0
101};
102
103
104static void __init wxl_init(void)
105{
106 /*
107 * Basic MV78xx0 setup. Needs to be called early.
108 */
109 mv78xx0_init();
110 mv78xx0_mpp_conf(wxl_mpp_config);
111
112 /*
113 * Partition on-chip peripherals between the two CPU cores.
114 */
115 mv78xx0_ehci0_init();
116 mv78xx0_ehci1_init();
117 mv78xx0_ehci2_init();
118 mv78xx0_ge00_init(&db78x00_ge00_data);
119 mv78xx0_ge01_init(&db78x00_ge01_data);
120 mv78xx0_sata_init(&db78x00_sata_data);
121 mv78xx0_uart0_init();
122 mv78xx0_uart1_init();
123 mv78xx0_uart2_init();
124 mv78xx0_uart3_init();
125 mv78xx0_i2c_init();
126 i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
127}
128
129static int __init wxl_pci_init(void)
130{
131 if (machine_is_terastation_wxl()) {
132 /*
133 * Assign the x16 PCIe slot on the board to CPU core
134 * #0, and let CPU core #1 have the four x1 slots.
135 */
136 if (mv78xx0_core_index() == 0)
137 mv78xx0_pcie_init(0, 1);
138 else
139 mv78xx0_pcie_init(1, 0);
140 }
141
142 return 0;
143}
144subsys_initcall(wxl_pci_init);
145
146MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
147 /* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
148 .phys_io = MV78XX0_REGS_PHYS_BASE,
149 .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
150 .boot_params = 0x00000100,
151 .init_machine = wxl_init,
152 .map_io = mv78xx0_map_io,
153 .init_irq = mv78xx0_init_irq,
154 .timer = &mv78xx0_timer,
155MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
new file mode 100644
index 000000000000..354ac514eb89
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -0,0 +1,96 @@
1/*
2 * arch/arm/mach-mv78x00/mpp.c
3 *
4 * MPP functions for Marvell MV78x00 SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h>
15#include <asm/gpio.h>
16#include <mach/hardware.h>
17#include "common.h"
18#include "mpp.h"
19
20static unsigned int __init mv78xx0_variant(void)
21{
22 u32 dev, rev;
23
24 mv78xx0_pcie_id(&dev, &rev);
25
26 if (dev == MV78100_DEV_ID && rev >= MV78100_REV_A0)
27 return MPP_78100_A0_MASK;
28
29 printk(KERN_ERR "MPP setup: unknown mv78x00 variant "
30 "(dev %#x rev %#x)\n", dev, rev);
31 return 0;
32}
33
34#define MPP_CTRL(i) (DEV_BUS_VIRT_BASE + (i) * 4)
35#define MPP_NR_REGS (1 + MPP_MAX/8)
36
37void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
38{
39 u32 mpp_ctrl[MPP_NR_REGS];
40 unsigned int variant_mask;
41 int i;
42
43 variant_mask = mv78xx0_variant();
44 if (!variant_mask)
45 return;
46
47 /* Initialize gpiolib. */
48 orion_gpio_init();
49
50 printk(KERN_DEBUG "initial MPP regs:");
51 for (i = 0; i < MPP_NR_REGS; i++) {
52 mpp_ctrl[i] = readl(MPP_CTRL(i));
53 printk(" %08x", mpp_ctrl[i]);
54 }
55 printk("\n");
56
57 while (*mpp_list) {
58 unsigned int num = MPP_NUM(*mpp_list);
59 unsigned int sel = MPP_SEL(*mpp_list);
60 int shift, gpio_mode;
61
62 if (num > MPP_MAX) {
63 printk(KERN_ERR "mv78xx0_mpp_conf: invalid MPP "
64 "number (%u)\n", num);
65 continue;
66 }
67 if (!(*mpp_list & variant_mask)) {
68 printk(KERN_WARNING
69 "mv78xx0_mpp_conf: requested MPP%u config "
70 "unavailable on this hardware\n", num);
71 continue;
72 }
73
74 shift = (num & 7) << 2;
75 mpp_ctrl[num / 8] &= ~(0xf << shift);
76 mpp_ctrl[num / 8] |= sel << shift;
77
78 gpio_mode = 0;
79 if (*mpp_list & MPP_INPUT_MASK)
80 gpio_mode |= GPIO_INPUT_OK;
81 if (*mpp_list & MPP_OUTPUT_MASK)
82 gpio_mode |= GPIO_OUTPUT_OK;
83 if (sel != 0)
84 gpio_mode = 0;
85 orion_gpio_set_valid(num, gpio_mode);
86
87 mpp_list++;
88 }
89
90 printk(KERN_DEBUG " final MPP regs:");
91 for (i = 0; i < MPP_NR_REGS; i++) {
92 writel(mpp_ctrl[i], MPP_CTRL(i));
93 printk(" %08x", mpp_ctrl[i]);
94 }
95 printk("\n");
96}
diff --git a/arch/arm/mach-mv78xx0/mpp.h b/arch/arm/mach-mv78xx0/mpp.h
new file mode 100644
index 000000000000..80840b781eaa
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/mpp.h
@@ -0,0 +1,347 @@
1/*
2 * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins
3 *
4 *
5 * sebastien requiem <sebastien@requiem.fr>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#ifndef __MV78X00_MPP_H
13#define __MV78X00_MPP_H
14
15#define MPP(_num, _sel, _in, _out, _78100_A0) (\
16 /* MPP number */ ((_num) & 0xff) | \
17 /* MPP select value */ (((_sel) & 0xf) << 8) | \
18 /* may be input signal */ ((!!(_in)) << 12) | \
19 /* may be output signal */ ((!!(_out)) << 13) | \
20 /* available on A0 */ ((!!(_78100_A0)) << 14))
21
22#define MPP_NUM(x) ((x) & 0xff)
23#define MPP_SEL(x) (((x) >> 8) & 0xf)
24
25 /* num sel i o 78100_A0 */
26
27#define MPP_INPUT_MASK MPP(0, 0x0, 1, 0, 0)
28#define MPP_OUTPUT_MASK MPP(0, 0x0, 0, 1, 0)
29
30#define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1)
31
32#define MPP0_GPIO MPP(0, 0x0, 1, 1, 1)
33#define MPP0_GE0_COL MPP(0, 0x1, 1, 0, 1)
34#define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 1, 1)
35#define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1)
36
37#define MPP1_GPIO MPP(1, 0x0, 1, 1, 1)
38#define MPP1_GE0_RXERR MPP(1, 0x1, 1, 0, 1)
39#define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 1, 1)
40#define MPP1_UNUSED MPP(1, 0x3, 0, 0, 1)
41
42#define MPP2_GPIO MPP(2, 0x0, 1, 1, 1)
43#define MPP2_GE0_CRS MPP(2, 0x1, 1, 0, 1)
44#define MPP2_GE1_RXCTL MPP(2, 0x2, 1, 0, 1)
45#define MPP2_UNUSED MPP(2, 0x3, 0, 0, 1)
46
47#define MPP3_GPIO MPP(3, 0x0, 1, 1, 1)
48#define MPP3_GE0_TXERR MPP(3, 0x1, 0, 1, 1)
49#define MPP3_GE1_RXCLK MPP(3, 0x2, 1, 0, 1)
50#define MPP3_UNUSED MPP(3, 0x3, 0, 0, 1)
51
52#define MPP4_GPIO MPP(4, 0x0, 1, 1, 1)
53#define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 1, 1)
54#define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 1, 1)
55#define MPP4_UNUSED MPP(4, 0x3, 0, 0, 1)
56
57#define MPP5_GPIO MPP(5, 0x0, 1, 1, 1)
58#define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 1, 1)
59#define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 1, 1)
60#define MPP5_UNUSED MPP(5, 0x3, 0, 0, 1)
61
62#define MPP6_GPIO MPP(6, 0x0, 1, 1, 1)
63#define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 1, 1)
64#define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 1, 1)
65#define MPP6_UNUSED MPP(6, 0x3, 0, 0, 1)
66
67#define MPP7_GPIO MPP(7, 0x0, 1, 1, 1)
68#define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 1, 1)
69#define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 1, 1)
70#define MPP7_UNUSED MPP(7, 0x3, 0, 0, 1)
71
72#define MPP8_GPIO MPP(8, 0x0, 1, 1, 1)
73#define MPP8_GE0_RXD4 MPP(8, 0x1, 1, 0, 1)
74#define MPP8_GE1_RXD0 MPP(8, 0x2, 1, 0, 1)
75#define MPP8_UNUSED MPP(8, 0x3, 0, 0, 1)
76
77#define MPP9_GPIO MPP(9, 0x0, 1, 1, 1)
78#define MPP9_GE0_RXD5 MPP(9, 0x1, 1, 0, 1)
79#define MPP9_GE1_RXD1 MPP(9, 0x2, 1, 0, 1)
80#define MPP9_UNUSED MPP(9, 0x3, 0, 0, 1)
81
82#define MPP10_GPIO MPP(10, 0x0, 1, 1, 1)
83#define MPP10_GE0_RXD6 MPP(10, 0x1, 1, 0, 1)
84#define MPP10_GE1_RXD2 MPP(10, 0x2, 1, 0, 1)
85#define MPP10_UNUSED MPP(10, 0x3, 0, 0, 1)
86
87#define MPP11_GPIO MPP(11, 0x0, 1, 1, 1)
88#define MPP11_GE0_RXD7 MPP(11, 0x1, 1, 0, 1)
89#define MPP11_GE1_RXD3 MPP(11, 0x2, 1, 0, 1)
90#define MPP11_UNUSED MPP(11, 0x3, 0, 0, 1)
91
92#define MPP12_GPIO MPP(12, 0x0, 1, 1, 1)
93#define MPP12_M_BB MPP(12, 0x3, 1, 0, 1)
94#define MPP12_UA0_CTSn MPP(12, 0x4, 1, 0, 1)
95#define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 1, 1)
96#define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 1, 1)
97#define MPP12_UNUSED MPP(12, 0x1, 0, 0, 1)
98
99#define MPP13_GPIO MPP(13, 0x0, 1, 1, 1)
100#define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 1, 1)
101#define MPP13_UA0_RTSn MPP(13, 0x4, 0, 1, 1)
102#define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 1, 1)
103#define MPP13_TDM_SCLK MPP(13, 0x6, 0, 1, 1)
104#define MPP13_UNUSED MPP(13, 0x1, 0, 0, 1)
105
106#define MPP14_GPIO MPP(14, 0x0, 1, 1, 1)
107#define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 1, 1)
108#define MPP14_UA1_CTSn MPP(14, 0x4, 1, 0, 1)
109#define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 1, 1)
110#define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 1, 1)
111#define MPP14_UNUSED MPP(14, 0x1, 0, 0, 1)
112
113#define MPP15_GPIO MPP(15, 0x0, 1, 1, 1)
114#define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 1, 1)
115#define MPP15_UA1_RTSn MPP(15, 0x4, 0, 1, 1)
116#define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 1, 1)
117#define MPP15_TDM_SMISO MPP(15, 0x6, 1, 0, 1)
118#define MPP15_UNUSED MPP(15, 0x1, 0, 0, 1)
119
120#define MPP16_GPIO MPP(16, 0x0, 1, 1, 1)
121#define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 1, 1)
122#define MPP16_UA2_TXD MPP(16, 0x4, 0, 1, 1)
123#define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 1, 1)
124#define MPP16_TDM_INTn MPP(16, 0x6, 1, 0, 1)
125#define MPP16_UNUSED MPP(16, 0x1, 0, 0, 1)
126
127
128#define MPP17_GPIO MPP(17, 0x0, 1, 1, 1)
129#define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 1, 1)
130#define MPP17_UA2_RXD MPP(17, 0x4, 1, 0, 1)
131#define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 1, 1)
132#define MPP17_TDM_RSTn MPP(17, 0x6, 0, 1, 1)
133#define MPP17_UNUSED MPP(17, 0x1, 0, 0, 1)
134
135
136#define MPP18_GPIO MPP(18, 0x0, 1, 1, 1)
137#define MPP18_UA0_CTSn MPP(18, 0x4, 1, 0, 1)
138#define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 1, 1)
139#define MPP18_UNUSED MPP(18, 0x1, 0, 0, 1)
140
141
142
143#define MPP19_GPIO MPP(19, 0x0, 1, 1, 1)
144#define MPP19_UA0_CTSn MPP(19, 0x4, 0, 1, 1)
145#define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 1, 1)
146#define MPP19_UNUSED MPP(19, 0x1, 0, 0, 1)
147
148
149#define MPP20_GPIO MPP(20, 0x0, 1, 1, 1)
150#define MPP20_UA1_CTSs MPP(20, 0x4, 1, 0, 1)
151#define MPP20_TDM_PCLK MPP(20, 0x6, 1, 1, 0)
152#define MPP20_UNUSED MPP(20, 0x1, 0, 0, 1)
153
154
155
156#define MPP21_GPIO MPP(21, 0x0, 1, 1, 1)
157#define MPP21_UA1_CTSs MPP(21, 0x4, 0, 1, 1)
158#define MPP21_TDM_FSYNC MPP(21, 0x6, 1, 1, 0)
159#define MPP21_UNUSED MPP(21, 0x1, 0, 0, 1)
160
161
162
163#define MPP22_GPIO MPP(22, 0x0, 1, 1, 1)
164#define MPP22_UA3_TDX MPP(22, 0x4, 0, 1, 1)
165#define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 1, 1)
166#define MPP22_TDM_DRX MPP(22, 0x6, 1, 0, 1)
167#define MPP22_UNUSED MPP(22, 0x1, 0, 0, 1)
168
169
170
171#define MPP23_GPIO MPP(23, 0x0, 1, 1, 1)
172#define MPP23_UA3_RDX MPP(23, 0x4, 1, 0, 1)
173#define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 1, 1)
174#define MPP23_TDM_DTX MPP(23, 0x6, 0, 1, 1)
175#define MPP23_UNUSED MPP(23, 0x1, 0, 0, 1)
176
177
178#define MPP24_GPIO MPP(24, 0x0, 1, 1, 1)
179#define MPP24_UA2_TXD MPP(24, 0x4, 0, 1, 1)
180#define MPP24_TDM_INTn MPP(24, 0x6, 1, 0, 1)
181#define MPP24_UNUSED MPP(24, 0x1, 0, 0, 1)
182
183
184#define MPP25_GPIO MPP(25, 0x0, 1, 1, 1)
185#define MPP25_UA2_RXD MPP(25, 0x4, 1, 0, 1)
186#define MPP25_TDM_RSTn MPP(25, 0x6, 0, 1, 1)
187#define MPP25_UNUSED MPP(25, 0x1, 0, 0, 1)
188
189
190#define MPP26_GPIO MPP(26, 0x0, 1, 1, 1)
191#define MPP26_UA2_CTSn MPP(26, 0x4, 1, 0, 1)
192#define MPP26_TDM_PCLK MPP(26, 0x6, 1, 1, 1)
193#define MPP26_UNUSED MPP(26, 0x1, 0, 0, 1)
194
195
196#define MPP27_GPIO MPP(27, 0x0, 1, 1, 1)
197#define MPP27_UA2_RTSn MPP(27, 0x4, 0, 1, 1)
198#define MPP27_TDM_FSYNC MPP(27, 0x6, 1, 1, 1)
199#define MPP27_UNUSED MPP(27, 0x1, 0, 0, 1)
200
201
202#define MPP28_GPIO MPP(28, 0x0, 1, 1, 1)
203#define MPP28_UA3_TXD MPP(28, 0x4, 0, 1, 1)
204#define MPP28_TDM_DRX MPP(28, 0x6, 1, 0, 1)
205#define MPP28_UNUSED MPP(28, 0x1, 0, 0, 1)
206
207#define MPP29_GPIO MPP(29, 0x0, 1, 1, 1)
208#define MPP29_UA3_RXD MPP(29, 0x4, 1, 0, 1)
209#define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 1, 1)
210#define MPP29_TDM_DTX MPP(29, 0x6, 0, 1, 1)
211#define MPP29_UNUSED MPP(29, 0x1, 0, 0, 1)
212
213#define MPP30_GPIO MPP(30, 0x0, 1, 1, 1)
214#define MPP30_UA3_CTSn MPP(30, 0x4, 1, 0, 1)
215#define MPP30_UNUSED MPP(30, 0x1, 0, 0, 1)
216
217#define MPP31_GPIO MPP(31, 0x0, 1, 1, 1)
218#define MPP31_UA3_RTSn MPP(31, 0x4, 0, 1, 1)
219#define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 1, 1)
220#define MPP31_UNUSED MPP(31, 0x1, 0, 0, 1)
221
222
223#define MPP32_GPIO MPP(32, 0x1, 1, 1, 1)
224#define MPP32_UA3_TDX MPP(32, 0x4, 0, 1, 1)
225#define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 1, 1)
226#define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 1, 1)
227#define MPP32_UNUSED MPP(32, 0x3, 0, 0, 1)
228
229
230#define MPP33_GPIO MPP(33, 0x1, 1, 1, 1)
231#define MPP33_UA3_RDX MPP(33, 0x4, 1, 0, 1)
232#define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 1, 1)
233#define MPP33_UNUSED MPP(33, 0x3, 0, 0, 1)
234
235
236
237#define MPP34_GPIO MPP(34, 0x1, 1, 1, 1)
238#define MPP34_UA2_TDX MPP(34, 0x4, 0, 1, 1)
239#define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 1, 1)
240#define MPP34_UNUSED MPP(34, 0x3, 0, 0, 1)
241
242
243
244#define MPP35_GPIO MPP(35, 0x1, 1, 1, 1)
245#define MPP35_UA2_RDX MPP(35, 0x4, 1, 0, 1)
246#define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 1, 1)
247#define MPP35_UNUSED MPP(35, 0x3, 0, 0, 1)
248
249#define MPP36_GPIO MPP(36, 0x1, 1, 1, 1)
250#define MPP36_UA0_CTSn MPP(36, 0x2, 1, 0, 1)
251#define MPP36_UA2_TDX MPP(36, 0x4, 0, 1, 1)
252#define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 1, 1)
253#define MPP36_UNUSED MPP(36, 0x3, 0, 0, 1)
254
255
256#define MPP37_GPIO MPP(37, 0x1, 1, 1, 1)
257#define MPP37_UA0_RTSn MPP(37, 0x2, 0, 1, 1)
258#define MPP37_UA2_RXD MPP(37, 0x4, 1, 0, 1)
259#define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 1, 1)
260#define MPP37_TDM_SCLK MPP(37, 0x6, 0, 1, 1)
261#define MPP37_UNUSED MPP(37, 0x3, 0, 0, 1)
262
263
264
265
266#define MPP38_GPIO MPP(38, 0x1, 1, 1, 1)
267#define MPP38_UA1_CTSn MPP(38, 0x2, 1, 0, 1)
268#define MPP38_UA3_TXD MPP(38, 0x4, 0, 1, 1)
269#define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 1, 1)
270#define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 1, 1)
271#define MPP38_UNUSED MPP(38, 0x3, 0, 0, 1)
272
273
274
275
276#define MPP39_GPIO MPP(39, 0x1, 1, 1, 1)
277#define MPP39_UA1_RTSn MPP(39, 0x2, 0, 1, 1)
278#define MPP39_UA3_RXD MPP(39, 0x4, 1, 0, 1)
279#define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 1, 1)
280#define MPP39_TDM_SMISO MPP(39, 0x6, 1, 0, 1)
281#define MPP39_UNUSED MPP(39, 0x3, 0, 0, 1)
282
283
284
285#define MPP40_GPIO MPP(40, 0x1, 1, 1, 1)
286#define MPP40_TDM_INTn MPP(40, 0x6, 1, 0, 1)
287#define MPP40_UNUSED MPP(40, 0x0, 0, 0, 1)
288
289
290
291#define MPP41_GPIO MPP(41, 0x1, 1, 1, 1)
292#define MPP41_TDM_RSTn MPP(41, 0x6, 0, 1, 1)
293#define MPP41_UNUSED MPP(41, 0x0, 0, 0, 1)
294
295
296
297#define MPP42_GPIO MPP(42, 0x1, 1, 1, 1)
298#define MPP42_TDM_PCLK MPP(42, 0x6, 1, 1, 1)
299#define MPP42_UNUSED MPP(42, 0x0, 0, 0, 1)
300
301
302
303#define MPP43_GPIO MPP(43, 0x1, 1, 1, 1)
304#define MPP43_TDM_FSYNC MPP(43, 0x6, 1, 1, 1)
305#define MPP43_UNUSED MPP(43, 0x0, 0, 0, 1)
306
307
308
309#define MPP44_GPIO MPP(44, 0x1, 1, 1, 1)
310#define MPP44_TDM_DRX MPP(44, 0x6, 1, 0, 1)
311#define MPP44_UNUSED MPP(44, 0x0, 0, 0, 1)
312
313
314
315#define MPP45_GPIO MPP(45, 0x1, 1, 1, 1)
316#define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 1, 1)
317#define MPP45_TDM_DRX MPP(45, 0x6, 0, 1, 1)
318#define MPP45_UNUSED MPP(45, 0x0, 0, 0, 1)
319
320
321#define MPP46_GPIO MPP(46, 0x1, 1, 1, 1)
322#define MPP46_TDM_SCSn MPP(46, 0x6, 0, 1, 1)
323#define MPP46_UNUSED MPP(46, 0x0, 0, 0, 1)
324
325
326#define MPP47_GPIO MPP(47, 0x1, 1, 1, 1)
327#define MPP47_UNUSED MPP(47, 0x0, 0, 0, 1)
328
329
330
331#define MPP48_GPIO MPP(48, 0x1, 1, 1, 1)
332#define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 1, 1)
333#define MPP48_UNUSED MPP(48, 0x2, 0, 0, 1)
334
335
336
337#define MPP49_GPIO MPP(49, 0x1, 1, 1, 1)
338#define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 1, 1)
339#define MPP49_M_BB MPP(49, 0x4, 1, 0, 1)
340#define MPP49_UNUSED MPP(49, 0x2, 0, 0, 1)
341
342
343#define MPP_MAX 49
344
345void mv78xx0_mpp_conf(unsigned int *mpp_list);
346
347#endif
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
index 7f86fe073ec6..fc2ddf82441b 100644
--- a/arch/arm/mach-mx1/Makefile
+++ b/arch/arm/mach-mx1/Makefile
@@ -4,11 +4,12 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7EXTRA_CFLAGS += -DIMX_NEEDS_DEPRECATED_SYMBOLS
7obj-y += generic.o clock.o devices.o 8obj-y += generic.o clock.o devices.o
8 9
9# Support for CMOS sensor interface 10# Support for CMOS sensor interface
10obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o 11obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
11 12
12# Specific board support 13# Specific board support
13obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o 14obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
14obj-$(CONFIG_MACH_SCB9328) += scb9328.o \ No newline at end of file 15obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mach-mx1ads.c
index 30f04e56fafe..51f3cfd83db2 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mach-mx1ads.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-imx/mx1ads.c 2 * arch/arm/mach-imx/mach-mx1ads.c
3 * 3 *
4 * Initially based on: 4 * Initially based on:
5 * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c 5 * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
@@ -27,7 +27,7 @@
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/i2c.h> 28#include <mach/i2c.h>
29#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
30#include <mach/iomux.h> 30#include <mach/iomux-mx1.h>
31#include <mach/irqs.h> 31#include <mach/irqs.h>
32 32
33#include "devices.h" 33#include "devices.h"
@@ -147,7 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
147 /* Maintainer: Sascha Hauer, Pengutronix */ 147 /* Maintainer: Sascha Hauer, Pengutronix */
148 .phys_io = IMX_IO_PHYS, 148 .phys_io = IMX_IO_PHYS,
149 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, 149 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
150 .boot_params = PHYS_OFFSET + 0x100, 150 .boot_params = MX1_PHYS_OFFSET + 0x100,
151 .map_io = mx1_map_io, 151 .map_io = mx1_map_io,
152 .init_irq = mx1_init_irq, 152 .init_irq = mx1_init_irq,
153 .timer = &mx1ads_timer, 153 .timer = &mx1ads_timer,
@@ -157,7 +157,7 @@ MACHINE_END
157MACHINE_START(MXLADS, "Freescale MXLADS") 157MACHINE_START(MXLADS, "Freescale MXLADS")
158 .phys_io = IMX_IO_PHYS, 158 .phys_io = IMX_IO_PHYS,
159 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, 159 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
160 .boot_params = PHYS_OFFSET + 0x100, 160 .boot_params = MX1_PHYS_OFFSET + 0x100,
161 .map_io = mx1_map_io, 161 .map_io = mx1_map_io,
162 .init_irq = mx1_init_irq, 162 .init_irq = mx1_init_irq,
163 .timer = &mx1ads_timer, 163 .timer = &mx1ads_timer,
diff --git a/arch/arm/mach-mx1/scb9328.c b/arch/arm/mach-mx1/mach-scb9328.c
index 325d98df6053..7587a7a12460 100644
--- a/arch/arm/mach-mx1/scb9328.c
+++ b/arch/arm/mach-mx1/mach-scb9328.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-mx1/scb9328.c 2 * linux/arch/arm/mach-mx1/mach-scb9328.c
3 * 3 *
4 * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de> 4 * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de>
5 * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net> 5 * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net>
@@ -23,7 +23,7 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/imx-uart.h> 25#include <mach/imx-uart.h>
26#include <mach/iomux.h> 26#include <mach/iomux-mx1.h>
27 27
28#include "devices.h" 28#include "devices.h"
29 29
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index b96c6a389363..742fd4e6dcb9 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -37,6 +37,7 @@ config MACH_MX27ADS
37config MACH_PCM038 37config MACH_PCM038
38 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)" 38 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
39 depends on MACH_MX27 39 depends on MACH_MX27
40 select MXC_ULPI if USB_ULPI
40 help 41 help
41 Include support for phyCORE-i.MX27 (aka pcm038) platform. This 42 Include support for phyCORE-i.MX27 (aka pcm038) platform. This
42 includes specific configurations for the module and its peripherals. 43 includes specific configurations for the module and its peripherals.
@@ -55,7 +56,7 @@ config MACH_PCM970_BASEBOARD
55 56
56endchoice 57endchoice
57 58
58config MACH_EUKREA_CPUIMX27 59config MACH_CPUIMX27
59 bool "Eukrea CPUIMX27 module" 60 bool "Eukrea CPUIMX27 module"
60 depends on MACH_MX27 61 depends on MACH_MX27
61 help 62 help
@@ -64,14 +65,14 @@ config MACH_EUKREA_CPUIMX27
64 65
65config MACH_EUKREA_CPUIMX27_USESDHC2 66config MACH_EUKREA_CPUIMX27_USESDHC2
66 bool "CPUIMX27 integrates SDHC2 module" 67 bool "CPUIMX27 integrates SDHC2 module"
67 depends on MACH_EUKREA_CPUIMX27 68 depends on MACH_CPUIMX27
68 help 69 help
69 This adds support for the internal SDHC2 used on CPUIMX27 used 70 This adds support for the internal SDHC2 used on CPUIMX27 used
70 for wifi or eMMC. 71 for wifi or eMMC.
71 72
72choice 73choice
73 prompt "Baseboard" 74 prompt "Baseboard"
74 depends on MACH_EUKREA_CPUIMX27 75 depends on MACH_CPUIMX27
75 default MACH_EUKREA_MBIMX27_BASEBOARD 76 default MACH_EUKREA_MBIMX27_BASEBOARD
76 77
77config MACH_EUKREA_MBIMX27_BASEBOARD 78config MACH_EUKREA_MBIMX27_BASEBOARD
@@ -90,7 +91,7 @@ config MACH_MX27_3DS
90 Include support for MX27PDK platform. This includes specific 91 Include support for MX27PDK platform. This includes specific
91 configurations for the board and its peripherals. 92 configurations for the board and its peripherals.
92 93
93config MACH_MX27LITE 94config MACH_IMX27LITE
94 bool "LogicPD MX27 LITEKIT platform" 95 bool "LogicPD MX27 LITEKIT platform"
95 depends on MACH_MX27 96 depends on MACH_MX27
96 help 97 help
@@ -100,6 +101,7 @@ config MACH_MX27LITE
100config MACH_PCA100 101config MACH_PCA100
101 bool "Phytec phyCARD-s (pca100)" 102 bool "Phytec phyCARD-s (pca100)"
102 depends on MACH_MX27 103 depends on MACH_MX27
104 select MXC_ULPI if USB_ULPI
103 help 105 help
104 Include support for phyCARD-s (aka pca100) platform. This 106 Include support for phyCARD-s (aka pca100) platform. This
105 includes specific configurations for the module and its peripherals. 107 includes specific configurations for the module and its peripherals.
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 52aca0aaf9b5..e3254faac828 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -4,21 +4,20 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := generic.o devices.o serial.o 7obj-y := devices.o serial.o
8 8
9obj-$(CONFIG_MACH_MX21) += clock_imx21.o 9obj-$(CONFIG_MACH_MX21) += clock_imx21.o mm-imx21.o
10 10
11obj-$(CONFIG_MACH_MX27) += cpu_imx27.o 11obj-$(CONFIG_MACH_MX27) += cpu_imx27.o
12obj-$(CONFIG_MACH_MX27) += clock_imx27.o 12obj-$(CONFIG_MACH_MX27) += clock_imx27.o mm-imx27.o
13 13
14obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o 14obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
15obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o 15obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
16obj-$(CONFIG_MACH_PCM038) += pcm038.o 16obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
17obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o 17obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
18obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o 18obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
19obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o 19obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o
20obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o 20obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o
21obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o 21obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
22obj-$(CONFIG_MACH_PCA100) += pca100.o 22obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
23obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o 23obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
24
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index e82b489d1215..bb419ef4d133 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -23,11 +23,242 @@
23#include <linux/module.h> 23#include <linux/module.h>
24 24
25#include <mach/clock.h> 25#include <mach/clock.h>
26#include <mach/hardware.h>
26#include <mach/common.h> 27#include <mach/common.h>
27#include <asm/clkdev.h> 28#include <asm/clkdev.h>
28#include <asm/div64.h> 29#include <asm/div64.h>
29 30
30#include "crm_regs.h" 31#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
32
33/* Register offsets */
34#define CCM_CSCR IO_ADDR_CCM(0x0)
35#define CCM_MPCTL0 IO_ADDR_CCM(0x4)
36#define CCM_MPCTL1 IO_ADDR_CCM(0x8)
37#define CCM_SPCTL0 IO_ADDR_CCM(0xc)
38#define CCM_SPCTL1 IO_ADDR_CCM(0x10)
39#define CCM_OSC26MCTL IO_ADDR_CCM(0x14)
40#define CCM_PCDR0 IO_ADDR_CCM(0x18)
41#define CCM_PCDR1 IO_ADDR_CCM(0x1c)
42#define CCM_PCCR0 IO_ADDR_CCM(0x20)
43#define CCM_PCCR1 IO_ADDR_CCM(0x24)
44#define CCM_CCSR IO_ADDR_CCM(0x28)
45#define CCM_PMCTL IO_ADDR_CCM(0x2c)
46#define CCM_PMCOUNT IO_ADDR_CCM(0x30)
47#define CCM_WKGDCTL IO_ADDR_CCM(0x34)
48
49#define CCM_CSCR_PRESC_OFFSET 29
50#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET)
51
52#define CCM_CSCR_USB_OFFSET 26
53#define CCM_CSCR_USB_MASK (0x7 << CCM_CSCR_USB_OFFSET)
54#define CCM_CSCR_SD_OFFSET 24
55#define CCM_CSCR_SD_MASK (0x3 << CCM_CSCR_SD_OFFSET)
56#define CCM_CSCR_SPLLRES (1 << 22)
57#define CCM_CSCR_MPLLRES (1 << 21)
58#define CCM_CSCR_SSI2_OFFSET 20
59#define CCM_CSCR_SSI2 (1 << CCM_CSCR_SSI2_OFFSET)
60#define CCM_CSCR_SSI1_OFFSET 19
61#define CCM_CSCR_SSI1 (1 << CCM_CSCR_SSI1_OFFSET)
62#define CCM_CSCR_FIR_OFFSET 18
63#define CCM_CSCR_FIR (1 << CCM_CSCR_FIR_OFFSET)
64#define CCM_CSCR_SP (1 << 17)
65#define CCM_CSCR_MCU (1 << 16)
66#define CCM_CSCR_BCLK_OFFSET 10
67#define CCM_CSCR_BCLK_MASK (0xf << CCM_CSCR_BCLK_OFFSET)
68#define CCM_CSCR_IPDIV_OFFSET 9
69#define CCM_CSCR_IPDIV (1 << CCM_CSCR_IPDIV_OFFSET)
70
71#define CCM_CSCR_OSC26MDIV (1 << 4)
72#define CCM_CSCR_OSC26M (1 << 3)
73#define CCM_CSCR_FPM (1 << 2)
74#define CCM_CSCR_SPEN (1 << 1)
75#define CCM_CSCR_MPEN 1
76
77#define CCM_MPCTL0_CPLM (1 << 31)
78#define CCM_MPCTL0_PD_OFFSET 26
79#define CCM_MPCTL0_PD_MASK (0xf << 26)
80#define CCM_MPCTL0_MFD_OFFSET 16
81#define CCM_MPCTL0_MFD_MASK (0x3ff << 16)
82#define CCM_MPCTL0_MFI_OFFSET 10
83#define CCM_MPCTL0_MFI_MASK (0xf << 10)
84#define CCM_MPCTL0_MFN_OFFSET 0
85#define CCM_MPCTL0_MFN_MASK 0x3ff
86
87#define CCM_MPCTL1_LF (1 << 15)
88#define CCM_MPCTL1_BRMO (1 << 6)
89
90#define CCM_SPCTL0_CPLM (1 << 31)
91#define CCM_SPCTL0_PD_OFFSET 26
92#define CCM_SPCTL0_PD_MASK (0xf << 26)
93#define CCM_SPCTL0_MFD_OFFSET 16
94#define CCM_SPCTL0_MFD_MASK (0x3ff << 16)
95#define CCM_SPCTL0_MFI_OFFSET 10
96#define CCM_SPCTL0_MFI_MASK (0xf << 10)
97#define CCM_SPCTL0_MFN_OFFSET 0
98#define CCM_SPCTL0_MFN_MASK 0x3ff
99
100#define CCM_SPCTL1_LF (1 << 15)
101#define CCM_SPCTL1_BRMO (1 << 6)
102
103#define CCM_OSC26MCTL_PEAK_OFFSET 16
104#define CCM_OSC26MCTL_PEAK_MASK (0x3 << 16)
105#define CCM_OSC26MCTL_AGC_OFFSET 8
106#define CCM_OSC26MCTL_AGC_MASK (0x3f << 8)
107#define CCM_OSC26MCTL_ANATEST_OFFSET 0
108#define CCM_OSC26MCTL_ANATEST_MASK 0x3f
109
110#define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26
111#define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26)
112#define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16
113#define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16)
114#define CCM_PCDR0_NFCDIV_OFFSET 12
115#define CCM_PCDR0_NFCDIV_MASK (0xf << 12)
116#define CCM_PCDR0_48MDIV_OFFSET 5
117#define CCM_PCDR0_48MDIV_MASK (0x7 << CCM_PCDR0_48MDIV_OFFSET)
118#define CCM_PCDR0_FIRIDIV_OFFSET 0
119#define CCM_PCDR0_FIRIDIV_MASK 0x1f
120#define CCM_PCDR1_PERDIV4_OFFSET 24
121#define CCM_PCDR1_PERDIV4_MASK (0x3f << 24)
122#define CCM_PCDR1_PERDIV3_OFFSET 16
123#define CCM_PCDR1_PERDIV3_MASK (0x3f << 16)
124#define CCM_PCDR1_PERDIV2_OFFSET 8
125#define CCM_PCDR1_PERDIV2_MASK (0x3f << 8)
126#define CCM_PCDR1_PERDIV1_OFFSET 0
127#define CCM_PCDR1_PERDIV1_MASK 0x3f
128
129#define CCM_PCCR_HCLK_CSI_OFFSET 31
130#define CCM_PCCR_HCLK_CSI_REG CCM_PCCR0
131#define CCM_PCCR_HCLK_DMA_OFFSET 30
132#define CCM_PCCR_HCLK_DMA_REG CCM_PCCR0
133#define CCM_PCCR_HCLK_BROM_OFFSET 28
134#define CCM_PCCR_HCLK_BROM_REG CCM_PCCR0
135#define CCM_PCCR_HCLK_EMMA_OFFSET 27
136#define CCM_PCCR_HCLK_EMMA_REG CCM_PCCR0
137#define CCM_PCCR_HCLK_LCDC_OFFSET 26
138#define CCM_PCCR_HCLK_LCDC_REG CCM_PCCR0
139#define CCM_PCCR_HCLK_SLCDC_OFFSET 25
140#define CCM_PCCR_HCLK_SLCDC_REG CCM_PCCR0
141#define CCM_PCCR_HCLK_USBOTG_OFFSET 24
142#define CCM_PCCR_HCLK_USBOTG_REG CCM_PCCR0
143#define CCM_PCCR_HCLK_BMI_OFFSET 23
144#define CCM_PCCR_BMI_MASK (1 << CCM_PCCR_BMI_MASK)
145#define CCM_PCCR_HCLK_BMI_REG CCM_PCCR0
146#define CCM_PCCR_PERCLK4_OFFSET 22
147#define CCM_PCCR_PERCLK4_REG CCM_PCCR0
148#define CCM_PCCR_SLCDC_OFFSET 21
149#define CCM_PCCR_SLCDC_REG CCM_PCCR0
150#define CCM_PCCR_FIRI_BAUD_OFFSET 20
151#define CCM_PCCR_FIRI_BAUD_MASK (1 << CCM_PCCR_FIRI_BAUD_MASK)
152#define CCM_PCCR_FIRI_BAUD_REG CCM_PCCR0
153#define CCM_PCCR_NFC_OFFSET 19
154#define CCM_PCCR_NFC_REG CCM_PCCR0
155#define CCM_PCCR_LCDC_OFFSET 18
156#define CCM_PCCR_LCDC_REG CCM_PCCR0
157#define CCM_PCCR_SSI1_BAUD_OFFSET 17
158#define CCM_PCCR_SSI1_BAUD_REG CCM_PCCR0
159#define CCM_PCCR_SSI2_BAUD_OFFSET 16
160#define CCM_PCCR_SSI2_BAUD_REG CCM_PCCR0
161#define CCM_PCCR_EMMA_OFFSET 15
162#define CCM_PCCR_EMMA_REG CCM_PCCR0
163#define CCM_PCCR_USBOTG_OFFSET 14
164#define CCM_PCCR_USBOTG_REG CCM_PCCR0
165#define CCM_PCCR_DMA_OFFSET 13
166#define CCM_PCCR_DMA_REG CCM_PCCR0
167#define CCM_PCCR_I2C1_OFFSET 12
168#define CCM_PCCR_I2C1_REG CCM_PCCR0
169#define CCM_PCCR_GPIO_OFFSET 11
170#define CCM_PCCR_GPIO_REG CCM_PCCR0
171#define CCM_PCCR_SDHC2_OFFSET 10
172#define CCM_PCCR_SDHC2_REG CCM_PCCR0
173#define CCM_PCCR_SDHC1_OFFSET 9
174#define CCM_PCCR_SDHC1_REG CCM_PCCR0
175#define CCM_PCCR_FIRI_OFFSET 8
176#define CCM_PCCR_FIRI_MASK (1 << CCM_PCCR_BAUD_MASK)
177#define CCM_PCCR_FIRI_REG CCM_PCCR0
178#define CCM_PCCR_SSI2_IPG_OFFSET 7
179#define CCM_PCCR_SSI2_REG CCM_PCCR0
180#define CCM_PCCR_SSI1_IPG_OFFSET 6
181#define CCM_PCCR_SSI1_REG CCM_PCCR0
182#define CCM_PCCR_CSPI2_OFFSET 5
183#define CCM_PCCR_CSPI2_REG CCM_PCCR0
184#define CCM_PCCR_CSPI1_OFFSET 4
185#define CCM_PCCR_CSPI1_REG CCM_PCCR0
186#define CCM_PCCR_UART4_OFFSET 3
187#define CCM_PCCR_UART4_REG CCM_PCCR0
188#define CCM_PCCR_UART3_OFFSET 2
189#define CCM_PCCR_UART3_REG CCM_PCCR0
190#define CCM_PCCR_UART2_OFFSET 1
191#define CCM_PCCR_UART2_REG CCM_PCCR0
192#define CCM_PCCR_UART1_OFFSET 0
193#define CCM_PCCR_UART1_REG CCM_PCCR0
194
195#define CCM_PCCR_OWIRE_OFFSET 31
196#define CCM_PCCR_OWIRE_REG CCM_PCCR1
197#define CCM_PCCR_KPP_OFFSET 30
198#define CCM_PCCR_KPP_REG CCM_PCCR1
199#define CCM_PCCR_RTC_OFFSET 29
200#define CCM_PCCR_RTC_REG CCM_PCCR1
201#define CCM_PCCR_PWM_OFFSET 28
202#define CCM_PCCR_PWM_REG CCM_PCCR1
203#define CCM_PCCR_GPT3_OFFSET 27
204#define CCM_PCCR_GPT3_REG CCM_PCCR1
205#define CCM_PCCR_GPT2_OFFSET 26
206#define CCM_PCCR_GPT2_REG CCM_PCCR1
207#define CCM_PCCR_GPT1_OFFSET 25
208#define CCM_PCCR_GPT1_REG CCM_PCCR1
209#define CCM_PCCR_WDT_OFFSET 24
210#define CCM_PCCR_WDT_REG CCM_PCCR1
211#define CCM_PCCR_CSPI3_OFFSET 23
212#define CCM_PCCR_CSPI3_REG CCM_PCCR1
213
214#define CCM_PCCR_CSPI1_MASK (1 << CCM_PCCR_CSPI1_OFFSET)
215#define CCM_PCCR_CSPI2_MASK (1 << CCM_PCCR_CSPI2_OFFSET)
216#define CCM_PCCR_CSPI3_MASK (1 << CCM_PCCR_CSPI3_OFFSET)
217#define CCM_PCCR_DMA_MASK (1 << CCM_PCCR_DMA_OFFSET)
218#define CCM_PCCR_EMMA_MASK (1 << CCM_PCCR_EMMA_OFFSET)
219#define CCM_PCCR_GPIO_MASK (1 << CCM_PCCR_GPIO_OFFSET)
220#define CCM_PCCR_GPT1_MASK (1 << CCM_PCCR_GPT1_OFFSET)
221#define CCM_PCCR_GPT2_MASK (1 << CCM_PCCR_GPT2_OFFSET)
222#define CCM_PCCR_GPT3_MASK (1 << CCM_PCCR_GPT3_OFFSET)
223#define CCM_PCCR_HCLK_BROM_MASK (1 << CCM_PCCR_HCLK_BROM_OFFSET)
224#define CCM_PCCR_HCLK_CSI_MASK (1 << CCM_PCCR_HCLK_CSI_OFFSET)
225#define CCM_PCCR_HCLK_DMA_MASK (1 << CCM_PCCR_HCLK_DMA_OFFSET)
226#define CCM_PCCR_HCLK_EMMA_MASK (1 << CCM_PCCR_HCLK_EMMA_OFFSET)
227#define CCM_PCCR_HCLK_LCDC_MASK (1 << CCM_PCCR_HCLK_LCDC_OFFSET)
228#define CCM_PCCR_HCLK_SLCDC_MASK (1 << CCM_PCCR_HCLK_SLCDC_OFFSET)
229#define CCM_PCCR_HCLK_USBOTG_MASK (1 << CCM_PCCR_HCLK_USBOTG_OFFSET)
230#define CCM_PCCR_I2C1_MASK (1 << CCM_PCCR_I2C1_OFFSET)
231#define CCM_PCCR_KPP_MASK (1 << CCM_PCCR_KPP_OFFSET)
232#define CCM_PCCR_LCDC_MASK (1 << CCM_PCCR_LCDC_OFFSET)
233#define CCM_PCCR_NFC_MASK (1 << CCM_PCCR_NFC_OFFSET)
234#define CCM_PCCR_OWIRE_MASK (1 << CCM_PCCR_OWIRE_OFFSET)
235#define CCM_PCCR_PERCLK4_MASK (1 << CCM_PCCR_PERCLK4_OFFSET)
236#define CCM_PCCR_PWM_MASK (1 << CCM_PCCR_PWM_OFFSET)
237#define CCM_PCCR_RTC_MASK (1 << CCM_PCCR_RTC_OFFSET)
238#define CCM_PCCR_SDHC1_MASK (1 << CCM_PCCR_SDHC1_OFFSET)
239#define CCM_PCCR_SDHC2_MASK (1 << CCM_PCCR_SDHC2_OFFSET)
240#define CCM_PCCR_SLCDC_MASK (1 << CCM_PCCR_SLCDC_OFFSET)
241#define CCM_PCCR_SSI1_BAUD_MASK (1 << CCM_PCCR_SSI1_BAUD_OFFSET)
242#define CCM_PCCR_SSI1_IPG_MASK (1 << CCM_PCCR_SSI1_IPG_OFFSET)
243#define CCM_PCCR_SSI2_BAUD_MASK (1 << CCM_PCCR_SSI2_BAUD_OFFSET)
244#define CCM_PCCR_SSI2_IPG_MASK (1 << CCM_PCCR_SSI2_IPG_OFFSET)
245#define CCM_PCCR_UART1_MASK (1 << CCM_PCCR_UART1_OFFSET)
246#define CCM_PCCR_UART2_MASK (1 << CCM_PCCR_UART2_OFFSET)
247#define CCM_PCCR_UART3_MASK (1 << CCM_PCCR_UART3_OFFSET)
248#define CCM_PCCR_UART4_MASK (1 << CCM_PCCR_UART4_OFFSET)
249#define CCM_PCCR_USBOTG_MASK (1 << CCM_PCCR_USBOTG_OFFSET)
250#define CCM_PCCR_WDT_MASK (1 << CCM_PCCR_WDT_OFFSET)
251
252#define CCM_CCSR_32KSR (1 << 15)
253
254#define CCM_CCSR_CLKMODE1 (1 << 9)
255#define CCM_CCSR_CLKMODE0 (1 << 8)
256
257#define CCM_CCSR_CLKOSEL_OFFSET 0
258#define CCM_CCSR_CLKOSEL_MASK 0x1f
259
260#define SYS_FMCR 0x14 /* Functional Muxing Control Reg */
261#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
31 262
32static int _clk_enable(struct clk *clk) 263static int _clk_enable(struct clk *clk)
33{ 264{
@@ -1002,6 +1233,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
1002 clk_enable(&uart_clk[0]); 1233 clk_enable(&uart_clk[0]);
1003#endif 1234#endif
1004 1235
1005 mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1); 1236 mxc_timer_init(&gpt_clk[0], MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),
1237 MX21_INT_GPT1);
1006 return 0; 1238 return 0;
1007} 1239}
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 18c53a6487fa..0f0823c8b170 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,21 +29,23 @@
29#include <mach/common.h> 29#include <mach/common.h>
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31 31
32#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
33
32/* Register offsets */ 34/* Register offsets */
33#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) 35#define CCM_CSCR IO_ADDR_CCM(0x0)
34#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) 36#define CCM_MPCTL0 IO_ADDR_CCM(0x4)
35#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) 37#define CCM_MPCTL1 IO_ADDR_CCM(0x8)
36#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) 38#define CCM_SPCTL0 IO_ADDR_CCM(0xc)
37#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) 39#define CCM_SPCTL1 IO_ADDR_CCM(0x10)
38#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) 40#define CCM_OSC26MCTL IO_ADDR_CCM(0x14)
39#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) 41#define CCM_PCDR0 IO_ADDR_CCM(0x18)
40#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) 42#define CCM_PCDR1 IO_ADDR_CCM(0x1c)
41#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) 43#define CCM_PCCR0 IO_ADDR_CCM(0x20)
42#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) 44#define CCM_PCCR1 IO_ADDR_CCM(0x24)
43#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) 45#define CCM_CCSR IO_ADDR_CCM(0x28)
44#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) 46#define CCM_PMCTL IO_ADDR_CCM(0x2c)
45#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) 47#define CCM_PMCOUNT IO_ADDR_CCM(0x30)
46#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) 48#define CCM_WKGDCTL IO_ADDR_CCM(0x34)
47 49
48#define CCM_CSCR_UPDATE_DIS (1 << 31) 50#define CCM_CSCR_UPDATE_DIS (1 << 31)
49#define CCM_CSCR_SSI2 (1 << 23) 51#define CCM_CSCR_SSI2 (1 << 23)
@@ -753,7 +755,8 @@ int __init mx27_clocks_init(unsigned long fref)
753 clk_enable(&uart1_clk); 755 clk_enable(&uart1_clk);
754#endif 756#endif
755 757
756 mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1); 758 mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
759 MX27_INT_GPT1);
757 760
758 return 0; 761 return 0;
759} 762}
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index d9e3bf9644c9..d8d3b2d84dc5 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)
39 * the silicon revision very early we read it here to 39 * the silicon revision very early we read it here to
40 * avoid any further hooks 40 * avoid any further hooks
41 */ 41 */
42 val = __raw_readl(IO_ADDRESS(SYSCTRL_BASE_ADDR) + SYS_CHIP_ID); 42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
43 + SYS_CHIP_ID));
43 44
44 cpu_silicon_rev = (int)(val >> 28); 45 cpu_silicon_rev = (int)(val >> 28);
45 cpu_partnumber = (int)((val >> 12) & 0xFFFF); 46 cpu_partnumber = (int)((val >> 12) & 0xFFFF);
diff --git a/arch/arm/mach-mx2/crm_regs.h b/arch/arm/mach-mx2/crm_regs.h
deleted file mode 100644
index 749de76b3f95..000000000000
--- a/arch/arm/mach-mx2/crm_regs.h
+++ /dev/null
@@ -1,258 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20#ifndef __ARCH_ARM_MACH_MX2_CRM_REGS_H__
21#define __ARCH_ARM_MACH_MX2_CRM_REGS_H__
22
23#include <mach/hardware.h>
24
25/* Register offsets */
26#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0)
27#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4)
28#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8)
29#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC)
30#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10)
31#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14)
32#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18)
33#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c)
34#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20)
35#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24)
36#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28)
37#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c)
38#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30)
39#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34)
40
41#define CCM_CSCR_PRESC_OFFSET 29
42#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET)
43
44#define CCM_CSCR_USB_OFFSET 26
45#define CCM_CSCR_USB_MASK (0x7 << CCM_CSCR_USB_OFFSET)
46#define CCM_CSCR_SD_OFFSET 24
47#define CCM_CSCR_SD_MASK (0x3 << CCM_CSCR_SD_OFFSET)
48#define CCM_CSCR_SPLLRES (1 << 22)
49#define CCM_CSCR_MPLLRES (1 << 21)
50#define CCM_CSCR_SSI2_OFFSET 20
51#define CCM_CSCR_SSI2 (1 << CCM_CSCR_SSI2_OFFSET)
52#define CCM_CSCR_SSI1_OFFSET 19
53#define CCM_CSCR_SSI1 (1 << CCM_CSCR_SSI1_OFFSET)
54#define CCM_CSCR_FIR_OFFSET 18
55#define CCM_CSCR_FIR (1 << CCM_CSCR_FIR_OFFSET)
56#define CCM_CSCR_SP (1 << 17)
57#define CCM_CSCR_MCU (1 << 16)
58#define CCM_CSCR_BCLK_OFFSET 10
59#define CCM_CSCR_BCLK_MASK (0xf << CCM_CSCR_BCLK_OFFSET)
60#define CCM_CSCR_IPDIV_OFFSET 9
61#define CCM_CSCR_IPDIV (1 << CCM_CSCR_IPDIV_OFFSET)
62
63#define CCM_CSCR_OSC26MDIV (1 << 4)
64#define CCM_CSCR_OSC26M (1 << 3)
65#define CCM_CSCR_FPM (1 << 2)
66#define CCM_CSCR_SPEN (1 << 1)
67#define CCM_CSCR_MPEN 1
68
69
70
71#define CCM_MPCTL0_CPLM (1 << 31)
72#define CCM_MPCTL0_PD_OFFSET 26
73#define CCM_MPCTL0_PD_MASK (0xf << 26)
74#define CCM_MPCTL0_MFD_OFFSET 16
75#define CCM_MPCTL0_MFD_MASK (0x3ff << 16)
76#define CCM_MPCTL0_MFI_OFFSET 10
77#define CCM_MPCTL0_MFI_MASK (0xf << 10)
78#define CCM_MPCTL0_MFN_OFFSET 0
79#define CCM_MPCTL0_MFN_MASK 0x3ff
80
81#define CCM_MPCTL1_LF (1 << 15)
82#define CCM_MPCTL1_BRMO (1 << 6)
83
84#define CCM_SPCTL0_CPLM (1 << 31)
85#define CCM_SPCTL0_PD_OFFSET 26
86#define CCM_SPCTL0_PD_MASK (0xf << 26)
87#define CCM_SPCTL0_MFD_OFFSET 16
88#define CCM_SPCTL0_MFD_MASK (0x3ff << 16)
89#define CCM_SPCTL0_MFI_OFFSET 10
90#define CCM_SPCTL0_MFI_MASK (0xf << 10)
91#define CCM_SPCTL0_MFN_OFFSET 0
92#define CCM_SPCTL0_MFN_MASK 0x3ff
93
94#define CCM_SPCTL1_LF (1 << 15)
95#define CCM_SPCTL1_BRMO (1 << 6)
96
97#define CCM_OSC26MCTL_PEAK_OFFSET 16
98#define CCM_OSC26MCTL_PEAK_MASK (0x3 << 16)
99#define CCM_OSC26MCTL_AGC_OFFSET 8
100#define CCM_OSC26MCTL_AGC_MASK (0x3f << 8)
101#define CCM_OSC26MCTL_ANATEST_OFFSET 0
102#define CCM_OSC26MCTL_ANATEST_MASK 0x3f
103
104#define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26
105#define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26)
106#define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16
107#define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16)
108#define CCM_PCDR0_NFCDIV_OFFSET 12
109#define CCM_PCDR0_NFCDIV_MASK (0xf << 12)
110#define CCM_PCDR0_48MDIV_OFFSET 5
111#define CCM_PCDR0_48MDIV_MASK (0x7 << CCM_PCDR0_48MDIV_OFFSET)
112#define CCM_PCDR0_FIRIDIV_OFFSET 0
113#define CCM_PCDR0_FIRIDIV_MASK 0x1f
114#define CCM_PCDR1_PERDIV4_OFFSET 24
115#define CCM_PCDR1_PERDIV4_MASK (0x3f << 24)
116#define CCM_PCDR1_PERDIV3_OFFSET 16
117#define CCM_PCDR1_PERDIV3_MASK (0x3f << 16)
118#define CCM_PCDR1_PERDIV2_OFFSET 8
119#define CCM_PCDR1_PERDIV2_MASK (0x3f << 8)
120#define CCM_PCDR1_PERDIV1_OFFSET 0
121#define CCM_PCDR1_PERDIV1_MASK 0x3f
122
123#define CCM_PCCR_HCLK_CSI_OFFSET 31
124#define CCM_PCCR_HCLK_CSI_REG CCM_PCCR0
125#define CCM_PCCR_HCLK_DMA_OFFSET 30
126#define CCM_PCCR_HCLK_DMA_REG CCM_PCCR0
127#define CCM_PCCR_HCLK_BROM_OFFSET 28
128#define CCM_PCCR_HCLK_BROM_REG CCM_PCCR0
129#define CCM_PCCR_HCLK_EMMA_OFFSET 27
130#define CCM_PCCR_HCLK_EMMA_REG CCM_PCCR0
131#define CCM_PCCR_HCLK_LCDC_OFFSET 26
132#define CCM_PCCR_HCLK_LCDC_REG CCM_PCCR0
133#define CCM_PCCR_HCLK_SLCDC_OFFSET 25
134#define CCM_PCCR_HCLK_SLCDC_REG CCM_PCCR0
135#define CCM_PCCR_HCLK_USBOTG_OFFSET 24
136#define CCM_PCCR_HCLK_USBOTG_REG CCM_PCCR0
137#define CCM_PCCR_HCLK_BMI_OFFSET 23
138#define CCM_PCCR_BMI_MASK (1 << CCM_PCCR_BMI_MASK)
139#define CCM_PCCR_HCLK_BMI_REG CCM_PCCR0
140#define CCM_PCCR_PERCLK4_OFFSET 22
141#define CCM_PCCR_PERCLK4_REG CCM_PCCR0
142#define CCM_PCCR_SLCDC_OFFSET 21
143#define CCM_PCCR_SLCDC_REG CCM_PCCR0
144#define CCM_PCCR_FIRI_BAUD_OFFSET 20
145#define CCM_PCCR_FIRI_BAUD_MASK (1 << CCM_PCCR_FIRI_BAUD_MASK)
146#define CCM_PCCR_FIRI_BAUD_REG CCM_PCCR0
147#define CCM_PCCR_NFC_OFFSET 19
148#define CCM_PCCR_NFC_REG CCM_PCCR0
149#define CCM_PCCR_LCDC_OFFSET 18
150#define CCM_PCCR_LCDC_REG CCM_PCCR0
151#define CCM_PCCR_SSI1_BAUD_OFFSET 17
152#define CCM_PCCR_SSI1_BAUD_REG CCM_PCCR0
153#define CCM_PCCR_SSI2_BAUD_OFFSET 16
154#define CCM_PCCR_SSI2_BAUD_REG CCM_PCCR0
155#define CCM_PCCR_EMMA_OFFSET 15
156#define CCM_PCCR_EMMA_REG CCM_PCCR0
157#define CCM_PCCR_USBOTG_OFFSET 14
158#define CCM_PCCR_USBOTG_REG CCM_PCCR0
159#define CCM_PCCR_DMA_OFFSET 13
160#define CCM_PCCR_DMA_REG CCM_PCCR0
161#define CCM_PCCR_I2C1_OFFSET 12
162#define CCM_PCCR_I2C1_REG CCM_PCCR0
163#define CCM_PCCR_GPIO_OFFSET 11
164#define CCM_PCCR_GPIO_REG CCM_PCCR0
165#define CCM_PCCR_SDHC2_OFFSET 10
166#define CCM_PCCR_SDHC2_REG CCM_PCCR0
167#define CCM_PCCR_SDHC1_OFFSET 9
168#define CCM_PCCR_SDHC1_REG CCM_PCCR0
169#define CCM_PCCR_FIRI_OFFSET 8
170#define CCM_PCCR_FIRI_MASK (1 << CCM_PCCR_BAUD_MASK)
171#define CCM_PCCR_FIRI_REG CCM_PCCR0
172#define CCM_PCCR_SSI2_IPG_OFFSET 7
173#define CCM_PCCR_SSI2_REG CCM_PCCR0
174#define CCM_PCCR_SSI1_IPG_OFFSET 6
175#define CCM_PCCR_SSI1_REG CCM_PCCR0
176#define CCM_PCCR_CSPI2_OFFSET 5
177#define CCM_PCCR_CSPI2_REG CCM_PCCR0
178#define CCM_PCCR_CSPI1_OFFSET 4
179#define CCM_PCCR_CSPI1_REG CCM_PCCR0
180#define CCM_PCCR_UART4_OFFSET 3
181#define CCM_PCCR_UART4_REG CCM_PCCR0
182#define CCM_PCCR_UART3_OFFSET 2
183#define CCM_PCCR_UART3_REG CCM_PCCR0
184#define CCM_PCCR_UART2_OFFSET 1
185#define CCM_PCCR_UART2_REG CCM_PCCR0
186#define CCM_PCCR_UART1_OFFSET 0
187#define CCM_PCCR_UART1_REG CCM_PCCR0
188
189#define CCM_PCCR_OWIRE_OFFSET 31
190#define CCM_PCCR_OWIRE_REG CCM_PCCR1
191#define CCM_PCCR_KPP_OFFSET 30
192#define CCM_PCCR_KPP_REG CCM_PCCR1
193#define CCM_PCCR_RTC_OFFSET 29
194#define CCM_PCCR_RTC_REG CCM_PCCR1
195#define CCM_PCCR_PWM_OFFSET 28
196#define CCM_PCCR_PWM_REG CCM_PCCR1
197#define CCM_PCCR_GPT3_OFFSET 27
198#define CCM_PCCR_GPT3_REG CCM_PCCR1
199#define CCM_PCCR_GPT2_OFFSET 26
200#define CCM_PCCR_GPT2_REG CCM_PCCR1
201#define CCM_PCCR_GPT1_OFFSET 25
202#define CCM_PCCR_GPT1_REG CCM_PCCR1
203#define CCM_PCCR_WDT_OFFSET 24
204#define CCM_PCCR_WDT_REG CCM_PCCR1
205#define CCM_PCCR_CSPI3_OFFSET 23
206#define CCM_PCCR_CSPI3_REG CCM_PCCR1
207
208#define CCM_PCCR_CSPI1_MASK (1 << CCM_PCCR_CSPI1_OFFSET)
209#define CCM_PCCR_CSPI2_MASK (1 << CCM_PCCR_CSPI2_OFFSET)
210#define CCM_PCCR_CSPI3_MASK (1 << CCM_PCCR_CSPI3_OFFSET)
211#define CCM_PCCR_DMA_MASK (1 << CCM_PCCR_DMA_OFFSET)
212#define CCM_PCCR_EMMA_MASK (1 << CCM_PCCR_EMMA_OFFSET)
213#define CCM_PCCR_GPIO_MASK (1 << CCM_PCCR_GPIO_OFFSET)
214#define CCM_PCCR_GPT1_MASK (1 << CCM_PCCR_GPT1_OFFSET)
215#define CCM_PCCR_GPT2_MASK (1 << CCM_PCCR_GPT2_OFFSET)
216#define CCM_PCCR_GPT3_MASK (1 << CCM_PCCR_GPT3_OFFSET)
217#define CCM_PCCR_HCLK_BROM_MASK (1 << CCM_PCCR_HCLK_BROM_OFFSET)
218#define CCM_PCCR_HCLK_CSI_MASK (1 << CCM_PCCR_HCLK_CSI_OFFSET)
219#define CCM_PCCR_HCLK_DMA_MASK (1 << CCM_PCCR_HCLK_DMA_OFFSET)
220#define CCM_PCCR_HCLK_EMMA_MASK (1 << CCM_PCCR_HCLK_EMMA_OFFSET)
221#define CCM_PCCR_HCLK_LCDC_MASK (1 << CCM_PCCR_HCLK_LCDC_OFFSET)
222#define CCM_PCCR_HCLK_SLCDC_MASK (1 << CCM_PCCR_HCLK_SLCDC_OFFSET)
223#define CCM_PCCR_HCLK_USBOTG_MASK (1 << CCM_PCCR_HCLK_USBOTG_OFFSET)
224#define CCM_PCCR_I2C1_MASK (1 << CCM_PCCR_I2C1_OFFSET)
225#define CCM_PCCR_KPP_MASK (1 << CCM_PCCR_KPP_OFFSET)
226#define CCM_PCCR_LCDC_MASK (1 << CCM_PCCR_LCDC_OFFSET)
227#define CCM_PCCR_NFC_MASK (1 << CCM_PCCR_NFC_OFFSET)
228#define CCM_PCCR_OWIRE_MASK (1 << CCM_PCCR_OWIRE_OFFSET)
229#define CCM_PCCR_PERCLK4_MASK (1 << CCM_PCCR_PERCLK4_OFFSET)
230#define CCM_PCCR_PWM_MASK (1 << CCM_PCCR_PWM_OFFSET)
231#define CCM_PCCR_RTC_MASK (1 << CCM_PCCR_RTC_OFFSET)
232#define CCM_PCCR_SDHC1_MASK (1 << CCM_PCCR_SDHC1_OFFSET)
233#define CCM_PCCR_SDHC2_MASK (1 << CCM_PCCR_SDHC2_OFFSET)
234#define CCM_PCCR_SLCDC_MASK (1 << CCM_PCCR_SLCDC_OFFSET)
235#define CCM_PCCR_SSI1_BAUD_MASK (1 << CCM_PCCR_SSI1_BAUD_OFFSET)
236#define CCM_PCCR_SSI1_IPG_MASK (1 << CCM_PCCR_SSI1_IPG_OFFSET)
237#define CCM_PCCR_SSI2_BAUD_MASK (1 << CCM_PCCR_SSI2_BAUD_OFFSET)
238#define CCM_PCCR_SSI2_IPG_MASK (1 << CCM_PCCR_SSI2_IPG_OFFSET)
239#define CCM_PCCR_UART1_MASK (1 << CCM_PCCR_UART1_OFFSET)
240#define CCM_PCCR_UART2_MASK (1 << CCM_PCCR_UART2_OFFSET)
241#define CCM_PCCR_UART3_MASK (1 << CCM_PCCR_UART3_OFFSET)
242#define CCM_PCCR_UART4_MASK (1 << CCM_PCCR_UART4_OFFSET)
243#define CCM_PCCR_USBOTG_MASK (1 << CCM_PCCR_USBOTG_OFFSET)
244#define CCM_PCCR_WDT_MASK (1 << CCM_PCCR_WDT_OFFSET)
245
246
247#define CCM_CCSR_32KSR (1 << 15)
248
249#define CCM_CCSR_CLKMODE1 (1 << 9)
250#define CCM_CCSR_CLKMODE0 (1 << 8)
251
252#define CCM_CCSR_CLKOSEL_OFFSET 0
253#define CCM_CCSR_CLKOSEL_MASK 0x1f
254
255#define SYS_FMCR 0x14 /* Functional Muxing Control Reg */
256#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
257
258#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c
index 3956d82b7c4e..b91e412f7b3e 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-mx2/devices.c
@@ -47,65 +47,31 @@
47 * - i.MX21: 2 channel 47 * - i.MX21: 2 channel
48 * - i.MX27: 3 channel 48 * - i.MX27: 3 channel
49 */ 49 */
50static struct resource mxc_spi_resources0[] = { 50#define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq) \
51 { 51 static struct resource mxc_spi_resources ## n[] = { \
52 .start = CSPI1_BASE_ADDR, 52 { \
53 .end = CSPI1_BASE_ADDR + SZ_4K - 1, 53 .start = baseaddr, \
54 .flags = IORESOURCE_MEM, 54 .end = baseaddr + SZ_4K - 1, \
55 }, { 55 .flags = IORESOURCE_MEM, \
56 .start = MXC_INT_CSPI1, 56 }, { \
57 .end = MXC_INT_CSPI1, 57 .start = irq, \
58 .flags = IORESOURCE_IRQ, 58 .end = irq, \
59 }, 59 .flags = IORESOURCE_IRQ, \
60}; 60 }, \
61 61 }; \
62static struct resource mxc_spi_resources1[] = { 62 \
63 { 63 struct platform_device mxc_spi_device ## n = { \
64 .start = CSPI2_BASE_ADDR, 64 .name = "spi_imx", \
65 .end = CSPI2_BASE_ADDR + SZ_4K - 1, 65 .id = n, \
66 .flags = IORESOURCE_MEM, 66 .num_resources = ARRAY_SIZE(mxc_spi_resources ## n), \
67 }, { 67 .resource = mxc_spi_resources ## n, \
68 .start = MXC_INT_CSPI2, 68 }
69 .end = MXC_INT_CSPI2,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74#ifdef CONFIG_MACH_MX27
75static struct resource mxc_spi_resources2[] = {
76 {
77 .start = CSPI3_BASE_ADDR,
78 .end = CSPI3_BASE_ADDR + SZ_4K - 1,
79 .flags = IORESOURCE_MEM,
80 }, {
81 .start = MXC_INT_CSPI3,
82 .end = MXC_INT_CSPI3,
83 .flags = IORESOURCE_IRQ,
84 },
85};
86#endif
87
88struct platform_device mxc_spi_device0 = {
89 .name = "spi_imx",
90 .id = 0,
91 .num_resources = ARRAY_SIZE(mxc_spi_resources0),
92 .resource = mxc_spi_resources0,
93};
94 69
95struct platform_device mxc_spi_device1 = { 70DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR, MX2x_INT_CSPI1);
96 .name = "spi_imx", 71DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR, MX2x_INT_CSPI2);
97 .id = 1,
98 .num_resources = ARRAY_SIZE(mxc_spi_resources1),
99 .resource = mxc_spi_resources1,
100};
101 72
102#ifdef CONFIG_MACH_MX27 73#ifdef CONFIG_MACH_MX27
103struct platform_device mxc_spi_device2 = { 74DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR, MX27_INT_CSPI3);
104 .name = "spi_imx",
105 .id = 2,
106 .num_resources = ARRAY_SIZE(mxc_spi_resources2),
107 .resource = mxc_spi_resources2,
108};
109#endif 75#endif
110 76
111/* 77/*
@@ -113,104 +79,34 @@ struct platform_device mxc_spi_device2 = {
113 * - i.MX21: 3 timers 79 * - i.MX21: 3 timers
114 * - i.MX27: 6 timers 80 * - i.MX27: 6 timers
115 */ 81 */
116 82#define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq) \
117/* We use gpt0 as system timer, so do not add a device for this one */ 83 static struct resource timer ## n ##_resources[] = { \
118 84 { \
119static struct resource timer1_resources[] = { 85 .start = baseaddr, \
120 { 86 .end = baseaddr + SZ_4K - 1, \
121 .start = GPT2_BASE_ADDR, 87 .flags = IORESOURCE_MEM, \
122 .end = GPT2_BASE_ADDR + 0x17, 88 }, { \
123 .flags = IORESOURCE_MEM, 89 .start = irq, \
124 }, { 90 .end = irq, \
125 .start = MXC_INT_GPT2, 91 .flags = IORESOURCE_IRQ, \
126 .end = MXC_INT_GPT2, 92 } \
127 .flags = IORESOURCE_IRQ, 93 }; \
128 } 94 \
129}; 95 struct platform_device mxc_gpt ## n = { \
130 96 .name = "imx_gpt", \
131struct platform_device mxc_gpt1 = { 97 .id = n, \
132 .name = "imx_gpt", 98 .num_resources = ARRAY_SIZE(timer ## n ## _resources), \
133 .id = 1, 99 .resource = timer ## n ## _resources, \
134 .num_resources = ARRAY_SIZE(timer1_resources),
135 .resource = timer1_resources,
136};
137
138static struct resource timer2_resources[] = {
139 {
140 .start = GPT3_BASE_ADDR,
141 .end = GPT3_BASE_ADDR + 0x17,
142 .flags = IORESOURCE_MEM,
143 }, {
144 .start = MXC_INT_GPT3,
145 .end = MXC_INT_GPT3,
146 .flags = IORESOURCE_IRQ,
147 } 100 }
148};
149 101
150struct platform_device mxc_gpt2 = { 102/* We use gpt1 as system timer, so do not add a device for this one */
151 .name = "imx_gpt", 103DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
152 .id = 2, 104DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
153 .num_resources = ARRAY_SIZE(timer2_resources),
154 .resource = timer2_resources,
155};
156 105
157#ifdef CONFIG_MACH_MX27 106#ifdef CONFIG_MACH_MX27
158static struct resource timer3_resources[] = { 107DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
159 { 108DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
160 .start = GPT4_BASE_ADDR, 109DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
161 .end = GPT4_BASE_ADDR + 0x17,
162 .flags = IORESOURCE_MEM,
163 }, {
164 .start = MXC_INT_GPT4,
165 .end = MXC_INT_GPT4,
166 .flags = IORESOURCE_IRQ,
167 }
168};
169
170struct platform_device mxc_gpt3 = {
171 .name = "imx_gpt",
172 .id = 3,
173 .num_resources = ARRAY_SIZE(timer3_resources),
174 .resource = timer3_resources,
175};
176
177static struct resource timer4_resources[] = {
178 {
179 .start = GPT5_BASE_ADDR,
180 .end = GPT5_BASE_ADDR + 0x17,
181 .flags = IORESOURCE_MEM,
182 }, {
183 .start = MXC_INT_GPT5,
184 .end = MXC_INT_GPT5,
185 .flags = IORESOURCE_IRQ,
186 }
187};
188
189struct platform_device mxc_gpt4 = {
190 .name = "imx_gpt",
191 .id = 4,
192 .num_resources = ARRAY_SIZE(timer4_resources),
193 .resource = timer4_resources,
194};
195
196static struct resource timer5_resources[] = {
197 {
198 .start = GPT6_BASE_ADDR,
199 .end = GPT6_BASE_ADDR + 0x17,
200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = MXC_INT_GPT6,
203 .end = MXC_INT_GPT6,
204 .flags = IORESOURCE_IRQ,
205 }
206};
207
208struct platform_device mxc_gpt5 = {
209 .name = "imx_gpt",
210 .id = 5,
211 .num_resources = ARRAY_SIZE(timer5_resources),
212 .resource = timer5_resources,
213};
214#endif 110#endif
215 111
216/* 112/*
@@ -221,9 +117,9 @@ struct platform_device mxc_gpt5 = {
221 */ 117 */
222static struct resource mxc_wdt_resources[] = { 118static struct resource mxc_wdt_resources[] = {
223 { 119 {
224 .start = WDOG_BASE_ADDR, 120 .start = MX2x_WDOG_BASE_ADDR,
225 .end = WDOG_BASE_ADDR + 0x30, 121 .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
226 .flags = IORESOURCE_MEM, 122 .flags = IORESOURCE_MEM,
227 }, 123 },
228}; 124};
229 125
@@ -236,8 +132,8 @@ struct platform_device mxc_wdt = {
236 132
237static struct resource mxc_w1_master_resources[] = { 133static struct resource mxc_w1_master_resources[] = {
238 { 134 {
239 .start = OWIRE_BASE_ADDR, 135 .start = MX2x_OWIRE_BASE_ADDR,
240 .end = OWIRE_BASE_ADDR + SZ_4K - 1, 136 .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
241 .flags = IORESOURCE_MEM, 137 .flags = IORESOURCE_MEM,
242 }, 138 },
243}; 139};
@@ -249,24 +145,33 @@ struct platform_device mxc_w1_master_device = {
249 .resource = mxc_w1_master_resources, 145 .resource = mxc_w1_master_resources,
250}; 146};
251 147
252static struct resource mxc_nand_resources[] = { 148#define DEFINE_MXC_NAND_DEVICE(pfx, baseaddr, irq) \
253 { 149 static struct resource pfx ## _nand_resources[] = { \
254 .start = NFC_BASE_ADDR, 150 { \
255 .end = NFC_BASE_ADDR + 0xfff, 151 .start = baseaddr, \
256 .flags = IORESOURCE_MEM, 152 .end = baseaddr + SZ_4K - 1, \
257 }, { 153 .flags = IORESOURCE_MEM, \
258 .start = MXC_INT_NANDFC, 154 }, { \
259 .end = MXC_INT_NANDFC, 155 .start = irq, \
260 .flags = IORESOURCE_IRQ, 156 .end = irq, \
261 }, 157 .flags = IORESOURCE_IRQ, \
262}; 158 }, \
159 }; \
160 \
161 struct platform_device pfx ## _nand_device = { \
162 .name = "mxc_nand", \
163 .id = 0, \
164 .num_resources = ARRAY_SIZE(pfx ## _nand_resources), \
165 .resource = pfx ## _nand_resources, \
166 }
263 167
264struct platform_device mxc_nand_device = { 168#ifdef CONFIG_MACH_MX21
265 .name = "mxc_nand", 169DEFINE_MXC_NAND_DEVICE(imx21, MX21_NFC_BASE_ADDR, MX21_INT_NANDFC);
266 .id = 0, 170#endif
267 .num_resources = ARRAY_SIZE(mxc_nand_resources), 171
268 .resource = mxc_nand_resources, 172#ifdef CONFIG_MACH_MX27
269}; 173DEFINE_MXC_NAND_DEVICE(imx27, MX27_NFC_BASE_ADDR, MX27_INT_NANDFC);
174#endif
270 175
271/* 176/*
272 * lcdc: 177 * lcdc:
@@ -276,12 +181,12 @@ struct platform_device mxc_nand_device = {
276 */ 181 */
277static struct resource mxc_fb[] = { 182static struct resource mxc_fb[] = {
278 { 183 {
279 .start = LCDC_BASE_ADDR, 184 .start = MX2x_LCDC_BASE_ADDR,
280 .end = LCDC_BASE_ADDR + 0xFFF, 185 .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
281 .flags = IORESOURCE_MEM, 186 .flags = IORESOURCE_MEM,
282 }, { 187 }, {
283 .start = MXC_INT_LCDC, 188 .start = MX2x_INT_LCDC,
284 .end = MXC_INT_LCDC, 189 .end = MX2x_INT_LCDC,
285 .flags = IORESOURCE_IRQ, 190 .flags = IORESOURCE_IRQ,
286 } 191 }
287}; 192};
@@ -300,13 +205,13 @@ struct platform_device mxc_fb_device = {
300#ifdef CONFIG_MACH_MX27 205#ifdef CONFIG_MACH_MX27
301static struct resource mxc_fec_resources[] = { 206static struct resource mxc_fec_resources[] = {
302 { 207 {
303 .start = FEC_BASE_ADDR, 208 .start = MX27_FEC_BASE_ADDR,
304 .end = FEC_BASE_ADDR + 0xfff, 209 .end = MX27_FEC_BASE_ADDR + SZ_4K - 1,
305 .flags = IORESOURCE_MEM, 210 .flags = IORESOURCE_MEM,
306 }, { 211 }, {
307 .start = MXC_INT_FEC, 212 .start = MX27_INT_FEC,
308 .end = MXC_INT_FEC, 213 .end = MX27_INT_FEC,
309 .flags = IORESOURCE_IRQ, 214 .flags = IORESOURCE_IRQ,
310 }, 215 },
311}; 216};
312 217
@@ -318,55 +223,41 @@ struct platform_device mxc_fec_device = {
318}; 223};
319#endif 224#endif
320 225
321static struct resource mxc_i2c_1_resources[] = { 226#define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq) \
322 { 227 static struct resource mxc_i2c_resources ## n[] = { \
323 .start = I2C_BASE_ADDR, 228 { \
324 .end = I2C_BASE_ADDR + 0x0fff, 229 .start = baseaddr, \
325 .flags = IORESOURCE_MEM, 230 .end = baseaddr + SZ_4K - 1, \
326 }, { 231 .flags = IORESOURCE_MEM, \
327 .start = MXC_INT_I2C, 232 }, { \
328 .end = MXC_INT_I2C, 233 .start = irq, \
329 .flags = IORESOURCE_IRQ, 234 .end = irq, \
235 .flags = IORESOURCE_IRQ, \
236 } \
237 }; \
238 \
239 struct platform_device mxc_i2c_device ## n = { \
240 .name = "imx-i2c", \
241 .id = n, \
242 .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n), \
243 .resource = mxc_i2c_resources ## n, \
330 } 244 }
331};
332 245
333struct platform_device mxc_i2c_device0 = { 246DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
334 .name = "imx-i2c",
335 .id = 0,
336 .num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
337 .resource = mxc_i2c_1_resources,
338};
339 247
340#ifdef CONFIG_MACH_MX27 248#ifdef CONFIG_MACH_MX27
341static struct resource mxc_i2c_2_resources[] = { 249DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
342 {
343 .start = I2C2_BASE_ADDR,
344 .end = I2C2_BASE_ADDR + 0x0fff,
345 .flags = IORESOURCE_MEM,
346 }, {
347 .start = MXC_INT_I2C2,
348 .end = MXC_INT_I2C2,
349 .flags = IORESOURCE_IRQ,
350 }
351};
352
353struct platform_device mxc_i2c_device1 = {
354 .name = "imx-i2c",
355 .id = 1,
356 .num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
357 .resource = mxc_i2c_2_resources,
358};
359#endif 250#endif
360 251
361static struct resource mxc_pwm_resources[] = { 252static struct resource mxc_pwm_resources[] = {
362 { 253 {
363 .start = PWM_BASE_ADDR, 254 .start = MX2x_PWM_BASE_ADDR,
364 .end = PWM_BASE_ADDR + 0x0fff, 255 .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
365 .flags = IORESOURCE_MEM, 256 .flags = IORESOURCE_MEM,
366 }, { 257 }, {
367 .start = MXC_INT_PWM, 258 .start = MX2x_INT_PWM,
368 .end = MXC_INT_PWM, 259 .end = MX2x_INT_PWM,
369 .flags = IORESOURCE_IRQ, 260 .flags = IORESOURCE_IRQ,
370 } 261 }
371}; 262};
372 263
@@ -377,77 +268,49 @@ struct platform_device mxc_pwm_device = {
377 .resource = mxc_pwm_resources, 268 .resource = mxc_pwm_resources,
378}; 269};
379 270
380/* 271#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \
381 * Resource definition for the MXC SDHC 272 static struct resource mxc_sdhc_resources ## n[] = { \
382 */ 273 { \
383static struct resource mxc_sdhc1_resources[] = { 274 .start = baseaddr, \
384 { 275 .end = baseaddr + SZ_4K - 1, \
385 .start = SDHC1_BASE_ADDR, 276 .flags = IORESOURCE_MEM, \
386 .end = SDHC1_BASE_ADDR + SZ_4K - 1, 277 }, { \
387 .flags = IORESOURCE_MEM, 278 .start = irq, \
388 }, { 279 .end = irq, \
389 .start = MXC_INT_SDHC1, 280 .flags = IORESOURCE_IRQ, \
390 .end = MXC_INT_SDHC1, 281 }, { \
391 .flags = IORESOURCE_IRQ, 282 .start = dmareq, \
392 }, { 283 .end = dmareq, \
393 .start = DMA_REQ_SDHC1, 284 .flags = IORESOURCE_DMA, \
394 .end = DMA_REQ_SDHC1, 285 }, \
395 .flags = IORESOURCE_DMA, 286 }; \
396 }, 287 \
397}; 288 static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32); \
398 289 \
399static u64 mxc_sdhc1_dmamask = DMA_BIT_MASK(32); 290 struct platform_device mxc_sdhc_device ## n = { \
400 291 .name = "mxc-mmc", \
401struct platform_device mxc_sdhc_device0 = { 292 .id = n, \
402 .name = "mxc-mmc", 293 .dev = { \
403 .id = 0, 294 .dma_mask = &mxc_sdhc ## n ## _dmamask, \
404 .dev = { 295 .coherent_dma_mask = DMA_BIT_MASK(32), \
405 .dma_mask = &mxc_sdhc1_dmamask, 296 }, \
406 .coherent_dma_mask = DMA_BIT_MASK(32), 297 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \
407 }, 298 .resource = mxc_sdhc_resources ## n, \
408 .num_resources = ARRAY_SIZE(mxc_sdhc1_resources), 299 }
409 .resource = mxc_sdhc1_resources,
410};
411
412static struct resource mxc_sdhc2_resources[] = {
413 {
414 .start = SDHC2_BASE_ADDR,
415 .end = SDHC2_BASE_ADDR + SZ_4K - 1,
416 .flags = IORESOURCE_MEM,
417 }, {
418 .start = MXC_INT_SDHC2,
419 .end = MXC_INT_SDHC2,
420 .flags = IORESOURCE_IRQ,
421 }, {
422 .start = DMA_REQ_SDHC2,
423 .end = DMA_REQ_SDHC2,
424 .flags = IORESOURCE_DMA,
425 },
426};
427
428static u64 mxc_sdhc2_dmamask = DMA_BIT_MASK(32);
429 300
430struct platform_device mxc_sdhc_device1 = { 301DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
431 .name = "mxc-mmc", 302DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
432 .id = 1,
433 .dev = {
434 .dma_mask = &mxc_sdhc2_dmamask,
435 .coherent_dma_mask = DMA_BIT_MASK(32),
436 },
437 .num_resources = ARRAY_SIZE(mxc_sdhc2_resources),
438 .resource = mxc_sdhc2_resources,
439};
440 303
441#ifdef CONFIG_MACH_MX27 304#ifdef CONFIG_MACH_MX27
442static struct resource otg_resources[] = { 305static struct resource otg_resources[] = {
443 { 306 {
444 .start = OTG_BASE_ADDR, 307 .start = MX27_USBOTG_BASE_ADDR,
445 .end = OTG_BASE_ADDR + 0x1ff, 308 .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
446 .flags = IORESOURCE_MEM, 309 .flags = IORESOURCE_MEM,
447 }, { 310 }, {
448 .start = MXC_INT_USB3, 311 .start = MX27_INT_USB3,
449 .end = MXC_INT_USB3, 312 .end = MX27_INT_USB3,
450 .flags = IORESOURCE_IRQ, 313 .flags = IORESOURCE_IRQ,
451 }, 314 },
452}; 315};
453 316
@@ -483,12 +346,12 @@ static u64 usbh1_dmamask = DMA_BIT_MASK(32);
483 346
484static struct resource mxc_usbh1_resources[] = { 347static struct resource mxc_usbh1_resources[] = {
485 { 348 {
486 .start = OTG_BASE_ADDR + 0x200, 349 .start = MX27_USBOTG_BASE_ADDR + 0x200,
487 .end = OTG_BASE_ADDR + 0x3ff, 350 .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
488 .flags = IORESOURCE_MEM, 351 .flags = IORESOURCE_MEM,
489 }, { 352 }, {
490 .start = MXC_INT_USB1, 353 .start = MX27_INT_USB1,
491 .end = MXC_INT_USB1, 354 .end = MX27_INT_USB1,
492 .flags = IORESOURCE_IRQ, 355 .flags = IORESOURCE_IRQ,
493 }, 356 },
494}; 357};
@@ -509,12 +372,12 @@ static u64 usbh2_dmamask = DMA_BIT_MASK(32);
509 372
510static struct resource mxc_usbh2_resources[] = { 373static struct resource mxc_usbh2_resources[] = {
511 { 374 {
512 .start = OTG_BASE_ADDR + 0x400, 375 .start = MX27_USBOTG_BASE_ADDR + 0x400,
513 .end = OTG_BASE_ADDR + 0x5ff, 376 .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
514 .flags = IORESOURCE_MEM, 377 .flags = IORESOURCE_MEM,
515 }, { 378 }, {
516 .start = MXC_INT_USB2, 379 .start = MX27_INT_USB2,
517 .end = MXC_INT_USB2, 380 .end = MX27_INT_USB2,
518 .flags = IORESOURCE_IRQ, 381 .flags = IORESOURCE_IRQ,
519 }, 382 },
520}; 383};
@@ -531,129 +394,102 @@ struct platform_device mxc_usbh2 = {
531}; 394};
532#endif 395#endif
533 396
534static struct resource imx_ssi_resources0[] = { 397#define DEFINE_IMX_SSI_DMARES(_name, ssin, suffix) \
535 { 398 { \
536 .start = SSI1_BASE_ADDR, 399 .name = _name, \
537 .end = SSI1_BASE_ADDR + 0x6F, 400 .start = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \
538 .flags = IORESOURCE_MEM, 401 .end = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \
539 }, { 402 .flags = IORESOURCE_DMA, \
540 .start = MXC_INT_SSI1, 403 }
541 .end = MXC_INT_SSI1,
542 .flags = IORESOURCE_IRQ,
543 }, {
544 .name = "tx0",
545 .start = DMA_REQ_SSI1_TX0,
546 .end = DMA_REQ_SSI1_TX0,
547 .flags = IORESOURCE_DMA,
548 }, {
549 .name = "rx0",
550 .start = DMA_REQ_SSI1_RX0,
551 .end = DMA_REQ_SSI1_RX0,
552 .flags = IORESOURCE_DMA,
553 }, {
554 .name = "tx1",
555 .start = DMA_REQ_SSI1_TX1,
556 .end = DMA_REQ_SSI1_TX1,
557 .flags = IORESOURCE_DMA,
558 }, {
559 .name = "rx1",
560 .start = DMA_REQ_SSI1_RX1,
561 .end = DMA_REQ_SSI1_RX1,
562 .flags = IORESOURCE_DMA,
563 },
564};
565
566static struct resource imx_ssi_resources1[] = {
567 {
568 .start = SSI2_BASE_ADDR,
569 .end = SSI2_BASE_ADDR + 0x6F,
570 .flags = IORESOURCE_MEM,
571 }, {
572 .start = MXC_INT_SSI2,
573 .end = MXC_INT_SSI2,
574 .flags = IORESOURCE_IRQ,
575 }, {
576 .name = "tx0",
577 .start = DMA_REQ_SSI2_TX0,
578 .end = DMA_REQ_SSI2_TX0,
579 .flags = IORESOURCE_DMA,
580 }, {
581 .name = "rx0",
582 .start = DMA_REQ_SSI2_RX0,
583 .end = DMA_REQ_SSI2_RX0,
584 .flags = IORESOURCE_DMA,
585 }, {
586 .name = "tx1",
587 .start = DMA_REQ_SSI2_TX1,
588 .end = DMA_REQ_SSI2_TX1,
589 .flags = IORESOURCE_DMA,
590 }, {
591 .name = "rx1",
592 .start = DMA_REQ_SSI2_RX1,
593 .end = DMA_REQ_SSI2_RX1,
594 .flags = IORESOURCE_DMA,
595 },
596};
597 404
598struct platform_device imx_ssi_device0 = { 405#define DEFINE_IMX_SSI_DEVICE(n, ssin, baseaddr, irq) \
599 .name = "imx-ssi", 406 static struct resource imx_ssi_resources ## n[] = { \
600 .id = 0, 407 { \
601 .num_resources = ARRAY_SIZE(imx_ssi_resources0), 408 .start = MX2x_SSI ## ssin ## _BASE_ADDR, \
602 .resource = imx_ssi_resources0, 409 .end = MX2x_SSI ## ssin ## _BASE_ADDR + 0x6f, \
603}; 410 .flags = IORESOURCE_MEM, \
411 }, { \
412 .start = MX2x_INT_SSI1, \
413 .end = MX2x_INT_SSI1, \
414 .flags = IORESOURCE_IRQ, \
415 }, \
416 DEFINE_IMX_SSI_DMARES("tx0", ssin, TX0), \
417 DEFINE_IMX_SSI_DMARES("rx0", ssin, RX0), \
418 DEFINE_IMX_SSI_DMARES("tx1", ssin, TX1), \
419 DEFINE_IMX_SSI_DMARES("rx1", ssin, RX1), \
420 }; \
421 \
422 struct platform_device imx_ssi_device ## n = { \
423 .name = "imx-ssi", \
424 .id = n, \
425 .num_resources = ARRAY_SIZE(imx_ssi_resources ## n), \
426 .resource = imx_ssi_resources ## n, \
427 }
604 428
605struct platform_device imx_ssi_device1 = { 429DEFINE_IMX_SSI_DEVICE(0, 1, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
606 .name = "imx-ssi", 430DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
607 .id = 1,
608 .num_resources = ARRAY_SIZE(imx_ssi_resources1),
609 .resource = imx_ssi_resources1,
610};
611 431
612/* GPIO port description */ 432/* GPIO port description */
613static struct mxc_gpio_port imx_gpio_ports[] = { 433#define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \
614 { 434 { \
615 .chip.label = "gpio-0", 435 .chip.label = "gpio-" #n, \
616 .irq = MXC_INT_GPIO, 436 .irq = _irq, \
617 .base = IO_ADDRESS(GPIO_BASE_ADDR), 437 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
618 .virtual_irq_start = MXC_GPIO_IRQ_START, 438 n * 0x100), \
619 }, { 439 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
620 .chip.label = "gpio-1",
621 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
622 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
623 }, {
624 .chip.label = "gpio-2",
625 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
626 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
627 }, {
628 .chip.label = "gpio-3",
629 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
630 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
631 }, {
632 .chip.label = "gpio-4",
633 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400),
634 .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
635 }, {
636 .chip.label = "gpio-5",
637 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500),
638 .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
639 } 440 }
640}; 441
442#define DEFINE_MXC_GPIO_PORT(SOC, n) \
443 { \
444 .chip.label = "gpio-" #n, \
445 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
446 n * 0x100), \
447 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
448 }
449
450#define DEFINE_MXC_GPIO_PORTS(SOC, pfx) \
451 static struct mxc_gpio_port pfx ## _gpio_ports[] = { \
452 DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO), \
453 DEFINE_MXC_GPIO_PORT(SOC, 1), \
454 DEFINE_MXC_GPIO_PORT(SOC, 2), \
455 DEFINE_MXC_GPIO_PORT(SOC, 3), \
456 DEFINE_MXC_GPIO_PORT(SOC, 4), \
457 DEFINE_MXC_GPIO_PORT(SOC, 5), \
458 }
459
460#ifdef CONFIG_MACH_MX21
461DEFINE_MXC_GPIO_PORTS(MX21, imx21);
462#endif
463
464#ifdef CONFIG_MACH_MX27
465DEFINE_MXC_GPIO_PORTS(MX27, imx27);
466#endif
641 467
642int __init mxc_register_gpios(void) 468int __init mxc_register_gpios(void)
643{ 469{
644 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); 470#ifdef CONFIG_MACH_MX21
471 if (cpu_is_mx21())
472 return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
473 else
474#endif
475#ifdef CONFIG_MACH_MX27
476 if (cpu_is_mx27())
477 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
478 else
479#endif
480 return 0;
645} 481}
646 482
647#ifdef CONFIG_MACH_MX21 483#ifdef CONFIG_MACH_MX21
648static struct resource mx21_usbhc_resources[] = { 484static struct resource mx21_usbhc_resources[] = {
649 { 485 {
650 .start = USBOTG_BASE_ADDR, 486 .start = MX21_BASE_ADDR,
651 .end = USBOTG_BASE_ADDR + 0x1FFF, 487 .end = MX21_BASE_ADDR + 0x1FFF,
652 .flags = IORESOURCE_MEM, 488 .flags = IORESOURCE_MEM,
653 }, 489 },
654 { 490 {
655 .start = MXC_INT_USBHOST, 491 .start = MX21_INT_USBHOST,
656 .end = MXC_INT_USBHOST, 492 .end = MX21_INT_USBHOST,
657 .flags = IORESOURCE_IRQ, 493 .flags = IORESOURCE_IRQ,
658 }, 494 },
659}; 495};
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h
index f12694b07369..84ed51380174 100644
--- a/arch/arm/mach-mx2/devices.h
+++ b/arch/arm/mach-mx2/devices.h
@@ -1,8 +1,10 @@
1extern struct platform_device mxc_gpt1; 1extern struct platform_device mxc_gpt1;
2extern struct platform_device mxc_gpt2; 2extern struct platform_device mxc_gpt2;
3#ifdef CONFIG_MACH_MX27
3extern struct platform_device mxc_gpt3; 4extern struct platform_device mxc_gpt3;
4extern struct platform_device mxc_gpt4; 5extern struct platform_device mxc_gpt4;
5extern struct platform_device mxc_gpt5; 6extern struct platform_device mxc_gpt5;
7#endif
6extern struct platform_device mxc_wdt; 8extern struct platform_device mxc_wdt;
7extern struct platform_device mxc_uart_device0; 9extern struct platform_device mxc_uart_device0;
8extern struct platform_device mxc_uart_device1; 10extern struct platform_device mxc_uart_device1;
@@ -11,12 +13,19 @@ extern struct platform_device mxc_uart_device3;
11extern struct platform_device mxc_uart_device4; 13extern struct platform_device mxc_uart_device4;
12extern struct platform_device mxc_uart_device5; 14extern struct platform_device mxc_uart_device5;
13extern struct platform_device mxc_w1_master_device; 15extern struct platform_device mxc_w1_master_device;
14extern struct platform_device mxc_nand_device; 16#ifdef CONFIG_MACH_MX21
17extern struct platform_device imx21_nand_device;
18#endif
19#ifdef CONFIG_MACH_MX27
20extern struct platform_device imx27_nand_device;
21#endif
15extern struct platform_device mxc_fb_device; 22extern struct platform_device mxc_fb_device;
16extern struct platform_device mxc_fec_device; 23extern struct platform_device mxc_fec_device;
17extern struct platform_device mxc_pwm_device; 24extern struct platform_device mxc_pwm_device;
18extern struct platform_device mxc_i2c_device0; 25extern struct platform_device mxc_i2c_device0;
26#ifdef CONFIG_MACH_MX27
19extern struct platform_device mxc_i2c_device1; 27extern struct platform_device mxc_i2c_device1;
28#endif
20extern struct platform_device mxc_sdhc_device0; 29extern struct platform_device mxc_sdhc_device0;
21extern struct platform_device mxc_sdhc_device1; 30extern struct platform_device mxc_sdhc_device1;
22extern struct platform_device mxc_otg_udc_device; 31extern struct platform_device mxc_otg_udc_device;
@@ -25,7 +34,9 @@ extern struct platform_device mxc_usbh1;
25extern struct platform_device mxc_usbh2; 34extern struct platform_device mxc_usbh2;
26extern struct platform_device mxc_spi_device0; 35extern struct platform_device mxc_spi_device0;
27extern struct platform_device mxc_spi_device1; 36extern struct platform_device mxc_spi_device1;
37#ifdef CONFIG_MACH_MX27
28extern struct platform_device mxc_spi_device2; 38extern struct platform_device mxc_spi_device2;
39#endif
29extern struct platform_device mx21_usbhc_device; 40extern struct platform_device mx21_usbhc_device;
30extern struct platform_device imx_ssi_device0; 41extern struct platform_device imx_ssi_device0;
31extern struct platform_device imx_ssi_device1; 42extern struct platform_device imx_ssi_device1;
diff --git a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c b/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
index 7382b6d27ee1..f3b169d5245f 100644
--- a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
@@ -28,7 +28,7 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29 29
30#include <mach/common.h> 30#include <mach/common.h>
31#include <mach/iomux.h> 31#include <mach/iomux-mx27.h>
32#include <mach/imxfb.h> 32#include <mach/imxfb.h>
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <mach/mmc.h> 34#include <mach/mmc.h>
diff --git a/arch/arm/mach-mx2/eukrea_cpuimx27.c b/arch/arm/mach-mx2/mach-cpuimx27.c
index 7b187606682c..1f616dcaabc9 100644
--- a/arch/arm/mach-mx2/eukrea_cpuimx27.c
+++ b/arch/arm/mach-mx2/mach-cpuimx27.c
@@ -36,7 +36,7 @@
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/i2c.h> 38#include <mach/i2c.h>
39#include <mach/iomux.h> 39#include <mach/iomux-mx27.h>
40#include <mach/imx-uart.h> 40#include <mach/imx-uart.h>
41#include <mach/mxc_nand.h> 41#include <mach/mxc_nand.h>
42 42
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
142#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 142#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
143static struct plat_serial8250_port serial_platform_data[] = { 143static struct plat_serial8250_port serial_platform_data[] = {
144 { 144 {
145 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000), 145 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
146 .irq = IRQ_GPIOB(23), 146 .irq = IRQ_GPIOB(23),
147 .uartclk = 14745600, 147 .uartclk = 14745600,
148 .regshift = 1, 148 .regshift = 1,
149 .iotype = UPIO_MEM, 149 .iotype = UPIO_MEM,
150 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 150 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
151 }, { 151 }, {
152 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000), 152 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
153 .irq = IRQ_GPIOB(22), 153 .irq = IRQ_GPIOB(22),
154 .uartclk = 14745600, 154 .uartclk = 14745600,
155 .regshift = 1, 155 .regshift = 1,
156 .iotype = UPIO_MEM, 156 .iotype = UPIO_MEM,
157 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 157 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
158 }, { 158 }, {
159 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000), 159 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
160 .irq = IRQ_GPIOB(27), 160 .irq = IRQ_GPIOB(27),
161 .uartclk = 14745600, 161 .uartclk = 14745600,
162 .regshift = 1, 162 .regshift = 1,
163 .iotype = UPIO_MEM, 163 .iotype = UPIO_MEM,
164 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 164 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
165 }, { 165 }, {
166 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000), 166 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
167 .irq = IRQ_GPIOB(30), 167 .irq = IRQ_GPIOB(30),
168 .uartclk = 14745600, 168 .uartclk = 14745600,
169 .regshift = 1, 169 .regshift = 1,
@@ -189,7 +189,8 @@ static void __init eukrea_cpuimx27_init(void)
189 189
190 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 190 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
191 191
192 mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info); 192 mxc_register_device(&imx27_nand_device,
193 &eukrea_cpuimx27_nand_board_info);
193 194
194 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, 195 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
195 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); 196 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
@@ -224,9 +225,9 @@ static struct sys_timer eukrea_cpuimx27_timer = {
224}; 225};
225 226
226MACHINE_START(CPUIMX27, "EUKREA CPUIMX27") 227MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
227 .phys_io = AIPI_BASE_ADDR, 228 .phys_io = MX27_AIPI_BASE_ADDR,
228 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 229 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
229 .boot_params = PHYS_OFFSET + 0x100, 230 .boot_params = MX27_PHYS_OFFSET + 0x100,
230 .map_io = mx27_map_io, 231 .map_io = mx27_map_io,
231 .init_irq = mx27_init_irq, 232 .init_irq = mx27_init_irq,
232 .init_machine = eukrea_cpuimx27_init, 233 .init_machine = eukrea_cpuimx27_init,
diff --git a/arch/arm/mach-mx2/mx27lite.c b/arch/arm/mach-mx2/mach-imx27lite.c
index 82ea227ea0cf..b5710bf18b96 100644
--- a/arch/arm/mach-mx2/mx27lite.c
+++ b/arch/arm/mach-mx2/mach-imx27lite.c
@@ -27,7 +27,7 @@
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
30#include <mach/iomux.h> 30#include <mach/iomux-mx27.h>
31#include <mach/board-mx27lite.h> 31#include <mach/board-mx27lite.h>
32 32
33#include "devices.h" 33#include "devices.h"
@@ -85,9 +85,9 @@ static struct sys_timer mx27lite_timer = {
85}; 85};
86 86
87MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") 87MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
88 .phys_io = AIPI_BASE_ADDR, 88 .phys_io = MX27_AIPI_BASE_ADDR,
89 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 89 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
90 .boot_params = PHYS_OFFSET + 0x100, 90 .boot_params = MX27_PHYS_OFFSET + 0x100,
91 .map_io = mx27_map_io, 91 .map_io = mx27_map_io,
92 .init_irq = mx27_init_irq, 92 .init_irq = mx27_init_irq,
93 .init_machine = mx27lite_init, 93 .init_machine = mx27lite_init,
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mach-mx21ads.c
index cf5f77cbc2f1..113e58d7cb40 100644
--- a/arch/arm/mach-mx2/mx21ads.c
+++ b/arch/arm/mach-mx2/mach-mx21ads.c
@@ -30,7 +30,7 @@
30#include <asm/mach/map.h> 30#include <asm/mach/map.h>
31#include <mach/imx-uart.h> 31#include <mach/imx-uart.h>
32#include <mach/imxfb.h> 32#include <mach/imxfb.h>
33#include <mach/iomux.h> 33#include <mach/iomux-mx21.h>
34#include <mach/mxc_nand.h> 34#include <mach/mxc_nand.h>
35#include <mach/mmc.h> 35#include <mach/mmc.h>
36#include <mach/board-mx21ads.h> 36#include <mach/board-mx21ads.h>
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
118}; 118};
119 119
120static struct resource mx21ads_flash_resource = { 120static struct resource mx21ads_flash_resource = {
121 .start = CS0_BASE_ADDR, 121 .start = MX21_CS0_BASE_ADDR,
122 .end = CS0_BASE_ADDR + 0x02000000 - 1, 122 .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
123 .flags = IORESOURCE_MEM, 123 .flags = IORESOURCE_MEM,
124}; 124};
125 125
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {
242 */ 242 */
243 { 243 {
244 .virtual = MX21ADS_MMIO_BASE_ADDR, 244 .virtual = MX21ADS_MMIO_BASE_ADDR,
245 .pfn = __phys_to_pfn(CS1_BASE_ADDR), 245 .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
246 .length = MX21ADS_MMIO_SIZE, 246 .length = MX21ADS_MMIO_SIZE,
247 .type = MT_DEVICE, 247 .type = MT_DEVICE,
248 }, 248 },
@@ -268,7 +268,7 @@ static void __init mx21ads_board_init(void)
268 mxc_register_device(&mxc_uart_device3, &uart_pdata); 268 mxc_register_device(&mxc_uart_device3, &uart_pdata);
269 mxc_register_device(&mxc_fb_device, &mx21ads_fb_data); 269 mxc_register_device(&mxc_fb_device, &mx21ads_fb_data);
270 mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); 270 mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata);
271 mxc_register_device(&mxc_nand_device, &mx21ads_nand_board_info); 271 mxc_register_device(&imx21_nand_device, &mx21ads_nand_board_info);
272 272
273 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 273 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
274} 274}
@@ -284,9 +284,9 @@ static struct sys_timer mx21ads_timer = {
284 284
285MACHINE_START(MX21ADS, "Freescale i.MX21ADS") 285MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
286 /* maintainer: Freescale Semiconductor, Inc. */ 286 /* maintainer: Freescale Semiconductor, Inc. */
287 .phys_io = AIPI_BASE_ADDR, 287 .phys_io = MX21_AIPI_BASE_ADDR,
288 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 288 .io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
289 .boot_params = PHYS_OFFSET + 0x100, 289 .boot_params = MX21_PHYS_OFFSET + 0x100,
290 .map_io = mx21ads_map_io, 290 .map_io = mx21ads_map_io,
291 .init_irq = mx21_init_irq, 291 .init_irq = mx21_init_irq,
292 .init_machine = mx21ads_board_init, 292 .init_machine = mx21ads_board_init,
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mach-mx27_3ds.c
index 6761d1b79e43..b2f4e0db3fb3 100644
--- a/arch/arm/mach-mx2/mx27pdk.c
+++ b/arch/arm/mach-mx2/mach-mx27_3ds.c
@@ -26,7 +26,7 @@
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/imx-uart.h> 28#include <mach/imx-uart.h>
29#include <mach/iomux.h> 29#include <mach/iomux-mx27.h>
30#include <mach/board-mx27pdk.h> 30#include <mach/board-mx27pdk.h>
31 31
32#include "devices.h" 32#include "devices.h"
@@ -85,9 +85,9 @@ static struct sys_timer mx27pdk_timer = {
85 85
86MACHINE_START(MX27_3DS, "Freescale MX27PDK") 86MACHINE_START(MX27_3DS, "Freescale MX27PDK")
87 /* maintainer: Freescale Semiconductor, Inc. */ 87 /* maintainer: Freescale Semiconductor, Inc. */
88 .phys_io = AIPI_BASE_ADDR, 88 .phys_io = MX27_AIPI_BASE_ADDR,
89 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 89 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
90 .boot_params = PHYS_OFFSET + 0x100, 90 .boot_params = MX27_PHYS_OFFSET + 0x100,
91 .map_io = mx27_map_io, 91 .map_io = mx27_map_io,
92 .init_irq = mx27_init_irq, 92 .init_irq = mx27_init_irq,
93 .init_machine = mx27pdk_init, 93 .init_machine = mx27pdk_init,
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mach-mx27ads.c
index 83e412b713e6..6ce323669e58 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mach-mx27ads.c
@@ -33,7 +33,7 @@
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34#include <mach/gpio.h> 34#include <mach/gpio.h>
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/iomux.h> 36#include <mach/iomux-mx27.h>
37#include <mach/board-mx27ads.h> 37#include <mach/board-mx27ads.h>
38#include <mach/mxc_nand.h> 38#include <mach/mxc_nand.h>
39#include <mach/i2c.h> 39#include <mach/i2c.h>
@@ -290,7 +290,7 @@ static void __init mx27ads_board_init(void)
290 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); 290 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
291 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); 291 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
292 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); 292 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
293 mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info); 293 mxc_register_device(&imx27_nand_device, &mx27ads_nand_board_info);
294 294
295 /* only the i2c master 1 is used on this CPU card */ 295 /* only the i2c master 1 is used on this CPU card */
296 i2c_register_board_info(1, mx27ads_i2c_devices, 296 i2c_register_board_info(1, mx27ads_i2c_devices,
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {
320static struct map_desc mx27ads_io_desc[] __initdata = { 320static struct map_desc mx27ads_io_desc[] __initdata = {
321 { 321 {
322 .virtual = PBC_BASE_ADDRESS, 322 .virtual = PBC_BASE_ADDRESS,
323 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 323 .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
324 .length = SZ_1M, 324 .length = SZ_1M,
325 .type = MT_DEVICE, 325 .type = MT_DEVICE,
326 }, 326 },
@@ -334,9 +334,9 @@ static void __init mx27ads_map_io(void)
334 334
335MACHINE_START(MX27ADS, "Freescale i.MX27ADS") 335MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
336 /* maintainer: Freescale Semiconductor, Inc. */ 336 /* maintainer: Freescale Semiconductor, Inc. */
337 .phys_io = AIPI_BASE_ADDR, 337 .phys_io = MX27_AIPI_BASE_ADDR,
338 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 338 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
339 .boot_params = PHYS_OFFSET + 0x100, 339 .boot_params = MX27_PHYS_OFFSET + 0x100,
340 .map_io = mx27ads_map_io, 340 .map_io = mx27ads_map_io,
341 .init_irq = mx27_init_irq, 341 .init_irq = mx27_init_irq,
342 .init_machine = mx27ads_board_init, 342 .init_machine = mx27ads_board_init,
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mach-mxt_td60.c
index 8bcc1a5b8829..bc3855992677 100644
--- a/arch/arm/mach-mx2/mxt_td60.c
+++ b/arch/arm/mach-mx2/mach-mxt_td60.c
@@ -33,7 +33,7 @@
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34#include <linux/gpio.h> 34#include <linux/gpio.h>
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/iomux.h> 36#include <mach/iomux-mx27.h>
37#include <mach/mxc_nand.h> 37#include <mach/mxc_nand.h>
38#include <mach/i2c.h> 38#include <mach/i2c.h>
39#include <linux/i2c/pca953x.h> 39#include <linux/i2c/pca953x.h>
@@ -257,7 +257,7 @@ static void __init mxt_td60_board_init(void)
257 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 257 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
258 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 258 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
259 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); 259 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
260 mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); 260 mxc_register_device(&imx27_nand_device, &mxt_td60_nand_board_info);
261 261
262 i2c_register_board_info(0, mxt_td60_i2c_devices, 262 i2c_register_board_info(0, mxt_td60_i2c_devices,
263 ARRAY_SIZE(mxt_td60_i2c_devices)); 263 ARRAY_SIZE(mxt_td60_i2c_devices));
@@ -284,9 +284,9 @@ static struct sys_timer mxt_td60_timer = {
284 284
285MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") 285MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
286 /* maintainer: Maxtrack Industrial */ 286 /* maintainer: Maxtrack Industrial */
287 .phys_io = AIPI_BASE_ADDR, 287 .phys_io = MX27_AIPI_BASE_ADDR,
288 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 288 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
289 .boot_params = PHYS_OFFSET + 0x100, 289 .boot_params = MX27_PHYS_OFFSET + 0x100,
290 .map_io = mx27_map_io, 290 .map_io = mx27_map_io,
291 .init_irq = mx27_init_irq, 291 .init_irq = mx27_init_irq,
292 .init_machine = mxt_td60_board_init, 292 .init_machine = mxt_td60_board_init,
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/mach-pca100.c
index aea3d340d2e1..778fff230918 100644
--- a/arch/arm/mach-mx2/pca100.c
+++ b/arch/arm/mach-mx2/mach-pca100.c
@@ -25,25 +25,36 @@
25#include <linux/spi/spi.h> 25#include <linux/spi/spi.h>
26#include <linux/spi/eeprom.h> 26#include <linux/spi/eeprom.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <linux/delay.h>
28#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/usb/otg.h>
31#include <linux/usb/ulpi.h>
32#include <linux/fsl_devices.h>
29 33
30#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
31#include <asm/mach-types.h> 35#include <asm/mach-types.h>
32#include <mach/common.h> 36#include <mach/common.h>
33#include <mach/hardware.h> 37#include <mach/hardware.h>
34#include <mach/iomux.h> 38#include <mach/iomux-mx27.h>
35#include <mach/i2c.h> 39#include <mach/i2c.h>
36#include <asm/mach/time.h> 40#include <asm/mach/time.h>
37#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) 41#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
38#include <mach/spi.h> 42#include <mach/spi.h>
39#endif 43#endif
40#include <mach/imx-uart.h> 44#include <mach/imx-uart.h>
45#include <mach/audmux.h>
46#include <mach/ssi.h>
41#include <mach/mxc_nand.h> 47#include <mach/mxc_nand.h>
42#include <mach/irqs.h> 48#include <mach/irqs.h>
43#include <mach/mmc.h> 49#include <mach/mmc.h>
50#include <mach/mxc_ehci.h>
51#include <mach/ulpi.h>
44 52
45#include "devices.h" 53#include "devices.h"
46 54
55#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
56#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
57
47static int pca100_pins[] = { 58static int pca100_pins[] = {
48 /* UART1 */ 59 /* UART1 */
49 PE12_PF_UART1_TXD, 60 PE12_PF_UART1_TXD,
@@ -92,6 +103,34 @@ static int pca100_pins[] = {
92 PD29_PF_CSPI1_SCLK, 103 PD29_PF_CSPI1_SCLK,
93 PD30_PF_CSPI1_MISO, 104 PD30_PF_CSPI1_MISO,
94 PD31_PF_CSPI1_MOSI, 105 PD31_PF_CSPI1_MOSI,
106 /* OTG */
107 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
108 PC7_PF_USBOTG_DATA5,
109 PC8_PF_USBOTG_DATA6,
110 PC9_PF_USBOTG_DATA0,
111 PC10_PF_USBOTG_DATA2,
112 PC11_PF_USBOTG_DATA1,
113 PC12_PF_USBOTG_DATA4,
114 PC13_PF_USBOTG_DATA3,
115 PE0_PF_USBOTG_NXT,
116 PE1_PF_USBOTG_STP,
117 PE2_PF_USBOTG_DIR,
118 PE24_PF_USBOTG_CLK,
119 PE25_PF_USBOTG_DATA7,
120 /* USBH2 */
121 USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
122 PA0_PF_USBH2_CLK,
123 PA1_PF_USBH2_DIR,
124 PA2_PF_USBH2_DATA7,
125 PA3_PF_USBH2_NXT,
126 PA4_PF_USBH2_STP,
127 PD19_AF_USBH2_DATA4,
128 PD20_AF_USBH2_DATA3,
129 PD21_AF_USBH2_DATA6,
130 PD22_AF_USBH2_DATA0,
131 PD23_AF_USBH2_DATA2,
132 PD24_AF_USBH2_DATA1,
133 PD26_AF_USBH2_DATA5,
95}; 134};
96 135
97static struct imxuart_platform_data uart_pdata = { 136static struct imxuart_platform_data uart_pdata = {
@@ -157,6 +196,37 @@ static struct spi_imx_master pca100_spi_0_data = {
157}; 196};
158#endif 197#endif
159 198
199static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
200{
201 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
202 gpio_set_value(GPIO_PORTC + 20, 1);
203 udelay(2);
204 gpio_set_value(GPIO_PORTC + 20, 0);
205 mxc_gpio_mode(PC20_PF_SSI1_FS);
206 msleep(2);
207}
208
209static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
210{
211 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
212 gpio_set_value(GPIO_PORTC + 20, 0);
213 mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
214 gpio_set_value(GPIO_PORTC + 22, 0);
215 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
216 gpio_set_value(GPIO_PORTC + 28, 0);
217 udelay(10);
218 gpio_set_value(GPIO_PORTC + 28, 1);
219 mxc_gpio_mode(PC20_PF_SSI1_FS);
220 mxc_gpio_mode(PC22_PF_SSI1_TXD);
221 msleep(2);
222}
223
224static struct imx_ssi_platform_data pca100_ssi_pdata = {
225 .ac97_reset = pca100_ac97_cold_reset,
226 .ac97_warm_reset = pca100_ac97_warm_reset,
227 .flags = IMX_SSI_USE_AC97,
228};
229
160static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq, 230static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
161 void *data) 231 void *data)
162{ 232{
@@ -182,21 +252,79 @@ static struct imxmmc_platform_data sdhc_pdata = {
182 .exit = pca100_sdhc2_exit, 252 .exit = pca100_sdhc2_exit,
183}; 253};
184 254
255static int otg_phy_init(struct platform_device *pdev)
256{
257 gpio_set_value(OTG_PHY_CS_GPIO, 0);
258 return 0;
259}
260
261static struct mxc_usbh_platform_data otg_pdata = {
262 .init = otg_phy_init,
263 .portsc = MXC_EHCI_MODE_ULPI,
264 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
265};
266
267static int usbh2_phy_init(struct platform_device *pdev)
268{
269 gpio_set_value(USBH2_PHY_CS_GPIO, 0);
270 return 0;
271}
272
273static struct mxc_usbh_platform_data usbh2_pdata = {
274 .init = usbh2_phy_init,
275 .portsc = MXC_EHCI_MODE_ULPI,
276 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
277};
278
279static struct fsl_usb2_platform_data otg_device_pdata = {
280 .operating_mode = FSL_USB2_DR_DEVICE,
281 .phy_mode = FSL_USB2_PHY_ULPI,
282};
283
284static int otg_mode_host;
285
286static int __init pca100_otg_mode(char *options)
287{
288 if (!strcmp(options, "host"))
289 otg_mode_host = 1;
290 else if (!strcmp(options, "device"))
291 otg_mode_host = 0;
292 else
293 pr_info("otg_mode neither \"host\" nor \"device\". "
294 "Defaulting to device\n");
295 return 0;
296}
297__setup("otg_mode=", pca100_otg_mode);
298
185static void __init pca100_init(void) 299static void __init pca100_init(void)
186{ 300{
187 int ret; 301 int ret;
188 302
303 /* SSI unit */
304 mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
305 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
306 MXC_AUDMUX_V1_PCR_TFCSEL(3) |
307 MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
308 MXC_AUDMUX_V1_PCR_RXDSEL(3));
309 mxc_audmux_v1_configure_port(3,
310 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
311 MXC_AUDMUX_V1_PCR_TFCSEL(0) |
312 MXC_AUDMUX_V1_PCR_TFSDIR |
313 MXC_AUDMUX_V1_PCR_RXDSEL(0));
314
189 ret = mxc_gpio_setup_multiple_pins(pca100_pins, 315 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
190 ARRAY_SIZE(pca100_pins), "PCA100"); 316 ARRAY_SIZE(pca100_pins), "PCA100");
191 if (ret) 317 if (ret)
192 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret); 318 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
193 319
320 mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
321
194 mxc_register_device(&mxc_uart_device0, &uart_pdata); 322 mxc_register_device(&mxc_uart_device0, &uart_pdata);
195 323
196 mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN); 324 mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
197 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 325 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
198 326
199 mxc_register_device(&mxc_nand_device, &pca100_nand_board_info); 327 mxc_register_device(&imx27_nand_device, &pca100_nand_board_info);
200 328
201 /* only the i2c master 1 is used on this CPU card */ 329 /* only the i2c master 1 is used on this CPU card */
202 i2c_register_board_info(1, pca100_i2c_devices, 330 i2c_register_board_info(1, pca100_i2c_devices,
@@ -220,6 +348,29 @@ static void __init pca100_init(void)
220 mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data); 348 mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
221#endif 349#endif
222 350
351 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
352 gpio_direction_output(OTG_PHY_CS_GPIO, 1);
353 gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
354 gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
355
356#if defined(CONFIG_USB_ULPI)
357 if (otg_mode_host) {
358 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
359 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
360
361 mxc_register_device(&mxc_otg_host, &otg_pdata);
362 }
363
364 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
365 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
366
367 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
368#endif
369 if (!otg_mode_host) {
370 gpio_set_value(OTG_PHY_CS_GPIO, 0);
371 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
372 }
373
223 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 374 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
224} 375}
225 376
@@ -233,9 +384,9 @@ static struct sys_timer pca100_timer = {
233}; 384};
234 385
235MACHINE_START(PCA100, "phyCARD-i.MX27") 386MACHINE_START(PCA100, "phyCARD-i.MX27")
236 .phys_io = AIPI_BASE_ADDR, 387 .phys_io = MX27_AIPI_BASE_ADDR,
237 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 388 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
238 .boot_params = PHYS_OFFSET + 0x100, 389 .boot_params = MX27_PHYS_OFFSET + 0x100,
239 .map_io = mx27_map_io, 390 .map_io = mx27_map_io,
240 .init_irq = mx27_init_irq, 391 .init_irq = mx27_init_irq,
241 .init_machine = pca100_init, 392 .init_machine = pca100_init,
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c
index 906d59b0a7aa..035fbe046ec0 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/mach-pcm038.c
@@ -36,10 +36,12 @@
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/i2c.h> 38#include <mach/i2c.h>
39#include <mach/iomux.h> 39#include <mach/iomux-mx27.h>
40#include <mach/imx-uart.h> 40#include <mach/imx-uart.h>
41#include <mach/mxc_nand.h> 41#include <mach/mxc_nand.h>
42#include <mach/spi.h> 42#include <mach/spi.h>
43#include <mach/mxc_ehci.h>
44#include <mach/ulpi.h>
43 45
44#include "devices.h" 46#include "devices.h"
45 47
@@ -96,6 +98,19 @@ static int pcm038_pins[] = {
96 PC17_PF_SSI4_RXD, 98 PC17_PF_SSI4_RXD,
97 PC18_PF_SSI4_TXD, 99 PC18_PF_SSI4_TXD,
98 PC19_PF_SSI4_CLK, 100 PC19_PF_SSI4_CLK,
101 /* USB host */
102 PA0_PF_USBH2_CLK,
103 PA1_PF_USBH2_DIR,
104 PA2_PF_USBH2_DATA7,
105 PA3_PF_USBH2_NXT,
106 PA4_PF_USBH2_STP,
107 PD19_AF_USBH2_DATA4,
108 PD20_AF_USBH2_DATA3,
109 PD21_AF_USBH2_DATA6,
110 PD22_AF_USBH2_DATA0,
111 PD23_AF_USBH2_DATA2,
112 PD24_AF_USBH2_DATA1,
113 PD26_AF_USBH2_DATA5,
99}; 114};
100 115
101/* 116/*
@@ -108,8 +123,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
108}; 123};
109 124
110static struct resource pcm038_sram_resource = { 125static struct resource pcm038_sram_resource = {
111 .start = CS1_BASE_ADDR, 126 .start = MX27_CS1_BASE_ADDR,
112 .end = CS1_BASE_ADDR + 512 * 1024 - 1, 127 .end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
113 .flags = IORESOURCE_MEM, 128 .flags = IORESOURCE_MEM,
114}; 129};
115 130
@@ -173,9 +188,7 @@ static struct platform_device *platform_devices[] __initdata = {
173 * setup other stuffs to access the sram. */ 188 * setup other stuffs to access the sram. */
174static void __init pcm038_init_sram(void) 189static void __init pcm038_init_sram(void)
175{ 190{
176 __raw_writel(0x0000d843, CSCR_U(1)); 191 mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
177 __raw_writel(0x22252521, CSCR_L(1));
178 __raw_writel(0x22220a00, CSCR_A(1));
179} 192}
180 193
181static struct imxi2c_platform_data pcm038_i2c_1_data = { 194static struct imxi2c_platform_data pcm038_i2c_1_data = {
@@ -279,6 +292,11 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = {
279 } 292 }
280}; 293};
281 294
295static struct mxc_usbh_platform_data usbh2_pdata = {
296 .portsc = MXC_EHCI_MODE_ULPI,
297 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
298};
299
282static void __init pcm038_init(void) 300static void __init pcm038_init(void)
283{ 301{
284 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), 302 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
@@ -291,7 +309,7 @@ static void __init pcm038_init(void)
291 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); 309 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
292 310
293 mxc_gpio_mode(PE16_AF_OWIRE); 311 mxc_gpio_mode(PE16_AF_OWIRE);
294 mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); 312 mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info);
295 313
296 /* only the i2c master 1 is used on this CPU card */ 314 /* only the i2c master 1 is used on this CPU card */
297 i2c_register_board_info(1, pcm038_i2c_devices, 315 i2c_register_board_info(1, pcm038_i2c_devices,
@@ -311,6 +329,8 @@ static void __init pcm038_init(void)
311 spi_register_board_info(pcm038_spi_board_info, 329 spi_register_board_info(pcm038_spi_board_info,
312 ARRAY_SIZE(pcm038_spi_board_info)); 330 ARRAY_SIZE(pcm038_spi_board_info));
313 331
332 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
333
314 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 334 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
315 335
316#ifdef CONFIG_MACH_PCM970_BASEBOARD 336#ifdef CONFIG_MACH_PCM970_BASEBOARD
@@ -328,9 +348,9 @@ static struct sys_timer pcm038_timer = {
328}; 348};
329 349
330MACHINE_START(PCM038, "phyCORE-i.MX27") 350MACHINE_START(PCM038, "phyCORE-i.MX27")
331 .phys_io = AIPI_BASE_ADDR, 351 .phys_io = MX27_AIPI_BASE_ADDR,
332 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 352 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
333 .boot_params = PHYS_OFFSET + 0x100, 353 .boot_params = MX27_PHYS_OFFSET + 0x100,
334 .map_io = mx27_map_io, 354 .map_io = mx27_map_io,
335 .init_irq = mx27_init_irq, 355 .init_irq = mx27_init_irq,
336 .init_machine = pcm038_init, 356 .init_machine = pcm038_init,
diff --git a/arch/arm/mach-mx2/mm-imx21.c b/arch/arm/mach-mx2/mm-imx21.c
new file mode 100644
index 000000000000..64134314d012
--- /dev/null
+++ b/arch/arm/mach-mx2/mm-imx21.c
@@ -0,0 +1,83 @@
1/*
2 * arch/arm/mach-mx2/mm-imx21.c
3 *
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#include <linux/mm.h>
22#include <linux/init.h>
23#include <mach/hardware.h>
24#include <mach/common.h>
25#include <asm/pgtable.h>
26#include <asm/mach/map.h>
27
28/* MX21 memory map definition */
29static struct map_desc imx21_io_desc[] __initdata = {
30 /*
31 * this fixed mapping covers:
32 * - AIPI1
33 * - AIPI2
34 * - AITC
35 * - ROM Patch
36 * - and some reserved space
37 */
38 {
39 .virtual = MX21_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
41 .length = MX21_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /*
45 * this fixed mapping covers:
46 * - CSI
47 * - ATA
48 */
49 {
50 .virtual = MX21_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
52 .length = MX21_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /*
56 * this fixed mapping covers:
57 * - EMI
58 */
59 {
60 .virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
62 .length = MX21_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65};
66
67/*
68 * Initialize the memory map. It is called during the
69 * system startup to create static physical to virtual
70 * memory map for the IO modules.
71 */
72void __init mx21_map_io(void)
73{
74 mxc_set_cpu_type(MXC_CPU_MX21);
75 mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
76
77 iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
78}
79
80void __init mx21_init_irq(void)
81{
82 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
83}
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/mm-imx27.c
index ae8f759134d1..3366ed44cfd5 100644
--- a/arch/arm/mach-mx2/generic.c
+++ b/arch/arm/mach-mx2/mm-imx27.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * generic.c 2 * arch/arm/mach-mx2/mm-imx27.c
3 * 3 *
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 * 5 *
@@ -26,7 +26,7 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28/* MX27 memory map definition */ 28/* MX27 memory map definition */
29static struct map_desc mxc_io_desc[] __initdata = { 29static struct map_desc imx27_io_desc[] __initdata = {
30 /* 30 /*
31 * this fixed mapping covers: 31 * this fixed mapping covers:
32 * - AIPI1 32 * - AIPI1
@@ -36,9 +36,9 @@ static struct map_desc mxc_io_desc[] __initdata = {
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 {
39 .virtual = AIPI_BASE_ADDR_VIRT, 39 .virtual = MX27_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(AIPI_BASE_ADDR), 40 .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
41 .length = AIPI_SIZE, 41 .length = MX27_AIPI_SIZE,
42 .type = MT_DEVICE 42 .type = MT_DEVICE
43 }, 43 },
44 /* 44 /*
@@ -47,9 +47,9 @@ static struct map_desc mxc_io_desc[] __initdata = {
47 * - ATA 47 * - ATA
48 */ 48 */
49 { 49 {
50 .virtual = SAHB1_BASE_ADDR_VIRT, 50 .virtual = MX27_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(SAHB1_BASE_ADDR), 51 .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
52 .length = SAHB1_SIZE, 52 .length = MX27_SAHB1_SIZE,
53 .type = MT_DEVICE 53 .type = MT_DEVICE
54 }, 54 },
55 /* 55 /*
@@ -57,11 +57,11 @@ static struct map_desc mxc_io_desc[] __initdata = {
57 * - EMI 57 * - EMI
58 */ 58 */
59 { 59 {
60 .virtual = X_MEMC_BASE_ADDR_VIRT, 60 .virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), 61 .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
62 .length = X_MEMC_SIZE, 62 .length = MX27_X_MEMC_SIZE,
63 .type = MT_DEVICE 63 .type = MT_DEVICE
64 } 64 },
65}; 65};
66 66
67/* 67/*
@@ -69,29 +69,15 @@ static struct map_desc mxc_io_desc[] __initdata = {
69 * system startup to create static physical to virtual 69 * system startup to create static physical to virtual
70 * memory map for the IO modules. 70 * memory map for the IO modules.
71 */ 71 */
72void __init mx21_map_io(void)
73{
74 mxc_set_cpu_type(MXC_CPU_MX21);
75 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
76
77 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
78}
79
80void __init mx27_map_io(void) 72void __init mx27_map_io(void)
81{ 73{
82 mxc_set_cpu_type(MXC_CPU_MX27); 74 mxc_set_cpu_type(MXC_CPU_MX27);
83 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); 75 mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
84 76
85 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 77 iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
86} 78}
87 79
88void __init mx27_init_irq(void) 80void __init mx27_init_irq(void)
89{ 81{
90 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); 82 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
91} 83}
92
93void __init mx21_init_irq(void)
94{
95 mx27_init_irq();
96}
97
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index 3cb7f457e5d0..4aafd5b8b85b 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -24,7 +24,7 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/iomux.h> 27#include <mach/iomux-mx27.h>
28#include <mach/imxfb.h> 28#include <mach/imxfb.h>
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/mmc.h> 30#include <mach/mmc.h>
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {
190 190
191static struct resource pcm970_sja1000_resources[] = { 191static struct resource pcm970_sja1000_resources[] = {
192 { 192 {
193 .start = CS4_BASE_ADDR, 193 .start = MX27_CS4_BASE_ADDR,
194 .end = CS4_BASE_ADDR + 0x100 - 1, 194 .end = MX27_CS4_BASE_ADDR + 0x100 - 1,
195 .flags = IORESOURCE_MEM, 195 .flags = IORESOURCE_MEM,
196 }, { 196 }, {
197 .start = IRQ_GPIOE(19), 197 .start = IRQ_GPIOE(19),
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c
index 40a485cdc10e..1c0c835b2252 100644
--- a/arch/arm/mach-mx2/serial.c
+++ b/arch/arm/mach-mx2/serial.c
@@ -26,12 +26,12 @@
26 26
27static struct resource uart0[] = { 27static struct resource uart0[] = {
28 { 28 {
29 .start = UART1_BASE_ADDR, 29 .start = MX2x_UART1_BASE_ADDR,
30 .end = UART1_BASE_ADDR + 0x0B5, 30 .end = MX2x_UART1_BASE_ADDR + 0x0B5,
31 .flags = IORESOURCE_MEM, 31 .flags = IORESOURCE_MEM,
32 }, { 32 }, {
33 .start = MXC_INT_UART1, 33 .start = MX2x_INT_UART1,
34 .end = MXC_INT_UART1, 34 .end = MX2x_INT_UART1,
35 .flags = IORESOURCE_IRQ, 35 .flags = IORESOURCE_IRQ,
36 }, 36 },
37}; 37};
@@ -45,12 +45,12 @@ struct platform_device mxc_uart_device0 = {
45 45
46static struct resource uart1[] = { 46static struct resource uart1[] = {
47 { 47 {
48 .start = UART2_BASE_ADDR, 48 .start = MX2x_UART2_BASE_ADDR,
49 .end = UART2_BASE_ADDR + 0x0B5, 49 .end = MX2x_UART2_BASE_ADDR + 0x0B5,
50 .flags = IORESOURCE_MEM, 50 .flags = IORESOURCE_MEM,
51 }, { 51 }, {
52 .start = MXC_INT_UART2, 52 .start = MX2x_INT_UART2,
53 .end = MXC_INT_UART2, 53 .end = MX2x_INT_UART2,
54 .flags = IORESOURCE_IRQ, 54 .flags = IORESOURCE_IRQ,
55 }, 55 },
56}; 56};
@@ -64,12 +64,12 @@ struct platform_device mxc_uart_device1 = {
64 64
65static struct resource uart2[] = { 65static struct resource uart2[] = {
66 { 66 {
67 .start = UART3_BASE_ADDR, 67 .start = MX2x_UART3_BASE_ADDR,
68 .end = UART3_BASE_ADDR + 0x0B5, 68 .end = MX2x_UART3_BASE_ADDR + 0x0B5,
69 .flags = IORESOURCE_MEM, 69 .flags = IORESOURCE_MEM,
70 }, { 70 }, {
71 .start = MXC_INT_UART3, 71 .start = MX2x_INT_UART3,
72 .end = MXC_INT_UART3, 72 .end = MX2x_INT_UART3,
73 .flags = IORESOURCE_IRQ, 73 .flags = IORESOURCE_IRQ,
74 }, 74 },
75}; 75};
@@ -83,12 +83,12 @@ struct platform_device mxc_uart_device2 = {
83 83
84static struct resource uart3[] = { 84static struct resource uart3[] = {
85 { 85 {
86 .start = UART4_BASE_ADDR, 86 .start = MX2x_UART4_BASE_ADDR,
87 .end = UART4_BASE_ADDR + 0x0B5, 87 .end = MX2x_UART4_BASE_ADDR + 0x0B5,
88 .flags = IORESOURCE_MEM, 88 .flags = IORESOURCE_MEM,
89 }, { 89 }, {
90 .start = MXC_INT_UART4, 90 .start = MX2x_INT_UART4,
91 .end = MXC_INT_UART4, 91 .end = MX2x_INT_UART4,
92 .flags = IORESOURCE_IRQ, 92 .flags = IORESOURCE_IRQ,
93 }, 93 },
94}; 94};
@@ -103,12 +103,12 @@ struct platform_device mxc_uart_device3 = {
103#ifdef CONFIG_MACH_MX27 103#ifdef CONFIG_MACH_MX27
104static struct resource uart4[] = { 104static struct resource uart4[] = {
105 { 105 {
106 .start = UART5_BASE_ADDR, 106 .start = MX27_UART5_BASE_ADDR,
107 .end = UART5_BASE_ADDR + 0x0B5, 107 .end = MX27_UART5_BASE_ADDR + 0x0B5,
108 .flags = IORESOURCE_MEM, 108 .flags = IORESOURCE_MEM,
109 }, { 109 }, {
110 .start = MXC_INT_UART5, 110 .start = MX27_INT_UART5,
111 .end = MXC_INT_UART5, 111 .end = MX27_INT_UART5,
112 .flags = IORESOURCE_IRQ, 112 .flags = IORESOURCE_IRQ,
113 }, 113 },
114}; 114};
@@ -122,12 +122,12 @@ struct platform_device mxc_uart_device4 = {
122 122
123static struct resource uart5[] = { 123static struct resource uart5[] = {
124 { 124 {
125 .start = UART6_BASE_ADDR, 125 .start = MX27_UART6_BASE_ADDR,
126 .end = UART6_BASE_ADDR + 0x0B5, 126 .end = MX27_UART6_BASE_ADDR + 0x0B5,
127 .flags = IORESOURCE_MEM, 127 .flags = IORESOURCE_MEM,
128 }, { 128 }, {
129 .start = MXC_INT_UART6, 129 .start = MX27_INT_UART6,
130 .end = MXC_INT_UART6, 130 .end = MX27_INT_UART6,
131 .flags = IORESOURCE_IRQ, 131 .flags = IORESOURCE_IRQ,
132 }, 132 },
133}; 133};
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig
index cc28f56eae80..54d217314ee9 100644
--- a/arch/arm/mach-mx25/Kconfig
+++ b/arch/arm/mach-mx25/Kconfig
@@ -3,7 +3,6 @@ if ARCH_MX25
3comment "MX25 platforms:" 3comment "MX25 platforms:"
4 4
5config MACH_MX25_3DS 5config MACH_MX25_3DS
6 select ARCH_MXC_IOMUX_V3
7 bool "Support MX25PDK (3DS) Platform" 6 bool "Support MX25PDK (3DS) Platform"
8 7
9endif 8endif
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile
index fe23836a9f3d..10cebc5ced8c 100644
--- a/arch/arm/mach-mx25/Makefile
+++ b/arch/arm/mach-mx25/Makefile
@@ -1,3 +1,3 @@
1obj-y := mm.o devices.o 1obj-y := mm.o devices.o
2obj-$(CONFIG_ARCH_MX25) += clock.o 2obj-$(CONFIG_ARCH_MX25) += clock.o
3obj-$(CONFIG_MACH_MX25_3DS) += mx25pdk.o 3obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25pdk.o
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index 37e1359ad0c0..155014993b13 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -124,6 +124,11 @@ static unsigned long get_rate_gpt(struct clk *clk)
124 return get_rate_per(5); 124 return get_rate_per(5);
125} 125}
126 126
127static unsigned long get_rate_lcdc(struct clk *clk)
128{
129 return get_rate_per(7);
130}
131
127static unsigned long get_rate_otg(struct clk *clk) 132static unsigned long get_rate_otg(struct clk *clk)
128{ 133{
129 return 48000000; /* FIXME */ 134 return 48000000; /* FIXME */
@@ -167,6 +172,8 @@ DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
167DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); 172DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
168DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); 173DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
169DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); 174DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
175DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL);
176DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk);
170DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk); 177DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
171DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk); 178DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
172DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk); 179DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
@@ -182,6 +189,8 @@ DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
182DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL); 189DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
183DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL); 190DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
184DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk); 191DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
192DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1, 8, get_rate_ipg, NULL, NULL);
193DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
185 194
186#define _REGISTER_CLOCK(d, n, c) \ 195#define _REGISTER_CLOCK(d, n, c) \
187 { \ 196 { \
@@ -214,6 +223,8 @@ static struct clk_lookup lookups[] = {
214 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) 223 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
215 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) 224 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
216 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 225 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
226 _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
227 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
217}; 228};
218 229
219int __init mx25_clocks_init(void) 230int __init mx25_clocks_init(void)
@@ -228,6 +239,9 @@ int __init mx25_clocks_init(void)
228 __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1); 239 __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
229 __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2); 240 __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
230 241
242 /* Clock source for lcdc is upll */
243 __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7), CRM_BASE + 0x64);
244
231 mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 245 mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
232 246
233 return 0; 247 return 0;
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 9fdeea1c083b..3f4b8a0b5fac 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -438,3 +438,65 @@ struct platform_device mx25_fec_device = {
438 .num_resources = ARRAY_SIZE(mx25_fec_resources), 438 .num_resources = ARRAY_SIZE(mx25_fec_resources),
439 .resource = mx25_fec_resources, 439 .resource = mx25_fec_resources,
440}; 440};
441
442static struct resource mxc_nand_resources[] = {
443 {
444 .start = MX25_NFC_BASE_ADDR,
445 .end = MX25_NFC_BASE_ADDR + 0x1fff,
446 .flags = IORESOURCE_MEM,
447 },
448 {
449 .start = MX25_INT_NANDFC,
450 .end = MX25_INT_NANDFC,
451 .flags = IORESOURCE_IRQ,
452 },
453};
454
455struct platform_device mxc_nand_device = {
456 .name = "mxc_nand",
457 .id = 0,
458 .num_resources = ARRAY_SIZE(mxc_nand_resources),
459 .resource = mxc_nand_resources,
460};
461
462static struct resource mx25_rtc_resources[] = {
463 {
464 .start = MX25_DRYICE_BASE_ADDR,
465 .end = MX25_DRYICE_BASE_ADDR + 0x40,
466 .flags = IORESOURCE_MEM,
467 },
468 {
469 .start = MX25_INT_DRYICE,
470 .flags = IORESOURCE_IRQ
471 },
472};
473
474struct platform_device mx25_rtc_device = {
475 .name = "imxdi_rtc",
476 .id = 0,
477 .num_resources = ARRAY_SIZE(mx25_rtc_resources),
478 .resource = mx25_rtc_resources,
479};
480
481static struct resource mx25_fb_resources[] = {
482 {
483 .start = MX25_LCDC_BASE_ADDR,
484 .end = MX25_LCDC_BASE_ADDR + 0xfff,
485 .flags = IORESOURCE_MEM,
486 },
487 {
488 .start = MX25_INT_LCDC,
489 .end = MX25_INT_LCDC,
490 .flags = IORESOURCE_IRQ,
491 },
492};
493
494struct platform_device mx25_fb_device = {
495 .name = "imx-fb",
496 .id = 0,
497 .resource = mx25_fb_resources,
498 .num_resources = ARRAY_SIZE(mx25_fb_resources),
499 .dev = {
500 .coherent_dma_mask = 0xFFFFFFFF,
501 },
502};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe5420fcd11f..39560e13bc0d 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -18,3 +18,6 @@ extern struct platform_device mxc_i2c_device0;
18extern struct platform_device mxc_i2c_device1; 18extern struct platform_device mxc_i2c_device1;
19extern struct platform_device mxc_i2c_device2; 19extern struct platform_device mxc_i2c_device2;
20extern struct platform_device mx25_fec_device; 20extern struct platform_device mx25_fec_device;
21extern struct platform_device mxc_nand_device;
22extern struct platform_device mx25_rtc_device;
23extern struct platform_device mx25_fb_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mach-mx25pdk.c
index 6f06089246eb..83d74109e7d8 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mach-mx25pdk.c
@@ -35,8 +35,9 @@
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/mx25.h> 36#include <mach/mx25.h>
37#include <mach/mxc_nand.h> 37#include <mach/mxc_nand.h>
38#include <mach/imxfb.h>
38#include "devices.h" 39#include "devices.h"
39#include <mach/iomux.h> 40#include <mach/iomux-mx25.h>
40 41
41static struct imxuart_platform_data uart_pdata = { 42static struct imxuart_platform_data uart_pdata = {
42 .flags = IMXUART_HAVE_RTSCTS, 43 .flags = IMXUART_HAVE_RTSCTS,
@@ -54,6 +55,31 @@ static struct pad_desc mx25pdk_pads[] = {
54 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, 55 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
55 MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */ 56 MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
56 MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */ 57 MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
58
59 /* LCD */
60 MX25_PAD_LD0__LD0,
61 MX25_PAD_LD1__LD1,
62 MX25_PAD_LD2__LD2,
63 MX25_PAD_LD3__LD3,
64 MX25_PAD_LD4__LD4,
65 MX25_PAD_LD5__LD5,
66 MX25_PAD_LD6__LD6,
67 MX25_PAD_LD7__LD7,
68 MX25_PAD_LD8__LD8,
69 MX25_PAD_LD9__LD9,
70 MX25_PAD_LD10__LD10,
71 MX25_PAD_LD11__LD11,
72 MX25_PAD_LD12__LD12,
73 MX25_PAD_LD13__LD13,
74 MX25_PAD_LD14__LD14,
75 MX25_PAD_LD15__LD15,
76 MX25_PAD_GPIO_E__LD16,
77 MX25_PAD_GPIO_F__LD17,
78 MX25_PAD_HSYNC__HSYNC,
79 MX25_PAD_VSYNC__VSYNC,
80 MX25_PAD_LSCLK__LSCLK,
81 MX25_PAD_OE_ACD__OE_ACD,
82 MX25_PAD_CONTRAST__CONTRAST,
57}; 83};
58 84
59static struct fec_platform_data mx25_fec_pdata = { 85static struct fec_platform_data mx25_fec_pdata = {
@@ -77,6 +103,40 @@ static void __init mx25pdk_fec_reset(void)
77 gpio_set_value(FEC_RESET_B_GPIO, 1); 103 gpio_set_value(FEC_RESET_B_GPIO, 1);
78} 104}
79 105
106static struct mxc_nand_platform_data mx25pdk_nand_board_info = {
107 .width = 1,
108 .hw_ecc = 1,
109 .flash_bbt = 1,
110};
111
112static struct imx_fb_videomode mx25pdk_modes[] = {
113 {
114 .mode = {
115 .name = "CRT-VGA",
116 .refresh = 60,
117 .xres = 640,
118 .yres = 480,
119 .pixclock = 39683,
120 .left_margin = 45,
121 .right_margin = 114,
122 .upper_margin = 33,
123 .lower_margin = 11,
124 .hsync_len = 1,
125 .vsync_len = 1,
126 },
127 .bpp = 16,
128 .pcr = 0xFA208B80,
129 },
130};
131
132static struct imx_fb_platform_data mx25pdk_fb_pdata = {
133 .mode = mx25pdk_modes,
134 .num_modes = ARRAY_SIZE(mx25pdk_modes),
135 .pwmr = 0x00A903FF,
136 .lscr1 = 0x00120300,
137 .dmacr = 0x00020010,
138};
139
80static void __init mx25pdk_init(void) 140static void __init mx25pdk_init(void)
81{ 141{
82 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, 142 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
@@ -84,6 +144,9 @@ static void __init mx25pdk_init(void)
84 144
85 mxc_register_device(&mxc_uart_device0, &uart_pdata); 145 mxc_register_device(&mxc_uart_device0, &uart_pdata);
86 mxc_register_device(&mxc_usbh2, NULL); 146 mxc_register_device(&mxc_usbh2, NULL);
147 mxc_register_device(&mxc_nand_device, &mx25pdk_nand_board_info);
148 mxc_register_device(&mx25_rtc_device, NULL);
149 mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
87 150
88 mx25pdk_fec_reset(); 151 mx25pdk_fec_reset();
89 mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); 152 mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
@@ -102,7 +165,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
102 /* Maintainer: Freescale Semiconductor, Inc. */ 165 /* Maintainer: Freescale Semiconductor, Inc. */
103 .phys_io = MX25_AIPS1_BASE_ADDR, 166 .phys_io = MX25_AIPS1_BASE_ADDR,
104 .io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 167 .io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
105 .boot_params = PHYS_OFFSET + 0x100, 168 .boot_params = MX25_PHYS_OFFSET + 0x100,
106 .map_io = mx25_map_io, 169 .map_io = mx25_map_io,
107 .init_irq = mx25_init_irq, 170 .init_irq = mx25_init_irq,
108 .init_machine = mx25pdk_init, 171 .init_machine = mx25pdk_init,
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 28294416b0af..3872af1cf2c3 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -34,6 +34,7 @@ config MACH_MX31ADS_WM1133_EV1
34config MACH_PCM037 34config MACH_PCM037
35 bool "Support Phytec pcm037 (i.MX31) platforms" 35 bool "Support Phytec pcm037 (i.MX31) platforms"
36 select ARCH_MX31 36 select ARCH_MX31
37 select MXC_ULPI if USB_ULPI
37 help 38 help
38 Include support for Phytec pcm037 platform. This includes 39 Include support for Phytec pcm037 platform. This includes
39 specific configurations for the board and its peripherals. 40 specific configurations for the board and its peripherals.
@@ -86,6 +87,7 @@ config MACH_QONG
86config MACH_PCM043 87config MACH_PCM043
87 bool "Support Phytec pcm043 (i.MX35) platforms" 88 bool "Support Phytec pcm043 (i.MX35) platforms"
88 select ARCH_MX35 89 select ARCH_MX35
90 select MXC_ULPI if USB_ULPI
89 help 91 help
90 Include support for Phytec pcm043 platform. This includes 92 Include support for Phytec pcm043 platform. This includes
91 specific configurations for the board and its peripherals. 93 specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 93c7b296be6a..5d650fda5d5d 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,18 +5,22 @@
5# Object file lists. 5# Object file lists.
6 6
7obj-y := mm.o devices.o cpu.o 7obj-y := mm.o devices.o cpu.o
8obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o 8CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
9CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
10CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
11obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o
9obj-$(CONFIG_ARCH_MX35) += clock-imx35.o 12obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
10obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o 13obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
11obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o 14obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
12obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o 15obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
13obj-$(CONFIG_MACH_PCM037) += pcm037.o 16obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
14obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o 17obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
15obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o 18obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
16obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ 19CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
17 mx31moboard-marxbot.o 20obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
18obj-$(CONFIG_MACH_QONG) += qong.o 21 mx31moboard-marxbot.o mx31moboard-smartbot.o
19obj-$(CONFIG_MACH_PCM043) += pcm043.o 22obj-$(CONFIG_MACH_QONG) += mach-qong.o
20obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o 23obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
21obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o 24obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
22obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o 25obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o
26obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock-imx31.c
index b5c39a016db7..80dba9966b5e 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -616,14 +616,15 @@ int __init mx31_clocks_init(unsigned long fref)
616 616
617 mx31_read_cpu_rev(); 617 mx31_read_cpu_rev();
618 618
619 if (mx31_revision() >= CHIP_REV_2_0) { 619 if (mx31_revision() >= MX31_CHIP_REV_2_0) {
620 reg = __raw_readl(MXC_CCM_PMCR1); 620 reg = __raw_readl(MXC_CCM_PMCR1);
621 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 621 /* No PLL restart on DVFS switch; enable auto EMI handshake */
622 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN; 622 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
623 __raw_writel(reg, MXC_CCM_PMCR1); 623 __raw_writel(reg, MXC_CCM_PMCR1);
624 } 624 }
625 625
626 mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 626 mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
627 MX31_INT_GPT);
627 628
628 return 0; 629 return 0;
629} 630}
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index f3f41fa4f21b..9f3e943e2232 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -28,7 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/common.h> 29#include <mach/common.h>
30 30
31#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) 31#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
32 32
33#define CCM_CCMR 0x00 33#define CCM_CCMR 0x00
34#define CCM_PDR0 0x04 34#define CCM_PDR0 0x04
@@ -502,7 +502,8 @@ int __init mx35_clocks_init()
502 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); 502 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
503 __raw_writel(0, CCM_BASE + CCM_CGR3); 503 __raw_writel(0, CCM_BASE + CCM_CGR3);
504 504
505 mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 505 mxc_timer_init(&gpt_clk,
506 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
506 507
507 return 0; 508 return 0;
508} 509}
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db828809c675..861afe0fe3ad 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
41 u32 i, srev; 41 u32 i, srev;
42 42
43 /* read SREV register from IIM module */ 43 /* read SREV register from IIM module */
44 srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV); 44 srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
45 45
46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) 46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
47 if (srev == mx31_cpu_type[i].srev) { 47 if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index adfa3627ad84..37a8a07beda3 100644
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
24#define CKIH_CLK_FREQ_27MHZ 27000000 24#define CKIH_CLK_FREQ_27MHZ 27000000
25#define CKIL_CLK_FREQ 32768 25#define CKIL_CLK_FREQ 32768
26 26
27#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) 27#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
28 28
29/* Register addresses */ 29/* Register addresses */
30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) 30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux-imx31.c
index c66ccbcdc11b..a1d7fa5123dc 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux-imx31.c
@@ -29,7 +29,7 @@
29/* 29/*
30 * IOMUX register (base) addresses 30 * IOMUX register (base) addresses
31 */ 31 */
32#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) 32#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
33#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000) 33#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
34#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004) 34#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
35#define IOMUXGPR (IOMUX_BASE + 0x008) 35#define IOMUXGPR (IOMUX_BASE + 0x008)
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 54aab401dbdf..3d72b0b89705 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
182 182
183static struct resource armadillo5x0_nor_flash_resource = { 183static struct resource armadillo5x0_nor_flash_resource = {
184 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
185 .start = CS0_BASE_ADDR, 185 .start = MX31_CS0_BASE_ADDR,
186 .end = CS0_BASE_ADDR + SZ_64M - 1, 186 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
187}; 187};
188 188
189static struct platform_device armadillo5x0_nor_flash = { 189static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {
311 */ 311 */
312static struct resource armadillo5x0_smc911x_resources[] = { 312static struct resource armadillo5x0_smc911x_resources[] = {
313 { 313 {
314 .start = CS3_BASE_ADDR, 314 .start = MX31_CS3_BASE_ADDR,
315 .end = CS3_BASE_ADDR + SZ_32M - 1, 315 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
316 .flags = IORESOURCE_MEM, 316 .flags = IORESOURCE_MEM,
317 }, { 317 }, {
318 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), 318 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
@@ -406,9 +406,9 @@ static struct sys_timer armadillo5x0_timer = {
406 406
407MACHINE_START(ARMADILLO5X0, "Armadillo-500") 407MACHINE_START(ARMADILLO5X0, "Armadillo-500")
408 /* Maintainer: Alberto Panizzo */ 408 /* Maintainer: Alberto Panizzo */
409 .phys_io = AIPS1_BASE_ADDR, 409 .phys_io = MX31_AIPS1_BASE_ADDR,
410 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 410 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
411 .boot_params = PHYS_OFFSET + 0x00000100, 411 .boot_params = MX3x_PHYS_OFFSET + 0x100,
412 .map_io = mx31_map_io, 412 .map_io = mx31_map_io,
413 .init_irq = mx31_init_irq, 413 .init_irq = mx31_init_irq,
414 .timer = &armadillo5x0_timer, 414 .timer = &armadillo5x0_timer,
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 6fa99ce3008a..f085d5d1a6de 100644
--- a/arch/arm/mach-mx3/kzmarm11.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -46,13 +46,18 @@
46 46
47#include "devices.h" 47#include "devices.h"
48 48
49#define KZM_ARM11_IO_ADDRESS(x) ( \
50 IMX_IO_ADDRESS(x, MX31_CS4) ?: \
51 IMX_IO_ADDRESS(x, MX31_CS5) ?: \
52 MX31_IO_ADDRESS(x))
53
49#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 54#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
50/* 55/*
51 * KZM-ARM11-01 has an external UART on FPGA 56 * KZM-ARM11-01 has an external UART on FPGA
52 */ 57 */
53static struct plat_serial8250_port serial_platform_data[] = { 58static struct plat_serial8250_port serial_platform_data[] = {
54 { 59 {
55 .membase = IO_ADDRESS(KZM_ARM11_16550), 60 .membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
56 .mapbase = KZM_ARM11_16550, 61 .mapbase = KZM_ARM11_16550,
57 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), 62 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
58 .irqflags = IRQ_TYPE_EDGE_RISING, 63 .irqflags = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +107,9 @@ static int __init kzm_init_ext_uart(void)
102 /* 107 /*
103 * Unmask UART interrupt 108 * Unmask UART interrupt
104 */ 109 */
105 tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1)); 110 tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
106 tmp |= 0x2; 111 tmp |= 0x2;
107 __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1)); 112 __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
108 113
109 return platform_device_register(&serial_device); 114 return platform_device_register(&serial_device);
110} 115}
@@ -128,8 +133,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {
128 133
129static struct resource kzm_smsc9118_resources[] = { 134static struct resource kzm_smsc9118_resources[] = {
130 { 135 {
131 .start = CS5_BASE_ADDR, 136 .start = MX31_CS5_BASE_ADDR,
132 .end = CS5_BASE_ADDR + SZ_128K - 1, 137 .end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
133 .flags = IORESOURCE_MEM, 138 .flags = IORESOURCE_MEM,
134 }, 139 },
135 { 140 {
@@ -222,15 +227,15 @@ static void __init kzm_board_init(void)
222 */ 227 */
223static struct map_desc kzm_io_desc[] __initdata = { 228static struct map_desc kzm_io_desc[] __initdata = {
224 { 229 {
225 .virtual = CS4_BASE_ADDR_VIRT, 230 .virtual = MX31_CS4_BASE_ADDR_VIRT,
226 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 231 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
227 .length = CS4_SIZE, 232 .length = MX31_CS4_SIZE,
228 .type = MT_DEVICE 233 .type = MT_DEVICE
229 }, 234 },
230 { 235 {
231 .virtual = CS5_BASE_ADDR_VIRT, 236 .virtual = MX31_CS5_BASE_ADDR_VIRT,
232 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 237 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
233 .length = CS5_SIZE, 238 .length = MX31_CS5_SIZE,
234 .type = MT_DEVICE 239 .type = MT_DEVICE
235 }, 240 },
236}; 241};
@@ -258,9 +263,9 @@ static struct sys_timer kzm_timer = {
258 * initialize __mach_desc_KZM_ARM11_01 data structure. 263 * initialize __mach_desc_KZM_ARM11_01 data structure.
259 */ 264 */
260MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") 265MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
261 .phys_io = AIPS1_BASE_ADDR, 266 .phys_io = MX31_AIPS1_BASE_ADDR,
262 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 267 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
263 .boot_params = PHYS_OFFSET + 0x100, 268 .boot_params = MX3x_PHYS_OFFSET + 0x100,
264 .map_io = kzm_map_io, 269 .map_io = kzm_map_io,
265 .init_irq = mx31_init_irq, 270 .init_irq = mx31_init_irq,
266 .init_machine = kzm_board_init, 271 .init_machine = kzm_board_init,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 18715f1aa7eb..b88c18ad7698 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)
211 */ 211 */
212static struct map_desc mx31pdk_io_desc[] __initdata = { 212static struct map_desc mx31pdk_io_desc[] __initdata = {
213 { 213 {
214 .virtual = CS5_BASE_ADDR_VIRT, 214 .virtual = MX31_CS5_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 215 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
216 .length = CS5_SIZE, 216 .length = MX31_CS5_SIZE,
217 .type = MT_DEVICE, 217 .type = MT_DEVICE,
218 }, 218 },
219}; 219};
@@ -256,9 +256,9 @@ static struct sys_timer mx31pdk_timer = {
256 */ 256 */
257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") 257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
258 /* Maintainer: Freescale Semiconductor, Inc. */ 258 /* Maintainer: Freescale Semiconductor, Inc. */
259 .phys_io = AIPS1_BASE_ADDR, 259 .phys_io = MX31_AIPS1_BASE_ADDR,
260 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 260 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
261 .boot_params = PHYS_OFFSET + 0x100, 261 .boot_params = MX3x_PHYS_OFFSET + 0x100,
262 .map_io = mx31pdk_map_io, 262 .map_io = mx31pdk_map_io,
263 .init_irq = mx31_init_irq, 263 .init_irq = mx31_init_irq,
264 .init_machine = mxc_board_init, 264 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 938c549767dc..b3d1a1895c20 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -60,7 +60,7 @@
60static struct plat_serial8250_port serial_platform_data[] = { 60static struct plat_serial8250_port serial_platform_data[] = {
61 { 61 {
62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA), 62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
63 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA), 63 .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
64 .irq = EXPIO_INT_XUART_INTA, 64 .irq = EXPIO_INT_XUART_INTA,
65 .uartclk = 14745600, 65 .uartclk = 14745600,
66 .regshift = 0, 66 .regshift = 0,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, 68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
69 }, { 69 }, {
70 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), 70 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
71 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), 71 .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
72 .irq = EXPIO_INT_XUART_INTB, 72 .irq = EXPIO_INT_XUART_INTB,
73 .uartclk = 14745600, 73 .uartclk = 14745600,
74 .regshift = 0, 74 .regshift = 0,
@@ -309,12 +309,8 @@ static struct regulator_init_data ldo1_data = {
309}; 309};
310 310
311static struct regulator_consumer_supply ldo2_consumers[] = { 311static struct regulator_consumer_supply ldo2_consumers[] = {
312 { 312 { .supply = "AVDD", .dev_name = "1-001a" },
313 .supply = "AVDD", 313 { .supply = "HPVDD", .dev_name = "1-001a" },
314 },
315 {
316 .supply = "HPVDD",
317 },
318}; 314};
319 315
320/* CODEC and SIM */ 316/* CODEC and SIM */
@@ -385,8 +381,6 @@ static struct wm8350_audio_platform_data imx32ads_wm8350_setup = {
385 381
386static int mx31_wm8350_init(struct wm8350 *wm8350) 382static int mx31_wm8350_init(struct wm8350 *wm8350)
387{ 383{
388 int i;
389
390 wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN, 384 wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN,
391 WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW, 385 WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW,
392 WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF, 386 WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF,
@@ -422,10 +416,6 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
422 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, 416 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
423 WM8350_GPIO_DEBOUNCE_OFF); 417 WM8350_GPIO_DEBOUNCE_OFF);
424 418
425 /* Fix up for our own supplies. */
426 for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++)
427 ldo2_consumers[i].dev = wm8350->dev;
428
429 wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data); 419 wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data);
430 wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data); 420 wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data);
431 wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data); 421 wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data);
@@ -493,14 +483,27 @@ static void mxc_init_i2c(void)
493} 483}
494#endif 484#endif
495 485
486static unsigned int ssi_pins[] = {
487 MX31_PIN_SFS5__SFS5,
488 MX31_PIN_SCK5__SCK5,
489 MX31_PIN_SRXD5__SRXD5,
490 MX31_PIN_STXD5__STXD5,
491};
492
493static void mxc_init_audio(void)
494{
495 mxc_register_device(&imx_ssi_device0, NULL);
496 mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
497}
498
496/*! 499/*!
497 * This structure defines static mappings for the i.MX31ADS board. 500 * This structure defines static mappings for the i.MX31ADS board.
498 */ 501 */
499static struct map_desc mx31ads_io_desc[] __initdata = { 502static struct map_desc mx31ads_io_desc[] __initdata = {
500 { 503 {
501 .virtual = CS4_BASE_ADDR_VIRT, 504 .virtual = MX31_CS4_BASE_ADDR_VIRT,
502 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 505 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
503 .length = CS4_SIZE / 2, 506 .length = MX31_CS4_SIZE / 2,
504 .type = MT_DEVICE 507 .type = MT_DEVICE
505 }, 508 },
506}; 509};
@@ -528,6 +531,7 @@ static void __init mxc_board_init(void)
528 mxc_init_extuart(); 531 mxc_init_extuart();
529 mxc_init_imx_uart(); 532 mxc_init_imx_uart();
530 mxc_init_i2c(); 533 mxc_init_i2c();
534 mxc_init_audio();
531} 535}
532 536
533static void __init mx31ads_timer_init(void) 537static void __init mx31ads_timer_init(void)
@@ -545,9 +549,9 @@ static struct sys_timer mx31ads_timer = {
545 */ 549 */
546MACHINE_START(MX31ADS, "Freescale MX31ADS") 550MACHINE_START(MX31ADS, "Freescale MX31ADS")
547 /* Maintainer: Freescale Semiconductor, Inc. */ 551 /* Maintainer: Freescale Semiconductor, Inc. */
548 .phys_io = AIPS1_BASE_ADDR, 552 .phys_io = MX31_AIPS1_BASE_ADDR,
549 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 553 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
550 .boot_params = PHYS_OFFSET + 0x100, 554 .boot_params = MX3x_PHYS_OFFSET + 0x100,
551 .map_io = mx31ads_map_io, 555 .map_io = mx31ads_map_io,
552 .init_irq = mx31ads_init_irq, 556 .init_irq = mx31ads_init_irq,
553 .init_machine = mxc_board_init, 557 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 9ce029f554b9..80847b04c063 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -57,8 +57,8 @@
57 57
58static struct resource smsc91x_resources[] = { 58static struct resource smsc91x_resources[] = {
59 { 59 {
60 .start = CS4_BASE_ADDR, 60 .start = MX31_CS4_BASE_ADDR,
61 .end = CS4_BASE_ADDR + 0xffff, 61 .end = MX31_CS4_BASE_ADDR + 0xffff,
62 .flags = IORESOURCE_MEM, 62 .flags = IORESOURCE_MEM,
63 }, 63 },
64 { 64 {
@@ -195,9 +195,9 @@ static struct sys_timer mx31lilly_timer = {
195}; 195};
196 196
197MACHINE_START(LILLY1131, "INCO startec LILLY-1131") 197MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
198 .phys_io = AIPS1_BASE_ADDR, 198 .phys_io = MX31_AIPS1_BASE_ADDR,
199 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 199 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
200 .boot_params = PHYS_OFFSET + 0x100, 200 .boot_params = MX3x_PHYS_OFFSET + 0x100,
201 .map_io = mx31_map_io, 201 .map_io = mx31_map_io,
202 .init_irq = mx31_init_irq, 202 .init_irq = mx31_init_irq,
203 .init_machine = mx31lilly_board_init, 203 .init_machine = mx31lilly_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index 789b20d1730f..2b6d11400877 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {
82 82
83static struct resource smsc911x_resources[] = { 83static struct resource smsc911x_resources[] = {
84 { 84 {
85 .start = CS4_BASE_ADDR, 85 .start = MX31_CS4_BASE_ADDR,
86 .end = CS4_BASE_ADDR + 0x100, 86 .end = MX31_CS4_BASE_ADDR + 0x100,
87 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
88 }, { 88 }, {
89 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), 89 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {
214 */ 214 */
215static struct map_desc mx31lite_io_desc[] __initdata = { 215static struct map_desc mx31lite_io_desc[] __initdata = {
216 { 216 {
217 .virtual = CS4_BASE_ADDR_VIRT, 217 .virtual = MX31_CS4_BASE_ADDR_VIRT,
218 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 218 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
219 .length = CS4_SIZE, 219 .length = MX31_CS4_SIZE,
220 .type = MT_DEVICE 220 .type = MT_DEVICE
221 } 221 }
222}; 222};
@@ -287,9 +287,9 @@ struct sys_timer mx31lite_timer = {
287 287
288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
289 /* Maintainer: Freescale Semiconductor, Inc. */ 289 /* Maintainer: Freescale Semiconductor, Inc. */
290 .phys_io = AIPS1_BASE_ADDR, 290 .phys_io = MX31_AIPS1_BASE_ADDR,
291 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 291 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
292 .boot_params = PHYS_OFFSET + 0x100, 292 .boot_params = MX3x_PHYS_OFFSET + 0x100,
293 .map_io = mx31lite_map_io, 293 .map_io = mx31lite_map_io,
294 .init_irq = mx31_init_irq, 294 .init_irq = mx31_init_irq,
295 .init_machine = mxc_board_init, 295 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index cfd605d078ec..a7dc5191bf5e 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -96,9 +96,6 @@ static unsigned int moboard_pins[] = {
96 /* LEDs */ 96 /* LEDs */
97 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, 97 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
98 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, 98 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
99 /* SEL */
100 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
101 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
102 /* SPI1 */ 99 /* SPI1 */
103 MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, 100 MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
104 MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, 101 MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
@@ -352,9 +349,7 @@ static struct fsl_usb2_platform_data usb_pdata = {
352 349
353static int moboard_usbh2_hw_init(struct platform_device *pdev) 350static int moboard_usbh2_hw_init(struct platform_device *pdev)
354{ 351{
355 int ret = gpio_request(USBH2_EN_B, "usbh2-en"); 352 int ret;
356 if (ret)
357 return ret;
358 353
359 mxc_iomux_set_gpr(MUX_PGP_UH2, true); 354 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
360 355
@@ -371,6 +366,9 @@ static int moboard_usbh2_hw_init(struct platform_device *pdev)
371 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); 366 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
372 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); 367 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
373 368
369 ret = gpio_request(USBH2_EN_B, "usbh2-en");
370 if (ret)
371 return ret;
374 gpio_direction_output(USBH2_EN_B, 0); 372 gpio_direction_output(USBH2_EN_B, 0);
375 373
376 return 0; 374 return 0;
@@ -431,34 +429,6 @@ static struct platform_device mx31moboard_leds_device = {
431 }, 429 },
432}; 430};
433 431
434#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
435#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
436#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
437#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
438
439static void mx31moboard_init_sel_gpios(void)
440{
441 if (!gpio_request(SEL0, "sel0")) {
442 gpio_direction_input(SEL0);
443 gpio_export(SEL0, true);
444 }
445
446 if (!gpio_request(SEL1, "sel1")) {
447 gpio_direction_input(SEL1);
448 gpio_export(SEL1, true);
449 }
450
451 if (!gpio_request(SEL2, "sel2")) {
452 gpio_direction_input(SEL2);
453 gpio_export(SEL2, true);
454 }
455
456 if (!gpio_request(SEL3, "sel3")) {
457 gpio_direction_input(SEL3);
458 gpio_export(SEL3, true);
459 }
460}
461
462static struct ipu_platform_data mx3_ipu_data = { 432static struct ipu_platform_data mx3_ipu_data = {
463 .irq_base = MXC_IPU_IRQ_START, 433 .irq_base = MXC_IPU_IRQ_START,
464}; 434};
@@ -518,8 +488,6 @@ static void __init mxc_board_init(void)
518 488
519 mxc_register_device(&mxc_uart_device4, &uart4_pdata); 489 mxc_register_device(&mxc_uart_device4, &uart4_pdata);
520 490
521 mx31moboard_init_sel_gpios();
522
523 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); 491 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
524 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); 492 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
525 493
@@ -552,6 +520,9 @@ static void __init mxc_board_init(void)
552 case MX31MARXBOT: 520 case MX31MARXBOT:
553 mx31moboard_marxbot_init(); 521 mx31moboard_marxbot_init();
554 break; 522 break;
523 case MX31SMARTBOT:
524 mx31moboard_smartbot_init();
525 break;
555 default: 526 default:
556 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", 527 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
557 mx31moboard_baseboard); 528 mx31moboard_baseboard);
@@ -569,9 +540,9 @@ struct sys_timer mx31moboard_timer = {
569 540
570MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") 541MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
571 /* Maintainer: Valentin Longchamp, EPFL Mobots group */ 542 /* Maintainer: Valentin Longchamp, EPFL Mobots group */
572 .phys_io = AIPS1_BASE_ADDR, 543 .phys_io = MX31_AIPS1_BASE_ADDR,
573 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 544 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
574 .boot_params = PHYS_OFFSET + 0x100, 545 .boot_params = MX3x_PHYS_OFFSET + 0x100,
575 .map_io = mx31_map_io, 546 .map_io = mx31_map_io,
576 .init_irq = mx31_init_irq, 547 .init_irq = mx31_init_irq,
577 .init_machine = mxc_board_init, 548 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mach-mx35pdk.c
index 0bbc65ea23c8..bcac84d4dca4 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mach-mx35pdk.c
@@ -106,9 +106,9 @@ struct sys_timer mx35pdk_timer = {
106 106
107MACHINE_START(MX35_3DS, "Freescale MX35PDK") 107MACHINE_START(MX35_3DS, "Freescale MX35PDK")
108 /* Maintainer: Freescale Semiconductor, Inc */ 108 /* Maintainer: Freescale Semiconductor, Inc */
109 .phys_io = AIPS1_BASE_ADDR, 109 .phys_io = MX35_AIPS1_BASE_ADDR,
110 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 110 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
111 .boot_params = PHYS_OFFSET + 0x100, 111 .boot_params = MX3x_PHYS_OFFSET + 0x100,
112 .map_io = mx35_map_io, 112 .map_io = mx35_map_io,
113 .init_irq = mx35_init_irq, 113 .init_irq = mx35_init_irq,
114 .init_machine = mxc_board_init, 114 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 5be396917c99..11f531559169 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -33,6 +33,9 @@
33#include <linux/irq.h> 33#include <linux/irq.h>
34#include <linux/fsl_devices.h> 34#include <linux/fsl_devices.h>
35#include <linux/can/platform/sja1000.h> 35#include <linux/can/platform/sja1000.h>
36#include <linux/usb/otg.h>
37#include <linux/usb/ulpi.h>
38#include <linux/fsl_devices.h>
36 39
37#include <media/soc_camera.h> 40#include <media/soc_camera.h>
38 41
@@ -51,6 +54,8 @@
51#include <mach/mx3_camera.h> 54#include <mach/mx3_camera.h>
52#include <mach/mx3fb.h> 55#include <mach/mx3fb.h>
53#include <mach/mxc_nand.h> 56#include <mach/mxc_nand.h>
57#include <mach/mxc_ehci.h>
58#include <mach/ulpi.h>
54 59
55#include "devices.h" 60#include "devices.h"
56#include "pcm037.h" 61#include "pcm037.h"
@@ -172,19 +177,7 @@ static unsigned int pcm037_pins[] = {
172 MX31_PIN_CSI_VSYNC__CSI_VSYNC, 177 MX31_PIN_CSI_VSYNC__CSI_VSYNC,
173 /* GPIO */ 178 /* GPIO */
174 IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO), 179 IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
175}; 180 /* OTG */
176
177static struct physmap_flash_data pcm037_flash_data = {
178 .width = 2,
179};
180
181static struct resource pcm037_flash_resource = {
182 .start = 0xa0000000,
183 .end = 0xa1ffffff,
184 .flags = IORESOURCE_MEM,
185};
186
187static int usbotg_pins[] = {
188 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, 181 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
189 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, 182 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
190 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, 183 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
@@ -197,39 +190,29 @@ static int usbotg_pins[] = {
197 MX31_PIN_USBOTG_DIR__USBOTG_DIR, 190 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
198 MX31_PIN_USBOTG_NXT__USBOTG_NXT, 191 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
199 MX31_PIN_USBOTG_STP__USBOTG_STP, 192 MX31_PIN_USBOTG_STP__USBOTG_STP,
193 /* USB host 2 */
194 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
195 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
196 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
197 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
198 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
199 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
200 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
201 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
202 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
203 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
204 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
205 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
200}; 206};
201 207
202/* USB OTG HS port */ 208static struct physmap_flash_data pcm037_flash_data = {
203static int __init gpio_usbotg_hs_activate(void) 209 .width = 2,
204{ 210};
205 int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
206 ARRAY_SIZE(usbotg_pins), "usbotg");
207
208 if (ret < 0) {
209 printk(KERN_ERR "Cannot set up OTG pins\n");
210 return ret;
211 }
212
213 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
214 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
215 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
216 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
217 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
218 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
219 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
220 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
221 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
222 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
223 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
224 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
225
226 return 0;
227}
228 211
229/* OTG config */ 212static struct resource pcm037_flash_resource = {
230static struct fsl_usb2_platform_data usb_pdata = { 213 .start = 0xa0000000,
231 .operating_mode = FSL_USB2_DR_DEVICE, 214 .end = 0xa1ffffff,
232 .phy_mode = FSL_USB2_PHY_ULPI, 215 .flags = IORESOURCE_MEM,
233}; 216};
234 217
235static struct platform_device pcm037_flash = { 218static struct platform_device pcm037_flash = {
@@ -248,8 +231,8 @@ static struct imxuart_platform_data uart_pdata = {
248 231
249static struct resource smsc911x_resources[] = { 232static struct resource smsc911x_resources[] = {
250 { 233 {
251 .start = CS1_BASE_ADDR + 0x300, 234 .start = MX31_CS1_BASE_ADDR + 0x300,
252 .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, 235 .end = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
253 .flags = IORESOURCE_MEM, 236 .flags = IORESOURCE_MEM,
254 }, { 237 }, {
255 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), 238 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
@@ -281,8 +264,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
281}; 264};
282 265
283static struct resource pcm038_sram_resource = { 266static struct resource pcm038_sram_resource = {
284 .start = CS4_BASE_ADDR, 267 .start = MX31_CS4_BASE_ADDR,
285 .end = CS4_BASE_ADDR + 512 * 1024 - 1, 268 .end = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
286 .flags = IORESOURCE_MEM, 269 .flags = IORESOURCE_MEM,
287}; 270};
288 271
@@ -536,8 +519,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {
536 519
537static struct resource pcm970_sja1000_resources[] = { 520static struct resource pcm970_sja1000_resources[] = {
538 { 521 {
539 .start = CS5_BASE_ADDR, 522 .start = MX31_CS5_BASE_ADDR,
540 .end = CS5_BASE_ADDR + 0x100 - 1, 523 .end = MX31_CS5_BASE_ADDR + 0x100 - 1,
541 .flags = IORESOURCE_MEM, 524 .flags = IORESOURCE_MEM,
542 }, { 525 }, {
543 .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)), 526 .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
@@ -561,16 +544,65 @@ static struct platform_device pcm970_sja1000 = {
561 .num_resources = ARRAY_SIZE(pcm970_sja1000_resources), 544 .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
562}; 545};
563 546
547static struct mxc_usbh_platform_data otg_pdata = {
548 .portsc = MXC_EHCI_MODE_ULPI,
549 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
550};
551
552static struct mxc_usbh_platform_data usbh2_pdata = {
553 .portsc = MXC_EHCI_MODE_ULPI,
554 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
555};
556
557static struct fsl_usb2_platform_data otg_device_pdata = {
558 .operating_mode = FSL_USB2_DR_DEVICE,
559 .phy_mode = FSL_USB2_PHY_ULPI,
560};
561
562static int otg_mode_host;
563
564static int __init pcm037_otg_mode(char *options)
565{
566 if (!strcmp(options, "host"))
567 otg_mode_host = 1;
568 else if (!strcmp(options, "device"))
569 otg_mode_host = 0;
570 else
571 pr_info("otg_mode neither \"host\" nor \"device\". "
572 "Defaulting to device\n");
573 return 0;
574}
575__setup("otg_mode=", pcm037_otg_mode);
576
564/* 577/*
565 * Board specific initialization. 578 * Board specific initialization.
566 */ 579 */
567static void __init mxc_board_init(void) 580static void __init mxc_board_init(void)
568{ 581{
569 int ret; 582 int ret;
583 u32 tmp;
584
585 mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
570 586
571 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), 587 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
572 "pcm037"); 588 "pcm037");
573 589
590#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
591 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
592
593 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
594 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
595 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
596 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
597 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
598 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
599 mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */
600 mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */
601 mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */
602 mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */
603 mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */
604 mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */
605
574 if (pcm037_variant() == PCM037_EET) 606 if (pcm037_variant() == PCM037_EET)
575 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins, 607 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
576 ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1"); 608 ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
@@ -608,8 +640,6 @@ static void __init mxc_board_init(void)
608 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); 640 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
609 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 641 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
610 mxc_register_device(&mx3_fb, &mx3fb_pdata); 642 mxc_register_device(&mx3_fb, &mx3fb_pdata);
611 if (!gpio_usbotg_hs_activate())
612 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
613 643
614 /* CSI */ 644 /* CSI */
615 /* Camera power: default - off */ 645 /* Camera power: default - off */
@@ -623,6 +653,23 @@ static void __init mxc_board_init(void)
623 mxc_register_device(&mx3_camera, &camera_pdata); 653 mxc_register_device(&mx3_camera, &camera_pdata);
624 654
625 platform_device_register(&pcm970_sja1000); 655 platform_device_register(&pcm970_sja1000);
656
657#if defined(CONFIG_USB_ULPI)
658 if (otg_mode_host) {
659 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
660 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
661
662 mxc_register_device(&mxc_otg_host, &otg_pdata);
663 }
664
665 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
666 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
667
668 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
669#endif
670 if (!otg_mode_host)
671 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
672
626} 673}
627 674
628static void __init pcm037_timer_init(void) 675static void __init pcm037_timer_init(void)
@@ -636,9 +683,9 @@ struct sys_timer pcm037_timer = {
636 683
637MACHINE_START(PCM037, "Phytec Phycore pcm037") 684MACHINE_START(PCM037, "Phytec Phycore pcm037")
638 /* Maintainer: Pengutronix */ 685 /* Maintainer: Pengutronix */
639 .phys_io = AIPS1_BASE_ADDR, 686 .phys_io = MX31_AIPS1_BASE_ADDR,
640 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 687 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
641 .boot_params = PHYS_OFFSET + 0x100, 688 .boot_params = MX3x_PHYS_OFFSET + 0x100,
642 .map_io = mx31_map_io, 689 .map_io = mx31_map_io,
643 .init_irq = mx31_init_irq, 690 .init_irq = mx31_init_irq,
644 .init_machine = mxc_board_init, 691 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 8d386000fc40..8d386000fc40 100644
--- a/arch/arm/mach-mx3/pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index e3aa829be586..1bf1ec2eef5e 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -26,8 +26,12 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/smc911x.h> 27#include <linux/smc911x.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/delay.h>
29#include <linux/i2c.h> 30#include <linux/i2c.h>
30#include <linux/i2c/at24.h> 31#include <linux/i2c/at24.h>
32#include <linux/usb/otg.h>
33#include <linux/usb/ulpi.h>
34#include <linux/fsl_devices.h>
31 35
32#include <asm/mach-types.h> 36#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
@@ -44,6 +48,10 @@
44#include <mach/ipu.h> 48#include <mach/ipu.h>
45#include <mach/mx3fb.h> 49#include <mach/mx3fb.h>
46#include <mach/mxc_nand.h> 50#include <mach/mxc_nand.h>
51#include <mach/mxc_ehci.h>
52#include <mach/ulpi.h>
53#include <mach/audmux.h>
54#include <mach/ssi.h>
47 55
48#include "devices.h" 56#include "devices.h"
49 57
@@ -205,6 +213,94 @@ static struct pad_desc pcm043_pads[] = {
205 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, 213 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
206 /* gpio */ 214 /* gpio */
207 MX35_PAD_ATA_CS0__GPIO2_6, 215 MX35_PAD_ATA_CS0__GPIO2_6,
216 /* USB host */
217 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
218 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
219 /* SSI */
220 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
221 MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
222 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
223 MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
224};
225
226#define AC97_GPIO_TXFS (1 * 32 + 31)
227#define AC97_GPIO_TXD (1 * 32 + 28)
228#define AC97_GPIO_RESET (1 * 32 + 0)
229
230static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
231{
232 struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
233 struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
234 int ret;
235
236 ret = gpio_request(AC97_GPIO_TXFS, "SSI");
237 if (ret) {
238 printk("failed to get GPIO_TXFS: %d\n", ret);
239 return;
240 }
241
242 mxc_iomux_v3_setup_pad(&txfs_gpio);
243
244 /* warm reset */
245 gpio_direction_output(AC97_GPIO_TXFS, 1);
246 udelay(2);
247 gpio_set_value(AC97_GPIO_TXFS, 0);
248
249 gpio_free(AC97_GPIO_TXFS);
250 mxc_iomux_v3_setup_pad(&txfs);
251}
252
253static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
254{
255 struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
256 struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
257 struct pad_desc txd_gpio = MX35_PAD_STXD4__GPIO2_28;
258 struct pad_desc txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
259 struct pad_desc reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
260 int ret;
261
262 ret = gpio_request(AC97_GPIO_TXFS, "SSI");
263 if (ret)
264 goto err1;
265
266 ret = gpio_request(AC97_GPIO_TXD, "SSI");
267 if (ret)
268 goto err2;
269
270 ret = gpio_request(AC97_GPIO_RESET, "SSI");
271 if (ret)
272 goto err3;
273
274 mxc_iomux_v3_setup_pad(&txfs_gpio);
275 mxc_iomux_v3_setup_pad(&txd_gpio);
276 mxc_iomux_v3_setup_pad(&reset_gpio);
277
278 gpio_direction_output(AC97_GPIO_TXFS, 0);
279 gpio_direction_output(AC97_GPIO_TXD, 0);
280
281 /* cold reset */
282 gpio_direction_output(AC97_GPIO_RESET, 0);
283 udelay(10);
284 gpio_direction_output(AC97_GPIO_RESET, 1);
285
286 mxc_iomux_v3_setup_pad(&txd);
287 mxc_iomux_v3_setup_pad(&txfs);
288
289 gpio_free(AC97_GPIO_RESET);
290err3:
291 gpio_free(AC97_GPIO_TXD);
292err2:
293 gpio_free(AC97_GPIO_TXFS);
294err1:
295 if (ret)
296 printk("%s failed with %d\n", __func__, ret);
297 mdelay(1);
298}
299
300static struct imx_ssi_platform_data pcm043_ssi_pdata = {
301 .ac97_reset = pcm043_ac97_cold_reset,
302 .ac97_warm_reset = pcm043_ac97_warm_reset,
303 .flags = IMX_SSI_USE_AC97,
208}; 304};
209 305
210static struct mxc_nand_platform_data pcm037_nand_board_info = { 306static struct mxc_nand_platform_data pcm037_nand_board_info = {
@@ -212,6 +308,37 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
212 .hw_ecc = 1, 308 .hw_ecc = 1,
213}; 309};
214 310
311static struct mxc_usbh_platform_data otg_pdata = {
312 .portsc = MXC_EHCI_MODE_UTMI,
313 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
314};
315
316static struct mxc_usbh_platform_data usbh1_pdata = {
317 .portsc = MXC_EHCI_MODE_SERIAL,
318 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
319 MXC_EHCI_IPPUE_DOWN,
320};
321
322static struct fsl_usb2_platform_data otg_device_pdata = {
323 .operating_mode = FSL_USB2_DR_DEVICE,
324 .phy_mode = FSL_USB2_PHY_UTMI,
325};
326
327static int otg_mode_host;
328
329static int __init pcm043_otg_mode(char *options)
330{
331 if (!strcmp(options, "host"))
332 otg_mode_host = 1;
333 else if (!strcmp(options, "device"))
334 otg_mode_host = 0;
335 else
336 pr_info("otg_mode neither \"host\" nor \"device\". "
337 "Defaulting to device\n");
338 return 0;
339}
340__setup("otg_mode=", pcm043_otg_mode);
341
215/* 342/*
216 * Board specific initialization. 343 * Board specific initialization.
217 */ 344 */
@@ -219,10 +346,23 @@ static void __init mxc_board_init(void)
219{ 346{
220 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); 347 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
221 348
349 mxc_audmux_v2_configure_port(3,
350 MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
351 MXC_AUDMUX_V2_PTCR_TFSEL(0) |
352 MXC_AUDMUX_V2_PTCR_TFSDIR,
353 MXC_AUDMUX_V2_PDCR_RXDSEL(0));
354
355 mxc_audmux_v2_configure_port(0,
356 MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
357 MXC_AUDMUX_V2_PTCR_TCSEL(3) |
358 MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
359 MXC_AUDMUX_V2_PDCR_RXDSEL(3));
360
222 platform_add_devices(devices, ARRAY_SIZE(devices)); 361 platform_add_devices(devices, ARRAY_SIZE(devices));
223 362
224 mxc_register_device(&mxc_uart_device0, &uart_pdata); 363 mxc_register_device(&mxc_uart_device0, &uart_pdata);
225 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); 364 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
365 mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata);
226 366
227 mxc_register_device(&mxc_uart_device1, &uart_pdata); 367 mxc_register_device(&mxc_uart_device1, &uart_pdata);
228 368
@@ -235,6 +375,20 @@ static void __init mxc_board_init(void)
235 375
236 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 376 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
237 mxc_register_device(&mx3_fb, &mx3fb_pdata); 377 mxc_register_device(&mx3_fb, &mx3fb_pdata);
378
379#if defined(CONFIG_USB_ULPI)
380 if (otg_mode_host) {
381 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
382 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
383
384 mxc_register_device(&mxc_otg_host, &otg_pdata);
385 }
386
387 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
388#endif
389 if (!otg_mode_host)
390 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
391
238} 392}
239 393
240static void __init pcm043_timer_init(void) 394static void __init pcm043_timer_init(void)
@@ -248,9 +402,9 @@ struct sys_timer pcm043_timer = {
248 402
249MACHINE_START(PCM043, "Phytec Phycore pcm043") 403MACHINE_START(PCM043, "Phytec Phycore pcm043")
250 /* Maintainer: Pengutronix */ 404 /* Maintainer: Pengutronix */
251 .phys_io = AIPS1_BASE_ADDR, 405 .phys_io = MX35_AIPS1_BASE_ADDR,
252 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 406 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
253 .boot_params = PHYS_OFFSET + 0x100, 407 .boot_params = MX3x_PHYS_OFFSET + 0x100,
254 .map_io = mx35_map_io, 408 .map_io = mx35_map_io,
255 .init_irq = mx35_init_irq, 409 .init_irq = mx35_init_irq,
256 .init_machine = mxc_board_init, 410 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/mach-qong.c
index 044511f1b9a9..e5b5b8323a17 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -43,7 +43,7 @@
43#define QONG_FPGA_VERSION(major, minor, rev) \ 43#define QONG_FPGA_VERSION(major, minor, rev) \
44 (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) 44 (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
45 45
46#define QONG_FPGA_BASEADDR CS1_BASE_ADDR 46#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
47#define QONG_FPGA_PERIPH_SIZE (1 << 24) 47#define QONG_FPGA_PERIPH_SIZE (1 << 24)
48 48
49#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR 49#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = {
115}; 115};
116 116
117static struct resource qong_flash_resource = { 117static struct resource qong_flash_resource = {
118 .start = CS0_BASE_ADDR, 118 .start = MX31_CS0_BASE_ADDR,
119 .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1, 119 .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
120 .flags = IORESOURCE_MEM, 120 .flags = IORESOURCE_MEM,
121}; 121};
122 122
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = {
180}; 180};
181 181
182static struct resource qong_nand_resource = { 182static struct resource qong_nand_resource = {
183 .start = CS3_BASE_ADDR, 183 .start = MX31_CS3_BASE_ADDR,
184 .end = CS3_BASE_ADDR + SZ_32M - 1, 184 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
185 .flags = IORESOURCE_MEM, 185 .flags = IORESOURCE_MEM,
186}; 186};
187 187
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {
198static void __init qong_init_nand_mtd(void) 198static void __init qong_init_nand_mtd(void)
199{ 199{
200 /* init CS */ 200 /* init CS */
201 __raw_writel(0x00004f00, CSCR_U(3)); 201 mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800);
202 __raw_writel(0x20013b31, CSCR_L(3));
203 __raw_writel(0x00020800, CSCR_A(3));
204 mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true); 202 mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
205 203
206 /* enable pin */ 204 /* enable pin */
@@ -275,9 +273,9 @@ static struct sys_timer qong_timer = {
275 273
276MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") 274MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
277 /* Maintainer: DENX Software Engineering GmbH */ 275 /* Maintainer: DENX Software Engineering GmbH */
278 .phys_io = AIPS1_BASE_ADDR, 276 .phys_io = MX31_AIPS1_BASE_ADDR,
279 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 277 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
280 .boot_params = PHYS_OFFSET + 0x100, 278 .boot_params = MX3x_PHYS_OFFSET + 0x100,
281 .map_io = mx31_map_io, 279 .map_io = mx31_map_io,
282 .init_irq = mx31_init_irq, 280 .init_irq = mx31_init_irq,
283 .init_machine = mxc_board_init, 281 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 694611d6b057..ccd874225c3b 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {
67 MX31_PIN_CSPI1_SS0__SS0, 67 MX31_PIN_CSPI1_SS0__SS0,
68 MX31_PIN_CSPI1_SS1__SS1, 68 MX31_PIN_CSPI1_SS1__SS1,
69 MX31_PIN_CSPI1_SS2__SS2, 69 MX31_PIN_CSPI1_SS2__SS2,
70 /* SDHC1 */
71 MX31_PIN_SD1_DATA0__SD1_DATA0,
72 MX31_PIN_SD1_DATA1__SD1_DATA1,
73 MX31_PIN_SD1_DATA2__SD1_DATA2,
74 MX31_PIN_SD1_DATA3__SD1_DATA3,
75 MX31_PIN_SD1_CLK__SD1_CLK,
76 MX31_PIN_SD1_CMD__SD1_CMD,
70}; 77};
71 78
72/* UART */ 79/* UART */
@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {
79static int gpio_det, gpio_wp; 86static int gpio_det, gpio_wp;
80 87
81#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 88#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
82 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 89 PAD_CTL_ODE_CMOS)
83 90
84static int mxc_mmc1_get_ro(struct device *dev) 91static int mxc_mmc1_get_ro(struct device *dev)
85{ 92{
86 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0)); 93 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
87} 94}
88 95
89static int mxc_mmc1_init(struct device *dev, 96static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev,
94 gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1); 101 gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
95 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6); 102 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
96 103
97 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); 104 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
98 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); 105 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
99 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); 106 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
100 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); 107 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
108 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
109 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
110 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
111 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
112 mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
113 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
101 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); 114 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
102 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
103 115
104 ret = gpio_request(gpio_det, "MMC detect"); 116 ret = gpio_request(gpio_det, "MMC detect");
105 if (ret) 117 if (ret)
@@ -113,7 +125,7 @@ static int mxc_mmc1_init(struct device *dev,
113 gpio_direction_input(gpio_wp); 125 gpio_direction_input(gpio_wp);
114 126
115 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq, 127 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
116 IRQF_DISABLED | IRQF_TRIGGER_FALLING, 128 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
117 "MMC detect", data); 129 "MMC detect", data);
118 if (ret) 130 if (ret)
119 goto exit_free_wp; 131 goto exit_free_wp;
@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
133{ 145{
134 gpio_free(gpio_det); 146 gpio_free(gpio_det);
135 gpio_free(gpio_wp); 147 gpio_free(gpio_wp);
136 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data); 148 free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
137} 149}
138 150
139static struct imxmmc_platform_data mmc_pdata = { 151static struct imxmmc_platform_data mmc_pdata = {
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 438428eaf769..9fbad2eb3a49 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -49,6 +49,9 @@ static unsigned int devboard_pins[] = {
49 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, 49 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
50 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, 50 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
51 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, 51 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
52 /* SEL */
53 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
54 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
52}; 55};
53 56
54static struct imxuart_platform_data uart_pdata = { 57static struct imxuart_platform_data uart_pdata = {
@@ -108,6 +111,33 @@ static struct imxmmc_platform_data sdhc2_pdata = {
108 .exit = devboard_sdhc2_exit, 111 .exit = devboard_sdhc2_exit,
109}; 112};
110 113
114#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
115#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
116#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
117#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
118
119static void devboard_init_sel_gpios(void)
120{
121 if (!gpio_request(SEL0, "sel0")) {
122 gpio_direction_input(SEL0);
123 gpio_export(SEL0, true);
124 }
125
126 if (!gpio_request(SEL1, "sel1")) {
127 gpio_direction_input(SEL1);
128 gpio_export(SEL1, true);
129 }
130
131 if (!gpio_request(SEL2, "sel2")) {
132 gpio_direction_input(SEL2);
133 gpio_export(SEL2, true);
134 }
135
136 if (!gpio_request(SEL3, "sel3")) {
137 gpio_direction_input(SEL3);
138 gpio_export(SEL3, true);
139 }
140}
111#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 141#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
112 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 142 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
113 143
@@ -196,5 +226,7 @@ void __init mx31moboard_devboard_init(void)
196 226
197 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 227 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
198 228
229 devboard_init_sel_gpios();
230
199 devboard_usbh1_init(); 231 devboard_usbh1_init();
200} 232}
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 1f44b9ccbb0f..3958515d75bf 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -66,6 +66,9 @@ static unsigned int marxbot_pins[] = {
66 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, 66 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
67 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, 67 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
68 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, 68 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
69 /* SEL */
70 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
71 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
69}; 72};
70 73
71#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) 74#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
@@ -127,12 +130,12 @@ static struct imxmmc_platform_data sdhc2_pdata = {
127static void dspics_resets_init(void) 130static void dspics_resets_init(void)
128{ 131{
129 if (!gpio_request(TRSLAT_RST_B, "translator-rst")) { 132 if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
130 gpio_direction_output(TRSLAT_RST_B, 1); 133 gpio_direction_output(TRSLAT_RST_B, 0);
131 gpio_export(TRSLAT_RST_B, false); 134 gpio_export(TRSLAT_RST_B, false);
132 } 135 }
133 136
134 if (!gpio_request(DSPICS_RST_B, "dspics-rst")) { 137 if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
135 gpio_direction_output(DSPICS_RST_B, 1); 138 gpio_direction_output(DSPICS_RST_B, 0);
136 gpio_export(DSPICS_RST_B, false); 139 gpio_export(DSPICS_RST_B, false);
137 } 140 }
138} 141}
@@ -200,7 +203,7 @@ static int __init marxbot_cam_init(void)
200 int ret = gpio_request(CAM_CHOICE, "cam-choice"); 203 int ret = gpio_request(CAM_CHOICE, "cam-choice");
201 if (ret) 204 if (ret)
202 return ret; 205 return ret;
203 gpio_direction_output(CAM_CHOICE, 1); 206 gpio_direction_output(CAM_CHOICE, 0);
204 207
205 ret = gpio_request(BASECAM_RST_B, "basecam-reset"); 208 ret = gpio_request(BASECAM_RST_B, "basecam-reset");
206 if (ret) 209 if (ret)
@@ -223,6 +226,34 @@ static int __init marxbot_cam_init(void)
223 return 0; 226 return 0;
224} 227}
225 228
229#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
230#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
231#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
232#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
233
234static void marxbot_init_sel_gpios(void)
235{
236 if (!gpio_request(SEL0, "sel0")) {
237 gpio_direction_input(SEL0);
238 gpio_export(SEL0, true);
239 }
240
241 if (!gpio_request(SEL1, "sel1")) {
242 gpio_direction_input(SEL1);
243 gpio_export(SEL1, true);
244 }
245
246 if (!gpio_request(SEL2, "sel2")) {
247 gpio_direction_input(SEL2);
248 gpio_export(SEL2, true);
249 }
250
251 if (!gpio_request(SEL3, "sel3")) {
252 gpio_direction_input(SEL3);
253 gpio_export(SEL3, true);
254 }
255}
256
226#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 257#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
227 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 258 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
228 259
@@ -307,6 +338,8 @@ void __init mx31moboard_marxbot_init(void)
307 mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins), 338 mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
308 "marxbot"); 339 "marxbot");
309 340
341 marxbot_init_sel_gpios();
342
310 dspics_resets_init(); 343 dspics_resets_init();
311 344
312 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 345 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
new file mode 100644
index 000000000000..52a69fc8b14f
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -0,0 +1,162 @@
1/*
2 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/delay.h>
20#include <linux/gpio.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/i2c.h>
24#include <linux/platform_device.h>
25#include <linux/types.h>
26
27#include <mach/common.h>
28#include <mach/hardware.h>
29#include <mach/imx-uart.h>
30#include <mach/iomux-mx3.h>
31
32#include <media/soc_camera.h>
33
34#include "devices.h"
35
36static unsigned int smartbot_pins[] = {
37 /* UART1 */
38 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
39 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
40 /* CSI */
41 MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5,
42 MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7,
43 MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9,
44 MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11,
45 MX31_PIN_CSI_D12__CSI_D12, MX31_PIN_CSI_D13__CSI_D13,
46 MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15,
47 MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK,
48 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
49 MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
50 /* ENABLES */
51 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
52 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
53};
54
55static struct imxuart_platform_data uart_pdata = {
56 .flags = IMXUART_HAVE_RTSCTS,
57};
58
59#define CAM_POWER IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
60#define CAM_RST_B IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
61
62static int smartbot_cam_power(struct device *dev, int on)
63{
64 gpio_set_value(CAM_POWER, !on);
65 return 0;
66}
67
68static int smartbot_cam_reset(struct device *dev)
69{
70 gpio_set_value(CAM_RST_B, 0);
71 udelay(100);
72 gpio_set_value(CAM_RST_B, 1);
73 return 0;
74}
75
76static struct i2c_board_info smartbot_i2c_devices[] = {
77 {
78 I2C_BOARD_INFO("mt9t031", 0x5d),
79 },
80};
81
82static struct soc_camera_link base_iclink = {
83 .bus_id = 0, /* Must match with the camera ID */
84 .power = smartbot_cam_power,
85 .reset = smartbot_cam_reset,
86 .board_info = &smartbot_i2c_devices[0],
87 .i2c_adapter_id = 0,
88 .module_name = "mt9t031",
89};
90
91static struct platform_device smartbot_camera[] = {
92 {
93 .name = "soc-camera-pdrv",
94 .id = 0,
95 .dev = {
96 .platform_data = &base_iclink,
97 },
98 },
99};
100
101static struct platform_device *smartbot_cameras[] __initdata = {
102 &smartbot_camera[0],
103};
104
105static int __init smartbot_cam_init(void)
106{
107 int ret = gpio_request(CAM_RST_B, "cam-reset");
108 if (ret)
109 return ret;
110 gpio_direction_output(CAM_RST_B, 1);
111 ret = gpio_request(CAM_POWER, "cam-standby");
112 if (ret)
113 return ret;
114 gpio_direction_output(CAM_POWER, 0);
115
116 return 0;
117}
118
119#define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
120#define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
121#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
122#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
123
124static void smartbot_resets_init(void)
125{
126 if (!gpio_request(POWER_EN, "power-enable")) {
127 gpio_direction_output(POWER_EN, 0);
128 gpio_export(POWER_EN, false);
129 }
130
131 if (!gpio_request(DSPIC_RST_B, "dspic-rst")) {
132 gpio_direction_output(DSPIC_RST_B, 0);
133 gpio_export(DSPIC_RST_B, false);
134 }
135
136 if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
137 gpio_direction_output(TRSLAT_RST_B, 0);
138 gpio_export(TRSLAT_RST_B, false);
139 }
140
141 if (!gpio_request(SEL3, "sel3")) {
142 gpio_direction_input(SEL3);
143 gpio_export(SEL3, true);
144 }
145}
146/*
147 * system init for baseboard usage. Will be called by mx31moboard init.
148 */
149void __init mx31moboard_smartbot_init(void)
150{
151 printk(KERN_INFO "Initializing mx31smartbot peripherals\n");
152
153 mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
154 "smartbot");
155
156 mxc_register_device(&mxc_uart_device1, &uart_pdata);
157
158 smartbot_resets_init();
159
160 smartbot_cam_init();
161 platform_add_devices(smartbot_cameras, ARRAY_SIZE(smartbot_cameras));
162}
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
new file mode 100644
index 000000000000..1576d51e676c
--- /dev/null
+++ b/arch/arm/mach-mx5/Kconfig
@@ -0,0 +1,18 @@
1if ARCH_MX5
2
3config ARCH_MX51
4 bool
5 default y
6 select MXC_TZIC
7 select ARCH_MXC_IOMUX_V3
8
9comment "MX5 platforms:"
10
11config MACH_MX51_BABBAGE
12 bool "Support MX51 BABBAGE platforms"
13 help
14 Include support for MX51 Babbage platform, also known as MX51EVK in
15 u-boot. This includes specific configurations for the board and its
16 peripherals.
17
18endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
new file mode 100644
index 000000000000..bf23f869ef51
--- /dev/null
+++ b/arch/arm/mach-mx5/Makefile
@@ -0,0 +1,9 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51.o devices.o
7
8obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
9
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
new file mode 100644
index 000000000000..9939a19d99a1
--- /dev/null
+++ b/arch/arm/mach-mx5/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x90008000
2params_phys-y := 0x90000100
3initrd_phys-y := 0x90800000
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
new file mode 100644
index 000000000000..ee67a71db80d
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -0,0 +1,98 @@
1/*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/init.h>
14#include <linux/platform_device.h>
15
16#include <mach/common.h>
17#include <mach/hardware.h>
18#include <mach/imx-uart.h>
19#include <mach/iomux-mx51.h>
20
21#include <asm/irq.h>
22#include <asm/setup.h>
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/time.h>
26
27#include "devices.h"
28
29static struct platform_device *devices[] __initdata = {
30 &mxc_fec_device,
31};
32
33static struct pad_desc mx51babbage_pads[] = {
34 /* UART1 */
35 MX51_PAD_UART1_RXD__UART1_RXD,
36 MX51_PAD_UART1_TXD__UART1_TXD,
37 MX51_PAD_UART1_RTS__UART1_RTS,
38 MX51_PAD_UART1_CTS__UART1_CTS,
39
40 /* UART2 */
41 MX51_PAD_UART2_RXD__UART2_RXD,
42 MX51_PAD_UART2_TXD__UART2_TXD,
43
44 /* UART3 */
45 MX51_PAD_EIM_D25__UART3_RXD,
46 MX51_PAD_EIM_D26__UART3_TXD,
47 MX51_PAD_EIM_D27__UART3_RTS,
48 MX51_PAD_EIM_D24__UART3_CTS,
49};
50
51/* Serial ports */
52#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
53static struct imxuart_platform_data uart_pdata = {
54 .flags = IMXUART_HAVE_RTSCTS,
55};
56
57static inline void mxc_init_imx_uart(void)
58{
59 mxc_register_device(&mxc_uart_device0, &uart_pdata);
60 mxc_register_device(&mxc_uart_device1, &uart_pdata);
61 mxc_register_device(&mxc_uart_device2, &uart_pdata);
62}
63#else /* !SERIAL_IMX */
64static inline void mxc_init_imx_uart(void)
65{
66}
67#endif /* SERIAL_IMX */
68
69/*
70 * Board specific initialization.
71 */
72static void __init mxc_board_init(void)
73{
74 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
75 ARRAY_SIZE(mx51babbage_pads));
76 mxc_init_imx_uart();
77 platform_add_devices(devices, ARRAY_SIZE(devices));
78}
79
80static void __init mx51_babbage_timer_init(void)
81{
82 mx51_clocks_init(32768, 24000000, 22579200, 0);
83}
84
85static struct sys_timer mxc_timer = {
86 .init = mx51_babbage_timer_init,
87};
88
89MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
90 /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
91 .phys_io = MX51_AIPS1_BASE_ADDR,
92 .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
93 .boot_params = PHYS_OFFSET + 0x100,
94 .map_io = mx51_map_io,
95 .init_irq = mx51_init_irq,
96 .init_machine = mxc_board_init,
97 .timer = &mxc_timer,
98MACHINE_END
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
new file mode 100644
index 000000000000..be90c03101cd
--- /dev/null
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -0,0 +1,825 @@
1/*
2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/mm.h>
14#include <linux/delay.h>
15#include <linux/clk.h>
16#include <linux/io.h>
17
18#include <asm/clkdev.h>
19
20#include <mach/hardware.h>
21#include <mach/common.h>
22#include <mach/clock.h>
23
24#include "crm_regs.h"
25
26/* External clock values passed-in by the board code */
27static unsigned long external_high_reference, external_low_reference;
28static unsigned long oscillator_reference, ckih2_reference;
29
30static struct clk osc_clk;
31static struct clk pll1_main_clk;
32static struct clk pll1_sw_clk;
33static struct clk pll2_sw_clk;
34static struct clk pll3_sw_clk;
35static struct clk lp_apm_clk;
36static struct clk periph_apm_clk;
37static struct clk ahb_clk;
38static struct clk ipg_clk;
39
40#define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */
41
42static int _clk_ccgr_enable(struct clk *clk)
43{
44 u32 reg;
45
46 reg = __raw_readl(clk->enable_reg);
47 reg |= MXC_CCM_CCGRx_MOD_ON << clk->enable_shift;
48 __raw_writel(reg, clk->enable_reg);
49
50 return 0;
51}
52
53static void _clk_ccgr_disable(struct clk *clk)
54{
55 u32 reg;
56 reg = __raw_readl(clk->enable_reg);
57 reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift);
58 __raw_writel(reg, clk->enable_reg);
59
60}
61
62static void _clk_ccgr_disable_inwait(struct clk *clk)
63{
64 u32 reg;
65
66 reg = __raw_readl(clk->enable_reg);
67 reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
68 reg |= MXC_CCM_CCGRx_MOD_IDLE << clk->enable_shift;
69 __raw_writel(reg, clk->enable_reg);
70}
71
72/*
73 * For the 4-to-1 muxed input clock
74 */
75static inline u32 _get_mux(struct clk *parent, struct clk *m0,
76 struct clk *m1, struct clk *m2, struct clk *m3)
77{
78 if (parent == m0)
79 return 0;
80 else if (parent == m1)
81 return 1;
82 else if (parent == m2)
83 return 2;
84 else if (parent == m3)
85 return 3;
86 else
87 BUG();
88
89 return -EINVAL;
90}
91
92static inline void __iomem *_get_pll_base(struct clk *pll)
93{
94 if (pll == &pll1_main_clk)
95 return MX51_DPLL1_BASE;
96 else if (pll == &pll2_sw_clk)
97 return MX51_DPLL2_BASE;
98 else if (pll == &pll3_sw_clk)
99 return MX51_DPLL3_BASE;
100 else
101 BUG();
102
103 return NULL;
104}
105
106static unsigned long clk_pll_get_rate(struct clk *clk)
107{
108 long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
109 unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl;
110 void __iomem *pllbase;
111 s64 temp;
112 unsigned long parent_rate;
113
114 parent_rate = clk_get_rate(clk->parent);
115
116 pllbase = _get_pll_base(clk);
117
118 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
119 pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
120 dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN;
121
122 if (pll_hfsm == 0) {
123 dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
124 dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
125 dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
126 } else {
127 dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);
128 dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);
129 dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);
130 }
131 pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK;
132 mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET;
133 mfi = (mfi <= 5) ? 5 : mfi;
134 mfd = dp_mfd & MXC_PLL_DP_MFD_MASK;
135 mfn = mfn_abs = dp_mfn & MXC_PLL_DP_MFN_MASK;
136 /* Sign extend to 32-bits */
137 if (mfn >= 0x04000000) {
138 mfn |= 0xFC000000;
139 mfn_abs = -mfn;
140 }
141
142 ref_clk = 2 * parent_rate;
143 if (dbl != 0)
144 ref_clk *= 2;
145
146 ref_clk /= (pdf + 1);
147 temp = (u64) ref_clk * mfn_abs;
148 do_div(temp, mfd + 1);
149 if (mfn < 0)
150 temp = -temp;
151 temp = (ref_clk * mfi) + temp;
152
153 return temp;
154}
155
156static int _clk_pll_set_rate(struct clk *clk, unsigned long rate)
157{
158 u32 reg;
159 void __iomem *pllbase;
160
161 long mfi, pdf, mfn, mfd = 999999;
162 s64 temp64;
163 unsigned long quad_parent_rate;
164 unsigned long pll_hfsm, dp_ctl;
165 unsigned long parent_rate;
166
167 parent_rate = clk_get_rate(clk->parent);
168
169 pllbase = _get_pll_base(clk);
170
171 quad_parent_rate = 4 * parent_rate;
172 pdf = mfi = -1;
173 while (++pdf < 16 && mfi < 5)
174 mfi = rate * (pdf+1) / quad_parent_rate;
175 if (mfi > 15)
176 return -EINVAL;
177 pdf--;
178
179 temp64 = rate * (pdf+1) - quad_parent_rate * mfi;
180 do_div(temp64, quad_parent_rate/1000000);
181 mfn = (long)temp64;
182
183 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
184 /* use dpdck0_2 */
185 __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);
186 pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
187 if (pll_hfsm == 0) {
188 reg = mfi << 4 | pdf;
189 __raw_writel(reg, pllbase + MXC_PLL_DP_OP);
190 __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);
191 __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);
192 } else {
193 reg = mfi << 4 | pdf;
194 __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);
195 __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);
196 __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);
197 }
198
199 return 0;
200}
201
202static int _clk_pll_enable(struct clk *clk)
203{
204 u32 reg;
205 void __iomem *pllbase;
206 int i = 0;
207
208 pllbase = _get_pll_base(clk);
209 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;
210 __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
211
212 /* Wait for lock */
213 do {
214 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
215 if (reg & MXC_PLL_DP_CTL_LRF)
216 break;
217
218 udelay(1);
219 } while (++i < MAX_DPLL_WAIT_TRIES);
220
221 if (i == MAX_DPLL_WAIT_TRIES) {
222 pr_err("MX5: pll locking failed\n");
223 return -EINVAL;
224 }
225
226 return 0;
227}
228
229static void _clk_pll_disable(struct clk *clk)
230{
231 u32 reg;
232 void __iomem *pllbase;
233
234 pllbase = _get_pll_base(clk);
235 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) & ~MXC_PLL_DP_CTL_UPEN;
236 __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
237}
238
239static int _clk_pll1_sw_set_parent(struct clk *clk, struct clk *parent)
240{
241 u32 reg, step;
242
243 reg = __raw_readl(MXC_CCM_CCSR);
244
245 /* When switching from pll_main_clk to a bypass clock, first select a
246 * multiplexed clock in 'step_sel', then shift the glitchless mux
247 * 'pll1_sw_clk_sel'.
248 *
249 * When switching back, do it in reverse order
250 */
251 if (parent == &pll1_main_clk) {
252 /* Switch to pll1_main_clk */
253 reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL;
254 __raw_writel(reg, MXC_CCM_CCSR);
255 /* step_clk mux switched to lp_apm, to save power. */
256 reg = __raw_readl(MXC_CCM_CCSR);
257 reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK;
258 reg |= (MXC_CCM_CCSR_STEP_SEL_LP_APM <<
259 MXC_CCM_CCSR_STEP_SEL_OFFSET);
260 } else {
261 if (parent == &lp_apm_clk) {
262 step = MXC_CCM_CCSR_STEP_SEL_LP_APM;
263 } else if (parent == &pll2_sw_clk) {
264 step = MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED;
265 } else if (parent == &pll3_sw_clk) {
266 step = MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED;
267 } else
268 return -EINVAL;
269
270 reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK;
271 reg |= (step << MXC_CCM_CCSR_STEP_SEL_OFFSET);
272
273 __raw_writel(reg, MXC_CCM_CCSR);
274 /* Switch to step_clk */
275 reg = __raw_readl(MXC_CCM_CCSR);
276 reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL;
277 }
278 __raw_writel(reg, MXC_CCM_CCSR);
279 return 0;
280}
281
282static unsigned long clk_pll1_sw_get_rate(struct clk *clk)
283{
284 u32 reg, div;
285 unsigned long parent_rate;
286
287 parent_rate = clk_get_rate(clk->parent);
288
289 reg = __raw_readl(MXC_CCM_CCSR);
290
291 if (clk->parent == &pll2_sw_clk) {
292 div = ((reg & MXC_CCM_CCSR_PLL2_PODF_MASK) >>
293 MXC_CCM_CCSR_PLL2_PODF_OFFSET) + 1;
294 } else if (clk->parent == &pll3_sw_clk) {
295 div = ((reg & MXC_CCM_CCSR_PLL3_PODF_MASK) >>
296 MXC_CCM_CCSR_PLL3_PODF_OFFSET) + 1;
297 } else
298 div = 1;
299 return parent_rate / div;
300}
301
302static int _clk_pll2_sw_set_parent(struct clk *clk, struct clk *parent)
303{
304 u32 reg;
305
306 reg = __raw_readl(MXC_CCM_CCSR);
307
308 if (parent == &pll2_sw_clk)
309 reg &= ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL;
310 else
311 reg |= MXC_CCM_CCSR_PLL2_SW_CLK_SEL;
312
313 __raw_writel(reg, MXC_CCM_CCSR);
314 return 0;
315}
316
317static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent)
318{
319 u32 reg;
320
321 if (parent == &osc_clk)
322 reg = __raw_readl(MXC_CCM_CCSR) & ~MXC_CCM_CCSR_LP_APM_SEL;
323 else
324 return -EINVAL;
325
326 __raw_writel(reg, MXC_CCM_CCSR);
327
328 return 0;
329}
330
331static unsigned long clk_arm_get_rate(struct clk *clk)
332{
333 u32 cacrr, div;
334 unsigned long parent_rate;
335
336 parent_rate = clk_get_rate(clk->parent);
337 cacrr = __raw_readl(MXC_CCM_CACRR);
338 div = (cacrr & MXC_CCM_CACRR_ARM_PODF_MASK) + 1;
339
340 return parent_rate / div;
341}
342
343static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent)
344{
345 u32 reg, mux;
346 int i = 0;
347
348 mux = _get_mux(parent, &pll1_sw_clk, &pll3_sw_clk, &lp_apm_clk, NULL);
349
350 reg = __raw_readl(MXC_CCM_CBCMR) & ~MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK;
351 reg |= mux << MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET;
352 __raw_writel(reg, MXC_CCM_CBCMR);
353
354 /* Wait for lock */
355 do {
356 reg = __raw_readl(MXC_CCM_CDHIPR);
357 if (!(reg & MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY))
358 break;
359
360 udelay(1);
361 } while (++i < MAX_DPLL_WAIT_TRIES);
362
363 if (i == MAX_DPLL_WAIT_TRIES) {
364 pr_err("MX5: Set parent for periph_apm clock failed\n");
365 return -EINVAL;
366 }
367
368 return 0;
369}
370
371static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent)
372{
373 u32 reg;
374
375 reg = __raw_readl(MXC_CCM_CBCDR);
376
377 if (parent == &pll2_sw_clk)
378 reg &= ~MXC_CCM_CBCDR_PERIPH_CLK_SEL;
379 else if (parent == &periph_apm_clk)
380 reg |= MXC_CCM_CBCDR_PERIPH_CLK_SEL;
381 else
382 return -EINVAL;
383
384 __raw_writel(reg, MXC_CCM_CBCDR);
385
386 return 0;
387}
388
389static struct clk main_bus_clk = {
390 .parent = &pll2_sw_clk,
391 .set_parent = _clk_main_bus_set_parent,
392};
393
394static unsigned long clk_ahb_get_rate(struct clk *clk)
395{
396 u32 reg, div;
397 unsigned long parent_rate;
398
399 parent_rate = clk_get_rate(clk->parent);
400
401 reg = __raw_readl(MXC_CCM_CBCDR);
402 div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
403 MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
404 return parent_rate / div;
405}
406
407
408static int _clk_ahb_set_rate(struct clk *clk, unsigned long rate)
409{
410 u32 reg, div;
411 unsigned long parent_rate;
412 int i = 0;
413
414 parent_rate = clk_get_rate(clk->parent);
415
416 div = parent_rate / rate;
417 if (div > 8 || div < 1 || ((parent_rate / div) != rate))
418 return -EINVAL;
419
420 reg = __raw_readl(MXC_CCM_CBCDR);
421 reg &= ~MXC_CCM_CBCDR_AHB_PODF_MASK;
422 reg |= (div - 1) << MXC_CCM_CBCDR_AHB_PODF_OFFSET;
423 __raw_writel(reg, MXC_CCM_CBCDR);
424
425 /* Wait for lock */
426 do {
427 reg = __raw_readl(MXC_CCM_CDHIPR);
428 if (!(reg & MXC_CCM_CDHIPR_AHB_PODF_BUSY))
429 break;
430
431 udelay(1);
432 } while (++i < MAX_DPLL_WAIT_TRIES);
433
434 if (i == MAX_DPLL_WAIT_TRIES) {
435 pr_err("MX5: clk_ahb_set_rate failed\n");
436 return -EINVAL;
437 }
438
439 return 0;
440}
441
442static unsigned long _clk_ahb_round_rate(struct clk *clk,
443 unsigned long rate)
444{
445 u32 div;
446 unsigned long parent_rate;
447
448 parent_rate = clk_get_rate(clk->parent);
449
450 div = parent_rate / rate;
451 if (div > 8)
452 div = 8;
453 else if (div == 0)
454 div++;
455 return parent_rate / div;
456}
457
458
459static int _clk_max_enable(struct clk *clk)
460{
461 u32 reg;
462
463 _clk_ccgr_enable(clk);
464
465 /* Handshake with MAX when LPM is entered. */
466 reg = __raw_readl(MXC_CCM_CLPCR);
467 reg &= ~MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS;
468 __raw_writel(reg, MXC_CCM_CLPCR);
469
470 return 0;
471}
472
473static void _clk_max_disable(struct clk *clk)
474{
475 u32 reg;
476
477 _clk_ccgr_disable_inwait(clk);
478
479 /* No Handshake with MAX when LPM is entered as its disabled. */
480 reg = __raw_readl(MXC_CCM_CLPCR);
481 reg |= MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS;
482 __raw_writel(reg, MXC_CCM_CLPCR);
483}
484
485static unsigned long clk_ipg_get_rate(struct clk *clk)
486{
487 u32 reg, div;
488 unsigned long parent_rate;
489
490 parent_rate = clk_get_rate(clk->parent);
491
492 reg = __raw_readl(MXC_CCM_CBCDR);
493 div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
494 MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
495
496 return parent_rate / div;
497}
498
499static unsigned long clk_ipg_per_get_rate(struct clk *clk)
500{
501 u32 reg, prediv1, prediv2, podf;
502 unsigned long parent_rate;
503
504 parent_rate = clk_get_rate(clk->parent);
505
506 if (clk->parent == &main_bus_clk || clk->parent == &lp_apm_clk) {
507 /* the main_bus_clk is the one before the DVFS engine */
508 reg = __raw_readl(MXC_CCM_CBCDR);
509 prediv1 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED1_MASK) >>
510 MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET) + 1;
511 prediv2 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED2_MASK) >>
512 MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET) + 1;
513 podf = ((reg & MXC_CCM_CBCDR_PERCLK_PODF_MASK) >>
514 MXC_CCM_CBCDR_PERCLK_PODF_OFFSET) + 1;
515 return parent_rate / (prediv1 * prediv2 * podf);
516 } else if (clk->parent == &ipg_clk)
517 return parent_rate;
518 else
519 BUG();
520}
521
522static int _clk_ipg_per_set_parent(struct clk *clk, struct clk *parent)
523{
524 u32 reg;
525
526 reg = __raw_readl(MXC_CCM_CBCMR);
527
528 reg &= ~MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;
529 reg &= ~MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;
530
531 if (parent == &ipg_clk)
532 reg |= MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;
533 else if (parent == &lp_apm_clk)
534 reg |= MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;
535 else if (parent != &main_bus_clk)
536 return -EINVAL;
537
538 __raw_writel(reg, MXC_CCM_CBCMR);
539
540 return 0;
541}
542
543static unsigned long clk_uart_get_rate(struct clk *clk)
544{
545 u32 reg, prediv, podf;
546 unsigned long parent_rate;
547
548 parent_rate = clk_get_rate(clk->parent);
549
550 reg = __raw_readl(MXC_CCM_CSCDR1);
551 prediv = ((reg & MXC_CCM_CSCDR1_UART_CLK_PRED_MASK) >>
552 MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) + 1;
553 podf = ((reg & MXC_CCM_CSCDR1_UART_CLK_PODF_MASK) >>
554 MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET) + 1;
555
556 return parent_rate / (prediv * podf);
557}
558
559static int _clk_uart_set_parent(struct clk *clk, struct clk *parent)
560{
561 u32 reg, mux;
562
563 mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
564 &lp_apm_clk);
565 reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_UART_CLK_SEL_MASK;
566 reg |= mux << MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET;
567 __raw_writel(reg, MXC_CCM_CSCMR1);
568
569 return 0;
570}
571
572static unsigned long get_high_reference_clock_rate(struct clk *clk)
573{
574 return external_high_reference;
575}
576
577static unsigned long get_low_reference_clock_rate(struct clk *clk)
578{
579 return external_low_reference;
580}
581
582static unsigned long get_oscillator_reference_clock_rate(struct clk *clk)
583{
584 return oscillator_reference;
585}
586
587static unsigned long get_ckih2_reference_clock_rate(struct clk *clk)
588{
589 return ckih2_reference;
590}
591
592/* External high frequency clock */
593static struct clk ckih_clk = {
594 .get_rate = get_high_reference_clock_rate,
595};
596
597static struct clk ckih2_clk = {
598 .get_rate = get_ckih2_reference_clock_rate,
599};
600
601static struct clk osc_clk = {
602 .get_rate = get_oscillator_reference_clock_rate,
603};
604
605/* External low frequency (32kHz) clock */
606static struct clk ckil_clk = {
607 .get_rate = get_low_reference_clock_rate,
608};
609
610static struct clk pll1_main_clk = {
611 .parent = &osc_clk,
612 .get_rate = clk_pll_get_rate,
613 .enable = _clk_pll_enable,
614 .disable = _clk_pll_disable,
615};
616
617/* Clock tree block diagram (WIP):
618 * CCM: Clock Controller Module
619 *
620 * PLL output -> |
621 * | CCM Switcher -> CCM_CLK_ROOT_GEN ->
622 * PLL bypass -> |
623 *
624 */
625
626/* PLL1 SW supplies to ARM core */
627static struct clk pll1_sw_clk = {
628 .parent = &pll1_main_clk,
629 .set_parent = _clk_pll1_sw_set_parent,
630 .get_rate = clk_pll1_sw_get_rate,
631};
632
633/* PLL2 SW supplies to AXI/AHB/IP buses */
634static struct clk pll2_sw_clk = {
635 .parent = &osc_clk,
636 .get_rate = clk_pll_get_rate,
637 .set_rate = _clk_pll_set_rate,
638 .set_parent = _clk_pll2_sw_set_parent,
639 .enable = _clk_pll_enable,
640 .disable = _clk_pll_disable,
641};
642
643/* PLL3 SW supplies to serial clocks like USB, SSI, etc. */
644static struct clk pll3_sw_clk = {
645 .parent = &osc_clk,
646 .set_rate = _clk_pll_set_rate,
647 .get_rate = clk_pll_get_rate,
648 .enable = _clk_pll_enable,
649 .disable = _clk_pll_disable,
650};
651
652/* Low-power Audio Playback Mode clock */
653static struct clk lp_apm_clk = {
654 .parent = &osc_clk,
655 .set_parent = _clk_lp_apm_set_parent,
656};
657
658static struct clk periph_apm_clk = {
659 .parent = &pll1_sw_clk,
660 .set_parent = _clk_periph_apm_set_parent,
661};
662
663static struct clk cpu_clk = {
664 .parent = &pll1_sw_clk,
665 .get_rate = clk_arm_get_rate,
666};
667
668static struct clk ahb_clk = {
669 .parent = &main_bus_clk,
670 .get_rate = clk_ahb_get_rate,
671 .set_rate = _clk_ahb_set_rate,
672 .round_rate = _clk_ahb_round_rate,
673};
674
675/* Main IP interface clock for access to registers */
676static struct clk ipg_clk = {
677 .parent = &ahb_clk,
678 .get_rate = clk_ipg_get_rate,
679};
680
681static struct clk ipg_perclk = {
682 .parent = &lp_apm_clk,
683 .get_rate = clk_ipg_per_get_rate,
684 .set_parent = _clk_ipg_per_set_parent,
685};
686
687static struct clk uart_root_clk = {
688 .parent = &pll2_sw_clk,
689 .get_rate = clk_uart_get_rate,
690 .set_parent = _clk_uart_set_parent,
691};
692
693static struct clk ahb_max_clk = {
694 .parent = &ahb_clk,
695 .enable_reg = MXC_CCM_CCGR0,
696 .enable_shift = MXC_CCM_CCGRx_CG14_OFFSET,
697 .enable = _clk_max_enable,
698 .disable = _clk_max_disable,
699};
700
701static struct clk aips_tz1_clk = {
702 .parent = &ahb_clk,
703 .secondary = &ahb_max_clk,
704 .enable_reg = MXC_CCM_CCGR0,
705 .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
706 .enable = _clk_ccgr_enable,
707 .disable = _clk_ccgr_disable_inwait,
708};
709
710static struct clk aips_tz2_clk = {
711 .parent = &ahb_clk,
712 .secondary = &ahb_max_clk,
713 .enable_reg = MXC_CCM_CCGR0,
714 .enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,
715 .enable = _clk_ccgr_enable,
716 .disable = _clk_ccgr_disable_inwait,
717};
718
719static struct clk gpt_32k_clk = {
720 .id = 0,
721 .parent = &ckil_clk,
722};
723
724#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \
725 static struct clk name = { \
726 .id = i, \
727 .enable_reg = er, \
728 .enable_shift = es, \
729 .get_rate = gr, \
730 .set_rate = sr, \
731 .enable = _clk_ccgr_enable, \
732 .disable = _clk_ccgr_disable, \
733 .parent = p, \
734 .secondary = s, \
735 }
736
737/* DEFINE_CLOCK(name, id, enable_reg, enable_shift,
738 get_rate, set_rate, parent, secondary); */
739
740/* Shared peripheral bus arbiter */
741DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET,
742 NULL, NULL, &ipg_clk, NULL);
743
744/* UART */
745DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,
746 NULL, NULL, &uart_root_clk, NULL);
747DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,
748 NULL, NULL, &uart_root_clk, NULL);
749DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,
750 NULL, NULL, &uart_root_clk, NULL);
751DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET,
752 NULL, NULL, &ipg_clk, &aips_tz1_clk);
753DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,
754 NULL, NULL, &ipg_clk, &aips_tz1_clk);
755DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
756 NULL, NULL, &ipg_clk, &spba_clk);
757
758/* GPT */
759DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
760 NULL, NULL, &ipg_perclk, NULL);
761DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
762 NULL, NULL, &ipg_clk, NULL);
763
764/* FEC */
765DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,
766 NULL, NULL, &ipg_clk, NULL);
767
768#define _REGISTER_CLOCK(d, n, c) \
769 { \
770 .dev_id = d, \
771 .con_id = n, \
772 .clk = &c, \
773 },
774
775static struct clk_lookup lookups[] = {
776 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
777 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
778 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
779 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
780 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
781};
782
783static void clk_tree_init(void)
784{
785 u32 reg;
786
787 ipg_perclk.set_parent(&ipg_perclk, &lp_apm_clk);
788
789 /*
790 * Initialise the IPG PER CLK dividers to 3. IPG_PER_CLK should be at
791 * 8MHz, its derived from lp_apm.
792 *
793 * FIXME: Verify if true for all boards
794 */
795 reg = __raw_readl(MXC_CCM_CBCDR);
796 reg &= ~MXC_CCM_CBCDR_PERCLK_PRED1_MASK;
797 reg &= ~MXC_CCM_CBCDR_PERCLK_PRED2_MASK;
798 reg &= ~MXC_CCM_CBCDR_PERCLK_PODF_MASK;
799 reg |= (2 << MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET);
800 __raw_writel(reg, MXC_CCM_CBCDR);
801}
802
803int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
804 unsigned long ckih1, unsigned long ckih2)
805{
806 int i;
807
808 external_low_reference = ckil;
809 external_high_reference = ckih1;
810 ckih2_reference = ckih2;
811 oscillator_reference = osc;
812
813 for (i = 0; i < ARRAY_SIZE(lookups); i++)
814 clkdev_add(&lookups[i]);
815
816 clk_tree_init();
817
818 clk_enable(&cpu_clk);
819 clk_enable(&main_bus_clk);
820
821 /* System timer */
822 mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
823 MX51_MXC_INT_GPT);
824 return 0;
825}
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
new file mode 100644
index 000000000000..41c769f08c4d
--- /dev/null
+++ b/arch/arm/mach-mx5/cpu.c
@@ -0,0 +1,47 @@
1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 *
11 * This file contains the CPU initialization code.
12 */
13
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <mach/hardware.h>
18#include <asm/io.h>
19
20static int __init post_cpu_init(void)
21{
22 unsigned int reg;
23 void __iomem *base;
24
25 if (!cpu_is_mx51())
26 return 0;
27
28 base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
29 __raw_writel(0x0, base + 0x40);
30 __raw_writel(0x0, base + 0x44);
31 __raw_writel(0x0, base + 0x48);
32 __raw_writel(0x0, base + 0x4C);
33 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
34 __raw_writel(reg, base + 0x50);
35
36 base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
37 __raw_writel(0x0, base + 0x40);
38 __raw_writel(0x0, base + 0x44);
39 __raw_writel(0x0, base + 0x48);
40 __raw_writel(0x0, base + 0x4C);
41 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
42 __raw_writel(reg, base + 0x50);
43
44 return 0;
45}
46
47postcore_initcall(post_cpu_init);
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
new file mode 100644
index 000000000000..c776b9af0624
--- /dev/null
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -0,0 +1,583 @@
1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11#ifndef __ARCH_ARM_MACH_MX51_CRM_REGS_H__
12#define __ARCH_ARM_MACH_MX51_CRM_REGS_H__
13
14#define MX51_CCM_BASE MX51_IO_ADDRESS(MX51_CCM_BASE_ADDR)
15#define MX51_DPLL1_BASE MX51_IO_ADDRESS(MX51_PLL1_BASE_ADDR)
16#define MX51_DPLL2_BASE MX51_IO_ADDRESS(MX51_PLL2_BASE_ADDR)
17#define MX51_DPLL3_BASE MX51_IO_ADDRESS(MX51_PLL3_BASE_ADDR)
18#define MX51_CORTEXA8_BASE MX51_IO_ADDRESS(MX51_ARM_BASE_ADDR)
19#define MX51_GPC_BASE MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
20
21/* PLL Register Offsets */
22#define MXC_PLL_DP_CTL 0x00
23#define MXC_PLL_DP_CONFIG 0x04
24#define MXC_PLL_DP_OP 0x08
25#define MXC_PLL_DP_MFD 0x0C
26#define MXC_PLL_DP_MFN 0x10
27#define MXC_PLL_DP_MFNMINUS 0x14
28#define MXC_PLL_DP_MFNPLUS 0x18
29#define MXC_PLL_DP_HFS_OP 0x1C
30#define MXC_PLL_DP_HFS_MFD 0x20
31#define MXC_PLL_DP_HFS_MFN 0x24
32#define MXC_PLL_DP_MFN_TOGC 0x28
33#define MXC_PLL_DP_DESTAT 0x2c
34
35/* PLL Register Bit definitions */
36#define MXC_PLL_DP_CTL_MUL_CTRL 0x2000
37#define MXC_PLL_DP_CTL_DPDCK0_2_EN 0x1000
38#define MXC_PLL_DP_CTL_DPDCK0_2_OFFSET 12
39#define MXC_PLL_DP_CTL_ADE 0x800
40#define MXC_PLL_DP_CTL_REF_CLK_DIV 0x400
41#define MXC_PLL_DP_CTL_REF_CLK_SEL_MASK (3 << 8)
42#define MXC_PLL_DP_CTL_REF_CLK_SEL_OFFSET 8
43#define MXC_PLL_DP_CTL_HFSM 0x80
44#define MXC_PLL_DP_CTL_PRE 0x40
45#define MXC_PLL_DP_CTL_UPEN 0x20
46#define MXC_PLL_DP_CTL_RST 0x10
47#define MXC_PLL_DP_CTL_RCP 0x8
48#define MXC_PLL_DP_CTL_PLM 0x4
49#define MXC_PLL_DP_CTL_BRM0 0x2
50#define MXC_PLL_DP_CTL_LRF 0x1
51
52#define MXC_PLL_DP_CONFIG_BIST 0x8
53#define MXC_PLL_DP_CONFIG_SJC_CE 0x4
54#define MXC_PLL_DP_CONFIG_AREN 0x2
55#define MXC_PLL_DP_CONFIG_LDREQ 0x1
56
57#define MXC_PLL_DP_OP_MFI_OFFSET 4
58#define MXC_PLL_DP_OP_MFI_MASK (0xF << 4)
59#define MXC_PLL_DP_OP_PDF_OFFSET 0
60#define MXC_PLL_DP_OP_PDF_MASK 0xF
61
62#define MXC_PLL_DP_MFD_OFFSET 0
63#define MXC_PLL_DP_MFD_MASK 0x07FFFFFF
64
65#define MXC_PLL_DP_MFN_OFFSET 0x0
66#define MXC_PLL_DP_MFN_MASK 0x07FFFFFF
67
68#define MXC_PLL_DP_MFN_TOGC_TOG_DIS (1 << 17)
69#define MXC_PLL_DP_MFN_TOGC_TOG_EN (1 << 16)
70#define MXC_PLL_DP_MFN_TOGC_CNT_OFFSET 0x0
71#define MXC_PLL_DP_MFN_TOGC_CNT_MASK 0xFFFF
72
73#define MXC_PLL_DP_DESTAT_TOG_SEL (1 << 31)
74#define MXC_PLL_DP_DESTAT_MFN 0x07FFFFFF
75
76/* Register addresses of CCM*/
77#define MXC_CCM_CCR (MX51_CCM_BASE + 0x00)
78#define MXC_CCM_CCDR (MX51_CCM_BASE + 0x04)
79#define MXC_CCM_CSR (MX51_CCM_BASE + 0x08)
80#define MXC_CCM_CCSR (MX51_CCM_BASE + 0x0C)
81#define MXC_CCM_CACRR (MX51_CCM_BASE + 0x10)
82#define MXC_CCM_CBCDR (MX51_CCM_BASE + 0x14)
83#define MXC_CCM_CBCMR (MX51_CCM_BASE + 0x18)
84#define MXC_CCM_CSCMR1 (MX51_CCM_BASE + 0x1C)
85#define MXC_CCM_CSCMR2 (MX51_CCM_BASE + 0x20)
86#define MXC_CCM_CSCDR1 (MX51_CCM_BASE + 0x24)
87#define MXC_CCM_CS1CDR (MX51_CCM_BASE + 0x28)
88#define MXC_CCM_CS2CDR (MX51_CCM_BASE + 0x2C)
89#define MXC_CCM_CDCDR (MX51_CCM_BASE + 0x30)
90#define MXC_CCM_CHSCDR (MX51_CCM_BASE + 0x34)
91#define MXC_CCM_CSCDR2 (MX51_CCM_BASE + 0x38)
92#define MXC_CCM_CSCDR3 (MX51_CCM_BASE + 0x3C)
93#define MXC_CCM_CSCDR4 (MX51_CCM_BASE + 0x40)
94#define MXC_CCM_CWDR (MX51_CCM_BASE + 0x44)
95#define MXC_CCM_CDHIPR (MX51_CCM_BASE + 0x48)
96#define MXC_CCM_CDCR (MX51_CCM_BASE + 0x4C)
97#define MXC_CCM_CTOR (MX51_CCM_BASE + 0x50)
98#define MXC_CCM_CLPCR (MX51_CCM_BASE + 0x54)
99#define MXC_CCM_CISR (MX51_CCM_BASE + 0x58)
100#define MXC_CCM_CIMR (MX51_CCM_BASE + 0x5C)
101#define MXC_CCM_CCOSR (MX51_CCM_BASE + 0x60)
102#define MXC_CCM_CGPR (MX51_CCM_BASE + 0x64)
103#define MXC_CCM_CCGR0 (MX51_CCM_BASE + 0x68)
104#define MXC_CCM_CCGR1 (MX51_CCM_BASE + 0x6C)
105#define MXC_CCM_CCGR2 (MX51_CCM_BASE + 0x70)
106#define MXC_CCM_CCGR3 (MX51_CCM_BASE + 0x74)
107#define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78)
108#define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C)
109#define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80)
110#define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84)
111
112/* Define the bits in register CCR */
113#define MXC_CCM_CCR_COSC_EN (1 << 12)
114#define MXC_CCM_CCR_FPM_MULT_MASK (1 << 11)
115#define MXC_CCM_CCR_CAMP2_EN (1 << 10)
116#define MXC_CCM_CCR_CAMP1_EN (1 << 9)
117#define MXC_CCM_CCR_FPM_EN (1 << 8)
118#define MXC_CCM_CCR_OSCNT_OFFSET (0)
119#define MXC_CCM_CCR_OSCNT_MASK (0xFF)
120
121/* Define the bits in register CCDR */
122#define MXC_CCM_CCDR_HSC_HS_MASK (0x1 << 18)
123#define MXC_CCM_CCDR_IPU_HS_MASK (0x1 << 17)
124#define MXC_CCM_CCDR_EMI_HS_MASK (0x1 << 16)
125
126/* Define the bits in register CSR */
127#define MXC_CCM_CSR_COSR_READY (1 << 5)
128#define MXC_CCM_CSR_LVS_VALUE (1 << 4)
129#define MXC_CCM_CSR_CAMP2_READY (1 << 3)
130#define MXC_CCM_CSR_CAMP1_READY (1 << 2)
131#define MXC_CCM_CSR_FPM_READY (1 << 1)
132#define MXC_CCM_CSR_REF_EN_B (1 << 0)
133
134/* Define the bits in register CCSR */
135#define MXC_CCM_CCSR_LP_APM_SEL (0x1 << 9)
136#define MXC_CCM_CCSR_STEP_SEL_OFFSET (7)
137#define MXC_CCM_CCSR_STEP_SEL_MASK (0x3 << 7)
138#define MXC_CCM_CCSR_STEP_SEL_LP_APM 0
139#define MXC_CCM_CCSR_STEP_SEL_PLL1_BYPASS 1 /* Only when JTAG connected? */
140#define MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED 2
141#define MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED 3
142#define MXC_CCM_CCSR_PLL2_PODF_OFFSET (5)
143#define MXC_CCM_CCSR_PLL2_PODF_MASK (0x3 << 5)
144#define MXC_CCM_CCSR_PLL3_PODF_OFFSET (3)
145#define MXC_CCM_CCSR_PLL3_PODF_MASK (0x3 << 3)
146#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL (1 << 2) /* 0: pll1_main_clk,
147 1: step_clk */
148#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL (1 << 1)
149#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL (1 << 0)
150
151/* Define the bits in register CACRR */
152#define MXC_CCM_CACRR_ARM_PODF_OFFSET (0)
153#define MXC_CCM_CACRR_ARM_PODF_MASK (0x7)
154
155/* Define the bits in register CBCDR */
156#define MXC_CCM_CBCDR_EMI_CLK_SEL (0x1 << 26)
157#define MXC_CCM_CBCDR_PERIPH_CLK_SEL (0x1 << 25)
158#define MXC_CCM_CBCDR_DDR_HF_SEL_OFFSET (30)
159#define MXC_CCM_CBCDR_DDR_HF_SEL (0x1 << 30)
160#define MXC_CCM_CBCDR_DDR_PODF_OFFSET (27)
161#define MXC_CCM_CBCDR_DDR_PODF_MASK (0x7 << 27)
162#define MXC_CCM_CBCDR_EMI_PODF_OFFSET (22)
163#define MXC_CCM_CBCDR_EMI_PODF_MASK (0x7 << 22)
164#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET (19)
165#define MXC_CCM_CBCDR_AXI_B_PODF_MASK (0x7 << 19)
166#define MXC_CCM_CBCDR_AXI_A_PODF_OFFSET (16)
167#define MXC_CCM_CBCDR_AXI_A_PODF_MASK (0x7 << 16)
168#define MXC_CCM_CBCDR_NFC_PODF_OFFSET (13)
169#define MXC_CCM_CBCDR_NFC_PODF_MASK (0x7 << 13)
170#define MXC_CCM_CBCDR_AHB_PODF_OFFSET (10)
171#define MXC_CCM_CBCDR_AHB_PODF_MASK (0x7 << 10)
172#define MXC_CCM_CBCDR_IPG_PODF_OFFSET (8)
173#define MXC_CCM_CBCDR_IPG_PODF_MASK (0x3 << 8)
174#define MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET (6)
175#define MXC_CCM_CBCDR_PERCLK_PRED1_MASK (0x3 << 6)
176#define MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET (3)
177#define MXC_CCM_CBCDR_PERCLK_PRED2_MASK (0x7 << 3)
178#define MXC_CCM_CBCDR_PERCLK_PODF_OFFSET (0)
179#define MXC_CCM_CBCDR_PERCLK_PODF_MASK (0x7)
180
181/* Define the bits in register CBCMR */
182#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET (14)
183#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK (0x3 << 14)
184#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET (12)
185#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK (0x3 << 12)
186#define MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET (10)
187#define MXC_CCM_CBCMR_DDR_CLK_SEL_MASK (0x3 << 10)
188#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET (8)
189#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK (0x3 << 8)
190#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET (6)
191#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK (0x3 << 6)
192#define MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET (4)
193#define MXC_CCM_CBCMR_GPU_CLK_SEL_MASK (0x3 << 4)
194#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET (14)
195#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK (0x3 << 14)
196#define MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL (0x1 << 1)
197#define MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL (0x1 << 0)
198
199/* Define the bits in register CSCMR1 */
200#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET (30)
201#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK (0x3 << 30)
202#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET (28)
203#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK (0x3 << 28)
204#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET (26)
205#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL (0x1 << 26)
206#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET (24)
207#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK (0x3 << 24)
208#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET (22)
209#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK (0x3 << 22)
210#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET (20)
211#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK (0x3 << 20)
212#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL (0x1 << 19)
213#define MXC_CCM_CSCMR1_ESDHC4_CLK_SEL (0x1 << 18)
214#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET (16)
215#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK (0x3 << 16)
216#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET (14)
217#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK (0x3 << 14)
218#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET (12)
219#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK (0x3 << 12)
220#define MXC_CCM_CSCMR1_SSI3_CLK_SEL (0x1 << 11)
221#define MXC_CCM_CSCMR1_VPU_RCLK_SEL (0x1 << 10)
222#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET (8)
223#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK (0x3 << 8)
224#define MXC_CCM_CSCMR1_TVE_CLK_SEL (0x1 << 7)
225#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL (0x1 << 6)
226#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET (4)
227#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK (0x3 << 4)
228#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET (2)
229#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK (0x3 << 2)
230#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL (0x1 << 1)
231#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL (0x1)
232
233/* Define the bits in register CSCMR2 */
234#define MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(n) (26+n*3)
235#define MXC_CCM_CSCMR2_DI_CLK_SEL_MASK(n) (0x7 << (26+n*3))
236#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_OFFSET (24)
237#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_MASK (0x3 << 24)
238#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_OFFSET (22)
239#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_MASK (0x3 << 22)
240#define MXC_CCM_CSCMR2_ESC_CLK_SEL_OFFSET (20)
241#define MXC_CCM_CSCMR2_ESC_CLK_SEL_MASK (0x3 << 20)
242#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_OFFSET (18)
243#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_MASK (0x3 << 18)
244#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_OFFSET (16)
245#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_MASK (0x3 << 16)
246#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_OFFSET (14)
247#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_MASK (0x3 << 14)
248#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_OFFSET (12)
249#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_MASK (0x3 << 12)
250#define MXC_CCM_CSCMR2_SIM_CLK_SEL_OFFSET (10)
251#define MXC_CCM_CSCMR2_SIM_CLK_SEL_MASK (0x3 << 10)
252#define MXC_CCM_CSCMR2_SLIMBUS_COM (0x1 << 9)
253#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_OFFSET (6)
254#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_MASK (0x7 << 6)
255#define MXC_CCM_CSCMR2_SPDIF1_COM (1 << 5)
256#define MXC_CCM_CSCMR2_SPDIF0_COM (1 << 4)
257#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET (2)
258#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK (0x3 << 2)
259#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET (0)
260#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK (0x3)
261
262/* Define the bits in register CSCDR1 */
263#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET (22)
264#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK (0x7 << 22)
265#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET (19)
266#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK (0x7 << 19)
267#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET (16)
268#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK (0x7 << 16)
269#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET (14)
270#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK (0x3 << 14)
271#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET (11)
272#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK (0x7 << 11)
273#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET (8)
274#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK (0x7 << 8)
275#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET (6)
276#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK (0x3 << 6)
277#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET (3)
278#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK (0x7 << 3)
279#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET (0)
280#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK (0x7)
281
282/* Define the bits in register CS1CDR and CS2CDR */
283#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_OFFSET (22)
284#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_MASK (0x7 << 22)
285#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_OFFSET (16)
286#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_MASK (0x3F << 16)
287#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET (6)
288#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK (0x7 << 6)
289#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET (0)
290#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK (0x3F)
291
292#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_OFFSET (22)
293#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_MASK (0x7 << 22)
294#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_OFFSET (16)
295#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_MASK (0x3F << 16)
296#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET (6)
297#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK (0x7 << 6)
298#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET (0)
299#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK (0x3F)
300
301/* Define the bits in register CDCDR */
302#define MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET (28)
303#define MXC_CCM_CDCDR_TVE_CLK_PRED_MASK (0x7 << 28)
304#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET (25)
305#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK (0x7 << 25)
306#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET (19)
307#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x3F << 19)
308#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET (16)
309#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK (0x7 << 16)
310#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET (9)
311#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK (0x3F << 9)
312#define MXC_CCM_CDCDR_DI_CLK_PRED_OFFSET (6)
313#define MXC_CCM_CDCDR_DI_CLK_PRED_MASK (0x7 << 6)
314#define MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET (3)
315#define MXC_CCM_CDCDR_USB_PHY_PRED_MASK (0x7 << 3)
316#define MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET (0)
317#define MXC_CCM_CDCDR_USB_PHY_PODF_MASK (0x7)
318
319/* Define the bits in register CHSCCDR */
320#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_OFFSET (12)
321#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_MASK (0x7 << 12)
322#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_OFFSET (6)
323#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_MASK (0x3F << 6)
324#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_OFFSET (3)
325#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_MASK (0x7 << 3)
326#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_OFFSET (0)
327#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_MASK (0x7)
328
329/* Define the bits in register CSCDR2 */
330#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET (25)
331#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK (0x7 << 25)
332#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET (19)
333#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK (0x3F << 19)
334#define MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET (16)
335#define MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK (0x7 << 16)
336#define MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET (9)
337#define MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK (0x3F << 9)
338#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET (6)
339#define MXC_CCM_CSCDR2_SLIMBUS_PRED_MASK (0x7 << 6)
340#define MXC_CCM_CSCDR2_SLIMBUS_PODF_OFFSET (0)
341#define MXC_CCM_CSCDR2_SLIMBUS_PODF_MASK (0x3F)
342
343/* Define the bits in register CSCDR3 */
344#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_OFFSET (16)
345#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_MASK (0x7 << 16)
346#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_OFFSET (9)
347#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_MASK (0x3F << 9)
348#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_OFFSET (6)
349#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_MASK (0x7 << 6)
350#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_OFFSET (0)
351#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_MASK (0x3F)
352
353/* Define the bits in register CSCDR4 */
354#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_OFFSET (16)
355#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_MASK (0x7 << 16)
356#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_OFFSET (9)
357#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_MASK (0x3F << 9)
358#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_OFFSET (6)
359#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_MASK (0x7 << 6)
360#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_OFFSET (0)
361#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_MASK (0x3F)
362
363/* Define the bits in register CDHIPR */
364#define MXC_CCM_CDHIPR_ARM_PODF_BUSY (1 << 16)
365#define MXC_CCM_CDHIPR_DDR_HF_CLK_SEL_BUSY (1 << 8)
366#define MXC_CCM_CDHIPR_DDR_PODF_BUSY (1 << 7)
367#define MXC_CCM_CDHIPR_EMI_CLK_SEL_BUSY (1 << 6)
368#define MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY (1 << 5)
369#define MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY (1 << 4)
370#define MXC_CCM_CDHIPR_AHB_PODF_BUSY (1 << 3)
371#define MXC_CCM_CDHIPR_EMI_PODF_BUSY (1 << 2)
372#define MXC_CCM_CDHIPR_AXI_B_PODF_BUSY (1 << 1)
373#define MXC_CCM_CDHIPR_AXI_A_PODF_BUSY (1 << 0)
374
375/* Define the bits in register CDCR */
376#define MXC_CCM_CDCR_ARM_FREQ_SHIFT_DIVIDER (0x1 << 2)
377#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET (0)
378#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK (0x3)
379
380/* Define the bits in register CLPCR */
381#define MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS (0x1 << 23)
382#define MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS (0x1 << 22)
383#define MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS (0x1 << 21)
384#define MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS (0x1 << 20)
385#define MXC_CCM_CLPCR_BYPASS_EMI_LPM_HS (0x1 << 19)
386#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS (0x1 << 18)
387#define MXC_CCM_CLPCR_BYPASS_RTIC_LPM_HS (0x1 << 17)
388#define MXC_CCM_CLPCR_BYPASS_RNGC_LPM_HS (0x1 << 16)
389#define MXC_CCM_CLPCR_COSC_PWRDOWN (0x1 << 11)
390#define MXC_CCM_CLPCR_STBY_COUNT_OFFSET (9)
391#define MXC_CCM_CLPCR_STBY_COUNT_MASK (0x3 << 9)
392#define MXC_CCM_CLPCR_VSTBY (0x1 << 8)
393#define MXC_CCM_CLPCR_DIS_REF_OSC (0x1 << 7)
394#define MXC_CCM_CLPCR_SBYOS (0x1 << 6)
395#define MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM (0x1 << 5)
396#define MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET (3)
397#define MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK (0x3 << 3)
398#define MXC_CCM_CLPCR_LPM_OFFSET (0)
399#define MXC_CCM_CLPCR_LPM_MASK (0x3)
400
401/* Define the bits in register CISR */
402#define MXC_CCM_CISR_ARM_PODF_LOADED (0x1 << 25)
403#define MXC_CCM_CISR_NFC_IPG_INT_MEM_PODF_LOADED (0x1 << 21)
404#define MXC_CCM_CISR_AHB_PODF_LOADED (0x1 << 20)
405#define MXC_CCM_CISR_EMI_PODF_LOADED (0x1 << 19)
406#define MXC_CCM_CISR_AXI_B_PODF_LOADED (0x1 << 18)
407#define MXC_CCM_CISR_AXI_A_PODF_LOADED (0x1 << 17)
408#define MXC_CCM_CISR_DIVIDER_LOADED (0x1 << 16)
409#define MXC_CCM_CISR_COSC_READY (0x1 << 6)
410#define MXC_CCM_CISR_CKIH2_READY (0x1 << 5)
411#define MXC_CCM_CISR_CKIH_READY (0x1 << 4)
412#define MXC_CCM_CISR_FPM_READY (0x1 << 3)
413#define MXC_CCM_CISR_LRF_PLL3 (0x1 << 2)
414#define MXC_CCM_CISR_LRF_PLL2 (0x1 << 1)
415#define MXC_CCM_CISR_LRF_PLL1 (0x1)
416
417/* Define the bits in register CIMR */
418#define MXC_CCM_CIMR_MASK_ARM_PODF_LOADED (0x1 << 25)
419#define MXC_CCM_CIMR_MASK_NFC_IPG_INT_MEM_PODF_LOADED (0x1 << 21)
420#define MXC_CCM_CIMR_MASK_EMI_PODF_LOADED (0x1 << 20)
421#define MXC_CCM_CIMR_MASK_AXI_C_PODF_LOADED (0x1 << 19)
422#define MXC_CCM_CIMR_MASK_AXI_B_PODF_LOADED (0x1 << 18)
423#define MXC_CCM_CIMR_MASK_AXI_A_PODF_LOADED (0x1 << 17)
424#define MXC_CCM_CIMR_MASK_DIVIDER_LOADED (0x1 << 16)
425#define MXC_CCM_CIMR_MASK_COSC_READY (0x1 << 5)
426#define MXC_CCM_CIMR_MASK_CKIH_READY (0x1 << 4)
427#define MXC_CCM_CIMR_MASK_FPM_READY (0x1 << 3)
428#define MXC_CCM_CIMR_MASK_LRF_PLL3 (0x1 << 2)
429#define MXC_CCM_CIMR_MASK_LRF_PLL2 (0x1 << 1)
430#define MXC_CCM_CIMR_MASK_LRF_PLL1 (0x1)
431
432/* Define the bits in register CCOSR */
433#define MXC_CCM_CCOSR_CKO2_EN_OFFSET (0x1 << 24)
434#define MXC_CCM_CCOSR_CKO2_DIV_OFFSET (21)
435#define MXC_CCM_CCOSR_CKO2_DIV_MASK (0x7 << 21)
436#define MXC_CCM_CCOSR_CKO2_SEL_OFFSET (16)
437#define MXC_CCM_CCOSR_CKO2_SEL_MASK (0x1F << 16)
438#define MXC_CCM_CCOSR_CKOL_EN (0x1 << 7)
439#define MXC_CCM_CCOSR_CKOL_DIV_OFFSET (4)
440#define MXC_CCM_CCOSR_CKOL_DIV_MASK (0x7 << 4)
441#define MXC_CCM_CCOSR_CKOL_SEL_OFFSET (0)
442#define MXC_CCM_CCOSR_CKOL_SEL_MASK (0xF)
443
444/* Define the bits in registers CGPR */
445#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (0x1 << 4)
446#define MXC_CCM_CGPR_FPM_SEL (0x1 << 3)
447#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_OFFSET (0)
448#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_MASK (0x7)
449
450/* Define the bits in registers CCGRx */
451#define MXC_CCM_CCGRx_CG_MASK 0x3
452#define MXC_CCM_CCGRx_MOD_OFF 0x0
453#define MXC_CCM_CCGRx_MOD_ON 0x3
454#define MXC_CCM_CCGRx_MOD_IDLE 0x1
455
456#define MXC_CCM_CCGRx_CG15_MASK (0x3 << 30)
457#define MXC_CCM_CCGRx_CG14_MASK (0x3 << 28)
458#define MXC_CCM_CCGRx_CG13_MASK (0x3 << 26)
459#define MXC_CCM_CCGRx_CG12_MASK (0x3 << 24)
460#define MXC_CCM_CCGRx_CG11_MASK (0x3 << 22)
461#define MXC_CCM_CCGRx_CG10_MASK (0x3 << 20)
462#define MXC_CCM_CCGRx_CG9_MASK (0x3 << 18)
463#define MXC_CCM_CCGRx_CG8_MASK (0x3 << 16)
464#define MXC_CCM_CCGRx_CG5_MASK (0x3 << 10)
465#define MXC_CCM_CCGRx_CG4_MASK (0x3 << 8)
466#define MXC_CCM_CCGRx_CG3_MASK (0x3 << 6)
467#define MXC_CCM_CCGRx_CG2_MASK (0x3 << 4)
468#define MXC_CCM_CCGRx_CG1_MASK (0x3 << 2)
469#define MXC_CCM_CCGRx_CG0_MASK (0x3 << 0)
470
471#define MXC_CCM_CCGRx_CG15_OFFSET 30
472#define MXC_CCM_CCGRx_CG14_OFFSET 28
473#define MXC_CCM_CCGRx_CG13_OFFSET 26
474#define MXC_CCM_CCGRx_CG12_OFFSET 24
475#define MXC_CCM_CCGRx_CG11_OFFSET 22
476#define MXC_CCM_CCGRx_CG10_OFFSET 20
477#define MXC_CCM_CCGRx_CG9_OFFSET 18
478#define MXC_CCM_CCGRx_CG8_OFFSET 16
479#define MXC_CCM_CCGRx_CG7_OFFSET 14
480#define MXC_CCM_CCGRx_CG6_OFFSET 12
481#define MXC_CCM_CCGRx_CG5_OFFSET 10
482#define MXC_CCM_CCGRx_CG4_OFFSET 8
483#define MXC_CCM_CCGRx_CG3_OFFSET 6
484#define MXC_CCM_CCGRx_CG2_OFFSET 4
485#define MXC_CCM_CCGRx_CG1_OFFSET 2
486#define MXC_CCM_CCGRx_CG0_OFFSET 0
487
488#define MXC_DPTC_LP_BASE (MX51_GPC_BASE + 0x80)
489#define MXC_DPTC_GP_BASE (MX51_GPC_BASE + 0x100)
490#define MXC_DVFS_CORE_BASE (MX51_GPC_BASE + 0x180)
491#define MXC_DPTC_PER_BASE (MX51_GPC_BASE + 0x1C0)
492#define MXC_PGC_IPU_BASE (MX51_GPC_BASE + 0x220)
493#define MXC_PGC_VPU_BASE (MX51_GPC_BASE + 0x240)
494#define MXC_PGC_GPU_BASE (MX51_GPC_BASE + 0x260)
495#define MXC_SRPG_NEON_BASE (MX51_GPC_BASE + 0x280)
496#define MXC_SRPG_ARM_BASE (MX51_GPC_BASE + 0x2A0)
497#define MXC_SRPG_EMPGC0_BASE (MX51_GPC_BASE + 0x2C0)
498#define MXC_SRPG_EMPGC1_BASE (MX51_GPC_BASE + 0x2D0)
499#define MXC_SRPG_MEGAMIX_BASE (MX51_GPC_BASE + 0x2E0)
500#define MXC_SRPG_EMI_BASE (MX51_GPC_BASE + 0x300)
501
502/* CORTEXA8 platform */
503#define MXC_CORTEXA8_PLAT_PVID (MX51_CORTEXA8_BASE + 0x0)
504#define MXC_CORTEXA8_PLAT_GPC (MX51_CORTEXA8_BASE + 0x4)
505#define MXC_CORTEXA8_PLAT_PIC (MX51_CORTEXA8_BASE + 0x8)
506#define MXC_CORTEXA8_PLAT_LPC (MX51_CORTEXA8_BASE + 0xC)
507#define MXC_CORTEXA8_PLAT_NEON_LPC (MX51_CORTEXA8_BASE + 0x10)
508#define MXC_CORTEXA8_PLAT_ICGC (MX51_CORTEXA8_BASE + 0x14)
509#define MXC_CORTEXA8_PLAT_AMC (MX51_CORTEXA8_BASE + 0x18)
510#define MXC_CORTEXA8_PLAT_NMC (MX51_CORTEXA8_BASE + 0x20)
511#define MXC_CORTEXA8_PLAT_NMS (MX51_CORTEXA8_BASE + 0x24)
512
513/* DVFS CORE */
514#define MXC_DVFSTHRS (MXC_DVFS_CORE_BASE + 0x00)
515#define MXC_DVFSCOUN (MXC_DVFS_CORE_BASE + 0x04)
516#define MXC_DVFSSIG1 (MXC_DVFS_CORE_BASE + 0x08)
517#define MXC_DVFSSIG0 (MXC_DVFS_CORE_BASE + 0x0C)
518#define MXC_DVFSGPC0 (MXC_DVFS_CORE_BASE + 0x10)
519#define MXC_DVFSGPC1 (MXC_DVFS_CORE_BASE + 0x14)
520#define MXC_DVFSGPBT (MXC_DVFS_CORE_BASE + 0x18)
521#define MXC_DVFSEMAC (MXC_DVFS_CORE_BASE + 0x1C)
522#define MXC_DVFSCNTR (MXC_DVFS_CORE_BASE + 0x20)
523#define MXC_DVFSLTR0_0 (MXC_DVFS_CORE_BASE + 0x24)
524#define MXC_DVFSLTR0_1 (MXC_DVFS_CORE_BASE + 0x28)
525#define MXC_DVFSLTR1_0 (MXC_DVFS_CORE_BASE + 0x2C)
526#define MXC_DVFSLTR1_1 (MXC_DVFS_CORE_BASE + 0x30)
527#define MXC_DVFSPT0 (MXC_DVFS_CORE_BASE + 0x34)
528#define MXC_DVFSPT1 (MXC_DVFS_CORE_BASE + 0x38)
529#define MXC_DVFSPT2 (MXC_DVFS_CORE_BASE + 0x3C)
530#define MXC_DVFSPT3 (MXC_DVFS_CORE_BASE + 0x40)
531
532/* GPC */
533#define MXC_GPC_CNTR (MX51_GPC_BASE + 0x0)
534#define MXC_GPC_PGR (MX51_GPC_BASE + 0x4)
535#define MXC_GPC_VCR (MX51_GPC_BASE + 0x8)
536#define MXC_GPC_ALL_PU (MX51_GPC_BASE + 0xC)
537#define MXC_GPC_NEON (MX51_GPC_BASE + 0x10)
538#define MXC_GPC_PGR_ARMPG_OFFSET 8
539#define MXC_GPC_PGR_ARMPG_MASK (3 << 8)
540
541/* PGC */
542#define MXC_PGC_IPU_PGCR (MXC_PGC_IPU_BASE + 0x0)
543#define MXC_PGC_IPU_PGSR (MXC_PGC_IPU_BASE + 0xC)
544#define MXC_PGC_VPU_PGCR (MXC_PGC_VPU_BASE + 0x0)
545#define MXC_PGC_VPU_PGSR (MXC_PGC_VPU_BASE + 0xC)
546#define MXC_PGC_GPU_PGCR (MXC_PGC_GPU_BASE + 0x0)
547#define MXC_PGC_GPU_PGSR (MXC_PGC_GPU_BASE + 0xC)
548
549#define MXC_PGCR_PCR 1
550#define MXC_SRPGCR_PCR 1
551#define MXC_EMPGCR_PCR 1
552#define MXC_PGSR_PSR 1
553
554
555#define MXC_CORTEXA8_PLAT_LPC_DSM (1 << 0)
556#define MXC_CORTEXA8_PLAT_LPC_DBG_DSM (1 << 1)
557
558/* SRPG */
559#define MXC_SRPG_NEON_SRPGCR (MXC_SRPG_NEON_BASE + 0x0)
560#define MXC_SRPG_NEON_PUPSCR (MXC_SRPG_NEON_BASE + 0x4)
561#define MXC_SRPG_NEON_PDNSCR (MXC_SRPG_NEON_BASE + 0x8)
562
563#define MXC_SRPG_ARM_SRPGCR (MXC_SRPG_ARM_BASE + 0x0)
564#define MXC_SRPG_ARM_PUPSCR (MXC_SRPG_ARM_BASE + 0x4)
565#define MXC_SRPG_ARM_PDNSCR (MXC_SRPG_ARM_BASE + 0x8)
566
567#define MXC_SRPG_EMPGC0_SRPGCR (MXC_SRPG_EMPGC0_BASE + 0x0)
568#define MXC_SRPG_EMPGC0_PUPSCR (MXC_SRPG_EMPGC0_BASE + 0x4)
569#define MXC_SRPG_EMPGC0_PDNSCR (MXC_SRPG_EMPGC0_BASE + 0x8)
570
571#define MXC_SRPG_EMPGC1_SRPGCR (MXC_SRPG_EMPGC1_BASE + 0x0)
572#define MXC_SRPG_EMPGC1_PUPSCR (MXC_SRPG_EMPGC1_BASE + 0x4)
573#define MXC_SRPG_EMPGC1_PDNSCR (MXC_SRPG_EMPGC1_BASE + 0x8)
574
575#define MXC_SRPG_MEGAMIX_SRPGCR (MXC_SRPG_MEGAMIX_BASE + 0x0)
576#define MXC_SRPG_MEGAMIX_PUPSCR (MXC_SRPG_MEGAMIX_BASE + 0x4)
577#define MXC_SRPG_MEGAMIX_PDNSCR (MXC_SRPG_MEGAMIX_BASE + 0x8)
578
579#define MXC_SRPGC_EMI_SRPGCR (MXC_SRPGC_EMI_BASE + 0x0)
580#define MXC_SRPGC_EMI_PUPSCR (MXC_SRPGC_EMI_BASE + 0x4)
581#define MXC_SRPGC_EMI_PDNSCR (MXC_SRPGC_EMI_BASE + 0x8)
582
583#endif /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
new file mode 100644
index 000000000000..d6fd3961ade9
--- /dev/null
+++ b/arch/arm/mach-mx5/devices.c
@@ -0,0 +1,96 @@
1/*
2 * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/platform_device.h>
13#include <mach/hardware.h>
14#include <mach/imx-uart.h>
15
16static struct resource uart0[] = {
17 {
18 .start = MX51_UART1_BASE_ADDR,
19 .end = MX51_UART1_BASE_ADDR + 0xfff,
20 .flags = IORESOURCE_MEM,
21 }, {
22 .start = MX51_MXC_INT_UART1,
23 .end = MX51_MXC_INT_UART1,
24 .flags = IORESOURCE_IRQ,
25 },
26};
27
28struct platform_device mxc_uart_device0 = {
29 .name = "imx-uart",
30 .id = 0,
31 .resource = uart0,
32 .num_resources = ARRAY_SIZE(uart0),
33};
34
35static struct resource uart1[] = {
36 {
37 .start = MX51_UART2_BASE_ADDR,
38 .end = MX51_UART2_BASE_ADDR + 0xfff,
39 .flags = IORESOURCE_MEM,
40 }, {
41 .start = MX51_MXC_INT_UART2,
42 .end = MX51_MXC_INT_UART2,
43 .flags = IORESOURCE_IRQ,
44 },
45};
46
47struct platform_device mxc_uart_device1 = {
48 .name = "imx-uart",
49 .id = 1,
50 .resource = uart1,
51 .num_resources = ARRAY_SIZE(uart1),
52};
53
54static struct resource uart2[] = {
55 {
56 .start = MX51_UART3_BASE_ADDR,
57 .end = MX51_UART3_BASE_ADDR + 0xfff,
58 .flags = IORESOURCE_MEM,
59 }, {
60 .start = MX51_MXC_INT_UART3,
61 .end = MX51_MXC_INT_UART3,
62 .flags = IORESOURCE_IRQ,
63 },
64};
65
66struct platform_device mxc_uart_device2 = {
67 .name = "imx-uart",
68 .id = 2,
69 .resource = uart2,
70 .num_resources = ARRAY_SIZE(uart2),
71};
72
73static struct resource mxc_fec_resources[] = {
74 {
75 .start = MX51_MXC_FEC_BASE_ADDR,
76 .end = MX51_MXC_FEC_BASE_ADDR + 0xfff,
77 .flags = IORESOURCE_MEM,
78 }, {
79 .start = MX51_MXC_INT_FEC,
80 .end = MX51_MXC_INT_FEC,
81 .flags = IORESOURCE_IRQ,
82 },
83};
84
85struct platform_device mxc_fec_device = {
86 .name = "fec",
87 .id = 0,
88 .num_resources = ARRAY_SIZE(mxc_fec_resources),
89 .resource = mxc_fec_resources,
90};
91
92/* Dummy definition to allow compiling in AVIC and TZIC simultaneously */
93int __init mxc_register_gpios(void)
94{
95 return 0;
96}
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
new file mode 100644
index 000000000000..f339ab8c19be
--- /dev/null
+++ b/arch/arm/mach-mx5/devices.h
@@ -0,0 +1,4 @@
1extern struct platform_device mxc_uart_device0;
2extern struct platform_device mxc_uart_device1;
3extern struct platform_device mxc_uart_device2;
4extern struct platform_device mxc_fec_device;
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
new file mode 100644
index 000000000000..c21e18be7af8
--- /dev/null
+++ b/arch/arm/mach-mx5/mm.c
@@ -0,0 +1,89 @@
1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 *
11 * Create static mapping between physical to virtual memory.
12 */
13
14#include <linux/mm.h>
15#include <linux/init.h>
16
17#include <asm/mach/map.h>
18
19#include <mach/hardware.h>
20#include <mach/common.h>
21#include <mach/iomux-v3.h>
22
23/*
24 * Define the MX51 memory map.
25 */
26static struct map_desc mxc_io_desc[] __initdata = {
27 {
28 .virtual = MX51_IRAM_BASE_ADDR_VIRT,
29 .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
30 .length = MX51_IRAM_SIZE,
31 .type = MT_DEVICE
32 }, {
33 .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
34 .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
35 .length = MX51_DEBUG_SIZE,
36 .type = MT_DEVICE
37 }, {
38 .virtual = MX51_TZIC_BASE_ADDR_VIRT,
39 .pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR),
40 .length = MX51_TZIC_SIZE,
41 .type = MT_DEVICE
42 }, {
43 .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
44 .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
45 .length = MX51_AIPS1_SIZE,
46 .type = MT_DEVICE
47 }, {
48 .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
49 .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
50 .length = MX51_SPBA0_SIZE,
51 .type = MT_DEVICE
52 }, {
53 .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
54 .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
55 .length = MX51_AIPS2_SIZE,
56 .type = MT_DEVICE
57 }, {
58 .virtual = MX51_NFC_AXI_BASE_ADDR_VIRT,
59 .pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR),
60 .length = MX51_NFC_AXI_SIZE,
61 .type = MT_DEVICE
62 },
63};
64
65/*
66 * This function initializes the memory map. It is called during the
67 * system startup to create static physical to virtual memory mappings
68 * for the IO modules.
69 */
70void __init mx51_map_io(void)
71{
72 u32 tzic_addr;
73
74 if (mx51_revision() < MX51_CHIP_REV_2_0)
75 tzic_addr = 0x8FFFC000;
76 else
77 tzic_addr = 0xE0003000;
78 mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr);
79
80 mxc_set_cpu_type(MXC_CPU_MX51);
81 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
82 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
83 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
84}
85
86void __init mx51_init_irq(void)
87{
88 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
89}
diff --git a/arch/arm/mach-mxc91231/magx-zn5.c b/arch/arm/mach-mxc91231/magx-zn5.c
index 7dbe4ca12efd..69816ba82930 100644
--- a/arch/arm/mach-mxc91231/magx-zn5.c
+++ b/arch/arm/mach-mxc91231/magx-zn5.c
@@ -55,7 +55,7 @@ struct sys_timer zn5_timer = {
55MACHINE_START(MAGX_ZN5, "Motorola Zn5") 55MACHINE_START(MAGX_ZN5, "Motorola Zn5")
56 .phys_io = MXC91231_AIPS1_BASE_ADDR, 56 .phys_io = MXC91231_AIPS1_BASE_ADDR,
57 .io_pg_offst = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 57 .io_pg_offst = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
58 .boot_params = PHYS_OFFSET + 0x100, 58 .boot_params = MXC91231_PHYS_OFFSET + 0x100,
59 .map_io = mxc91231_map_io, 59 .map_io = mxc91231_map_io,
60 .init_irq = mxc91231_init_irq, 60 .init_irq = mxc91231_init_irq,
61 .timer = &zn5_timer, 61 .timer = &zn5_timer,
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 9438bf6613a3..ab3712c86d2b 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -38,7 +38,7 @@
38#define SRC_CR_INIT_MASK 0x00007fff 38#define SRC_CR_INIT_MASK 0x00007fff
39#define SRC_CR_INIT_VAL 0x2aaa8000 39#define SRC_CR_INIT_VAL 0x2aaa8000
40 40
41/* These adresses span 16MB, so use three individual pages */ 41/* These addresses span 16MB, so use three individual pages */
42static struct resource nhk8815_nand_resources[] = { 42static struct resource nhk8815_nand_resources[] = {
43 { 43 {
44 .name = "nand_addr", 44 .name = "nand_addr",
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 4386d2b4a785..4386d2b4a785 100755..100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index ca95d8d64136..ca95d8d64136 100755..100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index c3d513cad5ac..905719a677ae 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -57,6 +57,13 @@ config MACH_LINKSTATION_MINI
57 Say 'Y' here if you want your kernel to support the 57 Say 'Y' here if you want your kernel to support the
58 Buffalo Linkstation Mini platform. 58 Buffalo Linkstation Mini platform.
59 59
60config MACH_LINKSTATION_LS_HGL
61 bool "Buffalo Linkstation LS-HGL"
62 select I2C_BOARDINFO
63 help
64 Say 'Y' here if you want your kernel to support the
65 Buffalo Linkstation LS-HGL platform.
66
60config MACH_TS409 67config MACH_TS409
61 bool "QNAP TS-409" 68 bool "QNAP TS-409"
62 help 69 help
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 89772fcd65c7..eb6eabcb41e4 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o
5obj-$(CONFIG_MACH_TERASTATION_PRO2) += terastation_pro2-setup.o 5obj-$(CONFIG_MACH_TERASTATION_PRO2) += terastation_pro2-setup.o
6obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o 6obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o
7obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o 7obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o
8obj-$(CONFIG_MACH_LINKSTATION_LS_HGL) += ls_hgl-setup.o
8obj-$(CONFIG_MACH_DNS323) += dns323-setup.o 9obj-$(CONFIG_MACH_DNS323) += dns323-setup.o
9obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o 10obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o
10obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o 11obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index f87fa1253803..8dc2c76d2260 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -488,7 +488,7 @@ static struct platform_device orion5x_xor0_channel = {
488 .dev = { 488 .dev = {
489 .dma_mask = &orion5x_xor_dmamask, 489 .dma_mask = &orion5x_xor_dmamask,
490 .coherent_dma_mask = DMA_BIT_MASK(64), 490 .coherent_dma_mask = DMA_BIT_MASK(64),
491 .platform_data = (void *)&orion5x_xor0_data, 491 .platform_data = &orion5x_xor0_data,
492 }, 492 },
493}; 493};
494 494
@@ -514,7 +514,7 @@ static struct platform_device orion5x_xor1_channel = {
514 .dev = { 514 .dev = {
515 .dma_mask = &orion5x_xor_dmamask, 515 .dma_mask = &orion5x_xor_dmamask,
516 .coherent_dma_mask = DMA_BIT_MASK(64), 516 .coherent_dma_mask = DMA_BIT_MASK(64),
517 .platform_data = (void *)&orion5x_xor1_data, 517 .platform_data = &orion5x_xor1_data,
518 }, 518 },
519}; 519};
520 520
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 9d4bf763f25b..7130904ad999 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -149,10 +149,7 @@ static void __init d2net_sata_power_init(void)
149 149
150/* 150/*
151 * The blue front LED is wired to the CPLD and can blink in relation with the 151 * The blue front LED is wired to the CPLD and can blink in relation with the
152 * SATA activity. This feature is disabled to make this LED compatible with 152 * SATA activity.
153 * the leds-gpio driver: MPP14 and MPP15 are configured to act like output
154 * GPIO's and have to stay in an active state. This is needed to set the blue
155 * LED in a "fix on" state regardless of the SATA activity.
156 * 153 *
157 * The following array detail the different LED registers and the combination 154 * The following array detail the different LED registers and the combination
158 * of their possible values: 155 * of their possible values:
@@ -171,12 +168,11 @@ static void __init d2net_sata_power_init(void)
171#define D2NET_GPIO_RED_LED 6 168#define D2NET_GPIO_RED_LED 6
172#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16 169#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
173#define D2NET_GPIO_BLUE_LED_OFF 23 170#define D2NET_GPIO_BLUE_LED_OFF 23
174#define D2NET_GPIO_SATA0_ACT 14
175#define D2NET_GPIO_SATA1_ACT 15
176 171
177static struct gpio_led d2net_leds[] = { 172static struct gpio_led d2net_leds[] = {
178 { 173 {
179 .name = "d2net:blue:power", 174 .name = "d2net:blue:sata",
175 .default_trigger = "default-on",
180 .gpio = D2NET_GPIO_BLUE_LED_OFF, 176 .gpio = D2NET_GPIO_BLUE_LED_OFF,
181 .active_low = 1, 177 .active_low = 1,
182 }, 178 },
@@ -201,25 +197,22 @@ static struct platform_device d2net_gpio_leds = {
201 197
202static void __init d2net_gpio_leds_init(void) 198static void __init d2net_gpio_leds_init(void)
203{ 199{
200 int err;
201
204 /* Configure GPIO over MPP max number. */ 202 /* Configure GPIO over MPP max number. */
205 orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1); 203 orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1);
206 204
207 if (gpio_request(D2NET_GPIO_SATA0_ACT, "LED SATA0 activity") != 0) 205 /* Configure register blink_ctrl to allow SATA activity LED blinking. */
208 return; 206 err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
209 if (gpio_direction_output(D2NET_GPIO_SATA0_ACT, 1) != 0) 207 if (err == 0) {
210 goto err_free_1; 208 err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
211 if (gpio_request(D2NET_GPIO_SATA1_ACT, "LED SATA1 activity") != 0) 209 if (err)
212 goto err_free_1; 210 gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
213 if (gpio_direction_output(D2NET_GPIO_SATA1_ACT, 1) != 0) 211 }
214 goto err_free_2; 212 if (err)
215 platform_device_register(&d2net_gpio_leds); 213 pr_err("d2net: failed to configure blue LED blink GPIO\n");
216 return;
217 214
218err_free_2: 215 platform_device_register(&d2net_gpio_leds);
219 gpio_free(D2NET_GPIO_SATA1_ACT);
220err_free_1:
221 gpio_free(D2NET_GPIO_SATA0_ACT);
222 return;
223} 216}
224 217
225/**************************************************************************** 218/****************************************************************************
@@ -289,8 +282,8 @@ static struct orion5x_mpp_mode d2net_mpp_modes[] __initdata = {
289 { 11, MPP_UNUSED }, 282 { 11, MPP_UNUSED },
290 { 12, MPP_GPIO }, /* SATA 1 power */ 283 { 12, MPP_GPIO }, /* SATA 1 power */
291 { 13, MPP_UNUSED }, 284 { 13, MPP_UNUSED },
292 { 14, MPP_GPIO }, /* SATA 0 active */ 285 { 14, MPP_SATA_LED }, /* SATA 0 active */
293 { 15, MPP_GPIO }, /* SATA 1 active */ 286 { 15, MPP_SATA_LED }, /* SATA 1 active */
294 { 16, MPP_GPIO }, /* Blue front LED blink control */ 287 { 16, MPP_GPIO }, /* Blue front LED blink control */
295 { 17, MPP_UNUSED }, 288 { 17, MPP_UNUSED },
296 { 18, MPP_GPIO }, /* Front button (0 = Released, 1 = Pushed ) */ 289 { 18, MPP_GPIO }, /* Front button (0 = Released, 1 = Pushed ) */
@@ -301,6 +294,8 @@ static struct orion5x_mpp_mode d2net_mpp_modes[] __initdata = {
301 /* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */ 294 /* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
302}; 295};
303 296
297#define D2NET_GPIO_INHIBIT_POWER_OFF 24
298
304static void __init d2net_init(void) 299static void __init d2net_init(void)
305{ 300{
306 /* 301 /*
@@ -333,6 +328,8 @@ static void __init d2net_init(void)
333 328
334 i2c_register_board_info(0, d2net_i2c_devices, 329 i2c_register_board_info(0, d2net_i2c_devices,
335 ARRAY_SIZE(d2net_i2c_devices)); 330 ARRAY_SIZE(d2net_i2c_devices));
331
332 orion_gpio_set_valid(D2NET_GPIO_INHIBIT_POWER_OFF, 1);
336} 333}
337 334
338/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ 335/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 8f159db4d08a..421b82f7c63d 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -34,7 +34,8 @@
34#define DNS323_GPIO_LED_RIGHT_AMBER 1 34#define DNS323_GPIO_LED_RIGHT_AMBER 1
35#define DNS323_GPIO_LED_LEFT_AMBER 2 35#define DNS323_GPIO_LED_LEFT_AMBER 2
36#define DNS323_GPIO_SYSTEM_UP 3 36#define DNS323_GPIO_SYSTEM_UP 3
37#define DNS323_GPIO_LED_POWER 5 37#define DNS323_GPIO_LED_POWER1 4
38#define DNS323_GPIO_LED_POWER2 5
38#define DNS323_GPIO_OVERTEMP 6 39#define DNS323_GPIO_OVERTEMP 6
39#define DNS323_GPIO_RTC 7 40#define DNS323_GPIO_RTC 7
40#define DNS323_GPIO_POWER_OFF 8 41#define DNS323_GPIO_POWER_OFF 8
@@ -237,11 +238,31 @@ error_fail:
237 * GPIO LEDs (simple - doesn't use hardware blinking support) 238 * GPIO LEDs (simple - doesn't use hardware blinking support)
238 */ 239 */
239 240
241#define ORION_BLINK_HALF_PERIOD 100 /* ms */
242
243static int dns323_gpio_blink_set(unsigned gpio,
244 unsigned long *delay_on, unsigned long *delay_off)
245{
246 static int value = 0;
247
248 if (!*delay_on && !*delay_off)
249 *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;
250
251 if (ORION_BLINK_HALF_PERIOD == *delay_on
252 && ORION_BLINK_HALF_PERIOD == *delay_off) {
253 value = !value;
254 orion_gpio_set_blink(gpio, value);
255 return 0;
256 }
257
258 return -EINVAL;
259}
260
240static struct gpio_led dns323_leds[] = { 261static struct gpio_led dns323_leds[] = {
241 { 262 {
242 .name = "power:blue", 263 .name = "power:blue",
243 .gpio = DNS323_GPIO_LED_POWER, 264 .gpio = DNS323_GPIO_LED_POWER2,
244 .default_state = LEDS_GPIO_DEFSTATE_ON, 265 .default_trigger = "timer",
245 }, { 266 }, {
246 .name = "right:amber", 267 .name = "right:amber",
247 .gpio = DNS323_GPIO_LED_RIGHT_AMBER, 268 .gpio = DNS323_GPIO_LED_RIGHT_AMBER,
@@ -256,6 +277,7 @@ static struct gpio_led dns323_leds[] = {
256static struct gpio_led_platform_data dns323_led_data = { 277static struct gpio_led_platform_data dns323_led_data = {
257 .num_leds = ARRAY_SIZE(dns323_leds), 278 .num_leds = ARRAY_SIZE(dns323_leds),
258 .leds = dns323_leds, 279 .leds = dns323_leds,
280 .gpio_blink_set = dns323_gpio_blink_set,
259}; 281};
260 282
261static struct platform_device dns323_gpio_leds = { 283static struct platform_device dns323_gpio_leds = {
@@ -412,6 +434,14 @@ static void __init dns323_init(void)
412 orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE); 434 orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE);
413 platform_device_register(&dns323_nor_flash); 435 platform_device_register(&dns323_nor_flash);
414 436
437 /* The 5181 power LED is active low and requires
438 * DNS323_GPIO_LED_POWER1 to also be low.
439 */
440 if (dns323_dev_id() == MV88F5181_DEV_ID) {
441 dns323_leds[0].active_low = 1;
442 gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
443 }
444
415 platform_device_register(&dns323_gpio_leds); 445 platform_device_register(&dns323_gpio_leds);
416 446
417 platform_device_register(&dns323_button_device); 447 platform_device_register(&dns323_button_device);
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
new file mode 100644
index 000000000000..8e569be6e2c7
--- /dev/null
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -0,0 +1,276 @@
1/*
2 * arch/arm/mach-orion5x/ls_hgl-setup.c
3 *
4 * Maintainer: Zhu Qingsen <zhuqs@cn.fujitsu.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/mv643xx_eth.h>
16#include <linux/leds.h>
17#include <linux/gpio_keys.h>
18#include <linux/input.h>
19#include <linux/i2c.h>
20#include <linux/ata_platform.h>
21#include <linux/gpio.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/system.h>
25#include <mach/orion5x.h>
26#include "common.h"
27#include "mpp.h"
28
29/*****************************************************************************
30 * Linkstation LS-HGL Info
31 ****************************************************************************/
32
33/*
34 * 256K NOR flash Device bus boot chip select
35 */
36
37#define LS_HGL_NOR_BOOT_BASE 0xf4000000
38#define LS_HGL_NOR_BOOT_SIZE SZ_256K
39
40/*****************************************************************************
41 * 256KB NOR Flash on BOOT Device
42 ****************************************************************************/
43
44static struct physmap_flash_data ls_hgl_nor_flash_data = {
45 .width = 1,
46};
47
48static struct resource ls_hgl_nor_flash_resource = {
49 .flags = IORESOURCE_MEM,
50 .start = LS_HGL_NOR_BOOT_BASE,
51 .end = LS_HGL_NOR_BOOT_BASE + LS_HGL_NOR_BOOT_SIZE - 1,
52};
53
54static struct platform_device ls_hgl_nor_flash = {
55 .name = "physmap-flash",
56 .id = 0,
57 .dev = {
58 .platform_data = &ls_hgl_nor_flash_data,
59 },
60 .num_resources = 1,
61 .resource = &ls_hgl_nor_flash_resource,
62};
63
64/*****************************************************************************
65 * Ethernet
66 ****************************************************************************/
67
68static struct mv643xx_eth_platform_data ls_hgl_eth_data = {
69 .phy_addr = 8,
70};
71
72/*****************************************************************************
73 * RTC 5C372a on I2C bus
74 ****************************************************************************/
75
76static struct i2c_board_info __initdata ls_hgl_i2c_rtc = {
77 I2C_BOARD_INFO("rs5c372a", 0x32),
78};
79
80/*****************************************************************************
81 * LEDs attached to GPIO
82 ****************************************************************************/
83
84#define LS_HGL_GPIO_LED_ALARM 2
85#define LS_HGL_GPIO_LED_INFO 3
86#define LS_HGL_GPIO_LED_FUNC 17
87#define LS_HGL_GPIO_LED_PWR 0
88
89
90static struct gpio_led ls_hgl_led_pins[] = {
91 {
92 .name = "alarm:red",
93 .gpio = LS_HGL_GPIO_LED_ALARM,
94 .active_low = 1,
95 }, {
96 .name = "info:amber",
97 .gpio = LS_HGL_GPIO_LED_INFO,
98 .active_low = 1,
99 }, {
100 .name = "func:blue:top",
101 .gpio = LS_HGL_GPIO_LED_FUNC,
102 .active_low = 1,
103 }, {
104 .name = "power:blue:bottom",
105 .gpio = LS_HGL_GPIO_LED_PWR,
106 },
107};
108
109static struct gpio_led_platform_data ls_hgl_led_data = {
110 .leds = ls_hgl_led_pins,
111 .num_leds = ARRAY_SIZE(ls_hgl_led_pins),
112};
113
114static struct platform_device ls_hgl_leds = {
115 .name = "leds-gpio",
116 .id = -1,
117 .dev = {
118 .platform_data = &ls_hgl_led_data,
119 },
120};
121
122/****************************************************************************
123 * GPIO Attached Keys
124 ****************************************************************************/
125#define LS_HGL_GPIO_KEY_FUNC 15
126#define LS_HGL_GPIO_KEY_POWER 8
127#define LS_HGL_GPIO_KEY_AUTOPOWER 10
128
129#define LS_HGL_SW_POWER 0x00
130#define LS_HGL_SW_AUTOPOWER 0x01
131
132static struct gpio_keys_button ls_hgl_buttons[] = {
133 {
134 .code = KEY_OPTION,
135 .gpio = LS_HGL_GPIO_KEY_FUNC,
136 .desc = "Function Button",
137 .active_low = 1,
138 }, {
139 .type = EV_SW,
140 .code = LS_HGL_SW_POWER,
141 .gpio = LS_HGL_GPIO_KEY_POWER,
142 .desc = "Power-on Switch",
143 .active_low = 1,
144 }, {
145 .type = EV_SW,
146 .code = LS_HGL_SW_AUTOPOWER,
147 .gpio = LS_HGL_GPIO_KEY_AUTOPOWER,
148 .desc = "Power-auto Switch",
149 .active_low = 1,
150 },
151};
152
153static struct gpio_keys_platform_data ls_hgl_button_data = {
154 .buttons = ls_hgl_buttons,
155 .nbuttons = ARRAY_SIZE(ls_hgl_buttons),
156};
157
158static struct platform_device ls_hgl_button_device = {
159 .name = "gpio-keys",
160 .id = -1,
161 .num_resources = 0,
162 .dev = {
163 .platform_data = &ls_hgl_button_data,
164 },
165};
166
167
168/*****************************************************************************
169 * SATA
170 ****************************************************************************/
171static struct mv_sata_platform_data ls_hgl_sata_data = {
172 .n_ports = 2,
173};
174
175
176/*****************************************************************************
177 * Linkstation LS-HGL specific power off method: reboot
178 ****************************************************************************/
179/*
180 * On the Linkstation LS-HGL, the shutdown process is following:
181 * - Userland monitors key events until the power switch goes to off position
182 * - The board reboots
183 * - U-boot starts and goes into an idle mode waiting for the user
184 * to move the switch to ON position
185 */
186
187static void ls_hgl_power_off(void)
188{
189 arm_machine_restart('h', NULL);
190}
191
192
193/*****************************************************************************
194 * General Setup
195 ****************************************************************************/
196
197#define LS_HGL_GPIO_USB_POWER 9
198#define LS_HGL_GPIO_AUTO_POWER 10
199#define LS_HGL_GPIO_POWER 8
200
201#define LS_HGL_GPIO_HDD_POWER 1
202
203static struct orion5x_mpp_mode ls_hgl_mpp_modes[] __initdata = {
204 { 0, MPP_GPIO }, /* LED_PWR */
205 { 1, MPP_GPIO }, /* HDD_PWR */
206 { 2, MPP_GPIO }, /* LED_ALARM */
207 { 3, MPP_GPIO }, /* LED_INFO */
208 { 4, MPP_UNUSED },
209 { 5, MPP_UNUSED },
210 { 6, MPP_GPIO }, /* FAN_LCK */
211 { 7, MPP_GPIO }, /* INIT */
212 { 8, MPP_GPIO }, /* POWER */
213 { 9, MPP_GPIO }, /* USB_PWR */
214 { 10, MPP_GPIO }, /* AUTO_POWER */
215 { 11, MPP_UNUSED }, /* LED_ETH (dummy) */
216 { 12, MPP_UNUSED },
217 { 13, MPP_UNUSED },
218 { 14, MPP_UNUSED },
219 { 15, MPP_GPIO }, /* FUNC */
220 { 16, MPP_UNUSED },
221 { 17, MPP_GPIO }, /* LED_FUNC */
222 { 18, MPP_UNUSED },
223 { 19, MPP_UNUSED },
224 { -1 },
225};
226
227static void __init ls_hgl_init(void)
228{
229 /*
230 * Setup basic Orion functions. Need to be called early.
231 */
232 orion5x_init();
233
234 orion5x_mpp_conf(ls_hgl_mpp_modes);
235
236 /*
237 * Configure peripherals.
238 */
239 orion5x_ehci0_init();
240 orion5x_ehci1_init();
241 orion5x_eth_init(&ls_hgl_eth_data);
242 orion5x_i2c_init();
243 orion5x_sata_init(&ls_hgl_sata_data);
244 orion5x_uart0_init();
245 orion5x_xor_init();
246
247 orion5x_setup_dev_boot_win(LS_HGL_NOR_BOOT_BASE,
248 LS_HGL_NOR_BOOT_SIZE);
249 platform_device_register(&ls_hgl_nor_flash);
250
251 platform_device_register(&ls_hgl_button_device);
252
253 platform_device_register(&ls_hgl_leds);
254
255 i2c_register_board_info(0, &ls_hgl_i2c_rtc, 1);
256
257 /* enable USB power */
258 gpio_set_value(LS_HGL_GPIO_USB_POWER, 1);
259
260 /* register power-off method */
261 pm_power_off = ls_hgl_power_off;
262
263 pr_info("%s: finished\n", __func__);
264}
265
266MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
267 /* Maintainer: Zhu Qingsen <zhuqs@cn.fujistu.com> */
268 .phys_io = ORION5X_REGS_PHYS_BASE,
269 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
270 .boot_params = 0x00000100,
271 .init_machine = ls_hgl_init,
272 .map_io = orion5x_map_io,
273 .init_irq = orion5x_init_irq,
274 .timer = &orion5x_timer,
275 .fixup = tag_fixup_mem32,
276MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index c9bf6b81a80d..c704f056de1e 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -11,7 +11,6 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h> 15#include <linux/mv643xx_eth.h>
17#include <linux/leds.h> 16#include <linux/leds.h>
@@ -19,12 +18,13 @@
19#include <linux/input.h> 18#include <linux/input.h>
20#include <linux/i2c.h> 19#include <linux/i2c.h>
21#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
22#include <asm/mach-types.h>
23#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/system.h>
25#include <mach/orion5x.h>
25#include "common.h" 26#include "common.h"
26#include "mpp.h" 27#include "mpp.h"
27#include "include/mach/system.h"
28 28
29/***************************************************************************** 29/*****************************************************************************
30 * Linkstation Mini Info 30 * Linkstation Mini Info
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
186 186
187static void lsmini_power_off(void) 187static void lsmini_power_off(void)
188{ 188{
189 arch_reset(0, NULL); 189 arm_machine_restart('h', NULL);
190} 190}
191 191
192 192
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index dee92182749b..38fbd0a0e402 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -115,6 +115,11 @@ config MACH_CM_X300
115 select CPU_PXA310 115 select CPU_PXA310
116 select HAVE_PWM 116 select HAVE_PWM
117 117
118config MACH_CAPC7117
119 bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM"
120 select CPU_PXA320
121 select PXA3xx
122
118config ARCH_GUMSTIX 123config ARCH_GUMSTIX
119 bool "Gumstix XScale 255 boards" 124 bool "Gumstix XScale 255 boards"
120 select PXA25x 125 select PXA25x
@@ -417,6 +422,24 @@ config MACH_TREO680
417 Say Y here if you intend to run this kernel on Palm Treo 680 422 Say Y here if you intend to run this kernel on Palm Treo 680
418 smartphone. 423 smartphone.
419 424
425config MACH_RAUMFELD_RC
426 bool "Raumfeld Controller"
427 select PXA3xx
428 select CPU_PXA300
429 select HAVE_PWM
430
431config MACH_RAUMFELD_CONNECTOR
432 bool "Raumfeld Connector"
433 select PXA3xx
434 select CPU_PXA300
435 select PXA_SSP
436
437config MACH_RAUMFELD_SPEAKER
438 bool "Raumfeld Speaker"
439 select PXA3xx
440 select CPU_PXA300
441 select PXA_SSP
442
420config PXA_SHARPSL 443config PXA_SHARPSL
421 bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" 444 bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
422 select SHARP_SCOOP 445 select SHARP_SCOOP
@@ -435,6 +458,7 @@ config SHARPSL_PM
435config CORGI_SSP_DEPRECATED 458config CORGI_SSP_DEPRECATED
436 bool 459 bool
437 select PXA_SSP 460 select PXA_SSP
461 select PXA_SSP_LEGACY
438 help 462 help
439 This option will include corgi_ssp.c and corgi_lcd.c 463 This option will include corgi_ssp.c and corgi_lcd.c
440 that corgi_ts.c and other legacy drivers (corgi_bl.c 464 that corgi_ts.c and other legacy drivers (corgi_bl.c
@@ -446,6 +470,7 @@ config MACH_POODLE
446 select PXA25x 470 select PXA25x
447 select SHARP_LOCOMO 471 select SHARP_LOCOMO
448 select PXA_SSP 472 select PXA_SSP
473 select PXA_HAVE_BOARD_IRQS
449 474
450config MACH_CORGI 475config MACH_CORGI
451 bool "Enable Sharp SL-C700 (Corgi) Support" 476 bool "Enable Sharp SL-C700 (Corgi) Support"
@@ -492,6 +517,11 @@ config MACH_TOSA
492 select PXA25x 517 select PXA25x
493 select PXA_HAVE_BOARD_IRQS 518 select PXA_HAVE_BOARD_IRQS
494 519
520config MACH_ICONTROL
521 bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM"
522 select CPU_PXA320
523 select PXA3xx
524
495config ARCH_PXA_ESERIES 525config ARCH_PXA_ESERIES
496 bool "PXA based Toshiba e-series PDAs" 526 bool "PXA based Toshiba e-series PDAs"
497 select PXA25x 527 select PXA25x
@@ -629,6 +659,11 @@ config PXA_SSP
629 help 659 help
630 Enable support for PXA2xx SSP ports 660 Enable support for PXA2xx SSP ports
631 661
662config PXA_SSP_LEGACY
663 bool
664 help
665 Support of legacy SSP API
666
632config TOSA_BT 667config TOSA_BT
633 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" 668 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
634 depends on MACH_TOSA 669 depends on MACH_TOSA
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index f64afda7e6f6..86bc87b7f2dd 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
48endif 48endif
49obj-$(CONFIG_MACH_EM_X270) += em-x270.o 49obj-$(CONFIG_MACH_EM_X270) += em-x270.o
50obj-$(CONFIG_MACH_CM_X300) += cm-x300.o 50obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
51obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o
51obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o 52obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
52obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o 53obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
53obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o 54obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
@@ -82,6 +83,7 @@ obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
82obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o 83obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o
83obj-$(CONFIG_MACH_POODLE) += poodle.o 84obj-$(CONFIG_MACH_POODLE) += poodle.o
84obj-$(CONFIG_MACH_TOSA) += tosa.o 85obj-$(CONFIG_MACH_TOSA) += tosa.o
86obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o
85obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o 87obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
86obj-$(CONFIG_MACH_E330) += e330.o 88obj-$(CONFIG_MACH_E330) += e330.o
87obj-$(CONFIG_MACH_E350) += e350.o 89obj-$(CONFIG_MACH_E350) += e350.o
@@ -89,6 +91,9 @@ obj-$(CONFIG_MACH_E740) += e740.o
89obj-$(CONFIG_MACH_E750) += e750.o 91obj-$(CONFIG_MACH_E750) += e750.o
90obj-$(CONFIG_MACH_E400) += e400.o 92obj-$(CONFIG_MACH_E400) += e400.o
91obj-$(CONFIG_MACH_E800) += e800.o 93obj-$(CONFIG_MACH_E800) += e800.o
94obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o
95obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o
96obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o
92 97
93# Support for blinky lights 98# Support for blinky lights
94led-y := leds.o 99led-y := leds.o
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 4bd10a17332e..993d75e66390 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -288,7 +288,7 @@ int __init am300_init(void)
288} 288}
289 289
290module_param(panel_type, uint, 0); 290module_param(panel_type, uint, 0);
291MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97"); 291MODULE_PARM_DESC(panel_type, "Select the panel type: 37, 6, 97");
292 292
293MODULE_DESCRIPTION("board driver for am300 epd kit"); 293MODULE_DESCRIPTION("board driver for am300 epd kit");
294MODULE_AUTHOR("Jaya Kumar"); 294MODULE_AUTHOR("Jaya Kumar");
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index b8cd07ca9380..f3b5ace815e5 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -132,6 +132,14 @@ static void __init balloon3_init_irq(void)
132 "enabled\n", __func__, BALLOON3_AUX_NIRQ); 132 "enabled\n", __func__, BALLOON3_AUX_NIRQ);
133} 133}
134 134
135static unsigned long balloon3_ac97_pin_config[] = {
136 GPIO28_AC97_BITCLK,
137 GPIO29_AC97_SDATA_IN_0,
138 GPIO30_AC97_SDATA_OUT,
139 GPIO31_AC97_SYNC,
140 GPIO113_AC97_nRESET,
141};
142
135static void balloon3_backlight_power(int on) 143static void balloon3_backlight_power(int on)
136{ 144{
137 pr_debug("%s: power is %s\n", __func__, on ? "on" : "off"); 145 pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
@@ -140,26 +148,7 @@ static void balloon3_backlight_power(int on)
140 148
141static unsigned long balloon3_lcd_pin_config[] = { 149static unsigned long balloon3_lcd_pin_config[] = {
142 /* LCD - 16bpp Active TFT */ 150 /* LCD - 16bpp Active TFT */
143 GPIO58_LCD_LDD_0, 151 GPIOxx_LCD_TFT_16BPP,
144 GPIO59_LCD_LDD_1,
145 GPIO60_LCD_LDD_2,
146 GPIO61_LCD_LDD_3,
147 GPIO62_LCD_LDD_4,
148 GPIO63_LCD_LDD_5,
149 GPIO64_LCD_LDD_6,
150 GPIO65_LCD_LDD_7,
151 GPIO66_LCD_LDD_8,
152 GPIO67_LCD_LDD_9,
153 GPIO68_LCD_LDD_10,
154 GPIO69_LCD_LDD_11,
155 GPIO70_LCD_LDD_12,
156 GPIO71_LCD_LDD_13,
157 GPIO72_LCD_LDD_14,
158 GPIO73_LCD_LDD_15,
159 GPIO74_LCD_FCLK,
160 GPIO75_LCD_LCLK,
161 GPIO76_LCD_PCLK,
162 GPIO77_LCD_BIAS,
163 152
164 GPIO99_GPIO, /* Backlight */ 153 GPIO99_GPIO, /* Backlight */
165}; 154};
@@ -311,8 +300,10 @@ static void __init balloon3_init(void)
311 pxa_set_stuart_info(NULL); 300 pxa_set_stuart_info(NULL);
312 301
313 pxa_set_i2c_info(NULL); 302 pxa_set_i2c_info(NULL);
314 if (balloon3_has(BALLOON3_FEATURE_AUDIO)) 303 if (balloon3_has(BALLOON3_FEATURE_AUDIO)) {
304 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
315 pxa_set_ac97_info(NULL); 305 pxa_set_ac97_info(NULL);
306 }
316 307
317 if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) { 308 if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
318 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config)); 309 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
new file mode 100644
index 000000000000..aae544631a8b
--- /dev/null
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -0,0 +1,158 @@
1/*
2 * linux/arch/arm/mach-pxa/capc7117.c
3 *
4 * Support for the Embedian CAPC-7117 Evaluation Kit
5 * based on the Embedian MXM-8x10 Computer on Module
6 *
7 * Copyright (C) 2009 Embedian Inc.
8 * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
9 *
10 * 2007-09-04: eric miao <eric.y.miao@gmail.com>
11 * rewrite to align with latest kernel
12 *
13 * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
14 * Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
15 * rework for upstream merge
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/irq.h>
23#include <linux/platform_device.h>
24#include <linux/ata_platform.h>
25#include <linux/serial_8250.h>
26#include <linux/gpio.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30
31#include <mach/pxa320.h>
32#include <mach/mxm8x10.h>
33
34#include "generic.h"
35
36/* IDE (PATA) Support */
37static struct pata_platform_info pata_platform_data = {
38 .ioport_shift = 1
39};
40
41static struct resource capc7117_ide_resources[] = {
42 [0] = {
43 .start = 0x11000020,
44 .end = 0x1100003f,
45 .flags = IORESOURCE_MEM
46 },
47 [1] = {
48 .start = 0x1100001c,
49 .end = 0x1100001c,
50 .flags = IORESOURCE_MEM
51 },
52 [2] = {
53 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
54 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
56 }
57};
58
59static struct platform_device capc7117_ide_device = {
60 .name = "pata_platform",
61 .num_resources = ARRAY_SIZE(capc7117_ide_resources),
62 .resource = capc7117_ide_resources,
63 .dev = {
64 .platform_data = &pata_platform_data,
65 .coherent_dma_mask = ~0 /* grumble */
66 }
67};
68
69static void __init capc7117_ide_init(void)
70{
71 platform_device_register(&capc7117_ide_device);
72}
73
74/* TI16C752 UART support */
75#define TI16C752_FLAGS (UPF_BOOT_AUTOCONF | \
76 UPF_IOREMAP | \
77 UPF_BUGGY_UART | \
78 UPF_SKIP_TEST)
79#define TI16C752_UARTCLK (22118400)
80static struct plat_serial8250_port ti16c752_platform_data[] = {
81 [0] = {
82 .mapbase = 0x14000000,
83 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)),
84 .irqflags = IRQF_TRIGGER_RISING,
85 .flags = TI16C752_FLAGS,
86 .iotype = UPIO_MEM,
87 .regshift = 1,
88 .uartclk = TI16C752_UARTCLK
89 },
90 [1] = {
91 .mapbase = 0x14000040,
92 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)),
93 .irqflags = IRQF_TRIGGER_RISING,
94 .flags = TI16C752_FLAGS,
95 .iotype = UPIO_MEM,
96 .regshift = 1,
97 .uartclk = TI16C752_UARTCLK
98 },
99 [2] = {
100 .mapbase = 0x14000080,
101 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)),
102 .irqflags = IRQF_TRIGGER_RISING,
103 .flags = TI16C752_FLAGS,
104 .iotype = UPIO_MEM,
105 .regshift = 1,
106 .uartclk = TI16C752_UARTCLK
107 },
108 [3] = {
109 .mapbase = 0x140000c0,
110 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)),
111 .irqflags = IRQF_TRIGGER_RISING,
112 .flags = TI16C752_FLAGS,
113 .iotype = UPIO_MEM,
114 .regshift = 1,
115 .uartclk = TI16C752_UARTCLK
116 },
117 [4] = {
118 /* end of array */
119 }
120};
121
122static struct platform_device ti16c752_device = {
123 .name = "serial8250",
124 .id = PLAT8250_DEV_PLATFORM,
125 .dev = {
126 .platform_data = ti16c752_platform_data
127 }
128};
129
130static void __init capc7117_uarts_init(void)
131{
132 platform_device_register(&ti16c752_device);
133}
134
135static void __init capc7117_init(void)
136{
137 /* Init CoM */
138 mxm_8x10_barebones_init();
139
140 /* Init evaluation board peripherals */
141 mxm_8x10_ac97_init();
142 mxm_8x10_usb_host_init();
143 mxm_8x10_mmc_init();
144
145 capc7117_uarts_init();
146 capc7117_ide_init();
147}
148
149MACHINE_START(CAPC7117,
150 "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
151 .phys_io = 0x40000000,
152 .boot_params = 0xa0000100,
153 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
154 .map_io = pxa_map_io,
155 .init_irq = pxa3xx_init_irq,
156 .timer = &pxa_timer,
157 .init_machine = capc7117_init
158MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index 253fd76142d6..f1a7703d771b 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -50,26 +50,7 @@ static unsigned long cmx255_pin_config[] = {
50 GPIO47_STUART_TXD, 50 GPIO47_STUART_TXD,
51 51
52 /* LCD */ 52 /* LCD */
53 GPIO58_LCD_LDD_0, 53 GPIOxx_LCD_TFT_16BPP,
54 GPIO59_LCD_LDD_1,
55 GPIO60_LCD_LDD_2,
56 GPIO61_LCD_LDD_3,
57 GPIO62_LCD_LDD_4,
58 GPIO63_LCD_LDD_5,
59 GPIO64_LCD_LDD_6,
60 GPIO65_LCD_LDD_7,
61 GPIO66_LCD_LDD_8,
62 GPIO67_LCD_LDD_9,
63 GPIO68_LCD_LDD_10,
64 GPIO69_LCD_LDD_11,
65 GPIO70_LCD_LDD_12,
66 GPIO71_LCD_LDD_13,
67 GPIO72_LCD_LDD_14,
68 GPIO73_LCD_LDD_15,
69 GPIO74_LCD_FCLK,
70 GPIO75_LCD_LCLK,
71 GPIO76_LCD_PCLK,
72 GPIO77_LCD_BIAS,
73 54
74 /* SSP1 */ 55 /* SSP1 */
75 GPIO23_SSP1_SCLK, 56 GPIO23_SSP1_SCLK,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index eea78b6c2bc5..a9926bb75922 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -71,26 +71,7 @@ static unsigned long cmx270_pin_config[] = {
71 GPIO111_MMC_DAT_3, 71 GPIO111_MMC_DAT_3,
72 72
73 /* LCD */ 73 /* LCD */
74 GPIO58_LCD_LDD_0, 74 GPIOxx_LCD_TFT_16BPP,
75 GPIO59_LCD_LDD_1,
76 GPIO60_LCD_LDD_2,
77 GPIO61_LCD_LDD_3,
78 GPIO62_LCD_LDD_4,
79 GPIO63_LCD_LDD_5,
80 GPIO64_LCD_LDD_6,
81 GPIO65_LCD_LDD_7,
82 GPIO66_LCD_LDD_8,
83 GPIO67_LCD_LDD_9,
84 GPIO68_LCD_LDD_10,
85 GPIO69_LCD_LDD_11,
86 GPIO70_LCD_LDD_12,
87 GPIO71_LCD_LDD_13,
88 GPIO72_LCD_LDD_14,
89 GPIO73_LCD_LDD_15,
90 GPIO74_LCD_FCLK,
91 GPIO75_LCD_LCLK,
92 GPIO76_LCD_PCLK,
93 GPIO77_LCD_BIAS,
94 75
95 /* I2C */ 76 /* I2C */
96 GPIO117_I2C_SCL, 77 GPIO117_I2C_SCL,
@@ -195,33 +176,57 @@ static struct resource cmx270_2700G_resource[] = {
195 }, 176 },
196}; 177};
197 178
198static unsigned long save_lcd_regs[10]; 179static unsigned long cmx270_marathon_on[] = {
180 GPIO58_GPIO,
181 GPIO59_GPIO,
182 GPIO60_GPIO,
183 GPIO61_GPIO,
184 GPIO62_GPIO,
185 GPIO63_GPIO,
186 GPIO64_GPIO,
187 GPIO65_GPIO,
188 GPIO66_GPIO,
189 GPIO67_GPIO,
190 GPIO68_GPIO,
191 GPIO69_GPIO,
192 GPIO70_GPIO,
193 GPIO71_GPIO,
194 GPIO72_GPIO,
195 GPIO73_GPIO,
196 GPIO74_GPIO,
197 GPIO75_GPIO,
198 GPIO76_GPIO,
199 GPIO77_GPIO,
200};
201
202static unsigned long cmx270_marathon_off[] = {
203 GPIOxx_LCD_TFT_16BPP,
204};
199 205
200static int cmx270_marathon_probe(struct fb_info *fb) 206static int cmx270_marathon_probe(struct fb_info *fb)
201{ 207{
202 /* save PXA-270 pin settings before enabling 2700G */ 208 int gpio, err;
203 save_lcd_regs[0] = GPDR1; 209
204 save_lcd_regs[1] = GPDR2; 210 for (gpio = 58; gpio <= 77; gpio++) {
205 save_lcd_regs[2] = GAFR1_U; 211 err = gpio_request(gpio, "LCD");
206 save_lcd_regs[3] = GAFR2_L; 212 if (err)
207 save_lcd_regs[4] = GAFR2_U; 213 return err;
208 214 gpio_direction_input(gpio);
209 /* Disable PXA-270 on-chip controller driving pins */ 215 }
210 GPDR1 &= ~(0xfc000000); 216
211 GPDR2 &= ~(0x00c03fff); 217 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_on));
212 GAFR1_U &= ~(0xfff00000);
213 GAFR2_L &= ~(0x0fffffff);
214 GAFR2_U &= ~(0x0000f000);
215 return 0; 218 return 0;
216} 219}
217 220
218static int cmx270_marathon_remove(struct fb_info *fb) 221static int cmx270_marathon_remove(struct fb_info *fb)
219{ 222{
220 GPDR1 = save_lcd_regs[0]; 223 int gpio;
221 GPDR2 = save_lcd_regs[1]; 224
222 GAFR1_U = save_lcd_regs[2]; 225 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_off));
223 GAFR2_L = save_lcd_regs[3]; 226
224 GAFR2_U = save_lcd_regs[4]; 227 for (gpio = 58; gpio <= 77; gpio++)
228 gpio_free(gpio);
229
225 return 0; 230 return 0;
226} 231}
227 232
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 7873fa3d8fa4..161fc2d61207 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size,
59static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 59static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
60{ 60{
61 /* clear our parent irq */ 61 /* clear our parent irq */
62 GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio); 62 desc->chip->ack(irq);
63 63
64 it8152_irq_demux(irq, desc); 64 it8152_irq_demux(irq, desc);
65} 65}
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
index a5ee70735e04..1d9bc118ee32 100644
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ b/arch/arm/mach-pxa/corgi_ssp.c
@@ -204,7 +204,7 @@ void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
204 ssp_machinfo = machinfo; 204 ssp_machinfo = machinfo;
205} 205}
206 206
207static int __init corgi_ssp_probe(struct platform_device *dev) 207static int __devinit corgi_ssp_probe(struct platform_device *dev)
208{ 208{
209 int ret; 209 int ret;
210 210
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 94b23a9e3877..d578021d1a10 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -134,6 +134,12 @@ static unsigned long e740_pin_config[] __initdata = {
134 /* IrDA */ 134 /* IrDA */
135 GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, 135 GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
136 136
137 /* AC97 */
138 GPIO28_AC97_BITCLK,
139 GPIO29_AC97_SDATA_IN_0,
140 GPIO30_AC97_SDATA_OUT,
141 GPIO31_AC97_SYNC,
142
137 /* Audio power control */ 143 /* Audio power control */
138 GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */ 144 GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */
139 GPIO40_GPIO, /* Mic amp power */ 145 GPIO40_GPIO, /* Mic amp power */
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 5eccbce73a33..af83caa52dd4 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -132,6 +132,12 @@ static unsigned long e750_pin_config[] __initdata = {
132 /* IrDA */ 132 /* IrDA */
133 GPIO38_GPIO | MFP_LPM_DRIVE_HIGH, 133 GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
134 134
135 /* AC97 */
136 GPIO28_AC97_BITCLK,
137 GPIO29_AC97_SDATA_IN_0,
138 GPIO30_AC97_SDATA_OUT,
139 GPIO31_AC97_SYNC,
140
135 /* Audio power control */ 141 /* Audio power control */
136 GPIO4_GPIO, /* Headphone amp power */ 142 GPIO4_GPIO, /* Headphone amp power */
137 GPIO7_GPIO, /* Speaker amp power */ 143 GPIO7_GPIO, /* Speaker amp power */
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
index aad129bed199..8ea97bf53fe1 100644
--- a/arch/arm/mach-pxa/e800.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -35,6 +35,14 @@
35 35
36/* ------------------------ e800 LCD definitions ------------------------- */ 36/* ------------------------ e800 LCD definitions ------------------------- */
37 37
38static unsigned long e800_pin_config[] __initdata = {
39 /* AC97 */
40 GPIO28_AC97_BITCLK,
41 GPIO29_AC97_SDATA_IN_0,
42 GPIO30_AC97_SDATA_OUT,
43 GPIO31_AC97_SYNC,
44};
45
38static struct w100_gen_regs e800_lcd_regs = { 46static struct w100_gen_regs e800_lcd_regs = {
39 .lcd_format = 0x00008003, 47 .lcd_format = 0x00008003,
40 .lcdd_cntl1 = 0x02a00000, 48 .lcdd_cntl1 = 0x02a00000,
@@ -195,6 +203,7 @@ static struct platform_device *devices[] __initdata = {
195 203
196static void __init e800_init(void) 204static void __init e800_init(void)
197{ 205{
206 pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
198 pxa_set_ffuart_info(NULL); 207 pxa_set_ffuart_info(NULL);
199 pxa_set_btuart_info(NULL); 208 pxa_set_btuart_info(NULL);
200 pxa_set_stuart_info(NULL); 209 pxa_set_stuart_info(NULL);
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index c8a01bc85fde..aab04f33e49b 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -109,26 +109,7 @@ static unsigned long common_pin_config[] = {
109 GPIO111_MMC_DAT_3, 109 GPIO111_MMC_DAT_3,
110 110
111 /* LCD */ 111 /* LCD */
112 GPIO58_LCD_LDD_0, 112 GPIOxx_LCD_TFT_16BPP,
113 GPIO59_LCD_LDD_1,
114 GPIO60_LCD_LDD_2,
115 GPIO61_LCD_LDD_3,
116 GPIO62_LCD_LDD_4,
117 GPIO63_LCD_LDD_5,
118 GPIO64_LCD_LDD_6,
119 GPIO65_LCD_LDD_7,
120 GPIO66_LCD_LDD_8,
121 GPIO67_LCD_LDD_9,
122 GPIO68_LCD_LDD_10,
123 GPIO69_LCD_LDD_11,
124 GPIO70_LCD_LDD_12,
125 GPIO71_LCD_LDD_13,
126 GPIO72_LCD_LDD_14,
127 GPIO73_LCD_LDD_15,
128 GPIO74_LCD_FCLK,
129 GPIO75_LCD_LCLK,
130 GPIO76_LCD_PCLK,
131 GPIO77_LCD_BIAS,
132 113
133 /* QCI */ 114 /* QCI */
134 GPIO84_CIF_FV, 115 GPIO84_CIF_FV,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
new file mode 100644
index 000000000000..771137fc1a82
--- /dev/null
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -0,0 +1,202 @@
1/*
2 * linux/arch/arm/mach-pxa/icontrol.c
3 *
4 * Support for the iControl and SafeTcam platforms from TMT Services
5 * using the Embedian MXM-8x10 Computer on Module
6 *
7 * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
8 *
9 * 2010-01-21 Hennie van der Merve <hvdmerwe@tmtservies.co.za>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/irq.h>
17#include <linux/platform_device.h>
18#include <linux/gpio.h>
19
20#include <asm/mach-types.h>
21#include <asm/mach/arch.h>
22
23#include <mach/pxa320.h>
24#include <mach/mxm8x10.h>
25
26#include <linux/spi/spi.h>
27#include <mach/pxa2xx_spi.h>
28#include <linux/can/platform/mcp251x.h>
29
30#include "generic.h"
31
32#define ICONTROL_MCP251x_nCS1 (15)
33#define ICONTROL_MCP251x_nCS2 (16)
34#define ICONTROL_MCP251x_nCS3 (17)
35#define ICONTROL_MCP251x_nCS4 (24)
36
37#define ICONTROL_MCP251x_nIRQ1 (74)
38#define ICONTROL_MCP251x_nIRQ2 (75)
39#define ICONTROL_MCP251x_nIRQ3 (76)
40#define ICONTROL_MCP251x_nIRQ4 (77)
41
42static struct pxa2xx_spi_chip mcp251x_chip_info1 = {
43 .tx_threshold = 8,
44 .rx_threshold = 128,
45 .dma_burst_size = 8,
46 .timeout = 235,
47 .gpio_cs = ICONTROL_MCP251x_nCS1
48};
49
50static struct pxa2xx_spi_chip mcp251x_chip_info2 = {
51 .tx_threshold = 8,
52 .rx_threshold = 128,
53 .dma_burst_size = 8,
54 .timeout = 235,
55 .gpio_cs = ICONTROL_MCP251x_nCS2
56};
57
58static struct pxa2xx_spi_chip mcp251x_chip_info3 = {
59 .tx_threshold = 8,
60 .rx_threshold = 128,
61 .dma_burst_size = 8,
62 .timeout = 235,
63 .gpio_cs = ICONTROL_MCP251x_nCS3
64};
65
66static struct pxa2xx_spi_chip mcp251x_chip_info4 = {
67 .tx_threshold = 8,
68 .rx_threshold = 128,
69 .dma_burst_size = 8,
70 .timeout = 235,
71 .gpio_cs = ICONTROL_MCP251x_nCS4
72};
73
74static struct mcp251x_platform_data mcp251x_info = {
75 .oscillator_frequency = 16E6,
76 .model = CAN_MCP251X_MCP2515,
77 .board_specific_setup = NULL,
78 .power_enable = NULL,
79 .transceiver_enable = NULL
80};
81
82static struct spi_board_info mcp251x_board_info[] = {
83 {
84 .modalias = "mcp251x",
85 .max_speed_hz = 6500000,
86 .bus_num = 3,
87 .chip_select = 0,
88 .platform_data = &mcp251x_info,
89 .controller_data = &mcp251x_chip_info1,
90 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ1)
91 },
92 {
93 .modalias = "mcp251x",
94 .max_speed_hz = 6500000,
95 .bus_num = 3,
96 .chip_select = 1,
97 .platform_data = &mcp251x_info,
98 .controller_data = &mcp251x_chip_info2,
99 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ2)
100 },
101 {
102 .modalias = "mcp251x",
103 .max_speed_hz = 6500000,
104 .bus_num = 4,
105 .chip_select = 0,
106 .platform_data = &mcp251x_info,
107 .controller_data = &mcp251x_chip_info3,
108 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ3)
109 },
110 {
111 .modalias = "mcp251x",
112 .max_speed_hz = 6500000,
113 .bus_num = 4,
114 .chip_select = 1,
115 .platform_data = &mcp251x_info,
116 .controller_data = &mcp251x_chip_info4,
117 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4)
118 }
119};
120
121static struct pxa2xx_spi_master pxa_ssp3_spi_master_info = {
122 .clock_enable = CKEN_SSP3,
123 .num_chipselect = 2,
124 .enable_dma = 1
125};
126
127static struct pxa2xx_spi_master pxa_ssp4_spi_master_info = {
128 .clock_enable = CKEN_SSP4,
129 .num_chipselect = 2,
130 .enable_dma = 1
131};
132
133struct platform_device pxa_spi_ssp3 = {
134 .name = "pxa2xx-spi",
135 .id = 3,
136 .dev = {
137 .platform_data = &pxa_ssp3_spi_master_info,
138 }
139};
140
141struct platform_device pxa_spi_ssp4 = {
142 .name = "pxa2xx-spi",
143 .id = 4,
144 .dev = {
145 .platform_data = &pxa_ssp4_spi_master_info,
146 }
147};
148
149static struct platform_device *icontrol_spi_devices[] __initdata = {
150 &pxa_spi_ssp3,
151 &pxa_spi_ssp4,
152};
153
154static mfp_cfg_t mfp_can_cfg[] __initdata = {
155 /* CAN CS lines */
156 GPIO15_GPIO,
157 GPIO16_GPIO,
158 GPIO17_GPIO,
159 GPIO24_GPIO,
160
161 /* SPI (SSP3) lines */
162 GPIO89_SSP3_SCLK,
163 GPIO91_SSP3_TXD,
164 GPIO92_SSP3_RXD,
165
166 /* SPI (SSP4) lines */
167 GPIO93_SSP4_SCLK,
168 GPIO95_SSP4_TXD,
169 GPIO96_SSP4_RXD,
170
171 /* CAN nIRQ lines */
172 GPIO74_GPIO | MFP_LPM_EDGE_RISE,
173 GPIO75_GPIO | MFP_LPM_EDGE_RISE,
174 GPIO76_GPIO | MFP_LPM_EDGE_RISE,
175 GPIO77_GPIO | MFP_LPM_EDGE_RISE
176};
177
178static void __init icontrol_can_init(void)
179{
180 pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_can_cfg));
181 platform_add_devices(ARRAY_AND_SIZE(icontrol_spi_devices));
182 spi_register_board_info(ARRAY_AND_SIZE(mcp251x_board_info));
183}
184
185static void __init icontrol_init(void)
186{
187 mxm_8x10_barebones_init();
188 mxm_8x10_usb_host_init();
189 mxm_8x10_mmc_init();
190
191 icontrol_can_init();
192}
193
194MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
195 .phys_io = 0x40000000,
196 .boot_params = 0xa0000100,
197 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
198 .map_io = pxa_map_io,
199 .init_irq = pxa3xx_init_irq,
200 .timer = &pxa_timer,
201 .init_machine = icontrol_init
202MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 5c9e11d74f49..bc78c4dc0c66 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -47,25 +47,7 @@
47 47
48static unsigned long idp_pin_config[] __initdata = { 48static unsigned long idp_pin_config[] __initdata = {
49 /* LCD */ 49 /* LCD */
50 GPIO58_LCD_LDD_0, 50 GPIOxx_LCD_DSTN_16BPP,
51 GPIO59_LCD_LDD_1,
52 GPIO60_LCD_LDD_2,
53 GPIO61_LCD_LDD_3,
54 GPIO62_LCD_LDD_4,
55 GPIO63_LCD_LDD_5,
56 GPIO64_LCD_LDD_6,
57 GPIO65_LCD_LDD_7,
58 GPIO66_LCD_LDD_8,
59 GPIO67_LCD_LDD_9,
60 GPIO68_LCD_LDD_10,
61 GPIO69_LCD_LDD_11,
62 GPIO70_LCD_LDD_12,
63 GPIO71_LCD_LDD_13,
64 GPIO72_LCD_LDD_14,
65 GPIO73_LCD_LDD_15,
66 GPIO74_LCD_FCLK,
67 GPIO75_LCD_LCLK,
68 GPIO76_LCD_PCLK,
69 51
70 /* BTUART */ 52 /* BTUART */
71 GPIO42_BTUART_RXD, 53 GPIO42_BTUART_RXD,
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 5b0862df61ab..b2f878bd460b 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -64,7 +64,6 @@ static unsigned long imote2_pin_config[] __initdata = {
64 GPIO116_GPIO, /* CC_CCA */ 64 GPIO116_GPIO, /* CC_CCA */
65 GPIO0_GPIO, /* CC_FIFOP */ 65 GPIO0_GPIO, /* CC_FIFOP */
66 GPIO16_GPIO, /* CCSFD */ 66 GPIO16_GPIO, /* CCSFD */
67 GPIO39_GPIO, /* CSn */
68 GPIO115_GPIO, /* Power enable */ 67 GPIO115_GPIO, /* Power enable */
69 68
70 /* I2C */ 69 /* I2C */
@@ -72,7 +71,7 @@ static unsigned long imote2_pin_config[] __initdata = {
72 GPIO118_I2C_SDA, 71 GPIO118_I2C_SDA,
73 72
74 /* SSP 3 - 802.15.4 radio */ 73 /* SSP 3 - 802.15.4 radio */
75 GPIO39_GPIO, /* Chip Select */ 74 GPIO39_GPIO, /* Chip Select */
76 GPIO34_SSP3_SCLK, 75 GPIO34_SSP3_SCLK,
77 GPIO35_SSP3_TXD, 76 GPIO35_SSP3_TXD,
78 GPIO41_SSP3_RXD, 77 GPIO41_SSP3_RXD,
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index bfec09b1814b..1a741065045f 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -129,6 +129,16 @@ enum balloon3_features {
129#define CPLD_AROUTING_LOONR2INT_BIT 6 129#define CPLD_AROUTING_LOONR2INT_BIT 6
130#define CPLD_AROUTING_LOONR2EXT_BIT 7 130#define CPLD_AROUTING_LOONR2EXT_BIT 7
131 131
132/* Balloon3 Interrupts */
133#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
134
135#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
136#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
137
138#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
139#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
140#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
141
132extern int balloon3_has(enum balloon3_features feature); 142extern int balloon3_has(enum balloon3_features feature);
133 143
134#endif 144#endif
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index e741bf1bfb2d..7515757d6911 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -314,7 +314,6 @@ extern unsigned long get_clock_tick_rate(void);
314#define PCIBIOS_MIN_IO 0 314#define PCIBIOS_MIN_IO 0
315#define PCIBIOS_MIN_MEM 0 315#define PCIBIOS_MIN_MEM 0
316#define pcibios_assign_all_busses() 1 316#define pcibios_assign_all_busses() 1
317#define HAVE_ARCH_PCI_SET_DMA_MASK 1
318#endif 317#endif
319 318
320 319
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 3677a9af9c87..ffc8314520f2 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -135,82 +135,6 @@
135#define IRQ_BOARD_END (IRQ_BOARD_START + 16) 135#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
136#endif 136#endif
137 137
138#define IRQ_SA1111_START (IRQ_BOARD_END)
139#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
140#define IRQ_GPAIN1 (IRQ_BOARD_END + 1)
141#define IRQ_GPAIN2 (IRQ_BOARD_END + 2)
142#define IRQ_GPAIN3 (IRQ_BOARD_END + 3)
143#define IRQ_GPBIN0 (IRQ_BOARD_END + 4)
144#define IRQ_GPBIN1 (IRQ_BOARD_END + 5)
145#define IRQ_GPBIN2 (IRQ_BOARD_END + 6)
146#define IRQ_GPBIN3 (IRQ_BOARD_END + 7)
147#define IRQ_GPBIN4 (IRQ_BOARD_END + 8)
148#define IRQ_GPBIN5 (IRQ_BOARD_END + 9)
149#define IRQ_GPCIN0 (IRQ_BOARD_END + 10)
150#define IRQ_GPCIN1 (IRQ_BOARD_END + 11)
151#define IRQ_GPCIN2 (IRQ_BOARD_END + 12)
152#define IRQ_GPCIN3 (IRQ_BOARD_END + 13)
153#define IRQ_GPCIN4 (IRQ_BOARD_END + 14)
154#define IRQ_GPCIN5 (IRQ_BOARD_END + 15)
155#define IRQ_GPCIN6 (IRQ_BOARD_END + 16)
156#define IRQ_GPCIN7 (IRQ_BOARD_END + 17)
157#define IRQ_MSTXINT (IRQ_BOARD_END + 18)
158#define IRQ_MSRXINT (IRQ_BOARD_END + 19)
159#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20)
160#define IRQ_TPTXINT (IRQ_BOARD_END + 21)
161#define IRQ_TPRXINT (IRQ_BOARD_END + 22)
162#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23)
163#define SSPXMTINT (IRQ_BOARD_END + 24)
164#define SSPRCVINT (IRQ_BOARD_END + 25)
165#define SSPROR (IRQ_BOARD_END + 26)
166#define AUDXMTDMADONEA (IRQ_BOARD_END + 32)
167#define AUDRCVDMADONEA (IRQ_BOARD_END + 33)
168#define AUDXMTDMADONEB (IRQ_BOARD_END + 34)
169#define AUDRCVDMADONEB (IRQ_BOARD_END + 35)
170#define AUDTFSR (IRQ_BOARD_END + 36)
171#define AUDRFSR (IRQ_BOARD_END + 37)
172#define AUDTUR (IRQ_BOARD_END + 38)
173#define AUDROR (IRQ_BOARD_END + 39)
174#define AUDDTS (IRQ_BOARD_END + 40)
175#define AUDRDD (IRQ_BOARD_END + 41)
176#define AUDSTO (IRQ_BOARD_END + 42)
177#define IRQ_USBPWR (IRQ_BOARD_END + 43)
178#define IRQ_HCIM (IRQ_BOARD_END + 44)
179#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45)
180#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46)
181#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47)
182#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48)
183#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49)
184#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50)
185#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51)
186#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52)
187#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53)
188#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54)
189
190#define IRQ_LOCOMO_START (IRQ_BOARD_END)
191#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0)
192#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1)
193#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2)
194#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3)
195#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4)
196#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5)
197#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6)
198#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7)
199#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8)
200#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9)
201#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10)
202#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11)
203#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12)
204#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13)
205#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14)
206#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15)
207#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16)
208#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
209#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
210#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
211#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20)
212#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
213
214/* 138/*
215 * Figure out the MAX IRQ number. 139 * Figure out the MAX IRQ number.
216 * 140 *
@@ -219,89 +143,16 @@
219 * Otherwise, we have the standard IRQs only. 143 * Otherwise, we have the standard IRQs only.
220 */ 144 */
221#ifdef CONFIG_SA1111 145#ifdef CONFIG_SA1111
222#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) 146#define NR_IRQS (IRQ_BOARD_END + 55)
223#elif defined(CONFIG_SHARP_LOCOMO)
224#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
225#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) 147#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
226#define NR_IRQS (IRQ_BOARD_END) 148#define NR_IRQS (IRQ_BOARD_END)
227#else 149#else
228#define NR_IRQS (IRQ_BOARD_START) 150#define NR_IRQS (IRQ_BOARD_START)
229#endif 151#endif
230 152
231/*
232 * Board specific IRQs. Define them here.
233 * Do not surround them with ifdefs.
234 */
235#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x))
236#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0)
237#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1)
238#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */
239#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3)
240#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4)
241#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5)
242#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
243#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
244
245#define LPD270_IRQ(x) (IRQ_BOARD_START + (x))
246#define LPD270_USBC_IRQ LPD270_IRQ(2)
247#define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
248#define LPD270_AC97_IRQ LPD270_IRQ(4)
249
250#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x))
251#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0)
252#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1)
253#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2)
254#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3)
255#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4)
256#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5)
257#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6)
258#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7)
259#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9)
260#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
261#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11)
262#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13)
263#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
264#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
265
266/* Balloon3 Interrupts */
267#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
268
269#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
270#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
271
272#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
273#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
274#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
275
276/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
277#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0)
278#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)
279#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2)
280#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3)
281
282/* phyCORE-PXA270 (PCM027) Interrupts */
283#define PCM027_IRQ(x) (IRQ_BOARD_START + (x))
284#define PCM027_BTDET_IRQ PCM027_IRQ(0)
285#define PCM027_FF_RI_IRQ PCM027_IRQ(1)
286#define PCM027_MMCDET_IRQ PCM027_IRQ(2)
287#define PCM027_PM_5V_IRQ PCM027_IRQ(3)
288
289/* ITE8152 irqs */
290/* add IT8152 IRQs beyond BOARD_END */ 153/* add IT8152 IRQs beyond BOARD_END */
291#ifdef CONFIG_PCI_HOST_ITE8152 154#ifdef CONFIG_PCI_HOST_ITE8152
292#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) 155#define IT8152_LAST_IRQ (IRQ_BOARD_END + 40)
293
294/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
295#define IT8152_LD_IRQ_COUNT 9
296#define IT8152_LP_IRQ_COUNT 16
297#define IT8152_PD_IRQ_COUNT 15
298
299/* Priorities: */
300#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
301#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
302#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
303
304#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
305 156
306#if NR_IRQS < (IT8152_LAST_IRQ+1) 157#if NR_IRQS < (IT8152_LAST_IRQ+1)
307#undef NR_IRQS 158#undef NR_IRQS
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index f89fb715266b..0e6440c81683 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -34,5 +34,9 @@
34#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ 34#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */
35#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */ 35#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */
36 36
37#define LPD270_IRQ(x) (IRQ_BOARD_START + (x))
38#define LPD270_USBC_IRQ LPD270_IRQ(2)
39#define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
40#define LPD270_AC97_IRQ LPD270_IRQ(4)
37 41
38#endif 42#endif
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h
index 751b74811d0f..a0d4247f08fc 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -34,6 +34,17 @@
34#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0) 34#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0)
35#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100) 35#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100)
36 36
37/* Board specific IRQs */
38#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x))
39#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0)
40#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1)
41#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */
42#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3)
43#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4)
44#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5)
45#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
46#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
47
37#ifndef __ASSEMBLY__ 48#ifndef __ASSEMBLY__
38extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set); 49extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set);
39#endif 50#endif
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h
index 3461c4302ff4..86e623abd64d 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/include/mach/mainstone.h
@@ -117,4 +117,21 @@
117#define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ 117#define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */
118#define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ 118#define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */
119 119
120/* board specific IRQs */
121#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x))
122#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0)
123#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1)
124#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2)
125#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3)
126#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4)
127#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5)
128#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6)
129#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7)
130#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9)
131#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
132#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11)
133#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13)
134#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
135#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
136
120#endif 137#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 9c787855cf24..cafadc33dfd8 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -190,4 +190,36 @@
190#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH) 190#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
191#endif /* CONFIG_CPU_PXA26x */ 191#endif /* CONFIG_CPU_PXA26x */
192 192
193/* commonly used pin configurations */
194#define GPIOxx_LCD_16BPP \
195 GPIO58_LCD_LDD_0, \
196 GPIO59_LCD_LDD_1, \
197 GPIO60_LCD_LDD_2, \
198 GPIO61_LCD_LDD_3, \
199 GPIO62_LCD_LDD_4, \
200 GPIO63_LCD_LDD_5, \
201 GPIO64_LCD_LDD_6, \
202 GPIO65_LCD_LDD_7, \
203 GPIO66_LCD_LDD_8, \
204 GPIO67_LCD_LDD_9, \
205 GPIO68_LCD_LDD_10, \
206 GPIO69_LCD_LDD_11, \
207 GPIO70_LCD_LDD_12, \
208 GPIO71_LCD_LDD_13, \
209 GPIO72_LCD_LDD_14, \
210 GPIO73_LCD_LDD_15
211
212#define GPIOxx_LCD_DSTN_16BPP \
213 GPIOxx_LCD_16BPP, \
214 GPIO74_LCD_FCLK, \
215 GPIO75_LCD_LCLK, \
216 GPIO76_LCD_PCLK
217
218#define GPIOxx_LCD_TFT_16BPP \
219 GPIOxx_LCD_16BPP, \
220 GPIO74_LCD_FCLK, \
221 GPIO75_LCD_LCLK, \
222 GPIO76_LCD_PCLK, \
223 GPIO77_LCD_BIAS
224
193#endif /* __ASM_ARCH_MFP_PXA25X_H */ 225#endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index 6543c05f47ed..ec0f0b0b6744 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -434,5 +434,32 @@
434#define GPIO112_nMSINS MFP_CFG_IN(GPIO112, AF2) 434#define GPIO112_nMSINS MFP_CFG_IN(GPIO112, AF2)
435#define GPIO32_MSSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW) 435#define GPIO32_MSSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
436 436
437/* commonly used pin configurations */
438#define GPIOxx_LCD_16BPP \
439 GPIO58_LCD_LDD_0, \
440 GPIO59_LCD_LDD_1, \
441 GPIO60_LCD_LDD_2, \
442 GPIO61_LCD_LDD_3, \
443 GPIO62_LCD_LDD_4, \
444 GPIO63_LCD_LDD_5, \
445 GPIO64_LCD_LDD_6, \
446 GPIO65_LCD_LDD_7, \
447 GPIO66_LCD_LDD_8, \
448 GPIO67_LCD_LDD_9, \
449 GPIO68_LCD_LDD_10, \
450 GPIO69_LCD_LDD_11, \
451 GPIO70_LCD_LDD_12, \
452 GPIO71_LCD_LDD_13, \
453 GPIO72_LCD_LDD_14, \
454 GPIO73_LCD_LDD_15
455
456#define GPIOxx_LCD_TFT_16BPP \
457 GPIOxx_LCD_16BPP, \
458 GPIO74_LCD_FCLK, \
459 GPIO75_LCD_LCLK, \
460 GPIO76_LCD_PCLK, \
461 GPIO77_LCD_BIAS
462
463
437extern int keypad_set_wake(unsigned int on); 464extern int keypad_set_wake(unsigned int on);
438#endif /* __ASM_ARCH_MFP_PXA27X_H */ 465#endif /* __ASM_ARCH_MFP_PXA27X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mxm8x10.h b/arch/arm/mach-pxa/include/mach/mxm8x10.h
new file mode 100644
index 000000000000..ffa15665a418
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mxm8x10.h
@@ -0,0 +1,21 @@
1#ifndef __MACH_MXM_8X10_H
2#define __MACH_MXM_8X10_H
3
4#define MXM_8X10_ETH_PHYS 0x13000000
5
6#if defined(CONFIG_MMC)
7
8#define MXM_8X10_SD_nCD (72)
9#define MXM_8X10_SD_WP (84)
10
11extern void mxm_8x10_mmc_init(void);
12#else
13static inline void mxm_8x10_mmc_init(void) {}
14#endif
15
16extern void mxm_8x10_usb_host_init(void);
17extern void mxm_8x10_ac97_init(void);
18
19extern void mxm_8x10_barebones_init(void);
20
21#endif /* __MACH_MXM_8X10_H */
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4dcd2e8baa61..04083263167e 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -23,6 +23,13 @@
23 * Definitions of CPU card resources only 23 * Definitions of CPU card resources only
24 */ 24 */
25 25
26/* phyCORE-PXA270 (PCM027) Interrupts */
27#define PCM027_IRQ(x) (IRQ_BOARD_START + (x))
28#define PCM027_BTDET_IRQ PCM027_IRQ(0)
29#define PCM027_FF_RI_IRQ PCM027_IRQ(1)
30#define PCM027_MMCDET_IRQ PCM027_IRQ(2)
31#define PCM027_PM_5V_IRQ PCM027_IRQ(3)
32
26/* I2C RTC */ 33/* I2C RTC */
27#define PCM027_RTC_IRQ_GPIO 0 34#define PCM027_RTC_IRQ_GPIO 0
28#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) 35#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
index cb5cb766f0f1..be1be5b6db51 100644
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ b/arch/arm/mach-pxa/include/mach/ssp.h
@@ -46,6 +46,7 @@ struct ssp_device {
46 int drcmr_tx; 46 int drcmr_tx;
47}; 47};
48 48
49#ifdef CONFIG_PXA_SSP_LEGACY
49/* 50/*
50 * SSP initialisation flags 51 * SSP initialisation flags
51 */ 52 */
@@ -78,6 +79,7 @@ void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
78int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags); 79int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
79int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); 80int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
80void ssp_exit(struct ssp_dev *dev); 81void ssp_exit(struct ssp_dev *dev);
82#endif /* CONFIG_PXA_SSP_LEGACY */
81 83
82/** 84/**
83 * ssp_write_reg - Write to a SSP register 85 * ssp_write_reg - Write to a SSP register
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 237734b5b1be..5ef91d9d17e4 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,20 +10,41 @@
10 */ 10 */
11 11
12#include <linux/serial_reg.h> 12#include <linux/serial_reg.h>
13#include <mach/regs-uart.h>
14#include <asm/mach-types.h> 13#include <asm/mach-types.h>
15 14
16#define __REG(x) ((volatile unsigned long *)x) 15#define FFUART_BASE (0x40100000)
16#define BTUART_BASE (0x40200000)
17#define STUART_BASE (0x40700000)
17 18
18static volatile unsigned long *UART = FFUART; 19static unsigned long uart_base = FFUART_BASE;
20static unsigned int uart_shift = 2;
21static unsigned int uart_is_pxa = 1;
22
23static inline unsigned char uart_read(int offset)
24{
25 return *(volatile unsigned char *)(uart_base + (offset << uart_shift));
26}
27
28static inline void uart_write(unsigned char val, int offset)
29{
30 *(volatile unsigned char *)(uart_base + (offset << uart_shift)) = val;
31}
32
33static inline int uart_is_enabled(void)
34{
35 /* assume enabled by default for non-PXA uarts */
36 return uart_is_pxa ? uart_read(UART_IER) & UART_IER_UUE : 1;
37}
19 38
20static inline void putc(char c) 39static inline void putc(char c)
21{ 40{
22 if (!(UART[UART_IER] & IER_UUE)) 41 if (!uart_is_enabled())
23 return; 42 return;
24 while (!(UART[UART_LSR] & LSR_TDRQ)) 43
44 while (!(uart_read(UART_LSR) & UART_LSR_THRE))
25 barrier(); 45 barrier();
26 UART[UART_TX] = c; 46
47 uart_write(c, UART_TX);
27} 48}
28 49
29/* 50/*
@@ -38,7 +59,13 @@ static inline void arch_decomp_setup(void)
38 if (machine_is_littleton() || machine_is_intelmote2() 59 if (machine_is_littleton() || machine_is_intelmote2()
39 || machine_is_csb726() || machine_is_stargate2() 60 || machine_is_csb726() || machine_is_stargate2()
40 || machine_is_cm_x300() || machine_is_balloon3()) 61 || machine_is_cm_x300() || machine_is_balloon3())
41 UART = STUART; 62 uart_base = STUART_BASE;
63
64 if (machine_is_arcom_zeus()) {
65 uart_base = 0x10000000; /* nCS4 */
66 uart_shift = 1;
67 uart_is_pxa = 0;
68 }
42} 69}
43 70
44/* 71/*
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index c387046d2f28..6e119976003e 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -58,6 +58,8 @@
58#define ZEUS_EXT1_GPIO(x) (ZEUS_EXT1_GPIO_BASE + (x)) 58#define ZEUS_EXT1_GPIO(x) (ZEUS_EXT1_GPIO_BASE + (x))
59#define ZEUS_USER_GPIO(x) (ZEUS_USER_GPIO_BASE + (x)) 59#define ZEUS_USER_GPIO(x) (ZEUS_USER_GPIO_BASE + (x))
60 60
61#define ZEUS_CAN_SHDN_GPIO ZEUS_EXT1_GPIO(2)
62
61/* 63/*
62 * CPLD registers: 64 * CPLD registers:
63 * Only 4 registers, but spreaded over a 32MB address space. 65 * Only 4 registers, but spreaded over a 32MB address space.
@@ -68,7 +70,6 @@
68#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) 70#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000)
69#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) 71#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000)
70#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) 72#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000)
71#define ZEUS_CPLD_EXTWDOG (ZEUS_CPLD + 0x3000)
72 73
73/* CPLD register bits */ 74/* CPLD register bits */
74#define ZEUS_CPLD_CONTROL_CF_RST 0x01 75#define ZEUS_CPLD_CONTROL_CF_RST 0x01
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1373c22dbb83..d279507fc748 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -83,6 +83,10 @@ static unsigned long lpd270_pin_config[] __initdata = {
83 GPIO89_USBH1_PEN, 83 GPIO89_USBH1_PEN,
84 84
85 /* AC97 */ 85 /* AC97 */
86 GPIO28_AC97_BITCLK,
87 GPIO29_AC97_SDATA_IN_0,
88 GPIO30_AC97_SDATA_OUT,
89 GPIO31_AC97_SYNC,
86 GPIO45_AC97_SYSCLK, 90 GPIO45_AC97_SYSCLK,
87 91
88 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, 92 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
@@ -121,7 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
121 125
122 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; 126 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
123 do { 127 do {
124 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ 128 desc->chip->ack(irq); /* clear useless edge notification */
125 if (likely(pending)) { 129 if (likely(pending)) {
126 irq = LPD270_IRQ(0) + __ffs(pending); 130 irq = LPD270_IRQ(0) + __ffs(pending);
127 generic_handle_irq(irq); 131 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 98ee7e590299..63d65a2a0387 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -66,26 +66,14 @@ static unsigned long lubbock_pin_config[] __initdata = {
66 GPIO25_SSP1_TXD, 66 GPIO25_SSP1_TXD,
67 GPIO26_SSP1_RXD, 67 GPIO26_SSP1_RXD,
68 68
69 /* AC97 */
70 GPIO28_AC97_BITCLK,
71 GPIO29_AC97_SDATA_IN_0,
72 GPIO30_AC97_SDATA_OUT,
73 GPIO31_AC97_SYNC,
74
69 /* LCD - 16bpp DSTN */ 75 /* LCD - 16bpp DSTN */
70 GPIO58_LCD_LDD_0, 76 GPIOxx_LCD_DSTN_16BPP,
71 GPIO59_LCD_LDD_1,
72 GPIO60_LCD_LDD_2,
73 GPIO61_LCD_LDD_3,
74 GPIO62_LCD_LDD_4,
75 GPIO63_LCD_LDD_5,
76 GPIO64_LCD_LDD_6,
77 GPIO65_LCD_LDD_7,
78 GPIO66_LCD_LDD_8,
79 GPIO67_LCD_LDD_9,
80 GPIO68_LCD_LDD_10,
81 GPIO69_LCD_LDD_11,
82 GPIO70_LCD_LDD_12,
83 GPIO71_LCD_LDD_13,
84 GPIO72_LCD_LDD_14,
85 GPIO73_LCD_LDD_15,
86 GPIO74_LCD_FCLK,
87 GPIO75_LCD_LCLK,
88 GPIO76_LCD_PCLK,
89 77
90 /* BTUART */ 78 /* BTUART */
91 GPIO42_BTUART_RXD, 79 GPIO42_BTUART_RXD,
@@ -158,7 +146,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
158{ 146{
159 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; 147 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
160 do { 148 do {
161 GEDR(0) = GPIO_bit(0); /* clear our parent irq */ 149 desc->chip->ack(irq); /* clear our parent irq */
162 if (likely(pending)) { 150 if (likely(pending)) {
163 irq = LUBBOCK_IRQ(0) + __ffs(pending); 151 irq = LUBBOCK_IRQ(0) + __ffs(pending);
164 generic_handle_irq(irq); 152 generic_handle_irq(irq);
@@ -240,11 +228,18 @@ static struct resource sa1111_resources[] = {
240 }, 228 },
241}; 229};
242 230
231static struct sa1111_platform_data sa1111_info = {
232 .irq_base = IRQ_BOARD_END,
233};
234
243static struct platform_device sa1111_device = { 235static struct platform_device sa1111_device = {
244 .name = "sa1111", 236 .name = "sa1111",
245 .id = -1, 237 .id = -1,
246 .num_resources = ARRAY_SIZE(sa1111_resources), 238 .num_resources = ARRAY_SIZE(sa1111_resources),
247 .resource = sa1111_resources, 239 .resource = sa1111_resources,
240 .dev = {
241 .platform_data = &sa1111_info,
242 },
248}; 243};
249 244
250/* ADS7846 is connected through SSP ... and if your board has J5 populated, 245/* ADS7846 is connected through SSP ... and if your board has J5 populated,
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 189f330719a2..e81dd0c8e40d 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -88,26 +88,7 @@ static unsigned long magician_pin_config[] __initdata = {
88 GPIO112_MMC_CMD, 88 GPIO112_MMC_CMD,
89 89
90 /* LCD */ 90 /* LCD */
91 GPIO58_LCD_LDD_0, 91 GPIOxx_LCD_TFT_16BPP,
92 GPIO59_LCD_LDD_1,
93 GPIO60_LCD_LDD_2,
94 GPIO61_LCD_LDD_3,
95 GPIO62_LCD_LDD_4,
96 GPIO63_LCD_LDD_5,
97 GPIO64_LCD_LDD_6,
98 GPIO65_LCD_LDD_7,
99 GPIO66_LCD_LDD_8,
100 GPIO67_LCD_LDD_9,
101 GPIO68_LCD_LDD_10,
102 GPIO69_LCD_LDD_11,
103 GPIO70_LCD_LDD_12,
104 GPIO71_LCD_LDD_13,
105 GPIO72_LCD_LDD_14,
106 GPIO73_LCD_LDD_15,
107 GPIO74_LCD_FCLK,
108 GPIO75_LCD_LCLK,
109 GPIO76_LCD_PCLK,
110 GPIO77_LCD_BIAS,
111 92
112 /* QCI */ 93 /* QCI */
113 GPIO12_CIF_DD_7, 94 GPIO12_CIF_DD_7,
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 851ee0fc32e2..5543c64da9ef 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -60,26 +60,7 @@ static unsigned long mainstone_pin_config[] = {
60 GPIO15_nCS_1, 60 GPIO15_nCS_1,
61 61
62 /* LCD - 16bpp Active TFT */ 62 /* LCD - 16bpp Active TFT */
63 GPIO58_LCD_LDD_0, 63 GPIOxx_LCD_TFT_16BPP,
64 GPIO59_LCD_LDD_1,
65 GPIO60_LCD_LDD_2,
66 GPIO61_LCD_LDD_3,
67 GPIO62_LCD_LDD_4,
68 GPIO63_LCD_LDD_5,
69 GPIO64_LCD_LDD_6,
70 GPIO65_LCD_LDD_7,
71 GPIO66_LCD_LDD_8,
72 GPIO67_LCD_LDD_9,
73 GPIO68_LCD_LDD_10,
74 GPIO69_LCD_LDD_11,
75 GPIO70_LCD_LDD_12,
76 GPIO71_LCD_LDD_13,
77 GPIO72_LCD_LDD_14,
78 GPIO73_LCD_LDD_15,
79 GPIO74_LCD_FCLK,
80 GPIO75_LCD_LCLK,
81 GPIO76_LCD_PCLK,
82 GPIO77_LCD_BIAS,
83 GPIO16_PWM0_OUT, /* Backlight */ 64 GPIO16_PWM0_OUT, /* Backlight */
84 65
85 /* MMC */ 66 /* MMC */
@@ -107,6 +88,10 @@ static unsigned long mainstone_pin_config[] = {
107 GPIO57_nIOIS16, 88 GPIO57_nIOIS16,
108 89
109 /* AC97 */ 90 /* AC97 */
91 GPIO28_AC97_BITCLK,
92 GPIO29_AC97_SDATA_IN_0,
93 GPIO30_AC97_SDATA_OUT,
94 GPIO31_AC97_SYNC,
110 GPIO45_AC97_SYSCLK, 95 GPIO45_AC97_SYSCLK,
111 96
112 /* Keypad */ 97 /* Keypad */
@@ -162,7 +147,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
162{ 147{
163 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; 148 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
164 do { 149 do {
165 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ 150 desc->chip->ack(irq); /* clear useless edge notification */
166 if (likely(pending)) { 151 if (likely(pending)) {
167 irq = MAINSTONE_IRQ(0) + __ffs(pending); 152 irq = MAINSTONE_IRQ(0) + __ffs(pending);
168 generic_handle_irq(irq); 153 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 2466a44d8fda..843fcca76e26 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -86,25 +86,7 @@ static unsigned long mioa701_pin_config[] = {
86 MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW), 86 MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
87 87
88 /* LCD */ 88 /* LCD */
89 GPIO58_LCD_LDD_0, 89 GPIOxx_LCD_TFT_16BPP,
90 GPIO59_LCD_LDD_1,
91 GPIO60_LCD_LDD_2,
92 GPIO61_LCD_LDD_3,
93 GPIO62_LCD_LDD_4,
94 GPIO63_LCD_LDD_5,
95 GPIO64_LCD_LDD_6,
96 GPIO65_LCD_LDD_7,
97 GPIO66_LCD_LDD_8,
98 GPIO67_LCD_LDD_9,
99 GPIO68_LCD_LDD_10,
100 GPIO69_LCD_LDD_11,
101 GPIO70_LCD_LDD_12,
102 GPIO71_LCD_LDD_13,
103 GPIO72_LCD_LDD_14,
104 GPIO73_LCD_LDD_15,
105 GPIO74_LCD_FCLK,
106 GPIO75_LCD_LCLK,
107 GPIO76_LCD_PCLK,
108 90
109 /* QCI */ 91 /* QCI */
110 GPIO12_CIF_DD_7, 92 GPIO12_CIF_DD_7,
@@ -155,6 +137,10 @@ static unsigned long mioa701_pin_config[] = {
155 GPIO41_FFUART_RTS, 137 GPIO41_FFUART_RTS,
156 138
157 /* Sound */ 139 /* Sound */
140 GPIO28_AC97_BITCLK,
141 GPIO29_AC97_SDATA_IN_0,
142 GPIO30_AC97_SDATA_OUT,
143 GPIO31_AC97_SYNC,
158 GPIO89_AC97_SYSCLK, 144 GPIO89_AC97_SYSCLK,
159 MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0), 145 MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
160 146
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
new file mode 100644
index 000000000000..8c9c6f0d56bb
--- /dev/null
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -0,0 +1,474 @@
1/*
2 * linux/arch/arm/mach-pxa/mxm8x10.c
3 *
4 * Support for the Embedian MXM-8x10 Computer on Module
5 *
6 * Copyright (C) 2006 Marvell International Ltd.
7 * Copyright (C) 2009 Embedian Inc.
8 * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
9 *
10 * 2007-09-04: eric miao <eric.y.miao@gmail.com>
11 * rewrite to align with latest kernel
12 *
13 * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
14 * Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
15 * rework for upstream merge
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/serial_8250.h>
23#include <linux/dm9000.h>
24#include <linux/gpio.h>
25
26#include <plat/i2c.h>
27#include <plat/pxa3xx_nand.h>
28
29#include <mach/pxafb.h>
30#include <mach/mmc.h>
31#include <mach/ohci.h>
32#include <mach/pxa320.h>
33
34#include <mach/mxm8x10.h>
35
36#include "devices.h"
37#include "generic.h"
38
39/* GPIO pin definition
40
41External device stuff - Leave unconfigured for now...
42---------------------
43GPIO0 - DREQ (External DMA Request)
44GPIO3 - nGCS2 (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ?
45GPIO4 - nGCS3
46GPIO15 - EXT_GPIO1
47GPIO16 - EXT_GPIO2
48GPIO17 - EXT_GPIO3
49GPIO24 - EXT_GPIO4
50GPIO25 - EXT_GPIO5
51GPIO26 - EXT_GPIO6
52GPIO27 - EXT_GPIO7
53GPIO28 - EXT_GPIO8
54GPIO29 - EXT_GPIO9
55GPIO30 - EXT_GPIO10
56GPIO31 - EXT_GPIO11
57GPIO57 - EXT_GPIO12
58GPIO74 - EXT_IRQ1
59GPIO75 - EXT_IRQ2
60GPIO76 - EXT_IRQ3
61GPIO77 - EXT_IRQ4
62GPIO78 - EXT_IRQ5
63GPIO79 - EXT_IRQ6
64GPIO80 - EXT_IRQ7
65GPIO81 - EXT_IRQ8
66GPIO87 - VCCIO_PWREN (External Device PWREN)
67
68Dallas 1-Wire - Leave unconfigured for now...
69-------------
70GPIO0_2 - DS - 1Wire
71
72Ethernet
73--------
74GPIO1 - DM9000 PWR
75GPIO9 - DM9K_nIRQ
76GPIO36 - DM9K_RESET
77
78Keypad - Leave unconfigured by for now...
79------
80GPIO1_2 - KP_DKIN0
81GPIO5_2 - KP_MKOUT7
82GPIO82 - KP_DKIN1
83GPIO85 - KP_DKIN2
84GPIO86 - KP_DKIN3
85GPIO113 - KP_MKIN0
86GPIO114 - KP_MKIN1
87GPIO115 - KP_MKIN2
88GPIO116 - KP_MKIN3
89GPIO117 - KP_MKIN4
90GPIO118 - KP_MKIN5
91GPIO119 - KP_MKIN6
92GPIO120 - KP_MKIN7
93GPIO121 - KP_MKOUT0
94GPIO122 - KP_MKOUT1
95GPIO122 - KP_MKOUT2
96GPIO123 - KP_MKOUT3
97GPIO124 - KP_MKOUT4
98GPIO125 - KP_MKOUT5
99GPIO127 - KP_MKOUT6
100
101Data Bus - Leave unconfigured for now...
102--------
103GPIO2 - nWait (Data Bus)
104
105USB Device
106----------
107GPIO4_2 - USBD_PULLUP
108GPIO10 - UTM_CLK (USB Device UTM Clk)
109GPIO49 - USB 2.0 Device UTM_DATA0
110GPIO50 - USB 2.0 Device UTM_DATA1
111GPIO51 - USB 2.0 Device UTM_DATA2
112GPIO52 - USB 2.0 Device UTM_DATA3
113GPIO53 - USB 2.0 Device UTM_DATA4
114GPIO54 - USB 2.0 Device UTM_DATA5
115GPIO55 - USB 2.0 Device UTM_DATA6
116GPIO56 - USB 2.0 Device UTM_DATA7
117GPIO58 - UTM_RXVALID (USB 2.0 Device)
118GPIO59 - UTM_RXACTIVE (USB 2.0 Device)
119GPIO60 - UTM_RXERROR
120GPIO61 - UTM_OPMODE0
121GPIO62 - UTM_OPMODE1
122GPIO71 - USBD_INT (USB Device?)
123GPIO73 - UTM_TXREADY (USB 2.0 Device)
124GPIO83 - UTM_TXVALID (USB 2.0 Device)
125GPIO98 - UTM_RESET (USB 2.0 device)
126GPIO99 - UTM_XCVR_SELECT
127GPIO100 - UTM_TERM_SELECT
128GPIO101 - UTM_SUSPENDM_X
129GPIO102 - UTM_LINESTATE0
130GPIO103 - UTM_LINESTATE1
131
132Card-Bus Interface - Leave unconfigured for now...
133------------------
134GPIO5 - nPIOR (I/O space output enable)
135GPIO6 - nPIOW (I/O space write enable)
136GPIO7 - nIOS16 (Input from I/O space telling size of data bus)
137GPIO8 - nPWAIT (Input for inserting wait states)
138
139LCD
140---
141GPIO6_2 - LDD0
142GPIO7_2 - LDD1
143GPIO8_2 - LDD2
144GPIO9_2 - LDD3
145GPIO11_2 - LDD5
146GPIO12_2 - LDD6
147GPIO13_2 - LDD7
148GPIO14_2 - VSYNC
149GPIO15_2 - HSYNC
150GPIO16_2 - VCLK
151GPIO17_2 - HCLK
152GPIO18_2 - VDEN
153GPIO63 - LDD8 (CPU LCD)
154GPIO64 - LDD9 (CPU LCD)
155GPIO65 - LDD10 (CPU LCD)
156GPIO66 - LDD11 (CPU LCD)
157GPIO67 - LDD12 (CPU LCD)
158GPIO68 - LDD13 (CPU LCD)
159GPIO69 - LDD14 (CPU LCD)
160GPIO70 - LDD15 (CPU LCD)
161GPIO88 - VCCLCD_PWREN (LCD Panel PWREN)
162GPIO97 - BACKLIGHT_EN
163GPIO104 - LCD_PWREN
164
165PWM - Leave unconfigured for now...
166---
167GPIO11 - PWM0
168GPIO12 - PWM1
169GPIO13 - PWM2
170GPIO14 - PWM3
171
172SD-CARD
173-------
174GPIO18 - SDDATA0
175GPIO19 - SDDATA1
176GPIO20 - SDDATA2
177GPIO21 - SDDATA3
178GPIO22 - SDCLK
179GPIO23 - SDCMD
180GPIO72 - SD_WP
181GPIO84 - SD_nIRQ_CD (SD-Card)
182
183I2C
184---
185GPIO32 - I2CSCL
186GPIO33 - I2CSDA
187
188AC97
189----
190GPIO35 - AC97_SDATA_IN
191GPIO37 - AC97_SDATA_OUT
192GPIO38 - AC97_SYNC
193GPIO39 - AC97_BITCLK
194GPIO40 - AC97_nRESET
195
196UART1
197-----
198GPIO41 - UART_RXD1
199GPIO42 - UART_TXD1
200GPIO43 - UART_CTS1
201GPIO44 - UART_DCD1
202GPIO45 - UART_DSR1
203GPIO46 - UART_nRI1
204GPIO47 - UART_DTR1
205GPIO48 - UART_RTS1
206
207UART2
208-----
209GPIO109 - RTS2
210GPIO110 - RXD2
211GPIO111 - TXD2
212GPIO112 - nCTS2
213
214UART3
215-----
216GPIO105 - nCTS3
217GPIO106 - nRTS3
218GPIO107 - TXD3
219GPIO108 - RXD3
220
221SSP3 - Leave unconfigured for now...
222----
223GPIO89 - SSP3_CLK
224GPIO90 - SSP3_SFRM
225GPIO91 - SSP3_TXD
226GPIO92 - SSP3_RXD
227
228SSP4
229GPIO93 - SSP4_CLK
230GPIO94 - SSP4_SFRM
231GPIO95 - SSP4_TXD
232GPIO96 - SSP4_RXD
233*/
234
235static mfp_cfg_t mfp_cfg[] __initdata = {
236 /* USB */
237 GPIO10_UTM_CLK,
238 GPIO49_U2D_PHYDATA_0,
239 GPIO50_U2D_PHYDATA_1,
240 GPIO51_U2D_PHYDATA_2,
241 GPIO52_U2D_PHYDATA_3,
242 GPIO53_U2D_PHYDATA_4,
243 GPIO54_U2D_PHYDATA_5,
244 GPIO55_U2D_PHYDATA_6,
245 GPIO56_U2D_PHYDATA_7,
246 GPIO58_UTM_RXVALID,
247 GPIO59_UTM_RXACTIVE,
248 GPIO60_U2D_RXERROR,
249 GPIO61_U2D_OPMODE0,
250 GPIO62_U2D_OPMODE1,
251 GPIO71_GPIO, /* USBD_INT */
252 GPIO73_UTM_TXREADY,
253 GPIO83_U2D_TXVALID,
254 GPIO98_U2D_RESET,
255 GPIO99_U2D_XCVR_SEL,
256 GPIO100_U2D_TERM_SEL,
257 GPIO101_U2D_SUSPEND,
258 GPIO102_UTM_LINESTATE_0,
259 GPIO103_UTM_LINESTATE_1,
260 GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */
261
262 /* DM9000 */
263 GPIO1_GPIO,
264 GPIO9_GPIO,
265 GPIO36_GPIO,
266
267 /* AC97 */
268 GPIO35_AC97_SDATA_IN_0,
269 GPIO37_AC97_SDATA_OUT,
270 GPIO38_AC97_SYNC,
271 GPIO39_AC97_BITCLK,
272 GPIO40_AC97_nACRESET,
273
274 /* UARTS */
275 GPIO41_UART1_RXD,
276 GPIO42_UART1_TXD,
277 GPIO43_UART1_CTS,
278 GPIO44_UART1_DCD,
279 GPIO45_UART1_DSR,
280 GPIO46_UART1_RI,
281 GPIO47_UART1_DTR,
282 GPIO48_UART1_RTS,
283
284 GPIO109_UART2_RTS,
285 GPIO110_UART2_RXD,
286 GPIO111_UART2_TXD,
287 GPIO112_UART2_CTS,
288
289 GPIO105_UART3_CTS,
290 GPIO106_UART3_RTS,
291 GPIO107_UART3_TXD,
292 GPIO108_UART3_RXD,
293
294 GPIO78_GPIO,
295 GPIO79_GPIO,
296 GPIO80_GPIO,
297 GPIO81_GPIO,
298
299 /* I2C */
300 GPIO32_I2C_SCL,
301 GPIO33_I2C_SDA,
302
303 /* MMC */
304 GPIO18_MMC1_DAT0,
305 GPIO19_MMC1_DAT1,
306 GPIO20_MMC1_DAT2,
307 GPIO21_MMC1_DAT3,
308 GPIO22_MMC1_CLK,
309 GPIO23_MMC1_CMD,
310 GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */
311 GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */
312
313 /* IRQ */
314 GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */
315 GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */
316 GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */
317 GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */
318 GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */
319 GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */
320 GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */
321 GPIO81_GPIO | MFP_LPM_EDGE_RISE /* EXT_IRQ8 */
322};
323
324/* MMC/MCI Support */
325#if defined(CONFIG_MMC)
326static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
327 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
328 .detect_delay = 1,
329 .gpio_card_detect = MXM_8X10_SD_nCD,
330 .gpio_card_ro = MXM_8X10_SD_WP,
331 .gpio_power = -1
332};
333
334void __init mxm_8x10_mmc_init(void)
335{
336 pxa_set_mci_info(&mxm_8x10_mci_platform_data);
337}
338#endif
339
340/* USB Open Host Controler Interface */
341static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
342 .port_mode = PMM_NPS_MODE,
343 .flags = ENABLE_PORT_ALL
344};
345
346void __init mxm_8x10_usb_host_init(void)
347{
348 pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
349}
350
351/* AC97 Sound Support */
352static struct platform_device mxm_8x10_ac97_device = {
353 .name = "pxa2xx-ac97"
354};
355
356void __init mxm_8x10_ac97_init(void)
357{
358 platform_device_register(&mxm_8x10_ac97_device);
359}
360
361/* NAND flash Support */
362#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
363#define NAND_BLOCK_SIZE SZ_128K
364#define NB(x) (NAND_BLOCK_SIZE * (x))
365static struct mtd_partition mxm_8x10_nand_partitions[] = {
366 [0] = {
367 .name = "boot",
368 .size = NB(0x002),
369 .offset = NB(0x000),
370 .mask_flags = MTD_WRITEABLE
371 },
372 [1] = {
373 .name = "kernel",
374 .size = NB(0x010),
375 .offset = NB(0x002),
376 .mask_flags = MTD_WRITEABLE
377 },
378 [2] = {
379 .name = "root",
380 .size = NB(0x36c),
381 .offset = NB(0x012)
382 },
383 [3] = {
384 .name = "bbt",
385 .size = NB(0x082),
386 .offset = NB(0x37e),
387 .mask_flags = MTD_WRITEABLE
388 }
389};
390
391static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
392 .enable_arbiter = 1,
393 .keep_config = 1,
394 .parts = mxm_8x10_nand_partitions,
395 .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
396};
397
398static void __init mxm_8x10_nand_init(void)
399{
400 pxa3xx_set_nand_info(&mxm_8x10_nand_info);
401}
402#else
403static inline void mxm_8x10_nand_init(void) {}
404#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
405
406/* Ethernet support: Davicom DM9000 */
407static struct resource dm9k_resources[] = {
408 [0] = {
409 .start = MXM_8X10_ETH_PHYS + 0x300,
410 .end = MXM_8X10_ETH_PHYS + 0x300,
411 .flags = IORESOURCE_MEM
412 },
413 [1] = {
414 .start = MXM_8X10_ETH_PHYS + 0x308,
415 .end = MXM_8X10_ETH_PHYS + 0x308,
416 .flags = IORESOURCE_MEM
417 },
418 [2] = {
419 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
420 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
421 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
422 }
423};
424
425static struct dm9000_plat_data dm9k_plat_data = {
426 .flags = DM9000_PLATF_16BITONLY
427};
428
429static struct platform_device dm9k_device = {
430 .name = "dm9000",
431 .id = 0,
432 .num_resources = ARRAY_SIZE(dm9k_resources),
433 .resource = dm9k_resources,
434 .dev = {
435 .platform_data = &dm9k_plat_data
436 }
437};
438
439static void __init mxm_8x10_ethernet_init(void)
440{
441 platform_device_register(&dm9k_device);
442}
443
444/* PXA UARTs */
445static void __init mxm_8x10_uarts_init(void)
446{
447 pxa_set_ffuart_info(NULL);
448 pxa_set_btuart_info(NULL);
449 pxa_set_stuart_info(NULL);
450}
451
452/* I2C and Real Time Clock */
453static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
454 {
455 I2C_BOARD_INFO("ds1337", 0x68)
456 }
457};
458
459static void __init mxm_8x10_i2c_init(void)
460{
461 i2c_register_board_info(0, mxm_8x10_i2c_devices,
462 ARRAY_SIZE(mxm_8x10_i2c_devices));
463 pxa_set_i2c_info(NULL);
464}
465
466void __init mxm_8x10_barebones_init(void)
467{
468 pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
469
470 mxm_8x10_uarts_init();
471 mxm_8x10_nand_init();
472 mxm_8x10_i2c_init();
473 mxm_8x10_ethernet_init();
474}
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index e100af78b166..f70c75b38769 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -83,26 +83,7 @@ static unsigned long palmld_pin_config[] __initdata = {
83 GPIO105_KP_MKOUT_2, 83 GPIO105_KP_MKOUT_2,
84 84
85 /* LCD */ 85 /* LCD */
86 GPIO58_LCD_LDD_0, 86 GPIOxx_LCD_TFT_16BPP,
87 GPIO59_LCD_LDD_1,
88 GPIO60_LCD_LDD_2,
89 GPIO61_LCD_LDD_3,
90 GPIO62_LCD_LDD_4,
91 GPIO63_LCD_LDD_5,
92 GPIO64_LCD_LDD_6,
93 GPIO65_LCD_LDD_7,
94 GPIO66_LCD_LDD_8,
95 GPIO67_LCD_LDD_9,
96 GPIO68_LCD_LDD_10,
97 GPIO69_LCD_LDD_11,
98 GPIO70_LCD_LDD_12,
99 GPIO71_LCD_LDD_13,
100 GPIO72_LCD_LDD_14,
101 GPIO73_LCD_LDD_15,
102 GPIO74_LCD_FCLK,
103 GPIO75_LCD_LCLK,
104 GPIO76_LCD_PCLK,
105 GPIO77_LCD_BIAS,
106 87
107 /* PWM */ 88 /* PWM */
108 GPIO16_PWM0_OUT, 89 GPIO16_PWM0_OUT,
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 8fe3ec27568f..d902a813aae3 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -87,26 +87,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
87 GPIO105_KP_MKOUT_2, 87 GPIO105_KP_MKOUT_2,
88 88
89 /* LCD */ 89 /* LCD */
90 GPIO58_LCD_LDD_0, 90 GPIOxx_LCD_TFT_16BPP,
91 GPIO59_LCD_LDD_1,
92 GPIO60_LCD_LDD_2,
93 GPIO61_LCD_LDD_3,
94 GPIO62_LCD_LDD_4,
95 GPIO63_LCD_LDD_5,
96 GPIO64_LCD_LDD_6,
97 GPIO65_LCD_LDD_7,
98 GPIO66_LCD_LDD_8,
99 GPIO67_LCD_LDD_9,
100 GPIO68_LCD_LDD_10,
101 GPIO69_LCD_LDD_11,
102 GPIO70_LCD_LDD_12,
103 GPIO71_LCD_LDD_13,
104 GPIO72_LCD_LDD_14,
105 GPIO73_LCD_LDD_15,
106 GPIO74_LCD_FCLK,
107 GPIO75_LCD_LCLK,
108 GPIO76_LCD_PCLK,
109 GPIO77_LCD_BIAS,
110 91
111 /* PWM */ 92 /* PWM */
112 GPIO16_PWM0_OUT, 93 GPIO16_PWM0_OUT,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index b992f07ece21..717d7a638675 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -84,26 +84,7 @@ static unsigned long palmtc_pin_config[] __initdata = {
84 GPIO36_GPIO, /* pullup */ 84 GPIO36_GPIO, /* pullup */
85 85
86 /* LCD */ 86 /* LCD */
87 GPIO58_LCD_LDD_0, 87 GPIOxx_LCD_TFT_16BPP,
88 GPIO59_LCD_LDD_1,
89 GPIO60_LCD_LDD_2,
90 GPIO61_LCD_LDD_3,
91 GPIO62_LCD_LDD_4,
92 GPIO63_LCD_LDD_5,
93 GPIO64_LCD_LDD_6,
94 GPIO65_LCD_LDD_7,
95 GPIO66_LCD_LDD_8,
96 GPIO67_LCD_LDD_9,
97 GPIO68_LCD_LDD_10,
98 GPIO69_LCD_LDD_11,
99 GPIO70_LCD_LDD_12,
100 GPIO71_LCD_LDD_13,
101 GPIO72_LCD_LDD_14,
102 GPIO73_LCD_LDD_15,
103 GPIO74_LCD_FCLK,
104 GPIO75_LCD_LCLK,
105 GPIO76_LCD_PCLK,
106 GPIO77_LCD_BIAS,
107 88
108 /* MATRIX KEYPAD */ 89 /* MATRIX KEYPAD */
109 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 0 */ 90 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 0 */
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index dc728d6ab94e..3d284ff1a64e 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -73,26 +73,7 @@ static unsigned long palmte2_pin_config[] __initdata = {
73 GPIO47_FICP_TXD, 73 GPIO47_FICP_TXD,
74 74
75 /* LCD */ 75 /* LCD */
76 GPIO58_LCD_LDD_0, 76 GPIOxx_LCD_TFT_16BPP,
77 GPIO59_LCD_LDD_1,
78 GPIO60_LCD_LDD_2,
79 GPIO61_LCD_LDD_3,
80 GPIO62_LCD_LDD_4,
81 GPIO63_LCD_LDD_5,
82 GPIO64_LCD_LDD_6,
83 GPIO65_LCD_LDD_7,
84 GPIO66_LCD_LDD_8,
85 GPIO67_LCD_LDD_9,
86 GPIO68_LCD_LDD_10,
87 GPIO69_LCD_LDD_11,
88 GPIO70_LCD_LDD_12,
89 GPIO71_LCD_LDD_13,
90 GPIO72_LCD_LDD_14,
91 GPIO73_LCD_LDD_15,
92 GPIO74_LCD_FCLK,
93 GPIO75_LCD_LCLK,
94 GPIO76_LCD_PCLK,
95 GPIO77_LCD_BIAS,
96 77
97 /* GPIO KEYS */ 78 /* GPIO KEYS */
98 GPIO5_GPIO, /* notes */ 79 GPIO5_GPIO, /* notes */
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index b433bb496711..d8b4469607a1 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -99,25 +99,7 @@ static unsigned long treo_pin_config[] __initdata = {
99 GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */ 99 GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */
100 100
101 /* LCD */ 101 /* LCD */
102 GPIO58_LCD_LDD_0, 102 GPIOxx_LCD_TFT_16BPP,
103 GPIO59_LCD_LDD_1,
104 GPIO60_LCD_LDD_2,
105 GPIO61_LCD_LDD_3,
106 GPIO62_LCD_LDD_4,
107 GPIO63_LCD_LDD_5,
108 GPIO64_LCD_LDD_6,
109 GPIO65_LCD_LDD_7,
110 GPIO66_LCD_LDD_8,
111 GPIO67_LCD_LDD_9,
112 GPIO68_LCD_LDD_10,
113 GPIO69_LCD_LDD_11,
114 GPIO70_LCD_LDD_12,
115 GPIO71_LCD_LDD_13,
116 GPIO72_LCD_LDD_14,
117 GPIO73_LCD_LDD_15,
118 GPIO74_LCD_FCLK,
119 GPIO75_LCD_LCLK,
120 GPIO76_LCD_PCLK,
121 103
122 /* Quick Capture Interface */ 104 /* Quick Capture Interface */
123 GPIO84_CIF_FV, 105 GPIO84_CIF_FV,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index b37a025c0b7b..007b58c11f8d 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -110,26 +110,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
110 GPIO105_KP_MKOUT_2, 110 GPIO105_KP_MKOUT_2,
111 111
112 /* LCD */ 112 /* LCD */
113 GPIO58_LCD_LDD_0, 113 GPIOxx_LCD_TFT_16BPP,
114 GPIO59_LCD_LDD_1,
115 GPIO60_LCD_LDD_2,
116 GPIO61_LCD_LDD_3,
117 GPIO62_LCD_LDD_4,
118 GPIO63_LCD_LDD_5,
119 GPIO64_LCD_LDD_6,
120 GPIO65_LCD_LDD_7,
121 GPIO66_LCD_LDD_8,
122 GPIO67_LCD_LDD_9,
123 GPIO68_LCD_LDD_10,
124 GPIO69_LCD_LDD_11,
125 GPIO70_LCD_LDD_12,
126 GPIO71_LCD_LDD_13,
127 GPIO72_LCD_LDD_14,
128 GPIO73_LCD_LDD_15,
129 GPIO74_LCD_FCLK,
130 GPIO75_LCD_LCLK,
131 GPIO76_LCD_PCLK,
132 GPIO77_LCD_BIAS,
133 114
134 /* FFUART */ 115 /* FFUART */
135 GPIO34_FFUART_RXD, 116 GPIO34_FFUART_RXD,
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 1c5d68a94511..3a7925ca3944 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -95,26 +95,8 @@ static unsigned long palmz72_pin_config[] __initdata = {
95 GPIO105_KP_MKOUT_2, 95 GPIO105_KP_MKOUT_2,
96 96
97 /* LCD */ 97 /* LCD */
98 GPIO58_LCD_LDD_0, 98 GPIOxx_LCD_TFT_16BPP,
99 GPIO59_LCD_LDD_1, 99
100 GPIO60_LCD_LDD_2,
101 GPIO61_LCD_LDD_3,
102 GPIO62_LCD_LDD_4,
103 GPIO63_LCD_LDD_5,
104 GPIO64_LCD_LDD_6,
105 GPIO65_LCD_LDD_7,
106 GPIO66_LCD_LDD_8,
107 GPIO67_LCD_LDD_9,
108 GPIO68_LCD_LDD_10,
109 GPIO69_LCD_LDD_11,
110 GPIO70_LCD_LDD_12,
111 GPIO71_LCD_LDD_13,
112 GPIO72_LCD_LDD_14,
113 GPIO73_LCD_LDD_15,
114 GPIO74_LCD_FCLK,
115 GPIO75_LCD_LCLK,
116 GPIO76_LCD_PCLK,
117 GPIO77_LCD_BIAS,
118 GPIO20_GPIO, /* bl power */ 100 GPIO20_GPIO, /* bl power */
119 GPIO21_GPIO, /* LCD border switch */ 101 GPIO21_GPIO, /* LCD border switch */
120 GPIO22_GPIO, /* LCD border color */ 102 GPIO22_GPIO, /* LCD border color */
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index d5255ae74fe3..9d0ecea1760c 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -58,6 +58,12 @@ static unsigned long pcm990_pin_config[] __initdata = {
58 /* I2C */ 58 /* I2C */
59 GPIO117_I2C_SCL, 59 GPIO117_I2C_SCL,
60 GPIO118_I2C_SDA, 60 GPIO118_I2C_SDA,
61
62 /* AC97 */
63 GPIO28_AC97_BITCLK,
64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC,
61}; 67};
62 68
63/* 69/*
@@ -259,8 +265,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
259 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; 265 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
260 266
261 do { 267 do {
262 GEDR(PCM990_CTRL_INT_IRQ_GPIO) = 268 desc->chip->ack(irq); /* clear our parent IRQ */
263 GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
264 if (likely(pending)) { 269 if (likely(pending)) {
265 irq = PCM027_IRQ(0) + __ffs(pending); 270 irq = PCM027_IRQ(0) + __ffs(pending);
266 generic_handle_irq(irq); 271 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index c2b938a4d5c9..d58a52415d75 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -91,26 +91,7 @@ static unsigned long poodle_pin_config[] __initdata = {
91 GPIO35_FFUART_CTS, 91 GPIO35_FFUART_CTS,
92 92
93 /* LCD */ 93 /* LCD */
94 GPIO58_LCD_LDD_0, 94 GPIOxx_LCD_TFT_16BPP,
95 GPIO59_LCD_LDD_1,
96 GPIO60_LCD_LDD_2,
97 GPIO61_LCD_LDD_3,
98 GPIO62_LCD_LDD_4,
99 GPIO63_LCD_LDD_5,
100 GPIO64_LCD_LDD_6,
101 GPIO65_LCD_LDD_7,
102 GPIO66_LCD_LDD_8,
103 GPIO67_LCD_LDD_9,
104 GPIO68_LCD_LDD_10,
105 GPIO69_LCD_LDD_11,
106 GPIO70_LCD_LDD_12,
107 GPIO71_LCD_LDD_13,
108 GPIO72_LCD_LDD_14,
109 GPIO73_LCD_LDD_15,
110 GPIO74_LCD_FCLK,
111 GPIO75_LCD_LCLK,
112 GPIO76_LCD_PCLK,
113 GPIO77_LCD_BIAS,
114 95
115 /* PC Card */ 96 /* PC Card */
116 GPIO48_nPOE, 97 GPIO48_nPOE,
@@ -193,11 +174,18 @@ static struct resource locomo_resources[] = {
193 }, 174 },
194}; 175};
195 176
177static struct locomo_platform_data locomo_info = {
178 .irq_base = IRQ_BOARD_START,
179};
180
196struct platform_device poodle_locomo_device = { 181struct platform_device poodle_locomo_device = {
197 .name = "locomo", 182 .name = "locomo",
198 .id = 0, 183 .id = 0,
199 .num_resources = ARRAY_SIZE(locomo_resources), 184 .num_resources = ARRAY_SIZE(locomo_resources),
200 .resource = locomo_resources, 185 .resource = locomo_resources,
186 .dev = {
187 .platform_data = &locomo_info,
188 },
201}; 189};
202 190
203EXPORT_SYMBOL(poodle_locomo_device); 191EXPORT_SYMBOL(poodle_locomo_device);
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d783123e2d48..0af36177ff08 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -40,6 +40,25 @@ void pxa27x_clear_otgph(void)
40} 40}
41EXPORT_SYMBOL(pxa27x_clear_otgph); 41EXPORT_SYMBOL(pxa27x_clear_otgph);
42 42
43static unsigned long ac97_reset_config[] = {
44 GPIO95_AC97_nRESET,
45 GPIO95_GPIO,
46 GPIO113_AC97_nRESET,
47 GPIO113_GPIO,
48};
49
50void pxa27x_assert_ac97reset(int reset_gpio, int on)
51{
52 if (reset_gpio == 113)
53 pxa2xx_mfp_config(on ? &ac97_reset_config[0] :
54 &ac97_reset_config[1], 1);
55
56 if (reset_gpio == 95)
57 pxa2xx_mfp_config(on ? &ac97_reset_config[2] :
58 &ac97_reset_config[3], 1);
59}
60EXPORT_SYMBOL_GPL(pxa27x_assert_ac97reset);
61
43/* Crystal clock: 13MHz */ 62/* Crystal clock: 13MHz */
44#define BASE_CLK 13000000 63#define BASE_CLK 13000000
45 64
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
new file mode 100644
index 000000000000..3184bdc14526
--- /dev/null
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -0,0 +1,1108 @@
1/*
2 * arch/arm/mach-pxa/raumfeld.c
3 *
4 * Support for the following Raumfeld devices:
5 *
6 * * Controller
7 * * Connector
8 * * Speaker S/M
9 *
10 * See http://www.raumfeld.com for details.
11 *
12 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/sysdev.h>
22#include <linux/platform_device.h>
23#include <linux/interrupt.h>
24#include <linux/gpio.h>
25#include <linux/smsc911x.h>
26#include <linux/input.h>
27#include <linux/rotary_encoder.h>
28#include <linux/gpio_keys.h>
29#include <linux/input/eeti_ts.h>
30#include <linux/leds.h>
31#include <linux/w1-gpio.h>
32#include <linux/sched.h>
33#include <linux/pwm_backlight.h>
34#include <linux/i2c.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/spi_gpio.h>
37#include <linux/lis3lv02d.h>
38#include <linux/pda_power.h>
39#include <linux/power_supply.h>
40#include <linux/pda_power.h>
41#include <linux/power_supply.h>
42#include <linux/regulator/max8660.h>
43#include <linux/regulator/machine.h>
44#include <linux/regulator/fixed.h>
45#include <linux/regulator/consumer.h>
46#include <linux/delay.h>
47
48#include <asm/mach-types.h>
49#include <asm/mach/arch.h>
50
51#include <mach/hardware.h>
52#include <mach/pxa3xx-regs.h>
53#include <mach/mfp-pxa3xx.h>
54#include <mach/mfp-pxa300.h>
55#include <mach/ohci.h>
56#include <mach/pxafb.h>
57#include <mach/mmc.h>
58#include <plat/i2c.h>
59#include <plat/pxa3xx_nand.h>
60
61#include "generic.h"
62#include "devices.h"
63#include "clock.h"
64
65/* common GPIO definitions */
66
67/* inputs */
68#define GPIO_ON_OFF (14)
69#define GPIO_VOLENC_A (19)
70#define GPIO_VOLENC_B (20)
71#define GPIO_CHARGE_DONE (23)
72#define GPIO_CHARGE_IND (27)
73#define GPIO_TOUCH_IRQ (32)
74#define GPIO_ETH_IRQ (40)
75#define GPIO_SPI_MISO (98)
76#define GPIO_ACCEL_IRQ (104)
77#define GPIO_RESCUE_BOOT (115)
78#define GPIO_DOCK_DETECT (116)
79#define GPIO_KEY1 (117)
80#define GPIO_KEY2 (118)
81#define GPIO_KEY3 (119)
82#define GPIO_CHARGE_USB_OK (112)
83#define GPIO_CHARGE_DC_OK (101)
84#define GPIO_CHARGE_USB_SUSP (102)
85
86/* outputs */
87#define GPIO_SHUTDOWN_SUPPLY (16)
88#define GPIO_SHUTDOWN_BATT (18)
89#define GPIO_CHRG_PEN2 (31)
90#define GPIO_TFT_VA_EN (33)
91#define GPIO_SPDIF_CS (34)
92#define GPIO_LED2 (35)
93#define GPIO_LED1 (36)
94#define GPIO_SPDIF_RESET (38)
95#define GPIO_SPI_CLK (95)
96#define GPIO_MCLK_DAC_CS (96)
97#define GPIO_SPI_MOSI (97)
98#define GPIO_W1_PULLUP_ENABLE (105)
99#define GPIO_DISPLAY_ENABLE (106)
100#define GPIO_MCLK_RESET (111)
101#define GPIO_W2W_RESET (113)
102#define GPIO_W2W_PDN (114)
103#define GPIO_CODEC_RESET (120)
104#define GPIO_AUDIO_VA_ENABLE (124)
105#define GPIO_ACCEL_CS (125)
106#define GPIO_ONE_WIRE (126)
107
108/*
109 * GPIO configurations
110 */
111static mfp_cfg_t raumfeld_controller_pin_config[] __initdata = {
112 /* UART1 */
113 GPIO77_UART1_RXD,
114 GPIO78_UART1_TXD,
115 GPIO79_UART1_CTS,
116 GPIO81_UART1_DSR,
117 GPIO83_UART1_DTR,
118 GPIO84_UART1_RTS,
119
120 /* UART3 */
121 GPIO110_UART3_RXD,
122
123 /* USB Host */
124 GPIO0_2_USBH_PEN,
125 GPIO1_2_USBH_PWR,
126
127 /* I2C */
128 GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
129 GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
130
131 /* SPI */
132 GPIO34_GPIO, /* SPDIF_CS */
133 GPIO96_GPIO, /* MCLK_CS */
134 GPIO125_GPIO, /* ACCEL_CS */
135
136 /* MMC */
137 GPIO3_MMC1_DAT0,
138 GPIO4_MMC1_DAT1,
139 GPIO5_MMC1_DAT2,
140 GPIO6_MMC1_DAT3,
141 GPIO7_MMC1_CLK,
142 GPIO8_MMC1_CMD,
143
144 /* One-wire */
145 GPIO126_GPIO | MFP_LPM_FLOAT,
146 GPIO105_GPIO | MFP_PULL_LOW | MFP_LPM_PULL_LOW,
147
148 /* CHRG_USB_OK */
149 GPIO101_GPIO | MFP_PULL_HIGH,
150 /* CHRG_USB_OK */
151 GPIO112_GPIO | MFP_PULL_HIGH,
152 /* CHRG_USB_SUSP */
153 GPIO102_GPIO,
154 /* DISPLAY_ENABLE */
155 GPIO106_GPIO,
156 /* DOCK_DETECT */
157 GPIO116_GPIO | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
158
159 /* LCD */
160 GPIO54_LCD_LDD_0,
161 GPIO55_LCD_LDD_1,
162 GPIO56_LCD_LDD_2,
163 GPIO57_LCD_LDD_3,
164 GPIO58_LCD_LDD_4,
165 GPIO59_LCD_LDD_5,
166 GPIO60_LCD_LDD_6,
167 GPIO61_LCD_LDD_7,
168 GPIO62_LCD_LDD_8,
169 GPIO63_LCD_LDD_9,
170 GPIO64_LCD_LDD_10,
171 GPIO65_LCD_LDD_11,
172 GPIO66_LCD_LDD_12,
173 GPIO67_LCD_LDD_13,
174 GPIO68_LCD_LDD_14,
175 GPIO69_LCD_LDD_15,
176 GPIO70_LCD_LDD_16,
177 GPIO71_LCD_LDD_17,
178 GPIO72_LCD_FCLK,
179 GPIO73_LCD_LCLK,
180 GPIO74_LCD_PCLK,
181 GPIO75_LCD_BIAS,
182};
183
184static mfp_cfg_t raumfeld_connector_pin_config[] __initdata = {
185 /* UART1 */
186 GPIO77_UART1_RXD,
187 GPIO78_UART1_TXD,
188 GPIO79_UART1_CTS,
189 GPIO81_UART1_DSR,
190 GPIO83_UART1_DTR,
191 GPIO84_UART1_RTS,
192
193 /* UART3 */
194 GPIO110_UART3_RXD,
195
196 /* USB Host */
197 GPIO0_2_USBH_PEN,
198 GPIO1_2_USBH_PWR,
199
200 /* I2C */
201 GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
202 GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
203
204 /* SPI */
205 GPIO34_GPIO, /* SPDIF_CS */
206 GPIO96_GPIO, /* MCLK_CS */
207 GPIO125_GPIO, /* ACCEL_CS */
208
209 /* MMC */
210 GPIO3_MMC1_DAT0,
211 GPIO4_MMC1_DAT1,
212 GPIO5_MMC1_DAT2,
213 GPIO6_MMC1_DAT3,
214 GPIO7_MMC1_CLK,
215 GPIO8_MMC1_CMD,
216
217 /* Ethernet */
218 GPIO1_nCS2, /* CS */
219 GPIO40_GPIO | MFP_PULL_HIGH, /* IRQ */
220
221 /* SSP for I2S */
222 GPIO85_SSP1_SCLK,
223 GPIO89_SSP1_EXTCLK,
224 GPIO86_SSP1_FRM,
225 GPIO87_SSP1_TXD,
226 GPIO88_SSP1_RXD,
227 GPIO90_SSP1_SYSCLK,
228
229 /* SSP2 for S/PDIF */
230 GPIO25_SSP2_SCLK,
231 GPIO26_SSP2_FRM,
232 GPIO27_SSP2_TXD,
233 GPIO29_SSP2_EXTCLK,
234
235 /* LEDs */
236 GPIO35_GPIO | MFP_LPM_PULL_LOW,
237 GPIO36_GPIO | MFP_LPM_DRIVE_HIGH,
238};
239
240static mfp_cfg_t raumfeld_speaker_pin_config[] __initdata = {
241 /* UART1 */
242 GPIO77_UART1_RXD,
243 GPIO78_UART1_TXD,
244 GPIO79_UART1_CTS,
245 GPIO81_UART1_DSR,
246 GPIO83_UART1_DTR,
247 GPIO84_UART1_RTS,
248
249 /* UART3 */
250 GPIO110_UART3_RXD,
251
252 /* USB Host */
253 GPIO0_2_USBH_PEN,
254 GPIO1_2_USBH_PWR,
255
256 /* I2C */
257 GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
258 GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
259
260 /* SPI */
261 GPIO34_GPIO, /* SPDIF_CS */
262 GPIO96_GPIO, /* MCLK_CS */
263 GPIO125_GPIO, /* ACCEL_CS */
264
265 /* MMC */
266 GPIO3_MMC1_DAT0,
267 GPIO4_MMC1_DAT1,
268 GPIO5_MMC1_DAT2,
269 GPIO6_MMC1_DAT3,
270 GPIO7_MMC1_CLK,
271 GPIO8_MMC1_CMD,
272
273 /* Ethernet */
274 GPIO1_nCS2, /* CS */
275 GPIO40_GPIO | MFP_PULL_HIGH, /* IRQ */
276
277 /* SSP for I2S */
278 GPIO85_SSP1_SCLK,
279 GPIO89_SSP1_EXTCLK,
280 GPIO86_SSP1_FRM,
281 GPIO87_SSP1_TXD,
282 GPIO88_SSP1_RXD,
283 GPIO90_SSP1_SYSCLK,
284
285 /* LEDs */
286 GPIO35_GPIO | MFP_LPM_PULL_LOW,
287 GPIO36_GPIO | MFP_LPM_DRIVE_HIGH,
288};
289
290/*
291 * SMSC LAN9220 Ethernet
292 */
293
294static struct resource smc91x_resources[] = {
295 {
296 .start = PXA3xx_CS2_PHYS,
297 .end = PXA3xx_CS2_PHYS + 0xfffff,
298 .flags = IORESOURCE_MEM,
299 },
300 {
301 .start = gpio_to_irq(GPIO_ETH_IRQ),
302 .end = gpio_to_irq(GPIO_ETH_IRQ),
303 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
304 }
305};
306
307static struct smsc911x_platform_config raumfeld_smsc911x_config = {
308 .phy_interface = PHY_INTERFACE_MODE_MII,
309 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
310 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
311 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
312};
313
314static struct platform_device smc91x_device = {
315 .name = "smsc911x",
316 .id = -1,
317 .num_resources = ARRAY_SIZE(smc91x_resources),
318 .resource = smc91x_resources,
319 .dev = {
320 .platform_data = &raumfeld_smsc911x_config,
321 }
322};
323
324/**
325 * NAND
326 */
327
328static struct mtd_partition raumfeld_nand_partitions[] = {
329 {
330 .name = "Bootloader",
331 .offset = 0,
332 .size = 0xa0000,
333 .mask_flags = MTD_WRITEABLE, /* force read-only */
334 },
335 {
336 .name = "BootloaderEnvironment",
337 .offset = 0xa0000,
338 .size = 0x20000,
339 },
340 {
341 .name = "BootloaderSplashScreen",
342 .offset = 0xc0000,
343 .size = 0x60000,
344 },
345 {
346 .name = "UBI",
347 .offset = 0x120000,
348 .size = MTDPART_SIZ_FULL,
349 },
350};
351
352static struct pxa3xx_nand_platform_data raumfeld_nand_info = {
353 .enable_arbiter = 1,
354 .keep_config = 1,
355 .parts = raumfeld_nand_partitions,
356 .nr_parts = ARRAY_SIZE(raumfeld_nand_partitions),
357};
358
359/**
360 * USB (OHCI) support
361 */
362
363static struct pxaohci_platform_data raumfeld_ohci_info = {
364 .port_mode = PMM_GLOBAL_MODE,
365 .flags = ENABLE_PORT1,
366};
367
368/**
369 * Rotary encoder input device
370 */
371
372static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
373 .steps = 24,
374 .axis = REL_X,
375 .relative_axis = 1,
376 .gpio_a = GPIO_VOLENC_A,
377 .gpio_b = GPIO_VOLENC_B,
378 .inverted_a = 1,
379 .inverted_b = 0,
380};
381
382static struct platform_device rotary_encoder_device = {
383 .name = "rotary-encoder",
384 .id = 0,
385 .dev = {
386 .platform_data = &raumfeld_rotary_encoder_info,
387 }
388};
389
390/**
391 * GPIO buttons
392 */
393
394static struct gpio_keys_button gpio_keys_button[] = {
395 {
396 .code = KEY_F1,
397 .type = EV_KEY,
398 .gpio = GPIO_KEY1,
399 .active_low = 1,
400 .wakeup = 0,
401 .debounce_interval = 5, /* ms */
402 .desc = "Button 1",
403 },
404 {
405 .code = KEY_F2,
406 .type = EV_KEY,
407 .gpio = GPIO_KEY2,
408 .active_low = 1,
409 .wakeup = 0,
410 .debounce_interval = 5, /* ms */
411 .desc = "Button 2",
412 },
413 {
414 .code = KEY_F3,
415 .type = EV_KEY,
416 .gpio = GPIO_KEY3,
417 .active_low = 1,
418 .wakeup = 0,
419 .debounce_interval = 5, /* ms */
420 .desc = "Button 3",
421 },
422 {
423 .code = KEY_F4,
424 .type = EV_KEY,
425 .gpio = GPIO_RESCUE_BOOT,
426 .active_low = 0,
427 .wakeup = 0,
428 .debounce_interval = 5, /* ms */
429 .desc = "rescue boot button",
430 },
431 {
432 .code = KEY_F5,
433 .type = EV_KEY,
434 .gpio = GPIO_DOCK_DETECT,
435 .active_low = 1,
436 .wakeup = 0,
437 .debounce_interval = 5, /* ms */
438 .desc = "dock detect",
439 },
440 {
441 .code = KEY_F6,
442 .type = EV_KEY,
443 .gpio = GPIO_ON_OFF,
444 .active_low = 0,
445 .wakeup = 0,
446 .debounce_interval = 5, /* ms */
447 .desc = "on/off button",
448 },
449};
450
451static struct gpio_keys_platform_data gpio_keys_platform_data = {
452 .buttons = gpio_keys_button,
453 .nbuttons = ARRAY_SIZE(gpio_keys_button),
454 .rep = 0,
455};
456
457static struct platform_device raumfeld_gpio_keys_device = {
458 .name = "gpio-keys",
459 .id = -1,
460 .dev = {
461 .platform_data = &gpio_keys_platform_data,
462 }
463};
464
465/**
466 * GPIO LEDs
467 */
468
469static struct gpio_led raumfeld_leds[] = {
470 {
471 .name = "raumfeld:1",
472 .gpio = GPIO_LED1,
473 .active_low = 1,
474 .default_state = LEDS_GPIO_DEFSTATE_ON,
475 },
476 {
477 .name = "raumfeld:2",
478 .gpio = GPIO_LED2,
479 .active_low = 0,
480 .default_state = LEDS_GPIO_DEFSTATE_OFF,
481 }
482};
483
484static struct gpio_led_platform_data raumfeld_led_platform_data = {
485 .leds = raumfeld_leds,
486 .num_leds = ARRAY_SIZE(raumfeld_leds),
487};
488
489static struct platform_device raumfeld_led_device = {
490 .name = "leds-gpio",
491 .id = -1,
492 .dev = {
493 .platform_data = &raumfeld_led_platform_data,
494 },
495};
496
497/**
498 * One-wire (W1 bus) support
499 */
500
501static void w1_enable_external_pullup(int enable)
502{
503 gpio_set_value(GPIO_W1_PULLUP_ENABLE, enable);
504 msleep(100);
505}
506
507static struct w1_gpio_platform_data w1_gpio_platform_data = {
508 .pin = GPIO_ONE_WIRE,
509 .is_open_drain = 0,
510 .enable_external_pullup = w1_enable_external_pullup,
511};
512
513struct platform_device raumfeld_w1_gpio_device = {
514 .name = "w1-gpio",
515 .dev = {
516 .platform_data = &w1_gpio_platform_data
517 }
518};
519
520static void __init raumfeld_w1_init(void)
521{
522 int ret = gpio_request(GPIO_W1_PULLUP_ENABLE,
523 "W1 external pullup enable");
524
525 if (ret < 0)
526 pr_warning("Unable to request GPIO_W1_PULLUP_ENABLE\n");
527 else
528 gpio_direction_output(GPIO_W1_PULLUP_ENABLE, 0);
529
530 platform_device_register(&raumfeld_w1_gpio_device);
531}
532
533/**
534 * Framebuffer device
535 */
536
537/* PWM controlled backlight */
538static struct platform_pwm_backlight_data raumfeld_pwm_backlight_data = {
539 .pwm_id = 0,
540 .max_brightness = 100,
541 .dft_brightness = 100,
542 /* 10000 ns = 10 ms ^= 100 kHz */
543 .pwm_period_ns = 10000,
544};
545
546static struct platform_device raumfeld_pwm_backlight_device = {
547 .name = "pwm-backlight",
548 .dev = {
549 .parent = &pxa27x_device_pwm0.dev,
550 .platform_data = &raumfeld_pwm_backlight_data,
551 }
552};
553
554/* LT3593 controlled backlight */
555static struct gpio_led raumfeld_lt3593_led = {
556 .name = "backlight",
557 .gpio = mfp_to_gpio(MFP_PIN_GPIO17),
558 .default_state = LEDS_GPIO_DEFSTATE_ON,
559};
560
561static struct gpio_led_platform_data raumfeld_lt3593_platform_data = {
562 .leds = &raumfeld_lt3593_led,
563 .num_leds = 1,
564};
565
566static struct platform_device raumfeld_lt3593_device = {
567 .name = "leds-lt3593",
568 .id = -1,
569 .dev = {
570 .platform_data = &raumfeld_lt3593_platform_data,
571 },
572};
573
574static struct pxafb_mode_info sharp_lq043t3dx02_mode = {
575 .pixclock = 111000,
576 .xres = 480,
577 .yres = 272,
578 .bpp = 16,
579 .hsync_len = 4,
580 .left_margin = 2,
581 .right_margin = 1,
582 .vsync_len = 1,
583 .upper_margin = 3,
584 .lower_margin = 1,
585 .sync = 0,
586};
587
588static struct pxafb_mach_info raumfeld_sharp_lcd_info = {
589 .modes = &sharp_lq043t3dx02_mode,
590 .num_modes = 1,
591 .video_mem_size = 0x400000,
592 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
593};
594
595static void __init raumfeld_lcd_init(void)
596{
597 int ret;
598
599 set_pxa_fb_info(&raumfeld_sharp_lcd_info);
600
601 /* Earlier devices had the backlight regulator controlled
602 * via PWM, later versions use another controller for that */
603 if ((system_rev & 0xff) < 2) {
604 mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
605 pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
606 platform_device_register(&raumfeld_pwm_backlight_device);
607 } else
608 platform_device_register(&raumfeld_lt3593_device);
609
610 ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable");
611 if (ret < 0)
612 pr_warning("Unable to request GPIO_TFT_VA_EN\n");
613 else
614 gpio_direction_output(GPIO_TFT_VA_EN, 1);
615
616 ret = gpio_request(GPIO_DISPLAY_ENABLE, "display enable");
617 if (ret < 0)
618 pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
619 else
620 gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
621}
622
623/**
624 * SPI devices
625 */
626
627struct spi_gpio_platform_data raumfeld_spi_platform_data = {
628 .sck = GPIO_SPI_CLK,
629 .mosi = GPIO_SPI_MOSI,
630 .miso = GPIO_SPI_MISO,
631 .num_chipselect = 3,
632};
633
634static struct platform_device raumfeld_spi_device = {
635 .name = "spi_gpio",
636 .id = 0,
637 .dev = {
638 .platform_data = &raumfeld_spi_platform_data,
639 }
640};
641
642static struct lis3lv02d_platform_data lis3_pdata = {
643 .click_flags = LIS3_CLICK_SINGLE_X |
644 LIS3_CLICK_SINGLE_Y |
645 LIS3_CLICK_SINGLE_Z,
646 .irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
647 .wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
648 LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
649 LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
650 .wakeup_thresh = 10,
651 .click_thresh_x = 10,
652 .click_thresh_y = 10,
653 .click_thresh_z = 10,
654};
655
656#define SPI_AK4104 \
657{ \
658 .modalias = "ak4104", \
659 .max_speed_hz = 10000, \
660 .bus_num = 0, \
661 .chip_select = 0, \
662 .controller_data = (void *) GPIO_SPDIF_CS, \
663}
664
665#define SPI_LIS3 \
666{ \
667 .modalias = "lis3lv02d_spi", \
668 .max_speed_hz = 1000000, \
669 .bus_num = 0, \
670 .chip_select = 1, \
671 .controller_data = (void *) GPIO_ACCEL_CS, \
672 .platform_data = &lis3_pdata, \
673 .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \
674}
675
676#define SPI_DAC7512 \
677{ \
678 .modalias = "dac7512", \
679 .max_speed_hz = 1000000, \
680 .bus_num = 0, \
681 .chip_select = 2, \
682 .controller_data = (void *) GPIO_MCLK_DAC_CS, \
683}
684
685static struct spi_board_info connector_spi_devices[] __initdata = {
686 SPI_AK4104,
687 SPI_DAC7512,
688};
689
690static struct spi_board_info speaker_spi_devices[] __initdata = {
691 SPI_DAC7512,
692};
693
694static struct spi_board_info controller_spi_devices[] __initdata = {
695 SPI_LIS3,
696};
697
698/**
699 * MMC for Marvell Libertas 8688 via SDIO
700 */
701
702static int raumfeld_mci_init(struct device *dev, irq_handler_t isr, void *data)
703{
704 gpio_set_value(GPIO_W2W_RESET, 1);
705 gpio_set_value(GPIO_W2W_PDN, 1);
706
707 return 0;
708}
709
710static void raumfeld_mci_exit(struct device *dev, void *data)
711{
712 gpio_set_value(GPIO_W2W_RESET, 0);
713 gpio_set_value(GPIO_W2W_PDN, 0);
714}
715
716static struct pxamci_platform_data raumfeld_mci_platform_data = {
717 .init = raumfeld_mci_init,
718 .exit = raumfeld_mci_exit,
719 .detect_delay = 20,
720 .gpio_card_detect = -1,
721 .gpio_card_ro = -1,
722 .gpio_power = -1,
723};
724
725/*
726 * External power / charge logic
727 */
728
729static int power_supply_init(struct device *dev)
730{
731 return 0;
732}
733
734static void power_supply_exit(struct device *dev)
735{
736}
737
738static int raumfeld_is_ac_online(void)
739{
740 return !gpio_get_value(GPIO_CHARGE_DC_OK);
741}
742
743static int raumfeld_is_usb_online(void)
744{
745 return 0;
746}
747
748static char *raumfeld_power_supplicants[] = { "ds2760-battery.0" };
749
750static struct pda_power_pdata power_supply_info = {
751 .init = power_supply_init,
752 .is_ac_online = raumfeld_is_ac_online,
753 .is_usb_online = raumfeld_is_usb_online,
754 .exit = power_supply_exit,
755 .supplied_to = raumfeld_power_supplicants,
756 .num_supplicants = ARRAY_SIZE(raumfeld_power_supplicants)
757};
758
759static struct resource power_supply_resources[] = {
760 {
761 .name = "ac",
762 .flags = IORESOURCE_IRQ |
763 IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE,
764 .start = GPIO_CHARGE_DC_OK,
765 .end = GPIO_CHARGE_DC_OK,
766 },
767};
768
769static irqreturn_t charge_done_irq(int irq, void *dev_id)
770{
771 struct power_supply *psy;
772
773 psy = power_supply_get_by_name("ds2760-battery.0");
774
775 if (psy)
776 power_supply_set_battery_charged(psy);
777
778 return IRQ_HANDLED;
779}
780
781static struct platform_device raumfeld_power_supply = {
782 .name = "pda-power",
783 .id = -1,
784 .dev = {
785 .platform_data = &power_supply_info,
786 },
787 .resource = power_supply_resources,
788 .num_resources = ARRAY_SIZE(power_supply_resources),
789};
790
791static void __init raumfeld_power_init(void)
792{
793 int ret;
794
795 /* Set PEN2 high to enable maximum charge current */
796 ret = gpio_request(GPIO_CHRG_PEN2, "CHRG_PEN2");
797 if (ret < 0)
798 pr_warning("Unable to request GPIO_CHRG_PEN2\n");
799 else
800 gpio_direction_output(GPIO_CHRG_PEN2, 1);
801
802 ret = gpio_request(GPIO_CHARGE_DC_OK, "CABLE_DC_OK");
803 if (ret < 0)
804 pr_warning("Unable to request GPIO_CHARGE_DC_OK\n");
805
806 ret = gpio_request(GPIO_CHARGE_USB_SUSP, "CHARGE_USB_SUSP");
807 if (ret < 0)
808 pr_warning("Unable to request GPIO_CHARGE_USB_SUSP\n");
809 else
810 gpio_direction_output(GPIO_CHARGE_USB_SUSP, 0);
811
812 power_supply_resources[0].start = gpio_to_irq(GPIO_CHARGE_DC_OK);
813 power_supply_resources[0].end = gpio_to_irq(GPIO_CHARGE_DC_OK);
814
815 ret = request_irq(gpio_to_irq(GPIO_CHARGE_DONE),
816 &charge_done_irq, IORESOURCE_IRQ_LOWEDGE,
817 "charge_done", NULL);
818
819 if (ret < 0)
820 printk(KERN_ERR "%s: unable to register irq %d\n", __func__,
821 GPIO_CHARGE_DONE);
822 else
823 platform_device_register(&raumfeld_power_supply);
824}
825
826/* Fixed regulator for AUDIO_VA, 0-0048 maps to the cs4270 codec device */
827
828static struct regulator_consumer_supply audio_va_consumer_supply =
829 REGULATOR_SUPPLY("va", "0-0048");
830
831struct regulator_init_data audio_va_initdata = {
832 .consumer_supplies = &audio_va_consumer_supply,
833 .num_consumer_supplies = 1,
834 .constraints = {
835 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
836 },
837};
838
839static struct fixed_voltage_config audio_va_config = {
840 .supply_name = "audio_va",
841 .microvolts = 5000000,
842 .gpio = GPIO_AUDIO_VA_ENABLE,
843 .enable_high = 1,
844 .enabled_at_boot = 0,
845 .init_data = &audio_va_initdata,
846};
847
848static struct platform_device audio_va_device = {
849 .name = "reg-fixed-voltage",
850 .id = 0,
851 .dev = {
852 .platform_data = &audio_va_config,
853 },
854};
855
856/* Dummy supplies for Codec's VD/VLC */
857
858static struct regulator_consumer_supply audio_dummy_supplies[] = {
859 REGULATOR_SUPPLY("vd", "0-0048"),
860 REGULATOR_SUPPLY("vlc", "0-0048"),
861};
862
863struct regulator_init_data audio_dummy_initdata = {
864 .consumer_supplies = audio_dummy_supplies,
865 .num_consumer_supplies = ARRAY_SIZE(audio_dummy_supplies),
866 .constraints = {
867 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
868 },
869};
870
871static struct fixed_voltage_config audio_dummy_config = {
872 .supply_name = "audio_vd",
873 .microvolts = 3300000,
874 .gpio = -1,
875 .init_data = &audio_dummy_initdata,
876};
877
878static struct platform_device audio_supply_dummy_device = {
879 .name = "reg-fixed-voltage",
880 .id = 1,
881 .dev = {
882 .platform_data = &audio_dummy_config,
883 },
884};
885
886static struct platform_device *audio_regulator_devices[] = {
887 &audio_va_device,
888 &audio_supply_dummy_device,
889};
890
891/**
892 * Regulator support via MAX8660
893 */
894
895static struct regulator_consumer_supply vcc_mmc_supply =
896 REGULATOR_SUPPLY("vmmc", "pxa2xx-mci.0");
897
898static struct regulator_init_data vcc_mmc_init_data = {
899 .constraints = {
900 .min_uV = 3300000,
901 .max_uV = 3300000,
902 .valid_modes_mask = REGULATOR_MODE_NORMAL,
903 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
904 REGULATOR_CHANGE_VOLTAGE |
905 REGULATOR_CHANGE_MODE,
906 },
907 .consumer_supplies = &vcc_mmc_supply,
908 .num_consumer_supplies = 1,
909};
910
911struct max8660_subdev_data max8660_v6_subdev_data = {
912 .id = MAX8660_V6,
913 .name = "vmmc",
914 .platform_data = &vcc_mmc_init_data,
915};
916
917static struct max8660_platform_data max8660_pdata = {
918 .subdevs = &max8660_v6_subdev_data,
919 .num_subdevs = 1,
920};
921
922/**
923 * I2C devices
924 */
925
926static struct i2c_board_info raumfeld_pwri2c_board_info = {
927 .type = "max8660",
928 .addr = 0x34,
929 .platform_data = &max8660_pdata,
930};
931
932static struct i2c_board_info raumfeld_connector_i2c_board_info __initdata = {
933 .type = "cs4270",
934 .addr = 0x48,
935};
936
937static struct eeti_ts_platform_data eeti_ts_pdata = {
938 .irq_active_high = 1,
939};
940
941static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
942 .type = "eeti_ts",
943 .addr = 0x0a,
944 .irq = gpio_to_irq(GPIO_TOUCH_IRQ),
945 .platform_data = &eeti_ts_pdata,
946};
947
948static struct platform_device *raumfeld_common_devices[] = {
949 &raumfeld_gpio_keys_device,
950 &raumfeld_led_device,
951 &raumfeld_spi_device,
952};
953
954static void __init raumfeld_audio_init(void)
955{
956 int ret;
957
958 ret = gpio_request(GPIO_CODEC_RESET, "cs4270 reset");
959 if (ret < 0)
960 pr_warning("unable to request GPIO_CODEC_RESET\n");
961 else
962 gpio_direction_output(GPIO_CODEC_RESET, 1);
963
964 ret = gpio_request(GPIO_SPDIF_RESET, "ak4104 s/pdif reset");
965 if (ret < 0)
966 pr_warning("unable to request GPIO_SPDIF_RESET\n");
967 else
968 gpio_direction_output(GPIO_SPDIF_RESET, 1);
969
970 ret = gpio_request(GPIO_MCLK_RESET, "MCLK reset");
971 if (ret < 0)
972 pr_warning("unable to request GPIO_MCLK_RESET\n");
973 else
974 gpio_direction_output(GPIO_MCLK_RESET, 1);
975
976 platform_add_devices(ARRAY_AND_SIZE(audio_regulator_devices));
977}
978
979static void __init raumfeld_common_init(void)
980{
981 int ret;
982
983 /* The on/off button polarity has changed after revision 1 */
984 if ((system_rev & 0xff) > 1) {
985 int i;
986
987 for (i = 0; i < ARRAY_SIZE(gpio_keys_button); i++)
988 if (!strcmp(gpio_keys_button[i].desc, "on/off button"))
989 gpio_keys_button[i].active_low = 1;
990 }
991
992 enable_irq_wake(IRQ_WAKEUP0);
993
994 pxa3xx_set_nand_info(&raumfeld_nand_info);
995 pxa3xx_set_i2c_power_info(NULL);
996 pxa_set_ohci_info(&raumfeld_ohci_info);
997 pxa_set_mci_info(&raumfeld_mci_platform_data);
998 pxa_set_i2c_info(NULL);
999 pxa_set_ffuart_info(NULL);
1000
1001 ret = gpio_request(GPIO_W2W_RESET, "Wi2Wi reset");
1002 if (ret < 0)
1003 pr_warning("Unable to request GPIO_W2W_RESET\n");
1004 else
1005 gpio_direction_output(GPIO_W2W_RESET, 0);
1006
1007 ret = gpio_request(GPIO_W2W_PDN, "Wi2Wi powerup");
1008 if (ret < 0)
1009 pr_warning("Unable to request GPIO_W2W_PDN\n");
1010 else
1011 gpio_direction_output(GPIO_W2W_PDN, 0);
1012
1013 /* this can be used to switch off the device */
1014 ret = gpio_request(GPIO_SHUTDOWN_SUPPLY,
1015 "supply shutdown");
1016 if (ret < 0)
1017 pr_warning("Unable to request GPIO_SHUTDOWN_SUPPLY\n");
1018 else
1019 gpio_direction_output(GPIO_SHUTDOWN_SUPPLY, 0);
1020
1021 platform_add_devices(ARRAY_AND_SIZE(raumfeld_common_devices));
1022 i2c_register_board_info(1, &raumfeld_pwri2c_board_info, 1);
1023}
1024
1025static void __init raumfeld_controller_init(void)
1026{
1027 int ret;
1028
1029 pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_controller_pin_config));
1030 platform_device_register(&rotary_encoder_device);
1031 spi_register_board_info(ARRAY_AND_SIZE(controller_spi_devices));
1032 i2c_register_board_info(0, &raumfeld_controller_i2c_board_info, 1);
1033
1034 ret = gpio_request(GPIO_SHUTDOWN_BATT, "battery shutdown");
1035 if (ret < 0)
1036 pr_warning("Unable to request GPIO_SHUTDOWN_BATT\n");
1037 else
1038 gpio_direction_output(GPIO_SHUTDOWN_BATT, 0);
1039
1040 raumfeld_common_init();
1041 raumfeld_power_init();
1042 raumfeld_lcd_init();
1043 raumfeld_w1_init();
1044}
1045
1046static void __init raumfeld_connector_init(void)
1047{
1048 pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_connector_pin_config));
1049 spi_register_board_info(ARRAY_AND_SIZE(connector_spi_devices));
1050 i2c_register_board_info(0, &raumfeld_connector_i2c_board_info, 1);
1051
1052 platform_device_register(&smc91x_device);
1053
1054 raumfeld_audio_init();
1055 raumfeld_common_init();
1056}
1057
1058static void __init raumfeld_speaker_init(void)
1059{
1060 pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_speaker_pin_config));
1061 spi_register_board_info(ARRAY_AND_SIZE(speaker_spi_devices));
1062 i2c_register_board_info(0, &raumfeld_connector_i2c_board_info, 1);
1063
1064 platform_device_register(&smc91x_device);
1065 platform_device_register(&rotary_encoder_device);
1066
1067 raumfeld_audio_init();
1068 raumfeld_common_init();
1069}
1070
1071/* physical memory regions */
1072#define RAUMFELD_SDRAM_BASE 0xa0000000 /* SDRAM region */
1073
1074#ifdef CONFIG_MACH_RAUMFELD_RC
1075MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
1076 .phys_io = 0x40000000,
1077 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1078 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1079 .init_machine = raumfeld_controller_init,
1080 .map_io = pxa_map_io,
1081 .init_irq = pxa3xx_init_irq,
1082 .timer = &pxa_timer,
1083MACHINE_END
1084#endif
1085
1086#ifdef CONFIG_MACH_RAUMFELD_CONNECTOR
1087MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
1088 .phys_io = 0x40000000,
1089 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1090 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1091 .init_machine = raumfeld_connector_init,
1092 .map_io = pxa_map_io,
1093 .init_irq = pxa3xx_init_irq,
1094 .timer = &pxa_timer,
1095MACHINE_END
1096#endif
1097
1098#ifdef CONFIG_MACH_RAUMFELD_SPEAKER
1099MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
1100 .phys_io = 0x40000000,
1101 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
1102 .boot_params = RAUMFELD_SDRAM_BASE + 0x100,
1103 .init_machine = raumfeld_speaker_init,
1104 .map_io = pxa_map_io,
1105 .init_irq = pxa3xx_init_irq,
1106 .timer = &pxa_timer,
1107MACHINE_END
1108#endif
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 67229a1ef55c..463d874bb867 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -900,7 +900,7 @@ static struct platform_suspend_ops sharpsl_pm_ops = {
900}; 900};
901#endif 901#endif
902 902
903static int __init sharpsl_pm_probe(struct platform_device *pdev) 903static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
904{ 904{
905 int ret; 905 int ret;
906 906
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 28352c0b8c34..19b5109d9808 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -56,25 +56,7 @@ static unsigned long spitz_pin_config[] __initdata = {
56 GPIO80_nCS_4, /* SCOOP #1 */ 56 GPIO80_nCS_4, /* SCOOP #1 */
57 57
58 /* LCD - 16bpp Active TFT */ 58 /* LCD - 16bpp Active TFT */
59 GPIO58_LCD_LDD_0, 59 GPIOxx_LCD_TFT_16BPP,
60 GPIO59_LCD_LDD_1,
61 GPIO60_LCD_LDD_2,
62 GPIO61_LCD_LDD_3,
63 GPIO62_LCD_LDD_4,
64 GPIO63_LCD_LDD_5,
65 GPIO64_LCD_LDD_6,
66 GPIO65_LCD_LDD_7,
67 GPIO66_LCD_LDD_8,
68 GPIO67_LCD_LDD_9,
69 GPIO68_LCD_LDD_10,
70 GPIO69_LCD_LDD_11,
71 GPIO70_LCD_LDD_12,
72 GPIO71_LCD_LDD_13,
73 GPIO72_LCD_LDD_14,
74 GPIO73_LCD_LDD_15,
75 GPIO74_LCD_FCLK,
76 GPIO75_LCD_LCLK,
77 GPIO76_LCD_PCLK,
78 60
79 /* PC Card */ 61 /* PC Card */
80 GPIO48_nPOE, 62 GPIO48_nPOE,
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 9ebe658590fa..a81d6dbf662d 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -35,6 +35,8 @@
35#include <mach/ssp.h> 35#include <mach/ssp.h>
36#include <mach/regs-ssp.h> 36#include <mach/regs-ssp.h>
37 37
38#ifdef CONFIG_PXA_SSP_LEGACY
39
38#define TIMEOUT 100000 40#define TIMEOUT 100000
39 41
40static irqreturn_t ssp_interrupt(int irq, void *dev_id) 42static irqreturn_t ssp_interrupt(int irq, void *dev_id)
@@ -303,6 +305,7 @@ void ssp_exit(struct ssp_dev *dev)
303 clk_disable(ssp->clk); 305 clk_disable(ssp->clk);
304 ssp_free(ssp); 306 ssp_free(ssp);
305} 307}
308#endif /* CONFIG_PXA_SSP_LEGACY */
306 309
307static DEFINE_MUTEX(ssp_lock); 310static DEFINE_MUTEX(ssp_lock);
308static LIST_HEAD(ssp_list); 311static LIST_HEAD(ssp_list);
@@ -488,6 +491,7 @@ static void __exit pxa_ssp_exit(void)
488arch_initcall(pxa_ssp_init); 491arch_initcall(pxa_ssp_init);
489module_exit(pxa_ssp_exit); 492module_exit(pxa_ssp_exit);
490 493
494#ifdef CONFIG_PXA_SSP_LEGACY
491EXPORT_SYMBOL(ssp_write_word); 495EXPORT_SYMBOL(ssp_write_word);
492EXPORT_SYMBOL(ssp_read_word); 496EXPORT_SYMBOL(ssp_read_word);
493EXPORT_SYMBOL(ssp_flush); 497EXPORT_SYMBOL(ssp_flush);
@@ -498,6 +502,7 @@ EXPORT_SYMBOL(ssp_restore_state);
498EXPORT_SYMBOL(ssp_init); 502EXPORT_SYMBOL(ssp_init);
499EXPORT_SYMBOL(ssp_exit); 503EXPORT_SYMBOL(ssp_exit);
500EXPORT_SYMBOL(ssp_config); 504EXPORT_SYMBOL(ssp_config);
505#endif
501 506
502MODULE_DESCRIPTION("PXA SSP driver"); 507MODULE_DESCRIPTION("PXA SSP driver");
503MODULE_AUTHOR("Liam Girdwood"); 508MODULE_AUTHOR("Liam Girdwood");
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 750c448db672..293e40aeaf29 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -76,14 +76,12 @@ pxa_ost0_interrupt(int irq, void *dev_id)
76static int 76static int
77pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev) 77pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
78{ 78{
79 unsigned long flags, next, oscr; 79 unsigned long next, oscr;
80 80
81 raw_local_irq_save(flags);
82 OIER |= OIER_E0; 81 OIER |= OIER_E0;
83 next = OSCR + delta; 82 next = OSCR + delta;
84 OSMR0 = next; 83 OSMR0 = next;
85 oscr = OSCR; 84 oscr = OSCR;
86 raw_local_irq_restore(flags);
87 85
88 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; 86 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
89} 87}
@@ -91,23 +89,17 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
91static void 89static void
92pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) 90pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
93{ 91{
94 unsigned long irqflags;
95
96 switch (mode) { 92 switch (mode) {
97 case CLOCK_EVT_MODE_ONESHOT: 93 case CLOCK_EVT_MODE_ONESHOT:
98 raw_local_irq_save(irqflags);
99 OIER &= ~OIER_E0; 94 OIER &= ~OIER_E0;
100 OSSR = OSSR_M0; 95 OSSR = OSSR_M0;
101 raw_local_irq_restore(irqflags);
102 break; 96 break;
103 97
104 case CLOCK_EVT_MODE_UNUSED: 98 case CLOCK_EVT_MODE_UNUSED:
105 case CLOCK_EVT_MODE_SHUTDOWN: 99 case CLOCK_EVT_MODE_SHUTDOWN:
106 /* initializing, released, or preparing for suspend */ 100 /* initializing, released, or preparing for suspend */
107 raw_local_irq_save(irqflags);
108 OIER &= ~OIER_E0; 101 OIER &= ~OIER_E0;
109 OSSR = OSSR_M0; 102 OSSR = OSSR_M0;
110 raw_local_irq_restore(irqflags);
111 break; 103 break;
112 104
113 case CLOCK_EVT_MODE_RESUME: 105 case CLOCK_EVT_MODE_RESUME:
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index c854c168a451..ad552791c4ce 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -32,6 +32,7 @@
32#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/pda_power.h> 33#include <linux/pda_power.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/input/matrix_keypad.h>
35 36
36#include <asm/setup.h> 37#include <asm/setup.h>
37#include <asm/mach-types.h> 38#include <asm/mach-types.h>
@@ -131,24 +132,24 @@ static unsigned long tosa_pin_config[] = {
131 GPIO45_BTUART_RTS, 132 GPIO45_BTUART_RTS,
132 133
133 /* Keybd */ 134 /* Keybd */
134 GPIO58_GPIO | MFP_LPM_DRIVE_LOW, 135 GPIO58_GPIO | MFP_LPM_DRIVE_LOW, /* Column 0 */
135 GPIO59_GPIO | MFP_LPM_DRIVE_LOW, 136 GPIO59_GPIO | MFP_LPM_DRIVE_LOW, /* Column 1 */
136 GPIO60_GPIO | MFP_LPM_DRIVE_LOW, 137 GPIO60_GPIO | MFP_LPM_DRIVE_LOW, /* Column 2 */
137 GPIO61_GPIO | MFP_LPM_DRIVE_LOW, 138 GPIO61_GPIO | MFP_LPM_DRIVE_LOW, /* Column 3 */
138 GPIO62_GPIO | MFP_LPM_DRIVE_LOW, 139 GPIO62_GPIO | MFP_LPM_DRIVE_LOW, /* Column 4 */
139 GPIO63_GPIO | MFP_LPM_DRIVE_LOW, 140 GPIO63_GPIO | MFP_LPM_DRIVE_LOW, /* Column 5 */
140 GPIO64_GPIO | MFP_LPM_DRIVE_LOW, 141 GPIO64_GPIO | MFP_LPM_DRIVE_LOW, /* Column 6 */
141 GPIO65_GPIO | MFP_LPM_DRIVE_LOW, 142 GPIO65_GPIO | MFP_LPM_DRIVE_LOW, /* Column 7 */
142 GPIO66_GPIO | MFP_LPM_DRIVE_LOW, 143 GPIO66_GPIO | MFP_LPM_DRIVE_LOW, /* Column 8 */
143 GPIO67_GPIO | MFP_LPM_DRIVE_LOW, 144 GPIO67_GPIO | MFP_LPM_DRIVE_LOW, /* Column 9 */
144 GPIO68_GPIO | MFP_LPM_DRIVE_LOW, 145 GPIO68_GPIO | MFP_LPM_DRIVE_LOW, /* Column 10 */
145 GPIO69_GPIO | MFP_LPM_DRIVE_LOW, 146 GPIO69_GPIO | MFP_LPM_DRIVE_LOW, /* Row 0 */
146 GPIO70_GPIO | MFP_LPM_DRIVE_LOW, 147 GPIO70_GPIO | MFP_LPM_DRIVE_LOW, /* Row 1 */
147 GPIO71_GPIO | MFP_LPM_DRIVE_LOW, 148 GPIO71_GPIO | MFP_LPM_DRIVE_LOW, /* Row 2 */
148 GPIO72_GPIO | MFP_LPM_DRIVE_LOW, 149 GPIO72_GPIO | MFP_LPM_DRIVE_LOW, /* Row 3 */
149 GPIO73_GPIO | MFP_LPM_DRIVE_LOW, 150 GPIO73_GPIO | MFP_LPM_DRIVE_LOW, /* Row 4 */
150 GPIO74_GPIO | MFP_LPM_DRIVE_LOW, 151 GPIO74_GPIO | MFP_LPM_DRIVE_LOW, /* Row 5 */
151 GPIO75_GPIO | MFP_LPM_DRIVE_LOW, 152 GPIO75_GPIO | MFP_LPM_DRIVE_LOW, /* Row 6 */
152 153
153 /* SPI */ 154 /* SPI */
154 GPIO81_SSP2_CLK_OUT, 155 GPIO81_SSP2_CLK_OUT,
@@ -411,9 +412,87 @@ static struct platform_device tosa_power_device = {
411/* 412/*
412 * Tosa Keyboard 413 * Tosa Keyboard
413 */ 414 */
415static const uint32_t tosakbd_keymap[] = {
416 KEY(0, 2, KEY_W),
417 KEY(0, 6, KEY_K),
418 KEY(0, 7, KEY_BACKSPACE),
419 KEY(0, 8, KEY_P),
420 KEY(1, 1, KEY_Q),
421 KEY(1, 2, KEY_E),
422 KEY(1, 3, KEY_T),
423 KEY(1, 4, KEY_Y),
424 KEY(1, 6, KEY_O),
425 KEY(1, 7, KEY_I),
426 KEY(1, 8, KEY_COMMA),
427 KEY(2, 1, KEY_A),
428 KEY(2, 2, KEY_D),
429 KEY(2, 3, KEY_G),
430 KEY(2, 4, KEY_U),
431 KEY(2, 6, KEY_L),
432 KEY(2, 7, KEY_ENTER),
433 KEY(2, 8, KEY_DOT),
434 KEY(3, 1, KEY_Z),
435 KEY(3, 2, KEY_C),
436 KEY(3, 3, KEY_V),
437 KEY(3, 4, KEY_J),
438 KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
439 KEY(3, 6, TOSA_KEY_CANCEL),
440 KEY(3, 7, TOSA_KEY_CENTER),
441 KEY(3, 8, TOSA_KEY_OK),
442 KEY(3, 9, KEY_LEFTSHIFT),
443 KEY(4, 1, KEY_S),
444 KEY(4, 2, KEY_R),
445 KEY(4, 3, KEY_B),
446 KEY(4, 4, KEY_N),
447 KEY(4, 5, TOSA_KEY_CALENDAR),
448 KEY(4, 6, TOSA_KEY_HOMEPAGE),
449 KEY(4, 7, KEY_LEFTCTRL),
450 KEY(4, 8, TOSA_KEY_LIGHT),
451 KEY(4, 10, KEY_RIGHTSHIFT),
452 KEY(5, 1, KEY_TAB),
453 KEY(5, 2, KEY_SLASH),
454 KEY(5, 3, KEY_H),
455 KEY(5, 4, KEY_M),
456 KEY(5, 5, TOSA_KEY_MENU),
457 KEY(5, 7, KEY_UP),
458 KEY(5, 11, TOSA_KEY_FN),
459 KEY(6, 1, KEY_X),
460 KEY(6, 2, KEY_F),
461 KEY(6, 3, KEY_SPACE),
462 KEY(6, 4, KEY_APOSTROPHE),
463 KEY(6, 5, TOSA_KEY_MAIL),
464 KEY(6, 6, KEY_LEFT),
465 KEY(6, 7, KEY_DOWN),
466 KEY(6, 8, KEY_RIGHT),
467};
468
469static struct matrix_keymap_data tosakbd_keymap_data = {
470 .keymap = tosakbd_keymap,
471 .keymap_size = ARRAY_SIZE(tosakbd_keymap),
472};
473
474static const int tosakbd_col_gpios[] =
475 { 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68 };
476static const int tosakbd_row_gpios[] =
477 { 69, 70, 71, 72, 73, 74, 75 };
478
479static struct matrix_keypad_platform_data tosakbd_pdata = {
480 .keymap_data = &tosakbd_keymap_data,
481 .row_gpios = tosakbd_row_gpios,
482 .col_gpios = tosakbd_col_gpios,
483 .num_row_gpios = ARRAY_SIZE(tosakbd_row_gpios),
484 .num_col_gpios = ARRAY_SIZE(tosakbd_col_gpios),
485 .col_scan_delay_us = 10,
486 .debounce_ms = 10,
487 .wakeup = 1,
488};
489
414static struct platform_device tosakbd_device = { 490static struct platform_device tosakbd_device = {
415 .name = "tosa-keyboard", 491 .name = "matrix-keypad",
416 .id = -1, 492 .id = -1,
493 .dev = {
494 .platform_data = &tosakbd_pdata,
495 },
417}; 496};
418 497
419static struct gpio_keys_button tosa_gpio_keys[] = { 498static struct gpio_keys_button tosa_gpio_keys[] = {
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 0aa858ebc573..797f2544d0ce 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -72,27 +72,14 @@ static unsigned long trizeps4_pin_config[] __initdata = {
72 GPIO79_nCS_3, /* Logic CS */ 72 GPIO79_nCS_3, /* Logic CS */
73 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */ 73 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
74 74
75 /* AC97 */
76 GPIO28_AC97_BITCLK,
77 GPIO29_AC97_SDATA_IN_0,
78 GPIO30_AC97_SDATA_OUT,
79 GPIO31_AC97_SYNC,
80
75 /* LCD - 16bpp Active TFT */ 81 /* LCD - 16bpp Active TFT */
76 GPIO58_LCD_LDD_0, 82 GPIOxx_LCD_TFT_16BPP,
77 GPIO59_LCD_LDD_1,
78 GPIO60_LCD_LDD_2,
79 GPIO61_LCD_LDD_3,
80 GPIO62_LCD_LDD_4,
81 GPIO63_LCD_LDD_5,
82 GPIO64_LCD_LDD_6,
83 GPIO65_LCD_LDD_7,
84 GPIO66_LCD_LDD_8,
85 GPIO67_LCD_LDD_9,
86 GPIO68_LCD_LDD_10,
87 GPIO69_LCD_LDD_11,
88 GPIO70_LCD_LDD_12,
89 GPIO71_LCD_LDD_13,
90 GPIO72_LCD_LDD_14,
91 GPIO73_LCD_LDD_15,
92 GPIO74_LCD_FCLK,
93 GPIO75_LCD_LCLK,
94 GPIO76_LCD_PCLK,
95 GPIO77_LCD_BIAS,
96 83
97 /* UART */ 84 /* UART */
98 GPIO9_FFUART_CTS, 85 GPIO9_FFUART_CTS,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 89f258c9e126..1dd13346f977 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -281,7 +281,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
281 do { 281 do {
282 /* we're in a chained irq handler, 282 /* we're in a chained irq handler,
283 * so ack the interrupt by hand */ 283 * so ack the interrupt by hand */
284 GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO); 284 desc->chip->ack(irq);
285 285
286 if (likely(pending)) { 286 if (likely(pending)) {
287 irq = viper_bit_to_irq(__ffs(pending)); 287 irq = viper_bit_to_irq(__ffs(pending));
@@ -711,6 +711,12 @@ static mfp_cfg_t viper_pin_config[] __initdata = {
711 GPIO80_nCS_4, 711 GPIO80_nCS_4,
712 GPIO33_nCS_5, 712 GPIO33_nCS_5,
713 713
714 /* AC97 */
715 GPIO28_AC97_BITCLK,
716 GPIO29_AC97_SDATA_IN_0,
717 GPIO30_AC97_SDATA_OUT,
718 GPIO31_AC97_SYNC,
719
714 /* FP Backlight */ 720 /* FP Backlight */
715 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ 721 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
716 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ 722 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 75f2a37f945d..39896d883584 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -26,6 +26,7 @@
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/i2c/pca953x.h> 27#include <linux/i2c/pca953x.h>
28#include <linux/apm-emulation.h> 28#include <linux/apm-emulation.h>
29#include <linux/can/platform/mcp251x.h>
29 30
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -387,11 +388,47 @@ static struct pxa2xx_spi_master pxa2xx_spi_ssp3_master_info = {
387 .enable_dma = 1, 388 .enable_dma = 1,
388}; 389};
389 390
390static struct platform_device pxa2xx_spi_ssp3_device = { 391/* CAN bus on SPI */
391 .name = "pxa2xx-spi", 392static int zeus_mcp2515_setup(struct spi_device *sdev)
392 .id = 3, 393{
393 .dev = { 394 int err;
394 .platform_data = &pxa2xx_spi_ssp3_master_info, 395
396 err = gpio_request(ZEUS_CAN_SHDN_GPIO, "CAN shutdown");
397 if (err)
398 return err;
399
400 err = gpio_direction_output(ZEUS_CAN_SHDN_GPIO, 1);
401 if (err) {
402 gpio_free(ZEUS_CAN_SHDN_GPIO);
403 return err;
404 }
405
406 return 0;
407}
408
409static int zeus_mcp2515_transceiver_enable(int enable)
410{
411 gpio_set_value(ZEUS_CAN_SHDN_GPIO, !enable);
412 return 0;
413}
414
415static struct mcp251x_platform_data zeus_mcp2515_pdata = {
416 .oscillator_frequency = 16*1000*1000,
417 .model = CAN_MCP251X_MCP2515,
418 .board_specific_setup = zeus_mcp2515_setup,
419 .transceiver_enable = zeus_mcp2515_transceiver_enable,
420 .power_enable = zeus_mcp2515_transceiver_enable,
421};
422
423static struct spi_board_info zeus_spi_board_info[] = {
424 [0] = {
425 .modalias = "mcp251x",
426 .platform_data = &zeus_mcp2515_pdata,
427 .irq = gpio_to_irq(ZEUS_CAN_GPIO),
428 .max_speed_hz = 1*1000*1000,
429 .bus_num = 3,
430 .mode = SPI_MODE_0,
431 .chip_select = 0,
395 }, 432 },
396}; 433};
397 434
@@ -457,15 +494,28 @@ static struct platform_device zeus_pcmcia_device = {
457 }, 494 },
458}; 495};
459 496
497static struct resource zeus_max6369_resource = {
498 .start = ZEUS_CPLD_EXTWDOG_PHYS,
499 .end = ZEUS_CPLD_EXTWDOG_PHYS,
500 .flags = IORESOURCE_MEM,
501};
502
503struct platform_device zeus_max6369_device = {
504 .name = "max6369_wdt",
505 .id = -1,
506 .resource = &zeus_max6369_resource,
507 .num_resources = 1,
508};
509
460static struct platform_device *zeus_devices[] __initdata = { 510static struct platform_device *zeus_devices[] __initdata = {
461 &zeus_serial_device, 511 &zeus_serial_device,
462 &zeus_mtd_devices[0], 512 &zeus_mtd_devices[0],
463 &zeus_dm9k0_device, 513 &zeus_dm9k0_device,
464 &zeus_dm9k1_device, 514 &zeus_dm9k1_device,
465 &zeus_sram_device, 515 &zeus_sram_device,
466 &pxa2xx_spi_ssp3_device,
467 &zeus_leds_device, 516 &zeus_leds_device,
468 &zeus_pcmcia_device, 517 &zeus_pcmcia_device,
518 &zeus_max6369_device,
469}; 519};
470 520
471/* AC'97 */ 521/* AC'97 */
@@ -509,7 +559,9 @@ static void zeus_ohci_exit(struct device *dev)
509 559
510static struct pxaohci_platform_data zeus_ohci_platform_data = { 560static struct pxaohci_platform_data zeus_ohci_platform_data = {
511 .port_mode = PMM_NPS_MODE, 561 .port_mode = PMM_NPS_MODE,
512 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, 562 /* Clear Power Control Polarity Low and set Power Sense
563 * Polarity Low. Supply power to USB ports. */
564 .flags = ENABLE_PORT_ALL | POWER_SENSE_LOW,
513 .init = zeus_ohci_init, 565 .init = zeus_ohci_init,
514 .exit = zeus_ohci_exit, 566 .exit = zeus_ohci_exit,
515}; 567};
@@ -621,11 +673,15 @@ static struct pxa2xx_udc_mach_info zeus_udc_info = {
621 .udc_command = zeus_udc_command, 673 .udc_command = zeus_udc_command,
622}; 674};
623 675
676#ifdef CONFIG_PM
624static void zeus_power_off(void) 677static void zeus_power_off(void)
625{ 678{
626 local_irq_disable(); 679 local_irq_disable();
627 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); 680 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
628} 681}
682#else
683#define zeus_power_off NULL
684#endif
629 685
630#ifdef CONFIG_APM_EMULATION 686#ifdef CONFIG_APM_EMULATION
631static void zeus_get_power_status(struct apm_power_info *info) 687static void zeus_get_power_status(struct apm_power_info *info)
@@ -706,6 +762,12 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
706}; 762};
707 763
708static mfp_cfg_t zeus_pin_config[] __initdata = { 764static mfp_cfg_t zeus_pin_config[] __initdata = {
765 /* AC97 */
766 GPIO28_AC97_BITCLK,
767 GPIO29_AC97_SDATA_IN_0,
768 GPIO30_AC97_SDATA_OUT,
769 GPIO31_AC97_SYNC,
770
709 GPIO15_nCS_1, 771 GPIO15_nCS_1,
710 GPIO78_nCS_2, 772 GPIO78_nCS_2,
711 GPIO80_nCS_4, 773 GPIO80_nCS_4,
@@ -731,6 +793,11 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
731 GPIO104_CIF_DD_2, 793 GPIO104_CIF_DD_2,
732 GPIO105_CIF_DD_1, 794 GPIO105_CIF_DD_1,
733 795
796 GPIO81_SSP3_TXD,
797 GPIO82_SSP3_RXD,
798 GPIO83_SSP3_SFRM,
799 GPIO84_SSP3_SCLK,
800
734 GPIO48_nPOE, 801 GPIO48_nPOE,
735 GPIO49_nPWE, 802 GPIO49_nPWE,
736 GPIO50_nPIOR, 803 GPIO50_nPIOR,
@@ -785,6 +852,8 @@ static void __init zeus_init(void)
785 pxa_set_ac97_info(&zeus_ac97_info); 852 pxa_set_ac97_info(&zeus_ac97_info);
786 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
787 i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices)); 854 i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
855 pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
856 spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
788} 857}
789 858
790static struct map_desc zeus_io_desc[] __initdata = { 859static struct map_desc zeus_io_desc[] __initdata = {
@@ -807,12 +876,6 @@ static struct map_desc zeus_io_desc[] __initdata = {
807 .type = MT_DEVICE, 876 .type = MT_DEVICE,
808 }, 877 },
809 { 878 {
810 .virtual = ZEUS_CPLD_EXTWDOG,
811 .pfn = __phys_to_pfn(ZEUS_CPLD_EXTWDOG_PHYS),
812 .length = 0x1000,
813 .type = MT_DEVICE,
814 },
815 {
816 .virtual = ZEUS_PC104IO, 879 .virtual = ZEUS_PC104IO,
817 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), 880 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
818 .length = 0x00800000, 881 .length = 0x00800000,
@@ -837,7 +900,7 @@ static void __init zeus_map_io(void)
837 PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP; 900 PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
838} 901}
839 902
840MACHINE_START(ARCOM_ZEUS, "Arcom ZEUS") 903MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
841 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 904 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
842 .phys_io = 0x40000000, 905 .phys_io = 0x40000000,
843 .io_pg_offst = ((io_p2v(0x40000000) >> 18) & 0xfffc), 906 .io_pg_offst = ((io_p2v(0x40000000) >> 18) & 0xfffc),
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 63b753f56c64..0d8e043804c2 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -21,7 +21,7 @@
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/cpu.h> 23#include <plat/cpu.h>
24#include <plat/dma-plat.h> 24#include <plat/dma-s3c24xx.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
index b7d1f8d27bc2..a3f3c7b1ca38 100644
--- a/arch/arm/mach-s3c2410/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -56,7 +56,7 @@ static const struct rfkill_ops h1940bt_rfkill_ops = {
56 .set_block = h1940bt_set_block, 56 .set_block = h1940bt_set_block,
57}; 57};
58 58
59static int __init h1940bt_probe(struct platform_device *pdev) 59static int __devinit h1940bt_probe(struct platform_device *pdev)
60{ 60{
61 struct rfkill *rfk; 61 struct rfkill *rfk;
62 int ret = 0; 62 int ret = 0;
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-core.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
index f8b879a7973c..acb259103808 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
@@ -15,7 +15,6 @@
15#ifndef __ASM_ARCH_GPIO_CORE_H 15#ifndef __ASM_ARCH_GPIO_CORE_H
16#define __ASM_ARCH_GPIO_CORE_H __FILE__ 16#define __ASM_ARCH_GPIO_CORE_H __FILE__
17 17
18#include <plat/gpio-core.h>
19#include <mach/regs-gpio.h> 18#include <mach/regs-gpio.h>
20 19
21extern struct s3c_gpio_chip s3c24xx_gpios[]; 20extern struct s3c_gpio_chip s3c24xx_gpios[];
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h
index fb45dd9adca5..70a83b209e25 100644
--- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h 1/* linux/arch/arm/mach-s3c2410/include/pm-core.h
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index ebc85c6dadbf..fd672f330bf2 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -406,31 +406,31 @@
406#define S3C2443_GPE5_SD1_CLK (0x02 << 10) 406#define S3C2443_GPE5_SD1_CLK (0x02 << 10)
407#define S3C2400_GPE5_EINT5 (0x02 << 10) 407#define S3C2400_GPE5_EINT5 (0x02 << 10)
408#define S3C2400_GPE5_TCLK1 (0x03 << 10) 408#define S3C2400_GPE5_TCLK1 (0x03 << 10)
409#define S3C2443_GPE5_AC_BITCLK (0x03 << 10)
409 410
410#define S3C2410_GPE6_SDCMD (0x02 << 12) 411#define S3C2410_GPE6_SDCMD (0x02 << 12)
411#define S3C2443_GPE6_SD1_CMD (0x02 << 12) 412#define S3C2443_GPE6_SD1_CMD (0x02 << 12)
412#define S3C2443_GPE6_AC_BITCLK (0x03 << 12) 413#define S3C2443_GPE6_AC_SDI (0x03 << 12)
413#define S3C2400_GPE6_EINT6 (0x02 << 12) 414#define S3C2400_GPE6_EINT6 (0x02 << 12)
414 415
415#define S3C2410_GPE7_SDDAT0 (0x02 << 14) 416#define S3C2410_GPE7_SDDAT0 (0x02 << 14)
416#define S3C2443_GPE5_SD1_DAT0 (0x02 << 14) 417#define S3C2443_GPE5_SD1_DAT0 (0x02 << 14)
417#define S3C2443_GPE7_AC_SDI (0x03 << 14) 418#define S3C2443_GPE7_AC_SDO (0x03 << 14)
418#define S3C2400_GPE7_EINT7 (0x02 << 14) 419#define S3C2400_GPE7_EINT7 (0x02 << 14)
419 420
420#define S3C2410_GPE8_SDDAT1 (0x02 << 16) 421#define S3C2410_GPE8_SDDAT1 (0x02 << 16)
421#define S3C2443_GPE8_SD1_DAT1 (0x02 << 16) 422#define S3C2443_GPE8_SD1_DAT1 (0x02 << 16)
422#define S3C2443_GPE8_AC_SDO (0x03 << 16) 423#define S3C2443_GPE8_AC_SYNC (0x03 << 16)
423#define S3C2400_GPE8_nXDACK0 (0x02 << 16) 424#define S3C2400_GPE8_nXDACK0 (0x02 << 16)
424 425
425#define S3C2410_GPE9_SDDAT2 (0x02 << 18) 426#define S3C2410_GPE9_SDDAT2 (0x02 << 18)
426#define S3C2443_GPE9_SD1_DAT2 (0x02 << 18) 427#define S3C2443_GPE9_SD1_DAT2 (0x02 << 18)
427#define S3C2443_GPE9_AC_SYNC (0x03 << 18) 428#define S3C2443_GPE9_AC_nRESET (0x03 << 18)
428#define S3C2400_GPE9_nXDACK1 (0x02 << 18) 429#define S3C2400_GPE9_nXDACK1 (0x02 << 18)
429#define S3C2400_GPE9_nXBACK (0x03 << 18) 430#define S3C2400_GPE9_nXBACK (0x03 << 18)
430 431
431#define S3C2410_GPE10_SDDAT3 (0x02 << 20) 432#define S3C2410_GPE10_SDDAT3 (0x02 << 20)
432#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20) 433#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20)
433#define S3C2443_GPE10_AC_nRESET (0x03 << 20)
434#define S3C2400_GPE10_nXDREQ0 (0x02 << 20) 434#define S3C2400_GPE10_nXDREQ0 (0x02 << 20)
435 435
436#define S3C2410_GPE11_SPIMISO0 (0x02 << 22) 436#define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 6026d091a2fe..d87ebe0cb625 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -42,23 +42,14 @@
42 42
43#define S3C2443_PLLCON_OFF (1<<24) 43#define S3C2443_PLLCON_OFF (1<<24)
44 44
45#define S3C2443_CLKSRC_I2S_EXT (1<<14)
46#define S3C2443_CLKSRC_I2S_EPLLDIV (0<<14)
47#define S3C2443_CLKSRC_I2S_EPLLREF (2<<14)
48#define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14)
49#define S3C2443_CLKSRC_I2S_MASK (3<<14)
50
51#define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) 45#define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7)
52#define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) 46#define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7)
53#define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) 47#define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7)
54#define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7) 48#define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7)
55#define S3C2443_CLKSRC_EPLLREF_MASK (3<<7) 49#define S3C2443_CLKSRC_EPLLREF_MASK (3<<7)
56 50
57#define S3C2443_CLKSRC_ESYSCLK_EPLL (1<<6)
58#define S3C2443_CLKSRC_MSYSCLK_MPLL (1<<4)
59#define S3C2443_CLKSRC_EXTCLK_DIV (1<<3) 51#define S3C2443_CLKSRC_EXTCLK_DIV (1<<3)
60 52
61#define S3C2443_CLKDIV0_DVS (1<<13)
62#define S3C2443_CLKDIV0_HALF_HCLK (1<<3) 53#define S3C2443_CLKDIV0_HALF_HCLK (1<<3)
63#define S3C2443_CLKDIV0_HALF_PCLK (1<<2) 54#define S3C2443_CLKDIV0_HALF_PCLK (1<<2)
64 55
@@ -81,28 +72,7 @@
81#define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) 72#define S3C2443_CLKDIV0_ARMDIV_12 (13<<9)
82#define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) 73#define S3C2443_CLKDIV0_ARMDIV_16 (15<<9)
83 74
84/* S3C2443_CLKDIV1 */ 75/* S3C2443_CLKDIV1 removed, only used in clock.c code */
85
86#define S3C2443_CLKDIV1_CAMDIV_MASK (15<<26)
87#define S3C2443_CLKDIV1_CAMDIV_SHIFT (26)
88
89#define S3C2443_CLKDIV1_HSSPIDIV_MASK (3<<24)
90#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT (24)
91
92#define S3C2443_CLKDIV1_DISPDIV_MASK (0xff<<16)
93#define S3C2443_CLKDIV1_DISPDIV_SHIFT (16)
94
95#define S3C2443_CLKDIV1_I2SDIV_MASK (15<<12)
96#define S3C2443_CLKDIV1_I2SDIV_SHIFT (12)
97
98#define S3C2443_CLKDIV1_UARTDIV_MASK (15<<8)
99#define S3C2443_CLKDIV1_UARTDIV_SHIFT (8)
100
101#define S3C2443_CLKDIV1_HSMMCDIV_MASK (3<<6)
102#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT (6)
103
104#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4)
105#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4)
106 76
107#define S3C2443_CLKCON_NAND 77#define S3C2443_CLKCON_NAND
108 78
diff --git a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
index 980a099e209c..dcef2287cb38 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
@@ -3,7 +3,7 @@
3 * Copyright (c) 2006 Simtec Electronics 3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C2410 - SPI Controller platfrom_device info 6 * S3C2410 - SPI Controller platform_device info
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/mach/timex.h b/arch/arm/mach-s3c2410/include/mach/timex.h
index 2a425ed0a7e0..fe9ca1ffd51b 100644
--- a/arch/arm/plat-s3c/include/mach/timex.h
+++ b/arch/arm/mach-s3c2410/include/mach/timex.h
@@ -19,8 +19,6 @@
19 * for the time conversion functions to/from jiffies is acceptable. 19 * for the time conversion functions to/from jiffies is acceptable.
20*/ 20*/
21 21
22
23#define CLOCK_TICK_RATE 12000000 22#define CLOCK_TICK_RATE 12000000
24 23
25
26#endif /* __ASM_ARCH_TIMEX_H */ 24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/plat-s3c/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
index 299d95f365c9..315b0078a34d 100644
--- a/arch/arm/plat-s3c/include/mach/vmalloc.h
+++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/mach/vmalloc.h 1/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
2 * 2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h 3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 * 4 *
@@ -15,6 +15,6 @@
15#ifndef __ASM_ARCH_VMALLOC_H 15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H 16#define __ASM_ARCH_VMALLOC_H
17 17
18#define VMALLOC_END (0xe0000000UL) 18#define VMALLOC_END (0xE0000000)
19 19
20#endif /* __ASM_ARCH_VMALLOC_H */ 20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 06a84adfb13f..7047317ed7f4 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -153,7 +153,7 @@ static struct platform_device *amlm5900_devices[] __initdata = {
153 &s3c_device_adc, 153 &s3c_device_adc,
154 &s3c_device_wdt, 154 &s3c_device_wdt,
155 &s3c_device_i2c0, 155 &s3c_device_i2c0,
156 &s3c_device_usb, 156 &s3c_device_ohci,
157 &s3c_device_rtc, 157 &s3c_device_rtc,
158 &s3c_device_usbgadget, 158 &s3c_device_usbgadget,
159 &s3c_device_sdi, 159 &s3c_device_sdi,
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 97162fdd0590..02b1b6220cba 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -584,7 +584,7 @@ static struct s3c_hwmon_pdata bast_hwmon_info = {
584// cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0 584// cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0
585 585
586static struct platform_device *bast_devices[] __initdata = { 586static struct platform_device *bast_devices[] __initdata = {
587 &s3c_device_usb, 587 &s3c_device_ohci,
588 &s3c_device_lcd, 588 &s3c_device_lcd,
589 &s3c_device_wdt, 589 &s3c_device_wdt,
590 &s3c_device_i2c0, 590 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 1e34abe1a19e..fbedd0760941 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -196,7 +196,7 @@ static struct platform_device h1940_device_bluetooth = {
196 .id = -1, 196 .id = -1,
197}; 197};
198 198
199static struct s3c24xx_mci_pdata h1940_mmc_cfg = { 199static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = {
200 .gpio_detect = S3C2410_GPF(5), 200 .gpio_detect = S3C2410_GPF(5),
201 .gpio_wprotect = S3C2410_GPH(8), 201 .gpio_wprotect = S3C2410_GPH(8),
202 .set_power = NULL, 202 .set_power = NULL,
@@ -272,7 +272,7 @@ static struct platform_device h1940_lcd_powerdev = {
272 272
273static struct platform_device *h1940_devices[] __initdata = { 273static struct platform_device *h1940_devices[] __initdata = {
274 &s3c_device_ts, 274 &s3c_device_ts,
275 &s3c_device_usb, 275 &s3c_device_ohci,
276 &s3c_device_lcd, 276 &s3c_device_lcd,
277 &s3c_device_wdt, 277 &s3c_device_wdt,
278 &s3c_device_i2c0, 278 &s3c_device_i2c0,
@@ -311,12 +311,11 @@ static void __init h1940_init(void)
311 u32 tmp; 311 u32 tmp;
312 312
313 s3c24xx_fb_set_platdata(&h1940_fb_info); 313 s3c24xx_fb_set_platdata(&h1940_fb_info);
314 s3c24xx_mci_set_platdata(&h1940_mmc_cfg);
314 s3c24xx_udc_set_platdata(&h1940_udc_cfg); 315 s3c24xx_udc_set_platdata(&h1940_udc_cfg);
315 s3c24xx_ts_set_platdata(&h1940_ts_cfg); 316 s3c24xx_ts_set_platdata(&h1940_ts_cfg);
316 s3c_i2c0_set_platdata(NULL); 317 s3c_i2c0_set_platdata(NULL);
317 318
318 s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg;
319
320 /* Turn off suspend on both USB ports, and switch the 319 /* Turn off suspend on both USB ports, and switch the
321 * selectable USB port to USB device mode. */ 320 * selectable USB port to USB device mode. */
322 321
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 0405712c2263..684710f88142 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -322,7 +322,7 @@ static struct platform_device *n30_devices[] __initdata = {
322 &s3c_device_wdt, 322 &s3c_device_wdt,
323 &s3c_device_i2c0, 323 &s3c_device_i2c0,
324 &s3c_device_iis, 324 &s3c_device_iis,
325 &s3c_device_usb, 325 &s3c_device_ohci,
326 &s3c_device_usbgadget, 326 &s3c_device_usbgadget,
327 &n30_button_device, 327 &n30_button_device,
328 &n30_blue_led, 328 &n30_blue_led,
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f6c7261a4a12..d8c7f2efc1a7 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -92,7 +92,7 @@ static struct platform_device otom_device_nor = {
92/* Standard OTOM devices */ 92/* Standard OTOM devices */
93 93
94static struct platform_device *otom11_devices[] __initdata = { 94static struct platform_device *otom11_devices[] __initdata = {
95 &s3c_device_usb, 95 &s3c_device_ohci,
96 &s3c_device_lcd, 96 &s3c_device_lcd,
97 &s3c_device_wdt, 97 &s3c_device_wdt,
98 &s3c_device_i2c0, 98 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index ab092bcda393..92a4ec375d82 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -246,7 +246,7 @@ static struct platform_device qt2410_spi = {
246/* Board devices */ 246/* Board devices */
247 247
248static struct platform_device *qt2410_devices[] __initdata = { 248static struct platform_device *qt2410_devices[] __initdata = {
249 &s3c_device_usb, 249 &s3c_device_ohci,
250 &s3c_device_lcd, 250 &s3c_device_lcd,
251 &s3c_device_wdt, 251 &s3c_device_wdt,
252 &s3c_device_i2c0, 252 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index c49126ccb1d5..452223042201 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -87,7 +87,7 @@ static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
87}; 87};
88 88
89static struct platform_device *smdk2410_devices[] __initdata = { 89static struct platform_device *smdk2410_devices[] __initdata = {
90 &s3c_device_usb, 90 &s3c_device_ohci,
91 &s3c_device_lcd, 91 &s3c_device_lcd,
92 &s3c_device_wdt, 92 &s3c_device_wdt,
93 &s3c_device_i2c0, 93 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index 8fdb0430bd48..929164a8e9b1 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -129,7 +129,7 @@ static struct platform_device *tct_hammer_devices[] __initdata = {
129 &s3c_device_adc, 129 &s3c_device_adc,
130 &s3c_device_wdt, 130 &s3c_device_wdt,
131 &s3c_device_i2c0, 131 &s3c_device_i2c0,
132 &s3c_device_usb, 132 &s3c_device_ohci,
133 &s3c_device_rtc, 133 &s3c_device_rtc,
134 &s3c_device_usbgadget, 134 &s3c_device_usbgadget,
135 &s3c_device_sdi, 135 &s3c_device_sdi,
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 0d61fb577170..9051f0d31123 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -334,7 +334,7 @@ static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
334/* devices for this board */ 334/* devices for this board */
335 335
336static struct platform_device *vr1000_devices[] __initdata = { 336static struct platform_device *vr1000_devices[] __initdata = {
337 &s3c_device_usb, 337 &s3c_device_ohci,
338 &s3c_device_lcd, 338 &s3c_device_lcd,
339 &s3c_device_wdt, 339 &s3c_device_wdt,
340 &s3c_device_i2c0, 340 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 6b9d0d83a6f9..29bd3d987bec 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -91,7 +91,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
91 } 91 }
92} 92}
93 93
94static struct s3c2410_hcd_info usb_simtec_info = { 94static struct s3c2410_hcd_info usb_simtec_info __initdata = {
95 .port[0] = { 95 .port[0] = {
96 .flags = S3C_HCDFLG_USED 96 .flags = S3C_HCDFLG_USED
97 }, 97 },
@@ -127,6 +127,6 @@ int usb_simtec_init(void)
127 gpio_direction_output(S3C2410_GPB(4), 1); 127 gpio_direction_output(S3C2410_GPB(4), 1);
128 gpio_direction_input(S3C2410_GPG(10)); 128 gpio_direction_input(S3C2410_GPG(10));
129 129
130 s3c_device_usb.dev.platform_data = &usb_simtec_info; 130 s3c_ohci_set_platdata(&usb_simtec_info);
131 return 0; 131 return 0;
132} 132}
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index a037df5e1c2d..0c0505b025cb 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -124,7 +124,9 @@ static struct clk clk_usysclk = {
124 .name = "usysclk", 124 .name = "usysclk",
125 .id = -1, 125 .id = -1,
126 .parent = &clk_xtal, 126 .parent = &clk_xtal,
127 .set_parent = s3c2412_setparent_usysclk, 127 .ops = &(struct clk_ops) {
128 .set_parent = s3c2412_setparent_usysclk,
129 },
128}; 130};
129 131
130static struct clk clk_mrefclk = { 132static struct clk clk_mrefclk = {
@@ -199,10 +201,12 @@ static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate)
199static struct clk clk_usbsrc = { 201static struct clk clk_usbsrc = {
200 .name = "usbsrc", 202 .name = "usbsrc",
201 .id = -1, 203 .id = -1,
202 .get_rate = s3c2412_getrate_usbsrc, 204 .ops = &(struct clk_ops) {
203 .set_rate = s3c2412_setrate_usbsrc, 205 .get_rate = s3c2412_getrate_usbsrc,
204 .round_rate = s3c2412_roundrate_usbsrc, 206 .set_rate = s3c2412_setrate_usbsrc,
205 .set_parent = s3c2412_setparent_usbsrc, 207 .round_rate = s3c2412_roundrate_usbsrc,
208 .set_parent = s3c2412_setparent_usbsrc,
209 },
206}; 210};
207 211
208static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) 212static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
@@ -225,7 +229,9 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
225static struct clk clk_msysclk = { 229static struct clk clk_msysclk = {
226 .name = "msysclk", 230 .name = "msysclk",
227 .id = -1, 231 .id = -1,
228 .set_parent = s3c2412_setparent_msysclk, 232 .ops = &(struct clk_ops) {
233 .set_parent = s3c2412_setparent_msysclk,
234 },
229}; 235};
230 236
231static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent) 237static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
@@ -264,7 +270,9 @@ static struct clk clk_armclk = {
264 .name = "armclk", 270 .name = "armclk",
265 .id = -1, 271 .id = -1,
266 .parent = &clk_msysclk, 272 .parent = &clk_msysclk,
267 .set_parent = s3c2412_setparent_armclk, 273 .ops = &(struct clk_ops) {
274 .set_parent = s3c2412_setparent_armclk,
275 },
268}; 276};
269 277
270/* these next clocks have an divider immediately after them, 278/* these next clocks have an divider immediately after them,
@@ -337,10 +345,12 @@ static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate)
337static struct clk clk_uart = { 345static struct clk clk_uart = {
338 .name = "uartclk", 346 .name = "uartclk",
339 .id = -1, 347 .id = -1,
340 .get_rate = s3c2412_getrate_uart, 348 .ops = &(struct clk_ops) {
341 .set_rate = s3c2412_setrate_uart, 349 .get_rate = s3c2412_getrate_uart,
342 .set_parent = s3c2412_setparent_uart, 350 .set_rate = s3c2412_setrate_uart,
343 .round_rate = s3c2412_roundrate_clksrc, 351 .set_parent = s3c2412_setparent_uart,
352 .round_rate = s3c2412_roundrate_clksrc,
353 },
344}; 354};
345 355
346static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent) 356static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent)
@@ -388,10 +398,12 @@ static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate)
388static struct clk clk_i2s = { 398static struct clk clk_i2s = {
389 .name = "i2sclk", 399 .name = "i2sclk",
390 .id = -1, 400 .id = -1,
391 .get_rate = s3c2412_getrate_i2s, 401 .ops = &(struct clk_ops) {
392 .set_rate = s3c2412_setrate_i2s, 402 .get_rate = s3c2412_getrate_i2s,
393 .set_parent = s3c2412_setparent_i2s, 403 .set_rate = s3c2412_setrate_i2s,
394 .round_rate = s3c2412_roundrate_clksrc, 404 .set_parent = s3c2412_setparent_i2s,
405 .round_rate = s3c2412_roundrate_clksrc,
406 },
395}; 407};
396 408
397static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent) 409static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent)
@@ -438,10 +450,12 @@ static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate)
438static struct clk clk_cam = { 450static struct clk clk_cam = {
439 .name = "camif-upll", /* same as 2440 name */ 451 .name = "camif-upll", /* same as 2440 name */
440 .id = -1, 452 .id = -1,
441 .get_rate = s3c2412_getrate_cam, 453 .ops = &(struct clk_ops) {
442 .set_rate = s3c2412_setrate_cam, 454 .get_rate = s3c2412_getrate_cam,
443 .set_parent = s3c2412_setparent_cam, 455 .set_rate = s3c2412_setrate_cam,
444 .round_rate = s3c2412_roundrate_clksrc, 456 .set_parent = s3c2412_setparent_cam,
457 .round_rate = s3c2412_roundrate_clksrc,
458 },
445}; 459};
446 460
447/* standard clock definitions */ 461/* standard clock definitions */
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index f8d16fc10bc6..e880524904eb 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -20,7 +20,7 @@
20 20
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/dma-plat.h> 23#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index c9fa3fca486c..14f4798291aa 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -468,7 +468,7 @@ static struct i2c_board_info jive_i2c_devs[] __initdata = {
468/* The platform devices being used. */ 468/* The platform devices being used. */
469 469
470static struct platform_device *jive_devices[] __initdata = { 470static struct platform_device *jive_devices[] __initdata = {
471 &s3c_device_usb, 471 &s3c_device_ohci,
472 &s3c_device_rtc, 472 &s3c_device_rtc,
473 &s3c_device_wdt, 473 &s3c_device_wdt,
474 &s3c_device_i2c0, 474 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 9a5e43419722..0392065af1af 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -104,8 +104,7 @@ static struct s3c2410_udc_mach_info smdk2413_udc_cfg __initdata = {
104 104
105 105
106static struct platform_device *smdk2413_devices[] __initdata = { 106static struct platform_device *smdk2413_devices[] __initdata = {
107 &s3c_device_usb, 107 &s3c_device_ohci,
108 //&s3c_device_lcd,
109 &s3c_device_wdt, 108 &s3c_device_wdt,
110 &s3c_device_i2c0, 109 &s3c_device_i2c0,
111 &s3c_device_iis, 110 &s3c_device_iis,
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index a6ba591b26bb..3ca9265b6997 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -121,7 +121,7 @@ static struct s3c2410_platform_nand __initdata vstms_nand_info = {
121}; 121};
122 122
123static struct platform_device *vstms_devices[] __initdata = { 123static struct platform_device *vstms_devices[] __initdata = {
124 &s3c_device_usb, 124 &s3c_device_ohci,
125 &s3c_device_wdt, 125 &s3c_device_wdt,
126 &s3c_device_i2c0, 126 &s3c_device_i2c0,
127 &s3c_device_iis, 127 &s3c_device_iis,
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 80879358eb2f..7f465265cf04 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -15,14 +15,67 @@ config CPU_S3C2440
15 help 15 help
16 Support for S3C2440 Samsung Mobile CPU based systems. 16 Support for S3C2440 Samsung Mobile CPU based systems.
17 17
18config CPU_S3C2442
19 bool
20 depends on ARCH_S3C2410
21 select CPU_ARM920T
22 select S3C2410_CLOCK
23 select S3C2410_GPIO
24 select S3C2410_PM if PM
25 select CPU_S3C244X
26 select CPU_LLSERIAL_S3C2440
27 help
28 Support for S3C2442 Samsung Mobile CPU based systems.
29
30config CPU_S3C244X
31 bool
32 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
33 help
34 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
35
36
37
38config S3C2440_CPUFREQ
39 bool "S3C2440/S3C2442 CPU Frequency scaling support"
40 depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
41 select S3C2410_CPUFREQ_UTILS
42 default y
43 help
44 CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
45
46config S3C2440_XTAL_12000000
47 bool
48 help
49 Indicate that the build needs to support 12MHz system
50 crystal.
51
52config S3C2440_XTAL_16934400
53 bool
54 help
55 Indicate that the build needs to support 16.9344MHz system
56 crystal.
57
58config S3C2440_PLL_12000000
59 bool
60 depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
61 default y if CPU_FREQ_S3C24XX_PLL
62 help
63 PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
64
65config S3C2440_PLL_16934400
66 bool
67 depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
68 default y if CPU_FREQ_S3C24XX_PLL
69 help
70 PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
71
18config S3C2440_DMA 72config S3C2440_DMA
19 bool 73 bool
20 depends on ARCH_S3C2410 && CPU_S3C24405B 74 depends on ARCH_S3C2410 && CPU_S3C24405B
21 help 75 help
22 Support for S3C2440 specific DMA code5A 76 Support for S3C2440 specific DMA code5A
23 77
24 78menu "S3C2440 and S3C2442 Machines"
25menu "S3C2440 Machines"
26 79
27config MACH_ANUBIS 80config MACH_ANUBIS
28 bool "Simtec Electronics ANUBIS" 81 bool "Simtec Electronics ANUBIS"
@@ -37,6 +90,18 @@ config MACH_ANUBIS
37 Say Y here if you are using the Simtec Electronics ANUBIS 90 Say Y here if you are using the Simtec Electronics ANUBIS
38 development system 91 development system
39 92
93config MACH_NEO1973_GTA02
94 bool "Openmoko GTA02 / Freerunner phone"
95 select CPU_S3C2442
96 select MFD_PCF50633
97 select PCF50633_GPIO
98 select I2C
99 select POWER_SUPPLY
100 select MACH_NEO1973
101 select S3C2410_PWM
102 help
103 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
104
40config MACH_OSIRIS 105config MACH_OSIRIS
41 bool "Simtec IM2440D20 (OSIRIS) module" 106 bool "Simtec IM2440D20 (OSIRIS) module"
42 select CPU_S3C2440 107 select CPU_S3C2440
@@ -94,11 +159,14 @@ config MACH_NEXCODER_2440
94 159
95config SMDK2440_CPU2440 160config SMDK2440_CPU2440
96 bool "SMDK2440 with S3C2440 CPU module" 161 bool "SMDK2440 with S3C2440 CPU module"
97 depends on ARCH_S3C2440
98 default y if ARCH_S3C2440 162 default y if ARCH_S3C2440
99 select S3C2440_XTAL_16934400 163 select S3C2440_XTAL_16934400
100 select CPU_S3C2440 164 select CPU_S3C2440
101 165
166config SMDK2440_CPU2442
167 bool "SMDM2440 with S3C2442 CPU module"
168 select CPU_S3C2442
169
102config MACH_AT2440EVB 170config MACH_AT2440EVB
103 bool "Avantech AT2440EVB development board" 171 bool "Avantech AT2440EVB development board"
104 select CPU_S3C2440 172 select CPU_S3C2440
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index 5f3224531885..c85ba32d8956 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -10,10 +10,20 @@ obj-n :=
10obj- := 10obj- :=
11 11
12obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o 12obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o
13obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
14
13obj-$(CONFIG_CPU_S3C2440) += irq.o 15obj-$(CONFIG_CPU_S3C2440) += irq.o
14obj-$(CONFIG_CPU_S3C2440) += clock.o 16obj-$(CONFIG_CPU_S3C2440) += clock.o
15obj-$(CONFIG_S3C2440_DMA) += dma.o 17obj-$(CONFIG_S3C2440_DMA) += dma.o
16 18
19obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
20obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
21obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o
22obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o
23
24obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
25obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
26
17# Machine support 27# Machine support
18 28
19obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o 29obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o
@@ -23,6 +33,7 @@ obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o
23obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o 33obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
24obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o 34obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
25obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o 35obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
36obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
26 37
27# extra machine support 38# extra machine support
28 39
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index d1c29b2537cd..3dc2426e2345 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -98,8 +98,10 @@ static struct clk s3c2440_clk_cam = {
98static struct clk s3c2440_clk_cam_upll = { 98static struct clk s3c2440_clk_cam_upll = {
99 .name = "camif-upll", 99 .name = "camif-upll",
100 .id = -1, 100 .id = -1,
101 .set_rate = s3c2440_camif_upll_setrate, 101 .ops = &(struct clk_ops) {
102 .round_rate = s3c2440_camif_upll_round, 102 .set_rate = s3c2440_camif_upll_setrate,
103 .round_rate = s3c2440_camif_upll_round,
104 },
103}; 105};
104 106
105static struct clk s3c2440_clk_ac97 = { 107static struct clk s3c2440_clk_ac97 = {
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index e08e081430f0..3b0529f54e9c 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -20,7 +20,7 @@
20#include <mach/map.h> 20#include <mach/map.h>
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/dma-plat.h> 23#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
index 554044272771..9ea66e31f626 100644
--- a/arch/arm/mach-s3c2440/dsc.c
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -28,7 +28,7 @@
28#include <mach/regs-dsc.h> 28#include <mach/regs-dsc.h>
29 29
30#include <plat/cpu.h> 30#include <plat/cpu.h>
31#include <plat/s3c2440.h> 31#include <plat/s3c244x.h>
32 32
33int s3c2440_set_dsc(unsigned int pin, unsigned int value) 33int s3c2440_set_dsc(unsigned int pin, unsigned int value)
34{ 34{
diff --git a/arch/arm/mach-s3c2442/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h
index 953331d8d56a..953331d8d56a 100644
--- a/arch/arm/mach-s3c2442/include/mach/gta02.h
+++ b/arch/arm/mach-s3c2440/include/mach/gta02.h
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 62a4c3eba97f..b73f78a9da5c 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -409,7 +409,7 @@ static struct platform_device anubis_device_sm501 = {
409/* Standard Anubis devices */ 409/* Standard Anubis devices */
410 410
411static struct platform_device *anubis_devices[] __initdata = { 411static struct platform_device *anubis_devices[] __initdata = {
412 &s3c_device_usb, 412 &s3c_device_ohci,
413 &s3c_device_wdt, 413 &s3c_device_wdt,
414 &s3c_device_adc, 414 &s3c_device_adc,
415 &s3c_device_i2c0, 415 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index aa69290e04c6..84725791e6bf 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -165,7 +165,7 @@ static struct platform_device at2440evb_device_eth = {
165 }, 165 },
166}; 166};
167 167
168static struct s3c24xx_mci_pdata at2440evb_mci_pdata = { 168static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
169 .gpio_detect = S3C2410_GPG(10), 169 .gpio_detect = S3C2410_GPG(10),
170}; 170};
171 171
@@ -203,7 +203,7 @@ static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
203}; 203};
204 204
205static struct platform_device *at2440evb_devices[] __initdata = { 205static struct platform_device *at2440evb_devices[] __initdata = {
206 &s3c_device_usb, 206 &s3c_device_ohci,
207 &s3c_device_wdt, 207 &s3c_device_wdt,
208 &s3c_device_adc, 208 &s3c_device_adc,
209 &s3c_device_i2c0, 209 &s3c_device_i2c0,
@@ -216,8 +216,6 @@ static struct platform_device *at2440evb_devices[] __initdata = {
216 216
217static void __init at2440evb_map_io(void) 217static void __init at2440evb_map_io(void)
218{ 218{
219 s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata;
220
221 s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); 219 s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
222 s3c24xx_init_clocks(16934400); 220 s3c24xx_init_clocks(16934400);
223 s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs)); 221 s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
@@ -226,6 +224,7 @@ static void __init at2440evb_map_io(void)
226static void __init at2440evb_init(void) 224static void __init at2440evb_init(void)
227{ 225{
228 s3c24xx_fb_set_platdata(&at2440evb_fb_info); 226 s3c24xx_fb_set_platdata(&at2440evb_fb_info);
227 s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
229 s3c_nand_set_platdata(&at2440evb_nand_info); 228 s3c_nand_set_platdata(&at2440evb_nand_info);
230 s3c_i2c0_set_platdata(NULL); 229 s3c_i2c0_set_platdata(NULL);
231 230
diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 0b4a3a03071f..45799c608d8f 100644
--- a/arch/arm/mach-s3c2442/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -544,7 +544,7 @@ static struct platform_device gta02_bl_dev = {
544 544
545 545
546/* USB */ 546/* USB */
547static struct s3c2410_hcd_info gta02_usb_info = { 547static struct s3c2410_hcd_info gta02_usb_info __initdata = {
548 .port[0] = { 548 .port[0] = {
549 .flags = S3C_HCDFLG_USED, 549 .flags = S3C_HCDFLG_USED,
550 }, 550 },
@@ -565,7 +565,7 @@ static void __init gta02_map_io(void)
565/* These are the guys that don't need to be children of PMU. */ 565/* These are the guys that don't need to be children of PMU. */
566 566
567static struct platform_device *gta02_devices[] __initdata = { 567static struct platform_device *gta02_devices[] __initdata = {
568 &s3c_device_usb, 568 &s3c_device_ohci,
569 &s3c_device_wdt, 569 &s3c_device_wdt,
570 &s3c_device_sdi, 570 &s3c_device_sdi,
571 &s3c_device_usbgadget, 571 &s3c_device_usbgadget,
@@ -623,9 +623,8 @@ static void __init gta02_machine_init(void)
623 INIT_DELAYED_WORK(&gta02_charger_work, gta02_charger_worker); 623 INIT_DELAYED_WORK(&gta02_charger_work, gta02_charger_worker);
624#endif 624#endif
625 625
626 s3c_device_usb.dev.platform_data = &gta02_usb_info;
627
628 s3c24xx_udc_set_platdata(&gta02_udc_cfg); 626 s3c24xx_udc_set_platdata(&gta02_udc_cfg);
627 s3c_ohci_set_platdata(&gta02_usb_info);
629 s3c_nand_set_platdata(&gta02_nand_info); 628 s3c_nand_set_platdata(&gta02_nand_info);
630 s3c_i2c0_set_platdata(NULL); 629 s3c_i2c0_set_platdata(NULL);
631 630
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 2068e9096a43..571b17683d96 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -506,9 +506,8 @@ static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
506}; 506};
507 507
508static struct platform_device *mini2440_devices[] __initdata = { 508static struct platform_device *mini2440_devices[] __initdata = {
509 &s3c_device_usb, 509 &s3c_device_ohci,
510 &s3c_device_wdt, 510 &s3c_device_wdt,
511/* &s3c_device_adc,*/ /* ADC doesn't like living with touchscreen ! */
512 &s3c_device_i2c0, 511 &s3c_device_i2c0,
513 &s3c_device_rtc, 512 &s3c_device_rtc,
514 &s3c_device_usbgadget, 513 &s3c_device_usbgadget,
@@ -522,8 +521,6 @@ static struct platform_device *mini2440_devices[] __initdata = {
522 &s3c_device_sdi, 521 &s3c_device_sdi,
523 &s3c_device_iis, 522 &s3c_device_iis,
524 &mini2440_audio, 523 &mini2440_audio,
525/* &s3c_device_timer[0],*/ /* buzzer pwm, no API for it */
526 /* remaining devices are optional */
527}; 524};
528 525
529static void __init mini2440_map_io(void) 526static void __init mini2440_map_io(void)
@@ -531,8 +528,6 @@ static void __init mini2440_map_io(void)
531 s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc)); 528 s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));
532 s3c24xx_init_clocks(12000000); 529 s3c24xx_init_clocks(12000000);
533 s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs)); 530 s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs));
534
535 s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg;
536} 531}
537 532
538/* 533/*
@@ -678,6 +673,7 @@ static void __init mini2440_init(void)
678 } 673 }
679 674
680 s3c24xx_udc_set_platdata(&mini2440_udc_cfg); 675 s3c24xx_udc_set_platdata(&mini2440_udc_cfg);
676 s3c24xx_mci_set_platdata(&mini2440_mmc_cfg);
681 s3c_nand_set_platdata(&mini2440_nand_info); 677 s3c_nand_set_platdata(&mini2440_nand_info);
682 s3c_i2c0_set_platdata(NULL); 678 s3c_i2c0_set_platdata(NULL);
683 679
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index d43edede590e..342041593f22 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -41,7 +41,7 @@
41#include <plat/iic.h> 41#include <plat/iic.h>
42 42
43#include <plat/s3c2410.h> 43#include <plat/s3c2410.h>
44#include <plat/s3c2440.h> 44#include <plat/s3c244x.h>
45#include <plat/clock.h> 45#include <plat/clock.h>
46#include <plat/devs.h> 46#include <plat/devs.h>
47#include <plat/cpu.h> 47#include <plat/cpu.h>
@@ -106,7 +106,7 @@ static struct platform_device nexcoder_device_nor = {
106/* Standard Nexcoder devices */ 106/* Standard Nexcoder devices */
107 107
108static struct platform_device *nexcoder_devices[] __initdata = { 108static struct platform_device *nexcoder_devices[] __initdata = {
109 &s3c_device_usb, 109 &s3c_device_ohci,
110 &s3c_device_lcd, 110 &s3c_device_lcd,
111 &s3c_device_wdt, 111 &s3c_device_wdt,
112 &s3c_device_i2c0, 112 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index a952a13afb1f..1e836e506f8b 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -176,7 +176,7 @@ static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
176}; 176};
177 177
178static struct platform_device *rx3715_devices[] __initdata = { 178static struct platform_device *rx3715_devices[] __initdata = {
179 &s3c_device_usb, 179 &s3c_device_ohci,
180 &s3c_device_lcd, 180 &s3c_device_lcd,
181 &s3c_device_wdt, 181 &s3c_device_wdt,
182 &s3c_device_i2c0, 182 &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index ec13e748ccc5..3ac3d636d615 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -40,7 +40,7 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41 41
42#include <plat/s3c2410.h> 42#include <plat/s3c2410.h>
43#include <plat/s3c2440.h> 43#include <plat/s3c244x.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
46#include <plat/cpu.h> 46#include <plat/cpu.h>
@@ -150,7 +150,7 @@ static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
150}; 150};
151 151
152static struct platform_device *smdk2440_devices[] __initdata = { 152static struct platform_device *smdk2440_devices[] __initdata = {
153 &s3c_device_usb, 153 &s3c_device_ohci,
154 &s3c_device_lcd, 154 &s3c_device_lcd,
155 &s3c_device_wdt, 155 &s3c_device_wdt,
156 &s3c_device_i2c0, 156 &s3c_device_i2c0,
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
index 49f65032f2c0..f105d5e8c477 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c 1/* arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
2 * 2 *
3 * Copyright (c) 2006-2007 Simtec Electronics 3 * Copyright (c) 2006-2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
index 7679af13a94d..c8a8f90ef382 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c 1/* arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
2 * 2 *
3 * Copyright (c) 2006-2008 Simtec Electronics 3 * Copyright (c) 2006-2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ac1f7ea5f405..2b68f7ea45ae 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -29,9 +29,9 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <plat/s3c2440.h>
33#include <plat/devs.h> 32#include <plat/devs.h>
34#include <plat/cpu.h> 33#include <plat/cpu.h>
34#include <plat/s3c244x.h>
35 35
36static struct sys_device s3c2440_sysdev = { 36static struct sys_device s3c2440_sysdev = {
37 .cls = &s3c2440_sysclass, 37 .cls = &s3c2440_sysclass,
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2440/s3c2442.c
index ea1aa1f5157a..188ad1e57dc0 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -1,10 +1,10 @@
1/* linux/arch/arm/mach-s3c2442/clock.c 1/* linux/arch/arm/mach-s3c2442/s3c2442.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * S3C2442 Clock support 7 * S3C2442 core and lock support
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -109,8 +109,10 @@ static struct clk s3c2442_clk_cam = {
109static struct clk s3c2442_clk_cam_upll = { 109static struct clk s3c2442_clk_cam_upll = {
110 .name = "camif-upll", 110 .name = "camif-upll",
111 .id = -1, 111 .id = -1,
112 .set_rate = s3c2442_camif_upll_setrate, 112 .ops = &(struct clk_ops) {
113 .round_rate = s3c2442_camif_upll_round, 113 .set_rate = s3c2442_camif_upll_setrate,
114 .round_rate = s3c2442_camif_upll_round,
115 },
114}; 116};
115 117
116static int s3c2442_clk_add(struct sys_device *sysdev) 118static int s3c2442_clk_add(struct sys_device *sysdev)
@@ -149,3 +151,15 @@ static __init int s3c2442_clk_init(void)
149} 151}
150 152
151arch_initcall(s3c2442_clk_init); 153arch_initcall(s3c2442_clk_init);
154
155
156static struct sys_device s3c2442_sysdev = {
157 .cls = &s3c2442_sysclass,
158};
159
160int __init s3c2442_init(void)
161{
162 printk("S3C2442: Initialising architecture\n");
163
164 return sysdev_register(&s3c2442_sysdev);
165}
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/mach-s3c2440/s3c244x-clock.c
index 79371091aa38..f8d96130d1d1 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/mach-s3c2440/s3c244x-clock.c
@@ -68,7 +68,9 @@ static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
68static struct clk clk_arm = { 68static struct clk clk_arm = {
69 .name = "armclk", 69 .name = "armclk",
70 .id = -1, 70 .id = -1,
71 .set_parent = s3c2440_setparent_armclk, 71 .ops = &(struct clk_ops) {
72 .set_parent = s3c2440_setparent_armclk,
73 },
72}; 74};
73 75
74static int s3c244x_clk_add(struct sys_device *sysdev) 76static int s3c244x_clk_add(struct sys_device *sysdev)
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index a75c0c2431ea..a75c0c2431ea 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 12623a474b54..5e4a97e76533 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -38,8 +38,7 @@
38#include <mach/regs-dsc.h> 38#include <mach/regs-dsc.h>
39 39
40#include <plat/s3c2410.h> 40#include <plat/s3c2410.h>
41#include <plat/s3c2440.h> 41#include <plat/s3c244x.h>
42#include "s3c244x.h"
43#include <plat/clock.h> 42#include <plat/clock.h>
44#include <plat/devs.h> 43#include <plat/devs.h>
45#include <plat/cpu.h> 44#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
deleted file mode 100644
index 8d3811852fc7..000000000000
--- a/arch/arm/mach-s3c2442/Kconfig
+++ /dev/null
@@ -1,37 +0,0 @@
1# Copyright 2007 Simtec Electronics
2#
3# Licensed under GPLv2
4
5config CPU_S3C2442
6 bool
7 depends on ARCH_S3C2410
8 select CPU_ARM920T
9 select S3C2410_CLOCK
10 select S3C2410_GPIO
11 select S3C2410_PM if PM
12 select CPU_S3C244X
13 select CPU_LLSERIAL_S3C2440
14 help
15 Support for S3C2442 Samsung Mobile CPU based systems.
16
17
18menu "S3C2442 Machines"
19
20config SMDK2440_CPU2442
21 bool "SMDM2440 with S3C2442 CPU module"
22 depends on ARCH_S3C2440
23 select CPU_S3C2442
24
25config MACH_NEO1973_GTA02
26 bool "Openmoko GTA02 / Freerunner phone"
27 select CPU_S3C2442
28 select MFD_PCF50633
29 select PCF50633_GPIO
30 select I2C
31 select POWER_SUPPLY
32 select MACH_NEO1973
33 select S3C2410_PWM
34 help
35 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
36
37endmenu
diff --git a/arch/arm/mach-s3c2442/Makefile b/arch/arm/mach-s3c2442/Makefile
deleted file mode 100644
index 2a19113a5769..000000000000
--- a/arch/arm/mach-s3c2442/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1# arch/arm/mach-s3c2442/Makefile
2#
3# Copyright 2007 Simtec Electronics
4#
5# Licensed under GPLv2
6
7obj-y :=
8obj-m :=
9obj-n :=
10obj- :=
11
12obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
13obj-$(CONFIG_CPU_S3C2442) += clock.o
14
15obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
16
17# Machine support
18
diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c
deleted file mode 100644
index 4663bdc7fff6..000000000000
--- a/arch/arm/mach-s3c2442/s3c2442.c
+++ /dev/null
@@ -1,34 +0,0 @@
1/* linux/arch/arm/mach-s3c2442/s3c2442.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2442 Mobile CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/sysdev.h>
21
22#include <plat/s3c2442.h>
23#include <plat/cpu.h>
24
25static struct sys_device s3c2442_sysdev = {
26 .cls = &s3c2442_sysclass,
27};
28
29int __init s3c2442_init(void)
30{
31 printk("S3C2442: Initialising architecture\n");
32
33 return sysdev_register(&s3c2442_sysdev);
34}
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 4314c4424909..698140af247c 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -7,6 +7,7 @@ config CPU_S3C2443
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select S3C2443_DMA if S3C2410_DMA 8 select S3C2443_DMA if S3C2410_DMA
9 select CPU_LLSERIAL_S3C2440 9 select CPU_LLSERIAL_S3C2440
10 select SAMSUNG_CLKSRC
10 help 11 help
11 Support for the S3C2443 SoC from the S3C24XX line 12 Support for the S3C2443 SoC from the S3C24XX line
12 13
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 2785d69c95b0..62cd4eaee01b 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/mach-s3c2443/clock.c 1/* linux/arch/arm/mach-s3c2443/clock.c
2 * 2 *
3 * Copyright (c) 2007 Simtec Electronics 3 * Copyright (c) 2007, 2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C2443 Clock control support 6 * S3C2443 Clock control support
@@ -42,6 +42,7 @@
42 42
43#include <plat/s3c2443.h> 43#include <plat/s3c2443.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/clock-clksrc.h>
45#include <plat/cpu.h> 46#include <plat/cpu.h>
46 47
47/* We currently have to assume that the system is running 48/* We currently have to assume that the system is running
@@ -53,141 +54,69 @@
53 * set the correct muxing at initialisation 54 * set the correct muxing at initialisation
54*/ 55*/
55 56
56static int s3c2443_clkcon_enable_h(struct clk *clk, int enable) 57static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable)
57{
58 unsigned int clocks = clk->ctrlbit;
59 unsigned long clkcon;
60
61 clkcon = __raw_readl(S3C2443_HCLKCON);
62
63 if (enable)
64 clkcon |= clocks;
65 else
66 clkcon &= ~clocks;
67
68 __raw_writel(clkcon, S3C2443_HCLKCON);
69
70 return 0;
71}
72
73static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
74{ 58{
75 unsigned int clocks = clk->ctrlbit; 59 u32 ctrlbit = clk->ctrlbit;
76 unsigned long clkcon; 60 u32 con = __raw_readl(reg);
77
78 clkcon = __raw_readl(S3C2443_PCLKCON);
79 61
80 if (enable) 62 if (enable)
81 clkcon |= clocks; 63 con |= ctrlbit;
82 else 64 else
83 clkcon &= ~clocks; 65 con &= ~ctrlbit;
84
85 __raw_writel(clkcon, S3C2443_PCLKCON);
86 66
67 __raw_writel(con, reg);
87 return 0; 68 return 0;
88} 69}
89 70
90static int s3c2443_clkcon_enable_s(struct clk *clk, int enable) 71static int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
91{
92 unsigned int clocks = clk->ctrlbit;
93 unsigned long clkcon;
94
95 clkcon = __raw_readl(S3C2443_SCLKCON);
96
97 if (enable)
98 clkcon |= clocks;
99 else
100 clkcon &= ~clocks;
101
102 __raw_writel(clkcon, S3C2443_SCLKCON);
103
104 return 0;
105}
106
107static unsigned long s3c2443_roundrate_clksrc(struct clk *clk,
108 unsigned long rate,
109 unsigned int max)
110{
111 unsigned long parent_rate = clk_get_rate(clk->parent);
112 int div;
113
114 if (rate > parent_rate)
115 return parent_rate;
116
117 /* note, we remove the +/- 1 calculations as they cancel out */
118
119 div = (rate / parent_rate);
120
121 if (div < 1)
122 div = 1;
123 else if (div > max)
124 div = max;
125
126 return parent_rate / div;
127}
128
129static unsigned long s3c2443_roundrate_clksrc4(struct clk *clk,
130 unsigned long rate)
131{ 72{
132 return s3c2443_roundrate_clksrc(clk, rate, 4); 73 return s3c2443_gate(S3C2443_HCLKCON, clk, enable);
133} 74}
134 75
135static unsigned long s3c2443_roundrate_clksrc16(struct clk *clk, 76static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
136 unsigned long rate)
137{ 77{
138 return s3c2443_roundrate_clksrc(clk, rate, 16); 78 return s3c2443_gate(S3C2443_PCLKCON, clk, enable);
139} 79}
140 80
141static unsigned long s3c2443_roundrate_clksrc256(struct clk *clk, 81static int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
142 unsigned long rate)
143{ 82{
144 return s3c2443_roundrate_clksrc(clk, rate, 256); 83 return s3c2443_gate(S3C2443_SCLKCON, clk, enable);
145} 84}
146 85
147/* clock selections */ 86/* clock selections */
148 87
88/* mpllref is a direct descendant of clk_xtal by default, but it is not
89 * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
90 * such directly equating the two source clocks is impossible.
91 */
149static struct clk clk_mpllref = { 92static struct clk clk_mpllref = {
150 .name = "mpllref", 93 .name = "mpllref",
151 .parent = &clk_xtal, 94 .parent = &clk_xtal,
152 .id = -1, 95 .id = -1,
153}; 96};
154 97
155#if 0
156static struct clk clk_mpll = {
157 .name = "mpll",
158 .parent = &clk_mpllref,
159 .id = -1,
160};
161#endif
162
163static struct clk clk_i2s_ext = { 98static struct clk clk_i2s_ext = {
164 .name = "i2s-ext", 99 .name = "i2s-ext",
165 .id = -1, 100 .id = -1,
166}; 101};
167 102
168static int s3c2443_setparent_epllref(struct clk *clk, struct clk *parent) 103static struct clk *clk_epllref_sources[] = {
169{ 104 [0] = &clk_mpllref,
170 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 105 [1] = &clk_mpllref,
171 106 [2] = &clk_xtal,
172 clksrc &= ~S3C2443_CLKSRC_EPLLREF_MASK; 107 [3] = &clk_ext,
173 108};
174 if (parent == &clk_xtal)
175 clksrc |= S3C2443_CLKSRC_EPLLREF_XTAL;
176 else if (parent == &clk_ext)
177 clksrc |= S3C2443_CLKSRC_EPLLREF_EXTCLK;
178 else if (parent != &clk_mpllref)
179 return -EINVAL;
180
181 __raw_writel(clksrc, S3C2443_CLKSRC);
182 clk->parent = parent;
183
184 return 0;
185}
186 109
187static struct clk clk_epllref = { 110static struct clksrc_clk clk_epllref = {
188 .name = "epllref", 111 .clk = {
189 .id = -1, 112 .name = "epllref",
190 .set_parent = s3c2443_setparent_epllref, 113 .id = -1,
114 },
115 .sources = &(struct clksrc_sources) {
116 .sources = clk_epllref_sources,
117 .nr_sources = ARRAY_SIZE(clk_epllref_sources),
118 },
119 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 7 },
191}; 120};
192 121
193static unsigned long s3c2443_getrate_mdivclk(struct clk *clk) 122static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
@@ -205,34 +134,29 @@ static struct clk clk_mdivclk = {
205 .name = "mdivclk", 134 .name = "mdivclk",
206 .parent = &clk_mpllref, 135 .parent = &clk_mpllref,
207 .id = -1, 136 .id = -1,
208 .get_rate = s3c2443_getrate_mdivclk, 137 .ops = &(struct clk_ops) {
138 .get_rate = s3c2443_getrate_mdivclk,
139 },
209}; 140};
210 141
211static int s3c2443_setparent_msysclk(struct clk *clk, struct clk *parent) 142static struct clk *clk_msysclk_sources[] = {
212{ 143 [0] = &clk_mpllref,
213 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 144 [1] = &clk_mpll,
214 145 [2] = &clk_mdivclk,
215 clksrc &= ~(S3C2443_CLKSRC_MSYSCLK_MPLL | 146 [3] = &clk_mpllref,
216 S3C2443_CLKSRC_EXTCLK_DIV); 147};
217
218 if (parent == &clk_mpll)
219 clksrc |= S3C2443_CLKSRC_MSYSCLK_MPLL;
220 else if (parent == &clk_mdivclk)
221 clksrc |= S3C2443_CLKSRC_EXTCLK_DIV;
222 else if (parent != &clk_mpllref)
223 return -EINVAL;
224
225 __raw_writel(clksrc, S3C2443_CLKSRC);
226 clk->parent = parent;
227
228 return 0;
229}
230 148
231static struct clk clk_msysclk = { 149static struct clksrc_clk clk_msysclk = {
232 .name = "msysclk", 150 .clk = {
233 .parent = &clk_xtal, 151 .name = "msysclk",
234 .id = -1, 152 .parent = &clk_xtal,
235 .set_parent = s3c2443_setparent_msysclk, 153 .id = -1,
154 },
155 .sources = &(struct clksrc_sources) {
156 .sources = clk_msysclk_sources,
157 .nr_sources = ARRAY_SIZE(clk_msysclk_sources),
158 },
159 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 3 },
236}; 160};
237 161
238/* armdiv 162/* armdiv
@@ -241,152 +165,159 @@ static struct clk clk_msysclk = {
241 * divider values applied to it to then be fed into armclk. 165 * divider values applied to it to then be fed into armclk.
242*/ 166*/
243 167
244static struct clk clk_armdiv = { 168/* armdiv divisor table */
245 .name = "armdiv",
246 .id = -1,
247 .parent = &clk_msysclk,
248};
249 169
250/* armclk 170static unsigned int armdiv[16] = {
251 * 171 [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 1,
252 * this is the clock fed into the ARM core itself, either from 172 [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 2,
253 * armdiv or from hclk. 173 [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 3,
254 */ 174 [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 4,
175 [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 6,
176 [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 8,
177 [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 12,
178 [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 16,
179};
255 180
256static int s3c2443_setparent_armclk(struct clk *clk, struct clk *parent) 181static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0)
257{ 182{
258 unsigned long clkdiv0; 183 clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
259
260 clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
261
262 if (parent == &clk_armdiv)
263 clkdiv0 &= ~S3C2443_CLKDIV0_DVS;
264 else if (parent == &clk_h)
265 clkdiv0 |= S3C2443_CLKDIV0_DVS;
266 else
267 return -EINVAL;
268 184
269 __raw_writel(clkdiv0, S3C2443_CLKDIV0); 185 return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
270 return 0;
271} 186}
272 187
273static struct clk clk_arm = { 188static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
274 .name = "armclk", 189 unsigned long rate)
275 .id = -1, 190{
276 .set_parent = s3c2443_setparent_armclk, 191 unsigned long parent = clk_get_rate(clk->parent);
277}; 192 unsigned long calc;
193 unsigned best = 256; /* bigger than any value */
194 unsigned div;
195 int ptr;
278 196
279/* esysclk 197 for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
280 * 198 div = armdiv[ptr];
281 * this is sourced from either the EPLL or the EPLLref clock 199 calc = parent / div;
282*/ 200 if (calc <= rate && div < best)
201 best = div;
202 }
283 203
284static int s3c2443_setparent_esysclk(struct clk *clk, struct clk *parent) 204 return parent / best;
205}
206
207static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
285{ 208{
286 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 209 unsigned long parent = clk_get_rate(clk->parent);
210 unsigned long calc;
211 unsigned div;
212 unsigned best = 256; /* bigger than any value */
213 int ptr;
214 int val = -1;
215
216 for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
217 div = armdiv[ptr];
218 calc = parent / div;
219 if (calc <= rate && div < best) {
220 best = div;
221 val = ptr;
222 }
223 }
287 224
288 if (parent == &clk_epll) 225 if (val >= 0) {
289 clksrc |= S3C2443_CLKSRC_ESYSCLK_EPLL; 226 unsigned long clkcon0;
290 else if (parent == &clk_epllref)
291 clksrc &= ~S3C2443_CLKSRC_ESYSCLK_EPLL;
292 else
293 return -EINVAL;
294 227
295 __raw_writel(clksrc, S3C2443_CLKSRC); 228 clkcon0 = __raw_readl(S3C2443_CLKDIV0);
296 clk->parent = parent; 229 clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
230 clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
231 __raw_writel(clkcon0, S3C2443_CLKDIV0);
232 }
297 233
298 return 0; 234 return (val == -1) ? -EINVAL : 0;
299} 235}
300 236
301static struct clk clk_esysclk = { 237static struct clk clk_armdiv = {
302 .name = "esysclk", 238 .name = "armdiv",
303 .parent = &clk_epll,
304 .id = -1, 239 .id = -1,
305 .set_parent = s3c2443_setparent_esysclk, 240 .parent = &clk_msysclk.clk,
241 .ops = &(struct clk_ops) {
242 .round_rate = s3c2443_armclk_roundrate,
243 .set_rate = s3c2443_armclk_setrate,
244 },
306}; 245};
307 246
308/* uartclk 247/* armclk
309 * 248 *
310 * UART baud-rate clock sourced from esysclk via a divisor 249 * this is the clock fed into the ARM core itself, from armdiv or from hclk.
311*/ 250 */
312
313static unsigned long s3c2443_getrate_uart(struct clk *clk)
314{
315 unsigned long parent_rate = clk_get_rate(clk->parent);
316 unsigned long div = __raw_readl(S3C2443_CLKDIV1);
317
318 div &= S3C2443_CLKDIV1_UARTDIV_MASK;
319 div >>= S3C2443_CLKDIV1_UARTDIV_SHIFT;
320 251
321 return parent_rate / (div + 1); 252static struct clk *clk_arm_sources[] = {
322} 253 [0] = &clk_armdiv,
254 [1] = &clk_h,
255};
323 256
257static struct clksrc_clk clk_arm = {
258 .clk = {
259 .name = "armclk",
260 .id = -1,
261 },
262 .sources = &(struct clksrc_sources) {
263 .sources = clk_arm_sources,
264 .nr_sources = ARRAY_SIZE(clk_arm_sources),
265 },
266 .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
267};
324 268
325static int s3c2443_setrate_uart(struct clk *clk, unsigned long rate) 269/* esysclk
326{ 270 *
327 unsigned long parent_rate = clk_get_rate(clk->parent); 271 * this is sourced from either the EPLL or the EPLLref clock
328 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1); 272*/
329 273
330 rate = s3c2443_roundrate_clksrc16(clk, rate); 274static struct clk *clk_sysclk_sources[] = {
331 rate = parent_rate / rate; 275 [0] = &clk_epllref.clk,
276 [1] = &clk_epll,
277};
332 278
333 clkdivn &= ~S3C2443_CLKDIV1_UARTDIV_MASK; 279static struct clksrc_clk clk_esysclk = {
334 clkdivn |= (rate - 1) << S3C2443_CLKDIV1_UARTDIV_SHIFT; 280 .clk = {
281 .name = "esysclk",
282 .parent = &clk_epll,
283 .id = -1,
284 },
285 .sources = &(struct clksrc_sources) {
286 .sources = clk_sysclk_sources,
287 .nr_sources = ARRAY_SIZE(clk_sysclk_sources),
288 },
289 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 6 },
290};
335 291
336 __raw_writel(clkdivn, S3C2443_CLKDIV1); 292/* uartclk
337 return 0; 293 *
338} 294 * UART baud-rate clock sourced from esysclk via a divisor
295*/
339 296
340static struct clk clk_uart = { 297static struct clksrc_clk clk_uart = {
341 .name = "uartclk", 298 .clk = {
342 .id = -1, 299 .name = "uartclk",
343 .parent = &clk_esysclk, 300 .id = -1,
344 .get_rate = s3c2443_getrate_uart, 301 .parent = &clk_esysclk.clk,
345 .set_rate = s3c2443_setrate_uart, 302 },
346 .round_rate = s3c2443_roundrate_clksrc16, 303 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
347}; 304};
348 305
306
349/* hsspi 307/* hsspi
350 * 308 *
351 * high-speed spi clock, sourced from esysclk 309 * high-speed spi clock, sourced from esysclk
352*/ 310*/
353 311
354static unsigned long s3c2443_getrate_hsspi(struct clk *clk) 312static struct clksrc_clk clk_hsspi = {
355{ 313 .clk = {
356 unsigned long parent_rate = clk_get_rate(clk->parent); 314 .name = "hsspi",
357 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 315 .id = -1,
358 316 .parent = &clk_esysclk.clk,
359 div &= S3C2443_CLKDIV1_HSSPIDIV_MASK; 317 .ctrlbit = S3C2443_SCLKCON_HSSPICLK,
360 div >>= S3C2443_CLKDIV1_HSSPIDIV_SHIFT; 318 .enable = s3c2443_clkcon_enable_s,
361 319 },
362 return parent_rate / (div + 1); 320 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
363}
364
365
366static int s3c2443_setrate_hsspi(struct clk *clk, unsigned long rate)
367{
368 unsigned long parent_rate = clk_get_rate(clk->parent);
369 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
370
371 rate = s3c2443_roundrate_clksrc4(clk, rate);
372 rate = parent_rate / rate;
373
374 clkdivn &= ~S3C2443_CLKDIV1_HSSPIDIV_MASK;
375 clkdivn |= (rate - 1) << S3C2443_CLKDIV1_HSSPIDIV_SHIFT;
376
377 __raw_writel(clkdivn, S3C2443_CLKDIV1);
378 return 0;
379}
380
381static struct clk clk_hsspi = {
382 .name = "hsspi",
383 .id = -1,
384 .parent = &clk_esysclk,
385 .ctrlbit = S3C2443_SCLKCON_HSSPICLK,
386 .enable = s3c2443_clkcon_enable_s,
387 .get_rate = s3c2443_getrate_hsspi,
388 .set_rate = s3c2443_setrate_hsspi,
389 .round_rate = s3c2443_roundrate_clksrc4,
390}; 321};
391 322
392/* usbhost 323/* usbhost
@@ -394,41 +325,15 @@ static struct clk clk_hsspi = {
394 * usb host bus-clock, usually 48MHz to provide USB bus clock timing 325 * usb host bus-clock, usually 48MHz to provide USB bus clock timing
395*/ 326*/
396 327
397static unsigned long s3c2443_getrate_usbhost(struct clk *clk) 328static struct clksrc_clk clk_usb_bus_host = {
398{ 329 .clk = {
399 unsigned long parent_rate = clk_get_rate(clk->parent); 330 .name = "usb-bus-host-parent",
400 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 331 .id = -1,
401 332 .parent = &clk_esysclk.clk,
402 div &= S3C2443_CLKDIV1_USBHOSTDIV_MASK; 333 .ctrlbit = S3C2443_SCLKCON_USBHOST,
403 div >>= S3C2443_CLKDIV1_USBHOSTDIV_SHIFT; 334 .enable = s3c2443_clkcon_enable_s,
404 335 },
405 return parent_rate / (div + 1); 336 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
406}
407
408static int s3c2443_setrate_usbhost(struct clk *clk, unsigned long rate)
409{
410 unsigned long parent_rate = clk_get_rate(clk->parent);
411 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
412
413 rate = s3c2443_roundrate_clksrc4(clk, rate);
414 rate = parent_rate / rate;
415
416 clkdivn &= ~S3C2443_CLKDIV1_USBHOSTDIV_MASK;
417 clkdivn |= (rate - 1) << S3C2443_CLKDIV1_USBHOSTDIV_SHIFT;
418
419 __raw_writel(clkdivn, S3C2443_CLKDIV1);
420 return 0;
421}
422
423static struct clk clk_usb_bus_host = {
424 .name = "usb-bus-host-parent",
425 .id = -1,
426 .parent = &clk_esysclk,
427 .ctrlbit = S3C2443_SCLKCON_USBHOST,
428 .enable = s3c2443_clkcon_enable_s,
429 .get_rate = s3c2443_getrate_usbhost,
430 .set_rate = s3c2443_setrate_usbhost,
431 .round_rate = s3c2443_roundrate_clksrc4,
432}; 337};
433 338
434/* clk_hsmcc_div 339/* clk_hsmcc_div
@@ -438,39 +343,13 @@ static struct clk clk_usb_bus_host = {
438 * be fed to the hsmmc block 343 * be fed to the hsmmc block
439*/ 344*/
440 345
441static unsigned long s3c2443_getrate_hsmmc_div(struct clk *clk) 346static struct clksrc_clk clk_hsmmc_div = {
442{ 347 .clk = {
443 unsigned long parent_rate = clk_get_rate(clk->parent); 348 .name = "hsmmc-div",
444 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 349 .id = -1,
445 350 .parent = &clk_esysclk.clk,
446 div &= S3C2443_CLKDIV1_HSMMCDIV_MASK; 351 },
447 div >>= S3C2443_CLKDIV1_HSMMCDIV_SHIFT; 352 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
448
449 return parent_rate / (div + 1);
450}
451
452static int s3c2443_setrate_hsmmc_div(struct clk *clk, unsigned long rate)
453{
454 unsigned long parent_rate = clk_get_rate(clk->parent);
455 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
456
457 rate = s3c2443_roundrate_clksrc4(clk, rate);
458 rate = parent_rate / rate;
459
460 clkdivn &= ~S3C2443_CLKDIV1_HSMMCDIV_MASK;
461 clkdivn |= (rate - 1) << S3C2443_CLKDIV1_HSMMCDIV_SHIFT;
462
463 __raw_writel(clkdivn, S3C2443_CLKDIV1);
464 return 0;
465}
466
467static struct clk clk_hsmmc_div = {
468 .name = "hsmmc-div",
469 .id = -1,
470 .parent = &clk_esysclk,
471 .get_rate = s3c2443_getrate_hsmmc_div,
472 .set_rate = s3c2443_setrate_hsmmc_div,
473 .round_rate = s3c2443_roundrate_clksrc4,
474}; 353};
475 354
476static int s3c2443_setparent_hsmmc(struct clk *clk, struct clk *parent) 355static int s3c2443_setparent_hsmmc(struct clk *clk, struct clk *parent)
@@ -503,82 +382,55 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable)
503static struct clk clk_hsmmc = { 382static struct clk clk_hsmmc = {
504 .name = "hsmmc-if", 383 .name = "hsmmc-if",
505 .id = -1, 384 .id = -1,
506 .parent = &clk_hsmmc_div, 385 .parent = &clk_hsmmc_div.clk,
507 .enable = s3c2443_enable_hsmmc, 386 .enable = s3c2443_enable_hsmmc,
508 .set_parent = s3c2443_setparent_hsmmc, 387 .ops = &(struct clk_ops) {
388 .set_parent = s3c2443_setparent_hsmmc,
389 },
509}; 390};
510 391
511/* i2s_eplldiv 392/* i2s_eplldiv
512 * 393 *
513 * this clock is the output from the i2s divisor of esysclk 394 * This clock is the output from the I2S divisor of ESYSCLK, and is seperate
395 * from the mux that comes after it (cannot merge into one single clock)
514*/ 396*/
515 397
516static unsigned long s3c2443_getrate_i2s_eplldiv(struct clk *clk) 398static struct clksrc_clk clk_i2s_eplldiv = {
517{ 399 .clk = {
518 unsigned long parent_rate = clk_get_rate(clk->parent); 400 .name = "i2s-eplldiv",
519 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 401 .id = -1,
520 402 .parent = &clk_esysclk.clk,
521 div &= S3C2443_CLKDIV1_I2SDIV_MASK; 403 },
522 div >>= S3C2443_CLKDIV1_I2SDIV_SHIFT; 404 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
523
524 return parent_rate / (div + 1);
525}
526
527static int s3c2443_setrate_i2s_eplldiv(struct clk *clk, unsigned long rate)
528{
529 unsigned long parent_rate = clk_get_rate(clk->parent);
530 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
531
532 rate = s3c2443_roundrate_clksrc16(clk, rate);
533 rate = parent_rate / rate;
534
535 clkdivn &= ~S3C2443_CLKDIV1_I2SDIV_MASK;
536 clkdivn |= (rate - 1) << S3C2443_CLKDIV1_I2SDIV_SHIFT;
537
538 __raw_writel(clkdivn, S3C2443_CLKDIV1);
539 return 0;
540}
541
542static struct clk clk_i2s_eplldiv = {
543 .name = "i2s-eplldiv",
544 .id = -1,
545 .parent = &clk_esysclk,
546 .get_rate = s3c2443_getrate_i2s_eplldiv,
547 .set_rate = s3c2443_setrate_i2s_eplldiv,
548 .round_rate = s3c2443_roundrate_clksrc16,
549}; 405};
550 406
551/* i2s-ref 407/* i2s-ref
552 * 408 *
553 * i2s bus reference clock, selectable from external, esysclk or epllref 409 * i2s bus reference clock, selectable from external, esysclk or epllref
410 *
411 * Note, this used to be two clocks, but was compressed into one.
554*/ 412*/
555 413
556static int s3c2443_setparent_i2s(struct clk *clk, struct clk *parent) 414struct clk *clk_i2s_srclist[] = {
557{ 415 [0] = &clk_i2s_eplldiv.clk,
558 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 416 [1] = &clk_i2s_ext,
559 417 [2] = &clk_epllref.clk,
560 clksrc &= ~S3C2443_CLKSRC_I2S_MASK; 418 [3] = &clk_epllref.clk,
561 419};
562 if (parent == &clk_epllref)
563 clksrc |= S3C2443_CLKSRC_I2S_EPLLREF;
564 else if (parent == &clk_i2s_ext)
565 clksrc |= S3C2443_CLKSRC_I2S_EXT;
566 else if (parent != &clk_i2s_eplldiv)
567 return -EINVAL;
568
569 clk->parent = parent;
570 __raw_writel(clksrc, S3C2443_CLKSRC);
571
572 return 0;
573}
574 420
575static struct clk clk_i2s = { 421static struct clksrc_clk clk_i2s = {
576 .name = "i2s-if", 422 .clk = {
577 .id = -1, 423 .name = "i2s-if",
578 .parent = &clk_i2s_eplldiv, 424 .id = -1,
579 .ctrlbit = S3C2443_SCLKCON_I2SCLK, 425 .ctrlbit = S3C2443_SCLKCON_I2SCLK,
580 .enable = s3c2443_clkcon_enable_s, 426 .enable = s3c2443_clkcon_enable_s,
581 .set_parent = s3c2443_setparent_i2s, 427
428 },
429 .sources = &(struct clksrc_sources) {
430 .sources = clk_i2s_srclist,
431 .nr_sources = ARRAY_SIZE(clk_i2s_srclist),
432 },
433 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
582}; 434};
583 435
584/* cam-if 436/* cam-if
@@ -586,41 +438,15 @@ static struct clk clk_i2s = {
586 * camera interface bus-clock, divided down from esysclk 438 * camera interface bus-clock, divided down from esysclk
587*/ 439*/
588 440
589static unsigned long s3c2443_getrate_cam(struct clk *clk) 441static struct clksrc_clk clk_cam = {
590{ 442 .clk = {
591 unsigned long parent_rate = clk_get_rate(clk->parent); 443 .name = "camif-upll", /* same as 2440 name */
592 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 444 .id = -1,
593 445 .parent = &clk_esysclk.clk,
594 div &= S3C2443_CLKDIV1_CAMDIV_MASK; 446 .ctrlbit = S3C2443_SCLKCON_CAMCLK,
595 div >>= S3C2443_CLKDIV1_CAMDIV_SHIFT; 447 .enable = s3c2443_clkcon_enable_s,
596 448 },
597 return parent_rate / (div + 1); 449 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 26 },
598}
599
600static int s3c2443_setrate_cam(struct clk *clk, unsigned long rate)
601{
602 unsigned long parent_rate = clk_get_rate(clk->parent);
603 unsigned long clkdiv1 = __raw_readl(S3C2443_CLKDIV1);
604
605 rate = s3c2443_roundrate_clksrc16(clk, rate);
606 rate = parent_rate / rate;
607
608 clkdiv1 &= ~S3C2443_CLKDIV1_CAMDIV_MASK;
609 clkdiv1 |= (rate - 1) << S3C2443_CLKDIV1_CAMDIV_SHIFT;
610
611 __raw_writel(clkdiv1, S3C2443_CLKDIV1);
612 return 0;
613}
614
615static struct clk clk_cam = {
616 .name = "camif-upll", /* same as 2440 name */
617 .id = -1,
618 .parent = &clk_esysclk,
619 .ctrlbit = S3C2443_SCLKCON_CAMCLK,
620 .enable = s3c2443_clkcon_enable_s,
621 .get_rate = s3c2443_getrate_cam,
622 .set_rate = s3c2443_setrate_cam,
623 .round_rate = s3c2443_roundrate_clksrc16,
624}; 450};
625 451
626/* display-if 452/* display-if
@@ -628,41 +454,15 @@ static struct clk clk_cam = {
628 * display interface clock, divided from esysclk 454 * display interface clock, divided from esysclk
629*/ 455*/
630 456
631static unsigned long s3c2443_getrate_display(struct clk *clk) 457static struct clksrc_clk clk_display = {
632{ 458 .clk = {
633 unsigned long parent_rate = clk_get_rate(clk->parent); 459 .name = "display-if",
634 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 460 .id = -1,
635 461 .parent = &clk_esysclk.clk,
636 div &= S3C2443_CLKDIV1_DISPDIV_MASK; 462 .ctrlbit = S3C2443_SCLKCON_DISPCLK,
637 div >>= S3C2443_CLKDIV1_DISPDIV_SHIFT; 463 .enable = s3c2443_clkcon_enable_s,
638 464 },
639 return parent_rate / (div + 1); 465 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 8, .shift = 16 },
640}
641
642static int s3c2443_setrate_display(struct clk *clk, unsigned long rate)
643{
644 unsigned long parent_rate = clk_get_rate(clk->parent);
645 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
646
647 rate = s3c2443_roundrate_clksrc256(clk, rate);
648 rate = parent_rate / rate;
649
650 clkdivn &= ~S3C2443_CLKDIV1_UARTDIV_MASK;
651 clkdivn |= (rate - 1) << S3C2443_CLKDIV1_UARTDIV_SHIFT;
652
653 __raw_writel(clkdivn, S3C2443_CLKDIV1);
654 return 0;
655}
656
657static struct clk clk_display = {
658 .name = "display-if",
659 .id = -1,
660 .parent = &clk_esysclk,
661 .ctrlbit = S3C2443_SCLKCON_DISPCLK,
662 .enable = s3c2443_clkcon_enable_s,
663 .get_rate = s3c2443_getrate_display,
664 .set_rate = s3c2443_setrate_display,
665 .round_rate = s3c2443_roundrate_clksrc256,
666}; 466};
667 467
668/* prediv 468/* prediv
@@ -684,8 +484,10 @@ static unsigned long s3c2443_prediv_getrate(struct clk *clk)
684static struct clk clk_prediv = { 484static struct clk clk_prediv = {
685 .name = "prediv", 485 .name = "prediv",
686 .id = -1, 486 .id = -1,
687 .parent = &clk_msysclk, 487 .parent = &clk_msysclk.clk,
688 .get_rate = s3c2443_prediv_getrate, 488 .ops = &(struct clk_ops) {
489 .get_rate = s3c2443_prediv_getrate,
490 },
689}; 491};
690 492
691/* standard clock definitions */ 493/* standard clock definitions */
@@ -857,7 +659,7 @@ static struct clk init_clocks[] = {
857 }, { 659 }, {
858 .name = "usb-bus-host", 660 .name = "usb-bus-host",
859 .id = -1, 661 .id = -1,
860 .parent = &clk_usb_bus_host, 662 .parent = &clk_usb_bus_host.clk,
861 }, { 663 }, {
862 .name = "ac97", 664 .name = "ac97",
863 .id = -1, 665 .id = -1,
@@ -868,103 +670,26 @@ static struct clk init_clocks[] = {
868 670
869/* clocks to add where we need to check their parentage */ 671/* clocks to add where we need to check their parentage */
870 672
871/* s3c2443_clk_initparents 673static struct clksrc_clk __initdata *init_list[] = {
872 * 674 &clk_epllref, /* should be first */
873 * Initialise the parents for the clocks that we get at start-time 675 &clk_esysclk,
874*/ 676 &clk_msysclk,
875 677 &clk_arm,
876static int __init clk_init_set_parent(struct clk *clk, struct clk *parent) 678 &clk_i2s_eplldiv,
877{ 679 &clk_i2s,
878 printk(KERN_DEBUG "clock %s: parent %s\n", clk->name, parent->name); 680 &clk_cam,
879 return clk_set_parent(clk, parent); 681 &clk_uart,
880} 682 &clk_display,
881 683 &clk_hsmmc_div,
882static void __init s3c2443_clk_initparents(void) 684 &clk_usb_bus_host,
883{
884 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
885 struct clk *parent;
886
887 switch (clksrc & S3C2443_CLKSRC_EPLLREF_MASK) {
888 case S3C2443_CLKSRC_EPLLREF_EXTCLK:
889 parent = &clk_ext;
890 break;
891
892 case S3C2443_CLKSRC_EPLLREF_XTAL:
893 default:
894 parent = &clk_xtal;
895 break;
896
897 case S3C2443_CLKSRC_EPLLREF_MPLLREF:
898 case S3C2443_CLKSRC_EPLLREF_MPLLREF2:
899 parent = &clk_mpllref;
900 break;
901 }
902
903 clk_init_set_parent(&clk_epllref, parent);
904
905 switch (clksrc & S3C2443_CLKSRC_I2S_MASK) {
906 case S3C2443_CLKSRC_I2S_EXT:
907 parent = &clk_i2s_ext;
908 break;
909
910 case S3C2443_CLKSRC_I2S_EPLLDIV:
911 default:
912 parent = &clk_i2s_eplldiv;
913 break;
914
915 case S3C2443_CLKSRC_I2S_EPLLREF:
916 case S3C2443_CLKSRC_I2S_EPLLREF3:
917 parent = &clk_epllref;
918 }
919
920 clk_init_set_parent(&clk_i2s, &clk_epllref);
921
922 /* esysclk source */
923
924 parent = (clksrc & S3C2443_CLKSRC_ESYSCLK_EPLL) ?
925 &clk_epll : &clk_epllref;
926
927 clk_init_set_parent(&clk_esysclk, parent);
928
929 /* msysclk source */
930
931 if (clksrc & S3C2443_CLKSRC_MSYSCLK_MPLL) {
932 parent = &clk_mpll;
933 } else {
934 parent = (clksrc & S3C2443_CLKSRC_EXTCLK_DIV) ?
935 &clk_mdivclk : &clk_mpllref;
936 }
937
938 clk_init_set_parent(&clk_msysclk, parent);
939
940 /* arm */
941
942 if (__raw_readl(S3C2443_CLKDIV0) & S3C2443_CLKDIV0_DVS)
943 parent = &clk_h;
944 else
945 parent = &clk_armdiv;
946
947 clk_init_set_parent(&clk_arm, parent);
948}
949
950/* armdiv divisor table */
951
952static unsigned int armdiv[16] = {
953 [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 1,
954 [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 2,
955 [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 3,
956 [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 4,
957 [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 6,
958 [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 8,
959 [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 12,
960 [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 16,
961}; 685};
962 686
963static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0) 687static void __init s3c2443_clk_initparents(void)
964{ 688{
965 clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK; 689 int ptr;
966 690
967 return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; 691 for (ptr = 0; ptr < ARRAY_SIZE(init_list); ptr++)
692 s3c_set_clksrc(init_list[ptr], true);
968} 693}
969 694
970static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) 695static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
@@ -976,15 +701,12 @@ static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
976 701
977/* clocks to add straight away */ 702/* clocks to add straight away */
978 703
979static struct clk *clks[] __initdata = { 704static struct clksrc_clk *clksrcs[] __initdata = {
980 &clk_ext,
981 &clk_epll,
982 &clk_usb_bus_host, 705 &clk_usb_bus_host,
983 &clk_usb_bus,
984 &clk_esysclk,
985 &clk_epllref, 706 &clk_epllref,
986 &clk_mpllref, 707 &clk_esysclk,
987 &clk_msysclk, 708 &clk_msysclk,
709 &clk_arm,
988 &clk_uart, 710 &clk_uart,
989 &clk_display, 711 &clk_display,
990 &clk_cam, 712 &clk_cam,
@@ -992,9 +714,15 @@ static struct clk *clks[] __initdata = {
992 &clk_i2s, 714 &clk_i2s,
993 &clk_hsspi, 715 &clk_hsspi,
994 &clk_hsmmc_div, 716 &clk_hsmmc_div,
717};
718
719static struct clk *clks[] __initdata = {
720 &clk_ext,
721 &clk_epll,
722 &clk_usb_bus,
723 &clk_mpllref,
995 &clk_hsmmc, 724 &clk_hsmmc,
996 &clk_armdiv, 725 &clk_armdiv,
997 &clk_arm,
998 &clk_prediv, 726 &clk_prediv,
999}; 727};
1000 728
@@ -1014,7 +742,7 @@ void __init_or_cpufreq s3c2443_setup_clocks(void)
1014 clk_put(xtal_clk); 742 clk_put(xtal_clk);
1015 743
1016 pll = s3c2443_get_mpll(mpllcon, xtal); 744 pll = s3c2443_get_mpll(mpllcon, xtal);
1017 clk_msysclk.rate = pll; 745 clk_msysclk.clk.rate = pll;
1018 746
1019 fclk = pll / s3c2443_fclk_div(clkdiv0); 747 fclk = pll / s3c2443_fclk_div(clkdiv0);
1020 hclk = s3c2443_prediv_getrate(&clk_prediv); 748 hclk = s3c2443_prediv_getrate(&clk_prediv);
@@ -1056,15 +784,18 @@ void __init s3c2443_init_clocks(int xtal)
1056 } 784 }
1057 } 785 }
1058 786
787 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
788 s3c_register_clksrc(clksrcs[ptr], 1);
789
1059 clk_epll.rate = s3c2443_get_epll(epllcon, xtal); 790 clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
1060 clk_epll.parent = &clk_epllref; 791 clk_epll.parent = &clk_epllref.clk;
1061 clk_usb_bus.parent = &clk_usb_bus_host; 792 clk_usb_bus.parent = &clk_usb_bus_host.clk;
1062 793
1063 /* ensure usb bus clock is within correct rate of 48MHz */ 794 /* ensure usb bus clock is within correct rate of 48MHz */
1064 795
1065 if (clk_get_rate(&clk_usb_bus_host) != (48 * 1000 * 1000)) { 796 if (clk_get_rate(&clk_usb_bus_host.clk) != (48 * 1000 * 1000)) {
1066 printk(KERN_INFO "Warning: USB host bus not at 48MHz\n"); 797 printk(KERN_INFO "Warning: USB host bus not at 48MHz\n");
1067 clk_set_rate(&clk_usb_bus_host, 48*1000*1000); 798 clk_set_rate(&clk_usb_bus_host.clk, 48*1000*1000);
1068 } 799 }
1069 800
1070 printk("S3C2443: epll %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n", 801 printk("S3C2443: epll %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
@@ -1074,14 +805,7 @@ void __init s3c2443_init_clocks(int xtal)
1074 805
1075 /* register clocks from clock array */ 806 /* register clocks from clock array */
1076 807
1077 clkp = init_clocks; 808 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1078 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
1079 ret = s3c24xx_register_clock(clkp);
1080 if (ret < 0) {
1081 printk(KERN_ERR "Failed to register clock %s (%d)\n",
1082 clkp->name, ret);
1083 }
1084 }
1085 809
1086 /* We must be careful disabling the clocks we are not intending to 810 /* We must be careful disabling the clocks we are not intending to
1087 * be using at boot time, as subsystems such as the LCD which do 811 * be using at boot time, as subsystems such as the LCD which do
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 397f3b5c0b47..3f658685ec16 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -20,7 +20,7 @@
20 20
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/dma-plat.h> 23#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index 039a46243105..e2e362bda9b7 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -40,7 +40,7 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41 41
42#include <plat/s3c2410.h> 42#include <plat/s3c2410.h>
43#include <plat/s3c2440.h> 43#include <plat/s3c2443.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
46#include <plat/cpu.h> 46#include <plat/cpu.h>
@@ -106,6 +106,9 @@ static struct platform_device *smdk2443_devices[] __initdata = {
106 &s3c_device_wdt, 106 &s3c_device_wdt,
107 &s3c_device_i2c0, 107 &s3c_device_i2c0,
108 &s3c_device_hsmmc0, 108 &s3c_device_hsmmc0,
109#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
110 &s3c_device_ac97,
111#endif
109}; 112};
110 113
111static void __init smdk2443_map_io(void) 114static void __init smdk2443_map_io(void)
@@ -118,6 +121,11 @@ static void __init smdk2443_map_io(void)
118static void __init smdk2443_machine_init(void) 121static void __init smdk2443_machine_init(void)
119{ 122{
120 s3c_i2c0_set_platdata(NULL); 123 s3c_i2c0_set_platdata(NULL);
124
125#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
126 s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0);
127#endif
128
121 platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); 129 platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
122 smdk_machine_init(); 130 smdk_machine_init();
123} 131}
diff --git a/arch/arm/plat-s3c/include/mach/io.h b/arch/arm/mach-s3c24a0/include/mach/io.h
index f6a53631b665..4326c30fabcb 100644
--- a/arch/arm/plat-s3c/include/mach/io.h
+++ b/arch/arm/mach-s3c24a0/include/mach/io.h
@@ -1,9 +1,9 @@
1/* arch/arm/plat-s3c/include/mach/io.h 1/* arch/arm/mach-s3c24a0/include/mach/io.h
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org> 4 * Ben Dooks <ben-linux@fluff.org>
5 * 5 *
6 * Default IO routines for plat-s3c based systems, such as S3C24A0 6 * Default IO routines for S3C24A0
7 */ 7 */
8 8
9#ifndef __ASM_ARM_ARCH_IO_H 9#ifndef __ASM_ARM_ARCH_IO_H
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
deleted file mode 100644
index a250bf68709f..000000000000
--- a/arch/arm/mach-s3c6400/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
1# Copyright 2008 Openmoko, Inc.
2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
3#
4# Licensed under GPLv2
5
6# Configuration options for the S3C6410 CPU
7
8config CPU_S3C6400
9 bool
10 select CPU_S3C6400_INIT
11 select CPU_S3C6400_CLOCK
12 help
13 Enable S3C6400 CPU support
14
15config S3C6400_SETUP_SDHCI
16 bool
17 help
18 Internal configuration for default SDHCI
19 setup for S3C6400.
20
21# S36400 Macchine support
22
23config MACH_SMDK6400
24 bool "SMDK6400"
25 select CPU_S3C6400
26 select S3C_DEV_HSMMC
27 select S3C_DEV_NAND
28 select S3C6400_SETUP_SDHCI
29 help
30 Machine support for the Samsung SMDK6400
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile
deleted file mode 100644
index df1ce4aa03e5..000000000000
--- a/arch/arm/mach-s3c6400/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
1# arch/arm/mach-s3c6400/Makefile
2#
3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S3C6400 system
14
15obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
16
17# setup support
18
19obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o
20
21# Machine support
22
23obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
deleted file mode 100644
index 6723860748be..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/dma.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - DMA support
9 */
10
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H __FILE__
13
14#define S3C_DMA_CHANNELS (16)
15
16/* see mach-s3c2410/dma.h for notes on dma channel numbers */
17
18/* Note, for the S3C64XX architecture we keep the DMACH_
19 * defines in the order they are allocated to [S]DMA0/[S]DMA1
20 * so that is easy to do DHACH_ -> DMA controller conversion
21 */
22enum dma_ch {
23 /* DMA0/SDMA0 */
24 DMACH_UART0 = 0,
25 DMACH_UART0_SRC2,
26 DMACH_UART1,
27 DMACH_UART1_SRC2,
28 DMACH_UART2,
29 DMACH_UART2_SRC2,
30 DMACH_UART3,
31 DMACH_UART3_SRC2,
32 DMACH_PCM0_TX,
33 DMACH_PCM0_RX,
34 DMACH_I2S0_OUT,
35 DMACH_I2S0_IN,
36 DMACH_SPI0_TX,
37 DMACH_SPI0_RX,
38 DMACH_HSI_I2SV40_TX,
39 DMACH_HSI_I2SV40_RX,
40
41 /* DMA1/SDMA1 */
42 DMACH_PCM1_TX = 16,
43 DMACH_PCM1_RX,
44 DMACH_I2S1_OUT,
45 DMACH_I2S1_IN,
46 DMACH_SPI1_TX,
47 DMACH_SPI1_RX,
48 DMACH_AC97_PCMOUT,
49 DMACH_AC97_PCMIN,
50 DMACH_AC97_MICIN,
51 DMACH_PWM,
52 DMACH_IRDA,
53 DMACH_EXTERNAL,
54 DMACH_RES1,
55 DMACH_RES2,
56 DMACH_SECURITY_RX, /* SDMA1 only */
57 DMACH_SECURITY_TX, /* SDMA1 only */
58 DMACH_MAX /* the end */
59};
60
61static __inline__ bool s3c_dma_has_circular(void)
62{
63 return true;
64}
65
66#define S3C2410_DMAF_CIRCULAR (1 << 0)
67
68#include <plat/dma.h>
69
70#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio-core.h b/arch/arm/mach-s3c6400/include/mach/gpio-core.h
deleted file mode 100644
index d89aae68b0a5..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/gpio-core.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/gpio-core.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - GPIO core support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_GPIO_CORE_H
16#define __ASM_ARCH_GPIO_CORE_H __FILE__
17
18/* currently we just include the platform support */
19#include <plat/gpio-core.h>
20
21#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h
deleted file mode 100644
index 4c97f9a4370b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/irqs.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - IRQ definitions
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H __FILE__
13
14#include <plat/irqs.h>
15
16#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c6400/include/mach/regs-clock.h
deleted file mode 100644
index a6c7f4eb3a1b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-clock.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - clock register compatibility with s3c24xx
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/regs-clock.h>
16
diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile
deleted file mode 100644
index 3e48c3dbf973..000000000000
--- a/arch/arm/mach-s3c6410/Makefile
+++ /dev/null
@@ -1,26 +0,0 @@
1# arch/arm/plat-s3c6410/Makefile
2#
3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S3C6410 system
14
15obj-$(CONFIG_CPU_S3C6410) += cpu.o
16
17# Helper and device support
18
19obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci.o
20
21# machine support
22
23obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
24obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
25obj-$(CONFIG_MACH_NCP) += mach-ncp.o
26obj-$(CONFIG_MACH_HMT) += mach-hmt.o
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
deleted file mode 100644
index 816d2d9f9ef8..000000000000
--- a/arch/arm/mach-s3c6410/setup-sdhci.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28
29char *s3c6410_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc",
31 [1] = "hsmmc",
32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not successfully used yet */
34};
35
36
37void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
38 void __iomem *r,
39 struct mmc_ios *ios,
40 struct mmc_card *card)
41{
42 u32 ctrl2, ctrl3;
43
44 /* don't need to alter anything acording to card-type */
45
46 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
47
48 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
49 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
50 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
51 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
52 S3C_SDHCI_CTRL2_ENFBCLKRX |
53 S3C_SDHCI_CTRL2_DFCNT_NONE |
54 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
55
56 if (ios->clock < 25 * 1000000)
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
58 S3C_SDHCI_CTRL3_FCSEL2 |
59 S3C_SDHCI_CTRL3_FCSEL1 |
60 S3C_SDHCI_CTRL3_FCSEL0);
61 else
62 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
63
64 printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
65 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
66 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
67}
68
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 162f4561f80f..959df3840de5 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -1,22 +1,78 @@
1# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
2# Copyright 2008 Simtec Electronics 2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
3# 3#
4# Licensed under GPLv2 4# Licensed under GPLv2
5 5
6# temporary until we can eliminate all drivers using it.
7config PLAT_S3C64XX
8 bool
9 depends on ARCH_S3C64XX
10 default y
11 help
12 Base platform code for any Samsung S3C64XX device
13
14
6# Configuration options for the S3C6410 CPU 15# Configuration options for the S3C6410 CPU
7 16
17config CPU_S3C6400
18 bool
19 help
20 Enable S3C6400 CPU support
21
8config CPU_S3C6410 22config CPU_S3C6410
9 bool 23 bool
10 select CPU_S3C6400_INIT
11 select CPU_S3C6400_CLOCK
12 help 24 help
13 Enable S3C6410 CPU support 25 Enable S3C6410 CPU support
14 26
15config S3C6410_SETUP_SDHCI 27config S3C64XX_DMA
16 bool 28 bool "S3C64XX DMA"
29 select S3C_DMA
30
31config S3C64XX_SETUP_SDHCI
17 select S3C64XX_SETUP_SDHCI_GPIO 32 select S3C64XX_SETUP_SDHCI_GPIO
33 bool
18 help 34 help
19 Internal helper functions for S3C6410 based SDHCI systems 35 Internal configuration for default SDHCI setup for S3C6400 and
36 S3C6410 SoCs.
37
38# platform specific device setup
39
40config S3C64XX_SETUP_I2C0
41 bool
42 default y
43 help
44 Common setup code for i2c bus 0.
45
46 Note, currently since i2c0 is always compiled, this setup helper
47 is always compiled with it.
48
49config S3C64XX_SETUP_I2C1
50 bool
51 help
52 Common setup code for i2c bus 1.
53
54config S3C64XX_SETUP_FB_24BPP
55 bool
56 help
57 Common setup code for S3C64XX with an 24bpp RGB display helper.
58
59config S3C64XX_SETUP_SDHCI_GPIO
60 bool
61 help
62 Common setup code for S3C64XX SDHCI GPIO configurations
63
64# S36400 Macchine support
65
66config MACH_SMDK6400
67 bool "SMDK6400"
68 select CPU_S3C6400
69 select S3C_DEV_HSMMC
70 select S3C_DEV_NAND
71 select S3C64XX_SETUP_SDHCI
72 help
73 Machine support for the Samsung SMDK6400
74
75# S3C6410 machine support
20 76
21config MACH_ANW6410 77config MACH_ANW6410
22 bool "A&W6410" 78 bool "A&W6410"
@@ -35,7 +91,7 @@ config MACH_SMDK6410
35 select S3C_DEV_FB 91 select S3C_DEV_FB
36 select S3C_DEV_USB_HOST 92 select S3C_DEV_USB_HOST
37 select S3C_DEV_USB_HSOTG 93 select S3C_DEV_USB_HSOTG
38 select S3C6410_SETUP_SDHCI 94 select S3C64XX_SETUP_SDHCI
39 select S3C64XX_SETUP_I2C1 95 select S3C64XX_SETUP_I2C1
40 select S3C64XX_SETUP_FB_24BPP 96 select S3C64XX_SETUP_FB_24BPP
41 help 97 help
@@ -58,7 +114,7 @@ config SMDK6410_SD_CH0
58 at least some SMDK6410 boards come with the 114 at least some SMDK6410 boards come with the
59 resistors fitted so that the card detects for 115 resistors fitted so that the card detects for
60 channels 0 and 1 are the same. 116 channels 0 and 1 are the same.
61 117
62config SMDK6410_SD_CH1 118config SMDK6410_SD_CH1
63 bool "Use channel 1 only" 119 bool "Use channel 1 only"
64 depends on MACH_SMDK6410 120 depends on MACH_SMDK6410
@@ -88,6 +144,21 @@ config SMDK6410_WM1190_EV1
88 detected at runtime so the the resulting kernel can be used 144 detected at runtime so the the resulting kernel can be used
89 with or without the 1190-EV1 fitted. 145 with or without the 1190-EV1 fitted.
90 146
147config SMDK6410_WM1192_EV1
148 bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
149 depends on MACH_SMDK6410
150 select REGULATOR
151 select REGULATOR_WM831X
152 select S3C24XX_GPIO_EXTRA64
153 select MFD_WM831X
154 help
155 The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
156 daughtercard for the Samsung SMDK6410 reference platform.
157 Enabling this option will build support for this module into
158 the kernel. The presence of the daughtercard will be
159 detected at runtime so the the resulting kernel can be used
160 with or without the 1192-EV1 fitted.
161
91config MACH_NCP 162config MACH_NCP
92 bool "NCP" 163 bool "NCP"
93 select CPU_S3C6410 164 select CPU_S3C6410
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index b85b4359e935..3758e15086be 100644
--- a/arch/arm/plat-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -1,4 +1,4 @@
1# arch/arm/plat-s3c64xx/Makefile 1# arch/arm/mach-s3c64xx/Makefile
2# 2#
3# Copyright 2008 Openmoko, Inc. 3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics 4# Copyright 2008 Simtec Electronics
@@ -7,29 +7,25 @@
7 7
8obj-y := 8obj-y :=
9obj-m := 9obj-m :=
10obj-n := dummy.o 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core files 13# Core files
14
15obj-y += dev-uart.o
16obj-y += cpu.o 14obj-y += cpu.o
17obj-y += irq.o
18obj-y += irq-eint.o
19obj-y += clock.o 15obj-y += clock.o
20obj-y += gpiolib.o 16obj-y += gpiolib.o
21 17
22# CPU support 18# Core support for S3C6400 system
23 19
24obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o 20obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
25obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o 21obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
26obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o
27 22
28# PM support 23obj-y += irq.o
24obj-y += irq-eint.o
29 25
30obj-$(CONFIG_PM) += pm.o 26# CPU frequency scaling
31obj-$(CONFIG_PM) += sleep.o 27
32obj-$(CONFIG_PM) += irq-pm.o 28obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o
33 29
34# DMA support 30# DMA support
35 31
@@ -39,6 +35,28 @@ obj-$(CONFIG_S3C64XX_DMA) += dma.o
39 35
40obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o 36obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
41obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o 37obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
38obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
42obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o 39obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
43obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 40obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
44obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o 41
42# PM
43
44obj-$(CONFIG_PM) += pm.o
45obj-$(CONFIG_PM) += sleep.o
46obj-$(CONFIG_PM) += irq-pm.o
47
48# Machine support
49
50obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
51obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
52obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
53obj-$(CONFIG_MACH_NCP) += mach-ncp.o
54obj-$(CONFIG_MACH_HMT) += mach-hmt.o
55
56# device support
57
58obj-y += dev-uart.o
59obj-y += dev-rtc.o
60obj-y += dev-audio.o
61obj-$(CONFIG_S3C_ADC) += dev-adc.o
62obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot
index ba41fdc0a586..ba41fdc0a586 100644
--- a/arch/arm/mach-s3c6400/Makefile.boot
+++ b/arch/arm/mach-s3c64xx/Makefile.boot
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
new file mode 100644
index 000000000000..2ac2e7d73e53
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -0,0 +1,809 @@
1/* linux/arch/arm/plat-s3c64xx/clock.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX Base clock support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/clk.h>
20#include <linux/err.h>
21#include <linux/io.h>
22
23#include <mach/hardware.h>
24#include <mach/map.h>
25
26#include <mach/regs-sys.h>
27#include <mach/regs-clock.h>
28#include <mach/pll.h>
29
30#include <plat/cpu.h>
31#include <plat/devs.h>
32#include <plat/cpu-freq.h>
33#include <plat/clock.h>
34#include <plat/clock-clksrc.h>
35
36/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
37 * ext_xtal_mux for want of an actual name from the manual.
38*/
39
40static struct clk clk_ext_xtal_mux = {
41 .name = "ext_xtal",
42 .id = -1,
43};
44
45#define clk_fin_apll clk_ext_xtal_mux
46#define clk_fin_mpll clk_ext_xtal_mux
47#define clk_fin_epll clk_ext_xtal_mux
48
49#define clk_fout_mpll clk_mpll
50#define clk_fout_epll clk_epll
51
52struct clk clk_h2 = {
53 .name = "hclk2",
54 .id = -1,
55 .rate = 0,
56};
57
58struct clk clk_27m = {
59 .name = "clk_27m",
60 .id = -1,
61 .rate = 27000000,
62};
63
64static int clk_48m_ctrl(struct clk *clk, int enable)
65{
66 unsigned long flags;
67 u32 val;
68
69 /* can't rely on clock lock, this register has other usages */
70 local_irq_save(flags);
71
72 val = __raw_readl(S3C64XX_OTHERS);
73 if (enable)
74 val |= S3C64XX_OTHERS_USBMASK;
75 else
76 val &= ~S3C64XX_OTHERS_USBMASK;
77
78 __raw_writel(val, S3C64XX_OTHERS);
79 local_irq_restore(flags);
80
81 return 0;
82}
83
84struct clk clk_48m = {
85 .name = "clk_48m",
86 .id = -1,
87 .rate = 48000000,
88 .enable = clk_48m_ctrl,
89};
90
91static int inline s3c64xx_gate(void __iomem *reg,
92 struct clk *clk,
93 int enable)
94{
95 unsigned int ctrlbit = clk->ctrlbit;
96 u32 con;
97
98 con = __raw_readl(reg);
99
100 if (enable)
101 con |= ctrlbit;
102 else
103 con &= ~ctrlbit;
104
105 __raw_writel(con, reg);
106 return 0;
107}
108
109static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
110{
111 return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
112}
113
114static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
115{
116 return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
117}
118
119int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
120{
121 return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
122}
123
124static struct clk init_clocks_disable[] = {
125 {
126 .name = "nand",
127 .id = -1,
128 .parent = &clk_h,
129 }, {
130 .name = "adc",
131 .id = -1,
132 .parent = &clk_p,
133 .enable = s3c64xx_pclk_ctrl,
134 .ctrlbit = S3C_CLKCON_PCLK_TSADC,
135 }, {
136 .name = "i2c",
137 .id = -1,
138 .parent = &clk_p,
139 .enable = s3c64xx_pclk_ctrl,
140 .ctrlbit = S3C_CLKCON_PCLK_IIC,
141 }, {
142 .name = "iis",
143 .id = 0,
144 .parent = &clk_p,
145 .enable = s3c64xx_pclk_ctrl,
146 .ctrlbit = S3C_CLKCON_PCLK_IIS0,
147 }, {
148 .name = "iis",
149 .id = 1,
150 .parent = &clk_p,
151 .enable = s3c64xx_pclk_ctrl,
152 .ctrlbit = S3C_CLKCON_PCLK_IIS1,
153 }, {
154#ifdef CONFIG_CPU_S3C6410
155 .name = "iis",
156 .id = -1, /* There's only one IISv4 port */
157 .parent = &clk_p,
158 .enable = s3c64xx_pclk_ctrl,
159 .ctrlbit = S3C6410_CLKCON_PCLK_IIS2,
160 }, {
161#endif
162 .name = "spi",
163 .id = 0,
164 .parent = &clk_p,
165 .enable = s3c64xx_pclk_ctrl,
166 .ctrlbit = S3C_CLKCON_PCLK_SPI0,
167 }, {
168 .name = "spi",
169 .id = 1,
170 .parent = &clk_p,
171 .enable = s3c64xx_pclk_ctrl,
172 .ctrlbit = S3C_CLKCON_PCLK_SPI1,
173 }, {
174 .name = "spi_48m",
175 .id = 0,
176 .parent = &clk_48m,
177 .enable = s3c64xx_sclk_ctrl,
178 .ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
179 }, {
180 .name = "spi_48m",
181 .id = 1,
182 .parent = &clk_48m,
183 .enable = s3c64xx_sclk_ctrl,
184 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
185 }, {
186 .name = "48m",
187 .id = 0,
188 .parent = &clk_48m,
189 .enable = s3c64xx_sclk_ctrl,
190 .ctrlbit = S3C_CLKCON_SCLK_MMC0_48,
191 }, {
192 .name = "48m",
193 .id = 1,
194 .parent = &clk_48m,
195 .enable = s3c64xx_sclk_ctrl,
196 .ctrlbit = S3C_CLKCON_SCLK_MMC1_48,
197 }, {
198 .name = "48m",
199 .id = 2,
200 .parent = &clk_48m,
201 .enable = s3c64xx_sclk_ctrl,
202 .ctrlbit = S3C_CLKCON_SCLK_MMC2_48,
203 }, {
204 .name = "dma0",
205 .id = -1,
206 .parent = &clk_h,
207 .enable = s3c64xx_hclk_ctrl,
208 .ctrlbit = S3C_CLKCON_HCLK_DMA0,
209 }, {
210 .name = "dma1",
211 .id = -1,
212 .parent = &clk_h,
213 .enable = s3c64xx_hclk_ctrl,
214 .ctrlbit = S3C_CLKCON_HCLK_DMA1,
215 },
216};
217
218static struct clk init_clocks[] = {
219 {
220 .name = "lcd",
221 .id = -1,
222 .parent = &clk_h,
223 .enable = s3c64xx_hclk_ctrl,
224 .ctrlbit = S3C_CLKCON_HCLK_LCD,
225 }, {
226 .name = "gpio",
227 .id = -1,
228 .parent = &clk_p,
229 .enable = s3c64xx_pclk_ctrl,
230 .ctrlbit = S3C_CLKCON_PCLK_GPIO,
231 }, {
232 .name = "usb-host",
233 .id = -1,
234 .parent = &clk_h,
235 .enable = s3c64xx_hclk_ctrl,
236 .ctrlbit = S3C_CLKCON_HCLK_UHOST,
237 }, {
238 .name = "hsmmc",
239 .id = 0,
240 .parent = &clk_h,
241 .enable = s3c64xx_hclk_ctrl,
242 .ctrlbit = S3C_CLKCON_HCLK_HSMMC0,
243 }, {
244 .name = "hsmmc",
245 .id = 1,
246 .parent = &clk_h,
247 .enable = s3c64xx_hclk_ctrl,
248 .ctrlbit = S3C_CLKCON_HCLK_HSMMC1,
249 }, {
250 .name = "hsmmc",
251 .id = 2,
252 .parent = &clk_h,
253 .enable = s3c64xx_hclk_ctrl,
254 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
255 }, {
256 .name = "timers",
257 .id = -1,
258 .parent = &clk_p,
259 .enable = s3c64xx_pclk_ctrl,
260 .ctrlbit = S3C_CLKCON_PCLK_PWM,
261 }, {
262 .name = "uart",
263 .id = 0,
264 .parent = &clk_p,
265 .enable = s3c64xx_pclk_ctrl,
266 .ctrlbit = S3C_CLKCON_PCLK_UART0,
267 }, {
268 .name = "uart",
269 .id = 1,
270 .parent = &clk_p,
271 .enable = s3c64xx_pclk_ctrl,
272 .ctrlbit = S3C_CLKCON_PCLK_UART1,
273 }, {
274 .name = "uart",
275 .id = 2,
276 .parent = &clk_p,
277 .enable = s3c64xx_pclk_ctrl,
278 .ctrlbit = S3C_CLKCON_PCLK_UART2,
279 }, {
280 .name = "uart",
281 .id = 3,
282 .parent = &clk_p,
283 .enable = s3c64xx_pclk_ctrl,
284 .ctrlbit = S3C_CLKCON_PCLK_UART3,
285 }, {
286 .name = "rtc",
287 .id = -1,
288 .parent = &clk_p,
289 .enable = s3c64xx_pclk_ctrl,
290 .ctrlbit = S3C_CLKCON_PCLK_RTC,
291 }, {
292 .name = "watchdog",
293 .id = -1,
294 .parent = &clk_p,
295 .ctrlbit = S3C_CLKCON_PCLK_WDT,
296 }, {
297 .name = "ac97",
298 .id = -1,
299 .parent = &clk_p,
300 .ctrlbit = S3C_CLKCON_PCLK_AC97,
301 }
302};
303
304
305static struct clk clk_fout_apll = {
306 .name = "fout_apll",
307 .id = -1,
308};
309
310static struct clk *clk_src_apll_list[] = {
311 [0] = &clk_fin_apll,
312 [1] = &clk_fout_apll,
313};
314
315static struct clksrc_sources clk_src_apll = {
316 .sources = clk_src_apll_list,
317 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
318};
319
320static struct clksrc_clk clk_mout_apll = {
321 .clk = {
322 .name = "mout_apll",
323 .id = -1,
324 },
325 .reg_src = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1 },
326 .sources = &clk_src_apll,
327};
328
329static struct clk *clk_src_epll_list[] = {
330 [0] = &clk_fin_epll,
331 [1] = &clk_fout_epll,
332};
333
334static struct clksrc_sources clk_src_epll = {
335 .sources = clk_src_epll_list,
336 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
337};
338
339static struct clksrc_clk clk_mout_epll = {
340 .clk = {
341 .name = "mout_epll",
342 .id = -1,
343 },
344 .reg_src = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1 },
345 .sources = &clk_src_epll,
346};
347
348static struct clk *clk_src_mpll_list[] = {
349 [0] = &clk_fin_mpll,
350 [1] = &clk_fout_mpll,
351};
352
353static struct clksrc_sources clk_src_mpll = {
354 .sources = clk_src_mpll_list,
355 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
356};
357
358static struct clksrc_clk clk_mout_mpll = {
359 .clk = {
360 .name = "mout_mpll",
361 .id = -1,
362 },
363 .reg_src = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1 },
364 .sources = &clk_src_mpll,
365};
366
367static unsigned int armclk_mask;
368
369static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk)
370{
371 unsigned long rate = clk_get_rate(clk->parent);
372 u32 clkdiv;
373
374 /* divisor mask starts at bit0, so no need to shift */
375 clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask;
376
377 return rate / (clkdiv + 1);
378}
379
380static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
381 unsigned long rate)
382{
383 unsigned long parent = clk_get_rate(clk->parent);
384 u32 div;
385
386 if (parent < rate)
387 return parent;
388
389 div = (parent / rate) - 1;
390 if (div > armclk_mask)
391 div = armclk_mask;
392
393 return parent / (div + 1);
394}
395
396static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
397{
398 unsigned long parent = clk_get_rate(clk->parent);
399 u32 div;
400 u32 val;
401
402 if (rate < parent / (armclk_mask + 1))
403 return -EINVAL;
404
405 rate = clk_round_rate(clk, rate);
406 div = clk_get_rate(clk->parent) / rate;
407
408 val = __raw_readl(S3C_CLK_DIV0);
409 val &= ~armclk_mask;
410 val |= (div - 1);
411 __raw_writel(val, S3C_CLK_DIV0);
412
413 return 0;
414
415}
416
417static struct clk clk_arm = {
418 .name = "armclk",
419 .id = -1,
420 .parent = &clk_mout_apll.clk,
421 .ops = &(struct clk_ops) {
422 .get_rate = s3c64xx_clk_arm_get_rate,
423 .set_rate = s3c64xx_clk_arm_set_rate,
424 .round_rate = s3c64xx_clk_arm_round_rate,
425 },
426};
427
428static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
429{
430 unsigned long rate = clk_get_rate(clk->parent);
431
432 printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
433
434 if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
435 rate /= 2;
436
437 return rate;
438}
439
440static struct clk_ops clk_dout_ops = {
441 .get_rate = s3c64xx_clk_doutmpll_get_rate,
442};
443
444static struct clk clk_dout_mpll = {
445 .name = "dout_mpll",
446 .id = -1,
447 .parent = &clk_mout_mpll.clk,
448 .ops = &clk_dout_ops,
449};
450
451static struct clk *clkset_spi_mmc_list[] = {
452 &clk_mout_epll.clk,
453 &clk_dout_mpll,
454 &clk_fin_epll,
455 &clk_27m,
456};
457
458static struct clksrc_sources clkset_spi_mmc = {
459 .sources = clkset_spi_mmc_list,
460 .nr_sources = ARRAY_SIZE(clkset_spi_mmc_list),
461};
462
463static struct clk *clkset_irda_list[] = {
464 &clk_mout_epll.clk,
465 &clk_dout_mpll,
466 NULL,
467 &clk_27m,
468};
469
470static struct clksrc_sources clkset_irda = {
471 .sources = clkset_irda_list,
472 .nr_sources = ARRAY_SIZE(clkset_irda_list),
473};
474
475static struct clk *clkset_uart_list[] = {
476 &clk_mout_epll.clk,
477 &clk_dout_mpll,
478 NULL,
479 NULL
480};
481
482static struct clksrc_sources clkset_uart = {
483 .sources = clkset_uart_list,
484 .nr_sources = ARRAY_SIZE(clkset_uart_list),
485};
486
487static struct clk *clkset_uhost_list[] = {
488 &clk_48m,
489 &clk_mout_epll.clk,
490 &clk_dout_mpll,
491 &clk_fin_epll,
492};
493
494static struct clksrc_sources clkset_uhost = {
495 .sources = clkset_uhost_list,
496 .nr_sources = ARRAY_SIZE(clkset_uhost_list),
497};
498
499/* The peripheral clocks are all controlled via clocksource followed
500 * by an optional divider and gate stage. We currently roll this into
501 * one clock which hides the intermediate clock from the mux.
502 *
503 * Note, the JPEG clock can only be an even divider...
504 *
505 * The scaler and LCD clocks depend on the S3C64XX version, and also
506 * have a common parent divisor so are not included here.
507 */
508
509/* clocks that feed other parts of the clock source tree */
510
511static struct clk clk_iis_cd0 = {
512 .name = "iis_cdclk0",
513 .id = -1,
514};
515
516static struct clk clk_iis_cd1 = {
517 .name = "iis_cdclk1",
518 .id = -1,
519};
520
521static struct clk clk_pcm_cd = {
522 .name = "pcm_cdclk",
523 .id = -1,
524};
525
526static struct clk *clkset_audio0_list[] = {
527 [0] = &clk_mout_epll.clk,
528 [1] = &clk_dout_mpll,
529 [2] = &clk_fin_epll,
530 [3] = &clk_iis_cd0,
531 [4] = &clk_pcm_cd,
532};
533
534static struct clksrc_sources clkset_audio0 = {
535 .sources = clkset_audio0_list,
536 .nr_sources = ARRAY_SIZE(clkset_audio0_list),
537};
538
539static struct clk *clkset_audio1_list[] = {
540 [0] = &clk_mout_epll.clk,
541 [1] = &clk_dout_mpll,
542 [2] = &clk_fin_epll,
543 [3] = &clk_iis_cd1,
544 [4] = &clk_pcm_cd,
545};
546
547static struct clksrc_sources clkset_audio1 = {
548 .sources = clkset_audio1_list,
549 .nr_sources = ARRAY_SIZE(clkset_audio1_list),
550};
551
552static struct clk *clkset_camif_list[] = {
553 &clk_h2,
554};
555
556static struct clksrc_sources clkset_camif = {
557 .sources = clkset_camif_list,
558 .nr_sources = ARRAY_SIZE(clkset_camif_list),
559};
560
561static struct clksrc_clk clksrcs[] = {
562 {
563 .clk = {
564 .name = "mmc_bus",
565 .id = 0,
566 .ctrlbit = S3C_CLKCON_SCLK_MMC0,
567 .enable = s3c64xx_sclk_ctrl,
568 },
569 .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 },
570 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 },
571 .sources = &clkset_spi_mmc,
572 }, {
573 .clk = {
574 .name = "mmc_bus",
575 .id = 1,
576 .ctrlbit = S3C_CLKCON_SCLK_MMC1,
577 .enable = s3c64xx_sclk_ctrl,
578 },
579 .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 },
580 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 },
581 .sources = &clkset_spi_mmc,
582 }, {
583 .clk = {
584 .name = "mmc_bus",
585 .id = 2,
586 .ctrlbit = S3C_CLKCON_SCLK_MMC2,
587 .enable = s3c64xx_sclk_ctrl,
588 },
589 .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 },
590 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 },
591 .sources = &clkset_spi_mmc,
592 }, {
593 .clk = {
594 .name = "usb-bus-host",
595 .id = -1,
596 .ctrlbit = S3C_CLKCON_SCLK_UHOST,
597 .enable = s3c64xx_sclk_ctrl,
598 },
599 .reg_src = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2 },
600 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4 },
601 .sources = &clkset_uhost,
602 }, {
603 .clk = {
604 .name = "uclk1",
605 .id = -1,
606 .ctrlbit = S3C_CLKCON_SCLK_UART,
607 .enable = s3c64xx_sclk_ctrl,
608 },
609 .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 },
610 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 },
611 .sources = &clkset_uart,
612 }, {
613/* Where does UCLK0 come from? */
614 .clk = {
615 .name = "spi-bus",
616 .id = 0,
617 .ctrlbit = S3C_CLKCON_SCLK_SPI0,
618 .enable = s3c64xx_sclk_ctrl,
619 },
620 .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
621 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
622 .sources = &clkset_spi_mmc,
623 }, {
624 .clk = {
625 .name = "spi-bus",
626 .id = 1,
627 .ctrlbit = S3C_CLKCON_SCLK_SPI1,
628 .enable = s3c64xx_sclk_ctrl,
629 },
630 .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
631 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
632 .sources = &clkset_spi_mmc,
633 }, {
634 .clk = {
635 .name = "audio-bus",
636 .id = 0,
637 .ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
638 .enable = s3c64xx_sclk_ctrl,
639 },
640 .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 },
641 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 },
642 .sources = &clkset_audio0,
643 }, {
644 .clk = {
645 .name = "audio-bus",
646 .id = 1,
647 .ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
648 .enable = s3c64xx_sclk_ctrl,
649 },
650 .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 },
651 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 },
652 .sources = &clkset_audio1,
653 }, {
654 .clk = {
655 .name = "irda-bus",
656 .id = 0,
657 .ctrlbit = S3C_CLKCON_SCLK_IRDA,
658 .enable = s3c64xx_sclk_ctrl,
659 },
660 .reg_src = { .reg = S3C_CLK_SRC, .shift = 24, .size = 2 },
661 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4 },
662 .sources = &clkset_irda,
663 }, {
664 .clk = {
665 .name = "camera",
666 .id = -1,
667 .ctrlbit = S3C_CLKCON_SCLK_CAM,
668 .enable = s3c64xx_sclk_ctrl,
669 },
670 .reg_div = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4 },
671 .reg_src = { .reg = NULL, .shift = 0, .size = 0 },
672 .sources = &clkset_camif,
673 },
674};
675
676/* Clock initialisation code */
677
678static struct clksrc_clk *init_parents[] = {
679 &clk_mout_apll,
680 &clk_mout_epll,
681 &clk_mout_mpll,
682};
683
684#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
685
686void __init_or_cpufreq s3c6400_setup_clocks(void)
687{
688 struct clk *xtal_clk;
689 unsigned long xtal;
690 unsigned long fclk;
691 unsigned long hclk;
692 unsigned long hclk2;
693 unsigned long pclk;
694 unsigned long epll;
695 unsigned long apll;
696 unsigned long mpll;
697 unsigned int ptr;
698 u32 clkdiv0;
699
700 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
701
702 clkdiv0 = __raw_readl(S3C_CLK_DIV0);
703 printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
704
705 xtal_clk = clk_get(NULL, "xtal");
706 BUG_ON(IS_ERR(xtal_clk));
707
708 xtal = clk_get_rate(xtal_clk);
709 clk_put(xtal_clk);
710
711 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
712
713 /* For now assume the mux always selects the crystal */
714 clk_ext_xtal_mux.parent = xtal_clk;
715
716 epll = s3c6400_get_epll(xtal);
717 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
718 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
719
720 fclk = mpll;
721
722 printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
723 apll, mpll, epll);
724
725 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
726 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
727 pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
728
729 printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
730 hclk2, hclk, pclk);
731
732 clk_fout_mpll.rate = mpll;
733 clk_fout_epll.rate = epll;
734 clk_fout_apll.rate = apll;
735
736 clk_h2.rate = hclk2;
737 clk_h.rate = hclk;
738 clk_p.rate = pclk;
739 clk_f.rate = fclk;
740
741 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
742 s3c_set_clksrc(init_parents[ptr], true);
743
744 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
745 s3c_set_clksrc(&clksrcs[ptr], true);
746}
747
748static struct clk *clks1[] __initdata = {
749 &clk_ext_xtal_mux,
750 &clk_iis_cd0,
751 &clk_iis_cd1,
752 &clk_pcm_cd,
753 &clk_mout_epll.clk,
754 &clk_mout_mpll.clk,
755 &clk_dout_mpll,
756 &clk_arm,
757};
758
759static struct clk *clks[] __initdata = {
760 &clk_ext,
761 &clk_epll,
762 &clk_27m,
763 &clk_48m,
764 &clk_h2,
765};
766
767/**
768 * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410
769 * @xtal: The rate for the clock crystal feeding the PLLs.
770 * @armclk_divlimit: Divisor mask for ARMCLK.
771 *
772 * Register the clocks for the S3C6400 and S3C6410 SoC range, such
773 * as ARMCLK as well as the necessary parent clocks.
774 *
775 * This call does not setup the clocks, which is left to the
776 * s3c6400_setup_clocks() call which may be needed by the cpufreq
777 * or resume code to re-set the clocks if the bootloader has changed
778 * them.
779 */
780void __init s3c64xx_register_clocks(unsigned long xtal,
781 unsigned armclk_divlimit)
782{
783 struct clk *clkp;
784 int ret;
785 int ptr;
786
787 armclk_mask = armclk_divlimit;
788
789 s3c24xx_register_baseclocks(xtal);
790 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
791
792 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
793
794 clkp = init_clocks_disable;
795 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
796
797 ret = s3c24xx_register_clock(clkp);
798 if (ret < 0) {
799 printk(KERN_ERR "Failed to register clock %s (%d)\n",
800 clkp->name, ret);
801 }
802
803 (clkp->enable)(clkp, 0);
804 }
805
806 s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
807 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
808 s3c_pwmclk_init();
809}
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
index 49796d2db86d..374e45e566b8 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/mach-s3c64xx/cpu.c
@@ -33,8 +33,8 @@
33#include <plat/devs.h> 33#include <plat/devs.h>
34#include <plat/clock.h> 34#include <plat/clock.h>
35 35
36#include <plat/s3c6400.h> 36#include <mach/s3c6400.h>
37#include <plat/s3c6410.h> 37#include <mach/s3c6410.h>
38 38
39/* table of supported CPUs */ 39/* table of supported CPUs */
40 40
@@ -73,17 +73,22 @@ static struct map_desc s3c_iodesc[] __initdata = {
73 .length = SZ_4K, 73 .length = SZ_4K,
74 .type = MT_DEVICE, 74 .type = MT_DEVICE,
75 }, { 75 }, {
76 .virtual = (unsigned long)S3C_VA_MEM,
77 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
78 .length = SZ_4K,
79 .type = MT_DEVICE,
80 }, {
76 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), 81 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
77 .pfn = __phys_to_pfn(S3C_PA_UART), 82 .pfn = __phys_to_pfn(S3C_PA_UART),
78 .length = SZ_4K, 83 .length = SZ_4K,
79 .type = MT_DEVICE, 84 .type = MT_DEVICE,
80 }, { 85 }, {
81 .virtual = (unsigned long)S3C_VA_VIC0, 86 .virtual = (unsigned long)VA_VIC0,
82 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), 87 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
83 .length = SZ_16K, 88 .length = SZ_16K,
84 .type = MT_DEVICE, 89 .type = MT_DEVICE,
85 }, { 90 }, {
86 .virtual = (unsigned long)S3C_VA_VIC1, 91 .virtual = (unsigned long)VA_VIC1,
87 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), 92 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
88 .length = SZ_16K, 93 .length = SZ_16K,
89 .type = MT_DEVICE, 94 .type = MT_DEVICE,
@@ -124,6 +129,12 @@ static struct sys_device s3c64xx_sysdev = {
124 .cls = &s3c64xx_sysclass, 129 .cls = &s3c64xx_sysclass,
125}; 130};
126 131
132/* uart registration process */
133
134void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
135{
136 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
137}
127 138
128/* read cpu identification code */ 139/* read cpu identification code */
129 140
diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c
index 74c0e8347de5..74c0e8347de5 100644
--- a/arch/arm/plat-s3c64xx/cpufreq.c
+++ b/arch/arm/mach-s3c64xx/cpufreq.c
diff --git a/arch/arm/mach-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c
new file mode 100644
index 000000000000..fafef9b6bcfa
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-adc.c
@@ -0,0 +1,46 @@
1/* linux/arch/arm/plat-s3c64xx/dev-adc.c
2 *
3 * Copyright 2010 Maurus Cuelenaere
4 *
5 * S3C64xx series device definition for ADC device
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18
19#include <plat/adc.h>
20#include <plat/devs.h>
21#include <plat/cpu.h>
22
23static struct resource s3c_adc_resource[] = {
24 [0] = {
25 .start = S3C64XX_PA_ADC,
26 .end = S3C64XX_PA_ADC + SZ_256 - 1,
27 .flags = IORESOURCE_MEM,
28 },
29 [1] = {
30 .start = IRQ_TC,
31 .end = IRQ_TC,
32 .flags = IORESOURCE_IRQ,
33 },
34 [2] = {
35 .start = IRQ_ADC,
36 .end = IRQ_ADC,
37 .flags = IORESOURCE_IRQ,
38 },
39};
40
41struct platform_device s3c_device_adc = {
42 .name = "s3c64xx-adc",
43 .id = -1,
44 .num_resources = ARRAY_SIZE(s3c_adc_resource),
45 .resource = s3c_adc_resource,
46};
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
new file mode 100644
index 000000000000..c3e9e73bd0f9
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -0,0 +1,335 @@
1/* linux/arch/arm/plat-s3c/dev-audio.c
2 *
3 * Copyright 2009 Wolfson Microelectronics
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18#include <mach/dma.h>
19#include <mach/gpio.h>
20
21#include <plat/devs.h>
22#include <plat/audio.h>
23#include <plat/gpio-cfg.h>
24
25#include <mach/gpio-bank-c.h>
26#include <mach/gpio-bank-d.h>
27#include <mach/gpio-bank-e.h>
28#include <mach/gpio-bank-h.h>
29
30static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
31{
32 switch (pdev->id) {
33 case 0:
34 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
35 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
36 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
37 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
38 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
39 break;
40 case 1:
41 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
42 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
43 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
44 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
45 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
46 default:
47 printk(KERN_DEBUG "Invalid I2S Controller number!");
48 return -EINVAL;
49 }
50
51 return 0;
52}
53
54static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
55{
56 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
57 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
58 s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
59 s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
60 s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
61 s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
62 s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
63
64 return 0;
65}
66
67static struct resource s3c64xx_iis0_resource[] = {
68 [0] = {
69 .start = S3C64XX_PA_IIS0,
70 .end = S3C64XX_PA_IIS0 + 0x100 - 1,
71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
74 .start = DMACH_I2S0_OUT,
75 .end = DMACH_I2S0_OUT,
76 .flags = IORESOURCE_DMA,
77 },
78 [2] = {
79 .start = DMACH_I2S0_IN,
80 .end = DMACH_I2S0_IN,
81 .flags = IORESOURCE_DMA,
82 },
83};
84
85static struct s3c_audio_pdata s3c_i2s0_pdata = {
86 .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
87};
88
89struct platform_device s3c64xx_device_iis0 = {
90 .name = "s3c64xx-iis",
91 .id = 0,
92 .num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
93 .resource = s3c64xx_iis0_resource,
94 .dev = {
95 .platform_data = &s3c_i2s0_pdata,
96 },
97};
98EXPORT_SYMBOL(s3c64xx_device_iis0);
99
100static struct resource s3c64xx_iis1_resource[] = {
101 [0] = {
102 .start = S3C64XX_PA_IIS1,
103 .end = S3C64XX_PA_IIS1 + 0x100 - 1,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = DMACH_I2S1_OUT,
108 .end = DMACH_I2S1_OUT,
109 .flags = IORESOURCE_DMA,
110 },
111 [2] = {
112 .start = DMACH_I2S1_IN,
113 .end = DMACH_I2S1_IN,
114 .flags = IORESOURCE_DMA,
115 },
116};
117
118static struct s3c_audio_pdata s3c_i2s1_pdata = {
119 .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
120};
121
122struct platform_device s3c64xx_device_iis1 = {
123 .name = "s3c64xx-iis",
124 .id = 1,
125 .num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
126 .resource = s3c64xx_iis1_resource,
127 .dev = {
128 .platform_data = &s3c_i2s1_pdata,
129 },
130};
131EXPORT_SYMBOL(s3c64xx_device_iis1);
132
133static struct resource s3c64xx_iisv4_resource[] = {
134 [0] = {
135 .start = S3C64XX_PA_IISV4,
136 .end = S3C64XX_PA_IISV4 + 0x100 - 1,
137 .flags = IORESOURCE_MEM,
138 },
139 [1] = {
140 .start = DMACH_HSI_I2SV40_TX,
141 .end = DMACH_HSI_I2SV40_TX,
142 .flags = IORESOURCE_DMA,
143 },
144 [2] = {
145 .start = DMACH_HSI_I2SV40_RX,
146 .end = DMACH_HSI_I2SV40_RX,
147 .flags = IORESOURCE_DMA,
148 },
149};
150
151static struct s3c_audio_pdata s3c_i2sv4_pdata = {
152 .cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
153};
154
155struct platform_device s3c64xx_device_iisv4 = {
156 .name = "s3c64xx-iis-v4",
157 .id = -1,
158 .num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
159 .resource = s3c64xx_iisv4_resource,
160 .dev = {
161 .platform_data = &s3c_i2sv4_pdata,
162 },
163};
164EXPORT_SYMBOL(s3c64xx_device_iisv4);
165
166
167/* PCM Controller platform_devices */
168
169static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
170{
171 switch (pdev->id) {
172 case 0:
173 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
174 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
175 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
176 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
177 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
178 break;
179 case 1:
180 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
181 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
182 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
183 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
184 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
185 break;
186 default:
187 printk(KERN_DEBUG "Invalid PCM Controller number!");
188 return -EINVAL;
189 }
190
191 return 0;
192}
193
194static struct resource s3c64xx_pcm0_resource[] = {
195 [0] = {
196 .start = S3C64XX_PA_PCM0,
197 .end = S3C64XX_PA_PCM0 + 0x100 - 1,
198 .flags = IORESOURCE_MEM,
199 },
200 [1] = {
201 .start = DMACH_PCM0_TX,
202 .end = DMACH_PCM0_TX,
203 .flags = IORESOURCE_DMA,
204 },
205 [2] = {
206 .start = DMACH_PCM0_RX,
207 .end = DMACH_PCM0_RX,
208 .flags = IORESOURCE_DMA,
209 },
210};
211
212static struct s3c_audio_pdata s3c_pcm0_pdata = {
213 .cfg_gpio = s3c64xx_pcm_cfg_gpio,
214};
215
216struct platform_device s3c64xx_device_pcm0 = {
217 .name = "samsung-pcm",
218 .id = 0,
219 .num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource),
220 .resource = s3c64xx_pcm0_resource,
221 .dev = {
222 .platform_data = &s3c_pcm0_pdata,
223 },
224};
225EXPORT_SYMBOL(s3c64xx_device_pcm0);
226
227static struct resource s3c64xx_pcm1_resource[] = {
228 [0] = {
229 .start = S3C64XX_PA_PCM1,
230 .end = S3C64XX_PA_PCM1 + 0x100 - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = DMACH_PCM1_TX,
235 .end = DMACH_PCM1_TX,
236 .flags = IORESOURCE_DMA,
237 },
238 [2] = {
239 .start = DMACH_PCM1_RX,
240 .end = DMACH_PCM1_RX,
241 .flags = IORESOURCE_DMA,
242 },
243};
244
245static struct s3c_audio_pdata s3c_pcm1_pdata = {
246 .cfg_gpio = s3c64xx_pcm_cfg_gpio,
247};
248
249struct platform_device s3c64xx_device_pcm1 = {
250 .name = "samsung-pcm",
251 .id = 1,
252 .num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource),
253 .resource = s3c64xx_pcm1_resource,
254 .dev = {
255 .platform_data = &s3c_pcm1_pdata,
256 },
257};
258EXPORT_SYMBOL(s3c64xx_device_pcm1);
259
260/* AC97 Controller platform devices */
261
262static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
263{
264 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);
265 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
266 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
267 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
268 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
269
270 return 0;
271}
272
273static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
274{
275 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);
276 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
277 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
278 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
279 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
280
281 return 0;
282}
283
284static struct resource s3c64xx_ac97_resource[] = {
285 [0] = {
286 .start = S3C64XX_PA_AC97,
287 .end = S3C64XX_PA_AC97 + 0x100 - 1,
288 .flags = IORESOURCE_MEM,
289 },
290 [1] = {
291 .start = DMACH_AC97_PCMOUT,
292 .end = DMACH_AC97_PCMOUT,
293 .flags = IORESOURCE_DMA,
294 },
295 [2] = {
296 .start = DMACH_AC97_PCMIN,
297 .end = DMACH_AC97_PCMIN,
298 .flags = IORESOURCE_DMA,
299 },
300 [3] = {
301 .start = DMACH_AC97_MICIN,
302 .end = DMACH_AC97_MICIN,
303 .flags = IORESOURCE_DMA,
304 },
305 [4] = {
306 .start = IRQ_AC97,
307 .end = IRQ_AC97,
308 .flags = IORESOURCE_IRQ,
309 },
310};
311
312static struct s3c_audio_pdata s3c_ac97_pdata;
313
314static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32);
315
316struct platform_device s3c64xx_device_ac97 = {
317 .name = "s3c-ac97",
318 .id = -1,
319 .num_resources = ARRAY_SIZE(s3c64xx_ac97_resource),
320 .resource = s3c64xx_ac97_resource,
321 .dev = {
322 .platform_data = &s3c_ac97_pdata,
323 .dma_mask = &s3c64xx_ac97_dmamask,
324 .coherent_dma_mask = DMA_BIT_MASK(32),
325 },
326};
327EXPORT_SYMBOL(s3c64xx_device_ac97);
328
329void __init s3c64xx_ac97_setup_gpio(int num)
330{
331 if (num == S3C64XX_AC97_GPD)
332 s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd;
333 else
334 s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe;
335}
diff --git a/arch/arm/mach-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c
new file mode 100644
index 000000000000..b9e7a05f0129
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-rtc.c
@@ -0,0 +1,43 @@
1/* linux/arch/arm/plat-s3c64xx/dev-rtc.c
2 *
3 * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/kernel.h>
11#include <linux/string.h>
12#include <linux/platform_device.h>
13
14#include <mach/irqs.h>
15#include <mach/map.h>
16
17#include <plat/devs.h>
18
19static struct resource s3c_rtc_resource[] = {
20 [0] = {
21 .start = S3C64XX_PA_RTC,
22 .end = S3C64XX_PA_RTC + 0xff,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_RTC_ALARM,
27 .end = IRQ_RTC_ALARM,
28 .flags = IORESOURCE_IRQ,
29 },
30 [2] = {
31 .start = IRQ_RTC_TIC,
32 .end = IRQ_RTC_TIC,
33 .flags = IORESOURCE_IRQ
34 }
35};
36
37struct platform_device s3c_device_rtc = {
38 .name = "s3c64xx-rtc",
39 .id = -1,
40 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
41 .resource = s3c_rtc_resource,
42};
43EXPORT_SYMBOL(s3c_device_rtc);
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
new file mode 100644
index 000000000000..29c32d088515
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -0,0 +1,182 @@
1/* linux/arch/arm/plat-s3c64xx/dev-spi.c
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15
16#include <mach/dma.h>
17#include <mach/map.h>
18#include <mach/gpio.h>
19#include <mach/gpio-bank-c.h>
20#include <mach/spi-clocks.h>
21
22#include <plat/s3c64xx-spi.h>
23#include <plat/gpio-cfg.h>
24#include <plat/irqs.h>
25
26static char *spi_src_clks[] = {
27 [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
28 [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
29 [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
30};
31
32/* SPI Controller platform_devices */
33
34/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
35 * The emulated CS is toggled by board specific mechanism, as it can
36 * be either some immediate GPIO or some signal out of some other
37 * chip in between ... or some yet another way.
38 * We simply do not assume anything about CS.
39 */
40static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
41{
42 switch (pdev->id) {
43 case 0:
44 s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);
45 s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);
46 s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);
47 s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);
48 s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);
49 s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);
50 break;
51
52 case 1:
53 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);
54 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);
55 s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);
56 s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);
57 s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);
58 s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);
59 break;
60
61 default:
62 dev_err(&pdev->dev, "Invalid SPI Controller number!");
63 return -EINVAL;
64 }
65
66 return 0;
67}
68
69static struct resource s3c64xx_spi0_resource[] = {
70 [0] = {
71 .start = S3C64XX_PA_SPI0,
72 .end = S3C64XX_PA_SPI0 + 0x100 - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 [1] = {
76 .start = DMACH_SPI0_TX,
77 .end = DMACH_SPI0_TX,
78 .flags = IORESOURCE_DMA,
79 },
80 [2] = {
81 .start = DMACH_SPI0_RX,
82 .end = DMACH_SPI0_RX,
83 .flags = IORESOURCE_DMA,
84 },
85 [3] = {
86 .start = IRQ_SPI0,
87 .end = IRQ_SPI0,
88 .flags = IORESOURCE_IRQ,
89 },
90};
91
92static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
93 .cfg_gpio = s3c64xx_spi_cfg_gpio,
94 .fifo_lvl_mask = 0x7f,
95 .rx_lvl_offset = 13,
96};
97
98static u64 spi_dmamask = DMA_BIT_MASK(32);
99
100struct platform_device s3c64xx_device_spi0 = {
101 .name = "s3c64xx-spi",
102 .id = 0,
103 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
104 .resource = s3c64xx_spi0_resource,
105 .dev = {
106 .dma_mask = &spi_dmamask,
107 .coherent_dma_mask = DMA_BIT_MASK(32),
108 .platform_data = &s3c64xx_spi0_pdata,
109 },
110};
111EXPORT_SYMBOL(s3c64xx_device_spi0);
112
113static struct resource s3c64xx_spi1_resource[] = {
114 [0] = {
115 .start = S3C64XX_PA_SPI1,
116 .end = S3C64XX_PA_SPI1 + 0x100 - 1,
117 .flags = IORESOURCE_MEM,
118 },
119 [1] = {
120 .start = DMACH_SPI1_TX,
121 .end = DMACH_SPI1_TX,
122 .flags = IORESOURCE_DMA,
123 },
124 [2] = {
125 .start = DMACH_SPI1_RX,
126 .end = DMACH_SPI1_RX,
127 .flags = IORESOURCE_DMA,
128 },
129 [3] = {
130 .start = IRQ_SPI1,
131 .end = IRQ_SPI1,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
137 .cfg_gpio = s3c64xx_spi_cfg_gpio,
138 .fifo_lvl_mask = 0x7f,
139 .rx_lvl_offset = 13,
140};
141
142struct platform_device s3c64xx_device_spi1 = {
143 .name = "s3c64xx-spi",
144 .id = 1,
145 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
146 .resource = s3c64xx_spi1_resource,
147 .dev = {
148 .dma_mask = &spi_dmamask,
149 .coherent_dma_mask = DMA_BIT_MASK(32),
150 .platform_data = &s3c64xx_spi1_pdata,
151 },
152};
153EXPORT_SYMBOL(s3c64xx_device_spi1);
154
155void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
156{
157 struct s3c64xx_spi_info *pd;
158
159 /* Reject invalid configuration */
160 if (!num_cs || src_clk_nr < 0
161 || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
162 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
163 return;
164 }
165
166 switch (cntrlr) {
167 case 0:
168 pd = &s3c64xx_spi0_pdata;
169 break;
170 case 1:
171 pd = &s3c64xx_spi1_pdata;
172 break;
173 default:
174 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
175 __func__, cntrlr);
176 return;
177 }
178
179 pd->num_cs = num_cs;
180 pd->src_clk_nr = src_clk_nr;
181 pd->src_clk_name = spi_src_clks[src_clk_nr];
182}
diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
index 62c11a6fc7ba..f797f748b999 100644
--- a/arch/arm/plat-s3c64xx/dev-uart.c
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
@@ -145,32 +145,3 @@ struct s3c24xx_uart_resources s3c64xx_uart_resources[] __initdata = {
145 .nr_resources = ARRAY_SIZE(s3c64xx_uart3_resource), 145 .nr_resources = ARRAY_SIZE(s3c64xx_uart3_resource),
146 }, 146 },
147}; 147};
148
149/* uart devices */
150
151static struct platform_device s3c24xx_uart_device0 = {
152 .id = 0,
153};
154
155static struct platform_device s3c24xx_uart_device1 = {
156 .id = 1,
157};
158
159static struct platform_device s3c24xx_uart_device2 = {
160 .id = 2,
161};
162
163static struct platform_device s3c24xx_uart_device3 = {
164 .id = 3,
165};
166
167struct platform_device *s3c24xx_uart_src[4] = {
168 &s3c24xx_uart_device0,
169 &s3c24xx_uart_device1,
170 &s3c24xx_uart_device2,
171 &s3c24xx_uart_device3,
172};
173
174struct platform_device *s3c24xx_uart_devs[4] = {
175};
176
diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index d554b936fcfb..b62bdf18dca4 100644
--- a/arch/arm/plat-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -27,8 +27,7 @@
27#include <mach/map.h> 27#include <mach/map.h>
28#include <mach/irqs.h> 28#include <mach/irqs.h>
29 29
30#include <plat/dma-plat.h> 30#include <mach/regs-sys.h>
31#include <plat/regs-sys.h>
32 31
33#include <asm/hardware/pl080.h> 32#include <asm/hardware/pl080.h>
34 33
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index 778560457277..66e6794481d2 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -18,11 +18,11 @@
18 18
19#include <mach/map.h> 19#include <mach/map.h>
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21#include <mach/gpio-core.h>
22 21
22#include <plat/gpio-core.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24#include <plat/gpio-cfg-helpers.h> 24#include <plat/gpio-cfg-helpers.h>
25#include <plat/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27/* GPIO bank summary: 27/* GPIO bank summary:
28 * 28 *
@@ -49,150 +49,6 @@
49 * [2] BANK has two control registers, GPxCON0 and GPxCON1 49 * [2] BANK has two control registers, GPxCON0 and GPxCON1
50 */ 50 */
51 51
52#define OFF_GPCON (0x00)
53#define OFF_GPDAT (0x04)
54
55#define con_4bit_shift(__off) ((__off) * 4)
56
57#if 1
58#define gpio_dbg(x...) do { } while(0)
59#else
60#define gpio_dbg(x...) printk(KERN_DEBUG x)
61#endif
62
63/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
64 * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
65 * following example:
66 *
67 * base + 0x00: Control register, 4 bits per gpio
68 * gpio n: 4 bits starting at (4*n)
69 * 0000 = input, 0001 = output, others mean special-function
70 * base + 0x04: Data register, 1 bit per gpio
71 * bit n: data bit n
72 *
73 * Note, since the data register is one bit per gpio and is at base + 0x4
74 * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
75 * the output.
76*/
77
78static int s3c64xx_gpiolib_4bit_input(struct gpio_chip *chip, unsigned offset)
79{
80 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
81 void __iomem *base = ourchip->base;
82 unsigned long con;
83
84 con = __raw_readl(base + OFF_GPCON);
85 con &= ~(0xf << con_4bit_shift(offset));
86 __raw_writel(con, base + OFF_GPCON);
87
88 gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
89
90 return 0;
91}
92
93static int s3c64xx_gpiolib_4bit_output(struct gpio_chip *chip,
94 unsigned offset, int value)
95{
96 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
97 void __iomem *base = ourchip->base;
98 unsigned long con;
99 unsigned long dat;
100
101 con = __raw_readl(base + OFF_GPCON);
102 con &= ~(0xf << con_4bit_shift(offset));
103 con |= 0x1 << con_4bit_shift(offset);
104
105 dat = __raw_readl(base + OFF_GPDAT);
106 if (value)
107 dat |= 1 << offset;
108 else
109 dat &= ~(1 << offset);
110
111 __raw_writel(dat, base + OFF_GPDAT);
112 __raw_writel(con, base + OFF_GPCON);
113 __raw_writel(dat, base + OFF_GPDAT);
114
115 gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
116
117 return 0;
118}
119
120/* The next set of routines are for the case where the GPIO configuration
121 * registers are 4 bits per GPIO but there is more than one register (the
122 * bank has more than 8 GPIOs.
123 *
124 * This case is the similar to the 4 bit case, but the registers are as
125 * follows:
126 *
127 * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
128 * gpio n: 4 bits starting at (4*n)
129 * 0000 = input, 0001 = output, others mean special-function
130 * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
131 * gpio n: 4 bits starting at (4*n)
132 * 0000 = input, 0001 = output, others mean special-function
133 * base + 0x08: Data register, 1 bit per gpio
134 * bit n: data bit n
135 *
136 * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
137 * store the 'base + 0x4' address so that these routines see the data
138 * register at ourchip->base + 0x04.
139*/
140
141static int s3c64xx_gpiolib_4bit2_input(struct gpio_chip *chip, unsigned offset)
142{
143 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
144 void __iomem *base = ourchip->base;
145 void __iomem *regcon = base;
146 unsigned long con;
147
148 if (offset > 7)
149 offset -= 8;
150 else
151 regcon -= 4;
152
153 con = __raw_readl(regcon);
154 con &= ~(0xf << con_4bit_shift(offset));
155 __raw_writel(con, regcon);
156
157 gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
158
159 return 0;
160
161}
162
163static int s3c64xx_gpiolib_4bit2_output(struct gpio_chip *chip,
164 unsigned offset, int value)
165{
166 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
167 void __iomem *base = ourchip->base;
168 void __iomem *regcon = base;
169 unsigned long con;
170 unsigned long dat;
171
172 if (offset > 7)
173 offset -= 8;
174 else
175 regcon -= 4;
176
177 con = __raw_readl(regcon);
178 con &= ~(0xf << con_4bit_shift(offset));
179 con |= 0x1 << con_4bit_shift(offset);
180
181 dat = __raw_readl(base + OFF_GPDAT);
182 if (value)
183 dat |= 1 << offset;
184 else
185 dat &= ~(1 << offset);
186
187 __raw_writel(dat, base + OFF_GPDAT);
188 __raw_writel(con, regcon);
189 __raw_writel(dat, base + OFF_GPDAT);
190
191 gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
192
193 return 0;
194}
195
196static struct s3c_gpio_cfg gpio_4bit_cfg_noint = { 52static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
197 .set_config = s3c_gpio_setcfg_s3c64xx_4bit, 53 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
198 .set_pull = s3c_gpio_setpull_updown, 54 .set_pull = s3c_gpio_setpull_updown,
@@ -399,20 +255,6 @@ static struct s3c_gpio_chip gpio_2bit[] = {
399 }, 255 },
400}; 256};
401 257
402static __init void s3c64xx_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
403{
404 chip->chip.direction_input = s3c64xx_gpiolib_4bit_input;
405 chip->chip.direction_output = s3c64xx_gpiolib_4bit_output;
406 chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
407}
408
409static __init void s3c64xx_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
410{
411 chip->chip.direction_input = s3c64xx_gpiolib_4bit2_input;
412 chip->chip.direction_output = s3c64xx_gpiolib_4bit2_output;
413 chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
414}
415
416static __init void s3c64xx_gpiolib_add_2bit(struct s3c_gpio_chip *chip) 258static __init void s3c64xx_gpiolib_add_2bit(struct s3c_gpio_chip *chip)
417{ 259{
418 chip->pm = __gpio_pm(&s3c_gpio_pm_2bit); 260 chip->pm = __gpio_pm(&s3c_gpio_pm_2bit);
@@ -432,10 +274,10 @@ static __init void s3c64xx_gpiolib_add(struct s3c_gpio_chip *chips,
432static __init int s3c64xx_gpiolib_init(void) 274static __init int s3c64xx_gpiolib_init(void)
433{ 275{
434 s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit), 276 s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit),
435 s3c64xx_gpiolib_add_4bit); 277 samsung_gpiolib_add_4bit);
436 278
437 s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2), 279 s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2),
438 s3c64xx_gpiolib_add_4bit2); 280 samsung_gpiolib_add_4bit2);
439 281
440 s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit), 282 s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit),
441 s3c64xx_gpiolib_add_2bit); 283 s3c64xx_gpiolib_add_2bit);
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
index 5c88875d6a3f..b18ac5266dfc 100644
--- a/arch/arm/mach-s3c6400/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
21 * aligned and add in the offset when we load the value here. 21 * aligned and add in the offset when we load the value here.
22 */ 22 */
23 23
24 .macro addruart, rx, tmp 24 .macro addruart, rx
25 mrc p15, 0, \rx, c1, c0 25 mrc p15, 0, \rx, c1, c0
26 tst \rx, #1 26 tst \rx, #1
27 ldreq \rx, = S3C_PA_UART 27 ldreq \rx, = S3C_PA_UART
diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/mach-s3c64xx/include/mach/dma.h
index 8f76a1e474d6..0a5d9268a23e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -1,16 +1,71 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h 1/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
2 * 2 *
3 * Copyright 2009 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2009 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C64XX DMA core 8 * S3C6400 - DMA support
9 * 9 */
10 * This program is free software; you can redistribute it and/or modify 10
11 * it under the terms of the GNU General Public License version 2 as 11#ifndef __ASM_ARCH_DMA_H
12 * published by the Free Software Foundation. 12#define __ASM_ARCH_DMA_H __FILE__
13*/ 13
14#define S3C_DMA_CHANNELS (16)
15
16/* see mach-s3c2410/dma.h for notes on dma channel numbers */
17
18/* Note, for the S3C64XX architecture we keep the DMACH_
19 * defines in the order they are allocated to [S]DMA0/[S]DMA1
20 * so that is easy to do DHACH_ -> DMA controller conversion
21 */
22enum dma_ch {
23 /* DMA0/SDMA0 */
24 DMACH_UART0 = 0,
25 DMACH_UART0_SRC2,
26 DMACH_UART1,
27 DMACH_UART1_SRC2,
28 DMACH_UART2,
29 DMACH_UART2_SRC2,
30 DMACH_UART3,
31 DMACH_UART3_SRC2,
32 DMACH_PCM0_TX,
33 DMACH_PCM0_RX,
34 DMACH_I2S0_OUT,
35 DMACH_I2S0_IN,
36 DMACH_SPI0_TX,
37 DMACH_SPI0_RX,
38 DMACH_HSI_I2SV40_TX,
39 DMACH_HSI_I2SV40_RX,
40
41 /* DMA1/SDMA1 */
42 DMACH_PCM1_TX = 16,
43 DMACH_PCM1_RX,
44 DMACH_I2S1_OUT,
45 DMACH_I2S1_IN,
46 DMACH_SPI1_TX,
47 DMACH_SPI1_RX,
48 DMACH_AC97_PCMOUT,
49 DMACH_AC97_PCMIN,
50 DMACH_AC97_MICIN,
51 DMACH_PWM,
52 DMACH_IRDA,
53 DMACH_EXTERNAL,
54 DMACH_RES1,
55 DMACH_RES2,
56 DMACH_SECURITY_RX, /* SDMA1 only */
57 DMACH_SECURITY_TX, /* SDMA1 only */
58 DMACH_MAX /* the end */
59};
60
61static __inline__ bool s3c_dma_has_circular(void)
62{
63 return true;
64}
65
66#define S3C2410_DMAF_CIRCULAR (1 << 0)
67
68#include <plat/dma.h>
14 69
15#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ 70#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
16 71
@@ -68,3 +123,5 @@ struct s3c2410_dma_chan {
68}; 123};
69 124
70#include <plat/dma-core.h> 125#include <plat/dma-core.h>
126
127#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
new file mode 100644
index 000000000000..dd362604dcce
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * Low-level IRQ helper macros for the Samsung S3C64XX series
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13*/
14
15#include <mach/map.h>
16#include <mach/irqs.h>
17
18#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
index 9aa0e427d113..34212e1a7e81 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
index 3933adb4d50a..7232c037e642 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
index e22b49f4f982..db189ab1639a 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
index 6fe4a49c26f0..1a01cee7aca3 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
index 7fcf3d8e0a48..f057adb627dd 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
index f3faff974a18..62ab8f5e7835 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
index 35bbd2378e55..b94954af1598 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
index 2ba1767512d7..5d75aaad865e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
index ce9ebe335566..4ceaa6098bc7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
index 21a906299d30..6f25cd079a40 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
index 569e76120881..d0aeda1cd9de 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
index b09e12954b57..21868fa102d0 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
index 92f00517926b..46bcfb63b8de 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
index 565e60aaee47..1712223487b0 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index e8e35e8fe731..0d46e994048a 100644
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -91,6 +91,10 @@ enum s3c_gpio_number {
91#define S3C_GPIO_END S3C64XX_GPIO_END 91#define S3C_GPIO_END S3C64XX_GPIO_END
92 92
93/* define the number of gpios we need to the one after the GPQ() range */ 93/* define the number of gpios we need to the one after the GPQ() range */
94#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) 94#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
95
96#define BOARD_NR_GPIOS 16
97
98#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
95 99
96#include <asm-generic/gpio.h> 100#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h
index 862d033e57a4..862d033e57a4 100644
--- a/arch/arm/mach-s3c6400/include/mach/hardware.h
+++ b/arch/arm/mach-s3c64xx/include/mach/hardware.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
new file mode 100644
index 000000000000..de5716dbbd65
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/io.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s3c64xxinclude/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S3C64XX based
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 7956fd3bb194..e9ab4ac0b9a8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -1,15 +1,15 @@
1/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/irqs.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C64XX - Common IRQ support 8 * S3C64XX - IRQ support
9 */ 9 */
10 10
11#ifndef __ASM_PLAT_S3C64XX_IRQS_H 11#ifndef __ASM_MACH_S3C64XX_IRQS_H
12#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__ 12#define __ASM_MACH_S3C64XX_IRQS_H __FILE__
13 13
14/* we keep the first set of CPU IRQs out of the range of 14/* we keep the first set of CPU IRQs out of the range of
15 * the ISA space, so that the PC104 has them to itself 15 * the ISA space, so that the PC104 has them to itself
@@ -24,8 +24,8 @@
24 24
25#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) 25#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET)
26 26
27#define S3C_VIC0_BASE S3C_IRQ(0) 27#define IRQ_VIC0_BASE S3C_IRQ(0)
28#define S3C_VIC1_BASE S3C_IRQ(32) 28#define IRQ_VIC1_BASE S3C_IRQ(32)
29 29
30/* UART interrupts, each UART has 4 intterupts per channel so 30/* UART interrupts, each UART has 4 intterupts per channel so
31 * use the space between the ISA and S3C main interrupts. Note, these 31 * use the space between the ISA and S3C main interrupts. Note, these
@@ -59,8 +59,8 @@
59 59
60/* VIC based IRQs */ 60/* VIC based IRQs */
61 61
62#define S3C64XX_IRQ_VIC0(x) (S3C_VIC0_BASE + (x)) 62#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x))
63#define S3C64XX_IRQ_VIC1(x) (S3C_VIC1_BASE + (x)) 63#define S3C64XX_IRQ_VIC1(x) (IRQ_VIC1_BASE + (x))
64 64
65/* VIC0 */ 65/* VIC0 */
66 66
@@ -198,7 +198,13 @@
198 * interrupt controllers). */ 198 * interrupt controllers). */
199#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) 199#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
200 200
201#ifdef CONFIG_SMDK6410_WM1190_EV1
202#define IRQ_BOARD_NR 64
203#elif defined(CONFIG_SMDK6410_WM1192_EV1)
204#define IRQ_BOARD_NR 64
205#else
201#define IRQ_BOARD_NR 16 206#define IRQ_BOARD_NR 16
207#endif
202 208
203#define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR) 209#define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR)
204 210
@@ -206,5 +212,5 @@
206 212
207#define NR_IRQS (IRQ_BOARD_END + 1) 213#define NR_IRQS (IRQ_BOARD_END + 1)
208 214
209#endif /* __ASM_PLAT_S3C64XX_IRQS_H */ 215#endif /* __ASM_MACH_S3C64XX_IRQS_H */
210 216
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 106ee13581e2..801c1c0f3a95 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -17,6 +17,18 @@
17 17
18#include <plat/map-base.h> 18#include <plat/map-base.h>
19 19
20/*
21 * Post-mux Chip Select Regions Xm0CSn_
22 * These may be used by SROM, NAND or CF depending on settings
23 */
24
25#define S3C64XX_PA_XM0CSN0 (0x10000000)
26#define S3C64XX_PA_XM0CSN1 (0x18000000)
27#define S3C64XX_PA_XM0CSN2 (0x20000000)
28#define S3C64XX_PA_XM0CSN3 (0x28000000)
29#define S3C64XX_PA_XM0CSN4 (0x30000000)
30#define S3C64XX_PA_XM0CSN5 (0x38000000)
31
20/* HSMMC units */ 32/* HSMMC units */
21#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000)) 33#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
22#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0) 34#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)
@@ -38,16 +50,22 @@
38#define S3C_VA_UART2 S3C_VA_UARTx(2) 50#define S3C_VA_UART2 S3C_VA_UARTx(2)
39#define S3C_VA_UART3 S3C_VA_UARTx(3) 51#define S3C_VA_UART3 S3C_VA_UARTx(3)
40 52
53#define S3C64XX_PA_SROM (0x70000000)
54
41#define S3C64XX_PA_NAND (0x70200000) 55#define S3C64XX_PA_NAND (0x70200000)
42#define S3C64XX_PA_FB (0x77100000) 56#define S3C64XX_PA_FB (0x77100000)
43#define S3C64XX_PA_USB_HSOTG (0x7C000000) 57#define S3C64XX_PA_USB_HSOTG (0x7C000000)
44#define S3C64XX_PA_WATCHDOG (0x7E004000) 58#define S3C64XX_PA_WATCHDOG (0x7E004000)
59#define S3C64XX_PA_RTC (0x7E005000)
60#define S3C64XX_PA_ADC (0x7E00B000)
45#define S3C64XX_PA_SYSCON (0x7E00F000) 61#define S3C64XX_PA_SYSCON (0x7E00F000)
46#define S3C64XX_PA_AC97 (0x7F001000) 62#define S3C64XX_PA_AC97 (0x7F001000)
47#define S3C64XX_PA_IIS0 (0x7F002000) 63#define S3C64XX_PA_IIS0 (0x7F002000)
48#define S3C64XX_PA_IIS1 (0x7F003000) 64#define S3C64XX_PA_IIS1 (0x7F003000)
49#define S3C64XX_PA_TIMER (0x7F006000) 65#define S3C64XX_PA_TIMER (0x7F006000)
50#define S3C64XX_PA_IIC0 (0x7F004000) 66#define S3C64XX_PA_IIC0 (0x7F004000)
67#define S3C64XX_PA_SPI0 (0x7F00B000)
68#define S3C64XX_PA_SPI1 (0x7F00C000)
51#define S3C64XX_PA_PCM0 (0x7F009000) 69#define S3C64XX_PA_PCM0 (0x7F009000)
52#define S3C64XX_PA_PCM1 (0x7F00A000) 70#define S3C64XX_PA_PCM1 (0x7F00A000)
53#define S3C64XX_PA_IISV4 (0x7F00D000) 71#define S3C64XX_PA_IISV4 (0x7F00D000)
@@ -70,8 +88,8 @@
70#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) 88#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
71 89
72/* place VICs close together */ 90/* place VICs close together */
73#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) 91#define VA_VIC0 (S3C_VA_IRQ + 0x00)
74#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) 92#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
75 93
76/* compatibiltiy defines. */ 94/* compatibiltiy defines. */
77#define S3C_PA_TIMER S3C64XX_PA_TIMER 95#define S3C_PA_TIMER S3C64XX_PA_TIMER
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h
index a3ac84a65480..a3ac84a65480 100644
--- a/arch/arm/mach-s3c6400/include/mach/memory.h
+++ b/arch/arm/mach-s3c64xx/include/mach/memory.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h
index 90bbd72fdc4e..90bbd72fdc4e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pll.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
index d347de3ba0dc..1e9f20f0bb7b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/pm-core.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -12,7 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14 14
15#include <plat/regs-gpio.h> 15#include <mach/regs-gpio.h>
16 16
17static inline void s3c_pm_debug_init_uart(void) 17static inline void s3c_pm_debug_init_uart(void)
18{ 18{
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
index b25bedee0d52..b25bedee0d52 100644
--- a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index ff46e7fa957a..3ef62741e5d1 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -35,14 +35,6 @@
35#define S3C_MEM0_GATE S3C_CLKREG(0x3C) 35#define S3C_MEM0_GATE S3C_CLKREG(0x3C)
36 36
37/* CLKDIV0 */ 37/* CLKDIV0 */
38#define S3C6400_CLKDIV0_MFC_MASK (0xf << 28)
39#define S3C6400_CLKDIV0_MFC_SHIFT (28)
40#define S3C6400_CLKDIV0_JPEG_MASK (0xf << 24)
41#define S3C6400_CLKDIV0_JPEG_SHIFT (24)
42#define S3C6400_CLKDIV0_CAM_MASK (0xf << 20)
43#define S3C6400_CLKDIV0_CAM_SHIFT (20)
44#define S3C6400_CLKDIV0_SECURITY_MASK (0x3 << 18)
45#define S3C6400_CLKDIV0_SECURITY_SHIFT (18)
46#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) 38#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12)
47#define S3C6400_CLKDIV0_PCLK_SHIFT (12) 39#define S3C6400_CLKDIV0_PCLK_SHIFT (12)
48#define S3C6400_CLKDIV0_HCLK2_MASK (0x7 << 9) 40#define S3C6400_CLKDIV0_HCLK2_MASK (0x7 << 9)
@@ -51,42 +43,11 @@
51#define S3C6400_CLKDIV0_HCLK_SHIFT (8) 43#define S3C6400_CLKDIV0_HCLK_SHIFT (8)
52#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) 44#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4)
53#define S3C6400_CLKDIV0_MPLL_SHIFT (4) 45#define S3C6400_CLKDIV0_MPLL_SHIFT (4)
46
54#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0) 47#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0)
55#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0) 48#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0)
56#define S3C6400_CLKDIV0_ARM_SHIFT (0) 49#define S3C6400_CLKDIV0_ARM_SHIFT (0)
57 50
58/* CLKDIV1 */
59#define S3C6410_CLKDIV1_FIMC_MASK (0xf << 24)
60#define S3C6410_CLKDIV1_FIMC_SHIFT (24)
61#define S3C6400_CLKDIV1_UHOST_MASK (0xf << 20)
62#define S3C6400_CLKDIV1_UHOST_SHIFT (20)
63#define S3C6400_CLKDIV1_SCALER_MASK (0xf << 16)
64#define S3C6400_CLKDIV1_SCALER_SHIFT (16)
65#define S3C6400_CLKDIV1_LCD_MASK (0xf << 12)
66#define S3C6400_CLKDIV1_LCD_SHIFT (12)
67#define S3C6400_CLKDIV1_MMC2_MASK (0xf << 8)
68#define S3C6400_CLKDIV1_MMC2_SHIFT (8)
69#define S3C6400_CLKDIV1_MMC1_MASK (0xf << 4)
70#define S3C6400_CLKDIV1_MMC1_SHIFT (4)
71#define S3C6400_CLKDIV1_MMC0_MASK (0xf << 0)
72#define S3C6400_CLKDIV1_MMC0_SHIFT (0)
73
74/* CLKDIV2 */
75#define S3C6410_CLKDIV2_AUDIO2_MASK (0xf << 24)
76#define S3C6410_CLKDIV2_AUDIO2_SHIFT (24)
77#define S3C6400_CLKDIV2_IRDA_MASK (0xf << 20)
78#define S3C6400_CLKDIV2_IRDA_SHIFT (20)
79#define S3C6400_CLKDIV2_UART_MASK (0xf << 16)
80#define S3C6400_CLKDIV2_UART_SHIFT (16)
81#define S3C6400_CLKDIV2_AUDIO1_MASK (0xf << 12)
82#define S3C6400_CLKDIV2_AUDIO1_SHIFT (12)
83#define S3C6400_CLKDIV2_AUDIO0_MASK (0xf << 8)
84#define S3C6400_CLKDIV2_AUDIO0_SHIFT (8)
85#define S3C6400_CLKDIV2_SPI1_MASK (0xf << 4)
86#define S3C6400_CLKDIV2_SPI1_SHIFT (4)
87#define S3C6400_CLKDIV2_SPI0_MASK (0xf << 0)
88#define S3C6400_CLKDIV2_SPI0_SHIFT (0)
89
90/* HCLK GATE Registers */ 51/* HCLK GATE Registers */
91#define S3C_CLKCON_HCLK_3DSE (1<<31) 52#define S3C_CLKCON_HCLK_3DSE (1<<31)
92#define S3C_CLKCON_HCLK_UHOST (1<<29) 53#define S3C_CLKCON_HCLK_UHOST (1<<29)
@@ -192,34 +153,4 @@
192#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) 153#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2)
193#define S3C6400_CLKSRC_MFC (1 << 4) 154#define S3C6400_CLKSRC_MFC (1 << 4)
194 155
195#define S3C6410_CLKSRC_TV27_MASK (0x1 << 31)
196#define S3C6410_CLKSRC_TV27_SHIFT (31)
197#define S3C6410_CLKSRC_DAC27_MASK (0x1 << 30)
198#define S3C6410_CLKSRC_DAC27_SHIFT (30)
199#define S3C6400_CLKSRC_SCALER_MASK (0x3 << 28)
200#define S3C6400_CLKSRC_SCALER_SHIFT (28)
201#define S3C6400_CLKSRC_LCD_MASK (0x3 << 26)
202#define S3C6400_CLKSRC_LCD_SHIFT (26)
203#define S3C6400_CLKSRC_IRDA_MASK (0x3 << 24)
204#define S3C6400_CLKSRC_IRDA_SHIFT (24)
205#define S3C6400_CLKSRC_MMC2_MASK (0x3 << 22)
206#define S3C6400_CLKSRC_MMC2_SHIFT (22)
207#define S3C6400_CLKSRC_MMC1_MASK (0x3 << 20)
208#define S3C6400_CLKSRC_MMC1_SHIFT (20)
209#define S3C6400_CLKSRC_MMC0_MASK (0x3 << 18)
210#define S3C6400_CLKSRC_MMC0_SHIFT (18)
211#define S3C6400_CLKSRC_SPI1_MASK (0x3 << 16)
212#define S3C6400_CLKSRC_SPI1_SHIFT (16)
213#define S3C6400_CLKSRC_SPI0_MASK (0x3 << 14)
214#define S3C6400_CLKSRC_SPI0_SHIFT (14)
215#define S3C6400_CLKSRC_UART_MASK (0x1 << 13)
216#define S3C6400_CLKSRC_UART_SHIFT (13)
217#define S3C6400_CLKSRC_AUDIO1_MASK (0x7 << 10)
218#define S3C6400_CLKSRC_AUDIO1_SHIFT (10)
219#define S3C6400_CLKSRC_AUDIO0_MASK (0x7 << 7)
220#define S3C6400_CLKSRC_AUDIO0_SHIFT (7)
221#define S3C6400_CLKSRC_UHOST_MASK (0x3 << 5)
222#define S3C6400_CLKSRC_UHOST_SHIFT (5)
223
224
225#endif /* _PLAT_REGS_CLOCK_H */ 156#endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
index f56611526c63..f56611526c63 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
index 82342f6fd27d..82342f6fd27d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
index 81f7f6e6832e..81f7f6e6832e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
index bcce68a0bb75..bcce68a0bb75 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
index 49f7759dedfa..49f7759dedfa 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
new file mode 100644
index 000000000000..756731b36297
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
@@ -0,0 +1,59 @@
1/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h
2 *
3 * Copyright 2009 Andy Green <andy@warmcat.com>
4 *
5 * S3C64XX SROM definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __PLAT_REGS_SROM_H
13#define __PLAT_REGS_SROM_H __FILE__
14
15#define S3C64XX_SROMREG(x) (S3C_VA_MEM + (x))
16
17#define S3C64XX_SROM_BW S3C64XX_SROMREG(0)
18#define S3C64XX_SROM_BC0 S3C64XX_SROMREG(4)
19#define S3C64XX_SROM_BC1 S3C64XX_SROMREG(8)
20#define S3C64XX_SROM_BC2 S3C64XX_SROMREG(0xc)
21#define S3C64XX_SROM_BC3 S3C64XX_SROMREG(0x10)
22#define S3C64XX_SROM_BC4 S3C64XX_SROMREG(0x14)
23#define S3C64XX_SROM_BC5 S3C64XX_SROMREG(0x18)
24
25/*
26 * one register BW holds 5 x 4-bit packed settings for NCS0 - NCS4
27 */
28
29#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT 0
30#define S3C64XX_SROM_BW__WAITENABLE__SHIFT 2
31#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT 3
32#define S3C64XX_SROM_BW__CS_MASK 0xf
33
34#define S3C64XX_SROM_BW__NCS0__SHIFT 0
35#define S3C64XX_SROM_BW__NCS1__SHIFT 4
36#define S3C64XX_SROM_BW__NCS2__SHIFT 8
37#define S3C64XX_SROM_BW__NCS3__SHIFT 0xc
38#define S3C64XX_SROM_BW__NCS4__SHIFT 0x10
39
40/*
41 * applies to same to BCS0 - BCS4
42 */
43
44#define S3C64XX_SROM_BCX__PMC__SHIFT 0
45#define S3C64XX_SROM_BCX__PMC__MASK 3
46#define S3C64XX_SROM_BCX__TACP__SHIFT 4
47#define S3C64XX_SROM_BCX__TACP__MASK 0xf
48#define S3C64XX_SROM_BCX__TCAH__SHIFT 8
49#define S3C64XX_SROM_BCX__TCAH__MASK 0xf
50#define S3C64XX_SROM_BCX__TCOH__SHIFT 12
51#define S3C64XX_SROM_BCX__TCOH__MASK 0xf
52#define S3C64XX_SROM_BCX__TACC__SHIFT 16
53#define S3C64XX_SROM_BCX__TACC__MASK 0x1f
54#define S3C64XX_SROM_BCX__TCOS__SHIFT 24
55#define S3C64XX_SROM_BCX__TCOS__MASK 0xf
56#define S3C64XX_SROM_BCX__TACS__SHIFT 28
57#define S3C64XX_SROM_BCX__TACS__MASK 0xf
58
59#endif /* _PLAT_REGS_SROM_H */
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
index 69b78d9f83b8..69b78d9f83b8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
index 270d96ac9705..270d96ac9705 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
index 11f2e1e119b0..f86958d05352 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h 1/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -15,9 +15,10 @@
15/* Common init code for S3C6400 related SoCs */ 15/* Common init code for S3C6400 related SoCs */
16 16
17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); 17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
18extern void s3c6400_register_clocks(unsigned armclk_divlimit);
19extern void s3c6400_setup_clocks(void); 18extern void s3c6400_setup_clocks(void);
20 19
20extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
21
21#ifdef CONFIG_CPU_S3C6400 22#ifdef CONFIG_CPU_S3C6400
22 23
23extern int s3c6400_init(void); 24extern int s3c6400_init(void);
@@ -33,4 +34,3 @@ extern void s3c6400_init_clocks(int xtal);
33#define s3c6400_map_io NULL 34#define s3c6400_map_io NULL
34#define s3c6400_init NULL 35#define s3c6400_init NULL
35#endif 36#endif
36
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
index 50dcdd6f6800..24f1141ffcb7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h 1/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..9d0c43b4b687
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S3C64XX_PLAT_SPI_CLKS_H
12#define __S3C64XX_PLAT_SPI_CLKS_H __FILE__
13
14#define S3C64XX_SPI_SRCCLK_PCLK 0
15#define S3C64XX_SPI_SRCCLK_SPIBUS 1
16#define S3C64XX_SPI_SRCCLK_48M 2
17
18#endif /* __S3C64XX_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a7147..2e58cb7a7147 100644
--- a/arch/arm/mach-s3c6400/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
index d9c0dc7014ec..ebe18a9469b8 100644
--- a/arch/arm/mach-s3c6400/include/mach/tick.h
+++ b/arch/arm/mach-s3c64xx/include/mach/tick.h
@@ -20,7 +20,7 @@
20 */ 20 */
21static inline u32 s3c24xx_ostimer_pending(void) 21static inline u32 s3c24xx_ostimer_pending(void)
22{ 22{
23 u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); 23 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
24 return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0)); 24 return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
25} 25}
26 26
diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h
new file mode 100644
index 000000000000..fb2e8cd40829
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s3c64xx/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C6400 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
index c6a82a20bf2a..c6a82a20bf2a 100644
--- a/arch/arm/mach-s3c6400/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..7411ef3711a6
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
1/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END (0xE0000000)
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index ebdf183a0911..5682d6a7f4af 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -22,7 +22,7 @@
22#include <asm/hardware/vic.h> 22#include <asm/hardware/vic.h>
23 23
24#include <plat/regs-irqtype.h> 24#include <plat/regs-irqtype.h>
25#include <plat/regs-gpio.h> 25#include <mach/regs-gpio.h>
26#include <plat/gpio-cfg.h> 26#include <plat/gpio-cfg.h>
27 27
28#include <mach/map.h> 28#include <mach/map.h>
diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index ca523b5d4c17..da1bec64b9da 100644
--- a/arch/arm/plat-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -23,7 +23,7 @@
23 23
24#include <plat/regs-serial.h> 24#include <plat/regs-serial.h>
25#include <plat/regs-timer.h> 25#include <plat/regs-timer.h>
26#include <plat/regs-gpio.h> 26#include <mach/regs-gpio.h>
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/pm.h> 28#include <plat/pm.h>
29 29
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
new file mode 100644
index 000000000000..67a145d440f3
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/irq.c
@@ -0,0 +1,69 @@
1/* arch/arm/plat-s3c64xx/irq.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - Interrupt handling
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/serial_core.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20
21#include <asm/hardware/vic.h>
22
23#include <mach/map.h>
24#include <plat/irq-vic-timer.h>
25#include <plat/irq-uart.h>
26#include <plat/cpu.h>
27
28static struct s3c_uart_irq uart_irqs[] = {
29 [0] = {
30 .regs = S3C_VA_UART0,
31 .base_irq = IRQ_S3CUART_BASE0,
32 .parent_irq = IRQ_UART0,
33 },
34 [1] = {
35 .regs = S3C_VA_UART1,
36 .base_irq = IRQ_S3CUART_BASE1,
37 .parent_irq = IRQ_UART1,
38 },
39 [2] = {
40 .regs = S3C_VA_UART2,
41 .base_irq = IRQ_S3CUART_BASE2,
42 .parent_irq = IRQ_UART2,
43 },
44 [3] = {
45 .regs = S3C_VA_UART3,
46 .base_irq = IRQ_S3CUART_BASE3,
47 .parent_irq = IRQ_UART3,
48 },
49};
50
51
52void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
53{
54 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
55
56 /* initialise the pair of VICs */
57 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0);
58 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0);
59
60 /* add the timer sub-irqs */
61
62 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
63 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
64 s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
65 s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
66 s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
67
68 s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
69}
diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 661cca63de25..4a0bb243d14a 100644
--- a/arch/arm/mach-s3c6410/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/mach-anw6410.c 1/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -45,12 +45,12 @@
45#include <plat/iic.h> 45#include <plat/iic.h>
46#include <plat/fb.h> 46#include <plat/fb.h>
47 47
48#include <plat/s3c6410.h> 48#include <mach/s3c6410.h>
49#include <plat/clock.h> 49#include <plat/clock.h>
50#include <plat/devs.h> 50#include <plat/devs.h>
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <plat/regs-gpio.h> 52#include <mach/regs-gpio.h>
53#include <plat/regs-modem.h> 53#include <mach/regs-modem.h>
54 54
55/* DM9000 */ 55/* DM9000 */
56#define ANW6410_PA_DM9000 (0x18000000) 56#define ANW6410_PA_DM9000 (0x18000000)
diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 7619456f2ae8..187441a78dd5 100644
--- a/arch/arm/mach-s3c6410/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,7 +38,7 @@
38#include <plat/fb.h> 38#include <plat/fb.h>
39#include <plat/nand.h> 39#include <plat/nand.h>
40 40
41#include <plat/s3c6410.h> 41#include <mach/s3c6410.h>
42#include <plat/clock.h> 42#include <plat/clock.h>
43#include <plat/devs.h> 43#include <plat/devs.h>
44#include <plat/cpu.h> 44#include <plat/cpu.h>
@@ -233,7 +233,7 @@ static struct platform_device *hmt_devices[] __initdata = {
233 &s3c_device_i2c0, 233 &s3c_device_i2c0,
234 &s3c_device_nand, 234 &s3c_device_nand,
235 &s3c_device_fb, 235 &s3c_device_fb,
236 &s3c_device_usb, 236 &s3c_device_ohci,
237 &s3c_device_timer[1], 237 &s3c_device_timer[1],
238 &hmt_backlight_device, 238 &hmt_backlight_device,
239 &hmt_leds_device, 239 &hmt_leds_device,
diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 55e9bbfaf68b..bf65747ea68e 100644
--- a/arch/arm/mach-s3c6410/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-s3c6410/mach-ncp.c 2 * linux/arch/arm/mach-s3c64xx/mach-ncp.c
3 * 3 *
4 * Copyright (C) 2008-2009 Samsung Electronics 4 * Copyright (C) 2008-2009 Samsung Electronics
5 * 5 *
@@ -40,7 +40,7 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41#include <plat/fb.h> 41#include <plat/fb.h>
42 42
43#include <plat/s3c6410.h> 43#include <mach/s3c6410.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
46#include <plat/cpu.h> 46#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index ab19285389a7..f7b18983950c 100644
--- a/arch/arm/mach-s3c6400/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c 1/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -31,7 +31,7 @@
31 31
32#include <plat/regs-serial.h> 32#include <plat/regs-serial.h>
33 33
34#include <plat/s3c6400.h> 34#include <mach/s3c6400.h>
35#include <plat/clock.h> 35#include <plat/clock.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/cpu.h> 37#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8969fe73b83f..2d5afd221d77 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c 1/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -21,6 +21,7 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/leds.h>
24#include <linux/fb.h> 25#include <linux/fb.h>
25#include <linux/gpio.h> 26#include <linux/gpio.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
@@ -32,6 +33,11 @@
32#include <linux/mfd/wm8350/pmic.h> 33#include <linux/mfd/wm8350/pmic.h>
33#endif 34#endif
34 35
36#ifdef CONFIG_SMDK6410_WM1192_EV1
37#include <linux/mfd/wm831x/core.h>
38#include <linux/mfd/wm831x/pdata.h>
39#endif
40
35#include <video/platform_lcd.h> 41#include <video/platform_lcd.h>
36 42
37#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
@@ -46,14 +52,15 @@
46#include <asm/mach-types.h> 52#include <asm/mach-types.h>
47 53
48#include <plat/regs-serial.h> 54#include <plat/regs-serial.h>
49#include <plat/regs-modem.h> 55#include <mach/regs-modem.h>
50#include <plat/regs-gpio.h> 56#include <mach/regs-gpio.h>
51#include <plat/regs-sys.h> 57#include <mach/regs-sys.h>
58#include <mach/regs-srom.h>
52#include <plat/iic.h> 59#include <plat/iic.h>
53#include <plat/fb.h> 60#include <plat/fb.h>
54#include <plat/gpio-cfg.h> 61#include <plat/gpio-cfg.h>
55 62
56#include <plat/s3c6410.h> 63#include <mach/s3c6410.h>
57#include <plat/clock.h> 64#include <plat/clock.h>
58#include <plat/devs.h> 65#include <plat/devs.h>
59#include <plat/cpu.h> 66#include <plat/cpu.h>
@@ -154,10 +161,20 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
154 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 161 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
155}; 162};
156 163
164/*
165 * Configuring Ethernet on SMDK6410
166 *
167 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
168 * The constant address below corresponds to nCS1
169 *
170 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
171 * 2) CFG6 needs to be switched to "LAN9115" side
172 */
173
157static struct resource smdk6410_smsc911x_resources[] = { 174static struct resource smdk6410_smsc911x_resources[] = {
158 [0] = { 175 [0] = {
159 .start = 0x18000000, 176 .start = S3C64XX_PA_XM0CSN1,
160 .end = 0x18000000 + SZ_64K - 1, 177 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
161 .flags = IORESOURCE_MEM, 178 .flags = IORESOURCE_MEM,
162 }, 179 },
163 [1] = { 180 [1] = {
@@ -235,8 +252,9 @@ static struct platform_device *smdk6410_devices[] __initdata = {
235 &s3c_device_i2c0, 252 &s3c_device_i2c0,
236 &s3c_device_i2c1, 253 &s3c_device_i2c1,
237 &s3c_device_fb, 254 &s3c_device_fb,
238 &s3c_device_usb, 255 &s3c_device_ohci,
239 &s3c_device_usb_hsotg, 256 &s3c_device_usb_hsotg,
257 &s3c64xx_device_iisv4,
240 258
241#ifdef CONFIG_REGULATOR 259#ifdef CONFIG_REGULATOR
242 &smdk6410_b_pwr_5v, 260 &smdk6410_b_pwr_5v,
@@ -246,77 +264,124 @@ static struct platform_device *smdk6410_devices[] __initdata = {
246 &smdk6410_smsc911x, 264 &smdk6410_smsc911x,
247}; 265};
248 266
249#ifdef CONFIG_SMDK6410_WM1190_EV1 267#ifdef CONFIG_REGULATOR
250/* S3C64xx internal logic & PLL */ 268/* ARM core */
251static struct regulator_init_data wm8350_dcdc1_data = { 269static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
270 {
271 .supply = "vddarm",
272 }
273};
274
275/* VDDARM, BUCK1 on J5 */
276static struct regulator_init_data smdk6410_vddarm = {
252 .constraints = { 277 .constraints = {
253 .name = "PVDD_INT/PVDD_PLL", 278 .name = "PVDD_ARM",
254 .min_uV = 1200000, 279 .min_uV = 1000000,
280 .max_uV = 1300000,
281 .always_on = 1,
282 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
283 },
284 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
285 .consumer_supplies = smdk6410_vddarm_consumers,
286};
287
288/* VDD_INT, BUCK2 on J5 */
289static struct regulator_init_data smdk6410_vddint = {
290 .constraints = {
291 .name = "PVDD_INT",
292 .min_uV = 1000000,
255 .max_uV = 1200000, 293 .max_uV = 1200000,
256 .always_on = 1, 294 .always_on = 1,
257 .apply_uV = 1, 295 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
258 }, 296 },
259}; 297};
260 298
261/* Memory */ 299/* VDD_HI, LDO3 on J5 */
262static struct regulator_init_data wm8350_dcdc3_data = { 300static struct regulator_init_data smdk6410_vddhi = {
263 .constraints = { 301 .constraints = {
264 .name = "PVDD_MEM", 302 .name = "PVDD_HI",
265 .min_uV = 1800000,
266 .max_uV = 1800000,
267 .always_on = 1, 303 .always_on = 1,
268 .state_mem = {
269 .uV = 1800000,
270 .mode = REGULATOR_MODE_NORMAL,
271 .enabled = 1,
272 },
273 .initial_state = PM_SUSPEND_MEM,
274 }, 304 },
275}; 305};
276 306
277/* USB, EXT, PCM, ADC/DAC, USB, MMC */ 307/* VDD_PLL, LDO2 on J5 */
278static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { 308static struct regulator_init_data smdk6410_vddpll = {
279 { 309 .constraints = {
280 /* WM8580 */ 310 .name = "PVDD_PLL",
281 .supply = "DVDD", 311 .always_on = 1,
282 .dev_name = "0-001b",
283 }, 312 },
284}; 313};
285 314
286static struct regulator_init_data wm8350_dcdc4_data = { 315/* VDD_UH_MMC, LDO5 on J5 */
316static struct regulator_init_data smdk6410_vdduh_mmc = {
287 .constraints = { 317 .constraints = {
288 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", 318 .name = "PVDD_UH/PVDD_MMC",
289 .min_uV = 3000000,
290 .max_uV = 3000000,
291 .always_on = 1, 319 .always_on = 1,
292 }, 320 },
293 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
294 .consumer_supplies = wm8350_dcdc4_consumers,
295}; 321};
296 322
297/* ARM core */ 323/* VCCM3BT, LDO8 on J5 */
298static struct regulator_consumer_supply dcdc6_consumers[] = { 324static struct regulator_init_data smdk6410_vccmc3bt = {
299 { 325 .constraints = {
300 .supply = "vddarm", 326 .name = "PVCCM3BT",
301 } 327 .always_on = 1,
328 },
302}; 329};
303 330
304static struct regulator_init_data wm8350_dcdc6_data = { 331/* VCCM2MTV, LDO11 on J5 */
332static struct regulator_init_data smdk6410_vccm2mtv = {
305 .constraints = { 333 .constraints = {
306 .name = "PVDD_ARM", 334 .name = "PVCCM2MTV",
307 .min_uV = 1000000,
308 .max_uV = 1300000,
309 .always_on = 1, 335 .always_on = 1,
310 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
311 }, 336 },
312 .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
313 .consumer_supplies = dcdc6_consumers,
314}; 337};
315 338
316/* Alive */ 339/* VDD_LCD, LDO12 on J5 */
317static struct regulator_init_data wm8350_ldo1_data = { 340static struct regulator_init_data smdk6410_vddlcd = {
341 .constraints = {
342 .name = "PVDD_LCD",
343 .always_on = 1,
344 },
345};
346
347/* VDD_OTGI, LDO9 on J5 */
348static struct regulator_init_data smdk6410_vddotgi = {
349 .constraints = {
350 .name = "PVDD_OTGI",
351 .always_on = 1,
352 },
353};
354
355/* VDD_OTG, LDO14 on J5 */
356static struct regulator_init_data smdk6410_vddotg = {
357 .constraints = {
358 .name = "PVDD_OTG",
359 .always_on = 1,
360 },
361};
362
363/* VDD_ALIVE, LDO15 on J5 */
364static struct regulator_init_data smdk6410_vddalive = {
318 .constraints = { 365 .constraints = {
319 .name = "PVDD_ALIVE", 366 .name = "PVDD_ALIVE",
367 .always_on = 1,
368 },
369};
370
371/* VDD_AUDIO, VLDO_AUDIO on J5 */
372static struct regulator_init_data smdk6410_vddaudio = {
373 .constraints = {
374 .name = "PVDD_AUDIO",
375 .always_on = 1,
376 },
377};
378#endif
379
380#ifdef CONFIG_SMDK6410_WM1190_EV1
381/* S3C64xx internal logic & PLL */
382static struct regulator_init_data wm8350_dcdc1_data = {
383 .constraints = {
384 .name = "PVDD_INT/PVDD_PLL",
320 .min_uV = 1200000, 385 .min_uV = 1200000,
321 .max_uV = 1200000, 386 .max_uV = 1200000,
322 .always_on = 1, 387 .always_on = 1,
@@ -324,24 +389,40 @@ static struct regulator_init_data wm8350_ldo1_data = {
324 }, 389 },
325}; 390};
326 391
327/* OTG */ 392/* Memory */
328static struct regulator_init_data wm8350_ldo2_data = { 393static struct regulator_init_data wm8350_dcdc3_data = {
329 .constraints = { 394 .constraints = {
330 .name = "PVDD_OTG", 395 .name = "PVDD_MEM",
331 .min_uV = 3300000, 396 .min_uV = 1800000,
332 .max_uV = 3300000, 397 .max_uV = 1800000,
333 .always_on = 1, 398 .always_on = 1,
399 .state_mem = {
400 .uV = 1800000,
401 .mode = REGULATOR_MODE_NORMAL,
402 .enabled = 1,
403 },
404 .initial_state = PM_SUSPEND_MEM,
334 }, 405 },
335}; 406};
336 407
337/* LCD */ 408/* USB, EXT, PCM, ADC/DAC, USB, MMC */
338static struct regulator_init_data wm8350_ldo3_data = { 409static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
410 {
411 /* WM8580 */
412 .supply = "DVDD",
413 .dev_name = "0-001b",
414 },
415};
416
417static struct regulator_init_data wm8350_dcdc4_data = {
339 .constraints = { 418 .constraints = {
340 .name = "PVDD_LCD", 419 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
341 .min_uV = 3000000, 420 .min_uV = 3000000,
342 .max_uV = 3000000, 421 .max_uV = 3000000,
343 .always_on = 1, 422 .always_on = 1,
344 }, 423 },
424 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
425 .consumer_supplies = wm8350_dcdc4_consumers,
345}; 426};
346 427
347/* OTGi/1190-EV1 HPVDD & AVDD */ 428/* OTGi/1190-EV1 HPVDD & AVDD */
@@ -362,10 +443,10 @@ static struct {
362 { WM8350_DCDC_1, &wm8350_dcdc1_data }, 443 { WM8350_DCDC_1, &wm8350_dcdc1_data },
363 { WM8350_DCDC_3, &wm8350_dcdc3_data }, 444 { WM8350_DCDC_3, &wm8350_dcdc3_data },
364 { WM8350_DCDC_4, &wm8350_dcdc4_data }, 445 { WM8350_DCDC_4, &wm8350_dcdc4_data },
365 { WM8350_DCDC_6, &wm8350_dcdc6_data }, 446 { WM8350_DCDC_6, &smdk6410_vddarm },
366 { WM8350_LDO_1, &wm8350_ldo1_data }, 447 { WM8350_LDO_1, &smdk6410_vddalive },
367 { WM8350_LDO_2, &wm8350_ldo2_data }, 448 { WM8350_LDO_2, &smdk6410_vddotg },
368 { WM8350_LDO_3, &wm8350_ldo3_data }, 449 { WM8350_LDO_3, &smdk6410_vddlcd },
369 { WM8350_LDO_4, &wm8350_ldo4_data }, 450 { WM8350_LDO_4, &wm8350_ldo4_data },
370}; 451};
371 452
@@ -388,6 +469,107 @@ static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
388static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { 469static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
389 .init = smdk6410_wm8350_init, 470 .init = smdk6410_wm8350_init,
390 .irq_high = 1, 471 .irq_high = 1,
472 .irq_base = IRQ_BOARD_START,
473};
474#endif
475
476#ifdef CONFIG_SMDK6410_WM1192_EV1
477static struct gpio_led wm1192_pmic_leds[] = {
478 {
479 .name = "PMIC:red:power",
480 .gpio = GPIO_BOARD_START + 3,
481 .default_state = LEDS_GPIO_DEFSTATE_ON,
482 },
483};
484
485static struct gpio_led_platform_data wm1192_pmic_led = {
486 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
487 .leds = wm1192_pmic_leds,
488};
489
490static struct platform_device wm1192_pmic_led_dev = {
491 .name = "leds-gpio",
492 .id = -1,
493 .dev = {
494 .platform_data = &wm1192_pmic_led,
495 },
496};
497
498static int wm1192_pre_init(struct wm831x *wm831x)
499{
500 int ret;
501
502 /* Configure the IRQ line */
503 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
504
505 ret = platform_device_register(&wm1192_pmic_led_dev);
506 if (ret != 0)
507 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
508
509 return 0;
510}
511
512static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
513 .isink = 1,
514 .max_uA = 27554,
515};
516
517static struct regulator_init_data wm1192_dcdc3 = {
518 .constraints = {
519 .name = "PVDD_MEM/PVDD_GPS",
520 .always_on = 1,
521 },
522};
523
524static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
525 { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
526};
527
528static struct regulator_init_data wm1192_ldo1 = {
529 .constraints = {
530 .name = "PVDD_LCD/PVDD_EXT",
531 .always_on = 1,
532 },
533 .consumer_supplies = wm1192_ldo1_consumers,
534 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
535};
536
537static struct wm831x_status_pdata wm1192_led7_pdata = {
538 .name = "LED7:green:",
539};
540
541static struct wm831x_status_pdata wm1192_led8_pdata = {
542 .name = "LED8:green:",
543};
544
545static struct wm831x_pdata smdk6410_wm1192_pdata = {
546 .pre_init = wm1192_pre_init,
547 .irq_base = IRQ_BOARD_START,
548
549 .backlight = &wm1192_backlight_pdata,
550 .dcdc = {
551 &smdk6410_vddarm, /* DCDC1 */
552 &smdk6410_vddint, /* DCDC2 */
553 &wm1192_dcdc3,
554 },
555 .gpio_base = GPIO_BOARD_START,
556 .ldo = {
557 &wm1192_ldo1, /* LDO1 */
558 &smdk6410_vdduh_mmc, /* LDO2 */
559 NULL, /* LDO3 NC */
560 &smdk6410_vddotgi, /* LDO4 */
561 &smdk6410_vddotg, /* LDO5 */
562 &smdk6410_vddhi, /* LDO6 */
563 &smdk6410_vddaudio, /* LDO7 */
564 &smdk6410_vccm2mtv, /* LDO8 */
565 &smdk6410_vddpll, /* LDO9 */
566 &smdk6410_vccmc3bt, /* LDO10 */
567 &smdk6410_vddalive, /* LDO11 */
568 },
569 .status = {
570 &wm1192_led7_pdata,
571 &wm1192_led8_pdata,
572 },
391}; 573};
392#endif 574#endif
393 575
@@ -395,6 +577,13 @@ static struct i2c_board_info i2c_devs0[] __initdata = {
395 { I2C_BOARD_INFO("24c08", 0x50), }, 577 { I2C_BOARD_INFO("24c08", 0x50), },
396 { I2C_BOARD_INFO("wm8580", 0x1b), }, 578 { I2C_BOARD_INFO("wm8580", 0x1b), },
397 579
580#ifdef CONFIG_SMDK6410_WM1192_EV1
581 { I2C_BOARD_INFO("wm8312", 0x34),
582 .platform_data = &smdk6410_wm1192_pdata,
583 .irq = S3C_EINT(12),
584 },
585#endif
586
398#ifdef CONFIG_SMDK6410_WM1190_EV1 587#ifdef CONFIG_SMDK6410_WM1190_EV1
399 { I2C_BOARD_INFO("wm8350", 0x1a), 588 { I2C_BOARD_INFO("wm8350", 0x1a),
400 .platform_data = &smdk6410_wm8350_pdata, 589 .platform_data = &smdk6410_wm8350_pdata,
@@ -430,10 +619,32 @@ static void __init smdk6410_map_io(void)
430 619
431static void __init smdk6410_machine_init(void) 620static void __init smdk6410_machine_init(void)
432{ 621{
622 u32 cs1;
623
433 s3c_i2c0_set_platdata(NULL); 624 s3c_i2c0_set_platdata(NULL);
434 s3c_i2c1_set_platdata(NULL); 625 s3c_i2c1_set_platdata(NULL);
435 s3c_fb_set_platdata(&smdk6410_lcd_pdata); 626 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
436 627
628 /* configure nCS1 width to 16 bits */
629
630 cs1 = __raw_readl(S3C64XX_SROM_BW) &
631 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
632 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
633 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
634 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
635 S3C64XX_SROM_BW__NCS1__SHIFT;
636 __raw_writel(cs1, S3C64XX_SROM_BW);
637
638 /* set timing for nCS1 suitable for ethernet chip */
639
640 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
641 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
642 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
643 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
644 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
645 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
646 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
647
437 gpio_request(S3C64XX_GPN(5), "LCD power"); 648 gpio_request(S3C64XX_GPN(5), "LCD power");
438 gpio_request(S3C64XX_GPF(13), "LCD power"); 649 gpio_request(S3C64XX_GPF(13), "LCD power");
439 gpio_request(S3C64XX_GPF(15), "LCD power"); 650 gpio_request(S3C64XX_GPF(15), "LCD power");
diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 47632fc7eb66..b8ac4597fad7 100644
--- a/arch/arm/plat-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -20,14 +20,14 @@
20#include <mach/map.h> 20#include <mach/map.h>
21 21
22#include <plat/pm.h> 22#include <plat/pm.h>
23#include <plat/regs-sys.h> 23#include <mach/regs-sys.h>
24#include <plat/regs-gpio.h> 24#include <mach/regs-gpio.h>
25#include <plat/regs-clock.h> 25#include <mach/regs-clock.h>
26#include <plat/regs-syscon-power.h> 26#include <mach/regs-syscon-power.h>
27#include <plat/regs-gpio-memport.h> 27#include <mach/regs-gpio-memport.h>
28 28
29#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 29#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
30#include <plat/gpio-bank-n.h> 30#include <mach/gpio-bank-n.h>
31 31
32void s3c_pm_debug_smdkled(u32 set, u32 clear) 32void s3c_pm_debug_smdkled(u32 set, u32 clear)
33{ 33{
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index d876ee503671..707e34e3afd1 100644
--- a/arch/arm/mach-s3c6400/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/cpu.c 1/* linux/arch/arm/mach-s3c64xx/cpu.c
2 * 2 *
3 * Copyright 2009 Simtec Electronics 3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -30,14 +30,14 @@
30 30
31#include <plat/cpu-freq.h> 31#include <plat/cpu-freq.h>
32#include <plat/regs-serial.h> 32#include <plat/regs-serial.h>
33#include <plat/regs-clock.h> 33#include <mach/regs-clock.h>
34 34
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/clock.h> 37#include <plat/clock.h>
38#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <plat/iic-core.h> 39#include <plat/iic-core.h>
40#include <plat/s3c6400.h> 40#include <mach/s3c6400.h>
41 41
42void __init s3c6400_map_io(void) 42void __init s3c6400_map_io(void)
43{ 43{
@@ -55,10 +55,7 @@ void __init s3c6400_map_io(void)
55 55
56void __init s3c6400_init_clocks(int xtal) 56void __init s3c6400_init_clocks(int xtal)
57{ 57{
58 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 58 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
59 s3c24xx_register_baseclocks(xtal);
60 s3c64xx_register_clocks();
61 s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
62 s3c6400_setup_clocks(); 59 s3c6400_setup_clocks();
63} 60}
64 61
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 522c08691952..59635d19466a 100644
--- a/arch/arm/mach-s3c6410/cpu.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/cpu.c 1/* linux/arch/arm/mach-s3c64xx/s3c6410.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -31,30 +31,18 @@
31 31
32#include <plat/cpu-freq.h> 32#include <plat/cpu-freq.h>
33#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <plat/regs-clock.h> 34#include <mach/regs-clock.h>
35 35
36#include <plat/cpu.h> 36#include <plat/cpu.h>
37#include <plat/devs.h> 37#include <plat/devs.h>
38#include <plat/clock.h> 38#include <plat/clock.h>
39#include <plat/sdhci.h> 39#include <plat/sdhci.h>
40#include <plat/iic-core.h> 40#include <plat/iic-core.h>
41#include <plat/s3c6400.h> 41#include <mach/s3c6400.h>
42#include <plat/s3c6410.h> 42#include <mach/s3c6410.h>
43
44/* Initial IO mappings */
45
46static struct map_desc s3c6410_iodesc[] __initdata = {
47};
48
49/* s3c6410_map_io
50 *
51 * register the standard cpu IO areas
52*/
53 43
54void __init s3c6410_map_io(void) 44void __init s3c6410_map_io(void)
55{ 45{
56 iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc));
57
58 /* initialise device information early */ 46 /* initialise device information early */
59 s3c6410_default_sdhci0(); 47 s3c6410_default_sdhci0();
60 s3c6410_default_sdhci1(); 48 s3c6410_default_sdhci1();
@@ -70,9 +58,7 @@ void __init s3c6410_map_io(void)
70void __init s3c6410_init_clocks(int xtal) 58void __init s3c6410_init_clocks(int xtal)
71{ 59{
72 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 60 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
73 s3c24xx_register_baseclocks(xtal); 61 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
74 s3c64xx_register_clocks();
75 s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK);
76 s3c6400_setup_clocks(); 62 s3c6400_setup_clocks();
77} 63}
78 64
diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 8e28e448dd20..8e28e448dd20 100644
--- a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index 364480763728..d1b11e6e77e8 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -18,8 +18,8 @@
18struct platform_device; /* don't need the contents */ 18struct platform_device; /* don't need the contents */
19 19
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21#include <mach/gpio-bank-b.h>
21#include <plat/iic.h> 22#include <plat/iic.h>
22#include <plat/gpio-bank-b.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24 24
25void s3c_i2c0_cfg_gpio(struct platform_device *dev) 25void s3c_i2c0_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index bbe229bd90ca..2dce57d8c6f8 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -18,8 +18,8 @@
18struct platform_device; /* don't need the contents */ 18struct platform_device; /* don't need the contents */
19 19
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21#include <mach/gpio-bank-b.h>
21#include <plat/iic.h> 22#include <plat/iic.h>
22#include <plat/gpio-bank-b.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24 24
25void s3c_i2c1_cfg_gpio(struct platform_device *dev) 25void s3c_i2c1_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
index a58c0cc7ba5e..a58c0cc7ba5e 100644
--- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index 1039937403be..1a942037c4ef 100644
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -1,11 +1,11 @@
1/* linux/arch/arm/mach-s3c6410/setup-sdhci.c 1/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) 8 * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -26,7 +26,7 @@
26 26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28 28
29char *s3c6400_hsmmc_clksrcs[4] = { 29char *s3c64xx_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
@@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
61 writel(ctrl3, r + S3C_SDHCI_CONTROL3); 61 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
62} 62}
63 63
64void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
65 void __iomem *r,
66 struct mmc_ios *ios,
67 struct mmc_card *card)
68{
69 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
70
71 s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
72}
diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index 8e71fe90a373..b2ef44317368 100644
--- a/arch/arm/plat-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -1,4 +1,4 @@
1/* linux/0arch/arm/plat-s3c64xx/sleep.S 1/* linux/arch/arm/plat-s3c64xx/sleep.S
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -19,8 +19,8 @@
19#undef S3C64XX_VA_GPIO 19#undef S3C64XX_VA_GPIO
20#define S3C64XX_VA_GPIO (0x0) 20#define S3C64XX_VA_GPIO (0x0)
21 21
22#include <plat/regs-gpio.h> 22#include <mach/regs-gpio.h>
23#include <plat/gpio-bank-n.h> 23#include <mach/gpio-bank-n.h>
24 24
25#define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) 25#define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
26 26
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
new file mode 100644
index 000000000000..4c29ff8b07de
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Kconfig
@@ -0,0 +1,21 @@
1# arch/arm/mach-s5p6440/Kconfig
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8if ARCH_S5P6440
9
10config CPU_S5P6440
11 bool
12 help
13 Enable S5P6440 CPU support
14
15config MACH_SMDK6440
16 bool "SMDK6440"
17 select CPU_S5P6440
18 help
19 Machine support for the Samsung SMDK6440
20
21endif
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
new file mode 100644
index 000000000000..1ad894b1d3ab
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -0,0 +1,19 @@
1# arch/arm/mach-s5p6440/Makefile
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S5P6440 system
14
15obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o
16
17# machine support
18
19obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p6440/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x20008000
2params_phys-y := 0x20000100
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c
new file mode 100644
index 000000000000..b2672e16e7aa
--- /dev/null
+++ b/arch/arm/mach-s5p6440/clock.c
@@ -0,0 +1,698 @@
1/* linux/arch/arm/mach-s5p6440/clock.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/sysdev.h>
21#include <linux/io.h>
22
23#include <mach/hardware.h>
24#include <mach/map.h>
25
26#include <plat/cpu-freq.h>
27#include <mach/regs-clock.h>
28#include <plat/clock.h>
29#include <plat/cpu.h>
30#include <plat/clock-clksrc.h>
31#include <plat/s5p-clock.h>
32#include <plat/pll.h>
33#include <plat/s5p6440.h>
34
35/* APLL Mux output clock */
36static struct clksrc_clk clk_mout_apll = {
37 .clk = {
38 .name = "mout_apll",
39 .id = -1,
40 },
41 .sources = &clk_src_apll,
42 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
43};
44
45static int s5p6440_epll_enable(struct clk *clk, int enable)
46{
47 unsigned int ctrlbit = clk->ctrlbit;
48 unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
49
50 if (enable)
51 __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
52 else
53 __raw_writel(epll_con, S5P_EPLL_CON);
54
55 return 0;
56}
57
58static unsigned long s5p6440_epll_get_rate(struct clk *clk)
59{
60 return clk->rate;
61}
62
63static u32 epll_div[][5] = {
64 { 36000000, 0, 48, 1, 4 },
65 { 48000000, 0, 32, 1, 3 },
66 { 60000000, 0, 40, 1, 3 },
67 { 72000000, 0, 48, 1, 3 },
68 { 84000000, 0, 28, 1, 2 },
69 { 96000000, 0, 32, 1, 2 },
70 { 32768000, 45264, 43, 1, 4 },
71 { 45158000, 6903, 30, 1, 3 },
72 { 49152000, 50332, 32, 1, 3 },
73 { 67738000, 10398, 45, 1, 3 },
74 { 73728000, 9961, 49, 1, 3 }
75};
76
77static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
78{
79 unsigned int epll_con, epll_con_k;
80 unsigned int i;
81
82 if (clk->rate == rate) /* Return if nothing changed */
83 return 0;
84
85 epll_con = __raw_readl(S5P_EPLL_CON);
86 epll_con_k = __raw_readl(S5P_EPLL_CON_K);
87
88 epll_con_k &= ~(PLL90XX_KDIV_MASK);
89 epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
90
91 for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
92 if (epll_div[i][0] == rate) {
93 epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
94 epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
95 (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
96 (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
97 break;
98 }
99 }
100
101 if (i == ARRAY_SIZE(epll_div)) {
102 printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
103 return -EINVAL;
104 }
105
106 __raw_writel(epll_con, S5P_EPLL_CON);
107 __raw_writel(epll_con_k, S5P_EPLL_CON_K);
108
109 clk->rate = rate;
110
111 return 0;
112}
113
114static struct clk_ops s5p6440_epll_ops = {
115 .get_rate = s5p6440_epll_get_rate,
116 .set_rate = s5p6440_epll_set_rate,
117};
118
119static struct clksrc_clk clk_mout_epll = {
120 .clk = {
121 .name = "mout_epll",
122 .id = -1,
123 },
124 .sources = &clk_src_epll,
125 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 2, .size = 1 },
126};
127
128static struct clksrc_clk clk_mout_mpll = {
129 .clk = {
130 .name = "mout_mpll",
131 .id = -1,
132 },
133 .sources = &clk_src_mpll,
134 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 },
135};
136
137static struct clk clk_h_low = {
138 .name = "hclk_low",
139 .id = -1,
140 .rate = 0,
141 .parent = NULL,
142 .ctrlbit = 0,
143 .ops = &clk_ops_def_setrate,
144};
145
146static struct clk clk_p_low = {
147 .name = "pclk_low",
148 .id = -1,
149 .rate = 0,
150 .parent = NULL,
151 .ctrlbit = 0,
152 .ops = &clk_ops_def_setrate,
153};
154
155enum perf_level {
156 L0 = 532*1000,
157 L1 = 266*1000,
158 L2 = 133*1000,
159};
160
161static const u32 clock_table[][3] = {
162 /*{ARM_CLK, DIVarm, DIVhclk}*/
163 {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P_CLKDIV0_HCLK_SHIFT)},
164 {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P_CLKDIV0_HCLK_SHIFT)},
165 {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P_CLKDIV0_HCLK_SHIFT)},
166};
167
168static unsigned long s5p6440_armclk_get_rate(struct clk *clk)
169{
170 unsigned long rate = clk_get_rate(clk->parent);
171 u32 clkdiv;
172
173 /* divisor mask starts at bit0, so no need to shift */
174 clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
175
176 return rate / (clkdiv + 1);
177}
178
179static unsigned long s5p6440_armclk_round_rate(struct clk *clk,
180 unsigned long rate)
181{
182 u32 iter;
183
184 for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
185 if (rate > clock_table[iter][0])
186 return clock_table[iter-1][0];
187 }
188
189 return clock_table[ARRAY_SIZE(clock_table) - 1][0];
190}
191
192static int s5p6440_armclk_set_rate(struct clk *clk, unsigned long rate)
193{
194 u32 round_tmp;
195 u32 iter;
196 u32 clk_div0_tmp;
197 u32 cur_rate = clk->ops->get_rate(clk);
198 unsigned long flags;
199
200 round_tmp = clk->ops->round_rate(clk, rate);
201 if (round_tmp == cur_rate)
202 return 0;
203
204
205 for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
206 if (round_tmp == clock_table[iter][0])
207 break;
208 }
209
210 if (iter >= ARRAY_SIZE(clock_table))
211 iter = ARRAY_SIZE(clock_table) - 1;
212
213 local_irq_save(flags);
214 if (cur_rate > round_tmp) {
215 /* Frequency Down */
216 clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
217 clk_div0_tmp |= clock_table[iter][1];
218 __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
219
220 clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
221 ~(S5P_CLKDIV0_HCLK_MASK);
222 clk_div0_tmp |= clock_table[iter][2];
223 __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
224
225
226 } else {
227 /* Frequency Up */
228 clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
229 ~(S5P_CLKDIV0_HCLK_MASK);
230 clk_div0_tmp |= clock_table[iter][2];
231 __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
232
233 clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
234 clk_div0_tmp |= clock_table[iter][1];
235 __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
236 }
237 local_irq_restore(flags);
238
239 clk->rate = clock_table[iter][0];
240
241 return 0;
242}
243
244static struct clk_ops s5p6440_clkarm_ops = {
245 .get_rate = s5p6440_armclk_get_rate,
246 .set_rate = s5p6440_armclk_set_rate,
247 .round_rate = s5p6440_armclk_round_rate,
248};
249
250static unsigned long s5p6440_clk_doutmpll_get_rate(struct clk *clk)
251{
252 unsigned long rate = clk_get_rate(clk->parent);
253
254 if (__raw_readl(S5P_CLK_DIV0) & S5P_CLKDIV0_MPLL_MASK)
255 rate /= 2;
256
257 return rate;
258}
259
260static struct clk clk_dout_mpll = {
261 .name = "dout_mpll",
262 .id = -1,
263 .parent = &clk_mout_mpll.clk,
264 .ops = &(struct clk_ops) {
265 .get_rate = s5p6440_clk_doutmpll_get_rate,
266 },
267};
268
269int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
270{
271 unsigned long flags;
272 u32 val;
273
274 /* can't rely on clock lock, this register has other usages */
275 local_irq_save(flags);
276
277 val = __raw_readl(S5P_OTHERS);
278 if (enable)
279 val |= S5P_OTHERS_USB_SIG_MASK;
280 else
281 val &= ~S5P_OTHERS_USB_SIG_MASK;
282
283 __raw_writel(val, S5P_OTHERS);
284
285 local_irq_restore(flags);
286
287 return 0;
288}
289
290static int s5p6440_pclk_ctrl(struct clk *clk, int enable)
291{
292 return s5p_gatectrl(S5P_CLK_GATE_PCLK, clk, enable);
293}
294
295static int s5p6440_hclk0_ctrl(struct clk *clk, int enable)
296{
297 return s5p_gatectrl(S5P_CLK_GATE_HCLK0, clk, enable);
298}
299
300static int s5p6440_hclk1_ctrl(struct clk *clk, int enable)
301{
302 return s5p_gatectrl(S5P_CLK_GATE_HCLK1, clk, enable);
303}
304
305static int s5p6440_sclk_ctrl(struct clk *clk, int enable)
306{
307 return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable);
308}
309
310static int s5p6440_mem_ctrl(struct clk *clk, int enable)
311{
312 return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable);
313}
314
315/*
316 * The following clocks will be disabled during clock initialization. It is
317 * recommended to keep the following clocks disabled until the driver requests
318 * for enabling the clock.
319 */
320static struct clk init_clocks_disable[] = {
321 {
322 .name = "nand",
323 .id = -1,
324 .parent = &clk_h,
325 .enable = s5p6440_mem_ctrl,
326 .ctrlbit = S5P_CLKCON_MEM0_HCLK_NFCON,
327 }, {
328 .name = "adc",
329 .id = -1,
330 .parent = &clk_p_low,
331 .enable = s5p6440_pclk_ctrl,
332 .ctrlbit = S5P_CLKCON_PCLK_TSADC,
333 }, {
334 .name = "i2c",
335 .id = -1,
336 .parent = &clk_p_low,
337 .enable = s5p6440_pclk_ctrl,
338 .ctrlbit = S5P_CLKCON_PCLK_IIC0,
339 }, {
340 .name = "i2s_v40",
341 .id = 0,
342 .parent = &clk_p_low,
343 .enable = s5p6440_pclk_ctrl,
344 .ctrlbit = S5P_CLKCON_PCLK_IIS2,
345 }, {
346 .name = "spi",
347 .id = 0,
348 .parent = &clk_p_low,
349 .enable = s5p6440_pclk_ctrl,
350 .ctrlbit = S5P_CLKCON_PCLK_SPI0,
351 }, {
352 .name = "spi",
353 .id = 1,
354 .parent = &clk_p_low,
355 .enable = s5p6440_pclk_ctrl,
356 .ctrlbit = S5P_CLKCON_PCLK_SPI1,
357 }, {
358 .name = "sclk_spi_48",
359 .id = 0,
360 .parent = &clk_48m,
361 .enable = s5p6440_sclk_ctrl,
362 .ctrlbit = S5P_CLKCON_SCLK0_SPI0_48,
363 }, {
364 .name = "sclk_spi_48",
365 .id = 1,
366 .parent = &clk_48m,
367 .enable = s5p6440_sclk_ctrl,
368 .ctrlbit = S5P_CLKCON_SCLK0_SPI1_48,
369 }, {
370 .name = "mmc_48m",
371 .id = 0,
372 .parent = &clk_48m,
373 .enable = s5p6440_sclk_ctrl,
374 .ctrlbit = S5P_CLKCON_SCLK0_MMC0_48,
375 }, {
376 .name = "mmc_48m",
377 .id = 1,
378 .parent = &clk_48m,
379 .enable = s5p6440_sclk_ctrl,
380 .ctrlbit = S5P_CLKCON_SCLK0_MMC1_48,
381 }, {
382 .name = "mmc_48m",
383 .id = 2,
384 .parent = &clk_48m,
385 .enable = s5p6440_sclk_ctrl,
386 .ctrlbit = S5P_CLKCON_SCLK0_MMC2_48,
387 }, {
388 .name = "otg",
389 .id = -1,
390 .parent = &clk_h_low,
391 .enable = s5p6440_hclk0_ctrl,
392 .ctrlbit = S5P_CLKCON_HCLK0_USB
393 }, {
394 .name = "post",
395 .id = -1,
396 .parent = &clk_h_low,
397 .enable = s5p6440_hclk0_ctrl,
398 .ctrlbit = S5P_CLKCON_HCLK0_POST0
399 }, {
400 .name = "lcd",
401 .id = -1,
402 .parent = &clk_h_low,
403 .enable = s5p6440_hclk1_ctrl,
404 .ctrlbit = S5P_CLKCON_HCLK1_DISPCON,
405 }, {
406 .name = "hsmmc",
407 .id = 0,
408 .parent = &clk_h_low,
409 .enable = s5p6440_hclk0_ctrl,
410 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC0,
411 }, {
412 .name = "hsmmc",
413 .id = 1,
414 .parent = &clk_h_low,
415 .enable = s5p6440_hclk0_ctrl,
416 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC1,
417 }, {
418 .name = "hsmmc",
419 .id = 2,
420 .parent = &clk_h_low,
421 .enable = s5p6440_hclk0_ctrl,
422 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC2,
423 }, {
424 .name = "rtc",
425 .id = -1,
426 .parent = &clk_p_low,
427 .enable = s5p6440_pclk_ctrl,
428 .ctrlbit = S5P_CLKCON_PCLK_RTC,
429 }, {
430 .name = "watchdog",
431 .id = -1,
432 .parent = &clk_p_low,
433 .enable = s5p6440_pclk_ctrl,
434 .ctrlbit = S5P_CLKCON_PCLK_WDT,
435 }, {
436 .name = "timers",
437 .id = -1,
438 .parent = &clk_p_low,
439 .enable = s5p6440_pclk_ctrl,
440 .ctrlbit = S5P_CLKCON_PCLK_PWM,
441 }
442};
443
444/*
445 * The following clocks will be enabled during clock initialization.
446 */
447static struct clk init_clocks[] = {
448 {
449 .name = "gpio",
450 .id = -1,
451 .parent = &clk_p_low,
452 .enable = s5p6440_pclk_ctrl,
453 .ctrlbit = S5P_CLKCON_PCLK_GPIO,
454 }, {
455 .name = "uart",
456 .id = 0,
457 .parent = &clk_p_low,
458 .enable = s5p6440_pclk_ctrl,
459 .ctrlbit = S5P_CLKCON_PCLK_UART0,
460 }, {
461 .name = "uart",
462 .id = 1,
463 .parent = &clk_p_low,
464 .enable = s5p6440_pclk_ctrl,
465 .ctrlbit = S5P_CLKCON_PCLK_UART1,
466 }, {
467 .name = "uart",
468 .id = 2,
469 .parent = &clk_p_low,
470 .enable = s5p6440_pclk_ctrl,
471 .ctrlbit = S5P_CLKCON_PCLK_UART2,
472 }, {
473 .name = "uart",
474 .id = 3,
475 .parent = &clk_p_low,
476 .enable = s5p6440_pclk_ctrl,
477 .ctrlbit = S5P_CLKCON_PCLK_UART3,
478 }
479};
480
481static struct clk clk_iis_cd_v40 = {
482 .name = "iis_cdclk_v40",
483 .id = -1,
484};
485
486static struct clk clk_pcm_cd = {
487 .name = "pcm_cdclk",
488 .id = -1,
489};
490
491static struct clk *clkset_spi_mmc_list[] = {
492 &clk_mout_epll.clk,
493 &clk_dout_mpll,
494 &clk_fin_epll,
495};
496
497static struct clksrc_sources clkset_spi_mmc = {
498 .sources = clkset_spi_mmc_list,
499 .nr_sources = ARRAY_SIZE(clkset_spi_mmc_list),
500};
501
502static struct clk *clkset_uart_list[] = {
503 &clk_mout_epll.clk,
504 &clk_dout_mpll
505};
506
507static struct clksrc_sources clkset_uart = {
508 .sources = clkset_uart_list,
509 .nr_sources = ARRAY_SIZE(clkset_uart_list),
510};
511
512static struct clksrc_clk clksrcs[] = {
513 {
514 .clk = {
515 .name = "mmc_bus",
516 .id = 0,
517 .ctrlbit = S5P_CLKCON_SCLK0_MMC0,
518 .enable = s5p6440_sclk_ctrl,
519 },
520 .sources = &clkset_spi_mmc,
521 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 },
522 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 },
523 }, {
524 .clk = {
525 .name = "mmc_bus",
526 .id = 1,
527 .ctrlbit = S5P_CLKCON_SCLK0_MMC1,
528 .enable = s5p6440_sclk_ctrl,
529 },
530 .sources = &clkset_spi_mmc,
531 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 },
532 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 },
533 }, {
534 .clk = {
535 .name = "mmc_bus",
536 .id = 2,
537 .ctrlbit = S5P_CLKCON_SCLK0_MMC2,
538 .enable = s5p6440_sclk_ctrl,
539 },
540 .sources = &clkset_spi_mmc,
541 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 },
542 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 },
543 }, {
544 .clk = {
545 .name = "uclk1",
546 .id = -1,
547 .ctrlbit = S5P_CLKCON_SCLK0_UART,
548 .enable = s5p6440_sclk_ctrl,
549 },
550 .sources = &clkset_uart,
551 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 13, .size = 1 },
552 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
553 }, {
554 .clk = {
555 .name = "spi_epll",
556 .id = 0,
557 .ctrlbit = S5P_CLKCON_SCLK0_SPI0,
558 .enable = s5p6440_sclk_ctrl,
559 },
560 .sources = &clkset_spi_mmc,
561 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 },
562 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
563 }, {
564 .clk = {
565 .name = "spi_epll",
566 .id = 1,
567 .ctrlbit = S5P_CLKCON_SCLK0_SPI1,
568 .enable = s5p6440_sclk_ctrl,
569 },
570 .sources = &clkset_spi_mmc,
571 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 },
572 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
573 }
574};
575
576/* Clock initialisation code */
577static struct clksrc_clk *init_parents[] = {
578 &clk_mout_apll,
579 &clk_mout_epll,
580 &clk_mout_mpll,
581};
582
583void __init_or_cpufreq s5p6440_setup_clocks(void)
584{
585 struct clk *xtal_clk;
586 unsigned long xtal;
587 unsigned long fclk;
588 unsigned long hclk;
589 unsigned long hclk_low;
590 unsigned long pclk;
591 unsigned long pclk_low;
592 unsigned long epll;
593 unsigned long apll;
594 unsigned long mpll;
595 unsigned int ptr;
596 u32 clkdiv0;
597 u32 clkdiv3;
598
599 /* Set S5P6440 functions for clk_fout_epll */
600 clk_fout_epll.enable = s5p6440_epll_enable;
601 clk_fout_epll.ops = &s5p6440_epll_ops;
602
603 /* Set S5P6440 functions for arm clock */
604 clk_arm.parent = &clk_mout_apll.clk;
605 clk_arm.ops = &s5p6440_clkarm_ops;
606 clk_48m.enable = s5p6440_clk48m_ctrl;
607
608 clkdiv0 = __raw_readl(S5P_CLK_DIV0);
609 clkdiv3 = __raw_readl(S5P_CLK_DIV3);
610
611 xtal_clk = clk_get(NULL, "ext_xtal");
612 BUG_ON(IS_ERR(xtal_clk));
613
614 xtal = clk_get_rate(xtal_clk);
615 clk_put(xtal_clk);
616
617 epll = s5p_get_pll90xx(xtal, __raw_readl(S5P_EPLL_CON),
618 __raw_readl(S5P_EPLL_CON_K));
619 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
620 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502);
621
622 printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
623 " E=%ld.%ldMHz\n",
624 print_mhz(apll), print_mhz(mpll), print_mhz(epll));
625
626 fclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_ARM);
627 hclk = fclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK);
628 pclk = hclk / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK);
629
630 if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) {
631 /* Asynchronous mode */
632 hclk_low = mpll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
633 } else {
634 /* Synchronous mode */
635 hclk_low = apll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
636 }
637
638 pclk_low = hclk_low / GET_DIV(clkdiv3, S5P_CLKDIV3_PCLK_LOW);
639
640 printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
641 " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
642 print_mhz(hclk), print_mhz(hclk_low),
643 print_mhz(pclk), print_mhz(pclk_low));
644
645 clk_fout_mpll.rate = mpll;
646 clk_fout_epll.rate = epll;
647 clk_fout_apll.rate = apll;
648
649 clk_f.rate = fclk;
650 clk_h.rate = hclk;
651 clk_p.rate = pclk;
652 clk_h_low.rate = hclk_low;
653 clk_p_low.rate = pclk_low;
654
655 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
656 s3c_set_clksrc(init_parents[ptr], true);
657
658 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
659 s3c_set_clksrc(&clksrcs[ptr], true);
660}
661
662static struct clk *clks[] __initdata = {
663 &clk_ext,
664 &clk_mout_epll.clk,
665 &clk_mout_mpll.clk,
666 &clk_dout_mpll,
667 &clk_iis_cd_v40,
668 &clk_pcm_cd,
669 &clk_p_low,
670 &clk_h_low,
671};
672
673void __init s5p6440_register_clocks(void)
674{
675 struct clk *clkp;
676 int ret;
677 int ptr;
678
679 ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
680 if (ret > 0)
681 printk(KERN_ERR "Failed to register %u clocks\n", ret);
682
683 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
684 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
685
686 clkp = init_clocks_disable;
687 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
688
689 ret = s3c24xx_register_clock(clkp);
690 if (ret < 0) {
691 printk(KERN_ERR "Failed to register clock %s (%d)\n",
692 clkp->name, ret);
693 }
694 (clkp->enable)(clkp, 0);
695 }
696
697 s3c_pwmclk_init();
698}
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
new file mode 100644
index 000000000000..1794131aeacb
--- /dev/null
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -0,0 +1,114 @@
1/* linux/arch/arm/mach-s5p6440/cpu.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/proc-fns.h>
28
29#include <mach/hardware.h>
30#include <mach/map.h>
31#include <asm/irq.h>
32
33#include <plat/regs-serial.h>
34#include <mach/regs-clock.h>
35
36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/clock.h>
39#include <plat/s5p6440.h>
40
41static void s5p6440_idle(void)
42{
43 unsigned long val;
44
45 if (!need_resched()) {
46 val = __raw_readl(S5P_PWR_CFG);
47 val &= ~(0x3<<5);
48 val |= (0x1<<5);
49 __raw_writel(val, S5P_PWR_CFG);
50
51 cpu_do_idle();
52 }
53 local_irq_enable();
54}
55
56/* s5p6440_map_io
57 *
58 * register the standard cpu IO areas
59*/
60
61void __init s5p6440_map_io(void)
62{
63 /* initialize any device information early */
64}
65
66void __init s5p6440_init_clocks(int xtal)
67{
68 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
69
70 s3c24xx_register_baseclocks(xtal);
71 s5p_register_clocks(xtal);
72 s5p6440_register_clocks();
73 s5p6440_setup_clocks();
74}
75
76void __init s5p6440_init_irq(void)
77{
78 /* S5P6440 supports only 2 VIC */
79 u32 vic[2];
80
81 /*
82 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
83 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
84 */
85 vic[0] = 0xff800ae7;
86 vic[1] = 0xffbf23e5;
87
88 s5p_init_irq(vic, ARRAY_SIZE(vic));
89}
90
91static struct sysdev_class s5p6440_sysclass = {
92 .name = "s5p6440-core",
93};
94
95static struct sys_device s5p6440_sysdev = {
96 .cls = &s5p6440_sysclass,
97};
98
99static int __init s5p6440_core_init(void)
100{
101 return sysdev_class_register(&s5p6440_sysclass);
102}
103
104core_initcall(s5p6440_core_init);
105
106int __init s5p6440_init(void)
107{
108 printk(KERN_INFO "S5P6440: Initializing architecture\n");
109
110 /* set idle function */
111 pm_idle = s5p6440_idle;
112
113 return sysdev_register(&s5p6440_sysdev);
114}
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
new file mode 100644
index 000000000000..b0ea741177ad
--- /dev/null
+++ b/arch/arm/mach-s5p6440/gpio.c
@@ -0,0 +1,322 @@
1/* arch/arm/mach-s5p6440/gpio.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - GPIOlib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <mach/map.h>
17#include <mach/gpio.h>
18#include <mach/regs-gpio.h>
19#include <plat/gpio-core.h>
20#include <plat/gpio-cfg.h>
21#include <plat/gpio-cfg-helpers.h>
22
23/* GPIO bank summary:
24*
25* Bank GPIOs Style SlpCon ExtInt Group
26* A 6 4Bit Yes 1
27* B 7 4Bit Yes 1
28* C 8 4Bit Yes 2
29* F 2 2Bit Yes 4 [1]
30* G 7 4Bit Yes 5
31* H 10 4Bit[2] Yes 6
32* I 16 2Bit Yes None
33* J 12 2Bit Yes None
34* N 16 2Bit No IRQ_EINT
35* P 8 2Bit Yes 8
36* R 15 4Bit[2] Yes 8
37*
38* [1] BANKF pins 14,15 do not form part of the external interrupt sources
39* [2] BANK has two control registers, GPxCON0 and GPxCON1
40*/
41
42static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
43 unsigned int offset)
44{
45 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
46 void __iomem *base = ourchip->base;
47 void __iomem *regcon = base;
48 unsigned long con;
49
50 switch (offset) {
51 case 6:
52 offset += 1;
53 case 0:
54 case 1:
55 case 2:
56 case 3:
57 case 4:
58 case 5:
59 regcon -= 4;
60 break;
61 default:
62 offset -= 7;
63 break;
64 }
65
66 con = __raw_readl(regcon);
67 con &= ~(0xf << con_4bit_shift(offset));
68 __raw_writel(con, regcon);
69
70 return 0;
71}
72
73static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
74 unsigned int offset, int value)
75{
76 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
77 void __iomem *base = ourchip->base;
78 void __iomem *regcon = base;
79 unsigned long con;
80 unsigned long dat;
81 unsigned con_offset = offset;
82
83 switch (con_offset) {
84 case 6:
85 con_offset += 1;
86 case 0:
87 case 1:
88 case 2:
89 case 3:
90 case 4:
91 case 5:
92 regcon -= 4;
93 break;
94 default:
95 con_offset -= 7;
96 break;
97 }
98
99 con = __raw_readl(regcon);
100 con &= ~(0xf << con_4bit_shift(con_offset));
101 con |= 0x1 << con_4bit_shift(con_offset);
102
103 dat = __raw_readl(base + GPIODAT_OFF);
104 if (value)
105 dat |= 1 << offset;
106 else
107 dat &= ~(1 << offset);
108
109 __raw_writel(con, regcon);
110 __raw_writel(dat, base + GPIODAT_OFF);
111
112 return 0;
113}
114
115int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
116 unsigned int off, unsigned int cfg)
117{
118 void __iomem *reg = chip->base;
119 unsigned int shift;
120 u32 con;
121
122 switch (off) {
123 case 0:
124 case 1:
125 case 2:
126 case 3:
127 case 4:
128 case 5:
129 shift = (off & 7) * 4;
130 reg -= 4;
131 break;
132 case 6:
133 shift = ((off + 1) & 7) * 4;
134 reg -= 4;
135 default:
136 shift = ((off + 1) & 7) * 4;
137 break;
138 }
139
140 if (s3c_gpio_is_cfg_special(cfg)) {
141 cfg &= 0xf;
142 cfg <<= shift;
143 }
144
145 con = __raw_readl(reg);
146 con &= ~(0xf << shift);
147 con |= cfg;
148 __raw_writel(con, reg);
149
150 return 0;
151}
152
153static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
154 {
155 .cfg_eint = 0,
156 }, {
157 .cfg_eint = 7,
158 }, {
159 .cfg_eint = 3,
160 .set_config = s5p6440_gpio_setcfg_4bit_rbank,
161 }, {
162 .cfg_eint = 0,
163 .set_config = s3c_gpio_setcfg_s3c24xx,
164 }, {
165 .cfg_eint = 2,
166 .set_config = s3c_gpio_setcfg_s3c24xx,
167 }, {
168 .cfg_eint = 3,
169 .set_config = s3c_gpio_setcfg_s3c24xx,
170 },
171};
172
173static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
174 {
175 .base = S5P6440_GPA_BASE,
176 .config = &s5p6440_gpio_cfgs[1],
177 .chip = {
178 .base = S5P6440_GPA(0),
179 .ngpio = S5P6440_GPIO_A_NR,
180 .label = "GPA",
181 },
182 }, {
183 .base = S5P6440_GPB_BASE,
184 .config = &s5p6440_gpio_cfgs[1],
185 .chip = {
186 .base = S5P6440_GPB(0),
187 .ngpio = S5P6440_GPIO_B_NR,
188 .label = "GPB",
189 },
190 }, {
191 .base = S5P6440_GPC_BASE,
192 .config = &s5p6440_gpio_cfgs[1],
193 .chip = {
194 .base = S5P6440_GPC(0),
195 .ngpio = S5P6440_GPIO_C_NR,
196 .label = "GPC",
197 },
198 }, {
199 .base = S5P6440_GPG_BASE,
200 .config = &s5p6440_gpio_cfgs[1],
201 .chip = {
202 .base = S5P6440_GPG(0),
203 .ngpio = S5P6440_GPIO_G_NR,
204 .label = "GPG",
205 },
206 },
207};
208
209static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
210 {
211 .base = S5P6440_GPH_BASE + 0x4,
212 .config = &s5p6440_gpio_cfgs[1],
213 .chip = {
214 .base = S5P6440_GPH(0),
215 .ngpio = S5P6440_GPIO_H_NR,
216 .label = "GPH",
217 },
218 },
219};
220
221static struct s3c_gpio_chip gpio_rbank_4bit2[] = {
222 {
223 .base = S5P6440_GPR_BASE + 0x4,
224 .config = &s5p6440_gpio_cfgs[2],
225 .chip = {
226 .base = S5P6440_GPR(0),
227 .ngpio = S5P6440_GPIO_R_NR,
228 .label = "GPR",
229 },
230 },
231};
232
233static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
234 {
235 .base = S5P6440_GPF_BASE,
236 .config = &s5p6440_gpio_cfgs[5],
237 .chip = {
238 .base = S5P6440_GPF(0),
239 .ngpio = S5P6440_GPIO_F_NR,
240 .label = "GPF",
241 },
242 }, {
243 .base = S5P6440_GPI_BASE,
244 .config = &s5p6440_gpio_cfgs[3],
245 .chip = {
246 .base = S5P6440_GPI(0),
247 .ngpio = S5P6440_GPIO_I_NR,
248 .label = "GPI",
249 },
250 }, {
251 .base = S5P6440_GPJ_BASE,
252 .config = &s5p6440_gpio_cfgs[3],
253 .chip = {
254 .base = S5P6440_GPJ(0),
255 .ngpio = S5P6440_GPIO_J_NR,
256 .label = "GPJ",
257 },
258 }, {
259 .base = S5P6440_GPN_BASE,
260 .config = &s5p6440_gpio_cfgs[4],
261 .chip = {
262 .base = S5P6440_GPN(0),
263 .ngpio = S5P6440_GPIO_N_NR,
264 .label = "GPN",
265 },
266 }, {
267 .base = S5P6440_GPP_BASE,
268 .config = &s5p6440_gpio_cfgs[5],
269 .chip = {
270 .base = S5P6440_GPP(0),
271 .ngpio = S5P6440_GPIO_P_NR,
272 .label = "GPP",
273 },
274 },
275};
276
277void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
278{
279 for (; nr_chips > 0; nr_chips--, chipcfg++) {
280 if (!chipcfg->set_config)
281 chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit;
282 if (!chipcfg->set_pull)
283 chipcfg->set_pull = s3c_gpio_setpull_updown;
284 if (!chipcfg->get_pull)
285 chipcfg->get_pull = s3c_gpio_getpull_updown;
286 }
287}
288
289static void __init s5p6440_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
290 int nr_chips)
291{
292 for (; nr_chips > 0; nr_chips--, chip++) {
293 chip->chip.direction_input = s5p6440_gpiolib_rbank_4bit2_input;
294 chip->chip.direction_output =
295 s5p6440_gpiolib_rbank_4bit2_output;
296 s3c_gpiolib_add(chip);
297 }
298}
299
300static int __init s5p6440_gpiolib_init(void)
301{
302 struct s3c_gpio_chip *chips = s5p6440_gpio_2bit;
303 int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit);
304
305 s5p6440_gpiolib_set_cfg(s5p6440_gpio_cfgs,
306 ARRAY_SIZE(s5p6440_gpio_cfgs));
307
308 for (; nr_chips > 0; nr_chips--, chips++)
309 s3c_gpiolib_add(chips);
310
311 samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
312 ARRAY_SIZE(s5p6440_gpio_4bit));
313
314 samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
315 ARRAY_SIZE(s5p6440_gpio_4bit2));
316
317 s5p6440_gpio_add_rbank_4bit2(gpio_rbank_4bit2,
318 ARRAY_SIZE(gpio_rbank_4bit2));
319
320 return 0;
321}
322arch_initcall(s5p6440_gpiolib_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
new file mode 100644
index 000000000000..48cdb0da026c
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
@@ -0,0 +1,37 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/* pull in the relevant register and map files. */
12
13#include <mach/map.h>
14#include <plat/regs-serial.h>
15
16 /* note, for the boot process to work we have to keep the UART
17 * virtual address aligned to an 1MiB boundary for the L1
18 * mapping the head code makes. We keep the UART virtual address
19 * aligned and add in the offset when we load the value here.
20 */
21
22 .macro addruart, rx
23 mrc p15, 0, \rx, c1, c0
24 tst \rx, #1
25 ldreq \rx, = S3C_PA_UART
26 ldrne \rx, = S3C_VA_UART
27#if CONFIG_DEBUG_S3C_UART != 0
28 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
29#endif
30 .endm
31
32/* include the reset of the code which will do the work, we're only
33 * compiling for a single cpu processor type so the default of s3c2440
34 * will be fine with us.
35 */
36
37#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p6440/include/mach/entry-macro.S
new file mode 100644
index 000000000000..e65f1b967262
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/entry-macro.S
@@ -0,0 +1,16 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5P6440
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <mach/map.h>
14#include <plat/irqs.h>
15
16#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h
new file mode 100644
index 000000000000..21783834f2a2
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/gpio.h
@@ -0,0 +1,80 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/gpio.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22#define S5P6440_GPIO_A_NR (6)
23#define S5P6440_GPIO_B_NR (7)
24#define S5P6440_GPIO_C_NR (8)
25#define S5P6440_GPIO_F_NR (2)
26#define S5P6440_GPIO_G_NR (7)
27#define S5P6440_GPIO_H_NR (10)
28#define S5P6440_GPIO_I_NR (16)
29#define S5P6440_GPIO_J_NR (12)
30#define S5P6440_GPIO_N_NR (16)
31#define S5P6440_GPIO_P_NR (8)
32#define S5P6440_GPIO_R_NR (15)
33
34/* GPIO bank numbers */
35
36/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
37 * space for debugging purposes so that any accidental
38 * change from one gpio bank to another can be caught.
39*/
40#define S5P6440_GPIO_NEXT(__gpio) \
41 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
42
43enum s5p_gpio_number {
44 S5P6440_GPIO_A_START = 0,
45 S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A),
46 S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B),
47 S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C),
48 S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F),
49 S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G),
50 S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H),
51 S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I),
52 S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J),
53 S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N),
54 S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P),
55};
56
57/* S5P6440 GPIO number definitions. */
58#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
59#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
60#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
61#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
62#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
63#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
64#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
65#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
66#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
67#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
68#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
69
70/* the end of the S5P6440 specific gpios */
71#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
72#define S3C_GPIO_END S5P6440_GPIO_END
73
74/* define the number of gpios we need to the one after the GPR() range */
75#define ARCH_NR_GPIOS (S5P6440_GPR(S5P6440_GPIO_R_NR) + \
76 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
77
78#include <asm-generic/gpio.h>
79
80#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p6440/include/mach/hardware.h
new file mode 100644
index 000000000000..be8b26e875db
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/hardware.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h
new file mode 100644
index 000000000000..fa2d69cb1ad7
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/io.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s5p6440/include/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S3C64XX based
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h
new file mode 100644
index 000000000000..a4b9b40d18f2
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/irqs.h
@@ -0,0 +1,111 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/irqs.h
2 *
3 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_S5P_IRQS_H
14#define __ASM_ARCH_S5P_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0 */
19
20#define IRQ_EINT0_3 S5P_IRQ_VIC0(0)
21#define IRQ_EINT4_11 S5P_IRQ_VIC0(1)
22#define IRQ_RTC_TIC S5P_IRQ_VIC0(2)
23#define IRQ_IIC1 S5P_IRQ_VIC0(5)
24#define IRQ_I2SV40 S5P_IRQ_VIC0(6)
25#define IRQ_GPS S5P_IRQ_VIC0(7)
26#define IRQ_POST0 S5P_IRQ_VIC0(9)
27#define IRQ_2D S5P_IRQ_VIC0(11)
28#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23)
29#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24)
30#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(25)
31#define IRQ_WDT S5P_IRQ_VIC0(26)
32#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(27)
33#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(28)
34#define IRQ_DISPCON0 S5P_IRQ_VIC0(29)
35#define IRQ_DISPCON1 S5P_IRQ_VIC0(30)
36#define IRQ_DISPCON2 S5P_IRQ_VIC0(31)
37
38/* VIC1 */
39
40#define IRQ_EINT12_15 S5P_IRQ_VIC1(0)
41#define IRQ_PCM0 S5P_IRQ_VIC1(2)
42#define IRQ_UART0 S5P_IRQ_VIC1(5)
43#define IRQ_UART1 S5P_IRQ_VIC1(6)
44#define IRQ_UART2 S5P_IRQ_VIC1(7)
45#define IRQ_UART3 S5P_IRQ_VIC1(8)
46#define IRQ_DMA0 S5P_IRQ_VIC1(9)
47#define IRQ_NFC S5P_IRQ_VIC1(13)
48#define IRQ_SPI0 S5P_IRQ_VIC1(16)
49#define IRQ_SPI1 S5P_IRQ_VIC1(17)
50#define IRQ_IIC S5P_IRQ_VIC1(18)
51#define IRQ_DISPCON3 S5P_IRQ_VIC1(19)
52#define IRQ_FIMGVG S5P_IRQ_VIC1(20)
53#define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21)
54#define IRQ_PMUIRQ S5P_IRQ_VIC1(23)
55#define IRQ_HSMMC0 S5P_IRQ_VIC1(24)
56#define IRQ_HSMMC1 S5P_IRQ_VIC1(25)
57#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */
58#define IRQ_OTG S5P_IRQ_VIC1(26)
59#define IRQ_DSI S5P_IRQ_VIC1(27)
60#define IRQ_RTC_ALARM S5P_IRQ_VIC1(28)
61#define IRQ_TSI S5P_IRQ_VIC1(29)
62#define IRQ_PENDN S5P_IRQ_VIC1(30)
63#define IRQ_TC IRQ_PENDN
64#define IRQ_ADC S5P_IRQ_VIC1(31)
65
66/*
67 * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
68 * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
69 * after the pair of VICs.
70 */
71
72#define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6)
73
74#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE)
75#define IRQ_EINT(x) S5P_EINT(x)
76
77/*
78 * Next the external interrupt groups. These are similar to the IRQ_EINT(x)
79 * that they are sourced from the GPIO pins but with a different scheme for
80 * priority and source indication.
81 *
82 * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO
83 * interrupts, but for historical reasons they are kept apart from these
84 * next interrupts.
85 *
86 * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the
87 * machine specific support files.
88 */
89
90/* Actually, #6 and #7 are missing in the EINT_GROUP1 */
91#define IRQ_EINT_GROUP1_NR (15)
92#define IRQ_EINT_GROUP2_NR (8)
93#define IRQ_EINT_GROUP5_NR (7)
94#define IRQ_EINT_GROUP6_NR (10)
95/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */
96#define IRQ_EINT_GROUP8_NR (11)
97
98#define IRQ_EINT_GROUP_BASE S5P_EINT(16)
99#define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0)
100#define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR)
101#define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR)
102#define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR)
103#define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR)
104
105#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x))
106
107/* Set the default NR_IRQS */
108
109#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
110
111#endif /* __ASM_ARCH_S5P_IRQS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
new file mode 100644
index 000000000000..8924e5a4d6a6
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -0,0 +1,68 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/map.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5P6440_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5P6440_PA_CHIPID
21
22#define S5P6440_PA_SYSCON (0xE0100000)
23#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0)
24#define S5P_PA_SYSCON S5P6440_PA_SYSCON
25
26#define S5P6440_PA_GPIO (0xE0308000)
27#define S5P_PA_GPIO S5P6440_PA_GPIO
28
29#define S5P6440_PA_VIC0 (0xE4000000)
30#define S5P_PA_VIC0 S5P6440_PA_VIC0
31
32#define S5P6440_PA_VIC1 (0xE4100000)
33#define S5P_PA_VIC1 S5P6440_PA_VIC1
34
35#define S5P6440_PA_TIMER (0xEA000000)
36#define S5P_PA_TIMER S5P6440_PA_TIMER
37
38#define S5P6440_PA_RTC (0xEA100000)
39#define S5P_PA_RTC S5P6440_PA_RTC
40
41#define S5P6440_PA_WDT (0xEA200000)
42#define S5P_PA_WDT S5P6440_PA_WDT
43
44#define S5P6440_PA_UART (0xEC000000)
45
46#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0)
47#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400)
48#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800)
49#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00)
50
51#define S5P_SZ_UART SZ_256
52
53#define S5P6440_PA_IIC0 (0xEC104000)
54
55#define S5P6440_PA_HSOTG (0xED100000)
56
57#define S5P6440_PA_HSMMC0 (0xED800000)
58#define S5P6440_PA_HSMMC1 (0xED900000)
59#define S5P6440_PA_HSMMC2 (0xEDA00000)
60
61#define S5P6440_PA_SDRAM (0x20000000)
62#define S5P_PA_SDRAM S5P6440_PA_SDRAM
63
64/* compatibiltiy defines. */
65#define S3C_PA_UART S5P6440_PA_UART
66#define S3C_PA_IIC S5P6440_PA_IIC0
67
68#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p6440/include/mach/memory.h
new file mode 100644
index 000000000000..d62910c71b56
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/memory.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/memory.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE SZ_8M
18
19#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..c4bb7c555477
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
@@ -0,0 +1,62 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Copyright 2009 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com/
9 *
10 * S5P6440 - pwm clock and timer support
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17/**
18 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
19 * @cfg: The timer TCFG1 register bits shifted down to 0.
20 *
21 * Return true if the given configuration from TCFG1 is a TCLK instead
22 * any of the TDIV clocks.
23 */
24static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
25{
26 return tcfg == S3C2410_TCFG1_MUX_TCLK;
27}
28
29/**
30 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
31 * @tcfg1: The tcfg1 setting, shifted down.
32 *
33 * Get the divisor value for the given tcfg1 setting. We assume the
34 * caller has already checked to see if this is not a TCLK source.
35 */
36static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
37{
38 return 1 << (1 + tcfg1);
39}
40
41/**
42 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
43 *
44 * Return true if we have a /1 in the tdiv setting.
45 */
46static inline unsigned int pwm_tdiv_has_div1(void)
47{
48 return 0;
49}
50
51/**
52 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
53 * @div: The divisor to calculate the bit information for.
54 *
55 * Turn a divisor into the necessary bit field for TCFG1.
56 */
57static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
58{
59 return ilog2(div) - 1;
60}
61
62#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
new file mode 100644
index 000000000000..c783ecc9f193
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
@@ -0,0 +1,130 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x08)
23#define S5P_APLL_CON S5P_CLKREG(0x0C)
24#define S5P_MPLL_CON S5P_CLKREG(0x10)
25#define S5P_EPLL_CON S5P_CLKREG(0x14)
26#define S5P_EPLL_CON_K S5P_CLKREG(0x18)
27#define S5P_CLK_SRC0 S5P_CLKREG(0x1C)
28#define S5P_CLK_DIV0 S5P_CLKREG(0x20)
29#define S5P_CLK_DIV1 S5P_CLKREG(0x24)
30#define S5P_CLK_DIV2 S5P_CLKREG(0x28)
31#define S5P_CLK_OUT S5P_CLKREG(0x2C)
32#define S5P_CLK_GATE_HCLK0 S5P_CLKREG(0x30)
33#define S5P_CLK_GATE_PCLK S5P_CLKREG(0x34)
34#define S5P_CLK_GATE_SCLK0 S5P_CLKREG(0x38)
35#define S5P_CLK_GATE_MEM0 S5P_CLKREG(0x3C)
36#define S5P_CLK_DIV3 S5P_CLKREG(0x40)
37#define S5P_CLK_GATE_HCLK1 S5P_CLKREG(0x44)
38#define S5P_CLK_GATE_SCLK1 S5P_CLKREG(0x48)
39#define S5P_AHB_CON0 S5P_CLKREG(0x100)
40#define S5P_CLK_SRC1 S5P_CLKREG(0x10C)
41#define S5P_SWRESET S5P_CLKREG(0x114)
42#define S5P_SYS_ID S5P_CLKREG(0x118)
43#define S5P_SYS_OTHERS S5P_CLKREG(0x11C)
44#define S5P_MEM_CFG_STAT S5P_CLKREG(0x12C)
45#define S5P_PWR_CFG S5P_CLKREG(0x804)
46#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0x808)
47#define S5P_NORMAL_CFG S5P_CLKREG(0x810)
48#define S5P_STOP_CFG S5P_CLKREG(0x814)
49#define S5P_SLEEP_CFG S5P_CLKREG(0x818)
50#define S5P_OSC_FREQ S5P_CLKREG(0x820)
51#define S5P_OSC_STABLE S5P_CLKREG(0x824)
52#define S5P_PWR_STABLE S5P_CLKREG(0x828)
53#define S5P_MTC_STABLE S5P_CLKREG(0x830)
54#define S5P_OTHERS S5P_CLKREG(0x900)
55#define S5P_RST_STAT S5P_CLKREG(0x904)
56#define S5P_WAKEUP_STAT S5P_CLKREG(0x908)
57#define S5P_SLPEN S5P_CLKREG(0x930)
58#define S5P_INFORM0 S5P_CLKREG(0xA00)
59#define S5P_INFORM1 S5P_CLKREG(0xA04)
60#define S5P_INFORM2 S5P_CLKREG(0xA08)
61#define S5P_INFORM3 S5P_CLKREG(0xA0C)
62
63/* CLKDIV0 */
64#define S5P_CLKDIV0_PCLK_MASK (0xf << 12)
65#define S5P_CLKDIV0_PCLK_SHIFT (12)
66#define S5P_CLKDIV0_HCLK_MASK (0xf << 8)
67#define S5P_CLKDIV0_HCLK_SHIFT (8)
68#define S5P_CLKDIV0_MPLL_MASK (0x1 << 4)
69#define S5P_CLKDIV0_ARM_MASK (0xf << 0)
70#define S5P_CLKDIV0_ARM_SHIFT (0)
71
72/* CLKDIV3 */
73#define S5P_CLKDIV3_PCLK_LOW_MASK (0xf << 12)
74#define S5P_CLKDIV3_PCLK_LOW_SHIFT (12)
75#define S5P_CLKDIV3_HCLK_LOW_MASK (0xf << 8)
76#define S5P_CLKDIV3_HCLK_LOW_SHIFT (8)
77
78/* HCLK0 GATE Registers */
79#define S5P_CLKCON_HCLK0_USB (1<<20)
80#define S5P_CLKCON_HCLK0_HSMMC2 (1<<19)
81#define S5P_CLKCON_HCLK0_HSMMC1 (1<<18)
82#define S5P_CLKCON_HCLK0_HSMMC0 (1<<17)
83#define S5P_CLKCON_HCLK0_POST0 (1<<5)
84
85/* HCLK1 GATE Registers */
86#define S5P_CLKCON_HCLK1_DISPCON (1<<1)
87
88/* PCLK GATE Registers */
89#define S5P_CLKCON_PCLK_IIS2 (1<<26)
90#define S5P_CLKCON_PCLK_SPI1 (1<<22)
91#define S5P_CLKCON_PCLK_SPI0 (1<<21)
92#define S5P_CLKCON_PCLK_GPIO (1<<18)
93#define S5P_CLKCON_PCLK_IIC0 (1<<17)
94#define S5P_CLKCON_PCLK_TSADC (1<<12)
95#define S5P_CLKCON_PCLK_PWM (1<<7)
96#define S5P_CLKCON_PCLK_RTC (1<<6)
97#define S5P_CLKCON_PCLK_WDT (1<<5)
98#define S5P_CLKCON_PCLK_UART3 (1<<4)
99#define S5P_CLKCON_PCLK_UART2 (1<<3)
100#define S5P_CLKCON_PCLK_UART1 (1<<2)
101#define S5P_CLKCON_PCLK_UART0 (1<<1)
102
103/* SCLK0 GATE Registers */
104#define S5P_CLKCON_SCLK0_MMC2_48 (1<<29)
105#define S5P_CLKCON_SCLK0_MMC1_48 (1<<28)
106#define S5P_CLKCON_SCLK0_MMC0_48 (1<<27)
107#define S5P_CLKCON_SCLK0_MMC2 (1<<26)
108#define S5P_CLKCON_SCLK0_MMC1 (1<<25)
109#define S5P_CLKCON_SCLK0_MMC0 (1<<24)
110#define S5P_CLKCON_SCLK0_SPI1_48 (1<<23)
111#define S5P_CLKCON_SCLK0_SPI0_48 (1<<22)
112#define S5P_CLKCON_SCLK0_SPI1 (1<<21)
113#define S5P_CLKCON_SCLK0_SPI0 (1<<20)
114#define S5P_CLKCON_SCLK0_UART (1<<5)
115
116/* SCLK1 GATE Registers */
117
118/* MEM0 GATE Registers */
119#define S5P_CLKCON_MEM0_HCLK_NFCON (1<<2)
120
121/*OTHERS Resgister */
122#define S5P_OTHERS_USB_SIG_MASK (1<<16)
123#define S5P_OTHERS_HCLK_LOW_SEL_MPLL (1<<6)
124
125/* Compatibility defines */
126#define ARM_CLK_DIV S5P_CLK_DIV0
127#define ARM_DIV_RATIO_SHIFT 0
128#define ARM_DIV_MASK (0xf << ARM_DIV_RATIO_SHIFT)
129
130#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
new file mode 100644
index 000000000000..82ff753913da
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
@@ -0,0 +1,54 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - GPIO register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_REGS_GPIO_H
14#define __ASM_ARCH_REGS_GPIO_H __FILE__
15
16#include <mach/map.h>
17
18/* Base addresses for each of the banks */
19#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
20#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
21#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
22#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0)
23#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0)
24#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0)
25#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100)
26#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120)
27#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
28#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
29#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
30#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
31#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
32#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
33#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920)
34#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
35
36/* for LCD */
37#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
38#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
39
40/* These set of macros are not really useful for the
41 * GPF/GPI/GPJ/GPN/GPP,
42 * useful for others set of GPIO's (4 bit)
43 */
44#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
45#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
46#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
47
48/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
49 * */
50#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
51#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
52#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
53
54#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p6440/include/mach/regs-irq.h
new file mode 100644
index 000000000000..a961f4beeb0c
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p6440/include/mach/system.h
new file mode 100644
index 000000000000..d2dd817da66a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/system.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/system.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 /* nothing here yet */
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h
new file mode 100644
index 000000000000..2f25c7f07970
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/tick.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/tick.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Timer tick support definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TICK_H
14#define __ASM_ARCH_TICK_H __FILE__
15
16static inline u32 s3c24xx_ostimer_pending(void)
17{
18 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
19 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
20}
21
22#define TICK_MAX (0xffffffff)
23
24#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p6440/include/mach/timex.h
new file mode 100644
index 000000000000..fb2e8cd40829
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s3c64xx/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C6400 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h
new file mode 100644
index 000000000000..7c1f600d65c0
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/uncompress.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17#include <plat/uncompress.h>
18
19static void arch_detect_cpu(void)
20{
21 /* we do not need to do any cpu detection here at the moment. */
22}
23
24#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
new file mode 100644
index 000000000000..16df257b1dce
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6440/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C6400 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xE0000000)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6440/init.c b/arch/arm/mach-s5p6440/init.c
new file mode 100644
index 000000000000..a1f3727e4021
--- /dev/null
+++ b/arch/arm/mach-s5p6440/init.c
@@ -0,0 +1,52 @@
1/* linux/arch/arm/mach-s5p6440/init.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - Init support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/serial_core.h>
17
18#include <plat/cpu.h>
19#include <plat/devs.h>
20#include <plat/s5p6440.h>
21#include <plat/regs-serial.h>
22
23static struct s3c24xx_uart_clksrc s5p6440_serial_clocks[] = {
24 [0] = {
25 .name = "pclk_low",
26 .divisor = 1,
27 .min_baud = 0,
28 .max_baud = 0,
29 },
30 [1] = {
31 .name = "uclk1",
32 .divisor = 1,
33 .min_baud = 0,
34 .max_baud = 0,
35 },
36};
37
38/* uart registration process */
39void __init s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
40{
41 struct s3c2410_uartcfg *tcfg = cfg;
42 u32 ucnt;
43
44 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
45 if (!tcfg->clocks) {
46 tcfg->clocks = s5p6440_serial_clocks;
47 tcfg->clocks_size = ARRAY_SIZE(s5p6440_serial_clocks);
48 }
49 }
50
51 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
52}
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
new file mode 100644
index 000000000000..3ae88f2c7c77
--- /dev/null
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -0,0 +1,111 @@
1/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/delay.h>
17#include <linux/init.h>
18#include <linux/serial_core.h>
19#include <linux/platform_device.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/clk.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26
27#include <mach/hardware.h>
28#include <mach/map.h>
29
30#include <asm/irq.h>
31#include <asm/mach-types.h>
32
33#include <plat/regs-serial.h>
34
35#include <plat/s5p6440.h>
36#include <plat/clock.h>
37#include <mach/regs-clock.h>
38#include <plat/devs.h>
39#include <plat/cpu.h>
40#include <plat/pll.h>
41
42#define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
43 S3C2410_UCON_RXILEVEL | \
44 S3C2410_UCON_TXIRQMODE | \
45 S3C2410_UCON_RXIRQMODE | \
46 S3C2410_UCON_RXFIFO_TOI | \
47 S3C2443_UCON_RXERR_IRQEN)
48
49#define S5P6440_ULCON_DEFAULT S3C2410_LCON_CS8
50
51#define S5P6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
52 S3C2440_UFCON_TXTRIG16 | \
53 S3C2410_UFCON_RXTRIG8)
54
55static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
56 [0] = {
57 .hwport = 0,
58 .flags = 0,
59 .ucon = S5P6440_UCON_DEFAULT,
60 .ulcon = S5P6440_ULCON_DEFAULT,
61 .ufcon = S5P6440_UFCON_DEFAULT,
62 },
63 [1] = {
64 .hwport = 1,
65 .flags = 0,
66 .ucon = S5P6440_UCON_DEFAULT,
67 .ulcon = S5P6440_ULCON_DEFAULT,
68 .ufcon = S5P6440_UFCON_DEFAULT,
69 },
70 [2] = {
71 .hwport = 2,
72 .flags = 0,
73 .ucon = S5P6440_UCON_DEFAULT,
74 .ulcon = S5P6440_ULCON_DEFAULT,
75 .ufcon = S5P6440_UFCON_DEFAULT,
76 },
77 [3] = {
78 .hwport = 3,
79 .flags = 0,
80 .ucon = S5P6440_UCON_DEFAULT,
81 .ulcon = S5P6440_ULCON_DEFAULT,
82 .ufcon = S5P6440_UFCON_DEFAULT,
83 },
84};
85
86static struct platform_device *smdk6440_devices[] __initdata = {
87};
88
89static void __init smdk6440_map_io(void)
90{
91 s5p_init_io(NULL, 0, S5P_SYS_ID);
92 s3c24xx_init_clocks(12000000);
93 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
94}
95
96static void __init smdk6440_machine_init(void)
97{
98 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
99}
100
101MACHINE_START(SMDK6440, "SMDK6440")
102 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
103 .phys_io = S3C_PA_UART & 0xfff00000,
104 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
105 .boot_params = S5P_PA_SDRAM + 0x100,
106
107 .init_irq = s5p6440_init_irq,
108 .map_io = smdk6440_map_io,
109 .init_machine = smdk6440_machine_init,
110 .timer = &s3c24xx_timer,
111MACHINE_END
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
new file mode 100644
index 000000000000..4f3f6de6a013
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -0,0 +1,24 @@
1# arch/arm/mach-s5p6442/Kconfig
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8# Configuration options for the S5P6442
9
10if ARCH_S5P6442
11
12config CPU_S5P6442
13 bool
14 select PLAT_S5P
15 help
16 Enable S5P6442 CPU support
17
18config MACH_SMDK6442
19 bool "SMDK6442"
20 select CPU_S5P6442
21 help
22 Machine support for Samsung SMDK6442
23
24endif
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
new file mode 100644
index 000000000000..dde39a6ce6bc
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -0,0 +1,19 @@
1# arch/arm/mach-s5p6442/Makefile
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S5P6442 system
14
15obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o
16
17# machine support
18
19obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x20008000
2params_phys-y := 0x20000100
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
new file mode 100644
index 000000000000..3aadbf42c112
--- /dev/null
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -0,0 +1,396 @@
1/* linux/arch/arm/mach-s5p6442/clock.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20
21#include <mach/map.h>
22
23#include <plat/cpu-freq.h>
24#include <mach/regs-clock.h>
25#include <plat/clock.h>
26#include <plat/cpu.h>
27#include <plat/pll.h>
28#include <plat/s5p-clock.h>
29#include <plat/clock-clksrc.h>
30#include <plat/s5p6442.h>
31
32static struct clksrc_clk clk_mout_apll = {
33 .clk = {
34 .name = "mout_apll",
35 .id = -1,
36 },
37 .sources = &clk_src_apll,
38 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
39};
40
41static struct clksrc_clk clk_mout_mpll = {
42 .clk = {
43 .name = "mout_mpll",
44 .id = -1,
45 },
46 .sources = &clk_src_mpll,
47 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
48};
49
50static struct clksrc_clk clk_mout_epll = {
51 .clk = {
52 .name = "mout_epll",
53 .id = -1,
54 },
55 .sources = &clk_src_epll,
56 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
57};
58
59/* Possible clock sources for ARM Mux */
60static struct clk *clk_src_arm_list[] = {
61 [1] = &clk_mout_apll.clk,
62 [2] = &clk_mout_mpll.clk,
63};
64
65static struct clksrc_sources clk_src_arm = {
66 .sources = clk_src_arm_list,
67 .nr_sources = ARRAY_SIZE(clk_src_arm_list),
68};
69
70static struct clksrc_clk clk_mout_arm = {
71 .clk = {
72 .name = "mout_arm",
73 .id = -1,
74 },
75 .sources = &clk_src_arm,
76 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
77};
78
79static struct clk clk_dout_a2m = {
80 .name = "dout_a2m",
81 .id = -1,
82 .parent = &clk_mout_apll.clk,
83};
84
85/* Possible clock sources for D0 Mux */
86static struct clk *clk_src_d0_list[] = {
87 [1] = &clk_mout_mpll.clk,
88 [2] = &clk_dout_a2m,
89};
90
91static struct clksrc_sources clk_src_d0 = {
92 .sources = clk_src_d0_list,
93 .nr_sources = ARRAY_SIZE(clk_src_d0_list),
94};
95
96static struct clksrc_clk clk_mout_d0 = {
97 .clk = {
98 .name = "mout_d0",
99 .id = -1,
100 },
101 .sources = &clk_src_d0,
102 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 },
103};
104
105static struct clk clk_dout_apll = {
106 .name = "dout_apll",
107 .id = -1,
108 .parent = &clk_mout_arm.clk,
109};
110
111/* Possible clock sources for D0SYNC Mux */
112static struct clk *clk_src_d0sync_list[] = {
113 [1] = &clk_mout_d0.clk,
114 [2] = &clk_dout_apll,
115};
116
117static struct clksrc_sources clk_src_d0sync = {
118 .sources = clk_src_d0sync_list,
119 .nr_sources = ARRAY_SIZE(clk_src_d0sync_list),
120};
121
122static struct clksrc_clk clk_mout_d0sync = {
123 .clk = {
124 .name = "mout_d0sync",
125 .id = -1,
126 },
127 .sources = &clk_src_d0sync,
128 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
129};
130
131/* Possible clock sources for D1 Mux */
132static struct clk *clk_src_d1_list[] = {
133 [1] = &clk_mout_mpll.clk,
134 [2] = &clk_dout_a2m,
135};
136
137static struct clksrc_sources clk_src_d1 = {
138 .sources = clk_src_d1_list,
139 .nr_sources = ARRAY_SIZE(clk_src_d1_list),
140};
141
142static struct clksrc_clk clk_mout_d1 = {
143 .clk = {
144 .name = "mout_d1",
145 .id = -1,
146 },
147 .sources = &clk_src_d1,
148 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 },
149};
150
151/* Possible clock sources for D1SYNC Mux */
152static struct clk *clk_src_d1sync_list[] = {
153 [1] = &clk_mout_d1.clk,
154 [2] = &clk_dout_apll,
155};
156
157static struct clksrc_sources clk_src_d1sync = {
158 .sources = clk_src_d1sync_list,
159 .nr_sources = ARRAY_SIZE(clk_src_d1sync_list),
160};
161
162static struct clksrc_clk clk_mout_d1sync = {
163 .clk = {
164 .name = "mout_d1sync",
165 .id = -1,
166 },
167 .sources = &clk_src_d1sync,
168 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
169};
170
171static struct clk clk_hclkd0 = {
172 .name = "hclkd0",
173 .id = -1,
174 .parent = &clk_mout_d0sync.clk,
175};
176
177static struct clk clk_hclkd1 = {
178 .name = "hclkd1",
179 .id = -1,
180 .parent = &clk_mout_d1sync.clk,
181};
182
183static struct clk clk_pclkd0 = {
184 .name = "pclkd0",
185 .id = -1,
186 .parent = &clk_hclkd0,
187};
188
189static struct clk clk_pclkd1 = {
190 .name = "pclkd1",
191 .id = -1,
192 .parent = &clk_hclkd1,
193};
194
195int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
196{
197 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
198}
199
200static struct clksrc_clk clksrcs[] = {
201 {
202 .clk = {
203 .name = "dout_a2m",
204 .id = -1,
205 .parent = &clk_mout_apll.clk,
206 },
207 .sources = &clk_src_apll,
208 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
209 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
210 }, {
211 .clk = {
212 .name = "dout_apll",
213 .id = -1,
214 .parent = &clk_mout_arm.clk,
215 },
216 .sources = &clk_src_arm,
217 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
218 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
219 }, {
220 .clk = {
221 .name = "hclkd1",
222 .id = -1,
223 .parent = &clk_mout_d1sync.clk,
224 },
225 .sources = &clk_src_d1sync,
226 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
227 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
228 }, {
229 .clk = {
230 .name = "hclkd0",
231 .id = -1,
232 .parent = &clk_mout_d0sync.clk,
233 },
234 .sources = &clk_src_d0sync,
235 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
236 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
237 }, {
238 .clk = {
239 .name = "pclkd0",
240 .id = -1,
241 .parent = &clk_hclkd0,
242 },
243 .sources = &clk_src_d0sync,
244 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
245 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
246 }, {
247 .clk = {
248 .name = "pclkd1",
249 .id = -1,
250 .parent = &clk_hclkd1,
251 },
252 .sources = &clk_src_d1sync,
253 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
254 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
255 }
256};
257
258/* Clock initialisation code */
259static struct clksrc_clk *init_parents[] = {
260 &clk_mout_apll,
261 &clk_mout_mpll,
262 &clk_mout_epll,
263 &clk_mout_arm,
264 &clk_mout_d0,
265 &clk_mout_d0sync,
266 &clk_mout_d1,
267 &clk_mout_d1sync,
268};
269
270void __init_or_cpufreq s5p6442_setup_clocks(void)
271{
272 struct clk *pclkd0_clk;
273 struct clk *pclkd1_clk;
274
275 unsigned long xtal;
276 unsigned long arm;
277 unsigned long hclkd0 = 0;
278 unsigned long hclkd1 = 0;
279 unsigned long pclkd0 = 0;
280 unsigned long pclkd1 = 0;
281
282 unsigned long apll;
283 unsigned long mpll;
284 unsigned long epll;
285 unsigned int ptr;
286
287 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
288
289 xtal = clk_get_rate(&clk_xtal);
290
291 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
292
293 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
296
297 printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld",
298 apll, mpll, epll);
299
300 clk_fout_apll.rate = apll;
301 clk_fout_mpll.rate = mpll;
302 clk_fout_epll.rate = epll;
303
304 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
305 s3c_set_clksrc(init_parents[ptr], true);
306
307 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
308 s3c_set_clksrc(&clksrcs[ptr], true);
309
310 arm = clk_get_rate(&clk_dout_apll);
311 hclkd0 = clk_get_rate(&clk_hclkd0);
312 hclkd1 = clk_get_rate(&clk_hclkd1);
313
314 pclkd0_clk = clk_get(NULL, "pclkd0");
315 BUG_ON(IS_ERR(pclkd0_clk));
316
317 pclkd0 = clk_get_rate(pclkd0_clk);
318 clk_put(pclkd0_clk);
319
320 pclkd1_clk = clk_get(NULL, "pclkd1");
321 BUG_ON(IS_ERR(pclkd1_clk));
322
323 pclkd1 = clk_get_rate(pclkd1_clk);
324 clk_put(pclkd1_clk);
325
326 printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n",
327 hclkd0, hclkd1, pclkd0, pclkd1);
328
329 /* For backward compatibility */
330 clk_f.rate = arm;
331 clk_h.rate = hclkd1;
332 clk_p.rate = pclkd1;
333
334 clk_pclkd0.rate = pclkd0;
335 clk_pclkd1.rate = pclkd1;
336}
337
338static struct clk init_clocks[] = {
339 {
340 .name = "systimer",
341 .id = -1,
342 .parent = &clk_pclkd1,
343 .enable = s5p6442_clk_ip3_ctrl,
344 .ctrlbit = (1<<16),
345 }, {
346 .name = "uart",
347 .id = 0,
348 .parent = &clk_pclkd1,
349 .enable = s5p6442_clk_ip3_ctrl,
350 .ctrlbit = (1<<17),
351 }, {
352 .name = "uart",
353 .id = 1,
354 .parent = &clk_pclkd1,
355 .enable = s5p6442_clk_ip3_ctrl,
356 .ctrlbit = (1<<18),
357 }, {
358 .name = "uart",
359 .id = 2,
360 .parent = &clk_pclkd1,
361 .enable = s5p6442_clk_ip3_ctrl,
362 .ctrlbit = (1<<19),
363 }, {
364 .name = "timers",
365 .id = -1,
366 .parent = &clk_pclkd1,
367 .enable = s5p6442_clk_ip3_ctrl,
368 .ctrlbit = (1<<23),
369 },
370};
371
372static struct clk *clks[] __initdata = {
373 &clk_ext,
374 &clk_epll,
375 &clk_mout_apll.clk,
376 &clk_mout_mpll.clk,
377 &clk_mout_epll.clk,
378 &clk_mout_d0.clk,
379 &clk_mout_d0sync.clk,
380 &clk_mout_d1.clk,
381 &clk_mout_d1sync.clk,
382 &clk_hclkd0,
383 &clk_pclkd0,
384 &clk_hclkd1,
385 &clk_pclkd1,
386};
387
388void __init s5p6442_register_clocks(void)
389{
390 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
391
392 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
393 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
394
395 s3c_pwmclk_init();
396}
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
new file mode 100644
index 000000000000..bc2524df89b3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -0,0 +1,121 @@
1/* linux/arch/arm/mach-s5p6442/cpu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/proc-fns.h>
28
29#include <mach/hardware.h>
30#include <mach/map.h>
31#include <asm/irq.h>
32
33#include <plat/regs-serial.h>
34#include <mach/regs-clock.h>
35
36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/clock.h>
39#include <plat/s5p6442.h>
40
41/* Initial IO mappings */
42
43static struct map_desc s5p6442_iodesc[] __initdata = {
44 {
45 .virtual = (unsigned long)S5P_VA_SYSTIMER,
46 .pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER),
47 .length = SZ_16K,
48 .type = MT_DEVICE,
49 }, {
50 .virtual = (unsigned long)VA_VIC2,
51 .pfn = __phys_to_pfn(S5P6442_PA_VIC2),
52 .length = SZ_16K,
53 .type = MT_DEVICE,
54 }
55};
56
57static void s5p6442_idle(void)
58{
59 if (!need_resched())
60 cpu_do_idle();
61
62 local_irq_enable();
63}
64
65/* s5p6442_map_io
66 *
67 * register the standard cpu IO areas
68*/
69
70void __init s5p6442_map_io(void)
71{
72 iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
73}
74
75void __init s5p6442_init_clocks(int xtal)
76{
77 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
78
79 s3c24xx_register_baseclocks(xtal);
80 s5p_register_clocks(xtal);
81 s5p6442_register_clocks();
82 s5p6442_setup_clocks();
83}
84
85void __init s5p6442_init_irq(void)
86{
87 /* S5P6442 supports 3 VIC */
88 u32 vic[3];
89
90 /* VIC0, VIC1, and VIC2: some interrupt reserved */
91 vic[0] = 0x7fefffff;
92 vic[1] = 0X7f389c81;
93 vic[2] = 0X1bbbcfff;
94
95 s5p_init_irq(vic, ARRAY_SIZE(vic));
96}
97
98static struct sysdev_class s5p6442_sysclass = {
99 .name = "s5p6442-core",
100};
101
102static struct sys_device s5p6442_sysdev = {
103 .cls = &s5p6442_sysclass,
104};
105
106static int __init s5p6442_core_init(void)
107{
108 return sysdev_class_register(&s5p6442_sysclass);
109}
110
111core_initcall(s5p6442_core_init);
112
113int __init s5p6442_init(void)
114{
115 printk(KERN_INFO "S5P6442: Initializing architecture\n");
116
117 /* set idle function */
118 pm_idle = s5p6442_idle;
119
120 return sysdev_register(&s5p6442_sysdev);
121}
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
new file mode 100644
index 000000000000..1aae691e58ef
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* pull in the relevant register and map files. */
14
15#include <mach/map.h>
16#include <plat/regs-serial.h>
17
18 .macro addruart, rx
19 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1
21 ldreq \rx, = S3C_PA_UART
22 ldrne \rx, = S3C_VA_UART
23#if CONFIG_DEBUG_S3C_UART != 0
24 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
25#endif
26 .endm
27
28#define fifo_full fifo_full_s5pv210
29#define fifo_level fifo_level_s5pv210
30
31/* include the reset of the code which will do the work, we're only
32 * compiling for a single cpu processor type so the default of s3c2440
33 * will be fine with us.
34 */
35
36#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
new file mode 100644
index 000000000000..6d574edbf1ae
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
@@ -0,0 +1,48 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5P6442
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 clzne \irqstat, \irqstat
47 subne \irqnr, \irqnr, \irqstat
48 .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
new file mode 100644
index 000000000000..b8715df2fdab
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/gpio.h
@@ -0,0 +1,123 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22#define S5P6442_GPIO_A0_NR (8)
23#define S5P6442_GPIO_A1_NR (2)
24#define S5P6442_GPIO_B_NR (4)
25#define S5P6442_GPIO_C0_NR (5)
26#define S5P6442_GPIO_C1_NR (5)
27#define S5P6442_GPIO_D0_NR (2)
28#define S5P6442_GPIO_D1_NR (6)
29#define S5P6442_GPIO_E0_NR (8)
30#define S5P6442_GPIO_E1_NR (5)
31#define S5P6442_GPIO_F0_NR (8)
32#define S5P6442_GPIO_F1_NR (8)
33#define S5P6442_GPIO_F2_NR (8)
34#define S5P6442_GPIO_F3_NR (6)
35#define S5P6442_GPIO_G0_NR (7)
36#define S5P6442_GPIO_G1_NR (7)
37#define S5P6442_GPIO_G2_NR (7)
38#define S5P6442_GPIO_H0_NR (8)
39#define S5P6442_GPIO_H1_NR (8)
40#define S5P6442_GPIO_H2_NR (8)
41#define S5P6442_GPIO_H3_NR (8)
42#define S5P6442_GPIO_J0_NR (8)
43#define S5P6442_GPIO_J1_NR (6)
44#define S5P6442_GPIO_J2_NR (8)
45#define S5P6442_GPIO_J3_NR (8)
46#define S5P6442_GPIO_J4_NR (5)
47
48/* GPIO bank numbers */
49
50/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
51 * space for debugging purposes so that any accidental
52 * change from one gpio bank to another can be caught.
53*/
54
55#define S5P6442_GPIO_NEXT(__gpio) \
56 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
57
58enum s5p_gpio_number {
59 S5P6442_GPIO_A0_START = 0,
60 S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
61 S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
62 S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
63 S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
64 S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
65 S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
66 S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
67 S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
68 S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
69 S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
70 S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
71 S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
72 S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
73 S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
74 S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
75 S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
76 S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
77 S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
78 S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
79 S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
80 S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
81 S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
82 S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
83 S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
84};
85
86/* S5P6442 GPIO number definitions. */
87#define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr))
88#define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr))
89#define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr))
90#define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr))
91#define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr))
92#define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr))
93#define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr))
94#define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr))
95#define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr))
96#define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr))
97#define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr))
98#define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr))
99#define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr))
100#define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr))
101#define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr))
102#define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr))
103#define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr))
104#define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr))
105#define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr))
106#define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr))
107#define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr))
108#define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr))
109#define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr))
110#define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr))
111#define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr))
112
113/* the end of the S5P6442 specific gpios */
114#define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
115#define S3C_GPIO_END S5P6442_GPIO_END
116
117/* define the number of gpios we need to the one after the GPJ4() range */
118#define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \
119 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
120
121#include <asm-generic/gpio.h>
122
123#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
new file mode 100644
index 000000000000..8cd7b67b49d4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
new file mode 100644
index 000000000000..5d2195ad0b67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/io.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6442/include/mach/io.h
2 *
3 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Default IO routines for S5P6442
6 */
7
8#ifndef __ASM_ARM_ARCH_IO_H
9#define __ASM_ARM_ARCH_IO_H
10
11/* No current ISA/PCI bus support. */
12#define __io(a) __typesafe_io(a)
13#define __mem_pci(a) (a)
14
15#define IO_SPACE_LIMIT (0xFFFFFFFF)
16
17#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
new file mode 100644
index 000000000000..da665809f6e4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -0,0 +1,86 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0 */
19#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
20#define IRQ_BATF S5P_IRQ_VIC0(17)
21#define IRQ_MDMA S5P_IRQ_VIC0(18)
22#define IRQ_PDMA S5P_IRQ_VIC0(19)
23#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
24#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
25#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
26#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
27#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
28#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
29#define IRQ_WDT S5P_IRQ_VIC0(27)
30#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
31#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
32#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
33
34/* VIC1 */
35#define IRQ_nPMUIRQ S5P_IRQ_VIC1(0)
36#define IRQ_ONENAND S5P_IRQ_VIC1(7)
37#define IRQ_UART0 S5P_IRQ_VIC1(10)
38#define IRQ_UART1 S5P_IRQ_VIC1(11)
39#define IRQ_UART2 S5P_IRQ_VIC1(12)
40#define IRQ_SPI0 S5P_IRQ_VIC1(15)
41#define IRQ_IIC S5P_IRQ_VIC1(19)
42#define IRQ_IIC1 S5P_IRQ_VIC1(20)
43#define IRQ_IIC2 S5P_IRQ_VIC1(21)
44#define IRQ_OTG S5P_IRQ_VIC1(24)
45#define IRQ_MSM S5P_IRQ_VIC1(25)
46#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
47#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
48#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
49#define IRQ_COMMRX S5P_IRQ_VIC1(29)
50#define IRQ_COMMTX S5P_IRQ_VIC1(30)
51
52/* VIC2 */
53#define IRQ_LCD0 S5P_IRQ_VIC2(0)
54#define IRQ_LCD1 S5P_IRQ_VIC2(1)
55#define IRQ_LCD2 S5P_IRQ_VIC2(2)
56#define IRQ_LCD3 S5P_IRQ_VIC2(3)
57#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
58#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
59#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
60#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
61#define IRQ_JPEG S5P_IRQ_VIC2(8)
62#define IRQ_3D S5P_IRQ_VIC2(10)
63#define IRQ_Mixer S5P_IRQ_VIC2(11)
64#define IRQ_MFC S5P_IRQ_VIC2(14)
65#define IRQ_TVENC S5P_IRQ_VIC2(15)
66#define IRQ_I2S0 S5P_IRQ_VIC2(16)
67#define IRQ_I2S1 S5P_IRQ_VIC2(17)
68#define IRQ_RP S5P_IRQ_VIC2(19)
69#define IRQ_PCM0 S5P_IRQ_VIC2(20)
70#define IRQ_PCM1 S5P_IRQ_VIC2(21)
71#define IRQ_ADC S5P_IRQ_VIC2(23)
72#define IRQ_PENDN S5P_IRQ_VIC2(24)
73#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
74#define IRQ_SSS_INT S5P_IRQ_VIC2(27)
75#define IRQ_SSS_HASH S5P_IRQ_VIC2(28)
76#define IRQ_VIC_END S5P_IRQ_VIC2(31)
77
78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
79
80#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \
81 (S5P_IRQ_EINT_BASE + (x)-16))
82/* Set the default NR_IRQS */
83
84#define NR_IRQS (IRQ_EINT(31) + 1)
85
86#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
new file mode 100644
index 000000000000..685277d792fb
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -0,0 +1,58 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/map.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5P6442_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5P6442_PA_CHIPID
21
22#define S5P6442_PA_SYSCON (0xE0100000)
23#define S5P_PA_SYSCON S5P6442_PA_SYSCON
24
25#define S5P6442_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5P6442_PA_GPIO
27
28#define S5P6442_PA_VIC0 (0xE4000000)
29#define S5P_PA_VIC0 S5P6442_PA_VIC0
30
31#define S5P6442_PA_VIC1 (0xE4100000)
32#define S5P_PA_VIC1 S5P6442_PA_VIC1
33
34#define S5P6442_PA_VIC2 (0xE4200000)
35#define S5P_PA_VIC2 S5P6442_PA_VIC2
36
37#define S5P6442_PA_TIMER (0xEA000000)
38#define S5P_PA_TIMER S5P6442_PA_TIMER
39
40#define S5P6442_PA_SYSTIMER (0xEA100000)
41
42#define S5P6442_PA_UART (0xEC000000)
43
44#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0)
45#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400)
46#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800)
47#define S5P_SZ_UART SZ_256
48
49#define S5P6442_PA_IIC0 (0xEC100000)
50
51#define S5P6442_PA_SDRAM (0x20000000)
52#define S5P_PA_SDRAM S5P6442_PA_SDRAM
53
54/* compatibiltiy defines. */
55#define S3C_PA_UART S5P6442_PA_UART
56#define S3C_PA_IIC S5P6442_PA_IIC0
57
58#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
new file mode 100644
index 000000000000..9ddd877ba2ea
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/memory.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE SZ_8M
18
19#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..15e8525da0f1
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Copyright 2010 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 *
12 * S5P6442 - pwm clock and timer support
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
19#ifndef __ASM_ARCH_PWMCLK_H
20#define __ASM_ARCH_PWMCLK_H __FILE__
21
22/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0.
25 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks.
28 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32}
33
34/**
35 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
36 * @tcfg1: The tcfg1 setting, shifted down.
37 *
38 * Get the divisor value for the given tcfg1 setting. We assume the
39 * caller has already checked to see if this is not a TCLK source.
40 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{
43 return 1 << (1 + tcfg1);
44}
45
46/**
47 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
48 *
49 * Return true if we have a /1 in the tdiv setting.
50 */
51static inline unsigned int pwm_tdiv_has_div1(void)
52{
53 return 0;
54}
55
56/**
57 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
58 * @div: The divisor to calculate the bit information for.
59 *
60 * Turn a divisor into the necessary bit field for TCFG1.
61 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{
64 return ilog2(div) - 1;
65}
66
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
68
69#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
new file mode 100644
index 000000000000..d8360b5d4ece
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -0,0 +1,103 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23#define S5P_VPLL_LOCK S5P_CLKREG(0x20)
24
25#define S5P_APLL_CON S5P_CLKREG(0x100)
26#define S5P_MPLL_CON S5P_CLKREG(0x108)
27#define S5P_EPLL_CON S5P_CLKREG(0x110)
28#define S5P_VPLL_CON S5P_CLKREG(0x120)
29
30#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
34#define S5P_CLK_SRC4 S5P_CLKREG(0x210)
35#define S5P_CLK_SRC5 S5P_CLKREG(0x214)
36#define S5P_CLK_SRC6 S5P_CLKREG(0x218)
37
38#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280)
39#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284)
40
41#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
42#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
43#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
44#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
45#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
46#define S5P_CLK_DIV5 S5P_CLKREG(0x314)
47#define S5P_CLK_DIV6 S5P_CLKREG(0x318)
48
49#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C)
50
51/* CLK_OUT */
52#define S5P_CLK_OUT_SHIFT (12)
53#define S5P_CLK_OUT_MASK (0x1F << S5P_CLK_OUT_SHIFT)
54#define S5P_CLK_OUT S5P_CLKREG(0x500)
55
56#define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000)
57#define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004)
58
59#define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100)
60#define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104)
61
62#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
63
64/* Register Bit definition */
65#define S5P_EPLL_EN (1<<31)
66#define S5P_EPLL_MASK 0xffffffff
67#define S5P_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s)))
68
69/* CLKDIV0 */
70#define S5P_CLKDIV0_APLL_SHIFT (0)
71#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT)
72#define S5P_CLKDIV0_A2M_SHIFT (4)
73#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT)
74#define S5P_CLKDIV0_D0CLK_SHIFT (16)
75#define S5P_CLKDIV0_D0CLK_MASK (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
76#define S5P_CLKDIV0_P0CLK_SHIFT (20)
77#define S5P_CLKDIV0_P0CLK_MASK (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
78#define S5P_CLKDIV0_D1CLK_SHIFT (24)
79#define S5P_CLKDIV0_D1CLK_MASK (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
80#define S5P_CLKDIV0_P1CLK_SHIFT (28)
81#define S5P_CLKDIV0_P1CLK_MASK (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
82
83/* Clock MUX status Registers */
84#define S5P_CLK_MUX_STAT0_APLL_SHIFT (0)
85#define S5P_CLK_MUX_STAT0_APLL_MASK (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
86#define S5P_CLK_MUX_STAT0_MPLL_SHIFT (4)
87#define S5P_CLK_MUX_STAT0_MPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
88#define S5P_CLK_MUX_STAT0_EPLL_SHIFT (8)
89#define S5P_CLK_MUX_STAT0_EPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
90#define S5P_CLK_MUX_STAT0_VPLL_SHIFT (12)
91#define S5P_CLK_MUX_STAT0_VPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
92#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT (16)
93#define S5P_CLK_MUX_STAT0_MUXARM_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
94#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT (20)
95#define S5P_CLK_MUX_STAT0_MUXD0_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
96#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT (24)
97#define S5P_CLK_MUX_STAT0_MUXD1_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
98#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT (24)
99#define S5P_CLK_MUX_STAT1_D1SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
100#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT (28)
101#define S5P_CLK_MUX_STAT1_D0SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
102
103#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
new file mode 100644
index 000000000000..73782b52a83b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
new file mode 100644
index 000000000000..8bcd8ed0c3c3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/system.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 /* nothing here yet */
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
new file mode 100644
index 000000000000..e1d4cabf8297
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/tick.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5P6442 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
new file mode 100644
index 000000000000..ff8f2fcadeb7
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s5p6442/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S5P6442 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
new file mode 100644
index 000000000000..5ac7cbeeb987
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/uncompress.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17#include <plat/uncompress.h>
18
19static void arch_detect_cpu(void)
20{
21 /* we do not need to do any cpu detection here at the moment. */
22}
23
24#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
new file mode 100644
index 000000000000..be3333688c20
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S5P6442 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xE0000000)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c
new file mode 100644
index 000000000000..1874bdb71e1d
--- /dev/null
+++ b/arch/arm/mach-s5p6442/init.c
@@ -0,0 +1,44 @@
1/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5p6442.h>
19#include <plat/regs-serial.h>
20
21static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
22 [0] = {
23 .name = "pclk",
24 .divisor = 1,
25 .min_baud = 0,
26 .max_baud = 0,
27 },
28};
29
30/* uart registration process */
31void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
32{
33 struct s3c2410_uartcfg *tcfg = cfg;
34 u32 ucnt;
35
36 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
37 if (!tcfg->clocks) {
38 tcfg->clocks = s5p6442_serial_clocks;
39 tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
40 }
41 }
42
43 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
44}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
new file mode 100644
index 000000000000..0d63371ce07c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -0,0 +1,91 @@
1/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5p6442.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5P6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5P6442_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5P6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5P6442_UCON_DEFAULT,
48 .ulcon = S5P6442_ULCON_DEFAULT,
49 .ufcon = S5P6442_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5P6442_UCON_DEFAULT,
55 .ulcon = S5P6442_ULCON_DEFAULT,
56 .ufcon = S5P6442_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5P6442_UCON_DEFAULT,
62 .ulcon = S5P6442_ULCON_DEFAULT,
63 .ufcon = S5P6442_UFCON_DEFAULT,
64 },
65};
66
67static struct platform_device *smdk6442_devices[] __initdata = {
68};
69
70static void __init smdk6442_map_io(void)
71{
72 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
73 s3c24xx_init_clocks(12000000);
74 s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
75}
76
77static void __init smdk6442_machine_init(void)
78{
79 platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
80}
81
82MACHINE_START(SMDK6442, "SMDK6442")
83 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
84 .phys_io = S3C_PA_UART & 0xfff00000,
85 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
86 .boot_params = S5P_PA_SDRAM + 0x100,
87 .init_irq = s5p6442_init_irq,
88 .map_io = smdk6442_map_io,
89 .init_machine = smdk6442_machine_init,
90 .timer = &s3c24xx_timer,
91MACHINE_END
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio-core.h b/arch/arm/mach-s5pc100/include/mach/gpio-core.h
deleted file mode 100644
index ad28d8ec8a78..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/gpio-core.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/gpio-core.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - GPIO core support
7 *
8 * Based on mach-s3c6400/include/mach/gpio-core.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_GPIO_CORE_H
16#define __ASM_ARCH_GPIO_CORE_H __FILE__
17
18/* currently we just include the platform support */
19#include <plat/gpio-core.h>
20
21#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
new file mode 100644
index 000000000000..819acf5eaf89
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/io.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s5pc100/include/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S5PC100 systems
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index d3de0f3591ae..f338c9eec717 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -21,7 +21,7 @@
21static inline u32 s3c24xx_ostimer_pending(void) 21static inline u32 s3c24xx_ostimer_pending(void)
22{ 22{
23 u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); 23 u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
24 return pend & 1 << (IRQ_TIMER4 - S5PC1XX_IRQ_VIC0(0)); 24 return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0));
25} 25}
26 26
27#define TICK_MAX (0xffffffff) 27#define TICK_MAX (0xffffffff)
diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h
new file mode 100644
index 000000000000..47ffb17aff96
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s5pc100/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C6400 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
new file mode 100644
index 000000000000..be9df79903ed
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C6400 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xe0000000UL)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index 4385986a3da0..ea7ff19adb95 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -28,8 +28,8 @@
28char *s5pc100_hsmmc_clksrcs[4] = { 28char *s5pc100_hsmmc_clksrcs[4] = {
29 [0] = "hsmmc", 29 [0] = "hsmmc",
30 [1] = "hsmmc", 30 [1] = "hsmmc",
31 /* [2] = "mmc_bus", not yet succesfuuly used yet */ 31 /* [2] = "mmc_bus", not yet successfully used yet */
32 /* [3] = "48m", - note not succesfully used yet */ 32 /* [3] = "48m", - note not successfully used yet */
33}; 33};
34 34
35 35
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
new file mode 100644
index 000000000000..af33a1a89b72
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -0,0 +1,40 @@
1# arch/arm/mach-s5pv210/Kconfig
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8# Configuration options for the S5PV210/S5PC110
9
10if ARCH_S5PV210
11
12config CPU_S5PV210
13 bool
14 select PLAT_S5P
15 help
16 Enable S5PV210 CPU support
17
18choice
19 prompt "Select machine type"
20 depends on ARCH_S5PV210
21 default MACH_SMDKV210
22
23config MACH_SMDKV210
24 bool "SMDKV210"
25 select CPU_S5PV210
26 select ARCH_SPARSEMEM_ENABLE
27 help
28 Machine support for Samsung SMDKV210
29
30config MACH_SMDKC110
31 bool "SMDKC110"
32 select CPU_S5PV210
33 select ARCH_SPARSEMEM_ENABLE
34 help
35 Machine support for Samsung SMDKC110
36 S5PC110(MCP) is one of package option of S5PV210
37
38endchoice
39
40endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
new file mode 100644
index 000000000000..8ebf51c52a01
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -0,0 +1,20 @@
1# arch/arm/mach-s5pv210/Makefile
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S5PV210 system
14
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o
16
17# machine support
18
19obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
20obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x20008000
2params_phys-y := 0x20000100
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
new file mode 100644
index 000000000000..ccccae262351
--- /dev/null
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -0,0 +1,454 @@
1/* linux/arch/arm/mach-s5pv210/clock.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/sysdev.h>
21#include <linux/io.h>
22
23#include <mach/map.h>
24
25#include <plat/cpu-freq.h>
26#include <mach/regs-clock.h>
27#include <plat/clock.h>
28#include <plat/cpu.h>
29#include <plat/pll.h>
30#include <plat/s5p-clock.h>
31#include <plat/clock-clksrc.h>
32#include <plat/s5pv210.h>
33
34static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable)
35{
36 return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
37}
38
39static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable)
40{
41 return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable);
42}
43
44static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable)
45{
46 return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable);
47}
48
49static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
50{
51 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
52}
53
54static struct clk clk_h200 = {
55 .name = "hclk200",
56 .id = -1,
57};
58
59static struct clk clk_h100 = {
60 .name = "hclk100",
61 .id = -1,
62};
63
64static struct clk clk_h166 = {
65 .name = "hclk166",
66 .id = -1,
67};
68
69static struct clk clk_h133 = {
70 .name = "hclk133",
71 .id = -1,
72};
73
74static struct clk clk_p100 = {
75 .name = "pclk100",
76 .id = -1,
77};
78
79static struct clk clk_p83 = {
80 .name = "pclk83",
81 .id = -1,
82};
83
84static struct clk clk_p66 = {
85 .name = "pclk66",
86 .id = -1,
87};
88
89static struct clk *sys_clks[] = {
90 &clk_h200,
91 &clk_h100,
92 &clk_h166,
93 &clk_h133,
94 &clk_p100,
95 &clk_p83,
96 &clk_p66
97};
98
99static struct clk init_clocks_disable[] = {
100 {
101 .name = "rot",
102 .id = -1,
103 .parent = &clk_h166,
104 .enable = s5pv210_clk_ip0_ctrl,
105 .ctrlbit = (1<<29),
106 }, {
107 .name = "otg",
108 .id = -1,
109 .parent = &clk_h133,
110 .enable = s5pv210_clk_ip1_ctrl,
111 .ctrlbit = (1<<16),
112 }, {
113 .name = "usb-host",
114 .id = -1,
115 .parent = &clk_h133,
116 .enable = s5pv210_clk_ip1_ctrl,
117 .ctrlbit = (1<<17),
118 }, {
119 .name = "lcd",
120 .id = -1,
121 .parent = &clk_h166,
122 .enable = s5pv210_clk_ip1_ctrl,
123 .ctrlbit = (1<<0),
124 }, {
125 .name = "cfcon",
126 .id = 0,
127 .parent = &clk_h133,
128 .enable = s5pv210_clk_ip1_ctrl,
129 .ctrlbit = (1<<25),
130 }, {
131 .name = "hsmmc",
132 .id = 0,
133 .parent = &clk_h133,
134 .enable = s5pv210_clk_ip2_ctrl,
135 .ctrlbit = (1<<16),
136 }, {
137 .name = "hsmmc",
138 .id = 1,
139 .parent = &clk_h133,
140 .enable = s5pv210_clk_ip2_ctrl,
141 .ctrlbit = (1<<17),
142 }, {
143 .name = "hsmmc",
144 .id = 2,
145 .parent = &clk_h133,
146 .enable = s5pv210_clk_ip2_ctrl,
147 .ctrlbit = (1<<18),
148 }, {
149 .name = "hsmmc",
150 .id = 3,
151 .parent = &clk_h133,
152 .enable = s5pv210_clk_ip2_ctrl,
153 .ctrlbit = (1<<19),
154 }, {
155 .name = "systimer",
156 .id = -1,
157 .parent = &clk_p66,
158 .enable = s5pv210_clk_ip3_ctrl,
159 .ctrlbit = (1<<16),
160 }, {
161 .name = "watchdog",
162 .id = -1,
163 .parent = &clk_p66,
164 .enable = s5pv210_clk_ip3_ctrl,
165 .ctrlbit = (1<<22),
166 }, {
167 .name = "rtc",
168 .id = -1,
169 .parent = &clk_p66,
170 .enable = s5pv210_clk_ip3_ctrl,
171 .ctrlbit = (1<<15),
172 }, {
173 .name = "i2c",
174 .id = 0,
175 .parent = &clk_p66,
176 .enable = s5pv210_clk_ip3_ctrl,
177 .ctrlbit = (1<<7),
178 }, {
179 .name = "i2c",
180 .id = 1,
181 .parent = &clk_p66,
182 .enable = s5pv210_clk_ip3_ctrl,
183 .ctrlbit = (1<<8),
184 }, {
185 .name = "i2c",
186 .id = 2,
187 .parent = &clk_p66,
188 .enable = s5pv210_clk_ip3_ctrl,
189 .ctrlbit = (1<<9),
190 }, {
191 .name = "spi",
192 .id = 0,
193 .parent = &clk_p66,
194 .enable = s5pv210_clk_ip3_ctrl,
195 .ctrlbit = (1<<12),
196 }, {
197 .name = "spi",
198 .id = 1,
199 .parent = &clk_p66,
200 .enable = s5pv210_clk_ip3_ctrl,
201 .ctrlbit = (1<<13),
202 }, {
203 .name = "spi",
204 .id = 2,
205 .parent = &clk_p66,
206 .enable = s5pv210_clk_ip3_ctrl,
207 .ctrlbit = (1<<14),
208 }, {
209 .name = "timers",
210 .id = -1,
211 .parent = &clk_p66,
212 .enable = s5pv210_clk_ip3_ctrl,
213 .ctrlbit = (1<<23),
214 }, {
215 .name = "adc",
216 .id = -1,
217 .parent = &clk_p66,
218 .enable = s5pv210_clk_ip3_ctrl,
219 .ctrlbit = (1<<24),
220 }, {
221 .name = "keypad",
222 .id = -1,
223 .parent = &clk_p66,
224 .enable = s5pv210_clk_ip3_ctrl,
225 .ctrlbit = (1<<21),
226 }, {
227 .name = "i2s_v50",
228 .id = 0,
229 .parent = &clk_p,
230 .enable = s5pv210_clk_ip3_ctrl,
231 .ctrlbit = (1<<4),
232 }, {
233 .name = "i2s_v32",
234 .id = 0,
235 .parent = &clk_p,
236 .enable = s5pv210_clk_ip3_ctrl,
237 .ctrlbit = (1<<4),
238 }, {
239 .name = "i2s_v32",
240 .id = 1,
241 .parent = &clk_p,
242 .enable = s5pv210_clk_ip3_ctrl,
243 .ctrlbit = (1<<4),
244 }
245};
246
247static struct clk init_clocks[] = {
248 {
249 .name = "uart",
250 .id = 0,
251 .parent = &clk_p66,
252 .enable = s5pv210_clk_ip3_ctrl,
253 .ctrlbit = (1<<7),
254 }, {
255 .name = "uart",
256 .id = 1,
257 .parent = &clk_p66,
258 .enable = s5pv210_clk_ip3_ctrl,
259 .ctrlbit = (1<<8),
260 }, {
261 .name = "uart",
262 .id = 2,
263 .parent = &clk_p66,
264 .enable = s5pv210_clk_ip3_ctrl,
265 .ctrlbit = (1<<9),
266 }, {
267 .name = "uart",
268 .id = 3,
269 .parent = &clk_p66,
270 .enable = s5pv210_clk_ip3_ctrl,
271 .ctrlbit = (1<<10),
272 },
273};
274
275static struct clksrc_clk clk_mout_apll = {
276 .clk = {
277 .name = "mout_apll",
278 .id = -1,
279 },
280 .sources = &clk_src_apll,
281 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
282};
283
284static struct clksrc_clk clk_mout_epll = {
285 .clk = {
286 .name = "mout_epll",
287 .id = -1,
288 },
289 .sources = &clk_src_epll,
290 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
291};
292
293static struct clksrc_clk clk_mout_mpll = {
294 .clk = {
295 .name = "mout_mpll",
296 .id = -1,
297 },
298 .sources = &clk_src_mpll,
299 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
300};
301
302static struct clk *clkset_uart_list[] = {
303 [6] = &clk_mout_mpll.clk,
304 [7] = &clk_mout_epll.clk,
305};
306
307static struct clksrc_sources clkset_uart = {
308 .sources = clkset_uart_list,
309 .nr_sources = ARRAY_SIZE(clkset_uart_list),
310};
311
312static struct clksrc_clk clksrcs[] = {
313 {
314 .clk = {
315 .name = "uclk1",
316 .id = -1,
317 .ctrlbit = (1<<17),
318 .enable = s5pv210_clk_ip3_ctrl,
319 },
320 .sources = &clkset_uart,
321 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
322 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
323 }
324};
325
326/* Clock initialisation code */
327static struct clksrc_clk *init_parents[] = {
328 &clk_mout_apll,
329 &clk_mout_epll,
330 &clk_mout_mpll,
331};
332
333#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
334
335void __init_or_cpufreq s5pv210_setup_clocks(void)
336{
337 struct clk *xtal_clk;
338 unsigned long xtal;
339 unsigned long armclk;
340 unsigned long hclk200;
341 unsigned long hclk166;
342 unsigned long hclk133;
343 unsigned long pclk100;
344 unsigned long pclk83;
345 unsigned long pclk66;
346 unsigned long apll;
347 unsigned long mpll;
348 unsigned long epll;
349 unsigned int ptr;
350 u32 clkdiv0, clkdiv1;
351
352 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
353
354 clkdiv0 = __raw_readl(S5P_CLK_DIV0);
355 clkdiv1 = __raw_readl(S5P_CLK_DIV1);
356
357 printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n",
358 __func__, clkdiv0, clkdiv1);
359
360 xtal_clk = clk_get(NULL, "xtal");
361 BUG_ON(IS_ERR(xtal_clk));
362
363 xtal = clk_get_rate(xtal_clk);
364 clk_put(xtal_clk);
365
366 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
367
368 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
369 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
370 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
371
372 printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld",
373 apll, mpll, epll);
374
375 armclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_APLL);
376 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX200_MASK)
377 hclk200 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
378 else
379 hclk200 = armclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
380
381 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX166_MASK) {
382 hclk166 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
383 hclk166 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
384 } else
385 hclk166 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
386
387 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX133_MASK) {
388 hclk133 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
389 hclk133 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
390 } else
391 hclk133 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
392
393 pclk100 = hclk200 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK100);
394 pclk83 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK83);
395 pclk66 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK66);
396
397 printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld, \
398 HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
399 armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66);
400
401 clk_fout_apll.rate = apll;
402 clk_fout_mpll.rate = mpll;
403 clk_fout_epll.rate = epll;
404
405 clk_f.rate = armclk;
406 clk_h.rate = hclk133;
407 clk_p.rate = pclk66;
408 clk_p66.rate = pclk66;
409 clk_p83.rate = pclk83;
410 clk_h133.rate = hclk133;
411 clk_h166.rate = hclk166;
412 clk_h200.rate = hclk200;
413
414 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
415 s3c_set_clksrc(init_parents[ptr], true);
416
417 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
418 s3c_set_clksrc(&clksrcs[ptr], true);
419}
420
421static struct clk *clks[] __initdata = {
422 &clk_mout_epll.clk,
423 &clk_mout_mpll.clk,
424};
425
426void __init s5pv210_register_clocks(void)
427{
428 struct clk *clkp;
429 int ret;
430 int ptr;
431
432 ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
433 if (ret > 0)
434 printk(KERN_ERR "Failed to register %u clocks\n", ret);
435
436 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
437 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
438
439 ret = s3c24xx_register_clocks(sys_clks, ARRAY_SIZE(sys_clks));
440 if (ret > 0)
441 printk(KERN_ERR "Failed to register system clocks\n");
442
443 clkp = init_clocks_disable;
444 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
445 ret = s3c24xx_register_clock(clkp);
446 if (ret < 0) {
447 printk(KERN_ERR "Failed to register clock %s (%d)\n",
448 clkp->name, ret);
449 }
450 (clkp->enable)(clkp, 0);
451 }
452
453 s3c_pwmclk_init();
454}
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
new file mode 100644
index 000000000000..0e0f8fde2aa6
--- /dev/null
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -0,0 +1,126 @@
1/* linux/arch/arm/mach-s5pv210/cpu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/proc-fns.h>
28#include <mach/map.h>
29#include <mach/regs-clock.h>
30
31#include <plat/cpu.h>
32#include <plat/devs.h>
33#include <plat/clock.h>
34#include <plat/s5pv210.h>
35
36/* Initial IO mappings */
37
38static struct map_desc s5pv210_iodesc[] __initdata = {
39 {
40 .virtual = (unsigned long)S5P_VA_SYSTIMER,
41 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
42 .length = SZ_1M,
43 .type = MT_DEVICE,
44 }, {
45 .virtual = (unsigned long)VA_VIC2,
46 .pfn = __phys_to_pfn(S5PV210_PA_VIC2),
47 .length = SZ_16K,
48 .type = MT_DEVICE,
49 }, {
50 .virtual = (unsigned long)VA_VIC3,
51 .pfn = __phys_to_pfn(S5PV210_PA_VIC3),
52 .length = SZ_16K,
53 .type = MT_DEVICE,
54 }, {
55 .virtual = (unsigned long)S5P_VA_SROMC,
56 .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
57 .length = SZ_4K,
58 .type = MT_DEVICE,
59 }
60};
61
62static void s5pv210_idle(void)
63{
64 if (!need_resched())
65 cpu_do_idle();
66
67 local_irq_enable();
68}
69
70/* s5pv210_map_io
71 *
72 * register the standard cpu IO areas
73*/
74
75void __init s5pv210_map_io(void)
76{
77 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
78}
79
80void __init s5pv210_init_clocks(int xtal)
81{
82 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
83
84 s3c24xx_register_baseclocks(xtal);
85 s5p_register_clocks(xtal);
86 s5pv210_register_clocks();
87 s5pv210_setup_clocks();
88}
89
90void __init s5pv210_init_irq(void)
91{
92 u32 vic[4]; /* S5PV210 supports 4 VIC */
93
94 /* All the VICs are fully populated. */
95 vic[0] = ~0;
96 vic[1] = ~0;
97 vic[2] = ~0;
98 vic[3] = ~0;
99
100 s5p_init_irq(vic, ARRAY_SIZE(vic));
101}
102
103static struct sysdev_class s5pv210_sysclass = {
104 .name = "s5pv210-core",
105};
106
107static struct sys_device s5pv210_sysdev = {
108 .cls = &s5pv210_sysclass,
109};
110
111static int __init s5pv210_core_init(void)
112{
113 return sysdev_class_register(&s5pv210_sysclass);
114}
115
116core_initcall(s5pv210_core_init);
117
118int __init s5pv210_init(void)
119{
120 printk(KERN_INFO "S5PV210: Initializing architecture\n");
121
122 /* set idle function */
123 pm_idle = s5pv210_idle;
124
125 return sysdev_register(&s5pv210_sysdev);
126}
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
new file mode 100644
index 000000000000..7872f5c3dfc2
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -0,0 +1,42 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* pull in the relevant register and map files. */
14
15#include <mach/map.h>
16#include <plat/regs-serial.h>
17
18 /* note, for the boot process to work we have to keep the UART
19 * virtual address aligned to an 1MiB boundary for the L1
20 * mapping the head code makes. We keep the UART virtual address
21 * aligned and add in the offset when we load the value here.
22 */
23
24 .macro addruart, rx, tmp
25 mrc p15, 0, \rx, c1, c0
26 tst \rx, #1
27 ldreq \rx, = S3C_PA_UART
28 ldrne \rx, = S3C_VA_UART
29#if CONFIG_DEBUG_S3C_UART != 0
30 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
31#endif
32 .endm
33
34#define fifo_full fifo_full_s5pv210
35#define fifo_level fifo_level_s5pv210
36
37/* include the reset of the code which will do the work, we're only
38 * compiling for a single cpu processor type so the default of s3c2440
39 * will be fine with us.
40 */
41
42#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
new file mode 100644
index 000000000000..3aa41ac59f07
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -0,0 +1,54 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5PV210
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 @ otherwise try vic3
47 addeq \tmp, \base, #(VA_VIC3 - VA_VIC0)
48 addeq \irqnr, \irqnr, #32
49 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
50 teqeq \irqstat, #0
51
52 clzne \irqstat, \irqstat
53 subne \irqnr, \irqnr, \irqstat
54 .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
new file mode 100644
index 000000000000..533b020e21e9
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -0,0 +1,129 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22#define S5PV210_GPIO_A0_NR (8)
23#define S5PV210_GPIO_A1_NR (4)
24#define S5PV210_GPIO_B_NR (8)
25#define S5PV210_GPIO_C0_NR (5)
26#define S5PV210_GPIO_C1_NR (5)
27#define S5PV210_GPIO_D0_NR (4)
28#define S5PV210_GPIO_D1_NR (6)
29#define S5PV210_GPIO_E0_NR (8)
30#define S5PV210_GPIO_E1_NR (5)
31#define S5PV210_GPIO_F0_NR (8)
32#define S5PV210_GPIO_F1_NR (8)
33#define S5PV210_GPIO_F2_NR (8)
34#define S5PV210_GPIO_F3_NR (6)
35#define S5PV210_GPIO_G0_NR (7)
36#define S5PV210_GPIO_G1_NR (7)
37#define S5PV210_GPIO_G2_NR (7)
38#define S5PV210_GPIO_G3_NR (7)
39#define S5PV210_GPIO_H0_NR (8)
40#define S5PV210_GPIO_H1_NR (8)
41#define S5PV210_GPIO_H2_NR (8)
42#define S5PV210_GPIO_H3_NR (8)
43#define S5PV210_GPIO_I_NR (7)
44#define S5PV210_GPIO_J0_NR (8)
45#define S5PV210_GPIO_J1_NR (6)
46#define S5PV210_GPIO_J2_NR (8)
47#define S5PV210_GPIO_J3_NR (8)
48#define S5PV210_GPIO_J4_NR (5)
49
50/* GPIO bank numbers */
51
52/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
53 * space for debugging purposes so that any accidental
54 * change from one gpio bank to another can be caught.
55*/
56
57#define S5PV210_GPIO_NEXT(__gpio) \
58 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
59
60enum s5p_gpio_number {
61 S5PV210_GPIO_A0_START = 0,
62 S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0),
63 S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1),
64 S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B),
65 S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0),
66 S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1),
67 S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0),
68 S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1),
69 S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0),
70 S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1),
71 S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0),
72 S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1),
73 S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2),
74 S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3),
75 S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0),
76 S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1),
77 S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2),
78 S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3),
79 S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0),
80 S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1),
81 S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2),
82 S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3),
83 S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I),
84 S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0),
85 S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
86 S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
87 S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
88};
89
90/* S5PV210 GPIO number definitions */
91#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr))
92#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr))
93#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr))
94#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr))
95#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr))
96#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr))
97#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr))
98#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr))
99#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr))
100#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr))
101#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr))
102#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr))
103#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr))
104#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr))
105#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr))
106#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr))
107#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr))
108#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr))
109#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr))
110#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr))
111#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr))
112#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr))
113#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr))
114#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr))
115#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr))
116#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr))
117#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr))
118
119/* the end of the S5PV210 specific gpios */
120#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1)
121#define S3C_GPIO_END S5PV210_GPIO_END
122
123/* define the number of gpios we need to the one after the GPJ4() range */
124#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \
125 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
126
127#include <asm-generic/gpio.h>
128
129#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h
new file mode 100644
index 000000000000..fada7a392d09
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
new file mode 100644
index 000000000000..5ab9d560bc86
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/io.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/io.h
2 *
3 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/io.h
9 *
10 * Default IO routines for S5PV210
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARM_ARCH_IO_H
18#define __ASM_ARM_ARCH_IO_H __FILE__
19
20/* No current ISA/PCI bus support. */
21#define __io(a) __typesafe_io(a)
22#define __mem_pci(a) (a)
23
24#define IO_SPACE_LIMIT (0xFFFFFFFF)
25
26#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
new file mode 100644
index 000000000000..62c5175ef291
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -0,0 +1,146 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0: System, DMA, Timer */
19
20#define IRQ_EINT0 S5P_IRQ_VIC0(0)
21#define IRQ_EINT1 S5P_IRQ_VIC0(1)
22#define IRQ_EINT2 S5P_IRQ_VIC0(2)
23#define IRQ_EINT3 S5P_IRQ_VIC0(3)
24#define IRQ_EINT4 S5P_IRQ_VIC0(4)
25#define IRQ_EINT5 S5P_IRQ_VIC0(5)
26#define IRQ_EINT6 S5P_IRQ_VIC0(6)
27#define IRQ_EINT7 S5P_IRQ_VIC0(7)
28#define IRQ_EINT8 S5P_IRQ_VIC0(8)
29#define IRQ_EINT9 S5P_IRQ_VIC0(9)
30#define IRQ_EINT10 S5P_IRQ_VIC0(10)
31#define IRQ_EINT11 S5P_IRQ_VIC0(11)
32#define IRQ_EINT12 S5P_IRQ_VIC0(12)
33#define IRQ_EINT13 S5P_IRQ_VIC0(13)
34#define IRQ_EINT14 S5P_IRQ_VIC0(14)
35#define IRQ_EINT15 S5P_IRQ_VIC0(15)
36#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
37#define IRQ_BATF S5P_IRQ_VIC0(17)
38#define IRQ_MDMA S5P_IRQ_VIC0(18)
39#define IRQ_PDMA0 S5P_IRQ_VIC0(19)
40#define IRQ_PDMA1 S5P_IRQ_VIC0(20)
41#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
42#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
43#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
44#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
45#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
46#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
47#define IRQ_WDT S5P_IRQ_VIC0(27)
48#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
49#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
50#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
51#define IRQ_FIMC3 S5P_IRQ_VIC0(31)
52
53/* VIC1: ARM, Power, Memory, Connectivity, Storage */
54
55#define IRQ_CORTEX0 S5P_IRQ_VIC1(0)
56#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
57#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
58#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
59#define IRQ_CORTEX4 S5P_IRQ_VIC1(4)
60#define IRQ_IEMAPC S5P_IRQ_VIC1(5)
61#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
62#define IRQ_ONENAND S5P_IRQ_VIC1(7)
63#define IRQ_NFC S5P_IRQ_VIC1(8)
64#define IRQ_CFC S5P_IRQ_VIC1(9)
65#define IRQ_UART0 S5P_IRQ_VIC1(10)
66#define IRQ_UART1 S5P_IRQ_VIC1(11)
67#define IRQ_UART2 S5P_IRQ_VIC1(12)
68#define IRQ_UART3 S5P_IRQ_VIC1(13)
69#define IRQ_IIC S5P_IRQ_VIC1(14)
70#define IRQ_SPI0 S5P_IRQ_VIC1(15)
71#define IRQ_SPI1 S5P_IRQ_VIC1(16)
72#define IRQ_SPI2 S5P_IRQ_VIC1(17)
73#define IRQ_IRDA S5P_IRQ_VIC1(18)
74#define IRQ_CAN0 S5P_IRQ_VIC1(19)
75#define IRQ_CAN1 S5P_IRQ_VIC1(20)
76#define IRQ_HSIRX S5P_IRQ_VIC1(21)
77#define IRQ_HSITX S5P_IRQ_VIC1(22)
78#define IRQ_UHOST S5P_IRQ_VIC1(23)
79#define IRQ_OTG S5P_IRQ_VIC1(24)
80#define IRQ_MSM S5P_IRQ_VIC1(25)
81#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
82#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
83#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
84#define IRQ_MIPICSI S5P_IRQ_VIC1(29)
85#define IRQ_MIPIDSI S5P_IRQ_VIC1(30)
86#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31)
87
88/* VIC2: Multimedia, Audio, Security */
89
90#define IRQ_LCD0 S5P_IRQ_VIC2(0)
91#define IRQ_LCD1 S5P_IRQ_VIC2(1)
92#define IRQ_LCD2 S5P_IRQ_VIC2(2)
93#define IRQ_LCD3 S5P_IRQ_VIC2(3)
94#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
95#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
96#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
97#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
98#define IRQ_JPEG S5P_IRQ_VIC2(8)
99#define IRQ_2D S5P_IRQ_VIC2(9)
100#define IRQ_3D S5P_IRQ_VIC2(10)
101#define IRQ_MIXER S5P_IRQ_VIC2(11)
102#define IRQ_HDMI S5P_IRQ_VIC2(12)
103#define IRQ_IIC1 S5P_IRQ_VIC2(13)
104#define IRQ_MFC S5P_IRQ_VIC2(14)
105#define IRQ_TVENC S5P_IRQ_VIC2(15)
106#define IRQ_I2S0 S5P_IRQ_VIC2(16)
107#define IRQ_I2S1 S5P_IRQ_VIC2(17)
108#define IRQ_I2S2 S5P_IRQ_VIC2(18)
109#define IRQ_AC97 S5P_IRQ_VIC2(19)
110#define IRQ_PCM0 S5P_IRQ_VIC2(20)
111#define IRQ_PCM1 S5P_IRQ_VIC2(21)
112#define IRQ_SPDIF S5P_IRQ_VIC2(22)
113#define IRQ_ADC S5P_IRQ_VIC2(23)
114#define IRQ_PENDN S5P_IRQ_VIC2(24)
115#define IRQ_TC IRQ_PENDN
116#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
117#define IRQ_CG S5P_IRQ_VIC2(26)
118#define IRQ_SEC S5P_IRQ_VIC2(27)
119#define IRQ_SECRX S5P_IRQ_VIC2(28)
120#define IRQ_SECTX S5P_IRQ_VIC2(29)
121#define IRQ_SDMIRQ S5P_IRQ_VIC2(30)
122#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
123
124/* VIC3: Etc */
125
126#define IRQ_IPC S5P_IRQ_VIC3(0)
127#define IRQ_HOSTIF S5P_IRQ_VIC3(1)
128#define IRQ_MMC3 S5P_IRQ_VIC3(2)
129#define IRQ_CEC S5P_IRQ_VIC3(3)
130#define IRQ_TSI S5P_IRQ_VIC3(4)
131#define IRQ_MDNIE0 S5P_IRQ_VIC3(5)
132#define IRQ_MDNIE1 S5P_IRQ_VIC3(6)
133#define IRQ_MDNIE2 S5P_IRQ_VIC3(7)
134#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
135#define IRQ_VIC_END S5P_IRQ_VIC3(31)
136
137#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
138
139#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE)
140#define IRQ_EINT(x) S5P_EINT(x)
141
142/* Set the default NR_IRQS */
143
144#define NR_IRQS (IRQ_EINT(31) + 1)
145
146#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
new file mode 100644
index 000000000000..c22694c8231f
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -0,0 +1,65 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/map.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5PV210_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5PV210_PA_CHIPID
21
22#define S5PV210_PA_SYSCON (0xE0100000)
23#define S5P_PA_SYSCON S5PV210_PA_SYSCON
24
25#define S5PV210_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5PV210_PA_GPIO
27
28#define S5PV210_PA_IIC0 (0xE1800000)
29
30#define S5PV210_PA_TIMER (0xE2500000)
31#define S5P_PA_TIMER S5PV210_PA_TIMER
32
33#define S5PV210_PA_SYSTIMER (0xE2600000)
34
35#define S5PV210_PA_UART (0xE2900000)
36
37#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
38#define S5P_PA_UART1 (S5PV210_PA_UART + 0x400)
39#define S5P_PA_UART2 (S5PV210_PA_UART + 0x800)
40#define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00)
41
42#define S5P_SZ_UART SZ_256
43
44#define S5PV210_PA_SROMC (0xE8000000)
45
46#define S5PV210_PA_VIC0 (0xF2000000)
47#define S5P_PA_VIC0 S5PV210_PA_VIC0
48
49#define S5PV210_PA_VIC1 (0xF2100000)
50#define S5P_PA_VIC1 S5PV210_PA_VIC1
51
52#define S5PV210_PA_VIC2 (0xF2200000)
53#define S5P_PA_VIC2 S5PV210_PA_VIC2
54
55#define S5PV210_PA_VIC3 (0xF2300000)
56#define S5P_PA_VIC3 S5PV210_PA_VIC3
57
58#define S5PV210_PA_SDRAM (0x20000000)
59#define S5P_PA_SDRAM S5PV210_PA_SDRAM
60
61/* compatibiltiy defines. */
62#define S3C_PA_UART S5PV210_PA_UART
63#define S3C_PA_IIC S5PV210_PA_IIC0
64
65#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
new file mode 100644
index 000000000000..379117e27600
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -0,0 +1,23 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/memory.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
18
19/* Maximum of 256MiB in one bank */
20#define MAX_PHYSMEM_BITS 32
21#define SECTION_SIZE_BITS 28
22
23#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..69027fea987a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 *
12 * S5PV210 - pwm clock and timer support
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
19#ifndef __ASM_ARCH_PWMCLK_H
20#define __ASM_ARCH_PWMCLK_H __FILE__
21
22/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0.
25 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks.
28 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32}
33
34/**
35 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
36 * @tcfg1: The tcfg1 setting, shifted down.
37 *
38 * Get the divisor value for the given tcfg1 setting. We assume the
39 * caller has already checked to see if this is not a TCLK source.
40 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{
43 return 1 << (1 + tcfg1);
44}
45
46/**
47 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
48 *
49 * Return true if we have a /1 in the tdiv setting.
50 */
51static inline unsigned int pwm_tdiv_has_div1(void)
52{
53 return 0;
54}
55
56/**
57 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
58 * @div: The divisor to calculate the bit information for.
59 *
60 * Turn a divisor into the necessary bit field for TCFG1.
61 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{
64 return ilog2(div) - 1;
65}
66
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
68
69#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
new file mode 100644
index 000000000000..e56e0e4673ed
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -0,0 +1,169 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23#define S5P_VPLL_LOCK S5P_CLKREG(0x20)
24
25#define S5P_APLL_CON S5P_CLKREG(0x100)
26#define S5P_MPLL_CON S5P_CLKREG(0x108)
27#define S5P_EPLL_CON S5P_CLKREG(0x110)
28#define S5P_VPLL_CON S5P_CLKREG(0x120)
29
30#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
34#define S5P_CLK_SRC4 S5P_CLKREG(0x210)
35#define S5P_CLK_SRC5 S5P_CLKREG(0x214)
36#define S5P_CLK_SRC6 S5P_CLKREG(0x218)
37
38#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280)
39#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284)
40
41#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
42#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
43#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
44#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
45#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
46#define S5P_CLK_DIV5 S5P_CLKREG(0x314)
47#define S5P_CLK_DIV6 S5P_CLKREG(0x318)
48#define S5P_CLK_DIV7 S5P_CLKREG(0x31C)
49
50#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400)
51#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404)
52#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408)
53
54#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420)
55#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424)
56
57#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440)
58#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444)
59#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460)
60#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464)
61#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468)
62#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C)
63#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470)
64
65#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480)
66#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484)
67#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488)
68#define S5P_CLK_OUT S5P_CLKREG(0x500)
69
70/* CLKSRC0 */
71#define S5P_CLKSRC0_MUX200_MASK (0x1<<16)
72#define S5P_CLKSRC0_MUX166_MASK (0x1<<20)
73#define S5P_CLKSRC0_MUX133_MASK (0x1<<24)
74
75/* CLKDIV0 */
76#define S5P_CLKDIV0_APLL_SHIFT (0)
77#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT)
78#define S5P_CLKDIV0_A2M_SHIFT (4)
79#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT)
80#define S5P_CLKDIV0_HCLK200_SHIFT (8)
81#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT)
82#define S5P_CLKDIV0_PCLK100_SHIFT (12)
83#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT)
84#define S5P_CLKDIV0_HCLK166_SHIFT (16)
85#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT)
86#define S5P_CLKDIV0_PCLK83_SHIFT (20)
87#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT)
88#define S5P_CLKDIV0_HCLK133_SHIFT (24)
89#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT)
90#define S5P_CLKDIV0_PCLK66_SHIFT (28)
91#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
92
93/* Registers related to power management */
94#define S5P_PWR_CFG S5P_CLKREG(0xC000)
95#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004)
96#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008)
97#define S5P_PWR_MODE S5P_CLKREG(0xC00C)
98#define S5P_NORMAL_CFG S5P_CLKREG(0xC010)
99#define S5P_IDLE_CFG S5P_CLKREG(0xC020)
100#define S5P_STOP_CFG S5P_CLKREG(0xC030)
101#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034)
102#define S5P_SLEEP_CFG S5P_CLKREG(0xC040)
103
104#define S5P_OSC_FREQ S5P_CLKREG(0xC100)
105#define S5P_OSC_STABLE S5P_CLKREG(0xC104)
106#define S5P_PWR_STABLE S5P_CLKREG(0xC108)
107#define S5P_MTC_STABLE S5P_CLKREG(0xC110)
108#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114)
109
110#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200)
111#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204)
112
113#define S5P_OTHERS S5P_CLKREG(0xE000)
114#define S5P_OM_STAT S5P_CLKREG(0xE100)
115#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C)
116#define S5P_DAC_CONTROL S5P_CLKREG(0xE810)
117
118#define S5P_INFORM0 S5P_CLKREG(0xF000)
119#define S5P_INFORM1 S5P_CLKREG(0xF004)
120#define S5P_INFORM2 S5P_CLKREG(0xF008)
121#define S5P_INFORM3 S5P_CLKREG(0xF00C)
122#define S5P_INFORM4 S5P_CLKREG(0xF010)
123#define S5P_INFORM5 S5P_CLKREG(0xF014)
124#define S5P_INFORM6 S5P_CLKREG(0xF018)
125#define S5P_INFORM7 S5P_CLKREG(0xF01C)
126
127#define S5P_RST_STAT S5P_CLKREG(0xA000)
128#define S5P_OSC_CON S5P_CLKREG(0x8000)
129#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
130#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
131#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814)
132
133#define S5P_IDLE_CFG_TL_MASK (3 << 30)
134#define S5P_IDLE_CFG_TM_MASK (3 << 28)
135#define S5P_IDLE_CFG_TL_ON (2 << 30)
136#define S5P_IDLE_CFG_TM_ON (2 << 28)
137#define S5P_IDLE_CFG_DIDLE (1 << 0)
138
139#define S5P_CFG_WFI_CLEAN (~(3 << 8))
140#define S5P_CFG_WFI_IDLE (1 << 8)
141#define S5P_CFG_WFI_STOP (2 << 8)
142#define S5P_CFG_WFI_SLEEP (3 << 8)
143
144#define S5P_OTHER_SYS_INT 24
145#define S5P_OTHER_STA_TYPE 23
146#define S5P_OTHER_SYSC_INTOFF (1 << 0)
147#define STA_TYPE_EXPON 0
148#define STA_TYPE_SFR 1
149
150#define S5P_PWR_STA_EXP_SCALE 0
151#define S5P_PWR_STA_CNT 4
152
153#define S5P_PWR_STABLE_COUNT 85500
154
155#define S5P_SLEEP_CFG_OSC_EN (1 << 0)
156#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1)
157
158/* OTHERS Resgister */
159#define S5P_OTHERS_USB_SIG_MASK (1 << 16)
160#define S5P_OTHERS_MIPI_DPHY_EN (1 << 28)
161
162/* MIPI */
163#define S5P_MIPI_DPHY_EN (3)
164
165/* S5P_DAC_CONTROL */
166#define S5P_DAC_ENABLE (1)
167#define S5P_DAC_DISABLE (0)
168
169#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
new file mode 100644
index 000000000000..5c3b104a7c86
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
new file mode 100644
index 000000000000..1ca04d5025b3
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/system.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 /* nothing here yet */
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h
new file mode 100644
index 000000000000..7993b3603ccf
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/tick.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/tick.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5PV210 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h
new file mode 100644
index 000000000000..73dc85496a83
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/timex.h
@@ -0,0 +1,29 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
7 * http://www.samsung.com/
8 *
9 * Based on arch/arm/mach-s5p6442/include/mach/timex.h
10 *
11 * S5PV210 - time parameters
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_TIMEX_H
19#define __ASM_ARCH_TIMEX_H __FILE__
20
21/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
22 * a variable is useless. It seems as long as we make our timers an
23 * exact multiple of HZ, any value that makes a 1->1 correspondence
24 * for the time conversion functions to/from jiffies is acceptable.
25*/
26
27#define CLOCK_TICK_RATE 12000000
28
29#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h
new file mode 100644
index 000000000000..08ff2fda1fb9
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17#include <plat/uncompress.h>
18
19static void arch_detect_cpu(void)
20{
21 /* we do not need to do any cpu detection here at the moment. */
22}
23
24#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
new file mode 100644
index 000000000000..58f515e0747e
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
9 *
10 * S5PV210 vmalloc definition
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__
19
20#define VMALLOC_END (0xE0000000)
21
22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
new file mode 100644
index 000000000000..4865ae2c475a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/init.c
@@ -0,0 +1,44 @@
1/* linux/arch/arm/mach-s5pv210/init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5pv210.h>
19#include <plat/regs-serial.h>
20
21static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
22 [0] = {
23 .name = "pclk",
24 .divisor = 1,
25 .min_baud = 0,
26 .max_baud = 0,
27 },
28};
29
30/* uart registration process */
31void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
32{
33 struct s3c2410_uartcfg *tcfg = cfg;
34 u32 ucnt;
35
36 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
37 if (!tcfg->clocks) {
38 tcfg->clocks = s5pv210_serial_clocks;
39 tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
40 }
41 }
42
43 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
44}
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
new file mode 100644
index 000000000000..ab4869df30c0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -0,0 +1,98 @@
1/* linux/arch/arm/mach-s5pv210/mach-smdkc110.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5pv210.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT,
64 },
65 [3] = {
66 .hwport = 3,
67 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT,
71 },
72};
73
74static struct platform_device *smdkc110_devices[] __initdata = {
75};
76
77static void __init smdkc110_map_io(void)
78{
79 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
80 s3c24xx_init_clocks(24000000);
81 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
82}
83
84static void __init smdkc110_machine_init(void)
85{
86 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
87}
88
89MACHINE_START(SMDKC110, "SMDKC110")
90 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
91 .phys_io = S3C_PA_UART & 0xfff00000,
92 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
93 .boot_params = S5P_PA_SDRAM + 0x100,
94 .init_irq = s5pv210_init_irq,
95 .map_io = smdkc110_map_io,
96 .init_machine = smdkc110_machine_init,
97 .timer = &s3c24xx_timer,
98MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
new file mode 100644
index 000000000000..a27883253204
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -0,0 +1,98 @@
1/* linux/arch/arm/mach-s5pv210/mach-smdkv210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5pv210.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT,
64 },
65 [3] = {
66 .hwport = 3,
67 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT,
71 },
72};
73
74static struct platform_device *smdkv210_devices[] __initdata = {
75};
76
77static void __init smdkv210_map_io(void)
78{
79 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
80 s3c24xx_init_clocks(24000000);
81 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
82}
83
84static void __init smdkv210_machine_init(void)
85{
86 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
87}
88
89MACHINE_START(SMDKV210, "SMDKV210")
90 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
91 .phys_io = S3C_PA_UART & 0xfff00000,
92 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
93 .boot_params = S5P_PA_SDRAM + 0x100,
94 .init_irq = s5pv210_init_irq,
95 .map_io = smdkv210_map_io,
96 .init_machine = smdkv210_machine_init,
97 .timer = &s3c24xx_timer,
98MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index 051ec0f0023c..259cb2c15fff 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -51,6 +51,10 @@ static struct resource sa1111_resources[] = {
51 }, 51 },
52}; 52};
53 53
54static struct sa1111_platform_data sa1111_info = {
55 .irq_base = IRQ_BOARD_END,
56};
57
54static u64 sa1111_dmamask = 0xffffffffUL; 58static u64 sa1111_dmamask = 0xffffffffUL;
55 59
56static struct platform_device sa1111_device = { 60static struct platform_device sa1111_device = {
@@ -59,6 +63,7 @@ static struct platform_device sa1111_device = {
59 .dev = { 63 .dev = {
60 .dma_mask = &sa1111_dmamask, 64 .dma_mask = &sa1111_dmamask,
61 .coherent_dma_mask = 0xffffffff, 65 .coherent_dma_mask = 0xffffffff,
66 .platform_data = &sa1111_info,
62 }, 67 },
63 .num_resources = ARRAY_SIZE(sa1111_resources), 68 .num_resources = ARRAY_SIZE(sa1111_resources),
64 .resource = sa1111_resources, 69 .resource = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 9982c5c28edf..5d5f330c5d94 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -234,6 +234,10 @@ static struct resource locomo_resources[] = {
234 }, 234 },
235}; 235};
236 236
237static struct locomo_platform_data locomo_info = {
238 .irq_base = IRQ_BOARD_START,
239};
240
237struct platform_device collie_locomo_device = { 241struct platform_device collie_locomo_device = {
238 .name = "locomo", 242 .name = "locomo",
239 .id = 0, 243 .id = 0,
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index 71a0b3fdcc8c..52acda7061b7 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -72,13 +72,6 @@
72#define COLLIE_IRQ_GPIO_GA_INT IRQ_GPIO25 72#define COLLIE_IRQ_GPIO_GA_INT IRQ_GPIO25
73#define COLLIE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO26 73#define COLLIE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO26
74 74
75#define COLLIE_LCM_IRQ_GPIO_RTS IRQ_LOCOMO_GPIO0
76#define COLLIE_LCM_IRQ_GPIO_CTS IRQ_LOCOMO_GPIO1
77#define COLLIE_LCM_IRQ_GPIO_DSR IRQ_LOCOMO_GPIO2
78#define COLLIE_LCM_IRQ_GPIO_DTR IRQ_LOCOMO_GPIO3
79#define COLLIE_LCM_IRQ_GPIO_nSD_DETECT IRQ_LOCOMO_GPIO13
80#define COLLIE_LCM_IRQ_GPIO_nSD_WP IRQ_LOCOMO_GPIO14
81
82/* GPIO's on the TC35143AF (Toshiba Analog Frontend) */ 75/* GPIO's on the TC35143AF (Toshiba Analog Frontend) */
83#define COLLIE_TC35143_GPIO_BASE (GPIO_MAX + 13) 76#define COLLIE_TC35143_GPIO_BASE (GPIO_MAX + 13)
84#define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 77#define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h
index ae81f80b0cf9..8c8845b5ae5b 100644
--- a/arch/arm/mach-sa1100/include/mach/irqs.h
+++ b/arch/arm/mach-sa1100/include/mach/irqs.h
@@ -68,93 +68,17 @@
68#define IRQ_BOARD_START 49 68#define IRQ_BOARD_START 49
69#define IRQ_BOARD_END 65 69#define IRQ_BOARD_END 65
70 70
71#define IRQ_SA1111_START (IRQ_BOARD_END)
72#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
73#define IRQ_GPAIN1 (IRQ_BOARD_END + 1)
74#define IRQ_GPAIN2 (IRQ_BOARD_END + 2)
75#define IRQ_GPAIN3 (IRQ_BOARD_END + 3)
76#define IRQ_GPBIN0 (IRQ_BOARD_END + 4)
77#define IRQ_GPBIN1 (IRQ_BOARD_END + 5)
78#define IRQ_GPBIN2 (IRQ_BOARD_END + 6)
79#define IRQ_GPBIN3 (IRQ_BOARD_END + 7)
80#define IRQ_GPBIN4 (IRQ_BOARD_END + 8)
81#define IRQ_GPBIN5 (IRQ_BOARD_END + 9)
82#define IRQ_GPCIN0 (IRQ_BOARD_END + 10)
83#define IRQ_GPCIN1 (IRQ_BOARD_END + 11)
84#define IRQ_GPCIN2 (IRQ_BOARD_END + 12)
85#define IRQ_GPCIN3 (IRQ_BOARD_END + 13)
86#define IRQ_GPCIN4 (IRQ_BOARD_END + 14)
87#define IRQ_GPCIN5 (IRQ_BOARD_END + 15)
88#define IRQ_GPCIN6 (IRQ_BOARD_END + 16)
89#define IRQ_GPCIN7 (IRQ_BOARD_END + 17)
90#define IRQ_MSTXINT (IRQ_BOARD_END + 18)
91#define IRQ_MSRXINT (IRQ_BOARD_END + 19)
92#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20)
93#define IRQ_TPTXINT (IRQ_BOARD_END + 21)
94#define IRQ_TPRXINT (IRQ_BOARD_END + 22)
95#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23)
96#define SSPXMTINT (IRQ_BOARD_END + 24)
97#define SSPRCVINT (IRQ_BOARD_END + 25)
98#define SSPROR (IRQ_BOARD_END + 26)
99#define AUDXMTDMADONEA (IRQ_BOARD_END + 32)
100#define AUDRCVDMADONEA (IRQ_BOARD_END + 33)
101#define AUDXMTDMADONEB (IRQ_BOARD_END + 34)
102#define AUDRCVDMADONEB (IRQ_BOARD_END + 35)
103#define AUDTFSR (IRQ_BOARD_END + 36)
104#define AUDRFSR (IRQ_BOARD_END + 37)
105#define AUDTUR (IRQ_BOARD_END + 38)
106#define AUDROR (IRQ_BOARD_END + 39)
107#define AUDDTS (IRQ_BOARD_END + 40)
108#define AUDRDD (IRQ_BOARD_END + 41)
109#define AUDSTO (IRQ_BOARD_END + 42)
110#define IRQ_USBPWR (IRQ_BOARD_END + 43)
111#define IRQ_HCIM (IRQ_BOARD_END + 44)
112#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45)
113#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46)
114#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47)
115#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48)
116#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49)
117#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50)
118#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51)
119#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52)
120#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53)
121#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54)
122
123#define IRQ_LOCOMO_START (IRQ_BOARD_END)
124#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0)
125#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1)
126#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2)
127#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3)
128#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4)
129#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5)
130#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6)
131#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7)
132#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8)
133#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9)
134#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10)
135#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11)
136#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12)
137#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13)
138#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14)
139#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15)
140#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16)
141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
144#define IRQ_LOCOMO_SPI_REND (IRQ_BOARD_END + 20)
145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
146
147/* 71/*
148 * Figure out the MAX IRQ number. 72 * Figure out the MAX IRQ number.
149 * 73 *
150 * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. 74 * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
151 * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1 75 * If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
152 * Otherwise, we have the standard IRQs only. 76 * Otherwise, we have the standard IRQs only.
153 */ 77 */
154#ifdef CONFIG_SA1111 78#ifdef CONFIG_SA1111
155#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) 79#define NR_IRQS (IRQ_BOARD_END + 55)
156#elif defined(CONFIG_SHARP_LOCOMO) 80#elif defined(CONFIG_SHARPSL_LOCOMO)
157#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 81#define NR_IRQS (IRQ_BOARD_START + 4)
158#else 82#else
159#define NR_IRQS (IRQ_BOARD_START) 83#define NR_IRQS (IRQ_BOARD_START)
160#endif 84#endif
@@ -166,10 +90,3 @@
166#define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0) 90#define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0)
167#define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1) 91#define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1)
168#define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2) 92#define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2)
169
170/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
171#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0)
172#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)
173#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2)
174#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3)
175
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 13ebd2d99bfd..d3ec620618f1 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -208,6 +208,10 @@ static struct resource sa1111_resources[] = {
208 }, 208 },
209}; 209};
210 210
211static struct sa1111_platform_data sa1111_info = {
212 .irq_base = IRQ_BOARD_END,
213};
214
211static u64 sa1111_dmamask = 0xffffffffUL; 215static u64 sa1111_dmamask = 0xffffffffUL;
212 216
213static struct platform_device sa1111_device = { 217static struct platform_device sa1111_device = {
@@ -216,6 +220,7 @@ static struct platform_device sa1111_device = {
216 .dev = { 220 .dev = {
217 .dma_mask = &sa1111_dmamask, 221 .dma_mask = &sa1111_dmamask,
218 .coherent_dma_mask = 0xffffffff, 222 .coherent_dma_mask = 0xffffffff,
223 .platform_data = &sa1111_info,
219 }, 224 },
220 .num_resources = ARRAY_SIZE(sa1111_resources), 225 .num_resources = ARRAY_SIZE(sa1111_resources),
221 .resource = sa1111_resources, 226 .resource = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 506a5e5a9ad5..9b6dee5d16db 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -130,7 +130,7 @@ void jornada_ssp_end(void)
130}; 130};
131EXPORT_SYMBOL(jornada_ssp_end); 131EXPORT_SYMBOL(jornada_ssp_end);
132 132
133static int __init jornada_ssp_probe(struct platform_device *dev) 133static int __devinit jornada_ssp_probe(struct platform_device *dev)
134{ 134{
135 int ret; 135 int ret;
136 136
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 6ccd175bc4cf..0b505d9f22d6 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -241,6 +241,10 @@ static struct resource sa1111_resources[] = {
241 }, 241 },
242}; 242};
243 243
244static struct sa1111_platform_data sa1111_info = {
245 .irq_base = IRQ_BOARD_END,
246};
247
244static u64 sa1111_dmamask = 0xffffffffUL; 248static u64 sa1111_dmamask = 0xffffffffUL;
245 249
246static struct platform_device sa1111_device = { 250static struct platform_device sa1111_device = {
@@ -249,6 +253,7 @@ static struct platform_device sa1111_device = {
249 .dev = { 253 .dev = {
250 .dma_mask = &sa1111_dmamask, 254 .dma_mask = &sa1111_dmamask,
251 .coherent_dma_mask = 0xffffffff, 255 .coherent_dma_mask = 0xffffffff,
256 .platform_data = &sa1111_info,
252 }, 257 },
253 .num_resources = ARRAY_SIZE(sa1111_resources), 258 .num_resources = ARRAY_SIZE(sa1111_resources),
254 .resource = sa1111_resources, 259 .resource = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index b9cbb56d6e9d..74b6e0e570b6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -35,14 +35,12 @@ static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
35static int 35static int
36sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c) 36sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
37{ 37{
38 unsigned long flags, next, oscr; 38 unsigned long next, oscr;
39 39
40 raw_local_irq_save(flags);
41 OIER |= OIER_E0; 40 OIER |= OIER_E0;
42 next = OSCR + delta; 41 next = OSCR + delta;
43 OSMR0 = next; 42 OSMR0 = next;
44 oscr = OSCR; 43 oscr = OSCR;
45 raw_local_irq_restore(flags);
46 44
47 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; 45 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
48} 46}
@@ -50,16 +48,12 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
50static void 48static void
51sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c) 49sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
52{ 50{
53 unsigned long flags;
54
55 switch (mode) { 51 switch (mode) {
56 case CLOCK_EVT_MODE_ONESHOT: 52 case CLOCK_EVT_MODE_ONESHOT:
57 case CLOCK_EVT_MODE_UNUSED: 53 case CLOCK_EVT_MODE_UNUSED:
58 case CLOCK_EVT_MODE_SHUTDOWN: 54 case CLOCK_EVT_MODE_SHUTDOWN:
59 raw_local_irq_save(flags);
60 OIER &= ~OIER_E0; 55 OIER &= ~OIER_E0;
61 OSSR = OSSR_M0; 56 OSSR = OSSR_M0;
62 raw_local_irq_restore(flags);
63 break; 57 break;
64 58
65 case CLOCK_EVT_MODE_RESUME: 59 case CLOCK_EVT_MODE_RESUME:
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
new file mode 100644
index 000000000000..aeceb9b92aeb
--- /dev/null
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -0,0 +1,84 @@
1if ARCH_SHMOBILE
2
3comment "SH-Mobile System Type"
4
5config ARCH_SH7367
6 bool "SH-Mobile G3 (SH7367)"
7 select CPU_V6
8 select HAVE_CLK
9 select COMMON_CLKDEV
10 select GENERIC_TIME
11 select GENERIC_CLOCKEVENTS
12
13config ARCH_SH7377
14 bool "SH-Mobile G4 (SH7377)"
15 select CPU_V7
16 select HAVE_CLK
17 select COMMON_CLKDEV
18 select GENERIC_TIME
19 select GENERIC_CLOCKEVENTS
20
21config ARCH_SH7372
22 bool "SH-Mobile AP4 (SH7372)"
23 select CPU_V7
24 select HAVE_CLK
25 select COMMON_CLKDEV
26 select GENERIC_TIME
27 select GENERIC_CLOCKEVENTS
28
29comment "SH-Mobile Board Type"
30
31config MACH_G3EVM
32 bool "G3EVM board"
33 depends on ARCH_SH7367
34 select ARCH_REQUIRE_GPIOLIB
35
36config MACH_G4EVM
37 bool "G4EVM board"
38 depends on ARCH_SH7377
39 select ARCH_REQUIRE_GPIOLIB
40
41config MACH_AP4EVB
42 bool "AP4EVB board"
43 depends on ARCH_SH7372
44 select ARCH_REQUIRE_GPIOLIB
45
46comment "SH-Mobile System Configuration"
47
48menu "Memory configuration"
49
50config MEMORY_START
51 hex "Physical memory start address"
52 default "0x50000000" if MACH_G3EVM
53 default "0x40000000" if MACH_G4EVM
54 default "0x40000000" if MACH_AP4EVB
55 default "0x00000000"
56 ---help---
57 Tweak this only when porting to a new machine which does not
58 already have a defconfig. Changing it from the known correct
59 value on any of the known systems will only lead to disaster.
60
61config MEMORY_SIZE
62 hex "Physical memory size"
63 default "0x08000000" if MACH_G3EVM
64 default "0x08000000" if MACH_G4EVM
65 default "0x10000000" if MACH_AP4EVB
66 default "0x04000000"
67 help
68 This sets the default memory size assumed by your kernel. It can
69 be overridden as normal by the 'mem=' argument on the kernel command
70 line.
71
72endmenu
73
74menu "Timer and clock configuration"
75
76config SH_TIMER_CMT
77 bool "CMT timer driver"
78 default y
79 help
80 This enables build of the CMT timer driver.
81
82endmenu
83
84endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
new file mode 100644
index 000000000000..6d385d371c33
--- /dev/null
+++ b/arch/arm/mach-shmobile/Makefile
@@ -0,0 +1,22 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Common objects
6obj-y := timer.o console.o
7
8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
10obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7367.o intc-sh7377.o
11obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7367.o intc-sh7372.o
12
13# Pinmux setup
14pfc-$(CONFIG_ARCH_SH7367) := pfc-sh7367.o
15pfc-$(CONFIG_ARCH_SH7377) := pfc-sh7377.o
16pfc-$(CONFIG_ARCH_SH7372) := pfc-sh7372.o
17obj-$(CONFIG_GENERIC_GPIO) += $(pfc-y)
18
19# Board objects
20obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o
21obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o
22obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
new file mode 100644
index 000000000000..1c08ee9de86a
--- /dev/null
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -0,0 +1,9 @@
1__ZRELADDR := $(shell /bin/bash -c 'printf "0x%08x" \
2 $$[$(CONFIG_MEMORY_START) + 0x8000]')
3
4 zreladdr-y := $(__ZRELADDR)
5
6# Unsupported legacy stuff
7#
8#params_phys-y (Instead: Pass atags pointer in r2)
9#initrd_phys-y (Instead: Use compiled-in initramfs)
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
new file mode 100644
index 000000000000..a0463d926447
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -0,0 +1,301 @@
1/*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/io.h>
30#include <linux/smsc911x.h>
31#include <linux/gpio.h>
32#include <linux/input.h>
33#include <linux/input/sh_keysc.h>
34#include <mach/common.h>
35#include <mach/sh7372.h>
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39
40/*
41 * Address Interface BusWidth note
42 * ------------------------------------------------------------------
43 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
44 * 0x0800_0000 user area -
45 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
46 * 0x1400_0000 Ether (LAN9220) 16bit
47 * 0x1600_0000 user area - cannot use with NAND
48 * 0x1800_0000 user area -
49 * 0x1A00_0000 -
50 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
51 */
52
53/*
54 * NOR Flash ROM
55 *
56 * SW1 | SW2 | SW7 | NOR Flash ROM
57 * bit1 | bit1 bit2 | bit1 | Memory allocation
58 * ------+------------+------+------------------
59 * OFF | ON OFF | ON | Area 0
60 * OFF | ON OFF | OFF | Area 4
61 */
62
63/*
64 * NAND Flash ROM
65 *
66 * SW1 | SW2 | SW7 | NAND Flash ROM
67 * bit1 | bit1 bit2 | bit2 | Memory allocation
68 * ------+------------+------+------------------
69 * OFF | ON OFF | ON | FCE 0
70 * OFF | ON OFF | OFF | FCE 1
71 */
72
73/*
74 * SMSC 9220
75 *
76 * SW1 SMSC 9220
77 * -----------------------
78 * ON access disable
79 * OFF access enable
80 */
81
82/*
83 * KEYSC
84 *
85 * SW43 KEYSC
86 * -------------------------
87 * ON enable
88 * OFF disable
89 */
90
91/* MTD */
92static struct mtd_partition nor_flash_partitions[] = {
93 {
94 .name = "loader",
95 .offset = 0x00000000,
96 .size = 512 * 1024,
97 },
98 {
99 .name = "bootenv",
100 .offset = MTDPART_OFS_APPEND,
101 .size = 512 * 1024,
102 },
103 {
104 .name = "kernel_ro",
105 .offset = MTDPART_OFS_APPEND,
106 .size = 8 * 1024 * 1024,
107 .mask_flags = MTD_WRITEABLE,
108 },
109 {
110 .name = "kernel",
111 .offset = MTDPART_OFS_APPEND,
112 .size = 8 * 1024 * 1024,
113 },
114 {
115 .name = "data",
116 .offset = MTDPART_OFS_APPEND,
117 .size = MTDPART_SIZ_FULL,
118 },
119};
120
121static struct physmap_flash_data nor_flash_data = {
122 .width = 2,
123 .parts = nor_flash_partitions,
124 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
125};
126
127static struct resource nor_flash_resources[] = {
128 [0] = {
129 .start = 0x00000000,
130 .end = 0x08000000 - 1,
131 .flags = IORESOURCE_MEM,
132 }
133};
134
135static struct platform_device nor_flash_device = {
136 .name = "physmap-flash",
137 .dev = {
138 .platform_data = &nor_flash_data,
139 },
140 .num_resources = ARRAY_SIZE(nor_flash_resources),
141 .resource = nor_flash_resources,
142};
143
144/* SMSC 9220 */
145static struct resource smc911x_resources[] = {
146 {
147 .start = 0x14000000,
148 .end = 0x16000000 - 1,
149 .flags = IORESOURCE_MEM,
150 }, {
151 .start = 6,
152 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
153 },
154};
155
156static struct smsc911x_platform_config smsc911x_info = {
157 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
158 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
159 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
160};
161
162static struct platform_device smc911x_device = {
163 .name = "smsc911x",
164 .id = -1,
165 .num_resources = ARRAY_SIZE(smc911x_resources),
166 .resource = smc911x_resources,
167 .dev = {
168 .platform_data = &smsc911x_info,
169 },
170};
171
172/* KEYSC (Needs SW43 set to ON) */
173static struct sh_keysc_info keysc_info = {
174 .mode = SH_KEYSC_MODE_1,
175 .scan_timing = 3,
176 .delay = 2500,
177 .keycodes = {
178 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
179 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
180 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
181 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
182 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
183 },
184};
185
186static struct resource keysc_resources[] = {
187 [0] = {
188 .name = "KEYSC",
189 .start = 0xe61b0000,
190 .end = 0xe61b0063,
191 .flags = IORESOURCE_MEM,
192 },
193 [1] = {
194 .start = 79,
195 .flags = IORESOURCE_IRQ,
196 },
197};
198
199static struct platform_device keysc_device = {
200 .name = "sh_keysc",
201 .id = 0, /* "keysc0" clock */
202 .num_resources = ARRAY_SIZE(keysc_resources),
203 .resource = keysc_resources,
204 .dev = {
205 .platform_data = &keysc_info,
206 },
207};
208
209static struct platform_device *ap4evb_devices[] __initdata = {
210 &nor_flash_device,
211 &smc911x_device,
212 &keysc_device,
213};
214
215static struct map_desc ap4evb_io_desc[] __initdata = {
216 /* create a 1:1 entity map for 0xe6xxxxxx
217 * used by CPGA, INTC and PFC.
218 */
219 {
220 .virtual = 0xe6000000,
221 .pfn = __phys_to_pfn(0xe6000000),
222 .length = 256 << 20,
223 .type = MT_DEVICE_NONSHARED
224 },
225};
226
227static void __init ap4evb_map_io(void)
228{
229 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
230
231 /* setup early devices, clocks and console here as well */
232 sh7372_add_early_devices();
233 sh7367_clock_init(); /* use g3 clocks for now */
234 shmobile_setup_console();
235}
236
237static void __init ap4evb_init(void)
238{
239 sh7372_pinmux_init();
240
241 /* enable SCIFA0 */
242 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
243 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
244
245 /* enable SMSC911X */
246 gpio_request(GPIO_FN_CS5A, NULL);
247 gpio_request(GPIO_FN_IRQ6_39, NULL);
248
249 /* enable LED 1 - 4 */
250 gpio_request(GPIO_PORT185, NULL);
251 gpio_request(GPIO_PORT186, NULL);
252 gpio_request(GPIO_PORT187, NULL);
253 gpio_request(GPIO_PORT188, NULL);
254 gpio_direction_output(GPIO_PORT185, 1);
255 gpio_direction_output(GPIO_PORT186, 1);
256 gpio_direction_output(GPIO_PORT187, 1);
257 gpio_direction_output(GPIO_PORT188, 1);
258 gpio_export(GPIO_PORT185, 0);
259 gpio_export(GPIO_PORT186, 0);
260 gpio_export(GPIO_PORT187, 0);
261 gpio_export(GPIO_PORT188, 0);
262
263 /* enable Debug switch (S6) */
264 gpio_request(GPIO_PORT32, NULL);
265 gpio_request(GPIO_PORT33, NULL);
266 gpio_request(GPIO_PORT34, NULL);
267 gpio_request(GPIO_PORT35, NULL);
268 gpio_direction_input(GPIO_PORT32);
269 gpio_direction_input(GPIO_PORT33);
270 gpio_direction_input(GPIO_PORT34);
271 gpio_direction_input(GPIO_PORT35);
272 gpio_export(GPIO_PORT32, 0);
273 gpio_export(GPIO_PORT33, 0);
274 gpio_export(GPIO_PORT34, 0);
275 gpio_export(GPIO_PORT35, 0);
276
277 /* enable KEYSC */
278 gpio_request(GPIO_FN_KEYOUT0, NULL);
279 gpio_request(GPIO_FN_KEYOUT1, NULL);
280 gpio_request(GPIO_FN_KEYOUT2, NULL);
281 gpio_request(GPIO_FN_KEYOUT3, NULL);
282 gpio_request(GPIO_FN_KEYOUT4, NULL);
283 gpio_request(GPIO_FN_KEYIN0_136, NULL);
284 gpio_request(GPIO_FN_KEYIN1_135, NULL);
285 gpio_request(GPIO_FN_KEYIN2_134, NULL);
286 gpio_request(GPIO_FN_KEYIN3_133, NULL);
287 gpio_request(GPIO_FN_KEYIN4, NULL);
288
289 sh7372_add_standard_devices();
290
291 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
292}
293
294MACHINE_START(AP4EVB, "ap4evb")
295 .phys_io = 0xe6000000,
296 .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
297 .map_io = ap4evb_map_io,
298 .init_irq = sh7372_init_irq,
299 .init_machine = ap4evb_init,
300 .timer = &shmobile_timer,
301MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
new file mode 100644
index 000000000000..f36c9a94d326
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -0,0 +1,211 @@
1/*
2 * G3EVM board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/usb/r8a66597.h>
30#include <linux/io.h>
31#include <linux/gpio.h>
32#include <mach/sh7367.h>
33#include <mach/common.h>
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37
38static struct mtd_partition nor_flash_partitions[] = {
39 {
40 .name = "loader",
41 .offset = 0x00000000,
42 .size = 512 * 1024,
43 },
44 {
45 .name = "bootenv",
46 .offset = MTDPART_OFS_APPEND,
47 .size = 512 * 1024,
48 },
49 {
50 .name = "kernel_ro",
51 .offset = MTDPART_OFS_APPEND,
52 .size = 8 * 1024 * 1024,
53 .mask_flags = MTD_WRITEABLE,
54 },
55 {
56 .name = "kernel",
57 .offset = MTDPART_OFS_APPEND,
58 .size = 8 * 1024 * 1024,
59 },
60 {
61 .name = "data",
62 .offset = MTDPART_OFS_APPEND,
63 .size = MTDPART_SIZ_FULL,
64 },
65};
66
67static struct physmap_flash_data nor_flash_data = {
68 .width = 2,
69 .parts = nor_flash_partitions,
70 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
71};
72
73static struct resource nor_flash_resources[] = {
74 [0] = {
75 .start = 0x00000000,
76 .end = 0x08000000 - 1,
77 .flags = IORESOURCE_MEM,
78 }
79};
80
81static struct platform_device nor_flash_device = {
82 .name = "physmap-flash",
83 .dev = {
84 .platform_data = &nor_flash_data,
85 },
86 .num_resources = ARRAY_SIZE(nor_flash_resources),
87 .resource = nor_flash_resources,
88};
89
90/* USBHS */
91void usb_host_port_power(int port, int power)
92{
93 if (!power) /* only power-on supported for now */
94 return;
95
96 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
97 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
98}
99
100static struct r8a66597_platdata usb_host_data = {
101 .on_chip = 1,
102 .port_power = usb_host_port_power,
103};
104
105static struct resource usb_host_resources[] = {
106 [0] = {
107 .name = "USBHS",
108 .start = 0xe6890000,
109 .end = 0xe68900e5,
110 .flags = IORESOURCE_MEM,
111 },
112 [1] = {
113 .start = 65,
114 .flags = IORESOURCE_IRQ,
115 },
116};
117
118static struct platform_device usb_host_device = {
119 .name = "r8a66597_hcd",
120 .id = 0,
121 .dev = {
122 .platform_data = &usb_host_data,
123 .dma_mask = NULL,
124 .coherent_dma_mask = 0xffffffff,
125 },
126 .num_resources = ARRAY_SIZE(usb_host_resources),
127 .resource = usb_host_resources,
128};
129
130static struct platform_device *g3evm_devices[] __initdata = {
131 &nor_flash_device,
132 &usb_host_device,
133};
134
135static struct map_desc g3evm_io_desc[] __initdata = {
136 /* create a 1:1 entity map for 0xe6xxxxxx
137 * used by CPGA, INTC and PFC.
138 */
139 {
140 .virtual = 0xe6000000,
141 .pfn = __phys_to_pfn(0xe6000000),
142 .length = 256 << 20,
143 .type = MT_DEVICE_NONSHARED
144 },
145};
146
147static void __init g3evm_map_io(void)
148{
149 iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
150
151 /* setup early devices, clocks and console here as well */
152 sh7367_add_early_devices();
153 sh7367_clock_init();
154 shmobile_setup_console();
155}
156
157static void __init g3evm_init(void)
158{
159 sh7367_pinmux_init();
160
161 /* Lit DS4 LED */
162 gpio_request(GPIO_PORT22, NULL);
163 gpio_direction_output(GPIO_PORT22, 1);
164 gpio_export(GPIO_PORT22, 0);
165
166 /* Lit DS8 LED */
167 gpio_request(GPIO_PORT23, NULL);
168 gpio_direction_output(GPIO_PORT23, 1);
169 gpio_export(GPIO_PORT23, 0);
170
171 /* Lit DS3 LED */
172 gpio_request(GPIO_PORT24, NULL);
173 gpio_direction_output(GPIO_PORT24, 1);
174 gpio_export(GPIO_PORT24, 0);
175
176 /* SCIFA1 */
177 gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
178 gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
179 gpio_request(GPIO_FN_SCIFA1_CTS, NULL);
180 gpio_request(GPIO_FN_SCIFA1_RTS, NULL);
181
182 /* USBHS */
183 gpio_request(GPIO_FN_VBUS0, NULL);
184 gpio_request(GPIO_FN_PWEN, NULL);
185 gpio_request(GPIO_FN_OVCN, NULL);
186 gpio_request(GPIO_FN_OVCN2, NULL);
187 gpio_request(GPIO_FN_EXTLP, NULL);
188 gpio_request(GPIO_FN_IDIN, NULL);
189
190 /* enable clock in SYMSTPCR2 */
191 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048);
192
193 /* setup USB phy */
194 __raw_writew(0x0300, 0xe605810a); /* USBCR1 */
195 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */
196 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
197 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
198
199 sh7367_add_standard_devices();
200
201 platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
202}
203
204MACHINE_START(G3EVM, "g3evm")
205 .phys_io = 0xe6000000,
206 .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
207 .map_io = g3evm_map_io,
208 .init_irq = sh7367_init_irq,
209 .init_machine = g3evm_init,
210 .timer = &shmobile_timer,
211MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
new file mode 100644
index 000000000000..5acd623f93e7
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -0,0 +1,211 @@
1/*
2 * G4EVM board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/usb/r8a66597.h>
30#include <linux/io.h>
31#include <linux/gpio.h>
32#include <mach/sh7377.h>
33#include <mach/common.h>
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37
38static struct mtd_partition nor_flash_partitions[] = {
39 {
40 .name = "loader",
41 .offset = 0x00000000,
42 .size = 512 * 1024,
43 },
44 {
45 .name = "bootenv",
46 .offset = MTDPART_OFS_APPEND,
47 .size = 512 * 1024,
48 },
49 {
50 .name = "kernel_ro",
51 .offset = MTDPART_OFS_APPEND,
52 .size = 8 * 1024 * 1024,
53 .mask_flags = MTD_WRITEABLE,
54 },
55 {
56 .name = "kernel",
57 .offset = MTDPART_OFS_APPEND,
58 .size = 8 * 1024 * 1024,
59 },
60 {
61 .name = "data",
62 .offset = MTDPART_OFS_APPEND,
63 .size = MTDPART_SIZ_FULL,
64 },
65};
66
67static struct physmap_flash_data nor_flash_data = {
68 .width = 2,
69 .parts = nor_flash_partitions,
70 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
71};
72
73static struct resource nor_flash_resources[] = {
74 [0] = {
75 .start = 0x00000000,
76 .end = 0x08000000 - 1,
77 .flags = IORESOURCE_MEM,
78 }
79};
80
81static struct platform_device nor_flash_device = {
82 .name = "physmap-flash",
83 .dev = {
84 .platform_data = &nor_flash_data,
85 },
86 .num_resources = ARRAY_SIZE(nor_flash_resources),
87 .resource = nor_flash_resources,
88};
89
90/* USBHS */
91void usb_host_port_power(int port, int power)
92{
93 if (!power) /* only power-on supported for now */
94 return;
95
96 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
97 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
98}
99
100static struct r8a66597_platdata usb_host_data = {
101 .on_chip = 1,
102 .port_power = usb_host_port_power,
103};
104
105static struct resource usb_host_resources[] = {
106 [0] = {
107 .name = "USBHS",
108 .start = 0xe6890000,
109 .end = 0xe68900e5,
110 .flags = IORESOURCE_MEM,
111 },
112 [1] = {
113 .start = 65,
114 .end = 65,
115 .flags = IORESOURCE_IRQ,
116 },
117};
118
119static struct platform_device usb_host_device = {
120 .name = "r8a66597_hcd",
121 .id = 0,
122 .dev = {
123 .platform_data = &usb_host_data,
124 .dma_mask = NULL,
125 .coherent_dma_mask = 0xffffffff,
126 },
127 .num_resources = ARRAY_SIZE(usb_host_resources),
128 .resource = usb_host_resources,
129};
130
131static struct platform_device *g4evm_devices[] __initdata = {
132 &nor_flash_device,
133 &usb_host_device,
134};
135
136static struct map_desc g4evm_io_desc[] __initdata = {
137 /* create a 1:1 entity map for 0xe6xxxxxx
138 * used by CPGA, INTC and PFC.
139 */
140 {
141 .virtual = 0xe6000000,
142 .pfn = __phys_to_pfn(0xe6000000),
143 .length = 256 << 20,
144 .type = MT_DEVICE_NONSHARED
145 },
146};
147
148static void __init g4evm_map_io(void)
149{
150 iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
151
152 /* setup early devices, clocks and console here as well */
153 sh7377_add_early_devices();
154 sh7367_clock_init(); /* use g3 clocks for now */
155 shmobile_setup_console();
156}
157
158static void __init g4evm_init(void)
159{
160 sh7377_pinmux_init();
161
162 /* Lit DS14 LED */
163 gpio_request(GPIO_PORT109, NULL);
164 gpio_direction_output(GPIO_PORT109, 1);
165 gpio_export(GPIO_PORT109, 1);
166
167 /* Lit DS15 LED */
168 gpio_request(GPIO_PORT110, NULL);
169 gpio_direction_output(GPIO_PORT110, 1);
170 gpio_export(GPIO_PORT110, 1);
171
172 /* Lit DS16 LED */
173 gpio_request(GPIO_PORT112, NULL);
174 gpio_direction_output(GPIO_PORT112, 1);
175 gpio_export(GPIO_PORT112, 1);
176
177 /* Lit DS17 LED */
178 gpio_request(GPIO_PORT113, NULL);
179 gpio_direction_output(GPIO_PORT113, 1);
180 gpio_export(GPIO_PORT113, 1);
181
182 /* USBHS */
183 gpio_request(GPIO_FN_VBUS_0, NULL);
184 gpio_request(GPIO_FN_PWEN, NULL);
185 gpio_request(GPIO_FN_OVCN, NULL);
186 gpio_request(GPIO_FN_OVCN2, NULL);
187 gpio_request(GPIO_FN_EXTLP, NULL);
188 gpio_request(GPIO_FN_IDIN, NULL);
189
190 /* enable clock in SMSTPCR3 */
191 __raw_writel(__raw_readl(0xe615013c) & ~(1 << 22), 0xe615013c);
192
193 /* setup USB phy */
194 __raw_writew(0x0200, 0xe605810a); /* USBCR1 */
195 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */
196 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
197 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
198
199 sh7377_add_standard_devices();
200
201 platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
202}
203
204MACHINE_START(G4EVM, "g4evm")
205 .phys_io = 0xe6000000,
206 .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
207 .map_io = g4evm_map_io,
208 .init_irq = sh7377_init_irq,
209 .init_machine = g4evm_init,
210 .timer = &shmobile_timer,
211MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
new file mode 100644
index 000000000000..58bd54e1113a
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -0,0 +1,96 @@
1/*
2 * Preliminary clock framework support for sh7367
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/init.h>
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/list.h>
23#include <linux/clk.h>
24
25struct clk {
26 const char *name;
27 unsigned long rate;
28};
29
30#include <asm/clkdev.h>
31
32int __clk_get(struct clk *clk)
33{
34 return 1;
35}
36EXPORT_SYMBOL(__clk_get);
37
38void __clk_put(struct clk *clk)
39{
40}
41EXPORT_SYMBOL(__clk_put);
42
43
44int clk_enable(struct clk *clk)
45{
46 return 0;
47}
48EXPORT_SYMBOL(clk_enable);
49
50void clk_disable(struct clk *clk)
51{
52}
53EXPORT_SYMBOL(clk_disable);
54
55unsigned long clk_get_rate(struct clk *clk)
56{
57 return clk ? clk->rate : 0;
58}
59EXPORT_SYMBOL(clk_get_rate);
60
61/* a static peripheral clock for now - enough to get sh-sci working */
62static struct clk peripheral_clk = {
63 .name = "peripheral_clk",
64 .rate = 48000000,
65};
66
67/* a static rclk for now - enough to get sh_cmt working */
68static struct clk r_clk = {
69 .name = "r_clk",
70 .rate = 32768,
71};
72
73/* a static usb0 for now - enough to get r8a66597 working */
74static struct clk usb0_clk = {
75 .name = "usb0",
76};
77
78static struct clk_lookup lookups[] = {
79 {
80 .clk = &peripheral_clk,
81 }, {
82 .clk = &r_clk,
83 }, {
84 .clk = &usb0_clk,
85 }
86};
87
88void __init sh7367_clock_init(void)
89{
90 int i;
91
92 for (i = 0; i < ARRAY_SIZE(lookups); i++) {
93 lookups[i].con_id = lookups[i].clk->name;
94 clkdev_add(&lookups[i]);
95 }
96}
diff --git a/arch/arm/mach-shmobile/console.c b/arch/arm/mach-shmobile/console.c
new file mode 100644
index 000000000000..9411a5bf4fd6
--- /dev/null
+++ b/arch/arm/mach-shmobile/console.c
@@ -0,0 +1,31 @@
1/*
2 * SH-Mobile Console
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <mach/common.h>
23#include <asm/mach/map.h>
24
25void __init shmobile_setup_console(void)
26{
27 parse_early_param();
28
29 /* Let earlyprintk output early console messages */
30 early_platform_driver_probe("earlyprintk", 1, 1);
31}
diff --git a/arch/arm/mach-shmobile/include/mach/clkdev.h b/arch/arm/mach-shmobile/include/mach/clkdev.h
new file mode 100644
index 000000000000..36d0163a857a
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4int __clk_get(struct clk *clk);
5void __clk_put(struct clk *clk);
6
7#endif /* __ASM_MACH_CLKDEV_H */
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
new file mode 100644
index 000000000000..57903605cc51
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -0,0 +1,23 @@
1#ifndef __ARCH_MACH_COMMON_H
2#define __ARCH_MACH_COMMON_H
3
4extern struct sys_timer shmobile_timer;
5extern void shmobile_setup_console(void);
6
7extern void sh7367_init_irq(void);
8extern void sh7367_add_early_devices(void);
9extern void sh7367_add_standard_devices(void);
10extern void sh7367_clock_init(void);
11extern void sh7367_pinmux_init(void);
12
13extern void sh7377_init_irq(void);
14extern void sh7377_add_early_devices(void);
15extern void sh7377_add_standard_devices(void);
16extern void sh7377_pinmux_init(void);
17
18extern void sh7372_init_irq(void);
19extern void sh7372_add_early_devices(void);
20extern void sh7372_add_standard_devices(void);
21extern void sh7372_pinmux_init(void);
22
23#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/dma.h b/arch/arm/mach-shmobile/include/mach/dma.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/dma.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
new file mode 100644
index 000000000000..a285d13c7416
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -0,0 +1,39 @@
1/*
2 * Copyright (C) 2008 Renesas Solutions Corp.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 */
17#include <mach/hardware.h>
18#include <mach/irqs.h>
19
20 .macro disable_fiq
21 .endm
22
23 .macro get_irqnr_preamble, base, tmp
24 ldr \base, =INTFLGA
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 ldr \irqnr, [\base]
32 cmp \irqnr, #0
33 beq 1000f
34 /* intevt to irq number */
35 lsr \irqnr, \irqnr, #0x5
36 subs \irqnr, \irqnr, #16
37
381000:
39 .endm
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
new file mode 100644
index 000000000000..5bc6bd444d72
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -0,0 +1,48 @@
1/*
2 * Generic GPIO API and pinmux table support
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_ARCH_GPIO_H
11#define __ASM_ARCH_GPIO_H
12
13#include <linux/kernel.h>
14#include <linux/errno.h>
15
16#define ARCH_NR_GPIOS 1024
17#include <linux/sh_pfc.h>
18
19#ifdef CONFIG_GPIOLIB
20
21static inline int gpio_get_value(unsigned gpio)
22{
23 return __gpio_get_value(gpio);
24}
25
26static inline void gpio_set_value(unsigned gpio, int value)
27{
28 __gpio_set_value(gpio, value);
29}
30
31static inline int gpio_cansleep(unsigned gpio)
32{
33 return __gpio_cansleep(gpio);
34}
35
36static inline int gpio_to_irq(unsigned gpio)
37{
38 return -ENOSYS;
39}
40
41static inline int irq_to_gpio(unsigned int irq)
42{
43 return -EINVAL;
44}
45
46#endif /* CONFIG_GPIOLIB */
47
48#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/hardware.h b/arch/arm/mach-shmobile/include/mach/hardware.h
new file mode 100644
index 000000000000..3f0ef194603e
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/hardware.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_HARDWARE_H
2#define __ASM_MACH_HARDWARE_H
3
4/* INTFLGA register - used by low level interrupt code in entry-macro.S */
5#define INTFLGA 0xe6980018
6
7#endif /* __ASM_MACH_HARDWARE_H */
diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h
new file mode 100644
index 000000000000..7339fe46cb7c
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/io.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_MACH_IO_H
2#define __ASM_MACH_IO_H
3
4#define IO_SPACE_LIMIT 0xffffffff
5
6#define __io(a) ((void __iomem *)(a))
7#define __mem_pci(a) (a)
8
9#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
new file mode 100644
index 000000000000..5179b72e1ee3
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_MACH_IRQS_H
2#define __ASM_MACH_IRQS_H
3
4#define NR_IRQS 512
5#define NR_IRQS_LEGACY 8
6
7#define evt2irq(evt) (((evt) >> 5) - 16)
8#define irq2evt(irq) (((irq) + 16) << 5)
9
10#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/memory.h b/arch/arm/mach-shmobile/include/mach/memory.h
new file mode 100644
index 000000000000..e188183f4dce
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/memory.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_MEMORY_H
2#define __ASM_MACH_MEMORY_H
3
4#define PHYS_OFFSET UL(CONFIG_MEMORY_START)
5#define MEM_SIZE UL(CONFIG_MEMORY_SIZE)
6
7#endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7367.h b/arch/arm/mach-shmobile/include/mach/sh7367.h
new file mode 100644
index 000000000000..52d0de686f68
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7367.h
@@ -0,0 +1,332 @@
1#ifndef __ASM_SH7367_H__
2#define __ASM_SH7367_H__
3
4/* Pin Function Controller:
5 * GPIO_FN_xx - GPIO used to select pin function
6 * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
7 */
8enum {
9 /* 49-1 -> 49-6 (GPIO) */
10 GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
11 GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
12
13 GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
14 GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
15
16 GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
17 GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
18
19 GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
20 GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
21
22 GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
23 GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
24
25 GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
26 GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
27
28 GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
29 GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
30
31 GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
32 GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
33
34 GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
35 GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
36
37 GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
38 GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
39
40 GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
41 GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
42
43 GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
44 GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
45
46 GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
47 GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
48
49 GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
50 GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
51
52 GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
53 GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
54
55 GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
56 GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
57
58 GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
59 GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
60
61 GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
62 GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
63
64 GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
65 GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
66
67 GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
68 GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
69
70 GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
71 GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
72
73 GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
74 GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
75
76 GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
77 GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
78
79 GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
80 GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
81
82 GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
83 GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
84
85 GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
86 GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
87
88 GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
89 GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
90
91 GPIO_PORT270, GPIO_PORT271, GPIO_PORT272,
92
93 /* Special Pull-up / Pull-down Functions */
94 GPIO_FN_PORT48_KEYIN0_PU, GPIO_FN_PORT49_KEYIN1_PU,
95 GPIO_FN_PORT50_KEYIN2_PU, GPIO_FN_PORT55_KEYIN3_PU,
96 GPIO_FN_PORT56_KEYIN4_PU, GPIO_FN_PORT57_KEYIN5_PU,
97 GPIO_FN_PORT58_KEYIN6_PU,
98
99 /* 49-1 (FN) */
100 GPIO_FN_VBUS0, GPIO_FN_CPORT0, GPIO_FN_CPORT1, GPIO_FN_CPORT2,
101 GPIO_FN_CPORT3, GPIO_FN_CPORT4, GPIO_FN_CPORT5, GPIO_FN_CPORT6,
102 GPIO_FN_CPORT7, GPIO_FN_CPORT8, GPIO_FN_CPORT9, GPIO_FN_CPORT10,
103 GPIO_FN_CPORT11, GPIO_FN_SIN2, GPIO_FN_CPORT12, GPIO_FN_XCTS2,
104 GPIO_FN_CPORT13, GPIO_FN_RFSPO4, GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
105 GPIO_FN_CPORT15, GPIO_FN_CPORT16, GPIO_FN_CPORT17, GPIO_FN_SOUT2,
106 GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_CPORT19, GPIO_FN_CPORT20,
107 GPIO_FN_RFSPO6, GPIO_FN_CPORT21, GPIO_FN_STATUS0, GPIO_FN_CPORT22,
108 GPIO_FN_STATUS1, GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
109 GPIO_FN_MPORT0, GPIO_FN_MPORT1, GPIO_FN_B_SYNLD1, GPIO_FN_B_SYNLD2,
110 GPIO_FN_XMAINPS, GPIO_FN_XDIVPS, GPIO_FN_XIDRST, GPIO_FN_IDCLK,
111 GPIO_FN_IDIO, GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD,
112 GPIO_FN_M02_BERDAT, GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
113 GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
114 GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
115
116 /* 49-2 (FN) */
117 GPIO_FN_HSU_IQ_AGC6, GPIO_FN_MFG2_IN2, GPIO_FN_MSIOF2_MCK0,
118 GPIO_FN_HSU_IQ_AGC5, GPIO_FN_MFG2_IN1, GPIO_FN_MSIOF2_MCK1,
119 GPIO_FN_HSU_IQ_AGC4, GPIO_FN_MSIOF2_RSYNC,
120 GPIO_FN_HSU_IQ_AGC3, GPIO_FN_MFG2_OUT1, GPIO_FN_MSIOF2_RSCK,
121 GPIO_FN_HSU_IQ_AGC2, GPIO_FN_PORT42_KEYOUT0,
122 GPIO_FN_HSU_IQ_AGC1, GPIO_FN_PORT43_KEYOUT1,
123 GPIO_FN_HSU_IQ_AGC0, GPIO_FN_PORT44_KEYOUT2,
124 GPIO_FN_HSU_IQ_AGC_ST, GPIO_FN_PORT45_KEYOUT3,
125 GPIO_FN_HSU_IQ_PDO, GPIO_FN_PORT46_KEYOUT4,
126 GPIO_FN_HSU_IQ_PYO, GPIO_FN_PORT47_KEYOUT5,
127 GPIO_FN_HSU_EN_TXMUX_G3MO, GPIO_FN_PORT48_KEYIN0,
128 GPIO_FN_HSU_I_TXMUX_G3MO, GPIO_FN_PORT49_KEYIN1,
129 GPIO_FN_HSU_Q_TXMUX_G3MO, GPIO_FN_PORT50_KEYIN2,
130 GPIO_FN_HSU_SYO, GPIO_FN_PORT51_MSIOF2_TSYNC,
131 GPIO_FN_HSU_SDO, GPIO_FN_PORT52_MSIOF2_TSCK,
132 GPIO_FN_HSU_TGTTI_G3MO, GPIO_FN_PORT53_MSIOF2_TXD,
133 GPIO_FN_B_TIME_STAMP, GPIO_FN_PORT54_MSIOF2_RXD,
134 GPIO_FN_HSU_SDI, GPIO_FN_PORT55_KEYIN3,
135 GPIO_FN_HSU_SCO, GPIO_FN_PORT56_KEYIN4,
136 GPIO_FN_HSU_DREQ, GPIO_FN_PORT57_KEYIN5,
137 GPIO_FN_HSU_DACK, GPIO_FN_PORT58_KEYIN6,
138 GPIO_FN_HSU_CLK61M, GPIO_FN_PORT59_MSIOF2_SS1,
139 GPIO_FN_HSU_XRST, GPIO_FN_PORT60_MSIOF2_SS2,
140 GPIO_FN_PCMCLKO, GPIO_FN_SYNC8KO, GPIO_FN_DNPCM_A, GPIO_FN_UPPCM_A,
141 GPIO_FN_XTALB1L,
142 GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
143 GPIO_FN_GPS_AGC2, GPIO_FN_SCIFA0_SCK,
144 GPIO_FN_GPS_AGC3, GPIO_FN_SCIFA0_TXD,
145 GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
146 GPIO_FN_GPS_PWRD, GPIO_FN_SCIFA0_CTS,
147 GPIO_FN_GPS_IM, GPIO_FN_GPS_IS, GPIO_FN_GPS_QM, GPIO_FN_GPS_QS,
148 GPIO_FN_SIUBOMC, GPIO_FN_TPU2TO0,
149 GPIO_FN_SIUCKB, GPIO_FN_TPU2TO1,
150 GPIO_FN_SIUBOLR, GPIO_FN_BBIF2_TSYNC, GPIO_FN_TPU2TO2,
151 GPIO_FN_SIUBOBT, GPIO_FN_BBIF2_TSCK, GPIO_FN_TPU2TO3,
152 GPIO_FN_SIUBOSLD, GPIO_FN_BBIF2_TXD, GPIO_FN_TPU3TO0,
153 GPIO_FN_SIUBILR, GPIO_FN_TPU3TO1,
154 GPIO_FN_SIUBIBT, GPIO_FN_TPU3TO2,
155 GPIO_FN_SIUBISLD, GPIO_FN_TPU3TO3,
156 GPIO_FN_NMI, GPIO_FN_TPU4TO0,
157 GPIO_FN_DNPCM_M, GPIO_FN_TPU4TO1, GPIO_FN_TPU4TO2, GPIO_FN_TPU4TO3,
158 GPIO_FN_IRQ_TMPB,
159 GPIO_FN_PWEN, GPIO_FN_MFG1_OUT1,
160 GPIO_FN_OVCN, GPIO_FN_MFG1_IN1,
161 GPIO_FN_OVCN2, GPIO_FN_MFG1_IN2,
162
163 /* 49-3 (FN) */
164 GPIO_FN_RFSPO1, GPIO_FN_RFSPO2, GPIO_FN_RFSPO3, GPIO_FN_PORT93_VIO_CKO2,
165 GPIO_FN_USBTERM, GPIO_FN_EXTLP, GPIO_FN_IDIN,
166 GPIO_FN_SCIFA5_CTS, GPIO_FN_MFG0_IN1,
167 GPIO_FN_SCIFA5_RTS, GPIO_FN_MFG0_IN2,
168 GPIO_FN_SCIFA5_RXD,
169 GPIO_FN_SCIFA5_TXD,
170 GPIO_FN_SCIFA5_SCK, GPIO_FN_MFG0_OUT1,
171 GPIO_FN_A0_EA0, GPIO_FN_BS,
172 GPIO_FN_A14_EA14, GPIO_FN_PORT102_KEYOUT0,
173 GPIO_FN_A15_EA15, GPIO_FN_PORT103_KEYOUT1, GPIO_FN_DV_CLKOL,
174 GPIO_FN_A16_EA16, GPIO_FN_PORT104_KEYOUT2,
175 GPIO_FN_DV_VSYNCL, GPIO_FN_MSIOF0_SS1,
176 GPIO_FN_A17_EA17, GPIO_FN_PORT105_KEYOUT3,
177 GPIO_FN_DV_HSYNCL, GPIO_FN_MSIOF0_TSYNC,
178 GPIO_FN_A18_EA18, GPIO_FN_PORT106_KEYOUT4,
179 GPIO_FN_DV_DL0, GPIO_FN_MSIOF0_TSCK,
180 GPIO_FN_A19_EA19, GPIO_FN_PORT107_KEYOUT5,
181 GPIO_FN_DV_DL1, GPIO_FN_MSIOF0_TXD,
182 GPIO_FN_A20_EA20, GPIO_FN_PORT108_KEYIN0,
183 GPIO_FN_DV_DL2, GPIO_FN_MSIOF0_RSCK,
184 GPIO_FN_A21_EA21, GPIO_FN_PORT109_KEYIN1,
185 GPIO_FN_DV_DL3, GPIO_FN_MSIOF0_RSYNC,
186 GPIO_FN_A22_EA22, GPIO_FN_PORT110_KEYIN2,
187 GPIO_FN_DV_DL4, GPIO_FN_MSIOF0_MCK0,
188 GPIO_FN_A23_EA23, GPIO_FN_PORT111_KEYIN3,
189 GPIO_FN_DV_DL5, GPIO_FN_MSIOF0_MCK1,
190 GPIO_FN_A24_EA24, GPIO_FN_PORT112_KEYIN4,
191 GPIO_FN_DV_DL6, GPIO_FN_MSIOF0_RXD,
192 GPIO_FN_A25_EA25, GPIO_FN_PORT113_KEYIN5,
193 GPIO_FN_DV_DL7, GPIO_FN_MSIOF0_SS2,
194 GPIO_FN_A26, GPIO_FN_PORT113_KEYIN6, GPIO_FN_DV_CLKIL,
195 GPIO_FN_D0_ED0_NAF0, GPIO_FN_D1_ED1_NAF1, GPIO_FN_D2_ED2_NAF2,
196 GPIO_FN_D3_ED3_NAF3, GPIO_FN_D4_ED4_NAF4, GPIO_FN_D5_ED5_NAF5,
197 GPIO_FN_D6_ED6_NAF6, GPIO_FN_D7_ED7_NAF7, GPIO_FN_D8_ED8_NAF8,
198 GPIO_FN_D9_ED9_NAF9, GPIO_FN_D10_ED10_NAF10, GPIO_FN_D11_ED11_NAF11,
199 GPIO_FN_D12_ED12_NAF12, GPIO_FN_D13_ED13_NAF13,
200 GPIO_FN_D14_ED14_NAF14, GPIO_FN_D15_ED15_NAF15,
201 GPIO_FN_CS4, GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_FCE1,
202 GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_FCE0, GPIO_FN_CS6A,
203 GPIO_FN_DACK0, GPIO_FN_WAIT, GPIO_FN_DREQ0, GPIO_FN_RD_XRD,
204 GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_WE0_XWR0_FWE,
205 GPIO_FN_WE1_XWR1, GPIO_FN_FRB, GPIO_FN_CKO,
206 GPIO_FN_NBRSTOUT, GPIO_FN_NBRST,
207
208 /* 49-4 (FN) */
209 GPIO_FN_RFSPO0, GPIO_FN_PORT146_VIO_CKO2, GPIO_FN_TSTMD,
210 GPIO_FN_VIO_VD, GPIO_FN_VIO_HD,
211 GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
212 GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
213 GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
214 GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
215 GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
216 GPIO_FN_VIO_D15, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
217 GPIO_FN_VIO_CKO,
218 GPIO_FN_MFG3_IN1, GPIO_FN_MFG3_IN2,
219 GPIO_FN_M9_SLCD_A01, GPIO_FN_MFG3_OUT1, GPIO_FN_TPU0TO0,
220 GPIO_FN_M10_SLCD_CK1, GPIO_FN_MFG4_IN1, GPIO_FN_TPU0TO1,
221 GPIO_FN_M11_SLCD_SO1, GPIO_FN_MFG4_IN2, GPIO_FN_TPU0TO2,
222 GPIO_FN_M12_SLCD_CE1, GPIO_FN_MFG4_OUT1, GPIO_FN_TPU0TO3,
223 GPIO_FN_LCDD0, GPIO_FN_PORT175_KEYOUT0, GPIO_FN_DV_D0,
224 GPIO_FN_SIUCKA, GPIO_FN_MFG0_OUT2,
225 GPIO_FN_LCDD1, GPIO_FN_PORT176_KEYOUT1, GPIO_FN_DV_D1,
226 GPIO_FN_SIUAOLR, GPIO_FN_BBIF2_TSYNC1,
227 GPIO_FN_LCDD2, GPIO_FN_PORT177_KEYOUT2, GPIO_FN_DV_D2,
228 GPIO_FN_SIUAOBT, GPIO_FN_BBIF2_TSCK1,
229 GPIO_FN_LCDD3, GPIO_FN_PORT178_KEYOUT3, GPIO_FN_DV_D3,
230 GPIO_FN_SIUAOSLD, GPIO_FN_BBIF2_TXD1,
231 GPIO_FN_LCDD4, GPIO_FN_PORT179_KEYOUT4, GPIO_FN_DV_D4,
232 GPIO_FN_SIUAISPD, GPIO_FN_MFG1_OUT2,
233 GPIO_FN_LCDD5, GPIO_FN_PORT180_KEYOUT5, GPIO_FN_DV_D5,
234 GPIO_FN_SIUAILR, GPIO_FN_MFG2_OUT2,
235 GPIO_FN_LCDD6, GPIO_FN_DV_D6,
236 GPIO_FN_SIUAIBT, GPIO_FN_MFG3_OUT2, GPIO_FN_XWR2,
237 GPIO_FN_LCDD7, GPIO_FN_DV_D7,
238 GPIO_FN_SIUAISLD, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
239 GPIO_FN_LCDD8, GPIO_FN_DV_D8, GPIO_FN_D16, GPIO_FN_ED16,
240 GPIO_FN_LCDD9, GPIO_FN_DV_D9, GPIO_FN_D17, GPIO_FN_ED17,
241 GPIO_FN_LCDD10, GPIO_FN_DV_D10, GPIO_FN_D18, GPIO_FN_ED18,
242 GPIO_FN_LCDD11, GPIO_FN_DV_D11, GPIO_FN_D19, GPIO_FN_ED19,
243 GPIO_FN_LCDD12, GPIO_FN_DV_D12, GPIO_FN_D20, GPIO_FN_ED20,
244 GPIO_FN_LCDD13, GPIO_FN_DV_D13, GPIO_FN_D21, GPIO_FN_ED21,
245 GPIO_FN_LCDD14, GPIO_FN_DV_D14, GPIO_FN_D22, GPIO_FN_ED22,
246 GPIO_FN_LCDD15, GPIO_FN_DV_D15, GPIO_FN_D23, GPIO_FN_ED23,
247 GPIO_FN_LCDD16, GPIO_FN_DV_HSYNC, GPIO_FN_D24, GPIO_FN_ED24,
248 GPIO_FN_LCDD17, GPIO_FN_DV_VSYNC, GPIO_FN_D25, GPIO_FN_ED25,
249 GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_MSIOF0L_TSCK,
250 GPIO_FN_D26, GPIO_FN_ED26,
251 GPIO_FN_LCDD19, GPIO_FN_MSIOF0L_TSYNC,
252 GPIO_FN_D27, GPIO_FN_ED27,
253 GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0,
254 GPIO_FN_D28, GPIO_FN_ED28,
255 GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1,
256 GPIO_FN_D29, GPIO_FN_ED29,
257 GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_SS1,
258 GPIO_FN_D30, GPIO_FN_ED30,
259 GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_SS2,
260 GPIO_FN_D31, GPIO_FN_ED31,
261 GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_DV_CKO, GPIO_FN_SIUAOSPD,
262 GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_RSYNC,
263
264
265 /* 49-5 (FN) */
266 GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
267 GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_RSCK,
268 GPIO_FN_LCDCSYN, GPIO_FN_LCDCSYN2, GPIO_FN_DV_CKI,
269 GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_MSIOF0L_RXD,
270 GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_MSIOF0L_TXD,
271 GPIO_FN_VIO_DR0, GPIO_FN_VIO_DR1, GPIO_FN_VIO_DR2, GPIO_FN_VIO_DR3,
272 GPIO_FN_VIO_DR4, GPIO_FN_VIO_DR5, GPIO_FN_VIO_DR6, GPIO_FN_VIO_DR7,
273 GPIO_FN_VIO_VDR, GPIO_FN_VIO_HDR,
274 GPIO_FN_VIO_CLKR, GPIO_FN_VIO_CKOR,
275 GPIO_FN_SCIFA1_TXD, GPIO_FN_GPS_PGFA0,
276 GPIO_FN_SCIFA1_SCK, GPIO_FN_GPS_PGFA1,
277 GPIO_FN_SCIFA1_RTS, GPIO_FN_GPS_EPPSINMON,
278 GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_CTS,
279 GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA1_TXD2, GPIO_FN_GPS_TXD,
280 GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA1_CTS2, GPIO_FN_I2C_SDA2,
281 GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA1_SCK2,
282 GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA1_RXD2, GPIO_FN_GPS_RXD,
283 GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA1_RTS2,
284 GPIO_FN_MSIOF1_RSYNC, GPIO_FN_I2C_SCL2,
285 GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
286 GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
287 GPIO_FN_MSIOF1_SS2,
288 GPIO_FN_PORT236_IROUT, GPIO_FN_IRDA_OUT,
289 GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
290 GPIO_FN_TPU1TO0, GPIO_FN_TS_SPSYNC3,
291 GPIO_FN_TPU1TO1, GPIO_FN_TS_SDAT3,
292 GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT241_MSIOF2_SS1,
293 GPIO_FN_TPU1TO3, GPIO_FN_PORT242_MSIOF2_TSCK,
294 GPIO_FN_M13_BSW, GPIO_FN_PORT243_MSIOF2_TSYNC,
295 GPIO_FN_M14_GSW, GPIO_FN_PORT244_MSIOF2_TXD,
296 GPIO_FN_PORT245_IROUT, GPIO_FN_M15_RSW,
297 GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1,
298 GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1,
299 GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT248_MSIOF2_SS2,
300 GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT249_MSIOF2_RXD,
301 GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
302 GPIO_FN_SDHICLK0, GPIO_FN_TCK2,
303 GPIO_FN_SDHICD0,
304 GPIO_FN_SDHID0_0, GPIO_FN_TMS2,
305 GPIO_FN_SDHID0_1, GPIO_FN_TDO2,
306 GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
307 GPIO_FN_SDHID0_3, GPIO_FN_RTCK2,
308
309 /* 49-6 (FN) */
310 GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
311 GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
312 GPIO_FN_SDHICLK1, GPIO_FN_TCK3,
313 GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2,
314 GPIO_FN_TS_SPSYNC2, GPIO_FN_TMS3,
315 GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_AO2,
316 GPIO_FN_TS_SDAT2, GPIO_FN_TDO3,
317 GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2,
318 GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
319 GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2,
320 GPIO_FN_TS_SCK2, GPIO_FN_RTCK3,
321 GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
322 GPIO_FN_SDHICLK2, GPIO_FN_SCIFB_SCK,
323 GPIO_FN_SDHID2_0, GPIO_FN_SCIFB_TXD,
324 GPIO_FN_SDHID2_1, GPIO_FN_SCIFB_CTS,
325 GPIO_FN_SDHID2_2, GPIO_FN_SCIFB_RXD,
326 GPIO_FN_SDHID2_3, GPIO_FN_SCIFB_RTS,
327 GPIO_FN_SDHICMD2,
328 GPIO_FN_RESETOUTS,
329 GPIO_FN_DIVLOCK,
330};
331
332#endif /* __ASM_SH7367_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
new file mode 100644
index 000000000000..dc34f00c56b8
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -0,0 +1,434 @@
1/*
2 * Copyright (C) 2010 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef __ASM_SH7372_H__
12#define __ASM_SH7372_H__
13
14/*
15 * Pin Function Controller:
16 * GPIO_FN_xx - GPIO used to select pin function
17 * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
18 */
19enum {
20 /* PORT */
21 GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
22 GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
23
24 GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
25 GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
26
27 GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
28 GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
29
30 GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
31 GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
32
33 GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
34 GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
35
36 GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
37 GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
38
39 GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
40 GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
41
42 GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
43 GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
44
45 GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
46 GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
47
48 GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
49 GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
50
51 GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
52 GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
53
54 GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
55 GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
56
57 GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
58 GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
59
60 GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
61 GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
62
63 GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
64 GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
65
66 GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
67 GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
68
69 GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
70 GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
71
72 GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
73 GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
74
75 GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
76 GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
77
78 GPIO_PORT190,
79
80 /* IRQ */
81 GPIO_FN_IRQ0_6, /* PORT 6 */
82 GPIO_FN_IRQ0_162, /* PORT 162 */
83 GPIO_FN_IRQ1, /* PORT 12 */
84 GPIO_FN_IRQ2_4, /* PORT 4 */
85 GPIO_FN_IRQ2_5, /* PORT 5 */
86 GPIO_FN_IRQ3_8, /* PORT 8 */
87 GPIO_FN_IRQ3_16, /* PORT 16 */
88 GPIO_FN_IRQ4_17, /* PORT 17 */
89 GPIO_FN_IRQ4_163, /* PORT 163 */
90 GPIO_FN_IRQ5, /* PORT 18 */
91 GPIO_FN_IRQ6_39, /* PORT 39 */
92 GPIO_FN_IRQ6_164, /* PORT 164 */
93 GPIO_FN_IRQ7_40, /* PORT 40 */
94 GPIO_FN_IRQ7_167, /* PORT 167 */
95 GPIO_FN_IRQ8_41, /* PORT 41 */
96 GPIO_FN_IRQ8_168, /* PORT 168 */
97 GPIO_FN_IRQ9_42, /* PORT 42 */
98 GPIO_FN_IRQ9_169, /* PORT 169 */
99 GPIO_FN_IRQ10, /* PORT 65 */
100 GPIO_FN_IRQ11, /* PORT 67 */
101 GPIO_FN_IRQ12_80, /* PORT 80 */
102 GPIO_FN_IRQ12_137, /* PORT 137 */
103 GPIO_FN_IRQ13_81, /* PORT 81 */
104 GPIO_FN_IRQ13_145, /* PORT 145 */
105 GPIO_FN_IRQ14_82, /* PORT 82 */
106 GPIO_FN_IRQ14_146, /* PORT 146 */
107 GPIO_FN_IRQ15_83, /* PORT 83 */
108 GPIO_FN_IRQ15_147, /* PORT 147 */
109 GPIO_FN_IRQ16_84, /* PORT 84 */
110 GPIO_FN_IRQ16_170, /* PORT 170 */
111 GPIO_FN_IRQ17, /* PORT 85 */
112 GPIO_FN_IRQ18, /* PORT 86 */
113 GPIO_FN_IRQ19, /* PORT 87 */
114 GPIO_FN_IRQ20, /* PORT 92 */
115 GPIO_FN_IRQ21, /* PORT 93 */
116 GPIO_FN_IRQ22, /* PORT 94 */
117 GPIO_FN_IRQ23, /* PORT 95 */
118 GPIO_FN_IRQ24, /* PORT 112 */
119 GPIO_FN_IRQ25, /* PORT 119 */
120 GPIO_FN_IRQ26_121, /* PORT 121 */
121 GPIO_FN_IRQ26_172, /* PORT 172 */
122 GPIO_FN_IRQ27_122, /* PORT 122 */
123 GPIO_FN_IRQ27_180, /* PORT 180 */
124 GPIO_FN_IRQ28_123, /* PORT 123 */
125 GPIO_FN_IRQ28_181, /* PORT 181 */
126 GPIO_FN_IRQ29_129, /* PORT 129 */
127 GPIO_FN_IRQ29_182, /* PORT 182 */
128 GPIO_FN_IRQ30_130, /* PORT 130 */
129 GPIO_FN_IRQ30_183, /* PORT 183 */
130 GPIO_FN_IRQ31_138, /* PORT 138 */
131 GPIO_FN_IRQ31_184, /* PORT 184 */
132
133 /*
134 * MSIOF0 (PORT 36, 37, 38, 39
135 * 40, 41, 42, 43, 44, 45)
136 */
137 GPIO_FN_MSIOF0_TSYNC, GPIO_FN_MSIOF0_TSCK,
138 GPIO_FN_MSIOF0_RXD, GPIO_FN_MSIOF0_RSCK,
139 GPIO_FN_MSIOF0_RSYNC, GPIO_FN_MSIOF0_MCK0,
140 GPIO_FN_MSIOF0_MCK1, GPIO_FN_MSIOF0_SS1,
141 GPIO_FN_MSIOF0_SS2, GPIO_FN_MSIOF0_TXD,
142
143 /*
144 * MSIOF1 (PORT 39, 40, 41, 42, 43, 44
145 * 84, 85, 86, 87, 88, 89, 90, 91, 92, 93)
146 */
147 GPIO_FN_MSIOF1_TSCK_39, GPIO_FN_MSIOF1_TSYNC_40,
148 GPIO_FN_MSIOF1_TSCK_88, GPIO_FN_MSIOF1_TSYNC_89,
149 GPIO_FN_MSIOF1_TXD_41, GPIO_FN_MSIOF1_RXD_42,
150 GPIO_FN_MSIOF1_TXD_90, GPIO_FN_MSIOF1_RXD_91,
151 GPIO_FN_MSIOF1_SS1_43, GPIO_FN_MSIOF1_SS2_44,
152 GPIO_FN_MSIOF1_SS1_92, GPIO_FN_MSIOF1_SS2_93,
153 GPIO_FN_MSIOF1_RSCK, GPIO_FN_MSIOF1_RSYNC,
154 GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
155
156 /*
157 * MSIOF2 (PORT 134, 135, 136, 137, 138, 139
158 * 148, 149, 150, 151)
159 */
160 GPIO_FN_MSIOF2_RSCK, GPIO_FN_MSIOF2_RSYNC,
161 GPIO_FN_MSIOF2_MCK0, GPIO_FN_MSIOF2_MCK1,
162 GPIO_FN_MSIOF2_SS1, GPIO_FN_MSIOF2_SS2,
163 GPIO_FN_MSIOF2_TSYNC, GPIO_FN_MSIOF2_TSCK,
164 GPIO_FN_MSIOF2_RXD, GPIO_FN_MSIOF2_TXD,
165
166 /* MSIOF3 (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
167 GPIO_FN_BBIF1_RXD, GPIO_FN_BBIF1_TSYNC,
168 GPIO_FN_BBIF1_TSCK, GPIO_FN_BBIF1_TXD,
169 GPIO_FN_BBIF1_RSCK, GPIO_FN_BBIF1_RSYNC,
170 GPIO_FN_BBIF1_FLOW, GPIO_FN_BB_RX_FLOW_N,
171
172 /* MSIOF4 (PORT 0, 1, 2, 3) */
173 GPIO_FN_BBIF2_TSCK1, GPIO_FN_BBIF2_TSYNC1,
174 GPIO_FN_BBIF2_TXD1, GPIO_FN_BBIF2_RXD,
175
176 /* FSI (PORT 4, 5, 6, 7, 8, 9, 10, 11, 15) */
177 GPIO_FN_FSIACK, GPIO_FN_FSIBCK,
178 GPIO_FN_FSIAILR, GPIO_FN_FSIAIBT,
179 GPIO_FN_FSIAISLD, GPIO_FN_FSIAOMC,
180 GPIO_FN_FSIAOLR, GPIO_FN_FSIAOBT,
181 GPIO_FN_FSIAOSLD, GPIO_FN_FSIASPDIF_11,
182 GPIO_FN_FSIASPDIF_15,
183
184 /* FMSI (PORT 12, 13, 14, 15, 16, 17, 18, 65) */
185 GPIO_FN_FMSOCK, GPIO_FN_FMSOOLR,
186 GPIO_FN_FMSIOLR, GPIO_FN_FMSOOBT,
187 GPIO_FN_FMSIOBT, GPIO_FN_FMSOSLD,
188 GPIO_FN_FMSOILR, GPIO_FN_FMSIILR,
189 GPIO_FN_FMSOIBT, GPIO_FN_FMSIIBT,
190 GPIO_FN_FMSISLD, GPIO_FN_FMSICK,
191
192 /* SCIFA0 (PORT 152, 153, 156, 157, 158) */
193 GPIO_FN_SCIFA0_TXD, GPIO_FN_SCIFA0_RXD,
194 GPIO_FN_SCIFA0_SCK, GPIO_FN_SCIFA0_RTS,
195 GPIO_FN_SCIFA0_CTS,
196
197 /* SCIFA1 (PORT 154, 155, 159, 160, 161) */
198 GPIO_FN_SCIFA1_TXD, GPIO_FN_SCIFA1_RXD,
199 GPIO_FN_SCIFA1_SCK, GPIO_FN_SCIFA1_RTS,
200 GPIO_FN_SCIFA1_CTS,
201
202 /* SCIFA2 (PORT 94, 95, 96, 97, 98) */
203 GPIO_FN_SCIFA2_CTS1, GPIO_FN_SCIFA2_RTS1,
204 GPIO_FN_SCIFA2_TXD1, GPIO_FN_SCIFA2_RXD1,
205 GPIO_FN_SCIFA2_SCK1,
206
207 /* SCIFA3 (PORT 43, 44,
208 140, 141, 142, 143, 144) */
209 GPIO_FN_SCIFA3_CTS_43, GPIO_FN_SCIFA3_CTS_140,
210 GPIO_FN_SCIFA3_RTS_44, GPIO_FN_SCIFA3_RTS_141,
211 GPIO_FN_SCIFA3_SCK, GPIO_FN_SCIFA3_TXD,
212 GPIO_FN_SCIFA3_RXD,
213
214 /* SCIFA4 (PORT 5, 6) */
215 GPIO_FN_SCIFA4_RXD, GPIO_FN_SCIFA4_TXD,
216
217 /* SCIFA5 (PORT 8, 12) */
218 GPIO_FN_SCIFA5_RXD, GPIO_FN_SCIFA5_TXD,
219
220 /* SCIFB (PORT 162, 163, 164, 165, 166) */
221 GPIO_FN_SCIFB_SCK, GPIO_FN_SCIFB_RTS,
222 GPIO_FN_SCIFB_CTS, GPIO_FN_SCIFB_TXD,
223 GPIO_FN_SCIFB_RXD,
224
225 /*
226 * CEU (PORT 16, 17,
227 * 100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
228 * 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
229 * 120)
230 */
231 GPIO_FN_VIO_HD, GPIO_FN_VIO_CKO1, GPIO_FN_VIO_CKO2,
232 GPIO_FN_VIO_VD, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
233 GPIO_FN_VIO_CKO,
234 GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
235 GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
236 GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
237 GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
238 GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
239 GPIO_FN_VIO_D15,
240
241 /* USB0 (PORT 113, 114, 115, 116, 117, 167) */
242 GPIO_FN_IDIN_0, GPIO_FN_EXTLP_0,
243 GPIO_FN_OVCN2_0, GPIO_FN_PWEN_0,
244 GPIO_FN_OVCN_0, GPIO_FN_VBUS0_0,
245
246 /* USB1 (PORT 18, 113, 114, 115, 116, 117, 138, 162, 168) */
247 GPIO_FN_IDIN_1_18, GPIO_FN_IDIN_1_113,
248 GPIO_FN_PWEN_1_115, GPIO_FN_PWEN_1_138,
249 GPIO_FN_OVCN_1_114, GPIO_FN_OVCN_1_162,
250 GPIO_FN_EXTLP_1, GPIO_FN_OVCN2_1,
251 GPIO_FN_VBUS0_1,
252
253 /* GPIO (PORT 41, 42, 43, 44) */
254 GPIO_FN_GPI0, GPIO_FN_GPI1, GPIO_FN_GPO0, GPIO_FN_GPO1,
255
256 /*
257 * BSC (PORT 19,
258 * 20, 21, 22, 25, 26, 27, 28, 29,
259 * 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
260 * 40, 41, 42, 43, 44, 45,
261 * 62, 63, 64, 65, 66, 67,
262 * 71, 72, 74, 75)
263 */
264 GPIO_FN_BS, GPIO_FN_WE1,
265 GPIO_FN_CKO, GPIO_FN_WAIT, GPIO_FN_RDWR,
266
267 GPIO_FN_A0, GPIO_FN_A1, GPIO_FN_A2, GPIO_FN_A3,
268 GPIO_FN_A6, GPIO_FN_A7, GPIO_FN_A8, GPIO_FN_A9,
269 GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,
270 GPIO_FN_A14, GPIO_FN_A15, GPIO_FN_A16, GPIO_FN_A17,
271 GPIO_FN_A18, GPIO_FN_A19, GPIO_FN_A20, GPIO_FN_A21,
272 GPIO_FN_A22, GPIO_FN_A23, GPIO_FN_A24, GPIO_FN_A25,
273 GPIO_FN_A26,
274
275 GPIO_FN_CS0, GPIO_FN_CS2, GPIO_FN_CS4,
276 GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_CS6A,
277
278 /*
279 * BSC/FLCTL (PORT 23, 24,
280 * 46, 47, 48, 49,
281 * 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
282 * 60, 61, 69, 70)
283 */
284 GPIO_FN_RD_FSC, GPIO_FN_WE0_FWE,
285 GPIO_FN_A4_FOE, GPIO_FN_A5_FCDE,
286 GPIO_FN_D0_NAF0, GPIO_FN_D1_NAF1, GPIO_FN_D2_NAF2,
287 GPIO_FN_D3_NAF3, GPIO_FN_D4_NAF4, GPIO_FN_D5_NAF5,
288 GPIO_FN_D6_NAF6, GPIO_FN_D7_NAF7, GPIO_FN_D8_NAF8,
289 GPIO_FN_D9_NAF9, GPIO_FN_D10_NAF10, GPIO_FN_D11_NAF11,
290 GPIO_FN_D12_NAF12, GPIO_FN_D13_NAF13, GPIO_FN_D14_NAF14,
291 GPIO_FN_D15_NAF15,
292
293 /*
294 * MMCIF(1) (PORT 84, 85, 86, 87, 88, 89,
295 * 90, 91, 92, 99)
296 */
297 GPIO_FN_MMCD0_0, GPIO_FN_MMCD0_1, GPIO_FN_MMCD0_2,
298 GPIO_FN_MMCD0_3, GPIO_FN_MMCD0_4, GPIO_FN_MMCD0_5,
299 GPIO_FN_MMCD0_6, GPIO_FN_MMCD0_7,
300 GPIO_FN_MMCCMD0, GPIO_FN_MMCCLK0,
301
302 /* MMCIF(2) (PORT 54, 55, 56, 57, 58, 59, 60, 61, 66, 67) */
303 GPIO_FN_MMCD1_0, GPIO_FN_MMCD1_1, GPIO_FN_MMCD1_2,
304 GPIO_FN_MMCD1_3, GPIO_FN_MMCD1_4, GPIO_FN_MMCD1_5,
305 GPIO_FN_MMCD1_6, GPIO_FN_MMCD1_7,
306 GPIO_FN_MMCCLK1, GPIO_FN_MMCCMD1,
307
308 /* SPU2 (PORT 65) */
309 GPIO_FN_VINT_I,
310
311 /* FLCTL (PORT 66, 68, 73) */
312 GPIO_FN_FCE1, GPIO_FN_FCE0, GPIO_FN_FRB,
313
314 /* HSI (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
315 GPIO_FN_GP_RX_FLAG, GPIO_FN_GP_RX_DATA, GPIO_FN_GP_TX_READY,
316 GPIO_FN_GP_RX_WAKE, GPIO_FN_MP_TX_FLAG, GPIO_FN_MP_TX_DATA,
317 GPIO_FN_MP_RX_READY, GPIO_FN_MP_TX_WAKE,
318
319 /*
320 * MFI (PORT 76, 77, 78, 79,
321 * 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
322 * 90, 91, 92, 93, 94, 95, 96, 97, 98, 99)
323 */
324 GPIO_FN_MFIv6, /* see MSEL4CR 6 */
325 GPIO_FN_MFIv4, /* see MSEL4CR 6 */
326
327 GPIO_FN_MEMC_CS0, GPIO_FN_MEMC_BUSCLK_MEMC_A0,
328 GPIO_FN_MEMC_CS1_MEMC_A1, GPIO_FN_MEMC_ADV_MEMC_DREQ0,
329 GPIO_FN_MEMC_WAIT_MEMC_DREQ1, GPIO_FN_MEMC_NOE,
330 GPIO_FN_MEMC_NWE, GPIO_FN_MEMC_INT,
331
332 GPIO_FN_MEMC_AD0, GPIO_FN_MEMC_AD1, GPIO_FN_MEMC_AD2,
333 GPIO_FN_MEMC_AD3, GPIO_FN_MEMC_AD4, GPIO_FN_MEMC_AD5,
334 GPIO_FN_MEMC_AD6, GPIO_FN_MEMC_AD7, GPIO_FN_MEMC_AD8,
335 GPIO_FN_MEMC_AD9, GPIO_FN_MEMC_AD10, GPIO_FN_MEMC_AD11,
336 GPIO_FN_MEMC_AD12, GPIO_FN_MEMC_AD13, GPIO_FN_MEMC_AD14,
337 GPIO_FN_MEMC_AD15,
338
339 /* SIM (PORT 94, 95, 98) */
340 GPIO_FN_SIM_RST, GPIO_FN_SIM_CLK, GPIO_FN_SIM_D,
341
342 /* TPU (PORT 93, 99, 112, 160, 161) */
343 GPIO_FN_TPU0TO0, GPIO_FN_TPU0TO1,
344 GPIO_FN_TPU0TO2_93, GPIO_FN_TPU0TO2_99,
345 GPIO_FN_TPU0TO3,
346
347 /* I2C2 (PORT 110, 111) */
348 GPIO_FN_I2C_SCL2, GPIO_FN_I2C_SDA2,
349
350 /* I2C3(1) (PORT 114, 115) */
351 GPIO_FN_I2C_SCL3, GPIO_FN_I2C_SDA3,
352
353 /* I2C3(2) (PORT 137, 145) */
354 GPIO_FN_I2C_SCL3S, GPIO_FN_I2C_SDA3S,
355
356 /* I2C4(2) (PORT 116, 117) */
357 GPIO_FN_I2C_SCL4, GPIO_FN_I2C_SDA4,
358
359 /* I2C4(2) (PORT 146, 147) */
360 GPIO_FN_I2C_SCL4S, GPIO_FN_I2C_SDA4S,
361
362 /*
363 * KEYSC (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
364 * 130, 131, 132, 133, 134, 135, 136)
365 */
366 GPIO_FN_KEYOUT0, GPIO_FN_KEYIN0_121, GPIO_FN_KEYIN0_136,
367 GPIO_FN_KEYOUT1, GPIO_FN_KEYIN1_122, GPIO_FN_KEYIN1_135,
368 GPIO_FN_KEYOUT2, GPIO_FN_KEYIN2_123, GPIO_FN_KEYIN2_134,
369 GPIO_FN_KEYOUT3, GPIO_FN_KEYIN3_124, GPIO_FN_KEYIN3_133,
370 GPIO_FN_KEYOUT4, GPIO_FN_KEYIN4,
371 GPIO_FN_KEYOUT5, GPIO_FN_KEYIN5,
372 GPIO_FN_KEYOUT6, GPIO_FN_KEYIN6,
373 GPIO_FN_KEYOUT7, GPIO_FN_KEYIN7,
374
375 /*
376 * LCDC (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
377 * 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
378 * 140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
379 * 150, 151)
380 */
381 GPIO_FN_LCDC0_SELECT, /* LCDC 0 */
382 GPIO_FN_LCDC1_SELECT, /* LCDC 1 */
383 GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDVSYN,
384 GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_LCDRD,
385 GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_LCDLCLK,
386 GPIO_FN_LCDDON,
387
388 GPIO_FN_LCDD0, GPIO_FN_LCDD1, GPIO_FN_LCDD2, GPIO_FN_LCDD3,
389 GPIO_FN_LCDD4, GPIO_FN_LCDD5, GPIO_FN_LCDD6, GPIO_FN_LCDD7,
390 GPIO_FN_LCDD8, GPIO_FN_LCDD9, GPIO_FN_LCDD10, GPIO_FN_LCDD11,
391 GPIO_FN_LCDD12, GPIO_FN_LCDD13, GPIO_FN_LCDD14, GPIO_FN_LCDD15,
392 GPIO_FN_LCDD16, GPIO_FN_LCDD17, GPIO_FN_LCDD18, GPIO_FN_LCDD19,
393 GPIO_FN_LCDD20, GPIO_FN_LCDD21, GPIO_FN_LCDD22, GPIO_FN_LCDD23,
394
395 /* IRDA (PORT 139, 140, 141, 142) */
396 GPIO_FN_IRDA_OUT, GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
397 GPIO_FN_IROUT_139, GPIO_FN_IROUT_140,
398
399 /* TSIF1 (PORT 156, 157, 158, 159) */
400 GPIO_FN_TS0_1SELECT, /* TSIF0 - 1 select */
401 GPIO_FN_TS0_2SELECT, /* TSIF0 - 2 select */
402 GPIO_FN_TS1_1SELECT, /* TSIF1 - 1 select */
403 GPIO_FN_TS1_2SELECT, /* TSIF1 - 2 select */
404
405 GPIO_FN_TS_SPSYNC1, GPIO_FN_TS_SDAT1,
406 GPIO_FN_TS_SDEN1, GPIO_FN_TS_SCK1,
407
408 /* TSIF2 (PORT 137, 145, 146, 147) */
409 GPIO_FN_TS_SPSYNC2, GPIO_FN_TS_SDAT2,
410 GPIO_FN_TS_SDEN2, GPIO_FN_TS_SCK2,
411
412 /* HDMI (PORT 169, 170) */
413 GPIO_FN_HDMI_HPD, GPIO_FN_HDMI_CEC,
414
415 /* SDHI0 (PORT 171, 172, 173, 174, 175, 176, 177, 178) */
416 GPIO_FN_SDHICLK0, GPIO_FN_SDHICD0,
417 GPIO_FN_SDHICMD0, GPIO_FN_SDHIWP0,
418 GPIO_FN_SDHID0_0, GPIO_FN_SDHID0_1,
419 GPIO_FN_SDHID0_2, GPIO_FN_SDHID0_3,
420
421 /* SDHI1 (PORT 179, 180, 181, 182, 183, 184) */
422 GPIO_FN_SDHICLK1, GPIO_FN_SDHICMD1, GPIO_FN_SDHID1_0,
423 GPIO_FN_SDHID1_1, GPIO_FN_SDHID1_2, GPIO_FN_SDHID1_3,
424
425 /* SDHI2 (PORT 185, 186, 187, 188, 189, 190) */
426 GPIO_FN_SDHICLK2, GPIO_FN_SDHICMD2, GPIO_FN_SDHID2_0,
427 GPIO_FN_SDHID2_1, GPIO_FN_SDHID2_2, GPIO_FN_SDHID2_3,
428
429 /* SDENC see MSEL4CR 19 */
430 GPIO_FN_SDENC_CPG,
431 GPIO_FN_SDENC_DV_CLKI,
432};
433
434#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7377.h b/arch/arm/mach-shmobile/include/mach/sh7377.h
new file mode 100644
index 000000000000..f580e227dd1c
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7377.h
@@ -0,0 +1,360 @@
1#ifndef __ASM_SH7377_H__
2#define __ASM_SH7377_H__
3
4/* Pin Function Controller:
5 * GPIO_FN_xx - GPIO used to select pin function
6 * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
7 */
8enum {
9 /* 55-1 -> 55-5 (GPIO) */
10 GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
11 GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
12
13 GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
14 GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
15
16 GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
17 GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
18
19 GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
20 GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
21
22 GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
23 GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
24
25 GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
26 GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
27
28 GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
29 GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
30
31 GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
32 GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
33
34 GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
35 GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
36
37 GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
38 GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
39
40 GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
41 GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
42
43 GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
44 GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
45
46 GPIO_PORT128, GPIO_PORT129,
47
48 GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
49 GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
50
51 GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
52 GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
53
54 GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
55 GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
56
57 GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
58
59 GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
60 GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
61
62 GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
63 GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
64
65 GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
66 GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
67
68 GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
69 GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
70
71 GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
72 GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
73
74 GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
75 GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
76
77 GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
78 GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
79
80 GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
81
82 /* Special Pull-up / Pull-down Functions */
83 GPIO_FN_PORT66_KEYIN0_PU, GPIO_FN_PORT67_KEYIN1_PU,
84 GPIO_FN_PORT68_KEYIN2_PU, GPIO_FN_PORT69_KEYIN3_PU,
85 GPIO_FN_PORT70_KEYIN4_PU, GPIO_FN_PORT71_KEYIN5_PU,
86 GPIO_FN_PORT72_KEYIN6_PU,
87
88 /* 55-1 (FN) */
89 GPIO_FN_VBUS_0,
90 GPIO_FN_CPORT0,
91 GPIO_FN_CPORT1,
92 GPIO_FN_CPORT2,
93 GPIO_FN_CPORT3,
94 GPIO_FN_CPORT4,
95 GPIO_FN_CPORT5,
96 GPIO_FN_CPORT6,
97 GPIO_FN_CPORT7,
98 GPIO_FN_CPORT8,
99 GPIO_FN_CPORT9,
100 GPIO_FN_CPORT10,
101 GPIO_FN_CPORT11, GPIO_FN_SIN2,
102 GPIO_FN_CPORT12, GPIO_FN_XCTS2,
103 GPIO_FN_CPORT13, GPIO_FN_RFSPO4,
104 GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
105 GPIO_FN_CPORT15, GPIO_FN_SCIFA0_SCK, GPIO_FN_GPS_AGC2,
106 GPIO_FN_CPORT16, GPIO_FN_SCIFA0_TXD, GPIO_FN_GPS_AGC3,
107 GPIO_FN_CPORT17_IC_OE, GPIO_FN_SOUT2,
108 GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_PORT19_VIO_CKO2,
109 GPIO_FN_CPORT19_MPORT1,
110 GPIO_FN_CPORT20, GPIO_FN_RFSPO6,
111 GPIO_FN_CPORT21, GPIO_FN_STATUS0,
112 GPIO_FN_CPORT22, GPIO_FN_STATUS1,
113 GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
114 GPIO_FN_B_SYNLD1,
115 GPIO_FN_B_SYNLD2, GPIO_FN_SYSENMSK,
116 GPIO_FN_XMAINPS,
117 GPIO_FN_XDIVPS,
118 GPIO_FN_XIDRST,
119 GPIO_FN_IDCLK, GPIO_FN_IC_DP,
120 GPIO_FN_IDIO, GPIO_FN_IC_DM,
121 GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, GPIO_FN_M02_BERDAT,
122 GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
123 GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
124 GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
125 GPIO_FN_PCMCLKO,
126 GPIO_FN_SYNC8KO,
127
128 /* 55-2 (FN) */
129 GPIO_FN_DNPCM_A,
130 GPIO_FN_UPPCM_A,
131 GPIO_FN_VACK,
132 GPIO_FN_XTALB1L,
133 GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
134 GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
135 GPIO_FN_GPS_PWRDOWN, GPIO_FN_SCIFA0_CTS,
136 GPIO_FN_GPS_IM,
137 GPIO_FN_GPS_IS,
138 GPIO_FN_GPS_QM,
139 GPIO_FN_GPS_QS,
140 GPIO_FN_FMSOCK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT,
141 GPIO_FN_FMSOOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_IPORT3,
142 GPIO_FN_FMSIOLR,
143 GPIO_FN_FMSOOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_OPORT1,
144 GPIO_FN_FMSIOBT,
145 GPIO_FN_FMSOSLD, GPIO_FN_BBIF2_TXD2, GPIO_FN_OPORT2,
146 GPIO_FN_FMSOILR, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3,
147 GPIO_FN_OPORT3, GPIO_FN_FMSIILR,
148 GPIO_FN_FMSOIBT, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2,
149 GPIO_FN_FMSIIBT,
150 GPIO_FN_FMSISLD, GPIO_FN_MFG0_OUT1, GPIO_FN_TPU0TO0,
151 GPIO_FN_A0_EA0, GPIO_FN_BS,
152 GPIO_FN_A12_EA12, GPIO_FN_PORT58_VIO_CKOR, GPIO_FN_TPU4TO2,
153 GPIO_FN_A13_EA13, GPIO_FN_PORT59_IROUT, GPIO_FN_MFG0_OUT2,
154 GPIO_FN_TPU0TO1,
155 GPIO_FN_A14_EA14, GPIO_FN_PORT60_KEYOUT5,
156 GPIO_FN_A15_EA15, GPIO_FN_PORT61_KEYOUT4,
157 GPIO_FN_A16_EA16, GPIO_FN_PORT62_KEYOUT3, GPIO_FN_MSIOF0_SS1,
158 GPIO_FN_A17_EA17, GPIO_FN_PORT63_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,
159 GPIO_FN_A18_EA18, GPIO_FN_PORT64_KEYOUT1, GPIO_FN_MSIOF0_TSCK,
160 GPIO_FN_A19_EA19, GPIO_FN_PORT65_KEYOUT0, GPIO_FN_MSIOF0_TXD,
161 GPIO_FN_A20_EA20, GPIO_FN_PORT66_KEYIN0, GPIO_FN_MSIOF0_RSCK,
162 GPIO_FN_A21_EA21, GPIO_FN_PORT67_KEYIN1, GPIO_FN_MSIOF0_RSYNC,
163 GPIO_FN_A22_EA22, GPIO_FN_PORT68_KEYIN2, GPIO_FN_MSIOF0_MCK0,
164 GPIO_FN_A23_EA23, GPIO_FN_PORT69_KEYIN3, GPIO_FN_MSIOF0_MCK1,
165 GPIO_FN_A24_EA24, GPIO_FN_PORT70_KEYIN4, GPIO_FN_MSIOF0_RXD,
166 GPIO_FN_A25_EA25, GPIO_FN_PORT71_KEYIN5, GPIO_FN_MSIOF0_SS2,
167 GPIO_FN_A26, GPIO_FN_PORT72_KEYIN6,
168 GPIO_FN_D0_ED0_NAF0,
169 GPIO_FN_D1_ED1_NAF1,
170 GPIO_FN_D2_ED2_NAF2,
171 GPIO_FN_D3_ED3_NAF3,
172 GPIO_FN_D4_ED4_NAF4,
173 GPIO_FN_D5_ED5_NAF5,
174 GPIO_FN_D6_ED6_NAF6,
175 GPIO_FN_D7_ED7_NAF7,
176 GPIO_FN_D8_ED8_NAF8,
177 GPIO_FN_D9_ED9_NAF9,
178 GPIO_FN_D10_ED10_NAF10,
179 GPIO_FN_D11_ED11_NAF11,
180 GPIO_FN_D12_ED12_NAF12,
181 GPIO_FN_D13_ED13_NAF13,
182 GPIO_FN_D14_ED14_NAF14,
183 GPIO_FN_D15_ED15_NAF15,
184 GPIO_FN_CS4,
185 GPIO_FN_CS5A, GPIO_FN_FMSICK,
186 GPIO_FN_CS5B, GPIO_FN_FCE1,
187
188 /* 55-3 (FN) */
189 GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_CS6A, GPIO_FN_DACK0,
190 GPIO_FN_FCE0,
191 GPIO_FN_WAIT, GPIO_FN_DREQ0,
192 GPIO_FN_RD_XRD,
193 GPIO_FN_WE0_XWR0_FWE,
194 GPIO_FN_WE1_XWR1,
195 GPIO_FN_FRB,
196 GPIO_FN_CKO,
197 GPIO_FN_NBRSTOUT,
198 GPIO_FN_NBRST,
199 GPIO_FN_GPS_EPPSIN,
200 GPIO_FN_LATCHPULSE,
201 GPIO_FN_LTESIGNAL,
202 GPIO_FN_LEGACYSTATE,
203 GPIO_FN_TCKON,
204 GPIO_FN_VIO_VD, GPIO_FN_PORT128_KEYOUT0, GPIO_FN_IPORT0,
205 GPIO_FN_VIO_HD, GPIO_FN_PORT129_KEYOUT1, GPIO_FN_IPORT1,
206 GPIO_FN_VIO_D0, GPIO_FN_PORT130_KEYOUT2, GPIO_FN_PORT130_MSIOF2_RXD,
207 GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT3, GPIO_FN_PORT131_MSIOF2_SS1,
208 GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT4, GPIO_FN_PORT132_MSIOF2_SS2,
209 GPIO_FN_VIO_D3, GPIO_FN_PORT133_KEYOUT5, GPIO_FN_PORT133_MSIOF2_TSYNC,
210 GPIO_FN_VIO_D4, GPIO_FN_PORT134_KEYIN0, GPIO_FN_PORT134_MSIOF2_TXD,
211 GPIO_FN_VIO_D5, GPIO_FN_PORT135_KEYIN1, GPIO_FN_PORT135_MSIOF2_TSCK,
212 GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYIN2,
213 GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYIN3,
214 GPIO_FN_VIO_D8, GPIO_FN_M9_SLCD_A01, GPIO_FN_PORT138_FSIAOMC,
215 GPIO_FN_VIO_D9, GPIO_FN_M10_SLCD_CK1, GPIO_FN_PORT139_FSIAOLR,
216 GPIO_FN_VIO_D10, GPIO_FN_M11_SLCD_SO1, GPIO_FN_TPU0TO2,
217 GPIO_FN_PORT140_FSIAOBT,
218 GPIO_FN_VIO_D11, GPIO_FN_M12_SLCD_CE1, GPIO_FN_TPU0TO3,
219 GPIO_FN_PORT141_FSIAOSLD,
220 GPIO_FN_VIO_D12, GPIO_FN_M13_BSW, GPIO_FN_PORT142_FSIACK,
221 GPIO_FN_VIO_D13, GPIO_FN_M14_GSW, GPIO_FN_PORT143_FSIAILR,
222 GPIO_FN_VIO_D14, GPIO_FN_M15_RSW, GPIO_FN_PORT144_FSIAIBT,
223 GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_FSIAISLD,
224 GPIO_FN_VIO_CLK, GPIO_FN_PORT146_KEYIN4, GPIO_FN_IPORT2,
225 GPIO_FN_VIO_FIELD, GPIO_FN_PORT147_KEYIN5,
226 GPIO_FN_VIO_CKO, GPIO_FN_PORT148_KEYIN6,
227 GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_MFG0_IN1,
228 GPIO_FN_MFG0_IN2,
229 GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
230 GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
231 GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
232 GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,
233 GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,
234 GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT156_MSIOF2_SS2,
235 GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT157_MSIOF2_RXD,
236
237 /* 55-4 (FN) */
238 GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
239 GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,
240 GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, GPIO_FN_SOUT0,
241 GPIO_FN_PORT161_SCIFB_CTS, GPIO_FN_PORT161_SCIFA5_CTS, GPIO_FN_XCTS0,
242 GPIO_FN_MFG3_IN2,
243 GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, GPIO_FN_SIN0,
244 GPIO_FN_MFG3_IN1,
245 GPIO_FN_PORT163_SCIFB_RTS, GPIO_FN_PORT163_SCIFA5_RTS, GPIO_FN_XRTS0,
246 GPIO_FN_MFG3_OUT1,
247 GPIO_FN_TPU3TO0,
248 GPIO_FN_LCDD0, GPIO_FN_PORT192_KEYOUT0, GPIO_FN_EXT_CKI,
249 GPIO_FN_LCDD1, GPIO_FN_PORT193_KEYOUT1, GPIO_FN_PORT193_SCIFA5_CTS,
250 GPIO_FN_BBIF2_TSYNC1,
251 GPIO_FN_LCDD2, GPIO_FN_PORT194_KEYOUT2, GPIO_FN_PORT194_SCIFA5_RTS,
252 GPIO_FN_BBIF2_TSCK1,
253 GPIO_FN_LCDD3, GPIO_FN_PORT195_KEYOUT3, GPIO_FN_PORT195_SCIFA5_RXD,
254 GPIO_FN_BBIF2_TXD1,
255 GPIO_FN_LCDD4, GPIO_FN_PORT196_KEYOUT4, GPIO_FN_PORT196_SCIFA5_TXD,
256 GPIO_FN_LCDD5, GPIO_FN_PORT197_KEYOUT5, GPIO_FN_PORT197_SCIFA5_SCK,
257 GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1,
258 GPIO_FN_LCDD6, GPIO_FN_XWR2,
259 GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
260 GPIO_FN_LCDD8, GPIO_FN_PORT200_KEYIN0, GPIO_FN_VIO_DR0, GPIO_FN_D16,
261 GPIO_FN_ED16,
262 GPIO_FN_LCDD9, GPIO_FN_PORT201_KEYIN1, GPIO_FN_VIO_DR1, GPIO_FN_D17,
263 GPIO_FN_ED17,
264 GPIO_FN_LCDD10, GPIO_FN_PORT202_KEYIN2, GPIO_FN_VIO_DR2, GPIO_FN_D18,
265 GPIO_FN_ED18,
266 GPIO_FN_LCDD11, GPIO_FN_PORT203_KEYIN3, GPIO_FN_VIO_DR3, GPIO_FN_D19,
267 GPIO_FN_ED19,
268 GPIO_FN_LCDD12, GPIO_FN_PORT204_KEYIN4, GPIO_FN_VIO_DR4, GPIO_FN_D20,
269 GPIO_FN_ED20,
270 GPIO_FN_LCDD13, GPIO_FN_PORT205_KEYIN5, GPIO_FN_VIO_DR5, GPIO_FN_D21,
271 GPIO_FN_ED21,
272 GPIO_FN_LCDD14, GPIO_FN_PORT206_KEYIN6, GPIO_FN_VIO_DR6, GPIO_FN_D22,
273 GPIO_FN_ED22,
274 GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_PORT207_KEYOUT0,
275 GPIO_FN_VIO_DR7,
276 GPIO_FN_D23, GPIO_FN_ED23,
277 GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_PORT208_KEYOUT1,
278 GPIO_FN_VIO_VDR,
279 GPIO_FN_D24, GPIO_FN_ED24,
280 GPIO_FN_LCDD17, GPIO_FN_PORT209_KEYOUT2, GPIO_FN_VIO_HDR, GPIO_FN_D25,
281 GPIO_FN_ED25,
282 GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
283 GPIO_FN_ED26,
284 GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, GPIO_FN_ED27,
285 GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
286 GPIO_FN_ED28,
287 GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
288 GPIO_FN_ED29,
289 GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
290 GPIO_FN_ED30,
291 GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
292 GPIO_FN_ED31,
293 GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_PORT216_KEYOUT3,
294 GPIO_FN_VIO_CLKR,
295 GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_TSYNC,
296 GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
297 GPIO_FN_PORT218_VIO_CKOR, GPIO_FN_PORT218_KEYOUT4,
298 GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK,
299 GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, GPIO_FN_PORT220_KEYOUT5,
300 GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD,
301 GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN,
302 GPIO_FN_MSIOF0L_TXD,
303 GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,
304 GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_USBTERM,
305 GPIO_FN_PORT226_VIO_CKO2,
306 GPIO_FN_SCIFA1_RTS, GPIO_FN_IDIN,
307 GPIO_FN_SCIFA1_RXD,
308 GPIO_FN_SCIFA1_CTS, GPIO_FN_MFG1_IN1,
309 GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, GPIO_FN_PORT230_FSIAOMC,
310 GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2, GPIO_FN_PORT231_FSIAOLR,
311 GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, GPIO_FN_PORT232_FSIAOBT,
312 GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, GPIO_FN_GPS_VCOTRIG,
313 GPIO_FN_PORT233_FSIACK,
314 GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2, GPIO_FN_PORT234_FSIAOSLD,
315 GPIO_FN_MSIOF1_RSYNC, GPIO_FN_OPORT0, GPIO_FN_MFG1_IN2,
316 GPIO_FN_PORT235_FSIAILR,
317 GPIO_FN_MSIOF1_MCK0, GPIO_FN_I2C_SDA2, GPIO_FN_PORT236_FSIAIBT,
318 GPIO_FN_MSIOF1_MCK1, GPIO_FN_I2C_SCL2, GPIO_FN_PORT237_FSIAISLD,
319 GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
320
321 /* 55-5 (FN) */
322 GPIO_FN_MSIOF1_SS2,
323 GPIO_FN_SCIFA6_TXD,
324 GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1,
325 GPIO_FN_TPU4TO0,
326 GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,
327 GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,
328 GPIO_FN_PORT244_SCIFA5_CTS, GPIO_FN_MFG2_IN1, GPIO_FN_PORT244_SCIFB_CTS,
329 GPIO_FN_PORT244_MSIOF2_RXD,
330 GPIO_FN_PORT245_SCIFA5_RTS, GPIO_FN_MFG2_IN2, GPIO_FN_PORT245_SCIFB_RTS,
331 GPIO_FN_PORT245_MSIOF2_TXD,
332 GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1,
333 GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,
334 GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2,
335 GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,
336 GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1,
337 GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0,
338 GPIO_FN_PORT248_MSIOF2_TSCK,
339 GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, GPIO_FN_PORT249_MSIOF2_TSYNC,
340 GPIO_FN_SDHICLK0, GPIO_FN_TCK2_SWCLK_MC0,
341 GPIO_FN_SDHICD0,
342 GPIO_FN_SDHID0_0, GPIO_FN_TMS2_SWDIO_MC0,
343 GPIO_FN_SDHID0_1, GPIO_FN_TDO2_SWO0_MC0,
344 GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
345 GPIO_FN_SDHID0_3, GPIO_FN_RTCK2_SWO1_MC0,
346 GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
347 GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
348 GPIO_FN_SDHICLK1, GPIO_FN_TCK3_SWCLK_MC1,
349 GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, GPIO_FN_TS_SPSYNC2,
350 GPIO_FN_TMS3_SWDIO_MC1,
351 GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_A02, GPIO_FN_TS_SDAT2,
352 GPIO_FN_TDO3_SWO0_MC1,
353 GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
354 GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, GPIO_FN_TS_SCK2,
355 GPIO_FN_RTCK3_SWO1_MC1,
356 GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
357 GPIO_FN_RESETOUTS,
358};
359
360#endif /* __ASM_SH7377_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
new file mode 100644
index 000000000000..76a687eeaa22
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -0,0 +1,14 @@
1#ifndef __ASM_ARCH_SYSTEM_H
2#define __ASM_ARCH_SYSTEM_H
3
4static inline void arch_idle(void)
5{
6 cpu_do_idle();
7}
8
9static inline void arch_reset(char mode, const char *cmd)
10{
11 cpu_reset(0);
12}
13
14#endif
diff --git a/arch/arm/mach-shmobile/include/mach/timex.h b/arch/arm/mach-shmobile/include/mach/timex.h
new file mode 100644
index 000000000000..ae0d8d825c23
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/timex.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_MACH_TIMEX_H
2#define __ASM_MACH_TIMEX_H
3
4#define CLOCK_TICK_RATE 1193180 /* unused i8253 PIT value */
5
6#endif /* __ASM_MACH_TIMEX_H */
diff --git a/arch/arm/mach-shmobile/include/mach/uncompress.h b/arch/arm/mach-shmobile/include/mach/uncompress.h
new file mode 100644
index 000000000000..0bd7556b1387
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/uncompress.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_MACH_UNCOMPRESS_H
2#define __ASM_MACH_UNCOMPRESS_H
3
4/*
5 * This does not append a newline
6 */
7static void putc(int c)
8{
9}
10
11static inline void flush(void)
12{
13}
14
15static void arch_decomp_setup(void)
16{
17}
18
19#define arch_decomp_wdog()
20
21#endif /* __ASM_MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
new file mode 100644
index 000000000000..fb3c4f1ab252
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_MACH_VMALLOC_H
2#define __ASM_MACH_VMALLOC_H
3
4#define VMALLOC_END (PAGE_OFFSET + 0x24000000)
5
6#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
new file mode 100644
index 000000000000..6a547b47aabb
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -0,0 +1,270 @@
1/*
2 * sh7367 processor support - INTC hardware block
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/io.h>
24#include <linux/sh_intc.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28enum {
29 UNUSED_INTCA = 0,
30
31 /* interrupt sources INTCA */
32 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
33 IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
34 DIRC,
35 CRYPT1_ERR, CRYPT2_STD,
36 IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
37 ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMRX,
38 ETM11_ACQCMP, ETM11_FULL,
39 MFI_MFIM, MFI_MFIS,
40 BBIF1, BBIF2,
41 USBDMAC_USHDMI,
42 USBHS_USHI0, USBHS_USHI1,
43 CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
44 KEYSC_KEY,
45 SCIFA0, SCIFA1, SCIFA2, SCIFA3,
46 MSIOF2, MSIOF1,
47 SCIFA4, SCIFA5, SCIFB,
48 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
49 SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
50 SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3,
51 MSU_MSU, MSU_MSU2,
52 IREM,
53 SIU,
54 SPU,
55 IRDA,
56 TPU0, TPU1, TPU2, TPU3, TPU4,
57 LCRC,
58 PINT1, PINT2,
59 TTI20,
60 MISTY,
61 DDM,
62 SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
63 RWDT0, RWDT1,
64 DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
65 DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
66 DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
67 DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
68 DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
69 DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
70
71 /* interrupt groups INTCA */
72 DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2,
73 ETM11, ARM11, USBHS, FLCTL, IIC1, SDHI0, SDHI1, SDHI2,
74};
75
76static struct intc_vect intca_vectors[] = {
77 INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
78 INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
79 INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
80 INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
81 INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
82 INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
83 INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
84 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
85 INTC_VECT(DIRC, 0x0560),
86 INTC_VECT(CRYPT1_ERR, 0x05e0),
87 INTC_VECT(CRYPT2_STD, 0x0700),
88 INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
89 INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
90 INTC_VECT(ARM11_IRQPMU, 0x0800), INTC_VECT(ARM11_COMMTX, 0x0840),
91 INTC_VECT(ARM11_COMMRX, 0x0860),
92 INTC_VECT(ETM11_ACQCMP, 0x0880), INTC_VECT(ETM11_FULL, 0x08a0),
93 INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
94 INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
95 INTC_VECT(USBDMAC_USHDMI, 0x0a00),
96 INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
97 INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
98 INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
99 INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
100 INTC_VECT(KEYSC_KEY, 0x0be0),
101 INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
102 INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
103 INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
104 INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
105 INTC_VECT(SCIFB, 0x0d60),
106 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
107 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
108 INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
109 INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
110 INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
111 INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0),
112 INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
113 INTC_VECT(IREM, 0x0f60),
114 INTC_VECT(SIU, 0x0fa0),
115 INTC_VECT(SPU, 0x0fc0),
116 INTC_VECT(IRDA, 0x0480),
117 INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
118 INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
119 INTC_VECT(TPU4, 0x0520),
120 INTC_VECT(LCRC, 0x0540),
121 INTC_VECT(PINT1, 0x1000), INTC_VECT(PINT2, 0x1020),
122 INTC_VECT(TTI20, 0x1100),
123 INTC_VECT(MISTY, 0x1120),
124 INTC_VECT(DDM, 0x1140),
125 INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
126 INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
127 INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
128 INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
129 INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
130 INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
131 INTC_VECT(DMAC_2_DADERR, 0x20c0),
132 INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
133 INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
134 INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
135 INTC_VECT(DMAC2_2_DADERR, 0x21c0),
136 INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
137 INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
138 INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
139 INTC_VECT(DMAC3_2_DADERR, 0x22c0),
140};
141
142static struct intc_group intca_groups[] __initdata = {
143 INTC_GROUP(DMAC_1, DMAC_1_DEI0,
144 DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
145 INTC_GROUP(DMAC_2, DMAC_2_DEI4,
146 DMAC_2_DEI5, DMAC_2_DADERR),
147 INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
148 DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
149 INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
150 DMAC2_2_DEI5, DMAC2_2_DADERR),
151 INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
152 DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
153 INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
154 DMAC3_2_DEI5, DMAC3_2_DADERR),
155 INTC_GROUP(ETM11, ETM11_ACQCMP, ETM11_FULL),
156 INTC_GROUP(ARM11, ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMTX),
157 INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
158 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
159 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
160 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
161 INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
162 SDHI0_SDHI0I2, SDHI0_SDHI0I3),
163 INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
164 SDHI1_SDHI1I2, SDHI1_SDHI1I3),
165 INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
166 SDHI2_SDHI2I2, SDHI2_SDHI2I3),
167};
168
169static struct intc_mask_reg intca_mask_registers[] = {
170 { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
171 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
172 { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
173 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
174 { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
175 { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
176 ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } },
177 { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
178 { CRYPT1_ERR, CRYPT2_STD, DIRC, 0,
179 DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
180 { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
181 { PINT1, PINT2, 0, 0,
182 BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
183 { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
184 { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
185 DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
186 { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
187 { DDM, 0, 0, 0,
188 0, 0, ETM11_FULL, ETM11_ACQCMP } },
189 { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
190 { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
191 SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
192 { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
193 { SCIFB, SCIFA5, SCIFA4, MSIOF1,
194 0, 0, MSIOF2, 0 } },
195 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
196 { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
197 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
198 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
199 { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
200 TTI20, USBDMAC_USHDMI, SPU, SIU } },
201 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
202 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
203 CMT2, USBHS_USHI1, USBHS_USHI0, 0 } },
204 { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
205 { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
206 0, 0, 0, 0 } },
207 { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
208 { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
209 LCRC, MSU_MSU2, IREM, MSU_MSU } },
210 { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
211 { 0, 0, TPU0, TPU1,
212 TPU2, TPU3, TPU4, 0 } },
213 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
214 { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
215 MISTY, CMT3, RWDT1, RWDT0 } },
216};
217
218static struct intc_prio_reg intca_prio_registers[] = {
219 { 0xe6900010, 0, 32, 4, /* INTPRI00A */
220 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
221 { 0xe6900014, 0, 32, 4, /* INTPRI10A */
222 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
223
224 { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
225 { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } },
226 { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD,
227 CMT1_CMT11, ARM11 } },
228 { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINT1, PINT2,
229 CMT1_CMT12, TPU4 } },
230 { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
231 MFI_MFIM, USBHS } },
232 { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
233 0, CMT1_CMT10 } },
234 { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
235 SCIFA2, SCIFA3 } },
236 { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
237 FLCTL, SDHI0 } },
238 { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
239 { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, SIU, TTI20 } },
240 { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IREM, SDHI1 } },
241 { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
242 { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
243 { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, SPU, DDM } },
244 { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
245};
246
247static struct intc_sense_reg intca_sense_registers[] __initdata = {
248 { 0xe6900000, 16, 2, /* ICR1A */
249 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
250 { 0xe6900004, 16, 2, /* ICR2A */
251 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
252};
253
254static struct intc_mask_reg intca_ack_registers[] __initdata = {
255 { 0xe6900020, 0, 8, /* INTREQ00A */
256 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
257 { 0xe6900024, 0, 8, /* INTREQ10A */
258 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
259};
260
261static DECLARE_INTC_DESC_ACK(intca_desc, "sh7367-intca",
262 intca_vectors, intca_groups,
263 intca_mask_registers, intca_prio_registers,
264 intca_sense_registers, intca_ack_registers);
265
266void __init sh7367_init_irq(void)
267{
268 /* INTCA */
269 register_intc_controller(&intca_desc);
270}
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
new file mode 100644
index 000000000000..c57a923f97a6
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -0,0 +1,369 @@
1/*
2 * sh7372 processor support - INTC hardware block
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/io.h>
24#include <linux/sh_intc.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28enum {
29 UNUSED_INTCA = 0,
30
31 /* interrupt sources INTCA */
32 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
33 IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
34 IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A,
35 IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A,
36 DIRC,
37 CRYPT_STD,
38 IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
39 AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
40 MFI_MFIM, MFI_MFIS,
41 BBIF1, BBIF2,
42 USBHSDMAC0_USHDMI,
43 _3DG_SGX540,
44 CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
45 KEYSC_KEY,
46 SCIFA0, SCIFA1, SCIFA2, SCIFA3,
47 MSIOF2, MSIOF1,
48 SCIFA4, SCIFA5, SCIFB,
49 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
50 SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
51 SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2,
52 IRREM,
53 IRDA,
54 TPU0,
55 TTI20,
56 DDM,
57 SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
58 RWDT0,
59 DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
60 DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
61 DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
62 DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
63 DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
64 DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
65 SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
66 HDMI,
67 SPU2_SPU0, SPU2_SPU1,
68 FSI, FMSI,
69 MIPI_HSI,
70 IPMMU_IPMMUD,
71 CEC_1, CEC_2,
72 AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
73 MFIS2,
74 CPORTR2S,
75 CMT14, CMT15,
76 MMC_MMC_ERR, MMC_MMC_NOR,
77 IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
78 IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3,
79 USB0_USB0I1, USB0_USB0I0,
80 USB1_USB1I1, USB1_USB1I0,
81 USBHSDMAC1_USHDMI,
82
83 /* interrupt groups INTCA */
84 DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
85 AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2
86};
87
88static struct intc_vect intca_vectors[] __initdata = {
89 INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
90 INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
91 INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
92 INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
93 INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
94 INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
95 INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
96 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
97 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
98 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
99 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0),
100 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
101 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
102 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
103 INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0),
104 INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0),
105 INTC_VECT(DIRC, 0x0560),
106 INTC_VECT(CRYPT_STD, 0x0700),
107 INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
108 INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
109 INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
110 INTC_VECT(AP_ARM_COMMRX, 0x0860),
111 INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
112 INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
113 INTC_VECT(USBHSDMAC0_USHDMI, 0x0a00),
114 INTC_VECT(_3DG_SGX540, 0x0a60),
115 INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
116 INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
117 INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
118 INTC_VECT(KEYSC_KEY, 0x0be0),
119 INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
120 INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
121 INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
122 INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
123 INTC_VECT(SCIFB, 0x0d60),
124 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
125 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
126 INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
127 INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
128 INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
129 INTC_VECT(SDHI1_SDHI1I2, 0x0ec0),
130 INTC_VECT(IRREM, 0x0f60),
131 INTC_VECT(IRDA, 0x0480),
132 INTC_VECT(TPU0, 0x04a0),
133 INTC_VECT(TTI20, 0x1100),
134 INTC_VECT(DDM, 0x1140),
135 INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
136 INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
137 INTC_VECT(RWDT0, 0x1280),
138 INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
139 INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
140 INTC_VECT(DMAC1_2_DEI4, 0x2080), INTC_VECT(DMAC1_2_DEI5, 0x20a0),
141 INTC_VECT(DMAC1_2_DADERR, 0x20c0),
142 INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
143 INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
144 INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
145 INTC_VECT(DMAC2_2_DADERR, 0x21c0),
146 INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
147 INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
148 INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
149 INTC_VECT(DMAC3_2_DADERR, 0x22c0),
150 INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1320),
151 INTC_VECT(SHWYSTAT_COM, 0x1340),
152 INTC_VECT(HDMI, 0x17e0),
153 INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
154 INTC_VECT(FSI, 0x1840),
155 INTC_VECT(FMSI, 0x1860),
156 INTC_VECT(MIPI_HSI, 0x18e0),
157 INTC_VECT(IPMMU_IPMMUD, 0x1920),
158 INTC_VECT(CEC_1, 0x1940), INTC_VECT(CEC_2, 0x1960),
159 INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
160 INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
161 INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
162 INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
163 INTC_VECT(MFIS2, 0x1a00),
164 INTC_VECT(CPORTR2S, 0x1a20),
165 INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
166 INTC_VECT(MMC_MMC_ERR, 0x1ac0), INTC_VECT(MMC_MMC_NOR, 0x1ae0),
167 INTC_VECT(IIC4_ALI4, 0x1b00), INTC_VECT(IIC4_TACKI4, 0x1b20),
168 INTC_VECT(IIC4_WAITI4, 0x1b40), INTC_VECT(IIC4_DTEI4, 0x1b60),
169 INTC_VECT(IIC3_ALI3, 0x1b80), INTC_VECT(IIC3_TACKI3, 0x1ba0),
170 INTC_VECT(IIC3_WAITI3, 0x1bc0), INTC_VECT(IIC3_DTEI3, 0x1be0),
171 INTC_VECT(USB0_USB0I1, 0x1c80), INTC_VECT(USB0_USB0I0, 0x1ca0),
172 INTC_VECT(USB1_USB1I1, 0x1cc0), INTC_VECT(USB1_USB1I0, 0x1ce0),
173 INTC_VECT(USBHSDMAC1_USHDMI, 0x1d00),
174};
175
176static struct intc_group intca_groups[] __initdata = {
177 INTC_GROUP(DMAC1_1, DMAC1_1_DEI0,
178 DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3),
179 INTC_GROUP(DMAC1_2, DMAC1_2_DEI4,
180 DMAC1_2_DEI5, DMAC1_2_DADERR),
181 INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
182 DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
183 INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
184 DMAC2_2_DEI5, DMAC2_2_DADERR),
185 INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
186 DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
187 INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
188 DMAC3_2_DEI5, DMAC3_2_DADERR),
189 INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX),
190 INTC_GROUP(AP_ARM2, AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
191 AP_ARM_DMAIRQ, AP_ARM_DMASIRQ),
192 INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
193 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
194 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
195 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
196 INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
197 SDHI0_SDHI0I2, SDHI0_SDHI0I3),
198 INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
199 SDHI1_SDHI1I2),
200 INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
201 SDHI2_SDHI2I2, SDHI2_SDHI2I3),
202 INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
203};
204
205static struct intc_mask_reg intca_mask_registers[] __initdata = {
206 { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
207 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
208 { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
209 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
210 { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */
211 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
212 { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */
213 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
214
215 { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
216 { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
217 AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
218 { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
219 { 0, CRYPT_STD, DIRC, 0,
220 DMAC1_1_DEI3, DMAC1_1_DEI2, DMAC1_1_DEI1, DMAC1_1_DEI0 } },
221 { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
222 { 0, 0, 0, 0,
223 BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
224 { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
225 { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
226 DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
227 { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
228 { DDM, 0, 0, 0,
229 0, 0, 0, 0 } },
230 { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
231 { KEYSC_KEY, DMAC1_2_DADERR, DMAC1_2_DEI5, DMAC1_2_DEI4,
232 SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
233 { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
234 { SCIFB, SCIFA5, SCIFA4, MSIOF1,
235 0, 0, MSIOF2, 0 } },
236 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
237 { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
238 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
239 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
240 { 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
241 TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
242 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
243 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
244 CMT2, 0, 0, _3DG_SGX540 } },
245 { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
246 { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
247 0, 0, 0, 0 } },
248 { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
249 { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
250 0, 0, IRREM, 0 } },
251 { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
252 { 0, 0, TPU0, 0,
253 0, 0, 0, 0 } },
254 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
255 { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
256 0, CMT3, 0, RWDT0 } },
257 { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
258 { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
259 0, 0, 0, 0 } },
260 { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
261 { 0, 0, 0, 0,
262 0, 0, 0, HDMI } },
263 { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
264 { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
265 0, 0, 0, MIPI_HSI } },
266 { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
267 { 0, IPMMU_IPMMUD, CEC_1, CEC_2,
268 AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
269 AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
270 { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
271 { MFIS2, CPORTR2S, CMT14, CMT15,
272 0, 0, MMC_MMC_ERR, MMC_MMC_NOR } },
273 { 0xe69500a0, 0xe69500e0, 8, /* IMR8A3 / IMCR8A3 */
274 { IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
275 IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3 } },
276 { 0xe69500a4, 0xe69500e4, 8, /* IMR9A3 / IMCR9A3 */
277 { 0, 0, 0, 0,
278 USB0_USB0I1, USB0_USB0I0, USB1_USB1I1, USB1_USB1I0 } },
279 { 0xe69500a8, 0xe69500e8, 8, /* IMR10A3 / IMCR10A3 */
280 { USBHSDMAC1_USHDMI, 0, 0, 0,
281 0, 0, 0, 0 } },
282};
283
284static struct intc_prio_reg intca_prio_registers[] __initdata = {
285 { 0xe6900010, 0, 32, 4, /* INTPRI00A */
286 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
287 { 0xe6900014, 0, 32, 4, /* INTPRI10A */
288 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
289 { 0xe6900018, 0, 32, 4, /* INTPRI20A */
290 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
291 { 0xe690001c, 0, 32, 4, /* INTPRI30A */
292 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
293
294 { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } },
295 { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
296 { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD,
297 CMT1_CMT11, AP_ARM1 } },
298 { 0xe694000c, 0, 16, 4, /* IPRDA */ { 0, 0,
299 CMT1_CMT12, 0 } },
300 { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC1_1, MFI_MFIS,
301 MFI_MFIM, 0 } },
302 { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC1_2,
303 _3DG_SGX540, CMT1_CMT10 } },
304 { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
305 SCIFA2, SCIFA3 } },
306 { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBHSDMAC0_USHDMI,
307 FLCTL, SDHI0 } },
308 { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4,
309 0/* MSU */, IIC1 } },
310 { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2,
311 0/* MSUG */, TTI20 } },
312 { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
313 { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, 0, 0, 0 } },
314 { 0xe6940030, 0, 16, 4, /* IPRMA */ { 0, CMT3, 0, RWDT0 } },
315 { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
316 { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
317 { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
318 { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { 0, 0, 0, HDMI } },
319 { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
320 { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, 0, 0, MIPI_HSI } },
321 { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUD, 0,
322 CEC_1, CEC_2 } },
323 { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
324 { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
325 CMT14, CMT15 } },
326 { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
327 MMC_MMC_ERR, MMC_MMC_NOR } },
328 { 0xe6940040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
329 IIC4_WAITI4, IIC4_DTEI4 } },
330 { 0xe6940044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
331 IIC3_WAITI3, IIC3_DTEI3 } },
332 { 0xe6940048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
333 0/*TXI*/, 0/*TEI*/} },
334 { 0xe694004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
335 USB1_USB1I1, USB1_USB1I0 } },
336 { 0xe6940050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
337};
338
339static struct intc_sense_reg intca_sense_registers[] __initdata = {
340 { 0xe6900000, 32, 4, /* ICR1A */
341 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
342 { 0xe6900004, 32, 4, /* ICR2A */
343 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
344 { 0xe6900008, 32, 4, /* ICR3A */
345 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
346 { 0xe690000c, 32, 4, /* ICR4A */
347 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
348};
349
350static struct intc_mask_reg intca_ack_registers[] __initdata = {
351 { 0xe6900020, 0, 8, /* INTREQ00A */
352 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
353 { 0xe6900024, 0, 8, /* INTREQ10A */
354 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
355 { 0xe6900028, 0, 8, /* INTREQ20A */
356 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
357 { 0xe690002c, 0, 8, /* INTREQ30A */
358 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
359};
360
361static DECLARE_INTC_DESC_ACK(intca_desc, "sh7372-intca",
362 intca_vectors, intca_groups,
363 intca_mask_registers, intca_prio_registers,
364 intca_sense_registers, intca_ack_registers);
365
366void __init sh7372_init_irq(void)
367{
368 register_intc_controller(&intca_desc);
369}
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
new file mode 100644
index 000000000000..125021cfba5c
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -0,0 +1,350 @@
1/*
2 * sh7377 processor support - INTC hardware block
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/io.h>
24#include <linux/sh_intc.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28enum {
29 UNUSED_INTCA = 0,
30
31 /* interrupt sources INTCA */
32 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
33 IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
34 IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A,
35 IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A,
36 DIRC,
37 _2DG,
38 CRYPT_STD,
39 IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
40 AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
41 MFI_MFIM, MFI_MFIS,
42 BBIF1, BBIF2,
43 USBDMAC_USHDMI,
44 USBHS_USHI0, USBHS_USHI1,
45 _3DG_SGX540,
46 CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
47 KEYSC_KEY,
48 SCIFA0, SCIFA1, SCIFA2, SCIFA3,
49 MSIOF2, MSIOF1,
50 SCIFA4, SCIFA5, SCIFB,
51 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
52 SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
53 SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3,
54 MSU_MSU, MSU_MSU2,
55 IRREM,
56 MSUG,
57 IRDA,
58 TPU0, TPU1, TPU2, TPU3, TPU4,
59 LCRC,
60 PINTCA_PINT1, PINTCA_PINT2,
61 TTI20,
62 MISTY,
63 DDM,
64 RWDT0, RWDT1,
65 DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
66 DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
67 DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
68 DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
69 DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
70 DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
71 SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
72 ICUSB_ICUSB0, ICUSB_ICUSB1,
73 ICUDMC_ICUDMC1, ICUDMC_ICUDMC2,
74 SPU2_SPU0, SPU2_SPU1,
75 FSI,
76 FMSI,
77 SCUV,
78 IPMMU_IPMMUB,
79 AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
80 MFIS2,
81 CPORTR2S,
82 CMT14, CMT15,
83 SCIFA6,
84
85 /* interrupt groups INTCA */
86 DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
87 AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, SDHI0, SDHI1,
88 ICUSB, ICUDMC
89};
90
91static struct intc_vect intca_vectors[] = {
92 INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
93 INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
94 INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
95 INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
96 INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
97 INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
98 INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
99 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
100 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
101 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
102 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0),
103 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
104 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
105 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
106 INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0),
107 INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0),
108 INTC_VECT(DIRC, 0x0560),
109 INTC_VECT(_2DG, 0x05e0),
110 INTC_VECT(CRYPT_STD, 0x0700),
111 INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
112 INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
113 INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
114 INTC_VECT(AP_ARM_COMMRX, 0x0860),
115 INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
116 INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
117 INTC_VECT(USBDMAC_USHDMI, 0x0a00),
118 INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
119 INTC_VECT(_3DG_SGX540, 0x0a60),
120 INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
121 INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
122 INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
123 INTC_VECT(KEYSC_KEY, 0x0be0),
124 INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
125 INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
126 INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
127 INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
128 INTC_VECT(SCIFB, 0x0d60),
129 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
130 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
131 INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
132 INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
133 INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
134 INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0),
135 INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
136 INTC_VECT(IRREM, 0x0f60),
137 INTC_VECT(MSUG, 0x0fa0),
138 INTC_VECT(IRDA, 0x0480),
139 INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
140 INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
141 INTC_VECT(TPU4, 0x0520),
142 INTC_VECT(LCRC, 0x0540),
143 INTC_VECT(PINTCA_PINT1, 0x1000), INTC_VECT(PINTCA_PINT2, 0x1020),
144 INTC_VECT(TTI20, 0x1100),
145 INTC_VECT(MISTY, 0x1120),
146 INTC_VECT(DDM, 0x1140),
147 INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
148 INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
149 INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
150 INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
151 INTC_VECT(DMAC_2_DADERR, 0x20c0),
152 INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
153 INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
154 INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
155 INTC_VECT(DMAC2_2_DADERR, 0x21c0),
156 INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
157 INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
158 INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
159 INTC_VECT(DMAC3_2_DADERR, 0x22c0),
160 INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1d20),
161 INTC_VECT(SHWYSTAT_COM, 0x1340),
162 INTC_VECT(ICUSB_ICUSB0, 0x1700), INTC_VECT(ICUSB_ICUSB1, 0x1720),
163 INTC_VECT(ICUDMC_ICUDMC1, 0x1780), INTC_VECT(ICUDMC_ICUDMC2, 0x17a0),
164 INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
165 INTC_VECT(FSI, 0x1840),
166 INTC_VECT(FMSI, 0x1860),
167 INTC_VECT(SCUV, 0x1880),
168 INTC_VECT(IPMMU_IPMMUB, 0x1900),
169 INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
170 INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
171 INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
172 INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
173 INTC_VECT(MFIS2, 0x1a00),
174 INTC_VECT(CPORTR2S, 0x1a20),
175 INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
176 INTC_VECT(SCIFA6, 0x1a80),
177};
178
179static struct intc_group intca_groups[] __initdata = {
180 INTC_GROUP(DMAC_1, DMAC_1_DEI0,
181 DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
182 INTC_GROUP(DMAC_2, DMAC_2_DEI4,
183 DMAC_2_DEI5, DMAC_2_DADERR),
184 INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
185 DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
186 INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
187 DMAC2_2_DEI5, DMAC2_2_DADERR),
188 INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
189 DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
190 INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
191 DMAC3_2_DEI5, DMAC3_2_DADERR),
192 INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMTX),
193 INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
194 INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
195 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
196 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
197 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
198 INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
199 SDHI0_SDHI0I2, SDHI0_SDHI0I3),
200 INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
201 SDHI1_SDHI1I2, SDHI1_SDHI1I3),
202 INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
203 INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1),
204 INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
205};
206
207static struct intc_mask_reg intca_mask_registers[] = {
208 { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
209 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
210 { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
211 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
212 { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */
213 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
214 { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */
215 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
216
217 { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
218 { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
219 AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
220 { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
221 { _2DG, CRYPT_STD, DIRC, 0,
222 DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
223 { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
224 { PINTCA_PINT1, PINTCA_PINT2, 0, 0,
225 BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
226 { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
227 { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
228 DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
229 { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
230 { DDM, 0, 0, 0,
231 0, 0, 0, 0 } },
232 { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
233 { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
234 SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
235 { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
236 { SCIFB, SCIFA5, SCIFA4, MSIOF1,
237 0, 0, MSIOF2, 0 } },
238 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
239 { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
240 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
241 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
242 { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
243 TTI20, USBDMAC_USHDMI, 0, MSUG } },
244 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
245 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
246 CMT2, USBHS_USHI1, USBHS_USHI0, _3DG_SGX540 } },
247 { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
248 { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
249 0, 0, 0, 0 } },
250 { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
251 { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
252 LCRC, MSU_MSU2, IRREM, MSU_MSU } },
253 { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
254 { 0, 0, TPU0, TPU1,
255 TPU2, TPU3, TPU4, 0 } },
256 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
257 { 0, 0, 0, 0,
258 MISTY, CMT3, RWDT1, RWDT0 } },
259 { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
260 { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
261 0, 0, 0, 0 } },
262 { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
263 { ICUSB_ICUSB0, ICUSB_ICUSB1, 0, 0,
264 ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, 0, 0 } },
265 { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
266 { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
267 SCUV, 0, 0, 0 } },
268 { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
269 { IPMMU_IPMMUB, 0, 0, 0,
270 AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
271 AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
272 { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
273 { MFIS2, CPORTR2S, CMT14, CMT15,
274 SCIFA6, 0, 0, 0 } },
275};
276
277static struct intc_prio_reg intca_prio_registers[] = {
278 { 0xe6900010, 0, 32, 4, /* INTPRI00A */
279 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
280 { 0xe6900014, 0, 32, 4, /* INTPRI10A */
281 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
282 { 0xe6900018, 0, 32, 4, /* INTPRI10A */
283 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
284 { 0xe690001c, 0, 32, 4, /* INTPRI30A */
285 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
286
287 { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
288 { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
289 { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD,
290 CMT1_CMT11, AP_ARM1 } },
291 { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINTCA_PINT1, PINTCA_PINT2,
292 CMT1_CMT12, TPU4 } },
293 { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
294 MFI_MFIM, USBHS } },
295 { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
296 _3DG_SGX540, CMT1_CMT10 } },
297 { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
298 SCIFA2, SCIFA3 } },
299 { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
300 FLCTL, SDHI0 } },
301 { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
302 { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, MSUG, TTI20 } },
303 { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
304 { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
305 { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
306 { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
307 { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, 0 } },
308 { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
309 { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { ICUSB, 0, 0, 0 } },
310 { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { ICUDMC, 0, 0, 0 } },
311 { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
312 { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { SCUV, 0, 0, 0 } },
313 { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUB, 0, 0, 0 } },
314 { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
315 { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
316 CMT14, CMT15 } },
317 { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } },
318};
319
320static struct intc_sense_reg intca_sense_registers[] __initdata = {
321 { 0xe6900000, 16, 2, /* ICR1A */
322 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
323 { 0xe6900004, 16, 2, /* ICR2A */
324 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
325 { 0xe6900008, 16, 2, /* ICR3A */
326 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
327 { 0xe690000c, 16, 2, /* ICR4A */
328 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
329};
330
331static struct intc_mask_reg intca_ack_registers[] __initdata = {
332 { 0xe6900020, 0, 8, /* INTREQ00A */
333 { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
334 { 0xe6900024, 0, 8, /* INTREQ10A */
335 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
336 { 0xe6900028, 0, 8, /* INTREQ20A */
337 { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
338 { 0xe690002c, 0, 8, /* INTREQ30A */
339 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
340};
341
342static DECLARE_INTC_DESC_ACK(intca_desc, "sh7377-intca",
343 intca_vectors, intca_groups,
344 intca_mask_registers, intca_prio_registers,
345 intca_sense_registers, intca_ack_registers);
346
347void __init sh7377_init_irq(void)
348{
349 register_intc_controller(&intca_desc);
350}
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
new file mode 100644
index 000000000000..128555e76e43
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -0,0 +1,1801 @@
1/*
2 * sh7367 processor support - PFC hardware block
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/gpio.h>
22#include <mach/sh7367.h>
23
24#define _1(fn, pfx, sfx) fn(pfx, sfx)
25
26#define _10(fn, pfx, sfx) \
27 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
28 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
29 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
30 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
31 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
32
33#define _90(fn, pfx, sfx) \
34 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
35 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
36 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
37 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
38 _10(fn, pfx##9, sfx)
39
40#define _273(fn, pfx, sfx) \
41 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \
42 _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx), \
43 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
44 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
45 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
46 _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx), \
47 _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
48
49#define _PORT(pfx, sfx) pfx##_##sfx
50#define PORT_273(str) _273(_PORT, PORT, str)
51
52enum {
53 PINMUX_RESERVED = 0,
54
55 PINMUX_DATA_BEGIN,
56 PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */
57 PINMUX_DATA_END,
58
59 PINMUX_INPUT_BEGIN,
60 PORT_273(IN), /* PORT0_IN -> PORT272_IN */
61 PINMUX_INPUT_END,
62
63 PINMUX_INPUT_PULLUP_BEGIN,
64 PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
65 PINMUX_INPUT_PULLUP_END,
66
67 PINMUX_INPUT_PULLDOWN_BEGIN,
68 PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
69 PINMUX_INPUT_PULLDOWN_END,
70
71 PINMUX_OUTPUT_BEGIN,
72 PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */
73 PINMUX_OUTPUT_END,
74
75 PINMUX_FUNCTION_BEGIN,
76 PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
77 PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
78 PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */
79 PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */
80 PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */
81 PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */
82 PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */
83 PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */
84 PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */
85 PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */
86
87 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
88 PINMUX_FUNCTION_END,
89
90 PINMUX_MARK_BEGIN,
91 /* Special Pull-up / Pull-down Functions */
92 PORT48_KEYIN0_PU_MARK, PORT49_KEYIN1_PU_MARK,
93 PORT50_KEYIN2_PU_MARK, PORT55_KEYIN3_PU_MARK,
94 PORT56_KEYIN4_PU_MARK, PORT57_KEYIN5_PU_MARK,
95 PORT58_KEYIN6_PU_MARK,
96
97 /* 49-1 */
98 VBUS0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK,
99 CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK,
100 CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK,
101 CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK,
102 CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK,
103 CPORT15_MARK, CPORT16_MARK, CPORT17_MARK, SOUT2_MARK,
104 CPORT18_MARK, XRTS2_MARK, CPORT19_MARK, CPORT20_MARK,
105 RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK, CPORT22_MARK,
106 STATUS1_MARK, CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
107 MPORT0_MARK, MPORT1_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK,
108 XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK,
109 IDIO_MARK, SOUT1_MARK, SCIFA4_TXD_MARK,
110 M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
111 XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
112 XCTS1_MARK, SCIFA4_CTS_MARK,
113
114 /* 49-2 */
115 HSU_IQ_AGC6_MARK, MFG2_IN2_MARK, MSIOF2_MCK0_MARK,
116 HSU_IQ_AGC5_MARK, MFG2_IN1_MARK, MSIOF2_MCK1_MARK,
117 HSU_IQ_AGC4_MARK, MSIOF2_RSYNC_MARK,
118 HSU_IQ_AGC3_MARK, MFG2_OUT1_MARK, MSIOF2_RSCK_MARK,
119 HSU_IQ_AGC2_MARK, PORT42_KEYOUT0_MARK,
120 HSU_IQ_AGC1_MARK, PORT43_KEYOUT1_MARK,
121 HSU_IQ_AGC0_MARK, PORT44_KEYOUT2_MARK,
122 HSU_IQ_AGC_ST_MARK, PORT45_KEYOUT3_MARK,
123 HSU_IQ_PDO_MARK, PORT46_KEYOUT4_MARK,
124 HSU_IQ_PYO_MARK, PORT47_KEYOUT5_MARK,
125 HSU_EN_TXMUX_G3MO_MARK, PORT48_KEYIN0_MARK,
126 HSU_I_TXMUX_G3MO_MARK, PORT49_KEYIN1_MARK,
127 HSU_Q_TXMUX_G3MO_MARK, PORT50_KEYIN2_MARK,
128 HSU_SYO_MARK, PORT51_MSIOF2_TSYNC_MARK,
129 HSU_SDO_MARK, PORT52_MSIOF2_TSCK_MARK,
130 HSU_TGTTI_G3MO_MARK, PORT53_MSIOF2_TXD_MARK,
131 B_TIME_STAMP_MARK, PORT54_MSIOF2_RXD_MARK,
132 HSU_SDI_MARK, PORT55_KEYIN3_MARK,
133 HSU_SCO_MARK, PORT56_KEYIN4_MARK,
134 HSU_DREQ_MARK, PORT57_KEYIN5_MARK,
135 HSU_DACK_MARK, PORT58_KEYIN6_MARK,
136 HSU_CLK61M_MARK, PORT59_MSIOF2_SS1_MARK,
137 HSU_XRST_MARK, PORT60_MSIOF2_SS2_MARK,
138 PCMCLKO_MARK, SYNC8KO_MARK, DNPCM_A_MARK, UPPCM_A_MARK,
139 XTALB1L_MARK,
140 GPS_AGC1_MARK, SCIFA0_RTS_MARK,
141 GPS_AGC2_MARK, SCIFA0_SCK_MARK,
142 GPS_AGC3_MARK, SCIFA0_TXD_MARK,
143 GPS_AGC4_MARK, SCIFA0_RXD_MARK,
144 GPS_PWRD_MARK, SCIFA0_CTS_MARK,
145 GPS_IM_MARK, GPS_IS_MARK, GPS_QM_MARK, GPS_QS_MARK,
146 SIUBOMC_MARK, TPU2TO0_MARK,
147 SIUCKB_MARK, TPU2TO1_MARK,
148 SIUBOLR_MARK, BBIF2_TSYNC_MARK, TPU2TO2_MARK,
149 SIUBOBT_MARK, BBIF2_TSCK_MARK, TPU2TO3_MARK,
150 SIUBOSLD_MARK, BBIF2_TXD_MARK, TPU3TO0_MARK,
151 SIUBILR_MARK, TPU3TO1_MARK,
152 SIUBIBT_MARK, TPU3TO2_MARK,
153 SIUBISLD_MARK, TPU3TO3_MARK,
154 NMI_MARK, TPU4TO0_MARK,
155 DNPCM_M_MARK, TPU4TO1_MARK, TPU4TO2_MARK, TPU4TO3_MARK,
156 IRQ_TMPB_MARK,
157 PWEN_MARK, MFG1_OUT1_MARK,
158 OVCN_MARK, MFG1_IN1_MARK,
159 OVCN2_MARK, MFG1_IN2_MARK,
160
161 /* 49-3 */
162 RFSPO1_MARK, RFSPO2_MARK, RFSPO3_MARK, PORT93_VIO_CKO2_MARK,
163 USBTERM_MARK, EXTLP_MARK, IDIN_MARK,
164 SCIFA5_CTS_MARK, MFG0_IN1_MARK,
165 SCIFA5_RTS_MARK, MFG0_IN2_MARK,
166 SCIFA5_RXD_MARK,
167 SCIFA5_TXD_MARK,
168 SCIFA5_SCK_MARK, MFG0_OUT1_MARK,
169 A0_EA0_MARK, BS_MARK,
170 A14_EA14_MARK, PORT102_KEYOUT0_MARK,
171 A15_EA15_MARK, PORT103_KEYOUT1_MARK, DV_CLKOL_MARK,
172 A16_EA16_MARK, PORT104_KEYOUT2_MARK,
173 DV_VSYNCL_MARK, MSIOF0_SS1_MARK,
174 A17_EA17_MARK, PORT105_KEYOUT3_MARK,
175 DV_HSYNCL_MARK, MSIOF0_TSYNC_MARK,
176 A18_EA18_MARK, PORT106_KEYOUT4_MARK,
177 DV_DL0_MARK, MSIOF0_TSCK_MARK,
178 A19_EA19_MARK, PORT107_KEYOUT5_MARK,
179 DV_DL1_MARK, MSIOF0_TXD_MARK,
180 A20_EA20_MARK, PORT108_KEYIN0_MARK,
181 DV_DL2_MARK, MSIOF0_RSCK_MARK,
182 A21_EA21_MARK, PORT109_KEYIN1_MARK,
183 DV_DL3_MARK, MSIOF0_RSYNC_MARK,
184 A22_EA22_MARK, PORT110_KEYIN2_MARK,
185 DV_DL4_MARK, MSIOF0_MCK0_MARK,
186 A23_EA23_MARK, PORT111_KEYIN3_MARK,
187 DV_DL5_MARK, MSIOF0_MCK1_MARK,
188 A24_EA24_MARK, PORT112_KEYIN4_MARK,
189 DV_DL6_MARK, MSIOF0_RXD_MARK,
190 A25_EA25_MARK, PORT113_KEYIN5_MARK,
191 DV_DL7_MARK, MSIOF0_SS2_MARK,
192 A26_MARK, PORT113_KEYIN6_MARK, DV_CLKIL_MARK,
193 D0_ED0_NAF0_MARK, D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK,
194 D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK, D5_ED5_NAF5_MARK,
195 D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK,
196 D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK,
197 D12_ED12_NAF12_MARK, D13_ED13_NAF13_MARK,
198 D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK,
199 CS4_MARK, CS5A_MARK, CS5B_MARK, FCE1_MARK,
200 CS6B_MARK, XCS2_MARK, FCE0_MARK, CS6A_MARK,
201 DACK0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK,
202 A27_MARK, RDWR_XWE_MARK, WE0_XWR0_FWE_MARK,
203 WE1_XWR1_MARK, FRB_MARK, CKO_MARK,
204 NBRSTOUT_MARK, NBRST_MARK,
205
206 /* 49-4 */
207 RFSPO0_MARK, PORT146_VIO_CKO2_MARK, TSTMD_MARK,
208 VIO_VD_MARK, VIO_HD_MARK,
209 VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK,
210 VIO_D3_MARK, VIO_D4_MARK, VIO_D5_MARK,
211 VIO_D6_MARK, VIO_D7_MARK, VIO_D8_MARK,
212 VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
213 VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK,
214 VIO_D15_MARK, VIO_CLK_MARK, VIO_FIELD_MARK,
215 VIO_CKO_MARK,
216 MFG3_IN1_MARK, MFG3_IN2_MARK,
217 M9_SLCD_A01_MARK, MFG3_OUT1_MARK, TPU0TO0_MARK,
218 M10_SLCD_CK1_MARK, MFG4_IN1_MARK, TPU0TO1_MARK,
219 M11_SLCD_SO1_MARK, MFG4_IN2_MARK, TPU0TO2_MARK,
220 M12_SLCD_CE1_MARK, MFG4_OUT1_MARK, TPU0TO3_MARK,
221 LCDD0_MARK, PORT175_KEYOUT0_MARK, DV_D0_MARK,
222 SIUCKA_MARK, MFG0_OUT2_MARK,
223 LCDD1_MARK, PORT176_KEYOUT1_MARK, DV_D1_MARK,
224 SIUAOLR_MARK, BBIF2_TSYNC1_MARK,
225 LCDD2_MARK, PORT177_KEYOUT2_MARK, DV_D2_MARK,
226 SIUAOBT_MARK, BBIF2_TSCK1_MARK,
227 LCDD3_MARK, PORT178_KEYOUT3_MARK, DV_D3_MARK,
228 SIUAOSLD_MARK, BBIF2_TXD1_MARK,
229 LCDD4_MARK, PORT179_KEYOUT4_MARK, DV_D4_MARK,
230 SIUAISPD_MARK, MFG1_OUT2_MARK,
231 LCDD5_MARK, PORT180_KEYOUT5_MARK, DV_D5_MARK,
232 SIUAILR_MARK, MFG2_OUT2_MARK,
233 LCDD6_MARK, DV_D6_MARK,
234 SIUAIBT_MARK, MFG3_OUT2_MARK, XWR2_MARK,
235 LCDD7_MARK, DV_D7_MARK,
236 SIUAISLD_MARK, MFG4_OUT2_MARK, XWR3_MARK,
237 LCDD8_MARK, DV_D8_MARK, D16_MARK, ED16_MARK,
238 LCDD9_MARK, DV_D9_MARK, D17_MARK, ED17_MARK,
239 LCDD10_MARK, DV_D10_MARK, D18_MARK, ED18_MARK,
240 LCDD11_MARK, DV_D11_MARK, D19_MARK, ED19_MARK,
241 LCDD12_MARK, DV_D12_MARK, D20_MARK, ED20_MARK,
242 LCDD13_MARK, DV_D13_MARK, D21_MARK, ED21_MARK,
243 LCDD14_MARK, DV_D14_MARK, D22_MARK, ED22_MARK,
244 LCDD15_MARK, DV_D15_MARK, D23_MARK, ED23_MARK,
245 LCDD16_MARK, DV_HSYNC_MARK, D24_MARK, ED24_MARK,
246 LCDD17_MARK, DV_VSYNC_MARK, D25_MARK, ED25_MARK,
247 LCDD18_MARK, DREQ2_MARK, MSIOF0L_TSCK_MARK,
248 D26_MARK, ED26_MARK,
249 LCDD19_MARK, MSIOF0L_TSYNC_MARK,
250 D27_MARK, ED27_MARK,
251 LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK,
252 D28_MARK, ED28_MARK,
253 LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK,
254 D29_MARK, ED29_MARK,
255 LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_SS1_MARK,
256 D30_MARK, ED30_MARK,
257 LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_SS2_MARK,
258 D31_MARK, ED31_MARK,
259 LCDDCK_MARK, LCDWR_MARK, DV_CKO_MARK, SIUAOSPD_MARK,
260 LCDRD_MARK, DACK2_MARK, MSIOF0L_RSYNC_MARK,
261
262 /* 49-5 */
263 LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
264 LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_RSCK_MARK,
265 LCDCSYN_MARK, LCDCSYN2_MARK, DV_CKI_MARK,
266 LCDLCLK_MARK, DREQ1_MARK, MSIOF0L_RXD_MARK,
267 LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, MSIOF0L_TXD_MARK,
268 VIO_DR0_MARK, VIO_DR1_MARK, VIO_DR2_MARK, VIO_DR3_MARK,
269 VIO_DR4_MARK, VIO_DR5_MARK, VIO_DR6_MARK, VIO_DR7_MARK,
270 VIO_VDR_MARK, VIO_HDR_MARK,
271 VIO_CLKR_MARK, VIO_CKOR_MARK,
272 SCIFA1_TXD_MARK, GPS_PGFA0_MARK,
273 SCIFA1_SCK_MARK, GPS_PGFA1_MARK,
274 SCIFA1_RTS_MARK, GPS_EPPSINMON_MARK,
275 SCIFA1_RXD_MARK, SCIFA1_CTS_MARK,
276 MSIOF1_TXD_MARK, SCIFA1_TXD2_MARK, GPS_TXD_MARK,
277 MSIOF1_TSYNC_MARK, SCIFA1_CTS2_MARK, I2C_SDA2_MARK,
278 MSIOF1_TSCK_MARK, SCIFA1_SCK2_MARK,
279 MSIOF1_RXD_MARK, SCIFA1_RXD2_MARK, GPS_RXD_MARK,
280 MSIOF1_RSCK_MARK, SCIFA1_RTS2_MARK,
281 MSIOF1_RSYNC_MARK, I2C_SCL2_MARK,
282 MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
283 MSIOF1_SS1_MARK, EDBGREQ3_MARK,
284 MSIOF1_SS2_MARK,
285 PORT236_IROUT_MARK, IRDA_OUT_MARK,
286 IRDA_IN_MARK, IRDA_FIRSEL_MARK,
287 TPU1TO0_MARK, TS_SPSYNC3_MARK,
288 TPU1TO1_MARK, TS_SDAT3_MARK,
289 TPU1TO2_MARK, TS_SDEN3_MARK, PORT241_MSIOF2_SS1_MARK,
290 TPU1TO3_MARK, PORT242_MSIOF2_TSCK_MARK,
291 M13_BSW_MARK, PORT243_MSIOF2_TSYNC_MARK,
292 M14_GSW_MARK, PORT244_MSIOF2_TXD_MARK,
293 PORT245_IROUT_MARK, M15_RSW_MARK,
294 SOUT3_MARK, SCIFA2_TXD1_MARK,
295 SIN3_MARK, SCIFA2_RXD1_MARK,
296 XRTS3_MARK, SCIFA2_RTS1_MARK, PORT248_MSIOF2_SS2_MARK,
297 XCTS3_MARK, SCIFA2_CTS1_MARK, PORT249_MSIOF2_RXD_MARK,
298 DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
299 SDHICLK0_MARK, TCK2_MARK,
300 SDHICD0_MARK,
301 SDHID0_0_MARK, TMS2_MARK,
302 SDHID0_1_MARK, TDO2_MARK,
303 SDHID0_2_MARK, TDI2_MARK,
304 SDHID0_3_MARK, RTCK2_MARK,
305
306 /* 49-6 */
307 SDHICMD0_MARK, TRST2_MARK,
308 SDHIWP0_MARK, EDBGREQ2_MARK,
309 SDHICLK1_MARK, TCK3_MARK,
310 SDHID1_0_MARK, M11_SLCD_SO2_MARK,
311 TS_SPSYNC2_MARK, TMS3_MARK,
312 SDHID1_1_MARK, M9_SLCD_AO2_MARK,
313 TS_SDAT2_MARK, TDO3_MARK,
314 SDHID1_2_MARK, M10_SLCD_CK2_MARK,
315 TS_SDEN2_MARK, TDI3_MARK,
316 SDHID1_3_MARK, M12_SLCD_CE2_MARK,
317 TS_SCK2_MARK, RTCK3_MARK,
318 SDHICMD1_MARK, TRST3_MARK,
319 SDHICLK2_MARK, SCIFB_SCK_MARK,
320 SDHID2_0_MARK, SCIFB_TXD_MARK,
321 SDHID2_1_MARK, SCIFB_CTS_MARK,
322 SDHID2_2_MARK, SCIFB_RXD_MARK,
323 SDHID2_3_MARK, SCIFB_RTS_MARK,
324 SDHICMD2_MARK,
325 RESETOUTS_MARK,
326 DIVLOCK_MARK,
327 PINMUX_MARK_END,
328};
329
330#define PORT_DATA_I(nr) \
331 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
332
333#define PORT_DATA_I_PD(nr) \
334 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
335 PORT##nr##_IN, PORT##nr##_IN_PD)
336
337#define PORT_DATA_I_PU(nr) \
338 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
339 PORT##nr##_IN, PORT##nr##_IN_PU)
340
341#define PORT_DATA_I_PU_PD(nr) \
342 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
343 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
344
345#define PORT_DATA_O(nr) \
346 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
347
348#define PORT_DATA_IO(nr) \
349 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
350 PORT##nr##_IN)
351
352#define PORT_DATA_IO_PD(nr) \
353 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
354 PORT##nr##_IN, PORT##nr##_IN_PD)
355
356#define PORT_DATA_IO_PU(nr) \
357 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
358 PORT##nr##_IN, PORT##nr##_IN_PU)
359
360#define PORT_DATA_IO_PU_PD(nr) \
361 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
362 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
363
364
365static pinmux_enum_t pinmux_data[] = {
366
367 /* specify valid pin states for each pin in GPIO mode */
368
369 /* 49-1 (GPIO) */
370 PORT_DATA_I_PD(0),
371 PORT_DATA_I_PU(1), PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
372 PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), PORT_DATA_I_PU(6),
373 PORT_DATA_I_PU(7), PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
374 PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), PORT_DATA_I_PU(12),
375 PORT_DATA_I_PU(13),
376 PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
377 PORT_DATA_O(16), PORT_DATA_O(17), PORT_DATA_O(18), PORT_DATA_O(19),
378 PORT_DATA_O(20), PORT_DATA_O(21), PORT_DATA_O(22), PORT_DATA_O(23),
379 PORT_DATA_O(24), PORT_DATA_O(25), PORT_DATA_O(26),
380 PORT_DATA_I_PD(27), PORT_DATA_I_PD(28),
381 PORT_DATA_O(29), PORT_DATA_O(30), PORT_DATA_O(31), PORT_DATA_O(32),
382 PORT_DATA_IO_PU(33),
383 PORT_DATA_O(34),
384 PORT_DATA_I_PU(35),
385 PORT_DATA_O(36),
386 PORT_DATA_I_PU_PD(37),
387
388 /* 49-2 (GPIO) */
389 PORT_DATA_IO_PU_PD(38),
390 PORT_DATA_IO_PD(39), PORT_DATA_IO_PD(40), PORT_DATA_IO_PD(41),
391 PORT_DATA_O(42), PORT_DATA_O(43), PORT_DATA_O(44), PORT_DATA_O(45),
392 PORT_DATA_O(46), PORT_DATA_O(47),
393 PORT_DATA_I_PU_PD(48), PORT_DATA_I_PU_PD(49), PORT_DATA_I_PU_PD(50),
394 PORT_DATA_IO_PD(51), PORT_DATA_IO_PD(52),
395 PORT_DATA_O(53),
396 PORT_DATA_IO_PD(54),
397 PORT_DATA_I_PU_PD(55),
398 PORT_DATA_IO_PU_PD(56),
399 PORT_DATA_I_PU_PD(57),
400 PORT_DATA_IO_PU_PD(58),
401 PORT_DATA_O(59), PORT_DATA_O(60), PORT_DATA_O(61), PORT_DATA_O(62),
402 PORT_DATA_O(63),
403 PORT_DATA_I_PU(64),
404 PORT_DATA_O(65), PORT_DATA_O(66), PORT_DATA_O(67), PORT_DATA_O(68),
405 PORT_DATA_IO_PD(69), PORT_DATA_IO_PD(70),
406 PORT_DATA_I_PD(71), PORT_DATA_I_PD(72), PORT_DATA_I_PD(73),
407 PORT_DATA_I_PD(74),
408 PORT_DATA_IO_PU_PD(75), PORT_DATA_IO_PU_PD(76),
409 PORT_DATA_IO_PD(77), PORT_DATA_IO_PD(78),
410 PORT_DATA_O(79),
411 PORT_DATA_IO_PD(80), PORT_DATA_IO_PD(81), PORT_DATA_IO_PD(82),
412 PORT_DATA_IO_PU_PD(83), PORT_DATA_IO_PU_PD(84),
413 PORT_DATA_IO_PU_PD(85), PORT_DATA_IO_PU_PD(86),
414 PORT_DATA_I_PD(87),
415 PORT_DATA_IO_PU_PD(88),
416 PORT_DATA_I_PU_PD(89), PORT_DATA_I_PU_PD(90),
417
418 /* 49-3 (GPIO) */
419 PORT_DATA_O(91), PORT_DATA_O(92), PORT_DATA_O(93), PORT_DATA_O(94),
420 PORT_DATA_I_PU_PD(95),
421 PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97), PORT_DATA_IO_PU_PD(98),
422 PORT_DATA_IO_PU_PD(99), PORT_DATA_IO_PU_PD(100),
423 PORT_DATA_IO(101), PORT_DATA_IO(102), PORT_DATA_IO(103),
424 PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105), PORT_DATA_IO_PD(106),
425 PORT_DATA_IO_PD(107),
426 PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109),
427 PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111),
428 PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113),
429 PORT_DATA_IO_PU_PD(114),
430 PORT_DATA_IO_PU(115), PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
431 PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119), PORT_DATA_IO_PU(120),
432 PORT_DATA_IO_PU(121), PORT_DATA_IO_PU(122), PORT_DATA_IO_PU(123),
433 PORT_DATA_IO_PU(124), PORT_DATA_IO_PU(125), PORT_DATA_IO_PU(126),
434 PORT_DATA_IO_PU(127), PORT_DATA_IO_PU(128), PORT_DATA_IO_PU(129),
435 PORT_DATA_IO_PU(130),
436 PORT_DATA_O(131), PORT_DATA_O(132), PORT_DATA_O(133),
437 PORT_DATA_IO_PU(134),
438 PORT_DATA_O(135), PORT_DATA_O(136),
439 PORT_DATA_I_PU_PD(137),
440 PORT_DATA_IO(138),
441 PORT_DATA_IO_PU_PD(139),
442 PORT_DATA_IO(140), PORT_DATA_IO(141),
443 PORT_DATA_I_PU(142),
444 PORT_DATA_O(143), PORT_DATA_O(144),
445 PORT_DATA_I_PU(145),
446
447 /* 49-4 (GPIO) */
448 PORT_DATA_O(146),
449 PORT_DATA_I_PU_PD(147),
450 PORT_DATA_I_PD(148), PORT_DATA_I_PD(149),
451 PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151), PORT_DATA_IO_PD(152),
452 PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), PORT_DATA_IO_PD(155),
453 PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157), PORT_DATA_IO_PD(158),
454 PORT_DATA_IO_PD(159), PORT_DATA_IO_PD(160), PORT_DATA_IO_PD(161),
455 PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163), PORT_DATA_IO_PD(164),
456 PORT_DATA_IO_PD(165), PORT_DATA_IO_PD(166),
457 PORT_DATA_IO_PU_PD(167),
458 PORT_DATA_O(168),
459 PORT_DATA_I_PD(169), PORT_DATA_I_PD(170),
460 PORT_DATA_O(171),
461 PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173),
462 PORT_DATA_O(174),
463 PORT_DATA_IO_PD(175), PORT_DATA_IO_PD(176), PORT_DATA_IO_PD(177),
464 PORT_DATA_IO_PD(178), PORT_DATA_IO_PD(179), PORT_DATA_IO_PD(180),
465 PORT_DATA_IO_PD(181), PORT_DATA_IO_PD(182), PORT_DATA_IO_PD(183),
466 PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185), PORT_DATA_IO_PD(186),
467 PORT_DATA_IO_PD(187), PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189),
468 PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191), PORT_DATA_IO_PD(192),
469 PORT_DATA_IO_PD(193), PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
470 PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), PORT_DATA_IO_PD(198),
471 PORT_DATA_O(199),
472 PORT_DATA_IO_PD(200),
473
474 /* 49-5 (GPIO) */
475 PORT_DATA_O(201),
476 PORT_DATA_IO_PD(202), PORT_DATA_IO_PD(203),
477 PORT_DATA_I(204),
478 PORT_DATA_O(205),
479 PORT_DATA_IO_PD(206), PORT_DATA_IO_PD(207), PORT_DATA_IO_PD(208),
480 PORT_DATA_IO_PD(209), PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
481 PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), PORT_DATA_IO_PD(214),
482 PORT_DATA_IO_PD(215), PORT_DATA_IO_PD(216),
483 PORT_DATA_O(217),
484 PORT_DATA_I_PU_PD(218), PORT_DATA_I_PU_PD(219),
485 PORT_DATA_O(220), PORT_DATA_O(221), PORT_DATA_O(222),
486 PORT_DATA_I_PD(223),
487 PORT_DATA_I_PU_PD(224),
488 PORT_DATA_O(225),
489 PORT_DATA_IO_PD(226),
490 PORT_DATA_IO_PU_PD(227),
491 PORT_DATA_I_PD(228),
492 PORT_DATA_IO_PD(229), PORT_DATA_IO_PD(230),
493 PORT_DATA_I_PU_PD(231), PORT_DATA_I_PU_PD(232),
494 PORT_DATA_IO_PU_PD(233), PORT_DATA_IO_PU_PD(234),
495 PORT_DATA_I_PU_PD(235),
496 PORT_DATA_O(236),
497 PORT_DATA_I_PD(237),
498 PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239),
499 PORT_DATA_IO_PD(240), PORT_DATA_IO_PD(241),
500 PORT_DATA_IO_PD(242), PORT_DATA_IO_PD(243),
501 PORT_DATA_O(244),
502 PORT_DATA_IO_PU_PD(245),
503 PORT_DATA_O(246),
504 PORT_DATA_I_PD(247),
505 PORT_DATA_IO_PU_PD(248),
506 PORT_DATA_I_PU_PD(249),
507 PORT_DATA_IO_PD(250), PORT_DATA_IO_PD(251),
508 PORT_DATA_IO_PU_PD(252), PORT_DATA_IO_PU_PD(253),
509 PORT_DATA_IO_PU_PD(254), PORT_DATA_IO_PU_PD(255),
510 PORT_DATA_IO_PU_PD(256),
511
512 /* 49-6 (GPIO) */
513 PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PU_PD(258),
514 PORT_DATA_IO_PD(259),
515 PORT_DATA_IO_PU(260), PORT_DATA_IO_PU(261), PORT_DATA_IO_PU(262),
516 PORT_DATA_IO_PU(263), PORT_DATA_IO_PU(264),
517 PORT_DATA_O(265),
518 PORT_DATA_IO_PU(266), PORT_DATA_IO_PU(267), PORT_DATA_IO_PU(268),
519 PORT_DATA_IO_PU(269), PORT_DATA_IO_PU(270),
520 PORT_DATA_O(271),
521 PORT_DATA_I_PD(272),
522
523 /* Special Pull-up / Pull-down Functions */
524 PINMUX_DATA(PORT48_KEYIN0_PU_MARK, MSELBCR_MSEL2_1,
525 PORT48_FN2, PORT48_IN_PU),
526 PINMUX_DATA(PORT49_KEYIN1_PU_MARK, MSELBCR_MSEL2_1,
527 PORT49_FN2, PORT49_IN_PU),
528 PINMUX_DATA(PORT50_KEYIN2_PU_MARK, MSELBCR_MSEL2_1,
529 PORT50_FN2, PORT50_IN_PU),
530 PINMUX_DATA(PORT55_KEYIN3_PU_MARK, MSELBCR_MSEL2_1,
531 PORT55_FN2, PORT55_IN_PU),
532 PINMUX_DATA(PORT56_KEYIN4_PU_MARK, MSELBCR_MSEL2_1,
533 PORT56_FN2, PORT56_IN_PU),
534 PINMUX_DATA(PORT57_KEYIN5_PU_MARK, MSELBCR_MSEL2_1,
535 PORT57_FN2, PORT57_IN_PU),
536 PINMUX_DATA(PORT58_KEYIN6_PU_MARK, MSELBCR_MSEL2_1,
537 PORT58_FN2, PORT58_IN_PU),
538
539 /* 49-1 (FN) */
540 PINMUX_DATA(VBUS0_MARK, PORT0_FN1),
541 PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
542 PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
543 PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
544 PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
545 PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
546 PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
547 PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
548 PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
549 PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
550 PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
551 PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
552 PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
553 PINMUX_DATA(SIN2_MARK, PORT12_FN2),
554 PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
555 PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
556 PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
557 PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
558 PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
559 PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
560 PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
561 PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
562 PINMUX_DATA(CPORT17_MARK, PORT18_FN1),
563 PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
564 PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
565 PINMUX_DATA(XRTS2_MARK, PORT19_FN1),
566 PINMUX_DATA(CPORT19_MARK, PORT20_FN1),
567 PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
568 PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
569 PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
570 PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
571 PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
572 PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
573 PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
574 PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
575 PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
576 PINMUX_DATA(MPORT0_MARK, PORT25_FN1),
577 PINMUX_DATA(MPORT1_MARK, PORT26_FN1),
578 PINMUX_DATA(B_SYNLD1_MARK, PORT27_FN1),
579 PINMUX_DATA(B_SYNLD2_MARK, PORT28_FN1),
580 PINMUX_DATA(XMAINPS_MARK, PORT29_FN1),
581 PINMUX_DATA(XDIVPS_MARK, PORT30_FN1),
582 PINMUX_DATA(XIDRST_MARK, PORT31_FN1),
583 PINMUX_DATA(IDCLK_MARK, PORT32_FN1),
584 PINMUX_DATA(IDIO_MARK, PORT33_FN1),
585 PINMUX_DATA(SOUT1_MARK, PORT34_FN1),
586 PINMUX_DATA(SCIFA4_TXD_MARK, PORT34_FN2),
587 PINMUX_DATA(M02_BERDAT_MARK, PORT34_FN3),
588 PINMUX_DATA(SIN1_MARK, PORT35_FN1),
589 PINMUX_DATA(SCIFA4_RXD_MARK, PORT35_FN2),
590 PINMUX_DATA(XWUP_MARK, PORT35_FN3),
591 PINMUX_DATA(XRTS1_MARK, PORT36_FN1),
592 PINMUX_DATA(SCIFA4_RTS_MARK, PORT36_FN2),
593 PINMUX_DATA(M03_BERCLK_MARK, PORT36_FN3),
594 PINMUX_DATA(XCTS1_MARK, PORT37_FN1),
595 PINMUX_DATA(SCIFA4_CTS_MARK, PORT37_FN2),
596
597 /* 49-2 (FN) */
598 PINMUX_DATA(HSU_IQ_AGC6_MARK, PORT38_FN1),
599 PINMUX_DATA(MFG2_IN2_MARK, PORT38_FN2),
600 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT38_FN3),
601 PINMUX_DATA(HSU_IQ_AGC5_MARK, PORT39_FN1),
602 PINMUX_DATA(MFG2_IN1_MARK, PORT39_FN2),
603 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT39_FN3),
604 PINMUX_DATA(HSU_IQ_AGC4_MARK, PORT40_FN1),
605 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT40_FN3),
606 PINMUX_DATA(HSU_IQ_AGC3_MARK, PORT41_FN1),
607 PINMUX_DATA(MFG2_OUT1_MARK, PORT41_FN2),
608 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT41_FN3),
609 PINMUX_DATA(HSU_IQ_AGC2_MARK, PORT42_FN1),
610 PINMUX_DATA(PORT42_KEYOUT0_MARK, MSELBCR_MSEL2_1, PORT42_FN2),
611 PINMUX_DATA(HSU_IQ_AGC1_MARK, PORT43_FN1),
612 PINMUX_DATA(PORT43_KEYOUT1_MARK, MSELBCR_MSEL2_1, PORT43_FN2),
613 PINMUX_DATA(HSU_IQ_AGC0_MARK, PORT44_FN1),
614 PINMUX_DATA(PORT44_KEYOUT2_MARK, MSELBCR_MSEL2_1, PORT44_FN2),
615 PINMUX_DATA(HSU_IQ_AGC_ST_MARK, PORT45_FN1),
616 PINMUX_DATA(PORT45_KEYOUT3_MARK, MSELBCR_MSEL2_1, PORT45_FN2),
617 PINMUX_DATA(HSU_IQ_PDO_MARK, PORT46_FN1),
618 PINMUX_DATA(PORT46_KEYOUT4_MARK, MSELBCR_MSEL2_1, PORT46_FN2),
619 PINMUX_DATA(HSU_IQ_PYO_MARK, PORT47_FN1),
620 PINMUX_DATA(PORT47_KEYOUT5_MARK, MSELBCR_MSEL2_1, PORT47_FN2),
621 PINMUX_DATA(HSU_EN_TXMUX_G3MO_MARK, PORT48_FN1),
622 PINMUX_DATA(PORT48_KEYIN0_MARK, MSELBCR_MSEL2_1, PORT48_FN2),
623 PINMUX_DATA(HSU_I_TXMUX_G3MO_MARK, PORT49_FN1),
624 PINMUX_DATA(PORT49_KEYIN1_MARK, MSELBCR_MSEL2_1, PORT49_FN2),
625 PINMUX_DATA(HSU_Q_TXMUX_G3MO_MARK, PORT50_FN1),
626 PINMUX_DATA(PORT50_KEYIN2_MARK, MSELBCR_MSEL2_1, PORT50_FN2),
627 PINMUX_DATA(HSU_SYO_MARK, PORT51_FN1),
628 PINMUX_DATA(PORT51_MSIOF2_TSYNC_MARK, PORT51_FN2),
629 PINMUX_DATA(HSU_SDO_MARK, PORT52_FN1),
630 PINMUX_DATA(PORT52_MSIOF2_TSCK_MARK, PORT52_FN2),
631 PINMUX_DATA(HSU_TGTTI_G3MO_MARK, PORT53_FN1),
632 PINMUX_DATA(PORT53_MSIOF2_TXD_MARK, PORT53_FN2),
633 PINMUX_DATA(B_TIME_STAMP_MARK, PORT54_FN1),
634 PINMUX_DATA(PORT54_MSIOF2_RXD_MARK, PORT54_FN2),
635 PINMUX_DATA(HSU_SDI_MARK, PORT55_FN1),
636 PINMUX_DATA(PORT55_KEYIN3_MARK, MSELBCR_MSEL2_1, PORT55_FN2),
637 PINMUX_DATA(HSU_SCO_MARK, PORT56_FN1),
638 PINMUX_DATA(PORT56_KEYIN4_MARK, MSELBCR_MSEL2_1, PORT56_FN2),
639 PINMUX_DATA(HSU_DREQ_MARK, PORT57_FN1),
640 PINMUX_DATA(PORT57_KEYIN5_MARK, MSELBCR_MSEL2_1, PORT57_FN2),
641 PINMUX_DATA(HSU_DACK_MARK, PORT58_FN1),
642 PINMUX_DATA(PORT58_KEYIN6_MARK, MSELBCR_MSEL2_1, PORT58_FN2),
643 PINMUX_DATA(HSU_CLK61M_MARK, PORT59_FN1),
644 PINMUX_DATA(PORT59_MSIOF2_SS1_MARK, PORT59_FN2),
645 PINMUX_DATA(HSU_XRST_MARK, PORT60_FN1),
646 PINMUX_DATA(PORT60_MSIOF2_SS2_MARK, PORT60_FN2),
647 PINMUX_DATA(PCMCLKO_MARK, PORT61_FN1),
648 PINMUX_DATA(SYNC8KO_MARK, PORT62_FN1),
649 PINMUX_DATA(DNPCM_A_MARK, PORT63_FN1),
650 PINMUX_DATA(UPPCM_A_MARK, PORT64_FN1),
651 PINMUX_DATA(XTALB1L_MARK, PORT65_FN1),
652 PINMUX_DATA(GPS_AGC1_MARK, PORT66_FN1),
653 PINMUX_DATA(SCIFA0_RTS_MARK, PORT66_FN2),
654 PINMUX_DATA(GPS_AGC2_MARK, PORT67_FN1),
655 PINMUX_DATA(SCIFA0_SCK_MARK, PORT67_FN2),
656 PINMUX_DATA(GPS_AGC3_MARK, PORT68_FN1),
657 PINMUX_DATA(SCIFA0_TXD_MARK, PORT68_FN2),
658 PINMUX_DATA(GPS_AGC4_MARK, PORT69_FN1),
659 PINMUX_DATA(SCIFA0_RXD_MARK, PORT69_FN2),
660 PINMUX_DATA(GPS_PWRD_MARK, PORT70_FN1),
661 PINMUX_DATA(SCIFA0_CTS_MARK, PORT70_FN2),
662 PINMUX_DATA(GPS_IM_MARK, PORT71_FN1),
663 PINMUX_DATA(GPS_IS_MARK, PORT72_FN1),
664 PINMUX_DATA(GPS_QM_MARK, PORT73_FN1),
665 PINMUX_DATA(GPS_QS_MARK, PORT74_FN1),
666 PINMUX_DATA(SIUBOMC_MARK, PORT75_FN1),
667 PINMUX_DATA(TPU2TO0_MARK, PORT75_FN3),
668 PINMUX_DATA(SIUCKB_MARK, PORT76_FN1),
669 PINMUX_DATA(TPU2TO1_MARK, PORT76_FN3),
670 PINMUX_DATA(SIUBOLR_MARK, PORT77_FN1),
671 PINMUX_DATA(BBIF2_TSYNC_MARK, PORT77_FN2),
672 PINMUX_DATA(TPU2TO2_MARK, PORT77_FN3),
673 PINMUX_DATA(SIUBOBT_MARK, PORT78_FN1),
674 PINMUX_DATA(BBIF2_TSCK_MARK, PORT78_FN2),
675 PINMUX_DATA(TPU2TO3_MARK, PORT78_FN3),
676 PINMUX_DATA(SIUBOSLD_MARK, PORT79_FN1),
677 PINMUX_DATA(BBIF2_TXD_MARK, PORT79_FN2),
678 PINMUX_DATA(TPU3TO0_MARK, PORT79_FN3),
679 PINMUX_DATA(SIUBILR_MARK, PORT80_FN1),
680 PINMUX_DATA(TPU3TO1_MARK, PORT80_FN3),
681 PINMUX_DATA(SIUBIBT_MARK, PORT81_FN1),
682 PINMUX_DATA(TPU3TO2_MARK, PORT81_FN3),
683 PINMUX_DATA(SIUBISLD_MARK, PORT82_FN1),
684 PINMUX_DATA(TPU3TO3_MARK, PORT82_FN3),
685 PINMUX_DATA(NMI_MARK, PORT83_FN1),
686 PINMUX_DATA(TPU4TO0_MARK, PORT83_FN3),
687 PINMUX_DATA(DNPCM_M_MARK, PORT84_FN1),
688 PINMUX_DATA(TPU4TO1_MARK, PORT84_FN3),
689 PINMUX_DATA(TPU4TO2_MARK, PORT85_FN3),
690 PINMUX_DATA(TPU4TO3_MARK, PORT86_FN3),
691 PINMUX_DATA(IRQ_TMPB_MARK, PORT87_FN1),
692 PINMUX_DATA(PWEN_MARK, PORT88_FN1),
693 PINMUX_DATA(MFG1_OUT1_MARK, PORT88_FN2),
694 PINMUX_DATA(OVCN_MARK, PORT89_FN1),
695 PINMUX_DATA(MFG1_IN1_MARK, PORT89_FN2),
696 PINMUX_DATA(OVCN2_MARK, PORT90_FN1),
697 PINMUX_DATA(MFG1_IN2_MARK, PORT90_FN2),
698
699 /* 49-3 (FN) */
700 PINMUX_DATA(RFSPO1_MARK, PORT91_FN1),
701 PINMUX_DATA(RFSPO2_MARK, PORT92_FN1),
702 PINMUX_DATA(RFSPO3_MARK, PORT93_FN1),
703 PINMUX_DATA(PORT93_VIO_CKO2_MARK, PORT93_FN2),
704 PINMUX_DATA(USBTERM_MARK, PORT94_FN1),
705 PINMUX_DATA(EXTLP_MARK, PORT94_FN2),
706 PINMUX_DATA(IDIN_MARK, PORT95_FN1),
707 PINMUX_DATA(SCIFA5_CTS_MARK, PORT96_FN1),
708 PINMUX_DATA(MFG0_IN1_MARK, PORT96_FN2),
709 PINMUX_DATA(SCIFA5_RTS_MARK, PORT97_FN1),
710 PINMUX_DATA(MFG0_IN2_MARK, PORT97_FN2),
711 PINMUX_DATA(SCIFA5_RXD_MARK, PORT98_FN1),
712 PINMUX_DATA(SCIFA5_TXD_MARK, PORT99_FN1),
713 PINMUX_DATA(SCIFA5_SCK_MARK, PORT100_FN1),
714 PINMUX_DATA(MFG0_OUT1_MARK, PORT100_FN2),
715 PINMUX_DATA(A0_EA0_MARK, PORT101_FN1),
716 PINMUX_DATA(BS_MARK, PORT101_FN2),
717 PINMUX_DATA(A14_EA14_MARK, PORT102_FN1),
718 PINMUX_DATA(PORT102_KEYOUT0_MARK, MSELBCR_MSEL2_0, PORT102_FN2),
719 PINMUX_DATA(A15_EA15_MARK, PORT103_FN1),
720 PINMUX_DATA(PORT103_KEYOUT1_MARK, MSELBCR_MSEL2_0, PORT103_FN2),
721 PINMUX_DATA(DV_CLKOL_MARK, PORT103_FN3),
722 PINMUX_DATA(A16_EA16_MARK, PORT104_FN1),
723 PINMUX_DATA(PORT104_KEYOUT2_MARK, MSELBCR_MSEL2_0, PORT104_FN2),
724 PINMUX_DATA(DV_VSYNCL_MARK, PORT104_FN3),
725 PINMUX_DATA(MSIOF0_SS1_MARK, PORT104_FN4),
726 PINMUX_DATA(A17_EA17_MARK, PORT105_FN1),
727 PINMUX_DATA(PORT105_KEYOUT3_MARK, MSELBCR_MSEL2_0, PORT105_FN2),
728 PINMUX_DATA(DV_HSYNCL_MARK, PORT105_FN3),
729 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT105_FN4),
730 PINMUX_DATA(A18_EA18_MARK, PORT106_FN1),
731 PINMUX_DATA(PORT106_KEYOUT4_MARK, MSELBCR_MSEL2_0, PORT106_FN2),
732 PINMUX_DATA(DV_DL0_MARK, PORT106_FN3),
733 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT106_FN4),
734 PINMUX_DATA(A19_EA19_MARK, PORT107_FN1),
735 PINMUX_DATA(PORT107_KEYOUT5_MARK, MSELBCR_MSEL2_0, PORT107_FN2),
736 PINMUX_DATA(DV_DL1_MARK, PORT107_FN3),
737 PINMUX_DATA(MSIOF0_TXD_MARK, PORT107_FN4),
738 PINMUX_DATA(A20_EA20_MARK, PORT108_FN1),
739 PINMUX_DATA(PORT108_KEYIN0_MARK, MSELBCR_MSEL2_0, PORT108_FN2),
740 PINMUX_DATA(DV_DL2_MARK, PORT108_FN3),
741 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT108_FN4),
742 PINMUX_DATA(A21_EA21_MARK, PORT109_FN1),
743 PINMUX_DATA(PORT109_KEYIN1_MARK, MSELBCR_MSEL2_0, PORT109_FN2),
744 PINMUX_DATA(DV_DL3_MARK, PORT109_FN3),
745 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT109_FN4),
746 PINMUX_DATA(A22_EA22_MARK, PORT110_FN1),
747 PINMUX_DATA(PORT110_KEYIN2_MARK, MSELBCR_MSEL2_0, PORT110_FN2),
748 PINMUX_DATA(DV_DL4_MARK, PORT110_FN3),
749 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT110_FN4),
750 PINMUX_DATA(A23_EA23_MARK, PORT111_FN1),
751 PINMUX_DATA(PORT111_KEYIN3_MARK, MSELBCR_MSEL2_0, PORT111_FN2),
752 PINMUX_DATA(DV_DL5_MARK, PORT111_FN3),
753 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT111_FN4),
754 PINMUX_DATA(A24_EA24_MARK, PORT112_FN1),
755 PINMUX_DATA(PORT112_KEYIN4_MARK, MSELBCR_MSEL2_0, PORT112_FN2),
756 PINMUX_DATA(DV_DL6_MARK, PORT112_FN3),
757 PINMUX_DATA(MSIOF0_RXD_MARK, PORT112_FN4),
758 PINMUX_DATA(A25_EA25_MARK, PORT113_FN1),
759 PINMUX_DATA(PORT113_KEYIN5_MARK, MSELBCR_MSEL2_0, PORT113_FN2),
760 PINMUX_DATA(DV_DL7_MARK, PORT113_FN3),
761 PINMUX_DATA(MSIOF0_SS2_MARK, PORT113_FN4),
762 PINMUX_DATA(A26_MARK, PORT114_FN1),
763 PINMUX_DATA(PORT113_KEYIN6_MARK, MSELBCR_MSEL2_0, PORT114_FN2),
764 PINMUX_DATA(DV_CLKIL_MARK, PORT114_FN3),
765 PINMUX_DATA(D0_ED0_NAF0_MARK, PORT115_FN1),
766 PINMUX_DATA(D1_ED1_NAF1_MARK, PORT116_FN1),
767 PINMUX_DATA(D2_ED2_NAF2_MARK, PORT117_FN1),
768 PINMUX_DATA(D3_ED3_NAF3_MARK, PORT118_FN1),
769 PINMUX_DATA(D4_ED4_NAF4_MARK, PORT119_FN1),
770 PINMUX_DATA(D5_ED5_NAF5_MARK, PORT120_FN1),
771 PINMUX_DATA(D6_ED6_NAF6_MARK, PORT121_FN1),
772 PINMUX_DATA(D7_ED7_NAF7_MARK, PORT122_FN1),
773 PINMUX_DATA(D8_ED8_NAF8_MARK, PORT123_FN1),
774 PINMUX_DATA(D9_ED9_NAF9_MARK, PORT124_FN1),
775 PINMUX_DATA(D10_ED10_NAF10_MARK, PORT125_FN1),
776 PINMUX_DATA(D11_ED11_NAF11_MARK, PORT126_FN1),
777 PINMUX_DATA(D12_ED12_NAF12_MARK, PORT127_FN1),
778 PINMUX_DATA(D13_ED13_NAF13_MARK, PORT128_FN1),
779 PINMUX_DATA(D14_ED14_NAF14_MARK, PORT129_FN1),
780 PINMUX_DATA(D15_ED15_NAF15_MARK, PORT130_FN1),
781 PINMUX_DATA(CS4_MARK, PORT131_FN1),
782 PINMUX_DATA(CS5A_MARK, PORT132_FN1),
783 PINMUX_DATA(CS5B_MARK, PORT133_FN1),
784 PINMUX_DATA(FCE1_MARK, PORT133_FN2),
785 PINMUX_DATA(CS6B_MARK, PORT134_FN1),
786 PINMUX_DATA(XCS2_MARK, PORT134_FN2),
787 PINMUX_DATA(FCE0_MARK, PORT135_FN1),
788 PINMUX_DATA(CS6A_MARK, PORT136_FN1),
789 PINMUX_DATA(DACK0_MARK, PORT136_FN2),
790 PINMUX_DATA(WAIT_MARK, PORT137_FN1),
791 PINMUX_DATA(DREQ0_MARK, PORT137_FN2),
792 PINMUX_DATA(RD_XRD_MARK, PORT138_FN1),
793 PINMUX_DATA(A27_MARK, PORT139_FN1),
794 PINMUX_DATA(RDWR_XWE_MARK, PORT139_FN2),
795 PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT140_FN1),
796 PINMUX_DATA(WE1_XWR1_MARK, PORT141_FN1),
797 PINMUX_DATA(FRB_MARK, PORT142_FN1),
798 PINMUX_DATA(CKO_MARK, PORT143_FN1),
799 PINMUX_DATA(NBRSTOUT_MARK, PORT144_FN1),
800 PINMUX_DATA(NBRST_MARK, PORT145_FN1),
801
802 /* 49-4 (FN) */
803 PINMUX_DATA(RFSPO0_MARK, PORT146_FN1),
804 PINMUX_DATA(PORT146_VIO_CKO2_MARK, PORT146_FN2),
805 PINMUX_DATA(TSTMD_MARK, PORT147_FN1),
806 PINMUX_DATA(VIO_VD_MARK, PORT148_FN1),
807 PINMUX_DATA(VIO_HD_MARK, PORT149_FN1),
808 PINMUX_DATA(VIO_D0_MARK, PORT150_FN1),
809 PINMUX_DATA(VIO_D1_MARK, PORT151_FN1),
810 PINMUX_DATA(VIO_D2_MARK, PORT152_FN1),
811 PINMUX_DATA(VIO_D3_MARK, PORT153_FN1),
812 PINMUX_DATA(VIO_D4_MARK, PORT154_FN1),
813 PINMUX_DATA(VIO_D5_MARK, PORT155_FN1),
814 PINMUX_DATA(VIO_D6_MARK, PORT156_FN1),
815 PINMUX_DATA(VIO_D7_MARK, PORT157_FN1),
816 PINMUX_DATA(VIO_D8_MARK, PORT158_FN1),
817 PINMUX_DATA(VIO_D9_MARK, PORT159_FN1),
818 PINMUX_DATA(VIO_D10_MARK, PORT160_FN1),
819 PINMUX_DATA(VIO_D11_MARK, PORT161_FN1),
820 PINMUX_DATA(VIO_D12_MARK, PORT162_FN1),
821 PINMUX_DATA(VIO_D13_MARK, PORT163_FN1),
822 PINMUX_DATA(VIO_D14_MARK, PORT164_FN1),
823 PINMUX_DATA(VIO_D15_MARK, PORT165_FN1),
824 PINMUX_DATA(VIO_CLK_MARK, PORT166_FN1),
825 PINMUX_DATA(VIO_FIELD_MARK, PORT167_FN1),
826 PINMUX_DATA(VIO_CKO_MARK, PORT168_FN1),
827 PINMUX_DATA(MFG3_IN1_MARK, PORT169_FN2),
828 PINMUX_DATA(MFG3_IN2_MARK, PORT170_FN2),
829 PINMUX_DATA(M9_SLCD_A01_MARK, PORT171_FN1),
830 PINMUX_DATA(MFG3_OUT1_MARK, PORT171_FN2),
831 PINMUX_DATA(TPU0TO0_MARK, PORT171_FN3),
832 PINMUX_DATA(M10_SLCD_CK1_MARK, PORT172_FN1),
833 PINMUX_DATA(MFG4_IN1_MARK, PORT172_FN2),
834 PINMUX_DATA(TPU0TO1_MARK, PORT172_FN3),
835 PINMUX_DATA(M11_SLCD_SO1_MARK, PORT173_FN1),
836 PINMUX_DATA(MFG4_IN2_MARK, PORT173_FN2),
837 PINMUX_DATA(TPU0TO2_MARK, PORT173_FN3),
838 PINMUX_DATA(M12_SLCD_CE1_MARK, PORT174_FN1),
839 PINMUX_DATA(MFG4_OUT1_MARK, PORT174_FN2),
840 PINMUX_DATA(TPU0TO3_MARK, PORT174_FN3),
841 PINMUX_DATA(LCDD0_MARK, PORT175_FN1),
842 PINMUX_DATA(PORT175_KEYOUT0_MARK, PORT175_FN2),
843 PINMUX_DATA(DV_D0_MARK, PORT175_FN3),
844 PINMUX_DATA(SIUCKA_MARK, PORT175_FN4),
845 PINMUX_DATA(MFG0_OUT2_MARK, PORT175_FN5),
846 PINMUX_DATA(LCDD1_MARK, PORT176_FN1),
847 PINMUX_DATA(PORT176_KEYOUT1_MARK, PORT176_FN2),
848 PINMUX_DATA(DV_D1_MARK, PORT176_FN3),
849 PINMUX_DATA(SIUAOLR_MARK, PORT176_FN4),
850 PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT176_FN5),
851 PINMUX_DATA(LCDD2_MARK, PORT177_FN1),
852 PINMUX_DATA(PORT177_KEYOUT2_MARK, PORT177_FN2),
853 PINMUX_DATA(DV_D2_MARK, PORT177_FN3),
854 PINMUX_DATA(SIUAOBT_MARK, PORT177_FN4),
855 PINMUX_DATA(BBIF2_TSCK1_MARK, PORT177_FN5),
856 PINMUX_DATA(LCDD3_MARK, PORT178_FN1),
857 PINMUX_DATA(PORT178_KEYOUT3_MARK, PORT178_FN2),
858 PINMUX_DATA(DV_D3_MARK, PORT178_FN3),
859 PINMUX_DATA(SIUAOSLD_MARK, PORT178_FN4),
860 PINMUX_DATA(BBIF2_TXD1_MARK, PORT178_FN5),
861 PINMUX_DATA(LCDD4_MARK, PORT179_FN1),
862 PINMUX_DATA(PORT179_KEYOUT4_MARK, PORT179_FN2),
863 PINMUX_DATA(DV_D4_MARK, PORT179_FN3),
864 PINMUX_DATA(SIUAISPD_MARK, PORT179_FN4),
865 PINMUX_DATA(MFG1_OUT2_MARK, PORT179_FN5),
866 PINMUX_DATA(LCDD5_MARK, PORT180_FN1),
867 PINMUX_DATA(PORT180_KEYOUT5_MARK, PORT180_FN2),
868 PINMUX_DATA(DV_D5_MARK, PORT180_FN3),
869 PINMUX_DATA(SIUAILR_MARK, PORT180_FN4),
870 PINMUX_DATA(MFG2_OUT2_MARK, PORT180_FN5),
871 PINMUX_DATA(LCDD6_MARK, PORT181_FN1),
872 PINMUX_DATA(DV_D6_MARK, PORT181_FN3),
873 PINMUX_DATA(SIUAIBT_MARK, PORT181_FN4),
874 PINMUX_DATA(MFG3_OUT2_MARK, PORT181_FN5),
875 PINMUX_DATA(XWR2_MARK, PORT181_FN7),
876 PINMUX_DATA(LCDD7_MARK, PORT182_FN1),
877 PINMUX_DATA(DV_D7_MARK, PORT182_FN3),
878 PINMUX_DATA(SIUAISLD_MARK, PORT182_FN4),
879 PINMUX_DATA(MFG4_OUT2_MARK, PORT182_FN5),
880 PINMUX_DATA(XWR3_MARK, PORT182_FN7),
881 PINMUX_DATA(LCDD8_MARK, PORT183_FN1),
882 PINMUX_DATA(DV_D8_MARK, PORT183_FN3),
883 PINMUX_DATA(D16_MARK, PORT183_FN6),
884 PINMUX_DATA(ED16_MARK, PORT183_FN7),
885 PINMUX_DATA(LCDD9_MARK, PORT184_FN1),
886 PINMUX_DATA(DV_D9_MARK, PORT184_FN3),
887 PINMUX_DATA(D17_MARK, PORT184_FN6),
888 PINMUX_DATA(ED17_MARK, PORT184_FN7),
889 PINMUX_DATA(LCDD10_MARK, PORT185_FN1),
890 PINMUX_DATA(DV_D10_MARK, PORT185_FN3),
891 PINMUX_DATA(D18_MARK, PORT185_FN6),
892 PINMUX_DATA(ED18_MARK, PORT185_FN7),
893 PINMUX_DATA(LCDD11_MARK, PORT186_FN1),
894 PINMUX_DATA(DV_D11_MARK, PORT186_FN3),
895 PINMUX_DATA(D19_MARK, PORT186_FN6),
896 PINMUX_DATA(ED19_MARK, PORT186_FN7),
897 PINMUX_DATA(LCDD12_MARK, PORT187_FN1),
898 PINMUX_DATA(DV_D12_MARK, PORT187_FN3),
899 PINMUX_DATA(D20_MARK, PORT187_FN6),
900 PINMUX_DATA(ED20_MARK, PORT187_FN7),
901 PINMUX_DATA(LCDD13_MARK, PORT188_FN1),
902 PINMUX_DATA(DV_D13_MARK, PORT188_FN3),
903 PINMUX_DATA(D21_MARK, PORT188_FN6),
904 PINMUX_DATA(ED21_MARK, PORT188_FN7),
905 PINMUX_DATA(LCDD14_MARK, PORT189_FN1),
906 PINMUX_DATA(DV_D14_MARK, PORT189_FN3),
907 PINMUX_DATA(D22_MARK, PORT189_FN6),
908 PINMUX_DATA(ED22_MARK, PORT189_FN7),
909 PINMUX_DATA(LCDD15_MARK, PORT190_FN1),
910 PINMUX_DATA(DV_D15_MARK, PORT190_FN3),
911 PINMUX_DATA(D23_MARK, PORT190_FN6),
912 PINMUX_DATA(ED23_MARK, PORT190_FN7),
913 PINMUX_DATA(LCDD16_MARK, PORT191_FN1),
914 PINMUX_DATA(DV_HSYNC_MARK, PORT191_FN3),
915 PINMUX_DATA(D24_MARK, PORT191_FN6),
916 PINMUX_DATA(ED24_MARK, PORT191_FN7),
917 PINMUX_DATA(LCDD17_MARK, PORT192_FN1),
918 PINMUX_DATA(DV_VSYNC_MARK, PORT192_FN3),
919 PINMUX_DATA(D25_MARK, PORT192_FN6),
920 PINMUX_DATA(ED25_MARK, PORT192_FN7),
921 PINMUX_DATA(LCDD18_MARK, PORT193_FN1),
922 PINMUX_DATA(DREQ2_MARK, PORT193_FN2),
923 PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT193_FN5),
924 PINMUX_DATA(D26_MARK, PORT193_FN6),
925 PINMUX_DATA(ED26_MARK, PORT193_FN7),
926 PINMUX_DATA(LCDD19_MARK, PORT194_FN1),
927 PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT194_FN5),
928 PINMUX_DATA(D27_MARK, PORT194_FN6),
929 PINMUX_DATA(ED27_MARK, PORT194_FN7),
930 PINMUX_DATA(LCDD20_MARK, PORT195_FN1),
931 PINMUX_DATA(TS_SPSYNC1_MARK, PORT195_FN2),
932 PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT195_FN5),
933 PINMUX_DATA(D28_MARK, PORT195_FN6),
934 PINMUX_DATA(ED28_MARK, PORT195_FN7),
935 PINMUX_DATA(LCDD21_MARK, PORT196_FN1),
936 PINMUX_DATA(TS_SDAT1_MARK, PORT196_FN2),
937 PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT196_FN5),
938 PINMUX_DATA(D29_MARK, PORT196_FN6),
939 PINMUX_DATA(ED29_MARK, PORT196_FN7),
940 PINMUX_DATA(LCDD22_MARK, PORT197_FN1),
941 PINMUX_DATA(TS_SDEN1_MARK, PORT197_FN2),
942 PINMUX_DATA(MSIOF0L_SS1_MARK, PORT197_FN5),
943 PINMUX_DATA(D30_MARK, PORT197_FN6),
944 PINMUX_DATA(ED30_MARK, PORT197_FN7),
945 PINMUX_DATA(LCDD23_MARK, PORT198_FN1),
946 PINMUX_DATA(TS_SCK1_MARK, PORT198_FN2),
947 PINMUX_DATA(MSIOF0L_SS2_MARK, PORT198_FN5),
948 PINMUX_DATA(D31_MARK, PORT198_FN6),
949 PINMUX_DATA(ED31_MARK, PORT198_FN7),
950 PINMUX_DATA(LCDDCK_MARK, PORT199_FN1),
951 PINMUX_DATA(LCDWR_MARK, PORT199_FN2),
952 PINMUX_DATA(DV_CKO_MARK, PORT199_FN3),
953 PINMUX_DATA(SIUAOSPD_MARK, PORT199_FN4),
954 PINMUX_DATA(LCDRD_MARK, PORT200_FN1),
955 PINMUX_DATA(DACK2_MARK, PORT200_FN2),
956 PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT200_FN5),
957
958 /* 49-5 (FN) */
959 PINMUX_DATA(LCDHSYN_MARK, PORT201_FN1),
960 PINMUX_DATA(LCDCS_MARK, PORT201_FN2),
961 PINMUX_DATA(LCDCS2_MARK, PORT201_FN3),
962 PINMUX_DATA(DACK3_MARK, PORT201_FN4),
963 PINMUX_DATA(LCDDISP_MARK, PORT202_FN1),
964 PINMUX_DATA(LCDRS_MARK, PORT202_FN2),
965 PINMUX_DATA(DREQ3_MARK, PORT202_FN4),
966 PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT202_FN5),
967 PINMUX_DATA(LCDCSYN_MARK, PORT203_FN1),
968 PINMUX_DATA(LCDCSYN2_MARK, PORT203_FN2),
969 PINMUX_DATA(DV_CKI_MARK, PORT203_FN3),
970 PINMUX_DATA(LCDLCLK_MARK, PORT204_FN1),
971 PINMUX_DATA(DREQ1_MARK, PORT204_FN3),
972 PINMUX_DATA(MSIOF0L_RXD_MARK, PORT204_FN5),
973 PINMUX_DATA(LCDDON_MARK, PORT205_FN1),
974 PINMUX_DATA(LCDDON2_MARK, PORT205_FN2),
975 PINMUX_DATA(DACK1_MARK, PORT205_FN3),
976 PINMUX_DATA(MSIOF0L_TXD_MARK, PORT205_FN5),
977 PINMUX_DATA(VIO_DR0_MARK, PORT206_FN1),
978 PINMUX_DATA(VIO_DR1_MARK, PORT207_FN1),
979 PINMUX_DATA(VIO_DR2_MARK, PORT208_FN1),
980 PINMUX_DATA(VIO_DR3_MARK, PORT209_FN1),
981 PINMUX_DATA(VIO_DR4_MARK, PORT210_FN1),
982 PINMUX_DATA(VIO_DR5_MARK, PORT211_FN1),
983 PINMUX_DATA(VIO_DR6_MARK, PORT212_FN1),
984 PINMUX_DATA(VIO_DR7_MARK, PORT213_FN1),
985 PINMUX_DATA(VIO_VDR_MARK, PORT214_FN1),
986 PINMUX_DATA(VIO_HDR_MARK, PORT215_FN1),
987 PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN1),
988 PINMUX_DATA(VIO_CKOR_MARK, PORT217_FN1),
989 PINMUX_DATA(SCIFA1_TXD_MARK, PORT220_FN2),
990 PINMUX_DATA(GPS_PGFA0_MARK, PORT220_FN3),
991 PINMUX_DATA(SCIFA1_SCK_MARK, PORT221_FN2),
992 PINMUX_DATA(GPS_PGFA1_MARK, PORT221_FN3),
993 PINMUX_DATA(SCIFA1_RTS_MARK, PORT222_FN2),
994 PINMUX_DATA(GPS_EPPSINMON_MARK, PORT222_FN3),
995 PINMUX_DATA(SCIFA1_RXD_MARK, PORT223_FN2),
996 PINMUX_DATA(SCIFA1_CTS_MARK, PORT224_FN2),
997 PINMUX_DATA(MSIOF1_TXD_MARK, PORT225_FN1),
998 PINMUX_DATA(SCIFA1_TXD2_MARK, PORT225_FN2),
999 PINMUX_DATA(GPS_TXD_MARK, PORT225_FN3),
1000 PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT226_FN1),
1001 PINMUX_DATA(SCIFA1_CTS2_MARK, PORT226_FN2),
1002 PINMUX_DATA(I2C_SDA2_MARK, PORT226_FN3),
1003 PINMUX_DATA(MSIOF1_TSCK_MARK, PORT227_FN1),
1004 PINMUX_DATA(SCIFA1_SCK2_MARK, PORT227_FN2),
1005 PINMUX_DATA(MSIOF1_RXD_MARK, PORT228_FN1),
1006 PINMUX_DATA(SCIFA1_RXD2_MARK, PORT228_FN2),
1007 PINMUX_DATA(GPS_RXD_MARK, PORT228_FN3),
1008 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT229_FN1),
1009 PINMUX_DATA(SCIFA1_RTS2_MARK, PORT229_FN2),
1010 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT230_FN1),
1011 PINMUX_DATA(I2C_SCL2_MARK, PORT230_FN3),
1012 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT231_FN1),
1013 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT232_FN1),
1014 PINMUX_DATA(MSIOF1_SS1_MARK, PORT233_FN1),
1015 PINMUX_DATA(EDBGREQ3_MARK, PORT233_FN2),
1016 PINMUX_DATA(MSIOF1_SS2_MARK, PORT234_FN1),
1017 PINMUX_DATA(PORT236_IROUT_MARK, PORT236_FN1),
1018 PINMUX_DATA(IRDA_OUT_MARK, PORT236_FN2),
1019 PINMUX_DATA(IRDA_IN_MARK, PORT237_FN2),
1020 PINMUX_DATA(IRDA_FIRSEL_MARK, PORT238_FN1),
1021 PINMUX_DATA(TPU1TO0_MARK, PORT239_FN3),
1022 PINMUX_DATA(TS_SPSYNC3_MARK, PORT239_FN4),
1023 PINMUX_DATA(TPU1TO1_MARK, PORT240_FN3),
1024 PINMUX_DATA(TS_SDAT3_MARK, PORT240_FN4),
1025 PINMUX_DATA(TPU1TO2_MARK, PORT241_FN3),
1026 PINMUX_DATA(TS_SDEN3_MARK, PORT241_FN4),
1027 PINMUX_DATA(PORT241_MSIOF2_SS1_MARK, PORT241_FN5),
1028 PINMUX_DATA(TPU1TO3_MARK, PORT242_FN3),
1029 PINMUX_DATA(PORT242_MSIOF2_TSCK_MARK, PORT242_FN5),
1030 PINMUX_DATA(M13_BSW_MARK, PORT243_FN2),
1031 PINMUX_DATA(PORT243_MSIOF2_TSYNC_MARK, PORT243_FN5),
1032 PINMUX_DATA(M14_GSW_MARK, PORT244_FN2),
1033 PINMUX_DATA(PORT244_MSIOF2_TXD_MARK, PORT244_FN5),
1034 PINMUX_DATA(PORT245_IROUT_MARK, PORT245_FN1),
1035 PINMUX_DATA(M15_RSW_MARK, PORT245_FN2),
1036 PINMUX_DATA(SOUT3_MARK, PORT246_FN1),
1037 PINMUX_DATA(SCIFA2_TXD1_MARK, PORT246_FN2),
1038 PINMUX_DATA(SIN3_MARK, PORT247_FN1),
1039 PINMUX_DATA(SCIFA2_RXD1_MARK, PORT247_FN2),
1040 PINMUX_DATA(XRTS3_MARK, PORT248_FN1),
1041 PINMUX_DATA(SCIFA2_RTS1_MARK, PORT248_FN2),
1042 PINMUX_DATA(PORT248_MSIOF2_SS2_MARK, PORT248_FN5),
1043 PINMUX_DATA(XCTS3_MARK, PORT249_FN1),
1044 PINMUX_DATA(SCIFA2_CTS1_MARK, PORT249_FN2),
1045 PINMUX_DATA(PORT249_MSIOF2_RXD_MARK, PORT249_FN5),
1046 PINMUX_DATA(DINT_MARK, PORT250_FN1),
1047 PINMUX_DATA(SCIFA2_SCK1_MARK, PORT250_FN2),
1048 PINMUX_DATA(TS_SCK3_MARK, PORT250_FN4),
1049 PINMUX_DATA(SDHICLK0_MARK, PORT251_FN1),
1050 PINMUX_DATA(TCK2_MARK, PORT251_FN2),
1051 PINMUX_DATA(SDHICD0_MARK, PORT252_FN1),
1052 PINMUX_DATA(SDHID0_0_MARK, PORT253_FN1),
1053 PINMUX_DATA(TMS2_MARK, PORT253_FN2),
1054 PINMUX_DATA(SDHID0_1_MARK, PORT254_FN1),
1055 PINMUX_DATA(TDO2_MARK, PORT254_FN2),
1056 PINMUX_DATA(SDHID0_2_MARK, PORT255_FN1),
1057 PINMUX_DATA(TDI2_MARK, PORT255_FN2),
1058 PINMUX_DATA(SDHID0_3_MARK, PORT256_FN1),
1059 PINMUX_DATA(RTCK2_MARK, PORT256_FN2),
1060
1061 /* 49-6 (FN) */
1062 PINMUX_DATA(SDHICMD0_MARK, PORT257_FN1),
1063 PINMUX_DATA(TRST2_MARK, PORT257_FN2),
1064 PINMUX_DATA(SDHIWP0_MARK, PORT258_FN1),
1065 PINMUX_DATA(EDBGREQ2_MARK, PORT258_FN2),
1066 PINMUX_DATA(SDHICLK1_MARK, PORT259_FN1),
1067 PINMUX_DATA(TCK3_MARK, PORT259_FN4),
1068 PINMUX_DATA(SDHID1_0_MARK, PORT260_FN1),
1069 PINMUX_DATA(M11_SLCD_SO2_MARK, PORT260_FN2),
1070 PINMUX_DATA(TS_SPSYNC2_MARK, PORT260_FN3),
1071 PINMUX_DATA(TMS3_MARK, PORT260_FN4),
1072 PINMUX_DATA(SDHID1_1_MARK, PORT261_FN1),
1073 PINMUX_DATA(M9_SLCD_AO2_MARK, PORT261_FN2),
1074 PINMUX_DATA(TS_SDAT2_MARK, PORT261_FN3),
1075 PINMUX_DATA(TDO3_MARK, PORT261_FN4),
1076 PINMUX_DATA(SDHID1_2_MARK, PORT262_FN1),
1077 PINMUX_DATA(M10_SLCD_CK2_MARK, PORT262_FN2),
1078 PINMUX_DATA(TS_SDEN2_MARK, PORT262_FN3),
1079 PINMUX_DATA(TDI3_MARK, PORT262_FN4),
1080 PINMUX_DATA(SDHID1_3_MARK, PORT263_FN1),
1081 PINMUX_DATA(M12_SLCD_CE2_MARK, PORT263_FN2),
1082 PINMUX_DATA(TS_SCK2_MARK, PORT263_FN3),
1083 PINMUX_DATA(RTCK3_MARK, PORT263_FN4),
1084 PINMUX_DATA(SDHICMD1_MARK, PORT264_FN1),
1085 PINMUX_DATA(TRST3_MARK, PORT264_FN4),
1086 PINMUX_DATA(SDHICLK2_MARK, PORT265_FN1),
1087 PINMUX_DATA(SCIFB_SCK_MARK, PORT265_FN2),
1088 PINMUX_DATA(SDHID2_0_MARK, PORT266_FN1),
1089 PINMUX_DATA(SCIFB_TXD_MARK, PORT266_FN2),
1090 PINMUX_DATA(SDHID2_1_MARK, PORT267_FN1),
1091 PINMUX_DATA(SCIFB_CTS_MARK, PORT267_FN2),
1092 PINMUX_DATA(SDHID2_2_MARK, PORT268_FN1),
1093 PINMUX_DATA(SCIFB_RXD_MARK, PORT268_FN2),
1094 PINMUX_DATA(SDHID2_3_MARK, PORT269_FN1),
1095 PINMUX_DATA(SCIFB_RTS_MARK, PORT269_FN2),
1096 PINMUX_DATA(SDHICMD2_MARK, PORT270_FN1),
1097 PINMUX_DATA(RESETOUTS_MARK, PORT271_FN1),
1098 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
1099};
1100
1101#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1102#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
1103#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1104
1105static struct pinmux_gpio pinmux_gpios[] = {
1106 /* 49-1 -> 49-6 (GPIO) */
1107 GPIO_PORT_273(),
1108
1109 /* Special Pull-up / Pull-down Functions */
1110 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
1111 GPIO_FN(PORT50_KEYIN2_PU), GPIO_FN(PORT55_KEYIN3_PU),
1112 GPIO_FN(PORT56_KEYIN4_PU), GPIO_FN(PORT57_KEYIN5_PU),
1113 GPIO_FN(PORT58_KEYIN6_PU),
1114
1115 /* 49-1 (FN) */
1116 GPIO_FN(VBUS0), GPIO_FN(CPORT0), GPIO_FN(CPORT1), GPIO_FN(CPORT2),
1117 GPIO_FN(CPORT3), GPIO_FN(CPORT4), GPIO_FN(CPORT5), GPIO_FN(CPORT6),
1118 GPIO_FN(CPORT7), GPIO_FN(CPORT8), GPIO_FN(CPORT9), GPIO_FN(CPORT10),
1119 GPIO_FN(CPORT11), GPIO_FN(SIN2), GPIO_FN(CPORT12), GPIO_FN(XCTS2),
1120 GPIO_FN(CPORT13), GPIO_FN(RFSPO4), GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
1121 GPIO_FN(CPORT15), GPIO_FN(CPORT16), GPIO_FN(CPORT17), GPIO_FN(SOUT2),
1122 GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(CPORT19), GPIO_FN(CPORT20),
1123 GPIO_FN(RFSPO6), GPIO_FN(CPORT21), GPIO_FN(STATUS0), GPIO_FN(CPORT22),
1124 GPIO_FN(STATUS1), GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
1125 GPIO_FN(MPORT0), GPIO_FN(MPORT1), GPIO_FN(B_SYNLD1), GPIO_FN(B_SYNLD2),
1126 GPIO_FN(XMAINPS), GPIO_FN(XDIVPS), GPIO_FN(XIDRST), GPIO_FN(IDCLK),
1127 GPIO_FN(IDIO), GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD),
1128 GPIO_FN(M02_BERDAT), GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
1129 GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
1130 GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
1131
1132 /* 49-2 (FN) */
1133 GPIO_FN(HSU_IQ_AGC6), GPIO_FN(MFG2_IN2), GPIO_FN(MSIOF2_MCK0),
1134 GPIO_FN(HSU_IQ_AGC5), GPIO_FN(MFG2_IN1), GPIO_FN(MSIOF2_MCK1),
1135 GPIO_FN(HSU_IQ_AGC4), GPIO_FN(MSIOF2_RSYNC),
1136 GPIO_FN(HSU_IQ_AGC3), GPIO_FN(MFG2_OUT1), GPIO_FN(MSIOF2_RSCK),
1137 GPIO_FN(HSU_IQ_AGC2), GPIO_FN(PORT42_KEYOUT0),
1138 GPIO_FN(HSU_IQ_AGC1), GPIO_FN(PORT43_KEYOUT1),
1139 GPIO_FN(HSU_IQ_AGC0), GPIO_FN(PORT44_KEYOUT2),
1140 GPIO_FN(HSU_IQ_AGC_ST), GPIO_FN(PORT45_KEYOUT3),
1141 GPIO_FN(HSU_IQ_PDO), GPIO_FN(PORT46_KEYOUT4),
1142 GPIO_FN(HSU_IQ_PYO), GPIO_FN(PORT47_KEYOUT5),
1143 GPIO_FN(HSU_EN_TXMUX_G3MO), GPIO_FN(PORT48_KEYIN0),
1144 GPIO_FN(HSU_I_TXMUX_G3MO), GPIO_FN(PORT49_KEYIN1),
1145 GPIO_FN(HSU_Q_TXMUX_G3MO), GPIO_FN(PORT50_KEYIN2),
1146 GPIO_FN(HSU_SYO), GPIO_FN(PORT51_MSIOF2_TSYNC),
1147 GPIO_FN(HSU_SDO), GPIO_FN(PORT52_MSIOF2_TSCK),
1148 GPIO_FN(HSU_TGTTI_G3MO), GPIO_FN(PORT53_MSIOF2_TXD),
1149 GPIO_FN(B_TIME_STAMP), GPIO_FN(PORT54_MSIOF2_RXD),
1150 GPIO_FN(HSU_SDI), GPIO_FN(PORT55_KEYIN3),
1151 GPIO_FN(HSU_SCO), GPIO_FN(PORT56_KEYIN4),
1152 GPIO_FN(HSU_DREQ), GPIO_FN(PORT57_KEYIN5),
1153 GPIO_FN(HSU_DACK), GPIO_FN(PORT58_KEYIN6),
1154 GPIO_FN(HSU_CLK61M), GPIO_FN(PORT59_MSIOF2_SS1),
1155 GPIO_FN(HSU_XRST), GPIO_FN(PORT60_MSIOF2_SS2),
1156 GPIO_FN(PCMCLKO), GPIO_FN(SYNC8KO), GPIO_FN(DNPCM_A), GPIO_FN(UPPCM_A),
1157 GPIO_FN(XTALB1L),
1158 GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
1159 GPIO_FN(GPS_AGC2), GPIO_FN(SCIFA0_SCK),
1160 GPIO_FN(GPS_AGC3), GPIO_FN(SCIFA0_TXD),
1161 GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
1162 GPIO_FN(GPS_PWRD), GPIO_FN(SCIFA0_CTS),
1163 GPIO_FN(GPS_IM), GPIO_FN(GPS_IS), GPIO_FN(GPS_QM), GPIO_FN(GPS_QS),
1164 GPIO_FN(SIUBOMC), GPIO_FN(TPU2TO0),
1165 GPIO_FN(SIUCKB), GPIO_FN(TPU2TO1),
1166 GPIO_FN(SIUBOLR), GPIO_FN(BBIF2_TSYNC), GPIO_FN(TPU2TO2),
1167 GPIO_FN(SIUBOBT), GPIO_FN(BBIF2_TSCK), GPIO_FN(TPU2TO3),
1168 GPIO_FN(SIUBOSLD), GPIO_FN(BBIF2_TXD), GPIO_FN(TPU3TO0),
1169 GPIO_FN(SIUBILR), GPIO_FN(TPU3TO1),
1170 GPIO_FN(SIUBIBT), GPIO_FN(TPU3TO2),
1171 GPIO_FN(SIUBISLD), GPIO_FN(TPU3TO3),
1172 GPIO_FN(NMI), GPIO_FN(TPU4TO0),
1173 GPIO_FN(DNPCM_M), GPIO_FN(TPU4TO1), GPIO_FN(TPU4TO2), GPIO_FN(TPU4TO3),
1174 GPIO_FN(IRQ_TMPB),
1175 GPIO_FN(PWEN), GPIO_FN(MFG1_OUT1),
1176 GPIO_FN(OVCN), GPIO_FN(MFG1_IN1),
1177 GPIO_FN(OVCN2), GPIO_FN(MFG1_IN2),
1178
1179 /* 49-3 (FN) */
1180 GPIO_FN(RFSPO1), GPIO_FN(RFSPO2), GPIO_FN(RFSPO3),
1181 GPIO_FN(PORT93_VIO_CKO2),
1182 GPIO_FN(USBTERM), GPIO_FN(EXTLP), GPIO_FN(IDIN),
1183 GPIO_FN(SCIFA5_CTS), GPIO_FN(MFG0_IN1),
1184 GPIO_FN(SCIFA5_RTS), GPIO_FN(MFG0_IN2),
1185 GPIO_FN(SCIFA5_RXD),
1186 GPIO_FN(SCIFA5_TXD),
1187 GPIO_FN(SCIFA5_SCK), GPIO_FN(MFG0_OUT1),
1188 GPIO_FN(A0_EA0), GPIO_FN(BS),
1189 GPIO_FN(A14_EA14), GPIO_FN(PORT102_KEYOUT0),
1190 GPIO_FN(A15_EA15), GPIO_FN(PORT103_KEYOUT1), GPIO_FN(DV_CLKOL),
1191 GPIO_FN(A16_EA16), GPIO_FN(PORT104_KEYOUT2),
1192 GPIO_FN(DV_VSYNCL), GPIO_FN(MSIOF0_SS1),
1193 GPIO_FN(A17_EA17), GPIO_FN(PORT105_KEYOUT3),
1194 GPIO_FN(DV_HSYNCL), GPIO_FN(MSIOF0_TSYNC),
1195 GPIO_FN(A18_EA18), GPIO_FN(PORT106_KEYOUT4),
1196 GPIO_FN(DV_DL0), GPIO_FN(MSIOF0_TSCK),
1197 GPIO_FN(A19_EA19), GPIO_FN(PORT107_KEYOUT5),
1198 GPIO_FN(DV_DL1), GPIO_FN(MSIOF0_TXD),
1199 GPIO_FN(A20_EA20), GPIO_FN(PORT108_KEYIN0),
1200 GPIO_FN(DV_DL2), GPIO_FN(MSIOF0_RSCK),
1201 GPIO_FN(A21_EA21), GPIO_FN(PORT109_KEYIN1),
1202 GPIO_FN(DV_DL3), GPIO_FN(MSIOF0_RSYNC),
1203 GPIO_FN(A22_EA22), GPIO_FN(PORT110_KEYIN2),
1204 GPIO_FN(DV_DL4), GPIO_FN(MSIOF0_MCK0),
1205 GPIO_FN(A23_EA23), GPIO_FN(PORT111_KEYIN3),
1206 GPIO_FN(DV_DL5), GPIO_FN(MSIOF0_MCK1),
1207 GPIO_FN(A24_EA24), GPIO_FN(PORT112_KEYIN4),
1208 GPIO_FN(DV_DL6), GPIO_FN(MSIOF0_RXD),
1209 GPIO_FN(A25_EA25), GPIO_FN(PORT113_KEYIN5),
1210 GPIO_FN(DV_DL7), GPIO_FN(MSIOF0_SS2),
1211 GPIO_FN(A26), GPIO_FN(PORT113_KEYIN6), GPIO_FN(DV_CLKIL),
1212 GPIO_FN(D0_ED0_NAF0), GPIO_FN(D1_ED1_NAF1), GPIO_FN(D2_ED2_NAF2),
1213 GPIO_FN(D3_ED3_NAF3), GPIO_FN(D4_ED4_NAF4), GPIO_FN(D5_ED5_NAF5),
1214 GPIO_FN(D6_ED6_NAF6), GPIO_FN(D7_ED7_NAF7), GPIO_FN(D8_ED8_NAF8),
1215 GPIO_FN(D9_ED9_NAF9), GPIO_FN(D10_ED10_NAF10), GPIO_FN(D11_ED11_NAF11),
1216 GPIO_FN(D12_ED12_NAF12), GPIO_FN(D13_ED13_NAF13),
1217 GPIO_FN(D14_ED14_NAF14), GPIO_FN(D15_ED15_NAF15),
1218 GPIO_FN(CS4), GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(FCE1),
1219 GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(FCE0), GPIO_FN(CS6A),
1220 GPIO_FN(DACK0), GPIO_FN(WAIT), GPIO_FN(DREQ0), GPIO_FN(RD_XRD),
1221 GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(WE0_XWR0_FWE),
1222 GPIO_FN(WE1_XWR1), GPIO_FN(FRB), GPIO_FN(CKO),
1223 GPIO_FN(NBRSTOUT), GPIO_FN(NBRST),
1224
1225 /* 49-4 (FN) */
1226 GPIO_FN(RFSPO0), GPIO_FN(PORT146_VIO_CKO2), GPIO_FN(TSTMD),
1227 GPIO_FN(VIO_VD), GPIO_FN(VIO_HD),
1228 GPIO_FN(VIO_D0), GPIO_FN(VIO_D1), GPIO_FN(VIO_D2),
1229 GPIO_FN(VIO_D3), GPIO_FN(VIO_D4), GPIO_FN(VIO_D5),
1230 GPIO_FN(VIO_D6), GPIO_FN(VIO_D7), GPIO_FN(VIO_D8),
1231 GPIO_FN(VIO_D9), GPIO_FN(VIO_D10), GPIO_FN(VIO_D11),
1232 GPIO_FN(VIO_D12), GPIO_FN(VIO_D13), GPIO_FN(VIO_D14),
1233 GPIO_FN(VIO_D15), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
1234 GPIO_FN(VIO_CKO),
1235 GPIO_FN(MFG3_IN1), GPIO_FN(MFG3_IN2),
1236 GPIO_FN(M9_SLCD_A01), GPIO_FN(MFG3_OUT1), GPIO_FN(TPU0TO0),
1237 GPIO_FN(M10_SLCD_CK1), GPIO_FN(MFG4_IN1), GPIO_FN(TPU0TO1),
1238 GPIO_FN(M11_SLCD_SO1), GPIO_FN(MFG4_IN2), GPIO_FN(TPU0TO2),
1239 GPIO_FN(M12_SLCD_CE1), GPIO_FN(MFG4_OUT1), GPIO_FN(TPU0TO3),
1240 GPIO_FN(LCDD0), GPIO_FN(PORT175_KEYOUT0), GPIO_FN(DV_D0),
1241 GPIO_FN(SIUCKA), GPIO_FN(MFG0_OUT2),
1242 GPIO_FN(LCDD1), GPIO_FN(PORT176_KEYOUT1), GPIO_FN(DV_D1),
1243 GPIO_FN(SIUAOLR), GPIO_FN(BBIF2_TSYNC1),
1244 GPIO_FN(LCDD2), GPIO_FN(PORT177_KEYOUT2), GPIO_FN(DV_D2),
1245 GPIO_FN(SIUAOBT), GPIO_FN(BBIF2_TSCK1),
1246 GPIO_FN(LCDD3), GPIO_FN(PORT178_KEYOUT3), GPIO_FN(DV_D3),
1247 GPIO_FN(SIUAOSLD), GPIO_FN(BBIF2_TXD1),
1248 GPIO_FN(LCDD4), GPIO_FN(PORT179_KEYOUT4), GPIO_FN(DV_D4),
1249 GPIO_FN(SIUAISPD), GPIO_FN(MFG1_OUT2),
1250 GPIO_FN(LCDD5), GPIO_FN(PORT180_KEYOUT5), GPIO_FN(DV_D5),
1251 GPIO_FN(SIUAILR), GPIO_FN(MFG2_OUT2),
1252 GPIO_FN(LCDD6), GPIO_FN(DV_D6),
1253 GPIO_FN(SIUAIBT), GPIO_FN(MFG3_OUT2), GPIO_FN(XWR2),
1254 GPIO_FN(LCDD7), GPIO_FN(DV_D7),
1255 GPIO_FN(SIUAISLD), GPIO_FN(MFG4_OUT2), GPIO_FN(XWR3),
1256 GPIO_FN(LCDD8), GPIO_FN(DV_D8), GPIO_FN(D16), GPIO_FN(ED16),
1257 GPIO_FN(LCDD9), GPIO_FN(DV_D9), GPIO_FN(D17), GPIO_FN(ED17),
1258 GPIO_FN(LCDD10), GPIO_FN(DV_D10), GPIO_FN(D18), GPIO_FN(ED18),
1259 GPIO_FN(LCDD11), GPIO_FN(DV_D11), GPIO_FN(D19), GPIO_FN(ED19),
1260 GPIO_FN(LCDD12), GPIO_FN(DV_D12), GPIO_FN(D20), GPIO_FN(ED20),
1261 GPIO_FN(LCDD13), GPIO_FN(DV_D13), GPIO_FN(D21), GPIO_FN(ED21),
1262 GPIO_FN(LCDD14), GPIO_FN(DV_D14), GPIO_FN(D22), GPIO_FN(ED22),
1263 GPIO_FN(LCDD15), GPIO_FN(DV_D15), GPIO_FN(D23), GPIO_FN(ED23),
1264 GPIO_FN(LCDD16), GPIO_FN(DV_HSYNC), GPIO_FN(D24), GPIO_FN(ED24),
1265 GPIO_FN(LCDD17), GPIO_FN(DV_VSYNC), GPIO_FN(D25), GPIO_FN(ED25),
1266 GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(MSIOF0L_TSCK),
1267 GPIO_FN(D26), GPIO_FN(ED26),
1268 GPIO_FN(LCDD19), GPIO_FN(MSIOF0L_TSYNC),
1269 GPIO_FN(D27), GPIO_FN(ED27),
1270 GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
1271 GPIO_FN(D28), GPIO_FN(ED28),
1272 GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
1273 GPIO_FN(D29), GPIO_FN(ED29),
1274 GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_SS1),
1275 GPIO_FN(D30), GPIO_FN(ED30),
1276 GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_SS2),
1277 GPIO_FN(D31), GPIO_FN(ED31),
1278 GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(DV_CKO), GPIO_FN(SIUAOSPD),
1279 GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_RSYNC),
1280
1281 /* 49-5 (FN) */
1282 GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
1283 GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_RSCK),
1284 GPIO_FN(LCDCSYN), GPIO_FN(LCDCSYN2), GPIO_FN(DV_CKI),
1285 GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(MSIOF0L_RXD),
1286 GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(MSIOF0L_TXD),
1287 GPIO_FN(VIO_DR0), GPIO_FN(VIO_DR1), GPIO_FN(VIO_DR2), GPIO_FN(VIO_DR3),
1288 GPIO_FN(VIO_DR4), GPIO_FN(VIO_DR5), GPIO_FN(VIO_DR6), GPIO_FN(VIO_DR7),
1289 GPIO_FN(VIO_VDR), GPIO_FN(VIO_HDR),
1290 GPIO_FN(VIO_CLKR), GPIO_FN(VIO_CKOR),
1291 GPIO_FN(SCIFA1_TXD), GPIO_FN(GPS_PGFA0),
1292 GPIO_FN(SCIFA1_SCK), GPIO_FN(GPS_PGFA1),
1293 GPIO_FN(SCIFA1_RTS), GPIO_FN(GPS_EPPSINMON),
1294 GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_CTS),
1295 GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA1_TXD2), GPIO_FN(GPS_TXD),
1296 GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA1_CTS2), GPIO_FN(I2C_SDA2),
1297 GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA1_SCK2),
1298 GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA1_RXD2), GPIO_FN(GPS_RXD),
1299 GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA1_RTS2),
1300 GPIO_FN(MSIOF1_RSYNC), GPIO_FN(I2C_SCL2),
1301 GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
1302 GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
1303 GPIO_FN(MSIOF1_SS2),
1304 GPIO_FN(PORT236_IROUT), GPIO_FN(IRDA_OUT),
1305 GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
1306 GPIO_FN(TPU1TO0), GPIO_FN(TS_SPSYNC3),
1307 GPIO_FN(TPU1TO1), GPIO_FN(TS_SDAT3),
1308 GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT241_MSIOF2_SS1),
1309 GPIO_FN(TPU1TO3), GPIO_FN(PORT242_MSIOF2_TSCK),
1310 GPIO_FN(M13_BSW), GPIO_FN(PORT243_MSIOF2_TSYNC),
1311 GPIO_FN(M14_GSW), GPIO_FN(PORT244_MSIOF2_TXD),
1312 GPIO_FN(PORT245_IROUT), GPIO_FN(M15_RSW),
1313 GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1),
1314 GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1),
1315 GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT248_MSIOF2_SS2),
1316 GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT249_MSIOF2_RXD),
1317 GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
1318 GPIO_FN(SDHICLK0), GPIO_FN(TCK2),
1319 GPIO_FN(SDHICD0),
1320 GPIO_FN(SDHID0_0), GPIO_FN(TMS2),
1321 GPIO_FN(SDHID0_1), GPIO_FN(TDO2),
1322 GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
1323 GPIO_FN(SDHID0_3), GPIO_FN(RTCK2),
1324
1325 /* 49-6 (FN) */
1326 GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
1327 GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
1328 GPIO_FN(SDHICLK1), GPIO_FN(TCK3),
1329 GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2),
1330 GPIO_FN(TS_SPSYNC2), GPIO_FN(TMS3),
1331 GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_AO2),
1332 GPIO_FN(TS_SDAT2), GPIO_FN(TDO3),
1333 GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2),
1334 GPIO_FN(TS_SDEN2), GPIO_FN(TDI3),
1335 GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2),
1336 GPIO_FN(TS_SCK2), GPIO_FN(RTCK3),
1337 GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
1338 GPIO_FN(SDHICLK2), GPIO_FN(SCIFB_SCK),
1339 GPIO_FN(SDHID2_0), GPIO_FN(SCIFB_TXD),
1340 GPIO_FN(SDHID2_1), GPIO_FN(SCIFB_CTS),
1341 GPIO_FN(SDHID2_2), GPIO_FN(SCIFB_RXD),
1342 GPIO_FN(SDHID2_3), GPIO_FN(SCIFB_RTS),
1343 GPIO_FN(SDHICMD2),
1344 GPIO_FN(RESETOUTS),
1345 GPIO_FN(DIVLOCK),
1346};
1347
1348/* helper for top 4 bits in PORTnCR */
1349#define PCRH(in, in_pd, in_pu, out) \
1350 0, (out), (in), 0, \
1351 0, 0, 0, 0, \
1352 0, 0, (in_pd), 0, \
1353 0, 0, (in_pu), 0
1354
1355#define PORTCR(nr, reg) \
1356 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1357 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1358 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1359 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1360 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1361 PORT##nr##_FN6, PORT##nr##_FN7 } \
1362 }
1363
1364static struct pinmux_cfg_reg pinmux_config_regs[] = {
1365 PORTCR(0, 0xe6050000), /* PORT0CR */
1366 PORTCR(1, 0xe6050001), /* PORT1CR */
1367 PORTCR(2, 0xe6050002), /* PORT2CR */
1368 PORTCR(3, 0xe6050003), /* PORT3CR */
1369 PORTCR(4, 0xe6050004), /* PORT4CR */
1370 PORTCR(5, 0xe6050005), /* PORT5CR */
1371 PORTCR(6, 0xe6050006), /* PORT6CR */
1372 PORTCR(7, 0xe6050007), /* PORT7CR */
1373 PORTCR(8, 0xe6050008), /* PORT8CR */
1374 PORTCR(9, 0xe6050009), /* PORT9CR */
1375
1376 PORTCR(10, 0xe605000a), /* PORT10CR */
1377 PORTCR(11, 0xe605000b), /* PORT11CR */
1378 PORTCR(12, 0xe605000c), /* PORT12CR */
1379 PORTCR(13, 0xe605000d), /* PORT13CR */
1380 PORTCR(14, 0xe605000e), /* PORT14CR */
1381 PORTCR(15, 0xe605000f), /* PORT15CR */
1382 PORTCR(16, 0xe6050010), /* PORT16CR */
1383 PORTCR(17, 0xe6050011), /* PORT17CR */
1384 PORTCR(18, 0xe6050012), /* PORT18CR */
1385 PORTCR(19, 0xe6050013), /* PORT19CR */
1386
1387 PORTCR(20, 0xe6050014), /* PORT20CR */
1388 PORTCR(21, 0xe6050015), /* PORT21CR */
1389 PORTCR(22, 0xe6050016), /* PORT22CR */
1390 PORTCR(23, 0xe6050017), /* PORT23CR */
1391 PORTCR(24, 0xe6050018), /* PORT24CR */
1392 PORTCR(25, 0xe6050019), /* PORT25CR */
1393 PORTCR(26, 0xe605001a), /* PORT26CR */
1394 PORTCR(27, 0xe605001b), /* PORT27CR */
1395 PORTCR(28, 0xe605001c), /* PORT28CR */
1396 PORTCR(29, 0xe605001d), /* PORT29CR */
1397
1398 PORTCR(30, 0xe605001e), /* PORT30CR */
1399 PORTCR(31, 0xe605001f), /* PORT31CR */
1400 PORTCR(32, 0xe6050020), /* PORT32CR */
1401 PORTCR(33, 0xe6050021), /* PORT33CR */
1402 PORTCR(34, 0xe6050022), /* PORT34CR */
1403 PORTCR(35, 0xe6050023), /* PORT35CR */
1404 PORTCR(36, 0xe6050024), /* PORT36CR */
1405 PORTCR(37, 0xe6050025), /* PORT37CR */
1406 PORTCR(38, 0xe6050026), /* PORT38CR */
1407 PORTCR(39, 0xe6050027), /* PORT39CR */
1408
1409 PORTCR(40, 0xe6050028), /* PORT40CR */
1410 PORTCR(41, 0xe6050029), /* PORT41CR */
1411 PORTCR(42, 0xe605002a), /* PORT42CR */
1412 PORTCR(43, 0xe605002b), /* PORT43CR */
1413 PORTCR(44, 0xe605002c), /* PORT44CR */
1414 PORTCR(45, 0xe605002d), /* PORT45CR */
1415 PORTCR(46, 0xe605002e), /* PORT46CR */
1416 PORTCR(47, 0xe605002f), /* PORT47CR */
1417 PORTCR(48, 0xe6050030), /* PORT48CR */
1418 PORTCR(49, 0xe6050031), /* PORT49CR */
1419
1420 PORTCR(50, 0xe6050032), /* PORT50CR */
1421 PORTCR(51, 0xe6050033), /* PORT51CR */
1422 PORTCR(52, 0xe6050034), /* PORT52CR */
1423 PORTCR(53, 0xe6050035), /* PORT53CR */
1424 PORTCR(54, 0xe6050036), /* PORT54CR */
1425 PORTCR(55, 0xe6050037), /* PORT55CR */
1426 PORTCR(56, 0xe6050038), /* PORT56CR */
1427 PORTCR(57, 0xe6050039), /* PORT57CR */
1428 PORTCR(58, 0xe605003a), /* PORT58CR */
1429 PORTCR(59, 0xe605003b), /* PORT59CR */
1430
1431 PORTCR(60, 0xe605003c), /* PORT60CR */
1432 PORTCR(61, 0xe605003d), /* PORT61CR */
1433 PORTCR(62, 0xe605003e), /* PORT62CR */
1434 PORTCR(63, 0xe605003f), /* PORT63CR */
1435 PORTCR(64, 0xe6050040), /* PORT64CR */
1436 PORTCR(65, 0xe6050041), /* PORT65CR */
1437 PORTCR(66, 0xe6050042), /* PORT66CR */
1438 PORTCR(67, 0xe6050043), /* PORT67CR */
1439 PORTCR(68, 0xe6050044), /* PORT68CR */
1440 PORTCR(69, 0xe6050045), /* PORT69CR */
1441
1442 PORTCR(70, 0xe6050046), /* PORT70CR */
1443 PORTCR(71, 0xe6050047), /* PORT71CR */
1444 PORTCR(72, 0xe6050048), /* PORT72CR */
1445 PORTCR(73, 0xe6050049), /* PORT73CR */
1446 PORTCR(74, 0xe605004a), /* PORT74CR */
1447 PORTCR(75, 0xe605004b), /* PORT75CR */
1448 PORTCR(76, 0xe605004c), /* PORT76CR */
1449 PORTCR(77, 0xe605004d), /* PORT77CR */
1450 PORTCR(78, 0xe605004e), /* PORT78CR */
1451 PORTCR(79, 0xe605004f), /* PORT79CR */
1452
1453 PORTCR(80, 0xe6050050), /* PORT80CR */
1454 PORTCR(81, 0xe6050051), /* PORT81CR */
1455 PORTCR(82, 0xe6050052), /* PORT82CR */
1456 PORTCR(83, 0xe6050053), /* PORT83CR */
1457 PORTCR(84, 0xe6050054), /* PORT84CR */
1458 PORTCR(85, 0xe6050055), /* PORT85CR */
1459 PORTCR(86, 0xe6050056), /* PORT86CR */
1460 PORTCR(87, 0xe6050057), /* PORT87CR */
1461 PORTCR(88, 0xe6051058), /* PORT88CR */
1462 PORTCR(89, 0xe6051059), /* PORT89CR */
1463
1464 PORTCR(90, 0xe605105a), /* PORT90CR */
1465 PORTCR(91, 0xe605105b), /* PORT91CR */
1466 PORTCR(92, 0xe605105c), /* PORT92CR */
1467 PORTCR(93, 0xe605105d), /* PORT93CR */
1468 PORTCR(94, 0xe605105e), /* PORT94CR */
1469 PORTCR(95, 0xe605105f), /* PORT95CR */
1470 PORTCR(96, 0xe6051060), /* PORT96CR */
1471 PORTCR(97, 0xe6051061), /* PORT97CR */
1472 PORTCR(98, 0xe6051062), /* PORT98CR */
1473 PORTCR(99, 0xe6051063), /* PORT99CR */
1474
1475 PORTCR(100, 0xe6051064), /* PORT100CR */
1476 PORTCR(101, 0xe6051065), /* PORT101CR */
1477 PORTCR(102, 0xe6051066), /* PORT102CR */
1478 PORTCR(103, 0xe6051067), /* PORT103CR */
1479 PORTCR(104, 0xe6051068), /* PORT104CR */
1480 PORTCR(105, 0xe6051069), /* PORT105CR */
1481 PORTCR(106, 0xe605106a), /* PORT106CR */
1482 PORTCR(107, 0xe605106b), /* PORT107CR */
1483 PORTCR(108, 0xe605106c), /* PORT108CR */
1484 PORTCR(109, 0xe605106d), /* PORT109CR */
1485
1486 PORTCR(110, 0xe605106e), /* PORT110CR */
1487 PORTCR(111, 0xe605106f), /* PORT111CR */
1488 PORTCR(112, 0xe6051070), /* PORT112CR */
1489 PORTCR(113, 0xe6051071), /* PORT113CR */
1490 PORTCR(114, 0xe6051072), /* PORT114CR */
1491 PORTCR(115, 0xe6051073), /* PORT115CR */
1492 PORTCR(116, 0xe6051074), /* PORT116CR */
1493 PORTCR(117, 0xe6051075), /* PORT117CR */
1494 PORTCR(118, 0xe6051076), /* PORT118CR */
1495 PORTCR(119, 0xe6051077), /* PORT119CR */
1496
1497 PORTCR(120, 0xe6051078), /* PORT120CR */
1498 PORTCR(121, 0xe6051079), /* PORT121CR */
1499 PORTCR(122, 0xe605107a), /* PORT122CR */
1500 PORTCR(123, 0xe605107b), /* PORT123CR */
1501 PORTCR(124, 0xe605107c), /* PORT124CR */
1502 PORTCR(125, 0xe605107d), /* PORT125CR */
1503 PORTCR(126, 0xe605107e), /* PORT126CR */
1504 PORTCR(127, 0xe605107f), /* PORT127CR */
1505 PORTCR(128, 0xe6051080), /* PORT128CR */
1506 PORTCR(129, 0xe6051081), /* PORT129CR */
1507
1508 PORTCR(130, 0xe6051082), /* PORT130CR */
1509 PORTCR(131, 0xe6051083), /* PORT131CR */
1510 PORTCR(132, 0xe6051084), /* PORT132CR */
1511 PORTCR(133, 0xe6051085), /* PORT133CR */
1512 PORTCR(134, 0xe6051086), /* PORT134CR */
1513 PORTCR(135, 0xe6051087), /* PORT135CR */
1514 PORTCR(136, 0xe6051088), /* PORT136CR */
1515 PORTCR(137, 0xe6051089), /* PORT137CR */
1516 PORTCR(138, 0xe605108a), /* PORT138CR */
1517 PORTCR(139, 0xe605108b), /* PORT139CR */
1518
1519 PORTCR(140, 0xe605108c), /* PORT140CR */
1520 PORTCR(141, 0xe605108d), /* PORT141CR */
1521 PORTCR(142, 0xe605108e), /* PORT142CR */
1522 PORTCR(143, 0xe605108f), /* PORT143CR */
1523 PORTCR(144, 0xe6051090), /* PORT144CR */
1524 PORTCR(145, 0xe6051091), /* PORT145CR */
1525 PORTCR(146, 0xe6051092), /* PORT146CR */
1526 PORTCR(147, 0xe6051093), /* PORT147CR */
1527 PORTCR(148, 0xe6051094), /* PORT148CR */
1528 PORTCR(149, 0xe6051095), /* PORT149CR */
1529
1530 PORTCR(150, 0xe6051096), /* PORT150CR */
1531 PORTCR(151, 0xe6051097), /* PORT151CR */
1532 PORTCR(152, 0xe6051098), /* PORT152CR */
1533 PORTCR(153, 0xe6051099), /* PORT153CR */
1534 PORTCR(154, 0xe605109a), /* PORT154CR */
1535 PORTCR(155, 0xe605109b), /* PORT155CR */
1536 PORTCR(156, 0xe605109c), /* PORT156CR */
1537 PORTCR(157, 0xe605109d), /* PORT157CR */
1538 PORTCR(158, 0xe605109e), /* PORT158CR */
1539 PORTCR(159, 0xe605109f), /* PORT159CR */
1540
1541 PORTCR(160, 0xe60510a0), /* PORT160CR */
1542 PORTCR(161, 0xe60510a1), /* PORT161CR */
1543 PORTCR(162, 0xe60510a2), /* PORT162CR */
1544 PORTCR(163, 0xe60510a3), /* PORT163CR */
1545 PORTCR(164, 0xe60510a4), /* PORT164CR */
1546 PORTCR(165, 0xe60510a5), /* PORT165CR */
1547 PORTCR(166, 0xe60510a6), /* PORT166CR */
1548 PORTCR(167, 0xe60510a7), /* PORT167CR */
1549 PORTCR(168, 0xe60510a8), /* PORT168CR */
1550 PORTCR(169, 0xe60510a9), /* PORT169CR */
1551
1552 PORTCR(170, 0xe60510aa), /* PORT170CR */
1553 PORTCR(171, 0xe60510ab), /* PORT171CR */
1554 PORTCR(172, 0xe60510ac), /* PORT172CR */
1555 PORTCR(173, 0xe60510ad), /* PORT173CR */
1556 PORTCR(174, 0xe60510ae), /* PORT174CR */
1557 PORTCR(175, 0xe60520af), /* PORT175CR */
1558 PORTCR(176, 0xe60520b0), /* PORT176CR */
1559 PORTCR(177, 0xe60520b1), /* PORT177CR */
1560 PORTCR(178, 0xe60520b2), /* PORT178CR */
1561 PORTCR(179, 0xe60520b3), /* PORT179CR */
1562
1563 PORTCR(180, 0xe60520b4), /* PORT180CR */
1564 PORTCR(181, 0xe60520b5), /* PORT181CR */
1565 PORTCR(182, 0xe60520b6), /* PORT182CR */
1566 PORTCR(183, 0xe60520b7), /* PORT183CR */
1567 PORTCR(184, 0xe60520b8), /* PORT184CR */
1568 PORTCR(185, 0xe60520b9), /* PORT185CR */
1569 PORTCR(186, 0xe60520ba), /* PORT186CR */
1570 PORTCR(187, 0xe60520bb), /* PORT187CR */
1571 PORTCR(188, 0xe60520bc), /* PORT188CR */
1572 PORTCR(189, 0xe60520bd), /* PORT189CR */
1573
1574 PORTCR(190, 0xe60520be), /* PORT190CR */
1575 PORTCR(191, 0xe60520bf), /* PORT191CR */
1576 PORTCR(192, 0xe60520c0), /* PORT192CR */
1577 PORTCR(193, 0xe60520c1), /* PORT193CR */
1578 PORTCR(194, 0xe60520c2), /* PORT194CR */
1579 PORTCR(195, 0xe60520c3), /* PORT195CR */
1580 PORTCR(196, 0xe60520c4), /* PORT196CR */
1581 PORTCR(197, 0xe60520c5), /* PORT197CR */
1582 PORTCR(198, 0xe60520c6), /* PORT198CR */
1583 PORTCR(199, 0xe60520c7), /* PORT199CR */
1584
1585 PORTCR(200, 0xe60520c8), /* PORT200CR */
1586 PORTCR(201, 0xe60520c9), /* PORT201CR */
1587 PORTCR(202, 0xe60520ca), /* PORT202CR */
1588 PORTCR(203, 0xe60520cb), /* PORT203CR */
1589 PORTCR(204, 0xe60520cc), /* PORT204CR */
1590 PORTCR(205, 0xe60520cd), /* PORT205CR */
1591 PORTCR(206, 0xe60520ce), /* PORT206CR */
1592 PORTCR(207, 0xe60520cf), /* PORT207CR */
1593 PORTCR(208, 0xe60520d0), /* PORT208CR */
1594 PORTCR(209, 0xe60520d1), /* PORT209CR */
1595
1596 PORTCR(210, 0xe60520d2), /* PORT210CR */
1597 PORTCR(211, 0xe60520d3), /* PORT211CR */
1598 PORTCR(212, 0xe60520d4), /* PORT212CR */
1599 PORTCR(213, 0xe60520d5), /* PORT213CR */
1600 PORTCR(214, 0xe60520d6), /* PORT214CR */
1601 PORTCR(215, 0xe60520d7), /* PORT215CR */
1602 PORTCR(216, 0xe60520d8), /* PORT216CR */
1603 PORTCR(217, 0xe60520d9), /* PORT217CR */
1604 PORTCR(218, 0xe60520da), /* PORT218CR */
1605 PORTCR(219, 0xe60520db), /* PORT219CR */
1606
1607 PORTCR(220, 0xe60520dc), /* PORT220CR */
1608 PORTCR(221, 0xe60520dd), /* PORT221CR */
1609 PORTCR(222, 0xe60520de), /* PORT222CR */
1610 PORTCR(223, 0xe60520df), /* PORT223CR */
1611 PORTCR(224, 0xe60520e0), /* PORT224CR */
1612 PORTCR(225, 0xe60520e1), /* PORT225CR */
1613 PORTCR(226, 0xe60520e2), /* PORT226CR */
1614 PORTCR(227, 0xe60520e3), /* PORT227CR */
1615 PORTCR(228, 0xe60520e4), /* PORT228CR */
1616 PORTCR(229, 0xe60520e5), /* PORT229CR */
1617
1618 PORTCR(230, 0xe60520e6), /* PORT230CR */
1619 PORTCR(231, 0xe60520e7), /* PORT231CR */
1620 PORTCR(232, 0xe60520e8), /* PORT232CR */
1621 PORTCR(233, 0xe60520e9), /* PORT233CR */
1622 PORTCR(234, 0xe60520ea), /* PORT234CR */
1623 PORTCR(235, 0xe60520eb), /* PORT235CR */
1624 PORTCR(236, 0xe60530ec), /* PORT236CR */
1625 PORTCR(237, 0xe60530ed), /* PORT237CR */
1626 PORTCR(238, 0xe60530ee), /* PORT238CR */
1627 PORTCR(239, 0xe60530ef), /* PORT239CR */
1628
1629 PORTCR(240, 0xe60530f0), /* PORT240CR */
1630 PORTCR(241, 0xe60530f1), /* PORT241CR */
1631 PORTCR(242, 0xe60530f2), /* PORT242CR */
1632 PORTCR(243, 0xe60530f3), /* PORT243CR */
1633 PORTCR(244, 0xe60530f4), /* PORT244CR */
1634 PORTCR(245, 0xe60530f5), /* PORT245CR */
1635 PORTCR(246, 0xe60530f6), /* PORT246CR */
1636 PORTCR(247, 0xe60530f7), /* PORT247CR */
1637 PORTCR(248, 0xe60530f8), /* PORT248CR */
1638 PORTCR(249, 0xe60530f9), /* PORT249CR */
1639
1640 PORTCR(250, 0xe60530fa), /* PORT250CR */
1641 PORTCR(251, 0xe60530fb), /* PORT251CR */
1642 PORTCR(252, 0xe60530fc), /* PORT252CR */
1643 PORTCR(253, 0xe60530fd), /* PORT253CR */
1644 PORTCR(254, 0xe60530fe), /* PORT254CR */
1645 PORTCR(255, 0xe60530ff), /* PORT255CR */
1646 PORTCR(256, 0xe6053100), /* PORT256CR */
1647 PORTCR(257, 0xe6053101), /* PORT257CR */
1648 PORTCR(258, 0xe6053102), /* PORT258CR */
1649 PORTCR(259, 0xe6053103), /* PORT259CR */
1650
1651 PORTCR(260, 0xe6053104), /* PORT260CR */
1652 PORTCR(261, 0xe6053105), /* PORT261CR */
1653 PORTCR(262, 0xe6053106), /* PORT262CR */
1654 PORTCR(263, 0xe6053107), /* PORT263CR */
1655 PORTCR(264, 0xe6053108), /* PORT264CR */
1656 PORTCR(265, 0xe6053109), /* PORT265CR */
1657 PORTCR(266, 0xe605310a), /* PORT266CR */
1658 PORTCR(267, 0xe605310b), /* PORT267CR */
1659 PORTCR(268, 0xe605310c), /* PORT268CR */
1660 PORTCR(269, 0xe605310d), /* PORT269CR */
1661
1662 PORTCR(270, 0xe605310e), /* PORT270CR */
1663 PORTCR(271, 0xe605310f), /* PORT271CR */
1664 PORTCR(272, 0xe6053110), /* PORT272CR */
1665
1666 { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
1667 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1668 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1669 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1670 0, 0,
1671 0, 0,
1672 0, 0,
1673 0, 0,
1674 0, 0,
1675 MSELBCR_MSEL2_0, MSELBCR_MSEL2_1,
1676 0, 0,
1677 0, 0 }
1678 },
1679 { },
1680};
1681
1682static struct pinmux_data_reg pinmux_data_regs[] = {
1683 { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
1684 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
1685 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
1686 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
1687 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
1688 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
1689 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
1690 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
1691 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
1692 },
1693 { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
1694 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
1695 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
1696 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
1697 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
1698 PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
1699 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
1700 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
1701 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
1702 },
1703 { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
1704 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
1705 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
1706 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
1707 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
1708 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
1709 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
1710 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
1711 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
1712 },
1713 { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) {
1714 PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
1715 PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
1716 PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
1717 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
1718 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
1719 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
1720 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
1721 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
1722 },
1723 { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) {
1724 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
1725 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
1726 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
1727 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
1728 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
1729 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
1730 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
1731 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
1732 },
1733 { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) {
1734 PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA,
1735 PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
1736 PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
1737 PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
1738 PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
1739 PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
1740 PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
1741 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
1742 },
1743 { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) {
1744 PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
1745 PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
1746 PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
1747 PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
1748 PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
1749 PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
1750 PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
1751 PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
1752 },
1753 { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) {
1754 PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
1755 PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
1756 PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
1757 PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
1758 PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
1759 PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
1760 PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
1761 PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
1762 },
1763 { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) {
1764 0, 0, 0, 0,
1765 0, 0, 0, 0,
1766 0, 0, 0, 0,
1767 0, 0, 0, PORT272_DATA,
1768 PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
1769 PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
1770 PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
1771 PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
1772 },
1773 { },
1774};
1775
1776static struct pinmux_info sh7367_pinmux_info = {
1777 .name = "sh7367_pfc",
1778 .reserved_id = PINMUX_RESERVED,
1779 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1780 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1781 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1782 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1783 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1784 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1785 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1786
1787 .first_gpio = GPIO_PORT0,
1788 .last_gpio = GPIO_FN_DIVLOCK,
1789
1790 .gpios = pinmux_gpios,
1791 .cfg_regs = pinmux_config_regs,
1792 .data_regs = pinmux_data_regs,
1793
1794 .gpio_data = pinmux_data,
1795 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1796};
1797
1798void sh7367_pinmux_init(void)
1799{
1800 register_pinmux(&sh7367_pinmux_info);
1801}
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
new file mode 100644
index 000000000000..9557d0964d73
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -0,0 +1,1637 @@
1/*
2 * sh7372 processor support - PFC hardware block
3 *
4 * Copyright (C) 2010 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * Based on
7 * sh7367 processor support - PFC hardware block
8 * Copyright (C) 2010 Magnus Damm
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/gpio.h>
26#include <mach/sh7372.h>
27
28#define _1(fn, pfx, sfx) fn(pfx, sfx)
29
30#define _10(fn, pfx, sfx) \
31 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
32 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
33 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
34 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
35 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
36
37#define _80(fn, pfx, sfx) \
38 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
39 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
40 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
41 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
42
43#define _190(fn, pfx, sfx) \
44 _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
45 _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
46
47#define _PORT(pfx, sfx) pfx##_##sfx
48#define PORT_ALL(str) _190(_PORT, PORT, str)
49
50enum {
51 PINMUX_RESERVED = 0,
52
53 /* PORT0_DATA -> PORT190_DATA */
54 PINMUX_DATA_BEGIN,
55 PORT_ALL(DATA),
56 PINMUX_DATA_END,
57
58 /* PORT0_IN -> PORT190_IN */
59 PINMUX_INPUT_BEGIN,
60 PORT_ALL(IN),
61 PINMUX_INPUT_END,
62
63 /* PORT0_IN_PU -> PORT190_IN_PU */
64 PINMUX_INPUT_PULLUP_BEGIN,
65 PORT_ALL(IN_PU),
66 PINMUX_INPUT_PULLUP_END,
67
68 /* PORT0_IN_PD -> PORT190_IN_PD */
69 PINMUX_INPUT_PULLDOWN_BEGIN,
70 PORT_ALL(IN_PD),
71 PINMUX_INPUT_PULLDOWN_END,
72
73 /* PORT0_OUT -> PORT190_OUT */
74 PINMUX_OUTPUT_BEGIN,
75 PORT_ALL(OUT),
76 PINMUX_OUTPUT_END,
77
78 PINMUX_FUNCTION_BEGIN,
79 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT190_FN_IN */
80 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT190_FN_OUT */
81 PORT_ALL(FN0), /* PORT0_FN0 -> PORT190_FN0 */
82 PORT_ALL(FN1), /* PORT0_FN1 -> PORT190_FN1 */
83 PORT_ALL(FN2), /* PORT0_FN2 -> PORT190_FN2 */
84 PORT_ALL(FN3), /* PORT0_FN3 -> PORT190_FN3 */
85 PORT_ALL(FN4), /* PORT0_FN4 -> PORT190_FN4 */
86 PORT_ALL(FN5), /* PORT0_FN5 -> PORT190_FN5 */
87 PORT_ALL(FN6), /* PORT0_FN6 -> PORT190_FN6 */
88 PORT_ALL(FN7), /* PORT0_FN7 -> PORT190_FN7 */
89
90 MSEL1CR_31_0, MSEL1CR_31_1,
91 MSEL1CR_30_0, MSEL1CR_30_1,
92 MSEL1CR_29_0, MSEL1CR_29_1,
93 MSEL1CR_28_0, MSEL1CR_28_1,
94 MSEL1CR_27_0, MSEL1CR_27_1,
95 MSEL1CR_26_0, MSEL1CR_26_1,
96 MSEL1CR_16_0, MSEL1CR_16_1,
97 MSEL1CR_15_0, MSEL1CR_15_1,
98 MSEL1CR_14_0, MSEL1CR_14_1,
99 MSEL1CR_13_0, MSEL1CR_13_1,
100 MSEL1CR_12_0, MSEL1CR_12_1,
101 MSEL1CR_9_0, MSEL1CR_9_1,
102 MSEL1CR_8_0, MSEL1CR_8_1,
103 MSEL1CR_7_0, MSEL1CR_7_1,
104 MSEL1CR_6_0, MSEL1CR_6_1,
105 MSEL1CR_4_0, MSEL1CR_4_1,
106 MSEL1CR_3_0, MSEL1CR_3_1,
107 MSEL1CR_2_0, MSEL1CR_2_1,
108 MSEL1CR_0_0, MSEL1CR_0_1,
109
110 MSEL3CR_27_0, MSEL3CR_27_1,
111 MSEL3CR_26_0, MSEL3CR_26_1,
112 MSEL3CR_21_0, MSEL3CR_21_1,
113 MSEL3CR_20_0, MSEL3CR_20_1,
114 MSEL3CR_15_0, MSEL3CR_15_1,
115 MSEL3CR_9_0, MSEL3CR_9_1,
116 MSEL3CR_6_0, MSEL3CR_6_1,
117
118 MSEL4CR_19_0, MSEL4CR_19_1,
119 MSEL4CR_18_0, MSEL4CR_18_1,
120 MSEL4CR_17_0, MSEL4CR_17_1,
121 MSEL4CR_16_0, MSEL4CR_16_1,
122 MSEL4CR_15_0, MSEL4CR_15_1,
123 MSEL4CR_14_0, MSEL4CR_14_1,
124 MSEL4CR_10_0, MSEL4CR_10_1,
125 MSEL4CR_6_0, MSEL4CR_6_1,
126 MSEL4CR_4_0, MSEL4CR_4_1,
127 MSEL4CR_1_0, MSEL4CR_1_1,
128 PINMUX_FUNCTION_END,
129
130 PINMUX_MARK_BEGIN,
131
132 /* IRQ */
133 IRQ0_6_MARK, IRQ0_162_MARK, IRQ1_MARK, IRQ2_4_MARK,
134 IRQ2_5_MARK, IRQ3_8_MARK, IRQ3_16_MARK, IRQ4_17_MARK,
135 IRQ4_163_MARK, IRQ5_MARK, IRQ6_39_MARK, IRQ6_164_MARK,
136 IRQ7_40_MARK, IRQ7_167_MARK, IRQ8_41_MARK, IRQ8_168_MARK,
137 IRQ9_42_MARK, IRQ9_169_MARK, IRQ10_MARK, IRQ11_MARK,
138 IRQ12_80_MARK, IRQ12_137_MARK, IRQ13_81_MARK, IRQ13_145_MARK,
139 IRQ14_82_MARK, IRQ14_146_MARK, IRQ15_83_MARK, IRQ15_147_MARK,
140 IRQ16_84_MARK, IRQ16_170_MARK, IRQ17_MARK, IRQ18_MARK,
141 IRQ19_MARK, IRQ20_MARK, IRQ21_MARK, IRQ22_MARK,
142 IRQ23_MARK, IRQ24_MARK, IRQ25_MARK, IRQ26_121_MARK,
143 IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
144 IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
145 IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
146
147 /* MSIOF0 */
148 MSIOF0_TSYNC_MARK, MSIOF0_TSCK_MARK, MSIOF0_RXD_MARK,
149 MSIOF0_RSCK_MARK, MSIOF0_RSYNC_MARK, MSIOF0_MCK0_MARK,
150 MSIOF0_MCK1_MARK, MSIOF0_SS1_MARK, MSIOF0_SS2_MARK,
151 MSIOF0_TXD_MARK,
152
153 /* MSIOF1 */
154 MSIOF1_TSCK_39_MARK, MSIOF1_TSYNC_40_MARK,
155 MSIOF1_TSCK_88_MARK, MSIOF1_TSYNC_89_MARK,
156 MSIOF1_TXD_41_MARK, MSIOF1_RXD_42_MARK,
157 MSIOF1_TXD_90_MARK, MSIOF1_RXD_91_MARK,
158 MSIOF1_SS1_43_MARK, MSIOF1_SS2_44_MARK,
159 MSIOF1_SS1_92_MARK, MSIOF1_SS2_93_MARK,
160 MSIOF1_RSCK_MARK, MSIOF1_RSYNC_MARK,
161 MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
162
163 /* MSIOF2 */
164 MSIOF2_RSCK_MARK, MSIOF2_RSYNC_MARK, MSIOF2_MCK0_MARK,
165 MSIOF2_MCK1_MARK, MSIOF2_SS1_MARK, MSIOF2_SS2_MARK,
166 MSIOF2_TSYNC_MARK, MSIOF2_TSCK_MARK, MSIOF2_RXD_MARK,
167 MSIOF2_TXD_MARK,
168
169 /* MSIOF3 */
170 BBIF1_RXD_MARK, BBIF1_TSYNC_MARK, BBIF1_TSCK_MARK,
171 BBIF1_TXD_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK,
172 BBIF1_FLOW_MARK, BB_RX_FLOW_N_MARK,
173
174 /* MSIOF4 */
175 BBIF2_TSCK1_MARK, BBIF2_TSYNC1_MARK,
176 BBIF2_TXD1_MARK, BBIF2_RXD_MARK,
177
178 /* FSI */
179 FSIACK_MARK, FSIBCK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
180 FSIAISLD_MARK, FSIAOMC_MARK, FSIAOLR_MARK, FSIAOBT_MARK,
181 FSIAOSLD_MARK, FSIASPDIF_11_MARK, FSIASPDIF_15_MARK,
182
183 /* FMSI */
184 FMSOCK_MARK, FMSOOLR_MARK, FMSIOLR_MARK, FMSOOBT_MARK,
185 FMSIOBT_MARK, FMSOSLD_MARK, FMSOILR_MARK, FMSIILR_MARK,
186 FMSOIBT_MARK, FMSIIBT_MARK, FMSISLD_MARK, FMSICK_MARK,
187
188 /* SCIFA0 */
189 SCIFA0_TXD_MARK, SCIFA0_RXD_MARK, SCIFA0_SCK_MARK,
190 SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
191
192 /* SCIFA1 */
193 SCIFA1_TXD_MARK, SCIFA1_RXD_MARK, SCIFA1_SCK_MARK,
194 SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
195
196 /* SCIFA2 */
197 SCIFA2_CTS1_MARK, SCIFA2_RTS1_MARK, SCIFA2_TXD1_MARK,
198 SCIFA2_RXD1_MARK, SCIFA2_SCK1_MARK,
199
200 /* SCIFA3 */
201 SCIFA3_CTS_43_MARK, SCIFA3_CTS_140_MARK, SCIFA3_RTS_44_MARK,
202 SCIFA3_RTS_141_MARK, SCIFA3_SCK_MARK, SCIFA3_TXD_MARK,
203 SCIFA3_RXD_MARK,
204
205 /* SCIFA4 */
206 SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
207
208 /* SCIFA5 */
209 SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
210
211 /* SCIFB */
212 SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
213 SCIFB_TXD_MARK, SCIFB_RXD_MARK,
214
215 /* CEU */
216 VIO_HD_MARK, VIO_CKO1_MARK, VIO_CKO2_MARK, VIO_VD_MARK,
217 VIO_CLK_MARK, VIO_FIELD_MARK, VIO_CKO_MARK,
218 VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
219 VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
220 VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
221 VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
222
223 /* USB0 */
224 IDIN_0_MARK, EXTLP_0_MARK, OVCN2_0_MARK, PWEN_0_MARK,
225 OVCN_0_MARK, VBUS0_0_MARK,
226
227 /* USB1 */
228 IDIN_1_18_MARK, IDIN_1_113_MARK,
229 PWEN_1_115_MARK, PWEN_1_138_MARK,
230 OVCN_1_114_MARK, OVCN_1_162_MARK,
231 EXTLP_1_MARK, OVCN2_1_MARK,
232 VBUS0_1_MARK,
233
234 /* GPIO */
235 GPI0_MARK, GPI1_MARK, GPO0_MARK, GPO1_MARK,
236
237 /* BSC */
238 BS_MARK, WE1_MARK,
239 CKO_MARK, WAIT_MARK, RDWR_MARK,
240
241 A0_MARK, A1_MARK, A2_MARK, A3_MARK,
242 A6_MARK, A7_MARK, A8_MARK, A9_MARK,
243 A10_MARK, A11_MARK, A12_MARK, A13_MARK,
244 A14_MARK, A15_MARK, A16_MARK, A17_MARK,
245 A18_MARK, A19_MARK, A20_MARK, A21_MARK,
246 A22_MARK, A23_MARK, A24_MARK, A25_MARK,
247 A26_MARK,
248
249 CS0_MARK, CS2_MARK, CS4_MARK,
250 CS5A_MARK, CS5B_MARK, CS6A_MARK,
251
252 /* BSC/FLCTL */
253 RD_FSC_MARK, WE0_FWE_MARK, A4_FOE_MARK, A5_FCDE_MARK,
254 D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
255 D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
256 D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
257 D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
258
259 /* MMCIF(1) */
260 MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
261 MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
262 MMCCMD0_MARK, MMCCLK0_MARK,
263
264 /* MMCIF(2) */
265 MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
266 MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
267 MMCCLK1_MARK, MMCCMD1_MARK,
268
269 /* SPU2 */
270 VINT_I_MARK,
271
272 /* FLCTL */
273 FCE1_MARK, FCE0_MARK, FRB_MARK,
274
275 /* HSI */
276 GP_RX_FLAG_MARK, GP_RX_DATA_MARK, GP_TX_READY_MARK,
277 GP_RX_WAKE_MARK, MP_TX_FLAG_MARK, MP_TX_DATA_MARK,
278 MP_RX_READY_MARK, MP_TX_WAKE_MARK,
279
280 /* MFI */
281 MFIv6_MARK,
282 MFIv4_MARK,
283
284 MEMC_CS0_MARK, MEMC_BUSCLK_MEMC_A0_MARK,
285 MEMC_CS1_MEMC_A1_MARK, MEMC_ADV_MEMC_DREQ0_MARK,
286 MEMC_WAIT_MEMC_DREQ1_MARK, MEMC_NOE_MARK,
287 MEMC_NWE_MARK, MEMC_INT_MARK,
288
289 MEMC_AD0_MARK, MEMC_AD1_MARK, MEMC_AD2_MARK,
290 MEMC_AD3_MARK, MEMC_AD4_MARK, MEMC_AD5_MARK,
291 MEMC_AD6_MARK, MEMC_AD7_MARK, MEMC_AD8_MARK,
292 MEMC_AD9_MARK, MEMC_AD10_MARK, MEMC_AD11_MARK,
293 MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
294 MEMC_AD15_MARK,
295
296 /* SIM */
297 SIM_RST_MARK, SIM_CLK_MARK, SIM_D_MARK,
298
299 /* TPU */
300 TPU0TO0_MARK, TPU0TO1_MARK,
301 TPU0TO2_93_MARK, TPU0TO2_99_MARK,
302 TPU0TO3_MARK,
303
304 /* I2C2 */
305 I2C_SCL2_MARK, I2C_SDA2_MARK,
306
307 /* I2C3(1) */
308 I2C_SCL3_MARK, I2C_SDA3_MARK,
309
310 /* I2C3(2) */
311 I2C_SCL3S_MARK, I2C_SDA3S_MARK,
312
313 /* I2C4(2) */
314 I2C_SCL4_MARK, I2C_SDA4_MARK,
315
316 /* I2C4(2) */
317 I2C_SCL4S_MARK, I2C_SDA4S_MARK,
318
319 /* KEYSC */
320 KEYOUT0_MARK, KEYIN0_121_MARK, KEYIN0_136_MARK,
321 KEYOUT1_MARK, KEYIN1_122_MARK, KEYIN1_135_MARK,
322 KEYOUT2_MARK, KEYIN2_123_MARK, KEYIN2_134_MARK,
323 KEYOUT3_MARK, KEYIN3_124_MARK, KEYIN3_133_MARK,
324 KEYOUT4_MARK, KEYIN4_MARK,
325 KEYOUT5_MARK, KEYIN5_MARK,
326 KEYOUT6_MARK, KEYIN6_MARK,
327 KEYOUT7_MARK, KEYIN7_MARK,
328
329 /* LCDC */
330 LCDC0_SELECT_MARK,
331 LCDC1_SELECT_MARK,
332 LCDHSYN_MARK, LCDCS_MARK, LCDVSYN_MARK, LCDDCK_MARK,
333 LCDWR_MARK, LCDRD_MARK, LCDDISP_MARK, LCDRS_MARK,
334 LCDLCLK_MARK, LCDDON_MARK,
335
336 LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
337 LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
338 LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
339 LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
340 LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
341 LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
342
343 /* IRDA */
344 IRDA_OUT_MARK, IRDA_IN_MARK, IRDA_FIRSEL_MARK,
345 IROUT_139_MARK, IROUT_140_MARK,
346
347 /* TSIF1 */
348 TS0_1SELECT_MARK,
349 TS0_2SELECT_MARK,
350 TS1_1SELECT_MARK,
351 TS1_2SELECT_MARK,
352
353 TS_SPSYNC1_MARK, TS_SDAT1_MARK,
354 TS_SDEN1_MARK, TS_SCK1_MARK,
355
356 /* TSIF2 */
357 TS_SPSYNC2_MARK, TS_SDAT2_MARK,
358 TS_SDEN2_MARK, TS_SCK2_MARK,
359
360 /* HDMI */
361 HDMI_HPD_MARK, HDMI_CEC_MARK,
362
363 /* SDHI0 */
364 SDHICLK0_MARK, SDHICD0_MARK,
365 SDHICMD0_MARK, SDHIWP0_MARK,
366 SDHID0_0_MARK, SDHID0_1_MARK,
367 SDHID0_2_MARK, SDHID0_3_MARK,
368
369 /* SDHI1 */
370 SDHICLK1_MARK, SDHICMD1_MARK, SDHID1_0_MARK,
371 SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
372
373 /* SDHI2 */
374 SDHICLK2_MARK, SDHICMD2_MARK, SDHID2_0_MARK,
375 SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
376
377 /* SDENC */
378 SDENC_CPG_MARK,
379 SDENC_DV_CLKI_MARK,
380
381 PINMUX_MARK_END,
382};
383
384/* PORT_DATA_I_PD(nr) */
385#define _I___D(nr) \
386 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
387 PORT##nr##_IN, PORT##nr##_IN_PD)
388
389/* PORT_DATA_I_PU(nr) */
390#define _I__U_(nr) \
391 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
392 PORT##nr##_IN, PORT##nr##_IN_PU)
393
394/* PORT_DATA_I_PU_PD(nr) */
395#define _I__UD(nr) \
396 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
397 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
398
399/* PORT_DATA_O(nr) */
400#define __O___(nr) \
401 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
402
403/* PORT_DATA_IO(nr) */
404#define _IO___(nr) \
405 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
406 PORT##nr##_IN)
407
408/* PORT_DATA_IO_PD(nr) */
409#define _IO__D(nr) \
410 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
411 PORT##nr##_IN, PORT##nr##_IN_PD)
412
413/* PORT_DATA_IO_PU(nr) */
414#define _IO_U_(nr) \
415 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
416 PORT##nr##_IN, PORT##nr##_IN_PU)
417
418/* PORT_DATA_IO_PU_PD(nr) */
419#define _IO_UD(nr) \
420 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
421 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
422
423
424static pinmux_enum_t pinmux_data[] = {
425
426 /* specify valid pin states for each pin in GPIO mode */
427
428 _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
429 _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
430
431 __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
432 __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
433
434 _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
435 _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
436
437 _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
438 _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
439
440 _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
441 _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
442
443 _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
444 _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
445
446 _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
447 _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
448
449 _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
450 _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
451
452 _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
453 _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
454
455 _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
456 _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
457
458 _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
459 _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
460
461 _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
462 _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
463
464 _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
465 _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
466
467 _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
468 _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
469
470 _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
471 _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
472
473 _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
474 _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
475
476 __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
477 _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
478
479 _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
480 _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
481
482 _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
483 __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
484
485 _IO_UD(190),
486
487 /* IRQ */
488 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
489 PINMUX_DATA(IRQ0_162_MARK, PORT162_FN0, MSEL1CR_0_1),
490 PINMUX_DATA(IRQ1_MARK, PORT12_FN0),
491 PINMUX_DATA(IRQ2_4_MARK, PORT4_FN0, MSEL1CR_2_0),
492 PINMUX_DATA(IRQ2_5_MARK, PORT5_FN0, MSEL1CR_2_1),
493 PINMUX_DATA(IRQ3_8_MARK, PORT8_FN0, MSEL1CR_3_0),
494 PINMUX_DATA(IRQ3_16_MARK, PORT16_FN0, MSEL1CR_3_1),
495 PINMUX_DATA(IRQ4_17_MARK, PORT17_FN0, MSEL1CR_4_0),
496 PINMUX_DATA(IRQ4_163_MARK, PORT163_FN0, MSEL1CR_4_1),
497 PINMUX_DATA(IRQ5_MARK, PORT18_FN0),
498 PINMUX_DATA(IRQ6_39_MARK, PORT39_FN0, MSEL1CR_6_0),
499 PINMUX_DATA(IRQ6_164_MARK, PORT164_FN0, MSEL1CR_6_1),
500 PINMUX_DATA(IRQ7_40_MARK, PORT40_FN0, MSEL1CR_7_1),
501 PINMUX_DATA(IRQ7_167_MARK, PORT167_FN0, MSEL1CR_7_0),
502 PINMUX_DATA(IRQ8_41_MARK, PORT41_FN0, MSEL1CR_8_1),
503 PINMUX_DATA(IRQ8_168_MARK, PORT168_FN0, MSEL1CR_8_0),
504 PINMUX_DATA(IRQ9_42_MARK, PORT42_FN0, MSEL1CR_9_0),
505 PINMUX_DATA(IRQ9_169_MARK, PORT169_FN0, MSEL1CR_9_1),
506 PINMUX_DATA(IRQ10_MARK, PORT65_FN0, MSEL1CR_9_1),
507 PINMUX_DATA(IRQ11_MARK, PORT67_FN0),
508 PINMUX_DATA(IRQ12_80_MARK, PORT80_FN0, MSEL1CR_12_0),
509 PINMUX_DATA(IRQ12_137_MARK, PORT137_FN0, MSEL1CR_12_1),
510 PINMUX_DATA(IRQ13_81_MARK, PORT81_FN0, MSEL1CR_13_0),
511 PINMUX_DATA(IRQ13_145_MARK, PORT145_FN0, MSEL1CR_13_1),
512 PINMUX_DATA(IRQ14_82_MARK, PORT82_FN0, MSEL1CR_14_0),
513 PINMUX_DATA(IRQ14_146_MARK, PORT146_FN0, MSEL1CR_14_1),
514 PINMUX_DATA(IRQ15_83_MARK, PORT83_FN0, MSEL1CR_15_0),
515 PINMUX_DATA(IRQ15_147_MARK, PORT147_FN0, MSEL1CR_15_1),
516 PINMUX_DATA(IRQ16_84_MARK, PORT84_FN0, MSEL1CR_16_0),
517 PINMUX_DATA(IRQ16_170_MARK, PORT170_FN0, MSEL1CR_16_1),
518 PINMUX_DATA(IRQ17_MARK, PORT85_FN0),
519 PINMUX_DATA(IRQ18_MARK, PORT86_FN0),
520 PINMUX_DATA(IRQ19_MARK, PORT87_FN0),
521 PINMUX_DATA(IRQ20_MARK, PORT92_FN0),
522 PINMUX_DATA(IRQ21_MARK, PORT93_FN0),
523 PINMUX_DATA(IRQ22_MARK, PORT94_FN0),
524 PINMUX_DATA(IRQ23_MARK, PORT95_FN0),
525 PINMUX_DATA(IRQ24_MARK, PORT112_FN0),
526 PINMUX_DATA(IRQ25_MARK, PORT119_FN0),
527 PINMUX_DATA(IRQ26_121_MARK, PORT121_FN0, MSEL1CR_26_1),
528 PINMUX_DATA(IRQ26_172_MARK, PORT172_FN0, MSEL1CR_26_0),
529 PINMUX_DATA(IRQ27_122_MARK, PORT122_FN0, MSEL1CR_27_1),
530 PINMUX_DATA(IRQ27_180_MARK, PORT180_FN0, MSEL1CR_27_0),
531 PINMUX_DATA(IRQ28_123_MARK, PORT123_FN0, MSEL1CR_28_1),
532 PINMUX_DATA(IRQ28_181_MARK, PORT181_FN0, MSEL1CR_28_0),
533 PINMUX_DATA(IRQ29_129_MARK, PORT129_FN0, MSEL1CR_29_1),
534 PINMUX_DATA(IRQ29_182_MARK, PORT182_FN0, MSEL1CR_29_0),
535 PINMUX_DATA(IRQ30_130_MARK, PORT130_FN0, MSEL1CR_30_1),
536 PINMUX_DATA(IRQ30_183_MARK, PORT183_FN0, MSEL1CR_30_0),
537 PINMUX_DATA(IRQ31_138_MARK, PORT138_FN0, MSEL1CR_31_1),
538 PINMUX_DATA(IRQ31_184_MARK, PORT184_FN0, MSEL1CR_31_0),
539
540 /* Function 1 */
541 PINMUX_DATA(BBIF2_TSCK1_MARK, PORT0_FN1),
542 PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT1_FN1),
543 PINMUX_DATA(BBIF2_TXD1_MARK, PORT2_FN1),
544 PINMUX_DATA(BBIF2_RXD_MARK, PORT3_FN1),
545 PINMUX_DATA(FSIACK_MARK, PORT4_FN1),
546 PINMUX_DATA(FSIAILR_MARK, PORT5_FN1),
547 PINMUX_DATA(FSIAIBT_MARK, PORT6_FN1),
548 PINMUX_DATA(FSIAISLD_MARK, PORT7_FN1),
549 PINMUX_DATA(FSIAOMC_MARK, PORT8_FN1),
550 PINMUX_DATA(FSIAOLR_MARK, PORT9_FN1),
551 PINMUX_DATA(FSIAOBT_MARK, PORT10_FN1),
552 PINMUX_DATA(FSIAOSLD_MARK, PORT11_FN1),
553 PINMUX_DATA(FMSOCK_MARK, PORT12_FN1),
554 PINMUX_DATA(FMSOOLR_MARK, PORT13_FN1),
555 PINMUX_DATA(FMSOOBT_MARK, PORT14_FN1),
556 PINMUX_DATA(FMSOSLD_MARK, PORT15_FN1),
557 PINMUX_DATA(FMSOILR_MARK, PORT16_FN1),
558 PINMUX_DATA(FMSOIBT_MARK, PORT17_FN1),
559 PINMUX_DATA(FMSISLD_MARK, PORT18_FN1),
560 PINMUX_DATA(A0_MARK, PORT19_FN1),
561 PINMUX_DATA(A1_MARK, PORT20_FN1),
562 PINMUX_DATA(A2_MARK, PORT21_FN1),
563 PINMUX_DATA(A3_MARK, PORT22_FN1),
564 PINMUX_DATA(A4_FOE_MARK, PORT23_FN1),
565 PINMUX_DATA(A5_FCDE_MARK, PORT24_FN1),
566 PINMUX_DATA(A6_MARK, PORT25_FN1),
567 PINMUX_DATA(A7_MARK, PORT26_FN1),
568 PINMUX_DATA(A8_MARK, PORT27_FN1),
569 PINMUX_DATA(A9_MARK, PORT28_FN1),
570 PINMUX_DATA(A10_MARK, PORT29_FN1),
571 PINMUX_DATA(A11_MARK, PORT30_FN1),
572 PINMUX_DATA(A12_MARK, PORT31_FN1),
573 PINMUX_DATA(A13_MARK, PORT32_FN1),
574 PINMUX_DATA(A14_MARK, PORT33_FN1),
575 PINMUX_DATA(A15_MARK, PORT34_FN1),
576 PINMUX_DATA(A16_MARK, PORT35_FN1),
577 PINMUX_DATA(A17_MARK, PORT36_FN1),
578 PINMUX_DATA(A18_MARK, PORT37_FN1),
579 PINMUX_DATA(A19_MARK, PORT38_FN1),
580 PINMUX_DATA(A20_MARK, PORT39_FN1),
581 PINMUX_DATA(A21_MARK, PORT40_FN1),
582 PINMUX_DATA(A22_MARK, PORT41_FN1),
583 PINMUX_DATA(A23_MARK, PORT42_FN1),
584 PINMUX_DATA(A24_MARK, PORT43_FN1),
585 PINMUX_DATA(A25_MARK, PORT44_FN1),
586 PINMUX_DATA(A26_MARK, PORT45_FN1),
587 PINMUX_DATA(D0_NAF0_MARK, PORT46_FN1),
588 PINMUX_DATA(D1_NAF1_MARK, PORT47_FN1),
589 PINMUX_DATA(D2_NAF2_MARK, PORT48_FN1),
590 PINMUX_DATA(D3_NAF3_MARK, PORT49_FN1),
591 PINMUX_DATA(D4_NAF4_MARK, PORT50_FN1),
592 PINMUX_DATA(D5_NAF5_MARK, PORT51_FN1),
593 PINMUX_DATA(D6_NAF6_MARK, PORT52_FN1),
594 PINMUX_DATA(D7_NAF7_MARK, PORT53_FN1),
595 PINMUX_DATA(D8_NAF8_MARK, PORT54_FN1),
596 PINMUX_DATA(D9_NAF9_MARK, PORT55_FN1),
597 PINMUX_DATA(D10_NAF10_MARK, PORT56_FN1),
598 PINMUX_DATA(D11_NAF11_MARK, PORT57_FN1),
599 PINMUX_DATA(D12_NAF12_MARK, PORT58_FN1),
600 PINMUX_DATA(D13_NAF13_MARK, PORT59_FN1),
601 PINMUX_DATA(D14_NAF14_MARK, PORT60_FN1),
602 PINMUX_DATA(D15_NAF15_MARK, PORT61_FN1),
603 PINMUX_DATA(CS0_MARK, PORT62_FN1),
604 PINMUX_DATA(CS2_MARK, PORT63_FN1),
605 PINMUX_DATA(CS4_MARK, PORT64_FN1),
606 PINMUX_DATA(CS5A_MARK, PORT65_FN1),
607 PINMUX_DATA(CS5B_MARK, PORT66_FN1),
608 PINMUX_DATA(CS6A_MARK, PORT67_FN1),
609 PINMUX_DATA(FCE0_MARK, PORT68_FN1),
610 PINMUX_DATA(RD_FSC_MARK, PORT69_FN1),
611 PINMUX_DATA(WE0_FWE_MARK, PORT70_FN1),
612 PINMUX_DATA(WE1_MARK, PORT71_FN1),
613 PINMUX_DATA(CKO_MARK, PORT72_FN1),
614 PINMUX_DATA(FRB_MARK, PORT73_FN1),
615 PINMUX_DATA(WAIT_MARK, PORT74_FN1),
616 PINMUX_DATA(RDWR_MARK, PORT75_FN1),
617 PINMUX_DATA(MEMC_AD0_MARK, PORT76_FN1),
618 PINMUX_DATA(MEMC_AD1_MARK, PORT77_FN1),
619 PINMUX_DATA(MEMC_AD2_MARK, PORT78_FN1),
620 PINMUX_DATA(MEMC_AD3_MARK, PORT79_FN1),
621 PINMUX_DATA(MEMC_AD4_MARK, PORT80_FN1),
622 PINMUX_DATA(MEMC_AD5_MARK, PORT81_FN1),
623 PINMUX_DATA(MEMC_AD6_MARK, PORT82_FN1),
624 PINMUX_DATA(MEMC_AD7_MARK, PORT83_FN1),
625 PINMUX_DATA(MEMC_AD8_MARK, PORT84_FN1),
626 PINMUX_DATA(MEMC_AD9_MARK, PORT85_FN1),
627 PINMUX_DATA(MEMC_AD10_MARK, PORT86_FN1),
628 PINMUX_DATA(MEMC_AD11_MARK, PORT87_FN1),
629 PINMUX_DATA(MEMC_AD12_MARK, PORT88_FN1),
630 PINMUX_DATA(MEMC_AD13_MARK, PORT89_FN1),
631 PINMUX_DATA(MEMC_AD14_MARK, PORT90_FN1),
632 PINMUX_DATA(MEMC_AD15_MARK, PORT91_FN1),
633 PINMUX_DATA(MEMC_CS0_MARK, PORT92_FN1),
634 PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK, PORT93_FN1),
635 PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK, PORT94_FN1),
636 PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK, PORT95_FN1),
637 PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK, PORT96_FN1),
638 PINMUX_DATA(MEMC_NOE_MARK, PORT97_FN1),
639 PINMUX_DATA(MEMC_NWE_MARK, PORT98_FN1),
640 PINMUX_DATA(MEMC_INT_MARK, PORT99_FN1),
641 PINMUX_DATA(VIO_VD_MARK, PORT100_FN1),
642 PINMUX_DATA(VIO_HD_MARK, PORT101_FN1),
643 PINMUX_DATA(VIO_D0_MARK, PORT102_FN1),
644 PINMUX_DATA(VIO_D1_MARK, PORT103_FN1),
645 PINMUX_DATA(VIO_D2_MARK, PORT104_FN1),
646 PINMUX_DATA(VIO_D3_MARK, PORT105_FN1),
647 PINMUX_DATA(VIO_D4_MARK, PORT106_FN1),
648 PINMUX_DATA(VIO_D5_MARK, PORT107_FN1),
649 PINMUX_DATA(VIO_D6_MARK, PORT108_FN1),
650 PINMUX_DATA(VIO_D7_MARK, PORT109_FN1),
651 PINMUX_DATA(VIO_D8_MARK, PORT110_FN1),
652 PINMUX_DATA(VIO_D9_MARK, PORT111_FN1),
653 PINMUX_DATA(VIO_D10_MARK, PORT112_FN1),
654 PINMUX_DATA(VIO_D11_MARK, PORT113_FN1),
655 PINMUX_DATA(VIO_D12_MARK, PORT114_FN1),
656 PINMUX_DATA(VIO_D13_MARK, PORT115_FN1),
657 PINMUX_DATA(VIO_D14_MARK, PORT116_FN1),
658 PINMUX_DATA(VIO_D15_MARK, PORT117_FN1),
659 PINMUX_DATA(VIO_CLK_MARK, PORT118_FN1),
660 PINMUX_DATA(VIO_FIELD_MARK, PORT119_FN1),
661 PINMUX_DATA(VIO_CKO_MARK, PORT120_FN1),
662 PINMUX_DATA(LCDD0_MARK, PORT121_FN1),
663 PINMUX_DATA(LCDD1_MARK, PORT122_FN1),
664 PINMUX_DATA(LCDD2_MARK, PORT123_FN1),
665 PINMUX_DATA(LCDD3_MARK, PORT124_FN1),
666 PINMUX_DATA(LCDD4_MARK, PORT125_FN1),
667 PINMUX_DATA(LCDD5_MARK, PORT126_FN1),
668 PINMUX_DATA(LCDD6_MARK, PORT127_FN1),
669 PINMUX_DATA(LCDD7_MARK, PORT128_FN1),
670 PINMUX_DATA(LCDD8_MARK, PORT129_FN1),
671 PINMUX_DATA(LCDD9_MARK, PORT130_FN1),
672 PINMUX_DATA(LCDD10_MARK, PORT131_FN1),
673 PINMUX_DATA(LCDD11_MARK, PORT132_FN1),
674 PINMUX_DATA(LCDD12_MARK, PORT133_FN1),
675 PINMUX_DATA(LCDD13_MARK, PORT134_FN1),
676 PINMUX_DATA(LCDD14_MARK, PORT135_FN1),
677 PINMUX_DATA(LCDD15_MARK, PORT136_FN1),
678 PINMUX_DATA(LCDD16_MARK, PORT137_FN1),
679 PINMUX_DATA(LCDD17_MARK, PORT138_FN1),
680 PINMUX_DATA(LCDD18_MARK, PORT139_FN1),
681 PINMUX_DATA(LCDD19_MARK, PORT140_FN1),
682 PINMUX_DATA(LCDD20_MARK, PORT141_FN1),
683 PINMUX_DATA(LCDD21_MARK, PORT142_FN1),
684 PINMUX_DATA(LCDD22_MARK, PORT143_FN1),
685 PINMUX_DATA(LCDD23_MARK, PORT144_FN1),
686 PINMUX_DATA(LCDHSYN_MARK, PORT145_FN1),
687 PINMUX_DATA(LCDVSYN_MARK, PORT146_FN1),
688 PINMUX_DATA(LCDDCK_MARK, PORT147_FN1),
689 PINMUX_DATA(LCDRD_MARK, PORT148_FN1),
690 PINMUX_DATA(LCDDISP_MARK, PORT149_FN1),
691 PINMUX_DATA(LCDLCLK_MARK, PORT150_FN1),
692 PINMUX_DATA(LCDDON_MARK, PORT151_FN1),
693 PINMUX_DATA(SCIFA0_TXD_MARK, PORT152_FN1),
694 PINMUX_DATA(SCIFA0_RXD_MARK, PORT153_FN1),
695 PINMUX_DATA(SCIFA1_TXD_MARK, PORT154_FN1),
696 PINMUX_DATA(SCIFA1_RXD_MARK, PORT155_FN1),
697 PINMUX_DATA(TS_SPSYNC1_MARK, PORT156_FN1),
698 PINMUX_DATA(TS_SDAT1_MARK, PORT157_FN1),
699 PINMUX_DATA(TS_SDEN1_MARK, PORT158_FN1),
700 PINMUX_DATA(TS_SCK1_MARK, PORT159_FN1),
701 PINMUX_DATA(TPU0TO0_MARK, PORT160_FN1),
702 PINMUX_DATA(TPU0TO1_MARK, PORT161_FN1),
703 PINMUX_DATA(SCIFB_SCK_MARK, PORT162_FN1),
704 PINMUX_DATA(SCIFB_RTS_MARK, PORT163_FN1),
705 PINMUX_DATA(SCIFB_CTS_MARK, PORT164_FN1),
706 PINMUX_DATA(SCIFB_TXD_MARK, PORT165_FN1),
707 PINMUX_DATA(SCIFB_RXD_MARK, PORT166_FN1),
708 PINMUX_DATA(VBUS0_0_MARK, PORT167_FN1),
709 PINMUX_DATA(VBUS0_1_MARK, PORT168_FN1),
710 PINMUX_DATA(HDMI_HPD_MARK, PORT169_FN1),
711 PINMUX_DATA(HDMI_CEC_MARK, PORT170_FN1),
712 PINMUX_DATA(SDHICLK0_MARK, PORT171_FN1),
713 PINMUX_DATA(SDHICD0_MARK, PORT172_FN1),
714 PINMUX_DATA(SDHID0_0_MARK, PORT173_FN1),
715 PINMUX_DATA(SDHID0_1_MARK, PORT174_FN1),
716 PINMUX_DATA(SDHID0_2_MARK, PORT175_FN1),
717 PINMUX_DATA(SDHID0_3_MARK, PORT176_FN1),
718 PINMUX_DATA(SDHICMD0_MARK, PORT177_FN1),
719 PINMUX_DATA(SDHIWP0_MARK, PORT178_FN1),
720 PINMUX_DATA(SDHICLK1_MARK, PORT179_FN1),
721 PINMUX_DATA(SDHID1_0_MARK, PORT180_FN1),
722 PINMUX_DATA(SDHID1_1_MARK, PORT181_FN1),
723 PINMUX_DATA(SDHID1_2_MARK, PORT182_FN1),
724 PINMUX_DATA(SDHID1_3_MARK, PORT183_FN1),
725 PINMUX_DATA(SDHICMD1_MARK, PORT184_FN1),
726 PINMUX_DATA(SDHICLK2_MARK, PORT185_FN1),
727 PINMUX_DATA(SDHID2_0_MARK, PORT186_FN1),
728 PINMUX_DATA(SDHID2_1_MARK, PORT187_FN1),
729 PINMUX_DATA(SDHID2_2_MARK, PORT188_FN1),
730 PINMUX_DATA(SDHID2_3_MARK, PORT189_FN1),
731 PINMUX_DATA(SDHICMD2_MARK, PORT190_FN1),
732
733 /* Function 2 */
734 PINMUX_DATA(FSIBCK_MARK, PORT4_FN2),
735 PINMUX_DATA(SCIFA4_RXD_MARK, PORT5_FN2),
736 PINMUX_DATA(SCIFA4_TXD_MARK, PORT6_FN2),
737 PINMUX_DATA(SCIFA5_RXD_MARK, PORT8_FN2),
738 PINMUX_DATA(FSIASPDIF_11_MARK, PORT11_FN2),
739 PINMUX_DATA(SCIFA5_TXD_MARK, PORT12_FN2),
740 PINMUX_DATA(FMSIOLR_MARK, PORT13_FN2),
741 PINMUX_DATA(FMSIOBT_MARK, PORT14_FN2),
742 PINMUX_DATA(FSIASPDIF_15_MARK, PORT15_FN2),
743 PINMUX_DATA(FMSIILR_MARK, PORT16_FN2),
744 PINMUX_DATA(FMSIIBT_MARK, PORT17_FN2),
745 PINMUX_DATA(BS_MARK, PORT19_FN2),
746 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT36_FN2),
747 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT37_FN2),
748 PINMUX_DATA(MSIOF0_RXD_MARK, PORT38_FN2),
749 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT39_FN2),
750 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT40_FN2),
751 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT41_FN2),
752 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT42_FN2),
753 PINMUX_DATA(MSIOF0_SS1_MARK, PORT43_FN2),
754 PINMUX_DATA(MSIOF0_SS2_MARK, PORT44_FN2),
755 PINMUX_DATA(MSIOF0_TXD_MARK, PORT45_FN2),
756 PINMUX_DATA(FMSICK_MARK, PORT65_FN2),
757 PINMUX_DATA(FCE1_MARK, PORT66_FN2),
758 PINMUX_DATA(BBIF1_RXD_MARK, PORT76_FN2),
759 PINMUX_DATA(BBIF1_TSYNC_MARK, PORT77_FN2),
760 PINMUX_DATA(BBIF1_TSCK_MARK, PORT78_FN2),
761 PINMUX_DATA(BBIF1_TXD_MARK, PORT79_FN2),
762 PINMUX_DATA(BBIF1_RSCK_MARK, PORT80_FN2),
763 PINMUX_DATA(BBIF1_RSYNC_MARK, PORT81_FN2),
764 PINMUX_DATA(BBIF1_FLOW_MARK, PORT82_FN2),
765 PINMUX_DATA(BB_RX_FLOW_N_MARK, PORT83_FN2),
766 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT84_FN2),
767 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT85_FN2),
768 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT86_FN2),
769 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT87_FN2),
770 PINMUX_DATA(MSIOF1_TSCK_88_MARK, PORT88_FN2, MSEL4CR_10_1),
771 PINMUX_DATA(MSIOF1_TSYNC_89_MARK, PORT89_FN2, MSEL4CR_10_1),
772 PINMUX_DATA(MSIOF1_TXD_90_MARK, PORT90_FN2, MSEL4CR_10_1),
773 PINMUX_DATA(MSIOF1_RXD_91_MARK, PORT91_FN2, MSEL4CR_10_1),
774 PINMUX_DATA(MSIOF1_SS1_92_MARK, PORT92_FN2, MSEL4CR_10_1),
775 PINMUX_DATA(MSIOF1_SS2_93_MARK, PORT93_FN2, MSEL4CR_10_1),
776 PINMUX_DATA(SCIFA2_CTS1_MARK, PORT94_FN2),
777 PINMUX_DATA(SCIFA2_RTS1_MARK, PORT95_FN2),
778 PINMUX_DATA(SCIFA2_TXD1_MARK, PORT96_FN2),
779 PINMUX_DATA(SCIFA2_RXD1_MARK, PORT97_FN2),
780 PINMUX_DATA(SCIFA2_SCK1_MARK, PORT98_FN2),
781 PINMUX_DATA(I2C_SCL2_MARK, PORT110_FN2),
782 PINMUX_DATA(I2C_SDA2_MARK, PORT111_FN2),
783 PINMUX_DATA(I2C_SCL3_MARK, PORT114_FN2, MSEL4CR_16_1),
784 PINMUX_DATA(I2C_SDA3_MARK, PORT115_FN2, MSEL4CR_16_1),
785 PINMUX_DATA(I2C_SCL4_MARK, PORT116_FN2, MSEL4CR_17_1),
786 PINMUX_DATA(I2C_SDA4_MARK, PORT117_FN2, MSEL4CR_17_1),
787 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT134_FN2),
788 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT135_FN2),
789 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT136_FN2),
790 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT137_FN2),
791 PINMUX_DATA(MSIOF2_SS1_MARK, PORT138_FN2),
792 PINMUX_DATA(MSIOF2_SS2_MARK, PORT139_FN2),
793 PINMUX_DATA(SCIFA3_CTS_140_MARK, PORT140_FN2, MSEL3CR_9_1),
794 PINMUX_DATA(SCIFA3_RTS_141_MARK, PORT141_FN2),
795 PINMUX_DATA(SCIFA3_SCK_MARK, PORT142_FN2),
796 PINMUX_DATA(SCIFA3_TXD_MARK, PORT143_FN2),
797 PINMUX_DATA(SCIFA3_RXD_MARK, PORT144_FN2),
798 PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT148_FN2),
799 PINMUX_DATA(MSIOF2_TSCK_MARK, PORT149_FN2),
800 PINMUX_DATA(MSIOF2_RXD_MARK, PORT150_FN2),
801 PINMUX_DATA(MSIOF2_TXD_MARK, PORT151_FN2),
802 PINMUX_DATA(SCIFA0_SCK_MARK, PORT156_FN2),
803 PINMUX_DATA(SCIFA0_RTS_MARK, PORT157_FN2),
804 PINMUX_DATA(SCIFA0_CTS_MARK, PORT158_FN2),
805 PINMUX_DATA(SCIFA1_SCK_MARK, PORT159_FN2),
806 PINMUX_DATA(SCIFA1_RTS_MARK, PORT160_FN2),
807 PINMUX_DATA(SCIFA1_CTS_MARK, PORT161_FN2),
808
809 /* Function 3 */
810 PINMUX_DATA(VIO_CKO1_MARK, PORT16_FN3),
811 PINMUX_DATA(VIO_CKO2_MARK, PORT17_FN3),
812 PINMUX_DATA(IDIN_1_18_MARK, PORT18_FN3, MSEL4CR_14_1),
813 PINMUX_DATA(MSIOF1_TSCK_39_MARK, PORT39_FN3, MSEL4CR_10_0),
814 PINMUX_DATA(MSIOF1_TSYNC_40_MARK, PORT40_FN3, MSEL4CR_10_0),
815 PINMUX_DATA(MSIOF1_TXD_41_MARK, PORT41_FN3, MSEL4CR_10_0),
816 PINMUX_DATA(MSIOF1_RXD_42_MARK, PORT42_FN3, MSEL4CR_10_0),
817 PINMUX_DATA(MSIOF1_SS1_43_MARK, PORT43_FN3, MSEL4CR_10_0),
818 PINMUX_DATA(MSIOF1_SS2_44_MARK, PORT44_FN3, MSEL4CR_10_0),
819 PINMUX_DATA(MMCD1_0_MARK, PORT54_FN3, MSEL4CR_15_1),
820 PINMUX_DATA(MMCD1_1_MARK, PORT55_FN3, MSEL4CR_15_1),
821 PINMUX_DATA(MMCD1_2_MARK, PORT56_FN3, MSEL4CR_15_1),
822 PINMUX_DATA(MMCD1_3_MARK, PORT57_FN3, MSEL4CR_15_1),
823 PINMUX_DATA(MMCD1_4_MARK, PORT58_FN3, MSEL4CR_15_1),
824 PINMUX_DATA(MMCD1_5_MARK, PORT59_FN3, MSEL4CR_15_1),
825 PINMUX_DATA(MMCD1_6_MARK, PORT60_FN3, MSEL4CR_15_1),
826 PINMUX_DATA(MMCD1_7_MARK, PORT61_FN3, MSEL4CR_15_1),
827 PINMUX_DATA(VINT_I_MARK, PORT65_FN3),
828 PINMUX_DATA(MMCCLK1_MARK, PORT66_FN3, MSEL4CR_15_1),
829 PINMUX_DATA(MMCCMD1_MARK, PORT67_FN3, MSEL4CR_15_1),
830 PINMUX_DATA(TPU0TO2_93_MARK, PORT93_FN3),
831 PINMUX_DATA(TPU0TO2_99_MARK, PORT99_FN3),
832 PINMUX_DATA(TPU0TO3_MARK, PORT112_FN3),
833 PINMUX_DATA(IDIN_0_MARK, PORT113_FN3),
834 PINMUX_DATA(EXTLP_0_MARK, PORT114_FN3),
835 PINMUX_DATA(OVCN2_0_MARK, PORT115_FN3),
836 PINMUX_DATA(PWEN_0_MARK, PORT116_FN3),
837 PINMUX_DATA(OVCN_0_MARK, PORT117_FN3),
838 PINMUX_DATA(KEYOUT7_MARK, PORT121_FN3),
839 PINMUX_DATA(KEYOUT6_MARK, PORT122_FN3),
840 PINMUX_DATA(KEYOUT5_MARK, PORT123_FN3),
841 PINMUX_DATA(KEYOUT4_MARK, PORT124_FN3),
842 PINMUX_DATA(KEYOUT3_MARK, PORT125_FN3),
843 PINMUX_DATA(KEYOUT2_MARK, PORT126_FN3),
844 PINMUX_DATA(KEYOUT1_MARK, PORT127_FN3),
845 PINMUX_DATA(KEYOUT0_MARK, PORT128_FN3),
846 PINMUX_DATA(KEYIN7_MARK, PORT129_FN3),
847 PINMUX_DATA(KEYIN6_MARK, PORT130_FN3),
848 PINMUX_DATA(KEYIN5_MARK, PORT131_FN3),
849 PINMUX_DATA(KEYIN4_MARK, PORT132_FN3),
850 PINMUX_DATA(KEYIN3_133_MARK, PORT133_FN3, MSEL4CR_18_0),
851 PINMUX_DATA(KEYIN2_134_MARK, PORT134_FN3, MSEL4CR_18_0),
852 PINMUX_DATA(KEYIN1_135_MARK, PORT135_FN3, MSEL4CR_18_0),
853 PINMUX_DATA(KEYIN0_136_MARK, PORT136_FN3, MSEL4CR_18_0),
854 PINMUX_DATA(TS_SPSYNC2_MARK, PORT137_FN3),
855 PINMUX_DATA(IROUT_139_MARK, PORT139_FN3),
856 PINMUX_DATA(IRDA_OUT_MARK, PORT140_FN3),
857 PINMUX_DATA(IRDA_IN_MARK, PORT141_FN3),
858 PINMUX_DATA(IRDA_FIRSEL_MARK, PORT142_FN3),
859 PINMUX_DATA(TS_SDAT2_MARK, PORT145_FN3),
860 PINMUX_DATA(TS_SDEN2_MARK, PORT146_FN3),
861 PINMUX_DATA(TS_SCK2_MARK, PORT147_FN3),
862
863 /* Function 4 */
864 PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
865 PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
866 PINMUX_DATA(GP_RX_FLAG_MARK, PORT76_FN4),
867 PINMUX_DATA(GP_RX_DATA_MARK, PORT77_FN4),
868 PINMUX_DATA(GP_TX_READY_MARK, PORT78_FN4),
869 PINMUX_DATA(GP_RX_WAKE_MARK, PORT79_FN4),
870 PINMUX_DATA(MP_TX_FLAG_MARK, PORT80_FN4),
871 PINMUX_DATA(MP_TX_DATA_MARK, PORT81_FN4),
872 PINMUX_DATA(MP_RX_READY_MARK, PORT82_FN4),
873 PINMUX_DATA(MP_TX_WAKE_MARK, PORT83_FN4),
874 PINMUX_DATA(MMCD0_0_MARK, PORT84_FN4, MSEL4CR_15_0),
875 PINMUX_DATA(MMCD0_1_MARK, PORT85_FN4, MSEL4CR_15_0),
876 PINMUX_DATA(MMCD0_2_MARK, PORT86_FN4, MSEL4CR_15_0),
877 PINMUX_DATA(MMCD0_3_MARK, PORT87_FN4, MSEL4CR_15_0),
878 PINMUX_DATA(MMCD0_4_MARK, PORT88_FN4, MSEL4CR_15_0),
879 PINMUX_DATA(MMCD0_5_MARK, PORT89_FN4, MSEL4CR_15_0),
880 PINMUX_DATA(MMCD0_6_MARK, PORT90_FN4, MSEL4CR_15_0),
881 PINMUX_DATA(MMCD0_7_MARK, PORT91_FN4, MSEL4CR_15_0),
882 PINMUX_DATA(MMCCMD0_MARK, PORT92_FN4, MSEL4CR_15_0),
883 PINMUX_DATA(SIM_RST_MARK, PORT94_FN4),
884 PINMUX_DATA(SIM_CLK_MARK, PORT95_FN4),
885 PINMUX_DATA(SIM_D_MARK, PORT98_FN4),
886 PINMUX_DATA(MMCCLK0_MARK, PORT99_FN4, MSEL4CR_15_0),
887 PINMUX_DATA(IDIN_1_113_MARK, PORT113_FN4, MSEL4CR_14_0),
888 PINMUX_DATA(OVCN_1_114_MARK, PORT114_FN4, MSEL4CR_14_0),
889 PINMUX_DATA(PWEN_1_115_MARK, PORT115_FN4),
890 PINMUX_DATA(EXTLP_1_MARK, PORT116_FN4),
891 PINMUX_DATA(OVCN2_1_MARK, PORT117_FN4),
892 PINMUX_DATA(KEYIN0_121_MARK, PORT121_FN4, MSEL4CR_18_1),
893 PINMUX_DATA(KEYIN1_122_MARK, PORT122_FN4, MSEL4CR_18_1),
894 PINMUX_DATA(KEYIN2_123_MARK, PORT123_FN4, MSEL4CR_18_1),
895 PINMUX_DATA(KEYIN3_124_MARK, PORT124_FN4, MSEL4CR_18_1),
896 PINMUX_DATA(PWEN_1_138_MARK, PORT138_FN4),
897 PINMUX_DATA(IROUT_140_MARK, PORT140_FN4),
898 PINMUX_DATA(LCDCS_MARK, PORT145_FN4),
899 PINMUX_DATA(LCDWR_MARK, PORT147_FN4),
900 PINMUX_DATA(LCDRS_MARK, PORT149_FN4),
901 PINMUX_DATA(OVCN_1_162_MARK, PORT162_FN4, MSEL4CR_14_1),
902
903 /* Function 5 */
904 PINMUX_DATA(GPI0_MARK, PORT41_FN5),
905 PINMUX_DATA(GPI1_MARK, PORT42_FN5),
906 PINMUX_DATA(GPO0_MARK, PORT43_FN5),
907 PINMUX_DATA(GPO1_MARK, PORT44_FN5),
908 PINMUX_DATA(I2C_SCL3S_MARK, PORT137_FN5, MSEL4CR_16_0),
909 PINMUX_DATA(I2C_SDA3S_MARK, PORT145_FN5, MSEL4CR_16_0),
910 PINMUX_DATA(I2C_SCL4S_MARK, PORT146_FN5, MSEL4CR_17_0),
911 PINMUX_DATA(I2C_SDA4S_MARK, PORT147_FN5, MSEL4CR_17_0),
912
913 /* Function select */
914 PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
915 PINMUX_DATA(LCDC1_SELECT_MARK, MSEL3CR_6_1),
916
917 PINMUX_DATA(TS0_1SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_0),
918 PINMUX_DATA(TS0_2SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_1),
919 PINMUX_DATA(TS1_1SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_0),
920 PINMUX_DATA(TS1_2SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_1),
921
922 PINMUX_DATA(SDENC_CPG_MARK, MSEL4CR_19_0),
923 PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
924
925 PINMUX_DATA(MFIv6_MARK, MSEL4CR_6_0),
926 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
927};
928
929#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
930#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
931#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
932
933static struct pinmux_gpio pinmux_gpios[] = {
934
935 /* PORT */
936 GPIO_PORT_ALL(),
937
938 /* IRQ */
939 GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1),
940 GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8),
941 GPIO_FN(IRQ3_16), GPIO_FN(IRQ4_17), GPIO_FN(IRQ4_163),
942 GPIO_FN(IRQ5), GPIO_FN(IRQ6_39), GPIO_FN(IRQ6_164),
943 GPIO_FN(IRQ7_40), GPIO_FN(IRQ7_167), GPIO_FN(IRQ8_41),
944 GPIO_FN(IRQ8_168), GPIO_FN(IRQ9_42), GPIO_FN(IRQ9_169),
945 GPIO_FN(IRQ10), GPIO_FN(IRQ11), GPIO_FN(IRQ12_80),
946 GPIO_FN(IRQ12_137), GPIO_FN(IRQ13_81), GPIO_FN(IRQ13_145),
947 GPIO_FN(IRQ14_82), GPIO_FN(IRQ14_146), GPIO_FN(IRQ15_83),
948 GPIO_FN(IRQ15_147), GPIO_FN(IRQ16_84), GPIO_FN(IRQ16_170),
949 GPIO_FN(IRQ17), GPIO_FN(IRQ18), GPIO_FN(IRQ19),
950 GPIO_FN(IRQ20), GPIO_FN(IRQ21), GPIO_FN(IRQ22),
951 GPIO_FN(IRQ23), GPIO_FN(IRQ24), GPIO_FN(IRQ25),
952 GPIO_FN(IRQ26_121), GPIO_FN(IRQ26_172), GPIO_FN(IRQ27_122),
953 GPIO_FN(IRQ27_180), GPIO_FN(IRQ28_123), GPIO_FN(IRQ28_181),
954 GPIO_FN(IRQ29_129), GPIO_FN(IRQ29_182), GPIO_FN(IRQ30_130),
955 GPIO_FN(IRQ30_183), GPIO_FN(IRQ31_138), GPIO_FN(IRQ31_184),
956
957 /* MSIOF0 */
958 GPIO_FN(MSIOF0_TSYNC), GPIO_FN(MSIOF0_TSCK), GPIO_FN(MSIOF0_RXD),
959 GPIO_FN(MSIOF0_RSCK), GPIO_FN(MSIOF0_RSYNC), GPIO_FN(MSIOF0_MCK0),
960 GPIO_FN(MSIOF0_MCK1), GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2),
961 GPIO_FN(MSIOF0_TXD),
962
963 /* MSIOF1 */
964 GPIO_FN(MSIOF1_TSCK_39), GPIO_FN(MSIOF1_TSCK_88),
965 GPIO_FN(MSIOF1_TSYNC_40), GPIO_FN(MSIOF1_TSYNC_89),
966 GPIO_FN(MSIOF1_TXD_41), GPIO_FN(MSIOF1_TXD_90),
967 GPIO_FN(MSIOF1_RXD_42), GPIO_FN(MSIOF1_RXD_91),
968 GPIO_FN(MSIOF1_SS1_43), GPIO_FN(MSIOF1_SS1_92),
969 GPIO_FN(MSIOF1_SS2_44), GPIO_FN(MSIOF1_SS2_93),
970 GPIO_FN(MSIOF1_RSCK), GPIO_FN(MSIOF1_RSYNC),
971 GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
972
973 /* MSIOF2 */
974 GPIO_FN(MSIOF2_RSCK), GPIO_FN(MSIOF2_RSYNC), GPIO_FN(MSIOF2_MCK0),
975 GPIO_FN(MSIOF2_MCK1), GPIO_FN(MSIOF2_SS1), GPIO_FN(MSIOF2_SS2),
976 GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_TSCK), GPIO_FN(MSIOF2_RXD),
977 GPIO_FN(MSIOF2_TXD),
978
979 /* MSIOF3 */
980 GPIO_FN(BBIF1_RXD), GPIO_FN(BBIF1_TSYNC), GPIO_FN(BBIF1_TSCK),
981 GPIO_FN(BBIF1_TXD), GPIO_FN(BBIF1_RSCK), GPIO_FN(BBIF1_RSYNC),
982 GPIO_FN(BBIF1_FLOW), GPIO_FN(BB_RX_FLOW_N),
983
984 /* MSIOF4 */
985 GPIO_FN(BBIF2_TSCK1), GPIO_FN(BBIF2_TSYNC1),
986 GPIO_FN(BBIF2_TXD1), GPIO_FN(BBIF2_RXD),
987
988 /* FSI */
989 GPIO_FN(FSIACK), GPIO_FN(FSIBCK), GPIO_FN(FSIAILR),
990 GPIO_FN(FSIAIBT), GPIO_FN(FSIAISLD), GPIO_FN(FSIAOMC),
991 GPIO_FN(FSIAOLR), GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD),
992 GPIO_FN(FSIASPDIF_11), GPIO_FN(FSIASPDIF_15),
993
994 /* FMSI */
995 GPIO_FN(FMSOCK), GPIO_FN(FMSOOLR), GPIO_FN(FMSIOLR),
996 GPIO_FN(FMSOOBT), GPIO_FN(FMSIOBT), GPIO_FN(FMSOSLD),
997 GPIO_FN(FMSOILR), GPIO_FN(FMSIILR), GPIO_FN(FMSOIBT),
998 GPIO_FN(FMSIIBT), GPIO_FN(FMSISLD), GPIO_FN(FMSICK),
999
1000 /* SCIFA0 */
1001 GPIO_FN(SCIFA0_TXD), GPIO_FN(SCIFA0_RXD), GPIO_FN(SCIFA0_SCK),
1002 GPIO_FN(SCIFA0_RTS), GPIO_FN(SCIFA0_CTS),
1003
1004 /* SCIFA1 */
1005 GPIO_FN(SCIFA1_TXD), GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_SCK),
1006 GPIO_FN(SCIFA1_RTS), GPIO_FN(SCIFA1_CTS),
1007
1008 /* SCIFA2 */
1009 GPIO_FN(SCIFA2_CTS1), GPIO_FN(SCIFA2_RTS1), GPIO_FN(SCIFA2_TXD1),
1010 GPIO_FN(SCIFA2_RXD1), GPIO_FN(SCIFA2_SCK1),
1011
1012 /* SCIFA3 */
1013 GPIO_FN(SCIFA3_CTS_43), GPIO_FN(SCIFA3_CTS_140),
1014 GPIO_FN(SCIFA3_RTS_44), GPIO_FN(SCIFA3_RTS_141),
1015 GPIO_FN(SCIFA3_SCK), GPIO_FN(SCIFA3_TXD),
1016 GPIO_FN(SCIFA3_RXD),
1017
1018 /* SCIFA4 */
1019 GPIO_FN(SCIFA4_RXD), GPIO_FN(SCIFA4_TXD),
1020
1021 /* SCIFA5 */
1022 GPIO_FN(SCIFA5_RXD), GPIO_FN(SCIFA5_TXD),
1023
1024 /* SCIFB */
1025 GPIO_FN(SCIFB_SCK), GPIO_FN(SCIFB_RTS), GPIO_FN(SCIFB_CTS),
1026 GPIO_FN(SCIFB_TXD), GPIO_FN(SCIFB_RXD),
1027
1028 /* CEU */
1029 GPIO_FN(VIO_HD), GPIO_FN(VIO_CKO1), GPIO_FN(VIO_CKO2),
1030 GPIO_FN(VIO_VD), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
1031 GPIO_FN(VIO_CKO), GPIO_FN(VIO_D0), GPIO_FN(VIO_D1),
1032 GPIO_FN(VIO_D2), GPIO_FN(VIO_D3), GPIO_FN(VIO_D4),
1033 GPIO_FN(VIO_D5), GPIO_FN(VIO_D6), GPIO_FN(VIO_D7),
1034 GPIO_FN(VIO_D8), GPIO_FN(VIO_D9), GPIO_FN(VIO_D10),
1035 GPIO_FN(VIO_D11), GPIO_FN(VIO_D12), GPIO_FN(VIO_D13),
1036 GPIO_FN(VIO_D14), GPIO_FN(VIO_D15),
1037
1038 /* USB0 */
1039 GPIO_FN(IDIN_0), GPIO_FN(EXTLP_0), GPIO_FN(OVCN2_0),
1040 GPIO_FN(PWEN_0), GPIO_FN(OVCN_0), GPIO_FN(VBUS0_0),
1041
1042 /* USB1 */
1043 GPIO_FN(IDIN_1_18), GPIO_FN(IDIN_1_113),
1044 GPIO_FN(OVCN_1_114), GPIO_FN(OVCN_1_162),
1045 GPIO_FN(PWEN_1_115), GPIO_FN(PWEN_1_138),
1046 GPIO_FN(EXTLP_1), GPIO_FN(OVCN2_1),
1047 GPIO_FN(VBUS0_1),
1048
1049 /* GPIO */
1050 GPIO_FN(GPI0), GPIO_FN(GPI1), GPIO_FN(GPO0), GPIO_FN(GPO1),
1051
1052 /* BSC */
1053 GPIO_FN(BS), GPIO_FN(WE1), GPIO_FN(CKO),
1054 GPIO_FN(WAIT), GPIO_FN(RDWR),
1055
1056 GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2),
1057 GPIO_FN(A3), GPIO_FN(A6), GPIO_FN(A7),
1058 GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10),
1059 GPIO_FN(A11), GPIO_FN(A12), GPIO_FN(A13),
1060 GPIO_FN(A14), GPIO_FN(A15), GPIO_FN(A16),
1061 GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19),
1062 GPIO_FN(A20), GPIO_FN(A21), GPIO_FN(A22),
1063 GPIO_FN(A23), GPIO_FN(A24), GPIO_FN(A25),
1064 GPIO_FN(A26),
1065
1066 GPIO_FN(CS0), GPIO_FN(CS2), GPIO_FN(CS4),
1067 GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(CS6A),
1068
1069 /* BSC/FLCTL */
1070 GPIO_FN(RD_FSC), GPIO_FN(WE0_FWE), GPIO_FN(A4_FOE),
1071 GPIO_FN(A5_FCDE), GPIO_FN(D0_NAF0), GPIO_FN(D1_NAF1),
1072 GPIO_FN(D2_NAF2), GPIO_FN(D3_NAF3), GPIO_FN(D4_NAF4),
1073 GPIO_FN(D5_NAF5), GPIO_FN(D6_NAF6), GPIO_FN(D7_NAF7),
1074 GPIO_FN(D8_NAF8), GPIO_FN(D9_NAF9), GPIO_FN(D10_NAF10),
1075 GPIO_FN(D11_NAF11), GPIO_FN(D12_NAF12), GPIO_FN(D13_NAF13),
1076 GPIO_FN(D14_NAF14), GPIO_FN(D15_NAF15),
1077
1078 /* MMCIF(1) */
1079 GPIO_FN(MMCD0_0), GPIO_FN(MMCD0_1), GPIO_FN(MMCD0_2),
1080 GPIO_FN(MMCD0_3), GPIO_FN(MMCD0_4), GPIO_FN(MMCD0_5),
1081 GPIO_FN(MMCD0_6), GPIO_FN(MMCD0_7), GPIO_FN(MMCCMD0),
1082 GPIO_FN(MMCCLK0),
1083
1084 /* MMCIF(2) */
1085 GPIO_FN(MMCD1_0), GPIO_FN(MMCD1_1), GPIO_FN(MMCD1_2),
1086 GPIO_FN(MMCD1_3), GPIO_FN(MMCD1_4), GPIO_FN(MMCD1_5),
1087 GPIO_FN(MMCD1_6), GPIO_FN(MMCD1_7), GPIO_FN(MMCCLK1),
1088 GPIO_FN(MMCCMD1),
1089
1090 /* SPU2 */
1091 GPIO_FN(VINT_I),
1092
1093 /* FLCTL */
1094 GPIO_FN(FCE1), GPIO_FN(FCE0), GPIO_FN(FRB),
1095
1096 /* HSI */
1097 GPIO_FN(GP_RX_FLAG), GPIO_FN(GP_RX_DATA), GPIO_FN(GP_TX_READY),
1098 GPIO_FN(GP_RX_WAKE), GPIO_FN(MP_TX_FLAG), GPIO_FN(MP_TX_DATA),
1099 GPIO_FN(MP_RX_READY), GPIO_FN(MP_TX_WAKE),
1100
1101 /* MFI */
1102 GPIO_FN(MFIv6),
1103 GPIO_FN(MFIv4),
1104
1105 GPIO_FN(MEMC_BUSCLK_MEMC_A0), GPIO_FN(MEMC_ADV_MEMC_DREQ0),
1106 GPIO_FN(MEMC_WAIT_MEMC_DREQ1), GPIO_FN(MEMC_CS1_MEMC_A1),
1107 GPIO_FN(MEMC_CS0), GPIO_FN(MEMC_NOE),
1108 GPIO_FN(MEMC_NWE), GPIO_FN(MEMC_INT),
1109
1110 GPIO_FN(MEMC_AD0), GPIO_FN(MEMC_AD1), GPIO_FN(MEMC_AD2),
1111 GPIO_FN(MEMC_AD3), GPIO_FN(MEMC_AD4), GPIO_FN(MEMC_AD5),
1112 GPIO_FN(MEMC_AD6), GPIO_FN(MEMC_AD7), GPIO_FN(MEMC_AD8),
1113 GPIO_FN(MEMC_AD9), GPIO_FN(MEMC_AD10), GPIO_FN(MEMC_AD11),
1114 GPIO_FN(MEMC_AD12), GPIO_FN(MEMC_AD13), GPIO_FN(MEMC_AD14),
1115 GPIO_FN(MEMC_AD15),
1116
1117 /* SIM */
1118 GPIO_FN(SIM_RST), GPIO_FN(SIM_CLK), GPIO_FN(SIM_D),
1119
1120 /* TPU */
1121 GPIO_FN(TPU0TO0), GPIO_FN(TPU0TO1), GPIO_FN(TPU0TO2_93),
1122 GPIO_FN(TPU0TO2_99), GPIO_FN(TPU0TO3),
1123
1124 /* I2C2 */
1125 GPIO_FN(I2C_SCL2), GPIO_FN(I2C_SDA2),
1126
1127 /* I2C3(1) */
1128 GPIO_FN(I2C_SCL3), GPIO_FN(I2C_SDA3),
1129
1130 /* I2C3(2) */
1131 GPIO_FN(I2C_SCL3S), GPIO_FN(I2C_SDA3S),
1132
1133 /* I2C4(2) */
1134 GPIO_FN(I2C_SCL4), GPIO_FN(I2C_SDA4),
1135
1136 /* I2C4(2) */
1137 GPIO_FN(I2C_SCL4S), GPIO_FN(I2C_SDA4S),
1138
1139 /* KEYSC */
1140 GPIO_FN(KEYOUT0), GPIO_FN(KEYIN0_121), GPIO_FN(KEYIN0_136),
1141 GPIO_FN(KEYOUT1), GPIO_FN(KEYIN1_122), GPIO_FN(KEYIN1_135),
1142 GPIO_FN(KEYOUT2), GPIO_FN(KEYIN2_123), GPIO_FN(KEYIN2_134),
1143 GPIO_FN(KEYOUT3), GPIO_FN(KEYIN3_124), GPIO_FN(KEYIN3_133),
1144 GPIO_FN(KEYOUT4), GPIO_FN(KEYIN4), GPIO_FN(KEYOUT5),
1145 GPIO_FN(KEYIN5), GPIO_FN(KEYOUT6), GPIO_FN(KEYIN6),
1146 GPIO_FN(KEYOUT7), GPIO_FN(KEYIN7),
1147
1148 /* LCDC */
1149 GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDVSYN),
1150 GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(LCDRD),
1151 GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(LCDLCLK),
1152 GPIO_FN(LCDDON),
1153
1154 GPIO_FN(LCDD0), GPIO_FN(LCDD1), GPIO_FN(LCDD2),
1155 GPIO_FN(LCDD3), GPIO_FN(LCDD4), GPIO_FN(LCDD5),
1156 GPIO_FN(LCDD6), GPIO_FN(LCDD7), GPIO_FN(LCDD8),
1157 GPIO_FN(LCDD9), GPIO_FN(LCDD10), GPIO_FN(LCDD11),
1158 GPIO_FN(LCDD12), GPIO_FN(LCDD13), GPIO_FN(LCDD14),
1159 GPIO_FN(LCDD15), GPIO_FN(LCDD16), GPIO_FN(LCDD17),
1160 GPIO_FN(LCDD18), GPIO_FN(LCDD19), GPIO_FN(LCDD20),
1161 GPIO_FN(LCDD21), GPIO_FN(LCDD22), GPIO_FN(LCDD23),
1162
1163 /* IRDA */
1164 GPIO_FN(IRDA_OUT), GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
1165 GPIO_FN(IROUT_139), GPIO_FN(IROUT_140),
1166
1167 /* TSIF1 */
1168 GPIO_FN(TS0_1SELECT),
1169 GPIO_FN(TS0_2SELECT),
1170 GPIO_FN(TS1_1SELECT),
1171 GPIO_FN(TS1_2SELECT),
1172
1173 GPIO_FN(TS_SPSYNC1), GPIO_FN(TS_SDAT1),
1174 GPIO_FN(TS_SDEN1), GPIO_FN(TS_SCK1),
1175
1176 /* TSIF2 */
1177 GPIO_FN(TS_SPSYNC2), GPIO_FN(TS_SDAT2),
1178 GPIO_FN(TS_SDEN2), GPIO_FN(TS_SCK2),
1179
1180 /* HDMI */
1181 GPIO_FN(HDMI_HPD), GPIO_FN(HDMI_CEC),
1182
1183 /* SDHI0 */
1184 GPIO_FN(SDHICLK0), GPIO_FN(SDHICD0), GPIO_FN(SDHICMD0),
1185 GPIO_FN(SDHIWP0), GPIO_FN(SDHID0_0), GPIO_FN(SDHID0_1),
1186 GPIO_FN(SDHID0_2), GPIO_FN(SDHID0_3),
1187
1188 /* SDHI1 */
1189 GPIO_FN(SDHICLK1), GPIO_FN(SDHICMD1), GPIO_FN(SDHID1_0),
1190 GPIO_FN(SDHID1_1), GPIO_FN(SDHID1_2), GPIO_FN(SDHID1_3),
1191
1192 /* SDHI2 */
1193 GPIO_FN(SDHICLK2), GPIO_FN(SDHICMD2), GPIO_FN(SDHID2_0),
1194 GPIO_FN(SDHID2_1), GPIO_FN(SDHID2_2), GPIO_FN(SDHID2_3),
1195
1196 /* SDENC */
1197 GPIO_FN(SDENC_CPG),
1198 GPIO_FN(SDENC_DV_CLKI),
1199};
1200
1201/* helper for top 4 bits in PORTnCR */
1202#define PCRH(in, in_pd, in_pu, out) \
1203 0, (out), (in), 0, \
1204 0, 0, 0, 0, \
1205 0, 0, (in_pd), 0, \
1206 0, 0, (in_pu), 0
1207
1208#define PORTCR(nr, reg) \
1209 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1210 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1211 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1212 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1213 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1214 PORT##nr##_FN6, PORT##nr##_FN7 } \
1215 }
1216
1217static struct pinmux_cfg_reg pinmux_config_regs[] = {
1218 PORTCR(0, 0xE6051000), /* PORT0CR */
1219 PORTCR(1, 0xE6051001), /* PORT1CR */
1220 PORTCR(2, 0xE6051002), /* PORT2CR */
1221 PORTCR(3, 0xE6051003), /* PORT3CR */
1222 PORTCR(4, 0xE6051004), /* PORT4CR */
1223 PORTCR(5, 0xE6051005), /* PORT5CR */
1224 PORTCR(6, 0xE6051006), /* PORT6CR */
1225 PORTCR(7, 0xE6051007), /* PORT7CR */
1226 PORTCR(8, 0xE6051008), /* PORT8CR */
1227 PORTCR(9, 0xE6051009), /* PORT9CR */
1228 PORTCR(10, 0xE605100A), /* PORT10CR */
1229 PORTCR(11, 0xE605100B), /* PORT11CR */
1230 PORTCR(12, 0xE605100C), /* PORT12CR */
1231 PORTCR(13, 0xE605100D), /* PORT13CR */
1232 PORTCR(14, 0xE605100E), /* PORT14CR */
1233 PORTCR(15, 0xE605100F), /* PORT15CR */
1234 PORTCR(16, 0xE6051010), /* PORT16CR */
1235 PORTCR(17, 0xE6051011), /* PORT17CR */
1236 PORTCR(18, 0xE6051012), /* PORT18CR */
1237 PORTCR(19, 0xE6051013), /* PORT19CR */
1238 PORTCR(20, 0xE6051014), /* PORT20CR */
1239 PORTCR(21, 0xE6051015), /* PORT21CR */
1240 PORTCR(22, 0xE6051016), /* PORT22CR */
1241 PORTCR(23, 0xE6051017), /* PORT23CR */
1242 PORTCR(24, 0xE6051018), /* PORT24CR */
1243 PORTCR(25, 0xE6051019), /* PORT25CR */
1244 PORTCR(26, 0xE605101A), /* PORT26CR */
1245 PORTCR(27, 0xE605101B), /* PORT27CR */
1246 PORTCR(28, 0xE605101C), /* PORT28CR */
1247 PORTCR(29, 0xE605101D), /* PORT29CR */
1248 PORTCR(30, 0xE605101E), /* PORT30CR */
1249 PORTCR(31, 0xE605101F), /* PORT31CR */
1250 PORTCR(32, 0xE6051020), /* PORT32CR */
1251 PORTCR(33, 0xE6051021), /* PORT33CR */
1252 PORTCR(34, 0xE6051022), /* PORT34CR */
1253 PORTCR(35, 0xE6051023), /* PORT35CR */
1254 PORTCR(36, 0xE6051024), /* PORT36CR */
1255 PORTCR(37, 0xE6051025), /* PORT37CR */
1256 PORTCR(38, 0xE6051026), /* PORT38CR */
1257 PORTCR(39, 0xE6051027), /* PORT39CR */
1258 PORTCR(40, 0xE6051028), /* PORT40CR */
1259 PORTCR(41, 0xE6051029), /* PORT41CR */
1260 PORTCR(42, 0xE605102A), /* PORT42CR */
1261 PORTCR(43, 0xE605102B), /* PORT43CR */
1262 PORTCR(44, 0xE605102C), /* PORT44CR */
1263 PORTCR(45, 0xE605102D), /* PORT45CR */
1264 PORTCR(46, 0xE605202E), /* PORT46CR */
1265 PORTCR(47, 0xE605202F), /* PORT47CR */
1266 PORTCR(48, 0xE6052030), /* PORT48CR */
1267 PORTCR(49, 0xE6052031), /* PORT49CR */
1268 PORTCR(50, 0xE6052032), /* PORT50CR */
1269 PORTCR(51, 0xE6052033), /* PORT51CR */
1270 PORTCR(52, 0xE6052034), /* PORT52CR */
1271 PORTCR(53, 0xE6052035), /* PORT53CR */
1272 PORTCR(54, 0xE6052036), /* PORT54CR */
1273 PORTCR(55, 0xE6052037), /* PORT55CR */
1274 PORTCR(56, 0xE6052038), /* PORT56CR */
1275 PORTCR(57, 0xE6052039), /* PORT57CR */
1276 PORTCR(58, 0xE605203A), /* PORT58CR */
1277 PORTCR(59, 0xE605203B), /* PORT59CR */
1278 PORTCR(60, 0xE605203C), /* PORT60CR */
1279 PORTCR(61, 0xE605203D), /* PORT61CR */
1280 PORTCR(62, 0xE605203E), /* PORT62CR */
1281 PORTCR(63, 0xE605203F), /* PORT63CR */
1282 PORTCR(64, 0xE6052040), /* PORT64CR */
1283 PORTCR(65, 0xE6052041), /* PORT65CR */
1284 PORTCR(66, 0xE6052042), /* PORT66CR */
1285 PORTCR(67, 0xE6052043), /* PORT67CR */
1286 PORTCR(68, 0xE6052044), /* PORT68CR */
1287 PORTCR(69, 0xE6052045), /* PORT69CR */
1288 PORTCR(70, 0xE6052046), /* PORT70CR */
1289 PORTCR(71, 0xE6052047), /* PORT71CR */
1290 PORTCR(72, 0xE6052048), /* PORT72CR */
1291 PORTCR(73, 0xE6052049), /* PORT73CR */
1292 PORTCR(74, 0xE605204A), /* PORT74CR */
1293 PORTCR(75, 0xE605204B), /* PORT75CR */
1294 PORTCR(76, 0xE605004C), /* PORT76CR */
1295 PORTCR(77, 0xE605004D), /* PORT77CR */
1296 PORTCR(78, 0xE605004E), /* PORT78CR */
1297 PORTCR(79, 0xE605004F), /* PORT79CR */
1298 PORTCR(80, 0xE6050050), /* PORT80CR */
1299 PORTCR(81, 0xE6050051), /* PORT81CR */
1300 PORTCR(82, 0xE6050052), /* PORT82CR */
1301 PORTCR(83, 0xE6050053), /* PORT83CR */
1302 PORTCR(84, 0xE6050054), /* PORT84CR */
1303 PORTCR(85, 0xE6050055), /* PORT85CR */
1304 PORTCR(86, 0xE6050056), /* PORT86CR */
1305 PORTCR(87, 0xE6050057), /* PORT87CR */
1306 PORTCR(88, 0xE6050058), /* PORT88CR */
1307 PORTCR(89, 0xE6050059), /* PORT89CR */
1308 PORTCR(90, 0xE605005A), /* PORT90CR */
1309 PORTCR(91, 0xE605005B), /* PORT91CR */
1310 PORTCR(92, 0xE605005C), /* PORT92CR */
1311 PORTCR(93, 0xE605005D), /* PORT93CR */
1312 PORTCR(94, 0xE605005E), /* PORT94CR */
1313 PORTCR(95, 0xE605005F), /* PORT95CR */
1314 PORTCR(96, 0xE6050060), /* PORT96CR */
1315 PORTCR(97, 0xE6050061), /* PORT97CR */
1316 PORTCR(98, 0xE6050062), /* PORT98CR */
1317 PORTCR(99, 0xE6050063), /* PORT99CR */
1318 PORTCR(100, 0xE6053064), /* PORT100CR */
1319 PORTCR(101, 0xE6053065), /* PORT101CR */
1320 PORTCR(102, 0xE6053066), /* PORT102CR */
1321 PORTCR(103, 0xE6053067), /* PORT103CR */
1322 PORTCR(104, 0xE6053068), /* PORT104CR */
1323 PORTCR(105, 0xE6053069), /* PORT105CR */
1324 PORTCR(106, 0xE605306A), /* PORT106CR */
1325 PORTCR(107, 0xE605306B), /* PORT107CR */
1326 PORTCR(108, 0xE605306C), /* PORT108CR */
1327 PORTCR(109, 0xE605306D), /* PORT109CR */
1328 PORTCR(110, 0xE605306E), /* PORT110CR */
1329 PORTCR(111, 0xE605306F), /* PORT111CR */
1330 PORTCR(112, 0xE6053070), /* PORT112CR */
1331 PORTCR(113, 0xE6053071), /* PORT113CR */
1332 PORTCR(114, 0xE6053072), /* PORT114CR */
1333 PORTCR(115, 0xE6053073), /* PORT115CR */
1334 PORTCR(116, 0xE6053074), /* PORT116CR */
1335 PORTCR(117, 0xE6053075), /* PORT117CR */
1336 PORTCR(118, 0xE6053076), /* PORT118CR */
1337 PORTCR(119, 0xE6053077), /* PORT119CR */
1338 PORTCR(120, 0xE6053078), /* PORT120CR */
1339 PORTCR(121, 0xE6050079), /* PORT121CR */
1340 PORTCR(122, 0xE605007A), /* PORT122CR */
1341 PORTCR(123, 0xE605007B), /* PORT123CR */
1342 PORTCR(124, 0xE605007C), /* PORT124CR */
1343 PORTCR(125, 0xE605007D), /* PORT125CR */
1344 PORTCR(126, 0xE605007E), /* PORT126CR */
1345 PORTCR(127, 0xE605007F), /* PORT127CR */
1346 PORTCR(128, 0xE6050080), /* PORT128CR */
1347 PORTCR(129, 0xE6050081), /* PORT129CR */
1348 PORTCR(130, 0xE6050082), /* PORT130CR */
1349 PORTCR(131, 0xE6050083), /* PORT131CR */
1350 PORTCR(132, 0xE6050084), /* PORT132CR */
1351 PORTCR(133, 0xE6050085), /* PORT133CR */
1352 PORTCR(134, 0xE6050086), /* PORT134CR */
1353 PORTCR(135, 0xE6050087), /* PORT135CR */
1354 PORTCR(136, 0xE6050088), /* PORT136CR */
1355 PORTCR(137, 0xE6050089), /* PORT137CR */
1356 PORTCR(138, 0xE605008A), /* PORT138CR */
1357 PORTCR(139, 0xE605008B), /* PORT139CR */
1358 PORTCR(140, 0xE605008C), /* PORT140CR */
1359 PORTCR(141, 0xE605008D), /* PORT141CR */
1360 PORTCR(142, 0xE605008E), /* PORT142CR */
1361 PORTCR(143, 0xE605008F), /* PORT143CR */
1362 PORTCR(144, 0xE6050090), /* PORT144CR */
1363 PORTCR(145, 0xE6050091), /* PORT145CR */
1364 PORTCR(146, 0xE6050092), /* PORT146CR */
1365 PORTCR(147, 0xE6050093), /* PORT147CR */
1366 PORTCR(148, 0xE6050094), /* PORT148CR */
1367 PORTCR(149, 0xE6050095), /* PORT149CR */
1368 PORTCR(150, 0xE6050096), /* PORT150CR */
1369 PORTCR(151, 0xE6050097), /* PORT151CR */
1370 PORTCR(152, 0xE6053098), /* PORT152CR */
1371 PORTCR(153, 0xE6053099), /* PORT153CR */
1372 PORTCR(154, 0xE605309A), /* PORT154CR */
1373 PORTCR(155, 0xE605309B), /* PORT155CR */
1374 PORTCR(156, 0xE605009C), /* PORT156CR */
1375 PORTCR(157, 0xE605009D), /* PORT157CR */
1376 PORTCR(158, 0xE605009E), /* PORT158CR */
1377 PORTCR(159, 0xE605009F), /* PORT159CR */
1378 PORTCR(160, 0xE60500A0), /* PORT160CR */
1379 PORTCR(161, 0xE60500A1), /* PORT161CR */
1380 PORTCR(162, 0xE60500A2), /* PORT162CR */
1381 PORTCR(163, 0xE60500A3), /* PORT163CR */
1382 PORTCR(164, 0xE60500A4), /* PORT164CR */
1383 PORTCR(165, 0xE60500A5), /* PORT165CR */
1384 PORTCR(166, 0xE60500A6), /* PORT166CR */
1385 PORTCR(167, 0xE60520A7), /* PORT167CR */
1386 PORTCR(168, 0xE60520A8), /* PORT168CR */
1387 PORTCR(169, 0xE60520A9), /* PORT169CR */
1388 PORTCR(170, 0xE60520AA), /* PORT170CR */
1389 PORTCR(171, 0xE60520AB), /* PORT171CR */
1390 PORTCR(172, 0xE60520AC), /* PORT172CR */
1391 PORTCR(173, 0xE60520AD), /* PORT173CR */
1392 PORTCR(174, 0xE60520AE), /* PORT174CR */
1393 PORTCR(175, 0xE60520AF), /* PORT175CR */
1394 PORTCR(176, 0xE60520B0), /* PORT176CR */
1395 PORTCR(177, 0xE60520B1), /* PORT177CR */
1396 PORTCR(178, 0xE60520B2), /* PORT178CR */
1397 PORTCR(179, 0xE60520B3), /* PORT179CR */
1398 PORTCR(180, 0xE60520B4), /* PORT180CR */
1399 PORTCR(181, 0xE60520B5), /* PORT181CR */
1400 PORTCR(182, 0xE60520B6), /* PORT182CR */
1401 PORTCR(183, 0xE60520B7), /* PORT183CR */
1402 PORTCR(184, 0xE60520B8), /* PORT184CR */
1403 PORTCR(185, 0xE60520B9), /* PORT185CR */
1404 PORTCR(186, 0xE60520BA), /* PORT186CR */
1405 PORTCR(187, 0xE60520BB), /* PORT187CR */
1406 PORTCR(188, 0xE60520BC), /* PORT188CR */
1407 PORTCR(189, 0xE60520BD), /* PORT189CR */
1408 PORTCR(190, 0xE60520BE), /* PORT190CR */
1409
1410 { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
1411 MSEL1CR_31_0, MSEL1CR_31_1,
1412 MSEL1CR_30_0, MSEL1CR_30_1,
1413 MSEL1CR_29_0, MSEL1CR_29_1,
1414 MSEL1CR_28_0, MSEL1CR_28_1,
1415 MSEL1CR_27_0, MSEL1CR_27_1,
1416 MSEL1CR_26_0, MSEL1CR_26_1,
1417 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1418 0, 0, 0, 0, 0, 0, 0, 0,
1419 MSEL1CR_16_0, MSEL1CR_16_1,
1420 MSEL1CR_15_0, MSEL1CR_15_1,
1421 MSEL1CR_14_0, MSEL1CR_14_1,
1422 MSEL1CR_13_0, MSEL1CR_13_1,
1423 MSEL1CR_12_0, MSEL1CR_12_1,
1424 0, 0, 0, 0,
1425 MSEL1CR_9_0, MSEL1CR_9_1,
1426 MSEL1CR_8_0, MSEL1CR_8_1,
1427 MSEL1CR_7_0, MSEL1CR_7_1,
1428 MSEL1CR_6_0, MSEL1CR_6_1,
1429 0, 0,
1430 MSEL1CR_4_0, MSEL1CR_4_1,
1431 MSEL1CR_3_0, MSEL1CR_3_1,
1432 MSEL1CR_2_0, MSEL1CR_2_1,
1433 0, 0,
1434 MSEL1CR_0_0, MSEL1CR_0_1,
1435 }
1436 },
1437 { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
1438 0, 0, 0, 0,
1439 0, 0, 0, 0,
1440 MSEL3CR_27_0, MSEL3CR_27_1,
1441 MSEL3CR_26_0, MSEL3CR_26_1,
1442 0, 0, 0, 0,
1443 0, 0, 0, 0,
1444 MSEL3CR_21_0, MSEL3CR_21_1,
1445 MSEL3CR_20_0, MSEL3CR_20_1,
1446 0, 0, 0, 0,
1447 0, 0, 0, 0,
1448 MSEL3CR_15_0, MSEL3CR_15_1,
1449 0, 0, 0, 0,
1450 0, 0, 0, 0,
1451 0, 0,
1452 MSEL3CR_9_0, MSEL3CR_9_1,
1453 0, 0, 0, 0,
1454 MSEL3CR_6_0, MSEL3CR_6_1,
1455 0, 0, 0, 0,
1456 0, 0, 0, 0,
1457 0, 0, 0, 0,
1458 }
1459 },
1460 { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
1461 0, 0, 0, 0,
1462 0, 0, 0, 0,
1463 0, 0, 0, 0,
1464 0, 0, 0, 0,
1465 0, 0, 0, 0,
1466 0, 0, 0, 0,
1467 MSEL4CR_19_0, MSEL4CR_19_1,
1468 MSEL4CR_18_0, MSEL4CR_18_1,
1469 MSEL4CR_17_0, MSEL4CR_17_1,
1470 MSEL4CR_16_0, MSEL4CR_16_1,
1471 MSEL4CR_15_0, MSEL4CR_15_1,
1472 MSEL4CR_14_0, MSEL4CR_14_1,
1473 0, 0, 0, 0,
1474 0, 0,
1475 MSEL4CR_10_0, MSEL4CR_10_1,
1476 0, 0, 0, 0,
1477 0, 0,
1478 MSEL4CR_6_0, MSEL4CR_6_1,
1479 0, 0,
1480 MSEL4CR_4_0, MSEL4CR_4_1,
1481 0, 0, 0, 0,
1482 MSEL4CR_1_0, MSEL4CR_1_1,
1483 0, 0,
1484 }
1485 },
1486 { },
1487};
1488
1489static struct pinmux_data_reg pinmux_data_regs[] = {
1490 { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
1491 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
1492 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
1493 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
1494 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
1495 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
1496 0, 0, 0, 0,
1497 0, 0, 0, 0,
1498 0, 0, 0, 0,
1499 }
1500 },
1501 { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
1502 PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
1503 PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
1504 0, 0, 0, 0,
1505 0, 0, 0, 0,
1506 0, 0, 0, 0,
1507 0, 0, 0, 0,
1508 0, 0, 0, 0,
1509 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
1510 }
1511 },
1512 { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
1513 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
1514 0, 0, 0, 0,
1515 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
1516 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
1517 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
1518 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
1519 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
1520 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
1521 }
1522 },
1523 { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
1524 0, 0, 0, 0,
1525 0, 0, 0, 0,
1526 0, 0, 0, 0,
1527 0, 0, 0, 0,
1528 0, 0, 0, 0,
1529 0, 0, 0, 0,
1530 0, PORT166_DATA, PORT165_DATA, PORT164_DATA,
1531 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
1532 }
1533 },
1534 { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
1535 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
1536 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
1537 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
1538 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
1539 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
1540 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
1541 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
1542 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
1543 }
1544 },
1545 { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
1546 0, 0, 0, 0, 0, 0, 0, 0,
1547 0, 0, 0, 0, 0, 0, 0, 0,
1548 0, 0, PORT45_DATA, PORT44_DATA,
1549 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
1550 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
1551 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
1552 }
1553 },
1554 { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
1555 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
1556 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
1557 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
1558 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
1559 PORT47_DATA, PORT46_DATA, 0, 0,
1560 0, 0, 0, 0,
1561 0, 0, 0, 0,
1562 0, 0, 0, 0,
1563 }
1564 },
1565 { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
1566 0, 0, 0, 0,
1567 0, 0, 0, 0,
1568 0, 0, 0, 0,
1569 0, 0, 0, 0,
1570 0, 0, 0, 0,
1571 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
1572 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
1573 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
1574 }
1575 },
1576 { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
1577 0, PORT190_DATA, PORT189_DATA, PORT188_DATA,
1578 PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
1579 PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
1580 PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
1581 PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
1582 PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
1583 PORT167_DATA, 0, 0, 0,
1584 0, 0, 0, 0,
1585 }
1586 },
1587 { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
1588 0, 0, 0, 0,
1589 0, 0, 0, PORT120_DATA,
1590 PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
1591 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
1592 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
1593 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
1594 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
1595 0, 0, 0, 0,
1596 }
1597 },
1598 { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
1599 0, 0, 0, 0,
1600 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
1601 0, 0, 0, 0,
1602 0, 0, 0, 0,
1603 0, 0, 0, 0,
1604 0, 0, 0, 0,
1605 0, 0, 0, 0,
1606 0, 0, 0, 0,
1607 }
1608 },
1609 { },
1610};
1611
1612static struct pinmux_info sh7372_pinmux_info = {
1613 .name = "sh7372_pfc",
1614 .reserved_id = PINMUX_RESERVED,
1615 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1616 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1617 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1618 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1619 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1620 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1621 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1622
1623 .first_gpio = GPIO_PORT0,
1624 .last_gpio = GPIO_FN_SDENC_DV_CLKI,
1625
1626 .gpios = pinmux_gpios,
1627 .cfg_regs = pinmux_config_regs,
1628 .data_regs = pinmux_data_regs,
1629
1630 .gpio_data = pinmux_data,
1631 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1632};
1633
1634void sh7372_pinmux_init(void)
1635{
1636 register_pinmux(&sh7372_pinmux_info);
1637}
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
new file mode 100644
index 000000000000..613e6842ad05
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -0,0 +1,1767 @@
1/*
2 * sh7377 processor support - PFC hardware block
3 *
4 * Copyright (C) 2010 NISHIMOTO Hiroki
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of the
9 * License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/gpio.h>
23#include <mach/sh7377.h>
24
25#define _1(fn, pfx, sfx) fn(pfx, sfx)
26
27#define _10(fn, pfx, sfx) \
28 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
29 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
30 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
31 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
32 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
33
34#define _90(fn, pfx, sfx) \
35 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
36 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
37 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
38 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
39 _10(fn, pfx##9, sfx)
40
41#define _265(fn, pfx, sfx) \
42 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \
43 _10(fn, pfx##10, sfx), \
44 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \
45 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \
46 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \
47 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \
48 _1(fn, pfx##118, sfx), \
49 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
50 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
51 _10(fn, pfx##15, sfx), \
52 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
53 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
54 _1(fn, pfx##164, sfx), \
55 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
56 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
57 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
58 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
59 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
60 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
61 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
62 _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx), \
63 _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx), \
64 _1(fn, pfx##264, sfx)
65
66#define _PORT(pfx, sfx) pfx##_##sfx
67#define PORT_265(str) _265(_PORT, PORT, str)
68
69enum {
70 PINMUX_RESERVED = 0,
71
72 PINMUX_DATA_BEGIN,
73 PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */
74 PINMUX_DATA_END,
75
76 PINMUX_INPUT_BEGIN,
77 PORT_265(IN), /* PORT0_IN -> PORT264_IN */
78 PINMUX_INPUT_END,
79
80 PINMUX_INPUT_PULLUP_BEGIN,
81 PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
82 PINMUX_INPUT_PULLUP_END,
83
84 PINMUX_INPUT_PULLDOWN_BEGIN,
85 PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
86 PINMUX_INPUT_PULLDOWN_END,
87
88 PINMUX_OUTPUT_BEGIN,
89 PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */
90 PINMUX_OUTPUT_END,
91
92 PINMUX_FUNCTION_BEGIN,
93 PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
94 PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
95 PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */
96 PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */
97 PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */
98 PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */
99 PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */
100 PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */
101 PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */
102 PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */
103
104 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
105 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
106 PINMUX_FUNCTION_END,
107
108 PINMUX_MARK_BEGIN,
109 /* Special Pull-up / Pull-down Functions */
110 PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK,
111 PORT68_KEYIN2_PU_MARK, PORT69_KEYIN3_PU_MARK,
112 PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK,
113 PORT72_KEYIN6_PU_MARK,
114
115 /* 55-1 */
116 VBUS_0_MARK,
117 CPORT0_MARK,
118 CPORT1_MARK,
119 CPORT2_MARK,
120 CPORT3_MARK,
121 CPORT4_MARK,
122 CPORT5_MARK,
123 CPORT6_MARK,
124 CPORT7_MARK,
125 CPORT8_MARK,
126 CPORT9_MARK,
127 CPORT10_MARK,
128 CPORT11_MARK, SIN2_MARK,
129 CPORT12_MARK, XCTS2_MARK,
130 CPORT13_MARK, RFSPO4_MARK,
131 CPORT14_MARK, RFSPO5_MARK,
132 CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK,
133 CPORT16_MARK, SCIFA0_TXD_MARK, GPS_AGC3_MARK,
134 CPORT17_IC_OE_MARK, SOUT2_MARK,
135 CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK,
136 CPORT19_MPORT1_MARK,
137 CPORT20_MARK, RFSPO6_MARK,
138 CPORT21_MARK, STATUS0_MARK,
139 CPORT22_MARK, STATUS1_MARK,
140 CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
141 B_SYNLD1_MARK,
142 B_SYNLD2_MARK, SYSENMSK_MARK,
143 XMAINPS_MARK,
144 XDIVPS_MARK,
145 XIDRST_MARK,
146 IDCLK_MARK, IC_DP_MARK,
147 IDIO_MARK, IC_DM_MARK,
148 SOUT1_MARK, SCIFA4_TXD_MARK, M02_BERDAT_MARK,
149 SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
150 XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
151 XCTS1_MARK, SCIFA4_CTS_MARK,
152 PCMCLKO_MARK,
153 SYNC8KO_MARK,
154
155 /* 55-2 */
156 DNPCM_A_MARK,
157 UPPCM_A_MARK,
158 VACK_MARK,
159 XTALB1L_MARK,
160 GPS_AGC1_MARK, SCIFA0_RTS_MARK,
161 GPS_AGC4_MARK, SCIFA0_RXD_MARK,
162 GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK,
163 GPS_IM_MARK,
164 GPS_IS_MARK,
165 GPS_QM_MARK,
166 GPS_QS_MARK,
167 FMSOCK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK,
168 FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, IPORT3_MARK,
169 FMSIOLR_MARK,
170 FMSOOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, OPORT1_MARK,
171 FMSIOBT_MARK,
172 FMSOSLD_MARK, BBIF2_TXD2_MARK, OPORT2_MARK,
173 FMSOILR_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, OPORT3_MARK,
174 FMSIILR_MARK,
175 FMSOIBT_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK,
176 FMSISLD_MARK, MFG0_OUT1_MARK, TPU0TO0_MARK,
177 A0_EA0_MARK, BS_MARK,
178 A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK,
179 A13_EA13_MARK, PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK,
180 A14_EA14_MARK, PORT60_KEYOUT5_MARK,
181 A15_EA15_MARK, PORT61_KEYOUT4_MARK,
182 A16_EA16_MARK, PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK,
183 A17_EA17_MARK, PORT63_KEYOUT2_MARK, MSIOF0_TSYNC_MARK,
184 A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK,
185 A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK,
186 A20_EA20_MARK, PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK,
187 A21_EA21_MARK, PORT67_KEYIN1_MARK, MSIOF0_RSYNC_MARK,
188 A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK,
189 A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK,
190 A24_EA24_MARK, PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK,
191 A25_EA25_MARK, PORT71_KEYIN5_MARK, MSIOF0_SS2_MARK,
192 A26_MARK, PORT72_KEYIN6_MARK,
193 D0_ED0_NAF0_MARK,
194 D1_ED1_NAF1_MARK,
195 D2_ED2_NAF2_MARK,
196 D3_ED3_NAF3_MARK,
197 D4_ED4_NAF4_MARK,
198 D5_ED5_NAF5_MARK,
199 D6_ED6_NAF6_MARK,
200 D7_ED7_NAF7_MARK,
201 D8_ED8_NAF8_MARK,
202 D9_ED9_NAF9_MARK,
203 D10_ED10_NAF10_MARK,
204 D11_ED11_NAF11_MARK,
205 D12_ED12_NAF12_MARK,
206 D13_ED13_NAF13_MARK,
207 D14_ED14_NAF14_MARK,
208 D15_ED15_NAF15_MARK,
209 CS4_MARK,
210 CS5A_MARK, FMSICK_MARK,
211 CS5B_MARK, FCE1_MARK,
212
213 /* 55-3 */
214 CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK,
215 FCE0_MARK,
216 WAIT_MARK, DREQ0_MARK,
217 RD_XRD_MARK,
218 WE0_XWR0_FWE_MARK,
219 WE1_XWR1_MARK,
220 FRB_MARK,
221 CKO_MARK,
222 NBRSTOUT_MARK,
223 NBRST_MARK,
224 GPS_EPPSIN_MARK,
225 LATCHPULSE_MARK,
226 LTESIGNAL_MARK,
227 LEGACYSTATE_MARK,
228 TCKON_MARK,
229 VIO_VD_MARK, PORT128_KEYOUT0_MARK, IPORT0_MARK,
230 VIO_HD_MARK, PORT129_KEYOUT1_MARK, IPORT1_MARK,
231 VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK,
232 VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK,
233 VIO_D2_MARK, PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK,
234 VIO_D3_MARK, PORT133_KEYOUT5_MARK, PORT133_MSIOF2_TSYNC_MARK,
235 VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK,
236 VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK,
237 VIO_D6_MARK, PORT136_KEYIN2_MARK,
238 VIO_D7_MARK, PORT137_KEYIN3_MARK,
239 VIO_D8_MARK, M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK,
240 VIO_D9_MARK, M10_SLCD_CK1_MARK, PORT139_FSIAOLR_MARK,
241 VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK, PORT140_FSIAOBT_MARK,
242 VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK, PORT141_FSIAOSLD_MARK,
243 VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK,
244 VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK,
245 VIO_D14_MARK, M15_RSW_MARK, PORT144_FSIAIBT_MARK,
246 VIO_D15_MARK, TPU1TO3_MARK, PORT145_FSIAISLD_MARK,
247 VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK,
248 VIO_FIELD_MARK, PORT147_KEYIN5_MARK,
249 VIO_CKO_MARK, PORT148_KEYIN6_MARK,
250 A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK,
251 MFG0_IN2_MARK,
252 TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,
253 TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,
254 TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,
255 SOUT3_MARK, SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,
256 SIN3_MARK, SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,
257 XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK,
258 XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK,
259
260 /* 55-4 */
261 DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
262 PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,
263 PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK,
264 PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK,
265 MFG3_IN2_MARK,
266 PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK,
267 MFG3_IN1_MARK,
268 PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK,
269 MFG3_OUT1_MARK, TPU3TO0_MARK,
270 LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK,
271 LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK,
272 BBIF2_TSYNC1_MARK,
273 LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK,
274 BBIF2_TSCK1_MARK,
275 LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK,
276 BBIF2_TXD1_MARK,
277 LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK,
278 LCDD5_MARK, PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK,
279 MFG2_OUT2_MARK,
280 TPU2TO1_MARK,
281 LCDD6_MARK, XWR2_MARK,
282 LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, XWR3_MARK,
283 LCDD8_MARK, PORT200_KEYIN0_MARK, VIO_DR0_MARK, D16_MARK, ED16_MARK,
284 LCDD9_MARK, PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK,
285 LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK, ED18_MARK,
286 LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK, D19_MARK, ED19_MARK,
287 LCDD12_MARK, PORT204_KEYIN4_MARK, VIO_DR4_MARK, D20_MARK, ED20_MARK,
288 LCDD13_MARK, PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK,
289 LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK, ED22_MARK,
290 LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK,
291 VIO_DR7_MARK, D23_MARK, ED23_MARK,
292 LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK,
293 VIO_VDR_MARK, D24_MARK, ED24_MARK,
294 LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK, D25_MARK, ED25_MARK,
295 LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK,
296 LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK,
297 LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK,
298 LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, ED29_MARK,
299 LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, ED30_MARK,
300 LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK,
301 LCDDCK_MARK, LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK,
302 LCDRD_MARK, DACK2_MARK, MSIOF0L_TSYNC_MARK,
303 LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
304 PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK,
305 LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK,
306 LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK,
307 LCDLCLK_MARK, DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK,
308 LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK,
309 SCIFA1_TXD_MARK, OVCN2_MARK,
310 EXTLP_MARK, SCIFA1_SCK_MARK, USBTERM_MARK, PORT226_VIO_CKO2_MARK,
311 SCIFA1_RTS_MARK, IDIN_MARK,
312 SCIFA1_RXD_MARK,
313 SCIFA1_CTS_MARK, MFG1_IN1_MARK,
314 MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK,
315 MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK, PORT231_FSIAOLR_MARK,
316 MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK,
317 MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK,
318 PORT233_FSIACK_MARK,
319 MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK,
320 MSIOF1_RSYNC_MARK, OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK,
321 MSIOF1_MCK0_MARK, I2C_SDA2_MARK, PORT236_FSIAIBT_MARK,
322 MSIOF1_MCK1_MARK, I2C_SCL2_MARK, PORT237_FSIAISLD_MARK,
323 MSIOF1_SS1_MARK, EDBGREQ3_MARK,
324
325 /* 55-5 */
326 MSIOF1_SS2_MARK,
327 SCIFA6_TXD_MARK,
328 PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK,
329 TPU4TO0_MARK,
330 PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,
331 PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,
332 PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK,
333 PORT244_MSIOF2_RXD_MARK,
334 PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK,
335 PORT245_MSIOF2_TXD_MARK,
336 PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK,
337 TPU1TO0_MARK,
338 PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK,
339 TPU3TO1_MARK,
340 PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK,
341 TPU2TO0_MARK,
342 PORT248_MSIOF2_TSCK_MARK,
343 PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_MSIOF2_TSYNC_MARK,
344 SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK,
345 SDHICD0_MARK,
346 SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK,
347 SDHID0_1_MARK, TDO2_SWO0_MC0_MARK,
348 SDHID0_2_MARK, TDI2_MARK,
349 SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK,
350 SDHICMD0_MARK, TRST2_MARK,
351 SDHIWP0_MARK, EDBGREQ2_MARK,
352 SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK,
353 SDHID1_0_MARK, M11_SLCD_SO2_MARK, TS_SPSYNC2_MARK,
354 TMS3_SWDIO_MC1_MARK,
355 SDHID1_1_MARK, M9_SLCD_A02_MARK, TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK,
356 SDHID1_2_MARK, M10_SLCD_CK2_MARK, TS_SDEN2_MARK, TDI3_MARK,
357 SDHID1_3_MARK, M12_SLCD_CE2_MARK, TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK,
358 SDHICMD1_MARK, TRST3_MARK,
359 RESETOUTS_MARK,
360 PINMUX_MARK_END,
361};
362
363#define PORT_DATA_I(nr) \
364 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
365
366#define PORT_DATA_I_PD(nr) \
367 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
368 PORT##nr##_IN, PORT##nr##_IN_PD)
369
370#define PORT_DATA_I_PU(nr) \
371 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
372 PORT##nr##_IN, PORT##nr##_IN_PU)
373
374#define PORT_DATA_I_PU_PD(nr) \
375 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
376 PORT##nr##_IN, PORT##nr##_IN_PD, \
377 PORT##nr##_IN_PU)
378
379#define PORT_DATA_O(nr) \
380 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
381 PORT##nr##_OUT)
382
383#define PORT_DATA_IO(nr) \
384 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
385 PORT##nr##_OUT, PORT##nr##_IN)
386
387#define PORT_DATA_IO_PD(nr) \
388 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
389 PORT##nr##_OUT, PORT##nr##_IN, \
390 PORT##nr##_IN_PD)
391
392#define PORT_DATA_IO_PU(nr) \
393 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
394 PORT##nr##_OUT, PORT##nr##_IN, \
395 PORT##nr##_IN_PU)
396
397#define PORT_DATA_IO_PU_PD(nr) \
398 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
399 PORT##nr##_OUT, PORT##nr##_IN, \
400 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
401
402static pinmux_enum_t pinmux_data[] = {
403 /* specify valid pin states for each pin in GPIO mode */
404 /* 55-1 (GPIO) */
405 PORT_DATA_I_PD(0), PORT_DATA_I_PU(1),
406 PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
407 PORT_DATA_I_PU(4), PORT_DATA_I_PU(5),
408 PORT_DATA_I_PU(6), PORT_DATA_I_PU(7),
409 PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
410 PORT_DATA_I_PU(10), PORT_DATA_I_PU(11),
411 PORT_DATA_IO_PU(12), PORT_DATA_IO_PU(13),
412 PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
413 PORT_DATA_O(16), PORT_DATA_IO(17),
414 PORT_DATA_O(18), PORT_DATA_O(19),
415 PORT_DATA_O(20), PORT_DATA_O(21),
416 PORT_DATA_O(22), PORT_DATA_O(23),
417 PORT_DATA_O(24), PORT_DATA_I_PD(25),
418 PORT_DATA_I_PD(26), PORT_DATA_O(27),
419 PORT_DATA_O(28), PORT_DATA_O(29),
420 PORT_DATA_IO(30), PORT_DATA_IO_PU(31),
421 PORT_DATA_IO_PD(32), PORT_DATA_I_PU(33),
422 PORT_DATA_IO_PD(34), PORT_DATA_I_PU_PD(35),
423 PORT_DATA_O(36), PORT_DATA_IO(37),
424
425 /* 55-2 (GPIO) */
426 PORT_DATA_O(38), PORT_DATA_I_PU(39),
427 PORT_DATA_I_PU_PD(40), PORT_DATA_O(41),
428 PORT_DATA_IO_PD(42), PORT_DATA_IO_PD(43),
429 PORT_DATA_IO_PD(44), PORT_DATA_I_PD(45),
430 PORT_DATA_I_PD(46), PORT_DATA_I_PD(47),
431 PORT_DATA_I_PD(48), PORT_DATA_IO_PU_PD(49),
432 PORT_DATA_IO_PD(50), PORT_DATA_IO_PD(51),
433 PORT_DATA_O(52), PORT_DATA_IO_PU_PD(53),
434 PORT_DATA_IO_PU_PD(54), PORT_DATA_IO_PD(55),
435 PORT_DATA_I_PU_PD(56), PORT_DATA_IO(57),
436 PORT_DATA_IO(58), PORT_DATA_IO(59),
437 PORT_DATA_IO(60), PORT_DATA_IO(61),
438 PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63),
439 PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65),
440 PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67),
441 PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69),
442 PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71),
443 PORT_DATA_IO_PU_PD(72), PORT_DATA_I_PU_PD(73),
444 PORT_DATA_IO_PU(74), PORT_DATA_IO_PU(75),
445 PORT_DATA_IO_PU(76), PORT_DATA_IO_PU(77),
446 PORT_DATA_IO_PU(78), PORT_DATA_IO_PU(79),
447 PORT_DATA_IO_PU(80), PORT_DATA_IO_PU(81),
448 PORT_DATA_IO_PU(82), PORT_DATA_IO_PU(83),
449 PORT_DATA_IO_PU(84), PORT_DATA_IO_PU(85),
450 PORT_DATA_IO_PU(86), PORT_DATA_IO_PU(87),
451 PORT_DATA_IO_PU(88), PORT_DATA_IO_PU(89),
452 PORT_DATA_O(90), PORT_DATA_IO_PU(91),
453 PORT_DATA_O(92),
454
455 /* 55-3 (GPIO) */
456 PORT_DATA_IO_PU(93),
457 PORT_DATA_O(94),
458 PORT_DATA_I_PU_PD(95),
459 PORT_DATA_IO(96), PORT_DATA_IO(97),
460 PORT_DATA_IO(98), PORT_DATA_I_PU(99),
461 PORT_DATA_O(100), PORT_DATA_O(101),
462 PORT_DATA_I_PU(102), PORT_DATA_IO_PD(103),
463 PORT_DATA_I_PD(104), PORT_DATA_I_PD(105),
464 PORT_DATA_I_PD(106), PORT_DATA_I_PD(107),
465 PORT_DATA_I_PD(108), PORT_DATA_IO_PD(109),
466 PORT_DATA_IO_PD(110), PORT_DATA_I_PD(111),
467 PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
468 PORT_DATA_IO_PD(114), PORT_DATA_I_PD(115),
469 PORT_DATA_I_PD(116), PORT_DATA_IO_PD(117),
470 PORT_DATA_I_PD(118), PORT_DATA_IO_PD(128),
471 PORT_DATA_IO_PD(129), PORT_DATA_IO_PD(130),
472 PORT_DATA_IO_PD(131), PORT_DATA_IO_PD(132),
473 PORT_DATA_IO_PD(133), PORT_DATA_IO_PU_PD(134),
474 PORT_DATA_IO_PU_PD(135), PORT_DATA_IO_PU_PD(136),
475 PORT_DATA_IO_PU_PD(137), PORT_DATA_IO_PD(138),
476 PORT_DATA_IO_PD(139), PORT_DATA_IO_PD(140),
477 PORT_DATA_IO_PD(141), PORT_DATA_IO_PD(142),
478 PORT_DATA_IO_PD(143), PORT_DATA_IO_PU_PD(144),
479 PORT_DATA_IO_PD(145), PORT_DATA_IO_PU_PD(146),
480 PORT_DATA_IO_PU_PD(147), PORT_DATA_IO_PU_PD(148),
481 PORT_DATA_IO_PU_PD(149), PORT_DATA_I_PD(150),
482 PORT_DATA_IO_PU_PD(151), PORT_DATA_IO_PD(152),
483 PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154),
484 PORT_DATA_I_PD(155), PORT_DATA_IO_PU_PD(156),
485 PORT_DATA_I_PD(157), PORT_DATA_IO_PD(158),
486
487 /* 55-4 (GPIO) */
488 PORT_DATA_IO_PU_PD(159), PORT_DATA_IO_PU_PD(160),
489 PORT_DATA_I_PU_PD(161), PORT_DATA_I_PU_PD(162),
490 PORT_DATA_IO_PU_PD(163), PORT_DATA_I_PU_PD(164),
491 PORT_DATA_IO_PD(192), PORT_DATA_IO_PD(193),
492 PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
493 PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197),
494 PORT_DATA_IO_PD(198), PORT_DATA_IO_PD(199),
495 PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201),
496 PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203),
497 PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205),
498 PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PD(207),
499 PORT_DATA_IO_PD(208), PORT_DATA_IO_PD(209),
500 PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
501 PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213),
502 PORT_DATA_IO_PD(214), PORT_DATA_IO_PD(215),
503 PORT_DATA_IO_PD(216), PORT_DATA_IO_PD(217),
504 PORT_DATA_O(218), PORT_DATA_IO_PD(219),
505 PORT_DATA_IO_PD(220), PORT_DATA_IO_PD(221),
506 PORT_DATA_IO_PU_PD(222),
507 PORT_DATA_I_PU_PD(223), PORT_DATA_I_PU_PD(224),
508 PORT_DATA_IO_PU_PD(225), PORT_DATA_O(226),
509 PORT_DATA_IO_PU_PD(227), PORT_DATA_I_PD(228),
510 PORT_DATA_I_PD(229), PORT_DATA_IO(230),
511 PORT_DATA_IO_PD(231), PORT_DATA_IO_PU_PD(232),
512 PORT_DATA_I_PD(233), PORT_DATA_IO_PU_PD(234),
513 PORT_DATA_IO_PU_PD(235), PORT_DATA_IO_PU_PD(236),
514 PORT_DATA_IO_PD(237), PORT_DATA_IO_PU_PD(238),
515
516 /* 55-5 (GPIO) */
517 PORT_DATA_IO_PU_PD(239), PORT_DATA_IO_PU_PD(240),
518 PORT_DATA_O(241), PORT_DATA_I_PD(242),
519 PORT_DATA_IO_PU_PD(243), PORT_DATA_IO_PU_PD(244),
520 PORT_DATA_IO_PU_PD(245), PORT_DATA_IO_PU_PD(246),
521 PORT_DATA_IO_PU_PD(247), PORT_DATA_IO_PU_PD(248),
522 PORT_DATA_IO_PU_PD(249), PORT_DATA_IO_PD(250),
523 PORT_DATA_IO_PU_PD(251), PORT_DATA_IO_PU_PD(252),
524 PORT_DATA_IO_PU_PD(253), PORT_DATA_IO_PU_PD(254),
525 PORT_DATA_IO_PU_PD(255), PORT_DATA_IO_PU_PD(256),
526 PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PD(258),
527 PORT_DATA_IO_PU_PD(259), PORT_DATA_IO_PU_PD(260),
528 PORT_DATA_IO_PU_PD(261), PORT_DATA_IO_PU_PD(262),
529 PORT_DATA_IO_PU_PD(263),
530
531 /* Special Pull-up / Pull-down Functions */
532 PINMUX_DATA(PORT66_KEYIN0_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
533 PORT66_FN2, PORT66_IN_PU),
534 PINMUX_DATA(PORT67_KEYIN1_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
535 PORT67_FN2, PORT67_IN_PU),
536 PINMUX_DATA(PORT68_KEYIN2_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
537 PORT68_FN2, PORT68_IN_PU),
538 PINMUX_DATA(PORT69_KEYIN3_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
539 PORT69_FN2, PORT69_IN_PU),
540 PINMUX_DATA(PORT70_KEYIN4_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
541 PORT70_FN2, PORT70_IN_PU),
542 PINMUX_DATA(PORT71_KEYIN5_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
543 PORT71_FN2, PORT71_IN_PU),
544 PINMUX_DATA(PORT72_KEYIN6_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
545 PORT72_FN2, PORT72_IN_PU),
546
547
548 /* 55-1 (FN) */
549 PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
550 PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
551 PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
552 PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
553 PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
554 PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
555 PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
556 PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
557 PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
558 PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
559 PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
560 PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
561 PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
562 PINMUX_DATA(SIN2_MARK, PORT12_FN2),
563 PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
564 PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
565 PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
566 PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
567 PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
568 PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
569 PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
570 PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2),
571 PINMUX_DATA(GPS_AGC2_MARK, PORT16_FN3),
572 PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
573 PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2),
574 PINMUX_DATA(GPS_AGC3_MARK, PORT17_FN3),
575 PINMUX_DATA(CPORT17_IC_OE_MARK, PORT18_FN1),
576 PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
577 PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
578 PINMUX_DATA(XRTS2_MARK, PORT19_FN2),
579 PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3),
580 PINMUX_DATA(CPORT19_MPORT1_MARK, PORT20_FN1),
581 PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
582 PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
583 PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
584 PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
585 PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
586 PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
587 PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
588 PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
589 PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
590 PINMUX_DATA(B_SYNLD1_MARK, PORT25_FN1),
591 PINMUX_DATA(B_SYNLD2_MARK, PORT26_FN1),
592 PINMUX_DATA(SYSENMSK_MARK, PORT26_FN2),
593 PINMUX_DATA(XMAINPS_MARK, PORT27_FN1),
594 PINMUX_DATA(XDIVPS_MARK, PORT28_FN1),
595 PINMUX_DATA(XIDRST_MARK, PORT29_FN1),
596 PINMUX_DATA(IDCLK_MARK, PORT30_FN1),
597 PINMUX_DATA(IC_DP_MARK, PORT30_FN2),
598 PINMUX_DATA(IDIO_MARK, PORT31_FN1),
599 PINMUX_DATA(IC_DM_MARK, PORT31_FN2),
600 PINMUX_DATA(SOUT1_MARK, PORT32_FN1),
601 PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2),
602 PINMUX_DATA(M02_BERDAT_MARK, PORT32_FN3),
603 PINMUX_DATA(SIN1_MARK, PORT33_FN1),
604 PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2),
605 PINMUX_DATA(XWUP_MARK, PORT33_FN3),
606 PINMUX_DATA(XRTS1_MARK, PORT34_FN1),
607 PINMUX_DATA(SCIFA4_RTS_MARK, PORT34_FN2),
608 PINMUX_DATA(M03_BERCLK_MARK, PORT34_FN3),
609 PINMUX_DATA(XCTS1_MARK, PORT35_FN1),
610 PINMUX_DATA(SCIFA4_CTS_MARK, PORT35_FN2),
611 PINMUX_DATA(PCMCLKO_MARK, PORT36_FN1),
612 PINMUX_DATA(SYNC8KO_MARK, PORT37_FN1),
613
614 /* 55-2 (FN) */
615 PINMUX_DATA(DNPCM_A_MARK, PORT38_FN1),
616 PINMUX_DATA(UPPCM_A_MARK, PORT39_FN1),
617 PINMUX_DATA(VACK_MARK, PORT40_FN1),
618 PINMUX_DATA(XTALB1L_MARK, PORT41_FN1),
619 PINMUX_DATA(GPS_AGC1_MARK, PORT42_FN1),
620 PINMUX_DATA(SCIFA0_RTS_MARK, PORT42_FN2),
621 PINMUX_DATA(GPS_AGC4_MARK, PORT43_FN1),
622 PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2),
623 PINMUX_DATA(GPS_PWRDOWN_MARK, PORT44_FN1),
624 PINMUX_DATA(SCIFA0_CTS_MARK, PORT44_FN2),
625 PINMUX_DATA(GPS_IM_MARK, PORT45_FN1),
626 PINMUX_DATA(GPS_IS_MARK, PORT46_FN1),
627 PINMUX_DATA(GPS_QM_MARK, PORT47_FN1),
628 PINMUX_DATA(GPS_QS_MARK, PORT48_FN1),
629 PINMUX_DATA(FMSOCK_MARK, PORT49_FN1),
630 PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2),
631 PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN3),
632 PINMUX_DATA(FMSOOLR_MARK, PORT50_FN1),
633 PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2),
634 PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3),
635 PINMUX_DATA(IPORT3_MARK, PORT50_FN4),
636 PINMUX_DATA(FMSIOLR_MARK, PORT50_FN5),
637 PINMUX_DATA(FMSOOBT_MARK, PORT51_FN1),
638 PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2),
639 PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3),
640 PINMUX_DATA(OPORT1_MARK, PORT51_FN4),
641 PINMUX_DATA(FMSIOBT_MARK, PORT51_FN5),
642 PINMUX_DATA(FMSOSLD_MARK, PORT52_FN1),
643 PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2),
644 PINMUX_DATA(OPORT2_MARK, PORT52_FN3),
645 PINMUX_DATA(FMSOILR_MARK, PORT53_FN1),
646 PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2),
647 PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3),
648 PINMUX_DATA(OPORT3_MARK, PORT53_FN4),
649 PINMUX_DATA(FMSIILR_MARK, PORT53_FN5),
650 PINMUX_DATA(FMSOIBT_MARK, PORT54_FN1),
651 PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2),
652 PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3),
653 PINMUX_DATA(FMSIIBT_MARK, PORT54_FN4),
654 PINMUX_DATA(FMSISLD_MARK, PORT55_FN1),
655 PINMUX_DATA(MFG0_OUT1_MARK, PORT55_FN2),
656 PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3),
657 PINMUX_DATA(A0_EA0_MARK, PORT57_FN1),
658 PINMUX_DATA(BS_MARK, PORT57_FN2),
659 PINMUX_DATA(A12_EA12_MARK, PORT58_FN1),
660 PINMUX_DATA(PORT58_VIO_CKOR_MARK, PORT58_FN2),
661 PINMUX_DATA(TPU4TO2_MARK, PORT58_FN3),
662 PINMUX_DATA(A13_EA13_MARK, PORT59_FN1),
663 PINMUX_DATA(PORT59_IROUT_MARK, PORT59_FN2),
664 PINMUX_DATA(MFG0_OUT2_MARK, PORT59_FN3),
665 PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4),
666 PINMUX_DATA(A14_EA14_MARK, PORT60_FN1),
667 PINMUX_DATA(PORT60_KEYOUT5_MARK, PORT60_FN2),
668 PINMUX_DATA(A15_EA15_MARK, PORT61_FN1),
669 PINMUX_DATA(PORT61_KEYOUT4_MARK, PORT61_FN2),
670 PINMUX_DATA(A16_EA16_MARK, PORT62_FN1),
671 PINMUX_DATA(PORT62_KEYOUT3_MARK, PORT62_FN2),
672 PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN3),
673 PINMUX_DATA(A17_EA17_MARK, PORT63_FN1),
674 PINMUX_DATA(PORT63_KEYOUT2_MARK, PORT63_FN2),
675 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN3),
676 PINMUX_DATA(A18_EA18_MARK, PORT64_FN1),
677 PINMUX_DATA(PORT64_KEYOUT1_MARK, PORT64_FN2),
678 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN3),
679 PINMUX_DATA(A19_EA19_MARK, PORT65_FN1),
680 PINMUX_DATA(PORT65_KEYOUT0_MARK, PORT65_FN2),
681 PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN3),
682 PINMUX_DATA(A20_EA20_MARK, PORT66_FN1),
683 PINMUX_DATA(PORT66_KEYIN0_MARK, PORT66_FN2),
684 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN3),
685 PINMUX_DATA(A21_EA21_MARK, PORT67_FN1),
686 PINMUX_DATA(PORT67_KEYIN1_MARK, PORT67_FN2),
687 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN3),
688 PINMUX_DATA(A22_EA22_MARK, PORT68_FN1),
689 PINMUX_DATA(PORT68_KEYIN2_MARK, PORT68_FN2),
690 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN3),
691 PINMUX_DATA(A23_EA23_MARK, PORT69_FN1),
692 PINMUX_DATA(PORT69_KEYIN3_MARK, PORT69_FN2),
693 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN3),
694 PINMUX_DATA(A24_EA24_MARK, PORT70_FN1),
695 PINMUX_DATA(PORT70_KEYIN4_MARK, PORT70_FN2),
696 PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN3),
697 PINMUX_DATA(A25_EA25_MARK, PORT71_FN1),
698 PINMUX_DATA(PORT71_KEYIN5_MARK, PORT71_FN2),
699 PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN3),
700 PINMUX_DATA(A26_MARK, PORT72_FN1),
701 PINMUX_DATA(PORT72_KEYIN6_MARK, PORT72_FN2),
702 PINMUX_DATA(D0_ED0_NAF0_MARK, PORT74_FN1),
703 PINMUX_DATA(D1_ED1_NAF1_MARK, PORT75_FN1),
704 PINMUX_DATA(D2_ED2_NAF2_MARK, PORT76_FN1),
705 PINMUX_DATA(D3_ED3_NAF3_MARK, PORT77_FN1),
706 PINMUX_DATA(D4_ED4_NAF4_MARK, PORT78_FN1),
707 PINMUX_DATA(D5_ED5_NAF5_MARK, PORT79_FN1),
708 PINMUX_DATA(D6_ED6_NAF6_MARK, PORT80_FN1),
709 PINMUX_DATA(D7_ED7_NAF7_MARK, PORT81_FN1),
710 PINMUX_DATA(D8_ED8_NAF8_MARK, PORT82_FN1),
711 PINMUX_DATA(D9_ED9_NAF9_MARK, PORT83_FN1),
712 PINMUX_DATA(D10_ED10_NAF10_MARK, PORT84_FN1),
713 PINMUX_DATA(D11_ED11_NAF11_MARK, PORT85_FN1),
714 PINMUX_DATA(D12_ED12_NAF12_MARK, PORT86_FN1),
715 PINMUX_DATA(D13_ED13_NAF13_MARK, PORT87_FN1),
716 PINMUX_DATA(D14_ED14_NAF14_MARK, PORT88_FN1),
717 PINMUX_DATA(D15_ED15_NAF15_MARK, PORT89_FN1),
718 PINMUX_DATA(CS4_MARK, PORT90_FN1),
719 PINMUX_DATA(CS5A_MARK, PORT91_FN1),
720 PINMUX_DATA(FMSICK_MARK, PORT91_FN2),
721 PINMUX_DATA(CS5B_MARK, PORT92_FN1),
722 PINMUX_DATA(FCE1_MARK, PORT92_FN2),
723
724 /* 55-3 (FN) */
725 PINMUX_DATA(CS6B_MARK, PORT93_FN1),
726 PINMUX_DATA(XCS2_MARK, PORT93_FN2),
727 PINMUX_DATA(CS6A_MARK, PORT93_FN3),
728 PINMUX_DATA(DACK0_MARK, PORT93_FN4),
729 PINMUX_DATA(FCE0_MARK, PORT94_FN1),
730 PINMUX_DATA(WAIT_MARK, PORT95_FN1),
731 PINMUX_DATA(DREQ0_MARK, PORT95_FN2),
732 PINMUX_DATA(RD_XRD_MARK, PORT96_FN1),
733 PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT97_FN1),
734 PINMUX_DATA(WE1_XWR1_MARK, PORT98_FN1),
735 PINMUX_DATA(FRB_MARK, PORT99_FN1),
736 PINMUX_DATA(CKO_MARK, PORT100_FN1),
737 PINMUX_DATA(NBRSTOUT_MARK, PORT101_FN1),
738 PINMUX_DATA(NBRST_MARK, PORT102_FN1),
739 PINMUX_DATA(GPS_EPPSIN_MARK, PORT106_FN1),
740 PINMUX_DATA(LATCHPULSE_MARK, PORT110_FN1),
741 PINMUX_DATA(LTESIGNAL_MARK, PORT111_FN1),
742 PINMUX_DATA(LEGACYSTATE_MARK, PORT112_FN1),
743 PINMUX_DATA(TCKON_MARK, PORT118_FN1),
744 PINMUX_DATA(VIO_VD_MARK, PORT128_FN1),
745 PINMUX_DATA(PORT128_KEYOUT0_MARK, PORT128_FN2),
746 PINMUX_DATA(IPORT0_MARK, PORT128_FN3),
747 PINMUX_DATA(VIO_HD_MARK, PORT129_FN1),
748 PINMUX_DATA(PORT129_KEYOUT1_MARK, PORT129_FN2),
749 PINMUX_DATA(IPORT1_MARK, PORT129_FN3),
750 PINMUX_DATA(VIO_D0_MARK, PORT130_FN1),
751 PINMUX_DATA(PORT130_KEYOUT2_MARK, PORT130_FN2),
752 PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3),
753 PINMUX_DATA(VIO_D1_MARK, PORT131_FN1),
754 PINMUX_DATA(PORT131_KEYOUT3_MARK, PORT131_FN2),
755 PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3),
756 PINMUX_DATA(VIO_D2_MARK, PORT132_FN1),
757 PINMUX_DATA(PORT132_KEYOUT4_MARK, PORT132_FN2),
758 PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3),
759 PINMUX_DATA(VIO_D3_MARK, PORT133_FN1),
760 PINMUX_DATA(PORT133_KEYOUT5_MARK, PORT133_FN2),
761 PINMUX_DATA(PORT133_MSIOF2_TSYNC_MARK, PORT133_FN3),
762 PINMUX_DATA(VIO_D4_MARK, PORT134_FN1),
763 PINMUX_DATA(PORT134_KEYIN0_MARK, PORT134_FN2),
764 PINMUX_DATA(PORT134_MSIOF2_TXD_MARK, PORT134_FN3),
765 PINMUX_DATA(VIO_D5_MARK, PORT135_FN1),
766 PINMUX_DATA(PORT135_KEYIN1_MARK, PORT135_FN2),
767 PINMUX_DATA(PORT135_MSIOF2_TSCK_MARK, PORT135_FN3),
768 PINMUX_DATA(VIO_D6_MARK, PORT136_FN1),
769 PINMUX_DATA(PORT136_KEYIN2_MARK, PORT136_FN2),
770 PINMUX_DATA(VIO_D7_MARK, PORT137_FN1),
771 PINMUX_DATA(PORT137_KEYIN3_MARK, PORT137_FN2),
772 PINMUX_DATA(VIO_D8_MARK, PORT138_FN1),
773 PINMUX_DATA(M9_SLCD_A01_MARK, PORT138_FN2),
774 PINMUX_DATA(PORT138_FSIAOMC_MARK, PORT138_FN3),
775 PINMUX_DATA(VIO_D9_MARK, PORT139_FN1),
776 PINMUX_DATA(M10_SLCD_CK1_MARK, PORT139_FN2),
777 PINMUX_DATA(PORT139_FSIAOLR_MARK, PORT139_FN3),
778 PINMUX_DATA(VIO_D10_MARK, PORT140_FN1),
779 PINMUX_DATA(M11_SLCD_SO1_MARK, PORT140_FN2),
780 PINMUX_DATA(TPU0TO2_MARK, PORT140_FN3),
781 PINMUX_DATA(PORT140_FSIAOBT_MARK, PORT140_FN4),
782 PINMUX_DATA(VIO_D11_MARK, PORT141_FN1),
783 PINMUX_DATA(M12_SLCD_CE1_MARK, PORT141_FN2),
784 PINMUX_DATA(TPU0TO3_MARK, PORT141_FN3),
785 PINMUX_DATA(PORT141_FSIAOSLD_MARK, PORT141_FN4),
786 PINMUX_DATA(VIO_D12_MARK, PORT142_FN1),
787 PINMUX_DATA(M13_BSW_MARK, PORT142_FN2),
788 PINMUX_DATA(PORT142_FSIACK_MARK, PORT142_FN3),
789 PINMUX_DATA(VIO_D13_MARK, PORT143_FN1),
790 PINMUX_DATA(M14_GSW_MARK, PORT143_FN2),
791 PINMUX_DATA(PORT143_FSIAILR_MARK, PORT143_FN3),
792 PINMUX_DATA(VIO_D14_MARK, PORT144_FN1),
793 PINMUX_DATA(M15_RSW_MARK, PORT144_FN2),
794 PINMUX_DATA(PORT144_FSIAIBT_MARK, PORT144_FN3),
795 PINMUX_DATA(VIO_D15_MARK, PORT145_FN1),
796 PINMUX_DATA(TPU1TO3_MARK, PORT145_FN2),
797 PINMUX_DATA(PORT145_FSIAISLD_MARK, PORT145_FN3),
798 PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1),
799 PINMUX_DATA(PORT146_KEYIN4_MARK, PORT146_FN2),
800 PINMUX_DATA(IPORT2_MARK, PORT146_FN3),
801 PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1),
802 PINMUX_DATA(PORT147_KEYIN5_MARK, PORT147_FN2),
803 PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1),
804 PINMUX_DATA(PORT148_KEYIN6_MARK, PORT148_FN2),
805 PINMUX_DATA(A27_MARK, PORT149_FN1),
806 PINMUX_DATA(RDWR_XWE_MARK, PORT149_FN2),
807 PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3),
808 PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN1),
809 PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN1),
810 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN2),
811 PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN1),
812 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN2),
813 PINMUX_DATA(TPU1TO2_MARK, PORT153_FN1),
814 PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN2),
815 PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN3),
816 PINMUX_DATA(SOUT3_MARK, PORT154_FN1),
817 PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2),
818 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN3),
819 PINMUX_DATA(SIN3_MARK, PORT155_FN1),
820 PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2),
821 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN3),
822 PINMUX_DATA(XRTS3_MARK, PORT156_FN1),
823 PINMUX_DATA(SCIFA2_RTS1_MARK, PORT156_FN2),
824 PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN3),
825 PINMUX_DATA(XCTS3_MARK, PORT157_FN1),
826 PINMUX_DATA(SCIFA2_CTS1_MARK, PORT157_FN2),
827 PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN3),
828
829 /* 55-4 (FN) */
830 PINMUX_DATA(DINT_MARK, PORT158_FN1),
831 PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2),
832 PINMUX_DATA(TS_SCK3_MARK, PORT158_FN3),
833 PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1),
834 PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2),
835 PINMUX_DATA(NMI_MARK, PORT159_FN3),
836 PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1),
837 PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2),
838 PINMUX_DATA(SOUT0_MARK, PORT160_FN3),
839 PINMUX_DATA(PORT161_SCIFB_CTS_MARK, PORT161_FN1),
840 PINMUX_DATA(PORT161_SCIFA5_CTS_MARK, PORT161_FN2),
841 PINMUX_DATA(XCTS0_MARK, PORT161_FN3),
842 PINMUX_DATA(MFG3_IN2_MARK, PORT161_FN4),
843 PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1),
844 PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2),
845 PINMUX_DATA(SIN0_MARK, PORT162_FN3),
846 PINMUX_DATA(MFG3_IN1_MARK, PORT162_FN4),
847 PINMUX_DATA(PORT163_SCIFB_RTS_MARK, PORT163_FN1),
848 PINMUX_DATA(PORT163_SCIFA5_RTS_MARK, PORT163_FN2),
849 PINMUX_DATA(XRTS0_MARK, PORT163_FN3),
850 PINMUX_DATA(MFG3_OUT1_MARK, PORT163_FN4),
851 PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5),
852 PINMUX_DATA(LCDD0_MARK, PORT192_FN1),
853 PINMUX_DATA(PORT192_KEYOUT0_MARK, PORT192_FN2),
854 PINMUX_DATA(EXT_CKI_MARK, PORT192_FN3),
855 PINMUX_DATA(LCDD1_MARK, PORT193_FN1),
856 PINMUX_DATA(PORT193_KEYOUT1_MARK, PORT193_FN2),
857 PINMUX_DATA(PORT193_SCIFA5_CTS_MARK, PORT193_FN3),
858 PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN4),
859 PINMUX_DATA(LCDD2_MARK, PORT194_FN1),
860 PINMUX_DATA(PORT194_KEYOUT2_MARK, PORT194_FN2),
861 PINMUX_DATA(PORT194_SCIFA5_RTS_MARK, PORT194_FN3),
862 PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN4),
863 PINMUX_DATA(LCDD3_MARK, PORT195_FN1),
864 PINMUX_DATA(PORT195_KEYOUT3_MARK, PORT195_FN2),
865 PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3),
866 PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN4),
867 PINMUX_DATA(LCDD4_MARK, PORT196_FN1),
868 PINMUX_DATA(PORT196_KEYOUT4_MARK, PORT196_FN2),
869 PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3),
870 PINMUX_DATA(LCDD5_MARK, PORT197_FN1),
871 PINMUX_DATA(PORT197_KEYOUT5_MARK, PORT197_FN2),
872 PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3),
873 PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN4),
874 PINMUX_DATA(LCDD6_MARK, PORT198_FN1),
875 PINMUX_DATA(LCDD7_MARK, PORT199_FN1),
876 PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2),
877 PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN3),
878 PINMUX_DATA(LCDD8_MARK, PORT200_FN1),
879 PINMUX_DATA(PORT200_KEYIN0_MARK, PORT200_FN2),
880 PINMUX_DATA(VIO_DR0_MARK, PORT200_FN3),
881 PINMUX_DATA(D16_MARK, PORT200_FN4),
882 PINMUX_DATA(LCDD9_MARK, PORT201_FN1),
883 PINMUX_DATA(PORT201_KEYIN1_MARK, PORT201_FN2),
884 PINMUX_DATA(VIO_DR1_MARK, PORT201_FN3),
885 PINMUX_DATA(D17_MARK, PORT201_FN4),
886 PINMUX_DATA(LCDD10_MARK, PORT202_FN1),
887 PINMUX_DATA(PORT202_KEYIN2_MARK, PORT202_FN2),
888 PINMUX_DATA(VIO_DR2_MARK, PORT202_FN3),
889 PINMUX_DATA(D18_MARK, PORT202_FN4),
890 PINMUX_DATA(LCDD11_MARK, PORT203_FN1),
891 PINMUX_DATA(PORT203_KEYIN3_MARK, PORT203_FN2),
892 PINMUX_DATA(VIO_DR3_MARK, PORT203_FN3),
893 PINMUX_DATA(D19_MARK, PORT203_FN4),
894 PINMUX_DATA(LCDD12_MARK, PORT204_FN1),
895 PINMUX_DATA(PORT204_KEYIN4_MARK, PORT204_FN2),
896 PINMUX_DATA(VIO_DR4_MARK, PORT204_FN3),
897 PINMUX_DATA(D20_MARK, PORT204_FN4),
898 PINMUX_DATA(LCDD13_MARK, PORT205_FN1),
899 PINMUX_DATA(PORT205_KEYIN5_MARK, PORT205_FN2),
900 PINMUX_DATA(VIO_DR5_MARK, PORT205_FN3),
901 PINMUX_DATA(D21_MARK, PORT205_FN4),
902 PINMUX_DATA(LCDD14_MARK, PORT206_FN1),
903 PINMUX_DATA(PORT206_KEYIN6_MARK, PORT206_FN2),
904 PINMUX_DATA(VIO_DR6_MARK, PORT206_FN3),
905 PINMUX_DATA(D22_MARK, PORT206_FN4),
906 PINMUX_DATA(LCDD15_MARK, PORT207_FN1),
907 PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2),
908 PINMUX_DATA(PORT207_KEYOUT0_MARK, PORT207_FN3),
909 PINMUX_DATA(VIO_DR7_MARK, PORT207_FN4),
910 PINMUX_DATA(D23_MARK, PORT207_FN5),
911 PINMUX_DATA(LCDD16_MARK, PORT208_FN1),
912 PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2),
913 PINMUX_DATA(PORT208_KEYOUT1_MARK, PORT208_FN3),
914 PINMUX_DATA(VIO_VDR_MARK, PORT208_FN4),
915 PINMUX_DATA(D24_MARK, PORT208_FN5),
916 PINMUX_DATA(LCDD17_MARK, PORT209_FN1),
917 PINMUX_DATA(PORT209_KEYOUT2_MARK, PORT209_FN2),
918 PINMUX_DATA(VIO_HDR_MARK, PORT209_FN3),
919 PINMUX_DATA(D25_MARK, PORT209_FN4),
920 PINMUX_DATA(LCDD18_MARK, PORT210_FN1),
921 PINMUX_DATA(DREQ2_MARK, PORT210_FN2),
922 PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN3),
923 PINMUX_DATA(D26_MARK, PORT210_FN4),
924 PINMUX_DATA(LCDD19_MARK, PORT211_FN1),
925 PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN2),
926 PINMUX_DATA(D27_MARK, PORT211_FN3),
927 PINMUX_DATA(LCDD20_MARK, PORT212_FN1),
928 PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2),
929 PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN3),
930 PINMUX_DATA(D28_MARK, PORT212_FN4),
931 PINMUX_DATA(LCDD21_MARK, PORT213_FN1),
932 PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2),
933 PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN3),
934 PINMUX_DATA(D29_MARK, PORT213_FN4),
935 PINMUX_DATA(LCDD22_MARK, PORT214_FN1),
936 PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2),
937 PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN3),
938 PINMUX_DATA(D30_MARK, PORT214_FN4),
939 PINMUX_DATA(LCDD23_MARK, PORT215_FN1),
940 PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2),
941 PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN3),
942 PINMUX_DATA(D31_MARK, PORT215_FN4),
943 PINMUX_DATA(LCDDCK_MARK, PORT216_FN1),
944 PINMUX_DATA(LCDWR_MARK, PORT216_FN2),
945 PINMUX_DATA(PORT216_KEYOUT3_MARK, PORT216_FN3),
946 PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN4),
947 PINMUX_DATA(LCDRD_MARK, PORT217_FN1),
948 PINMUX_DATA(DACK2_MARK, PORT217_FN2),
949 PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN3),
950 PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1),
951 PINMUX_DATA(LCDCS_MARK, PORT218_FN2),
952 PINMUX_DATA(LCDCS2_MARK, PORT218_FN3),
953 PINMUX_DATA(DACK3_MARK, PORT218_FN4),
954 PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5),
955 PINMUX_DATA(PORT218_KEYOUT4_MARK, PORT218_FN6),
956 PINMUX_DATA(LCDDISP_MARK, PORT219_FN1),
957 PINMUX_DATA(LCDRS_MARK, PORT219_FN2),
958 PINMUX_DATA(DREQ3_MARK, PORT219_FN3),
959 PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN4),
960 PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1),
961 PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2),
962 PINMUX_DATA(PORT220_KEYOUT5_MARK, PORT220_FN3),
963 PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1),
964 PINMUX_DATA(DREQ1_MARK, PORT221_FN2),
965 PINMUX_DATA(PWEN_MARK, PORT221_FN3),
966 PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN4),
967 PINMUX_DATA(LCDDON_MARK, PORT222_FN1),
968 PINMUX_DATA(LCDDON2_MARK, PORT222_FN2),
969 PINMUX_DATA(DACK1_MARK, PORT222_FN3),
970 PINMUX_DATA(OVCN_MARK, PORT222_FN4),
971 PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5),
972 PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN1),
973 PINMUX_DATA(OVCN2_MARK, PORT225_FN2),
974 PINMUX_DATA(EXTLP_MARK, PORT226_FN1),
975 PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2),
976 PINMUX_DATA(USBTERM_MARK, PORT226_FN3),
977 PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN4),
978 PINMUX_DATA(SCIFA1_RTS_MARK, PORT227_FN1),
979 PINMUX_DATA(IDIN_MARK, PORT227_FN2),
980 PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN1),
981 PINMUX_DATA(SCIFA1_CTS_MARK, PORT229_FN1),
982 PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN2),
983 PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1),
984 PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2),
985 PINMUX_DATA(PORT230_FSIAOMC_MARK, PORT230_FN3),
986 PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1),
987 PINMUX_DATA(SCIFA2_CTS2_MARK, PORT231_FN2),
988 PINMUX_DATA(PORT231_FSIAOLR_MARK, PORT231_FN3),
989 PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1),
990 PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2),
991 PINMUX_DATA(PORT232_FSIAOBT_MARK, PORT232_FN3),
992 PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1),
993 PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2),
994 PINMUX_DATA(GPS_VCOTRIG_MARK, PORT233_FN3),
995 PINMUX_DATA(PORT233_FSIACK_MARK, PORT233_FN4),
996 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1),
997 PINMUX_DATA(SCIFA2_RTS2_MARK, PORT234_FN2),
998 PINMUX_DATA(PORT234_FSIAOSLD_MARK, PORT234_FN3),
999 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1),
1000 PINMUX_DATA(OPORT0_MARK, PORT235_FN2),
1001 PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3),
1002 PINMUX_DATA(PORT235_FSIAILR_MARK, PORT235_FN4),
1003 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1),
1004 PINMUX_DATA(I2C_SDA2_MARK, PORT236_FN2),
1005 PINMUX_DATA(PORT236_FSIAIBT_MARK, PORT236_FN3),
1006 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1),
1007 PINMUX_DATA(I2C_SCL2_MARK, PORT237_FN2),
1008 PINMUX_DATA(PORT237_FSIAISLD_MARK, PORT237_FN3),
1009 PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1),
1010 PINMUX_DATA(EDBGREQ3_MARK, PORT238_FN2),
1011
1012 /* 55-5 (FN) */
1013 PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1),
1014 PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1),
1015 PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1),
1016 PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2),
1017 PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3),
1018 PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4),
1019 PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1),
1020 PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN2),
1021 PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1),
1022 PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2),
1023 PINMUX_DATA(PORT244_SCIFA5_CTS_MARK, PORT244_FN1),
1024 PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2),
1025 PINMUX_DATA(PORT244_SCIFB_CTS_MARK, PORT244_FN3),
1026 PINMUX_DATA(PORT245_SCIFA5_RTS_MARK, PORT245_FN1),
1027 PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2),
1028 PINMUX_DATA(PORT245_SCIFB_RTS_MARK, PORT245_FN3),
1029 PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1),
1030 PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2),
1031 PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3),
1032 PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4),
1033 PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1),
1034 PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2),
1035 PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3),
1036 PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4),
1037 PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1),
1038 PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2),
1039 PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3),
1040 PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4),
1041 PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1),
1042 PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2),
1043 PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1),
1044 PINMUX_DATA(TCK2_SWCLK_MC0_MARK, PORT250_FN2),
1045 PINMUX_DATA(SDHICD0_MARK, PORT251_FN1),
1046 PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1),
1047 PINMUX_DATA(TMS2_SWDIO_MC0_MARK, PORT252_FN2),
1048 PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1),
1049 PINMUX_DATA(TDO2_SWO0_MC0_MARK, PORT253_FN2),
1050 PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1),
1051 PINMUX_DATA(TDI2_MARK, PORT254_FN2),
1052 PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1),
1053 PINMUX_DATA(RTCK2_SWO1_MC0_MARK, PORT255_FN2),
1054 PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1),
1055 PINMUX_DATA(TRST2_MARK, PORT256_FN2),
1056 PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1),
1057 PINMUX_DATA(EDBGREQ2_MARK, PORT257_FN2),
1058 PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1),
1059 PINMUX_DATA(TCK3_SWCLK_MC1_MARK, PORT258_FN2),
1060 PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1),
1061 PINMUX_DATA(M11_SLCD_SO2_MARK, PORT259_FN2),
1062 PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3),
1063 PINMUX_DATA(TMS3_SWDIO_MC1_MARK, PORT259_FN4),
1064 PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1),
1065 PINMUX_DATA(M9_SLCD_A02_MARK, PORT260_FN2),
1066 PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3),
1067 PINMUX_DATA(TDO3_SWO0_MC1_MARK, PORT260_FN4),
1068 PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1),
1069 PINMUX_DATA(M10_SLCD_CK2_MARK, PORT261_FN2),
1070 PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3),
1071 PINMUX_DATA(TDI3_MARK, PORT261_FN4),
1072 PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1),
1073 PINMUX_DATA(M12_SLCD_CE2_MARK, PORT262_FN2),
1074 PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3),
1075 PINMUX_DATA(RTCK3_SWO1_MC1_MARK, PORT262_FN4),
1076 PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1),
1077 PINMUX_DATA(TRST3_MARK, PORT263_FN2),
1078 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
1079};
1080
1081#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1082#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
1083#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1084
1085static struct pinmux_gpio pinmux_gpios[] = {
1086 /* 55-1 -> 55-5 (GPIO) */
1087 GPIO_PORT_265(),
1088
1089 /* Special Pull-up / Pull-down Functions */
1090 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
1091 GPIO_FN(PORT68_KEYIN2_PU), GPIO_FN(PORT69_KEYIN3_PU),
1092 GPIO_FN(PORT70_KEYIN4_PU), GPIO_FN(PORT71_KEYIN5_PU),
1093 GPIO_FN(PORT72_KEYIN6_PU),
1094
1095 /* 55-1 (FN) */
1096 GPIO_FN(VBUS_0),
1097 GPIO_FN(CPORT0),
1098 GPIO_FN(CPORT1),
1099 GPIO_FN(CPORT2),
1100 GPIO_FN(CPORT3),
1101 GPIO_FN(CPORT4),
1102 GPIO_FN(CPORT5),
1103 GPIO_FN(CPORT6),
1104 GPIO_FN(CPORT7),
1105 GPIO_FN(CPORT8),
1106 GPIO_FN(CPORT9),
1107 GPIO_FN(CPORT10),
1108 GPIO_FN(CPORT11), GPIO_FN(SIN2),
1109 GPIO_FN(CPORT12), GPIO_FN(XCTS2),
1110 GPIO_FN(CPORT13), GPIO_FN(RFSPO4),
1111 GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
1112 GPIO_FN(CPORT15), GPIO_FN(SCIFA0_SCK), GPIO_FN(GPS_AGC2),
1113 GPIO_FN(CPORT16), GPIO_FN(SCIFA0_TXD), GPIO_FN(GPS_AGC3),
1114 GPIO_FN(CPORT17_IC_OE), GPIO_FN(SOUT2),
1115 GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(PORT19_VIO_CKO2),
1116 GPIO_FN(CPORT19_MPORT1),
1117 GPIO_FN(CPORT20), GPIO_FN(RFSPO6),
1118 GPIO_FN(CPORT21), GPIO_FN(STATUS0),
1119 GPIO_FN(CPORT22), GPIO_FN(STATUS1),
1120 GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
1121 GPIO_FN(B_SYNLD1),
1122 GPIO_FN(B_SYNLD2), GPIO_FN(SYSENMSK),
1123 GPIO_FN(XMAINPS),
1124 GPIO_FN(XDIVPS),
1125 GPIO_FN(XIDRST),
1126 GPIO_FN(IDCLK), GPIO_FN(IC_DP),
1127 GPIO_FN(IDIO), GPIO_FN(IC_DM),
1128 GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), GPIO_FN(M02_BERDAT),
1129 GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
1130 GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
1131 GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
1132 GPIO_FN(PCMCLKO),
1133 GPIO_FN(SYNC8KO),
1134
1135 /* 55-2 (FN) */
1136 GPIO_FN(DNPCM_A),
1137 GPIO_FN(UPPCM_A),
1138 GPIO_FN(VACK),
1139 GPIO_FN(XTALB1L),
1140 GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
1141 GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
1142 GPIO_FN(GPS_PWRDOWN), GPIO_FN(SCIFA0_CTS),
1143 GPIO_FN(GPS_IM),
1144 GPIO_FN(GPS_IS),
1145 GPIO_FN(GPS_QM),
1146 GPIO_FN(GPS_QS),
1147 GPIO_FN(FMSOCK), GPIO_FN(PORT49_IRDA_OUT), GPIO_FN(PORT49_IROUT),
1148 GPIO_FN(FMSOOLR), GPIO_FN(BBIF2_TSYNC2), GPIO_FN(TPU2TO2),
1149 GPIO_FN(IPORT3), GPIO_FN(FMSIOLR),
1150 GPIO_FN(FMSOOBT), GPIO_FN(BBIF2_TSCK2), GPIO_FN(TPU2TO3),
1151 GPIO_FN(OPORT1), GPIO_FN(FMSIOBT),
1152 GPIO_FN(FMSOSLD), GPIO_FN(BBIF2_TXD2), GPIO_FN(OPORT2),
1153 GPIO_FN(FMSOILR), GPIO_FN(PORT53_IRDA_IN), GPIO_FN(TPU3TO3),
1154 GPIO_FN(OPORT3), GPIO_FN(FMSIILR),
1155 GPIO_FN(FMSOIBT), GPIO_FN(PORT54_IRDA_FIRSEL), GPIO_FN(TPU3TO2),
1156 GPIO_FN(FMSIIBT),
1157 GPIO_FN(FMSISLD), GPIO_FN(MFG0_OUT1), GPIO_FN(TPU0TO0),
1158 GPIO_FN(A0_EA0), GPIO_FN(BS),
1159 GPIO_FN(A12_EA12), GPIO_FN(PORT58_VIO_CKOR), GPIO_FN(TPU4TO2),
1160 GPIO_FN(A13_EA13), GPIO_FN(PORT59_IROUT), GPIO_FN(MFG0_OUT2),
1161 GPIO_FN(TPU0TO1),
1162 GPIO_FN(A14_EA14), GPIO_FN(PORT60_KEYOUT5),
1163 GPIO_FN(A15_EA15), GPIO_FN(PORT61_KEYOUT4),
1164 GPIO_FN(A16_EA16), GPIO_FN(PORT62_KEYOUT3), GPIO_FN(MSIOF0_SS1),
1165 GPIO_FN(A17_EA17), GPIO_FN(PORT63_KEYOUT2), GPIO_FN(MSIOF0_TSYNC),
1166 GPIO_FN(A18_EA18), GPIO_FN(PORT64_KEYOUT1), GPIO_FN(MSIOF0_TSCK),
1167 GPIO_FN(A19_EA19), GPIO_FN(PORT65_KEYOUT0), GPIO_FN(MSIOF0_TXD),
1168 GPIO_FN(A20_EA20), GPIO_FN(PORT66_KEYIN0), GPIO_FN(MSIOF0_RSCK),
1169 GPIO_FN(A21_EA21), GPIO_FN(PORT67_KEYIN1), GPIO_FN(MSIOF0_RSYNC),
1170 GPIO_FN(A22_EA22), GPIO_FN(PORT68_KEYIN2), GPIO_FN(MSIOF0_MCK0),
1171 GPIO_FN(A23_EA23), GPIO_FN(PORT69_KEYIN3), GPIO_FN(MSIOF0_MCK1),
1172 GPIO_FN(A24_EA24), GPIO_FN(PORT70_KEYIN4), GPIO_FN(MSIOF0_RXD),
1173 GPIO_FN(A25_EA25), GPIO_FN(PORT71_KEYIN5), GPIO_FN(MSIOF0_SS2),
1174 GPIO_FN(A26), GPIO_FN(PORT72_KEYIN6),
1175 GPIO_FN(D0_ED0_NAF0),
1176 GPIO_FN(D1_ED1_NAF1),
1177 GPIO_FN(D2_ED2_NAF2),
1178 GPIO_FN(D3_ED3_NAF3),
1179 GPIO_FN(D4_ED4_NAF4),
1180 GPIO_FN(D5_ED5_NAF5),
1181 GPIO_FN(D6_ED6_NAF6),
1182 GPIO_FN(D7_ED7_NAF7),
1183 GPIO_FN(D8_ED8_NAF8),
1184 GPIO_FN(D9_ED9_NAF9),
1185 GPIO_FN(D10_ED10_NAF10),
1186 GPIO_FN(D11_ED11_NAF11),
1187 GPIO_FN(D12_ED12_NAF12),
1188 GPIO_FN(D13_ED13_NAF13),
1189 GPIO_FN(D14_ED14_NAF14),
1190 GPIO_FN(D15_ED15_NAF15),
1191 GPIO_FN(CS4),
1192 GPIO_FN(CS5A), GPIO_FN(FMSICK),
1193
1194 /* 55-3 (FN) */
1195 GPIO_FN(CS5B), GPIO_FN(FCE1),
1196 GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(CS6A), GPIO_FN(DACK0),
1197 GPIO_FN(FCE0),
1198 GPIO_FN(WAIT), GPIO_FN(DREQ0),
1199 GPIO_FN(RD_XRD),
1200 GPIO_FN(WE0_XWR0_FWE),
1201 GPIO_FN(WE1_XWR1),
1202 GPIO_FN(FRB),
1203 GPIO_FN(CKO),
1204 GPIO_FN(NBRSTOUT),
1205 GPIO_FN(NBRST),
1206 GPIO_FN(GPS_EPPSIN),
1207 GPIO_FN(LATCHPULSE),
1208 GPIO_FN(LTESIGNAL),
1209 GPIO_FN(LEGACYSTATE),
1210 GPIO_FN(TCKON),
1211 GPIO_FN(VIO_VD), GPIO_FN(PORT128_KEYOUT0), GPIO_FN(IPORT0),
1212 GPIO_FN(VIO_HD), GPIO_FN(PORT129_KEYOUT1), GPIO_FN(IPORT1),
1213 GPIO_FN(VIO_D0), GPIO_FN(PORT130_KEYOUT2), GPIO_FN(PORT130_MSIOF2_RXD),
1214 GPIO_FN(VIO_D1), GPIO_FN(PORT131_KEYOUT3), GPIO_FN(PORT131_MSIOF2_SS1),
1215 GPIO_FN(VIO_D2), GPIO_FN(PORT132_KEYOUT4), GPIO_FN(PORT132_MSIOF2_SS2),
1216 GPIO_FN(VIO_D3), GPIO_FN(PORT133_KEYOUT5),
1217 GPIO_FN(PORT133_MSIOF2_TSYNC),
1218 GPIO_FN(VIO_D4), GPIO_FN(PORT134_KEYIN0), GPIO_FN(PORT134_MSIOF2_TXD),
1219 GPIO_FN(VIO_D5), GPIO_FN(PORT135_KEYIN1), GPIO_FN(PORT135_MSIOF2_TSCK),
1220 GPIO_FN(VIO_D6), GPIO_FN(PORT136_KEYIN2),
1221 GPIO_FN(VIO_D7), GPIO_FN(PORT137_KEYIN3),
1222 GPIO_FN(VIO_D8), GPIO_FN(M9_SLCD_A01), GPIO_FN(PORT138_FSIAOMC),
1223 GPIO_FN(VIO_D9), GPIO_FN(M10_SLCD_CK1), GPIO_FN(PORT139_FSIAOLR),
1224 GPIO_FN(VIO_D10), GPIO_FN(M11_SLCD_SO1), GPIO_FN(TPU0TO2),
1225 GPIO_FN(PORT140_FSIAOBT),
1226 GPIO_FN(VIO_D11), GPIO_FN(M12_SLCD_CE1), GPIO_FN(TPU0TO3),
1227 GPIO_FN(PORT141_FSIAOSLD),
1228 GPIO_FN(VIO_D12), GPIO_FN(M13_BSW), GPIO_FN(PORT142_FSIACK),
1229 GPIO_FN(VIO_D13), GPIO_FN(M14_GSW), GPIO_FN(PORT143_FSIAILR),
1230 GPIO_FN(VIO_D14), GPIO_FN(M15_RSW), GPIO_FN(PORT144_FSIAIBT),
1231 GPIO_FN(VIO_D15), GPIO_FN(TPU1TO3), GPIO_FN(PORT145_FSIAISLD),
1232 GPIO_FN(VIO_CLK), GPIO_FN(PORT146_KEYIN4), GPIO_FN(IPORT2),
1233 GPIO_FN(VIO_FIELD), GPIO_FN(PORT147_KEYIN5),
1234 GPIO_FN(VIO_CKO), GPIO_FN(PORT148_KEYIN6),
1235 GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(MFG0_IN1),
1236 GPIO_FN(MFG0_IN2),
1237 GPIO_FN(TS_SPSYNC3), GPIO_FN(MSIOF2_RSCK),
1238 GPIO_FN(TS_SDAT3), GPIO_FN(MSIOF2_RSYNC),
1239 GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT153_MSIOF2_SS1),
1240 GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), GPIO_FN(MSIOF2_MCK0),
1241 GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), GPIO_FN(MSIOF2_MCK1),
1242 GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT156_MSIOF2_SS2),
1243 GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT157_MSIOF2_RXD),
1244
1245 /* 55-4 (FN) */
1246 GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
1247 GPIO_FN(PORT159_SCIFB_SCK), GPIO_FN(PORT159_SCIFA5_SCK), GPIO_FN(NMI),
1248 GPIO_FN(PORT160_SCIFB_TXD), GPIO_FN(PORT160_SCIFA5_TXD), GPIO_FN(SOUT0),
1249 GPIO_FN(PORT161_SCIFB_CTS), GPIO_FN(PORT161_SCIFA5_CTS), GPIO_FN(XCTS0),
1250 GPIO_FN(MFG3_IN2),
1251 GPIO_FN(PORT162_SCIFB_RXD), GPIO_FN(PORT162_SCIFA5_RXD), GPIO_FN(SIN0),
1252 GPIO_FN(MFG3_IN1),
1253 GPIO_FN(PORT163_SCIFB_RTS), GPIO_FN(PORT163_SCIFA5_RTS), GPIO_FN(XRTS0),
1254 GPIO_FN(MFG3_OUT1), GPIO_FN(TPU3TO0),
1255 GPIO_FN(LCDD0), GPIO_FN(PORT192_KEYOUT0), GPIO_FN(EXT_CKI),
1256 GPIO_FN(LCDD1), GPIO_FN(PORT193_KEYOUT1), GPIO_FN(PORT193_SCIFA5_CTS),
1257 GPIO_FN(BBIF2_TSYNC1),
1258 GPIO_FN(LCDD2), GPIO_FN(PORT194_KEYOUT2), GPIO_FN(PORT194_SCIFA5_RTS),
1259 GPIO_FN(BBIF2_TSCK1),
1260 GPIO_FN(LCDD3), GPIO_FN(PORT195_KEYOUT3), GPIO_FN(PORT195_SCIFA5_RXD),
1261 GPIO_FN(BBIF2_TXD1),
1262 GPIO_FN(LCDD4), GPIO_FN(PORT196_KEYOUT4), GPIO_FN(PORT196_SCIFA5_TXD),
1263 GPIO_FN(LCDD5), GPIO_FN(PORT197_KEYOUT5), GPIO_FN(PORT197_SCIFA5_SCK),
1264 GPIO_FN(MFG2_OUT2),
1265 GPIO_FN(LCDD6),
1266 GPIO_FN(LCDD7), GPIO_FN(TPU4TO1), GPIO_FN(MFG4_OUT2),
1267 GPIO_FN(LCDD8), GPIO_FN(PORT200_KEYIN0), GPIO_FN(VIO_DR0),
1268 GPIO_FN(D16),
1269 GPIO_FN(LCDD9), GPIO_FN(PORT201_KEYIN1), GPIO_FN(VIO_DR1),
1270 GPIO_FN(D17),
1271 GPIO_FN(LCDD10), GPIO_FN(PORT202_KEYIN2), GPIO_FN(VIO_DR2),
1272 GPIO_FN(D18),
1273 GPIO_FN(LCDD11), GPIO_FN(PORT203_KEYIN3), GPIO_FN(VIO_DR3),
1274 GPIO_FN(D19),
1275 GPIO_FN(LCDD12), GPIO_FN(PORT204_KEYIN4), GPIO_FN(VIO_DR4),
1276 GPIO_FN(D20),
1277 GPIO_FN(LCDD13), GPIO_FN(PORT205_KEYIN5), GPIO_FN(VIO_DR5),
1278 GPIO_FN(D21),
1279 GPIO_FN(LCDD14), GPIO_FN(PORT206_KEYIN6), GPIO_FN(VIO_DR6),
1280 GPIO_FN(D22),
1281 GPIO_FN(LCDD15), GPIO_FN(PORT207_MSIOF0L_SS1), GPIO_FN(PORT207_KEYOUT0),
1282 GPIO_FN(VIO_DR7), GPIO_FN(D23),
1283 GPIO_FN(LCDD16), GPIO_FN(PORT208_MSIOF0L_SS2), GPIO_FN(PORT208_KEYOUT1),
1284 GPIO_FN(VIO_VDR), GPIO_FN(D24),
1285 GPIO_FN(LCDD17), GPIO_FN(PORT209_KEYOUT2), GPIO_FN(VIO_HDR),
1286 GPIO_FN(D25),
1287 GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(PORT210_MSIOF0L_SS1),
1288 GPIO_FN(D26),
1289 GPIO_FN(LCDD19), GPIO_FN(PORT211_MSIOF0L_SS2), GPIO_FN(D27),
1290 GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
1291 GPIO_FN(D28),
1292 GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
1293 GPIO_FN(D29),
1294 GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_RSCK),
1295 GPIO_FN(D30),
1296 GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_RSYNC),
1297 GPIO_FN(D31),
1298 GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(PORT216_KEYOUT3),
1299 GPIO_FN(VIO_CLKR),
1300 GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_TSYNC),
1301 GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
1302 GPIO_FN(PORT218_VIO_CKOR), GPIO_FN(PORT218_KEYOUT4),
1303 GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_TSCK),
1304 GPIO_FN(LCDVSYN), GPIO_FN(LCDVSYN2), GPIO_FN(PORT220_KEYOUT5),
1305 GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(PWEN), GPIO_FN(MSIOF0L_RXD),
1306 GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(OVCN),
1307 GPIO_FN(MSIOF0L_TXD),
1308 GPIO_FN(SCIFA1_TXD), GPIO_FN(OVCN2),
1309 GPIO_FN(EXTLP), GPIO_FN(SCIFA1_SCK), GPIO_FN(USBTERM),
1310 GPIO_FN(PORT226_VIO_CKO2),
1311 GPIO_FN(SCIFA1_RTS), GPIO_FN(IDIN),
1312 GPIO_FN(SCIFA1_RXD),
1313 GPIO_FN(SCIFA1_CTS), GPIO_FN(MFG1_IN1),
1314 GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA2_TXD2), GPIO_FN(PORT230_FSIAOMC),
1315 GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA2_CTS2), GPIO_FN(PORT231_FSIAOLR),
1316 GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA2_SCK2), GPIO_FN(PORT232_FSIAOBT),
1317 GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA2_RXD2), GPIO_FN(GPS_VCOTRIG),
1318 GPIO_FN(PORT233_FSIACK),
1319 GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA2_RTS2), GPIO_FN(PORT234_FSIAOSLD),
1320 GPIO_FN(MSIOF1_RSYNC), GPIO_FN(OPORT0), GPIO_FN(MFG1_IN2),
1321 GPIO_FN(PORT235_FSIAILR),
1322 GPIO_FN(MSIOF1_MCK0), GPIO_FN(I2C_SDA2), GPIO_FN(PORT236_FSIAIBT),
1323 GPIO_FN(MSIOF1_MCK1), GPIO_FN(I2C_SCL2), GPIO_FN(PORT237_FSIAISLD),
1324 GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
1325
1326 /* 55-5 (FN) */
1327 GPIO_FN(MSIOF1_SS2),
1328 GPIO_FN(SCIFA6_TXD),
1329 GPIO_FN(PORT241_IRDA_OUT), GPIO_FN(PORT241_IROUT), GPIO_FN(MFG4_OUT1),
1330 GPIO_FN(TPU4TO0),
1331 GPIO_FN(PORT242_IRDA_IN), GPIO_FN(MFG4_IN2),
1332 GPIO_FN(PORT243_IRDA_FIRSEL), GPIO_FN(PORT243_VIO_CKO2),
1333 GPIO_FN(PORT244_SCIFA5_CTS), GPIO_FN(MFG2_IN1),
1334 GPIO_FN(PORT244_SCIFB_CTS),
1335 GPIO_FN(PORT245_SCIFA5_RTS), GPIO_FN(MFG2_IN2),
1336 GPIO_FN(PORT245_SCIFB_RTS),
1337 GPIO_FN(PORT246_SCIFA5_RXD), GPIO_FN(MFG1_OUT1),
1338 GPIO_FN(PORT246_SCIFB_RXD), GPIO_FN(TPU1TO0),
1339 GPIO_FN(PORT247_SCIFA5_TXD), GPIO_FN(MFG3_OUT2),
1340 GPIO_FN(PORT247_SCIFB_TXD), GPIO_FN(TPU3TO1),
1341 GPIO_FN(PORT248_SCIFA5_SCK), GPIO_FN(MFG2_OUT1),
1342 GPIO_FN(PORT248_SCIFB_SCK), GPIO_FN(TPU2TO0),
1343 GPIO_FN(PORT249_IROUT), GPIO_FN(MFG4_IN1),
1344 GPIO_FN(SDHICLK0), GPIO_FN(TCK2_SWCLK_MC0),
1345 GPIO_FN(SDHICD0),
1346 GPIO_FN(SDHID0_0), GPIO_FN(TMS2_SWDIO_MC0),
1347 GPIO_FN(SDHID0_1), GPIO_FN(TDO2_SWO0_MC0),
1348 GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
1349 GPIO_FN(SDHID0_3), GPIO_FN(RTCK2_SWO1_MC0),
1350 GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
1351 GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
1352 GPIO_FN(SDHICLK1), GPIO_FN(TCK3_SWCLK_MC1),
1353 GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), GPIO_FN(TS_SPSYNC2),
1354 GPIO_FN(TMS3_SWDIO_MC1),
1355 GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_A02), GPIO_FN(TS_SDAT2),
1356 GPIO_FN(TDO3_SWO0_MC1),
1357 GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), GPIO_FN(TS_SDEN2),
1358 GPIO_FN(TDI3),
1359 GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), GPIO_FN(TS_SCK2),
1360 GPIO_FN(RTCK3_SWO1_MC1),
1361 GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
1362 GPIO_FN(RESETOUTS),
1363};
1364
1365/* helper for top 4 bits in PORTnCR */
1366#define PCRH(in, in_pd, in_pu, out) \
1367 0, (out), (in), 0, \
1368 0, 0, 0, 0, \
1369 0, 0, (in_pd), 0, \
1370 0, 0, (in_pu), 0
1371
1372#define PORTCR(nr, reg) \
1373 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1374 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1375 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1376 PORT##nr##_FN0, PORT##nr##_FN1, \
1377 PORT##nr##_FN2, PORT##nr##_FN3, \
1378 PORT##nr##_FN4, PORT##nr##_FN5, \
1379 PORT##nr##_FN6, PORT##nr##_FN7 } \
1380 }
1381
1382static struct pinmux_cfg_reg pinmux_config_regs[] = {
1383 PORTCR(0, 0xe6050000), /* PORT0CR */
1384 PORTCR(1, 0xe6050001), /* PORT1CR */
1385 PORTCR(2, 0xe6050002), /* PORT2CR */
1386 PORTCR(3, 0xe6050003), /* PORT3CR */
1387 PORTCR(4, 0xe6050004), /* PORT4CR */
1388 PORTCR(5, 0xe6050005), /* PORT5CR */
1389 PORTCR(6, 0xe6050006), /* PORT6CR */
1390 PORTCR(7, 0xe6050007), /* PORT7CR */
1391 PORTCR(8, 0xe6050008), /* PORT8CR */
1392 PORTCR(9, 0xe6050009), /* PORT9CR */
1393
1394 PORTCR(10, 0xe605000a), /* PORT10CR */
1395 PORTCR(11, 0xe605000b), /* PORT11CR */
1396 PORTCR(12, 0xe605000c), /* PORT12CR */
1397 PORTCR(13, 0xe605000d), /* PORT13CR */
1398 PORTCR(14, 0xe605000e), /* PORT14CR */
1399 PORTCR(15, 0xe605000f), /* PORT15CR */
1400 PORTCR(16, 0xe6050010), /* PORT16CR */
1401 PORTCR(17, 0xe6050011), /* PORT17CR */
1402 PORTCR(18, 0xe6050012), /* PORT18CR */
1403 PORTCR(19, 0xe6050013), /* PORT19CR */
1404
1405 PORTCR(20, 0xe6050014), /* PORT20CR */
1406 PORTCR(21, 0xe6050015), /* PORT21CR */
1407 PORTCR(22, 0xe6050016), /* PORT22CR */
1408 PORTCR(23, 0xe6050017), /* PORT23CR */
1409 PORTCR(24, 0xe6050018), /* PORT24CR */
1410 PORTCR(25, 0xe6050019), /* PORT25CR */
1411 PORTCR(26, 0xe605001a), /* PORT26CR */
1412 PORTCR(27, 0xe605001b), /* PORT27CR */
1413 PORTCR(28, 0xe605001c), /* PORT28CR */
1414 PORTCR(29, 0xe605001d), /* PORT29CR */
1415
1416 PORTCR(30, 0xe605001e), /* PORT30CR */
1417 PORTCR(31, 0xe605001f), /* PORT31CR */
1418 PORTCR(32, 0xe6050020), /* PORT32CR */
1419 PORTCR(33, 0xe6050021), /* PORT33CR */
1420 PORTCR(34, 0xe6050022), /* PORT34CR */
1421 PORTCR(35, 0xe6050023), /* PORT35CR */
1422 PORTCR(36, 0xe6050024), /* PORT36CR */
1423 PORTCR(37, 0xe6050025), /* PORT37CR */
1424 PORTCR(38, 0xe6050026), /* PORT38CR */
1425 PORTCR(39, 0xe6050027), /* PORT39CR */
1426
1427 PORTCR(40, 0xe6050028), /* PORT40CR */
1428 PORTCR(41, 0xe6050029), /* PORT41CR */
1429 PORTCR(42, 0xe605002a), /* PORT42CR */
1430 PORTCR(43, 0xe605002b), /* PORT43CR */
1431 PORTCR(44, 0xe605002c), /* PORT44CR */
1432 PORTCR(45, 0xe605002d), /* PORT45CR */
1433 PORTCR(46, 0xe605002e), /* PORT46CR */
1434 PORTCR(47, 0xe605002f), /* PORT47CR */
1435 PORTCR(48, 0xe6050030), /* PORT48CR */
1436 PORTCR(49, 0xe6050031), /* PORT49CR */
1437
1438 PORTCR(50, 0xe6050032), /* PORT50CR */
1439 PORTCR(51, 0xe6050033), /* PORT51CR */
1440 PORTCR(52, 0xe6050034), /* PORT52CR */
1441 PORTCR(53, 0xe6050035), /* PORT53CR */
1442 PORTCR(54, 0xe6050036), /* PORT54CR */
1443 PORTCR(55, 0xe6050037), /* PORT55CR */
1444 PORTCR(56, 0xe6050038), /* PORT56CR */
1445 PORTCR(57, 0xe6050039), /* PORT57CR */
1446 PORTCR(58, 0xe605003a), /* PORT58CR */
1447 PORTCR(59, 0xe605003b), /* PORT59CR */
1448
1449 PORTCR(60, 0xe605003c), /* PORT60CR */
1450 PORTCR(61, 0xe605003d), /* PORT61CR */
1451 PORTCR(62, 0xe605003e), /* PORT62CR */
1452 PORTCR(63, 0xe605003f), /* PORT63CR */
1453 PORTCR(64, 0xe6050040), /* PORT64CR */
1454 PORTCR(65, 0xe6050041), /* PORT65CR */
1455 PORTCR(66, 0xe6050042), /* PORT66CR */
1456 PORTCR(67, 0xe6050043), /* PORT67CR */
1457 PORTCR(68, 0xe6050044), /* PORT68CR */
1458 PORTCR(69, 0xe6050045), /* PORT69CR */
1459
1460 PORTCR(70, 0xe6050046), /* PORT70CR */
1461 PORTCR(71, 0xe6050047), /* PORT71CR */
1462 PORTCR(72, 0xe6050048), /* PORT72CR */
1463 PORTCR(73, 0xe6050049), /* PORT73CR */
1464 PORTCR(74, 0xe605004a), /* PORT74CR */
1465 PORTCR(75, 0xe605004b), /* PORT75CR */
1466 PORTCR(76, 0xe605004c), /* PORT76CR */
1467 PORTCR(77, 0xe605004d), /* PORT77CR */
1468 PORTCR(78, 0xe605004e), /* PORT78CR */
1469 PORTCR(79, 0xe605004f), /* PORT79CR */
1470
1471 PORTCR(80, 0xe6050050), /* PORT80CR */
1472 PORTCR(81, 0xe6050051), /* PORT81CR */
1473 PORTCR(82, 0xe6050052), /* PORT82CR */
1474 PORTCR(83, 0xe6050053), /* PORT83CR */
1475 PORTCR(84, 0xe6050054), /* PORT84CR */
1476 PORTCR(85, 0xe6050055), /* PORT85CR */
1477 PORTCR(86, 0xe6050056), /* PORT86CR */
1478 PORTCR(87, 0xe6050057), /* PORT87CR */
1479 PORTCR(88, 0xe6050058), /* PORT88CR */
1480 PORTCR(89, 0xe6050059), /* PORT89CR */
1481
1482 PORTCR(90, 0xe605005a), /* PORT90CR */
1483 PORTCR(91, 0xe605005b), /* PORT91CR */
1484 PORTCR(92, 0xe605005c), /* PORT92CR */
1485 PORTCR(93, 0xe605005d), /* PORT93CR */
1486 PORTCR(94, 0xe605005e), /* PORT94CR */
1487 PORTCR(95, 0xe605005f), /* PORT95CR */
1488 PORTCR(96, 0xe6050060), /* PORT96CR */
1489 PORTCR(97, 0xe6050061), /* PORT97CR */
1490 PORTCR(98, 0xe6050062), /* PORT98CR */
1491 PORTCR(99, 0xe6050063), /* PORT99CR */
1492
1493 PORTCR(100, 0xe6050064), /* PORT100CR */
1494 PORTCR(101, 0xe6050065), /* PORT101CR */
1495 PORTCR(102, 0xe6050066), /* PORT102CR */
1496 PORTCR(103, 0xe6050067), /* PORT103CR */
1497 PORTCR(104, 0xe6050068), /* PORT104CR */
1498 PORTCR(105, 0xe6050069), /* PORT105CR */
1499 PORTCR(106, 0xe605006a), /* PORT106CR */
1500 PORTCR(107, 0xe605006b), /* PORT107CR */
1501 PORTCR(108, 0xe605006c), /* PORT108CR */
1502 PORTCR(109, 0xe605006d), /* PORT109CR */
1503
1504 PORTCR(110, 0xe605006e), /* PORT110CR */
1505 PORTCR(111, 0xe605006f), /* PORT111CR */
1506 PORTCR(112, 0xe6050070), /* PORT112CR */
1507 PORTCR(113, 0xe6050071), /* PORT113CR */
1508 PORTCR(114, 0xe6050072), /* PORT114CR */
1509 PORTCR(115, 0xe6050073), /* PORT115CR */
1510 PORTCR(116, 0xe6050074), /* PORT116CR */
1511 PORTCR(117, 0xe6050075), /* PORT117CR */
1512 PORTCR(118, 0xe6050076), /* PORT118CR */
1513
1514 PORTCR(128, 0xe6051080), /* PORT128CR */
1515 PORTCR(129, 0xe6051081), /* PORT129CR */
1516
1517 PORTCR(130, 0xe6051082), /* PORT130CR */
1518 PORTCR(131, 0xe6051083), /* PORT131CR */
1519 PORTCR(132, 0xe6051084), /* PORT132CR */
1520 PORTCR(133, 0xe6051085), /* PORT133CR */
1521 PORTCR(134, 0xe6051086), /* PORT134CR */
1522 PORTCR(135, 0xe6051087), /* PORT135CR */
1523 PORTCR(136, 0xe6051088), /* PORT136CR */
1524 PORTCR(137, 0xe6051089), /* PORT137CR */
1525 PORTCR(138, 0xe605108a), /* PORT138CR */
1526 PORTCR(139, 0xe605108b), /* PORT139CR */
1527
1528 PORTCR(140, 0xe605108c), /* PORT140CR */
1529 PORTCR(141, 0xe605108d), /* PORT141CR */
1530 PORTCR(142, 0xe605108e), /* PORT142CR */
1531 PORTCR(143, 0xe605108f), /* PORT143CR */
1532 PORTCR(144, 0xe6051090), /* PORT144CR */
1533 PORTCR(145, 0xe6051091), /* PORT145CR */
1534 PORTCR(146, 0xe6051092), /* PORT146CR */
1535 PORTCR(147, 0xe6051093), /* PORT147CR */
1536 PORTCR(148, 0xe6051094), /* PORT148CR */
1537 PORTCR(149, 0xe6051095), /* PORT149CR */
1538
1539 PORTCR(150, 0xe6051096), /* PORT150CR */
1540 PORTCR(151, 0xe6051097), /* PORT151CR */
1541 PORTCR(152, 0xe6051098), /* PORT152CR */
1542 PORTCR(153, 0xe6051099), /* PORT153CR */
1543 PORTCR(154, 0xe605109a), /* PORT154CR */
1544 PORTCR(155, 0xe605109b), /* PORT155CR */
1545 PORTCR(156, 0xe605109c), /* PORT156CR */
1546 PORTCR(157, 0xe605109d), /* PORT157CR */
1547 PORTCR(158, 0xe605109e), /* PORT158CR */
1548 PORTCR(159, 0xe605109f), /* PORT159CR */
1549
1550 PORTCR(160, 0xe60510a0), /* PORT160CR */
1551 PORTCR(161, 0xe60510a1), /* PORT161CR */
1552 PORTCR(162, 0xe60510a2), /* PORT162CR */
1553 PORTCR(163, 0xe60510a3), /* PORT163CR */
1554 PORTCR(164, 0xe60510a4), /* PORT164CR */
1555
1556 PORTCR(192, 0xe60520c0), /* PORT192CR */
1557 PORTCR(193, 0xe60520c1), /* PORT193CR */
1558 PORTCR(194, 0xe60520c2), /* PORT194CR */
1559 PORTCR(195, 0xe60520c3), /* PORT195CR */
1560 PORTCR(196, 0xe60520c4), /* PORT196CR */
1561 PORTCR(197, 0xe60520c5), /* PORT197CR */
1562 PORTCR(198, 0xe60520c6), /* PORT198CR */
1563 PORTCR(199, 0xe60520c7), /* PORT199CR */
1564
1565 PORTCR(200, 0xe60520c8), /* PORT200CR */
1566 PORTCR(201, 0xe60520c9), /* PORT201CR */
1567 PORTCR(202, 0xe60520ca), /* PORT202CR */
1568 PORTCR(203, 0xe60520cb), /* PORT203CR */
1569 PORTCR(204, 0xe60520cc), /* PORT204CR */
1570 PORTCR(205, 0xe60520cd), /* PORT205CR */
1571 PORTCR(206, 0xe60520ce), /* PORT206CR */
1572 PORTCR(207, 0xe60520cf), /* PORT207CR */
1573 PORTCR(208, 0xe60520d0), /* PORT208CR */
1574 PORTCR(209, 0xe60520d1), /* PORT209CR */
1575
1576 PORTCR(210, 0xe60520d2), /* PORT210CR */
1577 PORTCR(211, 0xe60520d3), /* PORT211CR */
1578 PORTCR(212, 0xe60520d4), /* PORT212CR */
1579 PORTCR(213, 0xe60520d5), /* PORT213CR */
1580 PORTCR(214, 0xe60520d6), /* PORT214CR */
1581 PORTCR(215, 0xe60520d7), /* PORT215CR */
1582 PORTCR(216, 0xe60520d8), /* PORT216CR */
1583 PORTCR(217, 0xe60520d9), /* PORT217CR */
1584 PORTCR(218, 0xe60520da), /* PORT218CR */
1585 PORTCR(219, 0xe60520db), /* PORT219CR */
1586
1587 PORTCR(220, 0xe60520dc), /* PORT220CR */
1588 PORTCR(221, 0xe60520dd), /* PORT221CR */
1589 PORTCR(222, 0xe60520de), /* PORT222CR */
1590 PORTCR(223, 0xe60520df), /* PORT223CR */
1591 PORTCR(224, 0xe60520e0), /* PORT224CR */
1592 PORTCR(225, 0xe60520e1), /* PORT225CR */
1593 PORTCR(226, 0xe60520e2), /* PORT226CR */
1594 PORTCR(227, 0xe60520e3), /* PORT227CR */
1595 PORTCR(228, 0xe60520e4), /* PORT228CR */
1596 PORTCR(229, 0xe60520e5), /* PORT229CR */
1597
1598 PORTCR(230, 0xe60520e6), /* PORT230CR */
1599 PORTCR(231, 0xe60520e7), /* PORT231CR */
1600 PORTCR(232, 0xe60520e8), /* PORT232CR */
1601 PORTCR(233, 0xe60520e9), /* PORT233CR */
1602 PORTCR(234, 0xe60520ea), /* PORT234CR */
1603 PORTCR(235, 0xe60520eb), /* PORT235CR */
1604 PORTCR(236, 0xe60520ec), /* PORT236CR */
1605 PORTCR(237, 0xe60520ed), /* PORT237CR */
1606 PORTCR(238, 0xe60520ee), /* PORT238CR */
1607 PORTCR(239, 0xe60520ef), /* PORT239CR */
1608
1609 PORTCR(240, 0xe60520f0), /* PORT240CR */
1610 PORTCR(241, 0xe60520f1), /* PORT241CR */
1611 PORTCR(242, 0xe60520f2), /* PORT242CR */
1612 PORTCR(243, 0xe60520f3), /* PORT243CR */
1613 PORTCR(244, 0xe60520f4), /* PORT244CR */
1614 PORTCR(245, 0xe60520f5), /* PORT245CR */
1615 PORTCR(246, 0xe60520f6), /* PORT246CR */
1616 PORTCR(247, 0xe60520f7), /* PORT247CR */
1617 PORTCR(248, 0xe60520f8), /* PORT248CR */
1618 PORTCR(249, 0xe60520f9), /* PORT249CR */
1619
1620 PORTCR(250, 0xe60520fa), /* PORT250CR */
1621 PORTCR(251, 0xe60520fb), /* PORT251CR */
1622 PORTCR(252, 0xe60520fc), /* PORT252CR */
1623 PORTCR(253, 0xe60520fd), /* PORT253CR */
1624 PORTCR(254, 0xe60520fe), /* PORT254CR */
1625 PORTCR(255, 0xe60520ff), /* PORT255CR */
1626 PORTCR(256, 0xe6052100), /* PORT256CR */
1627 PORTCR(257, 0xe6052101), /* PORT257CR */
1628 PORTCR(258, 0xe6052102), /* PORT258CR */
1629 PORTCR(259, 0xe6052103), /* PORT259CR */
1630
1631 PORTCR(260, 0xe6052104), /* PORT260CR */
1632 PORTCR(261, 0xe6052105), /* PORT261CR */
1633 PORTCR(262, 0xe6052106), /* PORT262CR */
1634 PORTCR(263, 0xe6052107), /* PORT263CR */
1635 PORTCR(264, 0xe6052108), /* PORT264CR */
1636
1637 { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
1638 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1639 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1640 MSELBCR_MSEL17_0, MSELBCR_MSEL17_1,
1641 MSELBCR_MSEL16_0, MSELBCR_MSEL16_1,
1642 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1643 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1644 },
1645 { },
1646};
1647
1648static struct pinmux_data_reg pinmux_data_regs[] = {
1649 { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
1650 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
1651 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
1652 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
1653 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
1654 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
1655 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
1656 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
1657 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
1658 },
1659 { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
1660 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
1661 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
1662 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
1663 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
1664 PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
1665 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
1666 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
1667 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
1668 },
1669 { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
1670 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
1671 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
1672 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
1673 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
1674 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
1675 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
1676 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
1677 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
1678 },
1679 { PINMUX_DATA_REG("PORTD127_096DR", 0xe605400C, 32) {
1680 0, 0, 0, 0,
1681 0, 0, 0, 0,
1682 0, PORT118_DATA, PORT117_DATA, PORT116_DATA,
1683 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
1684 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
1685 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
1686 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
1687 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
1688 },
1689 { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055000, 32) {
1690 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
1691 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
1692 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
1693 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
1694 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
1695 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
1696 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
1697 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
1698 },
1699 { PINMUX_DATA_REG("PORTR191_160DR", 0xe6055004, 32) {
1700 0, 0, 0, 0,
1701 0, 0, 0, 0,
1702 0, 0, 0, 0,
1703 0, 0, 0, 0,
1704 0, 0, 0, 0,
1705 0, 0, 0, 0,
1706 0, 0, 0, PORT164_DATA,
1707 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
1708 },
1709 { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056000, 32) {
1710 PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
1711 PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
1712 PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
1713 PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
1714 PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
1715 PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
1716 PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
1717 PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
1718 },
1719 { PINMUX_DATA_REG("PORTU255_224DR", 0xe6056004, 32) {
1720 PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
1721 PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
1722 PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
1723 PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
1724 PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
1725 PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
1726 PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
1727 PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
1728 },
1729 { PINMUX_DATA_REG("PORTU287_256DR", 0xe6056008, 32) {
1730 0, 0, 0, 0,
1731 0, 0, 0, 0,
1732 0, 0, 0, 0,
1733 0, 0, 0, 0,
1734 0, 0, 0, 0,
1735 0, 0, 0, PORT264_DATA,
1736 PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
1737 PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
1738 },
1739 { },
1740};
1741
1742static struct pinmux_info sh7377_pinmux_info = {
1743 .name = "sh7377_pfc",
1744 .reserved_id = PINMUX_RESERVED,
1745 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1746 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1747 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1748 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1749 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1750 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1751 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1752
1753 .first_gpio = GPIO_PORT0,
1754 .last_gpio = GPIO_FN_RESETOUTS,
1755
1756 .gpios = pinmux_gpios,
1757 .cfg_regs = pinmux_config_regs,
1758 .data_regs = pinmux_data_regs,
1759
1760 .gpio_data = pinmux_data,
1761 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1762};
1763
1764void sh7377_pinmux_init(void)
1765{
1766 register_pinmux(&sh7377_pinmux_info);
1767}
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
new file mode 100644
index 000000000000..eca90716140e
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -0,0 +1,198 @@
1/*
2 * sh7367 processor support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/input.h>
27#include <linux/io.h>
28#include <linux/serial_sci.h>
29#include <linux/sh_timer.h>
30#include <mach/hardware.h>
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33
34static struct plat_sci_port scif0_platform_data = {
35 .mapbase = 0xe6c40000,
36 .flags = UPF_BOOT_AUTOCONF,
37 .type = PORT_SCIF,
38 .irqs = { 80, 80, 80, 80 },
39};
40
41static struct platform_device scif0_device = {
42 .name = "sh-sci",
43 .id = 0,
44 .dev = {
45 .platform_data = &scif0_platform_data,
46 },
47};
48
49static struct plat_sci_port scif1_platform_data = {
50 .mapbase = 0xe6c50000,
51 .flags = UPF_BOOT_AUTOCONF,
52 .type = PORT_SCIF,
53 .irqs = { 81, 81, 81, 81 },
54};
55
56static struct platform_device scif1_device = {
57 .name = "sh-sci",
58 .id = 1,
59 .dev = {
60 .platform_data = &scif1_platform_data,
61 },
62};
63
64static struct plat_sci_port scif2_platform_data = {
65 .mapbase = 0xe6c60000,
66 .flags = UPF_BOOT_AUTOCONF,
67 .type = PORT_SCIF,
68 .irqs = { 82, 82, 82, 82 },
69};
70
71static struct platform_device scif2_device = {
72 .name = "sh-sci",
73 .id = 2,
74 .dev = {
75 .platform_data = &scif2_platform_data,
76 },
77};
78
79static struct plat_sci_port scif3_platform_data = {
80 .mapbase = 0xe6c70000,
81 .flags = UPF_BOOT_AUTOCONF,
82 .type = PORT_SCIF,
83 .irqs = { 83, 83, 83, 83 },
84};
85
86static struct platform_device scif3_device = {
87 .name = "sh-sci",
88 .id = 3,
89 .dev = {
90 .platform_data = &scif3_platform_data,
91 },
92};
93
94static struct plat_sci_port scif4_platform_data = {
95 .mapbase = 0xe6c80000,
96 .flags = UPF_BOOT_AUTOCONF,
97 .type = PORT_SCIF,
98 .irqs = { 89, 89, 89, 89 },
99};
100
101static struct platform_device scif4_device = {
102 .name = "sh-sci",
103 .id = 4,
104 .dev = {
105 .platform_data = &scif4_platform_data,
106 },
107};
108
109static struct plat_sci_port scif5_platform_data = {
110 .mapbase = 0xe6cb0000,
111 .flags = UPF_BOOT_AUTOCONF,
112 .type = PORT_SCIF,
113 .irqs = { 90, 90, 90, 90 },
114};
115
116static struct platform_device scif5_device = {
117 .name = "sh-sci",
118 .id = 5,
119 .dev = {
120 .platform_data = &scif5_platform_data,
121 },
122};
123
124static struct plat_sci_port scif6_platform_data = {
125 .mapbase = 0xe6c30000,
126 .flags = UPF_BOOT_AUTOCONF,
127 .type = PORT_SCIF,
128 .irqs = { 91, 91, 91, 91 },
129};
130
131static struct platform_device scif6_device = {
132 .name = "sh-sci",
133 .id = 6,
134 .dev = {
135 .platform_data = &scif6_platform_data,
136 },
137};
138
139static struct sh_timer_config cmt10_platform_data = {
140 .name = "CMT10",
141 .channel_offset = 0x10,
142 .timer_bit = 0,
143 .clk = "r_clk",
144 .clockevent_rating = 125,
145 .clocksource_rating = 125,
146};
147
148static struct resource cmt10_resources[] = {
149 [0] = {
150 .name = "CMT10",
151 .start = 0xe6138010,
152 .end = 0xe613801b,
153 .flags = IORESOURCE_MEM,
154 },
155 [1] = {
156 .start = 72,
157 .flags = IORESOURCE_IRQ,
158 },
159};
160
161static struct platform_device cmt10_device = {
162 .name = "sh_cmt",
163 .id = 10,
164 .dev = {
165 .platform_data = &cmt10_platform_data,
166 },
167 .resource = cmt10_resources,
168 .num_resources = ARRAY_SIZE(cmt10_resources),
169};
170
171static struct platform_device *sh7367_early_devices[] __initdata = {
172 &scif0_device,
173 &scif1_device,
174 &scif2_device,
175 &scif3_device,
176 &scif4_device,
177 &scif5_device,
178 &scif6_device,
179 &cmt10_device,
180};
181
182void __init sh7367_add_standard_devices(void)
183{
184 platform_add_devices(sh7367_early_devices,
185 ARRAY_SIZE(sh7367_early_devices));
186}
187
188#define SYMSTPCR2 0xe6158048
189#define SYMSTPCR2_CMT1 (1 << 29)
190
191void __init sh7367_add_early_devices(void)
192{
193 /* enable clock to CMT1 */
194 __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
195
196 early_platform_add_devices(sh7367_early_devices,
197 ARRAY_SIZE(sh7367_early_devices));
198}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
new file mode 100644
index 000000000000..1d1153290f59
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -0,0 +1,199 @@
1/*
2 * sh7372 processor support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/input.h>
27#include <linux/io.h>
28#include <linux/serial_sci.h>
29#include <linux/sh_intc.h>
30#include <linux/sh_timer.h>
31#include <mach/hardware.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34
35static struct plat_sci_port scif0_platform_data = {
36 .mapbase = 0xe6c40000,
37 .flags = UPF_BOOT_AUTOCONF,
38 .type = PORT_SCIF,
39 .irqs = { 80, 80, 80, 80 },
40};
41
42static struct platform_device scif0_device = {
43 .name = "sh-sci",
44 .id = 0,
45 .dev = {
46 .platform_data = &scif0_platform_data,
47 },
48};
49
50static struct plat_sci_port scif1_platform_data = {
51 .mapbase = 0xe6c50000,
52 .flags = UPF_BOOT_AUTOCONF,
53 .type = PORT_SCIF,
54 .irqs = { 81, 81, 81, 81 },
55};
56
57static struct platform_device scif1_device = {
58 .name = "sh-sci",
59 .id = 1,
60 .dev = {
61 .platform_data = &scif1_platform_data,
62 },
63};
64
65static struct plat_sci_port scif2_platform_data = {
66 .mapbase = 0xe6c60000,
67 .flags = UPF_BOOT_AUTOCONF,
68 .type = PORT_SCIF,
69 .irqs = { 82, 82, 82, 82 },
70};
71
72static struct platform_device scif2_device = {
73 .name = "sh-sci",
74 .id = 2,
75 .dev = {
76 .platform_data = &scif2_platform_data,
77 },
78};
79
80static struct plat_sci_port scif3_platform_data = {
81 .mapbase = 0xe6c70000,
82 .flags = UPF_BOOT_AUTOCONF,
83 .type = PORT_SCIF,
84 .irqs = { 83, 83, 83, 83 },
85};
86
87static struct platform_device scif3_device = {
88 .name = "sh-sci",
89 .id = 3,
90 .dev = {
91 .platform_data = &scif3_platform_data,
92 },
93};
94
95static struct plat_sci_port scif4_platform_data = {
96 .mapbase = 0xe6c80000,
97 .flags = UPF_BOOT_AUTOCONF,
98 .type = PORT_SCIF,
99 .irqs = { 89, 89, 89, 89 },
100};
101
102static struct platform_device scif4_device = {
103 .name = "sh-sci",
104 .id = 4,
105 .dev = {
106 .platform_data = &scif4_platform_data,
107 },
108};
109
110static struct plat_sci_port scif5_platform_data = {
111 .mapbase = 0xe6cb0000,
112 .flags = UPF_BOOT_AUTOCONF,
113 .type = PORT_SCIF,
114 .irqs = { 90, 90, 90, 90 },
115};
116
117static struct platform_device scif5_device = {
118 .name = "sh-sci",
119 .id = 5,
120 .dev = {
121 .platform_data = &scif5_platform_data,
122 },
123};
124
125static struct plat_sci_port scif6_platform_data = {
126 .mapbase = 0xe6c30000,
127 .flags = UPF_BOOT_AUTOCONF,
128 .type = PORT_SCIF,
129 .irqs = { 91, 91, 91, 91 },
130};
131
132static struct platform_device scif6_device = {
133 .name = "sh-sci",
134 .id = 6,
135 .dev = {
136 .platform_data = &scif6_platform_data,
137 },
138};
139
140static struct sh_timer_config cmt10_platform_data = {
141 .name = "CMT10",
142 .channel_offset = 0x10,
143 .timer_bit = 0,
144 .clk = "r_clk",
145 .clockevent_rating = 125,
146 .clocksource_rating = 125,
147};
148
149static struct resource cmt10_resources[] = {
150 [0] = {
151 .name = "CMT10",
152 .start = 0xe6138010,
153 .end = 0xe613801b,
154 .flags = IORESOURCE_MEM,
155 },
156 [1] = {
157 .start = 72,
158 .flags = IORESOURCE_IRQ,
159 },
160};
161
162static struct platform_device cmt10_device = {
163 .name = "sh_cmt",
164 .id = 10,
165 .dev = {
166 .platform_data = &cmt10_platform_data,
167 },
168 .resource = cmt10_resources,
169 .num_resources = ARRAY_SIZE(cmt10_resources),
170};
171
172static struct platform_device *sh7372_early_devices[] __initdata = {
173 &scif0_device,
174 &scif1_device,
175 &scif2_device,
176 &scif3_device,
177 &scif4_device,
178 &scif5_device,
179 &scif6_device,
180 &cmt10_device,
181};
182
183void __init sh7372_add_standard_devices(void)
184{
185 platform_add_devices(sh7372_early_devices,
186 ARRAY_SIZE(sh7372_early_devices));
187}
188
189#define SMSTPCR3 0xe615013c
190#define SMSTPCR3_CMT1 (1 << 29)
191
192void __init sh7372_add_early_devices(void)
193{
194 /* enable clock to CMT1 */
195 __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
196
197 early_platform_add_devices(sh7372_early_devices,
198 ARRAY_SIZE(sh7372_early_devices));
199}
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
new file mode 100644
index 000000000000..60e37774c35c
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -0,0 +1,215 @@
1/*
2 * sh7377 processor support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/input.h>
27#include <linux/io.h>
28#include <linux/serial_sci.h>
29#include <linux/sh_intc.h>
30#include <linux/sh_timer.h>
31#include <mach/hardware.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34
35static struct plat_sci_port scif0_platform_data = {
36 .mapbase = 0xe6c40000,
37 .flags = UPF_BOOT_AUTOCONF,
38 .type = PORT_SCIF,
39 .irqs = { 80, 80, 80, 80 },
40};
41
42static struct platform_device scif0_device = {
43 .name = "sh-sci",
44 .id = 0,
45 .dev = {
46 .platform_data = &scif0_platform_data,
47 },
48};
49
50static struct plat_sci_port scif1_platform_data = {
51 .mapbase = 0xe6c50000,
52 .flags = UPF_BOOT_AUTOCONF,
53 .type = PORT_SCIF,
54 .irqs = { 81, 81, 81, 81 },
55};
56
57static struct platform_device scif1_device = {
58 .name = "sh-sci",
59 .id = 1,
60 .dev = {
61 .platform_data = &scif1_platform_data,
62 },
63};
64
65static struct plat_sci_port scif2_platform_data = {
66 .mapbase = 0xe6c60000,
67 .flags = UPF_BOOT_AUTOCONF,
68 .type = PORT_SCIF,
69 .irqs = { 82, 82, 82, 82 },
70};
71
72static struct platform_device scif2_device = {
73 .name = "sh-sci",
74 .id = 2,
75 .dev = {
76 .platform_data = &scif2_platform_data,
77 },
78};
79
80static struct plat_sci_port scif3_platform_data = {
81 .mapbase = 0xe6c70000,
82 .flags = UPF_BOOT_AUTOCONF,
83 .type = PORT_SCIF,
84 .irqs = { 83, 83, 83, 83 },
85};
86
87static struct platform_device scif3_device = {
88 .name = "sh-sci",
89 .id = 3,
90 .dev = {
91 .platform_data = &scif3_platform_data,
92 },
93};
94
95static struct plat_sci_port scif4_platform_data = {
96 .mapbase = 0xe6c80000,
97 .flags = UPF_BOOT_AUTOCONF,
98 .type = PORT_SCIF,
99 .irqs = { 89, 89, 89, 89 },
100};
101
102static struct platform_device scif4_device = {
103 .name = "sh-sci",
104 .id = 4,
105 .dev = {
106 .platform_data = &scif4_platform_data,
107 },
108};
109
110static struct plat_sci_port scif5_platform_data = {
111 .mapbase = 0xe6cb0000,
112 .flags = UPF_BOOT_AUTOCONF,
113 .type = PORT_SCIF,
114 .irqs = { 90, 90, 90, 90 },
115};
116
117static struct platform_device scif5_device = {
118 .name = "sh-sci",
119 .id = 5,
120 .dev = {
121 .platform_data = &scif5_platform_data,
122 },
123};
124
125static struct plat_sci_port scif6_platform_data = {
126 .mapbase = 0xe6cc0000,
127 .flags = UPF_BOOT_AUTOCONF,
128 .type = PORT_SCIF,
129 .irqs = { 196, 196, 196, 196 },
130};
131
132static struct platform_device scif6_device = {
133 .name = "sh-sci",
134 .id = 6,
135 .dev = {
136 .platform_data = &scif6_platform_data,
137 },
138};
139
140static struct plat_sci_port scif7_platform_data = {
141 .mapbase = 0xe6c30000,
142 .flags = UPF_BOOT_AUTOCONF,
143 .type = PORT_SCIF,
144 .irqs = { 91, 91, 91, 91 },
145};
146
147static struct platform_device scif7_device = {
148 .name = "sh-sci",
149 .id = 7,
150 .dev = {
151 .platform_data = &scif7_platform_data,
152 },
153};
154
155static struct sh_timer_config cmt10_platform_data = {
156 .name = "CMT10",
157 .channel_offset = 0x10,
158 .timer_bit = 0,
159 .clk = "r_clk",
160 .clockevent_rating = 125,
161 .clocksource_rating = 125,
162};
163
164static struct resource cmt10_resources[] = {
165 [0] = {
166 .name = "CMT10",
167 .start = 0xe6138010,
168 .end = 0xe613801b,
169 .flags = IORESOURCE_MEM,
170 },
171 [1] = {
172 .start = 72,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static struct platform_device cmt10_device = {
178 .name = "sh_cmt",
179 .id = 10,
180 .dev = {
181 .platform_data = &cmt10_platform_data,
182 },
183 .resource = cmt10_resources,
184 .num_resources = ARRAY_SIZE(cmt10_resources),
185};
186
187static struct platform_device *sh7377_early_devices[] __initdata = {
188 &scif0_device,
189 &scif1_device,
190 &scif2_device,
191 &scif3_device,
192 &scif4_device,
193 &scif5_device,
194 &scif6_device,
195 &scif7_device,
196 &cmt10_device,
197};
198
199void __init sh7377_add_standard_devices(void)
200{
201 platform_add_devices(sh7377_early_devices,
202 ARRAY_SIZE(sh7377_early_devices));
203}
204
205#define SMSTPCR3 0xe615013c
206#define SMSTPCR3_CMT1 (1 << 29)
207
208void __init sh7377_add_early_devices(void)
209{
210 /* enable clock to CMT1 */
211 __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
212
213 early_platform_add_devices(sh7377_early_devices,
214 ARRAY_SIZE(sh7377_early_devices));
215}
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
new file mode 100644
index 000000000000..895794b543cd
--- /dev/null
+++ b/arch/arm/mach-shmobile/timer.c
@@ -0,0 +1,46 @@
1/*
2 * SH-Mobile Timer
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2002 - 2009 Paul Mundt
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 */
21#include <linux/platform_device.h>
22#include <asm/mach/time.h>
23
24static void __init shmobile_late_time_init(void)
25{
26 /*
27 * Make sure all compiled-in early timers register themselves.
28 *
29 * Run probe() for two "earlytimer" devices, these will be the
30 * clockevents and clocksource devices respectively. In the event
31 * that only a clockevents device is available, we -ENODEV on the
32 * clocksource and the jiffies clocksource is used transparently
33 * instead. No error handling is necessary here.
34 */
35 early_platform_driver_register_all("earlytimer");
36 early_platform_driver_probe("earlytimer", 2, 0);
37}
38
39static void __init shmobile_timer_init(void)
40{
41 late_time_init = shmobile_late_time_init;
42}
43
44struct sys_timer shmobile_timer = {
45 .init = shmobile_timer_init,
46};
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 01b50313914c..5f34eb674d68 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -358,7 +358,7 @@ static struct resource ave_resources[] = {
358 /* 358 /*
359 * The AVE3e requires two regions of 256MB that it considers 359 * The AVE3e requires two regions of 256MB that it considers
360 * "invisible". The hardware will not be able to access these 360 * "invisible". The hardware will not be able to access these
361 * adresses, so they should never point to system RAM. 361 * addresses, so they should never point to system RAM.
362 */ 362 */
363 { 363 {
364 .name = "AVE3e Reserved 0", 364 .name = "AVE3e Reserved 0",
@@ -1596,7 +1596,7 @@ static void __init u300_init_check_chip(void)
1596/* 1596/*
1597 * Some devices and their resources require reserved physical memory from 1597 * Some devices and their resources require reserved physical memory from
1598 * the end of the available RAM. This function traverses the list of devices 1598 * the end of the available RAM. This function traverses the list of devices
1599 * and assigns actual adresses to these. 1599 * and assigns actual addresses to these.
1600 */ 1600 */
1601static void __init u300_assign_physmem(void) 1601static void __init u300_assign_physmem(void)
1602{ 1602{
diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S
index ca4a028c2661..92c12420256f 100644
--- a/arch/arm/mach-u300/include/mach/debug-macro.S
+++ b/arch/arm/mach-u300/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
11#include <mach/hardware.h> 11#include <mach/hardware.h>
12 12
13 .macro addruart, rx, tmp 13 .macro addruart, rx, tmp
14 /* If we move the adress using MMU, use this. */ 14 /* If we move the address using MMU, use this. */
15 mrc p15, 0, \rx, c1, c0 15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 16 tst \rx, #1 @ MMU enabled?
17 ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address 17 ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 6da650202dc7..04ea836969b3 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -68,12 +68,12 @@
68#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) 68#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
69#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) 69#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
70#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) 70#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
71#define U8500_CLKRST6_BASE (U8500_PER7_BASE + 0xf000) 71#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
72 72
73/* per5 base addressess */ 73/* per5 base addressess */
74#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) 74#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
75#define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000) 75#define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000)
76#define U8500_CLKRST5_BASE (U8500_PER7_BASE + 0x1f000) 76#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
77 77
78/* per4 base addressess */ 78/* per4 base addressess */
79#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000) 79#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000)
@@ -95,7 +95,7 @@
95#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) 95#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
96#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) 96#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
97#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000) 97#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000)
98#define U8500_CLKRST3_BASE (U8500_PER7_BASE + 0xf000) 98#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
99 99
100/* per2 base addressess */ 100/* per2 base addressess */
101#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) 101#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
@@ -123,7 +123,7 @@
123#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) 123#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
124#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000) 124#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000)
125#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000) 125#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000)
126#define U8500_CLKRST1_BASE (U8500_PER2_BASE + 0xf000) 126#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000)
127 127
128/* ST-Ericsson modified pl022 id */ 128/* ST-Ericsson modified pl022 id */
129#define SSP_PER_ID 0x01080022 129#define SSP_PER_ID 0x01080022
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
index 4d58ba164e25..f8730b60bd76 100644
--- a/arch/arm/mach-w90x900/cpu.h
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -57,3 +57,4 @@ extern struct platform_device nuc900_device_fmi;
57extern struct platform_device nuc900_device_kpi; 57extern struct platform_device nuc900_device_kpi;
58extern struct platform_device nuc900_device_rtc; 58extern struct platform_device nuc900_device_rtc;
59extern struct platform_device nuc900_device_ts; 59extern struct platform_device nuc900_device_ts;
60extern struct platform_device nuc900_device_lcd;
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index ec711f4b4019..48876122df91 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -34,6 +34,7 @@
34#include <mach/regs-serial.h> 34#include <mach/regs-serial.h>
35#include <mach/nuc900_spi.h> 35#include <mach/nuc900_spi.h>
36#include <mach/map.h> 36#include <mach/map.h>
37#include <mach/fb.h>
37 38
38#include "cpu.h" 39#include "cpu.h"
39 40
@@ -380,6 +381,47 @@ struct platform_device nuc900_device_kpi = {
380 .resource = nuc900_kpi_resource, 381 .resource = nuc900_kpi_resource,
381}; 382};
382 383
384#ifdef CONFIG_FB_NUC900
385
386static struct resource nuc900_lcd_resource[] = {
387 [0] = {
388 .start = W90X900_PA_LCD,
389 .end = W90X900_PA_LCD + W90X900_SZ_LCD - 1,
390 .flags = IORESOURCE_MEM,
391 },
392 [1] = {
393 .start = IRQ_LCD,
394 .end = IRQ_LCD,
395 .flags = IORESOURCE_IRQ,
396 }
397};
398
399static u64 nuc900_device_lcd_dmamask = -1;
400struct platform_device nuc900_device_lcd = {
401 .name = "nuc900-lcd",
402 .id = -1,
403 .num_resources = ARRAY_SIZE(nuc900_lcd_resource),
404 .resource = nuc900_lcd_resource,
405 .dev = {
406 .dma_mask = &nuc900_device_lcd_dmamask,
407 .coherent_dma_mask = -1,
408 }
409};
410
411void nuc900_fb_set_platdata(struct nuc900fb_mach_info *pd)
412{
413 struct nuc900fb_mach_info *npd;
414
415 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
416 if (npd) {
417 memcpy(npd, pd, sizeof(*npd));
418 nuc900_device_lcd.dev.platform_data = npd;
419 } else {
420 printk(KERN_ERR "no memory for LCD platform data\n");
421 }
422}
423#endif
424
383/*Here should be your evb resourse,such as LCD*/ 425/*Here should be your evb resourse,such as LCD*/
384 426
385static struct platform_device *nuc900_public_dev[] __initdata = { 427static struct platform_device *nuc900_public_dev[] __initdata = {
diff --git a/arch/arm/mach-w90x900/include/mach/fb.h b/arch/arm/mach-w90x900/include/mach/fb.h
new file mode 100644
index 000000000000..cec5ece765ed
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/fb.h
@@ -0,0 +1,83 @@
1/* linux/include/asm/arch-nuc900/fb.h
2 *
3 * Copyright (c) 2008 Nuvoton technology corporation
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * Changelog:
12 *
13 * 2008/08/26 vincen.zswan modify this file for LCD.
14 */
15
16#ifndef __ASM_ARM_FB_H
17#define __ASM_ARM_FB_H
18
19
20
21/* LCD Controller Hardware Desc */
22struct nuc900fb_hw {
23 unsigned int lcd_dccs;
24 unsigned int lcd_device_ctrl;
25 unsigned int lcd_mpulcd_cmd;
26 unsigned int lcd_int_cs;
27 unsigned int lcd_crtc_size;
28 unsigned int lcd_crtc_dend;
29 unsigned int lcd_crtc_hr;
30 unsigned int lcd_crtc_hsync;
31 unsigned int lcd_crtc_vr;
32 unsigned int lcd_va_baddr0;
33 unsigned int lcd_va_baddr1;
34 unsigned int lcd_va_fbctrl;
35 unsigned int lcd_va_scale;
36 unsigned int lcd_va_test;
37 unsigned int lcd_va_win;
38 unsigned int lcd_va_stuff;
39};
40
41/* LCD Display Description */
42struct nuc900fb_display {
43 /* LCD Image type */
44 unsigned type;
45
46 /* LCD Screen Size */
47 unsigned short width;
48 unsigned short height;
49
50 /* LCD Screen Info */
51 unsigned short xres;
52 unsigned short yres;
53 unsigned short bpp;
54
55 unsigned long pixclock;
56 unsigned short left_margin;
57 unsigned short right_margin;
58 unsigned short hsync_len;
59 unsigned short upper_margin;
60 unsigned short lower_margin;
61 unsigned short vsync_len;
62
63 /* hardware special register value */
64 unsigned int dccs;
65 unsigned int devctl;
66 unsigned int fbctrl;
67 unsigned int scale;
68};
69
70struct nuc900fb_mach_info {
71 struct nuc900fb_display *displays;
72 unsigned num_displays;
73 unsigned default_display;
74 /* GPIO Setting Info */
75 unsigned gpio_dir;
76 unsigned gpio_dir_mask;
77 unsigned gpio_data;
78 unsigned gpio_data_mask;
79};
80
81extern void __init nuc900_fb_set_platdata(struct nuc900fb_mach_info *);
82
83#endif /* __ASM_ARM_FB_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-ldm.h b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
new file mode 100644
index 000000000000..e9d480a5b232
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
@@ -0,0 +1,253 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/regs-serial.h
3 *
4 * Copyright (c) 2009 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * Description:
13 * Nuvoton Display, LCM Register list
14 * Author: Wang Qiang (rurality.linux@gmail.com) 2009/12/11
15 *
16 */
17
18
19#ifndef __ASM_ARM_W90X900_REGS_LDM_H
20#define __ASM_ARM_W90X900_REGS_LDM_H
21
22#include <mach/map.h>
23
24/* Display Controller Control/Status Register */
25#define REG_LCM_DCCS (0x00)
26
27#define LCM_DCCS_ENG_RST (1 << 0)
28#define LCM_DCCS_VA_EN (1 << 1)
29#define LCM_DCCS_OSD_EN (1 << 2)
30#define LCM_DCCS_DISP_OUT_EN (1 << 3)
31#define LCM_DCCS_DISP_INT_EN (1 << 4)
32#define LCM_DCCS_CMD_ON (1 << 5)
33#define LCM_DCCS_FIELD_INTR (1 << 6)
34#define LCM_DCCS_SINGLE (1 << 7)
35
36enum LCM_DCCS_VA_SRC {
37 LCM_DCCS_VA_SRC_YUV422 = (0 << 8),
38 LCM_DCCS_VA_SRC_YCBCR422 = (1 << 8),
39 LCM_DCCS_VA_SRC_RGB888 = (2 << 8),
40 LCM_DCCS_VA_SRC_RGB666 = (3 << 8),
41 LCM_DCCS_VA_SRC_RGB565 = (4 << 8),
42 LCM_DCCS_VA_SRC_RGB444LOW = (5 << 8),
43 LCM_DCCS_VA_SRC_RGB444HIGH = (7 << 8)
44};
45
46
47/* Display Device Control Register */
48#define REG_LCM_DEV_CTRL (0x04)
49
50enum LCM_DEV_CTRL_SWAP_YCbCr {
51 LCM_DEV_CTRL_SWAP_UYVY = (0 << 1),
52 LCM_DEV_CTRL_SWAP_YUYV = (1 << 1),
53 LCM_DEV_CTRL_SWAP_VYUY = (2 << 1),
54 LCM_DEV_CTRL_SWAP_YVYU = (3 << 1)
55};
56
57enum LCM_DEV_CTRL_RGB_SHIFT {
58 LCM_DEV_CTRL_RGB_SHIFT_NOT = (0 << 3),
59 LCM_DEV_CTRL_RGB_SHIFT_ONECYCLE = (1 << 3),
60 LCM_DEV_CTRL_RGB_SHIFT_TWOCYCLE = (2 << 3),
61 LCM_DEV_CTRL_RGB_SHIFT_NOT_DEF = (3 << 3)
62};
63
64enum LCM_DEV_CTRL_DEVICE {
65 LCM_DEV_CTRL_DEVICE_YUV422 = (0 << 5),
66 LCM_DEV_CTRL_DEVICE_YUV444 = (1 << 5),
67 LCM_DEV_CTRL_DEVICE_UNIPAC = (4 << 5),
68 LCM_DEV_CTRL_DEVICE_SEIKO_EPSON = (5 << 5),
69 LCM_DEV_CTRL_DEVICE_HIGH_COLOR = (6 << 5),
70 LCM_DEV_CTRL_DEVICE_MPU = (7 << 5)
71};
72
73#define LCM_DEV_CTRL_LCD_DDA (8)
74#define LCM_DEV_CTRL_YUV2CCIR (16)
75
76enum LCM_DEV_CTRL_LCD_SEL {
77 LCM_DEV_CTRL_LCD_SEL_RGB_GBR = (0 << 17),
78 LCM_DEV_CTRL_LCD_SEL_BGR_RBG = (1 << 17),
79 LCM_DEV_CTRL_LCD_SEL_GBR_RGB = (2 << 17),
80 LCM_DEV_CTRL_LCD_SEL_RBG_BGR = (3 << 17)
81};
82
83enum LCM_DEV_CTRL_FAL_D {
84 LCM_DEV_CTRL_FAL_D_FALLING = (0 << 19),
85 LCM_DEV_CTRL_FAL_D_RISING = (1 << 19),
86};
87
88enum LCM_DEV_CTRL_H_POL {
89 LCM_DEV_CTRL_H_POL_LOW = (0 << 20),
90 LCM_DEV_CTRL_H_POL_HIGH = (1 << 20),
91};
92
93enum LCM_DEV_CTRL_V_POL {
94 LCM_DEV_CTRL_V_POL_LOW = (0 << 21),
95 LCM_DEV_CTRL_V_POL_HIGH = (1 << 21),
96};
97
98enum LCM_DEV_CTRL_VR_LACE {
99 LCM_DEV_CTRL_VR_LACE_NINTERLACE = (0 << 22),
100 LCM_DEV_CTRL_VR_LACE_INTERLACE = (1 << 22),
101};
102
103enum LCM_DEV_CTRL_LACE {
104 LCM_DEV_CTRL_LACE_NINTERLACE = (0 << 23),
105 LCM_DEV_CTRL_LACE_INTERLACE = (1 << 23),
106};
107
108enum LCM_DEV_CTRL_RGB_SCALE {
109 LCM_DEV_CTRL_RGB_SCALE_4096 = (0 << 24),
110 LCM_DEV_CTRL_RGB_SCALE_65536 = (1 << 24),
111 LCM_DEV_CTRL_RGB_SCALE_262144 = (2 << 24),
112 LCM_DEV_CTRL_RGB_SCALE_16777216 = (3 << 24),
113};
114
115enum LCM_DEV_CTRL_DBWORD {
116 LCM_DEV_CTRL_DBWORD_HALFWORD = (0 << 26),
117 LCM_DEV_CTRL_DBWORD_FULLWORD = (1 << 26),
118};
119
120enum LCM_DEV_CTRL_MPU68 {
121 LCM_DEV_CTRL_MPU68_80_SERIES = (0 << 27),
122 LCM_DEV_CTRL_MPU68_68_SERIES = (1 << 27),
123};
124
125enum LCM_DEV_CTRL_DE_POL {
126 LCM_DEV_CTRL_DE_POL_HIGH = (0 << 28),
127 LCM_DEV_CTRL_DE_POL_LOW = (1 << 28),
128};
129
130#define LCM_DEV_CTRL_CMD16 (29)
131#define LCM_DEV_CTRL_CM16t18 (30)
132#define LCM_DEV_CTRL_CMD_LOW (31)
133
134/* MPU-Interface LCD Write Command */
135#define REG_LCM_MPU_CMD (0x08)
136
137/* Interrupt Control/Status Register */
138#define REG_LCM_INT_CS (0x0c)
139#define LCM_INT_CS_DISP_F_EN (1 << 0)
140#define LCM_INT_CS_UNDERRUN_EN (1 << 1)
141#define LCM_INT_CS_BUS_ERROR_INT (1 << 28)
142#define LCM_INT_CS_UNDERRUN_INT (1 << 29)
143#define LCM_INT_CS_DISP_F_STATUS (1 << 30)
144#define LCM_INT_CS_DISP_F_INT (1 << 31)
145
146/* CRTC Display Size Control Register */
147#define REG_LCM_CRTC_SIZE (0x10)
148#define LCM_CRTC_SIZE_VTTVAL(x) ((x) << 16)
149#define LCM_CRTC_SIZE_HTTVAL(x) ((x) << 0)
150
151/* CRTC Display Enable End */
152#define REG_LCM_CRTC_DEND (0x14)
153#define LCM_CRTC_DEND_VDENDVAL(x) ((x) << 16)
154#define LCM_CRTC_DEND_HDENDVAL(x) ((x) << 0)
155
156/* CRTC Internal Horizontal Retrace Control Register */
157#define REG_LCM_CRTC_HR (0x18)
158#define LCM_CRTC_HR_EVAL(x) ((x) << 16)
159#define LCM_CRTC_HR_SVAL(x) ((x) << 0)
160
161/* CRTC Horizontal Sync Control Register */
162#define REG_LCM_CRTC_HSYNC (0x1C)
163#define LCM_CRTC_HSYNC_SHIFTVAL(x) ((x) << 30)
164#define LCM_CRTC_HSYNC_EVAL(x) ((x) << 16)
165#define LCM_CRTC_HSYNC_SVAL(x) ((x) << 0)
166
167/* CRTC Internal Vertical Retrace Control Register */
168#define REG_LCM_CRTC_VR (0x20)
169#define LCM_CRTC_VR_EVAL(x) ((x) << 16)
170#define LCM_CRTC_VR_SVAL(x) ((x) << 0)
171
172/* Video Stream Frame Buffer-0 Starting Address */
173#define REG_LCM_VA_BADDR0 (0x24)
174
175/* Video Stream Frame Buffer-1 Starting Address */
176#define REG_LCM_VA_BADDR1 (0x28)
177
178/* Video Stream Frame Buffer Control Register */
179#define REG_LCM_VA_FBCTRL (0x2C)
180#define LCM_VA_FBCTRL_IO_REGION_HALF (1 << 28)
181#define LCM_VA_FBCTRL_FIELD_DUAL (1 << 29)
182#define LCM_VA_FBCTRL_START_BUF (1 << 30)
183#define LCM_VA_FBCTRL_DB_EN (1 << 31)
184
185/* Video Stream Scaling Control Register */
186#define REG_LCM_VA_SCALE (0x30)
187#define LCM_VA_SCALE_XCOPY_INTERPOLATION (0 << 15)
188#define LCM_VA_SCALE_XCOPY_DUPLICATION (1 << 15)
189
190/* Image Stream Active Window Coordinates */
191#define REG_LCM_VA_WIN (0x38)
192
193/* Image Stream Stuff Pixel */
194#define REG_LCM_VA_STUFF (0x3C)
195
196/* OSD Window Starting Coordinates */
197#define REG_LCM_OSD_WINS (0x40)
198
199/* OSD Window Ending Coordinates */
200#define REG_LCM_OSD_WINE (0x44)
201
202/* OSD Stream Frame Buffer Starting Address */
203#define REG_LCM_OSD_BADDR (0x48)
204
205/* OSD Stream Frame Buffer Control Register */
206#define REG_LCM_OSD_FBCTRL (0x4c)
207
208/* OSD Overlay Control Register */
209#define REG_LCM_OSD_OVERLAY (0x50)
210
211/* OSD Overlay Color-Key Pattern Register */
212#define REG_LCM_OSD_CKEY (0x54)
213
214/* OSD Overlay Color-Key Mask Register */
215#define REG_LCM_OSD_CMASK (0x58)
216
217/* OSD Window Skip1 Register */
218#define REG_LCM_OSD_SKIP1 (0x5C)
219
220/* OSD Window Skip2 Register */
221#define REG_LCM_OSD_SKIP2 (0x60)
222
223/* OSD horizontal up scaling control register */
224#define REG_LCM_OSD_SCALE (0x64)
225
226/* MPU Vsync control register */
227#define REG_LCM_MPU_VSYNC (0x68)
228
229/* Hardware cursor control Register */
230#define REG_LCM_HC_CTRL (0x6C)
231
232/* Hardware cursot tip point potison on va picture */
233#define REG_LCM_HC_POS (0x70)
234
235/* Hardware Cursor Window Buffer Control Register */
236#define REG_LCM_HC_WBCTRL (0x74)
237
238/* Hardware cursor memory base address register */
239#define REG_LCM_HC_BADDR (0x78)
240
241/* Hardware cursor color ram register mapped to bpp = 0 */
242#define REG_LCM_HC_COLOR0 (0x7C)
243
244/* Hardware cursor color ram register mapped to bpp = 1 */
245#define REG_LCM_HC_COLOR1 (0x80)
246
247/* Hardware cursor color ram register mapped to bpp = 2 */
248#define REG_LCM_HC_COLOR2 (0x84)
249
250/* Hardware cursor color ram register mapped to bpp = 3 */
251#define REG_LCM_HC_COLOR3 (0x88)
252
253#endif /* __ASM_ARM_W90X900_REGS_LDM_H */
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index cef903bcccd1..b3edc3cccf52 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -10,6 +10,8 @@
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation;version 2 of the License. 12 * published by the Free Software Foundation;version 2 of the License.
13 * history:
14 * Wang Qiang (rurality.linux@gmail.com) add LCD support
13 * 15 *
14 */ 16 */
15 17
@@ -18,9 +20,51 @@
18#include <asm/mach/map.h> 20#include <asm/mach/map.h>
19#include <asm/mach-types.h> 21#include <asm/mach-types.h>
20#include <mach/map.h> 22#include <mach/map.h>
23#include <mach/regs-ldm.h>
24#include <mach/fb.h>
21 25
22#include "nuc950.h" 26#include "nuc950.h"
23 27
28#ifdef CONFIG_FB_NUC900
29/* LCD Controller */
30static struct nuc900fb_display __initdata nuc950_lcd_info[] = {
31 /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
32 [0] = {
33 .type = LCM_DCCS_VA_SRC_RGB565,
34 .width = 320,
35 .height = 240,
36 .xres = 320,
37 .yres = 240,
38 .bpp = 16,
39 .pixclock = 200000,
40 .left_margin = 34,
41 .right_margin = 54,
42 .hsync_len = 10,
43 .upper_margin = 18,
44 .lower_margin = 4,
45 .vsync_len = 1,
46 .dccs = 0x8e00041a,
47 .devctl = 0x060800c0,
48 .fbctrl = 0x00a000a0,
49 .scale = 0x04000400,
50 },
51};
52
53static struct nuc900fb_mach_info nuc950_fb_info __initdata = {
54#if defined(CONFIG_GPM1040A0_320X240)
55 .displays = &nuc950_lcd_info[0],
56#else
57 .displays = nuc950_lcd_info,
58#endif
59 .num_displays = ARRAY_SIZE(nuc950_lcd_info),
60 .default_display = 0,
61 .gpio_dir = 0x00000004,
62 .gpio_dir_mask = 0xFFFFFFFD,
63 .gpio_data = 0x00000004,
64 .gpio_data_mask = 0xFFFFFFFD,
65};
66#endif
67
24static void __init nuc950evb_map_io(void) 68static void __init nuc950evb_map_io(void)
25{ 69{
26 nuc950_map_io(); 70 nuc950_map_io();
@@ -30,6 +74,9 @@ static void __init nuc950evb_map_io(void)
30static void __init nuc950evb_init(void) 74static void __init nuc950evb_init(void)
31{ 75{
32 nuc950_board_init(); 76 nuc950_board_init();
77#ifdef CONFIG_FB_NUC900
78 nuc900_fb_set_platdata(&nuc950_fb_info);
79#endif
33} 80}
34 81
35MACHINE_START(W90P950EVB, "W90P950EVB") 82MACHINE_START(W90P950EVB, "W90P950EVB")
diff --git a/arch/arm/mach-w90x900/nuc950.c b/arch/arm/mach-w90x900/nuc950.c
index 149508116d18..4d1f1ab044c4 100644
--- a/arch/arm/mach-w90x900/nuc950.c
+++ b/arch/arm/mach-w90x900/nuc950.c
@@ -18,6 +18,7 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21
21#include "cpu.h" 22#include "cpu.h"
22 23
23/* define specific CPU platform device */ 24/* define specific CPU platform device */
@@ -25,6 +26,9 @@
25static struct platform_device *nuc950_dev[] __initdata = { 26static struct platform_device *nuc950_dev[] __initdata = {
26 &nuc900_device_kpi, 27 &nuc900_device_kpi,
27 &nuc900_device_fmi, 28 &nuc900_device_fmi,
29#ifdef CONFIG_FB_NUC900
30 &nuc900_device_lcd,
31#endif
28}; 32};
29 33
30/* define specific CPU platform io map */ 34/* define specific CPU platform io map */
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 8b0a1ee039fa..7f7ad6f289bd 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -9,38 +9,43 @@ choice
9config ARCH_MX1 9config ARCH_MX1
10 bool "MX1-based" 10 bool "MX1-based"
11 select CPU_ARM920T 11 select CPU_ARM920T
12 select COMMON_CLKDEV 12 select IMX_HAVE_IOMUX_V1
13 help 13 help
14 This enables support for systems based on the Freescale i.MX1 family 14 This enables support for systems based on the Freescale i.MX1 family
15 15
16config ARCH_MX2 16config ARCH_MX2
17 bool "MX2-based" 17 bool "MX2-based"
18 select CPU_ARM926T 18 select CPU_ARM926T
19 select COMMON_CLKDEV 19 select IMX_HAVE_IOMUX_V1
20 help 20 help
21 This enables support for systems based on the Freescale i.MX2 family 21 This enables support for systems based on the Freescale i.MX2 family
22 22
23config ARCH_MX25 23config ARCH_MX25
24 bool "MX25-based" 24 bool "MX25-based"
25 select CPU_ARM926T 25 select CPU_ARM926T
26 select COMMON_CLKDEV 26 select ARCH_MXC_IOMUX_V3
27 select HAVE_FB_IMX
27 help 28 help
28 This enables support for systems based on the Freescale i.MX25 family 29 This enables support for systems based on the Freescale i.MX25 family
29 30
30config ARCH_MX3 31config ARCH_MX3
31 bool "MX3-based" 32 bool "MX3-based"
32 select CPU_V6 33 select CPU_V6
33 select COMMON_CLKDEV
34 help 34 help
35 This enables support for systems based on the Freescale i.MX3 family 35 This enables support for systems based on the Freescale i.MX3 family
36 36
37config ARCH_MXC91231 37config ARCH_MXC91231
38 bool "MXC91231-based" 38 bool "MXC91231-based"
39 select CPU_V6 39 select CPU_V6
40 select COMMON_CLKDEV
41 help 40 help
42 This enables support for systems based on the Freescale MXC91231 family 41 This enables support for systems based on the Freescale MXC91231 family
43 42
43config ARCH_MX5
44 bool "MX5-based"
45 select CPU_V7
46 help
47 This enables support for systems based on the Freescale i.MX51 family
48
44endchoice 49endchoice
45 50
46source "arch/arm/mach-mx1/Kconfig" 51source "arch/arm/mach-mx1/Kconfig"
@@ -48,12 +53,12 @@ source "arch/arm/mach-mx2/Kconfig"
48source "arch/arm/mach-mx3/Kconfig" 53source "arch/arm/mach-mx3/Kconfig"
49source "arch/arm/mach-mx25/Kconfig" 54source "arch/arm/mach-mx25/Kconfig"
50source "arch/arm/mach-mxc91231/Kconfig" 55source "arch/arm/mach-mxc91231/Kconfig"
56source "arch/arm/mach-mx5/Kconfig"
51 57
52endmenu 58endmenu
53 59
54config MXC_IRQ_PRIOR 60config MXC_IRQ_PRIOR
55 bool "Use IRQ priority" 61 bool "Use IRQ priority"
56 depends on ARCH_MXC
57 help 62 help
58 Select this if you want to use prioritized IRQ handling. 63 Select this if you want to use prioritized IRQ handling.
59 This feature prevents higher priority ISR to be interrupted 64 This feature prevents higher priority ISR to be interrupted
@@ -62,9 +67,16 @@ config MXC_IRQ_PRIOR
62 requirements for timing. 67 requirements for timing.
63 Say N here, unless you have a specialized requirement. 68 Say N here, unless you have a specialized requirement.
64 69
70config MXC_TZIC
71 bool "Enable TrustZone Interrupt Controller"
72 depends on ARCH_MX51
73 help
74 This will be automatically selected for all processors
75 containing this interrupt controller.
76 Say N here only if you are really sure.
77
65config MXC_PWM 78config MXC_PWM
66 tristate "Enable PWM driver" 79 tristate "Enable PWM driver"
67 depends on ARCH_MXC
68 select HAVE_PWM 80 select HAVE_PWM
69 help 81 help
70 Enable support for the i.MX PWM controller(s). 82 Enable support for the i.MX PWM controller(s).
@@ -74,7 +86,9 @@ config MXC_ULPI
74 86
75config ARCH_HAS_RNGA 87config ARCH_HAS_RNGA
76 bool 88 bool
77 depends on ARCH_MXC 89
90config IMX_HAVE_IOMUX_V1
91 bool
78 92
79config ARCH_MXC_IOMUX_V3 93config ARCH_MXC_IOMUX_V3
80 bool 94 bool
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 6cee38df58b2..895bc3c5e0c0 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,8 +5,12 @@
5# Common support 5# Common support
6obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o 6obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
7 7
8obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o 8# MX51 uses the TZIC interrupt controller, older platforms use AVIC (irq.o)
9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o 9obj-$(CONFIG_MXC_TZIC) += tzic.o
10
11obj-$(CONFIG_ARCH_MX1) += dma-mx1-mx2.o
12obj-$(CONFIG_ARCH_MX2) += dma-mx1-mx2.o
13obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
10obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o 14obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
11obj-$(CONFIG_MXC_PWM) += pwm.o 15obj-$(CONFIG_MXC_PWM) += pwm.o
12obj-$(CONFIG_USB_EHCI_MXC) += ehci.o 16obj-$(CONFIG_USB_EHCI_MXC) += ehci.o
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c
index da6387dcdf21..b62917ca3f95 100644
--- a/arch/arm/plat-mxc/audmux-v1.c
+++ b/arch/arm/plat-mxc/audmux-v1.c
@@ -50,8 +50,18 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
50 50
51static int mxc_audmux_v1_init(void) 51static int mxc_audmux_v1_init(void)
52{ 52{
53 if (cpu_is_mx27() || cpu_is_mx21()) 53#ifdef CONFIG_MACH_MX21
54 audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); 54 if (cpu_is_mx21())
55 audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR);
56 else
57#endif
58#ifdef CONFIG_MACH_MX27
59 if (cpu_is_mx27())
60 audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR);
61 else
62#endif
63 (void)0;
64
55 return 0; 65 return 0;
56} 66}
57 67
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
index b06954a84436..d983cd6c788c 100644
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ b/arch/arm/plat-mxc/audmux-v2.c
@@ -190,7 +190,10 @@ static int mxc_audmux_v2_init(void)
190{ 190{
191 int ret; 191 int ret;
192 192
193 if (cpu_is_mx35()) { 193 if (cpu_is_mx31())
194 audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR);
195
196 else if (cpu_is_mx35()) {
194 audmux_clk = clk_get(NULL, "audmux"); 197 audmux_clk = clk_get(NULL, "audmux");
195 if (IS_ERR(audmux_clk)) { 198 if (IS_ERR(audmux_clk)) {
196 ret = PTR_ERR(audmux_clk); 199 ret = PTR_ERR(audmux_clk);
@@ -198,11 +201,9 @@ static int mxc_audmux_v2_init(void)
198 ret); 201 ret);
199 return ret; 202 return ret;
200 } 203 }
204 audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR);
201 } 205 }
202 206
203 if (cpu_is_mx31() || cpu_is_mx35())
204 audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
205
206 audmux_debugfs_init(); 207 audmux_debugfs_init();
207 208
208 return 0; 209 return 0;
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
index 9e8fbd57495c..323ff8ccc877 100644
--- a/arch/arm/plat-mxc/clock.c
+++ b/arch/arm/plat-mxc/clock.c
@@ -56,6 +56,7 @@ static void __clk_disable(struct clk *clk)
56 __clk_disable(clk->parent); 56 __clk_disable(clk->parent);
57 __clk_disable(clk->secondary); 57 __clk_disable(clk->secondary);
58 58
59 WARN_ON(!clk->usecount);
59 if (!(--clk->usecount) && clk->disable) 60 if (!(--clk->usecount) && clk->disable)
60 clk->disable(clk); 61 clk->disable(clk);
61} 62}
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
index 9c1b3f9c4f4d..e16014b0d13c 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -128,6 +128,18 @@ struct imx_dma_channel {
128 int hw_chaining; 128 int hw_chaining;
129}; 129};
130 130
131static void __iomem *imx_dmav1_baseaddr;
132
133static void imx_dmav1_writel(unsigned val, unsigned offset)
134{
135 __raw_writel(val, imx_dmav1_baseaddr + offset);
136}
137
138static unsigned imx_dmav1_readl(unsigned offset)
139{
140 return __raw_readl(imx_dmav1_baseaddr + offset);
141}
142
131static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; 143static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
132 144
133static struct clk *dma_clk; 145static struct clk *dma_clk;
@@ -140,7 +152,6 @@ static int imx_dma_hw_chain(struct imx_dma_channel *imxdma)
140 return 0; 152 return 0;
141} 153}
142 154
143
144/* 155/*
145 * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation 156 * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
146 */ 157 */
@@ -160,17 +171,17 @@ static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
160 imxdma->resbytes -= now; 171 imxdma->resbytes -= now;
161 172
162 if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ) 173 if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
163 __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel)); 174 imx_dmav1_writel(sg->dma_address, DMA_DAR(channel));
164 else 175 else
165 __raw_writel(sg->dma_address, DMA_BASE + DMA_SAR(channel)); 176 imx_dmav1_writel(sg->dma_address, DMA_SAR(channel));
166 177
167 __raw_writel(now, DMA_BASE + DMA_CNTR(channel)); 178 imx_dmav1_writel(now, DMA_CNTR(channel));
168 179
169 pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, " 180 pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, "
170 "size 0x%08x\n", channel, 181 "size 0x%08x\n", channel,
171 __raw_readl(DMA_BASE + DMA_DAR(channel)), 182 imx_dmav1_readl(DMA_DAR(channel)),
172 __raw_readl(DMA_BASE + DMA_SAR(channel)), 183 imx_dmav1_readl(DMA_SAR(channel)),
173 __raw_readl(DMA_BASE + DMA_CNTR(channel))); 184 imx_dmav1_readl(DMA_CNTR(channel)));
174 185
175 return now; 186 return now;
176} 187}
@@ -218,27 +229,26 @@ imx_dma_setup_single(int channel, dma_addr_t dma_address,
218 channel, __func__, (unsigned int)dma_address, 229 channel, __func__, (unsigned int)dma_address,
219 dma_length, dev_addr); 230 dma_length, dev_addr);
220 231
221 __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel)); 232 imx_dmav1_writel(dev_addr, DMA_SAR(channel));
222 __raw_writel(dma_address, DMA_BASE + DMA_DAR(channel)); 233 imx_dmav1_writel(dma_address, DMA_DAR(channel));
223 __raw_writel(imxdma->ccr_from_device, 234 imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
224 DMA_BASE + DMA_CCR(channel));
225 } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) { 235 } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
226 pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d " 236 pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
227 "dev_addr=0x%08x for write\n", 237 "dev_addr=0x%08x for write\n",
228 channel, __func__, (unsigned int)dma_address, 238 channel, __func__, (unsigned int)dma_address,
229 dma_length, dev_addr); 239 dma_length, dev_addr);
230 240
231 __raw_writel(dma_address, DMA_BASE + DMA_SAR(channel)); 241 imx_dmav1_writel(dma_address, DMA_SAR(channel));
232 __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel)); 242 imx_dmav1_writel(dev_addr, DMA_DAR(channel));
233 __raw_writel(imxdma->ccr_to_device, 243 imx_dmav1_writel(imxdma->ccr_to_device,
234 DMA_BASE + DMA_CCR(channel)); 244 DMA_CCR(channel));
235 } else { 245 } else {
236 printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n", 246 printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
237 channel); 247 channel);
238 return -EINVAL; 248 return -EINVAL;
239 } 249 }
240 250
241 __raw_writel(dma_length, DMA_BASE + DMA_CNTR(channel)); 251 imx_dmav1_writel(dma_length, DMA_CNTR(channel));
242 252
243 return 0; 253 return 0;
244} 254}
@@ -316,17 +326,15 @@ imx_dma_setup_sg(int channel,
316 "dev_addr=0x%08x for read\n", 326 "dev_addr=0x%08x for read\n",
317 channel, __func__, sg, sgcount, dma_length, dev_addr); 327 channel, __func__, sg, sgcount, dma_length, dev_addr);
318 328
319 __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel)); 329 imx_dmav1_writel(dev_addr, DMA_SAR(channel));
320 __raw_writel(imxdma->ccr_from_device, 330 imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
321 DMA_BASE + DMA_CCR(channel));
322 } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) { 331 } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
323 pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d " 332 pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
324 "dev_addr=0x%08x for write\n", 333 "dev_addr=0x%08x for write\n",
325 channel, __func__, sg, sgcount, dma_length, dev_addr); 334 channel, __func__, sg, sgcount, dma_length, dev_addr);
326 335
327 __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel)); 336 imx_dmav1_writel(dev_addr, DMA_DAR(channel));
328 __raw_writel(imxdma->ccr_to_device, 337 imx_dmav1_writel(imxdma->ccr_to_device, DMA_CCR(channel));
329 DMA_BASE + DMA_CCR(channel));
330 } else { 338 } else {
331 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n", 339 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
332 channel); 340 channel);
@@ -360,7 +368,7 @@ imx_dma_config_channel(int channel, unsigned int config_port,
360 imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq; 368 imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq;
361 imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq; 369 imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq;
362 370
363 __raw_writel(dmareq, DMA_BASE + DMA_RSSR(channel)); 371 imx_dmav1_writel(dmareq, DMA_RSSR(channel));
364 372
365 return 0; 373 return 0;
366} 374}
@@ -368,7 +376,7 @@ EXPORT_SYMBOL(imx_dma_config_channel);
368 376
369void imx_dma_config_burstlen(int channel, unsigned int burstlen) 377void imx_dma_config_burstlen(int channel, unsigned int burstlen)
370{ 378{
371 __raw_writel(burstlen, DMA_BASE + DMA_BLR(channel)); 379 imx_dmav1_writel(burstlen, DMA_BLR(channel));
372} 380}
373EXPORT_SYMBOL(imx_dma_config_burstlen); 381EXPORT_SYMBOL(imx_dma_config_burstlen);
374 382
@@ -398,7 +406,7 @@ imx_dma_setup_handlers(int channel,
398 } 406 }
399 407
400 local_irq_save(flags); 408 local_irq_save(flags);
401 __raw_writel(1 << channel, DMA_BASE + DMA_DISR); 409 imx_dmav1_writel(1 << channel, DMA_DISR);
402 imxdma->irq_handler = irq_handler; 410 imxdma->irq_handler = irq_handler;
403 imxdma->err_handler = err_handler; 411 imxdma->err_handler = err_handler;
404 imxdma->data = data; 412 imxdma->data = data;
@@ -462,22 +470,21 @@ void imx_dma_enable(int channel)
462 470
463 local_irq_save(flags); 471 local_irq_save(flags);
464 472
465 __raw_writel(1 << channel, DMA_BASE + DMA_DISR); 473 imx_dmav1_writel(1 << channel, DMA_DISR);
466 __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) & ~(1 << channel), 474 imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) & ~(1 << channel), DMA_DIMR);
467 DMA_BASE + DMA_DIMR); 475 imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
468 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) | CCR_CEN | 476 CCR_ACRPT, DMA_CCR(channel));
469 CCR_ACRPT,
470 DMA_BASE + DMA_CCR(channel));
471 477
472#ifdef CONFIG_ARCH_MX2 478#ifdef CONFIG_ARCH_MX2
473 if (imxdma->sg && imx_dma_hw_chain(imxdma)) { 479 if ((cpu_is_mx21() || cpu_is_mx27()) &&
480 imxdma->sg && imx_dma_hw_chain(imxdma)) {
474 imxdma->sg = sg_next(imxdma->sg); 481 imxdma->sg = sg_next(imxdma->sg);
475 if (imxdma->sg) { 482 if (imxdma->sg) {
476 u32 tmp; 483 u32 tmp;
477 imx_dma_sg_next(channel, imxdma->sg); 484 imx_dma_sg_next(channel, imxdma->sg);
478 tmp = __raw_readl(DMA_BASE + DMA_CCR(channel)); 485 tmp = imx_dmav1_readl(DMA_CCR(channel));
479 __raw_writel(tmp | CCR_RPT | CCR_ACRPT, 486 imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT,
480 DMA_BASE + DMA_CCR(channel)); 487 DMA_CCR(channel));
481 } 488 }
482 } 489 }
483#endif 490#endif
@@ -502,11 +509,10 @@ void imx_dma_disable(int channel)
502 del_timer(&imxdma->watchdog); 509 del_timer(&imxdma->watchdog);
503 510
504 local_irq_save(flags); 511 local_irq_save(flags);
505 __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel), 512 imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) | (1 << channel), DMA_DIMR);
506 DMA_BASE + DMA_DIMR); 513 imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN,
507 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN, 514 DMA_CCR(channel));
508 DMA_BASE + DMA_CCR(channel)); 515 imx_dmav1_writel(1 << channel, DMA_DISR);
509 __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
510 imxdma->in_use = 0; 516 imxdma->in_use = 0;
511 local_irq_restore(flags); 517 local_irq_restore(flags);
512} 518}
@@ -517,7 +523,7 @@ static void imx_dma_watchdog(unsigned long chno)
517{ 523{
518 struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; 524 struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
519 525
520 __raw_writel(0, DMA_BASE + DMA_CCR(chno)); 526 imx_dmav1_writel(0, DMA_CCR(chno));
521 imxdma->in_use = 0; 527 imxdma->in_use = 0;
522 imxdma->sg = NULL; 528 imxdma->sg = NULL;
523 529
@@ -533,17 +539,17 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
533 unsigned int err_mask; 539 unsigned int err_mask;
534 int errcode; 540 int errcode;
535 541
536 disr = __raw_readl(DMA_BASE + DMA_DISR); 542 disr = imx_dmav1_readl(DMA_DISR);
537 543
538 err_mask = __raw_readl(DMA_BASE + DMA_DBTOSR) | 544 err_mask = imx_dmav1_readl(DMA_DBTOSR) |
539 __raw_readl(DMA_BASE + DMA_DRTOSR) | 545 imx_dmav1_readl(DMA_DRTOSR) |
540 __raw_readl(DMA_BASE + DMA_DSESR) | 546 imx_dmav1_readl(DMA_DSESR) |
541 __raw_readl(DMA_BASE + DMA_DBOSR); 547 imx_dmav1_readl(DMA_DBOSR);
542 548
543 if (!err_mask) 549 if (!err_mask)
544 return IRQ_HANDLED; 550 return IRQ_HANDLED;
545 551
546 __raw_writel(disr & err_mask, DMA_BASE + DMA_DISR); 552 imx_dmav1_writel(disr & err_mask, DMA_DISR);
547 553
548 for (i = 0; i < IMX_DMA_CHANNELS; i++) { 554 for (i = 0; i < IMX_DMA_CHANNELS; i++) {
549 if (!(err_mask & (1 << i))) 555 if (!(err_mask & (1 << i)))
@@ -551,20 +557,20 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
551 imxdma = &imx_dma_channels[i]; 557 imxdma = &imx_dma_channels[i];
552 errcode = 0; 558 errcode = 0;
553 559
554 if (__raw_readl(DMA_BASE + DMA_DBTOSR) & (1 << i)) { 560 if (imx_dmav1_readl(DMA_DBTOSR) & (1 << i)) {
555 __raw_writel(1 << i, DMA_BASE + DMA_DBTOSR); 561 imx_dmav1_writel(1 << i, DMA_DBTOSR);
556 errcode |= IMX_DMA_ERR_BURST; 562 errcode |= IMX_DMA_ERR_BURST;
557 } 563 }
558 if (__raw_readl(DMA_BASE + DMA_DRTOSR) & (1 << i)) { 564 if (imx_dmav1_readl(DMA_DRTOSR) & (1 << i)) {
559 __raw_writel(1 << i, DMA_BASE + DMA_DRTOSR); 565 imx_dmav1_writel(1 << i, DMA_DRTOSR);
560 errcode |= IMX_DMA_ERR_REQUEST; 566 errcode |= IMX_DMA_ERR_REQUEST;
561 } 567 }
562 if (__raw_readl(DMA_BASE + DMA_DSESR) & (1 << i)) { 568 if (imx_dmav1_readl(DMA_DSESR) & (1 << i)) {
563 __raw_writel(1 << i, DMA_BASE + DMA_DSESR); 569 imx_dmav1_writel(1 << i, DMA_DSESR);
564 errcode |= IMX_DMA_ERR_TRANSFER; 570 errcode |= IMX_DMA_ERR_TRANSFER;
565 } 571 }
566 if (__raw_readl(DMA_BASE + DMA_DBOSR) & (1 << i)) { 572 if (imx_dmav1_readl(DMA_DBOSR) & (1 << i)) {
567 __raw_writel(1 << i, DMA_BASE + DMA_DBOSR); 573 imx_dmav1_writel(1 << i, DMA_DBOSR);
568 errcode |= IMX_DMA_ERR_BUFFER; 574 errcode |= IMX_DMA_ERR_BUFFER;
569 } 575 }
570 if (imxdma->name && imxdma->err_handler) { 576 if (imxdma->name && imxdma->err_handler) {
@@ -607,7 +613,7 @@ static void dma_irq_handle_channel(int chno)
607 if (imxdma->sg) { 613 if (imxdma->sg) {
608 imx_dma_sg_next(chno, imxdma->sg); 614 imx_dma_sg_next(chno, imxdma->sg);
609 615
610 tmp = __raw_readl(DMA_BASE + DMA_CCR(chno)); 616 tmp = imx_dmav1_readl(DMA_CCR(chno));
611 617
612 if (imx_dma_hw_chain(imxdma)) { 618 if (imx_dma_hw_chain(imxdma)) {
613 /* FIXME: The timeout should probably be 619 /* FIXME: The timeout should probably be
@@ -617,15 +623,13 @@ static void dma_irq_handle_channel(int chno)
617 jiffies + msecs_to_jiffies(500)); 623 jiffies + msecs_to_jiffies(500));
618 624
619 tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT; 625 tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT;
620 __raw_writel(tmp, DMA_BASE + 626 imx_dmav1_writel(tmp, DMA_CCR(chno));
621 DMA_CCR(chno));
622 } else { 627 } else {
623 __raw_writel(tmp & ~CCR_CEN, DMA_BASE + 628 imx_dmav1_writel(tmp & ~CCR_CEN, DMA_CCR(chno));
624 DMA_CCR(chno));
625 tmp |= CCR_CEN; 629 tmp |= CCR_CEN;
626 } 630 }
627 631
628 __raw_writel(tmp, DMA_BASE + DMA_CCR(chno)); 632 imx_dmav1_writel(tmp, DMA_CCR(chno));
629 633
630 if (imxdma->prog_handler) 634 if (imxdma->prog_handler)
631 imxdma->prog_handler(chno, imxdma->data, 635 imxdma->prog_handler(chno, imxdma->data,
@@ -640,7 +644,7 @@ static void dma_irq_handle_channel(int chno)
640 } 644 }
641 } 645 }
642 646
643 __raw_writel(0, DMA_BASE + DMA_CCR(chno)); 647 imx_dmav1_writel(0, DMA_CCR(chno));
644 imxdma->in_use = 0; 648 imxdma->in_use = 0;
645 if (imxdma->irq_handler) 649 if (imxdma->irq_handler)
646 imxdma->irq_handler(chno, imxdma->data); 650 imxdma->irq_handler(chno, imxdma->data);
@@ -651,15 +655,16 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
651 int i, disr; 655 int i, disr;
652 656
653#ifdef CONFIG_ARCH_MX2 657#ifdef CONFIG_ARCH_MX2
654 dma_err_handler(irq, dev_id); 658 if (cpu_is_mx21() || cpu_is_mx27())
659 dma_err_handler(irq, dev_id);
655#endif 660#endif
656 661
657 disr = __raw_readl(DMA_BASE + DMA_DISR); 662 disr = imx_dmav1_readl(DMA_DISR);
658 663
659 pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n", 664 pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
660 disr); 665 disr);
661 666
662 __raw_writel(disr, DMA_BASE + DMA_DISR); 667 imx_dmav1_writel(disr, DMA_DISR);
663 for (i = 0; i < IMX_DMA_CHANNELS; i++) { 668 for (i = 0; i < IMX_DMA_CHANNELS; i++) {
664 if (disr & (1 << i)) 669 if (disr & (1 << i))
665 dma_irq_handle_channel(i); 670 dma_irq_handle_channel(i);
@@ -699,17 +704,19 @@ int imx_dma_request(int channel, const char *name)
699 local_irq_restore(flags); /* request_irq() can block */ 704 local_irq_restore(flags); /* request_irq() can block */
700 705
701#ifdef CONFIG_ARCH_MX2 706#ifdef CONFIG_ARCH_MX2
702 ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA", 707 if (cpu_is_mx21() || cpu_is_mx27()) {
703 NULL); 708 ret = request_irq(MX2x_INT_DMACH0 + channel,
704 if (ret) { 709 dma_irq_handler, 0, "DMA", NULL);
705 imxdma->name = NULL; 710 if (ret) {
706 printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n", 711 imxdma->name = NULL;
707 MXC_INT_DMACH0 + channel, channel); 712 pr_crit("Can't register IRQ %d for DMA channel %d\n",
708 return ret; 713 MX2x_INT_DMACH0 + channel, channel);
714 return ret;
715 }
716 init_timer(&imxdma->watchdog);
717 imxdma->watchdog.function = &imx_dma_watchdog;
718 imxdma->watchdog.data = channel;
709 } 719 }
710 init_timer(&imxdma->watchdog);
711 imxdma->watchdog.function = &imx_dma_watchdog;
712 imxdma->watchdog.data = channel;
713#endif 720#endif
714 721
715 return ret; 722 return ret;
@@ -738,7 +745,8 @@ void imx_dma_free(int channel)
738 imxdma->name = NULL; 745 imxdma->name = NULL;
739 746
740#ifdef CONFIG_ARCH_MX2 747#ifdef CONFIG_ARCH_MX2
741 free_irq(MXC_INT_DMACH0 + channel, NULL); 748 if (cpu_is_mx21() || cpu_is_mx27())
749 free_irq(MX2x_INT_DMACH0 + channel, NULL);
742#endif 750#endif
743 751
744 local_irq_restore(flags); 752 local_irq_restore(flags);
@@ -796,34 +804,53 @@ static int __init imx_dma_init(void)
796 int ret = 0; 804 int ret = 0;
797 int i; 805 int i;
798 806
807#ifdef CONFIG_ARCH_MX1
808 if (cpu_is_mx1())
809 imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
810 else
811#endif
812#ifdef CONFIG_MACH_MX21
813 if (cpu_is_mx21())
814 imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
815 else
816#endif
817#ifdef CONFIG_MACH_MX27
818 if (cpu_is_mx27())
819 imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
820 else
821#endif
822 BUG();
823
799 dma_clk = clk_get(NULL, "dma"); 824 dma_clk = clk_get(NULL, "dma");
800 clk_enable(dma_clk); 825 clk_enable(dma_clk);
801 826
802 /* reset DMA module */ 827 /* reset DMA module */
803 __raw_writel(DCR_DRST, DMA_BASE + DMA_DCR); 828 imx_dmav1_writel(DCR_DRST, DMA_DCR);
804 829
805#ifdef CONFIG_ARCH_MX1 830#ifdef CONFIG_ARCH_MX1
806 ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL); 831 if (cpu_is_mx1()) {
807 if (ret) { 832 ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
808 printk(KERN_CRIT "Wow! Can't register IRQ for DMA\n"); 833 if (ret) {
809 return ret; 834 pr_crit("Wow! Can't register IRQ for DMA\n");
810 } 835 return ret;
836 }
811 837
812 ret = request_irq(DMA_ERR, dma_err_handler, 0, "DMA", NULL); 838 ret = request_irq(MX1_DMA_ERR, dma_err_handler, 0, "DMA", NULL);
813 if (ret) { 839 if (ret) {
814 printk(KERN_CRIT "Wow! Can't register ERRIRQ for DMA\n"); 840 pr_crit("Wow! Can't register ERRIRQ for DMA\n");
815 free_irq(DMA_INT, NULL); 841 free_irq(MX1_DMA_INT, NULL);
816 return ret; 842 return ret;
843 }
817 } 844 }
818#endif 845#endif
819 /* enable DMA module */ 846 /* enable DMA module */
820 __raw_writel(DCR_DEN, DMA_BASE + DMA_DCR); 847 imx_dmav1_writel(DCR_DEN, DMA_DCR);
821 848
822 /* clear all interrupts */ 849 /* clear all interrupts */
823 __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DISR); 850 imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
824 851
825 /* disable interrupts */ 852 /* disable interrupts */
826 __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DIMR); 853 imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);
827 854
828 for (i = 0; i < IMX_DMA_CHANNELS; i++) { 855 for (i = 0; i < IMX_DMA_CHANNELS; i++) {
829 imx_dma_channels[i].sg = NULL; 856 imx_dma_channels[i].sg = NULL;
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 41599be882e8..cb0b63874482 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -25,25 +25,37 @@
25#define USBCTRL_OTGBASE_OFFSET 0x600 25#define USBCTRL_OTGBASE_OFFSET 0x600
26 26
27#define MX31_OTG_SIC_SHIFT 29 27#define MX31_OTG_SIC_SHIFT 29
28#define MX31_OTG_SIC_MASK (0xf << MX31_OTG_SIC_SHIFT) 28#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
29#define MX31_OTG_PM_BIT (1 << 24) 29#define MX31_OTG_PM_BIT (1 << 24)
30 30
31#define MX31_H2_SIC_SHIFT 21 31#define MX31_H2_SIC_SHIFT 21
32#define MX31_H2_SIC_MASK (0xf << MX31_H2_SIC_SHIFT) 32#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
33#define MX31_H2_PM_BIT (1 << 16) 33#define MX31_H2_PM_BIT (1 << 16)
34#define MX31_H2_DT_BIT (1 << 5) 34#define MX31_H2_DT_BIT (1 << 5)
35 35
36#define MX31_H1_SIC_SHIFT 13 36#define MX31_H1_SIC_SHIFT 13
37#define MX31_H1_SIC_MASK (0xf << MX31_H1_SIC_SHIFT) 37#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
38#define MX31_H1_PM_BIT (1 << 8) 38#define MX31_H1_PM_BIT (1 << 8)
39#define MX31_H1_DT_BIT (1 << 4) 39#define MX31_H1_DT_BIT (1 << 4)
40 40
41#define MX35_OTG_SIC_SHIFT 29
42#define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT)
43#define MX35_OTG_PM_BIT (1 << 24)
44
45#define MX35_H1_SIC_SHIFT 21
46#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
47#define MX35_H1_PM_BIT (1 << 8)
48#define MX35_H1_IPPUE_UP_BIT (1 << 7)
49#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
50#define MX35_H1_TLL_BIT (1 << 5)
51#define MX35_H1_USBTE_BIT (1 << 4)
52
41int mxc_set_usbcontrol(int port, unsigned int flags) 53int mxc_set_usbcontrol(int port, unsigned int flags)
42{ 54{
43 unsigned int v; 55 unsigned int v;
44 56#ifdef CONFIG_ARCH_MX3
45 if (cpu_is_mx31()) { 57 if (cpu_is_mx31()) {
46 v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR + 58 v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
47 USBCTRL_OTGBASE_OFFSET)); 59 USBCTRL_OTGBASE_OFFSET));
48 60
49 switch (port) { 61 switch (port) {
@@ -51,15 +63,15 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
51 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT); 63 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
52 v |= (flags & MXC_EHCI_INTERFACE_MASK) 64 v |= (flags & MXC_EHCI_INTERFACE_MASK)
53 << MX31_OTG_SIC_SHIFT; 65 << MX31_OTG_SIC_SHIFT;
54 if (flags & MXC_EHCI_POWER_PINS_ENABLED) 66 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
55 v |= MX31_OTG_PM_BIT; 67 v |= MX31_OTG_PM_BIT;
56 68
57 break; 69 break;
58 case 1: /* H1 port */ 70 case 1: /* H1 port */
59 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT); 71 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
60 v |= (flags & MXC_EHCI_INTERFACE_MASK) 72 v |= (flags & MXC_EHCI_INTERFACE_MASK)
61 << MX31_H1_SIC_SHIFT; 73 << MX31_H1_SIC_SHIFT;
62 if (flags & MXC_EHCI_POWER_PINS_ENABLED) 74 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
63 v |= MX31_H1_PM_BIT; 75 v |= MX31_H1_PM_BIT;
64 76
65 if (!(flags & MXC_EHCI_TTL_ENABLED)) 77 if (!(flags & MXC_EHCI_TTL_ENABLED))
@@ -67,7 +79,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
67 79
68 break; 80 break;
69 case 2: /* H2 port */ 81 case 2: /* H2 port */
70 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT); 82 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
71 v |= (flags & MXC_EHCI_INTERFACE_MASK) 83 v |= (flags & MXC_EHCI_INTERFACE_MASK)
72 << MX31_H2_SIC_SHIFT; 84 << MX31_H2_SIC_SHIFT;
73 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) 85 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
@@ -77,13 +89,103 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
77 v |= MX31_H2_DT_BIT; 89 v |= MX31_H2_DT_BIT;
78 90
79 break; 91 break;
92 default:
93 return -EINVAL;
80 } 94 }
81 95
82 writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR + 96 writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
83 USBCTRL_OTGBASE_OFFSET)); 97 USBCTRL_OTGBASE_OFFSET));
84 return 0; 98 return 0;
85 } 99 }
86 100
101 if (cpu_is_mx35()) {
102 v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
103 USBCTRL_OTGBASE_OFFSET));
104
105 switch (port) {
106 case 0: /* OTG port */
107 v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT);
108 v |= (flags & MXC_EHCI_INTERFACE_MASK)
109 << MX35_OTG_SIC_SHIFT;
110 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
111 v |= MX35_OTG_PM_BIT;
112
113 break;
114 case 1: /* H1 port */
115 v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT |
116 MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
117 v |= (flags & MXC_EHCI_INTERFACE_MASK)
118 << MX35_H1_SIC_SHIFT;
119 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
120 v |= MX35_H1_PM_BIT;
121
122 if (!(flags & MXC_EHCI_TTL_ENABLED))
123 v |= MX35_H1_TLL_BIT;
124
125 if (flags & MXC_EHCI_INTERNAL_PHY)
126 v |= MX35_H1_USBTE_BIT;
127
128 if (flags & MXC_EHCI_IPPUE_DOWN)
129 v |= MX35_H1_IPPUE_DOWN_BIT;
130
131 if (flags & MXC_EHCI_IPPUE_UP)
132 v |= MX35_H1_IPPUE_UP_BIT;
133
134 break;
135 default:
136 return -EINVAL;
137 }
138
139 writel(v, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
140 USBCTRL_OTGBASE_OFFSET));
141 return 0;
142 }
143#endif /* CONFIG_ARCH_MX3 */
144#ifdef CONFIG_MACH_MX27
145 if (cpu_is_mx27()) {
146 /* On i.MX27 we can use the i.MX31 USBCTRL bits, they
147 * are identical
148 */
149 v = readl(MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
150 USBCTRL_OTGBASE_OFFSET));
151 switch (port) {
152 case 0: /* OTG port */
153 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
154 v |= (flags & MXC_EHCI_INTERFACE_MASK)
155 << MX31_OTG_SIC_SHIFT;
156 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
157 v |= MX31_OTG_PM_BIT;
158 break;
159 case 1: /* H1 port */
160 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
161 v |= (flags & MXC_EHCI_INTERFACE_MASK)
162 << MX31_H1_SIC_SHIFT;
163 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
164 v |= MX31_H1_PM_BIT;
165
166 if (!(flags & MXC_EHCI_TTL_ENABLED))
167 v |= MX31_H1_DT_BIT;
168
169 break;
170 case 2: /* H2 port */
171 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
172 v |= (flags & MXC_EHCI_INTERFACE_MASK)
173 << MX31_H2_SIC_SHIFT;
174 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
175 v |= MX31_H2_PM_BIT;
176
177 if (!(flags & MXC_EHCI_TTL_ENABLED))
178 v |= MX31_H2_DT_BIT;
179
180 break;
181 default:
182 return -EINVAL;
183 }
184 writel(v, MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
185 USBCTRL_OTGBASE_OFFSET));
186 return 0;
187 }
188#endif /* CONFIG_MACH_MX27 */
87 printk(KERN_WARNING 189 printk(KERN_WARNING
88 "%s() unable to setup USBCONTROL for this CPU\n", __func__); 190 "%s() unable to setup USBCONTROL for this CPU\n", __func__);
89 return -EINVAL; 191 return -EINVAL;
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index d65ebe303b9f..70b23893f094 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -140,16 +140,13 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
140 val = __raw_readl(reg); 140 val = __raw_readl(reg);
141 edge = (val >> (bit << 1)) & 3; 141 edge = (val >> (bit << 1)) & 3;
142 val &= ~(0x3 << (bit << 1)); 142 val &= ~(0x3 << (bit << 1));
143 switch (edge) { 143 if (edge == GPIO_INT_HIGH_LEV) {
144 case GPIO_INT_HIGH_LEV:
145 edge = GPIO_INT_LOW_LEV; 144 edge = GPIO_INT_LOW_LEV;
146 pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); 145 pr_debug("mxc: switch GPIO %d to low trigger\n", gpio);
147 break; 146 } else if (edge == GPIO_INT_LOW_LEV) {
148 case GPIO_INT_LOW_LEV:
149 edge = GPIO_INT_HIGH_LEV; 147 edge = GPIO_INT_HIGH_LEV;
150 pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); 148 pr_debug("mxc: switch GPIO %d to high trigger\n", gpio);
151 break; 149 } else {
152 default:
153 pr_err("mxc: invalid configuration for GPIO %d: %x\n", 150 pr_err("mxc: invalid configuration for GPIO %d: %x\n",
154 gpio, edge); 151 gpio, edge);
155 return; 152 return;
@@ -157,25 +154,20 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
157 __raw_writel(val | (edge << (bit << 1)), reg); 154 __raw_writel(val | (edge << (bit << 1)), reg);
158} 155}
159 156
160/* handle n interrupts in one status register */ 157/* handle 32 interrupts in one status register */
161static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) 158static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
162{ 159{
163 u32 gpio_irq_no; 160 u32 gpio_irq_no_base = port->virtual_irq_start;
164 161
165 gpio_irq_no = port->virtual_irq_start; 162 while (irq_stat != 0) {
166 for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) { 163 int irqoffset = fls(irq_stat) - 1;
167 u32 gpio = irq_to_gpio(gpio_irq_no);
168
169 if ((irq_stat & 1) == 0)
170 continue;
171 164
172 BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); 165 if (port->both_edges & (1 << irqoffset))
166 mxc_flip_edge(port, irqoffset);
173 167
174 if (port->both_edges & (1 << (gpio & 31))) 168 generic_handle_irq(gpio_irq_no_base + irqoffset);
175 mxc_flip_edge(port, gpio);
176 169
177 irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, 170 irq_stat &= ~(1 << irqoffset);
178 &irq_desc[gpio_irq_no]);
179 } 171 }
180} 172}
181 173
diff --git a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
index 05ff2f31ef1f..93cc66f104c7 100644
--- a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
+++ b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
@@ -21,19 +21,19 @@
21/* 21/*
22 * KZM-ARM11-01 Board Control Registers on FPGA 22 * KZM-ARM11-01 Board Control Registers on FPGA
23 */ 23 */
24#define KZM_ARM11_CTL1 (CS4_BASE_ADDR + 0x1000) 24#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
25#define KZM_ARM11_CTL2 (CS4_BASE_ADDR + 0x1001) 25#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
26#define KZM_ARM11_RSW1 (CS4_BASE_ADDR + 0x1002) 26#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
27#define KZM_ARM11_BACK_LIGHT (CS4_BASE_ADDR + 0x1004) 27#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
28#define KZM_ARM11_FPGA_REV (CS4_BASE_ADDR + 0x1008) 28#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
29#define KZM_ARM11_7SEG_LED (CS4_BASE_ADDR + 0x1010) 29#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
30#define KZM_ARM11_LEDS (CS4_BASE_ADDR + 0x1020) 30#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
31#define KZM_ARM11_DIPSW2 (CS4_BASE_ADDR + 0x1003) 31#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
32 32
33/* 33/*
34 * External UART for touch panel on FPGA 34 * External UART for touch panel on FPGA
35 */ 35 */
36#define KZM_ARM11_16550 (CS4_BASE_ADDR + 0x1050) 36#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
37 37
38#endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */ 38#endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */
39 39
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
index 2cbfa35e82ff..095a199591c6 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
@@ -14,7 +14,7 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15 15
16/* Base address of PBC controller */ 16/* Base address of PBC controller */
17#define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) 17#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT
18/* Offsets for the PBC Controller register */ 18/* Offsets for the PBC Controller register */
19 19
20/* PBC Board status register offset */ 20/* PBC Board status register offset */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
index d5be6b5a6acf..fc5fec9b55f0 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
@@ -25,6 +25,7 @@ enum mx31moboard_boards {
25 MX31NOBOARD = 0, 25 MX31NOBOARD = 0,
26 MX31DEVBOARD = 1, 26 MX31DEVBOARD = 1,
27 MX31MARXBOT = 2, 27 MX31MARXBOT = 2,
28 MX31SMARTBOT = 3,
28}; 29};
29 30
30/* 31/*
@@ -34,6 +35,7 @@ enum mx31moboard_boards {
34 35
35extern void mx31moboard_devboard_init(void); 36extern void mx31moboard_devboard_init(void);
36extern void mx31moboard_marxbot_init(void); 37extern void mx31moboard_marxbot_init(void);
38extern void mx31moboard_smartbot_init(void);
37 39
38#endif 40#endif
39 41
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h
index 43a82d0c534d..753a5988d85c 100644
--- a/arch/arm/plat-mxc/include/mach/clock.h
+++ b/arch/arm/plat-mxc/include/mach/clock.h
@@ -26,13 +26,6 @@
26struct module; 26struct module;
27 27
28struct clk { 28struct clk {
29#ifndef CONFIG_COMMON_CLKDEV
30 /* As soon as i.MX1 and i.MX31 switched to clkdev, this
31 * block can go away */
32 struct list_head node;
33 struct module *owner;
34 const char *name;
35#endif
36 int id; 29 int id;
37 /* Source clock this clk depends on */ 30 /* Source clock this clk depends on */
38 struct clk *parent; 31 struct clk *parent;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4bf1068ffad9..2941472582d2 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -20,14 +20,17 @@ extern void mx25_map_io(void);
20extern void mx27_map_io(void); 20extern void mx27_map_io(void);
21extern void mx31_map_io(void); 21extern void mx31_map_io(void);
22extern void mx35_map_io(void); 22extern void mx35_map_io(void);
23extern void mx51_map_io(void);
23extern void mxc91231_map_io(void); 24extern void mxc91231_map_io(void);
24extern void mxc_init_irq(void __iomem *); 25extern void mxc_init_irq(void __iomem *);
26extern void tzic_init_irq(void __iomem *);
25extern void mx1_init_irq(void); 27extern void mx1_init_irq(void);
26extern void mx21_init_irq(void); 28extern void mx21_init_irq(void);
27extern void mx25_init_irq(void); 29extern void mx25_init_irq(void);
28extern void mx27_init_irq(void); 30extern void mx27_init_irq(void);
29extern void mx31_init_irq(void); 31extern void mx31_init_irq(void);
30extern void mx35_init_irq(void); 32extern void mx35_init_irq(void);
33extern void mx51_init_irq(void);
31extern void mxc91231_init_irq(void); 34extern void mxc91231_init_irq(void);
32extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); 35extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
33extern int mx1_clocks_init(unsigned long fref); 36extern int mx1_clocks_init(unsigned long fref);
@@ -36,6 +39,8 @@ extern int mx25_clocks_init(void);
36extern int mx27_clocks_init(unsigned long fref); 39extern int mx27_clocks_init(unsigned long fref);
37extern int mx31_clocks_init(unsigned long fref); 40extern int mx31_clocks_init(unsigned long fref);
38extern int mx35_clocks_init(void); 41extern int mx35_clocks_init(void);
42extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
43 unsigned long ckih1, unsigned long ckih2);
39extern int mxc91231_clocks_init(unsigned long fref); 44extern int mxc91231_clocks_init(unsigned long fref);
40extern int mxc_register_gpios(void); 45extern int mxc_register_gpios(void);
41extern int mxc_register_device(struct platform_device *pdev, void *data); 46extern int mxc_register_device(struct platform_device *pdev, void *data);
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 5a6ae1b9e1e8..0b6e11eaeb8c 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -10,6 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 *
12 */ 12 */
13#define IMX_NEEDS_DEPRECATED_SYMBOLS
13 14
14#ifdef CONFIG_ARCH_MX1 15#ifdef CONFIG_ARCH_MX1
15#include <mach/mx1.h> 16#include <mach/mx1.h>
@@ -44,13 +45,22 @@
44#define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) 45#define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
45#endif 46#endif
46 47
48#ifdef CONFIG_ARCH_MX5
49#ifdef UART_PADDR
50#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
51#endif
52#include <mach/mx51.h>
53#define UART_PADDR MX51_UART1_BASE_ADDR
54#define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
55#endif
56
47#ifdef CONFIG_ARCH_MXC91231 57#ifdef CONFIG_ARCH_MXC91231
48#ifdef UART_PADDR 58#ifdef UART_PADDR
49#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 59#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
50#endif 60#endif
51#include <mach/mxc91231.h> 61#include <mach/mxc91231.h>
52#define UART_PADDR MXC91231_UART2_BASE_ADDR 62#define UART_PADDR MXC91231_UART2_BASE_ADDR
53#define UART_VADDR MXC91231_AIPS1_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) 63#define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
54#endif 64#endif
55 .macro addruart, rx, tmp 65 .macro addruart, rx, tmp
56 mrc p15, 0, \rx, c1, c0 66 mrc p15, 0, \rx, c1, c0
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 7cf290efe768..aeb08697726b 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> 2 * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
4 */ 4 */
5 5
6/* 6/*
@@ -18,11 +18,16 @@
18 .endm 18 .endm
19 19
20 .macro get_irqnr_preamble, base, tmp 20 .macro get_irqnr_preamble, base, tmp
21#ifndef CONFIG_MXC_TZIC
21 ldr \base, =avic_base 22 ldr \base, =avic_base
22 ldr \base, [\base] 23 ldr \base, [\base]
23#ifdef CONFIG_MXC_IRQ_PRIOR 24#ifdef CONFIG_MXC_IRQ_PRIOR
24 ldr r4, [\base, #AVIC_NIMASK] 25 ldr r4, [\base, #AVIC_NIMASK]
25#endif 26#endif
27#elif defined CONFIG_MXC_TZIC
28 ldr \base, =tzic_base
29 ldr \base, [\base]
30#endif /* CONFIG_MXC_TZIC */
26 .endm 31 .endm
27 32
28 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
@@ -32,6 +37,7 @@
32 @ and returns its number in irqnr 37 @ and returns its number in irqnr
33 @ and returns if an interrupt occured in irqstat 38 @ and returns if an interrupt occured in irqstat
34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 39 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
40#ifndef CONFIG_MXC_TZIC
35 @ Load offset & priority of the highest priority 41 @ Load offset & priority of the highest priority
36 @ interrupt pending from AVIC_NIVECSR 42 @ interrupt pending from AVIC_NIVECSR
37 ldr \irqstat, [\base, #0x40] 43 ldr \irqstat, [\base, #0x40]
@@ -45,6 +51,32 @@
45 strne \tmp, [\base, #AVIC_NIMASK] 51 strne \tmp, [\base, #AVIC_NIMASK]
46 streq r4, [\base, #AVIC_NIMASK] 52 streq r4, [\base, #AVIC_NIMASK]
47#endif 53#endif
54#elif defined CONFIG_MXC_TZIC
55 @ Load offset & priority of the highest priority
56 @ interrupt pending.
57 @ 0xD80 is HIPND0 register
58 mov \irqnr, #0
59 mov \irqstat, #0x0D80
601000:
61 ldr \tmp, [\irqstat, \base]
62 cmp \tmp, #0
63 bne 1001f
64 addeq \irqnr, \irqnr, #32
65 addeq \irqstat, \irqstat, #4
66 cmp \irqnr, #128
67 blo 1000b
68 b 2001f
691001: mov \irqstat, #1
701002: tst \tmp, \irqstat
71 bne 2002f
72 movs \tmp, \tmp, lsr #1
73 addne \irqnr, \irqnr, #1
74 bne 1002b
752001:
76 mov \irqnr, #0
772002:
78 movs \irqnr, \irqnr
79#endif
48 .endm 80 .endm
49 81
50 @ irq priority table (not used) 82 @ irq priority table (not used)
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 78db75475f69..ebadf4ac43fc 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,6 +22,15 @@
22 22
23#include <asm/sizes.h> 23#include <asm/sizes.h>
24 24
25#define IMX_IO_ADDRESS(addr, module) \
26 ((void __force __iomem *) \
27 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
28 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
29
30#ifdef CONFIG_ARCH_MX5
31#include <mach/mx51.h>
32#endif
33
25#ifdef CONFIG_ARCH_MX3 34#ifdef CONFIG_ARCH_MX3
26#include <mach/mx3x.h> 35#include <mach/mx3x.h>
27#include <mach/mx31.h> 36#include <mach/mx31.h>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/plat-mxc/include/mach/iomux-mx1.h
index bf23305c19cc..6b1507cf378e 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx1.h
@@ -1,166 +1,155 @@
1/* 1/*
2* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> 2 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
3* 3 *
4* This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5* modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
6* as published by the Free Software Foundation; either version 2 6 * as published by the Free Software Foundation; either version 2
7* of the License, or (at your option) any later version. 7 * of the License, or (at your option) any later version.
8* This program is distributed in the hope that it will be useful, 8 * This program is distributed in the hope that it will be useful,
9* but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11* GNU General Public License for more details. 11 * GNU General Public License for more details.
12* 12 *
13* You should have received a copy of the GNU General Public License 13 * You should have received a copy of the GNU General Public License
14* along with this program; if not, write to the Free Software 14 * along with this program; if not, write to the Free Software
15* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16* MA 02110-1301, USA. 16 * MA 02110-1301, USA.
17*/ 17 */
18#ifndef __MACH_IOMUX_MX1_H__
19#define __MACH_IOMUX_MX1_H__
18 20
19#ifndef _MXC_IOMUX_MX1_H 21#include <mach/iomux-v1.h>
20#define _MXC_IOMUX_MX1_H
21 22
22#ifndef GPIO_PORTA 23#define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
23#error Please include mach/iomux.h 24#define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0)
24#endif 25#define PA1_AOUT_SPI2_RXD (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1)
26#define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1)
27#define PA2_PF_PWM0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2)
28#define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3)
29#define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4)
30#define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5)
31#define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6)
32#define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7)
33#define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8)
34#define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9)
35#define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10)
36#define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11)
37#define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12)
38#define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13)
39#define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14)
40#define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
41#define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
42#define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17)
43#define PA17_AIN_SPI2_SS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
44#define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18)
45#define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19)
46#define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20)
47#define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21)
48#define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22)
49#define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23)
50#define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24)
51#define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24)
52#define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25)
53#define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25)
54#define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26)
55#define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26)
56#define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27)
57#define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27)
58#define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28)
59#define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28)
60#define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29)
61#define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29)
62#define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30)
63#define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30)
64#define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31)
65#define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31)
66#define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8)
67#define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8)
68#define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9)
69#define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9)
70#define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10)
71#define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10)
72#define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11)
73#define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11)
74#define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12)
75#define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12)
76#define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13)
77#define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13)
78#define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14)
79#define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15)
80#define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_AF | GPIO_IN | 16)
81#define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17)
82#define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18)
83#define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19)
84#define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20)
85#define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21)
86#define PB22_PF_USBD_RCV (GPIO_PORTB | GPIO_PF | 22)
87#define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23)
88#define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24)
89#define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25)
90#define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26)
91#define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27)
92#define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28)
93#define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_PF | GPIO_IN | 29)
94#define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30)
95#define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_PF | GPIO_IN | 31)
96#define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3)
97#define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4)
98#define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
99#define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6)
100#define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7)
101#define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8)
102#define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
103#define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_PF | GPIO_IN | 10)
104#define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
105#define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 12)
106#define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13)
107#define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14)
108#define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15)
109#define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16)
110#define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17)
111#define PC24_BIN_UART3_RI (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24)
112#define PC25_BIN_UART3_DSR (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25)
113#define PC26_AOUT_UART3_DTR (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26)
114#define PC27_BIN_UART3_DCD (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27)
115#define PC28_BIN_UART3_CTS (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28)
116#define PC29_AOUT_UART3_RTS (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29)
117#define PC30_BIN_UART3_TX (GPIO_PORTC | GPIO_BIN | 30)
118#define PC31_AOUT_UART3_RX (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31)
119#define PD6_PF_LSCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6)
120#define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7)
121#define PD7_AF_UART2_DTR (GPIO_PORTD | GPIO_AF | GPIO_IN | 7)
122#define PD7_AIN_SPI2_SCLK (GPIO_PORTD | GPIO_AIN | 7)
123#define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8)
124#define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8)
125#define PD8_AIN_SPI2_SS (GPIO_PORTD | GPIO_AIN | 8)
126#define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9)
127#define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9)
128#define PD9_AOUT_SPI2_RXD (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9)
129#define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10)
130#define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10)
131#define PD10_AIN_SPI2_TXD (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10)
132#define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11)
133#define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12)
134#define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13)
135#define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14)
136#define PD15_PF_LD0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15)
137#define PD16_PF_LD1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16)
138#define PD17_PF_LD2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
139#define PD18_PF_LD3 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
140#define PD19_PF_LD4 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
141#define PD20_PF_LD5 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
142#define PD21_PF_LD6 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
143#define PD22_PF_LD7 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
144#define PD23_PF_LD8 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23)
145#define PD24_PF_LD9 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
146#define PD25_PF_LD10 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
147#define PD26_PF_LD11 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
148#define PD27_PF_LD12 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
149#define PD28_PF_LD13 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
150#define PD29_PF_LD14 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
151#define PD30_PF_LD15 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30)
152#define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31)
153#define PD31_BIN_SPI2_TXD (GPIO_PORTD | GPIO_BIN | 31)
25 154
26/* FIXME: This list is not completed. The correct directions are 155#endif /* ifndef __MACH_IOMUX_MX1_H__ */
27* missing on some (many) pins
28*/
29
30
31/* Primary GPIO pin functions */
32
33#define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
34#define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0)
35#define PA1_AOUT_SPI2_RXD (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1)
36#define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1)
37#define PA2_PF_PWM0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2)
38#define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3)
39#define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4)
40#define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5)
41#define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6)
42#define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7)
43#define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8)
44#define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9)
45#define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10)
46#define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11)
47#define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12)
48#define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13)
49#define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14)
50#define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
51#define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
52#define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17)
53#define PA17_AIN_SPI2_SS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
54#define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18)
55#define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19)
56#define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20)
57#define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21)
58#define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22)
59#define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23)
60#define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24)
61#define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24)
62#define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25)
63#define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25)
64#define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26)
65#define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26)
66#define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27)
67#define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27)
68#define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28)
69#define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28)
70#define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29)
71#define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29)
72#define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30)
73#define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30)
74#define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31)
75#define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31)
76#define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8)
77#define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8)
78#define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9)
79#define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9)
80#define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10)
81#define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10)
82#define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11)
83#define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11)
84#define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12)
85#define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12)
86#define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13)
87#define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13)
88#define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14)
89#define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15)
90#define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_AF | GPIO_IN | 16)
91#define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17)
92#define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18)
93#define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19)
94#define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20)
95#define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21)
96#define PB22_PF_USBD_RCV (GPIO_PORTB | GPIO_PF | 22)
97#define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23)
98#define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24)
99#define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25)
100#define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26)
101#define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27)
102#define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28)
103#define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_PF | GPIO_IN | 29)
104#define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30)
105#define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_PF | GPIO_IN | 31)
106#define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3)
107#define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4)
108#define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
109#define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6)
110#define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7)
111#define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8)
112#define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
113#define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_PF | GPIO_IN | 10)
114#define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
115#define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 12)
116#define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13)
117#define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14)
118#define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15)
119#define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16)
120#define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17)
121#define PC24_BIN_UART3_RI (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24)
122#define PC25_BIN_UART3_DSR (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25)
123#define PC26_AOUT_UART3_DTR (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26)
124#define PC27_BIN_UART3_DCD (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27)
125#define PC28_BIN_UART3_CTS (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28)
126#define PC29_AOUT_UART3_RTS (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29)
127#define PC30_BIN_UART3_TX (GPIO_PORTC | GPIO_BIN | 30)
128#define PC31_AOUT_UART3_RX (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31)
129#define PD6_PF_LSCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6)
130#define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7)
131#define PD7_AF_UART2_DTR (GPIO_PORTD | GPIO_AF | GPIO_IN | 7)
132#define PD7_AIN_SPI2_SCLK (GPIO_PORTD | GPIO_AIN | 7)
133#define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8)
134#define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8)
135#define PD8_AIN_SPI2_SS (GPIO_PORTD | GPIO_AIN | 8)
136#define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9)
137#define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9)
138#define PD9_AOUT_SPI2_RXD (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9)
139#define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10)
140#define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10)
141#define PD10_AIN_SPI2_TXD (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10)
142#define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11)
143#define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12)
144#define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13)
145#define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14)
146#define PD15_PF_LD0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15)
147#define PD16_PF_LD1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16)
148#define PD17_PF_LD2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
149#define PD18_PF_LD3 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
150#define PD19_PF_LD4 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
151#define PD20_PF_LD5 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
152#define PD21_PF_LD6 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
153#define PD22_PF_LD7 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
154#define PD23_PF_LD8 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23)
155#define PD24_PF_LD9 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
156#define PD25_PF_LD10 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
157#define PD26_PF_LD11 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
158#define PD27_PF_LD12 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
159#define PD28_PF_LD13 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
160#define PD29_PF_LD14 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
161#define PD30_PF_LD15 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30)
162#define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31)
163#define PD31_BIN_SPI2_TXD (GPIO_PORTD | GPIO_BIN | 31)
164
165
166#endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/plat-mxc/include/mach/iomux-mx21.h
index 63aaa972e275..1495dfda7834 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx21.h
@@ -1,126 +1,122 @@
1/* 1/*
2* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> 2 * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
3* 3 *
4* This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5* modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
6* as published by the Free Software Foundation; either version 2 6 * as published by the Free Software Foundation; either version 2
7* of the License, or (at your option) any later version. 7 * of the License, or (at your option) any later version.
8* This program is distributed in the hope that it will be useful, 8 * This program is distributed in the hope that it will be useful,
9* but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11* GNU General Public License for more details. 11 * GNU General Public License for more details.
12* 12 *
13* You should have received a copy of the GNU General Public License 13 * You should have received a copy of the GNU General Public License
14* along with this program; if not, write to the Free Software 14 * along with this program; if not, write to the Free Software
15* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16* MA 02110-1301, USA. 16 * MA 02110-1301, USA.
17*/ 17 */
18 18#ifndef __MACH_IOMUX_MX21_H__
19#ifndef _MXC_IOMUX_MX21_H 19#define __MACH_IOMUX_MX21_H__
20#define _MXC_IOMUX_MX21_H 20
21 21#include <mach/iomux-mx2x.h>
22#ifndef GPIO_PORTA 22#include <mach/iomux-v1.h>
23#error Please include mach/iomux.h
24#endif
25
26 23
27/* Primary GPIO pin functions */ 24/* Primary GPIO pin functions */
28 25
29#define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22) 26#define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22)
30#define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25) 27#define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25)
31#define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5) 28#define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5)
32#define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6) 29#define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6)
33#define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7) 30#define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7)
34#define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8) 31#define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8)
35#define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9) 32#define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9)
36#define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10) 33#define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10)
37#define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11) 34#define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11)
38#define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12) 35#define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12)
39#define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13) 36#define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13)
40#define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16) 37#define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16)
41#define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17) 38#define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17)
42#define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18) 39#define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18)
43#define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19) 40#define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19)
44#define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0) 41#define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0)
45#define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1) 42#define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1)
46#define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2) 43#define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2)
47#define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1) 44#define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1)
48#define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3) 45#define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3)
49#define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7) 46#define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7)
50#define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8) 47#define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8)
51#define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9) 48#define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9)
52#define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10) 49#define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10)
53#define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11) 50#define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11)
54#define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12) 51#define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12)
55#define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13) 52#define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13)
56#define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14) 53#define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14)
57#define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16) 54#define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16)
58 55
59/* Alternate GPIO pin functions */ 56/* Alternate GPIO pin functions */
60 57
61#define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5) 58#define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5)
62#define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6) 59#define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6)
63#define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7) 60#define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7)
64#define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8) 61#define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8)
65#define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9) 62#define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9)
66#define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10) 63#define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10)
67#define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11) 64#define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11)
68#define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12) 65#define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12)
69#define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13) 66#define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13)
70#define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14) 67#define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14)
71#define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15) 68#define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15)
72#define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16) 69#define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16)
73#define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17) 70#define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17)
74#define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18) 71#define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18)
75#define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19) 72#define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19)
76#define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20) 73#define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20)
77#define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21) 74#define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21)
78#define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22) 75#define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22)
79#define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23) 76#define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23)
80#define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29) 77#define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29)
81#define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30) 78#define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30)
82 79
83/* AIN GPIO pin functions */ 80/* AIN GPIO pin functions */
84 81
85#define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) 82#define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
86#define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21) 83#define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
87#define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22) 84#define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
88#define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23) 85#define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
89#define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24) 86#define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
90#define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8) 87#define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
91#define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0) 88#define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
92#define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1) 89#define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
93#define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2) 90#define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
94#define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3) 91#define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
95#define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4) 92#define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
96#define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5) 93#define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
97 94
98/* BIN GPIO pin functions */ 95/* BIN GPIO pin functions */
99 96
100#define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) 97#define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
101#define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27) 98#define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
102 99
103/* CIN GPIO pin functions */ 100/* CIN GPIO pin functions */
104 101
105#define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26) 102#define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
106 103
107/* AOUT GPIO pin functions */ 104/* AOUT GPIO pin functions */
108 105
109#define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29) 106#define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
110#define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19) 107#define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
111#define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20) 108#define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
112#define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25) 109#define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
113#define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26) 110#define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
114#define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9) 111#define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
115#define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6) 112#define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
116#define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7) 113#define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
117#define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8) 114#define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
118#define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9) 115#define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
119#define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10) 116#define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
120#define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11) 117#define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
121#define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12) 118#define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
122#define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13) 119#define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
123#define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14) 120#define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
124 121
125 122#endif /* ifndef __MACH_IOMUX_MX21_H__ */
126#endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 9af494f0ab3d..f39220d1b67a 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -7,7 +7,7 @@
7 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. 7 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
8 * and 8 * and
9 * arch/arm/plat-mxc/include/mach/iomux-mx35.h 9 * arch/arm/plat-mxc/include/mach/iomux-mx35.h
10 * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> 10 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
11 * 11 *
12 * The code contained herein is licensed under the GNU General Public 12 * The code contained herein is licensed under the GNU General Public
13 * License. You may obtain a copy of the GNU General Public License 13 * License. You may obtain a copy of the GNU General Public License
@@ -16,24 +16,11 @@
16 * http://www.opensource.org/licenses/gpl-license.html 16 * http://www.opensource.org/licenses/gpl-license.html
17 * http://www.gnu.org/copyleft/gpl.html 17 * http://www.gnu.org/copyleft/gpl.html
18 */ 18 */
19#ifndef __IOMUX_MX25_H__ 19#ifndef __MACH_IOMUX_MX25_H__
20#define __IOMUX_MX25_H__ 20#define __MACH_IOMUX_MX25_H__
21 21
22#include <mach/iomux-v3.h> 22#include <mach/iomux-v3.h>
23 23
24#ifndef GPIO_PORTA
25#error Please include mach/iomux.h
26#endif
27
28/*
29 *
30 * @brief MX25 I/O Pin List
31 *
32 * @ingroup GPIO_MX25
33 */
34
35#ifndef __ASSEMBLY__
36
37/* 24/*
38 * IOMUX/PAD Bit field definitions 25 * IOMUX/PAD Bit field definitions
39 */ 26 */
@@ -462,9 +449,11 @@
462#define MX25_PAD_GPIO_C__CAN2_TX IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP) 449#define MX25_PAD_GPIO_C__CAN2_TX IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
463 450
464#define MX25_PAD_GPIO_D__GPIO_D IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL) 451#define MX25_PAD_GPIO_D__GPIO_D IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL)
452#define MX25_PAD_GPIO_E__LD16 IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, NO_PAD_CTRL)
465#define MX25_PAD_GPIO_D__CAN2_RX IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP) 453#define MX25_PAD_GPIO_D__CAN2_RX IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP)
466 454
467#define MX25_PAD_GPIO_E__GPIO_E IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL) 455#define MX25_PAD_GPIO_E__GPIO_E IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL)
456#define MX25_PAD_GPIO_F__LD17 IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, NO_PAD_CTRL)
468#define MX25_PAD_GPIO_E__AUD7_TXD IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL) 457#define MX25_PAD_GPIO_E__AUD7_TXD IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL)
469 458
470#define MX25_PAD_GPIO_F__GPIO_F IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL) 459#define MX25_PAD_GPIO_F__GPIO_F IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL)
@@ -513,5 +502,4 @@
513#define MX25_PAD_CTL_GRP_DVS_SDHC1 IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL) 502#define MX25_PAD_CTL_GRP_DVS_SDHC1 IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL)
514#define MX25_PAD_CTL_GRP_DVS_LCD IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL) 503#define MX25_PAD_CTL_GRP_DVS_LCD IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL)
515 504
516#endif // __ASSEMBLY__ 505#endif /* __MACH_IOMUX_MX25_H__ */
517#endif // __IOMUX_MX25_H__
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/plat-mxc/include/mach/iomux-mx27.h
index 5ac158b70f61..d9f9a6e32d80 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx27.h
@@ -1,207 +1,205 @@
1/* 1/*
2* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> 2 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
3* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> 3 * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
4* 4 *
5* This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
6* modify it under the terms of the GNU General Public License 6 * modify it under the terms of the GNU General Public License
7* as published by the Free Software Foundation; either version 2 7 * as published by the Free Software Foundation; either version 2
8* of the License, or (at your option) any later version. 8 * of the License, or (at your option) any later version.
9* This program is distributed in the hope that it will be useful, 9 * This program is distributed in the hope that it will be useful,
10* but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12* GNU General Public License for more details. 12 * GNU General Public License for more details.
13* 13 *
14* You should have received a copy of the GNU General Public License 14 * You should have received a copy of the GNU General Public License
15* along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17* MA 02110-1301, USA. 17 * MA 02110-1301, USA.
18*/ 18 */
19 19#ifndef __MACH_IOMUX_MX27_H__
20#ifndef _MXC_IOMUX_MX27_H 20#define __MACH_IOMUX_MX27_H__
21#define _MXC_IOMUX_MX27_H 21
22 22#include <mach/iomux-mx2x.h>
23#ifndef GPIO_PORTA 23#include <mach/iomux-v1.h>
24#error Please include mach/iomux.h
25#endif
26
27 24
28/* Primary GPIO pin functions */ 25/* Primary GPIO pin functions */
29 26
30#define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0) 27#define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0)
31#define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1) 28#define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1)
32#define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) 29#define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2)
33#define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) 30#define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3)
34#define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) 31#define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4)
35#define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) 32#define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22)
36#define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) 33#define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25)
37#define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) 34#define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
38#define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_PF | GPIO_IN | 6) 35#define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_PF | GPIO_IN | 6)
39#define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7) 36#define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
40#define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8) 37#define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
41#define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) 38#define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
42#define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10) 39#define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
43#define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) 40#define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
44#define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12) 41#define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
45#define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13) 42#define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
46#define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 16) 43#define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 16)
47#define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 17) 44#define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 17)
48#define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 18) 45#define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 18)
49#define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 19) 46#define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 19)
50#define PC25_AF_GPT5_TIN (GPIO_PORTC | GPIO_AF | 25) 47#define PD0_PF_SD3_CMD (GPIO_PORTD | GPIO_PF | 0)
51#define PC27_AF_GPT4_TIN (GPIO_PORTC | GPIO_AF | 27) 48#define PD1_PF_SD3_CLK (GPIO_PORTD | GPIO_PF | 1)
52#define PD0_PF_SD3_CMD (GPIO_PORTD | GPIO_PF | 0) 49#define PD2_PF_ATA_DATA0 (GPIO_PORTD | GPIO_PF | 2)
53#define PD1_PF_SD3_CLK (GPIO_PORTD | GPIO_PF | 1) 50#define PD3_PF_ATA_DATA1 (GPIO_PORTD | GPIO_PF | 3)
54#define PD2_PF_ATA_DATA0 (GPIO_PORTD | GPIO_PF | 2) 51#define PD4_PF_ATA_DATA2 (GPIO_PORTD | GPIO_PF | 4)
55#define PD3_PF_ATA_DATA1 (GPIO_PORTD | GPIO_PF | 3) 52#define PD5_PF_ATA_DATA3 (GPIO_PORTD | GPIO_PF | 5)
56#define PD4_PF_ATA_DATA2 (GPIO_PORTD | GPIO_PF | 4) 53#define PD6_PF_ATA_DATA4 (GPIO_PORTD | GPIO_PF | 6)
57#define PD5_PF_ATA_DATA3 (GPIO_PORTD | GPIO_PF | 5) 54#define PD7_PF_ATA_DATA5 (GPIO_PORTD | GPIO_PF | 7)
58#define PD6_PF_ATA_DATA4 (GPIO_PORTD | GPIO_PF | 6) 55#define PD8_PF_ATA_DATA6 (GPIO_PORTD | GPIO_PF | 8)
59#define PD7_PF_ATA_DATA5 (GPIO_PORTD | GPIO_PF | 7) 56#define PD9_PF_ATA_DATA7 (GPIO_PORTD | GPIO_PF | 9)
60#define PD8_PF_ATA_DATA6 (GPIO_PORTD | GPIO_PF | 8) 57#define PD10_PF_ATA_DATA8 (GPIO_PORTD | GPIO_PF | 10)
61#define PD9_PF_ATA_DATA7 (GPIO_PORTD | GPIO_PF | 9) 58#define PD11_PF_ATA_DATA9 (GPIO_PORTD | GPIO_PF | 11)
62#define PD10_PF_ATA_DATA8 (GPIO_PORTD | GPIO_PF | 10) 59#define PD12_PF_ATA_DATA10 (GPIO_PORTD | GPIO_PF | 12)
63#define PD11_PF_ATA_DATA9 (GPIO_PORTD | GPIO_PF | 11) 60#define PD13_PF_ATA_DATA11 (GPIO_PORTD | GPIO_PF | 13)
64#define PD12_PF_ATA_DATA10 (GPIO_PORTD | GPIO_PF | 12) 61#define PD14_PF_ATA_DATA12 (GPIO_PORTD | GPIO_PF | 14)
65#define PD13_PF_ATA_DATA11 (GPIO_PORTD | GPIO_PF | 13) 62#define PD15_PF_ATA_DATA13 (GPIO_PORTD | GPIO_PF | 15)
66#define PD14_PF_ATA_DATA12 (GPIO_PORTD | GPIO_PF | 14) 63#define PD16_PF_ATA_DATA14 (GPIO_PORTD | GPIO_PF | 16)
67#define PD15_PF_ATA_DATA13 (GPIO_PORTD | GPIO_PF | 15) 64#define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
68#define PD16_PF_ATA_DATA14 (GPIO_PORTD | GPIO_PF | 16) 65#define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
69#define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0) 66#define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
70#define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1) 67#define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
71#define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2) 68#define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
72#define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24) 69#define PF1_PF_NFCLE (GPIO_PORTF | GPIO_PF | 1)
73#define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25) 70#define PF3_PF_NFCE (GPIO_PORTF | GPIO_PF | 3)
74#define PF1_PF_NFCLE (GPIO_PORTF | GPIO_PF | 1) 71#define PF7_PF_PC_POE (GPIO_PORTF | GPIO_PF | 7)
75#define PF3_PF_NFCE (GPIO_PORTF | GPIO_PF | 3) 72#define PF8_PF_PC_RW (GPIO_PORTF | GPIO_PF | 8)
76#define PF7_PF_PC_POE (GPIO_PORTF | GPIO_PF | 7) 73#define PF9_PF_PC_IOIS16 (GPIO_PORTF | GPIO_PF | 9)
77#define PF8_PF_PC_RW (GPIO_PORTF | GPIO_PF | 8) 74#define PF10_PF_PC_RST (GPIO_PORTF | GPIO_PF | 10)
78#define PF9_PF_PC_IOIS16 (GPIO_PORTF | GPIO_PF | 9) 75#define PF11_PF_PC_BVD2 (GPIO_PORTF | GPIO_PF | 11)
79#define PF10_PF_PC_RST (GPIO_PORTF | GPIO_PF | 10) 76#define PF12_PF_PC_BVD1 (GPIO_PORTF | GPIO_PF | 12)
80#define PF11_PF_PC_BVD2 (GPIO_PORTF | GPIO_PF | 11) 77#define PF13_PF_PC_VS2 (GPIO_PORTF | GPIO_PF | 13)
81#define PF12_PF_PC_BVD1 (GPIO_PORTF | GPIO_PF | 12) 78#define PF14_PF_PC_VS1 (GPIO_PORTF | GPIO_PF | 14)
82#define PF13_PF_PC_VS2 (GPIO_PORTF | GPIO_PF | 13) 79#define PF16_PF_PC_PWRON (GPIO_PORTF | GPIO_PF | 16)
83#define PF14_PF_PC_VS1 (GPIO_PORTF | GPIO_PF | 14) 80#define PF17_PF_PC_READY (GPIO_PORTF | GPIO_PF | 17)
84#define PF16_PF_PC_PWRON (GPIO_PORTF | GPIO_PF | 16) 81#define PF18_PF_PC_WAIT (GPIO_PORTF | GPIO_PF | 18)
85#define PF17_PF_PC_READY (GPIO_PORTF | GPIO_PF | 17) 82#define PF19_PF_PC_CD2 (GPIO_PORTF | GPIO_PF | 19)
86#define PF18_PF_PC_WAIT (GPIO_PORTF | GPIO_PF | 18) 83#define PF20_PF_PC_CD1 (GPIO_PORTF | GPIO_PF | 20)
87#define PF19_PF_PC_CD2 (GPIO_PORTF | GPIO_PF | 19) 84#define PF23_PF_ATA_DATA15 (GPIO_PORTF | GPIO_PF | 23)
88#define PF20_PF_PC_CD1 (GPIO_PORTF | GPIO_PF | 20)
89#define PF23_PF_ATA_DATA15 (GPIO_PORTF | GPIO_PF | 23)
90 85
91/* Alternate GPIO pin functions */ 86/* Alternate GPIO pin functions */
92 87
93#define PB4_AF_MSHC_DATA0 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4) 88#define PB4_AF_MSHC_DATA0 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4)
94#define PB5_AF_MSHC_DATA1 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5) 89#define PB5_AF_MSHC_DATA1 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5)
95#define PB6_AF_MSHC_DATA2 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6) 90#define PB6_AF_MSHC_DATA2 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6)
96#define PB7_AF_MSHC_DATA4 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7) 91#define PB7_AF_MSHC_DATA4 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7)
97#define PB8_AF_MSHC_BS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8) 92#define PB8_AF_MSHC_BS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8)
98#define PB9_AF_MSHC_SCLK (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9) 93#define PB9_AF_MSHC_SCLK (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9)
99#define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10) 94#define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10)
100#define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 11) 95#define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 11)
101#define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12) 96#define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12)
102#define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 13) 97#define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 13)
103#define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18) 98#define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18)
104#define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 19) 99#define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 19)
105#define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20) 100#define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20)
106#define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 21) 101#define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 21)
107#define PC8_AF_FEC_MDIO (GPIO_PORTC | GPIO_AF | GPIO_IN | 8) 102#define PC8_AF_FEC_MDIO (GPIO_PORTC | GPIO_AF | GPIO_IN | 8)
108#define PC24_AF_GPT5_TOUT (GPIO_PORTC | GPIO_AF | 24) 103#define PC24_AF_GPT5_TOUT (GPIO_PORTC | GPIO_AF | 24)
109#define PC26_AF_GPT4_TOUT (GPIO_PORTC | GPIO_AF | 26) 104#define PC25_AF_GPT5_TIN (GPIO_PORTC | GPIO_AF | 25)
110#define PD1_AF_ETMTRACE_PKT15 (GPIO_PORTD | GPIO_AF | 1) 105#define PC26_AF_GPT4_TOUT (GPIO_PORTC | GPIO_AF | 26)
111#define PD6_AF_ETMTRACE_PKT14 (GPIO_PORTD | GPIO_AF | 6) 106#define PC27_AF_GPT4_TIN (GPIO_PORTC | GPIO_AF | 27)
112#define PD7_AF_ETMTRACE_PKT13 (GPIO_PORTD | GPIO_AF | 7) 107#define PD1_AF_ETMTRACE_PKT15 (GPIO_PORTD | GPIO_AF | 1)
113#define PD9_AF_ETMTRACE_PKT12 (GPIO_PORTD | GPIO_AF | 9) 108#define PD6_AF_ETMTRACE_PKT14 (GPIO_PORTD | GPIO_AF | 6)
114#define PD2_AF_SD3_D0 (GPIO_PORTD | GPIO_AF | 2) 109#define PD7_AF_ETMTRACE_PKT13 (GPIO_PORTD | GPIO_AF | 7)
115#define PD3_AF_SD3_D1 (GPIO_PORTD | GPIO_AF | 3) 110#define PD9_AF_ETMTRACE_PKT12 (GPIO_PORTD | GPIO_AF | 9)
116#define PD4_AF_SD3_D2 (GPIO_PORTD | GPIO_AF | 4) 111#define PD2_AF_SD3_D0 (GPIO_PORTD | GPIO_AF | 2)
117#define PD5_AF_SD3_D3 (GPIO_PORTD | GPIO_AF | 5) 112#define PD3_AF_SD3_D1 (GPIO_PORTD | GPIO_AF | 3)
118#define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_AF | GPIO_IN | 8) 113#define PD4_AF_SD3_D2 (GPIO_PORTD | GPIO_AF | 4)
119#define PD10_AF_ETMTRACE_PKT11 (GPIO_PORTD | GPIO_AF | 10) 114#define PD5_AF_SD3_D3 (GPIO_PORTD | GPIO_AF | 5)
120#define PD11_AF_ETMTRACE_PKT10 (GPIO_PORTD | GPIO_AF | 11) 115#define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_AF | GPIO_IN | 8)
121#define PD12_AF_ETMTRACE_PKT9 (GPIO_PORTD | GPIO_AF | 12) 116#define PD10_AF_ETMTRACE_PKT11 (GPIO_PORTD | GPIO_AF | 10)
122#define PD13_AF_ETMTRACE_PKT8 (GPIO_PORTD | GPIO_AF | 13) 117#define PD11_AF_ETMTRACE_PKT10 (GPIO_PORTD | GPIO_AF | 11)
123#define PD14_AF_ETMTRACE_PKT7 (GPIO_PORTD | GPIO_AF | 14) 118#define PD12_AF_ETMTRACE_PKT9 (GPIO_PORTD | GPIO_AF | 12)
124#define PD15_AF_ETMTRACE_PKT6 (GPIO_PORTD | GPIO_AF | 15) 119#define PD13_AF_ETMTRACE_PKT8 (GPIO_PORTD | GPIO_AF | 13)
125#define PD16_AF_ETMTRACE_PKT5 (GPIO_PORTD | GPIO_AF | 16) 120#define PD14_AF_ETMTRACE_PKT7 (GPIO_PORTD | GPIO_AF | 14)
126#define PF1_AF_ETMTRACE_PKT0 (GPIO_PORTF | GPIO_AF | 1) 121#define PD15_AF_ETMTRACE_PKT6 (GPIO_PORTD | GPIO_AF | 15)
127#define PF3_AF_ETMTRACE_PKT2 (GPIO_PORTF | GPIO_AF | 3) 122#define PD16_AF_ETMTRACE_PKT5 (GPIO_PORTD | GPIO_AF | 16)
128#define PF5_AF_ETMPIPESTAT11 (GPIO_PORTF | GPIO_AF | 5) 123#define PF1_AF_ETMTRACE_PKT0 (GPIO_PORTF | GPIO_AF | 1)
129#define PF7_AF_ATA_BUFFER_EN (GPIO_PORTF | GPIO_AF | 7) 124#define PF3_AF_ETMTRACE_PKT2 (GPIO_PORTF | GPIO_AF | 3)
130#define PF8_AF_ATA_IORDY (GPIO_PORTF | GPIO_AF | 8) 125#define PF5_AF_ETMPIPESTAT11 (GPIO_PORTF | GPIO_AF | 5)
131#define PF9_AF_ATA_INTRQ (GPIO_PORTF | GPIO_AF | 9) 126#define PF7_AF_ATA_BUFFER_EN (GPIO_PORTF | GPIO_AF | 7)
132#define PF10_AF_ATA_RESET (GPIO_PORTF | GPIO_AF | 10) 127#define PF8_AF_ATA_IORDY (GPIO_PORTF | GPIO_AF | 8)
133#define PF11_AF_ATA_DMACK (GPIO_PORTF | GPIO_AF | 11) 128#define PF9_AF_ATA_INTRQ (GPIO_PORTF | GPIO_AF | 9)
134#define PF12_AF_ATA_DMAREQ (GPIO_PORTF | GPIO_AF | 12) 129#define PF10_AF_ATA_RESET (GPIO_PORTF | GPIO_AF | 10)
135#define PF13_AF_ATA_DA0 (GPIO_PORTF | GPIO_AF | 13) 130#define PF11_AF_ATA_DMACK (GPIO_PORTF | GPIO_AF | 11)
136#define PF14_AF_ATA_DA1 (GPIO_PORTF | GPIO_AF | 14) 131#define PF12_AF_ATA_DMAREQ (GPIO_PORTF | GPIO_AF | 12)
137#define PF15_AF_ETMTRACE_SYNC (GPIO_PORTF | GPIO_AF | 15) 132#define PF13_AF_ATA_DA0 (GPIO_PORTF | GPIO_AF | 13)
138#define PF16_AF_ATA_DA2 (GPIO_PORTF | GPIO_AF | 16) 133#define PF14_AF_ATA_DA1 (GPIO_PORTF | GPIO_AF | 14)
139#define PF17_AF_ATA_CS0 (GPIO_PORTF | GPIO_AF | 17) 134#define PF15_AF_ETMTRACE_SYNC (GPIO_PORTF | GPIO_AF | 15)
140#define PF18_AF_ATA_CS1 (GPIO_PORTF | GPIO_AF | 18) 135#define PF16_AF_ATA_DA2 (GPIO_PORTF | GPIO_AF | 16)
141#define PF19_AF_ATA_DIOW (GPIO_PORTF | GPIO_AF | 19) 136#define PF17_AF_ATA_CS0 (GPIO_PORTF | GPIO_AF | 17)
142#define PF20_AF_ATA_DIOR (GPIO_PORTF | GPIO_AF | 20) 137#define PF18_AF_ATA_CS1 (GPIO_PORTF | GPIO_AF | 18)
143#define PF22_AF_ETMTRACE_CLK (GPIO_PORTF | GPIO_AF | 22) 138#define PF19_AF_ATA_DIOW (GPIO_PORTF | GPIO_AF | 19)
144#define PF23_AF_ETMTRACE_PKT4 (GPIO_PORTF | GPIO_AF | 23) 139#define PF20_AF_ATA_DIOR (GPIO_PORTF | GPIO_AF | 20)
140#define PF22_AF_ETMTRACE_CLK (GPIO_PORTF | GPIO_AF | 22)
141#define PF23_AF_ETMTRACE_PKT4 (GPIO_PORTF | GPIO_AF | 23)
145 142
146/* AIN GPIO pin functions */ 143/* AIN GPIO pin functions */
147 144
148#define PC14_AIN_SSI1_MCLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14) 145#define PC14_AIN_SSI1_MCLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
149#define PC15_AIN_GPT6_TOUT (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15) 146#define PC15_AIN_GPT6_TOUT (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15)
150#define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0) 147#define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0)
151#define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1) 148#define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1)
152#define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2) 149#define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2)
153#define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3) 150#define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3)
154#define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9) 151#define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9)
155#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16) 152#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16)
156#define PD27_AIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27) 153#define PD27_AIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27)
157#define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23) 154#define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23)
158 155
159/* BIN GPIO pin functions */ 156/* BIN GPIO pin functions */
160 157
161#define PC14_BIN_SSI2_MCLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14) 158#define PC14_BIN_SSI2_MCLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
162 159
163/* CIN GPIO pin functions */ 160/* CIN GPIO pin functions */
164 161
165#define PD2_CIN_SLCDC1_DAT0 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2) 162#define PD2_CIN_SLCDC1_DAT0 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2)
166#define PD3_CIN_SLCDC1_DAT1 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3) 163#define PD3_CIN_SLCDC1_DAT1 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3)
167#define PD4_CIN_SLCDC1_DAT2 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4) 164#define PD4_CIN_SLCDC1_DAT2 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4)
168#define PD5_CIN_SLCDC1_DAT3 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5) 165#define PD5_CIN_SLCDC1_DAT3 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5)
169#define PD6_CIN_SLCDC1_DAT4 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6) 166#define PD6_CIN_SLCDC1_DAT4 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6)
170#define PD7_CIN_SLCDC1_DAT5 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7) 167#define PD7_CIN_SLCDC1_DAT5 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7)
171#define PD8_CIN_SLCDC1_DAT6 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8) 168#define PD8_CIN_SLCDC1_DAT6 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8)
172#define PD9_CIN_SLCDC1_DAT7 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9) 169#define PD9_CIN_SLCDC1_DAT7 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9)
173#define PD10_CIN_SLCDC1_DAT8 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10) 170#define PD10_CIN_SLCDC1_DAT8 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10)
174#define PD11_CIN_SLCDC1_DAT9 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11) 171#define PD11_CIN_SLCDC1_DAT9 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11)
175#define PD12_CIN_SLCDC1_DAT10 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12) 172#define PD12_CIN_SLCDC1_DAT10 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12)
176#define PD13_CIN_SLCDC1_DAT11 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13) 173#define PD13_CIN_SLCDC1_DAT11 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13)
177#define PD14_CIN_SLCDC1_DAT12 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14) 174#define PD14_CIN_SLCDC1_DAT12 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14)
178#define PD15_CIN_SLCDC1_DAT13 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15) 175#define PD15_CIN_SLCDC1_DAT13 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15)
179#define PD16_CIN_SLCDC1_DAT14 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16) 176#define PD16_CIN_SLCDC1_DAT14 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16)
180#define PD23_CIN_SLCDC1_DAT15 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23) 177#define PD23_CIN_SLCDC1_DAT15 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23)
181#define PF27_CIN_EXT_DMA_GRANT (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27) 178#define PF27_CIN_EXT_DMA_GRANT (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27)
182/* LCDC_TESTx on PBxx omitted, because it's not clear what they do */ 179/* LCDC_TESTx on PBxx omitted, because it's not clear what they do */
183 180
184/* AOUT GPIO pin functions */ 181/* AOUT GPIO pin functions */
185 182
186#define PC14_AOUT_GPT6_TIN (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14) 183#define PC14_AOUT_GPT6_TIN (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14)
187#define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4) 184#define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4)
188#define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5) 185#define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5)
189#define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6) 186#define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6)
190#define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7) 187#define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7)
191#define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10) 188#define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10)
192#define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11) 189#define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11)
193#define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12) 190#define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12)
194#define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13) 191#define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13)
195#define PD14_AOUT_FEC_RX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14) 192#define PD14_AOUT_FEC_RX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14)
196#define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15) 193#define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15)
197 194
198#define PC17_BOUT_PC_IOIS16 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17) 195/* BOUT GPIO pin functions */
199#define PC18_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18) 196
200#define PC19_BOUT_PC_BVD1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19) 197#define PC17_BOUT_PC_IOIS16 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17)
201#define PC28_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28) 198#define PC18_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18)
202#define PC29_BOUT_PC_VS1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29) 199#define PC19_BOUT_PC_BVD1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19)
203#define PC30_BOUT_PC_READY (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30) 200#define PC28_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28)
204#define PC31_BOUT_PC_WAIT (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31) 201#define PC29_BOUT_PC_VS1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29)
205 202#define PC30_BOUT_PC_READY (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30)
206 203#define PC31_BOUT_PC_WAIT (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31)
207#endif /* _MXC_GPIO_MX1_MX2_H */ 204
205#endif /* __MACH_IOMUX_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
index fb5ae638e79f..c4f116d214f2 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
@@ -1,237 +1,230 @@
1/* 1/*
2* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> 2 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
3* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> 3 * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
4* 4 *
5* This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
6* modify it under the terms of the GNU General Public License 6 * modify it under the terms of the GNU General Public License
7* as published by the Free Software Foundation; either version 2 7 * as published by the Free Software Foundation; either version 2
8* of the License, or (at your option) any later version. 8 * of the License, or (at your option) any later version.
9* This program is distributed in the hope that it will be useful, 9 * This program is distributed in the hope that it will be useful,
10* but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12* GNU General Public License for more details. 12 * GNU General Public License for more details.
13* 13 *
14* You should have received a copy of the GNU General Public License 14 * You should have received a copy of the GNU General Public License
15* along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17* MA 02110-1301, USA. 17 * MA 02110-1301, USA.
18*/ 18 */
19 19#ifndef __MACH_IOMUX_MX2x_H__
20#ifndef _MXC_IOMUX_MX2x_H 20#define __MACH_IOMUX_MX2x_H__
21#define _MXC_IOMUX_MX2x_H
22
23#ifndef GPIO_PORTA
24#error Please include mach/iomux.h
25#endif
26
27 21
28/* Primary GPIO pin functions */ 22/* Primary GPIO pin functions */
29 23
30#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5) 24#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
31#define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6) 25#define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
32#define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7) 26#define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
33#define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8) 27#define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
34#define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9) 28#define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
35#define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10) 29#define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
36#define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11) 30#define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
37#define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12) 31#define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
38#define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13) 32#define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
39#define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14) 33#define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
40#define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15) 34#define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
41#define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16) 35#define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
42#define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17) 36#define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
43#define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18) 37#define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
44#define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19) 38#define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
45#define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20) 39#define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
46#define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21) 40#define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
47#define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22) 41#define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
48#define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23) 42#define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
49#define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24) 43#define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
50#define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25) 44#define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
51#define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26) 45#define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
52#define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27) 46#define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
53#define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28) 47#define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
54#define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29) 48#define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
55#define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30) 49#define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
56#define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31) 50#define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
57#define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) 51#define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4)
58#define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) 52#define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5)
59#define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) 53#define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6)
60#define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) 54#define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7)
61#define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) 55#define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8)
62#define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) 56#define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9)
63#define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10) 57#define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10)
64#define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11) 58#define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11)
65#define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12) 59#define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12)
66#define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13) 60#define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13)
67#define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14) 61#define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14)
68#define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15) 62#define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15)
69#define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16) 63#define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16)
70#define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17) 64#define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17)
71#define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18) 65#define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18)
72#define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19) 66#define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19)
73#define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20) 67#define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20)
74#define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21) 68#define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21)
75#define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23) 69#define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23)
76#define PB24_PF_USB_OC (GPIO_PORTB | GPIO_PF | 24) 70#define PB24_PF_USB_OC (GPIO_PORTB | GPIO_PF | 24)
77#define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26) 71#define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26)
78#define PB27_PF_USBH1_OE (GPIO_PORTB | GPIO_PF | 27) 72#define PB27_PF_USBH1_OE (GPIO_PORTB | GPIO_PF | 27)
79#define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28) 73#define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28)
80#define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29) 74#define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29)
81#define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30) 75#define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30)
82#define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31) 76#define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31)
83#define PC14_PF_TOUT (GPIO_PORTC | GPIO_PF | 14) 77#define PC14_PF_TOUT (GPIO_PORTC | GPIO_PF | 14)
84#define PC15_PF_TIN (GPIO_PORTC | GPIO_PF | 15) 78#define PC15_PF_TIN (GPIO_PORTC | GPIO_PF | 15)
85#define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 20) 79#define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 20)
86#define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 21) 80#define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 21)
87#define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 22) 81#define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 22)
88#define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 23) 82#define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 23)
89#define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 24) 83#define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 24)
90#define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 25) 84#define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 25)
91#define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 26) 85#define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 26)
92#define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 27) 86#define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 27)
93#define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 28) 87#define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 28)
94#define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 29) 88#define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 29)
95#define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 30) 89#define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 30)
96#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) 90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
97#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) 91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
98#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) 92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
99#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) 93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19)
100#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) 94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20)
101#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) 95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21)
102#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) 96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22)
103#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) 97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23)
104#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) 98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24)
105#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) 99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
106#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) 100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
107#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) 101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
108#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28) 102#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
109#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29) 103#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
110#define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 30) 104#define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 30)
111#define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31) 105#define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31)
112#define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3) 106#define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3)
113#define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 4) 107#define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 4)
114#define PE5_PF_PWMO (GPIO_PORTE | GPIO_PF | 5) 108#define PE5_PF_PWMO (GPIO_PORTE | GPIO_PF | 5)
115#define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6) 109#define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6)
116#define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 7) 110#define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 7)
117#define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8) 111#define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8)
118#define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 9) 112#define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 9)
119#define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10) 113#define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10)
120#define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 11) 114#define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 11)
121#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12) 115#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12)
122#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 13) 116#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 13)
123#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14) 117#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14)
124#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 15) 118#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 15)
125#define PE16_PF_RTCK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16) 119#define PE16_PF_RTCK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16)
126#define PE17_PF_RESET_OUT (GPIO_PORTE | GPIO_PF | 17) 120#define PE17_PF_RESET_OUT (GPIO_PORTE | GPIO_PF | 17)
127#define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18) 121#define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18)
128#define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19) 122#define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19)
129#define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20) 123#define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20)
130#define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21) 124#define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21)
131#define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22) 125#define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22)
132#define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23) 126#define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23)
133#define PF0_PF_NRFB (GPIO_PORTF | GPIO_PF | 0) 127#define PF0_PF_NRFB (GPIO_PORTF | GPIO_PF | 0)
134#define PF2_PF_NFWP (GPIO_PORTF | GPIO_PF | 2) 128#define PF2_PF_NFWP (GPIO_PORTF | GPIO_PF | 2)
135#define PF4_PF_NFALE (GPIO_PORTF | GPIO_PF | 4) 129#define PF4_PF_NFALE (GPIO_PORTF | GPIO_PF | 4)
136#define PF5_PF_NFRE (GPIO_PORTF | GPIO_PF | 5) 130#define PF5_PF_NFRE (GPIO_PORTF | GPIO_PF | 5)
137#define PF6_PF_NFWE (GPIO_PORTF | GPIO_PF | 6) 131#define PF6_PF_NFWE (GPIO_PORTF | GPIO_PF | 6)
138#define PF15_PF_CLKO (GPIO_PORTF | GPIO_PF | 15) 132#define PF15_PF_CLKO (GPIO_PORTF | GPIO_PF | 15)
139#define PF21_PF_CS4 (GPIO_PORTF | GPIO_PF | 21) 133#define PF21_PF_CS4 (GPIO_PORTF | GPIO_PF | 21)
140#define PF22_PF_CS5 (GPIO_PORTF | GPIO_PF | 22) 134#define PF22_PF_CS5 (GPIO_PORTF | GPIO_PF | 22)
141 135
142/* Alternate GPIO pin functions */ 136/* Alternate GPIO pin functions */
143 137
144#define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 26) 138#define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 26)
145#define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28) 139#define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28)
146#define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29) 140#define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29)
147#define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 31) 141#define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 31)
148#define PC28_AF_SLCDC2_D0 (GPIO_PORTC | GPIO_AF | 28) 142#define PC28_AF_SLCDC2_D0 (GPIO_PORTC | GPIO_AF | 28)
149#define PC29_AF_SLCDC2_RS (GPIO_PORTC | GPIO_AF | 29) 143#define PC29_AF_SLCDC2_RS (GPIO_PORTC | GPIO_AF | 29)
150#define PC30_AF_SLCDC2_CS (GPIO_PORTC | GPIO_AF | 30) 144#define PC30_AF_SLCDC2_CS (GPIO_PORTC | GPIO_AF | 30)
151#define PC31_AF_SLCDC2_CLK (GPIO_PORTC | GPIO_AF | 31) 145#define PC31_AF_SLCDC2_CLK (GPIO_PORTC | GPIO_AF | 31)
152#define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19) 146#define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19)
153#define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20) 147#define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20)
154#define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21) 148#define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21)
155#define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22) 149#define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22)
156#define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23) 150#define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23)
157#define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24) 151#define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24)
158#define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26) 152#define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26)
159#define PE0_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 0) 153#define PE0_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 0)
160#define PE1_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 1) 154#define PE1_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 1)
161#define PE2_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 2) 155#define PE2_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 2)
162#define PE3_AF_KP_COL7 (GPIO_PORTE | GPIO_AF | 3) 156#define PE3_AF_KP_COL7 (GPIO_PORTE | GPIO_AF | 3)
163#define PE4_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 4) 157#define PE4_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 4)
164#define PE6_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 6) 158#define PE6_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 6)
165#define PE7_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 7) 159#define PE7_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 7)
166#define PE16_AF_OWIRE (GPIO_PORTE | GPIO_AF | 16) 160#define PE16_AF_OWIRE (GPIO_PORTE | GPIO_AF | 16)
167#define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_AF | GPIO_IN | 18) 161#define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_AF | GPIO_IN | 18)
168#define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21) 162#define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21)
169#define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22) 163#define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22)
170#define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23) 164#define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23)
171 165
172/* AIN GPIO pin functions */ 166/* AIN GPIO pin functions */
173 167
174#define PA6_AIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6) 168#define PA6_AIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6)
175#define PA7_AIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7) 169#define PA7_AIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7)
176#define PA8_AIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8) 170#define PA8_AIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8)
177#define PA0_AIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) 171#define PA0_AIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
178#define PA11_AIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11) 172#define PA11_AIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11)
179#define PA13_AIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13) 173#define PA13_AIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13)
180#define PA15_AIN_SLCDC1_DAT9 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15) 174#define PA15_AIN_SLCDC1_DAT9 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15)
181#define PA17_AIN_SLCDC1_DAT11 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17) 175#define PA17_AIN_SLCDC1_DAT11 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
182#define PA19_AIN_SLCDC1_DAT13 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19) 176#define PA19_AIN_SLCDC1_DAT13 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19)
183#define PA21_AIN_SLCDC1_DAT15 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21) 177#define PA21_AIN_SLCDC1_DAT15 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21)
184#define PA22_AIN_EXT_DMAGRANT (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22) 178#define PA22_AIN_EXT_DMAGRANT (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22)
185#define PA24_AIN_SLCDC1_D0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24) 179#define PA24_AIN_SLCDC1_D0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24)
186#define PA25_AIN_SLCDC1_RS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25) 180#define PA25_AIN_SLCDC1_RS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25)
187#define PA26_AIN_SLCDC1_CS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26) 181#define PA26_AIN_SLCDC1_CS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26)
188#define PA27_AIN_SLCDC1_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27) 182#define PA27_AIN_SLCDC1_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27)
189#define PB6_AIN_SLCDC1_D0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6) 183#define PB6_AIN_SLCDC1_D0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6)
190#define PB7_AIN_SLCDC1_RS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7) 184#define PB7_AIN_SLCDC1_RS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7)
191#define PB8_AIN_SLCDC1_CS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8) 185#define PB8_AIN_SLCDC1_CS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8)
192#define PB9_AIN_SLCDC1_CLK (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9) 186#define PB9_AIN_SLCDC1_CLK (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9)
193#define PB25_AIN_SLCDC1_DAT0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25) 187#define PB25_AIN_SLCDC1_DAT0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25)
194#define PB26_AIN_SLCDC1_DAT1 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26) 188#define PB26_AIN_SLCDC1_DAT1 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26)
195#define PB27_AIN_SLCDC1_DAT2 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27) 189#define PB27_AIN_SLCDC1_DAT2 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27)
196#define PB28_AIN_SLCDC1_DAT3 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28) 190#define PB28_AIN_SLCDC1_DAT3 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28)
197#define PB29_AIN_SLCDC1_DAT4 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29) 191#define PB29_AIN_SLCDC1_DAT4 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29)
198#define PB30_AIN_SLCDC1_DAT5 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30) 192#define PB30_AIN_SLCDC1_DAT5 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30)
199#define PB31_AIN_SLCDC1_DAT6 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31) 193#define PB31_AIN_SLCDC1_DAT6 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31)
200#define PC5_AIN_SLCDC1_DAT7 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5) 194#define PC5_AIN_SLCDC1_DAT7 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5)
201#define PC6_AIN_SLCDC1_DAT8 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6) 195#define PC6_AIN_SLCDC1_DAT8 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6)
202#define PC7_AIN_SLCDC1_DAT9 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7) 196#define PC7_AIN_SLCDC1_DAT9 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7)
203#define PC8_AIN_SLCDC1_DAT10 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8) 197#define PC8_AIN_SLCDC1_DAT10 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8)
204#define PC9_AIN_SLCDC1_DAT11 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9) 198#define PC9_AIN_SLCDC1_DAT11 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9)
205#define PC10_AIN_SLCDC1_DAT12 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10) 199#define PC10_AIN_SLCDC1_DAT12 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10)
206#define PC11_AIN_SLCDC1_DAT13 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11) 200#define PC11_AIN_SLCDC1_DAT13 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11)
207#define PC12_AIN_SLCDC1_DAT14 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12) 201#define PC12_AIN_SLCDC1_DAT14 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12)
208#define PC13_AIN_SLCDC1_DAT15 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13) 202#define PC13_AIN_SLCDC1_DAT15 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13)
209#define PE5_AIN_PC_SPKOUT (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5) 203#define PE5_AIN_PC_SPKOUT (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5)
210 204
211/* BIN GPIO pin functions */ 205/* BIN GPIO pin functions */
212 206
213#define PE5_BIN_TOUT2 (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5) 207#define PE5_BIN_TOUT2 (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5)
214 208
215/* CIN GPIO pin functions */ 209/* CIN GPIO pin functions */
216 210
217#define PA14_CIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14) 211#define PA14_CIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14)
218#define PA15_CIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15) 212#define PA15_CIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15)
219#define PA16_CIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16) 213#define PA16_CIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16)
220#define PA17_CIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17) 214#define PA17_CIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17)
221#define PA18_CIN_SLCDC1_DAT4 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18) 215#define PA18_CIN_SLCDC1_DAT4 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18)
222#define PA19_CIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19) 216#define PA19_CIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19)
223#define PA20_CIN_SLCDC1_DAT6 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20) 217#define PA20_CIN_SLCDC1_DAT6 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20)
224#define PA21_CIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21) 218#define PA21_CIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21)
225#define PB30_CIN_UART4_CTS (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30) 219#define PB30_CIN_UART4_CTS (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30)
226#define PE5_CIN_TOUT3 (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5) 220#define PE5_CIN_TOUT3 (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5)
227 221
228/* AOUT GPIO pin functions */ 222/* AOUT GPIO pin functions */
229 223
230#define PB29_AOUT_UART4_RXD (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29) 224#define PB29_AOUT_UART4_RXD (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29)
231#define PB31_AOUT_UART4_RTS (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31) 225#define PB31_AOUT_UART4_RTS (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31)
232#define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8) 226#define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8)
233#define PC15_AOUT_WKGD (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15) 227#define PC15_AOUT_WKGD (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15)
234#define PF21_AOUT_DTACK (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21) 228#define PF21_AOUT_DTACK (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21)
235
236 229
237#endif 230#endif /* ifndef __MACH_IOMUX_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index e1fc6da1cd10..e51465d7b224 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -16,12 +16,10 @@
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA. 17 * MA 02110-1301, USA.
18 */ 18 */
19 19#ifndef __MACH_IOMUX_MX3_H__
20#ifndef __MACH_MX31_IOMUX_H__ 20#define __MACH_IOMUX_MX3_H__
21#define __MACH_MX31_IOMUX_H__
22 21
23#include <linux/types.h> 22#include <linux/types.h>
24
25/* 23/*
26 * various IOMUX output functions 24 * various IOMUX output functions
27 */ 25 */
@@ -34,7 +32,7 @@
34#define IOMUX_OCONFIG_ALT4 (5 << 4) /* used as alternate function 4 */ 32#define IOMUX_OCONFIG_ALT4 (5 << 4) /* used as alternate function 4 */
35#define IOMUX_OCONFIG_ALT5 (6 << 4) /* used as alternate function 5 */ 33#define IOMUX_OCONFIG_ALT5 (6 << 4) /* used as alternate function 5 */
36#define IOMUX_OCONFIG_ALT6 (7 << 4) /* used as alternate function 6 */ 34#define IOMUX_OCONFIG_ALT6 (7 << 4) /* used as alternate function 6 */
37#define IOMUX_ICONFIG_NONE 0 /* not configured for input */ 35#define IOMUX_ICONFIG_NONE 0 /* not configured for input */
38#define IOMUX_ICONFIG_GPIO 1 /* used as GPIO */ 36#define IOMUX_ICONFIG_GPIO 1 /* used as GPIO */
39#define IOMUX_ICONFIG_FUNC 2 /* used as function */ 37#define IOMUX_ICONFIG_FUNC 2 /* used as function */
40#define IOMUX_ICONFIG_ALT1 4 /* used as alternate function 1 */ 38#define IOMUX_ICONFIG_ALT1 4 /* used as alternate function 1 */
@@ -167,11 +165,6 @@ int mxc_iomux_mode(unsigned int pin_mode);
167 MXC_GPIO_IRQ_START) 165 MXC_GPIO_IRQ_START)
168 166
169/* 167/*
170 * The number of gpio devices among the pads
171 */
172#define GPIO_PORT_MAX 3
173
174/*
175 * This enumeration is constructed based on the Section 168 * This enumeration is constructed based on the Section
176 * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated 169 * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated
177 * value is constructed based on the rules described above. 170 * value is constructed based on the rules described above.
@@ -633,40 +626,40 @@ enum iomux_pins {
633#define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) 626#define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
634#define MX31_PIN_CSI_D4__GPIO3_4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO) 627#define MX31_PIN_CSI_D4__GPIO3_4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO)
635#define MX31_PIN_CSI_D5__GPIO3_5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO) 628#define MX31_PIN_CSI_D5__GPIO3_5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO)
636#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC) 629#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
637#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC) 630#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
638#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC) 631#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
639#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3 IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC) 632#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3 IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
640#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4 IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC) 633#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4 IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
641#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5 IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC) 634#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5 IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
642#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6 IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC) 635#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6 IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
643#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7 IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC) 636#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7 IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
644#define MX31_PIN_USBOTG_CLK__USBOTG_CLK IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC) 637#define MX31_PIN_USBOTG_CLK__USBOTG_CLK IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
645#define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC) 638#define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
646#define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC) 639#define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
647#define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC) 640#define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
648#define MX31_PIN_CSPI1_MOSI__USBH1_RXDM IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1) 641#define MX31_PIN_CSPI1_MOSI__USBH1_RXDM IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1)
649#define MX31_PIN_CSPI1_MISO__USBH1_RXDP IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1) 642#define MX31_PIN_CSPI1_MISO__USBH1_RXDP IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1)
650#define MX31_PIN_CSPI1_SS0__USBH1_TXDM IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT1) 643#define MX31_PIN_CSPI1_SS0__USBH1_TXDM IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT1)
651#define MX31_PIN_CSPI1_SS1__USBH1_TXDP IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT1) 644#define MX31_PIN_CSPI1_SS1__USBH1_TXDP IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT1)
652#define MX31_PIN_CSPI1_SS2__USBH1_RCV IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1) 645#define MX31_PIN_CSPI1_SS2__USBH1_RCV IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1)
653#define MX31_PIN_CSPI1_SCLK__USBH1_OEB IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1) 646#define MX31_PIN_CSPI1_SCLK__USBH1_OEB IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1)
654#define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1) 647#define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1)
655#define MX31_PIN_SFS6__USBH1_SUSPEND IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC) 648#define MX31_PIN_SFS6__USBH1_SUSPEND IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC)
656#define MX31_PIN_NFRE_B__GPIO1_11 IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO) 649#define MX31_PIN_NFRE_B__GPIO1_11 IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO)
657#define MX31_PIN_NFALE__GPIO1_12 IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO) 650#define MX31_PIN_NFALE__GPIO1_12 IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO)
658#define MX31_PIN_USBH2_DATA0__USBH2_DATA0 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC) 651#define MX31_PIN_USBH2_DATA0__USBH2_DATA0 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)
659#define MX31_PIN_USBH2_DATA1__USBH2_DATA1 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC) 652#define MX31_PIN_USBH2_DATA1__USBH2_DATA1 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)
660#define MX31_PIN_STXD3__USBH2_DATA2 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC) 653#define MX31_PIN_STXD3__USBH2_DATA2 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC)
661#define MX31_PIN_SRXD3__USBH2_DATA3 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC) 654#define MX31_PIN_SRXD3__USBH2_DATA3 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC)
662#define MX31_PIN_SCK3__USBH2_DATA4 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC) 655#define MX31_PIN_SCK3__USBH2_DATA4 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC)
663#define MX31_PIN_SFS3__USBH2_DATA5 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC) 656#define MX31_PIN_SFS3__USBH2_DATA5 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC)
664#define MX31_PIN_STXD6__USBH2_DATA6 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC) 657#define MX31_PIN_STXD6__USBH2_DATA6 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC)
665#define MX31_PIN_SRXD6__USBH2_DATA7 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC) 658#define MX31_PIN_SRXD6__USBH2_DATA7 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC)
666#define MX31_PIN_USBH2_CLK__USBH2_CLK IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC) 659#define MX31_PIN_USBH2_CLK__USBH2_CLK IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)
667#define MX31_PIN_USBH2_DIR__USBH2_DIR IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC) 660#define MX31_PIN_USBH2_DIR__USBH2_DIR IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)
668#define MX31_PIN_USBH2_NXT__USBH2_NXT IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC) 661#define MX31_PIN_USBH2_NXT__USBH2_NXT IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)
669#define MX31_PIN_USBH2_STP__USBH2_STP IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC) 662#define MX31_PIN_USBH2_STP__USBH2_STP IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)
670#define MX31_PIN_SCK6__GPIO1_25 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO) 663#define MX31_PIN_SCK6__GPIO1_25 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO)
671#define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) 664#define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO)
672#define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) 665#define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
@@ -711,8 +704,8 @@ enum iomux_pins {
711#define MX31_PIN_DSR_DCE1__GPIO2_9 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_GPIO) 704#define MX31_PIN_DSR_DCE1__GPIO2_9 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_GPIO)
712#define MX31_PIN_RI_DCE1__GPIO2_10 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_GPIO) 705#define MX31_PIN_RI_DCE1__GPIO2_10 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_GPIO)
713#define MX31_PIN_DCD_DCE1__GPIO2_11 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO) 706#define MX31_PIN_DCD_DCE1__GPIO2_11 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO)
714#define MX31_PIN_STXD5__GPIO1_21 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO) 707#define MX31_PIN_STXD5__GPIO1_21 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO)
715#define MX31_PIN_SRXD5__GPIO1_22 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO) 708#define MX31_PIN_SRXD5__GPIO1_22 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO)
716#define MX31_PIN_GPIO1_3__GPIO1_3 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO) 709#define MX31_PIN_GPIO1_3__GPIO1_3 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO)
717#define MX31_PIN_CSPI2_SS1__CSPI3_SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1) 710#define MX31_PIN_CSPI2_SS1__CSPI3_SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1)
718#define MX31_PIN_RTS1__GPIO2_6 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO) 711#define MX31_PIN_RTS1__GPIO2_6 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO)
@@ -727,13 +720,14 @@ enum iomux_pins {
727#define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) 720#define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC)
728#define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) 721#define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC)
729 722
730/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 723/*
731 * cspi1_ss1*/ 724 * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0,
725 * cspi2_ss1, cspi1_ss0 cspi1_ss1
726 */
732 727
733/* 728/*
734 * This function configures the pad value for a IOMUX pin. 729 * This function configures the pad value for a IOMUX pin.
735 */ 730 */
736void mxc_iomux_set_pad(enum iomux_pins, u32); 731void mxc_iomux_set_pad(enum iomux_pins, u32);
737 732
738#endif 733#endif /* ifndef __MACH_IOMUX_MX3_H__ */
739
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h
index c88d40795f7a..2a24bae1b878 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> 2 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
3 * 3 *
4 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
new file mode 100644
index 000000000000..b4f975e6a665
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -0,0 +1,326 @@
1/*
2 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#ifndef __MACH_IOMUX_MX51_H__
13#define __MACH_IOMUX_MX51_H__
14
15#include <mach/iomux-v3.h>
16
17/*
18 * various IOMUX alternate output functions (1-7)
19 */
20typedef enum iomux_config {
21 IOMUX_CONFIG_ALT0,
22 IOMUX_CONFIG_ALT1,
23 IOMUX_CONFIG_ALT2,
24 IOMUX_CONFIG_ALT3,
25 IOMUX_CONFIG_ALT4,
26 IOMUX_CONFIG_ALT5,
27 IOMUX_CONFIG_ALT6,
28 IOMUX_CONFIG_ALT7,
29 IOMUX_CONFIG_GPIO, /* added to help user use GPIO mode */
30 IOMUX_CONFIG_SION = 0x1 << 4, /* LOOPBACK:MUX SION bit */
31} iomux_pin_cfg_t;
32
33/* Pad control groupings */
34#define MX51_UART1_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
35 PAD_CTL_DSE_HIGH)
36#define MX51_UART2_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \
37 PAD_CTL_SRE_FAST)
38#define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
39 PAD_CTL_SRE_FAST)
40
41/*
42 * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode>
43 * If <padname> or <padmode> refers to a GPIO, it is named
44 * GPIO_<unit>_<num> see also iomux-v3.h
45 */
46
47/*
48 * FIXME: This was converted using scripts from existing Freescale code to
49 * this form used upstream. Need to verify the name format.
50 */
51
52/* PAD MUX ALT INPSE PATH PADCTRL */
53
54#define MX51_PAD_GPIO_2_0__EIM_D16 IOMUX_PAD(0x3f0, 0x05c, 1, 0x0, 0, NO_PAD_CTRL)
55#define MX51_PAD_GPIO_2_1__EIM_D17 IOMUX_PAD(0x3f4, 0x060, 1, 0x0, 0, NO_PAD_CTRL)
56#define MX51_PAD_GPIO_2_2__EIM_D18 IOMUX_PAD(0x3f8, 0x064, 1, 0x0, 0, NO_PAD_CTRL)
57#define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL)
58#define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL)
59#define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL)
60#define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL)
61#define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL)
62
63/* Babbage UART3 */
64#define MX51_PAD_EIM_D24__UART3_CTS IOMUX_PAD(0x410, 0x07c, IOMUX_CONFIG_ALT3, 0x0, 0, MX51_UART3_PAD_CTRL)
65#define MX51_PAD_EIM_D25__UART3_RXD IOMUX_PAD(0x414, 0x080, IOMUX_CONFIG_ALT3, 0x9f4, 0, MX51_UART3_PAD_CTRL)
66#define MX51_PAD_EIM_D26__UART3_TXD IOMUX_PAD(0x418, 0x084, IOMUX_CONFIG_ALT3, 0x0, 0, MX51_UART3_PAD_CTRL)
67#define MX51_PAD_EIM_D27__UART3_RTS IOMUX_PAD(0x41c, 0x088, IOMUX_CONFIG_ALT3, 0x9f0, 0, MX51_UART3_PAD_CTRL)
68
69#define MX51_PAD_EIM_D28__EIM_D28 IOMUX_PAD(0x420, 0x08c, 0, 0x0, 0, NO_PAD_CTRL)
70#define MX51_PAD_EIM_D29__EIM_D29 IOMUX_PAD(0x424, 0x090, 0, 0x0, 0, NO_PAD_CTRL)
71#define MX51_PAD_EIM_D30__EIM_D30 IOMUX_PAD(0x428, 0x094, 0, 0x0, 0, NO_PAD_CTRL)
72#define MX51_PAD_EIM_D31__EIM_D31 IOMUX_PAD(0x42c, 0x09c, 0, 0x0, 0, NO_PAD_CTRL)
73
74#define MX51_PAD_GPIO_2_10__EIM_A16 IOMUX_PAD(0x430, 0x09c, 1, 0x0, 0, NO_PAD_CTRL)
75#define MX51_PAD_GPIO_2_11__EIM_A17 IOMUX_PAD(0x434, 0x0a0, 1, 0x0, 0, NO_PAD_CTRL)
76#define MX51_PAD_GPIO_2_12__EIM_A18 IOMUX_PAD(0x438, 0x0a4, 1, 0x0, 0, NO_PAD_CTRL)
77#define MX51_PAD_GPIO_2_13__EIM_A19 IOMUX_PAD(0x43c, 0x0a8, 1, 0x0, 0, NO_PAD_CTRL)
78#define MX51_PAD_GPIO_2_14__EIM_A20 IOMUX_PAD(0x440, 0x0ac, 1, 0x0, 0, NO_PAD_CTRL)
79#define MX51_PAD_GPIO_2_15__EIM_A21 IOMUX_PAD(0x444, 0x0b0, 1, 0x0, 0, NO_PAD_CTRL)
80#define MX51_PAD_GPIO_2_16__EIM_A22 IOMUX_PAD(0x448, 0x0b4, 1, 0x0, 0, NO_PAD_CTRL)
81#define MX51_PAD_GPIO_2_17__EIM_A23 IOMUX_PAD(0x44c, 0x0b8, 1, 0x0, 0, NO_PAD_CTRL)
82
83#define MX51_PAD_GPIO_2_18__EIM_A24 IOMUX_PAD(0x450, 0x0bc, 1, 0x0, 0, NO_PAD_CTRL)
84#define MX51_PAD_GPIO_2_19__EIM_A25 IOMUX_PAD(0x454, 0x0c0, 1, 0x0, 0, NO_PAD_CTRL)
85#define MX51_PAD_GPIO_2_20__EIM_A26 IOMUX_PAD(0x458, 0x0c4, 1, 0x0, 0, NO_PAD_CTRL)
86#define MX51_PAD_GPIO_2_21__EIM_A27 IOMUX_PAD(0x45c, 0x0c8, 1, 0x0, 0, NO_PAD_CTRL)
87#define MX51_PAD_EIM_EB0__EIM_EB0 IOMUX_PAD(0x460, 0x0cc, 0, 0x0, 0, NO_PAD_CTRL)
88#define MX51_PAD_EIM_EB1__EIM_EB1 IOMUX_PAD(0x464, 0x0d0, 0, 0x0, 0, NO_PAD_CTRL)
89#define MX51_PAD_GPIO_2_22__EIM_EB2 IOMUX_PAD(0x468, 0x0d4, 1, 0x0, 0, NO_PAD_CTRL)
90#define MX51_PAD_GPIO_2_23__EIM_EB3 IOMUX_PAD(0x46c, 0x0d8, 1, 0x0, 0, NO_PAD_CTRL)
91
92#define MX51_PAD_GPIO_2_24__EIM_OE IOMUX_PAD(0x470, 0x0dc, 1, 0x0, 0, NO_PAD_CTRL)
93#define MX51_PAD_GPIO_2_25__EIM_CS0 IOMUX_PAD(0x474, 0x0e0, 1, 0x0, 0, NO_PAD_CTRL)
94#define MX51_PAD_GPIO_2_26__EIM_CS1 IOMUX_PAD(0x478, 0x0e4, 1, 0x0, 0, NO_PAD_CTRL)
95#define MX51_PAD_GPIO_2_27__EIM_CS2 IOMUX_PAD(0x47c, 0x0e8, 1, 0x0, 0, NO_PAD_CTRL)
96#define MX51_PAD_GPIO_2_28__EIM_CS3 IOMUX_PAD(0x480, 0x0ec, 1, 0x0, 0, NO_PAD_CTRL)
97#define MX51_PAD_GPIO_2_29__EIM_CS4 IOMUX_PAD(0x484, 0x0f0, 1, 0x0, 0, NO_PAD_CTRL)
98#define MX51_PAD_GPIO_2_30__EIM_CS5 IOMUX_PAD(0x488, 0x0f4, 1, 0x0, 0, NO_PAD_CTRL)
99#define MX51_PAD_GPIO_2_31__EIM_DTACK IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, NO_PAD_CTRL)
100
101#define MX51_PAD_GPIO_3_1__EIM_LBA IOMUX_PAD(0x494, 0xFC, 1, 0x0, 0, NO_PAD_CTRL)
102#define MX51_PAD_GPIO_3_2__EIM_CRE IOMUX_PAD(0x4A0, 0x100, 1, 0x0, 0, NO_PAD_CTRL)
103#define MX51_PAD_DRAM_CS1__DRAM_CS1 IOMUX_PAD(0x4D0, 0x104, 0, 0x0, 0, NO_PAD_CTRL)
104#define MX51_PAD_GPIO_3_3__NANDF_WE_B IOMUX_PAD(0x4E4, 0x108, 3, 0x0, 0, NO_PAD_CTRL)
105#define MX51_PAD_GPIO_3_4__NANDF_RE_B IOMUX_PAD(0x4E8, 0x10C, 3, 0x0, 0, NO_PAD_CTRL)
106#define MX51_PAD_GPIO_3_5__NANDF_ALE IOMUX_PAD(0x4EC, 0x110, 3, 0x0, 0, NO_PAD_CTRL)
107#define MX51_PAD_GPIO_3_6__NANDF_CLE IOMUX_PAD(0x4F0, 0x114, 3, 0x0, 0, NO_PAD_CTRL)
108#define MX51_PAD_GPIO_3_7__NANDF_WP_B IOMUX_PAD(0x4F4, 0x118, 3, 0x0, 0, NO_PAD_CTRL)
109#define MX51_PAD_GPIO_3_8__NANDF_RB0 IOMUX_PAD(0x4F8, 0x11C, 3, 0x0, 0, NO_PAD_CTRL)
110#define MX51_PAD_GPIO_3_9__NANDF_RB1 IOMUX_PAD(0x4FC, 0x120, 3, 0x0, 0, NO_PAD_CTRL)
111#define MX51_PAD_GPIO_3_10__NANDF_RB2 IOMUX_PAD(0x500, 0x124, 3, 0x0, 0, NO_PAD_CTRL)
112#define MX51_PAD_GPIO_3_11__NANDF_RB3 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, NO_PAD_CTRL)
113#define MX51_PAD_GPIO_3_12__GPIO_NAND IOMUX_PAD(0x514, 0x12C, 3, 0x0, 0, NO_PAD_CTRL)
114/* REVISIT: Not sure of these values
115
116 #define MX51_PAD_GPIO_1___NANDF_RB4 IOMUX_PAD(, , , 0x0, 0, NO_PAD_CTRL)
117 #define MX51_PAD_GPIO_3_13__NANDF_RB5 IOMUX_PAD(0x5D8, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
118 #define MX51_PAD_GPIO_3_15__NANDF_RB7 IOMUX_PAD(0x5E0, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
119*/
120#define MX51_PAD_GPIO_3_14__NANDF_RB6 IOMUX_PAD(0x5DC, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
121#define MX51_PAD_GPIO_3_16__NANDF_CS0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
122#define MX51_PAD_GPIO_3_17__NANDF_CS1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
123#define MX51_PAD_GPIO_3_18__NANDF_CS2 IOMUX_PAD(0x520, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
124#define MX51_PAD_GPIO_3_19__NANDF_CS3 IOMUX_PAD(0x524, 0x13C, 3, 0x0, 0, NO_PAD_CTRL)
125#define MX51_PAD_GPIO_3_20__NANDF_CS4 IOMUX_PAD(0x528, 0x140, 3, 0x0, 0, NO_PAD_CTRL)
126#define MX51_PAD_GPIO_3_21__NANDF_CS5 IOMUX_PAD(0x52C, 0x144, 3, 0x0, 0, NO_PAD_CTRL)
127#define MX51_PAD_GPIO_3_22__NANDF_CS6 IOMUX_PAD(0x530, 0x148, 3, 0x0, 0, NO_PAD_CTRL)
128#define MX51_PAD_GPIO_3_23__NANDF_CS7 IOMUX_PAD(0x534, 0x14C, 3, 0x0, 0, NO_PAD_CTRL)
129#define MX51_PAD_GPIO_3_24__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 3, 0x0, 0, NO_PAD_CTRL)
130#define MX51_PAD_GPIO_3_25__NANDF_D15 IOMUX_PAD(0x53C, 0x154, 3, 0x0, 0, NO_PAD_CTRL)
131#define MX51_PAD_GPIO_3_26__NANDF_D14 IOMUX_PAD(0x540, 0x158, 3, 0x0, 0, NO_PAD_CTRL)
132#define MX51_PAD_GPIO_3_27__NANDF_D13 IOMUX_PAD(0x544, 0x15C, 3, 0x0, 0, NO_PAD_CTRL)
133#define MX51_PAD_GPIO_3_28__NANDF_D12 IOMUX_PAD(0x548, 0x160, 3, 0x0, 0, NO_PAD_CTRL)
134#define MX51_PAD_GPIO_3_29__NANDF_D11 IOMUX_PAD(0x54C, 0x164, 3, 0x0, 0, NO_PAD_CTRL)
135#define MX51_PAD_GPIO_3_30__NANDF_D10 IOMUX_PAD(0x550, 0x168, 3, 0x0, 0, NO_PAD_CTRL)
136#define MX51_PAD_GPIO_3_31__NANDF_D9 IOMUX_PAD(0x554, 0x16C, 3, 0x0, 0, NO_PAD_CTRL)
137#define MX51_PAD_GPIO_4_0__NANDF_D8 IOMUX_PAD(0x558, 0x170, 3, 0x0, 0, NO_PAD_CTRL)
138#define MX51_PAD_GPIO_4_1__NANDF_D7 IOMUX_PAD(0x55C, 0x174, 3, 0x0, 0, NO_PAD_CTRL)
139#define MX51_PAD_GPIO_4_2__NANDF_D6 IOMUX_PAD(0x560, 0x178, 3, 0x0, 0, NO_PAD_CTRL)
140#define MX51_PAD_GPIO_4_3__NANDF_D5 IOMUX_PAD(0x564, 0x17C, 3, 0x0, 0, NO_PAD_CTRL)
141#define MX51_PAD_GPIO_4_4__NANDF_D4 IOMUX_PAD(0x568, 0x180, 3, 0x0, 0, NO_PAD_CTRL)
142#define MX51_PAD_GPIO_4_5__NANDF_D3 IOMUX_PAD(0x56C, 0x184, 3, 0x0, 0, NO_PAD_CTRL)
143#define MX51_PAD_GPIO_4_6__NANDF_D2 IOMUX_PAD(0x570, 0x188, 3, 0x0, 0, NO_PAD_CTRL)
144#define MX51_PAD_GPIO_4_7__NANDF_D1 IOMUX_PAD(0x574, 0x18C, 3, 0x0, 0, NO_PAD_CTRL)
145#define MX51_PAD_GPIO_4_8__NANDF_D0 IOMUX_PAD(0x578, 0x190, 3, 0x0, 0, NO_PAD_CTRL)
146#define MX51_PAD_GPIO_3_12__CSI1_D8 IOMUX_PAD(0x57C, 0x194, 3, 0x0, 0, NO_PAD_CTRL)
147#define MX51_PAD_GPIO_3_13__CSI1_D9 IOMUX_PAD(0x580, 0x198, 3, 0x0, 0, NO_PAD_CTRL)
148#define MX51_PAD_CSI1_D10__CSI1_D10 IOMUX_PAD(0x584, 0x19C, 0, 0x0, 0, NO_PAD_CTRL)
149#define MX51_PAD_CSI1_D11__CSI1_D11 IOMUX_PAD(0x588, 0x1A0, 0, 0x0, 0, NO_PAD_CTRL)
150#define MX51_PAD_CSI1_D12__CSI1_D12 IOMUX_PAD(0x58C, 0x1A4, 0, 0x0, 0, NO_PAD_CTRL)
151#define MX51_PAD_CSI1_D13__CSI1_D13 IOMUX_PAD(0x590, 0x1A8, 0, 0x0, 0, NO_PAD_CTRL)
152#define MX51_PAD_CSI1_D14__CSI1_D14 IOMUX_PAD(0x594, 0x1AC, 0, 0x0, 0, NO_PAD_CTRL)
153#define MX51_PAD_CSI1_D15__CSI1_D15 IOMUX_PAD(0x598, 0x1B0, 0, 0x0, 0, NO_PAD_CTRL)
154#define MX51_PAD_CSI1_D16__CSI1_D16 IOMUX_PAD(0x59C, 0x1B4, 0, 0x0, 0, NO_PAD_CTRL)
155#define MX51_PAD_CSI1_D17__CSI1_D17 IOMUX_PAD(0x5A0, 0x1B8, 0, 0x0, 0, NO_PAD_CTRL)
156#define MX51_PAD_CSI1_D18__CSI1_D18 IOMUX_PAD(0x5A4, 0x1BC, 0, 0x0, 0, NO_PAD_CTRL)
157#define MX51_PAD_CSI1_D19__CSI1_D19 IOMUX_PAD(0x5A8, 0x1C0, 0, 0x0, 0, NO_PAD_CTRL)
158#define MX51_PAD_CSI1_VSYNC__CSI1_VSYNC IOMUX_PAD(0x5AC, 0x1C4, 0, 0x0, 0, NO_PAD_CTRL)
159#define MX51_PAD_CSI1_HSYNC__CSI1_HSYNC IOMUX_PAD(0x5B0, 0x1C8, 0, 0x0, 0, NO_PAD_CTRL)
160#define MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK IOMUX_PAD(0x5B4, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
161#define MX51_PAD_CSI1_MCLK__CSI1_MCLK IOMUX_PAD(0x5B8, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
162#define MX51_PAD_CSI1_PKE0__CSI1_PKE0 IOMUX_PAD(0x860, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
163#define MX51_PAD_GPIO_4_9__CSI2_D12 IOMUX_PAD(0x5BC, 0x1CC, 3, 0x0, 0, NO_PAD_CTRL)
164#define MX51_PAD_GPIO_4_10__CSI2_D13 IOMUX_PAD(0x5C0, 0x1D0, 3, 0x0, 0, NO_PAD_CTRL)
165#define MX51_PAD_GPIO_4_11__CSI2_D14 IOMUX_PAD(0x5C4, 0x1D4, 3, 0x0, 0, NO_PAD_CTRL)
166#define MX51_PAD_GPIO_4_12__CSI2_D15 IOMUX_PAD(0x5C8, 0x1D8, 3, 0x0, 0, NO_PAD_CTRL)
167#define MX51_PAD_GPIO_4_11__CSI2_D16 IOMUX_PAD(0x5CC, 0x1DC, 3, 0x0, 0, NO_PAD_CTRL)
168#define MX51_PAD_GPIO_4_12__CSI2_D17 IOMUX_PAD(0x5D0, 0x1E0, 3, 0x0, 0, NO_PAD_CTRL)
169#define MX51_PAD_GPIO_4_11__CSI2_D18 IOMUX_PAD(0x5D4, 0x1E4, 3, 0x0, 0, NO_PAD_CTRL)
170#define MX51_PAD_GPIO_4_12__CSI2_D19 IOMUX_PAD(0x5D8, 0x1E8, 3, 0x0, 0, NO_PAD_CTRL)
171#define MX51_PAD_GPIO_4_13__CSI2_VSYNC IOMUX_PAD(0x5DC, 0x1EC, 3, 0x0, 0, NO_PAD_CTRL)
172#define MX51_PAD_GPIO_4_14__CSI2_HSYNC IOMUX_PAD(0x5E0, 0x1F0, 3, 0x0, 0, NO_PAD_CTRL)
173#define MX51_PAD_GPIO_4_15__CSI2_PIXCLK IOMUX_PAD(0x5E4, 0x1F4, 3, 0x0, 0, NO_PAD_CTRL)
174#define MX51_PAD_CSI2_PKE0__CSI2_PKE0 IOMUX_PAD(0x81C, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
175#define MX51_PAD_GPIO_4_16__I2C1_CLK IOMUX_PAD(0x5E8, 0x1F8, 3, 0x0, 0, NO_PAD_CTRL)
176#define MX51_PAD_GPIO_4_17__I2C1_DAT IOMUX_PAD(0x5EC, 0x1FC, 3, 0x0, 0, NO_PAD_CTRL)
177#define MX51_PAD_GPIO_4_18__AUD3_BB_TXD IOMUX_PAD(0x5F0, 0x200, 3, 0x0, 0, NO_PAD_CTRL)
178#define MX51_PAD_GPIO_4_19__AUD3_BB_RXD IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL)
179#define MX51_PAD_GPIO_4_20__AUD3_BB_CK IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL)
180#define MX51_PAD_GPIO_4_21__AUD3_BB_FS IOMUX_PAD(0x5FC, 0x20C, 3, 0x0, 0, NO_PAD_CTRL)
181#define MX51_PAD_GPIO_4_22__CSPI1_MOSI IOMUX_PAD(0x600, 0x210, 3, 0x0, 0, NO_PAD_CTRL)
182#define MX51_PAD_GPIO_4_23__CSPI1_MISO IOMUX_PAD(0x604, 0x214, 3, 0x0, 0, NO_PAD_CTRL)
183#define MX51_PAD_GPIO_4_24__CSPI1_SS0 IOMUX_PAD(0x608, 0x218, 3, 0x0, 0, NO_PAD_CTRL)
184#define MX51_PAD_GPIO_4_25__CSPI1_SS1 IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, NO_PAD_CTRL)
185#define MX51_PAD_GPIO_4_26__CSPI1_RDY IOMUX_PAD(0x610, 0x220, 3, 0x0, 0, NO_PAD_CTRL)
186#define MX51_PAD_GPIO_4_27__CSPI1_SCLK IOMUX_PAD(0x614, 0x224, 3, 0x0, 0, NO_PAD_CTRL)
187
188/* Babbage UART1 */
189#define MX51_PAD_UART1_RXD__UART1_RXD IOMUX_PAD(0x618, 0x228, IOMUX_CONFIG_ALT0, 0x9e4, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST)
190#define MX51_PAD_UART1_TXD__UART1_TXD IOMUX_PAD(0x61C, 0x22C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST)
191#define MX51_PAD_UART1_RTS__UART1_RTS IOMUX_PAD(0x620, 0x230, IOMUX_CONFIG_ALT0, 0x9e0, 0, MX51_UART1_PAD_CTRL)
192#define MX51_PAD_UART1_CTS__UART1_CTS IOMUX_PAD(0x624, 0x234, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART1_PAD_CTRL)
193
194/* Babbage UART2 */
195#define MX51_PAD_UART2_RXD__UART2_RXD IOMUX_PAD(0x628, 0x238, IOMUX_CONFIG_ALT0, 0x9ec, 2, MX51_UART2_PAD_CTRL)
196#define MX51_PAD_UART2_TXD__UART2_TXD IOMUX_PAD(0x62C, 0x23C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART2_PAD_CTRL)
197
198#define MX51_PAD_GPIO_1_22__UART3_RXD IOMUX_PAD(0x630, 0x240, 3, 0x0, 0, NO_PAD_CTRL)
199#define MX51_PAD_GPIO_1_23__UART3_TXD IOMUX_PAD(0x634, 0x244, 3, 0x0, 0, NO_PAD_CTRL)
200#define MX51_PAD_GPIO_1_24__OWIRE_LINE IOMUX_PAD(0x638, 0x248, 3, 0x0, 0, NO_PAD_CTRL)
201#define MX51_PAD_KEY_ROW0__KEY_ROW0 IOMUX_PAD(0x63C, 0x24C, 0, 0x0, 0, NO_PAD_CTRL)
202#define MX51_PAD_KEY_ROW1__KEY_ROW1 IOMUX_PAD(0x640, 0x250, 0, 0x0, 0, NO_PAD_CTRL)
203#define MX51_PAD_KEY_ROW2__KEY_ROW2 IOMUX_PAD(0x644, 0x254, 0, 0x0, 0, NO_PAD_CTRL)
204#define MX51_PAD_KEY_ROW3__KEY_ROW3 IOMUX_PAD(0x648, 0x258, 0, 0x0, 0, NO_PAD_CTRL)
205#define MX51_PAD_KEY_COL0__KEY_COL0 IOMUX_PAD(0x64C, 0x25C, 0, 0x0, 0, NO_PAD_CTRL)
206#define MX51_PAD_KEY_COL1__KEY_COL1 IOMUX_PAD(0x650, 0x260, 0, 0x0, 0, NO_PAD_CTRL)
207#define MX51_PAD_KEY_COL2__KEY_COL2 IOMUX_PAD(0x654, 0x264, 0, 0x0, 0, NO_PAD_CTRL)
208#define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL)
209#define MX51_PAD_KEY_COL4__KEY_COL4 IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL)
210#define MX51_PAD_KEY_COL5__KEY_COL5 IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL)
211#define MX51_PAD_GPIO_1_25__USBH1_CLK IOMUX_PAD(0x678, 0x278, 2, 0x0, 0, NO_PAD_CTRL)
212#define MX51_PAD_GPIO_1_26__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, 2, 0x0, 0, NO_PAD_CTRL)
213#define MX51_PAD_GPIO_1_27__USBH1_STP IOMUX_PAD(0x680, 0x280, 2, 0x0, 0, NO_PAD_CTRL)
214#define MX51_PAD_GPIO_1_28__USBH1_NXT IOMUX_PAD(0x684, 0x284, 2, 0x0, 0, NO_PAD_CTRL)
215#define MX51_PAD_GPIO_1_11__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, 2, 0x0, 0, NO_PAD_CTRL)
216#define MX51_PAD_GPIO_1_12__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, 2, 0x0, 0, NO_PAD_CTRL)
217#define MX51_PAD_GPIO_1_13__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, 2, 0x0, 0, NO_PAD_CTRL)
218#define MX51_PAD_GPIO_1_14__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, 2, 0x0, 0, NO_PAD_CTRL)
219#define MX51_PAD_GPIO_1_15__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, 2, 0x0, 0, NO_PAD_CTRL)
220#define MX51_PAD_GPIO_1_16__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, 2, 0x0, 0, NO_PAD_CTRL)
221#define MX51_PAD_GPIO_1_17__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 2, 0x0, 0, NO_PAD_CTRL)
222#define MX51_PAD_GPIO_1_18__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 2, 0x0, 0, NO_PAD_CTRL)
223#define MX51_PAD_GPIO_3_0__DI1_PIN11 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL)
224#define MX51_PAD_GPIO_3_1__DI1_PIN12 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL)
225#define MX51_PAD_GPIO_3_2__DI1_PIN13 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL)
226#define MX51_PAD_GPIO_3_3__DI1_D0_CS IOMUX_PAD(0x6B4, 0x2B4, 4, 0x0, 0, NO_PAD_CTRL)
227#define MX51_PAD_GPIO_3_4__DI1_D1_CS IOMUX_PAD(0x6B8, 0x2B8, 4, 0x0, 0, NO_PAD_CTRL)
228#define MX51_PAD_GPIO_3_5__DISPB2_SER_DIN IOMUX_PAD(0x6BC, 0x2BC, 4, 0x0, 0, NO_PAD_CTRL)
229#define MX51_PAD_GPIO_3_6__DISPB2_SER_DIO IOMUX_PAD(0x6C0, 0x2C0, 4, 0x0, 0, NO_PAD_CTRL)
230#define MX51_PAD_GPIO_3_7__DISPB2_SER_CLK IOMUX_PAD(0x6C4, 0x2C4, 4, 0x0, 0, NO_PAD_CTRL)
231#define MX51_PAD_GPIO_3_8__DISPB2_SER_RS IOMUX_PAD(0x6C8, 0x2C8, 4, 0x0, 0, NO_PAD_CTRL)
232#define MX51_PAD_DISP1_DAT0__DISP1_DAT0 IOMUX_PAD(0x6CC, 0x2CC, 0, 0x0, 0, NO_PAD_CTRL)
233#define MX51_PAD_DISP1_DAT1__DISP1_DAT1 IOMUX_PAD(0x6D0, 0x2D0, 0, 0x0, 0, NO_PAD_CTRL)
234#define MX51_PAD_DISP1_DAT2__DISP1_DAT2 IOMUX_PAD(0x6D4, 0x2D4, 0, 0x0, 0, NO_PAD_CTRL)
235#define MX51_PAD_DISP1_DAT3__DISP1_DAT3 IOMUX_PAD(0x6D8, 0x2D8, 0, 0x0, 0, NO_PAD_CTRL)
236#define MX51_PAD_DISP1_DAT4__DISP1_DAT4 IOMUX_PAD(0x6DC, 0x2DC, 0, 0x0, 0, NO_PAD_CTRL)
237#define MX51_PAD_DISP1_DAT5__DISP1_DAT5 IOMUX_PAD(0x6E0, 0x2E0, 0, 0x0, 0, NO_PAD_CTRL)
238#define MX51_PAD_DISP1_DAT6__DISP1_DAT6 IOMUX_PAD(0x6E4, 0x2E4, 0, 0x0, 0, NO_PAD_CTRL)
239#define MX51_PAD_DISP1_DAT7__DISP1_DAT7 IOMUX_PAD(0x6E8, 0x2E8, 0, 0x0, 0, NO_PAD_CTRL)
240#define MX51_PAD_DISP1_DAT8__DISP1_DAT8 IOMUX_PAD(0x6EC, 0x2EC, 0, 0x0, 0, NO_PAD_CTRL)
241#define MX51_PAD_DISP1_DAT9__DISP1_DAT9 IOMUX_PAD(0x6F0, 0x2F0, 0, 0x0, 0, NO_PAD_CTRL)
242#define MX51_PAD_DISP1_DAT10__DISP1_DAT10 IOMUX_PAD(0x6F4, 0x2F4, 0, 0x0, 0, NO_PAD_CTRL)
243#define MX51_PAD_DISP1_DAT11__DISP1_DAT11 IOMUX_PAD(0x6F8, 0x2F8, 0, 0x0, 0, NO_PAD_CTRL)
244#define MX51_PAD_DISP1_DAT12__DISP1_DAT12 IOMUX_PAD(0x6FC, 0x2FC, 0, 0x0, 0, NO_PAD_CTRL)
245#define MX51_PAD_DISP1_DAT13__DISP1_DAT13 IOMUX_PAD(0x700, 0x300, 0, 0x0, 0, NO_PAD_CTRL)
246#define MX51_PAD_DISP1_DAT14__DISP1_DAT14 IOMUX_PAD(0x704, 0x304, 0, 0x0, 0, NO_PAD_CTRL)
247#define MX51_PAD_DISP1_DAT15__DISP1_DAT15 IOMUX_PAD(0x708, 0x308, 0, 0x0, 0, NO_PAD_CTRL)
248#define MX51_PAD_DISP1_DAT16__DISP1_DAT16 IOMUX_PAD(0x70C, 0x30C, 0, 0x0, 0, NO_PAD_CTRL)
249#define MX51_PAD_DISP1_DAT17__DISP1_DAT17 IOMUX_PAD(0x710, 0x310, 0, 0x0, 0, NO_PAD_CTRL)
250#define MX51_PAD_DISP1_DAT18__DISP1_DAT18 IOMUX_PAD(0x714, 0x314, 0, 0x0, 0, NO_PAD_CTRL)
251#define MX51_PAD_DISP1_DAT19__DISP1_DAT19 IOMUX_PAD(0x718, 0x318, 0, 0x0, 0, NO_PAD_CTRL)
252#define MX51_PAD_DISP1_DAT20__DISP1_DAT20 IOMUX_PAD(0x71C, 0x31C, 0, 0x0, 0, NO_PAD_CTRL)
253#define MX51_PAD_DISP1_DAT21__DISP1_DAT21 IOMUX_PAD(0x720, 0x320, 0, 0x0, 0, NO_PAD_CTRL)
254#define MX51_PAD_DISP1_DAT22__DISP1_DAT22 IOMUX_PAD(0x724, 0x324, 0, 0x0, 0, NO_PAD_CTRL)
255#define MX51_PAD_DISP1_DAT23__DISP1_DAT23 IOMUX_PAD(0x728, 0x328, 0, 0x0, 0, NO_PAD_CTRL)
256#define MX51_PAD_DI1_PIN3__DI1_PIN3 IOMUX_PAD(0x72C, 0x32C, 0, 0x0, 0, NO_PAD_CTRL)
257#define MX51_PAD_DI1_PIN2__DI1_PIN2 IOMUX_PAD(0x734, 0x330, 0, 0x0, 0, NO_PAD_CTRL)
258#define MX51_PAD_DI_GP1__DI_GP1 IOMUX_PAD(0x73C, 0x334, 0, 0x0, 0, NO_PAD_CTRL)
259#define MX51_PAD_DI_GP2__DI_GP2 IOMUX_PAD(0x740, 0x338, 0, 0x0, 0, NO_PAD_CTRL)
260#define MX51_PAD_DI_GP3__DI_GP3 IOMUX_PAD(0x744, 0x33C, 0, 0x0, 0, NO_PAD_CTRL)
261#define MX51_PAD_DI2_PIN4__DI2_PIN4 IOMUX_PAD(0x748, 0x340, 0, 0x0, 0, NO_PAD_CTRL)
262#define MX51_PAD_DI2_PIN2__DI2_PIN2 IOMUX_PAD(0x74C, 0x344, 0, 0x0, 0, NO_PAD_CTRL)
263#define MX51_PAD_DI2_PIN3__DI2_PIN3 IOMUX_PAD(0x750, 0x348, 0, 0x0, 0, NO_PAD_CTRL)
264#define MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK IOMUX_PAD(0x754, 0x34C, 0, 0x0, 0, NO_PAD_CTRL)
265#define MX51_PAD_DI_GP4__DI_GP4 IOMUX_PAD(0x758, 0x350, 0, 0x0, 0, NO_PAD_CTRL)
266#define MX51_PAD_DISP2_DAT0__DISP2_DAT0 IOMUX_PAD(0x75C, 0x354, 0, 0x0, 0, NO_PAD_CTRL)
267#define MX51_PAD_DISP2_DAT1__DISP2_DAT1 IOMUX_PAD(0x760, 0x358, 0, 0x0, 0, NO_PAD_CTRL)
268#define MX51_PAD_DISP2_DAT2__DISP2_DAT2 IOMUX_PAD(0x764, 0x35C, 0, 0x0, 0, NO_PAD_CTRL)
269#define MX51_PAD_DISP2_DAT3__DISP2_DAT3 IOMUX_PAD(0x768, 0x360, 0, 0x0, 0, NO_PAD_CTRL)
270#define MX51_PAD_DISP2_DAT4__DISP2_DAT4 IOMUX_PAD(0x76C, 0x364, 0, 0x0, 0, NO_PAD_CTRL)
271#define MX51_PAD_DISP2_DAT5__DISP2_DAT5 IOMUX_PAD(0x770, 0x368, 0, 0x0, 0, NO_PAD_CTRL)
272#define MX51_PAD_GPIO_1_19__DISP2_DAT6 IOMUX_PAD(0x774, 0x36C, 5, 0x0, 0, NO_PAD_CTRL)
273#define MX51_PAD_GPIO_1_29__DISP2_DAT7 IOMUX_PAD(0x778, 0x370, 5, 0x0, 0, NO_PAD_CTRL)
274#define MX51_PAD_GPIO_1_30__DISP2_DAT8 IOMUX_PAD(0x77C, 0x374, 5, 0x0, 0, NO_PAD_CTRL)
275#define MX51_PAD_GPIO_1_31__DISP2_DAT9 IOMUX_PAD(0x780, 0x378, 5, 0x0, 0, NO_PAD_CTRL)
276#define MX51_PAD_DISP2_DAT10__DISP2_DAT10 IOMUX_PAD(0x784, 0x37C, 0, 0x0, 0, NO_PAD_CTRL)
277#define MX51_PAD_DISP2_DAT11__DISP2_DAT11 IOMUX_PAD(0x788, 0x380, 0, 0x0, 0, NO_PAD_CTRL)
278#define MX51_PAD_DISP2_DAT12__DISP2_DAT12 IOMUX_PAD(0x78C, 0x384, 0, 0x0, 0, NO_PAD_CTRL)
279#define MX51_PAD_DISP2_DAT13__DISP2_DAT13 IOMUX_PAD(0x790, 0x388, 0, 0x0, 0, NO_PAD_CTRL)
280#define MX51_PAD_DISP2_DAT14__DISP2_DAT14 IOMUX_PAD(0x794, 0x38C, 0, 0x0, 0, NO_PAD_CTRL)
281#define MX51_PAD_DISP2_DAT15__DISP2_DAT15 IOMUX_PAD(0x798, 0x390, 0, 0x0, 0, NO_PAD_CTRL)
282#define MX51_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x79C, 0x394, 0, 0x0, 0, NO_PAD_CTRL)
283#define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0, 0x0, 0, NO_PAD_CTRL)
284#define MX51_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x7A4, 0x39C, 0, 0x0, 0, NO_PAD_CTRL)
285#define MX51_PAD_SD1_DATA1__SD1_DATA1 IOMUX_PAD(0x7A8, 0x3A0, 0, 0x0, 0, NO_PAD_CTRL)
286#define MX51_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x7AC, 0x3A4, 0, 0x0, 0, NO_PAD_CTRL)
287#define MX51_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x7B0, 0x3A8, 0, 0x0, 0, NO_PAD_CTRL)
288#define MX51_PAD_GPIO_1_0__GPIO1_0 IOMUX_PAD(0x7B4, 0x3AC, 1, 0x0, 0, NO_PAD_CTRL)
289#define MX51_PAD_GPIO_1_1__GPIO1_1 IOMUX_PAD(0x7B8, 0x3B0, 1, 0x0, 0, NO_PAD_CTRL)
290#define MX51_PAD_SD2_CMD__SD2_CMD IOMUX_PAD(0x7BC, 0x3B4, 0, 0x0, 0, NO_PAD_CTRL)
291#define MX51_PAD_SD2_CLK__SD2_CLK IOMUX_PAD(0x7C0, 0x3B8, 0, 0x0, 0, NO_PAD_CTRL)
292#define MX51_PAD_SD2_DATA0__SD2_DATA0 IOMUX_PAD(0x7C4, 0x3BC, 0, 0x0, 0, NO_PAD_CTRL)
293#define MX51_PAD_SD2_DATA1__SD2_DATA1 IOMUX_PAD(0x7C8, 0x3C0, 0, 0x0, 0, NO_PAD_CTRL)
294#define MX51_PAD_SD2_DATA2__SD2_DATA2 IOMUX_PAD(0x7CC, 0x3C4, 0, 0x0, 0, NO_PAD_CTRL)
295#define MX51_PAD_SD2_DATA3__SD2_DATA3 IOMUX_PAD(0x7D0, 0x3C8, 0, 0x0, 0, NO_PAD_CTRL)
296#define MX51_PAD_GPIO_1_2__GPIO1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
297#define MX51_PAD_GPIO_1_3__GPIO1_3 IOMUX_PAD(0x7D8, 0x3D0, 0, 0x0, 0, NO_PAD_CTRL)
298#define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0, 0, NO_PAD_CTRL)
299#define MX51_PAD_GPIO_1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL)
300#define MX51_PAD_GPIO_1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL)
301#define MX51_PAD_GPIO_1_6__GPIO1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL)
302#define MX51_PAD_GPIO_1_7__GPIO1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, NO_PAD_CTRL)
303#define MX51_PAD_GPIO_1_8__GPIO1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \
304 (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS))
305#define MX51_PAD_GPIO_1_9__GPIO1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL)
306
307/* EIM */
308#define MX51_PAD_EIM_DA0__EIM_DA0 IOMUX_PAD(0x7a8, 0x01c, 0, 0x0, 0, NO_PAD_CTRL)
309#define MX51_PAD_EIM_DA1__EIM_DA1 IOMUX_PAD(0x7a8, 0x020, 0, 0x0, 0, NO_PAD_CTRL)
310#define MX51_PAD_EIM_DA2__EIM_DA2 IOMUX_PAD(0x7a8, 0x024, 0, 0x0, 0, NO_PAD_CTRL)
311#define MX51_PAD_EIM_DA3__EIM_DA3 IOMUX_PAD(0x7a8, 0x028, 0, 0x0, 0, NO_PAD_CTRL)
312#define MX51_PAD_EIM_DA4__EIM_DA4 IOMUX_PAD(0x7ac, 0x02c, 0, 0x0, 0, NO_PAD_CTRL)
313#define MX51_PAD_EIM_DA5__EIM_DA5 IOMUX_PAD(0x7ac, 0x030, 0, 0x0, 0, NO_PAD_CTRL)
314#define MX51_PAD_EIM_DA6__EIM_DA6 IOMUX_PAD(0x7ac, 0x034, 0, 0x0, 0, NO_PAD_CTRL)
315#define MX51_PAD_EIM_DA7__EIM_DA7 IOMUX_PAD(0x7ac, 0x038, 0, 0x0, 0, NO_PAD_CTRL)
316
317#define MX51_PAD_EIM_DA8__EIM_DA8 IOMUX_PAD(0x7b0, 0x03c, 0, 0x0, 0, NO_PAD_CTRL)
318#define MX51_PAD_EIM_DA9__EIM_DA9 IOMUX_PAD(0x7b0, 0x040, 0, 0x0, 0, NO_PAD_CTRL)
319#define MX51_PAD_EIM_DA10__EIM_DA10 IOMUX_PAD(0x7b0, 0x044, 0, 0x0, 0, NO_PAD_CTRL)
320#define MX51_PAD_EIM_DA11__EIM_DA11 IOMUX_PAD(0x7b0, 0x048, 0, 0x0, 0, NO_PAD_CTRL)
321#define MX51_PAD_EIM_DA12__EIM_DA12 IOMUX_PAD(0x7bc, 0x04c, 0, 0x0, 0, NO_PAD_CTRL)
322#define MX51_PAD_EIM_DA13__EIM_DA13 IOMUX_PAD(0x7bc, 0x050, 0, 0x0, 0, NO_PAD_CTRL)
323#define MX51_PAD_EIM_DA14__EIM_DA14 IOMUX_PAD(0x7bc, 0x054, 0, 0x0, 0, NO_PAD_CTRL)
324#define MX51_PAD_EIM_DA15__EIM_DA15 IOMUX_PAD(0x7bc, 0x058, 0, 0x0, 0, NO_PAD_CTRL)
325
326#endif /* __MACH_IOMUX_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
new file mode 100644
index 000000000000..884f5753f279
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -0,0 +1,103 @@
1/*
2 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
3 * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19#ifndef __MACH_IOMUX_V1_H__
20#define __MACH_IOMUX_V1_H__
21
22/*
23* GPIO Module and I/O Multiplexer
24* x = 0..3 for reg_A, reg_B, reg_C, reg_D
25*/
26#define MXC_DDIR(x) (0x00 + ((x) << 8))
27#define MXC_OCR1(x) (0x04 + ((x) << 8))
28#define MXC_OCR2(x) (0x08 + ((x) << 8))
29#define MXC_ICONFA1(x) (0x0c + ((x) << 8))
30#define MXC_ICONFA2(x) (0x10 + ((x) << 8))
31#define MXC_ICONFB1(x) (0x14 + ((x) << 8))
32#define MXC_ICONFB2(x) (0x18 + ((x) << 8))
33#define MXC_DR(x) (0x1c + ((x) << 8))
34#define MXC_GIUS(x) (0x20 + ((x) << 8))
35#define MXC_SSR(x) (0x24 + ((x) << 8))
36#define MXC_ICR1(x) (0x28 + ((x) << 8))
37#define MXC_ICR2(x) (0x2c + ((x) << 8))
38#define MXC_IMR(x) (0x30 + ((x) << 8))
39#define MXC_ISR(x) (0x34 + ((x) << 8))
40#define MXC_GPR(x) (0x38 + ((x) << 8))
41#define MXC_SWR(x) (0x3c + ((x) << 8))
42#define MXC_PUEN(x) (0x40 + ((x) << 8))
43
44#define MX1_NUM_GPIO_PORT 4
45#define MX21_NUM_GPIO_PORT 6
46#define MX27_NUM_GPIO_PORT 6
47
48#define GPIO_PIN_MASK 0x1f
49
50#define GPIO_PORT_SHIFT 5
51#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
52
53#define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
54#define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
55#define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
56#define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
57#define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
58#define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
59
60#define GPIO_OUT (1 << 8)
61#define GPIO_IN (0 << 8)
62#define GPIO_PUEN (1 << 9)
63
64#define GPIO_PF (1 << 10)
65#define GPIO_AF (1 << 11)
66
67#define GPIO_OCR_SHIFT 12
68#define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT)
69#define GPIO_AIN (0 << GPIO_OCR_SHIFT)
70#define GPIO_BIN (1 << GPIO_OCR_SHIFT)
71#define GPIO_CIN (2 << GPIO_OCR_SHIFT)
72#define GPIO_GPIO (3 << GPIO_OCR_SHIFT)
73
74#define GPIO_AOUT_SHIFT 14
75#define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT)
76#define GPIO_AOUT (0 << GPIO_AOUT_SHIFT)
77#define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT)
78#define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT)
79#define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT)
80
81#define GPIO_BOUT_SHIFT 16
82#define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT)
83#define GPIO_BOUT (0 << GPIO_BOUT_SHIFT)
84#define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT)
85#define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT)
86#define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT)
87
88/* decode irq number to use with IMR(x), ISR(x) and friends */
89#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
90
91#define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x)
92#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x)
93#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x)
94#define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x)
95#define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x)
96#define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x)
97
98extern int mxc_gpio_mode(int gpio_mode);
99extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
100 const char *label);
101extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
102
103#endif /* __MACH_IOMUX_V1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 1deda0184892..f2f73d31d5ba 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -81,11 +81,13 @@ struct pad_desc {
81 81
82#define PAD_CTL_ODE (1 << 3) 82#define PAD_CTL_ODE (1 << 3)
83 83
84#define PAD_CTL_DSE_STANDARD (0 << 1) 84#define PAD_CTL_DSE_LOW (0 << 1)
85#define PAD_CTL_DSE_HIGH (1 << 1) 85#define PAD_CTL_DSE_MED (1 << 1)
86#define PAD_CTL_DSE_MAX (2 << 1) 86#define PAD_CTL_DSE_HIGH (2 << 1)
87#define PAD_CTL_DSE_MAX (3 << 1)
87 88
88#define PAD_CTL_SRE_FAST (1 << 0) 89#define PAD_CTL_SRE_FAST (1 << 0)
90#define PAD_CTL_SRE_SLOW (0 << 0)
89 91
90/* 92/*
91 * setups a single pad in the iomuxer 93 * setups a single pad in the iomuxer
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h
index 011cfcd8b820..3d226d7e7be2 100644
--- a/arch/arm/plat-mxc/include/mach/iomux.h
+++ b/arch/arm/plat-mxc/include/mach/iomux.h
@@ -1,102 +1,14 @@
1/* 1/*
2* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> 2 * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix
3* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de> 3 *
4* 4 * This program is free software; you can redistribute it and/or modify it
5* This program is free software; you can redistribute it and/or 5 * under the terms of the GNU General Public License version 2 as published by
6* modify it under the terms of the GNU General Public License 6 * the Free Software Foundation.
7* as published by the Free Software Foundation; either version 2 7 */
8* of the License, or (at your option) any later version. 8#ifndef __MACH_IOMUX_H__
9* This program is distributed in the hope that it will be useful, 9#define __MACH_IOMUX_H__
10* but WITHOUT ANY WARRANTY; without even the implied warranty of
11* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12* GNU General Public License for more details.
13*
14* You should have received a copy of the GNU General Public License
15* along with this program; if not, write to the Free Software
16* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17* MA 02110-1301, USA.
18*/
19
20#ifndef _MXC_IOMUX_H
21#define _MXC_IOMUX_H
22
23/*
24* GPIO Module and I/O Multiplexer
25* x = 0..3 for reg_A, reg_B, reg_C, reg_D
26*/
27#define VA_GPIO_BASE IO_ADDRESS(GPIO_BASE_ADDR)
28#define MXC_DDIR(x) (0x00 + ((x) << 8))
29#define MXC_OCR1(x) (0x04 + ((x) << 8))
30#define MXC_OCR2(x) (0x08 + ((x) << 8))
31#define MXC_ICONFA1(x) (0x0c + ((x) << 8))
32#define MXC_ICONFA2(x) (0x10 + ((x) << 8))
33#define MXC_ICONFB1(x) (0x14 + ((x) << 8))
34#define MXC_ICONFB2(x) (0x18 + ((x) << 8))
35#define MXC_DR(x) (0x1c + ((x) << 8))
36#define MXC_GIUS(x) (0x20 + ((x) << 8))
37#define MXC_SSR(x) (0x24 + ((x) << 8))
38#define MXC_ICR1(x) (0x28 + ((x) << 8))
39#define MXC_ICR2(x) (0x2c + ((x) << 8))
40#define MXC_IMR(x) (0x30 + ((x) << 8))
41#define MXC_ISR(x) (0x34 + ((x) << 8))
42#define MXC_GPR(x) (0x38 + ((x) << 8))
43#define MXC_SWR(x) (0x3c + ((x) << 8))
44#define MXC_PUEN(x) (0x40 + ((x) << 8))
45
46#ifdef CONFIG_ARCH_MX1
47# define GPIO_PORT_MAX 3
48#endif
49#ifdef CONFIG_ARCH_MX2
50# define GPIO_PORT_MAX 5
51#endif
52#ifdef CONFIG_ARCH_MX25
53# define GPIO_PORT_MAX 3
54#endif
55
56#ifndef GPIO_PORT_MAX
57# error "GPIO config port count unknown!"
58#endif
59
60#define GPIO_PIN_MASK 0x1f
61
62#define GPIO_PORT_SHIFT 5
63#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
64
65#define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
66#define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
67#define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
68#define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
69#define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
70#define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
71
72#define GPIO_OUT (1 << 8)
73#define GPIO_IN (0 << 8)
74#define GPIO_PUEN (1 << 9)
75
76#define GPIO_PF (1 << 10)
77#define GPIO_AF (1 << 11)
78
79#define GPIO_OCR_SHIFT 12
80#define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT)
81#define GPIO_AIN (0 << GPIO_OCR_SHIFT)
82#define GPIO_BIN (1 << GPIO_OCR_SHIFT)
83#define GPIO_CIN (2 << GPIO_OCR_SHIFT)
84#define GPIO_GPIO (3 << GPIO_OCR_SHIFT)
85
86#define GPIO_AOUT_SHIFT 14
87#define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT)
88#define GPIO_AOUT (0 << GPIO_AOUT_SHIFT)
89#define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT)
90#define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT)
91#define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT)
92
93#define GPIO_BOUT_SHIFT 16
94#define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT)
95#define GPIO_BOUT (0 << GPIO_BOUT_SHIFT)
96#define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT)
97#define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT)
98#define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT)
99 10
11/* This file will go away, please include mach/iomux-mx... directly */
100 12
101#ifdef CONFIG_ARCH_MX1 13#ifdef CONFIG_ARCH_MX1
102#include <mach/iomux-mx1.h> 14#include <mach/iomux-mx1.h>
@@ -110,25 +22,5 @@
110#include <mach/iomux-mx27.h> 22#include <mach/iomux-mx27.h>
111#endif 23#endif
112#endif 24#endif
113#ifdef CONFIG_ARCH_MX25
114#include <mach/iomux-mx25.h>
115#endif
116 25
117 26#endif /* __MACH_IOMUX_H__ */
118/* decode irq number to use with IMR(x), ISR(x) and friends */
119#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
120
121#define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x)
122#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x)
123#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x)
124#define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x)
125#define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x)
126#define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x)
127
128
129extern void mxc_gpio_mode(int gpio_mode);
130extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
131 const char *label);
132extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
133
134#endif
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 0cb347645db4..86781f7b0c0c 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,22 +12,29 @@
12#define __ASM_ARCH_MXC_IRQS_H__ 12#define __ASM_ARCH_MXC_IRQS_H__
13 13
14/* 14/*
15 * So far all i.MX SoCs have 64 internal interrupts 15 * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
16 */ 16 */
17#ifdef CONFIG_MXC_TZIC
18#define MXC_INTERNAL_IRQS 128
19#else
17#define MXC_INTERNAL_IRQS 64 20#define MXC_INTERNAL_IRQS 64
21#endif
18 22
19#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS 23#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS
20 24
21#if defined CONFIG_ARCH_MX1 25/* these are ordered by size to support multi-SoC kernels */
22#define MXC_GPIO_IRQS (32 * 4) 26#if defined CONFIG_ARCH_MX2
23#elif defined CONFIG_ARCH_MX2
24#define MXC_GPIO_IRQS (32 * 6) 27#define MXC_GPIO_IRQS (32 * 6)
25#elif defined CONFIG_ARCH_MX3 28#elif defined CONFIG_ARCH_MX1
26#define MXC_GPIO_IRQS (32 * 3) 29#define MXC_GPIO_IRQS (32 * 4)
27#elif defined CONFIG_ARCH_MX25 30#elif defined CONFIG_ARCH_MX25
28#define MXC_GPIO_IRQS (32 * 4) 31#define MXC_GPIO_IRQS (32 * 4)
32#elif defined CONFIG_ARCH_MX5
33#define MXC_GPIO_IRQS (32 * 4)
29#elif defined CONFIG_ARCH_MXC91231 34#elif defined CONFIG_ARCH_MXC91231
30#define MXC_GPIO_IRQS (32 * 4) 35#define MXC_GPIO_IRQS (32 * 4)
36#elif defined CONFIG_ARCH_MX3
37#define MXC_GPIO_IRQS (32 * 3)
31#endif 38#endif
32 39
33/* 40/*
@@ -51,6 +58,7 @@
51#else 58#else
52#define MX3_IPU_IRQS 0 59#define MX3_IPU_IRQS 0
53#endif 60#endif
61/* REVISIT: Add IPU irqs on IMX51 */
54 62
55#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) 63#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
56 64
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index d3afafdcc0e5..c4b40c35a6a1 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -11,37 +11,45 @@
11#ifndef __ASM_ARCH_MXC_MEMORY_H__ 11#ifndef __ASM_ARCH_MXC_MEMORY_H__
12#define __ASM_ARCH_MXC_MEMORY_H__ 12#define __ASM_ARCH_MXC_MEMORY_H__
13 13
14#if defined CONFIG_ARCH_MX1 14#define MX1_PHYS_OFFSET UL(0x08000000)
15#define PHYS_OFFSET UL(0x08000000) 15#define MX21_PHYS_OFFSET UL(0xc0000000)
16#elif defined CONFIG_ARCH_MX2 16#define MX25_PHYS_OFFSET UL(0x80000000)
17#ifdef CONFIG_MACH_MX21 17#define MX27_PHYS_OFFSET UL(0xa0000000)
18#define PHYS_OFFSET UL(0xC0000000) 18#define MX3x_PHYS_OFFSET UL(0x80000000)
19#endif 19#define MX51_PHYS_OFFSET UL(0x90000000)
20#ifdef CONFIG_MACH_MX27 20#define MXC91231_PHYS_OFFSET UL(0x90000000)
21#define PHYS_OFFSET UL(0xA0000000) 21
22#endif 22#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
23#elif defined CONFIG_ARCH_MX3 23# if defined CONFIG_ARCH_MX1
24#define PHYS_OFFSET UL(0x80000000) 24# define PHYS_OFFSET MX1_PHYS_OFFSET
25#elif defined CONFIG_ARCH_MX25 25# elif defined CONFIG_MACH_MX21
26#define PHYS_OFFSET UL(0x80000000) 26# define PHYS_OFFSET MX21_PHYS_OFFSET
27#elif defined CONFIG_ARCH_MXC91231 27# elif defined CONFIG_ARCH_MX25
28#define PHYS_OFFSET UL(0x90000000) 28# define PHYS_OFFSET MX25_PHYS_OFFSET
29# elif defined CONFIG_MACH_MX27
30# define PHYS_OFFSET MX27_PHYS_OFFSET
31# elif defined CONFIG_ARCH_MX3
32# define PHYS_OFFSET MX3x_PHYS_OFFSET
33# elif defined CONFIG_ARCH_MXC91231
34# define PHYS_OFFSET MXC91231_PHYS_OFFSET
35# elif defined CONFIG_ARCH_MX5
36# define PHYS_OFFSET MX51_PHYS_OFFSET
37# endif
29#endif 38#endif
30 39
31#if defined(CONFIG_MX1_VIDEO) 40#if defined(CONFIG_MX3_VIDEO)
32/* 41/*
33 * Increase size of DMA-consistent memory region. 42 * Increase size of DMA-consistent memory region.
34 * This is required for i.MX camera driver to capture at least four VGA frames. 43 * This is required for mx3 camera driver to capture at least two QXGA frames.
35 */ 44 */
36#define CONSISTENT_DMA_SIZE SZ_4M 45#define CONSISTENT_DMA_SIZE SZ_8M
37#endif /* CONFIG_MX1_VIDEO */
38 46
39#if defined(CONFIG_MX3_VIDEO) 47#elif defined(CONFIG_MX1_VIDEO)
40/* 48/*
41 * Increase size of DMA-consistent memory region. 49 * Increase size of DMA-consistent memory region.
42 * This is required for mx3 camera driver to capture at least two QXGA frames. 50 * This is required for i.MX camera driver to capture at least four VGA frames.
43 */ 51 */
44#define CONSISTENT_DMA_SIZE SZ_8M 52#define CONSISTENT_DMA_SIZE SZ_4M
45#endif /* CONFIG_MX3_VIDEO */ 53#endif /* CONFIG_MX1_VIDEO */
46 54
47#endif /* __ASM_ARCH_MXC_MEMORY_H__ */ 55#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mtd-xip.h b/arch/arm/plat-mxc/include/mach/mtd-xip.h
deleted file mode 100644
index 1ab1bba5688d..000000000000
--- a/arch/arm/plat-mxc/include/mach/mtd-xip.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * MTD primitives for XIP support. Architecture specific functions
3 *
4 * Do not include this file directly. It's included from linux/mtd/xip.h
5 *
6 * Copyright (C) 2008 Darius Augulis <augulis.darius@gmail.com>, Teltonika, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <mach/mxc_timer.h>
15
16#ifndef __ARCH_IMX_MTD_XIP_H__
17#define __ARCH_IMX_MTD_XIP_H__
18
19#ifdef CONFIG_ARCH_MX1
20/* AITC registers */
21#define AITC_BASE IO_ADDRESS(AVIC_BASE_ADDR)
22#define NIPNDH (AITC_BASE + 0x58)
23#define NIPNDL (AITC_BASE + 0x5C)
24#define INTENABLEH (AITC_BASE + 0x10)
25#define INTENABLEL (AITC_BASE + 0x14)
26/* MTD macros */
27#define xip_irqpending() ((__raw_readl(INTENABLEH) & __raw_readl(NIPNDH)) \
28 || (__raw_readl(INTENABLEL) & __raw_readl(NIPNDL)))
29#define xip_currtime() (__raw_readl(TIMER_BASE + MXC_TCN))
30#define xip_elapsed_since(x) (signed)((__raw_readl(TIMER_BASE + MXC_TCN) - (x)) / 96)
31#define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (0))
32#endif /* CONFIG_ARCH_MX1 */
33
34#endif /* __ARCH_IMX_MTD_XIP_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 1b2890a5c452..5eba7e6785de 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -9,156 +9,289 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#ifndef __ASM_ARCH_MXC_MX1_H__ 12#ifndef __MACH_MX1_H__
13#define __ASM_ARCH_MXC_MX1_H__ 13#define __MACH_MX1_H__
14 14
15#include <mach/vmalloc.h> 15#include <mach/vmalloc.h>
16 16
17/* 17/*
18 * Memory map 18 * Memory map
19 */ 19 */
20#define IMX_IO_PHYS 0x00200000 20#define MX1_IO_BASE_ADDR 0x00200000
21#define IMX_IO_SIZE 0x00100000 21#define MX1_IO_SIZE SZ_1M
22#define IMX_IO_BASE VMALLOC_END 22#define MX1_IO_BASE_ADDR_VIRT VMALLOC_END
23 23
24#define IMX_CS0_PHYS 0x10000000 24#define MX1_CS0_PHYS 0x10000000
25#define IMX_CS0_SIZE 0x02000000 25#define MX1_CS0_SIZE 0x02000000
26 26
27#define IMX_CS1_PHYS 0x12000000 27#define MX1_CS1_PHYS 0x12000000
28#define IMX_CS1_SIZE 0x01000000 28#define MX1_CS1_SIZE 0x01000000
29 29
30#define IMX_CS2_PHYS 0x13000000 30#define MX1_CS2_PHYS 0x13000000
31#define IMX_CS2_SIZE 0x01000000 31#define MX1_CS2_SIZE 0x01000000
32 32
33#define IMX_CS3_PHYS 0x14000000 33#define MX1_CS3_PHYS 0x14000000
34#define IMX_CS3_SIZE 0x01000000 34#define MX1_CS3_SIZE 0x01000000
35 35
36#define IMX_CS4_PHYS 0x15000000 36#define MX1_CS4_PHYS 0x15000000
37#define IMX_CS4_SIZE 0x01000000 37#define MX1_CS4_SIZE 0x01000000
38 38
39#define IMX_CS5_PHYS 0x16000000 39#define MX1_CS5_PHYS 0x16000000
40#define IMX_CS5_SIZE 0x01000000 40#define MX1_CS5_SIZE 0x01000000
41 41
42/* 42/*
43 * Register BASEs, based on OFFSETs 43 * Register BASEs, based on OFFSETs
44 */ 44 */
45#define AIPI1_BASE_ADDR (0x00000 + IMX_IO_PHYS) 45#define MX1_AIPI1_BASE_ADDR (0x00000 + MX1_IO_BASE_ADDR)
46#define WDT_BASE_ADDR (0x01000 + IMX_IO_PHYS) 46#define MX1_WDT_BASE_ADDR (0x01000 + MX1_IO_BASE_ADDR)
47#define TIM1_BASE_ADDR (0x02000 + IMX_IO_PHYS) 47#define MX1_TIM1_BASE_ADDR (0x02000 + MX1_IO_BASE_ADDR)
48#define TIM2_BASE_ADDR (0x03000 + IMX_IO_PHYS) 48#define MX1_TIM2_BASE_ADDR (0x03000 + MX1_IO_BASE_ADDR)
49#define RTC_BASE_ADDR (0x04000 + IMX_IO_PHYS) 49#define MX1_RTC_BASE_ADDR (0x04000 + MX1_IO_BASE_ADDR)
50#define LCDC_BASE_ADDR (0x05000 + IMX_IO_PHYS) 50#define MX1_LCDC_BASE_ADDR (0x05000 + MX1_IO_BASE_ADDR)
51#define UART1_BASE_ADDR (0x06000 + IMX_IO_PHYS) 51#define MX1_UART1_BASE_ADDR (0x06000 + MX1_IO_BASE_ADDR)
52#define UART2_BASE_ADDR (0x07000 + IMX_IO_PHYS) 52#define MX1_UART2_BASE_ADDR (0x07000 + MX1_IO_BASE_ADDR)
53#define PWM_BASE_ADDR (0x08000 + IMX_IO_PHYS) 53#define MX1_PWM_BASE_ADDR (0x08000 + MX1_IO_BASE_ADDR)
54#define DMA_BASE_ADDR (0x09000 + IMX_IO_PHYS) 54#define MX1_DMA_BASE_ADDR (0x09000 + MX1_IO_BASE_ADDR)
55#define AIPI2_BASE_ADDR (0x10000 + IMX_IO_PHYS) 55#define MX1_AIPI2_BASE_ADDR (0x10000 + MX1_IO_BASE_ADDR)
56#define SIM_BASE_ADDR (0x11000 + IMX_IO_PHYS) 56#define MX1_SIM_BASE_ADDR (0x11000 + MX1_IO_BASE_ADDR)
57#define USBD_BASE_ADDR (0x12000 + IMX_IO_PHYS) 57#define MX1_USBD_BASE_ADDR (0x12000 + MX1_IO_BASE_ADDR)
58#define SPI1_BASE_ADDR (0x13000 + IMX_IO_PHYS) 58#define MX1_SPI1_BASE_ADDR (0x13000 + MX1_IO_BASE_ADDR)
59#define MMC_BASE_ADDR (0x14000 + IMX_IO_PHYS) 59#define MX1_MMC_BASE_ADDR (0x14000 + MX1_IO_BASE_ADDR)
60#define ASP_BASE_ADDR (0x15000 + IMX_IO_PHYS) 60#define MX1_ASP_BASE_ADDR (0x15000 + MX1_IO_BASE_ADDR)
61#define BTA_BASE_ADDR (0x16000 + IMX_IO_PHYS) 61#define MX1_BTA_BASE_ADDR (0x16000 + MX1_IO_BASE_ADDR)
62#define I2C_BASE_ADDR (0x17000 + IMX_IO_PHYS) 62#define MX1_I2C_BASE_ADDR (0x17000 + MX1_IO_BASE_ADDR)
63#define SSI_BASE_ADDR (0x18000 + IMX_IO_PHYS) 63#define MX1_SSI_BASE_ADDR (0x18000 + MX1_IO_BASE_ADDR)
64#define SPI2_BASE_ADDR (0x19000 + IMX_IO_PHYS) 64#define MX1_SPI2_BASE_ADDR (0x19000 + MX1_IO_BASE_ADDR)
65#define MSHC_BASE_ADDR (0x1A000 + IMX_IO_PHYS) 65#define MX1_MSHC_BASE_ADDR (0x1A000 + MX1_IO_BASE_ADDR)
66#define CCM_BASE_ADDR (0x1B000 + IMX_IO_PHYS) 66#define MX1_CCM_BASE_ADDR (0x1B000 + MX1_IO_BASE_ADDR)
67#define SCM_BASE_ADDR (0x1B804 + IMX_IO_PHYS) 67#define MX1_SCM_BASE_ADDR (0x1B804 + MX1_IO_BASE_ADDR)
68#define GPIO_BASE_ADDR (0x1C000 + IMX_IO_PHYS) 68#define MX1_GPIO_BASE_ADDR (0x1C000 + MX1_IO_BASE_ADDR)
69#define EIM_BASE_ADDR (0x20000 + IMX_IO_PHYS) 69#define MX1_EIM_BASE_ADDR (0x20000 + MX1_IO_BASE_ADDR)
70#define SDRAMC_BASE_ADDR (0x21000 + IMX_IO_PHYS) 70#define MX1_SDRAMC_BASE_ADDR (0x21000 + MX1_IO_BASE_ADDR)
71#define MMA_BASE_ADDR (0x22000 + IMX_IO_PHYS) 71#define MX1_MMA_BASE_ADDR (0x22000 + MX1_IO_BASE_ADDR)
72#define AVIC_BASE_ADDR (0x23000 + IMX_IO_PHYS) 72#define MX1_AVIC_BASE_ADDR (0x23000 + MX1_IO_BASE_ADDR)
73#define CSI_BASE_ADDR (0x24000 + IMX_IO_PHYS) 73#define MX1_CSI_BASE_ADDR (0x24000 + MX1_IO_BASE_ADDR)
74 74
75/* macro to get at IO space when running virtually */ 75/* macro to get at IO space when running virtually */
76#define IO_ADDRESS(x) ((x) - IMX_IO_PHYS + IMX_IO_BASE) 76#define MX1_IO_ADDRESS(x) ( \
77 77 IMX_IO_ADDRESS(x, MX1_IO))
78/* define macros needed for entry-macro.S */
79#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
80 78
81/* fixed interrput numbers */ 79/* fixed interrput numbers */
82#define INT_SOFTINT 0 80#define MX1_INT_SOFTINT 0
83#define CSI_INT 6 81#define MX1_CSI_INT 6
84#define DSPA_MAC_INT 7 82#define MX1_DSPA_MAC_INT 7
85#define DSPA_INT 8 83#define MX1_DSPA_INT 8
86#define COMP_INT 9 84#define MX1_COMP_INT 9
87#define MSHC_XINT 10 85#define MX1_MSHC_XINT 10
88#define GPIO_INT_PORTA 11 86#define MX1_GPIO_INT_PORTA 11
89#define GPIO_INT_PORTB 12 87#define MX1_GPIO_INT_PORTB 12
90#define GPIO_INT_PORTC 13 88#define MX1_GPIO_INT_PORTC 13
91#define LCDC_INT 14 89#define MX1_LCDC_INT 14
92#define SIM_INT 15 90#define MX1_SIM_INT 15
93#define SIM_DATA_INT 16 91#define MX1_SIM_DATA_INT 16
94#define RTC_INT 17 92#define MX1_RTC_INT 17
95#define RTC_SAMINT 18 93#define MX1_RTC_SAMINT 18
96#define UART2_MINT_PFERR 19 94#define MX1_UART2_MINT_PFERR 19
97#define UART2_MINT_RTS 20 95#define MX1_UART2_MINT_RTS 20
98#define UART2_MINT_DTR 21 96#define MX1_UART2_MINT_DTR 21
99#define UART2_MINT_UARTC 22 97#define MX1_UART2_MINT_UARTC 22
100#define UART2_MINT_TX 23 98#define MX1_UART2_MINT_TX 23
101#define UART2_MINT_RX 24 99#define MX1_UART2_MINT_RX 24
102#define UART1_MINT_PFERR 25 100#define MX1_UART1_MINT_PFERR 25
103#define UART1_MINT_RTS 26 101#define MX1_UART1_MINT_RTS 26
104#define UART1_MINT_DTR 27 102#define MX1_UART1_MINT_DTR 27
105#define UART1_MINT_UARTC 28 103#define MX1_UART1_MINT_UARTC 28
106#define UART1_MINT_TX 29 104#define MX1_UART1_MINT_TX 29
107#define UART1_MINT_RX 30 105#define MX1_UART1_MINT_RX 30
108#define VOICE_DAC_INT 31 106#define MX1_VOICE_DAC_INT 31
109#define VOICE_ADC_INT 32 107#define MX1_VOICE_ADC_INT 32
110#define PEN_DATA_INT 33 108#define MX1_PEN_DATA_INT 33
111#define PWM_INT 34 109#define MX1_PWM_INT 34
112#define SDHC_INT 35 110#define MX1_SDHC_INT 35
113#define I2C_INT 39 111#define MX1_I2C_INT 39
114#define CSPI_INT 41 112#define MX1_CSPI_INT 41
115#define SSI_TX_INT 42 113#define MX1_SSI_TX_INT 42
116#define SSI_TX_ERR_INT 43 114#define MX1_SSI_TX_ERR_INT 43
117#define SSI_RX_INT 44 115#define MX1_SSI_RX_INT 44
118#define SSI_RX_ERR_INT 45 116#define MX1_SSI_RX_ERR_INT 45
119#define TOUCH_INT 46 117#define MX1_TOUCH_INT 46
120#define USBD_INT0 47 118#define MX1_USBD_INT0 47
121#define USBD_INT1 48 119#define MX1_USBD_INT1 48
122#define USBD_INT2 49 120#define MX1_USBD_INT2 49
123#define USBD_INT3 50 121#define MX1_USBD_INT3 50
124#define USBD_INT4 51 122#define MX1_USBD_INT4 51
125#define USBD_INT5 52 123#define MX1_USBD_INT5 52
126#define USBD_INT6 53 124#define MX1_USBD_INT6 53
127#define BTSYS_INT 55 125#define MX1_BTSYS_INT 55
128#define BTTIM_INT 56 126#define MX1_BTTIM_INT 56
129#define BTWUI_INT 57 127#define MX1_BTWUI_INT 57
130#define TIM2_INT 58 128#define MX1_TIM2_INT 58
131#define TIM1_INT 59 129#define MX1_TIM1_INT 59
132#define DMA_ERR 60 130#define MX1_DMA_ERR 60
133#define DMA_INT 61 131#define MX1_DMA_INT 61
134#define GPIO_INT_PORTD 62 132#define MX1_GPIO_INT_PORTD 62
135#define WDT_INT 63 133#define MX1_WDT_INT 63
136 134
137/* DMA */ 135/* DMA */
138#define DMA_REQ_UART3_T 2 136#define MX1_DMA_REQ_UART3_T 2
139#define DMA_REQ_UART3_R 3 137#define MX1_DMA_REQ_UART3_R 3
140#define DMA_REQ_SSI2_T 4 138#define MX1_DMA_REQ_SSI2_T 4
141#define DMA_REQ_SSI2_R 5 139#define MX1_DMA_REQ_SSI2_R 5
142#define DMA_REQ_CSI_STAT 6 140#define MX1_DMA_REQ_CSI_STAT 6
143#define DMA_REQ_CSI_R 7 141#define MX1_DMA_REQ_CSI_R 7
144#define DMA_REQ_MSHC 8 142#define MX1_DMA_REQ_MSHC 8
145#define DMA_REQ_DSPA_DCT_DOUT 9 143#define MX1_DMA_REQ_DSPA_DCT_DOUT 9
146#define DMA_REQ_DSPA_DCT_DIN 10 144#define MX1_DMA_REQ_DSPA_DCT_DIN 10
147#define DMA_REQ_DSPA_MAC 11 145#define MX1_DMA_REQ_DSPA_MAC 11
148#define DMA_REQ_EXT 12 146#define MX1_DMA_REQ_EXT 12
149#define DMA_REQ_SDHC 13 147#define MX1_DMA_REQ_SDHC 13
150#define DMA_REQ_SPI1_R 14 148#define MX1_DMA_REQ_SPI1_R 14
151#define DMA_REQ_SPI1_T 15 149#define MX1_DMA_REQ_SPI1_T 15
152#define DMA_REQ_SSI_T 16 150#define MX1_DMA_REQ_SSI_T 16
153#define DMA_REQ_SSI_R 17 151#define MX1_DMA_REQ_SSI_R 17
154#define DMA_REQ_ASP_DAC 18 152#define MX1_DMA_REQ_ASP_DAC 18
155#define DMA_REQ_ASP_ADC 19 153#define MX1_DMA_REQ_ASP_ADC 19
156#define DMA_REQ_USP_EP(x) (20 + (x)) 154#define MX1_DMA_REQ_USP_EP(x) (20 + (x))
157#define DMA_REQ_SPI2_R 26 155#define MX1_DMA_REQ_SPI2_R 26
158#define DMA_REQ_SPI2_T 27 156#define MX1_DMA_REQ_SPI2_T 27
159#define DMA_REQ_UART2_T 28 157#define MX1_DMA_REQ_UART2_T 28
160#define DMA_REQ_UART2_R 29 158#define MX1_DMA_REQ_UART2_R 29
161#define DMA_REQ_UART1_T 30 159#define MX1_DMA_REQ_UART1_T 30
162#define DMA_REQ_UART1_R 31 160#define MX1_DMA_REQ_UART1_R 31
163 161
164#endif /* __ASM_ARCH_MXC_MX1_H__ */ 162/*
163 * This doesn't depend on IMX_NEEDS_DEPRECATED_SYMBOLS
164 * to not break drivers/usb/gadget/imx_udc. Should go
165 * away after this driver uses the new name.
166 */
167#define USBD_INT0 MX1_USBD_INT0
168
169#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
170/* these should go away */
171#define IMX_IO_PHYS MX1_IO_BASE_ADDR
172#define IMX_IO_SIZE MX1_IO_SIZE
173#define IMX_IO_BASE MX1_IO_BASE_ADDR_VIRT
174#define IMX_CS0_PHYS MX1_CS0_PHYS
175#define IMX_CS0_SIZE MX1_CS0_SIZE
176#define IMX_CS1_PHYS MX1_CS1_PHYS
177#define IMX_CS1_SIZE MX1_CS1_SIZE
178#define IMX_CS2_PHYS MX1_CS2_PHYS
179#define IMX_CS2_SIZE MX1_CS2_SIZE
180#define IMX_CS3_PHYS MX1_CS3_PHYS
181#define IMX_CS3_SIZE MX1_CS3_SIZE
182#define IMX_CS4_PHYS MX1_CS4_PHYS
183#define IMX_CS4_SIZE MX1_CS4_SIZE
184#define IMX_CS5_PHYS MX1_CS5_PHYS
185#define IMX_CS5_SIZE MX1_CS5_SIZE
186#define AIPI1_BASE_ADDR MX1_AIPI1_BASE_ADDR
187#define WDT_BASE_ADDR MX1_WDT_BASE_ADDR
188#define TIM1_BASE_ADDR MX1_TIM1_BASE_ADDR
189#define TIM2_BASE_ADDR MX1_TIM2_BASE_ADDR
190#define RTC_BASE_ADDR MX1_RTC_BASE_ADDR
191#define LCDC_BASE_ADDR MX1_LCDC_BASE_ADDR
192#define UART1_BASE_ADDR MX1_UART1_BASE_ADDR
193#define UART2_BASE_ADDR MX1_UART2_BASE_ADDR
194#define PWM_BASE_ADDR MX1_PWM_BASE_ADDR
195#define DMA_BASE_ADDR MX1_DMA_BASE_ADDR
196#define AIPI2_BASE_ADDR MX1_AIPI2_BASE_ADDR
197#define SIM_BASE_ADDR MX1_SIM_BASE_ADDR
198#define USBD_BASE_ADDR MX1_USBD_BASE_ADDR
199#define SPI1_BASE_ADDR MX1_SPI1_BASE_ADDR
200#define MMC_BASE_ADDR MX1_MMC_BASE_ADDR
201#define ASP_BASE_ADDR MX1_ASP_BASE_ADDR
202#define BTA_BASE_ADDR MX1_BTA_BASE_ADDR
203#define I2C_BASE_ADDR MX1_I2C_BASE_ADDR
204#define SSI_BASE_ADDR MX1_SSI_BASE_ADDR
205#define SPI2_BASE_ADDR MX1_SPI2_BASE_ADDR
206#define MSHC_BASE_ADDR MX1_MSHC_BASE_ADDR
207#define CCM_BASE_ADDR MX1_CCM_BASE_ADDR
208#define SCM_BASE_ADDR MX1_SCM_BASE_ADDR
209#define GPIO_BASE_ADDR MX1_GPIO_BASE_ADDR
210#define EIM_BASE_ADDR MX1_EIM_BASE_ADDR
211#define SDRAMC_BASE_ADDR MX1_SDRAMC_BASE_ADDR
212#define MMA_BASE_ADDR MX1_MMA_BASE_ADDR
213#define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR
214#define CSI_BASE_ADDR MX1_CSI_BASE_ADDR
215#define IO_ADDRESS(x) MX1_IO_ADDRESS(x)
216#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
217#define INT_SOFTINT MX1_INT_SOFTINT
218#define CSI_INT MX1_CSI_INT
219#define DSPA_MAC_INT MX1_DSPA_MAC_INT
220#define DSPA_INT MX1_DSPA_INT
221#define COMP_INT MX1_COMP_INT
222#define MSHC_XINT MX1_MSHC_XINT
223#define GPIO_INT_PORTA MX1_GPIO_INT_PORTA
224#define GPIO_INT_PORTB MX1_GPIO_INT_PORTB
225#define GPIO_INT_PORTC MX1_GPIO_INT_PORTC
226#define LCDC_INT MX1_LCDC_INT
227#define SIM_INT MX1_SIM_INT
228#define SIM_DATA_INT MX1_SIM_DATA_INT
229#define RTC_INT MX1_RTC_INT
230#define RTC_SAMINT MX1_RTC_SAMINT
231#define UART2_MINT_PFERR MX1_UART2_MINT_PFERR
232#define UART2_MINT_RTS MX1_UART2_MINT_RTS
233#define UART2_MINT_DTR MX1_UART2_MINT_DTR
234#define UART2_MINT_UARTC MX1_UART2_MINT_UARTC
235#define UART2_MINT_TX MX1_UART2_MINT_TX
236#define UART2_MINT_RX MX1_UART2_MINT_RX
237#define UART1_MINT_PFERR MX1_UART1_MINT_PFERR
238#define UART1_MINT_RTS MX1_UART1_MINT_RTS
239#define UART1_MINT_DTR MX1_UART1_MINT_DTR
240#define UART1_MINT_UARTC MX1_UART1_MINT_UARTC
241#define UART1_MINT_TX MX1_UART1_MINT_TX
242#define UART1_MINT_RX MX1_UART1_MINT_RX
243#define VOICE_DAC_INT MX1_VOICE_DAC_INT
244#define VOICE_ADC_INT MX1_VOICE_ADC_INT
245#define PEN_DATA_INT MX1_PEN_DATA_INT
246#define PWM_INT MX1_PWM_INT
247#define SDHC_INT MX1_SDHC_INT
248#define I2C_INT MX1_I2C_INT
249#define CSPI_INT MX1_CSPI_INT
250#define SSI_TX_INT MX1_SSI_TX_INT
251#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT
252#define SSI_RX_INT MX1_SSI_RX_INT
253#define SSI_RX_ERR_INT MX1_SSI_RX_ERR_INT
254#define TOUCH_INT MX1_TOUCH_INT
255#define USBD_INT1 MX1_USBD_INT1
256#define USBD_INT2 MX1_USBD_INT2
257#define USBD_INT3 MX1_USBD_INT3
258#define USBD_INT4 MX1_USBD_INT4
259#define USBD_INT5 MX1_USBD_INT5
260#define USBD_INT6 MX1_USBD_INT6
261#define BTSYS_INT MX1_BTSYS_INT
262#define BTTIM_INT MX1_BTTIM_INT
263#define BTWUI_INT MX1_BTWUI_INT
264#define TIM2_INT MX1_TIM2_INT
265#define TIM1_INT MX1_TIM1_INT
266#define DMA_ERR MX1_DMA_ERR
267#define DMA_INT MX1_DMA_INT
268#define GPIO_INT_PORTD MX1_GPIO_INT_PORTD
269#define WDT_INT MX1_WDT_INT
270#define DMA_REQ_UART3_T MX1_DMA_REQ_UART3_T
271#define DMA_REQ_UART3_R MX1_DMA_REQ_UART3_R
272#define DMA_REQ_SSI2_T MX1_DMA_REQ_SSI2_T
273#define DMA_REQ_SSI2_R MX1_DMA_REQ_SSI2_R
274#define DMA_REQ_CSI_STAT MX1_DMA_REQ_CSI_STAT
275#define DMA_REQ_CSI_R MX1_DMA_REQ_CSI_R
276#define DMA_REQ_MSHC MX1_DMA_REQ_MSHC
277#define DMA_REQ_DSPA_DCT_DOUT MX1_DMA_REQ_DSPA_DCT_DOUT
278#define DMA_REQ_DSPA_DCT_DIN MX1_DMA_REQ_DSPA_DCT_DIN
279#define DMA_REQ_DSPA_MAC MX1_DMA_REQ_DSPA_MAC
280#define DMA_REQ_EXT MX1_DMA_REQ_EXT
281#define DMA_REQ_SDHC MX1_DMA_REQ_SDHC
282#define DMA_REQ_SPI1_R MX1_DMA_REQ_SPI1_R
283#define DMA_REQ_SPI1_T MX1_DMA_REQ_SPI1_T
284#define DMA_REQ_SSI_T MX1_DMA_REQ_SSI_T
285#define DMA_REQ_SSI_R MX1_DMA_REQ_SSI_R
286#define DMA_REQ_ASP_DAC MX1_DMA_REQ_ASP_DAC
287#define DMA_REQ_ASP_ADC MX1_DMA_REQ_ASP_ADC
288#define DMA_REQ_USP_EP(x) MX1_DMA_REQ_USP_EP(x)
289#define DMA_REQ_SPI2_R MX1_DMA_REQ_SPI2_R
290#define DMA_REQ_SPI2_T MX1_DMA_REQ_SPI2_T
291#define DMA_REQ_UART2_T MX1_DMA_REQ_UART2_T
292#define DMA_REQ_UART2_R MX1_DMA_REQ_UART2_R
293#define DMA_REQ_UART1_T MX1_DMA_REQ_UART1_T
294#define DMA_REQ_UART1_R MX1_DMA_REQ_UART1_R
295#endif /* ifdef IMX_NEEDS_DEPRECATED_SYMBOLS */
296
297#endif /* ifndef __MACH_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index bb297d8765a7..ed98b9c9f389 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -22,8 +22,8 @@
22 * MA 02110-1301, USA. 22 * MA 02110-1301, USA.
23 */ 23 */
24 24
25#ifndef __ASM_ARCH_MXC_MX21_H__ 25#ifndef __MACH_MX21_H__
26#define __ASM_ARCH_MXC_MX21_H__ 26#define __MACH_MX21_H__
27 27
28#define MX21_AIPI_BASE_ADDR 0x10000000 28#define MX21_AIPI_BASE_ADDR 0x10000000
29#define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000 29#define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000
@@ -92,6 +92,11 @@
92 92
93#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ 93#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */
94 94
95#define MX21_IO_ADDRESS(x) ( \
96 IMX_IO_ADDRESS(x, MX21_AIPI) ?: \
97 IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \
98 IMX_IO_ADDRESS(x, MX21_X_MEMC))
99
95/* fixed interrupt numbers */ 100/* fixed interrupt numbers */
96#define MX21_INT_CSPI3 6 101#define MX21_INT_CSPI3 6
97#define MX21_INT_GPIO 8 102#define MX21_INT_GPIO 8
@@ -179,6 +184,7 @@
179#define MX21_DMA_REQ_CSI_STAT 30 184#define MX21_DMA_REQ_CSI_STAT 30
180#define MX21_DMA_REQ_CSI_RX 31 185#define MX21_DMA_REQ_CSI_RX 31
181 186
187#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
182/* these should go away */ 188/* these should go away */
183#define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR 189#define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR
184#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR 190#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
@@ -211,5 +217,6 @@
211#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX 217#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX
212#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX 218#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX
213#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX 219#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX
220#endif
214 221
215#endif /* __ASM_ARCH_MXC_MX21_H__ */ 222#endif /* ifndef __MACH_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 854e2dc58481..4eb6e334bda5 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -22,27 +22,27 @@
22#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000) 22#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
23#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000) 23#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
24 24
25#define MX25_AIPS1_IO_ADDRESS(x) \ 25#define MX25_IO_ADDRESS(x) ( \
26 (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT) 26 IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \
27#define MX25_AIPS2_IO_ADDRESS(x) \ 27 IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \
28 (((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT) 28 IMX_IO_ADDRESS(x, MX25_AVIC))
29#define MX25_AVIC_IO_ADDRESS(x) \
30 (((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT)
31 29
32#define __in_range(addr, name) ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE) 30#define MX25_UART1_BASE_ADDR 0x43f90000
33 31#define MX25_UART2_BASE_ADDR 0x43f94000
34#define MX25_IO_ADDRESS(x) \
35 (void __force __iomem *) \
36 (__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \
37 __in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) : \
38 __in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) : \
39 0xDEADBEEF)
40
41#define UART1_BASE_ADDR 0x43f90000
42#define UART2_BASE_ADDR 0x43f94000
43 32
44#define MX25_FEC_BASE_ADDR 0x50038000 33#define MX25_FEC_BASE_ADDR 0x50038000
34#define MX25_NFC_BASE_ADDR 0xbb000000
35#define MX25_DRYICE_BASE_ADDR 0x53ffc000
36#define MX25_LCDC_BASE_ADDR 0x53fbc000
45 37
38#define MX25_INT_DRYICE 25
46#define MX25_INT_FEC 57 39#define MX25_INT_FEC 57
40#define MX25_INT_NANDFC 33
41#define MX25_INT_LCDC 39
42
43#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
44#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR
45#define UART2_BASE_ADDR MX25_UART2_BASE_ADDR
46#endif
47 47
48#endif /* __MACH_MX25_H__ */ 48#endif /* ifndef __MACH_MX25_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index e2ae19f51710..bae9cd75beee 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -21,8 +21,12 @@
21 * MA 02110-1301, USA. 21 * MA 02110-1301, USA.
22 */ 22 */
23 23
24#ifndef __ASM_ARCH_MXC_MX27_H__ 24#ifndef __MACH_MX27_H__
25#define __ASM_ARCH_MXC_MX27_H__ 25#define __MACH_MX27_H__
26
27#ifndef __ASSEMBLER__
28#include <linux/io.h>
29#endif
26 30
27#define MX27_AIPI_BASE_ADDR 0x10000000 31#define MX27_AIPI_BASE_ADDR 0x10000000
28#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000 32#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000
@@ -109,11 +113,31 @@
109#define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000) 113#define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000)
110#define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000) 114#define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000)
111 115
116#define MX27_WEIM_CSCRx_BASE_ADDR(cs) (MX27_WEIM_BASE_ADDR + (cs) * 0x10)
117#define MX27_WEIM_CSCRxU(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs))
118#define MX27_WEIM_CSCRxL(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
119#define MX27_WEIM_CSCRxA(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
120
112#define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000 121#define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000
113 122
114/* IRAM */ 123/* IRAM */
115#define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */ 124#define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */
116 125
126#define MX27_IO_ADDRESS(x) ( \
127 IMX_IO_ADDRESS(x, MX27_AIPI) ?: \
128 IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \
129 IMX_IO_ADDRESS(x, MX27_X_MEMC))
130
131#ifndef __ASSEMBLER__
132static inline void mx27_setup_weimcs(size_t cs,
133 unsigned upper, unsigned lower, unsigned addional)
134{
135 __raw_writel(upper, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(cs)));
136 __raw_writel(lower, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(cs)));
137 __raw_writel(addional, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(cs)));
138}
139#endif
140
117/* fixed interrupt numbers */ 141/* fixed interrupt numbers */
118#define MX27_INT_I2C2 1 142#define MX27_INT_I2C2 1
119#define MX27_INT_GPT6 2 143#define MX27_INT_GPT6 2
@@ -225,6 +249,7 @@
225extern int mx27_revision(void); 249extern int mx27_revision(void);
226#endif 250#endif
227 251
252#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
228/* these should go away */ 253/* these should go away */
229#define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR 254#define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR
230#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR 255#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR
@@ -292,5 +317,6 @@ extern int mx27_revision(void);
292#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX 317#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX
293#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3 318#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3
294#define DMA_REQ_NFC MX27_DMA_REQ_NFC 319#define DMA_REQ_NFC MX27_DMA_REQ_NFC
320#endif
295 321
296#endif /* __ASM_ARCH_MXC_MX27_H__ */ 322#endif /* ifndef __MACH_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index f2eaf140ed02..afb895a0b5b8 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -20,8 +20,8 @@
20 * MA 02110-1301, USA. 20 * MA 02110-1301, USA.
21 */ 21 */
22 22
23#ifndef __ASM_ARCH_MXC_MX2x_H__ 23#ifndef __MACH_MX2x_H__
24#define __ASM_ARCH_MXC_MX2x_H__ 24#define __MACH_MX2x_H__
25 25
26/* The following addresses are common between i.MX21 and i.MX27 */ 26/* The following addresses are common between i.MX21 and i.MX27 */
27 27
@@ -176,6 +176,7 @@
176#define MX2x_DMA_REQ_CSI_STAT 30 176#define MX2x_DMA_REQ_CSI_STAT 30
177#define MX2x_DMA_REQ_CSI_RX 31 177#define MX2x_DMA_REQ_CSI_RX 31
178 178
179#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
179/* these should go away */ 180/* these should go away */
180#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR 181#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
181#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT 182#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
@@ -287,5 +288,6 @@
287#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX 288#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX
288#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT 289#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT
289#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX 290#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX
291#endif
290 292
291#endif /* __ASM_ARCH_MXC_MX2x_H__ */ 293#endif /* ifndef __MACH_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index b8b47d139eb5..fb90e119c2b5 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -1,3 +1,10 @@
1#ifndef __MACH_MX31_H__
2#define __MACH_MX31_H__
3
4#ifndef __ASSEMBLER__
5#include <linux/io.h>
6#endif
7
1/* 8/*
2 * IRAM 9 * IRAM
3 */ 10 */
@@ -107,8 +114,30 @@
107#define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000) 114#define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000)
108#define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR 115#define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR
109 116
117#define MX31_WEIM_CSCRx_BASE_ADDR(cs) (MX31_WEIM_BASE_ADDR + (cs) * 0x10)
118#define MX31_WEIM_CSCRxU(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs))
119#define MX31_WEIM_CSCRxL(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
120#define MX31_WEIM_CSCRxA(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
121
110#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 122#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000
111 123
124#define MX31_IO_ADDRESS(x) ( \
125 IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \
126 IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \
127 IMX_IO_ADDRESS(x, MX31_AVIC) ?: \
128 IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \
129 IMX_IO_ADDRESS(x, MX31_SPBA0))
130
131#ifndef __ASSEMBLER__
132static inline void mx31_setup_weimcs(size_t cs,
133 unsigned upper, unsigned lower, unsigned addional)
134{
135 __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs)));
136 __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs)));
137 __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs)));
138}
139#endif
140
112#define MX31_INT_I2C3 3 141#define MX31_INT_I2C3 3
113#define MX31_INT_I2C2 4 142#define MX31_INT_I2C2 4
114#define MX31_INT_MPEG4_ENCODER 5 143#define MX31_INT_MPEG4_ENCODER 5
@@ -186,6 +215,7 @@
186#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0 215#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0
187#define MX31_SYSTEM_REV_NUM 3 216#define MX31_SYSTEM_REV_NUM 3
188 217
218#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
189/* these should go away */ 219/* these should go away */
190#define ATA_BASE_ADDR MX31_ATA_BASE_ADDR 220#define ATA_BASE_ADDR MX31_ATA_BASE_ADDR
191#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR 221#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR
@@ -216,3 +246,6 @@
216#define MXC_INT_UART5 MX31_INT_UART5 246#define MXC_INT_UART5 MX31_INT_UART5
217#define MXC_INT_CCM MX31_INT_CCM 247#define MXC_INT_CCM MX31_INT_CCM
218#define MXC_INT_PCMCIA MX31_INT_PCMCIA 248#define MXC_INT_PCMCIA MX31_INT_PCMCIA
249#endif
250
251#endif /* ifndef __MACH_MX31_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index af871bce35b6..526a55842ae5 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -1,3 +1,5 @@
1#ifndef __MACH_MX35_H__
2#define __MACH_MX35_H__
1/* 3/*
2 * IRAM 4 * IRAM
3 */ 5 */
@@ -104,6 +106,13 @@
104#define MX35_NFC_BASE_ADDR 0xbb000000 106#define MX35_NFC_BASE_ADDR 0xbb000000
105#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 107#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000
106 108
109#define MX35_IO_ADDRESS(x) ( \
110 IMX_IO_ADDRESS(x, MX35_AIPS1) ?: \
111 IMX_IO_ADDRESS(x, MX35_AIPS2) ?: \
112 IMX_IO_ADDRESS(x, MX35_AVIC) ?: \
113 IMX_IO_ADDRESS(x, MX35_X_MEMC) ?: \
114 IMX_IO_ADDRESS(x, MX35_SPBA0))
115
107/* 116/*
108 * Interrupt numbers 117 * Interrupt numbers
109 */ 118 */
@@ -180,6 +189,7 @@
180#define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0 189#define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0
181#define MX35_SYSTEM_REV_NUM 3 190#define MX35_SYSTEM_REV_NUM 3
182 191
192#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
183/* these should go away */ 193/* these should go away */
184#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR 194#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
185#define MXC_INT_OWIRE MX35_INT_OWIRE 195#define MXC_INT_OWIRE MX35_INT_OWIRE
@@ -195,3 +205,6 @@
195#define MXC_INT_MLB MX35_INT_MLB 205#define MXC_INT_MLB MX35_INT_MLB
196#define MXC_INT_SPDIF MX35_INT_SPDIF 206#define MXC_INT_SPDIF MX35_INT_SPDIF
197#define MXC_INT_FEC MX35_INT_FEC 207#define MXC_INT_FEC MX35_INT_FEC
208#endif
209
210#endif /* ifndef __MACH_MX35_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index be69272407ad..7a356de385f5 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -8,8 +8,8 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef __ASM_ARCH_MXC_MX31_H__ 11#ifndef __MACH_MX3x_H__
12#define __ASM_ARCH_MXC_MX31_H__ 12#define __MACH_MX3x_H__
13 13
14/* 14/*
15 * MX31 memory map: 15 * MX31 memory map:
@@ -269,6 +269,7 @@ static inline int mx31_revision(void)
269} 269}
270#endif 270#endif
271 271
272#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
272/* these should go away */ 273/* these should go away */
273#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR 274#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
274#define L2CC_SIZE MX3x_L2CC_SIZE 275#define L2CC_SIZE MX3x_L2CC_SIZE
@@ -401,5 +402,6 @@ static inline int mx31_revision(void)
401#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2 402#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
402#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN 403#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
403#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM 404#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
405#endif
404 406
405#endif /* __ASM_ARCH_MXC_MX31_H__ */ 407#endif /* ifndef __MACH_MX3x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
new file mode 100644
index 000000000000..771532b6b4a6
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -0,0 +1,454 @@
1#ifndef __ASM_ARCH_MXC_MX51_H__
2#define __ASM_ARCH_MXC_MX51_H__
3
4/*
5 * MX51 memory map:
6 *
7 *
8 * Virt Phys Size What
9 * ---------------------------------------------------------------------------
10 * FA3E0000 1FFE0000 128K IRAM (SCCv2 RAM)
11 * 30000000 256M GPU
12 * 40000000 512M IPU
13 * FA200000 60000000 1M DEBUG
14 * FB100000 70000000 1M SPBA 0
15 * FB000000 73F00000 1M AIPS 1
16 * FB200000 83F00000 1M AIPS 2
17 * FA100000 8FFFC000 16K TZIC (interrupt controller)
18 * 90000000 256M CSD0 SDRAM/DDR
19 * A0000000 256M CSD1 SDRAM/DDR
20 * B0000000 128M CS0 Flash
21 * B8000000 128M CS1 Flash
22 * C0000000 128M CS2 Flash
23 * C8000000 64M CS3 Flash
24 * CC000000 32M CS4 SRAM
25 * CE000000 32M CS5 SRAM
26 * F9000000 CFFF0000 64K NFC (NAND Flash AXI)
27 *
28 */
29
30/*
31 * IRAM
32 */
33#define MX51_IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */
34#define MX51_IRAM_BASE_ADDR_VIRT 0xFA3E0000
35#define MX51_IRAM_PARTITIONS 16
36#define MX51_IRAM_PARTITIONS_TO1 12
37#define MX51_IRAM_SIZE (MX51_IRAM_PARTITIONS * SZ_8K) /* 128KB */
38
39/*
40 * NFC
41 */
42#define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */
43#define MX51_NFC_AXI_BASE_ADDR_VIRT 0xF9000000
44#define MX51_NFC_AXI_SIZE SZ_64K
45
46/*
47 * Graphics Memory of GPU
48 */
49#define MX51_GPU_BASE_ADDR 0x20000000
50#define MX51_GPU2D_BASE_ADDR 0xD0000000
51
52#define MX51_TZIC_BASE_ADDR 0x8FFFC000
53#define MX51_TZIC_BASE_ADDR_VIRT 0xFA100000
54#define MX51_TZIC_SIZE SZ_16K
55
56#define MX51_DEBUG_BASE_ADDR 0x60000000
57#define MX51_DEBUG_BASE_ADDR_VIRT 0xFA200000
58#define MX51_DEBUG_SIZE SZ_1M
59#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00001000)
60#define MX51_ETM_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00002000)
61#define MX51_TPIU_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00003000)
62#define MX51_CTI0_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00004000)
63#define MX51_CTI1_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00005000)
64#define MX51_CTI2_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00006000)
65#define MX51_CTI3_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00007000)
66#define MX51_CORTEX_DBG_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00008000)
67
68/*
69 * SPBA global module enabled #0
70 */
71#define MX51_SPBA0_BASE_ADDR 0x70000000
72#define MX51_SPBA0_BASE_ADDR_VIRT 0xFB100000
73#define MX51_SPBA0_SIZE SZ_1M
74
75#define MX51_MMC_SDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00004000)
76#define MX51_MMC_SDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00008000)
77#define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0000C000)
78#define MX51_CSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00010000)
79#define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00014000)
80#define MX51_MMC_SDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00020000)
81#define MX51_MMC_SDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00024000)
82#define MX51_SPDIF_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00028000)
83#define MX51_ATA_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00030000)
84#define MX51_SLIM_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00034000)
85#define MX51_HSI2C_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00038000)
86#define MX51_SPBA_CTRL_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0003C000)
87
88/*
89 * defines for SPBA modules
90 */
91#define MX51_SPBA_SDHC1 0x04
92#define MX51_SPBA_SDHC2 0x08
93#define MX51_SPBA_UART3 0x0C
94#define MX51_SPBA_CSPI1 0x10
95#define MX51_SPBA_SSI2 0x14
96#define MX51_SPBA_SDHC3 0x20
97#define MX51_SPBA_SDHC4 0x24
98#define MX51_SPBA_SPDIF 0x28
99#define MX51_SPBA_ATA 0x30
100#define MX51_SPBA_SLIM 0x34
101#define MX51_SPBA_HSI2C 0x38
102#define MX51_SPBA_CTRL 0x3C
103
104/*
105 * AIPS 1
106 */
107#define MX51_AIPS1_BASE_ADDR 0x73F00000
108#define MX51_AIPS1_BASE_ADDR_VIRT 0xFB000000
109#define MX51_AIPS1_SIZE SZ_1M
110
111#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00080000)
112#define MX51_GPIO1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00084000)
113#define MX51_GPIO2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00088000)
114#define MX51_GPIO3_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x0008C000)
115#define MX51_GPIO4_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00090000)
116#define MX51_KPP_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00094000)
117#define MX51_WDOG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00098000)
118#define MX51_WDOG2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x0009C000)
119#define MX51_GPT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000A0000)
120#define MX51_SRTC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000A4000)
121#define MX51_IOMUXC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000A8000)
122#define MX51_EPIT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000AC000)
123#define MX51_EPIT2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000B0000)
124#define MX51_PWM1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000B4000)
125#define MX51_PWM2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000B8000)
126#define MX51_UART1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000BC000)
127#define MX51_UART2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000C0000)
128#define MX51_SRC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000D0000)
129#define MX51_CCM_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000D4000)
130#define MX51_GPC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000D8000)
131
132/*
133 * Defines for modules using static and dynamic DMA channels
134 */
135#define MX51_MXC_DMA_CHANNEL_IRAM 30
136#define MX51_MXC_DMA_CHANNEL_SPDIF_TX MXC_DMA_DYNAMIC_CHANNEL
137#define MX51_MXC_DMA_CHANNEL_UART1_RX MXC_DMA_DYNAMIC_CHANNEL
138#define MX51_MXC_DMA_CHANNEL_UART1_TX MXC_DMA_DYNAMIC_CHANNEL
139#define MX51_MXC_DMA_CHANNEL_UART2_RX MXC_DMA_DYNAMIC_CHANNEL
140#define MX51_MXC_DMA_CHANNEL_UART2_TX MXC_DMA_DYNAMIC_CHANNEL
141#define MX51_MXC_DMA_CHANNEL_UART3_RX MXC_DMA_DYNAMIC_CHANNEL
142#define MX51_MXC_DMA_CHANNEL_UART3_TX MXC_DMA_DYNAMIC_CHANNEL
143#define MX51_MXC_DMA_CHANNEL_MMC1 MXC_DMA_DYNAMIC_CHANNEL
144#define MX51_MXC_DMA_CHANNEL_MMC2 MXC_DMA_DYNAMIC_CHANNEL
145#define MX51_MXC_DMA_CHANNEL_SSI1_RX MXC_DMA_DYNAMIC_CHANNEL
146#define MX51_MXC_DMA_CHANNEL_SSI1_TX MXC_DMA_DYNAMIC_CHANNEL
147#define MX51_MXC_DMA_CHANNEL_SSI2_RX MXC_DMA_DYNAMIC_CHANNEL
148#ifdef CONFIG_SDMA_IRAM
149#define MX51_MXC_DMA_CHANNEL_SSI2_TX (MX51_MXC_DMA_CHANNEL_IRAM + 1)
150#else /*CONFIG_SDMA_IRAM */
151#define MX51_MXC_DMA_CHANNEL_SSI2_TX MXC_DMA_DYNAMIC_CHANNEL
152#endif /*CONFIG_SDMA_IRAM */
153#define MX51_MXC_DMA_CHANNEL_CSPI1_RX MXC_DMA_DYNAMIC_CHANNEL
154#define MX51_MXC_DMA_CHANNEL_CSPI1_TX MXC_DMA_DYNAMIC_CHANNEL
155#define MX51_MXC_DMA_CHANNEL_CSPI2_RX MXC_DMA_DYNAMIC_CHANNEL
156#define MX51_MXC_DMA_CHANNEL_CSPI2_TX MXC_DMA_DYNAMIC_CHANNEL
157#define MX51_MXC_DMA_CHANNEL_CSPI3_RX MXC_DMA_DYNAMIC_CHANNEL
158#define MX51_MXC_DMA_CHANNEL_CSPI3_TX MXC_DMA_DYNAMIC_CHANNEL
159#define MX51_MXC_DMA_CHANNEL_ATA_RX MXC_DMA_DYNAMIC_CHANNEL
160#define MX51_MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL
161#define MX51_MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL
162
163/*
164 * AIPS 2
165 */
166#define MX51_AIPS2_BASE_ADDR 0x83F00000
167#define MX51_AIPS2_BASE_ADDR_VIRT 0xFB200000
168#define MX51_AIPS2_SIZE SZ_1M
169
170#define MX51_PLL1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00080000)
171#define MX51_PLL2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00084000)
172#define MX51_PLL3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00088000)
173#define MX51_AHBMAX_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00094000)
174#define MX51_IIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00098000)
175#define MX51_CSU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x0009C000)
176#define MX51_ARM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000A0000)
177#define MX51_OWIRE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000A4000)
178#define MX51_FIRI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000A8000)
179#define MX51_CSPI2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000AC000)
180#define MX51_SDMA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000B0000)
181#define MX51_SCC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000B4000)
182#define MX51_ROMCP_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000B8000)
183#define MX51_RTIC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000BC000)
184#define MX51_CSPI3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000C0000)
185#define MX51_I2C2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000C4000)
186#define MX51_I2C1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000C8000)
187#define MX51_SSI1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000CC000)
188#define MX51_AUDMUX_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000D0000)
189#define MX51_M4IF_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000D8000)
190#define MX51_ESDCTL_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000D9000)
191#define MX51_WEIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DA000)
192#define MX51_NFC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DB000)
193#define MX51_EMI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DBF00)
194#define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DC000)
195#define MX51_ATA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E0000)
196#define MX51_SIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E4000)
197#define MX51_SSI3BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E8000)
198#define MX51_MXC_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000EC000)
199#define MX51_TVE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F0000)
200#define MX51_VPU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F4000)
201#define MX51_SAHARA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F8000)
202
203/*
204 * Memory regions and CS
205 */
206#define MX51_GPU_CTRL_BASE_ADDR 0x30000000
207#define MX51_IPU_CTRL_BASE_ADDR 0x40000000
208#define MX51_CSD0_BASE_ADDR 0x90000000
209#define MX51_CSD1_BASE_ADDR 0xA0000000
210#define MX51_CS0_BASE_ADDR 0xB0000000
211#define MX51_CS1_BASE_ADDR 0xB8000000
212#define MX51_CS2_BASE_ADDR 0xC0000000
213#define MX51_CS3_BASE_ADDR 0xC8000000
214#define MX51_CS4_BASE_ADDR 0xCC000000
215#define MX51_CS5_BASE_ADDR 0xCE000000
216
217/* Does given address belongs to the specified memory region? */
218#define ADDRESS_IN_REGION(addr, start, size) \
219 (((addr) >= (start)) && ((addr) < (start)+(size)))
220
221/* Does given address belongs to the specified named `module'? */
222#define MX51_IS_MODULE(addr, module) \
223 ADDRESS_IN_REGION(addr, MX51_ ## module ## _BASE_ADDR, \
224 MX51_ ## module ## _SIZE)
225/*
226 * This macro defines the physical to virtual address mapping for all the
227 * peripheral modules. It is used by passing in the physical address as x
228 * and returning the virtual address. If the physical address is not mapped,
229 * it returns 0xDEADBEEF
230 */
231
232#define MX51_IO_ADDRESS(x) \
233 (void __iomem *) \
234 (MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) : \
235 MX51_IS_MODULE(x, TZIC) ? MX51_TZIC_IO_ADDRESS(x) : \
236 MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) : \
237 MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \
238 MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \
239 MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \
240 MX51_IS_MODULE(x, NFC_AXI) ? MX51_NFC_AXI_IO_ADDRESS(x) : \
241 0xDEADBEEF)
242
243/*
244 * define the address mapping macros: in physical address order
245 */
246#define MX51_IRAM_IO_ADDRESS(x) \
247 (((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT)
248
249#define MX51_TZIC_IO_ADDRESS(x) \
250 (((x) - MX51_TZIC_BASE_ADDR) + MX51_TZIC_BASE_ADDR_VIRT)
251
252#define MX51_DEBUG_IO_ADDRESS(x) \
253 (((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT)
254
255#define MX51_SPBA0_IO_ADDRESS(x) \
256 (((x) - MX51_SPBA0_BASE_ADDR) + MX51_SPBA0_BASE_ADDR_VIRT)
257
258#define MX51_AIPS1_IO_ADDRESS(x) \
259 (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT)
260
261#define MX51_AIPS2_IO_ADDRESS(x) \
262 (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT)
263
264#define MX51_NFC_AXI_IO_ADDRESS(x) \
265 (((x) - MX51_NFC_AXI_BASE_ADDR) + MX51_NFC_AXI_BASE_ADDR_VIRT)
266
267#define MX51_IS_MEM_DEVICE_NONSHARED(x) 0
268
269/*
270 * DMA request assignments
271 */
272#define MX51_DMA_REQ_SSI3_TX1 47
273#define MX51_DMA_REQ_SSI3_RX1 46
274#define MX51_DMA_REQ_SPDIF 45
275#define MX51_DMA_REQ_UART3_TX 44
276#define MX51_DMA_REQ_UART3_RX 43
277#define MX51_DMA_REQ_SLIM_B_TX 42
278#define MX51_DMA_REQ_SDHC4 41
279#define MX51_DMA_REQ_SDHC3 40
280#define MX51_DMA_REQ_CSPI_TX 39
281#define MX51_DMA_REQ_CSPI_RX 38
282#define MX51_DMA_REQ_SSI3_TX2 37
283#define MX51_DMA_REQ_IPU 36
284#define MX51_DMA_REQ_SSI3_RX2 35
285#define MX51_DMA_REQ_EPIT2 34
286#define MX51_DMA_REQ_CTI2_1 33
287#define MX51_DMA_REQ_EMI_WR 32
288#define MX51_DMA_REQ_CTI2_0 31
289#define MX51_DMA_REQ_EMI_RD 30
290#define MX51_DMA_REQ_SSI1_TX1 29
291#define MX51_DMA_REQ_SSI1_RX1 28
292#define MX51_DMA_REQ_SSI1_TX2 27
293#define MX51_DMA_REQ_SSI1_RX2 26
294#define MX51_DMA_REQ_SSI2_TX1 25
295#define MX51_DMA_REQ_SSI2_RX1 24
296#define MX51_DMA_REQ_SSI2_TX2 23
297#define MX51_DMA_REQ_SSI2_RX2 22
298#define MX51_DMA_REQ_SDHC2 21
299#define MX51_DMA_REQ_SDHC1 20
300#define MX51_DMA_REQ_UART1_TX 19
301#define MX51_DMA_REQ_UART1_RX 18
302#define MX51_DMA_REQ_UART2_TX 17
303#define MX51_DMA_REQ_UART2_RX 16
304#define MX51_DMA_REQ_GPU 15
305#define MX51_DMA_REQ_EXTREQ1 14
306#define MX51_DMA_REQ_FIRI_TX 13
307#define MX51_DMA_REQ_FIRI_RX 12
308#define MX51_DMA_REQ_HS_I2C_RX 11
309#define MX51_DMA_REQ_HS_I2C_TX 10
310#define MX51_DMA_REQ_CSPI2_TX 9
311#define MX51_DMA_REQ_CSPI2_RX 8
312#define MX51_DMA_REQ_CSPI1_TX 7
313#define MX51_DMA_REQ_CSPI1_RX 6
314#define MX51_DMA_REQ_SLIM_B 5
315#define MX51_DMA_REQ_ATA_TX_END 4
316#define MX51_DMA_REQ_ATA_TX 3
317#define MX51_DMA_REQ_ATA_RX 2
318#define MX51_DMA_REQ_GPC 1
319#define MX51_DMA_REQ_VPU 0
320
321/*
322 * Interrupt numbers
323 */
324#define MX51_MXC_INT_BASE 0
325#define MX51_MXC_INT_RESV0 0
326#define MX51_MXC_INT_MMC_SDHC1 1
327#define MX51_MXC_INT_MMC_SDHC2 2
328#define MX51_MXC_INT_MMC_SDHC3 3
329#define MX51_MXC_INT_MMC_SDHC4 4
330#define MX51_MXC_INT_RESV5 5
331#define MX51_MXC_INT_SDMA 6
332#define MX51_MXC_INT_IOMUX 7
333#define MX51_MXC_INT_NFC 8
334#define MX51_MXC_INT_VPU 9
335#define MX51_MXC_INT_IPU_ERR 10
336#define MX51_MXC_INT_IPU_SYN 11
337#define MX51_MXC_INT_GPU 12
338#define MX51_MXC_INT_RESV13 13
339#define MX51_MXC_INT_USB_H1 14
340#define MX51_MXC_INT_EMI 15
341#define MX51_MXC_INT_USB_H2 16
342#define MX51_MXC_INT_USB_H3 17
343#define MX51_MXC_INT_USB_OTG 18
344#define MX51_MXC_INT_SAHARA_H0 19
345#define MX51_MXC_INT_SAHARA_H1 20
346#define MX51_MXC_INT_SCC_SMN 21
347#define MX51_MXC_INT_SCC_STZ 22
348#define MX51_MXC_INT_SCC_SCM 23
349#define MX51_MXC_INT_SRTC_NTZ 24
350#define MX51_MXC_INT_SRTC_TZ 25
351#define MX51_MXC_INT_RTIC 26
352#define MX51_MXC_INT_CSU 27
353#define MX51_MXC_INT_SLIM_B 28
354#define MX51_MXC_INT_SSI1 29
355#define MX51_MXC_INT_SSI2 30
356#define MX51_MXC_INT_UART1 31
357#define MX51_MXC_INT_UART2 32
358#define MX51_MXC_INT_UART3 33
359#define MX51_MXC_INT_RESV34 34
360#define MX51_MXC_INT_RESV35 35
361#define MX51_MXC_INT_CSPI1 36
362#define MX51_MXC_INT_CSPI2 37
363#define MX51_MXC_INT_CSPI 38
364#define MX51_MXC_INT_GPT 39
365#define MX51_MXC_INT_EPIT1 40
366#define MX51_MXC_INT_EPIT2 41
367#define MX51_MXC_INT_GPIO1_INT7 42
368#define MX51_MXC_INT_GPIO1_INT6 43
369#define MX51_MXC_INT_GPIO1_INT5 44
370#define MX51_MXC_INT_GPIO1_INT4 45
371#define MX51_MXC_INT_GPIO1_INT3 46
372#define MX51_MXC_INT_GPIO1_INT2 47
373#define MX51_MXC_INT_GPIO1_INT1 48
374#define MX51_MXC_INT_GPIO1_INT0 49
375#define MX51_MXC_INT_GPIO1_LOW 50
376#define MX51_MXC_INT_GPIO1_HIGH 51
377#define MX51_MXC_INT_GPIO2_LOW 52
378#define MX51_MXC_INT_GPIO2_HIGH 53
379#define MX51_MXC_INT_GPIO3_LOW 54
380#define MX51_MXC_INT_GPIO3_HIGH 55
381#define MX51_MXC_INT_GPIO4_LOW 56
382#define MX51_MXC_INT_GPIO4_HIGH 57
383#define MX51_MXC_INT_WDOG1 58
384#define MX51_MXC_INT_WDOG2 59
385#define MX51_MXC_INT_KPP 60
386#define MX51_MXC_INT_PWM1 61
387#define MX51_MXC_INT_I2C1 62
388#define MX51_MXC_INT_I2C2 63
389#define MX51_MXC_INT_HS_I2C 64
390#define MX51_MXC_INT_RESV65 65
391#define MX51_MXC_INT_RESV66 66
392#define MX51_MXC_INT_SIM_IPB 67
393#define MX51_MXC_INT_SIM_DAT 68
394#define MX51_MXC_INT_IIM 69
395#define MX51_MXC_INT_ATA 70
396#define MX51_MXC_INT_CCM1 71
397#define MX51_MXC_INT_CCM2 72
398#define MX51_MXC_INT_GPC1 73
399#define MX51_MXC_INT_GPC2 74
400#define MX51_MXC_INT_SRC 75
401#define MX51_MXC_INT_NM 76
402#define MX51_MXC_INT_PMU 77
403#define MX51_MXC_INT_CTI_IRQ 78
404#define MX51_MXC_INT_CTI1_TG0 79
405#define MX51_MXC_INT_CTI1_TG1 80
406#define MX51_MXC_INT_MCG_ERR 81
407#define MX51_MXC_INT_MCG_TMR 82
408#define MX51_MXC_INT_MCG_FUNC 83
409#define MX51_MXC_INT_GPU2_IRQ 84
410#define MX51_MXC_INT_GPU2_BUSY 85
411#define MX51_MXC_INT_RESV86 86
412#define MX51_MXC_INT_FEC 87
413#define MX51_MXC_INT_OWIRE 88
414#define MX51_MXC_INT_CTI1_TG2 89
415#define MX51_MXC_INT_SJC 90
416#define MX51_MXC_INT_SPDIF 91
417#define MX51_MXC_INT_TVE 92
418#define MX51_MXC_INT_FIRI 93
419#define MX51_MXC_INT_PWM2 94
420#define MX51_MXC_INT_SLIM_EXP 95
421#define MX51_MXC_INT_SSI3 96
422#define MX51_MXC_INT_EMI_BOOT 97
423#define MX51_MXC_INT_CTI1_TG3 98
424#define MX51_MXC_INT_SMC_RX 99
425#define MX51_MXC_INT_VPU_IDLE 100
426#define MX51_MXC_INT_EMI_NFC 101
427#define MX51_MXC_INT_GPU_IDLE 102
428
429/* silicon revisions specific to i.MX51 */
430#define MX51_CHIP_REV_1_0 0x10
431#define MX51_CHIP_REV_1_1 0x11
432#define MX51_CHIP_REV_1_2 0x12
433#define MX51_CHIP_REV_1_3 0x13
434#define MX51_CHIP_REV_2_0 0x20
435#define MX51_CHIP_REV_2_1 0x21
436#define MX51_CHIP_REV_2_2 0x22
437#define MX51_CHIP_REV_2_3 0x23
438#define MX51_CHIP_REV_3_0 0x30
439#define MX51_CHIP_REV_3_1 0x31
440#define MX51_CHIP_REV_3_2 0x32
441
442/* Mandatory defines used globally */
443
444#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
445
446extern unsigned int system_rev;
447
448static inline unsigned int mx51_revision(void)
449{
450 return system_rev;
451}
452#endif
453
454#endif /* __ASM_ARCH_MXC_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 51990536b845..a790bf212972 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -30,6 +30,7 @@
30#define MXC_CPU_MX27 27 30#define MXC_CPU_MX27 27
31#define MXC_CPU_MX31 31 31#define MXC_CPU_MX31 31
32#define MXC_CPU_MX35 35 32#define MXC_CPU_MX35 35
33#define MXC_CPU_MX51 51
33#define MXC_CPU_MXC91231 91231 34#define MXC_CPU_MXC91231 91231
34 35
35#ifndef __ASSEMBLY__ 36#ifndef __ASSEMBLY__
@@ -108,6 +109,18 @@ extern unsigned int __mxc_cpu_type;
108# define cpu_is_mx35() (0) 109# define cpu_is_mx35() (0)
109#endif 110#endif
110 111
112#ifdef CONFIG_ARCH_MX5
113# ifdef mxc_cpu_type
114# undef mxc_cpu_type
115# define mxc_cpu_type __mxc_cpu_type
116# else
117# define mxc_cpu_type MXC_CPU_MX51
118# endif
119# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51)
120#else
121# define cpu_is_mx51() (0)
122#endif
123
111#ifdef CONFIG_ARCH_MXC91231 124#ifdef CONFIG_ARCH_MXC91231
112# ifdef mxc_cpu_type 125# ifdef mxc_cpu_type
113# undef mxc_cpu_type 126# undef mxc_cpu_type
@@ -121,9 +134,10 @@ extern unsigned int __mxc_cpu_type;
121#endif 134#endif
122 135
123#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) 136#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
124#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) 137/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
125#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) 138#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))
126#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) 139#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4))
140#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))
127#endif 141#endif
128 142
129#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231()) 143#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231())
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 81484d1ef232..5182b986b785 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -184,60 +184,22 @@
184#define MXC91231_CS4_BASE_ADDR 0xB4000000 184#define MXC91231_CS4_BASE_ADDR 0xB4000000
185#define MXC91231_CS5_BASE_ADDR 0xB6000000 185#define MXC91231_CS5_BASE_ADDR 0xB6000000
186 186
187/* Is given address belongs to the specified memory region? */
188#define ADDRESS_IN_REGION(addr, start, size) \
189 (((addr) >= (start)) && ((addr) < (start)+(size)))
190
191/* Is given address belongs to the specified named `module'? */
192#define MXC91231_IS_MODULE(addr, module) \
193 ADDRESS_IN_REGION(addr, MXC91231_ ## module ## _BASE_ADDR, \
194 MXC91231_ ## module ## _SIZE)
195/* 187/*
196 * This macro defines the physical to virtual address mapping for all the 188 * This macro defines the physical to virtual address mapping for all the
197 * peripheral modules. It is used by passing in the physical address as x 189 * peripheral modules. It is used by passing in the physical address as x
198 * and returning the virtual address. If the physical address is not mapped, 190 * and returning the virtual address. If the physical address is not mapped,
199 * it returns 0xDEADBEEF 191 * it returns 0.
200 */
201
202#define MXC91231_IO_ADDRESS(x) \
203 (void __iomem *) \
204 (MXC91231_IS_MODULE(x, L2CC) ? MXC91231_L2CC_IO_ADDRESS(x) : \
205 MXC91231_IS_MODULE(x, AIPS1) ? MXC91231_AIPS1_IO_ADDRESS(x) : \
206 MXC91231_IS_MODULE(x, AIPS2) ? MXC91231_AIPS2_IO_ADDRESS(x) : \
207 MXC91231_IS_MODULE(x, SPBA0) ? MXC91231_SPBA0_IO_ADDRESS(x) : \
208 MXC91231_IS_MODULE(x, SPBA1) ? MXC91231_SPBA1_IO_ADDRESS(x) : \
209 MXC91231_IS_MODULE(x, ROMP) ? MXC91231_ROMP_IO_ADDRESS(x) : \
210 MXC91231_IS_MODULE(x, AVIC) ? MXC91231_AVIC_IO_ADDRESS(x) : \
211 MXC91231_IS_MODULE(x, X_MEMC) ? MXC91231_X_MEMC_IO_ADDRESS(x) : \
212 0xDEADBEEF)
213
214
215/*
216 * define the address mapping macros: in physical address order
217 */ 192 */
218#define MXC91231_L2CC_IO_ADDRESS(x) \
219 (((x) - MXC91231_L2CC_BASE_ADDR) + MXC91231_L2CC_BASE_ADDR_VIRT)
220
221#define MXC91231_AIPS1_IO_ADDRESS(x) \
222 (((x) - MXC91231_AIPS1_BASE_ADDR) + MXC91231_AIPS1_BASE_ADDR_VIRT)
223
224#define MXC91231_SPBA0_IO_ADDRESS(x) \
225 (((x) - MXC91231_SPBA0_BASE_ADDR) + MXC91231_SPBA0_BASE_ADDR_VIRT)
226
227#define MXC91231_SPBA1_IO_ADDRESS(x) \
228 (((x) - MXC91231_SPBA1_BASE_ADDR) + MXC91231_SPBA1_BASE_ADDR_VIRT)
229
230#define MXC91231_AIPS2_IO_ADDRESS(x) \
231 (((x) - MXC91231_AIPS2_BASE_ADDR) + MXC91231_AIPS2_BASE_ADDR_VIRT)
232
233#define MXC91231_ROMP_IO_ADDRESS(x) \
234 (((x) - MXC91231_ROMP_BASE_ADDR) + MXC91231_ROMP_BASE_ADDR_VIRT)
235
236#define MXC91231_AVIC_IO_ADDRESS(x) \
237 (((x) - MXC91231_AVIC_BASE_ADDR) + MXC91231_AVIC_BASE_ADDR_VIRT)
238 193
239#define MXC91231_X_MEMC_IO_ADDRESS(x) \ 194#define MXC91231_IO_ADDRESS(x) ( \
240 (((x) - MXC91231_X_MEMC_BASE_ADDR) + MXC91231_X_MEMC_BASE_ADDR_VIRT) 195 IMX_IO_ADDRESS(x, MXC91231_L2CC) ?: \
196 IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?: \
197 IMX_IO_ADDRESS(x, MXC91231_ROMP) ?: \
198 IMX_IO_ADDRESS(x, MXC91231_AVIC) ?: \
199 IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?: \
200 IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?: \
201 IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?: \
202 IMX_IO_ADDRESS(x, MXC91231_AIPS2))
241 203
242/* 204/*
243 * Interrupt numbers 205 * Interrupt numbers
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
index 8f796239393e..4b9b8368c0c0 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -22,6 +22,10 @@
22#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) 22#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
23#define MXC_EHCI_TTL_ENABLED (1 << 6) 23#define MXC_EHCI_TTL_ENABLED (1 << 6)
24 24
25#define MXC_EHCI_INTERNAL_PHY (1 << 7)
26#define MXC_EHCI_IPPUE_DOWN (1 << 8)
27#define MXC_EHCI_IPPUE_UP (1 << 9)
28
25struct mxc_usbh_platform_data { 29struct mxc_usbh_platform_data {
26 int (*init)(struct platform_device *pdev); 30 int (*init)(struct platform_device *pdev);
27 int (*exit)(struct platform_device *pdev); 31 int (*exit)(struct platform_device *pdev);
diff --git a/arch/arm/plat-mxc/include/mach/ssi.h b/arch/arm/plat-mxc/include/mach/ssi.h
new file mode 100644
index 000000000000..c34ded523f10
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/ssi.h
@@ -0,0 +1,18 @@
1#ifndef __MACH_SSI_H
2#define __MACH_SSI_H
3
4struct snd_ac97;
5
6extern unsigned char imx_ssi_fiq_start, imx_ssi_fiq_end;
7extern unsigned long imx_ssi_fiq_base, imx_ssi_fiq_tx_buffer, imx_ssi_fiq_rx_buffer;
8
9struct imx_ssi_platform_data {
10 unsigned int flags;
11#define IMX_SSI_DMA (1 << 0)
12#define IMX_SSI_USE_AC97 (1 << 1)
13 void (*ac97_reset) (struct snd_ac97 *ac97);
14 void (*ac97_warm_reset)(struct snd_ac97 *ac97);
15};
16
17#endif /* __MACH_SSI_H */
18
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 527a6c24788e..024416ed11cd 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -28,6 +28,8 @@
28#define CLOCK_TICK_RATE 16625000 28#define CLOCK_TICK_RATE 16625000
29#elif defined CONFIG_ARCH_MX25 29#elif defined CONFIG_ARCH_MX25
30#define CLOCK_TICK_RATE 16000000 30#define CLOCK_TICK_RATE 16000000
31#elif defined CONFIG_ARCH_MX5
32#define CLOCK_TICK_RATE 8000000
31#elif defined CONFIG_ARCH_MXC91231 33#elif defined CONFIG_ARCH_MXC91231
32#define CLOCK_TICK_RATE 13000000 34#define CLOCK_TICK_RATE 13000000
33#endif 35#endif
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index d49384cb1e97..52e476a150ca 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -1,8 +1,6 @@
1/* 1/*
2 * arch/arm/plat-mxc/include/mach/uncompress.h 2 * arch/arm/plat-mxc/include/mach/uncompress.h
3 * 3 *
4 *
5 *
6 * Copyright (C) 1999 ARM Limited 4 * Copyright (C) 1999 ARM Limited
7 * Copyright (C) Shane Nay (shane@minirl.com) 5 * Copyright (C) Shane Nay (shane@minirl.com)
8 * 6 *
@@ -25,7 +23,6 @@
25 23
26#define __MXC_BOOT_UNCOMPRESS 24#define __MXC_BOOT_UNCOMPRESS
27 25
28#include <mach/hardware.h>
29#include <asm/mach-types.h> 26#include <asm/mach-types.h>
30 27
31static unsigned long uart_base; 28static unsigned long uart_base;
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c
deleted file mode 100644
index a37163ce280b..000000000000
--- a/arch/arm/plat-mxc/iomux-mx1-mx2.c
+++ /dev/null
@@ -1,157 +0,0 @@
1/*
2 * arch/arm/mach-mxc/generic.c
3 *
4 * author: Sascha Hauer
5 * Created: april 20th, 2004
6 * Copyright: Synertronixx GmbH
7 *
8 * Common code for i.MX machines
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/string.h>
31#include <linux/gpio.h>
32
33#include <mach/hardware.h>
34#include <asm/mach/map.h>
35#include <mach/iomux.h>
36
37void mxc_gpio_mode(int gpio_mode)
38{
39 unsigned int pin = gpio_mode & GPIO_PIN_MASK;
40 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
41 unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
42 unsigned int tmp;
43
44 /* Pullup enable */
45 tmp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(port));
46 if (gpio_mode & GPIO_PUEN)
47 tmp |= (1 << pin);
48 else
49 tmp &= ~(1 << pin);
50 __raw_writel(tmp, VA_GPIO_BASE + MXC_PUEN(port));
51
52 /* Data direction */
53 tmp = __raw_readl(VA_GPIO_BASE + MXC_DDIR(port));
54 if (gpio_mode & GPIO_OUT)
55 tmp |= 1 << pin;
56 else
57 tmp &= ~(1 << pin);
58 __raw_writel(tmp, VA_GPIO_BASE + MXC_DDIR(port));
59
60 /* Primary / alternate function */
61 tmp = __raw_readl(VA_GPIO_BASE + MXC_GPR(port));
62 if (gpio_mode & GPIO_AF)
63 tmp |= (1 << pin);
64 else
65 tmp &= ~(1 << pin);
66 __raw_writel(tmp, VA_GPIO_BASE + MXC_GPR(port));
67
68 /* use as gpio? */
69 tmp = __raw_readl(VA_GPIO_BASE + MXC_GIUS(port));
70 if (gpio_mode & (GPIO_PF | GPIO_AF))
71 tmp &= ~(1 << pin);
72 else
73 tmp |= (1 << pin);
74 __raw_writel(tmp, VA_GPIO_BASE + MXC_GIUS(port));
75
76 if (pin < 16) {
77 tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR1(port));
78 tmp &= ~(3 << (pin * 2));
79 tmp |= (ocr << (pin * 2));
80 __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR1(port));
81
82 tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA1(port));
83 tmp &= ~(3 << (pin * 2));
84 tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
85 __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA1(port));
86
87 tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB1(port));
88 tmp &= ~(3 << (pin * 2));
89 tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
90 __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB1(port));
91 } else {
92 pin -= 16;
93
94 tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR2(port));
95 tmp &= ~(3 << (pin * 2));
96 tmp |= (ocr << (pin * 2));
97 __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR2(port));
98
99 tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA2(port));
100 tmp &= ~(3 << (pin * 2));
101 tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
102 __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA2(port));
103
104 tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB2(port));
105 tmp &= ~(3 << (pin * 2));
106 tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
107 __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB2(port));
108 }
109}
110EXPORT_SYMBOL(mxc_gpio_mode);
111
112int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
113 const char *label)
114{
115 const int *p = pin_list;
116 int i;
117 unsigned gpio;
118 unsigned mode;
119 int ret = -EINVAL;
120
121 for (i = 0; i < count; i++) {
122 gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
123 mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK);
124
125 if (gpio >= (GPIO_PORT_MAX + 1) * 32)
126 goto setup_error;
127
128 ret = gpio_request(gpio, label);
129 if (ret)
130 goto setup_error;
131
132 mxc_gpio_mode(gpio | mode);
133
134 p++;
135 }
136 return 0;
137
138setup_error:
139 mxc_gpio_release_multiple_pins(pin_list, i);
140 return ret;
141}
142EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
143
144void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
145{
146 const int *p = pin_list;
147 int i;
148
149 for (i = 0; i < count; i++) {
150 unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
151 gpio_free(gpio);
152 p++;
153 }
154
155}
156EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
157
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c
new file mode 100644
index 000000000000..960a02cbcbaf
--- /dev/null
+++ b/arch/arm/plat-mxc/iomux-v1.c
@@ -0,0 +1,238 @@
1/*
2 * arch/arm/plat-mxc/iomux-v1.c
3 *
4 * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
5 * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
6 *
7 * Common code for i.MX1, i.MX21 and i.MX27
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
22 */
23
24#include <linux/errno.h>
25#include <linux/init.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/string.h>
29#include <linux/gpio.h>
30
31#include <mach/hardware.h>
32#include <asm/mach/map.h>
33#include <mach/iomux-v1.h>
34
35static void __iomem *imx_iomuxv1_baseaddr;
36static unsigned imx_iomuxv1_numports;
37
38static inline unsigned long imx_iomuxv1_readl(unsigned offset)
39{
40 return __raw_readl(imx_iomuxv1_baseaddr + offset);
41}
42
43static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
44{
45 __raw_writel(val, imx_iomuxv1_baseaddr + offset);
46}
47
48static inline void imx_iomuxv1_rmwl(unsigned offset,
49 unsigned long mask, unsigned long value)
50{
51 unsigned long reg = imx_iomuxv1_readl(offset);
52
53 reg &= ~mask;
54 reg |= value;
55
56 imx_iomuxv1_writel(reg, offset);
57}
58
59static inline void imx_iomuxv1_set_puen(
60 unsigned int port, unsigned int pin, int on)
61{
62 unsigned long mask = 1 << pin;
63
64 imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
65}
66
67static inline void imx_iomuxv1_set_ddir(
68 unsigned int port, unsigned int pin, int out)
69{
70 unsigned long mask = 1 << pin;
71
72 imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
73}
74
75static inline void imx_iomuxv1_set_gpr(
76 unsigned int port, unsigned int pin, int af)
77{
78 unsigned long mask = 1 << pin;
79
80 imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
81}
82
83static inline void imx_iomuxv1_set_gius(
84 unsigned int port, unsigned int pin, int inuse)
85{
86 unsigned long mask = 1 << pin;
87
88 imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
89}
90
91static inline void imx_iomuxv1_set_ocr(
92 unsigned int port, unsigned int pin, unsigned int ocr)
93{
94 unsigned long shift = (pin & 0xf) << 1;
95 unsigned long mask = 3 << shift;
96 unsigned long value = ocr << shift;
97 unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
98
99 imx_iomuxv1_rmwl(offset, mask, value);
100}
101
102static inline void imx_iomuxv1_set_iconfa(
103 unsigned int port, unsigned int pin, unsigned int aout)
104{
105 unsigned long shift = (pin & 0xf) << 1;
106 unsigned long mask = 3 << shift;
107 unsigned long value = aout << shift;
108 unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
109
110 imx_iomuxv1_rmwl(offset, mask, value);
111}
112
113static inline void imx_iomuxv1_set_iconfb(
114 unsigned int port, unsigned int pin, unsigned int bout)
115{
116 unsigned long shift = (pin & 0xf) << 1;
117 unsigned long mask = 3 << shift;
118 unsigned long value = bout << shift;
119 unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
120
121 imx_iomuxv1_rmwl(offset, mask, value);
122}
123
124int mxc_gpio_mode(int gpio_mode)
125{
126 unsigned int pin = gpio_mode & GPIO_PIN_MASK;
127 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
128 unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
129 unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
130 unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
131
132 if (port >= imx_iomuxv1_numports)
133 return -EINVAL;
134
135 /* Pullup enable */
136 imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
137
138 /* Data direction */
139 imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
140
141 /* Primary / alternate function */
142 imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
143
144 /* use as gpio? */
145 imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
146
147 imx_iomuxv1_set_ocr(port, pin, ocr);
148
149 imx_iomuxv1_set_iconfa(port, pin, aout);
150
151 imx_iomuxv1_set_iconfb(port, pin, bout);
152
153 return 0;
154}
155EXPORT_SYMBOL(mxc_gpio_mode);
156
157static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
158{
159 size_t i;
160 int ret;
161
162 for (i = 0; i < count; ++i) {
163 ret = mxc_gpio_mode(list[i]);
164
165 if (ret)
166 return ret;
167 }
168
169 return ret;
170}
171
172int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
173 const char *label)
174{
175 size_t i;
176 int ret;
177
178 for (i = 0; i < count; ++i) {
179 unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
180
181 ret = gpio_request(gpio, label);
182 if (ret)
183 goto err_gpio_request;
184 }
185
186 ret = imx_iomuxv1_setup_multiple(pin_list, count);
187 if (ret)
188 goto err_setup;
189
190 return 0;
191
192err_setup:
193 BUG_ON(i != count);
194
195err_gpio_request:
196 mxc_gpio_release_multiple_pins(pin_list, i);
197
198 return ret;
199}
200EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
201
202void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
203{
204 size_t i;
205
206 for (i = 0; i < count; ++i) {
207 unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
208
209 gpio_free(gpio);
210 }
211}
212EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
213
214static int imx_iomuxv1_init(void)
215{
216#ifdef CONFIG_ARCH_MX1
217 if (cpu_is_mx1()) {
218 imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR);
219 imx_iomuxv1_numports = MX1_NUM_GPIO_PORT;
220 } else
221#endif
222#ifdef CONFIG_MACH_MX21
223 if (cpu_is_mx21()) {
224 imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR);
225 imx_iomuxv1_numports = MX21_NUM_GPIO_PORT;
226 } else
227#endif
228#ifdef CONFIG_MACH_MX27
229 if (cpu_is_mx27()) {
230 imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR);
231 imx_iomuxv1_numports = MX27_NUM_GPIO_PORT;
232 } else
233#endif
234 return -ENODEV;
235
236 return 0;
237}
238pure_initcall(imx_iomuxv1_init);
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 844567ee35fe..c1ce51abdba6 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -30,9 +30,15 @@
30#include <asm/mach/time.h> 30#include <asm/mach/time.h>
31#include <mach/common.h> 31#include <mach/common.h>
32 32
33/*
34 * There are 2 versions of the timer hardware on Freescale MXC hardware.
35 * Version 1: MX1/MXL, MX21, MX27.
36 * Version 2: MX25, MX31, MX35, MX37, MX51
37 */
38
33/* defines common for all i.MX */ 39/* defines common for all i.MX */
34#define MXC_TCTL 0x00 40#define MXC_TCTL 0x00
35#define MXC_TCTL_TEN (1 << 0) 41#define MXC_TCTL_TEN (1 << 0) /* Enable module */
36#define MXC_TPRER 0x04 42#define MXC_TPRER 0x04
37 43
38/* MX1, MX21, MX27 */ 44/* MX1, MX21, MX27 */
@@ -47,8 +53,8 @@
47#define MX2_TSTAT_CAPT (1 << 1) 53#define MX2_TSTAT_CAPT (1 << 1)
48#define MX2_TSTAT_COMP (1 << 0) 54#define MX2_TSTAT_COMP (1 << 0)
49 55
50/* MX31, MX35, MX25, MXC91231 */ 56/* MX31, MX35, MX25, MXC91231, MX5 */
51#define MX3_TCTL_WAITEN (1 << 3) 57#define MX3_TCTL_WAITEN (1 << 3) /* Wait enable mode */
52#define MX3_TCTL_CLK_IPG (1 << 6) 58#define MX3_TCTL_CLK_IPG (1 << 6)
53#define MX3_TCTL_FRR (1 << 9) 59#define MX3_TCTL_FRR (1 << 9)
54#define MX3_IR 0x0c 60#define MX3_IR 0x0c
@@ -57,6 +63,9 @@
57#define MX3_TCN 0x24 63#define MX3_TCN 0x24
58#define MX3_TCMP 0x10 64#define MX3_TCMP 0x10
59 65
66#define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
67#define timer_is_v2() (!timer_is_v1())
68
60static struct clock_event_device clockevent_mxc; 69static struct clock_event_device clockevent_mxc;
61static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; 70static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
62 71
@@ -66,7 +75,7 @@ static inline void gpt_irq_disable(void)
66{ 75{
67 unsigned int tmp; 76 unsigned int tmp;
68 77
69 if (cpu_is_mx3() || cpu_is_mx25()) 78 if (timer_is_v2())
70 __raw_writel(0, timer_base + MX3_IR); 79 __raw_writel(0, timer_base + MX3_IR);
71 else { 80 else {
72 tmp = __raw_readl(timer_base + MXC_TCTL); 81 tmp = __raw_readl(timer_base + MXC_TCTL);
@@ -76,7 +85,7 @@ static inline void gpt_irq_disable(void)
76 85
77static inline void gpt_irq_enable(void) 86static inline void gpt_irq_enable(void)
78{ 87{
79 if (cpu_is_mx3() || cpu_is_mx25()) 88 if (timer_is_v2())
80 __raw_writel(1<<0, timer_base + MX3_IR); 89 __raw_writel(1<<0, timer_base + MX3_IR);
81 else { 90 else {
82 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, 91 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
@@ -86,11 +95,13 @@ static inline void gpt_irq_enable(void)
86 95
87static void gpt_irq_acknowledge(void) 96static void gpt_irq_acknowledge(void)
88{ 97{
89 if (cpu_is_mx1()) 98 if (timer_is_v1()) {
90 __raw_writel(0, timer_base + MX1_2_TSTAT); 99 if (cpu_is_mx1())
91 if (cpu_is_mx2()) 100 __raw_writel(0, timer_base + MX1_2_TSTAT);
92 __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, timer_base + MX1_2_TSTAT); 101 else
93 if (cpu_is_mx3() || cpu_is_mx25()) 102 __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP,
103 timer_base + MX1_2_TSTAT);
104 } else if (timer_is_v2())
94 __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT); 105 __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT);
95} 106}
96 107
@@ -117,7 +128,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
117{ 128{
118 unsigned int c = clk_get_rate(timer_clk); 129 unsigned int c = clk_get_rate(timer_clk);
119 130
120 if (cpu_is_mx3() || cpu_is_mx25()) 131 if (timer_is_v2())
121 clocksource_mxc.read = mx3_get_cycles; 132 clocksource_mxc.read = mx3_get_cycles;
122 133
123 clocksource_mxc.mult = clocksource_hz2mult(c, 134 clocksource_mxc.mult = clocksource_hz2mult(c,
@@ -180,7 +191,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
180 191
181 if (mode != clockevent_mode) { 192 if (mode != clockevent_mode) {
182 /* Set event time into far-far future */ 193 /* Set event time into far-far future */
183 if (cpu_is_mx3() || cpu_is_mx25()) 194 if (timer_is_v2())
184 __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3, 195 __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3,
185 timer_base + MX3_TCMP); 196 timer_base + MX3_TCMP);
186 else 197 else
@@ -233,7 +244,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
233 struct clock_event_device *evt = &clockevent_mxc; 244 struct clock_event_device *evt = &clockevent_mxc;
234 uint32_t tstat; 245 uint32_t tstat;
235 246
236 if (cpu_is_mx3() || cpu_is_mx25()) 247 if (timer_is_v2())
237 tstat = __raw_readl(timer_base + MX3_TSTAT); 248 tstat = __raw_readl(timer_base + MX3_TSTAT);
238 else 249 else
239 tstat = __raw_readl(timer_base + MX1_2_TSTAT); 250 tstat = __raw_readl(timer_base + MX1_2_TSTAT);
@@ -264,7 +275,7 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
264{ 275{
265 unsigned int c = clk_get_rate(timer_clk); 276 unsigned int c = clk_get_rate(timer_clk);
266 277
267 if (cpu_is_mx3() || cpu_is_mx25()) 278 if (timer_is_v2())
268 clockevent_mxc.set_next_event = mx3_set_next_event; 279 clockevent_mxc.set_next_event = mx3_set_next_event;
269 280
270 clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, 281 clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
@@ -296,7 +307,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
296 __raw_writel(0, timer_base + MXC_TCTL); 307 __raw_writel(0, timer_base + MXC_TCTL);
297 __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ 308 __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
298 309
299 if (cpu_is_mx3() || cpu_is_mx25()) 310 if (timer_is_v2())
300 tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN; 311 tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN;
301 else 312 else
302 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; 313 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
new file mode 100644
index 000000000000..afa6709db0b3
--- /dev/null
+++ b/arch/arm/plat-mxc/tzic.c
@@ -0,0 +1,172 @@
1/*
2 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/errno.h>
17#include <linux/io.h>
18
19#include <asm/mach/irq.h>
20
21#include <mach/hardware.h>
22
23/*
24 *****************************************
25 * TZIC Registers *
26 *****************************************
27 */
28
29#define TZIC_INTCNTL 0x0000 /* Control register */
30#define TZIC_INTTYPE 0x0004 /* Controller Type register */
31#define TZIC_IMPID 0x0008 /* Distributor Implementer Identification */
32#define TZIC_PRIOMASK 0x000C /* Priority Mask Reg */
33#define TZIC_SYNCCTRL 0x0010 /* Synchronizer Control register */
34#define TZIC_DSMINT 0x0014 /* DSM interrupt Holdoffregister */
35#define TZIC_INTSEC0(i) (0x0080 + ((i) << 2)) /* Interrupt Security Reg 0 */
36#define TZIC_ENSET0(i) (0x0100 + ((i) << 2)) /* Enable Set Reg 0 */
37#define TZIC_ENCLEAR0(i) (0x0180 + ((i) << 2)) /* Enable Clear Reg 0 */
38#define TZIC_SRCSET0 0x0200 /* Source Set Register 0 */
39#define TZIC_SRCCLAR0 0x0280 /* Source Clear Register 0 */
40#define TZIC_PRIORITY0 0x0400 /* Priority Register 0 */
41#define TZIC_PND0 0x0D00 /* Pending Register 0 */
42#define TZIC_HIPND0 0x0D80 /* High Priority Pending Register */
43#define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2)) /* Wakeup Config Register */
44#define TZIC_SWINT 0x0F00 /* Software Interrupt Rigger Register */
45#define TZIC_ID0 0x0FD0 /* Indentification Register 0 */
46
47void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
48
49/**
50 * tzic_mask_irq() - Disable interrupt number "irq" in the TZIC
51 *
52 * @param irq interrupt source number
53 */
54static void tzic_mask_irq(unsigned int irq)
55{
56 int index, off;
57
58 index = irq >> 5;
59 off = irq & 0x1F;
60 __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index));
61}
62
63/**
64 * tzic_unmask_irq() - Enable interrupt number "irq" in the TZIC
65 *
66 * @param irq interrupt source number
67 */
68static void tzic_unmask_irq(unsigned int irq)
69{
70 int index, off;
71
72 index = irq >> 5;
73 off = irq & 0x1F;
74 __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index));
75}
76
77static unsigned int wakeup_intr[4];
78
79/**
80 * tzic_set_wake_irq() - Set interrupt number "irq" in the TZIC as a wake-up source.
81 *
82 * @param irq interrupt source number
83 * @param enable enable as wake-up if equal to non-zero
84 * disble as wake-up if equal to zero
85 *
86 * @return This function returns 0 on success.
87 */
88static int tzic_set_wake_irq(unsigned int irq, unsigned int enable)
89{
90 unsigned int index, off;
91
92 index = irq >> 5;
93 off = irq & 0x1F;
94
95 if (index > 3)
96 return -EINVAL;
97
98 if (enable)
99 wakeup_intr[index] |= (1 << off);
100 else
101 wakeup_intr[index] &= ~(1 << off);
102
103 return 0;
104}
105
106static struct irq_chip mxc_tzic_chip = {
107 .name = "MXC_TZIC",
108 .ack = tzic_mask_irq,
109 .mask = tzic_mask_irq,
110 .unmask = tzic_unmask_irq,
111 .set_wake = tzic_set_wake_irq,
112};
113
114/*
115 * This function initializes the TZIC hardware and disables all the
116 * interrupts. It registers the interrupt enable and disable functions
117 * to the kernel for each interrupt source.
118 */
119void __init tzic_init_irq(void __iomem *irqbase)
120{
121 int i;
122
123 tzic_base = irqbase;
124 /* put the TZIC into the reset value with
125 * all interrupts disabled
126 */
127 i = __raw_readl(tzic_base + TZIC_INTCNTL);
128
129 __raw_writel(0x80010001, tzic_base + TZIC_INTCNTL);
130 __raw_writel(0x1f, tzic_base + TZIC_PRIOMASK);
131 __raw_writel(0x02, tzic_base + TZIC_SYNCCTRL);
132
133 for (i = 0; i < 4; i++)
134 __raw_writel(0xFFFFFFFF, tzic_base + TZIC_INTSEC0(i));
135
136 /* disable all interrupts */
137 for (i = 0; i < 4; i++)
138 __raw_writel(0xFFFFFFFF, tzic_base + TZIC_ENCLEAR0(i));
139
140 /* all IRQ no FIQ Warning :: No selection */
141
142 for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
143 set_irq_chip(i, &mxc_tzic_chip);
144 set_irq_handler(i, handle_level_irq);
145 set_irq_flags(i, IRQF_VALID);
146 }
147
148 pr_info("TrustZone Interrupt Controller (TZIC) initialized\n");
149}
150
151/**
152 * tzic_enable_wake() - enable wakeup interrupt
153 *
154 * @param is_idle 1 if called in idle loop (ENSET0 register);
155 * 0 to be used when called from low power entry
156 * @return 0 if successful; non-zero otherwise
157 */
158int tzic_enable_wake(int is_idle)
159{
160 unsigned int i, v;
161
162 __raw_writel(1, tzic_base + TZIC_DSMINT);
163 if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0))
164 return -EAGAIN;
165
166 for (i = 0; i < 4; i++) {
167 v = is_idle ? __raw_readl(TZIC_ENSET0(i)) : wakeup_intr[i];
168 __raw_writel(v, TZIC_WAKEUP0(i));
169 }
170
171 return 0;
172}
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 62f18ad43a28..fa7cb3a57cbf 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -49,24 +49,17 @@ static struct clocksource nmdk_clksrc = {
49static void nmdk_clkevt_mode(enum clock_event_mode mode, 49static void nmdk_clkevt_mode(enum clock_event_mode mode,
50 struct clock_event_device *dev) 50 struct clock_event_device *dev)
51{ 51{
52 unsigned long flags;
53
54 switch (mode) { 52 switch (mode) {
55 case CLOCK_EVT_MODE_PERIODIC: 53 case CLOCK_EVT_MODE_PERIODIC:
56 /* enable interrupts -- and count current value? */ 54 /* count current value? */
57 raw_local_irq_save(flags);
58 writel(readl(mtu_base + MTU_IMSC) | 1, mtu_base + MTU_IMSC); 55 writel(readl(mtu_base + MTU_IMSC) | 1, mtu_base + MTU_IMSC);
59 raw_local_irq_restore(flags);
60 break; 56 break;
61 case CLOCK_EVT_MODE_ONESHOT: 57 case CLOCK_EVT_MODE_ONESHOT:
62 BUG(); /* Not supported, yet */ 58 BUG(); /* Not supported, yet */
63 /* FALLTHROUGH */ 59 /* FALLTHROUGH */
64 case CLOCK_EVT_MODE_SHUTDOWN: 60 case CLOCK_EVT_MODE_SHUTDOWN:
65 case CLOCK_EVT_MODE_UNUSED: 61 case CLOCK_EVT_MODE_UNUSED:
66 /* disable irq */
67 raw_local_irq_save(flags);
68 writel(readl(mtu_base + MTU_IMSC) & ~1, mtu_base + MTU_IMSC); 62 writel(readl(mtu_base + MTU_IMSC) & ~1, mtu_base + MTU_IMSC);
69 raw_local_irq_restore(flags);
70 break; 63 break;
71 case CLOCK_EVT_MODE_RESUME: 64 case CLOCK_EVT_MODE_RESUME:
72 break; 65 break;
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
deleted file mode 100644
index 9e9d0286e48f..000000000000
--- a/arch/arm/plat-s3c/Kconfig
+++ /dev/null
@@ -1,215 +0,0 @@
1# Copyright 2007 Simtec Electronics
2#
3# Licensed under GPLv2
4
5config PLAT_S3C
6 bool
7 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
8 default y
9 select NO_IOPORT
10 help
11 Base platform code for any Samsung S3C device
12
13# low-level serial option nodes
14
15if PLAT_S3C
16
17config CPU_LLSERIAL_S3C2410_ONLY
18 bool
19 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
20
21config CPU_LLSERIAL_S3C2440_ONLY
22 bool
23 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
24
25config CPU_LLSERIAL_S3C2410
26 bool
27 help
28 Selected if there is an S3C2410 (or register compatible) serial
29 low-level implementation needed
30
31config CPU_LLSERIAL_S3C2440
32 bool
33 help
34 Selected if there is an S3C2440 (or register compatible) serial
35 low-level implementation needed
36
37# boot configurations
38
39comment "Boot options"
40
41config S3C_BOOT_WATCHDOG
42 bool "S3C Initialisation watchdog"
43 depends on S3C2410_WATCHDOG
44 help
45 Say y to enable the watchdog during the kernel decompression
46 stage. If the kernel fails to uncompress, then the watchdog
47 will trigger a reset and the system should restart.
48
49config S3C_BOOT_ERROR_RESET
50 bool "S3C Reboot on decompression error"
51 help
52 Say y here to use the watchdog to reset the system if the
53 kernel decompressor detects an error during decompression.
54
55config S3C_BOOT_UART_FORCE_FIFO
56 bool "Force UART FIFO on during boot process"
57 default y
58 help
59 Say Y here to force the UART FIFOs on during the kernel
60 uncompressor
61
62comment "Power management"
63
64config S3C2410_PM_DEBUG
65 bool "S3C2410 PM Suspend debug"
66 depends on PM
67 help
68 Say Y here if you want verbose debugging from the PM Suspend and
69 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
70 for more information.
71
72config S3C_PM_DEBUG_LED_SMDK
73 bool "SMDK LED suspend/resume debugging"
74 depends on PM && (MACH_SMDK6410)
75 help
76 Say Y here to enable the use of the SMDK LEDs on the baseboard
77 for debugging of the state of the suspend and resume process.
78
79 Note, this currently only works for S3C64XX based SMDK boards.
80
81config S3C2410_PM_CHECK
82 bool "S3C2410 PM Suspend Memory CRC"
83 depends on PM && CRC32
84 help
85 Enable the PM code's memory area checksum over sleep. This option
86 will generate CRCs of all blocks of memory, and store them before
87 going to sleep. The blocks are then checked on resume for any
88 errors.
89
90 Note, this can take several seconds depending on memory size
91 and CPU speed.
92
93 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
94
95config S3C2410_PM_CHECK_CHUNKSIZE
96 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
97 depends on PM && S3C2410_PM_CHECK
98 default 64
99 help
100 Set the chunksize in Kilobytes of the CRC for checking memory
101 corruption over suspend and resume. A smaller value will mean that
102 the CRC data block will take more memory, but wil identify any
103 faults with better precision.
104
105 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
106
107config S3C_LOWLEVEL_UART_PORT
108 int "S3C UART to use for low-level messages"
109 default 0
110 help
111 Choice of which UART port to use for the low-level messages,
112 such as the `Uncompressing...` at start time. The value of
113 this configuration should be between zero and two. The port
114 must have been initialised by the boot-loader before use.
115
116# options for gpiolib support
117
118config S3C_GPIO_SPACE
119 int "Space between gpio banks"
120 default 0
121 help
122 Add a number of spare GPIO entries between each bank for debugging
123 purposes. This allows any problems where an counter overflows from
124 one bank to another to be caught, at the expense of using a little
125 more memory.
126
127config S3C_GPIO_TRACK
128 bool
129 help
130 Internal configuration option to enable the s3c specific gpio
131 chip tracking if the platform requires it.
132
133config S3C_GPIO_PULL_UPDOWN
134 bool
135 help
136 Internal configuration to enable the correct GPIO pull helper
137
138config S3C_GPIO_PULL_DOWN
139 bool
140 help
141 Internal configuration to enable the correct GPIO pull helper
142
143config S3C_GPIO_PULL_UP
144 bool
145 help
146 Internal configuration to enable the correct GPIO pull helper
147
148config S3C_GPIO_CFG_S3C24XX
149 bool
150 help
151 Internal configuration to enable S3C24XX style GPIO configuration
152 functions.
153
154config S3C_GPIO_CFG_S3C64XX
155 bool
156 help
157 Internal configuration to enable S3C64XX style GPIO configuration
158 functions.
159
160config S5P_GPIO_CFG_S5PC1XX
161 bool
162 help
163 Internal configuration to enable S5PC1XX style GPIO configuration
164 functions.
165
166# DMA
167
168config S3C_DMA
169 bool
170 help
171 Internal configuration for S3C DMA core
172
173# device definitions to compile in
174
175config S3C_DEV_HSMMC
176 bool
177 help
178 Compile in platform device definitions for HSMMC code
179
180config S3C_DEV_HSMMC1
181 bool
182 help
183 Compile in platform device definitions for HSMMC channel 1
184
185config S3C_DEV_HSMMC2
186 bool
187 help
188 Compile in platform device definitions for HSMMC channel 2
189
190config S3C_DEV_I2C1
191 bool
192 help
193 Compile in platform device definitions for I2C channel 1
194
195config S3C_DEV_FB
196 bool
197 help
198 Compile in platform device definition for framebuffer
199
200config S3C_DEV_USB_HOST
201 bool
202 help
203 Compile in platform device definition for USB host.
204
205config S3C_DEV_USB_HSOTG
206 bool
207 help
208 Compile in platform device definition for USB high-speed OtG
209
210config S3C_DEV_NAND
211 bool
212 help
213 Compile in platform device definition for NAND controller
214
215endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
deleted file mode 100644
index 50444da98425..000000000000
--- a/arch/arm/plat-s3c/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
1# arch/arm/plat-s3c/Makefile
2#
3# Copyright 2008 Simtec Electronics
4#
5# Licensed under GPLv2
6
7obj-y :=
8obj-m :=
9obj-n :=
10obj- :=
11
12# Core support for all Samsung SoCs
13
14obj-y += init.o
15obj-y += time.o
16obj-y += clock.o
17obj-y += pwm-clock.o
18obj-y += gpio.o
19obj-y += gpio-config.o
20
21# DMA support
22
23obj-$(CONFIG_S3C_DMA) += dma.o
24
25# PM support
26
27obj-$(CONFIG_PM) += pm.o
28obj-$(CONFIG_PM) += pm-gpio.o
29obj-$(CONFIG_S3C2410_PM_CHECK) += pm-check.o
30
31# PWM support
32
33obj-$(CONFIG_HAVE_PWM) += pwm.o
34
35# devices
36
37obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
38obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
39obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
40obj-y += dev-i2c0.o
41obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
42obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
43obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
44obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
45obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 342647eb91d8..6e93ef8f3d43 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -14,58 +14,40 @@ config PLAT_S3C24XX
14 14
15if PLAT_S3C24XX 15if PLAT_S3C24XX
16 16
17# code that is shared between a number of the s3c24xx implementations 17# low-level serial option nodes
18 18
19config S3C2410_CLOCK 19config CPU_LLSERIAL_S3C2410_ONLY
20 bool 20 bool
21 help 21 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
22 Clock code for the S3C2410, and similar processors which
23 is currently includes the S3C2410, S3C2440, S3C2442.
24 22
25config S3C24XX_DCLK 23config CPU_LLSERIAL_S3C2440_ONLY
26 bool 24 bool
27 help 25 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
28 Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
29 26
30config CPU_S3C244X 27config CPU_LLSERIAL_S3C2410
31 bool 28 bool
32 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
33 help
34 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
35
36config S3C2440_CPUFREQ
37 bool "S3C2440/S3C2442 CPU Frequency scaling support"
38 depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
39 select S3C2410_CPUFREQ_UTILS
40 default y
41 help 29 help
42 CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs. 30 Selected if there is an S3C2410 (or register compatible) serial
31 low-level implementation needed
43 32
44config S3C2440_XTAL_12000000 33config CPU_LLSERIAL_S3C2440
45 bool 34 bool
46 help 35 help
47 Indicate that the build needs to support 12MHz system 36 Selected if there is an S3C2440 (or register compatible) serial
48 crystal. 37 low-level implementation needed
49 38
50config S3C2440_XTAL_16934400 39# code that is shared between a number of the s3c24xx implementations
51 bool
52 help
53 Indicate that the build needs to support 16.9344MHz system
54 crystal.
55 40
56config S3C2440_PLL_12000000 41config S3C2410_CLOCK
57 bool 42 bool
58 depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
59 default y if CPU_FREQ_S3C24XX_PLL
60 help 43 help
61 PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals. 44 Clock code for the S3C2410, and similar processors which
45 is currently includes the S3C2410, S3C2440, S3C2442.
62 46
63config S3C2440_PLL_16934400 47config S3C24XX_DCLK
64 bool 48 bool
65 depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
66 default y if CPU_FREQ_S3C24XX_PLL
67 help 49 help
68 PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. 50 Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
69 51
70config S3C24XX_PWM 52config S3C24XX_PWM
71 bool "PWM device support" 53 bool "PWM device support"
@@ -74,7 +56,6 @@ config S3C24XX_PWM
74 Support for exporting the PWM timer blocks via the pwm device 56 Support for exporting the PWM timer blocks via the pwm device
75 system. 57 system.
76 58
77
78# gpio configurations 59# gpio configurations
79 60
80config S3C24XX_GPIO_EXTRA 61config S3C24XX_GPIO_EXTRA
@@ -117,13 +98,6 @@ config S3C2410_DMA_DEBUG
117 Enable debugging output for the DMA code. This option sends info 98 Enable debugging output for the DMA code. This option sends info
118 to the kernel log, at priority KERN_DEBUG. 99 to the kernel log, at priority KERN_DEBUG.
119 100
120config S3C24XX_ADC
121 bool "ADC common driver support"
122 help
123 Core support for the ADC block found in the S3C24XX SoC systems
124 for drivers such as the touchscreen and hwmon to use to share
125 this resource.
126
127# SPI default pin configuration code 101# SPI default pin configuration code
128 102
129config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13 103config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 5dee8c12e8b4..c2237c41141f 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -25,20 +25,12 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
25 25
26# Architecture dependant builds 26# Architecture dependant builds
27 27
28obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
29obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
30obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o
31obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o
32obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
33obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
34
35obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 28obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
36obj-$(CONFIG_PM) += pm.o 29obj-$(CONFIG_PM) += pm.o
37obj-$(CONFIG_PM) += irq-pm.o 30obj-$(CONFIG_PM) += irq-pm.o
38obj-$(CONFIG_PM) += sleep.o 31obj-$(CONFIG_PM) += sleep.o
39obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o 32obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
40obj-$(CONFIG_S3C2410_DMA) += dma.o 33obj-$(CONFIG_S3C2410_DMA) += dma.o
41obj-$(CONFIG_S3C24XX_ADC) += adc.o
42obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o 34obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o
43obj-$(CONFIG_S3C2412_IOTIMING) += s3c2412-iotiming.o 35obj-$(CONFIG_S3C2412_IOTIMING) += s3c2412-iotiming.o
44obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o 36obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c
index ac061a1bcb37..cf97caafe56b 100644
--- a/arch/arm/plat-s3c24xx/clock-dclk.c
+++ b/arch/arm/plat-s3c24xx/clock-dclk.c
@@ -161,14 +161,18 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
161 161
162/* external clock definitions */ 162/* external clock definitions */
163 163
164static struct clk_ops dclk_ops = {
165 .set_parent = s3c24xx_dclk_setparent,
166 .set_rate = s3c24xx_set_dclk_rate,
167 .round_rate = s3c24xx_round_dclk_rate,
168};
169
164struct clk s3c24xx_dclk0 = { 170struct clk s3c24xx_dclk0 = {
165 .name = "dclk0", 171 .name = "dclk0",
166 .id = -1, 172 .id = -1,
167 .ctrlbit = S3C2410_DCLKCON_DCLK0EN, 173 .ctrlbit = S3C2410_DCLKCON_DCLK0EN,
168 .enable = s3c24xx_dclk_enable, 174 .enable = s3c24xx_dclk_enable,
169 .set_parent = s3c24xx_dclk_setparent, 175 .ops = &dclk_ops,
170 .set_rate = s3c24xx_set_dclk_rate,
171 .round_rate = s3c24xx_round_dclk_rate,
172}; 176};
173 177
174struct clk s3c24xx_dclk1 = { 178struct clk s3c24xx_dclk1 = {
@@ -176,19 +180,21 @@ struct clk s3c24xx_dclk1 = {
176 .id = -1, 180 .id = -1,
177 .ctrlbit = S3C2410_DCLKCON_DCLK1EN, 181 .ctrlbit = S3C2410_DCLKCON_DCLK1EN,
178 .enable = s3c24xx_dclk_enable, 182 .enable = s3c24xx_dclk_enable,
179 .set_parent = s3c24xx_dclk_setparent, 183 .ops = &dclk_ops,
180 .set_rate = s3c24xx_set_dclk_rate, 184};
181 .round_rate = s3c24xx_round_dclk_rate, 185
186static struct clk_ops clkout_ops = {
187 .set_parent = s3c24xx_clkout_setparent,
182}; 188};
183 189
184struct clk s3c24xx_clkout0 = { 190struct clk s3c24xx_clkout0 = {
185 .name = "clkout0", 191 .name = "clkout0",
186 .id = -1, 192 .id = -1,
187 .set_parent = s3c24xx_clkout_setparent, 193 .ops = &clkout_ops,
188}; 194};
189 195
190struct clk s3c24xx_clkout1 = { 196struct clk s3c24xx_clkout1 = {
191 .name = "clkout1", 197 .name = "clkout1",
192 .id = -1, 198 .id = -1,
193 .set_parent = s3c24xx_clkout_setparent, 199 .ops = &clkout_ops,
194}; 200};
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 4af9dd948793..9ca64df35bf6 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -49,9 +49,7 @@
49#include <plat/s3c2400.h> 49#include <plat/s3c2400.h>
50#include <plat/s3c2410.h> 50#include <plat/s3c2410.h>
51#include <plat/s3c2412.h> 51#include <plat/s3c2412.h>
52#include "s3c244x.h" 52#include <plat/s3c244x.h>
53#include <plat/s3c2440.h>
54#include <plat/s3c2442.h>
55#include <plat/s3c2443.h> 53#include <plat/s3c2443.h>
56 54
57/* table of supported CPUs */ 55/* table of supported CPUs */
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 7f686a31e672..8c6de1c9968f 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -32,6 +32,7 @@
32 32
33#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <plat/udc.h> 34#include <plat/udc.h>
35#include <plat/mci.h>
35 36
36#include <plat/devs.h> 37#include <plat/devs.h>
37#include <plat/cpu.h> 38#include <plat/cpu.h>
@@ -112,34 +113,6 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
112 }, 113 },
113}; 114};
114 115
115/* yart devices */
116
117static struct platform_device s3c24xx_uart_device0 = {
118 .id = 0,
119};
120
121static struct platform_device s3c24xx_uart_device1 = {
122 .id = 1,
123};
124
125static struct platform_device s3c24xx_uart_device2 = {
126 .id = 2,
127};
128
129static struct platform_device s3c24xx_uart_device3 = {
130 .id = 3,
131};
132
133struct platform_device *s3c24xx_uart_src[4] = {
134 &s3c24xx_uart_device0,
135 &s3c24xx_uart_device1,
136 &s3c24xx_uart_device2,
137 &s3c24xx_uart_device3,
138};
139
140struct platform_device *s3c24xx_uart_devs[4] = {
141};
142
143/* LCD Controller */ 116/* LCD Controller */
144 117
145static struct resource s3c_lcd_resource[] = { 118static struct resource s3c_lcd_resource[] = {
@@ -185,9 +158,27 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
185} 158}
186 159
187/* Touchscreen */ 160/* Touchscreen */
161
162static struct resource s3c_ts_resource[] = {
163 [0] = {
164 .start = S3C24XX_PA_ADC,
165 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
166 .flags = IORESOURCE_MEM,
167 },
168 [1] = {
169 .start = IRQ_TC,
170 .end = IRQ_TC,
171 .flags = IORESOURCE_IRQ,
172 },
173
174};
175
188struct platform_device s3c_device_ts = { 176struct platform_device s3c_device_ts = {
189 .name = "s3c2410-ts", 177 .name = "s3c2410-ts",
190 .id = -1, 178 .id = -1,
179 .dev.parent = &s3c_device_adc.dev,
180 .num_resources = ARRAY_SIZE(s3c_ts_resource),
181 .resource = s3c_ts_resource,
191}; 182};
192EXPORT_SYMBOL(s3c_device_ts); 183EXPORT_SYMBOL(s3c_device_ts);
193 184
@@ -379,6 +370,18 @@ struct platform_device s3c_device_sdi = {
379 370
380EXPORT_SYMBOL(s3c_device_sdi); 371EXPORT_SYMBOL(s3c_device_sdi);
381 372
373void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
374{
375 struct s3c24xx_mci_pdata *npd;
376
377 npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
378 if (!npd)
379 printk(KERN_ERR "%s: no memory to copy pdata", __func__);
380
381 s3c_device_sdi.dev.platform_data = npd;
382}
383
384
382/* SPI (0) */ 385/* SPI (0) */
383 386
384static struct resource s3c_spi0_resource[] = { 387static struct resource s3c_spi0_resource[] = {
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index f0ea7943ac5a..93827b3d4e84 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -33,7 +33,7 @@
33#include <mach/dma.h> 33#include <mach/dma.h>
34#include <mach/map.h> 34#include <mach/map.h>
35 35
36#include <plat/dma-plat.h> 36#include <plat/dma-s3c24xx.h>
37#include <plat/regs-dma.h> 37#include <plat/regs-dma.h>
38 38
39/* io map for dma */ 39/* io map for dma */
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 6d7a961d3269..4f0f11a6a677 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -20,7 +20,7 @@
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22 22
23#include <mach/gpio-core.h> 23#include <plat/gpio-core.h>
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <plat/pm.h> 26#include <plat/pm.h>
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
index 53a93656d5db..de5e88fdcb31 100644
--- a/arch/arm/plat-s3c/include/plat/audio-simtec.h
+++ b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/audio-simtec.h 1/* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
index 33d421d78bad..d623235ae961 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
@@ -135,7 +135,7 @@ struct s3c_cpufreq_config {
135 * @locktime_m: The lock-time in uS for the MPLL. 135 * @locktime_m: The lock-time in uS for the MPLL.
136 * @locktime_u: The lock-time in uS for the UPLL. 136 * @locktime_u: The lock-time in uS for the UPLL.
137 * @locttime_bits: The number of bits each LOCKTIME field. 137 * @locttime_bits: The number of bits each LOCKTIME field.
138 * @need_pll: Set if this driver needs to change the PLL values to acheive 138 * @need_pll: Set if this driver needs to change the PLL values to achieve
139 * any frequency changes. This is really only need by devices like the 139 * any frequency changes. This is really only need by devices like the
140 * S3C2410 where there is no or limited divider between the PLL and the 140 * S3C2410 where there is no or limited divider between the PLL and the
141 * ARMCLK. 141 * ARMCLK.
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h
index 36aaa10fad06..2ac2b21ec490 100644
--- a/arch/arm/plat-s3c24xx/include/plat/mci.h
+++ b/arch/arm/plat-s3c24xx/include/plat/mci.h
@@ -40,4 +40,13 @@ struct s3c24xx_mci_pdata {
40 unsigned short vdd); 40 unsigned short vdd);
41}; 41};
42 42
43/**
44 * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device
45 * @pdata: The platform data
46 *
47 * Copy the platform data supplied by @pdata so that this can be marked
48 * __initdata.
49 */
50extern void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata);
51
43#endif /* _ARCH_NCI_H */ 52#endif /* _ARCH_NCI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
deleted file mode 100644
index 107853bf9481..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2440
14extern int s3c2440_init(void);
15#else
16#define s3c2440_init NULL
17#endif
diff --git a/arch/arm/plat-s3c24xx/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 6aab5eaae2b4..307248d1ccbb 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c24xx/s3c244x.h 1/* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -23,3 +23,15 @@ extern void s3c244x_init_clocks(int xtal);
23#define s3c244x_init_uarts NULL 23#define s3c244x_init_uarts NULL
24#define s3c244x_map_io NULL 24#define s3c244x_map_io NULL
25#endif 25#endif
26
27#ifdef CONFIG_CPU_S3C2440
28extern int s3c2440_init(void);
29#else
30#define s3c2440_init NULL
31#endif
32
33#ifdef CONFIG_CPU_S3C2442
34extern int s3c2442_init(void);
35#else
36#define s3c2442_init NULL
37#endif
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
deleted file mode 100644
index e6da87a5885c..000000000000
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ /dev/null
@@ -1,71 +0,0 @@
1# Copyright 2008 Openmoko, Inc.
2# Copyright 2008 Simtec Electronics
3# Ben Dooks <ben@simtec.co.uk>
4#
5# Licensed under GPLv2
6
7config PLAT_S3C64XX
8 bool
9 depends on ARCH_S3C64XX
10 default y
11 select CPU_V6
12 select PLAT_S3C
13 select ARM_VIC
14 select NO_IOPORT
15 select ARCH_REQUIRE_GPIOLIB
16 select S3C_GPIO_TRACK
17 select S3C_GPIO_PULL_UPDOWN
18 select S3C_GPIO_CFG_S3C24XX
19 select S3C_GPIO_CFG_S3C64XX
20 select S3C_DEV_NAND
21 select USB_ARCH_HAS_OHCI
22 help
23 Base platform code for any Samsung S3C64XX device
24
25if PLAT_S3C64XX
26
27# Configuration options shared by all S3C64XX implementations
28
29config CPU_S3C6400_INIT
30 bool
31 help
32 Common initialisation code for the S3C6400 that is shared
33 by other CPUs in the series, such as the S3C6410.
34
35config CPU_S3C6400_CLOCK
36 bool
37 help
38 Common clock support code for the S3C6400 that is shared
39 by other CPUs in the series, such as the S3C6410.
40
41config S3C64XX_DMA
42 bool "S3C64XX DMA"
43 select S3C_DMA
44
45# platform specific device setup
46
47config S3C64XX_SETUP_I2C0
48 bool
49 default y
50 help
51 Common setup code for i2c bus 0.
52
53 Note, currently since i2c0 is always compiled, this setup helper
54 is always compiled with it.
55
56config S3C64XX_SETUP_I2C1
57 bool
58 help
59 Common setup code for i2c bus 1.
60
61config S3C64XX_SETUP_FB_24BPP
62 bool
63 help
64 Common setup code for S3C64XX with an 24bpp RGB display helper.
65
66config S3C64XX_SETUP_SDHCI_GPIO
67 bool
68 help
69 Common setup code for S3C64XX SDHCI GPIO configurations
70
71endif
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
deleted file mode 100644
index 7a36e899360d..000000000000
--- a/arch/arm/plat-s3c64xx/clock.c
+++ /dev/null
@@ -1,300 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/clock.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX Base clock support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/io.h>
20
21#include <mach/hardware.h>
22#include <mach/map.h>
23
24#include <plat/regs-sys.h>
25#include <plat/regs-clock.h>
26#include <plat/cpu.h>
27#include <plat/devs.h>
28#include <plat/clock.h>
29
30struct clk clk_h2 = {
31 .name = "hclk2",
32 .id = -1,
33 .rate = 0,
34};
35
36struct clk clk_27m = {
37 .name = "clk_27m",
38 .id = -1,
39 .rate = 27000000,
40};
41
42static int clk_48m_ctrl(struct clk *clk, int enable)
43{
44 unsigned long flags;
45 u32 val;
46
47 /* can't rely on clock lock, this register has other usages */
48 local_irq_save(flags);
49
50 val = __raw_readl(S3C64XX_OTHERS);
51 if (enable)
52 val |= S3C64XX_OTHERS_USBMASK;
53 else
54 val &= ~S3C64XX_OTHERS_USBMASK;
55
56 __raw_writel(val, S3C64XX_OTHERS);
57 local_irq_restore(flags);
58
59 return 0;
60}
61
62struct clk clk_48m = {
63 .name = "clk_48m",
64 .id = -1,
65 .rate = 48000000,
66 .enable = clk_48m_ctrl,
67};
68
69static int inline s3c64xx_gate(void __iomem *reg,
70 struct clk *clk,
71 int enable)
72{
73 unsigned int ctrlbit = clk->ctrlbit;
74 u32 con;
75
76 con = __raw_readl(reg);
77
78 if (enable)
79 con |= ctrlbit;
80 else
81 con &= ~ctrlbit;
82
83 __raw_writel(con, reg);
84 return 0;
85}
86
87static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
88{
89 return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
90}
91
92static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
93{
94 return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
95}
96
97int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
98{
99 return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
100}
101
102static struct clk init_clocks_disable[] = {
103 {
104 .name = "nand",
105 .id = -1,
106 .parent = &clk_h,
107 }, {
108 .name = "adc",
109 .id = -1,
110 .parent = &clk_p,
111 .enable = s3c64xx_pclk_ctrl,
112 .ctrlbit = S3C_CLKCON_PCLK_TSADC,
113 }, {
114 .name = "i2c",
115 .id = -1,
116 .parent = &clk_p,
117 .enable = s3c64xx_pclk_ctrl,
118 .ctrlbit = S3C_CLKCON_PCLK_IIC,
119 }, {
120 .name = "iis",
121 .id = 0,
122 .parent = &clk_p,
123 .enable = s3c64xx_pclk_ctrl,
124 .ctrlbit = S3C_CLKCON_PCLK_IIS0,
125 }, {
126 .name = "iis",
127 .id = 1,
128 .parent = &clk_p,
129 .enable = s3c64xx_pclk_ctrl,
130 .ctrlbit = S3C_CLKCON_PCLK_IIS1,
131 }, {
132 .name = "spi",
133 .id = 0,
134 .parent = &clk_p,
135 .enable = s3c64xx_pclk_ctrl,
136 .ctrlbit = S3C_CLKCON_PCLK_SPI0,
137 }, {
138 .name = "spi",
139 .id = 1,
140 .parent = &clk_p,
141 .enable = s3c64xx_pclk_ctrl,
142 .ctrlbit = S3C_CLKCON_PCLK_SPI1,
143 }, {
144 .name = "48m",
145 .id = 0,
146 .parent = &clk_48m,
147 .enable = s3c64xx_sclk_ctrl,
148 .ctrlbit = S3C_CLKCON_SCLK_MMC0_48,
149 }, {
150 .name = "48m",
151 .id = 1,
152 .parent = &clk_48m,
153 .enable = s3c64xx_sclk_ctrl,
154 .ctrlbit = S3C_CLKCON_SCLK_MMC1_48,
155 }, {
156 .name = "48m",
157 .id = 2,
158 .parent = &clk_48m,
159 .enable = s3c64xx_sclk_ctrl,
160 .ctrlbit = S3C_CLKCON_SCLK_MMC2_48,
161 }, {
162 .name = "dma0",
163 .id = -1,
164 .parent = &clk_h,
165 .enable = s3c64xx_hclk_ctrl,
166 .ctrlbit = S3C_CLKCON_HCLK_DMA0,
167 }, {
168 .name = "dma1",
169 .id = -1,
170 .parent = &clk_h,
171 .enable = s3c64xx_hclk_ctrl,
172 .ctrlbit = S3C_CLKCON_HCLK_DMA1,
173 },
174};
175
176static struct clk init_clocks[] = {
177 {
178 .name = "lcd",
179 .id = -1,
180 .parent = &clk_h,
181 .enable = s3c64xx_hclk_ctrl,
182 .ctrlbit = S3C_CLKCON_HCLK_LCD,
183 }, {
184 .name = "gpio",
185 .id = -1,
186 .parent = &clk_p,
187 .enable = s3c64xx_pclk_ctrl,
188 .ctrlbit = S3C_CLKCON_PCLK_GPIO,
189 }, {
190 .name = "usb-host",
191 .id = -1,
192 .parent = &clk_h,
193 .enable = s3c64xx_hclk_ctrl,
194 .ctrlbit = S3C_CLKCON_HCLK_UHOST,
195 }, {
196 .name = "hsmmc",
197 .id = 0,
198 .parent = &clk_h,
199 .enable = s3c64xx_hclk_ctrl,
200 .ctrlbit = S3C_CLKCON_HCLK_HSMMC0,
201 }, {
202 .name = "hsmmc",
203 .id = 1,
204 .parent = &clk_h,
205 .enable = s3c64xx_hclk_ctrl,
206 .ctrlbit = S3C_CLKCON_HCLK_HSMMC1,
207 }, {
208 .name = "hsmmc",
209 .id = 2,
210 .parent = &clk_h,
211 .enable = s3c64xx_hclk_ctrl,
212 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
213 }, {
214 .name = "timers",
215 .id = -1,
216 .parent = &clk_p,
217 .enable = s3c64xx_pclk_ctrl,
218 .ctrlbit = S3C_CLKCON_PCLK_PWM,
219 }, {
220 .name = "uart",
221 .id = 0,
222 .parent = &clk_p,
223 .enable = s3c64xx_pclk_ctrl,
224 .ctrlbit = S3C_CLKCON_PCLK_UART0,
225 }, {
226 .name = "uart",
227 .id = 1,
228 .parent = &clk_p,
229 .enable = s3c64xx_pclk_ctrl,
230 .ctrlbit = S3C_CLKCON_PCLK_UART1,
231 }, {
232 .name = "uart",
233 .id = 2,
234 .parent = &clk_p,
235 .enable = s3c64xx_pclk_ctrl,
236 .ctrlbit = S3C_CLKCON_PCLK_UART2,
237 }, {
238 .name = "uart",
239 .id = 3,
240 .parent = &clk_p,
241 .enable = s3c64xx_pclk_ctrl,
242 .ctrlbit = S3C_CLKCON_PCLK_UART3,
243 }, {
244 .name = "rtc",
245 .id = -1,
246 .parent = &clk_p,
247 .enable = s3c64xx_pclk_ctrl,
248 .ctrlbit = S3C_CLKCON_PCLK_RTC,
249 }, {
250 .name = "watchdog",
251 .id = -1,
252 .parent = &clk_p,
253 .ctrlbit = S3C_CLKCON_PCLK_WDT,
254 }, {
255 .name = "ac97",
256 .id = -1,
257 .parent = &clk_p,
258 .ctrlbit = S3C_CLKCON_PCLK_AC97,
259 }
260};
261
262static struct clk *clks[] __initdata = {
263 &clk_ext,
264 &clk_epll,
265 &clk_27m,
266 &clk_48m,
267 &clk_h2,
268};
269
270void __init s3c64xx_register_clocks(void)
271{
272 struct clk *clkp;
273 int ret;
274 int ptr;
275
276 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
277
278 clkp = init_clocks;
279 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
280 ret = s3c24xx_register_clock(clkp);
281 if (ret < 0) {
282 printk(KERN_ERR "Failed to register clock %s (%d)\n",
283 clkp->name, ret);
284 }
285 }
286
287 clkp = init_clocks_disable;
288 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
289
290 ret = s3c24xx_register_clock(clkp);
291 if (ret < 0) {
292 printk(KERN_ERR "Failed to register clock %s (%d)\n",
293 clkp->name, ret);
294 }
295
296 (clkp->enable)(clkp, 0);
297 }
298
299 s3c_pwmclk_init();
300}
diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/plat-s3c64xx/dev-audio.c
deleted file mode 100644
index a21a88fbb7e3..000000000000
--- a/arch/arm/plat-s3c64xx/dev-audio.c
+++ /dev/null
@@ -1,167 +0,0 @@
1/* linux/arch/arm/plat-s3c/dev-audio.c
2 *
3 * Copyright 2009 Wolfson Microelectronics
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18#include <mach/dma.h>
19#include <mach/gpio.h>
20
21#include <plat/devs.h>
22#include <plat/audio.h>
23#include <plat/gpio-bank-d.h>
24#include <plat/gpio-bank-e.h>
25#include <plat/gpio-cfg.h>
26
27static struct resource s3c64xx_iis0_resource[] = {
28 [0] = {
29 .start = S3C64XX_PA_IIS0,
30 .end = S3C64XX_PA_IIS0 + 0x100 - 1,
31 .flags = IORESOURCE_MEM,
32 },
33};
34
35struct platform_device s3c64xx_device_iis0 = {
36 .name = "s3c64xx-iis",
37 .id = 0,
38 .num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
39 .resource = s3c64xx_iis0_resource,
40};
41EXPORT_SYMBOL(s3c64xx_device_iis0);
42
43static struct resource s3c64xx_iis1_resource[] = {
44 [0] = {
45 .start = S3C64XX_PA_IIS1,
46 .end = S3C64XX_PA_IIS1 + 0x100 - 1,
47 .flags = IORESOURCE_MEM,
48 },
49};
50
51struct platform_device s3c64xx_device_iis1 = {
52 .name = "s3c64xx-iis",
53 .id = 1,
54 .num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
55 .resource = s3c64xx_iis1_resource,
56};
57EXPORT_SYMBOL(s3c64xx_device_iis1);
58
59static struct resource s3c64xx_iisv4_resource[] = {
60 [0] = {
61 .start = S3C64XX_PA_IISV4,
62 .end = S3C64XX_PA_IISV4 + 0x100 - 1,
63 .flags = IORESOURCE_MEM,
64 },
65};
66
67struct platform_device s3c64xx_device_iisv4 = {
68 .name = "s3c64xx-iis-v4",
69 .id = -1,
70 .num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
71 .resource = s3c64xx_iisv4_resource,
72};
73EXPORT_SYMBOL(s3c64xx_device_iisv4);
74
75
76/* PCM Controller platform_devices */
77
78static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
79{
80 switch (pdev->id) {
81 case 0:
82 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
83 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
84 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
85 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
86 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
87 break;
88 case 1:
89 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
90 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
91 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
92 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
93 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
94 break;
95 default:
96 printk(KERN_DEBUG "Invalid PCM Controller number!");
97 return -EINVAL;
98 }
99
100 return 0;
101}
102
103static struct resource s3c64xx_pcm0_resource[] = {
104 [0] = {
105 .start = S3C64XX_PA_PCM0,
106 .end = S3C64XX_PA_PCM0 + 0x100 - 1,
107 .flags = IORESOURCE_MEM,
108 },
109 [1] = {
110 .start = DMACH_PCM0_TX,
111 .end = DMACH_PCM0_TX,
112 .flags = IORESOURCE_DMA,
113 },
114 [2] = {
115 .start = DMACH_PCM0_RX,
116 .end = DMACH_PCM0_RX,
117 .flags = IORESOURCE_DMA,
118 },
119};
120
121static struct s3c_audio_pdata s3c_pcm0_pdata = {
122 .cfg_gpio = s3c64xx_pcm_cfg_gpio,
123};
124
125struct platform_device s3c64xx_device_pcm0 = {
126 .name = "samsung-pcm",
127 .id = 0,
128 .num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource),
129 .resource = s3c64xx_pcm0_resource,
130 .dev = {
131 .platform_data = &s3c_pcm0_pdata,
132 },
133};
134EXPORT_SYMBOL(s3c64xx_device_pcm0);
135
136static struct resource s3c64xx_pcm1_resource[] = {
137 [0] = {
138 .start = S3C64XX_PA_PCM1,
139 .end = S3C64XX_PA_PCM1 + 0x100 - 1,
140 .flags = IORESOURCE_MEM,
141 },
142 [1] = {
143 .start = DMACH_PCM1_TX,
144 .end = DMACH_PCM1_TX,
145 .flags = IORESOURCE_DMA,
146 },
147 [2] = {
148 .start = DMACH_PCM1_RX,
149 .end = DMACH_PCM1_RX,
150 .flags = IORESOURCE_DMA,
151 },
152};
153
154static struct s3c_audio_pdata s3c_pcm1_pdata = {
155 .cfg_gpio = s3c64xx_pcm_cfg_gpio,
156};
157
158struct platform_device s3c64xx_device_pcm1 = {
159 .name = "samsung-pcm",
160 .id = 1,
161 .num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource),
162 .resource = s3c64xx_pcm1_resource,
163 .dev = {
164 .platform_data = &s3c_pcm1_pdata,
165 },
166};
167EXPORT_SYMBOL(s3c64xx_device_pcm1);
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
deleted file mode 100644
index 8dc5b6da9789..000000000000
--- a/arch/arm/plat-s3c64xx/irq.c
+++ /dev/null
@@ -1,256 +0,0 @@
1/* arch/arm/plat-s3c64xx/irq.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - Interrupt handling
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/serial_core.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20
21#include <asm/hardware/vic.h>
22
23#include <mach/map.h>
24#include <plat/regs-serial.h>
25#include <plat/regs-timer.h>
26#include <plat/cpu.h>
27
28/* Timer interrupt handling */
29
30static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
31{
32 generic_handle_irq(sub_irq);
33}
34
35static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
36{
37 s3c_irq_demux_timer(irq, IRQ_TIMER0);
38}
39
40static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
41{
42 s3c_irq_demux_timer(irq, IRQ_TIMER1);
43}
44
45static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
46{
47 s3c_irq_demux_timer(irq, IRQ_TIMER2);
48}
49
50static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
51{
52 s3c_irq_demux_timer(irq, IRQ_TIMER3);
53}
54
55static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
56{
57 s3c_irq_demux_timer(irq, IRQ_TIMER4);
58}
59
60/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
61
62static void s3c_irq_timer_mask(unsigned int irq)
63{
64 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
65
66 reg &= 0x1f; /* mask out pending interrupts */
67 reg &= ~(1 << (irq - IRQ_TIMER0));
68 __raw_writel(reg, S3C64XX_TINT_CSTAT);
69}
70
71static void s3c_irq_timer_unmask(unsigned int irq)
72{
73 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
74
75 reg &= 0x1f; /* mask out pending interrupts */
76 reg |= 1 << (irq - IRQ_TIMER0);
77 __raw_writel(reg, S3C64XX_TINT_CSTAT);
78}
79
80static void s3c_irq_timer_ack(unsigned int irq)
81{
82 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
83
84 reg &= 0x1f;
85 reg |= (1 << 5) << (irq - IRQ_TIMER0);
86 __raw_writel(reg, S3C64XX_TINT_CSTAT);
87}
88
89static struct irq_chip s3c_irq_timer = {
90 .name = "s3c-timer",
91 .mask = s3c_irq_timer_mask,
92 .unmask = s3c_irq_timer_unmask,
93 .ack = s3c_irq_timer_ack,
94};
95
96struct uart_irq {
97 void __iomem *regs;
98 unsigned int base_irq;
99 unsigned int parent_irq;
100};
101
102/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
103 * are consecutive when looking up the interrupt in the demux routines.
104 */
105static struct uart_irq uart_irqs[] = {
106 [0] = {
107 .regs = S3C_VA_UART0,
108 .base_irq = IRQ_S3CUART_BASE0,
109 .parent_irq = IRQ_UART0,
110 },
111 [1] = {
112 .regs = S3C_VA_UART1,
113 .base_irq = IRQ_S3CUART_BASE1,
114 .parent_irq = IRQ_UART1,
115 },
116 [2] = {
117 .regs = S3C_VA_UART2,
118 .base_irq = IRQ_S3CUART_BASE2,
119 .parent_irq = IRQ_UART2,
120 },
121 [3] = {
122 .regs = S3C_VA_UART3,
123 .base_irq = IRQ_S3CUART_BASE3,
124 .parent_irq = IRQ_UART3,
125 },
126};
127
128static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
129{
130 struct uart_irq *uirq = get_irq_chip_data(irq);
131 return uirq->regs;
132}
133
134static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
135{
136 return irq & 3;
137}
138
139/* UART interrupt registers, not worth adding to seperate include header */
140
141static void s3c_irq_uart_mask(unsigned int irq)
142{
143 void __iomem *regs = s3c_irq_uart_base(irq);
144 unsigned int bit = s3c_irq_uart_bit(irq);
145 u32 reg;
146
147 reg = __raw_readl(regs + S3C64XX_UINTM);
148 reg |= (1 << bit);
149 __raw_writel(reg, regs + S3C64XX_UINTM);
150}
151
152static void s3c_irq_uart_maskack(unsigned int irq)
153{
154 void __iomem *regs = s3c_irq_uart_base(irq);
155 unsigned int bit = s3c_irq_uart_bit(irq);
156 u32 reg;
157
158 reg = __raw_readl(regs + S3C64XX_UINTM);
159 reg |= (1 << bit);
160 __raw_writel(reg, regs + S3C64XX_UINTM);
161 __raw_writel(1 << bit, regs + S3C64XX_UINTP);
162}
163
164static void s3c_irq_uart_unmask(unsigned int irq)
165{
166 void __iomem *regs = s3c_irq_uart_base(irq);
167 unsigned int bit = s3c_irq_uart_bit(irq);
168 u32 reg;
169
170 reg = __raw_readl(regs + S3C64XX_UINTM);
171 reg &= ~(1 << bit);
172 __raw_writel(reg, regs + S3C64XX_UINTM);
173}
174
175static void s3c_irq_uart_ack(unsigned int irq)
176{
177 void __iomem *regs = s3c_irq_uart_base(irq);
178 unsigned int bit = s3c_irq_uart_bit(irq);
179
180 __raw_writel(1 << bit, regs + S3C64XX_UINTP);
181}
182
183static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
184{
185 struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
186 u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
187 int base = uirq->base_irq;
188
189 if (pend & (1 << 0))
190 generic_handle_irq(base);
191 if (pend & (1 << 1))
192 generic_handle_irq(base + 1);
193 if (pend & (1 << 2))
194 generic_handle_irq(base + 2);
195 if (pend & (1 << 3))
196 generic_handle_irq(base + 3);
197}
198
199static struct irq_chip s3c_irq_uart = {
200 .name = "s3c-uart",
201 .mask = s3c_irq_uart_mask,
202 .unmask = s3c_irq_uart_unmask,
203 .mask_ack = s3c_irq_uart_maskack,
204 .ack = s3c_irq_uart_ack,
205};
206
207static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
208{
209 void __iomem *reg_base = uirq->regs;
210 unsigned int irq;
211 int offs;
212
213 /* mask all interrupts at the start. */
214 __raw_writel(0xf, reg_base + S3C64XX_UINTM);
215
216 for (offs = 0; offs < 3; offs++) {
217 irq = uirq->base_irq + offs;
218
219 set_irq_chip(irq, &s3c_irq_uart);
220 set_irq_chip_data(irq, uirq);
221 set_irq_handler(irq, handle_level_irq);
222 set_irq_flags(irq, IRQF_VALID);
223 }
224
225 set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
226}
227
228void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
229{
230 int uart, irq;
231
232 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
233
234 /* initialise the pair of VICs */
235 vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid, 0);
236 vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid, 0);
237
238 /* add the timer sub-irqs */
239
240 set_irq_chained_handler(IRQ_TIMER0_VIC, s3c_irq_demux_timer0);
241 set_irq_chained_handler(IRQ_TIMER1_VIC, s3c_irq_demux_timer1);
242 set_irq_chained_handler(IRQ_TIMER2_VIC, s3c_irq_demux_timer2);
243 set_irq_chained_handler(IRQ_TIMER3_VIC, s3c_irq_demux_timer3);
244 set_irq_chained_handler(IRQ_TIMER4_VIC, s3c_irq_demux_timer4);
245
246 for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
247 set_irq_chip(irq, &s3c_irq_timer);
248 set_irq_handler(irq, handle_level_irq);
249 set_irq_flags(irq, IRQF_VALID);
250 }
251
252 for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
253 s3c64xx_uart_irq(&uart_irqs[uart]);
254}
255
256
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
deleted file mode 100644
index ffd56deb9e81..000000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ /dev/null
@@ -1,758 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 based common clock support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/list.h>
19#include <linux/errno.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/sysdev.h>
23#include <linux/io.h>
24
25#include <mach/hardware.h>
26#include <mach/map.h>
27
28#include <plat/cpu-freq.h>
29
30#include <plat/regs-clock.h>
31#include <plat/clock.h>
32#include <plat/cpu.h>
33#include <plat/pll.h>
34
35/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
36 * ext_xtal_mux for want of an actual name from the manual.
37*/
38
39static struct clk clk_ext_xtal_mux = {
40 .name = "ext_xtal",
41 .id = -1,
42};
43
44#define clk_fin_apll clk_ext_xtal_mux
45#define clk_fin_mpll clk_ext_xtal_mux
46#define clk_fin_epll clk_ext_xtal_mux
47
48#define clk_fout_mpll clk_mpll
49#define clk_fout_epll clk_epll
50
51struct clk_sources {
52 unsigned int nr_sources;
53 struct clk **sources;
54};
55
56struct clksrc_clk {
57 struct clk clk;
58 unsigned int mask;
59 unsigned int shift;
60
61 struct clk_sources *sources;
62
63 unsigned int divider_shift;
64 void __iomem *reg_divider;
65};
66
67static struct clk clk_fout_apll = {
68 .name = "fout_apll",
69 .id = -1,
70};
71
72static struct clk *clk_src_apll_list[] = {
73 [0] = &clk_fin_apll,
74 [1] = &clk_fout_apll,
75};
76
77static struct clk_sources clk_src_apll = {
78 .sources = clk_src_apll_list,
79 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
80};
81
82static struct clksrc_clk clk_mout_apll = {
83 .clk = {
84 .name = "mout_apll",
85 .id = -1,
86 },
87 .shift = S3C6400_CLKSRC_APLL_MOUT_SHIFT,
88 .mask = S3C6400_CLKSRC_APLL_MOUT,
89 .sources = &clk_src_apll,
90};
91
92static struct clk *clk_src_epll_list[] = {
93 [0] = &clk_fin_epll,
94 [1] = &clk_fout_epll,
95};
96
97static struct clk_sources clk_src_epll = {
98 .sources = clk_src_epll_list,
99 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
100};
101
102static struct clksrc_clk clk_mout_epll = {
103 .clk = {
104 .name = "mout_epll",
105 .id = -1,
106 },
107 .shift = S3C6400_CLKSRC_EPLL_MOUT_SHIFT,
108 .mask = S3C6400_CLKSRC_EPLL_MOUT,
109 .sources = &clk_src_epll,
110};
111
112static struct clk *clk_src_mpll_list[] = {
113 [0] = &clk_fin_mpll,
114 [1] = &clk_fout_mpll,
115};
116
117static struct clk_sources clk_src_mpll = {
118 .sources = clk_src_mpll_list,
119 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
120};
121
122static struct clksrc_clk clk_mout_mpll = {
123 .clk = {
124 .name = "mout_mpll",
125 .id = -1,
126 },
127 .shift = S3C6400_CLKSRC_MPLL_MOUT_SHIFT,
128 .mask = S3C6400_CLKSRC_MPLL_MOUT,
129 .sources = &clk_src_mpll,
130};
131
132static unsigned int armclk_mask;
133
134static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk)
135{
136 unsigned long rate = clk_get_rate(clk->parent);
137 u32 clkdiv;
138
139 /* divisor mask starts at bit0, so no need to shift */
140 clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask;
141
142 return rate / (clkdiv + 1);
143}
144
145static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
146 unsigned long rate)
147{
148 unsigned long parent = clk_get_rate(clk->parent);
149 u32 div;
150
151 if (parent < rate)
152 return parent;
153
154 div = (parent / rate) - 1;
155 if (div > armclk_mask)
156 div = armclk_mask;
157
158 return parent / (div + 1);
159}
160
161static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
162{
163 unsigned long parent = clk_get_rate(clk->parent);
164 u32 div;
165 u32 val;
166
167 if (rate < parent / (armclk_mask + 1))
168 return -EINVAL;
169
170 rate = clk_round_rate(clk, rate);
171 div = clk_get_rate(clk->parent) / rate;
172
173 val = __raw_readl(S3C_CLK_DIV0);
174 val &= ~armclk_mask;
175 val |= (div - 1);
176 __raw_writel(val, S3C_CLK_DIV0);
177
178 return 0;
179
180}
181
182static struct clk clk_arm = {
183 .name = "armclk",
184 .id = -1,
185 .parent = &clk_mout_apll.clk,
186 .get_rate = s3c64xx_clk_arm_get_rate,
187 .set_rate = s3c64xx_clk_arm_set_rate,
188 .round_rate = s3c64xx_clk_arm_round_rate,
189};
190
191static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
192{
193 unsigned long rate = clk_get_rate(clk->parent);
194
195 printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
196
197 if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
198 rate /= 2;
199
200 return rate;
201}
202
203static struct clk clk_dout_mpll = {
204 .name = "dout_mpll",
205 .id = -1,
206 .parent = &clk_mout_mpll.clk,
207 .get_rate = s3c64xx_clk_doutmpll_get_rate,
208};
209
210static struct clk *clkset_spi_mmc_list[] = {
211 &clk_mout_epll.clk,
212 &clk_dout_mpll,
213 &clk_fin_epll,
214 &clk_27m,
215};
216
217static struct clk_sources clkset_spi_mmc = {
218 .sources = clkset_spi_mmc_list,
219 .nr_sources = ARRAY_SIZE(clkset_spi_mmc_list),
220};
221
222static struct clk *clkset_irda_list[] = {
223 &clk_mout_epll.clk,
224 &clk_dout_mpll,
225 NULL,
226 &clk_27m,
227};
228
229static struct clk_sources clkset_irda = {
230 .sources = clkset_irda_list,
231 .nr_sources = ARRAY_SIZE(clkset_irda_list),
232};
233
234static struct clk *clkset_uart_list[] = {
235 &clk_mout_epll.clk,
236 &clk_dout_mpll,
237 NULL,
238 NULL
239};
240
241static struct clk_sources clkset_uart = {
242 .sources = clkset_uart_list,
243 .nr_sources = ARRAY_SIZE(clkset_uart_list),
244};
245
246static struct clk *clkset_uhost_list[] = {
247 &clk_48m,
248 &clk_mout_epll.clk,
249 &clk_dout_mpll,
250 &clk_fin_epll,
251};
252
253static struct clk_sources clkset_uhost = {
254 .sources = clkset_uhost_list,
255 .nr_sources = ARRAY_SIZE(clkset_uhost_list),
256};
257
258
259/* The peripheral clocks are all controlled via clocksource followed
260 * by an optional divider and gate stage. We currently roll this into
261 * one clock which hides the intermediate clock from the mux.
262 *
263 * Note, the JPEG clock can only be an even divider...
264 *
265 * The scaler and LCD clocks depend on the S3C64XX version, and also
266 * have a common parent divisor so are not included here.
267 */
268
269static inline struct clksrc_clk *to_clksrc(struct clk *clk)
270{
271 return container_of(clk, struct clksrc_clk, clk);
272}
273
274static unsigned long s3c64xx_getrate_clksrc(struct clk *clk)
275{
276 struct clksrc_clk *sclk = to_clksrc(clk);
277 unsigned long rate = clk_get_rate(clk->parent);
278 u32 clkdiv = __raw_readl(sclk->reg_divider);
279
280 clkdiv >>= sclk->divider_shift;
281 clkdiv &= 0xf;
282 clkdiv++;
283
284 rate /= clkdiv;
285 return rate;
286}
287
288static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
289{
290 struct clksrc_clk *sclk = to_clksrc(clk);
291 void __iomem *reg = sclk->reg_divider;
292 unsigned int div;
293 u32 val;
294
295 rate = clk_round_rate(clk, rate);
296 div = clk_get_rate(clk->parent) / rate;
297 if (div > 16)
298 return -EINVAL;
299
300 val = __raw_readl(reg);
301 val &= ~(0xf << sclk->divider_shift);
302 val |= (div - 1) << sclk->divider_shift;
303 __raw_writel(val, reg);
304
305 return 0;
306}
307
308static int s3c64xx_setparent_clksrc(struct clk *clk, struct clk *parent)
309{
310 struct clksrc_clk *sclk = to_clksrc(clk);
311 struct clk_sources *srcs = sclk->sources;
312 u32 clksrc = __raw_readl(S3C_CLK_SRC);
313 int src_nr = -1;
314 int ptr;
315
316 for (ptr = 0; ptr < srcs->nr_sources; ptr++)
317 if (srcs->sources[ptr] == parent) {
318 src_nr = ptr;
319 break;
320 }
321
322 if (src_nr >= 0) {
323 clksrc &= ~sclk->mask;
324 clksrc |= src_nr << sclk->shift;
325
326 __raw_writel(clksrc, S3C_CLK_SRC);
327
328 clk->parent = parent;
329 return 0;
330 }
331
332 return -EINVAL;
333}
334
335static unsigned long s3c64xx_roundrate_clksrc(struct clk *clk,
336 unsigned long rate)
337{
338 unsigned long parent_rate = clk_get_rate(clk->parent);
339 int div;
340
341 if (rate > parent_rate)
342 rate = parent_rate;
343 else {
344 div = parent_rate / rate;
345
346 if (div == 0)
347 div = 1;
348 if (div > 16)
349 div = 16;
350
351 rate = parent_rate / div;
352 }
353
354 return rate;
355}
356
357static struct clksrc_clk clk_mmc0 = {
358 .clk = {
359 .name = "mmc_bus",
360 .id = 0,
361 .ctrlbit = S3C_CLKCON_SCLK_MMC0,
362 .enable = s3c64xx_sclk_ctrl,
363 .set_parent = s3c64xx_setparent_clksrc,
364 .get_rate = s3c64xx_getrate_clksrc,
365 .set_rate = s3c64xx_setrate_clksrc,
366 .round_rate = s3c64xx_roundrate_clksrc,
367 },
368 .shift = S3C6400_CLKSRC_MMC0_SHIFT,
369 .mask = S3C6400_CLKSRC_MMC0_MASK,
370 .sources = &clkset_spi_mmc,
371 .divider_shift = S3C6400_CLKDIV1_MMC0_SHIFT,
372 .reg_divider = S3C_CLK_DIV1,
373};
374
375static struct clksrc_clk clk_mmc1 = {
376 .clk = {
377 .name = "mmc_bus",
378 .id = 1,
379 .ctrlbit = S3C_CLKCON_SCLK_MMC1,
380 .enable = s3c64xx_sclk_ctrl,
381 .get_rate = s3c64xx_getrate_clksrc,
382 .set_rate = s3c64xx_setrate_clksrc,
383 .set_parent = s3c64xx_setparent_clksrc,
384 .round_rate = s3c64xx_roundrate_clksrc,
385 },
386 .shift = S3C6400_CLKSRC_MMC1_SHIFT,
387 .mask = S3C6400_CLKSRC_MMC1_MASK,
388 .sources = &clkset_spi_mmc,
389 .divider_shift = S3C6400_CLKDIV1_MMC1_SHIFT,
390 .reg_divider = S3C_CLK_DIV1,
391};
392
393static struct clksrc_clk clk_mmc2 = {
394 .clk = {
395 .name = "mmc_bus",
396 .id = 2,
397 .ctrlbit = S3C_CLKCON_SCLK_MMC2,
398 .enable = s3c64xx_sclk_ctrl,
399 .get_rate = s3c64xx_getrate_clksrc,
400 .set_rate = s3c64xx_setrate_clksrc,
401 .set_parent = s3c64xx_setparent_clksrc,
402 .round_rate = s3c64xx_roundrate_clksrc,
403 },
404 .shift = S3C6400_CLKSRC_MMC2_SHIFT,
405 .mask = S3C6400_CLKSRC_MMC2_MASK,
406 .sources = &clkset_spi_mmc,
407 .divider_shift = S3C6400_CLKDIV1_MMC2_SHIFT,
408 .reg_divider = S3C_CLK_DIV1,
409};
410
411static struct clksrc_clk clk_usbhost = {
412 .clk = {
413 .name = "usb-bus-host",
414 .id = -1,
415 .ctrlbit = S3C_CLKCON_SCLK_UHOST,
416 .enable = s3c64xx_sclk_ctrl,
417 .set_parent = s3c64xx_setparent_clksrc,
418 .get_rate = s3c64xx_getrate_clksrc,
419 .set_rate = s3c64xx_setrate_clksrc,
420 .round_rate = s3c64xx_roundrate_clksrc,
421 },
422 .shift = S3C6400_CLKSRC_UHOST_SHIFT,
423 .mask = S3C6400_CLKSRC_UHOST_MASK,
424 .sources = &clkset_uhost,
425 .divider_shift = S3C6400_CLKDIV1_UHOST_SHIFT,
426 .reg_divider = S3C_CLK_DIV1,
427};
428
429static struct clksrc_clk clk_uart_uclk1 = {
430 .clk = {
431 .name = "uclk1",
432 .id = -1,
433 .ctrlbit = S3C_CLKCON_SCLK_UART,
434 .enable = s3c64xx_sclk_ctrl,
435 .set_parent = s3c64xx_setparent_clksrc,
436 .get_rate = s3c64xx_getrate_clksrc,
437 .set_rate = s3c64xx_setrate_clksrc,
438 .round_rate = s3c64xx_roundrate_clksrc,
439 },
440 .shift = S3C6400_CLKSRC_UART_SHIFT,
441 .mask = S3C6400_CLKSRC_UART_MASK,
442 .sources = &clkset_uart,
443 .divider_shift = S3C6400_CLKDIV2_UART_SHIFT,
444 .reg_divider = S3C_CLK_DIV2,
445};
446
447/* Where does UCLK0 come from? */
448
449static struct clksrc_clk clk_spi0 = {
450 .clk = {
451 .name = "spi-bus",
452 .id = 0,
453 .ctrlbit = S3C_CLKCON_SCLK_SPI0,
454 .enable = s3c64xx_sclk_ctrl,
455 .set_parent = s3c64xx_setparent_clksrc,
456 .get_rate = s3c64xx_getrate_clksrc,
457 .set_rate = s3c64xx_setrate_clksrc,
458 .round_rate = s3c64xx_roundrate_clksrc,
459 },
460 .shift = S3C6400_CLKSRC_SPI0_SHIFT,
461 .mask = S3C6400_CLKSRC_SPI0_MASK,
462 .sources = &clkset_spi_mmc,
463 .divider_shift = S3C6400_CLKDIV2_SPI0_SHIFT,
464 .reg_divider = S3C_CLK_DIV2,
465};
466
467static struct clksrc_clk clk_spi1 = {
468 .clk = {
469 .name = "spi-bus",
470 .id = 1,
471 .ctrlbit = S3C_CLKCON_SCLK_SPI1,
472 .enable = s3c64xx_sclk_ctrl,
473 .set_parent = s3c64xx_setparent_clksrc,
474 .get_rate = s3c64xx_getrate_clksrc,
475 .set_rate = s3c64xx_setrate_clksrc,
476 .round_rate = s3c64xx_roundrate_clksrc,
477 },
478 .shift = S3C6400_CLKSRC_SPI1_SHIFT,
479 .mask = S3C6400_CLKSRC_SPI1_MASK,
480 .sources = &clkset_spi_mmc,
481 .divider_shift = S3C6400_CLKDIV2_SPI1_SHIFT,
482 .reg_divider = S3C_CLK_DIV2,
483};
484
485static struct clk clk_iis_cd0 = {
486 .name = "iis_cdclk0",
487 .id = -1,
488};
489
490static struct clk clk_iis_cd1 = {
491 .name = "iis_cdclk1",
492 .id = -1,
493};
494
495static struct clk clk_pcm_cd = {
496 .name = "pcm_cdclk",
497 .id = -1,
498};
499
500static struct clk *clkset_audio0_list[] = {
501 [0] = &clk_mout_epll.clk,
502 [1] = &clk_dout_mpll,
503 [2] = &clk_fin_epll,
504 [3] = &clk_iis_cd0,
505 [4] = &clk_pcm_cd,
506};
507
508static struct clk_sources clkset_audio0 = {
509 .sources = clkset_audio0_list,
510 .nr_sources = ARRAY_SIZE(clkset_audio0_list),
511};
512
513static struct clksrc_clk clk_audio0 = {
514 .clk = {
515 .name = "audio-bus",
516 .id = 0,
517 .ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
518 .enable = s3c64xx_sclk_ctrl,
519 .set_parent = s3c64xx_setparent_clksrc,
520 .get_rate = s3c64xx_getrate_clksrc,
521 .set_rate = s3c64xx_setrate_clksrc,
522 .round_rate = s3c64xx_roundrate_clksrc,
523 },
524 .shift = S3C6400_CLKSRC_AUDIO0_SHIFT,
525 .mask = S3C6400_CLKSRC_AUDIO0_MASK,
526 .sources = &clkset_audio0,
527 .divider_shift = S3C6400_CLKDIV2_AUDIO0_SHIFT,
528 .reg_divider = S3C_CLK_DIV2,
529};
530
531static struct clk *clkset_audio1_list[] = {
532 [0] = &clk_mout_epll.clk,
533 [1] = &clk_dout_mpll,
534 [2] = &clk_fin_epll,
535 [3] = &clk_iis_cd1,
536 [4] = &clk_pcm_cd,
537};
538
539static struct clk_sources clkset_audio1 = {
540 .sources = clkset_audio1_list,
541 .nr_sources = ARRAY_SIZE(clkset_audio1_list),
542};
543
544static struct clksrc_clk clk_audio1 = {
545 .clk = {
546 .name = "audio-bus",
547 .id = 1,
548 .ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
549 .enable = s3c64xx_sclk_ctrl,
550 .set_parent = s3c64xx_setparent_clksrc,
551 .get_rate = s3c64xx_getrate_clksrc,
552 .set_rate = s3c64xx_setrate_clksrc,
553 .round_rate = s3c64xx_roundrate_clksrc,
554 },
555 .shift = S3C6400_CLKSRC_AUDIO1_SHIFT,
556 .mask = S3C6400_CLKSRC_AUDIO1_MASK,
557 .sources = &clkset_audio1,
558 .divider_shift = S3C6400_CLKDIV2_AUDIO1_SHIFT,
559 .reg_divider = S3C_CLK_DIV2,
560};
561
562static struct clksrc_clk clk_irda = {
563 .clk = {
564 .name = "irda-bus",
565 .id = 0,
566 .ctrlbit = S3C_CLKCON_SCLK_IRDA,
567 .enable = s3c64xx_sclk_ctrl,
568 .set_parent = s3c64xx_setparent_clksrc,
569 .get_rate = s3c64xx_getrate_clksrc,
570 .set_rate = s3c64xx_setrate_clksrc,
571 .round_rate = s3c64xx_roundrate_clksrc,
572 },
573 .shift = S3C6400_CLKSRC_IRDA_SHIFT,
574 .mask = S3C6400_CLKSRC_IRDA_MASK,
575 .sources = &clkset_irda,
576 .divider_shift = S3C6400_CLKDIV2_IRDA_SHIFT,
577 .reg_divider = S3C_CLK_DIV2,
578};
579
580static struct clk *clkset_camif_list[] = {
581 &clk_h2,
582};
583
584static struct clk_sources clkset_camif = {
585 .sources = clkset_camif_list,
586 .nr_sources = ARRAY_SIZE(clkset_camif_list),
587};
588
589static struct clksrc_clk clk_camif = {
590 .clk = {
591 .name = "camera",
592 .id = -1,
593 .ctrlbit = S3C_CLKCON_SCLK_CAM,
594 .enable = s3c64xx_sclk_ctrl,
595 .set_parent = s3c64xx_setparent_clksrc,
596 .get_rate = s3c64xx_getrate_clksrc,
597 .set_rate = s3c64xx_setrate_clksrc,
598 .round_rate = s3c64xx_roundrate_clksrc,
599 },
600 .shift = 0,
601 .mask = 0,
602 .sources = &clkset_camif,
603 .divider_shift = S3C6400_CLKDIV0_CAM_SHIFT,
604 .reg_divider = S3C_CLK_DIV0,
605};
606
607/* Clock initialisation code */
608
609static struct clksrc_clk *init_parents[] = {
610 &clk_mout_apll,
611 &clk_mout_epll,
612 &clk_mout_mpll,
613 &clk_mmc0,
614 &clk_mmc1,
615 &clk_mmc2,
616 &clk_usbhost,
617 &clk_uart_uclk1,
618 &clk_spi0,
619 &clk_spi1,
620 &clk_audio0,
621 &clk_audio1,
622 &clk_irda,
623 &clk_camif,
624};
625
626static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
627{
628 struct clk_sources *srcs = clk->sources;
629 u32 clksrc = __raw_readl(S3C_CLK_SRC);
630
631 clksrc &= clk->mask;
632 clksrc >>= clk->shift;
633
634 if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
635 printk(KERN_ERR "%s: bad source %d\n",
636 clk->clk.name, clksrc);
637 return;
638 }
639
640 clk->clk.parent = srcs->sources[clksrc];
641
642 printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
643 clk->clk.name, clk->clk.parent->name, clksrc,
644 clk_get_rate(&clk->clk));
645}
646
647#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
648
649void __init_or_cpufreq s3c6400_setup_clocks(void)
650{
651 struct clk *xtal_clk;
652 unsigned long xtal;
653 unsigned long fclk;
654 unsigned long hclk;
655 unsigned long hclk2;
656 unsigned long pclk;
657 unsigned long epll;
658 unsigned long apll;
659 unsigned long mpll;
660 unsigned int ptr;
661 u32 clkdiv0;
662
663 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
664
665 clkdiv0 = __raw_readl(S3C_CLK_DIV0);
666 printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
667
668 xtal_clk = clk_get(NULL, "xtal");
669 BUG_ON(IS_ERR(xtal_clk));
670
671 xtal = clk_get_rate(xtal_clk);
672 clk_put(xtal_clk);
673
674 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
675
676 /* For now assume the mux always selects the crystal */
677 clk_ext_xtal_mux.parent = xtal_clk;
678
679 epll = s3c6400_get_epll(xtal);
680 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
681 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
682
683 fclk = mpll;
684
685 printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
686 apll, mpll, epll);
687
688 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
689 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
690 pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
691
692 printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
693 hclk2, hclk, pclk);
694
695 clk_fout_mpll.rate = mpll;
696 clk_fout_epll.rate = epll;
697 clk_fout_apll.rate = apll;
698
699 clk_h2.rate = hclk2;
700 clk_h.rate = hclk;
701 clk_p.rate = pclk;
702 clk_f.rate = fclk;
703
704 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
705 s3c6400_set_clksrc(init_parents[ptr]);
706}
707
708static struct clk *clks[] __initdata = {
709 &clk_ext_xtal_mux,
710 &clk_iis_cd0,
711 &clk_iis_cd1,
712 &clk_pcm_cd,
713 &clk_mout_epll.clk,
714 &clk_mout_mpll.clk,
715 &clk_dout_mpll,
716 &clk_mmc0.clk,
717 &clk_mmc1.clk,
718 &clk_mmc2.clk,
719 &clk_usbhost.clk,
720 &clk_uart_uclk1.clk,
721 &clk_spi0.clk,
722 &clk_spi1.clk,
723 &clk_audio0.clk,
724 &clk_audio1.clk,
725 &clk_irda.clk,
726 &clk_camif.clk,
727 &clk_arm,
728};
729
730/**
731 * s3c6400_register_clocks - register clocks for s3c6400 and above
732 * @armclk_divlimit: Divisor mask for ARMCLK
733 *
734 * Register the clocks for the S3C6400 and above SoC range, such
735 * as ARMCLK and the clocks which have divider chains attached.
736 *
737 * This call does not setup the clocks, which is left to the
738 * s3c6400_setup_clocks() call which may be needed by the cpufreq
739 * or resume code to re-set the clocks if the bootloader has changed
740 * them.
741 */
742void __init s3c6400_register_clocks(unsigned armclk_divlimit)
743{
744 struct clk *clkp;
745 int ret;
746 int ptr;
747
748 armclk_mask = armclk_divlimit;
749
750 for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
751 clkp = clks[ptr];
752 ret = s3c24xx_register_clock(clkp);
753 if (ret < 0) {
754 printk(KERN_ERR "Failed to register clock %s (%d)\n",
755 clkp->name, ret);
756 }
757 }
758}
diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c
deleted file mode 100644
index 6c28f39df097..000000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-init.c
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - CPU initialisation (common with other S3C64XX chips)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/init.h>
18
19#include <plat/cpu.h>
20#include <plat/devs.h>
21#include <plat/s3c6400.h>
22#include <plat/s3c6410.h>
23
24/* uart registration process */
25
26void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
27{
28 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
29}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
new file mode 100644
index 000000000000..d400a6a20fe4
--- /dev/null
+++ b/arch/arm/plat-s5p/Kconfig
@@ -0,0 +1,25 @@
1# arch/arm/plat-s5p/Kconfig
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8config PLAT_S5P
9 bool
10 depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210)
11 default y
12 select ARM_VIC
13 select NO_IOPORT
14 select ARCH_REQUIRE_GPIOLIB
15 select S3C_GPIO_TRACK
16 select SAMSUNG_GPIOLIB_4BIT
17 select S3C_GPIO_CFG_S3C64XX
18 select S3C_GPIO_PULL_UPDOWN
19 select S3C_GPIO_CFG_S3C24XX
20 select PLAT_SAMSUNG
21 select SAMSUNG_CLKSRC
22 select SAMSUNG_IRQ_VIC_TIMER
23 select SAMSUNG_IRQ_UART
24 help
25 Base platform code for Samsung's S5P series SoC.
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
new file mode 100644
index 000000000000..a7c54b332d27
--- /dev/null
+++ b/arch/arm/plat-s5p/Makefile
@@ -0,0 +1,19 @@
1# arch/arm/plat-s5p/Makefile
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n := dummy.o
11obj- :=
12
13# Core files
14
15obj-y += dev-uart.o
16obj-y += cpu.o
17obj-y += clock.o
18obj-y += irq.o
19obj-y += setup-i2c0.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
new file mode 100644
index 000000000000..aa96e335073b
--- /dev/null
+++ b/arch/arm/plat-s5p/clock.c
@@ -0,0 +1,149 @@
1/* linux/arch/arm/plat-s5p/clock.c
2 *
3 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Common clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/sysdev.h>
21#include <linux/io.h>
22#include <asm/div64.h>
23
24#include <plat/clock.h>
25#include <plat/clock-clksrc.h>
26#include <plat/s5p-clock.h>
27
28/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
29 * clk_ext_xtal_mux.
30*/
31struct clk clk_ext_xtal_mux = {
32 .name = "ext_xtal",
33 .id = -1,
34};
35
36static struct clk s5p_clk_27m = {
37 .name = "clk_27m",
38 .id = -1,
39 .rate = 27000000,
40};
41
42/* 48MHz USB Phy clock output */
43struct clk clk_48m = {
44 .name = "clk_48m",
45 .id = -1,
46 .rate = 48000000,
47};
48
49/* APLL clock output
50 * No need .ctrlbit, this is always on
51*/
52struct clk clk_fout_apll = {
53 .name = "fout_apll",
54 .id = -1,
55};
56
57/* MPLL clock output
58 * No need .ctrlbit, this is always on
59*/
60struct clk clk_fout_mpll = {
61 .name = "fout_mpll",
62 .id = -1,
63};
64
65/* EPLL clock output */
66struct clk clk_fout_epll = {
67 .name = "fout_epll",
68 .id = -1,
69 .ctrlbit = (1 << 31),
70};
71
72/* ARM clock */
73struct clk clk_arm = {
74 .name = "armclk",
75 .id = -1,
76 .rate = 0,
77 .ctrlbit = 0,
78};
79
80/* Possible clock sources for APLL Mux */
81static struct clk *clk_src_apll_list[] = {
82 [0] = &clk_fin_apll,
83 [1] = &clk_fout_apll,
84};
85
86struct clksrc_sources clk_src_apll = {
87 .sources = clk_src_apll_list,
88 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
89};
90
91/* Possible clock sources for MPLL Mux */
92static struct clk *clk_src_mpll_list[] = {
93 [0] = &clk_fin_mpll,
94 [1] = &clk_fout_mpll,
95};
96
97struct clksrc_sources clk_src_mpll = {
98 .sources = clk_src_mpll_list,
99 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
100};
101
102/* Possible clock sources for EPLL Mux */
103static struct clk *clk_src_epll_list[] = {
104 [0] = &clk_fin_epll,
105 [1] = &clk_fout_epll,
106};
107
108struct clksrc_sources clk_src_epll = {
109 .sources = clk_src_epll_list,
110 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
111};
112
113struct clk clk_vpll = {
114 .name = "vpll",
115 .id = -1,
116};
117
118int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
119{
120 unsigned int ctrlbit = clk->ctrlbit;
121 u32 con;
122
123 con = __raw_readl(reg);
124 con = enable ? (con | ctrlbit) : (con & ~ctrlbit);
125 __raw_writel(con, reg);
126 return 0;
127}
128
129static struct clk *s5p_clks[] __initdata = {
130 &clk_ext_xtal_mux,
131 &clk_48m,
132 &s5p_clk_27m,
133 &clk_fout_apll,
134 &clk_fout_mpll,
135 &clk_fout_epll,
136 &clk_arm,
137 &clk_vpll,
138};
139
140void __init s5p_register_clocks(unsigned long xtal_freq)
141{
142 int ret;
143
144 clk_ext_xtal_mux.rate = xtal_freq;
145
146 ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks));
147 if (ret > 0)
148 printk(KERN_ERR "Failed to register s5p clocks\n");
149}
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
new file mode 100644
index 000000000000..f92e5de3a755
--- /dev/null
+++ b/arch/arm/plat-s5p/cpu.c
@@ -0,0 +1,113 @@
1/* linux/arch/arm/plat-s5p/cpu.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P CPU Support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <mach/map.h>
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <mach/regs-clock.h>
19#include <plat/cpu.h>
20#include <plat/s5p6440.h>
21#include <plat/s5p6442.h>
22#include <plat/s5pv210.h>
23
24/* table of supported CPUs */
25
26static const char name_s5p6440[] = "S5P6440";
27static const char name_s5p6442[] = "S5P6442";
28static const char name_s5pv210[] = "S5PV210/S5PC110";
29
30static struct cpu_table cpu_ids[] __initdata = {
31 {
32 .idcode = 0x56440100,
33 .idmask = 0xffffff00,
34 .map_io = s5p6440_map_io,
35 .init_clocks = s5p6440_init_clocks,
36 .init_uarts = s5p6440_init_uarts,
37 .init = s5p6440_init,
38 .name = name_s5p6440,
39 }, {
40 .idcode = 0x36442000,
41 .idmask = 0xffffff00,
42 .map_io = s5p6442_map_io,
43 .init_clocks = s5p6442_init_clocks,
44 .init_uarts = s5p6442_init_uarts,
45 .init = s5p6442_init,
46 .name = name_s5p6442,
47 }, {
48 .idcode = 0x43110000,
49 .idmask = 0xfffff000,
50 .map_io = s5pv210_map_io,
51 .init_clocks = s5pv210_init_clocks,
52 .init_uarts = s5pv210_init_uarts,
53 .init = s5pv210_init,
54 .name = name_s5pv210,
55 },
56};
57
58/* minimal IO mapping */
59
60static struct map_desc s5p_iodesc[] __initdata = {
61 {
62 .virtual = (unsigned long)S5P_VA_CHIPID,
63 .pfn = __phys_to_pfn(S5P_PA_CHIPID),
64 .length = SZ_4K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = (unsigned long)S3C_VA_SYS,
68 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
69 .length = SZ_64K,
70 .type = MT_DEVICE,
71 }, {
72 .virtual = (unsigned long)S3C_VA_UART,
73 .pfn = __phys_to_pfn(S3C_PA_UART),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = (unsigned long)VA_VIC0,
78 .pfn = __phys_to_pfn(S5P_PA_VIC0),
79 .length = SZ_16K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)VA_VIC1,
83 .pfn = __phys_to_pfn(S5P_PA_VIC1),
84 .length = SZ_16K,
85 .type = MT_DEVICE,
86 }, {
87 .virtual = (unsigned long)S3C_VA_TIMER,
88 .pfn = __phys_to_pfn(S5P_PA_TIMER),
89 .length = SZ_16K,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (unsigned long)S5P_VA_GPIO,
93 .pfn = __phys_to_pfn(S5P_PA_GPIO),
94 .length = SZ_4K,
95 .type = MT_DEVICE,
96 },
97};
98
99/* read cpu identification code */
100
101void __init s5p_init_io(struct map_desc *mach_desc,
102 int size, void __iomem *cpuid_addr)
103{
104 unsigned long idcode;
105
106 /* initialize the io descriptors we need for initialization */
107 iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
108 if (mach_desc)
109 iotable_init(mach_desc, size);
110
111 idcode = __raw_readl(cpuid_addr);
112 s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
113}
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
new file mode 100644
index 000000000000..a89331ef4ae1
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -0,0 +1,139 @@
1/* linux/arch/arm/plat-s5p/dev-uart.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Base S5P UART resource and device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/platform_device.h>
18
19#include <asm/mach/arch.h>
20#include <asm/mach/irq.h>
21#include <mach/hardware.h>
22#include <mach/map.h>
23
24#include <plat/devs.h>
25
26 /* Serial port registrations */
27
28static struct resource s5p_uart0_resource[] = {
29 [0] = {
30 .start = S5P_PA_UART0,
31 .end = S5P_PA_UART0 + S5P_SZ_UART,
32 .flags = IORESOURCE_MEM,
33 },
34 [1] = {
35 .start = IRQ_S5P_UART_RX0,
36 .end = IRQ_S5P_UART_RX0,
37 .flags = IORESOURCE_IRQ,
38 },
39 [2] = {
40 .start = IRQ_S5P_UART_TX0,
41 .end = IRQ_S5P_UART_TX0,
42 .flags = IORESOURCE_IRQ,
43 },
44 [3] = {
45 .start = IRQ_S5P_UART_ERR0,
46 .end = IRQ_S5P_UART_ERR0,
47 .flags = IORESOURCE_IRQ,
48 }
49};
50
51static struct resource s5p_uart1_resource[] = {
52 [0] = {
53 .start = S5P_PA_UART1,
54 .end = S5P_PA_UART1 + S5P_SZ_UART,
55 .flags = IORESOURCE_MEM,
56 },
57 [1] = {
58 .start = IRQ_S5P_UART_RX1,
59 .end = IRQ_S5P_UART_RX1,
60 .flags = IORESOURCE_IRQ,
61 },
62 [2] = {
63 .start = IRQ_S5P_UART_TX1,
64 .end = IRQ_S5P_UART_TX1,
65 .flags = IORESOURCE_IRQ,
66 },
67 [3] = {
68 .start = IRQ_S5P_UART_ERR1,
69 .end = IRQ_S5P_UART_ERR1,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct resource s5p_uart2_resource[] = {
75 [0] = {
76 .start = S5P_PA_UART2,
77 .end = S5P_PA_UART2 + S5P_SZ_UART,
78 .flags = IORESOURCE_MEM,
79 },
80 [1] = {
81 .start = IRQ_S5P_UART_RX2,
82 .end = IRQ_S5P_UART_RX2,
83 .flags = IORESOURCE_IRQ,
84 },
85 [2] = {
86 .start = IRQ_S5P_UART_TX2,
87 .end = IRQ_S5P_UART_TX2,
88 .flags = IORESOURCE_IRQ,
89 },
90 [3] = {
91 .start = IRQ_S5P_UART_ERR2,
92 .end = IRQ_S5P_UART_ERR2,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct resource s5p_uart3_resource[] = {
98#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
99 [0] = {
100 .start = S5P_PA_UART3,
101 .end = S5P_PA_UART3 + S5P_SZ_UART,
102 .flags = IORESOURCE_MEM,
103 },
104 [1] = {
105 .start = IRQ_S5P_UART_RX3,
106 .end = IRQ_S5P_UART_RX3,
107 .flags = IORESOURCE_IRQ,
108 },
109 [2] = {
110 .start = IRQ_S5P_UART_TX3,
111 .end = IRQ_S5P_UART_TX3,
112 .flags = IORESOURCE_IRQ,
113 },
114 [3] = {
115 .start = IRQ_S5P_UART_ERR3,
116 .end = IRQ_S5P_UART_ERR3,
117 .flags = IORESOURCE_IRQ,
118 },
119#endif
120};
121
122struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
123 [0] = {
124 .resources = s5p_uart0_resource,
125 .nr_resources = ARRAY_SIZE(s5p_uart0_resource),
126 },
127 [1] = {
128 .resources = s5p_uart1_resource,
129 .nr_resources = ARRAY_SIZE(s5p_uart1_resource),
130 },
131 [2] = {
132 .resources = s5p_uart2_resource,
133 .nr_resources = ARRAY_SIZE(s5p_uart2_resource),
134 },
135 [3] = {
136 .resources = s5p_uart3_resource,
137 .nr_resources = ARRAY_SIZE(s5p_uart3_resource),
138 },
139};
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
new file mode 100644
index 000000000000..42e757f2e40c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -0,0 +1,90 @@
1/* linux/arch/arm/plat-s5p/include/plat/irqs.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P Common IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_IRQS_H
14#define __ASM_PLAT_S5P_IRQS_H __FILE__
15
16/* we keep the first set of CPU IRQs out of the range of
17 * the ISA space, so that the PC104 has them to itself
18 * and we don't end up having to do horrible things to the
19 * standard ISA drivers....
20 *
21 * note, since we're using the VICs, our start must be a
22 * mulitple of 32 to allow the common code to work
23 */
24
25#define S5P_IRQ_OFFSET (32)
26
27#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
28
29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32)
31#define S5P_VIC2_BASE S5P_IRQ(64)
32#define S5P_VIC3_BASE S5P_IRQ(96)
33
34#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
35
36#define IRQ_VIC0_BASE S5P_VIC0_BASE
37#define IRQ_VIC1_BASE S5P_VIC1_BASE
38#define IRQ_VIC2_BASE S5P_VIC2_BASE
39
40/* UART interrupts, each UART has 4 intterupts per channel so
41 * use the space between the ISA and S3C main interrupts. Note, these
42 * are not in the same order as the S3C24XX series! */
43
44#define IRQ_S5P_UART_BASE0 (16)
45#define IRQ_S5P_UART_BASE1 (20)
46#define IRQ_S5P_UART_BASE2 (24)
47#define IRQ_S5P_UART_BASE3 (28)
48
49#define UART_IRQ_RXD (0)
50#define UART_IRQ_ERR (1)
51#define UART_IRQ_TXD (2)
52
53#define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
54#define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
55#define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)
56
57#define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
58#define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
59#define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)
60
61#define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
62#define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
63#define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)
64
65#define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
66#define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
67#define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)
68
69/* S3C compatibilty defines */
70#define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0
71#define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1
72#define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2
73#define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3
74
75/* VIC based IRQs */
76
77#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
78#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
81
82#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x))
83
84#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
85#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
86#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
87#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
88#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
89
90#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
new file mode 100644
index 000000000000..14828521f70c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -0,0 +1,34 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S5P_H
14#define __ASM_PLAT_MAP_S5P_H __FILE__
15
16#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
17#define S5P_VA_GPIO S3C_ADDR(0x00500000)
18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
19#define S5P_VA_SROMC S3C_ADDR(0x01100000)
20
21#define S5P_VA_UART0 (S3C_VA_UART + 0x0)
22#define S5P_VA_UART1 (S3C_VA_UART + 0x400)
23#define S5P_VA_UART2 (S3C_VA_UART + 0x800)
24#define S5P_VA_UART3 (S3C_VA_UART + 0xC00)
25
26#define S3C_UART_OFFSET (0x400)
27
28#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
29#define VA_VIC0 VA_VIC(0)
30#define VA_VIC1 VA_VIC(1)
31#define VA_VIC2 VA_VIC(2)
32#define VA_VIC3 VA_VIC(3)
33
34#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
new file mode 100644
index 000000000000..d48325bb29e2
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -0,0 +1,83 @@
1/* arch/arm/plat-s5p/include/plat/pll.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P PLL code
7 *
8 * Based on arch/arm/plat-s3c64xx/include/plat/pll.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#define PLL45XX_MDIV_MASK (0x3FF)
16#define PLL45XX_PDIV_MASK (0x3F)
17#define PLL45XX_SDIV_MASK (0x7)
18#define PLL45XX_MDIV_SHIFT (16)
19#define PLL45XX_PDIV_SHIFT (8)
20#define PLL45XX_SDIV_SHIFT (0)
21
22#include <asm/div64.h>
23
24enum pll45xx_type_t {
25 pll_4500,
26 pll_4502,
27 pll_4508
28};
29
30static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
31 enum pll45xx_type_t pll_type)
32{
33 u32 mdiv, pdiv, sdiv;
34 u64 fvco = baseclk;
35
36 mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
37 pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
38 sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
39
40 if (pll_type == pll_4508)
41 sdiv = sdiv - 1;
42
43 fvco *= mdiv;
44 do_div(fvco, (pdiv << sdiv));
45
46 return (unsigned long)fvco;
47}
48
49#define PLL90XX_MDIV_MASK (0xFF)
50#define PLL90XX_PDIV_MASK (0x3F)
51#define PLL90XX_SDIV_MASK (0x7)
52#define PLL90XX_KDIV_MASK (0xffff)
53#define PLL90XX_MDIV_SHIFT (16)
54#define PLL90XX_PDIV_SHIFT (8)
55#define PLL90XX_SDIV_SHIFT (0)
56#define PLL90XX_KDIV_SHIFT (0)
57
58static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
59 u32 pll_con, u32 pll_conk)
60{
61 unsigned long result;
62 u32 mdiv, pdiv, sdiv, kdiv;
63 u64 tmp;
64
65 mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
66 pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
67 sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
68 kdiv = pll_conk & PLL90XX_KDIV_MASK;
69
70 /* We need to multiple baseclk by mdiv (the integer part) and kdiv
71 * which is in 2^16ths, so shift mdiv up (does not overflow) and
72 * add kdiv before multiplying. The use of tmp is to avoid any
73 * overflows before shifting bac down into result when multipling
74 * by the mdiv and kdiv pair.
75 */
76
77 tmp = baseclk;
78 tmp *= (mdiv << 16) + kdiv;
79 do_div(tmp, (pdiv << sdiv));
80 result = tmp >> 16;
81
82 return result;
83}
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
new file mode 100644
index 000000000000..56fb8b414d41
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -0,0 +1,40 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
2 *
3 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_CLOCK_H
14#define __ASM_PLAT_S5P_CLOCK_H __FILE__
15
16#include <linux/clk.h>
17
18#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
19
20#define clk_fin_apll clk_ext_xtal_mux
21#define clk_fin_mpll clk_ext_xtal_mux
22#define clk_fin_epll clk_ext_xtal_mux
23#define clk_fin_vpll clk_ext_xtal_mux
24
25extern struct clk clk_ext_xtal_mux;
26extern struct clk clk_48m;
27extern struct clk clk_fout_apll;
28extern struct clk clk_fout_mpll;
29extern struct clk clk_fout_epll;
30extern struct clk clk_arm;
31extern struct clk clk_vpll;
32
33extern struct clksrc_sources clk_src_apll;
34extern struct clksrc_sources clk_src_mpll;
35extern struct clksrc_sources clk_src_epll;
36
37extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable);
38extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
39
40#endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
new file mode 100644
index 000000000000..a4cd75afeb3b
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6440.h
@@ -0,0 +1,37 @@
1/* arch/arm/plat-s5p/include/plat/s5p6440.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 /* Common init code for S5P6440 related SoCs */
14
15extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5p6440_register_clocks(void);
17extern void s5p6440_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5P6440
20
21extern int s5p6440_init(void);
22extern void s5p6440_init_irq(void);
23extern void s5p6440_map_io(void);
24extern void s5p6440_init_clocks(int xtal);
25
26#define s5p6440_init_uarts s5p6440_common_init_uarts
27
28#else
29#define s5p6440_init_clocks NULL
30#define s5p6440_init_uarts NULL
31#define s5p6440_map_io NULL
32#define s5p6440_init NULL
33#endif
34
35/* S5P6440 timer */
36
37extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
new file mode 100644
index 000000000000..7b8801349c94
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6442.h
@@ -0,0 +1,33 @@
1/* arch/arm/plat-s5p/include/plat/s5p6442.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5P6442 related SoCs */
14
15extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5p6442_register_clocks(void);
17extern void s5p6442_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5P6442
20
21extern int s5p6442_init(void);
22extern void s5p6442_init_irq(void);
23extern void s5p6442_map_io(void);
24extern void s5p6442_init_clocks(int xtal);
25
26#define s5p6442_init_uarts s5p6442_common_init_uarts
27
28#else
29#define s5p6442_init_clocks NULL
30#define s5p6442_init_uarts NULL
31#define s5p6442_map_io NULL
32#define s5p6442_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h
new file mode 100644
index 000000000000..6c93a0c78100
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv210.h
@@ -0,0 +1,33 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv210 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV210 related SoCs */
14
15extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv210_register_clocks(void);
17extern void s5pv210_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV210
20
21extern int s5pv210_init(void);
22extern void s5pv210_init_irq(void);
23extern void s5pv210_map_io(void);
24extern void s5pv210_init_clocks(int xtal);
25
26#define s5pv210_init_uarts s5pv210_common_init_uarts
27
28#else
29#define s5pv210_init_clocks NULL
30#define s5pv210_init_uarts NULL
31#define s5pv210_map_io NULL
32#define s5pv210_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
new file mode 100644
index 000000000000..25e1eb6de59e
--- /dev/null
+++ b/arch/arm/plat-s5p/irq.c
@@ -0,0 +1,72 @@
1/* arch/arm/plat-s5p/irq.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Interrupt handling
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17
18#include <asm/hardware/vic.h>
19
20#include <linux/serial_core.h>
21#include <mach/map.h>
22#include <plat/regs-timer.h>
23#include <plat/regs-serial.h>
24#include <plat/cpu.h>
25#include <plat/irq-vic-timer.h>
26#include <plat/irq-uart.h>
27
28/*
29 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
30 * are consecutive when looking up the interrupt in the demux routines.
31 */
32static struct s3c_uart_irq uart_irqs[] = {
33 [0] = {
34 .regs = S5P_VA_UART0,
35 .base_irq = IRQ_S5P_UART_BASE0,
36 .parent_irq = IRQ_UART0,
37 },
38 [1] = {
39 .regs = S5P_VA_UART1,
40 .base_irq = IRQ_S5P_UART_BASE1,
41 .parent_irq = IRQ_UART1,
42 },
43 [2] = {
44 .regs = S5P_VA_UART2,
45 .base_irq = IRQ_S5P_UART_BASE2,
46 .parent_irq = IRQ_UART2,
47 },
48#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
49 [3] = {
50 .regs = S5P_VA_UART3,
51 .base_irq = IRQ_S5P_UART_BASE3,
52 .parent_irq = IRQ_UART3,
53 },
54#endif
55};
56
57void __init s5p_init_irq(u32 *vic, u32 num_vic)
58{
59 int irq;
60
61 /* initialize the VICs */
62 for (irq = 0; irq < num_vic; irq++)
63 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
64
65 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
66 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
67 s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
68 s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
69 s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
70
71 s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
72}
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/plat-s5p/setup-i2c0.c
new file mode 100644
index 000000000000..67a66e02a97a
--- /dev/null
+++ b/arch/arm/plat-s5p/setup-i2c0.c
@@ -0,0 +1,25 @@
1/* linux/arch/arm/plat-s5p/setup-i2c0.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C0 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c0.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <plat/iic.h>
21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{
24 /* Will be populated later */
25}
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index b7b9e91c0243..c7ccdf22eefa 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -11,6 +11,9 @@ config PLAT_S5PC1XX
11 select ARM_VIC 11 select ARM_VIC
12 select NO_IOPORT 12 select NO_IOPORT
13 select ARCH_REQUIRE_GPIOLIB 13 select ARCH_REQUIRE_GPIOLIB
14 select SAMSUNG_CLKSRC
15 select SAMSUNG_IRQ_UART
16 select SAMSUNG_IRQ_VIC_TIMER
14 select S3C_GPIO_TRACK 17 select S3C_GPIO_TRACK
15 select S3C_GPIO_PULL_UPDOWN 18 select S3C_GPIO_PULL_UPDOWN
16 select S3C_GPIO_CFG_S3C24XX 19 select S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c
index 26c21d849790..387f23190c3c 100644
--- a/arch/arm/plat-s5pc1xx/clock.c
+++ b/arch/arm/plat-s5pc1xx/clock.c
@@ -64,25 +64,13 @@ struct clk clk_54m = {
64 .rate = 54000000, 64 .rate = 54000000,
65}; 65};
66 66
67static int clk_default_setrate(struct clk *clk, unsigned long rate)
68{
69 clk->rate = rate;
70 return 0;
71}
72
73static int clk_dummy_enable(struct clk *clk, int enable)
74{
75 return 0;
76}
77
78struct clk clk_hd0 = { 67struct clk clk_hd0 = {
79 .name = "hclkd0", 68 .name = "hclkd0",
80 .id = -1, 69 .id = -1,
81 .rate = 0, 70 .rate = 0,
82 .parent = NULL, 71 .parent = NULL,
83 .ctrlbit = 0, 72 .ctrlbit = 0,
84 .set_rate = clk_default_setrate, 73 .ops = &clk_ops_def_setrate,
85 .enable = clk_dummy_enable,
86}; 74};
87 75
88struct clk clk_pd0 = { 76struct clk clk_pd0 = {
@@ -91,8 +79,7 @@ struct clk clk_pd0 = {
91 .rate = 0, 79 .rate = 0,
92 .parent = NULL, 80 .parent = NULL,
93 .ctrlbit = 0, 81 .ctrlbit = 0,
94 .set_rate = clk_default_setrate, 82 .ops = &clk_ops_def_setrate,
95 .enable = clk_dummy_enable,
96}; 83};
97 84
98static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable) 85static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable)
@@ -686,6 +673,8 @@ static struct clk s5pc100_init_clocks[] = {
686static struct clk *clks[] __initdata = { 673static struct clk *clks[] __initdata = {
687 &clk_ext, 674 &clk_ext,
688 &clk_epll, 675 &clk_epll,
676 &clk_pd0,
677 &clk_hd0,
689 &clk_27m, 678 &clk_27m,
690 &clk_48m, 679 &clk_48m,
691 &clk_54m, 680 &clk_54m,
@@ -700,16 +689,8 @@ void __init s5pc1xx_register_clocks(void)
700 689
701 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); 690 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
702 691
703 clkp = s5pc100_init_clocks; 692 s3c_register_clocks(s5pc100_init_clocks,
704 size = ARRAY_SIZE(s5pc100_init_clocks); 693 ARRAY_SIZE(s5pc100_init_clocks));
705
706 for (ptr = 0; ptr < size; ptr++, clkp++) {
707 ret = s3c24xx_register_clock(clkp);
708 if (ret < 0) {
709 printk(KERN_ERR "Failed to register clock %s (%d)\n",
710 clkp->name, ret);
711 }
712 }
713 694
714 clkp = s5pc100_init_clocks_disable; 695 clkp = s5pc100_init_clocks_disable;
715 size = ARRAY_SIZE(s5pc100_init_clocks_disable); 696 size = ARRAY_SIZE(s5pc100_init_clocks_disable);
diff --git a/arch/arm/plat-s5pc1xx/dev-uart.c b/arch/arm/plat-s5pc1xx/dev-uart.c
index f749bc5407b5..586c95c60bfe 100644
--- a/arch/arm/plat-s5pc1xx/dev-uart.c
+++ b/arch/arm/plat-s5pc1xx/dev-uart.c
@@ -143,32 +143,3 @@ struct s3c24xx_uart_resources s5pc1xx_uart_resources[] __initdata = {
143 .nr_resources = ARRAY_SIZE(s5pc1xx_uart3_resource), 143 .nr_resources = ARRAY_SIZE(s5pc1xx_uart3_resource),
144 }, 144 },
145}; 145};
146
147/* uart devices */
148
149static struct platform_device s3c24xx_uart_device0 = {
150 .id = 0,
151};
152
153static struct platform_device s3c24xx_uart_device1 = {
154 .id = 1,
155};
156
157static struct platform_device s3c24xx_uart_device2 = {
158 .id = 2,
159};
160
161static struct platform_device s3c24xx_uart_device3 = {
162 .id = 3,
163};
164
165struct platform_device *s3c24xx_uart_src[4] = {
166 &s3c24xx_uart_device0,
167 &s3c24xx_uart_device1,
168 &s3c24xx_uart_device2,
169 &s3c24xx_uart_device3,
170};
171
172struct platform_device *s3c24xx_uart_devs[4] = {
173};
174
diff --git a/arch/arm/plat-s5pc1xx/gpio-config.c b/arch/arm/plat-s5pc1xx/gpio-config.c
index bba675df9c75..a4f67e80a150 100644
--- a/arch/arm/plat-s5pc1xx/gpio-config.c
+++ b/arch/arm/plat-s5pc1xx/gpio-config.c
@@ -16,7 +16,7 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <mach/gpio-core.h> 19#include <plat/gpio-core.h>
20#include <plat/gpio-cfg-s5pc1xx.h> 20#include <plat/gpio-cfg-s5pc1xx.h>
21 21
22s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off) 22s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off)
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/plat-s5pc1xx/gpiolib.c
index facb410e7a71..1ffc57ac293d 100644
--- a/arch/arm/plat-s5pc1xx/gpiolib.c
+++ b/arch/arm/plat-s5pc1xx/gpiolib.c
@@ -17,8 +17,8 @@
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18 18
19#include <mach/map.h> 19#include <mach/map.h>
20#include <mach/gpio-core.h>
21 20
21#include <plat/gpio-core.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23#include <plat/gpio-cfg-helpers.h> 23#include <plat/gpio-cfg-helpers.h>
24#include <plat/regs-gpio.h> 24#include <plat/regs-gpio.h>
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
index ef8736366f0d..409c804315e8 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h
+++ b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
@@ -88,11 +88,11 @@
88#define IRQ_MDMA S5PC1XX_IRQ_VIC0(18) 88#define IRQ_MDMA S5PC1XX_IRQ_VIC0(18)
89#define IRQ_PDMA0 S5PC1XX_IRQ_VIC0(19) 89#define IRQ_PDMA0 S5PC1XX_IRQ_VIC0(19)
90#define IRQ_PDMA1 S5PC1XX_IRQ_VIC0(20) 90#define IRQ_PDMA1 S5PC1XX_IRQ_VIC0(20)
91#define IRQ_TIMER0 S5PC1XX_IRQ_VIC0(21) 91#define IRQ_TIMER0_VIC S5PC1XX_IRQ_VIC0(21)
92#define IRQ_TIMER1 S5PC1XX_IRQ_VIC0(22) 92#define IRQ_TIMER1_VIC S5PC1XX_IRQ_VIC0(22)
93#define IRQ_TIMER2 S5PC1XX_IRQ_VIC0(23) 93#define IRQ_TIMER2_VIC S5PC1XX_IRQ_VIC0(23)
94#define IRQ_TIMER3 S5PC1XX_IRQ_VIC0(24) 94#define IRQ_TIMER3_VIC S5PC1XX_IRQ_VIC0(24)
95#define IRQ_TIMER4 S5PC1XX_IRQ_VIC0(25) 95#define IRQ_TIMER4_VIC S5PC1XX_IRQ_VIC0(25)
96#define IRQ_SYSTIMER S5PC1XX_IRQ_VIC0(26) 96#define IRQ_SYSTIMER S5PC1XX_IRQ_VIC0(26)
97#define IRQ_WDT S5PC1XX_IRQ_VIC0(27) 97#define IRQ_WDT S5PC1XX_IRQ_VIC0(27)
98#define IRQ_RTC_ALARM S5PC1XX_IRQ_VIC0(28) 98#define IRQ_RTC_ALARM S5PC1XX_IRQ_VIC0(28)
@@ -171,8 +171,15 @@
171#define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) 171#define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30)
172#define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) 172#define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31)
173 173
174#define IRQ_TIMER(x) (IRQ_SDMFIQ + 1 + (x))
175#define IRQ_TIMER0 IRQ_TIMER(0)
176#define IRQ_TIMER1 IRQ_TIMER(1)
177#define IRQ_TIMER2 IRQ_TIMER(2)
178#define IRQ_TIMER3 IRQ_TIMER(3)
179#define IRQ_TIMER4 IRQ_TIMER(4)
180
174/* External interrupt */ 181/* External interrupt */
175#define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 1) 182#define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 6)
176 183
177#define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16)) 184#define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16))
178#define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x)) 185#define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x))
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
index c5cc86e92d65..24dec4e52538 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
@@ -61,73 +61,10 @@
61#define S5PC100_EPLL_MASK 0xffffffff 61#define S5PC100_EPLL_MASK 0xffffffff
62#define S5PC100_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) 62#define S5PC100_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s)))
63 63
64/* CLKSRC0 */ 64/* CLKSRC0..CLKSRC3 -> mostly removed due to clksrc updates */
65#define S5PC100_CLKSRC0_APLL_MASK (0x1<<0) 65#define S5PC100_CLKSRC1_CLK48M_MASK (0x1<<24)
66#define S5PC100_CLKSRC0_APLL_SHIFT (0)
67#define S5PC100_CLKSRC0_MPLL_MASK (0x1<<4)
68#define S5PC100_CLKSRC0_MPLL_SHIFT (4)
69#define S5PC100_CLKSRC0_EPLL_MASK (0x1<<8)
70#define S5PC100_CLKSRC0_EPLL_SHIFT (8)
71#define S5PC100_CLKSRC0_HPLL_MASK (0x1<<12)
72#define S5PC100_CLKSRC0_HPLL_SHIFT (12)
73#define S5PC100_CLKSRC0_AMMUX_MASK (0x1<<16)
74#define S5PC100_CLKSRC0_AMMUX_SHIFT (16)
75#define S5PC100_CLKSRC0_HREF_MASK (0x1<<20)
76#define S5PC100_CLKSRC0_HREF_SHIFT (20)
77#define S5PC100_CLKSRC0_ONENAND_MASK (0x1<<24)
78#define S5PC100_CLKSRC0_ONENAND_SHIFT (24)
79
80
81/* CLKSRC1 */
82#define S5PC100_CLKSRC1_UART_MASK (0x1<<0)
83#define S5PC100_CLKSRC1_UART_SHIFT (0)
84#define S5PC100_CLKSRC1_SPI0_MASK (0x3<<4)
85#define S5PC100_CLKSRC1_SPI0_SHIFT (4)
86#define S5PC100_CLKSRC1_SPI1_MASK (0x3<<8)
87#define S5PC100_CLKSRC1_SPI1_SHIFT (8)
88#define S5PC100_CLKSRC1_SPI2_MASK (0x3<<12)
89#define S5PC100_CLKSRC1_SPI2_SHIFT (12)
90#define S5PC100_CLKSRC1_IRDA_MASK (0x3<<16)
91#define S5PC100_CLKSRC1_IRDA_SHIFT (16)
92#define S5PC100_CLKSRC1_UHOST_MASK (0x3<<20)
93#define S5PC100_CLKSRC1_UHOST_SHIFT (20)
94#define S5PC100_CLKSRC1_CLK48M_MASK (0x1<<24)
95#define S5PC100_CLKSRC1_CLK48M_SHIFT (24) 66#define S5PC100_CLKSRC1_CLK48M_SHIFT (24)
96 67
97/* CLKSRC2 */
98#define S5PC100_CLKSRC2_MMC0_MASK (0x3<<0)
99#define S5PC100_CLKSRC2_MMC0_SHIFT (0)
100#define S5PC100_CLKSRC2_MMC1_MASK (0x3<<4)
101#define S5PC100_CLKSRC2_MMC1_SHIFT (4)
102#define S5PC100_CLKSRC2_MMC2_MASK (0x3<<8)
103#define S5PC100_CLKSRC2_MMC2_SHIFT (8)
104#define S5PC100_CLKSRC2_LCD_MASK (0x3<<12)
105#define S5PC100_CLKSRC2_LCD_SHIFT (12)
106#define S5PC100_CLKSRC2_FIMC0_MASK (0x3<<16)
107#define S5PC100_CLKSRC2_FIMC0_SHIFT (16)
108#define S5PC100_CLKSRC2_FIMC1_MASK (0x3<<20)
109#define S5PC100_CLKSRC2_FIMC1_SHIFT (20)
110#define S5PC100_CLKSRC2_FIMC2_MASK (0x3<<24)
111#define S5PC100_CLKSRC2_FIMC2_SHIFT (24)
112#define S5PC100_CLKSRC2_MIXER_MASK (0x3<<28)
113#define S5PC100_CLKSRC2_MIXER_SHIFT (28)
114
115/* CLKSRC3 */
116#define S5PC100_CLKSRC3_PWI_MASK (0x3<<0)
117#define S5PC100_CLKSRC3_PWI_SHIFT (0)
118#define S5PC100_CLKSRC3_HCLKD2_MASK (0x1<<4)
119#define S5PC100_CLKSRC3_HCLKD2_SHIFT (4)
120#define S5PC100_CLKSRC3_I2SD2_MASK (0x3<<8)
121#define S5PC100_CLKSRC3_I2SD2_SHIFT (8)
122#define S5PC100_CLKSRC3_AUDIO0_MASK (0x7<<12)
123#define S5PC100_CLKSRC3_AUDIO0_SHIFT (12)
124#define S5PC100_CLKSRC3_AUDIO1_MASK (0x7<<16)
125#define S5PC100_CLKSRC3_AUDIO1_SHIFT (16)
126#define S5PC100_CLKSRC3_AUDIO2_MASK (0x7<<20)
127#define S5PC100_CLKSRC3_AUDIO2_SHIFT (20)
128#define S5PC100_CLKSRC3_SPDIF_MASK (0x3<<24)
129#define S5PC100_CLKSRC3_SPDIF_SHIFT (24)
130
131/* CLKDIV0 */ 68/* CLKDIV0 */
132#define S5PC100_CLKDIV0_APLL_MASK (0x1<<0) 69#define S5PC100_CLKDIV0_APLL_MASK (0x1<<0)
133#define S5PC100_CLKDIV0_APLL_SHIFT (0) 70#define S5PC100_CLKDIV0_APLL_SHIFT (0)
@@ -140,7 +77,7 @@
140#define S5PC100_CLKDIV0_SECSS_MASK (0x7<<16) 77#define S5PC100_CLKDIV0_SECSS_MASK (0x7<<16)
141#define S5PC100_CLKDIV0_SECSS_SHIFT (16) 78#define S5PC100_CLKDIV0_SECSS_SHIFT (16)
142 79
143/* CLKDIV1 */ 80/* CLKDIV1 (OneNAND clock only used in one place, removed) */
144#define S5PC100_CLKDIV1_APLL2_MASK (0x7<<0) 81#define S5PC100_CLKDIV1_APLL2_MASK (0x7<<0)
145#define S5PC100_CLKDIV1_APLL2_SHIFT (0) 82#define S5PC100_CLKDIV1_APLL2_SHIFT (0)
146#define S5PC100_CLKDIV1_MPLL_MASK (0x3<<4) 83#define S5PC100_CLKDIV1_MPLL_MASK (0x3<<4)
@@ -151,56 +88,12 @@
151#define S5PC100_CLKDIV1_D1_SHIFT (12) 88#define S5PC100_CLKDIV1_D1_SHIFT (12)
152#define S5PC100_CLKDIV1_PCLKD1_MASK (0x7<<16) 89#define S5PC100_CLKDIV1_PCLKD1_MASK (0x7<<16)
153#define S5PC100_CLKDIV1_PCLKD1_SHIFT (16) 90#define S5PC100_CLKDIV1_PCLKD1_SHIFT (16)
154#define S5PC100_CLKDIV1_ONENAND_MASK (0x3<<20)
155#define S5PC100_CLKDIV1_ONENAND_SHIFT (20)
156#define S5PC100_CLKDIV1_CAM_MASK (0x1F<<24) 91#define S5PC100_CLKDIV1_CAM_MASK (0x1F<<24)
157#define S5PC100_CLKDIV1_CAM_SHIFT (24) 92#define S5PC100_CLKDIV1_CAM_SHIFT (24)
158 93
159/* CLKDIV2 */ 94/* CLKDIV2 => removed in clksrc update */
160#define S5PC100_CLKDIV2_UART_MASK (0x7<<0) 95/* CLKDIV3 => removed in clksrc update, or not needed */
161#define S5PC100_CLKDIV2_UART_SHIFT (0) 96/* CLKDIV4 => removed in clksrc update, or not needed */
162#define S5PC100_CLKDIV2_SPI0_MASK (0xf<<4)
163#define S5PC100_CLKDIV2_SPI0_SHIFT (4)
164#define S5PC100_CLKDIV2_SPI1_MASK (0xf<<8)
165#define S5PC100_CLKDIV2_SPI1_SHIFT (8)
166#define S5PC100_CLKDIV2_SPI2_MASK (0xf<<12)
167#define S5PC100_CLKDIV2_SPI2_SHIFT (12)
168#define S5PC100_CLKDIV2_IRDA_MASK (0xf<<16)
169#define S5PC100_CLKDIV2_IRDA_SHIFT (16)
170#define S5PC100_CLKDIV2_UHOST_MASK (0xf<<20)
171#define S5PC100_CLKDIV2_UHOST_SHIFT (20)
172
173/* CLKDIV3 */
174#define S5PC100_CLKDIV3_MMC0_MASK (0xf<<0)
175#define S5PC100_CLKDIV3_MMC0_SHIFT (0)
176#define S5PC100_CLKDIV3_MMC1_MASK (0xf<<4)
177#define S5PC100_CLKDIV3_MMC1_SHIFT (4)
178#define S5PC100_CLKDIV3_MMC2_MASK (0xf<<8)
179#define S5PC100_CLKDIV3_MMC2_SHIFT (8)
180#define S5PC100_CLKDIV3_LCD_MASK (0xf<<12)
181#define S5PC100_CLKDIV3_LCD_SHIFT (12)
182#define S5PC100_CLKDIV3_FIMC0_MASK (0xf<<16)
183#define S5PC100_CLKDIV3_FIMC0_SHIFT (16)
184#define S5PC100_CLKDIV3_FIMC1_MASK (0xf<<20)
185#define S5PC100_CLKDIV3_FIMC1_SHIFT (20)
186#define S5PC100_CLKDIV3_FIMC2_MASK (0xf<<24)
187#define S5PC100_CLKDIV3_FIMC2_SHIFT (24)
188#define S5PC100_CLKDIV3_HDMI_MASK (0xf<<28)
189#define S5PC100_CLKDIV3_HDMI_SHIFT (28)
190
191/* CLKDIV4 */
192#define S5PC100_CLKDIV4_PWI_MASK (0x7<<0)
193#define S5PC100_CLKDIV4_PWI_SHIFT (0)
194#define S5PC100_CLKDIV4_HCLKD2_MASK (0x7<<4)
195#define S5PC100_CLKDIV4_HCLKD2_SHIFT (4)
196#define S5PC100_CLKDIV4_I2SD2_MASK (0xf<<8)
197#define S5PC100_CLKDIV4_I2SD2_SHIFT (8)
198#define S5PC100_CLKDIV4_AUDIO0_MASK (0xf<<12)
199#define S5PC100_CLKDIV4_AUDIO0_SHIFT (12)
200#define S5PC100_CLKDIV4_AUDIO1_MASK (0xf<<16)
201#define S5PC100_CLKDIV4_AUDIO1_SHIFT (16)
202#define S5PC100_CLKDIV4_AUDIO2_MASK (0xf<<20)
203#define S5PC100_CLKDIV4_AUDIO2_SHIFT (20)
204 97
205/* HCLKD0/PCLKD0 Clock Gate 0 Registers */ 98/* HCLKD0/PCLKD0 Clock Gate 0 Registers */
206#define S5PC100_CLKGATE_D00_INTC (1<<0) 99#define S5PC100_CLKGATE_D00_INTC (1<<0)
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c
index e44fd04ef333..bfc524827819 100644
--- a/arch/arm/plat-s5pc1xx/irq.c
+++ b/arch/arm/plat-s5pc1xx/irq.c
@@ -20,87 +20,14 @@
20#include <asm/hardware/vic.h> 20#include <asm/hardware/vic.h>
21 21
22#include <mach/map.h> 22#include <mach/map.h>
23#include <plat/regs-timer.h> 23#include <plat/irq-vic-timer.h>
24#include <plat/irq-uart.h>
24#include <plat/cpu.h> 25#include <plat/cpu.h>
25 26
26/* Timer interrupt handling */
27
28static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
29{
30 generic_handle_irq(sub_irq);
31}
32
33static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
34{
35 s3c_irq_demux_timer(irq, IRQ_TIMER0);
36}
37
38static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
39{
40 s3c_irq_demux_timer(irq, IRQ_TIMER1);
41}
42
43static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
44{
45 s3c_irq_demux_timer(irq, IRQ_TIMER2);
46}
47
48static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
49{
50 s3c_irq_demux_timer(irq, IRQ_TIMER3);
51}
52
53static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
54{
55 s3c_irq_demux_timer(irq, IRQ_TIMER4);
56}
57
58/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
59
60static void s3c_irq_timer_mask(unsigned int irq)
61{
62 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
63
64 reg &= 0x1f; /* mask out pending interrupts */
65 reg &= ~(1 << (irq - IRQ_TIMER0));
66 __raw_writel(reg, S3C64XX_TINT_CSTAT);
67}
68
69static void s3c_irq_timer_unmask(unsigned int irq)
70{
71 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
72
73 reg &= 0x1f; /* mask out pending interrupts */
74 reg |= 1 << (irq - IRQ_TIMER0);
75 __raw_writel(reg, S3C64XX_TINT_CSTAT);
76}
77
78static void s3c_irq_timer_ack(unsigned int irq)
79{
80 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
81
82 reg &= 0x1f; /* mask out pending interrupts */
83 reg |= (1 << 5) << (irq - IRQ_TIMER0);
84 __raw_writel(reg, S3C64XX_TINT_CSTAT);
85}
86
87static struct irq_chip s3c_irq_timer = {
88 .name = "s3c-timer",
89 .mask = s3c_irq_timer_mask,
90 .unmask = s3c_irq_timer_unmask,
91 .ack = s3c_irq_timer_ack,
92};
93
94struct uart_irq {
95 void __iomem *regs;
96 unsigned int base_irq;
97 unsigned int parent_irq;
98};
99
100/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] 27/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
101 * are consecutive when looking up the interrupt in the demux routines. 28 * are consecutive when looking up the interrupt in the demux routines.
102 */ 29 */
103static struct uart_irq uart_irqs[] = { 30static struct s3c_uart_irq uart_irqs[] = {
104 [0] = { 31 [0] = {
105 .regs = (void *)S3C_VA_UART0, 32 .regs = (void *)S3C_VA_UART0,
106 .base_irq = IRQ_S3CUART_BASE0, 33 .base_irq = IRQ_S3CUART_BASE0,
@@ -123,113 +50,9 @@ static struct uart_irq uart_irqs[] = {
123 }, 50 },
124}; 51};
125 52
126static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
127{
128 struct uart_irq *uirq = get_irq_chip_data(irq);
129 return uirq->regs;
130}
131
132static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
133{
134 return irq & 3;
135}
136
137/* UART interrupt registers, not worth adding to seperate include header */
138#define S3C64XX_UINTP 0x30
139#define S3C64XX_UINTSP 0x34
140#define S3C64XX_UINTM 0x38
141
142static void s3c_irq_uart_mask(unsigned int irq)
143{
144 void __iomem *regs = s3c_irq_uart_base(irq);
145 unsigned int bit = s3c_irq_uart_bit(irq);
146 u32 reg;
147
148 reg = __raw_readl(regs + S3C64XX_UINTM);
149 reg |= (1 << bit);
150 __raw_writel(reg, regs + S3C64XX_UINTM);
151}
152
153static void s3c_irq_uart_maskack(unsigned int irq)
154{
155 void __iomem *regs = s3c_irq_uart_base(irq);
156 unsigned int bit = s3c_irq_uart_bit(irq);
157 u32 reg;
158
159 reg = __raw_readl(regs + S3C64XX_UINTM);
160 reg |= (1 << bit);
161 __raw_writel(reg, regs + S3C64XX_UINTM);
162 __raw_writel(1 << bit, regs + S3C64XX_UINTP);
163}
164
165static void s3c_irq_uart_unmask(unsigned int irq)
166{
167 void __iomem *regs = s3c_irq_uart_base(irq);
168 unsigned int bit = s3c_irq_uart_bit(irq);
169 u32 reg;
170
171 reg = __raw_readl(regs + S3C64XX_UINTM);
172 reg &= ~(1 << bit);
173 __raw_writel(reg, regs + S3C64XX_UINTM);
174}
175
176static void s3c_irq_uart_ack(unsigned int irq)
177{
178 void __iomem *regs = s3c_irq_uart_base(irq);
179 unsigned int bit = s3c_irq_uart_bit(irq);
180
181 __raw_writel(1 << bit, regs + S3C64XX_UINTP);
182}
183
184static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
185{
186 struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
187 u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
188 int base = uirq->base_irq;
189
190 if (pend & (1 << 0))
191 generic_handle_irq(base);
192 if (pend & (1 << 1))
193 generic_handle_irq(base + 1);
194 if (pend & (1 << 2))
195 generic_handle_irq(base + 2);
196 if (pend & (1 << 3))
197 generic_handle_irq(base + 3);
198}
199
200static struct irq_chip s3c_irq_uart = {
201 .name = "s3c-uart",
202 .mask = s3c_irq_uart_mask,
203 .unmask = s3c_irq_uart_unmask,
204 .mask_ack = s3c_irq_uart_maskack,
205 .ack = s3c_irq_uart_ack,
206};
207
208static void __init s5pc1xx_uart_irq(struct uart_irq *uirq)
209{
210 void __iomem *reg_base = uirq->regs;
211 unsigned int irq;
212 int offs;
213
214 /* mask all interrupts at the start. */
215 __raw_writel(0xf, reg_base + S3C64XX_UINTM);
216
217 for (offs = 0; offs < 3; offs++) {
218 irq = uirq->base_irq + offs;
219
220 set_irq_chip(irq, &s3c_irq_uart);
221 set_irq_chip_data(irq, uirq);
222 set_irq_handler(irq, handle_level_irq);
223 set_irq_flags(irq, IRQF_VALID);
224 }
225
226 set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
227}
228
229void __init s5pc1xx_init_irq(u32 *vic_valid, int num) 53void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
230{ 54{
231 int i; 55 int i;
232 int uart, irq;
233 56
234 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); 57 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
235 58
@@ -240,20 +63,13 @@ void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
240 63
241 /* add the timer sub-irqs */ 64 /* add the timer sub-irqs */
242 65
243 set_irq_chained_handler(IRQ_TIMER0, s3c_irq_demux_timer0); 66 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
244 set_irq_chained_handler(IRQ_TIMER1, s3c_irq_demux_timer1); 67 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
245 set_irq_chained_handler(IRQ_TIMER2, s3c_irq_demux_timer2); 68 s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
246 set_irq_chained_handler(IRQ_TIMER3, s3c_irq_demux_timer3); 69 s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
247 set_irq_chained_handler(IRQ_TIMER4, s3c_irq_demux_timer4); 70 s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
248
249 for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
250 set_irq_chip(irq, &s3c_irq_timer);
251 set_irq_handler(irq, handle_level_irq);
252 set_irq_flags(irq, IRQF_VALID);
253 }
254 71
255 for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++) 72 s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
256 s5pc1xx_uart_irq(&uart_irqs[uart]);
257} 73}
258 74
259 75
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
index b436d44510c8..2bf6c57a96a2 100644
--- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c
+++ b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
@@ -29,6 +29,7 @@
29 29
30#include <plat/regs-clock.h> 30#include <plat/regs-clock.h>
31#include <plat/clock.h> 31#include <plat/clock.h>
32#include <plat/clock-clksrc.h>
32#include <plat/cpu.h> 33#include <plat/cpu.h>
33#include <plat/pll.h> 34#include <plat/pll.h>
34#include <plat/devs.h> 35#include <plat/devs.h>
@@ -51,23 +52,6 @@ static struct clk clk_ext_xtal_mux = {
51#define clk_fout_mpll clk_mpll 52#define clk_fout_mpll clk_mpll
52#define clk_vclk_54m clk_54m 53#define clk_vclk_54m clk_54m
53 54
54struct clk_sources {
55 unsigned int nr_sources;
56 struct clk **sources;
57};
58
59struct clksrc_clk {
60 struct clk clk;
61 unsigned int mask;
62 unsigned int shift;
63
64 struct clk_sources *sources;
65
66 unsigned int divider_shift;
67 void __iomem *reg_divider;
68 void __iomem *reg_source;
69};
70
71/* APLL */ 55/* APLL */
72static struct clk clk_fout_apll = { 56static struct clk clk_fout_apll = {
73 .name = "fout_apll", 57 .name = "fout_apll",
@@ -80,7 +64,7 @@ static struct clk *clk_src_apll_list[] = {
80 [1] = &clk_fout_apll, 64 [1] = &clk_fout_apll,
81}; 65};
82 66
83static struct clk_sources clk_src_apll = { 67static struct clksrc_sources clk_src_apll = {
84 .sources = clk_src_apll_list, 68 .sources = clk_src_apll_list,
85 .nr_sources = ARRAY_SIZE(clk_src_apll_list), 69 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
86}; 70};
@@ -90,10 +74,8 @@ static struct clksrc_clk clk_mout_apll = {
90 .name = "mout_apll", 74 .name = "mout_apll",
91 .id = -1, 75 .id = -1,
92 }, 76 },
93 .shift = S5PC100_CLKSRC0_APLL_SHIFT,
94 .mask = S5PC100_CLKSRC0_APLL_MASK,
95 .sources = &clk_src_apll, 77 .sources = &clk_src_apll,
96 .reg_source = S5PC100_CLKSRC0, 78 .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 0, .size = 1, },
97}; 79};
98 80
99static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk) 81static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk)
@@ -111,7 +93,9 @@ static struct clk clk_dout_apll = {
111 .name = "dout_apll", 93 .name = "dout_apll",
112 .id = -1, 94 .id = -1,
113 .parent = &clk_mout_apll.clk, 95 .parent = &clk_mout_apll.clk,
114 .get_rate = s5pc100_clk_dout_apll_get_rate, 96 .ops = &(struct clk_ops) {
97 .get_rate = s5pc100_clk_dout_apll_get_rate,
98 },
115}; 99};
116 100
117static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk) 101static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk)
@@ -165,9 +149,11 @@ static struct clk clk_arm = {
165 .name = "armclk", 149 .name = "armclk",
166 .id = -1, 150 .id = -1,
167 .parent = &clk_dout_apll, 151 .parent = &clk_dout_apll,
168 .get_rate = s5pc100_clk_arm_get_rate, 152 .ops = &(struct clk_ops) {
169 .set_rate = s5pc100_clk_arm_set_rate, 153 .get_rate = s5pc100_clk_arm_get_rate,
170 .round_rate = s5pc100_clk_arm_round_rate, 154 .set_rate = s5pc100_clk_arm_set_rate,
155 .round_rate = s5pc100_clk_arm_round_rate,
156 },
171}; 157};
172 158
173static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk) 159static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk)
@@ -185,7 +171,9 @@ static struct clk clk_dout_d0_bus = {
185 .name = "dout_d0_bus", 171 .name = "dout_d0_bus",
186 .id = -1, 172 .id = -1,
187 .parent = &clk_arm, 173 .parent = &clk_arm,
188 .get_rate = s5pc100_clk_dout_d0_bus_get_rate, 174 .ops = &(struct clk_ops) {
175 .get_rate = s5pc100_clk_dout_d0_bus_get_rate,
176 },
189}; 177};
190 178
191static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk) 179static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk)
@@ -203,7 +191,9 @@ static struct clk clk_dout_pclkd0 = {
203 .name = "dout_pclkd0", 191 .name = "dout_pclkd0",
204 .id = -1, 192 .id = -1,
205 .parent = &clk_dout_d0_bus, 193 .parent = &clk_dout_d0_bus,
206 .get_rate = s5pc100_clk_dout_pclkd0_get_rate, 194 .ops = &(struct clk_ops) {
195 .get_rate = s5pc100_clk_dout_pclkd0_get_rate,
196 },
207}; 197};
208 198
209static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk) 199static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk)
@@ -221,7 +211,9 @@ static struct clk clk_dout_apll2 = {
221 .name = "dout_apll2", 211 .name = "dout_apll2",
222 .id = -1, 212 .id = -1,
223 .parent = &clk_mout_apll.clk, 213 .parent = &clk_mout_apll.clk,
224 .get_rate = s5pc100_clk_dout_apll2_get_rate, 214 .ops = &(struct clk_ops) {
215 .get_rate = s5pc100_clk_dout_apll2_get_rate,
216 },
225}; 217};
226 218
227/* MPLL */ 219/* MPLL */
@@ -230,7 +222,7 @@ static struct clk *clk_src_mpll_list[] = {
230 [1] = &clk_fout_mpll, 222 [1] = &clk_fout_mpll,
231}; 223};
232 224
233static struct clk_sources clk_src_mpll = { 225static struct clksrc_sources clk_src_mpll = {
234 .sources = clk_src_mpll_list, 226 .sources = clk_src_mpll_list,
235 .nr_sources = ARRAY_SIZE(clk_src_mpll_list), 227 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
236}; 228};
@@ -240,10 +232,8 @@ static struct clksrc_clk clk_mout_mpll = {
240 .name = "mout_mpll", 232 .name = "mout_mpll",
241 .id = -1, 233 .id = -1,
242 }, 234 },
243 .shift = S5PC100_CLKSRC0_MPLL_SHIFT,
244 .mask = S5PC100_CLKSRC0_MPLL_MASK,
245 .sources = &clk_src_mpll, 235 .sources = &clk_src_mpll,
246 .reg_source = S5PC100_CLKSRC0, 236 .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 4, .size = 1, },
247}; 237};
248 238
249static struct clk *clkset_am_list[] = { 239static struct clk *clkset_am_list[] = {
@@ -251,7 +241,7 @@ static struct clk *clkset_am_list[] = {
251 [1] = &clk_dout_apll2, 241 [1] = &clk_dout_apll2,
252}; 242};
253 243
254static struct clk_sources clk_src_am = { 244static struct clksrc_sources clk_src_am = {
255 .sources = clkset_am_list, 245 .sources = clkset_am_list,
256 .nr_sources = ARRAY_SIZE(clkset_am_list), 246 .nr_sources = ARRAY_SIZE(clkset_am_list),
257}; 247};
@@ -261,10 +251,8 @@ static struct clksrc_clk clk_mout_am = {
261 .name = "mout_am", 251 .name = "mout_am",
262 .id = -1, 252 .id = -1,
263 }, 253 },
264 .shift = S5PC100_CLKSRC0_AMMUX_SHIFT,
265 .mask = S5PC100_CLKSRC0_AMMUX_MASK,
266 .sources = &clk_src_am, 254 .sources = &clk_src_am,
267 .reg_source = S5PC100_CLKSRC0, 255 .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 16, .size = 1, },
268}; 256};
269 257
270static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk) 258static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk)
@@ -284,7 +272,9 @@ static struct clk clk_dout_d1_bus = {
284 .name = "dout_d1_bus", 272 .name = "dout_d1_bus",
285 .id = -1, 273 .id = -1,
286 .parent = &clk_mout_am.clk, 274 .parent = &clk_mout_am.clk,
287 .get_rate = s5pc100_clk_dout_d1_bus_get_rate, 275 .ops = &(struct clk_ops) {
276 .get_rate = s5pc100_clk_dout_d1_bus_get_rate,
277 },
288}; 278};
289 279
290static struct clk *clkset_onenand_list[] = { 280static struct clk *clkset_onenand_list[] = {
@@ -292,7 +282,7 @@ static struct clk *clkset_onenand_list[] = {
292 [1] = &clk_dout_d1_bus, 282 [1] = &clk_dout_d1_bus,
293}; 283};
294 284
295static struct clk_sources clk_src_onenand = { 285static struct clksrc_sources clk_src_onenand = {
296 .sources = clkset_onenand_list, 286 .sources = clkset_onenand_list,
297 .nr_sources = ARRAY_SIZE(clkset_onenand_list), 287 .nr_sources = ARRAY_SIZE(clkset_onenand_list),
298}; 288};
@@ -302,10 +292,8 @@ static struct clksrc_clk clk_mout_onenand = {
302 .name = "mout_onenand", 292 .name = "mout_onenand",
303 .id = -1, 293 .id = -1,
304 }, 294 },
305 .shift = S5PC100_CLKSRC0_ONENAND_SHIFT,
306 .mask = S5PC100_CLKSRC0_ONENAND_MASK,
307 .sources = &clk_src_onenand, 295 .sources = &clk_src_onenand,
308 .reg_source = S5PC100_CLKSRC0, 296 .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 24, .size = 1, },
309}; 297};
310 298
311static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk) 299static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk)
@@ -325,7 +313,9 @@ static struct clk clk_dout_pclkd1 = {
325 .name = "dout_pclkd1", 313 .name = "dout_pclkd1",
326 .id = -1, 314 .id = -1,
327 .parent = &clk_dout_d1_bus, 315 .parent = &clk_dout_d1_bus,
328 .get_rate = s5pc100_clk_dout_pclkd1_get_rate, 316 .ops = &(struct clk_ops) {
317 .get_rate = s5pc100_clk_dout_pclkd1_get_rate,
318 },
329}; 319};
330 320
331static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk) 321static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk)
@@ -345,7 +335,9 @@ static struct clk clk_dout_mpll2 = {
345 .name = "dout_mpll2", 335 .name = "dout_mpll2",
346 .id = -1, 336 .id = -1,
347 .parent = &clk_mout_am.clk, 337 .parent = &clk_mout_am.clk,
348 .get_rate = s5pc100_clk_dout_mpll2_get_rate, 338 .ops = &(struct clk_ops) {
339 .get_rate = s5pc100_clk_dout_mpll2_get_rate,
340 },
349}; 341};
350 342
351static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk) 343static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk)
@@ -365,7 +357,9 @@ static struct clk clk_dout_cam = {
365 .name = "dout_cam", 357 .name = "dout_cam",
366 .id = -1, 358 .id = -1,
367 .parent = &clk_dout_mpll2, 359 .parent = &clk_dout_mpll2,
368 .get_rate = s5pc100_clk_dout_cam_get_rate, 360 .ops = &(struct clk_ops) {
361 .get_rate = s5pc100_clk_dout_cam_get_rate,
362 },
369}; 363};
370 364
371static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk) 365static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk)
@@ -385,7 +379,9 @@ static struct clk clk_dout_mpll = {
385 .name = "dout_mpll", 379 .name = "dout_mpll",
386 .id = -1, 380 .id = -1,
387 .parent = &clk_mout_am.clk, 381 .parent = &clk_mout_am.clk,
388 .get_rate = s5pc100_clk_dout_mpll_get_rate, 382 .ops = &(struct clk_ops) {
383 .get_rate = s5pc100_clk_dout_mpll_get_rate,
384 },
389}; 385};
390 386
391/* EPLL */ 387/* EPLL */
@@ -399,7 +395,7 @@ static struct clk *clk_src_epll_list[] = {
399 [1] = &clk_fout_epll, 395 [1] = &clk_fout_epll,
400}; 396};
401 397
402static struct clk_sources clk_src_epll = { 398static struct clksrc_sources clk_src_epll = {
403 .sources = clk_src_epll_list, 399 .sources = clk_src_epll_list,
404 .nr_sources = ARRAY_SIZE(clk_src_epll_list), 400 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
405}; 401};
@@ -409,10 +405,8 @@ static struct clksrc_clk clk_mout_epll = {
409 .name = "mout_epll", 405 .name = "mout_epll",
410 .id = -1, 406 .id = -1,
411 }, 407 },
412 .shift = S5PC100_CLKSRC0_EPLL_SHIFT, 408 .sources = &clk_src_epll,
413 .mask = S5PC100_CLKSRC0_EPLL_MASK, 409 .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 8, .size = 1, },
414 .sources = &clk_src_epll,
415 .reg_source = S5PC100_CLKSRC0,
416}; 410};
417 411
418/* HPLL */ 412/* HPLL */
@@ -426,7 +420,7 @@ static struct clk *clk_src_hpll_list[] = {
426 [1] = &clk_fout_hpll, 420 [1] = &clk_fout_hpll,
427}; 421};
428 422
429static struct clk_sources clk_src_hpll = { 423static struct clksrc_sources clk_src_hpll = {
430 .sources = clk_src_hpll_list, 424 .sources = clk_src_hpll_list,
431 .nr_sources = ARRAY_SIZE(clk_src_hpll_list), 425 .nr_sources = ARRAY_SIZE(clk_src_hpll_list),
432}; 426};
@@ -436,10 +430,8 @@ static struct clksrc_clk clk_mout_hpll = {
436 .name = "mout_hpll", 430 .name = "mout_hpll",
437 .id = -1, 431 .id = -1,
438 }, 432 },
439 .shift = S5PC100_CLKSRC0_HPLL_SHIFT, 433 .sources = &clk_src_hpll,
440 .mask = S5PC100_CLKSRC0_HPLL_MASK, 434 .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 12, .size = 1, },
441 .sources = &clk_src_hpll,
442 .reg_source = S5PC100_CLKSRC0,
443}; 435};
444 436
445/* Peripherals */ 437/* Peripherals */
@@ -454,190 +446,6 @@ static struct clksrc_clk clk_mout_hpll = {
454 * have a common parent divisor so are not included here. 446 * have a common parent divisor so are not included here.
455 */ 447 */
456 448
457static inline struct clksrc_clk *to_clksrc(struct clk *clk)
458{
459 return container_of(clk, struct clksrc_clk, clk);
460}
461
462static unsigned long s5pc100_getrate_clksrc(struct clk *clk)
463{
464 struct clksrc_clk *sclk = to_clksrc(clk);
465 unsigned long rate = clk_get_rate(clk->parent);
466 u32 clkdiv = __raw_readl(sclk->reg_divider);
467
468 clkdiv >>= sclk->divider_shift;
469 clkdiv &= 0xf;
470 clkdiv++;
471
472 rate /= clkdiv;
473 return rate;
474}
475
476static int s5pc100_setrate_clksrc(struct clk *clk, unsigned long rate)
477{
478 struct clksrc_clk *sclk = to_clksrc(clk);
479 void __iomem *reg = sclk->reg_divider;
480 unsigned int div;
481 u32 val;
482
483 rate = clk_round_rate(clk, rate);
484 div = clk_get_rate(clk->parent) / rate;
485 if (div > 16)
486 return -EINVAL;
487
488 val = __raw_readl(reg);
489 val &= ~(0xf << sclk->divider_shift);
490 val |= (div - 1) << sclk->divider_shift;
491 __raw_writel(val, reg);
492
493 return 0;
494}
495
496static int s5pc100_setparent_clksrc(struct clk *clk, struct clk *parent)
497{
498 struct clksrc_clk *sclk = to_clksrc(clk);
499 struct clk_sources *srcs = sclk->sources;
500 u32 clksrc = __raw_readl(sclk->reg_source);
501 int src_nr = -1;
502 int ptr;
503
504 for (ptr = 0; ptr < srcs->nr_sources; ptr++)
505 if (srcs->sources[ptr] == parent) {
506 src_nr = ptr;
507 break;
508 }
509
510 if (src_nr >= 0) {
511 clksrc &= ~sclk->mask;
512 clksrc |= src_nr << sclk->shift;
513
514 __raw_writel(clksrc, sclk->reg_source);
515 return 0;
516 }
517
518 return -EINVAL;
519}
520
521static unsigned long s5pc100_roundrate_clksrc(struct clk *clk,
522 unsigned long rate)
523{
524 unsigned long parent_rate = clk_get_rate(clk->parent);
525 int div;
526
527 if (rate > parent_rate)
528 rate = parent_rate;
529 else {
530 div = rate / parent_rate;
531
532 if (div == 0)
533 div = 1;
534 if (div > 16)
535 div = 16;
536
537 rate = parent_rate / div;
538 }
539
540 return rate;
541}
542
543static struct clk *clkset_spi_list[] = {
544 &clk_mout_epll.clk,
545 &clk_dout_mpll2,
546 &clk_fin_epll,
547 &clk_mout_hpll.clk,
548};
549
550static struct clk_sources clkset_spi = {
551 .sources = clkset_spi_list,
552 .nr_sources = ARRAY_SIZE(clkset_spi_list),
553};
554
555static struct clksrc_clk clk_spi0 = {
556 .clk = {
557 .name = "spi_bus",
558 .id = 0,
559 .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0,
560 .enable = s5pc100_sclk0_ctrl,
561 .set_parent = s5pc100_setparent_clksrc,
562 .get_rate = s5pc100_getrate_clksrc,
563 .set_rate = s5pc100_setrate_clksrc,
564 .round_rate = s5pc100_roundrate_clksrc,
565 },
566 .shift = S5PC100_CLKSRC1_SPI0_SHIFT,
567 .mask = S5PC100_CLKSRC1_SPI0_MASK,
568 .sources = &clkset_spi,
569 .divider_shift = S5PC100_CLKDIV2_SPI0_SHIFT,
570 .reg_divider = S5PC100_CLKDIV2,
571 .reg_source = S5PC100_CLKSRC1,
572};
573
574static struct clksrc_clk clk_spi1 = {
575 .clk = {
576 .name = "spi_bus",
577 .id = 1,
578 .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1,
579 .enable = s5pc100_sclk0_ctrl,
580 .set_parent = s5pc100_setparent_clksrc,
581 .get_rate = s5pc100_getrate_clksrc,
582 .set_rate = s5pc100_setrate_clksrc,
583 .round_rate = s5pc100_roundrate_clksrc,
584 },
585 .shift = S5PC100_CLKSRC1_SPI1_SHIFT,
586 .mask = S5PC100_CLKSRC1_SPI1_MASK,
587 .sources = &clkset_spi,
588 .divider_shift = S5PC100_CLKDIV2_SPI1_SHIFT,
589 .reg_divider = S5PC100_CLKDIV2,
590 .reg_source = S5PC100_CLKSRC1,
591};
592
593static struct clksrc_clk clk_spi2 = {
594 .clk = {
595 .name = "spi_bus",
596 .id = 2,
597 .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2,
598 .enable = s5pc100_sclk0_ctrl,
599 .set_parent = s5pc100_setparent_clksrc,
600 .get_rate = s5pc100_getrate_clksrc,
601 .set_rate = s5pc100_setrate_clksrc,
602 .round_rate = s5pc100_roundrate_clksrc,
603 },
604 .shift = S5PC100_CLKSRC1_SPI2_SHIFT,
605 .mask = S5PC100_CLKSRC1_SPI2_MASK,
606 .sources = &clkset_spi,
607 .divider_shift = S5PC100_CLKDIV2_SPI2_SHIFT,
608 .reg_divider = S5PC100_CLKDIV2,
609 .reg_source = S5PC100_CLKSRC1,
610};
611
612static struct clk *clkset_uart_list[] = {
613 &clk_mout_epll.clk,
614 &clk_dout_mpll,
615};
616
617static struct clk_sources clkset_uart = {
618 .sources = clkset_uart_list,
619 .nr_sources = ARRAY_SIZE(clkset_uart_list),
620};
621
622static struct clksrc_clk clk_uart_uclk1 = {
623 .clk = {
624 .name = "uclk1",
625 .id = -1,
626 .ctrlbit = S5PC100_CLKGATE_SCLK0_UART,
627 .enable = s5pc100_sclk0_ctrl,
628 .set_parent = s5pc100_setparent_clksrc,
629 .get_rate = s5pc100_getrate_clksrc,
630 .set_rate = s5pc100_setrate_clksrc,
631 .round_rate = s5pc100_roundrate_clksrc,
632 },
633 .shift = S5PC100_CLKSRC1_UART_SHIFT,
634 .mask = S5PC100_CLKSRC1_UART_MASK,
635 .sources = &clkset_uart,
636 .divider_shift = S5PC100_CLKDIV2_UART_SHIFT,
637 .reg_divider = S5PC100_CLKDIV2,
638 .reg_source = S5PC100_CLKSRC1,
639};
640
641static struct clk clk_iis_cd0 = { 449static struct clk clk_iis_cd0 = {
642 .name = "iis_cdclk0", 450 .name = "iis_cdclk0",
643 .id = -1, 451 .id = -1,
@@ -672,28 +480,31 @@ static struct clk *clkset_audio0_list[] = {
672 &clk_mout_hpll.clk, 480 &clk_mout_hpll.clk,
673}; 481};
674 482
675static struct clk_sources clkset_audio0 = { 483static struct clksrc_sources clkset_audio0 = {
676 .sources = clkset_audio0_list, 484 .sources = clkset_audio0_list,
677 .nr_sources = ARRAY_SIZE(clkset_audio0_list), 485 .nr_sources = ARRAY_SIZE(clkset_audio0_list),
678}; 486};
679 487
680static struct clksrc_clk clk_audio0 = { 488static struct clk *clkset_spi_list[] = {
681 .clk = { 489 &clk_mout_epll.clk,
682 .name = "audio-bus", 490 &clk_dout_mpll2,
683 .id = 0, 491 &clk_fin_epll,
684 .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO0, 492 &clk_mout_hpll.clk,
685 .enable = s5pc100_sclk1_ctrl, 493};
686 .set_parent = s5pc100_setparent_clksrc, 494
687 .get_rate = s5pc100_getrate_clksrc, 495static struct clksrc_sources clkset_spi = {
688 .set_rate = s5pc100_setrate_clksrc, 496 .sources = clkset_spi_list,
689 .round_rate = s5pc100_roundrate_clksrc, 497 .nr_sources = ARRAY_SIZE(clkset_spi_list),
690 }, 498};
691 .shift = S5PC100_CLKSRC3_AUDIO0_SHIFT, 499
692 .mask = S5PC100_CLKSRC3_AUDIO0_MASK, 500static struct clk *clkset_uart_list[] = {
693 .sources = &clkset_audio0, 501 &clk_mout_epll.clk,
694 .divider_shift = S5PC100_CLKDIV4_AUDIO0_SHIFT, 502 &clk_dout_mpll,
695 .reg_divider = S5PC100_CLKDIV4, 503};
696 .reg_source = S5PC100_CLKSRC3, 504
505static struct clksrc_sources clkset_uart = {
506 .sources = clkset_uart_list,
507 .nr_sources = ARRAY_SIZE(clkset_uart_list),
697}; 508};
698 509
699static struct clk *clkset_audio1_list[] = { 510static struct clk *clkset_audio1_list[] = {
@@ -705,30 +516,11 @@ static struct clk *clkset_audio1_list[] = {
705 &clk_mout_hpll.clk, 516 &clk_mout_hpll.clk,
706}; 517};
707 518
708static struct clk_sources clkset_audio1 = { 519static struct clksrc_sources clkset_audio1 = {
709 .sources = clkset_audio1_list, 520 .sources = clkset_audio1_list,
710 .nr_sources = ARRAY_SIZE(clkset_audio1_list), 521 .nr_sources = ARRAY_SIZE(clkset_audio1_list),
711}; 522};
712 523
713static struct clksrc_clk clk_audio1 = {
714 .clk = {
715 .name = "audio-bus",
716 .id = 1,
717 .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO1,
718 .enable = s5pc100_sclk1_ctrl,
719 .set_parent = s5pc100_setparent_clksrc,
720 .get_rate = s5pc100_getrate_clksrc,
721 .set_rate = s5pc100_setrate_clksrc,
722 .round_rate = s5pc100_roundrate_clksrc,
723 },
724 .shift = S5PC100_CLKSRC3_AUDIO1_SHIFT,
725 .mask = S5PC100_CLKSRC3_AUDIO1_MASK,
726 .sources = &clkset_audio1,
727 .divider_shift = S5PC100_CLKDIV4_AUDIO1_SHIFT,
728 .reg_divider = S5PC100_CLKDIV4,
729 .reg_source = S5PC100_CLKSRC3,
730};
731
732static struct clk *clkset_audio2_list[] = { 524static struct clk *clkset_audio2_list[] = {
733 &clk_mout_epll.clk, 525 &clk_mout_epll.clk,
734 &clk_dout_mpll, 526 &clk_dout_mpll,
@@ -737,52 +529,56 @@ static struct clk *clkset_audio2_list[] = {
737 &clk_mout_hpll.clk, 529 &clk_mout_hpll.clk,
738}; 530};
739 531
740static struct clk_sources clkset_audio2 = { 532static struct clksrc_sources clkset_audio2 = {
741 .sources = clkset_audio2_list, 533 .sources = clkset_audio2_list,
742 .nr_sources = ARRAY_SIZE(clkset_audio2_list), 534 .nr_sources = ARRAY_SIZE(clkset_audio2_list),
743}; 535};
744 536
745static struct clksrc_clk clk_audio2 = { 537static struct clksrc_clk clksrc_audio[] = {
746 .clk = { 538 {
747 .name = "audio-bus", 539 .clk = {
748 .id = 2, 540 .name = "audio-bus",
749 .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO2, 541 .id = 0,
750 .enable = s5pc100_sclk1_ctrl, 542 .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO0,
751 .set_parent = s5pc100_setparent_clksrc, 543 .enable = s5pc100_sclk1_ctrl,
752 .get_rate = s5pc100_getrate_clksrc, 544 },
753 .set_rate = s5pc100_setrate_clksrc, 545 .sources = &clkset_audio0,
754 .round_rate = s5pc100_roundrate_clksrc, 546 .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 12, .size = 4, },
547 .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 12, .size = 3, },
548 }, {
549 .clk = {
550 .name = "audio-bus",
551 .id = 1,
552 .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO1,
553 .enable = s5pc100_sclk1_ctrl,
554 },
555 .sources = &clkset_audio1,
556 .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 16, .size = 4, },
557 .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 16, .size = 3, },
558 }, {
559 .clk = {
560 .name = "audio-bus",
561 .id = 2,
562 .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO2,
563 .enable = s5pc100_sclk1_ctrl,
564 },
565 .sources = &clkset_audio2,
566 .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 20, .size = 4, },
567 .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 20, .size = 3, },
755 }, 568 },
756 .shift = S5PC100_CLKSRC3_AUDIO2_SHIFT,
757 .mask = S5PC100_CLKSRC3_AUDIO2_MASK,
758 .sources = &clkset_audio2,
759 .divider_shift = S5PC100_CLKDIV4_AUDIO2_SHIFT,
760 .reg_divider = S5PC100_CLKDIV4,
761 .reg_source = S5PC100_CLKSRC3,
762}; 569};
763 570
764static struct clk *clkset_spdif_list[] = { 571static struct clk *clkset_spdif_list[] = {
765 &clk_audio0.clk, 572 &clksrc_audio[0].clk,
766 &clk_audio1.clk, 573 &clksrc_audio[1].clk,
767 &clk_audio2.clk, 574 &clksrc_audio[2].clk,
768}; 575};
769 576
770static struct clk_sources clkset_spdif = { 577static struct clksrc_sources clkset_spdif = {
771 .sources = clkset_spdif_list, 578 .sources = clkset_spdif_list,
772 .nr_sources = ARRAY_SIZE(clkset_spdif_list), 579 .nr_sources = ARRAY_SIZE(clkset_spdif_list),
773}; 580};
774 581
775static struct clksrc_clk clk_spdif = {
776 .clk = {
777 .name = "spdif",
778 .id = -1,
779 },
780 .shift = S5PC100_CLKSRC3_SPDIF_SHIFT,
781 .mask = S5PC100_CLKSRC3_SPDIF_MASK,
782 .sources = &clkset_spdif,
783 .reg_source = S5PC100_CLKSRC3,
784};
785
786static struct clk *clkset_lcd_fimc_list[] = { 582static struct clk *clkset_lcd_fimc_list[] = {
787 &clk_mout_epll.clk, 583 &clk_mout_epll.clk,
788 &clk_dout_mpll, 584 &clk_dout_mpll,
@@ -790,87 +586,11 @@ static struct clk *clkset_lcd_fimc_list[] = {
790 &clk_vclk_54m, 586 &clk_vclk_54m,
791}; 587};
792 588
793static struct clk_sources clkset_lcd_fimc = { 589static struct clksrc_sources clkset_lcd_fimc = {
794 .sources = clkset_lcd_fimc_list, 590 .sources = clkset_lcd_fimc_list,
795 .nr_sources = ARRAY_SIZE(clkset_lcd_fimc_list), 591 .nr_sources = ARRAY_SIZE(clkset_lcd_fimc_list),
796}; 592};
797 593
798static struct clksrc_clk clk_lcd = {
799 .clk = {
800 .name = "lcd",
801 .id = -1,
802 .ctrlbit = S5PC100_CLKGATE_SCLK1_LCD,
803 .enable = s5pc100_sclk1_ctrl,
804 .set_parent = s5pc100_setparent_clksrc,
805 .get_rate = s5pc100_getrate_clksrc,
806 .set_rate = s5pc100_setrate_clksrc,
807 .round_rate = s5pc100_roundrate_clksrc,
808 },
809 .shift = S5PC100_CLKSRC2_LCD_SHIFT,
810 .mask = S5PC100_CLKSRC2_LCD_MASK,
811 .sources = &clkset_lcd_fimc,
812 .divider_shift = S5PC100_CLKDIV3_LCD_SHIFT,
813 .reg_divider = S5PC100_CLKDIV3,
814 .reg_source = S5PC100_CLKSRC2,
815};
816
817static struct clksrc_clk clk_fimc0 = {
818 .clk = {
819 .name = "fimc",
820 .id = 0,
821 .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC0,
822 .enable = s5pc100_sclk1_ctrl,
823 .set_parent = s5pc100_setparent_clksrc,
824 .get_rate = s5pc100_getrate_clksrc,
825 .set_rate = s5pc100_setrate_clksrc,
826 .round_rate = s5pc100_roundrate_clksrc,
827 },
828 .shift = S5PC100_CLKSRC2_FIMC0_SHIFT,
829 .mask = S5PC100_CLKSRC2_FIMC0_MASK,
830 .sources = &clkset_lcd_fimc,
831 .divider_shift = S5PC100_CLKDIV3_FIMC0_SHIFT,
832 .reg_divider = S5PC100_CLKDIV3,
833 .reg_source = S5PC100_CLKSRC2,
834};
835
836static struct clksrc_clk clk_fimc1 = {
837 .clk = {
838 .name = "fimc",
839 .id = 1,
840 .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC1,
841 .enable = s5pc100_sclk1_ctrl,
842 .set_parent = s5pc100_setparent_clksrc,
843 .get_rate = s5pc100_getrate_clksrc,
844 .set_rate = s5pc100_setrate_clksrc,
845 .round_rate = s5pc100_roundrate_clksrc,
846 },
847 .shift = S5PC100_CLKSRC2_FIMC1_SHIFT,
848 .mask = S5PC100_CLKSRC2_FIMC1_MASK,
849 .sources = &clkset_lcd_fimc,
850 .divider_shift = S5PC100_CLKDIV3_FIMC1_SHIFT,
851 .reg_divider = S5PC100_CLKDIV3,
852 .reg_source = S5PC100_CLKSRC2,
853};
854
855static struct clksrc_clk clk_fimc2 = {
856 .clk = {
857 .name = "fimc",
858 .id = 2,
859 .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC2,
860 .enable = s5pc100_sclk1_ctrl,
861 .set_parent = s5pc100_setparent_clksrc,
862 .get_rate = s5pc100_getrate_clksrc,
863 .set_rate = s5pc100_setrate_clksrc,
864 .round_rate = s5pc100_roundrate_clksrc,
865 },
866 .shift = S5PC100_CLKSRC2_FIMC2_SHIFT,
867 .mask = S5PC100_CLKSRC2_FIMC2_MASK,
868 .sources = &clkset_lcd_fimc,
869 .divider_shift = S5PC100_CLKDIV3_FIMC2_SHIFT,
870 .reg_divider = S5PC100_CLKDIV3,
871 .reg_source = S5PC100_CLKSRC2,
872};
873
874static struct clk *clkset_mmc_list[] = { 594static struct clk *clkset_mmc_list[] = {
875 &clk_mout_epll.clk, 595 &clk_mout_epll.clk,
876 &clk_dout_mpll, 596 &clk_dout_mpll,
@@ -878,69 +598,11 @@ static struct clk *clkset_mmc_list[] = {
878 &clk_mout_hpll.clk , 598 &clk_mout_hpll.clk ,
879}; 599};
880 600
881static struct clk_sources clkset_mmc = { 601static struct clksrc_sources clkset_mmc = {
882 .sources = clkset_mmc_list, 602 .sources = clkset_mmc_list,
883 .nr_sources = ARRAY_SIZE(clkset_mmc_list), 603 .nr_sources = ARRAY_SIZE(clkset_mmc_list),
884}; 604};
885 605
886static struct clksrc_clk clk_mmc0 = {
887 .clk = {
888 .name = "mmc_bus",
889 .id = 0,
890 .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0,
891 .enable = s5pc100_sclk0_ctrl,
892 .set_parent = s5pc100_setparent_clksrc,
893 .get_rate = s5pc100_getrate_clksrc,
894 .set_rate = s5pc100_setrate_clksrc,
895 .round_rate = s5pc100_roundrate_clksrc,
896 },
897 .shift = S5PC100_CLKSRC2_MMC0_SHIFT,
898 .mask = S5PC100_CLKSRC2_MMC0_MASK,
899 .sources = &clkset_mmc,
900 .divider_shift = S5PC100_CLKDIV3_MMC0_SHIFT,
901 .reg_divider = S5PC100_CLKDIV3,
902 .reg_source = S5PC100_CLKSRC2,
903};
904
905static struct clksrc_clk clk_mmc1 = {
906 .clk = {
907 .name = "mmc_bus",
908 .id = 1,
909 .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1,
910 .enable = s5pc100_sclk0_ctrl,
911 .set_parent = s5pc100_setparent_clksrc,
912 .get_rate = s5pc100_getrate_clksrc,
913 .set_rate = s5pc100_setrate_clksrc,
914 .round_rate = s5pc100_roundrate_clksrc,
915 },
916 .shift = S5PC100_CLKSRC2_MMC1_SHIFT,
917 .mask = S5PC100_CLKSRC2_MMC1_MASK,
918 .sources = &clkset_mmc,
919 .divider_shift = S5PC100_CLKDIV3_MMC1_SHIFT,
920 .reg_divider = S5PC100_CLKDIV3,
921 .reg_source = S5PC100_CLKSRC2,
922};
923
924static struct clksrc_clk clk_mmc2 = {
925 .clk = {
926 .name = "mmc_bus",
927 .id = 2,
928 .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2,
929 .enable = s5pc100_sclk0_ctrl,
930 .set_parent = s5pc100_setparent_clksrc,
931 .get_rate = s5pc100_getrate_clksrc,
932 .set_rate = s5pc100_setrate_clksrc,
933 .round_rate = s5pc100_roundrate_clksrc,
934 },
935 .shift = S5PC100_CLKSRC2_MMC2_SHIFT,
936 .mask = S5PC100_CLKSRC2_MMC2_MASK,
937 .sources = &clkset_mmc,
938 .divider_shift = S5PC100_CLKDIV3_MMC2_SHIFT,
939 .reg_divider = S5PC100_CLKDIV3,
940 .reg_source = S5PC100_CLKSRC2,
941};
942
943
944static struct clk *clkset_usbhost_list[] = { 606static struct clk *clkset_usbhost_list[] = {
945 &clk_mout_epll.clk, 607 &clk_mout_epll.clk,
946 &clk_dout_mpll, 608 &clk_dout_mpll,
@@ -948,28 +610,141 @@ static struct clk *clkset_usbhost_list[] = {
948 &clk_48m, 610 &clk_48m,
949}; 611};
950 612
951static struct clk_sources clkset_usbhost = { 613static struct clksrc_sources clkset_usbhost = {
952 .sources = clkset_usbhost_list, 614 .sources = clkset_usbhost_list,
953 .nr_sources = ARRAY_SIZE(clkset_usbhost_list), 615 .nr_sources = ARRAY_SIZE(clkset_usbhost_list),
954}; 616};
955 617
956static struct clksrc_clk clk_usbhost = { 618static struct clksrc_clk clksrc_clks[] = {
957 .clk = { 619 {
958 .name = "usbhost", 620 .clk = {
959 .id = -1, 621 .name = "spi_bus",
960 .ctrlbit = S5PC100_CLKGATE_SCLK0_USBHOST, 622 .id = 0,
961 .enable = s5pc100_sclk0_ctrl, 623 .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0,
962 .set_parent = s5pc100_setparent_clksrc, 624 .enable = s5pc100_sclk0_ctrl,
963 .get_rate = s5pc100_getrate_clksrc, 625
964 .set_rate = s5pc100_setrate_clksrc, 626 },
965 .round_rate = s5pc100_roundrate_clksrc, 627 .sources = &clkset_spi,
966 }, 628 .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 4, .size = 4, },
967 .shift = S5PC100_CLKSRC1_UHOST_SHIFT, 629 .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 4, .size = 2, },
968 .mask = S5PC100_CLKSRC1_UHOST_MASK, 630 }, {
969 .sources = &clkset_usbhost, 631 .clk = {
970 .divider_shift = S5PC100_CLKDIV2_UHOST_SHIFT, 632 .name = "spi_bus",
971 .reg_divider = S5PC100_CLKDIV2, 633 .id = 1,
972 .reg_source = S5PC100_CLKSRC1, 634 .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1,
635 .enable = s5pc100_sclk0_ctrl,
636 },
637 .sources = &clkset_spi,
638 .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 8, .size = 4, },
639 .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 8, .size = 2, },
640 }, {
641 .clk = {
642 .name = "spi_bus",
643 .id = 2,
644 .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2,
645 .enable = s5pc100_sclk0_ctrl,
646 },
647 .sources = &clkset_spi,
648 .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 12, .size = 4, },
649 .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 12, .size = 2, },
650 }, {
651 .clk = {
652 .name = "uclk1",
653 .id = -1,
654 .ctrlbit = S5PC100_CLKGATE_SCLK0_UART,
655 .enable = s5pc100_sclk0_ctrl,
656 },
657 .sources = &clkset_uart,
658 .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 0, .size = 3, },
659 .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 0, .size = 1, },
660 }, {
661 .clk = {
662 .name = "spdif",
663 .id = -1,
664 },
665 .sources = &clkset_spdif,
666 .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 24, .size = 2, },
667 }, {
668 .clk = {
669 .name = "lcd",
670 .id = -1,
671 .ctrlbit = S5PC100_CLKGATE_SCLK1_LCD,
672 .enable = s5pc100_sclk1_ctrl,
673 },
674 .sources = &clkset_lcd_fimc,
675 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 12, .size = 4, },
676 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 12, .size = 2, },
677 }, {
678 .clk = {
679 .name = "fimc",
680 .id = 0,
681 .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC0,
682 .enable = s5pc100_sclk1_ctrl,
683 },
684 .sources = &clkset_lcd_fimc,
685 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 16, .size = 4, },
686 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 16, .size = 2, },
687 }, {
688 .clk = {
689 .name = "fimc",
690 .id = 1,
691 .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC1,
692 .enable = s5pc100_sclk1_ctrl,
693 },
694 .sources = &clkset_lcd_fimc,
695 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 20, .size = 4, },
696 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 20, .size = 2, },
697 }, {
698 .clk = {
699 .name = "fimc",
700 .id = 2,
701 .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC2,
702 .enable = s5pc100_sclk1_ctrl,
703 },
704 .sources = &clkset_lcd_fimc,
705 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 24, .size = 4, },
706 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 24, .size = 2, },
707 }, {
708 .clk = {
709 .name = "mmc_bus",
710 .id = 0,
711 .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0,
712 .enable = s5pc100_sclk0_ctrl,
713 },
714 .sources = &clkset_mmc,
715 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 0, .size = 4, },
716 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 0, .size = 2, },
717 }, {
718 .clk = {
719 .name = "mmc_bus",
720 .id = 1,
721 .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1,
722 .enable = s5pc100_sclk0_ctrl,
723 },
724 .sources = &clkset_mmc,
725 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 4, .size = 4, },
726 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 4, .size = 2, },
727 }, {
728 .clk = {
729 .name = "mmc_bus",
730 .id = 2,
731 .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2,
732 .enable = s5pc100_sclk0_ctrl,
733 },
734 .sources = &clkset_mmc,
735 .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 8, .size = 4, },
736 .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 8, .size = 2, },
737 }, {
738 .clk = {
739 .name = "usbhost",
740 .id = -1,
741 .ctrlbit = S5PC100_CLKGATE_SCLK0_USBHOST,
742 .enable = s5pc100_sclk0_ctrl,
743 },
744 .sources = &clkset_usbhost,
745 .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 20, .size = 4, },
746 .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 20, .size = 2, },
747 }
973}; 748};
974 749
975/* Clock initialisation code */ 750/* Clock initialisation code */
@@ -981,45 +756,8 @@ static struct clksrc_clk *init_parents[] = {
981 &clk_mout_onenand, 756 &clk_mout_onenand,
982 &clk_mout_epll, 757 &clk_mout_epll,
983 &clk_mout_hpll, 758 &clk_mout_hpll,
984 &clk_spi0,
985 &clk_spi1,
986 &clk_spi2,
987 &clk_uart_uclk1,
988 &clk_audio0,
989 &clk_audio1,
990 &clk_audio2,
991 &clk_spdif,
992 &clk_lcd,
993 &clk_fimc0,
994 &clk_fimc1,
995 &clk_fimc2,
996 &clk_mmc0,
997 &clk_mmc1,
998 &clk_mmc2,
999 &clk_usbhost,
1000}; 759};
1001 760
1002static void __init_or_cpufreq s5pc100_set_clksrc(struct clksrc_clk *clk)
1003{
1004 struct clk_sources *srcs = clk->sources;
1005 u32 clksrc = __raw_readl(clk->reg_source);
1006
1007 clksrc &= clk->mask;
1008 clksrc >>= clk->shift;
1009
1010 if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
1011 printk(KERN_ERR "%s: bad source %d\n",
1012 clk->clk.name, clksrc);
1013 return;
1014 }
1015
1016 clk->clk.parent = srcs->sources[clksrc];
1017
1018 printk(KERN_INFO "%s: source is %s (%d), rate is %ld.%03ld MHz\n",
1019 clk->clk.name, clk->clk.parent->name, clksrc,
1020 print_mhz(clk_get_rate(&clk->clk)));
1021}
1022
1023#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) 761#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
1024 762
1025void __init_or_cpufreq s5pc100_setup_clocks(void) 763void __init_or_cpufreq s5pc100_setup_clocks(void)
@@ -1083,17 +821,25 @@ void __init_or_cpufreq s5pc100_setup_clocks(void)
1083 clk_f.rate = armclk; 821 clk_f.rate = armclk;
1084 822
1085 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) 823 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
1086 s5pc100_set_clksrc(init_parents[ptr]); 824 s3c_set_clksrc(init_parents[ptr], true);
825
826 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_audio); ptr++)
827 s3c_set_clksrc(clksrc_audio + ptr, true);
828
829 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
830 s3c_set_clksrc(clksrc_clks + ptr, true);
1087} 831}
1088 832
1089static struct clk *clks[] __initdata = { 833static struct clk *clks[] __initdata = {
1090 &clk_ext_xtal_mux, 834 &clk_ext_xtal_mux,
1091 &clk_mout_apll.clk,
1092 &clk_dout_apll, 835 &clk_dout_apll,
1093 &clk_dout_d0_bus, 836 &clk_dout_d0_bus,
1094 &clk_dout_pclkd0, 837 &clk_dout_pclkd0,
1095 &clk_dout_apll2, 838 &clk_dout_apll2,
839 &clk_mout_apll.clk,
1096 &clk_mout_mpll.clk, 840 &clk_mout_mpll.clk,
841 &clk_mout_epll.clk,
842 &clk_mout_hpll.clk,
1097 &clk_mout_am.clk, 843 &clk_mout_am.clk,
1098 &clk_dout_d1_bus, 844 &clk_dout_d1_bus,
1099 &clk_mout_onenand.clk, 845 &clk_mout_onenand.clk,
@@ -1101,29 +847,12 @@ static struct clk *clks[] __initdata = {
1101 &clk_dout_mpll2, 847 &clk_dout_mpll2,
1102 &clk_dout_cam, 848 &clk_dout_cam,
1103 &clk_dout_mpll, 849 &clk_dout_mpll,
1104 &clk_mout_epll.clk,
1105 &clk_fout_epll, 850 &clk_fout_epll,
1106 &clk_iis_cd0, 851 &clk_iis_cd0,
1107 &clk_iis_cd1, 852 &clk_iis_cd1,
1108 &clk_iis_cd2, 853 &clk_iis_cd2,
1109 &clk_pcm_cd0, 854 &clk_pcm_cd0,
1110 &clk_pcm_cd1, 855 &clk_pcm_cd1,
1111 &clk_spi0.clk,
1112 &clk_spi1.clk,
1113 &clk_spi2.clk,
1114 &clk_uart_uclk1.clk,
1115 &clk_audio0.clk,
1116 &clk_audio1.clk,
1117 &clk_audio2.clk,
1118 &clk_spdif.clk,
1119 &clk_lcd.clk,
1120 &clk_fimc0.clk,
1121 &clk_fimc1.clk,
1122 &clk_fimc2.clk,
1123 &clk_mmc0.clk,
1124 &clk_mmc1.clk,
1125 &clk_mmc2.clk,
1126 &clk_usbhost.clk,
1127 &clk_arm, 856 &clk_arm,
1128}; 857};
1129 858
@@ -1141,4 +870,7 @@ void __init s5pc100_register_clocks(void)
1141 clkp->name, ret); 870 clkp->name, ret);
1142 } 871 }
1143 } 872 }
873
874 s3c_register_clksrc(clksrc_audio, ARRAY_SIZE(clksrc_audio));
875 s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks));
1144} 876}
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 486a0d6301e7..d552c65fa1b0 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -7,11 +7,240 @@
7config PLAT_SAMSUNG 7config PLAT_SAMSUNG
8 bool 8 bool
9 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX 9 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX
10 select NO_IOPORT
10 default y 11 default y
11 help 12 help
12 Base platform code for all Samsung SoC based systems 13 Base platform code for all Samsung SoC based systems
13 14
14if PLAT_SAMSUNG 15if PLAT_SAMSUNG
15 16
17# boot configurations
18
19comment "Boot options"
20
21config S3C_BOOT_WATCHDOG
22 bool "S3C Initialisation watchdog"
23 depends on S3C2410_WATCHDOG
24 help
25 Say y to enable the watchdog during the kernel decompression
26 stage. If the kernel fails to uncompress, then the watchdog
27 will trigger a reset and the system should restart.
28
29config S3C_BOOT_ERROR_RESET
30 bool "S3C Reboot on decompression error"
31 help
32 Say y here to use the watchdog to reset the system if the
33 kernel decompressor detects an error during decompression.
34
35config S3C_BOOT_UART_FORCE_FIFO
36 bool "Force UART FIFO on during boot process"
37 default y
38 help
39 Say Y here to force the UART FIFOs on during the kernel
40 uncompressor
41
42
43config S3C_LOWLEVEL_UART_PORT
44 int "S3C UART to use for low-level messages"
45 default 0
46 help
47 Choice of which UART port to use for the low-level messages,
48 such as the `Uncompressing...` at start time. The value of
49 this configuration should be between zero and two. The port
50 must have been initialised by the boot-loader before use.
51
52# clock options
53
54config SAMSUNG_CLKSRC
55 bool
56 help
57 Select the clock code for the clksrc implementation
58 used by newer systems such as the S3C64XX.
59
60# options for IRQ support
61
62config SAMSUNG_IRQ_VIC_TIMER
63 bool
64 help
65 Internal configuration to build the VIC timer interrupt code.
66
67config SAMSUNG_IRQ_UART
68 bool
69 help
70 Internal configuration to build the IRQ UART demux code.
71
72# options for gpio configuration support
73
74config SAMSUNG_GPIOLIB_4BIT
75 bool
76 help
77 GPIOlib file contains the 4 bit modification functions for gpio
78 configuration. GPIOlib shall be compiled only for S3C64XX and S5P
79 series of processors.
80
81config S3C_GPIO_CFG_S3C24XX
82 bool
83 help
84 Internal configuration to enable S3C24XX style GPIO configuration
85 functions.
86
87config S3C_GPIO_CFG_S3C64XX
88 bool
89 help
90 Internal configuration to enable S3C64XX style GPIO configuration
91 functions.
92
93config S5P_GPIO_CFG_S5PC1XX
94 bool
95 help
96 Internal configuration to enable S5PC1XX style GPIO configuration
97 functions.
98
99config S3C_GPIO_PULL_UPDOWN
100 bool
101 help
102 Internal configuration to enable the correct GPIO pull helper
103
104config S3C_GPIO_PULL_DOWN
105 bool
106 help
107 Internal configuration to enable the correct GPIO pull helper
108
109config S3C_GPIO_PULL_UP
110 bool
111 help
112 Internal configuration to enable the correct GPIO pull helper
113
114config SAMSUNG_GPIO_EXTRA
115 int "Number of additional GPIO pins"
116 default 0
117 help
118 Use additional GPIO space in addition to the GPIO's the SOC
119 provides. This allows expanding the GPIO space for use with
120 GPIO expanders.
121
122config S3C_GPIO_SPACE
123 int "Space between gpio banks"
124 default 0
125 help
126 Add a number of spare GPIO entries between each bank for debugging
127 purposes. This allows any problems where an counter overflows from
128 one bank to another to be caught, at the expense of using a little
129 more memory.
130
131config S3C_GPIO_TRACK
132 bool
133 help
134 Internal configuration option to enable the s3c specific gpio
135 chip tracking if the platform requires it.
136
137# ADC driver
138
139config S3C_ADC
140 bool "ADC common driver support"
141 help
142 Core support for the ADC block found in the Samsung SoC systems
143 for drivers such as the touchscreen and hwmon to use to share
144 this resource.
145
146# device definitions to compile in
147
148config S3C_DEV_HSMMC
149 bool
150 help
151 Compile in platform device definitions for HSMMC code
152
153config S3C_DEV_HSMMC1
154 bool
155 help
156 Compile in platform device definitions for HSMMC channel 1
157
158config S3C_DEV_HSMMC2
159 bool
160 help
161 Compile in platform device definitions for HSMMC channel 2
162
163config S3C_DEV_I2C1
164 bool
165 help
166 Compile in platform device definitions for I2C channel 1
167
168config S3C_DEV_FB
169 bool
170 help
171 Compile in platform device definition for framebuffer
172
173config S3C_DEV_USB_HOST
174 bool
175 help
176 Compile in platform device definition for USB host.
177
178config S3C_DEV_USB_HSOTG
179 bool
180 help
181 Compile in platform device definition for USB high-speed OtG
182
183config S3C_DEV_NAND
184 bool
185 help
186 Compile in platform device definition for NAND controller
187
188config S3C64XX_DEV_SPI
189 bool
190 help
191 Compile in platform device definitions for S3C64XX's type
192 SPI controllers.
193
194# DMA
195
196config S3C_DMA
197 bool
198 help
199 Internal configuration for S3C DMA core
200
201comment "Power management"
202
203config SAMSUNG_PM_DEBUG
204 bool "S3C2410 PM Suspend debug"
205 depends on PM
206 help
207 Say Y here if you want verbose debugging from the PM Suspend and
208 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
209 for more information.
210
211config S3C_PM_DEBUG_LED_SMDK
212 bool "SMDK LED suspend/resume debugging"
213 depends on PM && (MACH_SMDK6410)
214 help
215 Say Y here to enable the use of the SMDK LEDs on the baseboard
216 for debugging of the state of the suspend and resume process.
217
218 Note, this currently only works for S3C64XX based SMDK boards.
219
220config SAMSUNG_PM_CHECK
221 bool "S3C2410 PM Suspend Memory CRC"
222 depends on PM && CRC32
223 help
224 Enable the PM code's memory area checksum over sleep. This option
225 will generate CRCs of all blocks of memory, and store them before
226 going to sleep. The blocks are then checked on resume for any
227 errors.
228
229 Note, this can take several seconds depending on memory size
230 and CPU speed.
231
232 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
233
234config SAMSUNG_PM_CHECK_CHUNKSIZE
235 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
236 depends on PM && SAMSUNG_PM_CHECK
237 default 64
238 help
239 Set the chunksize in Kilobytes of the CRC for checking memory
240 corruption over suspend and resume. A smaller value will mean that
241 the CRC data block will take more memory, but wil identify any
242 faults with better precision.
243
244 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
16 245
17endif 246endif
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 4478b9f7dc34..22c89d08f6e5 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -9,3 +9,48 @@ obj-m :=
9obj-n := dummy.o 9obj-n := dummy.o
10obj- := 10obj- :=
11 11
12# Objects we always build independent of SoC choice
13
14obj-y += init.o
15obj-y += time.o
16obj-y += clock.o
17obj-y += pwm-clock.o
18obj-y += gpio.o
19obj-y += gpio-config.o
20
21obj-$(CONFIG_SAMSUNG_GPIOLIB_4BIT) += gpiolib.o
22obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
23
24obj-$(CONFIG_SAMSUNG_IRQ_UART) += irq-uart.o
25obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
26
27# ADC
28
29obj-$(CONFIG_S3C_ADC) += adc.o
30
31# devices
32
33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
36obj-y += dev-i2c0.o
37obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
38obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
39obj-y += dev-uart.o
40obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
41obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
42obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
43
44# DMA support
45
46obj-$(CONFIG_S3C_DMA) += dma.o
47
48# PM support
49
50obj-$(CONFIG_PM) += pm.o
51obj-$(CONFIG_PM) += pm-gpio.o
52obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
53
54# PWM support
55
56obj-$(CONFIG_HAVE_PWM) += pwm.o
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-samsung/adc.c
index ce47627f3368..0b5833b9ac5b 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -1,10 +1,10 @@
1/* arch/arm/plat-s3c24xx/adc.c 1/* arch/arm/plat-samsung/adc.c
2 * 2 *
3 * Copyright (c) 2008 Simtec Electronics 3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> 5 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
6 * 6 *
7 * S3C24XX ADC device core 7 * Samsung ADC device core
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -37,6 +37,11 @@
37 * action is required. 37 * action is required.
38 */ 38 */
39 39
40enum s3c_cpu_type {
41 TYPE_S3C24XX,
42 TYPE_S3C64XX
43};
44
40struct s3c_adc_client { 45struct s3c_adc_client {
41 struct platform_device *pdev; 46 struct platform_device *pdev;
42 struct list_head pend; 47 struct list_head pend;
@@ -257,12 +262,13 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
257{ 262{
258 struct adc_device *adc = pw; 263 struct adc_device *adc = pw;
259 struct s3c_adc_client *client = adc->cur; 264 struct s3c_adc_client *client = adc->cur;
265 enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
260 unsigned long flags; 266 unsigned long flags;
261 unsigned data0, data1; 267 unsigned data0, data1;
262 268
263 if (!client) { 269 if (!client) {
264 dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__); 270 dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
265 return IRQ_HANDLED; 271 goto exit;
266 } 272 }
267 273
268 data0 = readl(adc->regs + S3C2410_ADCDAT0); 274 data0 = readl(adc->regs + S3C2410_ADCDAT0);
@@ -271,9 +277,17 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
271 277
272 client->nr_samples--; 278 client->nr_samples--;
273 279
280 if (cpu == TYPE_S3C64XX) {
281 /* S3C64XX ADC resolution is 12-bit */
282 data0 &= 0xfff;
283 data1 &= 0xfff;
284 } else {
285 data0 &= 0x3ff;
286 data1 &= 0x3ff;
287 }
288
274 if (client->convert_cb) 289 if (client->convert_cb)
275 (client->convert_cb)(client, data0 & 0x3ff, data1 & 0x3ff, 290 (client->convert_cb)(client, data0, data1, &client->nr_samples);
276 &client->nr_samples);
277 291
278 if (client->nr_samples > 0) { 292 if (client->nr_samples > 0) {
279 /* fire another conversion for this */ 293 /* fire another conversion for this */
@@ -289,6 +303,11 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
289 local_irq_restore(flags); 303 local_irq_restore(flags);
290 } 304 }
291 305
306exit:
307 if (cpu == TYPE_S3C64XX) {
308 /* Clear ADC interrupt */
309 writel(0, adc->regs + S3C64XX_ADCCLRINT);
310 }
292 return IRQ_HANDLED; 311 return IRQ_HANDLED;
293} 312}
294 313
@@ -298,6 +317,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
298 struct adc_device *adc; 317 struct adc_device *adc;
299 struct resource *regs; 318 struct resource *regs;
300 int ret; 319 int ret;
320 unsigned tmp;
301 321
302 adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL); 322 adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
303 if (adc == NULL) { 323 if (adc == NULL) {
@@ -344,8 +364,12 @@ static int s3c_adc_probe(struct platform_device *pdev)
344 364
345 clk_enable(adc->clk); 365 clk_enable(adc->clk);
346 366
347 writel(adc->prescale | S3C2410_ADCCON_PRSCEN, 367 tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
348 adc->regs + S3C2410_ADCCON); 368 if (platform_get_device_id(pdev)->driver_data == TYPE_S3C64XX) {
369 /* Enable 12-bit ADC resolution */
370 tmp |= S3C64XX_ADCCON_RESSEL;
371 }
372 writel(tmp, adc->regs + S3C2410_ADCCON);
349 373
350 dev_info(dev, "attached adc driver\n"); 374 dev_info(dev, "attached adc driver\n");
351 375
@@ -388,6 +412,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
388 con |= S3C2410_ADCCON_STDBM; 412 con |= S3C2410_ADCCON_STDBM;
389 writel(con, adc->regs + S3C2410_ADCCON); 413 writel(con, adc->regs + S3C2410_ADCCON);
390 414
415 disable_irq(adc->irq);
391 clk_disable(adc->clk); 416 clk_disable(adc->clk);
392 417
393 return 0; 418 return 0;
@@ -398,6 +423,7 @@ static int s3c_adc_resume(struct platform_device *pdev)
398 struct adc_device *adc = platform_get_drvdata(pdev); 423 struct adc_device *adc = platform_get_drvdata(pdev);
399 424
400 clk_enable(adc->clk); 425 clk_enable(adc->clk);
426 enable_irq(adc->irq);
401 427
402 writel(adc->prescale | S3C2410_ADCCON_PRSCEN, 428 writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
403 adc->regs + S3C2410_ADCCON); 429 adc->regs + S3C2410_ADCCON);
@@ -410,9 +436,22 @@ static int s3c_adc_resume(struct platform_device *pdev)
410#define s3c_adc_resume NULL 436#define s3c_adc_resume NULL
411#endif 437#endif
412 438
439static struct platform_device_id s3c_adc_driver_ids[] = {
440 {
441 .name = "s3c24xx-adc",
442 .driver_data = TYPE_S3C24XX,
443 }, {
444 .name = "s3c64xx-adc",
445 .driver_data = TYPE_S3C64XX,
446 },
447 { }
448};
449MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);
450
413static struct platform_driver s3c_adc_driver = { 451static struct platform_driver s3c_adc_driver = {
452 .id_table = s3c_adc_driver_ids,
414 .driver = { 453 .driver = {
415 .name = "s3c24xx-adc", 454 .name = "s3c-adc",
416 .owner = THIS_MODULE, 455 .owner = THIS_MODULE,
417 }, 456 },
418 .probe = s3c_adc_probe, 457 .probe = s3c_adc_probe,
diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c
new file mode 100644
index 000000000000..ae8b8507663f
--- /dev/null
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -0,0 +1,212 @@
1/* linux/arch/arm/plat-samsung/clock-clksrc.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/sysdev.h>
20#include <linux/io.h>
21
22#include <plat/clock.h>
23#include <plat/clock-clksrc.h>
24#include <plat/cpu-freq.h>
25
26static inline struct clksrc_clk *to_clksrc(struct clk *clk)
27{
28 return container_of(clk, struct clksrc_clk, clk);
29}
30
31static inline u32 bit_mask(u32 shift, u32 nr_bits)
32{
33 u32 mask = 0xffffffff >> (32 - nr_bits);
34
35 return mask << shift;
36}
37
38static unsigned long s3c_getrate_clksrc(struct clk *clk)
39{
40 struct clksrc_clk *sclk = to_clksrc(clk);
41 unsigned long rate = clk_get_rate(clk->parent);
42 u32 clkdiv = __raw_readl(sclk->reg_div.reg);
43 u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size);
44
45 clkdiv &= mask;
46 clkdiv >>= sclk->reg_div.shift;
47 clkdiv++;
48
49 rate /= clkdiv;
50 return rate;
51}
52
53static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate)
54{
55 struct clksrc_clk *sclk = to_clksrc(clk);
56 void __iomem *reg = sclk->reg_div.reg;
57 unsigned int div;
58 u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size);
59 u32 val;
60
61 rate = clk_round_rate(clk, rate);
62 div = clk_get_rate(clk->parent) / rate;
63 if (div > (1 << sclk->reg_div.size))
64 return -EINVAL;
65
66 val = __raw_readl(reg);
67 val &= ~mask;
68 val |= (div - 1) << sclk->reg_div.shift;
69 __raw_writel(val, reg);
70
71 return 0;
72}
73
74static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent)
75{
76 struct clksrc_clk *sclk = to_clksrc(clk);
77 struct clksrc_sources *srcs = sclk->sources;
78 u32 clksrc = __raw_readl(sclk->reg_src.reg);
79 u32 mask = bit_mask(sclk->reg_src.shift, sclk->reg_src.size);
80 int src_nr = -1;
81 int ptr;
82
83 for (ptr = 0; ptr < srcs->nr_sources; ptr++)
84 if (srcs->sources[ptr] == parent) {
85 src_nr = ptr;
86 break;
87 }
88
89 if (src_nr >= 0) {
90 clk->parent = parent;
91
92 clksrc &= ~mask;
93 clksrc |= src_nr << sclk->reg_src.shift;
94
95 __raw_writel(clksrc, sclk->reg_src.reg);
96 return 0;
97 }
98
99 return -EINVAL;
100}
101
102static unsigned long s3c_roundrate_clksrc(struct clk *clk,
103 unsigned long rate)
104{
105 struct clksrc_clk *sclk = to_clksrc(clk);
106 unsigned long parent_rate = clk_get_rate(clk->parent);
107 int max_div = 1 << sclk->reg_div.size;
108 int div;
109
110 if (rate >= parent_rate)
111 rate = parent_rate;
112 else {
113 div = parent_rate / rate;
114 if (parent_rate % rate)
115 div++;
116
117 if (div == 0)
118 div = 1;
119 if (div > max_div)
120 div = max_div;
121
122 rate = parent_rate / div;
123 }
124
125 return rate;
126}
127
128/* Clock initialisation code */
129
130void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce)
131{
132 struct clksrc_sources *srcs = clk->sources;
133 u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size);
134 u32 clksrc;
135
136 if (!clk->reg_src.reg) {
137 if (!clk->clk.parent)
138 printk(KERN_ERR "%s: no parent clock specified\n",
139 clk->clk.name);
140 return;
141 }
142
143 clksrc = __raw_readl(clk->reg_src.reg);
144 clksrc &= mask;
145 clksrc >>= clk->reg_src.shift;
146
147 if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
148 printk(KERN_ERR "%s: bad source %d\n",
149 clk->clk.name, clksrc);
150 return;
151 }
152
153 clk->clk.parent = srcs->sources[clksrc];
154
155 if (announce)
156 printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
157 clk->clk.name, clk->clk.parent->name, clksrc,
158 clk_get_rate(&clk->clk));
159}
160
161static struct clk_ops clksrc_ops = {
162 .set_parent = s3c_setparent_clksrc,
163 .get_rate = s3c_getrate_clksrc,
164 .set_rate = s3c_setrate_clksrc,
165 .round_rate = s3c_roundrate_clksrc,
166};
167
168static struct clk_ops clksrc_ops_nodiv = {
169 .set_parent = s3c_setparent_clksrc,
170};
171
172static struct clk_ops clksrc_ops_nosrc = {
173 .get_rate = s3c_getrate_clksrc,
174 .set_rate = s3c_setrate_clksrc,
175 .round_rate = s3c_roundrate_clksrc,
176};
177
178void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size)
179{
180 int ret;
181
182 for (; size > 0; size--, clksrc++) {
183 if (!clksrc->reg_div.reg && !clksrc->reg_src.reg)
184 printk(KERN_ERR "%s: clock %s has no registers set\n",
185 __func__, clksrc->clk.name);
186
187 /* fill in the default functions */
188
189 if (!clksrc->clk.ops) {
190 if (!clksrc->reg_div.reg)
191 clksrc->clk.ops = &clksrc_ops_nodiv;
192 else if (!clksrc->reg_src.reg)
193 clksrc->clk.ops = &clksrc_ops_nosrc;
194 else
195 clksrc->clk.ops = &clksrc_ops;
196 }
197
198 /* setup the clocksource, but do not announce it
199 * as it may be re-set by the setup routines
200 * called after the rest of the clocks have been
201 * registered
202 */
203 s3c_set_clksrc(clksrc, false);
204
205 ret = s3c24xx_register_clock(&clksrc->clk);
206
207 if (ret < 0) {
208 printk(KERN_ERR "%s: failed to register %s (%d)\n",
209 __func__, clksrc->clk.name, ret);
210 }
211 }
212}
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-samsung/clock.c
index 619cfa82dcab..1b25c9d8c403 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -150,8 +150,8 @@ unsigned long clk_get_rate(struct clk *clk)
150 if (clk->rate != 0) 150 if (clk->rate != 0)
151 return clk->rate; 151 return clk->rate;
152 152
153 if (clk->get_rate != NULL) 153 if (clk->ops != NULL && clk->ops->get_rate != NULL)
154 return (clk->get_rate)(clk); 154 return (clk->ops->get_rate)(clk);
155 155
156 if (clk->parent != NULL) 156 if (clk->parent != NULL)
157 return clk_get_rate(clk->parent); 157 return clk_get_rate(clk->parent);
@@ -161,8 +161,8 @@ unsigned long clk_get_rate(struct clk *clk)
161 161
162long clk_round_rate(struct clk *clk, unsigned long rate) 162long clk_round_rate(struct clk *clk, unsigned long rate)
163{ 163{
164 if (!IS_ERR(clk) && clk->round_rate) 164 if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
165 return (clk->round_rate)(clk, rate); 165 return (clk->ops->round_rate)(clk, rate);
166 166
167 return rate; 167 return rate;
168} 168}
@@ -178,13 +178,14 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
178 * the clock may have been made this way by choice. 178 * the clock may have been made this way by choice.
179 */ 179 */
180 180
181 WARN_ON(clk->set_rate == NULL); 181 WARN_ON(clk->ops == NULL);
182 WARN_ON(clk->ops && clk->ops->set_rate == NULL);
182 183
183 if (clk->set_rate == NULL) 184 if (clk->ops == NULL || clk->ops->set_rate == NULL)
184 return -EINVAL; 185 return -EINVAL;
185 186
186 spin_lock(&clocks_lock); 187 spin_lock(&clocks_lock);
187 ret = (clk->set_rate)(clk, rate); 188 ret = (clk->ops->set_rate)(clk, rate);
188 spin_unlock(&clocks_lock); 189 spin_unlock(&clocks_lock);
189 190
190 return ret; 191 return ret;
@@ -204,8 +205,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
204 205
205 spin_lock(&clocks_lock); 206 spin_lock(&clocks_lock);
206 207
207 if (clk->set_parent) 208 if (clk->ops && clk->ops->set_parent)
208 ret = (clk->set_parent)(clk, parent); 209 ret = (clk->ops->set_parent)(clk, parent);
209 210
210 spin_unlock(&clocks_lock); 211 spin_unlock(&clocks_lock);
211 212
@@ -224,12 +225,16 @@ EXPORT_SYMBOL(clk_set_parent);
224 225
225/* base clocks */ 226/* base clocks */
226 227
227static int clk_default_setrate(struct clk *clk, unsigned long rate) 228int clk_default_setrate(struct clk *clk, unsigned long rate)
228{ 229{
229 clk->rate = rate; 230 clk->rate = rate;
230 return 0; 231 return 0;
231} 232}
232 233
234struct clk_ops clk_ops_def_setrate = {
235 .set_rate = clk_default_setrate,
236};
237
233struct clk clk_xtal = { 238struct clk clk_xtal = {
234 .name = "xtal", 239 .name = "xtal",
235 .id = -1, 240 .id = -1,
@@ -251,7 +256,7 @@ struct clk clk_epll = {
251struct clk clk_mpll = { 256struct clk clk_mpll = {
252 .name = "mpll", 257 .name = "mpll",
253 .id = -1, 258 .id = -1,
254 .set_rate = clk_default_setrate, 259 .ops = &clk_ops_def_setrate,
255}; 260};
256 261
257struct clk clk_upll = { 262struct clk clk_upll = {
@@ -267,7 +272,6 @@ struct clk clk_f = {
267 .rate = 0, 272 .rate = 0,
268 .parent = &clk_mpll, 273 .parent = &clk_mpll,
269 .ctrlbit = 0, 274 .ctrlbit = 0,
270 .set_rate = clk_default_setrate,
271}; 275};
272 276
273struct clk clk_h = { 277struct clk clk_h = {
@@ -276,7 +280,7 @@ struct clk clk_h = {
276 .rate = 0, 280 .rate = 0,
277 .parent = NULL, 281 .parent = NULL,
278 .ctrlbit = 0, 282 .ctrlbit = 0,
279 .set_rate = clk_default_setrate, 283 .ops = &clk_ops_def_setrate,
280}; 284};
281 285
282struct clk clk_p = { 286struct clk clk_p = {
@@ -285,7 +289,7 @@ struct clk clk_p = {
285 .rate = 0, 289 .rate = 0,
286 .parent = NULL, 290 .parent = NULL,
287 .ctrlbit = 0, 291 .ctrlbit = 0,
288 .set_rate = clk_default_setrate, 292 .ops = &clk_ops_def_setrate,
289}; 293};
290 294
291struct clk clk_usb_bus = { 295struct clk clk_usb_bus = {
@@ -296,7 +300,6 @@ struct clk clk_usb_bus = {
296}; 300};
297 301
298 302
299
300struct clk s3c24xx_uclk = { 303struct clk s3c24xx_uclk = {
301 .name = "uclk", 304 .name = "uclk",
302 .id = -1, 305 .id = -1,
@@ -304,6 +307,12 @@ struct clk s3c24xx_uclk = {
304 307
305/* initialise the clock system */ 308/* initialise the clock system */
306 309
310/**
311 * s3c24xx_register_clock() - register a clock
312 * @clk: The clock to register
313 *
314 * Add the specified clock to the list of clocks known by the system.
315 */
307int s3c24xx_register_clock(struct clk *clk) 316int s3c24xx_register_clock(struct clk *clk)
308{ 317{
309 if (clk->enable == NULL) 318 if (clk->enable == NULL)
@@ -321,18 +330,52 @@ int s3c24xx_register_clock(struct clk *clk)
321 return 0; 330 return 0;
322} 331}
323 332
333/**
334 * s3c24xx_register_clocks() - register an array of clock pointers
335 * @clks: Pointer to an array of struct clk pointers
336 * @nr_clks: The number of clocks in the @clks array.
337 *
338 * Call s3c24xx_register_clock() for all the clock pointers contained
339 * in the @clks list. Returns the number of failures.
340 */
324int s3c24xx_register_clocks(struct clk **clks, int nr_clks) 341int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
325{ 342{
326 int fails = 0; 343 int fails = 0;
327 344
328 for (; nr_clks > 0; nr_clks--, clks++) { 345 for (; nr_clks > 0; nr_clks--, clks++) {
329 if (s3c24xx_register_clock(*clks) < 0) 346 if (s3c24xx_register_clock(*clks) < 0) {
347 struct clk *clk = *clks;
348 printk(KERN_ERR "%s: failed to register %p: %s\n",
349 __func__, clk, clk->name);
330 fails++; 350 fails++;
351 }
331 } 352 }
332 353
333 return fails; 354 return fails;
334} 355}
335 356
357/**
358 * s3c_register_clocks() - register an array of clocks
359 * @clkp: Pointer to the first clock in the array.
360 * @nr_clks: Number of clocks to register.
361 *
362 * Call s3c24xx_register_clock() on the @clkp array given, printing an
363 * error if it fails to register the clock (unlikely).
364 */
365void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
366{
367 int ret;
368
369 for (; nr_clks > 0; nr_clks--, clkp++) {
370 ret = s3c24xx_register_clock(clkp);
371
372 if (ret < 0) {
373 printk(KERN_ERR "Failed to register clock %s (%d)\n",
374 clkp->name, ret);
375 }
376 }
377}
378
336/* initalise all the clocks */ 379/* initalise all the clocks */
337 380
338int __init s3c24xx_register_baseclocks(unsigned long xtal) 381int __init s3c24xx_register_baseclocks(unsigned long xtal)
diff --git a/arch/arm/plat-s3c/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
index a90198fc4b0f..a90198fc4b0f 100644
--- a/arch/arm/plat-s3c/dev-fb.c
+++ b/arch/arm/plat-samsung/dev-fb.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index 4c05b39810e2..4c05b39810e2 100644
--- a/arch/arm/plat-s3c/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index e49bc4cd0ee6..e49bc4cd0ee6 100644
--- a/arch/arm/plat-s3c/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index 824580bc0e06..824580bc0e06 100644
--- a/arch/arm/plat-s3c/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-samsung/dev-i2c0.c
index 4c761529b949..4c761529b949 100644
--- a/arch/arm/plat-s3c/dev-i2c0.c
+++ b/arch/arm/plat-samsung/dev-i2c0.c
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-samsung/dev-i2c1.c
index d44f79110506..d44f79110506 100644
--- a/arch/arm/plat-s3c/dev-i2c1.c
+++ b/arch/arm/plat-samsung/dev-i2c1.c
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c
index a52fb6cf618f..a52fb6cf618f 100644
--- a/arch/arm/plat-s3c/dev-nand.c
+++ b/arch/arm/plat-samsung/dev-nand.c
diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c
new file mode 100644
index 000000000000..3776cd952450
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-uart.c
@@ -0,0 +1,44 @@
1/* linux/arch/arm/plat-samsung/dev-uart.c
2 * originally from arch/arm/plat-s3c24xx/devs.c
3 *x
4 * Copyright (c) 2004 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * Base S3C24XX platform device definitions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13*/
14
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17
18/* uart devices */
19
20static struct platform_device s3c24xx_uart_device0 = {
21 .id = 0,
22};
23
24static struct platform_device s3c24xx_uart_device1 = {
25 .id = 1,
26};
27
28static struct platform_device s3c24xx_uart_device2 = {
29 .id = 2,
30};
31
32static struct platform_device s3c24xx_uart_device3 = {
33 .id = 3,
34};
35
36struct platform_device *s3c24xx_uart_src[4] = {
37 &s3c24xx_uart_device0,
38 &s3c24xx_uart_device1,
39 &s3c24xx_uart_device2,
40 &s3c24xx_uart_device3,
41};
42
43struct platform_device *s3c24xx_uart_devs[4] = {
44};
diff --git a/arch/arm/plat-s3c/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c
index e2f604b51c86..33a844ab6917 100644
--- a/arch/arm/plat-s3c/dev-usb-hsotg.c
+++ b/arch/arm/plat-samsung/dev-usb-hsotg.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/string.h> 15#include <linux/string.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/dma-mapping.h>
17 18
18#include <mach/irqs.h> 19#include <mach/irqs.h>
19#include <mach/map.h> 20#include <mach/map.h>
@@ -33,9 +34,15 @@ static struct resource s3c_usb_hsotg_resources[] = {
33 }, 34 },
34}; 35};
35 36
37static u64 s3c_hsotg_dmamask = DMA_BIT_MASK(32);
38
36struct platform_device s3c_device_usb_hsotg = { 39struct platform_device s3c_device_usb_hsotg = {
37 .name = "s3c-hsotg", 40 .name = "s3c-hsotg",
38 .id = -1, 41 .id = -1,
39 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), 42 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
40 .resource = s3c_usb_hsotg_resources, 43 .resource = s3c_usb_hsotg_resources,
44 .dev = {
45 .dma_mask = &s3c_hsotg_dmamask,
46 .coherent_dma_mask = DMA_BIT_MASK(32),
47 },
41}; 48};
diff --git a/arch/arm/plat-s3c/dev-usb.c b/arch/arm/plat-samsung/dev-usb.c
index 2ee85abed6d9..88165657fa53 100644
--- a/arch/arm/plat-s3c/dev-usb.c
+++ b/arch/arm/plat-samsung/dev-usb.c
@@ -19,7 +19,7 @@
19#include <mach/map.h> 19#include <mach/map.h>
20 20
21#include <plat/devs.h> 21#include <plat/devs.h>
22 22#include <plat/usb-control.h>
23 23
24static struct resource s3c_usb_resource[] = { 24static struct resource s3c_usb_resource[] = {
25 [0] = { 25 [0] = {
@@ -36,7 +36,7 @@ static struct resource s3c_usb_resource[] = {
36 36
37static u64 s3c_device_usb_dmamask = 0xffffffffUL; 37static u64 s3c_device_usb_dmamask = 0xffffffffUL;
38 38
39struct platform_device s3c_device_usb = { 39struct platform_device s3c_device_ohci = {
40 .name = "s3c2410-ohci", 40 .name = "s3c2410-ohci",
41 .id = -1, 41 .id = -1,
42 .num_resources = ARRAY_SIZE(s3c_usb_resource), 42 .num_resources = ARRAY_SIZE(s3c_usb_resource),
@@ -47,4 +47,23 @@ struct platform_device s3c_device_usb = {
47 } 47 }
48}; 48};
49 49
50EXPORT_SYMBOL(s3c_device_usb); 50EXPORT_SYMBOL(s3c_device_ohci);
51
52/**
53 * s3c_ohci_set_platdata - initialise OHCI device platform data
54 * @info: The platform data.
55 *
56 * This call copies the @info passed in and sets the device .platform_data
57 * field to that copy. The @info is copied so that the original can be marked
58 * __initdata.
59 */
60void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
61{
62 struct s3c2410_hcd_info *npd;
63
64 npd = kmemdup(info, sizeof(struct s3c2410_hcd_info), GFP_KERNEL);
65 if (!npd)
66 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
67
68 s3c_device_ohci.dev.platform_data = npd;
69}
diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-samsung/dma.c
index a995850cd9d5..cb459dd95459 100644
--- a/arch/arm/plat-s3c/dma.c
+++ b/arch/arm/plat-samsung/dma.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c/dma.c 1/* linux/arch/arm/plat-samsung/dma.c
2 * 2 *
3 * Copyright (c) 2003-2009 Simtec Electronics 3 * Copyright (c) 2003-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -20,8 +20,6 @@ struct s3c2410_dma_buf;
20#include <mach/dma.h> 20#include <mach/dma.h>
21#include <mach/irqs.h> 21#include <mach/irqs.h>
22 22
23#include <plat/dma-plat.h>
24
25/* dma channel state information */ 23/* dma channel state information */
26struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; 24struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
27struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; 25struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX];
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 456969b6fa0d..44a84e896546 100644
--- a/arch/arm/plat-s3c/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -17,7 +17,7 @@
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <mach/gpio-core.h> 20#include <plat/gpio-core.h>
21#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
22#include <plat/gpio-cfg-helpers.h> 22#include <plat/gpio-cfg-helpers.h>
23 23
diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-samsung/gpio.c
index 5ff24e0f9f89..28d2ab8a08db 100644
--- a/arch/arm/plat-s3c/gpio.c
+++ b/arch/arm/plat-samsung/gpio.c
@@ -16,7 +16,7 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18 18
19#include <mach/gpio-core.h> 19#include <plat/gpio-core.h>
20 20
21#ifdef CONFIG_S3C_GPIO_TRACK 21#ifdef CONFIG_S3C_GPIO_TRACK
22struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; 22struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
diff --git a/arch/arm/plat-samsung/gpiolib.c b/arch/arm/plat-samsung/gpiolib.c
new file mode 100644
index 000000000000..8a8ba8bc1d96
--- /dev/null
+++ b/arch/arm/plat-samsung/gpiolib.c
@@ -0,0 +1,199 @@
1/* arch/arm/plat-samsung/gpiolib.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
9 * http://www.samsung.com/
10 *
11 * SAMSUNG - GPIOlib support
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/kernel.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21#include <mach/gpio.h>
22#include <plat/gpio-core.h>
23#include <plat/gpio-cfg.h>
24#include <plat/gpio-cfg-helpers.h>
25
26#ifndef DEBUG_GPIO
27#define gpio_dbg(x...) do { } while (0)
28#else
29#define gpio_dbg(x...) printk(KERN_DEBUG x)
30#endif
31
32/* The samsung_gpiolib_4bit routines are to control the gpio banks where
33 * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
34 * following example:
35 *
36 * base + 0x00: Control register, 4 bits per gpio
37 * gpio n: 4 bits starting at (4*n)
38 * 0000 = input, 0001 = output, others mean special-function
39 * base + 0x04: Data register, 1 bit per gpio
40 * bit n: data bit n
41 *
42 * Note, since the data register is one bit per gpio and is at base + 0x4
43 * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
44 * the output.
45*/
46
47static int samsung_gpiolib_4bit_input(struct gpio_chip *chip,
48 unsigned int offset)
49{
50 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
51 void __iomem *base = ourchip->base;
52 unsigned long con;
53
54 con = __raw_readl(base + GPIOCON_OFF);
55 con &= ~(0xf << con_4bit_shift(offset));
56 __raw_writel(con, base + GPIOCON_OFF);
57
58 gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
59
60 return 0;
61}
62
63static int samsung_gpiolib_4bit_output(struct gpio_chip *chip,
64 unsigned int offset, int value)
65{
66 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
67 void __iomem *base = ourchip->base;
68 unsigned long con;
69 unsigned long dat;
70
71 con = __raw_readl(base + GPIOCON_OFF);
72 con &= ~(0xf << con_4bit_shift(offset));
73 con |= 0x1 << con_4bit_shift(offset);
74
75 dat = __raw_readl(base + GPIODAT_OFF);
76
77 if (value)
78 dat |= 1 << offset;
79 else
80 dat &= ~(1 << offset);
81
82 __raw_writel(dat, base + GPIODAT_OFF);
83 __raw_writel(con, base + GPIOCON_OFF);
84 __raw_writel(dat, base + GPIODAT_OFF);
85
86 gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
87
88 return 0;
89}
90
91/* The next set of routines are for the case where the GPIO configuration
92 * registers are 4 bits per GPIO but there is more than one register (the
93 * bank has more than 8 GPIOs.
94 *
95 * This case is the similar to the 4 bit case, but the registers are as
96 * follows:
97 *
98 * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
99 * gpio n: 4 bits starting at (4*n)
100 * 0000 = input, 0001 = output, others mean special-function
101 * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
102 * gpio n: 4 bits starting at (4*n)
103 * 0000 = input, 0001 = output, others mean special-function
104 * base + 0x08: Data register, 1 bit per gpio
105 * bit n: data bit n
106 *
107 * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
108 * store the 'base + 0x4' address so that these routines see the data
109 * register at ourchip->base + 0x04.
110 */
111
112static int samsung_gpiolib_4bit2_input(struct gpio_chip *chip,
113 unsigned int offset)
114{
115 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
116 void __iomem *base = ourchip->base;
117 void __iomem *regcon = base;
118 unsigned long con;
119
120 if (offset > 7)
121 offset -= 8;
122 else
123 regcon -= 4;
124
125 con = __raw_readl(regcon);
126 con &= ~(0xf << con_4bit_shift(offset));
127 __raw_writel(con, regcon);
128
129 gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
130
131 return 0;
132}
133
134static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip,
135 unsigned int offset, int value)
136{
137 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
138 void __iomem *base = ourchip->base;
139 void __iomem *regcon = base;
140 unsigned long con;
141 unsigned long dat;
142 unsigned con_offset = offset;
143
144 if (con_offset > 7)
145 con_offset -= 8;
146 else
147 regcon -= 4;
148
149 con = __raw_readl(regcon);
150 con &= ~(0xf << con_4bit_shift(con_offset));
151 con |= 0x1 << con_4bit_shift(con_offset);
152
153 dat = __raw_readl(base + GPIODAT_OFF);
154
155 if (value)
156 dat |= 1 << offset;
157 else
158 dat &= ~(1 << offset);
159
160 __raw_writel(dat, base + GPIODAT_OFF);
161 __raw_writel(con, regcon);
162 __raw_writel(dat, base + GPIODAT_OFF);
163
164 gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
165
166 return 0;
167}
168
169void __init samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
170{
171 chip->chip.direction_input = samsung_gpiolib_4bit_input;
172 chip->chip.direction_output = samsung_gpiolib_4bit_output;
173 chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
174}
175
176void __init samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
177{
178 chip->chip.direction_input = samsung_gpiolib_4bit2_input;
179 chip->chip.direction_output = samsung_gpiolib_4bit2_output;
180 chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
181}
182
183void __init samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
184 int nr_chips)
185{
186 for (; nr_chips > 0; nr_chips--, chip++) {
187 samsung_gpiolib_add_4bit(chip);
188 s3c_gpiolib_add(chip);
189 }
190}
191
192void __init samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
193 int nr_chips)
194{
195 for (; nr_chips > 0; nr_chips--, chip++) {
196 samsung_gpiolib_add_4bit2(chip);
197 s3c_gpiolib_add(chip);
198 }
199}
diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-samsung/include/plat/adc.h
index 5f3b1cd53b90..e8382c7be10b 100644
--- a/arch/arm/plat-s3c/include/plat/adc.h
+++ b/arch/arm/plat-samsung/include/plat/adc.h
@@ -1,10 +1,10 @@
1/* arch/arm/plat-s3c/include/plat/adc.h 1/* arch/arm/plat-samsung/include/plat/adc.h
2 * 2 *
3 * Copyright (c) 2008 Simtec Electronics 3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simnte.co.uk/ 4 * http://armlinux.simnte.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * S3C24XX ADC driver information 7 * S3C ADC driver information
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/audio.h b/arch/arm/plat-samsung/include/plat/audio.h
index f22d23bb6271..e32f9edfd4b7 100644
--- a/arch/arm/plat-s3c/include/plat/audio.h
+++ b/arch/arm/plat-samsung/include/plat/audio.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/audio.h 1/* arch/arm/plat-samsung/include/plat/audio.h
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co. Ltd 3 * Copyright (c) 2009 Samsung Electronics Co. Ltd
4 * Author: Jaswinder Singh <jassi.brar@samsung.com> 4 * Author: Jaswinder Singh <jassi.brar@samsung.com>
@@ -8,6 +8,14 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11/* The machine init code calls s3c*_ac97_setup_gpio with
12 * one of these defines in order to select appropriate bank
13 * of GPIO for AC97 pins
14 */
15#define S3C64XX_AC97_GPD 0
16#define S3C64XX_AC97_GPE 1
17extern void s3c64xx_ac97_setup_gpio(int);
18
11/** 19/**
12 * struct s3c_audio_pdata - common platform data for audio device drivers 20 * struct s3c_audio_pdata - common platform data for audio device drivers
13 * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode 21 * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
new file mode 100644
index 000000000000..50a8ca7c3760
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
@@ -0,0 +1,83 @@
1/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h
2 *
3 * Parts taken from arch/arm/plat-s3c64xx/clock.c
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * Copyright 2009 Ben Dooks <ben-linux@fluff.org>
10 * Copyright 2009 Harald Welte
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17/**
18 * struct clksrc_sources - list of sources for a given clock
19 * @sources: array of pointers to clocks
20 * @nr_sources: The size of @sources
21 */
22struct clksrc_sources {
23 unsigned int nr_sources;
24 struct clk **sources;
25};
26
27/**
28 * struct clksrc_reg - register definition for clock control bits
29 * @reg: pointer to the register in virtual memory.
30 * @shift: the shift in bits to where the bitfield is.
31 * @size: the size in bits of the bitfield.
32 *
33 * This specifies the size and position of the bits we are interested
34 * in within the register specified by @reg.
35 */
36struct clksrc_reg {
37 void __iomem *reg;
38 unsigned short shift;
39 unsigned short size;
40};
41
42/**
43 * struct clksrc_clk - class of clock for newer style samsung devices.
44 * @clk: the standard clock representation
45 * @sources: the sources for this clock
46 * @reg_src: the register definition for selecting the clock's source
47 * @reg_div: the register definition for the clock's output divisor
48 *
49 * This clock implements the features required by the newer SoCs where
50 * the standard clock block provides an input mux and a post-mux divisor
51 * to provide the periperhal's clock.
52 *
53 * The array of @sources provides the mapping of mux position to the
54 * clock, and @reg_src shows the code where to modify to change the mux
55 * position. The @reg_div defines how to change the divider settings on
56 * the output.
57 */
58struct clksrc_clk {
59 struct clk clk;
60 struct clksrc_sources *sources;
61
62 struct clksrc_reg reg_src;
63 struct clksrc_reg reg_div;
64};
65
66/**
67 * s3c_set_clksrc() - setup the clock from the register settings
68 * @clk: The clock to setup.
69 * @announce: true to announce the setting to printk().
70 *
71 * Setup the clock from the current register settings, for when the
72 * kernel boots or if it is resuming from a possibly unknown state.
73 */
74extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce);
75
76/**
77 * s3c_register_clksrc() register clocks from an array of clksrc clocks
78 * @srcs: The array of clocks to register
79 * @size: The size of the @srcs array.
80 *
81 * Initialise and register the array of clocks described by @srcs.
82 */
83extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size);
diff --git a/arch/arm/plat-s3c/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index d86af84b5b8c..60b62692ac7a 100644
--- a/arch/arm/plat-s3c/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -11,6 +11,30 @@
11 11
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13 13
14struct clk;
15
16/**
17 * struct clk_ops - standard clock operations
18 * @set_rate: set the clock rate, see clk_set_rate().
19 * @get_rate: get the clock rate, see clk_get_rate().
20 * @round_rate: round a given clock rate, see clk_round_rate().
21 * @set_parent: set the clock's parent, see clk_set_parent().
22 *
23 * Group the common clock implementations together so that we
24 * don't have to keep setting the same fiels again. We leave
25 * enable in struct clk.
26 *
27 * Adding an extra layer of indirection into the process should
28 * not be a problem as it is unlikely these operations are going
29 * to need to be called quickly.
30 */
31struct clk_ops {
32 int (*set_rate)(struct clk *c, unsigned long rate);
33 unsigned long (*get_rate)(struct clk *c);
34 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
35 int (*set_parent)(struct clk *c, struct clk *parent);
36};
37
14struct clk { 38struct clk {
15 struct list_head list; 39 struct list_head list;
16 struct module *owner; 40 struct module *owner;
@@ -21,11 +45,8 @@ struct clk {
21 unsigned long rate; 45 unsigned long rate;
22 unsigned long ctrlbit; 46 unsigned long ctrlbit;
23 47
48 struct clk_ops *ops;
24 int (*enable)(struct clk *, int enable); 49 int (*enable)(struct clk *, int enable);
25 int (*set_rate)(struct clk *c, unsigned long rate);
26 unsigned long (*get_rate)(struct clk *c);
27 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
28 int (*set_parent)(struct clk *c, struct clk *parent);
29}; 50};
30 51
31/* other clocks which may be registered by board support */ 52/* other clocks which may be registered by board support */
@@ -54,6 +75,9 @@ extern struct clk clk_h2;
54extern struct clk clk_27m; 75extern struct clk clk_27m;
55extern struct clk clk_48m; 76extern struct clk clk_48m;
56 77
78extern int clk_default_setrate(struct clk *clk, unsigned long rate);
79extern struct clk_ops clk_ops_def_setrate;
80
57/* exports for arch/arm/mach-s3c2410 81/* exports for arch/arm/mach-s3c2410
58 * 82 *
59 * Please DO NOT use these outside of arch/arm/mach-s3c2410 83 * Please DO NOT use these outside of arch/arm/mach-s3c2410
@@ -66,9 +90,11 @@ extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
66extern int s3c24xx_register_clock(struct clk *clk); 90extern int s3c24xx_register_clock(struct clk *clk);
67extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); 91extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
68 92
93extern void s3c_register_clocks(struct clk *clk, int nr_clks);
94
69extern int s3c24xx_register_baseclocks(unsigned long xtal); 95extern int s3c24xx_register_baseclocks(unsigned long xtal);
70 96
71extern void s3c64xx_register_clocks(void); 97extern void s5p_register_clocks(unsigned long xtal_freq);
72 98
73extern void s3c24xx_setup_clocks(unsigned long fclk, 99extern void s3c24xx_setup_clocks(unsigned long fclk,
74 unsigned long hclk, 100 unsigned long hclk,
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h
index 94eb06a2ea5c..80c4a809c721 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/cpu-freq.h 1/* arch/arm/plat-samsung/include/plat/cpu-freq.h
2 * 2 *
3 * Copyright (c) 2006-2007 Simtec Electronics 3 * Copyright (c) 2006-2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d1131ca11e97..d316b4a579f4 100644
--- a/arch/arm/plat-s3c/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c/include/plat/cpu.h 1/* linux/arch/arm/plat-samsung/include/plat/cpu.h
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -48,9 +48,12 @@ extern void s3c_init_cpu(unsigned long idcode,
48 48
49extern void s3c24xx_init_irq(void); 49extern void s3c24xx_init_irq(void);
50extern void s3c64xx_init_irq(u32 vic0, u32 vic1); 50extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
51extern void s5p_init_irq(u32 *vic, u32 num_vic);
51 52
52extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); 53extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
53extern void s3c64xx_init_io(struct map_desc *mach_desc, int size); 54extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
55extern void s5p_init_io(struct map_desc *mach_desc,
56 int size, void __iomem *cpuid_addr);
54 57
55extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); 58extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
56 59
diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S
index 3634d4e3708b..dc6efd90e8ff 100644
--- a/arch/arm/plat-s3c/include/plat/debug-macro.S
+++ b/arch/arm/plat-samsung/include/plat/debug-macro.S
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c/debug-macro.S 1/* arch/arm/plat-samsung/include/plat/debug-macro.S
2 * 2 *
3 * Copyright 2005, 2007 Simtec Electronics 3 * Copyright 2005, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
@@ -11,6 +11,18 @@
11 11
12#include <plat/regs-serial.h> 12#include <plat/regs-serial.h>
13 13
14/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
15
16 .macro fifo_level_s5pv210 rd, rx
17 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
18 and \rd, \rd, #S5PV210_UFSTAT_TXMASK
19 .endm
20
21 .macro fifo_full_s5pv210 rd, rx
22 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
23 tst \rd, #S5PV210_UFSTAT_TXFULL
24 .endm
25
14/* The S3C2440 implementations are used by default as they are the 26/* The S3C2440 implementations are used by default as they are the
15 * most widely re-used */ 27 * most widely re-used */
16 28
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index c1c20b023917..796d24258313 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c24xx/devs.h 1/* arch/arm/plat-samsung/include/plat/devs.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -18,6 +18,7 @@ struct s3c24xx_uart_resources {
18 18
19extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; 19extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
20extern struct s3c24xx_uart_resources s3c64xx_uart_resources[]; 20extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
21extern struct s3c24xx_uart_resources s5p_uart_resources[];
21 22
22extern struct platform_device *s3c24xx_uart_devs[]; 23extern struct platform_device *s3c24xx_uart_devs[];
23extern struct platform_device *s3c24xx_uart_src[]; 24extern struct platform_device *s3c24xx_uart_src[];
@@ -28,12 +29,18 @@ extern struct platform_device s3c64xx_device_iis0;
28extern struct platform_device s3c64xx_device_iis1; 29extern struct platform_device s3c64xx_device_iis1;
29extern struct platform_device s3c64xx_device_iisv4; 30extern struct platform_device s3c64xx_device_iisv4;
30 31
32extern struct platform_device s3c64xx_device_spi0;
33extern struct platform_device s3c64xx_device_spi1;
34
31extern struct platform_device s3c64xx_device_pcm0; 35extern struct platform_device s3c64xx_device_pcm0;
32extern struct platform_device s3c64xx_device_pcm1; 36extern struct platform_device s3c64xx_device_pcm1;
33 37
38extern struct platform_device s3c64xx_device_ac97;
39
34extern struct platform_device s3c_device_ts; 40extern struct platform_device s3c_device_ts;
41
35extern struct platform_device s3c_device_fb; 42extern struct platform_device s3c_device_fb;
36extern struct platform_device s3c_device_usb; 43extern struct platform_device s3c_device_ohci;
37extern struct platform_device s3c_device_lcd; 44extern struct platform_device s3c_device_lcd;
38extern struct platform_device s3c_device_wdt; 45extern struct platform_device s3c_device_wdt;
39extern struct platform_device s3c_device_i2c0; 46extern struct platform_device s3c_device_i2c0;
diff --git a/arch/arm/plat-s3c/include/plat/dma-core.h b/arch/arm/plat-samsung/include/plat/dma-core.h
index 32ff2a92cb3c..32ff2a92cb3c 100644
--- a/arch/arm/plat-s3c/include/plat/dma-core.h
+++ b/arch/arm/plat-samsung/include/plat/dma-core.h
diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 9565ead1bc9b..336d5ac02035 100644
--- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -1,9 +1,9 @@
1/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h 1/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
2 * 2 *
3 * Copyright (C) 2006 Simtec Electronics 3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C24XX DMA support 6 * Samsung S3C24XX DMA support - per SoC functions
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index e429d10be3ad..7584d751ed51 100644
--- a/arch/arm/plat-s3c/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/dma.h 1/* arch/arm/plat-samsung/include/plat/dma.h
2 * 2 *
3 * Copyright (C) 2003-2006 Simtec Electronics 3 * Copyright (C) 2003-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index f8db87930f8b..ffc01a76b7ce 100644
--- a/arch/arm/plat-s3c/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c/include/plat/fb.h 1/* arch/arm/plat-samsung/include/plat/fb.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 652e2bbdaa20..dda19da037ad 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -78,7 +78,7 @@ extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
78 * others = Special functions (dependant on bank) 78 * others = Special functions (dependant on bank)
79 * 79 *
80 * Note, since the code to deal with the case where there are two control 80 * Note, since the code to deal with the case where there are two control
81 * registers instead of one, we do not have a seperate set of functions for 81 * registers instead of one, we do not have a separate set of functions for
82 * each case. 82 * each case.
83*/ 83*/
84extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, 84extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 29cd6a86cade..29cd6a86cade 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index 32af612767aa..49ff406a7066 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -11,6 +11,11 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12*/ 12*/
13 13
14#define GPIOCON_OFF (0x00)
15#define GPIODAT_OFF (0x04)
16
17#define con_4bit_shift(__off) ((__off) * 4)
18
14/* Define the core gpiolib support functions that the s3c platforms may 19/* Define the core gpiolib support functions that the s3c platforms may
15 * need to extend or change depending on the hardware and the s3c chip 20 * need to extend or change depending on the hardware and the s3c chip
16 * selected at build or found at run time. 21 * selected at build or found at run time.
@@ -80,6 +85,29 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
80 * and any other necessary functions. 85 * and any other necessary functions.
81 */ 86 */
82 87
88/**
89 * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
90 * @chip: The gpio chip that is being configured.
91 * @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
92 *
93 * This helper deal with the GPIO cases where the control register has 4 bits
94 * of control per GPIO, generally in the form of:
95 * 0000 = Input
96 * 0001 = Output
97 * others = Special functions (dependant on bank)
98 *
99 * Note, since the code to deal with the case where there are two control
100 * registers instead of one, we do not have a seperate set of function
101 * (samsung_gpiolib_add_4bit2_chips)for each case.
102 */
103extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
104 int nr_chips);
105extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
106 int nr_chips);
107
108extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
109extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
110
83#ifdef CONFIG_S3C_GPIO_TRACK 111#ifdef CONFIG_S3C_GPIO_TRACK
84extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; 112extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
85 113
@@ -90,6 +118,8 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
90#else 118#else
91/* machine specific code should provide s3c_gpiolib_getchip */ 119/* machine specific code should provide s3c_gpiolib_getchip */
92 120
121#include <mach/gpio-track.h>
122
93static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } 123static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
94#endif 124#endif
95 125
diff --git a/arch/arm/plat-s3c/include/plat/hwmon.h b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea0aa31..1ba88ea0aa31 100644
--- a/arch/arm/plat-s3c/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
diff --git a/arch/arm/plat-s3c/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h
index 36397ca20962..36397ca20962 100644
--- a/arch/arm/plat-s3c/include/plat/iic-core.h
+++ b/arch/arm/plat-samsung/include/plat/iic-core.h
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h
index 3083df00dee6..3083df00dee6 100644
--- a/arch/arm/plat-s3c/include/plat/iic.h
+++ b/arch/arm/plat-samsung/include/plat/iic.h
diff --git a/arch/arm/plat-samsung/include/plat/irq-uart.h b/arch/arm/plat-samsung/include/plat/irq-uart.h
new file mode 100644
index 000000000000..a9331e49bea3
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/irq-uart.h
@@ -0,0 +1,20 @@
1/* arch/arm/plat-samsung/include/plat/irq-uart.h
2 *
3 * Copyright (c) 2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for Samsung SoC UART IRQ demux for S3C64XX and later
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13struct s3c_uart_irq {
14 void __iomem *regs;
15 unsigned int base_irq;
16 unsigned int parent_irq;
17};
18
19extern void s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs);
20
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
index 451a23a2092a..a90b53431b5b 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
+++ b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
@@ -1,17 +1,13 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h 1/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
2 * 2 *
3 * Copyright (c) 2006 Simtec Electronics 3 * Copyright (c) 2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Header file for s3c2442 cpu support 6 * Header file for Samsung SoC IRQ VIC timer
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#ifdef CONFIG_CPU_S3C2442 13extern void s3c_init_vic_timer_irq(unsigned int vic, unsigned int timer);
14extern int s3c2442_init(void);
15#else
16#define s3c2442_init NULL
17#endif
diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-samsung/include/plat/map-base.h
index 250be311c85b..250be311c85b 100644
--- a/arch/arm/plat-s3c/include/plat/map-base.h
+++ b/arch/arm/plat-samsung/include/plat/map-base.h
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-samsung/include/plat/nand.h
index 226147b7e026..b64115fa93a4 100644
--- a/arch/arm/plat-s3c/include/plat/nand.h
+++ b/arch/arm/plat-samsung/include/plat/nand.h
@@ -3,7 +3,7 @@
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C2410 - NAND device controller platfrom_device info 6 * S3C2410 - NAND device controller platform_device info
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 7a797192fcf3..245836d91931 100644
--- a/arch/arm/plat-s3c/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c24xx/pm.h 1/* arch/arm/plat-samsung/include/plat/pm.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
@@ -111,7 +111,7 @@ extern int s3c24xx_irq_resume(struct sys_device *dev);
111 111
112/* PM debug functions */ 112/* PM debug functions */
113 113
114#ifdef CONFIG_S3C2410_PM_DEBUG 114#ifdef CONFIG_SAMSUNG_PM_DEBUG
115/** 115/**
116 * s3c_pm_dbg() - low level debug function for use in suspend/resume. 116 * s3c_pm_dbg() - low level debug function for use in suspend/resume.
117 * @msg: The message to print. 117 * @msg: The message to print.
@@ -141,7 +141,7 @@ static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { }
141 141
142/* suspend memory checking */ 142/* suspend memory checking */
143 143
144#ifdef CONFIG_S3C2410_PM_CHECK 144#ifdef CONFIG_SAMSUNG_PM_CHECK
145extern void s3c_pm_check_prepare(void); 145extern void s3c_pm_check_prepare(void);
146extern void s3c_pm_check_restore(void); 146extern void s3c_pm_check_restore(void);
147extern void s3c_pm_check_cleanup(void); 147extern void s3c_pm_check_cleanup(void);
diff --git a/arch/arm/plat-s3c/include/plat/regs-ac97.h b/arch/arm/plat-samsung/include/plat/regs-ac97.h
index c3878f7acb83..c3878f7acb83 100644
--- a/arch/arm/plat-s3c/include/plat/regs-ac97.h
+++ b/arch/arm/plat-samsung/include/plat/regs-ac97.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h
index 4323cccc86cd..7554c4fcddb9 100644
--- a/arch/arm/plat-s3c/include/plat/regs-adc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-adc.h
@@ -19,9 +19,13 @@
19#define S3C2410_ADCDLY S3C2410_ADCREG(0x08) 19#define S3C2410_ADCDLY S3C2410_ADCREG(0x08)
20#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) 20#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
21#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) 21#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
22#define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14)
23#define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18)
24#define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20)
22 25
23 26
24/* ADCCON Register Bits */ 27/* ADCCON Register Bits */
28#define S3C64XX_ADCCON_RESSEL (1<<16)
25#define S3C2410_ADCCON_ECFLG (1<<15) 29#define S3C2410_ADCCON_ECFLG (1<<15)
26#define S3C2410_ADCCON_PRSCEN (1<<14) 30#define S3C2410_ADCCON_PRSCEN (1<<14)
27#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) 31#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index a60ed0d06c94..0f43599248ad 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h 1/* arch/arm/plat-samsung/include/plat/regs-fb-v4.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index e9ee599d430e..0ef806e50344 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/regs-fb.h 1/* arch/arm/plat-samsung/include/plat/regs-fb.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-iic.h b/arch/arm/plat-samsung/include/plat/regs-iic.h
index 2f7c17de8ac8..2f7c17de8ac8 100644
--- a/arch/arm/plat-s3c/include/plat/regs-iic.h
+++ b/arch/arm/plat-samsung/include/plat/regs-iic.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-irqtype.h b/arch/arm/plat-samsung/include/plat/regs-irqtype.h
index c63cd3fc5ad3..c63cd3fc5ad3 100644
--- a/arch/arm/plat-s3c/include/plat/regs-irqtype.h
+++ b/arch/arm/plat-samsung/include/plat/regs-irqtype.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-samsung/include/plat/regs-nand.h
index 238efea7b9e4..238efea7b9e4 100644
--- a/arch/arm/plat-s3c/include/plat/regs-nand.h
+++ b/arch/arm/plat-samsung/include/plat/regs-nand.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index d5837cf8e402..d5837cf8e402 100644
--- a/arch/arm/plat-s3c/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h
index abf2fbc2eb2f..abf2fbc2eb2f 100644
--- a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
+++ b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-sdhci.h b/arch/arm/plat-samsung/include/plat/regs-sdhci.h
index e34049ad44cc..e34049ad44cc 100644
--- a/arch/arm/plat-s3c/include/plat/regs-sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/regs-sdhci.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 85d8904e7f24..a6eba8496b24 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,4 +1,4 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-serial.h 1/* arch/arm/plat-samsung/include/plat/regs-serial.h
2 * 2 *
3 * From linux/include/asm-arm/hardware/serial_s3c2410.h 3 * From linux/include/asm-arm/hardware/serial_s3c2410.h
4 * 4 *
@@ -194,6 +194,36 @@
194#define S3C64XX_UINTSP 0x34 194#define S3C64XX_UINTSP 0x34
195#define S3C64XX_UINTM 0x38 195#define S3C64XX_UINTM 0x38
196 196
197/* Following are specific to S5PV210 and S5P6442 */
198#define S5PV210_UCON_CLKMASK (1<<10)
199#define S5PV210_UCON_PCLK (0<<10)
200#define S5PV210_UCON_UCLK (1<<10)
201
202#define S5PV210_UFCON_TXTRIG0 (0<<8)
203#define S5PV210_UFCON_TXTRIG4 (1<<8)
204#define S5PV210_UFCON_TXTRIG8 (2<<8)
205#define S5PV210_UFCON_TXTRIG16 (3<<8)
206#define S5PV210_UFCON_TXTRIG32 (4<<8)
207#define S5PV210_UFCON_TXTRIG64 (5<<8)
208#define S5PV210_UFCON_TXTRIG128 (6<<8)
209#define S5PV210_UFCON_TXTRIG256 (7<<8)
210
211#define S5PV210_UFCON_RXTRIG1 (0<<4)
212#define S5PV210_UFCON_RXTRIG4 (1<<4)
213#define S5PV210_UFCON_RXTRIG8 (2<<4)
214#define S5PV210_UFCON_RXTRIG16 (3<<4)
215#define S5PV210_UFCON_RXTRIG32 (4<<4)
216#define S5PV210_UFCON_RXTRIG64 (5<<4)
217#define S5PV210_UFCON_RXTRIG128 (6<<4)
218#define S5PV210_UFCON_RXTRIG256 (7<<4)
219
220#define S5PV210_UFSTAT_TXFULL (1<<24)
221#define S5PV210_UFSTAT_RXFULL (1<<8)
222#define S5PV210_UFSTAT_TXMASK (255<<16)
223#define S5PV210_UFSTAT_TXSHIFT (16)
224#define S5PV210_UFSTAT_RXMASK (255<<0)
225#define S5PV210_UFSTAT_RXSHIFT (0)
226
197#ifndef __ASSEMBLY__ 227#ifndef __ASSEMBLY__
198 228
199/* struct s3c24xx_uart_clksrc 229/* struct s3c24xx_uart_clksrc
diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h
index d097d92f8cc7..d097d92f8cc7 100644
--- a/arch/arm/plat-s3c/include/plat/regs-timer.h
+++ b/arch/arm/plat-samsung/include/plat/regs-timer.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
index 36a85f5000c8..a111ad871833 100644
--- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
@@ -12,7 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15/* Note, this is a seperate header file as some of the clock framework 15/* Note, this is a separate header file as some of the clock framework
16 * needs to touch this if the clk_48m is used as the USB OHCI or other 16 * needs to touch this if the clk_48m is used as the USB OHCI or other
17 * peripheral source. 17 * peripheral source.
18*/ 18*/
diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
index 8d18d9d4d148..8d18d9d4d148 100644
--- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
index 4938492470f7..4938492470f7 100644
--- a/arch/arm/plat-s3c/include/plat/regs-watchdog.h
+++ b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
new file mode 100644
index 000000000000..d17724149315
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -0,0 +1,67 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S3C64XX_PLAT_SPI_H
12#define __S3C64XX_PLAT_SPI_H
13
14/**
15 * struct s3c64xx_spi_csinfo - ChipSelect description
16 * @fb_delay: Slave specific feedback delay.
17 * Refer to FB_CLK_SEL register definition in SPI chapter.
18 * @line: Custom 'identity' of the CS line.
19 * @set_level: CS line control.
20 *
21 * This is per SPI-Slave Chipselect information.
22 * Allocate and initialize one in machine init code and make the
23 * spi_board_info.controller_data point to it.
24 */
25struct s3c64xx_spi_csinfo {
26 u8 fb_delay;
27 unsigned line;
28 void (*set_level)(unsigned line_id, int lvl);
29};
30
31/**
32 * struct s3c64xx_spi_info - SPI Controller defining structure
33 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
34 * @src_clk_name: Platform name of the corresponding clock.
35 * @num_cs: Number of CS this controller emulates.
36 * @cfg_gpio: Configure pins for this SPI controller.
37 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
38 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
39 * @high_speed: If the controller supports HIGH_SPEED_EN bit
40 */
41struct s3c64xx_spi_info {
42 int src_clk_nr;
43 char *src_clk_name;
44
45 int num_cs;
46
47 int (*cfg_gpio)(struct platform_device *pdev);
48
49 /* Following two fields are for future compatibility */
50 int fifo_lvl_mask;
51 int rx_lvl_offset;
52 int high_speed;
53};
54
55/**
56 * s3c64xx_spi_set_info - SPI Controller configure callback by the board
57 * initialization code.
58 * @cntrlr: SPI controller number the configuration is for.
59 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
60 * @num_cs: Number of elements in the 'cs' array.
61 *
62 * Call this from machine init code for each SPI Controller that
63 * has some chips attached to it.
64 */
65extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
66
67#endif /* __S3C64XX_PLAT_SPI_H */
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 53198673b6bd..7d07cd7aa4f2 100644
--- a/arch/arm/plat-s3c/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
78 78
79/* S3C6400 SDHCI setup */ 79/* S3C6400 SDHCI setup */
80 80
81#ifdef CONFIG_S3C6400_SETUP_SDHCI 81#ifdef CONFIG_S3C64XX_SETUP_SDHCI
82extern char *s3c6400_hsmmc_clksrcs[4]; 82extern char *s3c64xx_hsmmc_clksrcs[4];
83 83
84#ifdef CONFIG_S3C_DEV_HSMMC 84#ifdef CONFIG_S3C_DEV_HSMMC
85extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, 85extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
@@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
89 89
90static inline void s3c6400_default_sdhci0(void) 90static inline void s3c6400_default_sdhci0(void)
91{ 91{
92 s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 92 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
93 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 93 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
94 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 94 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
95} 95}
@@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { }
101#ifdef CONFIG_S3C_DEV_HSMMC1 101#ifdef CONFIG_S3C_DEV_HSMMC1
102static inline void s3c6400_default_sdhci1(void) 102static inline void s3c6400_default_sdhci1(void)
103{ 103{
104 s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 104 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
105 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 105 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
106 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 106 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
107} 107}
@@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { }
112#ifdef CONFIG_S3C_DEV_HSMMC2 112#ifdef CONFIG_S3C_DEV_HSMMC2
113static inline void s3c6400_default_sdhci2(void) 113static inline void s3c6400_default_sdhci2(void)
114{ 114{
115 s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 115 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
118} 118}
@@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void)
120static inline void s3c6400_default_sdhci2(void) { } 120static inline void s3c6400_default_sdhci2(void) { }
121#endif /* CONFIG_S3C_DEV_HSMMC2 */ 121#endif /* CONFIG_S3C_DEV_HSMMC2 */
122 122
123#else
124static inline void s3c6400_default_sdhci0(void) { }
125static inline void s3c6400_default_sdhci1(void) { }
126#endif /* CONFIG_S3C6400_SETUP_SDHCI */
127
128/* S3C6410 SDHCI setup */ 123/* S3C6410 SDHCI setup */
129 124
130#ifdef CONFIG_S3C6410_SETUP_SDHCI 125extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
131extern char *s3c6410_hsmmc_clksrcs[4]; 126 void __iomem *r,
132 127 struct mmc_ios *ios,
133extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, 128 struct mmc_card *card);
134 void __iomem *r,
135 struct mmc_ios *ios,
136 struct mmc_card *card);
137 129
138#ifdef CONFIG_S3C_DEV_HSMMC 130#ifdef CONFIG_S3C_DEV_HSMMC
139static inline void s3c6410_default_sdhci0(void) 131static inline void s3c6410_default_sdhci0(void)
140{ 132{
141 s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 133 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
142 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 134 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
143 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 135 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
144} 136}
145#else 137#else
146static inline void s3c6410_default_sdhci0(void) { } 138static inline void s3c6410_default_sdhci0(void) { }
@@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { }
149#ifdef CONFIG_S3C_DEV_HSMMC1 141#ifdef CONFIG_S3C_DEV_HSMMC1
150static inline void s3c6410_default_sdhci1(void) 142static inline void s3c6410_default_sdhci1(void)
151{ 143{
152 s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 144 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
153 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 145 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
154 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 146 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
155} 147}
156#else 148#else
157static inline void s3c6410_default_sdhci1(void) { } 149static inline void s3c6410_default_sdhci1(void) { }
@@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { }
160#ifdef CONFIG_S3C_DEV_HSMMC2 152#ifdef CONFIG_S3C_DEV_HSMMC2
161static inline void s3c6410_default_sdhci2(void) 153static inline void s3c6410_default_sdhci2(void)
162{ 154{
163 s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 155 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
164 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 156 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
165 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 157 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
166} 158}
167#else 159#else
168static inline void s3c6410_default_sdhci2(void) { } 160static inline void s3c6410_default_sdhci2(void) { }
@@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { }
171#else 163#else
172static inline void s3c6410_default_sdhci0(void) { } 164static inline void s3c6410_default_sdhci0(void) { }
173static inline void s3c6410_default_sdhci1(void) { } 165static inline void s3c6410_default_sdhci1(void) { }
174#endif /* CONFIG_S3C6410_SETUP_SDHCI */ 166static inline void s3c6400_default_sdhci0(void) { }
167static inline void s3c6400_default_sdhci1(void) { }
168
169#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
175 170
176/* S5PC100 SDHCI setup */ 171/* S5PC100 SDHCI setup */
177 172
diff --git a/arch/arm/plat-s3c/include/plat/udc-hs.h b/arch/arm/plat-samsung/include/plat/udc-hs.h
index dd04db043109..a22a4f2eea94 100644
--- a/arch/arm/plat-s3c/include/plat/udc-hs.h
+++ b/arch/arm/plat-samsung/include/plat/udc-hs.h
@@ -12,7 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15enum s3c_hostg_dmamode { 15enum s3c_hsotg_dmamode {
16 S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */ 16 S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */
17 S3C_HSOTG_DMA_ONLY, /* always use DMA */ 17 S3C_HSOTG_DMA_ONLY, /* always use DMA */
18 S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ 18 S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */
@@ -24,6 +24,6 @@ enum s3c_hostg_dmamode {
24 * @is_osc: The clock source is an oscillator, not a crystal 24 * @is_osc: The clock source is an oscillator, not a crystal
25 */ 25 */
26struct s3c_hsotg_plat { 26struct s3c_hsotg_plat {
27 enum s3c_hostg_dmamode dma; 27 enum s3c_hsotg_dmamode dma;
28 unsigned int is_osc : 1; 28 unsigned int is_osc : 1;
29}; 29};
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index dc66a477f62e..e87ce8ffbbcd 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c/uncompress.h 1/* arch/arm/plat-samsung/include/plat/uncompress.h
2 * 2 *
3 * Copyright 2003, 2007 Simtec Electronics 3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/usb-control.h b/arch/arm/plat-samsung/include/plat/usb-control.h
index 822c87fe948e..7fa1fbefc3f2 100644
--- a/arch/arm/plat-s3c/include/plat/usb-control.h
+++ b/arch/arm/plat-samsung/include/plat/usb-control.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/usb-control.h 1/* arch/arm/plat-samsung/include/plat/usb-control.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -38,4 +38,6 @@ static void inline s3c2410_usb_report_oc(struct s3c2410_hcd_info *info, int port
38 } 38 }
39} 39}
40 40
41extern void s3c_ohci_set_platdata(struct s3c2410_hcd_info *info);
42
41#endif /*__ASM_ARCH_USBCONTROL_H */ 43#endif /*__ASM_ARCH_USBCONTROL_H */
diff --git a/arch/arm/plat-s3c/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 54b762acb5a0..54b762acb5a0 100644
--- a/arch/arm/plat-s3c/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-samsung/init.c
index 6790edfaca6f..6790edfaca6f 100644
--- a/arch/arm/plat-s3c/init.c
+++ b/arch/arm/plat-samsung/init.c
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
new file mode 100644
index 000000000000..4f8c102674ae
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -0,0 +1,143 @@
1/* arch/arm/plat-samsung/irq-uart.c
2 * originally part of arch/arm/plat-s3c64xx/irq.c
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * Samsung- UART Interrupt handling
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/serial_core.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21
22#include <mach/map.h>
23#include <plat/irq-uart.h>
24#include <plat/regs-serial.h>
25#include <plat/cpu.h>
26
27/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
28 * are consecutive when looking up the interrupt in the demux routines.
29 */
30
31static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
32{
33 struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
34 return uirq->regs;
35}
36
37static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
38{
39 return irq & 3;
40}
41
42static void s3c_irq_uart_mask(unsigned int irq)
43{
44 void __iomem *regs = s3c_irq_uart_base(irq);
45 unsigned int bit = s3c_irq_uart_bit(irq);
46 u32 reg;
47
48 reg = __raw_readl(regs + S3C64XX_UINTM);
49 reg |= (1 << bit);
50 __raw_writel(reg, regs + S3C64XX_UINTM);
51}
52
53static void s3c_irq_uart_maskack(unsigned int irq)
54{
55 void __iomem *regs = s3c_irq_uart_base(irq);
56 unsigned int bit = s3c_irq_uart_bit(irq);
57 u32 reg;
58
59 reg = __raw_readl(regs + S3C64XX_UINTM);
60 reg |= (1 << bit);
61 __raw_writel(reg, regs + S3C64XX_UINTM);
62 __raw_writel(1 << bit, regs + S3C64XX_UINTP);
63}
64
65static void s3c_irq_uart_unmask(unsigned int irq)
66{
67 void __iomem *regs = s3c_irq_uart_base(irq);
68 unsigned int bit = s3c_irq_uart_bit(irq);
69 u32 reg;
70
71 reg = __raw_readl(regs + S3C64XX_UINTM);
72 reg &= ~(1 << bit);
73 __raw_writel(reg, regs + S3C64XX_UINTM);
74}
75
76static void s3c_irq_uart_ack(unsigned int irq)
77{
78 void __iomem *regs = s3c_irq_uart_base(irq);
79 unsigned int bit = s3c_irq_uart_bit(irq);
80
81 __raw_writel(1 << bit, regs + S3C64XX_UINTP);
82}
83
84static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
85{
86 struct s3c_uart_irq *uirq = desc->handler_data;
87 u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
88 int base = uirq->base_irq;
89
90 if (pend & (1 << 0))
91 generic_handle_irq(base);
92 if (pend & (1 << 1))
93 generic_handle_irq(base + 1);
94 if (pend & (1 << 2))
95 generic_handle_irq(base + 2);
96 if (pend & (1 << 3))
97 generic_handle_irq(base + 3);
98}
99
100static struct irq_chip s3c_irq_uart = {
101 .name = "s3c-uart",
102 .mask = s3c_irq_uart_mask,
103 .unmask = s3c_irq_uart_unmask,
104 .mask_ack = s3c_irq_uart_maskack,
105 .ack = s3c_irq_uart_ack,
106};
107
108static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
109{
110 struct irq_desc *desc = irq_to_desc(uirq->parent_irq);
111 void __iomem *reg_base = uirq->regs;
112 unsigned int irq;
113 int offs;
114
115 /* mask all interrupts at the start. */
116 __raw_writel(0xf, reg_base + S3C64XX_UINTM);
117
118 for (offs = 0; offs < 3; offs++) {
119 irq = uirq->base_irq + offs;
120
121 set_irq_chip(irq, &s3c_irq_uart);
122 set_irq_chip_data(irq, uirq);
123 set_irq_handler(irq, handle_level_irq);
124 set_irq_flags(irq, IRQF_VALID);
125 }
126
127 desc->handler_data = uirq;
128 set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
129}
130
131/**
132 * s3c_init_uart_irqs() - initialise UART IRQs and the necessary demuxing
133 * @irq: The interrupt data for registering
134 * @nr_irqs: The number of interrupt descriptions in @irq.
135 *
136 * Register the UART interrupts specified by @irq including the demuxing
137 * routines. This supports the S3C6400 and newer style of devices.
138 */
139void __init s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs)
140{
141 for (; nr_irqs > 0; nr_irqs--, irq++)
142 s3c_init_uart_irq(irq);
143}
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
new file mode 100644
index 000000000000..0270519fcabc
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -0,0 +1,86 @@
1/* arch/arm/plat-samsung/irq-vic-timer.c
2 * originally part of arch/arm/plat-s3c64xx/irq.c
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * S3C64XX - Interrupt handling
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20
21#include <mach/map.h>
22#include <plat/irq-vic-timer.h>
23#include <plat/regs-timer.h>
24
25static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
26{
27 generic_handle_irq((int)desc->handler_data);
28}
29
30/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
31
32static void s3c_irq_timer_mask(unsigned int irq)
33{
34 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
35
36 reg &= 0x1f; /* mask out pending interrupts */
37 reg &= ~(1 << (irq - IRQ_TIMER0));
38 __raw_writel(reg, S3C64XX_TINT_CSTAT);
39}
40
41static void s3c_irq_timer_unmask(unsigned int irq)
42{
43 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
44
45 reg &= 0x1f; /* mask out pending interrupts */
46 reg |= 1 << (irq - IRQ_TIMER0);
47 __raw_writel(reg, S3C64XX_TINT_CSTAT);
48}
49
50static void s3c_irq_timer_ack(unsigned int irq)
51{
52 u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
53
54 reg &= 0x1f;
55 reg |= (1 << 5) << (irq - IRQ_TIMER0);
56 __raw_writel(reg, S3C64XX_TINT_CSTAT);
57}
58
59static struct irq_chip s3c_irq_timer = {
60 .name = "s3c-timer",
61 .mask = s3c_irq_timer_mask,
62 .unmask = s3c_irq_timer_unmask,
63 .ack = s3c_irq_timer_ack,
64};
65
66/**
67 * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
68 * @parent_irq: The parent IRQ on the VIC for the timer.
69 * @timer_irq: The IRQ to be used for the timer.
70 *
71 * Register the necessary IRQ chaining and support for the timer IRQs
72 * chained of the VIC.
73 */
74void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
75 unsigned int timer_irq)
76{
77 struct irq_desc *desc = irq_to_desc(parent_irq);
78
79 set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
80
81 set_irq_chip(timer_irq, &s3c_irq_timer);
82 set_irq_handler(timer_irq, handle_level_irq);
83 set_irq_flags(timer_irq, IRQF_VALID);
84
85 desc->handler_data = (void *)timer_irq;
86}
diff --git a/arch/arm/plat-s3c/pm-check.c b/arch/arm/plat-samsung/pm-check.c
index 8eb1f439861c..0b5bb774192a 100644
--- a/arch/arm/plat-s3c/pm-check.c
+++ b/arch/arm/plat-samsung/pm-check.c
@@ -20,8 +20,8 @@
20 20
21#include <plat/pm.h> 21#include <plat/pm.h>
22 22
23#if CONFIG_S3C2410_PM_CHECK_CHUNKSIZE < 1 23#if CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE < 1
24#error CONFIG_S3C2410_PM_CHECK_CHUNKSIZE must be a positive non-zero value 24#error CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE must be a positive non-zero value
25#endif 25#endif
26 26
27/* suspend checking code... 27/* suspend checking code...
@@ -29,12 +29,12 @@
29 * this next area does a set of crc checks over all the installed 29 * this next area does a set of crc checks over all the installed
30 * memory, so the system can verify if the resume was ok. 30 * memory, so the system can verify if the resume was ok.
31 * 31 *
32 * CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC, 32 * CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE defines the block-size for the CRC,
33 * increasing it will mean that the area corrupted will be less easy to spot, 33 * increasing it will mean that the area corrupted will be less easy to spot,
34 * and reducing the size will cause the CRC save area to grow 34 * and reducing the size will cause the CRC save area to grow
35*/ 35*/
36 36
37#define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024) 37#define CHECK_CHUNKSIZE (CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE * 1024)
38 38
39static u32 crc_size; /* size needed for the crc block */ 39static u32 crc_size; /* size needed for the crc block */
40static u32 *crcs; /* allocated over suspend/resume */ 40static u32 *crcs; /* allocated over suspend/resume */
diff --git a/arch/arm/plat-s3c/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index cfd326a8b693..69a4c7f02e25 100644
--- a/arch/arm/plat-s3c/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -19,7 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21 21
22#include <mach/gpio-core.h> 22#include <plat/gpio-core.h>
23#include <plat/pm.h> 23#include <plat/pm.h>
24 24
25/* PM GPIO helpers */ 25/* PM GPIO helpers */
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-samsung/pm.c
index 767470601e5c..27cfca597699 100644
--- a/arch/arm/plat-s3c/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -29,7 +29,7 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <plat/pm.h> 31#include <plat/pm.h>
32#include <plat/pm-core.h> 32#include <mach/pm-core.h>
33 33
34/* for external use */ 34/* for external use */
35 35
@@ -41,7 +41,7 @@ unsigned long s3c_pm_flags;
41 * resume before the console layer is available. 41 * resume before the console layer is available.
42*/ 42*/
43 43
44#ifdef CONFIG_S3C2410_PM_DEBUG 44#ifdef CONFIG_SAMSUNG_PM_DEBUG
45extern void printascii(const char *); 45extern void printascii(const char *);
46 46
47void s3c_pm_dbg(const char *fmt, ...) 47void s3c_pm_dbg(const char *fmt, ...)
@@ -65,13 +65,13 @@ static inline void s3c_pm_debug_init(void)
65#else 65#else
66#define s3c_pm_debug_init() do { } while(0) 66#define s3c_pm_debug_init() do { } while(0)
67 67
68#endif /* CONFIG_S3C2410_PM_DEBUG */ 68#endif /* CONFIG_SAMSUNG_PM_DEBUG */
69 69
70/* Save the UART configurations if we are configured for debug. */ 70/* Save the UART configurations if we are configured for debug. */
71 71
72unsigned char pm_uart_udivslot; 72unsigned char pm_uart_udivslot;
73 73
74#ifdef CONFIG_S3C2410_PM_DEBUG 74#ifdef CONFIG_SAMSUNG_PM_DEBUG
75 75
76struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; 76struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
77 77
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
index a318215ab535..46c9381e083b 100644
--- a/arch/arm/plat-s3c/pwm-clock.c
+++ b/arch/arm/plat-samsung/pwm-clock.c
@@ -130,20 +130,22 @@ static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
130 return 0; 130 return 0;
131} 131}
132 132
133static struct clk_ops clk_pwm_scaler_ops = {
134 .get_rate = clk_pwm_scaler_get_rate,
135 .set_rate = clk_pwm_scaler_set_rate,
136 .round_rate = clk_pwm_scaler_round_rate,
137};
138
133static struct clk clk_timer_scaler[] = { 139static struct clk clk_timer_scaler[] = {
134 [0] = { 140 [0] = {
135 .name = "pwm-scaler0", 141 .name = "pwm-scaler0",
136 .id = -1, 142 .id = -1,
137 .get_rate = clk_pwm_scaler_get_rate, 143 .ops = &clk_pwm_scaler_ops,
138 .set_rate = clk_pwm_scaler_set_rate,
139 .round_rate = clk_pwm_scaler_round_rate,
140 }, 144 },
141 [1] = { 145 [1] = {
142 .name = "pwm-scaler1", 146 .name = "pwm-scaler1",
143 .id = -1, 147 .id = -1,
144 .get_rate = clk_pwm_scaler_get_rate, 148 .ops = &clk_pwm_scaler_ops,
145 .set_rate = clk_pwm_scaler_set_rate,
146 .round_rate = clk_pwm_scaler_round_rate,
147 }, 149 },
148}; 150};
149 151
@@ -256,50 +258,46 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
256 return 0; 258 return 0;
257} 259}
258 260
261static struct clk_ops clk_tdiv_ops = {
262 .get_rate = clk_pwm_tdiv_get_rate,
263 .set_rate = clk_pwm_tdiv_set_rate,
264 .round_rate = clk_pwm_tdiv_round_rate,
265};
266
259static struct pwm_tdiv_clk clk_timer_tdiv[] = { 267static struct pwm_tdiv_clk clk_timer_tdiv[] = {
260 [0] = { 268 [0] = {
261 .clk = { 269 .clk = {
262 .name = "pwm-tdiv", 270 .name = "pwm-tdiv",
263 .parent = &clk_timer_scaler[0], 271 .ops = &clk_tdiv_ops,
264 .get_rate = clk_pwm_tdiv_get_rate, 272 .parent = &clk_timer_scaler[0],
265 .set_rate = clk_pwm_tdiv_set_rate,
266 .round_rate = clk_pwm_tdiv_round_rate,
267 }, 273 },
268 }, 274 },
269 [1] = { 275 [1] = {
270 .clk = { 276 .clk = {
271 .name = "pwm-tdiv", 277 .name = "pwm-tdiv",
272 .parent = &clk_timer_scaler[0], 278 .ops = &clk_tdiv_ops,
273 .get_rate = clk_pwm_tdiv_get_rate, 279 .parent = &clk_timer_scaler[0],
274 .set_rate = clk_pwm_tdiv_set_rate,
275 .round_rate = clk_pwm_tdiv_round_rate,
276 } 280 }
277 }, 281 },
278 [2] = { 282 [2] = {
279 .clk = { 283 .clk = {
280 .name = "pwm-tdiv", 284 .name = "pwm-tdiv",
281 .parent = &clk_timer_scaler[1], 285 .ops = &clk_tdiv_ops,
282 .get_rate = clk_pwm_tdiv_get_rate, 286 .parent = &clk_timer_scaler[1],
283 .set_rate = clk_pwm_tdiv_set_rate,
284 .round_rate = clk_pwm_tdiv_round_rate,
285 }, 287 },
286 }, 288 },
287 [3] = { 289 [3] = {
288 .clk = { 290 .clk = {
289 .name = "pwm-tdiv", 291 .name = "pwm-tdiv",
290 .parent = &clk_timer_scaler[1], 292 .ops = &clk_tdiv_ops,
291 .get_rate = clk_pwm_tdiv_get_rate, 293 .parent = &clk_timer_scaler[1],
292 .set_rate = clk_pwm_tdiv_set_rate,
293 .round_rate = clk_pwm_tdiv_round_rate,
294 }, 294 },
295 }, 295 },
296 [4] = { 296 [4] = {
297 .clk = { 297 .clk = {
298 .name = "pwm-tdiv", 298 .name = "pwm-tdiv",
299 .parent = &clk_timer_scaler[1], 299 .ops = &clk_tdiv_ops,
300 .get_rate = clk_pwm_tdiv_get_rate, 300 .parent = &clk_timer_scaler[1],
301 .set_rate = clk_pwm_tdiv_set_rate,
302 .round_rate = clk_pwm_tdiv_round_rate,
303 }, 301 },
304 }, 302 },
305}; 303};
@@ -356,31 +354,35 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
356 return 0; 354 return 0;
357} 355}
358 356
357static struct clk_ops clk_tin_ops = {
358 .set_parent = clk_pwm_tin_set_parent,
359};
360
359static struct clk clk_tin[] = { 361static struct clk clk_tin[] = {
360 [0] = { 362 [0] = {
361 .name = "pwm-tin", 363 .name = "pwm-tin",
362 .id = 0, 364 .id = 0,
363 .set_parent = clk_pwm_tin_set_parent, 365 .ops = &clk_tin_ops,
364 }, 366 },
365 [1] = { 367 [1] = {
366 .name = "pwm-tin", 368 .name = "pwm-tin",
367 .id = 1, 369 .id = 1,
368 .set_parent = clk_pwm_tin_set_parent, 370 .ops = &clk_tin_ops,
369 }, 371 },
370 [2] = { 372 [2] = {
371 .name = "pwm-tin", 373 .name = "pwm-tin",
372 .id = 2, 374 .id = 2,
373 .set_parent = clk_pwm_tin_set_parent, 375 .ops = &clk_tin_ops,
374 }, 376 },
375 [3] = { 377 [3] = {
376 .name = "pwm-tin", 378 .name = "pwm-tin",
377 .id = 3, 379 .id = 3,
378 .set_parent = clk_pwm_tin_set_parent, 380 .ops = &clk_tin_ops,
379 }, 381 },
380 [4] = { 382 [4] = {
381 .name = "pwm-tin", 383 .name = "pwm-tin",
382 .id = 4, 384 .id = 4,
383 .set_parent = clk_pwm_tin_set_parent, 385 .ops = &clk_tin_ops,
384 }, 386 },
385}; 387};
386 388
@@ -428,25 +430,15 @@ __init void s3c_pwmclk_init(void)
428 return; 430 return;
429 } 431 }
430 432
431 for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++) { 433 for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
432 clk_timer_scaler[clk].parent = clk_timers; 434 clk_timer_scaler[clk].parent = clk_timers;
433 ret = s3c24xx_register_clock(&clk_timer_scaler[clk]);
434 if (ret < 0) {
435 printk(KERN_ERR "error adding pwm scaler%d clock\n", clk);
436 return;
437 }
438 }
439 435
440 for (clk = 0; clk < ARRAY_SIZE(clk_timer_tclk); clk++) { 436 s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
441 ret = s3c24xx_register_clock(&clk_timer_tclk[clk]); 437 s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
442 if (ret < 0) {
443 printk(KERN_ERR "error adding pww tclk%d\n", clk);
444 return;
445 }
446 }
447 438
448 for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) { 439 for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
449 ret = clk_pwm_tdiv_register(clk); 440 ret = clk_pwm_tdiv_register(clk);
441
450 if (ret < 0) { 442 if (ret < 0) {
451 printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk); 443 printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
452 return; 444 return;
diff --git a/arch/arm/plat-s3c/pwm.c b/arch/arm/plat-samsung/pwm.c
index ef019f27b67d..ef019f27b67d 100644
--- a/arch/arm/plat-s3c/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-samsung/time.c
index 3b27b29da478..2231d80ad817 100644
--- a/arch/arm/plat-s3c/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c24xx/time.c 1/* linux/arch/arm/plat-samsung/time.c
2 * 2 *
3 * Copyright (C) 2003-2005 Simtec Electronics 3 * Copyright (C) 2003-2005 Simtec Electronics
4 * Ben Dooks, <ben@simtec.co.uk> 4 * Ben Dooks, <ben@simtec.co.uk>
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h
index 9e2d44f4e0fe..e53dd0d900f5 100644
--- a/arch/avr32/include/asm/ptrace.h
+++ b/arch/avr32/include/asm/ptrace.h
@@ -124,6 +124,8 @@ struct pt_regs {
124 124
125#include <asm/ocd.h> 125#include <asm/ocd.h>
126 126
127#define arch_has_single_step() (1)
128
127#define arch_ptrace_attach(child) ocd_enable(child) 129#define arch_ptrace_attach(child) ocd_enable(child)
128 130
129#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) 131#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
diff --git a/arch/avr32/kernel/ptrace.c b/arch/avr32/kernel/ptrace.c
index 1fed38fcf594..dd5b882aab40 100644
--- a/arch/avr32/kernel/ptrace.c
+++ b/arch/avr32/kernel/ptrace.c
@@ -28,9 +28,9 @@ static struct pt_regs *get_user_regs(struct task_struct *tsk)
28 THREAD_SIZE - sizeof(struct pt_regs)); 28 THREAD_SIZE - sizeof(struct pt_regs));
29} 29}
30 30
31static void ptrace_single_step(struct task_struct *tsk) 31static void user_enable_single_step(struct task_struct *tsk)
32{ 32{
33 pr_debug("ptrace_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n", 33 pr_debug("user_enable_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n",
34 tsk->pid, task_pt_regs(tsk)->pc, task_pt_regs(tsk)->sr); 34 tsk->pid, task_pt_regs(tsk)->pc, task_pt_regs(tsk)->sr);
35 35
36 /* 36 /*
@@ -49,6 +49,11 @@ static void ptrace_single_step(struct task_struct *tsk)
49 set_tsk_thread_flag(tsk, TIF_SINGLE_STEP); 49 set_tsk_thread_flag(tsk, TIF_SINGLE_STEP);
50} 50}
51 51
52void user_disable_single_step(struct task_struct *child)
53{
54 /* XXX(hch): a no-op here seems wrong.. */
55}
56
52/* 57/*
53 * Called by kernel/ptrace.c when detaching 58 * Called by kernel/ptrace.c when detaching
54 * 59 *
@@ -167,50 +172,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
167 ret = ptrace_write_user(child, addr, data); 172 ret = ptrace_write_user(child, addr, data);
168 break; 173 break;
169 174
170 /* continue and stop at next (return from) syscall */
171 case PTRACE_SYSCALL:
172 /* restart after signal */
173 case PTRACE_CONT:
174 ret = -EIO;
175 if (!valid_signal(data))
176 break;
177 if (request == PTRACE_SYSCALL)
178 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
179 else
180 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
181 child->exit_code = data;
182 /* XXX: Are we sure no breakpoints are active here? */
183 wake_up_process(child);
184 ret = 0;
185 break;
186
187 /*
188 * Make the child exit. Best I can do is send it a
189 * SIGKILL. Perhaps it should be put in the status that it
190 * wants to exit.
191 */
192 case PTRACE_KILL:
193 ret = 0;
194 if (child->exit_state == EXIT_ZOMBIE)
195 break;
196 child->exit_code = SIGKILL;
197 wake_up_process(child);
198 break;
199
200 /*
201 * execute single instruction.
202 */
203 case PTRACE_SINGLESTEP:
204 ret = -EIO;
205 if (!valid_signal(data))
206 break;
207 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
208 ptrace_single_step(child);
209 child->exit_code = data;
210 wake_up_process(child);
211 ret = 0;
212 break;
213
214 case PTRACE_GETREGS: 175 case PTRACE_GETREGS:
215 ret = ptrace_getregs(child, (void __user *)data); 176 ret = ptrace_getregs(child, (void __user *)data);
216 break; 177 break;
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index f9172ff30e5c..413a30314a6f 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -65,13 +65,6 @@ _dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
65 } 65 }
66} 66}
67 67
68/*
69 * Map a single buffer of the indicated size for DMA in streaming mode.
70 * The 32-bit bus address to use is returned.
71 *
72 * Once the device is given the dma address, the device owns this memory
73 * until either pci_unmap_single or pci_dma_sync_single is performed.
74 */
75static inline dma_addr_t 68static inline dma_addr_t
76dma_map_single(struct device *dev, void *ptr, size_t size, 69dma_map_single(struct device *dev, void *ptr, size_t size,
77 enum dma_data_direction dir) 70 enum dma_data_direction dir)
@@ -88,14 +81,6 @@ dma_map_page(struct device *dev, struct page *page,
88 return dma_map_single(dev, page_address(page) + offset, size, dir); 81 return dma_map_single(dev, page_address(page) + offset, size, dir);
89} 82}
90 83
91/*
92 * Unmap a single streaming mode DMA translation. The dma_addr and size
93 * must match what was provided for in a previous pci_map_single call. All
94 * other usages are undefined.
95 *
96 * After this call, reads by the cpu to the buffer are guarenteed to see
97 * whatever the device wrote there.
98 */
99static inline void 84static inline void
100dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 85dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
101 enum dma_data_direction dir) 86 enum dma_data_direction dir)
@@ -110,30 +95,9 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
110 dma_unmap_single(dev, dma_addr, size, dir); 95 dma_unmap_single(dev, dma_addr, size, dir);
111} 96}
112 97
113/*
114 * Map a set of buffers described by scatterlist in streaming
115 * mode for DMA. This is the scather-gather version of the
116 * above pci_map_single interface. Here the scatter gather list
117 * elements are each tagged with the appropriate dma address
118 * and length. They are obtained via sg_dma_{address,length}(SG).
119 *
120 * NOTE: An implementation may be able to use a smaller number of
121 * DMA address/length pairs than there are SG table elements.
122 * (for example via virtual mapping capabilities)
123 * The routine returns the number of addr/length pairs actually
124 * used, at most nents.
125 *
126 * Device ownership issues as mentioned above for pci_map_single are
127 * the same here.
128 */
129extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 98extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
130 enum dma_data_direction dir); 99 enum dma_data_direction dir);
131 100
132/*
133 * Unmap a set of streaming mode DMA translations.
134 * Again, cpu read rules concerning calls here are the same as for
135 * pci_unmap_single() above.
136 */
137static inline void 101static inline void
138dma_unmap_sg(struct device *dev, struct scatterlist *sg, 102dma_unmap_sg(struct device *dev, struct scatterlist *sg,
139 int nhwentries, enum dma_data_direction dir) 103 int nhwentries, enum dma_data_direction dir)
diff --git a/arch/blackfin/include/asm/nand.h b/arch/blackfin/include/asm/nand.h
index 3ae8b569edfc..3a1e79dfc8d9 100644
--- a/arch/blackfin/include/asm/nand.h
+++ b/arch/blackfin/include/asm/nand.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * BF5XX - NAND flash controller platfrom_device info 2 * BF5XX - NAND flash controller platform_device info
3 * 3 *
4 * Copyright 2007-2008 Analog Devices, Inc. 4 * Copyright 2007-2008 Analog Devices, Inc.
5 * 5 *
@@ -8,7 +8,7 @@
8 8
9/* struct bf5xx_nand_platform 9/* struct bf5xx_nand_platform
10 * 10 *
11 * define a interface between platfrom board specific code and 11 * define a interface between platform board specific code and
12 * bf54x NFC driver. 12 * bf54x NFC driver.
13 * 13 *
14 * nr_partitions = number of partitions pointed to be partitoons (or zero) 14 * nr_partitions = number of partitions pointed to be partitoons (or zero)
diff --git a/arch/cris/arch-v10/kernel/entry.S b/arch/cris/arch-v10/kernel/entry.S
index c52bef39e250..0d6420d087fd 100644
--- a/arch/cris/arch-v10/kernel/entry.S
+++ b/arch/cris/arch-v10/kernel/entry.S
@@ -692,7 +692,7 @@ sys_call_table:
692 .long sys_swapon 692 .long sys_swapon
693 .long sys_reboot 693 .long sys_reboot
694 .long sys_old_readdir 694 .long sys_old_readdir
695 .long old_mmap /* 90 */ 695 .long sys_old_mmap /* 90 */
696 .long sys_munmap 696 .long sys_munmap
697 .long sys_truncate 697 .long sys_truncate
698 .long sys_ftruncate 698 .long sys_ftruncate
diff --git a/arch/cris/arch-v10/kernel/ptrace.c b/arch/cris/arch-v10/kernel/ptrace.c
index ee505b2eb4db..e70c804e9377 100644
--- a/arch/cris/arch-v10/kernel/ptrace.c
+++ b/arch/cris/arch-v10/kernel/ptrace.c
@@ -127,57 +127,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
127 ret = 0; 127 ret = 0;
128 break; 128 break;
129 129
130 case PTRACE_SYSCALL:
131 case PTRACE_CONT:
132 ret = -EIO;
133
134 if (!valid_signal(data))
135 break;
136
137 if (request == PTRACE_SYSCALL) {
138 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
139 }
140 else {
141 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
142 }
143
144 child->exit_code = data;
145
146 /* TODO: make sure any pending breakpoint is killed */
147 wake_up_process(child);
148 ret = 0;
149
150 break;
151
152 /* Make the child exit by sending it a sigkill. */
153 case PTRACE_KILL:
154 ret = 0;
155
156 if (child->exit_state == EXIT_ZOMBIE)
157 break;
158
159 child->exit_code = SIGKILL;
160
161 /* TODO: make sure any pending breakpoint is killed */
162 wake_up_process(child);
163 break;
164
165 /* Set the trap flag. */
166 case PTRACE_SINGLESTEP:
167 ret = -EIO;
168
169 if (!valid_signal(data))
170 break;
171
172 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
173
174 /* TODO: set some clever breakpoint mechanism... */
175
176 child->exit_code = data;
177 wake_up_process(child);
178 ret = 0;
179 break;
180
181 /* Get all GP registers from the child. */ 130 /* Get all GP registers from the child. */
182 case PTRACE_GETREGS: { 131 case PTRACE_GETREGS: {
183 int i; 132 int i;
diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c
index 1734b467efa6..8f79163f1394 100644
--- a/arch/cris/arch-v10/lib/old_checksum.c
+++ b/arch/cris/arch-v10/lib/old_checksum.c
@@ -77,7 +77,7 @@ __wsum csum_partial(const void *p, int len, __wsum __sum)
77 sum += *buff++; 77 sum += *buff++;
78 78
79 if (endMarker > buff) 79 if (endMarker > buff)
80 sum += *(const u8 *)buff; /* add extra byte seperately */ 80 sum += *(const u8 *)buff; /* add extra byte separately */
81 81
82 BITOFF; 82 BITOFF;
83 return (__force __wsum)sum; 83 return (__force __wsum)sum;
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S
index 435b9671bd4b..1f39861eac8c 100644
--- a/arch/cris/arch-v32/kernel/entry.S
+++ b/arch/cris/arch-v32/kernel/entry.S
@@ -615,7 +615,7 @@ sys_call_table:
615 .long sys_swapon 615 .long sys_swapon
616 .long sys_reboot 616 .long sys_reboot
617 .long sys_old_readdir 617 .long sys_old_readdir
618 .long old_mmap /* 90 */ 618 .long sys_old_mmap /* 90 */
619 .long sys_munmap 619 .long sys_munmap
620 .long sys_truncate 620 .long sys_truncate
621 .long sys_ftruncate 621 .long sys_ftruncate
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
index dd401473f5b5..f4ebd1e7d0f5 100644
--- a/arch/cris/arch-v32/kernel/ptrace.c
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -78,6 +78,35 @@ int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
78 return 0; 78 return 0;
79} 79}
80 80
81void user_enable_single_step(struct task_struct *child)
82{
83 unsigned long tmp;
84
85 /*
86 * Set up SPC if not set already (in which case we have no other
87 * choice but to trust it).
88 */
89 if (!get_reg(child, PT_SPC)) {
90 /* In case we're stopped in a delay slot. */
91 tmp = get_reg(child, PT_ERP) & ~1;
92 put_reg(child, PT_SPC, tmp);
93 }
94 tmp = get_reg(child, PT_CCS) | SBIT_USER;
95 put_reg(child, PT_CCS, tmp);
96}
97
98void user_disable_single_step(struct task_struct *child)
99{
100 put_reg(child, PT_SPC, 0);
101
102 if (!get_debugreg(child->pid, PT_BP_CTRL)) {
103 unsigned long tmp;
104 /* If no h/w bp configured, disable S bit. */
105 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
106 put_reg(child, PT_CCS, tmp);
107 }
108}
109
81/* 110/*
82 * Called by kernel/ptrace.c when detaching. 111 * Called by kernel/ptrace.c when detaching.
83 * 112 *
@@ -89,8 +118,7 @@ ptrace_disable(struct task_struct *child)
89 unsigned long tmp; 118 unsigned long tmp;
90 119
91 /* Deconfigure SPC and S-bit. */ 120 /* Deconfigure SPC and S-bit. */
92 tmp = get_reg(child, PT_CCS) & ~SBIT_USER; 121 user_disable_single_step(child);
93 put_reg(child, PT_CCS, tmp);
94 put_reg(child, PT_SPC, 0); 122 put_reg(child, PT_SPC, 0);
95 123
96 /* Deconfigure any watchpoints associated with the child. */ 124 /* Deconfigure any watchpoints associated with the child. */
@@ -169,83 +197,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
169 ret = 0; 197 ret = 0;
170 break; 198 break;
171 199
172 case PTRACE_SYSCALL:
173 case PTRACE_CONT:
174 ret = -EIO;
175
176 if (!valid_signal(data))
177 break;
178
179 /* Continue means no single-step. */
180 put_reg(child, PT_SPC, 0);
181
182 if (!get_debugreg(child->pid, PT_BP_CTRL)) {
183 unsigned long tmp;
184 /* If no h/w bp configured, disable S bit. */
185 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
186 put_reg(child, PT_CCS, tmp);
187 }
188
189 if (request == PTRACE_SYSCALL) {
190 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
191 }
192 else {
193 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
194 }
195
196 child->exit_code = data;
197
198 /* TODO: make sure any pending breakpoint is killed */
199 wake_up_process(child);
200 ret = 0;
201
202 break;
203
204 /* Make the child exit by sending it a sigkill. */
205 case PTRACE_KILL:
206 ret = 0;
207
208 if (child->exit_state == EXIT_ZOMBIE)
209 break;
210
211 child->exit_code = SIGKILL;
212
213 /* Deconfigure single-step and h/w bp. */
214 ptrace_disable(child);
215
216 /* TODO: make sure any pending breakpoint is killed */
217 wake_up_process(child);
218 break;
219
220 /* Set the trap flag. */
221 case PTRACE_SINGLESTEP: {
222 unsigned long tmp;
223 ret = -EIO;
224
225 /* Set up SPC if not set already (in which case we have
226 no other choice but to trust it). */
227 if (!get_reg(child, PT_SPC)) {
228 /* In case we're stopped in a delay slot. */
229 tmp = get_reg(child, PT_ERP) & ~1;
230 put_reg(child, PT_SPC, tmp);
231 }
232 tmp = get_reg(child, PT_CCS) | SBIT_USER;
233 put_reg(child, PT_CCS, tmp);
234
235 if (!valid_signal(data))
236 break;
237
238 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
239
240 /* TODO: set some clever breakpoint mechanism... */
241
242 child->exit_code = data;
243 wake_up_process(child);
244 ret = 0;
245 break;
246
247 }
248
249 /* Get all GP registers from the child. */ 200 /* Get all GP registers from the child. */
250 case PTRACE_GETREGS: { 201 case PTRACE_GETREGS: {
251 int i; 202 int i;
diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c
index 6779bcb28ab0..c030d020660a 100644
--- a/arch/cris/arch-v32/mm/tlb.c
+++ b/arch/cris/arch-v32/mm/tlb.c
@@ -189,7 +189,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
189 spin_unlock(&mmu_context_lock); 189 spin_unlock(&mmu_context_lock);
190 190
191 /* 191 /*
192 * Remember the pgd for the fault handlers. Keep a seperate 192 * Remember the pgd for the fault handlers. Keep a separate
193 * copy of it because current and active_mm might be invalid 193 * copy of it because current and active_mm might be invalid
194 * at points where * there's still a need to derefer the pgd. 194 * at points where * there's still a need to derefer the pgd.
195 */ 195 */
diff --git a/arch/cris/include/arch-v32/arch/ptrace.h b/arch/cris/include/arch-v32/arch/ptrace.h
index 41f4e8662bc2..ffca8d0f2e17 100644
--- a/arch/cris/include/arch-v32/arch/ptrace.h
+++ b/arch/cris/include/arch-v32/arch/ptrace.h
@@ -108,6 +108,7 @@ struct switch_stack {
108 108
109#ifdef __KERNEL__ 109#ifdef __KERNEL__
110 110
111#define arch_has_single_step() (1)
111#define user_mode(regs) (((regs)->ccs & (1 << (U_CCS_BITNR + CCS_SHIFT))) != 0) 112#define user_mode(regs) (((regs)->ccs & (1 << (U_CCS_BITNR + CCS_SHIFT))) != 0)
112#define instruction_pointer(regs) ((regs)->erp) 113#define instruction_pointer(regs) ((regs)->erp)
113extern void show_regs(struct pt_regs *); 114extern void show_regs(struct pt_regs *);
diff --git a/arch/cris/include/asm/pci.h b/arch/cris/include/asm/pci.h
index 730ce40fdd0f..9f1cd56da28c 100644
--- a/arch/cris/include/asm/pci.h
+++ b/arch/cris/include/asm/pci.h
@@ -44,14 +44,6 @@ struct pci_dev;
44 */ 44 */
45#define PCI_DMA_BUS_IS_PHYS (1) 45#define PCI_DMA_BUS_IS_PHYS (1)
46 46
47/* pci_unmap_{page,single} is a nop so... */
48#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
49#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
50#define pci_unmap_addr(PTR, ADDR_NAME) (0)
51#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
52#define pci_unmap_len(PTR, LEN_NAME) (0)
53#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
54
55#define HAVE_PCI_MMAP 47#define HAVE_PCI_MMAP
56extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 48extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
57 enum pci_mmap_state mmap_state, int write_combine); 49 enum pci_mmap_state mmap_state, int write_combine);
diff --git a/arch/cris/include/asm/unistd.h b/arch/cris/include/asm/unistd.h
index c17079388bb9..f6fad83b3a8c 100644
--- a/arch/cris/include/asm/unistd.h
+++ b/arch/cris/include/asm/unistd.h
@@ -352,6 +352,7 @@
352#define __ARCH_WANT_STAT64 352#define __ARCH_WANT_STAT64
353#define __ARCH_WANT_SYS_ALARM 353#define __ARCH_WANT_SYS_ALARM
354#define __ARCH_WANT_SYS_GETHOSTNAME 354#define __ARCH_WANT_SYS_GETHOSTNAME
355#define __ARCH_WANT_SYS_IPC
355#define __ARCH_WANT_SYS_PAUSE 356#define __ARCH_WANT_SYS_PAUSE
356#define __ARCH_WANT_SYS_SGETMASK 357#define __ARCH_WANT_SYS_SGETMASK
357#define __ARCH_WANT_SYS_SIGNAL 358#define __ARCH_WANT_SYS_SIGNAL
@@ -364,6 +365,7 @@
364#define __ARCH_WANT_SYS_LLSEEK 365#define __ARCH_WANT_SYS_LLSEEK
365#define __ARCH_WANT_SYS_NICE 366#define __ARCH_WANT_SYS_NICE
366#define __ARCH_WANT_SYS_OLD_GETRLIMIT 367#define __ARCH_WANT_SYS_OLD_GETRLIMIT
368#define __ARCH_WANT_SYS_OLD_MMAP
367#define __ARCH_WANT_SYS_OLDUMOUNT 369#define __ARCH_WANT_SYS_OLDUMOUNT
368#define __ARCH_WANT_SYS_SIGPENDING 370#define __ARCH_WANT_SYS_SIGPENDING
369#define __ARCH_WANT_SYS_SIGPROCMASK 371#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index c2bbb1ac98a9..7aa036ec78ff 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -26,24 +26,6 @@
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/segment.h> 27#include <asm/segment.h>
28 28
29asmlinkage unsigned long old_mmap(unsigned long __user *args)
30{
31 unsigned long buffer[6];
32 int err = -EFAULT;
33
34 if (copy_from_user(&buffer, args, sizeof(buffer)))
35 goto out;
36
37 err = -EINVAL;
38 if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */
39 goto out;
40
41 err = sys_mmap_pgoff(buffer[0], buffer[1], buffer[2], buffer[3],
42 buffer[4], buffer[5] >> PAGE_SHIFT);
43out:
44 return err;
45}
46
47asmlinkage long 29asmlinkage long
48sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 30sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
49 unsigned long flags, unsigned long fd, unsigned long pgoff) 31 unsigned long flags, unsigned long fd, unsigned long pgoff)
@@ -51,81 +33,3 @@ sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
51 /* bug(?): 8Kb pages here */ 33 /* bug(?): 8Kb pages here */
52 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); 34 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
53} 35}
54
55/*
56 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
57 *
58 * This is really horribly ugly. (same as arch/i386)
59 */
60
61asmlinkage int sys_ipc (uint call, int first, int second,
62 int third, void __user *ptr, long fifth)
63{
64 int version, ret;
65
66 version = call >> 16; /* hack for backward compatibility */
67 call &= 0xffff;
68
69 switch (call) {
70 case SEMOP:
71 return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
72 case SEMTIMEDOP:
73 return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
74 (const struct timespec __user *)fifth);
75
76 case SEMGET:
77 return sys_semget (first, second, third);
78 case SEMCTL: {
79 union semun fourth;
80 if (!ptr)
81 return -EINVAL;
82 if (get_user(fourth.__pad, (void * __user *) ptr))
83 return -EFAULT;
84 return sys_semctl (first, second, third, fourth);
85 }
86
87 case MSGSND:
88 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
89 second, third);
90 case MSGRCV:
91 switch (version) {
92 case 0: {
93 struct ipc_kludge tmp;
94 if (!ptr)
95 return -EINVAL;
96
97 if (copy_from_user(&tmp,
98 (struct ipc_kludge __user *) ptr,
99 sizeof (tmp)))
100 return -EFAULT;
101 return sys_msgrcv (first, tmp.msgp, second,
102 tmp.msgtyp, third);
103 }
104 default:
105 return sys_msgrcv (first,
106 (struct msgbuf __user *) ptr,
107 second, fifth, third);
108 }
109 case MSGGET:
110 return sys_msgget ((key_t) first, second);
111 case MSGCTL:
112 return sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
113
114 case SHMAT: {
115 ulong raddr;
116 ret = do_shmat (first, (char __user *) ptr, second, &raddr);
117 if (ret)
118 return ret;
119 return put_user (raddr, (ulong __user *) third);
120 }
121 case SHMDT:
122 return sys_shmdt ((char __user *)ptr);
123 case SHMGET:
124 return sys_shmget (first, second, third);
125 case SHMCTL:
126 return sys_shmctl (first, second,
127 (struct shmid_ds __user *) ptr);
128 default:
129 return -ENOSYS;
130 }
131}
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h
index b2898877c07b..6af5d83e2fb2 100644
--- a/arch/frv/include/asm/dma-mapping.h
+++ b/arch/frv/include/asm/dma-mapping.h
@@ -7,6 +7,11 @@
7#include <asm/scatterlist.h> 7#include <asm/scatterlist.h>
8#include <asm/io.h> 8#include <asm/io.h>
9 9
10/*
11 * See Documentation/DMA-API.txt for the description of how the
12 * following DMA API should work.
13 */
14
10#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 15#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
11#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 16#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
12 17
@@ -16,24 +21,9 @@ extern unsigned long __nongprelbss dma_coherent_mem_end;
16void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp); 21void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
17void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); 22void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
18 23
19/*
20 * Map a single buffer of the indicated size for DMA in streaming mode.
21 * The 32-bit bus address to use is returned.
22 *
23 * Once the device is given the dma address, the device owns this memory
24 * until either pci_unmap_single or pci_dma_sync_single is performed.
25 */
26extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, 24extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
27 enum dma_data_direction direction); 25 enum dma_data_direction direction);
28 26
29/*
30 * Unmap a single streaming mode DMA translation. The dma_addr and size
31 * must match what was provided for in a previous pci_map_single call. All
32 * other usages are undefined.
33 *
34 * After this call, reads by the cpu to the buffer are guarenteed to see
35 * whatever the device wrote there.
36 */
37static inline 27static inline
38void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 28void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
39 enum dma_data_direction direction) 29 enum dma_data_direction direction)
@@ -41,30 +31,9 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
41 BUG_ON(direction == DMA_NONE); 31 BUG_ON(direction == DMA_NONE);
42} 32}
43 33
44/*
45 * Map a set of buffers described by scatterlist in streaming
46 * mode for DMA. This is the scather-gather version of the
47 * above pci_map_single interface. Here the scatter gather list
48 * elements are each tagged with the appropriate dma address
49 * and length. They are obtained via sg_dma_{address,length}(SG).
50 *
51 * NOTE: An implementation may be able to use a smaller number of
52 * DMA address/length pairs than there are SG table elements.
53 * (for example via virtual mapping capabilities)
54 * The routine returns the number of addr/length pairs actually
55 * used, at most nents.
56 *
57 * Device ownership issues as mentioned above for pci_map_single are
58 * the same here.
59 */
60extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 34extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
61 enum dma_data_direction direction); 35 enum dma_data_direction direction);
62 36
63/*
64 * Unmap a set of streaming mode DMA translations.
65 * Again, cpu read rules concerning calls here are the same as for
66 * pci_unmap_single() above.
67 */
68static inline 37static inline
69void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, 38void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
70 enum dma_data_direction direction) 39 enum dma_data_direction direction)
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index 8c7260a3cd41..0d5997909850 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -43,14 +43,6 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
43/* Return the index of the PCI controller for device PDEV. */ 43/* Return the index of the PCI controller for device PDEV. */
44#define pci_controller_num(PDEV) (0) 44#define pci_controller_num(PDEV) (0)
45 45
46/* pci_unmap_{page,single} is a nop so... */
47#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
48#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
49#define pci_unmap_addr(PTR, ADDR_NAME) (0)
50#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
51#define pci_unmap_len(PTR, LEN_NAME) (0)
52#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
53
54#ifdef CONFIG_PCI 46#ifdef CONFIG_PCI
55static inline void pci_dma_burst_advice(struct pci_dev *pdev, 47static inline void pci_dma_burst_advice(struct pci_dev *pdev,
56 enum pci_dma_burst_strategy *strat, 48 enum pci_dma_burst_strategy *strat,
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
index a54b535c9e49..6bfad4cf1907 100644
--- a/arch/frv/include/asm/ptrace.h
+++ b/arch/frv/include/asm/ptrace.h
@@ -84,8 +84,6 @@ extern void show_regs(struct pt_regs *);
84#define task_pt_regs(task) ((task)->thread.frame0) 84#define task_pt_regs(task) ((task)->thread.frame0)
85 85
86#define arch_has_single_step() (1) 86#define arch_has_single_step() (1)
87extern void user_enable_single_step(struct task_struct *);
88extern void user_disable_single_step(struct task_struct *);
89 87
90#endif /* !__ASSEMBLY__ */ 88#endif /* !__ASSEMBLY__ */
91#endif /* __KERNEL__ */ 89#endif /* __KERNEL__ */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index be6ef0f5cd42..b28da499e22a 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -354,6 +354,7 @@
354#define __ARCH_WANT_STAT64 354#define __ARCH_WANT_STAT64
355#define __ARCH_WANT_SYS_ALARM 355#define __ARCH_WANT_SYS_ALARM
356/* #define __ARCH_WANT_SYS_GETHOSTNAME */ 356/* #define __ARCH_WANT_SYS_GETHOSTNAME */
357#define __ARCH_WANT_SYS_IPC
357#define __ARCH_WANT_SYS_PAUSE 358#define __ARCH_WANT_SYS_PAUSE
358/* #define __ARCH_WANT_SYS_SGETMASK */ 359/* #define __ARCH_WANT_SYS_SGETMASK */
359/* #define __ARCH_WANT_SYS_SIGNAL */ 360/* #define __ARCH_WANT_SYS_SIGNAL */
diff --git a/arch/frv/kernel/sys_frv.c b/arch/frv/kernel/sys_frv.c
index 1d3d4c9e2521..9c4980825bbb 100644
--- a/arch/frv/kernel/sys_frv.c
+++ b/arch/frv/kernel/sys_frv.c
@@ -42,92 +42,3 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
42 return sys_mmap_pgoff(addr, len, prot, flags, fd, 42 return sys_mmap_pgoff(addr, len, prot, flags, fd,
43 pgoff >> (PAGE_SHIFT - 12)); 43 pgoff >> (PAGE_SHIFT - 12));
44} 44}
45
46/*
47 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
48 *
49 * This is really horribly ugly.
50 */
51asmlinkage long sys_ipc(unsigned long call,
52 unsigned long first,
53 unsigned long second,
54 unsigned long third,
55 void __user *ptr,
56 unsigned long fifth)
57{
58 int version, ret;
59
60 version = call >> 16; /* hack for backward compatibility */
61 call &= 0xffff;
62
63 switch (call) {
64 case SEMOP:
65 return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
66 case SEMTIMEDOP:
67 return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
68 (const struct timespec __user *)fifth);
69
70 case SEMGET:
71 return sys_semget (first, second, third);
72 case SEMCTL: {
73 union semun fourth;
74 if (!ptr)
75 return -EINVAL;
76 if (get_user(fourth.__pad, (void * __user *) ptr))
77 return -EFAULT;
78 return sys_semctl (first, second, third, fourth);
79 }
80
81 case MSGSND:
82 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
83 second, third);
84 case MSGRCV:
85 switch (version) {
86 case 0: {
87 struct ipc_kludge tmp;
88 if (!ptr)
89 return -EINVAL;
90
91 if (copy_from_user(&tmp,
92 (struct ipc_kludge __user *) ptr,
93 sizeof (tmp)))
94 return -EFAULT;
95 return sys_msgrcv (first, tmp.msgp, second,
96 tmp.msgtyp, third);
97 }
98 default:
99 return sys_msgrcv (first,
100 (struct msgbuf __user *) ptr,
101 second, fifth, third);
102 }
103 case MSGGET:
104 return sys_msgget ((key_t) first, second);
105 case MSGCTL:
106 return sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
107
108 case SHMAT:
109 switch (version) {
110 default: {
111 ulong raddr;
112 ret = do_shmat (first, (char __user *) ptr, second, &raddr);
113 if (ret)
114 return ret;
115 return put_user (raddr, (ulong __user *) third);
116 }
117 case 1: /* iBCS2 emulator entry point */
118 if (!segment_eq(get_fs(), get_ds()))
119 return -EINVAL;
120 /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
121 return do_shmat (first, (char __user *) ptr, second, (ulong *) third);
122 }
123 case SHMDT:
124 return sys_shmdt ((char __user *)ptr);
125 case SHMGET:
126 return sys_shmget (first, second, third);
127 case SHMCTL:
128 return sys_shmctl (first, second,
129 (struct shmid_ds __user *) ptr);
130 default:
131 return -ENOSYS;
132 }
133}
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
index 4e1ba0b15443..e47857f889b6 100644
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c
@@ -106,13 +106,6 @@ void dma_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_
106 106
107EXPORT_SYMBOL(dma_free_coherent); 107EXPORT_SYMBOL(dma_free_coherent);
108 108
109/*
110 * Map a single buffer of the indicated size for DMA in streaming mode.
111 * The 32-bit bus address to use is returned.
112 *
113 * Once the device is given the dma address, the device owns this memory
114 * until either dma_unmap_single or pci_dma_sync_single is performed.
115 */
116dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, 109dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
117 enum dma_data_direction direction) 110 enum dma_data_direction direction)
118{ 111{
@@ -125,22 +118,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
125 118
126EXPORT_SYMBOL(dma_map_single); 119EXPORT_SYMBOL(dma_map_single);
127 120
128/*
129 * Map a set of buffers described by scatterlist in streaming
130 * mode for DMA. This is the scather-gather version of the
131 * above dma_map_single interface. Here the scatter gather list
132 * elements are each tagged with the appropriate dma address
133 * and length. They are obtained via sg_dma_{address,length}(SG).
134 *
135 * NOTE: An implementation may be able to use a smaller number of
136 * DMA address/length pairs than there are SG table elements.
137 * (for example via virtual mapping capabilities)
138 * The routine returns the number of addr/length pairs actually
139 * used, at most nents.
140 *
141 * Device ownership issues as mentioned above for dma_map_single are
142 * the same here.
143 */
144int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 121int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
145 enum dma_data_direction direction) 122 enum dma_data_direction direction)
146{ 123{
@@ -157,13 +134,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
157 134
158EXPORT_SYMBOL(dma_map_sg); 135EXPORT_SYMBOL(dma_map_sg);
159 136
160/*
161 * Map a single page of the indicated size for DMA in streaming mode.
162 * The 32-bit bus address to use is returned.
163 *
164 * Device ownership issues as mentioned above for dma_map_single are
165 * the same here.
166 */
167dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, 137dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
168 size_t size, enum dma_data_direction direction) 138 size_t size, enum dma_data_direction direction)
169{ 139{
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
index 45954f0813dc..2c912e805162 100644
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ b/arch/frv/mb93090-mb00/pci-dma.c
@@ -38,13 +38,6 @@ void dma_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_
38 38
39EXPORT_SYMBOL(dma_free_coherent); 39EXPORT_SYMBOL(dma_free_coherent);
40 40
41/*
42 * Map a single buffer of the indicated size for DMA in streaming mode.
43 * The 32-bit bus address to use is returned.
44 *
45 * Once the device is given the dma address, the device owns this memory
46 * until either pci_unmap_single or pci_dma_sync_single is performed.
47 */
48dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, 41dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
49 enum dma_data_direction direction) 42 enum dma_data_direction direction)
50{ 43{
@@ -57,22 +50,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
57 50
58EXPORT_SYMBOL(dma_map_single); 51EXPORT_SYMBOL(dma_map_single);
59 52
60/*
61 * Map a set of buffers described by scatterlist in streaming
62 * mode for DMA. This is the scather-gather version of the
63 * above dma_map_single interface. Here the scatter gather list
64 * elements are each tagged with the appropriate dma address
65 * and length. They are obtained via sg_dma_{address,length}(SG).
66 *
67 * NOTE: An implementation may be able to use a smaller number of
68 * DMA address/length pairs than there are SG table elements.
69 * (for example via virtual mapping capabilities)
70 * The routine returns the number of addr/length pairs actually
71 * used, at most nents.
72 *
73 * Device ownership issues as mentioned above for dma_map_single are
74 * the same here.
75 */
76int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 53int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
77 enum dma_data_direction direction) 54 enum dma_data_direction direction)
78{ 55{
@@ -103,13 +80,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
103 80
104EXPORT_SYMBOL(dma_map_sg); 81EXPORT_SYMBOL(dma_map_sg);
105 82
106/*
107 * Map a single page of the indicated size for DMA in streaming mode.
108 * The 32-bit bus address to use is returned.
109 *
110 * Device ownership issues as mentioned above for dma_map_single are
111 * the same here.
112 */
113dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, 83dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
114 size_t size, enum dma_data_direction direction) 84 size_t size, enum dma_data_direction direction)
115{ 85{
diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index 33e842f3284b..c1a8df22080f 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -25,7 +25,7 @@
25 * memory location directly. 25 * memory location directly.
26 */ 26 */
27/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates 27/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
28 * two accesses to memory, which may be undesireable for some devices. 28 * two accesses to memory, which may be undesirable for some devices.
29 */ 29 */
30 30
31/* 31/*
diff --git a/arch/h8300/include/asm/ptrace.h b/arch/h8300/include/asm/ptrace.h
index c2e05e4b512e..d866c0efba87 100644
--- a/arch/h8300/include/asm/ptrace.h
+++ b/arch/h8300/include/asm/ptrace.h
@@ -55,6 +55,8 @@ struct pt_regs {
55/* Find the stack offset for a register, relative to thread.esp0. */ 55/* Find the stack offset for a register, relative to thread.esp0. */
56#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg) 56#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
57 57
58#define arch_has_single_step() (1)
59
58#define user_mode(regs) (!((regs)->ccr & PS_S)) 60#define user_mode(regs) (!((regs)->ccr & PS_S))
59#define instruction_pointer(regs) ((regs)->pc) 61#define instruction_pointer(regs) ((regs)->pc)
60#define profile_pc(regs) instruction_pointer(regs) 62#define profile_pc(regs) instruction_pointer(regs)
diff --git a/arch/h8300/include/asm/unistd.h b/arch/h8300/include/asm/unistd.h
index 99f3c3561ecb..50f2c5a36591 100644
--- a/arch/h8300/include/asm/unistd.h
+++ b/arch/h8300/include/asm/unistd.h
@@ -336,6 +336,7 @@
336#define __ARCH_WANT_STAT64 336#define __ARCH_WANT_STAT64
337#define __ARCH_WANT_SYS_ALARM 337#define __ARCH_WANT_SYS_ALARM
338#define __ARCH_WANT_SYS_GETHOSTNAME 338#define __ARCH_WANT_SYS_GETHOSTNAME
339#define __ARCH_WANT_SYS_IPC
339#define __ARCH_WANT_SYS_PAUSE 340#define __ARCH_WANT_SYS_PAUSE
340#define __ARCH_WANT_SYS_SGETMASK 341#define __ARCH_WANT_SYS_SGETMASK
341#define __ARCH_WANT_SYS_SIGNAL 342#define __ARCH_WANT_SYS_SIGNAL
@@ -348,6 +349,8 @@
348#define __ARCH_WANT_SYS_LLSEEK 349#define __ARCH_WANT_SYS_LLSEEK
349#define __ARCH_WANT_SYS_NICE 350#define __ARCH_WANT_SYS_NICE
350#define __ARCH_WANT_SYS_OLD_GETRLIMIT 351#define __ARCH_WANT_SYS_OLD_GETRLIMIT
352#define __ARCH_WANT_SYS_OLD_MMAP
353#define __ARCH_WANT_SYS_OLD_SELECT
351#define __ARCH_WANT_SYS_OLDUMOUNT 354#define __ARCH_WANT_SYS_OLDUMOUNT
352#define __ARCH_WANT_SYS_SIGPENDING 355#define __ARCH_WANT_SYS_SIGPENDING
353#define __ARCH_WANT_SYS_SIGPROCMASK 356#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
index d32bbf02fc48..df114122ebdf 100644
--- a/arch/h8300/kernel/ptrace.c
+++ b/arch/h8300/kernel/ptrace.c
@@ -34,25 +34,20 @@
34/* cpu depend functions */ 34/* cpu depend functions */
35extern long h8300_get_reg(struct task_struct *task, int regno); 35extern long h8300_get_reg(struct task_struct *task, int regno);
36extern int h8300_put_reg(struct task_struct *task, int regno, unsigned long data); 36extern int h8300_put_reg(struct task_struct *task, int regno, unsigned long data);
37extern void h8300_disable_trace(struct task_struct *child); 37
38extern void h8300_enable_trace(struct task_struct *child); 38
39void user_disable_single_step(struct task_struct *child)
40{
41}
39 42
40/* 43/*
41 * does not yet catch signals sent when the child dies. 44 * does not yet catch signals sent when the child dies.
42 * in exit.c or in signal.c. 45 * in exit.c or in signal.c.
43 */ 46 */
44 47
45inline
46static int read_long(struct task_struct * tsk, unsigned long addr,
47 unsigned long * result)
48{
49 *result = *(unsigned long *)addr;
50 return 0;
51}
52
53void ptrace_disable(struct task_struct *child) 48void ptrace_disable(struct task_struct *child)
54{ 49{
55 h8300_disable_trace(child); 50 user_disable_single_step(child);
56} 51}
57 52
58long arch_ptrace(struct task_struct *child, long request, long addr, long data) 53long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -60,17 +55,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
60 int ret; 55 int ret;
61 56
62 switch (request) { 57 switch (request) {
63 case PTRACE_PEEKTEXT: /* read word at location addr. */
64 case PTRACE_PEEKDATA: {
65 unsigned long tmp;
66
67 ret = read_long(child, addr, &tmp);
68 if (ret < 0)
69 break ;
70 ret = put_user(tmp, (unsigned long *) data);
71 break ;
72 }
73
74 /* read the word at location addr in the USER area. */ 58 /* read the word at location addr in the USER area. */
75 case PTRACE_PEEKUSR: { 59 case PTRACE_PEEKUSR: {
76 unsigned long tmp = 0; 60 unsigned long tmp = 0;
@@ -109,11 +93,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
109 } 93 }
110 94
111 /* when I and D space are separate, this will have to be fixed. */ 95 /* when I and D space are separate, this will have to be fixed. */
112 case PTRACE_POKETEXT: /* write the word at location addr. */
113 case PTRACE_POKEDATA:
114 ret = generic_ptrace_pokedata(child, addr, data);
115 break;
116
117 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ 96 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
118 if ((addr & 3) || addr < 0 || addr >= sizeof(struct user)) { 97 if ((addr & 3) || addr < 0 || addr >= sizeof(struct user)) {
119 ret = -EIO; 98 ret = -EIO;
@@ -131,53 +110,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
131 } 110 }
132 ret = -EIO; 111 ret = -EIO;
133 break ; 112 break ;
134 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
135 case PTRACE_CONT: { /* restart after signal. */
136 ret = -EIO;
137 if (!valid_signal(data))
138 break ;
139 if (request == PTRACE_SYSCALL)
140 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
141 else
142 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
143 child->exit_code = data;
144 wake_up_process(child);
145 /* make sure the single step bit is not set. */
146 h8300_disable_trace(child);
147 ret = 0;
148 }
149
150/*
151 * make the child exit. Best I can do is send it a sigkill.
152 * perhaps it should be put in the status that it wants to
153 * exit.
154 */
155 case PTRACE_KILL: {
156
157 ret = 0;
158 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
159 break;
160 child->exit_code = SIGKILL;
161 h8300_disable_trace(child);
162 wake_up_process(child);
163 break;
164 }
165
166 case PTRACE_SINGLESTEP: { /* set the trap flag. */
167 ret = -EIO;
168 if (!valid_signal(data))
169 break;
170 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
171 child->exit_code = data;
172 h8300_enable_trace(child);
173 wake_up_process(child);
174 ret = 0;
175 break;
176 }
177
178 case PTRACE_DETACH: /* detach a process that was attached. */
179 ret = ptrace_detach(child, data);
180 break;
181 113
182 case PTRACE_GETREGS: { /* Get all gp regs from the child. */ 114 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
183 int i; 115 int i;
@@ -210,7 +142,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
210 } 142 }
211 143
212 default: 144 default:
213 ret = -EIO; 145 ret = ptrace_request(child, request, addr, data);
214 break; 146 break;
215 } 147 }
216 return ret; 148 return ret;
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
index b5969db0ca10..f9b3f44da69f 100644
--- a/arch/h8300/kernel/sys_h8300.c
+++ b/arch/h8300/kernel/sys_h8300.c
@@ -26,144 +26,6 @@
26#include <asm/traps.h> 26#include <asm/traps.h>
27#include <asm/unistd.h> 27#include <asm/unistd.h>
28 28
29/*
30 * Perform the select(nd, in, out, ex, tv) and mmap() system
31 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
32 * handle more than 4 system call parameters, so these system calls
33 * used a memory block for parameter passing..
34 */
35
36struct mmap_arg_struct {
37 unsigned long addr;
38 unsigned long len;
39 unsigned long prot;
40 unsigned long flags;
41 unsigned long fd;
42 unsigned long offset;
43};
44
45asmlinkage int old_mmap(struct mmap_arg_struct *arg)
46{
47 struct mmap_arg_struct a;
48 int error = -EFAULT;
49
50 if (copy_from_user(&a, arg, sizeof(a)))
51 goto out;
52
53 error = -EINVAL;
54 if (a.offset & ~PAGE_MASK)
55 goto out;
56
57 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
58 a.offset >> PAGE_SHIFT);
59out:
60 return error;
61}
62
63struct sel_arg_struct {
64 unsigned long n;
65 fd_set *inp, *outp, *exp;
66 struct timeval *tvp;
67};
68
69asmlinkage int old_select(struct sel_arg_struct *arg)
70{
71 struct sel_arg_struct a;
72
73 if (copy_from_user(&a, arg, sizeof(a)))
74 return -EFAULT;
75 /* sys_select() does the appropriate kernel locking */
76 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
77}
78
79/*
80 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
81 *
82 * This is really horribly ugly.
83 */
84asmlinkage int sys_ipc (uint call, int first, int second,
85 int third, void *ptr, long fifth)
86{
87 int version, ret;
88
89 version = call >> 16; /* hack for backward compatibility */
90 call &= 0xffff;
91
92 if (call <= SEMCTL)
93 switch (call) {
94 case SEMOP:
95 return sys_semop (first, (struct sembuf *)ptr, second);
96 case SEMGET:
97 return sys_semget (first, second, third);
98 case SEMCTL: {
99 union semun fourth;
100 if (!ptr)
101 return -EINVAL;
102 if (get_user(fourth.__pad, (void **) ptr))
103 return -EFAULT;
104 return sys_semctl (first, second, third, fourth);
105 }
106 default:
107 return -EINVAL;
108 }
109 if (call <= MSGCTL)
110 switch (call) {
111 case MSGSND:
112 return sys_msgsnd (first, (struct msgbuf *) ptr,
113 second, third);
114 case MSGRCV:
115 switch (version) {
116 case 0: {
117 struct ipc_kludge tmp;
118 if (!ptr)
119 return -EINVAL;
120 if (copy_from_user (&tmp,
121 (struct ipc_kludge *)ptr,
122 sizeof (tmp)))
123 return -EFAULT;
124 return sys_msgrcv (first, tmp.msgp, second,
125 tmp.msgtyp, third);
126 }
127 default:
128 return sys_msgrcv (first,
129 (struct msgbuf *) ptr,
130 second, fifth, third);
131 }
132 case MSGGET:
133 return sys_msgget ((key_t) first, second);
134 case MSGCTL:
135 return sys_msgctl (first, second,
136 (struct msqid_ds *) ptr);
137 default:
138 return -EINVAL;
139 }
140 if (call <= SHMCTL)
141 switch (call) {
142 case SHMAT:
143 switch (version) {
144 default: {
145 ulong raddr;
146 ret = do_shmat (first, (char *) ptr,
147 second, &raddr);
148 if (ret)
149 return ret;
150 return put_user (raddr, (ulong *) third);
151 }
152 }
153 case SHMDT:
154 return sys_shmdt ((char *)ptr);
155 case SHMGET:
156 return sys_shmget (first, second, third);
157 case SHMCTL:
158 return sys_shmctl (first, second,
159 (struct shmid_ds *) ptr);
160 default:
161 return -EINVAL;
162 }
163
164 return -EINVAL;
165}
166
167/* sys_cacheflush -- no support. */ 29/* sys_cacheflush -- no support. */
168asmlinkage int 30asmlinkage int
169sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) 31sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
diff --git a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S
index 2d69881eda6a..faefaff7d43d 100644
--- a/arch/h8300/kernel/syscalls.S
+++ b/arch/h8300/kernel/syscalls.S
@@ -96,7 +96,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
96 .long SYMBOL_NAME(sys_settimeofday) 96 .long SYMBOL_NAME(sys_settimeofday)
97 .long SYMBOL_NAME(sys_getgroups16) /* 80 */ 97 .long SYMBOL_NAME(sys_getgroups16) /* 80 */
98 .long SYMBOL_NAME(sys_setgroups16) 98 .long SYMBOL_NAME(sys_setgroups16)
99 .long SYMBOL_NAME(old_select) 99 .long SYMBOL_NAME(sys_old_select)
100 .long SYMBOL_NAME(sys_symlink) 100 .long SYMBOL_NAME(sys_symlink)
101 .long SYMBOL_NAME(sys_lstat) 101 .long SYMBOL_NAME(sys_lstat)
102 .long SYMBOL_NAME(sys_readlink) /* 85 */ 102 .long SYMBOL_NAME(sys_readlink) /* 85 */
@@ -104,7 +104,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
104 .long SYMBOL_NAME(sys_swapon) 104 .long SYMBOL_NAME(sys_swapon)
105 .long SYMBOL_NAME(sys_reboot) 105 .long SYMBOL_NAME(sys_reboot)
106 .long SYMBOL_NAME(sys_old_readdir) 106 .long SYMBOL_NAME(sys_old_readdir)
107 .long SYMBOL_NAME(old_mmap) /* 90 */ 107 .long SYMBOL_NAME(sys_old_mmap) /* 90 */
108 .long SYMBOL_NAME(sys_munmap) 108 .long SYMBOL_NAME(sys_munmap)
109 .long SYMBOL_NAME(sys_truncate) 109 .long SYMBOL_NAME(sys_truncate)
110 .long SYMBOL_NAME(sys_ftruncate) 110 .long SYMBOL_NAME(sys_ftruncate)
diff --git a/arch/h8300/platform/h8300h/ptrace_h8300h.c b/arch/h8300/platform/h8300h/ptrace_h8300h.c
index 746b1ae672a1..4f1ed0279633 100644
--- a/arch/h8300/platform/h8300h/ptrace_h8300h.c
+++ b/arch/h8300/platform/h8300h/ptrace_h8300h.c
@@ -60,7 +60,7 @@ int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
60} 60}
61 61
62/* disable singlestep */ 62/* disable singlestep */
63void h8300_disable_trace(struct task_struct *child) 63void user_disable_single_step(struct task_struct *child)
64{ 64{
65 if((long)child->thread.breakinfo.addr != -1L) { 65 if((long)child->thread.breakinfo.addr != -1L) {
66 *child->thread.breakinfo.addr = child->thread.breakinfo.inst; 66 *child->thread.breakinfo.addr = child->thread.breakinfo.inst;
@@ -264,7 +264,7 @@ static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
264 264
265/* Set breakpoint(s) to simulate a single step from the current PC. */ 265/* Set breakpoint(s) to simulate a single step from the current PC. */
266 266
267void h8300_enable_trace(struct task_struct *child) 267void user_enable_single_step(struct task_struct *child)
268{ 268{
269 unsigned short *nextpc; 269 unsigned short *nextpc;
270 nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC)); 270 nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
@@ -276,7 +276,7 @@ void h8300_enable_trace(struct task_struct *child)
276asmlinkage void trace_trap(unsigned long bp) 276asmlinkage void trace_trap(unsigned long bp)
277{ 277{
278 if ((unsigned long)current->thread.breakinfo.addr == bp) { 278 if ((unsigned long)current->thread.breakinfo.addr == bp) {
279 h8300_disable_trace(current); 279 user_disable_single_step(current);
280 force_sig(SIGTRAP,current); 280 force_sig(SIGTRAP,current);
281 } else 281 } else
282 force_sig(SIGILL,current); 282 force_sig(SIGILL,current);
diff --git a/arch/h8300/platform/h8s/ptrace_h8s.c b/arch/h8300/platform/h8s/ptrace_h8s.c
index e8cd46f9255c..c058ab1a8495 100644
--- a/arch/h8300/platform/h8s/ptrace_h8s.c
+++ b/arch/h8300/platform/h8s/ptrace_h8s.c
@@ -65,13 +65,13 @@ int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
65} 65}
66 66
67/* disable singlestep */ 67/* disable singlestep */
68void h8300_disable_trace(struct task_struct *child) 68void user_disable_single_step(struct task_struct *child)
69{ 69{
70 *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE; 70 *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE;
71} 71}
72 72
73/* enable singlestep */ 73/* enable singlestep */
74void h8300_enable_trace(struct task_struct *child) 74void user_enable_single_step(struct task_struct *child)
75{ 75{
76 *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE; 76 *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE;
77} 77}
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 9a50d7dd2a0b..4d4f4188cdf1 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -53,6 +53,9 @@ config MMU
53 bool 53 bool
54 default y 54 default y
55 55
56config NEED_DMA_MAP_STATE
57 def_bool y
58
56config SWIOTLB 59config SWIOTLB
57 bool 60 bool
58 61
diff --git a/arch/ia64/include/asm/compat.h b/arch/ia64/include/asm/compat.h
index dfcf75b8426d..f90edc85b509 100644
--- a/arch/ia64/include/asm/compat.h
+++ b/arch/ia64/include/asm/compat.h
@@ -5,7 +5,8 @@
5 */ 5 */
6#include <linux/types.h> 6#include <linux/types.h>
7 7
8#define COMPAT_USER_HZ 100 8#define COMPAT_USER_HZ 100
9#define COMPAT_UTS_MACHINE "i686\0\0\0"
9 10
10typedef u32 compat_size_t; 11typedef u32 compat_size_t;
11typedef s32 compat_ssize_t; 12typedef s32 compat_ssize_t;
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 55281aabe5f2..73b5f785e70c 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -56,20 +56,6 @@ pcibios_penalize_isa_irq (int irq, int active)
56 56
57#include <asm-generic/pci-dma-compat.h> 57#include <asm-generic/pci-dma-compat.h>
58 58
59/* pci_unmap_{single,page} is not a nop, thus... */
60#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
61 dma_addr_t ADDR_NAME;
62#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
63 __u32 LEN_NAME;
64#define pci_unmap_addr(PTR, ADDR_NAME) \
65 ((PTR)->ADDR_NAME)
66#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
67 (((PTR)->ADDR_NAME) = (VAL))
68#define pci_unmap_len(PTR, LEN_NAME) \
69 ((PTR)->LEN_NAME)
70#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
71 (((PTR)->LEN_NAME) = (VAL))
72
73#ifdef CONFIG_PCI 59#ifdef CONFIG_PCI
74static inline void pci_dma_burst_advice(struct pci_dev *pdev, 60static inline void pci_dma_burst_advice(struct pci_dev *pdev,
75 enum pci_dma_burst_strategy *strat, 61 enum pci_dma_burst_strategy *strat,
diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
index 14055c636adf..7ae9c3f15a1c 100644
--- a/arch/ia64/include/asm/ptrace.h
+++ b/arch/ia64/include/asm/ptrace.h
@@ -319,11 +319,7 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
319 ptrace_attach_sync_user_rbs(child) 319 ptrace_attach_sync_user_rbs(child)
320 320
321 #define arch_has_single_step() (1) 321 #define arch_has_single_step() (1)
322 extern void user_enable_single_step(struct task_struct *);
323 extern void user_disable_single_step(struct task_struct *);
324
325 #define arch_has_block_step() (1) 322 #define arch_has_block_step() (1)
326 extern void user_enable_block_step(struct task_struct *);
327 323
328#endif /* !__KERNEL__ */ 324#endif /* !__KERNEL__ */
329 325
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index a7ca07f3754e..f1c9f70b4e45 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -44,6 +44,7 @@
44#include <linux/efi.h> 44#include <linux/efi.h>
45#include <linux/mmzone.h> 45#include <linux/mmzone.h>
46#include <linux/nodemask.h> 46#include <linux/nodemask.h>
47#include <acpi/processor.h>
47#include <asm/io.h> 48#include <asm/io.h>
48#include <asm/iosapic.h> 49#include <asm/iosapic.h>
49#include <asm/machvec.h> 50#include <asm/machvec.h>
@@ -907,6 +908,8 @@ int acpi_map_lsapic(acpi_handle handle, int *pcpu)
907 cpu_set(cpu, cpu_present_map); 908 cpu_set(cpu, cpu_present_map);
908 ia64_cpu_to_sapicid[cpu] = physid; 909 ia64_cpu_to_sapicid[cpu] = physid;
909 910
911 acpi_processor_set_pdc(handle);
912
910 *pcpu = cpu; 913 *pcpu = cpu;
911 return (0); 914 return (0);
912} 915}
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 8f060352e129..b3a5818088d9 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -282,7 +282,7 @@ static ssize_t cache_show(struct kobject * kobj, struct attribute * attr, char *
282 return ret; 282 return ret;
283} 283}
284 284
285static struct sysfs_ops cache_sysfs_ops = { 285static const struct sysfs_ops cache_sysfs_ops = {
286 .show = cache_show 286 .show = cache_show
287}; 287};
288 288
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index e456f062f241..d00dfc180021 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -241,7 +241,7 @@ static void __cpuinit sn_check_for_wars(void)
241 * Note: This stuff is duped here because Altix requires the PCDP to 241 * Note: This stuff is duped here because Altix requires the PCDP to
242 * locate a usable VGA device due to lack of proper ACPI support. Structures 242 * locate a usable VGA device due to lack of proper ACPI support. Structures
243 * could be used from drivers/firmware/pcdp.h, but it was decided that moving 243 * could be used from drivers/firmware/pcdp.h, but it was decided that moving
244 * this file to a more public location just for Altix use was undesireable. 244 * this file to a more public location just for Altix use was undesirable.
245 */ 245 */
246 246
247struct hcdp_uart_desc { 247struct hcdp_uart_desc {
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h
index a0755b982028..840a1231edeb 100644
--- a/arch/m32r/include/asm/ptrace.h
+++ b/arch/m32r/include/asm/ptrace.h
@@ -120,6 +120,8 @@ struct pt_regs {
120 120
121#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */ 121#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
122 122
123#define arch_has_single_step() (1)
124
123struct task_struct; 125struct task_struct;
124extern void init_debug_traps(struct task_struct *); 126extern void init_debug_traps(struct task_struct *);
125#define arch_ptrace_attach(child) \ 127#define arch_ptrace_attach(child) \
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h
index cf701c933249..76125777483c 100644
--- a/arch/m32r/include/asm/unistd.h
+++ b/arch/m32r/include/asm/unistd.h
@@ -339,6 +339,7 @@
339#define __ARCH_WANT_STAT64 339#define __ARCH_WANT_STAT64
340#define __ARCH_WANT_SYS_ALARM 340#define __ARCH_WANT_SYS_ALARM
341#define __ARCH_WANT_SYS_GETHOSTNAME 341#define __ARCH_WANT_SYS_GETHOSTNAME
342#define __ARCH_WANT_SYS_IPC
342#define __ARCH_WANT_SYS_PAUSE 343#define __ARCH_WANT_SYS_PAUSE
343#define __ARCH_WANT_SYS_TIME 344#define __ARCH_WANT_SYS_TIME
344#define __ARCH_WANT_SYS_UTIME 345#define __ARCH_WANT_SYS_UTIME
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 98682bba0ed9..e555091eb97c 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -580,6 +580,35 @@ init_debug_traps(struct task_struct *child)
580 } 580 }
581} 581}
582 582
583void user_enable_single_step(struct task_struct *child)
584{
585 unsigned long next_pc;
586 unsigned long pc, insn;
587
588 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
589
590 /* Compute next pc. */
591 pc = get_stack_long(child, PT_BPC);
592
593 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
594 != sizeof(insn))
595 break;
596
597 compute_next_pc(insn, pc, &next_pc, child);
598 if (next_pc & 0x80000000)
599 break;
600
601 if (embed_debug_trap(child, next_pc))
602 break;
603
604 invalidate_cache();
605}
606
607void user_disable_single_step(struct task_struct *child)
608{
609 unregister_all_debug_traps(child);
610 invalidate_cache();
611}
583 612
584/* 613/*
585 * Called by kernel/ptrace.c when detaching.. 614 * Called by kernel/ptrace.c when detaching..
@@ -630,74 +659,6 @@ arch_ptrace(struct task_struct *child, long request, long addr, long data)
630 ret = ptrace_write_user(child, addr, data); 659 ret = ptrace_write_user(child, addr, data);
631 break; 660 break;
632 661
633 /*
634 * continue/restart and stop at next (return from) syscall
635 */
636 case PTRACE_SYSCALL:
637 case PTRACE_CONT:
638 ret = -EIO;
639 if (!valid_signal(data))
640 break;
641 if (request == PTRACE_SYSCALL)
642 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
643 else
644 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
645 child->exit_code = data;
646 wake_up_process(child);
647 ret = 0;
648 break;
649
650 /*
651 * make the child exit. Best I can do is send it a sigkill.
652 * perhaps it should be put in the status that it wants to
653 * exit.
654 */
655 case PTRACE_KILL: {
656 ret = 0;
657 unregister_all_debug_traps(child);
658 invalidate_cache();
659 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
660 break;
661 child->exit_code = SIGKILL;
662 wake_up_process(child);
663 break;
664 }
665
666 /*
667 * execute single instruction.
668 */
669 case PTRACE_SINGLESTEP: {
670 unsigned long next_pc;
671 unsigned long pc, insn;
672
673 ret = -EIO;
674 if (!valid_signal(data))
675 break;
676 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
677
678 /* Compute next pc. */
679 pc = get_stack_long(child, PT_BPC);
680
681 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
682 != sizeof(insn))
683 break;
684
685 compute_next_pc(insn, pc, &next_pc, child);
686 if (next_pc & 0x80000000)
687 break;
688
689 if (embed_debug_trap(child, next_pc))
690 break;
691
692 invalidate_cache();
693 child->exit_code = data;
694
695 /* give it a chance to run. */
696 wake_up_process(child);
697 ret = 0;
698 break;
699 }
700
701 case PTRACE_GETREGS: 662 case PTRACE_GETREGS:
702 ret = ptrace_getregs(child, (void __user *)data); 663 ret = ptrace_getregs(child, (void __user *)data);
703 break; 664 break;
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index d3c865c5a6ba..0a00f467edfa 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,98 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
76 return oldval; 76 return oldval;
77} 77}
78 78
79/*
80 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
81 *
82 * This is really horribly ugly.
83 */
84asmlinkage int sys_ipc(uint call, int first, int second,
85 int third, void __user *ptr, long fifth)
86{
87 int version, ret;
88
89 version = call >> 16; /* hack for backward compatibility */
90 call &= 0xffff;
91
92 switch (call) {
93 case SEMOP:
94 return sys_semtimedop(first, (struct sembuf __user *)ptr,
95 second, NULL);
96 case SEMTIMEDOP:
97 return sys_semtimedop(first, (struct sembuf __user *)ptr,
98 second, (const struct timespec __user *)fifth);
99 case SEMGET:
100 return sys_semget (first, second, third);
101 case SEMCTL: {
102 union semun fourth;
103 if (!ptr)
104 return -EINVAL;
105 if (get_user(fourth.__pad, (void __user * __user *) ptr))
106 return -EFAULT;
107 return sys_semctl (first, second, third, fourth);
108 }
109
110 case MSGSND:
111 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
112 second, third);
113 case MSGRCV:
114 switch (version) {
115 case 0: {
116 struct ipc_kludge tmp;
117 if (!ptr)
118 return -EINVAL;
119
120 if (copy_from_user(&tmp,
121 (struct ipc_kludge __user *) ptr,
122 sizeof (tmp)))
123 return -EFAULT;
124 return sys_msgrcv (first, tmp.msgp, second,
125 tmp.msgtyp, third);
126 }
127 default:
128 return sys_msgrcv (first,
129 (struct msgbuf __user *) ptr,
130 second, fifth, third);
131 }
132 case MSGGET:
133 return sys_msgget ((key_t) first, second);
134 case MSGCTL:
135 return sys_msgctl (first, second,
136 (struct msqid_ds __user *) ptr);
137 case SHMAT: {
138 ulong raddr;
139
140 if (!access_ok(VERIFY_WRITE, (ulong __user *) third,
141 sizeof(ulong)))
142 return -EFAULT;
143 ret = do_shmat (first, (char __user *) ptr, second, &raddr);
144 if (ret)
145 return ret;
146 return put_user (raddr, (ulong __user *) third);
147 }
148 case SHMDT:
149 return sys_shmdt ((char __user *)ptr);
150 case SHMGET:
151 return sys_shmget (first, second, third);
152 case SHMCTL:
153 return sys_shmctl (first, second,
154 (struct shmid_ds __user *) ptr);
155 default:
156 return -ENOSYS;
157 }
158}
159
160asmlinkage int sys_uname(struct old_utsname __user * name)
161{
162 int err;
163 if (!name)
164 return -EFAULT;
165 down_read(&uts_sem);
166 err = copy_to_user(name, utsname(), sizeof (*name));
167 up_read(&uts_sem);
168 return err?-EFAULT:0;
169}
170
171asmlinkage int sys_cacheflush(void *addr, int bytes, int cache) 79asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
172{ 80{
173 /* This should flush more selectively ... */ 81 /* This should flush more selectively ... */
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index 4add96d13b19..5890897d28bf 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -121,7 +121,7 @@ KEYBOARD_STATE kb_state;
121 * bytes have been lost and in which state of the packet structure we are now. 121 * bytes have been lost and in which state of the packet structure we are now.
122 * This usually causes keyboards bytes to be interpreted as mouse movements 122 * This usually causes keyboards bytes to be interpreted as mouse movements
123 * and vice versa, which is very annoying. It seems better to throw away some 123 * and vice versa, which is very annoying. It seems better to throw away some
124 * bytes (that are usually mouse bytes) than to misinterpret them. Therefor I 124 * bytes (that are usually mouse bytes) than to misinterpret them. Therefore I
125 * introduced the RESYNC state for IKBD data. In this state, the bytes up to 125 * introduced the RESYNC state for IKBD data. In this state, the bytes up to
126 * one that really looks like a key event (0x04..0xf2) or the start of a mouse 126 * one that really looks like a key event (0x04..0xf2) or the start of a mouse
127 * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least 127 * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least
diff --git a/arch/m68k/include/asm/fbio.h b/arch/m68k/include/asm/fbio.h
index b9215a0907d3..0a21da87f7d6 100644
--- a/arch/m68k/include/asm/fbio.h
+++ b/arch/m68k/include/asm/fbio.h
@@ -173,7 +173,7 @@ struct mdi_cfginfo {
173 int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ 173 int mdi_ncluts; /* Number of implemented CLUTs in this MDI */
174 int mdi_type; /* FBTYPE name */ 174 int mdi_type; /* FBTYPE name */
175 int mdi_height; /* height */ 175 int mdi_height; /* height */
176 int mdi_width; /* widht */ 176 int mdi_width; /* width */
177 int mdi_size; /* available ram */ 177 int mdi_size; /* available ram */
178 int mdi_mode; /* 8bpp, 16bpp or 32bpp */ 178 int mdi_mode; /* 8bpp, 16bpp or 32bpp */
179 int mdi_pixfreq; /* pixel clock (from PROM) */ 179 int mdi_pixfreq; /* pixel clock (from PROM) */
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 359065d5a9f2..6e2413e518cb 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -16,7 +16,7 @@
16 * memory location directly. 16 * memory location directly.
17 */ 17 */
18/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates 18/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
19 * two accesses to memory, which may be undesireable for some devices. 19 * two accesses to memory, which may be undesirable for some devices.
20 */ 20 */
21 21
22/* 22/*
diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h
index 21605c736f69..6e6e3ac1d913 100644
--- a/arch/m68k/include/asm/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
@@ -87,18 +87,10 @@ struct switch_stack {
87#define profile_pc(regs) instruction_pointer(regs) 87#define profile_pc(regs) instruction_pointer(regs)
88extern void show_regs(struct pt_regs *); 88extern void show_regs(struct pt_regs *);
89 89
90/*
91 * These are defined as per linux/ptrace.h.
92 */
93struct task_struct;
94
95#define arch_has_single_step() (1) 90#define arch_has_single_step() (1)
96extern void user_enable_single_step(struct task_struct *);
97extern void user_disable_single_step(struct task_struct *);
98 91
99#ifdef CONFIG_MMU 92#ifdef CONFIG_MMU
100#define arch_has_block_step() (1) 93#define arch_has_block_step() (1)
101extern void user_enable_block_step(struct task_struct *);
102#endif 94#endif
103 95
104#endif /* __KERNEL__ */ 96#endif /* __KERNEL__ */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index d72a71dabecb..60b15d0aa072 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -351,6 +351,7 @@
351#define __ARCH_WANT_STAT64 351#define __ARCH_WANT_STAT64
352#define __ARCH_WANT_SYS_ALARM 352#define __ARCH_WANT_SYS_ALARM
353#define __ARCH_WANT_SYS_GETHOSTNAME 353#define __ARCH_WANT_SYS_GETHOSTNAME
354#define __ARCH_WANT_SYS_IPC
354#define __ARCH_WANT_SYS_PAUSE 355#define __ARCH_WANT_SYS_PAUSE
355#define __ARCH_WANT_SYS_SGETMASK 356#define __ARCH_WANT_SYS_SGETMASK
356#define __ARCH_WANT_SYS_SIGNAL 357#define __ARCH_WANT_SYS_SIGNAL
@@ -363,6 +364,8 @@
363#define __ARCH_WANT_SYS_LLSEEK 364#define __ARCH_WANT_SYS_LLSEEK
364#define __ARCH_WANT_SYS_NICE 365#define __ARCH_WANT_SYS_NICE
365#define __ARCH_WANT_SYS_OLD_GETRLIMIT 366#define __ARCH_WANT_SYS_OLD_GETRLIMIT
367#define __ARCH_WANT_SYS_OLD_MMAP
368#define __ARCH_WANT_SYS_OLD_SELECT
366#define __ARCH_WANT_SYS_OLDUMOUNT 369#define __ARCH_WANT_SYS_OLDUMOUNT
367#define __ARCH_WANT_SYS_SIGPENDING 370#define __ARCH_WANT_SYS_SIGPENDING
368#define __ARCH_WANT_SYS_SIGPROCMASK 371#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index e136b8cbe9b9..2391bdff0996 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -510,7 +510,7 @@ sys_call_table:
510 .long sys_settimeofday 510 .long sys_settimeofday
511 .long sys_getgroups16 /* 80 */ 511 .long sys_getgroups16 /* 80 */
512 .long sys_setgroups16 512 .long sys_setgroups16
513 .long old_select 513 .long sys_old_select
514 .long sys_symlink 514 .long sys_symlink
515 .long sys_lstat 515 .long sys_lstat
516 .long sys_readlink /* 85 */ 516 .long sys_readlink /* 85 */
@@ -518,7 +518,7 @@ sys_call_table:
518 .long sys_swapon 518 .long sys_swapon
519 .long sys_reboot 519 .long sys_reboot
520 .long sys_old_readdir 520 .long sys_old_readdir
521 .long old_mmap /* 90 */ 521 .long sys_old_mmap /* 90 */
522 .long sys_munmap 522 .long sys_munmap
523 .long sys_truncate 523 .long sys_truncate
524 .long sys_ftruncate 524 .long sys_ftruncate
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index e3ad2d671973..77896692eb0a 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -46,137 +46,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
46 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); 46 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
47} 47}
48 48
49/*
50 * Perform the select(nd, in, out, ex, tv) and mmap() system
51 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
52 * handle more than 4 system call parameters, so these system calls
53 * used a memory block for parameter passing..
54 */
55
56struct mmap_arg_struct {
57 unsigned long addr;
58 unsigned long len;
59 unsigned long prot;
60 unsigned long flags;
61 unsigned long fd;
62 unsigned long offset;
63};
64
65asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
66{
67 struct mmap_arg_struct a;
68 int error = -EFAULT;
69
70 if (copy_from_user(&a, arg, sizeof(a)))
71 goto out;
72
73 error = -EINVAL;
74 if (a.offset & ~PAGE_MASK)
75 goto out;
76
77 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
78 a.offset >> PAGE_SHIFT);
79out:
80 return error;
81}
82
83struct sel_arg_struct {
84 unsigned long n;
85 fd_set __user *inp, *outp, *exp;
86 struct timeval __user *tvp;
87};
88
89asmlinkage int old_select(struct sel_arg_struct __user *arg)
90{
91 struct sel_arg_struct a;
92
93 if (copy_from_user(&a, arg, sizeof(a)))
94 return -EFAULT;
95 /* sys_select() does the appropriate kernel locking */
96 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
97}
98
99/*
100 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
101 *
102 * This is really horribly ugly.
103 */
104asmlinkage int sys_ipc (uint call, int first, int second,
105 int third, void __user *ptr, long fifth)
106{
107 int version, ret;
108
109 version = call >> 16; /* hack for backward compatibility */
110 call &= 0xffff;
111
112 if (call <= SEMCTL)
113 switch (call) {
114 case SEMOP:
115 return sys_semop (first, ptr, second);
116 case SEMGET:
117 return sys_semget (first, second, third);
118 case SEMCTL: {
119 union semun fourth;
120 if (!ptr)
121 return -EINVAL;
122 if (get_user(fourth.__pad, (void __user *__user *) ptr))
123 return -EFAULT;
124 return sys_semctl (first, second, third, fourth);
125 }
126 default:
127 return -ENOSYS;
128 }
129 if (call <= MSGCTL)
130 switch (call) {
131 case MSGSND:
132 return sys_msgsnd (first, ptr, second, third);
133 case MSGRCV:
134 switch (version) {
135 case 0: {
136 struct ipc_kludge tmp;
137 if (!ptr)
138 return -EINVAL;
139 if (copy_from_user (&tmp, ptr, sizeof (tmp)))
140 return -EFAULT;
141 return sys_msgrcv (first, tmp.msgp, second,
142 tmp.msgtyp, third);
143 }
144 default:
145 return sys_msgrcv (first, ptr,
146 second, fifth, third);
147 }
148 case MSGGET:
149 return sys_msgget ((key_t) first, second);
150 case MSGCTL:
151 return sys_msgctl (first, second, ptr);
152 default:
153 return -ENOSYS;
154 }
155 if (call <= SHMCTL)
156 switch (call) {
157 case SHMAT:
158 switch (version) {
159 default: {
160 ulong raddr;
161 ret = do_shmat (first, ptr, second, &raddr);
162 if (ret)
163 return ret;
164 return put_user (raddr, (ulong __user *) third);
165 }
166 }
167 case SHMDT:
168 return sys_shmdt (ptr);
169 case SHMGET:
170 return sys_shmget (first, second, third);
171 case SHMCTL:
172 return sys_shmctl (first, second, ptr);
173 default:
174 return -ENOSYS;
175 }
176
177 return -EINVAL;
178}
179
180/* Convert virtual (user) address VADDR to physical address PADDR */ 49/* Convert virtual (user) address VADDR to physical address PADDR */
181#define virt_to_phys_040(vaddr) \ 50#define virt_to_phys_040(vaddr) \
182({ \ 51({ \
diff --git a/arch/m68knommu/kernel/ptrace.c b/arch/m68knommu/kernel/ptrace.c
index 85ed2f988f98..f6be1248d216 100644
--- a/arch/m68knommu/kernel/ptrace.c
+++ b/arch/m68knommu/kernel/ptrace.c
@@ -116,12 +116,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
116 int ret; 116 int ret;
117 117
118 switch (request) { 118 switch (request) {
119 /* when I and D space are separate, these will need to be fixed. */
120 case PTRACE_PEEKTEXT: /* read word at location addr. */
121 case PTRACE_PEEKDATA:
122 ret = generic_ptrace_peekdata(child, addr, data);
123 break;
124
125 /* read the word at location addr in the USER area. */ 119 /* read the word at location addr in the USER area. */
126 case PTRACE_PEEKUSR: { 120 case PTRACE_PEEKUSR: {
127 unsigned long tmp; 121 unsigned long tmp;
@@ -160,12 +154,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
160 break; 154 break;
161 } 155 }
162 156
163 /* when I and D space are separate, this will have to be fixed. */
164 case PTRACE_POKETEXT: /* write the word at location addr. */
165 case PTRACE_POKEDATA:
166 ret = generic_ptrace_pokedata(child, addr, data);
167 break;
168
169 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ 157 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
170 ret = -EIO; 158 ret = -EIO;
171 if ((addr & 3) || addr < 0 || 159 if ((addr & 3) || addr < 0 ||
@@ -202,66 +190,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
202 } 190 }
203 break; 191 break;
204 192
205 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
206 case PTRACE_CONT: { /* restart after signal. */
207 long tmp;
208
209 ret = -EIO;
210 if (!valid_signal(data))
211 break;
212 if (request == PTRACE_SYSCALL)
213 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
214 else
215 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
216 child->exit_code = data;
217 /* make sure the single step bit is not set. */
218 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
219 put_reg(child, PT_SR, tmp);
220 wake_up_process(child);
221 ret = 0;
222 break;
223 }
224
225 /*
226 * make the child exit. Best I can do is send it a sigkill.
227 * perhaps it should be put in the status that it wants to
228 * exit.
229 */
230 case PTRACE_KILL: {
231 long tmp;
232
233 ret = 0;
234 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
235 break;
236 child->exit_code = SIGKILL;
237 /* make sure the single step bit is not set. */
238 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
239 put_reg(child, PT_SR, tmp);
240 wake_up_process(child);
241 break;
242 }
243
244 case PTRACE_SINGLESTEP: { /* set the trap flag. */
245 long tmp;
246
247 ret = -EIO;
248 if (!valid_signal(data))
249 break;
250 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
251 tmp = get_reg(child, PT_SR) | (TRACE_BITS << 16);
252 put_reg(child, PT_SR, tmp);
253
254 child->exit_code = data;
255 /* give it a chance to run. */
256 wake_up_process(child);
257 ret = 0;
258 break;
259 }
260
261 case PTRACE_DETACH: /* detach a process that was attached. */
262 ret = ptrace_detach(child, data);
263 break;
264
265 case PTRACE_GETREGS: { /* Get all gp regs from the child. */ 193 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
266 int i; 194 int i;
267 unsigned long tmp; 195 unsigned long tmp;
@@ -325,7 +253,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
325 break; 253 break;
326 254
327 default: 255 default:
328 ret = -EIO; 256 ret = ptrace_request(child, request, addr, data);
329 break; 257 break;
330 } 258 }
331 return ret; 259 return ret;
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68knommu/kernel/sys_m68k.c
index 923dd4aab875..d65e9c4c930c 100644
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ b/arch/m68knommu/kernel/sys_m68k.c
@@ -27,142 +27,6 @@
27#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
28#include <asm/unistd.h> 28#include <asm/unistd.h>
29 29
30/*
31 * Perform the select(nd, in, out, ex, tv) and mmap() system
32 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
33 * handle more than 4 system call parameters, so these system calls
34 * used a memory block for parameter passing..
35 */
36
37struct mmap_arg_struct {
38 unsigned long addr;
39 unsigned long len;
40 unsigned long prot;
41 unsigned long flags;
42 unsigned long fd;
43 unsigned long offset;
44};
45
46asmlinkage int old_mmap(struct mmap_arg_struct *arg)
47{
48 struct mmap_arg_struct a;
49 int error = -EFAULT;
50
51 if (copy_from_user(&a, arg, sizeof(a)))
52 goto out;
53
54 error = -EINVAL;
55 if (a.offset & ~PAGE_MASK)
56 goto out;
57
58 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
59 a.offset >> PAGE_SHIFT);
60out:
61 return error;
62}
63
64struct sel_arg_struct {
65 unsigned long n;
66 fd_set *inp, *outp, *exp;
67 struct timeval *tvp;
68};
69
70asmlinkage int old_select(struct sel_arg_struct *arg)
71{
72 struct sel_arg_struct a;
73
74 if (copy_from_user(&a, arg, sizeof(a)))
75 return -EFAULT;
76 /* sys_select() does the appropriate kernel locking */
77 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
78}
79
80/*
81 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
82 *
83 * This is really horribly ugly.
84 */
85asmlinkage int sys_ipc (uint call, int first, int second,
86 int third, void *ptr, long fifth)
87{
88 int version, ret;
89
90 version = call >> 16; /* hack for backward compatibility */
91 call &= 0xffff;
92
93 if (call <= SEMCTL)
94 switch (call) {
95 case SEMOP:
96 return sys_semop (first, (struct sembuf *)ptr, second);
97 case SEMGET:
98 return sys_semget (first, second, third);
99 case SEMCTL: {
100 union semun fourth;
101 if (!ptr)
102 return -EINVAL;
103 if (get_user(fourth.__pad, (void **) ptr))
104 return -EFAULT;
105 return sys_semctl (first, second, third, fourth);
106 }
107 default:
108 return -EINVAL;
109 }
110 if (call <= MSGCTL)
111 switch (call) {
112 case MSGSND:
113 return sys_msgsnd (first, (struct msgbuf *) ptr,
114 second, third);
115 case MSGRCV:
116 switch (version) {
117 case 0: {
118 struct ipc_kludge tmp;
119 if (!ptr)
120 return -EINVAL;
121 if (copy_from_user (&tmp,
122 (struct ipc_kludge *)ptr,
123 sizeof (tmp)))
124 return -EFAULT;
125 return sys_msgrcv (first, tmp.msgp, second,
126 tmp.msgtyp, third);
127 }
128 default:
129 return sys_msgrcv (first,
130 (struct msgbuf *) ptr,
131 second, fifth, third);
132 }
133 case MSGGET:
134 return sys_msgget ((key_t) first, second);
135 case MSGCTL:
136 return sys_msgctl (first, second,
137 (struct msqid_ds *) ptr);
138 default:
139 return -EINVAL;
140 }
141 if (call <= SHMCTL)
142 switch (call) {
143 case SHMAT:
144 switch (version) {
145 default: {
146 ulong raddr;
147 ret = do_shmat (first, ptr, second, &raddr);
148 if (ret)
149 return ret;
150 return put_user (raddr, (ulong __user *) third);
151 }
152 }
153 case SHMDT:
154 return sys_shmdt (ptr);
155 case SHMGET:
156 return sys_shmget (first, second, third);
157 case SHMCTL:
158 return sys_shmctl (first, second, ptr);
159 default:
160 return -ENOSYS;
161 }
162
163 return -EINVAL;
164}
165
166/* sys_cacheflush -- flush (part of) the processor cache. */ 30/* sys_cacheflush -- flush (part of) the processor cache. */
167asmlinkage int 31asmlinkage int
168sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) 32sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S
index 56dd01ded148..b30b3eb197a5 100644
--- a/arch/m68knommu/kernel/syscalltable.S
+++ b/arch/m68knommu/kernel/syscalltable.S
@@ -100,7 +100,7 @@ ENTRY(sys_call_table)
100 .long sys_settimeofday 100 .long sys_settimeofday
101 .long sys_getgroups16 /* 80 */ 101 .long sys_getgroups16 /* 80 */
102 .long sys_setgroups16 102 .long sys_setgroups16
103 .long old_select 103 .long sys_old_select
104 .long sys_symlink 104 .long sys_symlink
105 .long sys_lstat 105 .long sys_lstat
106 .long sys_readlink /* 85 */ 106 .long sys_readlink /* 85 */
@@ -108,7 +108,7 @@ ENTRY(sys_call_table)
108 .long sys_ni_syscall /* sys_swapon */ 108 .long sys_ni_syscall /* sys_swapon */
109 .long sys_reboot 109 .long sys_reboot
110 .long sys_old_readdir 110 .long sys_old_readdir
111 .long old_mmap /* 90 */ 111 .long sys_old_mmap /* 90 */
112 .long sys_munmap 112 .long sys_munmap
113 .long sys_truncate 113 .long sys_truncate
114 .long sys_ftruncate 114 .long sys_ftruncate
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index 4b3ac32754de..6d6349a145f9 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -78,26 +78,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
78 unsigned long copied; 78 unsigned long copied;
79 79
80 switch (request) { 80 switch (request) {
81 case PTRACE_PEEKTEXT: /* read word at location addr. */
82 case PTRACE_PEEKDATA:
83 pr_debug("PEEKTEXT/PEEKDATA at %08lX\n", addr);
84 copied = access_process_vm(child, addr, &val, sizeof(val), 0);
85 rval = -EIO;
86 if (copied != sizeof(val))
87 break;
88 rval = put_user(val, (unsigned long *)data);
89 break;
90
91 case PTRACE_POKETEXT: /* write the word at location addr. */
92 case PTRACE_POKEDATA:
93 pr_debug("POKETEXT/POKEDATA to %08lX\n", addr);
94 rval = 0;
95 if (access_process_vm(child, addr, &data, sizeof(data), 1)
96 == sizeof(data))
97 break;
98 rval = -EIO;
99 break;
100
101 /* Read/write the word at location ADDR in the registers. */ 81 /* Read/write the word at location ADDR in the registers. */
102 case PTRACE_PEEKUSR: 82 case PTRACE_PEEKUSR:
103 case PTRACE_POKEUSR: 83 case PTRACE_POKEUSR:
@@ -130,50 +110,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
130 if (rval == 0 && request == PTRACE_PEEKUSR) 110 if (rval == 0 && request == PTRACE_PEEKUSR)
131 rval = put_user(val, (unsigned long *)data); 111 rval = put_user(val, (unsigned long *)data);
132 break; 112 break;
133 /* Continue and stop at next (return from) syscall */
134 case PTRACE_SYSCALL:
135 pr_debug("PTRACE_SYSCALL\n");
136 case PTRACE_SINGLESTEP:
137 pr_debug("PTRACE_SINGLESTEP\n");
138 /* Restart after a signal. */
139 case PTRACE_CONT:
140 pr_debug("PTRACE_CONT\n");
141 rval = -EIO;
142 if (!valid_signal(data))
143 break;
144
145 if (request == PTRACE_SYSCALL)
146 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
147 else
148 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
149
150 child->exit_code = data;
151 pr_debug("wakeup_process\n");
152 wake_up_process(child);
153 rval = 0;
154 break;
155
156 /*
157 * make the child exit. Best I can do is send it a sigkill.
158 * perhaps it should be put in the status that it wants to
159 * exit.
160 */
161 case PTRACE_KILL:
162 pr_debug("PTRACE_KILL\n");
163 rval = 0;
164 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
165 break;
166 child->exit_code = SIGKILL;
167 wake_up_process(child);
168 break;
169
170 case PTRACE_DETACH: /* detach a process that was attached. */
171 pr_debug("PTRACE_DETACH\n");
172 rval = ptrace_detach(child, data);
173 break;
174 default: 113 default:
175 /* rval = ptrace_request(child, request, addr, data); noMMU */ 114 rval = ptrace_request(child, request, addr, data);
176 rval = -EIO;
177 } 115 }
178 return rval; 116 return rval;
179} 117}
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 591ca0cd4c24..29e86923d1bf 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -812,9 +812,9 @@ config DMA_COHERENT
812 812
813config DMA_NONCOHERENT 813config DMA_NONCOHERENT
814 bool 814 bool
815 select DMA_NEED_PCI_MAP_STATE 815 select NEED_DMA_MAP_STATE
816 816
817config DMA_NEED_PCI_MAP_STATE 817config NEED_DMA_MAP_STATE
818 bool 818 bool
819 819
820config SYS_HAS_EARLY_PRINTK 820config SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index f58aed354bfd..613f6912dfc1 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -8,7 +8,8 @@
8#include <asm/page.h> 8#include <asm/page.h>
9#include <asm/ptrace.h> 9#include <asm/ptrace.h>
10 10
11#define COMPAT_USER_HZ 100 11#define COMPAT_USER_HZ 100
12#define COMPAT_UTS_MACHINE "mips\0\0\0"
12 13
13typedef u32 compat_size_t; 14typedef u32 compat_size_t;
14typedef s32 compat_ssize_t; 15typedef s32 compat_ssize_t;
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 5ebf82572ec0..3beea1479b43 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -102,28 +102,6 @@ struct pci_dev;
102 */ 102 */
103extern unsigned int PCI_DMA_BUS_IS_PHYS; 103extern unsigned int PCI_DMA_BUS_IS_PHYS;
104 104
105#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
106
107/* pci_unmap_{single,page} is not a nop, thus... */
108#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
109#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
110#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
111#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
112#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
113#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
114
115#else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
116
117/* pci_unmap_{page,single} is a nop so... */
118#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
119#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
120#define pci_unmap_addr(PTR, ADDR_NAME) (0)
121#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
122#define pci_unmap_len(PTR, LEN_NAME) (0)
123#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
124
125#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
126
127#ifdef CONFIG_PCI 105#ifdef CONFIG_PCI
128static inline void pci_dma_burst_advice(struct pci_dev *pdev, 106static inline void pci_dma_burst_advice(struct pci_dev *pdev,
129 enum pci_dma_burst_strategy *strat, 107 enum pci_dma_burst_strategy *strat,
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 65c679ecbe6b..1b5a6648eb86 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -1004,6 +1004,7 @@
1004#define __ARCH_WANT_OLD_READDIR 1004#define __ARCH_WANT_OLD_READDIR
1005#define __ARCH_WANT_SYS_ALARM 1005#define __ARCH_WANT_SYS_ALARM
1006#define __ARCH_WANT_SYS_GETHOSTNAME 1006#define __ARCH_WANT_SYS_GETHOSTNAME
1007#define __ARCH_WANT_SYS_IPC
1007#define __ARCH_WANT_SYS_PAUSE 1008#define __ARCH_WANT_SYS_PAUSE
1008#define __ARCH_WANT_SYS_SGETMASK 1009#define __ARCH_WANT_SYS_SGETMASK
1009#define __ARCH_WANT_SYS_UTIME 1010#define __ARCH_WANT_SYS_UTIME
@@ -1013,6 +1014,7 @@
1013#define __ARCH_WANT_SYS_LLSEEK 1014#define __ARCH_WANT_SYS_LLSEEK
1014#define __ARCH_WANT_SYS_NICE 1015#define __ARCH_WANT_SYS_NICE
1015#define __ARCH_WANT_SYS_OLD_GETRLIMIT 1016#define __ARCH_WANT_SYS_OLD_GETRLIMIT
1017#define __ARCH_WANT_SYS_OLD_UNAME
1016#define __ARCH_WANT_SYS_OLDUMOUNT 1018#define __ARCH_WANT_SYS_OLDUMOUNT
1017#define __ARCH_WANT_SYS_SIGPENDING 1019#define __ARCH_WANT_SYS_SIGPENDING
1018#define __ARCH_WANT_SYS_SIGPROCMASK 1020#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index bde79ef602e6..a39d0597a375 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -249,22 +249,6 @@ SYSCALL_DEFINE5(n32_msgrcv, int, msqid, u32, msgp, size_t, msgsz,
249} 249}
250#endif 250#endif
251 251
252SYSCALL_DEFINE1(32_newuname, struct new_utsname __user *, name)
253{
254 int ret = 0;
255
256 down_read(&uts_sem);
257 if (copy_to_user(name, utsname(), sizeof *name))
258 ret = -EFAULT;
259 up_read(&uts_sem);
260
261 if (current->personality == PER_LINUX32 && !ret)
262 if (copy_to_user(name->machine, "mips\0\0\0", 8))
263 ret = -EFAULT;
264
265 return ret;
266}
267
268SYSCALL_DEFINE1(32_personality, unsigned long, personality) 252SYSCALL_DEFINE1(32_personality, unsigned long, personality)
269{ 253{
270 int ret; 254 int ret;
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 054861ccb4dd..c51b95ff8644 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -493,36 +493,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
493 ret = ptrace_setfpregs(child, (__u32 __user *) data); 493 ret = ptrace_setfpregs(child, (__u32 __user *) data);
494 break; 494 break;
495 495
496 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
497 case PTRACE_CONT: { /* restart after signal. */
498 ret = -EIO;
499 if (!valid_signal(data))
500 break;
501 if (request == PTRACE_SYSCALL) {
502 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
503 }
504 else {
505 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
506 }
507 child->exit_code = data;
508 wake_up_process(child);
509 ret = 0;
510 break;
511 }
512
513 /*
514 * make the child exit. Best I can do is send it a sigkill.
515 * perhaps it should be put in the status that it wants to
516 * exit.
517 */
518 case PTRACE_KILL:
519 ret = 0;
520 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
521 break;
522 child->exit_code = SIGKILL;
523 wake_up_process(child);
524 break;
525
526 case PTRACE_GET_THREAD_AREA: 496 case PTRACE_GET_THREAD_AREA:
527 ret = put_user(task_thread_info(child)->tp_value, 497 ret = put_user(task_thread_info(child)->tp_value,
528 (unsigned long __user *) data); 498 (unsigned long __user *) data);
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 66b5a48676dd..44337ba03717 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -181,7 +181,7 @@ EXPORT(sysn32_call_table)
181 PTR sys_exit 181 PTR sys_exit
182 PTR compat_sys_wait4 182 PTR compat_sys_wait4
183 PTR sys_kill /* 6060 */ 183 PTR sys_kill /* 6060 */
184 PTR sys_32_newuname 184 PTR sys_newuname
185 PTR sys_semget 185 PTR sys_semget
186 PTR sys_semop 186 PTR sys_semop
187 PTR sys_n32_semctl 187 PTR sys_n32_semctl
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 515f9eab2b28..813689ef2384 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -325,7 +325,7 @@ sys_call_table:
325 PTR sys32_sigreturn 325 PTR sys32_sigreturn
326 PTR sys32_clone /* 4120 */ 326 PTR sys32_clone /* 4120 */
327 PTR sys_setdomainname 327 PTR sys_setdomainname
328 PTR sys_32_newuname 328 PTR sys_newuname
329 PTR sys_ni_syscall /* sys_modify_ldt */ 329 PTR sys_ni_syscall /* sys_modify_ldt */
330 PTR compat_sys_adjtimex 330 PTR compat_sys_adjtimex
331 PTR sys_mprotect /* 4125 */ 331 PTR sys_mprotect /* 4125 */
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 3f7f466190b4..e96b1c30c7aa 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -215,48 +215,6 @@ out:
215 return error; 215 return error;
216} 216}
217 217
218/*
219 * Compacrapability ...
220 */
221SYSCALL_DEFINE1(uname, struct old_utsname __user *, name)
222{
223 if (name && !copy_to_user(name, utsname(), sizeof (*name)))
224 return 0;
225 return -EFAULT;
226}
227
228/*
229 * Compacrapability ...
230 */
231SYSCALL_DEFINE1(olduname, struct oldold_utsname __user *, name)
232{
233 int error;
234
235 if (!name)
236 return -EFAULT;
237 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
238 return -EFAULT;
239
240 error = __copy_to_user(&name->sysname, &utsname()->sysname,
241 __OLD_UTS_LEN);
242 error -= __put_user(0, name->sysname + __OLD_UTS_LEN);
243 error -= __copy_to_user(&name->nodename, &utsname()->nodename,
244 __OLD_UTS_LEN);
245 error -= __put_user(0, name->nodename + __OLD_UTS_LEN);
246 error -= __copy_to_user(&name->release, &utsname()->release,
247 __OLD_UTS_LEN);
248 error -= __put_user(0, name->release + __OLD_UTS_LEN);
249 error -= __copy_to_user(&name->version, &utsname()->version,
250 __OLD_UTS_LEN);
251 error -= __put_user(0, name->version + __OLD_UTS_LEN);
252 error -= __copy_to_user(&name->machine, &utsname()->machine,
253 __OLD_UTS_LEN);
254 error = __put_user(0, name->machine + __OLD_UTS_LEN);
255 error = error ? -EFAULT : 0;
256
257 return error;
258}
259
260SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) 218SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
261{ 219{
262 struct thread_info *ti = task_thread_info(current); 220 struct thread_info *ti = task_thread_info(current);
@@ -407,94 +365,6 @@ _sys_sysmips(nabi_no_regargs struct pt_regs regs)
407} 365}
408 366
409/* 367/*
410 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
411 *
412 * This is really horribly ugly.
413 */
414SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, int, second,
415 unsigned long, third, void __user *, ptr, long, fifth)
416{
417 int version, ret;
418
419 version = call >> 16; /* hack for backward compatibility */
420 call &= 0xffff;
421
422 switch (call) {
423 case SEMOP:
424 return sys_semtimedop(first, (struct sembuf __user *)ptr,
425 second, NULL);
426 case SEMTIMEDOP:
427 return sys_semtimedop(first, (struct sembuf __user *)ptr,
428 second,
429 (const struct timespec __user *)fifth);
430 case SEMGET:
431 return sys_semget(first, second, third);
432 case SEMCTL: {
433 union semun fourth;
434 if (!ptr)
435 return -EINVAL;
436 if (get_user(fourth.__pad, (void __user *__user *) ptr))
437 return -EFAULT;
438 return sys_semctl(first, second, third, fourth);
439 }
440
441 case MSGSND:
442 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
443 second, third);
444 case MSGRCV:
445 switch (version) {
446 case 0: {
447 struct ipc_kludge tmp;
448 if (!ptr)
449 return -EINVAL;
450
451 if (copy_from_user(&tmp,
452 (struct ipc_kludge __user *) ptr,
453 sizeof(tmp)))
454 return -EFAULT;
455 return sys_msgrcv(first, tmp.msgp, second,
456 tmp.msgtyp, third);
457 }
458 default:
459 return sys_msgrcv(first,
460 (struct msgbuf __user *) ptr,
461 second, fifth, third);
462 }
463 case MSGGET:
464 return sys_msgget((key_t) first, second);
465 case MSGCTL:
466 return sys_msgctl(first, second,
467 (struct msqid_ds __user *) ptr);
468
469 case SHMAT:
470 switch (version) {
471 default: {
472 unsigned long raddr;
473 ret = do_shmat(first, (char __user *) ptr, second,
474 &raddr);
475 if (ret)
476 return ret;
477 return put_user(raddr, (unsigned long __user *) third);
478 }
479 case 1: /* iBCS2 emulator entry point */
480 if (!segment_eq(get_fs(), get_ds()))
481 return -EINVAL;
482 return do_shmat(first, (char __user *) ptr, second,
483 (unsigned long *) third);
484 }
485 case SHMDT:
486 return sys_shmdt((char __user *)ptr);
487 case SHMGET:
488 return sys_shmget(first, second, third);
489 case SHMCTL:
490 return sys_shmctl(first, second,
491 (struct shmid_ds __user *) ptr);
492 default:
493 return -ENOSYS;
494 }
495}
496
497/*
498 * No implemented yet ... 368 * No implemented yet ...
499 */ 369 */
500SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op) 370SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op)
diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c
index 727ab21b6618..7f8416f86222 100644
--- a/arch/mips/txx9/generic/7segled.c
+++ b/arch/mips/txx9/generic/7segled.c
@@ -58,13 +58,16 @@ static ssize_t raw_store(struct sys_device *dev,
58static SYSDEV_ATTR(ascii, 0200, NULL, ascii_store); 58static SYSDEV_ATTR(ascii, 0200, NULL, ascii_store);
59static SYSDEV_ATTR(raw, 0200, NULL, raw_store); 59static SYSDEV_ATTR(raw, 0200, NULL, raw_store);
60 60
61static ssize_t map_seg7_show(struct sysdev_class *class, char *buf) 61static ssize_t map_seg7_show(struct sysdev_class *class,
62 struct sysdev_class_attribute *attr,
63 char *buf)
62{ 64{
63 memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map)); 65 memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map));
64 return sizeof(txx9_seg7map); 66 return sizeof(txx9_seg7map);
65} 67}
66 68
67static ssize_t map_seg7_store(struct sysdev_class *class, 69static ssize_t map_seg7_store(struct sysdev_class *class,
70 struct sysdev_class_attribute *attr,
68 const char *buf, size_t size) 71 const char *buf, size_t size)
69{ 72{
70 if (size != sizeof(txx9_seg7map)) 73 if (size != sizeof(txx9_seg7map))
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 7174d830dd05..95184a0a1ae6 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -956,6 +956,7 @@ void __init txx9_sramc_init(struct resource *r)
956 if (!dev->base) 956 if (!dev->base)
957 goto exit; 957 goto exit;
958 dev->dev.cls = &txx9_sramc_sysdev_class; 958 dev->dev.cls = &txx9_sramc_sysdev_class;
959 sysfs_bin_attr_init(&dev->bindata_attr);
959 dev->bindata_attr.attr.name = "bindata"; 960 dev->bindata_attr.attr.name = "bindata";
960 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR; 961 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
961 dev->bindata_attr.read = txx9_sram_read; 962 dev->bindata_attr.read = txx9_sram_read;
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
index ccae8f6c6326..4ed1522b38d2 100644
--- a/arch/mn10300/include/asm/dma-mapping.h
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -17,6 +17,11 @@
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20/*
21 * See Documentation/DMA-API.txt for the description of how the
22 * following DMA API should work.
23 */
24
20extern void *dma_alloc_coherent(struct device *dev, size_t size, 25extern void *dma_alloc_coherent(struct device *dev, size_t size,
21 dma_addr_t *dma_handle, int flag); 26 dma_addr_t *dma_handle, int flag);
22 27
@@ -26,13 +31,6 @@ extern void dma_free_coherent(struct device *dev, size_t size,
26#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f)) 31#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
27#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h)) 32#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
28 33
29/*
30 * Map a single buffer of the indicated size for DMA in streaming mode. The
31 * 32-bit bus address to use is returned.
32 *
33 * Once the device is given the dma address, the device owns this memory until
34 * either pci_unmap_single or pci_dma_sync_single is performed.
35 */
36static inline 34static inline
37dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, 35dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
38 enum dma_data_direction direction) 36 enum dma_data_direction direction)
@@ -42,14 +40,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
42 return virt_to_bus(ptr); 40 return virt_to_bus(ptr);
43} 41}
44 42
45/*
46 * Unmap a single streaming mode DMA translation. The dma_addr and size must
47 * match what was provided for in a previous pci_map_single call. All other
48 * usages are undefined.
49 *
50 * After this call, reads by the cpu to the buffer are guarenteed to see
51 * whatever the device wrote there.
52 */
53static inline 43static inline
54void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 44void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
55 enum dma_data_direction direction) 45 enum dma_data_direction direction)
@@ -57,20 +47,6 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
57 BUG_ON(direction == DMA_NONE); 47 BUG_ON(direction == DMA_NONE);
58} 48}
59 49
60/*
61 * Map a set of buffers described by scatterlist in streaming mode for DMA.
62 * This is the scather-gather version of the above pci_map_single interface.
63 * Here the scatter gather list elements are each tagged with the appropriate
64 * dma address and length. They are obtained via sg_dma_{address,length}(SG).
65 *
66 * NOTE: An implementation may be able to use a smaller number of DMA
67 * address/length pairs than there are SG table elements. (for example
68 * via virtual mapping capabilities) The routine returns the number of
69 * addr/length pairs actually used, at most nents.
70 *
71 * Device ownership issues as mentioned above for pci_map_single are the same
72 * here.
73 */
74static inline 50static inline
75int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents, 51int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
76 enum dma_data_direction direction) 52 enum dma_data_direction direction)
@@ -91,11 +67,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
91 return nents; 67 return nents;
92} 68}
93 69
94/*
95 * Unmap a set of streaming mode DMA translations.
96 * Again, cpu read rules concerning calls here are the same as for
97 * pci_unmap_single() above.
98 */
99static inline 70static inline
100void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, 71void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
101 enum dma_data_direction direction) 72 enum dma_data_direction direction)
@@ -103,10 +74,6 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
103 BUG_ON(!valid_dma_direction(direction)); 74 BUG_ON(!valid_dma_direction(direction));
104} 75}
105 76
106/*
107 * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
108 * to pci_map_single, but takes a struct page instead of a virtual address
109 */
110static inline 77static inline
111dma_addr_t dma_map_page(struct device *dev, struct page *page, 78dma_addr_t dma_map_page(struct device *dev, struct page *page,
112 unsigned long offset, size_t size, 79 unsigned long offset, size_t size,
@@ -123,15 +90,6 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
123 BUG_ON(direction == DMA_NONE); 90 BUG_ON(direction == DMA_NONE);
124} 91}
125 92
126/*
127 * Make physical memory consistent for a single streaming mode DMA translation
128 * after a transfer.
129 *
130 * If you perform a pci_map_single() but wish to interrogate the buffer using
131 * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
132 * function before doing so. At the next point you give the PCI dma address
133 * back to the card, the device again owns the buffer.
134 */
135static inline 93static inline
136void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, 94void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
137 size_t size, enum dma_data_direction direction) 95 size_t size, enum dma_data_direction direction)
@@ -161,13 +119,6 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
161} 119}
162 120
163 121
164/*
165 * Make physical memory consistent for a set of streaming mode DMA translations
166 * after a transfer.
167 *
168 * The same as pci_dma_sync_single but for a scatter-gather list, same rules
169 * and usage.
170 */
171static inline 122static inline
172void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 123void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
173 int nelems, enum dma_data_direction direction) 124 int nelems, enum dma_data_direction direction)
@@ -187,12 +138,6 @@ int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
187 return 0; 138 return 0;
188} 139}
189 140
190/*
191 * Return whether the given PCI device DMA address mask can be supported
192 * properly. For example, if your device can only drive the low 24-bits during
193 * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
194 * function.
195 */
196static inline 141static inline
197int dma_supported(struct device *dev, u64 mask) 142int dma_supported(struct device *dev, u64 mask)
198{ 143{
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
index 1b0ba5e182b0..7c2e911052b6 100644
--- a/arch/mn10300/include/asm/ptrace.h
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -99,8 +99,6 @@ struct task_struct;
99extern void show_regs(struct pt_regs *); 99extern void show_regs(struct pt_regs *);
100 100
101#define arch_has_single_step() (1) 101#define arch_has_single_step() (1)
102extern void user_enable_single_step(struct task_struct *);
103extern void user_disable_single_step(struct task_struct *);
104 102
105#endif /* !__ASSEMBLY */ 103#endif /* !__ASSEMBLY */
106 104
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index c05acb95c2a9..9d056f515929 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -363,6 +363,7 @@
363#define __ARCH_WANT_STAT64 363#define __ARCH_WANT_STAT64
364#define __ARCH_WANT_SYS_ALARM 364#define __ARCH_WANT_SYS_ALARM
365#define __ARCH_WANT_SYS_GETHOSTNAME 365#define __ARCH_WANT_SYS_GETHOSTNAME
366#define __ARCH_WANT_SYS_IPC
366#define __ARCH_WANT_SYS_PAUSE 367#define __ARCH_WANT_SYS_PAUSE
367#define __ARCH_WANT_SYS_SGETMASK 368#define __ARCH_WANT_SYS_SGETMASK
368#define __ARCH_WANT_SYS_SIGNAL 369#define __ARCH_WANT_SYS_SIGNAL
@@ -375,6 +376,7 @@
375#define __ARCH_WANT_SYS_LLSEEK 376#define __ARCH_WANT_SYS_LLSEEK
376#define __ARCH_WANT_SYS_NICE 377#define __ARCH_WANT_SYS_NICE
377#define __ARCH_WANT_SYS_OLD_GETRLIMIT 378#define __ARCH_WANT_SYS_OLD_GETRLIMIT
379#define __ARCH_WANT_SYS_OLD_SELECT
378#define __ARCH_WANT_SYS_OLDUMOUNT 380#define __ARCH_WANT_SYS_OLDUMOUNT
379#define __ARCH_WANT_SYS_SIGPENDING 381#define __ARCH_WANT_SYS_SIGPENDING
380#define __ARCH_WANT_SYS_SIGPROCMASK 382#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 88e3e1c3cc21..d9ed5a15c547 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -468,7 +468,7 @@ ENTRY(sys_call_table)
468 .long sys_settimeofday 468 .long sys_settimeofday
469 .long sys_getgroups16 /* 80 */ 469 .long sys_getgroups16 /* 80 */
470 .long sys_setgroups16 470 .long sys_setgroups16
471 .long old_select 471 .long sys_old_select
472 .long sys_symlink 472 .long sys_symlink
473 .long sys_lstat 473 .long sys_lstat
474 .long sys_readlink /* 85 */ 474 .long sys_readlink /* 85 */
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
index 17cc6ce04e84..815f1355fad4 100644
--- a/arch/mn10300/kernel/sys_mn10300.c
+++ b/arch/mn10300/kernel/sys_mn10300.c
@@ -31,109 +31,3 @@ asmlinkage long old_mmap(unsigned long addr, unsigned long len,
31 return -EINVAL; 31 return -EINVAL;
32 return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); 32 return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
33} 33}
34
35struct sel_arg_struct {
36 unsigned long n;
37 fd_set *inp;
38 fd_set *outp;
39 fd_set *exp;
40 struct timeval *tvp;
41};
42
43asmlinkage int old_select(struct sel_arg_struct __user *arg)
44{
45 struct sel_arg_struct a;
46
47 if (copy_from_user(&a, arg, sizeof(a)))
48 return -EFAULT;
49 /* sys_select() does the appropriate kernel locking */
50 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
51}
52
53/*
54 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
55 *
56 * This is really horribly ugly.
57 */
58asmlinkage long sys_ipc(uint call, int first, int second,
59 int third, void __user *ptr, long fifth)
60{
61 int version, ret;
62
63 version = call >> 16; /* hack for backward compatibility */
64 call &= 0xffff;
65
66 switch (call) {
67 case SEMOP:
68 return sys_semtimedop(first, (struct sembuf __user *)ptr,
69 second, NULL);
70 case SEMTIMEDOP:
71 return sys_semtimedop(first, (struct sembuf __user *)ptr,
72 second,
73 (const struct timespec __user *)fifth);
74 case SEMGET:
75 return sys_semget(first, second, third);
76 case SEMCTL: {
77 union semun fourth;
78 if (!ptr)
79 return -EINVAL;
80 if (get_user(fourth.__pad, (void __user * __user *) ptr))
81 return -EFAULT;
82 return sys_semctl(first, second, third, fourth);
83 }
84
85 case MSGSND:
86 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
87 second, third);
88 case MSGRCV:
89 switch (version) {
90 case 0: {
91 struct ipc_kludge tmp;
92 if (!ptr)
93 return -EINVAL;
94
95 if (copy_from_user(&tmp,
96 (struct ipc_kludge __user *) ptr,
97 sizeof(tmp)))
98 return -EFAULT;
99 return sys_msgrcv(first, tmp.msgp, second,
100 tmp.msgtyp, third);
101 }
102 default:
103 return sys_msgrcv(first,
104 (struct msgbuf __user *) ptr,
105 second, fifth, third);
106 }
107 case MSGGET:
108 return sys_msgget((key_t) first, second);
109 case MSGCTL:
110 return sys_msgctl(first, second,
111 (struct msqid_ds __user *) ptr);
112
113 case SHMAT:
114 switch (version) {
115 default: {
116 ulong raddr;
117 ret = do_shmat(first, (char __user *) ptr, second,
118 &raddr);
119 if (ret)
120 return ret;
121 return put_user(raddr, (ulong *) third);
122 }
123 case 1: /* iBCS2 emulator entry point */
124 if (!segment_eq(get_fs(), get_ds()))
125 return -EINVAL;
126 return do_shmat(first, (char __user *) ptr, second,
127 (ulong *) third);
128 }
129 case SHMDT:
130 return sys_shmdt((char __user *)ptr);
131 case SHMGET:
132 return sys_shmget(first, second, third);
133 case SHMCTL:
134 return sys_shmctl(first, second,
135 (struct shmid_ds __user *) ptr);
136 default:
137 return -EINVAL;
138 }
139}
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index f388dc68f605..9c4da3d63bfb 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -95,6 +95,9 @@ config PM
95config STACKTRACE_SUPPORT 95config STACKTRACE_SUPPORT
96 def_bool y 96 def_bool y
97 97
98config NEED_DMA_MAP_STATE
99 def_bool y
100
98config ISA_DMA_API 101config ISA_DMA_API
99 bool 102 bool
100 103
diff --git a/arch/parisc/include/asm/compat.h b/arch/parisc/include/asm/compat.h
index 7f32611a7a5e..02b77baa5da6 100644
--- a/arch/parisc/include/asm/compat.h
+++ b/arch/parisc/include/asm/compat.h
@@ -7,7 +7,8 @@
7#include <linux/sched.h> 7#include <linux/sched.h>
8#include <linux/thread_info.h> 8#include <linux/thread_info.h>
9 9
10#define COMPAT_USER_HZ 100 10#define COMPAT_USER_HZ 100
11#define COMPAT_UTS_MACHINE "parisc\0\0"
11 12
12typedef u32 compat_size_t; 13typedef u32 compat_size_t;
13typedef s32 compat_ssize_t; 14typedef s32 compat_ssize_t;
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 64c7aa590ae5..2242a5c636c2 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -183,20 +183,6 @@ struct pci_bios_ops {
183 void (*fixup_bus)(struct pci_bus *bus); 183 void (*fixup_bus)(struct pci_bus *bus);
184}; 184};
185 185
186/* pci_unmap_{single,page} is not a nop, thus... */
187#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
188 dma_addr_t ADDR_NAME;
189#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
190 __u32 LEN_NAME;
191#define pci_unmap_addr(PTR, ADDR_NAME) \
192 ((PTR)->ADDR_NAME)
193#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
194 (((PTR)->ADDR_NAME) = (VAL))
195#define pci_unmap_len(PTR, LEN_NAME) \
196 ((PTR)->LEN_NAME)
197#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
198 (((PTR)->LEN_NAME) = (VAL))
199
200/* 186/*
201** Stuff declared in arch/parisc/kernel/pci.c 187** Stuff declared in arch/parisc/kernel/pci.c
202*/ 188*/
diff --git a/arch/parisc/include/asm/ptrace.h b/arch/parisc/include/asm/ptrace.h
index aead40b16dd8..7f09533da771 100644
--- a/arch/parisc/include/asm/ptrace.h
+++ b/arch/parisc/include/asm/ptrace.h
@@ -47,13 +47,8 @@ struct pt_regs {
47 47
48#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS)) 48#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
49 49
50struct task_struct;
51#define arch_has_single_step() 1 50#define arch_has_single_step() 1
52void user_disable_single_step(struct task_struct *task);
53void user_enable_single_step(struct task_struct *task);
54
55#define arch_has_block_step() 1 51#define arch_has_block_step() 1
56void user_enable_block_step(struct task_struct *task);
57 52
58/* XXX should we use iaoq[1] or iaoq[0] ? */ 53/* XXX should we use iaoq[1] or iaoq[0] ? */
59#define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0) 54#define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0)
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 9147391afb03..c9b932260f47 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -234,18 +234,3 @@ long parisc_personality(unsigned long personality)
234 234
235 return err; 235 return err;
236} 236}
237
238long parisc_newuname(struct new_utsname __user *name)
239{
240 int err = sys_newuname(name);
241
242#ifdef CONFIG_COMPAT
243 if (!err && personality(current->personality) == PER_LINUX32) {
244 if (__put_user(0, name->machine + 6) ||
245 __put_user(0, name->machine + 7))
246 err = -EFAULT;
247 }
248#endif
249
250 return err;
251}
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index de5f6dab48b7..3d52c978738f 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -127,7 +127,7 @@
127 ENTRY_SAME(socketpair) 127 ENTRY_SAME(socketpair)
128 ENTRY_SAME(setpgid) 128 ENTRY_SAME(setpgid)
129 ENTRY_SAME(send) 129 ENTRY_SAME(send)
130 ENTRY_OURS(newuname) 130 ENTRY_SAME(newuname)
131 ENTRY_SAME(umask) /* 60 */ 131 ENTRY_SAME(umask) /* 60 */
132 ENTRY_SAME(chroot) 132 ENTRY_SAME(chroot)
133 ENTRY_COMP(ustat) 133 ENTRY_COMP(ustat)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 155d571f5e26..8a54eb8e3768 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -672,6 +672,9 @@ config ZONE_DMA
672 bool 672 bool
673 default y 673 default y
674 674
675config NEED_DMA_MAP_STATE
676 def_bool (PPC64 || NOT_COHERENT_CACHE)
677
675config GENERIC_ISA_DMA 678config GENERIC_ISA_DMA
676 bool 679 bool
677 depends on PPC64 || POWER4 || 6xx && !CPM2 680 depends on PPC64 || POWER4 || 6xx && !CPM2
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 977f260d5e64..83f4b79dff85 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * GE Fanuc PPC9A Device Tree Source 2 * GE PPC9A Device Tree Source
3 * 3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 8e4efff3bda1..fc3a331dd392 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * GE Fanuc SBC310 Device Tree Source 2 * GE SBC310 Device Tree Source
3 * 3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index bb7060078fb4..c0671cc98125 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * GE Fanuc SBC610 Device Tree Source 2 * GE SBC610 Device Tree Source
3 * 3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
index 65b8b4f27efe..d8b5d12fb663 100644
--- a/arch/powerpc/boot/dts/kmeter1.dts
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -490,7 +490,7 @@
490 compatible = "cfi-flash"; 490 compatible = "cfi-flash";
491 /* 491 /*
492 * The Intel P30 chip has 2 non-identical chips on 492 * The Intel P30 chip has 2 non-identical chips on
493 * one die, so we need to define 2 seperate regions 493 * one die, so we need to define 2 separate regions
494 * that are scanned by physmap_of independantly. 494 * that are scanned by physmap_of independantly.
495 */ 495 */
496 reg = <0 0x00000000 0x02000000 496 reg = <0 0x00000000 0x02000000
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 4774c2f92232..396d21a80058 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -7,7 +7,8 @@
7#include <linux/types.h> 7#include <linux/types.h>
8#include <linux/sched.h> 8#include <linux/sched.h>
9 9
10#define COMPAT_USER_HZ 100 10#define COMPAT_USER_HZ 100
11#define COMPAT_UTS_MACHINE "ppc\0\0"
11 12
12typedef u32 compat_size_t; 13typedef u32 compat_size_t;
13typedef s32 compat_ssize_t; 14typedef s32 compat_ssize_t;
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 80a973bb9e71..c85ef230135b 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -127,9 +127,6 @@ static inline int dma_supported(struct device *dev, u64 mask)
127 return dma_ops->dma_supported(dev, mask); 127 return dma_ops->dma_supported(dev, mask);
128} 128}
129 129
130/* We have our own implementation of pci_set_dma_mask() */
131#define HAVE_ARCH_PCI_SET_DMA_MASK
132
133static inline int dma_set_mask(struct device *dev, u64 dma_mask) 130static inline int dma_set_mask(struct device *dev, u64 dma_mask)
134{ 131{
135 struct dma_map_ops *dma_ops = get_dma_ops(dev); 132 struct dma_map_ops *dma_ops = get_dma_ops(dev);
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index d8a693109c82..a011603d4079 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -14,6 +14,9 @@
14#define _ASM_POWERPC_PACA_H 14#define _ASM_POWERPC_PACA_H
15#ifdef __KERNEL__ 15#ifdef __KERNEL__
16 16
17#ifdef CONFIG_PPC64
18
19#include <linux/init.h>
17#include <asm/types.h> 20#include <asm/types.h>
18#include <asm/lppaca.h> 21#include <asm/lppaca.h>
19#include <asm/mmu.h> 22#include <asm/mmu.h>
@@ -145,8 +148,19 @@ struct paca_struct {
145#endif 148#endif
146}; 149};
147 150
148extern struct paca_struct paca[]; 151extern struct paca_struct *paca;
149extern void initialise_pacas(void); 152extern __initdata struct paca_struct boot_paca;
153extern void initialise_paca(struct paca_struct *new_paca, int cpu);
154
155extern void allocate_pacas(void);
156extern void free_unused_pacas(void);
157
158#else /* CONFIG_PPC64 */
159
160static inline void allocate_pacas(void) { };
161static inline void free_unused_pacas(void) { };
162
163#endif /* CONFIG_PPC64 */
150 164
151#endif /* __KERNEL__ */ 165#endif /* __KERNEL__ */
152#endif /* _ASM_POWERPC_PACA_H */ 166#endif /* _ASM_POWERPC_PACA_H */
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index b5ea626eea2d..a20a9ad2258b 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -141,38 +141,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
141 141
142#define HAVE_PCI_LEGACY 1 142#define HAVE_PCI_LEGACY 1
143 143
144#if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE)
145/*
146 * For 64-bit kernels, pci_unmap_{single,page} is not a nop.
147 * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and
148 * so on are not nops.
149 * and thus...
150 */
151#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
152 dma_addr_t ADDR_NAME;
153#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
154 __u32 LEN_NAME;
155#define pci_unmap_addr(PTR, ADDR_NAME) \
156 ((PTR)->ADDR_NAME)
157#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
158 (((PTR)->ADDR_NAME) = (VAL))
159#define pci_unmap_len(PTR, LEN_NAME) \
160 ((PTR)->LEN_NAME)
161#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
162 (((PTR)->LEN_NAME) = (VAL))
163
164#else /* 32-bit && coherent */
165
166/* pci_unmap_{page,single} is a nop so... */
167#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
168#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
169#define pci_unmap_addr(PTR, ADDR_NAME) (0)
170#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
171#define pci_unmap_len(PTR, LEN_NAME) (0)
172#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
173
174#endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */
175
176#ifdef CONFIG_PPC64 144#ifdef CONFIG_PPC64
177 145
178/* The PCI address space does not equal the physical memory address 146/* The PCI address space does not equal the physical memory address
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 3288ce3997e0..e6d4ce69b126 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -1,110 +1,23 @@
1/* 1/*
2 * Performance event support - PowerPC-specific definitions. 2 * Performance event support - hardware-specific disambiguation
3 * 3 *
4 * Copyright 2008-2009 Paul Mackerras, IBM Corporation. 4 * For now this is a compile-time decision, but eventually it should be
5 * runtime. This would allow multiplatform perf event support for e300 (fsl
6 * embedded perf counters) plus server/classic, and would accommodate
7 * devices other than the core which provide their own performance counters.
8 *
9 * Copyright 2010 Freescale Semiconductor, Inc.
5 * 10 *
6 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 13 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version. 14 * 2 of the License, or (at your option) any later version.
10 */ 15 */
11#include <linux/types.h>
12
13#include <asm/hw_irq.h>
14
15#define MAX_HWEVENTS 8
16#define MAX_EVENT_ALTERNATIVES 8
17#define MAX_LIMITED_HWCOUNTERS 2
18
19/*
20 * This struct provides the constants and functions needed to
21 * describe the PMU on a particular POWER-family CPU.
22 */
23struct power_pmu {
24 const char *name;
25 int n_counter;
26 int max_alternatives;
27 unsigned long add_fields;
28 unsigned long test_adder;
29 int (*compute_mmcr)(u64 events[], int n_ev,
30 unsigned int hwc[], unsigned long mmcr[]);
31 int (*get_constraint)(u64 event_id, unsigned long *mskp,
32 unsigned long *valp);
33 int (*get_alternatives)(u64 event_id, unsigned int flags,
34 u64 alt[]);
35 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
36 int (*limited_pmc_event)(u64 event_id);
37 u32 flags;
38 int n_generic;
39 int *generic_events;
40 int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
41 [PERF_COUNT_HW_CACHE_OP_MAX]
42 [PERF_COUNT_HW_CACHE_RESULT_MAX];
43};
44
45/*
46 * Values for power_pmu.flags
47 */
48#define PPMU_LIMITED_PMC5_6 1 /* PMC5/6 have limited function */
49#define PPMU_ALT_SIPR 2 /* uses alternate posn for SIPR/HV */
50
51/*
52 * Values for flags to get_alternatives()
53 */
54#define PPMU_LIMITED_PMC_OK 1 /* can put this on a limited PMC */
55#define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */
56#define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */
57
58extern int register_power_pmu(struct power_pmu *);
59 16
60struct pt_regs;
61extern unsigned long perf_misc_flags(struct pt_regs *regs);
62extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
63
64#define PERF_EVENT_INDEX_OFFSET 1
65
66/*
67 * Only override the default definitions in include/linux/perf_event.h
68 * if we have hardware PMU support.
69 */
70#ifdef CONFIG_PPC_PERF_CTRS 17#ifdef CONFIG_PPC_PERF_CTRS
71#define perf_misc_flags(regs) perf_misc_flags(regs) 18#include <asm/perf_event_server.h>
72#endif 19#endif
73 20
74/* 21#ifdef CONFIG_FSL_EMB_PERF_EVENT
75 * The power_pmu.get_constraint function returns a 32/64-bit value and 22#include <asm/perf_event_fsl_emb.h>
76 * a 32/64-bit mask that express the constraints between this event_id and 23#endif
77 * other events.
78 *
79 * The value and mask are divided up into (non-overlapping) bitfields
80 * of three different types:
81 *
82 * Select field: this expresses the constraint that some set of bits
83 * in MMCR* needs to be set to a specific value for this event_id. For a
84 * select field, the mask contains 1s in every bit of the field, and
85 * the value contains a unique value for each possible setting of the
86 * MMCR* bits. The constraint checking code will ensure that two events
87 * that set the same field in their masks have the same value in their
88 * value dwords.
89 *
90 * Add field: this expresses the constraint that there can be at most
91 * N events in a particular class. A field of k bits can be used for
92 * N <= 2^(k-1) - 1. The mask has the most significant bit of the field
93 * set (and the other bits 0), and the value has only the least significant
94 * bit of the field set. In addition, the 'add_fields' and 'test_adder'
95 * in the struct power_pmu for this processor come into play. The
96 * add_fields value contains 1 in the LSB of the field, and the
97 * test_adder contains 2^(k-1) - 1 - N in the field.
98 *
99 * NAND field: this expresses the constraint that you may not have events
100 * in all of a set of classes. (For example, on PPC970, you can't select
101 * events from the FPU, ISU and IDU simultaneously, although any two are
102 * possible.) For N classes, the field is N+1 bits wide, and each class
103 * is assigned one bit from the least-significant N bits. The mask has
104 * only the most-significant bit set, and the value has only the bit
105 * for the event_id's class set. The test_adder has the least significant
106 * bit set in the field.
107 *
108 * If an event_id is not subject to the constraint expressed by a particular
109 * field, then it will have 0 in both the mask and value for that field.
110 */
diff --git a/arch/powerpc/include/asm/perf_event_fsl_emb.h b/arch/powerpc/include/asm/perf_event_fsl_emb.h
new file mode 100644
index 000000000000..718a9fa94e68
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_event_fsl_emb.h
@@ -0,0 +1,50 @@
1/*
2 * Performance event support - Freescale embedded specific definitions.
3 *
4 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
5 * Copyright 2010 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/types.h>
14#include <asm/hw_irq.h>
15
16#define MAX_HWEVENTS 4
17
18/* event flags */
19#define FSL_EMB_EVENT_VALID 1
20#define FSL_EMB_EVENT_RESTRICTED 2
21
22/* upper half of event flags is PMLCb */
23#define FSL_EMB_EVENT_THRESHMUL 0x0000070000000000ULL
24#define FSL_EMB_EVENT_THRESH 0x0000003f00000000ULL
25
26struct fsl_emb_pmu {
27 const char *name;
28 int n_counter; /* total number of counters */
29
30 /*
31 * The number of contiguous counters starting at zero that
32 * can hold restricted events, or zero if there are no
33 * restricted events.
34 *
35 * This isn't a very flexible method of expressing constraints,
36 * but it's very simple and is adequate for existing chips.
37 */
38 int n_restricted;
39
40 /* Returns event flags and PMLCb (FSL_EMB_EVENT_*) */
41 u64 (*xlate_event)(u64 event_id);
42
43 int n_generic;
44 int *generic_events;
45 int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
46 [PERF_COUNT_HW_CACHE_OP_MAX]
47 [PERF_COUNT_HW_CACHE_RESULT_MAX];
48};
49
50int register_fsl_emb_pmu(struct fsl_emb_pmu *);
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
new file mode 100644
index 000000000000..8f1df1208d23
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -0,0 +1,110 @@
1/*
2 * Performance event support - PowerPC classic/server specific definitions.
3 *
4 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/types.h>
13#include <asm/hw_irq.h>
14
15#define MAX_HWEVENTS 8
16#define MAX_EVENT_ALTERNATIVES 8
17#define MAX_LIMITED_HWCOUNTERS 2
18
19/*
20 * This struct provides the constants and functions needed to
21 * describe the PMU on a particular POWER-family CPU.
22 */
23struct power_pmu {
24 const char *name;
25 int n_counter;
26 int max_alternatives;
27 unsigned long add_fields;
28 unsigned long test_adder;
29 int (*compute_mmcr)(u64 events[], int n_ev,
30 unsigned int hwc[], unsigned long mmcr[]);
31 int (*get_constraint)(u64 event_id, unsigned long *mskp,
32 unsigned long *valp);
33 int (*get_alternatives)(u64 event_id, unsigned int flags,
34 u64 alt[]);
35 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
36 int (*limited_pmc_event)(u64 event_id);
37 u32 flags;
38 int n_generic;
39 int *generic_events;
40 int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
41 [PERF_COUNT_HW_CACHE_OP_MAX]
42 [PERF_COUNT_HW_CACHE_RESULT_MAX];
43};
44
45/*
46 * Values for power_pmu.flags
47 */
48#define PPMU_LIMITED_PMC5_6 1 /* PMC5/6 have limited function */
49#define PPMU_ALT_SIPR 2 /* uses alternate posn for SIPR/HV */
50
51/*
52 * Values for flags to get_alternatives()
53 */
54#define PPMU_LIMITED_PMC_OK 1 /* can put this on a limited PMC */
55#define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */
56#define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */
57
58extern int register_power_pmu(struct power_pmu *);
59
60struct pt_regs;
61extern unsigned long perf_misc_flags(struct pt_regs *regs);
62extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
63
64#define PERF_EVENT_INDEX_OFFSET 1
65
66/*
67 * Only override the default definitions in include/linux/perf_event.h
68 * if we have hardware PMU support.
69 */
70#ifdef CONFIG_PPC_PERF_CTRS
71#define perf_misc_flags(regs) perf_misc_flags(regs)
72#endif
73
74/*
75 * The power_pmu.get_constraint function returns a 32/64-bit value and
76 * a 32/64-bit mask that express the constraints between this event_id and
77 * other events.
78 *
79 * The value and mask are divided up into (non-overlapping) bitfields
80 * of three different types:
81 *
82 * Select field: this expresses the constraint that some set of bits
83 * in MMCR* needs to be set to a specific value for this event_id. For a
84 * select field, the mask contains 1s in every bit of the field, and
85 * the value contains a unique value for each possible setting of the
86 * MMCR* bits. The constraint checking code will ensure that two events
87 * that set the same field in their masks have the same value in their
88 * value dwords.
89 *
90 * Add field: this expresses the constraint that there can be at most
91 * N events in a particular class. A field of k bits can be used for
92 * N <= 2^(k-1) - 1. The mask has the most significant bit of the field
93 * set (and the other bits 0), and the value has only the least significant
94 * bit of the field set. In addition, the 'add_fields' and 'test_adder'
95 * in the struct power_pmu for this processor come into play. The
96 * add_fields value contains 1 in the LSB of the field, and the
97 * test_adder contains 2^(k-1) - 1 - N in the field.
98 *
99 * NAND field: this expresses the constraint that you may not have events
100 * in all of a set of classes. (For example, on PPC970, you can't select
101 * events from the FPU, ISU and IDU simultaneously, although any two are
102 * possible.) For N classes, the field is N+1 bits wide, and each class
103 * is assigned one bit from the least-significant N bits. The mask has
104 * only the most-significant bit set, and the value has only the bit
105 * for the event_id's class set. The test_adder has the least significant
106 * bit set in the field.
107 *
108 * If an event_id is not subject to the constraint expressed by a particular
109 * field, then it will have 0 in both the mask and value for that field.
110 */
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index b45108126562..9e2d84c06b74 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -137,15 +137,8 @@ do { \
137} while (0) 137} while (0)
138#endif /* __powerpc64__ */ 138#endif /* __powerpc64__ */
139 139
140/*
141 * These are defined as per linux/ptrace.h, which see.
142 */
143#define arch_has_single_step() (1) 140#define arch_has_single_step() (1)
144#define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601)) 141#define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601))
145extern void user_enable_single_step(struct task_struct *);
146extern void user_enable_block_step(struct task_struct *);
147extern void user_disable_single_step(struct task_struct *);
148
149#define ARCH_HAS_USER_SINGLE_STEP_INFO 142#define ARCH_HAS_USER_SINGLE_STEP_INFO
150 143
151#endif /* __ASSEMBLY__ */ 144#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 8808d307fe7e..414d434a66d0 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -421,8 +421,8 @@
421/* Bit definitions related to the DBCR2. */ 421/* Bit definitions related to the DBCR2. */
422#define DBCR2_DAC1US 0xC0000000 /* Data Addr Cmp 1 Sup/User */ 422#define DBCR2_DAC1US 0xC0000000 /* Data Addr Cmp 1 Sup/User */
423#define DBCR2_DAC1ER 0x30000000 /* Data Addr Cmp 1 Eff/Real */ 423#define DBCR2_DAC1ER 0x30000000 /* Data Addr Cmp 1 Eff/Real */
424#define DBCR2_DAC2US 0x00000000 /* Data Addr Cmp 2 Sup/User */ 424#define DBCR2_DAC2US 0x0C000000 /* Data Addr Cmp 2 Sup/User */
425#define DBCR2_DAC2ER 0x00000000 /* Data Addr Cmp 2 Eff/Real */ 425#define DBCR2_DAC2ER 0x03000000 /* Data Addr Cmp 2 Eff/Real */
426#define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */ 426#define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */
427#define DBCR2_DAC12MM 0x00400000 /* DAC 1-2 Mask mode*/ 427#define DBCR2_DAC12MM 0x00400000 /* DAC 1-2 Mask mode*/
428#define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */ 428#define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h
index 0de404dfee8b..77bb71cfd991 100644
--- a/arch/powerpc/include/asm/reg_fsl_emb.h
+++ b/arch/powerpc/include/asm/reg_fsl_emb.h
@@ -31,7 +31,7 @@
31#define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */ 31#define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */
32#define PMLCA_CE 0x04000000 /* Condition Enable */ 32#define PMLCA_CE 0x04000000 /* Condition Enable */
33 33
34#define PMLCA_EVENT_MASK 0x007f0000 /* Event field */ 34#define PMLCA_EVENT_MASK 0x00ff0000 /* Event field */
35#define PMLCA_EVENT_SHIFT 16 35#define PMLCA_EVENT_SHIFT 16
36 36
37#define PMRN_PMLCB0 0x110 /* PM Local Control B0 */ 37#define PMRN_PMLCB0 0x110 /* PM Local Control B0 */
diff --git a/arch/powerpc/include/asm/syscalls.h b/arch/powerpc/include/asm/syscalls.h
index eb8eb400c664..4084e567d28e 100644
--- a/arch/powerpc/include/asm/syscalls.h
+++ b/arch/powerpc/include/asm/syscalls.h
@@ -7,7 +7,6 @@
7#include <linux/types.h> 7#include <linux/types.h>
8#include <asm/signal.h> 8#include <asm/signal.h>
9 9
10struct new_utsname;
11struct pt_regs; 10struct pt_regs;
12struct rtas_args; 11struct rtas_args;
13struct sigaction; 12struct sigaction;
@@ -35,12 +34,9 @@ asmlinkage long sys_pipe2(int __user *fildes, int flags);
35asmlinkage long sys_rt_sigaction(int sig, 34asmlinkage long sys_rt_sigaction(int sig,
36 const struct sigaction __user *act, 35 const struct sigaction __user *act,
37 struct sigaction __user *oact, size_t sigsetsize); 36 struct sigaction __user *oact, size_t sigsetsize);
38asmlinkage int sys_ipc(uint call, int first, unsigned long second,
39 long third, void __user *ptr, long fifth);
40asmlinkage long ppc64_personality(unsigned long personality); 37asmlinkage long ppc64_personality(unsigned long personality);
41asmlinkage int ppc_rtas(struct rtas_args __user *uargs); 38asmlinkage int ppc_rtas(struct rtas_args __user *uargs);
42asmlinkage time_t sys64_time(time_t __user * tloc); 39asmlinkage time_t sys64_time(time_t __user * tloc);
43asmlinkage long ppc_newuname(struct new_utsname __user * name);
44 40
45asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset, 41asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset,
46 size_t sigsetsize); 42 size_t sigsetsize);
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 07d2d19ab5e9..a5ee345b6a5c 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -125,7 +125,7 @@ SYSCALL_SPU(fsync)
125SYS32ONLY(sigreturn) 125SYS32ONLY(sigreturn)
126PPC_SYS(clone) 126PPC_SYS(clone)
127COMPAT_SYS_SPU(setdomainname) 127COMPAT_SYS_SPU(setdomainname)
128PPC_SYS_SPU(newuname) 128SYSCALL_SPU(newuname)
129SYSCALL(ni_syscall) 129SYSCALL(ni_syscall)
130COMPAT_SYS_SPU(adjtimex) 130COMPAT_SYS_SPU(adjtimex)
131SYSCALL_SPU(mprotect) 131SYSCALL_SPU(mprotect)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index f6ca76176766..f0a10266e7f7 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -364,6 +364,7 @@
364#define __ARCH_WANT_STAT64 364#define __ARCH_WANT_STAT64
365#define __ARCH_WANT_SYS_ALARM 365#define __ARCH_WANT_SYS_ALARM
366#define __ARCH_WANT_SYS_GETHOSTNAME 366#define __ARCH_WANT_SYS_GETHOSTNAME
367#define __ARCH_WANT_SYS_IPC
367#define __ARCH_WANT_SYS_PAUSE 368#define __ARCH_WANT_SYS_PAUSE
368#define __ARCH_WANT_SYS_SGETMASK 369#define __ARCH_WANT_SYS_SGETMASK
369#define __ARCH_WANT_SYS_SIGNAL 370#define __ARCH_WANT_SYS_SIGNAL
@@ -376,6 +377,7 @@
376#define __ARCH_WANT_SYS_LLSEEK 377#define __ARCH_WANT_SYS_LLSEEK
377#define __ARCH_WANT_SYS_NICE 378#define __ARCH_WANT_SYS_NICE
378#define __ARCH_WANT_SYS_OLD_GETRLIMIT 379#define __ARCH_WANT_SYS_OLD_GETRLIMIT
380#define __ARCH_WANT_SYS_OLD_UNAME
379#define __ARCH_WANT_SYS_OLDUMOUNT 381#define __ARCH_WANT_SYS_OLDUMOUNT
380#define __ARCH_WANT_SYS_SIGPENDING 382#define __ARCH_WANT_SYS_SIGPENDING
381#define __ARCH_WANT_SYS_SIGPROCMASK 383#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index c002b0410219..877326320e74 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -98,11 +98,16 @@ obj64-$(CONFIG_AUDIT) += compat_audit.o
98 98
99obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 99obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
100obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 100obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
101obj-$(CONFIG_PPC_PERF_CTRS) += perf_event.o perf_callchain.o 101obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o
102
103obj-$(CONFIG_PPC_PERF_CTRS) += perf_event.o
102obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \ 104obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
103 power5+-pmu.o power6-pmu.o power7-pmu.o 105 power5+-pmu.o power6-pmu.o power7-pmu.o
104obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o 106obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
105 107
108obj-$(CONFIG_FSL_EMB_PERF_EVENT) += perf_event_fsl_emb.o
109obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o
110
106obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o 111obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
107 112
108ifneq ($(CONFIG_PPC_INDIRECT_IO),y) 113ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index bb37b1d19a58..01fe9ce28379 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -642,7 +642,7 @@ static struct kobj_attribute *cache_index_opt_attrs[] = {
642 &cache_assoc_attr, 642 &cache_assoc_attr,
643}; 643};
644 644
645static struct sysfs_ops cache_index_ops = { 645static const struct sysfs_ops cache_index_ops = {
646 .show = cache_index_show, 646 .show = cache_index_show,
647}; 647};
648 648
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 2fc82bac3bbc..8af4949434b2 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1808,7 +1808,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1808 .icache_bsize = 64, 1808 .icache_bsize = 64,
1809 .dcache_bsize = 64, 1809 .dcache_bsize = 64,
1810 .num_pmcs = 4, 1810 .num_pmcs = 4,
1811 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1811 .oprofile_cpu_type = "ppc/e500mc",
1812 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1812 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1813 .cpu_setup = __setup_cpu_e500mc, 1813 .cpu_setup = __setup_cpu_e500mc,
1814 .machine_check = machine_check_e500, 1814 .machine_check = machine_check_e500,
diff --git a/arch/powerpc/kernel/e500-pmu.c b/arch/powerpc/kernel/e500-pmu.c
new file mode 100644
index 000000000000..7c07de0d8943
--- /dev/null
+++ b/arch/powerpc/kernel/e500-pmu.c
@@ -0,0 +1,129 @@
1/*
2 * Performance counter support for e500 family processors.
3 *
4 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
5 * Copyright 2010 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#include <linux/string.h>
13#include <linux/perf_event.h>
14#include <asm/reg.h>
15#include <asm/cputable.h>
16
17/*
18 * Map of generic hardware event types to hardware events
19 * Zero if unsupported
20 */
21static int e500_generic_events[] = {
22 [PERF_COUNT_HW_CPU_CYCLES] = 1,
23 [PERF_COUNT_HW_INSTRUCTIONS] = 2,
24 [PERF_COUNT_HW_CACHE_MISSES] = 41, /* Data L1 cache reloads */
25 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12,
26 [PERF_COUNT_HW_BRANCH_MISSES] = 15,
27};
28
29#define C(x) PERF_COUNT_HW_CACHE_##x
30
31/*
32 * Table of generalized cache-related events.
33 * 0 means not supported, -1 means nonsensical, other values
34 * are event codes.
35 */
36static int e500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
37 /*
38 * D-cache misses are not split into read/write/prefetch;
39 * use raw event 41.
40 */
41 [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
42 [C(OP_READ)] = { 27, 0 },
43 [C(OP_WRITE)] = { 28, 0 },
44 [C(OP_PREFETCH)] = { 29, 0 },
45 },
46 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
47 [C(OP_READ)] = { 2, 60 },
48 [C(OP_WRITE)] = { -1, -1 },
49 [C(OP_PREFETCH)] = { 0, 0 },
50 },
51 /*
52 * Assuming LL means L2, it's not a good match for this model.
53 * It allocates only on L1 castout or explicit prefetch, and
54 * does not have separate read/write events (but it does have
55 * separate instruction/data events).
56 */
57 [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
58 [C(OP_READ)] = { 0, 0 },
59 [C(OP_WRITE)] = { 0, 0 },
60 [C(OP_PREFETCH)] = { 0, 0 },
61 },
62 /*
63 * There are data/instruction MMU misses, but that's a miss on
64 * the chip's internal level-one TLB which is probably not
65 * what the user wants. Instead, unified level-two TLB misses
66 * are reported here.
67 */
68 [C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
69 [C(OP_READ)] = { 26, 66 },
70 [C(OP_WRITE)] = { -1, -1 },
71 [C(OP_PREFETCH)] = { -1, -1 },
72 },
73 [C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
74 [C(OP_READ)] = { 12, 15 },
75 [C(OP_WRITE)] = { -1, -1 },
76 [C(OP_PREFETCH)] = { -1, -1 },
77 },
78};
79
80static int num_events = 128;
81
82/* Upper half of event id is PMLCb, for threshold events */
83static u64 e500_xlate_event(u64 event_id)
84{
85 u32 event_low = (u32)event_id;
86 u64 ret;
87
88 if (event_low >= num_events)
89 return 0;
90
91 ret = FSL_EMB_EVENT_VALID;
92
93 if (event_low >= 76 && event_low <= 81) {
94 ret |= FSL_EMB_EVENT_RESTRICTED;
95 ret |= event_id &
96 (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH);
97 } else if (event_id &
98 (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH)) {
99 /* Threshold requested on non-threshold event */
100 return 0;
101 }
102
103 return ret;
104}
105
106static struct fsl_emb_pmu e500_pmu = {
107 .name = "e500 family",
108 .n_counter = 4,
109 .n_restricted = 2,
110 .xlate_event = e500_xlate_event,
111 .n_generic = ARRAY_SIZE(e500_generic_events),
112 .generic_events = e500_generic_events,
113 .cache_events = &e500_cache_events,
114};
115
116static int init_e500_pmu(void)
117{
118 if (!cur_cpu_spec->oprofile_cpu_type)
119 return -ENODEV;
120
121 if (!strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e500mc"))
122 num_events = 256;
123 else if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e500"))
124 return -ENODEV;
125
126 return register_fsl_emb_pmu(&e500_pmu);
127}
128
129arch_initcall(init_e500_pmu);
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 925807488022..bed9a29ee383 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -219,7 +219,8 @@ generic_secondary_common_init:
219 * physical cpu id in r24, we need to search the pacas to find 219 * physical cpu id in r24, we need to search the pacas to find
220 * which logical id maps to our physical one. 220 * which logical id maps to our physical one.
221 */ 221 */
222 LOAD_REG_ADDR(r13, paca) /* Get base vaddr of paca array */ 222 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
223 ld r13,0(r13) /* Get base vaddr of paca array */
223 li r5,0 /* logical cpu id */ 224 li r5,0 /* logical cpu id */
2241: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 2251: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
225 cmpw r6,r24 /* Compare to our id */ 226 cmpw r6,r24 /* Compare to our id */
@@ -536,7 +537,8 @@ _GLOBAL(pmac_secondary_start)
536 mtmsrd r3 /* RI on */ 537 mtmsrd r3 /* RI on */
537 538
538 /* Set up a paca value for this processor. */ 539 /* Set up a paca value for this processor. */
539 LOAD_REG_ADDR(r4,paca) /* Get base vaddr of paca array */ 540 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
541 ld r4,0(r4) /* Get base vaddr of paca array */
540 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */ 542 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
541 add r13,r13,r4 /* for this processor. */ 543 add r13,r13,r4 /* for this processor. */
542 mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG*/ 544 mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG*/
@@ -615,6 +617,17 @@ _GLOBAL(start_secondary_prolog)
615 std r3,0(r1) /* Zero the stack frame pointer */ 617 std r3,0(r1) /* Zero the stack frame pointer */
616 bl .start_secondary 618 bl .start_secondary
617 b . 619 b .
620/*
621 * Reset stack pointer and call start_secondary
622 * to continue with online operation when woken up
623 * from cede in cpu offline.
624 */
625_GLOBAL(start_secondary_resume)
626 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
627 li r3,0
628 std r3,0(r1) /* Zero the stack frame pointer */
629 bl .start_secondary
630 b .
618#endif 631#endif
619 632
620/* 633/*
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 9ddfaef1a184..035ada5443ee 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -469,7 +469,7 @@ static int __init serial_dev_init(void)
469 return -ENODEV; 469 return -ENODEV;
470 470
471 /* 471 /*
472 * Before we register the platfrom serial devices, we need 472 * Before we register the platform serial devices, we need
473 * to fixup their interrupts and their IO ports. 473 * to fixup their interrupts and their IO ports.
474 */ 474 */
475 DBG("Fixing serial ports interrupts and IO ports ...\n"); 475 DBG("Fixing serial ports interrupts and IO ports ...\n");
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index d16b1ea55d44..0c40c6f476fe 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -9,11 +9,15 @@
9 9
10#include <linux/threads.h> 10#include <linux/threads.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/lmb.h>
12 13
14#include <asm/firmware.h>
13#include <asm/lppaca.h> 15#include <asm/lppaca.h>
14#include <asm/paca.h> 16#include <asm/paca.h>
15#include <asm/sections.h> 17#include <asm/sections.h>
16#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19#include <asm/iseries/lpar_map.h>
20#include <asm/iseries/hv_types.h>
17 21
18/* This symbol is provided by the linker - let it fill in the paca 22/* This symbol is provided by the linker - let it fill in the paca
19 * field correctly */ 23 * field correctly */
@@ -70,37 +74,82 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
70 * processors. The processor VPD array needs one entry per physical 74 * processors. The processor VPD array needs one entry per physical
71 * processor (not thread). 75 * processor (not thread).
72 */ 76 */
73struct paca_struct paca[NR_CPUS]; 77struct paca_struct *paca;
74EXPORT_SYMBOL(paca); 78EXPORT_SYMBOL(paca);
75 79
76void __init initialise_pacas(void) 80struct paca_struct boot_paca;
77{
78 int cpu;
79 81
80 /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB 82void __init initialise_paca(struct paca_struct *new_paca, int cpu)
81 * of the TOC can be addressed using a single machine instruction. 83{
82 */ 84 /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
85 * of the TOC can be addressed using a single machine instruction.
86 */
83 unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL; 87 unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
84 88
85 /* Can't use for_each_*_cpu, as they aren't functional yet */
86 for (cpu = 0; cpu < NR_CPUS; cpu++) {
87 struct paca_struct *new_paca = &paca[cpu];
88
89#ifdef CONFIG_PPC_BOOK3S 89#ifdef CONFIG_PPC_BOOK3S
90 new_paca->lppaca_ptr = &lppaca[cpu]; 90 new_paca->lppaca_ptr = &lppaca[cpu];
91#else 91#else
92 new_paca->kernel_pgd = swapper_pg_dir; 92 new_paca->kernel_pgd = swapper_pg_dir;
93#endif 93#endif
94 new_paca->lock_token = 0x8000; 94 new_paca->lock_token = 0x8000;
95 new_paca->paca_index = cpu; 95 new_paca->paca_index = cpu;
96 new_paca->kernel_toc = kernel_toc; 96 new_paca->kernel_toc = kernel_toc;
97 new_paca->kernelbase = (unsigned long) _stext; 97 new_paca->kernelbase = (unsigned long) _stext;
98 new_paca->kernel_msr = MSR_KERNEL; 98 new_paca->kernel_msr = MSR_KERNEL;
99 new_paca->hw_cpu_id = 0xffff; 99 new_paca->hw_cpu_id = 0xffff;
100 new_paca->__current = &init_task; 100 new_paca->__current = &init_task;
101#ifdef CONFIG_PPC_STD_MMU_64 101#ifdef CONFIG_PPC_STD_MMU_64
102 new_paca->slb_shadow_ptr = &slb_shadow[cpu]; 102 new_paca->slb_shadow_ptr = &slb_shadow[cpu];
103#endif /* CONFIG_PPC_STD_MMU_64 */ 103#endif /* CONFIG_PPC_STD_MMU_64 */
104}
105
106static int __initdata paca_size;
107
108void __init allocate_pacas(void)
109{
110 int nr_cpus, cpu, limit;
111
112 /*
113 * We can't take SLB misses on the paca, and we want to access them
114 * in real mode, so allocate them within the RMA and also within
115 * the first segment. On iSeries they must be within the area mapped
116 * by the HV, which is HvPagesToMap * HVPAGESIZE bytes.
117 */
118 limit = min(0x10000000ULL, lmb.rmo_size);
119 if (firmware_has_feature(FW_FEATURE_ISERIES))
120 limit = min(limit, HvPagesToMap * HVPAGESIZE);
121
122 nr_cpus = NR_CPUS;
123 /* On iSeries we know we can never have more than 64 cpus */
124 if (firmware_has_feature(FW_FEATURE_ISERIES))
125 nr_cpus = min(64, nr_cpus);
126
127 paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpus);
128
129 paca = __va(lmb_alloc_base(paca_size, PAGE_SIZE, limit));
130 memset(paca, 0, paca_size);
131
132 printk(KERN_DEBUG "Allocated %u bytes for %d pacas at %p\n",
133 paca_size, nr_cpus, paca);
134
135 /* Can't use for_each_*_cpu, as they aren't functional yet */
136 for (cpu = 0; cpu < nr_cpus; cpu++)
137 initialise_paca(&paca[cpu], cpu);
138}
139
140void __init free_unused_pacas(void)
141{
142 int new_size;
143
144 new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus());
145
146 if (new_size >= paca_size)
147 return;
148
149 lmb_free(__pa(paca) + new_size, paca_size - new_size);
150
151 printk(KERN_DEBUG "Freed %u bytes for unused pacas\n",
152 paca_size - new_size);
104 153
105 } 154 paca_size = new_size;
106} 155}
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 2597f9545d8a..f3c42ce516e7 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -63,21 +63,6 @@ struct dma_map_ops *get_pci_dma_ops(void)
63} 63}
64EXPORT_SYMBOL(get_pci_dma_ops); 64EXPORT_SYMBOL(get_pci_dma_ops);
65 65
66int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
67{
68 return dma_set_mask(&dev->dev, mask);
69}
70
71int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
72{
73 int rc;
74
75 rc = dma_set_mask(&dev->dev, mask);
76 dev->dev.coherent_dma_mask = dev->dma_mask;
77
78 return rc;
79}
80
81struct pci_controller *pcibios_alloc_controller(struct device_node *dev) 66struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
82{ 67{
83 struct pci_controller *phb; 68 struct pci_controller *phb;
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index b6cf8f1f4d35..5120bd44f69a 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -1164,10 +1164,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
1164 * Finally record data if requested. 1164 * Finally record data if requested.
1165 */ 1165 */
1166 if (record) { 1166 if (record) {
1167 struct perf_sample_data data = { 1167 struct perf_sample_data data;
1168 .addr = ~0ULL, 1168
1169 .period = event->hw.last_period, 1169 perf_sample_data_init(&data, ~0ULL);
1170 }; 1170 data.period = event->hw.last_period;
1171 1171
1172 if (event->attr.sample_type & PERF_SAMPLE_ADDR) 1172 if (event->attr.sample_type & PERF_SAMPLE_ADDR)
1173 perf_get_data_addr(regs, &data.addr); 1173 perf_get_data_addr(regs, &data.addr);
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
new file mode 100644
index 000000000000..369872f6cf78
--- /dev/null
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -0,0 +1,654 @@
1/*
2 * Performance event support - Freescale Embedded Performance Monitor
3 *
4 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
5 * Copyright 2010 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/perf_event.h>
15#include <linux/percpu.h>
16#include <linux/hardirq.h>
17#include <asm/reg_fsl_emb.h>
18#include <asm/pmc.h>
19#include <asm/machdep.h>
20#include <asm/firmware.h>
21#include <asm/ptrace.h>
22
23struct cpu_hw_events {
24 int n_events;
25 int disabled;
26 u8 pmcs_enabled;
27 struct perf_event *event[MAX_HWEVENTS];
28};
29static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
30
31static struct fsl_emb_pmu *ppmu;
32
33/* Number of perf_events counting hardware events */
34static atomic_t num_events;
35/* Used to avoid races in calling reserve/release_pmc_hardware */
36static DEFINE_MUTEX(pmc_reserve_mutex);
37
38/*
39 * If interrupts were soft-disabled when a PMU interrupt occurs, treat
40 * it as an NMI.
41 */
42static inline int perf_intr_is_nmi(struct pt_regs *regs)
43{
44#ifdef __powerpc64__
45 return !regs->softe;
46#else
47 return 0;
48#endif
49}
50
51static void perf_event_interrupt(struct pt_regs *regs);
52
53/*
54 * Read one performance monitor counter (PMC).
55 */
56static unsigned long read_pmc(int idx)
57{
58 unsigned long val;
59
60 switch (idx) {
61 case 0:
62 val = mfpmr(PMRN_PMC0);
63 break;
64 case 1:
65 val = mfpmr(PMRN_PMC1);
66 break;
67 case 2:
68 val = mfpmr(PMRN_PMC2);
69 break;
70 case 3:
71 val = mfpmr(PMRN_PMC3);
72 break;
73 default:
74 printk(KERN_ERR "oops trying to read PMC%d\n", idx);
75 val = 0;
76 }
77 return val;
78}
79
80/*
81 * Write one PMC.
82 */
83static void write_pmc(int idx, unsigned long val)
84{
85 switch (idx) {
86 case 0:
87 mtpmr(PMRN_PMC0, val);
88 break;
89 case 1:
90 mtpmr(PMRN_PMC1, val);
91 break;
92 case 2:
93 mtpmr(PMRN_PMC2, val);
94 break;
95 case 3:
96 mtpmr(PMRN_PMC3, val);
97 break;
98 default:
99 printk(KERN_ERR "oops trying to write PMC%d\n", idx);
100 }
101
102 isync();
103}
104
105/*
106 * Write one local control A register
107 */
108static void write_pmlca(int idx, unsigned long val)
109{
110 switch (idx) {
111 case 0:
112 mtpmr(PMRN_PMLCA0, val);
113 break;
114 case 1:
115 mtpmr(PMRN_PMLCA1, val);
116 break;
117 case 2:
118 mtpmr(PMRN_PMLCA2, val);
119 break;
120 case 3:
121 mtpmr(PMRN_PMLCA3, val);
122 break;
123 default:
124 printk(KERN_ERR "oops trying to write PMLCA%d\n", idx);
125 }
126
127 isync();
128}
129
130/*
131 * Write one local control B register
132 */
133static void write_pmlcb(int idx, unsigned long val)
134{
135 switch (idx) {
136 case 0:
137 mtpmr(PMRN_PMLCB0, val);
138 break;
139 case 1:
140 mtpmr(PMRN_PMLCB1, val);
141 break;
142 case 2:
143 mtpmr(PMRN_PMLCB2, val);
144 break;
145 case 3:
146 mtpmr(PMRN_PMLCB3, val);
147 break;
148 default:
149 printk(KERN_ERR "oops trying to write PMLCB%d\n", idx);
150 }
151
152 isync();
153}
154
155static void fsl_emb_pmu_read(struct perf_event *event)
156{
157 s64 val, delta, prev;
158
159 /*
160 * Performance monitor interrupts come even when interrupts
161 * are soft-disabled, as long as interrupts are hard-enabled.
162 * Therefore we treat them like NMIs.
163 */
164 do {
165 prev = atomic64_read(&event->hw.prev_count);
166 barrier();
167 val = read_pmc(event->hw.idx);
168 } while (atomic64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
169
170 /* The counters are only 32 bits wide */
171 delta = (val - prev) & 0xfffffffful;
172 atomic64_add(delta, &event->count);
173 atomic64_sub(delta, &event->hw.period_left);
174}
175
176/*
177 * Disable all events to prevent PMU interrupts and to allow
178 * events to be added or removed.
179 */
180void hw_perf_disable(void)
181{
182 struct cpu_hw_events *cpuhw;
183 unsigned long flags;
184
185 local_irq_save(flags);
186 cpuhw = &__get_cpu_var(cpu_hw_events);
187
188 if (!cpuhw->disabled) {
189 cpuhw->disabled = 1;
190
191 /*
192 * Check if we ever enabled the PMU on this cpu.
193 */
194 if (!cpuhw->pmcs_enabled) {
195 ppc_enable_pmcs();
196 cpuhw->pmcs_enabled = 1;
197 }
198
199 if (atomic_read(&num_events)) {
200 /*
201 * Set the 'freeze all counters' bit, and disable
202 * interrupts. The barrier is to make sure the
203 * mtpmr has been executed and the PMU has frozen
204 * the events before we return.
205 */
206
207 mtpmr(PMRN_PMGC0, PMGC0_FAC);
208 isync();
209 }
210 }
211 local_irq_restore(flags);
212}
213
214/*
215 * Re-enable all events if disable == 0.
216 * If we were previously disabled and events were added, then
217 * put the new config on the PMU.
218 */
219void hw_perf_enable(void)
220{
221 struct cpu_hw_events *cpuhw;
222 unsigned long flags;
223
224 local_irq_save(flags);
225 cpuhw = &__get_cpu_var(cpu_hw_events);
226 if (!cpuhw->disabled)
227 goto out;
228
229 cpuhw->disabled = 0;
230 ppc_set_pmu_inuse(cpuhw->n_events != 0);
231
232 if (cpuhw->n_events > 0) {
233 mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
234 isync();
235 }
236
237 out:
238 local_irq_restore(flags);
239}
240
241static int collect_events(struct perf_event *group, int max_count,
242 struct perf_event *ctrs[])
243{
244 int n = 0;
245 struct perf_event *event;
246
247 if (!is_software_event(group)) {
248 if (n >= max_count)
249 return -1;
250 ctrs[n] = group;
251 n++;
252 }
253 list_for_each_entry(event, &group->sibling_list, group_entry) {
254 if (!is_software_event(event) &&
255 event->state != PERF_EVENT_STATE_OFF) {
256 if (n >= max_count)
257 return -1;
258 ctrs[n] = event;
259 n++;
260 }
261 }
262 return n;
263}
264
265/* perf must be disabled, context locked on entry */
266static int fsl_emb_pmu_enable(struct perf_event *event)
267{
268 struct cpu_hw_events *cpuhw;
269 int ret = -EAGAIN;
270 int num_counters = ppmu->n_counter;
271 u64 val;
272 int i;
273
274 cpuhw = &get_cpu_var(cpu_hw_events);
275
276 if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)
277 num_counters = ppmu->n_restricted;
278
279 /*
280 * Allocate counters from top-down, so that restricted-capable
281 * counters are kept free as long as possible.
282 */
283 for (i = num_counters - 1; i >= 0; i--) {
284 if (cpuhw->event[i])
285 continue;
286
287 break;
288 }
289
290 if (i < 0)
291 goto out;
292
293 event->hw.idx = i;
294 cpuhw->event[i] = event;
295 ++cpuhw->n_events;
296
297 val = 0;
298 if (event->hw.sample_period) {
299 s64 left = atomic64_read(&event->hw.period_left);
300 if (left < 0x80000000L)
301 val = 0x80000000L - left;
302 }
303 atomic64_set(&event->hw.prev_count, val);
304 write_pmc(i, val);
305 perf_event_update_userpage(event);
306
307 write_pmlcb(i, event->hw.config >> 32);
308 write_pmlca(i, event->hw.config_base);
309
310 ret = 0;
311 out:
312 put_cpu_var(cpu_hw_events);
313 return ret;
314}
315
316/* perf must be disabled, context locked on entry */
317static void fsl_emb_pmu_disable(struct perf_event *event)
318{
319 struct cpu_hw_events *cpuhw;
320 int i = event->hw.idx;
321
322 if (i < 0)
323 goto out;
324
325 fsl_emb_pmu_read(event);
326
327 cpuhw = &get_cpu_var(cpu_hw_events);
328
329 WARN_ON(event != cpuhw->event[event->hw.idx]);
330
331 write_pmlca(i, 0);
332 write_pmlcb(i, 0);
333 write_pmc(i, 0);
334
335 cpuhw->event[i] = NULL;
336 event->hw.idx = -1;
337
338 /*
339 * TODO: if at least one restricted event exists, and we
340 * just freed up a non-restricted-capable counter, and
341 * there is a restricted-capable counter occupied by
342 * a non-restricted event, migrate that event to the
343 * vacated counter.
344 */
345
346 cpuhw->n_events--;
347
348 out:
349 put_cpu_var(cpu_hw_events);
350}
351
352/*
353 * Re-enable interrupts on a event after they were throttled
354 * because they were coming too fast.
355 *
356 * Context is locked on entry, but perf is not disabled.
357 */
358static void fsl_emb_pmu_unthrottle(struct perf_event *event)
359{
360 s64 val, left;
361 unsigned long flags;
362
363 if (event->hw.idx < 0 || !event->hw.sample_period)
364 return;
365 local_irq_save(flags);
366 perf_disable();
367 fsl_emb_pmu_read(event);
368 left = event->hw.sample_period;
369 event->hw.last_period = left;
370 val = 0;
371 if (left < 0x80000000L)
372 val = 0x80000000L - left;
373 write_pmc(event->hw.idx, val);
374 atomic64_set(&event->hw.prev_count, val);
375 atomic64_set(&event->hw.period_left, left);
376 perf_event_update_userpage(event);
377 perf_enable();
378 local_irq_restore(flags);
379}
380
381static struct pmu fsl_emb_pmu = {
382 .enable = fsl_emb_pmu_enable,
383 .disable = fsl_emb_pmu_disable,
384 .read = fsl_emb_pmu_read,
385 .unthrottle = fsl_emb_pmu_unthrottle,
386};
387
388/*
389 * Release the PMU if this is the last perf_event.
390 */
391static void hw_perf_event_destroy(struct perf_event *event)
392{
393 if (!atomic_add_unless(&num_events, -1, 1)) {
394 mutex_lock(&pmc_reserve_mutex);
395 if (atomic_dec_return(&num_events) == 0)
396 release_pmc_hardware();
397 mutex_unlock(&pmc_reserve_mutex);
398 }
399}
400
401/*
402 * Translate a generic cache event_id config to a raw event_id code.
403 */
404static int hw_perf_cache_event(u64 config, u64 *eventp)
405{
406 unsigned long type, op, result;
407 int ev;
408
409 if (!ppmu->cache_events)
410 return -EINVAL;
411
412 /* unpack config */
413 type = config & 0xff;
414 op = (config >> 8) & 0xff;
415 result = (config >> 16) & 0xff;
416
417 if (type >= PERF_COUNT_HW_CACHE_MAX ||
418 op >= PERF_COUNT_HW_CACHE_OP_MAX ||
419 result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
420 return -EINVAL;
421
422 ev = (*ppmu->cache_events)[type][op][result];
423 if (ev == 0)
424 return -EOPNOTSUPP;
425 if (ev == -1)
426 return -EINVAL;
427 *eventp = ev;
428 return 0;
429}
430
431const struct pmu *hw_perf_event_init(struct perf_event *event)
432{
433 u64 ev;
434 struct perf_event *events[MAX_HWEVENTS];
435 int n;
436 int err;
437 int num_restricted;
438 int i;
439
440 switch (event->attr.type) {
441 case PERF_TYPE_HARDWARE:
442 ev = event->attr.config;
443 if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
444 return ERR_PTR(-EOPNOTSUPP);
445 ev = ppmu->generic_events[ev];
446 break;
447
448 case PERF_TYPE_HW_CACHE:
449 err = hw_perf_cache_event(event->attr.config, &ev);
450 if (err)
451 return ERR_PTR(err);
452 break;
453
454 case PERF_TYPE_RAW:
455 ev = event->attr.config;
456 break;
457
458 default:
459 return ERR_PTR(-EINVAL);
460 }
461
462 event->hw.config = ppmu->xlate_event(ev);
463 if (!(event->hw.config & FSL_EMB_EVENT_VALID))
464 return ERR_PTR(-EINVAL);
465
466 /*
467 * If this is in a group, check if it can go on with all the
468 * other hardware events in the group. We assume the event
469 * hasn't been linked into its leader's sibling list at this point.
470 */
471 n = 0;
472 if (event->group_leader != event) {
473 n = collect_events(event->group_leader,
474 ppmu->n_counter - 1, events);
475 if (n < 0)
476 return ERR_PTR(-EINVAL);
477 }
478
479 if (event->hw.config & FSL_EMB_EVENT_RESTRICTED) {
480 num_restricted = 0;
481 for (i = 0; i < n; i++) {
482 if (events[i]->hw.config & FSL_EMB_EVENT_RESTRICTED)
483 num_restricted++;
484 }
485
486 if (num_restricted >= ppmu->n_restricted)
487 return ERR_PTR(-EINVAL);
488 }
489
490 event->hw.idx = -1;
491
492 event->hw.config_base = PMLCA_CE | PMLCA_FCM1 |
493 (u32)((ev << 16) & PMLCA_EVENT_MASK);
494
495 if (event->attr.exclude_user)
496 event->hw.config_base |= PMLCA_FCU;
497 if (event->attr.exclude_kernel)
498 event->hw.config_base |= PMLCA_FCS;
499 if (event->attr.exclude_idle)
500 return ERR_PTR(-ENOTSUPP);
501
502 event->hw.last_period = event->hw.sample_period;
503 atomic64_set(&event->hw.period_left, event->hw.last_period);
504
505 /*
506 * See if we need to reserve the PMU.
507 * If no events are currently in use, then we have to take a
508 * mutex to ensure that we don't race with another task doing
509 * reserve_pmc_hardware or release_pmc_hardware.
510 */
511 err = 0;
512 if (!atomic_inc_not_zero(&num_events)) {
513 mutex_lock(&pmc_reserve_mutex);
514 if (atomic_read(&num_events) == 0 &&
515 reserve_pmc_hardware(perf_event_interrupt))
516 err = -EBUSY;
517 else
518 atomic_inc(&num_events);
519 mutex_unlock(&pmc_reserve_mutex);
520
521 mtpmr(PMRN_PMGC0, PMGC0_FAC);
522 isync();
523 }
524 event->destroy = hw_perf_event_destroy;
525
526 if (err)
527 return ERR_PTR(err);
528 return &fsl_emb_pmu;
529}
530
531/*
532 * A counter has overflowed; update its count and record
533 * things if requested. Note that interrupts are hard-disabled
534 * here so there is no possibility of being interrupted.
535 */
536static void record_and_restart(struct perf_event *event, unsigned long val,
537 struct pt_regs *regs, int nmi)
538{
539 u64 period = event->hw.sample_period;
540 s64 prev, delta, left;
541 int record = 0;
542
543 /* we don't have to worry about interrupts here */
544 prev = atomic64_read(&event->hw.prev_count);
545 delta = (val - prev) & 0xfffffffful;
546 atomic64_add(delta, &event->count);
547
548 /*
549 * See if the total period for this event has expired,
550 * and update for the next period.
551 */
552 val = 0;
553 left = atomic64_read(&event->hw.period_left) - delta;
554 if (period) {
555 if (left <= 0) {
556 left += period;
557 if (left <= 0)
558 left = period;
559 record = 1;
560 }
561 if (left < 0x80000000LL)
562 val = 0x80000000LL - left;
563 }
564
565 /*
566 * Finally record data if requested.
567 */
568 if (record) {
569 struct perf_sample_data data = {
570 .period = event->hw.last_period,
571 };
572
573 if (perf_event_overflow(event, nmi, &data, regs)) {
574 /*
575 * Interrupts are coming too fast - throttle them
576 * by setting the event to 0, so it will be
577 * at least 2^30 cycles until the next interrupt
578 * (assuming each event counts at most 2 counts
579 * per cycle).
580 */
581 val = 0;
582 left = ~0ULL >> 1;
583 }
584 }
585
586 write_pmc(event->hw.idx, val);
587 atomic64_set(&event->hw.prev_count, val);
588 atomic64_set(&event->hw.period_left, left);
589 perf_event_update_userpage(event);
590}
591
592static void perf_event_interrupt(struct pt_regs *regs)
593{
594 int i;
595 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
596 struct perf_event *event;
597 unsigned long val;
598 int found = 0;
599 int nmi;
600
601 nmi = perf_intr_is_nmi(regs);
602 if (nmi)
603 nmi_enter();
604 else
605 irq_enter();
606
607 for (i = 0; i < ppmu->n_counter; ++i) {
608 event = cpuhw->event[i];
609
610 val = read_pmc(i);
611 if ((int)val < 0) {
612 if (event) {
613 /* event has overflowed */
614 found = 1;
615 record_and_restart(event, val, regs, nmi);
616 } else {
617 /*
618 * Disabled counter is negative,
619 * reset it just in case.
620 */
621 write_pmc(i, 0);
622 }
623 }
624 }
625
626 /* PMM will keep counters frozen until we return from the interrupt. */
627 mtmsr(mfmsr() | MSR_PMM);
628 mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
629 isync();
630
631 if (nmi)
632 nmi_exit();
633 else
634 irq_exit();
635}
636
637void hw_perf_event_setup(int cpu)
638{
639 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
640
641 memset(cpuhw, 0, sizeof(*cpuhw));
642}
643
644int register_fsl_emb_pmu(struct fsl_emb_pmu *pmu)
645{
646 if (ppmu)
647 return -EBUSY; /* something's already registered */
648
649 ppmu = pmu;
650 pr_info("%s performance monitor hardware support registered\n",
651 pmu->name);
652
653 return 0;
654}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 43238b2054b6..05131d634e73 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -43,6 +43,7 @@
43#include <asm/smp.h> 43#include <asm/smp.h>
44#include <asm/system.h> 44#include <asm/system.h>
45#include <asm/mmu.h> 45#include <asm/mmu.h>
46#include <asm/paca.h>
46#include <asm/pgtable.h> 47#include <asm/pgtable.h>
47#include <asm/pci.h> 48#include <asm/pci.h>
48#include <asm/iommu.h> 49#include <asm/iommu.h>
@@ -721,6 +722,8 @@ void __init early_init_devtree(void *params)
721 * FIXME .. and the initrd too? */ 722 * FIXME .. and the initrd too? */
722 move_device_tree(); 723 move_device_tree();
723 724
725 allocate_pacas();
726
724 DBG("Scanning CPUs ...\n"); 727 DBG("Scanning CPUs ...\n");
725 728
726 /* Retreive CPU related informations from the flat tree 729 /* Retreive CPU related informations from the flat tree
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index d9b05866615f..ed2cfe17d25e 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -940,7 +940,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
940{ 940{
941 switch (slot) { 941 switch (slot) {
942 case 1: 942 case 1:
943 if (child->thread.iac1 == 0) 943 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
944 return -ENOENT; 944 return -ENOENT;
945 945
946 if (dbcr_iac_range(child) & DBCR_IAC12MODE) { 946 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
@@ -952,7 +952,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
952 child->thread.dbcr0 &= ~DBCR0_IAC1; 952 child->thread.dbcr0 &= ~DBCR0_IAC1;
953 break; 953 break;
954 case 2: 954 case 2:
955 if (child->thread.iac2 == 0) 955 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
956 return -ENOENT; 956 return -ENOENT;
957 957
958 if (dbcr_iac_range(child) & DBCR_IAC12MODE) 958 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
@@ -963,7 +963,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
963 break; 963 break;
964#if CONFIG_PPC_ADV_DEBUG_IACS > 2 964#if CONFIG_PPC_ADV_DEBUG_IACS > 2
965 case 3: 965 case 3:
966 if (child->thread.iac3 == 0) 966 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
967 return -ENOENT; 967 return -ENOENT;
968 968
969 if (dbcr_iac_range(child) & DBCR_IAC34MODE) { 969 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
@@ -975,7 +975,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
975 child->thread.dbcr0 &= ~DBCR0_IAC3; 975 child->thread.dbcr0 &= ~DBCR0_IAC3;
976 break; 976 break;
977 case 4: 977 case 4:
978 if (child->thread.iac4 == 0) 978 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
979 return -ENOENT; 979 return -ENOENT;
980 980
981 if (dbcr_iac_range(child) & DBCR_IAC34MODE) 981 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
@@ -1054,7 +1054,7 @@ static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1054static int del_dac(struct task_struct *child, int slot) 1054static int del_dac(struct task_struct *child, int slot)
1055{ 1055{
1056 if (slot == 1) { 1056 if (slot == 1) {
1057 if (child->thread.dac1 == 0) 1057 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1058 return -ENOENT; 1058 return -ENOENT;
1059 1059
1060 child->thread.dac1 = 0; 1060 child->thread.dac1 = 0;
@@ -1070,7 +1070,7 @@ static int del_dac(struct task_struct *child, int slot)
1070 child->thread.dvc1 = 0; 1070 child->thread.dvc1 = 0;
1071#endif 1071#endif
1072 } else if (slot == 2) { 1072 } else if (slot == 2) {
1073 if (child->thread.dac1 == 0) 1073 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1074 return -ENOENT; 1074 return -ENOENT;
1075 1075
1076#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1076#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 03dd6a248198..48f0a008b20b 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -36,6 +36,7 @@
36#include <linux/lmb.h> 36#include <linux/lmb.h>
37#include <linux/of_platform.h> 37#include <linux/of_platform.h>
38#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/paca.h>
39#include <asm/prom.h> 40#include <asm/prom.h>
40#include <asm/processor.h> 41#include <asm/processor.h>
41#include <asm/vdso_datapage.h> 42#include <asm/vdso_datapage.h>
@@ -493,6 +494,8 @@ void __init smp_setup_cpu_maps(void)
493 * here will have to be reworked 494 * here will have to be reworked
494 */ 495 */
495 cpu_init_thread_core_maps(nthreads); 496 cpu_init_thread_core_maps(nthreads);
497
498 free_unused_pacas();
496} 499}
497#endif /* CONFIG_SMP */ 500#endif /* CONFIG_SMP */
498 501
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6568406b2a30..63547394048c 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -144,9 +144,9 @@ early_param("smt-enabled", early_smt_enabled);
144#endif /* CONFIG_SMP */ 144#endif /* CONFIG_SMP */
145 145
146/* Put the paca pointer into r13 and SPRG_PACA */ 146/* Put the paca pointer into r13 and SPRG_PACA */
147void __init setup_paca(int cpu) 147static void __init setup_paca(struct paca_struct *new_paca)
148{ 148{
149 local_paca = &paca[cpu]; 149 local_paca = new_paca;
150 mtspr(SPRN_SPRG_PACA, local_paca); 150 mtspr(SPRN_SPRG_PACA, local_paca);
151#ifdef CONFIG_PPC_BOOK3E 151#ifdef CONFIG_PPC_BOOK3E
152 mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb); 152 mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
@@ -176,14 +176,12 @@ void __init early_setup(unsigned long dt_ptr)
176{ 176{
177 /* -------- printk is _NOT_ safe to use here ! ------- */ 177 /* -------- printk is _NOT_ safe to use here ! ------- */
178 178
179 /* Fill in any unititialised pacas */
180 initialise_pacas();
181
182 /* Identify CPU type */ 179 /* Identify CPU type */
183 identify_cpu(0, mfspr(SPRN_PVR)); 180 identify_cpu(0, mfspr(SPRN_PVR));
184 181
185 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 182 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
186 setup_paca(0); 183 initialise_paca(&boot_paca, 0);
184 setup_paca(&boot_paca);
187 185
188 /* Initialize lockdep early or else spinlocks will blow */ 186 /* Initialize lockdep early or else spinlocks will blow */
189 lockdep_init(); 187 lockdep_init();
@@ -203,7 +201,7 @@ void __init early_setup(unsigned long dt_ptr)
203 early_init_devtree(__va(dt_ptr)); 201 early_init_devtree(__va(dt_ptr));
204 202
205 /* Now we know the logical id of our boot cpu, setup the paca. */ 203 /* Now we know the logical id of our boot cpu, setup the paca. */
206 setup_paca(boot_cpuid); 204 setup_paca(&paca[boot_cpuid]);
207 205
208 /* Fix up paca fields required for the boot cpu */ 206 /* Fix up paca fields required for the boot cpu */
209 get_paca()->cpu_start = 1; 207 get_paca()->cpu_start = 1;
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index 3370e62e43d4..f2496f2faecc 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -42,100 +42,6 @@
42#include <asm/time.h> 42#include <asm/time.h>
43#include <asm/unistd.h> 43#include <asm/unistd.h>
44 44
45/*
46 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
47 *
48 * This is really horribly ugly.
49 */
50int sys_ipc(uint call, int first, unsigned long second, long third,
51 void __user *ptr, long fifth)
52{
53 int version, ret;
54
55 version = call >> 16; /* hack for backward compatibility */
56 call &= 0xffff;
57
58 ret = -ENOSYS;
59 switch (call) {
60 case SEMOP:
61 ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
62 (unsigned)second, NULL);
63 break;
64 case SEMTIMEDOP:
65 ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
66 (unsigned)second,
67 (const struct timespec __user *) fifth);
68 break;
69 case SEMGET:
70 ret = sys_semget (first, (int)second, third);
71 break;
72 case SEMCTL: {
73 union semun fourth;
74
75 ret = -EINVAL;
76 if (!ptr)
77 break;
78 if ((ret = get_user(fourth.__pad, (void __user * __user *)ptr)))
79 break;
80 ret = sys_semctl(first, (int)second, third, fourth);
81 break;
82 }
83 case MSGSND:
84 ret = sys_msgsnd(first, (struct msgbuf __user *)ptr,
85 (size_t)second, third);
86 break;
87 case MSGRCV:
88 switch (version) {
89 case 0: {
90 struct ipc_kludge tmp;
91
92 ret = -EINVAL;
93 if (!ptr)
94 break;
95 if ((ret = copy_from_user(&tmp,
96 (struct ipc_kludge __user *) ptr,
97 sizeof (tmp)) ? -EFAULT : 0))
98 break;
99 ret = sys_msgrcv(first, tmp.msgp, (size_t) second,
100 tmp.msgtyp, third);
101 break;
102 }
103 default:
104 ret = sys_msgrcv (first, (struct msgbuf __user *) ptr,
105 (size_t)second, fifth, third);
106 break;
107 }
108 break;
109 case MSGGET:
110 ret = sys_msgget((key_t)first, (int)second);
111 break;
112 case MSGCTL:
113 ret = sys_msgctl(first, (int)second,
114 (struct msqid_ds __user *)ptr);
115 break;
116 case SHMAT: {
117 ulong raddr;
118 ret = do_shmat(first, (char __user *)ptr, (int)second, &raddr);
119 if (ret)
120 break;
121 ret = put_user(raddr, (ulong __user *) third);
122 break;
123 }
124 case SHMDT:
125 ret = sys_shmdt((char __user *)ptr);
126 break;
127 case SHMGET:
128 ret = sys_shmget(first, (size_t)second, third);
129 break;
130 case SHMCTL:
131 ret = sys_shmctl(first, (int)second,
132 (struct shmid_ds __user *)ptr);
133 break;
134 }
135
136 return ret;
137}
138
139static inline unsigned long do_mmap2(unsigned long addr, size_t len, 45static inline unsigned long do_mmap2(unsigned long addr, size_t len,
140 unsigned long prot, unsigned long flags, 46 unsigned long prot, unsigned long flags,
141 unsigned long fd, unsigned long off, int shift) 47 unsigned long fd, unsigned long off, int shift)
@@ -210,76 +116,6 @@ long ppc64_personality(unsigned long personality)
210} 116}
211#endif 117#endif
212 118
213#ifdef CONFIG_PPC64
214#define OVERRIDE_MACHINE (personality(current->personality) == PER_LINUX32)
215#else
216#define OVERRIDE_MACHINE 0
217#endif
218
219static inline int override_machine(char __user *mach)
220{
221 if (OVERRIDE_MACHINE) {
222 /* change ppc64 to ppc */
223 if (__put_user(0, mach+3) || __put_user(0, mach+4))
224 return -EFAULT;
225 }
226 return 0;
227}
228
229long ppc_newuname(struct new_utsname __user * name)
230{
231 int err = 0;
232
233 down_read(&uts_sem);
234 if (copy_to_user(name, utsname(), sizeof(*name)))
235 err = -EFAULT;
236 up_read(&uts_sem);
237 if (!err)
238 err = override_machine(name->machine);
239 return err;
240}
241
242int sys_uname(struct old_utsname __user *name)
243{
244 int err = 0;
245
246 down_read(&uts_sem);
247 if (copy_to_user(name, utsname(), sizeof(*name)))
248 err = -EFAULT;
249 up_read(&uts_sem);
250 if (!err)
251 err = override_machine(name->machine);
252 return err;
253}
254
255int sys_olduname(struct oldold_utsname __user *name)
256{
257 int error;
258
259 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
260 return -EFAULT;
261
262 down_read(&uts_sem);
263 error = __copy_to_user(&name->sysname, &utsname()->sysname,
264 __OLD_UTS_LEN);
265 error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
266 error |= __copy_to_user(&name->nodename, &utsname()->nodename,
267 __OLD_UTS_LEN);
268 error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
269 error |= __copy_to_user(&name->release, &utsname()->release,
270 __OLD_UTS_LEN);
271 error |= __put_user(0, name->release + __OLD_UTS_LEN);
272 error |= __copy_to_user(&name->version, &utsname()->version,
273 __OLD_UTS_LEN);
274 error |= __put_user(0, name->version + __OLD_UTS_LEN);
275 error |= __copy_to_user(&name->machine, &utsname()->machine,
276 __OLD_UTS_LEN);
277 error |= override_machine(name->machine);
278 up_read(&uts_sem);
279
280 return error? -EFAULT: 0;
281}
282
283long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low, 119long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
284 u32 len_high, u32 len_low) 120 u32 len_high, u32 len_low)
285{ 121{
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 4ec900af332f..b1dbd9ee87cc 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -47,7 +47,7 @@
47#include "mmu_decl.h" 47#include "mmu_decl.h"
48 48
49#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL) 49#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
50/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */ 50/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */
51#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET)) 51#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET))
52#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL" 52#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
53#endif 53#endif
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 6f8ebe1085b3..072b948b2e2d 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -553,7 +553,7 @@ static ssize_t mpc52xx_wdt_write(struct file *file, const char __user *data,
553 return 0; 553 return 0;
554} 554}
555 555
556static struct watchdog_info mpc5200_wdt_info = { 556static const struct watchdog_info mpc5200_wdt_info = {
557 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 557 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
558 .identity = WDT_IDENTITY, 558 .identity = WDT_IDENTITY,
559}; 559};
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 9d962d7c72c1..d4a09f8705b5 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -24,7 +24,7 @@
24 24
25#include "pq2.h" 25#include "pq2.h"
26 26
27static DEFINE_SPINLOCK(pci_pic_lock); 27static DEFINE_RAW_SPINLOCK(pci_pic_lock);
28 28
29struct pq2ads_pci_pic { 29struct pq2ads_pci_pic {
30 struct device_node *node; 30 struct device_node *node;
@@ -45,12 +45,12 @@ static void pq2ads_pci_mask_irq(unsigned int virq)
45 45
46 if (irq != -1) { 46 if (irq != -1) {
47 unsigned long flags; 47 unsigned long flags;
48 spin_lock_irqsave(&pci_pic_lock, flags); 48 raw_spin_lock_irqsave(&pci_pic_lock, flags);
49 49
50 setbits32(&priv->regs->mask, 1 << irq); 50 setbits32(&priv->regs->mask, 1 << irq);
51 mb(); 51 mb();
52 52
53 spin_unlock_irqrestore(&pci_pic_lock, flags); 53 raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
54 } 54 }
55} 55}
56 56
@@ -62,9 +62,9 @@ static void pq2ads_pci_unmask_irq(unsigned int virq)
62 if (irq != -1) { 62 if (irq != -1) {
63 unsigned long flags; 63 unsigned long flags;
64 64
65 spin_lock_irqsave(&pci_pic_lock, flags); 65 raw_spin_lock_irqsave(&pci_pic_lock, flags);
66 clrbits32(&priv->regs->mask, 1 << irq); 66 clrbits32(&priv->regs->mask, 1 << irq);
67 spin_unlock_irqrestore(&pci_pic_lock, flags); 67 raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
68 } 68 }
69} 69}
70 70
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 42e87f08aa01..d48527ffc425 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -50,7 +50,7 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
50 50
51#define socrates_fpga_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) 51#define socrates_fpga_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
52 52
53static DEFINE_SPINLOCK(socrates_fpga_pic_lock); 53static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock);
54 54
55static void __iomem *socrates_fpga_pic_iobase; 55static void __iomem *socrates_fpga_pic_iobase;
56static struct irq_host *socrates_fpga_pic_irq_host; 56static struct irq_host *socrates_fpga_pic_irq_host;
@@ -80,9 +80,9 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
80 if (i == 3) 80 if (i == 3)
81 return NO_IRQ; 81 return NO_IRQ;
82 82
83 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 83 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
84 cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i)); 84 cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i));
85 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 85 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
86 for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) { 86 for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) {
87 if (cause >> (i + 16)) 87 if (cause >> (i + 16))
88 break; 88 break;
@@ -116,12 +116,12 @@ static void socrates_fpga_pic_ack(unsigned int virq)
116 hwirq = socrates_fpga_irq_to_hw(virq); 116 hwirq = socrates_fpga_irq_to_hw(virq);
117 117
118 irq_line = fpga_irqs[hwirq].irq_line; 118 irq_line = fpga_irqs[hwirq].irq_line;
119 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 119 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
120 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) 120 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
121 & SOCRATES_FPGA_IRQ_MASK; 121 & SOCRATES_FPGA_IRQ_MASK;
122 mask |= (1 << (hwirq + 16)); 122 mask |= (1 << (hwirq + 16));
123 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); 123 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
124 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 124 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
125} 125}
126 126
127static void socrates_fpga_pic_mask(unsigned int virq) 127static void socrates_fpga_pic_mask(unsigned int virq)
@@ -134,12 +134,12 @@ static void socrates_fpga_pic_mask(unsigned int virq)
134 hwirq = socrates_fpga_irq_to_hw(virq); 134 hwirq = socrates_fpga_irq_to_hw(virq);
135 135
136 irq_line = fpga_irqs[hwirq].irq_line; 136 irq_line = fpga_irqs[hwirq].irq_line;
137 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 137 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
138 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) 138 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
139 & SOCRATES_FPGA_IRQ_MASK; 139 & SOCRATES_FPGA_IRQ_MASK;
140 mask &= ~(1 << hwirq); 140 mask &= ~(1 << hwirq);
141 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); 141 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
142 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 142 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
143} 143}
144 144
145static void socrates_fpga_pic_mask_ack(unsigned int virq) 145static void socrates_fpga_pic_mask_ack(unsigned int virq)
@@ -152,13 +152,13 @@ static void socrates_fpga_pic_mask_ack(unsigned int virq)
152 hwirq = socrates_fpga_irq_to_hw(virq); 152 hwirq = socrates_fpga_irq_to_hw(virq);
153 153
154 irq_line = fpga_irqs[hwirq].irq_line; 154 irq_line = fpga_irqs[hwirq].irq_line;
155 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 155 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
156 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) 156 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
157 & SOCRATES_FPGA_IRQ_MASK; 157 & SOCRATES_FPGA_IRQ_MASK;
158 mask &= ~(1 << hwirq); 158 mask &= ~(1 << hwirq);
159 mask |= (1 << (hwirq + 16)); 159 mask |= (1 << (hwirq + 16));
160 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); 160 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
161 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 161 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
162} 162}
163 163
164static void socrates_fpga_pic_unmask(unsigned int virq) 164static void socrates_fpga_pic_unmask(unsigned int virq)
@@ -171,12 +171,12 @@ static void socrates_fpga_pic_unmask(unsigned int virq)
171 hwirq = socrates_fpga_irq_to_hw(virq); 171 hwirq = socrates_fpga_irq_to_hw(virq);
172 172
173 irq_line = fpga_irqs[hwirq].irq_line; 173 irq_line = fpga_irqs[hwirq].irq_line;
174 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 174 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
175 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) 175 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
176 & SOCRATES_FPGA_IRQ_MASK; 176 & SOCRATES_FPGA_IRQ_MASK;
177 mask |= (1 << hwirq); 177 mask |= (1 << hwirq);
178 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); 178 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
179 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 179 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
180} 180}
181 181
182static void socrates_fpga_pic_eoi(unsigned int virq) 182static void socrates_fpga_pic_eoi(unsigned int virq)
@@ -189,12 +189,12 @@ static void socrates_fpga_pic_eoi(unsigned int virq)
189 hwirq = socrates_fpga_irq_to_hw(virq); 189 hwirq = socrates_fpga_irq_to_hw(virq);
190 190
191 irq_line = fpga_irqs[hwirq].irq_line; 191 irq_line = fpga_irqs[hwirq].irq_line;
192 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 192 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
193 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) 193 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
194 & SOCRATES_FPGA_IRQ_MASK; 194 & SOCRATES_FPGA_IRQ_MASK;
195 mask |= (1 << (hwirq + 16)); 195 mask |= (1 << (hwirq + 16));
196 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); 196 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
197 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 197 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
198} 198}
199 199
200static int socrates_fpga_pic_set_type(unsigned int virq, 200static int socrates_fpga_pic_set_type(unsigned int virq,
@@ -220,14 +220,14 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
220 default: 220 default:
221 return -EINVAL; 221 return -EINVAL;
222 } 222 }
223 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 223 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
224 mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG); 224 mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG);
225 if (polarity) 225 if (polarity)
226 mask |= (1 << hwirq); 226 mask |= (1 << hwirq);
227 else 227 else
228 mask &= ~(1 << hwirq); 228 mask &= ~(1 << hwirq);
229 socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask); 229 socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask);
230 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 230 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
231 return 0; 231 return 0;
232} 232}
233 233
@@ -314,14 +314,14 @@ void socrates_fpga_pic_init(struct device_node *pic)
314 314
315 socrates_fpga_pic_iobase = of_iomap(pic, 0); 315 socrates_fpga_pic_iobase = of_iomap(pic, 0);
316 316
317 spin_lock_irqsave(&socrates_fpga_pic_lock, flags); 317 raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
318 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0), 318 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0),
319 SOCRATES_FPGA_IRQ_MASK << 16); 319 SOCRATES_FPGA_IRQ_MASK << 16);
320 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1), 320 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1),
321 SOCRATES_FPGA_IRQ_MASK << 16); 321 SOCRATES_FPGA_IRQ_MASK << 16);
322 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2), 322 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2),
323 SOCRATES_FPGA_IRQ_MASK << 16); 323 SOCRATES_FPGA_IRQ_MASK << 16);
324 spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); 324 raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
325 325
326 pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n"); 326 pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n");
327} 327}
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 2bbfd530d6d8..fbe9f3621424 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -33,32 +33,32 @@ config MPC8610_HPCD
33 This option enables support for the MPC8610 HPCD board. 33 This option enables support for the MPC8610 HPCD board.
34 34
35config GEF_PPC9A 35config GEF_PPC9A
36 bool "GE Fanuc PPC9A" 36 bool "GE PPC9A"
37 select DEFAULT_UIMAGE 37 select DEFAULT_UIMAGE
38 select MMIO_NVRAM 38 select MMIO_NVRAM
39 select GENERIC_GPIO 39 select GENERIC_GPIO
40 select ARCH_REQUIRE_GPIOLIB 40 select ARCH_REQUIRE_GPIOLIB
41 help 41 help
42 This option enables support for GE Fanuc's PPC9A. 42 This option enables support for the GE PPC9A.
43 43
44config GEF_SBC310 44config GEF_SBC310
45 bool "GE Fanuc SBC310" 45 bool "GE SBC310"
46 select DEFAULT_UIMAGE 46 select DEFAULT_UIMAGE
47 select MMIO_NVRAM 47 select MMIO_NVRAM
48 select GENERIC_GPIO 48 select GENERIC_GPIO
49 select ARCH_REQUIRE_GPIOLIB 49 select ARCH_REQUIRE_GPIOLIB
50 help 50 help
51 This option enables support for GE Fanuc's SBC310. 51 This option enables support for the GE SBC310.
52 52
53config GEF_SBC610 53config GEF_SBC610
54 bool "GE Fanuc SBC610" 54 bool "GE SBC610"
55 select DEFAULT_UIMAGE 55 select DEFAULT_UIMAGE
56 select MMIO_NVRAM 56 select MMIO_NVRAM
57 select GENERIC_GPIO 57 select GENERIC_GPIO
58 select ARCH_REQUIRE_GPIOLIB 58 select ARCH_REQUIRE_GPIOLIB
59 select HAS_RAPIDIO 59 select HAS_RAPIDIO
60 help 60 help
61 This option enables support for GE Fanuc's SBC610. 61 This option enables support for the GE SBC610.
62 62
63endif 63endif
64 64
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index b2ea8875adba..11f7b2b6f49e 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * Driver for GE Fanuc's FPGA based GPIO pins 2 * Driver for GE FPGA based GPIO
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * 5 *
6 * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc. 6 * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
7 * 7 *
8 * This file is licensed under the terms of the GNU General Public License 8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any 9 * version 2. This program is licensed "as is" without any warranty of any
@@ -164,6 +164,6 @@ static int __init gef_gpio_init(void)
164}; 164};
165arch_initcall(gef_gpio_init); 165arch_initcall(gef_gpio_init);
166 166
167MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver"); 167MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
168MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com"); 168MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
169MODULE_LICENSE("GPL"); 169MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 0110a8736d33..6df9e2561c06 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * Interrupt handling for GE Fanuc's FPGA based PIC 2 * Interrupt handling for GE FPGA based PIC
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * 5 *
6 * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc. 6 * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
7 * 7 *
8 * This file is licensed under the terms of the GNU General Public License 8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any 9 * version 2. This program is licensed "as is" without any warranty of any
@@ -49,7 +49,7 @@
49#define gef_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) 49#define gef_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
50 50
51 51
52static DEFINE_SPINLOCK(gef_pic_lock); 52static DEFINE_RAW_SPINLOCK(gef_pic_lock);
53 53
54static void __iomem *gef_pic_irq_reg_base; 54static void __iomem *gef_pic_irq_reg_base;
55static struct irq_host *gef_pic_irq_host; 55static struct irq_host *gef_pic_irq_host;
@@ -118,11 +118,11 @@ static void gef_pic_mask(unsigned int virq)
118 118
119 hwirq = gef_irq_to_hw(virq); 119 hwirq = gef_irq_to_hw(virq);
120 120
121 spin_lock_irqsave(&gef_pic_lock, flags); 121 raw_spin_lock_irqsave(&gef_pic_lock, flags);
122 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); 122 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
123 mask &= ~(1 << hwirq); 123 mask &= ~(1 << hwirq);
124 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); 124 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
125 spin_unlock_irqrestore(&gef_pic_lock, flags); 125 raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
126} 126}
127 127
128static void gef_pic_mask_ack(unsigned int virq) 128static void gef_pic_mask_ack(unsigned int virq)
@@ -141,11 +141,11 @@ static void gef_pic_unmask(unsigned int virq)
141 141
142 hwirq = gef_irq_to_hw(virq); 142 hwirq = gef_irq_to_hw(virq);
143 143
144 spin_lock_irqsave(&gef_pic_lock, flags); 144 raw_spin_lock_irqsave(&gef_pic_lock, flags);
145 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); 145 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
146 mask |= (1 << hwirq); 146 mask |= (1 << hwirq);
147 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); 147 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
148 spin_unlock_irqrestore(&gef_pic_lock, flags); 148 raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
149} 149}
150 150
151static struct irq_chip gef_pic_chip = { 151static struct irq_chip gef_pic_chip = {
@@ -199,7 +199,7 @@ void __init gef_pic_init(struct device_node *np)
199 /* Map the devices registers into memory */ 199 /* Map the devices registers into memory */
200 gef_pic_irq_reg_base = of_iomap(np, 0); 200 gef_pic_irq_reg_base = of_iomap(np, 0);
201 201
202 spin_lock_irqsave(&gef_pic_lock, flags); 202 raw_spin_lock_irqsave(&gef_pic_lock, flags);
203 203
204 /* Initialise everything as masked. */ 204 /* Initialise everything as masked. */
205 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0); 205 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
@@ -208,7 +208,7 @@ void __init gef_pic_init(struct device_node *np)
208 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0); 208 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);
209 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0); 209 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);
210 210
211 spin_unlock_irqrestore(&gef_pic_lock, flags); 211 raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
212 212
213 /* Map controller */ 213 /* Map controller */
214 gef_pic_cascade_irq = irq_of_parse_and_map(np, 0); 214 gef_pic_cascade_irq = irq_of_parse_and_map(np, 0);
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index a792e5d85813..60ce07e39100 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * GE Fanuc PPC9A board support 2 * GE PPC9A board support
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * 5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_ppc9a_setup_arch(void)
82 } 82 }
83#endif 83#endif
84 84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n"); 85 printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
86 86
87#ifdef CONFIG_SMP 87#ifdef CONFIG_SMP
88 mpc86xx_smp_init(); 88 mpc86xx_smp_init();
@@ -151,7 +151,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
151{ 151{
152 uint svid = mfspr(SPRN_SVR); 152 uint svid = mfspr(SPRN_SVR);
153 153
154 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); 154 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
155 155
156 seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(), 156 seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
157 ('A' + gef_ppc9a_get_board_rev())); 157 ('A' + gef_ppc9a_get_board_rev()));
@@ -235,7 +235,7 @@ static int __init declare_of_platform_devices(void)
235machine_device_initcall(gef_ppc9a, declare_of_platform_devices); 235machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
236 236
237define_machine(gef_ppc9a) { 237define_machine(gef_ppc9a) {
238 .name = "GE Fanuc PPC9A", 238 .name = "GE PPC9A",
239 .probe = gef_ppc9a_probe, 239 .probe = gef_ppc9a_probe,
240 .setup_arch = gef_ppc9a_setup_arch, 240 .setup_arch = gef_ppc9a_setup_arch,
241 .init_IRQ = gef_ppc9a_init_irq, 241 .init_IRQ = gef_ppc9a_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 6a1a613836c2..3ecee25bf3ed 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * GE Fanuc SBC310 board support 2 * GE SBC310 board support
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * 5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc310_setup_arch(void)
82 } 82 }
83#endif 83#endif
84 84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n"); 85 printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
86 86
87#ifdef CONFIG_SMP 87#ifdef CONFIG_SMP
88 mpc86xx_smp_init(); 88 mpc86xx_smp_init();
@@ -142,7 +142,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m)
142{ 142{
143 uint svid = mfspr(SPRN_SVR); 143 uint svid = mfspr(SPRN_SVR);
144 144
145 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); 145 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
146 146
147 seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id()); 147 seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
148 seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(), 148 seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
@@ -223,7 +223,7 @@ static int __init declare_of_platform_devices(void)
223machine_device_initcall(gef_sbc310, declare_of_platform_devices); 223machine_device_initcall(gef_sbc310, declare_of_platform_devices);
224 224
225define_machine(gef_sbc310) { 225define_machine(gef_sbc310) {
226 .name = "GE Fanuc SBC310", 226 .name = "GE SBC310",
227 .probe = gef_sbc310_probe, 227 .probe = gef_sbc310_probe,
228 .setup_arch = gef_sbc310_setup_arch, 228 .setup_arch = gef_sbc310_setup_arch,
229 .init_IRQ = gef_sbc310_init_irq, 229 .init_IRQ = gef_sbc310_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index e10688a0fc4e..5090d608d9ee 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * GE Fanuc SBC610 board support 2 * GE SBC610 board support
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * 5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc610_setup_arch(void)
82 } 82 }
83#endif 83#endif
84 84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n"); 85 printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
86 86
87#ifdef CONFIG_SMP 87#ifdef CONFIG_SMP
88 mpc86xx_smp_init(); 88 mpc86xx_smp_init();
@@ -133,7 +133,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
133{ 133{
134 uint svid = mfspr(SPRN_SVR); 134 uint svid = mfspr(SPRN_SVR);
135 135
136 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); 136 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
137 137
138 seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(), 138 seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
139 ('A' + gef_sbc610_get_board_rev() - 1)); 139 ('A' + gef_sbc610_get_board_rev() - 1));
@@ -212,7 +212,7 @@ static int __init declare_of_platform_devices(void)
212machine_device_initcall(gef_sbc610, declare_of_platform_devices); 212machine_device_initcall(gef_sbc610, declare_of_platform_devices);
213 213
214define_machine(gef_sbc610) { 214define_machine(gef_sbc610) {
215 .name = "GE Fanuc SBC610", 215 .name = "GE SBC610",
216 .probe = gef_sbc610_probe, 216 .probe = gef_sbc610_probe,
217 .setup_arch = gef_sbc610_setup_arch, 217 .setup_arch = gef_sbc610_setup_arch,
218 .init_IRQ = gef_sbc610_init_irq, 218 .init_IRQ = gef_sbc610_init_irq,
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index fa0f690d3867..a8aae0b54579 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -144,6 +144,16 @@ config FSL_EMB_PERFMON
144 and some e300 cores (c3 and c4). Select this only if your 144 and some e300 cores (c3 and c4). Select this only if your
145 core supports the Embedded Performance Monitor APU 145 core supports the Embedded Performance Monitor APU
146 146
147config FSL_EMB_PERF_EVENT
148 bool
149 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
150 default y
151
152config FSL_EMB_PERF_EVENT_E500
153 bool
154 depends on FSL_EMB_PERF_EVENT && E500
155 default y
156
147config 4xx 157config 4xx
148 bool 158 bool
149 depends on 40x || 44x 159 depends on 40x || 44x
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 5369653dcf6a..fba5bf915073 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -43,17 +43,14 @@ system_reset_iSeries:
43 LOAD_REG_ADDR(r23, alpaca) 43 LOAD_REG_ADDR(r23, alpaca)
44 li r0,ALPACA_SIZE 44 li r0,ALPACA_SIZE
45 sub r23,r13,r23 45 sub r23,r13,r23
46 divdu r23,r23,r0 /* r23 has cpu number */ 46 divdu r24,r23,r0 /* r24 has cpu number */
47 LOAD_REG_ADDR(r13, paca)
48 mulli r0,r23,PACA_SIZE
49 add r13,r13,r0
50 mtspr SPRN_SPRG_PACA,r13 /* Save it away for the future */
51 mfmsr r24
52 ori r24,r24,MSR_RI
53 mtmsrd r24 /* RI on */
54 mr r24,r23
55 cmpwi 0,r24,0 /* Are we processor 0? */ 47 cmpwi 0,r24,0 /* Are we processor 0? */
56 bne 1f 48 bne 1f
49 LOAD_REG_ADDR(r13, boot_paca)
50 mtspr SPRN_SPRG_PACA,r13 /* Save it away for the future */
51 mfmsr r23
52 ori r23,r23,MSR_RI
53 mtmsrd r23 /* RI on */
57 b .__start_initialization_iSeries /* Start up the first processor */ 54 b .__start_initialization_iSeries /* Start up the first processor */
581: mfspr r4,SPRN_CTRLF 551: mfspr r4,SPRN_CTRLF
59 li r5,CTRL_RUNLATCH /* Turn off the run light */ 56 li r5,CTRL_RUNLATCH /* Turn off the run light */
@@ -86,6 +83,16 @@ system_reset_iSeries:
86#endif 83#endif
87 84
882: 852:
86 /* Load our paca now that it's been allocated */
87 LOAD_REG_ADDR(r13, paca)
88 ld r13,0(r13)
89 mulli r0,r24,PACA_SIZE
90 add r13,r13,r0
91 mtspr SPRN_SPRG_PACA,r13 /* Save it away for the future */
92 mfmsr r23
93 ori r23,r23,MSR_RI
94 mtmsrd r23 /* RI on */
95
89 HMT_LOW 96 HMT_LOW
90#ifdef CONFIG_SMP 97#ifdef CONFIG_SMP
91 lbz r23,PACAPROCSTART(r13) /* Test if this processor 98 lbz r23,PACAPROCSTART(r13) /* Test if this processor
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index d1b124e44d77..a8e1d5d17a28 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -122,44 +122,32 @@ static void pseries_mach_cpu_die(void)
122 if (!get_lppaca()->shared_proc) 122 if (!get_lppaca()->shared_proc)
123 get_lppaca()->donate_dedicated_cpu = 1; 123 get_lppaca()->donate_dedicated_cpu = 1;
124 124
125 printk(KERN_INFO
126 "cpu %u (hwid %u) ceding for offline with hint %d\n",
127 cpu, hwcpu, cede_latency_hint);
128 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) { 125 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
129 extended_cede_processor(cede_latency_hint); 126 extended_cede_processor(cede_latency_hint);
130 printk(KERN_INFO "cpu %u (hwid %u) returned from cede.\n",
131 cpu, hwcpu);
132 printk(KERN_INFO
133 "Decrementer value = %x Timebase value = %llx\n",
134 get_dec(), get_tb());
135 } 127 }
136 128
137 printk(KERN_INFO "cpu %u (hwid %u) got prodded to go online\n",
138 cpu, hwcpu);
139
140 if (!get_lppaca()->shared_proc) 129 if (!get_lppaca()->shared_proc)
141 get_lppaca()->donate_dedicated_cpu = 0; 130 get_lppaca()->donate_dedicated_cpu = 0;
142 get_lppaca()->idle = 0; 131 get_lppaca()->idle = 0;
143 }
144 132
145 if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) { 133 if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
146 unregister_slb_shadow(hwcpu, __pa(get_slb_shadow())); 134 unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
147 135
148 /* 136 /*
149 * NOTE: Calling start_secondary() here for now to 137 * Call to start_secondary_resume() will not return.
150 * start new context. 138 * Kernel stack will be reset and start_secondary()
151 * However, need to do it cleanly by resetting the 139 * will be called to continue the online operation.
152 * stack pointer. 140 */
153 */ 141 start_secondary_resume();
154 start_secondary(); 142 }
143 }
155 144
156 } else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) { 145 /* Requested state is CPU_STATE_OFFLINE at this point */
146 WARN_ON(get_preferred_offline_state(cpu) != CPU_STATE_OFFLINE);
157 147
158 set_cpu_current_state(cpu, CPU_STATE_OFFLINE); 148 set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
159 unregister_slb_shadow(hard_smp_processor_id(), 149 unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
160 __pa(get_slb_shadow())); 150 rtas_stop_self();
161 rtas_stop_self();
162 }
163 151
164 /* Should never get here... */ 152 /* Should never get here... */
165 BUG(); 153 BUG();
diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h
index 22574e0d9d91..75a6f480d931 100644
--- a/arch/powerpc/platforms/pseries/offline_states.h
+++ b/arch/powerpc/platforms/pseries/offline_states.h
@@ -9,10 +9,31 @@ enum cpu_state_vals {
9 CPU_MAX_OFFLINE_STATES 9 CPU_MAX_OFFLINE_STATES
10}; 10};
11 11
12#ifdef CONFIG_HOTPLUG_CPU
12extern enum cpu_state_vals get_cpu_current_state(int cpu); 13extern enum cpu_state_vals get_cpu_current_state(int cpu);
13extern void set_cpu_current_state(int cpu, enum cpu_state_vals state); 14extern void set_cpu_current_state(int cpu, enum cpu_state_vals state);
14extern enum cpu_state_vals get_preferred_offline_state(int cpu);
15extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state); 15extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state);
16extern void set_default_offline_state(int cpu); 16extern void set_default_offline_state(int cpu);
17#else
18static inline enum cpu_state_vals get_cpu_current_state(int cpu)
19{
20 return CPU_STATE_ONLINE;
21}
22
23static inline void set_cpu_current_state(int cpu, enum cpu_state_vals state)
24{
25}
26
27static inline void set_preferred_offline_state(int cpu, enum cpu_state_vals state)
28{
29}
30
31static inline void set_default_offline_state(int cpu)
32{
33}
34#endif
35
36extern enum cpu_state_vals get_preferred_offline_state(int cpu);
17extern int start_secondary(void); 37extern int start_secondary(void);
38extern void start_secondary_resume(void);
18#endif 39#endif
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index 0603c91538ae..a05f8d427856 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -259,12 +259,12 @@ static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
259 return plpar_hcall_norets(H_IPI, servernum, mfrr); 259 return plpar_hcall_norets(H_IPI, servernum, mfrr);
260} 260}
261 261
262static inline long plpar_xirr(unsigned long *xirr_ret) 262static inline long plpar_xirr(unsigned long *xirr_ret, unsigned char cppr)
263{ 263{
264 long rc; 264 long rc;
265 unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; 265 unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
266 266
267 rc = plpar_hcall(H_XIRR, retbuf); 267 rc = plpar_hcall(H_XIRR, retbuf, cppr);
268 268
269 *xirr_ret = retbuf[0]; 269 *xirr_ret = retbuf[0];
270 270
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 4ca641042ec3..1bcedd8b4616 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -120,12 +120,12 @@ static inline void direct_qirr_info(int n_cpu, u8 value)
120 120
121/* LPAR low level accessors */ 121/* LPAR low level accessors */
122 122
123static inline unsigned int lpar_xirr_info_get(void) 123static inline unsigned int lpar_xirr_info_get(unsigned char cppr)
124{ 124{
125 unsigned long lpar_rc; 125 unsigned long lpar_rc;
126 unsigned long return_value; 126 unsigned long return_value;
127 127
128 lpar_rc = plpar_xirr(&return_value); 128 lpar_rc = plpar_xirr(&return_value, cppr);
129 if (lpar_rc != H_SUCCESS) 129 if (lpar_rc != H_SUCCESS)
130 panic(" bad return code xirr - rc = %lx\n", lpar_rc); 130 panic(" bad return code xirr - rc = %lx\n", lpar_rc);
131 return (unsigned int)return_value; 131 return (unsigned int)return_value;
@@ -331,7 +331,8 @@ static unsigned int xics_get_irq_direct(void)
331 331
332static unsigned int xics_get_irq_lpar(void) 332static unsigned int xics_get_irq_lpar(void)
333{ 333{
334 unsigned int xirr = lpar_xirr_info_get(); 334 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
335 unsigned int xirr = lpar_xirr_info_get(os_cppr->stack[os_cppr->index]);
335 unsigned int vec = xics_xirr_vector(xirr); 336 unsigned int vec = xics_xirr_vector(xirr);
336 unsigned int irq; 337 unsigned int irq;
337 338
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h
index 30e5828a2781..2c5f70c24485 100644
--- a/arch/powerpc/sysdev/cpm2_pic.h
+++ b/arch/powerpc/sysdev/cpm2_pic.h
@@ -3,6 +3,6 @@
3 3
4extern unsigned int cpm2_get_irq(void); 4extern unsigned int cpm2_get_irq(void);
5 5
6extern void cpm2_pic_init(struct device_node*); 6extern void cpm2_pic_init(struct device_node *);
7 7
8#endif /* _PPC_KERNEL_CPM2_H */ 8#endif /* _PPC_KERNEL_CPM2_H */
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index d927da893ec4..541ba9863647 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -33,7 +33,7 @@
33 33
34#include "qe_ic.h" 34#include "qe_ic.h"
35 35
36static DEFINE_SPINLOCK(qe_ic_lock); 36static DEFINE_RAW_SPINLOCK(qe_ic_lock);
37 37
38static struct qe_ic_info qe_ic_info[] = { 38static struct qe_ic_info qe_ic_info[] = {
39 [1] = { 39 [1] = {
@@ -201,13 +201,13 @@ static void qe_ic_unmask_irq(unsigned int virq)
201 unsigned long flags; 201 unsigned long flags;
202 u32 temp; 202 u32 temp;
203 203
204 spin_lock_irqsave(&qe_ic_lock, flags); 204 raw_spin_lock_irqsave(&qe_ic_lock, flags);
205 205
206 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); 206 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
207 qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg, 207 qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
208 temp | qe_ic_info[src].mask); 208 temp | qe_ic_info[src].mask);
209 209
210 spin_unlock_irqrestore(&qe_ic_lock, flags); 210 raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
211} 211}
212 212
213static void qe_ic_mask_irq(unsigned int virq) 213static void qe_ic_mask_irq(unsigned int virq)
@@ -217,7 +217,7 @@ static void qe_ic_mask_irq(unsigned int virq)
217 unsigned long flags; 217 unsigned long flags;
218 u32 temp; 218 u32 temp;
219 219
220 spin_lock_irqsave(&qe_ic_lock, flags); 220 raw_spin_lock_irqsave(&qe_ic_lock, flags);
221 221
222 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); 222 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
223 qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg, 223 qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
@@ -233,7 +233,7 @@ static void qe_ic_mask_irq(unsigned int virq)
233 */ 233 */
234 mb(); 234 mb();
235 235
236 spin_unlock_irqrestore(&qe_ic_lock, flags); 236 raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
237} 237}
238 238
239static struct irq_chip qe_ic_irq_chip = { 239static struct irq_chip qe_ic_irq_chip = {
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index 7903ec47e6b9..f42dbabc0d30 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -79,7 +79,7 @@ int s390_sha_final(struct shash_desc *desc, u8 *out)
79 memset(ctx->buf + index, 0x00, end - index - 8); 79 memset(ctx->buf + index, 0x00, end - index - 8);
80 80
81 /* 81 /*
82 * Append message length. Well, SHA-512 wants a 128 bit lenght value, 82 * Append message length. Well, SHA-512 wants a 128 bit length value,
83 * nevertheless we use u64, should be enough for now... 83 * nevertheless we use u64, should be enough for now...
84 */ 84 */
85 bits = ctx->count * 8; 85 bits = ctx->count * 8;
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index e85679af54dd..e34347d567a6 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -20,7 +20,7 @@
20/** 20/**
21 * struct ccw1 - channel command word 21 * struct ccw1 - channel command word
22 * @cmd_code: command code 22 * @cmd_code: command code
23 * @flags: flags, like IDA adressing, etc. 23 * @flags: flags, like IDA addressing, etc.
24 * @count: byte count 24 * @count: byte count
25 * @cda: data address 25 * @cda: data address
26 * 26 *
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index 01a08020bc0e..104f2007f097 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -35,7 +35,8 @@
35 35
36extern long psw32_user_bits; 36extern long psw32_user_bits;
37 37
38#define COMPAT_USER_HZ 100 38#define COMPAT_USER_HZ 100
39#define COMPAT_UTS_MACHINE "s390\0\0\0\0"
39 40
40typedef u32 compat_size_t; 41typedef u32 compat_size_t;
41typedef s32 compat_ssize_t; 42typedef s32 compat_ssize_t;
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index dd2d913afcae..fef9b33cdd59 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -489,9 +489,6 @@ struct user_regs_struct
489 * These are defined as per linux/ptrace.h, which see. 489 * These are defined as per linux/ptrace.h, which see.
490 */ 490 */
491#define arch_has_single_step() (1) 491#define arch_has_single_step() (1)
492struct task_struct;
493extern void user_enable_single_step(struct task_struct *);
494extern void user_disable_single_step(struct task_struct *);
495extern void show_regs(struct pt_regs * regs); 492extern void show_regs(struct pt_regs * regs);
496 493
497#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) 494#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index c666bfe5e984..9b04b1102bbc 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -321,11 +321,6 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
321#define QDIO_ERROR_ACTIVATE_CHECK_CONDITION 0x40 321#define QDIO_ERROR_ACTIVATE_CHECK_CONDITION 0x40
322#define QDIO_ERROR_SLSB_STATE 0x80 322#define QDIO_ERROR_SLSB_STATE 0x80
323 323
324/* for qdio_initialize */
325#define QDIO_INBOUND_0COPY_SBALS 0x01
326#define QDIO_OUTBOUND_0COPY_SBALS 0x02
327#define QDIO_USE_OUTBOUND_PCIS 0x04
328
329/* for qdio_cleanup */ 324/* for qdio_cleanup */
330#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01 325#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
331#define QDIO_FLAG_CLEANUP_USING_HALT 0x02 326#define QDIO_FLAG_CLEANUP_USING_HALT 0x02
@@ -344,7 +339,6 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
344 * @input_handler: handler to be called for input queues 339 * @input_handler: handler to be called for input queues
345 * @output_handler: handler to be called for output queues 340 * @output_handler: handler to be called for output queues
346 * @int_parm: interruption parameter 341 * @int_parm: interruption parameter
347 * @flags: initialization flags
348 * @input_sbal_addr_array: address of no_input_qs * 128 pointers 342 * @input_sbal_addr_array: address of no_input_qs * 128 pointers
349 * @output_sbal_addr_array: address of no_output_qs * 128 pointers 343 * @output_sbal_addr_array: address of no_output_qs * 128 pointers
350 */ 344 */
@@ -361,7 +355,6 @@ struct qdio_initialize {
361 qdio_handler_t *input_handler; 355 qdio_handler_t *input_handler;
362 qdio_handler_t *output_handler; 356 qdio_handler_t *output_handler;
363 unsigned long int_parm; 357 unsigned long int_parm;
364 unsigned long flags;
365 void **input_sbal_addr_array; 358 void **input_sbal_addr_array;
366 void **output_sbal_addr_array; 359 void **output_sbal_addr_array;
367}; 360};
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 6e9f049fa823..5f0075150a65 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -392,6 +392,7 @@
392#define __ARCH_WANT_SYS_LLSEEK 392#define __ARCH_WANT_SYS_LLSEEK
393#define __ARCH_WANT_SYS_NICE 393#define __ARCH_WANT_SYS_NICE
394#define __ARCH_WANT_SYS_OLD_GETRLIMIT 394#define __ARCH_WANT_SYS_OLD_GETRLIMIT
395#define __ARCH_WANT_SYS_OLD_MMAP
395#define __ARCH_WANT_SYS_OLDUMOUNT 396#define __ARCH_WANT_SYS_OLDUMOUNT
396#define __ARCH_WANT_SYS_SIGPENDING 397#define __ARCH_WANT_SYS_SIGPENDING
397#define __ARCH_WANT_SYS_SIGPROCMASK 398#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 30de2d0e52bb..672ce52341b4 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -547,7 +547,7 @@ sys32_setdomainname_wrapper:
547 .globl sys32_newuname_wrapper 547 .globl sys32_newuname_wrapper
548sys32_newuname_wrapper: 548sys32_newuname_wrapper:
549 llgtr %r2,%r2 # struct new_utsname * 549 llgtr %r2,%r2 # struct new_utsname *
550 jg sys_s390_newuname # branch to system call 550 jg sys_newuname # branch to system call
551 551
552 .globl compat_sys_adjtimex_wrapper 552 .globl compat_sys_adjtimex_wrapper
553compat_sys_adjtimex_wrapper: 553compat_sys_adjtimex_wrapper:
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index e1e5e767ab56..eb15c12ec158 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -24,17 +24,13 @@ int __cpuinit start_secondary(void *cpuvoid);
24void __init startup_init(void); 24void __init startup_init(void);
25void die(const char * str, struct pt_regs * regs, long err); 25void die(const char * str, struct pt_regs * regs, long err);
26 26
27struct new_utsname; 27struct s390_mmap_arg_struct;
28struct mmap_arg_struct;
29struct fadvise64_64_args; 28struct fadvise64_64_args;
30struct old_sigaction; 29struct old_sigaction;
31struct sel_arg_struct;
32 30
33long sys_mmap2(struct mmap_arg_struct __user *arg); 31long sys_mmap2(struct s390_mmap_arg_struct __user *arg);
34long sys_s390_old_mmap(struct mmap_arg_struct __user *arg); 32long sys_s390_ipc(uint call, int first, unsigned long second,
35long sys_ipc(uint call, int first, unsigned long second,
36 unsigned long third, void __user *ptr); 33 unsigned long third, void __user *ptr);
37long sys_s390_newuname(struct new_utsname __user *name);
38long sys_s390_personality(unsigned long personality); 34long sys_s390_personality(unsigned long personality);
39long sys_s390_fadvise64(int fd, u32 offset_high, u32 offset_low, 35long sys_s390_fadvise64(int fd, u32 offset_high, u32 offset_low,
40 size_t len, int advice); 36 size_t len, int advice);
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index 27af3bf3a009..2e82fdd89320 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -235,7 +235,7 @@ _sclp_print:
235 lh %r9,0(%r8) # update sccb length 235 lh %r9,0(%r8) # update sccb length
236 ar %r9,%r6 236 ar %r9,%r6
237 sth %r9,0(%r8) 237 sth %r9,0(%r8)
238 ar %r7,%r6 # update current mto adress 238 ar %r7,%r6 # update current mto address
239 ltr %r0,%r0 # more characters? 239 ltr %r0,%r0 # more characters?
240 jnz .LinitmtoS4 240 jnz .LinitmtoS4
241 l %r2,.LwritedataS4-.LbaseS4(%r13)# write data 241 l %r2,.LwritedataS4-.LbaseS4(%r13)# write data
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 8b10127c00ad..29f65bce55e1 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -1020,7 +1020,9 @@ out:
1020 return rc; 1020 return rc;
1021} 1021}
1022 1022
1023static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf, 1023static ssize_t __ref rescan_store(struct sysdev_class *class,
1024 struct sysdev_class_attribute *attr,
1025 const char *buf,
1024 size_t count) 1026 size_t count)
1025{ 1027{
1026 int rc; 1028 int rc;
@@ -1031,7 +1033,9 @@ static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
1031static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store); 1033static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
1032#endif /* CONFIG_HOTPLUG_CPU */ 1034#endif /* CONFIG_HOTPLUG_CPU */
1033 1035
1034static ssize_t dispatching_show(struct sysdev_class *class, char *buf) 1036static ssize_t dispatching_show(struct sysdev_class *class,
1037 struct sysdev_class_attribute *attr,
1038 char *buf)
1035{ 1039{
1036 ssize_t count; 1040 ssize_t count;
1037 1041
@@ -1041,7 +1045,9 @@ static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
1041 return count; 1045 return count;
1042} 1046}
1043 1047
1044static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf, 1048static ssize_t dispatching_store(struct sysdev_class *dev,
1049 struct sysdev_class_attribute *attr,
1050 const char *buf,
1045 size_t count) 1051 size_t count)
1046{ 1052{
1047 int val, rc; 1053 int val, rc;
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 86a74c9c9e63..7b6b0f81a283 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -33,13 +33,12 @@
33#include "entry.h" 33#include "entry.h"
34 34
35/* 35/*
36 * Perform the select(nd, in, out, ex, tv) and mmap() system 36 * Perform the mmap() system call. Linux for S/390 isn't able to handle more
37 * calls. Linux for S/390 isn't able to handle more than 5 37 * than 5 system call parameters, so this system call uses a memory block
38 * system call parameters, so these system calls used a memory 38 * for parameter passing.
39 * block for parameter passing..
40 */ 39 */
41 40
42struct mmap_arg_struct { 41struct s390_mmap_arg_struct {
43 unsigned long addr; 42 unsigned long addr;
44 unsigned long len; 43 unsigned long len;
45 unsigned long prot; 44 unsigned long prot;
@@ -48,9 +47,9 @@ struct mmap_arg_struct {
48 unsigned long offset; 47 unsigned long offset;
49}; 48};
50 49
51SYSCALL_DEFINE1(mmap2, struct mmap_arg_struct __user *, arg) 50SYSCALL_DEFINE1(mmap2, struct s390_mmap_arg_struct __user *, arg)
52{ 51{
53 struct mmap_arg_struct a; 52 struct s390_mmap_arg_struct a;
54 int error = -EFAULT; 53 int error = -EFAULT;
55 54
56 if (copy_from_user(&a, arg, sizeof(a))) 55 if (copy_from_user(&a, arg, sizeof(a)))
@@ -60,29 +59,12 @@ out:
60 return error; 59 return error;
61} 60}
62 61
63SYSCALL_DEFINE1(s390_old_mmap, struct mmap_arg_struct __user *, arg)
64{
65 struct mmap_arg_struct a;
66 long error = -EFAULT;
67
68 if (copy_from_user(&a, arg, sizeof(a)))
69 goto out;
70
71 error = -EINVAL;
72 if (a.offset & ~PAGE_MASK)
73 goto out;
74
75 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
76out:
77 return error;
78}
79
80/* 62/*
81 * sys_ipc() is the de-multiplexer for the SysV IPC calls.. 63 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
82 * 64 *
83 * This is really horribly ugly. 65 * This is really horribly ugly.
84 */ 66 */
85SYSCALL_DEFINE5(ipc, uint, call, int, first, unsigned long, second, 67SYSCALL_DEFINE5(s390_ipc, uint, call, int, first, unsigned long, second,
86 unsigned long, third, void __user *, ptr) 68 unsigned long, third, void __user *, ptr)
87{ 69{
88 struct ipc_kludge tmp; 70 struct ipc_kludge tmp;
@@ -149,17 +131,6 @@ SYSCALL_DEFINE5(ipc, uint, call, int, first, unsigned long, second,
149} 131}
150 132
151#ifdef CONFIG_64BIT 133#ifdef CONFIG_64BIT
152SYSCALL_DEFINE1(s390_newuname, struct new_utsname __user *, name)
153{
154 int ret = sys_newuname(name);
155
156 if (personality(current->personality) == PER_LINUX32 && !ret) {
157 ret = copy_to_user(name->machine, "s390\0\0\0\0", 8);
158 if (ret) ret = -EFAULT;
159 }
160 return ret;
161}
162
163SYSCALL_DEFINE1(s390_personality, unsigned long, personality) 134SYSCALL_DEFINE1(s390_personality, unsigned long, personality)
164{ 135{
165 int ret; 136 int ret;
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 30eca070d426..201ce6bed34e 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -98,7 +98,7 @@ SYSCALL(sys_uselib,sys_uselib,sys32_uselib_wrapper)
98SYSCALL(sys_swapon,sys_swapon,sys32_swapon_wrapper) 98SYSCALL(sys_swapon,sys_swapon,sys32_swapon_wrapper)
99SYSCALL(sys_reboot,sys_reboot,sys32_reboot_wrapper) 99SYSCALL(sys_reboot,sys_reboot,sys32_reboot_wrapper)
100SYSCALL(sys_ni_syscall,sys_ni_syscall,old32_readdir_wrapper) /* old readdir syscall */ 100SYSCALL(sys_ni_syscall,sys_ni_syscall,old32_readdir_wrapper) /* old readdir syscall */
101SYSCALL(sys_s390_old_mmap,sys_s390_old_mmap,old32_mmap_wrapper) /* 90 */ 101SYSCALL(sys_old_mmap,sys_old_mmap,old32_mmap_wrapper) /* 90 */
102SYSCALL(sys_munmap,sys_munmap,sys32_munmap_wrapper) 102SYSCALL(sys_munmap,sys_munmap,sys32_munmap_wrapper)
103SYSCALL(sys_truncate,sys_truncate,sys32_truncate_wrapper) 103SYSCALL(sys_truncate,sys_truncate,sys32_truncate_wrapper)
104SYSCALL(sys_ftruncate,sys_ftruncate,sys32_ftruncate_wrapper) 104SYSCALL(sys_ftruncate,sys_ftruncate,sys32_ftruncate_wrapper)
@@ -125,12 +125,12 @@ NI_SYSCALL /* vm86old for i386 */
125SYSCALL(sys_wait4,sys_wait4,compat_sys_wait4_wrapper) 125SYSCALL(sys_wait4,sys_wait4,compat_sys_wait4_wrapper)
126SYSCALL(sys_swapoff,sys_swapoff,sys32_swapoff_wrapper) /* 115 */ 126SYSCALL(sys_swapoff,sys_swapoff,sys32_swapoff_wrapper) /* 115 */
127SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper) 127SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper)
128SYSCALL(sys_ipc,sys_ipc,sys32_ipc_wrapper) 128SYSCALL(sys_s390_ipc,sys_s390_ipc,sys32_ipc_wrapper)
129SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper) 129SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper)
130SYSCALL(sys_sigreturn,sys_sigreturn,sys32_sigreturn) 130SYSCALL(sys_sigreturn,sys_sigreturn,sys32_sigreturn)
131SYSCALL(sys_clone,sys_clone,sys_clone_wrapper) /* 120 */ 131SYSCALL(sys_clone,sys_clone,sys_clone_wrapper) /* 120 */
132SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper) 132SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper)
133SYSCALL(sys_newuname,sys_s390_newuname,sys32_newuname_wrapper) 133SYSCALL(sys_newuname,sys_newuname,sys32_newuname_wrapper)
134NI_SYSCALL /* modify_ldt for i386 */ 134NI_SYSCALL /* modify_ldt for i386 */
135SYSCALL(sys_adjtimex,sys_adjtimex,compat_sys_adjtimex_wrapper) 135SYSCALL(sys_adjtimex,sys_adjtimex,compat_sys_adjtimex_wrapper)
136SYSCALL(sys_mprotect,sys_mprotect,sys32_mprotect_wrapper) /* 125 */ 136SYSCALL(sys_mprotect,sys_mprotect,sys32_mprotect_wrapper) /* 125 */
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index a8f93f1705ad..aa2483e460f3 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -73,15 +73,15 @@ unsigned long long monotonic_clock(void)
73} 73}
74EXPORT_SYMBOL(monotonic_clock); 74EXPORT_SYMBOL(monotonic_clock);
75 75
76void tod_to_timeval(__u64 todval, struct timespec *xtime) 76void tod_to_timeval(__u64 todval, struct timespec *xt)
77{ 77{
78 unsigned long long sec; 78 unsigned long long sec;
79 79
80 sec = todval >> 12; 80 sec = todval >> 12;
81 do_div(sec, 1000000); 81 do_div(sec, 1000000);
82 xtime->tv_sec = sec; 82 xt->tv_sec = sec;
83 todval -= (sec * 1000000) << 12; 83 todval -= (sec * 1000000) << 12;
84 xtime->tv_nsec = ((todval * 1000) >> 12); 84 xt->tv_nsec = ((todval * 1000) >> 12);
85} 85}
86EXPORT_SYMBOL(tod_to_timeval); 86EXPORT_SYMBOL(tod_to_timeval);
87 87
@@ -216,8 +216,8 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
216 ++vdso_data->tb_update_count; 216 ++vdso_data->tb_update_count;
217 smp_wmb(); 217 smp_wmb();
218 vdso_data->xtime_tod_stamp = clock->cycle_last; 218 vdso_data->xtime_tod_stamp = clock->cycle_last;
219 vdso_data->xtime_clock_sec = xtime.tv_sec; 219 vdso_data->xtime_clock_sec = wall_time->tv_sec;
220 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 220 vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
221 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 221 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
222 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 222 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
223 smp_wmb(); 223 smp_wmb();
@@ -1116,14 +1116,18 @@ static struct sys_device etr_port1_dev = {
1116/* 1116/*
1117 * ETR class attributes 1117 * ETR class attributes
1118 */ 1118 */
1119static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1119static ssize_t etr_stepping_port_show(struct sysdev_class *class,
1120 struct sysdev_class_attribute *attr,
1121 char *buf)
1120{ 1122{
1121 return sprintf(buf, "%i\n", etr_port0.esw.p); 1123 return sprintf(buf, "%i\n", etr_port0.esw.p);
1122} 1124}
1123 1125
1124static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1126static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1125 1127
1126static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1128static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
1129 struct sysdev_class_attribute *attr,
1130 char *buf)
1127{ 1131{
1128 char *mode_str; 1132 char *mode_str;
1129 1133
@@ -1584,7 +1588,9 @@ static struct sysdev_class stp_sysclass = {
1584 .name = "stp", 1588 .name = "stp",
1585}; 1589};
1586 1590
1587static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1591static ssize_t stp_ctn_id_show(struct sysdev_class *class,
1592 struct sysdev_class_attribute *attr,
1593 char *buf)
1588{ 1594{
1589 if (!stp_online) 1595 if (!stp_online)
1590 return -ENODATA; 1596 return -ENODATA;
@@ -1594,7 +1600,9 @@ static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1594 1600
1595static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1601static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1596 1602
1597static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1603static ssize_t stp_ctn_type_show(struct sysdev_class *class,
1604 struct sysdev_class_attribute *attr,
1605 char *buf)
1598{ 1606{
1599 if (!stp_online) 1607 if (!stp_online)
1600 return -ENODATA; 1608 return -ENODATA;
@@ -1603,7 +1611,9 @@ static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1603 1611
1604static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1612static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1605 1613
1606static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1614static ssize_t stp_dst_offset_show(struct sysdev_class *class,
1615 struct sysdev_class_attribute *attr,
1616 char *buf)
1607{ 1617{
1608 if (!stp_online || !(stp_info.vbits & 0x2000)) 1618 if (!stp_online || !(stp_info.vbits & 0x2000))
1609 return -ENODATA; 1619 return -ENODATA;
@@ -1612,7 +1622,9 @@ static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1612 1622
1613static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1623static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1614 1624
1615static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1625static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
1626 struct sysdev_class_attribute *attr,
1627 char *buf)
1616{ 1628{
1617 if (!stp_online || !(stp_info.vbits & 0x8000)) 1629 if (!stp_online || !(stp_info.vbits & 0x8000))
1618 return -ENODATA; 1630 return -ENODATA;
@@ -1621,7 +1633,9 @@ static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1621 1633
1622static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1634static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1623 1635
1624static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1636static ssize_t stp_stratum_show(struct sysdev_class *class,
1637 struct sysdev_class_attribute *attr,
1638 char *buf)
1625{ 1639{
1626 if (!stp_online) 1640 if (!stp_online)
1627 return -ENODATA; 1641 return -ENODATA;
@@ -1630,7 +1644,9 @@ static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1630 1644
1631static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1645static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1632 1646
1633static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1647static ssize_t stp_time_offset_show(struct sysdev_class *class,
1648 struct sysdev_class_attribute *attr,
1649 char *buf)
1634{ 1650{
1635 if (!stp_online || !(stp_info.vbits & 0x0800)) 1651 if (!stp_online || !(stp_info.vbits & 0x0800))
1636 return -ENODATA; 1652 return -ENODATA;
@@ -1639,7 +1655,9 @@ static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1639 1655
1640static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1656static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1641 1657
1642static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1658static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
1659 struct sysdev_class_attribute *attr,
1660 char *buf)
1643{ 1661{
1644 if (!stp_online || !(stp_info.vbits & 0x4000)) 1662 if (!stp_online || !(stp_info.vbits & 0x4000))
1645 return -ENODATA; 1663 return -ENODATA;
@@ -1649,7 +1667,9 @@ static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1649static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1667static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1650 stp_time_zone_offset_show, NULL); 1668 stp_time_zone_offset_show, NULL);
1651 1669
1652static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1670static ssize_t stp_timing_mode_show(struct sysdev_class *class,
1671 struct sysdev_class_attribute *attr,
1672 char *buf)
1653{ 1673{
1654 if (!stp_online) 1674 if (!stp_online)
1655 return -ENODATA; 1675 return -ENODATA;
@@ -1658,7 +1678,9 @@ static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1658 1678
1659static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1679static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1660 1680
1661static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1681static ssize_t stp_timing_state_show(struct sysdev_class *class,
1682 struct sysdev_class_attribute *attr,
1683 char *buf)
1662{ 1684{
1663 if (!stp_online) 1685 if (!stp_online)
1664 return -ENODATA; 1686 return -ENODATA;
@@ -1667,12 +1689,15 @@ static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1667 1689
1668static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1690static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1669 1691
1670static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1692static ssize_t stp_online_show(struct sysdev_class *class,
1693 struct sysdev_class_attribute *attr,
1694 char *buf)
1671{ 1695{
1672 return sprintf(buf, "%i\n", stp_online); 1696 return sprintf(buf, "%i\n", stp_online);
1673} 1697}
1674 1698
1675static ssize_t stp_online_store(struct sysdev_class *class, 1699static ssize_t stp_online_store(struct sysdev_class *class,
1700 struct sysdev_class_attribute *attr,
1676 const char *buf, size_t count) 1701 const char *buf, size_t count)
1677{ 1702{
1678 unsigned int value; 1703 unsigned int value;
diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile
index cd54a1c352af..761ab8b56afc 100644
--- a/arch/s390/lib/Makefile
+++ b/arch/s390/lib/Makefile
@@ -2,7 +2,8 @@
2# Makefile for s390-specific library files.. 2# Makefile for s390-specific library files..
3# 3#
4 4
5lib-y += delay.o string.o uaccess_std.o uaccess_pt.o usercopy.o 5lib-y += delay.o string.o uaccess_std.o uaccess_pt.o
6obj-y += usercopy.o
6obj-$(CONFIG_32BIT) += div64.o qrnnd.o ucmpdi2.o 7obj-$(CONFIG_32BIT) += div64.o qrnnd.o ucmpdi2.o
7lib-$(CONFIG_64BIT) += uaccess_mvcos.o 8lib-$(CONFIG_64BIT) += uaccess_mvcos.o
8lib-$(CONFIG_SMP) += spinlock.o 9lib-$(CONFIG_SMP) += spinlock.o
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c
index 76a3637b88e0..f16bd04e39e9 100644
--- a/arch/s390/mm/cmm.c
+++ b/arch/s390/mm/cmm.c
@@ -374,7 +374,7 @@ static struct ctl_table cmm_dir_table[] = {
374#ifdef CONFIG_CMM_IUCV 374#ifdef CONFIG_CMM_IUCV
375#define SMSG_PREFIX "CMM" 375#define SMSG_PREFIX "CMM"
376static void 376static void
377cmm_smsg_target(char *from, char *msg) 377cmm_smsg_target(const char *from, char *msg)
378{ 378{
379 long nr, seconds; 379 long nr, seconds;
380 380
diff --git a/arch/score/include/asm/ptrace.h b/arch/score/include/asm/ptrace.h
index d40e691f23e2..e89dc9b1ef49 100644
--- a/arch/score/include/asm/ptrace.h
+++ b/arch/score/include/asm/ptrace.h
@@ -90,8 +90,7 @@ extern int read_tsk_short(struct task_struct *, unsigned long,
90 unsigned short *); 90 unsigned short *);
91 91
92#define arch_has_single_step() (1) 92#define arch_has_single_step() (1)
93extern void user_enable_single_step(struct task_struct *); 93
94extern void user_disable_single_step(struct task_struct *);
95#endif /* __KERNEL__ */ 94#endif /* __KERNEL__ */
96 95
97#endif /* _ASM_SCORE_PTRACE_H */ 96#endif /* _ASM_SCORE_PTRACE_H */
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 05cef5061293..8d90564c2bcf 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -183,6 +183,9 @@ config DMA_COHERENT
183config DMA_NONCOHERENT 183config DMA_NONCOHERENT
184 def_bool !DMA_COHERENT 184 def_bool !DMA_COHERENT
185 185
186config NEED_DMA_MAP_STATE
187 def_bool DMA_NONCOHERENT
188
186source "init/Kconfig" 189source "init/Kconfig"
187 190
188source "kernel/Kconfig.freezer" 191source "kernel/Kconfig.freezer"
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 1042f7f0a48b..8bd952fcf3ba 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -83,25 +83,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
83 */ 83 */
84#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) 84#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
85 85
86/* pci_unmap_{single,page} being a nop depends upon the
87 * configuration.
88 */
89#ifdef CONFIG_DMA_NONCOHERENT
90#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
91#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
92#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
93#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
94#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
95#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
96#else
97#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
98#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
99#define pci_unmap_addr(PTR, ADDR_NAME) (0)
100#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
101#define pci_unmap_len(PTR, LEN_NAME) (0)
102#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
103#endif
104
105#ifdef CONFIG_PCI 86#ifdef CONFIG_PCI
106/* 87/*
107 * None of the SH PCI controllers support MWI, it is always treated as a 88 * None of the SH PCI controllers support MWI, it is always treated as a
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index e11b14ea2c43..2168fde25611 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -123,8 +123,6 @@ extern void show_regs(struct pt_regs *);
123struct task_struct; 123struct task_struct;
124 124
125#define arch_has_single_step() (1) 125#define arch_has_single_step() (1)
126extern void user_enable_single_step(struct task_struct *);
127extern void user_disable_single_step(struct task_struct *);
128 126
129struct perf_event; 127struct perf_event;
130struct perf_sample_data; 128struct perf_sample_data;
diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h
index c1e2b8deb837..507725af2e54 100644
--- a/arch/sh/include/asm/syscalls.h
+++ b/arch/sh/include/asm/syscalls.h
@@ -3,17 +3,12 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6struct old_utsname;
7
8asmlinkage int old_mmap(unsigned long addr, unsigned long len, 6asmlinkage int old_mmap(unsigned long addr, unsigned long len,
9 unsigned long prot, unsigned long flags, 7 unsigned long prot, unsigned long flags,
10 int fd, unsigned long off); 8 int fd, unsigned long off);
11asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 9asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
12 unsigned long prot, unsigned long flags, 10 unsigned long prot, unsigned long flags,
13 unsigned long fd, unsigned long pgoff); 11 unsigned long fd, unsigned long pgoff);
14asmlinkage int sys_ipc(uint call, int first, int second,
15 int third, void __user *ptr, long fifth);
16asmlinkage int sys_uname(struct old_utsname __user *name);
17 12
18#ifdef CONFIG_SUPERH32 13#ifdef CONFIG_SUPERH32
19# include "syscalls_32.h" 14# include "syscalls_32.h"
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 365744b05269..0e7f0fc8f086 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -358,6 +358,7 @@
358#define __ARCH_WANT_STAT64 358#define __ARCH_WANT_STAT64
359#define __ARCH_WANT_SYS_ALARM 359#define __ARCH_WANT_SYS_ALARM
360#define __ARCH_WANT_SYS_GETHOSTNAME 360#define __ARCH_WANT_SYS_GETHOSTNAME
361#define __ARCH_WANT_SYS_IPC
361#define __ARCH_WANT_SYS_PAUSE 362#define __ARCH_WANT_SYS_PAUSE
362#define __ARCH_WANT_SYS_SGETMASK 363#define __ARCH_WANT_SYS_SGETMASK
363#define __ARCH_WANT_SYS_SIGNAL 364#define __ARCH_WANT_SYS_SIGNAL
@@ -370,6 +371,7 @@
370#define __ARCH_WANT_SYS_LLSEEK 371#define __ARCH_WANT_SYS_LLSEEK
371#define __ARCH_WANT_SYS_NICE 372#define __ARCH_WANT_SYS_NICE
372#define __ARCH_WANT_SYS_OLD_GETRLIMIT 373#define __ARCH_WANT_SYS_OLD_GETRLIMIT
374#define __ARCH_WANT_SYS_OLD_UNAME
373#define __ARCH_WANT_SYS_OLDUMOUNT 375#define __ARCH_WANT_SYS_OLDUMOUNT
374#define __ARCH_WANT_SYS_SIGPENDING 376#define __ARCH_WANT_SYS_SIGPENDING
375#define __ARCH_WANT_SYS_SIGPROCMASK 377#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 25de158aac3a..0580c33a1e04 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -398,6 +398,7 @@
398#define __ARCH_WANT_STAT64 398#define __ARCH_WANT_STAT64
399#define __ARCH_WANT_SYS_ALARM 399#define __ARCH_WANT_SYS_ALARM
400#define __ARCH_WANT_SYS_GETHOSTNAME 400#define __ARCH_WANT_SYS_GETHOSTNAME
401#define __ARCH_WANT_SYS_IPC
401#define __ARCH_WANT_SYS_PAUSE 402#define __ARCH_WANT_SYS_PAUSE
402#define __ARCH_WANT_SYS_SGETMASK 403#define __ARCH_WANT_SYS_SGETMASK
403#define __ARCH_WANT_SYS_SIGNAL 404#define __ARCH_WANT_SYS_SIGNAL
@@ -410,6 +411,7 @@
410#define __ARCH_WANT_SYS_LLSEEK 411#define __ARCH_WANT_SYS_LLSEEK
411#define __ARCH_WANT_SYS_NICE 412#define __ARCH_WANT_SYS_NICE
412#define __ARCH_WANT_SYS_OLD_GETRLIMIT 413#define __ARCH_WANT_SYS_OLD_GETRLIMIT
414#define __ARCH_WANT_SYS_OLD_UNAME
413#define __ARCH_WANT_SYS_OLDUMOUNT 415#define __ARCH_WANT_SYS_OLDUMOUNT
414#define __ARCH_WANT_SYS_SIGPENDING 416#define __ARCH_WANT_SYS_SIGPENDING
415#define __ARCH_WANT_SYS_SIGPROCMASK 417#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 83da5debeedf..e9fa1bfed53e 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
404 * If an entry has a device ID, it must match 404 * If an entry has a device ID, it must match
405 * If an entry has a connection ID, it must match 405 * If an entry has a connection ID, it must match
406 * Then we take the most specific entry - with the following 406 * Then we take the most specific entry - with the following
407 * order of precidence: dev+con > dev only > con only. 407 * order of precedence: dev+con > dev only > con only.
408 */ 408 */
409static struct clk *clk_find(const char *dev_id, const char *con_id) 409static struct clk *clk_find(const char *dev_id, const char *con_id)
410{ 410{
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index fc065f9da6e5..14726eef1ce0 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -326,7 +326,7 @@ static struct attribute *sq_sysfs_attrs[] = {
326 NULL, 326 NULL,
327}; 327};
328 328
329static struct sysfs_ops sq_sysfs_ops = { 329static const struct sysfs_ops sq_sysfs_ops = {
330 .show = sq_sysfs_show, 330 .show = sq_sysfs_show,
331 .store = sq_sysfs_store, 331 .store = sq_sysfs_store,
332}; 332};
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 71399cde03b5..81f58371613d 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -53,110 +53,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
53 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); 53 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
54} 54}
55 55
56/*
57 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
58 *
59 * This is really horribly ugly.
60 */
61asmlinkage int sys_ipc(uint call, int first, int second,
62 int third, void __user *ptr, long fifth)
63{
64 int version, ret;
65
66 version = call >> 16; /* hack for backward compatibility */
67 call &= 0xffff;
68
69 if (call <= SEMTIMEDOP)
70 switch (call) {
71 case SEMOP:
72 return sys_semtimedop(first,
73 (struct sembuf __user *)ptr,
74 second, NULL);
75 case SEMTIMEDOP:
76 return sys_semtimedop(first,
77 (struct sembuf __user *)ptr, second,
78 (const struct timespec __user *)fifth);
79 case SEMGET:
80 return sys_semget (first, second, third);
81 case SEMCTL: {
82 union semun fourth;
83 if (!ptr)
84 return -EINVAL;
85 if (get_user(fourth.__pad, (void __user * __user *) ptr))
86 return -EFAULT;
87 return sys_semctl (first, second, third, fourth);
88 }
89 default:
90 return -EINVAL;
91 }
92
93 if (call <= MSGCTL)
94 switch (call) {
95 case MSGSND:
96 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
97 second, third);
98 case MSGRCV:
99 switch (version) {
100 case 0:
101 {
102 struct ipc_kludge tmp;
103
104 if (!ptr)
105 return -EINVAL;
106
107 if (copy_from_user(&tmp,
108 (struct ipc_kludge __user *) ptr,
109 sizeof (tmp)))
110 return -EFAULT;
111
112 return sys_msgrcv (first, tmp.msgp, second,
113 tmp.msgtyp, third);
114 }
115 default:
116 return sys_msgrcv (first,
117 (struct msgbuf __user *) ptr,
118 second, fifth, third);
119 }
120 case MSGGET:
121 return sys_msgget ((key_t) first, second);
122 case MSGCTL:
123 return sys_msgctl (first, second,
124 (struct msqid_ds __user *) ptr);
125 default:
126 return -EINVAL;
127 }
128 if (call <= SHMCTL)
129 switch (call) {
130 case SHMAT:
131 switch (version) {
132 default: {
133 ulong raddr;
134 ret = do_shmat (first, (char __user *) ptr,
135 second, &raddr);
136 if (ret)
137 return ret;
138 return put_user (raddr, (ulong __user *) third);
139 }
140 case 1: /* iBCS2 emulator entry point */
141 if (!segment_eq(get_fs(), get_ds()))
142 return -EINVAL;
143 return do_shmat (first, (char __user *) ptr,
144 second, (ulong *) third);
145 }
146 case SHMDT:
147 return sys_shmdt ((char __user *)ptr);
148 case SHMGET:
149 return sys_shmget (first, second, third);
150 case SHMCTL:
151 return sys_shmctl (first, second,
152 (struct shmid_ds __user *) ptr);
153 default:
154 return -EINVAL;
155 }
156
157 return -EINVAL;
158}
159
160/* sys_cacheflush -- flush (part of) the processor cache. */ 56/* sys_cacheflush -- flush (part of) the processor cache. */
161asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op) 57asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
162{ 58{
@@ -197,14 +93,3 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
197 up_read(&current->mm->mmap_sem); 93 up_read(&current->mm->mmap_sem);
198 return 0; 94 return 0;
199} 95}
200
201asmlinkage int sys_uname(struct old_utsname __user *name)
202{
203 int err;
204 if (!name)
205 return -EFAULT;
206 down_read(&uts_sem);
207 err = copy_to_user(name, utsname(), sizeof(*name));
208 up_read(&uts_sem);
209 return err?-EFAULT:0;
210}
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 4097f6a10860..6db513674050 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -127,6 +127,9 @@ config ZONE_DMA
127 bool 127 bool
128 default y if SPARC32 128 default y if SPARC32
129 129
130config NEED_DMA_MAP_STATE
131 def_bool y
132
130config GENERIC_ISA_DMA 133config GENERIC_ISA_DMA
131 bool 134 bool
132 default y if SPARC32 135 default y if SPARC32
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index 0e706257918f..5016f76ea98a 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -5,7 +5,8 @@
5 */ 5 */
6#include <linux/types.h> 6#include <linux/types.h>
7 7
8#define COMPAT_USER_HZ 100 8#define COMPAT_USER_HZ 100
9#define COMPAT_UTS_MACHINE "sparc\0\0"
9 10
10typedef u32 compat_size_t; 11typedef u32 compat_size_t;
11typedef s32 compat_ssize_t; 12typedef s32 compat_ssize_t;
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 5a8c308e2b5c..4b4a0c0b0ccd 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -8,7 +8,6 @@
8#define DMA_ERROR_CODE (~(dma_addr_t)0x0) 8#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
9 9
10extern int dma_supported(struct device *dev, u64 mask); 10extern int dma_supported(struct device *dev, u64 mask);
11extern int dma_set_mask(struct device *dev, u64 dma_mask);
12 11
13#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 12#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
14#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 13#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
@@ -62,4 +61,17 @@ static inline int dma_get_cache_alignment(void)
62 return (1 << INTERNODE_CACHE_SHIFT); 61 return (1 << INTERNODE_CACHE_SHIFT);
63} 62}
64 63
64static inline int dma_set_mask(struct device *dev, u64 mask)
65{
66#ifdef CONFIG_PCI
67 if (dev->bus == &pci_bus_type) {
68 if (!dev->dma_mask || !dma_supported(dev, mask))
69 return -EINVAL;
70 *dev->dma_mask = mask;
71 return 0;
72 }
73#endif
74 return -EINVAL;
75}
76
65#endif 77#endif
diff --git a/arch/sparc/include/asm/fbio.h b/arch/sparc/include/asm/fbio.h
index b9215a0907d3..0a21da87f7d6 100644
--- a/arch/sparc/include/asm/fbio.h
+++ b/arch/sparc/include/asm/fbio.h
@@ -173,7 +173,7 @@ struct mdi_cfginfo {
173 int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ 173 int mdi_ncluts; /* Number of implemented CLUTs in this MDI */
174 int mdi_type; /* FBTYPE name */ 174 int mdi_type; /* FBTYPE name */
175 int mdi_height; /* height */ 175 int mdi_height; /* height */
176 int mdi_width; /* widht */ 176 int mdi_width; /* width */
177 int mdi_size; /* available ram */ 177 int mdi_size; /* available ram */
178 int mdi_mode; /* 8bpp, 16bpp or 32bpp */ 178 int mdi_mode; /* 8bpp, 16bpp or 32bpp */
179 int mdi_pixfreq; /* pixel clock (from PROM) */ 179 int mdi_pixfreq; /* pixel clock (from PROM) */
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index e769f668a4b5..332ac9ab36bc 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -32,20 +32,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
32 32
33struct pci_dev; 33struct pci_dev;
34 34
35/* pci_unmap_{single,page} is not a nop, thus... */
36#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
37 dma_addr_t ADDR_NAME;
38#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
39 __u32 LEN_NAME;
40#define pci_unmap_addr(PTR, ADDR_NAME) \
41 ((PTR)->ADDR_NAME)
42#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
43 (((PTR)->ADDR_NAME) = (VAL))
44#define pci_unmap_len(PTR, LEN_NAME) \
45 ((PTR)->LEN_NAME)
46#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
47 (((PTR)->LEN_NAME) = (VAL))
48
49#ifdef CONFIG_PCI 35#ifdef CONFIG_PCI
50static inline void pci_dma_burst_advice(struct pci_dev *pdev, 36static inline void pci_dma_burst_advice(struct pci_dev *pdev,
51 enum pci_dma_burst_strategy *strat, 37 enum pci_dma_burst_strategy *strat,
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index b0576df6ec83..5312782f0b5e 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -32,20 +32,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
32 */ 32 */
33#define PCI_DMA_BUS_IS_PHYS (0) 33#define PCI_DMA_BUS_IS_PHYS (0)
34 34
35/* pci_unmap_{single,page} is not a nop, thus... */
36#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
37 dma_addr_t ADDR_NAME;
38#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
39 __u32 LEN_NAME;
40#define pci_unmap_addr(PTR, ADDR_NAME) \
41 ((PTR)->ADDR_NAME)
42#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
43 (((PTR)->ADDR_NAME) = (VAL))
44#define pci_unmap_len(PTR, LEN_NAME) \
45 ((PTR)->LEN_NAME)
46#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
47 (((PTR)->LEN_NAME) = (VAL))
48
49/* PCI IOMMU mapping bypass support. */ 35/* PCI IOMMU mapping bypass support. */
50 36
51/* PCI 64-bit addressing works for all slots on all controller 37/* PCI 64-bit addressing works for all slots on all controller
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index cb4b9bfd0d87..d0b3b01ac9d4 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -432,7 +432,9 @@
432#define __ARCH_WANT_SYS_SIGPENDING 432#define __ARCH_WANT_SYS_SIGPENDING
433#define __ARCH_WANT_SYS_SIGPROCMASK 433#define __ARCH_WANT_SYS_SIGPROCMASK
434#define __ARCH_WANT_SYS_RT_SIGSUSPEND 434#define __ARCH_WANT_SYS_RT_SIGSUSPEND
435#ifndef __32bit_syscall_numbers__ 435#ifdef __32bit_syscall_numbers__
436#define __ARCH_WANT_SYS_IPC
437#else
436#define __ARCH_WANT_COMPAT_SYS_TIME 438#define __ARCH_WANT_COMPAT_SYS_TIME
437#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND 439#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
438#endif 440#endif
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 5fad94950e76..8414549c1834 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -862,13 +862,3 @@ int dma_supported(struct device *dev, u64 device_mask)
862 return 0; 862 return 0;
863} 863}
864EXPORT_SYMBOL(dma_supported); 864EXPORT_SYMBOL(dma_supported);
865
866int dma_set_mask(struct device *dev, u64 dma_mask)
867{
868#ifdef CONFIG_PCI
869 if (dev->bus == &pci_bus_type)
870 return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
871#endif
872 return -EINVAL;
873}
874EXPORT_SYMBOL(dma_set_mask);
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 3c8c44f6a41c..84e5386714cd 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -676,17 +676,6 @@ int dma_supported(struct device *dev, u64 mask)
676} 676}
677EXPORT_SYMBOL(dma_supported); 677EXPORT_SYMBOL(dma_supported);
678 678
679int dma_set_mask(struct device *dev, u64 dma_mask)
680{
681#ifdef CONFIG_PCI
682 if (dev->bus == &pci_bus_type)
683 return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
684#endif
685 return -EOPNOTSUPP;
686}
687EXPORT_SYMBOL(dma_set_mask);
688
689
690#ifdef CONFIG_PROC_FS 679#ifdef CONFIG_PROC_FS
691 680
692static int sparc_io_proc_show(struct seq_file *m, void *v) 681static int sparc_io_proc_show(struct seq_file *m, void *v)
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 9f2b2bac8b2b..68cb9b42088f 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1189,7 +1189,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
1189 1189
1190 regs = args->regs; 1190 regs = args->regs;
1191 1191
1192 data.addr = 0; 1192 perf_sample_data_init(&data, 0);
1193 1193
1194 cpuc = &__get_cpu_var(cpu_hw_events); 1194 cpuc = &__get_cpu_var(cpu_hw_events);
1195 1195
@@ -1353,7 +1353,7 @@ static void perf_callchain_user_32(struct pt_regs *regs,
1353} 1353}
1354 1354
1355/* Like powerpc we can't get PMU interrupts within the PMU handler, 1355/* Like powerpc we can't get PMU interrupts within the PMU handler,
1356 * so no need for seperate NMI and IRQ chains as on x86. 1356 * so no need for separate NMI and IRQ chains as on x86.
1357 */ 1357 */
1358static DEFINE_PER_CPU(struct perf_callchain_entry, callchain); 1358static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
1359 1359
diff --git a/arch/sparc/kernel/sys_sparc_32.c b/arch/sparc/kernel/sys_sparc_32.c
index 3a82e65d8db2..ee995b7dae7e 100644
--- a/arch/sparc/kernel/sys_sparc_32.c
+++ b/arch/sparc/kernel/sys_sparc_32.c
@@ -98,119 +98,6 @@ out:
98 return error; 98 return error;
99} 99}
100 100
101/*
102 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
103 *
104 * This is really horribly ugly.
105 */
106
107asmlinkage int sys_ipc (uint call, int first, int second, int third, void __user *ptr, long fifth)
108{
109 int version, err;
110
111 version = call >> 16; /* hack for backward compatibility */
112 call &= 0xffff;
113
114 if (call <= SEMCTL)
115 switch (call) {
116 case SEMOP:
117 err = sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
118 goto out;
119 case SEMTIMEDOP:
120 err = sys_semtimedop (first, (struct sembuf __user *)ptr, second, (const struct timespec __user *) fifth);
121 goto out;
122 case SEMGET:
123 err = sys_semget (first, second, third);
124 goto out;
125 case SEMCTL: {
126 union semun fourth;
127 err = -EINVAL;
128 if (!ptr)
129 goto out;
130 err = -EFAULT;
131 if (get_user(fourth.__pad,
132 (void __user * __user *)ptr))
133 goto out;
134 err = sys_semctl (first, second, third, fourth);
135 goto out;
136 }
137 default:
138 err = -ENOSYS;
139 goto out;
140 }
141 if (call <= MSGCTL)
142 switch (call) {
143 case MSGSND:
144 err = sys_msgsnd (first, (struct msgbuf __user *) ptr,
145 second, third);
146 goto out;
147 case MSGRCV:
148 switch (version) {
149 case 0: {
150 struct ipc_kludge tmp;
151 err = -EINVAL;
152 if (!ptr)
153 goto out;
154 err = -EFAULT;
155 if (copy_from_user(&tmp, (struct ipc_kludge __user *) ptr, sizeof (tmp)))
156 goto out;
157 err = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, third);
158 goto out;
159 }
160 case 1: default:
161 err = sys_msgrcv (first,
162 (struct msgbuf __user *) ptr,
163 second, fifth, third);
164 goto out;
165 }
166 case MSGGET:
167 err = sys_msgget ((key_t) first, second);
168 goto out;
169 case MSGCTL:
170 err = sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
171 goto out;
172 default:
173 err = -ENOSYS;
174 goto out;
175 }
176 if (call <= SHMCTL)
177 switch (call) {
178 case SHMAT:
179 switch (version) {
180 case 0: default: {
181 ulong raddr;
182 err = do_shmat (first, (char __user *) ptr, second, &raddr);
183 if (err)
184 goto out;
185 err = -EFAULT;
186 if (put_user (raddr, (ulong __user *) third))
187 goto out;
188 err = 0;
189 goto out;
190 }
191 case 1: /* iBCS2 emulator entry point */
192 err = -EINVAL;
193 goto out;
194 }
195 case SHMDT:
196 err = sys_shmdt ((char __user *)ptr);
197 goto out;
198 case SHMGET:
199 err = sys_shmget (first, second, third);
200 goto out;
201 case SHMCTL:
202 err = sys_shmctl (first, second, (struct shmid_ds __user *) ptr);
203 goto out;
204 default:
205 err = -ENOSYS;
206 goto out;
207 }
208 else
209 err = -ENOSYS;
210out:
211 return err;
212}
213
214int sparc_mmap_check(unsigned long addr, unsigned long len) 101int sparc_mmap_check(unsigned long addr, unsigned long len)
215{ 102{
216 if (ARCH_SUN4C && 103 if (ARCH_SUN4C &&
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index cb1bef6f14b7..3d435c42e6db 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -426,7 +426,7 @@ out:
426 * This is really horribly ugly. 426 * This is really horribly ugly.
427 */ 427 */
428 428
429SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, unsigned long, second, 429SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second,
430 unsigned long, third, void __user *, ptr, long, fifth) 430 unsigned long, third, void __user *, ptr, long, fifth)
431{ 431{
432 long err; 432 long err;
@@ -510,17 +510,6 @@ out:
510 return err; 510 return err;
511} 511}
512 512
513SYSCALL_DEFINE1(sparc64_newuname, struct new_utsname __user *, name)
514{
515 int ret = sys_newuname(name);
516
517 if (current->personality == PER_LINUX32 && !ret) {
518 ret = (copy_to_user(name->machine, "sparc\0\0", 8)
519 ? -EFAULT : 0);
520 }
521 return ret;
522}
523
524SYSCALL_DEFINE1(sparc64_personality, unsigned long, personality) 513SYSCALL_DEFINE1(sparc64_personality, unsigned long, personality)
525{ 514{
526 int ret; 515 int ret;
diff --git a/arch/sparc/kernel/systbls.h b/arch/sparc/kernel/systbls.h
index 68312fe8da74..118759cd7342 100644
--- a/arch/sparc/kernel/systbls.h
+++ b/arch/sparc/kernel/systbls.h
@@ -6,15 +6,12 @@
6#include <asm/utrap.h> 6#include <asm/utrap.h>
7#include <asm/signal.h> 7#include <asm/signal.h>
8 8
9struct new_utsname;
10
11extern asmlinkage unsigned long sys_getpagesize(void); 9extern asmlinkage unsigned long sys_getpagesize(void);
12extern asmlinkage long sparc_pipe(struct pt_regs *regs); 10extern asmlinkage long sparc_pipe(struct pt_regs *regs);
13extern asmlinkage long sys_ipc(unsigned int call, int first, 11extern asmlinkage long sys_sparc_ipc(unsigned int call, int first,
14 unsigned long second, 12 unsigned long second,
15 unsigned long third, 13 unsigned long third,
16 void __user *ptr, long fifth); 14 void __user *ptr, long fifth);
17extern asmlinkage long sparc64_newuname(struct new_utsname __user *name);
18extern asmlinkage long sparc64_personality(unsigned long personality); 15extern asmlinkage long sparc64_personality(unsigned long personality);
19extern asmlinkage long sys64_munmap(unsigned long addr, size_t len); 16extern asmlinkage long sys64_munmap(unsigned long addr, size_t len);
20extern asmlinkage unsigned long sys64_mremap(unsigned long addr, 17extern asmlinkage unsigned long sys64_mremap(unsigned long addr,
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 17614251fb6d..9db058dd039e 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -55,7 +55,7 @@ sys_call_table32:
55/*170*/ .word sys32_lsetxattr, sys32_fsetxattr, sys_getxattr, sys_lgetxattr, compat_sys_getdents 55/*170*/ .word sys32_lsetxattr, sys32_fsetxattr, sys_getxattr, sys_lgetxattr, compat_sys_getdents
56 .word sys_setsid, sys_fchdir, sys32_fgetxattr, sys_listxattr, sys_llistxattr 56 .word sys_setsid, sys_fchdir, sys32_fgetxattr, sys_listxattr, sys_llistxattr
57/*180*/ .word sys32_flistxattr, sys_removexattr, sys_lremovexattr, compat_sys_sigpending, sys_ni_syscall 57/*180*/ .word sys32_flistxattr, sys_removexattr, sys_lremovexattr, compat_sys_sigpending, sys_ni_syscall
58 .word sys32_setpgid, sys32_fremovexattr, sys32_tkill, sys32_exit_group, sys_sparc64_newuname 58 .word sys32_setpgid, sys32_fremovexattr, sys32_tkill, sys32_exit_group, sys_newuname
59/*190*/ .word sys32_init_module, sys_sparc64_personality, sys_remap_file_pages, sys32_epoll_create, sys32_epoll_ctl 59/*190*/ .word sys32_init_module, sys_sparc64_personality, sys_remap_file_pages, sys32_epoll_create, sys32_epoll_ctl
60 .word sys32_epoll_wait, sys32_ioprio_set, sys_getppid, sys32_sigaction, sys_sgetmask 60 .word sys32_epoll_wait, sys32_ioprio_set, sys_getppid, sys32_sigaction, sys_sgetmask
61/*200*/ .word sys32_ssetmask, sys_sigsuspend, compat_sys_newlstat, sys_uselib, compat_sys_old_readdir 61/*200*/ .word sys32_ssetmask, sys_sigsuspend, compat_sys_newlstat, sys_uselib, compat_sys_old_readdir
@@ -130,13 +130,13 @@ sys_call_table:
130/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents 130/*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents
131 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr 131 .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr
132/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall 132/*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall
133 .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_sparc64_newuname 133 .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_newuname
134/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl 134/*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl
135 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask 135 .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask
136/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall 136/*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall
137 .word sys_readahead, sys_socketcall, sys_syslog, sys_lookup_dcookie, sys_fadvise64 137 .word sys_readahead, sys_socketcall, sys_syslog, sys_lookup_dcookie, sys_fadvise64
138/*210*/ .word sys_fadvise64_64, sys_tgkill, sys_waitpid, sys_swapoff, sys_sysinfo 138/*210*/ .word sys_fadvise64_64, sys_tgkill, sys_waitpid, sys_swapoff, sys_sysinfo
139 .word sys_ipc, sys_nis_syscall, sys_clone, sys_ioprio_get, sys_adjtimex 139 .word sys_sparc_ipc, sys_nis_syscall, sys_clone, sys_ioprio_get, sys_adjtimex
140/*220*/ .word sys_nis_syscall, sys_ni_syscall, sys_delete_module, sys_ni_syscall, sys_getpgid 140/*220*/ .word sys_nis_syscall, sys_ni_syscall, sys_delete_module, sys_ni_syscall, sys_getpgid
141 .word sys_bdflush, sys_sysfs, sys_nis_syscall, sys_setfsuid, sys_setfsgid 141 .word sys_bdflush, sys_sysfs, sys_nis_syscall, sys_setfsuid, sys_setfsgid
142/*230*/ .word sys_select, sys_nis_syscall, sys_splice, sys_stime, sys_statfs64 142/*230*/ .word sys_select, sys_nis_syscall, sys_splice, sys_stime, sys_statfs64
diff --git a/arch/um/include/asm/dma-mapping.h b/arch/um/include/asm/dma-mapping.h
index 378de4bbf49f..b948c14a7867 100644
--- a/arch/um/include/asm/dma-mapping.h
+++ b/arch/um/include/asm/dma-mapping.h
@@ -104,14 +104,6 @@ dma_get_cache_alignment(void)
104} 104}
105 105
106static inline void 106static inline void
107dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
108 unsigned long offset, size_t size,
109 enum dma_data_direction direction)
110{
111 BUG();
112}
113
114static inline void
115dma_cache_sync(struct device *dev, void *vaddr, size_t size, 107dma_cache_sync(struct device *dev, void *vaddr, size_t size,
116 enum dma_data_direction direction) 108 enum dma_data_direction direction)
117{ 109{
diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h
index 6c8899013c92..2cd899f75a3c 100644
--- a/arch/um/include/asm/ptrace-generic.h
+++ b/arch/um/include/asm/ptrace-generic.h
@@ -16,6 +16,8 @@ struct pt_regs {
16 struct uml_pt_regs regs; 16 struct uml_pt_regs regs;
17}; 17};
18 18
19#define arch_has_single_step() (1)
20
19#define EMPTY_REGS { .regs = EMPTY_UML_PT_REGS } 21#define EMPTY_REGS { .regs = EMPTY_UML_PT_REGS }
20 22
21#define PT_REGS_IP(r) UPT_IP(&(r)->regs) 23#define PT_REGS_IP(r) UPT_IP(&(r)->regs)
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 8e3d69e4fcb5..484509948ee9 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -12,16 +12,25 @@
12#endif 12#endif
13#include "skas_ptrace.h" 13#include "skas_ptrace.h"
14 14
15static inline void set_singlestepping(struct task_struct *child, int on) 15
16
17void user_enable_single_step(struct task_struct *child)
16{ 18{
17 if (on) 19 child->ptrace |= PT_DTRACE;
18 child->ptrace |= PT_DTRACE;
19 else
20 child->ptrace &= ~PT_DTRACE;
21 child->thread.singlestep_syscall = 0; 20 child->thread.singlestep_syscall = 0;
22 21
23#ifdef SUBARCH_SET_SINGLESTEPPING 22#ifdef SUBARCH_SET_SINGLESTEPPING
24 SUBARCH_SET_SINGLESTEPPING(child, on); 23 SUBARCH_SET_SINGLESTEPPING(child, 1);
24#endif
25}
26
27void user_disable_single_step(struct task_struct *child)
28{
29 child->ptrace &= ~PT_DTRACE;
30 child->thread.singlestep_syscall = 0;
31
32#ifdef SUBARCH_SET_SINGLESTEPPING
33 SUBARCH_SET_SINGLESTEPPING(child, 0);
25#endif 34#endif
26} 35}
27 36
@@ -30,7 +39,7 @@ static inline void set_singlestepping(struct task_struct *child, int on)
30 */ 39 */
31void ptrace_disable(struct task_struct *child) 40void ptrace_disable(struct task_struct *child)
32{ 41{
33 set_singlestepping(child,0); 42 user_disable_single_step(child);
34} 43}
35 44
36extern int peek_user(struct task_struct * child, long addr, long data); 45extern int peek_user(struct task_struct * child, long addr, long data);
@@ -69,53 +78,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
69 ret = -EIO; 78 ret = -EIO;
70 break; 79 break;
71 80
72 /* continue and stop at next (return from) syscall */
73 case PTRACE_SYSCALL:
74 /* restart after signal. */
75 case PTRACE_CONT: {
76 ret = -EIO;
77 if (!valid_signal(data))
78 break;
79
80 set_singlestepping(child, 0);
81 if (request == PTRACE_SYSCALL)
82 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
83 else clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
84 child->exit_code = data;
85 wake_up_process(child);
86 ret = 0;
87 break;
88 }
89
90/*
91 * make the child exit. Best I can do is send it a sigkill.
92 * perhaps it should be put in the status that it wants to
93 * exit.
94 */
95 case PTRACE_KILL: {
96 ret = 0;
97 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
98 break;
99
100 set_singlestepping(child, 0);
101 child->exit_code = SIGKILL;
102 wake_up_process(child);
103 break;
104 }
105
106 case PTRACE_SINGLESTEP: { /* set the trap flag. */
107 ret = -EIO;
108 if (!valid_signal(data))
109 break;
110 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
111 set_singlestepping(child, 1);
112 child->exit_code = data;
113 /* give it a chance to run. */
114 wake_up_process(child);
115 ret = 0;
116 break;
117 }
118
119#ifdef PTRACE_GETREGS 81#ifdef PTRACE_GETREGS
120 case PTRACE_GETREGS: { /* Get all gp regs from the child. */ 82 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
121 if (!access_ok(VERIFY_WRITE, p, MAX_REG_OFFSET)) { 83 if (!access_ok(VERIFY_WRITE, p, MAX_REG_OFFSET)) {
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
index cccab850c27e..4393173923f5 100644
--- a/arch/um/kernel/syscall.c
+++ b/arch/um/kernel/syscall.c
@@ -51,51 +51,6 @@ long old_mmap(unsigned long addr, unsigned long len,
51 return err; 51 return err;
52} 52}
53 53
54long sys_uname(struct old_utsname __user * name)
55{
56 long err;
57 if (!name)
58 return -EFAULT;
59 down_read(&uts_sem);
60 err = copy_to_user(name, utsname(), sizeof (*name));
61 up_read(&uts_sem);
62 return err?-EFAULT:0;
63}
64
65long sys_olduname(struct oldold_utsname __user * name)
66{
67 long error;
68
69 if (!name)
70 return -EFAULT;
71 if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
72 return -EFAULT;
73
74 down_read(&uts_sem);
75
76 error = __copy_to_user(&name->sysname, &utsname()->sysname,
77 __OLD_UTS_LEN);
78 error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
79 error |= __copy_to_user(&name->nodename, &utsname()->nodename,
80 __OLD_UTS_LEN);
81 error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
82 error |= __copy_to_user(&name->release, &utsname()->release,
83 __OLD_UTS_LEN);
84 error |= __put_user(0, name->release + __OLD_UTS_LEN);
85 error |= __copy_to_user(&name->version, &utsname()->version,
86 __OLD_UTS_LEN);
87 error |= __put_user(0, name->version + __OLD_UTS_LEN);
88 error |= __copy_to_user(&name->machine, &utsname()->machine,
89 __OLD_UTS_LEN);
90 error |= __put_user(0, name->machine + __OLD_UTS_LEN);
91
92 up_read(&uts_sem);
93
94 error = error ? -EFAULT : 0;
95
96 return error;
97}
98
99int kernel_execve(const char *filename, char *const argv[], char *const envp[]) 54int kernel_execve(const char *filename, char *const argv[], char *const envp[])
100{ 55{
101 mm_segment_t fs; 56 mm_segment_t fs;
diff --git a/arch/um/sys-i386/shared/sysdep/syscalls.h b/arch/um/sys-i386/shared/sysdep/syscalls.h
index e7787679e317..05cb796aecb5 100644
--- a/arch/um/sys-i386/shared/sysdep/syscalls.h
+++ b/arch/um/sys-i386/shared/sysdep/syscalls.h
@@ -13,8 +13,6 @@ typedef long syscall_handler_t(struct pt_regs);
13 */ 13 */
14extern syscall_handler_t sys_rt_sigaction; 14extern syscall_handler_t sys_rt_sigaction;
15 15
16extern syscall_handler_t old_mmap_i386;
17
18extern syscall_handler_t *sys_call_table[]; 16extern syscall_handler_t *sys_call_table[];
19 17
20#define EXECUTE_SYSCALL(syscall, regs) \ 18#define EXECUTE_SYSCALL(syscall, regs) \
diff --git a/arch/um/sys-i386/sys_call_table.S b/arch/um/sys-i386/sys_call_table.S
index c6260dd6ebb9..de274071455d 100644
--- a/arch/um/sys-i386/sys_call_table.S
+++ b/arch/um/sys-i386/sys_call_table.S
@@ -7,7 +7,7 @@
7#define sys_vm86old sys_ni_syscall 7#define sys_vm86old sys_ni_syscall
8#define sys_vm86 sys_ni_syscall 8#define sys_vm86 sys_ni_syscall
9 9
10#define old_mmap old_mmap_i386 10#define old_mmap sys_old_mmap
11 11
12#define ptregs_fork sys_fork 12#define ptregs_fork sys_fork
13#define ptregs_execve sys_execve 13#define ptregs_execve sys_execve
diff --git a/arch/um/sys-i386/syscalls.c b/arch/um/sys-i386/syscalls.c
index 857ca0b3bdef..70ca357393b8 100644
--- a/arch/um/sys-i386/syscalls.c
+++ b/arch/um/sys-i386/syscalls.c
@@ -12,57 +12,6 @@
12#include "asm/unistd.h" 12#include "asm/unistd.h"
13 13
14/* 14/*
15 * Perform the select(nd, in, out, ex, tv) and mmap() system
16 * calls. Linux/i386 didn't use to be able to handle more than
17 * 4 system call parameters, so these system calls used a memory
18 * block for parameter passing..
19 */
20
21struct mmap_arg_struct {
22 unsigned long addr;
23 unsigned long len;
24 unsigned long prot;
25 unsigned long flags;
26 unsigned long fd;
27 unsigned long offset;
28};
29
30extern int old_mmap(unsigned long addr, unsigned long len,
31 unsigned long prot, unsigned long flags,
32 unsigned long fd, unsigned long offset);
33
34long old_mmap_i386(struct mmap_arg_struct __user *arg)
35{
36 struct mmap_arg_struct a;
37 int err = -EFAULT;
38
39 if (copy_from_user(&a, arg, sizeof(a)))
40 goto out;
41
42 err = old_mmap(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
43 out:
44 return err;
45}
46
47struct sel_arg_struct {
48 unsigned long n;
49 fd_set __user *inp;
50 fd_set __user *outp;
51 fd_set __user *exp;
52 struct timeval __user *tvp;
53};
54
55long old_select(struct sel_arg_struct __user *arg)
56{
57 struct sel_arg_struct a;
58
59 if (copy_from_user(&a, arg, sizeof(a)))
60 return -EFAULT;
61 /* sys_select() does the appropriate kernel locking */
62 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
63}
64
65/*
66 * The prototype on i386 is: 15 * The prototype on i386 is:
67 * 16 *
68 * int clone(int flags, void * child_stack, int * parent_tidptr, struct user_desc * newtls, int * child_tidptr) 17 * int clone(int flags, void * child_stack, int * parent_tidptr, struct user_desc * newtls, int * child_tidptr)
@@ -85,92 +34,6 @@ long sys_clone(unsigned long clone_flags, unsigned long newsp,
85 return ret; 34 return ret;
86} 35}
87 36
88/*
89 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
90 *
91 * This is really horribly ugly.
92 */
93long sys_ipc (uint call, int first, int second,
94 int third, void __user *ptr, long fifth)
95{
96 int version, ret;
97
98 version = call >> 16; /* hack for backward compatibility */
99 call &= 0xffff;
100
101 switch (call) {
102 case SEMOP:
103 return sys_semtimedop(first, (struct sembuf __user *) ptr,
104 second, NULL);
105 case SEMTIMEDOP:
106 return sys_semtimedop(first, (struct sembuf __user *) ptr,
107 second,
108 (const struct timespec __user *) fifth);
109 case SEMGET:
110 return sys_semget (first, second, third);
111 case SEMCTL: {
112 union semun fourth;
113 if (!ptr)
114 return -EINVAL;
115 if (get_user(fourth.__pad, (void __user * __user *) ptr))
116 return -EFAULT;
117 return sys_semctl (first, second, third, fourth);
118 }
119
120 case MSGSND:
121 return sys_msgsnd (first, (struct msgbuf *) ptr,
122 second, third);
123 case MSGRCV:
124 switch (version) {
125 case 0: {
126 struct ipc_kludge tmp;
127 if (!ptr)
128 return -EINVAL;
129
130 if (copy_from_user(&tmp,
131 (struct ipc_kludge *) ptr,
132 sizeof (tmp)))
133 return -EFAULT;
134 return sys_msgrcv (first, tmp.msgp, second,
135 tmp.msgtyp, third);
136 }
137 default:
138 panic("msgrcv with version != 0");
139 return sys_msgrcv (first,
140 (struct msgbuf *) ptr,
141 second, fifth, third);
142 }
143 case MSGGET:
144 return sys_msgget ((key_t) first, second);
145 case MSGCTL:
146 return sys_msgctl (first, second, (struct msqid_ds *) ptr);
147
148 case SHMAT:
149 switch (version) {
150 default: {
151 ulong raddr;
152 ret = do_shmat (first, (char *) ptr, second, &raddr);
153 if (ret)
154 return ret;
155 return put_user (raddr, (ulong *) third);
156 }
157 case 1: /* iBCS2 emulator entry point */
158 if (!segment_eq(get_fs(), get_ds()))
159 return -EINVAL;
160 return do_shmat (first, (char *) ptr, second, (ulong *) third);
161 }
162 case SHMDT:
163 return sys_shmdt ((char *)ptr);
164 case SHMGET:
165 return sys_shmget (first, second, third);
166 case SHMCTL:
167 return sys_shmctl (first, second,
168 (struct shmid_ds *) ptr);
169 default:
170 return -ENOSYS;
171 }
172}
173
174long sys_sigaction(int sig, const struct old_sigaction __user *act, 37long sys_sigaction(int sig, const struct old_sigaction __user *act,
175 struct old_sigaction __user *oact) 38 struct old_sigaction __user *oact)
176{ 39{
diff --git a/arch/um/sys-x86_64/syscall_table.c b/arch/um/sys-x86_64/syscall_table.c
index dd21d69715e6..47d469e7e7ce 100644
--- a/arch/um/sys-x86_64/syscall_table.c
+++ b/arch/um/sys-x86_64/syscall_table.c
@@ -26,11 +26,6 @@
26 26
27/* On UML we call it this way ("old" means it's not mmap2) */ 27/* On UML we call it this way ("old" means it's not mmap2) */
28#define sys_mmap old_mmap 28#define sys_mmap old_mmap
29/*
30 * On x86-64 sys_uname is actually sys_newuname plus a compatibility trick.
31 * See arch/x86_64/kernel/sys_x86_64.c
32 */
33#define sys_uname sys_uname64
34 29
35#define stub_clone sys_clone 30#define stub_clone sys_clone
36#define stub_fork sys_fork 31#define stub_fork sys_fork
diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c
index f1199fd34d38..f3d82bb6e15a 100644
--- a/arch/um/sys-x86_64/syscalls.c
+++ b/arch/um/sys-x86_64/syscalls.c
@@ -12,20 +12,6 @@
12#include "asm/uaccess.h" 12#include "asm/uaccess.h"
13#include "os.h" 13#include "os.h"
14 14
15asmlinkage long sys_uname64(struct new_utsname __user * name)
16{
17 int err;
18
19 down_read(&uts_sem);
20 err = copy_to_user(name, utsname(), sizeof (*name));
21 up_read(&uts_sem);
22
23 if (personality(current->personality) == PER_LINUX32)
24 err |= copy_to_user(&name->machine, "i686", 5);
25
26 return err ? -EFAULT : 0;
27}
28
29long arch_prctl(struct task_struct *task, int code, unsigned long __user *addr) 15long arch_prctl(struct task_struct *task, int code, unsigned long __user *addr)
30{ 16{
31 unsigned long *ptr = addr, tmp; 17 unsigned long *ptr = addr, tmp;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e98440371525..0eacb1ffb421 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -102,6 +102,9 @@ config ZONE_DMA
102config SBUS 102config SBUS
103 bool 103 bool
104 104
105config NEED_DMA_MAP_STATE
106 def_bool (X86_64 || DMAR || DMA_API_DEBUG)
107
105config GENERIC_ISA_DMA 108config GENERIC_ISA_DMA
106 def_bool y 109 def_bool y
107 110
@@ -659,7 +662,7 @@ config GART_IOMMU
659 bool "GART IOMMU support" if EMBEDDED 662 bool "GART IOMMU support" if EMBEDDED
660 default y 663 default y
661 select SWIOTLB 664 select SWIOTLB
662 depends on X86_64 && PCI 665 depends on X86_64 && PCI && K8_NB
663 ---help--- 666 ---help---
664 Support for full DMA access of devices with 32bit memory access only 667 Support for full DMA access of devices with 32bit memory access only
665 on systems with more than 3GB. This is usually needed for USB, 668 on systems with more than 3GB. This is usually needed for USB,
@@ -2058,7 +2061,7 @@ endif # X86_32
2058 2061
2059config K8_NB 2062config K8_NB
2060 def_bool y 2063 def_bool y
2061 depends on AGP_AMD64 || (X86_64 && (GART_IOMMU || (PCI && NUMA))) 2064 depends on CPU_SUP_AMD && PCI
2062 2065
2063source "drivers/pcmcia/Kconfig" 2066source "drivers/pcmcia/Kconfig"
2064 2067
diff --git a/arch/x86/crypto/twofish-i586-asm_32.S b/arch/x86/crypto/twofish-i586-asm_32.S
index 39b98ed2c1b9..575331cb2a8a 100644
--- a/arch/x86/crypto/twofish-i586-asm_32.S
+++ b/arch/x86/crypto/twofish-i586-asm_32.S
@@ -22,7 +22,7 @@
22 22
23#include <asm/asm-offsets.h> 23#include <asm/asm-offsets.h>
24 24
25/* return adress at 0 */ 25/* return address at 0 */
26 26
27#define in_blk 12 /* input byte array address parameter*/ 27#define in_blk 12 /* input byte array address parameter*/
28#define out_blk 8 /* output byte array address parameter*/ 28#define out_blk 8 /* output byte array address parameter*/
@@ -230,8 +230,8 @@ twofish_enc_blk:
230 push %edi 230 push %edi
231 231
232 mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */ 232 mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */
233 add $crypto_tfm_ctx_offset, %ebp /* ctx adress */ 233 add $crypto_tfm_ctx_offset, %ebp /* ctx address */
234 mov in_blk+16(%esp),%edi /* input adress in edi */ 234 mov in_blk+16(%esp),%edi /* input address in edi */
235 235
236 mov (%edi), %eax 236 mov (%edi), %eax
237 mov b_offset(%edi), %ebx 237 mov b_offset(%edi), %ebx
@@ -286,8 +286,8 @@ twofish_dec_blk:
286 286
287 287
288 mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */ 288 mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */
289 add $crypto_tfm_ctx_offset, %ebp /* ctx adress */ 289 add $crypto_tfm_ctx_offset, %ebp /* ctx address */
290 mov in_blk+16(%esp),%edi /* input adress in edi */ 290 mov in_blk+16(%esp),%edi /* input address in edi */
291 291
292 mov (%edi), %eax 292 mov (%edi), %eax
293 mov b_offset(%edi), %ebx 293 mov b_offset(%edi), %ebx
diff --git a/arch/x86/crypto/twofish-x86_64-asm_64.S b/arch/x86/crypto/twofish-x86_64-asm_64.S
index 35974a586615..573aa102542e 100644
--- a/arch/x86/crypto/twofish-x86_64-asm_64.S
+++ b/arch/x86/crypto/twofish-x86_64-asm_64.S
@@ -221,11 +221,11 @@
221twofish_enc_blk: 221twofish_enc_blk:
222 pushq R1 222 pushq R1
223 223
224 /* %rdi contains the crypto tfm adress */ 224 /* %rdi contains the crypto tfm address */
225 /* %rsi contains the output adress */ 225 /* %rsi contains the output address */
226 /* %rdx contains the input adress */ 226 /* %rdx contains the input address */
227 add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */ 227 add $crypto_tfm_ctx_offset, %rdi /* set ctx address */
228 /* ctx adress is moved to free one non-rex register 228 /* ctx address is moved to free one non-rex register
229 as target for the 8bit high operations */ 229 as target for the 8bit high operations */
230 mov %rdi, %r11 230 mov %rdi, %r11
231 231
@@ -274,11 +274,11 @@ twofish_enc_blk:
274twofish_dec_blk: 274twofish_dec_blk:
275 pushq R1 275 pushq R1
276 276
277 /* %rdi contains the crypto tfm adress */ 277 /* %rdi contains the crypto tfm address */
278 /* %rsi contains the output adress */ 278 /* %rsi contains the output address */
279 /* %rdx contains the input adress */ 279 /* %rdx contains the input address */
280 add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */ 280 add $crypto_tfm_ctx_offset, %rdi /* set ctx address */
281 /* ctx adress is moved to free one non-rex register 281 /* ctx address is moved to free one non-rex register
282 as target for the 8bit high operations */ 282 as target for the 8bit high operations */
283 mov %rdi, %r11 283 mov %rdi, %r11
284 284
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 53147ad85b96..59b4556a5b92 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -563,7 +563,7 @@ ia32_sys_call_table:
563 .quad quiet_ni_syscall /* old mpx syscall holder */ 563 .quad quiet_ni_syscall /* old mpx syscall holder */
564 .quad sys_setpgid 564 .quad sys_setpgid
565 .quad quiet_ni_syscall /* old ulimit syscall holder */ 565 .quad quiet_ni_syscall /* old ulimit syscall holder */
566 .quad sys32_olduname 566 .quad sys_olduname
567 .quad sys_umask /* 60 */ 567 .quad sys_umask /* 60 */
568 .quad sys_chroot 568 .quad sys_chroot
569 .quad compat_sys_ustat 569 .quad compat_sys_ustat
@@ -586,7 +586,7 @@ ia32_sys_call_table:
586 .quad compat_sys_settimeofday 586 .quad compat_sys_settimeofday
587 .quad sys_getgroups16 /* 80 */ 587 .quad sys_getgroups16 /* 80 */
588 .quad sys_setgroups16 588 .quad sys_setgroups16
589 .quad sys32_old_select 589 .quad compat_sys_old_select
590 .quad sys_symlink 590 .quad sys_symlink
591 .quad sys_lstat 591 .quad sys_lstat
592 .quad sys_readlink /* 85 */ 592 .quad sys_readlink /* 85 */
@@ -613,7 +613,7 @@ ia32_sys_call_table:
613 .quad compat_sys_newstat 613 .quad compat_sys_newstat
614 .quad compat_sys_newlstat 614 .quad compat_sys_newlstat
615 .quad compat_sys_newfstat 615 .quad compat_sys_newfstat
616 .quad sys32_uname 616 .quad sys_uname
617 .quad stub32_iopl /* 110 */ 617 .quad stub32_iopl /* 110 */
618 .quad sys_vhangup 618 .quad sys_vhangup
619 .quad quiet_ni_syscall /* old "idle" system call */ 619 .quad quiet_ni_syscall /* old "idle" system call */
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index 422572c77923..74c35431b7d8 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -143,7 +143,7 @@ asmlinkage long sys32_fstatat(unsigned int dfd, char __user *filename,
143 * block for parameter passing.. 143 * block for parameter passing..
144 */ 144 */
145 145
146struct mmap_arg_struct { 146struct mmap_arg_struct32 {
147 unsigned int addr; 147 unsigned int addr;
148 unsigned int len; 148 unsigned int len;
149 unsigned int prot; 149 unsigned int prot;
@@ -152,9 +152,9 @@ struct mmap_arg_struct {
152 unsigned int offset; 152 unsigned int offset;
153}; 153};
154 154
155asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg) 155asmlinkage long sys32_mmap(struct mmap_arg_struct32 __user *arg)
156{ 156{
157 struct mmap_arg_struct a; 157 struct mmap_arg_struct32 a;
158 158
159 if (copy_from_user(&a, arg, sizeof(a))) 159 if (copy_from_user(&a, arg, sizeof(a)))
160 return -EFAULT; 160 return -EFAULT;
@@ -332,24 +332,6 @@ asmlinkage long sys32_alarm(unsigned int seconds)
332 return alarm_setitimer(seconds); 332 return alarm_setitimer(seconds);
333} 333}
334 334
335struct sel_arg_struct {
336 unsigned int n;
337 unsigned int inp;
338 unsigned int outp;
339 unsigned int exp;
340 unsigned int tvp;
341};
342
343asmlinkage long sys32_old_select(struct sel_arg_struct __user *arg)
344{
345 struct sel_arg_struct a;
346
347 if (copy_from_user(&a, arg, sizeof(a)))
348 return -EFAULT;
349 return compat_sys_select(a.n, compat_ptr(a.inp), compat_ptr(a.outp),
350 compat_ptr(a.exp), compat_ptr(a.tvp));
351}
352
353asmlinkage long sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, 335asmlinkage long sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr,
354 int options) 336 int options)
355{ 337{
@@ -466,58 +448,6 @@ asmlinkage long sys32_sendfile(int out_fd, int in_fd,
466 return ret; 448 return ret;
467} 449}
468 450
469asmlinkage long sys32_olduname(struct oldold_utsname __user *name)
470{
471 char *arch = "x86_64";
472 int err;
473
474 if (!name)
475 return -EFAULT;
476 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
477 return -EFAULT;
478
479 down_read(&uts_sem);
480
481 err = __copy_to_user(&name->sysname, &utsname()->sysname,
482 __OLD_UTS_LEN);
483 err |= __put_user(0, name->sysname+__OLD_UTS_LEN);
484 err |= __copy_to_user(&name->nodename, &utsname()->nodename,
485 __OLD_UTS_LEN);
486 err |= __put_user(0, name->nodename+__OLD_UTS_LEN);
487 err |= __copy_to_user(&name->release, &utsname()->release,
488 __OLD_UTS_LEN);
489 err |= __put_user(0, name->release+__OLD_UTS_LEN);
490 err |= __copy_to_user(&name->version, &utsname()->version,
491 __OLD_UTS_LEN);
492 err |= __put_user(0, name->version+__OLD_UTS_LEN);
493
494 if (personality(current->personality) == PER_LINUX32)
495 arch = "i686";
496
497 err |= __copy_to_user(&name->machine, arch, strlen(arch) + 1);
498
499 up_read(&uts_sem);
500
501 err = err ? -EFAULT : 0;
502
503 return err;
504}
505
506long sys32_uname(struct old_utsname __user *name)
507{
508 int err;
509
510 if (!name)
511 return -EFAULT;
512 down_read(&uts_sem);
513 err = copy_to_user(name, utsname(), sizeof(*name));
514 up_read(&uts_sem);
515 if (personality(current->personality) == PER_LINUX32)
516 err |= copy_to_user(&name->machine, "i686", 5);
517
518 return err ? -EFAULT : 0;
519}
520
521asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv, 451asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv,
522 compat_uptr_t __user *envp, struct pt_regs *regs) 452 compat_uptr_t __user *envp, struct pt_regs *regs)
523{ 453{
diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h
index 9a9c7bdc923d..306160e58b48 100644
--- a/arch/x86/include/asm/compat.h
+++ b/arch/x86/include/asm/compat.h
@@ -8,7 +8,8 @@
8#include <linux/sched.h> 8#include <linux/sched.h>
9#include <asm/user32.h> 9#include <asm/user32.h>
10 10
11#define COMPAT_USER_HZ 100 11#define COMPAT_USER_HZ 100
12#define COMPAT_UTS_MACHINE "i686\0\0"
12 13
13typedef u32 compat_size_t; 14typedef u32 compat_size_t;
14typedef s32 compat_ssize_t; 15typedef s32 compat_ssize_t;
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 0675a7c4c20e..2a1bd8f4f23a 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -10,7 +10,6 @@
10 * (display/resolving) 10 * (display/resolving)
11 */ 11 */
12struct arch_hw_breakpoint { 12struct arch_hw_breakpoint {
13 char *name; /* Contains name of the symbol to set bkpt */
14 unsigned long address; 13 unsigned long address;
15 u8 len; 14 u8 len;
16 u8 type; 15 u8 type;
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 3e002ca5a287..404a880ea325 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -97,34 +97,6 @@ extern void pci_iommu_alloc(void);
97 97
98#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) 98#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
99 99
100#if defined(CONFIG_X86_64) || defined(CONFIG_DMAR) || defined(CONFIG_DMA_API_DEBUG)
101
102#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
103 dma_addr_t ADDR_NAME;
104#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
105 __u32 LEN_NAME;
106#define pci_unmap_addr(PTR, ADDR_NAME) \
107 ((PTR)->ADDR_NAME)
108#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
109 (((PTR)->ADDR_NAME) = (VAL))
110#define pci_unmap_len(PTR, LEN_NAME) \
111 ((PTR)->LEN_NAME)
112#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
113 (((PTR)->LEN_NAME) = (VAL))
114
115#else
116
117#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME[0];
118#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) unsigned LEN_NAME[0];
119#define pci_unmap_addr(PTR, ADDR_NAME) sizeof((PTR)->ADDR_NAME)
120#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
121 do { break; } while (pci_unmap_addr(PTR, ADDR_NAME))
122#define pci_unmap_len(PTR, LEN_NAME) sizeof((PTR)->LEN_NAME)
123#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
124 do { break; } while (pci_unmap_len(PTR, LEN_NAME))
125
126#endif
127
128#endif /* __KERNEL__ */ 100#endif /* __KERNEL__ */
129 101
130#ifdef CONFIG_X86_64 102#ifdef CONFIG_X86_64
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index befd172c82ad..db6109a885a7 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -18,7 +18,7 @@
18#define MSR_ARCH_PERFMON_EVENTSEL0 0x186 18#define MSR_ARCH_PERFMON_EVENTSEL0 0x186
19#define MSR_ARCH_PERFMON_EVENTSEL1 0x187 19#define MSR_ARCH_PERFMON_EVENTSEL1 0x187
20 20
21#define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22) 21#define ARCH_PERFMON_EVENTSEL_ENABLE (1 << 22)
22#define ARCH_PERFMON_EVENTSEL_ANY (1 << 21) 22#define ARCH_PERFMON_EVENTSEL_ANY (1 << 21)
23#define ARCH_PERFMON_EVENTSEL_INT (1 << 20) 23#define ARCH_PERFMON_EVENTSEL_INT (1 << 20)
24#define ARCH_PERFMON_EVENTSEL_OS (1 << 17) 24#define ARCH_PERFMON_EVENTSEL_OS (1 << 17)
@@ -50,7 +50,7 @@
50 INTEL_ARCH_INV_MASK| \ 50 INTEL_ARCH_INV_MASK| \
51 INTEL_ARCH_EDGE_MASK|\ 51 INTEL_ARCH_EDGE_MASK|\
52 INTEL_ARCH_UNIT_MASK|\ 52 INTEL_ARCH_UNIT_MASK|\
53 INTEL_ARCH_EVTSEL_MASK) 53 INTEL_ARCH_EVENT_MASK)
54 54
55#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c 55#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c
56#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8) 56#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
@@ -117,6 +117,18 @@ union cpuid10_edx {
117 */ 117 */
118#define X86_PMC_IDX_FIXED_BTS (X86_PMC_IDX_FIXED + 16) 118#define X86_PMC_IDX_FIXED_BTS (X86_PMC_IDX_FIXED + 16)
119 119
120/* IbsFetchCtl bits/masks */
121#define IBS_FETCH_RAND_EN (1ULL<<57)
122#define IBS_FETCH_VAL (1ULL<<49)
123#define IBS_FETCH_ENABLE (1ULL<<48)
124#define IBS_FETCH_CNT 0xFFFF0000ULL
125#define IBS_FETCH_MAX_CNT 0x0000FFFFULL
126
127/* IbsOpCtl bits */
128#define IBS_OP_CNT_CTL (1ULL<<19)
129#define IBS_OP_VAL (1ULL<<18)
130#define IBS_OP_ENABLE (1ULL<<17)
131#define IBS_OP_MAX_CNT 0x0000FFFFULL
120 132
121#ifdef CONFIG_PERF_EVENTS 133#ifdef CONFIG_PERF_EVENTS
122extern void init_hw_perf_events(void); 134extern void init_hw_perf_events(void);
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 20102808b191..69a686a7dff0 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -274,14 +274,7 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
274 return 0; 274 return 0;
275} 275}
276 276
277/*
278 * These are defined as per linux/ptrace.h, which see.
279 */
280#define arch_has_single_step() (1) 277#define arch_has_single_step() (1)
281extern void user_enable_single_step(struct task_struct *);
282extern void user_disable_single_step(struct task_struct *);
283
284extern void user_enable_block_step(struct task_struct *);
285#ifdef CONFIG_X86_DEBUGCTLMSR 278#ifdef CONFIG_X86_DEBUGCTLMSR
286#define arch_has_block_step() (1) 279#define arch_has_block_step() (1)
287#else 280#else
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index d5f69045c100..3ad421784ae7 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -26,8 +26,8 @@ asmlinkage long sys32_lstat64(char __user *, struct stat64 __user *);
26asmlinkage long sys32_fstat64(unsigned int, struct stat64 __user *); 26asmlinkage long sys32_fstat64(unsigned int, struct stat64 __user *);
27asmlinkage long sys32_fstatat(unsigned int, char __user *, 27asmlinkage long sys32_fstatat(unsigned int, char __user *,
28 struct stat64 __user *, int); 28 struct stat64 __user *, int);
29struct mmap_arg_struct; 29struct mmap_arg_struct32;
30asmlinkage long sys32_mmap(struct mmap_arg_struct __user *); 30asmlinkage long sys32_mmap(struct mmap_arg_struct32 __user *);
31asmlinkage long sys32_mprotect(unsigned long, size_t, unsigned long); 31asmlinkage long sys32_mprotect(unsigned long, size_t, unsigned long);
32 32
33struct sigaction32; 33struct sigaction32;
@@ -40,8 +40,6 @@ asmlinkage long sys32_rt_sigprocmask(int, compat_sigset_t __user *,
40 compat_sigset_t __user *, unsigned int); 40 compat_sigset_t __user *, unsigned int);
41asmlinkage long sys32_alarm(unsigned int); 41asmlinkage long sys32_alarm(unsigned int);
42 42
43struct sel_arg_struct;
44asmlinkage long sys32_old_select(struct sel_arg_struct __user *);
45asmlinkage long sys32_waitpid(compat_pid_t, unsigned int *, int); 43asmlinkage long sys32_waitpid(compat_pid_t, unsigned int *, int);
46asmlinkage long sys32_sysfs(int, u32, u32); 44asmlinkage long sys32_sysfs(int, u32, u32);
47 45
@@ -56,11 +54,6 @@ asmlinkage long sys32_pwrite(unsigned int, char __user *, u32, u32, u32);
56asmlinkage long sys32_personality(unsigned long); 54asmlinkage long sys32_personality(unsigned long);
57asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32); 55asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
58 56
59struct oldold_utsname;
60struct old_utsname;
61asmlinkage long sys32_olduname(struct oldold_utsname __user *);
62long sys32_uname(struct old_utsname __user *);
63
64asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *, 57asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *,
65 compat_uptr_t __user *, struct pt_regs *); 58 compat_uptr_t __user *, struct pt_regs *);
66asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *); 59asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 8868b9420b0e..5c044b43e9a7 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -50,18 +50,6 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
50 struct old_sigaction __user *); 50 struct old_sigaction __user *);
51unsigned long sys_sigreturn(struct pt_regs *); 51unsigned long sys_sigreturn(struct pt_regs *);
52 52
53/* kernel/sys_i386_32.c */
54struct mmap_arg_struct;
55struct sel_arg_struct;
56struct oldold_utsname;
57struct old_utsname;
58
59asmlinkage int old_mmap(struct mmap_arg_struct __user *);
60asmlinkage int old_select(struct sel_arg_struct __user *);
61asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
62asmlinkage int sys_uname(struct old_utsname __user *);
63asmlinkage int sys_olduname(struct oldold_utsname __user *);
64
65/* kernel/vm86_32.c */ 53/* kernel/vm86_32.c */
66int sys_vm86old(struct vm86_struct __user *, struct pt_regs *); 54int sys_vm86old(struct vm86_struct __user *, struct pt_regs *);
67int sys_vm86(unsigned long, unsigned long, struct pt_regs *); 55int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
@@ -73,11 +61,8 @@ int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
73long sys_arch_prctl(int, unsigned long); 61long sys_arch_prctl(int, unsigned long);
74 62
75/* kernel/sys_x86_64.c */ 63/* kernel/sys_x86_64.c */
76struct new_utsname;
77
78asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long, 64asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
79 unsigned long, unsigned long, unsigned long); 65 unsigned long, unsigned long, unsigned long);
80asmlinkage long sys_uname(struct new_utsname __user *);
81 66
82#endif /* CONFIG_X86_32 */ 67#endif /* CONFIG_X86_32 */
83#endif /* _ASM_X86_SYSCALLS_H */ 68#endif /* _ASM_X86_SYSCALLS_H */
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index 3baf379fa840..beb9b5f8f8a4 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -354,6 +354,7 @@
354#define __ARCH_WANT_STAT64 354#define __ARCH_WANT_STAT64
355#define __ARCH_WANT_SYS_ALARM 355#define __ARCH_WANT_SYS_ALARM
356#define __ARCH_WANT_SYS_GETHOSTNAME 356#define __ARCH_WANT_SYS_GETHOSTNAME
357#define __ARCH_WANT_SYS_IPC
357#define __ARCH_WANT_SYS_PAUSE 358#define __ARCH_WANT_SYS_PAUSE
358#define __ARCH_WANT_SYS_SGETMASK 359#define __ARCH_WANT_SYS_SGETMASK
359#define __ARCH_WANT_SYS_SIGNAL 360#define __ARCH_WANT_SYS_SIGNAL
@@ -366,6 +367,9 @@
366#define __ARCH_WANT_SYS_LLSEEK 367#define __ARCH_WANT_SYS_LLSEEK
367#define __ARCH_WANT_SYS_NICE 368#define __ARCH_WANT_SYS_NICE
368#define __ARCH_WANT_SYS_OLD_GETRLIMIT 369#define __ARCH_WANT_SYS_OLD_GETRLIMIT
370#define __ARCH_WANT_SYS_OLD_UNAME
371#define __ARCH_WANT_SYS_OLD_MMAP
372#define __ARCH_WANT_SYS_OLD_SELECT
369#define __ARCH_WANT_SYS_OLDUMOUNT 373#define __ARCH_WANT_SYS_OLDUMOUNT
370#define __ARCH_WANT_SYS_SIGPENDING 374#define __ARCH_WANT_SYS_SIGPENDING
371#define __ARCH_WANT_SYS_SIGPROCMASK 375#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
index 4843f7ba754a..ff4307b0e81e 100644
--- a/arch/x86/include/asm/unistd_64.h
+++ b/arch/x86/include/asm/unistd_64.h
@@ -146,7 +146,7 @@ __SYSCALL(__NR_wait4, sys_wait4)
146#define __NR_kill 62 146#define __NR_kill 62
147__SYSCALL(__NR_kill, sys_kill) 147__SYSCALL(__NR_kill, sys_kill)
148#define __NR_uname 63 148#define __NR_uname 63
149__SYSCALL(__NR_uname, sys_uname) 149__SYSCALL(__NR_uname, sys_newuname)
150 150
151#define __NR_semget 64 151#define __NR_semget 64
152__SYSCALL(__NR_semget, sys_semget) 152__SYSCALL(__NR_semget, sys_semget)
@@ -680,6 +680,7 @@ __SYSCALL(__NR_recvmmsg, sys_recvmmsg)
680#define __ARCH_WANT_SYS_LLSEEK 680#define __ARCH_WANT_SYS_LLSEEK
681#define __ARCH_WANT_SYS_NICE 681#define __ARCH_WANT_SYS_NICE
682#define __ARCH_WANT_SYS_OLD_GETRLIMIT 682#define __ARCH_WANT_SYS_OLD_GETRLIMIT
683#define __ARCH_WANT_SYS_OLD_UNAME
683#define __ARCH_WANT_SYS_OLDUMOUNT 684#define __ARCH_WANT_SYS_OLDUMOUNT
684#define __ARCH_WANT_SYS_SIGPENDING 685#define __ARCH_WANT_SYS_SIGPENDING
685#define __ARCH_WANT_SYS_SIGPROCMASK 686#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index a54d714545ff..0061ea263061 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -490,6 +490,7 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
490 * ACPI based hotplug support for CPU 490 * ACPI based hotplug support for CPU
491 */ 491 */
492#ifdef CONFIG_ACPI_HOTPLUG_CPU 492#ifdef CONFIG_ACPI_HOTPLUG_CPU
493#include <acpi/processor.h>
493 494
494static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) 495static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
495{ 496{
@@ -567,6 +568,8 @@ static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
567 goto free_new_map; 568 goto free_new_map;
568 } 569 }
569 570
571 acpi_processor_set_pdc(handle);
572
570 cpu = cpumask_first(new_map); 573 cpu = cpumask_first(new_map);
571 acpi_map_cpu2node(handle, cpu, physid); 574 acpi_map_cpu2node(handle, cpu, physid);
572 575
@@ -1293,23 +1296,6 @@ static int __init dmi_disable_acpi(const struct dmi_system_id *d)
1293} 1296}
1294 1297
1295/* 1298/*
1296 * Limit ACPI to CPU enumeration for HT
1297 */
1298static int __init force_acpi_ht(const struct dmi_system_id *d)
1299{
1300 if (!acpi_force) {
1301 printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
1302 d->ident);
1303 disable_acpi();
1304 acpi_ht = 1;
1305 } else {
1306 printk(KERN_NOTICE
1307 "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
1308 }
1309 return 0;
1310}
1311
1312/*
1313 * Force ignoring BIOS IRQ0 pin2 override 1299 * Force ignoring BIOS IRQ0 pin2 override
1314 */ 1300 */
1315static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) 1301static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
@@ -1345,82 +1331,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
1345 }, 1331 },
1346 1332
1347 /* 1333 /*
1348 * Boxes that need acpi=ht
1349 */
1350 {
1351 .callback = force_acpi_ht,
1352 .ident = "FSC Primergy T850",
1353 .matches = {
1354 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1355 DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
1356 },
1357 },
1358 {
1359 .callback = force_acpi_ht,
1360 .ident = "HP VISUALIZE NT Workstation",
1361 .matches = {
1362 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
1363 DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
1364 },
1365 },
1366 {
1367 .callback = force_acpi_ht,
1368 .ident = "Compaq Workstation W8000",
1369 .matches = {
1370 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
1371 DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
1372 },
1373 },
1374 {
1375 .callback = force_acpi_ht,
1376 .ident = "ASUS CUR-DLS",
1377 .matches = {
1378 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1379 DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
1380 },
1381 },
1382 {
1383 .callback = force_acpi_ht,
1384 .ident = "ABIT i440BX-W83977",
1385 .matches = {
1386 DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
1387 DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
1388 },
1389 },
1390 {
1391 .callback = force_acpi_ht,
1392 .ident = "IBM Bladecenter",
1393 .matches = {
1394 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1395 DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
1396 },
1397 },
1398 {
1399 .callback = force_acpi_ht,
1400 .ident = "IBM eServer xSeries 360",
1401 .matches = {
1402 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1403 DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
1404 },
1405 },
1406 {
1407 .callback = force_acpi_ht,
1408 .ident = "IBM eserver xSeries 330",
1409 .matches = {
1410 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1411 DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
1412 },
1413 },
1414 {
1415 .callback = force_acpi_ht,
1416 .ident = "IBM eserver xSeries 440",
1417 .matches = {
1418 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1419 DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
1420 },
1421 },
1422
1423 /*
1424 * Boxes that need ACPI PCI IRQ routing disabled 1334 * Boxes that need ACPI PCI IRQ routing disabled
1425 */ 1335 */
1426 { 1336 {
@@ -1652,8 +1562,10 @@ static int __init parse_acpi(char *arg)
1652 } 1562 }
1653 /* Limit ACPI just to boot-time to enable HT */ 1563 /* Limit ACPI just to boot-time to enable HT */
1654 else if (strcmp(arg, "ht") == 0) { 1564 else if (strcmp(arg, "ht") == 0) {
1655 if (!acpi_force) 1565 if (!acpi_force) {
1566 printk(KERN_WARNING "acpi=ht will be removed in Linux-2.6.35\n");
1656 disable_acpi(); 1567 disable_acpi();
1568 }
1657 acpi_ht = 1; 1569 acpi_ht = 1;
1658 } 1570 }
1659 /* acpi=rsdt use RSDT instead of XSDT */ 1571 /* acpi=rsdt use RSDT instead of XSDT */
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index f147a95fd84a..3704997e8b25 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -31,7 +31,6 @@
31#include <asm/x86_init.h> 31#include <asm/x86_init.h>
32 32
33int gart_iommu_aperture; 33int gart_iommu_aperture;
34EXPORT_SYMBOL_GPL(gart_iommu_aperture);
35int gart_iommu_aperture_disabled __initdata; 34int gart_iommu_aperture_disabled __initdata;
36int gart_iommu_aperture_allowed __initdata; 35int gart_iommu_aperture_allowed __initdata;
37 36
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index e3c3d820c325..09d3b17ce0c2 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -223,7 +223,7 @@ struct apic apic_flat = {
223}; 223};
224 224
225/* 225/*
226 * Physflat mode is used when there are more than 8 CPUs on a AMD system. 226 * Physflat mode is used when there are more than 8 CPUs on a system.
227 * We cannot use logical delivery in this case because the mask 227 * We cannot use logical delivery in this case because the mask
228 * overflows, so use physical mode. 228 * overflows, so use physical mode.
229 */ 229 */
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 3740c8a4eae7..49dbeaef2a27 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -120,11 +120,9 @@ EXPORT_SYMBOL_GPL(uv_possible_blades);
120unsigned long sn_rtc_cycles_per_second; 120unsigned long sn_rtc_cycles_per_second;
121EXPORT_SYMBOL(sn_rtc_cycles_per_second); 121EXPORT_SYMBOL(sn_rtc_cycles_per_second);
122 122
123/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
124
125static const struct cpumask *uv_target_cpus(void) 123static const struct cpumask *uv_target_cpus(void)
126{ 124{
127 return cpumask_of(0); 125 return cpu_online_mask;
128} 126}
129 127
130static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask) 128static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 879666f4d871..7e1cca13af35 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -70,7 +70,8 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
70 if (c->x86_power & (1 << 8)) { 70 if (c->x86_power & (1 << 8)) {
71 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 71 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
72 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); 72 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
73 sched_clock_stable = 1; 73 if (!check_tsc_unstable())
74 sched_clock_stable = 1;
74 } 75 }
75 76
76 /* 77 /*
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index eddb1bdd1b8f..b3eeb66c0a51 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -903,7 +903,7 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
903 return ret; 903 return ret;
904} 904}
905 905
906static struct sysfs_ops sysfs_ops = { 906static const struct sysfs_ops sysfs_ops = {
907 .show = show, 907 .show = show,
908 .store = store, 908 .store = store,
909}; 909};
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index a8aacd4b513c..3ab9c886b613 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -46,6 +46,13 @@
46 46
47#include "mce-internal.h" 47#include "mce-internal.h"
48 48
49static DEFINE_MUTEX(mce_read_mutex);
50
51#define rcu_dereference_check_mce(p) \
52 rcu_dereference_check((p), \
53 rcu_read_lock_sched_held() || \
54 lockdep_is_held(&mce_read_mutex))
55
49#define CREATE_TRACE_POINTS 56#define CREATE_TRACE_POINTS
50#include <trace/events/mce.h> 57#include <trace/events/mce.h>
51 58
@@ -158,7 +165,7 @@ void mce_log(struct mce *mce)
158 mce->finished = 0; 165 mce->finished = 0;
159 wmb(); 166 wmb();
160 for (;;) { 167 for (;;) {
161 entry = rcu_dereference(mcelog.next); 168 entry = rcu_dereference_check_mce(mcelog.next);
162 for (;;) { 169 for (;;) {
163 /* 170 /*
164 * When the buffer fills up discard new entries. 171 * When the buffer fills up discard new entries.
@@ -1485,8 +1492,6 @@ static void collect_tscs(void *data)
1485 rdtscll(cpu_tsc[smp_processor_id()]); 1492 rdtscll(cpu_tsc[smp_processor_id()]);
1486} 1493}
1487 1494
1488static DEFINE_MUTEX(mce_read_mutex);
1489
1490static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, 1495static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
1491 loff_t *off) 1496 loff_t *off)
1492{ 1497{
@@ -1500,7 +1505,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
1500 return -ENOMEM; 1505 return -ENOMEM;
1501 1506
1502 mutex_lock(&mce_read_mutex); 1507 mutex_lock(&mce_read_mutex);
1503 next = rcu_dereference(mcelog.next); 1508 next = rcu_dereference_check_mce(mcelog.next);
1504 1509
1505 /* Only supports full reads right now */ 1510 /* Only supports full reads right now */
1506 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) { 1511 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
@@ -1565,7 +1570,7 @@ timeout:
1565static unsigned int mce_poll(struct file *file, poll_table *wait) 1570static unsigned int mce_poll(struct file *file, poll_table *wait)
1566{ 1571{
1567 poll_wait(file, &mce_wait, wait); 1572 poll_wait(file, &mce_wait, wait);
1568 if (rcu_dereference(mcelog.next)) 1573 if (rcu_dereference_check_mce(mcelog.next))
1569 return POLLIN | POLLRDNORM; 1574 return POLLIN | POLLRDNORM;
1570 return 0; 1575 return 0;
1571} 1576}
@@ -2044,6 +2049,7 @@ static __init void mce_init_banks(void)
2044 struct mce_bank *b = &mce_banks[i]; 2049 struct mce_bank *b = &mce_banks[i];
2045 struct sysdev_attribute *a = &b->attr; 2050 struct sysdev_attribute *a = &b->attr;
2046 2051
2052 sysfs_attr_init(&a->attr);
2047 a->attr.name = b->attrname; 2053 a->attr.name = b->attrname;
2048 snprintf(b->attrname, ATTR_LEN, "bank%d", i); 2054 snprintf(b->attrname, ATTR_LEN, "bank%d", i);
2049 2055
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 83a3d1f4efca..cda932ca3ade 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -388,7 +388,7 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
388 return ret; 388 return ret;
389} 389}
390 390
391static struct sysfs_ops threshold_ops = { 391static const struct sysfs_ops threshold_ops = {
392 .show = show, 392 .show = show,
393 .store = store, 393 .store = store,
394}; 394};
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 7c785634af2b..d15df6e49bf0 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -95,7 +95,7 @@ static void cmci_discover(int banks, int boot)
95 95
96 /* Already owned by someone else? */ 96 /* Already owned by someone else? */
97 if (val & CMCI_EN) { 97 if (val & CMCI_EN) {
98 if (test_and_clear_bit(i, owned) || boot) 98 if (test_and_clear_bit(i, owned) && !boot)
99 print_update("SHD", &hdr, i); 99 print_update("SHD", &hdr, i);
100 __clear_bit(i, __get_cpu_var(mce_poll_banks)); 100 __clear_bit(i, __get_cpu_var(mce_poll_banks));
101 continue; 101 continue;
@@ -107,7 +107,7 @@ static void cmci_discover(int banks, int boot)
107 107
108 /* Did the enable bit stick? -- the bank supports CMCI */ 108 /* Did the enable bit stick? -- the bank supports CMCI */
109 if (val & CMCI_EN) { 109 if (val & CMCI_EN) {
110 if (!test_and_set_bit(i, owned) || boot) 110 if (!test_and_set_bit(i, owned) && !boot)
111 print_update("CMCI", &hdr, i); 111 print_update("CMCI", &hdr, i);
112 __clear_bit(i, __get_cpu_var(mce_poll_banks)); 112 __clear_bit(i, __get_cpu_var(mce_poll_banks));
113 } else { 113 } else {
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index b1fbdeecf6c9..42aafd11e170 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -73,10 +73,10 @@ struct debug_store {
73struct event_constraint { 73struct event_constraint {
74 union { 74 union {
75 unsigned long idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; 75 unsigned long idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
76 u64 idxmsk64[1]; 76 u64 idxmsk64;
77 }; 77 };
78 int code; 78 u64 code;
79 int cmask; 79 u64 cmask;
80 int weight; 80 int weight;
81}; 81};
82 82
@@ -103,7 +103,7 @@ struct cpu_hw_events {
103}; 103};
104 104
105#define __EVENT_CONSTRAINT(c, n, m, w) {\ 105#define __EVENT_CONSTRAINT(c, n, m, w) {\
106 { .idxmsk64[0] = (n) }, \ 106 { .idxmsk64 = (n) }, \
107 .code = (c), \ 107 .code = (c), \
108 .cmask = (m), \ 108 .cmask = (m), \
109 .weight = (w), \ 109 .weight = (w), \
@@ -116,7 +116,7 @@ struct cpu_hw_events {
116 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVTSEL_MASK) 116 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVTSEL_MASK)
117 117
118#define FIXED_EVENT_CONSTRAINT(c, n) \ 118#define FIXED_EVENT_CONSTRAINT(c, n) \
119 EVENT_CONSTRAINT(c, n, INTEL_ARCH_FIXED_MASK) 119 EVENT_CONSTRAINT(c, (1ULL << (32+n)), INTEL_ARCH_FIXED_MASK)
120 120
121#define EVENT_CONSTRAINT_END \ 121#define EVENT_CONSTRAINT_END \
122 EVENT_CONSTRAINT(0, 0, 0) 122 EVENT_CONSTRAINT(0, 0, 0)
@@ -503,6 +503,9 @@ static int __hw_perf_event_init(struct perf_event *event)
503 */ 503 */
504 if (attr->type == PERF_TYPE_RAW) { 504 if (attr->type == PERF_TYPE_RAW) {
505 hwc->config |= x86_pmu.raw_event(attr->config); 505 hwc->config |= x86_pmu.raw_event(attr->config);
506 if ((hwc->config & ARCH_PERFMON_EVENTSEL_ANY) &&
507 perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
508 return -EACCES;
506 return 0; 509 return 0;
507 } 510 }
508 511
@@ -553,9 +556,9 @@ static void x86_pmu_disable_all(void)
553 if (!test_bit(idx, cpuc->active_mask)) 556 if (!test_bit(idx, cpuc->active_mask))
554 continue; 557 continue;
555 rdmsrl(x86_pmu.eventsel + idx, val); 558 rdmsrl(x86_pmu.eventsel + idx, val);
556 if (!(val & ARCH_PERFMON_EVENTSEL0_ENABLE)) 559 if (!(val & ARCH_PERFMON_EVENTSEL_ENABLE))
557 continue; 560 continue;
558 val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; 561 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
559 wrmsrl(x86_pmu.eventsel + idx, val); 562 wrmsrl(x86_pmu.eventsel + idx, val);
560 } 563 }
561} 564}
@@ -590,7 +593,7 @@ static void x86_pmu_enable_all(void)
590 continue; 593 continue;
591 594
592 val = event->hw.config; 595 val = event->hw.config;
593 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 596 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
594 wrmsrl(x86_pmu.eventsel + idx, val); 597 wrmsrl(x86_pmu.eventsel + idx, val);
595 } 598 }
596} 599}
@@ -612,8 +615,8 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
612 bitmap_zero(used_mask, X86_PMC_IDX_MAX); 615 bitmap_zero(used_mask, X86_PMC_IDX_MAX);
613 616
614 for (i = 0; i < n; i++) { 617 for (i = 0; i < n; i++) {
615 constraints[i] = 618 c = x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
616 x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]); 619 constraints[i] = c;
617 } 620 }
618 621
619 /* 622 /*
@@ -853,7 +856,7 @@ void hw_perf_enable(void)
853static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc, int idx) 856static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
854{ 857{
855 (void)checking_wrmsrl(hwc->config_base + idx, 858 (void)checking_wrmsrl(hwc->config_base + idx,
856 hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE); 859 hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE);
857} 860}
858 861
859static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx) 862static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx)
@@ -1094,8 +1097,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
1094 int idx, handled = 0; 1097 int idx, handled = 0;
1095 u64 val; 1098 u64 val;
1096 1099
1097 data.addr = 0; 1100 perf_sample_data_init(&data, 0);
1098 data.raw = NULL;
1099 1101
1100 cpuc = &__get_cpu_var(cpu_hw_events); 1102 cpuc = &__get_cpu_var(cpu_hw_events);
1101 1103
@@ -1347,6 +1349,7 @@ static void __init pmu_check_apic(void)
1347 1349
1348void __init init_hw_perf_events(void) 1350void __init init_hw_perf_events(void)
1349{ 1351{
1352 struct event_constraint *c;
1350 int err; 1353 int err;
1351 1354
1352 pr_info("Performance Events: "); 1355 pr_info("Performance Events: ");
@@ -1395,6 +1398,16 @@ void __init init_hw_perf_events(void)
1395 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1, 1398 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1,
1396 0, x86_pmu.num_events); 1399 0, x86_pmu.num_events);
1397 1400
1401 if (x86_pmu.event_constraints) {
1402 for_each_event_constraint(c, x86_pmu.event_constraints) {
1403 if (c->cmask != INTEL_ARCH_FIXED_MASK)
1404 continue;
1405
1406 c->idxmsk64 |= (1ULL << x86_pmu.num_events) - 1;
1407 c->weight += x86_pmu.num_events;
1408 }
1409 }
1410
1398 pr_info("... version: %d\n", x86_pmu.version); 1411 pr_info("... version: %d\n", x86_pmu.version);
1399 pr_info("... bit width: %d\n", x86_pmu.event_bits); 1412 pr_info("... bit width: %d\n", x86_pmu.event_bits);
1400 pr_info("... generic registers: %d\n", x86_pmu.num_events); 1413 pr_info("... generic registers: %d\n", x86_pmu.num_events);
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 977e7544738c..44b60c852107 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1,7 +1,7 @@
1#ifdef CONFIG_CPU_SUP_INTEL 1#ifdef CONFIG_CPU_SUP_INTEL
2 2
3/* 3/*
4 * Intel PerfMon v3. Used on Core2 and later. 4 * Intel PerfMon, used on Core and later.
5 */ 5 */
6static const u64 intel_perfmon_event_map[] = 6static const u64 intel_perfmon_event_map[] =
7{ 7{
@@ -27,8 +27,14 @@ static struct event_constraint intel_core_event_constraints[] =
27 27
28static struct event_constraint intel_core2_event_constraints[] = 28static struct event_constraint intel_core2_event_constraints[] =
29{ 29{
30 FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */ 30 FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
31 FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */ 31 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
32 /*
33 * Core2 has Fixed Counter 2 listed as CPU_CLK_UNHALTED.REF and event
34 * 0x013c as CPU_CLK_UNHALTED.BUS and specifies there is a fixed
35 * ratio between these counters.
36 */
37 /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
32 INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */ 38 INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */
33 INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */ 39 INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
34 INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */ 40 INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
@@ -37,14 +43,16 @@ static struct event_constraint intel_core2_event_constraints[] =
37 INTEL_EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */ 43 INTEL_EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */
38 INTEL_EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */ 44 INTEL_EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */
39 INTEL_EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */ 45 INTEL_EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */
46 INTEL_EVENT_CONSTRAINT(0xc9, 0x1), /* ITLB_MISS_RETIRED (T30-9) */
40 INTEL_EVENT_CONSTRAINT(0xcb, 0x1), /* MEM_LOAD_RETIRED */ 47 INTEL_EVENT_CONSTRAINT(0xcb, 0x1), /* MEM_LOAD_RETIRED */
41 EVENT_CONSTRAINT_END 48 EVENT_CONSTRAINT_END
42}; 49};
43 50
44static struct event_constraint intel_nehalem_event_constraints[] = 51static struct event_constraint intel_nehalem_event_constraints[] =
45{ 52{
46 FIXED_EVENT_CONSTRAINT(0xc0, (0xf|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */ 53 FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
47 FIXED_EVENT_CONSTRAINT(0x3c, (0xf|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */ 54 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
55 /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
48 INTEL_EVENT_CONSTRAINT(0x40, 0x3), /* L1D_CACHE_LD */ 56 INTEL_EVENT_CONSTRAINT(0x40, 0x3), /* L1D_CACHE_LD */
49 INTEL_EVENT_CONSTRAINT(0x41, 0x3), /* L1D_CACHE_ST */ 57 INTEL_EVENT_CONSTRAINT(0x41, 0x3), /* L1D_CACHE_ST */
50 INTEL_EVENT_CONSTRAINT(0x42, 0x3), /* L1D_CACHE_LOCK */ 58 INTEL_EVENT_CONSTRAINT(0x42, 0x3), /* L1D_CACHE_LOCK */
@@ -58,8 +66,9 @@ static struct event_constraint intel_nehalem_event_constraints[] =
58 66
59static struct event_constraint intel_westmere_event_constraints[] = 67static struct event_constraint intel_westmere_event_constraints[] =
60{ 68{
61 FIXED_EVENT_CONSTRAINT(0xc0, (0xf|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */ 69 FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
62 FIXED_EVENT_CONSTRAINT(0x3c, (0xf|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */ 70 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
71 /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
63 INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */ 72 INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
64 INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */ 73 INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
65 INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */ 74 INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
@@ -68,8 +77,9 @@ static struct event_constraint intel_westmere_event_constraints[] =
68 77
69static struct event_constraint intel_gen_event_constraints[] = 78static struct event_constraint intel_gen_event_constraints[] =
70{ 79{
71 FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */ 80 FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
72 FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */ 81 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
82 /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
73 EVENT_CONSTRAINT_END 83 EVENT_CONSTRAINT_END
74}; 84};
75 85
@@ -580,10 +590,9 @@ static void intel_pmu_drain_bts_buffer(void)
580 590
581 ds->bts_index = ds->bts_buffer_base; 591 ds->bts_index = ds->bts_buffer_base;
582 592
593 perf_sample_data_init(&data, 0);
583 594
584 data.period = event->hw.last_period; 595 data.period = event->hw.last_period;
585 data.addr = 0;
586 data.raw = NULL;
587 regs.ip = 0; 596 regs.ip = 0;
588 597
589 /* 598 /*
@@ -732,8 +741,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
732 int bit, loops; 741 int bit, loops;
733 u64 ack, status; 742 u64 ack, status;
734 743
735 data.addr = 0; 744 perf_sample_data_init(&data, 0);
736 data.raw = NULL;
737 745
738 cpuc = &__get_cpu_var(cpu_hw_events); 746 cpuc = &__get_cpu_var(cpu_hw_events);
739 747
@@ -935,7 +943,7 @@ static __init int intel_pmu_init(void)
935 x86_pmu.event_constraints = intel_nehalem_event_constraints; 943 x86_pmu.event_constraints = intel_nehalem_event_constraints;
936 pr_cont("Nehalem/Corei7 events, "); 944 pr_cont("Nehalem/Corei7 events, ");
937 break; 945 break;
938 case 28: 946 case 28: /* Atom */
939 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids, 947 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
940 sizeof(hw_cache_event_ids)); 948 sizeof(hw_cache_event_ids));
941 949
@@ -951,6 +959,7 @@ static __init int intel_pmu_init(void)
951 x86_pmu.event_constraints = intel_westmere_event_constraints; 959 x86_pmu.event_constraints = intel_westmere_event_constraints;
952 pr_cont("Westmere events, "); 960 pr_cont("Westmere events, ");
953 break; 961 break;
962
954 default: 963 default:
955 /* 964 /*
956 * default constraints for v2 and up 965 * default constraints for v2 and up
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index 1ca5ba078afd..a4e67b99d91c 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -62,7 +62,7 @@ static void p6_pmu_disable_all(void)
62 62
63 /* p6 only has one enable register */ 63 /* p6 only has one enable register */
64 rdmsrl(MSR_P6_EVNTSEL0, val); 64 rdmsrl(MSR_P6_EVNTSEL0, val);
65 val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; 65 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
66 wrmsrl(MSR_P6_EVNTSEL0, val); 66 wrmsrl(MSR_P6_EVNTSEL0, val);
67} 67}
68 68
@@ -72,7 +72,7 @@ static void p6_pmu_enable_all(void)
72 72
73 /* p6 only has one enable register */ 73 /* p6 only has one enable register */
74 rdmsrl(MSR_P6_EVNTSEL0, val); 74 rdmsrl(MSR_P6_EVNTSEL0, val);
75 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 75 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
76 wrmsrl(MSR_P6_EVNTSEL0, val); 76 wrmsrl(MSR_P6_EVNTSEL0, val);
77} 77}
78 78
@@ -83,7 +83,7 @@ p6_pmu_disable_event(struct hw_perf_event *hwc, int idx)
83 u64 val = P6_NOP_EVENT; 83 u64 val = P6_NOP_EVENT;
84 84
85 if (cpuc->enabled) 85 if (cpuc->enabled)
86 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 86 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
87 87
88 (void)checking_wrmsrl(hwc->config_base + idx, val); 88 (void)checking_wrmsrl(hwc->config_base + idx, val);
89} 89}
@@ -95,7 +95,7 @@ static void p6_pmu_enable_event(struct hw_perf_event *hwc, int idx)
95 95
96 val = hwc->config; 96 val = hwc->config;
97 if (cpuc->enabled) 97 if (cpuc->enabled)
98 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 98 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
99 99
100 (void)checking_wrmsrl(hwc->config_base + idx, val); 100 (void)checking_wrmsrl(hwc->config_base + idx, val);
101} 101}
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 74f4e85a5727..fb329e9f8494 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -680,7 +680,7 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz)
680 cpu_nmi_set_wd_enabled(); 680 cpu_nmi_set_wd_enabled();
681 681
682 apic_write(APIC_LVTPC, APIC_DM_NMI); 682 apic_write(APIC_LVTPC, APIC_DM_NMI);
683 evntsel |= ARCH_PERFMON_EVENTSEL0_ENABLE; 683 evntsel |= ARCH_PERFMON_EVENTSEL_ENABLE;
684 wrmsr(evntsel_msr, evntsel, 0); 684 wrmsr(evntsel_msr, evntsel, 0);
685 intel_arch_wd_ops.checkbit = 1ULL << (eax.split.bit_width - 1); 685 intel_arch_wd_ops.checkbit = 1ULL << (eax.split.bit_width - 1);
686 return 1; 686 return 1;
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index dce99abb4496..d5e2a2ebb627 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -120,9 +120,15 @@ fixup_bp_irq_link(unsigned long bp, unsigned long *stack,
120{ 120{
121#ifdef CONFIG_FRAME_POINTER 121#ifdef CONFIG_FRAME_POINTER
122 struct stack_frame *frame = (struct stack_frame *)bp; 122 struct stack_frame *frame = (struct stack_frame *)bp;
123 unsigned long next;
123 124
124 if (!in_irq_stack(stack, irq_stack, irq_stack_end)) 125 if (!in_irq_stack(stack, irq_stack, irq_stack_end)) {
125 return (unsigned long)frame->next_frame; 126 if (!probe_kernel_address(&frame->next_frame, next))
127 return next;
128 else
129 WARN_ONCE(1, "Perf: bad frame pointer = %p in "
130 "callchain\n", &frame->next_frame);
131 }
126#endif 132#endif
127 return bp; 133 return bp;
128} 134}
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 2d8b5035371c..3d1e6f16b7a6 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -27,7 +27,7 @@
27#define GET_CR2_INTO_RCX movq %cr2, %rcx 27#define GET_CR2_INTO_RCX movq %cr2, %rcx
28#endif 28#endif
29 29
30/* we are not able to switch in one step to the final KERNEL ADRESS SPACE 30/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
31 * because we need identity-mapped pages. 31 * because we need identity-mapped pages.
32 * 32 *
33 */ 33 */
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index dca2802c666f..d6cc065f519f 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -344,13 +344,6 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp,
344 } 344 }
345 345
346 /* 346 /*
347 * For kernel-addresses, either the address or symbol name can be
348 * specified.
349 */
350 if (info->name)
351 info->address = (unsigned long)
352 kallsyms_lookup_name(info->name);
353 /*
354 * Check that the low-order bits of the address are appropriate 347 * Check that the low-order bits of the address are appropriate
355 * for the alignment implied by len. 348 * for the alignment implied by len.
356 */ 349 */
@@ -535,8 +528,3 @@ void hw_breakpoint_pmu_read(struct perf_event *bp)
535{ 528{
536 /* TODO */ 529 /* TODO */
537} 530}
538
539void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
540{
541 /* TODO */
542}
diff --git a/arch/x86/kernel/k8.c b/arch/x86/kernel/k8.c
index cbc4332a77b2..9b895464dd03 100644
--- a/arch/x86/kernel/k8.c
+++ b/arch/x86/kernel/k8.c
@@ -121,3 +121,17 @@ void k8_flush_garts(void)
121} 121}
122EXPORT_SYMBOL_GPL(k8_flush_garts); 122EXPORT_SYMBOL_GPL(k8_flush_garts);
123 123
124static __init int init_k8_nbs(void)
125{
126 int err = 0;
127
128 err = cache_k8_northbridges();
129
130 if (err < 0)
131 printk(KERN_NOTICE "K8 NB: Cannot enumerate AMD northbridges.\n");
132
133 return err;
134}
135
136/* This has to go after the PCI subsystem */
137fs_initcall(init_k8_nbs);
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 2bbde6078143..fb99f7edb341 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -1309,7 +1309,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl)
1309/* 1309/*
1310 * get_tce_space_from_tar(): 1310 * get_tce_space_from_tar():
1311 * Function for kdump case. Get the tce tables from first kernel 1311 * Function for kdump case. Get the tce tables from first kernel
1312 * by reading the contents of the base adress register of calgary iommu 1312 * by reading the contents of the base address register of calgary iommu
1313 */ 1313 */
1314static void __init get_tce_space_from_tar(void) 1314static void __init get_tce_space_from_tar(void)
1315{ 1315{
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 1aa966c565f9..a4ac764a6880 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -38,7 +38,7 @@ int iommu_detected __read_mostly = 0;
38 * This variable becomes 1 if iommu=pt is passed on the kernel command line. 38 * This variable becomes 1 if iommu=pt is passed on the kernel command line.
39 * If this variable is 1, IOMMU implementations do no DMA translation for 39 * If this variable is 1, IOMMU implementations do no DMA translation for
40 * devices and allow every device to access to whole physical memory. This is 40 * devices and allow every device to access to whole physical memory. This is
41 * useful if a user want to use an IOMMU only for KVM device assignment to 41 * useful if a user wants to use an IOMMU only for KVM device assignment to
42 * guests and not for driver dma translation. 42 * guests and not for driver dma translation.
43 */ 43 */
44int iommu_pass_through __read_mostly; 44int iommu_pass_through __read_mostly;
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 34de53b46f87..f3af115a573a 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -735,7 +735,7 @@ int __init gart_iommu_init(void)
735 unsigned long scratch; 735 unsigned long scratch;
736 long i; 736 long i;
737 737
738 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) 738 if (num_k8_northbridges == 0)
739 return 0; 739 return 0;
740 740
741#ifndef CONFIG_AGP_AMD64 741#ifndef CONFIG_AGP_AMD64
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 02d678065d7d..ad9540676fcc 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -607,7 +607,7 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
607{ 607{
608#ifdef CONFIG_SMP 608#ifdef CONFIG_SMP
609 if (pm_idle == poll_idle && smp_num_siblings > 1) { 609 if (pm_idle == poll_idle && smp_num_siblings > 1) {
610 printk(KERN_WARNING "WARNING: polling idle and HT enabled," 610 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
611 " performance may degrade.\n"); 611 " performance may degrade.\n");
612 } 612 }
613#endif 613#endif
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 2d96aab82a48..a503b1fd04e5 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -581,7 +581,7 @@ ptrace_modify_breakpoint(struct perf_event *bp, int len, int type,
581 struct perf_event_attr attr; 581 struct perf_event_attr attr;
582 582
583 /* 583 /*
584 * We shoud have at least an inactive breakpoint at this 584 * We should have at least an inactive breakpoint at this
585 * slot. It means the user is writing dr7 without having 585 * slot. It means the user is writing dr7 without having
586 * written the address register first 586 * written the address register first
587 */ 587 */
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
index dee1ff7cba58..196552bb412c 100644
--- a/arch/x86/kernel/sys_i386_32.c
+++ b/arch/x86/kernel/sys_i386_32.c
@@ -25,191 +25,6 @@
25#include <asm/syscalls.h> 25#include <asm/syscalls.h>
26 26
27/* 27/*
28 * Perform the select(nd, in, out, ex, tv) and mmap() system
29 * calls. Linux/i386 didn't use to be able to handle more than
30 * 4 system call parameters, so these system calls used a memory
31 * block for parameter passing..
32 */
33
34struct mmap_arg_struct {
35 unsigned long addr;
36 unsigned long len;
37 unsigned long prot;
38 unsigned long flags;
39 unsigned long fd;
40 unsigned long offset;
41};
42
43asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
44{
45 struct mmap_arg_struct a;
46 int err = -EFAULT;
47
48 if (copy_from_user(&a, arg, sizeof(a)))
49 goto out;
50
51 err = -EINVAL;
52 if (a.offset & ~PAGE_MASK)
53 goto out;
54
55 err = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags,
56 a.fd, a.offset >> PAGE_SHIFT);
57out:
58 return err;
59}
60
61
62struct sel_arg_struct {
63 unsigned long n;
64 fd_set __user *inp, *outp, *exp;
65 struct timeval __user *tvp;
66};
67
68asmlinkage int old_select(struct sel_arg_struct __user *arg)
69{
70 struct sel_arg_struct a;
71
72 if (copy_from_user(&a, arg, sizeof(a)))
73 return -EFAULT;
74 /* sys_select() does the appropriate kernel locking */
75 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
76}
77
78/*
79 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
80 *
81 * This is really horribly ugly.
82 */
83asmlinkage int sys_ipc(uint call, int first, int second,
84 int third, void __user *ptr, long fifth)
85{
86 int version, ret;
87
88 version = call >> 16; /* hack for backward compatibility */
89 call &= 0xffff;
90
91 switch (call) {
92 case SEMOP:
93 return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
94 case SEMTIMEDOP:
95 return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
96 (const struct timespec __user *)fifth);
97
98 case SEMGET:
99 return sys_semget(first, second, third);
100 case SEMCTL: {
101 union semun fourth;
102 if (!ptr)
103 return -EINVAL;
104 if (get_user(fourth.__pad, (void __user * __user *) ptr))
105 return -EFAULT;
106 return sys_semctl(first, second, third, fourth);
107 }
108
109 case MSGSND:
110 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
111 second, third);
112 case MSGRCV:
113 switch (version) {
114 case 0: {
115 struct ipc_kludge tmp;
116 if (!ptr)
117 return -EINVAL;
118
119 if (copy_from_user(&tmp,
120 (struct ipc_kludge __user *) ptr,
121 sizeof(tmp)))
122 return -EFAULT;
123 return sys_msgrcv(first, tmp.msgp, second,
124 tmp.msgtyp, third);
125 }
126 default:
127 return sys_msgrcv(first,
128 (struct msgbuf __user *) ptr,
129 second, fifth, third);
130 }
131 case MSGGET:
132 return sys_msgget((key_t) first, second);
133 case MSGCTL:
134 return sys_msgctl(first, second, (struct msqid_ds __user *) ptr);
135
136 case SHMAT:
137 switch (version) {
138 default: {
139 ulong raddr;
140 ret = do_shmat(first, (char __user *) ptr, second, &raddr);
141 if (ret)
142 return ret;
143 return put_user(raddr, (ulong __user *) third);
144 }
145 case 1: /* iBCS2 emulator entry point */
146 if (!segment_eq(get_fs(), get_ds()))
147 return -EINVAL;
148 /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
149 return do_shmat(first, (char __user *) ptr, second, (ulong *) third);
150 }
151 case SHMDT:
152 return sys_shmdt((char __user *)ptr);
153 case SHMGET:
154 return sys_shmget(first, second, third);
155 case SHMCTL:
156 return sys_shmctl(first, second,
157 (struct shmid_ds __user *) ptr);
158 default:
159 return -ENOSYS;
160 }
161}
162
163/*
164 * Old cruft
165 */
166asmlinkage int sys_uname(struct old_utsname __user *name)
167{
168 int err;
169 if (!name)
170 return -EFAULT;
171 down_read(&uts_sem);
172 err = copy_to_user(name, utsname(), sizeof(*name));
173 up_read(&uts_sem);
174 return err? -EFAULT:0;
175}
176
177asmlinkage int sys_olduname(struct oldold_utsname __user *name)
178{
179 int error;
180
181 if (!name)
182 return -EFAULT;
183 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
184 return -EFAULT;
185
186 down_read(&uts_sem);
187
188 error = __copy_to_user(&name->sysname, &utsname()->sysname,
189 __OLD_UTS_LEN);
190 error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
191 error |= __copy_to_user(&name->nodename, &utsname()->nodename,
192 __OLD_UTS_LEN);
193 error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
194 error |= __copy_to_user(&name->release, &utsname()->release,
195 __OLD_UTS_LEN);
196 error |= __put_user(0, name->release + __OLD_UTS_LEN);
197 error |= __copy_to_user(&name->version, &utsname()->version,
198 __OLD_UTS_LEN);
199 error |= __put_user(0, name->version + __OLD_UTS_LEN);
200 error |= __copy_to_user(&name->machine, &utsname()->machine,
201 __OLD_UTS_LEN);
202 error |= __put_user(0, name->machine + __OLD_UTS_LEN);
203
204 up_read(&uts_sem);
205
206 error = error ? -EFAULT : 0;
207
208 return error;
209}
210
211
212/*
213 * Do a system call from kernel instead of calling sys_execve so we 28 * Do a system call from kernel instead of calling sys_execve so we
214 * end up with proper pt_regs. 29 * end up with proper pt_regs.
215 */ 30 */
diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index 8aa2057efd12..ff14a5044ce6 100644
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
@@ -209,15 +209,3 @@ bottomup:
209 209
210 return addr; 210 return addr;
211} 211}
212
213
214SYSCALL_DEFINE1(uname, struct new_utsname __user *, name)
215{
216 int err;
217 down_read(&uts_sem);
218 err = copy_to_user(name, utsname(), sizeof(*name));
219 up_read(&uts_sem);
220 if (personality(current->personality) == PER_LINUX32)
221 err |= copy_to_user(&name->machine, "i686", 5);
222 return err ? -EFAULT : 0;
223}
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index 15228b5d3eb7..8b3729341216 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -81,7 +81,7 @@ ENTRY(sys_call_table)
81 .long sys_settimeofday 81 .long sys_settimeofday
82 .long sys_getgroups16 /* 80 */ 82 .long sys_getgroups16 /* 80 */
83 .long sys_setgroups16 83 .long sys_setgroups16
84 .long old_select 84 .long sys_old_select
85 .long sys_symlink 85 .long sys_symlink
86 .long sys_lstat 86 .long sys_lstat
87 .long sys_readlink /* 85 */ 87 .long sys_readlink /* 85 */
@@ -89,7 +89,7 @@ ENTRY(sys_call_table)
89 .long sys_swapon 89 .long sys_swapon
90 .long sys_reboot 90 .long sys_reboot
91 .long sys_old_readdir 91 .long sys_old_readdir
92 .long old_mmap /* 90 */ 92 .long sys_old_mmap /* 90 */
93 .long sys_munmap 93 .long sys_munmap
94 .long sys_truncate 94 .long sys_truncate
95 .long sys_ftruncate 95 .long sys_ftruncate
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 208a857c679f..9faf91ae1841 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -50,7 +50,7 @@ u64 native_sched_clock(void)
50 * unstable. We do this because unlike Time Of Day, 50 * unstable. We do this because unlike Time Of Day,
51 * the scheduler clock tolerates small errors and it's 51 * the scheduler clock tolerates small errors and it's
52 * very important for it to be as fast as the platform 52 * very important for it to be as fast as the platform
53 * can achive it. ) 53 * can achieve it. )
54 */ 54 */
55 if (unlikely(tsc_disabled)) { 55 if (unlikely(tsc_disabled)) {
56 /* No locking but a rare wrong value is not a big deal: */ 56 /* No locking but a rare wrong value is not a big deal: */
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 2f1ca5614292..5e1ff66ecd73 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -167,7 +167,7 @@ static int vmi_timer_next_event(unsigned long delta,
167{ 167{
168 /* Unfortunately, set_next_event interface only passes relative 168 /* Unfortunately, set_next_event interface only passes relative
169 * expiry, but we want absolute expiry. It'd be better if were 169 * expiry, but we want absolute expiry. It'd be better if were
170 * were passed an aboslute expiry, since a bunch of time may 170 * were passed an absolute expiry, since a bunch of time may
171 * have been stolen between the time the delta is computed and 171 * have been stolen between the time the delta is computed and
172 * when we set the alarm below. */ 172 * when we set the alarm below. */
173 cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT)); 173 cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT));
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 1d4eb93d333c..cf07c26d9a4a 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -291,8 +291,29 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
291 */ 291 */
292 if (kernel_set_to_readonly && 292 if (kernel_set_to_readonly &&
293 within(address, (unsigned long)_text, 293 within(address, (unsigned long)_text,
294 (unsigned long)__end_rodata_hpage_align)) 294 (unsigned long)__end_rodata_hpage_align)) {
295 pgprot_val(forbidden) |= _PAGE_RW; 295 unsigned int level;
296
297 /*
298 * Don't enforce the !RW mapping for the kernel text mapping,
299 * if the current mapping is already using small page mapping.
300 * No need to work hard to preserve large page mappings in this
301 * case.
302 *
303 * This also fixes the Linux Xen paravirt guest boot failure
304 * (because of unexpected read-only mappings for kernel identity
305 * mappings). In this paravirt guest case, the kernel text
306 * mapping and the kernel identity mapping share the same
307 * page-table pages. Thus we can't really use different
308 * protections for the kernel text and identity mappings. Also,
309 * these shared mappings are made of small page mappings.
310 * Thus this don't enforce !RW mapping for small page kernel
311 * text mapping logic will help Linux Xen parvirt guest boot
312 * aswell.
313 */
314 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
315 pgprot_val(forbidden) |= _PAGE_RW;
316 }
296#endif 317#endif
297 318
298 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); 319 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 6a58256dce9f..090cbbec7dbd 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -46,17 +46,6 @@
46 46
47static unsigned long reset_value[NUM_VIRT_COUNTERS]; 47static unsigned long reset_value[NUM_VIRT_COUNTERS];
48 48
49/* IbsFetchCtl bits/masks */
50#define IBS_FETCH_RAND_EN (1ULL<<57)
51#define IBS_FETCH_VAL (1ULL<<49)
52#define IBS_FETCH_ENABLE (1ULL<<48)
53#define IBS_FETCH_CNT_MASK 0xFFFF0000ULL
54
55/* IbsOpCtl bits */
56#define IBS_OP_CNT_CTL (1ULL<<19)
57#define IBS_OP_VAL (1ULL<<18)
58#define IBS_OP_ENABLE (1ULL<<17)
59
60#define IBS_FETCH_SIZE 6 49#define IBS_FETCH_SIZE 6
61#define IBS_OP_SIZE 12 50#define IBS_OP_SIZE 12
62 51
@@ -182,7 +171,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
182 continue; 171 continue;
183 } 172 }
184 rdmsrl(msrs->controls[i].addr, val); 173 rdmsrl(msrs->controls[i].addr, val);
185 if (val & ARCH_PERFMON_EVENTSEL0_ENABLE) 174 if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
186 op_x86_warn_in_use(i); 175 op_x86_warn_in_use(i);
187 val &= model->reserved; 176 val &= model->reserved;
188 wrmsrl(msrs->controls[i].addr, val); 177 wrmsrl(msrs->controls[i].addr, val);
@@ -290,7 +279,7 @@ op_amd_handle_ibs(struct pt_regs * const regs,
290 oprofile_write_commit(&entry); 279 oprofile_write_commit(&entry);
291 280
292 /* reenable the IRQ */ 281 /* reenable the IRQ */
293 ctl &= ~(IBS_FETCH_VAL | IBS_FETCH_CNT_MASK); 282 ctl &= ~(IBS_FETCH_VAL | IBS_FETCH_CNT);
294 ctl |= IBS_FETCH_ENABLE; 283 ctl |= IBS_FETCH_ENABLE;
295 wrmsrl(MSR_AMD64_IBSFETCHCTL, ctl); 284 wrmsrl(MSR_AMD64_IBSFETCHCTL, ctl);
296 } 285 }
@@ -330,7 +319,7 @@ static inline void op_amd_start_ibs(void)
330 return; 319 return;
331 320
332 if (ibs_config.fetch_enabled) { 321 if (ibs_config.fetch_enabled) {
333 val = (ibs_config.max_cnt_fetch >> 4) & 0xFFFF; 322 val = (ibs_config.max_cnt_fetch >> 4) & IBS_FETCH_MAX_CNT;
334 val |= ibs_config.rand_en ? IBS_FETCH_RAND_EN : 0; 323 val |= ibs_config.rand_en ? IBS_FETCH_RAND_EN : 0;
335 val |= IBS_FETCH_ENABLE; 324 val |= IBS_FETCH_ENABLE;
336 wrmsrl(MSR_AMD64_IBSFETCHCTL, val); 325 wrmsrl(MSR_AMD64_IBSFETCHCTL, val);
@@ -352,7 +341,7 @@ static inline void op_amd_start_ibs(void)
352 * avoid underflows. 341 * avoid underflows.
353 */ 342 */
354 ibs_op_ctl = min(ibs_op_ctl + IBS_RANDOM_MAXCNT_OFFSET, 343 ibs_op_ctl = min(ibs_op_ctl + IBS_RANDOM_MAXCNT_OFFSET,
355 0xFFFFULL); 344 IBS_OP_MAX_CNT);
356 } 345 }
357 if (ibs_caps & IBS_CAPS_OPCNT && ibs_config.dispatched_ops) 346 if (ibs_caps & IBS_CAPS_OPCNT && ibs_config.dispatched_ops)
358 ibs_op_ctl |= IBS_OP_CNT_CTL; 347 ibs_op_ctl |= IBS_OP_CNT_CTL;
@@ -409,7 +398,7 @@ static void op_amd_start(struct op_msrs const * const msrs)
409 if (!reset_value[op_x86_phys_to_virt(i)]) 398 if (!reset_value[op_x86_phys_to_virt(i)])
410 continue; 399 continue;
411 rdmsrl(msrs->controls[i].addr, val); 400 rdmsrl(msrs->controls[i].addr, val);
412 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 401 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
413 wrmsrl(msrs->controls[i].addr, val); 402 wrmsrl(msrs->controls[i].addr, val);
414 } 403 }
415 404
@@ -429,7 +418,7 @@ static void op_amd_stop(struct op_msrs const * const msrs)
429 if (!reset_value[op_x86_phys_to_virt(i)]) 418 if (!reset_value[op_x86_phys_to_virt(i)])
430 continue; 419 continue;
431 rdmsrl(msrs->controls[i].addr, val); 420 rdmsrl(msrs->controls[i].addr, val);
432 val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; 421 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
433 wrmsrl(msrs->controls[i].addr, val); 422 wrmsrl(msrs->controls[i].addr, val);
434 } 423 }
435 424
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 5d1727ba409e..2bf90fafa7b5 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -88,7 +88,7 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
88 continue; 88 continue;
89 } 89 }
90 rdmsrl(msrs->controls[i].addr, val); 90 rdmsrl(msrs->controls[i].addr, val);
91 if (val & ARCH_PERFMON_EVENTSEL0_ENABLE) 91 if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
92 op_x86_warn_in_use(i); 92 op_x86_warn_in_use(i);
93 val &= model->reserved; 93 val &= model->reserved;
94 wrmsrl(msrs->controls[i].addr, val); 94 wrmsrl(msrs->controls[i].addr, val);
@@ -166,7 +166,7 @@ static void ppro_start(struct op_msrs const * const msrs)
166 for (i = 0; i < num_counters; ++i) { 166 for (i = 0; i < num_counters; ++i) {
167 if (reset_value[i]) { 167 if (reset_value[i]) {
168 rdmsrl(msrs->controls[i].addr, val); 168 rdmsrl(msrs->controls[i].addr, val);
169 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 169 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
170 wrmsrl(msrs->controls[i].addr, val); 170 wrmsrl(msrs->controls[i].addr, val);
171 } 171 }
172 } 172 }
@@ -184,7 +184,7 @@ static void ppro_stop(struct op_msrs const * const msrs)
184 if (!reset_value[i]) 184 if (!reset_value[i])
185 continue; 185 continue;
186 rdmsrl(msrs->controls[i].addr, val); 186 rdmsrl(msrs->controls[i].addr, val);
187 val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; 187 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
188 wrmsrl(msrs->controls[i].addr, val); 188 wrmsrl(msrs->controls[i].addr, val);
189 } 189 }
190} 190}
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 563d20504988..deafb65ef44e 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -361,7 +361,7 @@ static void xen_cpu_die(unsigned int cpu)
361 alternatives_smp_switch(0); 361 alternatives_smp_switch(0);
362} 362}
363 363
364static void __cpuinit xen_play_dead(void) /* used only with CPU_HOTPLUG */ 364static void __cpuinit xen_play_dead(void) /* used only with HOTPLUG_CPU */
365{ 365{
366 play_dead_common(); 366 play_dead_common();
367 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL); 367 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 66410acf18b4..4609b0f15f1f 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -56,14 +56,6 @@ struct pci_dev;
56 56
57#define PCI_DMA_BUS_IS_PHYS (1) 57#define PCI_DMA_BUS_IS_PHYS (1)
58 58
59/* pci_unmap_{page,single} is a no-op, so */
60#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
61#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
62#define pci_unmap_addr(PTR, ADDR_NAME) (0)
63#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
64#define pci_ubnmap_len(PTR, LEN_NAME) (0)
65#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
66
67/* Map a range of PCI memory or I/O space for a device into user space */ 59/* Map a range of PCI memory or I/O space for a device into user space */
68int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, 60int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
69 enum pci_mmap_state mmap_state, int write_combine); 61 enum pci_mmap_state mmap_state, int write_combine);
diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h
index 905e1e619654..3c549f798727 100644
--- a/arch/xtensa/include/asm/ptrace.h
+++ b/arch/xtensa/include/asm/ptrace.h
@@ -113,6 +113,7 @@ struct pt_regs {
113 113
114#include <variant/core.h> 114#include <variant/core.h>
115 115
116# define arch_has_single_step() (1)
116# define task_pt_regs(tsk) ((struct pt_regs*) \ 117# define task_pt_regs(tsk) ((struct pt_regs*) \
117 (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1) 118 (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
118# define user_mode(regs) (((regs)->ps & 0x00000020)!=0) 119# define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 80d24c485fd3..77fc9f6dc016 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -104,7 +104,7 @@
104 * excsave has been restored, and 104 * excsave has been restored, and
105 * stack pointer (a1) has been set. 105 * stack pointer (a1) has been set.
106 * 106 *
107 * Note: _user_exception might be at an odd adress. Don't use call0..call12 107 * Note: _user_exception might be at an odd address. Don't use call0..call12
108 */ 108 */
109 109
110ENTRY(user_exception) 110ENTRY(user_exception)
@@ -244,7 +244,7 @@ _user_exception:
244 * excsave has been restored, and 244 * excsave has been restored, and
245 * stack pointer (a1) has been set. 245 * stack pointer (a1) has been set.
246 * 246 *
247 * Note: _kernel_exception might be at an odd adress. Don't use call0..call12 247 * Note: _kernel_exception might be at an odd address. Don't use call0..call12
248 */ 248 */
249 249
250ENTRY(kernel_exception) 250ENTRY(kernel_exception)
diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c
index 9486882ef0af..9d4e1ceb3f09 100644
--- a/arch/xtensa/kernel/ptrace.c
+++ b/arch/xtensa/kernel/ptrace.c
@@ -30,6 +30,17 @@
30#include <asm/elf.h> 30#include <asm/elf.h>
31#include <asm/coprocessor.h> 31#include <asm/coprocessor.h>
32 32
33
34void user_enable_single_step(struct task_struct *child)
35{
36 child->ptrace |= PT_SINGLESTEP;
37}
38
39void user_disable_single_step(struct task_struct *child)
40{
41 child->ptrace &= ~PT_SINGLESTEP;
42}
43
33/* 44/*
34 * Called by kernel/ptrace.c when detaching to disable single stepping. 45 * Called by kernel/ptrace.c when detaching to disable single stepping.
35 */ 46 */
@@ -268,51 +279,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
268 ret = ptrace_pokeusr(child, addr, data); 279 ret = ptrace_pokeusr(child, addr, data);
269 break; 280 break;
270 281
271 /* continue and stop at next (return from) syscall */
272
273 case PTRACE_SYSCALL:
274 case PTRACE_CONT: /* restart after signal. */
275 {
276 ret = -EIO;
277 if (!valid_signal(data))
278 break;
279 if (request == PTRACE_SYSCALL)
280 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
281 else
282 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
283 child->exit_code = data;
284 /* Make sure the single step bit is not set. */
285 child->ptrace &= ~PT_SINGLESTEP;
286 wake_up_process(child);
287 ret = 0;
288 break;
289 }
290
291 /*
292 * make the child exit. Best I can do is send it a sigkill.
293 * perhaps it should be put in the status that it wants to
294 * exit.
295 */
296 case PTRACE_KILL:
297 ret = 0;
298 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
299 break;
300 child->exit_code = SIGKILL;
301 child->ptrace &= ~PT_SINGLESTEP;
302 wake_up_process(child);
303 break;
304
305 case PTRACE_SINGLESTEP:
306 ret = -EIO;
307 if (!valid_signal(data))
308 break;
309 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
310 child->ptrace |= PT_SINGLESTEP;
311 child->exit_code = data;
312 wake_up_process(child);
313 ret = 0;
314 break;
315
316 case PTRACE_GETREGS: 282 case PTRACE_GETREGS:
317 ret = ptrace_getregs(child, (void __user *) data); 283 ret = ptrace_getregs(child, (void __user *) data);
318 break; 284 break;
diff --git a/block/Kconfig.iosched b/block/Kconfig.iosched
index b71abfb0d726..fc71cf071fb2 100644
--- a/block/Kconfig.iosched
+++ b/block/Kconfig.iosched
@@ -23,6 +23,7 @@ config IOSCHED_DEADLINE
23 23
24config IOSCHED_CFQ 24config IOSCHED_CFQ
25 tristate "CFQ I/O scheduler" 25 tristate "CFQ I/O scheduler"
26 select BLK_CGROUP if CFQ_GROUP_IOSCHED
26 default y 27 default y
27 ---help--- 28 ---help---
28 The CFQ I/O scheduler tries to distribute bandwidth equally 29 The CFQ I/O scheduler tries to distribute bandwidth equally
@@ -35,7 +36,6 @@ config IOSCHED_CFQ
35config CFQ_GROUP_IOSCHED 36config CFQ_GROUP_IOSCHED
36 bool "CFQ Group Scheduling support" 37 bool "CFQ Group Scheduling support"
37 depends on IOSCHED_CFQ && CGROUPS 38 depends on IOSCHED_CFQ && CGROUPS
38 select BLK_CGROUP
39 default n 39 default n
40 ---help--- 40 ---help---
41 Enable group IO scheduling in CFQ. 41 Enable group IO scheduling in CFQ.
diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c
index c85d74cae200..4b686ad08eaa 100644
--- a/block/blk-cgroup.c
+++ b/block/blk-cgroup.c
@@ -23,6 +23,31 @@ static LIST_HEAD(blkio_list);
23struct blkio_cgroup blkio_root_cgroup = { .weight = 2*BLKIO_WEIGHT_DEFAULT }; 23struct blkio_cgroup blkio_root_cgroup = { .weight = 2*BLKIO_WEIGHT_DEFAULT };
24EXPORT_SYMBOL_GPL(blkio_root_cgroup); 24EXPORT_SYMBOL_GPL(blkio_root_cgroup);
25 25
26static struct cgroup_subsys_state *blkiocg_create(struct cgroup_subsys *,
27 struct cgroup *);
28static int blkiocg_can_attach(struct cgroup_subsys *, struct cgroup *,
29 struct task_struct *, bool);
30static void blkiocg_attach(struct cgroup_subsys *, struct cgroup *,
31 struct cgroup *, struct task_struct *, bool);
32static void blkiocg_destroy(struct cgroup_subsys *, struct cgroup *);
33static int blkiocg_populate(struct cgroup_subsys *, struct cgroup *);
34
35struct cgroup_subsys blkio_subsys = {
36 .name = "blkio",
37 .create = blkiocg_create,
38 .can_attach = blkiocg_can_attach,
39 .attach = blkiocg_attach,
40 .destroy = blkiocg_destroy,
41 .populate = blkiocg_populate,
42#ifdef CONFIG_BLK_CGROUP
43 /* note: blkio_subsys_id is otherwise defined in blk-cgroup.h */
44 .subsys_id = blkio_subsys_id,
45#endif
46 .use_id = 1,
47 .module = THIS_MODULE,
48};
49EXPORT_SYMBOL_GPL(blkio_subsys);
50
26struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup) 51struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup)
27{ 52{
28 return container_of(cgroup_subsys_state(cgroup, blkio_subsys_id), 53 return container_of(cgroup_subsys_state(cgroup, blkio_subsys_id),
@@ -253,7 +278,8 @@ remove_entry:
253done: 278done:
254 free_css_id(&blkio_subsys, &blkcg->css); 279 free_css_id(&blkio_subsys, &blkcg->css);
255 rcu_read_unlock(); 280 rcu_read_unlock();
256 kfree(blkcg); 281 if (blkcg != &blkio_root_cgroup)
282 kfree(blkcg);
257} 283}
258 284
259static struct cgroup_subsys_state * 285static struct cgroup_subsys_state *
@@ -319,17 +345,6 @@ static void blkiocg_attach(struct cgroup_subsys *subsys, struct cgroup *cgroup,
319 task_unlock(tsk); 345 task_unlock(tsk);
320} 346}
321 347
322struct cgroup_subsys blkio_subsys = {
323 .name = "blkio",
324 .create = blkiocg_create,
325 .can_attach = blkiocg_can_attach,
326 .attach = blkiocg_attach,
327 .destroy = blkiocg_destroy,
328 .populate = blkiocg_populate,
329 .subsys_id = blkio_subsys_id,
330 .use_id = 1,
331};
332
333void blkio_policy_register(struct blkio_policy_type *blkiop) 348void blkio_policy_register(struct blkio_policy_type *blkiop)
334{ 349{
335 spin_lock(&blkio_list_lock); 350 spin_lock(&blkio_list_lock);
@@ -345,3 +360,17 @@ void blkio_policy_unregister(struct blkio_policy_type *blkiop)
345 spin_unlock(&blkio_list_lock); 360 spin_unlock(&blkio_list_lock);
346} 361}
347EXPORT_SYMBOL_GPL(blkio_policy_unregister); 362EXPORT_SYMBOL_GPL(blkio_policy_unregister);
363
364static int __init init_cgroup_blkio(void)
365{
366 return cgroup_load_subsys(&blkio_subsys);
367}
368
369static void __exit exit_cgroup_blkio(void)
370{
371 cgroup_unload_subsys(&blkio_subsys);
372}
373
374module_init(init_cgroup_blkio);
375module_exit(exit_cgroup_blkio);
376MODULE_LICENSE("GPL");
diff --git a/block/blk-cgroup.h b/block/blk-cgroup.h
index 84bf745fa775..8ccc20464dae 100644
--- a/block/blk-cgroup.h
+++ b/block/blk-cgroup.h
@@ -15,7 +15,13 @@
15 15
16#include <linux/cgroup.h> 16#include <linux/cgroup.h>
17 17
18#ifdef CONFIG_BLK_CGROUP 18#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
19
20#ifndef CONFIG_BLK_CGROUP
21/* When blk-cgroup is a module, its subsys_id isn't a compile-time constant */
22extern struct cgroup_subsys blkio_subsys;
23#define blkio_subsys_id blkio_subsys.subsys_id
24#endif
19 25
20struct blkio_cgroup { 26struct blkio_cgroup {
21 struct cgroup_subsys_state css; 27 struct cgroup_subsys_state css;
@@ -91,7 +97,7 @@ static inline void blkiocg_update_blkio_group_dequeue_stats(
91 struct blkio_group *blkg, unsigned long dequeue) {} 97 struct blkio_group *blkg, unsigned long dequeue) {}
92#endif 98#endif
93 99
94#ifdef CONFIG_BLK_CGROUP 100#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
95extern struct blkio_cgroup blkio_root_cgroup; 101extern struct blkio_cgroup blkio_root_cgroup;
96extern struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup); 102extern struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup);
97extern void blkiocg_add_blkio_group(struct blkio_cgroup *blkcg, 103extern void blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,
diff --git a/block/blk-integrity.c b/block/blk-integrity.c
index 15c630813b1c..96e83c2bdb94 100644
--- a/block/blk-integrity.c
+++ b/block/blk-integrity.c
@@ -278,7 +278,7 @@ static struct attribute *integrity_attrs[] = {
278 NULL, 278 NULL,
279}; 279};
280 280
281static struct sysfs_ops integrity_ops = { 281static const struct sysfs_ops integrity_ops = {
282 .show = &integrity_attr_show, 282 .show = &integrity_attr_show,
283 .store = &integrity_attr_store, 283 .store = &integrity_attr_store,
284}; 284};
diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c
index fad86550255a..4426739fb757 100644
--- a/block/blk-sysfs.c
+++ b/block/blk-sysfs.c
@@ -475,7 +475,7 @@ static void blk_release_queue(struct kobject *kobj)
475 kmem_cache_free(blk_requestq_cachep, q); 475 kmem_cache_free(blk_requestq_cachep, q);
476} 476}
477 477
478static struct sysfs_ops queue_sysfs_ops = { 478static const struct sysfs_ops queue_sysfs_ops = {
479 .show = queue_attr_show, 479 .show = queue_attr_show,
480 .store = queue_attr_store, 480 .store = queue_attr_store,
481}; 481};
diff --git a/block/bsg.c b/block/bsg.c
index a9fd2d84b53a..46597a6bd112 100644
--- a/block/bsg.c
+++ b/block/bsg.c
@@ -260,7 +260,7 @@ bsg_map_hdr(struct bsg_device *bd, struct sg_io_v4 *hdr, fmode_t has_write_perm,
260 return ERR_PTR(ret); 260 return ERR_PTR(ret);
261 261
262 /* 262 /*
263 * map scatter-gather elements seperately and string them to request 263 * map scatter-gather elements separately and string them to request
264 */ 264 */
265 rq = blk_get_request(q, rw, GFP_KERNEL); 265 rq = blk_get_request(q, rw, GFP_KERNEL);
266 if (!rq) 266 if (!rq)
diff --git a/block/elevator.c b/block/elevator.c
index ee3a883840f2..df75676f6671 100644
--- a/block/elevator.c
+++ b/block/elevator.c
@@ -892,7 +892,7 @@ elv_attr_store(struct kobject *kobj, struct attribute *attr,
892 return error; 892 return error;
893} 893}
894 894
895static struct sysfs_ops elv_sysfs_ops = { 895static const struct sysfs_ops elv_sysfs_ops = {
896 .show = elv_attr_show, 896 .show = elv_attr_show,
897 .store = elv_attr_store, 897 .store = elv_attr_store,
898}; 898};
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 6a2e295ee227..403857ad06d4 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -826,8 +826,8 @@ config CRYPTO_ANSI_CPRNG
826 help 826 help
827 This option enables the generic pseudo random number generator 827 This option enables the generic pseudo random number generator
828 for cryptographic modules. Uses the Algorithm specified in 828 for cryptographic modules. Uses the Algorithm specified in
829 ANSI X9.31 A.2.4. Not this option must be enabled if CRYPTO_FIPS 829 ANSI X9.31 A.2.4. Note that this option must be enabled if
830 is selected 830 CRYPTO_FIPS is selected
831 831
832source "drivers/crypto/Kconfig" 832source "drivers/crypto/Kconfig"
833 833
diff --git a/drivers/Makefile b/drivers/Makefile
index 81e36596b1e9..34f1e1064dbc 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_SGI_SN) += sn/
99obj-y += firmware/ 99obj-y += firmware/
100obj-$(CONFIG_CRYPTO) += crypto/ 100obj-$(CONFIG_CRYPTO) += crypto/
101obj-$(CONFIG_SUPERH) += sh/ 101obj-$(CONFIG_SUPERH) += sh/
102obj-$(CONFIG_ARCH_SHMOBILE) += sh/
102obj-$(CONFIG_GENERIC_TIME) += clocksource/ 103obj-$(CONFIG_GENERIC_TIME) += clocksource/
103obj-$(CONFIG_DMA_ENGINE) += dma/ 104obj-$(CONFIG_DMA_ENGINE) += dma/
104obj-$(CONFIG_DCA) += dca/ 105obj-$(CONFIG_DCA) += dca/
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index 66cc3f36a954..a8d8998dd5c5 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile
@@ -32,7 +32,7 @@ acpi-$(CONFIG_ACPI_SLEEP) += proc.o
32# 32#
33acpi-y += bus.o glue.o 33acpi-y += bus.o glue.o
34acpi-y += scan.o 34acpi-y += scan.o
35acpi-y += processor_pdc.o 35acpi-y += processor_core.o
36acpi-y += ec.o 36acpi-y += ec.o
37acpi-$(CONFIG_ACPI_DOCK) += dock.o 37acpi-$(CONFIG_ACPI_DOCK) += dock.o
38acpi-y += pci_root.o pci_link.o pci_irq.o pci_bind.o 38acpi-y += pci_root.o pci_link.o pci_irq.o pci_bind.o
@@ -61,7 +61,7 @@ obj-$(CONFIG_ACPI_SBS) += sbs.o
61obj-$(CONFIG_ACPI_POWER_METER) += power_meter.o 61obj-$(CONFIG_ACPI_POWER_METER) += power_meter.o
62 62
63# processor has its own "processor." module_param namespace 63# processor has its own "processor." module_param namespace
64processor-y := processor_core.o processor_throttling.o 64processor-y := processor_driver.o processor_throttling.o
65processor-y += processor_idle.o processor_thermal.o 65processor-y += processor_idle.o processor_thermal.o
66processor-$(CONFIG_CPU_FREQ) += processor_perflib.o 66processor-$(CONFIG_CPU_FREQ) += processor_perflib.o
67 67
diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c
index cc8a10268f68..7116bc86494d 100644
--- a/drivers/acpi/acpica/exmutex.c
+++ b/drivers/acpi/acpica/exmutex.c
@@ -375,8 +375,7 @@ acpi_ex_release_mutex(union acpi_operand_object *obj_desc,
375 return_ACPI_STATUS(AE_AML_MUTEX_NOT_ACQUIRED); 375 return_ACPI_STATUS(AE_AML_MUTEX_NOT_ACQUIRED);
376 } 376 }
377 377
378 /* Must have a valid thread ID */ 378 /* Must have a valid thread. */
379
380 if (!walk_state->thread) { 379 if (!walk_state->thread) {
381 ACPI_ERROR((AE_INFO, 380 ACPI_ERROR((AE_INFO,
382 "Cannot release Mutex [%4.4s], null thread info", 381 "Cannot release Mutex [%4.4s], null thread info",
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 58d2c91ba62b..75f39f2c166d 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -54,6 +54,7 @@
54#define ACPI_BATTERY_DEVICE_NAME "Battery" 54#define ACPI_BATTERY_DEVICE_NAME "Battery"
55#define ACPI_BATTERY_NOTIFY_STATUS 0x80 55#define ACPI_BATTERY_NOTIFY_STATUS 0x80
56#define ACPI_BATTERY_NOTIFY_INFO 0x81 56#define ACPI_BATTERY_NOTIFY_INFO 0x81
57#define ACPI_BATTERY_NOTIFY_THRESHOLD 0x82
57 58
58#define _COMPONENT ACPI_BATTERY_COMPONENT 59#define _COMPONENT ACPI_BATTERY_COMPONENT
59 60
@@ -88,10 +89,15 @@ static const struct acpi_device_id battery_device_ids[] = {
88 89
89MODULE_DEVICE_TABLE(acpi, battery_device_ids); 90MODULE_DEVICE_TABLE(acpi, battery_device_ids);
90 91
91/* For buggy DSDTs that report negative 16-bit values for either charging 92enum {
92 * or discharging current and/or report 0 as 65536 due to bad math. 93 ACPI_BATTERY_ALARM_PRESENT,
93 */ 94 ACPI_BATTERY_XINFO_PRESENT,
94#define QUIRK_SIGNED16_CURRENT 0x0001 95 /* For buggy DSDTs that report negative 16-bit values for either
96 * charging or discharging current and/or report 0 as 65536
97 * due to bad math.
98 */
99 ACPI_BATTERY_QUIRK_SIGNED16_CURRENT,
100};
95 101
96struct acpi_battery { 102struct acpi_battery {
97 struct mutex lock; 103 struct mutex lock;
@@ -109,6 +115,12 @@ struct acpi_battery {
109 int design_voltage; 115 int design_voltage;
110 int design_capacity_warning; 116 int design_capacity_warning;
111 int design_capacity_low; 117 int design_capacity_low;
118 int cycle_count;
119 int measurement_accuracy;
120 int max_sampling_time;
121 int min_sampling_time;
122 int max_averaging_interval;
123 int min_averaging_interval;
112 int capacity_granularity_1; 124 int capacity_granularity_1;
113 int capacity_granularity_2; 125 int capacity_granularity_2;
114 int alarm; 126 int alarm;
@@ -118,8 +130,7 @@ struct acpi_battery {
118 char oem_info[32]; 130 char oem_info[32];
119 int state; 131 int state;
120 int power_unit; 132 int power_unit;
121 u8 alarm_present; 133 unsigned long flags;
122 long quirks;
123}; 134};
124 135
125#define to_acpi_battery(x) container_of(x, struct acpi_battery, bat); 136#define to_acpi_battery(x) container_of(x, struct acpi_battery, bat);
@@ -198,6 +209,9 @@ static int acpi_battery_get_property(struct power_supply *psy,
198 case POWER_SUPPLY_PROP_TECHNOLOGY: 209 case POWER_SUPPLY_PROP_TECHNOLOGY:
199 val->intval = acpi_battery_technology(battery); 210 val->intval = acpi_battery_technology(battery);
200 break; 211 break;
212 case POWER_SUPPLY_PROP_CYCLE_COUNT:
213 val->intval = battery->cycle_count;
214 break;
201 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: 215 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
202 val->intval = battery->design_voltage * 1000; 216 val->intval = battery->design_voltage * 1000;
203 break; 217 break;
@@ -239,6 +253,7 @@ static enum power_supply_property charge_battery_props[] = {
239 POWER_SUPPLY_PROP_STATUS, 253 POWER_SUPPLY_PROP_STATUS,
240 POWER_SUPPLY_PROP_PRESENT, 254 POWER_SUPPLY_PROP_PRESENT,
241 POWER_SUPPLY_PROP_TECHNOLOGY, 255 POWER_SUPPLY_PROP_TECHNOLOGY,
256 POWER_SUPPLY_PROP_CYCLE_COUNT,
242 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 257 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
243 POWER_SUPPLY_PROP_VOLTAGE_NOW, 258 POWER_SUPPLY_PROP_VOLTAGE_NOW,
244 POWER_SUPPLY_PROP_CURRENT_NOW, 259 POWER_SUPPLY_PROP_CURRENT_NOW,
@@ -254,6 +269,7 @@ static enum power_supply_property energy_battery_props[] = {
254 POWER_SUPPLY_PROP_STATUS, 269 POWER_SUPPLY_PROP_STATUS,
255 POWER_SUPPLY_PROP_PRESENT, 270 POWER_SUPPLY_PROP_PRESENT,
256 POWER_SUPPLY_PROP_TECHNOLOGY, 271 POWER_SUPPLY_PROP_TECHNOLOGY,
272 POWER_SUPPLY_PROP_CYCLE_COUNT,
257 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 273 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
258 POWER_SUPPLY_PROP_VOLTAGE_NOW, 274 POWER_SUPPLY_PROP_VOLTAGE_NOW,
259 POWER_SUPPLY_PROP_CURRENT_NOW, 275 POWER_SUPPLY_PROP_CURRENT_NOW,
@@ -305,6 +321,28 @@ static struct acpi_offsets info_offsets[] = {
305 {offsetof(struct acpi_battery, oem_info), 1}, 321 {offsetof(struct acpi_battery, oem_info), 1},
306}; 322};
307 323
324static struct acpi_offsets extended_info_offsets[] = {
325 {offsetof(struct acpi_battery, power_unit), 0},
326 {offsetof(struct acpi_battery, design_capacity), 0},
327 {offsetof(struct acpi_battery, full_charge_capacity), 0},
328 {offsetof(struct acpi_battery, technology), 0},
329 {offsetof(struct acpi_battery, design_voltage), 0},
330 {offsetof(struct acpi_battery, design_capacity_warning), 0},
331 {offsetof(struct acpi_battery, design_capacity_low), 0},
332 {offsetof(struct acpi_battery, cycle_count), 0},
333 {offsetof(struct acpi_battery, measurement_accuracy), 0},
334 {offsetof(struct acpi_battery, max_sampling_time), 0},
335 {offsetof(struct acpi_battery, min_sampling_time), 0},
336 {offsetof(struct acpi_battery, max_averaging_interval), 0},
337 {offsetof(struct acpi_battery, min_averaging_interval), 0},
338 {offsetof(struct acpi_battery, capacity_granularity_1), 0},
339 {offsetof(struct acpi_battery, capacity_granularity_2), 0},
340 {offsetof(struct acpi_battery, model_number), 1},
341 {offsetof(struct acpi_battery, serial_number), 1},
342 {offsetof(struct acpi_battery, type), 1},
343 {offsetof(struct acpi_battery, oem_info), 1},
344};
345
308static int extract_package(struct acpi_battery *battery, 346static int extract_package(struct acpi_battery *battery,
309 union acpi_object *package, 347 union acpi_object *package,
310 struct acpi_offsets *offsets, int num) 348 struct acpi_offsets *offsets, int num)
@@ -350,22 +388,29 @@ static int acpi_battery_get_info(struct acpi_battery *battery)
350{ 388{
351 int result = -EFAULT; 389 int result = -EFAULT;
352 acpi_status status = 0; 390 acpi_status status = 0;
391 char *name = test_bit(ACPI_BATTERY_XINFO_PRESENT, &battery->flags)?
392 "_BIX" : "_BIF";
393
353 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 394 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
354 395
355 if (!acpi_battery_present(battery)) 396 if (!acpi_battery_present(battery))
356 return 0; 397 return 0;
357 mutex_lock(&battery->lock); 398 mutex_lock(&battery->lock);
358 status = acpi_evaluate_object(battery->device->handle, "_BIF", 399 status = acpi_evaluate_object(battery->device->handle, name,
359 NULL, &buffer); 400 NULL, &buffer);
360 mutex_unlock(&battery->lock); 401 mutex_unlock(&battery->lock);
361 402
362 if (ACPI_FAILURE(status)) { 403 if (ACPI_FAILURE(status)) {
363 ACPI_EXCEPTION((AE_INFO, status, "Evaluating _BIF")); 404 ACPI_EXCEPTION((AE_INFO, status, "Evaluating %s", name));
364 return -ENODEV; 405 return -ENODEV;
365 } 406 }
366 407 if (test_bit(ACPI_BATTERY_XINFO_PRESENT, &battery->flags))
367 result = extract_package(battery, buffer.pointer, 408 result = extract_package(battery, buffer.pointer,
368 info_offsets, ARRAY_SIZE(info_offsets)); 409 extended_info_offsets,
410 ARRAY_SIZE(extended_info_offsets));
411 else
412 result = extract_package(battery, buffer.pointer,
413 info_offsets, ARRAY_SIZE(info_offsets));
369 kfree(buffer.pointer); 414 kfree(buffer.pointer);
370 return result; 415 return result;
371} 416}
@@ -399,7 +444,7 @@ static int acpi_battery_get_state(struct acpi_battery *battery)
399 battery->update_time = jiffies; 444 battery->update_time = jiffies;
400 kfree(buffer.pointer); 445 kfree(buffer.pointer);
401 446
402 if ((battery->quirks & QUIRK_SIGNED16_CURRENT) && 447 if (test_bit(ACPI_BATTERY_QUIRK_SIGNED16_CURRENT, &battery->flags) &&
403 battery->rate_now != -1) 448 battery->rate_now != -1)
404 battery->rate_now = abs((s16)battery->rate_now); 449 battery->rate_now = abs((s16)battery->rate_now);
405 450
@@ -412,7 +457,8 @@ static int acpi_battery_set_alarm(struct acpi_battery *battery)
412 union acpi_object arg0 = { .type = ACPI_TYPE_INTEGER }; 457 union acpi_object arg0 = { .type = ACPI_TYPE_INTEGER };
413 struct acpi_object_list arg_list = { 1, &arg0 }; 458 struct acpi_object_list arg_list = { 1, &arg0 };
414 459
415 if (!acpi_battery_present(battery)|| !battery->alarm_present) 460 if (!acpi_battery_present(battery) ||
461 !test_bit(ACPI_BATTERY_ALARM_PRESENT, &battery->flags))
416 return -ENODEV; 462 return -ENODEV;
417 463
418 arg0.integer.value = battery->alarm; 464 arg0.integer.value = battery->alarm;
@@ -437,10 +483,10 @@ static int acpi_battery_init_alarm(struct acpi_battery *battery)
437 /* See if alarms are supported, and if so, set default */ 483 /* See if alarms are supported, and if so, set default */
438 status = acpi_get_handle(battery->device->handle, "_BTP", &handle); 484 status = acpi_get_handle(battery->device->handle, "_BTP", &handle);
439 if (ACPI_FAILURE(status)) { 485 if (ACPI_FAILURE(status)) {
440 battery->alarm_present = 0; 486 clear_bit(ACPI_BATTERY_ALARM_PRESENT, &battery->flags);
441 return 0; 487 return 0;
442 } 488 }
443 battery->alarm_present = 1; 489 set_bit(ACPI_BATTERY_ALARM_PRESENT, &battery->flags);
444 if (!battery->alarm) 490 if (!battery->alarm)
445 battery->alarm = battery->design_capacity_warning; 491 battery->alarm = battery->design_capacity_warning;
446 return acpi_battery_set_alarm(battery); 492 return acpi_battery_set_alarm(battery);
@@ -510,9 +556,8 @@ static void sysfs_remove_battery(struct acpi_battery *battery)
510 556
511static void acpi_battery_quirks(struct acpi_battery *battery) 557static void acpi_battery_quirks(struct acpi_battery *battery)
512{ 558{
513 battery->quirks = 0;
514 if (dmi_name_in_vendors("Acer") && battery->power_unit) { 559 if (dmi_name_in_vendors("Acer") && battery->power_unit) {
515 battery->quirks |= QUIRK_SIGNED16_CURRENT; 560 set_bit(ACPI_BATTERY_QUIRK_SIGNED16_CURRENT, &battery->flags);
516 } 561 }
517} 562}
518 563
@@ -590,6 +635,7 @@ static int acpi_battery_print_info(struct seq_file *seq, int result)
590 seq_printf(seq, "design capacity low: %d %sh\n", 635 seq_printf(seq, "design capacity low: %d %sh\n",
591 battery->design_capacity_low, 636 battery->design_capacity_low,
592 acpi_battery_units(battery)); 637 acpi_battery_units(battery));
638 seq_printf(seq, "cycle count: %i\n", battery->cycle_count);
593 seq_printf(seq, "capacity granularity 1: %d %sh\n", 639 seq_printf(seq, "capacity granularity 1: %d %sh\n",
594 battery->capacity_granularity_1, 640 battery->capacity_granularity_1,
595 acpi_battery_units(battery)); 641 acpi_battery_units(battery));
@@ -841,6 +887,7 @@ static int acpi_battery_add(struct acpi_device *device)
841{ 887{
842 int result = 0; 888 int result = 0;
843 struct acpi_battery *battery = NULL; 889 struct acpi_battery *battery = NULL;
890 acpi_handle handle;
844 if (!device) 891 if (!device)
845 return -EINVAL; 892 return -EINVAL;
846 battery = kzalloc(sizeof(struct acpi_battery), GFP_KERNEL); 893 battery = kzalloc(sizeof(struct acpi_battery), GFP_KERNEL);
@@ -851,6 +898,9 @@ static int acpi_battery_add(struct acpi_device *device)
851 strcpy(acpi_device_class(device), ACPI_BATTERY_CLASS); 898 strcpy(acpi_device_class(device), ACPI_BATTERY_CLASS);
852 device->driver_data = battery; 899 device->driver_data = battery;
853 mutex_init(&battery->lock); 900 mutex_init(&battery->lock);
901 if (ACPI_SUCCESS(acpi_get_handle(battery->device->handle,
902 "_BIX", &handle)))
903 set_bit(ACPI_BATTERY_XINFO_PRESENT, &battery->flags);
854 acpi_battery_update(battery); 904 acpi_battery_update(battery);
855#ifdef CONFIG_ACPI_PROCFS_POWER 905#ifdef CONFIG_ACPI_PROCFS_POWER
856 result = acpi_battery_add_fs(device); 906 result = acpi_battery_add_fs(device);
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index a52126e46307..b70cd3756142 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -190,16 +190,16 @@ int acpi_bus_get_power(acpi_handle handle, int *state)
190 * Get the device's power state either directly (via _PSC) or 190 * Get the device's power state either directly (via _PSC) or
191 * indirectly (via power resources). 191 * indirectly (via power resources).
192 */ 192 */
193 if (device->power.flags.explicit_get) { 193 if (device->power.flags.power_resources) {
194 result = acpi_power_get_inferred_state(device);
195 if (result)
196 return result;
197 } else if (device->power.flags.explicit_get) {
194 status = acpi_evaluate_integer(device->handle, "_PSC", 198 status = acpi_evaluate_integer(device->handle, "_PSC",
195 NULL, &psc); 199 NULL, &psc);
196 if (ACPI_FAILURE(status)) 200 if (ACPI_FAILURE(status))
197 return -ENODEV; 201 return -ENODEV;
198 device->power.state = (int)psc; 202 device->power.state = (int)psc;
199 } else if (device->power.flags.power_resources) {
200 result = acpi_power_get_inferred_state(device);
201 if (result)
202 return result;
203 } 203 }
204 204
205 *state = device->power.state; 205 *state = device->power.state;
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c
index b2586f57e1f5..d9a85f1ddde6 100644
--- a/drivers/acpi/dock.c
+++ b/drivers/acpi/dock.c
@@ -605,7 +605,7 @@ register_hotplug_dock_device(acpi_handle handle, struct acpi_dock_ops *ops,
605 list_for_each_entry(dock_station, &dock_stations, sibling) { 605 list_for_each_entry(dock_station, &dock_stations, sibling) {
606 /* 606 /*
607 * An ATA bay can be in a dock and itself can be ejected 607 * An ATA bay can be in a dock and itself can be ejected
608 * seperately, so there are two 'dock stations' which need the 608 * separately, so there are two 'dock stations' which need the
609 * ops 609 * ops
610 */ 610 */
611 dd = find_dock_dependent_device(dock_station, handle); 611 dd = find_dock_dependent_device(dock_station, handle);
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index d7a6bbbb834c..1ac28c6a672e 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -76,8 +76,9 @@ enum ec_command {
76enum { 76enum {
77 EC_FLAGS_QUERY_PENDING, /* Query is pending */ 77 EC_FLAGS_QUERY_PENDING, /* Query is pending */
78 EC_FLAGS_GPE_STORM, /* GPE storm detected */ 78 EC_FLAGS_GPE_STORM, /* GPE storm detected */
79 EC_FLAGS_HANDLERS_INSTALLED /* Handlers for GPE and 79 EC_FLAGS_HANDLERS_INSTALLED, /* Handlers for GPE and
80 * OpReg are installed */ 80 * OpReg are installed */
81 EC_FLAGS_FROZEN, /* Transactions are suspended */
81}; 82};
82 83
83/* If we find an EC via the ECDT, we need to keep a ptr to its context */ 84/* If we find an EC via the ECDT, we need to keep a ptr to its context */
@@ -291,6 +292,10 @@ static int acpi_ec_transaction(struct acpi_ec *ec, struct transaction *t)
291 if (t->rdata) 292 if (t->rdata)
292 memset(t->rdata, 0, t->rlen); 293 memset(t->rdata, 0, t->rlen);
293 mutex_lock(&ec->lock); 294 mutex_lock(&ec->lock);
295 if (test_bit(EC_FLAGS_FROZEN, &ec->flags)) {
296 status = -EINVAL;
297 goto unlock;
298 }
294 if (ec->global_lock) { 299 if (ec->global_lock) {
295 status = acpi_acquire_global_lock(ACPI_EC_UDELAY_GLK, &glk); 300 status = acpi_acquire_global_lock(ACPI_EC_UDELAY_GLK, &glk);
296 if (ACPI_FAILURE(status)) { 301 if (ACPI_FAILURE(status)) {
@@ -453,6 +458,32 @@ int ec_transaction(u8 command,
453 458
454EXPORT_SYMBOL(ec_transaction); 459EXPORT_SYMBOL(ec_transaction);
455 460
461void acpi_ec_suspend_transactions(void)
462{
463 struct acpi_ec *ec = first_ec;
464
465 if (!ec)
466 return;
467
468 mutex_lock(&ec->lock);
469 /* Prevent transactions from being carried out */
470 set_bit(EC_FLAGS_FROZEN, &ec->flags);
471 mutex_unlock(&ec->lock);
472}
473
474void acpi_ec_resume_transactions(void)
475{
476 struct acpi_ec *ec = first_ec;
477
478 if (!ec)
479 return;
480
481 mutex_lock(&ec->lock);
482 /* Allow transactions to be carried out again */
483 clear_bit(EC_FLAGS_FROZEN, &ec->flags);
484 mutex_unlock(&ec->lock);
485}
486
456static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 * data) 487static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 * data)
457{ 488{
458 int result; 489 int result;
diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
index 9c4c962e46e3..e28411367239 100644
--- a/drivers/acpi/internal.h
+++ b/drivers/acpi/internal.h
@@ -49,6 +49,8 @@ void acpi_early_processor_set_pdc(void);
49int acpi_ec_init(void); 49int acpi_ec_init(void);
50int acpi_ec_ecdt_probe(void); 50int acpi_ec_ecdt_probe(void);
51int acpi_boot_ec_enable(void); 51int acpi_boot_ec_enable(void);
52void acpi_ec_suspend_transactions(void);
53void acpi_ec_resume_transactions(void);
52 54
53/*-------------------------------------------------------------------------- 55/*--------------------------------------------------------------------------
54 Suspend/Resume 56 Suspend/Resume
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c
index d0d25e2e1ced..1ac678d2c51c 100644
--- a/drivers/acpi/proc.c
+++ b/drivers/acpi/proc.c
@@ -435,7 +435,7 @@ acpi_system_write_wakeup_device(struct file *file,
435 found_dev->wakeup.gpe_device)) { 435 found_dev->wakeup.gpe_device)) {
436 printk(KERN_WARNING 436 printk(KERN_WARNING
437 "ACPI: '%s' and '%s' have the same GPE, " 437 "ACPI: '%s' and '%s' have the same GPE, "
438 "can't disable/enable one seperately\n", 438 "can't disable/enable one separately\n",
439 dev->pnp.bus_id, found_dev->pnp.bus_id); 439 dev->pnp.bus_id, found_dev->pnp.bus_id);
440 dev->wakeup.state.enabled = 440 dev->wakeup.state.enabled =
441 found_dev->wakeup.state.enabled; 441 found_dev->wakeup.state.enabled;
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index e9b7b402dbfb..791ac7b0f8df 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -1,383 +1,62 @@
1/* 1/*
2 * acpi_processor.c - ACPI Processor Driver ($Revision: 71 $) 2 * Copyright (C) 2005 Intel Corporation
3 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
3 * 4 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Alex Chiang <achiang@hp.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * - Unified x86/ia64 implementations
6 * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de> 7 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 8 * - Added _PDC for platforms with Intel CPUs
8 * - Added processor hotplug support
9 *
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or (at
15 * your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 * TBD:
28 * 1. Make # power states dynamic.
29 * 2. Support duty_cycle values that span bit 4.
30 * 3. Optimize by having scheduler determine business instead of
31 * having us try to calculate it here.
32 * 4. Need C1 timing -- must modify kernel (IRQ handler) to get this.
33 */ 9 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/types.h>
39#include <linux/pci.h>
40#include <linux/pm.h>
41#include <linux/cpufreq.h>
42#include <linux/cpu.h>
43#include <linux/proc_fs.h>
44#include <linux/seq_file.h>
45#include <linux/dmi.h> 10#include <linux/dmi.h>
46#include <linux/moduleparam.h>
47#include <linux/cpuidle.h>
48 11
49#include <asm/io.h>
50#include <asm/system.h>
51#include <asm/cpu.h>
52#include <asm/delay.h>
53#include <asm/uaccess.h>
54#include <asm/processor.h>
55#include <asm/smp.h>
56#include <asm/acpi.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/acpi_drivers.h> 12#include <acpi/acpi_drivers.h>
60#include <acpi/processor.h> 13#include <acpi/processor.h>
61 14
62#define PREFIX "ACPI: " 15#include "internal.h"
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define ACPI_PROCESSOR_DEVICE_NAME "Processor"
66#define ACPI_PROCESSOR_FILE_INFO "info"
67#define ACPI_PROCESSOR_FILE_THROTTLING "throttling"
68#define ACPI_PROCESSOR_FILE_LIMIT "limit"
69#define ACPI_PROCESSOR_NOTIFY_PERFORMANCE 0x80
70#define ACPI_PROCESSOR_NOTIFY_POWER 0x81
71#define ACPI_PROCESSOR_NOTIFY_THROTTLING 0x82
72
73#define ACPI_PROCESSOR_LIMIT_USER 0
74#define ACPI_PROCESSOR_LIMIT_THERMAL 1
75 16
17#define PREFIX "ACPI: "
76#define _COMPONENT ACPI_PROCESSOR_COMPONENT 18#define _COMPONENT ACPI_PROCESSOR_COMPONENT
77ACPI_MODULE_NAME("processor_core"); 19ACPI_MODULE_NAME("processor_core");
78 20
79MODULE_AUTHOR("Paul Diefenbaugh"); 21static int set_no_mwait(const struct dmi_system_id *id)
80MODULE_DESCRIPTION("ACPI Processor Driver");
81MODULE_LICENSE("GPL");
82
83static int acpi_processor_add(struct acpi_device *device);
84static int acpi_processor_remove(struct acpi_device *device, int type);
85#ifdef CONFIG_ACPI_PROCFS
86static int acpi_processor_info_open_fs(struct inode *inode, struct file *file);
87#endif
88static void acpi_processor_notify(struct acpi_device *device, u32 event);
89static acpi_status acpi_processor_hotadd_init(acpi_handle handle, int *p_cpu);
90static int acpi_processor_handle_eject(struct acpi_processor *pr);
91
92
93static const struct acpi_device_id processor_device_ids[] = {
94 {ACPI_PROCESSOR_OBJECT_HID, 0},
95 {"ACPI0007", 0},
96 {"", 0},
97};
98MODULE_DEVICE_TABLE(acpi, processor_device_ids);
99
100static struct acpi_driver acpi_processor_driver = {
101 .name = "processor",
102 .class = ACPI_PROCESSOR_CLASS,
103 .ids = processor_device_ids,
104 .ops = {
105 .add = acpi_processor_add,
106 .remove = acpi_processor_remove,
107 .suspend = acpi_processor_suspend,
108 .resume = acpi_processor_resume,
109 .notify = acpi_processor_notify,
110 },
111};
112
113#define INSTALL_NOTIFY_HANDLER 1
114#define UNINSTALL_NOTIFY_HANDLER 2
115#ifdef CONFIG_ACPI_PROCFS
116static const struct file_operations acpi_processor_info_fops = {
117 .owner = THIS_MODULE,
118 .open = acpi_processor_info_open_fs,
119 .read = seq_read,
120 .llseek = seq_lseek,
121 .release = single_release,
122};
123#endif
124
125DEFINE_PER_CPU(struct acpi_processor *, processors);
126EXPORT_PER_CPU_SYMBOL(processors);
127
128struct acpi_processor_errata errata __read_mostly;
129
130/* --------------------------------------------------------------------------
131 Errata Handling
132 -------------------------------------------------------------------------- */
133
134static int acpi_processor_errata_piix4(struct pci_dev *dev)
135{ 22{
136 u8 value1 = 0; 23 printk(KERN_NOTICE PREFIX "%s detected - "
137 u8 value2 = 0; 24 "disabling mwait for CPU C-states\n", id->ident);
138 25 idle_nomwait = 1;
139
140 if (!dev)
141 return -EINVAL;
142
143 /*
144 * Note that 'dev' references the PIIX4 ACPI Controller.
145 */
146
147 switch (dev->revision) {
148 case 0:
149 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 A-step\n"));
150 break;
151 case 1:
152 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 B-step\n"));
153 break;
154 case 2:
155 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4E\n"));
156 break;
157 case 3:
158 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4M\n"));
159 break;
160 default:
161 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found unknown PIIX4\n"));
162 break;
163 }
164
165 switch (dev->revision) {
166
167 case 0: /* PIIX4 A-step */
168 case 1: /* PIIX4 B-step */
169 /*
170 * See specification changes #13 ("Manual Throttle Duty Cycle")
171 * and #14 ("Enabling and Disabling Manual Throttle"), plus
172 * erratum #5 ("STPCLK# Deassertion Time") from the January
173 * 2002 PIIX4 specification update. Applies to only older
174 * PIIX4 models.
175 */
176 errata.piix4.throttle = 1;
177
178 case 2: /* PIIX4E */
179 case 3: /* PIIX4M */
180 /*
181 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
182 * Livelock") from the January 2002 PIIX4 specification update.
183 * Applies to all PIIX4 models.
184 */
185
186 /*
187 * BM-IDE
188 * ------
189 * Find the PIIX4 IDE Controller and get the Bus Master IDE
190 * Status register address. We'll use this later to read
191 * each IDE controller's DMA status to make sure we catch all
192 * DMA activity.
193 */
194 dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
195 PCI_DEVICE_ID_INTEL_82371AB,
196 PCI_ANY_ID, PCI_ANY_ID, NULL);
197 if (dev) {
198 errata.piix4.bmisx = pci_resource_start(dev, 4);
199 pci_dev_put(dev);
200 }
201
202 /*
203 * Type-F DMA
204 * ----------
205 * Find the PIIX4 ISA Controller and read the Motherboard
206 * DMA controller's status to see if Type-F (Fast) DMA mode
207 * is enabled (bit 7) on either channel. Note that we'll
208 * disable C3 support if this is enabled, as some legacy
209 * devices won't operate well if fast DMA is disabled.
210 */
211 dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
212 PCI_DEVICE_ID_INTEL_82371AB_0,
213 PCI_ANY_ID, PCI_ANY_ID, NULL);
214 if (dev) {
215 pci_read_config_byte(dev, 0x76, &value1);
216 pci_read_config_byte(dev, 0x77, &value2);
217 if ((value1 & 0x80) || (value2 & 0x80))
218 errata.piix4.fdma = 1;
219 pci_dev_put(dev);
220 }
221
222 break;
223 }
224
225 if (errata.piix4.bmisx)
226 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
227 "Bus master activity detection (BM-IDE) erratum enabled\n"));
228 if (errata.piix4.fdma)
229 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
230 "Type-F DMA livelock erratum (C3 disabled)\n"));
231
232 return 0; 26 return 0;
233} 27}
234 28
235static int acpi_processor_errata(struct acpi_processor *pr) 29static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = {
236{ 30 {
237 int result = 0; 31 set_no_mwait, "IFL91 board", {
238 struct pci_dev *dev = NULL; 32 DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"),
239 33 DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"),
240 34 DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"),
241 if (!pr) 35 DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL},
242 return -EINVAL; 36 {
243 37 set_no_mwait, "Extensa 5220", {
244 /* 38 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
245 * PIIX4 39 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
246 */ 40 DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),
247 dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, 41 DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL},
248 PCI_DEVICE_ID_INTEL_82371AB_3, PCI_ANY_ID, 42 {},
249 PCI_ANY_ID, NULL); 43};
250 if (dev) {
251 result = acpi_processor_errata_piix4(dev);
252 pci_dev_put(dev);
253 }
254
255 return result;
256}
257
258/* --------------------------------------------------------------------------
259 FS Interface (/proc)
260 -------------------------------------------------------------------------- */
261
262#ifdef CONFIG_ACPI_PROCFS
263static struct proc_dir_entry *acpi_processor_dir = NULL;
264
265static int acpi_processor_info_seq_show(struct seq_file *seq, void *offset)
266{
267 struct acpi_processor *pr = seq->private;
268
269
270 if (!pr)
271 goto end;
272
273 seq_printf(seq, "processor id: %d\n"
274 "acpi id: %d\n"
275 "bus mastering control: %s\n"
276 "power management: %s\n"
277 "throttling control: %s\n"
278 "limit interface: %s\n",
279 pr->id,
280 pr->acpi_id,
281 pr->flags.bm_control ? "yes" : "no",
282 pr->flags.power ? "yes" : "no",
283 pr->flags.throttling ? "yes" : "no",
284 pr->flags.limit ? "yes" : "no");
285
286 end:
287 return 0;
288}
289
290static int acpi_processor_info_open_fs(struct inode *inode, struct file *file)
291{
292 return single_open(file, acpi_processor_info_seq_show,
293 PDE(inode)->data);
294}
295
296static int __cpuinit acpi_processor_add_fs(struct acpi_device *device)
297{
298 struct proc_dir_entry *entry = NULL;
299
300
301 if (!acpi_device_dir(device)) {
302 acpi_device_dir(device) = proc_mkdir(acpi_device_bid(device),
303 acpi_processor_dir);
304 if (!acpi_device_dir(device))
305 return -ENODEV;
306 }
307
308 /* 'info' [R] */
309 entry = proc_create_data(ACPI_PROCESSOR_FILE_INFO,
310 S_IRUGO, acpi_device_dir(device),
311 &acpi_processor_info_fops,
312 acpi_driver_data(device));
313 if (!entry)
314 return -EIO;
315
316 /* 'throttling' [R/W] */
317 entry = proc_create_data(ACPI_PROCESSOR_FILE_THROTTLING,
318 S_IFREG | S_IRUGO | S_IWUSR,
319 acpi_device_dir(device),
320 &acpi_processor_throttling_fops,
321 acpi_driver_data(device));
322 if (!entry)
323 return -EIO;
324
325 /* 'limit' [R/W] */
326 entry = proc_create_data(ACPI_PROCESSOR_FILE_LIMIT,
327 S_IFREG | S_IRUGO | S_IWUSR,
328 acpi_device_dir(device),
329 &acpi_processor_limit_fops,
330 acpi_driver_data(device));
331 if (!entry)
332 return -EIO;
333 return 0;
334}
335static int acpi_processor_remove_fs(struct acpi_device *device)
336{
337
338 if (acpi_device_dir(device)) {
339 remove_proc_entry(ACPI_PROCESSOR_FILE_INFO,
340 acpi_device_dir(device));
341 remove_proc_entry(ACPI_PROCESSOR_FILE_THROTTLING,
342 acpi_device_dir(device));
343 remove_proc_entry(ACPI_PROCESSOR_FILE_LIMIT,
344 acpi_device_dir(device));
345 remove_proc_entry(acpi_device_bid(device), acpi_processor_dir);
346 acpi_device_dir(device) = NULL;
347 }
348
349 return 0;
350}
351#else
352static inline int acpi_processor_add_fs(struct acpi_device *device)
353{
354 return 0;
355}
356static inline int acpi_processor_remove_fs(struct acpi_device *device)
357{
358 return 0;
359}
360#endif
361
362/* Use the acpiid in MADT to map cpus in case of SMP */
363
364#ifndef CONFIG_SMP
365static int get_cpu_id(acpi_handle handle, int type, u32 acpi_id) { return -1; }
366#else
367
368static struct acpi_table_madt *madt;
369 44
45#ifdef CONFIG_SMP
370static int map_lapic_id(struct acpi_subtable_header *entry, 46static int map_lapic_id(struct acpi_subtable_header *entry,
371 u32 acpi_id, int *apic_id) 47 u32 acpi_id, int *apic_id)
372{ 48{
373 struct acpi_madt_local_apic *lapic = 49 struct acpi_madt_local_apic *lapic =
374 (struct acpi_madt_local_apic *)entry; 50 (struct acpi_madt_local_apic *)entry;
375 if ((lapic->lapic_flags & ACPI_MADT_ENABLED) && 51
376 lapic->processor_id == acpi_id) { 52 if (!(lapic->lapic_flags & ACPI_MADT_ENABLED))
377 *apic_id = lapic->id; 53 return 0;
378 return 1; 54
379 } 55 if (lapic->processor_id != acpi_id)
380 return 0; 56 return 0;
57
58 *apic_id = lapic->id;
59 return 1;
381} 60}
382 61
383static int map_x2apic_id(struct acpi_subtable_header *entry, 62static int map_x2apic_id(struct acpi_subtable_header *entry,
@@ -385,22 +64,16 @@ static int map_x2apic_id(struct acpi_subtable_header *entry,
385{ 64{
386 struct acpi_madt_local_x2apic *apic = 65 struct acpi_madt_local_x2apic *apic =
387 (struct acpi_madt_local_x2apic *)entry; 66 (struct acpi_madt_local_x2apic *)entry;
388 u32 tmp = apic->local_apic_id;
389 67
390 /* Only check enabled APICs*/
391 if (!(apic->lapic_flags & ACPI_MADT_ENABLED)) 68 if (!(apic->lapic_flags & ACPI_MADT_ENABLED))
392 return 0; 69 return 0;
393 70
394 /* Device statement declaration type */ 71 if (device_declaration && (apic->uid == acpi_id)) {
395 if (device_declaration) { 72 *apic_id = apic->local_apic_id;
396 if (apic->uid == acpi_id) 73 return 1;
397 goto found;
398 } 74 }
399 75
400 return 0; 76 return 0;
401found:
402 *apic_id = tmp;
403 return 1;
404} 77}
405 78
406static int map_lsapic_id(struct acpi_subtable_header *entry, 79static int map_lsapic_id(struct acpi_subtable_header *entry,
@@ -408,35 +81,34 @@ static int map_lsapic_id(struct acpi_subtable_header *entry,
408{ 81{
409 struct acpi_madt_local_sapic *lsapic = 82 struct acpi_madt_local_sapic *lsapic =
410 (struct acpi_madt_local_sapic *)entry; 83 (struct acpi_madt_local_sapic *)entry;
411 u32 tmp = (lsapic->id << 8) | lsapic->eid;
412 84
413 /* Only check enabled APICs*/
414 if (!(lsapic->lapic_flags & ACPI_MADT_ENABLED)) 85 if (!(lsapic->lapic_flags & ACPI_MADT_ENABLED))
415 return 0; 86 return 0;
416 87
417 /* Device statement declaration type */
418 if (device_declaration) { 88 if (device_declaration) {
419 if (entry->length < 16) 89 if ((entry->length < 16) || (lsapic->uid != acpi_id))
420 printk(KERN_ERR PREFIX 90 return 0;
421 "Invalid LSAPIC with Device type processor (SAPIC ID %#x)\n", 91 } else if (lsapic->processor_id != acpi_id)
422 tmp); 92 return 0;
423 else if (lsapic->uid == acpi_id)
424 goto found;
425 /* Processor statement declaration type */
426 } else if (lsapic->processor_id == acpi_id)
427 goto found;
428 93
429 return 0; 94 *apic_id = (lsapic->id << 8) | lsapic->eid;
430found:
431 *apic_id = tmp;
432 return 1; 95 return 1;
433} 96}
434 97
435static int map_madt_entry(int type, u32 acpi_id) 98static int map_madt_entry(int type, u32 acpi_id)
436{ 99{
437 unsigned long madt_end, entry; 100 unsigned long madt_end, entry;
101 static struct acpi_table_madt *madt;
102 static int read_madt;
438 int apic_id = -1; 103 int apic_id = -1;
439 104
105 if (!read_madt) {
106 if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_MADT, 0,
107 (struct acpi_table_header **)&madt)))
108 madt = NULL;
109 read_madt++;
110 }
111
440 if (!madt) 112 if (!madt)
441 return apic_id; 113 return apic_id;
442 114
@@ -496,7 +168,7 @@ exit:
496 return apic_id; 168 return apic_id;
497} 169}
498 170
499static int get_cpu_id(acpi_handle handle, int type, u32 acpi_id) 171int acpi_get_cpuid(acpi_handle handle, int type, u32 acpi_id)
500{ 172{
501 int i; 173 int i;
502 int apic_id = -1; 174 int apic_id = -1;
@@ -513,630 +185,170 @@ static int get_cpu_id(acpi_handle handle, int type, u32 acpi_id)
513 } 185 }
514 return -1; 186 return -1;
515} 187}
188EXPORT_SYMBOL_GPL(acpi_get_cpuid);
516#endif 189#endif
517 190
518/* -------------------------------------------------------------------------- 191static bool processor_physically_present(acpi_handle handle)
519 Driver Interface
520 -------------------------------------------------------------------------- */
521
522static int acpi_processor_get_info(struct acpi_device *device)
523{ 192{
524 acpi_status status = 0; 193 int cpuid, type;
194 u32 acpi_id;
195 acpi_status status;
196 acpi_object_type acpi_type;
197 unsigned long long tmp;
525 union acpi_object object = { 0 }; 198 union acpi_object object = { 0 };
526 struct acpi_buffer buffer = { sizeof(union acpi_object), &object }; 199 struct acpi_buffer buffer = { sizeof(union acpi_object), &object };
527 struct acpi_processor *pr;
528 int cpu_index, device_declaration = 0;
529 static int cpu0_initialized;
530
531 pr = acpi_driver_data(device);
532 if (!pr)
533 return -EINVAL;
534
535 if (num_online_cpus() > 1)
536 errata.smp = TRUE;
537
538 acpi_processor_errata(pr);
539
540 /*
541 * Check to see if we have bus mastering arbitration control. This
542 * is required for proper C3 usage (to maintain cache coherency).
543 */
544 if (acpi_gbl_FADT.pm2_control_block && acpi_gbl_FADT.pm2_control_length) {
545 pr->flags.bm_control = 1;
546 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
547 "Bus mastering arbitration control present\n"));
548 } else
549 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
550 "No bus mastering arbitration control\n"));
551
552 if (!strcmp(acpi_device_hid(device), ACPI_PROCESSOR_OBJECT_HID)) {
553 /* Declared with "Processor" statement; match ProcessorID */
554 status = acpi_evaluate_object(pr->handle, NULL, NULL, &buffer);
555 if (ACPI_FAILURE(status)) {
556 printk(KERN_ERR PREFIX "Evaluating processor object\n");
557 return -ENODEV;
558 }
559
560 /*
561 * TBD: Synch processor ID (via LAPIC/LSAPIC structures) on SMP.
562 * >>> 'acpi_get_processor_id(acpi_id, &id)' in
563 * arch/xxx/acpi.c
564 */
565 pr->acpi_id = object.processor.proc_id;
566 } else {
567 /*
568 * Declared with "Device" statement; match _UID.
569 * Note that we don't handle string _UIDs yet.
570 */
571 unsigned long long value;
572 status = acpi_evaluate_integer(pr->handle, METHOD_NAME__UID,
573 NULL, &value);
574 if (ACPI_FAILURE(status)) {
575 printk(KERN_ERR PREFIX
576 "Evaluating processor _UID [%#x]\n", status);
577 return -ENODEV;
578 }
579 device_declaration = 1;
580 pr->acpi_id = value;
581 }
582 cpu_index = get_cpu_id(pr->handle, device_declaration, pr->acpi_id);
583
584 /* Handle UP system running SMP kernel, with no LAPIC in MADT */
585 if (!cpu0_initialized && (cpu_index == -1) &&
586 (num_online_cpus() == 1)) {
587 cpu_index = 0;
588 }
589
590 cpu0_initialized = 1;
591
592 pr->id = cpu_index;
593
594 /*
595 * Extra Processor objects may be enumerated on MP systems with
596 * less than the max # of CPUs. They should be ignored _iff
597 * they are physically not present.
598 */
599 if (pr->id == -1) {
600 if (ACPI_FAILURE
601 (acpi_processor_hotadd_init(pr->handle, &pr->id))) {
602 return -ENODEV;
603 }
604 }
605 /*
606 * On some boxes several processors use the same processor bus id.
607 * But they are located in different scope. For example:
608 * \_SB.SCK0.CPU0
609 * \_SB.SCK1.CPU0
610 * Rename the processor device bus id. And the new bus id will be
611 * generated as the following format:
612 * CPU+CPU ID.
613 */
614 sprintf(acpi_device_bid(device), "CPU%X", pr->id);
615 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Processor [%d:%d]\n", pr->id,
616 pr->acpi_id));
617
618 if (!object.processor.pblk_address)
619 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No PBLK (NULL address)\n"));
620 else if (object.processor.pblk_length != 6)
621 printk(KERN_ERR PREFIX "Invalid PBLK length [%d]\n",
622 object.processor.pblk_length);
623 else {
624 pr->throttling.address = object.processor.pblk_address;
625 pr->throttling.duty_offset = acpi_gbl_FADT.duty_offset;
626 pr->throttling.duty_width = acpi_gbl_FADT.duty_width;
627
628 pr->pblk = object.processor.pblk_address;
629
630 /*
631 * We don't care about error returns - we just try to mark
632 * these reserved so that nobody else is confused into thinking
633 * that this region might be unused..
634 *
635 * (In particular, allocating the IO range for Cardbus)
636 */
637 request_region(pr->throttling.address, 6, "ACPI CPU throttle");
638 }
639
640 /*
641 * If ACPI describes a slot number for this CPU, we can use it
642 * ensure we get the right value in the "physical id" field
643 * of /proc/cpuinfo
644 */
645 status = acpi_evaluate_object(pr->handle, "_SUN", NULL, &buffer);
646 if (ACPI_SUCCESS(status))
647 arch_fix_phys_package_id(pr->id, object.integer.value);
648
649 return 0;
650}
651
652static DEFINE_PER_CPU(void *, processor_device_array);
653
654static void acpi_processor_notify(struct acpi_device *device, u32 event)
655{
656 struct acpi_processor *pr = acpi_driver_data(device);
657 int saved;
658
659 if (!pr)
660 return;
661 200
662 switch (event) { 201 status = acpi_get_type(handle, &acpi_type);
663 case ACPI_PROCESSOR_NOTIFY_PERFORMANCE: 202 if (ACPI_FAILURE(status))
664 saved = pr->performance_platform_limit; 203 return false;
665 acpi_processor_ppc_has_changed(pr, 1); 204
666 if (saved == pr->performance_platform_limit) 205 switch (acpi_type) {
667 break; 206 case ACPI_TYPE_PROCESSOR:
668 acpi_bus_generate_proc_event(device, event, 207 status = acpi_evaluate_object(handle, NULL, NULL, &buffer);
669 pr->performance_platform_limit); 208 if (ACPI_FAILURE(status))
670 acpi_bus_generate_netlink_event(device->pnp.device_class, 209 return false;
671 dev_name(&device->dev), event, 210 acpi_id = object.processor.proc_id;
672 pr->performance_platform_limit);
673 break; 211 break;
674 case ACPI_PROCESSOR_NOTIFY_POWER: 212 case ACPI_TYPE_DEVICE:
675 acpi_processor_cst_has_changed(pr); 213 status = acpi_evaluate_integer(handle, "_UID", NULL, &tmp);
676 acpi_bus_generate_proc_event(device, event, 0); 214 if (ACPI_FAILURE(status))
677 acpi_bus_generate_netlink_event(device->pnp.device_class, 215 return false;
678 dev_name(&device->dev), event, 0); 216 acpi_id = tmp;
679 break; 217 break;
680 case ACPI_PROCESSOR_NOTIFY_THROTTLING:
681 acpi_processor_tstate_has_changed(pr);
682 acpi_bus_generate_proc_event(device, event, 0);
683 acpi_bus_generate_netlink_event(device->pnp.device_class,
684 dev_name(&device->dev), event, 0);
685 default: 218 default:
686 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 219 return false;
687 "Unsupported event [0x%x]\n", event));
688 break;
689 } 220 }
690 221
691 return; 222 type = (acpi_type == ACPI_TYPE_DEVICE) ? 1 : 0;
692} 223 cpuid = acpi_get_cpuid(handle, type, acpi_id);
693 224
694static int acpi_cpu_soft_notify(struct notifier_block *nfb, 225 if (cpuid == -1)
695 unsigned long action, void *hcpu) 226 return false;
696{
697 unsigned int cpu = (unsigned long)hcpu;
698 struct acpi_processor *pr = per_cpu(processors, cpu);
699 227
700 if (action == CPU_ONLINE && pr) { 228 return true;
701 acpi_processor_ppc_has_changed(pr, 0);
702 acpi_processor_cst_has_changed(pr);
703 acpi_processor_tstate_has_changed(pr);
704 }
705 return NOTIFY_OK;
706} 229}
707 230
708static struct notifier_block acpi_cpu_notifier = 231static void acpi_set_pdc_bits(u32 *buf)
709{ 232{
710 .notifier_call = acpi_cpu_soft_notify, 233 buf[0] = ACPI_PDC_REVISION_ID;
711}; 234 buf[1] = 1;
712
713static int __cpuinit acpi_processor_add(struct acpi_device *device)
714{
715 struct acpi_processor *pr = NULL;
716 int result = 0;
717 struct sys_device *sysdev;
718
719 pr = kzalloc(sizeof(struct acpi_processor), GFP_KERNEL);
720 if (!pr)
721 return -ENOMEM;
722
723 if (!zalloc_cpumask_var(&pr->throttling.shared_cpu_map, GFP_KERNEL)) {
724 kfree(pr);
725 return -ENOMEM;
726 }
727
728 pr->handle = device->handle;
729 strcpy(acpi_device_name(device), ACPI_PROCESSOR_DEVICE_NAME);
730 strcpy(acpi_device_class(device), ACPI_PROCESSOR_CLASS);
731 device->driver_data = pr;
732
733 result = acpi_processor_get_info(device);
734 if (result) {
735 /* Processor is physically not present */
736 return 0;
737 }
738
739 BUG_ON((pr->id >= nr_cpu_ids) || (pr->id < 0));
740
741 /*
742 * Buggy BIOS check
743 * ACPI id of processors can be reported wrongly by the BIOS.
744 * Don't trust it blindly
745 */
746 if (per_cpu(processor_device_array, pr->id) != NULL &&
747 per_cpu(processor_device_array, pr->id) != device) {
748 printk(KERN_WARNING "BIOS reported wrong ACPI id "
749 "for the processor\n");
750 result = -ENODEV;
751 goto err_free_cpumask;
752 }
753 per_cpu(processor_device_array, pr->id) = device;
754 235
755 per_cpu(processors, pr->id) = pr; 236 /* Enable coordination with firmware's _TSD info */
237 buf[2] = ACPI_PDC_SMP_T_SWCOORD;
756 238
757 result = acpi_processor_add_fs(device); 239 /* Twiddle arch-specific bits needed for _PDC */
758 if (result) 240 arch_acpi_set_pdc_bits(buf);
759 goto err_free_cpumask;
760
761 sysdev = get_cpu_sysdev(pr->id);
762 if (sysfs_create_link(&device->dev.kobj, &sysdev->kobj, "sysdev")) {
763 result = -EFAULT;
764 goto err_remove_fs;
765 }
766
767 /* _PDC call should be done before doing anything else (if reqd.). */
768 acpi_processor_set_pdc(pr->handle);
769
770#ifdef CONFIG_CPU_FREQ
771 acpi_processor_ppc_has_changed(pr, 0);
772#endif
773 acpi_processor_get_throttling_info(pr);
774 acpi_processor_get_limit_info(pr);
775
776
777 acpi_processor_power_init(pr, device);
778
779 pr->cdev = thermal_cooling_device_register("Processor", device,
780 &processor_cooling_ops);
781 if (IS_ERR(pr->cdev)) {
782 result = PTR_ERR(pr->cdev);
783 goto err_power_exit;
784 }
785
786 dev_dbg(&device->dev, "registered as cooling_device%d\n",
787 pr->cdev->id);
788
789 result = sysfs_create_link(&device->dev.kobj,
790 &pr->cdev->device.kobj,
791 "thermal_cooling");
792 if (result) {
793 printk(KERN_ERR PREFIX "Create sysfs link\n");
794 goto err_thermal_unregister;
795 }
796 result = sysfs_create_link(&pr->cdev->device.kobj,
797 &device->dev.kobj,
798 "device");
799 if (result) {
800 printk(KERN_ERR PREFIX "Create sysfs link\n");
801 goto err_remove_sysfs;
802 }
803
804 return 0;
805
806err_remove_sysfs:
807 sysfs_remove_link(&device->dev.kobj, "thermal_cooling");
808err_thermal_unregister:
809 thermal_cooling_device_unregister(pr->cdev);
810err_power_exit:
811 acpi_processor_power_exit(pr, device);
812err_remove_fs:
813 acpi_processor_remove_fs(device);
814err_free_cpumask:
815 free_cpumask_var(pr->throttling.shared_cpu_map);
816
817 return result;
818} 241}
819 242
820static int acpi_processor_remove(struct acpi_device *device, int type) 243static struct acpi_object_list *acpi_processor_alloc_pdc(void)
821{ 244{
822 struct acpi_processor *pr = NULL; 245 struct acpi_object_list *obj_list;
823 246 union acpi_object *obj;
824 247 u32 *buf;
825 if (!device || !acpi_driver_data(device))
826 return -EINVAL;
827
828 pr = acpi_driver_data(device);
829
830 if (pr->id >= nr_cpu_ids)
831 goto free;
832 248
833 if (type == ACPI_BUS_REMOVAL_EJECT) { 249 /* allocate and initialize pdc. It will be used later. */
834 if (acpi_processor_handle_eject(pr)) 250 obj_list = kmalloc(sizeof(struct acpi_object_list), GFP_KERNEL);
835 return -EINVAL; 251 if (!obj_list) {
252 printk(KERN_ERR "Memory allocation error\n");
253 return NULL;
836 } 254 }
837 255
838 acpi_processor_power_exit(pr, device); 256 obj = kmalloc(sizeof(union acpi_object), GFP_KERNEL);
839 257 if (!obj) {
840 sysfs_remove_link(&device->dev.kobj, "sysdev"); 258 printk(KERN_ERR "Memory allocation error\n");
841 259 kfree(obj_list);
842 acpi_processor_remove_fs(device); 260 return NULL;
843
844 if (pr->cdev) {
845 sysfs_remove_link(&device->dev.kobj, "thermal_cooling");
846 sysfs_remove_link(&pr->cdev->device.kobj, "device");
847 thermal_cooling_device_unregister(pr->cdev);
848 pr->cdev = NULL;
849 } 261 }
850 262
851 per_cpu(processors, pr->id) = NULL; 263 buf = kmalloc(12, GFP_KERNEL);
852 per_cpu(processor_device_array, pr->id) = NULL; 264 if (!buf) {
853 265 printk(KERN_ERR "Memory allocation error\n");
854free: 266 kfree(obj);
855 free_cpumask_var(pr->throttling.shared_cpu_map); 267 kfree(obj_list);
856 kfree(pr); 268 return NULL;
857
858 return 0;
859}
860
861#ifdef CONFIG_ACPI_HOTPLUG_CPU
862/****************************************************************************
863 * Acpi processor hotplug support *
864 ****************************************************************************/
865
866static int is_processor_present(acpi_handle handle)
867{
868 acpi_status status;
869 unsigned long long sta = 0;
870
871
872 status = acpi_evaluate_integer(handle, "_STA", NULL, &sta);
873
874 if (ACPI_SUCCESS(status) && (sta & ACPI_STA_DEVICE_PRESENT))
875 return 1;
876
877 /*
878 * _STA is mandatory for a processor that supports hot plug
879 */
880 if (status == AE_NOT_FOUND)
881 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
882 "Processor does not support hot plug\n"));
883 else
884 ACPI_EXCEPTION((AE_INFO, status,
885 "Processor Device is not present"));
886 return 0;
887}
888
889static
890int acpi_processor_device_add(acpi_handle handle, struct acpi_device **device)
891{
892 acpi_handle phandle;
893 struct acpi_device *pdev;
894
895
896 if (acpi_get_parent(handle, &phandle)) {
897 return -ENODEV;
898 } 269 }
899 270
900 if (acpi_bus_get_device(phandle, &pdev)) { 271 acpi_set_pdc_bits(buf);
901 return -ENODEV;
902 }
903 272
904 if (acpi_bus_add(device, pdev, handle, ACPI_BUS_TYPE_PROCESSOR)) { 273 obj->type = ACPI_TYPE_BUFFER;
905 return -ENODEV; 274 obj->buffer.length = 12;
906 } 275 obj->buffer.pointer = (u8 *) buf;
276 obj_list->count = 1;
277 obj_list->pointer = obj;
907 278
908 return 0; 279 return obj_list;
909} 280}
910 281
911static void __ref acpi_processor_hotplug_notify(acpi_handle handle, 282/*
912 u32 event, void *data) 283 * _PDC is required for a BIOS-OS handshake for most of the newer
284 * ACPI processor features.
285 */
286static int
287acpi_processor_eval_pdc(acpi_handle handle, struct acpi_object_list *pdc_in)
913{ 288{
914 struct acpi_processor *pr; 289 acpi_status status = AE_OK;
915 struct acpi_device *device = NULL;
916 int result;
917
918 290
919 switch (event) { 291 if (idle_nomwait) {
920 case ACPI_NOTIFY_BUS_CHECK: 292 /*
921 case ACPI_NOTIFY_DEVICE_CHECK: 293 * If mwait is disabled for CPU C-states, the C2C3_FFH access
922 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 294 * mode will be disabled in the parameter of _PDC object.
923 "Processor driver received %s event\n", 295 * Of course C1_FFH access mode will also be disabled.
924 (event == ACPI_NOTIFY_BUS_CHECK) ? 296 */
925 "ACPI_NOTIFY_BUS_CHECK" : "ACPI_NOTIFY_DEVICE_CHECK")); 297 union acpi_object *obj;
926 298 u32 *buffer = NULL;
927 if (!is_processor_present(handle))
928 break;
929 299
930 if (acpi_bus_get_device(handle, &device)) { 300 obj = pdc_in->pointer;
931 result = acpi_processor_device_add(handle, &device); 301 buffer = (u32 *)(obj->buffer.pointer);
932 if (result) 302 buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH);
933 printk(KERN_ERR PREFIX
934 "Unable to add the device\n");
935 break;
936 }
937 break;
938 case ACPI_NOTIFY_EJECT_REQUEST:
939 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
940 "received ACPI_NOTIFY_EJECT_REQUEST\n"));
941 303
942 if (acpi_bus_get_device(handle, &device)) {
943 printk(KERN_ERR PREFIX
944 "Device don't exist, dropping EJECT\n");
945 break;
946 }
947 pr = acpi_driver_data(device);
948 if (!pr) {
949 printk(KERN_ERR PREFIX
950 "Driver data is NULL, dropping EJECT\n");
951 return;
952 }
953 break;
954 default:
955 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
956 "Unsupported event [0x%x]\n", event));
957 break;
958 } 304 }
305 status = acpi_evaluate_object(handle, "_PDC", pdc_in, NULL);
959 306
960 return;
961}
962
963static acpi_status
964processor_walk_namespace_cb(acpi_handle handle,
965 u32 lvl, void *context, void **rv)
966{
967 acpi_status status;
968 int *action = context;
969 acpi_object_type type = 0;
970
971 status = acpi_get_type(handle, &type);
972 if (ACPI_FAILURE(status)) 307 if (ACPI_FAILURE(status))
973 return (AE_OK); 308 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
974 309 "Could not evaluate _PDC, using legacy perf. control.\n"));
975 if (type != ACPI_TYPE_PROCESSOR)
976 return (AE_OK);
977
978 switch (*action) {
979 case INSTALL_NOTIFY_HANDLER:
980 acpi_install_notify_handler(handle,
981 ACPI_SYSTEM_NOTIFY,
982 acpi_processor_hotplug_notify,
983 NULL);
984 break;
985 case UNINSTALL_NOTIFY_HANDLER:
986 acpi_remove_notify_handler(handle,
987 ACPI_SYSTEM_NOTIFY,
988 acpi_processor_hotplug_notify);
989 break;
990 default:
991 break;
992 }
993 310
994 return (AE_OK); 311 return status;
995} 312}
996 313
997static acpi_status acpi_processor_hotadd_init(acpi_handle handle, int *p_cpu) 314void acpi_processor_set_pdc(acpi_handle handle)
998{ 315{
316 struct acpi_object_list *obj_list;
999 317
1000 if (!is_processor_present(handle)) { 318 if (arch_has_acpi_pdc() == false)
1001 return AE_ERROR; 319 return;
1002 }
1003 320
1004 if (acpi_map_lsapic(handle, p_cpu)) 321 obj_list = acpi_processor_alloc_pdc();
1005 return AE_ERROR; 322 if (!obj_list)
323 return;
1006 324
1007 if (arch_register_cpu(*p_cpu)) { 325 acpi_processor_eval_pdc(handle, obj_list);
1008 acpi_unmap_lsapic(*p_cpu);
1009 return AE_ERROR;
1010 }
1011 326
1012 return AE_OK; 327 kfree(obj_list->pointer->buffer.pointer);
328 kfree(obj_list->pointer);
329 kfree(obj_list);
1013} 330}
331EXPORT_SYMBOL_GPL(acpi_processor_set_pdc);
1014 332
1015static int acpi_processor_handle_eject(struct acpi_processor *pr) 333static acpi_status
334early_init_pdc(acpi_handle handle, u32 lvl, void *context, void **rv)
1016{ 335{
1017 if (cpu_online(pr->id)) 336 if (processor_physically_present(handle) == false)
1018 cpu_down(pr->id); 337 return AE_OK;
1019 338
1020 arch_unregister_cpu(pr->id); 339 acpi_processor_set_pdc(handle);
1021 acpi_unmap_lsapic(pr->id); 340 return AE_OK;
1022 return (0);
1023}
1024#else
1025static acpi_status acpi_processor_hotadd_init(acpi_handle handle, int *p_cpu)
1026{
1027 return AE_ERROR;
1028}
1029static int acpi_processor_handle_eject(struct acpi_processor *pr)
1030{
1031 return (-EINVAL);
1032} 341}
1033#endif
1034 342
1035static 343void __init acpi_early_processor_set_pdc(void)
1036void acpi_processor_install_hotplug_notify(void)
1037{ 344{
1038#ifdef CONFIG_ACPI_HOTPLUG_CPU 345 /*
1039 int action = INSTALL_NOTIFY_HANDLER; 346 * Check whether the system is DMI table. If yes, OSPM
1040 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, 347 * should not use mwait for CPU-states.
1041 ACPI_ROOT_OBJECT, 348 */
1042 ACPI_UINT32_MAX, 349 dmi_check_system(processor_idle_dmi_table);
1043 processor_walk_namespace_cb, NULL, &action, NULL);
1044#endif
1045 register_hotcpu_notifier(&acpi_cpu_notifier);
1046}
1047 350
1048static 351 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
1049void acpi_processor_uninstall_hotplug_notify(void)
1050{
1051#ifdef CONFIG_ACPI_HOTPLUG_CPU
1052 int action = UNINSTALL_NOTIFY_HANDLER;
1053 acpi_walk_namespace(ACPI_TYPE_PROCESSOR,
1054 ACPI_ROOT_OBJECT,
1055 ACPI_UINT32_MAX, 352 ACPI_UINT32_MAX,
1056 processor_walk_namespace_cb, NULL, &action, NULL); 353 early_init_pdc, NULL, NULL, NULL);
1057#endif
1058 unregister_hotcpu_notifier(&acpi_cpu_notifier);
1059} 354}
1060
1061/*
1062 * We keep the driver loaded even when ACPI is not running.
1063 * This is needed for the powernow-k8 driver, that works even without
1064 * ACPI, but needs symbols from this driver
1065 */
1066
1067static int __init acpi_processor_init(void)
1068{
1069 int result = 0;
1070
1071 if (acpi_disabled)
1072 return 0;
1073
1074 memset(&errata, 0, sizeof(errata));
1075
1076#ifdef CONFIG_SMP
1077 if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_MADT, 0,
1078 (struct acpi_table_header **)&madt)))
1079 madt = NULL;
1080#endif
1081#ifdef CONFIG_ACPI_PROCFS
1082 acpi_processor_dir = proc_mkdir(ACPI_PROCESSOR_CLASS, acpi_root_dir);
1083 if (!acpi_processor_dir)
1084 return -ENOMEM;
1085#endif
1086 result = cpuidle_register_driver(&acpi_idle_driver);
1087 if (result < 0)
1088 goto out_proc;
1089
1090 result = acpi_bus_register_driver(&acpi_processor_driver);
1091 if (result < 0)
1092 goto out_cpuidle;
1093
1094 acpi_processor_install_hotplug_notify();
1095
1096 acpi_thermal_cpufreq_init();
1097
1098 acpi_processor_ppc_init();
1099
1100 acpi_processor_throttling_init();
1101
1102 return 0;
1103
1104out_cpuidle:
1105 cpuidle_unregister_driver(&acpi_idle_driver);
1106
1107out_proc:
1108#ifdef CONFIG_ACPI_PROCFS
1109 remove_proc_entry(ACPI_PROCESSOR_CLASS, acpi_root_dir);
1110#endif
1111
1112 return result;
1113}
1114
1115static void __exit acpi_processor_exit(void)
1116{
1117 if (acpi_disabled)
1118 return;
1119
1120 acpi_processor_ppc_exit();
1121
1122 acpi_thermal_cpufreq_exit();
1123
1124 acpi_processor_uninstall_hotplug_notify();
1125
1126 acpi_bus_unregister_driver(&acpi_processor_driver);
1127
1128 cpuidle_unregister_driver(&acpi_idle_driver);
1129
1130#ifdef CONFIG_ACPI_PROCFS
1131 remove_proc_entry(ACPI_PROCESSOR_CLASS, acpi_root_dir);
1132#endif
1133
1134 return;
1135}
1136
1137module_init(acpi_processor_init);
1138module_exit(acpi_processor_exit);
1139
1140EXPORT_SYMBOL(acpi_processor_set_thermal_limit);
1141
1142MODULE_ALIAS("processor");
diff --git a/drivers/acpi/processor_driver.c b/drivers/acpi/processor_driver.c
new file mode 100644
index 000000000000..b5658cdce27f
--- /dev/null
+++ b/drivers/acpi/processor_driver.c
@@ -0,0 +1,978 @@
1/*
2 * acpi_processor.c - ACPI Processor Driver ($Revision: 71 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 *
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or (at
15 * your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 * TBD:
28 * 1. Make # power states dynamic.
29 * 2. Support duty_cycle values that span bit 4.
30 * 3. Optimize by having scheduler determine business instead of
31 * having us try to calculate it here.
32 * 4. Need C1 timing -- must modify kernel (IRQ handler) to get this.
33 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/types.h>
39#include <linux/pci.h>
40#include <linux/pm.h>
41#include <linux/cpufreq.h>
42#include <linux/cpu.h>
43#include <linux/proc_fs.h>
44#include <linux/seq_file.h>
45#include <linux/dmi.h>
46#include <linux/moduleparam.h>
47#include <linux/cpuidle.h>
48
49#include <asm/io.h>
50#include <asm/system.h>
51#include <asm/cpu.h>
52#include <asm/delay.h>
53#include <asm/uaccess.h>
54#include <asm/processor.h>
55#include <asm/smp.h>
56#include <asm/acpi.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/acpi_drivers.h>
60#include <acpi/processor.h>
61
62#define PREFIX "ACPI: "
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define ACPI_PROCESSOR_DEVICE_NAME "Processor"
66#define ACPI_PROCESSOR_FILE_INFO "info"
67#define ACPI_PROCESSOR_FILE_THROTTLING "throttling"
68#define ACPI_PROCESSOR_FILE_LIMIT "limit"
69#define ACPI_PROCESSOR_NOTIFY_PERFORMANCE 0x80
70#define ACPI_PROCESSOR_NOTIFY_POWER 0x81
71#define ACPI_PROCESSOR_NOTIFY_THROTTLING 0x82
72
73#define ACPI_PROCESSOR_LIMIT_USER 0
74#define ACPI_PROCESSOR_LIMIT_THERMAL 1
75
76#define _COMPONENT ACPI_PROCESSOR_COMPONENT
77ACPI_MODULE_NAME("processor_driver");
78
79MODULE_AUTHOR("Paul Diefenbaugh");
80MODULE_DESCRIPTION("ACPI Processor Driver");
81MODULE_LICENSE("GPL");
82
83static int acpi_processor_add(struct acpi_device *device);
84static int acpi_processor_remove(struct acpi_device *device, int type);
85#ifdef CONFIG_ACPI_PROCFS
86static int acpi_processor_info_open_fs(struct inode *inode, struct file *file);
87#endif
88static void acpi_processor_notify(struct acpi_device *device, u32 event);
89static acpi_status acpi_processor_hotadd_init(acpi_handle handle, int *p_cpu);
90static int acpi_processor_handle_eject(struct acpi_processor *pr);
91
92
93static const struct acpi_device_id processor_device_ids[] = {
94 {ACPI_PROCESSOR_OBJECT_HID, 0},
95 {"ACPI0007", 0},
96 {"", 0},
97};
98MODULE_DEVICE_TABLE(acpi, processor_device_ids);
99
100static struct acpi_driver acpi_processor_driver = {
101 .name = "processor",
102 .class = ACPI_PROCESSOR_CLASS,
103 .ids = processor_device_ids,
104 .ops = {
105 .add = acpi_processor_add,
106 .remove = acpi_processor_remove,
107 .suspend = acpi_processor_suspend,
108 .resume = acpi_processor_resume,
109 .notify = acpi_processor_notify,
110 },
111};
112
113#define INSTALL_NOTIFY_HANDLER 1
114#define UNINSTALL_NOTIFY_HANDLER 2
115#ifdef CONFIG_ACPI_PROCFS
116static const struct file_operations acpi_processor_info_fops = {
117 .owner = THIS_MODULE,
118 .open = acpi_processor_info_open_fs,
119 .read = seq_read,
120 .llseek = seq_lseek,
121 .release = single_release,
122};
123#endif
124
125DEFINE_PER_CPU(struct acpi_processor *, processors);
126EXPORT_PER_CPU_SYMBOL(processors);
127
128struct acpi_processor_errata errata __read_mostly;
129
130/* --------------------------------------------------------------------------
131 Errata Handling
132 -------------------------------------------------------------------------- */
133
134static int acpi_processor_errata_piix4(struct pci_dev *dev)
135{
136 u8 value1 = 0;
137 u8 value2 = 0;
138
139
140 if (!dev)
141 return -EINVAL;
142
143 /*
144 * Note that 'dev' references the PIIX4 ACPI Controller.
145 */
146
147 switch (dev->revision) {
148 case 0:
149 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 A-step\n"));
150 break;
151 case 1:
152 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 B-step\n"));
153 break;
154 case 2:
155 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4E\n"));
156 break;
157 case 3:
158 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4M\n"));
159 break;
160 default:
161 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found unknown PIIX4\n"));
162 break;
163 }
164
165 switch (dev->revision) {
166
167 case 0: /* PIIX4 A-step */
168 case 1: /* PIIX4 B-step */
169 /*
170 * See specification changes #13 ("Manual Throttle Duty Cycle")
171 * and #14 ("Enabling and Disabling Manual Throttle"), plus
172 * erratum #5 ("STPCLK# Deassertion Time") from the January
173 * 2002 PIIX4 specification update. Applies to only older
174 * PIIX4 models.
175 */
176 errata.piix4.throttle = 1;
177
178 case 2: /* PIIX4E */
179 case 3: /* PIIX4M */
180 /*
181 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
182 * Livelock") from the January 2002 PIIX4 specification update.
183 * Applies to all PIIX4 models.
184 */
185
186 /*
187 * BM-IDE
188 * ------
189 * Find the PIIX4 IDE Controller and get the Bus Master IDE
190 * Status register address. We'll use this later to read
191 * each IDE controller's DMA status to make sure we catch all
192 * DMA activity.
193 */
194 dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
195 PCI_DEVICE_ID_INTEL_82371AB,
196 PCI_ANY_ID, PCI_ANY_ID, NULL);
197 if (dev) {
198 errata.piix4.bmisx = pci_resource_start(dev, 4);
199 pci_dev_put(dev);
200 }
201
202 /*
203 * Type-F DMA
204 * ----------
205 * Find the PIIX4 ISA Controller and read the Motherboard
206 * DMA controller's status to see if Type-F (Fast) DMA mode
207 * is enabled (bit 7) on either channel. Note that we'll
208 * disable C3 support if this is enabled, as some legacy
209 * devices won't operate well if fast DMA is disabled.
210 */
211 dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
212 PCI_DEVICE_ID_INTEL_82371AB_0,
213 PCI_ANY_ID, PCI_ANY_ID, NULL);
214 if (dev) {
215 pci_read_config_byte(dev, 0x76, &value1);
216 pci_read_config_byte(dev, 0x77, &value2);
217 if ((value1 & 0x80) || (value2 & 0x80))
218 errata.piix4.fdma = 1;
219 pci_dev_put(dev);
220 }
221
222 break;
223 }
224
225 if (errata.piix4.bmisx)
226 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
227 "Bus master activity detection (BM-IDE) erratum enabled\n"));
228 if (errata.piix4.fdma)
229 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
230 "Type-F DMA livelock erratum (C3 disabled)\n"));
231
232 return 0;
233}
234
235static int acpi_processor_errata(struct acpi_processor *pr)
236{
237 int result = 0;
238 struct pci_dev *dev = NULL;
239
240
241 if (!pr)
242 return -EINVAL;
243
244 /*
245 * PIIX4
246 */
247 dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
248 PCI_DEVICE_ID_INTEL_82371AB_3, PCI_ANY_ID,
249 PCI_ANY_ID, NULL);
250 if (dev) {
251 result = acpi_processor_errata_piix4(dev);
252 pci_dev_put(dev);
253 }
254
255 return result;
256}
257
258/* --------------------------------------------------------------------------
259 FS Interface (/proc)
260 -------------------------------------------------------------------------- */
261
262#ifdef CONFIG_ACPI_PROCFS
263static struct proc_dir_entry *acpi_processor_dir = NULL;
264
265static int acpi_processor_info_seq_show(struct seq_file *seq, void *offset)
266{
267 struct acpi_processor *pr = seq->private;
268
269
270 if (!pr)
271 goto end;
272
273 seq_printf(seq, "processor id: %d\n"
274 "acpi id: %d\n"
275 "bus mastering control: %s\n"
276 "power management: %s\n"
277 "throttling control: %s\n"
278 "limit interface: %s\n",
279 pr->id,
280 pr->acpi_id,
281 pr->flags.bm_control ? "yes" : "no",
282 pr->flags.power ? "yes" : "no",
283 pr->flags.throttling ? "yes" : "no",
284 pr->flags.limit ? "yes" : "no");
285
286 end:
287 return 0;
288}
289
290static int acpi_processor_info_open_fs(struct inode *inode, struct file *file)
291{
292 return single_open(file, acpi_processor_info_seq_show,
293 PDE(inode)->data);
294}
295
296static int __cpuinit acpi_processor_add_fs(struct acpi_device *device)
297{
298 struct proc_dir_entry *entry = NULL;
299
300
301 if (!acpi_device_dir(device)) {
302 acpi_device_dir(device) = proc_mkdir(acpi_device_bid(device),
303 acpi_processor_dir);
304 if (!acpi_device_dir(device))
305 return -ENODEV;
306 }
307
308 /* 'info' [R] */
309 entry = proc_create_data(ACPI_PROCESSOR_FILE_INFO,
310 S_IRUGO, acpi_device_dir(device),
311 &acpi_processor_info_fops,
312 acpi_driver_data(device));
313 if (!entry)
314 return -EIO;
315
316 /* 'throttling' [R/W] */
317 entry = proc_create_data(ACPI_PROCESSOR_FILE_THROTTLING,
318 S_IFREG | S_IRUGO | S_IWUSR,
319 acpi_device_dir(device),
320 &acpi_processor_throttling_fops,
321 acpi_driver_data(device));
322 if (!entry)
323 return -EIO;
324
325 /* 'limit' [R/W] */
326 entry = proc_create_data(ACPI_PROCESSOR_FILE_LIMIT,
327 S_IFREG | S_IRUGO | S_IWUSR,
328 acpi_device_dir(device),
329 &acpi_processor_limit_fops,
330 acpi_driver_data(device));
331 if (!entry)
332 return -EIO;
333 return 0;
334}
335static int acpi_processor_remove_fs(struct acpi_device *device)
336{
337
338 if (acpi_device_dir(device)) {
339 remove_proc_entry(ACPI_PROCESSOR_FILE_INFO,
340 acpi_device_dir(device));
341 remove_proc_entry(ACPI_PROCESSOR_FILE_THROTTLING,
342 acpi_device_dir(device));
343 remove_proc_entry(ACPI_PROCESSOR_FILE_LIMIT,
344 acpi_device_dir(device));
345 remove_proc_entry(acpi_device_bid(device), acpi_processor_dir);
346 acpi_device_dir(device) = NULL;
347 }
348
349 return 0;
350}
351#else
352static inline int acpi_processor_add_fs(struct acpi_device *device)
353{
354 return 0;
355}
356static inline int acpi_processor_remove_fs(struct acpi_device *device)
357{
358 return 0;
359}
360#endif
361
362/* --------------------------------------------------------------------------
363 Driver Interface
364 -------------------------------------------------------------------------- */
365
366static int acpi_processor_get_info(struct acpi_device *device)
367{
368 acpi_status status = 0;
369 union acpi_object object = { 0 };
370 struct acpi_buffer buffer = { sizeof(union acpi_object), &object };
371 struct acpi_processor *pr;
372 int cpu_index, device_declaration = 0;
373 static int cpu0_initialized;
374
375 pr = acpi_driver_data(device);
376 if (!pr)
377 return -EINVAL;
378
379 if (num_online_cpus() > 1)
380 errata.smp = TRUE;
381
382 acpi_processor_errata(pr);
383
384 /*
385 * Check to see if we have bus mastering arbitration control. This
386 * is required for proper C3 usage (to maintain cache coherency).
387 */
388 if (acpi_gbl_FADT.pm2_control_block && acpi_gbl_FADT.pm2_control_length) {
389 pr->flags.bm_control = 1;
390 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
391 "Bus mastering arbitration control present\n"));
392 } else
393 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
394 "No bus mastering arbitration control\n"));
395
396 if (!strcmp(acpi_device_hid(device), ACPI_PROCESSOR_OBJECT_HID)) {
397 /* Declared with "Processor" statement; match ProcessorID */
398 status = acpi_evaluate_object(pr->handle, NULL, NULL, &buffer);
399 if (ACPI_FAILURE(status)) {
400 printk(KERN_ERR PREFIX "Evaluating processor object\n");
401 return -ENODEV;
402 }
403
404 /*
405 * TBD: Synch processor ID (via LAPIC/LSAPIC structures) on SMP.
406 * >>> 'acpi_get_processor_id(acpi_id, &id)' in
407 * arch/xxx/acpi.c
408 */
409 pr->acpi_id = object.processor.proc_id;
410 } else {
411 /*
412 * Declared with "Device" statement; match _UID.
413 * Note that we don't handle string _UIDs yet.
414 */
415 unsigned long long value;
416 status = acpi_evaluate_integer(pr->handle, METHOD_NAME__UID,
417 NULL, &value);
418 if (ACPI_FAILURE(status)) {
419 printk(KERN_ERR PREFIX
420 "Evaluating processor _UID [%#x]\n", status);
421 return -ENODEV;
422 }
423 device_declaration = 1;
424 pr->acpi_id = value;
425 }
426 cpu_index = acpi_get_cpuid(pr->handle, device_declaration, pr->acpi_id);
427
428 /* Handle UP system running SMP kernel, with no LAPIC in MADT */
429 if (!cpu0_initialized && (cpu_index == -1) &&
430 (num_online_cpus() == 1)) {
431 cpu_index = 0;
432 }
433
434 cpu0_initialized = 1;
435
436 pr->id = cpu_index;
437
438 /*
439 * Extra Processor objects may be enumerated on MP systems with
440 * less than the max # of CPUs. They should be ignored _iff
441 * they are physically not present.
442 */
443 if (pr->id == -1) {
444 if (ACPI_FAILURE
445 (acpi_processor_hotadd_init(pr->handle, &pr->id))) {
446 return -ENODEV;
447 }
448 }
449 /*
450 * On some boxes several processors use the same processor bus id.
451 * But they are located in different scope. For example:
452 * \_SB.SCK0.CPU0
453 * \_SB.SCK1.CPU0
454 * Rename the processor device bus id. And the new bus id will be
455 * generated as the following format:
456 * CPU+CPU ID.
457 */
458 sprintf(acpi_device_bid(device), "CPU%X", pr->id);
459 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Processor [%d:%d]\n", pr->id,
460 pr->acpi_id));
461
462 if (!object.processor.pblk_address)
463 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No PBLK (NULL address)\n"));
464 else if (object.processor.pblk_length != 6)
465 printk(KERN_ERR PREFIX "Invalid PBLK length [%d]\n",
466 object.processor.pblk_length);
467 else {
468 pr->throttling.address = object.processor.pblk_address;
469 pr->throttling.duty_offset = acpi_gbl_FADT.duty_offset;
470 pr->throttling.duty_width = acpi_gbl_FADT.duty_width;
471
472 pr->pblk = object.processor.pblk_address;
473
474 /*
475 * We don't care about error returns - we just try to mark
476 * these reserved so that nobody else is confused into thinking
477 * that this region might be unused..
478 *
479 * (In particular, allocating the IO range for Cardbus)
480 */
481 request_region(pr->throttling.address, 6, "ACPI CPU throttle");
482 }
483
484 /*
485 * If ACPI describes a slot number for this CPU, we can use it
486 * ensure we get the right value in the "physical id" field
487 * of /proc/cpuinfo
488 */
489 status = acpi_evaluate_object(pr->handle, "_SUN", NULL, &buffer);
490 if (ACPI_SUCCESS(status))
491 arch_fix_phys_package_id(pr->id, object.integer.value);
492
493 return 0;
494}
495
496static DEFINE_PER_CPU(void *, processor_device_array);
497
498static void acpi_processor_notify(struct acpi_device *device, u32 event)
499{
500 struct acpi_processor *pr = acpi_driver_data(device);
501 int saved;
502
503 if (!pr)
504 return;
505
506 switch (event) {
507 case ACPI_PROCESSOR_NOTIFY_PERFORMANCE:
508 saved = pr->performance_platform_limit;
509 acpi_processor_ppc_has_changed(pr, 1);
510 if (saved == pr->performance_platform_limit)
511 break;
512 acpi_bus_generate_proc_event(device, event,
513 pr->performance_platform_limit);
514 acpi_bus_generate_netlink_event(device->pnp.device_class,
515 dev_name(&device->dev), event,
516 pr->performance_platform_limit);
517 break;
518 case ACPI_PROCESSOR_NOTIFY_POWER:
519 acpi_processor_cst_has_changed(pr);
520 acpi_bus_generate_proc_event(device, event, 0);
521 acpi_bus_generate_netlink_event(device->pnp.device_class,
522 dev_name(&device->dev), event, 0);
523 break;
524 case ACPI_PROCESSOR_NOTIFY_THROTTLING:
525 acpi_processor_tstate_has_changed(pr);
526 acpi_bus_generate_proc_event(device, event, 0);
527 acpi_bus_generate_netlink_event(device->pnp.device_class,
528 dev_name(&device->dev), event, 0);
529 default:
530 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
531 "Unsupported event [0x%x]\n", event));
532 break;
533 }
534
535 return;
536}
537
538static int acpi_cpu_soft_notify(struct notifier_block *nfb,
539 unsigned long action, void *hcpu)
540{
541 unsigned int cpu = (unsigned long)hcpu;
542 struct acpi_processor *pr = per_cpu(processors, cpu);
543
544 if (action == CPU_ONLINE && pr) {
545 acpi_processor_ppc_has_changed(pr, 0);
546 acpi_processor_cst_has_changed(pr);
547 acpi_processor_tstate_has_changed(pr);
548 }
549 return NOTIFY_OK;
550}
551
552static struct notifier_block acpi_cpu_notifier =
553{
554 .notifier_call = acpi_cpu_soft_notify,
555};
556
557static int __cpuinit acpi_processor_add(struct acpi_device *device)
558{
559 struct acpi_processor *pr = NULL;
560 int result = 0;
561 struct sys_device *sysdev;
562
563 pr = kzalloc(sizeof(struct acpi_processor), GFP_KERNEL);
564 if (!pr)
565 return -ENOMEM;
566
567 if (!zalloc_cpumask_var(&pr->throttling.shared_cpu_map, GFP_KERNEL)) {
568 kfree(pr);
569 return -ENOMEM;
570 }
571
572 pr->handle = device->handle;
573 strcpy(acpi_device_name(device), ACPI_PROCESSOR_DEVICE_NAME);
574 strcpy(acpi_device_class(device), ACPI_PROCESSOR_CLASS);
575 device->driver_data = pr;
576
577 result = acpi_processor_get_info(device);
578 if (result) {
579 /* Processor is physically not present */
580 return 0;
581 }
582
583 BUG_ON((pr->id >= nr_cpu_ids) || (pr->id < 0));
584
585 /*
586 * Buggy BIOS check
587 * ACPI id of processors can be reported wrongly by the BIOS.
588 * Don't trust it blindly
589 */
590 if (per_cpu(processor_device_array, pr->id) != NULL &&
591 per_cpu(processor_device_array, pr->id) != device) {
592 printk(KERN_WARNING "BIOS reported wrong ACPI id "
593 "for the processor\n");
594 result = -ENODEV;
595 goto err_free_cpumask;
596 }
597 per_cpu(processor_device_array, pr->id) = device;
598
599 per_cpu(processors, pr->id) = pr;
600
601 result = acpi_processor_add_fs(device);
602 if (result)
603 goto err_free_cpumask;
604
605 sysdev = get_cpu_sysdev(pr->id);
606 if (sysfs_create_link(&device->dev.kobj, &sysdev->kobj, "sysdev")) {
607 result = -EFAULT;
608 goto err_remove_fs;
609 }
610
611#ifdef CONFIG_CPU_FREQ
612 acpi_processor_ppc_has_changed(pr, 0);
613#endif
614 acpi_processor_get_throttling_info(pr);
615 acpi_processor_get_limit_info(pr);
616
617
618 acpi_processor_power_init(pr, device);
619
620 pr->cdev = thermal_cooling_device_register("Processor", device,
621 &processor_cooling_ops);
622 if (IS_ERR(pr->cdev)) {
623 result = PTR_ERR(pr->cdev);
624 goto err_power_exit;
625 }
626
627 dev_dbg(&device->dev, "registered as cooling_device%d\n",
628 pr->cdev->id);
629
630 result = sysfs_create_link(&device->dev.kobj,
631 &pr->cdev->device.kobj,
632 "thermal_cooling");
633 if (result) {
634 printk(KERN_ERR PREFIX "Create sysfs link\n");
635 goto err_thermal_unregister;
636 }
637 result = sysfs_create_link(&pr->cdev->device.kobj,
638 &device->dev.kobj,
639 "device");
640 if (result) {
641 printk(KERN_ERR PREFIX "Create sysfs link\n");
642 goto err_remove_sysfs;
643 }
644
645 return 0;
646
647err_remove_sysfs:
648 sysfs_remove_link(&device->dev.kobj, "thermal_cooling");
649err_thermal_unregister:
650 thermal_cooling_device_unregister(pr->cdev);
651err_power_exit:
652 acpi_processor_power_exit(pr, device);
653err_remove_fs:
654 acpi_processor_remove_fs(device);
655err_free_cpumask:
656 free_cpumask_var(pr->throttling.shared_cpu_map);
657
658 return result;
659}
660
661static int acpi_processor_remove(struct acpi_device *device, int type)
662{
663 struct acpi_processor *pr = NULL;
664
665
666 if (!device || !acpi_driver_data(device))
667 return -EINVAL;
668
669 pr = acpi_driver_data(device);
670
671 if (pr->id >= nr_cpu_ids)
672 goto free;
673
674 if (type == ACPI_BUS_REMOVAL_EJECT) {
675 if (acpi_processor_handle_eject(pr))
676 return -EINVAL;
677 }
678
679 acpi_processor_power_exit(pr, device);
680
681 sysfs_remove_link(&device->dev.kobj, "sysdev");
682
683 acpi_processor_remove_fs(device);
684
685 if (pr->cdev) {
686 sysfs_remove_link(&device->dev.kobj, "thermal_cooling");
687 sysfs_remove_link(&pr->cdev->device.kobj, "device");
688 thermal_cooling_device_unregister(pr->cdev);
689 pr->cdev = NULL;
690 }
691
692 per_cpu(processors, pr->id) = NULL;
693 per_cpu(processor_device_array, pr->id) = NULL;
694
695free:
696 free_cpumask_var(pr->throttling.shared_cpu_map);
697 kfree(pr);
698
699 return 0;
700}
701
702#ifdef CONFIG_ACPI_HOTPLUG_CPU
703/****************************************************************************
704 * Acpi processor hotplug support *
705 ****************************************************************************/
706
707static int is_processor_present(acpi_handle handle)
708{
709 acpi_status status;
710 unsigned long long sta = 0;
711
712
713 status = acpi_evaluate_integer(handle, "_STA", NULL, &sta);
714
715 if (ACPI_SUCCESS(status) && (sta & ACPI_STA_DEVICE_PRESENT))
716 return 1;
717
718 /*
719 * _STA is mandatory for a processor that supports hot plug
720 */
721 if (status == AE_NOT_FOUND)
722 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
723 "Processor does not support hot plug\n"));
724 else
725 ACPI_EXCEPTION((AE_INFO, status,
726 "Processor Device is not present"));
727 return 0;
728}
729
730static
731int acpi_processor_device_add(acpi_handle handle, struct acpi_device **device)
732{
733 acpi_handle phandle;
734 struct acpi_device *pdev;
735
736
737 if (acpi_get_parent(handle, &phandle)) {
738 return -ENODEV;
739 }
740
741 if (acpi_bus_get_device(phandle, &pdev)) {
742 return -ENODEV;
743 }
744
745 if (acpi_bus_add(device, pdev, handle, ACPI_BUS_TYPE_PROCESSOR)) {
746 return -ENODEV;
747 }
748
749 return 0;
750}
751
752static void __ref acpi_processor_hotplug_notify(acpi_handle handle,
753 u32 event, void *data)
754{
755 struct acpi_processor *pr;
756 struct acpi_device *device = NULL;
757 int result;
758
759
760 switch (event) {
761 case ACPI_NOTIFY_BUS_CHECK:
762 case ACPI_NOTIFY_DEVICE_CHECK:
763 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
764 "Processor driver received %s event\n",
765 (event == ACPI_NOTIFY_BUS_CHECK) ?
766 "ACPI_NOTIFY_BUS_CHECK" : "ACPI_NOTIFY_DEVICE_CHECK"));
767
768 if (!is_processor_present(handle))
769 break;
770
771 if (acpi_bus_get_device(handle, &device)) {
772 result = acpi_processor_device_add(handle, &device);
773 if (result)
774 printk(KERN_ERR PREFIX
775 "Unable to add the device\n");
776 break;
777 }
778 break;
779 case ACPI_NOTIFY_EJECT_REQUEST:
780 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
781 "received ACPI_NOTIFY_EJECT_REQUEST\n"));
782
783 if (acpi_bus_get_device(handle, &device)) {
784 printk(KERN_ERR PREFIX
785 "Device don't exist, dropping EJECT\n");
786 break;
787 }
788 pr = acpi_driver_data(device);
789 if (!pr) {
790 printk(KERN_ERR PREFIX
791 "Driver data is NULL, dropping EJECT\n");
792 return;
793 }
794 break;
795 default:
796 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
797 "Unsupported event [0x%x]\n", event));
798 break;
799 }
800
801 return;
802}
803
804static acpi_status
805processor_walk_namespace_cb(acpi_handle handle,
806 u32 lvl, void *context, void **rv)
807{
808 acpi_status status;
809 int *action = context;
810 acpi_object_type type = 0;
811
812 status = acpi_get_type(handle, &type);
813 if (ACPI_FAILURE(status))
814 return (AE_OK);
815
816 if (type != ACPI_TYPE_PROCESSOR)
817 return (AE_OK);
818
819 switch (*action) {
820 case INSTALL_NOTIFY_HANDLER:
821 acpi_install_notify_handler(handle,
822 ACPI_SYSTEM_NOTIFY,
823 acpi_processor_hotplug_notify,
824 NULL);
825 break;
826 case UNINSTALL_NOTIFY_HANDLER:
827 acpi_remove_notify_handler(handle,
828 ACPI_SYSTEM_NOTIFY,
829 acpi_processor_hotplug_notify);
830 break;
831 default:
832 break;
833 }
834
835 return (AE_OK);
836}
837
838static acpi_status acpi_processor_hotadd_init(acpi_handle handle, int *p_cpu)
839{
840
841 if (!is_processor_present(handle)) {
842 return AE_ERROR;
843 }
844
845 if (acpi_map_lsapic(handle, p_cpu))
846 return AE_ERROR;
847
848 if (arch_register_cpu(*p_cpu)) {
849 acpi_unmap_lsapic(*p_cpu);
850 return AE_ERROR;
851 }
852
853 return AE_OK;
854}
855
856static int acpi_processor_handle_eject(struct acpi_processor *pr)
857{
858 if (cpu_online(pr->id))
859 cpu_down(pr->id);
860
861 arch_unregister_cpu(pr->id);
862 acpi_unmap_lsapic(pr->id);
863 return (0);
864}
865#else
866static acpi_status acpi_processor_hotadd_init(acpi_handle handle, int *p_cpu)
867{
868 return AE_ERROR;
869}
870static int acpi_processor_handle_eject(struct acpi_processor *pr)
871{
872 return (-EINVAL);
873}
874#endif
875
876static
877void acpi_processor_install_hotplug_notify(void)
878{
879#ifdef CONFIG_ACPI_HOTPLUG_CPU
880 int action = INSTALL_NOTIFY_HANDLER;
881 acpi_walk_namespace(ACPI_TYPE_PROCESSOR,
882 ACPI_ROOT_OBJECT,
883 ACPI_UINT32_MAX,
884 processor_walk_namespace_cb, NULL, &action, NULL);
885#endif
886 register_hotcpu_notifier(&acpi_cpu_notifier);
887}
888
889static
890void acpi_processor_uninstall_hotplug_notify(void)
891{
892#ifdef CONFIG_ACPI_HOTPLUG_CPU
893 int action = UNINSTALL_NOTIFY_HANDLER;
894 acpi_walk_namespace(ACPI_TYPE_PROCESSOR,
895 ACPI_ROOT_OBJECT,
896 ACPI_UINT32_MAX,
897 processor_walk_namespace_cb, NULL, &action, NULL);
898#endif
899 unregister_hotcpu_notifier(&acpi_cpu_notifier);
900}
901
902/*
903 * We keep the driver loaded even when ACPI is not running.
904 * This is needed for the powernow-k8 driver, that works even without
905 * ACPI, but needs symbols from this driver
906 */
907
908static int __init acpi_processor_init(void)
909{
910 int result = 0;
911
912 if (acpi_disabled)
913 return 0;
914
915 memset(&errata, 0, sizeof(errata));
916
917#ifdef CONFIG_ACPI_PROCFS
918 acpi_processor_dir = proc_mkdir(ACPI_PROCESSOR_CLASS, acpi_root_dir);
919 if (!acpi_processor_dir)
920 return -ENOMEM;
921#endif
922 result = cpuidle_register_driver(&acpi_idle_driver);
923 if (result < 0)
924 goto out_proc;
925
926 result = acpi_bus_register_driver(&acpi_processor_driver);
927 if (result < 0)
928 goto out_cpuidle;
929
930 acpi_processor_install_hotplug_notify();
931
932 acpi_thermal_cpufreq_init();
933
934 acpi_processor_ppc_init();
935
936 acpi_processor_throttling_init();
937
938 return 0;
939
940out_cpuidle:
941 cpuidle_unregister_driver(&acpi_idle_driver);
942
943out_proc:
944#ifdef CONFIG_ACPI_PROCFS
945 remove_proc_entry(ACPI_PROCESSOR_CLASS, acpi_root_dir);
946#endif
947
948 return result;
949}
950
951static void __exit acpi_processor_exit(void)
952{
953 if (acpi_disabled)
954 return;
955
956 acpi_processor_ppc_exit();
957
958 acpi_thermal_cpufreq_exit();
959
960 acpi_processor_uninstall_hotplug_notify();
961
962 acpi_bus_unregister_driver(&acpi_processor_driver);
963
964 cpuidle_unregister_driver(&acpi_idle_driver);
965
966#ifdef CONFIG_ACPI_PROCFS
967 remove_proc_entry(ACPI_PROCESSOR_CLASS, acpi_root_dir);
968#endif
969
970 return;
971}
972
973module_init(acpi_processor_init);
974module_exit(acpi_processor_exit);
975
976EXPORT_SYMBOL(acpi_processor_set_thermal_limit);
977
978MODULE_ALIAS("processor");
diff --git a/drivers/acpi/processor_pdc.c b/drivers/acpi/processor_pdc.c
deleted file mode 100644
index e306ba9aa34e..000000000000
--- a/drivers/acpi/processor_pdc.c
+++ /dev/null
@@ -1,209 +0,0 @@
1/*
2 * Copyright (C) 2005 Intel Corporation
3 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * Alex Chiang <achiang@hp.com>
6 * - Unified x86/ia64 implementations
7 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
8 * - Added _PDC for platforms with Intel CPUs
9 */
10#include <linux/dmi.h>
11
12#include <acpi/acpi_drivers.h>
13#include <acpi/processor.h>
14
15#include "internal.h"
16
17#define PREFIX "ACPI: "
18#define _COMPONENT ACPI_PROCESSOR_COMPONENT
19ACPI_MODULE_NAME("processor_pdc");
20
21static int set_no_mwait(const struct dmi_system_id *id)
22{
23 printk(KERN_NOTICE PREFIX "%s detected - "
24 "disabling mwait for CPU C-states\n", id->ident);
25 idle_nomwait = 1;
26 return 0;
27}
28
29static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = {
30 {
31 set_no_mwait, "IFL91 board", {
32 DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"),
33 DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"),
34 DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"),
35 DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL},
36 {
37 set_no_mwait, "Extensa 5220", {
38 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
39 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
40 DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),
41 DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL},
42 {},
43};
44
45static void acpi_set_pdc_bits(u32 *buf)
46{
47 buf[0] = ACPI_PDC_REVISION_ID;
48 buf[1] = 1;
49
50 /* Enable coordination with firmware's _TSD info */
51 buf[2] = ACPI_PDC_SMP_T_SWCOORD;
52
53 /* Twiddle arch-specific bits needed for _PDC */
54 arch_acpi_set_pdc_bits(buf);
55}
56
57static struct acpi_object_list *acpi_processor_alloc_pdc(void)
58{
59 struct acpi_object_list *obj_list;
60 union acpi_object *obj;
61 u32 *buf;
62
63 /* allocate and initialize pdc. It will be used later. */
64 obj_list = kmalloc(sizeof(struct acpi_object_list), GFP_KERNEL);
65 if (!obj_list) {
66 printk(KERN_ERR "Memory allocation error\n");
67 return NULL;
68 }
69
70 obj = kmalloc(sizeof(union acpi_object), GFP_KERNEL);
71 if (!obj) {
72 printk(KERN_ERR "Memory allocation error\n");
73 kfree(obj_list);
74 return NULL;
75 }
76
77 buf = kmalloc(12, GFP_KERNEL);
78 if (!buf) {
79 printk(KERN_ERR "Memory allocation error\n");
80 kfree(obj);
81 kfree(obj_list);
82 return NULL;
83 }
84
85 acpi_set_pdc_bits(buf);
86
87 obj->type = ACPI_TYPE_BUFFER;
88 obj->buffer.length = 12;
89 obj->buffer.pointer = (u8 *) buf;
90 obj_list->count = 1;
91 obj_list->pointer = obj;
92
93 return obj_list;
94}
95
96/*
97 * _PDC is required for a BIOS-OS handshake for most of the newer
98 * ACPI processor features.
99 */
100static int
101acpi_processor_eval_pdc(acpi_handle handle, struct acpi_object_list *pdc_in)
102{
103 acpi_status status = AE_OK;
104
105 if (idle_nomwait) {
106 /*
107 * If mwait is disabled for CPU C-states, the C2C3_FFH access
108 * mode will be disabled in the parameter of _PDC object.
109 * Of course C1_FFH access mode will also be disabled.
110 */
111 union acpi_object *obj;
112 u32 *buffer = NULL;
113
114 obj = pdc_in->pointer;
115 buffer = (u32 *)(obj->buffer.pointer);
116 buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH);
117
118 }
119 status = acpi_evaluate_object(handle, "_PDC", pdc_in, NULL);
120
121 if (ACPI_FAILURE(status))
122 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
123 "Could not evaluate _PDC, using legacy perf. control.\n"));
124
125 return status;
126}
127
128static int early_pdc_done;
129
130void acpi_processor_set_pdc(acpi_handle handle)
131{
132 struct acpi_object_list *obj_list;
133
134 if (arch_has_acpi_pdc() == false)
135 return;
136
137 if (early_pdc_done)
138 return;
139
140 obj_list = acpi_processor_alloc_pdc();
141 if (!obj_list)
142 return;
143
144 acpi_processor_eval_pdc(handle, obj_list);
145
146 kfree(obj_list->pointer->buffer.pointer);
147 kfree(obj_list->pointer);
148 kfree(obj_list);
149}
150EXPORT_SYMBOL_GPL(acpi_processor_set_pdc);
151
152static int early_pdc_optin;
153static int set_early_pdc_optin(const struct dmi_system_id *id)
154{
155 early_pdc_optin = 1;
156 return 0;
157}
158
159static int param_early_pdc_optin(char *s)
160{
161 early_pdc_optin = 1;
162 return 1;
163}
164__setup("acpi_early_pdc_eval", param_early_pdc_optin);
165
166static struct dmi_system_id __cpuinitdata early_pdc_optin_table[] = {
167 {
168 set_early_pdc_optin, "HP Envy", {
169 DMI_MATCH(DMI_BIOS_VENDOR, "Hewlett-Packard"),
170 DMI_MATCH(DMI_PRODUCT_NAME, "HP Envy") }, NULL},
171 {
172 set_early_pdc_optin, "HP Pavilion dv6", {
173 DMI_MATCH(DMI_BIOS_VENDOR, "Hewlett-Packard"),
174 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv6") }, NULL},
175 {
176 set_early_pdc_optin, "HP Pavilion dv7", {
177 DMI_MATCH(DMI_BIOS_VENDOR, "Hewlett-Packard"),
178 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7") }, NULL},
179 {},
180};
181
182static acpi_status
183early_init_pdc(acpi_handle handle, u32 lvl, void *context, void **rv)
184{
185 acpi_processor_set_pdc(handle);
186 return AE_OK;
187}
188
189void __init acpi_early_processor_set_pdc(void)
190{
191 /*
192 * Check whether the system is DMI table. If yes, OSPM
193 * should not use mwait for CPU-states.
194 */
195 dmi_check_system(processor_idle_dmi_table);
196
197 /*
198 * Allow systems to opt-in to early _PDC evaluation.
199 */
200 dmi_check_system(early_pdc_optin_table);
201 if (!early_pdc_optin)
202 return;
203
204 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
205 ACPI_UINT32_MAX,
206 early_init_pdc, NULL, NULL, NULL);
207
208 early_pdc_done = 1;
209}
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 7ded7542fc9d..29c6f5766dcf 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -1133,9 +1133,6 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr)
1133 int result = 0; 1133 int result = 0;
1134 struct acpi_processor_throttling *pthrottling; 1134 struct acpi_processor_throttling *pthrottling;
1135 1135
1136 if (!pr)
1137 return -EINVAL;
1138
1139 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1136 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1140 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", 1137 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n",
1141 pr->throttling.address, 1138 pr->throttling.address,
diff --git a/drivers/acpi/sbs.c b/drivers/acpi/sbs.c
index b16ddbf23a9c..89ad11138e48 100644
--- a/drivers/acpi/sbs.c
+++ b/drivers/acpi/sbs.c
@@ -217,6 +217,9 @@ static int acpi_sbs_battery_get_property(struct power_supply *psy,
217 case POWER_SUPPLY_PROP_TECHNOLOGY: 217 case POWER_SUPPLY_PROP_TECHNOLOGY:
218 val->intval = acpi_battery_technology(battery); 218 val->intval = acpi_battery_technology(battery);
219 break; 219 break;
220 case POWER_SUPPLY_PROP_CYCLE_COUNT:
221 val->intval = battery->cycle_count;
222 break;
220 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: 223 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
221 val->intval = battery->design_voltage * 224 val->intval = battery->design_voltage *
222 acpi_battery_vscale(battery) * 1000; 225 acpi_battery_vscale(battery) * 1000;
@@ -276,6 +279,7 @@ static enum power_supply_property sbs_charge_battery_props[] = {
276 POWER_SUPPLY_PROP_STATUS, 279 POWER_SUPPLY_PROP_STATUS,
277 POWER_SUPPLY_PROP_PRESENT, 280 POWER_SUPPLY_PROP_PRESENT,
278 POWER_SUPPLY_PROP_TECHNOLOGY, 281 POWER_SUPPLY_PROP_TECHNOLOGY,
282 POWER_SUPPLY_PROP_CYCLE_COUNT,
279 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 283 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
280 POWER_SUPPLY_PROP_VOLTAGE_NOW, 284 POWER_SUPPLY_PROP_VOLTAGE_NOW,
281 POWER_SUPPLY_PROP_CURRENT_NOW, 285 POWER_SUPPLY_PROP_CURRENT_NOW,
@@ -560,6 +564,7 @@ static int acpi_battery_read_info(struct seq_file *seq, void *offset)
560 battery->design_voltage * acpi_battery_vscale(battery)); 564 battery->design_voltage * acpi_battery_vscale(battery));
561 seq_printf(seq, "design capacity warning: unknown\n"); 565 seq_printf(seq, "design capacity warning: unknown\n");
562 seq_printf(seq, "design capacity low: unknown\n"); 566 seq_printf(seq, "design capacity low: unknown\n");
567 seq_printf(seq, "cycle count: %i\n", battery->cycle_count);
563 seq_printf(seq, "capacity granularity 1: unknown\n"); 568 seq_printf(seq, "capacity granularity 1: unknown\n");
564 seq_printf(seq, "capacity granularity 2: unknown\n"); 569 seq_printf(seq, "capacity granularity 2: unknown\n");
565 seq_printf(seq, "model number: %s\n", battery->device_name); 570 seq_printf(seq, "model number: %s\n", battery->device_name);
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 3bde594a9979..f74834a544fd 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -552,8 +552,17 @@ static void acpi_hibernation_leave(void)
552 hibernate_nvs_restore(); 552 hibernate_nvs_restore();
553} 553}
554 554
555static void acpi_pm_enable_gpes(void) 555static int acpi_pm_pre_restore(void)
556{ 556{
557 acpi_disable_all_gpes();
558 acpi_os_wait_events_complete(NULL);
559 acpi_ec_suspend_transactions();
560 return 0;
561}
562
563static void acpi_pm_restore_cleanup(void)
564{
565 acpi_ec_resume_transactions();
557 acpi_enable_all_runtime_gpes(); 566 acpi_enable_all_runtime_gpes();
558} 567}
559 568
@@ -565,8 +574,8 @@ static struct platform_hibernation_ops acpi_hibernation_ops = {
565 .prepare = acpi_pm_prepare, 574 .prepare = acpi_pm_prepare,
566 .enter = acpi_hibernation_enter, 575 .enter = acpi_hibernation_enter,
567 .leave = acpi_hibernation_leave, 576 .leave = acpi_hibernation_leave,
568 .pre_restore = acpi_pm_disable_gpes, 577 .pre_restore = acpi_pm_pre_restore,
569 .restore_cleanup = acpi_pm_enable_gpes, 578 .restore_cleanup = acpi_pm_restore_cleanup,
570}; 579};
571 580
572/** 581/**
@@ -618,8 +627,8 @@ static struct platform_hibernation_ops acpi_hibernation_ops_old = {
618 .prepare = acpi_pm_disable_gpes, 627 .prepare = acpi_pm_disable_gpes,
619 .enter = acpi_hibernation_enter, 628 .enter = acpi_hibernation_enter,
620 .leave = acpi_hibernation_leave, 629 .leave = acpi_hibernation_leave,
621 .pre_restore = acpi_pm_disable_gpes, 630 .pre_restore = acpi_pm_pre_restore,
622 .restore_cleanup = acpi_pm_enable_gpes, 631 .restore_cleanup = acpi_pm_restore_cleanup,
623 .recover = acpi_pm_finish, 632 .recover = acpi_pm_finish,
624}; 633};
625#endif /* CONFIG_HIBERNATION */ 634#endif /* CONFIG_HIBERNATION */
diff --git a/drivers/acpi/system.c b/drivers/acpi/system.c
index a206a12da78a..743f2445e2a1 100644
--- a/drivers/acpi/system.c
+++ b/drivers/acpi/system.c
@@ -101,6 +101,7 @@ static void acpi_table_attr_init(struct acpi_table_attr *table_attr,
101 struct acpi_table_header *header = NULL; 101 struct acpi_table_header *header = NULL;
102 struct acpi_table_attr *attr = NULL; 102 struct acpi_table_attr *attr = NULL;
103 103
104 sysfs_attr_init(&table_attr->attr.attr);
104 if (table_header->signature[0] != '\0') 105 if (table_header->signature[0] != '\0')
105 memcpy(table_attr->name, table_header->signature, 106 memcpy(table_attr->name, table_header->signature,
106 ACPI_NAME_SIZE); 107 ACPI_NAME_SIZE);
@@ -475,6 +476,7 @@ void acpi_irq_stats_init(void)
475 goto fail; 476 goto fail;
476 strncpy(name, buffer, strlen(buffer) + 1); 477 strncpy(name, buffer, strlen(buffer) + 1);
477 478
479 sysfs_attr_init(&counter_attrs[i].attr);
478 counter_attrs[i].attr.name = name; 480 counter_attrs[i].attr.name = name;
479 counter_attrs[i].attr.mode = 0644; 481 counter_attrs[i].attr.mode = 0644;
480 counter_attrs[i].show = counter_show; 482 counter_attrs[i].show = counter_show;
diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c
index 9073ada88835..5d3893558cf7 100644
--- a/drivers/acpi/thermal.c
+++ b/drivers/acpi/thermal.c
@@ -368,7 +368,7 @@ static int acpi_thermal_trips_update(struct acpi_thermal *tz, int flag)
368 int valid = 0; 368 int valid = 0;
369 int i; 369 int i;
370 370
371 /* Critical Shutdown (required) */ 371 /* Critical Shutdown */
372 if (flag & ACPI_TRIPS_CRITICAL) { 372 if (flag & ACPI_TRIPS_CRITICAL) {
373 status = acpi_evaluate_integer(tz->device->handle, 373 status = acpi_evaluate_integer(tz->device->handle,
374 "_CRT", NULL, &tmp); 374 "_CRT", NULL, &tmp);
@@ -379,17 +379,19 @@ static int acpi_thermal_trips_update(struct acpi_thermal *tz, int flag)
379 * Below zero (Celsius) values clearly aren't right for sure.. 379 * Below zero (Celsius) values clearly aren't right for sure..
380 * ... so lets discard those as invalid. 380 * ... so lets discard those as invalid.
381 */ 381 */
382 if (ACPI_FAILURE(status) || 382 if (ACPI_FAILURE(status)) {
383 tz->trips.critical.temperature <= 2732) { 383 tz->trips.critical.flags.valid = 0;
384 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
385 "No critical threshold\n"));
386 } else if (tmp <= 2732) {
387 printk(KERN_WARNING FW_BUG "Invalid critical threshold "
388 "(%llu)\n", tmp);
384 tz->trips.critical.flags.valid = 0; 389 tz->trips.critical.flags.valid = 0;
385 ACPI_EXCEPTION((AE_INFO, status,
386 "No or invalid critical threshold"));
387 return -ENODEV;
388 } else { 390 } else {
389 tz->trips.critical.flags.valid = 1; 391 tz->trips.critical.flags.valid = 1;
390 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 392 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
391 "Found critical threshold [%lu]\n", 393 "Found critical threshold [%lu]\n",
392 tz->trips.critical.temperature)); 394 tz->trips.critical.temperature));
393 } 395 }
394 if (tz->trips.critical.flags.valid == 1) { 396 if (tz->trips.critical.flags.valid == 1) {
395 if (crt == -1) { 397 if (crt == -1) {
@@ -575,7 +577,23 @@ static int acpi_thermal_trips_update(struct acpi_thermal *tz, int flag)
575 577
576static int acpi_thermal_get_trip_points(struct acpi_thermal *tz) 578static int acpi_thermal_get_trip_points(struct acpi_thermal *tz)
577{ 579{
578 return acpi_thermal_trips_update(tz, ACPI_TRIPS_INIT); 580 int i, valid, ret = acpi_thermal_trips_update(tz, ACPI_TRIPS_INIT);
581
582 if (ret)
583 return ret;
584
585 valid = tz->trips.critical.flags.valid |
586 tz->trips.hot.flags.valid |
587 tz->trips.passive.flags.valid;
588
589 for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE; i++)
590 valid |= tz->trips.active[i].flags.valid;
591
592 if (!valid) {
593 printk(KERN_WARNING FW_BUG "No valid trip found\n");
594 return -ENODEV;
595 }
596 return 0;
579} 597}
580 598
581static void acpi_thermal_check(void *data) 599static void acpi_thermal_check(void *data)
diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c
index 11882dbe2094..c9a49f4747e6 100644
--- a/drivers/acpi/utils.c
+++ b/drivers/acpi/utils.c
@@ -289,51 +289,6 @@ acpi_evaluate_integer(acpi_handle handle,
289 289
290EXPORT_SYMBOL(acpi_evaluate_integer); 290EXPORT_SYMBOL(acpi_evaluate_integer);
291 291
292#if 0
293acpi_status
294acpi_evaluate_string(acpi_handle handle,
295 acpi_string pathname,
296 acpi_object_list * arguments, acpi_string * data)
297{
298 acpi_status status = AE_OK;
299 acpi_object *element = NULL;
300 acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
301
302
303 if (!data)
304 return AE_BAD_PARAMETER;
305
306 status = acpi_evaluate_object(handle, pathname, arguments, &buffer);
307 if (ACPI_FAILURE(status)) {
308 acpi_util_eval_error(handle, pathname, status);
309 return status;
310 }
311
312 element = (acpi_object *) buffer.pointer;
313
314 if ((element->type != ACPI_TYPE_STRING)
315 || (element->type != ACPI_TYPE_BUFFER)
316 || !element->string.length) {
317 acpi_util_eval_error(handle, pathname, AE_BAD_DATA);
318 return AE_BAD_DATA;
319 }
320
321 *data = kzalloc(element->string.length + 1, GFP_KERNEL);
322 if (!data) {
323 printk(KERN_ERR PREFIX "Memory allocation\n");
324 return -ENOMEM;
325 }
326
327 memcpy(*data, element->string.pointer, element->string.length);
328
329 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Return value [%s]\n", *data));
330
331 kfree(buffer.pointer);
332
333 return AE_OK;
334}
335#endif
336
337acpi_status 292acpi_status
338acpi_evaluate_reference(acpi_handle handle, 293acpi_evaluate_reference(acpi_handle handle,
339 acpi_string pathname, 294 acpi_string pathname,
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 6e9b49149fce..2ff2b6ab5b6c 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -327,7 +327,7 @@ static int acpi_video_device_lcd_set_level(struct acpi_video_device *device,
327 int level); 327 int level);
328static int acpi_video_device_lcd_get_level_current( 328static int acpi_video_device_lcd_get_level_current(
329 struct acpi_video_device *device, 329 struct acpi_video_device *device,
330 unsigned long long *level); 330 unsigned long long *level, int init);
331static int acpi_video_get_next_level(struct acpi_video_device *device, 331static int acpi_video_get_next_level(struct acpi_video_device *device,
332 u32 level_current, u32 event); 332 u32 level_current, u32 event);
333static int acpi_video_switch_brightness(struct acpi_video_device *device, 333static int acpi_video_switch_brightness(struct acpi_video_device *device,
@@ -345,7 +345,7 @@ static int acpi_video_get_brightness(struct backlight_device *bd)
345 struct acpi_video_device *vd = 345 struct acpi_video_device *vd =
346 (struct acpi_video_device *)bl_get_data(bd); 346 (struct acpi_video_device *)bl_get_data(bd);
347 347
348 if (acpi_video_device_lcd_get_level_current(vd, &cur_level)) 348 if (acpi_video_device_lcd_get_level_current(vd, &cur_level, 0))
349 return -EINVAL; 349 return -EINVAL;
350 for (i = 2; i < vd->brightness->count; i++) { 350 for (i = 2; i < vd->brightness->count; i++) {
351 if (vd->brightness->levels[i] == cur_level) 351 if (vd->brightness->levels[i] == cur_level)
@@ -414,7 +414,7 @@ static int video_get_cur_state(struct thermal_cooling_device *cooling_dev, unsig
414 unsigned long long level; 414 unsigned long long level;
415 int offset; 415 int offset;
416 416
417 if (acpi_video_device_lcd_get_level_current(video, &level)) 417 if (acpi_video_device_lcd_get_level_current(video, &level, 0))
418 return -EINVAL; 418 return -EINVAL;
419 for (offset = 2; offset < video->brightness->count; offset++) 419 for (offset = 2; offset < video->brightness->count; offset++)
420 if (level == video->brightness->levels[offset]) { 420 if (level == video->brightness->levels[offset]) {
@@ -609,7 +609,7 @@ static struct dmi_system_id video_dmi_table[] __initdata = {
609 609
610static int 610static int
611acpi_video_device_lcd_get_level_current(struct acpi_video_device *device, 611acpi_video_device_lcd_get_level_current(struct acpi_video_device *device,
612 unsigned long long *level) 612 unsigned long long *level, int init)
613{ 613{
614 acpi_status status = AE_OK; 614 acpi_status status = AE_OK;
615 int i; 615 int i;
@@ -633,10 +633,16 @@ acpi_video_device_lcd_get_level_current(struct acpi_video_device *device,
633 device->brightness->curr = *level; 633 device->brightness->curr = *level;
634 return 0; 634 return 0;
635 } 635 }
636 /* BQC returned an invalid level. Stop using it. */ 636 if (!init) {
637 ACPI_WARNING((AE_INFO, "%s returned an invalid level", 637 /*
638 buf)); 638 * BQC returned an invalid level.
639 device->cap._BQC = device->cap._BCQ = 0; 639 * Stop using it.
640 */
641 ACPI_WARNING((AE_INFO,
642 "%s returned an invalid level",
643 buf));
644 device->cap._BQC = device->cap._BCQ = 0;
645 }
640 } else { 646 } else {
641 /* Fixme: 647 /* Fixme:
642 * should we return an error or ignore this failure? 648 * should we return an error or ignore this failure?
@@ -892,7 +898,7 @@ acpi_video_init_brightness(struct acpi_video_device *device)
892 if (!device->cap._BQC) 898 if (!device->cap._BQC)
893 goto set_level; 899 goto set_level;
894 900
895 result = acpi_video_device_lcd_get_level_current(device, &level_old); 901 result = acpi_video_device_lcd_get_level_current(device, &level_old, 1);
896 if (result) 902 if (result)
897 goto out_free_levels; 903 goto out_free_levels;
898 904
@@ -903,7 +909,7 @@ acpi_video_init_brightness(struct acpi_video_device *device)
903 if (result) 909 if (result)
904 goto out_free_levels; 910 goto out_free_levels;
905 911
906 result = acpi_video_device_lcd_get_level_current(device, &level); 912 result = acpi_video_device_lcd_get_level_current(device, &level, 0);
907 if (result) 913 if (result)
908 goto out_free_levels; 914 goto out_free_levels;
909 915
@@ -1996,7 +2002,7 @@ acpi_video_switch_brightness(struct acpi_video_device *device, int event)
1996 goto out; 2002 goto out;
1997 2003
1998 result = acpi_video_device_lcd_get_level_current(device, 2004 result = acpi_video_device_lcd_get_level_current(device,
1999 &level_current); 2005 &level_current, 0);
2000 if (result) 2006 if (result)
2001 goto out; 2007 goto out;
2002 2008
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 9c77b0d1a9d0..4a28420efff2 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -2232,7 +2232,7 @@ retry:
2232 * Some drives were very specific about that exact sequence. 2232 * Some drives were very specific about that exact sequence.
2233 * 2233 *
2234 * Note that ATA4 says lba is mandatory so the second check 2234 * Note that ATA4 says lba is mandatory so the second check
2235 * shoud never trigger. 2235 * should never trigger.
2236 */ 2236 */
2237 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 2237 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
2238 err_mask = ata_dev_init_params(dev, id[3], id[6]); 2238 err_mask = ata_dev_init_params(dev, id[3], id[6]);
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 02441fd57e9e..561dec2481cb 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -2287,7 +2287,7 @@ EXPORT_SYMBOL_GPL(ata_sff_postreset);
2287 * @qc: command 2287 * @qc: command
2288 * 2288 *
2289 * Drain the FIFO and device of any stuck data following a command 2289 * Drain the FIFO and device of any stuck data following a command
2290 * failing to complete. In some cases this is neccessary before a 2290 * failing to complete. In some cases this is necessary before a
2291 * reset will recover the device. 2291 * reset will recover the device.
2292 * 2292 *
2293 */ 2293 */
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index 294f3020a78a..8e5e13210426 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -161,7 +161,7 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev)
161 * 161 *
162 * Called when the libata layer is about to issue a command. We wrap 162 * Called when the libata layer is about to issue a command. We wrap
163 * this interface so that we can load the correct ATA timings if 163 * this interface so that we can load the correct ATA timings if
164 * neccessary. 164 * necessary.
165 */ 165 */
166 166
167static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc) 167static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc)
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
index c86c71639a95..727a81ce4c9f 100644
--- a/drivers/ata/pata_hpt3x3.c
+++ b/drivers/ata/pata_hpt3x3.c
@@ -180,7 +180,7 @@ static void hpt3x3_init_chipset(struct pci_dev *dev)
180 * @id: Entry in match table 180 * @id: Entry in match table
181 * 181 *
182 * Perform basic initialisation. We set the device up so we access all 182 * Perform basic initialisation. We set the device up so we access all
183 * ports via BAR4. This is neccessary to work around errata. 183 * ports via BAR4. This is necessary to work around errata.
184 */ 184 */
185 185
186static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 186static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index 36103531feeb..147de2fd66d2 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -131,7 +131,7 @@ static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
131 * @qc: command 131 * @qc: command
132 * 132 *
133 * Drain the FIFO and device of any stuck data following a command 133 * Drain the FIFO and device of any stuck data following a command
134 * failing to complete. In some cases this is neccessary before a 134 * failing to complete. In some cases this is necessary before a
135 * reset will recover the device. 135 * reset will recover the device.
136 * 136 *
137 */ 137 */
diff --git a/drivers/auxdisplay/cfag12864bfb.c b/drivers/auxdisplay/cfag12864bfb.c
index fe3a865be4e5..b0ca5a47f47d 100644
--- a/drivers/auxdisplay/cfag12864bfb.c
+++ b/drivers/auxdisplay/cfag12864bfb.c
@@ -81,7 +81,7 @@ static struct fb_ops cfag12864bfb_ops = {
81 .fb_mmap = cfag12864bfb_mmap, 81 .fb_mmap = cfag12864bfb_mmap,
82}; 82};
83 83
84static int __init cfag12864bfb_probe(struct platform_device *device) 84static int __devinit cfag12864bfb_probe(struct platform_device *device)
85{ 85{
86 int ret = -EINVAL; 86 int ret = -EINVAL;
87 struct fb_info *info = framebuffer_alloc(0, &device->dev); 87 struct fb_info *info = framebuffer_alloc(0, &device->dev);
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index ee377270beb9..fd52c48ee762 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -3,35 +3,50 @@ menu "Generic Driver Options"
3config UEVENT_HELPER_PATH 3config UEVENT_HELPER_PATH
4 string "path to uevent helper" 4 string "path to uevent helper"
5 depends on HOTPLUG 5 depends on HOTPLUG
6 default "/sbin/hotplug" 6 default ""
7 help 7 help
8 Path to uevent helper program forked by the kernel for 8 Path to uevent helper program forked by the kernel for
9 every uevent. 9 every uevent.
10 Before the switch to the netlink-based uevent source, this was
11 used to hook hotplug scripts into kernel device events. It
12 usually pointed to a shell script at /sbin/hotplug.
13 This should not be used today, because usual systems create
14 many events at bootup or device discovery in a very short time
15 frame. One forked process per event can create so many processes
16 that it creates a high system load, or on smaller systems
17 it is known to create out-of-memory situations during bootup.
10 18
11config DEVTMPFS 19config DEVTMPFS
12 bool "Create a kernel maintained /dev tmpfs (EXPERIMENTAL)" 20 bool "Maintain a devtmpfs filesystem to mount at /dev"
13 depends on HOTPLUG && SHMEM && TMPFS 21 depends on HOTPLUG && SHMEM && TMPFS
14 help 22 help
15 This creates a tmpfs filesystem, and mounts it at bootup 23 This creates a tmpfs filesystem instance early at bootup.
16 and mounts it at /dev. The kernel driver core creates device 24 In this filesystem, the kernel driver core maintains device
17 nodes for all registered devices in that filesystem. All device 25 nodes with their default names and permissions for all
18 nodes are owned by root and have the default mode of 0600. 26 registered devices with an assigned major/minor number.
19 Userspace can add and delete the nodes as needed. This is 27 Userspace can modify the filesystem content as needed, add
20 intended to simplify bootup, and make it possible to delay 28 symlinks, and apply needed permissions.
21 the initial coldplug at bootup done by udev in userspace. 29 It provides a fully functional /dev directory, where usually
22 It should also provide a simpler way for rescue systems 30 udev runs on top, managing permissions and adding meaningful
23 to bring up a kernel with dynamic major/minor numbers. 31 symlinks.
24 Meaningful symlinks, permissions and device ownership must 32 In very limited environments, it may provide a sufficient
25 still be handled by userspace. 33 functional /dev without any further help. It also allows simple
26 If unsure, say N here. 34 rescue systems, and reliably handles dynamic major/minor numbers.
27 35
28config DEVTMPFS_MOUNT 36config DEVTMPFS_MOUNT
29 bool "Automount devtmpfs at /dev" 37 bool "Automount devtmpfs at /dev, after the kernel mounted the rootfs"
30 depends on DEVTMPFS 38 depends on DEVTMPFS
31 help 39 help
32 This will mount devtmpfs at /dev if the kernel mounts the root 40 This will instruct the kernel to automatically mount the
33 filesystem. It will not affect initramfs based mounting. 41 devtmpfs filesystem at /dev, directly after the kernel has
34 If unsure, say N here. 42 mounted the root filesystem. The behavior can be overridden
43 with the commandline parameter: devtmpfs.mount=0|1.
44 This option does not affect initramfs based booting, here
45 the devtmpfs filesystem always needs to be mounted manually
46 after the roots is mounted.
47 With this option enabled, it allows to bring up a system in
48 rescue mode with init=/bin/sh, even when the /dev directory
49 on the rootfs is completely empty.
35 50
36config STANDALONE 51config STANDALONE
37 bool "Select only drivers that don't need compile-time external firmware" if EXPERIMENTAL 52 bool "Select only drivers that don't need compile-time external firmware" if EXPERIMENTAL
diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index c0c5a43d9fb3..71f6af5c8b0b 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -70,7 +70,7 @@ static ssize_t drv_attr_store(struct kobject *kobj, struct attribute *attr,
70 return ret; 70 return ret;
71} 71}
72 72
73static struct sysfs_ops driver_sysfs_ops = { 73static const struct sysfs_ops driver_sysfs_ops = {
74 .show = drv_attr_show, 74 .show = drv_attr_show,
75 .store = drv_attr_store, 75 .store = drv_attr_store,
76}; 76};
@@ -115,7 +115,7 @@ static ssize_t bus_attr_store(struct kobject *kobj, struct attribute *attr,
115 return ret; 115 return ret;
116} 116}
117 117
118static struct sysfs_ops bus_sysfs_ops = { 118static const struct sysfs_ops bus_sysfs_ops = {
119 .show = bus_attr_show, 119 .show = bus_attr_show,
120 .store = bus_attr_store, 120 .store = bus_attr_store,
121}; 121};
@@ -154,7 +154,7 @@ static int bus_uevent_filter(struct kset *kset, struct kobject *kobj)
154 return 0; 154 return 0;
155} 155}
156 156
157static struct kset_uevent_ops bus_uevent_ops = { 157static const struct kset_uevent_ops bus_uevent_ops = {
158 .filter = bus_uevent_filter, 158 .filter = bus_uevent_filter,
159}; 159};
160 160
@@ -173,10 +173,10 @@ static ssize_t driver_unbind(struct device_driver *drv,
173 dev = bus_find_device_by_name(bus, NULL, buf); 173 dev = bus_find_device_by_name(bus, NULL, buf);
174 if (dev && dev->driver == drv) { 174 if (dev && dev->driver == drv) {
175 if (dev->parent) /* Needed for USB */ 175 if (dev->parent) /* Needed for USB */
176 down(&dev->parent->sem); 176 device_lock(dev->parent);
177 device_release_driver(dev); 177 device_release_driver(dev);
178 if (dev->parent) 178 if (dev->parent)
179 up(&dev->parent->sem); 179 device_unlock(dev->parent);
180 err = count; 180 err = count;
181 } 181 }
182 put_device(dev); 182 put_device(dev);
@@ -200,12 +200,12 @@ static ssize_t driver_bind(struct device_driver *drv,
200 dev = bus_find_device_by_name(bus, NULL, buf); 200 dev = bus_find_device_by_name(bus, NULL, buf);
201 if (dev && dev->driver == NULL && driver_match_device(drv, dev)) { 201 if (dev && dev->driver == NULL && driver_match_device(drv, dev)) {
202 if (dev->parent) /* Needed for USB */ 202 if (dev->parent) /* Needed for USB */
203 down(&dev->parent->sem); 203 device_lock(dev->parent);
204 down(&dev->sem); 204 device_lock(dev);
205 err = driver_probe_device(drv, dev); 205 err = driver_probe_device(drv, dev);
206 up(&dev->sem); 206 device_unlock(dev);
207 if (dev->parent) 207 if (dev->parent)
208 up(&dev->parent->sem); 208 device_unlock(dev->parent);
209 209
210 if (err > 0) { 210 if (err > 0) {
211 /* success */ 211 /* success */
@@ -744,10 +744,10 @@ static int __must_check bus_rescan_devices_helper(struct device *dev,
744 744
745 if (!dev->driver) { 745 if (!dev->driver) {
746 if (dev->parent) /* Needed for USB */ 746 if (dev->parent) /* Needed for USB */
747 down(&dev->parent->sem); 747 device_lock(dev->parent);
748 ret = device_attach(dev); 748 ret = device_attach(dev);
749 if (dev->parent) 749 if (dev->parent)
750 up(&dev->parent->sem); 750 device_unlock(dev->parent);
751 } 751 }
752 return ret < 0 ? ret : 0; 752 return ret < 0 ? ret : 0;
753} 753}
@@ -779,10 +779,10 @@ int device_reprobe(struct device *dev)
779{ 779{
780 if (dev->driver) { 780 if (dev->driver) {
781 if (dev->parent) /* Needed for USB */ 781 if (dev->parent) /* Needed for USB */
782 down(&dev->parent->sem); 782 device_lock(dev->parent);
783 device_release_driver(dev); 783 device_release_driver(dev);
784 if (dev->parent) 784 if (dev->parent)
785 up(&dev->parent->sem); 785 device_unlock(dev->parent);
786 } 786 }
787 return bus_rescan_devices_helper(dev, NULL); 787 return bus_rescan_devices_helper(dev, NULL);
788} 788}
diff --git a/drivers/base/class.c b/drivers/base/class.c
index 6e2c3b064f53..0147f476b8a9 100644
--- a/drivers/base/class.c
+++ b/drivers/base/class.c
@@ -31,7 +31,7 @@ static ssize_t class_attr_show(struct kobject *kobj, struct attribute *attr,
31 ssize_t ret = -EIO; 31 ssize_t ret = -EIO;
32 32
33 if (class_attr->show) 33 if (class_attr->show)
34 ret = class_attr->show(cp->class, buf); 34 ret = class_attr->show(cp->class, class_attr, buf);
35 return ret; 35 return ret;
36} 36}
37 37
@@ -43,7 +43,7 @@ static ssize_t class_attr_store(struct kobject *kobj, struct attribute *attr,
43 ssize_t ret = -EIO; 43 ssize_t ret = -EIO;
44 44
45 if (class_attr->store) 45 if (class_attr->store)
46 ret = class_attr->store(cp->class, buf, count); 46 ret = class_attr->store(cp->class, class_attr, buf, count);
47 return ret; 47 return ret;
48} 48}
49 49
@@ -63,7 +63,7 @@ static void class_release(struct kobject *kobj)
63 kfree(cp); 63 kfree(cp);
64} 64}
65 65
66static struct sysfs_ops class_sysfs_ops = { 66static const struct sysfs_ops class_sysfs_ops = {
67 .show = class_attr_show, 67 .show = class_attr_show,
68 .store = class_attr_store, 68 .store = class_attr_store,
69}; 69};
@@ -490,6 +490,16 @@ void class_interface_unregister(struct class_interface *class_intf)
490 class_put(parent); 490 class_put(parent);
491} 491}
492 492
493ssize_t show_class_attr_string(struct class *class, struct class_attribute *attr,
494 char *buf)
495{
496 struct class_attribute_string *cs;
497 cs = container_of(attr, struct class_attribute_string, attr);
498 return snprintf(buf, PAGE_SIZE, "%s\n", cs->str);
499}
500
501EXPORT_SYMBOL_GPL(show_class_attr_string);
502
493struct class_compat { 503struct class_compat {
494 struct kobject *kobj; 504 struct kobject *kobj;
495}; 505};
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 282025770429..ef55df34ddd0 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -100,7 +100,7 @@ static ssize_t dev_attr_store(struct kobject *kobj, struct attribute *attr,
100 return ret; 100 return ret;
101} 101}
102 102
103static struct sysfs_ops dev_sysfs_ops = { 103static const struct sysfs_ops dev_sysfs_ops = {
104 .show = dev_attr_show, 104 .show = dev_attr_show,
105 .store = dev_attr_store, 105 .store = dev_attr_store,
106}; 106};
@@ -252,7 +252,7 @@ static int dev_uevent(struct kset *kset, struct kobject *kobj,
252 return retval; 252 return retval;
253} 253}
254 254
255static struct kset_uevent_ops device_uevent_ops = { 255static const struct kset_uevent_ops device_uevent_ops = {
256 .filter = dev_uevent_filter, 256 .filter = dev_uevent_filter,
257 .name = dev_uevent_name, 257 .name = dev_uevent_name,
258 .uevent = dev_uevent, 258 .uevent = dev_uevent,
@@ -306,15 +306,10 @@ static ssize_t store_uevent(struct device *dev, struct device_attribute *attr,
306{ 306{
307 enum kobject_action action; 307 enum kobject_action action;
308 308
309 if (kobject_action_type(buf, count, &action) == 0) { 309 if (kobject_action_type(buf, count, &action) == 0)
310 kobject_uevent(&dev->kobj, action); 310 kobject_uevent(&dev->kobj, action);
311 goto out; 311 else
312 } 312 dev_err(dev, "uevent: unknown action-string\n");
313
314 dev_err(dev, "uevent: unsupported action-string; this will "
315 "be ignored in a future kernel version\n");
316 kobject_uevent(&dev->kobj, KOBJ_ADD);
317out:
318 return count; 313 return count;
319} 314}
320 315
@@ -607,6 +602,7 @@ static struct kobject *get_device_parent(struct device *dev,
607 int retval; 602 int retval;
608 603
609 if (dev->class) { 604 if (dev->class) {
605 static DEFINE_MUTEX(gdp_mutex);
610 struct kobject *kobj = NULL; 606 struct kobject *kobj = NULL;
611 struct kobject *parent_kobj; 607 struct kobject *parent_kobj;
612 struct kobject *k; 608 struct kobject *k;
@@ -623,6 +619,8 @@ static struct kobject *get_device_parent(struct device *dev,
623 else 619 else
624 parent_kobj = &parent->kobj; 620 parent_kobj = &parent->kobj;
625 621
622 mutex_lock(&gdp_mutex);
623
626 /* find our class-directory at the parent and reference it */ 624 /* find our class-directory at the parent and reference it */
627 spin_lock(&dev->class->p->class_dirs.list_lock); 625 spin_lock(&dev->class->p->class_dirs.list_lock);
628 list_for_each_entry(k, &dev->class->p->class_dirs.list, entry) 626 list_for_each_entry(k, &dev->class->p->class_dirs.list, entry)
@@ -631,20 +629,26 @@ static struct kobject *get_device_parent(struct device *dev,
631 break; 629 break;
632 } 630 }
633 spin_unlock(&dev->class->p->class_dirs.list_lock); 631 spin_unlock(&dev->class->p->class_dirs.list_lock);
634 if (kobj) 632 if (kobj) {
633 mutex_unlock(&gdp_mutex);
635 return kobj; 634 return kobj;
635 }
636 636
637 /* or create a new class-directory at the parent device */ 637 /* or create a new class-directory at the parent device */
638 k = kobject_create(); 638 k = kobject_create();
639 if (!k) 639 if (!k) {
640 mutex_unlock(&gdp_mutex);
640 return NULL; 641 return NULL;
642 }
641 k->kset = &dev->class->p->class_dirs; 643 k->kset = &dev->class->p->class_dirs;
642 retval = kobject_add(k, parent_kobj, "%s", dev->class->name); 644 retval = kobject_add(k, parent_kobj, "%s", dev->class->name);
643 if (retval < 0) { 645 if (retval < 0) {
646 mutex_unlock(&gdp_mutex);
644 kobject_put(k); 647 kobject_put(k);
645 return NULL; 648 return NULL;
646 } 649 }
647 /* do not emit an uevent for this simple "glue" directory */ 650 /* do not emit an uevent for this simple "glue" directory */
651 mutex_unlock(&gdp_mutex);
648 return k; 652 return k;
649 } 653 }
650 654
@@ -1574,22 +1578,16 @@ int device_rename(struct device *dev, char *new_name)
1574 if (old_class_name) { 1578 if (old_class_name) {
1575 new_class_name = make_class_name(dev->class->name, &dev->kobj); 1579 new_class_name = make_class_name(dev->class->name, &dev->kobj);
1576 if (new_class_name) { 1580 if (new_class_name) {
1577 error = sysfs_create_link_nowarn(&dev->parent->kobj, 1581 error = sysfs_rename_link(&dev->parent->kobj,
1578 &dev->kobj, 1582 &dev->kobj,
1579 new_class_name); 1583 old_class_name,
1580 if (error) 1584 new_class_name);
1581 goto out;
1582 sysfs_remove_link(&dev->parent->kobj, old_class_name);
1583 } 1585 }
1584 } 1586 }
1585#else 1587#else
1586 if (dev->class) { 1588 if (dev->class) {
1587 error = sysfs_create_link_nowarn(&dev->class->p->class_subsys.kobj, 1589 error = sysfs_rename_link(&dev->class->p->class_subsys.kobj,
1588 &dev->kobj, dev_name(dev)); 1590 &dev->kobj, old_device_name, new_name);
1589 if (error)
1590 goto out;
1591 sysfs_remove_link(&dev->class->p->class_subsys.kobj,
1592 old_device_name);
1593 } 1591 }
1594#endif 1592#endif
1595 1593
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index 958bd1540c30..7036e8e96ab8 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -13,8 +13,11 @@
13 13
14#include "base.h" 14#include "base.h"
15 15
16static struct sysdev_class_attribute *cpu_sysdev_class_attrs[];
17
16struct sysdev_class cpu_sysdev_class = { 18struct sysdev_class cpu_sysdev_class = {
17 .name = "cpu", 19 .name = "cpu",
20 .attrs = cpu_sysdev_class_attrs,
18}; 21};
19EXPORT_SYMBOL(cpu_sysdev_class); 22EXPORT_SYMBOL(cpu_sysdev_class);
20 23
@@ -76,34 +79,24 @@ void unregister_cpu(struct cpu *cpu)
76} 79}
77 80
78#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE 81#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
79static ssize_t cpu_probe_store(struct class *class, const char *buf, 82static ssize_t cpu_probe_store(struct sys_device *dev,
83 struct sysdev_attribute *attr,
84 const char *buf,
80 size_t count) 85 size_t count)
81{ 86{
82 return arch_cpu_probe(buf, count); 87 return arch_cpu_probe(buf, count);
83} 88}
84 89
85static ssize_t cpu_release_store(struct class *class, const char *buf, 90static ssize_t cpu_release_store(struct sys_device *dev,
91 struct sysdev_attribute *attr,
92 const char *buf,
86 size_t count) 93 size_t count)
87{ 94{
88 return arch_cpu_release(buf, count); 95 return arch_cpu_release(buf, count);
89} 96}
90 97
91static CLASS_ATTR(probe, S_IWUSR, NULL, cpu_probe_store); 98static SYSDEV_ATTR(probe, S_IWUSR, NULL, cpu_probe_store);
92static CLASS_ATTR(release, S_IWUSR, NULL, cpu_release_store); 99static SYSDEV_ATTR(release, S_IWUSR, NULL, cpu_release_store);
93
94int __init cpu_probe_release_init(void)
95{
96 int rc;
97
98 rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
99 &class_attr_probe.attr);
100 if (!rc)
101 rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
102 &class_attr_release.attr);
103
104 return rc;
105}
106device_initcall(cpu_probe_release_init);
107#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */ 100#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
108 101
109#else /* ... !CONFIG_HOTPLUG_CPU */ 102#else /* ... !CONFIG_HOTPLUG_CPU */
@@ -141,31 +134,39 @@ static SYSDEV_ATTR(crash_notes, 0400, show_crash_notes, NULL);
141/* 134/*
142 * Print cpu online, possible, present, and system maps 135 * Print cpu online, possible, present, and system maps
143 */ 136 */
144static ssize_t print_cpus_map(char *buf, const struct cpumask *map) 137
138struct cpu_attr {
139 struct sysdev_class_attribute attr;
140 const struct cpumask *const * const map;
141};
142
143static ssize_t show_cpus_attr(struct sysdev_class *class,
144 struct sysdev_class_attribute *attr,
145 char *buf)
145{ 146{
146 int n = cpulist_scnprintf(buf, PAGE_SIZE-2, map); 147 struct cpu_attr *ca = container_of(attr, struct cpu_attr, attr);
148 int n = cpulist_scnprintf(buf, PAGE_SIZE-2, *(ca->map));
147 149
148 buf[n++] = '\n'; 150 buf[n++] = '\n';
149 buf[n] = '\0'; 151 buf[n] = '\0';
150 return n; 152 return n;
151} 153}
152 154
153#define print_cpus_func(type) \ 155#define _CPU_ATTR(name, map) \
154static ssize_t print_cpus_##type(struct sysdev_class *class, char *buf) \ 156 { _SYSDEV_CLASS_ATTR(name, 0444, show_cpus_attr, NULL), map }
155{ \
156 return print_cpus_map(buf, cpu_##type##_mask); \
157} \
158static struct sysdev_class_attribute attr_##type##_map = \
159 _SYSDEV_CLASS_ATTR(type, 0444, print_cpus_##type, NULL)
160 157
161print_cpus_func(online); 158/* Keep in sync with cpu_sysdev_class_attrs */
162print_cpus_func(possible); 159static struct cpu_attr cpu_attrs[] = {
163print_cpus_func(present); 160 _CPU_ATTR(online, &cpu_online_mask),
161 _CPU_ATTR(possible, &cpu_possible_mask),
162 _CPU_ATTR(present, &cpu_present_mask),
163};
164 164
165/* 165/*
166 * Print values for NR_CPUS and offlined cpus 166 * Print values for NR_CPUS and offlined cpus
167 */ 167 */
168static ssize_t print_cpus_kernel_max(struct sysdev_class *class, char *buf) 168static ssize_t print_cpus_kernel_max(struct sysdev_class *class,
169 struct sysdev_class_attribute *attr, char *buf)
169{ 170{
170 int n = snprintf(buf, PAGE_SIZE-2, "%d\n", NR_CPUS - 1); 171 int n = snprintf(buf, PAGE_SIZE-2, "%d\n", NR_CPUS - 1);
171 return n; 172 return n;
@@ -175,7 +176,8 @@ static SYSDEV_CLASS_ATTR(kernel_max, 0444, print_cpus_kernel_max, NULL);
175/* arch-optional setting to enable display of offline cpus >= nr_cpu_ids */ 176/* arch-optional setting to enable display of offline cpus >= nr_cpu_ids */
176unsigned int total_cpus; 177unsigned int total_cpus;
177 178
178static ssize_t print_cpus_offline(struct sysdev_class *class, char *buf) 179static ssize_t print_cpus_offline(struct sysdev_class *class,
180 struct sysdev_class_attribute *attr, char *buf)
179{ 181{
180 int n = 0, len = PAGE_SIZE-2; 182 int n = 0, len = PAGE_SIZE-2;
181 cpumask_var_t offline; 183 cpumask_var_t offline;
@@ -204,29 +206,6 @@ static ssize_t print_cpus_offline(struct sysdev_class *class, char *buf)
204} 206}
205static SYSDEV_CLASS_ATTR(offline, 0444, print_cpus_offline, NULL); 207static SYSDEV_CLASS_ATTR(offline, 0444, print_cpus_offline, NULL);
206 208
207static struct sysdev_class_attribute *cpu_state_attr[] = {
208 &attr_online_map,
209 &attr_possible_map,
210 &attr_present_map,
211 &attr_kernel_max,
212 &attr_offline,
213};
214
215static int cpu_states_init(void)
216{
217 int i;
218 int err = 0;
219
220 for (i = 0; i < ARRAY_SIZE(cpu_state_attr); i++) {
221 int ret;
222 ret = sysdev_class_create_file(&cpu_sysdev_class,
223 cpu_state_attr[i]);
224 if (!err)
225 err = ret;
226 }
227 return err;
228}
229
230/* 209/*
231 * register_cpu - Setup a sysfs device for a CPU. 210 * register_cpu - Setup a sysfs device for a CPU.
232 * @cpu - cpu->hotpluggable field set to 1 will generate a control file in 211 * @cpu - cpu->hotpluggable field set to 1 will generate a control file in
@@ -272,9 +251,6 @@ int __init cpu_dev_init(void)
272 int err; 251 int err;
273 252
274 err = sysdev_class_register(&cpu_sysdev_class); 253 err = sysdev_class_register(&cpu_sysdev_class);
275 if (!err)
276 err = cpu_states_init();
277
278#if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT) 254#if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT)
279 if (!err) 255 if (!err)
280 err = sched_create_sysfs_power_savings_entries(&cpu_sysdev_class); 256 err = sched_create_sysfs_power_savings_entries(&cpu_sysdev_class);
@@ -282,3 +258,16 @@ int __init cpu_dev_init(void)
282 258
283 return err; 259 return err;
284} 260}
261
262static struct sysdev_class_attribute *cpu_sysdev_class_attrs[] = {
263#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
264 &attr_probe,
265 &attr_release,
266#endif
267 &cpu_attrs[0].attr,
268 &cpu_attrs[1].attr,
269 &cpu_attrs[2].attr,
270 &attr_kernel_max,
271 &attr_offline,
272 NULL
273};
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index ee95c76bfd3d..c89291f8a16b 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -85,7 +85,7 @@ static void driver_sysfs_remove(struct device *dev)
85 * for before calling this. (It is ok to call with no other effort 85 * for before calling this. (It is ok to call with no other effort
86 * from a driver's probe() method.) 86 * from a driver's probe() method.)
87 * 87 *
88 * This function must be called with @dev->sem held. 88 * This function must be called with the device lock held.
89 */ 89 */
90int device_bind_driver(struct device *dev) 90int device_bind_driver(struct device *dev)
91{ 91{
@@ -190,8 +190,8 @@ EXPORT_SYMBOL_GPL(wait_for_device_probe);
190 * This function returns -ENODEV if the device is not registered, 190 * This function returns -ENODEV if the device is not registered,
191 * 1 if the device is bound successfully and 0 otherwise. 191 * 1 if the device is bound successfully and 0 otherwise.
192 * 192 *
193 * This function must be called with @dev->sem held. When called for a 193 * This function must be called with @dev lock held. When called for a
194 * USB interface, @dev->parent->sem must be held as well. 194 * USB interface, @dev->parent lock must be held as well.
195 */ 195 */
196int driver_probe_device(struct device_driver *drv, struct device *dev) 196int driver_probe_device(struct device_driver *drv, struct device *dev)
197{ 197{
@@ -233,13 +233,13 @@ static int __device_attach(struct device_driver *drv, void *data)
233 * 0 if no matching driver was found; 233 * 0 if no matching driver was found;
234 * -ENODEV if the device is not registered. 234 * -ENODEV if the device is not registered.
235 * 235 *
236 * When called for a USB interface, @dev->parent->sem must be held. 236 * When called for a USB interface, @dev->parent lock must be held.
237 */ 237 */
238int device_attach(struct device *dev) 238int device_attach(struct device *dev)
239{ 239{
240 int ret = 0; 240 int ret = 0;
241 241
242 down(&dev->sem); 242 device_lock(dev);
243 if (dev->driver) { 243 if (dev->driver) {
244 ret = device_bind_driver(dev); 244 ret = device_bind_driver(dev);
245 if (ret == 0) 245 if (ret == 0)
@@ -253,7 +253,7 @@ int device_attach(struct device *dev)
253 ret = bus_for_each_drv(dev->bus, NULL, dev, __device_attach); 253 ret = bus_for_each_drv(dev->bus, NULL, dev, __device_attach);
254 pm_runtime_put_sync(dev); 254 pm_runtime_put_sync(dev);
255 } 255 }
256 up(&dev->sem); 256 device_unlock(dev);
257 return ret; 257 return ret;
258} 258}
259EXPORT_SYMBOL_GPL(device_attach); 259EXPORT_SYMBOL_GPL(device_attach);
@@ -276,13 +276,13 @@ static int __driver_attach(struct device *dev, void *data)
276 return 0; 276 return 0;
277 277
278 if (dev->parent) /* Needed for USB */ 278 if (dev->parent) /* Needed for USB */
279 down(&dev->parent->sem); 279 device_lock(dev->parent);
280 down(&dev->sem); 280 device_lock(dev);
281 if (!dev->driver) 281 if (!dev->driver)
282 driver_probe_device(drv, dev); 282 driver_probe_device(drv, dev);
283 up(&dev->sem); 283 device_unlock(dev);
284 if (dev->parent) 284 if (dev->parent)
285 up(&dev->parent->sem); 285 device_unlock(dev->parent);
286 286
287 return 0; 287 return 0;
288} 288}
@@ -303,8 +303,8 @@ int driver_attach(struct device_driver *drv)
303EXPORT_SYMBOL_GPL(driver_attach); 303EXPORT_SYMBOL_GPL(driver_attach);
304 304
305/* 305/*
306 * __device_release_driver() must be called with @dev->sem held. 306 * __device_release_driver() must be called with @dev lock held.
307 * When called for a USB interface, @dev->parent->sem must be held as well. 307 * When called for a USB interface, @dev->parent lock must be held as well.
308 */ 308 */
309static void __device_release_driver(struct device *dev) 309static void __device_release_driver(struct device *dev)
310{ 310{
@@ -343,7 +343,7 @@ static void __device_release_driver(struct device *dev)
343 * @dev: device. 343 * @dev: device.
344 * 344 *
345 * Manually detach device from driver. 345 * Manually detach device from driver.
346 * When called for a USB interface, @dev->parent->sem must be held. 346 * When called for a USB interface, @dev->parent lock must be held.
347 */ 347 */
348void device_release_driver(struct device *dev) 348void device_release_driver(struct device *dev)
349{ 349{
@@ -352,9 +352,9 @@ void device_release_driver(struct device *dev)
352 * within their ->remove callback for the same device, they 352 * within their ->remove callback for the same device, they
353 * will deadlock right here. 353 * will deadlock right here.
354 */ 354 */
355 down(&dev->sem); 355 device_lock(dev);
356 __device_release_driver(dev); 356 __device_release_driver(dev);
357 up(&dev->sem); 357 device_unlock(dev);
358} 358}
359EXPORT_SYMBOL_GPL(device_release_driver); 359EXPORT_SYMBOL_GPL(device_release_driver);
360 360
@@ -381,13 +381,13 @@ void driver_detach(struct device_driver *drv)
381 spin_unlock(&drv->p->klist_devices.k_lock); 381 spin_unlock(&drv->p->klist_devices.k_lock);
382 382
383 if (dev->parent) /* Needed for USB */ 383 if (dev->parent) /* Needed for USB */
384 down(&dev->parent->sem); 384 device_lock(dev->parent);
385 down(&dev->sem); 385 device_lock(dev);
386 if (dev->driver == drv) 386 if (dev->driver == drv)
387 __device_release_driver(dev); 387 __device_release_driver(dev);
388 up(&dev->sem); 388 device_unlock(dev);
389 if (dev->parent) 389 if (dev->parent)
390 up(&dev->parent->sem); 390 device_unlock(dev->parent);
391 put_device(dev); 391 put_device(dev);
392 } 392 }
393} 393}
diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c
index 42ae452b36b0..dac478c6e460 100644
--- a/drivers/base/devtmpfs.c
+++ b/drivers/base/devtmpfs.c
@@ -301,6 +301,19 @@ int devtmpfs_delete_node(struct device *dev)
301 if (dentry->d_inode) { 301 if (dentry->d_inode) {
302 err = vfs_getattr(nd.path.mnt, dentry, &stat); 302 err = vfs_getattr(nd.path.mnt, dentry, &stat);
303 if (!err && dev_mynode(dev, dentry->d_inode, &stat)) { 303 if (!err && dev_mynode(dev, dentry->d_inode, &stat)) {
304 struct iattr newattrs;
305 /*
306 * before unlinking this node, reset permissions
307 * of possible references like hardlinks
308 */
309 newattrs.ia_uid = 0;
310 newattrs.ia_gid = 0;
311 newattrs.ia_mode = stat.mode & ~0777;
312 newattrs.ia_valid =
313 ATTR_UID|ATTR_GID|ATTR_MODE;
314 mutex_lock(&dentry->d_inode->i_mutex);
315 notify_change(dentry, &newattrs);
316 mutex_unlock(&dentry->d_inode->i_mutex);
304 err = vfs_unlink(nd.path.dentry->d_inode, 317 err = vfs_unlink(nd.path.dentry->d_inode,
305 dentry); 318 dentry);
306 if (!err || err == -ENOENT) 319 if (!err || err == -ENOENT)
diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
index a95024166b66..d0dc26ad5387 100644
--- a/drivers/base/firmware_class.c
+++ b/drivers/base/firmware_class.c
@@ -19,7 +19,6 @@
19#include <linux/kthread.h> 19#include <linux/kthread.h>
20#include <linux/highmem.h> 20#include <linux/highmem.h>
21#include <linux/firmware.h> 21#include <linux/firmware.h>
22#include "base.h"
23 22
24#define to_dev(obj) container_of(obj, struct device, kobj) 23#define to_dev(obj) container_of(obj, struct device, kobj)
25 24
@@ -69,7 +68,9 @@ fw_load_abort(struct firmware_priv *fw_priv)
69} 68}
70 69
71static ssize_t 70static ssize_t
72firmware_timeout_show(struct class *class, char *buf) 71firmware_timeout_show(struct class *class,
72 struct class_attribute *attr,
73 char *buf)
73{ 74{
74 return sprintf(buf, "%d\n", loading_timeout); 75 return sprintf(buf, "%d\n", loading_timeout);
75} 76}
@@ -87,7 +88,9 @@ firmware_timeout_show(struct class *class, char *buf)
87 * Note: zero means 'wait forever'. 88 * Note: zero means 'wait forever'.
88 **/ 89 **/
89static ssize_t 90static ssize_t
90firmware_timeout_store(struct class *class, const char *buf, size_t count) 91firmware_timeout_store(struct class *class,
92 struct class_attribute *attr,
93 const char *buf, size_t count)
91{ 94{
92 loading_timeout = simple_strtol(buf, NULL, 10); 95 loading_timeout = simple_strtol(buf, NULL, 10);
93 if (loading_timeout < 0) 96 if (loading_timeout < 0)
@@ -610,7 +613,7 @@ request_firmware_work_func(void *arg)
610} 613}
611 614
612/** 615/**
613 * request_firmware_nowait: asynchronous version of request_firmware 616 * request_firmware_nowait - asynchronous version of request_firmware
614 * @module: module requesting the firmware 617 * @module: module requesting the firmware
615 * @uevent: sends uevent to copy the firmware image if this flag 618 * @uevent: sends uevent to copy the firmware image if this flag
616 * is non-zero else the firmware copy must be done manually. 619 * is non-zero else the firmware copy must be done manually.
diff --git a/drivers/base/memory.c b/drivers/base/memory.c
index bd025059711f..2f8691511190 100644
--- a/drivers/base/memory.c
+++ b/drivers/base/memory.c
@@ -44,7 +44,7 @@ static int memory_uevent(struct kset *kset, struct kobject *obj, struct kobj_uev
44 return retval; 44 return retval;
45} 45}
46 46
47static struct kset_uevent_ops memory_uevent_ops = { 47static const struct kset_uevent_ops memory_uevent_ops = {
48 .name = memory_uevent_name, 48 .name = memory_uevent_name,
49 .uevent = memory_uevent, 49 .uevent = memory_uevent,
50}; 50};
@@ -309,17 +309,18 @@ static SYSDEV_ATTR(removable, 0444, show_mem_removable, NULL);
309 * Block size attribute stuff 309 * Block size attribute stuff
310 */ 310 */
311static ssize_t 311static ssize_t
312print_block_size(struct class *class, char *buf) 312print_block_size(struct sysdev_class *class, struct sysdev_class_attribute *attr,
313 char *buf)
313{ 314{
314 return sprintf(buf, "%#lx\n", (unsigned long)PAGES_PER_SECTION * PAGE_SIZE); 315 return sprintf(buf, "%#lx\n", (unsigned long)PAGES_PER_SECTION * PAGE_SIZE);
315} 316}
316 317
317static CLASS_ATTR(block_size_bytes, 0444, print_block_size, NULL); 318static SYSDEV_CLASS_ATTR(block_size_bytes, 0444, print_block_size, NULL);
318 319
319static int block_size_init(void) 320static int block_size_init(void)
320{ 321{
321 return sysfs_create_file(&memory_sysdev_class.kset.kobj, 322 return sysfs_create_file(&memory_sysdev_class.kset.kobj,
322 &class_attr_block_size_bytes.attr); 323 &attr_block_size_bytes.attr);
323} 324}
324 325
325/* 326/*
@@ -330,7 +331,8 @@ static int block_size_init(void)
330 */ 331 */
331#ifdef CONFIG_ARCH_MEMORY_PROBE 332#ifdef CONFIG_ARCH_MEMORY_PROBE
332static ssize_t 333static ssize_t
333memory_probe_store(struct class *class, const char *buf, size_t count) 334memory_probe_store(struct class *class, struct class_attribute *attr,
335 const char *buf, size_t count)
334{ 336{
335 u64 phys_addr; 337 u64 phys_addr;
336 int nid; 338 int nid;
@@ -367,7 +369,9 @@ static inline int memory_probe_init(void)
367 369
368/* Soft offline a page */ 370/* Soft offline a page */
369static ssize_t 371static ssize_t
370store_soft_offline_page(struct class *class, const char *buf, size_t count) 372store_soft_offline_page(struct class *class,
373 struct class_attribute *attr,
374 const char *buf, size_t count)
371{ 375{
372 int ret; 376 int ret;
373 u64 pfn; 377 u64 pfn;
@@ -384,7 +388,9 @@ store_soft_offline_page(struct class *class, const char *buf, size_t count)
384 388
385/* Forcibly offline a page, including killing processes. */ 389/* Forcibly offline a page, including killing processes. */
386static ssize_t 390static ssize_t
387store_hard_offline_page(struct class *class, const char *buf, size_t count) 391store_hard_offline_page(struct class *class,
392 struct class_attribute *attr,
393 const char *buf, size_t count)
388{ 394{
389 int ret; 395 int ret;
390 u64 pfn; 396 u64 pfn;
diff --git a/drivers/base/node.c b/drivers/base/node.c
index 70122791683d..ad43185ec15a 100644
--- a/drivers/base/node.c
+++ b/drivers/base/node.c
@@ -16,8 +16,11 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/swap.h> 17#include <linux/swap.h>
18 18
19static struct sysdev_class_attribute *node_state_attrs[];
20
19static struct sysdev_class node_class = { 21static struct sysdev_class node_class = {
20 .name = "node", 22 .name = "node",
23 .attrs = node_state_attrs,
21}; 24};
22 25
23 26
@@ -544,76 +547,52 @@ static ssize_t print_nodes_state(enum node_states state, char *buf)
544 return n; 547 return n;
545} 548}
546 549
547static ssize_t print_nodes_possible(struct sysdev_class *class, char *buf) 550struct node_attr {
548{ 551 struct sysdev_class_attribute attr;
549 return print_nodes_state(N_POSSIBLE, buf); 552 enum node_states state;
550} 553};
551
552static ssize_t print_nodes_online(struct sysdev_class *class, char *buf)
553{
554 return print_nodes_state(N_ONLINE, buf);
555}
556
557static ssize_t print_nodes_has_normal_memory(struct sysdev_class *class,
558 char *buf)
559{
560 return print_nodes_state(N_NORMAL_MEMORY, buf);
561}
562 554
563static ssize_t print_nodes_has_cpu(struct sysdev_class *class, char *buf) 555static ssize_t show_node_state(struct sysdev_class *class,
556 struct sysdev_class_attribute *attr, char *buf)
564{ 557{
565 return print_nodes_state(N_CPU, buf); 558 struct node_attr *na = container_of(attr, struct node_attr, attr);
559 return print_nodes_state(na->state, buf);
566} 560}
567 561
568static SYSDEV_CLASS_ATTR(possible, 0444, print_nodes_possible, NULL); 562#define _NODE_ATTR(name, state) \
569static SYSDEV_CLASS_ATTR(online, 0444, print_nodes_online, NULL); 563 { _SYSDEV_CLASS_ATTR(name, 0444, show_node_state, NULL), state }
570static SYSDEV_CLASS_ATTR(has_normal_memory, 0444, print_nodes_has_normal_memory,
571 NULL);
572static SYSDEV_CLASS_ATTR(has_cpu, 0444, print_nodes_has_cpu, NULL);
573 564
565static struct node_attr node_state_attr[] = {
566 _NODE_ATTR(possible, N_POSSIBLE),
567 _NODE_ATTR(online, N_ONLINE),
568 _NODE_ATTR(has_normal_memory, N_NORMAL_MEMORY),
569 _NODE_ATTR(has_cpu, N_CPU),
574#ifdef CONFIG_HIGHMEM 570#ifdef CONFIG_HIGHMEM
575static ssize_t print_nodes_has_high_memory(struct sysdev_class *class, 571 _NODE_ATTR(has_high_memory, N_HIGH_MEMORY),
576 char *buf)
577{
578 return print_nodes_state(N_HIGH_MEMORY, buf);
579}
580
581static SYSDEV_CLASS_ATTR(has_high_memory, 0444, print_nodes_has_high_memory,
582 NULL);
583#endif 572#endif
573};
584 574
585struct sysdev_class_attribute *node_state_attr[] = { 575static struct sysdev_class_attribute *node_state_attrs[] = {
586 &attr_possible, 576 &node_state_attr[0].attr,
587 &attr_online, 577 &node_state_attr[1].attr,
588 &attr_has_normal_memory, 578 &node_state_attr[2].attr,
579 &node_state_attr[3].attr,
589#ifdef CONFIG_HIGHMEM 580#ifdef CONFIG_HIGHMEM
590 &attr_has_high_memory, 581 &node_state_attr[4].attr,
591#endif 582#endif
592 &attr_has_cpu, 583 NULL
593}; 584};
594 585
595static int node_states_init(void)
596{
597 int i;
598 int err = 0;
599
600 for (i = 0; i < NR_NODE_STATES; i++) {
601 int ret;
602 ret = sysdev_class_create_file(&node_class, node_state_attr[i]);
603 if (!err)
604 err = ret;
605 }
606 return err;
607}
608
609#define NODE_CALLBACK_PRI 2 /* lower than SLAB */ 586#define NODE_CALLBACK_PRI 2 /* lower than SLAB */
610static int __init register_node_type(void) 587static int __init register_node_type(void)
611{ 588{
612 int ret; 589 int ret;
613 590
591 BUILD_BUG_ON(ARRAY_SIZE(node_state_attr) != NR_NODE_STATES);
592 BUILD_BUG_ON(ARRAY_SIZE(node_state_attrs)-1 != NR_NODE_STATES);
593
614 ret = sysdev_class_register(&node_class); 594 ret = sysdev_class_register(&node_class);
615 if (!ret) { 595 if (!ret) {
616 ret = node_states_init();
617 hotplug_memory_notifier(node_memory_callback, 596 hotplug_memory_notifier(node_memory_callback,
618 NODE_CALLBACK_PRI); 597 NODE_CALLBACK_PRI);
619 } 598 }
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 58efaf2f1259..1ba9d617d241 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -128,7 +128,7 @@ struct platform_object {
128}; 128};
129 129
130/** 130/**
131 * platform_device_put 131 * platform_device_put - destroy a platform device
132 * @pdev: platform device to free 132 * @pdev: platform device to free
133 * 133 *
134 * Free all memory associated with a platform device. This function must 134 * Free all memory associated with a platform device. This function must
@@ -152,7 +152,7 @@ static void platform_device_release(struct device *dev)
152} 152}
153 153
154/** 154/**
155 * platform_device_alloc 155 * platform_device_alloc - create a platform device
156 * @name: base name of the device we're adding 156 * @name: base name of the device we're adding
157 * @id: instance id 157 * @id: instance id
158 * 158 *
@@ -177,7 +177,7 @@ struct platform_device *platform_device_alloc(const char *name, int id)
177EXPORT_SYMBOL_GPL(platform_device_alloc); 177EXPORT_SYMBOL_GPL(platform_device_alloc);
178 178
179/** 179/**
180 * platform_device_add_resources 180 * platform_device_add_resources - add resources to a platform device
181 * @pdev: platform device allocated by platform_device_alloc to add resources to 181 * @pdev: platform device allocated by platform_device_alloc to add resources to
182 * @res: set of resources that needs to be allocated for the device 182 * @res: set of resources that needs to be allocated for the device
183 * @num: number of resources 183 * @num: number of resources
@@ -202,7 +202,7 @@ int platform_device_add_resources(struct platform_device *pdev,
202EXPORT_SYMBOL_GPL(platform_device_add_resources); 202EXPORT_SYMBOL_GPL(platform_device_add_resources);
203 203
204/** 204/**
205 * platform_device_add_data 205 * platform_device_add_data - add platform-specific data to a platform device
206 * @pdev: platform device allocated by platform_device_alloc to add resources to 206 * @pdev: platform device allocated by platform_device_alloc to add resources to
207 * @data: platform specific data for this platform device 207 * @data: platform specific data for this platform device
208 * @size: size of platform specific data 208 * @size: size of platform specific data
@@ -344,7 +344,7 @@ void platform_device_unregister(struct platform_device *pdev)
344EXPORT_SYMBOL_GPL(platform_device_unregister); 344EXPORT_SYMBOL_GPL(platform_device_unregister);
345 345
346/** 346/**
347 * platform_device_register_simple 347 * platform_device_register_simple - add a platform-level device and its resources
348 * @name: base name of the device we're adding 348 * @name: base name of the device we're adding
349 * @id: instance id 349 * @id: instance id
350 * @res: set of resources that needs to be allocated for the device 350 * @res: set of resources that needs to be allocated for the device
@@ -396,7 +396,7 @@ error:
396EXPORT_SYMBOL_GPL(platform_device_register_simple); 396EXPORT_SYMBOL_GPL(platform_device_register_simple);
397 397
398/** 398/**
399 * platform_device_register_data 399 * platform_device_register_data - add a platform-level device with platform-specific data
400 * @parent: parent device for the device we're adding 400 * @parent: parent device for the device we're adding
401 * @name: base name of the device we're adding 401 * @name: base name of the device we're adding
402 * @id: instance id 402 * @id: instance id
@@ -473,7 +473,7 @@ static void platform_drv_shutdown(struct device *_dev)
473} 473}
474 474
475/** 475/**
476 * platform_driver_register 476 * platform_driver_register - register a driver for platform-level devices
477 * @drv: platform driver structure 477 * @drv: platform driver structure
478 */ 478 */
479int platform_driver_register(struct platform_driver *drv) 479int platform_driver_register(struct platform_driver *drv)
@@ -491,7 +491,7 @@ int platform_driver_register(struct platform_driver *drv)
491EXPORT_SYMBOL_GPL(platform_driver_register); 491EXPORT_SYMBOL_GPL(platform_driver_register);
492 492
493/** 493/**
494 * platform_driver_unregister 494 * platform_driver_unregister - unregister a driver for platform-level devices
495 * @drv: platform driver structure 495 * @drv: platform driver structure
496 */ 496 */
497void platform_driver_unregister(struct platform_driver *drv) 497void platform_driver_unregister(struct platform_driver *drv)
@@ -548,6 +548,64 @@ int __init_or_module platform_driver_probe(struct platform_driver *drv,
548} 548}
549EXPORT_SYMBOL_GPL(platform_driver_probe); 549EXPORT_SYMBOL_GPL(platform_driver_probe);
550 550
551/**
552 * platform_create_bundle - register driver and create corresponding device
553 * @driver: platform driver structure
554 * @probe: the driver probe routine, probably from an __init section
555 * @res: set of resources that needs to be allocated for the device
556 * @n_res: number of resources
557 * @data: platform specific data for this platform device
558 * @size: size of platform specific data
559 *
560 * Use this in legacy-style modules that probe hardware directly and
561 * register a single platform device and corresponding platform driver.
562 */
563struct platform_device * __init_or_module platform_create_bundle(
564 struct platform_driver *driver,
565 int (*probe)(struct platform_device *),
566 struct resource *res, unsigned int n_res,
567 const void *data, size_t size)
568{
569 struct platform_device *pdev;
570 int error;
571
572 pdev = platform_device_alloc(driver->driver.name, -1);
573 if (!pdev) {
574 error = -ENOMEM;
575 goto err_out;
576 }
577
578 if (res) {
579 error = platform_device_add_resources(pdev, res, n_res);
580 if (error)
581 goto err_pdev_put;
582 }
583
584 if (data) {
585 error = platform_device_add_data(pdev, data, size);
586 if (error)
587 goto err_pdev_put;
588 }
589
590 error = platform_device_add(pdev);
591 if (error)
592 goto err_pdev_put;
593
594 error = platform_driver_probe(driver, probe);
595 if (error)
596 goto err_pdev_del;
597
598 return pdev;
599
600err_pdev_del:
601 platform_device_del(pdev);
602err_pdev_put:
603 platform_device_put(pdev);
604err_out:
605 return ERR_PTR(error);
606}
607EXPORT_SYMBOL_GPL(platform_create_bundle);
608
551/* modalias support enables more hands-off userspace setup: 609/* modalias support enables more hands-off userspace setup:
552 * (a) environment variable lets new-style hotplug events work once system is 610 * (a) environment variable lets new-style hotplug events work once system is
553 * fully running: "modprobe $MODALIAS" 611 * fully running: "modprobe $MODALIAS"
@@ -578,7 +636,7 @@ static int platform_uevent(struct device *dev, struct kobj_uevent_env *env)
578} 636}
579 637
580static const struct platform_device_id *platform_match_id( 638static const struct platform_device_id *platform_match_id(
581 struct platform_device_id *id, 639 const struct platform_device_id *id,
582 struct platform_device *pdev) 640 struct platform_device *pdev)
583{ 641{
584 while (id->name[0]) { 642 while (id->name[0]) {
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 0e26a6f6fd48..d477f4dc5e51 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -35,8 +35,8 @@
35 * because children are guaranteed to be discovered after parents, and 35 * because children are guaranteed to be discovered after parents, and
36 * are inserted at the back of the list on discovery. 36 * are inserted at the back of the list on discovery.
37 * 37 *
38 * Since device_pm_add() may be called with a device semaphore held, 38 * Since device_pm_add() may be called with a device lock held,
39 * we must never try to acquire a device semaphore while holding 39 * we must never try to acquire a device lock while holding
40 * dpm_list_mutex. 40 * dpm_list_mutex.
41 */ 41 */
42 42
@@ -508,7 +508,7 @@ static int device_resume(struct device *dev, pm_message_t state, bool async)
508 TRACE_RESUME(0); 508 TRACE_RESUME(0);
509 509
510 dpm_wait(dev->parent, async); 510 dpm_wait(dev->parent, async);
511 down(&dev->sem); 511 device_lock(dev);
512 512
513 dev->power.status = DPM_RESUMING; 513 dev->power.status = DPM_RESUMING;
514 514
@@ -543,7 +543,7 @@ static int device_resume(struct device *dev, pm_message_t state, bool async)
543 } 543 }
544 } 544 }
545 End: 545 End:
546 up(&dev->sem); 546 device_unlock(dev);
547 complete_all(&dev->power.completion); 547 complete_all(&dev->power.completion);
548 548
549 TRACE_RESUME(error); 549 TRACE_RESUME(error);
@@ -629,7 +629,7 @@ static void dpm_resume(pm_message_t state)
629 */ 629 */
630static void device_complete(struct device *dev, pm_message_t state) 630static void device_complete(struct device *dev, pm_message_t state)
631{ 631{
632 down(&dev->sem); 632 device_lock(dev);
633 633
634 if (dev->class && dev->class->pm && dev->class->pm->complete) { 634 if (dev->class && dev->class->pm && dev->class->pm->complete) {
635 pm_dev_dbg(dev, state, "completing class "); 635 pm_dev_dbg(dev, state, "completing class ");
@@ -646,7 +646,7 @@ static void device_complete(struct device *dev, pm_message_t state)
646 dev->bus->pm->complete(dev); 646 dev->bus->pm->complete(dev);
647 } 647 }
648 648
649 up(&dev->sem); 649 device_unlock(dev);
650} 650}
651 651
652/** 652/**
@@ -809,7 +809,7 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
809 int error = 0; 809 int error = 0;
810 810
811 dpm_wait_for_children(dev, async); 811 dpm_wait_for_children(dev, async);
812 down(&dev->sem); 812 device_lock(dev);
813 813
814 if (async_error) 814 if (async_error)
815 goto End; 815 goto End;
@@ -849,7 +849,7 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
849 dev->power.status = DPM_OFF; 849 dev->power.status = DPM_OFF;
850 850
851 End: 851 End:
852 up(&dev->sem); 852 device_unlock(dev);
853 complete_all(&dev->power.completion); 853 complete_all(&dev->power.completion);
854 854
855 return error; 855 return error;
@@ -938,7 +938,7 @@ static int device_prepare(struct device *dev, pm_message_t state)
938{ 938{
939 int error = 0; 939 int error = 0;
940 940
941 down(&dev->sem); 941 device_lock(dev);
942 942
943 if (dev->bus && dev->bus->pm && dev->bus->pm->prepare) { 943 if (dev->bus && dev->bus->pm && dev->bus->pm->prepare) {
944 pm_dev_dbg(dev, state, "preparing "); 944 pm_dev_dbg(dev, state, "preparing ");
@@ -962,7 +962,7 @@ static int device_prepare(struct device *dev, pm_message_t state)
962 suspend_report_result(dev->class->pm->prepare, error); 962 suspend_report_result(dev->class->pm->prepare, error);
963 } 963 }
964 End: 964 End:
965 up(&dev->sem); 965 device_unlock(dev);
966 966
967 return error; 967 return error;
968} 968}
diff --git a/drivers/base/sys.c b/drivers/base/sys.c
index 0d903909af7e..8980feec5d14 100644
--- a/drivers/base/sys.c
+++ b/drivers/base/sys.c
@@ -54,7 +54,7 @@ sysdev_store(struct kobject *kobj, struct attribute *attr,
54 return -EIO; 54 return -EIO;
55} 55}
56 56
57static struct sysfs_ops sysfs_ops = { 57static const struct sysfs_ops sysfs_ops = {
58 .show = sysdev_show, 58 .show = sysdev_show,
59 .store = sysdev_store, 59 .store = sysdev_store,
60}; 60};
@@ -89,7 +89,7 @@ static ssize_t sysdev_class_show(struct kobject *kobj, struct attribute *attr,
89 struct sysdev_class_attribute *class_attr = to_sysdev_class_attr(attr); 89 struct sysdev_class_attribute *class_attr = to_sysdev_class_attr(attr);
90 90
91 if (class_attr->show) 91 if (class_attr->show)
92 return class_attr->show(class, buffer); 92 return class_attr->show(class, class_attr, buffer);
93 return -EIO; 93 return -EIO;
94} 94}
95 95
@@ -100,11 +100,11 @@ static ssize_t sysdev_class_store(struct kobject *kobj, struct attribute *attr,
100 struct sysdev_class_attribute *class_attr = to_sysdev_class_attr(attr); 100 struct sysdev_class_attribute *class_attr = to_sysdev_class_attr(attr);
101 101
102 if (class_attr->store) 102 if (class_attr->store)
103 return class_attr->store(class, buffer, count); 103 return class_attr->store(class, class_attr, buffer, count);
104 return -EIO; 104 return -EIO;
105} 105}
106 106
107static struct sysfs_ops sysfs_class_ops = { 107static const struct sysfs_ops sysfs_class_ops = {
108 .show = sysdev_class_show, 108 .show = sysdev_class_show,
109 .store = sysdev_class_store, 109 .store = sysdev_class_store,
110}; 110};
@@ -145,13 +145,20 @@ int sysdev_class_register(struct sysdev_class *cls)
145 if (retval) 145 if (retval)
146 return retval; 146 return retval;
147 147
148 return kset_register(&cls->kset); 148 retval = kset_register(&cls->kset);
149 if (!retval && cls->attrs)
150 retval = sysfs_create_files(&cls->kset.kobj,
151 (const struct attribute **)cls->attrs);
152 return retval;
149} 153}
150 154
151void sysdev_class_unregister(struct sysdev_class *cls) 155void sysdev_class_unregister(struct sysdev_class *cls)
152{ 156{
153 pr_debug("Unregistering sysdev class '%s'\n", 157 pr_debug("Unregistering sysdev class '%s'\n",
154 kobject_name(&cls->kset.kobj)); 158 kobject_name(&cls->kset.kobj));
159 if (cls->attrs)
160 sysfs_remove_files(&cls->kset.kobj,
161 (const struct attribute **)cls->attrs);
155 kset_unregister(&cls->kset); 162 kset_unregister(&cls->kset);
156} 163}
157 164
diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h
index 2d5cebbbf253..e5e86a781820 100644
--- a/drivers/block/drbd/drbd_int.h
+++ b/drivers/block/drbd/drbd_int.h
@@ -95,7 +95,7 @@ extern char usermode_helper[];
95 95
96/* All EEs on the free list should have ID_VACANT (== 0) 96/* All EEs on the free list should have ID_VACANT (== 0)
97 * freshly allocated EEs get !ID_VACANT (== 1) 97 * freshly allocated EEs get !ID_VACANT (== 1)
98 * so if it says "cannot dereference null pointer at adress 0x00000001", 98 * so if it says "cannot dereference null pointer at address 0x00000001",
99 * it is most likely one of these :( */ 99 * it is most likely one of these :( */
100 100
101#define ID_IN_SYNC (4711ULL) 101#define ID_IN_SYNC (4711ULL)
@@ -1181,7 +1181,7 @@ extern int drbd_bitmap_io(struct drbd_conf *mdev, int (*io_fn)(struct drbd_conf
1181/* Meta data layout 1181/* Meta data layout
1182 We reserve a 128MB Block (4k aligned) 1182 We reserve a 128MB Block (4k aligned)
1183 * either at the end of the backing device 1183 * either at the end of the backing device
1184 * or on a seperate meta data device. */ 1184 * or on a separate meta data device. */
1185 1185
1186#define MD_RESERVED_SECT (128LU << 11) /* 128 MB, unit sectors */ 1186#define MD_RESERVED_SECT (128LU << 11) /* 128 MB, unit sectors */
1187/* The following numbers are sectors */ 1187/* The following numbers are sectors */
diff --git a/drivers/block/drbd/drbd_req.h b/drivers/block/drbd/drbd_req.h
index f22c1bc8ec7e..16119d7056cc 100644
--- a/drivers/block/drbd/drbd_req.h
+++ b/drivers/block/drbd/drbd_req.h
@@ -57,7 +57,7 @@
57 * 57 *
58 * It may me handed over to the local disk subsystem. 58 * It may me handed over to the local disk subsystem.
59 * It may be completed by the local disk subsystem, 59 * It may be completed by the local disk subsystem,
60 * either sucessfully or with io-error. 60 * either successfully or with io-error.
61 * In case it is a READ request, and it failed locally, 61 * In case it is a READ request, and it failed locally,
62 * it may be retried remotely. 62 * it may be retried remotely.
63 * 63 *
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index b9b117059b62..90c4038702da 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -144,13 +144,23 @@
144 * Better audit of register_blkdev. 144 * Better audit of register_blkdev.
145 */ 145 */
146 146
147#define FLOPPY_SANITY_CHECK
148#undef FLOPPY_SILENT_DCL_CLEAR 147#undef FLOPPY_SILENT_DCL_CLEAR
149 148
150#define REALLY_SLOW_IO 149#define REALLY_SLOW_IO
151 150
152#define DEBUGT 2 151#define DEBUGT 2
153#define DCL_DEBUG /* debug disk change line */ 152
153#define DPRINT(format, args...) \
154 pr_info("floppy%d: " format, current_drive, ##args)
155
156#define DCL_DEBUG /* debug disk change line */
157#ifdef DCL_DEBUG
158#define debug_dcl(test, fmt, args...) \
159 do { if ((test) & FD_DEBUG) DPRINT(fmt, ##args); } while (0)
160#else
161#define debug_dcl(test, fmt, args...) \
162 do { if (0) DPRINT(fmt, ##args); } while (0)
163#endif
154 164
155/* do print messages for unexpected interrupts */ 165/* do print messages for unexpected interrupts */
156static int print_unex = 1; 166static int print_unex = 1;
@@ -180,6 +190,8 @@ static int print_unex = 1;
180#include <linux/mod_devicetable.h> 190#include <linux/mod_devicetable.h>
181#include <linux/buffer_head.h> /* for invalidate_buffers() */ 191#include <linux/buffer_head.h> /* for invalidate_buffers() */
182#include <linux/mutex.h> 192#include <linux/mutex.h>
193#include <linux/io.h>
194#include <linux/uaccess.h>
183 195
184/* 196/*
185 * PS/2 floppies have much slower step rates than regular floppies. 197 * PS/2 floppies have much slower step rates than regular floppies.
@@ -191,8 +203,6 @@ static int slow_floppy;
191#include <asm/dma.h> 203#include <asm/dma.h>
192#include <asm/irq.h> 204#include <asm/irq.h>
193#include <asm/system.h> 205#include <asm/system.h>
194#include <asm/io.h>
195#include <asm/uaccess.h>
196 206
197static int FLOPPY_IRQ = 6; 207static int FLOPPY_IRQ = 6;
198static int FLOPPY_DMA = 2; 208static int FLOPPY_DMA = 2;
@@ -241,8 +251,6 @@ static int allowed_drive_mask = 0x33;
241 251
242static int irqdma_allocated; 252static int irqdma_allocated;
243 253
244#define DEVICE_NAME "floppy"
245
246#include <linux/blkdev.h> 254#include <linux/blkdev.h>
247#include <linux/blkpg.h> 255#include <linux/blkpg.h>
248#include <linux/cdrom.h> /* for the compatibility eject ioctl */ 256#include <linux/cdrom.h> /* for the compatibility eject ioctl */
@@ -250,7 +258,7 @@ static int irqdma_allocated;
250 258
251static struct request *current_req; 259static struct request *current_req;
252static struct request_queue *floppy_queue; 260static struct request_queue *floppy_queue;
253static void do_fd_request(struct request_queue * q); 261static void do_fd_request(struct request_queue *q);
254 262
255#ifndef fd_get_dma_residue 263#ifndef fd_get_dma_residue
256#define fd_get_dma_residue() get_dma_residue(FLOPPY_DMA) 264#define fd_get_dma_residue() get_dma_residue(FLOPPY_DMA)
@@ -263,7 +271,7 @@ static void do_fd_request(struct request_queue * q);
263#endif 271#endif
264 272
265#ifndef fd_dma_mem_alloc 273#ifndef fd_dma_mem_alloc
266#define fd_dma_mem_alloc(size) __get_dma_pages(GFP_KERNEL,get_order(size)) 274#define fd_dma_mem_alloc(size) __get_dma_pages(GFP_KERNEL, get_order(size))
267#endif 275#endif
268 276
269static inline void fallback_on_nodma_alloc(char **addr, size_t l) 277static inline void fallback_on_nodma_alloc(char **addr, size_t l)
@@ -273,7 +281,7 @@ static inline void fallback_on_nodma_alloc(char **addr, size_t l)
273 return; /* we have the memory */ 281 return; /* we have the memory */
274 if (can_use_virtual_dma != 2) 282 if (can_use_virtual_dma != 2)
275 return; /* no fallback allowed */ 283 return; /* no fallback allowed */
276 printk("DMA memory shortage. Temporarily falling back on virtual DMA\n"); 284 pr_info("DMA memory shortage. Temporarily falling back on virtual DMA\n");
277 *addr = (char *)nodma_mem_alloc(l); 285 *addr = (char *)nodma_mem_alloc(l);
278#else 286#else
279 return; 287 return;
@@ -283,59 +291,50 @@ static inline void fallback_on_nodma_alloc(char **addr, size_t l)
283/* End dma memory related stuff */ 291/* End dma memory related stuff */
284 292
285static unsigned long fake_change; 293static unsigned long fake_change;
286static int initialising = 1; 294static bool initialized;
287 295
288#define ITYPE(x) (((x)>>2) & 0x1f) 296#define ITYPE(x) (((x) >> 2) & 0x1f)
289#define TOMINOR(x) ((x & 3) | ((x & 4) << 5)) 297#define TOMINOR(x) ((x & 3) | ((x & 4) << 5))
290#define UNIT(x) ((x) & 0x03) /* drive on fdc */ 298#define UNIT(x) ((x) & 0x03) /* drive on fdc */
291#define FDC(x) (((x) & 0x04) >> 2) /* fdc of drive */ 299#define FDC(x) (((x) & 0x04) >> 2) /* fdc of drive */
292 /* reverse mapping from unit and fdc to drive */ 300 /* reverse mapping from unit and fdc to drive */
293#define REVDRIVE(fdc, unit) ((unit) + ((fdc) << 2)) 301#define REVDRIVE(fdc, unit) ((unit) + ((fdc) << 2))
294#define DP (&drive_params[current_drive])
295#define DRS (&drive_state[current_drive])
296#define DRWE (&write_errors[current_drive])
297#define FDCS (&fdc_state[fdc])
298#define CLEARF(x) clear_bit(x##_BIT, &DRS->flags)
299#define SETF(x) set_bit(x##_BIT, &DRS->flags)
300#define TESTF(x) test_bit(x##_BIT, &DRS->flags)
301 302
302#define UDP (&drive_params[drive]) 303#define DP (&drive_params[current_drive])
303#define UDRS (&drive_state[drive]) 304#define DRS (&drive_state[current_drive])
304#define UDRWE (&write_errors[drive]) 305#define DRWE (&write_errors[current_drive])
305#define UFDCS (&fdc_state[FDC(drive)]) 306#define FDCS (&fdc_state[fdc])
306#define UCLEARF(x) clear_bit(x##_BIT, &UDRS->flags)
307#define USETF(x) set_bit(x##_BIT, &UDRS->flags)
308#define UTESTF(x) test_bit(x##_BIT, &UDRS->flags)
309 307
310#define DPRINT(format, args...) printk(DEVICE_NAME "%d: " format, current_drive , ## args) 308#define UDP (&drive_params[drive])
309#define UDRS (&drive_state[drive])
310#define UDRWE (&write_errors[drive])
311#define UFDCS (&fdc_state[FDC(drive)])
311 312
312#define PH_HEAD(floppy,head) (((((floppy)->stretch & 2) >>1) ^ head) << 2) 313#define PH_HEAD(floppy, head) (((((floppy)->stretch & 2) >> 1) ^ head) << 2)
313#define STRETCH(floppy) ((floppy)->stretch & FD_STRETCH) 314#define STRETCH(floppy) ((floppy)->stretch & FD_STRETCH)
314
315#define CLEARSTRUCT(x) memset((x), 0, sizeof(*(x)))
316 315
317/* read/write */ 316/* read/write */
318#define COMMAND raw_cmd->cmd[0] 317#define COMMAND (raw_cmd->cmd[0])
319#define DR_SELECT raw_cmd->cmd[1] 318#define DR_SELECT (raw_cmd->cmd[1])
320#define TRACK raw_cmd->cmd[2] 319#define TRACK (raw_cmd->cmd[2])
321#define HEAD raw_cmd->cmd[3] 320#define HEAD (raw_cmd->cmd[3])
322#define SECTOR raw_cmd->cmd[4] 321#define SECTOR (raw_cmd->cmd[4])
323#define SIZECODE raw_cmd->cmd[5] 322#define SIZECODE (raw_cmd->cmd[5])
324#define SECT_PER_TRACK raw_cmd->cmd[6] 323#define SECT_PER_TRACK (raw_cmd->cmd[6])
325#define GAP raw_cmd->cmd[7] 324#define GAP (raw_cmd->cmd[7])
326#define SIZECODE2 raw_cmd->cmd[8] 325#define SIZECODE2 (raw_cmd->cmd[8])
327#define NR_RW 9 326#define NR_RW 9
328 327
329/* format */ 328/* format */
330#define F_SIZECODE raw_cmd->cmd[2] 329#define F_SIZECODE (raw_cmd->cmd[2])
331#define F_SECT_PER_TRACK raw_cmd->cmd[3] 330#define F_SECT_PER_TRACK (raw_cmd->cmd[3])
332#define F_GAP raw_cmd->cmd[4] 331#define F_GAP (raw_cmd->cmd[4])
333#define F_FILL raw_cmd->cmd[5] 332#define F_FILL (raw_cmd->cmd[5])
334#define NR_F 6 333#define NR_F 6
335 334
336/* 335/*
337 * Maximum disk size (in kilobytes). This default is used whenever the 336 * Maximum disk size (in kilobytes).
338 * current disk size is unknown. 337 * This default is used whenever the current disk size is unknown.
339 * [Now it is rather a minimum] 338 * [Now it is rather a minimum]
340 */ 339 */
341#define MAX_DISK_SIZE 4 /* 3984 */ 340#define MAX_DISK_SIZE 4 /* 3984 */
@@ -345,16 +344,17 @@ static int initialising = 1;
345 */ 344 */
346#define MAX_REPLIES 16 345#define MAX_REPLIES 16
347static unsigned char reply_buffer[MAX_REPLIES]; 346static unsigned char reply_buffer[MAX_REPLIES];
348static int inr; /* size of reply buffer, when called from interrupt */ 347static int inr; /* size of reply buffer, when called from interrupt */
349#define ST0 (reply_buffer[0]) 348#define ST0 (reply_buffer[0])
350#define ST1 (reply_buffer[1]) 349#define ST1 (reply_buffer[1])
351#define ST2 (reply_buffer[2]) 350#define ST2 (reply_buffer[2])
352#define ST3 (reply_buffer[0]) /* result of GETSTATUS */ 351#define ST3 (reply_buffer[0]) /* result of GETSTATUS */
353#define R_TRACK (reply_buffer[3]) 352#define R_TRACK (reply_buffer[3])
354#define R_HEAD (reply_buffer[4]) 353#define R_HEAD (reply_buffer[4])
355#define R_SECTOR (reply_buffer[5]) 354#define R_SECTOR (reply_buffer[5])
356#define R_SIZECODE (reply_buffer[6]) 355#define R_SIZECODE (reply_buffer[6])
357#define SEL_DLY (2*HZ/100) 356
357#define SEL_DLY (2 * HZ / 100)
358 358
359/* 359/*
360 * this struct defines the different floppy drive types. 360 * this struct defines the different floppy drive types.
@@ -505,9 +505,9 @@ static char floppy_device_name[] = "floppy";
505static int probing; 505static int probing;
506 506
507/* Synchronization of FDC access. */ 507/* Synchronization of FDC access. */
508#define FD_COMMAND_NONE -1 508#define FD_COMMAND_NONE -1
509#define FD_COMMAND_ERROR 2 509#define FD_COMMAND_ERROR 2
510#define FD_COMMAND_OKAY 3 510#define FD_COMMAND_OKAY 3
511 511
512static volatile int command_status = FD_COMMAND_NONE; 512static volatile int command_status = FD_COMMAND_NONE;
513static unsigned long fdc_busy; 513static unsigned long fdc_busy;
@@ -515,11 +515,6 @@ static DECLARE_WAIT_QUEUE_HEAD(fdc_wait);
515static DECLARE_WAIT_QUEUE_HEAD(command_done); 515static DECLARE_WAIT_QUEUE_HEAD(command_done);
516 516
517#define NO_SIGNAL (!interruptible || !signal_pending(current)) 517#define NO_SIGNAL (!interruptible || !signal_pending(current))
518#define CALL(x) if ((x) == -EINTR) return -EINTR
519#define ECALL(x) if ((ret = (x))) return ret;
520#define _WAIT(x,i) CALL(ret=wait_til_done((x),i))
521#define WAIT(x) _WAIT((x),interruptible)
522#define IWAIT(x) _WAIT((x),1)
523 518
524/* Errors during formatting are counted here. */ 519/* Errors during formatting are counted here. */
525static int format_errors; 520static int format_errors;
@@ -545,8 +540,9 @@ static int max_buffer_sectors;
545static int *errors; 540static int *errors;
546typedef void (*done_f)(int); 541typedef void (*done_f)(int);
547static struct cont_t { 542static struct cont_t {
548 void (*interrupt)(void); /* this is called after the interrupt of the 543 void (*interrupt)(void);
549 * main command */ 544 /* this is called after the interrupt of the
545 * main command */
550 void (*redo)(void); /* this is called to retry the operation */ 546 void (*redo)(void); /* this is called to retry the operation */
551 void (*error)(void); /* this is called to tally an error */ 547 void (*error)(void); /* this is called to tally an error */
552 done_f done; /* this is called to say if the operation has 548 done_f done; /* this is called to say if the operation has
@@ -571,7 +567,6 @@ static void floppy_release_irq_and_dma(void);
571 * reset doesn't need to be tested before sending commands, because 567 * reset doesn't need to be tested before sending commands, because
572 * output_byte is automatically disabled when reset is set. 568 * output_byte is automatically disabled when reset is set.
573 */ 569 */
574#define CHECK_RESET { if (FDCS->reset){ reset_fdc(); return; } }
575static void reset_fdc(void); 570static void reset_fdc(void);
576 571
577/* 572/*
@@ -579,9 +574,9 @@ static void reset_fdc(void);
579 * information to interrupts. They are the data used for the current 574 * information to interrupts. They are the data used for the current
580 * request. 575 * request.
581 */ 576 */
582#define NO_TRACK -1 577#define NO_TRACK -1
583#define NEED_1_RECAL -2 578#define NEED_1_RECAL -2
584#define NEED_2_RECAL -3 579#define NEED_2_RECAL -3
585 580
586static int usage_count; 581static int usage_count;
587 582
@@ -621,39 +616,35 @@ static inline void set_debugt(void)
621 debugtimer = jiffies; 616 debugtimer = jiffies;
622} 617}
623 618
624static inline void debugt(const char *message) 619static inline void debugt(const char *func, const char *msg)
625{ 620{
626 if (DP->flags & DEBUGT) 621 if (DP->flags & DEBUGT)
627 printk("%s dtime=%lu\n", message, jiffies - debugtimer); 622 pr_info("%s:%s dtime=%lu\n", func, msg, jiffies - debugtimer);
628} 623}
629#else 624#else
630static inline void set_debugt(void) { } 625static inline void set_debugt(void) { }
631static inline void debugt(const char *message) { } 626static inline void debugt(const char *func, const char *msg) { }
632#endif /* DEBUGT */ 627#endif /* DEBUGT */
633 628
634typedef void (*timeout_fn) (unsigned long); 629typedef void (*timeout_fn)(unsigned long);
635static DEFINE_TIMER(fd_timeout, floppy_shutdown, 0, 0); 630static DEFINE_TIMER(fd_timeout, floppy_shutdown, 0, 0);
636 631
637static const char *timeout_message; 632static const char *timeout_message;
638 633
639#ifdef FLOPPY_SANITY_CHECK 634static void is_alive(const char *func, const char *message)
640static void is_alive(const char *message)
641{ 635{
642 /* this routine checks whether the floppy driver is "alive" */ 636 /* this routine checks whether the floppy driver is "alive" */
643 if (test_bit(0, &fdc_busy) && command_status < 2 637 if (test_bit(0, &fdc_busy) && command_status < 2 &&
644 && !timer_pending(&fd_timeout)) { 638 !timer_pending(&fd_timeout)) {
645 DPRINT("timeout handler died: %s\n", message); 639 DPRINT("%s: timeout handler died. %s\n", func, message);
646 } 640 }
647} 641}
648#endif
649 642
650static void (*do_floppy) (void) = NULL; 643static void (*do_floppy)(void) = NULL;
651
652#ifdef FLOPPY_SANITY_CHECK
653 644
654#define OLOGSIZE 20 645#define OLOGSIZE 20
655 646
656static void (*lasthandler) (void); 647static void (*lasthandler)(void);
657static unsigned long interruptjiffies; 648static unsigned long interruptjiffies;
658static unsigned long resultjiffies; 649static unsigned long resultjiffies;
659static int resultsize; 650static int resultsize;
@@ -666,12 +657,11 @@ static struct output_log {
666} output_log[OLOGSIZE]; 657} output_log[OLOGSIZE];
667 658
668static int output_log_pos; 659static int output_log_pos;
669#endif
670 660
671#define current_reqD -1 661#define current_reqD -1
672#define MAXTIMEOUT -2 662#define MAXTIMEOUT -2
673 663
674static void __reschedule_timeout(int drive, const char *message, int marg) 664static void __reschedule_timeout(int drive, const char *message)
675{ 665{
676 if (drive == current_reqD) 666 if (drive == current_reqD)
677 drive = current_drive; 667 drive = current_drive;
@@ -682,25 +672,22 @@ static void __reschedule_timeout(int drive, const char *message, int marg)
682 } else 672 } else
683 fd_timeout.expires = jiffies + UDP->timeout; 673 fd_timeout.expires = jiffies + UDP->timeout;
684 add_timer(&fd_timeout); 674 add_timer(&fd_timeout);
685 if (UDP->flags & FD_DEBUG) { 675 if (UDP->flags & FD_DEBUG)
686 DPRINT("reschedule timeout "); 676 DPRINT("reschedule timeout %s\n", message);
687 printk(message, marg);
688 printk("\n");
689 }
690 timeout_message = message; 677 timeout_message = message;
691} 678}
692 679
693static void reschedule_timeout(int drive, const char *message, int marg) 680static void reschedule_timeout(int drive, const char *message)
694{ 681{
695 unsigned long flags; 682 unsigned long flags;
696 683
697 spin_lock_irqsave(&floppy_lock, flags); 684 spin_lock_irqsave(&floppy_lock, flags);
698 __reschedule_timeout(drive, message, marg); 685 __reschedule_timeout(drive, message);
699 spin_unlock_irqrestore(&floppy_lock, flags); 686 spin_unlock_irqrestore(&floppy_lock, flags);
700} 687}
701 688
702#define INFBOUND(a,b) (a)=max_t(int, a, b) 689#define INFBOUND(a, b) (a) = max_t(int, a, b)
703#define SUPBOUND(a,b) (a)=min_t(int, a, b) 690#define SUPBOUND(a, b) (a) = min_t(int, a, b)
704 691
705/* 692/*
706 * Bottom half floppy driver. 693 * Bottom half floppy driver.
@@ -739,7 +726,6 @@ static int disk_change(int drive)
739{ 726{
740 int fdc = FDC(drive); 727 int fdc = FDC(drive);
741 728
742#ifdef FLOPPY_SANITY_CHECK
743 if (time_before(jiffies, UDRS->select_date + UDP->select_delay)) 729 if (time_before(jiffies, UDRS->select_date + UDP->select_delay))
744 DPRINT("WARNING disk change called early\n"); 730 DPRINT("WARNING disk change called early\n");
745 if (!(FDCS->dor & (0x10 << UNIT(drive))) || 731 if (!(FDCS->dor & (0x10 << UNIT(drive))) ||
@@ -748,31 +734,27 @@ static int disk_change(int drive)
748 DPRINT("drive=%d fdc=%d dor=%x\n", drive, FDC(drive), 734 DPRINT("drive=%d fdc=%d dor=%x\n", drive, FDC(drive),
749 (unsigned int)FDCS->dor); 735 (unsigned int)FDCS->dor);
750 } 736 }
751#endif
752 737
753#ifdef DCL_DEBUG 738 debug_dcl(UDP->flags,
754 if (UDP->flags & FD_DEBUG) { 739 "checking disk change line for drive %d\n", drive);
755 DPRINT("checking disk change line for drive %d\n", drive); 740 debug_dcl(UDP->flags, "jiffies=%lu\n", jiffies);
756 DPRINT("jiffies=%lu\n", jiffies); 741 debug_dcl(UDP->flags, "disk change line=%x\n", fd_inb(FD_DIR) & 0x80);
757 DPRINT("disk change line=%x\n", fd_inb(FD_DIR) & 0x80); 742 debug_dcl(UDP->flags, "flags=%lx\n", UDRS->flags);
758 DPRINT("flags=%lx\n", UDRS->flags); 743
759 }
760#endif
761 if (UDP->flags & FD_BROKEN_DCL) 744 if (UDP->flags & FD_BROKEN_DCL)
762 return UTESTF(FD_DISK_CHANGED); 745 return test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
763 if ((fd_inb(FD_DIR) ^ UDP->flags) & 0x80) { 746 if ((fd_inb(FD_DIR) ^ UDP->flags) & 0x80) {
764 USETF(FD_VERIFY); /* verify write protection */ 747 set_bit(FD_VERIFY_BIT, &UDRS->flags);
765 if (UDRS->maxblock) { 748 /* verify write protection */
766 /* mark it changed */ 749
767 USETF(FD_DISK_CHANGED); 750 if (UDRS->maxblock) /* mark it changed */
768 } 751 set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
769 752
770 /* invalidate its geometry */ 753 /* invalidate its geometry */
771 if (UDRS->keep_data >= 0) { 754 if (UDRS->keep_data >= 0) {
772 if ((UDP->flags & FTD_MSG) && 755 if ((UDP->flags & FTD_MSG) &&
773 current_type[drive] != NULL) 756 current_type[drive] != NULL)
774 DPRINT("Disk type is undefined after " 757 DPRINT("Disk type is undefined after disk change\n");
775 "disk change\n");
776 current_type[drive] = NULL; 758 current_type[drive] = NULL;
777 floppy_sizes[TOMINOR(drive)] = MAX_DISK_SIZE << 1; 759 floppy_sizes[TOMINOR(drive)] = MAX_DISK_SIZE << 1;
778 } 760 }
@@ -780,7 +762,7 @@ static int disk_change(int drive)
780 return 1; 762 return 1;
781 } else { 763 } else {
782 UDRS->last_checked = jiffies; 764 UDRS->last_checked = jiffies;
783 UCLEARF(FD_DISK_NEWCHANGE); 765 clear_bit(FD_DISK_NEWCHANGE_BIT, &UDRS->flags);
784 } 766 }
785 return 0; 767 return 0;
786} 768}
@@ -790,6 +772,12 @@ static inline int is_selected(int dor, int unit)
790 return ((dor & (0x10 << unit)) && (dor & 3) == unit); 772 return ((dor & (0x10 << unit)) && (dor & 3) == unit);
791} 773}
792 774
775static bool is_ready_state(int status)
776{
777 int state = status & (STATUS_READY | STATUS_DIR | STATUS_DMA);
778 return state == STATUS_READY;
779}
780
793static int set_dor(int fdc, char mask, char data) 781static int set_dor(int fdc, char mask, char data)
794{ 782{
795 unsigned char unit; 783 unsigned char unit;
@@ -806,11 +794,8 @@ static int set_dor(int fdc, char mask, char data)
806 unit = olddor & 0x3; 794 unit = olddor & 0x3;
807 if (is_selected(olddor, unit) && !is_selected(newdor, unit)) { 795 if (is_selected(olddor, unit) && !is_selected(newdor, unit)) {
808 drive = REVDRIVE(fdc, unit); 796 drive = REVDRIVE(fdc, unit);
809#ifdef DCL_DEBUG 797 debug_dcl(UDP->flags,
810 if (UDP->flags & FD_DEBUG) { 798 "calling disk change from set_dor\n");
811 DPRINT("calling disk change from set_dor\n");
812 }
813#endif
814 disk_change(drive); 799 disk_change(drive);
815 } 800 }
816 FDCS->dor = newdor; 801 FDCS->dor = newdor;
@@ -834,8 +819,10 @@ static void twaddle(void)
834 DRS->select_date = jiffies; 819 DRS->select_date = jiffies;
835} 820}
836 821
837/* reset all driver information about the current fdc. This is needed after 822/*
838 * a reset, and after a raw command. */ 823 * Reset all driver information about the current fdc.
824 * This is needed after a reset, and after a raw command.
825 */
839static void reset_fdc_info(int mode) 826static void reset_fdc_info(int mode)
840{ 827{
841 int drive; 828 int drive;
@@ -857,7 +844,7 @@ static void set_fdc(int drive)
857 current_drive = drive; 844 current_drive = drive;
858 } 845 }
859 if (fdc != 1 && fdc != 0) { 846 if (fdc != 1 && fdc != 0) {
860 printk("bad fdc value\n"); 847 pr_info("bad fdc value\n");
861 return; 848 return;
862 } 849 }
863 set_dor(fdc, ~0, 8); 850 set_dor(fdc, ~0, 8);
@@ -871,11 +858,10 @@ static void set_fdc(int drive)
871} 858}
872 859
873/* locks the driver */ 860/* locks the driver */
874static int _lock_fdc(int drive, int interruptible, int line) 861static int _lock_fdc(int drive, bool interruptible, int line)
875{ 862{
876 if (!usage_count) { 863 if (!usage_count) {
877 printk(KERN_ERR 864 pr_err("Trying to lock fdc while usage count=0 at line %d\n",
878 "Trying to lock fdc while usage count=0 at line %d\n",
879 line); 865 line);
880 return -1; 866 return -1;
881 } 867 }
@@ -904,15 +890,13 @@ static int _lock_fdc(int drive, int interruptible, int line)
904 } 890 }
905 command_status = FD_COMMAND_NONE; 891 command_status = FD_COMMAND_NONE;
906 892
907 __reschedule_timeout(drive, "lock fdc", 0); 893 __reschedule_timeout(drive, "lock fdc");
908 set_fdc(drive); 894 set_fdc(drive);
909 return 0; 895 return 0;
910} 896}
911 897
912#define lock_fdc(drive,interruptible) _lock_fdc(drive,interruptible, __LINE__) 898#define lock_fdc(drive, interruptible) \
913 899 _lock_fdc(drive, interruptible, __LINE__)
914#define LOCK_FDC(drive,interruptible) \
915if (lock_fdc(drive,interruptible)) return -EINTR;
916 900
917/* unlocks the driver */ 901/* unlocks the driver */
918static inline void unlock_fdc(void) 902static inline void unlock_fdc(void)
@@ -924,7 +908,7 @@ static inline void unlock_fdc(void)
924 DPRINT("FDC access conflict!\n"); 908 DPRINT("FDC access conflict!\n");
925 909
926 if (do_floppy) 910 if (do_floppy)
927 DPRINT("device interrupt still active at FDC release: %p!\n", 911 DPRINT("device interrupt still active at FDC release: %pf!\n",
928 do_floppy); 912 do_floppy);
929 command_status = FD_COMMAND_NONE; 913 command_status = FD_COMMAND_NONE;
930 spin_lock_irqsave(&floppy_lock, flags); 914 spin_lock_irqsave(&floppy_lock, flags);
@@ -1003,7 +987,7 @@ static void empty(void)
1003 987
1004static DECLARE_WORK(floppy_work, NULL); 988static DECLARE_WORK(floppy_work, NULL);
1005 989
1006static void schedule_bh(void (*handler) (void)) 990static void schedule_bh(void (*handler)(void))
1007{ 991{
1008 PREPARE_WORK(&floppy_work, (work_func_t)handler); 992 PREPARE_WORK(&floppy_work, (work_func_t)handler);
1009 schedule_work(&floppy_work); 993 schedule_work(&floppy_work);
@@ -1026,11 +1010,7 @@ static void cancel_activity(void)
1026 * transfer */ 1010 * transfer */
1027static void fd_watchdog(void) 1011static void fd_watchdog(void)
1028{ 1012{
1029#ifdef DCL_DEBUG 1013 debug_dcl(DP->flags, "calling disk change from watchdog\n");
1030 if (DP->flags & FD_DEBUG) {
1031 DPRINT("calling disk change from watchdog\n");
1032 }
1033#endif
1034 1014
1035 if (disk_change(current_drive)) { 1015 if (disk_change(current_drive)) {
1036 DPRINT("disk removed during i/o\n"); 1016 DPRINT("disk removed during i/o\n");
@@ -1039,7 +1019,7 @@ static void fd_watchdog(void)
1039 reset_fdc(); 1019 reset_fdc();
1040 } else { 1020 } else {
1041 del_timer(&fd_timer); 1021 del_timer(&fd_timer);
1042 fd_timer.function = (timeout_fn) fd_watchdog; 1022 fd_timer.function = (timeout_fn)fd_watchdog;
1043 fd_timer.expires = jiffies + HZ / 10; 1023 fd_timer.expires = jiffies + HZ / 10;
1044 add_timer(&fd_timer); 1024 add_timer(&fd_timer);
1045 } 1025 }
@@ -1105,25 +1085,23 @@ static void setup_DMA(void)
1105{ 1085{
1106 unsigned long f; 1086 unsigned long f;
1107 1087
1108#ifdef FLOPPY_SANITY_CHECK
1109 if (raw_cmd->length == 0) { 1088 if (raw_cmd->length == 0) {
1110 int i; 1089 int i;
1111 1090
1112 printk("zero dma transfer size:"); 1091 pr_info("zero dma transfer size:");
1113 for (i = 0; i < raw_cmd->cmd_count; i++) 1092 for (i = 0; i < raw_cmd->cmd_count; i++)
1114 printk("%x,", raw_cmd->cmd[i]); 1093 pr_cont("%x,", raw_cmd->cmd[i]);
1115 printk("\n"); 1094 pr_cont("\n");
1116 cont->done(0); 1095 cont->done(0);
1117 FDCS->reset = 1; 1096 FDCS->reset = 1;
1118 return; 1097 return;
1119 } 1098 }
1120 if (((unsigned long)raw_cmd->kernel_data) % 512) { 1099 if (((unsigned long)raw_cmd->kernel_data) % 512) {
1121 printk("non aligned address: %p\n", raw_cmd->kernel_data); 1100 pr_info("non aligned address: %p\n", raw_cmd->kernel_data);
1122 cont->done(0); 1101 cont->done(0);
1123 FDCS->reset = 1; 1102 FDCS->reset = 1;
1124 return; 1103 return;
1125 } 1104 }
1126#endif
1127 f = claim_dma_lock(); 1105 f = claim_dma_lock();
1128 fd_disable_dma(); 1106 fd_disable_dma();
1129#ifdef fd_dma_setup 1107#ifdef fd_dma_setup
@@ -1165,7 +1143,7 @@ static int wait_til_ready(void)
1165 if (status & STATUS_READY) 1143 if (status & STATUS_READY)
1166 return status; 1144 return status;
1167 } 1145 }
1168 if (!initialising) { 1146 if (initialized) {
1169 DPRINT("Getstatus times out (%x) on fdc %d\n", status, fdc); 1147 DPRINT("Getstatus times out (%x) on fdc %d\n", status, fdc);
1170 show_floppy(); 1148 show_floppy();
1171 } 1149 }
@@ -1176,22 +1154,21 @@ static int wait_til_ready(void)
1176/* sends a command byte to the fdc */ 1154/* sends a command byte to the fdc */
1177static int output_byte(char byte) 1155static int output_byte(char byte)
1178{ 1156{
1179 int status; 1157 int status = wait_til_ready();
1180 1158
1181 if ((status = wait_til_ready()) < 0) 1159 if (status < 0)
1182 return -1; 1160 return -1;
1183 if ((status & (STATUS_READY | STATUS_DIR | STATUS_DMA)) == STATUS_READY) { 1161
1162 if (is_ready_state(status)) {
1184 fd_outb(byte, FD_DATA); 1163 fd_outb(byte, FD_DATA);
1185#ifdef FLOPPY_SANITY_CHECK
1186 output_log[output_log_pos].data = byte; 1164 output_log[output_log_pos].data = byte;
1187 output_log[output_log_pos].status = status; 1165 output_log[output_log_pos].status = status;
1188 output_log[output_log_pos].jiffies = jiffies; 1166 output_log[output_log_pos].jiffies = jiffies;
1189 output_log_pos = (output_log_pos + 1) % OLOGSIZE; 1167 output_log_pos = (output_log_pos + 1) % OLOGSIZE;
1190#endif
1191 return 0; 1168 return 0;
1192 } 1169 }
1193 FDCS->reset = 1; 1170 FDCS->reset = 1;
1194 if (!initialising) { 1171 if (initialized) {
1195 DPRINT("Unable to send byte %x to FDC. Fdc=%x Status=%x\n", 1172 DPRINT("Unable to send byte %x to FDC. Fdc=%x Status=%x\n",
1196 byte, fdc, status); 1173 byte, fdc, status);
1197 show_floppy(); 1174 show_floppy();
@@ -1199,8 +1176,6 @@ static int output_byte(char byte)
1199 return -1; 1176 return -1;
1200} 1177}
1201 1178
1202#define LAST_OUT(x) if (output_byte(x)<0){ reset_fdc();return;}
1203
1204/* gets the response from the fdc */ 1179/* gets the response from the fdc */
1205static int result(void) 1180static int result(void)
1206{ 1181{
@@ -1208,14 +1183,13 @@ static int result(void)
1208 int status = 0; 1183 int status = 0;
1209 1184
1210 for (i = 0; i < MAX_REPLIES; i++) { 1185 for (i = 0; i < MAX_REPLIES; i++) {
1211 if ((status = wait_til_ready()) < 0) 1186 status = wait_til_ready();
1187 if (status < 0)
1212 break; 1188 break;
1213 status &= STATUS_DIR | STATUS_READY | STATUS_BUSY | STATUS_DMA; 1189 status &= STATUS_DIR | STATUS_READY | STATUS_BUSY | STATUS_DMA;
1214 if ((status & ~STATUS_BUSY) == STATUS_READY) { 1190 if ((status & ~STATUS_BUSY) == STATUS_READY) {
1215#ifdef FLOPPY_SANITY_CHECK
1216 resultjiffies = jiffies; 1191 resultjiffies = jiffies;
1217 resultsize = i; 1192 resultsize = i;
1218#endif
1219 return i; 1193 return i;
1220 } 1194 }
1221 if (status == (STATUS_DIR | STATUS_READY | STATUS_BUSY)) 1195 if (status == (STATUS_DIR | STATUS_READY | STATUS_BUSY))
@@ -1223,10 +1197,9 @@ static int result(void)
1223 else 1197 else
1224 break; 1198 break;
1225 } 1199 }
1226 if (!initialising) { 1200 if (initialized) {
1227 DPRINT 1201 DPRINT("get result error. Fdc=%d Last status=%x Read bytes=%d\n",
1228 ("get result error. Fdc=%d Last status=%x Read bytes=%d\n", 1202 fdc, status, i);
1229 fdc, status, i);
1230 show_floppy(); 1203 show_floppy();
1231 } 1204 }
1232 FDCS->reset = 1; 1205 FDCS->reset = 1;
@@ -1237,12 +1210,14 @@ static int result(void)
1237/* does the fdc need more output? */ 1210/* does the fdc need more output? */
1238static int need_more_output(void) 1211static int need_more_output(void)
1239{ 1212{
1240 int status; 1213 int status = wait_til_ready();
1241 1214
1242 if ((status = wait_til_ready()) < 0) 1215 if (status < 0)
1243 return -1; 1216 return -1;
1244 if ((status & (STATUS_READY | STATUS_DIR | STATUS_DMA)) == STATUS_READY) 1217
1218 if (is_ready_state(status))
1245 return MORE_OUTPUT; 1219 return MORE_OUTPUT;
1220
1246 return result(); 1221 return result();
1247} 1222}
1248 1223
@@ -1264,9 +1239,12 @@ static inline void perpendicular_mode(void)
1264 default: 1239 default:
1265 DPRINT("Invalid data rate for perpendicular mode!\n"); 1240 DPRINT("Invalid data rate for perpendicular mode!\n");
1266 cont->done(0); 1241 cont->done(0);
1267 FDCS->reset = 1; /* convenient way to return to 1242 FDCS->reset = 1;
1268 * redo without to much hassle (deep 1243 /*
1269 * stack et al. */ 1244 * convenient way to return to
1245 * redo without too much hassle
1246 * (deep stack et al.)
1247 */
1270 return; 1248 return;
1271 } 1249 }
1272 } else 1250 } else
@@ -1366,9 +1344,9 @@ static void fdc_specify(void)
1366 1344
1367 /* Convert step rate from microseconds to milliseconds and 4 bits */ 1345 /* Convert step rate from microseconds to milliseconds and 4 bits */
1368 srt = 16 - DIV_ROUND_UP(DP->srt * scale_dtr / 1000, NOMINAL_DTR); 1346 srt = 16 - DIV_ROUND_UP(DP->srt * scale_dtr / 1000, NOMINAL_DTR);
1369 if (slow_floppy) { 1347 if (slow_floppy)
1370 srt = srt / 4; 1348 srt = srt / 4;
1371 } 1349
1372 SUPBOUND(srt, 0xf); 1350 SUPBOUND(srt, 0xf);
1373 INFBOUND(srt, 0); 1351 INFBOUND(srt, 0);
1374 1352
@@ -1415,16 +1393,46 @@ static int fdc_dtr(void)
1415 * Pause 5 msec to avoid trouble. (Needs to be 2 jiffies) 1393 * Pause 5 msec to avoid trouble. (Needs to be 2 jiffies)
1416 */ 1394 */
1417 FDCS->dtr = raw_cmd->rate & 3; 1395 FDCS->dtr = raw_cmd->rate & 3;
1418 return (fd_wait_for_completion(jiffies + 2UL * HZ / 100, 1396 return fd_wait_for_completion(jiffies + 2UL * HZ / 100,
1419 (timeout_fn) floppy_ready)); 1397 (timeout_fn)floppy_ready);
1420} /* fdc_dtr */ 1398} /* fdc_dtr */
1421 1399
1422static void tell_sector(void) 1400static void tell_sector(void)
1423{ 1401{
1424 printk(": track %d, head %d, sector %d, size %d", 1402 pr_cont(": track %d, head %d, sector %d, size %d",
1425 R_TRACK, R_HEAD, R_SECTOR, R_SIZECODE); 1403 R_TRACK, R_HEAD, R_SECTOR, R_SIZECODE);
1426} /* tell_sector */ 1404} /* tell_sector */
1427 1405
1406static void print_errors(void)
1407{
1408 DPRINT("");
1409 if (ST0 & ST0_ECE) {
1410 pr_cont("Recalibrate failed!");
1411 } else if (ST2 & ST2_CRC) {
1412 pr_cont("data CRC error");
1413 tell_sector();
1414 } else if (ST1 & ST1_CRC) {
1415 pr_cont("CRC error");
1416 tell_sector();
1417 } else if ((ST1 & (ST1_MAM | ST1_ND)) ||
1418 (ST2 & ST2_MAM)) {
1419 if (!probing) {
1420 pr_cont("sector not found");
1421 tell_sector();
1422 } else
1423 pr_cont("probe failed...");
1424 } else if (ST2 & ST2_WC) { /* seek error */
1425 pr_cont("wrong cylinder");
1426 } else if (ST2 & ST2_BC) { /* cylinder marked as bad */
1427 pr_cont("bad cylinder");
1428 } else {
1429 pr_cont("unknown error. ST[0..2] are: 0x%x 0x%x 0x%x",
1430 ST0, ST1, ST2);
1431 tell_sector();
1432 }
1433 pr_cont("\n");
1434}
1435
1428/* 1436/*
1429 * OK, this error interpreting routine is called after a 1437 * OK, this error interpreting routine is called after a
1430 * DMA read/write has succeeded 1438 * DMA read/write has succeeded
@@ -1437,7 +1445,7 @@ static int interpret_errors(void)
1437 char bad; 1445 char bad;
1438 1446
1439 if (inr != 7) { 1447 if (inr != 7) {
1440 DPRINT("-- FDC reply error"); 1448 DPRINT("-- FDC reply error\n");
1441 FDCS->reset = 1; 1449 FDCS->reset = 1;
1442 return 1; 1450 return 1;
1443 } 1451 }
@@ -1450,43 +1458,17 @@ static int interpret_errors(void)
1450 bad = 1; 1458 bad = 1;
1451 if (ST1 & ST1_WP) { 1459 if (ST1 & ST1_WP) {
1452 DPRINT("Drive is write protected\n"); 1460 DPRINT("Drive is write protected\n");
1453 CLEARF(FD_DISK_WRITABLE); 1461 clear_bit(FD_DISK_WRITABLE_BIT, &DRS->flags);
1454 cont->done(0); 1462 cont->done(0);
1455 bad = 2; 1463 bad = 2;
1456 } else if (ST1 & ST1_ND) { 1464 } else if (ST1 & ST1_ND) {
1457 SETF(FD_NEED_TWADDLE); 1465 set_bit(FD_NEED_TWADDLE_BIT, &DRS->flags);
1458 } else if (ST1 & ST1_OR) { 1466 } else if (ST1 & ST1_OR) {
1459 if (DP->flags & FTD_MSG) 1467 if (DP->flags & FTD_MSG)
1460 DPRINT("Over/Underrun - retrying\n"); 1468 DPRINT("Over/Underrun - retrying\n");
1461 bad = 0; 1469 bad = 0;
1462 } else if (*errors >= DP->max_errors.reporting) { 1470 } else if (*errors >= DP->max_errors.reporting) {
1463 DPRINT(""); 1471 print_errors();
1464 if (ST0 & ST0_ECE) {
1465 printk("Recalibrate failed!");
1466 } else if (ST2 & ST2_CRC) {
1467 printk("data CRC error");
1468 tell_sector();
1469 } else if (ST1 & ST1_CRC) {
1470 printk("CRC error");
1471 tell_sector();
1472 } else if ((ST1 & (ST1_MAM | ST1_ND))
1473 || (ST2 & ST2_MAM)) {
1474 if (!probing) {
1475 printk("sector not found");
1476 tell_sector();
1477 } else
1478 printk("probe failed...");
1479 } else if (ST2 & ST2_WC) { /* seek error */
1480 printk("wrong cylinder");
1481 } else if (ST2 & ST2_BC) { /* cylinder marked as bad */
1482 printk("bad cylinder");
1483 } else {
1484 printk
1485 ("unknown error. ST[0..2] are: 0x%x 0x%x 0x%x",
1486 ST0, ST1, ST2);
1487 tell_sector();
1488 }
1489 printk("\n");
1490 } 1472 }
1491 if (ST2 & ST2_WC || ST2 & ST2_BC) 1473 if (ST2 & ST2_WC || ST2 & ST2_BC)
1492 /* wrong cylinder => recal */ 1474 /* wrong cylinder => recal */
@@ -1531,9 +1513,9 @@ static void setup_rw_floppy(void)
1531 */ 1513 */
1532 if (time_after(ready_date, jiffies + DP->select_delay)) { 1514 if (time_after(ready_date, jiffies + DP->select_delay)) {
1533 ready_date -= DP->select_delay; 1515 ready_date -= DP->select_delay;
1534 function = (timeout_fn) floppy_start; 1516 function = (timeout_fn)floppy_start;
1535 } else 1517 } else
1536 function = (timeout_fn) setup_rw_floppy; 1518 function = (timeout_fn)setup_rw_floppy;
1537 1519
1538 /* wait until the floppy is spinning fast enough */ 1520 /* wait until the floppy is spinning fast enough */
1539 if (fd_wait_for_completion(ready_date, function)) 1521 if (fd_wait_for_completion(ready_date, function))
@@ -1551,7 +1533,7 @@ static void setup_rw_floppy(void)
1551 for (i = 0; i < raw_cmd->cmd_count; i++) 1533 for (i = 0; i < raw_cmd->cmd_count; i++)
1552 r |= output_byte(raw_cmd->cmd[i]); 1534 r |= output_byte(raw_cmd->cmd[i]);
1553 1535
1554 debugt("rw_command: "); 1536 debugt(__func__, "rw_command");
1555 1537
1556 if (r) { 1538 if (r) {
1557 cont->error(); 1539 cont->error();
@@ -1574,7 +1556,7 @@ static int blind_seek;
1574 */ 1556 */
1575static void seek_interrupt(void) 1557static void seek_interrupt(void)
1576{ 1558{
1577 debugt("seek interrupt:"); 1559 debugt(__func__, "");
1578 if (inr != 2 || (ST0 & 0xF8) != 0x20) { 1560 if (inr != 2 || (ST0 & 0xF8) != 0x20) {
1579 DPRINT("seek failed\n"); 1561 DPRINT("seek failed\n");
1580 DRS->track = NEED_2_RECAL; 1562 DRS->track = NEED_2_RECAL;
@@ -1583,14 +1565,11 @@ static void seek_interrupt(void)
1583 return; 1565 return;
1584 } 1566 }
1585 if (DRS->track >= 0 && DRS->track != ST1 && !blind_seek) { 1567 if (DRS->track >= 0 && DRS->track != ST1 && !blind_seek) {
1586#ifdef DCL_DEBUG 1568 debug_dcl(DP->flags,
1587 if (DP->flags & FD_DEBUG) { 1569 "clearing NEWCHANGE flag because of effective seek\n");
1588 DPRINT 1570 debug_dcl(DP->flags, "jiffies=%lu\n", jiffies);
1589 ("clearing NEWCHANGE flag because of effective seek\n"); 1571 clear_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
1590 DPRINT("jiffies=%lu\n", jiffies); 1572 /* effective seek */
1591 }
1592#endif
1593 CLEARF(FD_DISK_NEWCHANGE); /* effective seek */
1594 DRS->select_date = jiffies; 1573 DRS->select_date = jiffies;
1595 } 1574 }
1596 DRS->track = ST1; 1575 DRS->track = ST1;
@@ -1599,26 +1578,23 @@ static void seek_interrupt(void)
1599 1578
1600static void check_wp(void) 1579static void check_wp(void)
1601{ 1580{
1602 if (TESTF(FD_VERIFY)) { 1581 if (test_bit(FD_VERIFY_BIT, &DRS->flags)) {
1603 /* check write protection */ 1582 /* check write protection */
1604 output_byte(FD_GETSTATUS); 1583 output_byte(FD_GETSTATUS);
1605 output_byte(UNIT(current_drive)); 1584 output_byte(UNIT(current_drive));
1606 if (result() != 1) { 1585 if (result() != 1) {
1607 FDCS->reset = 1; 1586 FDCS->reset = 1;
1608 return; 1587 return;
1609 } 1588 }
1610 CLEARF(FD_VERIFY); 1589 clear_bit(FD_VERIFY_BIT, &DRS->flags);
1611 CLEARF(FD_NEED_TWADDLE); 1590 clear_bit(FD_NEED_TWADDLE_BIT, &DRS->flags);
1612#ifdef DCL_DEBUG 1591 debug_dcl(DP->flags,
1613 if (DP->flags & FD_DEBUG) { 1592 "checking whether disk is write protected\n");
1614 DPRINT("checking whether disk is write protected\n"); 1593 debug_dcl(DP->flags, "wp=%x\n", ST3 & 0x40);
1615 DPRINT("wp=%x\n", ST3 & 0x40);
1616 }
1617#endif
1618 if (!(ST3 & 0x40)) 1594 if (!(ST3 & 0x40))
1619 SETF(FD_DISK_WRITABLE); 1595 set_bit(FD_DISK_WRITABLE_BIT, &DRS->flags);
1620 else 1596 else
1621 CLEARF(FD_DISK_WRITABLE); 1597 clear_bit(FD_DISK_WRITABLE_BIT, &DRS->flags);
1622 } 1598 }
1623} 1599}
1624 1600
@@ -1628,19 +1604,15 @@ static void seek_floppy(void)
1628 1604
1629 blind_seek = 0; 1605 blind_seek = 0;
1630 1606
1631#ifdef DCL_DEBUG 1607 debug_dcl(DP->flags, "calling disk change from %s\n", __func__);
1632 if (DP->flags & FD_DEBUG) {
1633 DPRINT("calling disk change from seek\n");
1634 }
1635#endif
1636 1608
1637 if (!TESTF(FD_DISK_NEWCHANGE) && 1609 if (!test_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags) &&
1638 disk_change(current_drive) && (raw_cmd->flags & FD_RAW_NEED_DISK)) { 1610 disk_change(current_drive) && (raw_cmd->flags & FD_RAW_NEED_DISK)) {
1639 /* the media changed flag should be cleared after the seek. 1611 /* the media changed flag should be cleared after the seek.
1640 * If it isn't, this means that there is really no disk in 1612 * If it isn't, this means that there is really no disk in
1641 * the drive. 1613 * the drive.
1642 */ 1614 */
1643 SETF(FD_DISK_CHANGED); 1615 set_bit(FD_DISK_CHANGED_BIT, &DRS->flags);
1644 cont->done(0); 1616 cont->done(0);
1645 cont->redo(); 1617 cont->redo();
1646 return; 1618 return;
@@ -1648,7 +1620,7 @@ static void seek_floppy(void)
1648 if (DRS->track <= NEED_1_RECAL) { 1620 if (DRS->track <= NEED_1_RECAL) {
1649 recalibrate_floppy(); 1621 recalibrate_floppy();
1650 return; 1622 return;
1651 } else if (TESTF(FD_DISK_NEWCHANGE) && 1623 } else if (test_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags) &&
1652 (raw_cmd->flags & FD_RAW_NEED_DISK) && 1624 (raw_cmd->flags & FD_RAW_NEED_DISK) &&
1653 (DRS->track <= NO_TRACK || DRS->track == raw_cmd->track)) { 1625 (DRS->track <= NO_TRACK || DRS->track == raw_cmd->track)) {
1654 /* we seek to clear the media-changed condition. Does anybody 1626 /* we seek to clear the media-changed condition. Does anybody
@@ -1677,19 +1649,22 @@ static void seek_floppy(void)
1677 do_floppy = seek_interrupt; 1649 do_floppy = seek_interrupt;
1678 output_byte(FD_SEEK); 1650 output_byte(FD_SEEK);
1679 output_byte(UNIT(current_drive)); 1651 output_byte(UNIT(current_drive));
1680 LAST_OUT(track); 1652 if (output_byte(track) < 0) {
1681 debugt("seek command:"); 1653 reset_fdc();
1654 return;
1655 }
1656 debugt(__func__, "");
1682} 1657}
1683 1658
1684static void recal_interrupt(void) 1659static void recal_interrupt(void)
1685{ 1660{
1686 debugt("recal interrupt:"); 1661 debugt(__func__, "");
1687 if (inr != 2) 1662 if (inr != 2)
1688 FDCS->reset = 1; 1663 FDCS->reset = 1;
1689 else if (ST0 & ST0_ECE) { 1664 else if (ST0 & ST0_ECE) {
1690 switch (DRS->track) { 1665 switch (DRS->track) {
1691 case NEED_1_RECAL: 1666 case NEED_1_RECAL:
1692 debugt("recal interrupt need 1 recal:"); 1667 debugt(__func__, "need 1 recal");
1693 /* after a second recalibrate, we still haven't 1668 /* after a second recalibrate, we still haven't
1694 * reached track 0. Probably no drive. Raise an 1669 * reached track 0. Probably no drive. Raise an
1695 * error, as failing immediately might upset 1670 * error, as failing immediately might upset
@@ -1698,25 +1673,21 @@ static void recal_interrupt(void)
1698 cont->redo(); 1673 cont->redo();
1699 return; 1674 return;
1700 case NEED_2_RECAL: 1675 case NEED_2_RECAL:
1701 debugt("recal interrupt need 2 recal:"); 1676 debugt(__func__, "need 2 recal");
1702 /* If we already did a recalibrate, 1677 /* If we already did a recalibrate,
1703 * and we are not at track 0, this 1678 * and we are not at track 0, this
1704 * means we have moved. (The only way 1679 * means we have moved. (The only way
1705 * not to move at recalibration is to 1680 * not to move at recalibration is to
1706 * be already at track 0.) Clear the 1681 * be already at track 0.) Clear the
1707 * new change flag */ 1682 * new change flag */
1708#ifdef DCL_DEBUG 1683 debug_dcl(DP->flags,
1709 if (DP->flags & FD_DEBUG) { 1684 "clearing NEWCHANGE flag because of second recalibrate\n");
1710 DPRINT
1711 ("clearing NEWCHANGE flag because of second recalibrate\n");
1712 }
1713#endif
1714 1685
1715 CLEARF(FD_DISK_NEWCHANGE); 1686 clear_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
1716 DRS->select_date = jiffies; 1687 DRS->select_date = jiffies;
1717 /* fall through */ 1688 /* fall through */
1718 default: 1689 default:
1719 debugt("recal interrupt default:"); 1690 debugt(__func__, "default");
1720 /* Recalibrate moves the head by at 1691 /* Recalibrate moves the head by at
1721 * most 80 steps. If after one 1692 * most 80 steps. If after one
1722 * recalibrate we don't have reached 1693 * recalibrate we don't have reached
@@ -1738,8 +1709,8 @@ static void print_result(char *message, int inr)
1738 DPRINT("%s ", message); 1709 DPRINT("%s ", message);
1739 if (inr >= 0) 1710 if (inr >= 0)
1740 for (i = 0; i < inr; i++) 1711 for (i = 0; i < inr; i++)
1741 printk("repl[%d]=%x ", i, reply_buffer[i]); 1712 pr_cont("repl[%d]=%x ", i, reply_buffer[i]);
1742 printk("\n"); 1713 pr_cont("\n");
1743} 1714}
1744 1715
1745/* interrupt handler. Note that this can be called externally on the Sparc */ 1716/* interrupt handler. Note that this can be called externally on the Sparc */
@@ -1760,10 +1731,10 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
1760 do_floppy = NULL; 1731 do_floppy = NULL;
1761 if (fdc >= N_FDC || FDCS->address == -1) { 1732 if (fdc >= N_FDC || FDCS->address == -1) {
1762 /* we don't even know which FDC is the culprit */ 1733 /* we don't even know which FDC is the culprit */
1763 printk("DOR0=%x\n", fdc_state[0].dor); 1734 pr_info("DOR0=%x\n", fdc_state[0].dor);
1764 printk("floppy interrupt on bizarre fdc %d\n", fdc); 1735 pr_info("floppy interrupt on bizarre fdc %d\n", fdc);
1765 printk("handler=%p\n", handler); 1736 pr_info("handler=%pf\n", handler);
1766 is_alive("bizarre fdc"); 1737 is_alive(__func__, "bizarre fdc");
1767 return IRQ_NONE; 1738 return IRQ_NONE;
1768 } 1739 }
1769 1740
@@ -1777,7 +1748,7 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
1777 * activity. 1748 * activity.
1778 */ 1749 */
1779 1750
1780 do_print = !handler && print_unex && !initialising; 1751 do_print = !handler && print_unex && initialized;
1781 1752
1782 inr = result(); 1753 inr = result();
1783 if (do_print) 1754 if (do_print)
@@ -1790,15 +1761,15 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
1790 if (do_print) 1761 if (do_print)
1791 print_result("sensei", inr); 1762 print_result("sensei", inr);
1792 max_sensei--; 1763 max_sensei--;
1793 } while ((ST0 & 0x83) != UNIT(current_drive) && inr == 2 1764 } while ((ST0 & 0x83) != UNIT(current_drive) &&
1794 && max_sensei); 1765 inr == 2 && max_sensei);
1795 } 1766 }
1796 if (!handler) { 1767 if (!handler) {
1797 FDCS->reset = 1; 1768 FDCS->reset = 1;
1798 return IRQ_NONE; 1769 return IRQ_NONE;
1799 } 1770 }
1800 schedule_bh(handler); 1771 schedule_bh(handler);
1801 is_alive("normal interrupt end"); 1772 is_alive(__func__, "normal interrupt end");
1802 1773
1803 /* FIXME! Was it really for us? */ 1774 /* FIXME! Was it really for us? */
1804 return IRQ_HANDLED; 1775 return IRQ_HANDLED;
@@ -1806,10 +1777,11 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
1806 1777
1807static void recalibrate_floppy(void) 1778static void recalibrate_floppy(void)
1808{ 1779{
1809 debugt("recalibrate floppy:"); 1780 debugt(__func__, "");
1810 do_floppy = recal_interrupt; 1781 do_floppy = recal_interrupt;
1811 output_byte(FD_RECALIBRATE); 1782 output_byte(FD_RECALIBRATE);
1812 LAST_OUT(UNIT(current_drive)); 1783 if (output_byte(UNIT(current_drive)) < 0)
1784 reset_fdc();
1813} 1785}
1814 1786
1815/* 1787/*
@@ -1817,10 +1789,10 @@ static void recalibrate_floppy(void)
1817 */ 1789 */
1818static void reset_interrupt(void) 1790static void reset_interrupt(void)
1819{ 1791{
1820 debugt("reset interrupt:"); 1792 debugt(__func__, "");
1821 result(); /* get the status ready for set_fdc */ 1793 result(); /* get the status ready for set_fdc */
1822 if (FDCS->reset) { 1794 if (FDCS->reset) {
1823 printk("reset set in interrupt, calling %p\n", cont->error); 1795 pr_info("reset set in interrupt, calling %pf\n", cont->error);
1824 cont->error(); /* a reset just after a reset. BAD! */ 1796 cont->error(); /* a reset just after a reset. BAD! */
1825 } 1797 }
1826 cont->redo(); 1798 cont->redo();
@@ -1858,53 +1830,49 @@ static void show_floppy(void)
1858{ 1830{
1859 int i; 1831 int i;
1860 1832
1861 printk("\n"); 1833 pr_info("\n");
1862 printk("floppy driver state\n"); 1834 pr_info("floppy driver state\n");
1863 printk("-------------------\n"); 1835 pr_info("-------------------\n");
1864 printk("now=%lu last interrupt=%lu diff=%lu last called handler=%p\n", 1836 pr_info("now=%lu last interrupt=%lu diff=%lu last called handler=%pf\n",
1865 jiffies, interruptjiffies, jiffies - interruptjiffies, 1837 jiffies, interruptjiffies, jiffies - interruptjiffies,
1866 lasthandler); 1838 lasthandler);
1867 1839
1868#ifdef FLOPPY_SANITY_CHECK 1840 pr_info("timeout_message=%s\n", timeout_message);
1869 printk("timeout_message=%s\n", timeout_message); 1841 pr_info("last output bytes:\n");
1870 printk("last output bytes:\n");
1871 for (i = 0; i < OLOGSIZE; i++) 1842 for (i = 0; i < OLOGSIZE; i++)
1872 printk("%2x %2x %lu\n", 1843 pr_info("%2x %2x %lu\n",
1873 output_log[(i + output_log_pos) % OLOGSIZE].data, 1844 output_log[(i + output_log_pos) % OLOGSIZE].data,
1874 output_log[(i + output_log_pos) % OLOGSIZE].status, 1845 output_log[(i + output_log_pos) % OLOGSIZE].status,
1875 output_log[(i + output_log_pos) % OLOGSIZE].jiffies); 1846 output_log[(i + output_log_pos) % OLOGSIZE].jiffies);
1876 printk("last result at %lu\n", resultjiffies); 1847 pr_info("last result at %lu\n", resultjiffies);
1877 printk("last redo_fd_request at %lu\n", lastredo); 1848 pr_info("last redo_fd_request at %lu\n", lastredo);
1878 for (i = 0; i < resultsize; i++) { 1849 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 1,
1879 printk("%2x ", reply_buffer[i]); 1850 reply_buffer, resultsize, true);
1880 } 1851
1881 printk("\n"); 1852 pr_info("status=%x\n", fd_inb(FD_STATUS));
1882#endif 1853 pr_info("fdc_busy=%lu\n", fdc_busy);
1883
1884 printk("status=%x\n", fd_inb(FD_STATUS));
1885 printk("fdc_busy=%lu\n", fdc_busy);
1886 if (do_floppy) 1854 if (do_floppy)
1887 printk("do_floppy=%p\n", do_floppy); 1855 pr_info("do_floppy=%pf\n", do_floppy);
1888 if (work_pending(&floppy_work)) 1856 if (work_pending(&floppy_work))
1889 printk("floppy_work.func=%p\n", floppy_work.func); 1857 pr_info("floppy_work.func=%pf\n", floppy_work.func);
1890 if (timer_pending(&fd_timer)) 1858 if (timer_pending(&fd_timer))
1891 printk("fd_timer.function=%p\n", fd_timer.function); 1859 pr_info("fd_timer.function=%pf\n", fd_timer.function);
1892 if (timer_pending(&fd_timeout)) { 1860 if (timer_pending(&fd_timeout)) {
1893 printk("timer_function=%p\n", fd_timeout.function); 1861 pr_info("timer_function=%pf\n", fd_timeout.function);
1894 printk("expires=%lu\n", fd_timeout.expires - jiffies); 1862 pr_info("expires=%lu\n", fd_timeout.expires - jiffies);
1895 printk("now=%lu\n", jiffies); 1863 pr_info("now=%lu\n", jiffies);
1896 } 1864 }
1897 printk("cont=%p\n", cont); 1865 pr_info("cont=%p\n", cont);
1898 printk("current_req=%p\n", current_req); 1866 pr_info("current_req=%p\n", current_req);
1899 printk("command_status=%d\n", command_status); 1867 pr_info("command_status=%d\n", command_status);
1900 printk("\n"); 1868 pr_info("\n");
1901} 1869}
1902 1870
1903static void floppy_shutdown(unsigned long data) 1871static void floppy_shutdown(unsigned long data)
1904{ 1872{
1905 unsigned long flags; 1873 unsigned long flags;
1906 1874
1907 if (!initialising) 1875 if (initialized)
1908 show_floppy(); 1876 show_floppy();
1909 cancel_activity(); 1877 cancel_activity();
1910 1878
@@ -1916,17 +1884,17 @@ static void floppy_shutdown(unsigned long data)
1916 1884
1917 /* avoid dma going to a random drive after shutdown */ 1885 /* avoid dma going to a random drive after shutdown */
1918 1886
1919 if (!initialising) 1887 if (initialized)
1920 DPRINT("floppy timeout called\n"); 1888 DPRINT("floppy timeout called\n");
1921 FDCS->reset = 1; 1889 FDCS->reset = 1;
1922 if (cont) { 1890 if (cont) {
1923 cont->done(0); 1891 cont->done(0);
1924 cont->redo(); /* this will recall reset when needed */ 1892 cont->redo(); /* this will recall reset when needed */
1925 } else { 1893 } else {
1926 printk("no cont in shutdown!\n"); 1894 pr_info("no cont in shutdown!\n");
1927 process_fd_request(); 1895 process_fd_request();
1928 } 1896 }
1929 is_alive("floppy shutdown"); 1897 is_alive(__func__, "");
1930} 1898}
1931 1899
1932/* start motor, check media-changed condition and write protection */ 1900/* start motor, check media-changed condition and write protection */
@@ -1954,27 +1922,26 @@ static int start_motor(void (*function)(void))
1954 set_dor(fdc, mask, data); 1922 set_dor(fdc, mask, data);
1955 1923
1956 /* wait_for_completion also schedules reset if needed. */ 1924 /* wait_for_completion also schedules reset if needed. */
1957 return (fd_wait_for_completion(DRS->select_date + DP->select_delay, 1925 return fd_wait_for_completion(DRS->select_date + DP->select_delay,
1958 (timeout_fn) function)); 1926 (timeout_fn)function);
1959} 1927}
1960 1928
1961static void floppy_ready(void) 1929static void floppy_ready(void)
1962{ 1930{
1963 CHECK_RESET; 1931 if (FDCS->reset) {
1932 reset_fdc();
1933 return;
1934 }
1964 if (start_motor(floppy_ready)) 1935 if (start_motor(floppy_ready))
1965 return; 1936 return;
1966 if (fdc_dtr()) 1937 if (fdc_dtr())
1967 return; 1938 return;
1968 1939
1969#ifdef DCL_DEBUG 1940 debug_dcl(DP->flags, "calling disk change from floppy_ready\n");
1970 if (DP->flags & FD_DEBUG) {
1971 DPRINT("calling disk change from floppy_ready\n");
1972 }
1973#endif
1974 if (!(raw_cmd->flags & FD_RAW_NO_MOTOR) && 1941 if (!(raw_cmd->flags & FD_RAW_NO_MOTOR) &&
1975 disk_change(current_drive) && !DP->select_delay) 1942 disk_change(current_drive) && !DP->select_delay)
1976 twaddle(); /* this clears the dcl on certain drive/controller 1943 twaddle(); /* this clears the dcl on certain
1977 * combinations */ 1944 * drive/controller combinations */
1978 1945
1979#ifdef fd_chose_dma_mode 1946#ifdef fd_chose_dma_mode
1980 if ((raw_cmd->flags & FD_RAW_READ) || (raw_cmd->flags & FD_RAW_WRITE)) { 1947 if ((raw_cmd->flags & FD_RAW_READ) || (raw_cmd->flags & FD_RAW_WRITE)) {
@@ -1998,15 +1965,11 @@ static void floppy_ready(void)
1998 1965
1999static void floppy_start(void) 1966static void floppy_start(void)
2000{ 1967{
2001 reschedule_timeout(current_reqD, "floppy start", 0); 1968 reschedule_timeout(current_reqD, "floppy start");
2002 1969
2003 scandrives(); 1970 scandrives();
2004#ifdef DCL_DEBUG 1971 debug_dcl(DP->flags, "setting NEWCHANGE in floppy_start\n");
2005 if (DP->flags & FD_DEBUG) { 1972 set_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
2006 DPRINT("setting NEWCHANGE in floppy_start\n");
2007 }
2008#endif
2009 SETF(FD_DISK_NEWCHANGE);
2010 floppy_ready(); 1973 floppy_ready();
2011} 1974}
2012 1975
@@ -2026,7 +1989,7 @@ static void floppy_start(void)
2026 1989
2027static void do_wakeup(void) 1990static void do_wakeup(void)
2028{ 1991{
2029 reschedule_timeout(MAXTIMEOUT, "do wakeup", 0); 1992 reschedule_timeout(MAXTIMEOUT, "do wakeup");
2030 cont = NULL; 1993 cont = NULL;
2031 command_status += 2; 1994 command_status += 2;
2032 wake_up(&command_done); 1995 wake_up(&command_done);
@@ -2046,7 +2009,7 @@ static struct cont_t intr_cont = {
2046 .done = (done_f)empty 2009 .done = (done_f)empty
2047}; 2010};
2048 2011
2049static int wait_til_done(void (*handler)(void), int interruptible) 2012static int wait_til_done(void (*handler)(void), bool interruptible)
2050{ 2013{
2051 int ret; 2014 int ret;
2052 2015
@@ -2064,7 +2027,7 @@ static int wait_til_done(void (*handler)(void), int interruptible)
2064 if (command_status >= 2 || !NO_SIGNAL) 2027 if (command_status >= 2 || !NO_SIGNAL)
2065 break; 2028 break;
2066 2029
2067 is_alive("wait_til_done"); 2030 is_alive(__func__, "");
2068 schedule(); 2031 schedule();
2069 } 2032 }
2070 2033
@@ -2180,9 +2143,9 @@ static void format_interrupt(void)
2180 cont->redo(); 2143 cont->redo();
2181} 2144}
2182 2145
2183#define CODE2SIZE (ssize = ((1 << SIZECODE) + 3) >> 2) 2146#define FM_MODE(x, y) ((y) & ~(((x)->rate & 0x80) >> 1))
2184#define FM_MODE(x,y) ((y) & ~(((x)->rate & 0x80) >>1))
2185#define CT(x) ((x) | 0xc0) 2147#define CT(x) ((x) | 0xc0)
2148
2186static void setup_format_params(int track) 2149static void setup_format_params(int track)
2187{ 2150{
2188 int n; 2151 int n;
@@ -2197,8 +2160,8 @@ static void setup_format_params(int track)
2197 raw_cmd = &default_raw_cmd; 2160 raw_cmd = &default_raw_cmd;
2198 raw_cmd->track = track; 2161 raw_cmd->track = track;
2199 2162
2200 raw_cmd->flags = FD_RAW_WRITE | FD_RAW_INTR | FD_RAW_SPIN | 2163 raw_cmd->flags = (FD_RAW_WRITE | FD_RAW_INTR | FD_RAW_SPIN |
2201 FD_RAW_NEED_DISK | FD_RAW_NEED_SEEK; 2164 FD_RAW_NEED_DISK | FD_RAW_NEED_SEEK);
2202 raw_cmd->rate = _floppy->rate & 0x43; 2165 raw_cmd->rate = _floppy->rate & 0x43;
2203 raw_cmd->cmd_count = NR_F; 2166 raw_cmd->cmd_count = NR_F;
2204 COMMAND = FM_MODE(_floppy, FD_FORMAT); 2167 COMMAND = FM_MODE(_floppy, FD_FORMAT);
@@ -2257,7 +2220,7 @@ static void redo_format(void)
2257 buffer_track = -1; 2220 buffer_track = -1;
2258 setup_format_params(format_req.track << STRETCH(_floppy)); 2221 setup_format_params(format_req.track << STRETCH(_floppy));
2259 floppy_start(); 2222 floppy_start();
2260 debugt("queue format request"); 2223 debugt(__func__, "queue format request");
2261} 2224}
2262 2225
2263static struct cont_t format_cont = { 2226static struct cont_t format_cont = {
@@ -2271,7 +2234,9 @@ static int do_format(int drive, struct format_descr *tmp_format_req)
2271{ 2234{
2272 int ret; 2235 int ret;
2273 2236
2274 LOCK_FDC(drive, 1); 2237 if (lock_fdc(drive, true))
2238 return -EINTR;
2239
2275 set_floppy(drive); 2240 set_floppy(drive);
2276 if (!_floppy || 2241 if (!_floppy ||
2277 _floppy->track > DP->tracks || 2242 _floppy->track > DP->tracks ||
@@ -2286,7 +2251,9 @@ static int do_format(int drive, struct format_descr *tmp_format_req)
2286 format_errors = 0; 2251 format_errors = 0;
2287 cont = &format_cont; 2252 cont = &format_cont;
2288 errors = &format_errors; 2253 errors = &format_errors;
2289 IWAIT(redo_format); 2254 ret = wait_til_done(redo_format, true);
2255 if (ret == -EINTR)
2256 return -EINTR;
2290 process_fd_request(); 2257 process_fd_request();
2291 return ret; 2258 return ret;
2292} 2259}
@@ -2320,12 +2287,14 @@ static void request_done(int uptodate)
2320 struct request *req = current_req; 2287 struct request *req = current_req;
2321 unsigned long flags; 2288 unsigned long flags;
2322 int block; 2289 int block;
2290 char msg[sizeof("request done ") + sizeof(int) * 3];
2323 2291
2324 probing = 0; 2292 probing = 0;
2325 reschedule_timeout(MAXTIMEOUT, "request done %d", uptodate); 2293 snprintf(msg, sizeof(msg), "request done %d", uptodate);
2294 reschedule_timeout(MAXTIMEOUT, msg);
2326 2295
2327 if (!req) { 2296 if (!req) {
2328 printk("floppy.c: no request in request_done\n"); 2297 pr_info("floppy.c: no request in request_done\n");
2329 return; 2298 return;
2330 } 2299 }
2331 2300
@@ -2377,7 +2346,7 @@ static void rw_interrupt(void)
2377 DRS->first_read_date = jiffies; 2346 DRS->first_read_date = jiffies;
2378 2347
2379 nr_sectors = 0; 2348 nr_sectors = 0;
2380 CODE2SIZE; 2349 ssize = DIV_ROUND_UP(1 << SIZECODE, 4);
2381 2350
2382 if (ST1 & ST1_EOC) 2351 if (ST1 & ST1_EOC)
2383 eoc = 1; 2352 eoc = 1;
@@ -2393,20 +2362,18 @@ static void rw_interrupt(void)
2393 R_HEAD - HEAD) * SECT_PER_TRACK + 2362 R_HEAD - HEAD) * SECT_PER_TRACK +
2394 R_SECTOR - SECTOR + eoc) << SIZECODE >> 2; 2363 R_SECTOR - SECTOR + eoc) << SIZECODE >> 2;
2395 2364
2396#ifdef FLOPPY_SANITY_CHECK
2397 if (nr_sectors / ssize > 2365 if (nr_sectors / ssize >
2398 DIV_ROUND_UP(in_sector_offset + current_count_sectors, ssize)) { 2366 DIV_ROUND_UP(in_sector_offset + current_count_sectors, ssize)) {
2399 DPRINT("long rw: %x instead of %lx\n", 2367 DPRINT("long rw: %x instead of %lx\n",
2400 nr_sectors, current_count_sectors); 2368 nr_sectors, current_count_sectors);
2401 printk("rs=%d s=%d\n", R_SECTOR, SECTOR); 2369 pr_info("rs=%d s=%d\n", R_SECTOR, SECTOR);
2402 printk("rh=%d h=%d\n", R_HEAD, HEAD); 2370 pr_info("rh=%d h=%d\n", R_HEAD, HEAD);
2403 printk("rt=%d t=%d\n", R_TRACK, TRACK); 2371 pr_info("rt=%d t=%d\n", R_TRACK, TRACK);
2404 printk("heads=%d eoc=%d\n", heads, eoc); 2372 pr_info("heads=%d eoc=%d\n", heads, eoc);
2405 printk("spt=%d st=%d ss=%d\n", SECT_PER_TRACK, 2373 pr_info("spt=%d st=%d ss=%d\n",
2406 fsector_t, ssize); 2374 SECT_PER_TRACK, fsector_t, ssize);
2407 printk("in_sector_offset=%d\n", in_sector_offset); 2375 pr_info("in_sector_offset=%d\n", in_sector_offset);
2408 } 2376 }
2409#endif
2410 2377
2411 nr_sectors -= in_sector_offset; 2378 nr_sectors -= in_sector_offset;
2412 INFBOUND(nr_sectors, 0); 2379 INFBOUND(nr_sectors, 0);
@@ -2511,19 +2478,17 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
2511 blk_rq_sectors(current_req)); 2478 blk_rq_sectors(current_req));
2512 2479
2513 remaining = current_count_sectors << 9; 2480 remaining = current_count_sectors << 9;
2514#ifdef FLOPPY_SANITY_CHECK
2515 if (remaining > blk_rq_bytes(current_req) && CT(COMMAND) == FD_WRITE) { 2481 if (remaining > blk_rq_bytes(current_req) && CT(COMMAND) == FD_WRITE) {
2516 DPRINT("in copy buffer\n"); 2482 DPRINT("in copy buffer\n");
2517 printk("current_count_sectors=%ld\n", current_count_sectors); 2483 pr_info("current_count_sectors=%ld\n", current_count_sectors);
2518 printk("remaining=%d\n", remaining >> 9); 2484 pr_info("remaining=%d\n", remaining >> 9);
2519 printk("current_req->nr_sectors=%u\n", 2485 pr_info("current_req->nr_sectors=%u\n",
2520 blk_rq_sectors(current_req)); 2486 blk_rq_sectors(current_req));
2521 printk("current_req->current_nr_sectors=%u\n", 2487 pr_info("current_req->current_nr_sectors=%u\n",
2522 blk_rq_cur_sectors(current_req)); 2488 blk_rq_cur_sectors(current_req));
2523 printk("max_sector=%d\n", max_sector); 2489 pr_info("max_sector=%d\n", max_sector);
2524 printk("ssize=%d\n", ssize); 2490 pr_info("ssize=%d\n", ssize);
2525 } 2491 }
2526#endif
2527 2492
2528 buffer_max = max(max_sector, buffer_max); 2493 buffer_max = max(max_sector, buffer_max);
2529 2494
@@ -2539,26 +2504,24 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
2539 SUPBOUND(size, remaining); 2504 SUPBOUND(size, remaining);
2540 2505
2541 buffer = page_address(bv->bv_page) + bv->bv_offset; 2506 buffer = page_address(bv->bv_page) + bv->bv_offset;
2542#ifdef FLOPPY_SANITY_CHECK
2543 if (dma_buffer + size > 2507 if (dma_buffer + size >
2544 floppy_track_buffer + (max_buffer_sectors << 10) || 2508 floppy_track_buffer + (max_buffer_sectors << 10) ||
2545 dma_buffer < floppy_track_buffer) { 2509 dma_buffer < floppy_track_buffer) {
2546 DPRINT("buffer overrun in copy buffer %d\n", 2510 DPRINT("buffer overrun in copy buffer %d\n",
2547 (int)((floppy_track_buffer - 2511 (int)((floppy_track_buffer - dma_buffer) >> 9));
2548 dma_buffer) >> 9)); 2512 pr_info("fsector_t=%d buffer_min=%d\n",
2549 printk("fsector_t=%d buffer_min=%d\n", 2513 fsector_t, buffer_min);
2550 fsector_t, buffer_min); 2514 pr_info("current_count_sectors=%ld\n",
2551 printk("current_count_sectors=%ld\n", 2515 current_count_sectors);
2552 current_count_sectors);
2553 if (CT(COMMAND) == FD_READ) 2516 if (CT(COMMAND) == FD_READ)
2554 printk("read\n"); 2517 pr_info("read\n");
2555 if (CT(COMMAND) == FD_WRITE) 2518 if (CT(COMMAND) == FD_WRITE)
2556 printk("write\n"); 2519 pr_info("write\n");
2557 break; 2520 break;
2558 } 2521 }
2559 if (((unsigned long)buffer) % 512) 2522 if (((unsigned long)buffer) % 512)
2560 DPRINT("%p buffer not aligned\n", buffer); 2523 DPRINT("%p buffer not aligned\n", buffer);
2561#endif 2524
2562 if (CT(COMMAND) == FD_READ) 2525 if (CT(COMMAND) == FD_READ)
2563 memcpy(buffer, dma_buffer, size); 2526 memcpy(buffer, dma_buffer, size);
2564 else 2527 else
@@ -2567,13 +2530,11 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
2567 remaining -= size; 2530 remaining -= size;
2568 dma_buffer += size; 2531 dma_buffer += size;
2569 } 2532 }
2570#ifdef FLOPPY_SANITY_CHECK
2571 if (remaining) { 2533 if (remaining) {
2572 if (remaining > 0) 2534 if (remaining > 0)
2573 max_sector -= remaining >> 9; 2535 max_sector -= remaining >> 9;
2574 DPRINT("weirdness: remaining %d\n", remaining >> 9); 2536 DPRINT("weirdness: remaining %d\n", remaining >> 9);
2575 } 2537 }
2576#endif
2577} 2538}
2578 2539
2579/* work around a bug in pseudo DMA 2540/* work around a bug in pseudo DMA
@@ -2593,15 +2554,14 @@ static void virtualdmabug_workaround(void)
2593 2554
2594 hard_sectors = raw_cmd->length >> (7 + SIZECODE); 2555 hard_sectors = raw_cmd->length >> (7 + SIZECODE);
2595 end_sector = SECTOR + hard_sectors - 1; 2556 end_sector = SECTOR + hard_sectors - 1;
2596#ifdef FLOPPY_SANITY_CHECK
2597 if (end_sector > SECT_PER_TRACK) { 2557 if (end_sector > SECT_PER_TRACK) {
2598 printk("too many sectors %d > %d\n", 2558 pr_info("too many sectors %d > %d\n",
2599 end_sector, SECT_PER_TRACK); 2559 end_sector, SECT_PER_TRACK);
2600 return; 2560 return;
2601 } 2561 }
2602#endif 2562 SECT_PER_TRACK = end_sector;
2603 SECT_PER_TRACK = end_sector; /* make sure SECT_PER_TRACK points 2563 /* make sure SECT_PER_TRACK
2604 * to end of transfer */ 2564 * points to end of transfer */
2605 } 2565 }
2606} 2566}
2607 2567
@@ -2624,7 +2584,7 @@ static int make_raw_rw_request(void)
2624 int ssize; 2584 int ssize;
2625 2585
2626 if (max_buffer_sectors == 0) { 2586 if (max_buffer_sectors == 0) {
2627 printk("VFS: Block I/O scheduled on unopened device\n"); 2587 pr_info("VFS: Block I/O scheduled on unopened device\n");
2628 return 0; 2588 return 0;
2629 } 2589 }
2630 2590
@@ -2641,7 +2601,7 @@ static int make_raw_rw_request(void)
2641 raw_cmd->flags |= FD_RAW_WRITE; 2601 raw_cmd->flags |= FD_RAW_WRITE;
2642 COMMAND = FM_MODE(_floppy, FD_WRITE); 2602 COMMAND = FM_MODE(_floppy, FD_WRITE);
2643 } else { 2603 } else {
2644 DPRINT("make_raw_rw_request: unknown command\n"); 2604 DPRINT("%s: unknown command\n", __func__);
2645 return 0; 2605 return 0;
2646 } 2606 }
2647 2607
@@ -2659,7 +2619,8 @@ static int make_raw_rw_request(void)
2659 HEAD = fsector_t / _floppy->sect; 2619 HEAD = fsector_t / _floppy->sect;
2660 2620
2661 if (((_floppy->stretch & (FD_SWAPSIDES | FD_SECTBASEMASK)) || 2621 if (((_floppy->stretch & (FD_SWAPSIDES | FD_SECTBASEMASK)) ||
2662 TESTF(FD_NEED_TWADDLE)) && fsector_t < _floppy->sect) 2622 test_bit(FD_NEED_TWADDLE_BIT, &DRS->flags)) &&
2623 fsector_t < _floppy->sect)
2663 max_sector = _floppy->sect; 2624 max_sector = _floppy->sect;
2664 2625
2665 /* 2M disks have phantom sectors on the first track */ 2626 /* 2M disks have phantom sectors on the first track */
@@ -2685,7 +2646,7 @@ static int make_raw_rw_request(void)
2685 raw_cmd->track = TRACK << STRETCH(_floppy); 2646 raw_cmd->track = TRACK << STRETCH(_floppy);
2686 DR_SELECT = UNIT(current_drive) + PH_HEAD(_floppy, HEAD); 2647 DR_SELECT = UNIT(current_drive) + PH_HEAD(_floppy, HEAD);
2687 GAP = _floppy->gap; 2648 GAP = _floppy->gap;
2688 CODE2SIZE; 2649 ssize = DIV_ROUND_UP(1 << SIZECODE, 4);
2689 SECT_PER_TRACK = _floppy->sect << 2 >> SIZECODE; 2650 SECT_PER_TRACK = _floppy->sect << 2 >> SIZECODE;
2690 SECTOR = ((fsector_t % _floppy->sect) << 2 >> SIZECODE) + 2651 SECTOR = ((fsector_t % _floppy->sect) << 2 >> SIZECODE) +
2691 FD_SECTBASE(_floppy); 2652 FD_SECTBASE(_floppy);
@@ -2730,8 +2691,10 @@ static int make_raw_rw_request(void)
2730 } 2691 }
2731 } else if (in_sector_offset || blk_rq_sectors(current_req) < ssize) { 2692 } else if (in_sector_offset || blk_rq_sectors(current_req) < ssize) {
2732 if (CT(COMMAND) == FD_WRITE) { 2693 if (CT(COMMAND) == FD_WRITE) {
2733 if (fsector_t + blk_rq_sectors(current_req) > ssize && 2694 unsigned int sectors;
2734 fsector_t + blk_rq_sectors(current_req) < ssize + ssize) 2695
2696 sectors = fsector_t + blk_rq_sectors(current_req);
2697 if (sectors > ssize && sectors < ssize + ssize)
2735 max_size = ssize + ssize; 2698 max_size = ssize + ssize;
2736 else 2699 else
2737 max_size = ssize; 2700 max_size = ssize;
@@ -2752,12 +2715,10 @@ static int make_raw_rw_request(void)
2752 * on a 64 bit machine! 2715 * on a 64 bit machine!
2753 */ 2716 */
2754 max_size = buffer_chain_size(); 2717 max_size = buffer_chain_size();
2755 dma_limit = 2718 dma_limit = (MAX_DMA_ADDRESS -
2756 (MAX_DMA_ADDRESS - 2719 ((unsigned long)current_req->buffer)) >> 9;
2757 ((unsigned long)current_req->buffer)) >> 9; 2720 if ((unsigned long)max_size > dma_limit)
2758 if ((unsigned long)max_size > dma_limit) {
2759 max_size = dma_limit; 2721 max_size = dma_limit;
2760 }
2761 /* 64 kb boundaries */ 2722 /* 64 kb boundaries */
2762 if (CROSS_64KB(current_req->buffer, max_size << 9)) 2723 if (CROSS_64KB(current_req->buffer, max_size << 9))
2763 max_size = (K_64 - 2724 max_size = (K_64 -
@@ -2773,16 +2734,16 @@ static int make_raw_rw_request(void)
2773 */ 2734 */
2774 if (!direct || 2735 if (!direct ||
2775 (indirect * 2 > direct * 3 && 2736 (indirect * 2 > direct * 3 &&
2776 *errors < DP->max_errors.read_track && ((!probing 2737 *errors < DP->max_errors.read_track &&
2777 || (DP->read_track & (1 << DRS->probed_format)))))) { 2738 ((!probing ||
2739 (DP->read_track & (1 << DRS->probed_format)))))) {
2778 max_size = blk_rq_sectors(current_req); 2740 max_size = blk_rq_sectors(current_req);
2779 } else { 2741 } else {
2780 raw_cmd->kernel_data = current_req->buffer; 2742 raw_cmd->kernel_data = current_req->buffer;
2781 raw_cmd->length = current_count_sectors << 9; 2743 raw_cmd->length = current_count_sectors << 9;
2782 if (raw_cmd->length == 0) { 2744 if (raw_cmd->length == 0) {
2783 DPRINT 2745 DPRINT("%s: zero dma transfer attempted\n", __func__);
2784 ("zero dma transfer attempted from make_raw_request\n"); 2746 DPRINT("indirect=%d direct=%d fsector_t=%d\n",
2785 DPRINT("indirect=%d direct=%d fsector_t=%d",
2786 indirect, direct, fsector_t); 2747 indirect, direct, fsector_t);
2787 return 0; 2748 return 0;
2788 } 2749 }
@@ -2802,25 +2763,22 @@ static int make_raw_rw_request(void)
2802 ((CT(COMMAND) == FD_READ || 2763 ((CT(COMMAND) == FD_READ ||
2803 (!in_sector_offset && blk_rq_sectors(current_req) >= ssize)) && 2764 (!in_sector_offset && blk_rq_sectors(current_req) >= ssize)) &&
2804 max_sector > 2 * max_buffer_sectors + buffer_min && 2765 max_sector > 2 * max_buffer_sectors + buffer_min &&
2805 max_size + fsector_t > 2 * max_buffer_sectors + buffer_min) 2766 max_size + fsector_t > 2 * max_buffer_sectors + buffer_min)) {
2806 /* not enough space */ 2767 /* not enough space */
2807 ) {
2808 buffer_track = -1; 2768 buffer_track = -1;
2809 buffer_drive = current_drive; 2769 buffer_drive = current_drive;
2810 buffer_max = buffer_min = aligned_sector_t; 2770 buffer_max = buffer_min = aligned_sector_t;
2811 } 2771 }
2812 raw_cmd->kernel_data = floppy_track_buffer + 2772 raw_cmd->kernel_data = floppy_track_buffer +
2813 ((aligned_sector_t - buffer_min) << 9); 2773 ((aligned_sector_t - buffer_min) << 9);
2814 2774
2815 if (CT(COMMAND) == FD_WRITE) { 2775 if (CT(COMMAND) == FD_WRITE) {
2816 /* copy write buffer to track buffer. 2776 /* copy write buffer to track buffer.
2817 * if we get here, we know that the write 2777 * if we get here, we know that the write
2818 * is either aligned or the data already in the buffer 2778 * is either aligned or the data already in the buffer
2819 * (buffer will be overwritten) */ 2779 * (buffer will be overwritten) */
2820#ifdef FLOPPY_SANITY_CHECK
2821 if (in_sector_offset && buffer_track == -1) 2780 if (in_sector_offset && buffer_track == -1)
2822 DPRINT("internal error offset !=0 on write\n"); 2781 DPRINT("internal error offset !=0 on write\n");
2823#endif
2824 buffer_track = raw_cmd->track; 2782 buffer_track = raw_cmd->track;
2825 buffer_drive = current_drive; 2783 buffer_drive = current_drive;
2826 copy_buffer(ssize, max_sector, 2784 copy_buffer(ssize, max_sector,
@@ -2834,7 +2792,6 @@ static int make_raw_rw_request(void)
2834 raw_cmd->length = in_sector_offset + current_count_sectors; 2792 raw_cmd->length = in_sector_offset + current_count_sectors;
2835 raw_cmd->length = ((raw_cmd->length - 1) | (ssize - 1)) + 1; 2793 raw_cmd->length = ((raw_cmd->length - 1) | (ssize - 1)) + 1;
2836 raw_cmd->length <<= 9; 2794 raw_cmd->length <<= 9;
2837#ifdef FLOPPY_SANITY_CHECK
2838 if ((raw_cmd->length < current_count_sectors << 9) || 2795 if ((raw_cmd->length < current_count_sectors << 9) ||
2839 (raw_cmd->kernel_data != current_req->buffer && 2796 (raw_cmd->kernel_data != current_req->buffer &&
2840 CT(COMMAND) == FD_WRITE && 2797 CT(COMMAND) == FD_WRITE &&
@@ -2845,19 +2802,19 @@ static int make_raw_rw_request(void)
2845 DPRINT("fractionary current count b=%lx s=%lx\n", 2802 DPRINT("fractionary current count b=%lx s=%lx\n",
2846 raw_cmd->length, current_count_sectors); 2803 raw_cmd->length, current_count_sectors);
2847 if (raw_cmd->kernel_data != current_req->buffer) 2804 if (raw_cmd->kernel_data != current_req->buffer)
2848 printk("addr=%d, length=%ld\n", 2805 pr_info("addr=%d, length=%ld\n",
2849 (int)((raw_cmd->kernel_data - 2806 (int)((raw_cmd->kernel_data -
2850 floppy_track_buffer) >> 9), 2807 floppy_track_buffer) >> 9),
2851 current_count_sectors); 2808 current_count_sectors);
2852 printk("st=%d ast=%d mse=%d msi=%d\n", 2809 pr_info("st=%d ast=%d mse=%d msi=%d\n",
2853 fsector_t, aligned_sector_t, max_sector, max_size); 2810 fsector_t, aligned_sector_t, max_sector, max_size);
2854 printk("ssize=%x SIZECODE=%d\n", ssize, SIZECODE); 2811 pr_info("ssize=%x SIZECODE=%d\n", ssize, SIZECODE);
2855 printk("command=%x SECTOR=%d HEAD=%d, TRACK=%d\n", 2812 pr_info("command=%x SECTOR=%d HEAD=%d, TRACK=%d\n",
2856 COMMAND, SECTOR, HEAD, TRACK); 2813 COMMAND, SECTOR, HEAD, TRACK);
2857 printk("buffer drive=%d\n", buffer_drive); 2814 pr_info("buffer drive=%d\n", buffer_drive);
2858 printk("buffer track=%d\n", buffer_track); 2815 pr_info("buffer track=%d\n", buffer_track);
2859 printk("buffer_min=%d\n", buffer_min); 2816 pr_info("buffer_min=%d\n", buffer_min);
2860 printk("buffer_max=%d\n", buffer_max); 2817 pr_info("buffer_max=%d\n", buffer_max);
2861 return 0; 2818 return 0;
2862 } 2819 }
2863 2820
@@ -2868,14 +2825,14 @@ static int make_raw_rw_request(void)
2868 raw_cmd->kernel_data + raw_cmd->length > 2825 raw_cmd->kernel_data + raw_cmd->length >
2869 floppy_track_buffer + (max_buffer_sectors << 10)) { 2826 floppy_track_buffer + (max_buffer_sectors << 10)) {
2870 DPRINT("buffer overrun in schedule dma\n"); 2827 DPRINT("buffer overrun in schedule dma\n");
2871 printk("fsector_t=%d buffer_min=%d current_count=%ld\n", 2828 pr_info("fsector_t=%d buffer_min=%d current_count=%ld\n",
2872 fsector_t, buffer_min, raw_cmd->length >> 9); 2829 fsector_t, buffer_min, raw_cmd->length >> 9);
2873 printk("current_count_sectors=%ld\n", 2830 pr_info("current_count_sectors=%ld\n",
2874 current_count_sectors); 2831 current_count_sectors);
2875 if (CT(COMMAND) == FD_READ) 2832 if (CT(COMMAND) == FD_READ)
2876 printk("read\n"); 2833 pr_info("read\n");
2877 if (CT(COMMAND) == FD_WRITE) 2834 if (CT(COMMAND) == FD_WRITE)
2878 printk("write\n"); 2835 pr_info("write\n");
2879 return 0; 2836 return 0;
2880 } 2837 }
2881 } else if (raw_cmd->length > blk_rq_bytes(current_req) || 2838 } else if (raw_cmd->length > blk_rq_bytes(current_req) ||
@@ -2884,14 +2841,13 @@ static int make_raw_rw_request(void)
2884 return 0; 2841 return 0;
2885 } else if (raw_cmd->length < current_count_sectors << 9) { 2842 } else if (raw_cmd->length < current_count_sectors << 9) {
2886 DPRINT("more sectors than bytes\n"); 2843 DPRINT("more sectors than bytes\n");
2887 printk("bytes=%ld\n", raw_cmd->length >> 9); 2844 pr_info("bytes=%ld\n", raw_cmd->length >> 9);
2888 printk("sectors=%ld\n", current_count_sectors); 2845 pr_info("sectors=%ld\n", current_count_sectors);
2889 } 2846 }
2890 if (raw_cmd->length == 0) { 2847 if (raw_cmd->length == 0) {
2891 DPRINT("zero dma transfer attempted from make_raw_request\n"); 2848 DPRINT("zero dma transfer attempted from make_raw_request\n");
2892 return 0; 2849 return 0;
2893 } 2850 }
2894#endif
2895 2851
2896 virtualdmabug_workaround(); 2852 virtualdmabug_workaround();
2897 return 2; 2853 return 2;
@@ -2899,7 +2855,6 @@ static int make_raw_rw_request(void)
2899 2855
2900static void redo_fd_request(void) 2856static void redo_fd_request(void)
2901{ 2857{
2902#define REPEAT {request_done(0); continue; }
2903 int drive; 2858 int drive;
2904 int tmp; 2859 int tmp;
2905 2860
@@ -2907,63 +2862,63 @@ static void redo_fd_request(void)
2907 if (current_drive < N_DRIVE) 2862 if (current_drive < N_DRIVE)
2908 floppy_off(current_drive); 2863 floppy_off(current_drive);
2909 2864
2910 for (;;) { 2865do_request:
2911 if (!current_req) { 2866 if (!current_req) {
2912 struct request *req; 2867 struct request *req;
2913
2914 spin_lock_irq(floppy_queue->queue_lock);
2915 req = blk_fetch_request(floppy_queue);
2916 spin_unlock_irq(floppy_queue->queue_lock);
2917 if (!req) {
2918 do_floppy = NULL;
2919 unlock_fdc();
2920 return;
2921 }
2922 current_req = req;
2923 }
2924 drive = (long)current_req->rq_disk->private_data;
2925 set_fdc(drive);
2926 reschedule_timeout(current_reqD, "redo fd request", 0);
2927 2868
2928 set_floppy(drive); 2869 spin_lock_irq(floppy_queue->queue_lock);
2929 raw_cmd = &default_raw_cmd; 2870 req = blk_fetch_request(floppy_queue);
2930 raw_cmd->flags = 0; 2871 spin_unlock_irq(floppy_queue->queue_lock);
2931 if (start_motor(redo_fd_request)) 2872 if (!req) {
2873 do_floppy = NULL;
2874 unlock_fdc();
2932 return; 2875 return;
2933 disk_change(current_drive);
2934 if (test_bit(current_drive, &fake_change) ||
2935 TESTF(FD_DISK_CHANGED)) {
2936 DPRINT("disk absent or changed during operation\n");
2937 REPEAT;
2938 }
2939 if (!_floppy) { /* Autodetection */
2940 if (!probing) {
2941 DRS->probed_format = 0;
2942 if (next_valid_format()) {
2943 DPRINT("no autodetectable formats\n");
2944 _floppy = NULL;
2945 REPEAT;
2946 }
2947 }
2948 probing = 1;
2949 _floppy =
2950 floppy_type + DP->autodetect[DRS->probed_format];
2951 } else
2952 probing = 0;
2953 errors = &(current_req->errors);
2954 tmp = make_raw_rw_request();
2955 if (tmp < 2) {
2956 request_done(tmp);
2957 continue;
2958 } 2876 }
2877 current_req = req;
2878 }
2879 drive = (long)current_req->rq_disk->private_data;
2880 set_fdc(drive);
2881 reschedule_timeout(current_reqD, "redo fd request");
2959 2882
2960 if (TESTF(FD_NEED_TWADDLE)) 2883 set_floppy(drive);
2961 twaddle(); 2884 raw_cmd = &default_raw_cmd;
2962 schedule_bh(floppy_start); 2885 raw_cmd->flags = 0;
2963 debugt("queue fd request"); 2886 if (start_motor(redo_fd_request))
2964 return; 2887 return;
2888
2889 disk_change(current_drive);
2890 if (test_bit(current_drive, &fake_change) ||
2891 test_bit(FD_DISK_CHANGED_BIT, &DRS->flags)) {
2892 DPRINT("disk absent or changed during operation\n");
2893 request_done(0);
2894 goto do_request;
2895 }
2896 if (!_floppy) { /* Autodetection */
2897 if (!probing) {
2898 DRS->probed_format = 0;
2899 if (next_valid_format()) {
2900 DPRINT("no autodetectable formats\n");
2901 _floppy = NULL;
2902 request_done(0);
2903 goto do_request;
2904 }
2905 }
2906 probing = 1;
2907 _floppy = floppy_type + DP->autodetect[DRS->probed_format];
2908 } else
2909 probing = 0;
2910 errors = &(current_req->errors);
2911 tmp = make_raw_rw_request();
2912 if (tmp < 2) {
2913 request_done(tmp);
2914 goto do_request;
2965 } 2915 }
2966#undef REPEAT 2916
2917 if (test_bit(FD_NEED_TWADDLE_BIT, &DRS->flags))
2918 twaddle();
2919 schedule_bh(floppy_start);
2920 debugt(__func__, "queue fd request");
2921 return;
2967} 2922}
2968 2923
2969static struct cont_t rw_cont = { 2924static struct cont_t rw_cont = {
@@ -2979,30 +2934,30 @@ static void process_fd_request(void)
2979 schedule_bh(redo_fd_request); 2934 schedule_bh(redo_fd_request);
2980} 2935}
2981 2936
2982static void do_fd_request(struct request_queue * q) 2937static void do_fd_request(struct request_queue *q)
2983{ 2938{
2984 if (max_buffer_sectors == 0) { 2939 if (max_buffer_sectors == 0) {
2985 printk("VFS: do_fd_request called on non-open device\n"); 2940 pr_info("VFS: %s called on non-open device\n", __func__);
2986 return; 2941 return;
2987 } 2942 }
2988 2943
2989 if (usage_count == 0) { 2944 if (usage_count == 0) {
2990 printk("warning: usage count=0, current_req=%p exiting\n", 2945 pr_info("warning: usage count=0, current_req=%p exiting\n",
2991 current_req); 2946 current_req);
2992 printk("sect=%ld type=%x flags=%x\n", 2947 pr_info("sect=%ld type=%x flags=%x\n",
2993 (long)blk_rq_pos(current_req), current_req->cmd_type, 2948 (long)blk_rq_pos(current_req), current_req->cmd_type,
2994 current_req->cmd_flags); 2949 current_req->cmd_flags);
2995 return; 2950 return;
2996 } 2951 }
2997 if (test_bit(0, &fdc_busy)) { 2952 if (test_bit(0, &fdc_busy)) {
2998 /* fdc busy, this new request will be treated when the 2953 /* fdc busy, this new request will be treated when the
2999 current one is done */ 2954 current one is done */
3000 is_alive("do fd request, old request running"); 2955 is_alive(__func__, "old request running");
3001 return; 2956 return;
3002 } 2957 }
3003 lock_fdc(MAXTIMEOUT, 0); 2958 lock_fdc(MAXTIMEOUT, false);
3004 process_fd_request(); 2959 process_fd_request();
3005 is_alive("do fd request"); 2960 is_alive(__func__, "");
3006} 2961}
3007 2962
3008static struct cont_t poll_cont = { 2963static struct cont_t poll_cont = {
@@ -3012,24 +2967,18 @@ static struct cont_t poll_cont = {
3012 .done = generic_done 2967 .done = generic_done
3013}; 2968};
3014 2969
3015static int poll_drive(int interruptible, int flag) 2970static int poll_drive(bool interruptible, int flag)
3016{ 2971{
3017 int ret;
3018
3019 /* no auto-sense, just clear dcl */ 2972 /* no auto-sense, just clear dcl */
3020 raw_cmd = &default_raw_cmd; 2973 raw_cmd = &default_raw_cmd;
3021 raw_cmd->flags = flag; 2974 raw_cmd->flags = flag;
3022 raw_cmd->track = 0; 2975 raw_cmd->track = 0;
3023 raw_cmd->cmd_count = 0; 2976 raw_cmd->cmd_count = 0;
3024 cont = &poll_cont; 2977 cont = &poll_cont;
3025#ifdef DCL_DEBUG 2978 debug_dcl(DP->flags, "setting NEWCHANGE in poll_drive\n");
3026 if (DP->flags & FD_DEBUG) { 2979 set_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
3027 DPRINT("setting NEWCHANGE in poll_drive\n"); 2980
3028 } 2981 return wait_til_done(floppy_ready, interruptible);
3029#endif
3030 SETF(FD_DISK_NEWCHANGE);
3031 WAIT(floppy_ready);
3032 return ret;
3033} 2982}
3034 2983
3035/* 2984/*
@@ -3039,7 +2988,7 @@ static int poll_drive(int interruptible, int flag)
3039 2988
3040static void reset_intr(void) 2989static void reset_intr(void)
3041{ 2990{
3042 printk("weird, reset interrupt called\n"); 2991 pr_info("weird, reset interrupt called\n");
3043} 2992}
3044 2993
3045static struct cont_t reset_cont = { 2994static struct cont_t reset_cont = {
@@ -3049,20 +2998,23 @@ static struct cont_t reset_cont = {
3049 .done = generic_done 2998 .done = generic_done
3050}; 2999};
3051 3000
3052static int user_reset_fdc(int drive, int arg, int interruptible) 3001static int user_reset_fdc(int drive, int arg, bool interruptible)
3053{ 3002{
3054 int ret; 3003 int ret;
3055 3004
3056 ret = 0; 3005 if (lock_fdc(drive, interruptible))
3057 LOCK_FDC(drive, interruptible); 3006 return -EINTR;
3007
3058 if (arg == FD_RESET_ALWAYS) 3008 if (arg == FD_RESET_ALWAYS)
3059 FDCS->reset = 1; 3009 FDCS->reset = 1;
3060 if (FDCS->reset) { 3010 if (FDCS->reset) {
3061 cont = &reset_cont; 3011 cont = &reset_cont;
3062 WAIT(reset_fdc); 3012 ret = wait_til_done(reset_fdc, interruptible);
3013 if (ret == -EINTR)
3014 return -EINTR;
3063 } 3015 }
3064 process_fd_request(); 3016 process_fd_request();
3065 return ret; 3017 return 0;
3066} 3018}
3067 3019
3068/* 3020/*
@@ -3075,17 +3027,12 @@ static inline int fd_copyout(void __user *param, const void *address,
3075 return copy_to_user(param, address, size) ? -EFAULT : 0; 3027 return copy_to_user(param, address, size) ? -EFAULT : 0;
3076} 3028}
3077 3029
3078static inline int fd_copyin(void __user *param, void *address, unsigned long size) 3030static inline int fd_copyin(void __user *param, void *address,
3031 unsigned long size)
3079{ 3032{
3080 return copy_from_user(address, param, size) ? -EFAULT : 0; 3033 return copy_from_user(address, param, size) ? -EFAULT : 0;
3081} 3034}
3082 3035
3083#define _COPYOUT(x) (copy_to_user((void __user *)param, &(x), sizeof(x)) ? -EFAULT : 0)
3084#define _COPYIN(x) (copy_from_user(&(x), (void __user *)param, sizeof(x)) ? -EFAULT : 0)
3085
3086#define COPYOUT(x) ECALL(_COPYOUT(x))
3087#define COPYIN(x) ECALL(_COPYIN(x))
3088
3089static inline const char *drive_name(int type, int drive) 3036static inline const char *drive_name(int type, int drive)
3090{ 3037{
3091 struct floppy_struct *floppy; 3038 struct floppy_struct *floppy;
@@ -3156,23 +3103,29 @@ static struct cont_t raw_cmd_cont = {
3156 .done = raw_cmd_done 3103 .done = raw_cmd_done
3157}; 3104};
3158 3105
3159static inline int raw_cmd_copyout(int cmd, char __user *param, 3106static inline int raw_cmd_copyout(int cmd, void __user *param,
3160 struct floppy_raw_cmd *ptr) 3107 struct floppy_raw_cmd *ptr)
3161{ 3108{
3162 int ret; 3109 int ret;
3163 3110
3164 while (ptr) { 3111 while (ptr) {
3165 COPYOUT(*ptr); 3112 ret = copy_to_user(param, ptr, sizeof(*ptr));
3113 if (ret)
3114 return -EFAULT;
3166 param += sizeof(struct floppy_raw_cmd); 3115 param += sizeof(struct floppy_raw_cmd);
3167 if ((ptr->flags & FD_RAW_READ) && ptr->buffer_length) { 3116 if ((ptr->flags & FD_RAW_READ) && ptr->buffer_length) {
3168 if (ptr->length >= 0 3117 if (ptr->length >= 0 &&
3169 && ptr->length <= ptr->buffer_length) 3118 ptr->length <= ptr->buffer_length) {
3170 ECALL(fd_copyout 3119 long length = ptr->buffer_length - ptr->length;
3171 (ptr->data, ptr->kernel_data, 3120 ret = fd_copyout(ptr->data, ptr->kernel_data,
3172 ptr->buffer_length - ptr->length)); 3121 length);
3122 if (ret)
3123 return ret;
3124 }
3173 } 3125 }
3174 ptr = ptr->next; 3126 ptr = ptr->next;
3175 } 3127 }
3128
3176 return 0; 3129 return 0;
3177} 3130}
3178 3131
@@ -3195,7 +3148,7 @@ static void raw_cmd_free(struct floppy_raw_cmd **ptr)
3195 } 3148 }
3196} 3149}
3197 3150
3198static inline int raw_cmd_copyin(int cmd, char __user *param, 3151static inline int raw_cmd_copyin(int cmd, void __user *param,
3199 struct floppy_raw_cmd **rcmd) 3152 struct floppy_raw_cmd **rcmd)
3200{ 3153{
3201 struct floppy_raw_cmd *ptr; 3154 struct floppy_raw_cmd *ptr;
@@ -3203,17 +3156,19 @@ static inline int raw_cmd_copyin(int cmd, char __user *param,
3203 int i; 3156 int i;
3204 3157
3205 *rcmd = NULL; 3158 *rcmd = NULL;
3206 while (1) { 3159
3207 ptr = (struct floppy_raw_cmd *) 3160loop:
3208 kmalloc(sizeof(struct floppy_raw_cmd), GFP_USER); 3161 ptr = kmalloc(sizeof(struct floppy_raw_cmd), GFP_USER);
3209 if (!ptr) 3162 if (!ptr)
3210 return -ENOMEM; 3163 return -ENOMEM;
3211 *rcmd = ptr; 3164 *rcmd = ptr;
3212 COPYIN(*ptr); 3165 ret = copy_from_user(ptr, param, sizeof(*ptr));
3213 ptr->next = NULL; 3166 if (ret)
3214 ptr->buffer_length = 0; 3167 return -EFAULT;
3215 param += sizeof(struct floppy_raw_cmd); 3168 ptr->next = NULL;
3216 if (ptr->cmd_count > 33) 3169 ptr->buffer_length = 0;
3170 param += sizeof(struct floppy_raw_cmd);
3171 if (ptr->cmd_count > 33)
3217 /* the command may now also take up the space 3172 /* the command may now also take up the space
3218 * initially intended for the reply & the 3173 * initially intended for the reply & the
3219 * reply count. Needed for long 82078 commands 3174 * reply count. Needed for long 82078 commands
@@ -3222,31 +3177,35 @@ static inline int raw_cmd_copyin(int cmd, char __user *param,
3222 * 16 bytes for a structure, you'll one day 3177 * 16 bytes for a structure, you'll one day
3223 * discover that you really need 17... 3178 * discover that you really need 17...
3224 */ 3179 */
3180 return -EINVAL;
3181
3182 for (i = 0; i < 16; i++)
3183 ptr->reply[i] = 0;
3184 ptr->resultcode = 0;
3185 ptr->kernel_data = NULL;
3186
3187 if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) {
3188 if (ptr->length <= 0)
3225 return -EINVAL; 3189 return -EINVAL;
3190 ptr->kernel_data = (char *)fd_dma_mem_alloc(ptr->length);
3191 fallback_on_nodma_alloc(&ptr->kernel_data, ptr->length);
3192 if (!ptr->kernel_data)
3193 return -ENOMEM;
3194 ptr->buffer_length = ptr->length;
3195 }
3196 if (ptr->flags & FD_RAW_WRITE) {
3197 ret = fd_copyin(ptr->data, ptr->kernel_data, ptr->length);
3198 if (ret)
3199 return ret;
3200 }
3226 3201
3227 for (i = 0; i < 16; i++) 3202 if (ptr->flags & FD_RAW_MORE) {
3228 ptr->reply[i] = 0;
3229 ptr->resultcode = 0;
3230 ptr->kernel_data = NULL;
3231
3232 if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) {
3233 if (ptr->length <= 0)
3234 return -EINVAL;
3235 ptr->kernel_data =
3236 (char *)fd_dma_mem_alloc(ptr->length);
3237 fallback_on_nodma_alloc(&ptr->kernel_data, ptr->length);
3238 if (!ptr->kernel_data)
3239 return -ENOMEM;
3240 ptr->buffer_length = ptr->length;
3241 }
3242 if (ptr->flags & FD_RAW_WRITE)
3243 ECALL(fd_copyin(ptr->data, ptr->kernel_data,
3244 ptr->length));
3245 rcmd = &(ptr->next); 3203 rcmd = &(ptr->next);
3246 if (!(ptr->flags & FD_RAW_MORE))
3247 return 0;
3248 ptr->rate &= 0x43; 3204 ptr->rate &= 0x43;
3205 goto loop;
3249 } 3206 }
3207
3208 return 0;
3250} 3209}
3251 3210
3252static int raw_cmd_ioctl(int cmd, void __user *param) 3211static int raw_cmd_ioctl(int cmd, void __user *param)
@@ -3283,12 +3242,8 @@ static int raw_cmd_ioctl(int cmd, void __user *param)
3283 3242
3284 raw_cmd = my_raw_cmd; 3243 raw_cmd = my_raw_cmd;
3285 cont = &raw_cmd_cont; 3244 cont = &raw_cmd_cont;
3286 ret = wait_til_done(floppy_start, 1); 3245 ret = wait_til_done(floppy_start, true);
3287#ifdef DCL_DEBUG 3246 debug_dcl(DP->flags, "calling disk change from raw_cmd ioctl\n");
3288 if (DP->flags & FD_DEBUG) {
3289 DPRINT("calling disk change from raw_cmd ioctl\n");
3290 }
3291#endif
3292 3247
3293 if (ret != -EINTR && FDCS->reset) 3248 if (ret != -EINTR && FDCS->reset)
3294 ret = -EIO; 3249 ret = -EIO;
@@ -3327,7 +3282,7 @@ static inline int set_geometry(unsigned int cmd, struct floppy_struct *g,
3327 if (!capable(CAP_SYS_ADMIN)) 3282 if (!capable(CAP_SYS_ADMIN))
3328 return -EPERM; 3283 return -EPERM;
3329 mutex_lock(&open_lock); 3284 mutex_lock(&open_lock);
3330 if (lock_fdc(drive, 1)) { 3285 if (lock_fdc(drive, true)) {
3331 mutex_unlock(&open_lock); 3286 mutex_unlock(&open_lock);
3332 return -EINTR; 3287 return -EINTR;
3333 } 3288 }
@@ -3346,11 +3301,15 @@ static inline int set_geometry(unsigned int cmd, struct floppy_struct *g,
3346 mutex_unlock(&open_lock); 3301 mutex_unlock(&open_lock);
3347 } else { 3302 } else {
3348 int oldStretch; 3303 int oldStretch;
3349 LOCK_FDC(drive, 1); 3304
3350 if (cmd != FDDEFPRM) 3305 if (lock_fdc(drive, true))
3306 return -EINTR;
3307 if (cmd != FDDEFPRM) {
3351 /* notice a disk change immediately, else 3308 /* notice a disk change immediately, else
3352 * we lose our settings immediately*/ 3309 * we lose our settings immediately*/
3353 CALL(poll_drive(1, FD_RAW_NEED_DISK)); 3310 if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
3311 return -EINTR;
3312 }
3354 oldStretch = g->stretch; 3313 oldStretch = g->stretch;
3355 user_params[drive] = *g; 3314 user_params[drive] = *g;
3356 if (buffer_drive == drive) 3315 if (buffer_drive == drive)
@@ -3415,7 +3374,7 @@ static inline int normalize_ioctl(int *cmd, int *size)
3415 *size = _IOC_SIZE(*cmd); 3374 *size = _IOC_SIZE(*cmd);
3416 *cmd = ioctl_table[i]; 3375 *cmd = ioctl_table[i];
3417 if (*size > _IOC_SIZE(*cmd)) { 3376 if (*size > _IOC_SIZE(*cmd)) {
3418 printk("ioctl not yet supported\n"); 3377 pr_info("ioctl not yet supported\n");
3419 return -EFAULT; 3378 return -EFAULT;
3420 } 3379 }
3421 return 0; 3380 return 0;
@@ -3429,8 +3388,10 @@ static int get_floppy_geometry(int drive, int type, struct floppy_struct **g)
3429 if (type) 3388 if (type)
3430 *g = &floppy_type[type]; 3389 *g = &floppy_type[type];
3431 else { 3390 else {
3432 LOCK_FDC(drive, 0); 3391 if (lock_fdc(drive, false))
3433 CALL(poll_drive(0, 0)); 3392 return -EINTR;
3393 if (poll_drive(false, 0) == -EINTR)
3394 return -EINTR;
3434 process_fd_request(); 3395 process_fd_request();
3435 *g = current_type[drive]; 3396 *g = current_type[drive];
3436 } 3397 }
@@ -3459,10 +3420,6 @@ static int fd_getgeo(struct block_device *bdev, struct hd_geometry *geo)
3459static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, 3420static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
3460 unsigned long param) 3421 unsigned long param)
3461{ 3422{
3462#define FD_IOCTL_ALLOWED (mode & (FMODE_WRITE|FMODE_WRITE_IOCTL))
3463#define OUT(c,x) case c: outparam = (const char *) (x); break
3464#define IN(c,x,tag) case c: *(x) = inparam. tag ; return 0
3465
3466 int drive = (long)bdev->bd_disk->private_data; 3423 int drive = (long)bdev->bd_disk->private_data;
3467 int type = ITYPE(UDRS->fd_device); 3424 int type = ITYPE(UDRS->fd_device);
3468 int i; 3425 int i;
@@ -3474,26 +3431,28 @@ static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
3474 struct floppy_max_errors max_errors; 3431 struct floppy_max_errors max_errors;
3475 struct floppy_drive_params dp; 3432 struct floppy_drive_params dp;
3476 } inparam; /* parameters coming from user space */ 3433 } inparam; /* parameters coming from user space */
3477 const char *outparam; /* parameters passed back to user space */ 3434 const void *outparam; /* parameters passed back to user space */
3478 3435
3479 /* convert compatibility eject ioctls into floppy eject ioctl. 3436 /* convert compatibility eject ioctls into floppy eject ioctl.
3480 * We do this in order to provide a means to eject floppy disks before 3437 * We do this in order to provide a means to eject floppy disks before
3481 * installing the new fdutils package */ 3438 * installing the new fdutils package */
3482 if (cmd == CDROMEJECT || /* CD-ROM eject */ 3439 if (cmd == CDROMEJECT || /* CD-ROM eject */
3483 cmd == 0x6470 /* SunOS floppy eject */ ) { 3440 cmd == 0x6470) { /* SunOS floppy eject */
3484 DPRINT("obsolete eject ioctl\n"); 3441 DPRINT("obsolete eject ioctl\n");
3485 DPRINT("please use floppycontrol --eject\n"); 3442 DPRINT("please use floppycontrol --eject\n");
3486 cmd = FDEJECT; 3443 cmd = FDEJECT;
3487 } 3444 }
3488 3445
3489 /* convert the old style command into a new style command */ 3446 if (!((cmd & 0xff00) == 0x0200))
3490 if ((cmd & 0xff00) == 0x0200) {
3491 ECALL(normalize_ioctl(&cmd, &size));
3492 } else
3493 return -EINVAL; 3447 return -EINVAL;
3494 3448
3449 /* convert the old style command into a new style command */
3450 ret = normalize_ioctl(&cmd, &size);
3451 if (ret)
3452 return ret;
3453
3495 /* permission checks */ 3454 /* permission checks */
3496 if (((cmd & 0x40) && !FD_IOCTL_ALLOWED) || 3455 if (((cmd & 0x40) && !(mode & (FMODE_WRITE | FMODE_WRITE_IOCTL))) ||
3497 ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))) 3456 ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)))
3498 return -EPERM; 3457 return -EPERM;
3499 3458
@@ -3501,129 +3460,142 @@ static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
3501 return -EINVAL; 3460 return -EINVAL;
3502 3461
3503 /* copyin */ 3462 /* copyin */
3504 CLEARSTRUCT(&inparam); 3463 memset(&inparam, 0, sizeof(inparam));
3505 if (_IOC_DIR(cmd) & _IOC_WRITE) 3464 if (_IOC_DIR(cmd) & _IOC_WRITE) {
3506 ECALL(fd_copyin((void __user *)param, &inparam, size)) 3465 ret = fd_copyin((void __user *)param, &inparam, size);
3507 3466 if (ret)
3508 switch (cmd) {
3509 case FDEJECT:
3510 if (UDRS->fd_ref != 1)
3511 /* somebody else has this drive open */
3512 return -EBUSY;
3513 LOCK_FDC(drive, 1);
3514
3515 /* do the actual eject. Fails on
3516 * non-Sparc architectures */
3517 ret = fd_eject(UNIT(drive));
3518
3519 USETF(FD_DISK_CHANGED);
3520 USETF(FD_VERIFY);
3521 process_fd_request();
3522 return ret; 3467 return ret;
3523 case FDCLRPRM: 3468 }
3524 LOCK_FDC(drive, 1);
3525 current_type[drive] = NULL;
3526 floppy_sizes[drive] = MAX_DISK_SIZE << 1;
3527 UDRS->keep_data = 0;
3528 return invalidate_drive(bdev);
3529 case FDSETPRM:
3530 case FDDEFPRM:
3531 return set_geometry(cmd, &inparam.g,
3532 drive, type, bdev);
3533 case FDGETPRM:
3534 ECALL(get_floppy_geometry(drive, type,
3535 (struct floppy_struct **)
3536 &outparam));
3537 break;
3538
3539 case FDMSGON:
3540 UDP->flags |= FTD_MSG;
3541 return 0;
3542 case FDMSGOFF:
3543 UDP->flags &= ~FTD_MSG;
3544 return 0;
3545
3546 case FDFMTBEG:
3547 LOCK_FDC(drive, 1);
3548 CALL(poll_drive(1, FD_RAW_NEED_DISK));
3549 ret = UDRS->flags;
3550 process_fd_request();
3551 if (ret & FD_VERIFY)
3552 return -ENODEV;
3553 if (!(ret & FD_DISK_WRITABLE))
3554 return -EROFS;
3555 return 0;
3556 case FDFMTTRK:
3557 if (UDRS->fd_ref != 1)
3558 return -EBUSY;
3559 return do_format(drive, &inparam.f);
3560 case FDFMTEND:
3561 case FDFLUSH:
3562 LOCK_FDC(drive, 1);
3563 return invalidate_drive(bdev);
3564
3565 case FDSETEMSGTRESH:
3566 UDP->max_errors.reporting =
3567 (unsigned short)(param & 0x0f);
3568 return 0;
3569 OUT(FDGETMAXERRS, &UDP->max_errors);
3570 IN(FDSETMAXERRS, &UDP->max_errors, max_errors);
3571
3572 case FDGETDRVTYP:
3573 outparam = drive_name(type, drive);
3574 SUPBOUND(size, strlen(outparam) + 1);
3575 break;
3576
3577 IN(FDSETDRVPRM, UDP, dp);
3578 OUT(FDGETDRVPRM, UDP);
3579
3580 case FDPOLLDRVSTAT:
3581 LOCK_FDC(drive, 1);
3582 CALL(poll_drive(1, FD_RAW_NEED_DISK));
3583 process_fd_request();
3584 /* fall through */
3585 OUT(FDGETDRVSTAT, UDRS);
3586
3587 case FDRESET:
3588 return user_reset_fdc(drive, (int)param, 1);
3589
3590 OUT(FDGETFDCSTAT, UFDCS);
3591 3469
3592 case FDWERRORCLR: 3470 switch (cmd) {
3593 CLEARSTRUCT(UDRWE); 3471 case FDEJECT:
3594 return 0; 3472 if (UDRS->fd_ref != 1)
3595 OUT(FDWERRORGET, UDRWE); 3473 /* somebody else has this drive open */
3596 3474 return -EBUSY;
3597 case FDRAWCMD: 3475 if (lock_fdc(drive, true))
3598 if (type) 3476 return -EINTR;
3599 return -EINVAL;
3600 LOCK_FDC(drive, 1);
3601 set_floppy(drive);
3602 CALL(i = raw_cmd_ioctl(cmd, (void __user *)param));
3603 process_fd_request();
3604 return i;
3605 3477
3606 case FDTWADDLE: 3478 /* do the actual eject. Fails on
3607 LOCK_FDC(drive, 1); 3479 * non-Sparc architectures */
3608 twaddle(); 3480 ret = fd_eject(UNIT(drive));
3609 process_fd_request();
3610 return 0;
3611 3481
3612 default: 3482 set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
3483 set_bit(FD_VERIFY_BIT, &UDRS->flags);
3484 process_fd_request();
3485 return ret;
3486 case FDCLRPRM:
3487 if (lock_fdc(drive, true))
3488 return -EINTR;
3489 current_type[drive] = NULL;
3490 floppy_sizes[drive] = MAX_DISK_SIZE << 1;
3491 UDRS->keep_data = 0;
3492 return invalidate_drive(bdev);
3493 case FDSETPRM:
3494 case FDDEFPRM:
3495 return set_geometry(cmd, &inparam.g, drive, type, bdev);
3496 case FDGETPRM:
3497 ret = get_floppy_geometry(drive, type,
3498 (struct floppy_struct **)&outparam);
3499 if (ret)
3500 return ret;
3501 break;
3502 case FDMSGON:
3503 UDP->flags |= FTD_MSG;
3504 return 0;
3505 case FDMSGOFF:
3506 UDP->flags &= ~FTD_MSG;
3507 return 0;
3508 case FDFMTBEG:
3509 if (lock_fdc(drive, true))
3510 return -EINTR;
3511 if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
3512 return -EINTR;
3513 ret = UDRS->flags;
3514 process_fd_request();
3515 if (ret & FD_VERIFY)
3516 return -ENODEV;
3517 if (!(ret & FD_DISK_WRITABLE))
3518 return -EROFS;
3519 return 0;
3520 case FDFMTTRK:
3521 if (UDRS->fd_ref != 1)
3522 return -EBUSY;
3523 return do_format(drive, &inparam.f);
3524 case FDFMTEND:
3525 case FDFLUSH:
3526 if (lock_fdc(drive, true))
3527 return -EINTR;
3528 return invalidate_drive(bdev);
3529 case FDSETEMSGTRESH:
3530 UDP->max_errors.reporting = (unsigned short)(param & 0x0f);
3531 return 0;
3532 case FDGETMAXERRS:
3533 outparam = &UDP->max_errors;
3534 break;
3535 case FDSETMAXERRS:
3536 UDP->max_errors = inparam.max_errors;
3537 break;
3538 case FDGETDRVTYP:
3539 outparam = drive_name(type, drive);
3540 SUPBOUND(size, strlen((const char *)outparam) + 1);
3541 break;
3542 case FDSETDRVPRM:
3543 *UDP = inparam.dp;
3544 break;
3545 case FDGETDRVPRM:
3546 outparam = UDP;
3547 break;
3548 case FDPOLLDRVSTAT:
3549 if (lock_fdc(drive, true))
3550 return -EINTR;
3551 if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
3552 return -EINTR;
3553 process_fd_request();
3554 /* fall through */
3555 case FDGETDRVSTAT:
3556 outparam = UDRS;
3557 break;
3558 case FDRESET:
3559 return user_reset_fdc(drive, (int)param, true);
3560 case FDGETFDCSTAT:
3561 outparam = UFDCS;
3562 break;
3563 case FDWERRORCLR:
3564 memset(UDRWE, 0, sizeof(*UDRWE));
3565 return 0;
3566 case FDWERRORGET:
3567 outparam = UDRWE;
3568 break;
3569 case FDRAWCMD:
3570 if (type)
3613 return -EINVAL; 3571 return -EINVAL;
3614 } 3572 if (lock_fdc(drive, true))
3573 return -EINTR;
3574 set_floppy(drive);
3575 i = raw_cmd_ioctl(cmd, (void __user *)param);
3576 if (i == -EINTR)
3577 return -EINTR;
3578 process_fd_request();
3579 return i;
3580 case FDTWADDLE:
3581 if (lock_fdc(drive, true))
3582 return -EINTR;
3583 twaddle();
3584 process_fd_request();
3585 return 0;
3586 default:
3587 return -EINVAL;
3588 }
3615 3589
3616 if (_IOC_DIR(cmd) & _IOC_READ) 3590 if (_IOC_DIR(cmd) & _IOC_READ)
3617 return fd_copyout((void __user *)param, outparam, size); 3591 return fd_copyout((void __user *)param, outparam, size);
3618 else 3592
3619 return 0; 3593 return 0;
3620#undef OUT
3621#undef IN
3622} 3594}
3623 3595
3624static void __init config_types(void) 3596static void __init config_types(void)
3625{ 3597{
3626 int first = 1; 3598 bool has_drive = false;
3627 int drive; 3599 int drive;
3628 3600
3629 /* read drive info out of physical CMOS */ 3601 /* read drive info out of physical CMOS */
@@ -3655,17 +3627,22 @@ static void __init config_types(void)
3655 name = temparea; 3627 name = temparea;
3656 } 3628 }
3657 if (name) { 3629 if (name) {
3658 const char *prepend = ","; 3630 const char *prepend;
3659 if (first) { 3631 if (!has_drive) {
3660 prepend = KERN_INFO "Floppy drive(s):"; 3632 prepend = "";
3661 first = 0; 3633 has_drive = true;
3634 pr_info("Floppy drive(s):");
3635 } else {
3636 prepend = ",";
3662 } 3637 }
3663 printk("%s fd%d is %s", prepend, drive, name); 3638
3639 pr_cont("%s fd%d is %s", prepend, drive, name);
3664 } 3640 }
3665 *UDP = *params; 3641 *UDP = *params;
3666 } 3642 }
3667 if (!first) 3643
3668 printk("\n"); 3644 if (has_drive)
3645 pr_cont("\n");
3669} 3646}
3670 3647
3671static int floppy_release(struct gendisk *disk, fmode_t mode) 3648static int floppy_release(struct gendisk *disk, fmode_t mode)
@@ -3705,8 +3682,8 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
3705 goto out2; 3682 goto out2;
3706 3683
3707 if (!UDRS->fd_ref && (UDP->flags & FD_BROKEN_DCL)) { 3684 if (!UDRS->fd_ref && (UDP->flags & FD_BROKEN_DCL)) {
3708 USETF(FD_DISK_CHANGED); 3685 set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
3709 USETF(FD_VERIFY); 3686 set_bit(FD_VERIFY_BIT, &UDRS->flags);
3710 } 3687 }
3711 3688
3712 if (UDRS->fd_ref == -1 || (UDRS->fd_ref && (mode & FMODE_EXCL))) 3689 if (UDRS->fd_ref == -1 || (UDRS->fd_ref && (mode & FMODE_EXCL)))
@@ -3735,9 +3712,8 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
3735 INFBOUND(try, 16); 3712 INFBOUND(try, 16);
3736 tmp = (char *)fd_dma_mem_alloc(1024 * try); 3713 tmp = (char *)fd_dma_mem_alloc(1024 * try);
3737 } 3714 }
3738 if (!tmp && !floppy_track_buffer) { 3715 if (!tmp && !floppy_track_buffer)
3739 fallback_on_nodma_alloc(&tmp, 2048 * try); 3716 fallback_on_nodma_alloc(&tmp, 2048 * try);
3740 }
3741 if (!tmp && !floppy_track_buffer) { 3717 if (!tmp && !floppy_track_buffer) {
3742 DPRINT("Unable to allocate DMA memory\n"); 3718 DPRINT("Unable to allocate DMA memory\n");
3743 goto out; 3719 goto out;
@@ -3767,11 +3743,12 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
3767 if (mode & (FMODE_READ|FMODE_WRITE)) { 3743 if (mode & (FMODE_READ|FMODE_WRITE)) {
3768 UDRS->last_checked = 0; 3744 UDRS->last_checked = 0;
3769 check_disk_change(bdev); 3745 check_disk_change(bdev);
3770 if (UTESTF(FD_DISK_CHANGED)) 3746 if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags))
3771 goto out; 3747 goto out;
3772 } 3748 }
3773 res = -EROFS; 3749 res = -EROFS;
3774 if ((mode & FMODE_WRITE) && !(UTESTF(FD_DISK_WRITABLE))) 3750 if ((mode & FMODE_WRITE) &&
3751 !test_bit(FD_DISK_WRITABLE_BIT, &UDRS->flags))
3775 goto out; 3752 goto out;
3776 } 3753 }
3777 mutex_unlock(&open_lock); 3754 mutex_unlock(&open_lock);
@@ -3795,17 +3772,18 @@ static int check_floppy_change(struct gendisk *disk)
3795{ 3772{
3796 int drive = (long)disk->private_data; 3773 int drive = (long)disk->private_data;
3797 3774
3798 if (UTESTF(FD_DISK_CHANGED) || UTESTF(FD_VERIFY)) 3775 if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
3776 test_bit(FD_VERIFY_BIT, &UDRS->flags))
3799 return 1; 3777 return 1;
3800 3778
3801 if (time_after(jiffies, UDRS->last_checked + UDP->checkfreq)) { 3779 if (time_after(jiffies, UDRS->last_checked + UDP->checkfreq)) {
3802 lock_fdc(drive, 0); 3780 lock_fdc(drive, false);
3803 poll_drive(0, 0); 3781 poll_drive(false, 0);
3804 process_fd_request(); 3782 process_fd_request();
3805 } 3783 }
3806 3784
3807 if (UTESTF(FD_DISK_CHANGED) || 3785 if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
3808 UTESTF(FD_VERIFY) || 3786 test_bit(FD_VERIFY_BIT, &UDRS->flags) ||
3809 test_bit(drive, &fake_change) || 3787 test_bit(drive, &fake_change) ||
3810 (!ITYPE(UDRS->fd_device) && !current_type[drive])) 3788 (!ITYPE(UDRS->fd_device) && !current_type[drive]))
3811 return 1; 3789 return 1;
@@ -3818,8 +3796,7 @@ static int check_floppy_change(struct gendisk *disk)
3818 * a disk in the drive, and whether that disk is writable. 3796 * a disk in the drive, and whether that disk is writable.
3819 */ 3797 */
3820 3798
3821static void floppy_rb0_complete(struct bio *bio, 3799static void floppy_rb0_complete(struct bio *bio, int err)
3822 int err)
3823{ 3800{
3824 complete((struct completion *)bio->bi_private); 3801 complete((struct completion *)bio->bi_private);
3825} 3802}
@@ -3877,14 +3854,16 @@ static int floppy_revalidate(struct gendisk *disk)
3877 int cf; 3854 int cf;
3878 int res = 0; 3855 int res = 0;
3879 3856
3880 if (UTESTF(FD_DISK_CHANGED) || 3857 if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
3881 UTESTF(FD_VERIFY) || test_bit(drive, &fake_change) || NO_GEOM) { 3858 test_bit(FD_VERIFY_BIT, &UDRS->flags) ||
3859 test_bit(drive, &fake_change) || NO_GEOM) {
3882 if (usage_count == 0) { 3860 if (usage_count == 0) {
3883 printk("VFS: revalidate called on non-open device.\n"); 3861 pr_info("VFS: revalidate called on non-open device.\n");
3884 return -EFAULT; 3862 return -EFAULT;
3885 } 3863 }
3886 lock_fdc(drive, 0); 3864 lock_fdc(drive, false);
3887 cf = UTESTF(FD_DISK_CHANGED) || UTESTF(FD_VERIFY); 3865 cf = (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
3866 test_bit(FD_VERIFY_BIT, &UDRS->flags));
3888 if (!(cf || test_bit(drive, &fake_change) || NO_GEOM)) { 3867 if (!(cf || test_bit(drive, &fake_change) || NO_GEOM)) {
3889 process_fd_request(); /*already done by another thread */ 3868 process_fd_request(); /*already done by another thread */
3890 return 0; 3869 return 0;
@@ -3894,7 +3873,7 @@ static int floppy_revalidate(struct gendisk *disk)
3894 if (buffer_drive == drive) 3873 if (buffer_drive == drive)
3895 buffer_track = -1; 3874 buffer_track = -1;
3896 clear_bit(drive, &fake_change); 3875 clear_bit(drive, &fake_change);
3897 UCLEARF(FD_DISK_CHANGED); 3876 clear_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
3898 if (cf) 3877 if (cf)
3899 UDRS->generation++; 3878 UDRS->generation++;
3900 if (NO_GEOM) { 3879 if (NO_GEOM) {
@@ -3902,7 +3881,7 @@ static int floppy_revalidate(struct gendisk *disk)
3902 res = __floppy_read_block_0(opened_bdev[drive]); 3881 res = __floppy_read_block_0(opened_bdev[drive]);
3903 } else { 3882 } else {
3904 if (cf) 3883 if (cf)
3905 poll_drive(0, FD_RAW_NEED_DISK); 3884 poll_drive(false, FD_RAW_NEED_DISK);
3906 process_fd_request(); 3885 process_fd_request();
3907 } 3886 }
3908 } 3887 }
@@ -3934,21 +3913,21 @@ static char __init get_fdc_version(void)
3934 output_byte(FD_DUMPREGS); /* 82072 and better know DUMPREGS */ 3913 output_byte(FD_DUMPREGS); /* 82072 and better know DUMPREGS */
3935 if (FDCS->reset) 3914 if (FDCS->reset)
3936 return FDC_NONE; 3915 return FDC_NONE;
3937 if ((r = result()) <= 0x00) 3916 r = result();
3917 if (r <= 0x00)
3938 return FDC_NONE; /* No FDC present ??? */ 3918 return FDC_NONE; /* No FDC present ??? */
3939 if ((r == 1) && (reply_buffer[0] == 0x80)) { 3919 if ((r == 1) && (reply_buffer[0] == 0x80)) {
3940 printk(KERN_INFO "FDC %d is an 8272A\n", fdc); 3920 pr_info("FDC %d is an 8272A\n", fdc);
3941 return FDC_8272A; /* 8272a/765 don't know DUMPREGS */ 3921 return FDC_8272A; /* 8272a/765 don't know DUMPREGS */
3942 } 3922 }
3943 if (r != 10) { 3923 if (r != 10) {
3944 printk 3924 pr_info("FDC %d init: DUMPREGS: unexpected return of %d bytes.\n",
3945 ("FDC %d init: DUMPREGS: unexpected return of %d bytes.\n", 3925 fdc, r);
3946 fdc, r);
3947 return FDC_UNKNOWN; 3926 return FDC_UNKNOWN;
3948 } 3927 }
3949 3928
3950 if (!fdc_configure()) { 3929 if (!fdc_configure()) {
3951 printk(KERN_INFO "FDC %d is an 82072\n", fdc); 3930 pr_info("FDC %d is an 82072\n", fdc);
3952 return FDC_82072; /* 82072 doesn't know CONFIGURE */ 3931 return FDC_82072; /* 82072 doesn't know CONFIGURE */
3953 } 3932 }
3954 3933
@@ -3956,52 +3935,50 @@ static char __init get_fdc_version(void)
3956 if (need_more_output() == MORE_OUTPUT) { 3935 if (need_more_output() == MORE_OUTPUT) {
3957 output_byte(0); 3936 output_byte(0);
3958 } else { 3937 } else {
3959 printk(KERN_INFO "FDC %d is an 82072A\n", fdc); 3938 pr_info("FDC %d is an 82072A\n", fdc);
3960 return FDC_82072A; /* 82072A as found on Sparcs. */ 3939 return FDC_82072A; /* 82072A as found on Sparcs. */
3961 } 3940 }
3962 3941
3963 output_byte(FD_UNLOCK); 3942 output_byte(FD_UNLOCK);
3964 r = result(); 3943 r = result();
3965 if ((r == 1) && (reply_buffer[0] == 0x80)) { 3944 if ((r == 1) && (reply_buffer[0] == 0x80)) {
3966 printk(KERN_INFO "FDC %d is a pre-1991 82077\n", fdc); 3945 pr_info("FDC %d is a pre-1991 82077\n", fdc);
3967 return FDC_82077_ORIG; /* Pre-1991 82077, doesn't know 3946 return FDC_82077_ORIG; /* Pre-1991 82077, doesn't know
3968 * LOCK/UNLOCK */ 3947 * LOCK/UNLOCK */
3969 } 3948 }
3970 if ((r != 1) || (reply_buffer[0] != 0x00)) { 3949 if ((r != 1) || (reply_buffer[0] != 0x00)) {
3971 printk("FDC %d init: UNLOCK: unexpected return of %d bytes.\n", 3950 pr_info("FDC %d init: UNLOCK: unexpected return of %d bytes.\n",
3972 fdc, r); 3951 fdc, r);
3973 return FDC_UNKNOWN; 3952 return FDC_UNKNOWN;
3974 } 3953 }
3975 output_byte(FD_PARTID); 3954 output_byte(FD_PARTID);
3976 r = result(); 3955 r = result();
3977 if (r != 1) { 3956 if (r != 1) {
3978 printk("FDC %d init: PARTID: unexpected return of %d bytes.\n", 3957 pr_info("FDC %d init: PARTID: unexpected return of %d bytes.\n",
3979 fdc, r); 3958 fdc, r);
3980 return FDC_UNKNOWN; 3959 return FDC_UNKNOWN;
3981 } 3960 }
3982 if (reply_buffer[0] == 0x80) { 3961 if (reply_buffer[0] == 0x80) {
3983 printk(KERN_INFO "FDC %d is a post-1991 82077\n", fdc); 3962 pr_info("FDC %d is a post-1991 82077\n", fdc);
3984 return FDC_82077; /* Revised 82077AA passes all the tests */ 3963 return FDC_82077; /* Revised 82077AA passes all the tests */
3985 } 3964 }
3986 switch (reply_buffer[0] >> 5) { 3965 switch (reply_buffer[0] >> 5) {
3987 case 0x0: 3966 case 0x0:
3988 /* Either a 82078-1 or a 82078SL running at 5Volt */ 3967 /* Either a 82078-1 or a 82078SL running at 5Volt */
3989 printk(KERN_INFO "FDC %d is an 82078.\n", fdc); 3968 pr_info("FDC %d is an 82078.\n", fdc);
3990 return FDC_82078; 3969 return FDC_82078;
3991 case 0x1: 3970 case 0x1:
3992 printk(KERN_INFO "FDC %d is a 44pin 82078\n", fdc); 3971 pr_info("FDC %d is a 44pin 82078\n", fdc);
3993 return FDC_82078; 3972 return FDC_82078;
3994 case 0x2: 3973 case 0x2:
3995 printk(KERN_INFO "FDC %d is a S82078B\n", fdc); 3974 pr_info("FDC %d is a S82078B\n", fdc);
3996 return FDC_S82078B; 3975 return FDC_S82078B;
3997 case 0x3: 3976 case 0x3:
3998 printk(KERN_INFO "FDC %d is a National Semiconductor PC87306\n", 3977 pr_info("FDC %d is a National Semiconductor PC87306\n", fdc);
3999 fdc);
4000 return FDC_87306; 3978 return FDC_87306;
4001 default: 3979 default:
4002 printk(KERN_INFO 3980 pr_info("FDC %d init: 82078 variant with unknown PARTID=%d.\n",
4003 "FDC %d init: 82078 variant with unknown PARTID=%d.\n", 3981 fdc, reply_buffer[0] >> 5);
4004 fdc, reply_buffer[0] >> 5);
4005 return FDC_82078_UNKN; 3982 return FDC_82078_UNKN;
4006 } 3983 }
4007} /* get_fdc_version */ 3984} /* get_fdc_version */
@@ -4113,9 +4090,9 @@ static int __init floppy_setup(char *str)
4113 else 4090 else
4114 param = config_params[i].def_param; 4091 param = config_params[i].def_param;
4115 if (config_params[i].fn) 4092 if (config_params[i].fn)
4116 config_params[i]. 4093 config_params[i].fn(ints, param,
4117 fn(ints, param, 4094 config_params[i].
4118 config_params[i].param2); 4095 param2);
4119 if (config_params[i].var) { 4096 if (config_params[i].var) {
4120 DPRINT("%s=%d\n", str, param); 4097 DPRINT("%s=%d\n", str, param);
4121 *config_params[i].var = param; 4098 *config_params[i].var = param;
@@ -4129,8 +4106,8 @@ static int __init floppy_setup(char *str)
4129 4106
4130 DPRINT("allowed options are:"); 4107 DPRINT("allowed options are:");
4131 for (i = 0; i < ARRAY_SIZE(config_params); i++) 4108 for (i = 0; i < ARRAY_SIZE(config_params); i++)
4132 printk(" %s", config_params[i].name); 4109 pr_cont(" %s", config_params[i].name);
4133 printk("\n"); 4110 pr_cont("\n");
4134 } else 4111 } else
4135 DPRINT("botched floppy option\n"); 4112 DPRINT("botched floppy option\n");
4136 DPRINT("Read Documentation/blockdev/floppy.txt\n"); 4113 DPRINT("Read Documentation/blockdev/floppy.txt\n");
@@ -4148,7 +4125,8 @@ static ssize_t floppy_cmos_show(struct device *dev,
4148 drive = p->id; 4125 drive = p->id;
4149 return sprintf(buf, "%X\n", UDP->cmos); 4126 return sprintf(buf, "%X\n", UDP->cmos);
4150} 4127}
4151DEVICE_ATTR(cmos,S_IRUGO,floppy_cmos_show,NULL); 4128
4129DEVICE_ATTR(cmos, S_IRUGO, floppy_cmos_show, NULL);
4152 4130
4153static void floppy_device_release(struct device *dev) 4131static void floppy_device_release(struct device *dev)
4154{ 4132{
@@ -4160,7 +4138,7 @@ static int floppy_resume(struct device *dev)
4160 4138
4161 for (fdc = 0; fdc < N_FDC; fdc++) 4139 for (fdc = 0; fdc < N_FDC; fdc++)
4162 if (FDCS->address != -1) 4140 if (FDCS->address != -1)
4163 user_reset_fdc(-1, FD_RESET_ALWAYS, 0); 4141 user_reset_fdc(-1, FD_RESET_ALWAYS, false);
4164 4142
4165 return 0; 4143 return 0;
4166} 4144}
@@ -4172,8 +4150,8 @@ static const struct dev_pm_ops floppy_pm_ops = {
4172 4150
4173static struct platform_driver floppy_driver = { 4151static struct platform_driver floppy_driver = {
4174 .driver = { 4152 .driver = {
4175 .name = "floppy", 4153 .name = "floppy",
4176 .pm = &floppy_pm_ops, 4154 .pm = &floppy_pm_ops,
4177 }, 4155 },
4178}; 4156};
4179 4157
@@ -4245,16 +4223,16 @@ static int __init floppy_init(void)
4245 else 4223 else
4246 floppy_sizes[i] = MAX_DISK_SIZE << 1; 4224 floppy_sizes[i] = MAX_DISK_SIZE << 1;
4247 4225
4248 reschedule_timeout(MAXTIMEOUT, "floppy init", MAXTIMEOUT); 4226 reschedule_timeout(MAXTIMEOUT, "floppy init");
4249 config_types(); 4227 config_types();
4250 4228
4251 for (i = 0; i < N_FDC; i++) { 4229 for (i = 0; i < N_FDC; i++) {
4252 fdc = i; 4230 fdc = i;
4253 CLEARSTRUCT(FDCS); 4231 memset(FDCS, 0, sizeof(*FDCS));
4254 FDCS->dtr = -1; 4232 FDCS->dtr = -1;
4255 FDCS->dor = 0x4; 4233 FDCS->dor = 0x4;
4256#if defined(__sparc__) || defined(__mc68000__) 4234#if defined(__sparc__) || defined(__mc68000__)
4257 /*sparcs/sun3x don't have a DOR reset which we can fall back on to */ 4235 /*sparcs/sun3x don't have a DOR reset which we can fall back on to */
4258#ifdef __mc68000__ 4236#ifdef __mc68000__
4259 if (MACH_IS_SUN3X) 4237 if (MACH_IS_SUN3X)
4260#endif 4238#endif
@@ -4283,11 +4261,11 @@ static int __init floppy_init(void)
4283 4261
4284 /* initialise drive state */ 4262 /* initialise drive state */
4285 for (drive = 0; drive < N_DRIVE; drive++) { 4263 for (drive = 0; drive < N_DRIVE; drive++) {
4286 CLEARSTRUCT(UDRS); 4264 memset(UDRS, 0, sizeof(*UDRS));
4287 CLEARSTRUCT(UDRWE); 4265 memset(UDRWE, 0, sizeof(*UDRWE));
4288 USETF(FD_DISK_NEWCHANGE); 4266 set_bit(FD_DISK_NEWCHANGE_BIT, &UDRS->flags);
4289 USETF(FD_DISK_CHANGED); 4267 set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
4290 USETF(FD_VERIFY); 4268 set_bit(FD_VERIFY_BIT, &UDRS->flags);
4291 UDRS->fd_device = -1; 4269 UDRS->fd_device = -1;
4292 floppy_track_buffer = NULL; 4270 floppy_track_buffer = NULL;
4293 max_buffer_sectors = 0; 4271 max_buffer_sectors = 0;
@@ -4307,7 +4285,7 @@ static int __init floppy_init(void)
4307 if (FDCS->address == -1) 4285 if (FDCS->address == -1)
4308 continue; 4286 continue;
4309 FDCS->rawcmd = 2; 4287 FDCS->rawcmd = 2;
4310 if (user_reset_fdc(-1, FD_RESET_ALWAYS, 0)) { 4288 if (user_reset_fdc(-1, FD_RESET_ALWAYS, false)) {
4311 /* free ioports reserved by floppy_grab_irq_and_dma() */ 4289 /* free ioports reserved by floppy_grab_irq_and_dma() */
4312 floppy_release_regions(fdc); 4290 floppy_release_regions(fdc);
4313 FDCS->address = -1; 4291 FDCS->address = -1;
@@ -4330,12 +4308,12 @@ static int __init floppy_init(void)
4330 * properly, so force a reset for the standard FDC clones, 4308 * properly, so force a reset for the standard FDC clones,
4331 * to avoid interrupt garbage. 4309 * to avoid interrupt garbage.
4332 */ 4310 */
4333 user_reset_fdc(-1, FD_RESET_ALWAYS, 0); 4311 user_reset_fdc(-1, FD_RESET_ALWAYS, false);
4334 } 4312 }
4335 fdc = 0; 4313 fdc = 0;
4336 del_timer(&fd_timeout); 4314 del_timer(&fd_timeout);
4337 current_drive = 0; 4315 current_drive = 0;
4338 initialising = 0; 4316 initialized = true;
4339 if (have_no_fdc) { 4317 if (have_no_fdc) {
4340 DPRINT("no floppy controllers found\n"); 4318 DPRINT("no floppy controllers found\n");
4341 err = have_no_fdc; 4319 err = have_no_fdc;
@@ -4356,7 +4334,8 @@ static int __init floppy_init(void)
4356 if (err) 4334 if (err)
4357 goto out_flush_work; 4335 goto out_flush_work;
4358 4336
4359 err = device_create_file(&floppy_device[drive].dev,&dev_attr_cmos); 4337 err = device_create_file(&floppy_device[drive].dev,
4338 &dev_attr_cmos);
4360 if (err) 4339 if (err)
4361 goto out_unreg_platform_dev; 4340 goto out_unreg_platform_dev;
4362 4341
@@ -4420,8 +4399,10 @@ static int floppy_request_regions(int fdc)
4420 const struct io_region *p; 4399 const struct io_region *p;
4421 4400
4422 for (p = io_regions; p < ARRAY_END(io_regions); p++) { 4401 for (p = io_regions; p < ARRAY_END(io_regions); p++) {
4423 if (!request_region(FDCS->address + p->offset, p->size, "floppy")) { 4402 if (!request_region(FDCS->address + p->offset,
4424 DPRINT("Floppy io-port 0x%04lx in use\n", FDCS->address + p->offset); 4403 p->size, "floppy")) {
4404 DPRINT("Floppy io-port 0x%04lx in use\n",
4405 FDCS->address + p->offset);
4425 floppy_release_allocated_regions(fdc, p); 4406 floppy_release_allocated_regions(fdc, p);
4426 return -EBUSY; 4407 return -EBUSY;
4427 } 4408 }
@@ -4512,11 +4493,9 @@ cleanup:
4512static void floppy_release_irq_and_dma(void) 4493static void floppy_release_irq_and_dma(void)
4513{ 4494{
4514 int old_fdc; 4495 int old_fdc;
4515#ifdef FLOPPY_SANITY_CHECK
4516#ifndef __sparc__ 4496#ifndef __sparc__
4517 int drive; 4497 int drive;
4518#endif 4498#endif
4519#endif
4520 long tmpsize; 4499 long tmpsize;
4521 unsigned long tmpaddr; 4500 unsigned long tmpaddr;
4522 unsigned long flags; 4501 unsigned long flags;
@@ -4547,20 +4526,18 @@ static void floppy_release_irq_and_dma(void)
4547 buffer_min = buffer_max = -1; 4526 buffer_min = buffer_max = -1;
4548 fd_dma_mem_free(tmpaddr, tmpsize); 4527 fd_dma_mem_free(tmpaddr, tmpsize);
4549 } 4528 }
4550#ifdef FLOPPY_SANITY_CHECK
4551#ifndef __sparc__ 4529#ifndef __sparc__
4552 for (drive = 0; drive < N_FDC * 4; drive++) 4530 for (drive = 0; drive < N_FDC * 4; drive++)
4553 if (timer_pending(motor_off_timer + drive)) 4531 if (timer_pending(motor_off_timer + drive))
4554 printk("motor off timer %d still active\n", drive); 4532 pr_info("motor off timer %d still active\n", drive);
4555#endif 4533#endif
4556 4534
4557 if (timer_pending(&fd_timeout)) 4535 if (timer_pending(&fd_timeout))
4558 printk("floppy timer still active:%s\n", timeout_message); 4536 pr_info("floppy timer still active:%s\n", timeout_message);
4559 if (timer_pending(&fd_timer)) 4537 if (timer_pending(&fd_timer))
4560 printk("auxiliary floppy timer still active\n"); 4538 pr_info("auxiliary floppy timer still active\n");
4561 if (work_pending(&floppy_work)) 4539 if (work_pending(&floppy_work))
4562 printk("work still pending\n"); 4540 pr_info("work still pending\n");
4563#endif
4564 old_fdc = fdc; 4541 old_fdc = fdc;
4565 for (fdc = 0; fdc < N_FDC; fdc++) 4542 for (fdc = 0; fdc < N_FDC; fdc++)
4566 if (FDCS->address != -1) 4543 if (FDCS->address != -1)
@@ -4577,7 +4554,9 @@ static void __init parse_floppy_cfg_string(char *cfg)
4577 char *ptr; 4554 char *ptr;
4578 4555
4579 while (*cfg) { 4556 while (*cfg) {
4580 for (ptr = cfg; *cfg && *cfg != ' ' && *cfg != '\t'; cfg++) ; 4557 ptr = cfg;
4558 while (*cfg && *cfg != ' ' && *cfg != '\t')
4559 cfg++;
4581 if (*cfg) { 4560 if (*cfg) {
4582 *cfg = '\0'; 4561 *cfg = '\0';
4583 cfg++; 4562 cfg++;
@@ -4625,6 +4604,7 @@ static void __exit floppy_module_exit(void)
4625 /* eject disk, if any */ 4604 /* eject disk, if any */
4626 fd_eject(0); 4605 fd_eject(0);
4627} 4606}
4607
4628module_exit(floppy_module_exit); 4608module_exit(floppy_module_exit);
4629 4609
4630module_param(floppy, charp, 0); 4610module_param(floppy, charp, 0);
@@ -4636,9 +4616,10 @@ MODULE_LICENSE("GPL");
4636 4616
4637/* This doesn't actually get used other than for module information */ 4617/* This doesn't actually get used other than for module information */
4638static const struct pnp_device_id floppy_pnpids[] = { 4618static const struct pnp_device_id floppy_pnpids[] = {
4639 { "PNP0700", 0 }, 4619 {"PNP0700", 0},
4640 { } 4620 {}
4641}; 4621};
4622
4642MODULE_DEVICE_TABLE(pnp, floppy_pnpids); 4623MODULE_DEVICE_TABLE(pnp, floppy_pnpids);
4643 4624
4644#else 4625#else
diff --git a/drivers/block/osdblk.c b/drivers/block/osdblk.c
index a808b1530b3b..eb2091aa1c19 100644
--- a/drivers/block/osdblk.c
+++ b/drivers/block/osdblk.c
@@ -476,7 +476,9 @@ static void class_osdblk_release(struct class *cls)
476 kfree(cls); 476 kfree(cls);
477} 477}
478 478
479static ssize_t class_osdblk_list(struct class *c, char *data) 479static ssize_t class_osdblk_list(struct class *c,
480 struct class_attribute *attr,
481 char *data)
480{ 482{
481 int n = 0; 483 int n = 0;
482 struct list_head *tmp; 484 struct list_head *tmp;
@@ -500,7 +502,9 @@ static ssize_t class_osdblk_list(struct class *c, char *data)
500 return n; 502 return n;
501} 503}
502 504
503static ssize_t class_osdblk_add(struct class *c, const char *buf, size_t count) 505static ssize_t class_osdblk_add(struct class *c,
506 struct class_attribute *attr,
507 const char *buf, size_t count)
504{ 508{
505 struct osdblk_device *osdev; 509 struct osdblk_device *osdev;
506 ssize_t rc; 510 ssize_t rc;
@@ -592,7 +596,9 @@ err_out_mod:
592 return rc; 596 return rc;
593} 597}
594 598
595static ssize_t class_osdblk_remove(struct class *c, const char *buf, 599static ssize_t class_osdblk_remove(struct class *c,
600 struct class_attribute *attr,
601 const char *buf,
596 size_t count) 602 size_t count)
597{ 603{
598 struct osdblk_device *osdev = NULL; 604 struct osdblk_device *osdev = NULL;
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c
index b72935b8f203..39c8514442eb 100644
--- a/drivers/block/pktcdvd.c
+++ b/drivers/block/pktcdvd.c
@@ -284,7 +284,7 @@ static ssize_t kobj_pkt_store(struct kobject *kobj,
284 return len; 284 return len;
285} 285}
286 286
287static struct sysfs_ops kobj_pkt_ops = { 287static const struct sysfs_ops kobj_pkt_ops = {
288 .show = kobj_pkt_show, 288 .show = kobj_pkt_show,
289 .store = kobj_pkt_store 289 .store = kobj_pkt_store
290}; 290};
@@ -337,7 +337,9 @@ static void class_pktcdvd_release(struct class *cls)
337{ 337{
338 kfree(cls); 338 kfree(cls);
339} 339}
340static ssize_t class_pktcdvd_show_map(struct class *c, char *data) 340static ssize_t class_pktcdvd_show_map(struct class *c,
341 struct class_attribute *attr,
342 char *data)
341{ 343{
342 int n = 0; 344 int n = 0;
343 int idx; 345 int idx;
@@ -356,7 +358,9 @@ static ssize_t class_pktcdvd_show_map(struct class *c, char *data)
356 return n; 358 return n;
357} 359}
358 360
359static ssize_t class_pktcdvd_store_add(struct class *c, const char *buf, 361static ssize_t class_pktcdvd_store_add(struct class *c,
362 struct class_attribute *attr,
363 const char *buf,
360 size_t count) 364 size_t count)
361{ 365{
362 unsigned int major, minor; 366 unsigned int major, minor;
@@ -376,7 +380,9 @@ static ssize_t class_pktcdvd_store_add(struct class *c, const char *buf,
376 return -EINVAL; 380 return -EINVAL;
377} 381}
378 382
379static ssize_t class_pktcdvd_store_remove(struct class *c, const char *buf, 383static ssize_t class_pktcdvd_store_remove(struct class *c,
384 struct class_attribute *attr,
385 const char *buf,
380 size_t count) 386 size_t count)
381{ 387{
382 unsigned int major, minor; 388 unsigned int major, minor;
diff --git a/drivers/char/ChangeLog b/drivers/char/ChangeLog
deleted file mode 100644
index 56b8a2e76ab1..000000000000
--- a/drivers/char/ChangeLog
+++ /dev/null
@@ -1,775 +0,0 @@
12001-08-11 Tim Waugh <twaugh@redhat.com>
2
3 * serial.c (get_pci_port): Deal with awkward Titan cards.
4
51998-08-26 Theodore Ts'o <tytso@rsts-11.mit.edu>
6
7 * serial.c (rs_open): Correctly decrement the module in-use count
8 on errors.
9
10Thu Feb 19 14:24:08 1998 Theodore Ts'o <tytso@rsts-11.mit.edu>
11
12 * tty_io.c (tty_name): Remove the non-reentrant (and non-SMP safe)
13 version of tty_name, and rename the reentrant _tty_name
14 function to be tty_name.
15 (tty_open): Add a warning message stating callout devices
16 are deprecated.
17
18Mon Dec 1 08:24:15 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
19
20 * tty_io.c (tty_get_baud_rate): Print a warning syslog if the
21 tty->alt_speed kludge is used; this means the system is
22 using the deprecated SPD_HI ioctls.
23
24Mon Nov 24 10:37:49 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
25
26 * serial.c, esp.c, rocket.c: Change drivers to take advantage of
27 tty_get_baud_rate().
28
29 * tty_io.c (tty_get_baud_rate): New function which computes the
30 correct baud rate for the tty. More factoring out of
31 common code out of the serial driver to the high-level tty
32 functions....
33
34Sat Nov 22 07:53:36 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
35
36 * serial.c, esp.c, rocket.c: Add tty->driver.break() routine, and
37 allow high-level tty code to handle the break and soft
38 carrier ioctls.
39
40 * tty_ioctl.c (n_tty_ioctl): Support TIOCGSOFTCAR and
41 TIOCSSOFTCAR, so that device drivers don't have to support
42 it.
43
44 * serial.c (autoconfig): Change 16750 test to hopefully eliminate
45 false results by people with strange 16550As being
46 detected as 16750s. Hopefully 16750s will still be
47 detected as 16750, and other weird UARTs won't get poorly
48 autodetected. If this doesn't work, I'll have to disable
49 the auto identification for the 16750.
50
51 * tty_io.c (tty_hangup): Now actually do the tty hangup
52 processing during the timer processing, and disable
53 interrupts while doing the hangup processing. This avoids
54 several nasty race conditions which happened when the
55 hangup processing was done asynchronously.
56 (tty_ioctl): Do break handling in the tty driver if
57 driver's break function is supported.
58 (tty_flip_buffer_push): New exported function which should
59 be used by drivers to push characters in the flip buffer
60 to the tty handler. This may either be done using a task
61 queue function for better CPU efficiency, or directly for
62 low latency operation.
63
64 * serial.c (rs_set_termios): Fix bug rs_set_termios when
65 transitioning away from B0, submitted by Stanislav
66 Voronyi.
67
68Thu Jun 19 20:05:58 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
69
70 * serial.c (begin_break, end_break, rs_ioctl): Applied patch
71 to support BSD ioctls to set and clear the break
72 condition explicitly.
73
74 * console.c (scrup, scrdown, insert_line, delete_line): Applied
75 fix suggested by Aaron Tiensivu to speed up block scrolls
76 up and down.
77
78 * n_tty.c (opost_block, write_chan): Added a modified "fast
79 console" patch which processes a block of text via
80 "cooking" efficiently.
81
82Wed Jun 18 15:25:50 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
83
84 * tty_io.c (init_dev, release_dev): Applied fix suggested by Bill
85 Hawes to prevent race conditions in the tty code.
86
87 * n_tty.c (n_tty_chars_in_buffer): Applied fix suggested by Bill
88 Hawes so that n_tty_chars_in_buffer returns the correct
89 value in the case when the tty is in cannonical mode. (To
90 avoid a pty deadlock with telnetd.)
91
92Thu Feb 27 01:53:08 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
93
94 * serial.c (change_speed): Add support for the termios flag
95 CMSPAR, which allows the user to select stick parity.
96 (i.e, if PARODD is set, the parity bit is always 1; if
97 PARRODD is not set, then the parity bit is always 0).
98
99Wed Feb 26 19:03:10 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
100
101 * serial.c (cleanup_module): Fix memory leak when using the serial
102 driver as a module; make sure tmp_buf gets freed!
103
104Tue Feb 25 11:01:59 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
105
106 * serial.c (set_modem_info): Add support for setting and clearing
107 the OUT1 and OUT2 bits. (For special case UART's, usually
108 for half-duplex.)
109 (autoconfig, change_speed): Fix TI 16750 support.
110
111Sun Feb 16 00:14:43 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
112
113 * tty_io.c (release_dev): Add sanity check to make sure there are
114 no waiters on tty->read_wait or tty->write_wait.
115
116 * serial.c (rs_init): Don't autoconfig a device if the I/O region
117 is already reserved.
118
119 * serial.c (serial_proc_info): Add support for /proc/serial.
120
121Thu Feb 13 00:49:10 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
122
123 * serial.c (receive_chars): When the UART repotrs an overrun
124 condition, it does so with a valid character. Changed to
125 not throw away the valid character, but instead report the
126 overrun after the valid character.
127
128 * serial.c: Added new #ifdef's for some of the advanced serial
129 driver features. A minimal driver that only supports COM
130 1/2/3/4 without sharing serial interrupts only takes 17k;
131 the full driver takes 32k.
132
133Wed Feb 12 14:50:44 1997 Theodore Ts'o <tytso@rsts-11.mit.edu>
134
135 * vt.c:
136 * pty.c:
137 * tty_ioctl.c:
138 * serial.c: Update routines to use the new 2.1 memory access
139 routines.
140
141Wed Dec 4 07:51:52 1996 Theodore Ts'o <tytso@localhost.mit.edu>
142
143 * serial.c (change_speed): Use save_flags(); cli() and
144 restore_flags() in order to ensure we don't accidentally
145 turn on interrupts when starting up the port.
146 (startup): Move the insertion of serial structure into the
147 IRQ chain earlier into the startup processing. Interrupts
148 should be off this whole time, but we eventually will want
149 to reduce this window.
150
151Thu Nov 21 10:05:22 1996 Theodore Ts'o <tytso@localhost.mit.edu>
152
153 * tty_ioctl.c (tty_wait_until_sent): Always check the driver
154 wait_until_ready routine, even if there are no characters
155 in the xmit buffer. (There may be charactes in the device
156 FIFO.)
157 (n_tty_ioctl): Add new flag tty->flow_stopped which
158 indicates whether the tty is stopped due to a request by
159 the TCXONC ioctl (used by tcflow). If so, don't let an
160 incoming XOFF character restart the tty. The tty can only
161 be restarted by another TCXONC request.
162
163 * tty_io.c (start_tty): Don't allow the tty to be restarted if
164 tty->flow_stopped is true.
165
166 * n_tty.c (n_tty_receive_char): If tty->flow_stopped is true, and
167 IXANY is set, don't eat a character trying to restart the
168 tty.
169
170 * serial.c (startup): Remove need for MCR_noint from the
171 async_struct structure. Only turn on DTR and RTS if the
172 baud rate is not zero.
173 (change_speed): More accurately calculate the timeout
174 value based on the word size. Move responsibility of
175 hangup when speed becomes B0 to rs_set_termios()
176 (set_serial_info): When changing the UART type set the
177 current xmit_fifo_size as well as the permanent
178 xmit_fifo_size.
179 (rs_ioctl): Fix TCSBRK (used by tcdrain) and TCSBRKP
180 ioctls to return EINTR if interrupted by a signal.
181 (rs_set_termios): If the baud rate changes to or from B0,
182 this function is now responsible for setting or clearing
183 DTR and RTS. DTR and RTS are only be changed on the
184 transition to or from the B0 state.
185 (rs_close): Wait for the characters to drain based on
186 info->timeout. At low baud rates (50 bps), it may take a
187 long time for the FIFO to completely drain out!
188 (rs_wait_until_sent): Fixed timeout handling. Now
189 releases control to the scheduler, but checks frequently
190 enough so that the function is sensitive enough to pass
191 the timing requirements of the NIST-PCTS.
192 (block_til_ready): When opening the device, don't turn on
193 DTR and RTS if the baud rate is B0.
194
195Thu Nov 14 00:06:09 1996 Theodore Ts'o <tytso@rsts-11.mit.edu>
196
197 * serial.c (autoconfig): Fix autoconfiguration problems;
198 info->flags wasn't getting initialized from the state
199 structure. Put in more paranoid test for the 16750.
200
201Fri Nov 8 20:19:50 1996 Theodore Ts'o <tytso@rsts-11.mit.edu>
202
203 * n_tty.c (n_tty_flush_buffer): Only call driver->unthrottle() if
204 the tty was previous throttled.
205 (n_tty_set_termios, write_chan): Add changes suggested by
206 Simon P. Allen to allow hardware cooking.
207
208 * tty_ioctl.c (set_termios): If we get a signal while waiting for
209 the tty to drain, return -EINTR.
210
211 * serial.c (change_speed): Add support for CREAD, as required by
212 POSIX.
213
214Sat Nov 2 20:43:10 1996 Theodore Ts'o <tytso@rsts-11.mit.edu>
215
216 * serial.c: Wholesale changes. Added support for the Startech
217 16650 and 16650V2 chips. (WARNING: the new startech
218 16650A may or may not work!) Added support for the
219 TI16750 (not yet tested). Split async_struct into a
220 transient part (async_struct) and a permanent part
221 (serial_state) which contains the configuration
222 information for the ports. Added new driver routines
223 wait_until_sent() and send_xchar() to help with POSIX
224 compliance. Added support for radio clocks which waggle
225 the carrier detect line (CONFIG_HARD_PPS).
226
227 * tty_ioctl.c (tty_wait_until_sent): Added call to new driver
228 function tty->driver.wait_until_sent(), which returns when
229 the tty's device xmit buffers are drained. Needed for
230 full POSIX compliance.
231
232 (send_prio_char): New function, called by the ioctl's
233 TCIOFF and TCION; uses the new driver call send_xchar(),
234 which will send the XON or XOFF character at high priority
235 (and even if tty output is stopped).
236
237Wed Jun 5 18:52:04 1996 Theodore Ts'o <tytso@rsts-11.mit.edu>
238
239 * pty.c (pty_close): When closing a pty, make sure packet mode is
240 cleared.
241
242Sun May 26 09:33:52 1996 Theodore Ts'o <tytso@rsts-11.mit.edu>
243
244 * vesa_blank.c (set_vesa_blanking): Add missing verify_area() call.
245
246 * selection.c (set_selection): Add missing verify_area() call.
247
248 * tty_io.c (tty_ioctl): Add missing verify_area() calls.
249
250 * serial.c (rs_ioctl): Add missing verify_area() calls.
251 (rs_init): Allow initialization of serial driver
252 configuration from a module.
253
254 * random.c (extract_entropy): Add missing verify_area call.
255 Don't limit number of characters returned to
256 32,768. Extract entropy is now no longer a inlined
257 function.
258
259 (random_read): Check return value in case extract_entropy
260 returns an error.
261
262 (secure_tcp_sequence_number): New function which returns a
263 secure TCP sequence number. This is needed to prevent some
264 nasty TCP hijacking attacks.
265
266 (init_std_data): Initialize using gettimeofday() instead of
267 struct timeval xtime.
268
269 (fast_add_entropy_word, add_entropy_word): Rename the
270 inline function add_entropy_word() to
271 fast_add_entropy_word(). Make add_entropy_word() be the
272 non-inlined function which is used in non-timing critical
273 places, in order to save space.
274
275 (initialize_benchmark, begin_benchmark, end_benchmark): New
276 functions defined when RANDOM_BENCHMARK is defined. They
277 allow us to benchmark the speed of the
278 add_timer_randomness() call.
279
280 (int_ln, rotate_left): Add two new inline functions with
281 i386 optimized asm instructions. This speeds up the
282 critical add_entropy_word() and add_timer_randomness()
283 functions, which are called from interrupt handlers.
284
285Tue May 7 22:51:11 1996 <tytso@rsts-11.mit.edu>
286
287 * random.c (add_timer_randomness): Limit the amount randomness
288 that we estimate to 12 bits. (An arbitrary amount).
289
290 (extract_entropy): To make it harder to analyze the hash
291 function, fold the hash function in half using XOR, and
292 use the folded result as the value to emit to the user.
293 Also, add timer randomness each pass through the
294 exact_entropy call, to increase the amount of unknown
295 values during the extraction process.
296
297 (random_ioctl): Use IOR/IOW definitions to define the
298 ioctl values used by the /dev/random driver. Allow the
299 old ioctl values to be used for backwards compatibility
300 (for a limited amount of time).
301
302Wed Apr 24 14:02:04 1996 Theodore Ts'o <tytso@rsts-11.mit.edu>
303
304 * random.c (add_timer_randomness): Use 2nd derivative as well to
305 better estimate entropy.
306
307 (rand_initialize): Explicitly initialize all the pointers
308 to NULL. (Clearing pointers using memset isn't portable.)
309 Initialize the random pool with OS-dependent data.
310
311 (random_write): Add sanity checking to the arguments to
312 random_write(), so that bad arguments won't cause a kernel
313 SEGV.
314
315 (random_read): Update the access time of the device inode
316 when you return data to the user.
317
318 (random_ioctl): Wake up the random_wait channel when there
319 are only WAIT_INPUT_BITS available. Add more paranoia
320 checks to make sure entropy_count doesn't go beyond the
321 bounds of (0, POOLSIZE). Add a few missing verify_area
322 checks. Add support for the RNDCLEARPOOL ioctl, which
323 zaps the random pool.
324
325 (add_timer_randomness): Wake up the random_wait
326 channel only when there are WAIT_INPUT_BITS available.
327
328 (random_select): Allow a random refresh daemon process to
329 select on /dev/random for writing; wake up the daemon when
330 there are less than WAIT_OUTPUT_BITS bits of randomness
331 available.
332
333Tue Apr 23 22:56:07 1996 <tytso@rsts-11.mit.edu>
334
335 * tty_io.c (init_dev): Change return code when user attempts to
336 open master pty which is already open from EAGAIN to EIO,
337 to match with BSD expectations. EIO is more correct
338 anyway, since EAGAIN implies that retrying will be
339 successful --- which it might be.... Eventually!!
340
341 * pty.c (pty_open, pty_close): Fix wait loop so that we don't
342 busy loop while waiting for the master side to open.
343 Fix tty opening/closing logic. TTY_SLAVE_CLOSED was
344 renamed to TTY_OTHER_CLOSED, so that the name is more
345 descriptive. Also fixed code so that the tty flag
346 actually works correctly now....
347
348Mon Apr 1 10:22:01 1996 <tytso@rsts-11.mit.edu>
349
350 * serial.c (rs_close): Cleaned up modularization changes.
351 Remove code which forced line discipline back to N_TTY
352 this is done in the tty upper layers, and there's no
353 reason to do it here. (Making this change also
354 removed the requirement that the serial module access
355 the internal kernel symbol "ldiscs".)
356
357 * tty_io.c (tty_init): Formally register a tty_driver entry for
358 /dev/tty (device 4, 0) and /dev/console (device 5, 0).
359 This guarantees that major device numbers 4 and 5 will be
360 reserved for the tty subsystem (as they have to be because
361 of /dev/tty and /dev/console). Removed tty_regdev, as
362 this interface is no longer necessary.
363
364Sun Mar 17 20:42:47 GMT 1996 <ah@doc.ic.ac.uk>
365
366 * serial.c : modularisation (changes in linux/fs/device.c allow
367 kerneld to automatically load the serial module).
368
369 * Makefile, Config.in : serial modularisation adds.
370
371 * tty_io.c : tty_init_ctty used by to register "cua" driver just
372 for the /dev/tty device (5,0). Added tty_regdev.
373
374 * serial.c (shutdown, rs_ioctl) : when port shuts down wakeup processes
375 waiting on delta_msr_wait. The TIOCMIWAIT ioctl returns EIO
376 if no change was done since the time of call.
377
378Sat Mar 16 14:33:13 1996 <aeb@cwi.nl>
379
380 * tty_io.c (disassociate_ctty): If disassociate_ctty is called by
381 exit, do not perform an implicit vhangup on a pty.
382
383Fri Feb 9 14:15:47 1996 <tytso@rsts-11.mit.edu>
384
385 * serial.c (block_til_ready): Fixed another race condition which
386 happens if a hangup happens during the open.
387
388Wed Jan 10 10:08:00 1996 <tytso@rsts-11.mit.edu>
389
390 * serial.c (block_til_ready): Remove race condition which happened
391 if a hangup condition happened during the setup of the
392 UART, before rs_open() called block_til_ready(). This
393 caused the info->count counter to be erroneously
394 decremented.
395
396 * serial.c (startup, rs_open): Remove race condition that could
397 cause a memory leak of one page. (Fortunately, both race
398 conditions were relatively rare in practice.)
399
400Tue Dec 5 13:21:27 1995 <tytso@rsts-11.mit.edu>
401
402 * serial.c (check_modem_status, rs_ioctl): Support the new
403 ioctl()'s TIOCGICOUNT, TIOCMIWAIT. These allow an
404 application program to wait on a modem serial register
405 status bit change, and to find out how many changes have
406 taken place for the MSR bits.
407
408 (rs_write): Eliminate a race condition which is introduced
409 if it is necessary to wait for the semaphore.
410
411Sat Nov 4 17:14:45 1995 <tytso@rsts-11.mit.edu>
412
413 * tty_io.c (tty_init): Move registration of TTY_MAJOR and
414 TTY_AUX_MAJOR to the end, so that /proc/devices looks
415 prettier.
416
417 * pty.c (pty_init): Use new major numbers for PTY master and slave
418 devices. This allow us to have more than 64 pty's. We
419 register the old pty devices for backwards compatibility.
420 Note that a system should either be using the old pty
421 devices or the new pty devices --- in general, it should
422 try to use both, since they map into the same pty table.
423 The old pty devices are strictly for backwards compatibility.
424
425Wed Oct 11 12:45:24 1995 <tytso@rsts-11.mit.edu>
426
427 * tty_io.c (disassociate_ctty): If disassociate_ctty is called by
428 exit, perform an implicit vhangup on the tty.
429
430 * pty.c (pty_close): When the master pty is closed, send a hangup
431 to the slave pty.
432 (pty_open): Use the flag TTY_SLAVE_CLOSED to test to see
433 if there are any open slave ptys, instead of using
434 tty->link->count. The old method got confused if there
435 were processes that had hung-up file descriptors on the
436 slave tty.
437
438Tue May 2 00:53:25 1995 <tytso@rsx-11.mit.edu>
439
440 * tty_io.c (tty_set_ldisc): Wait until the output buffer is
441 drained before closing the old line discipline --- needed
442 in only one case: XON/XOFF processing.
443
444 * n_tty.c (n_tty_close): Don't bother waiting until the output
445 driver is closed; in general, the line discipline
446 shouldn't care if the hardware is finished
447 transmitting before the line discipline terminates.
448
449 * tty_io.c (release_dev): Shutdown the line discipline after
450 decrementing the tty count variable; but set the
451 TTY_CLOSING flag so that we know that this tty structure
452 isn't long for this world.
453
454 * tty_io.c (init_dev): Add sanity code to check to see if
455 TTY_CLOSING is set on a tty structure; if so, something
456 bad has happened (probably a line discipline close blocked
457 when it shouldn't have; so do a kernel printk and then
458 return an error).
459
460Wed Apr 26 10:23:44 1995 Theodore Y. Ts'o <tytso@localhost>
461
462 * tty_io.c (release_dev): Try to shutdown the line discipline
463 *before* decrementing the tty count variable; this removes
464 a potential race condition which occurs when the line
465 discipline close blocks, and another process then tries
466 open the same serial port.
467
468 * serial.c (rs_hangup): When hanging up, flush the output buffer
469 before shutting down the UART. Otherwise the line
470 discipline close blocks waiting for the characters to get
471 flushed, which never happens until the serial port gets reused.
472
473Wed Apr 12 08:06:16 1995 Theodore Y. Ts'o <tytso@localhost>
474
475 * serial.c (do_serial_hangup, do_softint, check_modem_status,
476 rs_init): Hangups are now scheduled via a separate tqueue
477 structure in the async_struct structure, tqueue_hangup.
478 This task is pushed on to the tq_schedule queue, so that
479 it is processed synchronously by the scheduler.
480
481Sat Feb 18 12:13:51 1995 Theodore Y. Ts'o (tytso@rt-11)
482
483 * tty_io.c (disassociate_ctty, tty_open, tty_ioctl): Clear
484 current->tty_old_pgrp field when a session leader
485 acquires a controlling tty, and after a session leader
486 has disassociated from a controlling tty.
487
488Fri Feb 17 09:34:09 1995 Theodore Y. Ts'o (tytso@rt-11)
489
490 * serial.c (rs_interrupt_single, rs_interrupt, rs_interrupt_multi):
491 Change the number of passes made from 64 to be 256,
492 configurable with the #define RS_ISR_PASS_LIMIT.
493
494 * serial.c (rs_init, set_serial_info, get_serial_info, rs_close):
495 Remove support for closing_wait2. Instead, set
496 tty->closing and rely on the line discipline to prevent
497 echo wars.
498
499 * n_tty.c (n_tty_receive_char): IEXTEN does not need to be
500 enabled in order for IXANY to be active.
501
502 If tty->closing is set, then only process XON and XOFF
503 characters.
504
505Sun Feb 12 23:57:48 1995 Theodore Y. Ts'o (tytso@rt-11)
506
507 * serial.c (rs_timer): Change the interrupt poll time from 60
508 seconds to 10 seconds, configurable with the #define
509 RS_STROBE_TIME.
510
511 * serial.c (rs_interrupt_multi, startup, shutdown, rs_ioctl,
512 set_multiport_struct, get_multiport_struct): Add
513 provisions for a new type of interrupt service routine,
514 which better supports multiple serial ports on a single
515 IRQ.
516
517Sun Feb 5 19:35:11 1995 Theodore Y. Ts'o (tytso@rt-11)
518
519 * tty_ioctl.c (n_tty_ioctl, set_termios, tty_wait_until_sent):
520 * serial.c (rs_ioctl, rs_close):
521 * cyclades.c (cy_ioctl, cy_close):
522 * n_tty.c (n_tty_close): Rename wait_until_sent to
523 tty_wait_until_sent, so that it's a better name to export
524 in ksyms.c.
525
526Sat Feb 4 23:36:20 1995 Theodore Y. Ts'o (tytso@rt-11)
527
528 * serial.c (rs_close): Added missing check for closing_wait2 being
529 ASYNC_CLOSING_WAIT_NONE.
530
531Thu Jan 26 09:02:49 1995 Theodore Y. Ts'o (tytso@rt-11)
532
533 * serial.c (rs_init, set_serial_info, get_serial_info,
534 rs_close): Support close_wait in the serial driver.
535 This is helpful for slow devices (like serial
536 plotters) so that their outputs don't get flushed upon
537 device close. This has to be configurable because
538 normally we don't want ports to be hung up for long
539 periods of time during a close when they are not
540 connected to a device, or the device is powered off.
541
542 The default is to wait 30 seconds; in the case of a
543 very slow device, the close_wait timeout should be
544 lengthened. If it is set to 0, the kernel will wait
545 forever for all of the data to be transmitted.
546
547Thu Jan 17 01:17:20 1995 Theodore Y. Ts'o (tytso@rt-11)
548
549 * serial.c (startup, change_speed, rs_init): Add support to detect
550 the StarTech 16650 chip. Treat it as a 16450 for now,
551 because of its FIFO bugs.
552
553Thu Jan 5 21:21:57 1995 <dahinds@users.sourceforge.net>
554
555 * serial.c: (receive_char): Added counter to prevent infinite loop
556 when a PCMCIA serial device is ejected.
557
558Thu Dec 29 17:53:48 1994 <tytso@rsx-11.mit.edu>
559
560 * tty_io.c (check_tty_count): New procedure which checks
561 tty->count to make sure that it matches with the number of
562 open file descriptors which point at the structure. If
563 the number doesn't match, it prints a warning message.
564
565Wed Dec 28 15:41:51 1994 <tytso@rsx-11.mit.edu>
566
567 * tty_io.c (do_tty_hangup, disassociate_ctty): At hangup time,
568 save the tty's current foreground process group in the
569 session leader's task structure. When the session leader
570 terminates, send a SIGHUP, SIGCONT to that process group.
571 This is not required by POSIX, but it's not prohibited
572 either, and it appears to be the least intrusive way
573 to fix a problem that dialup servers have with
574 orphaned process groups caused by modem hangups.
575
576Thu Dec 8 14:52:11 1994 <tytso@rsx-11.mit.edu>
577
578 * serial.c (rs_ioctl): Don't allow most ioctl's if the serial port
579 isn't initialized.
580
581 * serial.c (rs_close): Don't clear the IER if the serial port
582 isn't initialized.
583
584 * serial.c (block_til_ready): Don't try to block on the dialin
585 port if the serial port isn't initialized.
586
587Wed Dec 7 10:48:30 1994 Si Park (si@wimpol.demon.co.uk)
588 * tty_io.c (tty_register_driver): Fix bug when linking onto
589 the tty_drivers list. We now test that there are elements
590 already on the list before setting the back link from the
591 first element to the new driver.
592
593 * tty_io.c (tty_unregister_driver): Fix bug in unlinking the
594 specified driver from the tty_drivers list. We were not
595 setting the back link correctly. This used to result in
596 a dangling back link pointer and cause panics on the next
597 call to get_tty_driver().
598
599Tue Nov 29 10:21:09 1994 Theodore Y. Ts'o (tytso@rt-11)
600
601 * tty_io.c (tty_unregister_driver): Fix bug in
602 tty_unregister_driver where the pointer to the refcount is
603 tested, instead of the refcount itself. This caused
604 tty_unregister_driver to always return EBUSY.
605
606Sat Nov 26 11:59:24 1994 Theodore Y. Ts'o (tytso@rt-11)
607
608 * tty_io.c (tty_ioctl): Add support for the new ioctl
609 TIOCTTYGSTRUCT, which allow a kernel debugging program
610 direct read access to the tty and tty_driver structures.
611
612Fri Nov 25 17:26:22 1994 Theodore Y. Ts'o (tytso@rt-11)
613
614 * serial.c (rs_set_termios): Don't wake up processes blocked in
615 open when the CLOCAL flag changes, since a blocking
616 open only samples the CLOCAL flag once when it blocks,
617 and doesn't check it again. (n.b. FreeBSD has a
618 different behavior for blocking opens; it's not clear
619 whether Linux or FreeBSD's interpretation is correct.
620 POSIX doesn't give clear guidance on this issue, so
621 this may change in the future....)
622
623 * serial.c (block_til_ready): Use the correct termios structure to
624 check the CLOCAL flag. If the cuaXX device is active,
625 then check the saved termios for the ttySXX device.
626 Otherwise, use the currently active termios structure.
627
628Sun Nov 6 21:05:44 1994 Theodore Y. Ts'o (tytso@rt-11)
629
630 * serial.c (change_speed): Add support for direct access of
631 57,600 and 115,200 bps.
632
633Wed Nov 2 10:32:36 1994 Theodore Y. Ts'o (tytso@rt-11)
634
635 * n_tty.c (n_tty_receive_room): Only allow excess characters
636 through if we are in ICANON mode *and* there are other no
637 pending lines in the buffer. Otherwise cut and paste over
638 4k breaks.
639
640Sat Oct 29 18:17:34 1994 Theodore Y. Ts'o (tytso@rt-11)
641
642 * serial.c (rs_ioctl, get_lsr_info): Added patch suggested by Arne
643 Riiber so that user mode programs can tell when the
644 transmitter shift register is empty.
645
646Thu Oct 27 23:14:29 1994 Theodore Y. Ts'o (tytso@rt-11)
647
648 * tty_ioctl.c (wait_until_sent): Added debugging printk statements
649 (under the #ifdef TTY_DEBUG_WAIT_UNTIL_SENT)
650
651 * serial.c (rs_interrupt, rs_interrupt_single, receive_chars,
652 change_speed, rs_close): rs_close now disables receiver
653 interrupts when closing the serial port. This allows the
654 serial port to close quickly when Linux and a modem (or a
655 mouse) are engaged in an echo war; when closing the serial
656 port, we now first stop listening to incoming characters,
657 and *then* wait for the transmit buffer to drain.
658
659 In order to make this change, the info->read_status_mask
660 is now used to control what bits of the line status
661 register are looked at in the interrupt routine in all
662 cases; previously it was only used in receive_chars to
663 select a few of the status bits.
664
665Mon Oct 24 23:36:21 1994 Theodore Y. Ts'o (tytso@rt-11)
666
667 * serial.c (rs_close): Add a timeout to the transmitter flush
668 loop; this is just a sanity check in case we have flaky
669 (or non-existent-but-configured-by-the-user) hardware.
670
671Fri Oct 21 09:37:23 1994 Theodore Y. Ts'o (tytso@rt-11)
672
673 * tty_io.c (tty_fasync): When asynchronous I/O is enabled, if the
674 process or process group has not be specified yet, set it
675 to be the tty's process group, or if that is not yet set,
676 to the current process's pid.
677
678Thu Oct 20 23:17:28 1994 Theodore Y. Ts'o (tytso@rt-11)
679
680 * n_tty.c (n_tty_receive_room): If we are doing input
681 canonicalization, let as many characters through as
682 possible, so that the excess characters can be "beeped".
683
684Tue Oct 18 10:02:43 1994 Theodore Y. Ts'o (tytso@rt-11)
685
686 * serial.c (rs_start): Removed an incorrect '!' that was
687 preventing transmit interrupts from being re-enabled in
688 rs_start(). Fortunately in most cases it would be
689 re-enabled elsewhere, but this still should be fixed
690 correctly.
691
692Sun Oct 9 23:46:03 1994 Theodore Y. Ts'o (tytso@rt-11)
693
694 * tty_io.c (do_tty_hangup): If the tty driver flags
695 TTY_DRIVER_RESET_TERMIOS is set, then reset the termios
696 settings back to the driver's initial configuration. This
697 allows the termios settings to be reset even if a process
698 has hung up file descriptors keeping a pty's termios from
699 being freed and reset.
700
701 * tty_io.c (release_dev): Fix memory leak. The pty's other
702 termios structure should also be freed.
703
704 * serial.c (rs_close, shutdown): Change how we wait for the
705 transmitter to completely drain before shutting down the
706 serial port. We now do it by scheduling in another
707 process instead of busy looping with the interrupts turned
708 on. This may eliminate some race condition problems that
709 some people seem to be reporting.
710
711Sun Sep 25 14:18:14 1994 Theodore Y. Ts'o (tytso@rt-11)
712
713 * tty_io.c (release_dev): When freeing a tty make sure that both
714 the tty and the o_tty (if present) aren't a process's
715 controlling tty. (Previously, we only checked the tty.)
716
717 * serial.c (change_speed): Only enable the Modem Status
718 Interrupt for a port if CLOCAL is not set or CRTSCTS
719 is set. If we're not checking the carrier detect and
720 CTS line, there's no point in enabling the modem
721 status interrupt. This will save spurious interrupts
722 from slowing down systems who have terminals that
723 don't support either line. (Of course, if you want
724 only one of CD and CTS support, you will need a
725 properly wired serial cable.)
726
727Thu Sep 22 08:32:48 1994 Theodore Y. Ts'o (tytso@rt-11)
728
729 * tty_io.c (do_SAK): Return if tty is null.
730
731 * tty_io.c (_tty_name): Return "NULL tty" if the passed in tty is
732 NULL.
733
734Sat Sep 17 13:19:25 1994 Theodore Y. Ts'o (tytso@rt-11)
735
736 * tty_ioctl.c (n_tty_ioctl): Fix TIOCGLCKTRMIOS and
737 TIOCSLCKTRMIOS, which were totally broken. Remove
738 extra indirection from argument; it should be a struct
739 termios *, not a struct termios **.
740 &real_tty->termios_locked should have been
741 real_tty->termios_locked. This caused us to be
742 reading and writing the termios_locked structure to
743 random places in kernel memory.
744
745 * tty_io.c (release_dev): Oops! Forgot to delete a critical kfree
746 of the locked_termios. This leaves the locked_termios
747 structure pointed at a freed object.
748
749Fri Sep 16 08:13:25 1994 Theodore Y. Ts'o (tytso@rt-11)
750
751 * tty_io.c (tty_open): Don't check for an exclusive open until
752 after the device specific open routine has been called.
753 Otherwise, the serial device ref counting will be screwed
754 up.
755
756 * serial.c (rs_open, block_til_ready): Don't set termios structure
757 until after block_til_ready has returned successfully.
758 Modify block_til_ready to check the normal_termios
759 structure directly, so it doesn't rely on termios being
760 set before it's called.
761
762Thu Sep 15 23:34:01 1994 Theodore Y. Ts'o (tytso@rt-11)
763
764 * serial.c (rs_close): Turn off interrupts during rs_close() to
765 prevent a race condition with the hangup code (which
766 runs during a software interrupt).
767
768 * tty_io.c (release_dev): Don't free the locked_termios structure;
769 its state must be retained across device opens.
770
771
772 * tty_io.c (tty_unregister_driver): Added function to unregister a
773 tty driver. (For loadable device drivers.)
774
775
diff --git a/drivers/char/agp/Kconfig b/drivers/char/agp/Kconfig
index 2fb3a480f6b0..4b66c69eaf57 100644
--- a/drivers/char/agp/Kconfig
+++ b/drivers/char/agp/Kconfig
@@ -57,7 +57,7 @@ config AGP_AMD
57 57
58config AGP_AMD64 58config AGP_AMD64
59 tristate "AMD Opteron/Athlon64 on-CPU GART support" 59 tristate "AMD Opteron/Athlon64 on-CPU GART support"
60 depends on AGP && X86 60 depends on AGP && X86 && K8_NB
61 help 61 help
62 This option gives you AGP support for the GLX component of 62 This option gives you AGP support for the GLX component of
63 X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs. 63 X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs.
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 919a28558d36..a3e10dc7cc25 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -298,7 +298,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem,
298 j++; 298 j++;
299 } 299 }
300 } else { 300 } else {
301 /* sg may merge pages, but we have to seperate 301 /* sg may merge pages, but we have to separate
302 * per-page addr for GTT */ 302 * per-page addr for GTT */
303 unsigned int len, m; 303 unsigned int len, m;
304 304
diff --git a/drivers/char/applicom.c b/drivers/char/applicom.c
index fe2cb2f5db17..a7424bf7eacf 100644
--- a/drivers/char/applicom.c
+++ b/drivers/char/applicom.c
@@ -14,7 +14,7 @@
14/* et passe en argument a acinit, mais est scrute sur le bus pour s'adapter */ 14/* et passe en argument a acinit, mais est scrute sur le bus pour s'adapter */
15/* au nombre de cartes presentes sur le bus. IOCL code 6 affichait V2.4.3 */ 15/* au nombre de cartes presentes sur le bus. IOCL code 6 affichait V2.4.3 */
16/* F.LAFORSE 28/11/95 creation de fichiers acXX.o avec les differentes */ 16/* F.LAFORSE 28/11/95 creation de fichiers acXX.o avec les differentes */
17/* adresses de base des cartes, IOCTL 6 plus complet */ 17/* addresses de base des cartes, IOCTL 6 plus complet */
18/* J.PAGET le 19/08/96 copie de la version V2.6 en V2.8.0 sans modification */ 18/* J.PAGET le 19/08/96 copie de la version V2.6 en V2.8.0 sans modification */
19/* de code autre que le texte V2.6.1 en V2.8.0 */ 19/* de code autre que le texte V2.6.1 en V2.8.0 */
20/*****************************************************************************/ 20/*****************************************************************************/
diff --git a/drivers/char/hvc_iseries.c b/drivers/char/hvc_iseries.c
index fd0242676a2a..21c54955084e 100644
--- a/drivers/char/hvc_iseries.c
+++ b/drivers/char/hvc_iseries.c
@@ -353,7 +353,7 @@ static void hvc_close_event(struct HvLpEvent *event)
353 353
354 if (!hvlpevent_is_int(event)) { 354 if (!hvlpevent_is_int(event)) {
355 printk(KERN_WARNING 355 printk(KERN_WARNING
356 "hvc: got unexpected close acknowlegement\n"); 356 "hvc: got unexpected close acknowledgement\n");
357 return; 357 return;
358 } 358 }
359 359
diff --git a/drivers/char/hvc_iucv.c b/drivers/char/hvc_iucv.c
index 21681a81cc35..37b0542a4eeb 100644
--- a/drivers/char/hvc_iucv.c
+++ b/drivers/char/hvc_iucv.c
@@ -139,6 +139,8 @@ struct hvc_iucv_private *hvc_iucv_get_private(uint32_t num)
139 * 139 *
140 * This function allocates a new struct iucv_tty_buffer element and, optionally, 140 * This function allocates a new struct iucv_tty_buffer element and, optionally,
141 * allocates an internal data buffer with the specified size @size. 141 * allocates an internal data buffer with the specified size @size.
142 * The internal data buffer is always allocated with GFP_DMA which is
143 * required for receiving and sending data with IUCV.
142 * Note: The total message size arises from the internal buffer size and the 144 * Note: The total message size arises from the internal buffer size and the
143 * members of the iucv_tty_msg structure. 145 * members of the iucv_tty_msg structure.
144 * The function returns NULL if memory allocation has failed. 146 * The function returns NULL if memory allocation has failed.
@@ -154,7 +156,7 @@ static struct iucv_tty_buffer *alloc_tty_buffer(size_t size, gfp_t flags)
154 156
155 if (size > 0) { 157 if (size > 0) {
156 bufp->msg.length = MSG_SIZE(size); 158 bufp->msg.length = MSG_SIZE(size);
157 bufp->mbuf = kmalloc(bufp->msg.length, flags); 159 bufp->mbuf = kmalloc(bufp->msg.length, flags | GFP_DMA);
158 if (!bufp->mbuf) { 160 if (!bufp->mbuf) {
159 mempool_free(bufp, hvc_iucv_mempool); 161 mempool_free(bufp, hvc_iucv_mempool);
160 return NULL; 162 return NULL;
@@ -237,7 +239,7 @@ static int hvc_iucv_write(struct hvc_iucv_private *priv,
237 if (!rb->mbuf) { /* message not yet received ... */ 239 if (!rb->mbuf) { /* message not yet received ... */
238 /* allocate mem to store msg data; if no memory is available 240 /* allocate mem to store msg data; if no memory is available
239 * then leave the buffer on the list and re-try later */ 241 * then leave the buffer on the list and re-try later */
240 rb->mbuf = kmalloc(rb->msg.length, GFP_ATOMIC); 242 rb->mbuf = kmalloc(rb->msg.length, GFP_ATOMIC | GFP_DMA);
241 if (!rb->mbuf) 243 if (!rb->mbuf)
242 return -ENOMEM; 244 return -ENOMEM;
243 245
diff --git a/drivers/char/hw_random/n2-drv.c b/drivers/char/hw_random/n2-drv.c
index 9b3e09cd41f9..10f868eefaa6 100644
--- a/drivers/char/hw_random/n2-drv.c
+++ b/drivers/char/hw_random/n2-drv.c
@@ -71,7 +71,7 @@ MODULE_VERSION(DRV_MODULE_VERSION);
71 * x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1 71 * x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
72 * 72 *
73 * The RNG_CTL_VCO value of each noise cell must be programmed 73 * The RNG_CTL_VCO value of each noise cell must be programmed
74 * seperately. This is why 4 control register values must be provided 74 * separately. This is why 4 control register values must be provided
75 * to the hypervisor. During a write, the hypervisor writes them all, 75 * to the hypervisor. During a write, the hypervisor writes them all,
76 * one at a time, to the actual RNG_CTL register. The first three 76 * one at a time, to the actual RNG_CTL register. The first three
77 * values are used to setup the desired RNG_CTL_VCO for each entropy 77 * values are used to setup the desired RNG_CTL_VCO for each entropy
diff --git a/drivers/char/ip2/i2hw.h b/drivers/char/ip2/i2hw.h
index 8aa6e7ab8d5b..c0ba6c05f0cd 100644
--- a/drivers/char/ip2/i2hw.h
+++ b/drivers/char/ip2/i2hw.h
@@ -559,7 +559,7 @@ Loadware may be sent to the board in two ways:
559 559
5602) It may be hard-coded into your source by including a .h file (typically 5602) It may be hard-coded into your source by including a .h file (typically
561 supplied by Computone), which declares a data array and initializes every 561 supplied by Computone), which declares a data array and initializes every
562 element. This acheives the same result as if an entire loadware file had 562 element. This achieves the same result as if an entire loadware file had
563 been read into the array. 563 been read into the array.
564 564
565 This requires more data space in your program, but access to the file system 565 This requires more data space in your program, but access to the file system
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 176f1751237f..4462b113ba3f 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -295,6 +295,9 @@ struct smi_info {
295static int force_kipmid[SI_MAX_PARMS]; 295static int force_kipmid[SI_MAX_PARMS];
296static int num_force_kipmid; 296static int num_force_kipmid;
297 297
298static unsigned int kipmid_max_busy_us[SI_MAX_PARMS];
299static int num_max_busy_us;
300
298static int unload_when_empty = 1; 301static int unload_when_empty = 1;
299 302
300static int try_smi_init(struct smi_info *smi); 303static int try_smi_init(struct smi_info *smi);
@@ -925,23 +928,77 @@ static void set_run_to_completion(void *send_info, int i_run_to_completion)
925 } 928 }
926} 929}
927 930
931/*
932 * Use -1 in the nsec value of the busy waiting timespec to tell that
933 * we are spinning in kipmid looking for something and not delaying
934 * between checks
935 */
936static inline void ipmi_si_set_not_busy(struct timespec *ts)
937{
938 ts->tv_nsec = -1;
939}
940static inline int ipmi_si_is_busy(struct timespec *ts)
941{
942 return ts->tv_nsec != -1;
943}
944
945static int ipmi_thread_busy_wait(enum si_sm_result smi_result,
946 const struct smi_info *smi_info,
947 struct timespec *busy_until)
948{
949 unsigned int max_busy_us = 0;
950
951 if (smi_info->intf_num < num_max_busy_us)
952 max_busy_us = kipmid_max_busy_us[smi_info->intf_num];
953 if (max_busy_us == 0 || smi_result != SI_SM_CALL_WITH_DELAY)
954 ipmi_si_set_not_busy(busy_until);
955 else if (!ipmi_si_is_busy(busy_until)) {
956 getnstimeofday(busy_until);
957 timespec_add_ns(busy_until, max_busy_us*NSEC_PER_USEC);
958 } else {
959 struct timespec now;
960 getnstimeofday(&now);
961 if (unlikely(timespec_compare(&now, busy_until) > 0)) {
962 ipmi_si_set_not_busy(busy_until);
963 return 0;
964 }
965 }
966 return 1;
967}
968
969
970/*
971 * A busy-waiting loop for speeding up IPMI operation.
972 *
973 * Lousy hardware makes this hard. This is only enabled for systems
974 * that are not BT and do not have interrupts. It starts spinning
975 * when an operation is complete or until max_busy tells it to stop
976 * (if that is enabled). See the paragraph on kimid_max_busy_us in
977 * Documentation/IPMI.txt for details.
978 */
928static int ipmi_thread(void *data) 979static int ipmi_thread(void *data)
929{ 980{
930 struct smi_info *smi_info = data; 981 struct smi_info *smi_info = data;
931 unsigned long flags; 982 unsigned long flags;
932 enum si_sm_result smi_result; 983 enum si_sm_result smi_result;
984 struct timespec busy_until;
933 985
986 ipmi_si_set_not_busy(&busy_until);
934 set_user_nice(current, 19); 987 set_user_nice(current, 19);
935 while (!kthread_should_stop()) { 988 while (!kthread_should_stop()) {
989 int busy_wait;
990
936 spin_lock_irqsave(&(smi_info->si_lock), flags); 991 spin_lock_irqsave(&(smi_info->si_lock), flags);
937 smi_result = smi_event_handler(smi_info, 0); 992 smi_result = smi_event_handler(smi_info, 0);
938 spin_unlock_irqrestore(&(smi_info->si_lock), flags); 993 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
994 busy_wait = ipmi_thread_busy_wait(smi_result, smi_info,
995 &busy_until);
939 if (smi_result == SI_SM_CALL_WITHOUT_DELAY) 996 if (smi_result == SI_SM_CALL_WITHOUT_DELAY)
940 ; /* do nothing */ 997 ; /* do nothing */
941 else if (smi_result == SI_SM_CALL_WITH_DELAY) 998 else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait)
942 schedule(); 999 schedule();
943 else 1000 else
944 schedule_timeout_interruptible(1); 1001 schedule_timeout_interruptible(0);
945 } 1002 }
946 return 0; 1003 return 0;
947} 1004}
@@ -1144,7 +1201,7 @@ static int regsizes[SI_MAX_PARMS];
1144static unsigned int num_regsizes; 1201static unsigned int num_regsizes;
1145static int regshifts[SI_MAX_PARMS]; 1202static int regshifts[SI_MAX_PARMS];
1146static unsigned int num_regshifts; 1203static unsigned int num_regshifts;
1147static int slave_addrs[SI_MAX_PARMS]; 1204static int slave_addrs[SI_MAX_PARMS]; /* Leaving 0 chooses the default value */
1148static unsigned int num_slave_addrs; 1205static unsigned int num_slave_addrs;
1149 1206
1150#define IPMI_IO_ADDR_SPACE 0 1207#define IPMI_IO_ADDR_SPACE 0
@@ -1212,6 +1269,11 @@ module_param(unload_when_empty, int, 0);
1212MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are" 1269MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are"
1213 " specified or found, default is 1. Setting to 0" 1270 " specified or found, default is 1. Setting to 0"
1214 " is useful for hot add of devices using hotmod."); 1271 " is useful for hot add of devices using hotmod.");
1272module_param_array(kipmid_max_busy_us, uint, &num_max_busy_us, 0644);
1273MODULE_PARM_DESC(kipmid_max_busy_us,
1274 "Max time (in microseconds) to busy-wait for IPMI data before"
1275 " sleeping. 0 (default) means to wait forever. Set to 100-500"
1276 " if kipmid is using up a lot of CPU time.");
1215 1277
1216 1278
1217static void std_irq_cleanup(struct smi_info *info) 1279static void std_irq_cleanup(struct smi_info *info)
@@ -1607,7 +1669,7 @@ static int hotmod_handler(const char *val, struct kernel_param *kp)
1607 regsize = 1; 1669 regsize = 1;
1608 regshift = 0; 1670 regshift = 0;
1609 irq = 0; 1671 irq = 0;
1610 ipmb = 0x20; 1672 ipmb = 0; /* Choose the default if not specified */
1611 1673
1612 next = strchr(curr, ':'); 1674 next = strchr(curr, ':');
1613 if (next) { 1675 if (next) {
@@ -1799,6 +1861,7 @@ static __devinit void hardcode_find_bmc(void)
1799 info->irq = irqs[i]; 1861 info->irq = irqs[i];
1800 if (info->irq) 1862 if (info->irq)
1801 info->irq_setup = std_irq_setup; 1863 info->irq_setup = std_irq_setup;
1864 info->slave_addr = slave_addrs[i];
1802 1865
1803 try_smi_init(info); 1866 try_smi_init(info);
1804 } 1867 }
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index 48788db4e280..1f3215ac085b 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds 4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * 5 *
6 * Added devfs support. 6 * Added devfs support.
7 * Jan-11-1998, C. Scott Ananian <cananian@alumni.princeton.edu> 7 * Jan-11-1998, C. Scott Ananian <cananian@alumni.princeton.edu>
8 * Shared /dev/zero mmapping support, Feb 2000, Kanoj Sarcar <kanoj@sgi.com> 8 * Shared /dev/zero mmapping support, Feb 2000, Kanoj Sarcar <kanoj@sgi.com>
9 */ 9 */
@@ -44,36 +44,6 @@ static inline unsigned long size_inside_page(unsigned long start,
44 return min(sz, size); 44 return min(sz, size);
45} 45}
46 46
47/*
48 * Architectures vary in how they handle caching for addresses
49 * outside of main memory.
50 *
51 */
52static inline int uncached_access(struct file *file, unsigned long addr)
53{
54#if defined(CONFIG_IA64)
55 /*
56 * On ia64, we ignore O_DSYNC because we cannot tolerate memory attribute aliases.
57 */
58 return !(efi_mem_attributes(addr) & EFI_MEMORY_WB);
59#elif defined(CONFIG_MIPS)
60 {
61 extern int __uncached_access(struct file *file,
62 unsigned long addr);
63
64 return __uncached_access(file, addr);
65 }
66#else
67 /*
68 * Accessing memory above the top the kernel knows about or through a file pointer
69 * that was marked O_DSYNC will be done non-cached.
70 */
71 if (file->f_flags & O_DSYNC)
72 return 1;
73 return addr >= __pa(high_memory);
74#endif
75}
76
77#ifndef ARCH_HAS_VALID_PHYS_ADDR_RANGE 47#ifndef ARCH_HAS_VALID_PHYS_ADDR_RANGE
78static inline int valid_phys_addr_range(unsigned long addr, size_t count) 48static inline int valid_phys_addr_range(unsigned long addr, size_t count)
79{ 49{
@@ -115,15 +85,15 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)
115} 85}
116#endif 86#endif
117 87
118void __attribute__((weak)) unxlate_dev_mem_ptr(unsigned long phys, void *addr) 88void __weak unxlate_dev_mem_ptr(unsigned long phys, void *addr)
119{ 89{
120} 90}
121 91
122/* 92/*
123 * This funcion reads the *physical* memory. The f_pos points directly to the 93 * This funcion reads the *physical* memory. The f_pos points directly to the
124 * memory location. 94 * memory location.
125 */ 95 */
126static ssize_t read_mem(struct file * file, char __user * buf, 96static ssize_t read_mem(struct file *file, char __user *buf,
127 size_t count, loff_t *ppos) 97 size_t count, loff_t *ppos)
128{ 98{
129 unsigned long p = *ppos; 99 unsigned long p = *ppos;
@@ -140,10 +110,10 @@ static ssize_t read_mem(struct file * file, char __user * buf,
140 if (sz > 0) { 110 if (sz > 0) {
141 if (clear_user(buf, sz)) 111 if (clear_user(buf, sz))
142 return -EFAULT; 112 return -EFAULT;
143 buf += sz; 113 buf += sz;
144 p += sz; 114 p += sz;
145 count -= sz; 115 count -= sz;
146 read += sz; 116 read += sz;
147 } 117 }
148 } 118 }
149#endif 119#endif
@@ -157,9 +127,9 @@ static ssize_t read_mem(struct file * file, char __user * buf,
157 return -EPERM; 127 return -EPERM;
158 128
159 /* 129 /*
160 * On ia64 if a page has been mapped somewhere as 130 * On ia64 if a page has been mapped somewhere as uncached, then
161 * uncached, then it must also be accessed uncached 131 * it must also be accessed uncached by the kernel or data
162 * by the kernel or data corruption may occur 132 * corruption may occur.
163 */ 133 */
164 ptr = xlate_dev_mem_ptr(p); 134 ptr = xlate_dev_mem_ptr(p);
165 if (!ptr) 135 if (!ptr)
@@ -180,7 +150,7 @@ static ssize_t read_mem(struct file * file, char __user * buf,
180 return read; 150 return read;
181} 151}
182 152
183static ssize_t write_mem(struct file * file, const char __user * buf, 153static ssize_t write_mem(struct file *file, const char __user *buf,
184 size_t count, loff_t *ppos) 154 size_t count, loff_t *ppos)
185{ 155{
186 unsigned long p = *ppos; 156 unsigned long p = *ppos;
@@ -212,9 +182,9 @@ static ssize_t write_mem(struct file * file, const char __user * buf,
212 return -EPERM; 182 return -EPERM;
213 183
214 /* 184 /*
215 * On ia64 if a page has been mapped somewhere as 185 * On ia64 if a page has been mapped somewhere as uncached, then
216 * uncached, then it must also be accessed uncached 186 * it must also be accessed uncached by the kernel or data
217 * by the kernel or data corruption may occur 187 * corruption may occur.
218 */ 188 */
219 ptr = xlate_dev_mem_ptr(p); 189 ptr = xlate_dev_mem_ptr(p);
220 if (!ptr) { 190 if (!ptr) {
@@ -242,13 +212,46 @@ static ssize_t write_mem(struct file * file, const char __user * buf,
242 return written; 212 return written;
243} 213}
244 214
245int __attribute__((weak)) phys_mem_access_prot_allowed(struct file *file, 215int __weak phys_mem_access_prot_allowed(struct file *file,
246 unsigned long pfn, unsigned long size, pgprot_t *vma_prot) 216 unsigned long pfn, unsigned long size, pgprot_t *vma_prot)
247{ 217{
248 return 1; 218 return 1;
249} 219}
250 220
251#ifndef __HAVE_PHYS_MEM_ACCESS_PROT 221#ifndef __HAVE_PHYS_MEM_ACCESS_PROT
222
223/*
224 * Architectures vary in how they handle caching for addresses
225 * outside of main memory.
226 *
227 */
228static int uncached_access(struct file *file, unsigned long addr)
229{
230#if defined(CONFIG_IA64)
231 /*
232 * On ia64, we ignore O_DSYNC because we cannot tolerate memory
233 * attribute aliases.
234 */
235 return !(efi_mem_attributes(addr) & EFI_MEMORY_WB);
236#elif defined(CONFIG_MIPS)
237 {
238 extern int __uncached_access(struct file *file,
239 unsigned long addr);
240
241 return __uncached_access(file, addr);
242 }
243#else
244 /*
245 * Accessing memory above the top the kernel knows about or through a
246 * file pointer
247 * that was marked O_DSYNC will be done non-cached.
248 */
249 if (file->f_flags & O_DSYNC)
250 return 1;
251 return addr >= __pa(high_memory);
252#endif
253}
254
252static pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 255static pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
253 unsigned long size, pgprot_t vma_prot) 256 unsigned long size, pgprot_t vma_prot)
254{ 257{
@@ -294,7 +297,7 @@ static const struct vm_operations_struct mmap_mem_ops = {
294#endif 297#endif
295}; 298};
296 299
297static int mmap_mem(struct file * file, struct vm_area_struct * vma) 300static int mmap_mem(struct file *file, struct vm_area_struct *vma)
298{ 301{
299 size_t size = vma->vm_end - vma->vm_start; 302 size_t size = vma->vm_end - vma->vm_start;
300 303
@@ -329,7 +332,7 @@ static int mmap_mem(struct file * file, struct vm_area_struct * vma)
329} 332}
330 333
331#ifdef CONFIG_DEVKMEM 334#ifdef CONFIG_DEVKMEM
332static int mmap_kmem(struct file * file, struct vm_area_struct * vma) 335static int mmap_kmem(struct file *file, struct vm_area_struct *vma)
333{ 336{
334 unsigned long pfn; 337 unsigned long pfn;
335 338
@@ -337,9 +340,9 @@ static int mmap_kmem(struct file * file, struct vm_area_struct * vma)
337 pfn = __pa((u64)vma->vm_pgoff << PAGE_SHIFT) >> PAGE_SHIFT; 340 pfn = __pa((u64)vma->vm_pgoff << PAGE_SHIFT) >> PAGE_SHIFT;
338 341
339 /* 342 /*
340 * RED-PEN: on some architectures there is more mapped memory 343 * RED-PEN: on some architectures there is more mapped memory than
341 * than available in mem_map which pfn_valid checks 344 * available in mem_map which pfn_valid checks for. Perhaps should add a
342 * for. Perhaps should add a new macro here. 345 * new macro here.
343 * 346 *
344 * RED-PEN: vmalloc is not supported right now. 347 * RED-PEN: vmalloc is not supported right now.
345 */ 348 */
@@ -389,7 +392,7 @@ static ssize_t read_oldmem(struct file *file, char __user *buf,
389/* 392/*
390 * This function reads the *virtual* memory as seen by the kernel. 393 * This function reads the *virtual* memory as seen by the kernel.
391 */ 394 */
392static ssize_t read_kmem(struct file *file, char __user *buf, 395static ssize_t read_kmem(struct file *file, char __user *buf,
393 size_t count, loff_t *ppos) 396 size_t count, loff_t *ppos)
394{ 397{
395 unsigned long p = *ppos; 398 unsigned long p = *ppos;
@@ -400,8 +403,8 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
400 read = 0; 403 read = 0;
401 if (p < (unsigned long) high_memory) { 404 if (p < (unsigned long) high_memory) {
402 low_count = count; 405 low_count = count;
403 if (count > (unsigned long) high_memory - p) 406 if (count > (unsigned long)high_memory - p)
404 low_count = (unsigned long) high_memory - p; 407 low_count = (unsigned long)high_memory - p;
405 408
406#ifdef __ARCH_HAS_NO_PAGE_ZERO_MAPPED 409#ifdef __ARCH_HAS_NO_PAGE_ZERO_MAPPED
407 /* we don't have page 0 mapped on sparc and m68k.. */ 410 /* we don't have page 0 mapped on sparc and m68k.. */
@@ -465,9 +468,8 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
465} 468}
466 469
467 470
468static inline ssize_t 471static ssize_t do_write_kmem(unsigned long p, const char __user *buf,
469do_write_kmem(unsigned long p, const char __user *buf, 472 size_t count, loff_t *ppos)
470 size_t count, loff_t *ppos)
471{ 473{
472 ssize_t written, sz; 474 ssize_t written, sz;
473 unsigned long copied; 475 unsigned long copied;
@@ -491,9 +493,9 @@ do_write_kmem(unsigned long p, const char __user *buf,
491 sz = size_inside_page(p, count); 493 sz = size_inside_page(p, count);
492 494
493 /* 495 /*
494 * On ia64 if a page has been mapped somewhere as 496 * On ia64 if a page has been mapped somewhere as uncached, then
495 * uncached, then it must also be accessed uncached 497 * it must also be accessed uncached by the kernel or data
496 * by the kernel or data corruption may occur 498 * corruption may occur.
497 */ 499 */
498 ptr = xlate_dev_kmem_ptr((char *)p); 500 ptr = xlate_dev_kmem_ptr((char *)p);
499 501
@@ -514,11 +516,10 @@ do_write_kmem(unsigned long p, const char __user *buf,
514 return written; 516 return written;
515} 517}
516 518
517
518/* 519/*
519 * This function writes to the *virtual* memory as seen by the kernel. 520 * This function writes to the *virtual* memory as seen by the kernel.
520 */ 521 */
521static ssize_t write_kmem(struct file * file, const char __user * buf, 522static ssize_t write_kmem(struct file *file, const char __user *buf,
522 size_t count, loff_t *ppos) 523 size_t count, loff_t *ppos)
523{ 524{
524 unsigned long p = *ppos; 525 unsigned long p = *ppos;
@@ -570,17 +571,17 @@ static ssize_t write_kmem(struct file * file, const char __user * buf,
570#endif 571#endif
571 572
572#ifdef CONFIG_DEVPORT 573#ifdef CONFIG_DEVPORT
573static ssize_t read_port(struct file * file, char __user * buf, 574static ssize_t read_port(struct file *file, char __user *buf,
574 size_t count, loff_t *ppos) 575 size_t count, loff_t *ppos)
575{ 576{
576 unsigned long i = *ppos; 577 unsigned long i = *ppos;
577 char __user *tmp = buf; 578 char __user *tmp = buf;
578 579
579 if (!access_ok(VERIFY_WRITE, buf, count)) 580 if (!access_ok(VERIFY_WRITE, buf, count))
580 return -EFAULT; 581 return -EFAULT;
581 while (count-- > 0 && i < 65536) { 582 while (count-- > 0 && i < 65536) {
582 if (__put_user(inb(i),tmp) < 0) 583 if (__put_user(inb(i), tmp) < 0)
583 return -EFAULT; 584 return -EFAULT;
584 i++; 585 i++;
585 tmp++; 586 tmp++;
586 } 587 }
@@ -588,22 +589,22 @@ static ssize_t read_port(struct file * file, char __user * buf,
588 return tmp-buf; 589 return tmp-buf;
589} 590}
590 591
591static ssize_t write_port(struct file * file, const char __user * buf, 592static ssize_t write_port(struct file *file, const char __user *buf,
592 size_t count, loff_t *ppos) 593 size_t count, loff_t *ppos)
593{ 594{
594 unsigned long i = *ppos; 595 unsigned long i = *ppos;
595 const char __user * tmp = buf; 596 const char __user * tmp = buf;
596 597
597 if (!access_ok(VERIFY_READ,buf,count)) 598 if (!access_ok(VERIFY_READ, buf, count))
598 return -EFAULT; 599 return -EFAULT;
599 while (count-- > 0 && i < 65536) { 600 while (count-- > 0 && i < 65536) {
600 char c; 601 char c;
601 if (__get_user(c, tmp)) { 602 if (__get_user(c, tmp)) {
602 if (tmp > buf) 603 if (tmp > buf)
603 break; 604 break;
604 return -EFAULT; 605 return -EFAULT;
605 } 606 }
606 outb(c,i); 607 outb(c, i);
607 i++; 608 i++;
608 tmp++; 609 tmp++;
609 } 610 }
@@ -612,13 +613,13 @@ static ssize_t write_port(struct file * file, const char __user * buf,
612} 613}
613#endif 614#endif
614 615
615static ssize_t read_null(struct file * file, char __user * buf, 616static ssize_t read_null(struct file *file, char __user *buf,
616 size_t count, loff_t *ppos) 617 size_t count, loff_t *ppos)
617{ 618{
618 return 0; 619 return 0;
619} 620}
620 621
621static ssize_t write_null(struct file * file, const char __user * buf, 622static ssize_t write_null(struct file *file, const char __user *buf,
622 size_t count, loff_t *ppos) 623 size_t count, loff_t *ppos)
623{ 624{
624 return count; 625 return count;
@@ -630,13 +631,13 @@ static int pipe_to_null(struct pipe_inode_info *info, struct pipe_buffer *buf,
630 return sd->len; 631 return sd->len;
631} 632}
632 633
633static ssize_t splice_write_null(struct pipe_inode_info *pipe,struct file *out, 634static ssize_t splice_write_null(struct pipe_inode_info *pipe, struct file *out,
634 loff_t *ppos, size_t len, unsigned int flags) 635 loff_t *ppos, size_t len, unsigned int flags)
635{ 636{
636 return splice_from_pipe(pipe, out, ppos, len, flags, pipe_to_null); 637 return splice_from_pipe(pipe, out, ppos, len, flags, pipe_to_null);
637} 638}
638 639
639static ssize_t read_zero(struct file * file, char __user * buf, 640static ssize_t read_zero(struct file *file, char __user *buf,
640 size_t count, loff_t *ppos) 641 size_t count, loff_t *ppos)
641{ 642{
642 size_t written; 643 size_t written;
@@ -667,7 +668,7 @@ static ssize_t read_zero(struct file * file, char __user * buf,
667 return written ? written : -EFAULT; 668 return written ? written : -EFAULT;
668} 669}
669 670
670static int mmap_zero(struct file * file, struct vm_area_struct * vma) 671static int mmap_zero(struct file *file, struct vm_area_struct *vma)
671{ 672{
672#ifndef CONFIG_MMU 673#ifndef CONFIG_MMU
673 return -ENOSYS; 674 return -ENOSYS;
@@ -677,7 +678,7 @@ static int mmap_zero(struct file * file, struct vm_area_struct * vma)
677 return 0; 678 return 0;
678} 679}
679 680
680static ssize_t write_full(struct file * file, const char __user * buf, 681static ssize_t write_full(struct file *file, const char __user *buf,
681 size_t count, loff_t *ppos) 682 size_t count, loff_t *ppos)
682{ 683{
683 return -ENOSPC; 684 return -ENOSPC;
@@ -688,8 +689,7 @@ static ssize_t write_full(struct file * file, const char __user * buf,
688 * can fopen() both devices with "a" now. This was previously impossible. 689 * can fopen() both devices with "a" now. This was previously impossible.
689 * -- SRB. 690 * -- SRB.
690 */ 691 */
691 692static loff_t null_lseek(struct file *file, loff_t offset, int orig)
692static loff_t null_lseek(struct file * file, loff_t offset, int orig)
693{ 693{
694 return file->f_pos = 0; 694 return file->f_pos = 0;
695} 695}
@@ -702,24 +702,31 @@ static loff_t null_lseek(struct file * file, loff_t offset, int orig)
702 * also note that seeking relative to the "end of file" isn't supported: 702 * also note that seeking relative to the "end of file" isn't supported:
703 * it has no meaning, so it returns -EINVAL. 703 * it has no meaning, so it returns -EINVAL.
704 */ 704 */
705static loff_t memory_lseek(struct file * file, loff_t offset, int orig) 705static loff_t memory_lseek(struct file *file, loff_t offset, int orig)
706{ 706{
707 loff_t ret; 707 loff_t ret;
708 708
709 mutex_lock(&file->f_path.dentry->d_inode->i_mutex); 709 mutex_lock(&file->f_path.dentry->d_inode->i_mutex);
710 switch (orig) { 710 switch (orig) {
711 case 0: 711 case SEEK_CUR:
712 file->f_pos = offset; 712 offset += file->f_pos;
713 ret = file->f_pos; 713 if ((unsigned long long)offset <
714 force_successful_syscall_return(); 714 (unsigned long long)file->f_pos) {
715 ret = -EOVERFLOW;
715 break; 716 break;
716 case 1: 717 }
717 file->f_pos += offset; 718 case SEEK_SET:
718 ret = file->f_pos; 719 /* to avoid userland mistaking f_pos=-9 as -EBADF=-9 */
719 force_successful_syscall_return(); 720 if ((unsigned long long)offset >= ~0xFFFULL) {
721 ret = -EOVERFLOW;
720 break; 722 break;
721 default: 723 }
722 ret = -EINVAL; 724 file->f_pos = offset;
725 ret = file->f_pos;
726 force_successful_syscall_return();
727 break;
728 default:
729 ret = -EINVAL;
723 } 730 }
724 mutex_unlock(&file->f_path.dentry->d_inode->i_mutex); 731 mutex_unlock(&file->f_path.dentry->d_inode->i_mutex);
725 return ret; 732 return ret;
@@ -803,7 +810,7 @@ static const struct file_operations oldmem_fops = {
803}; 810};
804#endif 811#endif
805 812
806static ssize_t kmsg_write(struct file * file, const char __user * buf, 813static ssize_t kmsg_write(struct file *file, const char __user *buf,
807 size_t count, loff_t *ppos) 814 size_t count, loff_t *ppos)
808{ 815{
809 char *tmp; 816 char *tmp;
@@ -825,7 +832,7 @@ static ssize_t kmsg_write(struct file * file, const char __user * buf,
825} 832}
826 833
827static const struct file_operations kmsg_fops = { 834static const struct file_operations kmsg_fops = {
828 .write = kmsg_write, 835 .write = kmsg_write,
829}; 836};
830 837
831static const struct memdev { 838static const struct memdev {
@@ -876,7 +883,7 @@ static int memory_open(struct inode *inode, struct file *filp)
876} 883}
877 884
878static const struct file_operations memory_fops = { 885static const struct file_operations memory_fops = {
879 .open = memory_open, 886 .open = memory_open,
880}; 887};
881 888
882static char *mem_devnode(struct device *dev, mode_t *mode) 889static char *mem_devnode(struct device *dev, mode_t *mode)
@@ -897,7 +904,7 @@ static int __init chr_dev_init(void)
897 if (err) 904 if (err)
898 return err; 905 return err;
899 906
900 if (register_chrdev(MEM_MAJOR,"mem",&memory_fops)) 907 if (register_chrdev(MEM_MAJOR, "mem", &memory_fops))
901 printk("unable to get major %d for memory devs\n", MEM_MAJOR); 908 printk("unable to get major %d for memory devs\n", MEM_MAJOR);
902 909
903 mem_class = class_create(THIS_MODULE, "mem"); 910 mem_class = class_create(THIS_MODULE, "mem");
diff --git a/drivers/char/mmtimer.c b/drivers/char/mmtimer.c
index 918711aa56f3..04fd0d843b3b 100644
--- a/drivers/char/mmtimer.c
+++ b/drivers/char/mmtimer.c
@@ -546,7 +546,7 @@ static void mmtimer_tasklet(unsigned long data)
546{ 546{
547 int nodeid = data; 547 int nodeid = data;
548 struct mmtimer_node *mn = &timers[nodeid]; 548 struct mmtimer_node *mn = &timers[nodeid];
549 struct mmtimer *x = rb_entry(mn->next, struct mmtimer, list); 549 struct mmtimer *x;
550 struct k_itimer *t; 550 struct k_itimer *t;
551 unsigned long flags; 551 unsigned long flags;
552 552
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c
index 2e50f4dfc79c..bdae8327143c 100644
--- a/drivers/char/n_tty.c
+++ b/drivers/char/n_tty.c
@@ -48,6 +48,7 @@
48#include <linux/audit.h> 48#include <linux/audit.h>
49#include <linux/file.h> 49#include <linux/file.h>
50#include <linux/uaccess.h> 50#include <linux/uaccess.h>
51#include <linux/module.h>
51 52
52#include <asm/system.h> 53#include <asm/system.h>
53 54
@@ -2091,3 +2092,19 @@ struct tty_ldisc_ops tty_ldisc_N_TTY = {
2091 .receive_buf = n_tty_receive_buf, 2092 .receive_buf = n_tty_receive_buf,
2092 .write_wakeup = n_tty_write_wakeup 2093 .write_wakeup = n_tty_write_wakeup
2093}; 2094};
2095
2096/**
2097 * n_tty_inherit_ops - inherit N_TTY methods
2098 * @ops: struct tty_ldisc_ops where to save N_TTY methods
2099 *
2100 * Used by a generic struct tty_ldisc_ops to easily inherit N_TTY
2101 * methods.
2102 */
2103
2104void n_tty_inherit_ops(struct tty_ldisc_ops *ops)
2105{
2106 *ops = tty_ldisc_N_TTY;
2107 ops->owner = NULL;
2108 ops->refcount = ops->flags = 0;
2109}
2110EXPORT_SYMBOL_GPL(n_tty_inherit_ops);
diff --git a/drivers/char/pty.c b/drivers/char/pty.c
index 385c44b3034f..5ee424817263 100644
--- a/drivers/char/pty.c
+++ b/drivers/char/pty.c
@@ -220,7 +220,7 @@ static void pty_set_termios(struct tty_struct *tty,
220 * @tty: tty being resized 220 * @tty: tty being resized
221 * @ws: window size being set. 221 * @ws: window size being set.
222 * 222 *
223 * Update the termios variables and send the neccessary signals to 223 * Update the termios variables and send the necessary signals to
224 * peform a terminal resize correctly 224 * peform a terminal resize correctly
225 */ 225 */
226 226
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 2849713d2231..2fd3d39995d5 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1191,7 +1191,7 @@ const struct file_operations urandom_fops = {
1191void generate_random_uuid(unsigned char uuid_out[16]) 1191void generate_random_uuid(unsigned char uuid_out[16])
1192{ 1192{
1193 get_random_bytes(uuid_out, 16); 1193 get_random_bytes(uuid_out, 16);
1194 /* Set UUID version to 4 --- truely random generation */ 1194 /* Set UUID version to 4 --- truly random generation */
1195 uuid_out[6] = (uuid_out[6] & 0x0F) | 0x40; 1195 uuid_out[6] = (uuid_out[6] & 0x0F) | 0x40;
1196 /* Set the UUID variant to DCE */ 1196 /* Set the UUID variant to DCE */
1197 uuid_out[8] = (uuid_out[8] & 0x3F) | 0x80; 1197 uuid_out[8] = (uuid_out[8] & 0x3F) | 0x80;
diff --git a/drivers/char/serial167.c b/drivers/char/serial167.c
index 986aa606a6b6..1ec3d5cd748f 100644
--- a/drivers/char/serial167.c
+++ b/drivers/char/serial167.c
@@ -1989,7 +1989,7 @@ void mvme167_serial_console_setup(int cflag)
1989 /* 1989 /*
1990 * Attempt to set up all channels to something reasonable, and 1990 * Attempt to set up all channels to something reasonable, and
1991 * bang out a INIT_CHAN command. We should then be able to limit 1991 * bang out a INIT_CHAN command. We should then be able to limit
1992 * the ammount of fiddling we have to do in normal running. 1992 * the amount of fiddling we have to do in normal running.
1993 */ 1993 */
1994 1994
1995 for (ch = 3; ch >= 0; ch--) { 1995 for (ch = 3; ch >= 0; ch--) {
diff --git a/drivers/char/tty_audit.c b/drivers/char/tty_audit.c
index ac16fbec72d0..283a15bc84e3 100644
--- a/drivers/char/tty_audit.c
+++ b/drivers/char/tty_audit.c
@@ -148,7 +148,6 @@ void tty_audit_fork(struct signal_struct *sig)
148 spin_lock_irq(&current->sighand->siglock); 148 spin_lock_irq(&current->sighand->siglock);
149 sig->audit_tty = current->signal->audit_tty; 149 sig->audit_tty = current->signal->audit_tty;
150 spin_unlock_irq(&current->sighand->siglock); 150 spin_unlock_irq(&current->sighand->siglock);
151 sig->tty_audit_buf = NULL;
152} 151}
153 152
154/** 153/**
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index dcb9083ecde0..a42c466f7092 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -2028,7 +2028,7 @@ static int tiocgwinsz(struct tty_struct *tty, struct winsize __user *arg)
2028 * @rows: rows (character) 2028 * @rows: rows (character)
2029 * @cols: cols (character) 2029 * @cols: cols (character)
2030 * 2030 *
2031 * Update the termios variables and send the neccessary signals to 2031 * Update the termios variables and send the necessary signals to
2032 * peform a terminal resize correctly 2032 * peform a terminal resize correctly
2033 */ 2033 */
2034 2034
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index 50faa1fb0f06..bd1d1164fec5 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -821,7 +821,7 @@ static inline int resize_screen(struct vc_data *vc, int width, int height,
821 * 821 *
822 * Resize a virtual console, clipping according to the actual constraints. 822 * Resize a virtual console, clipping according to the actual constraints.
823 * If the caller passes a tty structure then update the termios winsize 823 * If the caller passes a tty structure then update the termios winsize
824 * information and perform any neccessary signal handling. 824 * information and perform any necessary signal handling.
825 * 825 *
826 * Caller must hold the console semaphore. Takes the termios mutex and 826 * Caller must hold the console semaphore. Takes the termios mutex and
827 * ctrl_lock of the tty IFF a tty is passed. 827 * ctrl_lock of the tty IFF a tty is passed.
@@ -2119,8 +2119,6 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co
2119 uint8_t inverse; 2119 uint8_t inverse;
2120 uint8_t width; 2120 uint8_t width;
2121 u16 himask, charmask; 2121 u16 himask, charmask;
2122 const unsigned char *orig_buf = NULL;
2123 int orig_count;
2124 2122
2125 if (in_interrupt()) 2123 if (in_interrupt())
2126 return count; 2124 return count;
@@ -2142,8 +2140,6 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co
2142 release_console_sem(); 2140 release_console_sem();
2143 return 0; 2141 return 0;
2144 } 2142 }
2145 orig_buf = buf;
2146 orig_count = count;
2147 2143
2148 himask = vc->vc_hi_font_mask; 2144 himask = vc->vc_hi_font_mask;
2149 charmask = himask ? 0x1ff : 0xff; 2145 charmask = himask ? 0x1ff : 0xff;
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 67bc2ece7b4b..2d5d575e889d 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -766,7 +766,7 @@ static void cpufreq_sysfs_release(struct kobject *kobj)
766 complete(&policy->kobj_unregister); 766 complete(&policy->kobj_unregister);
767} 767}
768 768
769static struct sysfs_ops sysfs_ops = { 769static const struct sysfs_ops sysfs_ops = {
770 .show = show, 770 .show = show,
771 .store = store, 771 .store = store,
772}; 772};
diff --git a/drivers/cpuidle/sysfs.c b/drivers/cpuidle/sysfs.c
index 97b003839fb6..8719b36e1a4d 100644
--- a/drivers/cpuidle/sysfs.c
+++ b/drivers/cpuidle/sysfs.c
@@ -22,6 +22,7 @@ static int __init cpuidle_sysfs_setup(char *unused)
22__setup("cpuidle_sysfs_switch", cpuidle_sysfs_setup); 22__setup("cpuidle_sysfs_switch", cpuidle_sysfs_setup);
23 23
24static ssize_t show_available_governors(struct sysdev_class *class, 24static ssize_t show_available_governors(struct sysdev_class *class,
25 struct sysdev_class_attribute *attr,
25 char *buf) 26 char *buf)
26{ 27{
27 ssize_t i = 0; 28 ssize_t i = 0;
@@ -41,6 +42,7 @@ out:
41} 42}
42 43
43static ssize_t show_current_driver(struct sysdev_class *class, 44static ssize_t show_current_driver(struct sysdev_class *class,
45 struct sysdev_class_attribute *attr,
44 char *buf) 46 char *buf)
45{ 47{
46 ssize_t ret; 48 ssize_t ret;
@@ -56,6 +58,7 @@ static ssize_t show_current_driver(struct sysdev_class *class,
56} 58}
57 59
58static ssize_t show_current_governor(struct sysdev_class *class, 60static ssize_t show_current_governor(struct sysdev_class *class,
61 struct sysdev_class_attribute *attr,
59 char *buf) 62 char *buf)
60{ 63{
61 ssize_t ret; 64 ssize_t ret;
@@ -71,6 +74,7 @@ static ssize_t show_current_governor(struct sysdev_class *class,
71} 74}
72 75
73static ssize_t store_current_governor(struct sysdev_class *class, 76static ssize_t store_current_governor(struct sysdev_class *class,
77 struct sysdev_class_attribute *attr,
74 const char *buf, size_t count) 78 const char *buf, size_t count)
75{ 79{
76 char gov_name[CPUIDLE_NAME_LEN]; 80 char gov_name[CPUIDLE_NAME_LEN];
@@ -191,7 +195,7 @@ static ssize_t cpuidle_store(struct kobject * kobj, struct attribute * attr,
191 return ret; 195 return ret;
192} 196}
193 197
194static struct sysfs_ops cpuidle_sysfs_ops = { 198static const struct sysfs_ops cpuidle_sysfs_ops = {
195 .show = cpuidle_show, 199 .show = cpuidle_show,
196 .store = cpuidle_store, 200 .store = cpuidle_store,
197}; 201};
@@ -277,7 +281,7 @@ static ssize_t cpuidle_state_show(struct kobject * kobj,
277 return ret; 281 return ret;
278} 282}
279 283
280static struct sysfs_ops cpuidle_state_sysfs_ops = { 284static const struct sysfs_ops cpuidle_state_sysfs_ops = {
281 .show = cpuidle_state_show, 285 .show = cpuidle_state_show,
282}; 286};
283 287
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index 09ad9154d86c..73e8b1713b54 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -321,7 +321,7 @@ static atomic_t hifn_dev_number;
321#define HIFN_PUBOPLEN_MOD_M 0x0000007f /* modulus length mask */ 321#define HIFN_PUBOPLEN_MOD_M 0x0000007f /* modulus length mask */
322#define HIFN_PUBOPLEN_MOD_S 0 /* modulus length shift */ 322#define HIFN_PUBOPLEN_MOD_S 0 /* modulus length shift */
323#define HIFN_PUBOPLEN_EXP_M 0x0003ff80 /* exponent length mask */ 323#define HIFN_PUBOPLEN_EXP_M 0x0003ff80 /* exponent length mask */
324#define HIFN_PUBOPLEN_EXP_S 7 /* exponent lenght shift */ 324#define HIFN_PUBOPLEN_EXP_S 7 /* exponent length shift */
325#define HIFN_PUBOPLEN_RED_M 0x003c0000 /* reducend length mask */ 325#define HIFN_PUBOPLEN_RED_M 0x003c0000 /* reducend length mask */
326#define HIFN_PUBOPLEN_RED_S 18 /* reducend length shift */ 326#define HIFN_PUBOPLEN_RED_S 18 /* reducend length shift */
327 327
diff --git a/drivers/dma/coh901318_lli.h b/drivers/dma/coh901318_lli.h
index 7bf713b79c6b..7a5c80990e9e 100644
--- a/drivers/dma/coh901318_lli.h
+++ b/drivers/dma/coh901318_lli.h
@@ -30,7 +30,7 @@ struct device;
30 * @pool: pool handle 30 * @pool: pool handle
31 * @dev: dma device 31 * @dev: dma device
32 * @lli_nbr: number of lli:s in the pool 32 * @lli_nbr: number of lli:s in the pool
33 * @algin: adress alignemtn of lli:s 33 * @algin: address alignemtn of lli:s
34 * returns 0 on success otherwise none zero 34 * returns 0 on success otherwise none zero
35 */ 35 */
36int coh901318_pool_create(struct coh901318_pool *pool, 36int coh901318_pool_create(struct coh901318_pool *pool,
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index af14c9a5b8d4..0099340b9616 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -1138,7 +1138,7 @@ ioat_attr_show(struct kobject *kobj, struct attribute *attr, char *page)
1138 return entry->show(&chan->common, page); 1138 return entry->show(&chan->common, page);
1139} 1139}
1140 1140
1141struct sysfs_ops ioat_sysfs_ops = { 1141const struct sysfs_ops ioat_sysfs_ops = {
1142 .show = ioat_attr_show, 1142 .show = ioat_attr_show,
1143}; 1143};
1144 1144
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 4f747a254074..86b97ac8774e 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -346,7 +346,7 @@ bool ioat_cleanup_preamble(struct ioat_chan_common *chan,
346 unsigned long *phys_complete); 346 unsigned long *phys_complete);
347void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type); 347void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type);
348void ioat_kobject_del(struct ioatdma_device *device); 348void ioat_kobject_del(struct ioatdma_device *device);
349extern struct sysfs_ops ioat_sysfs_ops; 349extern const struct sysfs_ops ioat_sysfs_ops;
350extern struct ioat_sysfs_entry ioat_version_attr; 350extern struct ioat_sysfs_entry ioat_version_attr;
351extern struct ioat_sysfs_entry ioat_cap_attr; 351extern struct ioat_sysfs_entry ioat_cap_attr;
352#endif /* IOATDMA_H */ 352#endif /* IOATDMA_H */
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index d205d493a68a..243e9aacad69 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -75,6 +75,14 @@ static struct edac_pci_ctl_info *e752x_pci;
75#define E752X_NR_CSROWS 8 /* number of csrows */ 75#define E752X_NR_CSROWS 8 /* number of csrows */
76 76
77/* E752X register addresses - device 0 function 0 */ 77/* E752X register addresses - device 0 function 0 */
78#define E752X_MCHSCRB 0x52 /* Memory Scrub register (16b) */
79 /*
80 * 6:5 Scrub Completion Count
81 * 3:2 Scrub Rate (i3100 only)
82 * 01=fast 10=normal
83 * 1:0 Scrub Mode enable
84 * 00=off 10=on
85 */
78#define E752X_DRB 0x60 /* DRAM row boundary register (8b) */ 86#define E752X_DRB 0x60 /* DRAM row boundary register (8b) */
79#define E752X_DRA 0x70 /* DRAM row attribute register (8b) */ 87#define E752X_DRA 0x70 /* DRAM row attribute register (8b) */
80 /* 88 /*
@@ -240,6 +248,41 @@ static const struct e752x_dev_info e752x_devs[] = {
240 .ctl_name = "3100"}, 248 .ctl_name = "3100"},
241}; 249};
242 250
251/* Valid scrub rates for the e752x/3100 hardware memory scrubber. We
252 * map the scrubbing bandwidth to a hardware register value. The 'set'
253 * operation finds the 'matching or higher value'. Note that scrubbing
254 * on the e752x can only be enabled/disabled. The 3100 supports
255 * a normal and fast mode.
256 */
257
258#define SDRATE_EOT 0xFFFFFFFF
259
260struct scrubrate {
261 u32 bandwidth; /* bandwidth consumed by scrubbing in bytes/sec */
262 u16 scrubval; /* register value for scrub rate */
263};
264
265/* Rate below assumes same performance as i3100 using PC3200 DDR2 in
266 * normal mode. e752x bridges don't support choosing normal or fast mode,
267 * so the scrubbing bandwidth value isn't all that important - scrubbing is
268 * either on or off.
269 */
270static const struct scrubrate scrubrates_e752x[] = {
271 {0, 0x00}, /* Scrubbing Off */
272 {500000, 0x02}, /* Scrubbing On */
273 {SDRATE_EOT, 0x00} /* End of Table */
274};
275
276/* Fast mode: 2 GByte PC3200 DDR2 scrubbed in 33s = 63161283 bytes/s
277 * Normal mode: 125 (32000 / 256) times slower than fast mode.
278 */
279static const struct scrubrate scrubrates_i3100[] = {
280 {0, 0x00}, /* Scrubbing Off */
281 {500000, 0x0a}, /* Normal mode - 32k clocks */
282 {62500000, 0x06}, /* Fast mode - 256 clocks */
283 {SDRATE_EOT, 0x00} /* End of Table */
284};
285
243static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci, 286static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
244 unsigned long page) 287 unsigned long page)
245{ 288{
@@ -915,6 +958,68 @@ static void e752x_check(struct mem_ctl_info *mci)
915 e752x_process_error_info(mci, &info, 1); 958 e752x_process_error_info(mci, &info, 1);
916} 959}
917 960
961/* Program byte/sec bandwidth scrub rate to hardware */
962static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *new_bw)
963{
964 const struct scrubrate *scrubrates;
965 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
966 struct pci_dev *pdev = pvt->dev_d0f0;
967 int i;
968
969 if (pvt->dev_info->ctl_dev == PCI_DEVICE_ID_INTEL_3100_0)
970 scrubrates = scrubrates_i3100;
971 else
972 scrubrates = scrubrates_e752x;
973
974 /* Translate the desired scrub rate to a e752x/3100 register value.
975 * Search for the bandwidth that is equal or greater than the
976 * desired rate and program the cooresponding register value.
977 */
978 for (i = 0; scrubrates[i].bandwidth != SDRATE_EOT; i++)
979 if (scrubrates[i].bandwidth >= *new_bw)
980 break;
981
982 if (scrubrates[i].bandwidth == SDRATE_EOT)
983 return -1;
984
985 pci_write_config_word(pdev, E752X_MCHSCRB, scrubrates[i].scrubval);
986
987 return 0;
988}
989
990/* Convert current scrub rate value into byte/sec bandwidth */
991static int get_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *bw)
992{
993 const struct scrubrate *scrubrates;
994 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
995 struct pci_dev *pdev = pvt->dev_d0f0;
996 u16 scrubval;
997 int i;
998
999 if (pvt->dev_info->ctl_dev == PCI_DEVICE_ID_INTEL_3100_0)
1000 scrubrates = scrubrates_i3100;
1001 else
1002 scrubrates = scrubrates_e752x;
1003
1004 /* Find the bandwidth matching the memory scrubber configuration */
1005 pci_read_config_word(pdev, E752X_MCHSCRB, &scrubval);
1006 scrubval = scrubval & 0x0f;
1007
1008 for (i = 0; scrubrates[i].bandwidth != SDRATE_EOT; i++)
1009 if (scrubrates[i].scrubval == scrubval)
1010 break;
1011
1012 if (scrubrates[i].bandwidth == SDRATE_EOT) {
1013 e752x_printk(KERN_WARNING,
1014 "Invalid sdram scrub control value: 0x%x\n", scrubval);
1015 return -1;
1016 }
1017
1018 *bw = scrubrates[i].bandwidth;
1019
1020 return 0;
1021}
1022
918/* Return 1 if dual channel mode is active. Else return 0. */ 1023/* Return 1 if dual channel mode is active. Else return 0. */
919static inline int dual_channel_active(u16 ddrcsr) 1024static inline int dual_channel_active(u16 ddrcsr)
920{ 1025{
@@ -1073,10 +1178,7 @@ fail:
1073 1178
1074/* Setup system bus parity mask register. 1179/* Setup system bus parity mask register.
1075 * Sysbus parity supported on: 1180 * Sysbus parity supported on:
1076 * e7320/e7520/e7525 + Xeon 1181 * e7320/e7520/e7525 + Xeon
1077 * i3100 + Xeon/Celeron
1078 * Sysbus parity not supported on:
1079 * i3100 + Pentium M/Celeron M/Core Duo/Core2 Duo
1080 */ 1182 */
1081static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt) 1183static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
1082{ 1184{
@@ -1087,10 +1189,7 @@ static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
1087 /* Allow module parameter override, else see if CPU supports parity */ 1189 /* Allow module parameter override, else see if CPU supports parity */
1088 if (sysbus_parity != -1) { 1190 if (sysbus_parity != -1) {
1089 enable = sysbus_parity; 1191 enable = sysbus_parity;
1090 } else if (cpu_id[0] && 1192 } else if (cpu_id[0] && !strstr(cpu_id, "Xeon")) {
1091 ((strstr(cpu_id, "Pentium") && strstr(cpu_id, " M ")) ||
1092 (strstr(cpu_id, "Celeron") && strstr(cpu_id, " M ")) ||
1093 (strstr(cpu_id, "Core") && strstr(cpu_id, "Duo")))) {
1094 e752x_printk(KERN_INFO, "System Bus Parity not " 1193 e752x_printk(KERN_INFO, "System Bus Parity not "
1095 "supported by CPU, disabling\n"); 1194 "supported by CPU, disabling\n");
1096 enable = 0; 1195 enable = 0;
@@ -1187,6 +1286,8 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
1187 mci->dev_name = pci_name(pdev); 1286 mci->dev_name = pci_name(pdev);
1188 mci->edac_check = e752x_check; 1287 mci->edac_check = e752x_check;
1189 mci->ctl_page_to_phys = ctl_page_to_phys; 1288 mci->ctl_page_to_phys = ctl_page_to_phys;
1289 mci->set_sdram_scrub_rate = set_sdram_scrub_rate;
1290 mci->get_sdram_scrub_rate = get_sdram_scrub_rate;
1190 1291
1191 /* set the map type. 1 = normal, 0 = reversed 1292 /* set the map type. 1 = normal, 0 = reversed
1192 * Must be set before e752x_init_csrows in case csrow mapping 1293 * Must be set before e752x_init_csrows in case csrow mapping
diff --git a/drivers/edac/edac_device_sysfs.c b/drivers/edac/edac_device_sysfs.c
index 53764577035f..5fdedbc0f545 100644
--- a/drivers/edac/edac_device_sysfs.c
+++ b/drivers/edac/edac_device_sysfs.c
@@ -137,7 +137,7 @@ static ssize_t edac_dev_ctl_info_store(struct kobject *kobj,
137} 137}
138 138
139/* edac_dev file operations for an 'ctl_info' */ 139/* edac_dev file operations for an 'ctl_info' */
140static struct sysfs_ops device_ctl_info_ops = { 140static const struct sysfs_ops device_ctl_info_ops = {
141 .show = edac_dev_ctl_info_show, 141 .show = edac_dev_ctl_info_show,
142 .store = edac_dev_ctl_info_store 142 .store = edac_dev_ctl_info_store
143}; 143};
@@ -373,7 +373,7 @@ static ssize_t edac_dev_instance_store(struct kobject *kobj,
373} 373}
374 374
375/* edac_dev file operations for an 'instance' */ 375/* edac_dev file operations for an 'instance' */
376static struct sysfs_ops device_instance_ops = { 376static const struct sysfs_ops device_instance_ops = {
377 .show = edac_dev_instance_show, 377 .show = edac_dev_instance_show,
378 .store = edac_dev_instance_store 378 .store = edac_dev_instance_store
379}; 379};
@@ -476,7 +476,7 @@ static ssize_t edac_dev_block_store(struct kobject *kobj,
476} 476}
477 477
478/* edac_dev file operations for a 'block' */ 478/* edac_dev file operations for a 'block' */
479static struct sysfs_ops device_block_ops = { 479static const struct sysfs_ops device_block_ops = {
480 .show = edac_dev_block_show, 480 .show = edac_dev_block_show,
481 .store = edac_dev_block_store 481 .store = edac_dev_block_store
482}; 482};
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index e1d4ce083481..88840e9fa3e0 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -245,7 +245,7 @@ static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
245 return -EIO; 245 return -EIO;
246} 246}
247 247
248static struct sysfs_ops csrowfs_ops = { 248static const struct sysfs_ops csrowfs_ops = {
249 .show = csrowdev_show, 249 .show = csrowdev_show,
250 .store = csrowdev_store 250 .store = csrowdev_store
251}; 251};
@@ -575,7 +575,7 @@ static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
575} 575}
576 576
577/* Intermediate show/store table */ 577/* Intermediate show/store table */
578static struct sysfs_ops mci_ops = { 578static const struct sysfs_ops mci_ops = {
579 .show = mcidev_show, 579 .show = mcidev_show,
580 .store = mcidev_store 580 .store = mcidev_store
581}; 581};
diff --git a/drivers/edac/edac_pci_sysfs.c b/drivers/edac/edac_pci_sysfs.c
index fb60a877d768..bef94e3d9944 100644
--- a/drivers/edac/edac_pci_sysfs.c
+++ b/drivers/edac/edac_pci_sysfs.c
@@ -121,7 +121,7 @@ static ssize_t edac_pci_instance_store(struct kobject *kobj,
121} 121}
122 122
123/* fs_ops table */ 123/* fs_ops table */
124static struct sysfs_ops pci_instance_ops = { 124static const struct sysfs_ops pci_instance_ops = {
125 .show = edac_pci_instance_show, 125 .show = edac_pci_instance_show,
126 .store = edac_pci_instance_store 126 .store = edac_pci_instance_store
127}; 127};
@@ -261,7 +261,7 @@ static ssize_t edac_pci_dev_store(struct kobject *kobj,
261 return -EIO; 261 return -EIO;
262} 262}
263 263
264static struct sysfs_ops edac_pci_sysfs_ops = { 264static const struct sysfs_ops edac_pci_sysfs_ops = {
265 .show = edac_pci_dev_show, 265 .show = edac_pci_dev_show,
266 .store = edac_pci_dev_store 266 .store = edac_pci_dev_store
267}; 267};
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index ecd5928d7110..94cac0aacea3 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -239,16 +239,15 @@ static int __devinit mpc85xx_pci_err_probe(struct of_device *op,
239 /* we only need the error registers */ 239 /* we only need the error registers */
240 r.start += 0xe00; 240 r.start += 0xe00;
241 241
242 if (!devm_request_mem_region(&op->dev, r.start, 242 if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r),
243 r.end - r.start + 1, pdata->name)) { 243 pdata->name)) {
244 printk(KERN_ERR "%s: Error while requesting mem region\n", 244 printk(KERN_ERR "%s: Error while requesting mem region\n",
245 __func__); 245 __func__);
246 res = -EBUSY; 246 res = -EBUSY;
247 goto err; 247 goto err;
248 } 248 }
249 249
250 pdata->pci_vbase = devm_ioremap(&op->dev, r.start, 250 pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r));
251 r.end - r.start + 1);
252 if (!pdata->pci_vbase) { 251 if (!pdata->pci_vbase) {
253 printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__); 252 printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
254 res = -ENOMEM; 253 res = -ENOMEM;
@@ -668,15 +667,125 @@ static struct of_platform_driver mpc85xx_l2_err_driver = {
668 667
669/**************************** MC Err device ***************************/ 668/**************************** MC Err device ***************************/
670 669
670/*
671 * Taken from table 8-55 in the MPC8641 User's Manual and/or 9-61 in the
672 * MPC8572 User's Manual. Each line represents a syndrome bit column as a
673 * 64-bit value, but split into an upper and lower 32-bit chunk. The labels
674 * below correspond to Freescale's manuals.
675 */
676static unsigned int ecc_table[16] = {
677 /* MSB LSB */
678 /* [0:31] [32:63] */
679 0xf00fe11e, 0xc33c0ff7, /* Syndrome bit 7 */
680 0x00ff00ff, 0x00fff0ff,
681 0x0f0f0f0f, 0x0f0fff00,
682 0x11113333, 0x7777000f,
683 0x22224444, 0x8888222f,
684 0x44448888, 0xffff4441,
685 0x8888ffff, 0x11118882,
686 0xffff1111, 0x22221114, /* Syndrome bit 0 */
687};
688
689/*
690 * Calculate the correct ECC value for a 64-bit value specified by high:low
691 */
692static u8 calculate_ecc(u32 high, u32 low)
693{
694 u32 mask_low;
695 u32 mask_high;
696 int bit_cnt;
697 u8 ecc = 0;
698 int i;
699 int j;
700
701 for (i = 0; i < 8; i++) {
702 mask_high = ecc_table[i * 2];
703 mask_low = ecc_table[i * 2 + 1];
704 bit_cnt = 0;
705
706 for (j = 0; j < 32; j++) {
707 if ((mask_high >> j) & 1)
708 bit_cnt ^= (high >> j) & 1;
709 if ((mask_low >> j) & 1)
710 bit_cnt ^= (low >> j) & 1;
711 }
712
713 ecc |= bit_cnt << i;
714 }
715
716 return ecc;
717}
718
719/*
720 * Create the syndrome code which is generated if the data line specified by
721 * 'bit' failed. Eg generate an 8-bit codes seen in Table 8-55 in the MPC8641
722 * User's Manual and 9-61 in the MPC8572 User's Manual.
723 */
724static u8 syndrome_from_bit(unsigned int bit) {
725 int i;
726 u8 syndrome = 0;
727
728 /*
729 * Cycle through the upper or lower 32-bit portion of each value in
730 * ecc_table depending on if 'bit' is in the upper or lower half of
731 * 64-bit data.
732 */
733 for (i = bit < 32; i < 16; i += 2)
734 syndrome |= ((ecc_table[i] >> (bit % 32)) & 1) << (i / 2);
735
736 return syndrome;
737}
738
739/*
740 * Decode data and ecc syndrome to determine what went wrong
741 * Note: This can only decode single-bit errors
742 */
743static void sbe_ecc_decode(u32 cap_high, u32 cap_low, u32 cap_ecc,
744 int *bad_data_bit, int *bad_ecc_bit)
745{
746 int i;
747 u8 syndrome;
748
749 *bad_data_bit = -1;
750 *bad_ecc_bit = -1;
751
752 /*
753 * Calculate the ECC of the captured data and XOR it with the captured
754 * ECC to find an ECC syndrome value we can search for
755 */
756 syndrome = calculate_ecc(cap_high, cap_low) ^ cap_ecc;
757
758 /* Check if a data line is stuck... */
759 for (i = 0; i < 64; i++) {
760 if (syndrome == syndrome_from_bit(i)) {
761 *bad_data_bit = i;
762 return;
763 }
764 }
765
766 /* If data is correct, check ECC bits for errors... */
767 for (i = 0; i < 8; i++) {
768 if ((syndrome >> i) & 0x1) {
769 *bad_ecc_bit = i;
770 return;
771 }
772 }
773}
774
671static void mpc85xx_mc_check(struct mem_ctl_info *mci) 775static void mpc85xx_mc_check(struct mem_ctl_info *mci)
672{ 776{
673 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; 777 struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
674 struct csrow_info *csrow; 778 struct csrow_info *csrow;
779 u32 bus_width;
675 u32 err_detect; 780 u32 err_detect;
676 u32 syndrome; 781 u32 syndrome;
677 u32 err_addr; 782 u32 err_addr;
678 u32 pfn; 783 u32 pfn;
679 int row_index; 784 int row_index;
785 u32 cap_high;
786 u32 cap_low;
787 int bad_data_bit;
788 int bad_ecc_bit;
680 789
681 err_detect = in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT); 790 err_detect = in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT);
682 if (!err_detect) 791 if (!err_detect)
@@ -692,6 +801,15 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)
692 } 801 }
693 802
694 syndrome = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ECC); 803 syndrome = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ECC);
804
805 /* Mask off appropriate bits of syndrome based on bus width */
806 bus_width = (in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG) &
807 DSC_DBW_MASK) ? 32 : 64;
808 if (bus_width == 64)
809 syndrome &= 0xff;
810 else
811 syndrome &= 0xffff;
812
695 err_addr = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ADDRESS); 813 err_addr = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ADDRESS);
696 pfn = err_addr >> PAGE_SHIFT; 814 pfn = err_addr >> PAGE_SHIFT;
697 815
@@ -701,14 +819,35 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)
701 break; 819 break;
702 } 820 }
703 821
704 mpc85xx_mc_printk(mci, KERN_ERR, "Capture Data High: %#8.8x\n", 822 cap_high = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_DATA_HI);
705 in_be32(pdata->mc_vbase + 823 cap_low = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_DATA_LO);
706 MPC85XX_MC_CAPTURE_DATA_HI)); 824
707 mpc85xx_mc_printk(mci, KERN_ERR, "Capture Data Low: %#8.8x\n", 825 /*
708 in_be32(pdata->mc_vbase + 826 * Analyze single-bit errors on 64-bit wide buses
709 MPC85XX_MC_CAPTURE_DATA_LO)); 827 * TODO: Add support for 32-bit wide buses
710 mpc85xx_mc_printk(mci, KERN_ERR, "syndrome: %#8.8x\n", syndrome); 828 */
711 mpc85xx_mc_printk(mci, KERN_ERR, "err addr: %#8.8x\n", err_addr); 829 if ((err_detect & DDR_EDE_SBE) && (bus_width == 64)) {
830 sbe_ecc_decode(cap_high, cap_low, syndrome,
831 &bad_data_bit, &bad_ecc_bit);
832
833 if (bad_data_bit != -1)
834 mpc85xx_mc_printk(mci, KERN_ERR,
835 "Faulty Data bit: %d\n", bad_data_bit);
836 if (bad_ecc_bit != -1)
837 mpc85xx_mc_printk(mci, KERN_ERR,
838 "Faulty ECC bit: %d\n", bad_ecc_bit);
839
840 mpc85xx_mc_printk(mci, KERN_ERR,
841 "Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
842 cap_high ^ (1 << (bad_data_bit - 32)),
843 cap_low ^ (1 << bad_data_bit),
844 syndrome ^ (1 << bad_ecc_bit));
845 }
846
847 mpc85xx_mc_printk(mci, KERN_ERR,
848 "Captured Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
849 cap_high, cap_low, syndrome);
850 mpc85xx_mc_printk(mci, KERN_ERR, "Err addr: %#8.8x\n", err_addr);
712 mpc85xx_mc_printk(mci, KERN_ERR, "PFN: %#8.8x\n", pfn); 851 mpc85xx_mc_printk(mci, KERN_ERR, "PFN: %#8.8x\n", pfn);
713 852
714 /* we are out of range */ 853 /* we are out of range */
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index 52432ee7c4b9..cb24df839460 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -48,6 +48,9 @@
48#define DSC_MEM_EN 0x80000000 48#define DSC_MEM_EN 0x80000000
49#define DSC_ECC_EN 0x20000000 49#define DSC_ECC_EN 0x20000000
50#define DSC_RD_EN 0x10000000 50#define DSC_RD_EN 0x10000000
51#define DSC_DBW_MASK 0x00180000
52#define DSC_DBW_32 0x00080000
53#define DSC_DBW_64 0x00000000
51 54
52#define DSC_SDTYPE_MASK 0x07000000 55#define DSC_SDTYPE_MASK 0x07000000
53 56
diff --git a/drivers/firewire/core-device.c b/drivers/firewire/core-device.c
index 014cabd3afda..5db0518c66da 100644
--- a/drivers/firewire/core-device.c
+++ b/drivers/firewire/core-device.c
@@ -33,7 +33,6 @@
33#include <linux/module.h> 33#include <linux/module.h>
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/rwsem.h> 35#include <linux/rwsem.h>
36#include <linux/semaphore.h>
37#include <linux/spinlock.h> 36#include <linux/spinlock.h>
38#include <linux/string.h> 37#include <linux/string.h>
39#include <linux/workqueue.h> 38#include <linux/workqueue.h>
@@ -828,9 +827,9 @@ static int update_unit(struct device *dev, void *data)
828 struct fw_driver *driver = (struct fw_driver *)dev->driver; 827 struct fw_driver *driver = (struct fw_driver *)dev->driver;
829 828
830 if (is_fw_unit(dev) && driver != NULL && driver->update != NULL) { 829 if (is_fw_unit(dev) && driver != NULL && driver->update != NULL) {
831 down(&dev->sem); 830 device_lock(dev);
832 driver->update(unit); 831 driver->update(unit);
833 up(&dev->sem); 832 device_unlock(dev);
834 } 833 }
835 834
836 return 0; 835 return 0;
diff --git a/drivers/firmware/edd.c b/drivers/firmware/edd.c
index 9e4f59dc7f1e..110e24e50883 100644
--- a/drivers/firmware/edd.c
+++ b/drivers/firmware/edd.c
@@ -122,7 +122,7 @@ edd_attr_show(struct kobject * kobj, struct attribute *attr, char *buf)
122 return ret; 122 return ret;
123} 123}
124 124
125static struct sysfs_ops edd_attr_ops = { 125static const struct sysfs_ops edd_attr_ops = {
126 .show = edd_attr_show, 126 .show = edd_attr_show,
127}; 127};
128 128
diff --git a/drivers/firmware/efivars.c b/drivers/firmware/efivars.c
index f4f709d1370b..082f06ecd327 100644
--- a/drivers/firmware/efivars.c
+++ b/drivers/firmware/efivars.c
@@ -362,7 +362,7 @@ static ssize_t efivar_attr_store(struct kobject *kobj, struct attribute *attr,
362 return ret; 362 return ret;
363} 363}
364 364
365static struct sysfs_ops efivar_attr_ops = { 365static const struct sysfs_ops efivar_attr_ops = {
366 .show = efivar_attr_show, 366 .show = efivar_attr_show,
367 .store = efivar_attr_store, 367 .store = efivar_attr_store,
368}; 368};
diff --git a/drivers/firmware/iscsi_ibft.c b/drivers/firmware/iscsi_ibft.c
index a3600e3ed0fa..ed2801c378de 100644
--- a/drivers/firmware/iscsi_ibft.c
+++ b/drivers/firmware/iscsi_ibft.c
@@ -519,7 +519,7 @@ static ssize_t ibft_show_attribute(struct kobject *kobj,
519 return ret; 519 return ret;
520} 520}
521 521
522static struct sysfs_ops ibft_attr_ops = { 522static const struct sysfs_ops ibft_attr_ops = {
523 .show = ibft_show_attribute, 523 .show = ibft_show_attribute,
524}; 524};
525 525
diff --git a/drivers/firmware/memmap.c b/drivers/firmware/memmap.c
index 20f645743ead..d59f7cad2269 100644
--- a/drivers/firmware/memmap.c
+++ b/drivers/firmware/memmap.c
@@ -74,7 +74,7 @@ static struct attribute *def_attrs[] = {
74 NULL 74 NULL
75}; 75};
76 76
77static struct sysfs_ops memmap_attr_ops = { 77static const struct sysfs_ops memmap_attr_ops = {
78 .show = memmap_attr_show, 78 .show = memmap_attr_show,
79}; 79};
80 80
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 9006fdb26fea..6d1b86661e63 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -623,7 +623,9 @@ static const struct attribute_group gpiochip_attr_group = {
623 * /sys/class/gpio/unexport ... write-only 623 * /sys/class/gpio/unexport ... write-only
624 * integer N ... number of GPIO to unexport 624 * integer N ... number of GPIO to unexport
625 */ 625 */
626static ssize_t export_store(struct class *class, const char *buf, size_t len) 626static ssize_t export_store(struct class *class,
627 struct class_attribute *attr,
628 const char *buf, size_t len)
627{ 629{
628 long gpio; 630 long gpio;
629 int status; 631 int status;
@@ -653,7 +655,9 @@ done:
653 return status ? : len; 655 return status ? : len;
654} 656}
655 657
656static ssize_t unexport_store(struct class *class, const char *buf, size_t len) 658static ssize_t unexport_store(struct class *class,
659 struct class_attribute *attr,
660 const char *buf, size_t len)
657{ 661{
658 long gpio; 662 long gpio;
659 int status; 663 int status;
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 7e42b7e9d43a..014ce24761b9 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -70,19 +70,17 @@ static int drm_class_resume(struct device *dev)
70 return 0; 70 return 0;
71} 71}
72 72
73/* Display the version of drm_core. This doesn't work right in current design */
74static ssize_t version_show(struct class *dev, char *buf)
75{
76 return sprintf(buf, "%s %d.%d.%d %s\n", CORE_NAME, CORE_MAJOR,
77 CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE);
78}
79
80static char *drm_devnode(struct device *dev, mode_t *mode) 73static char *drm_devnode(struct device *dev, mode_t *mode)
81{ 74{
82 return kasprintf(GFP_KERNEL, "dri/%s", dev_name(dev)); 75 return kasprintf(GFP_KERNEL, "dri/%s", dev_name(dev));
83} 76}
84 77
85static CLASS_ATTR(version, S_IRUGO, version_show, NULL); 78static CLASS_ATTR_STRING(version, S_IRUGO,
79 CORE_NAME " "
80 __stringify(CORE_MAJOR) "."
81 __stringify(CORE_MINOR) "."
82 __stringify(CORE_PATCHLEVEL) " "
83 CORE_DATE);
86 84
87/** 85/**
88 * drm_sysfs_create - create a struct drm_sysfs_class structure 86 * drm_sysfs_create - create a struct drm_sysfs_class structure
@@ -109,7 +107,7 @@ struct class *drm_sysfs_create(struct module *owner, char *name)
109 class->suspend = drm_class_suspend; 107 class->suspend = drm_class_suspend;
110 class->resume = drm_class_resume; 108 class->resume = drm_class_resume;
111 109
112 err = class_create_file(class, &class_attr_version); 110 err = class_create_file(class, &class_attr_version.attr);
113 if (err) 111 if (err)
114 goto err_out_class; 112 goto err_out_class;
115 113
@@ -132,7 +130,7 @@ void drm_sysfs_destroy(void)
132{ 130{
133 if ((drm_class == NULL) || (IS_ERR(drm_class))) 131 if ((drm_class == NULL) || (IS_ERR(drm_class)))
134 return; 132 return;
135 class_remove_file(drm_class, &class_attr_version); 133 class_remove_file(drm_class, &class_attr_version.attr);
136 class_destroy(drm_class); 134 class_destroy(drm_class);
137} 135}
138 136
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 71247da17da5..75bceee76044 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -3545,7 +3545,7 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b
3545 * at which modes should be set up in the dual link style. 3545 * at which modes should be set up in the dual link style.
3546 * 3546 *
3547 * Following the header, the BMP (ver 0xa) table has several records, 3547 * Following the header, the BMP (ver 0xa) table has several records,
3548 * indexed by a seperate xlat table, indexed in turn by the fp strap in 3548 * indexed by a separate xlat table, indexed in turn by the fp strap in
3549 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 3549 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
3550 * numbers for use by INIT_SUB which controlled panel init and power, 3550 * numbers for use by INIT_SUB which controlled panel init and power,
3551 * and finally a dword of ms to sleep between power off and on 3551 * and finally a dword of ms to sleep between power off and on
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 5f8d987af363..4b9aaf2a8d0f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -553,7 +553,7 @@ struct drm_nouveau_private {
553 uint32_t ramro_offset; 553 uint32_t ramro_offset;
554 uint32_t ramro_size; 554 uint32_t ramro_size;
555 555
556 /* base physical adresses */ 556 /* base physical addresses */
557 uint64_t fb_phys; 557 uint64_t fb_phys;
558 uint64_t fb_available_size; 558 uint64_t fb_available_size;
559 uint64_t fb_mappable_pages; 559 uint64_t fb_mappable_pages;
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 3c32f840dcd2..40ab6d9c3736 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1093,7 +1093,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev,
1093 /* judging by the first tile offset needed, could possibly 1093 /* judging by the first tile offset needed, could possibly
1094 directly address/clear 4x4 tiles instead of 8x2 * 4x4 1094 directly address/clear 4x4 tiles instead of 8x2 * 4x4
1095 macro tiles, though would still need clear mask for 1095 macro tiles, though would still need clear mask for
1096 right/bottom if truely 4x4 granularity is desired ? */ 1096 right/bottom if truly 4x4 granularity is desired ? */
1097 OUT_RING(tileoffset * 16); 1097 OUT_RING(tileoffset * 16);
1098 /* the number of tiles to clear */ 1098 /* the number of tiles to clear */
1099 OUT_RING(nrtilesx + 1); 1099 OUT_RING(nrtilesx + 1);
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index c7320ce4567d..89c38c49066f 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -128,7 +128,7 @@ static struct attribute *ttm_bo_global_attrs[] = {
128 NULL 128 NULL
129}; 129};
130 130
131static struct sysfs_ops ttm_bo_global_ops = { 131static const struct sysfs_ops ttm_bo_global_ops = {
132 .show = &ttm_bo_global_show 132 .show = &ttm_bo_global_show
133}; 133};
134 134
diff --git a/drivers/gpu/drm/ttm/ttm_memory.c b/drivers/gpu/drm/ttm/ttm_memory.c
index f5245c02b8fd..eb143e04d402 100644
--- a/drivers/gpu/drm/ttm/ttm_memory.c
+++ b/drivers/gpu/drm/ttm/ttm_memory.c
@@ -152,7 +152,7 @@ static struct attribute *ttm_mem_zone_attrs[] = {
152 NULL 152 NULL
153}; 153};
154 154
155static struct sysfs_ops ttm_mem_zone_ops = { 155static const struct sysfs_ops ttm_mem_zone_ops = {
156 .show = &ttm_mem_zone_show, 156 .show = &ttm_mem_zone_show,
157 .store = &ttm_mem_zone_store 157 .store = &ttm_mem_zone_store
158}; 158};
diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c
index 5935b8842e86..34079f251cd4 100644
--- a/drivers/gpu/drm/via/via_irq.c
+++ b/drivers/gpu/drm/via/via_irq.c
@@ -150,7 +150,7 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
150 cur_irq++; 150 cur_irq++;
151 } 151 }
152 152
153 /* Acknowlege interrupts */ 153 /* Acknowledge interrupts */
154 VIA_WRITE(VIA_REG_INTERRUPT, status); 154 VIA_WRITE(VIA_REG_INTERRUPT, status);
155 155
156 156
@@ -165,7 +165,7 @@ static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
165 u32 status; 165 u32 status;
166 166
167 if (dev_priv) { 167 if (dev_priv) {
168 /* Acknowlege interrupts */ 168 /* Acknowledge interrupts */
169 status = VIA_READ(VIA_REG_INTERRUPT); 169 status = VIA_READ(VIA_REG_INTERRUPT);
170 VIA_WRITE(VIA_REG_INTERRUPT, status | 170 VIA_WRITE(VIA_REG_INTERRUPT, status |
171 dev_priv->irq_pending_mask); 171 dev_priv->irq_pending_mask);
diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c
index 79d9edd0bdfa..7a0d2e4661a1 100644
--- a/drivers/hid/hid-input.c
+++ b/drivers/hid/hid-input.c
@@ -68,22 +68,25 @@ static const struct {
68#define map_key_clear(c) hid_map_usage_clear(hidinput, usage, &bit, \ 68#define map_key_clear(c) hid_map_usage_clear(hidinput, usage, &bit, \
69 &max, EV_KEY, (c)) 69 &max, EV_KEY, (c))
70 70
71static inline int match_scancode(int code, int scancode) 71static inline int match_scancode(unsigned int code, unsigned int scancode)
72{ 72{
73 if (scancode == 0) 73 if (scancode == 0)
74 return 1; 74 return 1;
75 return ((code & (HID_USAGE_PAGE | HID_USAGE)) == scancode); 75
76 return (code & (HID_USAGE_PAGE | HID_USAGE)) == scancode;
76} 77}
77 78
78static inline int match_keycode(int code, int keycode) 79static inline int match_keycode(unsigned int code, unsigned int keycode)
79{ 80{
80 if (keycode == 0) 81 if (keycode == 0)
81 return 1; 82 return 1;
82 return (code == keycode); 83
84 return code == keycode;
83} 85}
84 86
85static struct hid_usage *hidinput_find_key(struct hid_device *hid, 87static struct hid_usage *hidinput_find_key(struct hid_device *hid,
86 int scancode, int keycode) 88 unsigned int scancode,
89 unsigned int keycode)
87{ 90{
88 int i, j, k; 91 int i, j, k;
89 struct hid_report *report; 92 struct hid_report *report;
@@ -105,8 +108,8 @@ static struct hid_usage *hidinput_find_key(struct hid_device *hid,
105 return NULL; 108 return NULL;
106} 109}
107 110
108static int hidinput_getkeycode(struct input_dev *dev, int scancode, 111static int hidinput_getkeycode(struct input_dev *dev,
109 int *keycode) 112 unsigned int scancode, unsigned int *keycode)
110{ 113{
111 struct hid_device *hid = input_get_drvdata(dev); 114 struct hid_device *hid = input_get_drvdata(dev);
112 struct hid_usage *usage; 115 struct hid_usage *usage;
@@ -119,16 +122,13 @@ static int hidinput_getkeycode(struct input_dev *dev, int scancode,
119 return -EINVAL; 122 return -EINVAL;
120} 123}
121 124
122static int hidinput_setkeycode(struct input_dev *dev, int scancode, 125static int hidinput_setkeycode(struct input_dev *dev,
123 int keycode) 126 unsigned int scancode, unsigned int keycode)
124{ 127{
125 struct hid_device *hid = input_get_drvdata(dev); 128 struct hid_device *hid = input_get_drvdata(dev);
126 struct hid_usage *usage; 129 struct hid_usage *usage;
127 int old_keycode; 130 int old_keycode;
128 131
129 if (keycode < 0 || keycode > KEY_MAX)
130 return -EINVAL;
131
132 usage = hidinput_find_key(hid, scancode, 0); 132 usage = hidinput_find_key(hid, scancode, 0);
133 if (usage) { 133 if (usage) {
134 old_keycode = usage->code; 134 old_keycode = usage->code;
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 02ce9cff5fcf..d06083fdffbb 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -73,7 +73,6 @@ config I2C_SMBUS
73 73
74source drivers/i2c/algos/Kconfig 74source drivers/i2c/algos/Kconfig
75source drivers/i2c/busses/Kconfig 75source drivers/i2c/busses/Kconfig
76source drivers/i2c/chips/Kconfig
77 76
78config I2C_DEBUG_CORE 77config I2C_DEBUG_CORE
79 bool "I2C Core debugging messages" 78 bool "I2C Core debugging messages"
@@ -98,12 +97,4 @@ config I2C_DEBUG_BUS
98 a problem with I2C support and want to see more of what is going 97 a problem with I2C support and want to see more of what is going
99 on. 98 on.
100 99
101config I2C_DEBUG_CHIP
102 bool "I2C Chip debugging messages"
103 help
104 Say Y here if you want the I2C chip drivers to produce a bunch of
105 debug messages to the system log. Select this if you are having
106 a problem with I2C support and want to see more of what is going
107 on.
108
109endif # I2C 100endif # I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index acd0250c16a0..a7d9b4be9bb3 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -6,7 +6,7 @@ obj-$(CONFIG_I2C_BOARDINFO) += i2c-boardinfo.o
6obj-$(CONFIG_I2C) += i2c-core.o 6obj-$(CONFIG_I2C) += i2c-core.o
7obj-$(CONFIG_I2C_SMBUS) += i2c-smbus.o 7obj-$(CONFIG_I2C_SMBUS) += i2c-smbus.o
8obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o 8obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
9obj-y += busses/ chips/ algos/ 9obj-y += algos/ busses/
10 10
11ifeq ($(CONFIG_I2C_DEBUG_CORE),y) 11ifeq ($(CONFIG_I2C_DEBUG_CORE),y)
12EXTRA_CFLAGS += -DDEBUG 12EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index e25e13980af3..e8d568c3fb09 100644
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -522,6 +522,12 @@ static int bit_xfer(struct i2c_adapter *i2c_adap,
522 int i, ret; 522 int i, ret;
523 unsigned short nak_ok; 523 unsigned short nak_ok;
524 524
525 if (adap->pre_xfer) {
526 ret = adap->pre_xfer(i2c_adap);
527 if (ret < 0)
528 return ret;
529 }
530
525 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); 531 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
526 i2c_start(adap); 532 i2c_start(adap);
527 for (i = 0; i < num; i++) { 533 for (i = 0; i < num; i++) {
@@ -570,6 +576,9 @@ static int bit_xfer(struct i2c_adapter *i2c_adap,
570bailout: 576bailout:
571 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); 577 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
572 i2c_stop(adap); 578 i2c_stop(adap);
579
580 if (adap->post_xfer)
581 adap->post_xfer(i2c_adap);
573 return ret; 582 return ret;
574} 583}
575 584
diff --git a/drivers/i2c/algos/i2c-algo-pcf.c b/drivers/i2c/algos/i2c-algo-pcf.c
index 7ce75775ec73..6b6bd06202b2 100644
--- a/drivers/i2c/algos/i2c-algo-pcf.c
+++ b/drivers/i2c/algos/i2c-algo-pcf.c
@@ -176,7 +176,7 @@ static int pcf_init_8584 (struct i2c_algo_pcf_data *adap)
176 */ 176 */
177 if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) { 177 if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) {
178 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp)); 178 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp));
179 return -ENXIO; /* definetly not PCF8584 */ 179 return -ENXIO; /* definitely not PCF8584 */
180 } 180 }
181 181
182 /* load own address in S0, effective address is (own << 1) */ 182 /* load own address in S0, effective address is (own << 1) */
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 9da5b05cdb52..299b918455a3 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -416,9 +416,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
416 data->block[0] = 32; /* max for SMBus block reads */ 416 data->block[0] = 32; /* max for SMBus block reads */
417 } 417 }
418 418
419 /* Experience has shown that the block buffer can only be used for
420 SMBus (not I2C) block transactions, even though the datasheet
421 doesn't mention this limitation. */
419 if ((i801_features & FEATURE_BLOCK_BUFFER) 422 if ((i801_features & FEATURE_BLOCK_BUFFER)
420 && !(command == I2C_SMBUS_I2C_BLOCK_DATA 423 && command != I2C_SMBUS_I2C_BLOCK_DATA
421 && read_write == I2C_SMBUS_READ)
422 && i801_set_block_buffer_mode() == 0) 424 && i801_set_block_buffer_mode() == 0)
423 result = i801_block_transaction_by_block(data, read_write, 425 result = i801_block_transaction_by_block(data, read_write,
424 hwpec); 426 hwpec);
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 913abd7c172f..c7c237537f81 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -850,7 +850,7 @@ static const struct i2c_algorithm omap_i2c_algo = {
850 .functionality = omap_i2c_func, 850 .functionality = omap_i2c_func,
851}; 851};
852 852
853static int __init 853static int __devinit
854omap_i2c_probe(struct platform_device *pdev) 854omap_i2c_probe(struct platform_device *pdev)
855{ 855{
856 struct omap_i2c_dev *dev; 856 struct omap_i2c_dev *dev;
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 1c440a70ec61..b289ec99eeba 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -122,9 +122,14 @@ static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
122 122
123 rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len); 123 rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
124 if (rc) { 124 if (rc) {
125 dev_err(&adap->dev, 125 if (rc == -ENXIO)
126 "I2C transfer at 0x%02x failed, size %d, err %d\n", 126 dev_dbg(&adap->dev,
127 addrdir >> 1, size, rc); 127 "I2C transfer at 0x%02x failed, size %d, "
128 "err %d\n", addrdir >> 1, size, rc);
129 else
130 dev_err(&adap->dev,
131 "I2C transfer at 0x%02x failed, size %d, "
132 "err %d\n", addrdir >> 1, size, rc);
128 goto bail; 133 goto bail;
129 } 134 }
130 135
@@ -175,10 +180,16 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
175 goto bail; 180 goto bail;
176 } 181 }
177 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len); 182 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
178 if (rc < 0) 183 if (rc < 0) {
179 dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n", 184 if (rc == -ENXIO)
180 addrdir & 1 ? "read from" : "write to", addrdir >> 1, 185 dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
181 rc); 186 addrdir & 1 ? "read from" : "write to",
187 addrdir >> 1, rc);
188 else
189 dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
190 addrdir & 1 ? "read from" : "write to",
191 addrdir >> 1, rc);
192 }
182 bail: 193 bail:
183 pmac_i2c_close(bus); 194 pmac_i2c_close(bus);
184 return rc < 0 ? rc : 1; 195 return rc < 0 ? rc : 1;
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 7647a20523a0..90ffbf6f9d4f 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -12,7 +12,7 @@
12 * 12 *
13 * History: 13 * History:
14 * Apr 2002: Initial version [CS] 14 * Apr 2002: Initial version [CS]
15 * Jun 2002: Properly seperated algo/adap [FB] 15 * Jun 2002: Properly separated algo/adap [FB]
16 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem] 16 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
17 * Jan 2003: added limited signal handling [Kai-Uwe Bloem] 17 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
18 * Sep 2004: Major rework to ensure efficient bus handling [RMK] 18 * Sep 2004: Major rework to ensure efficient bus handling [RMK]
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index eece39a5a30e..f0ef8da6c554 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -32,6 +32,7 @@
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/init.h> 33#include <linux/init.h>
34#include <linux/errno.h> 34#include <linux/errno.h>
35#include <linux/delay.h>
35#include <linux/platform_device.h> 36#include <linux/platform_device.h>
36#include <linux/i2c.h> 37#include <linux/i2c.h>
37#include <linux/interrupt.h> 38#include <linux/interrupt.h>
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
deleted file mode 100644
index ae4539d99bef..000000000000
--- a/drivers/i2c/chips/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1#
2# Miscellaneous I2C chip drivers configuration
3#
4# *** DEPRECATED! Do not add new entries! See Makefile ***
5#
6
7menu "Miscellaneous I2C Chip support"
8
9config SENSORS_TSL2550
10 tristate "Taos TSL2550 ambient light sensor"
11 depends on EXPERIMENTAL
12 help
13 If you say yes here you get support for the Taos TSL2550
14 ambient light sensor.
15
16 This driver can also be built as a module. If so, the module
17 will be called tsl2550.
18
19endmenu
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
deleted file mode 100644
index fe0af0f81f2d..000000000000
--- a/drivers/i2c/chips/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for miscellaneous I2C chip drivers.
3#
4# Do not add new drivers to this directory! It is DEPRECATED.
5#
6# Device drivers are better grouped according to the functionality they
7# implement rather than to the bus they are connected to. In particular:
8# * Hardware monitoring chip drivers go to drivers/hwmon
9# * RTC chip drivers go to drivers/rtc
10# * I/O expander drivers go to drivers/gpio
11#
12
13obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
14
15ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
16EXTRA_CFLAGS += -DDEBUG
17endif
18
diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c
index 421278221243..7a8201ed2181 100644
--- a/drivers/i2c/i2c-smbus.c
+++ b/drivers/i2c/i2c-smbus.c
@@ -22,7 +22,6 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/semaphore.h>
26#include <linux/interrupt.h> 25#include <linux/interrupt.h>
27#include <linux/workqueue.h> 26#include <linux/workqueue.h>
28#include <linux/i2c.h> 27#include <linux/i2c.h>
@@ -55,7 +54,7 @@ static int smbus_do_alert(struct device *dev, void *addrp)
55 * Drivers should either disable alerts, or provide at least 54 * Drivers should either disable alerts, or provide at least
56 * a minimal handler. Lock so client->driver won't change. 55 * a minimal handler. Lock so client->driver won't change.
57 */ 56 */
58 down(&dev->sem); 57 device_lock(dev);
59 if (client->driver) { 58 if (client->driver) {
60 if (client->driver->alert) 59 if (client->driver->alert)
61 client->driver->alert(client, data->flag); 60 client->driver->alert(client, data->flag);
@@ -63,7 +62,7 @@ static int smbus_do_alert(struct device *dev, void *addrp)
63 dev_warn(&client->dev, "no driver alert()!\n"); 62 dev_warn(&client->dev, "no driver alert()!\n");
64 } else 63 } else
65 dev_dbg(&client->dev, "alert with no driver\n"); 64 dev_dbg(&client->dev, "alert with no driver\n");
66 up(&dev->sem); 65 device_unlock(dev);
67 66
68 /* Stop iterating after we find the device */ 67 /* Stop iterating after we find the device */
69 return -EBUSY; 68 return -EBUSY;
diff --git a/drivers/ieee1394/nodemgr.c b/drivers/ieee1394/nodemgr.c
index 5122b5a8aa2d..18350213479e 100644
--- a/drivers/ieee1394/nodemgr.c
+++ b/drivers/ieee1394/nodemgr.c
@@ -19,7 +19,6 @@
19#include <linux/moduleparam.h> 19#include <linux/moduleparam.h>
20#include <linux/mutex.h> 20#include <linux/mutex.h>
21#include <linux/freezer.h> 21#include <linux/freezer.h>
22#include <linux/semaphore.h>
23#include <asm/atomic.h> 22#include <asm/atomic.h>
24 23
25#include "csr.h" 24#include "csr.h"
@@ -1397,9 +1396,9 @@ static int update_pdrv(struct device *dev, void *data)
1397 pdrv = container_of(drv, struct hpsb_protocol_driver, 1396 pdrv = container_of(drv, struct hpsb_protocol_driver,
1398 driver); 1397 driver);
1399 if (pdrv->update) { 1398 if (pdrv->update) {
1400 down(&ud->device.sem); 1399 device_lock(&ud->device);
1401 error = pdrv->update(ud); 1400 error = pdrv->update(ud);
1402 up(&ud->device.sem); 1401 device_unlock(&ud->device);
1403 } 1402 }
1404 if (error) 1403 if (error)
1405 device_release_driver(&ud->device); 1404 device_release_driver(&ud->device);
diff --git a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c
index 9555fd253865..bf47fee79808 100644
--- a/drivers/ieee1394/pcilynx.c
+++ b/drivers/ieee1394/pcilynx.c
@@ -1452,7 +1452,7 @@ static int __devinit add_card(struct pci_dev *dev,
1452 PRINT(KERN_ERR, lynx->id, "unable to read bus info block from i2c"); 1452 PRINT(KERN_ERR, lynx->id, "unable to read bus info block from i2c");
1453 } else { 1453 } else {
1454 PRINT(KERN_INFO, lynx->id, "got bus info block from serial eeprom"); 1454 PRINT(KERN_INFO, lynx->id, "got bus info block from serial eeprom");
1455 /* FIXME: probably we shoud rewrite the max_rec, max_ROM(1394a), 1455 /* FIXME: probably we should rewrite the max_rec, max_ROM(1394a),
1456 * generation(1394a) and link_spd(1394a) field and recalculate 1456 * generation(1394a) and link_spd(1394a) field and recalculate
1457 * the CRC */ 1457 * the CRC */
1458 1458
diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c
index 5130fc55b8e2..764787ebe8d8 100644
--- a/drivers/infiniband/core/cm.c
+++ b/drivers/infiniband/core/cm.c
@@ -3597,7 +3597,7 @@ static ssize_t cm_show_counter(struct kobject *obj, struct attribute *attr,
3597 atomic_long_read(&group->counter[cm_attr->index])); 3597 atomic_long_read(&group->counter[cm_attr->index]));
3598} 3598}
3599 3599
3600static struct sysfs_ops cm_counter_ops = { 3600static const struct sysfs_ops cm_counter_ops = {
3601 .show = cm_show_counter 3601 .show = cm_show_counter
3602}; 3602};
3603 3603
diff --git a/drivers/infiniband/core/mad.c b/drivers/infiniband/core/mad.c
index 58463da814d1..e351b1548535 100644
--- a/drivers/infiniband/core/mad.c
+++ b/drivers/infiniband/core/mad.c
@@ -2953,6 +2953,9 @@ static void ib_mad_remove_device(struct ib_device *device)
2953{ 2953{
2954 int i, num_ports, cur_port; 2954 int i, num_ports, cur_port;
2955 2955
2956 if (rdma_node_get_transport(device->node_type) != RDMA_TRANSPORT_IB)
2957 return;
2958
2956 if (device->node_type == RDMA_NODE_IB_SWITCH) { 2959 if (device->node_type == RDMA_NODE_IB_SWITCH) {
2957 num_ports = 1; 2960 num_ports = 1;
2958 cur_port = 0; 2961 cur_port = 0;
diff --git a/drivers/infiniband/core/sysfs.c b/drivers/infiniband/core/sysfs.c
index 158a214da2f7..1558bb7fc74d 100644
--- a/drivers/infiniband/core/sysfs.c
+++ b/drivers/infiniband/core/sysfs.c
@@ -79,7 +79,7 @@ static ssize_t port_attr_show(struct kobject *kobj,
79 return port_attr->show(p, port_attr, buf); 79 return port_attr->show(p, port_attr, buf);
80} 80}
81 81
82static struct sysfs_ops port_sysfs_ops = { 82static const struct sysfs_ops port_sysfs_ops = {
83 .show = port_attr_show 83 .show = port_attr_show
84}; 84};
85 85
diff --git a/drivers/infiniband/core/ucm.c b/drivers/infiniband/core/ucm.c
index 1b09b735c5a8..017d6e24448f 100644
--- a/drivers/infiniband/core/ucm.c
+++ b/drivers/infiniband/core/ucm.c
@@ -1336,11 +1336,8 @@ static void ib_ucm_remove_one(struct ib_device *device)
1336 device_unregister(&ucm_dev->dev); 1336 device_unregister(&ucm_dev->dev);
1337} 1337}
1338 1338
1339static ssize_t show_abi_version(struct class *class, char *buf) 1339static CLASS_ATTR_STRING(abi_version, S_IRUGO,
1340{ 1340 __stringify(IB_USER_CM_ABI_VERSION));
1341 return sprintf(buf, "%d\n", IB_USER_CM_ABI_VERSION);
1342}
1343static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);
1344 1341
1345static int __init ib_ucm_init(void) 1342static int __init ib_ucm_init(void)
1346{ 1343{
@@ -1353,7 +1350,7 @@ static int __init ib_ucm_init(void)
1353 goto error1; 1350 goto error1;
1354 } 1351 }
1355 1352
1356 ret = class_create_file(&cm_class, &class_attr_abi_version); 1353 ret = class_create_file(&cm_class, &class_attr_abi_version.attr);
1357 if (ret) { 1354 if (ret) {
1358 printk(KERN_ERR "ucm: couldn't create abi_version attribute\n"); 1355 printk(KERN_ERR "ucm: couldn't create abi_version attribute\n");
1359 goto error2; 1356 goto error2;
@@ -1367,7 +1364,7 @@ static int __init ib_ucm_init(void)
1367 return 0; 1364 return 0;
1368 1365
1369error3: 1366error3:
1370 class_remove_file(&cm_class, &class_attr_abi_version); 1367 class_remove_file(&cm_class, &class_attr_abi_version.attr);
1371error2: 1368error2:
1372 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES); 1369 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES);
1373error1: 1370error1:
@@ -1377,7 +1374,7 @@ error1:
1377static void __exit ib_ucm_cleanup(void) 1374static void __exit ib_ucm_cleanup(void)
1378{ 1375{
1379 ib_unregister_client(&ucm_client); 1376 ib_unregister_client(&ucm_client);
1380 class_remove_file(&cm_class, &class_attr_abi_version); 1377 class_remove_file(&cm_class, &class_attr_abi_version.attr);
1381 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES); 1378 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES);
1382 if (overflow_maj) 1379 if (overflow_maj)
1383 unregister_chrdev_region(overflow_maj, IB_UCM_MAX_DEVICES); 1380 unregister_chrdev_region(overflow_maj, IB_UCM_MAX_DEVICES);
diff --git a/drivers/infiniband/core/user_mad.c b/drivers/infiniband/core/user_mad.c
index 02d360cfc2f7..04b585e86cb2 100644
--- a/drivers/infiniband/core/user_mad.c
+++ b/drivers/infiniband/core/user_mad.c
@@ -965,11 +965,8 @@ static ssize_t show_port(struct device *dev, struct device_attribute *attr,
965} 965}
966static DEVICE_ATTR(port, S_IRUGO, show_port, NULL); 966static DEVICE_ATTR(port, S_IRUGO, show_port, NULL);
967 967
968static ssize_t show_abi_version(struct class *class, char *buf) 968static CLASS_ATTR_STRING(abi_version, S_IRUGO,
969{ 969 __stringify(IB_USER_MAD_ABI_VERSION));
970 return sprintf(buf, "%d\n", IB_USER_MAD_ABI_VERSION);
971}
972static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);
973 970
974static dev_t overflow_maj; 971static dev_t overflow_maj;
975static DECLARE_BITMAP(overflow_map, IB_UMAD_MAX_PORTS); 972static DECLARE_BITMAP(overflow_map, IB_UMAD_MAX_PORTS);
@@ -1194,7 +1191,7 @@ static int __init ib_umad_init(void)
1194 goto out_chrdev; 1191 goto out_chrdev;
1195 } 1192 }
1196 1193
1197 ret = class_create_file(umad_class, &class_attr_abi_version); 1194 ret = class_create_file(umad_class, &class_attr_abi_version.attr);
1198 if (ret) { 1195 if (ret) {
1199 printk(KERN_ERR "user_mad: couldn't create abi_version attribute\n"); 1196 printk(KERN_ERR "user_mad: couldn't create abi_version attribute\n");
1200 goto out_class; 1197 goto out_class;
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c
index 4fa2e6516441..d805cf365c8d 100644
--- a/drivers/infiniband/core/uverbs_main.c
+++ b/drivers/infiniband/core/uverbs_main.c
@@ -691,11 +691,8 @@ static ssize_t show_dev_abi_version(struct device *device,
691} 691}
692static DEVICE_ATTR(abi_version, S_IRUGO, show_dev_abi_version, NULL); 692static DEVICE_ATTR(abi_version, S_IRUGO, show_dev_abi_version, NULL);
693 693
694static ssize_t show_abi_version(struct class *class, char *buf) 694static CLASS_ATTR_STRING(abi_version, S_IRUGO,
695{ 695 __stringify(IB_USER_VERBS_ABI_VERSION));
696 return sprintf(buf, "%d\n", IB_USER_VERBS_ABI_VERSION);
697}
698static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);
699 696
700static dev_t overflow_maj; 697static dev_t overflow_maj;
701static DECLARE_BITMAP(overflow_map, IB_UVERBS_MAX_DEVICES); 698static DECLARE_BITMAP(overflow_map, IB_UVERBS_MAX_DEVICES);
@@ -841,7 +838,7 @@ static int __init ib_uverbs_init(void)
841 goto out_chrdev; 838 goto out_chrdev;
842 } 839 }
843 840
844 ret = class_create_file(uverbs_class, &class_attr_abi_version); 841 ret = class_create_file(uverbs_class, &class_attr_abi_version.attr);
845 if (ret) { 842 if (ret) {
846 printk(KERN_ERR "user_verbs: couldn't create abi_version attribute\n"); 843 printk(KERN_ERR "user_verbs: couldn't create abi_version attribute\n");
847 goto out_class; 844 goto out_class;
diff --git a/drivers/infiniband/hw/cxgb3/iwch.c b/drivers/infiniband/hw/cxgb3/iwch.c
index ee1d8b4d4541..63f975f3e30f 100644
--- a/drivers/infiniband/hw/cxgb3/iwch.c
+++ b/drivers/infiniband/hw/cxgb3/iwch.c
@@ -189,6 +189,7 @@ static void close_rnic_dev(struct t3cdev *tdev)
189 list_for_each_entry_safe(dev, tmp, &dev_list, entry) { 189 list_for_each_entry_safe(dev, tmp, &dev_list, entry) {
190 if (dev->rdev.t3cdev_p == tdev) { 190 if (dev->rdev.t3cdev_p == tdev) {
191 dev->rdev.flags = CXIO_ERROR_FATAL; 191 dev->rdev.flags = CXIO_ERROR_FATAL;
192 synchronize_net();
192 cancel_delayed_work_sync(&dev->db_drop_task); 193 cancel_delayed_work_sync(&dev->db_drop_task);
193 list_del(&dev->entry); 194 list_del(&dev->entry);
194 iwch_unregister_device(dev); 195 iwch_unregister_device(dev);
@@ -217,6 +218,7 @@ static void iwch_event_handler(struct t3cdev *tdev, u32 evt, u32 port_id)
217 switch (evt) { 218 switch (evt) {
218 case OFFLOAD_STATUS_DOWN: { 219 case OFFLOAD_STATUS_DOWN: {
219 rdev->flags = CXIO_ERROR_FATAL; 220 rdev->flags = CXIO_ERROR_FATAL;
221 synchronize_net();
220 event.event = IB_EVENT_DEVICE_FATAL; 222 event.event = IB_EVENT_DEVICE_FATAL;
221 dispatch = 1; 223 dispatch = 1;
222 break; 224 break;
diff --git a/drivers/infiniband/hw/ehca/ehca_qes.h b/drivers/infiniband/hw/ehca/ehca_qes.h
index 5d28e3e98a20..90c4efa67586 100644
--- a/drivers/infiniband/hw/ehca/ehca_qes.h
+++ b/drivers/infiniband/hw/ehca/ehca_qes.h
@@ -46,7 +46,7 @@
46 46
47#include "ehca_tools.h" 47#include "ehca_tools.h"
48 48
49/* virtual scatter gather entry to specify remote adresses with length */ 49/* virtual scatter gather entry to specify remote addresses with length */
50struct ehca_vsgentry { 50struct ehca_vsgentry {
51 u64 vaddr; 51 u64 vaddr;
52 u32 lkey; 52 u32 lkey;
@@ -148,7 +148,7 @@ struct ehca_wqe {
148 u32 immediate_data; 148 u32 immediate_data;
149 union { 149 union {
150 struct { 150 struct {
151 u64 remote_virtual_adress; 151 u64 remote_virtual_address;
152 u32 rkey; 152 u32 rkey;
153 u32 reserved; 153 u32 reserved;
154 u64 atomic_1st_op_dma_len; 154 u64 atomic_1st_op_dma_len;
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index e3ec7fdd67bd..9a3fbfca9b41 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -269,7 +269,7 @@ static inline int ehca_write_swqe(struct ehca_qp *qp,
269 /* no break is intentional here */ 269 /* no break is intentional here */
270 case IB_QPT_RC: 270 case IB_QPT_RC:
271 /* TODO: atomic not implemented */ 271 /* TODO: atomic not implemented */
272 wqe_p->u.nud.remote_virtual_adress = 272 wqe_p->u.nud.remote_virtual_address =
273 send_wr->wr.rdma.remote_addr; 273 send_wr->wr.rdma.remote_addr;
274 wqe_p->u.nud.rkey = send_wr->wr.rdma.rkey; 274 wqe_p->u.nud.rkey = send_wr->wr.rdma.rkey;
275 275
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index ce7f53833577..925075557dc2 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -1899,9 +1899,14 @@ void nes_destroy_nic_qp(struct nes_vnic *nesvnic)
1899 u16 wqe_fragment_index; 1899 u16 wqe_fragment_index;
1900 u64 wqe_frag; 1900 u64 wqe_frag;
1901 u32 cqp_head; 1901 u32 cqp_head;
1902 u32 wqm_cfg0;
1902 unsigned long flags; 1903 unsigned long flags;
1903 int ret; 1904 int ret;
1904 1905
1906 /* clear wqe stall before destroying NIC QP */
1907 wqm_cfg0 = nes_read_indexed(nesdev, NES_IDX_WQM_CONFIG0);
1908 nes_write_indexed(nesdev, NES_IDX_WQM_CONFIG0, wqm_cfg0 & 0xFFFF7FFF);
1909
1905 /* Free remaining NIC receive buffers */ 1910 /* Free remaining NIC receive buffers */
1906 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) { 1911 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) {
1907 nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail]; 1912 nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail];
@@ -2020,6 +2025,9 @@ void nes_destroy_nic_qp(struct nes_vnic *nesvnic)
2020 2025
2021 pci_free_consistent(nesdev->pcidev, nesvnic->nic_mem_size, nesvnic->nic_vbase, 2026 pci_free_consistent(nesdev->pcidev, nesvnic->nic_mem_size, nesvnic->nic_vbase,
2022 nesvnic->nic_pbase); 2027 nesvnic->nic_pbase);
2028
2029 /* restore old wqm_cfg0 value */
2030 nes_write_indexed(nesdev, NES_IDX_WQM_CONFIG0, wqm_cfg0);
2023} 2031}
2024 2032
2025/** 2033/**
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
index 9b1e7f869d83..bbbfe9fc5a5a 100644
--- a/drivers/infiniband/hw/nes/nes_hw.h
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -160,6 +160,7 @@ enum indexed_regs {
160 NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI = 0x7004, 160 NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI = 0x7004,
161 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO = 0x7008, 161 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO = 0x7008,
162 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI = 0x700c, 162 NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI = 0x700c,
163 NES_IDX_WQM_CONFIG0 = 0x5000,
163 NES_IDX_WQM_CONFIG1 = 0x5004, 164 NES_IDX_WQM_CONFIG1 = 0x5004,
164 NES_IDX_CM_CONFIG = 0x5100, 165 NES_IDX_CM_CONFIG = 0x5100,
165 NES_IDX_NIC_LOGPORT_TO_PHYPORT = 0x6000, 166 NES_IDX_NIC_LOGPORT_TO_PHYPORT = 0x6000,
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index a1d79b6856ac..91fdde382e82 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -1595,7 +1595,6 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1595 struct nes_vnic *nesvnic; 1595 struct nes_vnic *nesvnic;
1596 struct net_device *netdev; 1596 struct net_device *netdev;
1597 struct nic_qp_map *curr_qp_map; 1597 struct nic_qp_map *curr_qp_map;
1598 u32 u32temp;
1599 u8 phy_type = nesdev->nesadapter->phy_type[nesdev->mac_index]; 1598 u8 phy_type = nesdev->nesadapter->phy_type[nesdev->mac_index];
1600 1599
1601 netdev = alloc_etherdev(sizeof(struct nes_vnic)); 1600 netdev = alloc_etherdev(sizeof(struct nes_vnic));
@@ -1707,6 +1706,10 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1707 ((phy_type == NES_PHY_TYPE_PUMA_1G) && 1706 ((phy_type == NES_PHY_TYPE_PUMA_1G) &&
1708 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) || 1707 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) ||
1709 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) { 1708 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) {
1709 u32 u32temp;
1710 u32 link_mask;
1711 u32 link_val;
1712
1710 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1713 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1711 (0x200 * (nesdev->mac_index & 1))); 1714 (0x200 * (nesdev->mac_index & 1)));
1712 if (phy_type != NES_PHY_TYPE_PUMA_1G) { 1715 if (phy_type != NES_PHY_TYPE_PUMA_1G) {
@@ -1715,13 +1718,36 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1715 (0x200 * (nesdev->mac_index & 1)), u32temp); 1718 (0x200 * (nesdev->mac_index & 1)), u32temp);
1716 } 1719 }
1717 1720
1721 /* Check and set linkup here. This is for back to back */
1722 /* configuration where second port won't get link interrupt */
1723 switch (phy_type) {
1724 case NES_PHY_TYPE_PUMA_1G:
1725 if (nesdev->mac_index < 2) {
1726 link_mask = 0x01010000;
1727 link_val = 0x01010000;
1728 } else {
1729 link_mask = 0x02020000;
1730 link_val = 0x02020000;
1731 }
1732 break;
1733 default:
1734 link_mask = 0x0f1f0000;
1735 link_val = 0x0f0f0000;
1736 break;
1737 }
1738
1739 u32temp = nes_read_indexed(nesdev,
1740 NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1741 (0x200 * (nesdev->mac_index & 1)));
1742 if ((u32temp & link_mask) == link_val)
1743 nesvnic->linkup = 1;
1744
1718 /* clear the MAC interrupt status, assumes direct logical to physical mapping */ 1745 /* clear the MAC interrupt status, assumes direct logical to physical mapping */
1719 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); 1746 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index));
1720 nes_debug(NES_DBG_INIT, "Phy interrupt status = 0x%X.\n", u32temp); 1747 nes_debug(NES_DBG_INIT, "Phy interrupt status = 0x%X.\n", u32temp);
1721 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index), u32temp); 1748 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index), u32temp);
1722 1749
1723 nes_init_phy(nesdev); 1750 nes_init_phy(nesdev);
1724
1725 } 1751 }
1726 1752
1727 return netdev; 1753 return netdev;
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index 815725f886c4..69928296d74b 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -1323,6 +1323,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
1323 nesqp->nesqp_context->aeq_token_low = cpu_to_le32((u32)((unsigned long)(nesqp))); 1323 nesqp->nesqp_context->aeq_token_low = cpu_to_le32((u32)((unsigned long)(nesqp)));
1324 nesqp->nesqp_context->aeq_token_high = cpu_to_le32((u32)(upper_32_bits((unsigned long)(nesqp)))); 1324 nesqp->nesqp_context->aeq_token_high = cpu_to_le32((u32)(upper_32_bits((unsigned long)(nesqp))));
1325 nesqp->nesqp_context->ird_ord_sizes = cpu_to_le32(NES_QPCONTEXT_ORDIRD_ALSMM | 1325 nesqp->nesqp_context->ird_ord_sizes = cpu_to_le32(NES_QPCONTEXT_ORDIRD_ALSMM |
1326 NES_QPCONTEXT_ORDIRD_AAH |
1326 ((((u32)nesadapter->max_irrq_wr) << 1327 ((((u32)nesadapter->max_irrq_wr) <<
1327 NES_QPCONTEXT_ORDIRD_IRDSIZE_SHIFT) & NES_QPCONTEXT_ORDIRD_IRDSIZE_MASK)); 1328 NES_QPCONTEXT_ORDIRD_IRDSIZE_SHIFT) & NES_QPCONTEXT_ORDIRD_IRDSIZE_MASK));
1328 if (disable_mpa_crc) { 1329 if (disable_mpa_crc) {
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
index 83a7751c38d6..bc658373ad55 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
@@ -708,6 +708,7 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_
708 struct ipoib_dev_priv *priv = netdev_priv(dev); 708 struct ipoib_dev_priv *priv = netdev_priv(dev);
709 struct ipoib_cm_tx_buf *tx_req; 709 struct ipoib_cm_tx_buf *tx_req;
710 u64 addr; 710 u64 addr;
711 int rc;
711 712
712 if (unlikely(skb->len > tx->mtu)) { 713 if (unlikely(skb->len > tx->mtu)) {
713 ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n", 714 ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n",
@@ -739,9 +740,10 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_
739 740
740 tx_req->mapping = addr; 741 tx_req->mapping = addr;
741 742
742 if (unlikely(post_send(priv, tx, tx->tx_head & (ipoib_sendq_size - 1), 743 rc = post_send(priv, tx, tx->tx_head & (ipoib_sendq_size - 1),
743 addr, skb->len))) { 744 addr, skb->len);
744 ipoib_warn(priv, "post_send failed\n"); 745 if (unlikely(rc)) {
746 ipoib_warn(priv, "post_send failed, error %d\n", rc);
745 ++dev->stats.tx_errors; 747 ++dev->stats.tx_errors;
746 ib_dma_unmap_single(priv->ca, addr, skb->len, DMA_TO_DEVICE); 748 ib_dma_unmap_single(priv->ca, addr, skb->len, DMA_TO_DEVICE);
747 dev_kfree_skb_any(skb); 749 dev_kfree_skb_any(skb);
@@ -752,6 +754,8 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_
752 if (++priv->tx_outstanding == ipoib_sendq_size) { 754 if (++priv->tx_outstanding == ipoib_sendq_size) {
753 ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n", 755 ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n",
754 tx->qp->qp_num); 756 tx->qp->qp_num);
757 if (ib_req_notify_cq(priv->send_cq, IB_CQ_NEXT_COMP))
758 ipoib_warn(priv, "request notify on send CQ failed\n");
755 netif_stop_queue(dev); 759 netif_stop_queue(dev);
756 } 760 }
757 } 761 }
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
index 8c91d9f37ada..5df40b128f81 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
@@ -529,7 +529,7 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
529{ 529{
530 struct ipoib_dev_priv *priv = netdev_priv(dev); 530 struct ipoib_dev_priv *priv = netdev_priv(dev);
531 struct ipoib_tx_buf *tx_req; 531 struct ipoib_tx_buf *tx_req;
532 int hlen; 532 int hlen, rc;
533 void *phead; 533 void *phead;
534 534
535 if (skb_is_gso(skb)) { 535 if (skb_is_gso(skb)) {
@@ -585,9 +585,10 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
585 netif_stop_queue(dev); 585 netif_stop_queue(dev);
586 } 586 }
587 587
588 if (unlikely(post_send(priv, priv->tx_head & (ipoib_sendq_size - 1), 588 rc = post_send(priv, priv->tx_head & (ipoib_sendq_size - 1),
589 address->ah, qpn, tx_req, phead, hlen))) { 589 address->ah, qpn, tx_req, phead, hlen);
590 ipoib_warn(priv, "post_send failed\n"); 590 if (unlikely(rc)) {
591 ipoib_warn(priv, "post_send failed, error %d\n", rc);
591 ++dev->stats.tx_errors; 592 ++dev->stats.tx_errors;
592 --priv->tx_outstanding; 593 --priv->tx_outstanding;
593 ipoib_dma_unmap_tx(priv->ca, tx_req); 594 ipoib_dma_unmap_tx(priv->ca, tx_req);
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index 9f9816baeb97..2ee6c7a68bdc 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -515,7 +515,7 @@ static long evdev_do_ioctl(struct file *file, unsigned int cmd,
515 struct input_absinfo abs; 515 struct input_absinfo abs;
516 struct ff_effect effect; 516 struct ff_effect effect;
517 int __user *ip = (int __user *)p; 517 int __user *ip = (int __user *)p;
518 int i, t, u, v; 518 unsigned int i, t, u, v;
519 int error; 519 int error;
520 520
521 switch (cmd) { 521 switch (cmd) {
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 41168d5f8c17..e2aad0a51826 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -582,7 +582,8 @@ static int input_fetch_keycode(struct input_dev *dev, int scancode)
582} 582}
583 583
584static int input_default_getkeycode(struct input_dev *dev, 584static int input_default_getkeycode(struct input_dev *dev,
585 int scancode, int *keycode) 585 unsigned int scancode,
586 unsigned int *keycode)
586{ 587{
587 if (!dev->keycodesize) 588 if (!dev->keycodesize)
588 return -EINVAL; 589 return -EINVAL;
@@ -596,7 +597,8 @@ static int input_default_getkeycode(struct input_dev *dev,
596} 597}
597 598
598static int input_default_setkeycode(struct input_dev *dev, 599static int input_default_setkeycode(struct input_dev *dev,
599 int scancode, int keycode) 600 unsigned int scancode,
601 unsigned int keycode)
600{ 602{
601 int old_keycode; 603 int old_keycode;
602 int i; 604 int i;
@@ -654,11 +656,9 @@ static int input_default_setkeycode(struct input_dev *dev,
654 * This function should be called by anyone interested in retrieving current 656 * This function should be called by anyone interested in retrieving current
655 * keymap. Presently keyboard and evdev handlers use it. 657 * keymap. Presently keyboard and evdev handlers use it.
656 */ 658 */
657int input_get_keycode(struct input_dev *dev, int scancode, int *keycode) 659int input_get_keycode(struct input_dev *dev,
660 unsigned int scancode, unsigned int *keycode)
658{ 661{
659 if (scancode < 0)
660 return -EINVAL;
661
662 return dev->getkeycode(dev, scancode, keycode); 662 return dev->getkeycode(dev, scancode, keycode);
663} 663}
664EXPORT_SYMBOL(input_get_keycode); 664EXPORT_SYMBOL(input_get_keycode);
@@ -672,16 +672,14 @@ EXPORT_SYMBOL(input_get_keycode);
672 * This function should be called by anyone needing to update current 672 * This function should be called by anyone needing to update current
673 * keymap. Presently keyboard and evdev handlers use it. 673 * keymap. Presently keyboard and evdev handlers use it.
674 */ 674 */
675int input_set_keycode(struct input_dev *dev, int scancode, int keycode) 675int input_set_keycode(struct input_dev *dev,
676 unsigned int scancode, unsigned int keycode)
676{ 677{
677 unsigned long flags; 678 unsigned long flags;
678 int old_keycode; 679 int old_keycode;
679 int retval; 680 int retval;
680 681
681 if (scancode < 0) 682 if (keycode > KEY_MAX)
682 return -EINVAL;
683
684 if (keycode < 0 || keycode > KEY_MAX)
685 return -EINVAL; 683 return -EINVAL;
686 684
687 spin_lock_irqsave(&dev->event_lock, flags); 685 spin_lock_irqsave(&dev->event_lock, flags);
@@ -1881,35 +1879,37 @@ static int input_open_file(struct inode *inode, struct file *file)
1881 const struct file_operations *old_fops, *new_fops = NULL; 1879 const struct file_operations *old_fops, *new_fops = NULL;
1882 int err; 1880 int err;
1883 1881
1884 lock_kernel(); 1882 err = mutex_lock_interruptible(&input_mutex);
1883 if (err)
1884 return err;
1885
1885 /* No load-on-demand here? */ 1886 /* No load-on-demand here? */
1886 handler = input_table[iminor(inode) >> 5]; 1887 handler = input_table[iminor(inode) >> 5];
1887 if (!handler || !(new_fops = fops_get(handler->fops))) { 1888 if (handler)
1888 err = -ENODEV; 1889 new_fops = fops_get(handler->fops);
1889 goto out; 1890
1890 } 1891 mutex_unlock(&input_mutex);
1891 1892
1892 /* 1893 /*
1893 * That's _really_ odd. Usually NULL ->open means "nothing special", 1894 * That's _really_ odd. Usually NULL ->open means "nothing special",
1894 * not "no device". Oh, well... 1895 * not "no device". Oh, well...
1895 */ 1896 */
1896 if (!new_fops->open) { 1897 if (!new_fops || !new_fops->open) {
1897 fops_put(new_fops); 1898 fops_put(new_fops);
1898 err = -ENODEV; 1899 err = -ENODEV;
1899 goto out; 1900 goto out;
1900 } 1901 }
1902
1901 old_fops = file->f_op; 1903 old_fops = file->f_op;
1902 file->f_op = new_fops; 1904 file->f_op = new_fops;
1903 1905
1904 err = new_fops->open(inode, file); 1906 err = new_fops->open(inode, file);
1905
1906 if (err) { 1907 if (err) {
1907 fops_put(file->f_op); 1908 fops_put(file->f_op);
1908 file->f_op = fops_get(old_fops); 1909 file->f_op = fops_get(old_fops);
1909 } 1910 }
1910 fops_put(old_fops); 1911 fops_put(old_fops);
1911out: 1912out:
1912 unlock_kernel();
1913 return err; 1913 return err;
1914} 1914}
1915 1915
diff --git a/drivers/input/joystick/gamecon.c b/drivers/input/joystick/gamecon.c
index ae998d99a5ae..7a55714a1486 100644
--- a/drivers/input/joystick/gamecon.c
+++ b/drivers/input/joystick/gamecon.c
@@ -819,7 +819,7 @@ static int __init gc_setup_pad(struct gc *gc, int idx, int pad_type)
819 int i; 819 int i;
820 int err; 820 int err;
821 821
822 if (pad_type < 1 || pad_type > GC_MAX) { 822 if (pad_type < 1 || pad_type >= GC_MAX) {
823 pr_err("Pad type %d unknown\n", pad_type); 823 pr_err("Pad type %d unknown\n", pad_type);
824 return -EINVAL; 824 return -EINVAL;
825 } 825 }
diff --git a/drivers/input/keyboard/bf54x-keys.c b/drivers/input/keyboard/bf54x-keys.c
index fe376a27fe57..593c052416b9 100644
--- a/drivers/input/keyboard/bf54x-keys.c
+++ b/drivers/input/keyboard/bf54x-keys.c
@@ -162,7 +162,7 @@ static irqreturn_t bfin_kpad_isr(int irq, void *dev_id)
162 input_sync(input); 162 input_sync(input);
163 163
164 if (bfin_kpad_get_keypressed(bf54x_kpad)) { 164 if (bfin_kpad_get_keypressed(bf54x_kpad)) {
165 disable_irq(bf54x_kpad->irq); 165 disable_irq_nosync(bf54x_kpad->irq);
166 bf54x_kpad->lastkey = key; 166 bf54x_kpad->lastkey = key;
167 mod_timer(&bf54x_kpad->timer, 167 mod_timer(&bf54x_kpad->timer,
168 jiffies + bf54x_kpad->keyup_test_jiffies); 168 jiffies + bf54x_kpad->keyup_test_jiffies);
diff --git a/drivers/input/keyboard/locomokbd.c b/drivers/input/keyboard/locomokbd.c
index 9caed30f3bbb..b1ab29861e1c 100644
--- a/drivers/input/keyboard/locomokbd.c
+++ b/drivers/input/keyboard/locomokbd.c
@@ -192,11 +192,18 @@ static void locomokbd_scankeyboard(struct locomokbd *locomokbd)
192static irqreturn_t locomokbd_interrupt(int irq, void *dev_id) 192static irqreturn_t locomokbd_interrupt(int irq, void *dev_id)
193{ 193{
194 struct locomokbd *locomokbd = dev_id; 194 struct locomokbd *locomokbd = dev_id;
195 u16 r;
196
197 r = locomo_readl(locomokbd->base + LOCOMO_KIC);
198 if ((r & 0x0001) == 0)
199 return IRQ_HANDLED;
200
201 locomo_writel(r & ~0x0100, locomokbd->base + LOCOMO_KIC); /* Ack */
202
195 /** wait chattering delay **/ 203 /** wait chattering delay **/
196 udelay(100); 204 udelay(100);
197 205
198 locomokbd_scankeyboard(locomokbd); 206 locomokbd_scankeyboard(locomokbd);
199
200 return IRQ_HANDLED; 207 return IRQ_HANDLED;
201} 208}
202 209
@@ -210,6 +217,25 @@ static void locomokbd_timer_callback(unsigned long data)
210 locomokbd_scankeyboard(locomokbd); 217 locomokbd_scankeyboard(locomokbd);
211} 218}
212 219
220static int locomokbd_open(struct input_dev *dev)
221{
222 struct locomokbd *locomokbd = input_get_drvdata(dev);
223 u16 r;
224
225 r = locomo_readl(locomokbd->base + LOCOMO_KIC) | 0x0010;
226 locomo_writel(r, locomokbd->base + LOCOMO_KIC);
227 return 0;
228}
229
230static void locomokbd_close(struct input_dev *dev)
231{
232 struct locomokbd *locomokbd = input_get_drvdata(dev);
233 u16 r;
234
235 r = locomo_readl(locomokbd->base + LOCOMO_KIC) & ~0x0010;
236 locomo_writel(r, locomokbd->base + LOCOMO_KIC);
237}
238
213static int __devinit locomokbd_probe(struct locomo_dev *dev) 239static int __devinit locomokbd_probe(struct locomo_dev *dev)
214{ 240{
215 struct locomokbd *locomokbd; 241 struct locomokbd *locomokbd;
@@ -253,6 +279,8 @@ static int __devinit locomokbd_probe(struct locomo_dev *dev)
253 input_dev->id.vendor = 0x0001; 279 input_dev->id.vendor = 0x0001;
254 input_dev->id.product = 0x0001; 280 input_dev->id.product = 0x0001;
255 input_dev->id.version = 0x0100; 281 input_dev->id.version = 0x0100;
282 input_dev->open = locomokbd_open;
283 input_dev->close = locomokbd_close;
256 input_dev->dev.parent = &dev->dev; 284 input_dev->dev.parent = &dev->dev;
257 285
258 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP) | 286 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP) |
@@ -261,6 +289,8 @@ static int __devinit locomokbd_probe(struct locomo_dev *dev)
261 input_dev->keycodesize = sizeof(locomokbd_keycode[0]); 289 input_dev->keycodesize = sizeof(locomokbd_keycode[0]);
262 input_dev->keycodemax = ARRAY_SIZE(locomokbd_keycode); 290 input_dev->keycodemax = ARRAY_SIZE(locomokbd_keycode);
263 291
292 input_set_drvdata(input_dev, locomokbd);
293
264 memcpy(locomokbd->keycode, locomokbd_keycode, sizeof(locomokbd->keycode)); 294 memcpy(locomokbd->keycode, locomokbd_keycode, sizeof(locomokbd->keycode));
265 for (i = 0; i < LOCOMOKBD_NUMKEYS; i++) 295 for (i = 0; i < LOCOMOKBD_NUMKEYS; i++)
266 set_bit(locomokbd->keycode[i], input_dev->keybit); 296 set_bit(locomokbd->keycode[i], input_dev->keybit);
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 7097bfe581d7..23140a3bb8e0 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -214,6 +214,17 @@ config INPUT_TWL4030_PWRBUTTON
214 To compile this driver as a module, choose M here. The module will 214 To compile this driver as a module, choose M here. The module will
215 be called twl4030_pwrbutton. 215 be called twl4030_pwrbutton.
216 216
217config INPUT_TWL4030_VIBRA
218 tristate "Support for TWL4030 Vibrator"
219 depends on TWL4030_CORE
220 select TWL4030_CODEC
221 select INPUT_FF_MEMLESS
222 help
223 This option enables support for TWL4030 Vibrator Driver.
224
225 To compile this driver as a module, choose M here. The module will
226 be called twl4030_vibra.
227
217config INPUT_UINPUT 228config INPUT_UINPUT
218 tristate "User level driver support" 229 tristate "User level driver support"
219 help 230 help
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index b611615e24ad..7e95a5d474dc 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_INPUT_GPIO_ROTARY_ENCODER) += rotary_encoder.o
26obj-$(CONFIG_INPUT_SGI_BTNS) += sgi_btns.o 26obj-$(CONFIG_INPUT_SGI_BTNS) += sgi_btns.o
27obj-$(CONFIG_INPUT_SPARCSPKR) += sparcspkr.o 27obj-$(CONFIG_INPUT_SPARCSPKR) += sparcspkr.o
28obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o 28obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o
29obj-$(CONFIG_INPUT_TWL4030_VIBRA) += twl4030-vibra.o
29obj-$(CONFIG_INPUT_UINPUT) += uinput.o 30obj-$(CONFIG_INPUT_UINPUT) += uinput.o
30obj-$(CONFIG_INPUT_WINBOND_CIR) += winbond-cir.o 31obj-$(CONFIG_INPUT_WINBOND_CIR) += winbond-cir.o
31obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o 32obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o
diff --git a/drivers/input/misc/ati_remote2.c b/drivers/input/misc/ati_remote2.c
index 0501f0e65157..15be5430bc6d 100644
--- a/drivers/input/misc/ati_remote2.c
+++ b/drivers/input/misc/ati_remote2.c
@@ -474,10 +474,11 @@ static void ati_remote2_complete_key(struct urb *urb)
474} 474}
475 475
476static int ati_remote2_getkeycode(struct input_dev *idev, 476static int ati_remote2_getkeycode(struct input_dev *idev,
477 int scancode, int *keycode) 477 unsigned int scancode, unsigned int *keycode)
478{ 478{
479 struct ati_remote2 *ar2 = input_get_drvdata(idev); 479 struct ati_remote2 *ar2 = input_get_drvdata(idev);
480 int index, mode; 480 unsigned int mode;
481 int index;
481 482
482 mode = scancode >> 8; 483 mode = scancode >> 8;
483 if (mode > ATI_REMOTE2_PC || !((1 << mode) & ar2->mode_mask)) 484 if (mode > ATI_REMOTE2_PC || !((1 << mode) & ar2->mode_mask))
@@ -491,10 +492,12 @@ static int ati_remote2_getkeycode(struct input_dev *idev,
491 return 0; 492 return 0;
492} 493}
493 494
494static int ati_remote2_setkeycode(struct input_dev *idev, int scancode, int keycode) 495static int ati_remote2_setkeycode(struct input_dev *idev,
496 unsigned int scancode, unsigned int keycode)
495{ 497{
496 struct ati_remote2 *ar2 = input_get_drvdata(idev); 498 struct ati_remote2 *ar2 = input_get_drvdata(idev);
497 int index, mode, old_keycode; 499 unsigned int mode, old_keycode;
500 int index;
498 501
499 mode = scancode >> 8; 502 mode = scancode >> 8;
500 if (mode > ATI_REMOTE2_PC || !((1 << mode) & ar2->mode_mask)) 503 if (mode > ATI_REMOTE2_PC || !((1 << mode) & ar2->mode_mask))
@@ -504,9 +507,6 @@ static int ati_remote2_setkeycode(struct input_dev *idev, int scancode, int keyc
504 if (index < 0) 507 if (index < 0)
505 return -EINVAL; 508 return -EINVAL;
506 509
507 if (keycode < KEY_RESERVED || keycode > KEY_MAX)
508 return -EINVAL;
509
510 old_keycode = ar2->keycode[mode][index]; 510 old_keycode = ar2->keycode[mode][index];
511 ar2->keycode[mode][index] = keycode; 511 ar2->keycode[mode][index] = keycode;
512 __set_bit(keycode, idev->keybit); 512 __set_bit(keycode, idev->keybit);
diff --git a/drivers/input/misc/twl4030-vibra.c b/drivers/input/misc/twl4030-vibra.c
new file mode 100644
index 000000000000..2fb79e064da3
--- /dev/null
+++ b/drivers/input/misc/twl4030-vibra.c
@@ -0,0 +1,297 @@
1/*
2 * twl4030-vibra.c - TWL4030 Vibrator driver
3 *
4 * Copyright (C) 2008-2010 Nokia Corporation
5 *
6 * Written by Henrik Saari <henrik.saari@nokia.com>
7 * Updates by Felipe Balbi <felipe.balbi@nokia.com>
8 * Input by Jari Vanhala <ext-jari.vanhala@nokia.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/jiffies.h>
28#include <linux/platform_device.h>
29#include <linux/workqueue.h>
30#include <linux/i2c/twl.h>
31#include <linux/mfd/twl4030-codec.h>
32#include <linux/input.h>
33
34/* MODULE ID2 */
35#define LEDEN 0x00
36
37/* ForceFeedback */
38#define EFFECT_DIR_180_DEG 0x8000 /* range is 0 - 0xFFFF */
39
40struct vibra_info {
41 struct device *dev;
42 struct input_dev *input_dev;
43
44 struct workqueue_struct *workqueue;
45 struct work_struct play_work;
46
47 bool enabled;
48 int speed;
49 int direction;
50
51 bool coexist;
52};
53
54static void vibra_disable_leds(void)
55{
56 u8 reg;
57
58 /* Disable LEDA & LEDB, cannot be used with vibra (PWM) */
59 twl_i2c_read_u8(TWL4030_MODULE_LED, &reg, LEDEN);
60 reg &= ~0x03;
61 twl_i2c_write_u8(TWL4030_MODULE_LED, LEDEN, reg);
62}
63
64/* Powers H-Bridge and enables audio clk */
65static void vibra_enable(struct vibra_info *info)
66{
67 u8 reg;
68
69 twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
70
71 /* turn H-Bridge on */
72 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE,
73 &reg, TWL4030_REG_VIBRA_CTL);
74 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
75 (reg | TWL4030_VIBRA_EN), TWL4030_REG_VIBRA_CTL);
76
77 twl4030_codec_enable_resource(TWL4030_CODEC_RES_APLL);
78
79 info->enabled = true;
80}
81
82static void vibra_disable(struct vibra_info *info)
83{
84 u8 reg;
85
86 /* Power down H-Bridge */
87 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE,
88 &reg, TWL4030_REG_VIBRA_CTL);
89 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
90 (reg & ~TWL4030_VIBRA_EN), TWL4030_REG_VIBRA_CTL);
91
92 twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
93 twl4030_codec_disable_resource(TWL4030_CODEC_RES_APLL);
94
95 info->enabled = false;
96}
97
98static void vibra_play_work(struct work_struct *work)
99{
100 struct vibra_info *info = container_of(work,
101 struct vibra_info, play_work);
102 int dir;
103 int pwm;
104 u8 reg;
105
106 dir = info->direction;
107 pwm = info->speed;
108
109 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE,
110 &reg, TWL4030_REG_VIBRA_CTL);
111 if (pwm && (!info->coexist || !(reg & TWL4030_VIBRA_SEL))) {
112
113 if (!info->enabled)
114 vibra_enable(info);
115
116 /* set vibra rotation direction */
117 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE,
118 &reg, TWL4030_REG_VIBRA_CTL);
119 reg = (dir) ? (reg | TWL4030_VIBRA_DIR) :
120 (reg & ~TWL4030_VIBRA_DIR);
121 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
122 reg, TWL4030_REG_VIBRA_CTL);
123
124 /* set PWM, 1 = max, 255 = min */
125 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
126 256 - pwm, TWL4030_REG_VIBRA_SET);
127 } else {
128 if (info->enabled)
129 vibra_disable(info);
130 }
131}
132
133/*** Input/ForceFeedback ***/
134
135static int vibra_play(struct input_dev *input, void *data,
136 struct ff_effect *effect)
137{
138 struct vibra_info *info = input_get_drvdata(input);
139
140 info->speed = effect->u.rumble.strong_magnitude >> 8;
141 if (!info->speed)
142 info->speed = effect->u.rumble.weak_magnitude >> 9;
143 info->direction = effect->direction < EFFECT_DIR_180_DEG ? 0 : 1;
144 queue_work(info->workqueue, &info->play_work);
145 return 0;
146}
147
148static int twl4030_vibra_open(struct input_dev *input)
149{
150 struct vibra_info *info = input_get_drvdata(input);
151
152 info->workqueue = create_singlethread_workqueue("vibra");
153 if (info->workqueue == NULL) {
154 dev_err(&input->dev, "couldn't create workqueue\n");
155 return -ENOMEM;
156 }
157 return 0;
158}
159
160static void twl4030_vibra_close(struct input_dev *input)
161{
162 struct vibra_info *info = input_get_drvdata(input);
163
164 cancel_work_sync(&info->play_work);
165 INIT_WORK(&info->play_work, vibra_play_work); /* cleanup */
166 destroy_workqueue(info->workqueue);
167 info->workqueue = NULL;
168
169 if (info->enabled)
170 vibra_disable(info);
171}
172
173/*** Module ***/
174#if CONFIG_PM
175static int twl4030_vibra_suspend(struct device *dev)
176{
177 struct platform_device *pdev = to_platform_device(dev);
178 struct vibra_info *info = platform_get_drvdata(pdev);
179
180 if (info->enabled)
181 vibra_disable(info);
182
183 return 0;
184}
185
186static int twl4030_vibra_resume(struct device *dev)
187{
188 vibra_disable_leds();
189 return 0;
190}
191
192static SIMPLE_DEV_PM_OPS(twl4030_vibra_pm_ops,
193 twl4030_vibra_suspend, twl4030_vibra_resume);
194#endif
195
196static int __devinit twl4030_vibra_probe(struct platform_device *pdev)
197{
198 struct twl4030_codec_vibra_data *pdata = pdev->dev.platform_data;
199 struct vibra_info *info;
200 int ret;
201
202 if (!pdata) {
203 dev_dbg(&pdev->dev, "platform_data not available\n");
204 return -EINVAL;
205 }
206
207 info = kzalloc(sizeof(*info), GFP_KERNEL);
208 if (!info)
209 return -ENOMEM;
210
211 info->dev = &pdev->dev;
212 info->coexist = pdata->coexist;
213 INIT_WORK(&info->play_work, vibra_play_work);
214
215 info->input_dev = input_allocate_device();
216 if (info->input_dev == NULL) {
217 dev_err(&pdev->dev, "couldn't allocate input device\n");
218 ret = -ENOMEM;
219 goto err_kzalloc;
220 }
221
222 input_set_drvdata(info->input_dev, info);
223
224 info->input_dev->name = "twl4030:vibrator";
225 info->input_dev->id.version = 1;
226 info->input_dev->dev.parent = pdev->dev.parent;
227 info->input_dev->open = twl4030_vibra_open;
228 info->input_dev->close = twl4030_vibra_close;
229 __set_bit(FF_RUMBLE, info->input_dev->ffbit);
230
231 ret = input_ff_create_memless(info->input_dev, NULL, vibra_play);
232 if (ret < 0) {
233 dev_dbg(&pdev->dev, "couldn't register vibrator to FF\n");
234 goto err_ialloc;
235 }
236
237 ret = input_register_device(info->input_dev);
238 if (ret < 0) {
239 dev_dbg(&pdev->dev, "couldn't register input device\n");
240 goto err_iff;
241 }
242
243 vibra_disable_leds();
244
245 platform_set_drvdata(pdev, info);
246 return 0;
247
248err_iff:
249 input_ff_destroy(info->input_dev);
250err_ialloc:
251 input_free_device(info->input_dev);
252err_kzalloc:
253 kfree(info);
254 return ret;
255}
256
257static int __devexit twl4030_vibra_remove(struct platform_device *pdev)
258{
259 struct vibra_info *info = platform_get_drvdata(pdev);
260
261 /* this also free ff-memless and calls close if needed */
262 input_unregister_device(info->input_dev);
263 kfree(info);
264 platform_set_drvdata(pdev, NULL);
265
266 return 0;
267}
268
269static struct platform_driver twl4030_vibra_driver = {
270 .probe = twl4030_vibra_probe,
271 .remove = __devexit_p(twl4030_vibra_remove),
272 .driver = {
273 .name = "twl4030_codec_vibra",
274 .owner = THIS_MODULE,
275#ifdef CONFIG_PM
276 .pm = &twl4030_vibra_pm_ops,
277#endif
278 },
279};
280
281static int __init twl4030_vibra_init(void)
282{
283 return platform_driver_register(&twl4030_vibra_driver);
284}
285module_init(twl4030_vibra_init);
286
287static void __exit twl4030_vibra_exit(void)
288{
289 platform_driver_unregister(&twl4030_vibra_driver);
290}
291module_exit(twl4030_vibra_exit);
292
293MODULE_ALIAS("platform:twl4030_codec_vibra");
294
295MODULE_DESCRIPTION("TWL4030 Vibra driver");
296MODULE_LICENSE("GPL");
297MODULE_AUTHOR("Nokia Corporation");
diff --git a/drivers/input/misc/winbond-cir.c b/drivers/input/misc/winbond-cir.c
index cbec3dfdd42b..9c155a43abc2 100644
--- a/drivers/input/misc/winbond-cir.c
+++ b/drivers/input/misc/winbond-cir.c
@@ -385,26 +385,24 @@ wbcir_do_getkeycode(struct wbcir_data *data, u32 scancode)
385} 385}
386 386
387static int 387static int
388wbcir_getkeycode(struct input_dev *dev, int scancode, int *keycode) 388wbcir_getkeycode(struct input_dev *dev,
389 unsigned int scancode, unsigned int *keycode)
389{ 390{
390 struct wbcir_data *data = input_get_drvdata(dev); 391 struct wbcir_data *data = input_get_drvdata(dev);
391 392
392 *keycode = (int)wbcir_do_getkeycode(data, (u32)scancode); 393 *keycode = wbcir_do_getkeycode(data, scancode);
393 return 0; 394 return 0;
394} 395}
395 396
396static int 397static int
397wbcir_setkeycode(struct input_dev *dev, int sscancode, int keycode) 398wbcir_setkeycode(struct input_dev *dev,
399 unsigned int scancode, unsigned int keycode)
398{ 400{
399 struct wbcir_data *data = input_get_drvdata(dev); 401 struct wbcir_data *data = input_get_drvdata(dev);
400 struct wbcir_keyentry *keyentry; 402 struct wbcir_keyentry *keyentry;
401 struct wbcir_keyentry *new_keyentry; 403 struct wbcir_keyentry *new_keyentry;
402 unsigned long flags; 404 unsigned long flags;
403 unsigned int old_keycode = KEY_RESERVED; 405 unsigned int old_keycode = KEY_RESERVED;
404 u32 scancode = (u32)sscancode;
405
406 if (keycode < 0 || keycode > KEY_MAX)
407 return -EINVAL;
408 406
409 new_keyentry = kmalloc(sizeof(*new_keyentry), GFP_KERNEL); 407 new_keyentry = kmalloc(sizeof(*new_keyentry), GFP_KERNEL);
410 if (!new_keyentry) 408 if (!new_keyentry)
diff --git a/drivers/input/misc/wm831x-on.c b/drivers/input/misc/wm831x-on.c
index ba4f5dd7c60e..1e54bce72db5 100644
--- a/drivers/input/misc/wm831x-on.c
+++ b/drivers/input/misc/wm831x-on.c
@@ -97,8 +97,9 @@ static int __devinit wm831x_on_probe(struct platform_device *pdev)
97 wm831x_on->dev->phys = "wm831x_on/input0"; 97 wm831x_on->dev->phys = "wm831x_on/input0";
98 wm831x_on->dev->dev.parent = &pdev->dev; 98 wm831x_on->dev->dev.parent = &pdev->dev;
99 99
100 ret = wm831x_request_irq(wm831x, irq, wm831x_on_irq, 100 ret = request_threaded_irq(irq, NULL, wm831x_on_irq,
101 IRQF_TRIGGER_RISING, "wm831x_on", wm831x_on); 101 IRQF_TRIGGER_RISING, "wm831x_on",
102 wm831x_on);
102 if (ret < 0) { 103 if (ret < 0) {
103 dev_err(&pdev->dev, "Unable to request IRQ: %d\n", ret); 104 dev_err(&pdev->dev, "Unable to request IRQ: %d\n", ret);
104 goto err_input_dev; 105 goto err_input_dev;
@@ -114,7 +115,7 @@ static int __devinit wm831x_on_probe(struct platform_device *pdev)
114 return 0; 115 return 0;
115 116
116err_irq: 117err_irq:
117 wm831x_free_irq(wm831x, irq, NULL); 118 free_irq(irq, wm831x_on);
118err_input_dev: 119err_input_dev:
119 input_free_device(wm831x_on->dev); 120 input_free_device(wm831x_on->dev);
120err: 121err:
@@ -127,7 +128,7 @@ static int __devexit wm831x_on_remove(struct platform_device *pdev)
127 struct wm831x_on *wm831x_on = platform_get_drvdata(pdev); 128 struct wm831x_on *wm831x_on = platform_get_drvdata(pdev);
128 int irq = platform_get_irq(pdev, 0); 129 int irq = platform_get_irq(pdev, 0);
129 130
130 wm831x_free_irq(wm831x_on->wm831x, irq, wm831x_on); 131 free_irq(irq, wm831x_on);
131 cancel_delayed_work_sync(&wm831x_on->work); 132 cancel_delayed_work_sync(&wm831x_on->work);
132 input_unregister_device(wm831x_on->dev); 133 input_unregister_device(wm831x_on->dev);
133 kfree(wm831x_on); 134 kfree(wm831x_on);
diff --git a/drivers/input/misc/yealink.h b/drivers/input/misc/yealink.h
index 48af0be9cbdf..1e0f52397010 100644
--- a/drivers/input/misc/yealink.h
+++ b/drivers/input/misc/yealink.h
@@ -127,7 +127,7 @@ struct yld_ctl_packet {
127 * yld_status struct. 127 * yld_status struct.
128 */ 128 */
129 129
130/* LCD, each segment must be driven seperately. 130/* LCD, each segment must be driven separately.
131 * 131 *
132 * Layout: 132 * Layout:
133 * 133 *
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index f93c2c0daf1f..7490f1da4a53 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -63,6 +63,8 @@ static const struct alps_model_info alps_model_data[] = {
63 { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, 63 { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf,
64 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, 64 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },
65 { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */ 65 { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */
66 { { 0x52, 0x01, 0x14 }, 0xff, 0xff,
67 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, /* Toshiba Tecra A11-11L */
66}; 68};
67 69
68/* 70/*
@@ -118,40 +120,27 @@ static void alps_report_buttons(struct psmouse *psmouse,
118 struct input_dev *dev1, struct input_dev *dev2, 120 struct input_dev *dev1, struct input_dev *dev2,
119 int left, int right, int middle) 121 int left, int right, int middle)
120{ 122{
121 struct alps_data *priv = psmouse->private; 123 struct input_dev *dev;
122 const struct alps_model_info *model = priv->i;
123
124 if (model->flags & ALPS_PS2_INTERLEAVED) {
125 struct input_dev *dev;
126 124
127 /* 125 /*
128 * If shared button has already been reported on the 126 * If shared button has already been reported on the
129 * other device (dev2) then this event should be also 127 * other device (dev2) then this event should be also
130 * sent through that device. 128 * sent through that device.
131 */ 129 */
132 dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1; 130 dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1;
133 input_report_key(dev, BTN_LEFT, left); 131 input_report_key(dev, BTN_LEFT, left);
134 132
135 dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1; 133 dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1;
136 input_report_key(dev, BTN_RIGHT, right); 134 input_report_key(dev, BTN_RIGHT, right);
137 135
138 dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1; 136 dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1;
139 input_report_key(dev, BTN_MIDDLE, middle); 137 input_report_key(dev, BTN_MIDDLE, middle);
140 138
141 /* 139 /*
142 * Sync the _other_ device now, we'll do the first 140 * Sync the _other_ device now, we'll do the first
143 * device later once we report the rest of the events. 141 * device later once we report the rest of the events.
144 */ 142 */
145 input_sync(dev2); 143 input_sync(dev2);
146 } else {
147 /*
148 * For devices with non-interleaved packets we know what
149 * device buttons belong to so we can simply report them.
150 */
151 input_report_key(dev1, BTN_LEFT, left);
152 input_report_key(dev1, BTN_RIGHT, right);
153 input_report_key(dev1, BTN_MIDDLE, middle);
154 }
155} 144}
156 145
157static void alps_process_packet(struct psmouse *psmouse) 146static void alps_process_packet(struct psmouse *psmouse)
diff --git a/drivers/input/mouse/appletouch.c b/drivers/input/mouse/appletouch.c
index 908b5b44052f..53ec7ddd1826 100644
--- a/drivers/input/mouse/appletouch.c
+++ b/drivers/input/mouse/appletouch.c
@@ -205,8 +205,8 @@ struct atp {
205 bool overflow_warned; 205 bool overflow_warned;
206 int x_old; /* last reported x/y, */ 206 int x_old; /* last reported x/y, */
207 int y_old; /* used for smoothing */ 207 int y_old; /* used for smoothing */
208 signed char xy_cur[ATP_XSENSORS + ATP_YSENSORS]; 208 u8 xy_cur[ATP_XSENSORS + ATP_YSENSORS];
209 signed char xy_old[ATP_XSENSORS + ATP_YSENSORS]; 209 u8 xy_old[ATP_XSENSORS + ATP_YSENSORS];
210 int xy_acc[ATP_XSENSORS + ATP_YSENSORS]; 210 int xy_acc[ATP_XSENSORS + ATP_YSENSORS];
211 int idlecount; /* number of empty packets */ 211 int idlecount; /* number of empty packets */
212 struct work_struct work; 212 struct work_struct work;
@@ -531,7 +531,7 @@ static void atp_complete_geyser_1_2(struct urb *urb)
531 531
532 for (i = 0; i < ATP_XSENSORS + ATP_YSENSORS; i++) { 532 for (i = 0; i < ATP_XSENSORS + ATP_YSENSORS; i++) {
533 /* accumulate the change */ 533 /* accumulate the change */
534 signed char change = dev->xy_old[i] - dev->xy_cur[i]; 534 int change = dev->xy_old[i] - dev->xy_cur[i];
535 dev->xy_acc[i] -= change; 535 dev->xy_acc[i] -= change;
536 536
537 /* prevent down drifting */ 537 /* prevent down drifting */
diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c
index a13d80f7da17..f34b22bce4ff 100644
--- a/drivers/input/mousedev.c
+++ b/drivers/input/mousedev.c
@@ -15,7 +15,6 @@
15 15
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/smp_lock.h>
19#include <linux/poll.h> 18#include <linux/poll.h>
20#include <linux/module.h> 19#include <linux/module.h>
21#include <linux/init.h> 20#include <linux/init.h>
@@ -542,10 +541,8 @@ static int mousedev_open(struct inode *inode, struct file *file)
542 if (i >= MOUSEDEV_MINORS) 541 if (i >= MOUSEDEV_MINORS)
543 return -ENODEV; 542 return -ENODEV;
544 543
545 lock_kernel();
546 error = mutex_lock_interruptible(&mousedev_table_mutex); 544 error = mutex_lock_interruptible(&mousedev_table_mutex);
547 if (error) { 545 if (error) {
548 unlock_kernel();
549 return error; 546 return error;
550 } 547 }
551 mousedev = mousedev_table[i]; 548 mousedev = mousedev_table[i];
@@ -554,7 +551,6 @@ static int mousedev_open(struct inode *inode, struct file *file)
554 mutex_unlock(&mousedev_table_mutex); 551 mutex_unlock(&mousedev_table_mutex);
555 552
556 if (!mousedev) { 553 if (!mousedev) {
557 unlock_kernel();
558 return -ENODEV; 554 return -ENODEV;
559 } 555 }
560 556
@@ -575,7 +571,6 @@ static int mousedev_open(struct inode *inode, struct file *file)
575 goto err_free_client; 571 goto err_free_client;
576 572
577 file->private_data = client; 573 file->private_data = client;
578 unlock_kernel();
579 return 0; 574 return 0;
580 575
581 err_free_client: 576 err_free_client:
@@ -583,7 +578,6 @@ static int mousedev_open(struct inode *inode, struct file *file)
583 kfree(client); 578 kfree(client);
584 err_put_mousedev: 579 err_put_mousedev:
585 put_device(&mousedev->dev); 580 put_device(&mousedev->dev);
586 unlock_kernel();
587 return error; 581 return error;
588} 582}
589 583
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 2a5982e532f8..ead0494721d0 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -442,6 +442,13 @@ static const struct dmi_system_id __initconst i8042_dmi_reset_table[] = {
442 }, 442 },
443 }, 443 },
444 { 444 {
445 /* Medion Akoya E1222 */
446 .matches = {
447 DMI_MATCH(DMI_SYS_VENDOR, "MEDION"),
448 DMI_MATCH(DMI_PRODUCT_NAME, "E122X"),
449 },
450 },
451 {
445 /* Mivvy M310 */ 452 /* Mivvy M310 */
446 .matches = { 453 .matches = {
447 DMI_MATCH(DMI_SYS_VENDOR, "VIOOO"), 454 DMI_MATCH(DMI_SYS_VENDOR, "VIOOO"),
@@ -624,6 +631,9 @@ static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *
624 strlcat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name)); 631 strlcat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name));
625 } 632 }
626 633
634 /* Keyboard ports are always supposed to be wakeup-enabled */
635 device_set_wakeup_enable(&dev->dev, true);
636
627 i8042_pnp_kbd_devices++; 637 i8042_pnp_kbd_devices++;
628 return 0; 638 return 0;
629} 639}
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index b54aee7cd9e3..9302ba0e48f8 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -430,7 +430,7 @@ static bool i8042_filter(unsigned char data, unsigned char str,
430 } 430 }
431 431
432 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) { 432 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
433 dbg("Filtered out by platfrom filter\n"); 433 dbg("Filtered out by platform filter\n");
434 return true; 434 return true;
435 } 435 }
436 436
@@ -1386,6 +1386,8 @@ static int __init i8042_probe(struct platform_device *dev)
1386{ 1386{
1387 int error; 1387 int error;
1388 1388
1389 i8042_platform_device = dev;
1390
1389 error = i8042_controller_selftest(); 1391 error = i8042_controller_selftest();
1390 if (error) 1392 if (error)
1391 return error; 1393 return error;
@@ -1421,6 +1423,7 @@ static int __init i8042_probe(struct platform_device *dev)
1421 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1423 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1422 i8042_free_irqs(); 1424 i8042_free_irqs();
1423 i8042_controller_reset(); 1425 i8042_controller_reset();
1426 i8042_platform_device = NULL;
1424 1427
1425 return error; 1428 return error;
1426} 1429}
@@ -1430,6 +1433,7 @@ static int __devexit i8042_remove(struct platform_device *dev)
1430 i8042_unregister_ports(); 1433 i8042_unregister_ports();
1431 i8042_free_irqs(); 1434 i8042_free_irqs();
1432 i8042_controller_reset(); 1435 i8042_controller_reset();
1436 i8042_platform_device = NULL;
1433 1437
1434 return 0; 1438 return 0;
1435} 1439}
@@ -1448,6 +1452,7 @@ static struct platform_driver i8042_driver = {
1448 1452
1449static int __init i8042_init(void) 1453static int __init i8042_init(void)
1450{ 1454{
1455 struct platform_device *pdev;
1451 int err; 1456 int err;
1452 1457
1453 dbg_init(); 1458 dbg_init();
@@ -1460,31 +1465,18 @@ static int __init i8042_init(void)
1460 if (err) 1465 if (err)
1461 goto err_platform_exit; 1466 goto err_platform_exit;
1462 1467
1463 i8042_platform_device = platform_device_alloc("i8042", -1); 1468 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1464 if (!i8042_platform_device) { 1469 if (IS_ERR(pdev)) {
1465 err = -ENOMEM; 1470 err = PTR_ERR(pdev);
1466 goto err_platform_exit; 1471 goto err_platform_exit;
1467 } 1472 }
1468 1473
1469 err = platform_device_add(i8042_platform_device);
1470 if (err)
1471 goto err_free_device;
1472
1473 err = platform_driver_probe(&i8042_driver, i8042_probe);
1474 if (err)
1475 goto err_del_device;
1476
1477 panic_blink = i8042_panic_blink; 1474 panic_blink = i8042_panic_blink;
1478 1475
1479 return 0; 1476 return 0;
1480 1477
1481 err_del_device:
1482 platform_device_del(i8042_platform_device);
1483 err_free_device:
1484 platform_device_put(i8042_platform_device);
1485 err_platform_exit: 1478 err_platform_exit:
1486 i8042_platform_exit(); 1479 i8042_platform_exit();
1487
1488 return err; 1480 return err;
1489} 1481}
1490 1482
diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c
index 27fdaaffbb40..998664854440 100644
--- a/drivers/input/serio/serio_raw.c
+++ b/drivers/input/serio/serio_raw.c
@@ -81,12 +81,12 @@ static int serio_raw_open(struct inode *inode, struct file *file)
81 struct serio_raw_list *list; 81 struct serio_raw_list *list;
82 int retval = 0; 82 int retval = 0;
83 83
84 lock_kernel();
85 retval = mutex_lock_interruptible(&serio_raw_mutex); 84 retval = mutex_lock_interruptible(&serio_raw_mutex);
86 if (retval) 85 if (retval)
87 goto out_bkl; 86 return retval;
88 87
89 if (!(serio_raw = serio_raw_locate(iminor(inode)))) { 88 serio_raw = serio_raw_locate(iminor(inode));
89 if (!serio_raw) {
90 retval = -ENODEV; 90 retval = -ENODEV;
91 goto out; 91 goto out;
92 } 92 }
@@ -96,7 +96,8 @@ static int serio_raw_open(struct inode *inode, struct file *file)
96 goto out; 96 goto out;
97 } 97 }
98 98
99 if (!(list = kzalloc(sizeof(struct serio_raw_list), GFP_KERNEL))) { 99 list = kzalloc(sizeof(struct serio_raw_list), GFP_KERNEL);
100 if (!list) {
100 retval = -ENOMEM; 101 retval = -ENOMEM;
101 goto out; 102 goto out;
102 } 103 }
@@ -109,8 +110,6 @@ static int serio_raw_open(struct inode *inode, struct file *file)
109 110
110out: 111out:
111 mutex_unlock(&serio_raw_mutex); 112 mutex_unlock(&serio_raw_mutex);
112out_bkl:
113 unlock_kernel();
114 return retval; 113 return retval;
115} 114}
116 115
diff --git a/drivers/input/sparse-keymap.c b/drivers/input/sparse-keymap.c
index fbd3987af57f..e6bde55e5203 100644
--- a/drivers/input/sparse-keymap.c
+++ b/drivers/input/sparse-keymap.c
@@ -64,7 +64,8 @@ struct key_entry *sparse_keymap_entry_from_keycode(struct input_dev *dev,
64EXPORT_SYMBOL(sparse_keymap_entry_from_keycode); 64EXPORT_SYMBOL(sparse_keymap_entry_from_keycode);
65 65
66static int sparse_keymap_getkeycode(struct input_dev *dev, 66static int sparse_keymap_getkeycode(struct input_dev *dev,
67 int scancode, int *keycode) 67 unsigned int scancode,
68 unsigned int *keycode)
68{ 69{
69 const struct key_entry *key = 70 const struct key_entry *key =
70 sparse_keymap_entry_from_scancode(dev, scancode); 71 sparse_keymap_entry_from_scancode(dev, scancode);
@@ -78,7 +79,8 @@ static int sparse_keymap_getkeycode(struct input_dev *dev,
78} 79}
79 80
80static int sparse_keymap_setkeycode(struct input_dev *dev, 81static int sparse_keymap_setkeycode(struct input_dev *dev,
81 int scancode, int keycode) 82 unsigned int scancode,
83 unsigned int keycode)
82{ 84{
83 struct key_entry *key; 85 struct key_entry *key;
84 int old_keycode; 86 int old_keycode;
diff --git a/drivers/input/tablet/aiptek.c b/drivers/input/tablet/aiptek.c
index 7d005a3616d7..4be039d7dcad 100644
--- a/drivers/input/tablet/aiptek.c
+++ b/drivers/input/tablet/aiptek.c
@@ -362,7 +362,7 @@ static const int macroKeyEvents[] = {
362}; 362};
363 363
364/*********************************************************************** 364/***********************************************************************
365 * Map values to strings and back. Every map shoudl have the following 365 * Map values to strings and back. Every map should have the following
366 * as its last element: { NULL, AIPTEK_INVALID_VALUE }. 366 * as its last element: { NULL, AIPTEK_INVALID_VALUE }.
367 */ 367 */
368#define AIPTEK_INVALID_VALUE -1 368#define AIPTEK_INVALID_VALUE -1
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c
index a1770e6feeec..8b5d2873f0c4 100644
--- a/drivers/input/tablet/wacom_sys.c
+++ b/drivers/input/tablet/wacom_sys.c
@@ -371,7 +371,7 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
371 } else if (pen) { 371 } else if (pen) {
372 /* penabled only accepts exact bytes of data */ 372 /* penabled only accepts exact bytes of data */
373 if (features->type == TABLETPC2FG) 373 if (features->type == TABLETPC2FG)
374 features->pktlen = WACOM_PKGLEN_PENABLED; 374 features->pktlen = WACOM_PKGLEN_GRAPHIRE;
375 features->device_type = BTN_TOOL_PEN; 375 features->device_type = BTN_TOOL_PEN;
376 features->x_max = 376 features->x_max =
377 wacom_le16_to_cpu(&report[i + 3]); 377 wacom_le16_to_cpu(&report[i + 3]);
@@ -410,7 +410,7 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
410 } else if (pen) { 410 } else if (pen) {
411 /* penabled only accepts exact bytes of data */ 411 /* penabled only accepts exact bytes of data */
412 if (features->type == TABLETPC2FG) 412 if (features->type == TABLETPC2FG)
413 features->pktlen = WACOM_PKGLEN_PENABLED; 413 features->pktlen = WACOM_PKGLEN_GRAPHIRE;
414 features->device_type = BTN_TOOL_PEN; 414 features->device_type = BTN_TOOL_PEN;
415 features->y_max = 415 features->y_max =
416 wacom_le16_to_cpu(&report[i + 3]); 416 wacom_le16_to_cpu(&report[i + 3]);
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index 3d81443e683a..b3ba3437a2eb 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -155,19 +155,19 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
155{ 155{
156 struct wacom_features *features = &wacom->features; 156 struct wacom_features *features = &wacom->features;
157 unsigned char *data = wacom->data; 157 unsigned char *data = wacom->data;
158 int x, y, rw; 158 int x, y, prox;
159 static int penData = 0; 159 int rw = 0;
160 int retval = 0;
160 161
161 if (data[0] != WACOM_REPORT_PENABLED) { 162 if (data[0] != WACOM_REPORT_PENABLED) {
162 dbg("wacom_graphire_irq: received unknown report #%d", data[0]); 163 dbg("wacom_graphire_irq: received unknown report #%d", data[0]);
163 return 0; 164 goto exit;
164 } 165 }
165 166
166 if (data[1] & 0x80) { 167 prox = data[1] & 0x80;
167 /* in prox and not a pad data */ 168 if (prox || wacom->id[0]) {
168 penData = 1; 169 if (prox) {
169 170 switch ((data[1] >> 5) & 3) {
170 switch ((data[1] >> 5) & 3) {
171 171
172 case 0: /* Pen */ 172 case 0: /* Pen */
173 wacom->tool[0] = BTN_TOOL_PEN; 173 wacom->tool[0] = BTN_TOOL_PEN;
@@ -181,23 +181,13 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
181 181
182 case 2: /* Mouse with wheel */ 182 case 2: /* Mouse with wheel */
183 wacom_report_key(wcombo, BTN_MIDDLE, data[1] & 0x04); 183 wacom_report_key(wcombo, BTN_MIDDLE, data[1] & 0x04);
184 if (features->type == WACOM_G4 || features->type == WACOM_MO) {
185 rw = data[7] & 0x04 ? (data[7] & 0x03)-4 : (data[7] & 0x03);
186 wacom_report_rel(wcombo, REL_WHEEL, -rw);
187 } else
188 wacom_report_rel(wcombo, REL_WHEEL, -(signed char) data[6]);
189 /* fall through */ 184 /* fall through */
190 185
191 case 3: /* Mouse without wheel */ 186 case 3: /* Mouse without wheel */
192 wacom->tool[0] = BTN_TOOL_MOUSE; 187 wacom->tool[0] = BTN_TOOL_MOUSE;
193 wacom->id[0] = CURSOR_DEVICE_ID; 188 wacom->id[0] = CURSOR_DEVICE_ID;
194 wacom_report_key(wcombo, BTN_LEFT, data[1] & 0x01);
195 wacom_report_key(wcombo, BTN_RIGHT, data[1] & 0x02);
196 if (features->type == WACOM_G4 || features->type == WACOM_MO)
197 wacom_report_abs(wcombo, ABS_DISTANCE, data[6] & 0x3f);
198 else
199 wacom_report_abs(wcombo, ABS_DISTANCE, data[7] & 0x3f);
200 break; 189 break;
190 }
201 } 191 }
202 x = wacom_le16_to_cpu(&data[2]); 192 x = wacom_le16_to_cpu(&data[2]);
203 y = wacom_le16_to_cpu(&data[4]); 193 y = wacom_le16_to_cpu(&data[4]);
@@ -208,36 +198,32 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
208 wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x01); 198 wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x01);
209 wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); 199 wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02);
210 wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x04); 200 wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x04);
211 }
212 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); /* report tool id */
213 wacom_report_key(wcombo, wacom->tool[0], 1);
214 } else if (wacom->id[0]) {
215 wacom_report_abs(wcombo, ABS_X, 0);
216 wacom_report_abs(wcombo, ABS_Y, 0);
217 if (wacom->tool[0] == BTN_TOOL_MOUSE) {
218 wacom_report_key(wcombo, BTN_LEFT, 0);
219 wacom_report_key(wcombo, BTN_RIGHT, 0);
220 wacom_report_abs(wcombo, ABS_DISTANCE, 0);
221 } else { 201 } else {
222 wacom_report_abs(wcombo, ABS_PRESSURE, 0); 202 wacom_report_key(wcombo, BTN_LEFT, data[1] & 0x01);
223 wacom_report_key(wcombo, BTN_TOUCH, 0); 203 wacom_report_key(wcombo, BTN_RIGHT, data[1] & 0x02);
224 wacom_report_key(wcombo, BTN_STYLUS, 0); 204 if (features->type == WACOM_G4 ||
225 wacom_report_key(wcombo, BTN_STYLUS2, 0); 205 features->type == WACOM_MO) {
206 wacom_report_abs(wcombo, ABS_DISTANCE, data[6] & 0x3f);
207 rw = (signed)(data[7] & 0x04) - (data[7] & 0x03);
208 } else {
209 wacom_report_abs(wcombo, ABS_DISTANCE, data[7] & 0x3f);
210 rw = -(signed)data[6];
211 }
212 wacom_report_rel(wcombo, REL_WHEEL, rw);
226 } 213 }
227 wacom->id[0] = 0; 214
228 wacom_report_abs(wcombo, ABS_MISC, 0); /* reset tool id */ 215 if (!prox)
229 wacom_report_key(wcombo, wacom->tool[0], 0); 216 wacom->id[0] = 0;
217 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); /* report tool id */
218 wacom_report_key(wcombo, wacom->tool[0], prox);
219 wacom_input_sync(wcombo); /* sync last event */
230 } 220 }
231 221
232 /* send pad data */ 222 /* send pad data */
233 switch (features->type) { 223 switch (features->type) {
234 case WACOM_G4: 224 case WACOM_G4:
235 if (data[7] & 0xf8) { 225 prox = data[7] & 0xf8;
236 if (penData) { 226 if (prox || wacom->id[1]) {
237 wacom_input_sync(wcombo); /* sync last event */
238 if (!wacom->id[0])
239 penData = 0;
240 }
241 wacom->id[1] = PAD_DEVICE_ID; 227 wacom->id[1] = PAD_DEVICE_ID;
242 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40)); 228 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40));
243 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80)); 229 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80));
@@ -245,29 +231,16 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
245 wacom_report_rel(wcombo, REL_WHEEL, rw); 231 wacom_report_rel(wcombo, REL_WHEEL, rw);
246 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0); 232 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0);
247 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); 233 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
248 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); 234 if (!prox)
249 } else if (wacom->id[1]) { 235 wacom->id[1] = 0;
250 if (penData) { 236 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
251 wacom_input_sync(wcombo); /* sync last event */
252 if (!wacom->id[0])
253 penData = 0;
254 }
255 wacom->id[1] = 0;
256 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40));
257 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80));
258 wacom_report_rel(wcombo, REL_WHEEL, 0);
259 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0);
260 wacom_report_abs(wcombo, ABS_MISC, 0);
261 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); 237 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
262 } 238 }
239 retval = 1;
263 break; 240 break;
264 case WACOM_MO: 241 case WACOM_MO:
265 if ((data[7] & 0xf8) || (data[8] & 0xff)) { 242 prox = (data[7] & 0xf8) || data[8];
266 if (penData) { 243 if (prox || wacom->id[1]) {
267 wacom_input_sync(wcombo); /* sync last event */
268 if (!wacom->id[0])
269 penData = 0;
270 }
271 wacom->id[1] = PAD_DEVICE_ID; 244 wacom->id[1] = PAD_DEVICE_ID;
272 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08)); 245 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08));
273 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20)); 246 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20));
@@ -275,27 +248,16 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
275 wacom_report_key(wcombo, BTN_5, (data[7] & 0x40)); 248 wacom_report_key(wcombo, BTN_5, (data[7] & 0x40));
276 wacom_report_abs(wcombo, ABS_WHEEL, (data[8] & 0x7f)); 249 wacom_report_abs(wcombo, ABS_WHEEL, (data[8] & 0x7f));
277 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0); 250 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0);
251 if (!prox)
252 wacom->id[1] = 0;
278 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); 253 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
279 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); 254 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
280 } else if (wacom->id[1]) {
281 if (penData) {
282 wacom_input_sync(wcombo); /* sync last event */
283 if (!wacom->id[0])
284 penData = 0;
285 }
286 wacom->id[1] = 0;
287 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08));
288 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20));
289 wacom_report_key(wcombo, BTN_4, (data[7] & 0x10));
290 wacom_report_key(wcombo, BTN_5, (data[7] & 0x40));
291 wacom_report_abs(wcombo, ABS_WHEEL, (data[8] & 0x7f));
292 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0);
293 wacom_report_abs(wcombo, ABS_MISC, 0);
294 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
295 } 255 }
256 retval = 1;
296 break; 257 break;
297 } 258 }
298 return 1; 259exit:
260 return retval;
299} 261}
300 262
301static int wacom_intuos_inout(struct wacom_wac *wacom, void *wcombo) 263static int wacom_intuos_inout(struct wacom_wac *wacom, void *wcombo)
@@ -636,9 +598,9 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
636static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx) 598static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx)
637{ 599{
638 wacom_report_abs(wcombo, ABS_X, 600 wacom_report_abs(wcombo, ABS_X,
639 (data[2 + idx * 2] & 0xff) | ((data[3 + idx * 2] & 0x7f) << 8)); 601 data[2 + idx * 2] | ((data[3 + idx * 2] & 0x7f) << 8));
640 wacom_report_abs(wcombo, ABS_Y, 602 wacom_report_abs(wcombo, ABS_Y,
641 (data[6 + idx * 2] & 0xff) | ((data[7 + idx * 2] & 0x7f) << 8)); 603 data[6 + idx * 2] | ((data[7 + idx * 2] & 0x7f) << 8));
642 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); 604 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
643 wacom_report_key(wcombo, wacom->tool[idx], 1); 605 wacom_report_key(wcombo, wacom->tool[idx], 1);
644 if (idx) 606 if (idx)
@@ -782,31 +744,24 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo)
782 744
783 touchInProx = 0; 745 touchInProx = 0;
784 746
785 if (prox) { /* in prox */ 747 if (!wacom->id[0]) { /* first in prox */
786 if (!wacom->id[0]) { 748 /* Going into proximity select tool */
787 /* Going into proximity select tool */ 749 wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
788 wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN; 750 if (wacom->tool[0] == BTN_TOOL_PEN)
789 if (wacom->tool[0] == BTN_TOOL_PEN) 751 wacom->id[0] = STYLUS_DEVICE_ID;
790 wacom->id[0] = STYLUS_DEVICE_ID; 752 else
791 else 753 wacom->id[0] = ERASER_DEVICE_ID;
792 wacom->id[0] = ERASER_DEVICE_ID; 754 }
793 } 755 wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02);
794 wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); 756 wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10);
795 wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10); 757 wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
796 wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2])); 758 wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
797 wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4])); 759 pressure = ((data[7] & 0x01) << 8) | data[6];
798 pressure = ((data[7] & 0x01) << 8) | data[6]; 760 if (pressure < 0)
799 if (pressure < 0) 761 pressure = features->pressure_max + pressure + 1;
800 pressure = features->pressure_max + pressure + 1; 762 wacom_report_abs(wcombo, ABS_PRESSURE, pressure);
801 wacom_report_abs(wcombo, ABS_PRESSURE, pressure); 763 wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05);
802 wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05); 764 if (!prox) { /* out-prox */
803 } else {
804 wacom_report_abs(wcombo, ABS_X, 0);
805 wacom_report_abs(wcombo, ABS_Y, 0);
806 wacom_report_abs(wcombo, ABS_PRESSURE, 0);
807 wacom_report_key(wcombo, BTN_STYLUS, 0);
808 wacom_report_key(wcombo, BTN_STYLUS2, 0);
809 wacom_report_key(wcombo, BTN_TOUCH, 0);
810 wacom->id[0] = 0; 765 wacom->id[0] = 0;
811 /* pen is out so touch can be enabled now */ 766 /* pen is out so touch can be enabled now */
812 touchInProx = 1; 767 touchInProx = 1;
@@ -1028,7 +983,7 @@ static const struct wacom_features wacom_features_0x93 =
1028static const struct wacom_features wacom_features_0x9A = 983static const struct wacom_features wacom_features_0x9A =
1029 { "Wacom ISDv4 9A", WACOM_PKGLEN_GRAPHIRE, 26202, 16325, 255, 0, TABLETPC }; 984 { "Wacom ISDv4 9A", WACOM_PKGLEN_GRAPHIRE, 26202, 16325, 255, 0, TABLETPC };
1030static const struct wacom_features wacom_features_0x9F = 985static const struct wacom_features wacom_features_0x9F =
1031 { "Wacom ISDv4 9F", WACOM_PKGLEN_PENABLED, 26202, 16325, 255, 0, TABLETPC }; 986 { "Wacom ISDv4 9F", WACOM_PKGLEN_GRAPHIRE, 26202, 16325, 255, 0, TABLETPC };
1032static const struct wacom_features wacom_features_0xE2 = 987static const struct wacom_features wacom_features_0xE2 =
1033 { "Wacom ISDv4 E2", WACOM_PKGLEN_TPC2FG, 26202, 16325, 255, 0, TABLETPC2FG }; 988 { "Wacom ISDv4 E2", WACOM_PKGLEN_TPC2FG, 26202, 16325, 255, 0, TABLETPC2FG };
1034static const struct wacom_features wacom_features_0xE3 = 989static const struct wacom_features wacom_features_0xE3 =
diff --git a/drivers/input/tablet/wacom_wac.h b/drivers/input/tablet/wacom_wac.h
index 8590b1e8ec37..b50cf04e61a8 100644
--- a/drivers/input/tablet/wacom_wac.h
+++ b/drivers/input/tablet/wacom_wac.h
@@ -17,7 +17,6 @@
17#define WACOM_PKGLEN_GRAPHIRE 8 17#define WACOM_PKGLEN_GRAPHIRE 8
18#define WACOM_PKGLEN_BBFUN 9 18#define WACOM_PKGLEN_BBFUN 9
19#define WACOM_PKGLEN_INTUOS 10 19#define WACOM_PKGLEN_INTUOS 10
20#define WACOM_PKGLEN_PENABLED 8
21#define WACOM_PKGLEN_TPC1FG 5 20#define WACOM_PKGLEN_TPC1FG 5
22#define WACOM_PKGLEN_TPC2FG 14 21#define WACOM_PKGLEN_TPC2FG 14
23 22
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 7208654a94ae..8a8fa4d2d6a8 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -24,17 +24,18 @@ config TOUCHSCREEN_88PM860X
24 module will be called 88pm860x-ts. 24 module will be called 88pm860x-ts.
25 25
26config TOUCHSCREEN_ADS7846 26config TOUCHSCREEN_ADS7846
27 tristate "ADS7846/TSC2046 and ADS7843 based touchscreens" 27 tristate "ADS7846/TSC2046/AD7873 and AD(S)7843 based touchscreens"
28 depends on SPI_MASTER 28 depends on SPI_MASTER
29 depends on HWMON = n || HWMON 29 depends on HWMON = n || HWMON
30 help 30 help
31 Say Y here if you have a touchscreen interface using the 31 Say Y here if you have a touchscreen interface using the
32 ADS7846/TSC2046 or ADS7843 controller, and your board-specific 32 ADS7846/TSC2046/AD7873 or ADS7843/AD7843 controller,
33 setup code includes that in its table of SPI devices. 33 and your board-specific setup code includes that in its
34 table of SPI devices.
34 35
35 If HWMON is selected, and the driver is told the reference voltage 36 If HWMON is selected, and the driver is told the reference voltage
36 on your board, you will also get hwmon interfaces for the voltage 37 on your board, you will also get hwmon interfaces for the voltage
37 (and on ads7846/tsc2046, temperature) sensors of this chip. 38 (and on ads7846/tsc2046/ad7873, temperature) sensors of this chip.
38 39
39 If unsure, say N (but it's safe to say "Y"). 40 If unsure, say N (but it's safe to say "Y").
40 41
diff --git a/drivers/input/touchscreen/ad7877.c b/drivers/input/touchscreen/ad7877.c
index eb83939c705e..e019d53d1ab4 100644
--- a/drivers/input/touchscreen/ad7877.c
+++ b/drivers/input/touchscreen/ad7877.c
@@ -46,7 +46,7 @@
46#include <linux/spi/ad7877.h> 46#include <linux/spi/ad7877.h>
47#include <asm/irq.h> 47#include <asm/irq.h>
48 48
49#define TS_PEN_UP_TIMEOUT msecs_to_jiffies(50) 49#define TS_PEN_UP_TIMEOUT msecs_to_jiffies(100)
50 50
51#define MAX_SPI_FREQ_HZ 20000000 51#define MAX_SPI_FREQ_HZ 20000000
52#define MAX_12BIT ((1<<12)-1) 52#define MAX_12BIT ((1<<12)-1)
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
index 8b05d8e97543..532279cda0e4 100644
--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
@@ -36,6 +36,7 @@
36 * TSC2046 is just newer ads7846 silicon. 36 * TSC2046 is just newer ads7846 silicon.
37 * Support for ads7843 tested on Atmel at91sam926x-EK. 37 * Support for ads7843 tested on Atmel at91sam926x-EK.
38 * Support for ads7845 has only been stubbed in. 38 * Support for ads7845 has only been stubbed in.
39 * Support for Analog Devices AD7873 and AD7843 tested.
39 * 40 *
40 * IRQ handling needs a workaround because of a shortcoming in handling 41 * IRQ handling needs a workaround because of a shortcoming in handling
41 * edge triggered IRQs on some platforms like the OMAP1/2. These 42 * edge triggered IRQs on some platforms like the OMAP1/2. These
@@ -821,6 +822,9 @@ static int ads7846_suspend(struct spi_device *spi, pm_message_t message)
821 822
822 spin_unlock_irq(&ts->lock); 823 spin_unlock_irq(&ts->lock);
823 824
825 if (device_may_wakeup(&ts->spi->dev))
826 enable_irq_wake(ts->spi->irq);
827
824 return 0; 828 return 0;
825 829
826} 830}
@@ -829,6 +833,9 @@ static int ads7846_resume(struct spi_device *spi)
829{ 833{
830 struct ads7846 *ts = dev_get_drvdata(&spi->dev); 834 struct ads7846 *ts = dev_get_drvdata(&spi->dev);
831 835
836 if (device_may_wakeup(&ts->spi->dev))
837 disable_irq_wake(ts->spi->irq);
838
832 spin_lock_irq(&ts->lock); 839 spin_lock_irq(&ts->lock);
833 840
834 ts->is_suspended = 0; 841 ts->is_suspended = 0;
@@ -984,6 +991,15 @@ static int __devinit ads7846_probe(struct spi_device *spi)
984 991
985 vref = pdata->keep_vref_on; 992 vref = pdata->keep_vref_on;
986 993
994 if (ts->model == 7873) {
995 /* The AD7873 is almost identical to the ADS7846
996 * keep VREF off during differential/ratiometric
997 * conversion modes
998 */
999 ts->model = 7846;
1000 vref = 0;
1001 }
1002
987 /* set up the transfers to read touchscreen state; this assumes we 1003 /* set up the transfers to read touchscreen state; this assumes we
988 * use formula #2 for pressure, not #3. 1004 * use formula #2 for pressure, not #3.
989 */ 1005 */
@@ -1191,6 +1207,8 @@ static int __devinit ads7846_probe(struct spi_device *spi)
1191 if (err) 1207 if (err)
1192 goto err_remove_attr_group; 1208 goto err_remove_attr_group;
1193 1209
1210 device_init_wakeup(&spi->dev, pdata->wakeup);
1211
1194 return 0; 1212 return 0;
1195 1213
1196 err_remove_attr_group: 1214 err_remove_attr_group:
@@ -1220,6 +1238,8 @@ static int __devexit ads7846_remove(struct spi_device *spi)
1220{ 1238{
1221 struct ads7846 *ts = dev_get_drvdata(&spi->dev); 1239 struct ads7846 *ts = dev_get_drvdata(&spi->dev);
1222 1240
1241 device_init_wakeup(&spi->dev, false);
1242
1223 ads784x_hwmon_unregister(spi, ts); 1243 ads784x_hwmon_unregister(spi, ts);
1224 input_unregister_device(ts->input); 1244 input_unregister_device(ts->input);
1225 1245
diff --git a/drivers/isdn/hardware/mISDN/mISDNisar.c b/drivers/isdn/hardware/mISDN/mISDNisar.c
index 09095c747110..f0bc6fa95809 100644
--- a/drivers/isdn/hardware/mISDN/mISDNisar.c
+++ b/drivers/isdn/hardware/mISDN/mISDNisar.c
@@ -1712,13 +1712,13 @@ mISDNisar_init(struct isar_hw *isar, void *hw)
1712} 1712}
1713EXPORT_SYMBOL(mISDNisar_init); 1713EXPORT_SYMBOL(mISDNisar_init);
1714 1714
1715static int isar_mod_init(void) 1715static int __init isar_mod_init(void)
1716{ 1716{
1717 pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV); 1717 pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
1718 return 0; 1718 return 0;
1719} 1719}
1720 1720
1721static void isar_mod_cleanup(void) 1721static void __exit isar_mod_cleanup(void)
1722{ 1722{
1723 pr_notice("mISDN: ISAR module unloaded\n"); 1723 pr_notice("mISDN: ISAR module unloaded\n");
1724} 1724}
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c
index adb1e8c36b46..00c60e2e0ff7 100644
--- a/drivers/isdn/i4l/isdn_common.c
+++ b/drivers/isdn/i4l/isdn_common.c
@@ -1347,7 +1347,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
1347/* 1347/*
1348 * isdn net devices manage lots of configuration variables as linked lists. 1348 * isdn net devices manage lots of configuration variables as linked lists.
1349 * Those lists must only be manipulated from user space. Some of the ioctl's 1349 * Those lists must only be manipulated from user space. Some of the ioctl's
1350 * service routines access user space and are not atomic. Therefor, ioctl's 1350 * service routines access user space and are not atomic. Therefore, ioctl's
1351 * manipulating the lists and ioctl's sleeping while accessing the lists 1351 * manipulating the lists and ioctl's sleeping while accessing the lists
1352 * are serialized by means of a semaphore. 1352 * are serialized by means of a semaphore.
1353 */ 1353 */
diff --git a/drivers/isdn/mISDN/dsp_core.c b/drivers/isdn/mISDN/dsp_core.c
index 43ff4d3b046e..6eac588e0a37 100644
--- a/drivers/isdn/mISDN/dsp_core.c
+++ b/drivers/isdn/mISDN/dsp_core.c
@@ -1114,7 +1114,7 @@ static struct Bprotocol DSP = {
1114 .create = dspcreate 1114 .create = dspcreate
1115}; 1115};
1116 1116
1117static int dsp_init(void) 1117static int __init dsp_init(void)
1118{ 1118{
1119 int err; 1119 int err;
1120 int tics; 1120 int tics;
@@ -1212,7 +1212,7 @@ static int dsp_init(void)
1212} 1212}
1213 1213
1214 1214
1215static void dsp_cleanup(void) 1215static void __exit dsp_cleanup(void)
1216{ 1216{
1217 mISDN_unregister_Bprotocol(&DSP); 1217 mISDN_unregister_Bprotocol(&DSP);
1218 1218
diff --git a/drivers/isdn/mISDN/l1oip_core.c b/drivers/isdn/mISDN/l1oip_core.c
index f1e8af54dff0..325b1ad7d4b8 100644
--- a/drivers/isdn/mISDN/l1oip_core.c
+++ b/drivers/isdn/mISDN/l1oip_core.c
@@ -477,7 +477,7 @@ l1oip_socket_parse(struct l1oip *hc, struct sockaddr_in *sin, u8 *buf, int len)
477 printk(KERN_DEBUG "%s: received frame, parsing... (%d)\n", 477 printk(KERN_DEBUG "%s: received frame, parsing... (%d)\n",
478 __func__, len); 478 __func__, len);
479 479
480 /* check lenght */ 480 /* check length */
481 if (len < 1+1+2) { 481 if (len < 1+1+2) {
482 printk(KERN_WARNING "%s: packet error - length %d below " 482 printk(KERN_WARNING "%s: packet error - length %d below "
483 "4 bytes\n", __func__, len); 483 "4 bytes\n", __func__, len);
@@ -1509,7 +1509,7 @@ l1oip_init(void)
1509 printk(KERN_DEBUG "%s: interface %d is %s with %s.\n", 1509 printk(KERN_DEBUG "%s: interface %d is %s with %s.\n",
1510 __func__, l1oip_cnt, pri ? "PRI" : "BRI", 1510 __func__, l1oip_cnt, pri ? "PRI" : "BRI",
1511 bundle ? "bundled IP packet for all B-channels" : 1511 bundle ? "bundled IP packet for all B-channels" :
1512 "seperate IP packets for every B-channel"); 1512 "separate IP packets for every B-channel");
1513 1513
1514 hc = kzalloc(sizeof(struct l1oip), GFP_ATOMIC); 1514 hc = kzalloc(sizeof(struct l1oip), GFP_ATOMIC);
1515 if (!hc) { 1515 if (!hc) {
diff --git a/drivers/isdn/sc/hardware.h b/drivers/isdn/sc/hardware.h
index 9e6d5302bf8e..627324856ead 100644
--- a/drivers/isdn/sc/hardware.h
+++ b/drivers/isdn/sc/hardware.h
@@ -87,7 +87,7 @@
87#define BRI_CHANNELS 2 /* Number of B channels */ 87#define BRI_CHANNELS 2 /* Number of B channels */
88#define BRI_BASEPG_VAL 0x98 88#define BRI_BASEPG_VAL 0x98
89#define BRI_MAGIC 0x60000 /* Magic Number */ 89#define BRI_MAGIC 0x60000 /* Magic Number */
90#define BRI_MEMSIZE 0x10000 /* Ammount of RAM (64K) */ 90#define BRI_MEMSIZE 0x10000 /* Amount of RAM (64K) */
91#define BRI_PARTNO "72-029" 91#define BRI_PARTNO "72-029"
92#define BRI_FEATURES ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS; 92#define BRI_FEATURES ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS;
93/* 93/*
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index 5738d8bf2d97..921373e4e3af 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -948,10 +948,16 @@ static void do_monitor_cpu_combined(void)
948 printk(KERN_WARNING "Warning ! Temperature way above maximum (%d) !\n", 948 printk(KERN_WARNING "Warning ! Temperature way above maximum (%d) !\n",
949 temp_combi >> 16); 949 temp_combi >> 16);
950 state0->overtemp += CPU_MAX_OVERTEMP / 4; 950 state0->overtemp += CPU_MAX_OVERTEMP / 4;
951 } else if (temp_combi > (state0->mpu.tmax << 16)) 951 } else if (temp_combi > (state0->mpu.tmax << 16)) {
952 state0->overtemp++; 952 state0->overtemp++;
953 else 953 printk(KERN_WARNING "Temperature %d above max %d. overtemp %d\n",
954 temp_combi >> 16, state0->mpu.tmax, state0->overtemp);
955 } else {
956 if (state0->overtemp)
957 printk(KERN_WARNING "Temperature back down to %d\n",
958 temp_combi >> 16);
954 state0->overtemp = 0; 959 state0->overtemp = 0;
960 }
955 if (state0->overtemp >= CPU_MAX_OVERTEMP) 961 if (state0->overtemp >= CPU_MAX_OVERTEMP)
956 critical_state = 1; 962 critical_state = 1;
957 if (state0->overtemp > 0) { 963 if (state0->overtemp > 0) {
@@ -1023,10 +1029,16 @@ static void do_monitor_cpu_split(struct cpu_pid_state *state)
1023 " (%d) !\n", 1029 " (%d) !\n",
1024 state->index, temp >> 16); 1030 state->index, temp >> 16);
1025 state->overtemp += CPU_MAX_OVERTEMP / 4; 1031 state->overtemp += CPU_MAX_OVERTEMP / 4;
1026 } else if (temp > (state->mpu.tmax << 16)) 1032 } else if (temp > (state->mpu.tmax << 16)) {
1027 state->overtemp++; 1033 state->overtemp++;
1028 else 1034 printk(KERN_WARNING "CPU %d temperature %d above max %d. overtemp %d\n",
1035 state->index, temp >> 16, state->mpu.tmax, state->overtemp);
1036 } else {
1037 if (state->overtemp)
1038 printk(KERN_WARNING "CPU %d temperature back down to %d\n",
1039 state->index, temp >> 16);
1029 state->overtemp = 0; 1040 state->overtemp = 0;
1041 }
1030 if (state->overtemp >= CPU_MAX_OVERTEMP) 1042 if (state->overtemp >= CPU_MAX_OVERTEMP)
1031 critical_state = 1; 1043 critical_state = 1;
1032 if (state->overtemp > 0) { 1044 if (state->overtemp > 0) {
@@ -1085,10 +1097,16 @@ static void do_monitor_cpu_rack(struct cpu_pid_state *state)
1085 " (%d) !\n", 1097 " (%d) !\n",
1086 state->index, temp >> 16); 1098 state->index, temp >> 16);
1087 state->overtemp = CPU_MAX_OVERTEMP / 4; 1099 state->overtemp = CPU_MAX_OVERTEMP / 4;
1088 } else if (temp > (state->mpu.tmax << 16)) 1100 } else if (temp > (state->mpu.tmax << 16)) {
1089 state->overtemp++; 1101 state->overtemp++;
1090 else 1102 printk(KERN_WARNING "CPU %d temperature %d above max %d. overtemp %d\n",
1103 state->index, temp >> 16, state->mpu.tmax, state->overtemp);
1104 } else {
1105 if (state->overtemp)
1106 printk(KERN_WARNING "CPU %d temperature back down to %d\n",
1107 state->index, temp >> 16);
1091 state->overtemp = 0; 1108 state->overtemp = 0;
1109 }
1092 if (state->overtemp >= CPU_MAX_OVERTEMP) 1110 if (state->overtemp >= CPU_MAX_OVERTEMP)
1093 critical_state = 1; 1111 critical_state = 1;
1094 if (state->overtemp > 0) { 1112 if (state->overtemp > 0) {
diff --git a/drivers/macintosh/therm_pm72.h b/drivers/macintosh/therm_pm72.h
index 393cc9df94e1..df3680e2a22f 100644
--- a/drivers/macintosh/therm_pm72.h
+++ b/drivers/macintosh/therm_pm72.h
@@ -269,7 +269,7 @@ struct slots_pid_state
269#define CPU_TEMP_HISTORY_SIZE 2 269#define CPU_TEMP_HISTORY_SIZE 2
270#define CPU_POWER_HISTORY_SIZE 10 270#define CPU_POWER_HISTORY_SIZE 10
271#define CPU_PID_INTERVAL 1 271#define CPU_PID_INTERVAL 1
272#define CPU_MAX_OVERTEMP 30 272#define CPU_MAX_OVERTEMP 90
273 273
274#define CPUA_PUMP_RPM_INDEX 7 274#define CPUA_PUMP_RPM_INDEX 7
275#define CPUB_PUMP_RPM_INDEX 8 275#define CPUB_PUMP_RPM_INDEX 8
diff --git a/drivers/macintosh/windfarm_core.c b/drivers/macintosh/windfarm_core.c
index 437f55c5d18d..419795f4a2aa 100644
--- a/drivers/macintosh/windfarm_core.c
+++ b/drivers/macintosh/windfarm_core.c
@@ -321,6 +321,7 @@ int wf_register_sensor(struct wf_sensor *new_sr)
321 kref_init(&new_sr->ref); 321 kref_init(&new_sr->ref);
322 list_add(&new_sr->link, &wf_sensors); 322 list_add(&new_sr->link, &wf_sensors);
323 323
324 sysfs_attr_init(&new_sr->attr.attr);
324 new_sr->attr.attr.name = new_sr->name; 325 new_sr->attr.attr.name = new_sr->name;
325 new_sr->attr.attr.mode = 0444; 326 new_sr->attr.attr.mode = 0444;
326 new_sr->attr.show = wf_show_sensor; 327 new_sr->attr.show = wf_show_sensor;
diff --git a/drivers/macintosh/windfarm_smu_controls.c b/drivers/macintosh/windfarm_smu_controls.c
index 6c68b9e5f5c4..43137b421f92 100644
--- a/drivers/macintosh/windfarm_smu_controls.c
+++ b/drivers/macintosh/windfarm_smu_controls.c
@@ -173,6 +173,7 @@ static struct smu_fan_control *smu_fan_create(struct device_node *node,
173 173
174 fct->fan_type = pwm_fan; 174 fct->fan_type = pwm_fan;
175 fct->ctrl.type = pwm_fan ? WF_CONTROL_PWM_FAN : WF_CONTROL_RPM_FAN; 175 fct->ctrl.type = pwm_fan ? WF_CONTROL_PWM_FAN : WF_CONTROL_RPM_FAN;
176 sysfs_attr_init(&fct->ctrl.attr.attr);
176 177
177 /* We use the name & location here the same way we do for SMU sensors, 178 /* We use the name & location here the same way we do for SMU sensors,
178 * see the comment in windfarm_smu_sensors.c. The locations are a bit 179 * see the comment in windfarm_smu_sensors.c. The locations are a bit
diff --git a/drivers/md/dm-sysfs.c b/drivers/md/dm-sysfs.c
index f91b40942e07..84d2b91e4efb 100644
--- a/drivers/md/dm-sysfs.c
+++ b/drivers/md/dm-sysfs.c
@@ -75,7 +75,7 @@ static struct attribute *dm_attrs[] = {
75 NULL, 75 NULL,
76}; 76};
77 77
78static struct sysfs_ops dm_sysfs_ops = { 78static const struct sysfs_ops dm_sysfs_ops = {
79 .show = dm_attr_show, 79 .show = dm_attr_show,
80}; 80};
81 81
diff --git a/drivers/md/md.c b/drivers/md/md.c
index a20a71e5efd3..fdc1890b6ac5 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -2642,7 +2642,7 @@ static void rdev_free(struct kobject *ko)
2642 mdk_rdev_t *rdev = container_of(ko, mdk_rdev_t, kobj); 2642 mdk_rdev_t *rdev = container_of(ko, mdk_rdev_t, kobj);
2643 kfree(rdev); 2643 kfree(rdev);
2644} 2644}
2645static struct sysfs_ops rdev_sysfs_ops = { 2645static const struct sysfs_ops rdev_sysfs_ops = {
2646 .show = rdev_attr_show, 2646 .show = rdev_attr_show,
2647 .store = rdev_attr_store, 2647 .store = rdev_attr_store,
2648}; 2648};
@@ -4059,7 +4059,7 @@ static void md_free(struct kobject *ko)
4059 kfree(mddev); 4059 kfree(mddev);
4060} 4060}
4061 4061
4062static struct sysfs_ops md_sysfs_ops = { 4062static const struct sysfs_ops md_sysfs_ops = {
4063 .show = md_attr_show, 4063 .show = md_attr_show,
4064 .store = md_attr_store, 4064 .store = md_attr_store,
4065}; 4065};
diff --git a/drivers/media/IR/ir-keytable.c b/drivers/media/IR/ir-keytable.c
index 0903f539bf68..0a3b4ed38e48 100644
--- a/drivers/media/IR/ir-keytable.c
+++ b/drivers/media/IR/ir-keytable.c
@@ -123,7 +123,7 @@ static int ir_copy_table(struct ir_scancode_table *destin,
123 * If the key is not found, returns -EINVAL, otherwise, returns 0. 123 * If the key is not found, returns -EINVAL, otherwise, returns 0.
124 */ 124 */
125static int ir_getkeycode(struct input_dev *dev, 125static int ir_getkeycode(struct input_dev *dev,
126 int scancode, int *keycode) 126 unsigned int scancode, unsigned int *keycode)
127{ 127{
128 int elem; 128 int elem;
129 struct ir_input_dev *ir_dev = input_get_drvdata(dev); 129 struct ir_input_dev *ir_dev = input_get_drvdata(dev);
@@ -291,7 +291,7 @@ static int ir_insert_key(struct ir_scancode_table *rc_tab,
291 * If the key is not found, returns -EINVAL, otherwise, returns 0. 291 * If the key is not found, returns -EINVAL, otherwise, returns 0.
292 */ 292 */
293static int ir_setkeycode(struct input_dev *dev, 293static int ir_setkeycode(struct input_dev *dev,
294 int scancode, int keycode) 294 unsigned int scancode, unsigned int keycode)
295{ 295{
296 int rc = 0; 296 int rc = 0;
297 struct ir_input_dev *ir_dev = input_get_drvdata(dev); 297 struct ir_input_dev *ir_dev = input_get_drvdata(dev);
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h
index 52e4ce4304ee..80dda308ff74 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.h
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.h
@@ -214,14 +214,14 @@ struct dvb_tuner_ops {
214 int (*get_status)(struct dvb_frontend *fe, u32 *status); 214 int (*get_status)(struct dvb_frontend *fe, u32 *status);
215 int (*get_rf_strength)(struct dvb_frontend *fe, u16 *strength); 215 int (*get_rf_strength)(struct dvb_frontend *fe, u16 *strength);
216 216
217 /** These are provided seperately from set_params in order to facilitate silicon 217 /** These are provided separately from set_params in order to facilitate silicon
218 * tuners which require sophisticated tuning loops, controlling each parameter seperately. */ 218 * tuners which require sophisticated tuning loops, controlling each parameter separately. */
219 int (*set_frequency)(struct dvb_frontend *fe, u32 frequency); 219 int (*set_frequency)(struct dvb_frontend *fe, u32 frequency);
220 int (*set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth); 220 int (*set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
221 221
222 /* 222 /*
223 * These are provided seperately from set_params in order to facilitate silicon 223 * These are provided separately from set_params in order to facilitate silicon
224 * tuners which require sophisticated tuning loops, controlling each parameter seperately. 224 * tuners which require sophisticated tuning loops, controlling each parameter separately.
225 */ 225 */
226 int (*set_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state); 226 int (*set_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
227 int (*get_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state); 227 int (*get_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
index a03ef7efec9a..852fe89539cf 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
@@ -9,7 +9,7 @@
9#include <linux/usb/input.h> 9#include <linux/usb/input.h>
10 10
11static int dvb_usb_getkeycode(struct input_dev *dev, 11static int dvb_usb_getkeycode(struct input_dev *dev,
12 int scancode, int *keycode) 12 unsigned int scancode, unsigned int *keycode)
13{ 13{
14 struct dvb_usb_device *d = input_get_drvdata(dev); 14 struct dvb_usb_device *d = input_get_drvdata(dev);
15 15
@@ -39,7 +39,7 @@ static int dvb_usb_getkeycode(struct input_dev *dev,
39} 39}
40 40
41static int dvb_usb_setkeycode(struct input_dev *dev, 41static int dvb_usb_setkeycode(struct input_dev *dev,
42 int scancode, int keycode) 42 unsigned int scancode, unsigned int keycode)
43{ 43{
44 struct dvb_usb_device *d = input_get_drvdata(dev); 44 struct dvb_usb_device *d = input_get_drvdata(dev);
45 45
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index 12279f6d9bc4..716870ae85d5 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -4404,7 +4404,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input)
4404/* Tibet Systems 'Progress DVR' CS16 muxsel helper [Chris Fanning] 4404/* Tibet Systems 'Progress DVR' CS16 muxsel helper [Chris Fanning]
4405 * 4405 *
4406 * The CS16 (available on eBay cheap) is a PCI board with four Fusion 4406 * The CS16 (available on eBay cheap) is a PCI board with four Fusion
4407 * 878A chips, a PCI bridge, an Atmel microcontroller, four sync seperator 4407 * 878A chips, a PCI bridge, an Atmel microcontroller, four sync separator
4408 * chips, ten eight input analog multiplexors, a not chip and a few 4408 * chips, ten eight input analog multiplexors, a not chip and a few
4409 * other components. 4409 * other components.
4410 * 4410 *
@@ -4426,7 +4426,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input)
4426 * 4426 *
4427 * There is an ATMEL microcontroller with an 8031 core on board. I have not 4427 * There is an ATMEL microcontroller with an 8031 core on board. I have not
4428 * determined what function (if any) it provides. With the microcontroller 4428 * determined what function (if any) it provides. With the microcontroller
4429 * and sync seperator chips a guess is that it might have to do with video 4429 * and sync separator chips a guess is that it might have to do with video
4430 * switching and maybe some digital I/O. 4430 * switching and maybe some digital I/O.
4431 */ 4431 */
4432static void tibetCS16_muxsel(struct bttv *btv, unsigned int input) 4432static void tibetCS16_muxsel(struct bttv *btv, unsigned int input)
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index bc4ced6c013b..f36e11a0458d 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -512,7 +512,7 @@ static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
512/* 512/*
513 * The FX2 chip does not give us a zero length read at end of frame. 513 * The FX2 chip does not give us a zero length read at end of frame.
514 * It does, however, give a short read at the end of a frame, if 514 * It does, however, give a short read at the end of a frame, if
515 * neccessary, rather than run two frames together. 515 * necessary, rather than run two frames together.
516 * 516 *
517 * By choosing the right bulk transfer size, we are guaranteed to always 517 * By choosing the right bulk transfer size, we are guaranteed to always
518 * get a short read for the last read of each frame. Frame sizes are 518 * get a short read for the last read of each frame. Frame sizes are
diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c
index 7400eacb4d64..142c327afb32 100644
--- a/drivers/media/video/omap24xxcam.c
+++ b/drivers/media/video/omap24xxcam.c
@@ -1735,7 +1735,7 @@ static struct v4l2_int_device omap24xxcam = {
1735 * 1735 *
1736 */ 1736 */
1737 1737
1738static int __init omap24xxcam_probe(struct platform_device *pdev) 1738static int __devinit omap24xxcam_probe(struct platform_device *pdev)
1739{ 1739{
1740 struct omap24xxcam_device *cam; 1740 struct omap24xxcam_device *cam;
1741 struct resource *mem; 1741 struct resource *mem;
diff --git a/drivers/media/video/pwc/philips.txt b/drivers/media/video/pwc/philips.txt
index f9f3584281d8..d38dd791511e 100644
--- a/drivers/media/video/pwc/philips.txt
+++ b/drivers/media/video/pwc/philips.txt
@@ -33,7 +33,7 @@ a lot of extra information, a FAQ, and the binary plugin 'PWCX'. This plugin
33contains decompression routines that allow you to use higher image sizes and 33contains decompression routines that allow you to use higher image sizes and
34framerates; in addition the webcam uses less bandwidth on the USB bus (handy 34framerates; in addition the webcam uses less bandwidth on the USB bus (handy
35if you want to run more than 1 camera simultaneously). These routines fall 35if you want to run more than 1 camera simultaneously). These routines fall
36under a NDA, and may therefor not be distributed as source; however, its use 36under a NDA, and may therefore not be distributed as source; however, its use
37is completely optional. 37is completely optional.
38 38
39You can build this code either into your kernel, or as a module. I recommend 39You can build this code either into your kernel, or as a module. I recommend
diff --git a/drivers/media/video/sn9c102/sn9c102_sensor.h b/drivers/media/video/sn9c102/sn9c102_sensor.h
index 4af7382da5c5..494957b10bac 100644
--- a/drivers/media/video/sn9c102/sn9c102_sensor.h
+++ b/drivers/media/video/sn9c102/sn9c102_sensor.h
@@ -120,7 +120,7 @@ extern int sn9c102_write_regs(struct sn9c102_device*, const u8 valreg[][2],
120/* 120/*
121 Write multiple registers with constant values. For example: 121 Write multiple registers with constant values. For example:
122 sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17}, {0x0f, 0x18}); 122 sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17}, {0x0f, 0x18});
123 Register adresses must be < 256. 123 Register addresses must be < 256.
124*/ 124*/
125#define sn9c102_write_const_regs(sn9c102_device, data...) \ 125#define sn9c102_write_const_regs(sn9c102_device, data...) \
126 ({ static const u8 _valreg[][2] = {data}; \ 126 ({ static const u8 _valreg[][2] = {data}; \
diff --git a/drivers/media/video/tea6420.c b/drivers/media/video/tea6420.c
index 0446524d3543..6bf6bc7dbc7f 100644
--- a/drivers/media/video/tea6420.c
+++ b/drivers/media/video/tea6420.c
@@ -6,7 +6,7 @@
6 6
7 The tea6420 is a bus controlled audio-matrix with 5 stereo inputs, 7 The tea6420 is a bus controlled audio-matrix with 5 stereo inputs,
8 4 stereo outputs and gain control for each output. 8 4 stereo outputs and gain control for each output.
9 It is cascadable, i.e. it can be found at the adresses 0x98 9 It is cascadable, i.e. it can be found at the addresses 0x98
10 and 0x9a on the i2c-bus. 10 and 0x9a on the i2c-bus.
11 11
12 For detailed informations download the specifications directly 12 For detailed informations download the specifications directly
diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c
index e5ab62141503..ef5ce2676f05 100644
--- a/drivers/message/i2o/iop.c
+++ b/drivers/message/i2o/iop.c
@@ -539,7 +539,7 @@ static int i2o_iop_reset(struct i2o_controller *c)
539 * which is indeterminate. We need to wait until the IOP has 539 * which is indeterminate. We need to wait until the IOP has
540 * rebooted before we can let the system talk to it. We read 540 * rebooted before we can let the system talk to it. We read
541 * the inbound Free_List until a message is available. If we 541 * the inbound Free_List until a message is available. If we
542 * can't read one in the given ammount of time, we assume the 542 * can't read one in the given amount of time, we assume the
543 * IOP could not reboot properly. 543 * IOP could not reboot properly.
544 */ 544 */
545 osm_debug("%s: Reset in progress, waiting for reboot...\n", 545 osm_debug("%s: Reset in progress, waiting for reboot...\n",
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 951fa9b93fbe..2a5a0b78f84e 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -11,7 +11,7 @@ config MFD_CORE
11 11
12config MFD_88PM860X 12config MFD_88PM860X
13 bool "Support Marvell 88PM8606/88PM8607" 13 bool "Support Marvell 88PM8606/88PM8607"
14 depends on I2C=y 14 depends on I2C=y && GENERIC_HARDIRQS
15 select MFD_CORE 15 select MFD_CORE
16 help 16 help
17 This supports for Marvell 88PM8606/88PM8607 Power Management IC. 17 This supports for Marvell 88PM8606/88PM8607 Power Management IC.
@@ -205,7 +205,7 @@ config PMIC_ADP5520
205 205
206config MFD_MAX8925 206config MFD_MAX8925
207 bool "Maxim Semiconductor MAX8925 PMIC Support" 207 bool "Maxim Semiconductor MAX8925 PMIC Support"
208 depends on I2C=y 208 depends on I2C=y && GENERIC_HARDIRQS
209 select MFD_CORE 209 select MFD_CORE
210 help 210 help
211 Say yes here to support for Maxim Semiconductor MAX8925. This is 211 Say yes here to support for Maxim Semiconductor MAX8925. This is
@@ -226,7 +226,7 @@ config MFD_WM8400
226config MFD_WM831X 226config MFD_WM831X
227 bool "Support Wolfson Microelectronics WM831x/2x PMICs" 227 bool "Support Wolfson Microelectronics WM831x/2x PMICs"
228 select MFD_CORE 228 select MFD_CORE
229 depends on I2C=y 229 depends on I2C=y && GENERIC_HARDIRQS
230 help 230 help
231 Support for the Wolfson Microelecronics WM831x and WM832x PMICs. 231 Support for the Wolfson Microelecronics WM831x and WM832x PMICs.
232 This driver provides common support for accessing the device, 232 This driver provides common support for accessing the device,
@@ -235,6 +235,7 @@ config MFD_WM831X
235 235
236config MFD_WM8350 236config MFD_WM8350
237 bool 237 bool
238 depends on GENERIC_HARDIRQS
238 239
239config MFD_WM8350_CONFIG_MODE_0 240config MFD_WM8350_CONFIG_MODE_0
240 bool 241 bool
@@ -287,7 +288,7 @@ config MFD_WM8352_CONFIG_MODE_3
287config MFD_WM8350_I2C 288config MFD_WM8350_I2C
288 bool "Support Wolfson Microelectronics WM8350 with I2C" 289 bool "Support Wolfson Microelectronics WM8350 with I2C"
289 select MFD_WM8350 290 select MFD_WM8350
290 depends on I2C=y 291 depends on I2C=y && GENERIC_HARDIRQS
291 help 292 help
292 The WM8350 is an integrated audio and power management 293 The WM8350 is an integrated audio and power management
293 subsystem with watchdog and RTC functionality for embedded 294 subsystem with watchdog and RTC functionality for embedded
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index dc9ea95c0561..7b6652f60117 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -523,7 +523,7 @@ unsigned long sm501_set_clock(struct device *dev,
523 unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK); 523 unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK);
524 unsigned char reg; 524 unsigned char reg;
525 unsigned int pll_reg = 0; 525 unsigned int pll_reg = 0;
526 unsigned long sm501_freq; /* the actual frequency acheived */ 526 unsigned long sm501_freq; /* the actual frequency achieved */
527 527
528 struct sm501_clock to; 528 struct sm501_clock to;
529 529
@@ -533,7 +533,7 @@ unsigned long sm501_set_clock(struct device *dev,
533 533
534 switch (clksrc) { 534 switch (clksrc) {
535 case SM501_CLOCK_P2XCLK: 535 case SM501_CLOCK_P2XCLK:
536 /* This clock is divided in half so to achive the 536 /* This clock is divided in half so to achieve the
537 * requested frequency the value must be multiplied by 537 * requested frequency the value must be multiplied by
538 * 2. This clock also has an additional pre divisor */ 538 * 2. This clock also has an additional pre divisor */
539 539
@@ -562,7 +562,7 @@ unsigned long sm501_set_clock(struct device *dev,
562 break; 562 break;
563 563
564 case SM501_CLOCK_V2XCLK: 564 case SM501_CLOCK_V2XCLK:
565 /* This clock is divided in half so to achive the 565 /* This clock is divided in half so to achieve the
566 * requested frequency the value must be multiplied by 2. */ 566 * requested frequency the value must be multiplied by 2. */
567 567
568 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 3) / 2); 568 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 3) / 2);
@@ -648,7 +648,7 @@ unsigned long sm501_find_clock(struct device *dev,
648 unsigned long req_freq) 648 unsigned long req_freq)
649{ 649{
650 struct sm501_devdata *sm = dev_get_drvdata(dev); 650 struct sm501_devdata *sm = dev_get_drvdata(dev);
651 unsigned long sm501_freq; /* the frequency achiveable by the 501 */ 651 unsigned long sm501_freq; /* the frequency achieveable by the 501 */
652 struct sm501_clock to; 652 struct sm501_clock to;
653 653
654 switch (clksrc) { 654 switch (clksrc) {
@@ -1430,7 +1430,7 @@ static int __devinit sm501_plat_probe(struct platform_device *dev)
1430 } 1430 }
1431 1431
1432 sm->regs_claim = request_mem_region(sm->io_res->start, 1432 sm->regs_claim = request_mem_region(sm->io_res->start,
1433 resource_size(sm->io_res), "sm501"); 1433 0x100, "sm501");
1434 1434
1435 if (sm->regs_claim == NULL) { 1435 if (sm->regs_claim == NULL) {
1436 dev_err(&dev->dev, "cannot claim registers\n"); 1436 dev_err(&dev->dev, "cannot claim registers\n");
@@ -1644,7 +1644,7 @@ static int __devinit sm501_pci_probe(struct pci_dev *dev,
1644 sm->mem_res = &dev->resource[0]; 1644 sm->mem_res = &dev->resource[0];
1645 1645
1646 sm->regs_claim = request_mem_region(sm->io_res->start, 1646 sm->regs_claim = request_mem_region(sm->io_res->start,
1647 resource_size(sm->io_res), "sm501"); 1647 0x100, "sm501");
1648 if (sm->regs_claim == NULL) { 1648 if (sm->regs_claim == NULL) {
1649 dev_err(&dev->dev, "cannot claim registers\n"); 1649 dev_err(&dev->dev, "cannot claim registers\n");
1650 err= -EBUSY; 1650 err= -EBUSY;
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index d16af6a423fb..2191c8d896a0 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -268,6 +268,16 @@ config ISL29003
268 This driver can also be built as a module. If so, the module 268 This driver can also be built as a module. If so, the module
269 will be called isl29003. 269 will be called isl29003.
270 270
271config SENSORS_TSL2550
272 tristate "Taos TSL2550 ambient light sensor"
273 depends on I2C && SYSFS
274 help
275 If you say yes here you get support for the Taos TSL2550
276 ambient light sensor.
277
278 This driver can also be built as a module. If so, the module
279 will be called tsl2550.
280
271config EP93XX_PWM 281config EP93XX_PWM
272 tristate "EP93xx PWM support" 282 tristate "EP93xx PWM support"
273 depends on ARCH_EP93XX 283 depends on ARCH_EP93XX
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 049ff2482f30..27c484355414 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_SGI_GRU) += sgi-gru/
21obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o 21obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o
22obj-$(CONFIG_HP_ILO) += hpilo.o 22obj-$(CONFIG_HP_ILO) += hpilo.o
23obj-$(CONFIG_ISL29003) += isl29003.o 23obj-$(CONFIG_ISL29003) += isl29003.o
24obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
24obj-$(CONFIG_EP93XX_PWM) += ep93xx_pwm.o 25obj-$(CONFIG_EP93XX_PWM) += ep93xx_pwm.o
25obj-$(CONFIG_DS1682) += ds1682.o 26obj-$(CONFIG_DS1682) += ds1682.o
26obj-$(CONFIG_TI_DAC7512) += ti_dac7512.o 27obj-$(CONFIG_TI_DAC7512) += ti_dac7512.o
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 2cb2736d65aa..db7d0f21b65d 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -505,6 +505,7 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
505 * Export the EEPROM bytes through sysfs, since that's convenient. 505 * Export the EEPROM bytes through sysfs, since that's convenient.
506 * By default, only root should see the data (maybe passwords etc) 506 * By default, only root should see the data (maybe passwords etc)
507 */ 507 */
508 sysfs_bin_attr_init(&at24->bin);
508 at24->bin.attr.name = "eeprom"; 509 at24->bin.attr.name = "eeprom";
509 at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; 510 at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR;
510 at24->bin.read = at24_bin_read; 511 at24->bin.read = at24_bin_read;
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index d902d81dde39..d194212a41f6 100644
--- a/drivers/misc/eeprom/at25.c
+++ b/drivers/misc/eeprom/at25.c
@@ -347,6 +347,7 @@ static int at25_probe(struct spi_device *spi)
347 * that's sensitive for read and/or write, like ethernet addresses, 347 * that's sensitive for read and/or write, like ethernet addresses,
348 * security codes, board-specific manufacturing calibrations, etc. 348 * security codes, board-specific manufacturing calibrations, etc.
349 */ 349 */
350 sysfs_bin_attr_init(&at25->bin);
350 at25->bin.attr.name = "eeprom"; 351 at25->bin.attr.name = "eeprom";
351 at25->bin.attr.mode = S_IRUSR; 352 at25->bin.attr.mode = S_IRUSR;
352 at25->bin.read = at25_bin_read; 353 at25->bin.read = at25_bin_read;
diff --git a/drivers/misc/phantom.c b/drivers/misc/phantom.c
index 04c27266f567..779aa8ebe4cf 100644
--- a/drivers/misc/phantom.c
+++ b/drivers/misc/phantom.c
@@ -497,12 +497,7 @@ static struct pci_driver phantom_pci_driver = {
497 .resume = phantom_resume 497 .resume = phantom_resume
498}; 498};
499 499
500static ssize_t phantom_show_version(struct class *cls, char *buf) 500static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);
501{
502 return sprintf(buf, PHANTOM_VERSION "\n");
503}
504
505static CLASS_ATTR(version, 0444, phantom_show_version, NULL);
506 501
507static int __init phantom_init(void) 502static int __init phantom_init(void)
508{ 503{
@@ -515,7 +510,7 @@ static int __init phantom_init(void)
515 printk(KERN_ERR "phantom: can't register phantom class\n"); 510 printk(KERN_ERR "phantom: can't register phantom class\n");
516 goto err; 511 goto err;
517 } 512 }
518 retval = class_create_file(phantom_class, &class_attr_version); 513 retval = class_create_file(phantom_class, &class_attr_version.attr);
519 if (retval) { 514 if (retval) {
520 printk(KERN_ERR "phantom: can't create sysfs version file\n"); 515 printk(KERN_ERR "phantom: can't create sysfs version file\n");
521 goto err_class; 516 goto err_class;
@@ -541,7 +536,7 @@ static int __init phantom_init(void)
541err_unchr: 536err_unchr:
542 unregister_chrdev_region(dev, PHANTOM_MAX_MINORS); 537 unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
543err_attr: 538err_attr:
544 class_remove_file(phantom_class, &class_attr_version); 539 class_remove_file(phantom_class, &class_attr_version.attr);
545err_class: 540err_class:
546 class_destroy(phantom_class); 541 class_destroy(phantom_class);
547err: 542err:
@@ -554,7 +549,7 @@ static void __exit phantom_exit(void)
554 549
555 unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS); 550 unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);
556 551
557 class_remove_file(phantom_class, &class_attr_version); 552 class_remove_file(phantom_class, &class_attr_version.attr);
558 class_destroy(phantom_class); 553 class_destroy(phantom_class);
559 554
560 pr_debug("phantom: module successfully removed\n"); 555 pr_debug("phantom: module successfully removed\n");
diff --git a/drivers/misc/sgi-gru/grutables.h b/drivers/misc/sgi-gru/grutables.h
index 02a77b8b8eef..7a8b9068ea03 100644
--- a/drivers/misc/sgi-gru/grutables.h
+++ b/drivers/misc/sgi-gru/grutables.h
@@ -516,8 +516,7 @@ struct gru_blade_state {
516 516
517/* Scan all active GRUs in a GRU bitmap */ 517/* Scan all active GRUs in a GRU bitmap */
518#define for_each_gru_in_bitmap(gid, map) \ 518#define for_each_gru_in_bitmap(gid, map) \
519 for ((gid) = find_first_bit((map), GRU_MAX_GRUS); (gid) < GRU_MAX_GRUS;\ 519 for_each_set_bit((gid), (map), GRU_MAX_GRUS)
520 (gid)++, (gid) = find_next_bit((map), GRU_MAX_GRUS, (gid)))
521 520
522/* Scan all active GRUs on a specific blade */ 521/* Scan all active GRUs on a specific blade */
523#define for_each_gru_on_blade(gru, nid, i) \ 522#define for_each_gru_on_blade(gru, nid, i) \
@@ -536,23 +535,17 @@ struct gru_blade_state {
536 535
537/* Scan each CBR whose bit is set in a TFM (or copy of) */ 536/* Scan each CBR whose bit is set in a TFM (or copy of) */
538#define for_each_cbr_in_tfm(i, map) \ 537#define for_each_cbr_in_tfm(i, map) \
539 for ((i) = find_first_bit(map, GRU_NUM_CBE); \ 538 for_each_set_bit((i), (map), GRU_NUM_CBE)
540 (i) < GRU_NUM_CBE; \
541 (i)++, (i) = find_next_bit(map, GRU_NUM_CBE, i))
542 539
543/* Scan each CBR in a CBR bitmap. Note: multiple CBRs in an allocation unit */ 540/* Scan each CBR in a CBR bitmap. Note: multiple CBRs in an allocation unit */
544#define for_each_cbr_in_allocation_map(i, map, k) \ 541#define for_each_cbr_in_allocation_map(i, map, k) \
545 for ((k) = find_first_bit(map, GRU_CBR_AU); (k) < GRU_CBR_AU; \ 542 for_each_set_bit((k), (map), GRU_CBR_AU) \
546 (k) = find_next_bit(map, GRU_CBR_AU, (k) + 1)) \
547 for ((i) = (k)*GRU_CBR_AU_SIZE; \ 543 for ((i) = (k)*GRU_CBR_AU_SIZE; \
548 (i) < ((k) + 1) * GRU_CBR_AU_SIZE; (i)++) 544 (i) < ((k) + 1) * GRU_CBR_AU_SIZE; (i)++)
549 545
550/* Scan each DSR in a DSR bitmap. Note: multiple DSRs in an allocation unit */ 546/* Scan each DSR in a DSR bitmap. Note: multiple DSRs in an allocation unit */
551#define for_each_dsr_in_allocation_map(i, map, k) \ 547#define for_each_dsr_in_allocation_map(i, map, k) \
552 for ((k) = find_first_bit((const unsigned long *)map, GRU_DSR_AU);\ 548 for_each_set_bit((k), (const unsigned long *)(map), GRU_DSR_AU) \
553 (k) < GRU_DSR_AU; \
554 (k) = find_next_bit((const unsigned long *)map, \
555 GRU_DSR_AU, (k) + 1)) \
556 for ((i) = (k) * GRU_DSR_AU_CL; \ 549 for ((i) = (k) * GRU_DSR_AU_CL; \
557 (i) < ((k) + 1) * GRU_DSR_AU_CL; (i)++) 550 (i) < ((k) + 1) * GRU_DSR_AU_CL; (i)++)
558 551
diff --git a/drivers/i2c/chips/tsl2550.c b/drivers/misc/tsl2550.c
index a0702f36a72f..483ae5f7f68e 100644
--- a/drivers/i2c/chips/tsl2550.c
+++ b/drivers/misc/tsl2550.c
@@ -47,8 +47,8 @@ struct tsl2550_data {
47 struct i2c_client *client; 47 struct i2c_client *client;
48 struct mutex update_lock; 48 struct mutex update_lock;
49 49
50 unsigned int power_state : 1; 50 unsigned int power_state:1;
51 unsigned int operating_mode : 1; 51 unsigned int operating_mode:1;
52}; 52};
53 53
54/* 54/*
diff --git a/drivers/mmc/card/sdio_uart.c b/drivers/mmc/card/sdio_uart.c
index 3fab78ba8952..723e50894db9 100644
--- a/drivers/mmc/card/sdio_uart.c
+++ b/drivers/mmc/card/sdio_uart.c
@@ -575,7 +575,7 @@ static int uart_carrier_raised(struct tty_port *tport)
575 struct sdio_uart_port *port = 575 struct sdio_uart_port *port =
576 container_of(tport, struct sdio_uart_port, port); 576 container_of(tport, struct sdio_uart_port, port);
577 unsigned int ret = sdio_uart_claim_func(port); 577 unsigned int ret = sdio_uart_claim_func(port);
578 if (ret) /* Missing hardware shoudn't block for carrier */ 578 if (ret) /* Missing hardware shouldn't block for carrier */
579 return 1; 579 return 1;
580 ret = sdio_uart_get_mctrl(port); 580 ret = sdio_uart_get_mctrl(port);
581 sdio_uart_release_func(port); 581 sdio_uart_release_func(port);
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index f4b97d3c3d0f..3168ebd616b2 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1089,6 +1089,7 @@ void mmc_rescan(struct work_struct *work)
1089 mmc_claim_host(host); 1089 mmc_claim_host(host);
1090 1090
1091 mmc_power_up(host); 1091 mmc_power_up(host);
1092 sdio_reset(host);
1092 mmc_go_idle(host); 1093 mmc_go_idle(host);
1093 1094
1094 mmc_send_if_cond(host, host->ocr_avail); 1095 mmc_send_if_cond(host, host->ocr_avail);
diff --git a/drivers/mmc/core/sdio_ops.c b/drivers/mmc/core/sdio_ops.c
index 4eb7825fd1a7..dea36d9c22e6 100644
--- a/drivers/mmc/core/sdio_ops.c
+++ b/drivers/mmc/core/sdio_ops.c
@@ -67,13 +67,13 @@ int mmc_send_io_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
67 return err; 67 return err;
68} 68}
69 69
70int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn, 70static int mmc_io_rw_direct_host(struct mmc_host *host, int write, unsigned fn,
71 unsigned addr, u8 in, u8* out) 71 unsigned addr, u8 in, u8 *out)
72{ 72{
73 struct mmc_command cmd; 73 struct mmc_command cmd;
74 int err; 74 int err;
75 75
76 BUG_ON(!card); 76 BUG_ON(!host);
77 BUG_ON(fn > 7); 77 BUG_ON(fn > 7);
78 78
79 /* sanity check */ 79 /* sanity check */
@@ -90,11 +90,11 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
90 cmd.arg |= in; 90 cmd.arg |= in;
91 cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC; 91 cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC;
92 92
93 err = mmc_wait_for_cmd(card->host, &cmd, 0); 93 err = mmc_wait_for_cmd(host, &cmd, 0);
94 if (err) 94 if (err)
95 return err; 95 return err;
96 96
97 if (mmc_host_is_spi(card->host)) { 97 if (mmc_host_is_spi(host)) {
98 /* host driver already reported errors */ 98 /* host driver already reported errors */
99 } else { 99 } else {
100 if (cmd.resp[0] & R5_ERROR) 100 if (cmd.resp[0] & R5_ERROR)
@@ -106,7 +106,7 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
106 } 106 }
107 107
108 if (out) { 108 if (out) {
109 if (mmc_host_is_spi(card->host)) 109 if (mmc_host_is_spi(host))
110 *out = (cmd.resp[0] >> 8) & 0xFF; 110 *out = (cmd.resp[0] >> 8) & 0xFF;
111 else 111 else
112 *out = cmd.resp[0] & 0xFF; 112 *out = cmd.resp[0] & 0xFF;
@@ -115,6 +115,13 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
115 return 0; 115 return 0;
116} 116}
117 117
118int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
119 unsigned addr, u8 in, u8 *out)
120{
121 BUG_ON(!card);
122 return mmc_io_rw_direct_host(card->host, write, fn, addr, in, out);
123}
124
118int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn, 125int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
119 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz) 126 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz)
120{ 127{
@@ -182,3 +189,20 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
182 return 0; 189 return 0;
183} 190}
184 191
192int sdio_reset(struct mmc_host *host)
193{
194 int ret;
195 u8 abort;
196
197 /* SDIO Simplified Specification V2.0, 4.4 Reset for SDIO */
198
199 ret = mmc_io_rw_direct_host(host, 0, 0, SDIO_CCCR_ABORT, 0, &abort);
200 if (ret)
201 abort = 0x08;
202 else
203 abort |= 0x08;
204
205 ret = mmc_io_rw_direct_host(host, 1, 0, SDIO_CCCR_ABORT, abort, NULL);
206 return ret;
207}
208
diff --git a/drivers/mmc/core/sdio_ops.h b/drivers/mmc/core/sdio_ops.h
index e2e74b0d17d8..12a4d3ab174c 100644
--- a/drivers/mmc/core/sdio_ops.h
+++ b/drivers/mmc/core/sdio_ops.h
@@ -17,6 +17,7 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
17 unsigned addr, u8 in, u8* out); 17 unsigned addr, u8 in, u8* out);
18int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn, 18int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
19 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz); 19 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz);
20int sdio_reset(struct mmc_host *host);
20 21
21#endif 22#endif
22 23
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index b31946e0b4ca..4c068e5fe6b2 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -1250,9 +1250,7 @@ msmsdcc_resume(struct platform_device *dev)
1250 1250
1251 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO) 1251 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1252 mmc_resume_host(mmc); 1252 mmc_resume_host(mmc);
1253 if (host->stat_irq) 1253 if (host->stat_irq)
1254 enable_irq(host->stat_irq);
1255 else if (host->stat_irq)
1256 enable_irq(host->stat_irq); 1254 enable_irq(host->stat_irq);
1257 } 1255 }
1258 return 0; 1256 return 0;
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index 60a2b69e54f5..2df90412abb5 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -4,7 +4,7 @@
4 * This is a driver for the SDHC controller found in Freescale MX2/MX3 4 * This is a driver for the SDHC controller found in Freescale MX2/MX3
5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c). 5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
6 * Unlike the hardware found on MX1, this hardware just works and does 6 * Unlike the hardware found on MX1, this hardware just works and does
7 * not need all the quirks found in imxmmc.c, hence the seperate driver. 7 * not need all the quirks found in imxmmc.c, hence the separate driver.
8 * 8 *
9 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 9 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
10 * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> 10 * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
@@ -708,7 +708,7 @@ static int mxcmci_probe(struct platform_device *pdev)
708 mmc->max_blk_size = 2048; 708 mmc->max_blk_size = 2048;
709 mmc->max_blk_count = 65535; 709 mmc->max_blk_count = 65535;
710 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 710 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
711 mmc->max_seg_size = mmc->max_seg_size; 711 mmc->max_seg_size = mmc->max_req_size;
712 712
713 host = mmc_priv(mmc); 713 host = mmc_priv(mmc);
714 host->base = ioremap(r->start, resource_size(r)); 714 host->base = ioremap(r->start, resource_size(r));
diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c
index ca584d0380b4..ca584d0380b4 100755..100644
--- a/drivers/mtd/chips/cfi_util.c
+++ b/drivers/mtd/chips/cfi_util.c
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 1bec5e1ce6ac..8db1148dfa47 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -226,7 +226,7 @@ struct unlock_addr {
226 * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore, 226 * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
227 * should not be used. The problem is that structures with 227 * should not be used. The problem is that structures with
228 * initializers have extra fields initialized to 0. It is _very_ 228 * initializers have extra fields initialized to 0. It is _very_
229 * desireable to have the unlock address entries for unsupported 229 * desirable to have the unlock address entries for unsupported
230 * data widths automatically initialized - that means that 230 * data widths automatically initialized - that means that
231 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here 231 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
232 * must go unused. 232 * must go unused.
diff --git a/drivers/mtd/inftlcore.c b/drivers/mtd/inftlcore.c
index 8aca5523a337..8aca5523a337 100755..100644
--- a/drivers/mtd/inftlcore.c
+++ b/drivers/mtd/inftlcore.c
diff --git a/drivers/mtd/maps/pismo.c b/drivers/mtd/maps/pismo.c
index c48cad271f5d..30e12c88d1da 100644
--- a/drivers/mtd/maps/pismo.c
+++ b/drivers/mtd/maps/pismo.c
@@ -118,7 +118,7 @@ static int __devinit pismo_add_device(struct pismo_data *pismo, int i,
118{ 118{
119 struct platform_device *dev; 119 struct platform_device *dev;
120 struct resource res = { }; 120 struct resource res = { };
121 phys_addr_t base = region.base; 121 phys_addr_t base = region->base;
122 int ret; 122 int ret;
123 123
124 if (base == ~0) 124 if (base == ~0)
diff --git a/drivers/mtd/maps/plat-ram.c b/drivers/mtd/maps/plat-ram.c
index dafb91944e70..76a76be5a7bd 100644
--- a/drivers/mtd/maps/plat-ram.c
+++ b/drivers/mtd/maps/plat-ram.c
@@ -4,7 +4,7 @@
4 * http://www.simtec.co.uk/products/SWLINUX/ 4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * Generic platfrom device based RAM map 7 * Generic platform device based RAM map
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index bb6465604235..1157d5679e66 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -444,7 +444,7 @@ config MTD_NAND_FSL_UPM
444 444
445config MTD_NAND_MXC 445config MTD_NAND_MXC
446 tristate "MXC NAND support" 446 tristate "MXC NAND support"
447 depends on ARCH_MX2 || ARCH_MX3 447 depends on ARCH_MX2 || ARCH_MX25 || ARCH_MX3
448 help 448 help
449 This enables the driver for the NAND flash controller on the 449 This enables the driver for the NAND flash controller on the
450 MXC processors. 450 MXC processors.
diff --git a/drivers/mtd/nand/bcm_umi_nand.c b/drivers/mtd/nand/bcm_umi_nand.c
index 087bcd745bb7..7d1cca7a31a9 100644
--- a/drivers/mtd/nand/bcm_umi_nand.c
+++ b/drivers/mtd/nand/bcm_umi_nand.c
@@ -381,7 +381,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
381 if (!r) 381 if (!r)
382 return -ENXIO; 382 return -ENXIO;
383 383
384 /* map physical adress */ 384 /* map physical address */
385 bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1); 385 bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1);
386 386
387 if (!bcm_umi_io_base) { 387 if (!bcm_umi_io_base) {
@@ -525,7 +525,7 @@ static int bcm_umi_nand_remove(struct platform_device *pdev)
525 /* Release resources, unregister device */ 525 /* Release resources, unregister device */
526 nand_release(board_mtd); 526 nand_release(board_mtd);
527 527
528 /* unmap physical adress */ 528 /* unmap physical address */
529 iounmap(bcm_umi_io_base); 529 iounmap(bcm_umi_io_base);
530 530
531 /* Free the MTD device structure */ 531 /* Free the MTD device structure */
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 45dec5770da0..b2900d8406d3 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -507,7 +507,7 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
507 * MXC NANDFC can only perform full page+spare or 507 * MXC NANDFC can only perform full page+spare or
508 * spare-only read/write. When the upper layers 508 * spare-only read/write. When the upper layers
509 * layers perform a read/write buf operation, 509 * layers perform a read/write buf operation,
510 * we will used the saved column adress to index into 510 * we will used the saved column address to index into
511 * the full page. 511 * the full page.
512 */ 512 */
513 send_addr(host, 0, page_addr == -1); 513 send_addr(host, 0, page_addr == -1);
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index bc45ef9af17d..fad40aa6f099 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -89,7 +89,8 @@ DEFINE_MUTEX(ubi_devices_mutex);
89static DEFINE_SPINLOCK(ubi_devices_lock); 89static DEFINE_SPINLOCK(ubi_devices_lock);
90 90
91/* "Show" method for files in '/<sysfs>/class/ubi/' */ 91/* "Show" method for files in '/<sysfs>/class/ubi/' */
92static ssize_t ubi_version_show(struct class *class, char *buf) 92static ssize_t ubi_version_show(struct class *class, struct class_attribute *attr,
93 char *buf)
93{ 94{
94 return sprintf(buf, "%d\n", UBI_VERSION); 95 return sprintf(buf, "%d\n", UBI_VERSION);
95} 96}
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 7029cd50c458..0ba5b8e50a7c 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -907,7 +907,7 @@ config SMC91X
907 select CRC32 907 select CRC32
908 select MII 908 select MII
909 depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || \ 909 depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || \
910 MIPS || BLACKFIN || MN10300 910 MIPS || BLACKFIN || MN10300 || COLDFIRE
911 help 911 help
912 This is a driver for SMC's 91x series of Ethernet chipsets, 912 This is a driver for SMC's 91x series of Ethernet chipsets,
913 including the SMC91C94 and the SMC91C111. Say Y if you want it 913 including the SMC91C94 and the SMC91C111. Say Y if you want it
diff --git a/drivers/net/arm/ks8695net.c b/drivers/net/arm/ks8695net.c
index 8ca639127dbc..a1d4188c430b 100644
--- a/drivers/net/arm/ks8695net.c
+++ b/drivers/net/arm/ks8695net.c
@@ -575,9 +575,9 @@ static int ks8695_poll(struct napi_struct *napi, int budget)
575 if (work_done < budget) { 575 if (work_done < budget) {
576 unsigned long flags; 576 unsigned long flags;
577 spin_lock_irqsave(&ksp->rx_lock, flags); 577 spin_lock_irqsave(&ksp->rx_lock, flags);
578 __napi_complete(napi);
578 /*enable rx interrupt*/ 579 /*enable rx interrupt*/
579 writel(isr | mask_bit, KS8695_IRQ_VA + KS8695_INTEN); 580 writel(isr | mask_bit, KS8695_IRQ_VA + KS8695_INTEN);
580 __napi_complete(napi);
581 spin_unlock_irqrestore(&ksp->rx_lock, flags); 581 spin_unlock_irqrestore(&ksp->rx_lock, flags);
582 } 582 }
583 return work_done; 583 return work_done;
diff --git a/drivers/net/atlx/atl2.h b/drivers/net/atlx/atl2.h
index d918bbe621ea..927e4de6474d 100644
--- a/drivers/net/atlx/atl2.h
+++ b/drivers/net/atlx/atl2.h
@@ -442,7 +442,7 @@ struct atl2_hw {
442struct atl2_ring_header { 442struct atl2_ring_header {
443 /* pointer to the descriptor ring memory */ 443 /* pointer to the descriptor ring memory */
444 void *desc; 444 void *desc;
445 /* physical adress of the descriptor ring */ 445 /* physical address of the descriptor ring */
446 dma_addr_t dma; 446 dma_addr_t dma;
447 /* length of descriptor ring in bytes */ 447 /* length of descriptor ring in bytes */
448 unsigned int size; 448 unsigned int size;
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
index be81fb2d10f7..8f0752553681 100644
--- a/drivers/net/benet/be.h
+++ b/drivers/net/benet/be.h
@@ -290,11 +290,6 @@ extern const struct ethtool_ops be_ethtool_ops;
290 290
291#define drvr_stats(adapter) (&adapter->stats.drvr_stats) 291#define drvr_stats(adapter) (&adapter->stats.drvr_stats)
292 292
293static inline unsigned int be_pci_func(struct be_adapter *adapter)
294{
295 return PCI_FUNC(adapter->pdev->devfn);
296}
297
298#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops) 293#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
299 294
300#define PAGE_SHIFT_4K 12 295#define PAGE_SHIFT_4K 12
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index 4b1f80519ca4..c59215361f4e 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -465,8 +465,6 @@ int be_cmd_eq_create(struct be_adapter *adapter,
465 465
466 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 466 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
467 467
468 AMAP_SET_BITS(struct amap_eq_context, func, req->context,
469 be_pci_func(adapter));
470 AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); 468 AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
471 /* 4byte eqe*/ 469 /* 4byte eqe*/
472 AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); 470 AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
@@ -629,7 +627,6 @@ int be_cmd_cq_create(struct be_adapter *adapter,
629 AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1); 627 AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
630 AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id); 628 AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
631 AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1); 629 AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
632 AMAP_SET_BITS(struct amap_cq_context, func, ctxt, be_pci_func(adapter));
633 be_dws_cpu_to_le(ctxt, sizeof(req->context)); 630 be_dws_cpu_to_le(ctxt, sizeof(req->context));
634 631
635 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); 632 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
@@ -678,7 +675,6 @@ int be_cmd_mccq_create(struct be_adapter *adapter,
678 675
679 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); 676 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
680 677
681 AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, be_pci_func(adapter));
682 AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1); 678 AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1);
683 AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt, 679 AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt,
684 be_encoded_q_len(mccq->len)); 680 be_encoded_q_len(mccq->len));
@@ -727,8 +723,6 @@ int be_cmd_txq_create(struct be_adapter *adapter,
727 723
728 AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, 724 AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt,
729 be_encoded_q_len(txq->len)); 725 be_encoded_q_len(txq->len));
730 AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt,
731 be_pci_func(adapter));
732 AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); 726 AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1);
733 AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id); 727 AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id);
734 728
diff --git a/drivers/net/benet/be_hw.h b/drivers/net/benet/be_hw.h
index 5ffb149181ad..2d4a4b827637 100644
--- a/drivers/net/benet/be_hw.h
+++ b/drivers/net/benet/be_hw.h
@@ -114,8 +114,7 @@
114#define IMG_TYPE_ISCSI_BACKUP 9 114#define IMG_TYPE_ISCSI_BACKUP 9
115#define IMG_TYPE_FCOE_FW_ACTIVE 10 115#define IMG_TYPE_FCOE_FW_ACTIVE 10
116#define IMG_TYPE_FCOE_FW_BACKUP 11 116#define IMG_TYPE_FCOE_FW_BACKUP 11
117#define IMG_TYPE_NCSI_BITFILE 13 117#define IMG_TYPE_NCSI_FW 13
118#define IMG_TYPE_NCSI_8051 14
119 118
120#define FLASHROM_OPER_FLASH 1 119#define FLASHROM_OPER_FLASH 1
121#define FLASHROM_OPER_SAVE 2 120#define FLASHROM_OPER_SAVE 2
@@ -127,6 +126,7 @@
127#define FLASH_IMAGE_MAX_SIZE_g3 (2097152) /* Max fw image size */ 126#define FLASH_IMAGE_MAX_SIZE_g3 (2097152) /* Max fw image size */
128#define FLASH_BIOS_IMAGE_MAX_SIZE_g3 (524288) /* Max OPTION ROM img sz */ 127#define FLASH_BIOS_IMAGE_MAX_SIZE_g3 (524288) /* Max OPTION ROM img sz */
129#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 (1048576) /* Max Redboot image sz */ 128#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 (1048576) /* Max Redboot image sz */
129#define FLASH_NCSI_IMAGE_MAX_SIZE_g3 (262144) /* Max NSCI image sz */
130 130
131#define FLASH_NCSI_MAGIC (0x16032009) 131#define FLASH_NCSI_MAGIC (0x16032009)
132#define FLASH_NCSI_DISABLED (0) 132#define FLASH_NCSI_DISABLED (0)
@@ -144,6 +144,7 @@
144#define FLASH_FCoE_BIOS_START_g2 (524288) 144#define FLASH_FCoE_BIOS_START_g2 (524288)
145#define FLASH_REDBOOT_START_g2 (0) 145#define FLASH_REDBOOT_START_g2 (0)
146 146
147#define FLASH_NCSI_START_g3 (15990784)
147#define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 (2097152) 148#define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 (2097152)
148#define FLASH_iSCSI_BACKUP_IMAGE_START_g3 (4194304) 149#define FLASH_iSCSI_BACKUP_IMAGE_START_g3 (4194304)
149#define FLASH_FCoE_PRIMARY_IMAGE_START_g3 (6291456) 150#define FLASH_FCoE_PRIMARY_IMAGE_START_g3 (6291456)
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index a703ed8e24fe..43e8032f9236 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -1382,7 +1382,7 @@ rx_eq_free:
1382/* There are 8 evt ids per func. Retruns the evt id's bit number */ 1382/* There are 8 evt ids per func. Retruns the evt id's bit number */
1383static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id) 1383static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1384{ 1384{
1385 return eq_id - 8 * be_pci_func(adapter); 1385 return eq_id % 8;
1386} 1386}
1387 1387
1388static irqreturn_t be_intx(int irq, void *dev) 1388static irqreturn_t be_intx(int irq, void *dev)
@@ -1880,8 +1880,9 @@ static int be_flash_data(struct be_adapter *adapter,
1880 const u8 *p = fw->data; 1880 const u8 *p = fw->data;
1881 struct be_cmd_write_flashrom *req = flash_cmd->va; 1881 struct be_cmd_write_flashrom *req = flash_cmd->va;
1882 struct flash_comp *pflashcomp; 1882 struct flash_comp *pflashcomp;
1883 int num_comp;
1883 1884
1884 struct flash_comp gen3_flash_types[8] = { 1885 struct flash_comp gen3_flash_types[9] = {
1885 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE, 1886 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
1886 FLASH_IMAGE_MAX_SIZE_g3}, 1887 FLASH_IMAGE_MAX_SIZE_g3},
1887 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT, 1888 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
@@ -1897,7 +1898,9 @@ static int be_flash_data(struct be_adapter *adapter,
1897 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE, 1898 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
1898 FLASH_IMAGE_MAX_SIZE_g3}, 1899 FLASH_IMAGE_MAX_SIZE_g3},
1899 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP, 1900 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
1900 FLASH_IMAGE_MAX_SIZE_g3} 1901 FLASH_IMAGE_MAX_SIZE_g3},
1902 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
1903 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
1901 }; 1904 };
1902 struct flash_comp gen2_flash_types[8] = { 1905 struct flash_comp gen2_flash_types[8] = {
1903 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE, 1906 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
@@ -1921,11 +1924,16 @@ static int be_flash_data(struct be_adapter *adapter,
1921 if (adapter->generation == BE_GEN3) { 1924 if (adapter->generation == BE_GEN3) {
1922 pflashcomp = gen3_flash_types; 1925 pflashcomp = gen3_flash_types;
1923 filehdr_size = sizeof(struct flash_file_hdr_g3); 1926 filehdr_size = sizeof(struct flash_file_hdr_g3);
1927 num_comp = 9;
1924 } else { 1928 } else {
1925 pflashcomp = gen2_flash_types; 1929 pflashcomp = gen2_flash_types;
1926 filehdr_size = sizeof(struct flash_file_hdr_g2); 1930 filehdr_size = sizeof(struct flash_file_hdr_g2);
1931 num_comp = 8;
1927 } 1932 }
1928 for (i = 0; i < 8; i++) { 1933 for (i = 0; i < num_comp; i++) {
1934 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
1935 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
1936 continue;
1929 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) && 1937 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
1930 (!be_flash_redboot(adapter, fw->data, 1938 (!be_flash_redboot(adapter, fw->data,
1931 pflashcomp[i].offset, pflashcomp[i].size, 1939 pflashcomp[i].offset, pflashcomp[i].size,
@@ -1985,16 +1993,7 @@ int be_load_fw(struct be_adapter *adapter, u8 *func)
1985 struct be_dma_mem flash_cmd; 1993 struct be_dma_mem flash_cmd;
1986 int status, i = 0; 1994 int status, i = 0;
1987 const u8 *p; 1995 const u8 *p;
1988 char fw_ver[FW_VER_LEN];
1989 char fw_cfg;
1990
1991 status = be_cmd_get_fw_ver(adapter, fw_ver);
1992 if (status)
1993 return status;
1994 1996
1995 fw_cfg = *(fw_ver + 2);
1996 if (fw_cfg == '0')
1997 fw_cfg = '1';
1998 strcpy(fw_file, func); 1997 strcpy(fw_file, func);
1999 1998
2000 status = request_firmware(&fw, fw_file, &adapter->pdev->dev); 1999 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 5acd557cea9b..b8bec086daa1 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -51,7 +51,9 @@
51 * "show" function for the bond_masters attribute. 51 * "show" function for the bond_masters attribute.
52 * The class parameter is ignored. 52 * The class parameter is ignored.
53 */ 53 */
54static ssize_t bonding_show_bonds(struct class *cls, char *buf) 54static ssize_t bonding_show_bonds(struct class *cls,
55 struct class_attribute *attr,
56 char *buf)
55{ 57{
56 struct net *net = current->nsproxy->net_ns; 58 struct net *net = current->nsproxy->net_ns;
57 struct bond_net *bn = net_generic(net, bond_net_id); 59 struct bond_net *bn = net_generic(net, bond_net_id);
@@ -98,6 +100,7 @@ static struct net_device *bond_get_by_name(struct net *net, const char *ifname)
98 */ 100 */
99 101
100static ssize_t bonding_store_bonds(struct class *cls, 102static ssize_t bonding_store_bonds(struct class *cls,
103 struct class_attribute *attr,
101 const char *buffer, size_t count) 104 const char *buffer, size_t count)
102{ 105{
103 struct net *net = current->nsproxy->net_ns; 106 struct net *net = current->nsproxy->net_ns;
diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c
index bf7f9ba2d903..866905fa4119 100644
--- a/drivers/net/can/bfin_can.c
+++ b/drivers/net/can/bfin_can.c
@@ -26,6 +26,7 @@
26 26
27#define DRV_NAME "bfin_can" 27#define DRV_NAME "bfin_can"
28#define BFIN_CAN_TIMEOUT 100 28#define BFIN_CAN_TIMEOUT 100
29#define TX_ECHO_SKB_MAX 1
29 30
30/* 31/*
31 * transmit and receive channels 32 * transmit and receive channels
@@ -593,7 +594,7 @@ struct net_device *alloc_bfin_candev(void)
593 struct net_device *dev; 594 struct net_device *dev;
594 struct bfin_can_priv *priv; 595 struct bfin_can_priv *priv;
595 596
596 dev = alloc_candev(sizeof(*priv)); 597 dev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
597 if (!dev) 598 if (!dev)
598 return NULL; 599 return NULL;
599 600
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 11c87840cc00..33451092b8e8 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -876,9 +876,7 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne
876 return NETDEV_TX_OK; 876 return NETDEV_TX_OK;
877 877
878nomem: 878nomem:
879 if (skb) 879 dev_kfree_skb(skb);
880 dev_kfree_skb(skb);
881
882 stats->tx_dropped++; 880 stats->tx_dropped++;
883 881
884 return NETDEV_TX_OK; 882 return NETDEV_TX_OK;
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 7cbcfb0ade1c..9bd155e4111c 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -5072,7 +5072,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
5072 INIT_WORK(&cp->reset_task, cas_reset_task); 5072 INIT_WORK(&cp->reset_task, cas_reset_task);
5073 5073
5074 /* Default link parameters */ 5074 /* Default link parameters */
5075 if (link_mode >= 0 && link_mode <= 6) 5075 if (link_mode >= 0 && link_mode < 6)
5076 cp->link_cntl = link_modes[link_mode]; 5076 cp->link_cntl = link_modes[link_mode];
5077 else 5077 else
5078 cp->link_cntl = BMCR_ANENABLE; 5078 cp->link_cntl = BMCR_ANENABLE;
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c
index 71384114a4ed..55d99ca82f8a 100644
--- a/drivers/net/chelsio/sge.c
+++ b/drivers/net/chelsio/sge.c
@@ -248,7 +248,7 @@ static void restart_sched(unsigned long);
248 * 248 *
249 * Interrupts are handled by a single CPU and it is likely that on a MP system 249 * Interrupts are handled by a single CPU and it is likely that on a MP system
250 * the application is migrated to another CPU. In that scenario, we try to 250 * the application is migrated to another CPU. In that scenario, we try to
251 * seperate the RX(in irq context) and TX state in order to decrease memory 251 * separate the RX(in irq context) and TX state in order to decrease memory
252 * contention. 252 * contention.
253 */ 253 */
254struct sge { 254struct sge {
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index b85c81f60d10..60777fd90b33 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -28,6 +28,7 @@
28#include <linux/delay.h> 28#include <linux/delay.h>
29 29
30#include <linux/netdevice.h> 30#include <linux/netdevice.h>
31#include <linux/if_vlan.h>
31#include <linux/etherdevice.h> 32#include <linux/etherdevice.h>
32#include <linux/ethtool.h> 33#include <linux/ethtool.h>
33#include <linux/skbuff.h> 34#include <linux/skbuff.h>
@@ -55,9 +56,9 @@ module_param(dumb_switch, int, 0444);
55MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable"); 56MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable");
56MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus"); 57MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus");
57 58
58#define CPMAC_VERSION "0.5.1" 59#define CPMAC_VERSION "0.5.2"
59/* frame size + 802.1q tag */ 60/* frame size + 802.1q tag + FCS size */
60#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + 4) 61#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
61#define CPMAC_QUEUES 8 62#define CPMAC_QUEUES 8
62 63
63/* Ethernet registers */ 64/* Ethernet registers */
@@ -1136,8 +1137,9 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
1136 } 1137 }
1137 1138
1138 if (phy_id == PHY_MAX_ADDR) { 1139 if (phy_id == PHY_MAX_ADDR) {
1139 dev_err(&pdev->dev, "no PHY present\n"); 1140 dev_err(&pdev->dev, "no PHY present, falling back to switch on MDIO bus 0\n");
1140 return -ENODEV; 1141 strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
1142 phy_id = pdev->id;
1141 } 1143 }
1142 1144
1143 dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES); 1145 dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
@@ -1290,8 +1292,8 @@ void __devexit cpmac_exit(void)
1290{ 1292{
1291 platform_driver_unregister(&cpmac_driver); 1293 platform_driver_unregister(&cpmac_driver);
1292 mdiobus_unregister(cpmac_mii); 1294 mdiobus_unregister(cpmac_mii);
1293 mdiobus_free(cpmac_mii);
1294 iounmap(cpmac_mii->priv); 1295 iounmap(cpmac_mii->priv);
1296 mdiobus_free(cpmac_mii);
1295} 1297}
1296 1298
1297module_init(cpmac_init); 1299module_init(cpmac_init);
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index 14624019ce71..b0208e474f7e 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -580,7 +580,7 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
580 } 580 }
581 581
582#ifdef CONFIG_SH_HICOSH4 582#ifdef CONFIG_SH_HICOSH4
583 /* truely reset the chip */ 583 /* truly reset the chip */
584 writeword(ioaddr, ADD_PORT, 0x0114); 584 writeword(ioaddr, ADD_PORT, 0x0114);
585 writeword(ioaddr, DATA_PORT, 0x0040); 585 writeword(ioaddr, DATA_PORT, 0x0040);
586#endif 586#endif
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 3e453e1d97e7..9e3e8750b46a 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -1294,6 +1294,7 @@ static void cxgb_down(struct adapter *adapter)
1294 1294
1295 free_irq_resources(adapter); 1295 free_irq_resources(adapter);
1296 quiesce_rx(adapter); 1296 quiesce_rx(adapter);
1297 t3_sge_stop(adapter);
1297 flush_workqueue(cxgb3_wq); /* wait for external IRQ handler */ 1298 flush_workqueue(cxgb3_wq); /* wait for external IRQ handler */
1298} 1299}
1299 1300
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index 78e265b484b6..67e61b2a8c42 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -197,13 +197,13 @@ static inline void refill_rspq(struct adapter *adapter,
197/** 197/**
198 * need_skb_unmap - does the platform need unmapping of sk_buffs? 198 * need_skb_unmap - does the platform need unmapping of sk_buffs?
199 * 199 *
200 * Returns true if the platfrom needs sk_buff unmapping. The compiler 200 * Returns true if the platform needs sk_buff unmapping. The compiler
201 * optimizes away unecessary code if this returns true. 201 * optimizes away unecessary code if this returns true.
202 */ 202 */
203static inline int need_skb_unmap(void) 203static inline int need_skb_unmap(void)
204{ 204{
205 /* 205 /*
206 * This structure is used to tell if the platfrom needs buffer 206 * This structure is used to tell if the platform needs buffer
207 * unmapping by checking if DECLARE_PCI_UNMAP_ADDR defines anything. 207 * unmapping by checking if DECLARE_PCI_UNMAP_ADDR defines anything.
208 */ 208 */
209 struct dummy { 209 struct dummy {
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 1ac9440eb3fb..8bd086aee56d 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2385,7 +2385,7 @@ static int emac_dev_open(struct net_device *ndev)
2385 struct emac_priv *priv = netdev_priv(ndev); 2385 struct emac_priv *priv = netdev_priv(ndev);
2386 2386
2387 netif_carrier_off(ndev); 2387 netif_carrier_off(ndev);
2388 for (cnt = 0; cnt <= ETH_ALEN; cnt++) 2388 for (cnt = 0; cnt < ETH_ALEN; cnt++)
2389 ndev->dev_addr[cnt] = priv->mac_addr[cnt]; 2389 ndev->dev_addr[cnt] = priv->mac_addr[cnt];
2390 2390
2391 /* Configuration items */ 2391 /* Configuration items */
@@ -2658,7 +2658,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
2658 2658
2659 pdata = pdev->dev.platform_data; 2659 pdata = pdev->dev.platform_data;
2660 if (!pdata) { 2660 if (!pdata) {
2661 printk(KERN_ERR "DaVinci EMAC: No platfrom data\n"); 2661 printk(KERN_ERR "DaVinci EMAC: No platform data\n");
2662 return -ENODEV; 2662 return -ENODEV;
2663 } 2663 }
2664 2664
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 3c95acb3a87d..712ccc66ba25 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -1346,7 +1346,7 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
1346 * 1346 *
1347 * 1) down 1347 * 1) down
1348 * 2) autoneg_progress 1348 * 2) autoneg_progress
1349 * 3) autoneg_complete (the link sucessfully autonegotiated) 1349 * 3) autoneg_complete (the link successfully autonegotiated)
1350 * 4) forced_up (the link has been forced up, it did not autonegotiate) 1350 * 4) forced_up (the link has been forced up, it did not autonegotiate)
1351 * 1351 *
1352 **/ 1352 **/
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index db05ec355749..e301e26d6897 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -320,6 +320,8 @@
320#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ 320#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */
321 321
322/* Header split receive */ 322/* Header split receive */
323#define E1000_RFCTL_NFSW_DIS 0x00000040
324#define E1000_RFCTL_NFSR_DIS 0x00000080
323#define E1000_RFCTL_ACK_DIS 0x00001000 325#define E1000_RFCTL_ACK_DIS 0x00001000
324#define E1000_RFCTL_EXTEN 0x00008000 326#define E1000_RFCTL_EXTEN 0x00008000
325#define E1000_RFCTL_IPV6_EX_DIS 0x00010000 327#define E1000_RFCTL_IPV6_EX_DIS 0x00010000
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 54d03a0ce3ce..8b5e157e9c87 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -2740,6 +2740,16 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)
2740 reg &= ~(1 << 31); 2740 reg &= ~(1 << 31);
2741 ew32(STATUS, reg); 2741 ew32(STATUS, reg);
2742 } 2742 }
2743
2744 /*
2745 * work-around descriptor data corruption issue during nfs v2 udp
2746 * traffic, just disable the nfs filtering capability
2747 */
2748 reg = er32(RFCTL);
2749 reg |= (E1000_RFCTL_NFSW_DIS | E1000_RFCTL_NFSR_DIS);
2750 ew32(RFCTL, reg);
2751
2752 return;
2743} 2753}
2744 2754
2745/** 2755/**
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index 2425ed11d5cc..a8b2c0de27c4 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -647,7 +647,7 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
647 if (!(rxcw & E1000_RXCW_IV)) { 647 if (!(rxcw & E1000_RXCW_IV)) {
648 mac->serdes_has_link = true; 648 mac->serdes_has_link = true;
649 e_dbg("SERDES: Link up - autoneg " 649 e_dbg("SERDES: Link up - autoneg "
650 "completed sucessfully.\n"); 650 "completed successfully.\n");
651 } else { 651 } else {
652 mac->serdes_has_link = false; 652 mac->serdes_has_link = false;
653 e_dbg("SERDES: Link down - invalid" 653 e_dbg("SERDES: Link down - invalid"
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 61a7b4351e78..b6715553cf17 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -2021,7 +2021,6 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
2021 } 2021 }
2022 2022
2023 /* setup the TxBD length and buffer pointer for the first BD */ 2023 /* setup the TxBD length and buffer pointer for the first BD */
2024 tx_queue->tx_skbuff[tx_queue->skb_curtx] = skb;
2025 txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data, 2024 txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
2026 skb_headlen(skb), DMA_TO_DEVICE); 2025 skb_headlen(skb), DMA_TO_DEVICE);
2027 2026
@@ -2053,6 +2052,10 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
2053 2052
2054 txbdp_start->lstatus = lstatus; 2053 txbdp_start->lstatus = lstatus;
2055 2054
2055 eieio(); /* force lstatus write before tx_skbuff */
2056
2057 tx_queue->tx_skbuff[tx_queue->skb_curtx] = skb;
2058
2056 /* Update the current skb pointer to the next entry we will use 2059 /* Update the current skb pointer to the next entry we will use
2057 * (wrapping if necessary) */ 2060 * (wrapping if necessary) */
2058 tx_queue->skb_curtx = (tx_queue->skb_curtx + 1) & 2061 tx_queue->skb_curtx = (tx_queue->skb_curtx + 1) &
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c
index f2b937966950..0bc777bac9b4 100644
--- a/drivers/net/ibmveth.c
+++ b/drivers/net/ibmveth.c
@@ -1577,7 +1577,7 @@ static struct attribute * veth_pool_attrs[] = {
1577 NULL, 1577 NULL,
1578}; 1578};
1579 1579
1580static struct sysfs_ops veth_pool_ops = { 1580static const struct sysfs_ops veth_pool_ops = {
1581 .show = veth_pool_show, 1581 .show = veth_pool_show,
1582 .store = veth_pool_store, 1582 .store = veth_pool_store,
1583}; 1583};
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 583a21c1def3..0ed25f059a00 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -688,7 +688,7 @@ static void igb_set_interrupt_capability(struct igb_adapter *adapter)
688 /* start with one vector for every rx queue */ 688 /* start with one vector for every rx queue */
689 numvecs = adapter->num_rx_queues; 689 numvecs = adapter->num_rx_queues;
690 690
691 /* if tx handler is seperate add 1 for every tx queue */ 691 /* if tx handler is separate add 1 for every tx queue */
692 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) 692 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
693 numvecs += adapter->num_tx_queues; 693 numvecs += adapter->num_tx_queues;
694 694
diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c
index e8e33bb9d876..2c9b3af16612 100644
--- a/drivers/net/irda/irda-usb.c
+++ b/drivers/net/irda/irda-usb.c
@@ -1651,6 +1651,8 @@ static int irda_usb_probe(struct usb_interface *intf,
1651 1651
1652 self->rx_urb = kcalloc(self->max_rx_urb, sizeof(struct urb *), 1652 self->rx_urb = kcalloc(self->max_rx_urb, sizeof(struct urb *),
1653 GFP_KERNEL); 1653 GFP_KERNEL);
1654 if (!self->rx_urb)
1655 goto err_free_net;
1654 1656
1655 for (i = 0; i < self->max_rx_urb; i++) { 1657 for (i = 0; i < self->max_rx_urb; i++) {
1656 self->rx_urb[i] = usb_alloc_urb(0, GFP_KERNEL); 1658 self->rx_urb[i] = usb_alloc_urb(0, GFP_KERNEL);
@@ -1783,6 +1785,8 @@ err_out_2:
1783err_out_1: 1785err_out_1:
1784 for (i = 0; i < self->max_rx_urb; i++) 1786 for (i = 0; i < self->max_rx_urb; i++)
1785 usb_free_urb(self->rx_urb[i]); 1787 usb_free_urb(self->rx_urb[i]);
1788 kfree(self->rx_urb);
1789err_free_net:
1786 free_netdev(net); 1790 free_netdev(net);
1787err_out: 1791err_out:
1788 return ret; 1792 return ret;
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index c412e8026173..1dcdce0631aa 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -331,7 +331,7 @@ static int sa1100_irda_resume(struct platform_device *pdev)
331 * If we missed a speed change, initialise at the new speed 331 * If we missed a speed change, initialise at the new speed
332 * directly. It is debatable whether this is actually 332 * directly. It is debatable whether this is actually
333 * required, but in the interests of continuing from where 333 * required, but in the interests of continuing from where
334 * we left off it is desireable. The converse argument is 334 * we left off it is desirable. The converse argument is
335 * that we should re-negotiate at 9600 baud again. 335 * that we should re-negotiate at 9600 baud again.
336 */ 336 */
337 if (si->newspeed) { 337 if (si->newspeed) {
diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c
index 966de5d69521..e6e972d9b7ca 100644
--- a/drivers/net/iseries_veth.c
+++ b/drivers/net/iseries_veth.c
@@ -384,7 +384,7 @@ static struct attribute *veth_cnx_default_attrs[] = {
384 NULL 384 NULL
385}; 385};
386 386
387static struct sysfs_ops veth_cnx_sysfs_ops = { 387static const struct sysfs_ops veth_cnx_sysfs_ops = {
388 .show = veth_cnx_attribute_show 388 .show = veth_cnx_attribute_show
389}; 389};
390 390
@@ -441,7 +441,7 @@ static struct attribute *veth_port_default_attrs[] = {
441 NULL 441 NULL
442}; 442};
443 443
444static struct sysfs_ops veth_port_sysfs_ops = { 444static const struct sysfs_ops veth_port_sysfs_ops = {
445 .show = veth_port_attribute_show 445 .show = veth_port_attribute_show
446}; 446};
447 447
diff --git a/drivers/net/ks8851.c b/drivers/net/ks8851.c
index b5219cce12ed..0573e0bb4444 100644
--- a/drivers/net/ks8851.c
+++ b/drivers/net/ks8851.c
@@ -407,7 +407,7 @@ static irqreturn_t ks8851_irq(int irq, void *pw)
407 * @buff: The buffer address 407 * @buff: The buffer address
408 * @len: The length of the data to read 408 * @len: The length of the data to read
409 * 409 *
410 * Issue an RXQ FIFO read command and read the @len ammount of data from 410 * Issue an RXQ FIFO read command and read the @len amount of data from
411 * the FIFO into the buffer specified by @buff. 411 * the FIFO into the buffer specified by @buff.
412 */ 412 */
413static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len) 413static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
diff --git a/drivers/net/qlcnic/qlcnic.h b/drivers/net/qlcnic/qlcnic.h
index b40a851ec7d1..0da94b208db1 100644
--- a/drivers/net/qlcnic/qlcnic.h
+++ b/drivers/net/qlcnic/qlcnic.h
@@ -423,6 +423,11 @@ struct qlcnic_adapter_stats {
423 u64 lro_pkts; 423 u64 lro_pkts;
424 u64 rxbytes; 424 u64 rxbytes;
425 u64 txbytes; 425 u64 txbytes;
426 u64 lrobytes;
427 u64 lso_frames;
428 u64 xmit_on;
429 u64 xmit_off;
430 u64 skb_alloc_failure;
426}; 431};
427 432
428/* 433/*
@@ -1095,11 +1100,11 @@ struct qlcnic_brdinfo {
1095 1100
1096static const struct qlcnic_brdinfo qlcnic_boards[] = { 1101static const struct qlcnic_brdinfo qlcnic_boards[] = {
1097 {0x1077, 0x8020, 0x1077, 0x203, 1102 {0x1077, 0x8020, 0x1077, 0x203,
1098 "8200 Series Single Port 10GbE Converged Network Adapter \ 1103 "8200 Series Single Port 10GbE Converged Network Adapter "
1099 (TCP/IP Networking)"}, 1104 "(TCP/IP Networking)"},
1100 {0x1077, 0x8020, 0x1077, 0x207, 1105 {0x1077, 0x8020, 0x1077, 0x207,
1101 "8200 Series Dual Port 10GbE Converged Network Adapter \ 1106 "8200 Series Dual Port 10GbE Converged Network Adapter "
1102 (TCP/IP Networking)"}, 1107 "(TCP/IP Networking)"},
1103 {0x1077, 0x8020, 0x1077, 0x20b, 1108 {0x1077, 0x8020, 0x1077, 0x20b,
1104 "3200 Series Dual Port 10Gb Intelligent Ethernet Adapter"}, 1109 "3200 Series Dual Port 10Gb Intelligent Ethernet Adapter"},
1105 {0x1077, 0x8020, 0x1077, 0x20c, 1110 {0x1077, 0x8020, 0x1077, 0x20c,
diff --git a/drivers/net/qlcnic/qlcnic_ethtool.c b/drivers/net/qlcnic/qlcnic_ethtool.c
index 8da6ec8c13b9..f83e15fe3e1b 100644
--- a/drivers/net/qlcnic/qlcnic_ethtool.c
+++ b/drivers/net/qlcnic/qlcnic_ethtool.c
@@ -59,6 +59,17 @@ static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
59 QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)}, 59 QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
60 {"tx_bytes", 60 {"tx_bytes",
61 QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)}, 61 QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
62 {"lrobytes",
63 QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
64 {"lso_frames",
65 QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
66 {"xmit_on",
67 QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
68 {"xmit_off",
69 QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
70 {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
71 QLC_OFF(stats.skb_alloc_failure)},
72
62}; 73};
63 74
64#define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats) 75#define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
@@ -785,6 +796,11 @@ qlcnic_get_ethtool_stats(struct net_device *dev,
785 } 796 }
786} 797}
787 798
799static u32 qlcnic_get_tx_csum(struct net_device *dev)
800{
801 return dev->features & NETIF_F_IP_CSUM;
802}
803
788static u32 qlcnic_get_rx_csum(struct net_device *dev) 804static u32 qlcnic_get_rx_csum(struct net_device *dev)
789{ 805{
790 struct qlcnic_adapter *adapter = netdev_priv(dev); 806 struct qlcnic_adapter *adapter = netdev_priv(dev);
@@ -995,6 +1011,7 @@ const struct ethtool_ops qlcnic_ethtool_ops = {
995 .set_ringparam = qlcnic_set_ringparam, 1011 .set_ringparam = qlcnic_set_ringparam,
996 .get_pauseparam = qlcnic_get_pauseparam, 1012 .get_pauseparam = qlcnic_get_pauseparam,
997 .set_pauseparam = qlcnic_set_pauseparam, 1013 .set_pauseparam = qlcnic_set_pauseparam,
1014 .get_tx_csum = qlcnic_get_tx_csum,
998 .set_tx_csum = ethtool_op_set_tx_csum, 1015 .set_tx_csum = ethtool_op_set_tx_csum,
999 .set_sg = ethtool_op_set_sg, 1016 .set_sg = ethtool_op_set_sg,
1000 .get_tso = qlcnic_get_tso, 1017 .get_tso = qlcnic_get_tso,
diff --git a/drivers/net/qlcnic/qlcnic_hw.c b/drivers/net/qlcnic/qlcnic_hw.c
index 99a4d1379d00..da00e162b6d3 100644
--- a/drivers/net/qlcnic/qlcnic_hw.c
+++ b/drivers/net/qlcnic/qlcnic_hw.c
@@ -349,6 +349,7 @@ qlcnic_send_cmd_descs(struct qlcnic_adapter *adapter,
349 if (nr_desc >= qlcnic_tx_avail(tx_ring)) { 349 if (nr_desc >= qlcnic_tx_avail(tx_ring)) {
350 netif_tx_stop_queue(tx_ring->txq); 350 netif_tx_stop_queue(tx_ring->txq);
351 __netif_tx_unlock_bh(tx_ring->txq); 351 __netif_tx_unlock_bh(tx_ring->txq);
352 adapter->stats.xmit_off++;
352 return -EBUSY; 353 return -EBUSY;
353 } 354 }
354 355
@@ -397,20 +398,16 @@ qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter, u8 *addr,
397 return qlcnic_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1); 398 return qlcnic_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
398} 399}
399 400
400static int qlcnic_nic_add_mac(struct qlcnic_adapter *adapter, 401static int qlcnic_nic_add_mac(struct qlcnic_adapter *adapter, u8 *addr)
401 u8 *addr, struct list_head *del_list)
402{ 402{
403 struct list_head *head; 403 struct list_head *head;
404 struct qlcnic_mac_list_s *cur; 404 struct qlcnic_mac_list_s *cur;
405 405
406 /* look up if already exists */ 406 /* look up if already exists */
407 list_for_each(head, del_list) { 407 list_for_each(head, &adapter->mac_list) {
408 cur = list_entry(head, struct qlcnic_mac_list_s, list); 408 cur = list_entry(head, struct qlcnic_mac_list_s, list);
409 409 if (memcmp(addr, cur->mac_addr, ETH_ALEN) == 0)
410 if (memcmp(addr, cur->mac_addr, ETH_ALEN) == 0) {
411 list_move_tail(head, &adapter->mac_list);
412 return 0; 410 return 0;
413 }
414 } 411 }
415 412
416 cur = kzalloc(sizeof(struct qlcnic_mac_list_s), GFP_ATOMIC); 413 cur = kzalloc(sizeof(struct qlcnic_mac_list_s), GFP_ATOMIC);
@@ -432,14 +429,9 @@ void qlcnic_set_multi(struct net_device *netdev)
432 struct dev_mc_list *mc_ptr; 429 struct dev_mc_list *mc_ptr;
433 u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 430 u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
434 u32 mode = VPORT_MISS_MODE_DROP; 431 u32 mode = VPORT_MISS_MODE_DROP;
435 LIST_HEAD(del_list);
436 struct list_head *head;
437 struct qlcnic_mac_list_s *cur;
438 432
439 list_splice_tail_init(&adapter->mac_list, &del_list); 433 qlcnic_nic_add_mac(adapter, adapter->mac_addr);
440 434 qlcnic_nic_add_mac(adapter, bcast_addr);
441 qlcnic_nic_add_mac(adapter, adapter->mac_addr, &del_list);
442 qlcnic_nic_add_mac(adapter, bcast_addr, &del_list);
443 435
444 if (netdev->flags & IFF_PROMISC) { 436 if (netdev->flags & IFF_PROMISC) {
445 mode = VPORT_MISS_MODE_ACCEPT_ALL; 437 mode = VPORT_MISS_MODE_ACCEPT_ALL;
@@ -454,22 +446,12 @@ void qlcnic_set_multi(struct net_device *netdev)
454 446
455 if (!netdev_mc_empty(netdev)) { 447 if (!netdev_mc_empty(netdev)) {
456 netdev_for_each_mc_addr(mc_ptr, netdev) { 448 netdev_for_each_mc_addr(mc_ptr, netdev) {
457 qlcnic_nic_add_mac(adapter, mc_ptr->dmi_addr, 449 qlcnic_nic_add_mac(adapter, mc_ptr->dmi_addr);
458 &del_list);
459 } 450 }
460 } 451 }
461 452
462send_fw_cmd: 453send_fw_cmd:
463 qlcnic_nic_set_promisc(adapter, mode); 454 qlcnic_nic_set_promisc(adapter, mode);
464 head = &del_list;
465 while (!list_empty(head)) {
466 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
467
468 qlcnic_sre_macaddr_change(adapter,
469 cur->mac_addr, QLCNIC_MAC_DEL);
470 list_del(&cur->list);
471 kfree(cur);
472 }
473} 455}
474 456
475int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter, u32 mode) 457int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter, u32 mode)
diff --git a/drivers/net/qlcnic/qlcnic_init.c b/drivers/net/qlcnic/qlcnic_init.c
index ea00ab4d4feb..7c34e4e29b3f 100644
--- a/drivers/net/qlcnic/qlcnic_init.c
+++ b/drivers/net/qlcnic/qlcnic_init.c
@@ -568,21 +568,123 @@ struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
568 return NULL; 568 return NULL;
569} 569}
570 570
571#define FILEHEADER_SIZE (14 * 4)
572
571static int 573static int
572qlcnic_set_product_offs(struct qlcnic_adapter *adapter) 574qlcnic_validate_header(struct qlcnic_adapter *adapter)
573{ 575{
574 struct uni_table_desc *ptab_descr;
575 const u8 *unirom = adapter->fw->data; 576 const u8 *unirom = adapter->fw->data;
576 u32 i; 577 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
578 __le32 fw_file_size = adapter->fw->size;
577 __le32 entries; 579 __le32 entries;
580 __le32 entry_size;
581 __le32 tab_size;
582
583 if (fw_file_size < FILEHEADER_SIZE)
584 return -EINVAL;
585
586 entries = cpu_to_le32(directory->num_entries);
587 entry_size = cpu_to_le32(directory->entry_size);
588 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
589
590 if (fw_file_size < tab_size)
591 return -EINVAL;
592
593 return 0;
594}
595
596static int
597qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
598{
599 struct uni_table_desc *tab_desc;
600 struct uni_data_desc *descr;
601 const u8 *unirom = adapter->fw->data;
602 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
603 QLCNIC_UNI_BOOTLD_IDX_OFF));
604 __le32 offs;
605 __le32 tab_size;
606 __le32 data_size;
607
608 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
609
610 if (!tab_desc)
611 return -EINVAL;
612
613 tab_size = cpu_to_le32(tab_desc->findex) +
614 (cpu_to_le32(tab_desc->entry_size * (idx + 1)));
615
616 if (adapter->fw->size < tab_size)
617 return -EINVAL;
618
619 offs = cpu_to_le32(tab_desc->findex) +
620 (cpu_to_le32(tab_desc->entry_size) * (idx));
621 descr = (struct uni_data_desc *)&unirom[offs];
622
623 data_size = descr->findex + cpu_to_le32(descr->size);
624
625 if (adapter->fw->size < data_size)
626 return -EINVAL;
627
628 return 0;
629}
630
631static int
632qlcnic_validate_fw(struct qlcnic_adapter *adapter)
633{
634 struct uni_table_desc *tab_desc;
635 struct uni_data_desc *descr;
636 const u8 *unirom = adapter->fw->data;
637 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
638 QLCNIC_UNI_FIRMWARE_IDX_OFF));
639 __le32 offs;
640 __le32 tab_size;
641 __le32 data_size;
642
643 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
644
645 if (!tab_desc)
646 return -EINVAL;
647
648 tab_size = cpu_to_le32(tab_desc->findex) +
649 (cpu_to_le32(tab_desc->entry_size * (idx + 1)));
650
651 if (adapter->fw->size < tab_size)
652 return -EINVAL;
653
654 offs = cpu_to_le32(tab_desc->findex) +
655 (cpu_to_le32(tab_desc->entry_size) * (idx));
656 descr = (struct uni_data_desc *)&unirom[offs];
657 data_size = descr->findex + cpu_to_le32(descr->size);
658
659 if (adapter->fw->size < data_size)
660 return -EINVAL;
661
662 return 0;
663}
664
665static int
666qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
667{
668 struct uni_table_desc *ptab_descr;
669 const u8 *unirom = adapter->fw->data;
578 int mn_present = qlcnic_has_mn(adapter); 670 int mn_present = qlcnic_has_mn(adapter);
671 __le32 entries;
672 __le32 entry_size;
673 __le32 tab_size;
674 u32 i;
579 675
580 ptab_descr = qlcnic_get_table_desc(unirom, 676 ptab_descr = qlcnic_get_table_desc(unirom,
581 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL); 677 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
582 if (ptab_descr == NULL) 678 if (!ptab_descr)
583 return -1; 679 return -EINVAL;
584 680
585 entries = cpu_to_le32(ptab_descr->num_entries); 681 entries = cpu_to_le32(ptab_descr->num_entries);
682 entry_size = cpu_to_le32(ptab_descr->entry_size);
683 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
684
685 if (adapter->fw->size < tab_size)
686 return -EINVAL;
687
586nomn: 688nomn:
587 for (i = 0; i < entries; i++) { 689 for (i = 0; i < entries; i++) {
588 690
@@ -609,7 +711,37 @@ nomn:
609 mn_present = 0; 711 mn_present = 0;
610 goto nomn; 712 goto nomn;
611 } 713 }
612 return -1; 714 return -EINVAL;
715}
716
717static int
718qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
719{
720 if (qlcnic_validate_header(adapter)) {
721 dev_err(&adapter->pdev->dev,
722 "unified image: header validation failed\n");
723 return -EINVAL;
724 }
725
726 if (qlcnic_validate_product_offs(adapter)) {
727 dev_err(&adapter->pdev->dev,
728 "unified image: product validation failed\n");
729 return -EINVAL;
730 }
731
732 if (qlcnic_validate_bootld(adapter)) {
733 dev_err(&adapter->pdev->dev,
734 "unified image: bootld validation failed\n");
735 return -EINVAL;
736 }
737
738 if (qlcnic_validate_fw(adapter)) {
739 dev_err(&adapter->pdev->dev,
740 "unified image: firmware validation failed\n");
741 return -EINVAL;
742 }
743
744 return 0;
613} 745}
614 746
615static 747static
@@ -715,7 +847,7 @@ qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
715 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 847 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
716 + QLCNIC_UNI_BIOS_VERSION_OFF)); 848 + QLCNIC_UNI_BIOS_VERSION_OFF));
717 849
718 return (bios_ver << 24) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24); 850 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
719} 851}
720 852
721int 853int
@@ -858,7 +990,7 @@ qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
858 u8 fw_type = adapter->fw_type; 990 u8 fw_type = adapter->fw_type;
859 991
860 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) { 992 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
861 if (qlcnic_set_product_offs(adapter)) 993 if (qlcnic_validate_unified_romimage(adapter))
862 return -EINVAL; 994 return -EINVAL;
863 995
864 min_size = QLCNIC_UNI_FW_MIN_SIZE; 996 min_size = QLCNIC_UNI_FW_MIN_SIZE;
@@ -1114,8 +1246,10 @@ qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
1114 struct pci_dev *pdev = adapter->pdev; 1246 struct pci_dev *pdev = adapter->pdev;
1115 1247
1116 buffer->skb = dev_alloc_skb(rds_ring->skb_size); 1248 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1117 if (!buffer->skb) 1249 if (!buffer->skb) {
1250 adapter->stats.skb_alloc_failure++;
1118 return -ENOMEM; 1251 return -ENOMEM;
1252 }
1119 1253
1120 skb = buffer->skb; 1254 skb = buffer->skb;
1121 1255
@@ -1289,7 +1423,7 @@ qlcnic_process_lro(struct qlcnic_adapter *adapter,
1289 netif_receive_skb(skb); 1423 netif_receive_skb(skb);
1290 1424
1291 adapter->stats.lro_pkts++; 1425 adapter->stats.lro_pkts++;
1292 adapter->stats.rxbytes += length; 1426 adapter->stats.lrobytes += length;
1293 1427
1294 return buffer; 1428 return buffer;
1295} 1429}
@@ -1505,6 +1639,8 @@ qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
1505 adapter->diag_cnt++; 1639 adapter->diag_cnt++;
1506 1640
1507 dev_kfree_skb_any(skb); 1641 dev_kfree_skb_any(skb);
1642 adapter->stats.rx_pkts++;
1643 adapter->stats.rxbytes += length;
1508 1644
1509 return buffer; 1645 return buffer;
1510} 1646}
diff --git a/drivers/net/qlcnic/qlcnic_main.c b/drivers/net/qlcnic/qlcnic_main.c
index 665e8e56b6a8..fc721564e69e 100644
--- a/drivers/net/qlcnic/qlcnic_main.c
+++ b/drivers/net/qlcnic/qlcnic_main.c
@@ -118,6 +118,7 @@ qlcnic_update_cmd_producer(struct qlcnic_adapter *adapter,
118 if (qlcnic_tx_avail(tx_ring) <= TX_STOP_THRESH) { 118 if (qlcnic_tx_avail(tx_ring) <= TX_STOP_THRESH) {
119 netif_stop_queue(adapter->netdev); 119 netif_stop_queue(adapter->netdev);
120 smp_mb(); 120 smp_mb();
121 adapter->stats.xmit_off++;
121 } 122 }
122} 123}
123 124
@@ -1385,6 +1386,7 @@ qlcnic_tso_check(struct net_device *netdev,
1385 int copied, offset, copy_len, hdr_len = 0, tso = 0, vlan_oob = 0; 1386 int copied, offset, copy_len, hdr_len = 0, tso = 0, vlan_oob = 0;
1386 struct cmd_desc_type0 *hwdesc; 1387 struct cmd_desc_type0 *hwdesc;
1387 struct vlan_ethhdr *vh; 1388 struct vlan_ethhdr *vh;
1389 struct qlcnic_adapter *adapter = netdev_priv(netdev);
1388 1390
1389 if (protocol == cpu_to_be16(ETH_P_8021Q)) { 1391 if (protocol == cpu_to_be16(ETH_P_8021Q)) {
1390 1392
@@ -1494,6 +1496,7 @@ qlcnic_tso_check(struct net_device *netdev,
1494 1496
1495 tx_ring->producer = producer; 1497 tx_ring->producer = producer;
1496 barrier(); 1498 barrier();
1499 adapter->stats.lso_frames++;
1497} 1500}
1498 1501
1499static int 1502static int
@@ -1573,6 +1576,7 @@ qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1573 1576
1574 if (unlikely(no_of_desc + 2 > qlcnic_tx_avail(tx_ring))) { 1577 if (unlikely(no_of_desc + 2 > qlcnic_tx_avail(tx_ring))) {
1575 netif_stop_queue(netdev); 1578 netif_stop_queue(netdev);
1579 adapter->stats.xmit_off++;
1576 return NETDEV_TX_BUSY; 1580 return NETDEV_TX_BUSY;
1577 } 1581 }
1578 1582
@@ -1880,6 +1884,7 @@ static int qlcnic_process_cmd_ring(struct qlcnic_adapter *adapter)
1880 if (qlcnic_tx_avail(tx_ring) > TX_STOP_THRESH) { 1884 if (qlcnic_tx_avail(tx_ring) > TX_STOP_THRESH) {
1881 netif_wake_queue(netdev); 1885 netif_wake_queue(netdev);
1882 adapter->tx_timeo_cnt = 0; 1886 adapter->tx_timeo_cnt = 0;
1887 adapter->stats.xmit_on++;
1883 } 1888 }
1884 __netif_tx_unlock(tx_ring->txq); 1889 __netif_tx_unlock(tx_ring->txq);
1885 } 1890 }
diff --git a/drivers/net/qlge/qlge_ethtool.c b/drivers/net/qlge/qlge_ethtool.c
index 05b8bde9980d..7dbff87480dc 100644
--- a/drivers/net/qlge/qlge_ethtool.c
+++ b/drivers/net/qlge/qlge_ethtool.c
@@ -405,7 +405,7 @@ static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
405 u32 wol = 0; 405 u32 wol = 0;
406 status = ql_mb_wol_mode(qdev, wol); 406 status = ql_mb_wol_mode(qdev, wol);
407 netif_err(qdev, drv, qdev->ndev, "WOL %s (wol code 0x%x)\n", 407 netif_err(qdev, drv, qdev->ndev, "WOL %s (wol code 0x%x)\n",
408 status == 0 ? "cleared sucessfully" : "clear failed", 408 status == 0 ? "cleared successfully" : "clear failed",
409 wol); 409 wol);
410 } 410 }
411 411
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index c26ec5d740f6..fd34f266c0a8 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -3855,7 +3855,7 @@ int ql_wol(struct ql_adapter *qdev)
3855 status = ql_mb_wol_mode(qdev, wol); 3855 status = ql_mb_wol_mode(qdev, wol);
3856 netif_err(qdev, drv, qdev->ndev, 3856 netif_err(qdev, drv, qdev->ndev,
3857 "WOL %s (wol code 0x%x) on %s\n", 3857 "WOL %s (wol code 0x%x) on %s\n",
3858 (status == 0) ? "Sucessfully set" : "Failed", 3858 (status == 0) ? "Successfully set" : "Failed",
3859 wol, qdev->ndev->name); 3859 wol, qdev->ndev->name);
3860 } 3860 }
3861 3861
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index dfc3573c91bb..9d3ebf3e975e 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -4270,7 +4270,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
4270 4270
4271 tp->cur_tx += frags + 1; 4271 tp->cur_tx += frags + 1;
4272 4272
4273 smp_wmb(); 4273 wmb();
4274 4274
4275 RTL_W8(TxPoll, NPQ); /* set polling bit */ 4275 RTL_W8(TxPoll, NPQ); /* set polling bit */
4276 4276
@@ -4621,7 +4621,7 @@ static int rtl8169_poll(struct napi_struct *napi, int budget)
4621 * until it does. 4621 * until it does.
4622 */ 4622 */
4623 tp->intr_mask = 0xffff; 4623 tp->intr_mask = 0xffff;
4624 smp_wmb(); 4624 wmb();
4625 RTL_W16(IntrMask, tp->intr_event); 4625 RTL_W16(IntrMask, tp->intr_event);
4626 } 4626 }
4627 4627
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index 43bc66aa8405..df70657260dd 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -923,8 +923,8 @@ static int init_shared_mem(struct s2io_nic *nic)
923 tmp_v_addr = mac_control->stats_mem; 923 tmp_v_addr = mac_control->stats_mem;
924 mac_control->stats_info = (struct stat_block *)tmp_v_addr; 924 mac_control->stats_info = (struct stat_block *)tmp_v_addr;
925 memset(tmp_v_addr, 0, size); 925 memset(tmp_v_addr, 0, size);
926 DBG_PRINT(INIT_DBG, "%s: Ring Mem PHY: 0x%llx\n", dev->name, 926 DBG_PRINT(INIT_DBG, "%s: Ring Mem PHY: 0x%llx\n",
927 (unsigned long long)tmp_p_addr); 927 dev_name(&nic->pdev->dev), (unsigned long long)tmp_p_addr);
928 mac_control->stats_info->sw_stat.mem_allocated += mem_allocated; 928 mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
929 return SUCCESS; 929 return SUCCESS;
930} 930}
@@ -3480,7 +3480,7 @@ static void s2io_reset(struct s2io_nic *sp)
3480 struct swStat *swstats; 3480 struct swStat *swstats;
3481 3481
3482 DBG_PRINT(INIT_DBG, "%s: Resetting XFrame card %s\n", 3482 DBG_PRINT(INIT_DBG, "%s: Resetting XFrame card %s\n",
3483 __func__, sp->dev->name); 3483 __func__, pci_name(sp->pdev));
3484 3484
3485 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */ 3485 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3486 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd)); 3486 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
diff --git a/drivers/net/sfc/regs.h b/drivers/net/sfc/regs.h
index 89d606fe9248..18a3be428348 100644
--- a/drivers/net/sfc/regs.h
+++ b/drivers/net/sfc/regs.h
@@ -95,7 +95,7 @@
95#define FRF_AA_INT_ACK_KER_FIELD_LBN 0 95#define FRF_AA_INT_ACK_KER_FIELD_LBN 0
96#define FRF_AA_INT_ACK_KER_FIELD_WIDTH 32 96#define FRF_AA_INT_ACK_KER_FIELD_WIDTH 32
97 97
98/* INT_ISR0_REG: Function 0 Interrupt Acknowlege Status register */ 98/* INT_ISR0_REG: Function 0 Interrupt Acknowledge Status register */
99#define FR_BZ_INT_ISR0 0x00000090 99#define FR_BZ_INT_ISR0 0x00000090
100#define FRF_BZ_INT_ISR_REG_LBN 0 100#define FRF_BZ_INT_ISR_REG_LBN 0
101#define FRF_BZ_INT_ISR_REG_WIDTH 64 101#define FRF_BZ_INT_ISR_REG_WIDTH 64
diff --git a/drivers/net/skfp/ess.c b/drivers/net/skfp/ess.c
index a85efcfd9d0e..e8387d25f24a 100644
--- a/drivers/net/skfp/ess.c
+++ b/drivers/net/skfp/ess.c
@@ -557,7 +557,7 @@ static void ess_send_alc_req(struct s_smc *smc)
557 557
558 /* 558 /*
559 * send never allocation request where the requested payload and 559 * send never allocation request where the requested payload and
560 * overhead is zero or deallocate bandwidht when no bandwidth is 560 * overhead is zero or deallocate bandwidth when no bandwidth is
561 * parsed 561 * parsed
562 */ 562 */
563 if (!smc->mib.fddiESSPayload) { 563 if (!smc->mib.fddiESSPayload) {
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 653bdd76ef46..d8ec4c11fd49 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -4863,6 +4863,7 @@ static int sky2_resume(struct pci_dev *pdev)
4863 if (!hw) 4863 if (!hw)
4864 return 0; 4864 return 0;
4865 4865
4866 rtnl_lock();
4866 err = pci_set_power_state(pdev, PCI_D0); 4867 err = pci_set_power_state(pdev, PCI_D0);
4867 if (err) 4868 if (err)
4868 goto out; 4869 goto out;
@@ -4884,7 +4885,6 @@ static int sky2_resume(struct pci_dev *pdev)
4884 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); 4885 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
4885 napi_enable(&hw->napi); 4886 napi_enable(&hw->napi);
4886 4887
4887 rtnl_lock();
4888 for (i = 0; i < hw->ports; i++) { 4888 for (i = 0; i < hw->ports; i++) {
4889 err = sky2_reattach(hw->dev[i]); 4889 err = sky2_reattach(hw->dev[i]);
4890 if (err) 4890 if (err)
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 54799544bda3..8d2772cc42f2 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -330,6 +330,48 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
330 330
331#include <unit/smc91111.h> 331#include <unit/smc91111.h>
332 332
333#elif defined(CONFIG_ARCH_MSM)
334
335#define SMC_CAN_USE_8BIT 0
336#define SMC_CAN_USE_16BIT 1
337#define SMC_CAN_USE_32BIT 0
338#define SMC_NOWAIT 1
339
340#define SMC_inw(a, r) readw((a) + (r))
341#define SMC_outw(v, a, r) writew(v, (a) + (r))
342#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
343#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
344
345#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH
346
347#elif defined(CONFIG_COLDFIRE)
348
349#define SMC_CAN_USE_8BIT 0
350#define SMC_CAN_USE_16BIT 1
351#define SMC_CAN_USE_32BIT 0
352#define SMC_NOWAIT 1
353
354static inline void mcf_insw(void *a, unsigned char *p, int l)
355{
356 u16 *wp = (u16 *) p;
357 while (l-- > 0)
358 *wp++ = readw(a);
359}
360
361static inline void mcf_outsw(void *a, unsigned char *p, int l)
362{
363 u16 *wp = (u16 *) p;
364 while (l-- > 0)
365 writew(*wp++, a);
366}
367
368#define SMC_inw(a, r) _swapw(readw((a) + (r)))
369#define SMC_outw(v, a, r) writew(_swapw(v), (a) + (r))
370#define SMC_insw(a, r, p, l) mcf_insw(a + r, p, l)
371#define SMC_outsw(a, r, p, l) mcf_outsw(a + r, p, l)
372
373#define SMC_IRQ_FLAGS (IRQF_DISABLED)
374
333#else 375#else
334 376
335/* 377/*
diff --git a/drivers/net/smsc9420.c b/drivers/net/smsc9420.c
index 30110a11d737..34fa10d8ad40 100644
--- a/drivers/net/smsc9420.c
+++ b/drivers/net/smsc9420.c
@@ -1347,7 +1347,7 @@ static int smsc9420_open(struct net_device *dev)
1347 1347
1348 netif_carrier_off(dev); 1348 netif_carrier_off(dev);
1349 1349
1350 /* disable, mask and acknowlege all interrupts */ 1350 /* disable, mask and acknowledge all interrupts */
1351 spin_lock_irqsave(&pd->int_lock, flags); 1351 spin_lock_irqsave(&pd->int_lock, flags);
1352 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_); 1352 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
1353 smsc9420_reg_write(pd, INT_CFG, int_cfg); 1353 smsc9420_reg_write(pd, INT_CFG, int_cfg);
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c
index 2f8a8c32021e..5ba9d989f8fc 100644
--- a/drivers/net/spider_net.c
+++ b/drivers/net/spider_net.c
@@ -474,7 +474,7 @@ spider_net_prepare_rx_descr(struct spider_net_card *card,
474 * spider_net_enable_rxchtails - sets RX dmac chain tail addresses 474 * spider_net_enable_rxchtails - sets RX dmac chain tail addresses
475 * @card: card structure 475 * @card: card structure
476 * 476 *
477 * spider_net_enable_rxchtails sets the RX DMAC chain tail adresses in the 477 * spider_net_enable_rxchtails sets the RX DMAC chain tail addresses in the
478 * chip by writing to the appropriate register. DMA is enabled in 478 * chip by writing to the appropriate register. DMA is enabled in
479 * spider_net_enable_rxdmac. 479 * spider_net_enable_rxdmac.
480 */ 480 */
@@ -1820,7 +1820,7 @@ spider_net_enable_card(struct spider_net_card *card)
1820 1820
1821 spider_net_write_reg(card, SPIDER_NET_ECMODE, SPIDER_NET_ECMODE_VALUE); 1821 spider_net_write_reg(card, SPIDER_NET_ECMODE, SPIDER_NET_ECMODE_VALUE);
1822 1822
1823 /* set chain tail adress for RX chains and 1823 /* set chain tail address for RX chains and
1824 * enable DMA */ 1824 * enable DMA */
1825 spider_net_enable_rxchtails(card); 1825 spider_net_enable_rxchtails(card);
1826 spider_net_enable_rxdmac(card); 1826 spider_net_enable_rxdmac(card);
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 4344017bfaef..70196bc5fe61 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -782,7 +782,7 @@ static int gem_rx(struct gem *gp, int work_to_do)
782 break; 782 break;
783 783
784 /* When writing back RX descriptor, GEM writes status 784 /* When writing back RX descriptor, GEM writes status
785 * then buffer address, possibly in seperate transactions. 785 * then buffer address, possibly in separate transactions.
786 * If we don't wait for the chip to write both, we could 786 * If we don't wait for the chip to write both, we could
787 * post a new buffer to this descriptor then have GEM spam 787 * post a new buffer to this descriptor then have GEM spam
788 * on the buffer address. We sync on the RX completion 788 * on the buffer address. We sync on the RX completion
diff --git a/drivers/net/tehuti.c b/drivers/net/tehuti.c
index 0c9780217c87..f5493092521a 100644
--- a/drivers/net/tehuti.c
+++ b/drivers/net/tehuti.c
@@ -1851,7 +1851,7 @@ static void bdx_tx_push_desc(struct bdx_priv *priv, void *data, int size)
1851 * @data - desc's data 1851 * @data - desc's data
1852 * @size - desc's size 1852 * @size - desc's size
1853 * 1853 *
1854 * NOTE: this func does check for available space and, if neccessary, waits for 1854 * NOTE: this func does check for available space and, if necessary, waits for
1855 * NIC to read existing data before writing new one. 1855 * NIC to read existing data before writing new one.
1856 */ 1856 */
1857static void bdx_tx_push_desc_safe(struct bdx_priv *priv, void *data, int size) 1857static void bdx_tx_push_desc_safe(struct bdx_priv *priv, void *data, int size)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 0fa7688ab483..22cf1c446de3 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -5279,7 +5279,7 @@ static void tg3_poll_controller(struct net_device *dev)
5279 struct tg3 *tp = netdev_priv(dev); 5279 struct tg3 *tp = netdev_priv(dev);
5280 5280
5281 for (i = 0; i < tp->irq_cnt; i++) 5281 for (i = 0; i < tp->irq_cnt; i++)
5282 tg3_interrupt(tp->napi[i].irq_vec, dev); 5282 tg3_interrupt(tp->napi[i].irq_vec, &tp->napi[i]);
5283} 5283}
5284#endif 5284#endif
5285 5285
@@ -9776,7 +9776,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
9776 ADVERTISED_Pause | 9776 ADVERTISED_Pause |
9777 ADVERTISED_Asym_Pause; 9777 ADVERTISED_Asym_Pause;
9778 9778
9779 if (!(tp->tg3_flags2 & TG3_FLAG_10_100_ONLY)) 9779 if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY))
9780 mask |= ADVERTISED_1000baseT_Half | 9780 mask |= ADVERTISED_1000baseT_Half |
9781 ADVERTISED_1000baseT_Full; 9781 ADVERTISED_1000baseT_Full;
9782 9782
diff --git a/drivers/net/tokenring/tms380tr.c b/drivers/net/tokenring/tms380tr.c
index 21a01753312a..ee71bcfb3753 100644
--- a/drivers/net/tokenring/tms380tr.c
+++ b/drivers/net/tokenring/tms380tr.c
@@ -693,7 +693,7 @@ static netdev_tx_t tms380tr_hardware_send_packet(struct sk_buff *skb,
693 * NOTE: This function should be used whenever the status of any TPL must be 693 * NOTE: This function should be used whenever the status of any TPL must be
694 * modified by the driver, because the compiler may otherwise change the 694 * modified by the driver, because the compiler may otherwise change the
695 * order of instructions such that writing the TPL status may be executed at 695 * order of instructions such that writing the TPL status may be executed at
696 * an undesireable time. When this function is used, the status is always 696 * an undesirable time. When this function is used, the status is always
697 * written when the function is called. 697 * written when the function is called.
698 */ 698 */
699static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status) 699static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status)
@@ -2264,7 +2264,7 @@ static void tms380tr_rcv_status_irq(struct net_device *dev)
2264 * This function should be used whenever the status of any RPL must be 2264 * This function should be used whenever the status of any RPL must be
2265 * modified by the driver, because the compiler may otherwise change the 2265 * modified by the driver, because the compiler may otherwise change the
2266 * order of instructions such that writing the RPL status may be executed 2266 * order of instructions such that writing the RPL status may be executed
2267 * at an undesireable time. When this function is used, the status is 2267 * at an undesirable time. When this function is used, the status is
2268 * always written when the function is called. 2268 * always written when the function is called.
2269 */ 2269 */
2270static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status) 2270static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status)
diff --git a/drivers/net/tulip/eeprom.c b/drivers/net/tulip/eeprom.c
index 93f4e8309f81..49f05d1431f5 100644
--- a/drivers/net/tulip/eeprom.c
+++ b/drivers/net/tulip/eeprom.c
@@ -143,6 +143,12 @@ static void __devinit tulip_build_fake_mediatable(struct tulip_private *tp)
143 143
144void __devinit tulip_parse_eeprom(struct net_device *dev) 144void __devinit tulip_parse_eeprom(struct net_device *dev)
145{ 145{
146 /*
147 dev is not registered at this point, so logging messages can't
148 use dev_<level> or netdev_<level> but dev->name is good via a
149 hack in the caller
150 */
151
146 /* The last media info list parsed, for multiport boards. */ 152 /* The last media info list parsed, for multiport boards. */
147 static struct mediatable *last_mediatable; 153 static struct mediatable *last_mediatable;
148 static unsigned char *last_ee_data; 154 static unsigned char *last_ee_data;
@@ -161,15 +167,14 @@ void __devinit tulip_parse_eeprom(struct net_device *dev)
161 if (ee_data[0] == 0xff) { 167 if (ee_data[0] == 0xff) {
162 if (last_mediatable) { 168 if (last_mediatable) {
163 controller_index++; 169 controller_index++;
164 dev_info(&dev->dev, 170 pr_info("%s: Controller %d of multiport board\n",
165 "Controller %d of multiport board\n", 171 dev->name, controller_index);
166 controller_index);
167 tp->mtable = last_mediatable; 172 tp->mtable = last_mediatable;
168 ee_data = last_ee_data; 173 ee_data = last_ee_data;
169 goto subsequent_board; 174 goto subsequent_board;
170 } else 175 } else
171 dev_info(&dev->dev, 176 pr_info("%s: Missing EEPROM, this interface may not work correctly!\n",
172 "Missing EEPROM, this interface may not work correctly!\n"); 177 dev->name);
173 return; 178 return;
174 } 179 }
175 /* Do a fix-up based on the vendor half of the station address prefix. */ 180 /* Do a fix-up based on the vendor half of the station address prefix. */
@@ -181,15 +186,14 @@ void __devinit tulip_parse_eeprom(struct net_device *dev)
181 i++; /* An Accton EN1207, not an outlaw Maxtech. */ 186 i++; /* An Accton EN1207, not an outlaw Maxtech. */
182 memcpy(ee_data + 26, eeprom_fixups[i].newtable, 187 memcpy(ee_data + 26, eeprom_fixups[i].newtable,
183 sizeof(eeprom_fixups[i].newtable)); 188 sizeof(eeprom_fixups[i].newtable));
184 dev_info(&dev->dev, 189 pr_info("%s: Old format EEPROM on '%s' board. Using substitute media control info\n",
185 "Old format EEPROM on '%s' board. Using substitute media control info\n", 190 dev->name, eeprom_fixups[i].name);
186 eeprom_fixups[i].name);
187 break; 191 break;
188 } 192 }
189 } 193 }
190 if (eeprom_fixups[i].name == NULL) { /* No fixup found. */ 194 if (eeprom_fixups[i].name == NULL) { /* No fixup found. */
191 dev_info(&dev->dev, 195 pr_info("%s: Old style EEPROM with no media selection information\n",
192 "Old style EEPROM with no media selection information\n"); 196 dev->name);
193 return; 197 return;
194 } 198 }
195 } 199 }
@@ -217,8 +221,8 @@ subsequent_board:
217 /* there is no phy information, don't even try to build mtable */ 221 /* there is no phy information, don't even try to build mtable */
218 if (count == 0) { 222 if (count == 0) {
219 if (tulip_debug > 0) 223 if (tulip_debug > 0)
220 dev_warn(&dev->dev, 224 pr_warning("%s: no phy info, aborting mtable build\n",
221 "no phy info, aborting mtable build\n"); 225 dev->name);
222 return; 226 return;
223 } 227 }
224 228
@@ -234,8 +238,10 @@ subsequent_board:
234 mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0; 238 mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0;
235 mtable->csr15dir = mtable->csr15val = 0; 239 mtable->csr15dir = mtable->csr15val = 0;
236 240
237 dev_info(&dev->dev, "EEPROM default media type %s\n", 241 pr_info("%s: EEPROM default media type %s\n",
238 media & 0x0800 ? "Autosense" : medianame[media & MEDIA_MASK]); 242 dev->name,
243 media & 0x0800 ? "Autosense"
244 : medianame[media & MEDIA_MASK]);
239 for (i = 0; i < count; i++) { 245 for (i = 0; i < count; i++) {
240 struct medialeaf *leaf = &mtable->mleaf[i]; 246 struct medialeaf *leaf = &mtable->mleaf[i];
241 247
@@ -298,17 +304,17 @@ subsequent_board:
298 } 304 }
299 if (tulip_debug > 1 && leaf->media == 11) { 305 if (tulip_debug > 1 && leaf->media == 11) {
300 unsigned char *bp = leaf->leafdata; 306 unsigned char *bp = leaf->leafdata;
301 dev_info(&dev->dev, 307 pr_info("%s: MII interface PHY %d, setup/reset sequences %d/%d long, capabilities %02x %02x\n",
302 "MII interface PHY %d, setup/reset sequences %d/%d long, capabilities %02x %02x\n", 308 dev->name,
303 bp[0], bp[1], bp[2 + bp[1]*2], 309 bp[0], bp[1], bp[2 + bp[1]*2],
304 bp[5 + bp[2 + bp[1]*2]*2], 310 bp[5 + bp[2 + bp[1]*2]*2],
305 bp[4 + bp[2 + bp[1]*2]*2]); 311 bp[4 + bp[2 + bp[1]*2]*2]);
306 } 312 }
307 dev_info(&dev->dev, 313 pr_info("%s: Index #%d - Media %s (#%d) described by a %s (%d) block\n",
308 "Index #%d - Media %s (#%d) described by a %s (%d) block\n", 314 dev->name,
309 i, medianame[leaf->media & 15], leaf->media, 315 i, medianame[leaf->media & 15], leaf->media,
310 leaf->type < ARRAY_SIZE(block_name) ? block_name[leaf->type] : "<unknown>", 316 leaf->type < ARRAY_SIZE(block_name) ? block_name[leaf->type] : "<unknown>",
311 leaf->type); 317 leaf->type);
312 } 318 }
313 if (new_advertise) 319 if (new_advertise)
314 tp->sym_advertise = new_advertise; 320 tp->sym_advertise = new_advertise;
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index ce1efa4c0b0d..96c39bddc78c 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1437,7 +1437,7 @@ static int tun_chr_close(struct inode *inode, struct file *file)
1437 1437
1438 __tun_detach(tun); 1438 __tun_detach(tun);
1439 1439
1440 /* If desireable, unregister the netdevice. */ 1440 /* If desirable, unregister the netdevice. */
1441 if (!(tun->flags & TUN_PERSIST)) { 1441 if (!(tun->flags & TUN_PERSIST)) {
1442 rtnl_lock(); 1442 rtnl_lock();
1443 if (dev->reg_state == NETREG_REGISTERED) 1443 if (dev->reg_state == NETREG_REGISTERED)
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c
index e3ddcb8f29df..cd24e5f2b2a2 100644
--- a/drivers/net/typhoon.c
+++ b/drivers/net/typhoon.c
@@ -480,7 +480,7 @@ typhoon_hello(struct typhoon *tp)
480 typhoon_inc_cmd_index(&ring->lastWrite, 1); 480 typhoon_inc_cmd_index(&ring->lastWrite, 1);
481 481
482 INIT_COMMAND_NO_RESPONSE(cmd, TYPHOON_CMD_HELLO_RESP); 482 INIT_COMMAND_NO_RESPONSE(cmd, TYPHOON_CMD_HELLO_RESP);
483 smp_wmb(); 483 wmb();
484 iowrite32(ring->lastWrite, tp->ioaddr + TYPHOON_REG_CMD_READY); 484 iowrite32(ring->lastWrite, tp->ioaddr + TYPHOON_REG_CMD_READY);
485 spin_unlock(&tp->command_lock); 485 spin_unlock(&tp->command_lock);
486 } 486 }
@@ -1311,13 +1311,15 @@ typhoon_init_interface(struct typhoon *tp)
1311 1311
1312 tp->txlo_dma_addr = le32_to_cpu(iface->txLoAddr); 1312 tp->txlo_dma_addr = le32_to_cpu(iface->txLoAddr);
1313 tp->card_state = Sleeping; 1313 tp->card_state = Sleeping;
1314 smp_wmb();
1315 1314
1316 tp->offload = TYPHOON_OFFLOAD_IP_CHKSUM | TYPHOON_OFFLOAD_TCP_CHKSUM; 1315 tp->offload = TYPHOON_OFFLOAD_IP_CHKSUM | TYPHOON_OFFLOAD_TCP_CHKSUM;
1317 tp->offload |= TYPHOON_OFFLOAD_UDP_CHKSUM | TSO_OFFLOAD_ON; 1316 tp->offload |= TYPHOON_OFFLOAD_UDP_CHKSUM | TSO_OFFLOAD_ON;
1318 1317
1319 spin_lock_init(&tp->command_lock); 1318 spin_lock_init(&tp->command_lock);
1320 spin_lock_init(&tp->state_lock); 1319 spin_lock_init(&tp->state_lock);
1320
1321 /* Force the writes to the shared memory area out before continuing. */
1322 wmb();
1321} 1323}
1322 1324
1323static void 1325static void
@@ -2096,7 +2098,7 @@ typhoon_tx_timeout(struct net_device *dev)
2096 2098
2097 if(typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) { 2099 if(typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) {
2098 netdev_warn(dev, "could not reset in tx timeout\n"); 2100 netdev_warn(dev, "could not reset in tx timeout\n");
2099 goto truely_dead; 2101 goto truly_dead;
2100 } 2102 }
2101 2103
2102 /* If we ever start using the Hi ring, it will need cleaning too */ 2104 /* If we ever start using the Hi ring, it will need cleaning too */
@@ -2105,13 +2107,13 @@ typhoon_tx_timeout(struct net_device *dev)
2105 2107
2106 if(typhoon_start_runtime(tp) < 0) { 2108 if(typhoon_start_runtime(tp) < 0) {
2107 netdev_err(dev, "could not start runtime in tx timeout\n"); 2109 netdev_err(dev, "could not start runtime in tx timeout\n");
2108 goto truely_dead; 2110 goto truly_dead;
2109 } 2111 }
2110 2112
2111 netif_wake_queue(dev); 2113 netif_wake_queue(dev);
2112 return; 2114 return;
2113 2115
2114truely_dead: 2116truly_dead:
2115 /* Reset the hardware, and turn off carrier to avoid more timeouts */ 2117 /* Reset the hardware, and turn off carrier to avoid more timeouts */
2116 typhoon_reset(tp->ioaddr, NoWait); 2118 typhoon_reset(tp->ioaddr, NoWait);
2117 netif_carrier_off(dev); 2119 netif_carrier_off(dev);
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 23a97518bc1f..1b0aef37e495 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -430,7 +430,7 @@ static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth,
430 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); 430 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
431 431
432 /* Ethernet frames are defined in Little Endian mode, 432 /* Ethernet frames are defined in Little Endian mode,
433 therefor to insert */ 433 therefore to insert */
434 /* the address to the hash (Big Endian mode), we reverse the bytes.*/ 434 /* the address to the hash (Big Endian mode), we reverse the bytes.*/
435 435
436 set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr); 436 set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr);
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c
index 20e34608fa4a..9e05639435f2 100644
--- a/drivers/net/usb/asix.c
+++ b/drivers/net/usb/asix.c
@@ -54,6 +54,7 @@ static const char driver_name [] = "asix";
54#define AX_CMD_WRITE_IPG0 0x12 54#define AX_CMD_WRITE_IPG0 0x12
55#define AX_CMD_WRITE_IPG1 0x13 55#define AX_CMD_WRITE_IPG1 0x13
56#define AX_CMD_READ_NODE_ID 0x13 56#define AX_CMD_READ_NODE_ID 0x13
57#define AX_CMD_WRITE_NODE_ID 0x14
57#define AX_CMD_WRITE_IPG2 0x14 58#define AX_CMD_WRITE_IPG2 0x14
58#define AX_CMD_WRITE_MULTI_FILTER 0x16 59#define AX_CMD_WRITE_MULTI_FILTER 0x16
59#define AX88172_CMD_READ_NODE_ID 0x17 60#define AX88172_CMD_READ_NODE_ID 0x17
@@ -165,6 +166,7 @@ static const char driver_name [] = "asix";
165/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ 166/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
166struct asix_data { 167struct asix_data {
167 u8 multi_filter[AX_MCAST_FILTER_SIZE]; 168 u8 multi_filter[AX_MCAST_FILTER_SIZE];
169 u8 mac_addr[ETH_ALEN];
168 u8 phymode; 170 u8 phymode;
169 u8 ledmode; 171 u8 ledmode;
170 u8 eeprom_len; 172 u8 eeprom_len;
@@ -732,6 +734,30 @@ static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
732 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 734 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
733} 735}
734 736
737static int asix_set_mac_address(struct net_device *net, void *p)
738{
739 struct usbnet *dev = netdev_priv(net);
740 struct asix_data *data = (struct asix_data *)&dev->data;
741 struct sockaddr *addr = p;
742
743 if (netif_running(net))
744 return -EBUSY;
745 if (!is_valid_ether_addr(addr->sa_data))
746 return -EADDRNOTAVAIL;
747
748 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
749
750 /* We use the 20 byte dev->data
751 * for our 6 byte mac buffer
752 * to avoid allocating memory that
753 * is tricky to free later */
754 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
755 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
756 data->mac_addr);
757
758 return 0;
759}
760
735/* We need to override some ethtool_ops so we require our 761/* We need to override some ethtool_ops so we require our
736 own structure so we don't interfere with other usbnet 762 own structure so we don't interfere with other usbnet
737 devices that may be connected at the same time. */ 763 devices that may be connected at the same time. */
@@ -919,7 +945,7 @@ static const struct net_device_ops ax88772_netdev_ops = {
919 .ndo_start_xmit = usbnet_start_xmit, 945 .ndo_start_xmit = usbnet_start_xmit,
920 .ndo_tx_timeout = usbnet_tx_timeout, 946 .ndo_tx_timeout = usbnet_tx_timeout,
921 .ndo_change_mtu = usbnet_change_mtu, 947 .ndo_change_mtu = usbnet_change_mtu,
922 .ndo_set_mac_address = eth_mac_addr, 948 .ndo_set_mac_address = asix_set_mac_address,
923 .ndo_validate_addr = eth_validate_addr, 949 .ndo_validate_addr = eth_validate_addr,
924 .ndo_do_ioctl = asix_ioctl, 950 .ndo_do_ioctl = asix_ioctl,
925 .ndo_set_multicast_list = asix_set_multicast, 951 .ndo_set_multicast_list = asix_set_multicast,
@@ -1213,7 +1239,7 @@ static const struct net_device_ops ax88178_netdev_ops = {
1213 .ndo_stop = usbnet_stop, 1239 .ndo_stop = usbnet_stop,
1214 .ndo_start_xmit = usbnet_start_xmit, 1240 .ndo_start_xmit = usbnet_start_xmit,
1215 .ndo_tx_timeout = usbnet_tx_timeout, 1241 .ndo_tx_timeout = usbnet_tx_timeout,
1216 .ndo_set_mac_address = eth_mac_addr, 1242 .ndo_set_mac_address = asix_set_mac_address,
1217 .ndo_validate_addr = eth_validate_addr, 1243 .ndo_validate_addr = eth_validate_addr,
1218 .ndo_set_multicast_list = asix_set_multicast, 1244 .ndo_set_multicast_list = asix_set_multicast,
1219 .ndo_do_ioctl = asix_ioctl, 1245 .ndo_do_ioctl = asix_ioctl,
diff --git a/drivers/net/usb/pegasus.h b/drivers/net/usb/pegasus.h
index 5d02f0200737..b90d8766ab74 100644
--- a/drivers/net/usb/pegasus.h
+++ b/drivers/net/usb/pegasus.h
@@ -177,7 +177,7 @@ PEGASUS_DEV( "USB 10/100 Fast Ethernet", VENDOR_ABOCOM, 0x400c,
177PEGASUS_DEV( "USB 10/100 Fast Ethernet", VENDOR_ABOCOM, 0xabc1, 177PEGASUS_DEV( "USB 10/100 Fast Ethernet", VENDOR_ABOCOM, 0xabc1,
178 DEFAULT_GPIO_RESET ) 178 DEFAULT_GPIO_RESET )
179PEGASUS_DEV( "USB 10/100 Fast Ethernet", VENDOR_ABOCOM, 0x200c, 179PEGASUS_DEV( "USB 10/100 Fast Ethernet", VENDOR_ABOCOM, 0x200c,
180 DEFAULT_GPIO_RESET | PEGASUS_II ) 180 DEFAULT_GPIO_RESET | PEGASUS_II )
181PEGASUS_DEV( "Accton USB 10/100 Ethernet Adapter", VENDOR_ACCTON, 0x1046, 181PEGASUS_DEV( "Accton USB 10/100 Ethernet Adapter", VENDOR_ACCTON, 0x1046,
182 DEFAULT_GPIO_RESET ) 182 DEFAULT_GPIO_RESET )
183PEGASUS_DEV( "SpeedStream USB 10/100 Ethernet", VENDOR_ACCTON, 0x5046, 183PEGASUS_DEV( "SpeedStream USB 10/100 Ethernet", VENDOR_ACCTON, 0x5046,
@@ -208,6 +208,8 @@ PEGASUS_DEV( "Allied Telesyn Int. AT-USB100", VENDOR_ALLIEDTEL, 0xb100,
208 */ 208 */
209PEGASUS_DEV_CLASS( "Belkin F5D5050 USB Ethernet", VENDOR_BELKIN, 0x0121, 0x00, 209PEGASUS_DEV_CLASS( "Belkin F5D5050 USB Ethernet", VENDOR_BELKIN, 0x0121, 0x00,
210 DEFAULT_GPIO_RESET | PEGASUS_II ) 210 DEFAULT_GPIO_RESET | PEGASUS_II )
211PEGASUS_DEV( "Belkin F5U122 10/100 USB Ethernet", VENDOR_BELKIN, 0x0122,
212 DEFAULT_GPIO_RESET | PEGASUS_II )
211PEGASUS_DEV( "Billionton USB-100", VENDOR_BILLIONTON, 0x0986, 213PEGASUS_DEV( "Billionton USB-100", VENDOR_BILLIONTON, 0x0986,
212 DEFAULT_GPIO_RESET ) 214 DEFAULT_GPIO_RESET )
213PEGASUS_DEV( "Billionton USBLP-100", VENDOR_BILLIONTON, 0x0987, 215PEGASUS_DEV( "Billionton USBLP-100", VENDOR_BILLIONTON, 0x0987,
@@ -249,7 +251,7 @@ PEGASUS_DEV( "GIGABYTE GN-BR402W Wireless Router", VENDOR_GIGABYTE, 0x8002,
249PEGASUS_DEV( "Hawking UF100 10/100 Ethernet", VENDOR_HAWKING, 0x400c, 251PEGASUS_DEV( "Hawking UF100 10/100 Ethernet", VENDOR_HAWKING, 0x400c,
250 DEFAULT_GPIO_RESET | PEGASUS_II ) 252 DEFAULT_GPIO_RESET | PEGASUS_II )
251PEGASUS_DEV( "HP hn210c Ethernet USB", VENDOR_HP, 0x811c, 253PEGASUS_DEV( "HP hn210c Ethernet USB", VENDOR_HP, 0x811c,
252 DEFAULT_GPIO_RESET | PEGASUS_II ) 254 DEFAULT_GPIO_RESET | PEGASUS_II )
253PEGASUS_DEV( "IO DATA USB ET/TX", VENDOR_IODATA, 0x0904, 255PEGASUS_DEV( "IO DATA USB ET/TX", VENDOR_IODATA, 0x0904,
254 DEFAULT_GPIO_RESET ) 256 DEFAULT_GPIO_RESET )
255PEGASUS_DEV( "IO DATA USB ET/TX-S", VENDOR_IODATA, 0x0913, 257PEGASUS_DEV( "IO DATA USB ET/TX-S", VENDOR_IODATA, 0x0913,
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c
index b36bf96eb502..f0bd70fb650c 100644
--- a/drivers/net/wan/cosa.c
+++ b/drivers/net/wan/cosa.c
@@ -811,7 +811,7 @@ static ssize_t cosa_read(struct file *file,
811 cosa_enable_rx(chan); 811 cosa_enable_rx(chan);
812 spin_lock_irqsave(&cosa->lock, flags); 812 spin_lock_irqsave(&cosa->lock, flags);
813 add_wait_queue(&chan->rxwaitq, &wait); 813 add_wait_queue(&chan->rxwaitq, &wait);
814 while(!chan->rx_status) { 814 while (!chan->rx_status) {
815 current->state = TASK_INTERRUPTIBLE; 815 current->state = TASK_INTERRUPTIBLE;
816 spin_unlock_irqrestore(&cosa->lock, flags); 816 spin_unlock_irqrestore(&cosa->lock, flags);
817 schedule(); 817 schedule();
@@ -896,7 +896,7 @@ static ssize_t cosa_write(struct file *file,
896 896
897 spin_lock_irqsave(&cosa->lock, flags); 897 spin_lock_irqsave(&cosa->lock, flags);
898 add_wait_queue(&chan->txwaitq, &wait); 898 add_wait_queue(&chan->txwaitq, &wait);
899 while(!chan->tx_status) { 899 while (!chan->tx_status) {
900 current->state = TASK_INTERRUPTIBLE; 900 current->state = TASK_INTERRUPTIBLE;
901 spin_unlock_irqrestore(&cosa->lock, flags); 901 spin_unlock_irqrestore(&cosa->lock, flags);
902 schedule(); 902 schedule();
@@ -1153,7 +1153,7 @@ static int cosa_ioctl_common(struct cosa_data *cosa,
1153 struct channel_data *channel, unsigned int cmd, unsigned long arg) 1153 struct channel_data *channel, unsigned int cmd, unsigned long arg)
1154{ 1154{
1155 void __user *argp = (void __user *)arg; 1155 void __user *argp = (void __user *)arg;
1156 switch(cmd) { 1156 switch (cmd) {
1157 case COSAIORSET: /* Reset the device */ 1157 case COSAIORSET: /* Reset the device */
1158 if (!capable(CAP_NET_ADMIN)) 1158 if (!capable(CAP_NET_ADMIN))
1159 return -EACCES; 1159 return -EACCES;
@@ -1704,7 +1704,7 @@ static inline void tx_interrupt(struct cosa_data *cosa, int status)
1704 spin_unlock_irqrestore(&cosa->lock, flags); 1704 spin_unlock_irqrestore(&cosa->lock, flags);
1705 return; 1705 return;
1706 } 1706 }
1707 while(1) { 1707 while (1) {
1708 cosa->txchan++; 1708 cosa->txchan++;
1709 i++; 1709 i++;
1710 if (cosa->txchan >= cosa->nchannels) 1710 if (cosa->txchan >= cosa->nchannels)
@@ -2010,7 +2010,7 @@ again:
2010static void debug_status_in(struct cosa_data *cosa, int status) 2010static void debug_status_in(struct cosa_data *cosa, int status)
2011{ 2011{
2012 char *s; 2012 char *s;
2013 switch(status & SR_CMD_FROM_SRP_MASK) { 2013 switch (status & SR_CMD_FROM_SRP_MASK) {
2014 case SR_UP_REQUEST: 2014 case SR_UP_REQUEST:
2015 s = "RX_REQ"; 2015 s = "RX_REQ";
2016 break; 2016 break;
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c
index f1bff98acd1f..1ceccf1ca6c7 100644
--- a/drivers/net/wan/hdlc_cisco.c
+++ b/drivers/net/wan/hdlc_cisco.c
@@ -141,7 +141,7 @@ static __be16 cisco_type_trans(struct sk_buff *skb, struct net_device *dev)
141 data->address != CISCO_UNICAST) 141 data->address != CISCO_UNICAST)
142 return cpu_to_be16(ETH_P_HDLC); 142 return cpu_to_be16(ETH_P_HDLC);
143 143
144 switch(data->protocol) { 144 switch (data->protocol) {
145 case cpu_to_be16(ETH_P_IP): 145 case cpu_to_be16(ETH_P_IP):
146 case cpu_to_be16(ETH_P_IPX): 146 case cpu_to_be16(ETH_P_IPX):
147 case cpu_to_be16(ETH_P_IPV6): 147 case cpu_to_be16(ETH_P_IPV6):
@@ -190,7 +190,7 @@ static int cisco_rx(struct sk_buff *skb)
190 cisco_data = (struct cisco_packet*)(skb->data + sizeof 190 cisco_data = (struct cisco_packet*)(skb->data + sizeof
191 (struct hdlc_header)); 191 (struct hdlc_header));
192 192
193 switch(ntohl (cisco_data->type)) { 193 switch (ntohl (cisco_data->type)) {
194 case CISCO_ADDR_REQ: /* Stolen from syncppp.c :-) */ 194 case CISCO_ADDR_REQ: /* Stolen from syncppp.c :-) */
195 in_dev = dev->ip_ptr; 195 in_dev = dev->ip_ptr;
196 addr = 0; 196 addr = 0;
@@ -245,8 +245,8 @@ static int cisco_rx(struct sk_buff *skb)
245 245
246 dev_kfree_skb_any(skb); 246 dev_kfree_skb_any(skb);
247 return NET_RX_SUCCESS; 247 return NET_RX_SUCCESS;
248 } /* switch(keepalive type) */ 248 } /* switch (keepalive type) */
249 } /* switch(protocol) */ 249 } /* switch (protocol) */
250 250
251 printk(KERN_INFO "%s: Unsupported protocol %x\n", dev->name, 251 printk(KERN_INFO "%s: Unsupported protocol %x\n", dev->name,
252 ntohs(data->protocol)); 252 ntohs(data->protocol));
diff --git a/drivers/net/wan/hdlc_x25.c b/drivers/net/wan/hdlc_x25.c
index aa9248f8eb1a..6e1ca256effd 100644
--- a/drivers/net/wan/hdlc_x25.c
+++ b/drivers/net/wan/hdlc_x25.c
@@ -202,10 +202,10 @@ static int x25_ioctl(struct net_device *dev, struct ifreq *ifr)
202 return 0; /* return protocol only, no settable parameters */ 202 return 0; /* return protocol only, no settable parameters */
203 203
204 case IF_PROTO_X25: 204 case IF_PROTO_X25:
205 if(!capable(CAP_NET_ADMIN)) 205 if (!capable(CAP_NET_ADMIN))
206 return -EPERM; 206 return -EPERM;
207 207
208 if(dev->flags & IFF_UP) 208 if (dev->flags & IFF_UP)
209 return -EBUSY; 209 return -EBUSY;
210 210
211 result=hdlc->attach(dev, ENCODING_NRZ,PARITY_CRC16_PR1_CCITT); 211 result=hdlc->attach(dev, ENCODING_NRZ,PARITY_CRC16_PR1_CCITT);
diff --git a/drivers/net/wimax/i2400m/fw.c b/drivers/net/wimax/i2400m/fw.c
index e803a7dc6502..25c24f0368d8 100644
--- a/drivers/net/wimax/i2400m/fw.c
+++ b/drivers/net/wimax/i2400m/fw.c
@@ -612,7 +612,7 @@ ssize_t i2400m_bm_cmd(struct i2400m *i2400m,
612 goto error_wait_for_ack; 612 goto error_wait_for_ack;
613 } 613 }
614 rx_bytes = result; 614 rx_bytes = result;
615 /* verify the ack and read more if neccessary [result is the 615 /* verify the ack and read more if necessary [result is the
616 * final amount of bytes we get in the ack] */ 616 * final amount of bytes we get in the ack] */
617 result = __i2400m_bm_ack_verify(i2400m, opcode, ack, ack_size, flags); 617 result = __i2400m_bm_ack_verify(i2400m, opcode, ack, ack_size, flags);
618 if (result < 0) 618 if (result < 0)
diff --git a/drivers/net/wimax/i2400m/i2400m.h b/drivers/net/wimax/i2400m/i2400m.h
index 04df9bbe340f..820b128705ec 100644
--- a/drivers/net/wimax/i2400m/i2400m.h
+++ b/drivers/net/wimax/i2400m/i2400m.h
@@ -627,7 +627,7 @@ enum i2400m_bm_cmd_flags {
627 * @I2400M_BRI_NO_REBOOT: Do not reboot the device and proceed 627 * @I2400M_BRI_NO_REBOOT: Do not reboot the device and proceed
628 * directly to wait for a reboot barker from the device. 628 * directly to wait for a reboot barker from the device.
629 * @I2400M_BRI_MAC_REINIT: We need to reinitialize the boot 629 * @I2400M_BRI_MAC_REINIT: We need to reinitialize the boot
630 * rom after reading the MAC adress. This is quite a dirty hack, 630 * rom after reading the MAC address. This is quite a dirty hack,
631 * if you ask me -- the device requires the bootrom to be 631 * if you ask me -- the device requires the bootrom to be
632 * intialized after reading the MAC address. 632 * intialized after reading the MAC address.
633 */ 633 */
diff --git a/drivers/net/wimax/i2400m/sdio.c b/drivers/net/wimax/i2400m/sdio.c
index 76a50ac02ebb..14f876b1358b 100644
--- a/drivers/net/wimax/i2400m/sdio.c
+++ b/drivers/net/wimax/i2400m/sdio.c
@@ -304,7 +304,7 @@ error_kzalloc:
304 * 304 *
305 * The device will be fully reset internally, but won't be 305 * The device will be fully reset internally, but won't be
306 * disconnected from the bus (so no reenumeration will 306 * disconnected from the bus (so no reenumeration will
307 * happen). Firmware upload will be neccessary. 307 * happen). Firmware upload will be necessary.
308 * 308 *
309 * The device will send a reboot barker that will trigger the driver 309 * The device will send a reboot barker that will trigger the driver
310 * to reinitialize the state via __i2400m_dev_reset_handle. 310 * to reinitialize the state via __i2400m_dev_reset_handle.
@@ -314,7 +314,7 @@ error_kzalloc:
314 * 314 *
315 * The device will be fully reset internally, disconnected from the 315 * The device will be fully reset internally, disconnected from the
316 * bus an a reenumeration will happen. Firmware upload will be 316 * bus an a reenumeration will happen. Firmware upload will be
317 * neccessary. Thus, we don't do any locking or struct 317 * necessary. Thus, we don't do any locking or struct
318 * reinitialization, as we are going to be fully disconnected and 318 * reinitialization, as we are going to be fully disconnected and
319 * reenumerated. 319 * reenumerated.
320 * 320 *
diff --git a/drivers/net/wimax/i2400m/usb.c b/drivers/net/wimax/i2400m/usb.c
index 98f4f8c5fb68..99f04c475898 100644
--- a/drivers/net/wimax/i2400m/usb.c
+++ b/drivers/net/wimax/i2400m/usb.c
@@ -246,7 +246,7 @@ error_kzalloc:
246 * 246 *
247 * The device will be fully reset internally, but won't be 247 * The device will be fully reset internally, but won't be
248 * disconnected from the USB bus (so no reenumeration will 248 * disconnected from the USB bus (so no reenumeration will
249 * happen). Firmware upload will be neccessary. 249 * happen). Firmware upload will be necessary.
250 * 250 *
251 * The device will send a reboot barker in the notification endpoint 251 * The device will send a reboot barker in the notification endpoint
252 * that will trigger the driver to reinitialize the state 252 * that will trigger the driver to reinitialize the state
@@ -257,7 +257,7 @@ error_kzalloc:
257 * 257 *
258 * The device will be fully reset internally, disconnected from the 258 * The device will be fully reset internally, disconnected from the
259 * USB bus an a reenumeration will happen. Firmware upload will be 259 * USB bus an a reenumeration will happen. Firmware upload will be
260 * neccessary. Thus, we don't do any locking or struct 260 * necessary. Thus, we don't do any locking or struct
261 * reinitialization, as we are going to be fully disconnected and 261 * reinitialization, as we are going to be fully disconnected and
262 * reenumerated. 262 * reenumerated.
263 * 263 *
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index 698d5672a070..dc5018a6d9ed 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -5255,7 +5255,8 @@ static int set_wep_key(struct airo_info *ai, u16 index, const char *key,
5255 WepKeyRid wkr; 5255 WepKeyRid wkr;
5256 int rc; 5256 int rc;
5257 5257
5258 WARN_ON(keylen == 0); 5258 if (WARN_ON(keylen == 0))
5259 return -1;
5259 5260
5260 memset(&wkr, 0, sizeof(wkr)); 5261 memset(&wkr, 0, sizeof(wkr));
5261 wkr.len = cpu_to_le16(sizeof(wkr)); 5262 wkr.len = cpu_to_le16(sizeof(wkr));
diff --git a/drivers/net/wireless/ath/ar9170/ar9170.h b/drivers/net/wireless/ath/ar9170/ar9170.h
index 8c8ce67971e9..dc662b76a1c8 100644
--- a/drivers/net/wireless/ath/ar9170/ar9170.h
+++ b/drivers/net/wireless/ath/ar9170/ar9170.h
@@ -166,6 +166,7 @@ struct ar9170 {
166 struct ath_common common; 166 struct ath_common common;
167 struct mutex mutex; 167 struct mutex mutex;
168 enum ar9170_device_state state; 168 enum ar9170_device_state state;
169 bool registered;
169 unsigned long bad_hw_nagger; 170 unsigned long bad_hw_nagger;
170 171
171 int (*open)(struct ar9170 *); 172 int (*open)(struct ar9170 *);
diff --git a/drivers/net/wireless/ath/ar9170/main.c b/drivers/net/wireless/ath/ar9170/main.c
index a6452af9c6c5..257c734733d1 100644
--- a/drivers/net/wireless/ath/ar9170/main.c
+++ b/drivers/net/wireless/ath/ar9170/main.c
@@ -2512,7 +2512,7 @@ void *ar9170_alloc(size_t priv_size)
2512 /* 2512 /*
2513 * this buffer is used for rx stream reconstruction. 2513 * this buffer is used for rx stream reconstruction.
2514 * Under heavy load this device (or the transport layer?) 2514 * Under heavy load this device (or the transport layer?)
2515 * tends to split the streams into seperate rx descriptors. 2515 * tends to split the streams into separate rx descriptors.
2516 */ 2516 */
2517 2517
2518 skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL); 2518 skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL);
@@ -2701,7 +2701,8 @@ int ar9170_register(struct ar9170 *ar, struct device *pdev)
2701 dev_info(pdev, "Atheros AR9170 is registered as '%s'\n", 2701 dev_info(pdev, "Atheros AR9170 is registered as '%s'\n",
2702 wiphy_name(ar->hw->wiphy)); 2702 wiphy_name(ar->hw->wiphy));
2703 2703
2704 return err; 2704 ar->registered = true;
2705 return 0;
2705 2706
2706err_unreg: 2707err_unreg:
2707 ieee80211_unregister_hw(ar->hw); 2708 ieee80211_unregister_hw(ar->hw);
@@ -2712,11 +2713,14 @@ err_out:
2712 2713
2713void ar9170_unregister(struct ar9170 *ar) 2714void ar9170_unregister(struct ar9170 *ar)
2714{ 2715{
2716 if (ar->registered) {
2715#ifdef CONFIG_AR9170_LEDS 2717#ifdef CONFIG_AR9170_LEDS
2716 ar9170_unregister_leds(ar); 2718 ar9170_unregister_leds(ar);
2717#endif /* CONFIG_AR9170_LEDS */ 2719#endif /* CONFIG_AR9170_LEDS */
2718 2720
2719 kfree_skb(ar->rx_failover);
2720 ieee80211_unregister_hw(ar->hw); 2721 ieee80211_unregister_hw(ar->hw);
2722 }
2723
2724 kfree_skb(ar->rx_failover);
2721 mutex_destroy(&ar->mutex); 2725 mutex_destroy(&ar->mutex);
2722} 2726}
diff --git a/drivers/net/wireless/ath/ar9170/usb.c b/drivers/net/wireless/ath/ar9170/usb.c
index 0f361186b78f..4e30197afff6 100644
--- a/drivers/net/wireless/ath/ar9170/usb.c
+++ b/drivers/net/wireless/ath/ar9170/usb.c
@@ -582,43 +582,6 @@ static int ar9170_usb_upload(struct ar9170_usb *aru, const void *data,
582 return 0; 582 return 0;
583} 583}
584 584
585static int ar9170_usb_request_firmware(struct ar9170_usb *aru)
586{
587 int err = 0;
588
589 err = request_firmware(&aru->firmware, "ar9170.fw",
590 &aru->udev->dev);
591 if (!err) {
592 aru->init_values = NULL;
593 return 0;
594 }
595
596 if (aru->req_one_stage_fw) {
597 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
598 "not found and is required for this device\n");
599 return -EINVAL;
600 }
601
602 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
603 "not found, trying old firmware...\n");
604
605 err = request_firmware(&aru->init_values, "ar9170-1.fw",
606 &aru->udev->dev);
607 if (err) {
608 dev_err(&aru->udev->dev, "file with init values not found.\n");
609 return err;
610 }
611
612 err = request_firmware(&aru->firmware, "ar9170-2.fw", &aru->udev->dev);
613 if (err) {
614 release_firmware(aru->init_values);
615 dev_err(&aru->udev->dev, "firmware file not found.\n");
616 return err;
617 }
618
619 return err;
620}
621
622static int ar9170_usb_reset(struct ar9170_usb *aru) 585static int ar9170_usb_reset(struct ar9170_usb *aru)
623{ 586{
624 int ret, lock = (aru->intf->condition != USB_INTERFACE_BINDING); 587 int ret, lock = (aru->intf->condition != USB_INTERFACE_BINDING);
@@ -757,6 +720,103 @@ err_out:
757 return err; 720 return err;
758} 721}
759 722
723static void ar9170_usb_firmware_failed(struct ar9170_usb *aru)
724{
725 struct device *parent = aru->udev->dev.parent;
726
727 /* unbind anything failed */
728 if (parent)
729 down(&parent->sem);
730 device_release_driver(&aru->udev->dev);
731 if (parent)
732 up(&parent->sem);
733}
734
735static void ar9170_usb_firmware_finish(const struct firmware *fw, void *context)
736{
737 struct ar9170_usb *aru = context;
738 int err;
739
740 aru->firmware = fw;
741
742 if (!fw) {
743 dev_err(&aru->udev->dev, "firmware file not found.\n");
744 goto err_freefw;
745 }
746
747 err = ar9170_usb_init_device(aru);
748 if (err)
749 goto err_freefw;
750
751 err = ar9170_usb_open(&aru->common);
752 if (err)
753 goto err_unrx;
754
755 err = ar9170_register(&aru->common, &aru->udev->dev);
756
757 ar9170_usb_stop(&aru->common);
758 if (err)
759 goto err_unrx;
760
761 return;
762
763 err_unrx:
764 ar9170_usb_cancel_urbs(aru);
765
766 err_freefw:
767 ar9170_usb_firmware_failed(aru);
768}
769
770static void ar9170_usb_firmware_inits(const struct firmware *fw,
771 void *context)
772{
773 struct ar9170_usb *aru = context;
774 int err;
775
776 if (!fw) {
777 dev_err(&aru->udev->dev, "file with init values not found.\n");
778 ar9170_usb_firmware_failed(aru);
779 return;
780 }
781
782 aru->init_values = fw;
783
784 /* ok so we have the init values -- get code for two-stage */
785
786 err = request_firmware_nowait(THIS_MODULE, 1, "ar9170-2.fw",
787 &aru->udev->dev, GFP_KERNEL, aru,
788 ar9170_usb_firmware_finish);
789 if (err)
790 ar9170_usb_firmware_failed(aru);
791}
792
793static void ar9170_usb_firmware_step2(const struct firmware *fw, void *context)
794{
795 struct ar9170_usb *aru = context;
796 int err;
797
798 if (fw) {
799 ar9170_usb_firmware_finish(fw, context);
800 return;
801 }
802
803 if (aru->req_one_stage_fw) {
804 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
805 "not found and is required for this device\n");
806 ar9170_usb_firmware_failed(aru);
807 return;
808 }
809
810 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
811 "not found, trying old firmware...\n");
812
813 err = request_firmware_nowait(THIS_MODULE, 1, "ar9170-1.fw",
814 &aru->udev->dev, GFP_KERNEL, aru,
815 ar9170_usb_firmware_inits);
816 if (err)
817 ar9170_usb_firmware_failed(aru);
818}
819
760static bool ar9170_requires_one_stage(const struct usb_device_id *id) 820static bool ar9170_requires_one_stage(const struct usb_device_id *id)
761{ 821{
762 if (!id->driver_info) 822 if (!id->driver_info)
@@ -814,33 +874,9 @@ static int ar9170_usb_probe(struct usb_interface *intf,
814 if (err) 874 if (err)
815 goto err_freehw; 875 goto err_freehw;
816 876
817 err = ar9170_usb_request_firmware(aru); 877 return request_firmware_nowait(THIS_MODULE, 1, "ar9170.fw",
818 if (err) 878 &aru->udev->dev, GFP_KERNEL, aru,
819 goto err_freehw; 879 ar9170_usb_firmware_step2);
820
821 err = ar9170_usb_init_device(aru);
822 if (err)
823 goto err_freefw;
824
825 err = ar9170_usb_open(ar);
826 if (err)
827 goto err_unrx;
828
829 err = ar9170_register(ar, &udev->dev);
830
831 ar9170_usb_stop(ar);
832 if (err)
833 goto err_unrx;
834
835 return 0;
836
837err_unrx:
838 ar9170_usb_cancel_urbs(aru);
839
840err_freefw:
841 release_firmware(aru->init_values);
842 release_firmware(aru->firmware);
843
844err_freehw: 880err_freehw:
845 usb_set_intfdata(intf, NULL); 881 usb_set_intfdata(intf, NULL);
846 usb_put_dev(udev); 882 usb_put_dev(udev);
@@ -860,12 +896,12 @@ static void ar9170_usb_disconnect(struct usb_interface *intf)
860 ar9170_unregister(&aru->common); 896 ar9170_unregister(&aru->common);
861 ar9170_usb_cancel_urbs(aru); 897 ar9170_usb_cancel_urbs(aru);
862 898
863 release_firmware(aru->init_values);
864 release_firmware(aru->firmware);
865
866 usb_put_dev(aru->udev); 899 usb_put_dev(aru->udev);
867 usb_set_intfdata(intf, NULL); 900 usb_set_intfdata(intf, NULL);
868 ieee80211_free_hw(aru->common.hw); 901 ieee80211_free_hw(aru->common.hw);
902
903 release_firmware(aru->init_values);
904 release_firmware(aru->firmware);
869} 905}
870 906
871#ifdef CONFIG_PM 907#ifdef CONFIG_PM
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index 6a3f4da7fb48..10b52262b232 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -429,8 +429,8 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
429 ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f; 429 ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f;
430 430
431 AR5K_EEPROM_READ(o++, val); 431 AR5K_EEPROM_READ(o++, val);
432 ee->ee_i_cal[mode] = (val >> 8) & 0x3f; 432 ee->ee_i_cal[mode] = (val >> 5) & 0x3f;
433 ee->ee_q_cal[mode] = (val >> 3) & 0x1f; 433 ee->ee_q_cal[mode] = val & 0x1f;
434 434
435 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_2) { 435 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_2) {
436 AR5K_EEPROM_READ(o++, val); 436 AR5K_EEPROM_READ(o++, val);
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 72474c0ccaff..eff3323efb4b 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -1386,38 +1386,39 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
1386 goto done; 1386 goto done;
1387 1387
1388 /* Calibration has finished, get the results and re-run */ 1388 /* Calibration has finished, get the results and re-run */
1389
1390 /* work around empty results which can apparently happen on 5212 */
1389 for (i = 0; i <= 10; i++) { 1391 for (i = 0; i <= 10; i++) {
1390 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); 1392 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR);
1391 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); 1393 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I);
1392 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); 1394 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q);
1395 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1396 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr);
1397 if (i_pwr && q_pwr)
1398 break;
1393 } 1399 }
1394 1400
1395 i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7; 1401 i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7;
1396 q_coffd = q_pwr >> 7; 1402 q_coffd = q_pwr >> 7;
1397 1403
1398 /* No correction */ 1404 /* protect against divide by 0 and loss of sign bits */
1399 if (i_coffd == 0 || q_coffd == 0) 1405 if (i_coffd == 0 || q_coffd < 2)
1400 goto done; 1406 goto done;
1401 1407
1402 i_coff = ((-iq_corr) / i_coffd); 1408 i_coff = (-iq_corr) / i_coffd;
1403 1409 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */
1404 /* Boundary check */
1405 if (i_coff > 31)
1406 i_coff = 31;
1407 if (i_coff < -32)
1408 i_coff = -32;
1409 1410
1410 q_coff = (((s32)i_pwr / q_coffd) - 128); 1411 q_coff = (i_pwr / q_coffd) - 128;
1412 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1411 1413
1412 /* Boundary check */ 1414 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1413 if (q_coff > 15) 1415 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)",
1414 q_coff = 15; 1416 i_coff, q_coff, i_coffd, q_coffd);
1415 if (q_coff < -16)
1416 q_coff = -16;
1417 1417
1418 /* Commit new I/Q value */ 1418 /* Commit new I/Q values (set enable bit last to match HAL sources) */
1419 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE | 1419 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF, i_coff);
1420 ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); 1420 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF, q_coff);
1421 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE);
1421 1422
1422 /* Re-enable calibration -if we don't we'll commit 1423 /* Re-enable calibration -if we don't we'll commit
1423 * the same values again and again */ 1424 * the same values again and again */
@@ -1873,7 +1874,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1873 break; 1874 break;
1874 case AR5K_ANTMODE_FIXED_A: 1875 case AR5K_ANTMODE_FIXED_A:
1875 def_ant = 1; 1876 def_ant = 1;
1876 tx_ant = 0; 1877 tx_ant = 1;
1877 use_def_for_tx = true; 1878 use_def_for_tx = true;
1878 update_def_on_tx = false; 1879 update_def_on_tx = false;
1879 use_def_for_rts = true; 1880 use_def_for_rts = true;
@@ -1882,7 +1883,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1882 break; 1883 break;
1883 case AR5K_ANTMODE_FIXED_B: 1884 case AR5K_ANTMODE_FIXED_B:
1884 def_ant = 2; 1885 def_ant = 2;
1885 tx_ant = 0; 1886 tx_ant = 2;
1886 use_def_for_tx = true; 1887 use_def_for_tx = true;
1887 update_def_on_tx = false; 1888 update_def_on_tx = false;
1888 use_def_for_rts = true; 1889 use_def_for_rts = true;
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index 4cb9c5df9f46..1464f89b249c 100644
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -2187,6 +2187,7 @@
2187 */ 2187 */
2188#define AR5K_PHY_IQ 0x9920 /* Register Address */ 2188#define AR5K_PHY_IQ 0x9920 /* Register Address */
2189#define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */ 2189#define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */
2190#define AR5K_PHY_IQ_CORR_Q_Q_COFF_S 0
2190#define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */ 2191#define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */
2191#define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5 2192#define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5
2192#define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */ 2193#define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index a35a7db0fc4c..cbf28e379843 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -851,12 +851,15 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
851 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, 851 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1,
852 AR5K_INIT_CYCRSSI_THR1); 852 AR5K_INIT_CYCRSSI_THR1);
853 853
854 /* I/Q correction 854 /* I/Q correction (set enable bit last to match HAL sources) */
855 * TODO: Per channel i/q infos ? */ 855 /* TODO: Per channel i/q infos ? */
856 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, 856 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_0) {
857 AR5K_PHY_IQ_CORR_ENABLE | 857 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF,
858 (ee->ee_i_cal[ee_mode] << AR5K_PHY_IQ_CORR_Q_I_COFF_S) | 858 ee->ee_i_cal[ee_mode]);
859 ee->ee_q_cal[ee_mode]); 859 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF,
860 ee->ee_q_cal[ee_mode]);
861 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE);
862 }
860 863
861 /* Heavy clipping -disable for now */ 864 /* Heavy clipping -disable for now */
862 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_5_1) 865 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_5_1)
@@ -1379,11 +1382,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1379 ath5k_hw_set_sleep_clock(ah, true); 1382 ath5k_hw_set_sleep_clock(ah, true);
1380 1383
1381 /* 1384 /*
1382 * Disable beacons and reset the register 1385 * Disable beacons and reset the TSF
1383 */ 1386 */
1384 AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE | 1387 AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
1385 AR5K_BEACON_RESET_TSF); 1388 ath5k_hw_reset_tsf(ah);
1386
1387 return 0; 1389 return 0;
1388} 1390}
1389 1391
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index ac34a055c713..0e79e58cf4c9 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -1323,7 +1323,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,
1323 1323
1324static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, 1324static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1325 struct ieee80211_sta *sta, void *priv_sta, 1325 struct ieee80211_sta *sta, void *priv_sta,
1326 u32 changed) 1326 u32 changed, enum nl80211_channel_type oper_chan_type)
1327{ 1327{
1328 struct ath_softc *sc = priv; 1328 struct ath_softc *sc = priv;
1329 struct ath_rate_priv *ath_rc_priv = priv_sta; 1329 struct ath_rate_priv *ath_rc_priv = priv_sta;
@@ -1340,8 +1340,8 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1340 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1340 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1341 return; 1341 return;
1342 1342
1343 if (sc->hw->conf.channel_type == NL80211_CHAN_HT40MINUS || 1343 if (oper_chan_type == NL80211_CHAN_HT40MINUS ||
1344 sc->hw->conf.channel_type == NL80211_CHAN_HT40PLUS) 1344 oper_chan_type == NL80211_CHAN_HT40PLUS)
1345 oper_cw40 = true; 1345 oper_cw40 = true;
1346 1346
1347 oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? 1347 oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ?
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 47294f90bbe5..b2c8207f7bc1 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -2258,7 +2258,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
2258 if (ATH_TXQ_SETUP(sc, i)) { 2258 if (ATH_TXQ_SETUP(sc, i)) {
2259 txq = &sc->tx.txq[i]; 2259 txq = &sc->tx.txq[i];
2260 2260
2261 spin_lock(&txq->axq_lock); 2261 spin_lock_bh(&txq->axq_lock);
2262 2262
2263 list_for_each_entry_safe(ac, 2263 list_for_each_entry_safe(ac,
2264 ac_tmp, &txq->axq_acq, list) { 2264 ac_tmp, &txq->axq_acq, list) {
@@ -2279,7 +2279,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
2279 } 2279 }
2280 } 2280 }
2281 2281
2282 spin_unlock(&txq->axq_lock); 2282 spin_unlock_bh(&txq->axq_lock);
2283 } 2283 }
2284 } 2284 }
2285} 2285}
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index 63c2a7ade5fb..5c7aa1b1eb56 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -3177,14 +3177,27 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len)
3177 int total_nr = 0; 3177 int total_nr = 0;
3178 int i; 3178 int i;
3179 struct pci_pool *pool; 3179 struct pci_pool *pool;
3180 u32 *virts[CB_NUMBER_OF_ELEMENTS_SMALL]; 3180 void **virts;
3181 dma_addr_t phys[CB_NUMBER_OF_ELEMENTS_SMALL]; 3181 dma_addr_t *phys;
3182 3182
3183 IPW_DEBUG_TRACE("<< : \n"); 3183 IPW_DEBUG_TRACE("<< : \n");
3184 3184
3185 virts = kmalloc(sizeof(void *) * CB_NUMBER_OF_ELEMENTS_SMALL,
3186 GFP_KERNEL);
3187 if (!virts)
3188 return -ENOMEM;
3189
3190 phys = kmalloc(sizeof(dma_addr_t) * CB_NUMBER_OF_ELEMENTS_SMALL,
3191 GFP_KERNEL);
3192 if (!phys) {
3193 kfree(virts);
3194 return -ENOMEM;
3195 }
3185 pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0); 3196 pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0);
3186 if (!pool) { 3197 if (!pool) {
3187 IPW_ERROR("pci_pool_create failed\n"); 3198 IPW_ERROR("pci_pool_create failed\n");
3199 kfree(phys);
3200 kfree(virts);
3188 return -ENOMEM; 3201 return -ENOMEM;
3189 } 3202 }
3190 3203
@@ -3254,6 +3267,8 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len)
3254 pci_pool_free(pool, virts[i], phys[i]); 3267 pci_pool_free(pool, virts[i], phys[i]);
3255 3268
3256 pci_pool_destroy(pool); 3269 pci_pool_destroy(pool);
3270 kfree(phys);
3271 kfree(virts);
3257 3272
3258 return ret; 3273 return ret;
3259} 3274}
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h
index bf45391172f3..a6d5e42647e4 100644
--- a/drivers/net/wireless/ipw2x00/libipw.h
+++ b/drivers/net/wireless/ipw2x00/libipw.h
@@ -797,7 +797,7 @@ struct libipw_device {
797 /* Probe / Beacon management */ 797 /* Probe / Beacon management */
798 struct list_head network_free_list; 798 struct list_head network_free_list;
799 struct list_head network_list; 799 struct list_head network_list;
800 struct libipw_network *networks; 800 struct libipw_network *networks[MAX_NETWORK_COUNT];
801 int scans; 801 int scans;
802 int scan_age; 802 int scan_age;
803 803
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c
index 1ae0b2b02c38..2fa55867bd8b 100644
--- a/drivers/net/wireless/ipw2x00/libipw_module.c
+++ b/drivers/net/wireless/ipw2x00/libipw_module.c
@@ -67,16 +67,17 @@ void *libipw_wiphy_privid = &libipw_wiphy_privid;
67 67
68static int libipw_networks_allocate(struct libipw_device *ieee) 68static int libipw_networks_allocate(struct libipw_device *ieee)
69{ 69{
70 if (ieee->networks) 70 int i, j;
71 return 0; 71
72 72 for (i = 0; i < MAX_NETWORK_COUNT; i++) {
73 ieee->networks = 73 ieee->networks[i] = kzalloc(sizeof(struct libipw_network),
74 kzalloc(MAX_NETWORK_COUNT * sizeof(struct libipw_network), 74 GFP_KERNEL);
75 GFP_KERNEL); 75 if (!ieee->networks[i]) {
76 if (!ieee->networks) { 76 LIBIPW_ERROR("Out of memory allocating beacons\n");
77 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 77 for (j = 0; j < i; j++)
78 ieee->dev->name); 78 kfree(ieee->networks[j]);
79 return -ENOMEM; 79 return -ENOMEM;
80 }
80 } 81 }
81 82
82 return 0; 83 return 0;
@@ -97,15 +98,11 @@ static inline void libipw_networks_free(struct libipw_device *ieee)
97{ 98{
98 int i; 99 int i;
99 100
100 if (!ieee->networks) 101 for (i = 0; i < MAX_NETWORK_COUNT; i++) {
101 return; 102 if (ieee->networks[i]->ibss_dfs)
102 103 kfree(ieee->networks[i]->ibss_dfs);
103 for (i = 0; i < MAX_NETWORK_COUNT; i++) 104 kfree(ieee->networks[i]);
104 if (ieee->networks[i].ibss_dfs) 105 }
105 kfree(ieee->networks[i].ibss_dfs);
106
107 kfree(ieee->networks);
108 ieee->networks = NULL;
109} 106}
110 107
111void libipw_networks_age(struct libipw_device *ieee, 108void libipw_networks_age(struct libipw_device *ieee,
@@ -130,7 +127,7 @@ static void libipw_networks_initialize(struct libipw_device *ieee)
130 INIT_LIST_HEAD(&ieee->network_free_list); 127 INIT_LIST_HEAD(&ieee->network_free_list);
131 INIT_LIST_HEAD(&ieee->network_list); 128 INIT_LIST_HEAD(&ieee->network_list);
132 for (i = 0; i < MAX_NETWORK_COUNT; i++) 129 for (i = 0; i < MAX_NETWORK_COUNT; i++)
133 list_add_tail(&ieee->networks[i].list, 130 list_add_tail(&ieee->networks[i]->list,
134 &ieee->network_free_list); 131 &ieee->network_free_list);
135} 132}
136 133
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index 303cc8193adc..e0678d921055 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -184,7 +184,7 @@ static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
184{ 184{
185 int idx; 185 int idx;
186 186
187 for (idx = 0; idx < IWL_RATE_COUNT; idx++) 187 for (idx = 0; idx < IWL_RATE_COUNT_3945; idx++)
188 if (iwl3945_rates[idx].plcp == plcp) 188 if (iwl3945_rates[idx].plcp == plcp)
189 return idx; 189 return idx;
190 return -1; 190 return -1;
@@ -805,7 +805,7 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
805 int sta_id, int tx_id) 805 int sta_id, int tx_id)
806{ 806{
807 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value; 807 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
808 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1); 808 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT_3945);
809 u16 rate_mask; 809 u16 rate_mask;
810 int rate; 810 int rate;
811 u8 rts_retry_limit; 811 u8 rts_retry_limit;
@@ -2146,7 +2146,7 @@ static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv)
2146 2146
2147 /* fill in channel group's nominal powers for each rate */ 2147 /* fill in channel group's nominal powers for each rate */
2148 for (rate_index = 0; 2148 for (rate_index = 0;
2149 rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) { 2149 rate_index < IWL_RATE_COUNT_3945; rate_index++, clip_pwrs++) {
2150 switch (rate_index) { 2150 switch (rate_index) {
2151 case IWL_RATE_36M_INDEX_TABLE: 2151 case IWL_RATE_36M_INDEX_TABLE:
2152 if (i == 0) /* B/G */ 2152 if (i == 0) /* B/G */
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 6aeb82b6992f..818367b57bab 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1463,59 +1463,66 @@ static void iwl_nic_start(struct iwl_priv *priv)
1463} 1463}
1464 1464
1465 1465
1466static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1467static int iwl_mac_setup_register(struct iwl_priv *priv);
1468
1469static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1470{
1471 const char *name_pre = priv->cfg->fw_name_pre;
1472
1473 if (first)
1474 priv->fw_index = priv->cfg->ucode_api_max;
1475 else
1476 priv->fw_index--;
1477
1478 if (priv->fw_index < priv->cfg->ucode_api_min) {
1479 IWL_ERR(priv, "no suitable firmware found!\n");
1480 return -ENOENT;
1481 }
1482
1483 sprintf(priv->firmware_name, "%s%d%s",
1484 name_pre, priv->fw_index, ".ucode");
1485
1486 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1487 priv->firmware_name);
1488
1489 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1490 &priv->pci_dev->dev, GFP_KERNEL, priv,
1491 iwl_ucode_callback);
1492}
1493
1466/** 1494/**
1467 * iwl_read_ucode - Read uCode images from disk file. 1495 * iwl_ucode_callback - callback when firmware was loaded
1468 * 1496 *
1469 * Copy into buffers for card to fetch via bus-mastering 1497 * If loaded successfully, copies the firmware into buffers
1498 * for the card to fetch (via DMA).
1470 */ 1499 */
1471static int iwl_read_ucode(struct iwl_priv *priv) 1500static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1472{ 1501{
1502 struct iwl_priv *priv = context;
1473 struct iwl_ucode_header *ucode; 1503 struct iwl_ucode_header *ucode;
1474 int ret = -EINVAL, index;
1475 const struct firmware *ucode_raw;
1476 const char *name_pre = priv->cfg->fw_name_pre;
1477 const unsigned int api_max = priv->cfg->ucode_api_max; 1504 const unsigned int api_max = priv->cfg->ucode_api_max;
1478 const unsigned int api_min = priv->cfg->ucode_api_min; 1505 const unsigned int api_min = priv->cfg->ucode_api_min;
1479 char buf[25];
1480 u8 *src; 1506 u8 *src;
1481 size_t len; 1507 size_t len;
1482 u32 api_ver, build; 1508 u32 api_ver, build;
1483 u32 inst_size, data_size, init_size, init_data_size, boot_size; 1509 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1510 int err;
1484 u16 eeprom_ver; 1511 u16 eeprom_ver;
1485 1512
1486 /* Ask kernel firmware_class module to get the boot firmware off disk. 1513 if (!ucode_raw) {
1487 * request_firmware() is synchronous, file is in memory on return. */ 1514 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1488 for (index = api_max; index >= api_min; index--) { 1515 priv->firmware_name);
1489 sprintf(buf, "%s%d%s", name_pre, index, ".ucode"); 1516 goto try_again;
1490 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1491 if (ret < 0) {
1492 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1493 buf, ret);
1494 if (ret == -ENOENT)
1495 continue;
1496 else
1497 goto error;
1498 } else {
1499 if (index < api_max)
1500 IWL_ERR(priv, "Loaded firmware %s, "
1501 "which is deprecated. "
1502 "Please use API v%u instead.\n",
1503 buf, api_max);
1504
1505 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1506 buf, ucode_raw->size);
1507 break;
1508 }
1509 } 1517 }
1510 1518
1511 if (ret < 0) 1519 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1512 goto error; 1520 priv->firmware_name, ucode_raw->size);
1513 1521
1514 /* Make sure that we got at least the v1 header! */ 1522 /* Make sure that we got at least the v1 header! */
1515 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) { 1523 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1516 IWL_ERR(priv, "File size way too small!\n"); 1524 IWL_ERR(priv, "File size way too small!\n");
1517 ret = -EINVAL; 1525 goto try_again;
1518 goto err_release;
1519 } 1526 }
1520 1527
1521 /* Data from ucode file: header followed by uCode images */ 1528 /* Data from ucode file: header followed by uCode images */
@@ -1540,10 +1547,9 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1540 IWL_ERR(priv, "Driver unable to support your firmware API. " 1547 IWL_ERR(priv, "Driver unable to support your firmware API. "
1541 "Driver supports v%u, firmware is v%u.\n", 1548 "Driver supports v%u, firmware is v%u.\n",
1542 api_max, api_ver); 1549 api_max, api_ver);
1543 priv->ucode_ver = 0; 1550 goto try_again;
1544 ret = -EINVAL;
1545 goto err_release;
1546 } 1551 }
1552
1547 if (api_ver != api_max) 1553 if (api_ver != api_max)
1548 IWL_ERR(priv, "Firmware has old API version. Expected v%u, " 1554 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1549 "got v%u. New firmware can be obtained " 1555 "got v%u. New firmware can be obtained "
@@ -1585,6 +1591,12 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1585 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n", 1591 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1586 boot_size); 1592 boot_size);
1587 1593
1594 /*
1595 * For any of the failures below (before allocating pci memory)
1596 * we will try to load a version with a smaller API -- maybe the
1597 * user just got a corrupted version of the latest API.
1598 */
1599
1588 /* Verify size of file vs. image size info in file's header */ 1600 /* Verify size of file vs. image size info in file's header */
1589 if (ucode_raw->size != 1601 if (ucode_raw->size !=
1590 priv->cfg->ops->ucode->get_header_size(api_ver) + 1602 priv->cfg->ops->ucode->get_header_size(api_ver) +
@@ -1594,41 +1606,35 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1594 IWL_DEBUG_INFO(priv, 1606 IWL_DEBUG_INFO(priv,
1595 "uCode file size %d does not match expected size\n", 1607 "uCode file size %d does not match expected size\n",
1596 (int)ucode_raw->size); 1608 (int)ucode_raw->size);
1597 ret = -EINVAL; 1609 goto try_again;
1598 goto err_release;
1599 } 1610 }
1600 1611
1601 /* Verify that uCode images will fit in card's SRAM */ 1612 /* Verify that uCode images will fit in card's SRAM */
1602 if (inst_size > priv->hw_params.max_inst_size) { 1613 if (inst_size > priv->hw_params.max_inst_size) {
1603 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n", 1614 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1604 inst_size); 1615 inst_size);
1605 ret = -EINVAL; 1616 goto try_again;
1606 goto err_release;
1607 } 1617 }
1608 1618
1609 if (data_size > priv->hw_params.max_data_size) { 1619 if (data_size > priv->hw_params.max_data_size) {
1610 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n", 1620 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1611 data_size); 1621 data_size);
1612 ret = -EINVAL; 1622 goto try_again;
1613 goto err_release;
1614 } 1623 }
1615 if (init_size > priv->hw_params.max_inst_size) { 1624 if (init_size > priv->hw_params.max_inst_size) {
1616 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n", 1625 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1617 init_size); 1626 init_size);
1618 ret = -EINVAL; 1627 goto try_again;
1619 goto err_release;
1620 } 1628 }
1621 if (init_data_size > priv->hw_params.max_data_size) { 1629 if (init_data_size > priv->hw_params.max_data_size) {
1622 IWL_INFO(priv, "uCode init data len %d too large to fit in\n", 1630 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1623 init_data_size); 1631 init_data_size);
1624 ret = -EINVAL; 1632 goto try_again;
1625 goto err_release;
1626 } 1633 }
1627 if (boot_size > priv->hw_params.max_bsm_size) { 1634 if (boot_size > priv->hw_params.max_bsm_size) {
1628 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n", 1635 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1629 boot_size); 1636 boot_size);
1630 ret = -EINVAL; 1637 goto try_again;
1631 goto err_release;
1632 } 1638 }
1633 1639
1634 /* Allocate ucode buffers for card's bus-master loading ... */ 1640 /* Allocate ucode buffers for card's bus-master loading ... */
@@ -1712,20 +1718,36 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1712 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len); 1718 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1713 memcpy(priv->ucode_boot.v_addr, src, len); 1719 memcpy(priv->ucode_boot.v_addr, src, len);
1714 1720
1721 /**************************************************
1722 * This is still part of probe() in a sense...
1723 *
1724 * 9. Setup and register with mac80211 and debugfs
1725 **************************************************/
1726 err = iwl_mac_setup_register(priv);
1727 if (err)
1728 goto out_unbind;
1729
1730 err = iwl_dbgfs_register(priv, DRV_NAME);
1731 if (err)
1732 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1733
1715 /* We have our copies now, allow OS release its copies */ 1734 /* We have our copies now, allow OS release its copies */
1716 release_firmware(ucode_raw); 1735 release_firmware(ucode_raw);
1717 return 0; 1736 return;
1737
1738 try_again:
1739 /* try next, if any */
1740 if (iwl_request_firmware(priv, false))
1741 goto out_unbind;
1742 release_firmware(ucode_raw);
1743 return;
1718 1744
1719 err_pci_alloc: 1745 err_pci_alloc:
1720 IWL_ERR(priv, "failed to allocate pci memory\n"); 1746 IWL_ERR(priv, "failed to allocate pci memory\n");
1721 ret = -ENOMEM;
1722 iwl_dealloc_ucode_pci(priv); 1747 iwl_dealloc_ucode_pci(priv);
1723 1748 out_unbind:
1724 err_release: 1749 device_release_driver(&priv->pci_dev->dev);
1725 release_firmware(ucode_raw); 1750 release_firmware(ucode_raw);
1726
1727 error:
1728 return ret;
1729} 1751}
1730 1752
1731static const char *desc_lookup_text[] = { 1753static const char *desc_lookup_text[] = {
@@ -2631,7 +2653,7 @@ static int iwl_mac_setup_register(struct iwl_priv *priv)
2631 */ 2653 */
2632 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 2654 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2633 2655
2634 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX + 1; 2656 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2635 /* we create the 802.11 header and a zero-length SSID element */ 2657 /* we create the 802.11 header and a zero-length SSID element */
2636 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2; 2658 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2637 2659
@@ -2667,21 +2689,7 @@ static int iwl_mac_start(struct ieee80211_hw *hw)
2667 2689
2668 /* we should be verifying the device is ready to be opened */ 2690 /* we should be verifying the device is ready to be opened */
2669 mutex_lock(&priv->mutex); 2691 mutex_lock(&priv->mutex);
2670
2671 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2672 * ucode filename and max sizes are card-specific. */
2673
2674 if (!priv->ucode_code.len) {
2675 ret = iwl_read_ucode(priv);
2676 if (ret) {
2677 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2678 mutex_unlock(&priv->mutex);
2679 return ret;
2680 }
2681 }
2682
2683 ret = __iwl_up(priv); 2692 ret = __iwl_up(priv);
2684
2685 mutex_unlock(&priv->mutex); 2693 mutex_unlock(&priv->mutex);
2686 2694
2687 if (ret) 2695 if (ret)
@@ -3654,17 +3662,10 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3654 iwl_power_initialize(priv); 3662 iwl_power_initialize(priv);
3655 iwl_tt_initialize(priv); 3663 iwl_tt_initialize(priv);
3656 3664
3657 /************************************************** 3665 err = iwl_request_firmware(priv, true);
3658 * 9. Setup and register with mac80211 and debugfs
3659 **************************************************/
3660 err = iwl_mac_setup_register(priv);
3661 if (err) 3666 if (err)
3662 goto out_remove_sysfs; 3667 goto out_remove_sysfs;
3663 3668
3664 err = iwl_dbgfs_register(priv, DRV_NAME);
3665 if (err)
3666 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3667
3668 return 0; 3669 return 0;
3669 3670
3670 out_remove_sysfs: 3671 out_remove_sysfs:
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index ab891b958042..6054c5fba0c1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -1132,6 +1132,7 @@ struct iwl_priv {
1132 u8 rev_id; 1132 u8 rev_id;
1133 1133
1134 /* uCode images, save to reload in case of failure */ 1134 /* uCode images, save to reload in case of failure */
1135 int fw_index; /* firmware we're trying to load */
1135 u32 ucode_ver; /* version of ucode, copy of 1136 u32 ucode_ver; /* version of ucode, copy of
1136 iwl_ucode.ver */ 1137 iwl_ucode.ver */
1137 struct fw_desc ucode_code; /* runtime inst */ 1138 struct fw_desc ucode_code; /* runtime inst */
@@ -1142,6 +1143,7 @@ struct iwl_priv {
1142 struct fw_desc ucode_boot; /* bootstrap inst */ 1143 struct fw_desc ucode_boot; /* bootstrap inst */
1143 enum ucode_type ucode_type; 1144 enum ucode_type ucode_type;
1144 u8 ucode_write_complete; /* the image write is complete */ 1145 u8 ucode_write_complete; /* the image write is complete */
1146 char firmware_name[25];
1145 1147
1146 1148
1147 struct iwl_rxon_time_cmd rxon_timing; 1149 struct iwl_rxon_time_cmd rxon_timing;
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index dd9ff2ed645a..bd2f7c420563 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -638,20 +638,9 @@ u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame,
638 if (left < 0) 638 if (left < 0)
639 return 0; 639 return 0;
640 *pos++ = WLAN_EID_SSID; 640 *pos++ = WLAN_EID_SSID;
641 if (!priv->is_internal_short_scan && 641 *pos++ = 0;
642 priv->scan_request->n_ssids) { 642
643 struct cfg80211_ssid *ssid = 643 len += 2;
644 priv->scan_request->ssids;
645
646 /* Broadcast if ssid_len is 0 */
647 *pos++ = ssid->ssid_len;
648 memcpy(pos, ssid->ssid, ssid->ssid_len);
649 pos += ssid->ssid_len;
650 len += 2 + ssid->ssid_len;
651 } else {
652 *pos++ = 0;
653 len += 2;
654 }
655 644
656 if (WARN_ON(left < ie_len)) 645 if (WARN_ON(left < ie_len))
657 return len; 646 return len;
@@ -780,26 +769,20 @@ static void iwl_bg_request_scan(struct work_struct *data)
780 if (priv->is_internal_short_scan) { 769 if (priv->is_internal_short_scan) {
781 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n"); 770 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
782 } else if (priv->scan_request->n_ssids) { 771 } else if (priv->scan_request->n_ssids) {
772 int i, p = 0;
783 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n"); 773 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
784 /* 774 for (i = 0; i < priv->scan_request->n_ssids; i++) {
785 * The first SSID to scan is stuffed into the probe request 775 /* always does wildcard anyway */
786 * template and the remaining ones are handled through the 776 if (!priv->scan_request->ssids[i].ssid_len)
787 * direct_scan array. 777 continue;
788 */ 778 scan->direct_scan[p].id = WLAN_EID_SSID;
789 if (priv->scan_request->n_ssids > 1) { 779 scan->direct_scan[p].len =
790 int i, p = 0; 780 priv->scan_request->ssids[i].ssid_len;
791 for (i = 1; i < priv->scan_request->n_ssids; i++) { 781 memcpy(scan->direct_scan[p].ssid,
792 if (!priv->scan_request->ssids[i].ssid_len) 782 priv->scan_request->ssids[i].ssid,
793 continue; 783 priv->scan_request->ssids[i].ssid_len);
794 scan->direct_scan[p].id = WLAN_EID_SSID; 784 n_probes++;
795 scan->direct_scan[p].len = 785 p++;
796 priv->scan_request->ssids[i].ssid_len;
797 memcpy(scan->direct_scan[p].ssid,
798 priv->scan_request->ssids[i].ssid,
799 priv->scan_request->ssids[i].ssid_len);
800 n_probes++;
801 p++;
802 }
803 } 786 }
804 is_active = true; 787 is_active = true;
805 } else 788 } else
diff --git a/drivers/net/wireless/iwmc3200wifi/lmac.h b/drivers/net/wireless/iwmc3200wifi/lmac.h
index a3a79b5e2898..a855a99e49b8 100644
--- a/drivers/net/wireless/iwmc3200wifi/lmac.h
+++ b/drivers/net/wireless/iwmc3200wifi/lmac.h
@@ -262,7 +262,7 @@ struct iwm_ct_kill_cfg_cmd {
262 262
263/* Power Management */ 263/* Power Management */
264#define POWER_TABLE_CMD 0x77 264#define POWER_TABLE_CMD 0x77
265#define SAVE_RESTORE_ADRESS_CMD 0x78 265#define SAVE_RESTORE_ADDRESS_CMD 0x78
266#define REPLY_WATERMARK_CMD 0x79 266#define REPLY_WATERMARK_CMD 0x79
267#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B 267#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B
268#define PD_FLUSH_N_NOTIFICATION 0x7C 268#define PD_FLUSH_N_NOTIFICATION 0x7C
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c
index 9f6d6bf06b8e..2887047069f2 100644
--- a/drivers/net/wireless/rndis_wlan.c
+++ b/drivers/net/wireless/rndis_wlan.c
@@ -1496,51 +1496,67 @@ static void set_multicast_list(struct usbnet *usbdev)
1496{ 1496{
1497 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); 1497 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
1498 struct dev_mc_list *mclist; 1498 struct dev_mc_list *mclist;
1499 __le32 filter; 1499 __le32 filter, basefilter;
1500 int ret, i, size; 1500 int ret;
1501 char *buf; 1501 char *mc_addrs = NULL;
1502 int mc_count;
1502 1503
1503 filter = RNDIS_PACKET_TYPE_DIRECTED | RNDIS_PACKET_TYPE_BROADCAST; 1504 basefilter = filter = RNDIS_PACKET_TYPE_DIRECTED |
1505 RNDIS_PACKET_TYPE_BROADCAST;
1504 1506
1505 netif_addr_lock_bh(usbdev->net);
1506 if (usbdev->net->flags & IFF_PROMISC) { 1507 if (usbdev->net->flags & IFF_PROMISC) {
1507 filter |= RNDIS_PACKET_TYPE_PROMISCUOUS | 1508 filter |= RNDIS_PACKET_TYPE_PROMISCUOUS |
1508 RNDIS_PACKET_TYPE_ALL_LOCAL; 1509 RNDIS_PACKET_TYPE_ALL_LOCAL;
1509 } else if (usbdev->net->flags & IFF_ALLMULTI || 1510 } else if (usbdev->net->flags & IFF_ALLMULTI) {
1510 netdev_mc_count(usbdev->net) > priv->multicast_size) { 1511 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;
1512 }
1513
1514 if (filter != basefilter)
1515 goto set_filter;
1516
1517 /*
1518 * mc_list should be accessed holding the lock, so copy addresses to
1519 * local buffer first.
1520 */
1521 netif_addr_lock_bh(usbdev->net);
1522 mc_count = netdev_mc_count(usbdev->net);
1523 if (mc_count > priv->multicast_size) {
1511 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST; 1524 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;
1512 } else if (!netdev_mc_empty(usbdev->net)) { 1525 } else if (mc_count) {
1513 size = min(priv->multicast_size, netdev_mc_count(usbdev->net)); 1526 int i = 0;
1514 buf = kmalloc(size * ETH_ALEN, GFP_KERNEL); 1527
1515 if (!buf) { 1528 mc_addrs = kmalloc(mc_count * ETH_ALEN, GFP_ATOMIC);
1529 if (!mc_addrs) {
1516 netdev_warn(usbdev->net, 1530 netdev_warn(usbdev->net,
1517 "couldn't alloc %d bytes of memory\n", 1531 "couldn't alloc %d bytes of memory\n",
1518 size * ETH_ALEN); 1532 mc_count * ETH_ALEN);
1519 netif_addr_unlock_bh(usbdev->net); 1533 netif_addr_unlock_bh(usbdev->net);
1520 return; 1534 return;
1521 } 1535 }
1522 1536
1523 i = 0; 1537 netdev_for_each_mc_addr(mclist, usbdev->net)
1524 netdev_for_each_mc_addr(mclist, usbdev->net) { 1538 memcpy(mc_addrs + i++ * ETH_ALEN,
1525 if (i == size) 1539 mclist->dmi_addr, ETH_ALEN);
1526 break; 1540 }
1527 memcpy(buf + i++ * ETH_ALEN, mclist->dmi_addr, ETH_ALEN); 1541 netif_addr_unlock_bh(usbdev->net);
1528 }
1529 1542
1530 ret = rndis_set_oid(usbdev, OID_802_3_MULTICAST_LIST, buf, 1543 if (filter != basefilter)
1531 i * ETH_ALEN); 1544 goto set_filter;
1532 if (ret == 0 && i > 0) 1545
1546 if (mc_count) {
1547 ret = rndis_set_oid(usbdev, OID_802_3_MULTICAST_LIST, mc_addrs,
1548 mc_count * ETH_ALEN);
1549 kfree(mc_addrs);
1550 if (ret == 0)
1533 filter |= RNDIS_PACKET_TYPE_MULTICAST; 1551 filter |= RNDIS_PACKET_TYPE_MULTICAST;
1534 else 1552 else
1535 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST; 1553 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;
1536 1554
1537 netdev_dbg(usbdev->net, "OID_802_3_MULTICAST_LIST(%d, max: %d) -> %d\n", 1555 netdev_dbg(usbdev->net, "OID_802_3_MULTICAST_LIST(%d, max: %d) -> %d\n",
1538 i, priv->multicast_size, ret); 1556 mc_count, priv->multicast_size, ret);
1539
1540 kfree(buf);
1541 } 1557 }
1542 netif_addr_unlock_bh(usbdev->net);
1543 1558
1559set_filter:
1544 ret = rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &filter, 1560 ret = rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &filter,
1545 sizeof(filter)); 1561 sizeof(filter));
1546 if (ret < 0) { 1562 if (ret < 0) {
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index ee34c137e7cd..9b04964deced 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -368,7 +368,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
368 368
369 /* 369 /*
370 * The encryption key doesn't fit within the CSR cache, 370 * The encryption key doesn't fit within the CSR cache,
371 * this means we should allocate it seperately and use 371 * this means we should allocate it separately and use
372 * rt2x00usb_vendor_request() to send the key to the hardware. 372 * rt2x00usb_vendor_request() to send the key to the hardware.
373 */ 373 */
374 reg = KEY_ENTRY(key->hw_key_idx); 374 reg = KEY_ENTRY(key->hw_key_idx);
@@ -382,7 +382,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
382 /* 382 /*
383 * The driver does not support the IV/EIV generation 383 * The driver does not support the IV/EIV generation
384 * in hardware. However it demands the data to be provided 384 * in hardware. However it demands the data to be provided
385 * both seperately as well as inside the frame. 385 * both separately as well as inside the frame.
386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib 386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
387 * to ensure rt2x00lib will not strip the data from the 387 * to ensure rt2x00lib will not strip the data from the
388 * frame after the copy, now we must tell mac80211 388 * frame after the copy, now we must tell mac80211
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index aca8c124f434..91cce2d0f6db 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -1225,7 +1225,7 @@ MODULE_LICENSE("GPL");
1225#ifdef CONFIG_RT2800PCI_SOC 1225#ifdef CONFIG_RT2800PCI_SOC
1226static int rt2800soc_probe(struct platform_device *pdev) 1226static int rt2800soc_probe(struct platform_device *pdev)
1227{ 1227{
1228 return rt2x00soc_probe(pdev, rt2800pci_ops); 1228 return rt2x00soc_probe(pdev, &rt2800pci_ops);
1229} 1229}
1230 1230
1231static struct platform_driver rt2800soc_driver = { 1231static struct platform_driver rt2800soc_driver = {
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 5e4ee2023fcf..d27d7d5d850c 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -99,7 +99,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
99 * There are 2 variations of the rt2870 firmware. 99 * There are 2 variations of the rt2870 firmware.
100 * a) size: 4kb 100 * a) size: 4kb
101 * b) size: 8kb 101 * b) size: 8kb
102 * Note that (b) contains 2 seperate firmware blobs of 4k 102 * Note that (b) contains 2 separate firmware blobs of 4k
103 * within the file. The first blob is the same firmware as (a), 103 * within the file. The first blob is the same firmware as (a),
104 * but the second blob is for the additional chipsets. 104 * but the second blob is for the additional chipsets.
105 */ 105 */
@@ -117,7 +117,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
117 117
118 /* 118 /*
119 * 8kb firmware files must be checked as if it were 119 * 8kb firmware files must be checked as if it were
120 * 2 seperate firmware files. 120 * 2 separate firmware files.
121 */ 121 */
122 while (offset < len) { 122 while (offset < len) {
123 if (!rt2800usb_check_crc(data + offset, 4096)) 123 if (!rt2800usb_check_crc(data + offset, 4096))
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c
index 70c04c282efc..28a1c46ec4eb 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.c
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.c
@@ -109,7 +109,7 @@ struct rt2x00debug_intf {
109 109
110 /* 110 /*
111 * HW crypto statistics. 111 * HW crypto statistics.
112 * All statistics are stored seperately per cipher type. 112 * All statistics are stored separately per cipher type.
113 */ 113 */
114 struct rt2x00debug_crypto crypto_stats[CIPHER_MAX]; 114 struct rt2x00debug_crypto crypto_stats[CIPHER_MAX];
115 115
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index b93731b79903..dd5ab8fe2321 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -394,7 +394,7 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
394 /* 394 /*
395 * Hardware might have stripped the IV/EIV/ICV data, 395 * Hardware might have stripped the IV/EIV/ICV data,
396 * in that case it is possible that the data was 396 * in that case it is possible that the data was
397 * provided seperately (through hardware descriptor) 397 * provided separately (through hardware descriptor)
398 * in which case we should reinsert the data into the frame. 398 * in which case we should reinsert the data into the frame.
399 */ 399 */
400 if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) && 400 if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) &&
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index 0b4801a14601..5b6b789cad3d 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -497,7 +497,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
497 /* 497 /*
498 * When hardware encryption is supported, and this frame 498 * When hardware encryption is supported, and this frame
499 * is to be encrypted, we should strip the IV/EIV data from 499 * is to be encrypted, we should strip the IV/EIV data from
500 * the frame so we can provide it to the driver seperately. 500 * the frame so we can provide it to the driver separately.
501 */ 501 */
502 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) && 502 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
503 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) { 503 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
diff --git a/drivers/net/wireless/rt2x00/rt2x00soc.c b/drivers/net/wireless/rt2x00/rt2x00soc.c
index 4efdc96010f6..111c0ff5c6c7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00soc.c
+++ b/drivers/net/wireless/rt2x00/rt2x00soc.c
@@ -112,6 +112,7 @@ exit_free_device:
112 112
113 return retval; 113 return retval;
114} 114}
115EXPORT_SYMBOL_GPL(rt2x00soc_probe);
115 116
116int rt2x00soc_remove(struct platform_device *pdev) 117int rt2x00soc_remove(struct platform_device *pdev)
117{ 118{
diff --git a/drivers/net/wireless/rt2x00/rt2x00soc.h b/drivers/net/wireless/rt2x00/rt2x00soc.h
index 4739edfe2f00..474cbfc1efc7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00soc.h
+++ b/drivers/net/wireless/rt2x00/rt2x00soc.h
@@ -26,8 +26,6 @@
26#ifndef RT2X00SOC_H 26#ifndef RT2X00SOC_H
27#define RT2X00SOC_H 27#define RT2X00SOC_H
28 28
29#define KSEG1ADDR(__ptr) __ptr
30
31/* 29/*
32 * SoC driver handlers. 30 * SoC driver handlers.
33 */ 31 */
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index e2da928dd9f0..177472742172 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -476,7 +476,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
476 * The driver does not support the IV/EIV generation 476 * The driver does not support the IV/EIV generation
477 * in hardware. However it doesn't support the IV/EIV 477 * in hardware. However it doesn't support the IV/EIV
478 * inside the ieee80211 frame either, but requires it 478 * inside the ieee80211 frame either, but requires it
479 * to be provided seperately for the descriptor. 479 * to be provided separately for the descriptor.
480 * rt2x00lib will cut the IV/EIV data out of all frames 480 * rt2x00lib will cut the IV/EIV data out of all frames
481 * given to us by mac80211, but we must tell mac80211 481 * given to us by mac80211, but we must tell mac80211
482 * to generate the IV/EIV data. 482 * to generate the IV/EIV data.
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index f39a8ed17841..290d70bc5d22 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -339,7 +339,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
339 * The driver does not support the IV/EIV generation 339 * The driver does not support the IV/EIV generation
340 * in hardware. However it doesn't support the IV/EIV 340 * in hardware. However it doesn't support the IV/EIV
341 * inside the ieee80211 frame either, but requires it 341 * inside the ieee80211 frame either, but requires it
342 * to be provided seperately for the descriptor. 342 * to be provided separately for the descriptor.
343 * rt2x00lib will cut the IV/EIV data out of all frames 343 * rt2x00lib will cut the IV/EIV data out of all frames
344 * given to us by mac80211, but we must tell mac80211 344 * given to us by mac80211, but we must tell mac80211
345 * to generate the IV/EIV data. 345 * to generate the IV/EIV data.
@@ -439,7 +439,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
439 * The driver does not support the IV/EIV generation 439 * The driver does not support the IV/EIV generation
440 * in hardware. However it doesn't support the IV/EIV 440 * in hardware. However it doesn't support the IV/EIV
441 * inside the ieee80211 frame either, but requires it 441 * inside the ieee80211 frame either, but requires it
442 * to be provided seperately for the descriptor. 442 * to be provided separately for the descriptor.
443 * rt2x00lib will cut the IV/EIV data out of all frames 443 * rt2x00lib will cut the IV/EIV data out of all frames
444 * given to us by mac80211, but we must tell mac80211 444 * given to us by mac80211, but we must tell mac80211
445 * to generate the IV/EIV data. 445 * to generate the IV/EIV data.
@@ -1661,7 +1661,7 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
1661 1661
1662 /* 1662 /*
1663 * Hardware has stripped IV/EIV data from 802.11 frame during 1663 * Hardware has stripped IV/EIV data from 802.11 frame during
1664 * decryption. It has provided the data seperately but rt2x00lib 1664 * decryption. It has provided the data separately but rt2x00lib
1665 * should decide if it should be reinserted. 1665 * should decide if it should be reinserted.
1666 */ 1666 */
1667 rxdesc->flags |= RX_FLAG_IV_STRIPPED; 1667 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
@@ -2352,6 +2352,8 @@ static struct usb_device_id rt73usb_device_table[] = {
2352 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) }, 2352 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2353 { USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) }, 2353 { USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) },
2354 { USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) }, 2354 { USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) },
2355 /* CEIVA */
2356 { USB_DEVICE(0x178d, 0x02be), USB_DEVICE_DATA(&rt73usb_ops) },
2355 /* CNet */ 2357 /* CNet */
2356 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) }, 2358 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2357 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) }, 2359 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index 2d555cc30508..00e09e26c826 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -350,7 +350,7 @@ static void zd_mac_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
350 first_idx = info->status.rates[0].idx; 350 first_idx = info->status.rates[0].idx;
351 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates)); 351 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates));
352 retries = &zd_retry_rates[first_idx]; 352 retries = &zd_retry_rates[first_idx];
353 ZD_ASSERT(0<=retry && retry<=retries->count); 353 ZD_ASSERT(1 <= retry && retry <= retries->count);
354 354
355 info->status.rates[0].idx = retries->rate[0]; 355 info->status.rates[0].idx = retries->rate[0];
356 info->status.rates[0].count = 1; // (retry > 1 ? 2 : 1); 356 info->status.rates[0].count = 1; // (retry > 1 ? 2 : 1);
@@ -360,7 +360,7 @@ static void zd_mac_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
360 info->status.rates[i].count = 1; // ((i==retry-1) && success ? 1:2); 360 info->status.rates[i].count = 1; // ((i==retry-1) && success ? 1:2);
361 } 361 }
362 for (; i<IEEE80211_TX_MAX_RATES && i<retry; i++) { 362 for (; i<IEEE80211_TX_MAX_RATES && i<retry; i++) {
363 info->status.rates[i].idx = retries->rate[retry-1]; 363 info->status.rates[i].idx = retries->rate[retry - 1];
364 info->status.rates[i].count = 1; // (success ? 1:2); 364 info->status.rates[i].count = 1; // (success ? 1:2);
365 } 365 }
366 if (i<IEEE80211_TX_MAX_RATES) 366 if (i<IEEE80211_TX_MAX_RATES)
@@ -374,7 +374,7 @@ static void zd_mac_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
374 * zd_mac_tx_failed - callback for failed frames 374 * zd_mac_tx_failed - callback for failed frames
375 * @dev: the mac80211 wireless device 375 * @dev: the mac80211 wireless device
376 * 376 *
377 * This function is called if a frame couldn't be successfully be 377 * This function is called if a frame couldn't be successfully
378 * transferred. The first frame from the tx queue, will be selected and 378 * transferred. The first frame from the tx queue, will be selected and
379 * reported as error to the upper layers. 379 * reported as error to the upper layers.
380 */ 380 */
@@ -424,12 +424,10 @@ void zd_mac_tx_failed(struct urb *urb)
424 first_idx = info->status.rates[0].idx; 424 first_idx = info->status.rates[0].idx;
425 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates)); 425 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates));
426 retries = &zd_retry_rates[first_idx]; 426 retries = &zd_retry_rates[first_idx];
427 if (retry < 0 || retry > retries->count) { 427 if (retry <= 0 || retry > retries->count)
428 continue; 428 continue;
429 }
430 429
431 ZD_ASSERT(0<=retry && retry<=retries->count); 430 final_idx = retries->rate[retry - 1];
432 final_idx = retries->rate[retry-1];
433 final_rate = zd_rates[final_idx].hw_value; 431 final_rate = zd_rates[final_idx].hw_value;
434 432
435 if (final_rate != tx_status->rate) { 433 if (final_rate != tx_status->rate) {
diff --git a/drivers/parisc/pdc_stable.c b/drivers/parisc/pdc_stable.c
index 0bc5d474b168..1062b8ffe244 100644
--- a/drivers/parisc/pdc_stable.c
+++ b/drivers/parisc/pdc_stable.c
@@ -481,7 +481,7 @@ pdcspath_attr_store(struct kobject *kobj, struct attribute *attr,
481 return ret; 481 return ret;
482} 482}
483 483
484static struct sysfs_ops pdcspath_attr_ops = { 484static const struct sysfs_ops pdcspath_attr_ops = {
485 .show = pdcspath_attr_show, 485 .show = pdcspath_attr_show,
486 .store = pdcspath_attr_store, 486 .store = pdcspath_attr_store,
487}; 487};
diff --git a/drivers/parport/ChangeLog b/drivers/parport/ChangeLog
deleted file mode 100644
index 8565bbbeb6ec..000000000000
--- a/drivers/parport/ChangeLog
+++ /dev/null
@@ -1,583 +0,0 @@
12001-10-11 Tim Waugh <twaugh@redhat.com>
2 * parport_pc.c, parport_serial.c: Support for NetMos cards.
3 + Patch originally from Michael Reinelt <reinelt@eunet.at>.
4
52002-04-25 Tim Waugh <twaugh@redhat.com>
6
7 * parport_serial.c, parport_pc.c: Move some SIIG cards around.
8 Patch from Andrey Panin.
9
102002-01-20 Tim Waugh <twaugh@redhat.com>
11
12 * parport_pc.c (parport_pc_compat_write_block_pio,
13 parport_pc_ecp_write_block_pio, parport_pc_ecp_read_block_pio):
14 Use the default implementations if the caller wants to use
15 O_NONBLOCK.
16
172002-02-25 Tim Waugh <twaugh@redhat.com>
18
19 * parport_pc.c: Make sure that priv->ctr_writable includes IntEn
20 even if IRQ is given as a parameter.
21
222002-01-21 Tim Waugh <twaugh@redhat.com>
23
24 * daisy.c: Apply patch from Max Vorobiev to make parport_daisy_select
25 work for ECP/EPP modes.
26
272002-01-13 Niels Kristian Bech Jensen <nkbj@image.dk>
28
29 * parport_pc.c: Change some occurrences of frob_set_mode to
30 ECR_WRITE. This fixes PLIP.
31
322002-01-04 Tim Waugh <twaugh@redhat.com>
33
34 * share.c (parport_claim_or_block): Sleep interruptibly to prevent
35 a possible deadlock.
36
372001-12-07 Damian Gruszka <damian.gruszka@VisionSystems.de>
38
39 * parport_pc.c (ECR_WRITE): Define. If there are forbidden bits
40 in the ECR register for some chips, this will be a useful place to
41 put that knowledge.
42 (change_mode): Use ECR_WRITE.
43 (parport_pc_restore_state): Likewise.
44 (parport_ECPPS2_supported): Likewise.
45 (parport_ECPEPP_supported): Likewise.
46 (irq_probe_EPP): Likewise.
47 (programmable_irq_support): Likewise.
48 (programmable_dma_support): Likewise.
49 (parport_pc_probe_port): Likewise.
50
51 (frob_set_mode): New function. Set the mode bits of the ECR.
52 (get_fifo_residue): Use frob_set_mode.
53 (parport_pc_ecpepp_read_data): Likewise.
54 (parport_pc_ecpepp_write_data): Likewise.
55 (parport_pc_ecpepp_read_addr): Likewise.
56 (parport_pc_ecpepp_write_addr): Likewise.
57 (parport_pc_compat_write_block_pio): Likewise.
58 (parport_pc_ecp_write_block_pio): Likewise.
59 (parport_ECR_present): Likewise.
60 (parport_ECP_supported): Likewise.
61 (parport_EPP_supported): Likewise.
62 (parport_ECPEPP_supported): Likewise.
63 (programmable_irq_support): Likewise.
64 (irq_probe_ECP): Likewise.
65 (programmable_dma_support): Likewise.
66
67 (parport_pc_enable_irq): Only enable interrupts if we know which
68 IRQ line they will come from.
69 (parport_pc_init_state): Set nErrIntrEn at initialisation.
70 (parport_pc_restore_state): Only write writable bits of CTR.
71 (parport_irq_probe): If no IRQ is found, take ackIntEn out of the
72 writable bit set.
73
742001-12-07 Tim Waugh <twaugh@redhat.com>
75
76 * parport_pc.c (parport_pc_fifo_write_block_pio): Correct typo.
77 (parport_pc_init_state): Only set ackIntEn if we know which IRQ
78 line the interrupts will come from.
79
802001-12-07 Tim Waugh <twaugh@redhat.com>
81
82 * ieee1284_ops.c (parport_ieee1284_epp_write_addr,
83 parport_ieee1284_epp_read_addr): Actually do something useful.
84
852001-12-07 Tim Waugh <twaugh@redhat.com>
86
87 * parport_pc.c (dmaval): Don't use DMA by default. It seems to be
88 too buggy at the moment. Use 'dma=auto' to restore the previous
89 behaviour.
90
912001-12-07 Tim Waugh <twaugh@redhat.com>
92
93 * daisy.c (DEBUG): Undefine.
94
952001-12-06 Tim Waugh <twaugh@redhat.com>
96
97 * ieee1284_ops.c (parport_ieee1284_ecp_read_data): Mask off
98 PARPORT_CONTROL_AUTOFD as well. Bug spotted by Joe
99 <joeja@mindspring.com>.
100
1012001-12-03 Rich Liu <Rich.Liu@ite.com.tw>
102
103 * parport_pc.c (sio_ite_8872_probe): ITE8873 is a single-port
104 serial board, not a serial+parallel.
105
1062001-11-30 Niels Kristian Bech Jensen <nkbj@image.dk>
107
108 * parport_pc.c: Fix compiler warning.
109
1102001-11-14 Tim Waugh <twaugh@redhat.com>
111
112 * parport_pc.c (parport_pc_pci_probe): Hooks for PCI cards before
113 and after probing for ports.
114 * parport_serial.c (parport_register): Likewise.
115
1162001-11-12 Tim Waugh <twaugh@redhat.com>
117
118 * parport_pc.c (init_module): Warn when parameters are ignored.
119
1202001-11-01 Damian Gruszka <damian.gruszka@VisionSystems.de>
121
122 * parport_serial.c (serial_register): Set base_baud before
123 calling register_serial.
124
1252001-10-26 Tim Waugh <twaugh@redhat.com>
126
127 * parport_pc.c (parport_irq_probe): When ECR programmable IRQ
128 support fails, generate interrupts using the FIFO even if we don't
129 want to use the FIFO for real data transfers.
130 (parport_pc_probe_port): Display the ECR address if we have an
131 ECR, not just if we will use the FIFO.
132
1332001-10-24 Dave Strauss <D.Strauss@motorola.com>
134
135 * parport_pc.c (parport_pc_compat_write_block_pio,
136 parport_pc_ecp_write_block_pio): Allow a few seconds for an ECP
137 transfer to finish up.
138
1392001-10-11 Tim Waugh <twaugh@redhat.com>
140
141 * parport_pc (sio_ite_8872_probe): New function, submitted by Rich
142 Liu from ITE. Cleaned up, removed bogus phys_to_virt calls.
143
1442001-10-24 Tim Waugh <twaugh@redhat.com>
145
146 * parport_pc.c: Support for AKS AladdinCARD. Patch from
147 Aladdin Knowledge Systems (Christian Groessler).
148
1492001-10-24 Tim Waugh <twaugh@redhat.com>
150
151 * ieee1284_ops.c (parport_ieee1284_ecp_read_data): Try to minimise
152 turnaround time.
153
154 * ieee1284.c (parport_poll_peripheral): Try a couple of times
155 first without delaying.
156
1572001-10-10 Tim Waugh <twaugh@redhat.com>
158
159 * parport_pc.c: Support for OX16PCI954 PCI card.
160
1612001-10-10 Tim Waugh <twaugh@redhat.com>
162
163 * parport_pc.c: Support for OX12PCI840 PCI card (reported by
164 mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we
165 just don't trust its ECR).
166
1672001-10-10 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
168
169 * parport_pc.c: Support for AVLAB cards.
170
1712001-10-10 Tim Waugh <twaugh@redhat.com>
172
173 * ieee1284_ops.c (ecp_forward_to_reverse, ecp_reverse_to_forward):
174 Remember to retry direction switch if it fails. Patch from David
175 Lambert.
176
1772001-10-08 David C. Hansen <haveblue@us.ibm.com>
178
179 * share.c: Make driverlist_lock and parportlist_lock static.
180
1812001-10-08 Philip Blundell <philb@gnu.org>
182
183 * parport_pc.c: New modular parameter verbose_logging.
184 Make port->modes indicate the modes that we are prepared to use,
185 rather than the modes that are available.
186
1872001-10-07 Tim Waugh <twaugh@redhat.com>
188
189 * parport_pc.c (parport_pc_probe_port): Fix memory leak spotted by
190 Kipp Cannon.
191
1922001-10-07 Tim Waugh <twaugh@redhat.com>
193
194 * parport_serial.c: Remove NetMos support, since it causes problems
195 for some people.
196
1972001-08-30 Tim Waugh <twaugh@redhat.com>
198
199 * parport_serial.c (parport_serial_pci_probe): Clean-up on partial
200 registration failure.
201
2022001-08-14 Tim Waugh <twaugh@redhat.com>
203
204 * parport_pc.c (parport_pc_init_superio): Allow for more than one
205 SuperIO device. Patch from Rich Lio (ITE).
206
2072001-08-11 Tim Waugh <twaugh@redhat.com>
208
209 * parport_pc.c: Support for Titan Electronics cards.
210
2112001-08-08 Tim Waugh <twaugh@redhat.com>
212
213 * share.c (parport_unregister_device): Remove device from wait list
214 too.
215
2162001-06-20 Tim Waugh <twaugh@redhat.com>
217
218 * parport_pc.c: Make 'io_hi=0' work.
219
2202001-05-31 Tim Waugh <twaugh@redhat.com>
221
222 * parport_serial.c: New file.
223
2242001-06-05 Tim Waugh <twaugh@redhat.com>
225
226 * parport_pc.c (parport_pc_unregister_port): New exported function.
227 Do the opposite of parport_pc_probe_port.
228 (cleanup_module): Use it.
229
2302001-05-22 Juan Quintela <quintela@mandrakesoft.com>
231
232 * parport_amiga.c: Set printk levels.
233 * parport_gsc.c: Likewise.
234 * parport_mfc3.c: Likewise.
235 * parport_pc.c: Likewise.
236 * parport_sunbpp.c: Likewise.
237 * probe.c: Likewise.
238 * share.c: Likewise.
239
2402001-05-10 Fred Barnes <frmb2@ukc.ac.uk>
241
242 * parport_pc.c (parport_pc_epp_read_data): added support for
243 reading from a w91284pic peripheral, flag is PARPORT_W91284PIC.
244
2452001-05-07 Fred Barnes <frmb2@ukc.ac.uk>
246
247 * parport_pc.c (parport_pc_epp_read_data,
248 parport_pc_epp_write_data, parport_pc_epp_read_addr,
249 parport_pc_epp_write_addr): support for fast reads/writes using
250 the PARPORT_EPP_FAST flag.
251
252 * ieee1284.c (parport_read, parport_write): added code to handle
253 software EPP mode (IEEE1284_MODE_EPPSWE). Added code to allow
254 BYTE mode reverse transfers (previously always went for NIBBLE
255 mode).
256
257 * ieee1284_ops.c (parport_ieee1284_epp_read_data,
258 parport_ieee1284_epp_write_data): fixed various polarity problems.
259 Also (theoretically) fixed address versions (.._addr), but no
260 hardware to test this on.
261
262 * parport_pc.h: added parport_dump_state() function for debugging.
263 Needs to have DEBUG_PARPORT to be defined for it to be included.
264
2652001-05-03 Tim Waugh <twaugh@redhat.com>
266
267 * parport_pc.c: Fix the compile problem I introduce from the last
268 change.
269
2702001-04-20 Paul Gortmaker <p_gortmaker@yahoo.com>
271
272 * parport_pc.c: Cut down the size quite a bit (more than 4k off
273 the object, about 1k off the zImage) for the older non-PCI
274 machines which are typically resource starved anyway...
275
2762001-03-26 R Horn <rjh@world.std.com>
277
278 * parport_pc.c: Some commentary changes.
279
2802001-04-19 Tim Waugh <twaugh@redhat.com>
281
282 * parport_pc.c (parport_pc_probe_port): Remove __devinit
283 attribute. Export unconditionally.
284
2852001-04-14 Jeff Garzik <jgarzik@pobox.com>
286
287 Merged: 2001-03-30 Tim Waugh <twaugh@redhat.com>
288
289 * drivers/parport/parport_pc.c: Make Via SuperIO chipsets behave
290 like everything else with respect to irq= and dma= parameters.
291
2922001-04-08 Tim Waugh <twaugh@redhat.com>
293
294 * parport_pc.c (parport_pc_save_state): Read from the soft copy of
295 the control port.
296 (parport_pc_restore_state): Update the soft copy of the control
297 port.
298
2992001-03-26 Tim Waugh <twaugh@redhat.com>
300
301 * share.c (parport_find_number, parport_find_base): Trigger
302 a lowlevel driver load if there are no ports yet.
303
3042001-03-26 Tim Waugh <twaugh@redhat.com>
305
306 * parport_pc.c (parport_ECP_supported): Remove the IRQ conflict
307 check since it seems totally unreliable.
308
3092001-03-02 Tim Waugh <twaugh@redhat.com>
310
311 * ieee1284_ops.c (parport_ieee1284_read_nibble): Reset nAutoFd
312 on timeout. Matches 2.2.x behaviour.
313
3142001-03-02 Andrew Morton
315
316 * parport_pc.c (registered_parport): New static variable.
317 (parport_pc_find_ports): Set it when we register PCI driver.
318 (init_module): Unregister PCI driver if necessary when we
319 fail.
320
3212001-03-02 Tim Waugh <twaugh@redhat.com>
322
323 * ieee1284_ops.c (parport_ieee1284_write_compat): Don't use
324 down_trylock to reset the IRQ count. Don't even use sema_init,
325 because it's not even necessary to reset the count. I can't
326 remember why we ever did.
327
3282001-01-04 Peter Osterlund <peter.osterlund@mailbox.swipnet.se>
329
330 * ieee1284.c (parport_negotiate): Fix missing printk argument.
331
3322001-01-03 Paul Schleger <Paul.Schleger@t-online.de>
333
334 * probe.c (parse_data): Get rid of trailing blanks in values.
335 Needed for XEROX XJ8C printer.
336
3372001-01-03 Tim Waugh <twaugh@redhat.com>
338
339 * parport_pc.c (parport_pc_probe_port): Say something when probes
340 are omitted.
341
3422001-01-03 Tim Waugh <twaugh@redhat.com>
343
344 * parport_pc.c (sio_via_686a_probe): Correct dma=255 fix.
345
3462000-11-21 Tim Waugh <twaugh@redhat.com>
347
348 * parport_pc.c (parport_pc_ecp_write_block_pio): Fix
349 reverse-to-forward logic. Spotted by Roland Kuck
350 <rci@cityweb.de>.
351
3522000-09-16 Cesar Eduardo Barros <cesarb@nitnet.com.br>
353
354 * parport_pc.c (sio_via_686a_probe): Handle case
355 where hardware returns 255 for IRQ or DMA.
356
3572000-07-20 Eddie C. Dost <ecd@skynet.be>
358
359 * share.c (attach_driver_chain): attach[i](port) needs to be
360 replaced by attach[count](port).
361
3622000-07-20 Eddie C. Dost <ecd@skynet.be>
363
364 * daisy.c (add_dev): kmalloc args are in wrong order.
365
3662000-07-12 Tim Waugh <twaugh@redhat.com>
367
368 * share.c: Documentation for parport_{get,port}_port,
369 parport_find_{number,base}.
370
3712000-07-12 Tim Waugh <twaugh@redhat.com>
372
373 * share.c (parport_unregister_device): Remove unneeded locking
374 (test cad==dev).
375 (parport_claim): Likewise.
376 (parport_find_number): New function.
377
3782000-07-12 Tim Waugh <twaugh@redhat.com>
379
380 * share.c (parport_register_port): Hold the parportlist_lock while
381 looking for a free parport number.
382 (parport_register_driver): Make sure that attach can block.
383 (attach_driver_chain): Likewise.
384
3852000-07-12 Tim Waugh <twaugh@redhat.com>
386
387 * share.c (call_driver_chain): Do reference counting things.
388 (parport_get_port): New function.
389 (parport_put_port): New function.
390 (parport_register_port): Initialise reference count to zero.
391 (parport_unregister_port): Check reference count rather than
392 driver list to see if we can free the port.
393
3942000-07-12 Tim Waugh <twaugh@redhat.com>
395
396 * share.c: Clarifications in doc comments.
397
3982000-07-12 Tim Waugh <twaugh@redhat.com>
399
400 * share.c (parport_unregister_port): Fix typo in comment.
401
4022000-07-11 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
403
404 * parport_pc.c: Support for the full range of Timedia cards.
405
4062000-07-08 Tim Waugh <twaugh@redhat.com>
407
408 * daisy.c: License block comments as part of parportbook.
409 * ieee1284.c: Likewise.
410 * share.c: Likewise.
411
4122000-06-30 Petr Vandrovec <vandrove@vc.cvut.cz>
413
414 * procfs.c (do_hardware_modes): Generated string can be up to 34
415 chars long.
416
4172000-06-20 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
418
419 * parport_pc.c (parport_pc_compat_write_block_pio): Warn about
420 change_mode failures.
421 (parport_pc_ecp_write_block_pio): Likewise.
422 (parport_pc_ecp_read_block_pio): Likewise.
423
4242000-06-20 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
425
426 * parport_pc.c (parport_SPP_supported): Warn more about possibly
427 incorrect parameters.
428
4292000-06-15 Tim Waugh <twaugh@redhat.com>
430
431 * parport_pc.c (parport_ECP_supported): Set PARPORT_MODE_COMPAT
432 for ECP ports, since they can all do hardware accelerated
433 compatibility mode (I assume).
434
4352000-06-13 Tim Waugh <twaugh@redhat.com>
436
437 * parport_pc.c (cleanup_module): Remark about possible bugs.
438
4392000-06-13 Tim Waugh <twaugh@redhat.com>
440
441 * procfs.c: Break 'hardware' out into separate files.
442
4432000-05-28 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
444
445 * Fix PCI ID printk for non-superio PCI cards.
446
4472000-05-28 Tim Waugh <twaugh@redhat.com>
448
449 * share.c (call_driver_chain): Get the driverlist_lock.
450 (parport_register_device): Make sure that port->devices always
451 looks consistent.
452 (parport_register_driver): Ensure that parport drivers are given
453 parameters that are valid for the duration of the callback by
454 locking the portlist against changes.
455 (parport_unregister_driver): Likewise.
456 (parport_claim): Don't overwrite flags.
457
4582000-05-28 Tim Waugh <twaugh@redhat.com>
459
460 * daisy.c (assign_addrs): Avoid double-probing daisy-chain devices
461 if the first probe succeeds.
462
4632000-05-16 Tim Waugh <twaugh@redhat.com>
464
465 * share.c (parport_claim): Fix SMP race.
466
4672000-05-15 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
468
469 * parport_pc.c (parport_pc_compat_write_block_pio): Check for
470 timeouts.
471 (parport_pc_ecp_write_block_pio): Likewise.
472 (parport_pc_ecp_read_block_pio): Likewise.
473
4742000-05-02 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
475
476 * parport_pc.c: PCI SYBA patch and verbose PCI detection.
477
4782000-05-02 Gunther Mayer <gunther.mayer@braunschweig.okersurf.de>
479
480 * parport_pc.c (decode_smsc): Fix SMSC 665/666 identification.
481
4822000-04-28 Tim Waugh <twaugh@redhat.com>
483
484 * ieee1284.c: Short function descriptions can't be multiline.
485
486 * daisy.c: Short function descriptions can't be multiline.
487
4882000-04-19 Tim Waugh <twaugh@redhat.com>
489
490 * parport_pc.c (parport_pc_fifo_write_block_dma): Make maxlen
491 calculation a bit clearer.
492
493 * ieee1284.c (parport_negotiate): Turn on data line drivers.
494
495 * ieee1284_ops.c (parport_ieee1284_read_byte): Turn off data line
496 drivers.
497 (parport_ieee1284_write_compat): Turn on data line drivers.
498
499 * daisy.c (assign_addrs): Turn on data line drivers.
500 (cpp_mux): Likewise.
501 (cpp_daisy): Likewise.
502
5032000-04-04 Tim Waugh <twaugh@redhat.com>
504
505 * parport_pc.c: Add support for another PCI card.
506
5072000-04-04 Tim Waugh <twaugh@redhat.com>
508
509 * daisy.c: Documentation in kernel-doc format.
510
511 * ieee1284.c: Likewise.
512
513 * share.c: Likewise.
514
5152000-04-01 Tim Waugh <twaugh@redhat.com>
516
517 * share.c (parport_register_device): Need to hold the module
518 reference counts before sleeping.
519
5202000-03-27 Tim Waugh <twaugh@redhat.com>
521
522 * parport_pc.c (parport_pc_ecp_read_block_pio): Correct operation
523 when peripheral is trying to send data when we stop listening.
524
5252000-03-22 Tim Waugh <twaugh@redhat.com>
526
527 * init.c (parport_setup): Fix return value.
528
5292000-03-21 Tim Waugh <twaugh@redhat.com>
530
531 * parport_pc.c (parport_pc_pci_probe): Fix return value; call
532 pci_enable_device.
533
5342000-03-16 Tim Waugh <twaugh@redhat.com>
535
536 * parport_pc.c (parport_ECP_supported): This seems to trigger on
537 machines that don't have an IRQ conflict; toned down the warning
538 message accordingly.
539
5402000-03-16 Gunther Mayer <gunther.mayer@braunschweig.netsurf.de>
541
542 * parport_pc.c (show_parconfig_smsc37c669): Fix typo.
543 (decode_winbond): More IDs.
544 (winbond_check): Protect against false positives.
545 (winbond_check2): Likewise.
546 (smsc_check): Likewise.
547
5482000-03-15 Tim Waugh <twaugh@redhat.com>
549
550 * parport_pc.c (cleanup_module): Don't call pci_unregister_driver
551 if we didn't call pci_register_driver first.
552
5532000-03-13 Tim Waugh <twaugh@redhat.com>
554
555 * parport_pc.c (parport_pc_init): Moved from asm/parport.h.
556
557 * Config.in: CONFIG_PARPORT_PC_SUPERIO: new option.
558
559 * parport_pc.c (show_parconfig_smsc37c669): Make __devinit.
560 (show_parconfig_winbond): Likewise.
561 (decode_winbond): Likewise.
562 (decode_smsc): Likewise.
563 (winbond_check): Likewise.
564 (winbond_check2): Likewise.
565 (smsc_check): Likewise.
566 (detect_and_report_winbond): Likewise.
567 (detect_and_report_smsc): Likewise.
568 (get_superio_dma): Likewise.
569 (get_superio_irq): Likewise.
570 (parport_pc_find_isa_ports): New function.
571 (parport_pc_find_ports): New function.
572 (init_module): Make superio a config option, not a parameter.
573
5742000-03-10 Tim Waugh <twaugh@redhat.com>
575
576 * parport_pc.c (decode_winbond): Use correct 83877ATF chip ID.
577 (decode_winbond): Fix typo.
578
5792000-03-09 Tim Waugh <twaugh@redhat.com>
580
581 * parport_pc.c: Integrate SuperIO PCI probe with normal PCI card
582 probe, so that the MODULE_DEVICE_TABLE is complete.
583
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 712250f5874a..26301cb25e7f 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -288,9 +288,9 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
288 next = dev->bus_list.next; 288 next = dev->bus_list.next;
289 289
290 /* Run device routines with the device locked */ 290 /* Run device routines with the device locked */
291 down(&dev->dev.sem); 291 device_lock(&dev->dev);
292 retval = cb(dev, userdata); 292 retval = cb(dev, userdata);
293 up(&dev->dev.sem); 293 device_unlock(&dev->dev);
294 if (retval) 294 if (retval)
295 break; 295 break;
296 } 296 }
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index cb2fd01eddae..b5dad9f37453 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -749,6 +749,24 @@ static int acpiphp_bus_trim(acpi_handle handle)
749 return retval; 749 return retval;
750} 750}
751 751
752static void acpiphp_set_acpi_region(struct acpiphp_slot *slot)
753{
754 struct acpiphp_func *func;
755 union acpi_object params[2];
756 struct acpi_object_list arg_list;
757
758 list_for_each_entry(func, &slot->funcs, sibling) {
759 arg_list.count = 2;
760 arg_list.pointer = params;
761 params[0].type = ACPI_TYPE_INTEGER;
762 params[0].integer.value = ACPI_ADR_SPACE_PCI_CONFIG;
763 params[1].type = ACPI_TYPE_INTEGER;
764 params[1].integer.value = 1;
765 /* _REG is optional, we don't care about if there is failure */
766 acpi_evaluate_object(func->handle, "_REG", &arg_list, NULL);
767 }
768}
769
752/** 770/**
753 * enable_device - enable, configure a slot 771 * enable_device - enable, configure a slot
754 * @slot: slot to be enabled 772 * @slot: slot to be enabled
@@ -805,6 +823,7 @@ static int __ref enable_device(struct acpiphp_slot *slot)
805 pci_bus_assign_resources(bus); 823 pci_bus_assign_resources(bus);
806 acpiphp_sanitize_bus(bus); 824 acpiphp_sanitize_bus(bus);
807 acpiphp_set_hpp_values(bus); 825 acpiphp_set_hpp_values(bus);
826 acpiphp_set_acpi_region(slot);
808 pci_enable_bridges(bus); 827 pci_enable_bridges(bus);
809 pci_bus_add_devices(bus); 828 pci_bus_add_devices(bus);
810 829
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c
index 6151389fd903..0a894efd4b9b 100644
--- a/drivers/pci/hotplug/fakephp.c
+++ b/drivers/pci/hotplug/fakephp.c
@@ -73,7 +73,7 @@ static void legacy_release(struct kobject *kobj)
73} 73}
74 74
75static struct kobj_type legacy_ktype = { 75static struct kobj_type legacy_ktype = {
76 .sysfs_ops = &(struct sysfs_ops){ 76 .sysfs_ops = &(const struct sysfs_ops){
77 .store = legacy_store, .show = legacy_show 77 .store = legacy_store, .show = legacy_show
78 }, 78 },
79 .release = &legacy_release, 79 .release = &legacy_release,
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 807224ec8351..de296452c957 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -642,6 +642,7 @@ void pci_create_legacy_files(struct pci_bus *b)
642 if (!b->legacy_io) 642 if (!b->legacy_io)
643 goto kzalloc_err; 643 goto kzalloc_err;
644 644
645 sysfs_bin_attr_init(b->legacy_io);
645 b->legacy_io->attr.name = "legacy_io"; 646 b->legacy_io->attr.name = "legacy_io";
646 b->legacy_io->size = 0xffff; 647 b->legacy_io->size = 0xffff;
647 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 648 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
@@ -654,6 +655,7 @@ void pci_create_legacy_files(struct pci_bus *b)
654 goto legacy_io_err; 655 goto legacy_io_err;
655 656
656 /* Allocated above after the legacy_io struct */ 657 /* Allocated above after the legacy_io struct */
658 sysfs_bin_attr_init(b->legacy_mem);
657 b->legacy_mem = b->legacy_io + 1; 659 b->legacy_mem = b->legacy_io + 1;
658 b->legacy_mem->attr.name = "legacy_mem"; 660 b->legacy_mem->attr.name = "legacy_mem";
659 b->legacy_mem->size = 1024*1024; 661 b->legacy_mem->size = 1024*1024;
@@ -800,6 +802,7 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
800 if (res_attr) { 802 if (res_attr) {
801 char *res_attr_name = (char *)(res_attr + 1); 803 char *res_attr_name = (char *)(res_attr + 1);
802 804
805 sysfs_bin_attr_init(res_attr);
803 if (write_combine) { 806 if (write_combine) {
804 pdev->res_attr_wc[num] = res_attr; 807 pdev->res_attr_wc[num] = res_attr;
805 sprintf(res_attr_name, "resource%d_wc", num); 808 sprintf(res_attr_name, "resource%d_wc", num);
@@ -972,6 +975,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev)
972 if (!attr) 975 if (!attr)
973 return -ENOMEM; 976 return -ENOMEM;
974 977
978 sysfs_bin_attr_init(attr);
975 attr->size = dev->vpd->len; 979 attr->size = dev->vpd->len;
976 attr->attr.name = "vpd"; 980 attr->attr.name = "vpd";
977 attr->attr.mode = S_IRUSR | S_IWUSR; 981 attr->attr.mode = S_IRUSR | S_IWUSR;
@@ -1038,6 +1042,7 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1038 retval = -ENOMEM; 1042 retval = -ENOMEM;
1039 goto err_resource_files; 1043 goto err_resource_files;
1040 } 1044 }
1045 sysfs_bin_attr_init(attr);
1041 attr->size = rom_size; 1046 attr->size = rom_size;
1042 attr->attr.name = "rom"; 1047 attr->attr.name = "rom";
1043 attr->attr.mode = S_IRUSR; 1048 attr->attr.mode = S_IRUSR;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 77b493b3d97b..cb1dd5f4988c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1583,8 +1583,10 @@ void pci_pm_init(struct pci_dev *dev)
1583 int pm; 1583 int pm;
1584 u16 pmc; 1584 u16 pmc;
1585 1585
1586 pm_runtime_forbid(&dev->dev);
1586 device_enable_async_suspend(&dev->dev); 1587 device_enable_async_suspend(&dev->dev);
1587 dev->wakeup_prepared = false; 1588 dev->wakeup_prepared = false;
1589
1588 dev->pm_cap = 0; 1590 dev->pm_cap = 0;
1589 1591
1590 /* find PCI PM capability in list */ 1592 /* find PCI PM capability in list */
@@ -2296,35 +2298,6 @@ void pci_msi_off(struct pci_dev *dev)
2296 } 2298 }
2297} 2299}
2298 2300
2299#ifndef HAVE_ARCH_PCI_SET_DMA_MASK
2300/*
2301 * These can be overridden by arch-specific implementations
2302 */
2303int
2304pci_set_dma_mask(struct pci_dev *dev, u64 mask)
2305{
2306 if (!pci_dma_supported(dev, mask))
2307 return -EIO;
2308
2309 dev->dma_mask = mask;
2310 dev_dbg(&dev->dev, "using %dbit DMA mask\n", fls64(mask));
2311
2312 return 0;
2313}
2314
2315int
2316pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
2317{
2318 if (!pci_dma_supported(dev, mask))
2319 return -EIO;
2320
2321 dev->dev.coherent_dma_mask = mask;
2322 dev_dbg(&dev->dev, "using %dbit consistent DMA mask\n", fls64(mask));
2323
2324 return 0;
2325}
2326#endif
2327
2328#ifndef HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_SIZE 2301#ifndef HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_SIZE
2329int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size) 2302int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size)
2330{ 2303{
@@ -2486,7 +2459,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
2486 if (!probe) { 2459 if (!probe) {
2487 pci_block_user_cfg_access(dev); 2460 pci_block_user_cfg_access(dev);
2488 /* block PM suspend, driver probe, etc. */ 2461 /* block PM suspend, driver probe, etc. */
2489 down(&dev->dev.sem); 2462 device_lock(&dev->dev);
2490 } 2463 }
2491 2464
2492 rc = pci_dev_specific_reset(dev, probe); 2465 rc = pci_dev_specific_reset(dev, probe);
@@ -2508,7 +2481,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
2508 rc = pci_parent_bus_reset(dev, probe); 2481 rc = pci_parent_bus_reset(dev, probe);
2509done: 2482done:
2510 if (!probe) { 2483 if (!probe) {
2511 up(&dev->dev.sem); 2484 device_unlock(&dev->dev);
2512 pci_unblock_user_cfg_access(dev); 2485 pci_unblock_user_cfg_access(dev);
2513 } 2486 }
2514 2487
@@ -3066,8 +3039,6 @@ EXPORT_SYMBOL(pci_set_mwi);
3066EXPORT_SYMBOL(pci_try_set_mwi); 3039EXPORT_SYMBOL(pci_try_set_mwi);
3067EXPORT_SYMBOL(pci_clear_mwi); 3040EXPORT_SYMBOL(pci_clear_mwi);
3068EXPORT_SYMBOL_GPL(pci_intx); 3041EXPORT_SYMBOL_GPL(pci_intx);
3069EXPORT_SYMBOL(pci_set_dma_mask);
3070EXPORT_SYMBOL(pci_set_consistent_dma_mask);
3071EXPORT_SYMBOL(pci_assign_resource); 3042EXPORT_SYMBOL(pci_assign_resource);
3072EXPORT_SYMBOL(pci_find_parent_resource); 3043EXPORT_SYMBOL(pci_find_parent_resource);
3073EXPORT_SYMBOL(pci_select_bars); 3044EXPORT_SYMBOL(pci_select_bars);
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index 49c9e6c9779a..f75a44d37fbe 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -29,7 +29,7 @@ static ssize_t pci_slot_attr_store(struct kobject *kobj,
29 return attribute->store ? attribute->store(slot, buf, len) : -EIO; 29 return attribute->store ? attribute->store(slot, buf, len) : -EIO;
30} 30}
31 31
32static struct sysfs_ops pci_slot_sysfs_ops = { 32static const struct sysfs_ops pci_slot_sysfs_ops = {
33 .show = pci_slot_attr_show, 33 .show = pci_slot_attr_show,
34 .store = pci_slot_attr_store, 34 .store = pci_slot_attr_store,
35}; 35};
diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c
index 0f98be4450b7..ad93ebd7b2a2 100644
--- a/drivers/pcmcia/ds.c
+++ b/drivers/pcmcia/ds.c
@@ -971,9 +971,9 @@ static int runtime_suspend(struct device *dev)
971{ 971{
972 int rc; 972 int rc;
973 973
974 down(&dev->sem); 974 device_lock(dev);
975 rc = pcmcia_dev_suspend(dev, PMSG_SUSPEND); 975 rc = pcmcia_dev_suspend(dev, PMSG_SUSPEND);
976 up(&dev->sem); 976 device_unlock(dev);
977 return rc; 977 return rc;
978} 978}
979 979
@@ -981,9 +981,9 @@ static int runtime_resume(struct device *dev)
981{ 981{
982 int rc; 982 int rc;
983 983
984 down(&dev->sem); 984 device_lock(dev);
985 rc = pcmcia_dev_resume(dev); 985 rc = pcmcia_dev_resume(dev);
986 up(&dev->sem); 986 device_unlock(dev);
987 return rc; 987 return rc;
988} 988}
989 989
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index de6bc333d299..db79ca61cf96 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -21,11 +21,18 @@
21 21
22#include "sa1111_generic.h" 22#include "sa1111_generic.h"
23 23
24#define IDX_IRQ_S0_READY_NINT (0)
25#define IDX_IRQ_S0_CD_VALID (1)
26#define IDX_IRQ_S0_BVD1_STSCHG (2)
27#define IDX_IRQ_S1_READY_NINT (3)
28#define IDX_IRQ_S1_CD_VALID (4)
29#define IDX_IRQ_S1_BVD1_STSCHG (5)
30
24static struct pcmcia_irqs irqs[] = { 31static struct pcmcia_irqs irqs[] = {
25 { 0, IRQ_S0_CD_VALID, "SA1111 PCMCIA card detect" }, 32 { 0, NO_IRQ, "SA1111 PCMCIA card detect" },
26 { 0, IRQ_S0_BVD1_STSCHG, "SA1111 PCMCIA BVD1" }, 33 { 0, NO_IRQ, "SA1111 PCMCIA BVD1" },
27 { 1, IRQ_S1_CD_VALID, "SA1111 CF card detect" }, 34 { 1, NO_IRQ, "SA1111 CF card detect" },
28 { 1, IRQ_S1_BVD1_STSCHG, "SA1111 CF BVD1" }, 35 { 1, NO_IRQ, "SA1111 CF BVD1" },
29}; 36};
30 37
31static int sa1111_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 38static int sa1111_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -136,7 +143,9 @@ int sa1111_pcmcia_add(struct sa1111_dev *dev, struct pcmcia_low_level *ops,
136 s->soc.ops = ops; 143 s->soc.ops = ops;
137 s->soc.socket.owner = ops->owner; 144 s->soc.socket.owner = ops->owner;
138 s->soc.socket.dev.parent = &dev->dev; 145 s->soc.socket.dev.parent = &dev->dev;
139 s->soc.socket.pci_irq = s->soc.nr ? IRQ_S1_READY_NINT : IRQ_S0_READY_NINT; 146 s->soc.socket.pci_irq = s->soc.nr ?
147 dev->irq[IDX_IRQ_S0_READY_NINT] :
148 dev->irq[IDX_IRQ_S1_READY_NINT];
140 s->dev = dev; 149 s->dev = dev;
141 150
142 ret = add(&s->soc); 151 ret = add(&s->soc);
@@ -162,6 +171,12 @@ static int pcmcia_probe(struct sa1111_dev *dev)
162 171
163 base = dev->mapbase; 172 base = dev->mapbase;
164 173
174 /* Initialize PCMCIA IRQs */
175 irqs[0].irq = dev->irq[IDX_IRQ_S0_CD_VALID];
176 irqs[1].irq = dev->irq[IDX_IRQ_S0_BVD1_STSCHG];
177 irqs[2].irq = dev->irq[IDX_IRQ_S1_CD_VALID];
178 irqs[3].irq = dev->irq[IDX_IRQ_S1_BVD1_STSCHG];
179
165 /* 180 /*
166 * Initialise the suspend state. 181 * Initialise the suspend state.
167 */ 182 */
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index cd2ee6fce1b4..e631dbeafd79 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -150,6 +150,7 @@ config MSI_LAPTOP
150 tristate "MSI Laptop Extras" 150 tristate "MSI Laptop Extras"
151 depends on ACPI 151 depends on ACPI
152 depends on BACKLIGHT_CLASS_DEVICE 152 depends on BACKLIGHT_CLASS_DEVICE
153 depends on RFKILL
153 ---help--- 154 ---help---
154 This is a driver for laptops built by MSI (MICRO-STAR 155 This is a driver for laptops built by MSI (MICRO-STAR
155 INTERNATIONAL): 156 INTERNATIONAL):
diff --git a/drivers/platform/x86/dell-wmi.c b/drivers/platform/x86/dell-wmi.c
index 1b1dddbd5744..bed764e3ea2a 100644
--- a/drivers/platform/x86/dell-wmi.c
+++ b/drivers/platform/x86/dell-wmi.c
@@ -142,7 +142,7 @@ static struct key_entry *dell_wmi_keymap = dell_legacy_wmi_keymap;
142 142
143static struct input_dev *dell_wmi_input_dev; 143static struct input_dev *dell_wmi_input_dev;
144 144
145static struct key_entry *dell_wmi_get_entry_by_scancode(int code) 145static struct key_entry *dell_wmi_get_entry_by_scancode(unsigned int code)
146{ 146{
147 struct key_entry *key; 147 struct key_entry *key;
148 148
@@ -153,7 +153,7 @@ static struct key_entry *dell_wmi_get_entry_by_scancode(int code)
153 return NULL; 153 return NULL;
154} 154}
155 155
156static struct key_entry *dell_wmi_get_entry_by_keycode(int keycode) 156static struct key_entry *dell_wmi_get_entry_by_keycode(unsigned int keycode)
157{ 157{
158 struct key_entry *key; 158 struct key_entry *key;
159 159
@@ -164,8 +164,8 @@ static struct key_entry *dell_wmi_get_entry_by_keycode(int keycode)
164 return NULL; 164 return NULL;
165} 165}
166 166
167static int dell_wmi_getkeycode(struct input_dev *dev, int scancode, 167static int dell_wmi_getkeycode(struct input_dev *dev,
168 int *keycode) 168 unsigned int scancode, unsigned int *keycode)
169{ 169{
170 struct key_entry *key = dell_wmi_get_entry_by_scancode(scancode); 170 struct key_entry *key = dell_wmi_get_entry_by_scancode(scancode);
171 171
@@ -177,13 +177,11 @@ static int dell_wmi_getkeycode(struct input_dev *dev, int scancode,
177 return -EINVAL; 177 return -EINVAL;
178} 178}
179 179
180static int dell_wmi_setkeycode(struct input_dev *dev, int scancode, int keycode) 180static int dell_wmi_setkeycode(struct input_dev *dev,
181 unsigned int scancode, unsigned int keycode)
181{ 182{
182 struct key_entry *key; 183 struct key_entry *key;
183 int old_keycode; 184 unsigned int old_keycode;
184
185 if (keycode < 0 || keycode > KEY_MAX)
186 return -EINVAL;
187 185
188 key = dell_wmi_get_entry_by_scancode(scancode); 186 key = dell_wmi_get_entry_by_scancode(scancode);
189 if (key && key->type == KE_KEY) { 187 if (key && key->type == KE_KEY) {
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index 3aa57da8b43b..56086363becc 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -57,7 +57,7 @@ enum hp_wmi_radio {
57 HPWMI_WWAN = 2, 57 HPWMI_WWAN = 2,
58}; 58};
59 59
60static int __init hp_wmi_bios_setup(struct platform_device *device); 60static int __devinit hp_wmi_bios_setup(struct platform_device *device);
61static int __exit hp_wmi_bios_remove(struct platform_device *device); 61static int __exit hp_wmi_bios_remove(struct platform_device *device);
62static int hp_wmi_resume_handler(struct device *device); 62static int hp_wmi_resume_handler(struct device *device);
63 63
@@ -278,7 +278,7 @@ static DEVICE_ATTR(als, S_IRUGO | S_IWUSR, show_als, set_als);
278static DEVICE_ATTR(dock, S_IRUGO, show_dock, NULL); 278static DEVICE_ATTR(dock, S_IRUGO, show_dock, NULL);
279static DEVICE_ATTR(tablet, S_IRUGO, show_tablet, NULL); 279static DEVICE_ATTR(tablet, S_IRUGO, show_tablet, NULL);
280 280
281static struct key_entry *hp_wmi_get_entry_by_scancode(int code) 281static struct key_entry *hp_wmi_get_entry_by_scancode(unsigned int code)
282{ 282{
283 struct key_entry *key; 283 struct key_entry *key;
284 284
@@ -289,7 +289,7 @@ static struct key_entry *hp_wmi_get_entry_by_scancode(int code)
289 return NULL; 289 return NULL;
290} 290}
291 291
292static struct key_entry *hp_wmi_get_entry_by_keycode(int keycode) 292static struct key_entry *hp_wmi_get_entry_by_keycode(unsigned int keycode)
293{ 293{
294 struct key_entry *key; 294 struct key_entry *key;
295 295
@@ -300,7 +300,8 @@ static struct key_entry *hp_wmi_get_entry_by_keycode(int keycode)
300 return NULL; 300 return NULL;
301} 301}
302 302
303static int hp_wmi_getkeycode(struct input_dev *dev, int scancode, int *keycode) 303static int hp_wmi_getkeycode(struct input_dev *dev,
304 unsigned int scancode, unsigned int *keycode)
304{ 305{
305 struct key_entry *key = hp_wmi_get_entry_by_scancode(scancode); 306 struct key_entry *key = hp_wmi_get_entry_by_scancode(scancode);
306 307
@@ -312,13 +313,11 @@ static int hp_wmi_getkeycode(struct input_dev *dev, int scancode, int *keycode)
312 return -EINVAL; 313 return -EINVAL;
313} 314}
314 315
315static int hp_wmi_setkeycode(struct input_dev *dev, int scancode, int keycode) 316static int hp_wmi_setkeycode(struct input_dev *dev,
317 unsigned int scancode, unsigned int keycode)
316{ 318{
317 struct key_entry *key; 319 struct key_entry *key;
318 int old_keycode; 320 unsigned int old_keycode;
319
320 if (keycode < 0 || keycode > KEY_MAX)
321 return -EINVAL;
322 321
323 key = hp_wmi_get_entry_by_scancode(scancode); 322 key = hp_wmi_get_entry_by_scancode(scancode);
324 if (key && key->type == KE_KEY) { 323 if (key && key->type == KE_KEY) {
@@ -447,7 +446,7 @@ static void cleanup_sysfs(struct platform_device *device)
447 device_remove_file(&device->dev, &dev_attr_tablet); 446 device_remove_file(&device->dev, &dev_attr_tablet);
448} 447}
449 448
450static int __init hp_wmi_bios_setup(struct platform_device *device) 449static int __devinit hp_wmi_bios_setup(struct platform_device *device)
451{ 450{
452 int err; 451 int err;
453 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0); 452 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0);
diff --git a/drivers/platform/x86/msi-laptop.c b/drivers/platform/x86/msi-laptop.c
index 759763d18e4c..c2b05da4289a 100644
--- a/drivers/platform/x86/msi-laptop.c
+++ b/drivers/platform/x86/msi-laptop.c
@@ -58,6 +58,7 @@
58#include <linux/dmi.h> 58#include <linux/dmi.h>
59#include <linux/backlight.h> 59#include <linux/backlight.h>
60#include <linux/platform_device.h> 60#include <linux/platform_device.h>
61#include <linux/rfkill.h>
61 62
62#define MSI_DRIVER_VERSION "0.5" 63#define MSI_DRIVER_VERSION "0.5"
63 64
@@ -66,6 +67,20 @@
66#define MSI_EC_COMMAND_WIRELESS 0x10 67#define MSI_EC_COMMAND_WIRELESS 0x10
67#define MSI_EC_COMMAND_LCD_LEVEL 0x11 68#define MSI_EC_COMMAND_LCD_LEVEL 0x11
68 69
70#define MSI_STANDARD_EC_COMMAND_ADDRESS 0x2e
71#define MSI_STANDARD_EC_BLUETOOTH_MASK (1 << 0)
72#define MSI_STANDARD_EC_WEBCAM_MASK (1 << 1)
73#define MSI_STANDARD_EC_WLAN_MASK (1 << 3)
74#define MSI_STANDARD_EC_3G_MASK (1 << 4)
75
76/* For set SCM load flag to disable BIOS fn key */
77#define MSI_STANDARD_EC_SCM_LOAD_ADDRESS 0x2d
78#define MSI_STANDARD_EC_SCM_LOAD_MASK (1 << 0)
79
80static int msi_laptop_resume(struct platform_device *device);
81
82#define MSI_STANDARD_EC_DEVICES_EXISTS_ADDRESS 0x2f
83
69static int force; 84static int force;
70module_param(force, bool, 0); 85module_param(force, bool, 0);
71MODULE_PARM_DESC(force, "Force driver load, ignore DMI data"); 86MODULE_PARM_DESC(force, "Force driver load, ignore DMI data");
@@ -74,6 +89,23 @@ static int auto_brightness;
74module_param(auto_brightness, int, 0); 89module_param(auto_brightness, int, 0);
75MODULE_PARM_DESC(auto_brightness, "Enable automatic brightness control (0: disabled; 1: enabled; 2: don't touch)"); 90MODULE_PARM_DESC(auto_brightness, "Enable automatic brightness control (0: disabled; 1: enabled; 2: don't touch)");
76 91
92static bool old_ec_model;
93static int wlan_s, bluetooth_s, threeg_s;
94static int threeg_exists;
95
96/* Some MSI 3G netbook only have one fn key to control Wlan/Bluetooth/3G,
97 * those netbook will load the SCM (windows app) to disable the original
98 * Wlan/Bluetooth control by BIOS when user press fn key, then control
99 * Wlan/Bluetooth/3G by SCM (software control by OS). Without SCM, user
100 * cann't on/off 3G module on those 3G netbook.
101 * On Linux, msi-laptop driver will do the same thing to disable the
102 * original BIOS control, then might need use HAL or other userland
103 * application to do the software control that simulate with SCM.
104 * e.g. MSI N034 netbook
105 */
106static bool load_scm_model;
107static struct rfkill *rfk_wlan, *rfk_bluetooth, *rfk_threeg;
108
77/* Hardware access */ 109/* Hardware access */
78 110
79static int set_lcd_level(int level) 111static int set_lcd_level(int level)
@@ -130,6 +162,35 @@ static int set_auto_brightness(int enable)
130 return ec_transaction(MSI_EC_COMMAND_LCD_LEVEL, wdata, 2, NULL, 0, 1); 162 return ec_transaction(MSI_EC_COMMAND_LCD_LEVEL, wdata, 2, NULL, 0, 1);
131} 163}
132 164
165static ssize_t set_device_state(const char *buf, size_t count, u8 mask)
166{
167 int status;
168 u8 wdata = 0, rdata;
169 int result;
170
171 if (sscanf(buf, "%i", &status) != 1 || (status < 0 || status > 1))
172 return -EINVAL;
173
174 /* read current device state */
175 result = ec_read(MSI_STANDARD_EC_COMMAND_ADDRESS, &rdata);
176 if (result < 0)
177 return -EINVAL;
178
179 if (!!(rdata & mask) != status) {
180 /* reverse device bit */
181 if (rdata & mask)
182 wdata = rdata & ~mask;
183 else
184 wdata = rdata | mask;
185
186 result = ec_write(MSI_STANDARD_EC_COMMAND_ADDRESS, wdata);
187 if (result < 0)
188 return -EINVAL;
189 }
190
191 return count;
192}
193
133static int get_wireless_state(int *wlan, int *bluetooth) 194static int get_wireless_state(int *wlan, int *bluetooth)
134{ 195{
135 u8 wdata = 0, rdata; 196 u8 wdata = 0, rdata;
@@ -148,6 +209,38 @@ static int get_wireless_state(int *wlan, int *bluetooth)
148 return 0; 209 return 0;
149} 210}
150 211
212static int get_wireless_state_ec_standard(void)
213{
214 u8 rdata;
215 int result;
216
217 result = ec_read(MSI_STANDARD_EC_COMMAND_ADDRESS, &rdata);
218 if (result < 0)
219 return -1;
220
221 wlan_s = !!(rdata & MSI_STANDARD_EC_WLAN_MASK);
222
223 bluetooth_s = !!(rdata & MSI_STANDARD_EC_BLUETOOTH_MASK);
224
225 threeg_s = !!(rdata & MSI_STANDARD_EC_3G_MASK);
226
227 return 0;
228}
229
230static int get_threeg_exists(void)
231{
232 u8 rdata;
233 int result;
234
235 result = ec_read(MSI_STANDARD_EC_DEVICES_EXISTS_ADDRESS, &rdata);
236 if (result < 0)
237 return -1;
238
239 threeg_exists = !!(rdata & MSI_STANDARD_EC_3G_MASK);
240
241 return 0;
242}
243
151/* Backlight device stuff */ 244/* Backlight device stuff */
152 245
153static int bl_get_brightness(struct backlight_device *b) 246static int bl_get_brightness(struct backlight_device *b)
@@ -176,26 +269,71 @@ static ssize_t show_wlan(struct device *dev,
176 269
177 int ret, enabled; 270 int ret, enabled;
178 271
179 ret = get_wireless_state(&enabled, NULL); 272 if (old_ec_model) {
273 ret = get_wireless_state(&enabled, NULL);
274 } else {
275 ret = get_wireless_state_ec_standard();
276 enabled = wlan_s;
277 }
180 if (ret < 0) 278 if (ret < 0)
181 return ret; 279 return ret;
182 280
183 return sprintf(buf, "%i\n", enabled); 281 return sprintf(buf, "%i\n", enabled);
184} 282}
185 283
284static ssize_t store_wlan(struct device *dev,
285 struct device_attribute *attr, const char *buf, size_t count)
286{
287 return set_device_state(buf, count, MSI_STANDARD_EC_WLAN_MASK);
288}
289
186static ssize_t show_bluetooth(struct device *dev, 290static ssize_t show_bluetooth(struct device *dev,
187 struct device_attribute *attr, char *buf) 291 struct device_attribute *attr, char *buf)
188{ 292{
189 293
190 int ret, enabled; 294 int ret, enabled;
191 295
192 ret = get_wireless_state(NULL, &enabled); 296 if (old_ec_model) {
297 ret = get_wireless_state(NULL, &enabled);
298 } else {
299 ret = get_wireless_state_ec_standard();
300 enabled = bluetooth_s;
301 }
193 if (ret < 0) 302 if (ret < 0)
194 return ret; 303 return ret;
195 304
196 return sprintf(buf, "%i\n", enabled); 305 return sprintf(buf, "%i\n", enabled);
197} 306}
198 307
308static ssize_t store_bluetooth(struct device *dev,
309 struct device_attribute *attr, const char *buf, size_t count)
310{
311 return set_device_state(buf, count, MSI_STANDARD_EC_BLUETOOTH_MASK);
312}
313
314static ssize_t show_threeg(struct device *dev,
315 struct device_attribute *attr, char *buf)
316{
317
318 int ret;
319
320 /* old msi ec not support 3G */
321 if (old_ec_model)
322 return -1;
323
324 ret = get_wireless_state_ec_standard();
325 if (ret < 0)
326 return ret;
327
328 return sprintf(buf, "%i\n", threeg_s);
329}
330
331static ssize_t store_threeg(struct device *dev,
332 struct device_attribute *attr, const char *buf, size_t count)
333{
334 return set_device_state(buf, count, MSI_STANDARD_EC_3G_MASK);
335}
336
199static ssize_t show_lcd_level(struct device *dev, 337static ssize_t show_lcd_level(struct device *dev,
200 struct device_attribute *attr, char *buf) 338 struct device_attribute *attr, char *buf)
201{ 339{
@@ -258,6 +396,7 @@ static DEVICE_ATTR(lcd_level, 0644, show_lcd_level, store_lcd_level);
258static DEVICE_ATTR(auto_brightness, 0644, show_auto_brightness, store_auto_brightness); 396static DEVICE_ATTR(auto_brightness, 0644, show_auto_brightness, store_auto_brightness);
259static DEVICE_ATTR(bluetooth, 0444, show_bluetooth, NULL); 397static DEVICE_ATTR(bluetooth, 0444, show_bluetooth, NULL);
260static DEVICE_ATTR(wlan, 0444, show_wlan, NULL); 398static DEVICE_ATTR(wlan, 0444, show_wlan, NULL);
399static DEVICE_ATTR(threeg, 0444, show_threeg, NULL);
261 400
262static struct attribute *msipf_attributes[] = { 401static struct attribute *msipf_attributes[] = {
263 &dev_attr_lcd_level.attr, 402 &dev_attr_lcd_level.attr,
@@ -275,7 +414,8 @@ static struct platform_driver msipf_driver = {
275 .driver = { 414 .driver = {
276 .name = "msi-laptop-pf", 415 .name = "msi-laptop-pf",
277 .owner = THIS_MODULE, 416 .owner = THIS_MODULE,
278 } 417 },
418 .resume = msi_laptop_resume,
279}; 419};
280 420
281static struct platform_device *msipf_device; 421static struct platform_device *msipf_device;
@@ -332,6 +472,192 @@ static struct dmi_system_id __initdata msi_dmi_table[] = {
332 { } 472 { }
333}; 473};
334 474
475static struct dmi_system_id __initdata msi_load_scm_models_dmi_table[] = {
476 {
477 .ident = "MSI N034",
478 .matches = {
479 DMI_MATCH(DMI_SYS_VENDOR,
480 "MICRO-STAR INTERNATIONAL CO., LTD"),
481 DMI_MATCH(DMI_PRODUCT_NAME, "MS-N034"),
482 DMI_MATCH(DMI_CHASSIS_VENDOR,
483 "MICRO-STAR INTERNATIONAL CO., LTD")
484 },
485 .callback = dmi_check_cb
486 },
487 { }
488};
489
490static int rfkill_bluetooth_set(void *data, bool blocked)
491{
492 /* Do something with blocked...*/
493 /*
494 * blocked == false is on
495 * blocked == true is off
496 */
497 if (blocked)
498 set_device_state("0", 0, MSI_STANDARD_EC_BLUETOOTH_MASK);
499 else
500 set_device_state("1", 0, MSI_STANDARD_EC_BLUETOOTH_MASK);
501
502 return 0;
503}
504
505static int rfkill_wlan_set(void *data, bool blocked)
506{
507 if (blocked)
508 set_device_state("0", 0, MSI_STANDARD_EC_WLAN_MASK);
509 else
510 set_device_state("1", 0, MSI_STANDARD_EC_WLAN_MASK);
511
512 return 0;
513}
514
515static int rfkill_threeg_set(void *data, bool blocked)
516{
517 if (blocked)
518 set_device_state("0", 0, MSI_STANDARD_EC_3G_MASK);
519 else
520 set_device_state("1", 0, MSI_STANDARD_EC_3G_MASK);
521
522 return 0;
523}
524
525static struct rfkill_ops rfkill_bluetooth_ops = {
526 .set_block = rfkill_bluetooth_set
527};
528
529static struct rfkill_ops rfkill_wlan_ops = {
530 .set_block = rfkill_wlan_set
531};
532
533static struct rfkill_ops rfkill_threeg_ops = {
534 .set_block = rfkill_threeg_set
535};
536
537static void rfkill_cleanup(void)
538{
539 if (rfk_bluetooth) {
540 rfkill_unregister(rfk_bluetooth);
541 rfkill_destroy(rfk_bluetooth);
542 }
543
544 if (rfk_threeg) {
545 rfkill_unregister(rfk_threeg);
546 rfkill_destroy(rfk_threeg);
547 }
548
549 if (rfk_wlan) {
550 rfkill_unregister(rfk_wlan);
551 rfkill_destroy(rfk_wlan);
552 }
553}
554
555static int rfkill_init(struct platform_device *sdev)
556{
557 /* add rfkill */
558 int retval;
559
560 rfk_bluetooth = rfkill_alloc("msi-bluetooth", &sdev->dev,
561 RFKILL_TYPE_BLUETOOTH,
562 &rfkill_bluetooth_ops, NULL);
563 if (!rfk_bluetooth) {
564 retval = -ENOMEM;
565 goto err_bluetooth;
566 }
567 retval = rfkill_register(rfk_bluetooth);
568 if (retval)
569 goto err_bluetooth;
570
571 rfk_wlan = rfkill_alloc("msi-wlan", &sdev->dev, RFKILL_TYPE_WLAN,
572 &rfkill_wlan_ops, NULL);
573 if (!rfk_wlan) {
574 retval = -ENOMEM;
575 goto err_wlan;
576 }
577 retval = rfkill_register(rfk_wlan);
578 if (retval)
579 goto err_wlan;
580
581 if (threeg_exists) {
582 rfk_threeg = rfkill_alloc("msi-threeg", &sdev->dev,
583 RFKILL_TYPE_WWAN, &rfkill_threeg_ops, NULL);
584 if (!rfk_threeg) {
585 retval = -ENOMEM;
586 goto err_threeg;
587 }
588 retval = rfkill_register(rfk_threeg);
589 if (retval)
590 goto err_threeg;
591 }
592
593 return 0;
594
595err_threeg:
596 rfkill_destroy(rfk_threeg);
597 if (rfk_wlan)
598 rfkill_unregister(rfk_wlan);
599err_wlan:
600 rfkill_destroy(rfk_wlan);
601 if (rfk_bluetooth)
602 rfkill_unregister(rfk_bluetooth);
603err_bluetooth:
604 rfkill_destroy(rfk_bluetooth);
605
606 return retval;
607}
608
609static int msi_laptop_resume(struct platform_device *device)
610{
611 u8 data;
612 int result;
613
614 if (!load_scm_model)
615 return 0;
616
617 /* set load SCM to disable hardware control by fn key */
618 result = ec_read(MSI_STANDARD_EC_SCM_LOAD_ADDRESS, &data);
619 if (result < 0)
620 return result;
621
622 result = ec_write(MSI_STANDARD_EC_SCM_LOAD_ADDRESS,
623 data | MSI_STANDARD_EC_SCM_LOAD_MASK);
624 if (result < 0)
625 return result;
626
627 return 0;
628}
629
630static int load_scm_model_init(struct platform_device *sdev)
631{
632 u8 data;
633 int result;
634
635 /* allow userland write sysfs file */
636 dev_attr_bluetooth.store = store_bluetooth;
637 dev_attr_wlan.store = store_wlan;
638 dev_attr_threeg.store = store_threeg;
639 dev_attr_bluetooth.attr.mode |= S_IWUSR;
640 dev_attr_wlan.attr.mode |= S_IWUSR;
641 dev_attr_threeg.attr.mode |= S_IWUSR;
642
643 /* disable hardware control by fn key */
644 result = ec_read(MSI_STANDARD_EC_SCM_LOAD_ADDRESS, &data);
645 if (result < 0)
646 return result;
647
648 result = ec_write(MSI_STANDARD_EC_SCM_LOAD_ADDRESS,
649 data | MSI_STANDARD_EC_SCM_LOAD_MASK);
650 if (result < 0)
651 return result;
652
653 /* initial rfkill */
654 result = rfkill_init(sdev);
655 if (result < 0)
656 return result;
657
658 return 0;
659}
660
335static int __init msi_init(void) 661static int __init msi_init(void)
336{ 662{
337 int ret; 663 int ret;
@@ -339,8 +665,14 @@ static int __init msi_init(void)
339 if (acpi_disabled) 665 if (acpi_disabled)
340 return -ENODEV; 666 return -ENODEV;
341 667
342 if (!force && !dmi_check_system(msi_dmi_table)) 668 if (force || dmi_check_system(msi_dmi_table))
343 return -ENODEV; 669 old_ec_model = 1;
670
671 if (!old_ec_model)
672 get_threeg_exists();
673
674 if (!old_ec_model && dmi_check_system(msi_load_scm_models_dmi_table))
675 load_scm_model = 1;
344 676
345 if (auto_brightness < 0 || auto_brightness > 2) 677 if (auto_brightness < 0 || auto_brightness > 2)
346 return -EINVAL; 678 return -EINVAL;
@@ -374,10 +706,23 @@ static int __init msi_init(void)
374 if (ret) 706 if (ret)
375 goto fail_platform_device1; 707 goto fail_platform_device1;
376 708
709 if (load_scm_model && (load_scm_model_init(msipf_device) < 0)) {
710 ret = -EINVAL;
711 goto fail_platform_device1;
712 }
713
377 ret = sysfs_create_group(&msipf_device->dev.kobj, &msipf_attribute_group); 714 ret = sysfs_create_group(&msipf_device->dev.kobj, &msipf_attribute_group);
378 if (ret) 715 if (ret)
379 goto fail_platform_device2; 716 goto fail_platform_device2;
380 717
718 if (!old_ec_model) {
719 if (threeg_exists)
720 ret = device_create_file(&msipf_device->dev,
721 &dev_attr_threeg);
722 if (ret)
723 goto fail_platform_device2;
724 }
725
381 /* Disable automatic brightness control by default because 726 /* Disable automatic brightness control by default because
382 * this module was probably loaded to do brightness control in 727 * this module was probably loaded to do brightness control in
383 * software. */ 728 * software. */
@@ -412,10 +757,14 @@ static void __exit msi_cleanup(void)
412{ 757{
413 758
414 sysfs_remove_group(&msipf_device->dev.kobj, &msipf_attribute_group); 759 sysfs_remove_group(&msipf_device->dev.kobj, &msipf_attribute_group);
760 if (!old_ec_model && threeg_exists)
761 device_remove_file(&msipf_device->dev, &dev_attr_threeg);
415 platform_device_unregister(msipf_device); 762 platform_device_unregister(msipf_device);
416 platform_driver_unregister(&msipf_driver); 763 platform_driver_unregister(&msipf_driver);
417 backlight_device_unregister(msibl_device); 764 backlight_device_unregister(msibl_device);
418 765
766 rfkill_cleanup();
767
419 /* Enable automatic brightness control again */ 768 /* Enable automatic brightness control again */
420 if (auto_brightness != 2) 769 if (auto_brightness != 2)
421 set_auto_brightness(1); 770 set_auto_brightness(1);
@@ -435,3 +784,4 @@ MODULE_ALIAS("dmi:*:svnMICRO-STARINT'LCO.,LTD:pnMS-1013:pvr0131*:cvnMICRO-STARIN
435MODULE_ALIAS("dmi:*:svnMicro-StarInternational:pnMS-1058:pvr0581:rvnMSI:rnMS-1058:*:ct10:*"); 784MODULE_ALIAS("dmi:*:svnMicro-StarInternational:pnMS-1058:pvr0581:rvnMSI:rnMS-1058:*:ct10:*");
436MODULE_ALIAS("dmi:*:svnMicro-StarInternational:pnMS-1412:*:rvnMSI:rnMS-1412:*:cvnMICRO-STARINT'LCO.,LTD:ct10:*"); 785MODULE_ALIAS("dmi:*:svnMicro-StarInternational:pnMS-1412:*:rvnMSI:rnMS-1412:*:cvnMICRO-STARINT'LCO.,LTD:ct10:*");
437MODULE_ALIAS("dmi:*:svnNOTEBOOK:pnSAM2000:pvr0131*:cvnMICRO-STARINT'LCO.,LTD:ct10:*"); 786MODULE_ALIAS("dmi:*:svnNOTEBOOK:pnSAM2000:pvr0131*:cvnMICRO-STARINT'LCO.,LTD:ct10:*");
787MODULE_ALIAS("dmi:*:svnMICRO-STARINTERNATIONAL*:pnMS-N034:*");
diff --git a/drivers/platform/x86/panasonic-laptop.c b/drivers/platform/x86/panasonic-laptop.c
index fe7cf0188acc..c9fc479fc290 100644
--- a/drivers/platform/x86/panasonic-laptop.c
+++ b/drivers/platform/x86/panasonic-laptop.c
@@ -200,7 +200,7 @@ static struct acpi_driver acpi_pcc_driver = {
200}; 200};
201 201
202#define KEYMAP_SIZE 11 202#define KEYMAP_SIZE 11
203static const int initial_keymap[KEYMAP_SIZE] = { 203static const unsigned int initial_keymap[KEYMAP_SIZE] = {
204 /* 0 */ KEY_RESERVED, 204 /* 0 */ KEY_RESERVED,
205 /* 1 */ KEY_BRIGHTNESSDOWN, 205 /* 1 */ KEY_BRIGHTNESSDOWN,
206 /* 2 */ KEY_BRIGHTNESSUP, 206 /* 2 */ KEY_BRIGHTNESSUP,
@@ -222,7 +222,7 @@ struct pcc_acpi {
222 struct acpi_device *device; 222 struct acpi_device *device;
223 struct input_dev *input_dev; 223 struct input_dev *input_dev;
224 struct backlight_device *backlight; 224 struct backlight_device *backlight;
225 int keymap[KEYMAP_SIZE]; 225 unsigned int keymap[KEYMAP_SIZE];
226}; 226};
227 227
228struct pcc_keyinput { 228struct pcc_keyinput {
@@ -445,7 +445,8 @@ static struct attribute_group pcc_attr_group = {
445 445
446/* hotkey input device driver */ 446/* hotkey input device driver */
447 447
448static int pcc_getkeycode(struct input_dev *dev, int scancode, int *keycode) 448static int pcc_getkeycode(struct input_dev *dev,
449 unsigned int scancode, unsigned int *keycode)
449{ 450{
450 struct pcc_acpi *pcc = input_get_drvdata(dev); 451 struct pcc_acpi *pcc = input_get_drvdata(dev);
451 452
@@ -457,7 +458,7 @@ static int pcc_getkeycode(struct input_dev *dev, int scancode, int *keycode)
457 return 0; 458 return 0;
458} 459}
459 460
460static int keymap_get_by_keycode(struct pcc_acpi *pcc, int keycode) 461static int keymap_get_by_keycode(struct pcc_acpi *pcc, unsigned int keycode)
461{ 462{
462 int i; 463 int i;
463 464
@@ -469,7 +470,8 @@ static int keymap_get_by_keycode(struct pcc_acpi *pcc, int keycode)
469 return 0; 470 return 0;
470} 471}
471 472
472static int pcc_setkeycode(struct input_dev *dev, int scancode, int keycode) 473static int pcc_setkeycode(struct input_dev *dev,
474 unsigned int scancode, unsigned int keycode)
473{ 475{
474 struct pcc_acpi *pcc = input_get_drvdata(dev); 476 struct pcc_acpi *pcc = input_get_drvdata(dev);
475 int oldkeycode; 477 int oldkeycode;
@@ -477,9 +479,6 @@ static int pcc_setkeycode(struct input_dev *dev, int scancode, int keycode)
477 if (scancode >= ARRAY_SIZE(pcc->keymap)) 479 if (scancode >= ARRAY_SIZE(pcc->keymap))
478 return -EINVAL; 480 return -EINVAL;
479 481
480 if (keycode < 0 || keycode > KEY_MAX)
481 return -EINVAL;
482
483 oldkeycode = pcc->keymap[scancode]; 482 oldkeycode = pcc->keymap[scancode];
484 pcc->keymap[scancode] = keycode; 483 pcc->keymap[scancode] = keycode;
485 484
diff --git a/drivers/platform/x86/sony-laptop.c b/drivers/platform/x86/sony-laptop.c
index 3f71a605a492..5a3d8514c66d 100644
--- a/drivers/platform/x86/sony-laptop.c
+++ b/drivers/platform/x86/sony-laptop.c
@@ -145,7 +145,7 @@ struct sony_laptop_input_s {
145 struct input_dev *key_dev; 145 struct input_dev *key_dev;
146 struct kfifo fifo; 146 struct kfifo fifo;
147 spinlock_t fifo_lock; 147 spinlock_t fifo_lock;
148 struct workqueue_struct *wq; 148 struct timer_list release_key_timer;
149}; 149};
150 150
151static struct sony_laptop_input_s sony_laptop_input = { 151static struct sony_laptop_input_s sony_laptop_input = {
@@ -299,20 +299,26 @@ static int sony_laptop_input_keycode_map[] = {
299}; 299};
300 300
301/* release buttons after a short delay if pressed */ 301/* release buttons after a short delay if pressed */
302static void do_sony_laptop_release_key(struct work_struct *work) 302static void do_sony_laptop_release_key(unsigned long unused)
303{ 303{
304 struct sony_laptop_keypress kp; 304 struct sony_laptop_keypress kp;
305 unsigned long flags;
306
307 spin_lock_irqsave(&sony_laptop_input.fifo_lock, flags);
305 308
306 while (kfifo_out_locked(&sony_laptop_input.fifo, (unsigned char *)&kp, 309 if (kfifo_out(&sony_laptop_input.fifo,
307 sizeof(kp), &sony_laptop_input.fifo_lock) 310 (unsigned char *)&kp, sizeof(kp)) == sizeof(kp)) {
308 == sizeof(kp)) {
309 msleep(10);
310 input_report_key(kp.dev, kp.key, 0); 311 input_report_key(kp.dev, kp.key, 0);
311 input_sync(kp.dev); 312 input_sync(kp.dev);
312 } 313 }
314
315 /* If there is something in the fifo schedule next release. */
316 if (kfifo_len(&sony_laptop_input.fifo) != 0)
317 mod_timer(&sony_laptop_input.release_key_timer,
318 jiffies + msecs_to_jiffies(10));
319
320 spin_unlock_irqrestore(&sony_laptop_input.fifo_lock, flags);
313} 321}
314static DECLARE_WORK(sony_laptop_release_key_work,
315 do_sony_laptop_release_key);
316 322
317/* forward event to the input subsystem */ 323/* forward event to the input subsystem */
318static void sony_laptop_report_input_event(u8 event) 324static void sony_laptop_report_input_event(u8 event)
@@ -366,13 +372,13 @@ static void sony_laptop_report_input_event(u8 event)
366 /* we emit the scancode so we can always remap the key */ 372 /* we emit the scancode so we can always remap the key */
367 input_event(kp.dev, EV_MSC, MSC_SCAN, event); 373 input_event(kp.dev, EV_MSC, MSC_SCAN, event);
368 input_sync(kp.dev); 374 input_sync(kp.dev);
369 kfifo_in_locked(&sony_laptop_input.fifo,
370 (unsigned char *)&kp, sizeof(kp),
371 &sony_laptop_input.fifo_lock);
372 375
373 if (!work_pending(&sony_laptop_release_key_work)) 376 /* schedule key release */
374 queue_work(sony_laptop_input.wq, 377 kfifo_in_locked(&sony_laptop_input.fifo,
375 &sony_laptop_release_key_work); 378 (unsigned char *)&kp, sizeof(kp),
379 &sony_laptop_input.fifo_lock);
380 mod_timer(&sony_laptop_input.release_key_timer,
381 jiffies + msecs_to_jiffies(10));
376 } else 382 } else
377 dprintk("unknown input event %.2x\n", event); 383 dprintk("unknown input event %.2x\n", event);
378} 384}
@@ -390,27 +396,21 @@ static int sony_laptop_setup_input(struct acpi_device *acpi_device)
390 396
391 /* kfifo */ 397 /* kfifo */
392 spin_lock_init(&sony_laptop_input.fifo_lock); 398 spin_lock_init(&sony_laptop_input.fifo_lock);
393 error = 399 error = kfifo_alloc(&sony_laptop_input.fifo,
394 kfifo_alloc(&sony_laptop_input.fifo, SONY_LAPTOP_BUF_SIZE, GFP_KERNEL); 400 SONY_LAPTOP_BUF_SIZE, GFP_KERNEL);
395 if (error) { 401 if (error) {
396 printk(KERN_ERR DRV_PFX "kfifo_alloc failed\n"); 402 printk(KERN_ERR DRV_PFX "kfifo_alloc failed\n");
397 goto err_dec_users; 403 goto err_dec_users;
398 } 404 }
399 405
400 /* init workqueue */ 406 setup_timer(&sony_laptop_input.release_key_timer,
401 sony_laptop_input.wq = create_singlethread_workqueue("sony-laptop"); 407 do_sony_laptop_release_key, 0);
402 if (!sony_laptop_input.wq) {
403 printk(KERN_ERR DRV_PFX
404 "Unable to create workqueue.\n");
405 error = -ENXIO;
406 goto err_free_kfifo;
407 }
408 408
409 /* input keys */ 409 /* input keys */
410 key_dev = input_allocate_device(); 410 key_dev = input_allocate_device();
411 if (!key_dev) { 411 if (!key_dev) {
412 error = -ENOMEM; 412 error = -ENOMEM;
413 goto err_destroy_wq; 413 goto err_free_kfifo;
414 } 414 }
415 415
416 key_dev->name = "Sony Vaio Keys"; 416 key_dev->name = "Sony Vaio Keys";
@@ -419,18 +419,15 @@ static int sony_laptop_setup_input(struct acpi_device *acpi_device)
419 key_dev->dev.parent = &acpi_device->dev; 419 key_dev->dev.parent = &acpi_device->dev;
420 420
421 /* Initialize the Input Drivers: special keys */ 421 /* Initialize the Input Drivers: special keys */
422 set_bit(EV_KEY, key_dev->evbit); 422 input_set_capability(key_dev, EV_MSC, MSC_SCAN);
423 set_bit(EV_MSC, key_dev->evbit); 423
424 set_bit(MSC_SCAN, key_dev->mscbit); 424 __set_bit(EV_KEY, key_dev->evbit);
425 key_dev->keycodesize = sizeof(sony_laptop_input_keycode_map[0]); 425 key_dev->keycodesize = sizeof(sony_laptop_input_keycode_map[0]);
426 key_dev->keycodemax = ARRAY_SIZE(sony_laptop_input_keycode_map); 426 key_dev->keycodemax = ARRAY_SIZE(sony_laptop_input_keycode_map);
427 key_dev->keycode = &sony_laptop_input_keycode_map; 427 key_dev->keycode = &sony_laptop_input_keycode_map;
428 for (i = 0; i < ARRAY_SIZE(sony_laptop_input_keycode_map); i++) { 428 for (i = 0; i < ARRAY_SIZE(sony_laptop_input_keycode_map); i++)
429 if (sony_laptop_input_keycode_map[i] != KEY_RESERVED) { 429 __set_bit(sony_laptop_input_keycode_map[i], key_dev->keybit);
430 set_bit(sony_laptop_input_keycode_map[i], 430 __clear_bit(KEY_RESERVED, key_dev->keybit);
431 key_dev->keybit);
432 }
433 }
434 431
435 error = input_register_device(key_dev); 432 error = input_register_device(key_dev);
436 if (error) 433 if (error)
@@ -450,9 +447,8 @@ static int sony_laptop_setup_input(struct acpi_device *acpi_device)
450 jog_dev->id.vendor = PCI_VENDOR_ID_SONY; 447 jog_dev->id.vendor = PCI_VENDOR_ID_SONY;
451 key_dev->dev.parent = &acpi_device->dev; 448 key_dev->dev.parent = &acpi_device->dev;
452 449
453 jog_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REL); 450 input_set_capability(jog_dev, EV_KEY, BTN_MIDDLE);
454 jog_dev->keybit[BIT_WORD(BTN_MOUSE)] = BIT_MASK(BTN_MIDDLE); 451 input_set_capability(jog_dev, EV_REL, REL_WHEEL);
455 jog_dev->relbit[0] = BIT_MASK(REL_WHEEL);
456 452
457 error = input_register_device(jog_dev); 453 error = input_register_device(jog_dev);
458 if (error) 454 if (error)
@@ -473,9 +469,6 @@ err_unregister_keydev:
473err_free_keydev: 469err_free_keydev:
474 input_free_device(key_dev); 470 input_free_device(key_dev);
475 471
476err_destroy_wq:
477 destroy_workqueue(sony_laptop_input.wq);
478
479err_free_kfifo: 472err_free_kfifo:
480 kfifo_free(&sony_laptop_input.fifo); 473 kfifo_free(&sony_laptop_input.fifo);
481 474
@@ -486,12 +479,23 @@ err_dec_users:
486 479
487static void sony_laptop_remove_input(void) 480static void sony_laptop_remove_input(void)
488{ 481{
489 /* cleanup only after the last user has gone */ 482 struct sony_laptop_keypress kp = { NULL };
483
484 /* Cleanup only after the last user has gone */
490 if (!atomic_dec_and_test(&sony_laptop_input.users)) 485 if (!atomic_dec_and_test(&sony_laptop_input.users))
491 return; 486 return;
492 487
493 /* flush workqueue first */ 488 del_timer_sync(&sony_laptop_input.release_key_timer);
494 flush_workqueue(sony_laptop_input.wq); 489
490 /*
491 * Generate key-up events for remaining keys. Note that we don't
492 * need locking since nobody is adding new events to the kfifo.
493 */
494 while (kfifo_out(&sony_laptop_input.fifo,
495 (unsigned char *)&kp, sizeof(kp)) == sizeof(kp)) {
496 input_report_key(kp.dev, kp.key, 0);
497 input_sync(kp.dev);
498 }
495 499
496 /* destroy input devs */ 500 /* destroy input devs */
497 input_unregister_device(sony_laptop_input.key_dev); 501 input_unregister_device(sony_laptop_input.key_dev);
@@ -502,7 +506,6 @@ static void sony_laptop_remove_input(void)
502 sony_laptop_input.jog_dev = NULL; 506 sony_laptop_input.jog_dev = NULL;
503 } 507 }
504 508
505 destroy_workqueue(sony_laptop_input.wq);
506 kfifo_free(&sony_laptop_input.fifo); 509 kfifo_free(&sony_laptop_input.fifo);
507} 510}
508 511
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index e7b0c3bcef89..c64e3528889b 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -1668,7 +1668,7 @@ static void tpacpi_remove_driver_attributes(struct device_driver *drv)
1668 * Table of recommended minimum BIOS versions 1668 * Table of recommended minimum BIOS versions
1669 * 1669 *
1670 * Reasons for listing: 1670 * Reasons for listing:
1671 * 1. Stable BIOS, listed because the unknown ammount of 1671 * 1. Stable BIOS, listed because the unknown amount of
1672 * bugs and bad ACPI behaviour on older versions 1672 * bugs and bad ACPI behaviour on older versions
1673 * 1673 *
1674 * 2. BIOS or EC fw with known bugs that trigger on Linux 1674 * 2. BIOS or EC fw with known bugs that trigger on Linux
@@ -7108,7 +7108,7 @@ static struct ibm_struct volume_driver_data = {
7108 * 7108 *
7109 * Fan speed changes of any sort (including those caused by the 7109 * Fan speed changes of any sort (including those caused by the
7110 * disengaged mode) are usually done slowly by the firmware as the 7110 * disengaged mode) are usually done slowly by the firmware as the
7111 * maximum ammount of fan duty cycle change per second seems to be 7111 * maximum amount of fan duty cycle change per second seems to be
7112 * limited. 7112 * limited.
7113 * 7113 *
7114 * Reading is not available if GFAN exists. 7114 * Reading is not available if GFAN exists.
diff --git a/drivers/platform/x86/topstar-laptop.c b/drivers/platform/x86/topstar-laptop.c
index 02f3d4e9e666..4d6516fded7e 100644
--- a/drivers/platform/x86/topstar-laptop.c
+++ b/drivers/platform/x86/topstar-laptop.c
@@ -46,7 +46,7 @@ static struct tps_key_entry topstar_keymap[] = {
46 { } 46 { }
47}; 47};
48 48
49static struct tps_key_entry *tps_get_key_by_scancode(int code) 49static struct tps_key_entry *tps_get_key_by_scancode(unsigned int code)
50{ 50{
51 struct tps_key_entry *key; 51 struct tps_key_entry *key;
52 52
@@ -57,7 +57,7 @@ static struct tps_key_entry *tps_get_key_by_scancode(int code)
57 return NULL; 57 return NULL;
58} 58}
59 59
60static struct tps_key_entry *tps_get_key_by_keycode(int code) 60static struct tps_key_entry *tps_get_key_by_keycode(unsigned int code)
61{ 61{
62 struct tps_key_entry *key; 62 struct tps_key_entry *key;
63 63
@@ -126,7 +126,8 @@ static int acpi_topstar_fncx_switch(struct acpi_device *device, bool state)
126 return 0; 126 return 0;
127} 127}
128 128
129static int topstar_getkeycode(struct input_dev *dev, int scancode, int *keycode) 129static int topstar_getkeycode(struct input_dev *dev,
130 unsigned int scancode, unsigned int *keycode)
130{ 131{
131 struct tps_key_entry *key = tps_get_key_by_scancode(scancode); 132 struct tps_key_entry *key = tps_get_key_by_scancode(scancode);
132 133
@@ -137,14 +138,12 @@ static int topstar_getkeycode(struct input_dev *dev, int scancode, int *keycode)
137 return 0; 138 return 0;
138} 139}
139 140
140static int topstar_setkeycode(struct input_dev *dev, int scancode, int keycode) 141static int topstar_setkeycode(struct input_dev *dev,
142 unsigned int scancode, unsigned int keycode)
141{ 143{
142 struct tps_key_entry *key; 144 struct tps_key_entry *key;
143 int old_keycode; 145 int old_keycode;
144 146
145 if (keycode < 0 || keycode > KEY_MAX)
146 return -EINVAL;
147
148 key = tps_get_key_by_scancode(scancode); 147 key = tps_get_key_by_scancode(scancode);
149 148
150 if (!key) 149 if (!key)
diff --git a/drivers/platform/x86/toshiba_acpi.c b/drivers/platform/x86/toshiba_acpi.c
index 405b969734d6..789240d1b577 100644
--- a/drivers/platform/x86/toshiba_acpi.c
+++ b/drivers/platform/x86/toshiba_acpi.c
@@ -745,7 +745,7 @@ static struct backlight_ops toshiba_backlight_data = {
745 .update_status = set_lcd_status, 745 .update_status = set_lcd_status,
746}; 746};
747 747
748static struct key_entry *toshiba_acpi_get_entry_by_scancode(int code) 748static struct key_entry *toshiba_acpi_get_entry_by_scancode(unsigned int code)
749{ 749{
750 struct key_entry *key; 750 struct key_entry *key;
751 751
@@ -756,7 +756,7 @@ static struct key_entry *toshiba_acpi_get_entry_by_scancode(int code)
756 return NULL; 756 return NULL;
757} 757}
758 758
759static struct key_entry *toshiba_acpi_get_entry_by_keycode(int code) 759static struct key_entry *toshiba_acpi_get_entry_by_keycode(unsigned int code)
760{ 760{
761 struct key_entry *key; 761 struct key_entry *key;
762 762
@@ -767,8 +767,8 @@ static struct key_entry *toshiba_acpi_get_entry_by_keycode(int code)
767 return NULL; 767 return NULL;
768} 768}
769 769
770static int toshiba_acpi_getkeycode(struct input_dev *dev, int scancode, 770static int toshiba_acpi_getkeycode(struct input_dev *dev,
771 int *keycode) 771 unsigned int scancode, unsigned int *keycode)
772{ 772{
773 struct key_entry *key = toshiba_acpi_get_entry_by_scancode(scancode); 773 struct key_entry *key = toshiba_acpi_get_entry_by_scancode(scancode);
774 774
@@ -780,14 +780,11 @@ static int toshiba_acpi_getkeycode(struct input_dev *dev, int scancode,
780 return -EINVAL; 780 return -EINVAL;
781} 781}
782 782
783static int toshiba_acpi_setkeycode(struct input_dev *dev, int scancode, 783static int toshiba_acpi_setkeycode(struct input_dev *dev,
784 int keycode) 784 unsigned int scancode, unsigned int keycode)
785{ 785{
786 struct key_entry *key; 786 struct key_entry *key;
787 int old_keycode; 787 unsigned int old_keycode;
788
789 if (keycode < 0 || keycode > KEY_MAX)
790 return -EINVAL;
791 788
792 key = toshiba_acpi_get_entry_by_scancode(scancode); 789 key = toshiba_acpi_get_entry_by_scancode(scancode);
793 if (key && key->type == KE_KEY) { 790 if (key && key->type == KE_KEY) {
diff --git a/drivers/pnp/base.h b/drivers/pnp/base.h
index 0b8d14050efa..0bab84ebb15d 100644
--- a/drivers/pnp/base.h
+++ b/drivers/pnp/base.h
@@ -166,6 +166,9 @@ struct pnp_resource *pnp_add_io_resource(struct pnp_dev *dev,
166struct pnp_resource *pnp_add_mem_resource(struct pnp_dev *dev, 166struct pnp_resource *pnp_add_mem_resource(struct pnp_dev *dev,
167 resource_size_t start, 167 resource_size_t start,
168 resource_size_t end, int flags); 168 resource_size_t end, int flags);
169struct pnp_resource *pnp_add_bus_resource(struct pnp_dev *dev,
170 resource_size_t start,
171 resource_size_t end);
169 172
170extern int pnp_debug; 173extern int pnp_debug;
171 174
diff --git a/drivers/pnp/interface.c b/drivers/pnp/interface.c
index 68b0c04987e4..cfaf5b73540b 100644
--- a/drivers/pnp/interface.c
+++ b/drivers/pnp/interface.c
@@ -278,9 +278,12 @@ static ssize_t pnp_show_current_resources(struct device *dmdev,
278 switch (pnp_resource_type(res)) { 278 switch (pnp_resource_type(res)) {
279 case IORESOURCE_IO: 279 case IORESOURCE_IO:
280 case IORESOURCE_MEM: 280 case IORESOURCE_MEM:
281 pnp_printf(buffer, " %#llx-%#llx\n", 281 case IORESOURCE_BUS:
282 pnp_printf(buffer, " %#llx-%#llx%s\n",
282 (unsigned long long) res->start, 283 (unsigned long long) res->start,
283 (unsigned long long) res->end); 284 (unsigned long long) res->end,
285 res->flags & IORESOURCE_WINDOW ?
286 " window" : "");
284 break; 287 break;
285 case IORESOURCE_IRQ: 288 case IORESOURCE_IRQ:
286 case IORESOURCE_DMA: 289 case IORESOURCE_DMA:
diff --git a/drivers/pnp/pnpacpi/rsparser.c b/drivers/pnp/pnpacpi/rsparser.c
index 5702b2c8691f..54514aa35b09 100644
--- a/drivers/pnp/pnpacpi/rsparser.c
+++ b/drivers/pnp/pnpacpi/rsparser.c
@@ -177,7 +177,8 @@ static int dma_flags(struct pnp_dev *dev, int type, int bus_master,
177} 177}
178 178
179static void pnpacpi_parse_allocated_ioresource(struct pnp_dev *dev, u64 start, 179static void pnpacpi_parse_allocated_ioresource(struct pnp_dev *dev, u64 start,
180 u64 len, int io_decode) 180 u64 len, int io_decode,
181 int window)
181{ 182{
182 int flags = 0; 183 int flags = 0;
183 u64 end = start + len - 1; 184 u64 end = start + len - 1;
@@ -186,6 +187,8 @@ static void pnpacpi_parse_allocated_ioresource(struct pnp_dev *dev, u64 start,
186 flags |= IORESOURCE_IO_16BIT_ADDR; 187 flags |= IORESOURCE_IO_16BIT_ADDR;
187 if (len == 0 || end >= 0x10003) 188 if (len == 0 || end >= 0x10003)
188 flags |= IORESOURCE_DISABLED; 189 flags |= IORESOURCE_DISABLED;
190 if (window)
191 flags |= IORESOURCE_WINDOW;
189 192
190 pnp_add_io_resource(dev, start, end, flags); 193 pnp_add_io_resource(dev, start, end, flags);
191} 194}
@@ -247,7 +250,7 @@ static void pnpacpi_parse_allocated_vendor(struct pnp_dev *dev,
247 250
248static void pnpacpi_parse_allocated_memresource(struct pnp_dev *dev, 251static void pnpacpi_parse_allocated_memresource(struct pnp_dev *dev,
249 u64 start, u64 len, 252 u64 start, u64 len,
250 int write_protect) 253 int write_protect, int window)
251{ 254{
252 int flags = 0; 255 int flags = 0;
253 u64 end = start + len - 1; 256 u64 end = start + len - 1;
@@ -256,15 +259,26 @@ static void pnpacpi_parse_allocated_memresource(struct pnp_dev *dev,
256 flags |= IORESOURCE_DISABLED; 259 flags |= IORESOURCE_DISABLED;
257 if (write_protect == ACPI_READ_WRITE_MEMORY) 260 if (write_protect == ACPI_READ_WRITE_MEMORY)
258 flags |= IORESOURCE_MEM_WRITEABLE; 261 flags |= IORESOURCE_MEM_WRITEABLE;
262 if (window)
263 flags |= IORESOURCE_WINDOW;
259 264
260 pnp_add_mem_resource(dev, start, end, flags); 265 pnp_add_mem_resource(dev, start, end, flags);
261} 266}
262 267
268static void pnpacpi_parse_allocated_busresource(struct pnp_dev *dev,
269 u64 start, u64 len)
270{
271 u64 end = start + len - 1;
272
273 pnp_add_bus_resource(dev, start, end);
274}
275
263static void pnpacpi_parse_allocated_address_space(struct pnp_dev *dev, 276static void pnpacpi_parse_allocated_address_space(struct pnp_dev *dev,
264 struct acpi_resource *res) 277 struct acpi_resource *res)
265{ 278{
266 struct acpi_resource_address64 addr, *p = &addr; 279 struct acpi_resource_address64 addr, *p = &addr;
267 acpi_status status; 280 acpi_status status;
281 int window;
268 282
269 status = acpi_resource_to_address64(res, p); 283 status = acpi_resource_to_address64(res, p);
270 if (!ACPI_SUCCESS(status)) { 284 if (!ACPI_SUCCESS(status)) {
@@ -273,37 +287,42 @@ static void pnpacpi_parse_allocated_address_space(struct pnp_dev *dev,
273 return; 287 return;
274 } 288 }
275 289
276 if (p->producer_consumer == ACPI_PRODUCER) 290 window = (p->producer_consumer == ACPI_PRODUCER) ? 1 : 0;
277 return;
278 291
279 if (p->resource_type == ACPI_MEMORY_RANGE) 292 if (p->resource_type == ACPI_MEMORY_RANGE)
280 pnpacpi_parse_allocated_memresource(dev, 293 pnpacpi_parse_allocated_memresource(dev,
281 p->minimum, p->address_length, 294 p->minimum, p->address_length,
282 p->info.mem.write_protect); 295 p->info.mem.write_protect, window);
283 else if (p->resource_type == ACPI_IO_RANGE) 296 else if (p->resource_type == ACPI_IO_RANGE)
284 pnpacpi_parse_allocated_ioresource(dev, 297 pnpacpi_parse_allocated_ioresource(dev,
285 p->minimum, p->address_length, 298 p->minimum, p->address_length,
286 p->granularity == 0xfff ? ACPI_DECODE_10 : 299 p->granularity == 0xfff ? ACPI_DECODE_10 :
287 ACPI_DECODE_16); 300 ACPI_DECODE_16, window);
301 else if (p->resource_type == ACPI_BUS_NUMBER_RANGE)
302 pnpacpi_parse_allocated_busresource(dev, p->minimum,
303 p->address_length);
288} 304}
289 305
290static void pnpacpi_parse_allocated_ext_address_space(struct pnp_dev *dev, 306static void pnpacpi_parse_allocated_ext_address_space(struct pnp_dev *dev,
291 struct acpi_resource *res) 307 struct acpi_resource *res)
292{ 308{
293 struct acpi_resource_extended_address64 *p = &res->data.ext_address64; 309 struct acpi_resource_extended_address64 *p = &res->data.ext_address64;
310 int window;
294 311
295 if (p->producer_consumer == ACPI_PRODUCER) 312 window = (p->producer_consumer == ACPI_PRODUCER) ? 1 : 0;
296 return;
297 313
298 if (p->resource_type == ACPI_MEMORY_RANGE) 314 if (p->resource_type == ACPI_MEMORY_RANGE)
299 pnpacpi_parse_allocated_memresource(dev, 315 pnpacpi_parse_allocated_memresource(dev,
300 p->minimum, p->address_length, 316 p->minimum, p->address_length,
301 p->info.mem.write_protect); 317 p->info.mem.write_protect, window);
302 else if (p->resource_type == ACPI_IO_RANGE) 318 else if (p->resource_type == ACPI_IO_RANGE)
303 pnpacpi_parse_allocated_ioresource(dev, 319 pnpacpi_parse_allocated_ioresource(dev,
304 p->minimum, p->address_length, 320 p->minimum, p->address_length,
305 p->granularity == 0xfff ? ACPI_DECODE_10 : 321 p->granularity == 0xfff ? ACPI_DECODE_10 :
306 ACPI_DECODE_16); 322 ACPI_DECODE_16, window);
323 else if (p->resource_type == ACPI_BUS_NUMBER_RANGE)
324 pnpacpi_parse_allocated_busresource(dev, p->minimum,
325 p->address_length);
307} 326}
308 327
309static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res, 328static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res,
@@ -368,7 +387,7 @@ static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res,
368 pnpacpi_parse_allocated_ioresource(dev, 387 pnpacpi_parse_allocated_ioresource(dev,
369 io->minimum, 388 io->minimum,
370 io->address_length, 389 io->address_length,
371 io->io_decode); 390 io->io_decode, 0);
372 break; 391 break;
373 392
374 case ACPI_RESOURCE_TYPE_START_DEPENDENT: 393 case ACPI_RESOURCE_TYPE_START_DEPENDENT:
@@ -380,7 +399,7 @@ static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res,
380 pnpacpi_parse_allocated_ioresource(dev, 399 pnpacpi_parse_allocated_ioresource(dev,
381 fixed_io->address, 400 fixed_io->address,
382 fixed_io->address_length, 401 fixed_io->address_length,
383 ACPI_DECODE_10); 402 ACPI_DECODE_10, 0);
384 break; 403 break;
385 404
386 case ACPI_RESOURCE_TYPE_VENDOR: 405 case ACPI_RESOURCE_TYPE_VENDOR:
@@ -396,21 +415,21 @@ static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res,
396 pnpacpi_parse_allocated_memresource(dev, 415 pnpacpi_parse_allocated_memresource(dev,
397 memory24->minimum, 416 memory24->minimum,
398 memory24->address_length, 417 memory24->address_length,
399 memory24->write_protect); 418 memory24->write_protect, 0);
400 break; 419 break;
401 case ACPI_RESOURCE_TYPE_MEMORY32: 420 case ACPI_RESOURCE_TYPE_MEMORY32:
402 memory32 = &res->data.memory32; 421 memory32 = &res->data.memory32;
403 pnpacpi_parse_allocated_memresource(dev, 422 pnpacpi_parse_allocated_memresource(dev,
404 memory32->minimum, 423 memory32->minimum,
405 memory32->address_length, 424 memory32->address_length,
406 memory32->write_protect); 425 memory32->write_protect, 0);
407 break; 426 break;
408 case ACPI_RESOURCE_TYPE_FIXED_MEMORY32: 427 case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
409 fixed_memory32 = &res->data.fixed_memory32; 428 fixed_memory32 = &res->data.fixed_memory32;
410 pnpacpi_parse_allocated_memresource(dev, 429 pnpacpi_parse_allocated_memresource(dev,
411 fixed_memory32->address, 430 fixed_memory32->address,
412 fixed_memory32->address_length, 431 fixed_memory32->address_length,
413 fixed_memory32->write_protect); 432 fixed_memory32->write_protect, 0);
414 break; 433 break;
415 case ACPI_RESOURCE_TYPE_ADDRESS16: 434 case ACPI_RESOURCE_TYPE_ADDRESS16:
416 case ACPI_RESOURCE_TYPE_ADDRESS32: 435 case ACPI_RESOURCE_TYPE_ADDRESS32:
diff --git a/drivers/pnp/resource.c b/drivers/pnp/resource.c
index 64d0596bafb5..5b277dbaacde 100644
--- a/drivers/pnp/resource.c
+++ b/drivers/pnp/resource.c
@@ -470,7 +470,8 @@ int pnp_check_dma(struct pnp_dev *dev, struct resource *res)
470unsigned long pnp_resource_type(struct resource *res) 470unsigned long pnp_resource_type(struct resource *res)
471{ 471{
472 return res->flags & (IORESOURCE_IO | IORESOURCE_MEM | 472 return res->flags & (IORESOURCE_IO | IORESOURCE_MEM |
473 IORESOURCE_IRQ | IORESOURCE_DMA); 473 IORESOURCE_IRQ | IORESOURCE_DMA |
474 IORESOURCE_BUS);
474} 475}
475 476
476struct resource *pnp_get_resource(struct pnp_dev *dev, 477struct resource *pnp_get_resource(struct pnp_dev *dev,
@@ -590,6 +591,30 @@ struct pnp_resource *pnp_add_mem_resource(struct pnp_dev *dev,
590 return pnp_res; 591 return pnp_res;
591} 592}
592 593
594struct pnp_resource *pnp_add_bus_resource(struct pnp_dev *dev,
595 resource_size_t start,
596 resource_size_t end)
597{
598 struct pnp_resource *pnp_res;
599 struct resource *res;
600
601 pnp_res = pnp_new_resource(dev);
602 if (!pnp_res) {
603 dev_err(&dev->dev, "can't add resource for BUS %#llx-%#llx\n",
604 (unsigned long long) start,
605 (unsigned long long) end);
606 return NULL;
607 }
608
609 res = &pnp_res->res;
610 res->flags = IORESOURCE_BUS;
611 res->start = start;
612 res->end = end;
613
614 pnp_dbg(&dev->dev, " add %pr\n", res);
615 return pnp_res;
616}
617
593/* 618/*
594 * Determine whether the specified resource is a possible configuration 619 * Determine whether the specified resource is a possible configuration
595 * for this device. 620 * for this device.
diff --git a/drivers/pnp/support.c b/drivers/pnp/support.c
index 9585c1c1cc36..f5beb24d036a 100644
--- a/drivers/pnp/support.c
+++ b/drivers/pnp/support.c
@@ -69,8 +69,10 @@ char *pnp_resource_type_name(struct resource *res)
69 return "irq"; 69 return "irq";
70 case IORESOURCE_DMA: 70 case IORESOURCE_DMA:
71 return "dma"; 71 return "dma";
72 case IORESOURCE_BUS:
73 return "bus";
72 } 74 }
73 return NULL; 75 return "unknown";
74} 76}
75 77
76void dbg_pnp_show_resources(struct pnp_dev *dev, char *desc) 78void dbg_pnp_show_resources(struct pnp_dev *dev, char *desc)
diff --git a/drivers/power/power_supply_sysfs.c b/drivers/power/power_supply_sysfs.c
index c790e0c77d4b..ff05e6189768 100644
--- a/drivers/power/power_supply_sysfs.c
+++ b/drivers/power/power_supply_sysfs.c
@@ -99,6 +99,7 @@ static struct device_attribute power_supply_attrs[] = {
99 POWER_SUPPLY_ATTR(present), 99 POWER_SUPPLY_ATTR(present),
100 POWER_SUPPLY_ATTR(online), 100 POWER_SUPPLY_ATTR(online),
101 POWER_SUPPLY_ATTR(technology), 101 POWER_SUPPLY_ATTR(technology),
102 POWER_SUPPLY_ATTR(cycle_count),
102 POWER_SUPPLY_ATTR(voltage_max), 103 POWER_SUPPLY_ATTR(voltage_max),
103 POWER_SUPPLY_ATTR(voltage_min), 104 POWER_SUPPLY_ATTR(voltage_min),
104 POWER_SUPPLY_ATTR(voltage_max_design), 105 POWER_SUPPLY_ATTR(voltage_max_design),
diff --git a/drivers/pps/Kconfig b/drivers/pps/Kconfig
index cc2eb8edb514..1afe4e03440f 100644
--- a/drivers/pps/Kconfig
+++ b/drivers/pps/Kconfig
@@ -30,4 +30,6 @@ config PPS_DEBUG
30 messages to the system log. Select this if you are having a 30 messages to the system log. Select this if you are having a
31 problem with PPS support and want to see more of what is going on. 31 problem with PPS support and want to see more of what is going on.
32 32
33source drivers/pps/clients/Kconfig
34
33endmenu 35endmenu
diff --git a/drivers/pps/Makefile b/drivers/pps/Makefile
index 19ea582f431d..98960ddd3188 100644
--- a/drivers/pps/Makefile
+++ b/drivers/pps/Makefile
@@ -4,5 +4,6 @@
4 4
5pps_core-y := pps.o kapi.o sysfs.o 5pps_core-y := pps.o kapi.o sysfs.o
6obj-$(CONFIG_PPS) := pps_core.o 6obj-$(CONFIG_PPS) := pps_core.o
7obj-y += clients/
7 8
8ccflags-$(CONFIG_PPS_DEBUG) := -DDEBUG 9ccflags-$(CONFIG_PPS_DEBUG) := -DDEBUG
diff --git a/drivers/pps/clients/Kconfig b/drivers/pps/clients/Kconfig
new file mode 100644
index 000000000000..4e801bd7254f
--- /dev/null
+++ b/drivers/pps/clients/Kconfig
@@ -0,0 +1,25 @@
1#
2# PPS clients configuration
3#
4
5if PPS
6
7comment "PPS clients support"
8
9config PPS_CLIENT_KTIMER
10 tristate "Kernel timer client (Testing client, use for debug)"
11 help
12 If you say yes here you get support for a PPS debugging client
13 which uses a kernel timer to generate the PPS signal.
14
15 This driver can also be built as a module. If so, the module
16 will be called pps-ktimer.
17
18config PPS_CLIENT_LDISC
19 tristate "PPS line discipline"
20 depends on PPS
21 help
22 If you say yes here you get support for a PPS source connected
23 with the CD (Carrier Detect) pin of your serial port.
24
25endif
diff --git a/drivers/pps/clients/Makefile b/drivers/pps/clients/Makefile
new file mode 100644
index 000000000000..812c9b19b430
--- /dev/null
+++ b/drivers/pps/clients/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for PPS clients.
3#
4
5obj-$(CONFIG_PPS_CLIENT_KTIMER) += pps-ktimer.o
6obj-$(CONFIG_PPS_CLIENT_LDISC) += pps-ldisc.o
7
8ifeq ($(CONFIG_PPS_DEBUG),y)
9EXTRA_CFLAGS += -DDEBUG
10endif
diff --git a/drivers/pps/clients/pps-ktimer.c b/drivers/pps/clients/pps-ktimer.c
new file mode 100644
index 000000000000..e7ef5b8186d0
--- /dev/null
+++ b/drivers/pps/clients/pps-ktimer.c
@@ -0,0 +1,123 @@
1/*
2 * pps-ktimer.c -- kernel timer test client
3 *
4 *
5 * Copyright (C) 2005-2006 Rodolfo Giometti <giometti@linux.it>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/time.h>
27#include <linux/timer.h>
28#include <linux/pps_kernel.h>
29
30/*
31 * Global variables
32 */
33
34static int source;
35static struct timer_list ktimer;
36
37/*
38 * The kernel timer
39 */
40
41static void pps_ktimer_event(unsigned long ptr)
42{
43 struct timespec __ts;
44 struct pps_ktime ts;
45
46 /* First of all we get the time stamp... */
47 getnstimeofday(&__ts);
48
49 pr_info("PPS event at %lu\n", jiffies);
50
51 /* ... and translate it to PPS time data struct */
52 ts.sec = __ts.tv_sec;
53 ts.nsec = __ts.tv_nsec;
54
55 pps_event(source, &ts, PPS_CAPTUREASSERT, NULL);
56
57 mod_timer(&ktimer, jiffies + HZ);
58}
59
60/*
61 * The echo function
62 */
63
64static void pps_ktimer_echo(int source, int event, void *data)
65{
66 pr_info("echo %s %s for source %d\n",
67 event & PPS_CAPTUREASSERT ? "assert" : "",
68 event & PPS_CAPTURECLEAR ? "clear" : "",
69 source);
70}
71
72/*
73 * The PPS info struct
74 */
75
76static struct pps_source_info pps_ktimer_info = {
77 .name = "ktimer",
78 .path = "",
79 .mode = PPS_CAPTUREASSERT | PPS_OFFSETASSERT |
80 PPS_ECHOASSERT |
81 PPS_CANWAIT | PPS_TSFMT_TSPEC,
82 .echo = pps_ktimer_echo,
83 .owner = THIS_MODULE,
84};
85
86/*
87 * Module staff
88 */
89
90static void __exit pps_ktimer_exit(void)
91{
92 del_timer_sync(&ktimer);
93 pps_unregister_source(source);
94
95 pr_info("ktimer PPS source unregistered\n");
96}
97
98static int __init pps_ktimer_init(void)
99{
100 int ret;
101
102 ret = pps_register_source(&pps_ktimer_info,
103 PPS_CAPTUREASSERT | PPS_OFFSETASSERT);
104 if (ret < 0) {
105 printk(KERN_ERR "cannot register ktimer source\n");
106 return ret;
107 }
108 source = ret;
109
110 setup_timer(&ktimer, pps_ktimer_event, 0);
111 mod_timer(&ktimer, jiffies + HZ);
112
113 pr_info("ktimer PPS source registered at %d\n", source);
114
115 return 0;
116}
117
118module_init(pps_ktimer_init);
119module_exit(pps_ktimer_exit);
120
121MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
122MODULE_DESCRIPTION("dummy PPS source by using a kernel timer (just for debug)");
123MODULE_LICENSE("GPL");
diff --git a/drivers/pps/clients/pps-ldisc.c b/drivers/pps/clients/pps-ldisc.c
new file mode 100644
index 000000000000..8e1932d29fd4
--- /dev/null
+++ b/drivers/pps/clients/pps-ldisc.c
@@ -0,0 +1,154 @@
1/*
2 * pps-ldisc.c -- PPS line discipline
3 *
4 *
5 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/serial_core.h>
24#include <linux/tty.h>
25#include <linux/pps_kernel.h>
26
27#define PPS_TTY_MAGIC 0x0001
28
29static void pps_tty_dcd_change(struct tty_struct *tty, unsigned int status,
30 struct timespec *ts)
31{
32 int id = (long)tty->disc_data;
33 struct timespec __ts;
34 struct pps_ktime pps_ts;
35
36 /* First of all we get the time stamp... */
37 getnstimeofday(&__ts);
38
39 /* Does caller give us a timestamp? */
40 if (ts) { /* Yes. Let's use it! */
41 pps_ts.sec = ts->tv_sec;
42 pps_ts.nsec = ts->tv_nsec;
43 } else { /* No. Do it ourself! */
44 pps_ts.sec = __ts.tv_sec;
45 pps_ts.nsec = __ts.tv_nsec;
46 }
47
48 /* Now do the PPS event report */
49 pps_event(id, &pps_ts, status ? PPS_CAPTUREASSERT : PPS_CAPTURECLEAR,
50 NULL);
51
52 pr_debug("PPS %s at %lu on source #%d\n",
53 status ? "assert" : "clear", jiffies, id);
54}
55
56static int (*alias_n_tty_open)(struct tty_struct *tty);
57
58static int pps_tty_open(struct tty_struct *tty)
59{
60 struct pps_source_info info;
61 struct tty_driver *drv = tty->driver;
62 int index = tty->index + drv->name_base;
63 int ret;
64
65 info.owner = THIS_MODULE;
66 info.dev = NULL;
67 snprintf(info.name, PPS_MAX_NAME_LEN, "%s%d", drv->driver_name, index);
68 snprintf(info.path, PPS_MAX_NAME_LEN, "/dev/%s%d", drv->name, index);
69 info.mode = PPS_CAPTUREBOTH | \
70 PPS_OFFSETASSERT | PPS_OFFSETCLEAR | \
71 PPS_CANWAIT | PPS_TSFMT_TSPEC;
72
73 ret = pps_register_source(&info, PPS_CAPTUREBOTH | \
74 PPS_OFFSETASSERT | PPS_OFFSETCLEAR);
75 if (ret < 0) {
76 pr_err("cannot register PPS source \"%s\"\n", info.path);
77 return ret;
78 }
79 tty->disc_data = (void *)(long)ret;
80
81 /* Should open N_TTY ldisc too */
82 ret = alias_n_tty_open(tty);
83 if (ret < 0)
84 pps_unregister_source((long)tty->disc_data);
85
86 pr_info("PPS source #%d \"%s\" added\n", ret, info.path);
87
88 return 0;
89}
90
91static void (*alias_n_tty_close)(struct tty_struct *tty);
92
93static void pps_tty_close(struct tty_struct *tty)
94{
95 int id = (long)tty->disc_data;
96
97 pps_unregister_source(id);
98 alias_n_tty_close(tty);
99
100 pr_info("PPS source #%d removed\n", id);
101}
102
103static struct tty_ldisc_ops pps_ldisc_ops;
104
105/*
106 * Module stuff
107 */
108
109static int __init pps_tty_init(void)
110{
111 int err;
112
113 /* Inherit the N_TTY's ops */
114 n_tty_inherit_ops(&pps_ldisc_ops);
115
116 /* Save N_TTY's open()/close() methods */
117 alias_n_tty_open = pps_ldisc_ops.open;
118 alias_n_tty_close = pps_ldisc_ops.close;
119
120 /* Init PPS_TTY data */
121 pps_ldisc_ops.owner = THIS_MODULE;
122 pps_ldisc_ops.magic = PPS_TTY_MAGIC;
123 pps_ldisc_ops.name = "pps_tty";
124 pps_ldisc_ops.dcd_change = pps_tty_dcd_change;
125 pps_ldisc_ops.open = pps_tty_open;
126 pps_ldisc_ops.close = pps_tty_close;
127
128 err = tty_register_ldisc(N_PPS, &pps_ldisc_ops);
129 if (err)
130 pr_err("can't register PPS line discipline\n");
131 else
132 pr_info("PPS line discipline registered\n");
133
134 return err;
135}
136
137static void __exit pps_tty_cleanup(void)
138{
139 int err;
140
141 err = tty_unregister_ldisc(N_PPS);
142 if (err)
143 pr_err("can't unregister PPS line discipline\n");
144 else
145 pr_info("PPS line discipline removed\n");
146}
147
148module_init(pps_tty_init);
149module_exit(pps_tty_cleanup);
150
151MODULE_ALIAS_LDISC(N_PPS);
152MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
153MODULE_DESCRIPTION("PPS TTY device driver");
154MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/hctosys.c b/drivers/rtc/hctosys.c
index 33c0e98243ee..bc90b091f195 100644
--- a/drivers/rtc/hctosys.c
+++ b/drivers/rtc/hctosys.c
@@ -22,48 +22,57 @@
22 * the best guess is to add 0.5s. 22 * the best guess is to add 0.5s.
23 */ 23 */
24 24
25int rtc_hctosys_ret = -ENODEV;
26
25static int __init rtc_hctosys(void) 27static int __init rtc_hctosys(void)
26{ 28{
27 int err; 29 int err = -ENODEV;
28 struct rtc_time tm; 30 struct rtc_time tm;
31 struct timespec tv = {
32 .tv_nsec = NSEC_PER_SEC >> 1,
33 };
29 struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE); 34 struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
30 35
31 if (rtc == NULL) { 36 if (rtc == NULL) {
32 printk("%s: unable to open rtc device (%s)\n", 37 pr_err("%s: unable to open rtc device (%s)\n",
33 __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); 38 __FILE__, CONFIG_RTC_HCTOSYS_DEVICE);
34 return -ENODEV; 39 goto err_open;
35 } 40 }
36 41
37 err = rtc_read_time(rtc, &tm); 42 err = rtc_read_time(rtc, &tm);
38 if (err == 0) { 43 if (err) {
39 err = rtc_valid_tm(&tm); 44 dev_err(rtc->dev.parent,
40 if (err == 0) { 45 "hctosys: unable to read the hardware clock\n");
41 struct timespec tv; 46 goto err_read;
42 47
43 tv.tv_nsec = NSEC_PER_SEC >> 1; 48 }
44 49
45 rtc_tm_to_time(&tm, &tv.tv_sec); 50 err = rtc_valid_tm(&tm);
51 if (err) {
52 dev_err(rtc->dev.parent,
53 "hctosys: invalid date/time\n");
54 goto err_invalid;
55 }
46 56
47 do_settimeofday(&tv); 57 rtc_tm_to_time(&tm, &tv.tv_sec);
48 58
49 dev_info(rtc->dev.parent, 59 do_settimeofday(&tv);
50 "setting system clock to "
51 "%d-%02d-%02d %02d:%02d:%02d UTC (%u)\n",
52 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
53 tm.tm_hour, tm.tm_min, tm.tm_sec,
54 (unsigned int) tv.tv_sec);
55 }
56 else
57 dev_err(rtc->dev.parent,
58 "hctosys: invalid date/time\n");
59 }
60 else
61 dev_err(rtc->dev.parent,
62 "hctosys: unable to read the hardware clock\n");
63 60
61 dev_info(rtc->dev.parent,
62 "setting system clock to "
63 "%d-%02d-%02d %02d:%02d:%02d UTC (%u)\n",
64 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
65 tm.tm_hour, tm.tm_min, tm.tm_sec,
66 (unsigned int) tv.tv_sec);
67
68err_invalid:
69err_read:
64 rtc_class_close(rtc); 70 rtc_class_close(rtc);
65 71
66 return 0; 72err_open:
73 rtc_hctosys_ret = err;
74
75 return err;
67} 76}
68 77
69late_initcall(rtc_hctosys); 78late_initcall(rtc_hctosys);
diff --git a/drivers/rtc/rtc-ds1742.c b/drivers/rtc/rtc-ds1742.c
index a1273360a44e..cad9ceb89baf 100644
--- a/drivers/rtc/rtc-ds1742.c
+++ b/drivers/rtc/rtc-ds1742.c
@@ -184,6 +184,7 @@ static int __devinit ds1742_rtc_probe(struct platform_device *pdev)
184 pdata->size_nvram = pdata->size - RTC_SIZE; 184 pdata->size_nvram = pdata->size - RTC_SIZE;
185 pdata->ioaddr_rtc = ioaddr + pdata->size_nvram; 185 pdata->ioaddr_rtc = ioaddr + pdata->size_nvram;
186 186
187 sysfs_bin_attr_init(&pdata->nvram_attr);
187 pdata->nvram_attr.attr.name = "nvram"; 188 pdata->nvram_attr.attr.name = "nvram";
188 pdata->nvram_attr.attr.mode = S_IRUGO | S_IWUSR; 189 pdata->nvram_attr.attr.mode = S_IRUGO | S_IWUSR;
189 pdata->nvram_attr.read = ds1742_nvram_read; 190 pdata->nvram_attr.read = ds1742_nvram_read;
diff --git a/drivers/rtc/rtc-sysfs.c b/drivers/rtc/rtc-sysfs.c
index 7dd23a6fc825..380083ca572f 100644
--- a/drivers/rtc/rtc-sysfs.c
+++ b/drivers/rtc/rtc-sysfs.c
@@ -107,8 +107,9 @@ rtc_sysfs_show_hctosys(struct device *dev, struct device_attribute *attr,
107 char *buf) 107 char *buf)
108{ 108{
109#ifdef CONFIG_RTC_HCTOSYS_DEVICE 109#ifdef CONFIG_RTC_HCTOSYS_DEVICE
110 if (strcmp(dev_name(&to_rtc_device(dev)->dev), 110 if (rtc_hctosys_ret == 0 &&
111 CONFIG_RTC_HCTOSYS_DEVICE) == 0) 111 strcmp(dev_name(&to_rtc_device(dev)->dev),
112 CONFIG_RTC_HCTOSYS_DEVICE) == 0)
112 return sprintf(buf, "1\n"); 113 return sprintf(buf, "1\n");
113 else 114 else
114#endif 115#endif
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index 4951aa82e9f5..bbea90baf98f 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -26,6 +26,7 @@
26#include <asm/ebcdic.h> 26#include <asm/ebcdic.h>
27#include <asm/idals.h> 27#include <asm/idals.h>
28#include <asm/itcw.h> 28#include <asm/itcw.h>
29#include <asm/diag.h>
29 30
30/* This is ugly... */ 31/* This is ugly... */
31#define PRINTK_HEADER "dasd:" 32#define PRINTK_HEADER "dasd:"
@@ -2212,6 +2213,13 @@ static int dasd_open(struct block_device *bdev, fmode_t mode)
2212 goto out; 2213 goto out;
2213 } 2214 }
2214 2215
2216 if ((mode & FMODE_WRITE) &&
2217 (test_bit(DASD_FLAG_DEVICE_RO, &base->flags) ||
2218 (base->features & DASD_FEATURE_READONLY))) {
2219 rc = -EROFS;
2220 goto out;
2221 }
2222
2215 return 0; 2223 return 0;
2216 2224
2217out: 2225out:
@@ -2289,6 +2297,34 @@ dasd_exit(void)
2289 * SECTION: common functions for ccw_driver use 2297 * SECTION: common functions for ccw_driver use
2290 */ 2298 */
2291 2299
2300/*
2301 * Is the device read-only?
2302 * Note that this function does not report the setting of the
2303 * readonly device attribute, but how it is configured in z/VM.
2304 */
2305int dasd_device_is_ro(struct dasd_device *device)
2306{
2307 struct ccw_dev_id dev_id;
2308 struct diag210 diag_data;
2309 int rc;
2310
2311 if (!MACHINE_IS_VM)
2312 return 0;
2313 ccw_device_get_id(device->cdev, &dev_id);
2314 memset(&diag_data, 0, sizeof(diag_data));
2315 diag_data.vrdcdvno = dev_id.devno;
2316 diag_data.vrdclen = sizeof(diag_data);
2317 rc = diag210(&diag_data);
2318 if (rc == 0 || rc == 2) {
2319 return diag_data.vrdcvfla & 0x80;
2320 } else {
2321 DBF_EVENT(DBF_WARNING, "diag210 failed for dev=%04x with rc=%d",
2322 dev_id.devno, rc);
2323 return 0;
2324 }
2325}
2326EXPORT_SYMBOL_GPL(dasd_device_is_ro);
2327
2292static void dasd_generic_auto_online(void *data, async_cookie_t cookie) 2328static void dasd_generic_auto_online(void *data, async_cookie_t cookie)
2293{ 2329{
2294 struct ccw_device *cdev = data; 2330 struct ccw_device *cdev = data;
diff --git a/drivers/s390/block/dasd_3990_erp.c b/drivers/s390/block/dasd_3990_erp.c
index 44796ba4eb9b..51224f76b980 100644
--- a/drivers/s390/block/dasd_3990_erp.c
+++ b/drivers/s390/block/dasd_3990_erp.c
@@ -1045,6 +1045,10 @@ dasd_3990_erp_com_rej(struct dasd_ccw_req * erp, char *sense)
1045 1045
1046 erp->retries = 5; 1046 erp->retries = 5;
1047 1047
1048 } else if (sense[1] & SNS1_WRITE_INHIBITED) {
1049 dev_err(&device->cdev->dev, "An I/O request was rejected"
1050 " because writing is inhibited\n");
1051 erp = dasd_3990_erp_cleanup(erp, DASD_CQR_FAILED);
1048 } else { 1052 } else {
1049 /* fatal error - set status to FAILED 1053 /* fatal error - set status to FAILED
1050 internal error 09 - Command Reject */ 1054 internal error 09 - Command Reject */
diff --git a/drivers/s390/block/dasd_devmap.c b/drivers/s390/block/dasd_devmap.c
index d49766f3b940..8e23919c8704 100644
--- a/drivers/s390/block/dasd_devmap.c
+++ b/drivers/s390/block/dasd_devmap.c
@@ -742,6 +742,7 @@ dasd_ro_store(struct device *dev, struct device_attribute *attr,
742 const char *buf, size_t count) 742 const char *buf, size_t count)
743{ 743{
744 struct dasd_devmap *devmap; 744 struct dasd_devmap *devmap;
745 struct dasd_device *device;
745 int val; 746 int val;
746 char *endp; 747 char *endp;
747 748
@@ -758,12 +759,14 @@ dasd_ro_store(struct device *dev, struct device_attribute *attr,
758 devmap->features |= DASD_FEATURE_READONLY; 759 devmap->features |= DASD_FEATURE_READONLY;
759 else 760 else
760 devmap->features &= ~DASD_FEATURE_READONLY; 761 devmap->features &= ~DASD_FEATURE_READONLY;
761 if (devmap->device) 762 device = devmap->device;
762 devmap->device->features = devmap->features; 763 if (device) {
763 if (devmap->device && devmap->device->block 764 device->features = devmap->features;
764 && devmap->device->block->gdp) 765 val = val || test_bit(DASD_FLAG_DEVICE_RO, &device->flags);
765 set_disk_ro(devmap->device->block->gdp, val); 766 }
766 spin_unlock(&dasd_devmap_lock); 767 spin_unlock(&dasd_devmap_lock);
768 if (device && device->block && device->block->gdp)
769 set_disk_ro(device->block->gdp, val);
767 return count; 770 return count;
768} 771}
769 772
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c
index 6e14863f5c70..687f323cdc38 100644
--- a/drivers/s390/block/dasd_diag.c
+++ b/drivers/s390/block/dasd_diag.c
@@ -145,12 +145,10 @@ dasd_diag_erp(struct dasd_device *device)
145 mdsk_term_io(device); 145 mdsk_term_io(device);
146 rc = mdsk_init_io(device, device->block->bp_block, 0, NULL); 146 rc = mdsk_init_io(device, device->block->bp_block, 0, NULL);
147 if (rc == 4) { 147 if (rc == 4) {
148 if (!(device->features & DASD_FEATURE_READONLY)) { 148 if (!(test_and_set_bit(DASD_FLAG_DEVICE_RO, &device->flags)))
149 pr_warning("%s: The access mode of a DIAG device " 149 pr_warning("%s: The access mode of a DIAG device "
150 "changed to read-only\n", 150 "changed to read-only\n",
151 dev_name(&device->cdev->dev)); 151 dev_name(&device->cdev->dev));
152 device->features |= DASD_FEATURE_READONLY;
153 }
154 rc = 0; 152 rc = 0;
155 } 153 }
156 if (rc) 154 if (rc)
@@ -449,7 +447,7 @@ dasd_diag_check_device(struct dasd_device *device)
449 rc = -EIO; 447 rc = -EIO;
450 } else { 448 } else {
451 if (rc == 4) 449 if (rc == 4)
452 device->features |= DASD_FEATURE_READONLY; 450 set_bit(DASD_FLAG_DEVICE_RO, &device->flags);
453 pr_info("%s: New DASD with %ld byte/block, total size %ld " 451 pr_info("%s: New DASD with %ld byte/block, total size %ld "
454 "KB%s\n", dev_name(&device->cdev->dev), 452 "KB%s\n", dev_name(&device->cdev->dev),
455 (unsigned long) block->bp_block, 453 (unsigned long) block->bp_block,
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 1cca21aafaba..01f4e7a34aa8 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -1089,6 +1089,7 @@ dasd_eckd_check_characteristics(struct dasd_device *device)
1089 struct dasd_eckd_private *private; 1089 struct dasd_eckd_private *private;
1090 struct dasd_block *block; 1090 struct dasd_block *block;
1091 int is_known, rc; 1091 int is_known, rc;
1092 int readonly;
1092 1093
1093 if (!ccw_device_is_pathgroup(device->cdev)) { 1094 if (!ccw_device_is_pathgroup(device->cdev)) {
1094 dev_warn(&device->cdev->dev, 1095 dev_warn(&device->cdev->dev,
@@ -1182,15 +1183,20 @@ dasd_eckd_check_characteristics(struct dasd_device *device)
1182 else 1183 else
1183 private->real_cyl = private->rdc_data.no_cyl; 1184 private->real_cyl = private->rdc_data.no_cyl;
1184 1185
1186 readonly = dasd_device_is_ro(device);
1187 if (readonly)
1188 set_bit(DASD_FLAG_DEVICE_RO, &device->flags);
1189
1185 dev_info(&device->cdev->dev, "New DASD %04X/%02X (CU %04X/%02X) " 1190 dev_info(&device->cdev->dev, "New DASD %04X/%02X (CU %04X/%02X) "
1186 "with %d cylinders, %d heads, %d sectors\n", 1191 "with %d cylinders, %d heads, %d sectors%s\n",
1187 private->rdc_data.dev_type, 1192 private->rdc_data.dev_type,
1188 private->rdc_data.dev_model, 1193 private->rdc_data.dev_model,
1189 private->rdc_data.cu_type, 1194 private->rdc_data.cu_type,
1190 private->rdc_data.cu_model.model, 1195 private->rdc_data.cu_model.model,
1191 private->real_cyl, 1196 private->real_cyl,
1192 private->rdc_data.trk_per_cyl, 1197 private->rdc_data.trk_per_cyl,
1193 private->rdc_data.sec_per_trk); 1198 private->rdc_data.sec_per_trk,
1199 readonly ? ", read-only device" : "");
1194 return 0; 1200 return 0;
1195 1201
1196out_err3: 1202out_err3:
@@ -2839,8 +2845,13 @@ static int dasd_symm_io(struct dasd_device *device, void __user *argp)
2839 char *psf_data, *rssd_result; 2845 char *psf_data, *rssd_result;
2840 struct dasd_ccw_req *cqr; 2846 struct dasd_ccw_req *cqr;
2841 struct ccw1 *ccw; 2847 struct ccw1 *ccw;
2848 char psf0, psf1;
2842 int rc; 2849 int rc;
2843 2850
2851 if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO))
2852 return -EACCES;
2853 psf0 = psf1 = 0;
2854
2844 /* Copy parms from caller */ 2855 /* Copy parms from caller */
2845 rc = -EFAULT; 2856 rc = -EFAULT;
2846 if (copy_from_user(&usrparm, argp, sizeof(usrparm))) 2857 if (copy_from_user(&usrparm, argp, sizeof(usrparm)))
@@ -2869,12 +2880,8 @@ static int dasd_symm_io(struct dasd_device *device, void __user *argp)
2869 (void __user *)(unsigned long) usrparm.psf_data, 2880 (void __user *)(unsigned long) usrparm.psf_data,
2870 usrparm.psf_data_len)) 2881 usrparm.psf_data_len))
2871 goto out_free; 2882 goto out_free;
2872 2883 psf0 = psf_data[0];
2873 /* sanity check on syscall header */ 2884 psf1 = psf_data[1];
2874 if (psf_data[0] != 0x17 && psf_data[1] != 0xce) {
2875 rc = -EINVAL;
2876 goto out_free;
2877 }
2878 2885
2879 /* setup CCWs for PSF + RSSD */ 2886 /* setup CCWs for PSF + RSSD */
2880 cqr = dasd_smalloc_request(DASD_ECKD_MAGIC, 2 , 0, device); 2887 cqr = dasd_smalloc_request(DASD_ECKD_MAGIC, 2 , 0, device);
@@ -2925,7 +2932,9 @@ out_free:
2925 kfree(rssd_result); 2932 kfree(rssd_result);
2926 kfree(psf_data); 2933 kfree(psf_data);
2927out: 2934out:
2928 DBF_DEV_EVENT(DBF_WARNING, device, "Symmetrix ioctl: rc=%d", rc); 2935 DBF_DEV_EVENT(DBF_WARNING, device,
2936 "Symmetrix ioctl (0x%02x 0x%02x): rc=%d",
2937 (int) psf0, (int) psf1, rc);
2929 return rc; 2938 return rc;
2930} 2939}
2931 2940
diff --git a/drivers/s390/block/dasd_fba.c b/drivers/s390/block/dasd_fba.c
index 0f152444ac77..37282b90eecc 100644
--- a/drivers/s390/block/dasd_fba.c
+++ b/drivers/s390/block/dasd_fba.c
@@ -124,6 +124,7 @@ dasd_fba_check_characteristics(struct dasd_device *device)
124 struct dasd_fba_private *private; 124 struct dasd_fba_private *private;
125 struct ccw_device *cdev = device->cdev; 125 struct ccw_device *cdev = device->cdev;
126 int rc; 126 int rc;
127 int readonly;
127 128
128 private = (struct dasd_fba_private *) device->private; 129 private = (struct dasd_fba_private *) device->private;
129 if (!private) { 130 if (!private) {
@@ -162,16 +163,21 @@ dasd_fba_check_characteristics(struct dasd_device *device)
162 return rc; 163 return rc;
163 } 164 }
164 165
166 readonly = dasd_device_is_ro(device);
167 if (readonly)
168 set_bit(DASD_FLAG_DEVICE_RO, &device->flags);
169
165 dev_info(&device->cdev->dev, 170 dev_info(&device->cdev->dev,
166 "New FBA DASD %04X/%02X (CU %04X/%02X) with %d MB " 171 "New FBA DASD %04X/%02X (CU %04X/%02X) with %d MB "
167 "and %d B/blk\n", 172 "and %d B/blk%s\n",
168 cdev->id.dev_type, 173 cdev->id.dev_type,
169 cdev->id.dev_model, 174 cdev->id.dev_model,
170 cdev->id.cu_type, 175 cdev->id.cu_type,
171 cdev->id.cu_model, 176 cdev->id.cu_model,
172 ((private->rdc_data.blk_bdsa * 177 ((private->rdc_data.blk_bdsa *
173 (private->rdc_data.blk_size >> 9)) >> 11), 178 (private->rdc_data.blk_size >> 9)) >> 11),
174 private->rdc_data.blk_size); 179 private->rdc_data.blk_size,
180 readonly ? ", read-only device" : "");
175 return 0; 181 return 0;
176} 182}
177 183
diff --git a/drivers/s390/block/dasd_genhd.c b/drivers/s390/block/dasd_genhd.c
index 94f92a1247f2..30a1ca3d08b7 100644
--- a/drivers/s390/block/dasd_genhd.c
+++ b/drivers/s390/block/dasd_genhd.c
@@ -70,7 +70,8 @@ int dasd_gendisk_alloc(struct dasd_block *block)
70 } 70 }
71 len += sprintf(gdp->disk_name + len, "%c", 'a'+(base->devindex%26)); 71 len += sprintf(gdp->disk_name + len, "%c", 'a'+(base->devindex%26));
72 72
73 if (block->base->features & DASD_FEATURE_READONLY) 73 if (base->features & DASD_FEATURE_READONLY ||
74 test_bit(DASD_FLAG_DEVICE_RO, &base->flags))
74 set_disk_ro(gdp, 1); 75 set_disk_ro(gdp, 1);
75 gdp->private_data = block; 76 gdp->private_data = block;
76 gdp->queue = block->request_queue; 77 gdp->queue = block->request_queue;
diff --git a/drivers/s390/block/dasd_int.h b/drivers/s390/block/dasd_int.h
index ed73ce550822..a91d4a97d4f2 100644
--- a/drivers/s390/block/dasd_int.h
+++ b/drivers/s390/block/dasd_int.h
@@ -436,6 +436,10 @@ struct dasd_block {
436#define DASD_FLAG_OFFLINE 3 /* device is in offline processing */ 436#define DASD_FLAG_OFFLINE 3 /* device is in offline processing */
437#define DASD_FLAG_EER_SNSS 4 /* A SNSS is required */ 437#define DASD_FLAG_EER_SNSS 4 /* A SNSS is required */
438#define DASD_FLAG_EER_IN_USE 5 /* A SNSS request is running */ 438#define DASD_FLAG_EER_IN_USE 5 /* A SNSS request is running */
439#define DASD_FLAG_DEVICE_RO 6 /* The device itself is read-only. Don't
440 * confuse this with the user specified
441 * read-only feature.
442 */
439 443
440void dasd_put_device_wake(struct dasd_device *); 444void dasd_put_device_wake(struct dasd_device *);
441 445
@@ -609,6 +613,9 @@ char *dasd_get_sense(struct irb *);
609void dasd_device_set_stop_bits(struct dasd_device *, int); 613void dasd_device_set_stop_bits(struct dasd_device *, int);
610void dasd_device_remove_stop_bits(struct dasd_device *, int); 614void dasd_device_remove_stop_bits(struct dasd_device *, int);
611 615
616int dasd_device_is_ro(struct dasd_device *);
617
618
612/* externals in dasd_devmap.c */ 619/* externals in dasd_devmap.c */
613extern int dasd_max_devindex; 620extern int dasd_max_devindex;
614extern int dasd_probeonly; 621extern int dasd_probeonly;
diff --git a/drivers/s390/block/dasd_ioctl.c b/drivers/s390/block/dasd_ioctl.c
index 7039d9cf0fb4..3479f8158a1b 100644
--- a/drivers/s390/block/dasd_ioctl.c
+++ b/drivers/s390/block/dasd_ioctl.c
@@ -199,7 +199,8 @@ dasd_ioctl_format(struct block_device *bdev, void __user *argp)
199 if (!argp) 199 if (!argp)
200 return -EINVAL; 200 return -EINVAL;
201 201
202 if (block->base->features & DASD_FEATURE_READONLY) 202 if (block->base->features & DASD_FEATURE_READONLY ||
203 test_bit(DASD_FLAG_DEVICE_RO, &block->base->flags))
203 return -EROFS; 204 return -EROFS;
204 if (copy_from_user(&fdata, argp, sizeof(struct format_data_t))) 205 if (copy_from_user(&fdata, argp, sizeof(struct format_data_t)))
205 return -EFAULT; 206 return -EFAULT;
@@ -349,7 +350,8 @@ dasd_ioctl_set_ro(struct block_device *bdev, void __user *argp)
349 return -EINVAL; 350 return -EINVAL;
350 if (get_user(intval, (int __user *)argp)) 351 if (get_user(intval, (int __user *)argp))
351 return -EFAULT; 352 return -EFAULT;
352 353 if (!intval && test_bit(DASD_FLAG_DEVICE_RO, &block->base->flags))
354 return -EROFS;
353 set_disk_ro(bdev->bd_disk, intval); 355 set_disk_ro(bdev->bd_disk, intval);
354 return dasd_set_feature(block->base->cdev, DASD_FEATURE_READONLY, intval); 356 return dasd_set_feature(block->base->cdev, DASD_FEATURE_READONLY, intval);
355} 357}
diff --git a/drivers/s390/char/raw3270.c b/drivers/s390/char/raw3270.c
index 62ddf5202b79..2a4c566456e7 100644
--- a/drivers/s390/char/raw3270.c
+++ b/drivers/s390/char/raw3270.c
@@ -373,7 +373,7 @@ raw3270_irq (struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
373 rq->rc = ccw_device_start(rp->cdev, &rq->ccw, 373 rq->rc = ccw_device_start(rp->cdev, &rq->ccw,
374 (unsigned long) rq, 0, 0); 374 (unsigned long) rq, 0, 0);
375 if (rq->rc == 0) 375 if (rq->rc == 0)
376 return; /* Sucessfully restarted. */ 376 return; /* Successfully restarted. */
377 break; 377 break;
378 case RAW3270_IO_STOP: 378 case RAW3270_IO_STOP:
379 if (!rq) 379 if (!rq)
diff --git a/drivers/s390/char/sclp.c b/drivers/s390/char/sclp.c
index ec88c59842e3..f6d72e1f2a38 100644
--- a/drivers/s390/char/sclp.c
+++ b/drivers/s390/char/sclp.c
@@ -196,7 +196,7 @@ __sclp_start_request(struct sclp_req *req)
196 req->start_count++; 196 req->start_count++;
197 197
198 if (rc == 0) { 198 if (rc == 0) {
199 /* Sucessfully started request */ 199 /* Successfully started request */
200 req->status = SCLP_REQ_RUNNING; 200 req->status = SCLP_REQ_RUNNING;
201 sclp_running_state = sclp_running_state_running; 201 sclp_running_state = sclp_running_state_running;
202 __sclp_set_request_timer(SCLP_RETRY_INTERVAL * HZ, 202 __sclp_set_request_timer(SCLP_RETRY_INTERVAL * HZ,
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c
index c6abb75c4615..6d229f3523a0 100644
--- a/drivers/s390/cio/device.c
+++ b/drivers/s390/cio/device.c
@@ -764,7 +764,7 @@ static void sch_create_and_recog_new_device(struct subchannel *sch)
764static void io_subchannel_register(struct ccw_device *cdev) 764static void io_subchannel_register(struct ccw_device *cdev)
765{ 765{
766 struct subchannel *sch; 766 struct subchannel *sch;
767 int ret; 767 int ret, adjust_init_count = 1;
768 unsigned long flags; 768 unsigned long flags;
769 769
770 sch = to_subchannel(cdev->dev.parent); 770 sch = to_subchannel(cdev->dev.parent);
@@ -793,6 +793,7 @@ static void io_subchannel_register(struct ccw_device *cdev)
793 cdev->private->dev_id.ssid, 793 cdev->private->dev_id.ssid,
794 cdev->private->dev_id.devno); 794 cdev->private->dev_id.devno);
795 } 795 }
796 adjust_init_count = 0;
796 goto out; 797 goto out;
797 } 798 }
798 /* 799 /*
@@ -818,7 +819,7 @@ out:
818 cdev->private->flags.recog_done = 1; 819 cdev->private->flags.recog_done = 1;
819 wake_up(&cdev->private->wait_q); 820 wake_up(&cdev->private->wait_q);
820out_err: 821out_err:
821 if (atomic_dec_and_test(&ccw_device_init_count)) 822 if (adjust_init_count && atomic_dec_and_test(&ccw_device_init_count))
822 wake_up(&ccw_device_init_wq); 823 wake_up(&ccw_device_init_wq);
823} 824}
824 825
diff --git a/drivers/s390/cio/qdio_debug.c b/drivers/s390/cio/qdio_debug.c
index c94eb2a0fa2e..6ce83f56d537 100644
--- a/drivers/s390/cio/qdio_debug.c
+++ b/drivers/s390/cio/qdio_debug.c
@@ -33,7 +33,6 @@ void qdio_allocate_dbf(struct qdio_initialize *init_data,
33 DBF_HEX(&init_data->input_handler, sizeof(void *)); 33 DBF_HEX(&init_data->input_handler, sizeof(void *));
34 DBF_HEX(&init_data->output_handler, sizeof(void *)); 34 DBF_HEX(&init_data->output_handler, sizeof(void *));
35 DBF_HEX(&init_data->int_parm, sizeof(long)); 35 DBF_HEX(&init_data->int_parm, sizeof(long));
36 DBF_HEX(&init_data->flags, sizeof(long));
37 DBF_HEX(&init_data->input_sbal_addr_array, sizeof(void *)); 36 DBF_HEX(&init_data->input_sbal_addr_array, sizeof(void *));
38 DBF_HEX(&init_data->output_sbal_addr_array, sizeof(void *)); 37 DBF_HEX(&init_data->output_sbal_addr_array, sizeof(void *));
39 DBF_EVENT("irq:%8lx", (unsigned long)irq_ptr); 38 DBF_EVENT("irq:%8lx", (unsigned long)irq_ptr);
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c
index 232ef047ba34..4f8f74311778 100644
--- a/drivers/s390/cio/qdio_main.c
+++ b/drivers/s390/cio/qdio_main.c
@@ -588,10 +588,11 @@ static void qdio_kick_handler(struct qdio_q *q)
588 if (q->is_input_q) { 588 if (q->is_input_q) {
589 qperf_inc(q, inbound_handler); 589 qperf_inc(q, inbound_handler);
590 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); 590 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
591 } else 591 } else {
592 qperf_inc(q, outbound_handler); 592 qperf_inc(q, outbound_handler);
593 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", 593 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
594 start, count); 594 start, count);
595 }
595 596
596 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, 597 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
597 q->irq_ptr->int_parm); 598 q->irq_ptr->int_parm);
diff --git a/drivers/s390/net/Kconfig b/drivers/s390/net/Kconfig
index cb909a5b5047..977bb4d4ed15 100644
--- a/drivers/s390/net/Kconfig
+++ b/drivers/s390/net/Kconfig
@@ -43,6 +43,16 @@ config SMSGIUCV
43 Select this option if you want to be able to receive SMSG messages 43 Select this option if you want to be able to receive SMSG messages
44 from other VM guest systems. 44 from other VM guest systems.
45 45
46config SMSGIUCV_EVENT
47 tristate "Deliver IUCV special messages as uevents (VM only)"
48 depends on SMSGIUCV
49 help
50 Select this option to deliver CP special messages (SMSGs) as
51 uevents. The driver handles only those special messages that
52 start with "APP".
53
54 To compile as a module, choose M. The module name is "smsgiucv_app".
55
46config CLAW 56config CLAW
47 tristate "CLAW device support" 57 tristate "CLAW device support"
48 depends on CCW && NETDEVICES 58 depends on CCW && NETDEVICES
diff --git a/drivers/s390/net/Makefile b/drivers/s390/net/Makefile
index 6cab5a62f99e..4dfe8c1092da 100644
--- a/drivers/s390/net/Makefile
+++ b/drivers/s390/net/Makefile
@@ -6,6 +6,7 @@ ctcm-y += ctcm_main.o ctcm_fsms.o ctcm_mpc.o ctcm_sysfs.o ctcm_dbug.o
6obj-$(CONFIG_CTCM) += ctcm.o fsm.o 6obj-$(CONFIG_CTCM) += ctcm.o fsm.o
7obj-$(CONFIG_NETIUCV) += netiucv.o fsm.o 7obj-$(CONFIG_NETIUCV) += netiucv.o fsm.o
8obj-$(CONFIG_SMSGIUCV) += smsgiucv.o 8obj-$(CONFIG_SMSGIUCV) += smsgiucv.o
9obj-$(CONFIG_SMSGIUCV_EVENT) += smsgiucv_app.o
9obj-$(CONFIG_LCS) += lcs.o 10obj-$(CONFIG_LCS) += lcs.o
10obj-$(CONFIG_CLAW) += claw.o 11obj-$(CONFIG_CLAW) += claw.o
11qeth-y += qeth_core_sys.o qeth_core_main.o qeth_core_mpc.o 12qeth-y += qeth_core_sys.o qeth_core_main.o qeth_core_mpc.o
diff --git a/drivers/s390/net/qeth_core.h b/drivers/s390/net/qeth_core.h
index a3ac4456e0b1..fcd005aad989 100644
--- a/drivers/s390/net/qeth_core.h
+++ b/drivers/s390/net/qeth_core.h
@@ -763,7 +763,8 @@ static inline int qeth_get_micros(void)
763 763
764static inline int qeth_get_ip_version(struct sk_buff *skb) 764static inline int qeth_get_ip_version(struct sk_buff *skb)
765{ 765{
766 switch (skb->protocol) { 766 struct ethhdr *ehdr = (struct ethhdr *)skb->data;
767 switch (ehdr->h_proto) {
767 case ETH_P_IPV6: 768 case ETH_P_IPV6:
768 return 6; 769 return 6;
769 case ETH_P_IP: 770 case ETH_P_IP:
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c
index fa8a519218ac..3bd4206f3470 100644
--- a/drivers/s390/net/qeth_core_main.c
+++ b/drivers/s390/net/qeth_core_main.c
@@ -537,7 +537,8 @@ static void qeth_send_control_data_cb(struct qeth_channel *channel,
537 dev_err(&card->gdev->dev, 537 dev_err(&card->gdev->dev,
538 "The qeth device is not configured " 538 "The qeth device is not configured "
539 "for the OSI layer required by z/VM\n"); 539 "for the OSI layer required by z/VM\n");
540 qeth_schedule_recovery(card); 540 else
541 qeth_schedule_recovery(card);
541 goto out; 542 goto out;
542 } 543 }
543 544
@@ -1113,8 +1114,6 @@ static int qeth_setup_card(struct qeth_card *card)
1113 card->ipato.enabled = 0; 1114 card->ipato.enabled = 0;
1114 card->ipato.invert4 = 0; 1115 card->ipato.invert4 = 0;
1115 card->ipato.invert6 = 0; 1116 card->ipato.invert6 = 0;
1116 if (card->info.type == QETH_CARD_TYPE_IQD)
1117 card->options.checksum_type = NO_CHECKSUMMING;
1118 /* init QDIO stuff */ 1117 /* init QDIO stuff */
1119 qeth_init_qdio_info(card); 1118 qeth_init_qdio_info(card);
1120 return 0; 1119 return 0;
@@ -3805,9 +3804,6 @@ static int qeth_qdio_establish(struct qeth_card *card)
3805 init_data.input_handler = card->discipline.input_handler; 3804 init_data.input_handler = card->discipline.input_handler;
3806 init_data.output_handler = card->discipline.output_handler; 3805 init_data.output_handler = card->discipline.output_handler;
3807 init_data.int_parm = (unsigned long) card; 3806 init_data.int_parm = (unsigned long) card;
3808 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3809 QDIO_OUTBOUND_0COPY_SBALS |
3810 QDIO_USE_OUTBOUND_PCIS;
3811 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3807 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3812 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3808 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3813 3809
diff --git a/drivers/s390/net/qeth_core_sys.c b/drivers/s390/net/qeth_core_sys.c
index 88ae4357136a..25dfd5abd19b 100644
--- a/drivers/s390/net/qeth_core_sys.c
+++ b/drivers/s390/net/qeth_core_sys.c
@@ -8,6 +8,9 @@
8 * Frank Blaschka <frank.blaschka@de.ibm.com> 8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */ 9 */
10 10
11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
11#include <linux/list.h> 14#include <linux/list.h>
12#include <linux/rwsem.h> 15#include <linux/rwsem.h>
13#include <asm/ebcdic.h> 16#include <asm/ebcdic.h>
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c
index 51fde6f2e0b8..6f1e3036bafd 100644
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -1071,11 +1071,9 @@ static int qeth_l2_recover(void *ptr)
1071 dev_info(&card->gdev->dev, 1071 dev_info(&card->gdev->dev,
1072 "Device successfully recovered!\n"); 1072 "Device successfully recovered!\n");
1073 else { 1073 else {
1074 if (card->dev) { 1074 rtnl_lock();
1075 rtnl_lock(); 1075 dev_close(card->dev);
1076 dev_close(card->dev); 1076 rtnl_unlock();
1077 rtnl_unlock();
1078 }
1079 dev_warn(&card->gdev->dev, "The qeth device driver " 1077 dev_warn(&card->gdev->dev, "The qeth device driver "
1080 "failed to recover an error on the device\n"); 1078 "failed to recover an error on the device\n");
1081 } 1079 }
@@ -1129,11 +1127,9 @@ static int qeth_l2_pm_resume(struct ccwgroup_device *gdev)
1129 if (card->state == CARD_STATE_RECOVER) { 1127 if (card->state == CARD_STATE_RECOVER) {
1130 rc = __qeth_l2_set_online(card->gdev, 1); 1128 rc = __qeth_l2_set_online(card->gdev, 1);
1131 if (rc) { 1129 if (rc) {
1132 if (card->dev) { 1130 rtnl_lock();
1133 rtnl_lock(); 1131 dev_close(card->dev);
1134 dev_close(card->dev); 1132 rtnl_unlock();
1135 rtnl_unlock();
1136 }
1137 } 1133 }
1138 } else 1134 } else
1139 rc = __qeth_l2_set_online(card->gdev, 0); 1135 rc = __qeth_l2_set_online(card->gdev, 0);
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c
index 5475834ab916..b3b6e872d806 100644
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -1691,39 +1691,43 @@ qeth_diags_trace_cb(struct qeth_card *card, struct qeth_reply *reply,
1691 1691
1692 cmd = (struct qeth_ipa_cmd *)data; 1692 cmd = (struct qeth_ipa_cmd *)data;
1693 rc = cmd->hdr.return_code; 1693 rc = cmd->hdr.return_code;
1694 if (rc) { 1694 if (rc)
1695 QETH_DBF_TEXT_(TRACE, 2, "dxter%x", rc); 1695 QETH_DBF_TEXT_(TRACE, 2, "dxter%x", rc);
1696 if (cmd->data.diagass.action == QETH_DIAGS_CMD_TRACE_ENABLE) {
1697 switch (rc) {
1698 case IPA_RC_HARDWARE_AUTH_ERROR:
1699 dev_warn(&card->gdev->dev, "The device is not "
1700 "authorized to run as a HiperSockets "
1701 "network traffic analyzer\n");
1702 break;
1703 case IPA_RC_TRACE_ALREADY_ACTIVE:
1704 dev_warn(&card->gdev->dev, "A HiperSockets "
1705 "network traffic analyzer is already "
1706 "active in the HiperSockets LAN\n");
1707 break;
1708 default:
1709 break;
1710 }
1711 }
1712 return 0;
1713 }
1714
1715 switch (cmd->data.diagass.action) { 1696 switch (cmd->data.diagass.action) {
1716 case QETH_DIAGS_CMD_TRACE_QUERY: 1697 case QETH_DIAGS_CMD_TRACE_QUERY:
1717 break; 1698 break;
1718 case QETH_DIAGS_CMD_TRACE_DISABLE: 1699 case QETH_DIAGS_CMD_TRACE_DISABLE:
1719 card->info.promisc_mode = SET_PROMISC_MODE_OFF; 1700 switch (rc) {
1720 dev_info(&card->gdev->dev, "The HiperSockets network traffic " 1701 case 0:
1721 "analyzer is deactivated\n"); 1702 case IPA_RC_INVALID_SUBCMD:
1703 card->info.promisc_mode = SET_PROMISC_MODE_OFF;
1704 dev_info(&card->gdev->dev, "The HiperSockets network "
1705 "traffic analyzer is deactivated\n");
1706 break;
1707 default:
1708 break;
1709 }
1722 break; 1710 break;
1723 case QETH_DIAGS_CMD_TRACE_ENABLE: 1711 case QETH_DIAGS_CMD_TRACE_ENABLE:
1724 card->info.promisc_mode = SET_PROMISC_MODE_ON; 1712 switch (rc) {
1725 dev_info(&card->gdev->dev, "The HiperSockets network traffic " 1713 case 0:
1726 "analyzer is activated\n"); 1714 card->info.promisc_mode = SET_PROMISC_MODE_ON;
1715 dev_info(&card->gdev->dev, "The HiperSockets network "
1716 "traffic analyzer is activated\n");
1717 break;
1718 case IPA_RC_HARDWARE_AUTH_ERROR:
1719 dev_warn(&card->gdev->dev, "The device is not "
1720 "authorized to run as a HiperSockets network "
1721 "traffic analyzer\n");
1722 break;
1723 case IPA_RC_TRACE_ALREADY_ACTIVE:
1724 dev_warn(&card->gdev->dev, "A HiperSockets "
1725 "network traffic analyzer is already "
1726 "active in the HiperSockets LAN\n");
1727 break;
1728 default:
1729 break;
1730 }
1727 break; 1731 break;
1728 default: 1732 default:
1729 QETH_DBF_MESSAGE(2, "Unknown sniffer action (0x%04x) on %s\n", 1733 QETH_DBF_MESSAGE(2, "Unknown sniffer action (0x%04x) on %s\n",
@@ -2215,11 +2219,9 @@ static int qeth_l3_stop_card(struct qeth_card *card, int recovery_mode)
2215 if (recovery_mode) 2219 if (recovery_mode)
2216 qeth_l3_stop(card->dev); 2220 qeth_l3_stop(card->dev);
2217 else { 2221 else {
2218 if (card->dev) { 2222 rtnl_lock();
2219 rtnl_lock(); 2223 dev_close(card->dev);
2220 dev_close(card->dev); 2224 rtnl_unlock();
2221 rtnl_unlock();
2222 }
2223 } 2225 }
2224 if (!card->use_hard_stop) { 2226 if (!card->use_hard_stop) {
2225 rc = qeth_send_stoplan(card); 2227 rc = qeth_send_stoplan(card);
@@ -2900,10 +2902,8 @@ static int qeth_l3_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
2900 int data_offset = -1; 2902 int data_offset = -1;
2901 int nr_frags; 2903 int nr_frags;
2902 2904
2903 if ((card->info.type == QETH_CARD_TYPE_IQD) && 2905 if (((card->info.type == QETH_CARD_TYPE_IQD) && (!ipv)) ||
2904 (((skb->protocol != htons(ETH_P_IPV6)) && 2906 card->options.sniffer)
2905 (skb->protocol != htons(ETH_P_IP))) ||
2906 card->options.sniffer))
2907 goto tx_drop; 2907 goto tx_drop;
2908 2908
2909 if ((card->state != CARD_STATE_UP) || !card->lan_online) { 2909 if ((card->state != CARD_STATE_UP) || !card->lan_online) {
@@ -2949,14 +2949,14 @@ static int qeth_l3_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
2949 if (data_offset < 0) 2949 if (data_offset < 0)
2950 skb_pull(new_skb, ETH_HLEN); 2950 skb_pull(new_skb, ETH_HLEN);
2951 } else { 2951 } else {
2952 if (new_skb->protocol == htons(ETH_P_IP)) { 2952 if (ipv == 4) {
2953 if (card->dev->type == ARPHRD_IEEE802_TR) 2953 if (card->dev->type == ARPHRD_IEEE802_TR)
2954 skb_pull(new_skb, TR_HLEN); 2954 skb_pull(new_skb, TR_HLEN);
2955 else 2955 else
2956 skb_pull(new_skb, ETH_HLEN); 2956 skb_pull(new_skb, ETH_HLEN);
2957 } 2957 }
2958 2958
2959 if (new_skb->protocol == ETH_P_IPV6 && card->vlangrp && 2959 if (ipv == 6 && card->vlangrp &&
2960 vlan_tx_tag_present(new_skb)) { 2960 vlan_tx_tag_present(new_skb)) {
2961 skb_push(new_skb, VLAN_HLEN); 2961 skb_push(new_skb, VLAN_HLEN);
2962 skb_copy_to_linear_data(new_skb, new_skb->data + 4, 4); 2962 skb_copy_to_linear_data(new_skb, new_skb->data + 4, 4);
@@ -3534,11 +3534,9 @@ static int qeth_l3_pm_resume(struct ccwgroup_device *gdev)
3534 if (card->state == CARD_STATE_RECOVER) { 3534 if (card->state == CARD_STATE_RECOVER) {
3535 rc = __qeth_l3_set_online(card->gdev, 1); 3535 rc = __qeth_l3_set_online(card->gdev, 1);
3536 if (rc) { 3536 if (rc) {
3537 if (card->dev) { 3537 rtnl_lock();
3538 rtnl_lock(); 3538 dev_close(card->dev);
3539 dev_close(card->dev); 3539 rtnl_unlock();
3540 rtnl_unlock();
3541 }
3542 } 3540 }
3543 } else 3541 } else
3544 rc = __qeth_l3_set_online(card->gdev, 0); 3542 rc = __qeth_l3_set_online(card->gdev, 0);
diff --git a/drivers/s390/net/smsgiucv.c b/drivers/s390/net/smsgiucv.c
index 67f2485d2372..ecef1edee701 100644
--- a/drivers/s390/net/smsgiucv.c
+++ b/drivers/s390/net/smsgiucv.c
@@ -31,9 +31,9 @@
31 31
32struct smsg_callback { 32struct smsg_callback {
33 struct list_head list; 33 struct list_head list;
34 char *prefix; 34 const char *prefix;
35 int len; 35 int len;
36 void (*callback)(char *from, char *str); 36 void (*callback)(const char *from, char *str);
37}; 37};
38 38
39MODULE_AUTHOR 39MODULE_AUTHOR
@@ -100,8 +100,8 @@ static void smsg_message_pending(struct iucv_path *path,
100 kfree(buffer); 100 kfree(buffer);
101} 101}
102 102
103int smsg_register_callback(char *prefix, 103int smsg_register_callback(const char *prefix,
104 void (*callback)(char *from, char *str)) 104 void (*callback)(const char *from, char *str))
105{ 105{
106 struct smsg_callback *cb; 106 struct smsg_callback *cb;
107 107
@@ -117,8 +117,9 @@ int smsg_register_callback(char *prefix,
117 return 0; 117 return 0;
118} 118}
119 119
120void smsg_unregister_callback(char *prefix, 120void smsg_unregister_callback(const char *prefix,
121 void (*callback)(char *from, char *str)) 121 void (*callback)(const char *from,
122 char *str))
122{ 123{
123 struct smsg_callback *cb, *tmp; 124 struct smsg_callback *cb, *tmp;
124 125
@@ -176,7 +177,7 @@ static const struct dev_pm_ops smsg_pm_ops = {
176 177
177static struct device_driver smsg_driver = { 178static struct device_driver smsg_driver = {
178 .owner = THIS_MODULE, 179 .owner = THIS_MODULE,
179 .name = "SMSGIUCV", 180 .name = SMSGIUCV_DRV_NAME,
180 .bus = &iucv_bus, 181 .bus = &iucv_bus,
181 .pm = &smsg_pm_ops, 182 .pm = &smsg_pm_ops,
182}; 183};
diff --git a/drivers/s390/net/smsgiucv.h b/drivers/s390/net/smsgiucv.h
index 67f5d4f8378d..149a1151608d 100644
--- a/drivers/s390/net/smsgiucv.h
+++ b/drivers/s390/net/smsgiucv.h
@@ -5,6 +5,10 @@
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) 5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
6 */ 6 */
7 7
8int smsg_register_callback(char *, void (*)(char *, char *)); 8#define SMSGIUCV_DRV_NAME "SMSGIUCV"
9void smsg_unregister_callback(char *, void (*)(char *, char *)); 9
10int smsg_register_callback(const char *,
11 void (*)(const char *, char *));
12void smsg_unregister_callback(const char *,
13 void (*)(const char *, char *));
10 14
diff --git a/drivers/s390/net/smsgiucv_app.c b/drivers/s390/net/smsgiucv_app.c
new file mode 100644
index 000000000000..91579dc6a2b0
--- /dev/null
+++ b/drivers/s390/net/smsgiucv_app.c
@@ -0,0 +1,211 @@
1/*
2 * Deliver z/VM CP special messages (SMSG) as uevents.
3 *
4 * The driver registers for z/VM CP special messages with the
5 * "APP" prefix. Incoming messages are delivered to user space
6 * as uevents.
7 *
8 * Copyright IBM Corp. 2010
9 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
10 *
11 */
12#define KMSG_COMPONENT "smsgiucv_app"
13#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14
15#include <linux/ctype.h>
16#include <linux/err.h>
17#include <linux/device.h>
18#include <linux/list.h>
19#include <linux/kobject.h>
20#include <linux/module.h>
21#include <linux/spinlock.h>
22#include <linux/workqueue.h>
23#include <net/iucv/iucv.h>
24#include "smsgiucv.h"
25
26/* prefix used for SMSG registration */
27#define SMSG_PREFIX "APP"
28
29/* SMSG related uevent environment variables */
30#define ENV_SENDER_STR "SMSG_SENDER="
31#define ENV_SENDER_LEN (strlen(ENV_SENDER_STR) + 8 + 1)
32#define ENV_PREFIX_STR "SMSG_ID="
33#define ENV_PREFIX_LEN (strlen(ENV_PREFIX_STR) + \
34 strlen(SMSG_PREFIX) + 1)
35#define ENV_TEXT_STR "SMSG_TEXT="
36#define ENV_TEXT_LEN(msg) (strlen(ENV_TEXT_STR) + strlen((msg)) + 1)
37
38/* z/VM user ID which is permitted to send SMSGs
39 * If the value is undefined or empty (""), special messages are
40 * accepted from any z/VM user ID. */
41static char *sender;
42module_param(sender, charp, 0400);
43MODULE_PARM_DESC(sender, "z/VM user ID from which CP SMSGs are accepted");
44
45/* SMSG device representation */
46static struct device *smsg_app_dev;
47
48/* list element for queuing received messages for delivery */
49struct smsg_app_event {
50 struct list_head list;
51 char *buf;
52 char *envp[4];
53};
54
55/* queue for outgoing uevents */
56static LIST_HEAD(smsg_event_queue);
57static DEFINE_SPINLOCK(smsg_event_queue_lock);
58
59static void smsg_app_event_free(struct smsg_app_event *ev)
60{
61 kfree(ev->buf);
62 kfree(ev);
63}
64
65static struct smsg_app_event *smsg_app_event_alloc(const char *from,
66 const char *msg)
67{
68 struct smsg_app_event *ev;
69
70 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
71 if (!ev)
72 return NULL;
73
74 ev->buf = kzalloc(ENV_SENDER_LEN + ENV_PREFIX_LEN +
75 ENV_TEXT_LEN(msg), GFP_ATOMIC);
76 if (!ev->buf) {
77 kfree(ev);
78 return NULL;
79 }
80
81 /* setting up environment pointers into buf */
82 ev->envp[0] = ev->buf;
83 ev->envp[1] = ev->envp[0] + ENV_SENDER_LEN;
84 ev->envp[2] = ev->envp[1] + ENV_PREFIX_LEN;
85 ev->envp[3] = NULL;
86
87 /* setting up environment: sender, prefix name, and message text */
88 snprintf(ev->envp[0], ENV_SENDER_LEN, ENV_SENDER_STR "%s", from);
89 snprintf(ev->envp[1], ENV_PREFIX_LEN, ENV_PREFIX_STR "%s", SMSG_PREFIX);
90 snprintf(ev->envp[2], ENV_TEXT_LEN(msg), ENV_TEXT_STR "%s", msg);
91
92 return ev;
93}
94
95static void smsg_event_work_fn(struct work_struct *work)
96{
97 LIST_HEAD(event_queue);
98 struct smsg_app_event *p, *n;
99 struct device *dev;
100
101 dev = get_device(smsg_app_dev);
102 if (!dev)
103 return;
104
105 spin_lock_bh(&smsg_event_queue_lock);
106 list_splice_init(&smsg_event_queue, &event_queue);
107 spin_unlock_bh(&smsg_event_queue_lock);
108
109 list_for_each_entry_safe(p, n, &event_queue, list) {
110 list_del(&p->list);
111 kobject_uevent_env(&dev->kobj, KOBJ_CHANGE, p->envp);
112 smsg_app_event_free(p);
113 }
114
115 put_device(dev);
116}
117static DECLARE_WORK(smsg_event_work, smsg_event_work_fn);
118
119static void smsg_app_callback(const char *from, char *msg)
120{
121 struct smsg_app_event *se;
122
123 /* check if the originating z/VM user ID matches
124 * the configured sender. */
125 if (sender && strlen(sender) > 0 && strcmp(from, sender) != 0)
126 return;
127
128 /* get start of message text (skip prefix and leading blanks) */
129 msg += strlen(SMSG_PREFIX);
130 while (*msg && isspace(*msg))
131 msg++;
132 if (*msg == '\0')
133 return;
134
135 /* allocate event list element and its environment */
136 se = smsg_app_event_alloc(from, msg);
137 if (!se)
138 return;
139
140 /* queue event and schedule work function */
141 spin_lock(&smsg_event_queue_lock);
142 list_add_tail(&se->list, &smsg_event_queue);
143 spin_unlock(&smsg_event_queue_lock);
144
145 schedule_work(&smsg_event_work);
146 return;
147}
148
149static int __init smsgiucv_app_init(void)
150{
151 struct device_driver *smsgiucv_drv;
152 int rc;
153
154 if (!MACHINE_IS_VM)
155 return -ENODEV;
156
157 smsg_app_dev = kzalloc(sizeof(*smsg_app_dev), GFP_KERNEL);
158 if (!smsg_app_dev)
159 return -ENOMEM;
160
161 smsgiucv_drv = driver_find(SMSGIUCV_DRV_NAME, &iucv_bus);
162 if (!smsgiucv_drv) {
163 kfree(smsg_app_dev);
164 return -ENODEV;
165 }
166
167 rc = dev_set_name(smsg_app_dev, KMSG_COMPONENT);
168 if (rc) {
169 kfree(smsg_app_dev);
170 goto fail_put_driver;
171 }
172 smsg_app_dev->bus = &iucv_bus;
173 smsg_app_dev->parent = iucv_root;
174 smsg_app_dev->release = (void (*)(struct device *)) kfree;
175 smsg_app_dev->driver = smsgiucv_drv;
176 rc = device_register(smsg_app_dev);
177 if (rc) {
178 put_device(smsg_app_dev);
179 goto fail_put_driver;
180 }
181
182 /* register with the smsgiucv device driver */
183 rc = smsg_register_callback(SMSG_PREFIX, smsg_app_callback);
184 if (rc) {
185 device_unregister(smsg_app_dev);
186 goto fail_put_driver;
187 }
188
189 rc = 0;
190fail_put_driver:
191 put_driver(smsgiucv_drv);
192 return rc;
193}
194module_init(smsgiucv_app_init);
195
196static void __exit smsgiucv_app_exit(void)
197{
198 /* unregister callback */
199 smsg_unregister_callback(SMSG_PREFIX, smsg_app_callback);
200
201 /* cancel pending work and flush any queued event work */
202 cancel_work_sync(&smsg_event_work);
203 smsg_event_work_fn(&smsg_event_work);
204
205 device_unregister(smsg_app_dev);
206}
207module_exit(smsgiucv_app_exit);
208
209MODULE_LICENSE("GPL v2");
210MODULE_DESCRIPTION("Deliver z/VM CP SMSG as uevents");
211MODULE_AUTHOR("Hendrik Brueckner <brueckner@linux.vnet.ibm.com>");
diff --git a/drivers/s390/scsi/zfcp_qdio.c b/drivers/s390/scsi/zfcp_qdio.c
index 71b97ff77cf0..6479273a3094 100644
--- a/drivers/s390/scsi/zfcp_qdio.c
+++ b/drivers/s390/scsi/zfcp_qdio.c
@@ -319,8 +319,6 @@ static void zfcp_qdio_setup_init_data(struct qdio_initialize *id,
319 id->input_handler = zfcp_qdio_int_resp; 319 id->input_handler = zfcp_qdio_int_resp;
320 id->output_handler = zfcp_qdio_int_req; 320 id->output_handler = zfcp_qdio_int_req;
321 id->int_parm = (unsigned long) qdio; 321 id->int_parm = (unsigned long) qdio;
322 id->flags = QDIO_INBOUND_0COPY_SBALS |
323 QDIO_OUTBOUND_0COPY_SBALS | QDIO_USE_OUTBOUND_PCIS;
324 id->input_sbal_addr_array = (void **) (qdio->resp_q.sbal); 322 id->input_sbal_addr_array = (void **) (qdio->resp_q.sbal);
325 id->output_sbal_addr_array = (void **) (qdio->req_q.sbal); 323 id->output_sbal_addr_array = (void **) (qdio->req_q.sbal);
326 324
diff --git a/drivers/scsi/a100u2w.c b/drivers/scsi/a100u2w.c
index 208d6df9ed59..ff5716d5f044 100644
--- a/drivers/scsi/a100u2w.c
+++ b/drivers/scsi/a100u2w.c
@@ -492,7 +492,7 @@ static void init_alloc_map(struct orc_host * host)
492 * init_orchid - initialise the host adapter 492 * init_orchid - initialise the host adapter
493 * @host:host adapter to initialise 493 * @host:host adapter to initialise
494 * 494 *
495 * Initialise the controller and if neccessary load the firmware. 495 * Initialise the controller and if necessary load the firmware.
496 * 496 *
497 * Returns -1 if the initialisation fails. 497 * Returns -1 if the initialisation fails.
498 */ 498 */
diff --git a/drivers/scsi/initio.c b/drivers/scsi/initio.c
index 89a59484be02..a7714160fbc3 100644
--- a/drivers/scsi/initio.c
+++ b/drivers/scsi/initio.c
@@ -531,7 +531,7 @@ static void initio_read_eeprom(unsigned long base)
531 * initio_stop_bm - stop bus master 531 * initio_stop_bm - stop bus master
532 * @host: InitIO we are stopping 532 * @host: InitIO we are stopping
533 * 533 *
534 * Stop any pending DMA operation, aborting the DMA if neccessary 534 * Stop any pending DMA operation, aborting the DMA if necessary
535 */ 535 */
536 536
537static void initio_stop_bm(struct initio_host * host) 537static void initio_stop_bm(struct initio_host * host)
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c
index 6fde2fabfd9b..774e7ac837a5 100644
--- a/drivers/scsi/libfc/fc_fcp.c
+++ b/drivers/scsi/libfc/fc_fcp.c
@@ -48,7 +48,7 @@ struct kmem_cache *scsi_pkt_cachep;
48#define FC_SRB_CMD_SENT (1 << 0) /* cmd has been sent */ 48#define FC_SRB_CMD_SENT (1 << 0) /* cmd has been sent */
49#define FC_SRB_RCV_STATUS (1 << 1) /* response has arrived */ 49#define FC_SRB_RCV_STATUS (1 << 1) /* response has arrived */
50#define FC_SRB_ABORT_PENDING (1 << 2) /* cmd abort sent to device */ 50#define FC_SRB_ABORT_PENDING (1 << 2) /* cmd abort sent to device */
51#define FC_SRB_ABORTED (1 << 3) /* abort acknowleged */ 51#define FC_SRB_ABORTED (1 << 3) /* abort acknowledged */
52#define FC_SRB_DISCONTIG (1 << 4) /* non-sequential data recvd */ 52#define FC_SRB_DISCONTIG (1 << 4) /* non-sequential data recvd */
53#define FC_SRB_COMPL (1 << 5) /* fc_io_compl has been run */ 53#define FC_SRB_COMPL (1 << 5) /* fc_io_compl has been run */
54#define FC_SRB_FCP_PROCESSING_TMO (1 << 6) /* timer function processing */ 54#define FC_SRB_FCP_PROCESSING_TMO (1 << 6) /* timer function processing */
@@ -519,7 +519,7 @@ crc_err:
519 * 519 *
520 * Called after receiving a Transfer Ready data descriptor. 520 * Called after receiving a Transfer Ready data descriptor.
521 * If the LLD is capable of sequence offload then send down the 521 * If the LLD is capable of sequence offload then send down the
522 * seq_blen ammount of data in single frame, otherwise send 522 * seq_blen amount of data in single frame, otherwise send
523 * multiple frames of the maximum frame payload supported by 523 * multiple frames of the maximum frame payload supported by
524 * the target port. 524 * the target port.
525 */ 525 */
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index 08b6634cb994..2a40a6eabf4d 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -981,7 +981,7 @@ lpfc_issue_els_flogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
981 * function returns, it does not guarantee all the IOCBs are actually aborted. 981 * function returns, it does not guarantee all the IOCBs are actually aborted.
982 * 982 *
983 * Return code 983 * Return code
984 * 0 - Sucessfully issued abort iocb on all outstanding flogis (Always 0) 984 * 0 - Successfully issued abort iocb on all outstanding flogis (Always 0)
985 **/ 985 **/
986int 986int
987lpfc_els_abort_flogi(struct lpfc_hba *phba) 987lpfc_els_abort_flogi(struct lpfc_hba *phba)
@@ -3129,7 +3129,7 @@ lpfc_cmpl_els_rsp(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
3129 if (ndlp && NLP_CHK_NODE_ACT(ndlp) && 3129 if (ndlp && NLP_CHK_NODE_ACT(ndlp) &&
3130 (*((uint32_t *) (pcmd)) == ELS_CMD_LS_RJT)) { 3130 (*((uint32_t *) (pcmd)) == ELS_CMD_LS_RJT)) {
3131 /* A LS_RJT associated with Default RPI cleanup has its own 3131 /* A LS_RJT associated with Default RPI cleanup has its own
3132 * seperate code path. 3132 * separate code path.
3133 */ 3133 */
3134 if (!(ndlp->nlp_flag & NLP_RM_DFLT_RPI)) 3134 if (!(ndlp->nlp_flag & NLP_RM_DFLT_RPI))
3135 ls_rjt = 1; 3135 ls_rjt = 1;
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index 7f21b47db791..483fb74bc592 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -1575,7 +1575,7 @@ lpfc_bg_scsi_prep_dma_buf(struct lpfc_hba *phba,
1575 case LPFC_PG_TYPE_NO_DIF: 1575 case LPFC_PG_TYPE_NO_DIF:
1576 num_bde = lpfc_bg_setup_bpl(phba, scsi_cmnd, bpl, 1576 num_bde = lpfc_bg_setup_bpl(phba, scsi_cmnd, bpl,
1577 datasegcnt); 1577 datasegcnt);
1578 /* we shoud have 2 or more entries in buffer list */ 1578 /* we should have 2 or more entries in buffer list */
1579 if (num_bde < 2) 1579 if (num_bde < 2)
1580 goto err; 1580 goto err;
1581 break; 1581 break;
@@ -1612,7 +1612,7 @@ lpfc_bg_scsi_prep_dma_buf(struct lpfc_hba *phba,
1612 1612
1613 num_bde = lpfc_bg_setup_bpl_prot(phba, scsi_cmnd, bpl, 1613 num_bde = lpfc_bg_setup_bpl_prot(phba, scsi_cmnd, bpl,
1614 datasegcnt, protsegcnt); 1614 datasegcnt, protsegcnt);
1615 /* we shoud have 3 or more entries in buffer list */ 1615 /* we should have 3 or more entries in buffer list */
1616 if (num_bde < 3) 1616 if (num_bde < 3)
1617 goto err; 1617 goto err;
1618 break; 1618 break;
diff --git a/drivers/scsi/pcmcia/nsp_cs.h b/drivers/scsi/pcmcia/nsp_cs.h
index 7db28cd49446..8c61a4fe1db9 100644
--- a/drivers/scsi/pcmcia/nsp_cs.h
+++ b/drivers/scsi/pcmcia/nsp_cs.h
@@ -187,7 +187,7 @@
187#define S_IO BIT(1) /* Input/Output line from SCSI bus */ 187#define S_IO BIT(1) /* Input/Output line from SCSI bus */
188#define S_CD BIT(2) /* Command/Data line from SCSI bus */ 188#define S_CD BIT(2) /* Command/Data line from SCSI bus */
189#define S_BUSY BIT(3) /* Busy line from SCSI bus */ 189#define S_BUSY BIT(3) /* Busy line from SCSI bus */
190#define S_ACK BIT(4) /* Acknowlege line from SCSI bus */ 190#define S_ACK BIT(4) /* Acknowledge line from SCSI bus */
191#define S_REQUEST BIT(5) /* Request line from SCSI bus */ 191#define S_REQUEST BIT(5) /* Request line from SCSI bus */
192#define S_SELECT BIT(6) /* */ 192#define S_SELECT BIT(6) /* */
193#define S_ATN BIT(7) /* */ 193#define S_ATN BIT(7) /* */
diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c
index 9b44c6f1b10e..7985ae45d688 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.c
+++ b/drivers/scsi/pm8001/pm8001_hwi.c
@@ -2924,7 +2924,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
2924 break; 2924 break;
2925 default: 2925 default:
2926 PM8001_MSG_DBG(pm8001_ha, 2926 PM8001_MSG_DBG(pm8001_ha,
2927 pm8001_printk("unkown device type(%x)\n", deviceType)); 2927 pm8001_printk("unknown device type(%x)\n", deviceType));
2928 break; 2928 break;
2929 } 2929 }
2930 phy->phy_type |= PORT_TYPE_SAS; 2930 phy->phy_type |= PORT_TYPE_SAS;
diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c
index 7f9c83a76390..3b2c98fba834 100644
--- a/drivers/scsi/pm8001/pm8001_sas.c
+++ b/drivers/scsi/pm8001/pm8001_sas.c
@@ -600,7 +600,7 @@ static void pm8001_free_dev(struct pm8001_device *pm8001_dev)
600 * by the command "OPC_INB_REG_DEV", after that the HBA will assign a 600 * by the command "OPC_INB_REG_DEV", after that the HBA will assign a
601 * device ID(according to device's sas address) and returned it to LLDD. From 601 * device ID(according to device's sas address) and returned it to LLDD. From
602 * now on, we communicate with HBA FW with the device ID which HBA assigned 602 * now on, we communicate with HBA FW with the device ID which HBA assigned
603 * rather than sas address. it is the neccessary step for our HBA but it is 603 * rather than sas address. it is the necessary step for our HBA but it is
604 * the optional for other HBA driver. 604 * the optional for other HBA driver.
605 */ 605 */
606static int pm8001_dev_found_notify(struct domain_device *dev) 606static int pm8001_dev_found_notify(struct domain_device *dev)
diff --git a/drivers/scsi/pmcraid.h b/drivers/scsi/pmcraid.h
index 92f89d50850c..b8ad07c3449e 100644
--- a/drivers/scsi/pmcraid.h
+++ b/drivers/scsi/pmcraid.h
@@ -938,7 +938,7 @@ static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = {
938 938
939/* 939/*
940 * pmcraid_ioctl_header - definition of header structure that preceeds all the 940 * pmcraid_ioctl_header - definition of header structure that preceeds all the
941 * buffers given as ioctl arguements. 941 * buffers given as ioctl arguments.
942 * 942 *
943 * .signature : always ASCII string, "PMCRAID" 943 * .signature : always ASCII string, "PMCRAID"
944 * .reserved : not used 944 * .reserved : not used
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c
index fa34b92850a6..1b8217076b0e 100644
--- a/drivers/scsi/qlogicpti.c
+++ b/drivers/scsi/qlogicpti.c
@@ -738,7 +738,7 @@ static int __devinit qpti_register_irq(struct qlogicpti *qpti)
738 * sanely maintain. 738 * sanely maintain.
739 */ 739 */
740 if (request_irq(qpti->irq, qpti_intr, 740 if (request_irq(qpti->irq, qpti_intr,
741 IRQF_SHARED, "Qlogic/PTI", qpti)) 741 IRQF_SHARED, "QlogicPTI", qpti))
742 goto fail; 742 goto fail;
743 743
744 printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq); 744 printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq);
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 466fae8ef770..a82ab3e2b4f7 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -2111,7 +2111,7 @@ static int sd_revalidate_disk(struct gendisk *disk)
2111 * which is followed by sdaaa. 2111 * which is followed by sdaaa.
2112 * 2112 *
2113 * This is basically 26 base counting with one extra 'nil' entry 2113 * This is basically 26 base counting with one extra 'nil' entry
2114 * at the beggining from the second digit on and can be 2114 * at the beginning from the second digit on and can be
2115 * determined using similar method as 26 base conversion with the 2115 * determined using similar method as 26 base conversion with the
2116 * index shifted -1 after each digit is computed. 2116 * index shifted -1 after each digit is computed.
2117 * 2117 *
diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c
index 1d7a8780e00c..0d9d6f7567f5 100644
--- a/drivers/scsi/ses.c
+++ b/drivers/scsi/ses.c
@@ -595,8 +595,6 @@ static int ses_intf_add(struct device *cdev,
595 ses_dev->page10_len = len; 595 ses_dev->page10_len = len;
596 buf = NULL; 596 buf = NULL;
597 } 597 }
598 kfree(hdr_buf);
599
600 scomp = kzalloc(sizeof(struct ses_component) * components, GFP_KERNEL); 598 scomp = kzalloc(sizeof(struct ses_component) * components, GFP_KERNEL);
601 if (!scomp) 599 if (!scomp)
602 goto err_free; 600 goto err_free;
@@ -608,6 +606,8 @@ static int ses_intf_add(struct device *cdev,
608 goto err_free; 606 goto err_free;
609 } 607 }
610 608
609 kfree(hdr_buf);
610
611 edev->scratch = ses_dev; 611 edev->scratch = ses_dev;
612 for (i = 0; i < components; i++) 612 for (i = 0; i < components; i++)
613 edev->component[i].scratch = scomp + i; 613 edev->component[i].scratch = scomp + i;
diff --git a/drivers/scsi/sgiwd93.c b/drivers/scsi/sgiwd93.c
index 0807b260268b..fef0e3c75b16 100644
--- a/drivers/scsi/sgiwd93.c
+++ b/drivers/scsi/sgiwd93.c
@@ -226,7 +226,7 @@ static struct scsi_host_template sgiwd93_template = {
226 .use_clustering = DISABLE_CLUSTERING, 226 .use_clustering = DISABLE_CLUSTERING,
227}; 227};
228 228
229static int __init sgiwd93_probe(struct platform_device *pdev) 229static int __devinit sgiwd93_probe(struct platform_device *pdev)
230{ 230{
231 struct sgiwd93_platform_data *pd = pdev->dev.platform_data; 231 struct sgiwd93_platform_data *pd = pdev->dev.platform_data;
232 unsigned char *wdregs = pd->wdregs; 232 unsigned char *wdregs = pd->wdregs;
diff --git a/drivers/scsi/sni_53c710.c b/drivers/scsi/sni_53c710.c
index 37b3359e863e..56cf0bb4ed1f 100644
--- a/drivers/scsi/sni_53c710.c
+++ b/drivers/scsi/sni_53c710.c
@@ -64,7 +64,7 @@ static struct scsi_host_template snirm710_template = {
64 .module = THIS_MODULE, 64 .module = THIS_MODULE,
65}; 65};
66 66
67static int __init snirm710_probe(struct platform_device *dev) 67static int __devinit snirm710_probe(struct platform_device *dev)
68{ 68{
69 unsigned long base; 69 unsigned long base;
70 struct NCR_700_Host_Parameters *hostdata; 70 struct NCR_700_Host_Parameters *hostdata;
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 7c4ebe6ee18b..c3db16b7afa1 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2408,6 +2408,21 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2408} 2408}
2409 2409
2410static void 2410static void
2411serial8250_set_ldisc(struct uart_port *port)
2412{
2413 int line = port->line;
2414
2415 if (line >= port->state->port.tty->driver->num)
2416 return;
2417
2418 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
2419 port->flags |= UPF_HARDPPS_CD;
2420 serial8250_enable_ms(port);
2421 } else
2422 port->flags &= ~UPF_HARDPPS_CD;
2423}
2424
2425static void
2411serial8250_pm(struct uart_port *port, unsigned int state, 2426serial8250_pm(struct uart_port *port, unsigned int state,
2412 unsigned int oldstate) 2427 unsigned int oldstate)
2413{ 2428{
@@ -2628,6 +2643,7 @@ static struct uart_ops serial8250_pops = {
2628 .startup = serial8250_startup, 2643 .startup = serial8250_startup,
2629 .shutdown = serial8250_shutdown, 2644 .shutdown = serial8250_shutdown,
2630 .set_termios = serial8250_set_termios, 2645 .set_termios = serial8250_set_termios,
2646 .set_ldisc = serial8250_set_ldisc,
2631 .pm = serial8250_pm, 2647 .pm = serial8250_pm,
2632 .type = serial8250_type, 2648 .type = serial8250_type,
2633 .release_port = serial8250_release_port, 2649 .release_port = serial8250_release_port,
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index d6ff73395623..f55c49475a8c 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -447,7 +447,7 @@ config SERIAL_CLPS711X_CONSOLE
447 447
448config SERIAL_SAMSUNG 448config SERIAL_SAMSUNG
449 tristate "Samsung SoC serial support" 449 tristate "Samsung SoC serial support"
450 depends on ARM && PLAT_S3C 450 depends on ARM && PLAT_SAMSUNG
451 select SERIAL_CORE 451 select SERIAL_CORE
452 help 452 help
453 Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, 453 Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
@@ -455,11 +455,18 @@ config SERIAL_SAMSUNG
455 provide all of these ports, depending on how the serial port 455 provide all of these ports, depending on how the serial port
456 pins are configured. 456 pins are configured.
457 457
458config SERIAL_SAMSUNG_UARTS_4
459 bool
460 depends on ARM && PLAT_SAMSUNG
461 default y if CPU_S3C2443
462 help
463 Internal node for the common case of 4 Samsung compatible UARTs
464
458config SERIAL_SAMSUNG_UARTS 465config SERIAL_SAMSUNG_UARTS
459 int 466 int
460 depends on ARM && PLAT_S3C 467 depends on ARM && PLAT_SAMSUNG
461 default 2 if ARCH_S3C2400 468 default 2 if ARCH_S3C2400
462 default 4 if ARCH_S5PC1XX || ARCH_S3C64XX || CPU_S3C2443 469 default 4 if SERIAL_SAMSUNG_UARTS_4
463 default 3 470 default 3
464 help 471 help
465 Select the number of available UART ports for the Samsung S3C 472 Select the number of available UART ports for the Samsung S3C
@@ -526,20 +533,30 @@ config SERIAL_S3C24A0
526 Serial port support for the Samsung S3C24A0 SoC 533 Serial port support for the Samsung S3C24A0 SoC
527 534
528config SERIAL_S3C6400 535config SERIAL_S3C6400
529 tristate "Samsung S3C6400/S3C6410 Serial port support" 536 tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support"
530 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410) 537 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440)
538 select SERIAL_SAMSUNG_UARTS_4
531 default y 539 default y
532 help 540 help
533 Serial port support for the Samsung S3C6400 and S3C6410 541 Serial port support for the Samsung S3C6400, S3C6410 and S5P6440
534 SoCs 542 SoCs
535 543
536config SERIAL_S5PC100 544config SERIAL_S5PC100
537 tristate "Samsung S5PC100 Serial port support" 545 tristate "Samsung S5PC100 Serial port support"
538 depends on SERIAL_SAMSUNG && CPU_S5PC100 546 depends on SERIAL_SAMSUNG && CPU_S5PC100
547 select SERIAL_SAMSUNG_UARTS_4
539 default y 548 default y
540 help 549 help
541 Serial port support for the Samsung S5PC100 SoCs 550 Serial port support for the Samsung S5PC100 SoCs
542 551
552config SERIAL_S5PV210
553 tristate "Samsung S5PV210 Serial port support"
554 depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442)
555 select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210
556 default y
557 help
558 Serial port support for Samsung's S5P Family of SoC's
559
543config SERIAL_MAX3100 560config SERIAL_MAX3100
544 tristate "MAX3100 support" 561 tristate "MAX3100 support"
545 depends on SPI 562 depends on SPI
@@ -996,7 +1013,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
996 1013
997config SERIAL_SH_SCI 1014config SERIAL_SH_SCI
998 tristate "SuperH SCI(F) serial port support" 1015 tristate "SuperH SCI(F) serial port support"
999 depends on HAVE_CLK && (SUPERH || H8300) 1016 depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE)
1000 select SERIAL_CORE 1017 select SERIAL_CORE
1001 1018
1002config SERIAL_SH_SCI_NR_UARTS 1019config SERIAL_SH_SCI_NR_UARTS
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5548fe7df61d..6aa4723b74ee 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
45obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o 45obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o 46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
47obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o 47obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
48obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
48obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 49obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
49obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o 50obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
50obj-$(CONFIG_SERIAL_MUX) += mux.o 51obj-$(CONFIG_SERIAL_MUX) += mux.o
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 429a8ae86933..e4b3c2c88bb6 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -471,6 +471,20 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios,
471 spin_unlock_irqrestore(&uap->port.lock, flags); 471 spin_unlock_irqrestore(&uap->port.lock, flags);
472} 472}
473 473
474static void pl010_set_ldisc(struct uart_port *port)
475{
476 int line = port->line;
477
478 if (line >= port->state->port.tty->driver->num)
479 return;
480
481 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
482 port->flags |= UPF_HARDPPS_CD;
483 pl010_enable_ms(port);
484 } else
485 port->flags &= ~UPF_HARDPPS_CD;
486}
487
474static const char *pl010_type(struct uart_port *port) 488static const char *pl010_type(struct uart_port *port)
475{ 489{
476 return port->type == PORT_AMBA ? "AMBA" : NULL; 490 return port->type == PORT_AMBA ? "AMBA" : NULL;
@@ -531,6 +545,7 @@ static struct uart_ops amba_pl010_pops = {
531 .startup = pl010_startup, 545 .startup = pl010_startup,
532 .shutdown = pl010_shutdown, 546 .shutdown = pl010_shutdown,
533 .set_termios = pl010_set_termios, 547 .set_termios = pl010_set_termios,
548 .set_ldisc = pl010_set_ldisc,
534 .type = pl010_type, 549 .type = pl010_type,
535 .release_port = pl010_release_port, 550 .release_port = pl010_release_port,
536 .request_port = pl010_request_port, 551 .request_port = pl010_request_port,
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index d00fcf8e6c70..e579d7a1807a 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -440,7 +440,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
440 440
441 temp = readl(sport->port.membase + USR2); 441 temp = readl(sport->port.membase + USR2);
442 if (temp & USR2_BRCD) { 442 if (temp & USR2_BRCD) {
443 writel(temp | USR2_BRCD, sport->port.membase + USR2); 443 writel(USR2_BRCD, sport->port.membase + USR2);
444 if (uart_handle_break(&sport->port)) 444 if (uart_handle_break(&sport->port))
445 continue; 445 continue;
446 } 446 }
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce75e28e36ef..1700b1a2fb7e 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
102 .name = "Samsung S3C2412 UART", 102 .name = "Samsung S3C2412 UART",
103 .type = PORT_S3C2412, 103 .type = PORT_S3C2412,
104 .fifosize = 64, 104 .fifosize = 64,
105 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK, 106 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, 107 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL, 108 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
new file mode 100644
index 000000000000..8dc03837617b
--- /dev/null
+++ b/drivers/serial/s5pv210.c
@@ -0,0 +1,154 @@
1/* linux/drivers/serial/s5pv210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on drivers/serial/s3c6400.c
7 *
8 * Driver for Samsung S5PV210 SoC UARTs.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/module.h>
16#include <linux/ioport.h>
17#include <linux/io.h>
18#include <linux/platform_device.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
21#include <linux/serial.h>
22
23#include <asm/irq.h>
24#include <mach/hardware.h>
25#include <plat/regs-serial.h>
26#include "samsung.h"
27
28static int s5pv210_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 if (strcmp(clk->name, "pclk") == 0)
34 ucon &= ~S5PV210_UCON_CLKMASK;
35 else if (strcmp(clk->name, "uclk1") == 0)
36 ucon |= S5PV210_UCON_CLKMASK;
37 else {
38 printk(KERN_ERR "unknown clock source %s\n", clk->name);
39 return -EINVAL;
40 }
41
42 wr_regl(port, S3C2410_UCON, ucon);
43 return 0;
44}
45
46
47static int s5pv210_serial_getsource(struct uart_port *port,
48 struct s3c24xx_uart_clksrc *clk)
49{
50 u32 ucon = rd_regl(port, S3C2410_UCON);
51
52 clk->divisor = 1;
53
54 switch (ucon & S5PV210_UCON_CLKMASK) {
55 case S5PV210_UCON_PCLK:
56 clk->name = "pclk";
57 break;
58 case S5PV210_UCON_UCLK:
59 clk->name = "uclk1";
60 break;
61 }
62
63 return 0;
64}
65
66static int s5pv210_serial_resetport(struct uart_port *port,
67 struct s3c2410_uartcfg *cfg)
68{
69 unsigned long ucon = rd_regl(port, S3C2410_UCON);
70
71 ucon &= S5PV210_UCON_CLKMASK;
72 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
73 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
74
75 /* reset both fifos */
76 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
77 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
78
79 return 0;
80}
81
82#define S5PV210_UART_DEFAULT_INFO(fifo_size) \
83 .name = "Samsung S5PV210 UART0", \
84 .type = PORT_S3C6400, \
85 .fifosize = fifo_size, \
86 .has_divslot = 1, \
87 .rx_fifomask = S5PV210_UFSTAT_RXMASK, \
88 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \
89 .rx_fifofull = S5PV210_UFSTAT_RXFULL, \
90 .tx_fifofull = S5PV210_UFSTAT_TXFULL, \
91 .tx_fifomask = S5PV210_UFSTAT_TXMASK, \
92 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
93 .get_clksrc = s5pv210_serial_getsource, \
94 .set_clksrc = s5pv210_serial_setsource, \
95 .reset_port = s5pv210_serial_resetport
96
97static struct s3c24xx_uart_info s5p_port_fifo256 = {
98 S5PV210_UART_DEFAULT_INFO(256),
99};
100
101static struct s3c24xx_uart_info s5p_port_fifo64 = {
102 S5PV210_UART_DEFAULT_INFO(64),
103};
104
105static struct s3c24xx_uart_info s5p_port_fifo16 = {
106 S5PV210_UART_DEFAULT_INFO(16),
107};
108
109static struct s3c24xx_uart_info *s5p_uart_inf[] = {
110 [0] = &s5p_port_fifo256,
111 [1] = &s5p_port_fifo64,
112 [2] = &s5p_port_fifo16,
113 [3] = &s5p_port_fifo16,
114};
115
116/* device management */
117static int s5p_serial_probe(struct platform_device *pdev)
118{
119 return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
120}
121
122static struct platform_driver s5p_serial_drv = {
123 .probe = s5p_serial_probe,
124 .remove = __devexit_p(s3c24xx_serial_remove),
125 .driver = {
126 .name = "s5pv210-uart",
127 .owner = THIS_MODULE,
128 },
129};
130
131static int __init s5pv210_serial_console_init(void)
132{
133 return s3c24xx_serial_initconsole(&s5p_serial_drv, s5p_uart_inf);
134}
135
136console_initcall(s5pv210_serial_console_init);
137
138static int __init s5p_serial_init(void)
139{
140 return s3c24xx_serial_init(&s5p_serial_drv, *s5p_uart_inf);
141}
142
143static void __exit s5p_serial_exit(void)
144{
145 platform_driver_unregister(&s5p_serial_drv);
146}
147
148module_init(s5p_serial_init);
149module_exit(s5p_serial_exit);
150
151MODULE_LICENSE("GPL");
152MODULE_ALIAS("platform:s5pv210-uart");
153MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
154MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index 52e3df113ec0..a9d6c5626a0a 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -1271,7 +1271,7 @@ s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
1271 unsigned long ufstat, utrstat; 1271 unsigned long ufstat, utrstat;
1272 1272
1273 if (ufcon & S3C2410_UFCON_FIFOMODE) { 1273 if (ufcon & S3C2410_UFCON_FIFOMODE) {
1274 /* fifo mode - check ammount of data in fifo registers... */ 1274 /* fifo mode - check amount of data in fifo registers... */
1275 1275
1276 ufstat = rd_regl(port, S3C2410_UFSTAT); 1276 ufstat = rd_regl(port, S3C2410_UFSTAT);
1277 return (ufstat & info->tx_fifofull) ? 0 : 1; 1277 return (ufstat & info->tx_fifofull) ? 0 : 1;
@@ -1374,7 +1374,7 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1374 * data. 1374 * data.
1375*/ 1375*/
1376 1376
1377static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) 1377static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
1378{ 1378{
1379 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; 1379 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1380 struct platform_device **platdev_ptr; 1380 struct platform_device **platdev_ptr;
@@ -1385,7 +1385,7 @@ static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
1385 platdev_ptr = s3c24xx_uart_devs; 1385 platdev_ptr = s3c24xx_uart_devs;
1386 1386
1387 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) { 1387 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
1388 s3c24xx_serial_init_port(ptr, info, *platdev_ptr); 1388 s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
1389 } 1389 }
1390 1390
1391 return 0; 1391 return 0;
@@ -1451,7 +1451,7 @@ static struct console s3c24xx_serial_console = {
1451}; 1451};
1452 1452
1453int s3c24xx_serial_initconsole(struct platform_driver *drv, 1453int s3c24xx_serial_initconsole(struct platform_driver *drv,
1454 struct s3c24xx_uart_info *info) 1454 struct s3c24xx_uart_info **info)
1455 1455
1456{ 1456{
1457 struct platform_device *dev = s3c24xx_uart_devs[0]; 1457 struct platform_device *dev = s3c24xx_uart_devs[0];
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h
index 1fb22343df42..0ac06a07d25f 100644
--- a/drivers/serial/samsung.h
+++ b/drivers/serial/samsung.h
@@ -75,19 +75,24 @@ extern int s3c24xx_serial_probe(struct platform_device *dev,
75extern int __devexit s3c24xx_serial_remove(struct platform_device *dev); 75extern int __devexit s3c24xx_serial_remove(struct platform_device *dev);
76 76
77extern int s3c24xx_serial_initconsole(struct platform_driver *drv, 77extern int s3c24xx_serial_initconsole(struct platform_driver *drv,
78 struct s3c24xx_uart_info *uart); 78 struct s3c24xx_uart_info **uart);
79 79
80extern int s3c24xx_serial_init(struct platform_driver *drv, 80extern int s3c24xx_serial_init(struct platform_driver *drv,
81 struct s3c24xx_uart_info *info); 81 struct s3c24xx_uart_info *info);
82 82
83#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE 83#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
84 84
85#define s3c24xx_console_init(__drv, __inf) \ 85#define s3c24xx_console_init(__drv, __inf) \
86static int __init s3c_serial_console_init(void) \ 86static int __init s3c_serial_console_init(void) \
87{ \ 87{ \
88 return s3c24xx_serial_initconsole(__drv, __inf); \ 88 struct s3c24xx_uart_info *uinfo[CONFIG_SERIAL_SAMSUNG_UARTS]; \
89} \ 89 int i; \
90 \ 90 \
91 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) \
92 uinfo[i] = __inf; \
93 return s3c24xx_serial_initconsole(__drv, uinfo); \
94} \
95 \
91console_initcall(s3c_serial_console_init) 96console_initcall(s3c_serial_console_init)
92 97
93#else 98#else
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index f7d2589926d2..fad67d33b0bd 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -30,7 +30,8 @@
30 */ 30 */
31# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 31# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
32#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 32#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7721) 33 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
34 defined(CONFIG_ARCH_SHMOBILE)
34# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 35# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
35# define PORT_PTCR 0xA405011EUL 36# define PORT_PTCR 0xA405011EUL
36# define PORT_PVCR 0xA4050122UL 37# define PORT_PVCR 0xA4050122UL
@@ -228,7 +229,8 @@
228 229
229#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 230#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
230 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 231 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
231 defined(CONFIG_CPU_SUBTYPE_SH7721) 232 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
233 defined(CONFIG_ARCH_SHMOBILE)
232# define SCIF_ORER 0x0200 234# define SCIF_ORER 0x0200
233# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) 235# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
234# define SCIF_RFDC_MASK 0x007f 236# define SCIF_RFDC_MASK 0x007f
@@ -261,7 +263,8 @@
261 263
262#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 264#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
263 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 265 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
264 defined(CONFIG_CPU_SUBTYPE_SH7721) 266 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
267 defined(CONFIG_ARCH_SHMOBILE)
265# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) 268# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
266# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) 269# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
267# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) 270# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
@@ -356,7 +359,7 @@
356 SCI_OUT(sci_size, sci_offset, value); \ 359 SCI_OUT(sci_size, sci_offset, value); \
357 } 360 }
358 361
359#ifdef CONFIG_CPU_SH3 362#if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE)
360#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 363#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
361#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ 364#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
362 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ 365 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
@@ -366,7 +369,8 @@
366 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) 369 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
367#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 370#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
368 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 371 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
369 defined(CONFIG_CPU_SUBTYPE_SH7721) 372 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
373 defined(CONFIG_ARCH_SHMOBILE)
370#define SCIF_FNS(name, scif_offset, scif_size) \ 374#define SCIF_FNS(name, scif_offset, scif_size) \
371 CPU_SCIF_FNS(name, scif_offset, scif_size) 375 CPU_SCIF_FNS(name, scif_offset, scif_size)
372#else 376#else
@@ -401,7 +405,8 @@
401 405
402#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 406#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
403 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 407 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
404 defined(CONFIG_CPU_SUBTYPE_SH7721) 408 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
409 defined(CONFIG_ARCH_SHMOBILE)
405 410
406SCIF_FNS(SCSMR, 0x00, 16) 411SCIF_FNS(SCSMR, 0x00, 16)
407SCIF_FNS(SCBRR, 0x04, 8) 412SCIF_FNS(SCBRR, 0x04, 8)
@@ -413,7 +418,7 @@ SCIF_FNS(SCFCR, 0x18, 16)
413SCIF_FNS(SCFDR, 0x1c, 16) 418SCIF_FNS(SCFDR, 0x1c, 16)
414SCIF_FNS(SCxTDR, 0x20, 8) 419SCIF_FNS(SCxTDR, 0x20, 8)
415SCIF_FNS(SCxRDR, 0x24, 8) 420SCIF_FNS(SCxRDR, 0x24, 8)
416SCIF_FNS(SCLSR, 0x24, 16) 421SCIF_FNS(SCLSR, 0x00, 0)
417#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ 422#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
418 defined(CONFIG_CPU_SUBTYPE_SH7724) 423 defined(CONFIG_CPU_SUBTYPE_SH7724)
419SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) 424SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16)
@@ -583,7 +588,8 @@ static inline int sci_rxd_in(struct uart_port *port)
583#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) 588#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
584#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 589#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
585 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 590 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
586 defined(CONFIG_CPU_SUBTYPE_SH7721) 591 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
592 defined(CONFIG_ARCH_SHMOBILE)
587#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) 593#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
588#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ 594#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
589 defined(CONFIG_CPU_SUBTYPE_SH7724) 595 defined(CONFIG_CPU_SUBTYPE_SH7724)
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index 3a5a17db9474..c2750391fd34 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -762,6 +762,10 @@ static void __init intc_register_irq(struct intc_desc *desc,
762 762
763 if (desc->hw.ack_regs) 763 if (desc->hw.ack_regs)
764 ack_handle[irq] = intc_ack_data(desc, d, enum_id); 764 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
765
766#ifdef CONFIG_ARM
767 set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
768#endif
765} 769}
766 770
767static unsigned int __init save_reg(struct intc_desc_int *d, 771static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -1024,8 +1028,12 @@ unsigned int create_irq_nr(unsigned int irq_want, int node)
1024out_unlock: 1028out_unlock:
1025 spin_unlock_irqrestore(&vector_lock, flags); 1029 spin_unlock_irqrestore(&vector_lock, flags);
1026 1030
1027 if (irq > 0) 1031 if (irq > 0) {
1028 dynamic_irq_init(irq); 1032 dynamic_irq_init(irq);
1033#ifdef CONFIG_ARM
1034 set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
1035#endif
1036 }
1029 1037
1030 return irq; 1038 return irq;
1031} 1039}
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index c010733877ae..1fabede9e061 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -275,7 +275,7 @@ static inline u32 ack_bit(unsigned int irq)
275 * Claim the FIQ handler (only one can be active at any one time) and 275 * Claim the FIQ handler (only one can be active at any one time) and
276 * then setup the correct transfer code for this transfer. 276 * then setup the correct transfer code for this transfer.
277 * 277 *
278 * This call updates all the necessary state information if sucessful, 278 * This call updates all the necessary state information if successful,
279 * so the caller does not need to do anything more than start the transfer 279 * so the caller does not need to do anything more than start the transfer
280 * as normal, since the IRQ will have been re-routed to the FIQ handler. 280 * as normal, since the IRQ will have been re-routed to the FIQ handler.
281*/ 281*/
diff --git a/drivers/staging/asus_oled/asus_oled.c b/drivers/staging/asus_oled/asus_oled.c
index cadb6f7321ad..7ebecc92c61b 100644
--- a/drivers/staging/asus_oled/asus_oled.c
+++ b/drivers/staging/asus_oled/asus_oled.c
@@ -770,13 +770,8 @@ static struct usb_driver oled_driver = {
770 .id_table = id_table, 770 .id_table = id_table,
771}; 771};
772 772
773static ssize_t version_show(struct class *dev, char *buf) 773static CLASS_ATTR_STRING(version, S_IRUGO,
774{ 774 ASUS_OLED_UNDERSCORE_NAME " " ASUS_OLED_VERSION);
775 return sprintf(buf, ASUS_OLED_UNDERSCORE_NAME " %s\n",
776 ASUS_OLED_VERSION);
777}
778
779static CLASS_ATTR(version, S_IRUGO, version_show, NULL);
780 775
781static int __init asus_oled_init(void) 776static int __init asus_oled_init(void)
782{ 777{
@@ -788,7 +783,7 @@ static int __init asus_oled_init(void)
788 return PTR_ERR(oled_class); 783 return PTR_ERR(oled_class);
789 } 784 }
790 785
791 retval = class_create_file(oled_class, &class_attr_version); 786 retval = class_create_file(oled_class, &class_attr_version.attr);
792 if (retval) { 787 if (retval) {
793 err("Error creating class version file"); 788 err("Error creating class version file");
794 goto error; 789 goto error;
@@ -810,7 +805,7 @@ error:
810 805
811static void __exit asus_oled_exit(void) 806static void __exit asus_oled_exit(void)
812{ 807{
813 class_remove_file(oled_class, &class_attr_version); 808 class_remove_file(oled_class, &class_attr_version.attr);
814 class_destroy(oled_class); 809 class_destroy(oled_class);
815 810
816 usb_deregister(&oled_driver); 811 usb_deregister(&oled_driver);
diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
index 8aa1955f35ed..1da73ecd9799 100644
--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
@@ -44,17 +44,6 @@ config UIO_PDRV_GENIRQ
44 44
45 If you don't know what to do here, say N. 45 If you don't know what to do here, say N.
46 46
47config UIO_SMX
48 tristate "SMX cryptengine UIO interface"
49 help
50 Userspace IO interface to the Cryptography engine found on the
51 Nias Digital SMX boards. These will be available from Q4 2008
52 from http://www.niasdigital.com. The userspace part of this
53 driver will be released under the GPL at the same time as the
54 hardware and will be able to be downloaded from the same site.
55
56 If you compile this as a module, it will be called uio_smx.
57
58config UIO_AEC 47config UIO_AEC
59 tristate "AEC video timestamp device" 48 tristate "AEC video timestamp device"
60 depends on PCI 49 depends on PCI
@@ -74,6 +63,7 @@ config UIO_AEC
74 63
75config UIO_SERCOS3 64config UIO_SERCOS3
76 tristate "Automata Sercos III PCI card driver" 65 tristate "Automata Sercos III PCI card driver"
66 depends on PCI
77 help 67 help
78 Userspace I/O interface for the Sercos III PCI card from 68 Userspace I/O interface for the Sercos III PCI card from
79 Automata GmbH. The userspace part of this driver will be 69 Automata GmbH. The userspace part of this driver will be
@@ -87,11 +77,21 @@ config UIO_SERCOS3
87config UIO_PCI_GENERIC 77config UIO_PCI_GENERIC
88 tristate "Generic driver for PCI 2.3 and PCI Express cards" 78 tristate "Generic driver for PCI 2.3 and PCI Express cards"
89 depends on PCI 79 depends on PCI
90 default n
91 help 80 help
92 Generic driver that you can bind, dynamically, to any 81 Generic driver that you can bind, dynamically, to any
93 PCI 2.3 compliant and PCI Express card. It is useful, 82 PCI 2.3 compliant and PCI Express card. It is useful,
94 primarily, for virtualization scenarios. 83 primarily, for virtualization scenarios.
95 If you compile this as a module, it will be called uio_pci_generic. 84 If you compile this as a module, it will be called uio_pci_generic.
96 85
86config UIO_NETX
87 tristate "Hilscher NetX Card driver"
88 depends on PCI
89 help
90 Driver for Hilscher NetX based fieldbus cards (cifX, comX).
91 This driver requires a userspace component that comes with the card
92 or is available from Hilscher (http://www.hilscher.com).
93
94 To compile this driver as a module, choose M here; the module
95 will be called uio_netx.
96
97endif 97endif
diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile
index 73b2e7516729..18fd818c5b97 100644
--- a/drivers/uio/Makefile
+++ b/drivers/uio/Makefile
@@ -2,7 +2,7 @@ obj-$(CONFIG_UIO) += uio.o
2obj-$(CONFIG_UIO_CIF) += uio_cif.o 2obj-$(CONFIG_UIO_CIF) += uio_cif.o
3obj-$(CONFIG_UIO_PDRV) += uio_pdrv.o 3obj-$(CONFIG_UIO_PDRV) += uio_pdrv.o
4obj-$(CONFIG_UIO_PDRV_GENIRQ) += uio_pdrv_genirq.o 4obj-$(CONFIG_UIO_PDRV_GENIRQ) += uio_pdrv_genirq.o
5obj-$(CONFIG_UIO_SMX) += uio_smx.o
6obj-$(CONFIG_UIO_AEC) += uio_aec.o 5obj-$(CONFIG_UIO_AEC) += uio_aec.o
7obj-$(CONFIG_UIO_SERCOS3) += uio_sercos3.o 6obj-$(CONFIG_UIO_SERCOS3) += uio_sercos3.o
8obj-$(CONFIG_UIO_PCI_GENERIC) += uio_pci_generic.o 7obj-$(CONFIG_UIO_PCI_GENERIC) += uio_pci_generic.o
8obj-$(CONFIG_UIO_NETX) += uio_netx.o
diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c
index e941367dd28f..4de382acd8f2 100644
--- a/drivers/uio/uio.c
+++ b/drivers/uio/uio.c
@@ -129,7 +129,7 @@ static ssize_t map_type_show(struct kobject *kobj, struct attribute *attr,
129 return entry->show(mem, buf); 129 return entry->show(mem, buf);
130} 130}
131 131
132static struct sysfs_ops map_sysfs_ops = { 132static const struct sysfs_ops map_sysfs_ops = {
133 .show = map_type_show, 133 .show = map_type_show,
134}; 134};
135 135
@@ -217,7 +217,7 @@ static ssize_t portio_type_show(struct kobject *kobj, struct attribute *attr,
217 return entry->show(port, buf); 217 return entry->show(port, buf);
218} 218}
219 219
220static struct sysfs_ops portio_sysfs_ops = { 220static const struct sysfs_ops portio_sysfs_ops = {
221 .show = portio_type_show, 221 .show = portio_type_show,
222}; 222};
223 223
diff --git a/drivers/uio/uio_netx.c b/drivers/uio/uio_netx.c
new file mode 100644
index 000000000000..afbf0bd55cc9
--- /dev/null
+++ b/drivers/uio/uio_netx.c
@@ -0,0 +1,172 @@
1/*
2 * UIO driver for Hilscher NetX based fieldbus cards (cifX, comX).
3 * See http://www.hilscher.com for details.
4 *
5 * (C) 2007 Hans J. Koch <hjk@linutronix.de>
6 * (C) 2008 Manuel Traut <manut@linutronix.de>
7 *
8 * Licensed under GPL version 2 only.
9 *
10 */
11
12#include <linux/device.h>
13#include <linux/io.h>
14#include <linux/module.h>
15#include <linux/pci.h>
16#include <linux/uio_driver.h>
17
18#define PCI_VENDOR_ID_HILSCHER 0x15CF
19#define PCI_DEVICE_ID_HILSCHER_NETX 0x0000
20#define PCI_SUBDEVICE_ID_NXSB_PCA 0x3235
21#define PCI_SUBDEVICE_ID_NXPCA 0x3335
22
23#define DPM_HOST_INT_EN0 0xfff0
24#define DPM_HOST_INT_STAT0 0xffe0
25
26#define DPM_HOST_INT_MASK 0xe600ffff
27#define DPM_HOST_INT_GLOBAL_EN 0x80000000
28
29static irqreturn_t netx_handler(int irq, struct uio_info *dev_info)
30{
31 void __iomem *int_enable_reg = dev_info->mem[0].internal_addr
32 + DPM_HOST_INT_EN0;
33 void __iomem *int_status_reg = dev_info->mem[0].internal_addr
34 + DPM_HOST_INT_STAT0;
35
36 /* Is one of our interrupts enabled and active ? */
37 if (!(ioread32(int_enable_reg) & ioread32(int_status_reg)
38 & DPM_HOST_INT_MASK))
39 return IRQ_NONE;
40
41 /* Disable interrupt */
42 iowrite32(ioread32(int_enable_reg) & ~DPM_HOST_INT_GLOBAL_EN,
43 int_enable_reg);
44 return IRQ_HANDLED;
45}
46
47static int __devinit netx_pci_probe(struct pci_dev *dev,
48 const struct pci_device_id *id)
49{
50 struct uio_info *info;
51 int bar;
52
53 info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
54 if (!info)
55 return -ENOMEM;
56
57 if (pci_enable_device(dev))
58 goto out_free;
59
60 if (pci_request_regions(dev, "netx"))
61 goto out_disable;
62
63 switch (id->device) {
64 case PCI_DEVICE_ID_HILSCHER_NETX:
65 bar = 0;
66 info->name = "netx";
67 break;
68 default:
69 bar = 2;
70 info->name = "netx_plx";
71 }
72
73 /* BAR0 or 2 points to the card's dual port memory */
74 info->mem[0].addr = pci_resource_start(dev, bar);
75 if (!info->mem[0].addr)
76 goto out_release;
77 info->mem[0].internal_addr = ioremap(pci_resource_start(dev, bar),
78 pci_resource_len(dev, bar));
79
80 if (!info->mem[0].internal_addr)
81 goto out_release;
82
83 info->mem[0].size = pci_resource_len(dev, bar);
84 info->mem[0].memtype = UIO_MEM_PHYS;
85 info->irq = dev->irq;
86 info->irq_flags = IRQF_SHARED;
87 info->handler = netx_handler;
88 info->version = "0.0.1";
89
90 /* Make sure all interrupts are disabled */
91 iowrite32(0, info->mem[0].internal_addr + DPM_HOST_INT_EN0);
92
93 if (uio_register_device(&dev->dev, info))
94 goto out_unmap;
95
96 pci_set_drvdata(dev, info);
97 dev_info(&dev->dev, "Found %s card, registered UIO device.\n",
98 info->name);
99
100 return 0;
101
102out_unmap:
103 iounmap(info->mem[0].internal_addr);
104out_release:
105 pci_release_regions(dev);
106out_disable:
107 pci_disable_device(dev);
108out_free:
109 kfree(info);
110 return -ENODEV;
111}
112
113static void netx_pci_remove(struct pci_dev *dev)
114{
115 struct uio_info *info = pci_get_drvdata(dev);
116
117 /* Disable all interrupts */
118 iowrite32(0, info->mem[0].internal_addr + DPM_HOST_INT_EN0);
119 uio_unregister_device(info);
120 pci_release_regions(dev);
121 pci_disable_device(dev);
122 pci_set_drvdata(dev, NULL);
123 iounmap(info->mem[0].internal_addr);
124
125 kfree(info);
126}
127
128static struct pci_device_id netx_pci_ids[] = {
129 {
130 .vendor = PCI_VENDOR_ID_HILSCHER,
131 .device = PCI_DEVICE_ID_HILSCHER_NETX,
132 .subvendor = 0,
133 .subdevice = 0,
134 },
135 {
136 .vendor = PCI_VENDOR_ID_PLX,
137 .device = PCI_DEVICE_ID_PLX_9030,
138 .subvendor = PCI_VENDOR_ID_PLX,
139 .subdevice = PCI_SUBDEVICE_ID_NXSB_PCA,
140 },
141 {
142 .vendor = PCI_VENDOR_ID_PLX,
143 .device = PCI_DEVICE_ID_PLX_9030,
144 .subvendor = PCI_VENDOR_ID_PLX,
145 .subdevice = PCI_SUBDEVICE_ID_NXPCA,
146 },
147 { 0, }
148};
149
150static struct pci_driver netx_pci_driver = {
151 .name = "netx",
152 .id_table = netx_pci_ids,
153 .probe = netx_pci_probe,
154 .remove = netx_pci_remove,
155};
156
157static int __init netx_init_module(void)
158{
159 return pci_register_driver(&netx_pci_driver);
160}
161
162static void __exit netx_exit_module(void)
163{
164 pci_unregister_driver(&netx_pci_driver);
165}
166
167module_init(netx_init_module);
168module_exit(netx_exit_module);
169
170MODULE_DEVICE_TABLE(pci, netx_pci_ids);
171MODULE_LICENSE("GPL v2");
172MODULE_AUTHOR("Hans J. Koch, Manuel Traut");
diff --git a/drivers/uio/uio_smx.c b/drivers/uio/uio_smx.c
deleted file mode 100644
index 44054a650a8a..000000000000
--- a/drivers/uio/uio_smx.c
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * UIO SMX Cryptengine driver.
3 *
4 * (C) 2008 Nias Digital P/L <bn@niasdigital.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/device.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/uio_driver.h>
16#include <linux/io.h>
17
18#define DRV_NAME "smx-ce"
19#define DRV_VERSION "0.03"
20
21#define SMX_CSR 0x00000000
22#define SMX_EnD 0x00000001
23#define SMX_RUN 0x00000002
24#define SMX_DRDY 0x00000004
25#define SMX_ERR 0x00000008
26
27static irqreturn_t smx_handler(int irq, struct uio_info *dev_info)
28{
29 void __iomem *csr = dev_info->mem[0].internal_addr + SMX_CSR;
30
31 u32 status = ioread32(csr);
32
33 if (!(status & SMX_DRDY))
34 return IRQ_NONE;
35
36 /* Disable interrupt */
37 iowrite32(status & ~SMX_DRDY, csr);
38 return IRQ_HANDLED;
39}
40
41static int __devinit smx_ce_probe(struct platform_device *dev)
42{
43
44 int ret = -ENODEV;
45 struct uio_info *info;
46 struct resource *regs;
47
48 info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
49 if (!info)
50 return -ENOMEM;
51
52 regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
53 if (!regs) {
54 dev_err(&dev->dev, "No memory resource specified\n");
55 goto out_free;
56 }
57
58 info->mem[0].addr = regs->start;
59 if (!info->mem[0].addr) {
60 dev_err(&dev->dev, "Invalid memory resource\n");
61 goto out_free;
62 }
63
64 info->mem[0].size = regs->end - regs->start + 1;
65 info->mem[0].internal_addr = ioremap(regs->start, info->mem[0].size);
66
67 if (!info->mem[0].internal_addr) {
68 dev_err(&dev->dev, "Can't remap memory address range\n");
69 goto out_free;
70 }
71
72 info->mem[0].memtype = UIO_MEM_PHYS;
73
74 info->name = "smx-ce";
75 info->version = "0.03";
76
77 info->irq = platform_get_irq(dev, 0);
78 if (info->irq < 0) {
79 ret = info->irq;
80 dev_err(&dev->dev, "No (or invalid) IRQ resource specified\n");
81 goto out_unmap;
82 }
83
84 info->irq_flags = IRQF_SHARED;
85 info->handler = smx_handler;
86
87 platform_set_drvdata(dev, info);
88
89 ret = uio_register_device(&dev->dev, info);
90
91 if (ret)
92 goto out_unmap;
93
94 return 0;
95
96out_unmap:
97 iounmap(info->mem[0].internal_addr);
98out_free:
99 kfree(info);
100
101 return ret;
102}
103
104static int __devexit smx_ce_remove(struct platform_device *dev)
105{
106 struct uio_info *info = platform_get_drvdata(dev);
107
108 uio_unregister_device(info);
109 platform_set_drvdata(dev, NULL);
110 iounmap(info->mem[0].internal_addr);
111
112 kfree(info);
113
114 return 0;
115}
116
117static struct platform_driver smx_ce_driver = {
118 .probe = smx_ce_probe,
119 .remove = __devexit_p(smx_ce_remove),
120 .driver = {
121 .name = DRV_NAME,
122 .owner = THIS_MODULE,
123 },
124};
125
126static int __init smx_ce_init_module(void)
127{
128 return platform_driver_register(&smx_ce_driver);
129}
130module_init(smx_ce_init_module);
131
132static void __exit smx_ce_exit_module(void)
133{
134 platform_driver_unregister(&smx_ce_driver);
135}
136module_exit(smx_ce_exit_module);
137
138MODULE_LICENSE("GPL v2");
139MODULE_VERSION(DRV_VERSION);
140MODULE_AUTHOR("Ben Nizette <bn@niasdigital.com>");
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index a7037bf81688..f3c233806fa3 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -489,10 +489,10 @@ void usb_driver_release_interface(struct usb_driver *driver,
489 if (device_is_registered(dev)) { 489 if (device_is_registered(dev)) {
490 device_release_driver(dev); 490 device_release_driver(dev);
491 } else { 491 } else {
492 down(&dev->sem); 492 device_lock(dev);
493 usb_unbind_interface(dev); 493 usb_unbind_interface(dev);
494 dev->driver = NULL; 494 dev->driver = NULL;
495 up(&dev->sem); 495 device_unlock(dev);
496 } 496 }
497} 497}
498EXPORT_SYMBOL_GPL(usb_driver_release_interface); 498EXPORT_SYMBOL_GPL(usb_driver_release_interface);
diff --git a/drivers/usb/gadget/fsl_mx3_udc.c b/drivers/usb/gadget/fsl_mx3_udc.c
index 4bc2bf3d602e..20a802ecaa15 100644
--- a/drivers/usb/gadget/fsl_mx3_udc.c
+++ b/drivers/usb/gadget/fsl_mx3_udc.c
@@ -17,6 +17,8 @@
17#include <linux/fsl_devices.h> 17#include <linux/fsl_devices.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <mach/hardware.h>
21
20static struct clk *mxc_ahb_clk; 22static struct clk *mxc_ahb_clk;
21static struct clk *mxc_usb_clk; 23static struct clk *mxc_usb_clk;
22 24
@@ -28,14 +30,16 @@ int fsl_udc_clk_init(struct platform_device *pdev)
28 30
29 pdata = pdev->dev.platform_data; 31 pdata = pdev->dev.platform_data;
30 32
31 mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb"); 33 if (!cpu_is_mx35()) {
32 if (IS_ERR(mxc_ahb_clk)) 34 mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb");
33 return PTR_ERR(mxc_ahb_clk); 35 if (IS_ERR(mxc_ahb_clk))
36 return PTR_ERR(mxc_ahb_clk);
34 37
35 ret = clk_enable(mxc_ahb_clk); 38 ret = clk_enable(mxc_ahb_clk);
36 if (ret < 0) { 39 if (ret < 0) {
37 dev_err(&pdev->dev, "clk_enable(\"usb_ahb\") failed\n"); 40 dev_err(&pdev->dev, "clk_enable(\"usb_ahb\") failed\n");
38 goto eenahb; 41 goto eenahb;
42 }
39 } 43 }
40 44
41 /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */ 45 /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
@@ -50,6 +54,7 @@ int fsl_udc_clk_init(struct platform_device *pdev)
50 if (pdata->phy_mode != FSL_USB2_PHY_ULPI && 54 if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
51 (freq < 59999000 || freq > 60001000)) { 55 (freq < 59999000 || freq > 60001000)) {
52 dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq); 56 dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
57 ret = -EINVAL;
53 goto eclkrate; 58 goto eclkrate;
54 } 59 }
55 60
@@ -66,9 +71,11 @@ eclkrate:
66 clk_put(mxc_usb_clk); 71 clk_put(mxc_usb_clk);
67 mxc_usb_clk = NULL; 72 mxc_usb_clk = NULL;
68egusb: 73egusb:
69 clk_disable(mxc_ahb_clk); 74 if (!cpu_is_mx35())
75 clk_disable(mxc_ahb_clk);
70eenahb: 76eenahb:
71 clk_put(mxc_ahb_clk); 77 if (!cpu_is_mx35())
78 clk_put(mxc_ahb_clk);
72 return ret; 79 return ret;
73} 80}
74 81
@@ -90,6 +97,8 @@ void fsl_udc_clk_release(void)
90 clk_disable(mxc_usb_clk); 97 clk_disable(mxc_usb_clk);
91 clk_put(mxc_usb_clk); 98 clk_put(mxc_usb_clk);
92 } 99 }
93 clk_disable(mxc_ahb_clk); 100 if (!cpu_is_mx35()) {
94 clk_put(mxc_ahb_clk); 101 clk_disable(mxc_ahb_clk);
102 clk_put(mxc_ahb_clk);
103 }
95} 104}
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index e6fedbd5a654..be5fb34d9602 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -65,6 +65,10 @@
65#include <mach/pxa25x-udc.h> 65#include <mach/pxa25x-udc.h>
66#endif 66#endif
67 67
68#ifdef CONFIG_ARCH_LUBBOCK
69#include <mach/lubbock.h>
70#endif
71
68#include <asm/mach/udc_pxa2xx.h> 72#include <asm/mach/udc_pxa2xx.h>
69 73
70 74
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 7e5bf593d386..f742c8e7397c 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -30,7 +30,7 @@
30 30
31#include <plat/regs-usb-hsotg-phy.h> 31#include <plat/regs-usb-hsotg-phy.h>
32#include <plat/regs-usb-hsotg.h> 32#include <plat/regs-usb-hsotg.h>
33#include <plat/regs-sys.h> 33#include <mach/regs-sys.h>
34#include <plat/udc-hs.h> 34#include <plat/udc-hs.h>
35 35
36#define DMA_ADDR_INVALID (~((dma_addr_t)0)) 36#define DMA_ADDR_INVALID (~((dma_addr_t)0))
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 66913811af5e..a883f9dd3f8a 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -274,7 +274,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
274 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through 274 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
275 * the Mentor registers (except for setup), use the TI ones and EOI. 275 * the Mentor registers (except for setup), use the TI ones and EOI.
276 * 276 *
277 * Docs describe irq "vector" registers asociated with the CPPI and 277 * Docs describe irq "vector" registers associated with the CPPI and
278 * USB EOI registers. These hold a bitmask corresponding to the 278 * USB EOI registers. These hold a bitmask corresponding to the
279 * current IRQ, not an irq handler address. Would using those bits 279 * current IRQ, not an irq handler address. Would using those bits
280 * resolve some of the races observed in this dispatch code?? 280 * resolve some of the races observed in this dispatch code??
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 292894a2c247..8d8062b10e2f 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -491,7 +491,7 @@ static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)
491#define MUSB_FLAT_OFFSET(_epnum, _offset) \ 491#define MUSB_FLAT_OFFSET(_epnum, _offset) \
492 (USB_OFFSET(USB_EP_NI0_TXMAXP) + (0x40 * (_epnum)) + (_offset)) 492 (USB_OFFSET(USB_EP_NI0_TXMAXP) + (0x40 * (_epnum)) + (_offset))
493 493
494/* Not implemented - HW has seperate Tx/Rx FIFO */ 494/* Not implemented - HW has separate Tx/Rx FIFO */
495#define MUSB_TXCSR_MODE 0x0000 495#define MUSB_TXCSR_MODE 0x0000
496 496
497static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size) 497static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size)
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
index baf74b44e6ed..e23c77925e7a 100644
--- a/drivers/usb/serial/cypress_m8.c
+++ b/drivers/usb/serial/cypress_m8.c
@@ -152,7 +152,7 @@ struct cypress_private {
152 int isthrottled; /* if throttled, discard reads */ 152 int isthrottled; /* if throttled, discard reads */
153 wait_queue_head_t delta_msr_wait; /* used for TIOCMIWAIT */ 153 wait_queue_head_t delta_msr_wait; /* used for TIOCMIWAIT */
154 char prev_status, diff_status; /* used for TIOCMIWAIT */ 154 char prev_status, diff_status; /* used for TIOCMIWAIT */
155 /* we pass a pointer to this as the arguement sent to 155 /* we pass a pointer to this as the argument sent to
156 cypress_set_termios old_termios */ 156 cypress_set_termios old_termios */
157 struct ktermios tmp_termios; /* stores the old termios settings */ 157 struct ktermios tmp_termios; /* stores the old termios settings */
158}; 158};
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
index f37476e22684..701452ae9197 100644
--- a/drivers/usb/serial/opticon.c
+++ b/drivers/usb/serial/opticon.c
@@ -115,7 +115,7 @@ static void opticon_bulk_callback(struct urb *urb)
115 } 115 }
116 } else { 116 } else {
117 dev_dbg(&priv->udev->dev, 117 dev_dbg(&priv->udev->dev,
118 "Improper ammount of data received from the device, " 118 "Improper amount of data received from the device, "
119 "%d bytes", urb->actual_length); 119 "%d bytes", urb->actual_length);
120 } 120 }
121 121
diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c
index 72398888858f..ee190cc1757c 100644
--- a/drivers/usb/serial/symbolserial.c
+++ b/drivers/usb/serial/symbolserial.c
@@ -94,7 +94,7 @@ static void symbol_int_callback(struct urb *urb)
94 } 94 }
95 } else { 95 } else {
96 dev_dbg(&priv->udev->dev, 96 dev_dbg(&priv->udev->dev,
97 "Improper ammount of data received from the device, " 97 "Improper amount of data received from the device, "
98 "%d bytes", urb->actual_length); 98 "%d bytes", urb->actual_length);
99 } 99 }
100 100
diff --git a/drivers/usb/wusbcore/wusbhc.h b/drivers/usb/wusbcore/wusbhc.h
index fd2fd4e277e1..759cda55f7c3 100644
--- a/drivers/usb/wusbcore/wusbhc.h
+++ b/drivers/usb/wusbcore/wusbhc.h
@@ -198,7 +198,7 @@ struct wusb_port {
198 * ports) this HC will take. Read-only. 198 * ports) this HC will take. Read-only.
199 * 199 *
200 * @port Array of port status for each fake root port. Guaranteed to 200 * @port Array of port status for each fake root port. Guaranteed to
201 * always be the same lenght during device existence 201 * always be the same length during device existence
202 * [this allows for some unlocked but referenced reading]. 202 * [this allows for some unlocked but referenced reading].
203 * 203 *
204 * @mmcies_max Max number of Information Elements this HC can send 204 * @mmcies_max Max number of Information Elements this HC can send
diff --git a/drivers/uwb/driver.c b/drivers/uwb/driver.c
index da77e41de990..08bd6dbfd4a6 100644
--- a/drivers/uwb/driver.c
+++ b/drivers/uwb/driver.c
@@ -74,13 +74,16 @@
74unsigned long beacon_timeout_ms = 500; 74unsigned long beacon_timeout_ms = 500;
75 75
76static 76static
77ssize_t beacon_timeout_ms_show(struct class *class, char *buf) 77ssize_t beacon_timeout_ms_show(struct class *class,
78 struct class_attribute *attr,
79 char *buf)
78{ 80{
79 return scnprintf(buf, PAGE_SIZE, "%lu\n", beacon_timeout_ms); 81 return scnprintf(buf, PAGE_SIZE, "%lu\n", beacon_timeout_ms);
80} 82}
81 83
82static 84static
83ssize_t beacon_timeout_ms_store(struct class *class, 85ssize_t beacon_timeout_ms_store(struct class *class,
86 struct class_attribute *attr,
84 const char *buf, size_t size) 87 const char *buf, size_t size)
85{ 88{
86 unsigned long bt; 89 unsigned long bt;
diff --git a/drivers/uwb/i1480/i1480-est.c b/drivers/uwb/i1480/i1480-est.c
index 7bf8c6febae7..f2eb4d8b76c9 100644
--- a/drivers/uwb/i1480/i1480-est.c
+++ b/drivers/uwb/i1480/i1480-est.c
@@ -54,7 +54,7 @@ static struct uwb_est_entry i1480_est_fd01[] = {
54 .size = sizeof(struct i1480_rceb) + 2 }, 54 .size = sizeof(struct i1480_rceb) + 2 },
55}; 55};
56 56
57static int i1480_est_init(void) 57static int __init i1480_est_init(void)
58{ 58{
59 int result = uwb_est_register(i1480_CET_VS1, 0x00, 0x8086, 0x0c3b, 59 int result = uwb_est_register(i1480_CET_VS1, 0x00, 0x8086, 0x0c3b,
60 i1480_est_fd00, 60 i1480_est_fd00,
@@ -73,7 +73,7 @@ static int i1480_est_init(void)
73} 73}
74module_init(i1480_est_init); 74module_init(i1480_est_init);
75 75
76static void i1480_est_exit(void) 76static void __exit i1480_est_exit(void)
77{ 77{
78 uwb_est_unregister(i1480_CET_VS1, 0x00, 0x8086, 0x0c3b, 78 uwb_est_unregister(i1480_CET_VS1, 0x00, 0x8086, 0x0c3b,
79 i1480_est_fd00, ARRAY_SIZE(i1480_est_fd00)); 79 i1480_est_fd00, ARRAY_SIZE(i1480_est_fd00));
diff --git a/drivers/uwb/umc-bus.c b/drivers/uwb/umc-bus.c
index cdd6c8efc9f8..5fad4e791b3e 100644
--- a/drivers/uwb/umc-bus.c
+++ b/drivers/uwb/umc-bus.c
@@ -62,12 +62,12 @@ int umc_controller_reset(struct umc_dev *umc)
62 struct device *parent = umc->dev.parent; 62 struct device *parent = umc->dev.parent;
63 int ret = 0; 63 int ret = 0;
64 64
65 if(down_trylock(&parent->sem)) 65 if (device_trylock(parent))
66 return -EAGAIN; 66 return -EAGAIN;
67 ret = device_for_each_child(parent, parent, umc_bus_pre_reset_helper); 67 ret = device_for_each_child(parent, parent, umc_bus_pre_reset_helper);
68 if (ret >= 0) 68 if (ret >= 0)
69 ret = device_for_each_child(parent, parent, umc_bus_post_reset_helper); 69 ret = device_for_each_child(parent, parent, umc_bus_post_reset_helper);
70 up(&parent->sem); 70 device_unlock(parent);
71 71
72 return ret; 72 return ret;
73} 73}
diff --git a/drivers/uwb/uwb-internal.h b/drivers/uwb/uwb-internal.h
index d5bcfc1c227a..157485c862c0 100644
--- a/drivers/uwb/uwb-internal.h
+++ b/drivers/uwb/uwb-internal.h
@@ -366,12 +366,12 @@ struct dentry *uwb_dbg_create_pal_dir(struct uwb_pal *pal);
366 366
367static inline void uwb_dev_lock(struct uwb_dev *uwb_dev) 367static inline void uwb_dev_lock(struct uwb_dev *uwb_dev)
368{ 368{
369 down(&uwb_dev->dev.sem); 369 device_lock(&uwb_dev->dev);
370} 370}
371 371
372static inline void uwb_dev_unlock(struct uwb_dev *uwb_dev) 372static inline void uwb_dev_unlock(struct uwb_dev *uwb_dev)
373{ 373{
374 up(&uwb_dev->dev.sem); 374 device_unlock(&uwb_dev->dev);
375} 375}
376 376
377#endif /* #ifndef __UWB_INTERNAL_H__ */ 377#endif /* #ifndef __UWB_INTERNAL_H__ */
diff --git a/drivers/uwb/uwbd.c b/drivers/uwb/uwbd.c
index 5a777d8624da..6210fe1fd1bb 100644
--- a/drivers/uwb/uwbd.c
+++ b/drivers/uwb/uwbd.c
@@ -43,7 +43,7 @@
43 * 43 *
44 * EVENTS 44 * EVENTS
45 * 45 *
46 * Events have a type, a subtype, a lenght, some other stuff and the 46 * Events have a type, a subtype, a length, some other stuff and the
47 * data blob, which depends on the event. The header is 'struct 47 * data blob, which depends on the event. The header is 'struct
48 * uwb_event'; for payloads, see 'struct uwbd_evt_*'. 48 * uwb_event'; for payloads, see 'struct uwbd_evt_*'.
49 * 49 *
diff --git a/drivers/uwb/wlp/sysfs.c b/drivers/uwb/wlp/sysfs.c
index 0370399ff4bb..6627c94cc854 100644
--- a/drivers/uwb/wlp/sysfs.c
+++ b/drivers/uwb/wlp/sysfs.c
@@ -615,8 +615,7 @@ ssize_t wlp_wss_attr_store(struct kobject *kobj, struct attribute *attr,
615 return ret; 615 return ret;
616} 616}
617 617
618static 618static const struct sysfs_ops wss_sysfs_ops = {
619struct sysfs_ops wss_sysfs_ops = {
620 .show = wlp_wss_attr_show, 619 .show = wlp_wss_attr_show,
621 .store = wlp_wss_attr_store, 620 .store = wlp_wss_attr_store,
622}; 621};
diff --git a/drivers/video/68328fb.c b/drivers/video/68328fb.c
index 0b17824b0eb5..2110556f76b3 100644
--- a/drivers/video/68328fb.c
+++ b/drivers/video/68328fb.c
@@ -308,7 +308,7 @@ static int mc68x328fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
308 * Pseudocolor: 308 * Pseudocolor:
309 * uses offset = 0 && length = RAMDAC register width. 309 * uses offset = 0 && length = RAMDAC register width.
310 * var->{color}.offset is 0 310 * var->{color}.offset is 0
311 * var->{color}.length contains widht of DAC 311 * var->{color}.length contains width of DAC
312 * cmap is not used 312 * cmap is not used
313 * RAMDAC[X] is programmed to (red, green, blue) 313 * RAMDAC[X] is programmed to (red, green, blue)
314 * Truecolor: 314 * Truecolor:
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 5a5c303a6373..dabe804ba575 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -400,9 +400,12 @@ config FB_SA1100
400 If you plan to use the LCD display with your SA-1100 system, say 400 If you plan to use the LCD display with your SA-1100 system, say
401 Y here. 401 Y here.
402 402
403config HAVE_FB_IMX
404 bool
405
403config FB_IMX 406config FB_IMX
404 tristate "Motorola i.MX LCD support" 407 tristate "Motorola i.MX LCD support"
405 depends on FB && (ARCH_MX1 || ARCH_MX2) 408 depends on FB && (HAVE_FB_IMX || ARCH_MX1 || ARCH_MX2)
406 select FB_CFB_FILLRECT 409 select FB_CFB_FILLRECT
407 select FB_CFB_COPYAREA 410 select FB_CFB_COPYAREA
408 select FB_CFB_IMAGEBLIT 411 select FB_CFB_IMAGEBLIT
@@ -909,6 +912,18 @@ config FB_XVR2500
909 mostly initialized the card already. It is treated as a 912 mostly initialized the card already. It is treated as a
910 completely dumb framebuffer device. 913 completely dumb framebuffer device.
911 914
915config FB_XVR1000
916 bool "Sun XVR-1000 support"
917 depends on SPARC64
918 select FB_CFB_FILLRECT
919 select FB_CFB_COPYAREA
920 select FB_CFB_IMAGEBLIT
921 help
922 This is the framebuffer device for the Sun XVR-1000 and similar
923 graphics cards. The driver only works on sparc64 systems where
924 the system firmware has mostly initialized the card already. It
925 is treated as a completely dumb framebuffer device.
926
912config FB_PVR2 927config FB_PVR2
913 tristate "NEC PowerVR 2 display support" 928 tristate "NEC PowerVR 2 display support"
914 depends on FB && SH_DREAMCAST 929 depends on FB && SH_DREAMCAST
@@ -1494,7 +1509,6 @@ config FB_VIA
1494 select FB_CFB_FILLRECT 1509 select FB_CFB_FILLRECT
1495 select FB_CFB_COPYAREA 1510 select FB_CFB_COPYAREA
1496 select FB_CFB_IMAGEBLIT 1511 select FB_CFB_IMAGEBLIT
1497 select FB_SOFT_CURSOR
1498 select I2C_ALGOBIT 1512 select I2C_ALGOBIT
1499 select I2C 1513 select I2C
1500 help 1514 help
@@ -1945,6 +1959,27 @@ config FB_S3C2410_DEBUG
1945 Turn on debugging messages. Note that you can set/unset at run time 1959 Turn on debugging messages. Note that you can set/unset at run time
1946 through sysfs 1960 through sysfs
1947 1961
1962config FB_NUC900
1963 bool "NUC900 LCD framebuffer support"
1964 depends on FB && ARCH_W90X900
1965 select FB_CFB_FILLRECT
1966 select FB_CFB_COPYAREA
1967 select FB_CFB_IMAGEBLIT
1968 ---help---
1969 Frame buffer driver for the built-in LCD controller in the Nuvoton
1970 NUC900 processor
1971
1972config GPM1040A0_320X240
1973 bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
1974 depends on FB_NUC900
1975
1976config FB_NUC900_DEBUG
1977 bool "NUC900 lcd debug messages"
1978 depends on FB_NUC900
1979 help
1980 Turn on debugging messages. Note that you can set/unset at run time
1981 through sysfs
1982
1948config FB_SM501 1983config FB_SM501
1949 tristate "Silicon Motion SM501 framebuffer support" 1984 tristate "Silicon Motion SM501 framebuffer support"
1950 depends on FB && MFD_SM501 1985 depends on FB && MFD_SM501
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 4ecb30c4f3f2..ddc2af2ba45b 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -79,6 +79,7 @@ obj-$(CONFIG_FB_N411) += n411.o
79obj-$(CONFIG_FB_HGA) += hgafb.o 79obj-$(CONFIG_FB_HGA) += hgafb.o
80obj-$(CONFIG_FB_XVR500) += sunxvr500.o 80obj-$(CONFIG_FB_XVR500) += sunxvr500.o
81obj-$(CONFIG_FB_XVR2500) += sunxvr2500.o 81obj-$(CONFIG_FB_XVR2500) += sunxvr2500.o
82obj-$(CONFIG_FB_XVR1000) += sunxvr1000.o
82obj-$(CONFIG_FB_IGA) += igafb.o 83obj-$(CONFIG_FB_IGA) += igafb.o
83obj-$(CONFIG_FB_APOLLO) += dnfb.o 84obj-$(CONFIG_FB_APOLLO) += dnfb.o
84obj-$(CONFIG_FB_Q40) += q40fb.o 85obj-$(CONFIG_FB_Q40) += q40fb.o
@@ -129,6 +130,7 @@ obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
129obj-$(CONFIG_FB_CARMINE) += carminefb.o 130obj-$(CONFIG_FB_CARMINE) += carminefb.o
130obj-$(CONFIG_FB_MB862XX) += mb862xx/ 131obj-$(CONFIG_FB_MB862XX) += mb862xx/
131obj-$(CONFIG_FB_MSM) += msm/ 132obj-$(CONFIG_FB_MSM) += msm/
133obj-$(CONFIG_FB_NUC900) += nuc900fb.o
132 134
133# Platform or fallback drivers go here 135# Platform or fallback drivers go here
134obj-$(CONFIG_FB_UVESA) += uvesafb.o 136obj-$(CONFIG_FB_UVESA) += uvesafb.o
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 0bcc59eb37fa..43d7d5067361 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -1221,7 +1221,7 @@ free_unused_pages(unsigned int virtual_start, unsigned int virtual_end)
1221 printk("acornfb: freed %dK memory\n", mb_freed); 1221 printk("acornfb: freed %dK memory\n", mb_freed);
1222} 1222}
1223 1223
1224static int __init acornfb_probe(struct platform_device *dev) 1224static int __devinit acornfb_probe(struct platform_device *dev)
1225{ 1225{
1226 unsigned long size; 1226 unsigned long size;
1227 u_int h_sync, v_sync; 1227 u_int h_sync, v_sync;
diff --git a/drivers/video/arcfb.c b/drivers/video/arcfb.c
index c3431691c9f2..01554d696528 100644
--- a/drivers/video/arcfb.c
+++ b/drivers/video/arcfb.c
@@ -504,7 +504,7 @@ static struct fb_ops arcfb_ops = {
504 .fb_ioctl = arcfb_ioctl, 504 .fb_ioctl = arcfb_ioctl,
505}; 505};
506 506
507static int __init arcfb_probe(struct platform_device *dev) 507static int __devinit arcfb_probe(struct platform_device *dev)
508{ 508{
509 struct fb_info *info; 509 struct fb_info *info;
510 int retval = -ENOMEM; 510 int retval = -ENOMEM;
diff --git a/drivers/video/asiliantfb.c b/drivers/video/asiliantfb.c
index 9fe90ce928fb..e70bc225fe31 100644
--- a/drivers/video/asiliantfb.c
+++ b/drivers/video/asiliantfb.c
@@ -140,7 +140,7 @@ static void asiliant_calc_dclk2(u32 *ppixclock, u8 *dclk2_m, u8 *dclk2_n, u8 *dc
140 140
141 /* 3 <= m <= 257 */ 141 /* 3 <= m <= 257 */
142 if (m >= 3 && m <= 257) { 142 if (m >= 3 && m <= 257) {
143 unsigned new_error = ((Ftarget * n) - (Fref * m)) >= 0 ? 143 unsigned new_error = Ftarget * n >= Fref * m ?
144 ((Ftarget * n) - (Fref * m)) : ((Fref * m) - (Ftarget * n)); 144 ((Ftarget * n) - (Fref * m)) : ((Fref * m) - (Ftarget * n));
145 if (new_error < best_error) { 145 if (new_error < best_error) {
146 best_n = n; 146 best_n = n;
@@ -152,7 +152,7 @@ static void asiliant_calc_dclk2(u32 *ppixclock, u8 *dclk2_m, u8 *dclk2_n, u8 *dc
152 else if (m <= 1028) { 152 else if (m <= 1028) {
153 /* remember there are still only 8-bits of precision in m, so 153 /* remember there are still only 8-bits of precision in m, so
154 * avoid over-optimistic error calculations */ 154 * avoid over-optimistic error calculations */
155 unsigned new_error = ((Ftarget * n) - (Fref * (m & ~3))) >= 0 ? 155 unsigned new_error = Ftarget * n >= Fref * (m & ~3) ?
156 ((Ftarget * n) - (Fref * (m & ~3))) : ((Fref * (m & ~3)) - (Ftarget * n)); 156 ((Ftarget * n) - (Fref * (m & ~3))) : ((Fref * (m & ~3)) - (Ftarget * n));
157 if (new_error < best_error) { 157 if (new_error < best_error) {
158 best_n = n; 158 best_n = n;
diff --git a/drivers/video/bf54x-lq043fb.c b/drivers/video/bf54x-lq043fb.c
index e49ae5edcc00..814312a7452f 100644
--- a/drivers/video/bf54x-lq043fb.c
+++ b/drivers/video/bf54x-lq043fb.c
@@ -82,7 +82,6 @@ struct bfin_bf54xfb_info {
82 unsigned char *fb_buffer; /* RGB Buffer */ 82 unsigned char *fb_buffer; /* RGB Buffer */
83 83
84 dma_addr_t dma_handle; 84 dma_addr_t dma_handle;
85 int lq043_mmap;
86 int lq043_open_cnt; 85 int lq043_open_cnt;
87 int irq; 86 int irq;
88 spinlock_t lock; /* lock */ 87 spinlock_t lock; /* lock */
@@ -316,7 +315,6 @@ static int bfin_bf54x_fb_release(struct fb_info *info, int user)
316 spin_lock(&fbi->lock); 315 spin_lock(&fbi->lock);
317 316
318 fbi->lq043_open_cnt--; 317 fbi->lq043_open_cnt--;
319 fbi->lq043_mmap = 0;
320 318
321 if (fbi->lq043_open_cnt <= 0) { 319 if (fbi->lq043_open_cnt <= 0) {
322 320
@@ -374,33 +372,6 @@ static int bfin_bf54x_fb_check_var(struct fb_var_screeninfo *var,
374 return 0; 372 return 0;
375} 373}
376 374
377static int bfin_bf54x_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
378{
379
380 struct bfin_bf54xfb_info *fbi = info->par;
381
382 if (fbi->lq043_mmap)
383 return -1;
384
385 spin_lock(&fbi->lock);
386 fbi->lq043_mmap = 1;
387 spin_unlock(&fbi->lock);
388
389 vma->vm_start = (unsigned long)(fbi->fb_buffer);
390
391 vma->vm_end = vma->vm_start + info->fix.smem_len;
392 /* For those who don't understand how mmap works, go read
393 * Documentation/nommu-mmap.txt.
394 * For those that do, you will know that the VM_MAYSHARE flag
395 * must be set in the vma->vm_flags structure on noMMU
396 * Other flags can be set, and are documented in
397 * include/linux/mm.h
398 */
399 vma->vm_flags |= VM_MAYSHARE | VM_SHARED;
400
401 return 0;
402}
403
404int bfin_bf54x_fb_cursor(struct fb_info *info, struct fb_cursor *cursor) 375int bfin_bf54x_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
405{ 376{
406 if (nocursor) 377 if (nocursor)
@@ -452,7 +423,6 @@ static struct fb_ops bfin_bf54x_fb_ops = {
452 .fb_fillrect = cfb_fillrect, 423 .fb_fillrect = cfb_fillrect,
453 .fb_copyarea = cfb_copyarea, 424 .fb_copyarea = cfb_copyarea,
454 .fb_imageblit = cfb_imageblit, 425 .fb_imageblit = cfb_imageblit,
455 .fb_mmap = bfin_bf54x_fb_mmap,
456 .fb_cursor = bfin_bf54x_fb_cursor, 426 .fb_cursor = bfin_bf54x_fb_cursor,
457 .fb_setcolreg = bfin_bf54x_fb_setcolreg, 427 .fb_setcolreg = bfin_bf54x_fb_setcolreg,
458}; 428};
diff --git a/drivers/video/bfin-lq035q1-fb.c b/drivers/video/bfin-lq035q1-fb.c
index b690c269784a..03872365a36d 100644
--- a/drivers/video/bfin-lq035q1-fb.c
+++ b/drivers/video/bfin-lq035q1-fb.c
@@ -22,7 +22,6 @@
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
25#include <linux/dma-mapping.h>
26 25
27#include <asm/blackfin.h> 26#include <asm/blackfin.h>
28#include <asm/irq.h> 27#include <asm/irq.h>
diff --git a/drivers/video/bfin-t350mcqb-fb.c b/drivers/video/bfin-t350mcqb-fb.c
index 2549c53b26a0..5653d083a983 100644
--- a/drivers/video/bfin-t350mcqb-fb.c
+++ b/drivers/video/bfin-t350mcqb-fb.c
@@ -87,7 +87,6 @@ struct bfin_t350mcqbfb_info {
87 struct device *dev; 87 struct device *dev;
88 unsigned char *fb_buffer; /* RGB Buffer */ 88 unsigned char *fb_buffer; /* RGB Buffer */
89 dma_addr_t dma_handle; 89 dma_addr_t dma_handle;
90 int lq043_mmap;
91 int lq043_open_cnt; 90 int lq043_open_cnt;
92 int irq; 91 int irq;
93 spinlock_t lock; /* lock */ 92 spinlock_t lock; /* lock */
@@ -235,7 +234,6 @@ static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
235 spin_lock(&fbi->lock); 234 spin_lock(&fbi->lock);
236 235
237 fbi->lq043_open_cnt--; 236 fbi->lq043_open_cnt--;
238 fbi->lq043_mmap = 0;
239 237
240 if (fbi->lq043_open_cnt <= 0) { 238 if (fbi->lq043_open_cnt <= 0) {
241 bfin_t350mcqb_disable_ppi(); 239 bfin_t350mcqb_disable_ppi();
@@ -293,32 +291,6 @@ static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
293 return 0; 291 return 0;
294} 292}
295 293
296static int bfin_t350mcqb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
297{
298 struct bfin_t350mcqbfb_info *fbi = info->par;
299
300 if (fbi->lq043_mmap)
301 return -1;
302
303 spin_lock(&fbi->lock);
304 fbi->lq043_mmap = 1;
305 spin_unlock(&fbi->lock);
306
307 vma->vm_start = (unsigned long)(fbi->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET);
308
309 vma->vm_end = vma->vm_start + info->fix.smem_len;
310 /* For those who don't understand how mmap works, go read
311 * Documentation/nommu-mmap.txt.
312 * For those that do, you will know that the VM_MAYSHARE flag
313 * must be set in the vma->vm_flags structure on noMMU
314 * Other flags can be set, and are documented in
315 * include/linux/mm.h
316 */
317 vma->vm_flags |= VM_MAYSHARE | VM_SHARED;
318
319 return 0;
320}
321
322int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor) 294int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
323{ 295{
324 if (nocursor) 296 if (nocursor)
@@ -370,7 +342,6 @@ static struct fb_ops bfin_t350mcqb_fb_ops = {
370 .fb_fillrect = cfb_fillrect, 342 .fb_fillrect = cfb_fillrect,
371 .fb_copyarea = cfb_copyarea, 343 .fb_copyarea = cfb_copyarea,
372 .fb_imageblit = cfb_imageblit, 344 .fb_imageblit = cfb_imageblit,
373 .fb_mmap = bfin_t350mcqb_fb_mmap,
374 .fb_cursor = bfin_t350mcqb_fb_cursor, 345 .fb_cursor = bfin_t350mcqb_fb_cursor,
375 .fb_setcolreg = bfin_t350mcqb_fb_setcolreg, 346 .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
376}; 347};
diff --git a/drivers/video/broadsheetfb.c b/drivers/video/broadsheetfb.c
index df9ccb901d86..ebda6876d3a9 100644
--- a/drivers/video/broadsheetfb.c
+++ b/drivers/video/broadsheetfb.c
@@ -29,11 +29,65 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
31#include <linux/list.h> 31#include <linux/list.h>
32#include <linux/firmware.h>
32#include <linux/uaccess.h> 33#include <linux/uaccess.h>
33 34
34#include <video/broadsheetfb.h> 35#include <video/broadsheetfb.h>
35 36
36/* Display specific information */ 37/* track panel specific parameters */
38struct panel_info {
39 int w;
40 int h;
41 u16 sdcfg;
42 u16 gdcfg;
43 u16 lutfmt;
44 u16 fsynclen;
45 u16 fendfbegin;
46 u16 lsynclen;
47 u16 lendlbegin;
48 u16 pixclk;
49};
50
51/* table of panel specific parameters to be indexed into by the board drivers */
52static struct panel_info panel_table[] = {
53 { /* standard 6" on TFT backplane */
54 .w = 800,
55 .h = 600,
56 .sdcfg = (100 | (1 << 8) | (1 << 9)),
57 .gdcfg = 2,
58 .lutfmt = (4 | (1 << 7)),
59 .fsynclen = 4,
60 .fendfbegin = (10 << 8) | 4,
61 .lsynclen = 10,
62 .lendlbegin = (100 << 8) | 4,
63 .pixclk = 6,
64 },
65 { /* custom 3.7" flexible on PET or steel */
66 .w = 320,
67 .h = 240,
68 .sdcfg = (67 | (0 << 8) | (0 << 9) | (0 << 10) | (0 << 12)),
69 .gdcfg = 3,
70 .lutfmt = (4 | (1 << 7)),
71 .fsynclen = 0,
72 .fendfbegin = (80 << 8) | 4,
73 .lsynclen = 10,
74 .lendlbegin = (80 << 8) | 20,
75 .pixclk = 14,
76 },
77 { /* standard 9.7" on TFT backplane */
78 .w = 1200,
79 .h = 825,
80 .sdcfg = (100 | (1 << 8) | (1 << 9) | (0 << 10) | (0 << 12)),
81 .gdcfg = 2,
82 .lutfmt = (4 | (1 << 7)),
83 .fsynclen = 0,
84 .fendfbegin = (4 << 8) | 4,
85 .lsynclen = 4,
86 .lendlbegin = (60 << 8) | 10,
87 .pixclk = 3,
88 },
89};
90
37#define DPY_W 800 91#define DPY_W 800
38#define DPY_H 600 92#define DPY_H 600
39 93
@@ -62,30 +116,30 @@ static struct fb_var_screeninfo broadsheetfb_var __devinitdata = {
62}; 116};
63 117
64/* main broadsheetfb functions */ 118/* main broadsheetfb functions */
65static void broadsheet_issue_data(struct broadsheetfb_par *par, u16 data) 119static void broadsheet_gpio_issue_data(struct broadsheetfb_par *par, u16 data)
66{ 120{
67 par->board->set_ctl(par, BS_WR, 0); 121 par->board->set_ctl(par, BS_WR, 0);
68 par->board->set_hdb(par, data); 122 par->board->set_hdb(par, data);
69 par->board->set_ctl(par, BS_WR, 1); 123 par->board->set_ctl(par, BS_WR, 1);
70} 124}
71 125
72static void broadsheet_issue_cmd(struct broadsheetfb_par *par, u16 data) 126static void broadsheet_gpio_issue_cmd(struct broadsheetfb_par *par, u16 data)
73{ 127{
74 par->board->set_ctl(par, BS_DC, 0); 128 par->board->set_ctl(par, BS_DC, 0);
75 broadsheet_issue_data(par, data); 129 broadsheet_gpio_issue_data(par, data);
76} 130}
77 131
78static void broadsheet_send_command(struct broadsheetfb_par *par, u16 data) 132static void broadsheet_gpio_send_command(struct broadsheetfb_par *par, u16 data)
79{ 133{
80 par->board->wait_for_rdy(par); 134 par->board->wait_for_rdy(par);
81 135
82 par->board->set_ctl(par, BS_CS, 0); 136 par->board->set_ctl(par, BS_CS, 0);
83 broadsheet_issue_cmd(par, data); 137 broadsheet_gpio_issue_cmd(par, data);
84 par->board->set_ctl(par, BS_DC, 1); 138 par->board->set_ctl(par, BS_DC, 1);
85 par->board->set_ctl(par, BS_CS, 1); 139 par->board->set_ctl(par, BS_CS, 1);
86} 140}
87 141
88static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd, 142static void broadsheet_gpio_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
89 int argc, u16 *argv) 143 int argc, u16 *argv)
90{ 144{
91 int i; 145 int i;
@@ -93,15 +147,43 @@ static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
93 par->board->wait_for_rdy(par); 147 par->board->wait_for_rdy(par);
94 148
95 par->board->set_ctl(par, BS_CS, 0); 149 par->board->set_ctl(par, BS_CS, 0);
96 broadsheet_issue_cmd(par, cmd); 150 broadsheet_gpio_issue_cmd(par, cmd);
97 par->board->set_ctl(par, BS_DC, 1); 151 par->board->set_ctl(par, BS_DC, 1);
98 152
99 for (i = 0; i < argc; i++) 153 for (i = 0; i < argc; i++)
100 broadsheet_issue_data(par, argv[i]); 154 broadsheet_gpio_issue_data(par, argv[i]);
101 par->board->set_ctl(par, BS_CS, 1); 155 par->board->set_ctl(par, BS_CS, 1);
102} 156}
103 157
104static void broadsheet_burst_write(struct broadsheetfb_par *par, int size, 158static void broadsheet_mmio_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
159 int argc, u16 *argv)
160{
161 int i;
162
163 par->board->mmio_write(par, BS_MMIO_CMD, cmd);
164
165 for (i = 0; i < argc; i++)
166 par->board->mmio_write(par, BS_MMIO_DATA, argv[i]);
167}
168
169static void broadsheet_send_command(struct broadsheetfb_par *par, u16 data)
170{
171 if (par->board->mmio_write)
172 par->board->mmio_write(par, BS_MMIO_CMD, data);
173 else
174 broadsheet_gpio_send_command(par, data);
175}
176
177static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
178 int argc, u16 *argv)
179{
180 if (par->board->mmio_write)
181 broadsheet_mmio_send_cmdargs(par, cmd, argc, argv);
182 else
183 broadsheet_gpio_send_cmdargs(par, cmd, argc, argv);
184}
185
186static void broadsheet_gpio_burst_write(struct broadsheetfb_par *par, int size,
105 u16 *data) 187 u16 *data)
106{ 188{
107 int i; 189 int i;
@@ -121,7 +203,30 @@ static void broadsheet_burst_write(struct broadsheetfb_par *par, int size,
121 par->board->set_ctl(par, BS_CS, 1); 203 par->board->set_ctl(par, BS_CS, 1);
122} 204}
123 205
124static u16 broadsheet_get_data(struct broadsheetfb_par *par) 206static void broadsheet_mmio_burst_write(struct broadsheetfb_par *par, int size,
207 u16 *data)
208{
209 int i;
210 u16 tmp;
211
212 for (i = 0; i < size; i++) {
213 tmp = (data[i] & 0x0F) << 4;
214 tmp |= (data[i] & 0x0F00) << 4;
215 par->board->mmio_write(par, BS_MMIO_DATA, tmp);
216 }
217
218}
219
220static void broadsheet_burst_write(struct broadsheetfb_par *par, int size,
221 u16 *data)
222{
223 if (par->board->mmio_write)
224 broadsheet_mmio_burst_write(par, size, data);
225 else
226 broadsheet_gpio_burst_write(par, size, data);
227}
228
229static u16 broadsheet_gpio_get_data(struct broadsheetfb_par *par)
125{ 230{
126 u16 res; 231 u16 res;
127 /* wait for ready to go hi. (lo is busy) */ 232 /* wait for ready to go hi. (lo is busy) */
@@ -141,7 +246,16 @@ static u16 broadsheet_get_data(struct broadsheetfb_par *par)
141 return res; 246 return res;
142} 247}
143 248
144static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg, 249
250static u16 broadsheet_get_data(struct broadsheetfb_par *par)
251{
252 if (par->board->mmio_read)
253 return par->board->mmio_read(par);
254 else
255 return broadsheet_gpio_get_data(par);
256}
257
258static void broadsheet_gpio_write_reg(struct broadsheetfb_par *par, u16 reg,
145 u16 data) 259 u16 data)
146{ 260{
147 /* wait for ready to go hi. (lo is busy) */ 261 /* wait for ready to go hi. (lo is busy) */
@@ -150,44 +264,541 @@ static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg,
150 /* cs lo, dc lo for cmd, we lo for each data, db as usual */ 264 /* cs lo, dc lo for cmd, we lo for each data, db as usual */
151 par->board->set_ctl(par, BS_CS, 0); 265 par->board->set_ctl(par, BS_CS, 0);
152 266
153 broadsheet_issue_cmd(par, BS_CMD_WR_REG); 267 broadsheet_gpio_issue_cmd(par, BS_CMD_WR_REG);
154 268
155 par->board->set_ctl(par, BS_DC, 1); 269 par->board->set_ctl(par, BS_DC, 1);
156 270
157 broadsheet_issue_data(par, reg); 271 broadsheet_gpio_issue_data(par, reg);
158 broadsheet_issue_data(par, data); 272 broadsheet_gpio_issue_data(par, data);
159 273
160 par->board->set_ctl(par, BS_CS, 1); 274 par->board->set_ctl(par, BS_CS, 1);
161} 275}
162 276
277static void broadsheet_mmio_write_reg(struct broadsheetfb_par *par, u16 reg,
278 u16 data)
279{
280 par->board->mmio_write(par, BS_MMIO_CMD, BS_CMD_WR_REG);
281 par->board->mmio_write(par, BS_MMIO_DATA, reg);
282 par->board->mmio_write(par, BS_MMIO_DATA, data);
283
284}
285
286static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg,
287 u16 data)
288{
289 if (par->board->mmio_write)
290 broadsheet_mmio_write_reg(par, reg, data);
291 else
292 broadsheet_gpio_write_reg(par, reg, data);
293}
294
295static void broadsheet_write_reg32(struct broadsheetfb_par *par, u16 reg,
296 u32 data)
297{
298 broadsheet_write_reg(par, reg, cpu_to_le32(data) & 0xFFFF);
299 broadsheet_write_reg(par, reg + 2, (cpu_to_le32(data) >> 16) & 0xFFFF);
300}
301
302
163static u16 broadsheet_read_reg(struct broadsheetfb_par *par, u16 reg) 303static u16 broadsheet_read_reg(struct broadsheetfb_par *par, u16 reg)
164{ 304{
165 broadsheet_send_command(par, reg); 305 broadsheet_send_cmdargs(par, BS_CMD_RD_REG, 1, &reg);
166 msleep(100); 306 par->board->wait_for_rdy(par);
167 return broadsheet_get_data(par); 307 return broadsheet_get_data(par);
168} 308}
169 309
310/* functions for waveform manipulation */
311static int is_broadsheet_pll_locked(struct broadsheetfb_par *par)
312{
313 return broadsheet_read_reg(par, 0x000A) & 0x0001;
314}
315
316static int broadsheet_setup_plls(struct broadsheetfb_par *par)
317{
318 int retry_count = 0;
319 u16 tmp;
320
321 /* disable arral saemipu mode */
322 broadsheet_write_reg(par, 0x0006, 0x0000);
323
324 broadsheet_write_reg(par, 0x0010, 0x0004);
325 broadsheet_write_reg(par, 0x0012, 0x5949);
326 broadsheet_write_reg(par, 0x0014, 0x0040);
327 broadsheet_write_reg(par, 0x0016, 0x0000);
328
329 do {
330 if (retry_count++ > 100)
331 return -ETIMEDOUT;
332 mdelay(1);
333 } while (!is_broadsheet_pll_locked(par));
334
335 tmp = broadsheet_read_reg(par, 0x0006);
336 tmp &= ~0x1;
337 broadsheet_write_reg(par, 0x0006, tmp);
338
339 return 0;
340}
341
342static int broadsheet_setup_spi(struct broadsheetfb_par *par)
343{
344
345 broadsheet_write_reg(par, 0x0204, ((3 << 3) | 1));
346 broadsheet_write_reg(par, 0x0208, 0x0001);
347
348 return 0;
349}
350
351static int broadsheet_setup_spiflash(struct broadsheetfb_par *par,
352 u16 *orig_sfmcd)
353{
354
355 *orig_sfmcd = broadsheet_read_reg(par, 0x0204);
356 broadsheet_write_reg(par, 0x0208, 0);
357 broadsheet_write_reg(par, 0x0204, 0);
358 broadsheet_write_reg(par, 0x0204, ((3 << 3) | 1));
359
360 return 0;
361}
362
363static int broadsheet_spiflash_wait_for_bit(struct broadsheetfb_par *par,
364 u16 reg, int bitnum, int val,
365 int timeout)
366{
367 u16 tmp;
368
369 do {
370 tmp = broadsheet_read_reg(par, reg);
371 if (((tmp >> bitnum) & 1) == val)
372 return 0;
373 mdelay(1);
374 } while (timeout--);
375
376 return -ETIMEDOUT;
377}
378
379static int broadsheet_spiflash_write_byte(struct broadsheetfb_par *par, u8 data)
380{
381 broadsheet_write_reg(par, 0x0202, (data | 0x100));
382
383 return broadsheet_spiflash_wait_for_bit(par, 0x0206, 3, 0, 100);
384}
385
386static int broadsheet_spiflash_read_byte(struct broadsheetfb_par *par, u8 *data)
387{
388 int err;
389 u16 tmp;
390
391 broadsheet_write_reg(par, 0x0202, 0);
392
393 err = broadsheet_spiflash_wait_for_bit(par, 0x0206, 3, 0, 100);
394 if (err)
395 return err;
396
397 tmp = broadsheet_read_reg(par, 0x200);
398
399 *data = tmp & 0xFF;
400
401 return 0;
402}
403
404static int broadsheet_spiflash_wait_for_status(struct broadsheetfb_par *par,
405 int timeout)
406{
407 u8 tmp;
408 int err;
409
410 do {
411 broadsheet_write_reg(par, 0x0208, 1);
412
413 err = broadsheet_spiflash_write_byte(par, 0x05);
414 if (err)
415 goto failout;
416
417 err = broadsheet_spiflash_read_byte(par, &tmp);
418 if (err)
419 goto failout;
420
421 broadsheet_write_reg(par, 0x0208, 0);
422
423 if (!(tmp & 0x1))
424 return 0;
425
426 mdelay(5);
427 } while (timeout--);
428
429 dev_err(par->info->device, "Timed out waiting for spiflash status\n");
430 return -ETIMEDOUT;
431
432failout:
433 broadsheet_write_reg(par, 0x0208, 0);
434 return err;
435}
436
437static int broadsheet_spiflash_op_on_address(struct broadsheetfb_par *par,
438 u8 op, u32 addr)
439{
440 int i;
441 u8 tmp;
442 int err;
443
444 broadsheet_write_reg(par, 0x0208, 1);
445
446 err = broadsheet_spiflash_write_byte(par, op);
447 if (err)
448 return err;
449
450 for (i = 2; i >= 0; i--) {
451 tmp = ((addr >> (i * 8)) & 0xFF);
452 err = broadsheet_spiflash_write_byte(par, tmp);
453 if (err)
454 return err;
455 }
456
457 return err;
458}
459
460static int broadsheet_verify_spiflash(struct broadsheetfb_par *par,
461 int *flash_type)
462{
463 int err = 0;
464 u8 sig;
465
466 err = broadsheet_spiflash_op_on_address(par, 0xAB, 0x00000000);
467 if (err)
468 goto failout;
469
470 err = broadsheet_spiflash_read_byte(par, &sig);
471 if (err)
472 goto failout;
473
474 if ((sig != 0x10) && (sig != 0x11)) {
475 dev_err(par->info->device, "Unexpected flash type\n");
476 err = -EINVAL;
477 goto failout;
478 }
479
480 *flash_type = sig;
481
482failout:
483 broadsheet_write_reg(par, 0x0208, 0);
484 return err;
485}
486
487static int broadsheet_setup_for_wfm_write(struct broadsheetfb_par *par,
488 u16 *initial_sfmcd, int *flash_type)
489
490{
491 int err;
492
493 err = broadsheet_setup_plls(par);
494 if (err)
495 return err;
496
497 broadsheet_write_reg(par, 0x0106, 0x0203);
498
499 err = broadsheet_setup_spi(par);
500 if (err)
501 return err;
502
503 err = broadsheet_setup_spiflash(par, initial_sfmcd);
504 if (err)
505 return err;
506
507 return broadsheet_verify_spiflash(par, flash_type);
508}
509
510static int broadsheet_spiflash_write_control(struct broadsheetfb_par *par,
511 int mode)
512{
513 int err;
514
515 broadsheet_write_reg(par, 0x0208, 1);
516 if (mode)
517 err = broadsheet_spiflash_write_byte(par, 0x06);
518 else
519 err = broadsheet_spiflash_write_byte(par, 0x04);
520
521 broadsheet_write_reg(par, 0x0208, 0);
522 return err;
523}
524
525static int broadsheet_spiflash_erase_sector(struct broadsheetfb_par *par,
526 int addr)
527{
528 int err;
529
530 broadsheet_spiflash_write_control(par, 1);
531
532 err = broadsheet_spiflash_op_on_address(par, 0xD8, addr);
533
534 broadsheet_write_reg(par, 0x0208, 0);
535
536 if (err)
537 return err;
538
539 err = broadsheet_spiflash_wait_for_status(par, 1000);
540
541 return err;
542}
543
544static int broadsheet_spiflash_read_range(struct broadsheetfb_par *par,
545 int addr, int size, char *data)
546{
547 int err;
548 int i;
549
550 err = broadsheet_spiflash_op_on_address(par, 0x03, addr);
551 if (err)
552 goto failout;
553
554 for (i = 0; i < size; i++) {
555 err = broadsheet_spiflash_read_byte(par, &data[i]);
556 if (err)
557 goto failout;
558 }
559
560failout:
561 broadsheet_write_reg(par, 0x0208, 0);
562 return err;
563}
564
565#define BS_SPIFLASH_PAGE_SIZE 256
566static int broadsheet_spiflash_write_page(struct broadsheetfb_par *par,
567 int addr, const char *data)
568{
569 int err;
570 int i;
571
572 broadsheet_spiflash_write_control(par, 1);
573
574 err = broadsheet_spiflash_op_on_address(par, 0x02, addr);
575 if (err)
576 goto failout;
577
578 for (i = 0; i < BS_SPIFLASH_PAGE_SIZE; i++) {
579 err = broadsheet_spiflash_write_byte(par, data[i]);
580 if (err)
581 goto failout;
582 }
583
584 broadsheet_write_reg(par, 0x0208, 0);
585
586 err = broadsheet_spiflash_wait_for_status(par, 100);
587
588failout:
589 return err;
590}
591
592static int broadsheet_spiflash_write_sector(struct broadsheetfb_par *par,
593 int addr, const char *data, int sector_size)
594{
595 int i;
596 int err;
597
598 for (i = 0; i < sector_size; i += BS_SPIFLASH_PAGE_SIZE) {
599 err = broadsheet_spiflash_write_page(par, addr + i, &data[i]);
600 if (err)
601 return err;
602 }
603 return 0;
604}
605
606/*
607 * The caller must guarantee that the data to be rewritten is entirely
608 * contained within this sector. That is, data_start_addr + data_len
609 * must be less than sector_start_addr + sector_size.
610 */
611static int broadsheet_spiflash_rewrite_sector(struct broadsheetfb_par *par,
612 int sector_size, int data_start_addr,
613 int data_len, const char *data)
614{
615 int err;
616 char *sector_buffer;
617 int tail_start_addr;
618 int start_sector_addr;
619
620 sector_buffer = kzalloc(sizeof(char)*sector_size, GFP_KERNEL);
621 if (!sector_buffer)
622 return -ENOMEM;
623
624 /* the start address of the sector is the 0th byte of that sector */
625 start_sector_addr = (data_start_addr / sector_size) * sector_size;
626
627 /*
628 * check if there is head data that we need to readback into our sector
629 * buffer first
630 */
631 if (data_start_addr != start_sector_addr) {
632 /*
633 * we need to read every byte up till the start address of our
634 * data and we put it into our sector buffer.
635 */
636 err = broadsheet_spiflash_read_range(par, start_sector_addr,
637 data_start_addr, sector_buffer);
638 if (err)
639 return err;
640 }
641
642 /* now we copy our data into the right place in the sector buffer */
643 memcpy(sector_buffer + data_start_addr, data, data_len);
644
645 /*
646 * now we check if there is a tail section of the sector that we need to
647 * readback.
648 */
649 tail_start_addr = (data_start_addr + data_len) % sector_size;
650
651 if (tail_start_addr) {
652 int tail_len;
653
654 tail_len = sector_size - tail_start_addr;
655
656 /* now we read this tail into our sector buffer */
657 err = broadsheet_spiflash_read_range(par, tail_start_addr,
658 tail_len, sector_buffer + tail_start_addr);
659 if (err)
660 return err;
661 }
662
663 /* if we got here we have the full sector that we want to rewrite. */
664
665 /* first erase the sector */
666 err = broadsheet_spiflash_erase_sector(par, start_sector_addr);
667 if (err)
668 return err;
669
670 /* now write it */
671 err = broadsheet_spiflash_write_sector(par, start_sector_addr,
672 sector_buffer, sector_size);
673 return err;
674}
675
676static int broadsheet_write_spiflash(struct broadsheetfb_par *par, u32 wfm_addr,
677 const u8 *wfm, int bytecount, int flash_type)
678{
679 int sector_size;
680 int err;
681 int cur_addr;
682 int writecount;
683 int maxlen;
684 int offset = 0;
685
686 switch (flash_type) {
687 case 0x10:
688 sector_size = 32*1024;
689 break;
690 case 0x11:
691 default:
692 sector_size = 64*1024;
693 break;
694 }
695
696 while (bytecount) {
697 cur_addr = wfm_addr + offset;
698 maxlen = roundup(cur_addr, sector_size) - cur_addr;
699 writecount = min(bytecount, maxlen);
700
701 err = broadsheet_spiflash_rewrite_sector(par, sector_size,
702 cur_addr, writecount, wfm + offset);
703 if (err)
704 return err;
705
706 offset += writecount;
707 bytecount -= writecount;
708 }
709
710 return 0;
711}
712
713static int broadsheet_store_waveform_to_spiflash(struct broadsheetfb_par *par,
714 const u8 *wfm, size_t wfm_size)
715{
716 int err = 0;
717 u16 initial_sfmcd = 0;
718 int flash_type = 0;
719
720 err = broadsheet_setup_for_wfm_write(par, &initial_sfmcd, &flash_type);
721 if (err)
722 goto failout;
723
724 err = broadsheet_write_spiflash(par, 0x886, wfm, wfm_size, flash_type);
725
726failout:
727 broadsheet_write_reg(par, 0x0204, initial_sfmcd);
728 return err;
729}
730
731static ssize_t broadsheet_loadstore_waveform(struct device *dev,
732 struct device_attribute *attr,
733 const char *buf, size_t len)
734{
735 int err;
736 struct fb_info *info = dev_get_drvdata(dev);
737 struct broadsheetfb_par *par = info->par;
738 const struct firmware *fw_entry;
739
740 if (len < 1)
741 return -EINVAL;
742
743 err = request_firmware(&fw_entry, "broadsheet.wbf", dev);
744 if (err < 0) {
745 dev_err(dev, "Failed to get broadsheet waveform\n");
746 goto err_failed;
747 }
748
749 /* try to enforce reasonable min max on waveform */
750 if ((fw_entry->size < 8*1024) || (fw_entry->size > 64*1024)) {
751 dev_err(dev, "Invalid waveform\n");
752 err = -EINVAL;
753 goto err_failed;
754 }
755
756 mutex_lock(&(par->io_lock));
757 err = broadsheet_store_waveform_to_spiflash(par, fw_entry->data,
758 fw_entry->size);
759
760 mutex_unlock(&(par->io_lock));
761 if (err < 0) {
762 dev_err(dev, "Failed to store broadsheet waveform\n");
763 goto err_failed;
764 }
765
766 dev_info(dev, "Stored broadsheet waveform, size %zd\n", fw_entry->size);
767
768 return len;
769
770err_failed:
771 return err;
772}
773static DEVICE_ATTR(loadstore_waveform, S_IWUSR, NULL,
774 broadsheet_loadstore_waveform);
775
776/* upper level functions that manipulate the display and other stuff */
170static void __devinit broadsheet_init_display(struct broadsheetfb_par *par) 777static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
171{ 778{
172 u16 args[5]; 779 u16 args[5];
173 780 int xres = par->info->var.xres;
174 args[0] = DPY_W; 781 int yres = par->info->var.yres;
175 args[1] = DPY_H; 782
176 args[2] = (100 | (1 << 8) | (1 << 9)); /* sdcfg */ 783 args[0] = panel_table[par->panel_index].w;
177 args[3] = 2; /* gdrv cfg */ 784 args[1] = panel_table[par->panel_index].h;
178 args[4] = (4 | (1 << 7)); /* lut index format */ 785 args[2] = panel_table[par->panel_index].sdcfg;
786 args[3] = panel_table[par->panel_index].gdcfg;
787 args[4] = panel_table[par->panel_index].lutfmt;
179 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args); 788 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args);
180 789
181 /* did the controller really set it? */ 790 /* did the controller really set it? */
182 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args); 791 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args);
183 792
184 args[0] = 4; /* fsync len */ 793 args[0] = panel_table[par->panel_index].fsynclen;
185 args[1] = (10 << 8) | 4; /* fend/fbegin len */ 794 args[1] = panel_table[par->panel_index].fendfbegin;
186 args[2] = 10; /* line sync len */ 795 args[2] = panel_table[par->panel_index].lsynclen;
187 args[3] = (100 << 8) | 4; /* line end/begin len */ 796 args[3] = panel_table[par->panel_index].lendlbegin;
188 args[4] = 6; /* pixel clock cfg */ 797 args[4] = panel_table[par->panel_index].pixclk;
189 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_TMG, 5, args); 798 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_TMG, 5, args);
190 799
800 broadsheet_write_reg32(par, 0x310, xres*yres*2);
801
191 /* setup waveform */ 802 /* setup waveform */
192 args[0] = 0x886; 803 args[0] = 0x886;
193 args[1] = 0; 804 args[1] = 0;
@@ -207,8 +818,9 @@ static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
207 args[0] = 0x154; 818 args[0] = 0x154;
208 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args); 819 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
209 820
210 broadsheet_burst_write(par, DPY_W*DPY_H/2, 821 broadsheet_burst_write(par, (panel_table[par->panel_index].w *
211 (u16 *) par->info->screen_base); 822 panel_table[par->panel_index].h)/2,
823 (u16 *) par->info->screen_base);
212 824
213 broadsheet_send_command(par, BS_CMD_LD_IMG_END); 825 broadsheet_send_command(par, BS_CMD_LD_IMG_END);
214 826
@@ -222,6 +834,21 @@ static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
222 par->board->wait_for_rdy(par); 834 par->board->wait_for_rdy(par);
223} 835}
224 836
837static void __devinit broadsheet_identify(struct broadsheetfb_par *par)
838{
839 u16 rev, prc;
840 struct device *dev = par->info->device;
841
842 rev = broadsheet_read_reg(par, BS_REG_REV);
843 prc = broadsheet_read_reg(par, BS_REG_PRC);
844 dev_info(dev, "Broadsheet Rev 0x%x, Product Code 0x%x\n", rev, prc);
845
846 if (prc != 0x0047)
847 dev_warn(dev, "Unrecognized Broadsheet Product Code\n");
848 if (rev != 0x0100)
849 dev_warn(dev, "Unrecognized Broadsheet Revision\n");
850}
851
225static void __devinit broadsheet_init(struct broadsheetfb_par *par) 852static void __devinit broadsheet_init(struct broadsheetfb_par *par)
226{ 853{
227 broadsheet_send_command(par, BS_CMD_INIT_SYS_RUN); 854 broadsheet_send_command(par, BS_CMD_INIT_SYS_RUN);
@@ -236,6 +863,7 @@ static void broadsheetfb_dpy_update_pages(struct broadsheetfb_par *par,
236 u16 args[5]; 863 u16 args[5];
237 unsigned char *buf = (unsigned char *)par->info->screen_base; 864 unsigned char *buf = (unsigned char *)par->info->screen_base;
238 865
866 mutex_lock(&(par->io_lock));
239 /* y1 must be a multiple of 4 so drop the lower bits */ 867 /* y1 must be a multiple of 4 so drop the lower bits */
240 y1 &= 0xFFFC; 868 y1 &= 0xFFFC;
241 /* y2 must be a multiple of 4 , but - 1 so up the lower bits */ 869 /* y2 must be a multiple of 4 , but - 1 so up the lower bits */
@@ -265,6 +893,7 @@ static void broadsheetfb_dpy_update_pages(struct broadsheetfb_par *par,
265 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND); 893 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
266 894
267 par->board->wait_for_rdy(par); 895 par->board->wait_for_rdy(par);
896 mutex_unlock(&(par->io_lock));
268 897
269} 898}
270 899
@@ -272,13 +901,15 @@ static void broadsheetfb_dpy_update(struct broadsheetfb_par *par)
272{ 901{
273 u16 args[5]; 902 u16 args[5];
274 903
904 mutex_lock(&(par->io_lock));
275 args[0] = 0x3 << 4; 905 args[0] = 0x3 << 4;
276 broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args); 906 broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args);
277 907
278 args[0] = 0x154; 908 args[0] = 0x154;
279 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args); 909 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
280 broadsheet_burst_write(par, DPY_W*DPY_H/2, 910 broadsheet_burst_write(par, (panel_table[par->panel_index].w *
281 (u16 *) par->info->screen_base); 911 panel_table[par->panel_index].h)/2,
912 (u16 *) par->info->screen_base);
282 913
283 broadsheet_send_command(par, BS_CMD_LD_IMG_END); 914 broadsheet_send_command(par, BS_CMD_LD_IMG_END);
284 915
@@ -290,7 +921,7 @@ static void broadsheetfb_dpy_update(struct broadsheetfb_par *par)
290 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND); 921 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
291 922
292 par->board->wait_for_rdy(par); 923 par->board->wait_for_rdy(par);
293 924 mutex_unlock(&(par->io_lock));
294} 925}
295 926
296/* this is called back from the deferred io workqueue */ 927/* this is called back from the deferred io workqueue */
@@ -436,6 +1067,8 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
436 unsigned char *videomemory; 1067 unsigned char *videomemory;
437 struct broadsheetfb_par *par; 1068 struct broadsheetfb_par *par;
438 int i; 1069 int i;
1070 int dpyw, dpyh;
1071 int panel_index;
439 1072
440 /* pick up board specific routines */ 1073 /* pick up board specific routines */
441 board = dev->dev.platform_data; 1074 board = dev->dev.platform_data;
@@ -450,7 +1083,24 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
450 if (!info) 1083 if (!info)
451 goto err; 1084 goto err;
452 1085
453 videomemorysize = (DPY_W*DPY_H); 1086 switch (board->get_panel_type()) {
1087 case 37:
1088 panel_index = 1;
1089 break;
1090 case 97:
1091 panel_index = 2;
1092 break;
1093 case 6:
1094 default:
1095 panel_index = 0;
1096 break;
1097 }
1098
1099 dpyw = panel_table[panel_index].w;
1100 dpyh = panel_table[panel_index].h;
1101
1102 videomemorysize = roundup((dpyw*dpyh), PAGE_SIZE);
1103
454 videomemory = vmalloc(videomemorysize); 1104 videomemory = vmalloc(videomemorysize);
455 if (!videomemory) 1105 if (!videomemory)
456 goto err_fb_rel; 1106 goto err_fb_rel;
@@ -460,16 +1110,25 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
460 info->screen_base = (char *)videomemory; 1110 info->screen_base = (char *)videomemory;
461 info->fbops = &broadsheetfb_ops; 1111 info->fbops = &broadsheetfb_ops;
462 1112
1113 broadsheetfb_var.xres = dpyw;
1114 broadsheetfb_var.yres = dpyh;
1115 broadsheetfb_var.xres_virtual = dpyw;
1116 broadsheetfb_var.yres_virtual = dpyh;
463 info->var = broadsheetfb_var; 1117 info->var = broadsheetfb_var;
1118
1119 broadsheetfb_fix.line_length = dpyw;
464 info->fix = broadsheetfb_fix; 1120 info->fix = broadsheetfb_fix;
465 info->fix.smem_len = videomemorysize; 1121 info->fix.smem_len = videomemorysize;
466 par = info->par; 1122 par = info->par;
1123 par->panel_index = panel_index;
467 par->info = info; 1124 par->info = info;
468 par->board = board; 1125 par->board = board;
469 par->write_reg = broadsheet_write_reg; 1126 par->write_reg = broadsheet_write_reg;
470 par->read_reg = broadsheet_read_reg; 1127 par->read_reg = broadsheet_read_reg;
471 init_waitqueue_head(&par->waitq); 1128 init_waitqueue_head(&par->waitq);
472 1129
1130 mutex_init(&par->io_lock);
1131
473 info->flags = FBINFO_FLAG_DEFAULT | FBINFO_VIRTFB; 1132 info->flags = FBINFO_FLAG_DEFAULT | FBINFO_VIRTFB;
474 1133
475 info->fbdefio = &broadsheetfb_defio; 1134 info->fbdefio = &broadsheetfb_defio;
@@ -496,13 +1155,20 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
496 if (retval < 0) 1155 if (retval < 0)
497 goto err_free_irq; 1156 goto err_free_irq;
498 1157
1158 broadsheet_identify(par);
1159
499 broadsheet_init(par); 1160 broadsheet_init(par);
500 1161
501 retval = register_framebuffer(info); 1162 retval = register_framebuffer(info);
502 if (retval < 0) 1163 if (retval < 0)
503 goto err_free_irq; 1164 goto err_free_irq;
1165
504 platform_set_drvdata(dev, info); 1166 platform_set_drvdata(dev, info);
505 1167
1168 retval = device_create_file(&dev->dev, &dev_attr_loadstore_waveform);
1169 if (retval < 0)
1170 goto err_unreg_fb;
1171
506 printk(KERN_INFO 1172 printk(KERN_INFO
507 "fb%d: Broadsheet frame buffer, using %dK of video memory\n", 1173 "fb%d: Broadsheet frame buffer, using %dK of video memory\n",
508 info->node, videomemorysize >> 10); 1174 info->node, videomemorysize >> 10);
@@ -510,6 +1176,8 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
510 1176
511 return 0; 1177 return 0;
512 1178
1179err_unreg_fb:
1180 unregister_framebuffer(info);
513err_free_irq: 1181err_free_irq:
514 board->cleanup(par); 1182 board->cleanup(par);
515err_cmap: 1183err_cmap:
@@ -530,6 +1198,8 @@ static int __devexit broadsheetfb_remove(struct platform_device *dev)
530 1198
531 if (info) { 1199 if (info) {
532 struct broadsheetfb_par *par = info->par; 1200 struct broadsheetfb_par *par = info->par;
1201
1202 device_remove_file(info->dev, &dev_attr_loadstore_waveform);
533 unregister_framebuffer(info); 1203 unregister_framebuffer(info);
534 fb_deferred_io_cleanup(info); 1204 fb_deferred_io_cleanup(info);
535 par->board->cleanup(par); 1205 par->board->cleanup(par);
diff --git a/drivers/video/cobalt_lcdfb.c b/drivers/video/cobalt_lcdfb.c
index 108b89e09a80..5eb61b5adfe8 100644
--- a/drivers/video/cobalt_lcdfb.c
+++ b/drivers/video/cobalt_lcdfb.c
@@ -287,7 +287,7 @@ static struct fb_ops cobalt_lcd_fbops = {
287 .fb_cursor = cobalt_lcdfb_cursor, 287 .fb_cursor = cobalt_lcdfb_cursor,
288}; 288};
289 289
290static int __init cobalt_lcdfb_probe(struct platform_device *dev) 290static int __devinit cobalt_lcdfb_probe(struct platform_device *dev)
291{ 291{
292 struct fb_info *info; 292 struct fb_info *info;
293 struct resource *res; 293 struct resource *res;
diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c
index d25df51bb0d2..581d2dbf675a 100644
--- a/drivers/video/efifb.c
+++ b/drivers/video/efifb.c
@@ -210,7 +210,7 @@ static int __init efifb_setup(char *options)
210 return 0; 210 return 0;
211} 211}
212 212
213static int __init efifb_probe(struct platform_device *dev) 213static int __devinit efifb_probe(struct platform_device *dev)
214{ 214{
215 struct fb_info *info; 215 struct fb_info *info;
216 int err; 216 int err;
diff --git a/drivers/video/epson1355fb.c b/drivers/video/epson1355fb.c
index 2735b79e52a1..6d755bb3a2bc 100644
--- a/drivers/video/epson1355fb.c
+++ b/drivers/video/epson1355fb.c
@@ -602,7 +602,7 @@ static int epson1355fb_remove(struct platform_device *dev)
602 return 0; 602 return 0;
603} 603}
604 604
605int __init epson1355fb_probe(struct platform_device *dev) 605int __devinit epson1355fb_probe(struct platform_device *dev)
606{ 606{
607 struct epson1355_par *default_par; 607 struct epson1355_par *default_par;
608 struct fb_info *info; 608 struct fb_info *info;
diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c
index 695fa013fe7e..5643a35c1746 100644
--- a/drivers/video/gbefb.c
+++ b/drivers/video/gbefb.c
@@ -1128,7 +1128,7 @@ static int __init gbefb_setup(char *options)
1128 return 0; 1128 return 0;
1129} 1129}
1130 1130
1131static int __init gbefb_probe(struct platform_device *p_dev) 1131static int __devinit gbefb_probe(struct platform_device *p_dev)
1132{ 1132{
1133 int i, ret = 0; 1133 int i, ret = 0;
1134 struct fb_info *info; 1134 struct fb_info *info;
diff --git a/drivers/video/hgafb.c b/drivers/video/hgafb.c
index 0129c044f6d6..db9b785b56eb 100644
--- a/drivers/video/hgafb.c
+++ b/drivers/video/hgafb.c
@@ -551,7 +551,7 @@ static struct fb_ops hgafb_ops = {
551 * Initialization 551 * Initialization
552 */ 552 */
553 553
554static int __init hgafb_probe(struct platform_device *pdev) 554static int __devinit hgafb_probe(struct platform_device *pdev)
555{ 555{
556 struct fb_info *info; 556 struct fb_info *info;
557 557
diff --git a/drivers/video/hitfb.c b/drivers/video/hitfb.c
index 73c83a8de2d3..bf78779199c6 100644
--- a/drivers/video/hitfb.c
+++ b/drivers/video/hitfb.c
@@ -325,7 +325,7 @@ static struct fb_ops hitfb_ops = {
325 .fb_imageblit = cfb_imageblit, 325 .fb_imageblit = cfb_imageblit,
326}; 326};
327 327
328static int __init hitfb_probe(struct platform_device *dev) 328static int __devinit hitfb_probe(struct platform_device *dev)
329{ 329{
330 unsigned short lcdclor, ldr3, ldvndr; 330 unsigned short lcdclor, ldr3, ldvndr;
331 struct fb_info *info; 331 struct fb_info *info;
diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c
index fabb0c59a211..8280a58a0e55 100644
--- a/drivers/video/mb862xx/mb862xxfb.c
+++ b/drivers/video/mb862xx/mb862xxfb.c
@@ -31,15 +31,6 @@
31#define CARMINE_MEM_SIZE 0x8000000 31#define CARMINE_MEM_SIZE 0x8000000
32#define DRV_NAME "mb862xxfb" 32#define DRV_NAME "mb862xxfb"
33 33
34#if defined(CONFIG_LWMON5)
35static struct mb862xx_gc_mode lwmon5_gc_mode = {
36 /* Mode for Sharp LQ104V1DG61 TFT LCD Panel */
37 { "640x480", 60, 640, 480, 40000, 48, 16, 32, 11, 96, 2, 0, 0, 0 },
38 /* 16 bits/pixel, 32MB, 100MHz, SDRAM memory mode value */
39 16, 0x2000000, GC_CCF_COT_100, 0x414fb7f2
40};
41#endif
42
43#if defined(CONFIG_SOCRATES) 34#if defined(CONFIG_SOCRATES)
44static struct mb862xx_gc_mode socrates_gc_mode = { 35static struct mb862xx_gc_mode socrates_gc_mode = {
45 /* Mode for Prime View PM070WL4 TFT LCD Panel */ 36 /* Mode for Prime View PM070WL4 TFT LCD Panel */
@@ -600,10 +591,6 @@ static int __devinit of_platform_mb862xx_probe(struct of_device *ofdev,
600 goto irqdisp; 591 goto irqdisp;
601 } 592 }
602 593
603#if defined(CONFIG_LWMON5)
604 par->gc_mode = &lwmon5_gc_mode;
605#endif
606
607#if defined(CONFIG_SOCRATES) 594#if defined(CONFIG_SOCRATES)
608 par->gc_mode = &socrates_gc_mode; 595 par->gc_mode = &socrates_gc_mode;
609#endif 596#endif
diff --git a/drivers/video/mbx/mbxfb.c b/drivers/video/mbx/mbxfb.c
index 01f77bcc68f9..afea9abbd678 100644
--- a/drivers/video/mbx/mbxfb.c
+++ b/drivers/video/mbx/mbxfb.c
@@ -693,7 +693,7 @@ static void __devinit setup_memc(struct fb_info *fbi)
693 unsigned long tmp; 693 unsigned long tmp;
694 int i; 694 int i;
695 695
696 /* FIXME: use platfrom specific parameters */ 696 /* FIXME: use platform specific parameters */
697 /* setup SDRAM controller */ 697 /* setup SDRAM controller */
698 write_reg_dly((LMCFG_LMC_DS | LMCFG_LMC_TS | LMCFG_LMD_TS | 698 write_reg_dly((LMCFG_LMC_DS | LMCFG_LMC_TS | LMCFG_LMD_TS |
699 LMCFG_LMA_TS), 699 LMCFG_LMA_TS),
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
index 0129f1bc3522..b895aae41630 100644
--- a/drivers/video/modedb.c
+++ b/drivers/video/modedb.c
@@ -893,7 +893,7 @@ const struct fb_videomode *fb_match_mode(const struct fb_var_screeninfo *var,
893} 893}
894 894
895/** 895/**
896 * fb_add_videomode: adds videomode entry to modelist 896 * fb_add_videomode - adds videomode entry to modelist
897 * @mode: videomode to add 897 * @mode: videomode to add
898 * @head: struct list_head of modelist 898 * @head: struct list_head of modelist
899 * 899 *
@@ -928,7 +928,7 @@ int fb_add_videomode(const struct fb_videomode *mode, struct list_head *head)
928} 928}
929 929
930/** 930/**
931 * fb_delete_videomode: removed videomode entry from modelist 931 * fb_delete_videomode - removed videomode entry from modelist
932 * @mode: videomode to remove 932 * @mode: videomode to remove
933 * @head: struct list_head of modelist 933 * @head: struct list_head of modelist
934 * 934 *
@@ -953,7 +953,7 @@ void fb_delete_videomode(const struct fb_videomode *mode,
953} 953}
954 954
955/** 955/**
956 * fb_destroy_modelist: destroy modelist 956 * fb_destroy_modelist - destroy modelist
957 * @head: struct list_head of modelist 957 * @head: struct list_head of modelist
958 */ 958 */
959void fb_destroy_modelist(struct list_head *head) 959void fb_destroy_modelist(struct list_head *head)
@@ -968,7 +968,7 @@ void fb_destroy_modelist(struct list_head *head)
968EXPORT_SYMBOL_GPL(fb_destroy_modelist); 968EXPORT_SYMBOL_GPL(fb_destroy_modelist);
969 969
970/** 970/**
971 * fb_videomode_to_modelist: convert mode array to mode list 971 * fb_videomode_to_modelist - convert mode array to mode list
972 * @modedb: array of struct fb_videomode 972 * @modedb: array of struct fb_videomode
973 * @num: number of entries in array 973 * @num: number of entries in array
974 * @head: struct list_head of modelist 974 * @head: struct list_head of modelist
diff --git a/drivers/video/nuc900fb.c b/drivers/video/nuc900fb.c
new file mode 100644
index 000000000000..6bf0d460a738
--- /dev/null
+++ b/drivers/video/nuc900fb.c
@@ -0,0 +1,779 @@
1/*
2 *
3 * Copyright (c) 2009 Nuvoton technology corporation
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * Description:
12 * Nuvoton LCD Controller Driver
13 * Author:
14 * Wang Qiang (rurality.linux@gmail.com) 2009/12/11
15 */
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/mm.h>
21#include <linux/tty.h>
22#include <linux/slab.h>
23#include <linux/delay.h>
24#include <linux/fb.h>
25#include <linux/init.h>
26#include <linux/dma-mapping.h>
27#include <linux/interrupt.h>
28#include <linux/workqueue.h>
29#include <linux/wait.h>
30#include <linux/platform_device.h>
31#include <linux/clk.h>
32#include <linux/cpufreq.h>
33#include <linux/io.h>
34#include <linux/pm.h>
35#include <linux/device.h>
36
37#include <mach/map.h>
38#include <mach/regs-clock.h>
39#include <mach/regs-ldm.h>
40#include <mach/fb.h>
41#include <mach/clkdev.h>
42
43#include "nuc900fb.h"
44
45
46/*
47 * Initialize the nuc900 video (dual) buffer address
48 */
49static void nuc900fb_set_lcdaddr(struct fb_info *info)
50{
51 struct nuc900fb_info *fbi = info->par;
52 void __iomem *regs = fbi->io;
53 unsigned long vbaddr1, vbaddr2;
54
55 vbaddr1 = info->fix.smem_start;
56 vbaddr2 = info->fix.smem_start;
57 vbaddr2 += info->fix.line_length * info->var.yres;
58
59 /* set frambuffer start phy addr*/
60 writel(vbaddr1, regs + REG_LCM_VA_BADDR0);
61 writel(vbaddr2, regs + REG_LCM_VA_BADDR1);
62
63 writel(fbi->regs.lcd_va_fbctrl, regs + REG_LCM_VA_FBCTRL);
64 writel(fbi->regs.lcd_va_scale, regs + REG_LCM_VA_SCALE);
65}
66
67/*
68 * calculate divider for lcd div
69 */
70static unsigned int nuc900fb_calc_pixclk(struct nuc900fb_info *fbi,
71 unsigned long pixclk)
72{
73 unsigned long clk = fbi->clk_rate;
74 unsigned long long div;
75
76 /* pixclk is in picseconds. our clock is in Hz*/
77 /* div = (clk * pixclk)/10^12 */
78 div = (unsigned long long)clk * pixclk;
79 div >>= 12;
80 do_div(div, 625 * 625UL * 625);
81
82 dev_dbg(fbi->dev, "pixclk %ld, divisor is %lld\n", pixclk, div);
83
84 return div;
85}
86
87/*
88 * Check the video params of 'var'.
89 */
90static int nuc900fb_check_var(struct fb_var_screeninfo *var,
91 struct fb_info *info)
92{
93 struct nuc900fb_info *fbi = info->par;
94 struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data;
95 struct nuc900fb_display *display = NULL;
96 struct nuc900fb_display *default_display = mach_info->displays +
97 mach_info->default_display;
98 int i;
99
100 dev_dbg(fbi->dev, "check_var(var=%p, info=%p)\n", var, info);
101
102 /* validate x/y resolution */
103 /* choose default mode if possible */
104 if (var->xres == default_display->xres &&
105 var->yres == default_display->yres &&
106 var->bits_per_pixel == default_display->bpp)
107 display = default_display;
108 else
109 for (i = 0; i < mach_info->num_displays; i++)
110 if (var->xres == mach_info->displays[i].xres &&
111 var->yres == mach_info->displays[i].yres &&
112 var->bits_per_pixel == mach_info->displays[i].bpp) {
113 display = mach_info->displays + i;
114 break;
115 }
116
117 if (display == NULL) {
118 printk(KERN_ERR "wrong resolution or depth %dx%d at %d bit per pixel\n",
119 var->xres, var->yres, var->bits_per_pixel);
120 return -EINVAL;
121 }
122
123 /* it should be the same size as the display */
124 var->xres_virtual = display->xres;
125 var->yres_virtual = display->yres;
126 var->height = display->height;
127 var->width = display->width;
128
129 /* copy lcd settings */
130 var->pixclock = display->pixclock;
131 var->left_margin = display->left_margin;
132 var->right_margin = display->right_margin;
133 var->upper_margin = display->upper_margin;
134 var->lower_margin = display->lower_margin;
135 var->vsync_len = display->vsync_len;
136 var->hsync_len = display->hsync_len;
137
138 var->transp.offset = 0;
139 var->transp.length = 0;
140
141 fbi->regs.lcd_dccs = display->dccs;
142 fbi->regs.lcd_device_ctrl = display->devctl;
143 fbi->regs.lcd_va_fbctrl = display->fbctrl;
144 fbi->regs.lcd_va_scale = display->scale;
145
146 /* set R/G/B possions */
147 switch (var->bits_per_pixel) {
148 case 1:
149 case 2:
150 case 4:
151 case 8:
152 default:
153 var->red.offset = 0;
154 var->red.length = var->bits_per_pixel;
155 var->green = var->red;
156 var->blue = var->red;
157 break;
158 case 12:
159 var->red.length = 4;
160 var->green.length = 4;
161 var->blue.length = 4;
162 var->red.offset = 8;
163 var->green.offset = 4;
164 var->blue.offset = 0;
165 break;
166 case 16:
167 var->red.length = 5;
168 var->green.length = 6;
169 var->blue.length = 5;
170 var->red.offset = 11;
171 var->green.offset = 5;
172 var->blue.offset = 0;
173 break;
174 case 18:
175 var->red.length = 6;
176 var->green.length = 6;
177 var->blue.length = 6;
178 var->red.offset = 12;
179 var->green.offset = 6;
180 var->blue.offset = 0;
181 break;
182 case 32:
183 var->red.length = 8;
184 var->green.length = 8;
185 var->blue.length = 8;
186 var->red.offset = 16;
187 var->green.offset = 8;
188 var->blue.offset = 0;
189 break;
190 }
191
192 return 0;
193}
194
195/*
196 * Calculate lcd register values from var setting & save into hw
197 */
198static void nuc900fb_calculate_lcd_regs(const struct fb_info *info,
199 struct nuc900fb_hw *regs)
200{
201 const struct fb_var_screeninfo *var = &info->var;
202 int vtt = var->height + var->upper_margin + var->lower_margin;
203 int htt = var->width + var->left_margin + var->right_margin;
204 int hsync = var->width + var->right_margin;
205 int vsync = var->height + var->lower_margin;
206
207 regs->lcd_crtc_size = LCM_CRTC_SIZE_VTTVAL(vtt) |
208 LCM_CRTC_SIZE_HTTVAL(htt);
209 regs->lcd_crtc_dend = LCM_CRTC_DEND_VDENDVAL(var->height) |
210 LCM_CRTC_DEND_HDENDVAL(var->width);
211 regs->lcd_crtc_hr = LCM_CRTC_HR_EVAL(var->width + 5) |
212 LCM_CRTC_HR_SVAL(var->width + 1);
213 regs->lcd_crtc_hsync = LCM_CRTC_HSYNC_EVAL(hsync + var->hsync_len) |
214 LCM_CRTC_HSYNC_SVAL(hsync);
215 regs->lcd_crtc_vr = LCM_CRTC_VR_EVAL(vsync + var->vsync_len) |
216 LCM_CRTC_VR_SVAL(vsync);
217
218}
219
220/*
221 * Activate (set) the controller from the given framebuffer
222 * information
223 */
224static void nuc900fb_activate_var(struct fb_info *info)
225{
226 struct nuc900fb_info *fbi = info->par;
227 void __iomem *regs = fbi->io;
228 struct fb_var_screeninfo *var = &info->var;
229 int clkdiv;
230
231 clkdiv = nuc900fb_calc_pixclk(fbi, var->pixclock) - 1;
232 if (clkdiv < 0)
233 clkdiv = 0;
234
235 nuc900fb_calculate_lcd_regs(info, &fbi->regs);
236
237 /* set the new lcd registers*/
238
239 dev_dbg(fbi->dev, "new lcd register set:\n");
240 dev_dbg(fbi->dev, "dccs = 0x%08x\n", fbi->regs.lcd_dccs);
241 dev_dbg(fbi->dev, "dev_ctl = 0x%08x\n", fbi->regs.lcd_device_ctrl);
242 dev_dbg(fbi->dev, "crtc_size = 0x%08x\n", fbi->regs.lcd_crtc_size);
243 dev_dbg(fbi->dev, "crtc_dend = 0x%08x\n", fbi->regs.lcd_crtc_dend);
244 dev_dbg(fbi->dev, "crtc_hr = 0x%08x\n", fbi->regs.lcd_crtc_hr);
245 dev_dbg(fbi->dev, "crtc_hsync = 0x%08x\n", fbi->regs.lcd_crtc_hsync);
246 dev_dbg(fbi->dev, "crtc_vr = 0x%08x\n", fbi->regs.lcd_crtc_vr);
247
248 writel(fbi->regs.lcd_device_ctrl, regs + REG_LCM_DEV_CTRL);
249 writel(fbi->regs.lcd_crtc_size, regs + REG_LCM_CRTC_SIZE);
250 writel(fbi->regs.lcd_crtc_dend, regs + REG_LCM_CRTC_DEND);
251 writel(fbi->regs.lcd_crtc_hr, regs + REG_LCM_CRTC_HR);
252 writel(fbi->regs.lcd_crtc_hsync, regs + REG_LCM_CRTC_HSYNC);
253 writel(fbi->regs.lcd_crtc_vr, regs + REG_LCM_CRTC_VR);
254
255 /* set lcd address pointers */
256 nuc900fb_set_lcdaddr(info);
257
258 writel(fbi->regs.lcd_dccs, regs + REG_LCM_DCCS);
259}
260
261/*
262 * Alters the hardware state.
263 *
264 */
265static int nuc900fb_set_par(struct fb_info *info)
266{
267 struct fb_var_screeninfo *var = &info->var;
268
269 switch (var->bits_per_pixel) {
270 case 32:
271 case 24:
272 case 18:
273 case 16:
274 case 12:
275 info->fix.visual = FB_VISUAL_TRUECOLOR;
276 break;
277 case 1:
278 info->fix.visual = FB_VISUAL_MONO01;
279 break;
280 default:
281 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
282 break;
283 }
284
285 info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
286
287 /* activate this new configuration */
288 nuc900fb_activate_var(info);
289 return 0;
290}
291
292static inline unsigned int chan_to_field(unsigned int chan,
293 struct fb_bitfield *bf)
294{
295 chan &= 0xffff;
296 chan >>= 16 - bf->length;
297 return chan << bf->offset;
298}
299
300static int nuc900fb_setcolreg(unsigned regno,
301 unsigned red, unsigned green, unsigned blue,
302 unsigned transp, struct fb_info *info)
303{
304 unsigned int val;
305
306 switch (info->fix.visual) {
307 case FB_VISUAL_TRUECOLOR:
308 /* true-colour, use pseuo-palette */
309 if (regno < 16) {
310 u32 *pal = info->pseudo_palette;
311
312 val = chan_to_field(red, &info->var.red);
313 val |= chan_to_field(green, &info->var.green);
314 val |= chan_to_field(blue, &info->var.blue);
315 pal[regno] = val;
316 }
317 break;
318
319 default:
320 return 1; /* unknown type */
321 }
322 return 0;
323}
324
325/**
326 * nuc900fb_blank
327 *
328 */
329static int nuc900fb_blank(int blank_mode, struct fb_info *info)
330{
331
332 return 0;
333}
334
335static struct fb_ops nuc900fb_ops = {
336 .owner = THIS_MODULE,
337 .fb_check_var = nuc900fb_check_var,
338 .fb_set_par = nuc900fb_set_par,
339 .fb_blank = nuc900fb_blank,
340 .fb_setcolreg = nuc900fb_setcolreg,
341 .fb_fillrect = cfb_fillrect,
342 .fb_copyarea = cfb_copyarea,
343 .fb_imageblit = cfb_imageblit,
344};
345
346
347static inline void modify_gpio(void __iomem *reg,
348 unsigned long set, unsigned long mask)
349{
350 unsigned long tmp;
351 tmp = readl(reg) & ~mask;
352 writel(tmp | set, reg);
353}
354
355/*
356 * Initialise LCD-related registers
357 */
358static int nuc900fb_init_registers(struct fb_info *info)
359{
360 struct nuc900fb_info *fbi = info->par;
361 struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data;
362 void __iomem *regs = fbi->io;
363
364 /*reset the display engine*/
365 writel(0, regs + REG_LCM_DCCS);
366 writel(readl(regs + REG_LCM_DCCS) | LCM_DCCS_ENG_RST,
367 regs + REG_LCM_DCCS);
368 ndelay(100);
369 writel(readl(regs + REG_LCM_DCCS) & (~LCM_DCCS_ENG_RST),
370 regs + REG_LCM_DCCS);
371 ndelay(100);
372
373 writel(0, regs + REG_LCM_DEV_CTRL);
374
375 /* config gpio output */
376 modify_gpio(W90X900_VA_GPIO + 0x54, mach_info->gpio_dir,
377 mach_info->gpio_dir_mask);
378 modify_gpio(W90X900_VA_GPIO + 0x58, mach_info->gpio_data,
379 mach_info->gpio_data_mask);
380
381 return 0;
382}
383
384
385/*
386 * Alloc the SDRAM region of NUC900 for the frame buffer.
387 * The buffer should be a non-cached, non-buffered, memory region
388 * to allow palette and pixel writes without flushing the cache.
389 */
390static int __init nuc900fb_map_video_memory(struct fb_info *info)
391{
392 struct nuc900fb_info *fbi = info->par;
393 dma_addr_t map_dma;
394 unsigned long map_size = PAGE_ALIGN(info->fix.smem_len);
395
396 dev_dbg(fbi->dev, "nuc900fb_map_video_memory(fbi=%p) map_size %lu\n",
397 fbi, map_size);
398
399 info->screen_base = dma_alloc_writecombine(fbi->dev, map_size,
400 &map_dma, GFP_KERNEL);
401
402 if (!info->screen_base)
403 return -ENOMEM;
404
405 memset(info->screen_base, 0x00, map_size);
406 info->fix.smem_start = map_dma;
407
408 return 0;
409}
410
411static inline void nuc900fb_unmap_video_memory(struct fb_info *info)
412{
413 struct nuc900fb_info *fbi = info->par;
414 dma_free_writecombine(fbi->dev, PAGE_ALIGN(info->fix.smem_len),
415 info->screen_base, info->fix.smem_start);
416}
417
418static irqreturn_t nuc900fb_irqhandler(int irq, void *dev_id)
419{
420 struct nuc900fb_info *fbi = dev_id;
421 void __iomem *regs = fbi->io;
422 void __iomem *irq_base = fbi->irq_base;
423 unsigned long lcdirq = readl(regs + REG_LCM_INT_CS);
424
425 if (lcdirq & LCM_INT_CS_DISP_F_STATUS) {
426 writel(readl(irq_base) | 1<<30, irq_base);
427
428 /* wait VA_EN low */
429 if ((readl(regs + REG_LCM_DCCS) &
430 LCM_DCCS_SINGLE) == LCM_DCCS_SINGLE)
431 while ((readl(regs + REG_LCM_DCCS) &
432 LCM_DCCS_VA_EN) == LCM_DCCS_VA_EN)
433 ;
434 /* display_out-enable */
435 writel(readl(regs + REG_LCM_DCCS) | LCM_DCCS_DISP_OUT_EN,
436 regs + REG_LCM_DCCS);
437 /* va-enable*/
438 writel(readl(regs + REG_LCM_DCCS) | LCM_DCCS_VA_EN,
439 regs + REG_LCM_DCCS);
440 } else if (lcdirq & LCM_INT_CS_UNDERRUN_INT) {
441 writel(readl(irq_base) | LCM_INT_CS_UNDERRUN_INT, irq_base);
442 } else if (lcdirq & LCM_INT_CS_BUS_ERROR_INT) {
443 writel(readl(irq_base) | LCM_INT_CS_BUS_ERROR_INT, irq_base);
444 }
445
446 return IRQ_HANDLED;
447}
448
449#ifdef CONFIG_CPU_FREQ
450
451static int nuc900fb_cpufreq_transition(struct notifier_block *nb,
452 unsigned long val, void *data)
453{
454 struct nuc900fb_info *info;
455 struct fb_info *fbinfo;
456 long delta_f;
457 info = container_of(nb, struct nuc900fb_info, freq_transition);
458 fbinfo = platform_get_drvdata(to_platform_device(info->dev));
459
460 delta_f = info->clk_rate - clk_get_rate(info->clk);
461
462 if ((val == CPUFREQ_POSTCHANGE && delta_f > 0) ||
463 (val == CPUFREQ_PRECHANGE && delta_f < 0)) {
464 info->clk_rate = clk_get_rate(info->clk);
465 nuc900fb_activate_var(fbinfo);
466 }
467
468 return 0;
469}
470
471static inline int nuc900fb_cpufreq_register(struct nuc900fb_info *fbi)
472{
473 fbi->freq_transition.notifier_call = nuc900fb_cpufreq_transition;
474 return cpufreq_register_notifier(&fbi->freq_transition,
475 CPUFREQ_TRANSITION_NOTIFIER);
476}
477
478static inline void nuc900fb_cpufreq_deregister(struct nuc900fb_info *fbi)
479{
480 cpufreq_unregister_notifier(&fbi->freq_transition,
481 CPUFREQ_TRANSITION_NOTIFIER);
482}
483#else
484static inline int nuc900fb_cpufreq_transition(struct notifier_block *nb,
485 unsigned long val, void *data)
486{
487 return 0;
488}
489
490static inline int nuc900fb_cpufreq_register(struct nuc900fb_info *fbi)
491{
492 return 0;
493}
494
495static inline void nuc900fb_cpufreq_deregister(struct nuc900fb_info *info)
496{
497}
498#endif
499
500static char driver_name[] = "nuc900fb";
501
502static int __devinit nuc900fb_probe(struct platform_device *pdev)
503{
504 struct nuc900fb_info *fbi;
505 struct nuc900fb_display *display;
506 struct fb_info *fbinfo;
507 struct nuc900fb_mach_info *mach_info;
508 struct resource *res;
509 int ret;
510 int irq;
511 int i;
512 int size;
513
514 dev_dbg(&pdev->dev, "devinit\n");
515 mach_info = pdev->dev.platform_data;
516 if (mach_info == NULL) {
517 dev_err(&pdev->dev,
518 "no platform data for lcd, cannot attach\n");
519 return -EINVAL;
520 }
521
522 if (mach_info->default_display > mach_info->num_displays) {
523 dev_err(&pdev->dev,
524 "default display No. is %d but only %d displays \n",
525 mach_info->default_display, mach_info->num_displays);
526 return -EINVAL;
527 }
528
529
530 display = mach_info->displays + mach_info->default_display;
531
532 irq = platform_get_irq(pdev, 0);
533 if (irq < 0) {
534 dev_err(&pdev->dev, "no irq for device\n");
535 return -ENOENT;
536 }
537
538 fbinfo = framebuffer_alloc(sizeof(struct nuc900fb_info), &pdev->dev);
539 if (!fbinfo)
540 return -ENOMEM;
541
542 platform_set_drvdata(pdev, fbinfo);
543
544 fbi = fbinfo->par;
545 fbi->dev = &pdev->dev;
546
547#ifdef CONFIG_CPU_NUC950
548 fbi->drv_type = LCDDRV_NUC950;
549#endif
550
551 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
552
553 size = (res->end - res->start) + 1;
554 fbi->mem = request_mem_region(res->start, size, pdev->name);
555 if (fbi->mem == NULL) {
556 dev_err(&pdev->dev, "failed to alloc memory region\n");
557 ret = -ENOENT;
558 goto free_fb;
559 }
560
561 fbi->io = ioremap(res->start, size);
562 if (fbi->io == NULL) {
563 dev_err(&pdev->dev, "ioremap() of lcd registers failed\n");
564 ret = -ENXIO;
565 goto release_mem_region;
566 }
567
568 fbi->irq_base = fbi->io + REG_LCM_INT_CS;
569
570
571 /* Stop the LCD */
572 writel(0, fbi->io + REG_LCM_DCCS);
573
574 /* fill the fbinfo*/
575 strcpy(fbinfo->fix.id, driver_name);
576 fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
577 fbinfo->fix.type_aux = 0;
578 fbinfo->fix.xpanstep = 0;
579 fbinfo->fix.ypanstep = 0;
580 fbinfo->fix.ywrapstep = 0;
581 fbinfo->fix.accel = FB_ACCEL_NONE;
582 fbinfo->var.nonstd = 0;
583 fbinfo->var.activate = FB_ACTIVATE_NOW;
584 fbinfo->var.accel_flags = 0;
585 fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
586 fbinfo->fbops = &nuc900fb_ops;
587 fbinfo->flags = FBINFO_FLAG_DEFAULT;
588 fbinfo->pseudo_palette = &fbi->pseudo_pal;
589
590 ret = request_irq(irq, nuc900fb_irqhandler, IRQF_DISABLED,
591 pdev->name, fbinfo);
592 if (ret) {
593 dev_err(&pdev->dev, "cannot register irq handler %d -err %d\n",
594 irq, ret);
595 ret = -EBUSY;
596 goto release_regs;
597 }
598
599 nuc900_driver_clksrc_div(&pdev->dev, "ext", 0x2);
600
601 fbi->clk = clk_get(&pdev->dev, NULL);
602 if (!fbi->clk || IS_ERR(fbi->clk)) {
603 printk(KERN_ERR "nuc900-lcd:failed to get lcd clock source\n");
604 ret = -ENOENT;
605 goto release_irq;
606 }
607
608 clk_enable(fbi->clk);
609 dev_dbg(&pdev->dev, "got and enabled clock\n");
610
611 fbi->clk_rate = clk_get_rate(fbi->clk);
612
613 /* calutate the video buffer size */
614 for (i = 0; i < mach_info->num_displays; i++) {
615 unsigned long smem_len = mach_info->displays[i].xres;
616 smem_len *= mach_info->displays[i].yres;
617 smem_len *= mach_info->displays[i].bpp;
618 smem_len >>= 3;
619 if (fbinfo->fix.smem_len < smem_len)
620 fbinfo->fix.smem_len = smem_len;
621 }
622
623 /* Initialize Video Memory */
624 ret = nuc900fb_map_video_memory(fbinfo);
625 if (ret) {
626 printk(KERN_ERR "Failed to allocate video RAM: %x\n", ret);
627 goto release_clock;
628 }
629
630 dev_dbg(&pdev->dev, "got video memory\n");
631
632 fbinfo->var.xres = display->xres;
633 fbinfo->var.yres = display->yres;
634 fbinfo->var.bits_per_pixel = display->bpp;
635
636 nuc900fb_init_registers(fbinfo);
637
638 nuc900fb_check_var(&fbinfo->var, fbinfo);
639
640 ret = nuc900fb_cpufreq_register(fbi);
641 if (ret < 0) {
642 dev_err(&pdev->dev, "Failed to register cpufreq\n");
643 goto free_video_memory;
644 }
645
646 ret = register_framebuffer(fbinfo);
647 if (ret) {
648 printk(KERN_ERR "failed to register framebuffer device: %d\n",
649 ret);
650 goto free_cpufreq;
651 }
652
653 printk(KERN_INFO "fb%d: %s frame buffer device\n",
654 fbinfo->node, fbinfo->fix.id);
655
656 return 0;
657
658free_cpufreq:
659 nuc900fb_cpufreq_deregister(fbi);
660free_video_memory:
661 nuc900fb_unmap_video_memory(fbinfo);
662release_clock:
663 clk_disable(fbi->clk);
664 clk_put(fbi->clk);
665release_irq:
666 free_irq(irq, fbi);
667release_regs:
668 iounmap(fbi->io);
669release_mem_region:
670 release_mem_region((unsigned long)fbi->mem, size);
671free_fb:
672 framebuffer_release(fbinfo);
673 return ret;
674}
675
676/*
677 * shutdown the lcd controller
678 */
679static void nuc900fb_stop_lcd(struct fb_info *info)
680{
681 struct nuc900fb_info *fbi = info->par;
682 void __iomem *regs = fbi->io;
683
684 writel((~LCM_DCCS_DISP_INT_EN) | (~LCM_DCCS_VA_EN) | (~LCM_DCCS_OSD_EN),
685 regs + REG_LCM_DCCS);
686}
687
688/*
689 * Cleanup
690 */
691static int nuc900fb_remove(struct platform_device *pdev)
692{
693 struct fb_info *fbinfo = platform_get_drvdata(pdev);
694 struct nuc900fb_info *fbi = fbinfo->par;
695 int irq;
696
697 nuc900fb_stop_lcd(fbinfo);
698 msleep(1);
699
700 nuc900fb_unmap_video_memory(fbinfo);
701
702 iounmap(fbi->io);
703
704 irq = platform_get_irq(pdev, 0);
705 free_irq(irq, fbi);
706
707 release_resource(fbi->mem);
708 kfree(fbi->mem);
709
710 platform_set_drvdata(pdev, NULL);
711 framebuffer_release(fbinfo);
712
713 return 0;
714}
715
716#ifdef CONFIG_PM
717
718/*
719 * suspend and resume support for the lcd controller
720 */
721
722static int nuc900fb_suspend(struct platform_device *dev, pm_message_t state)
723{
724 struct fb_info *fbinfo = platform_get_drvdata(dev);
725 struct nuc900fb_info *info = fbinfo->par;
726
727 nuc900fb_stop_lcd();
728 msleep(1);
729 clk_disable(info->clk);
730 return 0;
731}
732
733static int nuc900fb_resume(struct platform_device *dev)
734{
735 struct fb_info *fbinfo = platform_get_drvdata(dev);
736 struct nuc900fb_info *fbi = fbinfo->par;
737
738 printk(KERN_INFO "nuc900fb resume\n");
739
740 clk_enable(fbi->clk);
741 msleep(1);
742
743 nuc900fb_init_registers(fbinfo);
744 nuc900fb_activate_var(bfinfo);
745
746 return 0;
747}
748
749#else
750#define nuc900fb_suspend NULL
751#define nuc900fb_resume NULL
752#endif
753
754static struct platform_driver nuc900fb_driver = {
755 .probe = nuc900fb_probe,
756 .remove = nuc900fb_remove,
757 .suspend = nuc900fb_suspend,
758 .resume = nuc900fb_resume,
759 .driver = {
760 .name = "nuc900-lcd",
761 .owner = THIS_MODULE,
762 },
763};
764
765int __devinit nuc900fb_init(void)
766{
767 return platform_driver_register(&nuc900fb_driver);
768}
769
770static void __exit nuc900fb_cleanup(void)
771{
772 platform_driver_unregister(&nuc900fb_driver);
773}
774
775module_init(nuc900fb_init);
776module_exit(nuc900fb_cleanup);
777
778MODULE_DESCRIPTION("Framebuffer driver for the NUC900");
779MODULE_LICENSE("GPL");
diff --git a/drivers/video/nuc900fb.h b/drivers/video/nuc900fb.h
new file mode 100644
index 000000000000..6c23aa3d3b89
--- /dev/null
+++ b/drivers/video/nuc900fb.h
@@ -0,0 +1,55 @@
1/*
2 *
3 * Copyright (c) 2009 Nuvoton technology corporation
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * Auther:
12 * Wang Qiang(rurality.linux@gmail.com) 2009/12/16
13 */
14
15#ifndef __NUC900FB_H
16#define __NUC900FB_H
17
18#include <mach/map.h>
19#include <mach/fb.h>
20
21enum nuc900_lcddrv_type {
22 LCDDRV_NUC910,
23 LCDDRV_NUC930,
24 LCDDRV_NUC932,
25 LCDDRV_NUC950,
26 LCDDRV_NUC960,
27};
28
29
30#define PALETTE_BUFFER_SIZE 256
31#define PALETTE_BUFF_CLEAR (0x80000000) /* entry is clear/invalid */
32
33struct nuc900fb_info {
34 struct device *dev;
35 struct clk *clk;
36
37 struct resource *mem;
38 void __iomem *io;
39 void __iomem *irq_base;
40 int drv_type;
41 struct nuc900fb_hw regs;
42 unsigned long clk_rate;
43
44#ifdef CONFIG_CPU_FREQ
45 struct notifier_block freq_transition;
46#endif
47
48 /* keep these registers in case we need to re-write palette */
49 u32 palette_buffer[PALETTE_BUFFER_SIZE];
50 u32 pseudo_pal[16];
51};
52
53int nuc900fb_init(void);
54
55#endif /* __NUC900FB_H */
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index a33483910dc8..9557f963662e 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -389,7 +389,7 @@ static int omap_lcdc_enable_plane(int plane, int enable)
389/* 389/*
390 * Configure the LCD DMA for a palette load operation and do the palette 390 * Configure the LCD DMA for a palette load operation and do the palette
391 * downloading synchronously. We don't use the frame+palette load mode of 391 * downloading synchronously. We don't use the frame+palette load mode of
392 * the controller, since the palette can always be downloaded seperately. 392 * the controller, since the palette can always be downloaded separately.
393 */ 393 */
394static void load_palette(void) 394static void load_palette(void)
395{ 395{
diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c
index 913142d4cab1..9acef00c47ea 100644
--- a/drivers/video/omap2/dss/manager.c
+++ b/drivers/video/omap2/dss/manager.c
@@ -341,7 +341,7 @@ static ssize_t manager_attr_store(struct kobject *kobj, struct attribute *attr,
341 return manager_attr->store(manager, buf, size); 341 return manager_attr->store(manager, buf, size);
342} 342}
343 343
344static struct sysfs_ops manager_sysfs_ops = { 344static const struct sysfs_ops manager_sysfs_ops = {
345 .show = manager_attr_show, 345 .show = manager_attr_show,
346 .store = manager_attr_store, 346 .store = manager_attr_store,
347}; 347};
diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c
index 0c5bea263ac6..aed3f3194347 100644
--- a/drivers/video/omap2/dss/overlay.c
+++ b/drivers/video/omap2/dss/overlay.c
@@ -320,7 +320,7 @@ static ssize_t overlay_attr_store(struct kobject *kobj, struct attribute *attr,
320 return overlay_attr->store(overlay, buf, size); 320 return overlay_attr->store(overlay, buf, size);
321} 321}
322 322
323static struct sysfs_ops overlay_sysfs_ops = { 323static const struct sysfs_ops overlay_sysfs_ops = {
324 .show = overlay_attr_show, 324 .show = overlay_attr_show,
325 .store = overlay_attr_store, 325 .store = overlay_attr_store,
326}; 326};
diff --git a/drivers/video/pm2fb.c b/drivers/video/pm2fb.c
index 36436ee6c1a4..27f93aab6ddc 100644
--- a/drivers/video/pm2fb.c
+++ b/drivers/video/pm2fb.c
@@ -896,7 +896,7 @@ static int pm2fb_setcolreg(unsigned regno, unsigned red, unsigned green,
896 * Pseudocolor: 896 * Pseudocolor:
897 * uses offset = 0 && length = DAC register width. 897 * uses offset = 0 && length = DAC register width.
898 * var->{color}.offset is 0 898 * var->{color}.offset is 0
899 * var->{color}.length contains widht of DAC 899 * var->{color}.length contains width of DAC
900 * cmap is not used 900 * cmap is not used
901 * DAC[X] is programmed to (red, green, blue) 901 * DAC[X] is programmed to (red, green, blue)
902 * Truecolor: 902 * Truecolor:
diff --git a/drivers/video/q40fb.c b/drivers/video/q40fb.c
index 4beac1df617b..de40a626dc76 100644
--- a/drivers/video/q40fb.c
+++ b/drivers/video/q40fb.c
@@ -85,7 +85,7 @@ static struct fb_ops q40fb_ops = {
85 .fb_imageblit = cfb_imageblit, 85 .fb_imageblit = cfb_imageblit,
86}; 86};
87 87
88static int __init q40fb_probe(struct platform_device *dev) 88static int __devinit q40fb_probe(struct platform_device *dev)
89{ 89{
90 struct fb_info *info; 90 struct fb_info *info;
91 91
diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/s1d13xxxfb.c
index 0deb0a8867b7..7b63429f1a7c 100644
--- a/drivers/video/s1d13xxxfb.c
+++ b/drivers/video/s1d13xxxfb.c
@@ -517,12 +517,12 @@ s1d13xxxfb_bitblt_copyarea(struct fb_info *info, const struct fb_copyarea *area)
517 src = (sy * stride) + (bpp * sx); 517 src = (sy * stride) + (bpp * sx);
518 } 518 }
519 519
520 /* set source adress */ 520 /* set source address */
521 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START0, (src & 0xff)); 521 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START0, (src & 0xff));
522 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START1, (src >> 8) & 0x00ff); 522 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START1, (src >> 8) & 0x00ff);
523 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START2, (src >> 16) & 0x00ff); 523 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START2, (src >> 16) & 0x00ff);
524 524
525 /* set destination adress */ 525 /* set destination address */
526 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dst & 0xff)); 526 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dst & 0xff));
527 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, (dst >> 8) & 0x00ff); 527 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, (dst >> 8) & 0x00ff);
528 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, (dst >> 16) & 0x00ff); 528 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, (dst >> 16) & 0x00ff);
diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c
index aac661225c78..2b094dec4a56 100644
--- a/drivers/video/s3c2410fb.c
+++ b/drivers/video/s3c2410fb.c
@@ -1004,12 +1004,12 @@ dealloc_fb:
1004 return ret; 1004 return ret;
1005} 1005}
1006 1006
1007static int __init s3c2410fb_probe(struct platform_device *pdev) 1007static int __devinit s3c2410fb_probe(struct platform_device *pdev)
1008{ 1008{
1009 return s3c24xxfb_probe(pdev, DRV_S3C2410); 1009 return s3c24xxfb_probe(pdev, DRV_S3C2410);
1010} 1010}
1011 1011
1012static int __init s3c2412fb_probe(struct platform_device *pdev) 1012static int __devinit s3c2412fb_probe(struct platform_device *pdev)
1013{ 1013{
1014 return s3c24xxfb_probe(pdev, DRV_S3C2412); 1014 return s3c24xxfb_probe(pdev, DRV_S3C2412);
1015} 1015}
diff --git a/drivers/video/sa1100fb.c b/drivers/video/sa1100fb.c
index cdaa873a6054..e8b76d65a070 100644
--- a/drivers/video/sa1100fb.c
+++ b/drivers/video/sa1100fb.c
@@ -1435,7 +1435,7 @@ static struct sa1100fb_info * __init sa1100fb_init_fbinfo(struct device *dev)
1435 return fbi; 1435 return fbi;
1436} 1436}
1437 1437
1438static int __init sa1100fb_probe(struct platform_device *pdev) 1438static int __devinit sa1100fb_probe(struct platform_device *pdev)
1439{ 1439{
1440 struct sa1100fb_info *fbi; 1440 struct sa1100fb_info *fbi;
1441 int ret, irq; 1441 int ret, irq;
diff --git a/drivers/video/sgivwfb.c b/drivers/video/sgivwfb.c
index f86012239bff..7a3a5e28eca1 100644
--- a/drivers/video/sgivwfb.c
+++ b/drivers/video/sgivwfb.c
@@ -745,7 +745,7 @@ int __init sgivwfb_setup(char *options)
745/* 745/*
746 * Initialisation 746 * Initialisation
747 */ 747 */
748static int __init sgivwfb_probe(struct platform_device *dev) 748static int __devinit sgivwfb_probe(struct platform_device *dev)
749{ 749{
750 struct sgivw_par *par; 750 struct sgivw_par *par;
751 struct fb_info *info; 751 struct fb_info *info;
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c
index 8d7653e56df5..bbd1dbf4026a 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/sh_mobile_lcdcfb.c
@@ -943,7 +943,7 @@ static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
943 943
944static int sh_mobile_lcdc_remove(struct platform_device *pdev); 944static int sh_mobile_lcdc_remove(struct platform_device *pdev);
945 945
946static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) 946static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
947{ 947{
948 struct fb_info *info; 948 struct fb_info *info;
949 struct sh_mobile_lcdc_priv *priv; 949 struct sh_mobile_lcdc_priv *priv;
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c
index 9d2b6bc49036..a531a0f7cdf2 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/sis/sis_main.c
@@ -1891,9 +1891,6 @@ static struct fb_ops sisfb_ops = {
1891 .fb_fillrect = fbcon_sis_fillrect, 1891 .fb_fillrect = fbcon_sis_fillrect,
1892 .fb_copyarea = fbcon_sis_copyarea, 1892 .fb_copyarea = fbcon_sis_copyarea,
1893 .fb_imageblit = cfb_imageblit, 1893 .fb_imageblit = cfb_imageblit,
1894#ifdef CONFIG_FB_SOFT_CURSOR
1895 .fb_cursor = soft_cursor,
1896#endif
1897 .fb_sync = fbcon_sis_sync, 1894 .fb_sync = fbcon_sis_sync,
1898#ifdef SIS_NEW_CONFIG_COMPAT 1895#ifdef SIS_NEW_CONFIG_COMPAT
1899 .fb_compat_ioctl= sisfb_ioctl, 1896 .fb_compat_ioctl= sisfb_ioctl,
diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c
index 35370d0ecf03..b7dc1800efa9 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/sm501fb.c
@@ -411,7 +411,7 @@ static int sm501fb_set_par_common(struct fb_info *info,
411 struct sm501fb_par *par = info->par; 411 struct sm501fb_par *par = info->par;
412 struct sm501fb_info *fbi = par->info; 412 struct sm501fb_info *fbi = par->info;
413 unsigned long pixclock; /* pixelclock in Hz */ 413 unsigned long pixclock; /* pixelclock in Hz */
414 unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */ 414 unsigned long sm501pixclock; /* pixelclock the 501 can achieve in Hz */
415 unsigned int mem_type; 415 unsigned int mem_type;
416 unsigned int clock_type; 416 unsigned int clock_type;
417 unsigned int head_addr; 417 unsigned int head_addr;
diff --git a/drivers/video/sstfb.c b/drivers/video/sstfb.c
index 609d0a521ca2..79840f11fecb 100644
--- a/drivers/video/sstfb.c
+++ b/drivers/video/sstfb.c
@@ -1102,7 +1102,7 @@ static void sst_set_vidmod_ics(struct fb_info *info, const int bpp)
1102 * detect dac type 1102 * detect dac type
1103 * prerequisite : write to FbiInitx enabled, video and fbi and pci fifo reset, 1103 * prerequisite : write to FbiInitx enabled, video and fbi and pci fifo reset,
1104 * dram refresh disabled, FbiInit remaped. 1104 * dram refresh disabled, FbiInit remaped.
1105 * TODO: mmh.. maybe i shoud put the "prerequisite" in the func ... 1105 * TODO: mmh.. maybe i should put the "prerequisite" in the func ...
1106 */ 1106 */
1107 1107
1108 1108
diff --git a/drivers/video/sunxvr1000.c b/drivers/video/sunxvr1000.c
new file mode 100644
index 000000000000..a8248c0b9192
--- /dev/null
+++ b/drivers/video/sunxvr1000.c
@@ -0,0 +1,228 @@
1/* sunxvr1000.c: Sun XVR-1000 driver for sparc64 systems
2 *
3 * Copyright (C) 2010 David S. Miller (davem@davemloft.net)
4 */
5
6#include <linux/module.h>
7#include <linux/kernel.h>
8#include <linux/slab.h>
9#include <linux/fb.h>
10#include <linux/init.h>
11#include <linux/of_device.h>
12
13struct gfb_info {
14 struct fb_info *info;
15
16 char __iomem *fb_base;
17 unsigned long fb_base_phys;
18
19 struct device_node *of_node;
20
21 unsigned int width;
22 unsigned int height;
23 unsigned int depth;
24 unsigned int fb_size;
25
26 u32 pseudo_palette[16];
27};
28
29static int __devinit gfb_get_props(struct gfb_info *gp)
30{
31 gp->width = of_getintprop_default(gp->of_node, "width", 0);
32 gp->height = of_getintprop_default(gp->of_node, "height", 0);
33 gp->depth = of_getintprop_default(gp->of_node, "depth", 32);
34
35 if (!gp->width || !gp->height) {
36 printk(KERN_ERR "gfb: Critical properties missing for %s\n",
37 gp->of_node->full_name);
38 return -EINVAL;
39 }
40
41 return 0;
42}
43
44static int gfb_setcolreg(unsigned regno,
45 unsigned red, unsigned green, unsigned blue,
46 unsigned transp, struct fb_info *info)
47{
48 u32 value;
49
50 if (regno < 16) {
51 red >>= 8;
52 green >>= 8;
53 blue >>= 8;
54
55 value = (blue << 16) | (green << 8) | red;
56 ((u32 *)info->pseudo_palette)[regno] = value;
57 }
58
59 return 0;
60}
61
62static struct fb_ops gfb_ops = {
63 .owner = THIS_MODULE,
64 .fb_setcolreg = gfb_setcolreg,
65 .fb_fillrect = cfb_fillrect,
66 .fb_copyarea = cfb_copyarea,
67 .fb_imageblit = cfb_imageblit,
68};
69
70static int __devinit gfb_set_fbinfo(struct gfb_info *gp)
71{
72 struct fb_info *info = gp->info;
73 struct fb_var_screeninfo *var = &info->var;
74
75 info->flags = FBINFO_DEFAULT;
76 info->fbops = &gfb_ops;
77 info->screen_base = gp->fb_base;
78 info->screen_size = gp->fb_size;
79
80 info->pseudo_palette = gp->pseudo_palette;
81
82 /* Fill fix common fields */
83 strlcpy(info->fix.id, "gfb", sizeof(info->fix.id));
84 info->fix.smem_start = gp->fb_base_phys;
85 info->fix.smem_len = gp->fb_size;
86 info->fix.type = FB_TYPE_PACKED_PIXELS;
87 if (gp->depth == 32 || gp->depth == 24)
88 info->fix.visual = FB_VISUAL_TRUECOLOR;
89 else
90 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
91
92 var->xres = gp->width;
93 var->yres = gp->height;
94 var->xres_virtual = var->xres;
95 var->yres_virtual = var->yres;
96 var->bits_per_pixel = gp->depth;
97
98 var->red.offset = 0;
99 var->red.length = 8;
100 var->green.offset = 8;
101 var->green.length = 8;
102 var->blue.offset = 16;
103 var->blue.length = 8;
104 var->transp.offset = 0;
105 var->transp.length = 0;
106
107 if (fb_alloc_cmap(&info->cmap, 256, 0)) {
108 printk(KERN_ERR "gfb: Cannot allocate color map.\n");
109 return -ENOMEM;
110 }
111
112 return 0;
113}
114
115static int __devinit gfb_probe(struct of_device *op,
116 const struct of_device_id *match)
117{
118 struct device_node *dp = op->node;
119 struct fb_info *info;
120 struct gfb_info *gp;
121 int err;
122
123 info = framebuffer_alloc(sizeof(struct gfb_info), &op->dev);
124 if (!info) {
125 printk(KERN_ERR "gfb: Cannot allocate fb_info\n");
126 err = -ENOMEM;
127 goto err_out;
128 }
129
130 gp = info->par;
131 gp->info = info;
132 gp->of_node = dp;
133
134 gp->fb_base_phys = op->resource[6].start;
135
136 err = gfb_get_props(gp);
137 if (err)
138 goto err_release_fb;
139
140 /* Framebuffer length is the same regardless of resolution. */
141 info->fix.line_length = 16384;
142 gp->fb_size = info->fix.line_length * gp->height;
143
144 gp->fb_base = of_ioremap(&op->resource[6], 0,
145 gp->fb_size, "gfb fb");
146 if (!gp->fb_base)
147 goto err_release_fb;
148
149 err = gfb_set_fbinfo(gp);
150 if (err)
151 goto err_unmap_fb;
152
153 printk("gfb: Found device at %s\n", dp->full_name);
154
155 err = register_framebuffer(info);
156 if (err < 0) {
157 printk(KERN_ERR "gfb: Could not register framebuffer %s\n",
158 dp->full_name);
159 goto err_unmap_fb;
160 }
161
162 dev_set_drvdata(&op->dev, info);
163
164 return 0;
165
166err_unmap_fb:
167 of_iounmap(&op->resource[6], gp->fb_base, gp->fb_size);
168
169err_release_fb:
170 framebuffer_release(info);
171
172err_out:
173 return err;
174}
175
176static int __devexit gfb_remove(struct of_device *op)
177{
178 struct fb_info *info = dev_get_drvdata(&op->dev);
179 struct gfb_info *gp = info->par;
180
181 unregister_framebuffer(info);
182
183 iounmap(gp->fb_base);
184
185 of_iounmap(&op->resource[6], gp->fb_base, gp->fb_size);
186
187 framebuffer_release(info);
188
189 dev_set_drvdata(&op->dev, NULL);
190
191 return 0;
192}
193
194static const struct of_device_id gfb_match[] = {
195 {
196 .name = "SUNW,gfb",
197 },
198 {},
199};
200MODULE_DEVICE_TABLE(of, ffb_match);
201
202static struct of_platform_driver gfb_driver = {
203 .name = "gfb",
204 .match_table = gfb_match,
205 .probe = gfb_probe,
206 .remove = __devexit_p(gfb_remove),
207};
208
209static int __init gfb_init(void)
210{
211 if (fb_get_options("gfb", NULL))
212 return -ENODEV;
213
214 return of_register_driver(&gfb_driver, &of_bus_type);
215}
216
217static void __exit gfb_exit(void)
218{
219 of_unregister_driver(&gfb_driver);
220}
221
222module_init(gfb_init);
223module_exit(gfb_exit);
224
225MODULE_DESCRIPTION("framebuffer driver for Sun XVR-1000 graphics");
226MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
227MODULE_VERSION("1.0");
228MODULE_LICENSE("GPL");
diff --git a/drivers/video/vesafb.c b/drivers/video/vesafb.c
index bd37ee1f6a25..ef4128c8e57a 100644
--- a/drivers/video/vesafb.c
+++ b/drivers/video/vesafb.c
@@ -226,7 +226,7 @@ static int __init vesafb_setup(char *options)
226 return 0; 226 return 0;
227} 227}
228 228
229static int __init vesafb_probe(struct platform_device *dev) 229static int __devinit vesafb_probe(struct platform_device *dev)
230{ 230{
231 struct fb_info *info; 231 struct fb_info *info;
232 int i, err; 232 int i, err;
diff --git a/drivers/video/vfb.c b/drivers/video/vfb.c
index 050d432c7d95..b8ab995fbda7 100644
--- a/drivers/video/vfb.c
+++ b/drivers/video/vfb.c
@@ -479,7 +479,7 @@ static int __init vfb_setup(char *options)
479 * Initialisation 479 * Initialisation
480 */ 480 */
481 481
482static int __init vfb_probe(struct platform_device *dev) 482static int __devinit vfb_probe(struct platform_device *dev)
483{ 483{
484 struct fb_info *info; 484 struct fb_info *info;
485 int retval = -ENOMEM; 485 int retval = -ENOMEM;
diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c
index 5b2938903ac2..76d8dae5b1bb 100644
--- a/drivers/video/vga16fb.c
+++ b/drivers/video/vga16fb.c
@@ -1293,7 +1293,7 @@ static int vga16fb_setup(char *options)
1293} 1293}
1294#endif 1294#endif
1295 1295
1296static int __init vga16fb_probe(struct platform_device *dev) 1296static int __devinit vga16fb_probe(struct platform_device *dev)
1297{ 1297{
1298 struct fb_info *info; 1298 struct fb_info *info;
1299 struct vga16fb_par *par; 1299 struct vga16fb_par *par;
diff --git a/drivers/video/via/Makefile b/drivers/video/via/Makefile
index e533b4b6aba4..eeed238ad6a2 100644
--- a/drivers/video/via/Makefile
+++ b/drivers/video/via/Makefile
@@ -4,4 +4,4 @@
4 4
5obj-$(CONFIG_FB_VIA) += viafb.o 5obj-$(CONFIG_FB_VIA) += viafb.o
6 6
7viafb-y :=viafbdev.o hw.o iface.o via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o 7viafb-y :=viafbdev.o hw.o via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o
diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h
index 474f428aea92..8c06bd3c0b4d 100644
--- a/drivers/video/via/chip.h
+++ b/drivers/video/via/chip.h
@@ -107,7 +107,6 @@
107struct tmds_chip_information { 107struct tmds_chip_information {
108 int tmds_chip_name; 108 int tmds_chip_name;
109 int tmds_chip_slave_addr; 109 int tmds_chip_slave_addr;
110 int dvi_panel_id;
111 int data_mode; 110 int data_mode;
112 int output_interface; 111 int output_interface;
113 int i2c_port; 112 int i2c_port;
@@ -142,14 +141,9 @@ struct tmds_setting_information {
142 int iga_path; 141 int iga_path;
143 int h_active; 142 int h_active;
144 int v_active; 143 int v_active;
145 int bpp;
146 int refresh_rate;
147 int get_dvi_size_method;
148 int max_pixel_clock; 144 int max_pixel_clock;
149 int dvi_panel_size; 145 int max_hres;
150 int dvi_panel_hres; 146 int max_vres;
151 int dvi_panel_vres;
152 int native_size;
153}; 147};
154 148
155struct lvds_setting_information { 149struct lvds_setting_information {
@@ -160,7 +154,6 @@ struct lvds_setting_information {
160 int refresh_rate; 154 int refresh_rate;
161 int get_lcd_size_method; 155 int get_lcd_size_method;
162 int lcd_panel_id; 156 int lcd_panel_id;
163 int lcd_panel_size;
164 int lcd_panel_hres; 157 int lcd_panel_hres;
165 int lcd_panel_vres; 158 int lcd_panel_vres;
166 int display_method; 159 int display_method;
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index 67b36932212b..abe59b8c7a05 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -23,11 +23,10 @@
23static void tmds_register_write(int index, u8 data); 23static void tmds_register_write(int index, u8 data);
24static int tmds_register_read(int index); 24static int tmds_register_read(int index);
25static int tmds_register_read_bytes(int index, u8 *buff, int buff_len); 25static int tmds_register_read_bytes(int index, u8 *buff, int buff_len);
26static int check_reduce_blanking_mode(int mode_index, 26static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
27 int refresh_rate); 27 *tmds_chip, struct tmds_setting_information *tmds_setting);
28static int dvi_get_panel_size_from_DDCv1(void); 28static void dvi_get_panel_size_from_DDCv2(struct tmds_chip_information
29static int dvi_get_panel_size_from_DDCv2(void); 29 *tmds_chip, struct tmds_setting_information *tmds_setting);
30static unsigned char dvi_get_panel_info(void);
31static int viafb_dvi_query_EDID(void); 30static int viafb_dvi_query_EDID(void);
32 31
33static int check_tmds_chip(int device_id_subaddr, int device_id) 32static int check_tmds_chip(int device_id_subaddr, int device_id)
@@ -38,23 +37,24 @@ static int check_tmds_chip(int device_id_subaddr, int device_id)
38 return FAIL; 37 return FAIL;
39} 38}
40 39
41void viafb_init_dvi_size(void) 40void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
41 struct tmds_setting_information *tmds_setting)
42{ 42{
43 DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n"); 43 DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n");
44 DEBUG_MSG(KERN_INFO
45 "viaparinfo->tmds_setting_info->get_dvi_size_method %d\n",
46 viaparinfo->tmds_setting_info->get_dvi_size_method);
47 44
48 switch (viaparinfo->tmds_setting_info->get_dvi_size_method) { 45 viafb_dvi_sense();
49 case GET_DVI_SIZE_BY_SYSTEM_BIOS: 46 switch (viafb_dvi_query_EDID()) {
47 case 1:
48 dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting);
50 break; 49 break;
51 case GET_DVI_SZIE_BY_HW_STRAPPING: 50 case 2:
51 dvi_get_panel_size_from_DDCv2(tmds_chip, tmds_setting);
52 break; 52 break;
53 case GET_DVI_SIZE_BY_VGA_BIOS:
54 default: 53 default:
55 dvi_get_panel_info(); 54 printk(KERN_WARNING "viafb_init_dvi_size: DVI panel size undetected!\n");
56 break; 55 break;
57 } 56 }
57
58 return; 58 return;
59} 59}
60 60
@@ -189,42 +189,14 @@ static int tmds_register_read_bytes(int index, u8 *buff, int buff_len)
189 return 0; 189 return 0;
190} 190}
191 191
192static int check_reduce_blanking_mode(int mode_index,
193 int refresh_rate)
194{
195 if (refresh_rate != 60)
196 return false;
197
198 switch (mode_index) {
199 /* Following modes have reduce blanking mode. */
200 case VIA_RES_1360X768:
201 case VIA_RES_1400X1050:
202 case VIA_RES_1440X900:
203 case VIA_RES_1600X900:
204 case VIA_RES_1680X1050:
205 case VIA_RES_1920X1080:
206 case VIA_RES_1920X1200:
207 break;
208
209 default:
210 DEBUG_MSG(KERN_INFO
211 "This dvi mode %d have no reduce blanking mode!\n",
212 mode_index);
213 return false;
214 }
215
216 return true;
217}
218
219/* DVI Set Mode */ 192/* DVI Set Mode */
220void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga) 193void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp,
194 int set_iga)
221{ 195{
222 struct VideoModeTable *videoMode = NULL; 196 struct VideoModeTable *rb_mode;
223 struct crt_mode_table *pDviTiming; 197 struct crt_mode_table *pDviTiming;
224 unsigned long desirePixelClock, maxPixelClock; 198 unsigned long desirePixelClock, maxPixelClock;
225 int status = 0; 199 pDviTiming = mode->crtc;
226 videoMode = viafb_get_modetbl_pointer(video_index);
227 pDviTiming = videoMode->crtc;
228 desirePixelClock = pDviTiming->clk / 1000000; 200 desirePixelClock = pDviTiming->clk / 1000000;
229 maxPixelClock = (unsigned long)viaparinfo-> 201 maxPixelClock = (unsigned long)viaparinfo->
230 tmds_setting_info->max_pixel_clock; 202 tmds_setting_info->max_pixel_clock;
@@ -232,20 +204,14 @@ void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga)
232 DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n"); 204 DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n");
233 205
234 if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) { 206 if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) {
235 /*Check if reduce-blanking mode is exist */ 207 rb_mode = viafb_get_rb_mode(mode->crtc[0].crtc.hor_addr,
236 status = 208 mode->crtc[0].crtc.ver_addr);
237 check_reduce_blanking_mode(video_index, 209 if (rb_mode) {
238 pDviTiming->refresh_rate); 210 mode = rb_mode;
239 if (status) { 211 pDviTiming = rb_mode->crtc;
240 video_index += 100; /*Use reduce-blanking mode */
241 videoMode = viafb_get_modetbl_pointer(video_index);
242 pDviTiming = videoMode->crtc;
243 DEBUG_MSG(KERN_INFO
244 "DVI use reduce blanking mode %d!!\n",
245 video_index);
246 } 212 }
247 } 213 }
248 viafb_fill_crtc_timing(pDviTiming, video_index, mode_bpp / 8, set_iga); 214 viafb_fill_crtc_timing(pDviTiming, mode, mode_bpp / 8, set_iga);
249 viafb_set_output_path(DEVICE_DVI, set_iga, 215 viafb_set_output_path(DEVICE_DVI, set_iga,
250 viaparinfo->chip_info->tmds_chip_info.output_interface); 216 viaparinfo->chip_info->tmds_chip_info.output_interface);
251} 217}
@@ -350,25 +316,18 @@ static int viafb_dvi_query_EDID(void)
350 return false; 316 return false;
351} 317}
352 318
353/* 319/* Get Panel Size Using EDID1 Table */
354 * 320static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
355 * int dvi_get_panel_size_from_DDCv1(void) 321 *tmds_chip, struct tmds_setting_information *tmds_setting)
356 *
357 * - Get Panel Size Using EDID1 Table
358 *
359 * Return Type: int
360 *
361 */
362static int dvi_get_panel_size_from_DDCv1(void)
363{ 322{
364 int i, max_h = 0, max_v = 0, tmp, restore; 323 int i, max_h = 0, tmp, restore;
365 unsigned char rData; 324 unsigned char rData;
366 unsigned char EDID_DATA[18]; 325 unsigned char EDID_DATA[18];
367 326
368 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n"); 327 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n");
369 328
370 restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr; 329 restore = tmds_chip->tmds_chip_slave_addr;
371 viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0; 330 tmds_chip->tmds_chip_slave_addr = 0xA0;
372 331
373 rData = tmds_register_read(0x23); 332 rData = tmds_register_read(0x23);
374 if (rData & 0x3C) 333 if (rData & 0x3C)
@@ -414,8 +373,8 @@ static int dvi_get_panel_size_from_DDCv1(void)
414 /* The first two byte must be zero. */ 373 /* The first two byte must be zero. */
415 if (EDID_DATA[3] == 0xFD) { 374 if (EDID_DATA[3] == 0xFD) {
416 /* To get max pixel clock. */ 375 /* To get max pixel clock. */
417 viaparinfo->tmds_setting_info-> 376 tmds_setting->max_pixel_clock =
418 max_pixel_clock = EDID_DATA[9] * 10; 377 EDID_DATA[9] * 10;
419 } 378 }
420 } 379 }
421 break; 380 break;
@@ -425,154 +384,88 @@ static int dvi_get_panel_size_from_DDCv1(void)
425 } 384 }
426 } 385 }
427 386
387 tmds_setting->max_hres = max_h;
428 switch (max_h) { 388 switch (max_h) {
429 case 640: 389 case 640:
430 viaparinfo->tmds_setting_info->dvi_panel_size = 390 tmds_setting->max_vres = 480;
431 VIA_RES_640X480;
432 break; 391 break;
433 case 800: 392 case 800:
434 viaparinfo->tmds_setting_info->dvi_panel_size = 393 tmds_setting->max_vres = 600;
435 VIA_RES_800X600;
436 break; 394 break;
437 case 1024: 395 case 1024:
438 viaparinfo->tmds_setting_info->dvi_panel_size = 396 tmds_setting->max_vres = 768;
439 VIA_RES_1024X768;
440 break; 397 break;
441 case 1280: 398 case 1280:
442 viaparinfo->tmds_setting_info->dvi_panel_size = 399 tmds_setting->max_vres = 1024;
443 VIA_RES_1280X1024;
444 break; 400 break;
445 case 1400: 401 case 1400:
446 viaparinfo->tmds_setting_info->dvi_panel_size = 402 tmds_setting->max_vres = 1050;
447 VIA_RES_1400X1050;
448 break; 403 break;
449 case 1440: 404 case 1440:
450 viaparinfo->tmds_setting_info->dvi_panel_size = 405 tmds_setting->max_vres = 1050;
451 VIA_RES_1440X1050;
452 break; 406 break;
453 case 1600: 407 case 1600:
454 viaparinfo->tmds_setting_info->dvi_panel_size = 408 tmds_setting->max_vres = 1200;
455 VIA_RES_1600X1200;
456 break; 409 break;
457 case 1920: 410 case 1920:
458 if (max_v == 1200) { 411 tmds_setting->max_vres = 1080;
459 viaparinfo->tmds_setting_info->dvi_panel_size =
460 VIA_RES_1920X1200;
461 } else {
462 viaparinfo->tmds_setting_info->dvi_panel_size =
463 VIA_RES_1920X1080;
464 }
465
466 break; 412 break;
467 default: 413 default:
468 viaparinfo->tmds_setting_info->dvi_panel_size = 414 DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d ! "
469 VIA_RES_1024X768; 415 "set default panel size.\n", max_h);
470 DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d !\
471 set default panel size.\n", max_h);
472 break; 416 break;
473 } 417 }
474 418
475 DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n", 419 DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n",
476 viaparinfo->tmds_setting_info->max_pixel_clock); 420 tmds_setting->max_pixel_clock);
477 viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore; 421 tmds_chip->tmds_chip_slave_addr = restore;
478 return viaparinfo->tmds_setting_info->dvi_panel_size;
479} 422}
480 423
481/* 424/* Get Panel Size Using EDID2 Table */
482 * 425static void dvi_get_panel_size_from_DDCv2(struct tmds_chip_information
483 * int dvi_get_panel_size_from_DDCv2(void) 426 *tmds_chip, struct tmds_setting_information *tmds_setting)
484 *
485 * - Get Panel Size Using EDID2 Table
486 *
487 * Return Type: int
488 *
489 */
490static int dvi_get_panel_size_from_DDCv2(void)
491{ 427{
492 int HSize = 0, restore; 428 int restore;
493 unsigned char R_Buffer[2]; 429 unsigned char R_Buffer[2];
494 430
495 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n"); 431 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n");
496 432
497 restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr; 433 restore = tmds_chip->tmds_chip_slave_addr;
498 viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA2; 434 tmds_chip->tmds_chip_slave_addr = 0xA2;
499 435
500 /* Horizontal: 0x76, 0x77 */ 436 /* Horizontal: 0x76, 0x77 */
501 tmds_register_read_bytes(0x76, R_Buffer, 2); 437 tmds_register_read_bytes(0x76, R_Buffer, 2);
502 HSize = R_Buffer[0]; 438 tmds_setting->max_hres = R_Buffer[0] + (R_Buffer[1] << 8);
503 HSize += R_Buffer[1] << 8;
504 439
505 switch (HSize) { 440 switch (tmds_setting->max_hres) {
506 case 640: 441 case 640:
507 viaparinfo->tmds_setting_info->dvi_panel_size = 442 tmds_setting->max_vres = 480;
508 VIA_RES_640X480;
509 break; 443 break;
510 case 800: 444 case 800:
511 viaparinfo->tmds_setting_info->dvi_panel_size = 445 tmds_setting->max_vres = 600;
512 VIA_RES_800X600;
513 break; 446 break;
514 case 1024: 447 case 1024:
515 viaparinfo->tmds_setting_info->dvi_panel_size = 448 tmds_setting->max_vres = 768;
516 VIA_RES_1024X768;
517 break; 449 break;
518 case 1280: 450 case 1280:
519 viaparinfo->tmds_setting_info->dvi_panel_size = 451 tmds_setting->max_vres = 1024;
520 VIA_RES_1280X1024;
521 break; 452 break;
522 case 1400: 453 case 1400:
523 viaparinfo->tmds_setting_info->dvi_panel_size = 454 tmds_setting->max_vres = 1050;
524 VIA_RES_1400X1050;
525 break; 455 break;
526 case 1440: 456 case 1440:
527 viaparinfo->tmds_setting_info->dvi_panel_size = 457 tmds_setting->max_vres = 1050;
528 VIA_RES_1440X1050;
529 break; 458 break;
530 case 1600: 459 case 1600:
531 viaparinfo->tmds_setting_info->dvi_panel_size = 460 tmds_setting->max_vres = 1200;
532 VIA_RES_1600X1200;
533 break;
534 default:
535 viaparinfo->tmds_setting_info->dvi_panel_size =
536 VIA_RES_1024X768;
537 DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d!\
538 set default panel size.\n", HSize);
539 break;
540 }
541
542 viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
543 return viaparinfo->tmds_setting_info->dvi_panel_size;
544}
545
546/*
547 *
548 * unsigned char dvi_get_panel_info(void)
549 *
550 * - Get Panel Size
551 *
552 * Return Type: unsigned char
553 */
554static unsigned char dvi_get_panel_info(void)
555{
556 unsigned char dvipanelsize;
557 DEBUG_MSG(KERN_INFO "dvi_get_panel_info! \n");
558
559 viafb_dvi_sense();
560 switch (viafb_dvi_query_EDID()) {
561 case 1:
562 dvi_get_panel_size_from_DDCv1();
563 break;
564 case 2:
565 dvi_get_panel_size_from_DDCv2();
566 break; 461 break;
567 default: 462 default:
463 DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d! "
464 "set default panel size.\n", tmds_setting->max_hres);
568 break; 465 break;
569 } 466 }
570 467
571 DEBUG_MSG(KERN_INFO "dvi panel size is %2d \n", 468 tmds_chip->tmds_chip_slave_addr = restore;
572 viaparinfo->tmds_setting_info->dvi_panel_size);
573 dvipanelsize = (unsigned char)(viaparinfo->
574 tmds_setting_info->dvi_panel_size);
575 return dvipanelsize;
576} 469}
577 470
578/* If Disable DVI, turn off pad */ 471/* If Disable DVI, turn off pad */
diff --git a/drivers/video/via/dvi.h b/drivers/video/via/dvi.h
index e1ec37fb0dc3..0dffcfd395f3 100644
--- a/drivers/video/via/dvi.h
+++ b/drivers/video/via/dvi.h
@@ -53,12 +53,13 @@
53#define DEV_CONNECT_DVI 0x01 53#define DEV_CONNECT_DVI 0x01
54#define DEV_CONNECT_HDMI 0x02 54#define DEV_CONNECT_HDMI 0x02
55 55
56struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index);
57int viafb_dvi_sense(void); 56int viafb_dvi_sense(void);
58void viafb_dvi_disable(void); 57void viafb_dvi_disable(void);
59void viafb_dvi_enable(void); 58void viafb_dvi_enable(void);
60int viafb_tmds_trasmitter_identify(void); 59int viafb_tmds_trasmitter_identify(void);
61void viafb_init_dvi_size(void); 60void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
62void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga); 61 struct tmds_setting_information *tmds_setting);
62void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp,
63 int set_iga);
63 64
64#endif /* __DVI_H__ */ 65#endif /* __DVI_H__ */
diff --git a/drivers/video/via/global.c b/drivers/video/via/global.c
index b675cdbb03ad..1ee511b73307 100644
--- a/drivers/video/via/global.c
+++ b/drivers/video/via/global.c
@@ -23,15 +23,12 @@ int viafb_platform_epia_dvi = STATE_OFF;
23int viafb_device_lcd_dualedge = STATE_OFF; 23int viafb_device_lcd_dualedge = STATE_OFF;
24int viafb_bus_width = 12; 24int viafb_bus_width = 12;
25int viafb_display_hardware_layout = HW_LAYOUT_LCD_DVI; 25int viafb_display_hardware_layout = HW_LAYOUT_LCD_DVI;
26int viafb_memsize;
27int viafb_DeviceStatus = CRT_Device; 26int viafb_DeviceStatus = CRT_Device;
28int viafb_hotplug; 27int viafb_hotplug;
29int viafb_refresh = 60; 28int viafb_refresh = 60;
30int viafb_refresh1 = 60; 29int viafb_refresh1 = 60;
31int viafb_lcd_dsp_method = LCD_EXPANDSION; 30int viafb_lcd_dsp_method = LCD_EXPANDSION;
32int viafb_lcd_mode = LCD_OPENLDI; 31int viafb_lcd_mode = LCD_OPENLDI;
33int viafb_bpp = 32;
34int viafb_bpp1 = 32;
35int viafb_CRT_ON = 1; 32int viafb_CRT_ON = 1;
36int viafb_DVI_ON; 33int viafb_DVI_ON;
37int viafb_LCD_ON ; 34int viafb_LCD_ON ;
@@ -42,8 +39,6 @@ int viafb_hotplug_Xres = 640;
42int viafb_hotplug_Yres = 480; 39int viafb_hotplug_Yres = 480;
43int viafb_hotplug_bpp = 32; 40int viafb_hotplug_bpp = 32;
44int viafb_hotplug_refresh = 60; 41int viafb_hotplug_refresh = 60;
45unsigned int viafb_second_offset;
46int viafb_second_size;
47int viafb_primary_dev = None_Device; 42int viafb_primary_dev = None_Device;
48unsigned int viafb_second_xres = 640; 43unsigned int viafb_second_xres = 640;
49unsigned int viafb_second_yres = 480; 44unsigned int viafb_second_yres = 480;
diff --git a/drivers/video/via/global.h b/drivers/video/via/global.h
index d69d0ca99c2f..8d95d5fd1388 100644
--- a/drivers/video/via/global.h
+++ b/drivers/video/via/global.h
@@ -35,7 +35,6 @@
35 35
36#include "debug.h" 36#include "debug.h"
37 37
38#include "iface.h"
39#include "viafbdev.h" 38#include "viafbdev.h"
40#include "chip.h" 39#include "chip.h"
41#include "accel.h" 40#include "accel.h"
@@ -68,8 +67,6 @@ extern int viafb_refresh;
68extern int viafb_refresh1; 67extern int viafb_refresh1;
69extern int viafb_lcd_dsp_method; 68extern int viafb_lcd_dsp_method;
70extern int viafb_lcd_mode; 69extern int viafb_lcd_mode;
71extern int viafb_bpp;
72extern int viafb_bpp1;
73 70
74extern int viafb_CRT_ON; 71extern int viafb_CRT_ON;
75extern int viafb_hotplug_Xres; 72extern int viafb_hotplug_Xres;
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 3e083ff67ae2..f2583b1b527f 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -524,7 +524,6 @@ static void dvi_patch_skew_dvp1(void);
524static void dvi_patch_skew_dvp_low(void); 524static void dvi_patch_skew_dvp_low(void);
525static void set_dvi_output_path(int set_iga, int output_interface); 525static void set_dvi_output_path(int set_iga, int output_interface);
526static void set_lcd_output_path(int set_iga, int output_interface); 526static void set_lcd_output_path(int set_iga, int output_interface);
527static int search_mode_setting(int ModeInfoIndex);
528static void load_fix_bit_crtc_reg(void); 527static void load_fix_bit_crtc_reg(void);
529static void init_gfx_chip_info(struct pci_dev *pdev, 528static void init_gfx_chip_info(struct pci_dev *pdev,
530 const struct pci_device_id *pdi); 529 const struct pci_device_id *pdi);
@@ -686,6 +685,84 @@ void viafb_set_secondary_pitch(u32 pitch)
686 viafb_write_reg_mask(0x71, VIACR, (pitch >> (10 - 7)) & 0x80, 0x80); 685 viafb_write_reg_mask(0x71, VIACR, (pitch >> (10 - 7)) & 0x80, 0x80);
687} 686}
688 687
688void viafb_set_primary_color_depth(u8 depth)
689{
690 u8 value;
691
692 DEBUG_MSG(KERN_DEBUG "viafb_set_primary_color_depth(%d)\n", depth);
693 switch (depth) {
694 case 8:
695 value = 0x00;
696 break;
697 case 15:
698 value = 0x04;
699 break;
700 case 16:
701 value = 0x14;
702 break;
703 case 24:
704 value = 0x0C;
705 break;
706 case 30:
707 value = 0x08;
708 break;
709 default:
710 printk(KERN_WARNING "viafb_set_primary_color_depth: "
711 "Unsupported depth: %d\n", depth);
712 return;
713 }
714
715 viafb_write_reg_mask(0x15, VIASR, value, 0x1C);
716}
717
718void viafb_set_secondary_color_depth(u8 depth)
719{
720 u8 value;
721
722 DEBUG_MSG(KERN_DEBUG "viafb_set_secondary_color_depth(%d)\n", depth);
723 switch (depth) {
724 case 8:
725 value = 0x00;
726 break;
727 case 16:
728 value = 0x40;
729 break;
730 case 24:
731 value = 0xC0;
732 break;
733 case 30:
734 value = 0x80;
735 break;
736 default:
737 printk(KERN_WARNING "viafb_set_secondary_color_depth: "
738 "Unsupported depth: %d\n", depth);
739 return;
740 }
741
742 viafb_write_reg_mask(0x67, VIACR, value, 0xC0);
743}
744
745static void set_color_register(u8 index, u8 red, u8 green, u8 blue)
746{
747 outb(0xFF, 0x3C6); /* bit mask of palette */
748 outb(index, 0x3C8);
749 outb(red, 0x3C9);
750 outb(green, 0x3C9);
751 outb(blue, 0x3C9);
752}
753
754void viafb_set_primary_color_register(u8 index, u8 red, u8 green, u8 blue)
755{
756 viafb_write_reg_mask(0x1A, VIASR, 0x00, 0x01);
757 set_color_register(index, red, green, blue);
758}
759
760void viafb_set_secondary_color_register(u8 index, u8 red, u8 green, u8 blue)
761{
762 viafb_write_reg_mask(0x1A, VIASR, 0x01, 0x01);
763 set_color_register(index, red, green, blue);
764}
765
689void viafb_set_output_path(int device, int set_iga, int output_interface) 766void viafb_set_output_path(int device, int set_iga, int output_interface)
690{ 767{
691 switch (device) { 768 switch (device) {
@@ -710,11 +787,8 @@ static void set_crt_output_path(int set_iga)
710 viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6); 787 viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6);
711 break; 788 break;
712 case IGA2: 789 case IGA2:
713 case IGA1_IGA2:
714 viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7); 790 viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7);
715 viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6); 791 viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6);
716 if (set_iga == IGA1_IGA2)
717 viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3);
718 break; 792 break;
719 } 793 }
720} 794}
@@ -904,13 +978,6 @@ static void set_lcd_output_path(int set_iga, int output_interface)
904 978
905 enable_second_display_channel(); 979 enable_second_display_channel();
906 break; 980 break;
907
908 case IGA1_IGA2:
909 viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3);
910 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
911
912 disable_second_display_channel();
913 break;
914 } 981 }
915 982
916 switch (output_interface) { 983 switch (output_interface) {
@@ -987,49 +1054,6 @@ static void set_lcd_output_path(int set_iga, int output_interface)
987 } 1054 }
988} 1055}
989 1056
990/* Search Mode Index */
991static int search_mode_setting(int ModeInfoIndex)
992{
993 int i = 0;
994
995 while ((i < NUM_TOTAL_MODETABLE) &&
996 (ModeInfoIndex != CLE266Modes[i].ModeIndex))
997 i++;
998 if (i >= NUM_TOTAL_MODETABLE)
999 i = 0;
1000 return i;
1001
1002}
1003
1004struct VideoModeTable *viafb_get_modetbl_pointer(int Index)
1005{
1006 struct VideoModeTable *TmpTbl = NULL;
1007 TmpTbl = &CLE266Modes[search_mode_setting(Index)];
1008 return TmpTbl;
1009}
1010
1011struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index)
1012{
1013 struct VideoModeTable *TmpTbl = NULL;
1014 int i = 0;
1015 while ((i < NUM_TOTAL_CEA_MODES) &&
1016 (Index != CEA_HDMI_Modes[i].ModeIndex))
1017 i++;
1018 if ((i < NUM_TOTAL_CEA_MODES))
1019 TmpTbl = &CEA_HDMI_Modes[i];
1020 else {
1021 /*Still use general timing if don't find CEA timing */
1022 i = 0;
1023 while ((i < NUM_TOTAL_MODETABLE) &&
1024 (Index != CLE266Modes[i].ModeIndex))
1025 i++;
1026 if (i >= NUM_TOTAL_MODETABLE)
1027 i = 0;
1028 TmpTbl = &CLE266Modes[i];
1029 }
1030 return TmpTbl;
1031}
1032
1033static void load_fix_bit_crtc_reg(void) 1057static void load_fix_bit_crtc_reg(void)
1034{ 1058{
1035 /* always set to 1 */ 1059 /* always set to 1 */
@@ -1121,15 +1145,13 @@ void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga)
1121 struct io_register *reg = NULL; 1145 struct io_register *reg = NULL;
1122 1146
1123 switch (set_iga) { 1147 switch (set_iga) {
1124 case IGA1_IGA2:
1125 case IGA1: 1148 case IGA1:
1126 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); 1149 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte);
1127 viafb_load_reg_num = fetch_count_reg. 1150 viafb_load_reg_num = fetch_count_reg.
1128 iga1_fetch_count_reg.reg_num; 1151 iga1_fetch_count_reg.reg_num;
1129 reg = fetch_count_reg.iga1_fetch_count_reg.reg; 1152 reg = fetch_count_reg.iga1_fetch_count_reg.reg;
1130 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); 1153 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
1131 if (set_iga == IGA1) 1154 break;
1132 break;
1133 case IGA2: 1155 case IGA2:
1134 reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); 1156 reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte);
1135 viafb_load_reg_num = fetch_count_reg. 1157 viafb_load_reg_num = fetch_count_reg.
@@ -1499,7 +1521,7 @@ void viafb_set_vclock(u32 CLK, int set_iga)
1499 /* H.W. Reset : ON */ 1521 /* H.W. Reset : ON */
1500 viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); 1522 viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
1501 1523
1502 if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) { 1524 if (set_iga == IGA1) {
1503 /* Change D,N FOR VCLK */ 1525 /* Change D,N FOR VCLK */
1504 switch (viaparinfo->chip_info->gfx_chip_name) { 1526 switch (viaparinfo->chip_info->gfx_chip_name) {
1505 case UNICHROME_CLE266: 1527 case UNICHROME_CLE266:
@@ -1528,7 +1550,7 @@ void viafb_set_vclock(u32 CLK, int set_iga)
1528 } 1550 }
1529 } 1551 }
1530 1552
1531 if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) { 1553 if (set_iga == IGA2) {
1532 /* Change D,N FOR LCK */ 1554 /* Change D,N FOR LCK */
1533 switch (viaparinfo->chip_info->gfx_chip_name) { 1555 switch (viaparinfo->chip_info->gfx_chip_name) {
1534 case UNICHROME_CLE266: 1556 case UNICHROME_CLE266:
@@ -1557,12 +1579,12 @@ void viafb_set_vclock(u32 CLK, int set_iga)
1557 viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); 1579 viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
1558 1580
1559 /* Reset PLL */ 1581 /* Reset PLL */
1560 if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) { 1582 if (set_iga == IGA1) {
1561 viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); 1583 viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
1562 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); 1584 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
1563 } 1585 }
1564 1586
1565 if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) { 1587 if (set_iga == IGA2) {
1566 viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0); 1588 viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0);
1567 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0); 1589 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0);
1568 } 1590 }
@@ -1805,47 +1827,15 @@ void viafb_load_crtc_timing(struct display_timing device_timing,
1805 viafb_lock_crt(); 1827 viafb_lock_crt();
1806} 1828}
1807 1829
1808void viafb_set_color_depth(int bpp_byte, int set_iga)
1809{
1810 if (set_iga == IGA1) {
1811 switch (bpp_byte) {
1812 case MODE_8BPP:
1813 viafb_write_reg_mask(SR15, VIASR, 0x22, 0x7E);
1814 break;
1815 case MODE_16BPP:
1816 viafb_write_reg_mask(SR15, VIASR, 0xB6, 0xFE);
1817 break;
1818 case MODE_32BPP:
1819 viafb_write_reg_mask(SR15, VIASR, 0xAE, 0xFE);
1820 break;
1821 }
1822 } else {
1823 switch (bpp_byte) {
1824 case MODE_8BPP:
1825 viafb_write_reg_mask(CR67, VIACR, 0x00, BIT6 + BIT7);
1826 break;
1827 case MODE_16BPP:
1828 viafb_write_reg_mask(CR67, VIACR, 0x40, BIT6 + BIT7);
1829 break;
1830 case MODE_32BPP:
1831 viafb_write_reg_mask(CR67, VIACR, 0xC0, BIT6 + BIT7);
1832 break;
1833 }
1834 }
1835}
1836
1837void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, 1830void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1838 int mode_index, int bpp_byte, int set_iga) 1831 struct VideoModeTable *video_mode, int bpp_byte, int set_iga)
1839{ 1832{
1840 struct VideoModeTable *video_mode;
1841 struct display_timing crt_reg; 1833 struct display_timing crt_reg;
1842 int i; 1834 int i;
1843 int index = 0; 1835 int index = 0;
1844 int h_addr, v_addr; 1836 int h_addr, v_addr;
1845 u32 pll_D_N; 1837 u32 pll_D_N;
1846 1838
1847 video_mode = &CLE266Modes[search_mode_setting(mode_index)];
1848
1849 for (i = 0; i < video_mode->mode_array; i++) { 1839 for (i = 0; i < video_mode->mode_array; i++) {
1850 index = i; 1840 index = i;
1851 1841
@@ -1858,8 +1848,10 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1858 1848
1859 /* Mode 640x480 has border, but LCD/DFP didn't have border. */ 1849 /* Mode 640x480 has border, but LCD/DFP didn't have border. */
1860 /* So we would delete border. */ 1850 /* So we would delete border. */
1861 if ((viafb_LCD_ON | viafb_DVI_ON) && (mode_index == VIA_RES_640X480) 1851 if ((viafb_LCD_ON | viafb_DVI_ON)
1862 && (viaparinfo->crt_setting_info->refresh_rate == 60)) { 1852 && video_mode->crtc[0].crtc.hor_addr == 640
1853 && video_mode->crtc[0].crtc.ver_addr == 480
1854 && viaparinfo->crt_setting_info->refresh_rate == 60) {
1863 /* The border is 8 pixels. */ 1855 /* The border is 8 pixels. */
1864 crt_reg.hor_blank_start = crt_reg.hor_blank_start - 8; 1856 crt_reg.hor_blank_start = crt_reg.hor_blank_start - 8;
1865 1857
@@ -1912,9 +1904,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1912 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) 1904 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
1913 viafb_load_FIFO_reg(set_iga, h_addr, v_addr); 1905 viafb_load_FIFO_reg(set_iga, h_addr, v_addr);
1914 1906
1915 /* load SR Register About Memory and Color part */
1916 viafb_set_color_depth(bpp_byte, set_iga);
1917
1918 pll_D_N = viafb_get_clk_value(crt_table[index].clk); 1907 pll_D_N = viafb_get_clk_value(crt_table[index].clk);
1919 DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N); 1908 DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N);
1920 viafb_set_vclock(pll_D_N, set_iga); 1909 viafb_set_vclock(pll_D_N, set_iga);
@@ -1956,9 +1945,6 @@ void viafb_update_device_setting(int hres, int vres,
1956 1945
1957 viaparinfo->tmds_setting_info->h_active = hres; 1946 viaparinfo->tmds_setting_info->h_active = hres;
1958 viaparinfo->tmds_setting_info->v_active = vres; 1947 viaparinfo->tmds_setting_info->v_active = vres;
1959 viaparinfo->tmds_setting_info->bpp = bpp;
1960 viaparinfo->tmds_setting_info->refresh_rate =
1961 vmode_refresh;
1962 1948
1963 viaparinfo->lvds_setting_info->h_active = hres; 1949 viaparinfo->lvds_setting_info->h_active = hres;
1964 viaparinfo->lvds_setting_info->v_active = vres; 1950 viaparinfo->lvds_setting_info->v_active = vres;
@@ -1975,9 +1961,6 @@ void viafb_update_device_setting(int hres, int vres,
1975 if (viaparinfo->tmds_setting_info->iga_path == IGA2) { 1961 if (viaparinfo->tmds_setting_info->iga_path == IGA2) {
1976 viaparinfo->tmds_setting_info->h_active = hres; 1962 viaparinfo->tmds_setting_info->h_active = hres;
1977 viaparinfo->tmds_setting_info->v_active = vres; 1963 viaparinfo->tmds_setting_info->v_active = vres;
1978 viaparinfo->tmds_setting_info->bpp = bpp;
1979 viaparinfo->tmds_setting_info->refresh_rate =
1980 vmode_refresh;
1981 } 1964 }
1982 1965
1983 if (viaparinfo->lvds_setting_info->iga_path == IGA2) { 1966 if (viaparinfo->lvds_setting_info->iga_path == IGA2) {
@@ -2076,9 +2059,8 @@ static void init_tmds_chip_info(void)
2076 2059
2077 DEBUG_MSG(KERN_INFO "TMDS Chip = %d\n", 2060 DEBUG_MSG(KERN_INFO "TMDS Chip = %d\n",
2078 viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); 2061 viaparinfo->chip_info->tmds_chip_info.tmds_chip_name);
2079 viaparinfo->tmds_setting_info->get_dvi_size_method = 2062 viafb_init_dvi_size(&viaparinfo->shared->chip_info.tmds_chip_info,
2080 GET_DVI_SIZE_BY_VGA_BIOS; 2063 &viaparinfo->shared->tmds_setting_info);
2081 viafb_init_dvi_size();
2082} 2064}
2083 2065
2084static void init_lvds_chip_info(void) 2066static void init_lvds_chip_info(void)
@@ -2195,28 +2177,19 @@ static void set_display_channel(void)
2195 } 2177 }
2196} 2178}
2197 2179
2198int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp, 2180int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2199 int vmode_index1, int hor_res1, int ver_res1, int video_bpp1) 2181 struct VideoModeTable *vmode_tbl1, int video_bpp1)
2200{ 2182{
2201 int i, j; 2183 int i, j;
2202 int port; 2184 int port;
2203 u8 value, index, mask; 2185 u8 value, index, mask;
2204 struct VideoModeTable *vmode_tbl;
2205 struct crt_mode_table *crt_timing; 2186 struct crt_mode_table *crt_timing;
2206 struct VideoModeTable *vmode_tbl1 = NULL;
2207 struct crt_mode_table *crt_timing1 = NULL; 2187 struct crt_mode_table *crt_timing1 = NULL;
2208 2188
2209 DEBUG_MSG(KERN_INFO "Set Mode!!\n");
2210 DEBUG_MSG(KERN_INFO
2211 "vmode_index=%d hor_res=%d ver_res=%d video_bpp=%d\n",
2212 vmode_index, hor_res, ver_res, video_bpp);
2213
2214 device_screen_off(); 2189 device_screen_off();
2215 vmode_tbl = &CLE266Modes[search_mode_setting(vmode_index)];
2216 crt_timing = vmode_tbl->crtc; 2190 crt_timing = vmode_tbl->crtc;
2217 2191
2218 if (viafb_SAMM_ON == 1) { 2192 if (viafb_SAMM_ON == 1) {
2219 vmode_tbl1 = &CLE266Modes[search_mode_setting(vmode_index1)];
2220 crt_timing1 = vmode_tbl1->crtc; 2193 crt_timing1 = vmode_tbl1->crtc;
2221 } 2194 }
2222 2195
@@ -2267,12 +2240,11 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2267 outb(VPIT.SR[i - 1], VIASR + 1); 2240 outb(VPIT.SR[i - 1], VIASR + 1);
2268 } 2241 }
2269 2242
2270 viafb_set_primary_address(0); 2243 viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2);
2271 viafb_set_secondary_address(viafb_SAMM_ON ? viafb_second_offset : 0);
2272 viafb_set_iga_path(); 2244 viafb_set_iga_path();
2273 2245
2274 /* Write CRTC */ 2246 /* Write CRTC */
2275 viafb_fill_crtc_timing(crt_timing, vmode_index, video_bpp / 8, IGA1); 2247 viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, IGA1);
2276 2248
2277 /* Write Graphic Controller */ 2249 /* Write Graphic Controller */
2278 for (i = 0; i < StdGR; i++) { 2250 for (i = 0; i < StdGR; i++) {
@@ -2292,65 +2264,25 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2292 2264
2293 /* Update Patch Register */ 2265 /* Update Patch Register */
2294 2266
2295 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) 2267 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266
2296 || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400)) { 2268 || viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400)
2297 for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) { 2269 && vmode_tbl->crtc[0].crtc.hor_addr == 1024
2298 if (res_patch_table[i].mode_index == vmode_index) { 2270 && vmode_tbl->crtc[0].crtc.ver_addr == 768) {
2299 for (j = 0; 2271 for (j = 0; j < res_patch_table[0].table_length; j++) {
2300 j < res_patch_table[i].table_length; j++) { 2272 index = res_patch_table[0].io_reg_table[j].index;
2301 index = 2273 port = res_patch_table[0].io_reg_table[j].port;
2302 res_patch_table[i]. 2274 value = res_patch_table[0].io_reg_table[j].value;
2303 io_reg_table[j].index; 2275 mask = res_patch_table[0].io_reg_table[j].mask;
2304 port = 2276 viafb_write_reg_mask(index, port, value, mask);
2305 res_patch_table[i].
2306 io_reg_table[j].port;
2307 value =
2308 res_patch_table[i].
2309 io_reg_table[j].value;
2310 mask =
2311 res_patch_table[i].
2312 io_reg_table[j].mask;
2313 viafb_write_reg_mask(index, port, value,
2314 mask);
2315 }
2316 }
2317 }
2318 }
2319
2320 if (viafb_SAMM_ON == 1) {
2321 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
2322 || (viaparinfo->chip_info->gfx_chip_name ==
2323 UNICHROME_K400)) {
2324 for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) {
2325 if (res_patch_table[i].mode_index ==
2326 vmode_index1) {
2327 for (j = 0;
2328 j <
2329 res_patch_table[i].
2330 table_length; j++) {
2331 index =
2332 res_patch_table[i].
2333 io_reg_table[j].index;
2334 port =
2335 res_patch_table[i].
2336 io_reg_table[j].port;
2337 value =
2338 res_patch_table[i].
2339 io_reg_table[j].value;
2340 mask =
2341 res_patch_table[i].
2342 io_reg_table[j].mask;
2343 viafb_write_reg_mask(index,
2344 port, value, mask);
2345 }
2346 }
2347 }
2348 } 2277 }
2349 } 2278 }
2350 2279
2351 viafb_set_primary_pitch(viafbinfo->fix.line_length); 2280 viafb_set_primary_pitch(viafbinfo->fix.line_length);
2352 viafb_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length 2281 viafb_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length
2353 : viafbinfo->fix.line_length); 2282 : viafbinfo->fix.line_length);
2283 viafb_set_primary_color_depth(viaparinfo->depth);
2284 viafb_set_secondary_color_depth(viafb_dual_fb ? viaparinfo1->depth
2285 : viaparinfo->depth);
2354 /* Update Refresh Rate Setting */ 2286 /* Update Refresh Rate Setting */
2355 2287
2356 /* Clear On Screen */ 2288 /* Clear On Screen */
@@ -2359,11 +2291,11 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2359 if (viafb_CRT_ON) { 2291 if (viafb_CRT_ON) {
2360 if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path == 2292 if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path ==
2361 IGA2)) { 2293 IGA2)) {
2362 viafb_fill_crtc_timing(crt_timing1, vmode_index1, 2294 viafb_fill_crtc_timing(crt_timing1, vmode_tbl1,
2363 video_bpp1 / 8, 2295 video_bpp1 / 8,
2364 viaparinfo->crt_setting_info->iga_path); 2296 viaparinfo->crt_setting_info->iga_path);
2365 } else { 2297 } else {
2366 viafb_fill_crtc_timing(crt_timing, vmode_index, 2298 viafb_fill_crtc_timing(crt_timing, vmode_tbl,
2367 video_bpp / 8, 2299 video_bpp / 8,
2368 viaparinfo->crt_setting_info->iga_path); 2300 viaparinfo->crt_setting_info->iga_path);
2369 } 2301 }
@@ -2373,7 +2305,7 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2373 /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode 2305 /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode
2374 to 8 alignment (1368),there is several pixels (2 pixels) 2306 to 8 alignment (1368),there is several pixels (2 pixels)
2375 on right side of screen. */ 2307 on right side of screen. */
2376 if (hor_res % 8) { 2308 if (vmode_tbl->crtc[0].crtc.hor_addr % 8) {
2377 viafb_unlock_crt(); 2309 viafb_unlock_crt();
2378 viafb_write_reg(CR02, VIACR, 2310 viafb_write_reg(CR02, VIACR,
2379 viafb_read_reg(VIACR, CR02) - 1); 2311 viafb_read_reg(VIACR, CR02) - 1);
@@ -2384,14 +2316,14 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2384 if (viafb_DVI_ON) { 2316 if (viafb_DVI_ON) {
2385 if (viafb_SAMM_ON && 2317 if (viafb_SAMM_ON &&
2386 (viaparinfo->tmds_setting_info->iga_path == IGA2)) { 2318 (viaparinfo->tmds_setting_info->iga_path == IGA2)) {
2387 viafb_dvi_set_mode(viafb_get_mode_index 2319 viafb_dvi_set_mode(viafb_get_mode
2388 (viaparinfo->tmds_setting_info->h_active, 2320 (viaparinfo->tmds_setting_info->h_active,
2389 viaparinfo->tmds_setting_info-> 2321 viaparinfo->tmds_setting_info->
2390 v_active), 2322 v_active),
2391 video_bpp1, viaparinfo-> 2323 video_bpp1, viaparinfo->
2392 tmds_setting_info->iga_path); 2324 tmds_setting_info->iga_path);
2393 } else { 2325 } else {
2394 viafb_dvi_set_mode(viafb_get_mode_index 2326 viafb_dvi_set_mode(viafb_get_mode
2395 (viaparinfo->tmds_setting_info->h_active, 2327 (viaparinfo->tmds_setting_info->h_active,
2396 viaparinfo-> 2328 viaparinfo->
2397 tmds_setting_info->v_active), 2329 tmds_setting_info->v_active),
@@ -2445,8 +2377,8 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2445 2377
2446 /* If set mode normally, save resolution information for hot-plug . */ 2378 /* If set mode normally, save resolution information for hot-plug . */
2447 if (!viafb_hotplug) { 2379 if (!viafb_hotplug) {
2448 viafb_hotplug_Xres = hor_res; 2380 viafb_hotplug_Xres = vmode_tbl->crtc[0].crtc.hor_addr;
2449 viafb_hotplug_Yres = ver_res; 2381 viafb_hotplug_Yres = vmode_tbl->crtc[0].crtc.ver_addr;
2450 viafb_hotplug_bpp = video_bpp; 2382 viafb_hotplug_bpp = video_bpp;
2451 viafb_hotplug_refresh = viafb_refresh; 2383 viafb_hotplug_refresh = viafb_refresh;
2452 2384
@@ -2706,13 +2638,11 @@ void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
2706 2638
2707/*According var's xres, yres fill var's other timing information*/ 2639/*According var's xres, yres fill var's other timing information*/
2708void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh, 2640void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
2709 int mode_index) 2641 struct VideoModeTable *vmode_tbl)
2710{ 2642{
2711 struct VideoModeTable *vmode_tbl = NULL;
2712 struct crt_mode_table *crt_timing = NULL; 2643 struct crt_mode_table *crt_timing = NULL;
2713 struct display_timing crt_reg; 2644 struct display_timing crt_reg;
2714 int i = 0, index = 0; 2645 int i = 0, index = 0;
2715 vmode_tbl = &CLE266Modes[search_mode_setting(mode_index)];
2716 crt_timing = vmode_tbl->crtc; 2646 crt_timing = vmode_tbl->crtc;
2717 for (i = 0; i < vmode_tbl->mode_array; i++) { 2647 for (i = 0; i < vmode_tbl->mode_array; i++) {
2718 index = i; 2648 index = i;
@@ -2721,36 +2651,6 @@ void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
2721 } 2651 }
2722 2652
2723 crt_reg = crt_timing[index].crtc; 2653 crt_reg = crt_timing[index].crtc;
2724 switch (var->bits_per_pixel) {
2725 case 8:
2726 var->red.offset = 0;
2727 var->green.offset = 0;
2728 var->blue.offset = 0;
2729 var->red.length = 6;
2730 var->green.length = 6;
2731 var->blue.length = 6;
2732 break;
2733 case 16:
2734 var->red.offset = 11;
2735 var->green.offset = 5;
2736 var->blue.offset = 0;
2737 var->red.length = 5;
2738 var->green.length = 6;
2739 var->blue.length = 5;
2740 break;
2741 case 32:
2742 var->red.offset = 16;
2743 var->green.offset = 8;
2744 var->blue.offset = 0;
2745 var->red.length = 8;
2746 var->green.length = 8;
2747 var->blue.length = 8;
2748 break;
2749 default:
2750 /* never happed, put here to keep consistent */
2751 break;
2752 }
2753
2754 var->pixclock = viafb_get_pixclock(var->xres, var->yres, refresh); 2654 var->pixclock = viafb_get_pixclock(var->xres, var->yres, refresh);
2755 var->left_margin = 2655 var->left_margin =
2756 crt_reg.hor_total - (crt_reg.hor_sync_start + crt_reg.hor_sync_end); 2656 crt_reg.hor_total - (crt_reg.hor_sync_start + crt_reg.hor_sync_end);
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index b874d952b446..12ef32d334cb 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -22,6 +22,7 @@
22#ifndef __HW_H__ 22#ifndef __HW_H__
23#define __HW_H__ 23#define __HW_H__
24 24
25#include "viamode.h"
25#include "global.h" 26#include "global.h"
26 27
27/*************************************************** 28/***************************************************
@@ -862,8 +863,6 @@ struct pci_device_id_info {
862}; 863};
863 864
864extern unsigned int viafb_second_virtual_xres; 865extern unsigned int viafb_second_virtual_xres;
865extern unsigned int viafb_second_offset;
866extern int viafb_second_size;
867extern int viafb_SAMM_ON; 866extern int viafb_SAMM_ON;
868extern int viafb_dual_fb; 867extern int viafb_dual_fb;
869extern int viafb_LCD2_ON; 868extern int viafb_LCD2_ON;
@@ -874,8 +873,9 @@ extern int viafb_hotplug;
874void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask); 873void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask);
875void viafb_set_output_path(int device, int set_iga, 874void viafb_set_output_path(int device, int set_iga,
876 int output_interface); 875 int output_interface);
876
877void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, 877void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
878 int mode_index, int bpp_byte, int set_iga); 878 struct VideoModeTable *video_mode, int bpp_byte, int set_iga);
879 879
880void viafb_set_vclock(u32 CLK, int set_iga); 880void viafb_set_vclock(u32 CLK, int set_iga);
881void viafb_load_reg(int timing_value, int viafb_load_reg_num, 881void viafb_load_reg(int timing_value, int viafb_load_reg_num,
@@ -891,16 +891,15 @@ void viafb_lock_crt(void);
891void viafb_unlock_crt(void); 891void viafb_unlock_crt(void);
892void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga); 892void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga);
893void viafb_write_regx(struct io_reg RegTable[], int ItemNum); 893void viafb_write_regx(struct io_reg RegTable[], int ItemNum);
894struct VideoModeTable *viafb_get_modetbl_pointer(int Index);
895u32 viafb_get_clk_value(int clk); 894u32 viafb_get_clk_value(int clk);
896void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active); 895void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active);
897void viafb_set_color_depth(int bpp_byte, int set_iga);
898void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\ 896void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
899 *p_gfx_dpa_setting); 897 *p_gfx_dpa_setting);
900 898
901int viafb_setmode(int vmode_index, int hor_res, int ver_res, 899int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
902 int video_bpp, int vmode_index1, int hor_res1, 900 struct VideoModeTable *vmode_tbl1, int video_bpp1);
903 int ver_res1, int video_bpp1); 901void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
902 struct VideoModeTable *vmode_tbl);
904void viafb_init_chip_info(struct pci_dev *pdev, 903void viafb_init_chip_info(struct pci_dev *pdev,
905 const struct pci_device_id *pdi); 904 const struct pci_device_id *pdi);
906void viafb_init_dac(int set_iga); 905void viafb_init_dac(int set_iga);
@@ -915,6 +914,8 @@ void viafb_set_primary_address(u32 addr);
915void viafb_set_secondary_address(u32 addr); 914void viafb_set_secondary_address(u32 addr);
916void viafb_set_primary_pitch(u32 pitch); 915void viafb_set_primary_pitch(u32 pitch);
917void viafb_set_secondary_pitch(u32 pitch); 916void viafb_set_secondary_pitch(u32 pitch);
917void viafb_set_primary_color_register(u8 index, u8 red, u8 green, u8 blue);
918void viafb_set_secondary_color_register(u8 index, u8 red, u8 green, u8 blue);
918void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len); 919void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len);
919 920
920#endif /* __HW_H__ */ 921#endif /* __HW_H__ */
diff --git a/drivers/video/via/iface.c b/drivers/video/via/iface.c
deleted file mode 100644
index 1570636c8d51..000000000000
--- a/drivers/video/via/iface.c
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
4
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public
7 * License as published by the Free Software Foundation;
8 * either version 2, or (at your option) any later version.
9
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
12 * the implied warranty of MERCHANTABILITY or FITNESS FOR
13 * A PARTICULAR PURPOSE.See the GNU General Public License
14 * for more details.
15
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#include "global.h"
23
24/* Get frame buffer size from VGA BIOS */
25
26unsigned int viafb_get_memsize(void)
27{
28 unsigned int m;
29
30 /* If memory size provided by user */
31 if (viafb_memsize)
32 m = viafb_memsize * Mb;
33 else {
34 m = (unsigned int)viafb_read_reg(VIASR, SR39);
35 m = m * (4 * Mb);
36
37 if ((m < (16 * Mb)) || (m > (64 * Mb)))
38 m = 16 * Mb;
39 }
40 DEBUG_MSG(KERN_INFO "framebuffer size = %d Mb\n", m / Mb);
41 return m;
42}
43
44/* Get Video Buffer Starting Physical Address(back door)*/
45
46unsigned long viafb_get_videobuf_addr(void)
47{
48 struct pci_dev *pdev = NULL;
49 unsigned char sys_mem;
50 unsigned char video_mem;
51 unsigned long sys_mem_size;
52 unsigned long video_mem_size;
53 /*system memory = 256 MB, video memory 64 MB */
54 unsigned long vmem_starting_adr = 0x0C000000;
55
56 pdev =
57 (struct pci_dev *)pci_get_device(VIA_K800_BRIDGE_VID,
58 VIA_K800_BRIDGE_DID, NULL);
59 if (pdev != NULL) {
60 pci_read_config_byte(pdev, VIA_K800_SYSTEM_MEMORY_REG,
61 &sys_mem);
62 pci_read_config_byte(pdev, VIA_K800_VIDEO_MEMORY_REG,
63 &video_mem);
64 video_mem = (video_mem & 0x70) >> 4;
65 sys_mem_size = ((unsigned long)sys_mem) << 24;
66 if (video_mem != 0)
67 video_mem_size = (1 << (video_mem)) * 1024 * 1024;
68 else
69 video_mem_size = 0;
70
71 vmem_starting_adr = sys_mem_size - video_mem_size;
72 pci_dev_put(pdev);
73 }
74
75 DEBUG_MSG(KERN_INFO "Video Memory Starting Address = %lx \n",
76 vmem_starting_adr);
77 return vmem_starting_adr;
78}
diff --git a/drivers/video/via/iface.h b/drivers/video/via/iface.h
deleted file mode 100644
index 790ec3e3aea2..000000000000
--- a/drivers/video/via/iface.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
4
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public
7 * License as published by the Free Software Foundation;
8 * either version 2, or (at your option) any later version.
9
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
12 * the implied warranty of MERCHANTABILITY or FITNESS FOR
13 * A PARTICULAR PURPOSE.See the GNU General Public License
14 * for more details.
15
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#ifndef __IFACE_H__
23#define __IFACE_H__
24
25#define Kb (1024)
26#define Mb (Kb*Kb)
27
28#define VIA_K800_BRIDGE_VID 0x1106
29#define VIA_K800_BRIDGE_DID 0x3204
30
31#define VIA_K800_SYSTEM_MEMORY_REG 0x47
32#define VIA_K800_VIDEO_MEMORY_REG 0xA1
33
34extern int viafb_memsize;
35unsigned int viafb_get_memsize(void);
36unsigned long viafb_get_videobuf_addr(void);
37
38#endif /* __IFACE_H__ */
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 09353e2b92f6..1b1ccdc2d83d 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -22,25 +22,7 @@
22#include "global.h" 22#include "global.h"
23#include "lcdtbl.h" 23#include "lcdtbl.h"
24 24
25static struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = { 25#define viafb_compact_res(x, y) (((x)<<16)|(y))
26 /* IGA2 Shadow Horizontal Total */
27 {IGA2_SHADOW_HOR_TOTAL_REG_NUM, {{CR6D, 0, 7}, {CR71, 3, 3} } },
28 /* IGA2 Shadow Horizontal Blank End */
29 {IGA2_SHADOW_HOR_BLANK_END_REG_NUM, {{CR6E, 0, 7} } },
30 /* IGA2 Shadow Vertical Total */
31 {IGA2_SHADOW_VER_TOTAL_REG_NUM, {{CR6F, 0, 7}, {CR71, 0, 2} } },
32 /* IGA2 Shadow Vertical Addressable Video */
33 {IGA2_SHADOW_VER_ADDR_REG_NUM, {{CR70, 0, 7}, {CR71, 4, 6} } },
34 /* IGA2 Shadow Vertical Blank Start */
35 {IGA2_SHADOW_VER_BLANK_START_REG_NUM,
36 {{CR72, 0, 7}, {CR74, 4, 6} } },
37 /* IGA2 Shadow Vertical Blank End */
38 {IGA2_SHADOW_VER_BLANK_END_REG_NUM, {{CR73, 0, 7}, {CR74, 0, 2} } },
39 /* IGA2 Shadow Vertical Sync Start */
40 {IGA2_SHADOW_VER_SYNC_START_REG_NUM, {{CR75, 0, 7}, {CR76, 4, 6} } },
41 /* IGA2 Shadow Vertical Sync End */
42 {IGA2_SHADOW_VER_SYNC_END_REG_NUM, {{CR76, 0, 3} } }
43};
44 26
45static struct _lcd_scaling_factor lcd_scaling_factor = { 27static struct _lcd_scaling_factor lcd_scaling_factor = {
46 /* LCD Horizontal Scaling Factor Register */ 28 /* LCD Horizontal Scaling Factor Register */
@@ -59,16 +41,10 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
59 41
60static int check_lvds_chip(int device_id_subaddr, int device_id); 42static int check_lvds_chip(int device_id_subaddr, int device_id);
61static bool lvds_identify_integratedlvds(void); 43static bool lvds_identify_integratedlvds(void);
62static int fp_id_to_vindex(int panel_id); 44static void fp_id_to_vindex(int panel_id);
63static int lvds_register_read(int index); 45static int lvds_register_read(int index);
64static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, 46static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
65 int panel_vres); 47 int panel_vres);
66static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
67 int panel_id);
68static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
69 int panel_id);
70static void load_lcd_patch_regs(int set_hres, int set_vres,
71 int panel_id, int set_iga);
72static void via_pitch_alignment_patch_lcd( 48static void via_pitch_alignment_patch_lcd(
73 struct lvds_setting_information *plvds_setting_info, 49 struct lvds_setting_information *plvds_setting_info,
74 struct lvds_chip_information 50 struct lvds_chip_information
@@ -98,8 +74,6 @@ static void check_diport_of_integrated_lvds(
98static struct display_timing lcd_centering_timging(struct display_timing 74static struct display_timing lcd_centering_timging(struct display_timing
99 mode_crt_reg, 75 mode_crt_reg,
100 struct display_timing panel_crt_reg); 76 struct display_timing panel_crt_reg);
101static void load_crtc_shadow_timing(struct display_timing mode_timing,
102 struct display_timing panel_timing);
103static void viafb_load_scaling_factor_for_p4m900(int set_hres, 77static void viafb_load_scaling_factor_for_p4m900(int set_hres,
104 int set_vres, int panel_hres, int panel_vres); 78 int set_vres, int panel_hres, int panel_vres);
105 79
@@ -125,33 +99,24 @@ void viafb_init_lcd_size(void)
125 break; 99 break;
126 case GET_LCD_SIZE_BY_VGA_BIOS: 100 case GET_LCD_SIZE_BY_VGA_BIOS:
127 DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n"); 101 DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n");
128 viaparinfo->lvds_setting_info->lcd_panel_size = 102 fp_id_to_vindex(viafb_lcd_panel_id);
129 fp_id_to_vindex(viafb_lcd_panel_id);
130 DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", 103 DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n",
131 viaparinfo->lvds_setting_info->lcd_panel_id); 104 viaparinfo->lvds_setting_info->lcd_panel_id);
132 DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n",
133 viaparinfo->lvds_setting_info->lcd_panel_size);
134 break; 105 break;
135 case GET_LCD_SIZE_BY_USER_SETTING: 106 case GET_LCD_SIZE_BY_USER_SETTING:
136 DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n"); 107 DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n");
137 viaparinfo->lvds_setting_info->lcd_panel_size = 108 fp_id_to_vindex(viafb_lcd_panel_id);
138 fp_id_to_vindex(viafb_lcd_panel_id);
139 DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", 109 DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n",
140 viaparinfo->lvds_setting_info->lcd_panel_id); 110 viaparinfo->lvds_setting_info->lcd_panel_id);
141 DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n",
142 viaparinfo->lvds_setting_info->lcd_panel_size);
143 break; 111 break;
144 default: 112 default:
145 DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n"); 113 DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n");
146 viaparinfo->lvds_setting_info->lcd_panel_id = 114 viaparinfo->lvds_setting_info->lcd_panel_id =
147 LCD_PANEL_ID1_800X600; 115 LCD_PANEL_ID1_800X600;
148 viaparinfo->lvds_setting_info->lcd_panel_size = 116 fp_id_to_vindex(LCD_PANEL_ID1_800X600);
149 fp_id_to_vindex(LCD_PANEL_ID1_800X600);
150 } 117 }
151 viaparinfo->lvds_setting_info2->lcd_panel_id = 118 viaparinfo->lvds_setting_info2->lcd_panel_id =
152 viaparinfo->lvds_setting_info->lcd_panel_id; 119 viaparinfo->lvds_setting_info->lcd_panel_id;
153 viaparinfo->lvds_setting_info2->lcd_panel_size =
154 viaparinfo->lvds_setting_info->lcd_panel_size;
155 viaparinfo->lvds_setting_info2->lcd_panel_hres = 120 viaparinfo->lvds_setting_info2->lcd_panel_hres =
156 viaparinfo->lvds_setting_info->lcd_panel_hres; 121 viaparinfo->lvds_setting_info->lcd_panel_hres;
157 viaparinfo->lvds_setting_info2->lcd_panel_vres = 122 viaparinfo->lvds_setting_info2->lcd_panel_vres =
@@ -171,13 +136,13 @@ static bool lvds_identify_integratedlvds(void)
171 if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { 136 if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
172 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = 137 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
173 INTEGRATED_LVDS; 138 INTEGRATED_LVDS;
174 DEBUG_MSG(KERN_INFO "Support two dual channel LVDS!\ 139 DEBUG_MSG(KERN_INFO "Support two dual channel LVDS! "
175 (Internal LVDS + External LVDS)\n"); 140 "(Internal LVDS + External LVDS)\n");
176 } else { 141 } else {
177 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = 142 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
178 INTEGRATED_LVDS; 143 INTEGRATED_LVDS;
179 DEBUG_MSG(KERN_INFO "Not found external LVDS,\ 144 DEBUG_MSG(KERN_INFO "Not found external LVDS, "
180 so can't support two dual channel LVDS!\n"); 145 "so can't support two dual channel LVDS!\n");
181 } 146 }
182 } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) { 147 } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) {
183 /* Two single channel LCD (Internal LVDS + Internal LVDS): */ 148 /* Two single channel LCD (Internal LVDS + Internal LVDS): */
@@ -185,8 +150,8 @@ static bool lvds_identify_integratedlvds(void)
185 INTEGRATED_LVDS; 150 INTEGRATED_LVDS;
186 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = 151 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
187 INTEGRATED_LVDS; 152 INTEGRATED_LVDS;
188 DEBUG_MSG(KERN_INFO "Support two single channel LVDS!\ 153 DEBUG_MSG(KERN_INFO "Support two single channel LVDS! "
189 (Internal LVDS + Internal LVDS)\n"); 154 "(Internal LVDS + Internal LVDS)\n");
190 } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) { 155 } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) {
191 /* If we have found external LVDS, just use it, 156 /* If we have found external LVDS, just use it,
192 otherwise, we will use internal LVDS as default. */ 157 otherwise, we will use internal LVDS as default. */
@@ -248,7 +213,7 @@ int viafb_lvds_trasmitter_identify(void)
248 return FAIL; 213 return FAIL;
249} 214}
250 215
251static int fp_id_to_vindex(int panel_id) 216static void fp_id_to_vindex(int panel_id)
252{ 217{
253 DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n"); 218 DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n");
254 219
@@ -264,7 +229,6 @@ static int fp_id_to_vindex(int panel_id)
264 LCD_PANEL_ID0_640X480; 229 LCD_PANEL_ID0_640X480;
265 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 230 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
266 viaparinfo->lvds_setting_info->LCDDithering = 1; 231 viaparinfo->lvds_setting_info->LCDDithering = 1;
267 return VIA_RES_640X480;
268 break; 232 break;
269 case 0x1: 233 case 0x1:
270 viaparinfo->lvds_setting_info->lcd_panel_hres = 800; 234 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
@@ -273,7 +237,6 @@ static int fp_id_to_vindex(int panel_id)
273 LCD_PANEL_ID1_800X600; 237 LCD_PANEL_ID1_800X600;
274 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 238 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
275 viaparinfo->lvds_setting_info->LCDDithering = 1; 239 viaparinfo->lvds_setting_info->LCDDithering = 1;
276 return VIA_RES_800X600;
277 break; 240 break;
278 case 0x2: 241 case 0x2:
279 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; 242 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -282,7 +245,6 @@ static int fp_id_to_vindex(int panel_id)
282 LCD_PANEL_ID2_1024X768; 245 LCD_PANEL_ID2_1024X768;
283 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 246 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
284 viaparinfo->lvds_setting_info->LCDDithering = 1; 247 viaparinfo->lvds_setting_info->LCDDithering = 1;
285 return VIA_RES_1024X768;
286 break; 248 break;
287 case 0x3: 249 case 0x3:
288 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 250 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -291,7 +253,6 @@ static int fp_id_to_vindex(int panel_id)
291 LCD_PANEL_ID3_1280X768; 253 LCD_PANEL_ID3_1280X768;
292 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 254 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
293 viaparinfo->lvds_setting_info->LCDDithering = 1; 255 viaparinfo->lvds_setting_info->LCDDithering = 1;
294 return VIA_RES_1280X768;
295 break; 256 break;
296 case 0x4: 257 case 0x4:
297 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 258 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -300,7 +261,6 @@ static int fp_id_to_vindex(int panel_id)
300 LCD_PANEL_ID4_1280X1024; 261 LCD_PANEL_ID4_1280X1024;
301 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 262 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
302 viaparinfo->lvds_setting_info->LCDDithering = 1; 263 viaparinfo->lvds_setting_info->LCDDithering = 1;
303 return VIA_RES_1280X1024;
304 break; 264 break;
305 case 0x5: 265 case 0x5:
306 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; 266 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
@@ -309,7 +269,6 @@ static int fp_id_to_vindex(int panel_id)
309 LCD_PANEL_ID5_1400X1050; 269 LCD_PANEL_ID5_1400X1050;
310 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 270 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
311 viaparinfo->lvds_setting_info->LCDDithering = 1; 271 viaparinfo->lvds_setting_info->LCDDithering = 1;
312 return VIA_RES_1400X1050;
313 break; 272 break;
314 case 0x6: 273 case 0x6:
315 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; 274 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
@@ -318,7 +277,6 @@ static int fp_id_to_vindex(int panel_id)
318 LCD_PANEL_ID6_1600X1200; 277 LCD_PANEL_ID6_1600X1200;
319 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 278 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
320 viaparinfo->lvds_setting_info->LCDDithering = 1; 279 viaparinfo->lvds_setting_info->LCDDithering = 1;
321 return VIA_RES_1600X1200;
322 break; 280 break;
323 case 0x8: 281 case 0x8:
324 viaparinfo->lvds_setting_info->lcd_panel_hres = 800; 282 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
@@ -327,7 +285,6 @@ static int fp_id_to_vindex(int panel_id)
327 LCD_PANEL_IDA_800X480; 285 LCD_PANEL_IDA_800X480;
328 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 286 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
329 viaparinfo->lvds_setting_info->LCDDithering = 1; 287 viaparinfo->lvds_setting_info->LCDDithering = 1;
330 return VIA_RES_800X480;
331 break; 288 break;
332 case 0x9: 289 case 0x9:
333 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; 290 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -336,7 +293,6 @@ static int fp_id_to_vindex(int panel_id)
336 LCD_PANEL_ID2_1024X768; 293 LCD_PANEL_ID2_1024X768;
337 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 294 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
338 viaparinfo->lvds_setting_info->LCDDithering = 1; 295 viaparinfo->lvds_setting_info->LCDDithering = 1;
339 return VIA_RES_1024X768;
340 break; 296 break;
341 case 0xA: 297 case 0xA:
342 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; 298 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -345,7 +301,6 @@ static int fp_id_to_vindex(int panel_id)
345 LCD_PANEL_ID2_1024X768; 301 LCD_PANEL_ID2_1024X768;
346 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 302 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
347 viaparinfo->lvds_setting_info->LCDDithering = 0; 303 viaparinfo->lvds_setting_info->LCDDithering = 0;
348 return VIA_RES_1024X768;
349 break; 304 break;
350 case 0xB: 305 case 0xB:
351 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; 306 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -354,7 +309,6 @@ static int fp_id_to_vindex(int panel_id)
354 LCD_PANEL_ID2_1024X768; 309 LCD_PANEL_ID2_1024X768;
355 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 310 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
356 viaparinfo->lvds_setting_info->LCDDithering = 0; 311 viaparinfo->lvds_setting_info->LCDDithering = 0;
357 return VIA_RES_1024X768;
358 break; 312 break;
359 case 0xC: 313 case 0xC:
360 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 314 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -363,7 +317,6 @@ static int fp_id_to_vindex(int panel_id)
363 LCD_PANEL_ID3_1280X768; 317 LCD_PANEL_ID3_1280X768;
364 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 318 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
365 viaparinfo->lvds_setting_info->LCDDithering = 0; 319 viaparinfo->lvds_setting_info->LCDDithering = 0;
366 return VIA_RES_1280X768;
367 break; 320 break;
368 case 0xD: 321 case 0xD:
369 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 322 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -372,7 +325,6 @@ static int fp_id_to_vindex(int panel_id)
372 LCD_PANEL_ID4_1280X1024; 325 LCD_PANEL_ID4_1280X1024;
373 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 326 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
374 viaparinfo->lvds_setting_info->LCDDithering = 0; 327 viaparinfo->lvds_setting_info->LCDDithering = 0;
375 return VIA_RES_1280X1024;
376 break; 328 break;
377 case 0xE: 329 case 0xE:
378 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; 330 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
@@ -381,7 +333,6 @@ static int fp_id_to_vindex(int panel_id)
381 LCD_PANEL_ID5_1400X1050; 333 LCD_PANEL_ID5_1400X1050;
382 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 334 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
383 viaparinfo->lvds_setting_info->LCDDithering = 0; 335 viaparinfo->lvds_setting_info->LCDDithering = 0;
384 return VIA_RES_1400X1050;
385 break; 336 break;
386 case 0xF: 337 case 0xF:
387 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; 338 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
@@ -390,7 +341,6 @@ static int fp_id_to_vindex(int panel_id)
390 LCD_PANEL_ID6_1600X1200; 341 LCD_PANEL_ID6_1600X1200;
391 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 342 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
392 viaparinfo->lvds_setting_info->LCDDithering = 0; 343 viaparinfo->lvds_setting_info->LCDDithering = 0;
393 return VIA_RES_1600X1200;
394 break; 344 break;
395 case 0x10: 345 case 0x10:
396 viaparinfo->lvds_setting_info->lcd_panel_hres = 1366; 346 viaparinfo->lvds_setting_info->lcd_panel_hres = 1366;
@@ -399,7 +349,6 @@ static int fp_id_to_vindex(int panel_id)
399 LCD_PANEL_ID7_1366X768; 349 LCD_PANEL_ID7_1366X768;
400 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 350 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
401 viaparinfo->lvds_setting_info->LCDDithering = 0; 351 viaparinfo->lvds_setting_info->LCDDithering = 0;
402 return VIA_RES_1368X768;
403 break; 352 break;
404 case 0x11: 353 case 0x11:
405 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; 354 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -408,7 +357,6 @@ static int fp_id_to_vindex(int panel_id)
408 LCD_PANEL_ID8_1024X600; 357 LCD_PANEL_ID8_1024X600;
409 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 358 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
410 viaparinfo->lvds_setting_info->LCDDithering = 1; 359 viaparinfo->lvds_setting_info->LCDDithering = 1;
411 return VIA_RES_1024X600;
412 break; 360 break;
413 case 0x12: 361 case 0x12:
414 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 362 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -417,7 +365,6 @@ static int fp_id_to_vindex(int panel_id)
417 LCD_PANEL_ID3_1280X768; 365 LCD_PANEL_ID3_1280X768;
418 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 366 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
419 viaparinfo->lvds_setting_info->LCDDithering = 1; 367 viaparinfo->lvds_setting_info->LCDDithering = 1;
420 return VIA_RES_1280X768;
421 break; 368 break;
422 case 0x13: 369 case 0x13:
423 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 370 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -426,7 +373,6 @@ static int fp_id_to_vindex(int panel_id)
426 LCD_PANEL_ID9_1280X800; 373 LCD_PANEL_ID9_1280X800;
427 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 374 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
428 viaparinfo->lvds_setting_info->LCDDithering = 1; 375 viaparinfo->lvds_setting_info->LCDDithering = 1;
429 return VIA_RES_1280X800;
430 break; 376 break;
431 case 0x14: 377 case 0x14:
432 viaparinfo->lvds_setting_info->lcd_panel_hres = 1360; 378 viaparinfo->lvds_setting_info->lcd_panel_hres = 1360;
@@ -435,7 +381,6 @@ static int fp_id_to_vindex(int panel_id)
435 LCD_PANEL_IDB_1360X768; 381 LCD_PANEL_IDB_1360X768;
436 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 382 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
437 viaparinfo->lvds_setting_info->LCDDithering = 0; 383 viaparinfo->lvds_setting_info->LCDDithering = 0;
438 return VIA_RES_1360X768;
439 break; 384 break;
440 case 0x15: 385 case 0x15:
441 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; 386 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -444,7 +389,6 @@ static int fp_id_to_vindex(int panel_id)
444 LCD_PANEL_ID3_1280X768; 389 LCD_PANEL_ID3_1280X768;
445 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; 390 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
446 viaparinfo->lvds_setting_info->LCDDithering = 0; 391 viaparinfo->lvds_setting_info->LCDDithering = 0;
447 return VIA_RES_1280X768;
448 break; 392 break;
449 case 0x16: 393 case 0x16:
450 viaparinfo->lvds_setting_info->lcd_panel_hres = 480; 394 viaparinfo->lvds_setting_info->lcd_panel_hres = 480;
@@ -453,7 +397,6 @@ static int fp_id_to_vindex(int panel_id)
453 LCD_PANEL_IDC_480X640; 397 LCD_PANEL_IDC_480X640;
454 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 398 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
455 viaparinfo->lvds_setting_info->LCDDithering = 1; 399 viaparinfo->lvds_setting_info->LCDDithering = 1;
456 return VIA_RES_480X640;
457 break; 400 break;
458 default: 401 default:
459 viaparinfo->lvds_setting_info->lcd_panel_hres = 800; 402 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
@@ -462,7 +405,6 @@ static int fp_id_to_vindex(int panel_id)
462 LCD_PANEL_ID1_800X600; 405 LCD_PANEL_ID1_800X600;
463 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 406 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
464 viaparinfo->lvds_setting_info->LCDDithering = 1; 407 viaparinfo->lvds_setting_info->LCDDithering = 1;
465 return VIA_RES_800X600;
466 } 408 }
467} 409}
468 410
@@ -573,284 +515,6 @@ static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
573 } 515 }
574} 516}
575 517
576static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
577 int panel_id)
578{
579 int vmode_index;
580 int reg_num = 0;
581 struct io_reg *lcd_patch_reg = NULL;
582
583 vmode_index = viafb_get_mode_index(set_hres, set_vres);
584 switch (panel_id) {
585 /* LCD 800x600 */
586 case LCD_PANEL_ID1_800X600:
587 switch (vmode_index) {
588 case VIA_RES_640X400:
589 case VIA_RES_640X480:
590 reg_num = NUM_TOTAL_K400_LCD_RES_6X4_8X6;
591 lcd_patch_reg = K400_LCD_RES_6X4_8X6;
592 break;
593 case VIA_RES_720X480:
594 case VIA_RES_720X576:
595 reg_num = NUM_TOTAL_K400_LCD_RES_7X4_8X6;
596 lcd_patch_reg = K400_LCD_RES_7X4_8X6;
597 break;
598 }
599 break;
600
601 /* LCD 1024x768 */
602 case LCD_PANEL_ID2_1024X768:
603 switch (vmode_index) {
604 case VIA_RES_640X400:
605 case VIA_RES_640X480:
606 reg_num = NUM_TOTAL_K400_LCD_RES_6X4_10X7;
607 lcd_patch_reg = K400_LCD_RES_6X4_10X7;
608 break;
609 case VIA_RES_720X480:
610 case VIA_RES_720X576:
611 reg_num = NUM_TOTAL_K400_LCD_RES_7X4_10X7;
612 lcd_patch_reg = K400_LCD_RES_7X4_10X7;
613 break;
614 case VIA_RES_800X600:
615 reg_num = NUM_TOTAL_K400_LCD_RES_8X6_10X7;
616 lcd_patch_reg = K400_LCD_RES_8X6_10X7;
617 break;
618 }
619 break;
620
621 /* LCD 1280x1024 */
622 case LCD_PANEL_ID4_1280X1024:
623 switch (vmode_index) {
624 case VIA_RES_640X400:
625 case VIA_RES_640X480:
626 reg_num = NUM_TOTAL_K400_LCD_RES_6X4_12X10;
627 lcd_patch_reg = K400_LCD_RES_6X4_12X10;
628 break;
629 case VIA_RES_720X480:
630 case VIA_RES_720X576:
631 reg_num = NUM_TOTAL_K400_LCD_RES_7X4_12X10;
632 lcd_patch_reg = K400_LCD_RES_7X4_12X10;
633 break;
634 case VIA_RES_800X600:
635 reg_num = NUM_TOTAL_K400_LCD_RES_8X6_12X10;
636 lcd_patch_reg = K400_LCD_RES_8X6_12X10;
637 break;
638 case VIA_RES_1024X768:
639 reg_num = NUM_TOTAL_K400_LCD_RES_10X7_12X10;
640 lcd_patch_reg = K400_LCD_RES_10X7_12X10;
641 break;
642
643 }
644 break;
645
646 /* LCD 1400x1050 */
647 case LCD_PANEL_ID5_1400X1050:
648 switch (vmode_index) {
649 case VIA_RES_640X480:
650 reg_num = NUM_TOTAL_K400_LCD_RES_6X4_14X10;
651 lcd_patch_reg = K400_LCD_RES_6X4_14X10;
652 break;
653 case VIA_RES_800X600:
654 reg_num = NUM_TOTAL_K400_LCD_RES_8X6_14X10;
655 lcd_patch_reg = K400_LCD_RES_8X6_14X10;
656 break;
657 case VIA_RES_1024X768:
658 reg_num = NUM_TOTAL_K400_LCD_RES_10X7_14X10;
659 lcd_patch_reg = K400_LCD_RES_10X7_14X10;
660 break;
661 case VIA_RES_1280X768:
662 case VIA_RES_1280X800:
663 case VIA_RES_1280X960:
664 case VIA_RES_1280X1024:
665 reg_num = NUM_TOTAL_K400_LCD_RES_12X10_14X10;
666 lcd_patch_reg = K400_LCD_RES_12X10_14X10;
667 break;
668 }
669 break;
670
671 /* LCD 1600x1200 */
672 case LCD_PANEL_ID6_1600X1200:
673 switch (vmode_index) {
674 case VIA_RES_640X400:
675 case VIA_RES_640X480:
676 reg_num = NUM_TOTAL_K400_LCD_RES_6X4_16X12;
677 lcd_patch_reg = K400_LCD_RES_6X4_16X12;
678 break;
679 case VIA_RES_720X480:
680 case VIA_RES_720X576:
681 reg_num = NUM_TOTAL_K400_LCD_RES_7X4_16X12;
682 lcd_patch_reg = K400_LCD_RES_7X4_16X12;
683 break;
684 case VIA_RES_800X600:
685 reg_num = NUM_TOTAL_K400_LCD_RES_8X6_16X12;
686 lcd_patch_reg = K400_LCD_RES_8X6_16X12;
687 break;
688 case VIA_RES_1024X768:
689 reg_num = NUM_TOTAL_K400_LCD_RES_10X7_16X12;
690 lcd_patch_reg = K400_LCD_RES_10X7_16X12;
691 break;
692 case VIA_RES_1280X768:
693 case VIA_RES_1280X800:
694 case VIA_RES_1280X960:
695 case VIA_RES_1280X1024:
696 reg_num = NUM_TOTAL_K400_LCD_RES_12X10_16X12;
697 lcd_patch_reg = K400_LCD_RES_12X10_16X12;
698 break;
699 }
700 break;
701
702 /* LCD 1366x768 */
703 case LCD_PANEL_ID7_1366X768:
704 switch (vmode_index) {
705 case VIA_RES_640X480:
706 reg_num = NUM_TOTAL_K400_LCD_RES_6X4_1366X7;
707 lcd_patch_reg = K400_LCD_RES_6X4_1366X7;
708 break;
709 case VIA_RES_720X480:
710 case VIA_RES_720X576:
711 reg_num = NUM_TOTAL_K400_LCD_RES_7X4_1366X7;
712 lcd_patch_reg = K400_LCD_RES_7X4_1366X7;
713 break;
714 case VIA_RES_800X600:
715 reg_num = NUM_TOTAL_K400_LCD_RES_8X6_1366X7;
716 lcd_patch_reg = K400_LCD_RES_8X6_1366X7;
717 break;
718 case VIA_RES_1024X768:
719 reg_num = NUM_TOTAL_K400_LCD_RES_10X7_1366X7;
720 lcd_patch_reg = K400_LCD_RES_10X7_1366X7;
721 break;
722 case VIA_RES_1280X768:
723 case VIA_RES_1280X800:
724 case VIA_RES_1280X960:
725 case VIA_RES_1280X1024:
726 reg_num = NUM_TOTAL_K400_LCD_RES_12X10_1366X7;
727 lcd_patch_reg = K400_LCD_RES_12X10_1366X7;
728 break;
729 }
730 break;
731
732 /* LCD 1360x768 */
733 case LCD_PANEL_IDB_1360X768:
734 break;
735 }
736 if (reg_num != 0) {
737 /* H.W. Reset : ON */
738 viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
739
740 viafb_write_regx(lcd_patch_reg, reg_num);
741
742 /* H.W. Reset : OFF */
743 viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
744
745 /* Reset PLL */
746 viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
747 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
748
749 /* Fire! */
750 outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
751 }
752}
753
754static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
755 int panel_id)
756{
757 int vmode_index;
758 int reg_num = 0;
759 struct io_reg *lcd_patch_reg = NULL;
760
761 vmode_index = viafb_get_mode_index(set_hres, set_vres);
762
763 switch (panel_id) {
764 case LCD_PANEL_ID5_1400X1050:
765 switch (vmode_index) {
766 case VIA_RES_640X480:
767 reg_num = NUM_TOTAL_P880_LCD_RES_6X4_14X10;
768 lcd_patch_reg = P880_LCD_RES_6X4_14X10;
769 break;
770 case VIA_RES_800X600:
771 reg_num = NUM_TOTAL_P880_LCD_RES_8X6_14X10;
772 lcd_patch_reg = P880_LCD_RES_8X6_14X10;
773 break;
774 }
775 break;
776 case LCD_PANEL_ID6_1600X1200:
777 switch (vmode_index) {
778 case VIA_RES_640X400:
779 case VIA_RES_640X480:
780 reg_num = NUM_TOTAL_P880_LCD_RES_6X4_16X12;
781 lcd_patch_reg = P880_LCD_RES_6X4_16X12;
782 break;
783 case VIA_RES_720X480:
784 case VIA_RES_720X576:
785 reg_num = NUM_TOTAL_P880_LCD_RES_7X4_16X12;
786 lcd_patch_reg = P880_LCD_RES_7X4_16X12;
787 break;
788 case VIA_RES_800X600:
789 reg_num = NUM_TOTAL_P880_LCD_RES_8X6_16X12;
790 lcd_patch_reg = P880_LCD_RES_8X6_16X12;
791 break;
792 case VIA_RES_1024X768:
793 reg_num = NUM_TOTAL_P880_LCD_RES_10X7_16X12;
794 lcd_patch_reg = P880_LCD_RES_10X7_16X12;
795 break;
796 case VIA_RES_1280X768:
797 case VIA_RES_1280X960:
798 case VIA_RES_1280X1024:
799 reg_num = NUM_TOTAL_P880_LCD_RES_12X10_16X12;
800 lcd_patch_reg = P880_LCD_RES_12X10_16X12;
801 break;
802 }
803 break;
804
805 }
806 if (reg_num != 0) {
807 /* H.W. Reset : ON */
808 viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
809
810 viafb_write_regx(lcd_patch_reg, reg_num);
811
812 /* H.W. Reset : OFF */
813 viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
814
815 /* Reset PLL */
816 viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
817 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
818
819 /* Fire! */
820 outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
821 }
822}
823
824static void load_lcd_patch_regs(int set_hres, int set_vres,
825 int panel_id, int set_iga)
826{
827 int vmode_index;
828
829 vmode_index = viafb_get_mode_index(set_hres, set_vres);
830
831 viafb_unlock_crt();
832
833 /* Patch for simultaneous & Expansion */
834 if ((set_iga == IGA1_IGA2) &&
835 (viaparinfo->lvds_setting_info->display_method ==
836 LCD_EXPANDSION)) {
837 switch (viaparinfo->chip_info->gfx_chip_name) {
838 case UNICHROME_CLE266:
839 case UNICHROME_K400:
840 load_lcd_k400_patch_tbl(set_hres, set_vres, panel_id);
841 break;
842 case UNICHROME_K800:
843 break;
844 case UNICHROME_PM800:
845 case UNICHROME_CN700:
846 case UNICHROME_CX700:
847 load_lcd_p880_patch_tbl(set_hres, set_vres, panel_id);
848 }
849 }
850
851 viafb_lock_crt();
852}
853
854static void via_pitch_alignment_patch_lcd( 518static void via_pitch_alignment_patch_lcd(
855 struct lvds_setting_information *plvds_setting_info, 519 struct lvds_setting_information *plvds_setting_info,
856 struct lvds_chip_information 520 struct lvds_chip_information
@@ -949,29 +613,25 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
949 struct lvds_setting_information *plvds_setting_info, 613 struct lvds_setting_information *plvds_setting_info,
950 struct lvds_chip_information *plvds_chip_info) 614 struct lvds_chip_information *plvds_chip_info)
951{ 615{
952 int video_index = plvds_setting_info->lcd_panel_size;
953 int set_iga = plvds_setting_info->iga_path; 616 int set_iga = plvds_setting_info->iga_path;
954 int mode_bpp = plvds_setting_info->bpp; 617 int mode_bpp = plvds_setting_info->bpp;
955 int set_hres, set_vres; 618 int set_hres = plvds_setting_info->h_active;
956 int panel_hres, panel_vres; 619 int set_vres = plvds_setting_info->v_active;
620 int panel_hres = plvds_setting_info->lcd_panel_hres;
621 int panel_vres = plvds_setting_info->lcd_panel_vres;
957 u32 pll_D_N; 622 u32 pll_D_N;
958 int offset;
959 struct display_timing mode_crt_reg, panel_crt_reg; 623 struct display_timing mode_crt_reg, panel_crt_reg;
960 struct crt_mode_table *panel_crt_table = NULL; 624 struct crt_mode_table *panel_crt_table = NULL;
961 struct VideoModeTable *vmode_tbl = NULL; 625 struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres,
626 panel_vres);
962 627
963 DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n"); 628 DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
964 /* Get mode table */ 629 /* Get mode table */
965 mode_crt_reg = mode_crt_table->crtc; 630 mode_crt_reg = mode_crt_table->crtc;
966 /* Get panel table Pointer */ 631 /* Get panel table Pointer */
967 vmode_tbl = viafb_get_modetbl_pointer(video_index);
968 panel_crt_table = vmode_tbl->crtc; 632 panel_crt_table = vmode_tbl->crtc;
969 panel_crt_reg = panel_crt_table->crtc; 633 panel_crt_reg = panel_crt_table->crtc;
970 DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); 634 DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
971 set_hres = plvds_setting_info->h_active;
972 set_vres = plvds_setting_info->v_active;
973 panel_hres = plvds_setting_info->lcd_panel_hres;
974 panel_vres = plvds_setting_info->lcd_panel_vres;
975 if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) 635 if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
976 viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); 636 viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info);
977 plvds_setting_info->vclk = panel_crt_table->clk; 637 plvds_setting_info->vclk = panel_crt_table->clk;
@@ -1001,54 +661,12 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
1001 } 661 }
1002 } 662 }
1003 663
1004 if (set_iga == IGA1_IGA2) { 664 /* Fetch count for IGA2 only */
1005 load_crtc_shadow_timing(mode_crt_reg, panel_crt_reg); 665 viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
1006 /* Fill shadow registers */
1007
1008 switch (plvds_setting_info->lcd_panel_id) {
1009 case LCD_PANEL_ID0_640X480:
1010 offset = 80;
1011 break;
1012 case LCD_PANEL_ID1_800X600:
1013 case LCD_PANEL_IDA_800X480:
1014 offset = 110;
1015 break;
1016 case LCD_PANEL_ID2_1024X768:
1017 offset = 150;
1018 break;
1019 case LCD_PANEL_ID3_1280X768:
1020 case LCD_PANEL_ID4_1280X1024:
1021 case LCD_PANEL_ID5_1400X1050:
1022 case LCD_PANEL_ID9_1280X800:
1023 offset = 190;
1024 break;
1025 case LCD_PANEL_ID6_1600X1200:
1026 offset = 250;
1027 break;
1028 case LCD_PANEL_ID7_1366X768:
1029 case LCD_PANEL_IDB_1360X768:
1030 offset = 212;
1031 break;
1032 default:
1033 offset = 140;
1034 break;
1035 }
1036
1037 /* Offset for simultaneous */
1038 viafb_set_secondary_pitch(offset << 3);
1039 DEBUG_MSG(KERN_INFO "viafb_load_reg!!\n");
1040 viafb_load_fetch_count_reg(set_hres, 4, IGA2);
1041 /* Fetch count for simultaneous */
1042 } else { /* SAMM */
1043 /* Fetch count for IGA2 only */
1044 viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
1045
1046 if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
1047 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
1048 viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
1049 666
1050 viafb_set_color_depth(mode_bpp / 8, set_iga); 667 if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
1051 } 668 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
669 viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
1052 670
1053 fill_lcd_format(); 671 fill_lcd_format();
1054 672
@@ -1065,11 +683,6 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
1065 || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)) 683 || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name))
1066 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); 684 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0);
1067 685
1068 load_lcd_patch_regs(set_hres, set_vres,
1069 plvds_setting_info->lcd_panel_id, set_iga);
1070
1071 DEBUG_MSG(KERN_INFO "load_lcd_patch_regs!!\n");
1072
1073 /* Patch for non 32bit alignment mode */ 686 /* Patch for non 32bit alignment mode */
1074 via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info); 687 via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info);
1075} 688}
@@ -1283,8 +896,7 @@ void viafb_lcd_enable(void)
1283 viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48); 896 viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48);
1284 } 897 }
1285 898
1286 if ((viaparinfo->lvds_setting_info->iga_path == IGA1) 899 if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
1287 || (viaparinfo->lvds_setting_info->iga_path == IGA1_IGA2)) {
1288 /* CRT path set to IGA2 */ 900 /* CRT path set to IGA2 */
1289 viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40); 901 viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40);
1290 /* IGA2 path disabled */ 902 /* IGA2 path disabled */
@@ -1476,210 +1088,6 @@ static struct display_timing lcd_centering_timging(struct display_timing
1476 return crt_reg; 1088 return crt_reg;
1477} 1089}
1478 1090
1479static void load_crtc_shadow_timing(struct display_timing mode_timing,
1480 struct display_timing panel_timing)
1481{
1482 struct io_register *reg = NULL;
1483 int i;
1484 int viafb_load_reg_Num = 0;
1485 int reg_value = 0;
1486
1487 if (viaparinfo->lvds_setting_info->display_method == LCD_EXPANDSION) {
1488 /* Expansion */
1489 for (i = 12; i < 20; i++) {
1490 switch (i) {
1491 case H_TOTAL_SHADOW_INDEX:
1492 reg_value =
1493 IGA2_HOR_TOTAL_SHADOW_FORMULA
1494 (panel_timing.hor_total);
1495 viafb_load_reg_Num =
1496 iga2_shadow_crtc_reg.hor_total_shadow.
1497 reg_num;
1498 reg = iga2_shadow_crtc_reg.hor_total_shadow.reg;
1499 break;
1500 case H_BLANK_END_SHADOW_INDEX:
1501 reg_value =
1502 IGA2_HOR_BLANK_END_SHADOW_FORMULA
1503 (panel_timing.hor_blank_start,
1504 panel_timing.hor_blank_end);
1505 viafb_load_reg_Num =
1506 iga2_shadow_crtc_reg.
1507 hor_blank_end_shadow.reg_num;
1508 reg =
1509 iga2_shadow_crtc_reg.
1510 hor_blank_end_shadow.reg;
1511 break;
1512 case V_TOTAL_SHADOW_INDEX:
1513 reg_value =
1514 IGA2_VER_TOTAL_SHADOW_FORMULA
1515 (panel_timing.ver_total);
1516 viafb_load_reg_Num =
1517 iga2_shadow_crtc_reg.ver_total_shadow.
1518 reg_num;
1519 reg = iga2_shadow_crtc_reg.ver_total_shadow.reg;
1520 break;
1521 case V_ADDR_SHADOW_INDEX:
1522 reg_value =
1523 IGA2_VER_ADDR_SHADOW_FORMULA
1524 (panel_timing.ver_addr);
1525 viafb_load_reg_Num =
1526 iga2_shadow_crtc_reg.ver_addr_shadow.
1527 reg_num;
1528 reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg;
1529 break;
1530 case V_BLANK_SATRT_SHADOW_INDEX:
1531 reg_value =
1532 IGA2_VER_BLANK_START_SHADOW_FORMULA
1533 (panel_timing.ver_blank_start);
1534 viafb_load_reg_Num =
1535 iga2_shadow_crtc_reg.
1536 ver_blank_start_shadow.reg_num;
1537 reg =
1538 iga2_shadow_crtc_reg.
1539 ver_blank_start_shadow.reg;
1540 break;
1541 case V_BLANK_END_SHADOW_INDEX:
1542 reg_value =
1543 IGA2_VER_BLANK_END_SHADOW_FORMULA
1544 (panel_timing.ver_blank_start,
1545 panel_timing.ver_blank_end);
1546 viafb_load_reg_Num =
1547 iga2_shadow_crtc_reg.
1548 ver_blank_end_shadow.reg_num;
1549 reg =
1550 iga2_shadow_crtc_reg.
1551 ver_blank_end_shadow.reg;
1552 break;
1553 case V_SYNC_SATRT_SHADOW_INDEX:
1554 reg_value =
1555 IGA2_VER_SYNC_START_SHADOW_FORMULA
1556 (panel_timing.ver_sync_start);
1557 viafb_load_reg_Num =
1558 iga2_shadow_crtc_reg.
1559 ver_sync_start_shadow.reg_num;
1560 reg =
1561 iga2_shadow_crtc_reg.
1562 ver_sync_start_shadow.reg;
1563 break;
1564 case V_SYNC_END_SHADOW_INDEX:
1565 reg_value =
1566 IGA2_VER_SYNC_END_SHADOW_FORMULA
1567 (panel_timing.ver_sync_start,
1568 panel_timing.ver_sync_end);
1569 viafb_load_reg_Num =
1570 iga2_shadow_crtc_reg.
1571 ver_sync_end_shadow.reg_num;
1572 reg =
1573 iga2_shadow_crtc_reg.
1574 ver_sync_end_shadow.reg;
1575 break;
1576 }
1577 viafb_load_reg(reg_value,
1578 viafb_load_reg_Num, reg, VIACR);
1579 }
1580 } else { /* Centering */
1581 for (i = 12; i < 20; i++) {
1582 switch (i) {
1583 case H_TOTAL_SHADOW_INDEX:
1584 reg_value =
1585 IGA2_HOR_TOTAL_SHADOW_FORMULA
1586 (panel_timing.hor_total);
1587 viafb_load_reg_Num =
1588 iga2_shadow_crtc_reg.hor_total_shadow.
1589 reg_num;
1590 reg = iga2_shadow_crtc_reg.hor_total_shadow.reg;
1591 break;
1592 case H_BLANK_END_SHADOW_INDEX:
1593 reg_value =
1594 IGA2_HOR_BLANK_END_SHADOW_FORMULA
1595 (panel_timing.hor_blank_start,
1596 panel_timing.hor_blank_end);
1597 viafb_load_reg_Num =
1598 iga2_shadow_crtc_reg.
1599 hor_blank_end_shadow.reg_num;
1600 reg =
1601 iga2_shadow_crtc_reg.
1602 hor_blank_end_shadow.reg;
1603 break;
1604 case V_TOTAL_SHADOW_INDEX:
1605 reg_value =
1606 IGA2_VER_TOTAL_SHADOW_FORMULA
1607 (panel_timing.ver_total);
1608 viafb_load_reg_Num =
1609 iga2_shadow_crtc_reg.ver_total_shadow.
1610 reg_num;
1611 reg = iga2_shadow_crtc_reg.ver_total_shadow.reg;
1612 break;
1613 case V_ADDR_SHADOW_INDEX:
1614 reg_value =
1615 IGA2_VER_ADDR_SHADOW_FORMULA
1616 (mode_timing.ver_addr);
1617 viafb_load_reg_Num =
1618 iga2_shadow_crtc_reg.ver_addr_shadow.
1619 reg_num;
1620 reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg;
1621 break;
1622 case V_BLANK_SATRT_SHADOW_INDEX:
1623 reg_value =
1624 IGA2_VER_BLANK_START_SHADOW_FORMULA
1625 (mode_timing.ver_blank_start);
1626 viafb_load_reg_Num =
1627 iga2_shadow_crtc_reg.
1628 ver_blank_start_shadow.reg_num;
1629 reg =
1630 iga2_shadow_crtc_reg.
1631 ver_blank_start_shadow.reg;
1632 break;
1633 case V_BLANK_END_SHADOW_INDEX:
1634 reg_value =
1635 IGA2_VER_BLANK_END_SHADOW_FORMULA
1636 (panel_timing.ver_blank_start,
1637 panel_timing.ver_blank_end);
1638 viafb_load_reg_Num =
1639 iga2_shadow_crtc_reg.
1640 ver_blank_end_shadow.reg_num;
1641 reg =
1642 iga2_shadow_crtc_reg.
1643 ver_blank_end_shadow.reg;
1644 break;
1645 case V_SYNC_SATRT_SHADOW_INDEX:
1646 reg_value =
1647 IGA2_VER_SYNC_START_SHADOW_FORMULA(
1648 (panel_timing.ver_sync_start -
1649 panel_timing.ver_blank_start) +
1650 (panel_timing.ver_addr -
1651 mode_timing.ver_addr) / 2 +
1652 mode_timing.ver_addr);
1653 viafb_load_reg_Num =
1654 iga2_shadow_crtc_reg.ver_sync_start_shadow.
1655 reg_num;
1656 reg =
1657 iga2_shadow_crtc_reg.ver_sync_start_shadow.
1658 reg;
1659 break;
1660 case V_SYNC_END_SHADOW_INDEX:
1661 reg_value =
1662 IGA2_VER_SYNC_END_SHADOW_FORMULA(
1663 (panel_timing.ver_sync_start -
1664 panel_timing.ver_blank_start) +
1665 (panel_timing.ver_addr -
1666 mode_timing.ver_addr) / 2 +
1667 mode_timing.ver_addr,
1668 panel_timing.ver_sync_end);
1669 viafb_load_reg_Num =
1670 iga2_shadow_crtc_reg.ver_sync_end_shadow.
1671 reg_num;
1672 reg =
1673 iga2_shadow_crtc_reg.ver_sync_end_shadow.
1674 reg;
1675 break;
1676 }
1677 viafb_load_reg(reg_value,
1678 viafb_load_reg_Num, reg, VIACR);
1679 }
1680 }
1681}
1682
1683bool viafb_lcd_get_mobile_state(bool *mobile) 1091bool viafb_lcd_get_mobile_state(bool *mobile)
1684{ 1092{
1685 unsigned char *romptr, *tableptr; 1093 unsigned char *romptr, *tableptr;
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 7cd03e2a1275..d55aaa7b912c 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -43,61 +43,6 @@
43/* Video Memory Size */ 43/* Video Memory Size */
44#define VIDEO_MEMORY_SIZE_16M 0x1000000 44#define VIDEO_MEMORY_SIZE_16M 0x1000000
45 45
46/* Definition Mode Index
47*/
48#define VIA_RES_640X480 0
49#define VIA_RES_800X600 1
50#define VIA_RES_1024X768 2
51#define VIA_RES_1152X864 3
52#define VIA_RES_1280X1024 4
53#define VIA_RES_1600X1200 5
54#define VIA_RES_1440X1050 6
55#define VIA_RES_1280X768 7
56#define VIA_RES_1280X960 8
57#define VIA_RES_1920X1440 9
58#define VIA_RES_848X480 10
59#define VIA_RES_1400X1050 11
60#define VIA_RES_720X480 12
61#define VIA_RES_720X576 13
62#define VIA_RES_1024X512 14
63#define VIA_RES_856X480 15
64#define VIA_RES_1024X576 16
65#define VIA_RES_640X400 17
66#define VIA_RES_1280X720 18
67#define VIA_RES_1920X1080 19
68#define VIA_RES_800X480 20
69#define VIA_RES_1368X768 21
70#define VIA_RES_1024X600 22
71#define VIA_RES_1280X800 23
72#define VIA_RES_1680X1050 24
73#define VIA_RES_960X600 25
74#define VIA_RES_1000X600 26
75#define VIA_RES_1088X612 27
76#define VIA_RES_1152X720 28
77#define VIA_RES_1200X720 29
78#define VIA_RES_1280X600 30
79#define VIA_RES_1360X768 31
80#define VIA_RES_1366X768 32
81#define VIA_RES_1440X900 33
82#define VIA_RES_1600X900 34
83#define VIA_RES_1600X1024 35
84#define VIA_RES_1792X1344 36
85#define VIA_RES_1856X1392 37
86#define VIA_RES_1920X1200 38
87#define VIA_RES_2048X1536 39
88#define VIA_RES_480X640 40
89
90/*Reduce Blanking*/
91#define VIA_RES_1360X768_RB 131
92#define VIA_RES_1440X900_RB 133
93#define VIA_RES_1400X1050_RB 111
94#define VIA_RES_1600X900_RB 134
95#define VIA_RES_1680X1050_RB 124
96#define VIA_RES_1920X1080_RB 119
97#define VIA_RES_1920X1200_RB 138
98
99#define VIA_RES_INVALID 255
100
101/* standard VGA IO port 46/* standard VGA IO port
102*/ 47*/
103#define VIARMisc 0x3CC 48#define VIARMisc 0x3CC
@@ -118,7 +63,6 @@
118/* Display path */ 63/* Display path */
119#define IGA1 1 64#define IGA1 1
120#define IGA2 2 65#define IGA2 2
121#define IGA1_IGA2 3
122 66
123/* Define Color Depth */ 67/* Define Color Depth */
124#define MODE_8BPP 1 68#define MODE_8BPP 1
diff --git a/drivers/video/via/via_utility.c b/drivers/video/via/via_utility.c
index d53c3d54ed8e..aefdeeec89b1 100644
--- a/drivers/video/via/via_utility.c
+++ b/drivers/video/via/via_utility.c
@@ -239,15 +239,3 @@ void viafb_get_gamma_support_state(int bpp, unsigned int *support_state)
239 else 239 else
240 *support_state = CRT_Device | DVI_Device | LCD_Device; 240 *support_state = CRT_Device | DVI_Device | LCD_Device;
241} 241}
242
243int viafb_input_parameter_converter(int parameter_value)
244{
245 int result;
246
247 if (parameter_value >= 1 && parameter_value <= 9)
248 result = 1 << (parameter_value - 1);
249 else
250 result = 1;
251
252 return result;
253}
diff --git a/drivers/video/via/via_utility.h b/drivers/video/via/via_utility.h
index 2fd455202ebd..1670ba82143f 100644
--- a/drivers/video/via/via_utility.h
+++ b/drivers/video/via/via_utility.h
@@ -30,6 +30,5 @@ bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres);
30void viafb_set_gamma_table(int bpp, unsigned int *gamma_table); 30void viafb_set_gamma_table(int bpp, unsigned int *gamma_table);
31void viafb_get_gamma_table(unsigned int *gamma_table); 31void viafb_get_gamma_table(unsigned int *gamma_table);
32void viafb_get_gamma_support_state(int bpp, unsigned int *support_state); 32void viafb_get_gamma_support_state(int bpp, unsigned int *support_state);
33int viafb_input_parameter_converter(int parameter_value);
34 33
35#endif /* __VIAUTILITY_H__ */ 34#endif /* __VIAUTILITY_H__ */
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 3028e7ddc3b5..ce7783b63f6a 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -26,18 +26,22 @@
26 26
27#include "global.h" 27#include "global.h"
28 28
29static struct fb_var_screeninfo default_var;
30static char *viafb_name = "Via"; 29static char *viafb_name = "Via";
31static u32 pseudo_pal[17]; 30static u32 pseudo_pal[17];
32 31
33/* video mode */ 32/* video mode */
34static char *viafb_mode = "640x480"; 33static char *viafb_mode;
35static char *viafb_mode1 = "640x480"; 34static char *viafb_mode1;
35static int viafb_bpp = 32;
36static int viafb_bpp1 = 32;
37
38static unsigned int viafb_second_offset;
39static int viafb_second_size;
36 40
37static int viafb_accel = 1; 41static int viafb_accel = 1;
38 42
39/* Added for specifying active devices.*/ 43/* Added for specifying active devices.*/
40char *viafb_active_dev = ""; 44char *viafb_active_dev;
41 45
42/*Added for specify lcd output port*/ 46/*Added for specify lcd output port*/
43char *viafb_lcd_port = ""; 47char *viafb_lcd_port = "";
@@ -50,18 +54,78 @@ static void apply_second_mode_setting(struct fb_var_screeninfo
50 *sec_var); 54 *sec_var);
51static void retrieve_device_setting(struct viafb_ioctl_setting 55static void retrieve_device_setting(struct viafb_ioctl_setting
52 *setting_info); 56 *setting_info);
57static int viafb_pan_display(struct fb_var_screeninfo *var,
58 struct fb_info *info);
53 59
54static struct fb_ops viafb_ops; 60static struct fb_ops viafb_ops;
55 61
56 62
63static void viafb_fill_var_color_info(struct fb_var_screeninfo *var, u8 depth)
64{
65 var->grayscale = 0;
66 var->red.msb_right = 0;
67 var->green.msb_right = 0;
68 var->blue.msb_right = 0;
69 var->transp.offset = 0;
70 var->transp.length = 0;
71 var->transp.msb_right = 0;
72 var->nonstd = 0;
73 switch (depth) {
74 case 8:
75 var->bits_per_pixel = 8;
76 var->red.offset = 0;
77 var->green.offset = 0;
78 var->blue.offset = 0;
79 var->red.length = 8;
80 var->green.length = 8;
81 var->blue.length = 8;
82 break;
83 case 15:
84 var->bits_per_pixel = 16;
85 var->red.offset = 10;
86 var->green.offset = 5;
87 var->blue.offset = 0;
88 var->red.length = 5;
89 var->green.length = 5;
90 var->blue.length = 5;
91 break;
92 case 16:
93 var->bits_per_pixel = 16;
94 var->red.offset = 11;
95 var->green.offset = 5;
96 var->blue.offset = 0;
97 var->red.length = 5;
98 var->green.length = 6;
99 var->blue.length = 5;
100 break;
101 case 24:
102 var->bits_per_pixel = 32;
103 var->red.offset = 16;
104 var->green.offset = 8;
105 var->blue.offset = 0;
106 var->red.length = 8;
107 var->green.length = 8;
108 var->blue.length = 8;
109 break;
110 case 30:
111 var->bits_per_pixel = 32;
112 var->red.offset = 20;
113 var->green.offset = 10;
114 var->blue.offset = 0;
115 var->red.length = 10;
116 var->green.length = 10;
117 var->blue.length = 10;
118 break;
119 }
120}
121
57static void viafb_update_fix(struct fb_info *info) 122static void viafb_update_fix(struct fb_info *info)
58{ 123{
59 u32 bpp = info->var.bits_per_pixel; 124 u32 bpp = info->var.bits_per_pixel;
60 125
61 info->fix.visual = 126 info->fix.visual =
62 bpp == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; 127 bpp == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
63 info->fix.line_length = 128 info->fix.line_length = (info->var.xres_virtual * bpp / 8 + 7) & ~7;
64 ((info->var.xres_virtual + 7) & ~7) * bpp / 8;
65} 129}
66 130
67static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix, 131static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix,
@@ -75,6 +139,7 @@ static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix,
75 139
76 fix->type = FB_TYPE_PACKED_PIXELS; 140 fix->type = FB_TYPE_PACKED_PIXELS;
77 fix->type_aux = 0; 141 fix->type_aux = 0;
142 fix->visual = FB_VISUAL_TRUECOLOR;
78 143
79 fix->xpanstep = fix->ywrapstep = 0; 144 fix->xpanstep = fix->ywrapstep = 0;
80 fix->ypanstep = 1; 145 fix->ypanstep = 1;
@@ -97,9 +162,10 @@ static int viafb_release(struct fb_info *info, int user)
97static int viafb_check_var(struct fb_var_screeninfo *var, 162static int viafb_check_var(struct fb_var_screeninfo *var,
98 struct fb_info *info) 163 struct fb_info *info)
99{ 164{
100 int vmode_index, htotal, vtotal; 165 int htotal, vtotal, depth;
166 struct VideoModeTable *vmode_entry;
101 struct viafb_par *ppar = info->par; 167 struct viafb_par *ppar = info->par;
102 u32 long_refresh; 168 u32 long_refresh, line;
103 169
104 DEBUG_MSG(KERN_INFO "viafb_check_var!\n"); 170 DEBUG_MSG(KERN_INFO "viafb_check_var!\n");
105 /* Sanity check */ 171 /* Sanity check */
@@ -107,26 +173,36 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
107 if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE) 173 if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE)
108 return -EINVAL; 174 return -EINVAL;
109 175
110 vmode_index = viafb_get_mode_index(var->xres, var->yres); 176 vmode_entry = viafb_get_mode(var->xres, var->yres);
111 if (vmode_index == VIA_RES_INVALID) { 177 if (!vmode_entry) {
112 DEBUG_MSG(KERN_INFO 178 DEBUG_MSG(KERN_INFO
113 "viafb: Mode %dx%dx%d not supported!!\n", 179 "viafb: Mode %dx%dx%d not supported!!\n",
114 var->xres, var->yres, var->bits_per_pixel); 180 var->xres, var->yres, var->bits_per_pixel);
115 return -EINVAL; 181 return -EINVAL;
116 } 182 }
117 183
118 if (24 == var->bits_per_pixel) 184 depth = fb_get_color_depth(var, &info->fix);
119 var->bits_per_pixel = 32; 185 if (!depth)
186 depth = var->bits_per_pixel;
120 187
121 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 && 188 if (depth < 0 || depth > 32)
122 var->bits_per_pixel != 32)
123 return -EINVAL; 189 return -EINVAL;
190 else if (!depth)
191 depth = 24;
192 else if (depth == 15 && viafb_dual_fb && ppar->iga_path == IGA1)
193 depth = 15;
194 else if (depth == 30)
195 depth = 30;
196 else if (depth <= 8)
197 depth = 8;
198 else if (depth <= 16)
199 depth = 16;
200 else
201 depth = 24;
124 202
125 if ((var->xres_virtual * (var->bits_per_pixel >> 3)) & 0x1F) 203 viafb_fill_var_color_info(var, depth);
126 /*32 pixel alignment */ 204 line = (var->xres_virtual * var->bits_per_pixel / 8 + 7) & ~7;
127 var->xres_virtual = (var->xres_virtual + 31) & ~31; 205 if (line * var->yres_virtual > ppar->memsize)
128 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
129 ppar->memsize)
130 return -EINVAL; 206 return -EINVAL;
131 207
132 /* Based on var passed in to calculate the refresh, 208 /* Based on var passed in to calculate the refresh,
@@ -142,7 +218,7 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
142 viafb_refresh = viafb_get_refresh(var->xres, var->yres, long_refresh); 218 viafb_refresh = viafb_get_refresh(var->xres, var->yres, long_refresh);
143 219
144 /* Adjust var according to our driver's own table */ 220 /* Adjust var according to our driver's own table */
145 viafb_fill_var_timing_info(var, viafb_refresh, vmode_index); 221 viafb_fill_var_timing_info(var, viafb_refresh, vmode_entry);
146 if (info->var.accel_flags & FB_ACCELF_TEXT && 222 if (info->var.accel_flags & FB_ACCELF_TEXT &&
147 !ppar->shared->engine_mmio) 223 !ppar->shared->engine_mmio)
148 info->var.accel_flags = 0; 224 info->var.accel_flags = 0;
@@ -153,39 +229,45 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
153static int viafb_set_par(struct fb_info *info) 229static int viafb_set_par(struct fb_info *info)
154{ 230{
155 struct viafb_par *viapar = info->par; 231 struct viafb_par *viapar = info->par;
156 int vmode_index; 232 struct VideoModeTable *vmode_entry, *vmode_entry1 = NULL;
157 int vmode_index1 = 0;
158 DEBUG_MSG(KERN_INFO "viafb_set_par!\n"); 233 DEBUG_MSG(KERN_INFO "viafb_set_par!\n");
159 234
160 viapar->depth = fb_get_color_depth(&info->var, &info->fix); 235 viapar->depth = fb_get_color_depth(&info->var, &info->fix);
161 viafb_update_device_setting(info->var.xres, info->var.yres, 236 viafb_update_device_setting(viafbinfo->var.xres, viafbinfo->var.yres,
162 info->var.bits_per_pixel, viafb_refresh, 0); 237 viafbinfo->var.bits_per_pixel, viafb_refresh, 0);
163 238
164 vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres); 239 vmode_entry = viafb_get_mode(viafbinfo->var.xres, viafbinfo->var.yres);
165 240 if (viafb_dual_fb) {
166 if (viafb_SAMM_ON == 1) { 241 vmode_entry1 = viafb_get_mode(viafbinfo1->var.xres,
242 viafbinfo1->var.yres);
243 viafb_update_device_setting(viafbinfo1->var.xres,
244 viafbinfo1->var.yres, viafbinfo1->var.bits_per_pixel,
245 viafb_refresh1, 1);
246 } else if (viafb_SAMM_ON == 1) {
167 DEBUG_MSG(KERN_INFO 247 DEBUG_MSG(KERN_INFO
168 "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n", 248 "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n",
169 viafb_second_xres, viafb_second_yres, viafb_bpp1); 249 viafb_second_xres, viafb_second_yres, viafb_bpp1);
170 vmode_index1 = viafb_get_mode_index(viafb_second_xres, 250 vmode_entry1 = viafb_get_mode(viafb_second_xres,
171 viafb_second_yres); 251 viafb_second_yres);
172 DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n",
173 vmode_index1);
174 252
175 viafb_update_device_setting(viafb_second_xres, 253 viafb_update_device_setting(viafb_second_xres,
176 viafb_second_yres, viafb_bpp1, viafb_refresh1, 1); 254 viafb_second_yres, viafb_bpp1, viafb_refresh1, 1);
177 } 255 }
178 256
179 if (vmode_index != VIA_RES_INVALID) { 257 if (vmode_entry) {
180 viafb_update_fix(info); 258 viafb_update_fix(info);
181 viafb_bpp = info->var.bits_per_pixel; 259 if (viafb_dual_fb && viapar->iga_path == IGA2)
260 viafb_bpp1 = info->var.bits_per_pixel;
261 else
262 viafb_bpp = info->var.bits_per_pixel;
263
182 if (info->var.accel_flags & FB_ACCELF_TEXT) 264 if (info->var.accel_flags & FB_ACCELF_TEXT)
183 info->flags &= ~FBINFO_HWACCEL_DISABLED; 265 info->flags &= ~FBINFO_HWACCEL_DISABLED;
184 else 266 else
185 info->flags |= FBINFO_HWACCEL_DISABLED; 267 info->flags |= FBINFO_HWACCEL_DISABLED;
186 viafb_setmode(vmode_index, info->var.xres, info->var.yres, 268 viafb_setmode(vmode_entry, info->var.bits_per_pixel,
187 info->var.bits_per_pixel, vmode_index1, 269 vmode_entry1, viafb_bpp1);
188 viafb_second_xres, viafb_second_yres, viafb_bpp1); 270 viafb_pan_display(&info->var, info);
189 } 271 }
190 272
191 return 0; 273 return 0;
@@ -195,234 +277,52 @@ static int viafb_set_par(struct fb_info *info)
195static int viafb_setcolreg(unsigned regno, unsigned red, unsigned green, 277static int viafb_setcolreg(unsigned regno, unsigned red, unsigned green,
196unsigned blue, unsigned transp, struct fb_info *info) 278unsigned blue, unsigned transp, struct fb_info *info)
197{ 279{
198 u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10; 280 struct viafb_par *viapar = info->par;
199 unsigned cmap_entries = (info->var.bits_per_pixel == 8) ? 256 : 16; 281 u32 r, g, b;
200 DEBUG_MSG(KERN_INFO "viafb_setcolreg!\n");
201 if (regno >= cmap_entries)
202 return 1;
203 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
204 /*
205 * Read PCI bus 0,dev 0,function 0,index 0xF6 to get chip rev.
206 */
207 outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
208 rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
209 }
210 switch (info->var.bits_per_pixel) {
211 case 8:
212 outb(0x1A, 0x3C4);
213 sr1a = inb(0x3C5);
214 outb(0x1B, 0x3C4);
215 sr1b = inb(0x3C5);
216 outb(0x67, 0x3D4);
217 cr67 = inb(0x3D5);
218 outb(0x6A, 0x3D4);
219 cr6a = inb(0x3D5);
220
221 /* Map the 3C6/7/8/9 to the IGA2 */
222 outb(0x1A, 0x3C4);
223 outb(sr1a | 0x01, 0x3C5);
224 /* Second Display Engine colck always on */
225 outb(0x1B, 0x3C4);
226 outb(sr1b | 0x80, 0x3C5);
227 /* Second Display Color Depth 8 */
228 outb(0x67, 0x3D4);
229 outb(cr67 & 0x3F, 0x3D5);
230 outb(0x6A, 0x3D4);
231 /* Second Display Channel Reset CR6A[6]) */
232 outb(cr6a & 0xBF, 0x3D5);
233 /* Second Display Channel Enable CR6A[7] */
234 outb(cr6a | 0x80, 0x3D5);
235 /* Second Display Channel stop reset) */
236 outb(cr6a | 0x40, 0x3D5);
237
238 /* Bit mask of palette */
239 outb(0xFF, 0x3c6);
240 /* Write one register of IGA2 */
241 outb(regno, 0x3C8);
242 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
243 rev >= 15) {
244 shift = 8;
245 viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
246 viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
247 } else {
248 shift = 10;
249 viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
250 viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
251 }
252 outb(red >> shift, 0x3C9);
253 outb(green >> shift, 0x3C9);
254 outb(blue >> shift, 0x3C9);
255
256 /* Map the 3C6/7/8/9 to the IGA1 */
257 outb(0x1A, 0x3C4);
258 outb(sr1a & 0xFE, 0x3C5);
259 /* Bit mask of palette */
260 outb(0xFF, 0x3c6);
261 /* Write one register of IGA1 */
262 outb(regno, 0x3C8);
263 outb(red >> shift, 0x3C9);
264 outb(green >> shift, 0x3C9);
265 outb(blue >> shift, 0x3C9);
266
267 outb(0x1A, 0x3C4);
268 outb(sr1a, 0x3C5);
269 outb(0x1B, 0x3C4);
270 outb(sr1b, 0x3C5);
271 outb(0x67, 0x3D4);
272 outb(cr67, 0x3D5);
273 outb(0x6A, 0x3D4);
274 outb(cr6a, 0x3D5);
275 break;
276 case 16:
277 ((u32 *) info->pseudo_palette)[regno] = (red & 0xF800) |
278 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
279 break;
280 case 32:
281 ((u32 *) info->pseudo_palette)[regno] =
282 ((transp & 0xFF00) << 16) |
283 ((red & 0xFF00) << 8) |
284 ((green & 0xFF00)) | ((blue & 0xFF00) >> 8);
285 break;
286 }
287
288 return 0;
289 282
290} 283 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
284 if (regno > 255)
285 return -EINVAL;
291 286
292/*CALLED BY: fb_set_cmap */ 287 if (!viafb_dual_fb || viapar->iga_path == IGA1)
293/* fb_set_var, pass 256 colors */ 288 viafb_set_primary_color_register(regno, red >> 8,
294/*CALLED BY: fb_set_cmap */ 289 green >> 8, blue >> 8);
295/* fbcon_set_palette, pass 16 colors */
296static int viafb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
297{
298 u32 len = cmap->len;
299 u32 i;
300 u16 *pred = cmap->red;
301 u16 *pgreen = cmap->green;
302 u16 *pblue = cmap->blue;
303 u16 *ptransp = cmap->transp;
304 u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
305 if (len > 256)
306 return 1;
307 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
308 /*
309 * Read PCI bus 0, dev 0, function 0, index 0xF6 to get chip
310 * rev.
311 */
312 outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
313 rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
314 }
315 switch (info->var.bits_per_pixel) {
316 case 8:
317 outb(0x1A, 0x3C4);
318 sr1a = inb(0x3C5);
319 outb(0x1B, 0x3C4);
320 sr1b = inb(0x3C5);
321 outb(0x67, 0x3D4);
322 cr67 = inb(0x3D5);
323 outb(0x6A, 0x3D4);
324 cr6a = inb(0x3D5);
325 /* Map the 3C6/7/8/9 to the IGA2 */
326 outb(0x1A, 0x3C4);
327 outb(sr1a | 0x01, 0x3C5);
328 outb(0x1B, 0x3C4);
329 /* Second Display Engine colck always on */
330 outb(sr1b | 0x80, 0x3C5);
331 outb(0x67, 0x3D4);
332 /* Second Display Color Depth 8 */
333 outb(cr67 & 0x3F, 0x3D5);
334 outb(0x6A, 0x3D4);
335 /* Second Display Channel Reset CR6A[6]) */
336 outb(cr6a & 0xBF, 0x3D5);
337 /* Second Display Channel Enable CR6A[7] */
338 outb(cr6a | 0x80, 0x3D5);
339 /* Second Display Channel stop reset) */
340 outb(cr6a | 0xC0, 0x3D5);
341
342 /* Bit mask of palette */
343 outb(0xFF, 0x3c6);
344 outb(0x00, 0x3C8);
345 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
346 rev >= 15) {
347 shift = 8;
348 viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
349 viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
350 } else {
351 shift = 10;
352 viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
353 viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
354 }
355 for (i = 0; i < len; i++) {
356 outb((*(pred + i)) >> shift, 0x3C9);
357 outb((*(pgreen + i)) >> shift, 0x3C9);
358 outb((*(pblue + i)) >> shift, 0x3C9);
359 }
360 290
361 outb(0x1A, 0x3C4); 291 if (!viafb_dual_fb || viapar->iga_path == IGA2)
362 /* Map the 3C6/7/8/9 to the IGA1 */ 292 viafb_set_secondary_color_register(regno, red >> 8,
363 outb(sr1a & 0xFE, 0x3C5); 293 green >> 8, blue >> 8);
364 /* Bit mask of palette */ 294 } else {
365 outb(0xFF, 0x3c6); 295 if (regno > 15)
366 outb(0x00, 0x3C8); 296 return -EINVAL;
367 for (i = 0; i < len; i++) {
368 outb((*(pred + i)) >> shift, 0x3C9);
369 outb((*(pgreen + i)) >> shift, 0x3C9);
370 outb((*(pblue + i)) >> shift, 0x3C9);
371 }
372 297
373 outb(0x1A, 0x3C4); 298 r = (red >> (16 - info->var.red.length))
374 outb(sr1a, 0x3C5); 299 << info->var.red.offset;
375 outb(0x1B, 0x3C4); 300 b = (blue >> (16 - info->var.blue.length))
376 outb(sr1b, 0x3C5); 301 << info->var.blue.offset;
377 outb(0x67, 0x3D4); 302 g = (green >> (16 - info->var.green.length))
378 outb(cr67, 0x3D5); 303 << info->var.green.offset;
379 outb(0x6A, 0x3D4); 304 ((u32 *) info->pseudo_palette)[regno] = r | g | b;
380 outb(cr6a, 0x3D5);
381 break;
382 case 16:
383 if (len > 17)
384 return 0; /* Because static u32 pseudo_pal[17]; */
385 for (i = 0; i < len; i++)
386 ((u32 *) info->pseudo_palette)[i] =
387 (*(pred + i) & 0xF800) |
388 ((*(pgreen + i) & 0xFC00) >> 5) |
389 ((*(pblue + i) & 0xF800) >> 11);
390 break;
391 case 32:
392 if (len > 17)
393 return 0;
394 if (ptransp) {
395 for (i = 0; i < len; i++)
396 ((u32 *) info->pseudo_palette)[i] =
397 ((*(ptransp + i) & 0xFF00) << 16) |
398 ((*(pred + i) & 0xFF00) << 8) |
399 ((*(pgreen + i) & 0xFF00)) |
400 ((*(pblue + i) & 0xFF00) >> 8);
401 } else {
402 for (i = 0; i < len; i++)
403 ((u32 *) info->pseudo_palette)[i] =
404 0x00000000 |
405 ((*(pred + i) & 0xFF00) << 8) |
406 ((*(pgreen + i) & 0xFF00)) |
407 ((*(pblue + i) & 0xFF00) >> 8);
408 }
409 break;
410 } 305 }
306
411 return 0; 307 return 0;
412} 308}
413 309
414static int viafb_pan_display(struct fb_var_screeninfo *var, 310static int viafb_pan_display(struct fb_var_screeninfo *var,
415 struct fb_info *info) 311 struct fb_info *info)
416{ 312{
417 unsigned int offset; 313 struct viafb_par *viapar = info->par;
418 314 u32 vram_addr = (var->yoffset * var->xres_virtual + var->xoffset)
419 DEBUG_MSG(KERN_INFO "viafb_pan_display!\n"); 315 * (var->bits_per_pixel / 8) + viapar->vram_addr;
420 316
421 offset = (var->xoffset + (var->yoffset * var->xres_virtual)) * 317 DEBUG_MSG(KERN_DEBUG "viafb_pan_display, address = %d\n", vram_addr);
422 var->bits_per_pixel / 16; 318 if (!viafb_dual_fb) {
319 viafb_set_primary_address(vram_addr);
320 viafb_set_secondary_address(vram_addr);
321 } else if (viapar->iga_path == IGA1)
322 viafb_set_primary_address(vram_addr);
323 else
324 viafb_set_secondary_address(vram_addr);
423 325
424 DEBUG_MSG(KERN_INFO "\nviafb_pan_display,offset =%d ", offset);
425 viafb_set_primary_address(offset);
426 return 0; 326 return 0;
427} 327}
428 328
@@ -476,6 +376,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
476 u32 gpu32; 376 u32 gpu32;
477 377
478 DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd); 378 DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd);
379 printk(KERN_WARNING "viafb_ioctl: Please avoid this interface as it is unstable and might change or vanish at any time!\n");
479 memset(&u, 0, sizeof(u)); 380 memset(&u, 0, sizeof(u));
480 381
481 switch (cmd) { 382 switch (cmd) {
@@ -1015,23 +916,6 @@ static int viafb_sync(struct fb_info *info)
1015 return 0; 916 return 0;
1016} 917}
1017 918
1018int viafb_get_mode_index(int hres, int vres)
1019{
1020 u32 i;
1021 DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n");
1022
1023 for (i = 0; i < NUM_TOTAL_MODETABLE; i++)
1024 if (CLE266Modes[i].mode_array &&
1025 CLE266Modes[i].crtc[0].crtc.hor_addr == hres &&
1026 CLE266Modes[i].crtc[0].crtc.ver_addr == vres)
1027 break;
1028
1029 if (i == NUM_TOTAL_MODETABLE)
1030 return VIA_RES_INVALID;
1031
1032 return CLE266Modes[i].ModeIndex;
1033}
1034
1035static void check_available_device_to_enable(int device_id) 919static void check_available_device_to_enable(int device_id)
1036{ 920{
1037 int device_num = 0; 921 int device_num = 0;
@@ -1330,7 +1214,7 @@ static void retrieve_device_setting(struct viafb_ioctl_setting
1330 setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode; 1214 setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode;
1331} 1215}
1332 1216
1333static void parse_active_dev(void) 1217static int parse_active_dev(void)
1334{ 1218{
1335 viafb_CRT_ON = STATE_OFF; 1219 viafb_CRT_ON = STATE_OFF;
1336 viafb_DVI_ON = STATE_OFF; 1220 viafb_DVI_ON = STATE_OFF;
@@ -1341,60 +1225,63 @@ static void parse_active_dev(void)
1341 IGA path to devices in SAMM case. */ 1225 IGA path to devices in SAMM case. */
1342 /* Note: The previous of active_dev is primary device, 1226 /* Note: The previous of active_dev is primary device,
1343 and the following is secondary device. */ 1227 and the following is secondary device. */
1344 if (!strncmp(viafb_active_dev, "CRT+DVI", 7)) { 1228 if (!viafb_active_dev) {
1229 viafb_CRT_ON = STATE_ON;
1230 viafb_SAMM_ON = STATE_OFF;
1231 } else if (!strcmp(viafb_active_dev, "CRT+DVI")) {
1345 /* CRT+DVI */ 1232 /* CRT+DVI */
1346 viafb_CRT_ON = STATE_ON; 1233 viafb_CRT_ON = STATE_ON;
1347 viafb_DVI_ON = STATE_ON; 1234 viafb_DVI_ON = STATE_ON;
1348 viafb_primary_dev = CRT_Device; 1235 viafb_primary_dev = CRT_Device;
1349 } else if (!strncmp(viafb_active_dev, "DVI+CRT", 7)) { 1236 } else if (!strcmp(viafb_active_dev, "DVI+CRT")) {
1350 /* DVI+CRT */ 1237 /* DVI+CRT */
1351 viafb_CRT_ON = STATE_ON; 1238 viafb_CRT_ON = STATE_ON;
1352 viafb_DVI_ON = STATE_ON; 1239 viafb_DVI_ON = STATE_ON;
1353 viafb_primary_dev = DVI_Device; 1240 viafb_primary_dev = DVI_Device;
1354 } else if (!strncmp(viafb_active_dev, "CRT+LCD", 7)) { 1241 } else if (!strcmp(viafb_active_dev, "CRT+LCD")) {
1355 /* CRT+LCD */ 1242 /* CRT+LCD */
1356 viafb_CRT_ON = STATE_ON; 1243 viafb_CRT_ON = STATE_ON;
1357 viafb_LCD_ON = STATE_ON; 1244 viafb_LCD_ON = STATE_ON;
1358 viafb_primary_dev = CRT_Device; 1245 viafb_primary_dev = CRT_Device;
1359 } else if (!strncmp(viafb_active_dev, "LCD+CRT", 7)) { 1246 } else if (!strcmp(viafb_active_dev, "LCD+CRT")) {
1360 /* LCD+CRT */ 1247 /* LCD+CRT */
1361 viafb_CRT_ON = STATE_ON; 1248 viafb_CRT_ON = STATE_ON;
1362 viafb_LCD_ON = STATE_ON; 1249 viafb_LCD_ON = STATE_ON;
1363 viafb_primary_dev = LCD_Device; 1250 viafb_primary_dev = LCD_Device;
1364 } else if (!strncmp(viafb_active_dev, "DVI+LCD", 7)) { 1251 } else if (!strcmp(viafb_active_dev, "DVI+LCD")) {
1365 /* DVI+LCD */ 1252 /* DVI+LCD */
1366 viafb_DVI_ON = STATE_ON; 1253 viafb_DVI_ON = STATE_ON;
1367 viafb_LCD_ON = STATE_ON; 1254 viafb_LCD_ON = STATE_ON;
1368 viafb_primary_dev = DVI_Device; 1255 viafb_primary_dev = DVI_Device;
1369 } else if (!strncmp(viafb_active_dev, "LCD+DVI", 7)) { 1256 } else if (!strcmp(viafb_active_dev, "LCD+DVI")) {
1370 /* LCD+DVI */ 1257 /* LCD+DVI */
1371 viafb_DVI_ON = STATE_ON; 1258 viafb_DVI_ON = STATE_ON;
1372 viafb_LCD_ON = STATE_ON; 1259 viafb_LCD_ON = STATE_ON;
1373 viafb_primary_dev = LCD_Device; 1260 viafb_primary_dev = LCD_Device;
1374 } else if (!strncmp(viafb_active_dev, "LCD+LCD2", 8)) { 1261 } else if (!strcmp(viafb_active_dev, "LCD+LCD2")) {
1375 viafb_LCD_ON = STATE_ON; 1262 viafb_LCD_ON = STATE_ON;
1376 viafb_LCD2_ON = STATE_ON; 1263 viafb_LCD2_ON = STATE_ON;
1377 viafb_primary_dev = LCD_Device; 1264 viafb_primary_dev = LCD_Device;
1378 } else if (!strncmp(viafb_active_dev, "LCD2+LCD", 8)) { 1265 } else if (!strcmp(viafb_active_dev, "LCD2+LCD")) {
1379 viafb_LCD_ON = STATE_ON; 1266 viafb_LCD_ON = STATE_ON;
1380 viafb_LCD2_ON = STATE_ON; 1267 viafb_LCD2_ON = STATE_ON;
1381 viafb_primary_dev = LCD2_Device; 1268 viafb_primary_dev = LCD2_Device;
1382 } else if (!strncmp(viafb_active_dev, "CRT", 3)) { 1269 } else if (!strcmp(viafb_active_dev, "CRT")) {
1383 /* CRT only */ 1270 /* CRT only */
1384 viafb_CRT_ON = STATE_ON; 1271 viafb_CRT_ON = STATE_ON;
1385 viafb_SAMM_ON = STATE_OFF; 1272 viafb_SAMM_ON = STATE_OFF;
1386 } else if (!strncmp(viafb_active_dev, "DVI", 3)) { 1273 } else if (!strcmp(viafb_active_dev, "DVI")) {
1387 /* DVI only */ 1274 /* DVI only */
1388 viafb_DVI_ON = STATE_ON; 1275 viafb_DVI_ON = STATE_ON;
1389 viafb_SAMM_ON = STATE_OFF; 1276 viafb_SAMM_ON = STATE_OFF;
1390 } else if (!strncmp(viafb_active_dev, "LCD", 3)) { 1277 } else if (!strcmp(viafb_active_dev, "LCD")) {
1391 /* LCD only */ 1278 /* LCD only */
1392 viafb_LCD_ON = STATE_ON; 1279 viafb_LCD_ON = STATE_ON;
1393 viafb_SAMM_ON = STATE_OFF; 1280 viafb_SAMM_ON = STATE_OFF;
1394 } else { 1281 } else
1395 viafb_CRT_ON = STATE_ON; 1282 return -EINVAL;
1396 viafb_SAMM_ON = STATE_OFF; 1283
1397 } 1284 return 0;
1398} 1285}
1399 1286
1400static int parse_port(char *opt_str, int *output_interface) 1287static int parse_port(char *opt_str, int *output_interface)
@@ -1823,35 +1710,37 @@ static void viafb_remove_proc(struct proc_dir_entry *viafb_entry)
1823 remove_proc_entry("viafb", NULL); 1710 remove_proc_entry("viafb", NULL);
1824} 1711}
1825 1712
1826static void parse_mode(const char *str, u32 *xres, u32 *yres) 1713static int parse_mode(const char *str, u32 *xres, u32 *yres)
1827{ 1714{
1828 char *ptr; 1715 char *ptr;
1829 1716
1717 if (!str) {
1718 *xres = 640;
1719 *yres = 480;
1720 return 0;
1721 }
1722
1830 *xres = simple_strtoul(str, &ptr, 10); 1723 *xres = simple_strtoul(str, &ptr, 10);
1831 if (ptr[0] != 'x') 1724 if (ptr[0] != 'x')
1832 goto out_default; 1725 return -EINVAL;
1833 1726
1834 *yres = simple_strtoul(&ptr[1], &ptr, 10); 1727 *yres = simple_strtoul(&ptr[1], &ptr, 10);
1835 if (ptr[0]) 1728 if (ptr[0])
1836 goto out_default; 1729 return -EINVAL;
1837
1838 return;
1839 1730
1840out_default: 1731 return 0;
1841 printk(KERN_WARNING "viafb received invalid mode string: %s\n", str);
1842 *xres = 640;
1843 *yres = 480;
1844} 1732}
1845 1733
1846static int __devinit via_pci_probe(struct pci_dev *pdev, 1734static int __devinit via_pci_probe(struct pci_dev *pdev,
1847 const struct pci_device_id *ent) 1735 const struct pci_device_id *ent)
1848{ 1736{
1849 u32 default_xres, default_yres; 1737 u32 default_xres, default_yres;
1850 int vmode_index; 1738 struct VideoModeTable *vmode_entry;
1739 struct fb_var_screeninfo default_var;
1851 u32 viafb_par_length; 1740 u32 viafb_par_length;
1852 1741
1853 DEBUG_MSG(KERN_INFO "VIAFB PCI Probe!!\n"); 1742 DEBUG_MSG(KERN_INFO "VIAFB PCI Probe!!\n");
1854 1743 memset(&default_var, 0, sizeof(default_var));
1855 viafb_par_length = ALIGN(sizeof(struct viafb_par), BITS_PER_LONG/8); 1744 viafb_par_length = ALIGN(sizeof(struct viafb_par), BITS_PER_LONG/8);
1856 1745
1857 /* Allocate fb_info and ***_par here, also including some other needed 1746 /* Allocate fb_info and ***_par here, also including some other needed
@@ -1877,7 +1766,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
1877 1766
1878 if (viafb_dual_fb) 1767 if (viafb_dual_fb)
1879 viafb_SAMM_ON = 1; 1768 viafb_SAMM_ON = 1;
1880 parse_active_dev();
1881 parse_lcd_port(); 1769 parse_lcd_port();
1882 parse_dvi_port(); 1770 parse_dvi_port();
1883 1771
@@ -1926,9 +1814,7 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
1926 } 1814 }
1927 1815
1928 parse_mode(viafb_mode, &default_xres, &default_yres); 1816 parse_mode(viafb_mode, &default_xres, &default_yres);
1929 vmode_index = viafb_get_mode_index(default_xres, default_yres); 1817 vmode_entry = viafb_get_mode(default_xres, default_yres);
1930 DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index);
1931
1932 if (viafb_SAMM_ON == 1) { 1818 if (viafb_SAMM_ON == 1) {
1933 parse_mode(viafb_mode1, &viafb_second_xres, 1819 parse_mode(viafb_mode1, &viafb_second_xres,
1934 &viafb_second_yres); 1820 &viafb_second_yres);
@@ -1947,19 +1833,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
1947 viafb_second_virtual_yres = viafb_second_yres; 1833 viafb_second_virtual_yres = viafb_second_yres;
1948 } 1834 }
1949 1835
1950 switch (viafb_bpp) {
1951 case 0 ... 8:
1952 viafb_bpp = 8;
1953 break;
1954 case 9 ... 16:
1955 viafb_bpp = 16;
1956 break;
1957 case 17 ... 32:
1958 viafb_bpp = 32;
1959 break;
1960 default:
1961 viafb_bpp = 8;
1962 }
1963 default_var.xres = default_xres; 1836 default_var.xres = default_xres;
1964 default_var.yres = default_yres; 1837 default_var.yres = default_yres;
1965 switch (default_xres) { 1838 switch (default_xres) {
@@ -1972,8 +1845,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
1972 } 1845 }
1973 default_var.yres_virtual = default_yres; 1846 default_var.yres_virtual = default_yres;
1974 default_var.bits_per_pixel = viafb_bpp; 1847 default_var.bits_per_pixel = viafb_bpp;
1975 if (default_var.bits_per_pixel == 15)
1976 default_var.bits_per_pixel = 16;
1977 default_var.pixclock = 1848 default_var.pixclock =
1978 viafb_get_pixclock(default_xres, default_yres, viafb_refresh); 1849 viafb_get_pixclock(default_xres, default_yres, viafb_refresh);
1979 default_var.left_margin = (default_xres >> 3) & 0xf8; 1850 default_var.left_margin = (default_xres >> 3) & 0xf8;
@@ -1982,6 +1853,8 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
1982 default_var.lower_margin = 4; 1853 default_var.lower_margin = 4;
1983 default_var.hsync_len = default_var.left_margin; 1854 default_var.hsync_len = default_var.left_margin;
1984 default_var.vsync_len = 4; 1855 default_var.vsync_len = 4;
1856 viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo);
1857 viafbinfo->var = default_var;
1985 1858
1986 if (viafb_dual_fb) { 1859 if (viafb_dual_fb) {
1987 viafbinfo1 = framebuffer_alloc(viafb_par_length, &pdev->dev); 1860 viafbinfo1 = framebuffer_alloc(viafb_par_length, &pdev->dev);
@@ -2016,8 +1889,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
2016 default_var.yres = viafb_second_yres; 1889 default_var.yres = viafb_second_yres;
2017 default_var.xres_virtual = viafb_second_virtual_xres; 1890 default_var.xres_virtual = viafb_second_virtual_xres;
2018 default_var.yres_virtual = viafb_second_virtual_yres; 1891 default_var.yres_virtual = viafb_second_virtual_yres;
2019 if (viafb_bpp1 != viafb_bpp)
2020 viafb_bpp1 = viafb_bpp;
2021 default_var.bits_per_pixel = viafb_bpp1; 1892 default_var.bits_per_pixel = viafb_bpp1;
2022 default_var.pixclock = 1893 default_var.pixclock =
2023 viafb_get_pixclock(viafb_second_xres, viafb_second_yres, 1894 viafb_get_pixclock(viafb_second_xres, viafb_second_yres,
@@ -2037,9 +1908,7 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
2037 &viafbinfo1->fix); 1908 &viafbinfo1->fix);
2038 } 1909 }
2039 1910
2040 viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo); 1911 viafb_check_var(&viafbinfo->var, viafbinfo);
2041 viafb_check_var(&default_var, viafbinfo);
2042 viafbinfo->var = default_var;
2043 viafb_update_fix(viafbinfo); 1912 viafb_update_fix(viafbinfo);
2044 viaparinfo->depth = fb_get_color_depth(&viafbinfo->var, 1913 viaparinfo->depth = fb_get_color_depth(&viafbinfo->var,
2045 &viafbinfo->fix); 1914 &viafbinfo->fix);
@@ -2197,12 +2066,20 @@ static struct pci_driver viafb_driver = {
2197 2066
2198static int __init viafb_init(void) 2067static int __init viafb_init(void)
2199{ 2068{
2069 u32 dummy;
2200#ifndef MODULE 2070#ifndef MODULE
2201 char *option = NULL; 2071 char *option = NULL;
2202 if (fb_get_options("viafb", &option)) 2072 if (fb_get_options("viafb", &option))
2203 return -ENODEV; 2073 return -ENODEV;
2204 viafb_setup(option); 2074 viafb_setup(option);
2205#endif 2075#endif
2076 if (parse_mode(viafb_mode, &dummy, &dummy)
2077 || parse_mode(viafb_mode1, &dummy, &dummy)
2078 || viafb_bpp < 0 || viafb_bpp > 32
2079 || viafb_bpp1 < 0 || viafb_bpp1 > 32
2080 || parse_active_dev())
2081 return -EINVAL;
2082
2206 printk(KERN_INFO 2083 printk(KERN_INFO
2207 "VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n", 2084 "VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n",
2208 VERSION_MAJOR, VERSION_MINOR); 2085 VERSION_MAJOR, VERSION_MINOR);
@@ -2230,15 +2107,12 @@ static struct fb_ops viafb_ops = {
2230 .fb_cursor = viafb_cursor, 2107 .fb_cursor = viafb_cursor,
2231 .fb_ioctl = viafb_ioctl, 2108 .fb_ioctl = viafb_ioctl,
2232 .fb_sync = viafb_sync, 2109 .fb_sync = viafb_sync,
2233 .fb_setcmap = viafb_setcmap,
2234}; 2110};
2235 2111
2236module_init(viafb_init); 2112module_init(viafb_init);
2237module_exit(viafb_exit); 2113module_exit(viafb_exit);
2238 2114
2239#ifdef MODULE 2115#ifdef MODULE
2240module_param(viafb_memsize, int, S_IRUSR);
2241
2242module_param(viafb_mode, charp, S_IRUSR); 2116module_param(viafb_mode, charp, S_IRUSR);
2243MODULE_PARM_DESC(viafb_mode, "Set resolution (default=640x480)"); 2117MODULE_PARM_DESC(viafb_mode, "Set resolution (default=640x480)");
2244 2118
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h
index 0c94d2441922..61b5953cd159 100644
--- a/drivers/video/via/viafbdev.h
+++ b/drivers/video/via/viafbdev.h
@@ -83,22 +83,16 @@ struct viafb_par {
83 83
84extern unsigned int viafb_second_virtual_yres; 84extern unsigned int viafb_second_virtual_yres;
85extern unsigned int viafb_second_virtual_xres; 85extern unsigned int viafb_second_virtual_xres;
86extern unsigned int viafb_second_offset;
87extern int viafb_second_size;
88extern int viafb_SAMM_ON; 86extern int viafb_SAMM_ON;
89extern int viafb_dual_fb; 87extern int viafb_dual_fb;
90extern int viafb_LCD2_ON; 88extern int viafb_LCD2_ON;
91extern int viafb_LCD_ON; 89extern int viafb_LCD_ON;
92extern int viafb_DVI_ON; 90extern int viafb_DVI_ON;
93extern int viafb_hotplug; 91extern int viafb_hotplug;
94extern int viafb_memsize;
95 92
96extern int strict_strtoul(const char *cp, unsigned int base, 93extern int strict_strtoul(const char *cp, unsigned int base,
97 unsigned long *res); 94 unsigned long *res);
98 95
99void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
100 int mode_index);
101int viafb_get_mode_index(int hres, int vres);
102u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information 96u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
103 *plvds_setting_info, struct lvds_chip_information 97 *plvds_setting_info, struct lvds_chip_information
104 *plvds_chip_info, u8 index); 98 *plvds_chip_info, u8 index);
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
index b74f8a67923c..af50e244016c 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/via/viamode.c
@@ -412,7 +412,7 @@ struct io_reg PM1024x768[] = { {VIASR, 0x16, 0xBF, 0x0C},
412}; 412};
413 413
414struct patch_table res_patch_table[] = { 414struct patch_table res_patch_table[] = {
415 {VIA_RES_1024X768, ARRAY_SIZE(PM1024x768), PM1024x768} 415 {ARRAY_SIZE(PM1024x768), PM1024x768}
416}; 416};
417 417
418/* struct VPITTable { 418/* struct VPITTable {
@@ -879,169 +879,151 @@ struct crt_mode_table CRTM2048x1536[] = {
879 {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} } 879 {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} }
880}; 880};
881 881
882/* Video Mode Table */ 882struct VideoModeTable viafb_modes[] = {
883/* struct VideoModeTable {*/
884/* int ModeIndex;*/
885/* struct crt_mode_table *crtc;*/
886/* int mode_array;*/
887/* };*/
888struct VideoModeTable CLE266Modes[] = {
889 /* Display : 480x640 (GTF) */ 883 /* Display : 480x640 (GTF) */
890 {VIA_RES_480X640, CRTM480x640, ARRAY_SIZE(CRTM480x640)}, 884 {CRTM480x640, ARRAY_SIZE(CRTM480x640)},
891 885
892 /* Display : 640x480 */ 886 /* Display : 640x480 */
893 {VIA_RES_640X480, CRTM640x480, ARRAY_SIZE(CRTM640x480)}, 887 {CRTM640x480, ARRAY_SIZE(CRTM640x480)},
894 888
895 /* Display : 720x480 (GTF) */ 889 /* Display : 720x480 (GTF) */
896 {VIA_RES_720X480, CRTM720x480, ARRAY_SIZE(CRTM720x480)}, 890 {CRTM720x480, ARRAY_SIZE(CRTM720x480)},
897 891
898 /* Display : 720x576 (GTF) */ 892 /* Display : 720x576 (GTF) */
899 {VIA_RES_720X576, CRTM720x576, ARRAY_SIZE(CRTM720x576)}, 893 {CRTM720x576, ARRAY_SIZE(CRTM720x576)},
900 894
901 /* Display : 800x600 */ 895 /* Display : 800x600 */
902 {VIA_RES_800X600, CRTM800x600, ARRAY_SIZE(CRTM800x600)}, 896 {CRTM800x600, ARRAY_SIZE(CRTM800x600)},
903 897
904 /* Display : 800x480 (CVT) */ 898 /* Display : 800x480 (CVT) */
905 {VIA_RES_800X480, CRTM800x480, ARRAY_SIZE(CRTM800x480)}, 899 {CRTM800x480, ARRAY_SIZE(CRTM800x480)},
906 900
907 /* Display : 848x480 (CVT) */ 901 /* Display : 848x480 (CVT) */
908 {VIA_RES_848X480, CRTM848x480, ARRAY_SIZE(CRTM848x480)}, 902 {CRTM848x480, ARRAY_SIZE(CRTM848x480)},
909 903
910 /* Display : 852x480 (GTF) */ 904 /* Display : 852x480 (GTF) */
911 {VIA_RES_856X480, CRTM852x480, ARRAY_SIZE(CRTM852x480)}, 905 {CRTM852x480, ARRAY_SIZE(CRTM852x480)},
912 906
913 /* Display : 1024x512 (GTF) */ 907 /* Display : 1024x512 (GTF) */
914 {VIA_RES_1024X512, CRTM1024x512, ARRAY_SIZE(CRTM1024x512)}, 908 {CRTM1024x512, ARRAY_SIZE(CRTM1024x512)},
915 909
916 /* Display : 1024x600 */ 910 /* Display : 1024x600 */
917 {VIA_RES_1024X600, CRTM1024x600, ARRAY_SIZE(CRTM1024x600)}, 911 {CRTM1024x600, ARRAY_SIZE(CRTM1024x600)},
918
919 /* Display : 1024x576 (GTF) */
920 /*{ VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)}, */
921 912
922 /* Display : 1024x768 */ 913 /* Display : 1024x768 */
923 {VIA_RES_1024X768, CRTM1024x768, ARRAY_SIZE(CRTM1024x768)}, 914 {CRTM1024x768, ARRAY_SIZE(CRTM1024x768)},
924 915
925 /* Display : 1152x864 */ 916 /* Display : 1152x864 */
926 {VIA_RES_1152X864, CRTM1152x864, ARRAY_SIZE(CRTM1152x864)}, 917 {CRTM1152x864, ARRAY_SIZE(CRTM1152x864)},
927 918
928 /* Display : 1280x768 (GTF) */ 919 /* Display : 1280x768 (GTF) */
929 {VIA_RES_1280X768, CRTM1280x768, ARRAY_SIZE(CRTM1280x768)}, 920 {CRTM1280x768, ARRAY_SIZE(CRTM1280x768)},
930 921
931 /* Display : 960x600 (CVT) */ 922 /* Display : 960x600 (CVT) */
932 {VIA_RES_960X600, CRTM960x600, ARRAY_SIZE(CRTM960x600)}, 923 {CRTM960x600, ARRAY_SIZE(CRTM960x600)},
933 924
934 /* Display : 1000x600 (GTF) */ 925 /* Display : 1000x600 (GTF) */
935 {VIA_RES_1000X600, CRTM1000x600, ARRAY_SIZE(CRTM1000x600)}, 926 {CRTM1000x600, ARRAY_SIZE(CRTM1000x600)},
936 927
937 /* Display : 1024x576 (GTF) */ 928 /* Display : 1024x576 (GTF) */
938 {VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)}, 929 {CRTM1024x576, ARRAY_SIZE(CRTM1024x576)},
939 930
940 /* Display : 1088x612 (GTF) */ 931 /* Display : 1088x612 (GTF) */
941 {VIA_RES_1088X612, CRTM1088x612, ARRAY_SIZE(CRTM1088x612)}, 932 {CRTM1088x612, ARRAY_SIZE(CRTM1088x612)},
942 933
943 /* Display : 1152x720 (CVT) */ 934 /* Display : 1152x720 (CVT) */
944 {VIA_RES_1152X720, CRTM1152x720, ARRAY_SIZE(CRTM1152x720)}, 935 {CRTM1152x720, ARRAY_SIZE(CRTM1152x720)},
945 936
946 /* Display : 1200x720 (GTF) */ 937 /* Display : 1200x720 (GTF) */
947 {VIA_RES_1200X720, CRTM1200x720, ARRAY_SIZE(CRTM1200x720)}, 938 {CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
948 939
949 /* Display : 1280x600 (GTF) */ 940 /* Display : 1280x600 (GTF) */
950 {VIA_RES_1280X600, CRTM1280x600, ARRAY_SIZE(CRTM1280x600)}, 941 {CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
951 942
952 /* Display : 1280x800 (CVT) */ 943 /* Display : 1280x800 (CVT) */
953 {VIA_RES_1280X800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)}, 944 {CRTM1280x800, ARRAY_SIZE(CRTM1280x800)},
954
955 /* Display : 1280x800 (GTF) */
956 /*{ M1280x800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)}, */
957 945
958 /* Display : 1280x960 */ 946 /* Display : 1280x960 */
959 {VIA_RES_1280X960, CRTM1280x960, ARRAY_SIZE(CRTM1280x960)}, 947 {CRTM1280x960, ARRAY_SIZE(CRTM1280x960)},
960 948
961 /* Display : 1280x1024 */ 949 /* Display : 1280x1024 */
962 {VIA_RES_1280X1024, CRTM1280x1024, ARRAY_SIZE(CRTM1280x1024)}, 950 {CRTM1280x1024, ARRAY_SIZE(CRTM1280x1024)},
963 951
964 /* Display : 1360x768 (CVT) */ 952 /* Display : 1360x768 (CVT) */
965 {VIA_RES_1360X768, CRTM1360x768, ARRAY_SIZE(CRTM1360x768)}, 953 {CRTM1360x768, ARRAY_SIZE(CRTM1360x768)},
966
967 /* Display : 1360x768 (CVT Reduce Blanking) */
968 {VIA_RES_1360X768_RB, CRTM1360x768_RB,
969 ARRAY_SIZE(CRTM1360x768_RB)},
970 954
971 /* Display : 1366x768 */ 955 /* Display : 1366x768 */
972 {VIA_RES_1366X768, CRTM1366x768, ARRAY_SIZE(CRTM1366x768)}, 956 {CRTM1366x768, ARRAY_SIZE(CRTM1366x768)},
973 957
974 /* Display : 1368x768 (GTF) */ 958 /* Display : 1368x768 (GTF) */
975 /*{ M1368x768,CRTM1368x768,ARRAY_SIZE(CRTM1368x768)}, */ 959 {CRTM1368x768, ARRAY_SIZE(CRTM1368x768)},
976 /* Display : 1368x768 (GTF) */
977 {VIA_RES_1368X768, CRTM1368x768, ARRAY_SIZE(CRTM1368x768)},
978 960
979 /* Display : 1440x900 (CVT) */ 961 /* Display : 1440x900 (CVT) */
980 {VIA_RES_1440X900, CRTM1440x900, ARRAY_SIZE(CRTM1440x900)}, 962 {CRTM1440x900, ARRAY_SIZE(CRTM1440x900)},
981
982 /* Display : 1440x900 (CVT Reduce Blanking) */
983 {VIA_RES_1440X900_RB, CRTM1440x900_RB,
984 ARRAY_SIZE(CRTM1440x900_RB)},
985 963
986 /* Display : 1440x1050 (GTF) */ 964 /* Display : 1440x1050 (GTF) */
987 {VIA_RES_1440X1050, CRTM1440x1050, ARRAY_SIZE(CRTM1440x1050)}, 965 {CRTM1440x1050, ARRAY_SIZE(CRTM1440x1050)},
988
989 /* Display : 1400x1050 (CVT Reduce Blanking) */
990 {VIA_RES_1400X1050_RB, CRTM1400x1050_RB,
991 ARRAY_SIZE(CRTM1400x1050_RB)},
992 966
993 /* Display : 1600x900 (CVT) */ 967 /* Display : 1600x900 (CVT) */
994 {VIA_RES_1600X900, CRTM1600x900, ARRAY_SIZE(CRTM1600x900)}, 968 {CRTM1600x900, ARRAY_SIZE(CRTM1600x900)},
995
996 /* Display : 1600x900 (CVT Reduce Blanking) */
997 {VIA_RES_1600X900_RB, CRTM1600x900_RB,
998 ARRAY_SIZE(CRTM1600x900_RB)},
999 969
1000 /* Display : 1600x1024 (GTF) */ 970 /* Display : 1600x1024 (GTF) */
1001 {VIA_RES_1600X1024, CRTM1600x1024, ARRAY_SIZE(CRTM1600x1024)}, 971 {CRTM1600x1024, ARRAY_SIZE(CRTM1600x1024)},
1002 972
1003 /* Display : 1600x1200 */ 973 /* Display : 1600x1200 */
1004 {VIA_RES_1600X1200, CRTM1600x1200, ARRAY_SIZE(CRTM1600x1200)}, 974 {CRTM1600x1200, ARRAY_SIZE(CRTM1600x1200)},
1005 975
1006 /* Display : 1680x1050 (CVT) */ 976 /* Display : 1680x1050 (CVT) */
1007 {VIA_RES_1680X1050, CRTM1680x1050, ARRAY_SIZE(CRTM1680x1050)}, 977 {CRTM1680x1050, ARRAY_SIZE(CRTM1680x1050)},
1008
1009 /* Display : 1680x1050 (CVT Reduce Blanking) */
1010 {VIA_RES_1680X1050_RB, CRTM1680x1050_RB,
1011 ARRAY_SIZE(CRTM1680x1050_RB)},
1012 978
1013 /* Display : 1792x1344 (DMT) */ 979 /* Display : 1792x1344 (DMT) */
1014 {VIA_RES_1792X1344, CRTM1792x1344, ARRAY_SIZE(CRTM1792x1344)}, 980 {CRTM1792x1344, ARRAY_SIZE(CRTM1792x1344)},
1015 981
1016 /* Display : 1856x1392 (DMT) */ 982 /* Display : 1856x1392 (DMT) */
1017 {VIA_RES_1856X1392, CRTM1856x1392, ARRAY_SIZE(CRTM1856x1392)}, 983 {CRTM1856x1392, ARRAY_SIZE(CRTM1856x1392)},
1018 984
1019 /* Display : 1920x1440 */ 985 /* Display : 1920x1440 */
1020 {VIA_RES_1920X1440, CRTM1920x1440, ARRAY_SIZE(CRTM1920x1440)}, 986 {CRTM1920x1440, ARRAY_SIZE(CRTM1920x1440)},
1021 987
1022 /* Display : 2048x1536 */ 988 /* Display : 2048x1536 */
1023 {VIA_RES_2048X1536, CRTM2048x1536, ARRAY_SIZE(CRTM2048x1536)}, 989 {CRTM2048x1536, ARRAY_SIZE(CRTM2048x1536)},
1024 990
1025 /* Display : 1280x720 */ 991 /* Display : 1280x720 */
1026 {VIA_RES_1280X720, CRTM1280x720, ARRAY_SIZE(CRTM1280x720)}, 992 {CRTM1280x720, ARRAY_SIZE(CRTM1280x720)},
1027 993
1028 /* Display : 1920x1080 (CVT) */ 994 /* Display : 1920x1080 (CVT) */
1029 {VIA_RES_1920X1080, CRTM1920x1080, ARRAY_SIZE(CRTM1920x1080)}, 995 {CRTM1920x1080, ARRAY_SIZE(CRTM1920x1080)},
1030
1031 /* Display : 1920x1080 (CVT Reduce Blanking) */
1032 {VIA_RES_1920X1080_RB, CRTM1920x1080_RB,
1033 ARRAY_SIZE(CRTM1920x1080_RB)},
1034 996
1035 /* Display : 1920x1200 (CVT) */ 997 /* Display : 1920x1200 (CVT) */
1036 {VIA_RES_1920X1200, CRTM1920x1200, ARRAY_SIZE(CRTM1920x1200)}, 998 {CRTM1920x1200, ARRAY_SIZE(CRTM1920x1200)},
1037
1038 /* Display : 1920x1200 (CVT Reduce Blanking) */
1039 {VIA_RES_1920X1200_RB, CRTM1920x1200_RB,
1040 ARRAY_SIZE(CRTM1920x1200_RB)},
1041 999
1042 /* Display : 1400x1050 (CVT) */ 1000 /* Display : 1400x1050 (CVT) */
1043 {VIA_RES_1400X1050, CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)} 1001 {CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)}
1044}; 1002};
1003
1004struct VideoModeTable viafb_rb_modes[] = {
1005 /* Display : 1360x768 (CVT Reduce Blanking) */
1006 {CRTM1360x768_RB, ARRAY_SIZE(CRTM1360x768_RB)},
1007
1008 /* Display : 1440x900 (CVT Reduce Blanking) */
1009 {CRTM1440x900_RB, ARRAY_SIZE(CRTM1440x900_RB)},
1010
1011 /* Display : 1400x1050 (CVT Reduce Blanking) */
1012 {CRTM1400x1050_RB, ARRAY_SIZE(CRTM1400x1050_RB)},
1013
1014 /* Display : 1600x900 (CVT Reduce Blanking) */
1015 {CRTM1600x900_RB, ARRAY_SIZE(CRTM1600x900_RB)},
1016
1017 /* Display : 1680x1050 (CVT Reduce Blanking) */
1018 {CRTM1680x1050_RB, ARRAY_SIZE(CRTM1680x1050_RB)},
1019
1020 /* Display : 1920x1080 (CVT Reduce Blanking) */
1021 {CRTM1920x1080_RB, ARRAY_SIZE(CRTM1920x1080_RB)},
1022
1023 /* Display : 1920x1200 (CVT Reduce Blanking) */
1024 {CRTM1920x1200_RB, ARRAY_SIZE(CRTM1920x1200_RB)}
1025};
1026
1045struct crt_mode_table CEAM1280x720[] = { 1027struct crt_mode_table CEAM1280x720[] = {
1046 {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP, 1028 {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP,
1047 M1280X720_CEA_R60_VSP, 1029 M1280X720_CEA_R60_VSP,
@@ -1056,8 +1038,8 @@ struct crt_mode_table CEAM1920x1080[] = {
1056}; 1038};
1057struct VideoModeTable CEA_HDMI_Modes[] = { 1039struct VideoModeTable CEA_HDMI_Modes[] = {
1058 /* Display : 1280x720 */ 1040 /* Display : 1280x720 */
1059 {VIA_RES_1280X720, CEAM1280x720, ARRAY_SIZE(CEAM1280x720)}, 1041 {CEAM1280x720, ARRAY_SIZE(CEAM1280x720)},
1060 {VIA_RES_1920X1080, CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} 1042 {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)}
1061}; 1043};
1062 1044
1063int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl); 1045int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl);
@@ -1069,4 +1051,28 @@ int NUM_TOTAL_CX700_ModeXregs = ARRAY_SIZE(CX700_ModeXregs);
1069int NUM_TOTAL_VX855_ModeXregs = ARRAY_SIZE(VX855_ModeXregs); 1051int NUM_TOTAL_VX855_ModeXregs = ARRAY_SIZE(VX855_ModeXregs);
1070int NUM_TOTAL_CLE266_ModeXregs = ARRAY_SIZE(CLE266_ModeXregs); 1052int NUM_TOTAL_CLE266_ModeXregs = ARRAY_SIZE(CLE266_ModeXregs);
1071int NUM_TOTAL_PATCH_MODE = ARRAY_SIZE(res_patch_table); 1053int NUM_TOTAL_PATCH_MODE = ARRAY_SIZE(res_patch_table);
1072int NUM_TOTAL_MODETABLE = ARRAY_SIZE(CLE266Modes); 1054
1055
1056struct VideoModeTable *viafb_get_mode(int hres, int vres)
1057{
1058 u32 i;
1059 for (i = 0; i < ARRAY_SIZE(viafb_modes); i++)
1060 if (viafb_modes[i].mode_array &&
1061 viafb_modes[i].crtc[0].crtc.hor_addr == hres &&
1062 viafb_modes[i].crtc[0].crtc.ver_addr == vres)
1063 return &viafb_modes[i];
1064
1065 return NULL;
1066}
1067
1068struct VideoModeTable *viafb_get_rb_mode(int hres, int vres)
1069{
1070 u32 i;
1071 for (i = 0; i < ARRAY_SIZE(viafb_rb_modes); i++)
1072 if (viafb_rb_modes[i].mode_array &&
1073 viafb_rb_modes[i].crtc[0].crtc.hor_addr == hres &&
1074 viafb_rb_modes[i].crtc[0].crtc.ver_addr == vres)
1075 return &viafb_rb_modes[i];
1076
1077 return NULL;
1078}
diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h
index a9d6554fabdf..5b1ced86514b 100644
--- a/drivers/video/via/viamode.h
+++ b/drivers/video/via/viamode.h
@@ -32,13 +32,11 @@ struct VPITTable {
32}; 32};
33 33
34struct VideoModeTable { 34struct VideoModeTable {
35 int ModeIndex;
36 struct crt_mode_table *crtc; 35 struct crt_mode_table *crtc;
37 int mode_array; 36 int mode_array;
38}; 37};
39 38
40struct patch_table { 39struct patch_table {
41 int mode_index;
42 int table_length; 40 int table_length;
43 struct io_reg *io_reg_table; 41 struct io_reg *io_reg_table;
44}; 42};
@@ -59,13 +57,11 @@ extern int NUM_TOTAL_CX700_ModeXregs;
59extern int NUM_TOTAL_VX855_ModeXregs; 57extern int NUM_TOTAL_VX855_ModeXregs;
60extern int NUM_TOTAL_CLE266_ModeXregs; 58extern int NUM_TOTAL_CLE266_ModeXregs;
61extern int NUM_TOTAL_PATCH_MODE; 59extern int NUM_TOTAL_PATCH_MODE;
62extern int NUM_TOTAL_MODETABLE;
63 60
64/********************/ 61/********************/
65/* Mode Table */ 62/* Mode Table */
66/********************/ 63/********************/
67 64
68extern struct VideoModeTable CLE266Modes[];
69extern struct crt_mode_table CEAM1280x720[]; 65extern struct crt_mode_table CEAM1280x720[];
70extern struct crt_mode_table CEAM1920x1080[]; 66extern struct crt_mode_table CEAM1920x1080[];
71extern struct VideoModeTable CEA_HDMI_Modes[]; 67extern struct VideoModeTable CEA_HDMI_Modes[];
@@ -81,4 +77,8 @@ extern struct io_reg CLE266_ModeXregs[];
81extern struct io_reg PM1024x768[]; 77extern struct io_reg PM1024x768[];
82extern struct patch_table res_patch_table[]; 78extern struct patch_table res_patch_table[];
83extern struct VPITTable VPIT; 79extern struct VPITTable VPIT;
80
81struct VideoModeTable *viafb_get_mode(int hres, int vres);
82struct VideoModeTable *viafb_get_rb_mode(int hres, int vres);
83
84#endif /* __VIAMODE_H__ */ 84#endif /* __VIAMODE_H__ */
diff --git a/drivers/video/w100fb.c b/drivers/video/w100fb.c
index 2376f688ec8b..5d223959778a 100644
--- a/drivers/video/w100fb.c
+++ b/drivers/video/w100fb.c
@@ -628,7 +628,7 @@ static int w100fb_resume(struct platform_device *dev)
628#endif 628#endif
629 629
630 630
631int __init w100fb_probe(struct platform_device *pdev) 631int __devinit w100fb_probe(struct platform_device *pdev)
632{ 632{
633 int err = -EIO; 633 int err = -EIO;
634 struct w100fb_mach_info *inf; 634 struct w100fb_mach_info *inf;
diff --git a/drivers/w1/masters/ds2482.c b/drivers/w1/masters/ds2482.c
index 406caa6a71cb..e5f74416d4b7 100644
--- a/drivers/w1/masters/ds2482.c
+++ b/drivers/w1/masters/ds2482.c
@@ -214,7 +214,7 @@ static int ds2482_wait_1wire_idle(struct ds2482_data *pdev)
214 (++retries < DS2482_WAIT_IDLE_TIMEOUT)); 214 (++retries < DS2482_WAIT_IDLE_TIMEOUT));
215 } 215 }
216 216
217 if (retries > DS2482_WAIT_IDLE_TIMEOUT) 217 if (retries >= DS2482_WAIT_IDLE_TIMEOUT)
218 printk(KERN_ERR "%s: timeout on channel %d\n", 218 printk(KERN_ERR "%s: timeout on channel %d\n",
219 __func__, pdev->channel); 219 __func__, pdev->channel);
220 220
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 65244c02551b..492670358cbf 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -102,7 +102,7 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
102 return ((__raw_readb(ctrl_addr)) >> 3) & 0x1; 102 return ((__raw_readb(ctrl_addr)) >> 3) & 0x1;
103} 103}
104 104
105static int __init mxc_w1_probe(struct platform_device *pdev) 105static int __devinit mxc_w1_probe(struct platform_device *pdev)
106{ 106{
107 struct mxc_w1_device *mdev; 107 struct mxc_w1_device *mdev;
108 struct resource *res; 108 struct resource *res;
@@ -166,7 +166,7 @@ failed_clk:
166/* 166/*
167 * disassociate the w1 device from the driver 167 * disassociate the w1 device from the driver
168 */ 168 */
169static int mxc_w1_remove(struct platform_device *pdev) 169static int __devexit mxc_w1_remove(struct platform_device *pdev)
170{ 170{
171 struct mxc_w1_device *mdev = platform_get_drvdata(pdev); 171 struct mxc_w1_device *mdev = platform_get_drvdata(pdev);
172 struct resource *res; 172 struct resource *res;
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
index 0d92969404c3..22977d30f89e 100644
--- a/drivers/w1/masters/omap_hdq.c
+++ b/drivers/w1/masters/omap_hdq.c
@@ -72,7 +72,7 @@ struct hdq_data {
72 int init_trans; 72 int init_trans;
73}; 73};
74 74
75static int __init omap_hdq_probe(struct platform_device *pdev); 75static int __devinit omap_hdq_probe(struct platform_device *pdev);
76static int omap_hdq_remove(struct platform_device *pdev); 76static int omap_hdq_remove(struct platform_device *pdev);
77 77
78static struct platform_driver omap_hdq_driver = { 78static struct platform_driver omap_hdq_driver = {
@@ -558,7 +558,7 @@ static void omap_w1_write_byte(void *_hdq, u8 byte)
558 return; 558 return;
559} 559}
560 560
561static int __init omap_hdq_probe(struct platform_device *pdev) 561static int __devinit omap_hdq_probe(struct platform_device *pdev)
562{ 562{
563 struct hdq_data *hdq_data; 563 struct hdq_data *hdq_data;
564 struct resource *res; 564 struct resource *res;
diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c
index acc7e3b7fe17..ad5897dc4495 100644
--- a/drivers/w1/w1.c
+++ b/drivers/w1/w1.c
@@ -986,7 +986,7 @@ int w1_process(void *data)
986 return 0; 986 return 0;
987} 987}
988 988
989static int w1_init(void) 989static int __init w1_init(void)
990{ 990{
991 int retval; 991 int retval;
992 992
@@ -1034,7 +1034,7 @@ err_out_exit_init:
1034 return retval; 1034 return retval;
1035} 1035}
1036 1036
1037static void w1_fini(void) 1037static void __exit w1_fini(void)
1038{ 1038{
1039 struct w1_master *dev; 1039 struct w1_master *dev;
1040 1040
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 3da3f48720a7..bdcdbd53da89 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -55,6 +55,11 @@ config SOFT_WATCHDOG
55 To compile this driver as a module, choose M here: the 55 To compile this driver as a module, choose M here: the
56 module will be called softdog. 56 module will be called softdog.
57 57
58config MAX63XX_WATCHDOG
59 tristate "Max63xx watchdog"
60 help
61 Support for memory mapped max63{69,70,71,72,73,74} watchdog timer.
62
58config WM831X_WATCHDOG 63config WM831X_WATCHDOG
59 tristate "WM831x watchdog" 64 tristate "WM831x watchdog"
60 depends on MFD_WM831X 65 depends on MFD_WM831X
@@ -289,6 +294,17 @@ config ADX_WATCHDOG
289 Say Y here if you want support for the watchdog timer on Avionic 294 Say Y here if you want support for the watchdog timer on Avionic
290 Design Xanthos boards. 295 Design Xanthos boards.
291 296
297config TS72XX_WATCHDOG
298 tristate "TS-72XX SBC Watchdog"
299 depends on MACH_TS72XX
300 help
301 Technologic Systems TS-7200, TS-7250 and TS-7260 boards have
302 watchdog timer implemented in a external CPLD chip. Say Y here
303 if you want to support for the watchdog timer on TS-72XX boards.
304
305 To compile this driver as a module, choose M here: the
306 module will be called ts72xx_wdt.
307
292# AVR32 Architecture 308# AVR32 Architecture
293 309
294config AT32AP700X_WDT 310config AT32AP700X_WDT
@@ -845,10 +861,10 @@ config TXX9_WDT
845# POWERPC Architecture 861# POWERPC Architecture
846 862
847config GEF_WDT 863config GEF_WDT
848 tristate "GE Fanuc Watchdog Timer" 864 tristate "GE Watchdog Timer"
849 depends on GEF_SBC610 || GEF_SBC310 || GEF_PPC9A 865 depends on GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
850 ---help--- 866 ---help---
851 Watchdog timer found in a number of GE Fanuc single board computers. 867 Watchdog timer found in a number of GE single board computers.
852 868
853config MPC5200_WDT 869config MPC5200_WDT
854 bool "MPC52xx Watchdog Timer" 870 bool "MPC52xx Watchdog Timer"
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 475c61100069..5e3cb95bb0e9 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
46obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o 46obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o
47obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o 47obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
48obj-$(CONFIG_ADX_WATCHDOG) += adx_wdt.o 48obj-$(CONFIG_ADX_WATCHDOG) += adx_wdt.o
49obj-$(CONFIG_TS72XX_WATCHDOG) += ts72xx_wdt.o
49 50
50# AVR32 Architecture 51# AVR32 Architecture
51obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o 52obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
@@ -142,4 +143,5 @@ obj-$(CONFIG_WATCHDOG_CP1XXX) += cpwd.o
142# Architecture Independant 143# Architecture Independant
143obj-$(CONFIG_WM831X_WATCHDOG) += wm831x_wdt.o 144obj-$(CONFIG_WM831X_WATCHDOG) += wm831x_wdt.o
144obj-$(CONFIG_WM8350_WATCHDOG) += wm8350_wdt.o 145obj-$(CONFIG_WM8350_WATCHDOG) += wm8350_wdt.o
146obj-$(CONFIG_MAX63XX_WATCHDOG) += max63xx_wdt.o
145obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o 147obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
diff --git a/drivers/watchdog/acquirewdt.c b/drivers/watchdog/acquirewdt.c
index 4d18c874d963..2ffce4d75443 100644
--- a/drivers/watchdog/acquirewdt.c
+++ b/drivers/watchdog/acquirewdt.c
@@ -150,7 +150,7 @@ static long acq_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
150 int options, retval = -EINVAL; 150 int options, retval = -EINVAL;
151 void __user *argp = (void __user *)arg; 151 void __user *argp = (void __user *)arg;
152 int __user *p = argp; 152 int __user *p = argp;
153 static struct watchdog_info ident = { 153 static const struct watchdog_info ident = {
154 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 154 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
155 .firmware_version = 1, 155 .firmware_version = 1,
156 .identity = WATCHDOG_NAME, 156 .identity = WATCHDOG_NAME,
diff --git a/drivers/watchdog/advantechwdt.c b/drivers/watchdog/advantechwdt.c
index 824d076a5cd6..4d40965d2c9f 100644
--- a/drivers/watchdog/advantechwdt.c
+++ b/drivers/watchdog/advantechwdt.c
@@ -137,7 +137,7 @@ static long advwdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
137 int new_timeout; 137 int new_timeout;
138 void __user *argp = (void __user *)arg; 138 void __user *argp = (void __user *)arg;
139 int __user *p = argp; 139 int __user *p = argp;
140 static struct watchdog_info ident = { 140 static const struct watchdog_info ident = {
141 .options = WDIOF_KEEPALIVEPING | 141 .options = WDIOF_KEEPALIVEPING |
142 WDIOF_SETTIMEOUT | 142 WDIOF_SETTIMEOUT |
143 WDIOF_MAGICCLOSE, 143 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/adx_wdt.c b/drivers/watchdog/adx_wdt.c
index 9d7d155364f8..a5ca7a6ee133 100644
--- a/drivers/watchdog/adx_wdt.c
+++ b/drivers/watchdog/adx_wdt.c
@@ -37,7 +37,7 @@ struct adx_wdt {
37 spinlock_t lock; 37 spinlock_t lock;
38}; 38};
39 39
40static struct watchdog_info adx_wdt_info = { 40static const struct watchdog_info adx_wdt_info = {
41 .identity = "Avionic Design Xanthos Watchdog", 41 .identity = "Avionic Design Xanthos Watchdog",
42 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 42 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
43}; 43};
diff --git a/drivers/watchdog/alim1535_wdt.c b/drivers/watchdog/alim1535_wdt.c
index 937a80fb61e1..1e9caea8ff8a 100644
--- a/drivers/watchdog/alim1535_wdt.c
+++ b/drivers/watchdog/alim1535_wdt.c
@@ -180,7 +180,7 @@ static long ali_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
180{ 180{
181 void __user *argp = (void __user *)arg; 181 void __user *argp = (void __user *)arg;
182 int __user *p = argp; 182 int __user *p = argp;
183 static struct watchdog_info ident = { 183 static const struct watchdog_info ident = {
184 .options = WDIOF_KEEPALIVEPING | 184 .options = WDIOF_KEEPALIVEPING |
185 WDIOF_SETTIMEOUT | 185 WDIOF_SETTIMEOUT |
186 WDIOF_MAGICCLOSE, 186 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/alim7101_wdt.c b/drivers/watchdog/alim7101_wdt.c
index f90afdb1b255..d8d4da9a483d 100644
--- a/drivers/watchdog/alim7101_wdt.c
+++ b/drivers/watchdog/alim7101_wdt.c
@@ -238,7 +238,7 @@ static long fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
238{ 238{
239 void __user *argp = (void __user *)arg; 239 void __user *argp = (void __user *)arg;
240 int __user *p = argp; 240 int __user *p = argp;
241 static struct watchdog_info ident = { 241 static const struct watchdog_info ident = {
242 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT 242 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
243 | WDIOF_MAGICCLOSE, 243 | WDIOF_MAGICCLOSE,
244 .firmware_version = 1, 244 .firmware_version = 1,
diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c
index 2bb95cd308c1..c764c52412e4 100644
--- a/drivers/watchdog/ar7_wdt.c
+++ b/drivers/watchdog/ar7_wdt.c
@@ -219,7 +219,7 @@ static ssize_t ar7_wdt_write(struct file *file, const char *data,
219static long ar7_wdt_ioctl(struct file *file, 219static long ar7_wdt_ioctl(struct file *file,
220 unsigned int cmd, unsigned long arg) 220 unsigned int cmd, unsigned long arg)
221{ 221{
222 static struct watchdog_info ident = { 222 static const struct watchdog_info ident = {
223 .identity = LONGNAME, 223 .identity = LONGNAME,
224 .firmware_version = 1, 224 .firmware_version = 1,
225 .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | 225 .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
diff --git a/drivers/watchdog/at32ap700x_wdt.c b/drivers/watchdog/at32ap700x_wdt.c
index 037847923dcb..6873376f986c 100644
--- a/drivers/watchdog/at32ap700x_wdt.c
+++ b/drivers/watchdog/at32ap700x_wdt.c
@@ -202,7 +202,7 @@ static int at32_wdt_get_status(void)
202 return status; 202 return status;
203} 203}
204 204
205static struct watchdog_info at32_wdt_info = { 205static const struct watchdog_info at32_wdt_info = {
206 .identity = "at32ap700x watchdog", 206 .identity = "at32ap700x watchdog",
207 .options = WDIOF_SETTIMEOUT | 207 .options = WDIOF_SETTIMEOUT |
208 WDIOF_KEEPALIVEPING | 208 WDIOF_KEEPALIVEPING |
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c
index b185dafe1494..b3046dc4b56c 100644
--- a/drivers/watchdog/at91rm9200_wdt.c
+++ b/drivers/watchdog/at91rm9200_wdt.c
@@ -121,7 +121,7 @@ static int at91_wdt_settimeout(int new_time)
121 return 0; 121 return 0;
122} 122}
123 123
124static struct watchdog_info at91_wdt_info = { 124static const struct watchdog_info at91_wdt_info = {
125 .identity = "at91 watchdog", 125 .identity = "at91 watchdog",
126 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 126 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
127}; 127};
diff --git a/drivers/watchdog/bcm47xx_wdt.c b/drivers/watchdog/bcm47xx_wdt.c
index 751c003864ad..5f245522397b 100644
--- a/drivers/watchdog/bcm47xx_wdt.c
+++ b/drivers/watchdog/bcm47xx_wdt.c
@@ -149,7 +149,7 @@ static ssize_t bcm47xx_wdt_write(struct file *file, const char __user *data,
149 return len; 149 return len;
150} 150}
151 151
152static struct watchdog_info bcm47xx_wdt_info = { 152static const struct watchdog_info bcm47xx_wdt_info = {
153 .identity = DRV_NAME, 153 .identity = DRV_NAME,
154 .options = WDIOF_SETTIMEOUT | 154 .options = WDIOF_SETTIMEOUT |
155 WDIOF_KEEPALIVEPING | 155 WDIOF_KEEPALIVEPING |
diff --git a/drivers/watchdog/bfin_wdt.c b/drivers/watchdog/bfin_wdt.c
index 2159e668751c..9c7ccd1e9088 100644
--- a/drivers/watchdog/bfin_wdt.c
+++ b/drivers/watchdog/bfin_wdt.c
@@ -19,8 +19,6 @@
19#include <linux/miscdevice.h> 19#include <linux/miscdevice.h>
20#include <linux/watchdog.h> 20#include <linux/watchdog.h>
21#include <linux/fs.h> 21#include <linux/fs.h>
22#include <linux/notifier.h>
23#include <linux/reboot.h>
24#include <linux/init.h> 22#include <linux/init.h>
25#include <linux/interrupt.h> 23#include <linux/interrupt.h>
26#include <linux/uaccess.h> 24#include <linux/uaccess.h>
@@ -74,7 +72,7 @@
74 72
75static unsigned int timeout = WATCHDOG_TIMEOUT; 73static unsigned int timeout = WATCHDOG_TIMEOUT;
76static int nowayout = WATCHDOG_NOWAYOUT; 74static int nowayout = WATCHDOG_NOWAYOUT;
77static struct watchdog_info bfin_wdt_info; 75static const struct watchdog_info bfin_wdt_info;
78static unsigned long open_check; 76static unsigned long open_check;
79static char expect_close; 77static char expect_close;
80static DEFINE_SPINLOCK(bfin_wdt_spinlock); 78static DEFINE_SPINLOCK(bfin_wdt_spinlock);
@@ -309,26 +307,6 @@ static long bfin_wdt_ioctl(struct file *file,
309 } 307 }
310} 308}
311 309
312/**
313 * bfin_wdt_notify_sys - Notifier Handler
314 * @this: notifier block
315 * @code: notifier event
316 * @unused: unused
317 *
318 * Handles specific events, such as turning off the watchdog during a
319 * shutdown event.
320 */
321static int bfin_wdt_notify_sys(struct notifier_block *this,
322 unsigned long code, void *unused)
323{
324 stampit();
325
326 if (code == SYS_DOWN || code == SYS_HALT)
327 bfin_wdt_stop();
328
329 return NOTIFY_DONE;
330}
331
332#ifdef CONFIG_PM 310#ifdef CONFIG_PM
333static int state_before_suspend; 311static int state_before_suspend;
334 312
@@ -388,40 +366,28 @@ static struct miscdevice bfin_wdt_miscdev = {
388 .fops = &bfin_wdt_fops, 366 .fops = &bfin_wdt_fops,
389}; 367};
390 368
391static struct watchdog_info bfin_wdt_info = { 369static const struct watchdog_info bfin_wdt_info = {
392 .identity = "Blackfin Watchdog", 370 .identity = "Blackfin Watchdog",
393 .options = WDIOF_SETTIMEOUT | 371 .options = WDIOF_SETTIMEOUT |
394 WDIOF_KEEPALIVEPING | 372 WDIOF_KEEPALIVEPING |
395 WDIOF_MAGICCLOSE, 373 WDIOF_MAGICCLOSE,
396}; 374};
397 375
398static struct notifier_block bfin_wdt_notifier = {
399 .notifier_call = bfin_wdt_notify_sys,
400};
401
402/** 376/**
403 * bfin_wdt_probe - Initialize module 377 * bfin_wdt_probe - Initialize module
404 * 378 *
405 * Registers the misc device and notifier handler. Actual device 379 * Registers the misc device. Actual device
406 * initialization is handled by bfin_wdt_open(). 380 * initialization is handled by bfin_wdt_open().
407 */ 381 */
408static int __devinit bfin_wdt_probe(struct platform_device *pdev) 382static int __devinit bfin_wdt_probe(struct platform_device *pdev)
409{ 383{
410 int ret; 384 int ret;
411 385
412 ret = register_reboot_notifier(&bfin_wdt_notifier);
413 if (ret) {
414 pr_devinit(KERN_ERR PFX
415 "cannot register reboot notifier (err=%d)\n", ret);
416 return ret;
417 }
418
419 ret = misc_register(&bfin_wdt_miscdev); 386 ret = misc_register(&bfin_wdt_miscdev);
420 if (ret) { 387 if (ret) {
421 pr_devinit(KERN_ERR PFX 388 pr_devinit(KERN_ERR PFX
422 "cannot register miscdev on minor=%d (err=%d)\n", 389 "cannot register miscdev on minor=%d (err=%d)\n",
423 WATCHDOG_MINOR, ret); 390 WATCHDOG_MINOR, ret);
424 unregister_reboot_notifier(&bfin_wdt_notifier);
425 return ret; 391 return ret;
426 } 392 }
427 393
@@ -434,21 +400,33 @@ static int __devinit bfin_wdt_probe(struct platform_device *pdev)
434/** 400/**
435 * bfin_wdt_remove - Initialize module 401 * bfin_wdt_remove - Initialize module
436 * 402 *
437 * Unregisters the misc device and notifier handler. Actual device 403 * Unregisters the misc device. Actual device
438 * deinitialization is handled by bfin_wdt_close(). 404 * deinitialization is handled by bfin_wdt_close().
439 */ 405 */
440static int __devexit bfin_wdt_remove(struct platform_device *pdev) 406static int __devexit bfin_wdt_remove(struct platform_device *pdev)
441{ 407{
442 misc_deregister(&bfin_wdt_miscdev); 408 misc_deregister(&bfin_wdt_miscdev);
443 unregister_reboot_notifier(&bfin_wdt_notifier);
444 return 0; 409 return 0;
445} 410}
446 411
412/**
413 * bfin_wdt_shutdown - Soft Shutdown Handler
414 *
415 * Handles the soft shutdown event.
416 */
417static void bfin_wdt_shutdown(struct platform_device *pdev)
418{
419 stampit();
420
421 bfin_wdt_stop();
422}
423
447static struct platform_device *bfin_wdt_device; 424static struct platform_device *bfin_wdt_device;
448 425
449static struct platform_driver bfin_wdt_driver = { 426static struct platform_driver bfin_wdt_driver = {
450 .probe = bfin_wdt_probe, 427 .probe = bfin_wdt_probe,
451 .remove = __devexit_p(bfin_wdt_remove), 428 .remove = __devexit_p(bfin_wdt_remove),
429 .shutdown = bfin_wdt_shutdown,
452 .suspend = bfin_wdt_suspend, 430 .suspend = bfin_wdt_suspend,
453 .resume = bfin_wdt_resume, 431 .resume = bfin_wdt_resume,
454 .driver = { 432 .driver = {
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index e8380ef65c1c..8b724aad6825 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -121,7 +121,7 @@ static ssize_t booke_wdt_write(struct file *file, const char __user *buf,
121 return count; 121 return count;
122} 122}
123 123
124static struct watchdog_info ident = { 124static const struct watchdog_info ident = {
125 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 125 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
126 .identity = "PowerPC Book-E Watchdog", 126 .identity = "PowerPC Book-E Watchdog",
127}; 127};
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c
index 923cc68dba26..9291506b8b23 100644
--- a/drivers/watchdog/coh901327_wdt.c
+++ b/drivers/watchdog/coh901327_wdt.c
@@ -257,7 +257,7 @@ static long coh901327_ioctl(struct file *file, unsigned int cmd,
257 struct watchdog_info __user *ident; 257 struct watchdog_info __user *ident;
258 int __user *i; 258 int __user *i;
259 } uarg; 259 } uarg;
260 static struct watchdog_info ident = { 260 static const struct watchdog_info ident = {
261 .options = WDIOF_CARDRESET | 261 .options = WDIOF_CARDRESET |
262 WDIOF_SETTIMEOUT | 262 WDIOF_SETTIMEOUT |
263 WDIOF_KEEPALIVEPING, 263 WDIOF_KEEPALIVEPING,
diff --git a/drivers/watchdog/cpu5wdt.c b/drivers/watchdog/cpu5wdt.c
index 71f6d7eec9a8..edd3475f41db 100644
--- a/drivers/watchdog/cpu5wdt.c
+++ b/drivers/watchdog/cpu5wdt.c
@@ -154,7 +154,7 @@ static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
154 void __user *argp = (void __user *)arg; 154 void __user *argp = (void __user *)arg;
155 int __user *p = argp; 155 int __user *p = argp;
156 unsigned int value; 156 unsigned int value;
157 static struct watchdog_info ident = { 157 static const struct watchdog_info ident = {
158 .options = WDIOF_CARDRESET, 158 .options = WDIOF_CARDRESET,
159 .identity = "CPU5 WDT", 159 .identity = "CPU5 WDT",
160 }; 160 };
diff --git a/drivers/watchdog/cpwd.c b/drivers/watchdog/cpwd.c
index 081f2955419e..37ea052d4dee 100644
--- a/drivers/watchdog/cpwd.c
+++ b/drivers/watchdog/cpwd.c
@@ -403,7 +403,7 @@ static int cpwd_release(struct inode *inode, struct file *file)
403 403
404static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 404static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
405{ 405{
406 static struct watchdog_info info = { 406 static const struct watchdog_info info = {
407 .options = WDIOF_SETTIMEOUT, 407 .options = WDIOF_SETTIMEOUT,
408 .firmware_version = 1, 408 .firmware_version = 1,
409 .identity = DRIVER_NAME, 409 .identity = DRIVER_NAME,
diff --git a/drivers/watchdog/davinci_wdt.c b/drivers/watchdog/davinci_wdt.c
index 887136de1857..56162c87f5d8 100644
--- a/drivers/watchdog/davinci_wdt.c
+++ b/drivers/watchdog/davinci_wdt.c
@@ -142,7 +142,7 @@ davinci_wdt_write(struct file *file, const char *data, size_t len,
142 return len; 142 return len;
143} 143}
144 144
145static struct watchdog_info ident = { 145static const struct watchdog_info ident = {
146 .options = WDIOF_KEEPALIVEPING, 146 .options = WDIOF_KEEPALIVEPING,
147 .identity = "DaVinci Watchdog", 147 .identity = "DaVinci Watchdog",
148}; 148};
diff --git a/drivers/watchdog/ep93xx_wdt.c b/drivers/watchdog/ep93xx_wdt.c
index cdd55e0d09f8..88ed54e50f74 100644
--- a/drivers/watchdog/ep93xx_wdt.c
+++ b/drivers/watchdog/ep93xx_wdt.c
@@ -131,7 +131,7 @@ ep93xx_wdt_write(struct file *file, const char __user *data, size_t len,
131 return len; 131 return len;
132} 132}
133 133
134static struct watchdog_info ident = { 134static const struct watchdog_info ident = {
135 .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE, 135 .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE,
136 .identity = "EP93xx Watchdog", 136 .identity = "EP93xx Watchdog",
137}; 137};
diff --git a/drivers/watchdog/eurotechwdt.c b/drivers/watchdog/eurotechwdt.c
index 9add3541fb42..d1c4e55b1db0 100644
--- a/drivers/watchdog/eurotechwdt.c
+++ b/drivers/watchdog/eurotechwdt.c
@@ -238,7 +238,7 @@ static long eurwdt_ioctl(struct file *file,
238{ 238{
239 void __user *argp = (void __user *)arg; 239 void __user *argp = (void __user *)arg;
240 int __user *p = argp; 240 int __user *p = argp;
241 static struct watchdog_info ident = { 241 static const struct watchdog_info ident = {
242 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT 242 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
243 | WDIOF_MAGICCLOSE, 243 | WDIOF_MAGICCLOSE,
244 .firmware_version = 1, 244 .firmware_version = 1,
diff --git a/drivers/watchdog/gef_wdt.c b/drivers/watchdog/gef_wdt.c
index 734d9806a872..abdbad034a6c 100644
--- a/drivers/watchdog/gef_wdt.c
+++ b/drivers/watchdog/gef_wdt.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * GE Fanuc watchdog userspace interface 2 * GE watchdog userspace interface
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * 5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -161,11 +161,11 @@ static long gef_wdt_ioctl(struct file *file, unsigned int cmd,
161 int timeout; 161 int timeout;
162 int options; 162 int options;
163 void __user *argp = (void __user *)arg; 163 void __user *argp = (void __user *)arg;
164 static struct watchdog_info info = { 164 static const struct watchdog_info info = {
165 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | 165 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
166 WDIOF_KEEPALIVEPING, 166 WDIOF_KEEPALIVEPING,
167 .firmware_version = 0, 167 .firmware_version = 0,
168 .identity = "GE Fanuc watchdog", 168 .identity = "GE watchdog",
169 }; 169 };
170 170
171 switch (cmd) { 171 switch (cmd) {
@@ -311,7 +311,7 @@ static struct of_platform_driver gef_wdt_driver = {
311 311
312static int __init gef_wdt_init(void) 312static int __init gef_wdt_init(void)
313{ 313{
314 printk(KERN_INFO "GE Fanuc watchdog driver\n"); 314 printk(KERN_INFO "GE watchdog driver\n");
315 return of_register_platform_driver(&gef_wdt_driver); 315 return of_register_platform_driver(&gef_wdt_driver);
316} 316}
317 317
@@ -323,8 +323,8 @@ static void __exit gef_wdt_exit(void)
323module_init(gef_wdt_init); 323module_init(gef_wdt_init);
324module_exit(gef_wdt_exit); 324module_exit(gef_wdt_exit);
325 325
326MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com>"); 326MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com>");
327MODULE_DESCRIPTION("GE Fanuc watchdog driver"); 327MODULE_DESCRIPTION("GE watchdog driver");
328MODULE_LICENSE("GPL"); 328MODULE_LICENSE("GPL");
329MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 329MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
330MODULE_ALIAS("platform: gef_wdt"); 330MODULE_ALIAS("platform: gef_wdt");
diff --git a/drivers/watchdog/geodewdt.c b/drivers/watchdog/geodewdt.c
index 38252ff828ca..9b49b125ad5a 100644
--- a/drivers/watchdog/geodewdt.c
+++ b/drivers/watchdog/geodewdt.c
@@ -142,7 +142,7 @@ static long geodewdt_ioctl(struct file *file, unsigned int cmd,
142 int __user *p = argp; 142 int __user *p = argp;
143 int interval; 143 int interval;
144 144
145 static struct watchdog_info ident = { 145 static const struct watchdog_info ident = {
146 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING 146 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING
147 | WDIOF_MAGICCLOSE, 147 | WDIOF_MAGICCLOSE,
148 .firmware_version = 1, 148 .firmware_version = 1,
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index a6c5674c78e6..70c2c24660d0 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -554,7 +554,7 @@ static ssize_t hpwdt_write(struct file *file, const char __user *data,
554 return len; 554 return len;
555} 555}
556 556
557static struct watchdog_info ident = { 557static const struct watchdog_info ident = {
558 .options = WDIOF_SETTIMEOUT | 558 .options = WDIOF_SETTIMEOUT |
559 WDIOF_KEEPALIVEPING | 559 WDIOF_KEEPALIVEPING |
560 WDIOF_MAGICCLOSE, 560 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/i6300esb.c b/drivers/watchdog/i6300esb.c
index 7ba0b11ec525..bb9750a03942 100644
--- a/drivers/watchdog/i6300esb.c
+++ b/drivers/watchdog/i6300esb.c
@@ -34,7 +34,6 @@
34#include <linux/mm.h> 34#include <linux/mm.h>
35#include <linux/miscdevice.h> 35#include <linux/miscdevice.h>
36#include <linux/watchdog.h> 36#include <linux/watchdog.h>
37#include <linux/platform_device.h>
38#include <linux/init.h> 37#include <linux/init.h>
39#include <linux/pci.h> 38#include <linux/pci.h>
40#include <linux/ioport.h> 39#include <linux/ioport.h>
@@ -42,7 +41,7 @@
42#include <linux/io.h> 41#include <linux/io.h>
43 42
44/* Module and version information */ 43/* Module and version information */
45#define ESB_VERSION "0.04" 44#define ESB_VERSION "0.05"
46#define ESB_MODULE_NAME "i6300ESB timer" 45#define ESB_MODULE_NAME "i6300ESB timer"
47#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION 46#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
48#define PFX ESB_MODULE_NAME ": " 47#define PFX ESB_MODULE_NAME ": "
@@ -65,7 +64,7 @@
65/* Config register bits */ 64/* Config register bits */
66#define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */ 65#define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
67#define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */ 66#define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
68#define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */ 67#define ESB_WDT_INTTYPE (0x03 << 0) /* Interrupt type on timer1 timeout */
69 68
70/* Reload register bits */ 69/* Reload register bits */
71#define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */ 70#define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */
@@ -82,7 +81,9 @@ static unsigned long timer_alive;
82static struct pci_dev *esb_pci; 81static struct pci_dev *esb_pci;
83static unsigned short triggered; /* The status of the watchdog upon boot */ 82static unsigned short triggered; /* The status of the watchdog upon boot */
84static char esb_expect_close; 83static char esb_expect_close;
85static struct platform_device *esb_platform_device; 84
85/* We can only use 1 card due to the /dev/watchdog restriction */
86static int cards_found;
86 87
87/* module parameters */ 88/* module parameters */
88/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */ 89/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
@@ -111,8 +112,8 @@ MODULE_PARM_DESC(nowayout,
111 */ 112 */
112static inline void esb_unlock_registers(void) 113static inline void esb_unlock_registers(void)
113{ 114{
114 writeb(ESB_UNLOCK1, ESB_RELOAD_REG); 115 writew(ESB_UNLOCK1, ESB_RELOAD_REG);
115 writeb(ESB_UNLOCK2, ESB_RELOAD_REG); 116 writew(ESB_UNLOCK2, ESB_RELOAD_REG);
116} 117}
117 118
118static int esb_timer_start(void) 119static int esb_timer_start(void)
@@ -256,7 +257,7 @@ static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
256 int new_heartbeat; 257 int new_heartbeat;
257 void __user *argp = (void __user *)arg; 258 void __user *argp = (void __user *)arg;
258 int __user *p = argp; 259 int __user *p = argp;
259 static struct watchdog_info ident = { 260 static const struct watchdog_info ident = {
260 .options = WDIOF_SETTIMEOUT | 261 .options = WDIOF_SETTIMEOUT |
261 WDIOF_KEEPALIVEPING | 262 WDIOF_KEEPALIVEPING |
262 WDIOF_MAGICCLOSE, 263 WDIOF_MAGICCLOSE,
@@ -332,11 +333,6 @@ static struct miscdevice esb_miscdev = {
332 333
333/* 334/*
334 * Data for PCI driver interface 335 * Data for PCI driver interface
335 *
336 * This data only exists for exporting the supported
337 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
338 * register a pci_driver, because someone else might one day
339 * want to register another driver on the same PCI id.
340 */ 336 */
341static struct pci_device_id esb_pci_tbl[] = { 337static struct pci_device_id esb_pci_tbl[] = {
342 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), }, 338 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
@@ -348,29 +344,19 @@ MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
348 * Init & exit routines 344 * Init & exit routines
349 */ 345 */
350 346
351static unsigned char __devinit esb_getdevice(void) 347static unsigned char __devinit esb_getdevice(struct pci_dev *pdev)
352{ 348{
353 /* 349 if (pci_enable_device(pdev)) {
354 * Find the PCI device
355 */
356
357 esb_pci = pci_get_device(PCI_VENDOR_ID_INTEL,
358 PCI_DEVICE_ID_INTEL_ESB_9, NULL);
359
360 if (!esb_pci)
361 return 0;
362
363 if (pci_enable_device(esb_pci)) {
364 printk(KERN_ERR PFX "failed to enable device\n"); 350 printk(KERN_ERR PFX "failed to enable device\n");
365 goto err_devput; 351 goto err_devput;
366 } 352 }
367 353
368 if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) { 354 if (pci_request_region(pdev, 0, ESB_MODULE_NAME)) {
369 printk(KERN_ERR PFX "failed to request region\n"); 355 printk(KERN_ERR PFX "failed to request region\n");
370 goto err_disable; 356 goto err_disable;
371 } 357 }
372 358
373 BASEADDR = pci_ioremap_bar(esb_pci, 0); 359 BASEADDR = pci_ioremap_bar(pdev, 0);
374 if (BASEADDR == NULL) { 360 if (BASEADDR == NULL) {
375 /* Something's wrong here, BASEADDR has to be set */ 361 /* Something's wrong here, BASEADDR has to be set */
376 printk(KERN_ERR PFX "failed to get BASEADDR\n"); 362 printk(KERN_ERR PFX "failed to get BASEADDR\n");
@@ -378,14 +364,14 @@ static unsigned char __devinit esb_getdevice(void)
378 } 364 }
379 365
380 /* Done */ 366 /* Done */
367 esb_pci = pdev;
381 return 1; 368 return 1;
382 369
383err_release: 370err_release:
384 pci_release_region(esb_pci, 0); 371 pci_release_region(pdev, 0);
385err_disable: 372err_disable:
386 pci_disable_device(esb_pci); 373 pci_disable_device(pdev);
387err_devput: 374err_devput:
388 pci_dev_put(esb_pci);
389 return 0; 375 return 0;
390} 376}
391 377
@@ -430,12 +416,23 @@ static void __devinit esb_initdevice(void)
430 esb_timer_set_heartbeat(heartbeat); 416 esb_timer_set_heartbeat(heartbeat);
431} 417}
432 418
433static int __devinit esb_probe(struct platform_device *dev) 419static int __devinit esb_probe(struct pci_dev *pdev,
420 const struct pci_device_id *ent)
434{ 421{
435 int ret; 422 int ret;
436 423
424 cards_found++;
425 if (cards_found == 1)
426 printk(KERN_INFO PFX "Intel 6300ESB WatchDog Timer Driver v%s\n",
427 ESB_VERSION);
428
429 if (cards_found > 1) {
430 printk(KERN_ERR PFX "This driver only supports 1 device\n");
431 return -ENODEV;
432 }
433
437 /* Check whether or not the hardware watchdog is there */ 434 /* Check whether or not the hardware watchdog is there */
438 if (!esb_getdevice() || esb_pci == NULL) 435 if (!esb_getdevice(pdev) || esb_pci == NULL)
439 return -ENODEV; 436 return -ENODEV;
440 437
441 /* Check that the heartbeat value is within it's range; 438 /* Check that the heartbeat value is within it's range;
@@ -467,11 +464,11 @@ err_unmap:
467 iounmap(BASEADDR); 464 iounmap(BASEADDR);
468 pci_release_region(esb_pci, 0); 465 pci_release_region(esb_pci, 0);
469 pci_disable_device(esb_pci); 466 pci_disable_device(esb_pci);
470 pci_dev_put(esb_pci); 467 esb_pci = NULL;
471 return ret; 468 return ret;
472} 469}
473 470
474static int __devexit esb_remove(struct platform_device *dev) 471static void __devexit esb_remove(struct pci_dev *pdev)
475{ 472{
476 /* Stop the timer before we leave */ 473 /* Stop the timer before we leave */
477 if (!nowayout) 474 if (!nowayout)
@@ -482,54 +479,30 @@ static int __devexit esb_remove(struct platform_device *dev)
482 iounmap(BASEADDR); 479 iounmap(BASEADDR);
483 pci_release_region(esb_pci, 0); 480 pci_release_region(esb_pci, 0);
484 pci_disable_device(esb_pci); 481 pci_disable_device(esb_pci);
485 pci_dev_put(esb_pci); 482 esb_pci = NULL;
486 return 0;
487} 483}
488 484
489static void esb_shutdown(struct platform_device *dev) 485static void esb_shutdown(struct pci_dev *pdev)
490{ 486{
491 esb_timer_stop(); 487 esb_timer_stop();
492} 488}
493 489
494static struct platform_driver esb_platform_driver = { 490static struct pci_driver esb_driver = {
491 .name = ESB_MODULE_NAME,
492 .id_table = esb_pci_tbl,
495 .probe = esb_probe, 493 .probe = esb_probe,
496 .remove = __devexit_p(esb_remove), 494 .remove = __devexit_p(esb_remove),
497 .shutdown = esb_shutdown, 495 .shutdown = esb_shutdown,
498 .driver = {
499 .owner = THIS_MODULE,
500 .name = ESB_MODULE_NAME,
501 },
502}; 496};
503 497
504static int __init watchdog_init(void) 498static int __init watchdog_init(void)
505{ 499{
506 int err; 500 return pci_register_driver(&esb_driver);
507
508 printk(KERN_INFO PFX "Intel 6300ESB WatchDog Timer Driver v%s\n",
509 ESB_VERSION);
510
511 err = platform_driver_register(&esb_platform_driver);
512 if (err)
513 return err;
514
515 esb_platform_device = platform_device_register_simple(ESB_MODULE_NAME,
516 -1, NULL, 0);
517 if (IS_ERR(esb_platform_device)) {
518 err = PTR_ERR(esb_platform_device);
519 goto unreg_platform_driver;
520 }
521
522 return 0;
523
524unreg_platform_driver:
525 platform_driver_unregister(&esb_platform_driver);
526 return err;
527} 501}
528 502
529static void __exit watchdog_cleanup(void) 503static void __exit watchdog_cleanup(void)
530{ 504{
531 platform_device_unregister(esb_platform_device); 505 pci_unregister_driver(&esb_driver);
532 platform_driver_unregister(&esb_platform_driver);
533 printk(KERN_INFO PFX "Watchdog Module Unloaded.\n"); 506 printk(KERN_INFO PFX "Watchdog Module Unloaded.\n");
534} 507}
535 508
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index 4bdb7f1a9077..44bc6aa46edf 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -584,7 +584,7 @@ static long iTCO_wdt_ioctl(struct file *file, unsigned int cmd,
584 int new_heartbeat; 584 int new_heartbeat;
585 void __user *argp = (void __user *)arg; 585 void __user *argp = (void __user *)arg;
586 int __user *p = argp; 586 int __user *p = argp;
587 static struct watchdog_info ident = { 587 static const struct watchdog_info ident = {
588 .options = WDIOF_SETTIMEOUT | 588 .options = WDIOF_SETTIMEOUT |
589 WDIOF_KEEPALIVEPING | 589 WDIOF_KEEPALIVEPING |
590 WDIOF_MAGICCLOSE, 590 WDIOF_MAGICCLOSE,
@@ -698,7 +698,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
698 if (iTCO_wdt_private.iTCO_version == 2) { 698 if (iTCO_wdt_private.iTCO_version == 2) {
699 pci_read_config_dword(pdev, 0xf0, &base_address); 699 pci_read_config_dword(pdev, 0xf0, &base_address);
700 if ((base_address & 1) == 0) { 700 if ((base_address & 1) == 0) {
701 printk(KERN_ERR PFX "RCBA is disabled by harddware\n"); 701 printk(KERN_ERR PFX "RCBA is disabled by hardware\n");
702 ret = -ENODEV; 702 ret = -ENODEV;
703 goto out; 703 goto out;
704 } 704 }
@@ -708,8 +708,8 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
708 708
709 /* Check chipset's NO_REBOOT bit */ 709 /* Check chipset's NO_REBOOT bit */
710 if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) { 710 if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) {
711 printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, " 711 printk(KERN_INFO PFX "unable to reset NO_REBOOT flag, "
712 "reboot disabled by hardware\n"); 712 "platform may have disabled it\n");
713 ret = -ENODEV; /* Cannot reset NO_REBOOT bit */ 713 ret = -ENODEV; /* Cannot reset NO_REBOOT bit */
714 goto out_unmap; 714 goto out_unmap;
715 } 715 }
@@ -805,6 +805,7 @@ static void __devexit iTCO_wdt_cleanup(void)
805 805
806static int __devinit iTCO_wdt_probe(struct platform_device *dev) 806static int __devinit iTCO_wdt_probe(struct platform_device *dev)
807{ 807{
808 int ret = -ENODEV;
808 int found = 0; 809 int found = 0;
809 struct pci_dev *pdev = NULL; 810 struct pci_dev *pdev = NULL;
810 const struct pci_device_id *ent; 811 const struct pci_device_id *ent;
@@ -814,19 +815,17 @@ static int __devinit iTCO_wdt_probe(struct platform_device *dev)
814 for_each_pci_dev(pdev) { 815 for_each_pci_dev(pdev) {
815 ent = pci_match_id(iTCO_wdt_pci_tbl, pdev); 816 ent = pci_match_id(iTCO_wdt_pci_tbl, pdev);
816 if (ent) { 817 if (ent) {
817 if (!(iTCO_wdt_init(pdev, ent, dev))) { 818 found++;
818 found++; 819 ret = iTCO_wdt_init(pdev, ent, dev);
820 if (!ret)
819 break; 821 break;
820 }
821 } 822 }
822 } 823 }
823 824
824 if (!found) { 825 if (!found)
825 printk(KERN_INFO PFX "No card detected\n"); 826 printk(KERN_INFO PFX "No card detected\n");
826 return -ENODEV;
827 }
828 827
829 return 0; 828 return ret;
830} 829}
831 830
832static int __devexit iTCO_wdt_remove(struct platform_device *dev) 831static int __devexit iTCO_wdt_remove(struct platform_device *dev)
diff --git a/drivers/watchdog/ib700wdt.c b/drivers/watchdog/ib700wdt.c
index 4bef3ddff4a5..0149d8dfc81d 100644
--- a/drivers/watchdog/ib700wdt.c
+++ b/drivers/watchdog/ib700wdt.c
@@ -174,7 +174,7 @@ static long ibwdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
174 void __user *argp = (void __user *)arg; 174 void __user *argp = (void __user *)arg;
175 int __user *p = argp; 175 int __user *p = argp;
176 176
177 static struct watchdog_info ident = { 177 static const struct watchdog_info ident = {
178 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT 178 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT
179 | WDIOF_MAGICCLOSE, 179 | WDIOF_MAGICCLOSE,
180 .firmware_version = 1, 180 .firmware_version = 1,
diff --git a/drivers/watchdog/indydog.c b/drivers/watchdog/indydog.c
index bea8a124a559..1cc5609666d1 100644
--- a/drivers/watchdog/indydog.c
+++ b/drivers/watchdog/indydog.c
@@ -111,7 +111,7 @@ static long indydog_ioctl(struct file *file, unsigned int cmd,
111 unsigned long arg) 111 unsigned long arg)
112{ 112{
113 int options, retval = -EINVAL; 113 int options, retval = -EINVAL;
114 static struct watchdog_info ident = { 114 static const struct watchdog_info ident = {
115 .options = WDIOF_KEEPALIVEPING, 115 .options = WDIOF_KEEPALIVEPING,
116 .firmware_version = 0, 116 .firmware_version = 0,
117 .identity = "Hardware Watchdog for SGI IP22", 117 .identity = "Hardware Watchdog for SGI IP22",
diff --git a/drivers/watchdog/it8712f_wdt.c b/drivers/watchdog/it8712f_wdt.c
index daed48ded7fe..f52c162b1bea 100644
--- a/drivers/watchdog/it8712f_wdt.c
+++ b/drivers/watchdog/it8712f_wdt.c
@@ -236,7 +236,7 @@ static long it8712f_wdt_ioctl(struct file *file, unsigned int cmd,
236{ 236{
237 void __user *argp = (void __user *)arg; 237 void __user *argp = (void __user *)arg;
238 int __user *p = argp; 238 int __user *p = argp;
239 static struct watchdog_info ident = { 239 static const struct watchdog_info ident = {
240 .identity = "IT8712F Watchdog", 240 .identity = "IT8712F Watchdog",
241 .firmware_version = 1, 241 .firmware_version = 1,
242 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | 242 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
diff --git a/drivers/watchdog/it87_wdt.c b/drivers/watchdog/it87_wdt.c
index cc133c531d08..b709b3b2d1ef 100644
--- a/drivers/watchdog/it87_wdt.c
+++ b/drivers/watchdog/it87_wdt.c
@@ -421,7 +421,7 @@ static ssize_t wdt_write(struct file *file, const char __user *buf,
421 return count; 421 return count;
422} 422}
423 423
424static struct watchdog_info ident = { 424static const struct watchdog_info ident = {
425 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, 425 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
426 .firmware_version = 1, 426 .firmware_version = 1,
427 .identity = WATCHDOG_NAME, 427 .identity = WATCHDOG_NAME,
diff --git a/drivers/watchdog/ixp2000_wdt.c b/drivers/watchdog/ixp2000_wdt.c
index 3c79dc587958..e86952a7168c 100644
--- a/drivers/watchdog/ixp2000_wdt.c
+++ b/drivers/watchdog/ixp2000_wdt.c
@@ -100,7 +100,7 @@ static ssize_t ixp2000_wdt_write(struct file *file, const char *data,
100} 100}
101 101
102 102
103static struct watchdog_info ident = { 103static const struct watchdog_info ident = {
104 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | 104 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT |
105 WDIOF_KEEPALIVEPING, 105 WDIOF_KEEPALIVEPING,
106 .identity = "IXP2000 Watchdog", 106 .identity = "IXP2000 Watchdog",
diff --git a/drivers/watchdog/ixp4xx_wdt.c b/drivers/watchdog/ixp4xx_wdt.c
index 147b4d5c63b3..e02c0ecda26b 100644
--- a/drivers/watchdog/ixp4xx_wdt.c
+++ b/drivers/watchdog/ixp4xx_wdt.c
@@ -89,7 +89,7 @@ ixp4xx_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
89 return len; 89 return len;
90} 90}
91 91
92static struct watchdog_info ident = { 92static const struct watchdog_info ident = {
93 .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | 93 .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE |
94 WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 94 WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
95 .identity = "IXP4xx Watchdog", 95 .identity = "IXP4xx Watchdog",
diff --git a/drivers/watchdog/ks8695_wdt.c b/drivers/watchdog/ks8695_wdt.c
index e1c82769b08e..2852bb2e3fd9 100644
--- a/drivers/watchdog/ks8695_wdt.c
+++ b/drivers/watchdog/ks8695_wdt.c
@@ -145,7 +145,7 @@ static int ks8695_wdt_close(struct inode *inode, struct file *file)
145 return 0; 145 return 0;
146} 146}
147 147
148static struct watchdog_info ks8695_wdt_info = { 148static const struct watchdog_info ks8695_wdt_info = {
149 .identity = "ks8695 watchdog", 149 .identity = "ks8695 watchdog",
150 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 150 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
151}; 151};
diff --git a/drivers/watchdog/machzwd.c b/drivers/watchdog/machzwd.c
index 47d719717a3b..2d118cf022fc 100644
--- a/drivers/watchdog/machzwd.c
+++ b/drivers/watchdog/machzwd.c
@@ -101,7 +101,7 @@ MODULE_PARM_DESC(nowayout,
101 101
102#define PFX "machzwd" 102#define PFX "machzwd"
103 103
104static struct watchdog_info zf_info = { 104static const struct watchdog_info zf_info = {
105 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 105 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
106 .firmware_version = 1, 106 .firmware_version = 1,
107 .identity = "ZF-Logic watchdog", 107 .identity = "ZF-Logic watchdog",
diff --git a/drivers/watchdog/max63xx_wdt.c b/drivers/watchdog/max63xx_wdt.c
new file mode 100644
index 000000000000..6eb91d757604
--- /dev/null
+++ b/drivers/watchdog/max63xx_wdt.c
@@ -0,0 +1,397 @@
1/*
2 * drivers/char/watchdog/max63xx_wdt.c
3 *
4 * Driver for max63{69,70,71,72,73,74} watchdog timers
5 *
6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * This driver assumes the watchdog pins are memory mapped (as it is
13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
14 * another interface, some abstraction will have to be introduced.
15 */
16
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/fs.h>
22#include <linux/miscdevice.h>
23#include <linux/watchdog.h>
24#include <linux/init.h>
25#include <linux/bitops.h>
26#include <linux/platform_device.h>
27#include <linux/spinlock.h>
28#include <linux/uaccess.h>
29#include <linux/io.h>
30#include <linux/device.h>
31
32#define DEFAULT_HEARTBEAT 60
33#define MAX_HEARTBEAT 60
34
35static int heartbeat = DEFAULT_HEARTBEAT;
36static int nowayout = WATCHDOG_NOWAYOUT;
37
38/*
39 * Memory mapping: a single byte, 3 first lower bits to select bit 3
40 * to ping the watchdog.
41 */
42#define MAX6369_WDSET (7 << 0)
43#define MAX6369_WDI (1 << 3)
44
45static DEFINE_SPINLOCK(io_lock);
46
47static unsigned long wdt_status;
48#define WDT_IN_USE 0
49#define WDT_RUNNING 1
50#define WDT_OK_TO_CLOSE 2
51
52static int nodelay;
53static struct resource *wdt_mem;
54static void __iomem *wdt_base;
55static struct platform_device *max63xx_pdev;
56
57/*
58 * The timeout values used are actually the absolute minimum the chip
59 * offers. Typical values on my board are slightly over twice as long
60 * (10s setting ends up with a 25s timeout), and can be up to 3 times
61 * the nominal setting (according to the datasheet). So please take
62 * these values with a grain of salt. Same goes for the initial delay
63 * "feature". Only max6373/74 have a few settings without this initial
64 * delay (selected with the "nodelay" parameter).
65 *
66 * I also decided to remove from the tables any timeout smaller than a
67 * second, as it looked completly overkill...
68 */
69
70/* Timeouts in second */
71struct max63xx_timeout {
72 u8 wdset;
73 u8 tdelay;
74 u8 twd;
75};
76
77static struct max63xx_timeout max6369_table[] = {
78 { 5, 1, 1 },
79 { 6, 10, 10 },
80 { 7, 60, 60 },
81 { },
82};
83
84static struct max63xx_timeout max6371_table[] = {
85 { 6, 60, 3 },
86 { 7, 60, 60 },
87 { },
88};
89
90static struct max63xx_timeout max6373_table[] = {
91 { 2, 60, 1 },
92 { 5, 0, 1 },
93 { 1, 3, 3 },
94 { 7, 60, 10 },
95 { 6, 0, 10 },
96 { },
97};
98
99static struct max63xx_timeout *current_timeout;
100
101static struct max63xx_timeout *
102max63xx_select_timeout(struct max63xx_timeout *table, int value)
103{
104 while (table->twd) {
105 if (value <= table->twd) {
106 if (nodelay && table->tdelay == 0)
107 return table;
108
109 if (!nodelay)
110 return table;
111 }
112
113 table++;
114 }
115
116 return NULL;
117}
118
119static void max63xx_wdt_ping(void)
120{
121 u8 val;
122
123 spin_lock(&io_lock);
124
125 val = __raw_readb(wdt_base);
126
127 __raw_writeb(val | MAX6369_WDI, wdt_base);
128 __raw_writeb(val & ~MAX6369_WDI, wdt_base);
129
130 spin_unlock(&io_lock);
131}
132
133static void max63xx_wdt_enable(struct max63xx_timeout *entry)
134{
135 u8 val;
136
137 if (test_and_set_bit(WDT_RUNNING, &wdt_status))
138 return;
139
140 spin_lock(&io_lock);
141
142 val = __raw_readb(wdt_base);
143 val &= ~MAX6369_WDSET;
144 val |= entry->wdset;
145 __raw_writeb(val, wdt_base);
146
147 spin_unlock(&io_lock);
148
149 /* check for a edge triggered startup */
150 if (entry->tdelay == 0)
151 max63xx_wdt_ping();
152}
153
154static void max63xx_wdt_disable(void)
155{
156 spin_lock(&io_lock);
157
158 __raw_writeb(3, wdt_base);
159
160 spin_unlock(&io_lock);
161
162 clear_bit(WDT_RUNNING, &wdt_status);
163}
164
165static int max63xx_wdt_open(struct inode *inode, struct file *file)
166{
167 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
168 return -EBUSY;
169
170 max63xx_wdt_enable(current_timeout);
171 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
172
173 return nonseekable_open(inode, file);
174}
175
176static ssize_t max63xx_wdt_write(struct file *file, const char *data,
177 size_t len, loff_t *ppos)
178{
179 if (len) {
180 if (!nowayout) {
181 size_t i;
182
183 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
184 for (i = 0; i != len; i++) {
185 char c;
186
187 if (get_user(c, data + i))
188 return -EFAULT;
189
190 if (c == 'V')
191 set_bit(WDT_OK_TO_CLOSE, &wdt_status);
192 }
193 }
194
195 max63xx_wdt_ping();
196 }
197
198 return len;
199}
200
201static const struct watchdog_info ident = {
202 .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
203 .identity = "max63xx Watchdog",
204};
205
206static long max63xx_wdt_ioctl(struct file *file, unsigned int cmd,
207 unsigned long arg)
208{
209 int ret = -ENOTTY;
210
211 switch (cmd) {
212 case WDIOC_GETSUPPORT:
213 ret = copy_to_user((struct watchdog_info *)arg, &ident,
214 sizeof(ident)) ? -EFAULT : 0;
215 break;
216
217 case WDIOC_GETSTATUS:
218 case WDIOC_GETBOOTSTATUS:
219 ret = put_user(0, (int *)arg);
220 break;
221
222 case WDIOC_KEEPALIVE:
223 max63xx_wdt_ping();
224 ret = 0;
225 break;
226
227 case WDIOC_GETTIMEOUT:
228 ret = put_user(heartbeat, (int *)arg);
229 break;
230 }
231 return ret;
232}
233
234static int max63xx_wdt_release(struct inode *inode, struct file *file)
235{
236 if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
237 max63xx_wdt_disable();
238 else
239 dev_crit(&max63xx_pdev->dev,
240 "device closed unexpectedly - timer will not stop\n");
241
242 clear_bit(WDT_IN_USE, &wdt_status);
243 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
244
245 return 0;
246}
247
248static const struct file_operations max63xx_wdt_fops = {
249 .owner = THIS_MODULE,
250 .llseek = no_llseek,
251 .write = max63xx_wdt_write,
252 .unlocked_ioctl = max63xx_wdt_ioctl,
253 .open = max63xx_wdt_open,
254 .release = max63xx_wdt_release,
255};
256
257static struct miscdevice max63xx_wdt_miscdev = {
258 .minor = WATCHDOG_MINOR,
259 .name = "watchdog",
260 .fops = &max63xx_wdt_fops,
261};
262
263static int __devinit max63xx_wdt_probe(struct platform_device *pdev)
264{
265 int ret = 0;
266 int size;
267 struct resource *res;
268 struct device *dev = &pdev->dev;
269 struct max63xx_timeout *table;
270
271 table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
272
273 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
274 heartbeat = DEFAULT_HEARTBEAT;
275
276 dev_info(dev, "requesting %ds heartbeat\n", heartbeat);
277 current_timeout = max63xx_select_timeout(table, heartbeat);
278
279 if (!current_timeout) {
280 dev_err(dev, "unable to satisfy heartbeat request\n");
281 return -EINVAL;
282 }
283
284 dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
285 current_timeout->twd, current_timeout->tdelay);
286
287 heartbeat = current_timeout->twd;
288
289 max63xx_pdev = pdev;
290
291 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
292 if (res == NULL) {
293 dev_err(dev, "failed to get memory region resource\n");
294 return -ENOENT;
295 }
296
297 size = resource_size(res);
298 wdt_mem = request_mem_region(res->start, size, pdev->name);
299
300 if (wdt_mem == NULL) {
301 dev_err(dev, "failed to get memory region\n");
302 return -ENOENT;
303 }
304
305 wdt_base = ioremap(res->start, size);
306 if (!wdt_base) {
307 dev_err(dev, "failed to map memory region\n");
308 ret = -ENOMEM;
309 goto out_request;
310 }
311
312 ret = misc_register(&max63xx_wdt_miscdev);
313 if (ret < 0) {
314 dev_err(dev, "cannot register misc device\n");
315 goto out_unmap;
316 }
317
318 return 0;
319
320out_unmap:
321 iounmap(wdt_base);
322out_request:
323 release_resource(wdt_mem);
324 kfree(wdt_mem);
325
326 return ret;
327}
328
329static int __devexit max63xx_wdt_remove(struct platform_device *pdev)
330{
331 misc_deregister(&max63xx_wdt_miscdev);
332 if (wdt_mem) {
333 release_resource(wdt_mem);
334 kfree(wdt_mem);
335 wdt_mem = NULL;
336 }
337
338 if (wdt_base)
339 iounmap(wdt_base);
340
341 return 0;
342}
343
344static struct platform_device_id max63xx_id_table[] = {
345 { "max6369_wdt", (kernel_ulong_t)max6369_table, },
346 { "max6370_wdt", (kernel_ulong_t)max6369_table, },
347 { "max6371_wdt", (kernel_ulong_t)max6371_table, },
348 { "max6372_wdt", (kernel_ulong_t)max6371_table, },
349 { "max6373_wdt", (kernel_ulong_t)max6373_table, },
350 { "max6374_wdt", (kernel_ulong_t)max6373_table, },
351 { },
352};
353MODULE_DEVICE_TABLE(platform, max63xx_id_table);
354
355static struct platform_driver max63xx_wdt_driver = {
356 .probe = max63xx_wdt_probe,
357 .remove = __devexit_p(max63xx_wdt_remove),
358 .id_table = max63xx_id_table,
359 .driver = {
360 .name = "max63xx_wdt",
361 .owner = THIS_MODULE,
362 },
363};
364
365static int __init max63xx_wdt_init(void)
366{
367 return platform_driver_register(&max63xx_wdt_driver);
368}
369
370static void __exit max63xx_wdt_exit(void)
371{
372 platform_driver_unregister(&max63xx_wdt_driver);
373}
374
375module_init(max63xx_wdt_init);
376module_exit(max63xx_wdt_exit);
377
378MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
379MODULE_DESCRIPTION("max63xx Watchdog Driver");
380
381module_param(heartbeat, int, 0);
382MODULE_PARM_DESC(heartbeat,
383 "Watchdog heartbeat period in seconds from 1 to "
384 __MODULE_STRING(MAX_HEARTBEAT) ", default "
385 __MODULE_STRING(DEFAULT_HEARTBEAT));
386
387module_param(nowayout, int, 0);
388MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
389 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
390
391module_param(nodelay, int, 0);
392MODULE_PARM_DESC(nodelay,
393 "Force selection of a timeout setting without initial delay "
394 "(max6373/74 only, default=0)");
395
396MODULE_LICENSE("GPL");
397MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/drivers/watchdog/mixcomwd.c b/drivers/watchdog/mixcomwd.c
index 407b025cb104..bc820d16699a 100644
--- a/drivers/watchdog/mixcomwd.c
+++ b/drivers/watchdog/mixcomwd.c
@@ -201,7 +201,7 @@ static long mixcomwd_ioctl(struct file *file,
201 void __user *argp = (void __user *)arg; 201 void __user *argp = (void __user *)arg;
202 int __user *p = argp; 202 int __user *p = argp;
203 int status; 203 int status;
204 static struct watchdog_info ident = { 204 static const struct watchdog_info ident = {
205 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 205 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
206 .firmware_version = 1, 206 .firmware_version = 1,
207 .identity = "MixCOM watchdog", 207 .identity = "MixCOM watchdog",
diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
index 38c588ee694f..4e3941c5e293 100644
--- a/drivers/watchdog/mpc8xxx_wdt.c
+++ b/drivers/watchdog/mpc8xxx_wdt.c
@@ -148,7 +148,7 @@ static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
148{ 148{
149 void __user *argp = (void __user *)arg; 149 void __user *argp = (void __user *)arg;
150 int __user *p = argp; 150 int __user *p = argp;
151 static struct watchdog_info ident = { 151 static const struct watchdog_info ident = {
152 .options = WDIOF_KEEPALIVEPING, 152 .options = WDIOF_KEEPALIVEPING,
153 .firmware_version = 1, 153 .firmware_version = 1,
154 .identity = "MPC8xxx", 154 .identity = "MPC8xxx",
diff --git a/drivers/watchdog/mpcore_wdt.c b/drivers/watchdog/mpcore_wdt.c
index a2dc07c2ed49..b0646dac924e 100644
--- a/drivers/watchdog/mpcore_wdt.c
+++ b/drivers/watchdog/mpcore_wdt.c
@@ -213,7 +213,7 @@ static ssize_t mpcore_wdt_write(struct file *file, const char *data,
213 return len; 213 return len;
214} 214}
215 215
216static struct watchdog_info ident = { 216static const struct watchdog_info ident = {
217 .options = WDIOF_SETTIMEOUT | 217 .options = WDIOF_SETTIMEOUT |
218 WDIOF_KEEPALIVEPING | 218 WDIOF_KEEPALIVEPING |
219 WDIOF_MAGICCLOSE, 219 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/mv64x60_wdt.c b/drivers/watchdog/mv64x60_wdt.c
index a51dbe4c43da..97f8a48d8b78 100644
--- a/drivers/watchdog/mv64x60_wdt.c
+++ b/drivers/watchdog/mv64x60_wdt.c
@@ -179,7 +179,7 @@ static long mv64x60_wdt_ioctl(struct file *file,
179 int timeout; 179 int timeout;
180 int options; 180 int options;
181 void __user *argp = (void __user *)arg; 181 void __user *argp = (void __user *)arg;
182 static struct watchdog_info info = { 182 static const struct watchdog_info info = {
183 .options = WDIOF_SETTIMEOUT | 183 .options = WDIOF_SETTIMEOUT |
184 WDIOF_MAGICCLOSE | 184 WDIOF_MAGICCLOSE |
185 WDIOF_KEEPALIVEPING, 185 WDIOF_KEEPALIVEPING,
diff --git a/drivers/watchdog/pc87413_wdt.c b/drivers/watchdog/pc87413_wdt.c
index 1a2b916e3f8d..d3aa2f1fe61d 100644
--- a/drivers/watchdog/pc87413_wdt.c
+++ b/drivers/watchdog/pc87413_wdt.c
@@ -407,7 +407,7 @@ static long pc87413_ioctl(struct file *file, unsigned int cmd,
407 int __user *i; 407 int __user *i;
408 } uarg; 408 } uarg;
409 409
410 static struct watchdog_info ident = { 410 static const struct watchdog_info ident = {
411 .options = WDIOF_KEEPALIVEPING | 411 .options = WDIOF_KEEPALIVEPING |
412 WDIOF_SETTIMEOUT | 412 WDIOF_SETTIMEOUT |
413 WDIOF_MAGICCLOSE, 413 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/pcwd.c b/drivers/watchdog/pcwd.c
index aa9512321f3a..06f7922606c0 100644
--- a/drivers/watchdog/pcwd.c
+++ b/drivers/watchdog/pcwd.c
@@ -606,7 +606,7 @@ static long pcwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
606 int temperature; 606 int temperature;
607 int new_heartbeat; 607 int new_heartbeat;
608 int __user *argp = (int __user *)arg; 608 int __user *argp = (int __user *)arg;
609 static struct watchdog_info ident = { 609 static const struct watchdog_info ident = {
610 .options = WDIOF_OVERHEAT | 610 .options = WDIOF_OVERHEAT |
611 WDIOF_CARDRESET | 611 WDIOF_CARDRESET |
612 WDIOF_KEEPALIVEPING | 612 WDIOF_KEEPALIVEPING |
diff --git a/drivers/watchdog/pcwd_pci.c b/drivers/watchdog/pcwd_pci.c
index 698f51bff1bc..64374d636f09 100644
--- a/drivers/watchdog/pcwd_pci.c
+++ b/drivers/watchdog/pcwd_pci.c
@@ -481,7 +481,7 @@ static long pcipcwd_ioctl(struct file *file, unsigned int cmd,
481{ 481{
482 void __user *argp = (void __user *)arg; 482 void __user *argp = (void __user *)arg;
483 int __user *p = argp; 483 int __user *p = argp;
484 static struct watchdog_info ident = { 484 static const struct watchdog_info ident = {
485 .options = WDIOF_OVERHEAT | 485 .options = WDIOF_OVERHEAT |
486 WDIOF_CARDRESET | 486 WDIOF_CARDRESET |
487 WDIOF_KEEPALIVEPING | 487 WDIOF_KEEPALIVEPING |
diff --git a/drivers/watchdog/pcwd_usb.c b/drivers/watchdog/pcwd_usb.c
index 052fe451851f..8e4eacc5bb52 100644
--- a/drivers/watchdog/pcwd_usb.c
+++ b/drivers/watchdog/pcwd_usb.c
@@ -404,7 +404,7 @@ static long usb_pcwd_ioctl(struct file *file, unsigned int cmd,
404{ 404{
405 void __user *argp = (void __user *)arg; 405 void __user *argp = (void __user *)arg;
406 int __user *p = argp; 406 int __user *p = argp;
407 static struct watchdog_info ident = { 407 static const struct watchdog_info ident = {
408 .options = WDIOF_KEEPALIVEPING | 408 .options = WDIOF_KEEPALIVEPING |
409 WDIOF_SETTIMEOUT | 409 WDIOF_SETTIMEOUT |
410 WDIOF_MAGICCLOSE, 410 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/pika_wdt.c b/drivers/watchdog/pika_wdt.c
index 2d22e996e996..435ec2aed4fe 100644
--- a/drivers/watchdog/pika_wdt.c
+++ b/drivers/watchdog/pika_wdt.c
@@ -52,7 +52,7 @@ static struct {
52 struct timer_list timer; /* The timer that pings the watchdog */ 52 struct timer_list timer; /* The timer that pings the watchdog */
53} pikawdt_private; 53} pikawdt_private;
54 54
55static struct watchdog_info ident = { 55static const struct watchdog_info ident = {
56 .identity = DRV_NAME, 56 .identity = DRV_NAME,
57 .options = WDIOF_CARDRESET | 57 .options = WDIOF_CARDRESET |
58 WDIOF_SETTIMEOUT | 58 WDIOF_SETTIMEOUT |
diff --git a/drivers/watchdog/pnx833x_wdt.c b/drivers/watchdog/pnx833x_wdt.c
index 538ec2c05197..09102f09e681 100644
--- a/drivers/watchdog/pnx833x_wdt.c
+++ b/drivers/watchdog/pnx833x_wdt.c
@@ -141,7 +141,7 @@ static long pnx833x_wdt_ioctl(struct file *file, unsigned int cmd,
141 int options, new_timeout = 0; 141 int options, new_timeout = 0;
142 uint32_t timeout, timeout_left = 0; 142 uint32_t timeout, timeout_left = 0;
143 143
144 static struct watchdog_info ident = { 144 static const struct watchdog_info ident = {
145 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT, 145 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
146 .firmware_version = 0, 146 .firmware_version = 0,
147 .identity = "Hardware Watchdog for PNX833x", 147 .identity = "Hardware Watchdog for PNX833x",
diff --git a/drivers/watchdog/rc32434_wdt.c b/drivers/watchdog/rc32434_wdt.c
index bf12d06b5877..d4c29b5311a4 100644
--- a/drivers/watchdog/rc32434_wdt.c
+++ b/drivers/watchdog/rc32434_wdt.c
@@ -198,7 +198,7 @@ static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
198 void __user *argp = (void __user *)arg; 198 void __user *argp = (void __user *)arg;
199 int new_timeout; 199 int new_timeout;
200 unsigned int value; 200 unsigned int value;
201 static struct watchdog_info ident = { 201 static const struct watchdog_info ident = {
202 .options = WDIOF_SETTIMEOUT | 202 .options = WDIOF_SETTIMEOUT |
203 WDIOF_KEEPALIVEPING | 203 WDIOF_KEEPALIVEPING |
204 WDIOF_MAGICCLOSE, 204 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/rdc321x_wdt.c b/drivers/watchdog/rdc321x_wdt.c
index 4976bfd1fce6..69c6adbd8205 100644
--- a/drivers/watchdog/rdc321x_wdt.c
+++ b/drivers/watchdog/rdc321x_wdt.c
@@ -149,7 +149,7 @@ static long rdc321x_wdt_ioctl(struct file *file, unsigned int cmd,
149{ 149{
150 void __user *argp = (void __user *)arg; 150 void __user *argp = (void __user *)arg;
151 unsigned int value; 151 unsigned int value;
152 static struct watchdog_info ident = { 152 static const struct watchdog_info ident = {
153 .options = WDIOF_CARDRESET, 153 .options = WDIOF_CARDRESET,
154 .identity = "RDC321x WDT", 154 .identity = "RDC321x WDT",
155 }; 155 };
diff --git a/drivers/watchdog/riowd.c b/drivers/watchdog/riowd.c
index c14ae8676903..ae57bf9e1b03 100644
--- a/drivers/watchdog/riowd.c
+++ b/drivers/watchdog/riowd.c
@@ -85,7 +85,7 @@ static int riowd_release(struct inode *inode, struct file *filp)
85 85
86static long riowd_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) 86static long riowd_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
87{ 87{
88 static struct watchdog_info info = { 88 static const struct watchdog_info info = {
89 .options = WDIOF_SETTIMEOUT, 89 .options = WDIOF_SETTIMEOUT,
90 .firmware_version = 1, 90 .firmware_version = 1,
91 .identity = DRIVER_NAME, 91 .identity = DRIVER_NAME,
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c
index e6763d2a567b..8d44c9b6fb5b 100644
--- a/drivers/watchdog/sbc_fitpc2_wdt.c
+++ b/drivers/watchdog/sbc_fitpc2_wdt.c
@@ -111,7 +111,7 @@ out:
111} 111}
112 112
113 113
114static struct watchdog_info ident = { 114static const struct watchdog_info ident = {
115 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | 115 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT |
116 WDIOF_KEEPALIVEPING, 116 WDIOF_KEEPALIVEPING,
117 .identity = WATCHDOG_NAME, 117 .identity = WATCHDOG_NAME,
diff --git a/drivers/watchdog/sch311x_wdt.c b/drivers/watchdog/sch311x_wdt.c
index 569eb295a7a8..9c40f48804f5 100644
--- a/drivers/watchdog/sch311x_wdt.c
+++ b/drivers/watchdog/sch311x_wdt.c
@@ -250,7 +250,7 @@ static long sch311x_wdt_ioctl(struct file *file, unsigned int cmd,
250 int new_timeout; 250 int new_timeout;
251 void __user *argp = (void __user *)arg; 251 void __user *argp = (void __user *)arg;
252 int __user *p = argp; 252 int __user *p = argp;
253 static struct watchdog_info ident = { 253 static const struct watchdog_info ident = {
254 .options = WDIOF_KEEPALIVEPING | 254 .options = WDIOF_KEEPALIVEPING |
255 WDIOF_SETTIMEOUT | 255 WDIOF_SETTIMEOUT |
256 WDIOF_MAGICCLOSE, 256 WDIOF_MAGICCLOSE,
diff --git a/drivers/watchdog/stmp3xxx_wdt.c b/drivers/watchdog/stmp3xxx_wdt.c
index 5dd952681f32..b3421fd2cda8 100644
--- a/drivers/watchdog/stmp3xxx_wdt.c
+++ b/drivers/watchdog/stmp3xxx_wdt.c
@@ -94,7 +94,7 @@ static ssize_t stmp3xxx_wdt_write(struct file *file, const char __user *data,
94 return len; 94 return len;
95} 95}
96 96
97static struct watchdog_info ident = { 97static const struct watchdog_info ident = {
98 .options = WDIOF_CARDRESET | 98 .options = WDIOF_CARDRESET |
99 WDIOF_MAGICCLOSE | 99 WDIOF_MAGICCLOSE |
100 WDIOF_SETTIMEOUT | 100 WDIOF_SETTIMEOUT |
diff --git a/drivers/watchdog/ts72xx_wdt.c b/drivers/watchdog/ts72xx_wdt.c
new file mode 100644
index 000000000000..565a2c3321e5
--- /dev/null
+++ b/drivers/watchdog/ts72xx_wdt.c
@@ -0,0 +1,520 @@
1/*
2 * Watchdog driver for Technologic Systems TS-72xx based SBCs
3 * (TS-7200, TS-7250 and TS-7260). These boards have external
4 * glue logic CPLD chip, which includes programmable watchdog
5 * timer.
6 *
7 * Copyright (c) 2009 Mika Westerberg <mika.westerberg@iki.fi>
8 *
9 * This driver is based on ep93xx_wdt and wm831x_wdt drivers.
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15
16#include <linux/fs.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/miscdevice.h>
21#include <linux/mutex.h>
22#include <linux/platform_device.h>
23#include <linux/watchdog.h>
24#include <linux/uaccess.h>
25
26#define TS72XX_WDT_FEED_VAL 0x05
27#define TS72XX_WDT_DEFAULT_TIMEOUT 8
28
29static int timeout = TS72XX_WDT_DEFAULT_TIMEOUT;
30module_param(timeout, int, 0);
31MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. "
32 "(1 <= timeout <= 8, default="
33 __MODULE_STRING(TS72XX_WDT_DEFAULT_TIMEOUT)
34 ")");
35
36static int nowayout = WATCHDOG_NOWAYOUT;
37module_param(nowayout, int, 0);
38MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
39
40/**
41 * struct ts72xx_wdt - watchdog control structure
42 * @lock: lock that protects this structure
43 * @regval: watchdog timeout value suitable for control register
44 * @flags: flags controlling watchdog device state
45 * @control_reg: watchdog control register
46 * @feed_reg: watchdog feed register
47 * @pdev: back pointer to platform dev
48 */
49struct ts72xx_wdt {
50 struct mutex lock;
51 int regval;
52
53#define TS72XX_WDT_BUSY_FLAG 1
54#define TS72XX_WDT_EXPECT_CLOSE_FLAG 2
55 int flags;
56
57 void __iomem *control_reg;
58 void __iomem *feed_reg;
59
60 struct platform_device *pdev;
61};
62
63struct platform_device *ts72xx_wdt_pdev;
64
65/*
66 * TS-72xx Watchdog supports following timeouts (value written
67 * to control register):
68 * value description
69 * -------------------------
70 * 0x00 watchdog disabled
71 * 0x01 250ms
72 * 0x02 500ms
73 * 0x03 1s
74 * 0x04 reserved
75 * 0x05 2s
76 * 0x06 4s
77 * 0x07 8s
78 *
79 * Timeouts below 1s are not very usable so we don't
80 * allow them at all.
81 *
82 * We provide two functions that convert between these:
83 * timeout_to_regval() and regval_to_timeout().
84 */
85static const struct {
86 int timeout;
87 int regval;
88} ts72xx_wdt_map[] = {
89 { 1, 3 },
90 { 2, 5 },
91 { 4, 6 },
92 { 8, 7 },
93};
94
95/**
96 * timeout_to_regval() - converts given timeout to control register value
97 * @new_timeout: timeout in seconds to be converted
98 *
99 * Function converts given @new_timeout into valid value that can
100 * be programmed into watchdog control register. When conversion is
101 * not possible, function returns %-EINVAL.
102 */
103static int timeout_to_regval(int new_timeout)
104{
105 int i;
106
107 /* first limit it to 1 - 8 seconds */
108 new_timeout = clamp_val(new_timeout, 1, 8);
109
110 for (i = 0; i < ARRAY_SIZE(ts72xx_wdt_map); i++) {
111 if (ts72xx_wdt_map[i].timeout >= new_timeout)
112 return ts72xx_wdt_map[i].regval;
113 }
114
115 return -EINVAL;
116}
117
118/**
119 * regval_to_timeout() - converts control register value to timeout
120 * @regval: control register value to be converted
121 *
122 * Function converts given @regval to timeout in seconds (1, 2, 4 or 8).
123 * If @regval cannot be converted, function returns %-EINVAL.
124 */
125static int regval_to_timeout(int regval)
126{
127 int i;
128
129 for (i = 0; i < ARRAY_SIZE(ts72xx_wdt_map); i++) {
130 if (ts72xx_wdt_map[i].regval == regval)
131 return ts72xx_wdt_map[i].timeout;
132 }
133
134 return -EINVAL;
135}
136
137/**
138 * ts72xx_wdt_kick() - kick the watchdog
139 * @wdt: watchdog to be kicked
140 *
141 * Called with @wdt->lock held.
142 */
143static inline void ts72xx_wdt_kick(struct ts72xx_wdt *wdt)
144{
145 __raw_writeb(TS72XX_WDT_FEED_VAL, wdt->feed_reg);
146}
147
148/**
149 * ts72xx_wdt_start() - starts the watchdog timer
150 * @wdt: watchdog to be started
151 *
152 * This function programs timeout to watchdog timer
153 * and starts it.
154 *
155 * Called with @wdt->lock held.
156 */
157static void ts72xx_wdt_start(struct ts72xx_wdt *wdt)
158{
159 /*
160 * To program the wdt, it first must be "fed" and
161 * only after that (within 30 usecs) the configuration
162 * can be changed.
163 */
164 ts72xx_wdt_kick(wdt);
165 __raw_writeb((u8)wdt->regval, wdt->control_reg);
166}
167
168/**
169 * ts72xx_wdt_stop() - stops the watchdog timer
170 * @wdt: watchdog to be stopped
171 *
172 * Called with @wdt->lock held.
173 */
174static void ts72xx_wdt_stop(struct ts72xx_wdt *wdt)
175{
176 ts72xx_wdt_kick(wdt);
177 __raw_writeb(0, wdt->control_reg);
178}
179
180static int ts72xx_wdt_open(struct inode *inode, struct file *file)
181{
182 struct ts72xx_wdt *wdt = platform_get_drvdata(ts72xx_wdt_pdev);
183 int regval;
184
185 /*
186 * Try to convert default timeout to valid register
187 * value first.
188 */
189 regval = timeout_to_regval(timeout);
190 if (regval < 0) {
191 dev_err(&wdt->pdev->dev,
192 "failed to convert timeout (%d) to register value\n",
193 timeout);
194 return -EINVAL;
195 }
196
197 if (mutex_lock_interruptible(&wdt->lock))
198 return -ERESTARTSYS;
199
200 if ((wdt->flags & TS72XX_WDT_BUSY_FLAG) != 0) {
201 mutex_unlock(&wdt->lock);
202 return -EBUSY;
203 }
204
205 wdt->flags = TS72XX_WDT_BUSY_FLAG;
206 wdt->regval = regval;
207 file->private_data = wdt;
208
209 ts72xx_wdt_start(wdt);
210
211 mutex_unlock(&wdt->lock);
212 return nonseekable_open(inode, file);
213}
214
215static int ts72xx_wdt_release(struct inode *inode, struct file *file)
216{
217 struct ts72xx_wdt *wdt = file->private_data;
218
219 if (mutex_lock_interruptible(&wdt->lock))
220 return -ERESTARTSYS;
221
222 if ((wdt->flags & TS72XX_WDT_EXPECT_CLOSE_FLAG) != 0) {
223 ts72xx_wdt_stop(wdt);
224 } else {
225 dev_warn(&wdt->pdev->dev,
226 "TS-72XX WDT device closed unexpectly. "
227 "Watchdog timer will not stop!\n");
228 /*
229 * Kick it one more time, to give userland some time
230 * to recover (for example, respawning the kicker
231 * daemon).
232 */
233 ts72xx_wdt_kick(wdt);
234 }
235
236 wdt->flags = 0;
237
238 mutex_unlock(&wdt->lock);
239 return 0;
240}
241
242static ssize_t ts72xx_wdt_write(struct file *file,
243 const char __user *data,
244 size_t len,
245 loff_t *ppos)
246{
247 struct ts72xx_wdt *wdt = file->private_data;
248
249 if (!len)
250 return 0;
251
252 if (mutex_lock_interruptible(&wdt->lock))
253 return -ERESTARTSYS;
254
255 ts72xx_wdt_kick(wdt);
256
257 /*
258 * Support for magic character closing. User process
259 * writes 'V' into the device, just before it is closed.
260 * This means that we know that the wdt timer can be
261 * stopped after user closes the device.
262 */
263 if (!nowayout) {
264 int i;
265
266 for (i = 0; i < len; i++) {
267 char c;
268
269 /* In case it was set long ago */
270 wdt->flags &= ~TS72XX_WDT_EXPECT_CLOSE_FLAG;
271
272 if (get_user(c, data + i)) {
273 mutex_unlock(&wdt->lock);
274 return -EFAULT;
275 }
276 if (c == 'V') {
277 wdt->flags |= TS72XX_WDT_EXPECT_CLOSE_FLAG;
278 break;
279 }
280 }
281 }
282
283 mutex_unlock(&wdt->lock);
284 return len;
285}
286
287static const struct watchdog_info winfo = {
288 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
289 WDIOF_MAGICCLOSE,
290 .firmware_version = 1,
291 .identity = "TS-72XX WDT",
292};
293
294static long ts72xx_wdt_ioctl(struct file *file, unsigned int cmd,
295 unsigned long arg)
296{
297 struct ts72xx_wdt *wdt = file->private_data;
298 void __user *argp = (void __user *)arg;
299 int __user *p = (int __user *)argp;
300 int error = 0;
301
302 if (mutex_lock_interruptible(&wdt->lock))
303 return -ERESTARTSYS;
304
305 switch (cmd) {
306 case WDIOC_GETSUPPORT:
307 error = copy_to_user(argp, &winfo, sizeof(winfo));
308 break;
309
310 case WDIOC_GETSTATUS:
311 case WDIOC_GETBOOTSTATUS:
312 return put_user(0, p);
313
314 case WDIOC_KEEPALIVE:
315 ts72xx_wdt_kick(wdt);
316 break;
317
318 case WDIOC_SETOPTIONS: {
319 int options;
320
321 if (get_user(options, p)) {
322 error = -EFAULT;
323 break;
324 }
325
326 error = -EINVAL;
327
328 if ((options & WDIOS_DISABLECARD) != 0) {
329 ts72xx_wdt_stop(wdt);
330 error = 0;
331 }
332 if ((options & WDIOS_ENABLECARD) != 0) {
333 ts72xx_wdt_start(wdt);
334 error = 0;
335 }
336
337 break;
338 }
339
340 case WDIOC_SETTIMEOUT: {
341 int new_timeout;
342
343 if (get_user(new_timeout, p)) {
344 error = -EFAULT;
345 } else {
346 int regval;
347
348 regval = timeout_to_regval(new_timeout);
349 if (regval < 0) {
350 error = -EINVAL;
351 } else {
352 ts72xx_wdt_stop(wdt);
353 wdt->regval = regval;
354 ts72xx_wdt_start(wdt);
355 }
356 }
357 if (error)
358 break;
359
360 /*FALLTHROUGH*/
361 }
362
363 case WDIOC_GETTIMEOUT:
364 if (put_user(regval_to_timeout(wdt->regval), p))
365 error = -EFAULT;
366 break;
367
368 default:
369 error = -ENOTTY;
370 break;
371 }
372
373 mutex_unlock(&wdt->lock);
374 return error;
375}
376
377static const struct file_operations ts72xx_wdt_fops = {
378 .owner = THIS_MODULE,
379 .llseek = no_llseek,
380 .open = ts72xx_wdt_open,
381 .release = ts72xx_wdt_release,
382 .write = ts72xx_wdt_write,
383 .unlocked_ioctl = ts72xx_wdt_ioctl,
384};
385
386static struct miscdevice ts72xx_wdt_miscdev = {
387 .minor = WATCHDOG_MINOR,
388 .name = "watchdog",
389 .fops = &ts72xx_wdt_fops,
390};
391
392static __devinit int ts72xx_wdt_probe(struct platform_device *pdev)
393{
394 struct ts72xx_wdt *wdt;
395 struct resource *r1, *r2;
396 int error = 0;
397
398 wdt = kzalloc(sizeof(struct ts72xx_wdt), GFP_KERNEL);
399 if (!wdt) {
400 dev_err(&pdev->dev, "failed to allocate memory\n");
401 return -ENOMEM;
402 }
403
404 r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
405 if (!r1) {
406 dev_err(&pdev->dev, "failed to get memory resource\n");
407 error = -ENODEV;
408 goto fail;
409 }
410
411 r1 = request_mem_region(r1->start, resource_size(r1), pdev->name);
412 if (!r1) {
413 dev_err(&pdev->dev, "cannot request memory region\n");
414 error = -EBUSY;
415 goto fail;
416 }
417
418 wdt->control_reg = ioremap(r1->start, resource_size(r1));
419 if (!wdt->control_reg) {
420 dev_err(&pdev->dev, "failed to map memory\n");
421 error = -ENODEV;
422 goto fail_free_control;
423 }
424
425 r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
426 if (!r2) {
427 dev_err(&pdev->dev, "failed to get memory resource\n");
428 error = -ENODEV;
429 goto fail_unmap_control;
430 }
431
432 r2 = request_mem_region(r2->start, resource_size(r2), pdev->name);
433 if (!r2) {
434 dev_err(&pdev->dev, "cannot request memory region\n");
435 error = -EBUSY;
436 goto fail_unmap_control;
437 }
438
439 wdt->feed_reg = ioremap(r2->start, resource_size(r2));
440 if (!wdt->feed_reg) {
441 dev_err(&pdev->dev, "failed to map memory\n");
442 error = -ENODEV;
443 goto fail_free_feed;
444 }
445
446 platform_set_drvdata(pdev, wdt);
447 ts72xx_wdt_pdev = pdev;
448 wdt->pdev = pdev;
449 mutex_init(&wdt->lock);
450
451 error = misc_register(&ts72xx_wdt_miscdev);
452 if (error) {
453 dev_err(&pdev->dev, "failed to register miscdev\n");
454 goto fail_unmap_feed;
455 }
456
457 dev_info(&pdev->dev, "TS-72xx Watchdog driver\n");
458
459 return 0;
460
461fail_unmap_feed:
462 platform_set_drvdata(pdev, NULL);
463 iounmap(wdt->feed_reg);
464fail_free_feed:
465 release_mem_region(r2->start, resource_size(r2));
466fail_unmap_control:
467 iounmap(wdt->control_reg);
468fail_free_control:
469 release_mem_region(r1->start, resource_size(r1));
470fail:
471 kfree(wdt);
472 return error;
473}
474
475static __devexit int ts72xx_wdt_remove(struct platform_device *pdev)
476{
477 struct ts72xx_wdt *wdt = platform_get_drvdata(pdev);
478 struct resource *res;
479 int error;
480
481 error = misc_deregister(&ts72xx_wdt_miscdev);
482 platform_set_drvdata(pdev, NULL);
483
484 iounmap(wdt->feed_reg);
485 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
486 release_mem_region(res->start, resource_size(res));
487
488 iounmap(wdt->control_reg);
489 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
490 release_mem_region(res->start, resource_size(res));
491
492 kfree(wdt);
493 return error;
494}
495
496static struct platform_driver ts72xx_wdt_driver = {
497 .probe = ts72xx_wdt_probe,
498 .remove = __devexit_p(ts72xx_wdt_remove),
499 .driver = {
500 .name = "ts72xx-wdt",
501 .owner = THIS_MODULE,
502 },
503};
504
505static __init int ts72xx_wdt_init(void)
506{
507 return platform_driver_register(&ts72xx_wdt_driver);
508}
509module_init(ts72xx_wdt_init);
510
511static __exit void ts72xx_wdt_exit(void)
512{
513 platform_driver_unregister(&ts72xx_wdt_driver);
514}
515module_exit(ts72xx_wdt_exit);
516
517MODULE_AUTHOR("Mika Westerberg <mika.westerberg@iki.fi>");
518MODULE_DESCRIPTION("TS-72xx SBC Watchdog");
519MODULE_LICENSE("GPL");
520MODULE_ALIAS("platform:ts72xx-wdt");
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
index d635566e9307..9e9ed7bfabcb 100644
--- a/drivers/watchdog/txx9wdt.c
+++ b/drivers/watchdog/txx9wdt.c
@@ -13,7 +13,6 @@
13#include <linux/miscdevice.h> 13#include <linux/miscdevice.h>
14#include <linux/watchdog.h> 14#include <linux/watchdog.h>
15#include <linux/fs.h> 15#include <linux/fs.h>
16#include <linux/reboot.h>
17#include <linux/init.h> 16#include <linux/init.h>
18#include <linux/uaccess.h> 17#include <linux/uaccess.h>
19#include <linux/platform_device.h> 18#include <linux/platform_device.h>
@@ -166,14 +165,6 @@ static long txx9wdt_ioctl(struct file *file, unsigned int cmd,
166 } 165 }
167} 166}
168 167
169static int txx9wdt_notify_sys(struct notifier_block *this, unsigned long code,
170 void *unused)
171{
172 if (code == SYS_DOWN || code == SYS_HALT)
173 txx9wdt_stop();
174 return NOTIFY_DONE;
175}
176
177static const struct file_operations txx9wdt_fops = { 168static const struct file_operations txx9wdt_fops = {
178 .owner = THIS_MODULE, 169 .owner = THIS_MODULE,
179 .llseek = no_llseek, 170 .llseek = no_llseek,
@@ -189,10 +180,6 @@ static struct miscdevice txx9wdt_miscdev = {
189 .fops = &txx9wdt_fops, 180 .fops = &txx9wdt_fops,
190}; 181};
191 182
192static struct notifier_block txx9wdt_notifier = {
193 .notifier_call = txx9wdt_notify_sys,
194};
195
196static int __init txx9wdt_probe(struct platform_device *dev) 183static int __init txx9wdt_probe(struct platform_device *dev)
197{ 184{
198 struct resource *res; 185 struct resource *res;
@@ -221,13 +208,8 @@ static int __init txx9wdt_probe(struct platform_device *dev)
221 if (!txx9wdt_reg) 208 if (!txx9wdt_reg)
222 goto exit_busy; 209 goto exit_busy;
223 210
224 ret = register_reboot_notifier(&txx9wdt_notifier);
225 if (ret)
226 goto exit;
227
228 ret = misc_register(&txx9wdt_miscdev); 211 ret = misc_register(&txx9wdt_miscdev);
229 if (ret) { 212 if (ret) {
230 unregister_reboot_notifier(&txx9wdt_notifier);
231 goto exit; 213 goto exit;
232 } 214 }
233 215
@@ -249,14 +231,19 @@ exit:
249static int __exit txx9wdt_remove(struct platform_device *dev) 231static int __exit txx9wdt_remove(struct platform_device *dev)
250{ 232{
251 misc_deregister(&txx9wdt_miscdev); 233 misc_deregister(&txx9wdt_miscdev);
252 unregister_reboot_notifier(&txx9wdt_notifier);
253 clk_disable(txx9_imclk); 234 clk_disable(txx9_imclk);
254 clk_put(txx9_imclk); 235 clk_put(txx9_imclk);
255 return 0; 236 return 0;
256} 237}
257 238
239static void txx9wdt_shutdown(struct platform_device *dev)
240{
241 txx9wdt_stop();
242}
243
258static struct platform_driver txx9wdt_driver = { 244static struct platform_driver txx9wdt_driver = {
259 .remove = __exit_p(txx9wdt_remove), 245 .remove = __exit_p(txx9wdt_remove),
246 .shutdown = txx9wdt_shutdown,
260 .driver = { 247 .driver = {
261 .name = "txx9wdt", 248 .name = "txx9wdt",
262 .owner = THIS_MODULE, 249 .owner = THIS_MODULE,
diff --git a/drivers/watchdog/w83627hf_wdt.c b/drivers/watchdog/w83627hf_wdt.c
index f201accc4e3d..0f5288df0091 100644
--- a/drivers/watchdog/w83627hf_wdt.c
+++ b/drivers/watchdog/w83627hf_wdt.c
@@ -201,7 +201,7 @@ static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
201 void __user *argp = (void __user *)arg; 201 void __user *argp = (void __user *)arg;
202 int __user *p = argp; 202 int __user *p = argp;
203 int new_timeout; 203 int new_timeout;
204 static struct watchdog_info ident = { 204 static const struct watchdog_info ident = {
205 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | 205 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
206 WDIOF_MAGICCLOSE, 206 WDIOF_MAGICCLOSE,
207 .firmware_version = 1, 207 .firmware_version = 1,
diff --git a/drivers/watchdog/w83977f_wdt.c b/drivers/watchdog/w83977f_wdt.c
index 0560182a1d09..6e6743d1066f 100644
--- a/drivers/watchdog/w83977f_wdt.c
+++ b/drivers/watchdog/w83977f_wdt.c
@@ -371,7 +371,7 @@ static ssize_t wdt_write(struct file *file, const char __user *buf,
371 * according to their available features. 371 * according to their available features.
372 */ 372 */
373 373
374static struct watchdog_info ident = { 374static const struct watchdog_info ident = {
375 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, 375 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
376 .firmware_version = 1, 376 .firmware_version = 1,
377 .identity = WATCHDOG_NAME, 377 .identity = WATCHDOG_NAME,
diff --git a/drivers/watchdog/wdrtas.c b/drivers/watchdog/wdrtas.c
index 5bfb1f2c5319..94ec22b9e66b 100644
--- a/drivers/watchdog/wdrtas.c
+++ b/drivers/watchdog/wdrtas.c
@@ -312,7 +312,7 @@ static long wdrtas_ioctl(struct file *file, unsigned int cmd,
312{ 312{
313 int __user *argp = (void __user *)arg; 313 int __user *argp = (void __user *)arg;
314 int i; 314 int i;
315 static struct watchdog_info wdinfo = { 315 static const struct watchdog_info wdinfo = {
316 .options = WDRTAS_SUPPORTED_MASK, 316 .options = WDRTAS_SUPPORTED_MASK,
317 .firmware_version = 0, 317 .firmware_version = 0,
318 .identity = "wdrtas", 318 .identity = "wdrtas",
diff --git a/drivers/watchdog/wdt.c b/drivers/watchdog/wdt.c
index 3bbefe9a2634..bfda2e99dd89 100644
--- a/drivers/watchdog/wdt.c
+++ b/drivers/watchdog/wdt.c
@@ -358,7 +358,7 @@ static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
358 int new_heartbeat; 358 int new_heartbeat;
359 int status; 359 int status;
360 360
361 static struct watchdog_info ident = { 361 struct watchdog_info ident = {
362 .options = WDIOF_SETTIMEOUT| 362 .options = WDIOF_SETTIMEOUT|
363 WDIOF_MAGICCLOSE| 363 WDIOF_MAGICCLOSE|
364 WDIOF_KEEPALIVEPING, 364 WDIOF_KEEPALIVEPING,
diff --git a/drivers/watchdog/wdt_pci.c b/drivers/watchdog/wdt_pci.c
index f368dd87083a..7b22e3cdbc81 100644
--- a/drivers/watchdog/wdt_pci.c
+++ b/drivers/watchdog/wdt_pci.c
@@ -412,7 +412,7 @@ static long wdtpci_ioctl(struct file *file, unsigned int cmd,
412 int new_heartbeat; 412 int new_heartbeat;
413 int status; 413 int status;
414 414
415 static struct watchdog_info ident = { 415 struct watchdog_info ident = {
416 .options = WDIOF_SETTIMEOUT| 416 .options = WDIOF_SETTIMEOUT|
417 WDIOF_MAGICCLOSE| 417 WDIOF_MAGICCLOSE|
418 WDIOF_KEEPALIVEPING, 418 WDIOF_KEEPALIVEPING,
diff --git a/drivers/watchdog/wm831x_wdt.c b/drivers/watchdog/wm831x_wdt.c
index 775bcd807f31..8c4b2d5bb7da 100644
--- a/drivers/watchdog/wm831x_wdt.c
+++ b/drivers/watchdog/wm831x_wdt.c
@@ -213,7 +213,7 @@ static ssize_t wm831x_wdt_write(struct file *file,
213 return count; 213 return count;
214} 214}
215 215
216static struct watchdog_info ident = { 216static const struct watchdog_info ident = {
217 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 217 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
218 .identity = "WM831x Watchdog", 218 .identity = "WM831x Watchdog",
219}; 219};
diff --git a/drivers/watchdog/wm8350_wdt.c b/drivers/watchdog/wm8350_wdt.c
index a2d2e8eb2282..89dd7b035295 100644
--- a/drivers/watchdog/wm8350_wdt.c
+++ b/drivers/watchdog/wm8350_wdt.c
@@ -177,7 +177,7 @@ static ssize_t wm8350_wdt_write(struct file *file,
177 return count; 177 return count;
178} 178}
179 179
180static struct watchdog_info ident = { 180static const struct watchdog_info ident = {
181 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 181 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
182 .identity = "WM8350 Watchdog", 182 .identity = "WM8350 Watchdog",
183}; 183};
diff --git a/drivers/xen/sys-hypervisor.c b/drivers/xen/sys-hypervisor.c
index ae5cb05a1a1c..bb71ab2336c8 100644
--- a/drivers/xen/sys-hypervisor.c
+++ b/drivers/xen/sys-hypervisor.c
@@ -426,7 +426,7 @@ static ssize_t hyp_sysfs_store(struct kobject *kobj,
426 return 0; 426 return 0;
427} 427}
428 428
429static struct sysfs_ops hyp_sysfs_ops = { 429static const struct sysfs_ops hyp_sysfs_ops = {
430 .show = hyp_sysfs_show, 430 .show = hyp_sysfs_show,
431 .store = hyp_sysfs_store, 431 .store = hyp_sysfs_store,
432}; 432};
diff --git a/drivers/zorro/zorro.ids b/drivers/zorro/zorro.ids
index 0c0f99e2dd62..de24e3decedd 100644
--- a/drivers/zorro/zorro.ids
+++ b/drivers/zorro/zorro.ids
@@ -108,7 +108,7 @@
108 0c00 500XP/SupraDrive WordSync [SCSI Host Adapter] 108 0c00 500XP/SupraDrive WordSync [SCSI Host Adapter]
109 0d00 SupraDrive WordSync II [SCSI Host Adapter] 109 0d00 SupraDrive WordSync II [SCSI Host Adapter]
110 1000 2400zi+ [Modem] 110 1000 2400zi+ [Modem]
1110422 Computer Systems Assosiates 1110422 Computer Systems Associates
112 1100 Magnum 40 [Accelerator and SCSI Host Adapter] 112 1100 Magnum 40 [Accelerator and SCSI Host Adapter]
113 1500 12 Gauge [SCSI Host Adapter] 113 1500 12 Gauge [SCSI Host Adapter]
1140439 Marc Michael Groth 1140439 Marc Michael Groth
diff --git a/firmware/bnx2x-e1-5.2.7.0.fw.ihex b/firmware/bnx2x-e1-5.2.7.0.fw.ihex
deleted file mode 100644
index a99c41c993b9..000000000000
--- a/firmware/bnx2x-e1-5.2.7.0.fw.ihex
+++ /dev/null
@@ -1,10178 +0,0 @@
1:10000000000028B0000000600000068800002918E9
2:100010000000161400002FA800000098000045C042
3:10002000000073C400004660000000CC0000BA2845
4:10003000000099A00000BAF800000094000154A04C
5:10004000000057BC00015538000000B80001ACF8B2
6:100050000000CE2C0001ADB80000000400027BE8D7
7:10006000020400480000000F020400540000004594
8:1000700002040058000000840204005C0000000636
9:100080000204007000000004020400780000000078
10:100090000204007C121700000204008022170000F6
11:1000A00002040084321700000604008800000005E6
12:1000B0000204009C12150000020400A0221500009A
13:1000C000020400A432150000060400A80000000489
14:1000D000020400B802100000020400BC001000007E
15:1000E000020400C010100000020400C42010000030
16:1000F000020400C830100000060400CC0000000418
17:10010000020400DC00100000020400E012140000F1
18:10011000020400E422140000020400E8321400008B
19:10012000060400EC000000040104012400000000AB
20:1001300001040128000000000104012C000000005F
21:10014000010401300000000002040004000000FF70
22:1001500002040008000000FF0204000C000000FF81
23:1001600002040010000000FF02040014000000FF61
24:1001700002040018000000FF0204001C000000FF41
25:1001800002040020000000FF020400240000003EE2
26:1001900002040028000000000204002C0000003FC0
27:1001A000020400300000003F020400340000003F61
28:1001B00002040038000000000204003C0000003F80
29:1001C000020400400000003F020400440000003F21
30:1001D00002042008000004110204200C00000400A6
31:1001E000020420100000040402042014000004197A
32:1001F0000204201C0000FFFF020420200000FFFF7B
33:10020000020420240000FFFF020420280000FFFF5A
34:1002100006042038000000020204204000000034E0
35:100220000204204400000035060420480000007C41
36:100230000204223807FFFFFF0204223C0000003FB7
37:100240000204224007FFFFFF020422440000000FC7
38:1002500001042248000000000104224C00000000BC
39:10026000010422500000000001042254000000009C
40:1002700001042258000000000104225C000000007C
41:10028000010422600000000001042264000000005C
42:1002900001042268000000000104226C000000003C
43:1002A000010422700000000001042274000000001C
44:1002B00001042278000000000104227C00000000FC
45:1002C000020424BC000000010C042000000003E82C
46:1002D0000A042000000000010B0420000000000AB6
47:1002E0000205004400000020020500480000003222
48:1002F000020500900215002002050094021500205E
49:1003000002050098000000300205009C0810000063
50:10031000020500A000000033020500A40000003028
51:10032000020500A800000031020500AC0000000238
52:10033000020500B000000005020500B40000000640
53:10034000020500B800000002020500BC0000000227
54:10035000020500C000000000020500C40000000506
55:10036000020500C800000002020500CC00000002E7
56:10037000020500D000000002020500D400000001C8
57:1003800002050114000000010205011C000000012B
58:100390000205012000000002020502040000000125
59:1003A0000205020C0000004002050210000000409F
60:1003B0000205021C000000200205022000000013BC
61:1003C0000205022400000020060502400000000A89
62:1003D0000405028000200000020500500000000714
63:1003E0000205005400000007020500580000000844
64:1003F0000205005C00000008060500600000000423
65:10040000020500D800000006020500E00000000D13
66:10041000020500E40000002D020500E800000007CE
67:10042000020500EC00000027020500F000000007B4
68:10043000020500F400000027020500F80000000794
69:10044000020500FC00000027020500040000000176
70:1004500002050008000000010205000C0000000178
71:100460000205001000000001020500140000000158
72:1004700002050018000000010205001C0000000138
73:100480000205002000000001020500240000000118
74:1004900002050028000000010205002C00000001F8
75:1004A00002050030000000010205003400000001D8
76:1004B00002050038000000010205003C00000001B8
77:1004C00002050040000000010406100002000020A8
78:1004D000020600DC00000001010600D80000000058
79:1004E0000406020000030220020600DC00000000F7
80:1004F00002060068000000B802060078000001143F
81:10050000010600B800000000010600C8000000005D
82:100510000206006C000000B80206007C0000011416
83:10052000010600BC00000000010600CC0000000035
84:100530000718040000960000081807600014022342
85:10054000071C000034C50000071C800034DB0D329E
86:10055000071D00000A1D1A69081D14405D78022558
87:100560000118000000000000011800040000000055
88:1005700001180008000000000118000C0000000035
89:100580000118001000000000011800140000000015
90:1005900002180020000000010218002400000002E0
91:1005A00002180028000000030218002C00000000C0
92:1005B000021800300000000402180034000000019E
93:1005C00002180038000000000218003C0000000182
94:1005D000021800400000000402180044000000005F
95:1005E00002180048000000010218004C000000033F
96:1005F0000218005000000000021800540000000122
97:1006000002180058000000040218005C00000000FE
98:1006100002180060000000010218006400000003DE
99:1006200002180068000000000218006C00000001C1
100:10063000021800700000000402180074000000009E
101:1006400002180078000000040218007C000000037B
102:100650000618008000000002021800A400003FFFFE
103:10066000021800A8000003FF021802240000000086
104:1006700002180234000000000218024C00000000C2
105:10068000021802E4000000FF061810000000040039
106:10069000021B8BC000000001021B80000000003420
107:1006A000021B804000000018021B80800000000C2C
108:1006B000021B80C0000000200C1B83000007A1204B
109:1006C0000A1B8300000001380B1B83000000138805
110:1006D000021B83C0000001F4061A2000000000B2D3
111:1006E000061A23C800000181041A29CC0001022740
112:1006F000061A1020000000C8061A100000000002B0
113:10070000061A1E3800000002061A1E300000000201
114:10071000061A080000000002061A0808000000027D
115:10072000061A081000000004041A1FB00005022871
116:10073000041A4CB00008022D061A22C8000000203E
117:10074000061A400000000124021A4920000000009F
118:10075000061A14000000000A061A145000000006D1
119:10076000061A150000000002041A150800050235DB
120:10077000061A151C00000009061A15800000001456
121:10078000061A09C000000048061A0800000000020E
122:10079000061A08200000000E041A1FB00002023AD8
123:1007A000061A2C2800000002061A23480000002028
124:1007B000061A449000000124021A49240000000097
125:1007C000061A14280000000A061A14680000000621
126:1007D000061A154000000002041A15480005023CE4
127:1007E000061A155C00000009061A15D00000001456
128:1007F000061A0AE000000048061A08080000000275
129:10080000061A08580000000E041A1FB80002024120
130:10081000061A2C30000000020200A2800000000135
131:100820000200A294071D29110200A29800000000F6
132:100830000200A29C009C04240200A2A00000000070
133:100840000200A2A4000002090200A4FCFF000000B4
134:10085000020100B400000001020100B80000000124
135:10086000020100DC000000010201010000000001A3
136:1008700002010104000000010201007C00300000C0
137:1008800002010084000000280201008C000000002A
138:1008900002010130000000040201025C00000001BE
139:1008A000020103280000000002010554000000308E
140:1008B000020100C400000001020100CC00000001A0
141:1008C000020100F800000001020100F00000000138
142:1008D00002010080003000000201008800000028B2
143:1008E0000201009000000000020101340000000439
144:1008F000020102DC000000010201032C00000000E4
145:100900000201056400000030020100C8000000017F
146:10091000020100D000000001020100FC0000000103
147:10092000020100F400000001020C10000000002091
148:10093000020C200800000A11020C200C00000A0022
149:10094000020C201000000A04020C201C0000FFFF13
150:10095000020C20200000FFFF020C20240000FFFFFB
151:10096000020C20280000FFFF060C203800000002C7
152:10097000020C204000000034020C2044000000352E
153:10098000020C204800000020020C204C0000002136
154:10099000020C205000000022020C20540000002312
155:1009A000020C205800000024020C205C00000025EE
156:1009B000020C206000000026020C206400000027CA
157:1009C000020C206800000028020C206C00000029A6
158:1009D000020C20700000002A020C20740000002B82
159:1009E000060C207800000056020C21D00000000107
160:1009F000020C21D400000001020C21D800000001EB
161:100A0000020C21DC00000001020C21E000000001CA
162:100A1000020C21E400000001020C21E800000001AA
163:100A2000020C21EC00000001020C21F0000000018A
164:100A3000020C21F400000001060C21F80000001057
165:100A4000020C223807FFFFFF020C223C0000003F8F
166:100A5000020C224007FFFFFF020C22440000000F9F
167:100A6000010C224800000000010C224C0000000094
168:100A7000010C225000000000010C22540000000074
169:100A8000010C225800000000010C225C0000000054
170:100A9000010C226000000000010C22640000000034
171:100AA000010C226800000000010C226C0000000014
172:100AB000010C227000000000010C227400000000F4
173:100AC000010C227800000000010C227C00000000D4
174:100AD000020C24BC000000010C0C2000000003E804
175:100AE0000A0C2000000000010B0C20000000000A8E
176:100AF000020C400800000365020C400C0000035487
177:100B0000020C401000000358020C40140000037552
178:100B1000020C401C0000FFFF020C40200000FFFF01
179:100B2000020C40240000FFFF020C40280000FFFFE1
180:100B3000020C403800000046020C403C000000055A
181:100B4000060C40400000005E020C41B800000001AD
182:100B5000060C41BC0000001F020C423807FFFFFFDB
183:100B6000020C423C0000003F020C424007FFFFFF26
184:100B7000020C42440000000F010C4248000000003B
185:100B8000010C424C00000000010C4250000000002B
186:100B9000010C425400000000010C4258000000000B
187:100BA000010C425C00000000010C426000000000EB
188:100BB000010C426400000000010C426800000000CB
189:100BC000010C426C00000000010C427000000000AB
190:100BD000010C427400000000010C4278000000008B
191:100BE000010C427C00000000010C4280000000006B
192:100BF000020C44C0000000010C0C4000000003E89F
193:100C00000A0C4000000000010B0C40000000000A2C
194:100C1000020D004400000032020D008C021500207D
195:100C2000020D009002150020020D00940810000033
196:100C3000020D009800000033020D009C000000022D
197:100C4000020D00A000000000020D00A4000000053D
198:100C5000020D00A800000005060D00AC0000000217
199:100C6000020D00B400000002020D00B800000003F5
200:100C7000020D00BC00000002020D00C000000001D7
201:100C8000020D00C800000002020D00CC00000002AE
202:100C9000020D010800000001020D015C00000001CE
203:100CA000020D016400000001020D01680000000255
204:100CB000020D020400000001020D020C00000020E1
205:100CC000020D021000000040020D0214000000405E
206:100CD000020D022000000003020D02240000001893
207:100CE000060D028000000012040D030000240243E0
208:100CF000020D004C00000001020D00500000000237
209:100D0000020D005400000008020D00580000000809
210:100D1000060D005C00000004020D00C40000000489
211:100D2000020D011400000009020D01180000002945
212:100D3000020D011C0000000A020D01200000002A23
213:100D4000020D012400000007020D01280000002709
214:100D5000020D012C00000007020D013000000027E9
215:100D6000020D01340000000C020D01380000002CBF
216:100D7000020D013C0000000C020D01400000002C9F
217:100D8000020D01440000000C020D01480000002C7F
218:100D9000020D000400000001020D00080000000127
219:100DA000020D000C00000001020D00100000000107
220:100DB000020D001400000001020D001800000001E7
221:100DC000020D001C00000001020D002000000001C7
222:100DD000020D002400000001020D002800000001A7
223:100DE000020D002C00000001020D00300000000187
224:100DF000020D003400000001020D00380000000167
225:100E0000020D003C00000001020E004C0000003208
226:100E1000020E009402150020020E00980215002018
227:100E2000020E009C00000030020E00A0081000001E
228:100E3000020E00A400000033020E00A800000030E3
229:100E4000020E00AC00000031020E00B000000002F3
230:100E5000020E00B400000004020E00B80000000002
231:100E6000020E00BC00000002020E00C000000002E2
232:100E7000020E00C400000000020E00C800000002C4
233:100E8000020E00CC00000007020E00D0000000029D
234:100E9000020E00D400000002020E00D80000000183
235:100EA000020E00E400000001020E014400000001F7
236:100EB000020E014C00000001020E01500000000271
237:100EC000020E020400000001020E020C00000040AD
238:100ED000020E021000000040020E021C000000047E
239:100EE000020E022000000020020E02240000000E6C
240:100EF000020E02280000001B060E03000000001274
241:100F0000040E0280001B0267020E00540000000C59
242:100F1000020E005800000009020E005C0000000FE5
243:100F2000020E006000000010060E006400000004C5
244:100F3000020E00DC00000003020E01100000000F92
245:100F4000020E01140000002F020E01180000000E16
246:100F5000020E011C0000002E020E00040000000121
247:100F6000020E000800000001020E000C000000014B
248:100F7000020E001000000001020E0014000000012B
249:100F8000020E001800000001020E001C000000010B
250:100F9000020E002000000001020E002400000001EB
251:100FA000020E002800000001020E002C00000001CB
252:100FB000020E003000000001020E003400000001AB
253:100FC000020E003800000001020E003C000000018B
254:100FD000020E004000000001020E0044000000016B
255:100FE0000730040000CA00000830076800130282BE
256:100FF00007340000336100000734800037270CD924
257:10100000073500002F111AA30835708051F00284B3
258:10101000013000000000000001300004000000006A
259:1010200001300008000000000130000C000000004A
260:10103000013000100000000001300014000000002A
261:1010400002300020000000010230002400000002F5
262:1010500002300028000000030230002C00000000D5
263:1010600002300030000000040230003400000001B3
264:1010700002300038000000000230003C0000000197
265:101080000230004000000004023000440000000074
266:1010900002300048000000010230004C0000000354
267:1010A0000230005000000000023000540000000137
268:1010B00002300058000000040230005C0000000014
269:1010C00002300060000000010230006400000003F4
270:1010D00002300068000000000230006C00000001D7
271:1010E00002300070000000040230007400000000B4
272:1010F00002300078000000040230007C0000000391
273:101100000630008000000002023000A400003FFF13
274:10111000023000A8000003FF02300224000000009B
275:1011200002300234000000000230024C00000000D7
276:10113000023002E40000FFFF06302000000008003B
277:1011400002338BC000000001023380000000001A4F
278:10115000023380400000004E023380800000001007
279:10116000023380C0000000200C3383000007A12060
280:101170000A338300000001380B338300000013881A
281:10118000023383C0000001F40C3383801DCD650061
282:101190000A3383800004C4B40B338380004C4B407B
283:1011A00006321AA0000000C206321020000000C85B
284:1011B0000632100000000002063214000000004059
285:1011C00006325098000000040632508000000005EE
286:1011D00004325094000102860632500000000020C4
287:1011E00004322830000202870233080001000000A8
288:1011F00004330C00001002890233080000000000D4
289:1012000004330C400010029906321500000000B4AF
290:1012100002321DC80000000006324000000000D865
291:10122000063217D0000000B402321DCC00000000CE
292:1012300006324360000000D807200400009200003E
293:1012400008200780001002A9072400002CD100000C
294:10125000072480002AE50B350824DC6062DA02AB43
295:101260000120000000000000012000040000000038
296:1012700001200008000000000120000C0000000018
297:1012800001200010000000000120001400000000F8
298:1012900002200020000000010220002400000002C3
299:1012A00002200028000000030220002C00000000A3
300:1012B0000220003000000004022000340000000181
301:1012C00002200038000000000220003C0000000165
302:1012D0000220004000000004022000440000000042
303:1012E00002200048000000010220004C0000000322
304:1012F0000220005000000000022000540000000105
305:1013000002200058000000040220005C00000000E1
306:1013100002200060000000010220006400000003C1
307:1013200002200068000000000220006C00000001A4
308:101330000220007000000004022000740000000081
309:1013400002200078000000040220007C000000035E
310:101350000620008000000002022000A400003FFFE1
311:10136000022000A8000003FF022002240000000069
312:1013700002200234000000000220024C00000000A5
313:10138000022002E40000FFFF062020000000080009
314:1013900002238BC000000001022380000000001027
315:1013A00002238040000000120223808000000030F1
316:1013B000022380C00000000E022383C0000001F45D
317:1013C000062250000000004206221020000000C843
318:1013D000062210000000000206222000000000C0CB
319:1013E000062225C00000024004222EC8000802ADDB
320:1013F00002230800013FFFFF04230C00001002B588
321:10140000022308000000000004230C40001002C565
322:1014100006223040000000A00622354000000010E7
323:10142000062236C000000030062240000000020004
324:10143000062235C00000002006223840000000309F
325:1014400006223000000000080222511800000000AF
326:10145000062223000000000E0622241000000030A7
327:10146000062232C0000000A00622358000000010D5
328:1014700006223780000000300622480000000200EB
329:10148000062236400000002006223900000000300D
330:1014900006223020000000080222511C000000003B
331:1014A000062223380000000E062224D0000000305F
332:1014B00002161000000000280217000800000002B9
333:1014C0000217002C000000030217003C000000047B
334:1014D0000217004400000008021700480000000244
335:1014E0000217004C0000009002170050000000900E
336:1014F00002170054008000900217005808140000E2
337:10150000021700600000008A0217006400000080DB
338:1015100002170068000000810217006C00000080C4
339:10152000021700700000000602170078000007D0C4
340:101530000217007C0000076C02170038007C1004C2
341:10154000021700040000000F0616402400000002ED
342:10155000021640700000001C021642080000000144
343:101560000216421000000001021642200000000195
344:10157000021642280000000102164230000000015D
345:10158000021642380000000102164260000000010D
346:101590000C16401C0003D0900A16401C0000009C52
347:1015A0000B16401C000009C4021640300000000861
348:1015B000021640340000000C0216403800000010F3
349:1015C0000216404400000020021640000000000106
350:1015D000021640D800000001021640080000000179
351:1015E0000216400C0000000102164010000000012D
352:1015F00002164240000000000216424800000000AF
353:101600000616427000000002021642500000000060
354:101610000216425800000000061642800000000238
355:1016200002166008000006140216600C0000060096
356:1016300002166010000006040216601C0000FFFF86
357:10164000021660200000FFFF021660240000FFFF6A
358:10165000021660280000FFFF02166038000000201C
359:101660000216603C000000200216604000000034BA
360:101670000216604400000035021660480000002396
361:101680000216604C00000024021660500000002585
362:101690000216605400000026021660580000002761
363:1016A0000216605C00000029021660600000002A3B
364:1016B000021660640000002B021660680000002C17
365:1016C0000216606C0000002D0616607000000052CB
366:1016D000021661B800000001061661BC0000001F80
367:1016E0000216623807FFFFFF0216623C0000003F4F
368:1016F0000216624007FFFFFF021662440000000F5F
369:1017000001166248000000000116624C0000000053
370:101710000116625000000000011662540000000033
371:1017200001166258000000000116625C0000000013
372:1017300001166260000000000116626400000000F3
373:1017400001166268000000000116626C00000000D3
374:1017500001166270000000000116627400000000B3
375:1017600001166278000000000116627C0000000093
376:10177000021664BC000000010C166000000003E8C3
377:101780000A166000000000010B1660000000000A4D
378:10179000021680400000000602168044000000058A
379:1017A000021680480000000A0216804C0000000566
380:1017B0000216805400000002021680CC00000004D3
381:1017C000021680D000000004021680D4000000043D
382:1017D000021680D800000004021680DC000000041D
383:1017E000021680E000000004021680E400000004FD
384:1017F000021680E8000000040216880400000004BD
385:10180000021680300000007C021680340000003D8B
386:10181000021680380000003F0216803C0000009C49
387:10182000021680F000000007061680F40000000594
388:101830000216880C01010101021681080000000057
389:101840000216810C00000004021681100000000442
390:1018500002168114000000020216881008012004FC
391:1018600002168118000000050216811C0000000508
392:1018700002168120000000050216812400000005E8
393:101880000216882C2008100102168128000000088A
394:101890000216812C000000060216813000000007AD
395:1018A0000216813400000000021688300101012078
396:1018B0000616813800000004021688340101010177
397:1018C0000616814800000004021688380101010153
398:1018D00006168158000000040216883C010101012F
399:1018E00006168168000000030216817400000001E2
400:1018F00002168840010101010216817800000001F2
401:101900000216817C000000010216818000000001A7
402:1019100002168184000000010216884401010101C1
403:1019200002168188000000010216818C000000046C
404:10193000021681900000000402168194000000024B
405:10194000021688480801200402168198000000054C
406:101950000216819C00000005021681A0000000050F
407:10196000021681A400000005021688142008100148
408:10197000021681A800000008021681AC00000006D3
409:10198000021681B000000007021681B400000001B9
410:101990000216881801010120021681B8000000011A
411:1019A000021681BC00000001021681C00000000187
412:1019B000021681C4000000010216881C0101010109
413:1019C000021681C800000001021681CC000000014F
414:1019D000021681D000000001021681D4000000012F
415:1019E0000216882001010101021681D800000001C1
416:1019F000021681DC00000001021681E000000001F7
417:101A0000021681E400000001021688240101010190
418:101A1000021681E800000001021681EC00000001BE
419:101A2000021681F000000001021688280101010160
420:101A300002168240FFFF003F0616824400000002AB
421:101A40000216824CFFFF003F021682500000010088
422:101A5000021682540000010006168258000000029F
423:101A600002168260000000C002168264000000C0FE
424:101A70000216826800001E000216826C00001E0022
425:101A800002168270000040000216827400004000BE
426:101A900002168278000080000216827C000080001E
427:101AA00002168280000020000216828400002000BE
428:101AB0000616828800000007021682A400000001BA
429:101AC000061682A80000000A021681F400000C0825
430:101AD000021681F800000040021681FC000001009F
431:101AE0000216820000000020021682040000001787
432:101AF00002168208000000800216820C000002001C
433:101B0000021682100000000002168218FFFF01FF7B
434:101B100002168214FFFF01FF0216823C0000001330
435:101B2000021680900000013F021680600000014014
436:101B30000216806400000140061680680000000262
437:101B400002168070000000C00616807400000007B6
438:101B50000216809C00000048021680A00000004889
439:101B6000061680A400000002021680AC00000048A7
440:101B7000061680B0000000070216823800008000C0
441:101B800002168234000025E40216809400007FFFD4
442:101B900002168220000000070216821C00000007C7
443:101BA000021682280000000002168224FFFFFFFFB9
444:101BB00002168230000000000216822CFFFFFFFF99
445:101BC000021680EC000000FF02140000000000017B
446:101BD0000214000C0000000102140040000000018B
447:101BE0000214004400007FFF0214000C00000000FB
448:101BF00002140000000000000214006C000000004D
449:101C00000214000400000001021400300000000172
450:101C100002140004000000000214005C0000000038
451:101C2000021400080000000102140034000000014A
452:101C30000214000800000000021400600000000010
453:101C40000202005800000032020200A0031500202A
454:101C5000020200A403150020020200A801000030C7
455:101C6000020200AC08100000020200B000000033C5
456:101C7000020200B400000030020200B8000000318F
457:101C8000020200BC00000003020200C000000006C7
458:101C9000020200C400000003020200C800000003AA
459:101CA000020200CC00000002020200D0000000008E
460:101CB000020200D400000002020200DC000000006A
461:101CC000020200E000000006020200E4000000043E
462:101CD000020200E800000002020200EC0000000224
463:101CE000020200F000000001020200FC00000006F9
464:101CF0000202012000000000020201340000000284
465:101D0000020201B0000000010202020C000000010A
466:101D10000202021400000001020202180000000288
467:101D200002020404000000010202040C0000004052
468:101D300002020410000000400202041C0000000423
469:101D4000020204200000002002020424000000021D
470:101D5000020204280000001F060205000000001215
471:101D600004020480001F02D5020200600000000F80
472:101D70000202006400000007020200680000000B7D
473:101D80000202006C0000000E060200700000000459
474:101D9000020200F40000000402020004000000013E
475:101DA00002020008000000010202000C0000000115
476:101DB00002020010000000010202001400000001F5
477:101DC00002020018000000010202001C00000001D5
478:101DD00002020020000000010202002400000001B5
479:101DE00002020028000000010202002C0000000195
480:101DF0000202003000000001020200340000000175
481:101E000002020038000000010202003C0000000154
482:101E10000202004000000001020200440000000134
483:101E200002020048000000010202004C0000000114
484:101E3000020200500000000102020108000000C878
485:101E40000202011800000002020201C400000000AA
486:101E5000020201CC00000000020201D400000002D6
487:101E6000020201DC00000002020201E4000000FFA7
488:101E7000020201EC000000FF0202010C000000C899
489:101E80000202011C00000002020201C80000000062
490:101E9000020201D000000000020201D8000000028E
491:101EA000020201E000000002020201E8000000FF5F
492:101EB000020201F0000000FF0728040000B5000046
493:101EC00008280768001302F4072C000035D300002F
494:101ED000072C80003A3E0D75072D00003B541C0571
495:101EE000072D800022BC2ADB082DC770471202F69E
496:101EF000012800000000000001280004000000008C
497:101F000001280008000000000128000C000000006B
498:101F1000012800100000000001280014000000004B
499:101F20000228002000000001022800240000000216
500:101F300002280028000000030228002C00000000F6
501:101F400002280030000000040228003400000001D4
502:101F500002280038000000000228003C00000001B8
503:101F60000228004000000004022800440000000095
504:101F700002280048000000010228004C0000000375
505:101F80000228005000000000022800540000000158
506:101F900002280058000000040228005C0000000035
507:101FA0000228006000000001022800640000000315
508:101FB00002280068000000000228006C00000001F8
509:101FC00002280070000000040228007400000000D5
510:101FD00002280078000000040228007C00000003B2
511:101FE0000628008000000002022800A400003FFF35
512:101FF000022800A8000003FF0228022400000000BD
513:1020000002280234000000000228024C00000000F8
514:10201000022802E40000FFFF06282000000008005C
515:10202000022B8BC000000001022B8000000000008A
516:10203000022B804000000018022B80800000000C62
517:10204000022B80C0000000660C2B83000007A1203B
518:102050000A2B8300000001380B2B8300000013883B
519:10206000022B83C0000001F40C2B8340000001F41C
520:102070000A2B8340000000000B2B8340000000056A
521:102080000A2B83800004C4B40C2B83801DCD650013
522:102090000B2B8380004C4B40062A3C400000000480
523:1020A000042A3C50000202F8062A300000000048D2
524:1020B000062A1020000000C8062A100000000002B6
525:1020C000062A31280000008E022A33680000000032
526:1020D000042A3370000202FA042A3A70000402FC57
527:1020E000042A3D0000020300042A15000002030236
528:1020F000062A150800000100022A197000000000DD
529:10210000022A197800000000042A19600002030462
530:10211000062A4AC000000002062A4B000000000404
531:10212000042A1F4800020306022B080000000000DA
532:10213000042B0C0000100308022B08000100000013
533:10214000042B0C4000080318022B080002000000BA
534:10215000042B0C6000080320062A3A8000000014BB
535:10216000062A3B2000000024062A14000000000A72
536:10217000062A145000000006062A3378000000D812
537:10218000022A3A3800000000042A3C5800020328C2
538:10219000042A3C680010032A062A5020000000028E
539:1021A000062A503000000002062A500000000002FB
540:1021B000062A501000000002022A504000000000D1
541:1021C000062A50480000000E022A50B80000000104
542:1021D000042A4AC80002033A062A4B1000000042B3
543:1021E000062A4D2000000004062A3AD00000001400
544:1021F000062A3BB000000024062A14280000000A2A
545:10220000062A146800000006062A36D8000000D806
546:10221000022A3A3C00000000042A3C600002033C11
547:10222000042A3CA80010033E062A502800000002A1
548:10223000062A503800000002062A5008000000025A
549:10224000062A501800000002022A50440000000034
550:10225000062A50800000000E022A50BC0000000137
551:10226000042A4AD00002034E062A4C1800000042FD
552:10227000062A4D3000000004021010080000000182
553:102280000210101000000264021010000003D000C1
554:10229000021010040000003D091018000200035055
555:1022A00009101100002005500610118000000002E6
556:1022B0000910118800060570061011A00000001812
557:1022C000021010100000000006102400000000E0C2
558:1022D0000210201C0000000002102020000000015D
559:1022E000021020C0000000010210200400000001C4
560:1022F000021020080000000109103C0000050576CE
561:1023000009103C200005057B0910380000050580F8
562:1023100002104028000000100210404400003FFF5F
563:102320000210405800280000021040840084924AA5
564:1023300002104058000000000610806800000004F1
565:1023400002108000000010800610802800000002AB
566:102350000210803800000010021080400000FFFFD3
567:10236000021080440000FFFF0210805000000000B7
568:102370000210810000000000061081200000000211
569:1023800002108008000002B502108010000000005A
570:10239000061082000000004A021081080001FFFFC1
571:1023A00006108140000000020210800000001A8028
572:1023B0000610900000000024061091200000004A42
573:1023C000061093700000004A061095C00000004AF5
574:1023D000021080040000108006108030000000020F
575:1023E0000210803C00000010021080480000FFFF37
576:1023F0000210804C0000FFFF02108054000000001B
577:102400000210810400000000061081280000000274
578:102410000210800C000002B50210801400000000C1
579:10242000061084000000004A0210810C0001FFFF2A
580:1024300006108148000000020210800400001A808B
581:102440000610909000000024061092480000004AF8
582:10245000061094980000004A061096E80000004A12
583:102460000212049000E383400212051400003C10A5
584:10247000021205200000000202120494FFFFFFFF79
585:1024800002120498FFFFFFFF0212049CFFFFFFFFF0
586:10249000021204A0FFFFFFFF021204A4FFFFFFFFD0
587:1024A000021204A8FFFFFFFF021204ACFFFFFFFFB0
588:1024B000021204B0FFFFFFFF021204B8FFFFFFFF8C
589:1024C000021204BCFFFFFFFF021204C0FFFFFFFF68
590:1024D000021204C4FFFFFFFF021204C8FFFFFFFF48
591:1024E000021204CCFFFFFFFF021204D0FFFFFFFF28
592:1024F000021204DCFFFFFFFF021204E0FFFFFFFFF8
593:10250000021204E4FFFFFFFF021204E8FFFFFFFFD7
594:10251000021204ECFFFFFFFF021204F0FFFFFFFFB7
595:10252000021204F4FFFFFFFF021204F8FFFFFFFF97
596:10253000021204FCFFFFFFFF02120500FFFFFFFF76
597:1025400002120504FFFFFFFF02120508FFFFFFFF55
598:102550000212050CFFFFFFFF02120510FFFFFFFF35
599:10256000021204D4FFFF3330021204D8FFFF3340BD
600:10257000021204B4F00030000212039000000008C0
601:102580000212039C00000008061203A000000002D3
602:10259000021203BC00000004021203C40000000485
603:1025A000021203D000000000021203DC0000000051
604:1025B0000212036C00000001021203680000003FD9
605:1025C000021201BC00000040021201C00000180805
606:1025D000021201C400000803021201C8000008032F
607:1025E000021201CC00000040021201D000000003E2
608:1025F000021201D400000803021201D800000803EF
609:10260000021201DC00000803021201E000010003D5
610:10261000021201E400000803021201E800000803AE
611:10262000021201EC00000003021201F0000000039E
612:10263000021201F400000003021201F8000000037E
613:10264000021201FC0000000302120200000000035D
614:10265000021202040000000302120208000000033C
615:102660000212020C0000000302120210000000031C
616:1026700002120214000000030212021800000003FC
617:102680000212021C000000030212022000000003DC
618:102690000212022400000003021202280000240398
619:1026A0000212022C0000002F02120230000000096A
620:1026B00002120234000000190212023800000184E4
621:1026C0000212023C000001830212024000000306D5
622:1026D0000212024400000019021202480000000623
623:1026E0000212024C00000306021202500000030610
624:1026F00002120254000003060212025800000C8667
625:102700000212025C000003060212026000000306CF
626:1027100002120264000000060212026800000006B5
627:102720000212026C00000006021202700000000695
628:102730000212027400000006021202780000000675
629:102740000212027C00000006021202800000000655
630:102750000212028400000006021202880000000635
631:102760000212028C00000006021202900000000615
632:1027700002120294000000060212029800000006F5
633:102780000212029C00000006021202A000000306D2
634:10279000021202A400000013021202A800000006A8
635:1027A000021202B000001004021202B40000100471
636:1027B0000212032400106440021203280010644037
637:1027C000021201B0000000010600A0000000001687
638:1027D0000200A06CBF5C00000200A070FFF51FEFBC
639:1027E0000200A0740000FFFF0200A078500003E088
640:1027F0000200A07C000000000200A0800000A000F9
641:102800000600A084000000050200A0980FE0000070
642:102810000600A09C000000140200A0EC555400002B
643:102820000200A0F0555555550200A0F40000555582
644:102830000200A0F8000000000200A0FC55540000B7
645:102840000200A100555555550200A1040000555540
646:102850000200A108000000000200A22C00000000FD
647:102860000600A230000000030200A0600000000784
648:102870000200A10CBF5C00000200A110FFF51FEFD9
649:102880000200A1140000FFFF0200A118500003E0A5
650:102890000200A11C000000000200A1200000A00016
651:1028A0000600A124000000050200A1380FE000008E
652:1028B0000600A13C000000140200A18C5554000049
653:1028C0000200A190555555550200A19400005555A0
654:1028D0000200A198000000000200A19C55540000D5
655:1028E0000200A1A0555555550200A1A40000555560
656:1028F0000200A1A8000000000200A23C00000000AD
657:102900000600A240000000030200A06400000007CF
658:1029100000000000000000000000002E0000000089
659:1029200000000000000000000000000000000000A7
660:102930000000000000000000000000000000000097
661:102940000000000000000000000000000000000087
662:102950000000000000000000000000000000000077
663:102960000000000000000000000000000000000067
664:10297000002E0050000000000000000000000000D9
665:102980000000000000000000000000000000000047
666:102990000000000000000000000000000050008D5A
667:1029A0000000000000000000000000000000000027
668:1029B0000000000000000000000000000000000017
669:1029C0000000000000000000008D009200920096C0
670:1029D0000096009A000000000000000000000000C7
671:1029E00000000000000000000000000000000000E7
672:1029F00000000000009A00DB00DB00E900E900F7BE
673:102A000000000000000000000000000000000000C6
674:102A100000000000000000000000000000000000B6
675:102A200000000000000000000000000000000000A6
676:102A30000000000000000000000000000000000096
677:102A40000000000000000000000000000000000086
678:102A50000000000000000000000000000000000076
679:102A60000000000000000000000000000000000066
680:102A70000000000000000000000000000000000056
681:102A80000000000000000000000000000000000046
682:102A90000000000000000000000000000000000036
683:102AA0000000000000000000000000000000000026
684:102AB0000000000000000000000000000000000016
685:102AC0000000000000000000000000000000000006
686:102AD00000F700FE00000000000000000000000001
687:102AE00000000000000000000000000000000000E6
688:102AF00000000000000000000000000000000000D6
689:102B000000000000000000000000000000000000C5
690:102B100000000000000000000000000000000000B5
691:102B2000000000000000000000FE01030103010E90
692:102B3000010E01190000000000000000000000006C
693:102B40000000000000000000000000000000000085
694:102B50000000000000000000000000000000000075
695:102B60000000000000000000000000000000000065
696:102B70000000000000000000000000000000000055
697:102B80000119011A00000000000000000000000010
698:102B90000000000000000000000000000000000035
699:102BA000000000000000000000000000011A0152B7
700:102BB0000000000000000000000000000000000015
701:102BC0000000000000000000000000000000000005
702:102BD000000000000000000001520176000000002B
703:102BE00000000000000000000000000000000000E5
704:102BF00000000000000000000000000000000000D5
705:102C000000000000017601B5000000000000000097
706:102C100000000000000000000000000000000000B4
707:102C200000000000000000000000000000000000A4
708:102C300001B501F0000000000000000000000000ED
709:102C40000000000000000000000000000000000084
710:102C500000000000000000000000000001F002354C
711:102C6000023502380238023B00000000000000007C
712:102C70000000000000000000000000000000000054
713:102C80000000000000000000023B02760276028095
714:102C90000280028A00000000000000000000000026
715:102CA0000000000000000000000000000000000024
716:102CB00000000000028A028B0000000000000000FB
717:102CC0000000000000000000000000000000000004
718:102CD00000000000000000000000000000000000F4
719:102CE000028B029D000000000000000000000000B8
720:102CF00000000000000000000000000000000000D4
721:102D0000000000000000000000000000029D02B270
722:102D100002B202B502B502B80000000000000000D7
723:102D200000000000000000000000000000000000A3
724:102D3000000000000000000002B802E600000000F1
725:102D40000000000000000000000000000000000083
726:102D50000000000000000000000000000000000073
727:102D60000000000002E6036D00000000000000000B
728:102D70000000000000000000000000000000000053
729:102D80000000000000000000000000000000000043
730:102D9000036D0374037403780378037C0000000060
731:102DA0000000000000000000000000000000000023
732:102DB000000000000000000000000000037C03BBD6
733:102DC00003BB03C303C303CB0000000000000000EB
734:102DD00000000000000000000000000000000000F3
735:102DE000000000000000000003CB041F041F04319A
736:102DF0000431044300000000000000000000000057
737:102E000000000000000000000000000000000000C2
738:102E1000000000000443044D00000000000000001A
739:102E200000000000000000000000000000000000A2
740:102E30000000000000000000000000000000000092
741:102E4000044D0453000000000000000000000000DA
742:102E50000000000000000000000000000000000072
743:102E600000000000000000000000000004530456B1
744:102E70000000000000000000000000000000000052
745:102E80000000000000000000000000000000000042
746:102E900000000000000000000456045B0000000079
747:102EA0000000000000000000000000000000000022
748:102EB0000000000000000000000000000000000012
749:102EC00000000000045B045C045C046E046E04807B
750:102ED00000000000000000000000000000000000F2
751:102EE00000000000000000000000000000000000E2
752:102EF000048004ED0000000000000000000000005D
753:102F000000000000000000000000000000000000C1
754:102F100000000000000000000000000004ED04EECE
755:102F200004EE050205020516000000000000000086
756:102F30000000000000000000000000000000000091
757:102F40000000000000000000000000000000000081
758:102F50000000000000000000000000000000000071
759:102F60000000000000000000000000000000000061
760:102F70000000000000000000000000000000000051
761:102F80000000000000000000000000000000000041
762:102F90000000000000000000000000000000000031
763:102FA000000000000000000000010000000204C05A
764:102FB0000003098000040E4000051300000617C03E
765:102FC00000071C800008214000092600000A2AC0D2
766:102FD000000B2F80000C3440000D3900000E3DC066
767:102FE000000F42800010474000114C00001250C0FA
768:102FF0000013558000145A4000155F00001663C08E
769:103000000017688000186D4000197200001A76C021
770:10301000001B7B80001C8040001D8500001E89C0B5
771:10302000001F8E8000209340000020000000400020
772:1030300000006000000080000000A0000000C00050
773:103040000000E0000001000000012000000140003D
774:1030500000016000000180000001A0000001C0002C
775:103060000001E00000020000000220000002400019
776:1030700000026000000280000002A0000002C00008
777:103080000002E000000300000003200000034000F5
778:1030900000036000000380000003A0000003C000E4
779:1030A0000003E000000400000004200000044000D1
780:1030B00000046000000480000004A0000004C000C0
781:1030C0000004E000000500000005200000054000AD
782:1030D00000056000000580000005A0000005C0009C
783:1030E0000005E00000060000000620000006400089
784:1030F00000066000000680000006A0000006C00078
785:103100000006E00000070000000720000007400064
786:1031100000076000000780000007A0000007C00053
787:103120000007E00000080000000820000008400040
788:1031300000086000000880000008A0000008C0002F
789:103140000008E0000009000000092000000940001C
790:1031500000096000000980000009A0000009C0000B
791:103160000009E000000A0000000A2000000A4000F8
792:10317000000A6000000A8000000AA000000AC000E7
793:10318000000AE000000B0000000B2000000B4000D4
794:10319000000B6000000B8000000BA000000BC000C3
795:1031A000000BE000000C0000000C2000000C4000B0
796:1031B000000C6000000C8000000CA000000CC0009F
797:1031C000000CE000000D0000000D2000000D40008C
798:1031D000000D6000000D8000000DA000000DC0007B
799:1031E000000DE000000E0000000E2000000E400068
800:1031F000000E6000000E8000000EA000000EC00057
801:10320000000EE000000F0000000F2000000F400043
802:10321000000F6000000F8000000FA000000FC00032
803:10322000000FE0000010000000102000001040001F
804:1032300000106000001080000010A0000010C0000E
805:103240000010E000001100000011200000114000FB
806:1032500000116000001180000011A0000011C000EA
807:103260000011E000001200000012200000124000D7
808:1032700000126000001280000012A0000012C000C6
809:103280000012E000001300000013200000134000B3
810:1032900000136000001380000013A0000013C000A2
811:1032A0000013E0000014000000142000001440008F
812:1032B00000146000001480000014A0000014C0007E
813:1032C0000014E0000015000000152000001540006B
814:1032D00000156000001580000015A0000015C0005A
815:1032E0000015E00000160000001620000016400047
816:1032F00000166000001680000016A0000016C00036
817:103300000016E00000170000001720000017400022
818:1033100000176000001780000017A0000017C00011
819:103320000017E000001800000018200000184000FE
820:1033300000186000001880000018A0000018C000ED
821:103340000018E000001900000019200000194000DA
822:1033500000196000001980000019A0000019C000C9
823:103360000019E000001A0000001A2000001A4000B6
824:10337000001A6000001A8000001AA000001AC000A5
825:10338000001AE000001B0000001B2000001B400092
826:10339000001B6000001B8000001BA000001BC00081
827:1033A000001BE000001C0000001C2000001C40006E
828:1033B000001C6000001C8000001CA000001CC0005D
829:1033C000001CE000001D0000001D2000001D40004A
830:1033D000001D6000001D8000001DA000001DC00039
831:1033E000001DE000001E0000001E2000001E400026
832:1033F000001E6000001E8000001EA000001EC00015
833:10340000001EE000001F0000001F2000001F400001
834:10341000001F6000001F8000001FA000001FC000F0
835:10342000001FE000002000000020200000204000DD
836:1034300000206000002080000020A0000020C000CC
837:103440000020E000002100000021200000214000B9
838:1034500000216000002180000021A0000021C000A8
839:103460000021E00000220000002220000022400095
840:1034700000226000002280000022A0000022C00084
841:103480000022E00000230000002320000023400071
842:1034900000236000002380000023A0000023C00060
843:1034A0000023E0000024000000242000002440004D
844:1034B00000246000002480000024A0000024C0003C
845:1034C0000024E00000250000002520000025400029
846:1034D00000256000002580000025A0000025C00018
847:1034E0000025E00000260000002620000026400005
848:1034F00000266000002680000026A0000026C000F4
849:103500000026E000002700000027200000274000E0
850:1035100000276000002780000027A0000027C000CF
851:103520000027E000002800000028200000284000BC
852:1035300000286000002880000028A0000028C000AB
853:103540000028E00000290000002920000029400098
854:1035500000296000002980000029A0000029C00087
855:103560000029E000002A0000002A2000002A400074
856:10357000002A6000002A8000002AA000002AC00063
857:10358000002AE000002B0000002B2000002B400050
858:10359000002B6000002B8000002BA000002BC0003F
859:1035A000002BE000002C0000002C2000002C40002C
860:1035B000002C6000002C8000002CA000002CC0001B
861:1035C000002CE000002D0000002D2000002D400008
862:1035D000002D6000002D8000002DA000002DC000F7
863:1035E000002DE000002E0000002E2000002E4000E4
864:1035F000002E6000002E8000002EA000002EC000D3
865:10360000002EE000002F0000002F2000002F4000BF
866:10361000002F6000002F8000002FA000002FC000AE
867:10362000002FE0000030000000302000003040009B
868:1036300000306000003080000030A0000030C0008A
869:103640000030E00000310000003120000031400077
870:1036500000316000003180000031A0000031C00066
871:103660000031E00000320000003220000032400053
872:1036700000326000003280000032A0000032C00042
873:103680000032E0000033000000332000003340002F
874:1036900000336000003380000033A0000033C0001E
875:1036A0000033E0000034000000342000003440000B
876:1036B00000346000003480000034A0000034C000FA
877:1036C0000034E000003500000035200000354000E7
878:1036D00000356000003580000035A0000035C000D6
879:1036E0000035E000003600000036200000364000C3
880:1036F00000366000003680000036A0000036C000B2
881:103700000036E0000037000000372000003740009E
882:1037100000376000003780000037A0000037C0008D
883:103720000037E0000038000000382000003840007A
884:1037300000386000003880000038A0000038C00069
885:103740000038E00000390000003920000039400056
886:1037500000396000003980000039A0000039C00045
887:103760000039E000003A0000003A2000003A400032
888:10377000003A6000003A8000003AA000003AC00021
889:10378000003AE000003B0000003B2000003B40000E
890:10379000003B6000003B8000003BA000003BC000FD
891:1037A000003BE000003C0000003C2000003C4000EA
892:1037B000003C6000003C8000003CA000003CC000D9
893:1037C000003CE000003D0000003D2000003D4000C6
894:1037D000003D6000003D8000003DA000003DC000B5
895:1037E000003DE000003E0000003E2000003E4000A2
896:1037F000003E6000003E8000003EA000003EC00091
897:10380000003EE000003F0000003F2000003F40007D
898:10381000003F6000003F8000003FA000003FC0006C
899:10382000003FE000003FE00100000000000001FF59
900:103830000000020000007FF800007FF80000026F27
901:1038400000001500000000010000000300BEBC20C5
902:103850000000000300BEBC2000000001FFFFFFFFCE
903:10386000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF68
904:10387000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF58
905:1038800000000000FFFFFFFF00000000FFFFFFFF40
906:103890000000000300BEBC20FFFFFFFF000000008F
907:1038A000FFFFFFFF00000000FFFFFFFF000000031D
908:1038B00000BEBC2000002000000040C0000061806D
909:1038C000000082400000A3000000C3C00000E480AC
910:1038D0000001054000012600000146C0000167808C
911:1038E000000188400001A9000001C9C00001EA8070
912:1038F00000020B4000022C0000024CC000026D8050
913:1039000000028E400002AF000002CFC00002F08033
914:103910000003114000033200000352C00003738013
915:10392000000394400003B5000003D5C00003F680F7
916:103930000004174000043800000458C000047980D7
917:1039400000049A400000800000010380000187000D
918:1039500000020A8000028E0000031180000395001F
919:103960000004188000049C0000051F800005A300CF
920:10397000000626800006AA0000072D800007B1007F
921:10398000000834800008B80000093B800009BF002F
922:10399000000A4280000AC600000B4980000BCD00DF
923:1039A000000C5080000CD400000D5780000DDB008F
924:1039B00000007FF800007FF800000174000015008F
925:1039C0000000190000000000FFFFFFFF40000000A2
926:1039D00040000000400000004000000040000000E7
927:1039E00040000000400000004000000040000000D7
928:1039F00040000000400000004000000040000000C7
929:103A000040000000400000004000000040000000B6
930:103A100040000000400000004000000040000000A6
931:103A20004000000040000000400000004000000096
932:103A30004000000040000000400000004000000086
933:103A400040000000400000004000000000007FF83F
934:103A500000007FF80000050900003500FFFFFFFFB0
935:103A6000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF66
936:103A7000FFFFFFFFFFFFFFFFFFFFFFFF4000000012
937:103A80004000000040000000400000004000000036
938:103A90004000000040000000400000004000000026
939:103AA0004000000040000000400000004000000016
940:103AB0004000000040000000400000004000000006
941:103AC00040000000400000004000000040000000F6
942:103AD00040000000400000004000000040000000E6
943:103AE00040000000400000004000000040000000D6
944:103AF00040000000400000004000000000001000F6
945:103B000000002080000031000000418000005200D1
946:103B100000006280000073000000838000009400B9
947:103B20000000A4800000B5000000C5800000D600A1
948:103B30000000E6800000F700000107800001180087
949:103B400000012880000139000001498000015A006D
950:103B500000016A8000017B0000018B8000019C0055
951:103B60000001AC800001BD000001CD800001DE003D
952:103B70000001EE800001FF0000007FF800007FF8E8
953:103B8000000004480000150010000000000028ADEF
954:103B9000000000000001000100070205CCCCCCC1F0
955:103BA000FFFFFFFFFFFFFFFF7058103C0000000009
956:103BB0000000000000000001CCCC0201CCCCCCCC39
957:103BC00000000000FFFFFFFF400000004000000079
958:103BD00040000000400000004000000040000000E5
959:103BE00040000000400000004000000040000000D5
960:103BF00040000000400000004000000040000000C5
961:103C000040000000400000004000000040000000B4
962:103C100040000000400000004000000040000000A4
963:103C20004000000040000000400000004000000094
964:103C30004000000040000000400000004000000084
965:103C40004000000040000000000E01B7011600D641
966:103C50000000FFFF000000000000FFFF0000000068
967:103C60000000FFFF000000000000FFFF0000000058
968:103C70000000FFFF000000000000FFFF0000000048
969:103C80000000FFFF000000000000FFFF0000000038
970:103C90000010000000000000007201BB012300F3CF
971:103CA0000000FFFF000000000000FFFF0000000018
972:103CB0000000FFFF000000000000FFFF0000000008
973:103CC0000000FFFF000000000000FFFF00000000F8
974:103CD0000000FFFF000000000000FFFF00000000E8
975:103CE0000010000000000000FFFFFFF3318FFFFF16
976:103CF0000C30C30CC30C30C3CF3CF300F3CF3CF308
977:103D00000000CF3CCDCDCDCDFFFFFFF130EFFFFF69
978:103D10000C30C30CC30C30C3CF3CF300F3CF3CF3E7
979:103D20000001CF3CCDCDCDCDFFFFFFF6305FFFFFD3
980:103D30000C30C30CC30C30C3CF3CF300F3CF3CF3C7
981:103D40000002CF3CCDCDCDCDFFFFF4061CBFFFFF61
982:103D50000C30C305C30C30C3CF300014F3CF3CF399
983:103D60000004CF3CCDCDCDCDFFFFFFF2304FFFFFA4
984:103D70000C30C30CC30C30C3CF3CF300F3CF3CF387
985:103D80000008CF3CCDCDCDCDFFFFFFFA302FFFFF98
986:103D90000C30C30CC30C30C3CF3CF300F3CF3CF367
987:103DA0000010CF3CCDCDCDCDFFFFFFF731EFFFFFB2
988:103DB0000C30C30CC30C30C3CF3CF300F3CF3CF347
989:103DC0000020CF3CCDCDCDCDFFFFFFF5302FFFFF45
990:103DD0000C30C30CC30C30C3CF3CF300F3CF3CF327
991:103DE0000040CF3CCDCDCDCDFFFFFFF3318FFFFFA6
992:103DF0000C30C30CC30C30C3CF3CF300F3CF3CF307
993:103E00000000CF3CCDCDCDCDFFFFFFF1310FFFFF47
994:103E10000C30C30CC30C30C3CF3CF300F3CF3CF3E6
995:103E20000001CF3CCDCDCDCDFFFFFFF6305FFFFFD2
996:103E30000C30C30CC30C30C3CF3CF300F3CF3CF3C6
997:103E40000002CF3CCDCDCDCDFFFFF4061CBFFFFF60
998:103E50000C30C305C30C30C3CF300014F3CF3CF398
999:103E60000004CF3CCDCDCDCDFFFFFFF2304FFFFFA3
1000:103E70000C30C30CC30C30C3CF3CF300F3CF3CF386
1001:103E80000008CF3CCDCDCDCDFFFFFFFA302FFFFF97
1002:103E90000C30C30CC30C30C3CF3CF300F3CF3CF366
1003:103EA0000010CF3CCDCDCDCDFFFFFFF730EFFFFFB2
1004:103EB0000C30C30CC30C30C3CF3CF300F3CF3CF346
1005:103EC0000020CF3CCDCDCDCDFFFFFFF5304FFFFF24
1006:103ED0000C30C30CC30C30C3CF3CF300F3CF3CF326
1007:103EE0000040CF3CCDCDCDCDFFFFFFF331EFFFFF45
1008:103EF0000C30C30CC30C30C3CF3CF300F3CF3CF306
1009:103F00000000CF3CCDCDCDCDFFFFFFF1310FFFFF46
1010:103F10000C30C30CC30C30C3CF3CF300F3CF3CF3E5
1011:103F20000001CF3CCDCDCDCDFFFFFFF6305FFFFFD1
1012:103F30000C30C30CC30C30C3CF3CF300F3CF3CF3C5
1013:103F40000002CF3CCDCDCDCDFFFFF4061CBFFFFF5F
1014:103F50000C30C305C30C30C3CF300014F3CF3CF397
1015:103F60000004CF3CCDCDCDCDFFFFFFF2304FFFFFA2
1016:103F70000C30C30CC30C30C3CF3CF300F3CF3CF385
1017:103F80000008CF3CCDCDCDCDFFFFFFFA302FFFFF96
1018:103F90000C30C30CC30C30C3CF3CF300F3CF3CF365
1019:103FA0000010CF3CCDCDCDCDFFFFFF97056FFFFFBC
1020:103FB0000C30C30CC30C30C3CF3CC000F3CF3CF378
1021:103FC0000020CF3CCDCDCDCDFFFFFFF5310FFFFF62
1022:103FD0000C30C30CC30C30C3CF3CF300F3CF3CF325
1023:103FE0000040CF3CCDCDCDCDFFFFFFF3320FFFFF23
1024:103FF0000C30C30CC30C30C3CF3CF300F3CF3CF305
1025:104000000000CF3CCDCDCDCDFFFFFFF1310FFFFF45
1026:104010000C30C30CC30C30C3CF3CF300F3CF3CF3E4
1027:104020000001CF3CCDCDCDCDFFFFFFF6305FFFFFD0
1028:104030000C30C30CC30C30C3CF3CF300F3CF3CF3C4
1029:104040000002CF3CCDCDCDCDFFFFF4061CBFFFFF5E
1030:104050000C30C305C30C30C3CF300014F3CF3CF396
1031:104060000004CF3CCDCDCDCDFFFFFFF2304FFFFFA1
1032:104070000C30C30CC30C30C3CF3CF300F3CF3CF384
1033:104080000008CF3CCDCDCDCDFFFFFF8A042FFFFF31
1034:104090000C30C30CC30C30C3CF3CC000F3CF3CF397
1035:1040A0000010CF3CCDCDCDCDFFFFFF9705CFFFFF5B
1036:1040B0000C30C30CC30C30C3CF3CC000F3CF3CF377
1037:1040C0000020CF3CCDCDCDCDFFFFFFF5310FFFFF61
1038:1040D0000C30C30CC30C30C3CF3CF300F3CF3CF324
1039:1040E0000040CF3CCDCDCDCDFFFFFFF3300FFFFF24
1040:1040F0000C30C30CC30C30C3CF3CF300F3CF3CF304
1041:104100000000CF3CCDCDCDCDFFFFFFF1300FFFFF45
1042:104110000C30C30CC30C30C3CF3CF300F3CF3CF3E3
1043:104120000001CF3CCDCDCDCDFFFFFFF6305FFFFFCF
1044:104130000C30C30CC30C30C3CF3CF300F3CF3CF3C3
1045:104140000002CF3CCDCDCDCDFFFFF4061CBFFFFF5D
1046:104150000C30C305C30C30C3CF300014F3CF3CF395
1047:104160000004CF3CCDCDCDCDFFFFFFF2304FFFFFA0
1048:104170000C30C30CC30C30C3CF3CF300F3CF3CF383
1049:104180000008CF3CCDCDCDCDFFFFFFFA302FFFFF94
1050:104190000C30C30CC30C30C3CF3CF300F3CF3CF363
1051:1041A0000010CF3CCDCDCDCDFFFFFF97040FFFFF1B
1052:1041B0000C30C30CC30C30C3CF3CC000F3CF3CF376
1053:1041C0000020CF3CCDCDCDCDFFFFFFF5300FFFFF61
1054:1041D0000C30C30CC30C30C3CF3CF300F3CF3CF323
1055:1041E0000040CF3CCDCDCDCDFFFFFFFF30CFFFFF57
1056:1041F0000C30C30CC30C30C3CF3CF3CCF3CF3CF337
1057:104200000000CF3CCDCDCDCDFFFFFFFF30CFFFFF76
1058:104210000C30C30CC30C30C3CF3CF3CCF3CF3CF316
1059:104220000001CF3CCDCDCDCDFFFFFFFF30CFFFFF55
1060:104230000C30C30CC30C30C3CF3CF3CCF3CF3CF3F6
1061:104240000002CF3CCDCDCDCDFFFFFFFF30CFFFFF34
1062:104250000C30C30CC30C30C3CF3CF3CCF3CF3CF3D6
1063:104260000004CF3CCDCDCDCDFFFFFFFF30CFFFFF12
1064:104270000C30C30CC30C30C3CF3CF3CCF3CF3CF3B6
1065:104280000008CF3CCDCDCDCDFFFFFFFF30CFFFFFEE
1066:104290000C30C30CC30C30C3CF3CF3CCF3CF3CF396
1067:1042A0000010CF3CCDCDCDCDFFFFFFFF30CFFFFFC6
1068:1042B0000C30C30CC30C30C3CF3CF3CCF3CF3CF376
1069:1042C0000020CF3CCDCDCDCDFFFFFFFF30CFFFFF96
1070:1042D0000C30C30CC30C30C3CF3CF3CCF3CF3CF356
1071:1042E0000040CF3CCDCDCDCDFFFFFFFF30CFFFFF56
1072:1042F0000C30C30CC30C30C3CF3CF3CCF3CF3CF336
1073:104300000000CF3CCDCDCDCDFFFFFFFF30CFFFFF75
1074:104310000C30C30CC30C30C3CF3CF3CCF3CF3CF315
1075:104320000001CF3CCDCDCDCDFFFFFFFF30CFFFFF54
1076:104330000C30C30CC30C30C3CF3CF3CCF3CF3CF3F5
1077:104340000002CF3CCDCDCDCDFFFFFFFF30CFFFFF33
1078:104350000C30C30CC30C30C3CF3CF3CCF3CF3CF3D5
1079:104360000004CF3CCDCDCDCDFFFFFFFF30CFFFFF11
1080:104370000C30C30CC30C30C3CF3CF3CCF3CF3CF3B5
1081:104380000008CF3CCDCDCDCDFFFFFFFF30CFFFFFED
1082:104390000C30C30CC30C30C3CF3CF3CCF3CF3CF395
1083:1043A0000010CF3CCDCDCDCDFFFFFFFF30CFFFFFC5
1084:1043B0000C30C30CC30C30C3CF3CF3CCF3CF3CF375
1085:1043C0000020CF3CCDCDCDCDFFFFFFFF30CFFFFF95
1086:1043D0000C30C30CC30C30C3CF3CF3CCF3CF3CF355
1087:1043E0000040CF3CCDCDCDCDFFFFFFFF30CFFFFF55
1088:1043F0000C30C30CC30C30C3CF3CF3CCF3CF3CF335
1089:104400000000CF3CCDCDCDCDFFFFFFFF30CFFFFF74
1090:104410000C30C30CC30C30C3CF3CF3CCF3CF3CF314
1091:104420000001CF3CCDCDCDCDFFFFFFFF30CFFFFF53
1092:104430000C30C30CC30C30C3CF3CF3CCF3CF3CF3F4
1093:104440000002CF3CCDCDCDCDFFFFFFFF30CFFFFF32
1094:104450000C30C30CC30C30C3CF3CF3CCF3CF3CF3D4
1095:104460000004CF3CCDCDCDCDFFFFFFFF30CFFFFF10
1096:104470000C30C30CC30C30C3CF3CF3CCF3CF3CF3B4
1097:104480000008CF3CCDCDCDCDFFFFFFFF30CFFFFFEC
1098:104490000C30C30CC30C30C3CF3CF3CCF3CF3CF394
1099:1044A0000010CF3CCDCDCDCDFFFFFFFF30CFFFFFC4
1100:1044B0000C30C30CC30C30C3CF3CF3CCF3CF3CF374
1101:1044C0000020CF3CCDCDCDCDFFFFFFFF30CFFFFF94
1102:1044D0000C30C30CC30C30C3CF3CF3CCF3CF3CF354
1103:1044E0000040CF3CCDCDCDCD000C0000000700C07A
1104:1044F00000028130000B81580002021000010230DE
1105:10450000000F024000010330000C0000000800C052
1106:1045100000028140000B816800020220000102407D
1107:1045200000070250000202C0000F0000000800F067
1108:1045300000028170000B819800020250000102709D
1109:10454000000B828000080338001000000008010002
1110:1045500000028180000B81A80002026000018280BD
1111:10456000000E82980008038000028000000B802863
1112:10457000000200E0000101000000811000000118AD
1113:10458000CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC6B
1114:1045900000002000CCCCCCCCCCCCCCCCCCCCCCCC6B
1115:1045A000CCCCCCCC00002000CCCCCCCCCCCCCCCC5B
1116:1045B000CCCCCCCCCCCCCCCC00002000000000007B
1117:1045C0001F8B080000000000000BFB51CFC0F00360
1118:1045D0008A7BD81818F67020F843015F646260B8CF
1119:1045E0000CC45781588099812198918121849178B8
1120:1045F000FD19A208F63B210606296106860841A09E
1121:1046000079C208F1D3403576220C0C8C22107E2B17
1122:1046100090E612A58EFB071AEF94C214DB26816088
1123:10462000EFC2228F8C77A3C98B4AA2F2F710D03F3A
1124:10463000D0F895222A5F5601429741C55FA3C9CBA6
1125:1046400041E56F41FDF54611BBB9B7A1F2009CB43D
1126:10465000B6A260030000000000000000000000009F
1127:104660001F8B080000000000000BED7D0B7854D577
1128:10467000B5F03E73CE9C9949662627214F1E6112E4
1129:1046800020028638BC0228F73A212140A575A055A2
1130:10469000D1A21D3040C85B8A5E5ADB2F130831025D
1131:1046A000DAE08F8A16EDF0AAA8A80123450B7478EA
1132:1046B0008A5E6F6FB06A69B5DE888A8A3C22AD4A2D
1133:1046C000EF6D7FFFB5D6DE3B73CE6402D8AFF7FE49
1134:1046D000F7BFDF1F3FBFC33E7B9FBDD75EAFBDD6D9
1135:1046E000DA6BEFB1DB1C4CBF96B1AFF00F9EF53625
1136:1046F000C65846ECF9A89D7D2FE866AC60BD6F8575
1137:104700003B1DDEEFCEDB91EC632C67CF5A650ABC14
1138:10471000CFD9D0A6CC2F8C7D1F7041E57878BF7B98
1139:10472000AD5202EF735E6B53E6E1D361639DD09EA1
1140:1047300069BE14864F16602C93B1211399F80BB8FB
1141:10474000738A191B88FF842ECE1BC98C8D632C6F36
1142:10475000A52D1256E07DA87226F332B619E0CA499B
1143:1047600083EFD4BFECB763DB06ED44979331A7E644
1144:10477000D4BECA672C770EB331780E5EC6DFE3DF96
1145:1047800057F07F5ED85A1EC24CE53C2C7BD24FC2FC
1146:1047900090CCC33C5FA989E0EDD683A362F394CFAC
1147:1047A0000D8DBE4CB7D6FBBD7C2EB9E363FD1EF864
1148:1047B000FA716C3794B1485CFBDAB0AEB1ABE0098A
1149:1047C00008682FECFDFD4C56528C74B88D4DA167D6
1150:1047D000BDE6BB09F1527FD4CEC200777DC3C9725A
1151:1047E0002CB3DD0A1B96D7FBFB51CC4EF428618A13
1152:1047F0007612E7EB655E9C9F5AE37BB81CF0DC9079
1153:104800001C28C37E1F490ED153BECF9E3F3D3B04A3
1154:10481000F0942E2A0C33A0FBF9F58ADF019F7FA4C8
1155:1048200044743BD0A3FA3B0D45D3A0DD9B7AE83A14
1156:10483000FC6E911A6DB1C3F8B5731B0A8002AC53BC
1157:10484000E7FC337877C9271AD06D3063E19434A43C
1158:104850000B63274C74C0BF13C34559ED1B8F977A68
1159:1048600056603F1AF612A1F9CAF779E1A34386C64A
1160:104870008DC78A091E867032D6A524A2EBE0174B9D
1161:104880008E6A457D8FF79F3F8F309743C01DD2B70B
1162:10489000D6A34796037E4B5FB047AF057AD46E54DC
1163:1048A000220E28DBF6B902489FB35BA00C74897A0C
1164:1048B000746A7FC67052B9DED179FF3550EE7E4101
1165:1048C000659BB0DBE1493694BB930276360ECA8015
1166:1048D0008F852E5EACDDB8FF36ECAF72B783B99032
1167:1048E0009E2F2EFAD635505E04FC864D6AB736E907
1168:1048F000FDA1BC38A2B463F9DC1446FC114ED323ED
1169:104900005B61BC73DECECC1B405E4E353A990F40E6
1170:1049100059E1E9CCFC0EF051556447397E57B55D3D
1171:10492000F123DA4B5FD87A2407E7F524F015F0512C
1172:10493000F5B664E693F883FF4FC254AE85FA25308E
1173:104940004F94FF45ACAD9CA938FE5ADDE789E1EBF9
1174:1049500054A341E3F4C8D393300E7C57F7ACE2C7BD
1175:1049600029D6D95808E5EAEC8BAE399BDD38BF264D
1176:10497000BDC083F3BA47C7768B22F376A1CAAA8A51
1177:104980006CD4CBA1BE6AC3467D6121E20DF45E21E9
1178:10499000C2D5CF0AD77A3580F85D92EADCA4027ED0
1179:1049A000983B903D3B01FF9C6A043556102B57A164
1180:1049B0007C933E89E8B34CEDCB9554E2D7EA6D2A5F
1181:1049C000F359F889D33F7C8CD33FBCD713D99A17BE
1182:1049D000A3DF1283EB4949BF25A9829E5A77712232
1183:1049E00078EE477A003C6D882F78AE11F07927B3C6
1184:1049F000120DE8E20D30436197E6CF363B9BC7606E
1185:104A0000ECD7D982803609CA3ABB83F91933B4DAB4
1186:104A1000401994FFC282AFE17C18F3FB8280E71655
1187:104A200085CDC1791F4660613E2D393AE1AF6D6A8F
1188:104A3000F166551130A76379E1CF57E5D1F76FD013
1189:104A4000F71A7C3FAAEFEF8DF28996EF8DF24AF9C3
1190:104A5000FD3BD88E392FFE7D5BF9D5D6F1CBABE48B
1191:104A6000F71FD0F8EE8BC36F4C9B6C1D7F5A0D7DEA
1192:104A70005FEFE0F4EA4E75463641B9D9E50F684874
1193:104A8000378D45F1BD9656B009DBA9921F58674096
1194:104A900085EFDDDB53C7AC6266BE98F2271CCF03FF
1195:104AA000D262E68B948949167E4C0DA459CAD093E4
1196:104AB00071F2CA981E0A789D048FDE5F277D51D25D
1197:104AC000DF49F0DEB5CF45E5BBAEE6F0DED5DF4D24
1198:104AD000728630B01C28EBA1AB0CD37A04702A2C60
1199:104AE0009BB1CF95904B196F7EEFB3E1FB249535C9
1200:104AF000E07C921C8CF4D13D79C59BC326FCB40E9E
1201:104B000002FA42395DD1391E055EEF19B4307B9E41
1202:104B1000699C9641FA9C4D85FCFDED6E1C2F98A971
1203:104B2000A01ED4BB0B0C77EF711CF9132DE3387367
1204:104B30002B699CBCB8711CB99571E338E76C12EF16
1205:104B4000C538432E36CE3DF9575BE7935B45E314FA
1206:104B5000C5CF27B72A6E9C243E1F782FC6F123FEAF
1207:104B6000FA9CCF90C9D6F90CAEA171AEC171C69BAB
1208:104B7000E633B8266E1C378D83EF711C30A47C2C75
1209:104B80000BE8EEE85E48F4FF958BEC05DD117A0248
1210:104B9000FB656FBB18E9131F8C9B857A0516679020
1211:104BA0005F4D49A371BE4802FABBCD74E6FA889EF8
1212:104BB000A07F16081059042002FD532778B462FB29
1213:104BC000ACDC267CEE2ECD9E8776C93A8F7F188886
1214:104BD000CED9DDA5FAED09EC9B056DF6935D16FEC9
1215:104BE000157A6F0A1BDE00E377A0B231954F82FE83
1216:104BF00062A0B74E80FEC2E747C23EFD00F41BD361
1217:104C0000CDF036D13C4E6A1C8F2737F075E48BB55A
1218:104C1000C7EC60ECE1306F1402DC378A692C680362
1219:104C2000E3CF2467F5821EDD2F3A229B881E810187
1220:104C300036E073B6BE1FE04AB4033BF30FC21E85D5
1221:104C4000BF0136B0656F69DD71189BBDA5CC1BB483
1222:104C500004E63BA763AD7D0094CFDABB6EF3BB4D9A
1223:104C6000FDCCB19FC0793BE13FECE7E690DD629F70
1224:104C70007EB7D25ABE35CE5EAD51F2053DC4B8BE48
1225:104C8000881DE975632687E7567C8EC16A83E875BF
1226:104C90009BC1BF95F0D4DF6D67515A8FBA3258214E
1227:104CA000E22383ECA2905C57E2E0BBCDEE0C0481E2
1228:104CB0009EB7FD40253CC6C3DBB52F3960037BA9F9
1229:104CC0006BFD1FED687F5F0AFEEF2DB3D6B3301F7B
1230:104CD0004FE255F2C14D734AFA7D606A77736846B8
1231:104CE000BF0F4CFCF2DDCA5996F2AD0D375BDA7F8F
1232:104CF0006FD93C4BFDBCF0624BFDEDAD7758CA0B54
1233:104D0000DA7E6069BF687D93A57E71E45E4B7DF5B8
1234:104D1000B6B596726DFB2396F6F5BB375AEA6DFB76
1235:104D2000465C8FF2B8E24D95A17DF6B9FBE4FD68D3
1236:104D30005F7D6E687E6C5387BC0672F8716336F1D6
1237:104D4000F7A9461F3DCFEE1EEB447BBC3E09E4199C
1238:104D5000D6FA7DCA1FC2AD93518F407BD0E1079434
1239:104D6000F7C361709E5E517CC4F7EA7A9D45815518
1240:104D70001596D6C3D7DD6AAC5EEB82FAB17DD7ABB0
1241:104D8000EBB584F55A9796B0DF734A7701DA77E18D
1242:104D9000DF3918DA817DD90FF03700D78BBEEA4FA3
1243:104DA000DB5865BB49EF9C546CC407372A534EA2AD
1244:104DB0007EAED1B9BCD7ECCC9982FE608D1E2D6839
1245:104DC000705F64BC7600260BFBC9A7792D8E0C881A
1246:104DD000C92FD16F8845EE97B2D087A89F4FEF5764
1247:104DE00049CFB2E8C1DC6F8FC2F10327F13DDB9DF3
1248:104DF00041EBE35B8D817E1F803F77BC713A3D7F45
1249:104E0000DF18ECF701E89A771AE750F9DDC6103D94
1250:104E1000BB1A2BE979A2B181EA3F685C46E5938D24
1251:104E2000617A7EDCD84ACF538D6D547FBA713D953F
1252:104E3000CF3646E8D9E307087B94A50BFB4FD8EBA8
1253:104E4000B07250F9BC98830AFFE67EAB3F1BE5FACF
1254:104E5000BCFB8B02B473CF1F07C324817F289FF153
1255:104E6000FCD637FD02B4DE2F8C00FDC7F6AE7725E9
1256:104E700071FAB86C6C3A03FD73EF309D69307ED2E5
1257:104E8000AFAE247B19DE6B8CF465C43FCB93A07F5F
1258:104E90009C73D6A5E9D4C31F8FFE4731C61F6E147D
1259:104EA000FA30E9A0DAC0E9B6D98F7433E18FDB6557
1260:104EB0002F087D1E8747B2E5727AE3F34C86C467FC
1261:104EC000672EC601D629C11136E083F31D0E9AD78D
1262:104ED000F93DC91186DF627064D2C5F0C6E1A8DE73
1263:104EE000E632CCFAA1B63DD5B0EA8B1CC3AC2FCECE
1264:104EF0001FDDEC45B95F926D333E188BFC1110FC41
1265:104F0000C1F94EF65FDB9E67B82DFD58CBE7DB9409
1266:104F1000E9E80781724FF94E02FF403E9764EBC605
1267:104F20000720DFA7B60D49C171C18F33709CD38DA7
1268:104F300086C1C7CD36CC7C59B32C89DA4BF8FAEA56
1269:104F4000F7EF0D1F5A06EF3B19A1FEAB215FDFCF34
1270:104F500066DA9F289EC3F6D8BFC075C701FF7F459C
1271:104F6000F1008DCAB2DFFA7635ECB80ADF6FB78C84
1272:104F700007DFF9A40F8DEB55DF74D7D849535CA038
1273:104F80000EC720FFC849740E418F29D0DF39CDDD0F
1274:104F9000AAC038D36D3EAAAF17FC58EBECD243F051
1275:104FA000EA4C07A7475FE39C6A3CEAD3407F543A48
1276:104FB000C12383712ADB4794A17E3CD3B122330401
1277:104FC0007C5BAD9EBF2B98E0FB569BC2E189D8BBB2
1278:104FD000BB4CF3917114C6A05F670C7EE4F493A6FA
1279:104FE00072BCBE96CF07B05FE08FBAEDC7CAAF0103
1280:104FF000F8EB767FA6231CD36DA1076C19B1F92BB2
1281:10500000387FE8A76ADB7B3ACEEF637BB8E0EE8BB4
1282:10501000E8A9DE70BAB3296E27E10BB34EB463E69C
1283:10502000F7C4157D37BD0DA2F9C93FDBD92A8083AE
1284:10503000FD055A41BD5DD456B0A017F135BFA39A06
1285:10504000E28B9FD8A4DDD4568CFC7186D9A6E3FCF4
1286:10505000CEB0D7BD634DF8EBB071BB9FB5723B26A8
1287:105060000CFF213C60CF5AEC9A45EBADE5856C76A0
1288:1050700026EA8D85EBEC2C02285A8C7691E40F9869
1289:10508000F7161BB77717B18616B4E73407F70FE6A4
1290:105090001B4C1B0070D5FEE2B162B4FB7F69B311FB
1291:1050A0007D649C61711A87BB2A3DA207A0FEFD8E1C
1292:1050B000B1375E83DCE788B4E0BACC52987F2BEB43
1293:1050C0008DCFDB5BADF05D0AFE7878195B6E8143B6
1294:1050D000F62BE150B729814802BE7B45F29DD023D3
1295:1050E00069AAD5CECF8A2BBF6313F14B95A948E7A8
1296:1050F0003386336C4BA17A7F14E3233B1DFE1540AE
1297:10510000DF3B6DC12ED4CF6017143153BB3B6D21F3
1298:105110007A7F5A796D21DAA74C8B16A17F0F6B8AA3
1299:1051200086FCA00B7E5093BC45188FF530583F414C
1300:105130002E1D081FF4D3E2A99CC98A30FE0A720A08
1301:10514000FDDDE72D3FAA40D9E5EE60D89F23DB1AAD
1302:105150005F76F9ACE57AFC07D26138A3384EF2707D
1303:105160006B3D2C580CF9CDE3B7BEFFF71E3C4589CB
1304:105170006FBDC4D2F074BAA32A8CCF266AA7CD76AD
1305:10518000739D93C34F7E39B45F2AECF93AE60B5313
1306:105190009C389BF3C1D219368267A9C7E70F43BD7C
1307:1051A000A20518CA1FC6AACDEB58FD0510B97EA6E8
1308:1051B000B2D6AD235FD65FD05804F47D912DE45173
1309:1051C000C723FE0264E73A01595F01C89A7BBAC55A
1310:1051D000EE6503D3C4FA3AD030CBEB40A4F3F81811
1311:1051E0009DA55EB00BBD08FA224BCD403DD85D4E6B
1312:1051F0007E09EB223D21DBE9B17603118EBEDAB9DF
1313:1052000062EDF212F557FB8B67768501FF55CF3DB6
1314:10521000E805E2B34FB4B64C3FBCAFD9BAD28B7CF1
1315:10522000FCB116F6E2BC3F89A8D313F1F38DAA2294
1316:10523000FCB1805B417F58D0E9D453ABBF8578FF88
1317:1052400062ABDDC026F5DB1C510710B1AE6331E760
1318:10525000A76D8EF778F99ECF909EF5BBADF256F50F
1319:10526000C4839918EF040C71BF9145C97EAEDBF27F
1320:105270006139DA23F5AC9BF444FC7738FE85345A67
1321:10528000BFE6E929BDEBE5FE4BBDE0FBFA8ED59FFD
1322:10529000A95E2C5BE5BB52F823D3544F3AC5952643
1323:1052A000B0094837890716E1F6F08A271F2E7A0FD2
1324:1052B000E038BDE59FBD8A256EC4F5C3F9F6DB7FF6
1325:1052C000F692AF6FBD7E56F8F3B1EF22F49D6F37C3
1326:1052D000B7DFD91EFEACB147BDE82FD56CB4FB419A
1327:1052E0003259CD339B7FFE28F2F5EF1C1467A87E60
1328:1052F000E6F05B5743B97A873D7D269F865BC98C74
1329:10530000D1A31EFE5F362686FFAAE70FEBBE51FC37
1330:10531000FD8FD26274A8DEB15F67A37AE3ADB47D7E
1331:10532000BFDEE54E408FF6F7CAD1DE5EF1E4973A74
1332:10533000CAD527FB149695D7FBFBCA8D87C99E4318
1333:105340003C11FD047D7AE8D58B4ED16FBD348EDAE9
1334:1053500019B87EF545A791B8F665101F3FFB12C638
1335:10536000EF7FEFF0E3FC2B9FFDBE17E7F191D6C076
1336:10537000F9F9B195990118B7D21ECE34E8C9DF57B3
1337:105380003E7E27F1D9A2637766523C8005726CB4E9
1338:10539000868673707E0B36DC40F35BC842C46F9523
1339:1053A0008FA9C108C6B334367D470279784DC8C38A
1340:1053B000479B1CB8F6B08F50C1A27FF8BA4AFB04D5
1341:1053C0008CDD41F1863BE53E045B42E5CF9D9C4E82
1342:1053D0009B559B8C6F382D7CBAE59E4EA4CFA9417E
1343:1053E000812C8C4F021EC2025F0AEA1DF5D8D42C14
1344:1053F0004E1FE6D38AC577A0174BF13DB6EFB40731
1345:105400005C4596EFC43AC6C75F2AC607B893D01E5C
1346:10541000FB2813EC9B04F3FB52957A19EC0D137FD8
1347:1054200099E49ACBF9967BB95C4B398FCC9A8EF57F
1348:105430007F7A83CB0F7E87EB3AC015CDA2FAFDDFD2
1349:1054400051480F385834913C6FB10B79B6D6CBFD2B
1350:1054500049805BC3F529C627D07F1AE19FECB4854C
1351:10546000EBE03B935EAEC7F1A89D1E7B6F5AD7174A
1352:1054700009F97F5915FBA342FED9062EF77DDBBD46
1353:1054800061EE1FD8233F7F14E515E413D7999A677F
1354:10549000EC419CF7A7DB0FBE750BF0F5A7ED524E64
1355:1054A000AD7A335E4E2B778E6789E4F453B79F2530
1356:1054B0009453789F504EDD5DC4C7FFD97A53E2ED17
1357:1054C0006C9CDE947AB02FFCC5EBC135AA2FA11ECF
1358:1054D00084BF3758716FBE93FC26F9ACEAE9DAC194
1359:1054E000143792FC28F9AD871F25BFC5CFD38AB7E3
1360:1054F000F8FA1785BE9174B62F67610FC64BF7AAED
1361:10550000E45F9F03985A80BEE7B6E74530EEBCD211
1362:10551000C5E317E78C6E6F1A3C57A6F2727786DEEA
1363:1055200082FA41BEEF76F1F8F6B960B737D5E457A5
1364:10553000BCB747F5FAA0BE2BC2A627F23740F3123C
1365:105540001C5DACAF7A1E0F9EAABA7397A1DFDEA6D0
1366:10555000D27E7645D34D5EDC073EB767C84F503FDD
1367:105560002D78050C4C80F71CDA812938BD808679AE
1368:1055700009B70B7A7FCCC20F4D86F9DDBE87FB0BD6
1369:10558000156BE2EC7BF7521DF50DD8F727AC716D6A
1370:10559000CE3755A29FCA0DD6FA2AB686E85615C749
1371:1055A0004721E1074ED0041F8D66A3851FC6E31770
1372:1055B000425F4D550B7F8276C6B9A33CAE787E8F95
1373:1055C0004AF83FBF5D8960DC87E2BB9390FEDD3A1D
1374:1055D00033F9CBA791DFF4BEE5F8F40B7F28BE1BAF
1375:1055E0009AD4EC7ABBE8A7F03CBDEB7705BFC4F2D8
1376:1055F0002F7E9BFB36EBDDBE74DF9F69FFF8DC3E40
1377:1056000007C1716EDFCBB97763F925871FE13CB71E
1378:10561000DC41FB67E17D9EC830AC1F04F4C67573A6
1379:10562000EF97455DB4EE34139DE66B7CBFE3FC9EC3
1380:10563000FF7857C1FC833D0E1FCEA37E1FCF0BA961
1381:105640007FC9457197737BBF2C0EB9FF7EF3A9D339
1382:105650005988F8CFC3E6EC447E4DE5FB00F5BF9CCE
1383:10566000B4B909F7C33BF6EBB8BF52FAABBF16A10A
1384:105670007E39B793DB0967ED5D8FE33E68AD367425
1385:10568000B91DE51E6DB6FE6077DA174C091726C204
1386:105690000BC7C339C003CE0BF052897AB12F7C34CB
1387:1056A0006BDCDFFCEF878FCF6EC3F16BF64C20B95C
1388:1056B00089E14509F0F79E8853A1F9F3F7FBBE2C69
1389:1056C00042BBE7D3F6265AC72F35EFCDFFE3E6AD51
1390:1056D000442F67DE07FE9BF3FF748DAF4BF172D052
1391:1056E0009BCF7F7117959FF5F809DECB94FF13FFD1
1392:1056F000D3E8BE13E8EEBD34DD15FB7FD7795F8AB2
1393:10570000EEAF08BA7B0CCC2B38B7F7AF142F97F35A
1394:10571000BFD4BC7DFF8FCE5BDA3FAB6CFEB67C683E
1395:10572000BF86453B7D00E7CAE1B3DB30CC046E4267
1396:1057300030913D12B473FF4855781C860DE27121FB
1397:1057400026FC094A01F3611C6521D9759ABB85ECD9
1398:105750004CA6F93B03808F5523E7FB2957838D39EE
1399:105760001EC2F2C0C97E8A6FC6F955CD0A0B2860E9
1400:10577000EF6923BF7114ED7CFB705BD45144CFF70C
1401:10578000F0798F8863D90DDDE24FB8E3FC0197CF44
1402:105790005AEF10FD39D998B67CCC53706B4604C6CD
1403:1057A0007797B4D17CDCC3186B33ED033A98E97B6F
1404:1057B000E8AF1003B026FBF1EBE2AFA9077F633A35
1405:1057C0000388BF11368A6B51521FE1C31F59457EB2
1406:1057D00026F71F63F86CE9443C6A0CFC3F3E3FF23D
1407:1057E0001B99F01735D18536DC167059DB09BFE8F7
1408:1057F00092F4E1F4C8AD11F45962A187C47F02BAF2
1409:1058000058E821F1FB75E9124F8F78BC7FC7CEE3D2
1410:105810006DF174B2E47764703F240A7EC8CBDB3745
1411:1058200053BCE3CC53EF7D0BDB57FF52654EE8E7EB
1412:10583000EC760F8BA2FC6A111DFDA9AA0E35619CA6
1413:1058400057DAE5D5CF7968BCAA9D8EC84CF8BE6AF8
1414:10585000D7FB4564372DEF3E3200E3024F299C7E93
1415:10586000E1AE22DCB7ABD2B87F10DFDF063B8F0B97
1416:105870009C7E31790EC61F946D3C5FB1AAFD26BB9C
1417:10588000C3C46FFFCBCEF35EA11DC973F84985D6A3
1418:105890009BDEF071BFE0F4930A876FB73D82798F8A
1419:1058A00055DB36EA21F42BB77D4671ECD2E79EF149
1420:1058B0007691BFA85AFDE76D2AD1139E44BF783F69
1421:1058C000B6AEA396FC84BA76E127C6F951D5CFEDE2
1422:1058D000DD1506D4543FFF8417E32FA73AB77AC9E2
1423:1058E0003FDDC6FD4FCDAD25F64F2FE597B6DF9BCB
1424:1058F000D02F3D85FF007F62BF3DCE9FDFD6EFF208
1425:10590000F62F9FF9FC718C939EDEF9E9E30877CDC1
1426:10591000FFFEE3E368DFB37D2E632BCCB7FEA93730
1427:1059200029DE24BF7B5BC8E9D9412C9C03EDCEFE68
1428:10593000CE41F92367F77E948BFEDCD91D7FCE44E0
1429:10594000BF7EE9DEA95938EFA52F9466B104F22E87
1430:105950009FC89791CB8813C6D3E160C741F243CE6D
1431:105960001C7790DFD7135F68AFE5F11A9F882B6C27
1432:105970004F1C8795FE705DC7FBE53C3E26FCE24B65
1433:10598000C511DE003A5E7519F4DA2EE24471F43A7C
1434:1059900083FF00BA7C1947AFCF59E86739B80FD9F0
1435:1059A000D1AFCF3842F432F024E3BB47EC019B8EF9
1436:1059B00072B033B9874E33914ECF7C9E8BF1F08F0E
1437:1059C000EDDD64F774EF7518E8DF57EDFD2DC9C5FF
1438:1059D000D9178E51FC948938EB59D6F3C7E3628A04
1439:1059E00098DF160F8F3F087C637CC2E7A5F7220E75
1440:1059F000C1F955C627FA8A4B4CD045DE93883BD770
1441:105A00006E795B6771711E6522D2E93D4B7C5CCE7D
1442:105A10003BBE3F03F130C11C5F4B1CF7917E738C82
1443:105A20004E3CAE26E36767378AB81BBC1F3806FDBD
1444:105A3000411EC7A88F28BF6509E450C6D7C6E871C4
1445:105A40007218B9BCB8DAA5E0FD5BF1314CE7EB8325
1446:105A5000C4CBE9BF24D6C3DFD4B95C4FB78566EAAF
1447:105A6000A6FDECEF897D16892F09EF69918777FAFA
1448:105A70002995E2412DED07499FC6CB735D1FE720B5
1449:105A80006ED379BCB56EF7FE22D43BA70FBC487C21
1450:105A900057B7FD3D3D0CFD1CD9F6BCCEED49CEE718
1451:105AA000A8A723263D7DFAD9FD453CEEC7F36EE35A
1452:105AB000FBAF16FDD7EFB1F65FBFFD334BFFD5E16E
1453:105AC00076DAFFBAD438A7B4C04D38DF539D768656
1454:105AD000FAEE54BB3A3D92C80ED4ED967DD0966353
1455:105AE0003AAD57E35E4FA2FCDCA5C7A6BF9D82FB83
1456:105AF00074206668FF763471BEEAF8716000D2A542
1457:105B0000E3D82D2AAE1BBB108F263BB8F88D8652EA
1458:105B10000FC86BF13BC171C856F17A60C2719B0529
1459:105B20006E18270BF57133F483F9F4983F84FBA3C7
1460:105B3000AAB77C3AC2A31A36C39570FDE4FDD9DD3D
1461:105B4000418676B9DDB0E62B67CF1671B4A8356F04
1462:105B50003D5B67C3711F9CD992FCB81FB064446061
1463:105B6000F461CCAB5F904D71E29C6FF3EFCE18EE19
1464:105B7000B0EDAAD8BE6DF205E81FF3606C91B57365
1465:105B8000E1BB64AD5DC17D007832A4CB9DB6D0266B
1466:105B90003D03DBE9CC07AAF1715DD128FF429C7B74
1467:105BA00091FDC9767DED07CB7348AA807F88D80F19
1468:105BB0001EC4BA14DC0FDEE0E1E79106BBD3E9BCFA
1469:105BC000D16661B7F970DF15DB3558D7ED4B9E47CD
1470:105BD0006AB596D34B4BEE18EC073F58BFAB540356
1471:105BE0007D907E53C98E0106EE4BAF2BC5BCFBF4F6
1472:105BF000274A46E740798EA3A88CEAFFB564742E45
1473:105C000094BFDF3AA98CEAAB15CA0BDCAB77978659
1474:105C1000DD31F9CC00E316F32D406E0FA0DC9E09B8
1475:105C20009E6EC1DADA1BBED0F9791816C4F90F9A44
1476:105C3000C8E73FD0FDCE0E9CEF605B5713F2DFCF7D
1477:105C4000F67E998AED7CCCA0791AACD9C07D7978A2
1478:105C500035F1AB8BE4FFC4E7C1487E7F2E39F41BDE
1479:105C600084E3DEF9C31F2E479D5AE3273E8ADF27D0
1480:105C700066463AD1A542D005E1749AF2902BF12400
1481:105C800002E99B3203C751C235EA57577E7D784EF1
1482:105C90004A7E11E7C04CE7A43E41381F490ED1337C
1483:105CA000FE9CD4013DF829F253CEC20BB908BF3C8B
1484:105CB000FF54BAC84D7181F37B58C491407EE473A0
1485:105CC0005323CBD086F65DFFA623F4671C37FF571E
1486:105CD000BE9D47A1BFAB2A743FA6AE5DB56C5C8686
1487:105CE0003696F109A13D21E8968DB444F9BA8BF1BD
1488:105CF00073390E25807EE3B9EF1BA47F0756CC24B1
1489:105D0000FFE25C725E3BE64F9CBB9BE701C00AAFC3
1490:105D1000A01C0CDA931245FF07F8F88B383EFEC240
1491:105D2000BACE58C73DF7956F7717F56788FEC0D094
1492:105D3000C944B9E17FE7546E679F6BF4111C60168C
1493:105D4000EEC7F5F472C7CB7658CFE901DEFB3B4CCA
1494:105D500078CF75F449BF3C07A71F3DE3E9B7D0D919
1495:105D6000908B725C156C2F47D7F4A385771523535E
1496:105D7000BFA987AEC0F635733A8FF09CA18602DCCE
1497:105D800067EB4D5F7E1E2B73CFBC263BC62B903E30
1498:105D9000BEDE74BC6A993F43EB67A1EB5884FFAA4F
1499:105DA0003D9FD9107E49CF87459E7FFCF7FFE85085
1500:105DB000C4B8354D768C93ECD6C99E8D6F371D0FC8
1501:105DC000558D8F958B9CC5346E968DC73B7AB7E702
1502:105DD000EB5FAC5F279DCBEA8B1F8B0CDE1FE0FFD8
1503:105DE0001B66FC7FAB6FFCCFC276807F7A7E0DFC9A
1504:105DF000DF84EDFBC2BFB4A3AB855EA8C67D14E013
1505:105E0000A30F03B33387C2F8E5AA9BE460F156956C
1506:105E1000E40FDACFCCC98CE991C5931AF6E37C176D
1507:105E20003FA610BF568873A69F8ABCFEF87CA88543
1508:105E300073C2B4BFD32B2F2A12E7D7C5E5BBD7C790
1509:105E4000F87630CF53E3E7B6542117A58B0A53D029
1510:105E50001EDA67F7FD2BD9D9AFA86C5302FC6F444B
1511:105E60002633D1755083CD9227CB2A522DFD962D06
1512:105E70002AA47DEF251EDF45FDAAC1CBACEB765EE3
1513:105E8000D87ACE6848ABF59CD1B0B6FE96F657AC42
1514:105E9000CFB7D48F888CB4D45FB96D8CA53CAAFDE4
1515:105EA0006A4BFBAB764FB1944747BF61693FF6E859
1516:105EB0006C4B797CE72D96F6138ECFB7D44FEAAAB8
1517:105EC000B2D45FF3F1124BF91FBA7F68B5536C8CF3
1518:105ED000F4234B52485F1E6A9C988BF9D86C9C52F5
1519:105EE00086F82C15F98487EED06D86179F0536034A
1520:105EF000F4D681053369DD3F744766C047CFE200C1
1521:105F0000FA354C9D3C2E51BEE6546352AE392FAA51
1522:105F1000D469B7E8B7A986B5BCCB21F6FD0673BE38
1523:105F2000F9659C7CD91B2647C13264FD170FCDC291
1524:105F3000F140CEF6093DB7EFB2F45C6643319641CD
1525:105F4000CE0E25923326D6D912C14FF00CE8981FF9
1526:105F500059E6A1F538802F7DF43EAC81BC4C71FA36
1527:105F6000071EC679D9FCE9C88465738287787F6289
1528:105F70005D66C36D5F675D96729E6D13F96B693CDC
1529:105F80007FED91050529CC84DF3F386CC28E6EE32E
1530:105F90004FE3A8AB276F35DFFCFEE324CD942FA79A
1531:105FA0002C9A49F922D97DE8453D3B7FC616D0C7DA
1532:105FB0007A8E8F9EF27DCB1C5BC23CB06EA147A552
1533:105FC000BD3522666F75233DCE64BFFE10E629D530
1534:105FD000CDED267B2BDBD676C7119CD7ABAA885F8D
1535:105FE000FAF8F92A61272F98F1C01D47705FFA5F10
1536:105FF00086917E92E36C689C3E43339D231FD88735
1537:10600000DF74A593C3F378E3F0191594B76DF0F33B
1538:10601000A2A2FFDC706D39DACD8345BEE943B6C478
1539:10602000F92E6ED14F16921CE135DC24276716BE7F
1540:10603000E3D5601E8FC2EAE5C47DDBAB3A8BB91DA8
1541:1060400016F0E339D4DCE8AD0F61FBDC6C8DF25D5A
1542:10605000E3C7CF9A1B6ACD83F935A7D9FC6E2A779F
1543:106060002BD8DEF123C6FA41FBE6FFAD123CCD078B
1544:106070002651FE87C3DDC0703F55CEEB60DAA384A6
1545:106080001FB52399D64126F6C565BCF5F3EC8A4EBB
1546:10609000B4373E5F67A7F13E87391AD0FFE71D2A64
1547:1060A000EDBB1E494B8ADAA0ACB67A68FDCE45DB63
1548:1060B00013DA2FECF0447C7931BC68EB27D37918E4
1549:1060C000C7403EFFE63477C49D47F34EC7794B384F
1550:1060D000E5BC07F5E1679608B873AEE839A7C1904B
1551:1060E0008F5543A37E17A4F2739891C689825ED61A
1552:1060F000F9B464CFBEFE663C3FF486CA3035C4D7DF
1553:10610000D546F35F08F3C7786F3C7ECFF8F2BEB098
1554:10611000A9046709C2A9AE2FA779503BF8AEF6676C
1555:106120000A7B340FF930349DE8DADF46E7027BD989
1556:10613000074E2E5F339C3C2F57CF2E98B1A51F3EA4
1557:1061400087925C7CD3D9E7BA1F74727D44CFAF715C
1558:10615000BF00ADFF521FA9019BB073B95EEAB19FAA
1559:10616000F4D0779D19B1B29AF2A322ECB76FFB6C11
1560:10617000C77E1DED333723FB59EACDBEEC33B4CBDC
1561:1061800090DFA45DB6386E9E30BF1A31BF9A44F3DB
1562:10619000EBA56F6F699076CD12E745ECCA0C3DB167
1563:1061A0003E7A52D0A1DED019C59B688D02BDB3D80E
1564:1061B00046E78D99167199CF976F704ABB6ECF7E67
1565:1061C0001DF10CF3463C6783FF5C4E7AC79E302F6F
1566:1061D000FC52FE48FEEAC29D47B13FB07311FAF38C
1567:1061E0006DBE94B48BD817F665AFBACC787DC02954
1568:1061F000F2B963787C50E0F1C184784C073CDA2C2A
1569:10620000F6E1AE021FE1F1A7CE8BD88767BEFD6E27
1570:1062100031AE476705BEEA7AFC5CAE9FFBC32285C0
1571:10622000F1AA5ACC5F76F232EE07ADC0263998DF7C
1572:106230001C7C02FBAFDF6D3D77F863278F9331370E
1573:106240003F372BFBCB14FA1EFCEA7FFCD0477AFFCA
1574:106250009F703E31FFBAAB18FDAB152F5C91827673
1575:1062600059D9AE9B0D7C9E4F1F4AEBD9995D8E008C
1576:10627000C279268DE7EB9DD935E108C61F3E6D3CFE
1577:106280009A6FD6F7679E3D566C877ECEEC3C56AC37
1578:10629000517E70C46217D67EF59B623C8725F3AAB7
1579:1062A0007BF8C5C9D789752E1ED7C8C8D45B305FA7
1580:1062B000FC42522AE1EBC14CDBFD89E235A83E6984
1581:1062C000DFDEA3D33EE59211BE156E8CD7E41994A0
1582:1062D00087BB4209E42CC07D96594E3FEE03A4E7EC
1583:1062E000B3E1792988C21073033E1D87DAE8B869E3
1584:1062F00052A7B11FCD2319C7D14AB9BEEDBE41A7E0
1585:10630000BCB164CDF7F05C2867CFD168BD93711D37
1586:1063100047323F972CE33A3DF0BC62A77568495E6F
1587:10632000A8AD04BE5B32298DBEF3CE7A8BF8E59C16
1588:10633000CF16B6E37CB46E8AEFFCA47178C650C069
1589:10634000A391639B4136CD5F005BA6FC7FAFC6C2C5
1590:106350002960DFAC06FE1F0AFCDFD1E8A4F62D6041
1591:106360001F1A69744F42EC9E0F93DCEC6C34A8DD6D
1592:10637000CF1BB3E9BB071A7DF4ECB12318FF8ECA1B
1593:1063800009F4EB7FD6F3BE467E9F882CFF711CD8A4
1594:106390006940EFF4094055C04BBA387F2EEB1F6DB2
1595:1063A0007C6548D950810CC067FF1A63E3AA8BC093
1596:1063B0009BEE88A4E211E32B5D2C5C3611F3FCBA52
1597:1063C000EF2F4FC5F311F794958D003CE2FEF6D503
1598:1063D000402AD703CD783E35A7C6D78471BF9CDD50
1599:1063E0004A3BAE5F39BBD796E03E02B4A37383B29B
1600:1063F000DF0C17D773C9071F51F247E1E602DF9799
1601:10640000677B932389CE978E73713DE777F1FDC14A
1602:10641000D5625FBD7B969BF462F24117F14BCE9E35
1603:106420002B697FCFDDC7BE727C3FC907FF4C71600F
1604:10643000B7D2B61FF729D9026E7F4A7EEAEB3B6CD2
1605:10644000AF5F46FB737E8DE2C260F6D2FCCECC1A03
1606:1064500048F8C6F6663D7E4E4F6C9705049E56DAA8
1607:1064600013C7E935C6C719D7D94DFB99786F13E221
1608:106470003BE78D3605FDF5330ACFC7E80FF8D8099D
1609:10648000E59CC96D74AFD373CE50B90BBEFB93714D
1610:10649000BC602580E32AFC7D2E7E27F1A116E94E03
1611:1064A000D427397BDEE3E77C6C5D3AE6BF2DBAF793
1612:1064B000798A3FAA7A308F9757AEC4F8648637B886
1613:1064C00011F984859F2F3B047CF2A038B78C6F5064
1614:1064D000EFAD768972B8BD39007CB2DACECB8BEEE7
1615:1064E0007D8EF866B53DB818CF3D63B919FA5F9D4A
1616:1064F000DA9E6D83B2BBE999E6A383B02CDB3FD370
1617:106500001C9E0C76A84BEAE7600EE2BDA76C4079B2
1618:1065100094A9ACF13273F2A79C5FEDC13F1F190043
1619:10652000FC52B787DF73D383B7DD6B155C8F7EDEDC
1620:1065300078D4D7AC093991FA03D6F92BB219F929D5
1621:106540007A4489E42B78DF476BA6395FE5BBC98ABB
1622:10655000885BC0F7E6F863DCB9363A2A83EB73331D
1623:10656000CF0B89A7EB9B49256D4919781E35B44A95
1624:10657000453DF88CDDA0BCFA2E8DF4F6699957DF05
1625:1065800060277BB0469C73B52F0FAD1A817271AB3B
1626:10659000E6C7F842755E5B09DA43D52FE6F99B58EA
1627:1065A0002C4FB73AB53D738C3B96A72BCB2B445C55
1628:1065B0002A2BB52135B510F763D6E6E27E491D6B6F
1629:1065C000BBED8708EF6B2A437EFF64FFA414BC7702
1630:1065D000A816CA1807ABED38A687A0DDD549FCBEC2
1631:1065E0009BBA0EE01B37BF872650C0D846CD484225
1632:1065F0003DFFF340C348348937BB7E5DE6FA07C6EA
1633:106600009EC80F1848E75FDD7BBCD98965DD18C1DE
1634:106610004663F9DF9A91CFAA47DB28CF9285FFED39
1635:106620005060A8D8EF8572AB6BD05473DC3B479CAD
1636:1066300033ACDFE0A6F360B02E6F42FEAE5B6F0BB3
1637:10664000E3FE99CDD949E7807EE562823ED6F353D9
1638:10665000EB14AE0FC30B783C75E98CB46FD0F9A97D
1639:1066600095F946F82271DDCA0B49744E4A96AF4E31
1640:10667000F251FF955A98F6912A2F78E97CD5DF6F71
1641:106680003CA7E5BC56EFF1DC048F1CAF26361ED1CB
1642:10669000F5E098571F1A0A745BBAC36E7398F86EC8
1643:1066A000E90EB13FEF0A64613F193AC733437F10E7
1644:1066B000788DEEB8E1E5B0960DFA5FCA77F87C7395
1645:1066C000D964A45BAC9E59E53F80FEF87D49B2FCDD
1646:1066D0001FCD650313B44F8A6B9F2FFB575762FF83
1647:1066E000F1F06424C5CA4E68AFFDD5D15346F8D643
1648:1066F000DAE2FA4B9365F74A1C5FF255EBBDE98786
1649:10670000C3C057F7A5B695A0FEEF5EC07C788F1684
1650:10671000F2ABDFA46F5B5D5CAE2B2FE45BE81DC3C7
1651:106720007B81852E1F35665BF63D17CD5D4AFBB339
1652:10673000AD2E412F16E6E76C360C6011533CE8FF96
1653:10674000C3F1B7C271751F70FCE37F311C3ECB787B
1654:106750003138865AE0FB5BE1D87463C137F2A0C9D7
1655:10676000834AD8998FEBC28F795E9C9A5AE66BC2A6
1656:106770007D991F6B14D71FC678BE4BBEC68E6A6349
1657:10678000507EDA02180761CBB9BD02EF5BED63689A
1658:106790001D227F61C81EC73CCCDBC8AF0C2CC627AE
1659:1067A0001B5848FB3E729F948938A1DCE71966B0FC
1660:1067B00012BCF7EF44D23C5AA7F28373AB31AEAEB2
1661:1067C0007AC625E17AF8A02D12C6F1C20FF0F13297
1662:1067D0006C917627DA4BDEA106AE77195EAEFFD854
1663:1067E000AA425AFF36D9F247DE0170AC544A925E93
1664:1067F000413CA7E6537C1CDFE33D3B9BC4BAA5A606
1665:10680000FA0D5CA73689756B85D0EFF27D725A70F0
1666:106810001EDA113F59356DAA7312EAA1406B3F5839
1667:106820006FEE5F356D65F6245C6F7CF94E585FEE58
1668:106830004F9AB6D20993D9D4E4EB6FA4C6CAC3FE6B
1669:106840000AAB35E989692B03A0779ADD4BAAD0CE34
1670:1068500081FAC3E8273E9126F50EAFCF977A0AF565
1671:1068600012E831B5A9A71C46BD94DFA377A691DE37
1672:10687000D9F2B84AE5A5301EDA31308F30DE0FD6B6
1673:106880003D4C23FFC805B02441D935229FF6CF6087
1674:10689000DE2C09FDFF11BC5EEE77E8C36CB4DF812E
1675:1068A000ED118FAE1CDE5E9FC5CF4BEB1E37F96D31
1676:1068B00072FF4415FB7749224F453166911FEC5C0E
1677:1068C000336609FA51CEA1D6FD693D2E9F458DCF85
1678:1068D0006F7147C9EE6A4B12F1EB7E2C9BEE4D10A7
1679:1068E000EFC1521E83CFCC9B9B4BE83E3D0F333014
1680:1068F0009F3A3B1465667B493E1DB08EFA4C72E3AD
1681:1069000070B340A27C8A85C9DC1E765FD0B89FA890
1682:10691000807D83EBA847D8E1C23EB2CB7B8EE2D626
1683:106920005D692FD9C57D7A4B674CC9C27349AA3BB3
1684:10693000E0443B67BF3186F66954E6BFBEC464EFEE
1685:10694000344767507C5233020CED9C57859DA31A47
1686:106950007E66B6735A1AC10187B56A737101DD5F2D
1687:10696000F3A82BEA1C82F47DD0E647BD71704C552C
1688:1069700058C1F8E4324672BAB938730AEE336CD4AF
1689:106980008229B7A2BCBC01E3F938DDF83EF70A055D
1690:10699000E3E99F3B8329A80FEE4B65163FEAFA64B3
1691:1069A000EE8F6C4DE2FA47FA092D004F14E0D02E1D
1692:1069B0008CA4FB7C460BBB549F5B46F1324C03C25C
1693:1069C000F8A78335840D77ECBE3A47B6CD92FFA881
1694:1069D0005D28A278E2D6243E8E1CF71E71DFA02C23
1695:1069E0003B59038F1B038F27F2DF6A059C0EB0878C
1696:1069F0007C649FC4EDFFF7B68FC85E91F4E9B15394
1697:106A0000147E2EB42FFBA8FE82CDA26763E7D97552
1698:106A1000D2CB67C57D01320FC42DF4594B76A8ED5A
1699:106A20009ABCD8FD009AC8075923EE0560D95AB719
1700:106A3000F91C7E32C663A0BE59E48524C79DEB775E
1701:106A4000B99792BFE01AAE59CE81395988BE73F812
1702:106A5000ACEFB5ECF8FB02C23D796094B7A8B14742
1703:106A600014BA1C80DBBB03441ED699E47729DE08E8
1704:106A7000F6EE4127ED4BF073A2321EF675EDE357AB
1705:106A8000D1AE22BF70FA68EC7711AE4718CF66C15D
1706:106A90001CBEE9D8CE286F28C9DFC5F89D63646F96
1707:106AA000A952CF859F6F463F2AC36CDF99ECB52B67
1708:106AB000573FDFDC5C487E079517DDDB467A70A523
1709:106AC0004B96575319D6AB28FA3D6C97C387FC04F5
1710:106AD000DF07506ED88D05642FABF9E0D202DC657C
1711:106AE00078FF21EE0FEC726C427B16FCDAF92E5324
1712:106AF0009CEC8CE7782E2B4CD85FD8D25FEED7EB8E
1713:106B00000FC6EFC03C23595FE65D1F55F9773EFC89
1714:106B10008E0DEC7C370CFD3FF88283EE2591F72C2F
1715:106B2000C7F3EB9464EEBFA3DE30E773EA732B0286
1716:106B3000C89C523E1DD949963C7029AFDA85E124A4
1717:106B40009FF2BB5793F8FEB1A60528AEA65D282498
1718:106B5000F9DF2AE8DAD2685C629CB43EC61943FDCC
1719:106B6000F43D4EB1D0134CEC8F6986F91E99BEE40A
1720:106B7000357E3F305EBFC9A7D46FFB44FFF392ADB3
1721:106B8000F1E5AAF5ED4790857E680B55248FC7BCCB
1722:106B9000AF77BCB814D7D8A245286F77F67E5F8749
1723:106BA00093FBBE8813146CBBE300B26B4372684363
1724:106BB0001294AB92C53E4036AC6B2AAE5B3C6FE99B
1725:106BC00011ACC7FC8690EFE1A9A8A7669553FCFA23
1726:106BD000B9E4E06FF0BB7B671753AC40C2BDBA911C
1727:106BE000E7DB497DE9467C417B87D6C0E39EEE40EA
1728:106BF00014ED8B0792DF9CAA211F6A5C0E96AD3EB6
1729:106C0000B012E3224ECD4F7CE574DB7CB8BE3BC1B5
1730:106C1000BFC375AFC96DA378D20ABC07380FCF1BAD
1731:106C2000CC34505E9778F2B3D845F4A3762153E87C
1732:106C30005FEBBD3A7FFF71D2E9FB5EF7F71C9C1456
1733:106C4000C5FE343FA3FC1944C2FB26BD2AD7F5F884
1734:106C5000EFE2FB97F894F8756821C2AB8E76430299
1735:106C6000B89E4CB6EEDB6649FD99FA564114DED665
1736:106C70002A5D5EB44F402F3E897C5237AAFBD78AEB
1737:106C80008FF46926B767C2F2BE02CBFD48322EAF41
1738:106C9000BAB95D23E15FF2CA834EF3BE533CBCF147
1739:106CA000EBA5BBD09A9FE11C9814775F70131F4728
1740:106CB0000B12DFD827079C28274DC61803ED9566D1
1741:106CC000CDF7DB00E595D8C96E063BDC32BE7CDE35
1742:106CD00027EE073E26ECA8F87A8FB84F39FEFD67FD
1743:106CE000C27EB86FFFCDA487FBA21F1EA846FA7A0A
1744:106CF000F29981E773EC025EEF25FAED8B8FEEDF00
1745:106D0000CFE3BADA4467045DACF8F1547B3080E736
1746:106D1000C9D4D18CEC5D75101F1F6869605CD83BCD
1747:106D20002E8D0D37ADB3F70E9DCDEF77CE30E87CCD
1748:106D30009FEAB10513D999124F8792E53D159C6FD3
1749:106D4000B225DF0CFB3DDD836EE29BEE447C7328B5
1750:106D500099EB2B84C34CCF7B87E66725A24F4C2F42
1751:106D600072BEBA145F7488FB126B1137E0DFD488EF
1752:106D7000F3F6A7C53D41F393C57D4106B78BE5FD0D
1753:106D8000171D5A2019EDAAF93DFBD4013A9752E399
1754:106D90000AA44C42BE3CC6EDDE8F4AF8BD651FD941
1755:106DA000032988E78F8EA94A13EDF3F3BC40996756
1756:106DB000F591DDB77A24D4DFFE5335D044D5567B28
1757:106DC000EE340B8CFD17B46F77ABB47F94F7C03CF7
1758:106DD0007514B4AF00430FF9687EA93B8CEB6FC705
1759:106DE000EF1BDE453D74FBE30EDF7218E7D0FAB10E
1760:106DF0005F60F9E41A8FCF4171B27C05EF155FBA7D
1761:106E000036CFA0FDA3654CD81943CB4B8732F6147F
1762:106E1000FE53C69D9D74CFB8A80FB694C1FC4666BC
1763:106E200074D8DC0053C41D6CC1734E2B9B82D9E80F
1764:106E3000FF5DBFA6A005E38F999981CE6B411FAF7F
1765:106E40005833BC1CFDC18E47457FE1112DE8EFFD95
1766:106E5000D216CA53A0FEA93553CA292F7788ECFF52
1767:106E600046AA9FFFB32BBE386E204E2BCB31665601
1768:106E70003C57C2535B5E0ABA7DC164595EA2633956
1769:106E80003D9959E260F6983F4971B68E1EFFF1AE0A
1770:106E9000728C83DD3EA5A15483FEF33C3F6A290436
1771:106EA000D198D0566204F0CA5CCF03E5C919786B5B
1772:106EB0005EA01AD793919E75E5389FF47ED6FED3D7
1773:106EC00055114F65EB5BB0BF1EF8C2DB5A30BE2ACE
1774:106ED000DBBF7EDF5B2DE18131BEFF56EC7EA56F0F
1775:106EE000BA33E8DEBA231862CB5DD6ADF37C5E918F
1776:106EF0007F33B0AB88E71589F2F02E9E772DCBD982
1777:106F0000BCDCB13CF13AFF132F97B78EA4C4F53F18
1778:106F100076737D0170939E4F39CE02DB13C8518585
1779:106F2000DB4DED0E839DE74C8BC9D3F50EC6266273
1780:106F30007E9393C329FB89FFFE6E310E0B5F9F8604
1781:106F40007C3C53F0F910BFC2F394762747F0F71852
1782:106F5000C0CBD2BE0DF3D926E211DB5CEC7BB36073
1783:106F6000E8CC2416C27B7332FA41B990BE0FEC70A4
1784:106F7000C7FA7B8D8B309B3A24B805FB9B9A9533DF
1785:106F80007A455EAC1F80BBD939C602B736310DEBEE
1786:106F9000C3FD314ED283CF423E0FE013C2170CF334
1787:106FA00034FE7E4047E7C87CD4BF2331E9C6A4E75E
1788:106FB0008B3B67D3799AA55EB13FE2E3DF6794F23A
1789:106FC000BC97EE1793F9FD99CECE02F37ED6C36E31
1790:106FD000916770CFCC87E91C74A79DD1F9851D25D9
1791:106FE00017CD3BACC1B89CC96EACD1A2E48FD560C3
1792:106FF0005C6E2CF6F71A9D3FC47E7C22FE8C71B528
1793:107000008C1589E92FD7C19A0B060BF7EBAD2F63CF
1794:10701000FDA7B3F0D84BCF2BD69FD56FECDD9F2EBD
1795:10702000E2F802EF9AC0BB9E18CE7D924F01DF3688
1796:10703000137F2D10FC26F703CFEE1AB1C9BCFF2A2F
1797:10704000CF0D817E7E1A7F1F21DC9944FE4AB11646
1798:10705000B80EDB1777A6D1FE80E40FC91792AE1DDC
1799:10706000690D146FE97E44A1735CF1701D9670ADDB
1800:10707000E7F7F665CD0DA9E67BC6A53C40FF1DA24E
1801:10708000FF7113497E1EE3F20072732BCA2FDEC319
1802:1070900082F3F07715997F8F40C25F84BC389EE8F9
1803:1070A000C8F1FF824BE4AF70BCF5C67FFF4BD03315
1804:1070B00097E859DC7980E659D387DC5679BD3C8F57
1805:1070C000ED78D4EB83766304FF77B4BF4FF78A750E
1806:1070D000EC5699E2E3F346BD55DCA38FC7BF3C05F0
1807:1070E000F471564F19F4A50FE9D0A33FA34E67AC36
1808:1070F000FD77BDE3A735A3BE14F7F6A6AB7834370A
1809:1071000006C79FDCDCBE9A184A1CC76AF07A2C7A44
1810:10711000EC916553D8FB30FFABDD3CFF6A625798BA
1811:107120007E5747CA75BC9EEAE7E174343CFF97F48A
1812:1071300094EB127ACA25F5147F7F186DDE31B8BE44
1813:10714000761529603757D80299E87F7D70EC8774EF
1814:107150003E6591C8CF1985F939B86E1E0FD2BAF2C3
1815:107160000956F23C9D819E0CCCD7B6E6E9B02DFCC9
1816:107170005C6B3C5FC5F8282CEC370187580FAE7765
1817:10718000743DCBE3195679966580B3CE36C454EF7F
1818:10719000E6EB96A403D0BB99EE3916727C6257D603
1819:1071A00046D4B7AF7B789E4DFA90C0689CBF944B95
1820:1071B0005857059FD8BE37DBCDF5C6EC04FC3BD94C
1821:1071C000C3F5EC82F59C6F3AFEBDF43AC47BC7EB85
1822:1071D00069A9CB4D7AA24CC8B1EC57EA21F99DAC14
1823:1071E0009F22FA9BE6E17251E6E67C877024CA276B
1824:1071F0002833ADAFC43FAD9C7F60BE61337FBF2EEF
1825:10720000FA8DE153ACAB02CFB53AE017F0B7CD1E23
1826:10721000EE8FF949C59D36EAAF62B787F2322BDAB5
1827:10722000391E2BDAF6DBAA4DF889EF6FA987CBD18F
1828:1072300046710FED611BF01BE2DDCDE13BBB2B87FF
1829:10724000F4E7220FB71B2EBD6E5C9E9ED928F2314B
1830:1072500080BE94BF58FBD2808D563DCDFB4BEF17BF
1831:107260005A81E7F0D21F667ECC29033C45F1DCFF52
1832:10727000171EA177F4808EE76DBB1F61B41F3F6CB2
1833:107280006E60B40FCAF541F71805FA2B68E37AB8B7
1834:10729000781DD83128774EB92EBCB2DD3CDEDD1E1C
1835:1072A0008FE51C61C57A8EBF6160FF3C8D4FE8E7BA
1836:1072B00059B2E3393C271E6ABF06E34EF2FB564142
1837:1072C000FF4BC1578CF08D8BC187FD53FE8A3BB8B5
1838:1072D0001CFBADFBCDCE01E67E1FECE977FE14175B
1839:1072E000EAF9B5B0EE9074860EE2B98B8A3DA90634
1840:1072F000DE9300F26C437F478E5BA1C9DFCBE92AA6
1841:10730000C67BC20B7AC69174FDDD33E6F96FF6B821
1842:10731000FFAEF4EDD043349FEE1D00AF2F86978E65
1843:10732000F679CB5DB84E1C677E5C2724BCC3E6763D
1844:1073300079315FA45EAC1F305F1BFA2FE93FF5B1D6
1845:107340001588B7CE29744F423C5F4B3A0D675C7E7F
1846:10735000A49F361C03FC50DEE32912FA87919F7B21
1847:10736000E2A5BD4FF37B2D385DEAE7723A767942AC
1848:107370005F7832627208FA9CEE2FAE58D7A38FDA8C
1849:10738000F9FBCEDCB980CF5F7BA49C5BE9921E6CDD
1850:1073900077D125B382AFCFBC382AB28AD399C6EF52
1851:1073A00068F7441405CFD13634A1BF2DF504C2636C
1852:1073B000CE5792F0F4D091011D47C5DE0F9BCBFB59
1853:1073C000AB0779473EAA511B941C85F400C557B3FF
1854:1073D000500F4039AB9DB7637BF8FD0D124F353729
1855:1073E00041A7E077FE9BA790E621F19535376AAB80
1856:1073F00029C47CE503833F30D1F9A8D82F40BCCC09
1857:10740000267F83EBEB1A353810FD5696E5A073A85E
1858:10741000B00E917E39EC629A0BFA7B199EB82E4D14
1859:1074200055EFA0734253872824C7A00164BC877E10
1860:107430008FEBFA6B9379DED65FBE3F14E79991CC60
1861:10744000F910FA718A7E9CB40E8AF5E05F73C1AEC2
1862:1074500053627AF9B0A2503F87FFE1CA4D2B9418CE
1863:107460005F627F683F1D56660DA4F5B22343240773
1864:107470007559F2C97AAF675DB9586FF617D1BF8BEE
1865:10748000F99BCA3DD380A7264C6F8FE295D34D61FF
1866:1074900075DA3FC1B853C1DF74A1FEF472BE3E9CE1
1867:1074A0001756BD08D73085EE573E92142AE4F7F4FC
1868:1074B000F2713245DC2653E42BA3BD80CF8897EBD5
1869:1074C000FF9129FCF903F1CCF4268EF3AC13F5F50A
1870:1074D000E25EEB552589F3D9067A154BBCE57AB106
1871:1074E0006F81F7FF7AB9DF29F26CF93E07D8F7848C
1872:1074F000DFD27BE6D2BEDDE79D37A4F0FB1BB83EB2
1873:10750000F85009FCFA26059F41BA3F2FFCA64AF91C
1874:10751000EF1F18012FE637D52625CEC32E11F3AB6A
1875:1075200015F3FFA891DFB7B000F7D3407F8CF5F2D9
1876:10753000792C6AFB7639D27BD13A85F6D3E4BEBD8D
1877:10754000A46FE506D5124F5F80FB69FDFE163FCAAA
1878:10755000DF871F35CEE247C971E3FDA9138DD996A8
1879:10756000B8FFFCB621E29E0BDEFE76E627B86F6F11
1880:107570001D60D9FF63AD1997770F28F84FE184F0AC
1881:10758000E9A46FE5FB138D4E1636C3F1F150CA7BAB
1882:1075900018E80DDD8CF48DC191CCC26638D864FE3C
1883:1075A000BB572E1E77053B9CFB2FF0DCE8263B9D4E
1884:1075B000EEA9ED898381FE3052501F95CCF38E8F5A
1885:1075C000F90D52BE6A2627F61FC6093F779C9BFB22
1886:1075D000C729C7A53F9DE443BD28EDF1F8EF1A7A0E
1887:1075E000F8D66A4F5E2AFE00FC1B36FB47F1FDB65B
1888:1075F000887EBF3EBFE4F7C12F05FF257E77F1E40B
1889:1076000010C5F7F0F221CC45995066F5831EF5F2CE
1890:10761000F5FC516F327D2FEDEA8AB9D6768F63BBC8
1891:10762000F1F84CBEAC788ED97E5786A0FEE3FDC93A
1892:10763000DFDDC93BF53AE57FFE0EFD44E8EF584A31
1893:10764000602BF2C71A912FBFF1AF07B36F477BE8EA
1894:107650005FECB45F5FF2D8D21598CFEC6E570C3A5E
1895:107660007FB4DB2A0FDF5CD63EB802F0D12EE8549F
1896:10767000E3E7F3A8F147F5A16ECCAFE6E30F6CDFCB
1897:10768000AF68267E1B58C9DBBDE4B55BE233FBB0B7
1898:107690000CFDECF11AD26FD93F231DDB0734B40384
1899:1076A000FAE3EFDD003CFD1B18D9D1FDC729D4FF5B
1900:1076B00037C76D54F0F7B7E43C5B6DB30A0DF8AE15
1901:1076C0003533D98FEBCD00237408E5ABE69D681404
1902:1076D00097C709EF746AE85F8D320287F1BD9C9706
1903:1076E0004F35FAA3DD9EFC0E87AFAD27AEC4D71B86
1904:1076F000C6560B3B7413B7C7547694717B9CD6F572
1905:10770000CCE5C369DD93F3C94C13EB46260B61FE50
1906:1077100031B46F253BC5C9D7FDCCE5FCF7F2243D5C
1907:10772000637EE68831E8670E5913D5E6C3772F6D7F
1908:10773000B025BC5FE37D817798C7BBE6795C4A5F83
1909:10774000C976F63EE28C92DF93A727F6DF19BB9F3E
1910:10775000EA4B1E4BBF85E4B259A7FB1025FE471923
1911:10776000C1CF109EFEED1B15C4CD0991577062D597
1912:10777000D30ADA91DF5FCC0C35013FF5C8EBB29D3F
1913:10778000832B4C7A13FA277A6C8CCB1397F116570C
1914:107790000AF77FE61B4196329EF276C97F5EBC8572
1915:1077A000FFEE469FF8B84C7C2995DC2EAF99C37F3D
1916:1077B00077B4E4318DE85DDDCC7F77B066FB0E3ABF
1917:1077C00067C77EC4FC28EF35ED3B940A18B77AFBF7
1918:1077D0000E6581097F036A22945F7D8547EE3B44F5
1919:1077E000C96E8EE76B8C17A09D72C4C5E5FD7489C8
1920:1077F0003B8CFB10A7EDA11A6C773A27D98FFB942D
1921:1078000012DF2FEF9846F71D78763AA2F86CB56D27
1922:10781000CA7642BBD691BA1FF96894111A86784984
1923:10782000D3821DF87D6ABAC78FFB183E071B43EB56
1924:10783000F565E261421C3F4CF81197939B52BC42A4
1925:107840002E18E53D5D9BE291F613E9A723763E8F66
1926:107850009D8CC31BF106C6A5201F1EE5BF9BD0BF94
1927:1078600026AA60BE48FCB8317E0A5C8DF05F3E9C63
1928:10787000ED3AEAF56AA1674A1EDBA2BC6F827B067D
1929:107880001A55C89FDB372A1827837AD233D09E61D6
1930:107890005E52FFEDDC2FAD86FA0526BD22E7914052
1931:1078A000BF04713EEE773A0F71FD12E5FB0202DE76
1932:1078B000787ACE4DF1D1F8E5601ED07B3D3C1CFDC1
1933:1078C000E223F949D49F94F778F99C2BF8BCFF8602
1934:1078D0002D8ACD4DFB2764474AF864BB6329534288
1935:1078E00088AF09D33B090FB51B349ACF543D38F408
1936:1078F0000E933CD4A5703BEEC04DEFD2FD3FEB7E26
1937:10790000718CF8B116FC69F227DA8EE937E0BA1209
1938:107910007E52C5FDAEEBB849C21E12F7625DD7C1FB
1939:10792000F56F6DC70E0DEF91947C9A77EA00DDA795
1940:1079300055DBEE60E84701FF2D45FCC4F3A9C48F79
1941:10794000D4AF7DD113F410F793C2BA88E785F2D093
1942:10795000CF91FA3922EC51E6E6EFD78A79C5F827BC
1943:10796000D49262D1AF2E928BBC53630E605E66AD33
1944:107970005FA1F392E9A5E277C84C7099FDBE78FD4E
1945:107980008871C320F7E373679BCEA9F5E879F1FD11
1946:107990003AA4377F1FE5EF593EAED712FE78FA457D
1947:1079A00053B85E4FC0678FE13CE2D731B9AEE73DD7
1948:1079B000BE53C3FB9224FF5C877437F1CFF6147E6D
1949:1079C000EFEEF6148DFA7FA884EF3B3E64E7EBD729
1950:1079D000434D4ECAA37CF9669ED7E5B9458FE2F3C5
1951:1079E000B06D7E0DD61FEECFE168B52DA773772061
1952:1079F00097CF205D0FDCE4655C3F727DB8EE79AE19
1953:107A0000CF6AC26EF2736B42DFA9A07CD774979FD6
1954:107A1000EE010D1DD26FF0F4E62BDFCEFDF4FBC7B7
1955:107A2000D7B573F99374007D4AFC25E541E23586AC
1956:107A30004F8E77294F921E11B9CF03FCC2ED23EE72
1957:107A400057158A739195CEC011BB0FFD161E7F2D61
1958:107A500014E72365FC75BEA04B912DF81ACEB357E1
1959:107A6000FCF532FD83EA65AF8EC0DF0FABCA3E4A3C
1960:107A70004F29B7E0BF5AE4FB6D41F703C25F3C21D9
1961:107A8000F444F5B87692CBEA0F1A489EDDD3B95E7E
1962:107A900073BF63D5C78CDD27E6BB86BE9B9ADC5ED1
1963:107AA0008EFBC7537FA618E8D7F705E7223C2F8641
1964:107AB0007EDE8683DE79885FF13B52F25CCD1F85E6
1965:107AC000DE39BD4D15BFABD9A05FCCFEBE547F2CB7
1966:107AD000FA8642F79A08DFF0F4F6D2491FA27FBA7D
1967:107AE0002D857EE7E4D3EDDFFEC187E9F83B22D7A1
1968:107AF000FAD14E485F1124FEE9CE70F937F178ECE7
1969:107B0000748C5735B51FF4E2399C4F9EBE6A0CEA5F
1970:107B1000ED2483CBFDA9E7D5658897FF0324F17B8E
1971:107B20003E008000000000001F8B080000000000E5
1972:107B3000000BD57D097854D5D9F0B973670B9949F5
1973:107B400066924C36B24C02045412262161916D9219
1974:107B50001016599CB014906D640901421220ED87F3
1975:107B6000D57E190CA5C823355A1770EB049762B55A
1976:107B70003568B441830E0808553F47848A15EC8860
1977:107B80001441423245DBE25F5AFFF3BEE79CCCDC96
1978:107B90003B1350BFDAE7FFC3E3733CF7DC7B96F798
1979:107BA000BCFBFB9E3377FEEAF9B1A38A0959ED9538
1980:107BB000120D8490CE5DBFFC577A1221D54FD65955
1981:107BC000245A6F7AF6757DC04488C6DBC29EEF8A60
1982:107BD000B7C07BE79FB8772C194CDB5B9BB0FDF3FC
1983:107BE000275AB0BEFF57CFBFF67FE87B35AE3807C8
1984:107BF000BCF7F98BFBF4F0BCC6AD75B6D292B80FEA
1985:107C0000E8679B69E9794626C9844C21ECEFC1DD20
1986:107C1000FBF4F67C5A6FA5A3D2EFC95CBD77400E8A
1987:107C2000FDAE75B776A909DEF0125242C7FDD5E266
1988:107C3000916EA8B7DB08490B3DDFA2271E63022D1A
1989:107C4000FB101243CB0BA5268F144FD75566DA02D3
1990:107C5000E585DFC4CCF5D2EF6AF5813C2BCC6730EB
1991:107C600071423DD5A2C1EF6B5AD7EA6A4DF83DF695
1992:107C7000F3071D2150E6130F393B88AE9F9027BFB5
1993:107C80001E0AE3FD96101BBE3722A68890390B3ED4
1994:107C900091603EB183EB75AB719ECFB276BAEAF0DC
1995:107CA000F6610D743C3AEED7F0372E5416594C3825
1996:107CB0003E05087E97DE56996187F527191CB07E30
1997:107CC000B1BEF46A7793993EBFA9C1ED90ED84BC33
1998:107CD00072EEE884BEB4FEAB41D250195E97A5C5E2
1999:107CE0002EDA7FADC784E3ACD950463EA5F31D0F15
2000:107CF000BB48BF4FB690A41BE97A2AB424C9042517
2001:107D000021C77445D0FF53D86E371027A178607F04
2002:107D10007DCE531BE9270FEADC6925D0CF16BFDEE5
2003:107D20000EE5936CFEF47B8BA908FBB3DC08DF1B2C
2004:107D3000C93AF8AE7BE3D4A4AD12F6EBD72584E6BE
2005:107D40004D48306B763EEBAF18E034C93317DE2771
2006:107D5000763DAEEF737805F7D153B0301FCA6D6C26
2007:107D6000BE1AE2067C49D6D312E1EACEA9A478B3C2
2008:107D7000C452BAD052122A93FBB076355C5B78FBC2
2009:107D800027162796645722212323DF13A580FFFEA1
2010:107D9000395DFA001DF7FE573F41BCAD05BC85F1CA
2011:107DA000DD67F4B00E81B7CBE013BA0F0FEEF90424
2012:107DB000F17659BB84F0A96D2FD52FA5E58546270F
2013:107DC000F9544BEB1CFF1E94025580D79E3D319613
2014:107DD000A7289CBA047E367F7256A6CF73DBD3ECFD
2015:107DE000123CDFC3F0F4A046E301381DDC79434BBD
2016:107DF00093143ECF8D081FA99A209DD4D613AF812E
2017:107E0000B6973ED6707432ADAFA9260E039D57AD1E
2018:107E10000A8F721E3FBD19F0C55A438A63ECB0CE7B
2019:107E20008F27F4A5FDD7D69012A0D3F4F1CE3D5004
2020:107E300027ED121900F56AD73218FFA6A4950E99FE
2021:107E4000F66F1DEF6A83F16E4A1AE390697F0F6641
2022:107E5000B66E36D2764F05B13C0570D0359769695C
2023:107E6000FDC10ABB854292C2EDC954682783F48ED6
2024:107E7000A7008FDDCB6AA0BFDAD4F90EC09308FA51
2025:107E8000DFB37110CCB7D6DEC71143DF9FD22E21EE
2026:107E90005E118F89C0FC6B297CA13EC53BCA0BF3E8
2027:107EA000B9C8E127E0D8A5F32F82F975BD64201E7B
2028:107EB000DA3E653CC357EBF856E41F6FEE997858ED
2029:107EC0002A08E1A5F965830FEA095A8BE400BE444C
2030:107ED000661A603E4BF97C9A7564B18B7E679DC4CF
2031:107EE000FAE977B784FCE259A0271B941A5EEA39B5
2032:107EF0009E37B3D2E22970517CB8C8F71FD184F6FF
2033:107F0000BB9AE3CB9A653EA4A79AE7587F490667D8
2034:107F1000E1FA30FC4D2A2748C7BB62C8E24AFA7C26
2035:107F20009795956A7C7D8FD375CEE3EB70DF97D202
2036:107F30007D877D4DBF9B3E07B851BC00B8D17D44C5
2037:107F40003CB8296905EEDBD2BBA55B701F3DC308B9
2038:107F5000D46D896C9DEAFE8FF3F5ED8A71154BB4F3
2039:107F6000BFA0CDECD829C17C9C9A18A8175A1D3BFC
2040:107F7000097CEF7A12C6B3A5C4389AC2F81521AEAF
2041:107F8000620D1DE75CB299EDB7F75DED8C7CA04703
2042:107F90003BB6DB64E223C87F48AE2B3FF45D453F30
2043:107FA000D65F05EF6F6AB3A780E43278205C383C77
2044:107FB000BC1BFBCC0DE7A71F717878AF2373816FD3
2045:107FC0001CD4139311FAB7D071687FC93B473DB1F8
2046:107FD00015E7D784EB3A60B1605991E82AAEA7FD66
2047:107FE000D9FAB91A002E629D6A782CE1F0D83F6761
2048:107FF00051A106F07896C9017477FFABD212C46B19
2049:108000008F911225E03DA34342F703E882B8B5B84B
2050:108010001FB5F52E6F74BCAF443AAB4D8A71C4489E
2051:1080200088F74E947F1E9397E13D937FB19398BC60
2052:10803000023E59991FC90F049F01F906F82CE8A2C6
2053:10804000766C200FF6F79BF2952E1DA3F32E0A07F0
2054:10805000A0234137E65718BD6CDD682F85F6AD9437
2055:10806000EEC3F7FB90DE83F47B28B78F03FA8579A4
2056:10807000BACC21FEDED7E28AB752F8D56A7C9BB52E
2057:1080800039217E5CFBCA5D79EE28F827F8B151CB27
2058:10809000F89CD11BEB65FDB2F18C14DCE6222C3D83
2059:1080A000208F623730F8A8FBC9B50AF96AB49CA1E1
2060:1080B000727C3ADDA4F87E844CD2B873613E6B8C3E
2061:1080C0008143746749D686A01EE6910CB20BE8671F
2062:1080D00067AC17F856723271BF10A5DF242BE3038B
2063:1080E000625F9A13181D25C7B1F7C75A995E516888
2064:1080F00065783991BF2FE62FF0DFAE717F42E4DE65
2065:10810000E598F88ECE0BDBC57CE8F75B0893BF38AB
2066:10811000DFE43BF3766E0DDB8F101D5D5704FBD45F
2067:10812000EF6E9F768929348E90A7EAFD87F903FDCB
2068:10813000C07A2A07F7FE5EF33E468F6A7C9CCEF536
2069:10814000299395B0F774BEBF225DAD35939D30BFC6
2070:10815000EDC49948E755F7DA40460FCE601EF4FFAC
2071:108160006682FB19D88FE1E3399ED3E733E8F3D574
2072:108170005AE231D03D59BD4BE70D1819CD7C4DFF6A
2073:108180001B97C0FAEF361B3D32C5F30F13DC0BAD66
2074:10819000B4EE29230E1FC8A51F53FE01F4477C250A
2075:1081A000C05FEA48200EE05C2BFBF308DDFF2BB13B
2076:1081B000EE25F0FE698D3F0B9E1312407C3D191396
2077:1081C0005740687F6D7A5FE67FC1BC8FC86427ED3A
2078:1081D000E712714E81755CF26B123C741DA7DADFF9
2079:1081E000FFCDABF4AB85AF5E5C783B40696BECA236
2080:1081F0004768B9C0A8316A8786E071D21C9DBFFE6E
2081:1082000098E385AD89E95DC18D062FC047FDDEE4A9
2082:1082100004F65EDDE574E2490C7FCEF8689D36A871
2083:108220000715B2EE7216F1D0714F6948756B143DA7
2084:10823000F39495F1AF368AFAD1DA4F733CDBA5237C
2085:1082400079DB613E2D940F02FCB476E417D5BFC8EC
2086:10825000716CA5D5B6DCE021D023820F48C8FF4F52
2087:10826000EA18DFA17FB38CC342F213D413D00FAB53
2088:108270002D1E9F86F28DEA06B34F2EC0E7DAD1B0ED
2089:10828000771E8B16F8E0122E1797D6BFF995144774
2090:10829000DBB5C4389A7EF79969591C8885AA1FAE48
2091:1082A0004F06E53B654133D22768B4A08F4BCEA97A
2092:1082B000F2D7B157D3E7B4A8B723BED0FD9D96E05F
2093:1082C000F2C27E2F8867F05EB03ED6EB09E37FB343
2094:1082D00038BDAAF16C17E0289DEFC712932BEA7105
2095:1082E0005E4C289B0AFDFEC3EC7A16F077C1FA8B30
2096:1082F0000A7ED625059E7E04F071ADD9F114EB36C9
2097:10830000CB15462F87C5B89735B87FDD85FEBC0DE8
2098:108310003980F7C1AC0F289C5777182C1E3BB4EB63
2099:1083200015FB7FBA9132BEBC30F974AEFF04620215
2100:10833000F83B36033E2CDD124B3C8342EB00851BA1
2101:10834000F0BBF632C17E9674BC7902F879AD368006
2102:10835000F8B3C468C2FDA9BDACC579902DBACE8072
2103:10836000F89ECADFC438E721589FE767A3AD676F5F
2104:10837000A00F53E8735CBFFB6D78FE506C1C71322C
2105:108380007AF10EA4F3BF64B4C7275078D5E9297EEB
2106:108390000CC16E5CC630FD8A649895FBDF71E42BDE
2107:1083A00098CF32A35B0FF27EF9DC7A3DD0E582787C
2108:1083B0005F896570F8BE8F96BFBEE19BEFFB6ECE06
2109:1083C000874EE9295D44A1C3D39C2E26034ED2F2E9
2110:1083D000543AA39F5359A4FA0528AFA725FDEE549C
2111:1083E0002EAF17B1BABA1F7D02A39F53054C5E7919
2112:1083F000D631F9A17EEF32DFEF6909CE20C04D3CC6
2113:108400001F93C09EBF98E0FC02F089F2C3BF737C4B
2114:10841000F559697F0B5E3720BE924DC13CD8C79E8F
2115:1084200075E5F1F926479F57DF04B63EDAEFBF60E6
2116:108430003CFA9E13F5F6D762BC608790A9943F037F
2117:108440003F5E9749801FD371F50936ECD767C5F7B2
2118:108450000CB80EB285F2698AB7DD2576DC97ADA53A
2119:10846000143F814FEC3558804F087C127814813FBF
2120:108470009C8F09397C33C86119E570624209CA6171
2121:108480003DD039ED51CFF4C1FEB8DF8867F237DF58
2122:10849000EFBD46B68F94DE3313703C5F7E38BD0966
2123:1084A000380B3E79AA8F122F9EE27C70007FAF07B7
2124:1084B000CE09ECBDA47E4CEE09FBA084EFFB335645
2125:1084C0006529E4D8F0494ABDE4198E6FCF58E3C45A
2126:1084D000BE1402BC85FC8BD8EF47D97ED3F786C18A
2127:1084E0007A1618828B12A9FCFA01D58BF445F8DDB7
2128:1084F0006EF82EC24F319EC9DDBA7566027A81339D
2129:10850000C1C2E05F1CCC82FEC8A020F2A12584F28B
2130:108510001BE9DAFB073E81344A23D3E298DC9164FD
2131:108520003A20D0CC206287FE28BCA784C35B3DDE06
2132:108530004968A27AE0EC04497B16F6A89014C27E42
2133:108540002D7AEF0BF342DAE5458BD1A3A172E487D4
2134:108550001AF73CE8A7F3B623A8F79FD4FBF29A4D8D
2135:1085600051DAF5BEC71F9242ED8B9F913D7ACA67E3
2136:10857000DAFC9D0FCCA178B9C42F3B60C82577FCED
2137:10858000F59DE1A04FFB750EB06BA93E71B796CE7D
2138:10859000FBA486ED27A957FA051A38BD50BD4A4BF2
2139:1085A0008685F893D00B5612DF00D01F9612A71EB7
2140:1085B000CAD36B574C25145ECB4D0DC8B7CEAF9BBD
2141:1085C0008CFA7215F160FBD22DBAD3E1F26479B363
2142:1085D000B2BE62BBB2BED2ABAC5FF811C3B748BC8F
2143:1085E000677A98AD3CBA7EF118A7B70BFAE8EDDBD5
2144:1085F00038DE96FF6CEA4348FF7E1D31503C69D857
2145:108600005B9A42A2BC2FCABACBB9C41B268742FAD6
2146:10861000471EF10E85FEAEA03F10FA013BB721C602
2147:108620009902F6C885B2E8F37880CFA3EE729F5E18
2148:10863000FA8DC37E2FE45E7D9D75978DF85EE4F71D
2149:1086400026EC97EA5951BFFFAD805342F4F65FF72D
2150:10865000CC2F15E562E83BBB4AFFCA40B95A77D92F
2151:10866000A290D3A1F6242657B99F80EEAB07F562FE
2152:10867000AEF7518168391B1BE263BA3E6C3E826ED5
2153:108680003E9588310DFD6AF7723BC25100FAF1A7A1
2154:10869000A07F01DD4EB4BF16A0535D7AFBC83C6DD0
2155:1086A0006E88AED4EBA1F8F879204C2FD89F604E9D
2156:1086B000C2711DC401E30A7A58745B45BC9BEEDBB2
2157:1086C0009FEE284F710F0EC73B0F8E5FAB177A9F3F
2158:1086D0004921C7894ACE2F6D3F827ADD32A32B0F05
2159:1086E00098D39FF7DE867452455CC9401FDD7B0737
2160:1086F00066B9FF17F25DCC67A6E7561DD3E3295094
2161:1087000029DDCEE0F399D9C1F44A8DD1A9C3719C7A
2162:10871000C46E4946539DCD9732592DAD8FE9993F8F
2163:10872000381D0919CDE72FC1F714BE63784996B8F3
2164:108730005361DE0618978E1743BCA950368D74D846
2165:10874000A11C27B9B46C1E5EDCE709A43E03DED78A
2166:108750001803325B279D41327CDF032FAC9B797D70
2167:10876000D3AC4B8B96C3739319F98F9ECF434EA412
2168:108770007C7310F22523ACDB60F29D87759979E953
2169:1087800029637ABA2797389AE86B7D482B81714D17
2170:10879000A68B1E58AC855824A8C7582EF9C05EB9C0
2171:1087A0006831793443909F1A12819F4A6F57C1BE36
2172:1087B00050FECDFC57BDB56B7D682709FE98C0E71C
2173:1087C000D7C4F9631A61704822AE7D4E8AD7F799F3
2174:1087D000ABA6923810E36E1C7F47DCA4C3305F0069
2175:1087E0003CCAF949DAD3E172C6E6D22AF85FCA5C1C
2176:1087F000653DCDADAC1BC9490BE8A392CF95FA7589
2177:1088000022DA7F83C09FA3E3FC66561F362F813F89
2178:1088100079899CBF733DC4C5FD01B5097A827EC4C8
2179:1088200064A3910C41BD242F91F9073EA63B4DED69
2180:10883000C620F2F3C271CE010F50386F7E4F76DC46
2181:1088400049F769B3D9BE510BFADE3C89E9F7DA562C
2182:108850001FF8875A16591D5BA13DC679CF3FA1FD70
2183:108860003D9980BE55077EF94478D1520ADFB56440
2184:1088700059F0BDA4F220FA53837711D4A722F0F463
2185:108880000A9D3F85F713880CB49F6596D5CFD1F725
2186:10889000D35CB10E29ACFD4968A7F394385EC0F3F0
2187:1088A00071C3C0FE657FFD3A0AFD4EF06F386594D6
2188:1088B00087751D856F98E83CFAB90B1D80B6FD3BA6
2189:1088C00078FC25C9E065F1074AB5741EB38D6C1EAE
2190:1088D000751DA53797D0F6FEFEA104E210B187ED15
2191:1088E000F36BA04943ED6EF8AE2C16FD5EC7B8FFE2
2192:1088F00089707E305C456FA342F88FED85A24ED51E
2193:1089000006E730E6D6C07A12A30307117F8C3E6FCC
2194:1089100024A13FF8BE3CD41FF2A3F1A1E610BDD1C3
2195:10892000A515191D4D35F4BD839513110FEBC0EE40
2196:10893000A2FB315CEBDB07F43D8A9785BC244B9AA4
2197:10894000119E5B37FAF6EB72C0D5E292A13ECC7273
2198:108950005713F43746F2619935F7DE2640AB7DA018
2199:108960009C217EB92B801E3757100BE85F4D231CCE
2200:108970000E0B6D9A3397F96767CF357AC1DF3F5B8E
2201:108980004B585C4CEBCEF901A5AB1F2C607E61A867
2202:108990002F08F3BB8838C8316AC7EC8EA20FEC4BA6
2203:1089A00064724A7C5FB749AF8837ED4D3461FB1381
2204:1089B00089133C89A8A7B97380FE3627727D6C1095
2205:1089C00019047C258CEEB722DD97BED51B5F50B60F
2206:1089D00073BE30DBF90B1DEAF19C3F083EEC023A16
2207:1089E000A4DFF925A70EE0F7611983FFD1D295C85E
2208:1089F0001FE610373EA708A27385FB9B2685E94337
2209:108A0000749CD92EA57E3467AEB22EF0558C3BCF28
2210:108A1000AD6C9F21F4DB494AFD76C17F5DB1A21C9C
2211:108A20004C797ACDD7D9185F413F411DDD27165FBC
2212:108A3000D1B278CB26BD17F4A4BAF6B5076D40477E
2213:108A400077104E47BBA56518FFD92D2D0FD323FAFC
2214:108A5000D67825E0FB03E99AFCB8AF418C2B1DD3F7
2215:108A600079F741BCE5D84ABA623ACF37F42C6E792F
2216:108A7000208678C06F2DF0D33C83F95D291A63FC02
2217:108A800024C312EB007CDAA229423FED9638B323CF
2218:108A9000DC2FBA7523C5BB30FFACDDC0428CC77A72
2219:108AA000B17F8F24323BE74189F9C93DF38C68EFF0
2220:108AB000D9FAB91471099B4C4E80BFD19368473CD9
2221:108AC0007A90FB4320AE3794965E89E9333DDFCB45
2222:108AD0006413FA2755FCC796E8C0B8802D3E1FFDE9
2223:108AE000FB733B0A9F447E638A710C9042FDCF75F5
2224:108AF000B7689783FFA0A345BBCC14C2BB93025FAA
2225:108B000063492CE06B8FBFEF0503FAFB7EA871056C
2226:108B1000002F6BF4BE02A2C4E7C0D5E4D80A8E2FA2
2227:108B2000BA32D7BCE5743EDDEFE899FFEB0E82F474
2228:108B3000FAE21E2BFA2BB53308CA934DA504F1A116
2229:108B4000BB4542FDED336B35DA019BA46694135DA2
2230:108B5000091370FF56990EA05D5BFDA8EE74B8DE98
2231:108B6000B5EA49657D35F1A35D5DF35C043E23FF05
2232:108B700012FCB1B64DF91DE9AFE48F859CEF17B932
2233:108B80001C332B60EA731DFD985D4D7C06BA8E92F6
2234:108B9000B7F5DC4FBC80C94DF2B404FA56B7F99C66
2235:108BA000CCE89CF1E312DE9F5A0E95707D6A2CE5AD
2236:108BB0005B607F0AFD88BE8FF5039A0E3955139AC4
2237:108BC0005731FF4EE865826F8B7D291D41C8088AA9
2238:108BD000F7B9497C5F73492EEC2BED1FE901504238
2239:108BE0009F80FD7BC06E1BC5C7A3FBEE0139EBD197
2240:108BF00018BD80479BA57AE4D346C2F9B5E446BECA
2241:108C0000FC3B8F4706B88E24F533A7D2F7461BFDF1
2242:108C1000B1000F8A0F7949B6109E34115FD66E49A4
2243:108C2000812FD8DE697D2B2ABE08F9E2FB90E91777
2244:108C300053E88AA19F0A08F8D0F280C4ECC289A642
2245:108C4000FBB5F0FD5B9AC9880F9388570BF3ABB067
2246:108C500028F77962AAB23ED91E8107328CEBE4F084
2247:108C60009C3248D9EE147C8D28F95A0EB982FB4CFF
2248:108C7000EE3AF443F00BC46E208340EFA01A22D2E8
2249:108C80009B9A1F4C4AEA355E3229294ABCA49BFBB9
2250:108C90007F6F2481AAE7A4487CE93AB8414E0DC30E
2251:108CA0002B81C7AFF0FC0AE9751E972D66FEC090B8
2252:108CB0009C67F8328CD76E047CA3EFAF1478924D8A
2253:108CC000B2014FC6B4C7F8640AD742DECF8D8037F1
2254:108CD000452179EED398ECFA5CC00FC716598ED4B3
2255:108CE000DB9313EC882743354EC49312E24884FD8E
2256:108CF00019616C6DD2C2FCF70CEFEB3629F0620DF6
2257:108D0000E28544F102E92A422E2ADB557823F6EF68
2258:108D100030D79727124F7F188FB2B103A02FFB7265
2259:108D200018DE541027E2C99BB99379DCDAADC57E11
2260:108D300088521E961B9578A0C62B3AA2267C5C35DD
2261:108D40009EF58637D98037421E265E1B6FEE49326C
2262:108D500029F4EA30BCB927A9A477BC51E38BE027FA
2263:108D6000BB632CE5A097D6554BC88787BED3BF09F8
2264:108D7000EA03D7E460FECB6EAB03F5D6BA7AD65ED3
2265:108D8000EC77CA901FD3AF81B7E7B8CAA15EB781AD
2266:108D9000C5294A8EB1FC99FE77B0F6C23BEBDF30B5
2267:108DA000837CF7B0EF5F39BF598EA3EDDECDFCFBBE
2268:108DB000D2E672A8D76D61DF7F067126BABFC34EB7
2269:108DC000789BE0F97577E73898F9C9F4D9711C4FA9
2270:108DD000774B2FBC81DF35B3EF561C32F621A80745
2271:108DE00033BD752C5FE7B847D93A933EBD69929D74
2272:108DF000E2EFF2A007F5A6B39A9A61C86F7AB13391
2273:108E00004BA5E60C2829DE209F711A295EE7B238AF
2274:108E1000E44E3AC45B49CC9F21E277904F109E3FCD
2275:108E2000F0561293F7E2BDE404C2E2CD0F9BD11FCE
2276:108E30002CE28BBE87880474066BE4F23F6ABC7137
2277:108E400062BF7A8C334ECC1671C68076091DB7F09E
2278:108E5000EB2F2644F3A71C4D627AEA399E1F219E10
2279:108E6000577B73348017BB0149D20148F5BF07BD5A
2280:108E700009FDAF4C6878C808D857560F24D56CDD6B
2281:108E8000428DF4159A7AAD07844C16B5BF68D7D3D6
2282:108E9000FDC4171F1739FF895AE203F944B46CFE69
2283:108EA000554D540E4A21BE345BB09DD103904E67A0
2284:108EB000F17DBA28F8CD503214F8CD6CBE6F3F303A
2285:108EC000D6EB98BC6CD6A9E8FF2F48FF3B7AD59B20
2286:108ED00095ED2AFE50CDC7ADE2FAF24A1244BDE04C
2287:108EE000ACE4C5F2DC0EA62FAF361D43BDA2FB617C
2288:108EF000A627D69000EA1D6AFFE1EA5DCAFA9A56F3
2289:108F000065BDAE5D59EFCEF7E038DD3BD60C03FF13
2290:108F10005DF5F677D02F5C2DF88457C927A882C459
2291:108F2000F8C443D7A3DF4663A47CA218C0D507F3D7
2292:108F30004D86126722F00310B25FD3FA5DF0491A32
2293:108F4000AD6B5C093694339312CF88F1658CE7BE24
2294:108F5000E3B487F6A5C72E54F18942E18FE99F80DB
2295:108F6000FE2AC1370AB95E4226A9EDC6FB91FE86EC
2296:108F7000F25ABE8DFB53B8DD23F40CFA3DEA197E9C
2297:108F80008DC9ABD184EB155EA4C72223951348424B
2298:108F90000E23B3579A896A7F0B6D57B79B94EDAA3E
2299:108FA000FD1776CB30BEFFF388BB2FECC72CE23A1F
2300:108FB00008F2E1E887D50A7BE9C33F4E10FE14B4FE
2301:108FC0009BBEBDBDE4FB4EF652CFBEC750FD919691
2302:108FD000E533260F7800E2E36D3198F75927B17D2C
2303:108FE0004E9E772C2BDC7F78B491D8B46174DF343B
2304:108FF000D96084F860938ED91333A69C1AB6248C5A
2305:109000006F3C6F2C9D0DF0DA2CF97FF411D81747C7
2306:10901000648279351D36DCF74BCDF439C5B74B8FFB
2307:10902000DEE0F0D0C717742CDEF899545F05A95024
2308:10903000621E551B7E1FA3A5726C85EC7D2D00F171
2309:1090400055C9FB720D6D3BAE772F85FE576B7C7A51
2310:10905000E6B7F3639C54F4DFBB1FD2837C4CBF9F05
2311:10906000C9C5A0D4C7C1FCB89EBCF078D39264E651
2312:109070006FFA30C15507E308B927E20927D74E8CAC
2313:1090800007D1F02571C6439C53D242CC2E723CC806
2314:109090002BD814E6573E19133D2E70878DF1579843
2315:1090A0003EF0F734ABF32736E0B7DCFE3BC7E35DB9
2316:1090B000E7E258FC6B8B8DC9810EFEDDE3BC3CC73B
2317:1090C000E363E7129476A378CFCBBF3BD368346ECB
2318:1090D0000ADB4FFB43867A2FE653F1FC9106C2EC84
2319:1090E000A43DD696AD61F1D0676DA51D000F5B3F25
2320:1090F000A73E0DE0B787C961884743DC78A4C5FD6A
2321:1091000020B4D7DA8913E2AEC41ED0CF84F823D8B6
2322:109110009DA83F307CE98E61A598D7B3B6CA0E589A
2323:109120006FF7DA00EE674FBD92F1C7676D2E1CB77F
2324:109130007BB668E7F56D01BEFFCC7F20FCD9BDC5CD
2325:10914000C3D4F12F2A38989E1DC3F8983AEEBD502B
2326:10915000F0311EF75EC0F9D0C20EE61F5F64249B9B
2327:10916000FBD2F6C51D29CC5E8CF3E429E2DE9ED845
2328:109170006F95EF20F0B33BD3DF13AF7D382C5EBB90
2329:1091800086C7FBD688F5B529D777C4D66BBCF688D9
2330:109190002D4ABC569D17F032C8F7FE2178AEB3B009
2331:1091A000F557C835E57AE013CB08E691AF3BB2B48A
2332:1091B000C948EBEBEE02CF1FFC317D750D87576F71
2333:1091C000F3B3B934C4AEF013F721F630BB38CD9DFC
2334:1091D000A0A8A3061C9687D9B73A5DF17D667DAE3F
2335:1091E000E2FDEC0DD72BDA733C458A7ABF2D372A86
2336:1091F000DE1FD05CA6A80FDC7E93E2FD42D22F1EBC
2337:10920000E3B18765F09590EBBC3314ED37ECBA45CC
2338:10921000F1FD67A4FEC1D1F4BDB618260788C7E9E1
2339:109220001F3C2C94779CDFBA44F17D93D43ACC4711
2340:10923000DF5FE667FEF621EDAB14FD5D889BC0ECB9
2341:10924000081E7FACA7FF181FB7CBA80FB54BE46172
2342:1092500029321E59DD71EFE6BE2452AFA07F28E708
2343:109260005751390F7A945ACF30279B93101FD24908
2344:10927000FAD7617415C20313EA61971E95D19F5600
2345:1092800048063E341AE1A3235E7BE47E5D22CCCF08
2346:1092900073E939B303FC652B8E2C45FC33A42AF10A
2347:1092A00020C6AEC483D8414A3C303B94FB1E3F42AB
2348:1092B000B9EF6A385B9D4A3C107014704E9CA4C490
2349:1092C0000B01DF11F41FC0B788040F619EB5577200
2350:1092D000F84894786F7B0BAEE35A7ADB70153C87C5
2351:1092E0001E703699104E2CEF4AE84906EE9F56FB49
2352:1092F000CD85FE313199EB3DBC1FE1E7DE2C795085
2353:10930000CFE989678DF065F97240DFA927CC5FE26C
2354:109310009A926C8BEA57C3E7BDF9D5041C853EB31E
2355:109320001AF4193ACE72E246BE7486EB332B4CF730
2356:10933000635CF0C21F197CAB8917F9F5B78D978371
2357:109340009E48C2FC8D6A384A1D92CF0C74C0F976D3
2358:109350003AE9107CDB8D791314ED8CC314F105A56B
2359:109360001E4A9C52387F127AA9184FC053F02D31F3
2360:109370009E81D4CBA940072A3E4606A9F554A5DF15
2361:1093800043F84970B0B038C6F09EF804B313437E7A
2362:109390002FE6E790B3739A08E8DF16E1D7F0CF879E
2363:1093A000E7C2AFA1B6EFAF15179DE991028FE44474
2364:1093B000C643457C952EF3D38FE8C7A3257B268C27
2365:1093C00037E3958136A289E697739C7895F6236BEF
2366:1093D0008289E1FE32E1BF7E530AE0BC7F409C3FC0
2367:1093E0002561FA422D699D303F07FC9F546EC541AF
2368:1093F000C9FC3EA45DAD97B278A286AE04F07B3581
2369:10940000098B17E684DAB12E47D6459ECBB5E4FB2F
2370:109410000D2916EEEF60F93984F33761BFF5662F39
2371:109420008978FE413D85495128AFE5E5646E6716B0
2372:109430009002E89FD2D52BC9689F533A94C2E9AEF7
2373:10944000270F06DB23E84EB57E11CF97CDC5E87711
2374:10945000591ABEDE6F000FA147FC8BAE0DF6E7FE7A
2375:10946000643BD6D7F439F907273417FB15F98C7507
2376:109470007A963F4C5A95FAF3C7C91AAE4F38E56F42
2377:1094800002A7DEF781E785F17DF8A6FA90C80B13F5
2378:10949000F03B23F86008DEE7147CACC76EEB81F785
2379:1094A000B9687C4EC0E36289FF69D827D97C2C1942
2380:1094B000E0FC0FB3EB22BC9F79227056D284E655B4
2381:1094C0002177623EE8A57619EDA4DA312C4FA87613
2382:1094D0000F06CD49578701E382D5ED6FA07ED6D91F
2383:1094E000481969FFDEE1D4B35E15BC7BB357C47A7B
2384:1094F00074294A7C13F922749D312951F3017AE0D1
2385:10950000A06CE77010794A15F2E0F840985D728817
2386:10951000EF7B8CD6159F42C72F7E3F230EE0532151
2387:10952000771C4A07383448785E699C8178C0DF9F91
2388:10953000C6CFAD8D08D43B2C141EA919263C7F3410
2389:10954000F087B20BE299A71AD627C0F9AACF1BE978
2390:10955000D0D4EE1828695C886FE4858F7F5C0C712D
2391:10956000B60598A7BCD0C0E2FF393F8AF5F5A37CC9
2392:10957000E2753D3102BDE972EBF17C46D02AA3BD14
2393:10958000912493F1805F02CE49B16C1DE279E963C9
2394:109590004F4A90CF249E8F6B0A0E5D07F94CB0EFB7
2395:1095A00025A1758E2B0F0EAD3785E02CF204893680
2396:1095B0009835238C3E8E7078D4DAF49B411E761950
2397:1095C000B91DC8ED4162D1221F69E0F1F69303A8ED
2398:1095D000458AFDF8CC9097551BE38C1F0EFE2EC8D4
2399:1095E00027A0C5971667BC15D76F47BDB981EB5744
2400:1095F0005D3CCFBB6172590AD853BDE53F4D4D610B
2401:109600007A7E0D8F838BE7355A1FE62DD540DE71AC
2402:1096100058DED3B7CD3B16F9E6BDC2C1AA255A0A1A
2403:10962000875A89B8AEF6DEABFF92A3DABBEB5334B0
2404:1096300057CD835B952229F2DC6A21CF8D3E6AD813
2405:10964000539A42A2F4D7236F2EDFA8C8271379D2EA
2406:10965000B597C7623E59F9CF3AF19C20F46337853C
2407:10966000F2DC7A83F3916406E75AC80F1B1AFE9C5A
2408:10967000E151A8FF24DC875F0300C1DFD12EA35F87
2409:10968000F6D7873593764699EF76BEFEEB6D5AA4F2
2410:109690008F1B7CC4D912657CF19E38470270AECC1A
2411:1096A0008F9C5F5B596011CC1FF257A38DB795E378
2412:1096B0008B98775B42A08AE3399EE3E8A95B94FB31
2413:1096C000F80CDFC7B69B0259781E6972F47C7AB138
2414:1096D000DFC3B4F512C02360761F44BD730EAD0C1A
2415:1096E0008173003E0DCBA36274D6DBBE87E0AD5123
2416:1096F000E41546C25B8FFB2CFA1376C9F9ED32C62E
2417:10970000FDCF1FE574499C2689D2D7AD5C6E9D279D
2418:109710002C7E70BE59427B64899B900D94BFDCFA0D
2419:10972000E46A8CDF543D357433882B787E07E5235B
2420:10973000B7A6123296964B3629E3B7CBEE8E88D772
2421:109740009070F948D54FB4AFABEE577E574DEEFE53
2422:109750000BE83FD52AFD6620F777ED4DE1F6C230E4
2423:10976000320CF8FBBAA7BED043EA6E6FF8FE39A5FB
2424:10977000EBFE5AE083162CDF4D711E003EFF718A0E
2425:10978000FB4DE0DBDDEF31385CAAB9C4F8FEA3493C
2426:10979000286F0CC09CE9FF1AE6B338ECCF28BB80D9
2427:1097A000F89BC1C0F41BA1D7C9F27A398EB68FFCE1
2428:1097B000734302EC5FD2B3132781DE6F7B36D60989
2429:1097C000F0DA5AEA2C043FC0D64A13E633180D2CBF
2430:1097D000FEEBFDF5C8FD100EE8DF7A6F19D8A196F3
2431:1097E0008E7D3EF0936CD1FC05CFA16C19CBF2DDE0
2432:1097F000C438751D95BB613E59B398DCD89AE32CEB
2433:10980000B484F54BB89E56CB61D6BD77E03D70FE73
2434:10981000FD91C3A826D3F5E5A23FEE7AC2F653E444
2435:1098200055C1D8E1FA6827953F909C27EAD7B74AF7
2436:109830003E1D5DCF9AB6DD18C7A8B9D3973C1FE48B
2437:10984000CC335A8C0389F925BD9E5606F11E215F43
2438:10985000E64B1694FF42DF9E47C41F8B17CDE57879
2439:10986000308FEBD9F363197C971047167C778B9177
2440:10987000C4819F7A7E796B09CA9FD53A2BE835223D
2441:10988000EED1BB3E10DD5F54FBB4999DA795827964
2442:10989000D0C9E7D4FE20CC6F14F57C52522AE3AF36
2443:1098A000B5795CEFEB4F9C1067AB7D6D600BF805F5
2444:1098B0000C7D583C96F21DE38822D47B8D60CFACA2
2445:1098C0007C35C6C7FCD65E7E6ED6590879217533C5
2446:1098D000328A303FE104E51F66388F18C8423AA546
2447:1098E0007C45A2B22D7FBB65AA16CE0DA653BD8ABC
2448:1098F000D6E7A7664DD5527CAFCD0D546968BD69DA
2449:10990000FB7056BF3E7016EADBB697B17A51A04A9B
2450:10991000A6F55DDB5DEC7B30F02862BDB47DCE54F6
2451:109920000FE813562EAF1D013C475CFBCA404DB8F3
2452:10993000BFB22595F1A5CFB9DFF5F31CB27806C00B
2453:109940007B5000CFA989F77E9A2AF45C96E72BD644
2454:1099500029BE23A9D1FB1F9DCAFCC42BF9F9DF71D5
2455:10996000B1644B0C8B5779E228FC0F740CC4785B04
2456:109970004E6A028717EDA738D48F80A3E84F8CBBBF
2457:109980000AE42AF05B1DF39B8AF6C9A98C3FD271C9
2458:1099900036E1388319FC6B676414C2BED1FDD2F284
2459:1099A000FDD232FBB385CD8FF66B2D40FE3E14FC0D
2460:1099B000DE07AED0F77342F356E3C70F387EAC6CC8
2461:1099C0006271C6A0B51FE2D1B858A6EF9162E53A20
2462:1099D0007671F8B5A45A997DD5B31F29128ED3C4D8
2463:1099E000E19841E19EFFEDD75DFD3DAD3B6CBF9C35
2464:1099F000709EFF40FB753BC3D723F2B6453F9F6F78
2465:109A0000547D3782E54FD526F4C3EF7E16438CF89C
2466:109A10009CECECF92EA780E999A07F8AFB1D886752
2467:109A20002C3A0B6A38D7E8B9AFA195E711F677B2AF
2468:109A3000F3CA33A616F3F559F8FA2CC6B07B1A7A96
2469:109A4000E8F158306B9639127F7BE0DED3DFE022FD
2470:109A5000DE9F82AEA3F507F4D1DB7E3CCCF1E3DFE1
2471:109A6000B61F629E2A78F6C059353F014FA067FCA9
2472:109A70006EB0121FC53CB7A58ABC61155DE77CC7F7
2473:109A8000F14AD9776B6EE3F9C076253EAF69CBD149
2474:109A9000401C5D7C37097CEDB690DF6D6F2AB7DF27
2475:109AA0003248462F7970FB52A3FBEBF0B9DA7EEB1C
2476:109AB000B6B2FC67B5FFA0DBE6F0C3B93ECF457692
2477:109AC0009E7D944ADF8038CC0BA6D0772179A2AC5A
2478:109AD000C7A531F845FA838278FEB6D850F6A2DDE4
2479:109AE00041C847DBD7207F2E8E2F5B9F43EB81ED54
2480:109AF00075ACDEB7EC8B1CCABF4F6FAF67F51BCAE6
2481:109B0000BEC8857AEA5A561FE77C51C608C2DAA950
2482:109B1000E3D342FAC3A7A976A67F946B08E09141EC
2483:109B20005EEB003929E0D95B596CD0D447D34F3B69
2484:109B30007BE899C5294670F93C42D8E701ADC23EA1
2485:109B4000EF8E63E793BB419ED2F5FE3DD5FD975462
2486:109B5000D053623B17E5D0AEEE8CFD580FFA90E47F
2487:109B6000A4FA06F83BEC16B200F2EA3AB7BA403F64
2488:109B700022AB1C462DC293FB9FE8DABEA6FDBCFAC1
2489:109B8000DA33B7F765C3B8601E2339FDD7BDF6D504
2490:109B9000DF204E5AF7B9C901EEBD911D3BD6837E39
2491:109BA00035B2E3ADAF98BC65E735C4BC47821F91C1
2492:109BB0003E1FD16EC0F98FECB86E39BC3FEAFD8E06
2493:109BC0007E801F634EFA9A801D74EFFD5D5FC5397C
2494:109BD0000DF299F45DCE69F4C0E3CF54798A4778E9
2495:109BE00024A6D9001E57305FAACB76747300F534D3
2496:109BF000E57918AA97639CF512E9E380788138F734
2497:109C0000ADF65B9EA8A4EBA3CFC704E90CC2F4E5B4
2498:109C10007197A97D1FA6679712ABA25E6E4C53BCCD
2499:109C20005F61C951B44F4CBD4ED13ED95EA8A84F1B
2500:109C3000193452F1FE3447A9A27EF388C98AF72B62
2501:109C40009D958A7AA1AF55F1FED0C3EDCAF6637631
2502:109C5000DC87A1275DE5A0C73BFCEE262887773689
2503:109C600097C7DB4984BFB638E06D82E7A3AED497CF
2504:109C7000F84894732CABDCE8E78F38C752CACEC3E0
2505:109C80007769D8390EE19FBD12EB9E9486FE590A82
2506:109C9000760AECB1C66022EC57C5E26D983775299B
2507:109CA00048D09FD5A60FFC7C14C8F98532EABD6D5B
2508:109CB0003CDFA66D6EBE177C7A27A4C0CB10AFF731
2509:109CC0002C64E704C6500D17D70DB14D09F6C9AD88
2510:109CD00058772959A9DAA7B58A7A85E536C5FB13DD
2511:109CE00053372ADA27DBEF52EDD3BD8AFA34C70E99
2512:109CF000D53EB5A8F6E91945FB9833812620A37116
2513:109D00009D1ED94CE77FE389E672D89751273D0B1A
2514:109D1000815E8A7DEE2660872507EADF80D247EDE7
2515:109D200029F053ED6F4CC5F240A31DFD4C871A0777
2516:109D30006179B8D181CF7FDF3802CBB71B9D58FE48
2517:109D40004FE3242CFD8D2E2C5B1B5BF1FD171ADBE2
2518:109D5000B1A410CC04799194D8730F4326D8F35D45
2519:109D60009A402D4452FF3B6D1FF2C5AE3E812EA896
2520:109D7000DFE9791DF9E24A30A628BDB54049F7F37D
2521:109D800067E94E299D96DBD2D873919FD0AA7116B0
2522:109D9000827E7D5FDA91BBB59954AFDDE84AB55854
2523:109DA00059DD48EBB8D998A775E46EE768427E03A1
2524:109DB0002203832647A642BD3B86B56F4B3B82FA02
2525:109DC000B58823CF0AC591EF03BA57C7917F73CEE9
2526:109DD0006E067FCAD12B03CDB0AEA3DC7FE4248511
2527:109DE000BA5B6959AA2DD4815C3CA1D2234459A7FE
2528:109DF000297D04FA6DD53866637EF04D3A02F9E8A4
2529:109E00003324668FF6E881E94C1E754F33A0BD738D
2530:109E10004CE35C8E794F52F07180D78B3B3E44F817
2531:109E2000759B83590087DD3B4EB0BA2DF8B8E40826
2532:109E3000ABEBD83A7FBDE383A91E53D4753E9F1682
2533:109E4000255EDE96C6CFC7FA9C99207F45FD58A5B2
2534:109E5000730DC88963A5CE01309FA32E03D28FC78F
2535:109E600065F642DE25D13A4B6687F9550AD275B8B8
2536:109E70008E597A4667E41639EAB9F3A9E94CCFC29C
2537:109E80007D037B6E5E2CEAE1C734D1CF8D2FE3F0EA
2538:109E9000B9D027BA7F65793A93836533CDD85F7798
2539:109EA000430CC671BB5D03510FEAAEA750A2F4D1BB
2540:109EB0007DAEFEE24BD86E10212E8C57CEE77CEAA9
2541:109EC000371DEBFF7A9CBEFF7143AC0379B8E57A8E
2542:109ED000944FB7F09717261A516F593823B30CE4F3
2543:109EE000D27C1EF75A64D62663F84B6BD5C39542D5
2544:109EF000CB4C859B41FC572555EAADB45E9DB176B0
2545:109F00003394ABFADFAB87A39A3583776F06F5718D
2546:109F10000D25AD12B49702EF34D2792DDE20DB99F6
2547:109F2000FD24CE1FAEFE567916020F8FF17C190A62
2548:109F30005FB40BABD225855D52C5E1F5651AD7DB61
2549:109F4000F249FED7CA78CE65C093CE85EFE4F5E23C
2550:109F50007757B673BDED0F7A36AEFADE0A31EE0AE8
2551:109F6000BEEFC7F4C429811E778B19F1A360EE17E9
2552:109F70007796D0F517745834188F177CDCCFEE0F16
2553:109F80002B39E3463E37BC33F0F4718278DE0E7431
2554:109F9000722D3935D3B311E5C3C82FA9FC01BE78A2
2555:109FA000C5FDF1716C4D8A7A2ED3D758CDF9633D3A
2556:109FB000F2B5038D1BB07EA8D183E5E1C62D9C3F91
2557:109FC0003663FBDB8DDB397FF472FEB80B9F773491
2558:109FD000CEC5F2B5463796FF30BB32D3812E8C6E9C
2559:109FE000CCD33CB8C3406488377418104F29053C63
2560:109FF000FE4812E4C1182C70FE4E9D0FA3E6B73D3B
2561:10A00000FBDF16712FC675304E4FFE0BE867D9BDCA
2562:10A01000E3CF516237033F294DCF9C06FCE3A8DD17
2563:10A020006E06BDB5EC615AA7DF1E75DACD3A5A2F20
2564:10A030004FCF6275B7DD6CA0F5F10FF3BAC76E8E26
2565:10A04000A1F58AF46CF6BD9760B0FAA6F4FED38051
2566:10A05000CF9612E900D043B931673CA4CE56584A96
2567:10A060000F001D4C4CBD753CD0C19E343BBBEFC2B4
2568:10A07000BEF100D4A70C6AD1C2911BA7A970137CB2
2569:10A08000579654A985EFC667ACDD04DF4DE87FAF76
2570:10A0900036FCBB4983776F82FA54478B16F4C13D77
2571:10A0A000692C0E2AFA1175D12EF8ABC8D71AD2E155
2572:10A0B000423E5ED0EE423E2EE05236ABF2A7E0A723
2573:10A0C000AB6B972C12CC6396D41384879CB8DA2B95
2574:10A0D000945A289F9D973EC4BC917E5707F51BB1AB
2575:10A0E000BE6D6374BEBB283D8A7CF980D329C84D00
2576:10A0F000C88BFE40CFEEF5780DD687FEC35BCDB79B
2577:10A10000627F6E33C8D703694C4E1EE6E5655EFE7E
2578:10A110009397751A6735C8CFBA741E4F8CA4EBF5A8
2579:10A12000E98C6E55E7057A69E774FDC3741E5FE636
2580:10A13000F727AC21EC5CD1B5F2B65686DB6F3990CF
2581:10A140009FD37A08F246D579103570DEA85F643E59
2582:10A1500030E58B2CFFB15D9947DA637FF4617C0FAA
2583:10A160008E3182D1F1F3DED77DDF35D67D5FB475D8
2584:10A17000AF242CCF59BD0EE2B6216D89BCE7C8F5DE
2585:10A1800004A2AF27621DFC9E3E55BE35D58376C224
2586:10A190007C2A169B09F86FC2F9C4F1ABF00935DFD0
2587:10A1A000F977F1B3ABF09BDFC13CD5FC469C7B5605
2588:10A1B00097429F83F352907707F7BE809F7E63B2EA
2589:10A1C0007B3FD0477759F06F1AB0CF92028867690A
2590:10A1D00056F741E85FD2B3F8BBC8673DA7F1FC165C
2591:10A1E000F4A2F7D25722DFE902E140E9F108AD839A
2592:10A1F000DE33D2E27A0BFA238318FEF496A7799421
2593:10A20000CBC5C89228F215BB5BBECA423FD635F01B
2594:10A21000BD373854C8A303702EE0D2885854793A19
2595:10A2200025E2938A20EF3A19F588CE4CBD16CA7FF5
2596:10A23000B79DD8999987FDABEDC5CEB4114636EEE2
2597:10A24000844950B6EBDDDB6F053B69A401EDA477D3
2598:10A25000799EDFF4D35792405E4D977DC90552A495
2599:10A260009DD979644199BD20D2DEA4EB1B0FEBBBD5
2600:10A2700096DDE932FA13008C6AFBB366C3DF08E4AB
2601:10A28000478FDA7085C0FD65D7B647890C6CA2E8A8
2602:10A2900084E30D284BCE38311D67D8B9FA37A01C9E
2603:10A2A000F92533CFAF955774E3E5D637D831F1C1EF
2604:10A2B000CA7B1746BCC5EC555E46DCEBB6CAA3CCE0
2605:10A2C000572BF595601E851C8883F2A21440BF971A
2606:10A2D000AC61F731887B18A81D9BD3D706762FCBAE
2607:10A2E0009B1A07F9467472153FFE70D1ED48F7319D
2608:10A2F000A8FFF4D8B12F69304FA04DEB8C1F037627
2609:10A30000EC86018E8DB4FE27BFED8157695967F940
2610:10A310001B09BFEFAD66C32545BD7363E8BE20C80A
2611:10A3200087AEF9978C72A786902DB05F3564BF7E9B
2612:10A330005D981C24AD7FE981FB10CAE72A017028D3
2613:10A34000078DD39DF4BB4A6E6F107217AB733B8BB6
2614:10A3500078CE4DC3BA8DBFEF59C0DA3345FBC2E9A1
2615:10A360004E3A4EE500D1DFDE69584F1375DEDF75DA
2616:10A37000A2FE007B3F477CFF12ABE78BF1DF67E378
2617:10A3800099D9FB373D72DB74E00382BFBBFA2AEF39
2618:10A39000F9A1FC7E565FDB55F34A94ED5C1E887B89
2619:10A3A0007D2A7E3C39F61DA0E7560973E06AEED09F
2620:10A3B000A17FFB42426B41F839659187E22A373B26
2621:10A3C00041DF5BF3F2C09D32CFCB017DE37E9E8FF8
2622:10A3D0005F219B301E71E96EC6E77BD3D7AA36BCDE
2623:10A3E000A2D8CF88767EEF3206EAE87817B7A56064
2624:10A3F0009E3BE9EFC778F8BABE92B8BF11CFB98AD1
2625:10A40000BCAFA47EC409F669D2EF62D8BD9667FCE2
2626:10A41000C87FAB7EC7FCBD6B76BC81726E896C4712
2627:10A420003C7E27C7BD01E0D36566F717566D780DF2
2628:10A43000E9B5299BEB0996E0E070787AFA72B91CCD
2629:10A4400082FFA6BE255785BFB2FD7B86BFDACF2C23
2630:10A45000CE49AFFA96F9695D66160775F07D3AAD9B
2631:10A46000B10FE3F07A1CD67371B93FCF2A43F2B033
2632:10A470003F99E51DBD5D0276D0A57A33DE77B460E5
2633:10A48000FDA982F0F329A254EBFF9D4047B610BC12
2634:10A490009E8BC4EFD66BE077EB7F12BF53B401BD48
2635:10A4A00003E2A627D8FD63C3FCA7F5E1F92EFEBEA3
2636:10A4B0004CEEC6B7B338913A6FCBDFD7CCF4241E3D
2637:10A4C0008F5933E3EDD1108F11F4302E96B4827F83
2638:10A4D0009DE2B583E3B503F05AE06F282E43BF8BAE
2639:10A4E000425F21FC25388E80D3079170FDE81A78F1
2640:10A4F000FBD17F126FDBA8FE8B71CC9762D07FA25D
2641:10A5000086F3BF385C05BCE333AE0EE7F88CEF078B
2642:10A51000CEF11976A5FF81C3BB37F9A4DE1F31EF59
2643:10A5200028745AF25DE8F4E7999C4F6903982FAAC2
2644:10A53000DEF7E48C887D4FCFB8FABE2BDBBFE77D1A
2645:10A5400057C34D5DD6F0F8A6FAF9888C5EF9DDBFE9
2646:10A55000058EFFBFF9CF17D6EF53B42FDE7044D16D
2647:10A560007EABE73D457D74C05F0E682EFCE163CF96
2648:10A570000551BFFCAE7EF5DEFCE9D35F5CA18178BE
2649:10A58000DB083FF3E7FF35D3BD2D83C2F95D8DB7FF
2650:10A59000C94CE13AFC642BBBBFAB3A0FF387D6F34F
2651:10A5A000397E31FAEF1FDF4EF1E60B62407FA76F75
2652:10A5B000DF755A7B7E241E945ED61067581E5AA9FA
2653:10A5C000D1AA75A2BF8638A3E1CD7D1C6F30FF876D
2654:10A5D000D2FB5C23D125513A9F3B57C27CA7B9845B
2655:10A5E000E545D3D2E7A6EDD3B5C407F724579AB40F
2656:10A5F0003E03C6F994E79A0DFC1E659294A838DFD5
2657:10A600002C3B65CC4B9B3D82C5076F31B5E2B9D27F
2658:10A610007987EFBC783B6D279B3C252CEF5A9C43F8
2659:10A62000FBA3E6DBC4FDEECB6074DE2DF138B2A4F3
2660:10A63000C37BB222E44106F38F4E9737CA90EF12E4
2661:10A640007C8FA0DE2DE88EAEEFB0A1889DB380DFB9
2662:10A65000B1A8243ADF403CF77C6F39BC5F73CC8EE5
2663:10A6600070A91BB1B100F6B16EBCF489A12064D70A
2664:10A67000D46DF812FBA9909F6B82F72F9D60AEF00E
2665:10A68000E19DD44EB187FB2B038B802EAF65FF88F5
2666:10A69000799F6CF4213E7DDC7818CB77C7BE5502DC
2667:10A6A0007A46A0D11FD52FF95DFD03C22F20FC04EF
2668:10A6B000820F88FBF93A32385F304A7DF15E352DE2
2669:10A6C0002B05BFDC1FC95F0F655C5D5F51B67FCF97
2670:10A6D000FCF59BE2794D2A938B6AFC56E3B5C06783
2671:10A6E000B8FF1B7EBFE016AAEF815C9D4F3CF93599
2672:10A6F00094CFCE5DD1AC1B257D77BC5E653A93458A
2673:10A70000A29C37F9F6FCDC8EEB97CB65B40F447E48
2674:10A7100082D887AF3222F4F87F5E432EFEF33F29C2
2675:10A720001723E5DA9945DF4DAE11853E909A1981E0
2676:10A73000AF199957C75765FBF7BCEEB073308B6400
2677:10A740004DE8DC07E40F831ED7ED65E71AAB739A7B
2678:10A75000F1DE79322218077AE3CABD32E221D13A1A
2679:10A76000B56961F74E7512DF1F001F578C5E81E7D8
2680:10A77000E122EE8B32B5E1F938F5BD51225FB89692
2681:10A78000F7A3BE3FAA96E709D7AAF2764A33797EA5
2682:10A7900070112962F9154ABD545D763512855FB294
2683:10A7A000EB4A23FA01263FF6D2CF3DA343FB707359
2684:10A7B0006604BECECCBC3ABE2ADBFFC3F82A9B9F00
2685:10A7C000C47351DF165F0D766735CC5BF0E1059001
2686:10A7D000C345C75DF0AAC10BBF0F20EEC9EE96D8E6
2687:10A7E000BD34DD9F10F41B5DEB9EE591C7DC78AEB8
2688:10A7F00073F8DB4E99E511B07C03A1A708BD655441
2689:10A80000675066F7E1F3F3503C2FE89BF22F87DFA8
2690:10A81000827A8EF0BFFDBBFCD642CEED35DA919E3A
2691:10A82000857FB038E0423DAE4BE72B817BED3D7B31
2692:10A8300062A2EA013B323557BDCFF51F66F70E80A5
2693:10A84000FB4CCEDFC5BDAE1532BBF7F9925F46FFBC
2694:10A850005DC34FDEFFED23F66BDBF575964B51EDD7
2695:10A860002251D669D87989A2723BE6ED81BD04FEFA
2696:10A870003BE1CF53BF7F30BBEC59985F853C1AEF6B
2697:10A88000D9BCB49DCDA7B77DA9DB10C4F17B6DE722
2698:10A89000E3D7ED2DB184DF8BD199D9639F59CE1ABF
2699:10A8A00043FBFA4DF77F4C70AE42BFF97FDD6E98E7
2700:10A8B0002E53D591CAC77CC9CBF453C2F4D405C476
2701:10A8C0008FE52212C4D24D583EFD12E2C0721971BA
2702:10A8D000613927DB1DC8C4FC966032E643BEFC8F9D
2703:10A8E000C1803717C78E6A86DCB9EF4B4FEB2EB4A9
2704:10A8F000E3F8DD2FFD230BF25AAE794F7E9CF38BEC
2705:10A90000CC28F1E4FF2995317E428AD721BFAFE4FC
2706:10A91000B72590F12C2E767F720EE24388FFA5B406
2707:10A9200008FE07F1D6FC4F342C3F64A584F7BAB675
2708:10A930000734485AF9CB73BC704F4F7B1B6BCF5F0A
2709:10A9400063F54AB49E3F3286B5AFB57AE1DCC342C7
2710:10A9500012407A5C0CA71E643807C3F89BB8079DA9
2711:10A960006AECB9A0672DEF30B2FC7D12E80F7CBC19
2712:10A97000A017FBE6E62CA6EF0FC9657C7B4899D2B1
2713:10A980000F61E3ED0DD965F559B4FC719633398B40
2714:10A990002E7548827FEB2F8AD12F8FBFCBF2D9C87B
2715:10A9A000DB307E28BE7B24BBAC2FBCFFBCC4F2CD09
2716:10A9B0003D7BF9EF17906072F8BDA273B2CB73A024
2717:10A9C000BF415984DF531F1DAEF0FB75AE28F69CC6
2718:10A9D000C8671C023615FAC3D9FD54CF4BAC3E32C2
2719:10A9E0002BF9E64D26F4E17B40AF7D24DB5D84F35B
2720:10A9F000D7136282F93F66F0EE44FDB33E0BFC9143
2721:10AA00002B1E3768402FF8908A553857F251A31102
2722:10AA1000CB53D4CE85F24FD4CE85F2136AE742F9F8
2723:10AA200029B573A15C7ED9419186906359CE29598D
2724:10AA3000B650BC4D3DDFF1598CAFF68CBF578FE35C
2725:10AA40003764BB11BE3DFBBD8778211EF2BC359833
2726:10AA50009E70157CEB9DCF30B888F89FBAFD463EBE
2727:10AA60008F82362DCAF182F6405C55D87BF3B2D87E
2728:10AA7000EFA9E5BF7406CF8976597AE0EB94E892A6
2729:10AA8000A76B587D5ED660846F43B6B31ED64DE982
2730:10AA90007B219405EDEFDF07E77968FF9847D02D1C
2731:10AAA000051F443D5FB50E351CC4BA9EB7FAB7C248
2732:10AAB000F7CFBF940B2BA1FC8630BA013C92A2AD1C
2733:10AAC0007723CEF76643B018CEA9DCFCB51C356FF2
2734:10AAD000B821BB14E16C12F826E0C4F7EBBBD275C9
2735:10AAE0004F3C9BE32911F76C00EFB4831CBA1207AB
2736:10AAF0007A5D258FD7B7B7F57F17D6E7392C930145
2737:10AB000076C45F05DD3DC1F74794F97BF52ED8A7E4
2738:10AB1000E7F79EED0FF7B0D27DE90FF7B2FE226B9B
2739:10AB200000B68BEFF2477EF5F02F92F07DFCDDD082
2740:10AB300079A4A502F249E61BF71D84252DB47C52A9
2741:10AB400001F9248B53A54350DE6ACF990079242262
2742:10AB5000DF7DE9A0D243404A531D95A88F9502732B
2743:10AB6000099307E5C6587E29B4903F898AFAC4D470
2744:10AB7000BE8AF727DBFB29DAA70CBA41D12EC69D86
2745:10AB8000EA18AA786F48423017EC2FBA0E760FF603
2746:10AB90005332E6DDE5BF74ECA61B687DFAD3B3F152
2747:10ABA000DEBFE779FBF417CAF1F708BB293CF5547F
2748:10ABB000913A37E2AE077F019DA9F4FB9ABD4F1C85
2749:10ABC00072DAAFA2DF5F43AF17FC757587B104F887
2750:10ABD000EB37D5F3D5FBE2CB52EAFDBDE14B0F3DA0
2751:10ABE0004876862FFCDE2D35BE107227C73F564EA5
2752:10ABF0003FCACE817D5B3EF667E06361E7307B4A0A
2753:10AC000095BF6D88DEF1EE7AF0BFBF23133C57C7C6
2754:10AC1000CFE755C1FFCB213C27CB5A7E0AF74AD15B
2755:10AC2000E71ED03FE11CA893F67F398BEB4D35FB37
2756:10AC30007E9A561C6A270D9F28DE2777489B15F5BC
2757:10AC40004D39CAFADDA59BC3BFEF8D1F566DBF55A9
2758:10AC5000EFC6F39B52D4DF7F15F3A9D81F83F97990
2759:10AC6000D320EF843EAA2D7E4F0BF1D569BDC84F8E
2760:10AC7000C177E6C9A43E5ABB9CCDFA9DBA3F06F304
2761:10AC800059BE6DBF1F525862BEE0EF98FCFC30DE2B
2762:10AC9000AF0DDFF7B86C89DF7B70EF4FFE0671CF29
2763:10ACA0003D04F3372F5A19DF2F68FB4CA301F9D766
2764:10ACB00087E14B8125A00179D25D1DEB81FCFCBAB7
2765:10ACC0009566CCEB1C921BFC83B190A2FA2FEFB9D6
2766:10ACD000C748F7ED8F7098314C9E76838D43EBD942
2767:10ACE000D9F720BF9FB23FC6A7F90EEBC9A63A1409
2768:10ACF000EA1B658CBE1701DE70B902BEF3BA9F92E3
2769:10AD00001E3903FC00D60FF5D9BFBCEFDDFB41FFB8
2770:10AD10003EC2E81B32E5D476FBFC30BB9D3CCAE862
2771:10AD2000D248FF813EB7EA40B31EECB96BD3772B14
2772:10AD3000E6CD7C53BA1E99CD7FB7A3773A3E3A85CC
2773:10AD4000EE4BDD1E76CFC4A58E0178AEB537F95D2A
2774:10AD5000B75D83F427EA5D1DF224C057F539710110
2775:10AD60004F62C953DCE7B46ECCDF67809C5CB75799
2776:10AD7000CB923D7A1B678B86D8C3C679FE354335A7
2777:10AD8000FB5D4B36FF6E219FF7FE35A174302B37EC
2778:10AD9000469173542EEB92402E57B2DF5D38BE378A
2779:10ADA000A50CE07F5C223E3B9EBB6279C63359779F
2780:10ADB000F0DC84F788A40ED286DF7728ECC8D97B34
2781:10ADC000670F003DF20F6D4B8E3B813D64F7C3F181
2782:10ADD000E6100FEABDC7ADAE4CF0374CE7F1FEE32D
2783:10ADE000D66027F0E3E363622588DFD3FE3791B0B6
2784:10ADF0007BFB8EEB5C99EC3E0891577CFD77BABFEC
2785:10AE0000AD42BEA3740AC4AB17100BD89137CB4C1C
2786:10AE1000AF25AF33BA14FCAE4EF227C03CE764CF87
2787:10AE2000F8EF6C3AEF940D3F47BBB2076E5AFEBB8A
2788:10AE30004FDF50AFEDB15F7749EC9E1207D3F76B50
2789:10AE4000475F78600E9C73A376B644E7B3A47D1F7A
2790:10AE5000DEC7A3B6AB7BEC9BFFA57F34D23E726D01
2791:10AE600087F509BFB7DA4EEAD1CB857EF714CB73ED
2792:10AE70007F63CC435DAB69BDE1A95884E3F9C70D9D
2793:10AE80001EE0DFE7771AD0DE399F103CB91EEA2FAB
2794:10AE9000E43B3C385A1E9EEF12F8BD4263FF00E4CB
2795:10AEA0000EF9BD0EEFDDF8EC3103FECEC7CA27AEBA
2796:10AEB000DB09F6D36799F6679F03FFDEB336BC0F55
2797:10AEC00080A4B2EFA7717A04FAB2D3FD907F6546F1
2798:10AED000BD61E58B69C8BFC4FE9D7B2C06CFC19FB9
2799:10AEE0003F3C331EFC609D9ADDEC7729659307F8A3
2800:10AEF000F0EA9D31A8F711BDFB15587FF9AFA6CD3B
2801:10AF0000190AE3BF6F23B09EEE8E17D1FF18DADF68
2802:10AF1000E872FD52473FC6077AE42CCB9B5D1CBA12
2803:10AF2000AFD907FDAF21E23E4496375B244BEC7767
2804:10AF30002AB7453F07FE5E36B3D76A84BF2491180F
2805:10AF400053810EDD84DDFFB86D20DEB77B3E3B41D3
2806:10AF5000D0313FEF28F0ED64EDABE82F31B07CBD90
2807:10AF60005EEEB73C95CDCE055719BF54F84D6A3704
2808:10AF70005C56D607B3DF6D2E6AB20F5D4BCBF51C66
2809:10AF8000CE9A5457209B7EBFAAF5DE97DF46B83C89
2810:10AF9000FAA33FC2B8874DE8A7216F33F8A9ED9710
2811:10AFA0002A6390C71D5A147AEFD91D1F60FEC8D9B5
2812:10AFB000976EC0DF2B5B22FBCFC23D595D66FFC79A
2813:10AFC000B7D3F285C347715FD4F38D88C34B8CAF81
2814:10AFD000D4C03A8642FE8AEB6FD948B78CDE4F6FF9
2815:10AFE000CD47F8093F6DF7F9E8F69598A7E85FCCEB
2816:10AFF0004FF42FDED3DA997EFF7F0189AF015A002B
2817:10B00000800000001F8B080000000000000BAD58FE
2818:10B01000096C14E7157EFFCCEEEC18AFD7EB031FDD
2819:10B02000F1C1EC1A8C898D3DF8AAB1A12C36A60489
2820:10B03000A17639225CCA3169C25188E3950D154A5F
2821:10B040009118675B2E11C555AB88B469BBA1224529
2822:10B050002D515C07901B61BA0435E0364D17052968
2823:10B0600034B5E8D46DA8D5D8D8A569232424F7BD74
2824:10B070007F66588F316D137557F6F3FB8FF7BFF767
2825:10B08000BDEBFF3D26252A332B007E56A400D401BC
2826:10B090004CD26719C0982F5199E1A5713F1F1FCB62
2827:10B0A000441ED701E800B301DAE8CF6AA432B8B38E
2828:10B0B000B391B631350A7C5C874C4EE31ACE3F9D86
2829:10B0C000F726B86A683184E51C80C7C1FA6467B99D
2830:10B0D000A01E6003FD8D473FDEF09BBBCC07B0098F
2831:10B0E0007ADD50027043E8DE278900A3BDDF716B73
2832:10B0F0005E5AB4C27FAB0C80E91F0893E5493DA7B7
2833:10B10000530017D03AFA4C8A497DF566288BA09CEB
2834:10B1100031BF5717AA00E629CC754BC6E92228A2F1
2835:10B120007538AFC66B91F679D428EAB34F082F5023
2836:10B13000D0EEA7A5782588C97DFB048D8F8FB277C7
2837:10B140007640908E8B5786D300C6332460E94867DB
2838:10B15000AB8910E2A1FF13D4532867DC0D6D7D7815
2839:10B160006E6D8B10E9E376B8860DD44F00C6F5AB53
2840:10B170002DC771C475298DCB96DE011CAF72AE4F01
2841:10B18000DAE3E42F2902B7AF364B88F4563C88C780
2842:10B19000269A477DA310170957FC6C9011F7260BD0
2843:10B1A00077809008E897672CFE19D91B172B516FF1
2844:10B1B0009FAC8B684FD305F40BF24DAEF825A22C53
2845:10B1C00004B01FFD0BFDEED1FB7A100E79E52E9237
2846:10B1D000D368B997A1ACCDB8EE108B009D2B430F6F
2847:10B1E000A7C75882EBF17998E034047E1751849F09
2848:10B1F000D31510E6742544385D053D9CAE865E4E41
2849:10B20000D740825378341E85009D74C07F2B15C9AA
2850:10B21000633B8549A4B51B21D2EB7D108703164EF5
2851:10B220000FC74167148F9F168795A0E57179D3F1F9
2852:10B23000282CE3F13D1D0F0FC523FA2D056279443B
2853:10B24000978221125D46818B729683E222BE05426F
2854:10B250009C6FFD1F71683034975631031E2D33C724
2855:10B26000C5B72C3C66118675493FF52B661DB0FDB0
2856:10B2700005A86778E1837EB4C76B539BFFA1608903
2857:10B280008829ABC2AEC5C8D734779520FFF3D8461E
2858:10B29000936F6A7E2388FC1BCA97C3AE7C8AEBE659
2859:10B2A0001AB70AD0CD36855720AFA5F82AA18A0A49
2860:10B2B00047A940F1B3D76FE2AF75EF53FD98475AF6
2861:10B2C000915725FB640F6286F889252234202D5E74
2862:10B2D000157FCB8DEB5648DAF7291FDBE5B84F41D8
2863:10B2E000DCF776B7E602DA7B5832D77B709F5C9D3D
2864:10B2F000B40BC7F514E4FBFACABB58F0E1E7A3DCD2
2865:10B30000D32457EB9EA703E9718EA9A6279B73DB75
2866:10B31000B04E8C26DC704C499E7332577B4D413CBD
2867:10B32000412E05F27B816CCA19ED2B2F27BFF42B20
2868:10B33000661D85EC400DE136911BEEA7F5E36966CD
2869:10B340007CF5530CCE7E383594D0796586F1F10FBB
2870:10B350005101DC3FA8681768BE23F55E29D5A5DB3F
2871:10B360008BDE3B64049271CAF0FCCD687734043103
2872:10B3700089D79125FE5B5847017D3089FE1CDF8E01
2873:10B38000721087DAB01675E3F0E7364FD463912276
2874:10B39000B957B85CC9285E84FBBEBBFEA664C6591B
2875:10B3A000A11967561D1AB838F88D02930DC394BCC5
2876:10B3B000EAB878F75F7F40FC3AEE78555A9ECCA702
2877:10B3C00097BAC0478BBC8EBA61E75963BF272EFA84
2878:10B3D000885FB09DD62D7D6FA884EC5A366444D327
2879:10B3E00048CEC0FB05A61E565F087DC23E4B5F6877
2880:10B3F00015A93803749E13631EC4AB93452EA71181
2881:10B40000FF1A5375D4FFAF32C6473AAD0F79F3D167
2882:10B41000AE5D965DED83A70EA521DDF5F2936BA0E1
2883:10B4200092D2C1CDEBB7825FCAFF3DA7DDC97ACE0C
2884:10B430007FA323D0CE0EB03F7189E2A0BDD7B9AEB5
2885:10B44000038EFF9DEA4EC7D43A8F7A7DA2A465731E
2886:10B450007F59FD0AA885A0BC9DD65EB2C34B7A0F6A
2887:10B4600048310F43FA832ED54FBC953F70E3391E08
2888:10B4700097F67A78398BFBDECEA7AF1D41DDB3920C
2889:10B480007855BDEA0911EE55AFE686C8BE2A09B661
2890:10B490008539DE311EC755181B0CE3E9F58C89A0F0
2891:10B4A00080E7BC3E50A6620585370F86E0CF7393D8
2892:10B4B000FA755AF9D42A9E6991300EEE3C057E4CFD
2893:10B4C00049E81CFC715446BEF328D00AB843BF506B
2894:10B4D000CE9D112146721A076BF2C8DF67ADFCF4EE
2895:10B4E000E409A04CC1294599054A5992B7F1F5588C
2896:10B4F000FE492DCB74CCA7A98F38F6A737049DFB46
2897:10B50000F550A2A29EEAB1B93F23F4A863FD61DF22
2898:10B51000CAAB14974B133BD6102E59ABAA1DF3F5AB
2899:10B5200020F3FB435DA1578DE17EF8D8ECE70DF8E1
2900:10B53000E5FD002222D9D764007C0FFDD138EA72E4
2901:10B54000F83DC5C078C47529D7A7F81D7F3C8A93FC
2902:10B550006F08601C50221542E1D43848E2ECBD8FE0
2903:10B56000238F83415C4438A74931BC723C80533DF2
2904:10B57000CC4DA7F9BAAB22C438EE5D6A1CC7678709
2905:10B580009D78E7B639F1CED79CF816EC72E25B14E1
2906:10B5900071E23B67BF13CF80EEC4AFE448A363FD05
2907:10B5A000BC9E66073FFFC46AC7FA05B1750EBEFCB4
2908:10B5B000F426C7FA85BD5F75CC57F5EF76CCDB7105
2909:10B5C00035DDEF8BE29D8E75D3FD5E73F559875C9B
2910:10B5D000DBCF3A7EFF9F7EDE37CDCFDDA81BD5AB1C
2911:10B5E000777D23C7290DBF986AD6A5567149224495
2912:10B5F000FE5EE256C9A7BF53B25AD228DFAD3E1451
2913:10B60000B6FA101C3864F2569CA809F532D5D1EA76
2914:10B610001BE1161FF2B546E43295E3FA919E96744B
2915:10B62000858789E2C73861162E5F6A60E072E40B95
2916:10B63000F23949DCD6EBDD623A2E6EBA178BF27224
2917:10B64000494185E7ADB3E6598359D7D78652C0350E
2918:10B65000058FA5D63850D346794BCC29586FBD07F6
2919:10B66000F05E0E12DDCB0539160DCC749F544F8859
2920:10B67000FC9EA4F17BD315A6B9896E9013C5D4BFE7
2921:10B680007E92A3FD2880F5EAB6A02AFC9EC58C28F0
2922:10B6900019354E8651D3D1AF87435EBABFE3DF8FF2
2923:10B6A00060DD7DEE5A58AFE0EAFB0DD45FB3F439AC
2924:10B6B00013D04E0710FF61E63F54837BDF6DFCA87B
2925:10B6C00098FA8F474424B00E66F9423FA579FDF001
2926:10B6D000920C5EA773D13EACA386A0F0FB83FE2C38
2927:10B6E000E3EF818F48D8E229797AC4CDFB0E58EF79
2928:10B6F000A32D165EF6FB68B375FE308AD885757A81
2929:10B700004BFF158ECB9EBC517065F178E3F7A427F3
2930:10B710000BBDD5C7C8A6508DBA6E218DDBEFA50233
2931:10B72000F1D3F4C556B122DD98E1BE68D33D79234B
2932:10B73000FC3D777FFF19B38F3C5CBECEE33669B723
2933:10B74000297FF8682AEF2FC3478B9A8926E5DFE621
2934:10B75000F2B744AE39E264DBFEDF3BE2EF09FD4FB6
2935:10B760008E79237BC25D80F61BE7F3577E05F11BC4
2936:10B770003BE7A9A77723FAED8FE4175BBEF1FCFC4A
2937:10B780001574DE7FB7F36F1CDFA1830970CD4DDA2E
2938:10B7900079F3E00DCE1B070D4EA7DB69BF336D2A91
2939:10B7A000BD05652EF4CF049BA59E0C3C78CECEA0A3
2940:10B7B000F93E1B5A9ED34C7D76A8487299B4D4E4C6
2941:10B7C000F31B64935FB98AE8B8DB7B84DE99430C92
2942:10B7D000420CE361330BFFF009B4BB3B47BB477638
2943:10B7E00076EC9EA874613E7454195B19FA333F439A
2944:10B7F0009BA47186D7BBFC4CAE6729DD3B4604BDDC
2945:10B8000092612D587CB2702DDDD34766E9B7A9133C
2946:10B810002F0AE6ADA57BFA8864E6C7F293C25A1DEB
2947:10B82000ED58ECD7528228E74326C6793CFF82C503
2948:10B830004EF17833A475693C9FDAE8DD45EF5D7A17
2949:10B840006F8CA798D41F64DCBE0CA2B393B49C6A1F
2950:10B85000258E2FB768AB78BC94D1FDE08407281FF4
2951:10B86000F09C9040E70C7862A790CF41DDE99EF212
2952:10B870002BC9BCCF57FFD213A7BAB143FE98FB69BF
2953:10B880006E30C0E5649760E5C27DD92F786251D2F1
2954:10B89000CF4814AF45FD7ADC787FA1F7F4759CC7DB
2955:10B8A000BC1B7B7EFEC96353FC313768BE87E02931
2956:10B8B00000733EF7159A6F1F1CBE4975E4B701ADC2
2957:10B8C0008CEC1F16947AAA23EDBE4B12D59FC6A00E
2958:10B8D000C2F7A1BEDC7EAC07DF641C67D9FF178C02
2959:10B8E000D76D586CD2E9FD26682AED6F970D89E473
2960:10B8F0006144F0FBDFC3EC1FDB9E78B102E9ED345D
2961:10B90000B598CEB1CF453D1A498E6DB7AD4752CEF1
2962:10B910007F8EEB1DF284237F6FBD74B894F264C8F0
2963:10B920006DDEEF10678DECA816D9B675C87FC1C261
2964:10B93000C55EBFD5F2A790177E2C887477E4DBE74D
2965:10B94000DF5192F3E3ACE7EB1F90DF06BDBCDE4DA9
2966:10B950003FDFDE3FDDDEF68B831C17B4772BD93952
2967:10B96000C5DE8D748E6DEFD8C0FB2F56289FDDCEBF
2968:10B97000F1A2844472C75FB95BACE0FEF60B576E70
2969:10B98000501CB55BEF7D38EB7CC77B66E17B317388
2970:10B990004A5DA75A37874FB3A9F7288FBDBFD0E5B7
2971:10B9A000DC8F176601CF3B6BBD23FA297F67786F69
2972:10B9B0009E4D08BC659ECDC37B1AF503ECBF54FFBA
2973:10B9C000EDFEBBF79AC0E3726F00F83CE94579C021
2974:10B9D0008CB7793FB0FF9F1065D8E7301E3A25ED50
2975:10B9E00020C509685DBC3F8873BC2AC573DFAF57AB
2976:10B9F0005BEF26B3DFD459FDA58EE490FE15E9BCBC
2977:10BA0000EFD45AE7D6CB789F0952E9D6ADFF9B58C1
2978:10BA1000FF5F38FA367F6FFD1B3AD0569240140014
2979:10BA200000000000000000001F8B08000000000064
2980:10BA3000000BFB51CFC0F0038AEFCA3330C42B3167
2981:10BA400030742B33307C03E20E79841CADB02A07AE
2982:10BA500065FA5F303230BC02E23740FC8E9174FDF3
2983:10BA60006AC208F6525E06067520BF02482B0A30ED
2984:10BA700030B001D91A40BC0BC8BF05C4CF80D84133
2985:10BA80008881819D8F81C110888580581328EF0996
2986:10BA9000A43FF161375F4B18BFFD8F0550F9A282BB
2987:10BAA000A8FC3FFCF8F5B709E2971717223D4CDEDA
2988:10BAB000AB911F1FC6EAB44F33D4C4371950F91FD6
2989:10BAC00065181898E51818DCE421FC6B48F2114061
2990:10BAD000B14F3210F66D3160DC01D55D66C06EEE9F
2991:10BAE0001DA0FC13A07C0AD41C0004EB50106803BA
2992:10BAF00000000000000000001F8B08000000000094
2993:10BB0000000BE57D09785445B670DDBEF7F696DE8C
2994:10BB10004216C2163A2C0A08D86C21084A67C3A0FC
2995:10BB2000019A454407B5598410C822E27C3CC77984
2996:10BB3000345B061DE64D147518079C06C380F35050
2997:10BB400003460D1A980682A3CF2DB8208E336F9A24
2998:10BB50007D3190002EAD83E3AB73AA2A7D6FA79B46
2999:10BB6000E08CFFFBE7FBFF2016756B3F75B63AE7ED
3000:10BB70005445359808194BC877F043D32512212432
3001:10BB80002D9AD29FBF7F974EC82433FD974C48A172
3002:10BB90006C23643821136D2468A275268EA11F536F
3003:10BBA0000979B7460ACAD086D60B6413524AD8CF51
3004:10BBB0002485D44BD7137231E7C5AA216E4224AF36
3005:10BBC000972C1D4A53B78BCC8474CCDEAF2507214C
3006:10BBD000CE1C0321FD589BEFE8DF64AF15FB12F983
3007:10BBE00094A24EBA7C9AAFABAE7EE719BD74E55D08
3008:10BBF000FC0374E5DD4A86EAF23D2A6FD0D5EFB941
3009:10BC0000344F97CF0ADCA2ABDF7BCD145DBE6FF55E
3010:10BC10009DBAFAD7AE9FAD2BEF1F2CD5955FB76DB0
3011:10BC2000B12E3FA8F6415DFDEBEB57E8CA87841EB5
3012:10BC3000D1950F7BE3315D7E44D353BAFA230F6F66
3013:10BC4000D6958F0AFF5E573EFAF44E5DFEC6D65774
3014:10BC500075F5C746F6E9F2B9E42D5DFD7CF307BA48
3015:10BC60007CA1EB535DFD9B338EE9CAC7BB3FD395E7
3016:10BC70000B3CB8B5DF25DDF7099EBFE9DA29C447DB
3017:10BC8000814D889154626A26D5985A492DA636D29C
3018:10BC900084E9864CFF9D64046DF074A08A50BC5BFF
3019:10BCA0001968FDEF149ABE9BD3DBE91F08BD790923
3020:10BCB000A1783B91754D269A6D2199E299C94C0264
3021:10BCC000168A0A8E08C5B7148A771182A92B42F109
3022:10BCD0006D18C5BB8819D34E914EF83D25E2C2348C
3023:10BCE00035D215BFA74532304D8FF4C2B473C48D21
3024:10BCF00069466400A65D22FD30ED1A198AEDBA4549
3025:10BD00003C98768FDC80DF7B447230CD8CE4E1F7A9
3026:10BD10009E112FA6EEC82D9866458A30ED159982A2
3027:10BD2000F57A477C98F689DC89DFFB4666607A4DB8
3028:10BD30006436A6D746FC98F68B9462DA3F5282E9C5
3029:10BD400080C8626C775DA412D3819107F1FBA0C813
3030:10BD5000524C074756607A7D2480A927F208D61BEB
3031:10BD6000125983E9D0C863F87D58A41AD3E191A78A
3032:10BD7000F0FB88C87A4CB3239B311D1909629A13D2
3033:10BD8000F93DA6A322DB30BD21B213DB8D8ED46238
3034:10BD90003A26F22A7EBF31528FE94D806F29807793
3035:10BDA000214CBD91FFC2EFB9913730CD8BBC8FDFF5
3036:10BDB000F3234D981644FE84DF0B2387311D17397A
3037:10BDC0008AE9CD9130A64591B3988E8F9CC6F496A2
3038:10BDD000C8456C776BA415D3E2C837F87D4224823E
3039:10BDE000A9E07724476D0E0BFCEB05FF9FE93A793C
3040:10BDF0001DE54BC46FF88EA6C446F16054B47E6C4A
3041:10BE00004AB91DF24995E25512C5EF64CA0B811F6C
3042:10BE10004EAC9482376751FC480D37425ECD31B944
3043:10BE20004D347F176955017FFF42C276E0A77B47FB
3044:10BE30009DEA1EA6F8FA6E5AA807456EF8417EAB39
3045:10BE4000C29C7A03BF6D56C2F4FBC4D47D697E1BCD
3046:10BE5000B4A7B43114D09B8E0FF84DD111FAB94B61
3047:10BE60002101079DEA41E86114D60B99687E66318D
3048:10BE7000F10EA5F5AB46996604E93855437D253E9C
3049:10BE80009AFE22CB3703D2FF02E2A1F3DFCFD383A6
3050:10BE9000C480E98B9914EF297DCDBCAF2FA3A702F5
3051:10BEA0000AC42E1DC36174BA8BC90D5B6BA66FD01B
3052:10BEB000D5B753081B4FD47F96F83E82EF813CD212
3053:10BEC000AFD216AD47BF1F867A71BE7F1AEF7BBD1A
3054:10BED0008132020AFF402763700BC827E2764E8644
3055:10BEE0007999DDCE29F6C4F3FAD932D740A58F76F9
3056:10BEF0009E419CDFCF2432A396F1978C2983B07F9B
3057:10BF0000948701AB05FB9739FC45BBCF019EB4DD9F
3058:10BF1000FB165F0B93A7EEEE08179BEBAAE042DB44
3059:10BF20007D897051683BFBD5B74B9C56333813AFB6
3060:10BF30001BE7C1BF57984840A2EB68DD620F6ECE89
3061:10BF4000021C7623FF2C7171069A4A8141E57A49D9
3062:10BF5000322C8190C63D492103AD9FB7C5BE19F46F
3063:10BF60008096BCC0933E80F366956CA15556ECF963
3064:10BF7000F9A1DFD07CDE2695500D832C487A229BD8
3065:10BF800050B85D2B496CFC80776F1FDABF9F881F0C
3066:10BF9000AF04FDCF27ACFF1689D151608B13E17A36
3067:10BFA000BAA0A66A344DC3BBCB8A09E5E3A72858DB
3068:10BFB000BB50FC5E60250AA494831B113E01F578FA
3069:10BFC00058C817A467259A97DBE7E7435ED03F5D23
3070:10BFD000F782A01ACDD3BF0BB7E9F31A78E1BEB749
3071:10BFE0005AD4E066C4AB6E0C3E025EDE6E0C7E1C64
3072:10BFF0005E0516356048457805810F382537C2A1A2
3073:10C00000C4A28664DA4F0985239060C9EE87D30104
3074:10C010004E0BB7595CC735E396D526EBF215F55DA7
3075:10C020005CC73572F4E21BCF38804E1767185CC7C7
3076:10C03000297F6B5EE64D394EB7ECFCB2224C057E93
3077:10C0400094D566B96CBA7EF4F98BD55211C36FB72B
3078:10C0500073DAA0C478B638C3E83A4E49F5EC362610
3079:10C060006FCF2E33BB609CE6652E171B3703530141
3080:10C07000AF454BAD585FCC2F51BF3FF4FC08A9230F
3081:10C08000C7CCC0CF6959EFC4F513D293F2B911E907
3082:10C09000A441FD12F0C64CFF7E67403CC2BCE8B72D
3083:10C0A000A2560E98AE87EFDB75E3D176EE931AF9C0
3084:10C0B00092986E1572528397F7430748A766DC671C
3085:10C0C0003FEDD149FB6B516C6B408F9AC0F1A702D9
3086:10C0D000EA517E50660E1BFDF4D3B93AB61F89C6ED
3087:10C0E00039BB6C5B37E06B25E66A2330AB92DAFE36
3088:10C0F00005404FE7EA56A6837C59285FFCB12F4ED6
3089:10C10000FB5F08BA0DAAAD7A7919E4F3A4FDEAE859
3090:10C110008CD8DAD64DF3CD063A94AD7DBFBF929858
3091:10C12000DC29DF7E70DC683AFFF2FA0B4698C70420
3092:10C13000C9FF2B292DBA7E09D64FFB29DD76C4080D
3093:10C14000EB3BAD06AEF949D615E0D96E9EB68C93A1
3094:10C15000499AF905A82249E975760EA757E2BEFD6E
3095:10C16000534A9F67DE52C923741EE432AD45CB3378
3096:10C1700079E95CE27300BC66D72D44FE7306F80FC4
3097:10C18000C861529D0DF8718E188A607DE7C8FB8EDC
3098:10C19000611AF8ED938C1C3E5495A5FCC084432194
3099:10C1A000DCBA00BF32955435C983E1BB12E07C494B
3100:10C1B000FA0EF94950427E56C2BE07887939AE63FD
3101:10C1C0000DE34701FA07F2F756EBF9D3FCF5FAFC59
3102:10C1D0003C32255DA1FC65DEE32AED91F2372DFFAF
3103:10C1E000A3F07B566272773EA9AC72D1F96F34D25C
3104:10C1F0007DA2F39FED224A37BABEB2573666CFA270
3105:10C20000F9372526C7CE2EA3D3BF86F6D389ADBF77
3106:10C210007469D0E81DD87E7DC7EA864D1F4DB03FBA
3107:10C22000261F4B85FC256E251BB925557213AFBF04
3108:10C230005B9DECB538A01EFDAEE1CF73D6E8D7D735
3109:10C24000D1FA63D74BC863886FA5DB2613C033B11F
3110:10C250001EB15F623DEA36C91B8C4307618EAF8217
3111:10C26000AFB572F809BDE38B98FC3731F9EF62F294
3112:10C2700002BF554EDF14EFBF9046003DB78E637886
3113:10C280001236B2F30CAB678CD6FBE64AF54C9C5EDB
3114:10C2900068BDEFAE54CF12ED4F31A4B5AF57F6CA1B
3115:10C2A000732F07287E97BEF08483507C3CA354A74D
3116:10C2B0007BE8F7455B563B004EA7958003F0E64CC4
3117:10C2C000502E8A07AF510649E81B3689EE7BB9C06C
3118:10C2D000FF31CB27827CFF728BEA7A84EE4BC53626
3119:10C2E00053C844F7BBBC6E4131198CF9232CFFB302
3120:10C2F0000B801F15F5EA51EDBE966E7D22DD6DC7F0
3121:10C300007DE866001D9884BA119A96D79C18077A22
3122:10C31000740569457C8E6D07E3C3D18EF2EB5946F7
3123:10C3200067FB72716EAC609F4845DDCF2FC0B9B11D
3124:10C33000822847B5785402B84CF5BC01067B2A9C8C
3125:10C3400017C8483212F88A800309A6215F5EF9EC0B
3126:10C35000AF061FA1F368AE79CB2169E04335248491
3127:10C36000CBC5DA397F4DB9825C384FF1935CA36D50
3128:10C3700017C476EE7A3A81CE34DBC0D2456AC83132
3129:10C380009AC273D126D54331932C7AEE99DF3D457D
3130:10C39000E98E7C62F2F4A5F05EF8DC814337D0FCD4
3131:10C3A000C21D6A6A315B864D4A8FEE4705FD0B76EA
3132:10C3B0001901FFD2170F18DD83D8F7873A45F761C7
3133:10C3C000E18EBD4632A83DDCF26BF71AC3B638FBEE
3134:10C3D000517B641CE8332B9FFDCA08FB7D668F44AC
3135:10C3E0003A67B56F5FB2E900EA2F0027DC3FBE3F36
3136:10C3F0006DFBD56E9F42135F1D8EF55CC0AF13EDD4
3137:10C40000931D64F508C4E3E75FA5E397FCC9E481E5
3138:10C41000F5973C7FBF03D6714AA964F8BC7175BA21
3139:10C42000978E5BA206D25D98B2EF254F3F8078369B
3140:10C43000FFE003A89751FCE862409911E802EBBBCA
3141:10C4400077C36DB8BE79C48FF856B251F605810F27
3142:10C4500028A468471C7A7881D3C3A9CD9453D2F518
3143:10C460009D02FE087AEEFB32E78FF7A11EF9005F0E
3144:10C470002BD56430FF8599ED5395C120EC72661D74
3145:10C480009ED6FC0CF9E8D91EDECEAE810807C13776
3146:10C49000919FCA070B3BB3FD61FC17DB51BCCB87F7
3147:10C4A000EF50BF49F55A06EBDA717EC9C65FC2C7C5
3148:10C4B000A7F3B682FE712A9DC989D8F5FDC920F877
3149:10C4C0002395AF1AFCD2D035A3F39A87195D0B3AA6
3150:10C4D0000F4E2E82F2CF3F64F403ED40FED07985FB
3151:10C4E0003A63F9DE6912F2011309C5A3E71A95D37D
3152:10C4F000B3BE9C7268D4DFE8BC15C9A9C513DA7F46
3153:10C5000027843FEA25F31EA7ED34FA74058C87F5DE
3154:10C510008CD1EF5951BA9DCFE9FFF740FF4951FA4D
3155:10C52000271BD2AEEA7CB6480DFEEE29A0574A9FE3
3156:10C530000137D0ABEA83757FB67DFFA13B295E7FD3
3157:10C54000562BE854CF3763E9B464E70304F033961D
3158:10C550004E3FEB5E49E2D229FD1E974EBB87FF5747
3159:10C56000F8A680DBC118B8513EF8DB57DD89E1172A
3160:10C57000CB072B0CEEB87C90FE7C48B2DBE39DC071
3161:10C58000378167A5FF59D613F84D1B3E0A7C6BC354
3162:10C5900047816FB1EBD4C32DB67C03F01B8D7EA019
3163:10C5A000AE20013BDDE7D6DD329E135BDCAD8E4E67
3164:10C5B00074DCD516720FE8D92D2E9E4F66F9D6344D
3165:10C5C0006315F005F1BDD54266007EB6F85A1DC967
3166:10C5D0001AFDF94883EC70D3F2709014C5D3AB29DF
3167:10C5E000C7C5F1C32451F972845FA16CCB5C3A1CBE
3168:10C5F000CE55B20774B7B9CB6F7780C9A2A5A1F7A2
3169:10C60000A419F4FBBD6FCA68D368B13A06C3BCE88D
3170:10C61000B95DE942E13B87EFF3691278720C5DD7AF
3171:10C620009C06A617CF5DAB87C73CDB1223F019AA87
3172:10C630007F46F140832FC24F50B2415F5E4AD6E23F
3173:10C640007E95C6E08F9F9F77BAC81C7F869021FC9D
3174:10C65000BC6180FE16733E55280F9C3483C2BDE535
3175:10C660000D999868FE62834CAA609DDBA520013A73
3176:10C670000EA4211E9653FE4034E7C266C0336362A7
3177:10C68000FA6D7EE92FD93FA15516BDFCE9E0DFD058
3178:10C69000B4F9E54FAE790DF2AF7C9CF929695F3FA3
3179:10C6A0007FCFD777037F6FD963226827D9F3C7CCB1
3180:10C6B0009F40FE559307ED1C2B4C5ED48FF7D8831B
3181:10C6C0007DA1BC07B32FADDCFDD5E030CA9B55B8CA
3182:10C6D0004F05323B475C6CF8DB7F4BA990D255810C
3183:10C6E0001CDD9384FA75C5AB96201C3A5B767F956A
3184:10C6F000EDB7FD70EB2937123FE29F9DCCD809F8CA
3185:10C700009ACCEC6915AF8D7A66391DBFAC6EAF71EE
3186:10C710000E2DCFFFC3B78381AFB4EC64FAC1793576
3187:10C72000FC34F11032497E62B94AF7EB3CE86A5DAD
3188:10C73000295F920FE5066CF1E0C2E0D042E100EB28
3189:10C74000A27029017E98081EF3FE65E171E16E1862
3190:10C750007F51C348226769E12279D9777BD02CE1E8
3191:10C76000FAD9F73D5F0D06BEFB59ED7294DF1DADA2
3192:10C770007B35AC3BEDFFA5754BA1AB5977CDBFEC3D
3193:10C78000BA19FE0F90993C8AA583F678FECA8F31BC
3194:10C79000FFBCDD83F3BD4AFA6FFC975DFF3FB8EF46
3195:10C7A0003B25F4C775B4EFC7FE65D7DDD1BEBFC961
3196:10C7B000F7DDEE027B6FCBEE6F338966FD1DADDBDF
3197:10C7C000A0FCABF2B72BAF5BE83D4D864AD7703A81
3198:10C7D000BF4F48F56D59347DCF7B29158EA3940644
3199:10C7E0007CF1CE0D4315766E30819D092ADE260937
3200:10C7F0007B5193CE8FDBBD04F58C89DE5FA07E403C
3201:10C8000094CAA65C5ABF296F8EE711AC31F4B01FF1
3202:10C81000F2D36EE479FD79EA5D897825AAC74ECC1A
3203:10C82000BBF50DD0EF267965D4FF688A7ADF47998A
3204:10C83000E3D8F71CFD39E28E9873C0ED33F4E5B709
3205:10C84000F1FEA693C5AEE1145ED3BB2BAE2005D19D
3206:10C850001DB9952AACE78EBB2452ADB157DE16D375
3207:10C860009F4321DC4EF28FC16F6E1BFC16233C48A8
3208:10C87000AEECD942AE027E84C1BB69DA9020D861A9
3209:10C8800088E261F09B5EE6413B283F67AABCBD6A37
3210:10C890005BD30474AB12FDF9529C1313C199F0736E
3211:10C8A00027F6D32B0A77D52BE3B953D31FC243EC1A
3212:10C8B000C7F7DD07B17FFFEC7E64C37EC4F19F2D17
3213:10C8C000309B6F03FF85B99F84E7F6496B658C83C6
3214:10C8D000310F94108EBE1C15FD3B270CBE6C509C76
3215:10C8E0008B878D2C7F9075EB01F82CE0709C472A8C
3216:10C8F00051EF2497BFFB6E0CF88D1042B4DC4BC88F
3217:10C90000047A0E9937460A59E9FAE72B24E01C0A03
3218:10C91000764D891CD5DA3583FA3CFCDC941EEDA7F4
3219:10C92000A3FA89F8C30F9DFE95F2A3A37DE87905CC
3220:10C9300052058757B4E7C47B1A181C2B1649C15EF1
3221:10C94000884721D5A7F1EB7CC2F1FAAF0F0D433E2A
3222:10C9500097FBCB414E3CBF7A07A0BE5FC1F5FD8B74
3223:10C9600001B713EC35171B7A3BC11E73F18D7C8721
3224:10C97000962F8AF4203F477EB0CC8C694B81542D92
3225:10C98000C3798BB44E44395C6021C07762DBED52D1
3226:10C9900084DDA592F919E98F9C0DFBC87EE6D3A62C
3227:10C9A000CE4E9A7D5B3BE18C32B8FD3EC0CF518DBF
3228:10C9B0009FE49F852F9C5B01AE072DE171BE38EB94
3229:10C9C0007D8BC3AF78DFD746B0134C69C852012EB8
3230:10C9D000530A645DDCCD7E859FA786916130AFE20E
3231:10C9E0007DE31DA3605FDE903D160ADF8A860B465D
3232:10C9F0007F1C7F5B2C3CA17FB00B1F533DF3009E3F
3233:10CA0000C77E6121014A0FEF70FF0F2DF202FFA2D6
3234:10CA10005D79C13EF6A1C2FC0AFD5566179F5A9C7E
3235:10CA2000ABA6D17107D6B9868088E9CAEBF757DD86
3236:10CA300058DE8DB713F5BA2E62F58E185DE5F1D686
3237:10CA40003FC1C8D63F9F787E9C23FDEBED5BEE2F68
3238:10CA5000EDA13C90EF0512F291F6784D903E2E1626
3239:10CA6000494190BF708EC57CB184F2FF1D032B0F2E
3240:10CA70004C61F252E07D2C9C2595C1598C9FA532CA
3241:10CA80007C36AA0C3E02CE02BEB1F315F529BF1AC0
3242:10CA9000ABB5AF4CAA1FF23CE827E50D920B4C7FDB
3243:10CAA000E54AD808745851FFA80AFE823BDCAC5F07
3244:10CAB000A2F8066BFDB5FD5505E7B37FE868D41F06
3245:10CAC0002FAD65FAB177EE0507E841EF183CEF8D21
3246:10CAD000067A7C57C678824470FC74D9B669058A98
3247:10CAE000B6DF2C9CE7D445B92A98837EB468AFDAC8
3248:10CAF00059834FFDD54E582EBE775DE41E0ADFE9FF
3249:10CB000078388FC07F98C816DAC5C0DAA6BC245A18
3250:10CB1000FEA3CA64868725B57B8D98CFC2FA623C96
3251:10CB2000314E2C3D4D2B4ED2E5E7E487BB035C8AAA
3252:10CB30004DA1259E3878DAA80A3FC9F794135E8A7A
3253:10CB4000B783FF7F901317C679E3C06D9DDA4E3E21
3254:10CB5000748E271F162F777706F82FDEDDBB331074
3255:10CB6000C7E2370BD3E3C9878F96317FE0C7949F25
3256:10CB700041DA328DCA87EB35F2619A05F123B6DDD1
3257:10CB80004FD5AB940F62BFFE97F9CC47201FE2D080
3258:10CB900075B5AA970FD31B66A17C983E4D266E8D66
3259:10CBA0003DEE672AF77325940FB9E977605EF524A7
3260:10CBB000C5C19B8FF8B904E00A298C0372E20F9C6F
3261:10CBC000EFC7CA8B44FC7C8A51E2FEEA0EF8F9FFFB
3262:10CBD00025380B7EBE989E5F400F6C8F8704F9F559
3263:10CBE000E23B283F97001F193F5F7C17B74BC6F009
3264:10CBF000571FF0D7E15AFECADA97FB993CA8A8CF95
3265:10CC0000FAD54C5A7E67B5EA31D3FA7746F96DB654
3266:10CC100096DFFE81F35B0AE74C579CFD9D3133891B
3267:10CC2000B8F5FCAA0FF0A96343FE38F045C0FB77C6
3268:10CC300064F4239EE072FCED217F1C0EF6F354A3F6
3269:10CC400082F87382F3AFF3CB82D30A281DE7CF6556
3270:10CC5000FA70D97619E1505EC7F4BCF23ED6A09BBB
3271:10CC6000E6C70DFD1AFD810B77337F20055471AEA9
3272:10CC7000661F17BE13AEEA06E59B24F467CEF32CBD
3273:10CC8000443B3E59CFECC466FA87C57578D18E5CBB
3274:10CC9000C6E1B5A06113DA9B1704F576E8B23EB79A
3275:10CCA0009C81F380E0BF0BB7C5947B1E467F45197E
3276:10CCB000D89B35E71099EB0FF7CAA1812F426CE79B
3277:10CCC0007BEC5C15BBFFA25EDBFA4BFEC9F51FA433
3278:10CCD000EB1FFEC3AFFF6AD7AD1A39BD0F25C38165
3279:10CCE0003E4E18BC48EF81FFA2EBA7E3CC7DB46FAA
3280:10CCF000676D9C510AA7CB770CFEAA2E50AF5CC281
3281:10CD00007AF337EC38904EF3336BC91030D3CF5FE2
3282:10CD1000AF978B6D72B8CE8D727666E50E69F64070
3283:10CD20008037A9043C9B33D4E4077FEA414B2BF2C4
3284:10CD30002F8177371A193E8FE6E31EEBDA5A80E728
3285:10CD4000887AC9857411B2B0730585BF85E6F78FFF
3286:10CD5000FA6A1C8737DA632AEAD9FE54D0FD00BA92
3287:10CD60001AD7C0F3DB981EF6232A6FD01FD6B05710
3288:10CD7000857625B47E0AF29B013A3F17F8E772D315
3289:10CD800035FBB6FB08C3DB2D9287C4D9B77EF44FC1
3290:10CD9000DC7DFB81F055C0E34623D7E7F9FE1DB4E7
3291:10CDA00034150F433F94E4D90C951B92D18F72BC7C
3292:10CDB000BA37EEE3AD1C7F63F11AF47BB7C69E343D
3293:10CDC00019260EF19645168C73C3717B31FD47CB46
3294:10CDD0004F62CFCD15A409F5980992FF2F8A26AE90
3295:10CDE0006D3A8F3F117E5A4DBD5FA957A847325CFF
3296:10CDF00006E093F78B784B881F4EC7B825FCD9DF28
3297:10CE000023FBE39974BD97D6C81EF0FFDC6E701F3C
3298:10CE10001A03F4FB884A002F2FBDAD7A99DE99845E
3299:10CE20007C77D63BC7543085CCA23081FD9EF5532C
3300:10CE3000C65F8F4167F4DB9FA8DCF282AF9ED48E81
3301:10CE400080F8E1699EBD856EBA2FB70D3FB81AFC18
3302:10CE50007053F35D870E017C1F9609C0F7E89A7C3A
3303:10CE60003C9FDC7F9F84787D98C211DADF362DEB02
3304:10CE7000D0213AEE5D6BD2D0AF36D37BA010F06CF0
3305:10CE8000CE24BB0DFC6BB7F693895F03C7BB48D3B9
3306:10CE90006AE0D7332BEFBB0DE65B42E500D8594B78
3307:10CEA0001A0E167686FC06C9E3A6FD5704FCC6CE0C
3308:10CEB000740B9BD65F3082BD631EAD07DB53B1811F
3309:10CEC000D5ABA8913C16C0C7864791EFCCAB9188F3
3310:10CED0000BEA537DCFCCFA0D9A69BF4D1B687B9A44
3311:10CEE0009F0FEDA1DF9AE4E9E047AB785B66ED7355
3312:10CEF00096BF0E7C691E6D478B4953CD7DD8DF826E
3313:10CF00000D12C9A0FD95E464FD470EF4F7B6EA8161
3314:10CF1000F28FF7FEDA08F3BE9B8ED785F63F470EF9
3315:10CF200017427DF213C9B505ED4D2C4EB685D301E0
3316:10CF3000F9B00BA32F89E7B91E28E4E107C65E8884
3317:10CF40004FF3962EAF8275850369597004AAA8BF66
3318:10CF50006004BDEE3885B39FEA6DC7781CDBFEC068
3319:10CF6000316358C3A75A8DBDB1FDDCFA5CA4EF7BD9
3320:10CF7000890FFDDDFEE54C0E1F596D094AA07FA803
3321:10CF80002E9493FB575FFB24ACFFFC732AFA47CF28
3322:10CF9000F708A33DF6D4069504E81C576E90916FF0
3323:10CFA0009CDACEEC40F24615F3F31F30627EFF862A
3324:10CFB000A9E3801F9EA2F0073CCCDF586884FC7C6C
3325:10CFC000CAD74D71F8C73C7729E31731FC61FE7A67
3326:10CFD0003DFDB7E3174BC631FE1EC30FCABA57A1BA
3327:10CFE0009D2F964F54109BE00F4321DF14EA82F8E7
3328:10CFF0005BFEB64A409F2B575C77AF07BC9969012F
3329:10D000004F31A58BD001E06B9782923B40CB7F7470
3330:10D01000CFAE1100BF93006FA08BB529E84F9D17CD
3331:10D020009C857015F184F3D7EBF159C42FDDE1979E
3332:10D0300089572B074A92885753EFE39F52BCA4E3CA
3333:10D04000DD532F052D12E48FBCFEC070CCBB000F4A
3334:10D05000CB977279BAD68E78FBF1BF5D580D78798F
3335:10D06000F74312CE9F04FC552057CAD74B6EB063CE
3336:10D07000CE7F88B59F4FDB03BE7CFC6B863F148F51
3337:10D08000DD80E7E51B1E7D1DEBD7486EE8FFE34D15
3338:10D09000B350FE96046482E53547503FA67200E324
3339:10D0A00080F607E474C0F3F2552617ECA3C017818D
3340:10D0B0007F4754E6B72766CFE0A9B4DD26A31BD788
3341:10D0C0001D8B77F28C2CC4AF8AED2AE2474580E1B4
3342:10D0D000D391E764C4C3FDAB6F47FC39BF454A80B9
3343:10D0E0007FF9C62E807F4156DE867FCF4A1CFF180F
3344:10D0F0005E9F5AC2F0311FCA01FF5EE2FA29213653
3345:10D10000ADDE21F04FE0534778D74E2E25C037AA29
3346:10D110001B4F8779DDBFDA82F3CEAFDA357D29D2B6
3347:10D120008D8AFEF9FCAA7F4B073A9DA7B0380C0107
3348:10D13000C73285C5E9B49BC7E3CB8D5DAE663E3192
3349:10D14000F3D81B958B43412E425C49888EF3C7ED83
3350:10D15000CF60FCDAB9DF1FC1B8C485AFD17DA7F5B8
3351:10D16000CF6FB79310EAD341E42FA57532C685126D
3352:10D1700025943D55737F44C45B2C7CC18EF02DDD1E
3353:10D18000690A16D3F6A52F1F1B8CFEF015ADAF0351
3354:10D19000FD047E2F31BB7C203C782AC4552A2CEE1E
3355:10D1A0002356EE8E32317B4DF3AEA419A0FF48DB3F
3356:10D1B000F6A23FA9B4F676D5A4B14F7A4C2A8E4B8D
3357:10D1C000EBB17B2E74DFC18F08F39B3C483BBFE57E
3358:10D1D000ACBF6719DD94D6ABA817956EDB8476BD1E
3359:10D1E0008A6D1730EE35FF85E71C00878A7A591F54
3360:10D1F0000FB54D0E99305E4B3E6262FC4917975455
3361:10D200005EC7EE6594D7F2B89F98B898852FEC7EEC
3362:10D21000394041B3F0C5AD0EA0A3B34D5B1C004F28
3363:10D22000DA1FC6134DCA49106FD4519C51EDC3711A
3364:10D23000E38CCEC23F2882DC6DD2C767926D8C4FE3
3365:10D24000D15DCFF6C5B1670A7D65E1735F3C0D71B5
3366:10D25000AFCD3B3F7B1AE6BDE8EF979E86B80DB297
3367:10D26000C7E202FDA1E2F71F61FCA068B7D4C4CFFA
3368:10D270003FCF6EC5B8CBF39F9850FF3BBFFB542602
3369:10D28000E807E7777C9D0EF1944B7617A2FD61C904
3370:10D290004BF99D499CF3AD48012F835711F719BBFA
3371:10D2A0000FFBEBE4908DCEF3DC6113D2775BBC58BF
3372:10D2B0006D198BBF73F338B1EDF1E36A457C537997
3373:10D2C000DDD44937027FAB6372BC2DDEA9A3F8B071
3374:10D2D0000FE97E5E7F15FBB69DC7FFC5ECDB39F815
3375:10D2E00007DD9F274CFAF8B02FEAEEFDED535056BC
3376:10D2F00017FF3E99A0E38EE025E276E798BC411344
3377:10D30000D0CDCEFFC4383CD8AF6237C8F92F32C178
3378:10D310006E795A6D457B60EB6E930BE2B64A777F70
3379:10D320008CF471FEA58318174B78FCEC79D2F6C308
3380:10D33000E21DB94DA2A2C6CEE2CA38DC21EECCED88
3381:10D34000C0EF3CBE8CE1AD883B4B146FF691A91742
3382:10D35000BF77C1E2E2CADC4D4680BF360E4DCA81BE
3383:10D360007D3AA28BDF13EB8EEDCF057018A98D9B54
3384:10D370004C14CFC7F5F1B67D627CF8FC261E47D968
3385:10D38000161F4948F7A110EFC3E45D4550FA98C451
3386:10D39000A1471137D9144B8FC1AB8B97EC78BEFFE7
3387:10D3A000183CF69B98FD49C0A5F9727C7EFC19A734
3388:10D3B0006F7A2E396BD2DC4BB9879F4B441C9998FE
3389:10D3C0006F552D93BBCDDB985E184BCFE5DCDE1E91
3390:10D3D0003BCED77C9CF2FABD8381EF34EFDBC5F105
3391:10D3E0008DE173F9F623C600E7CF412D7F86FEE27B
3392:10D3F000F013D9CCFAA3E7D8B8FD556CBF10B7BF6E
3393:10D40000B38AF77698FFD926A6679CAD958B827173
3394:10D41000FA3FC7E54FDBBAED463C57C90E2BF29FEA
3395:10D4200025F69CC3CE54488D18BFB072398F77F85B
3396:10D43000A92703E0BCD27E0B81F9AC06F868CE992F
3397:10D44000AACB4F40CF51337CC3E1FC24E62BCA8DDD
3398:10D45000A90612D4EEBF12C0FB91137B7DA5807C80
3399:10D46000695AA6BFD7D1A4B80EA4D0FE9A0A240F39
3400:10D47000E8B3EDF14CDFFF64AFACB38781ED19D6B3
3401:10D4800075D163C0FDB41B422E5A85D82D4D197835
3402:10D49000907313B7928E21DDE8DF7E64D9B61E70DB
3403:10D4A000CFCA413C1294DB3D6DF75BB03F27898DBD
3404:10D4B000B3261FF6C926FC0A3094BBF6825DC2DA99
3405:10D4C0008FF483FB3B2E62F5C0FB0AEBF8BDC7B5BA
3406:10D4D000763FCADB8474E361F75E849DC899A3E854
3407:10D4E000EEC5247BF5F994987B90825FE3153A0AA8
3408:10D4F000FF71FCDD87E442B67EB057F54D8FCE3725
3409:10D50000398D7842503EC186F1CC361B9B9F982FB7
3410:10D510009D0FF2030A26369F81E100E8E1745E3137
3411:10D52000744CF0DE139DDFD198F9E9F4B83BCC5C84
3412:10D530003E2844013E623337110EE78BFA38D300A0
3413:10D5400081B803671B5C6939ED274B9A6482B80583
3414:10D55000179C827BE37831EDBABBB4F7C5EAE11FD3
3415:10D56000A3D05FD468043FBF5982E333E90CB80607
3416:10D5700040509A8C008C5FD9443E84FAA2AFEE20D2
3417:10D580009E3FCB6A0F62B901F2344D497217741B8A
3418:10D5900042C8C36B0A0A32FA43BD5919060FE61B8B
3419:10D5A00015A0A3C9FE0CC310987EC1AAC631846C15
3420:10D5B000259503C0A2645EE56D7CA307E01541A735
3421:10D5C0001D09781B0137B78A3C6580F0BEC2566BD7
3422:10D5D0005BDE6BA67C716BAFB67C00F23500FC1B8A
3423:10D5E000603C6FE32A88F331FB5699E9B893371A08
3424:10D5F00090EEC6466C78FE20E14EC89F09A9B4FAA9
3425:10D60000E2DC976EB3F3F07A1DF1F1AD3C1E79B216
3426:10D61000DFEF81ABDE23B93C26AEF030B88FDD62A0
3427:10D620009EFDA4594B871B2FCABDE8FC9E84BDA755
3428:10D63000ED9D45AE5BFAD1F939371858FCACD9FFEE
3429:10D640001BA8DFF721BF01AA8C25E1FB25E0C37FE2
3430:10D650004EC5F98871AA76B37355D56A437005E251
3431:10D66000AF5B02F916DDBF70CCFEB5B2FDAB3F82F9
3432:10D67000FB57DE7084ED5FFDA6BD466E8F8773CBD2
3433:10D6800056E2D901A6A71D6B661428745F524CADF3
3434:10D6900055B0AF2A995E50DC1FE1FA425CB8F2F94E
3435:10D6A0007504D7ADA737FF7C30E8F5CD064F5F1284
3436:10D6B0008597A877C8CCE2C4A659FD0D304EC5E3C6
3437:10D6C000E12A38FFBE7AFA7DF403F76DBE181A4CD2
3438:10D6D000E7DB770C37A7F071B7366F467FE656C0A9
3439:10D6E0006337B8EEFD2B404E268607C3EF3678D45D
3440:10D6F0001D41F818204FBFEFE4F728F2EA252FC8A4
3441:10D7000089141395A3347DCFCCCE31C7CC324F9939
3442:10D710009DD1D9DC4B01BD386F9A01CF534E9E4647
3443:10D72000D7CFE3FFCC8A4EBE88FD147844487512EB
3444:10D730009C730A9CFE3FEBF1E6B1A45EB47CECF175
3445:10D74000A3F7835D4FB4DBB28C78E66AEE4353FCFB
3446:10D75000D9A56B57F88015ECA1A23EE065BC730219
3447:10D760006D7716DAC138B08E5DC72FCA00EFABDD1A
3448:10D77000D7D8EF4DCBE8787D12D38F2F97DD2B8A4A
3449:10D78000FDFE77B3F03B327DC41BBDF7F777C08752
3450:10D790003273D8318DEE6F79EE2523C06145D2F911
3451:10D7A000D1F1FC9E89E6D174F95A1BC8E97D115369
3452:10D7B000DC7B04FD2D4CBF7877D90C0FF8E11F16E8
3453:10D7C000F704B83C2BE07CB7A04F6931635A9AB894
3454:10D7D00031305870B959085FE8FC8A727628203FCA
3455:10D7E0000B89465E32F93801F49187F36482716ADD
3456:10D7F0002E5527DF6E057BB903DE05A96C84E16F2A
3457:10D80000CED0DF039D34E68802EF158CCFA1E2581D
3458:10D8100082F769F4E5B7C6DC139DEC9DE529E0E5E8
3459:10D8200097F0FF415CE7A49C3B3C055A39A154F7B3
3460:10D83000837D3EF8AD1C576F7CA00D3E3E84EB2BE4
3461:10D84000160A9FEB619DB35631305D191EB1708C85
3462:10D85000854BC19FE7317B610C3C6EBE5CDD98124D
3463:10D86000070EEDD75DDD0FE4A6805F2C1C9AA02E7D
3464:10D87000EA4DA620E8814D4A18E1D844E118E07E3F
3465:10D88000ABC274CD3E8BF970FDE156FE3D169EB1E4
3466:10D8900070A4FA05EA0FE307D9D10EF636C00BE300
3467:10D8A00000AA3F34D1EF6FF651C923C0FB42633168
3468:10D8B000CEF02682B022AF489505E8977131FF0A75
3469:10D8C00095E70C1FFECCEC57C51136FF716E162F75
3470:10D8D00043E17134061E4763F040776E899DE72B64
3471:10D8E000F08F5171F083E3C1220B3FDF641237DC0C
3472:10D8F000FFCFFE64B893F185F8F2716CC4D7D60FF0
3473:10D90000D33BD8FB1C12F1B77D77D17E425E15E385
3474:10D910003FF3CD2EA48F7CE24D81F72020C810E686
3475:10D9200029E6354CF2FDD49206EF378D4FD1BE0F6C
3476:10D9300021C617FB92CFE1974F027BE11C9A4F94CF
3477:10D94000CFB5EB16FD5559B89ED593F4443F391821
3478:10D95000434744FB13EB4B4921217C3F4432E33DD9
3479:10D9600027FA5FC0D8293A9E881FB5DBA7545B58B9
3480:10D970009C0461711221DCCF3C5E9EC7DF6922E608
3481:10D9800084EFF290EF92A2F37BDA2229F86E029FE5
3482:10D99000DFB937CC0188D77850F26F86719AA5B776
3483:10D9A0000703BCA83E760DDED38F29BF74B8B11C27
3484:10D9B000CA69BD79588FAF6BA1CCEC64F4FC8FEFD2
3485:10D9C000A1B4E7E3CC9E46C94D211AFACCB332FA92
3486:10D9D000BE95B8BBE37B69C4AF40DA6861F7D06E2F
3487:10D9E0003EFC18EEDF5BD69BDF007A2B224105DF81
3488:10D9F000F971E9F1B0433CED177BFEE5EFBA28ADD4
3489:10DA00009900D77D966BFB801C13FAC2FB16DF1FB3
3490:10DA100060BDFB2C8C3F1FF58E7817E4C2ECDC61F7
3491:10DA20008786D3D460F6E1BB0BF7025E5178E6003F
3492:10DA30005ED1B6FBA0EB2E88576F5846C0FDFB1891
3493:10DA4000BC32337BDA6CCAB6601D796BD46FB4F329
3494:10DA50006A8317978B1DE987A4912AF4E9F0DE0207
3495:10DA6000C3CF7D165300F4B6BC87597CC41CE27F3B
3496:10DA7000BA5AC2770074FAFA5C0BB37BCFFDB505D6
3497:10DA8000E99C36DE50097E2E0B7FCFA11F7B77A746
3498:10DA90006DBC6A4D7BD877733AE2E15CEE3F3C2E79
3499:10DAA000B173CB5C4B21BBF7BB5EBDA8C5C7D8F13A
3500:10DAB00013F61BD36E9FC4EC24FB5437C6838976C0
3501:10DAC000E72D4C8E5F34F7DD60B8C27DF079E64E0D
3502:10DAD00003959468FEA4C532239E5E20FA6B3B97A3
3503:10DAE0008BF30431AF6EEC1E3D4FAC5EA11ED09F98
3504:10DAF00027D403FFCC79C2F5887A60156DFF848145
3505:10DB0000F9DF88E2EB3F59A30775B1327DF080CD94
3506:10DB1000DBC54AD327B8DE48359CFE5A7BB5A897AB
3507:10DB2000BE348F1C1B167DB74D52E80CF1DD0DFF86
3508:10DB3000729043CA0C827281F29F7BE2C50BD9EDD1
3509:10DB4000793D601C41970F1BDC35D52C8E01FDC043
3510:10DB5000BEA5B351CF9BBAB404D396A397AF01FA35
3511:10DB6000CCE3701E60E5F69324463792E41F60858F
3512:10DB7000F87CAF6C073FEBC27A99FBF1D87B575327
3513:10DB800027C869F0FD9859C5F3E13E3BDBEF63849C
3514:10DB9000BD5B9377D0E4ABA3E965923BC1AAD13BCF
3515:10DBA0002F9302CC938C74F46B8B7B8CC748169BA1
3516:10DBB000EF1AE637B8B8260BE39BF7A97A3BD5589E
3517:10DBC0002BD393C75AD9BECFE6EFDB019EC13B13DF
3518:10DBD000B31537DA0D67478CEC7D353A0FC4438BAC
3519:10DBE000BE9F22DE4F515B3F04EBEFB3C4F6A3B000
3520:10DBF000FE393EC7C2FD354B7E31ACE732F14EB047
3521:10DC0000221EBA15804FDEF0C6C3C0F73AE6F30114
3522:10DC100009F87CC56529D413EC68752A9EDB9AB98E
3523:10DC2000DE7FAE6E7FFA6C9A96EDF8C001E7C3BB5B
3524:10DC3000F93E9D539AF03D8A452FC9789F9AA26F6D
3525:10DC4000FA8FB0FD9C6C761F84DD6710F2EF866F53
3526:10DC50007B77F7613D763F41E85DF9E64010E6B736
3527:10DC60006FB98CF62A2A1F75EF9314D6B17B0BB1CE
3528:10DC7000FAD812ABCAE338D93E2E71B17112D17302
3529:10DC80005EC44A821A7ACE53DC0ACC3F2FE220418E
3530:10DC90000AF773A737AF9B48F13C90A1E2F98F4A8E
3531:10DCA0009B46D407A3FEF1467847AB91AFE740DD32
3532:10DCB000D469F0EECAEBA472D5205AA720EC4F65C8
3533:10DCC000C44D4F6FD9517DACD0A5D70363F5C4A225
3534:10DCD000864757C11B2DCDF001C6379B30BEB89D7E
3535:10DCE000FE68BE39AEDE48C8A3883F37BCF4CCAD71
3536:10DCF000F02EC50D670C2E98DF34AB9BD153DD257C
3537:10DD00007C37A19C84A64379799DEC0AD1560748BB
3538:10DD1000DD75202F857C1770095DDE6FF6801CB0E5
3539:10DD2000C8AE15B04EF36D3688BF18DD323015E43D
3540:10DD3000DC3EB38AF6C93C4B5FDB1C0D3EEF4B6506
3541:10DD4000EF091C48EDADFF6E5E771DC8BB5D3C9EC4
3542:10DD5000ADF1E49DB630D69B9A8AFA9A90EF317A6B
3543:10DD6000ACB0838DEF2BB7D9C1B4FA2F91373C6E8D
3544:10DD7000A1E5B75EABE27DB88230F3A7B693EF972B
3545:10DD8000FDABF83945F7BD88EB0DEDE47D14CE3AD7
3546:10DD9000FDF4552BD7CFDC6410E89BA1CBEB16E24A
3547:10DDA0003DDA8624D70AB433307DA6E578E9BA098E
3548:10DDB000F0FD6D99D94D2ECB4847FBF62CEC19D6CA
3549:10DDC000D02F9514B86F5F0EB970FE35BA2F5F9ED5
3550:10DDD000B07A028877B5D7C5F79705399C425D9927
3551:10DDE000FD3DD095BD8FC1CEA33745CFA34DC00F0C
3552:10DDF000E07D19101B191B8E18E1DC7C8EAAE888C7
3553:10DE00005F74D1805F3779C3B24B339FE356662F7F
3554:10DE10009866F51E023E122079DDA872424AACDEF9
3555:10DE20005C880F6F9D4C5C9BE97A769FCE93549AE9
3556:10DE30001FB325CB23D1FC4E5038816FBE24072160
3557:10DE4000CE6427DC67A3FD2E68AA3666D171037500
3558:10DE500032DAFB1770BBF969359099ACC18F5F2638
3559:10DE6000B1714FABFEDF423FA73F31A11DFCF4096A
3560:10DE70006B5C797B7B12E397AF71793624C98DF99E
3561:10DE800050F3ABAF77A5F30A455C4300EEA5DB2E5C
3562:10DE9000C8F09ED28D5C2F2B7EBC6915D86B266E88
3563:10DEA000685580EFF882AE4210B553B6795490436E
3564:10DEB000D3B6FB54D8DEE97595189F34A3BEFA009B
3565:10DEC000E4EF0CD562FEBA24FFDF00AE37AD69DDAA
3566:10DED0000FE8D2A79A28F8BECFE74CDF4AE3F3E871
3567:10DEE00015F1EC732236E71A00BFDBC67FA84901A3
3568:10DEF000957EE22A363EED4F4D82FE2A5BF341AE1F
3569:10DF0000652E65FD6592BDCB9DEE68BF632F3749D9
3570:10DF10005A3B42DE4F16211E3DFDE0A29E60670F78
3571:10DF2000FCC944FA66719A4885EFDDF9FDB270FFCD
3572:10DF3000293ABF74C8C4F08698592AF0C96B66782C
3573:10DF4000E4B2825EF0E3272BAD4017A93EB7511B28
3574:10DF50007798B7AE78C09B80A71613DAE3BE1CC2D1
3575:10DF6000F4F62F1FB505F9F97400E0AD9053B363D3
3576:10DF7000FC2E513A67784FBB08C23C444AA4152E88
3577:10DF8000A2CD935006CCAB4712E3633546F74C184D
3578:10DF9000AFC66A72C178B3CD7D8DC097DAEC9A3C7A
3579:10DFA0002E6D34D72B779FDE9702FBFAE590E5992B
3580:10DFB000A02F870CBF413ED4115E3D66F566273128
3581:10DFC0007D0EF57B517FD749EB409083AF097DCB28
3582:10DFD00033AB27AC57B49B9AC4F4A89DDC3F27E829
3583:10DFE00020B58978370D445079776AE0313189C995
3584:10DFF0005191EE54DD0146472C9E73A73D64EE0D12
3585:10E00000F4BAAB37E6537DC4E681F895FABE1EF04C
3586:10E01000D3503A9F98A489DBBB91D37F6A532BD20C
3587:10E02000DDD59E034670F886945A4E3F04F910D011
3588:10E030000FE3CFA16EFC1D1EF4FB015FE0FBD34597
3589:10E04000CAC03870DC67B1EE544EF7F773BA0638C1
3590:10E05000407939CF8BF2451C5E85F240A7366EAC15
3591:10E060009DDC5E9A41403F2C5CDA15D3724E670B03
3592:10E07000CC8FA29D7441EAA3681F4DF55663BAA0E8
3593:10E08000A01ABF676C9885F8B1607DFCF7C5DEE229
3594:10E090007AEFB9D306F68E94C1DA15F04F9437595A
3595:10E0A00055CE0FFD0F023E9CA95BF7E46077D4DEEE
3596:10E0B0007BA686C9C112AB5EAF5BC6F161F7E7FB19
3597:10E0C00052005FBEB4544FBC13E8648BEC5A0EFB95
3598:10E0D000585328B9E3E09F16CE00D78A9A2FD0AFC5
3599:10E0E0005A4EC2E8573DC3F53137F79F0A3F6BB030
3600:10E0F00086F1D7D32AE3EFA7A51409E803F83BF08C
3601:10E10000D9D3271EC97C10F048B2A35E037C738765
3602:10E11000063F166EDF54D595FEF3A6CBECDE4E48D7
3603:10E1200021362D7F167822F86DECBC37F17D1578FD
3604:10E13000383A2A87362571BB686FDA6FF9A317D191
3605:10E140002EFA32DFBF1AC037A0E73502DF8618D8B3
3606:10E150007B697A3A1EF903F1EF5D8F3D95897687E9
3607:10E160001C4AB7F0BE1AD0751CBCD8C3F1F231AB53
3608:10E170007F17CC3F96DF9F91FCBF4DE91D6DBFEB34
3609:10E18000E42D03666BFA59CFE1F1A5EAEFE98A03C2
3610:10E19000AF285C4957D8E712BA330007B241726919
3611:10E1A000E3DD533730FBFE7B9C3F88EF222FE03DC1
3612:10E1B00036FAAEDC7B494CEE1B4124670499DC2720
3613:10E1C000865BBA821C5F60F5DE827696470D04DFBF
3614:10E1D0005195F210DF536B9E38F9ED70482DBDD08C
3615:10E1E0005F42DC06F0832E78D88DE7BD15BFB320E3
3616:10E1F0009E9D4862F1112B6A54C4B7336A35C6E15B
3617:10E200009D3951DA13FC2D814F981C4A044F813FF0
3618:10E210003B39BF1178D76B2DC3BB1AC56B05BC1337
3619:10E220007254E0E7992D370F057A13EDA378E31ABE
3620:10E2300022F06616FDDE6B4D5886FDA1FBD60A70F6
3621:10E24000E8BDB615F957A27D137E34B17F82AF0FBA
3622:10E25000B319747E03838DCD3F3581DF3F2AD7F418
3623:10E260007C98EE87641BA1C77FB85A29E8A9B90337
3624:10E270003AB8C7C6DE77AEFACB1CF4DF0B3F8CF0A2
3625:10E280008F8AF1536C0C1F12F9515ACCFE4EB618FE
3626:10E290003F9F1BF93AF39B88DF33B0780B8B63DA2F
3627:10E2A0000545C02F8E5B83DAFBB9D72AC4AB0CA51A
3628:10E2B000D861CBC2795D0BAC82E653971A491F7ABD
3629:10E2C0007EFA72D4DE4607AD3FA1355C7C3D5DDA57
3630:10E2D0002E6378DA24B0EB126F29E8136883073CC9
3631:10E2E0006F66FD1257AD6E9E03389CC5BE887527BC
3632:10E2F000925B89F6E31E1BF77BF1F2583A37F2F294
3633:10E30000D39C8E3AA6D38013E8F42612580EF1154A
3634:10E31000F4A08D71696D744A0FDED07F01EF577CD8
3635:10E3200017F938745A604BD3D06924CCE894D3A33E
3636:10E33000B346F5C6D34FA6D8983C72D614E6823CB5
3637:10E3400071FA30AC9CFE30BA5E40E91AE83500F450
3638:10E35000D919E0C9E8AC97B71AE3197BD530BDFAF3
3639:10E36000CB64B6DE05377AF7C27BC80BA85E2FD127
3640:10E37000AAD59CAE13C33DE494987C72023FB96960
3641:10E380004C381FE4AD1BEC169DF1575BE0A68C1DCD
3642:10E39000438221BAEFEECB84F189134FDDFD20F0EB
3643:10E3A00087476D78AF49C89FB424FF3CC0CB44F485
3644:10E3B0004CF1D20B76A7C55FDBD8F92F81DF7BEC60
3645:10E3C0005203E99382785EA1C5F3B1BE5619E09A73
3646:10E3D00092E4CF5093E9F836EF38730FBABE2CAA07
3647:10E3E000DFD2FC4F697E2D5DC7D64E61C2F355B6B4
3648:10E3F00051FFB83D2EB0F6A6D7C1BFBF25C9FBEF70
3649:10E40000308F16B32F00FB7C53B75619E395AED26D
3650:10E410006F5F017638BA9EA3B70DF8DD2CFA75F65A
3651:10E420001DBE2A2815F6E291DC5E5CD13004EDC8F1
3652:10E430001ABBF12F6D57B01B7734AE83D33DC56F38
3653:10E440003CC739725A65E08B82AF6CB475E2F81C38
3654:10E450002670AE10F4057C09F45A113F00F6433BD8
3655:10E46000FA2382887F90770E8DF29BB5D586B8F11E
3656:10E470004DDB6DB6B87C9434FCEDE507C53B8A8C6A
3657:10E48000AF6EB769F48A9AEAA3E94C4F65EF92DD63
3658:10E49000CFCFF2EB5678DEEB931ABDD73CCA640CB3
3659:10E4A000C07B8AF460E67669E223A506296487B812
3660:10E4B000BB6F6811E0D137064CD7FDBBAF280BEC22
3661:10E4C00025870D9E1504E310103E393D09BEB35358
3662:10E4D000CFED9CB9C76C5EF0EFB74866E49F2D475F
3663:10E4E000AC01909F2D7603DAC71B779B902E2EF5FB
3664:10E4F000B1723B465067EF10FE9A4B6FCF4901BE99
3665:10E50000FF24F75B3E79C735687F14765945A13003
3666:10E51000EF04662976EF326F6957B49B0A3B6DBAF8
3667:10E520007996C4828458FF8A99AD2B5DF14B60FFC8
3668:10E53000DED4417CC35F6D46A1EF1E06F8563C1445
3669:10E5400036C27955E8BB421EF76CEEB517E21C7A6D
3670:10E550001631B3D8A6668301D6B789A25172567B0D
3671:10E56000BC12F8B3A97D1CC1099B865F4E5ECDE24B
3672:10E5700008DAF2BCDD6F791CC1D8E3475FC4F7F25B
3673:10E58000CCFE8F74ED0AD3ACF1DEE19EBEF4416C9B
3674:10E590009F08EFA71BD8FB3BB1DF4D76CEB795CADE
3675:10E5A0006E78FFE9AF3F4E72C7B1C74CFFCB6CFC32
3676:10E5B0003D11B1F6B3E8F8FFEE29A0FB26D9DBFC4C
3677:10E5C0009499E037EBC84F193BEF43AABF473CF99A
3678:10E5D000141B4727C66BDF9E9DBFDAEA19897F8728
3679:10E5E0008DF53B54D36F8E9DE93DD32582F1EDE44B
3680:10E5F0005B82725AE009857B373B2DCF7EE7D830AE
3681:10E600002BFA715A65E003970EF7E98EFEF304E7E3
3682:10E610004D311F42FC7DE3C5694C877776E2AC6FD4
3683:10E62000849DC9E7E92AF3374877F4C5F3FF748B73
3684:10E6300049D2C6E567D9251D3D097BF33ECB48BCD1
3685:10E64000BF0876F978F08BF5C366818F348DC1C52C
3686:10E6500013079F84DF4FC0B92AD79BAB30BB18DEAE
3687:10E66000434BF532FE995A44D07F3652F2223C6E2B
3688:10E67000B6337D69138F7FBBF4368B57CDCE75E3F0
3689:10E68000EF71A272A2D03E02E3A95E3468E2A9044F
3690:10E690009E543D47E5B1CE6EC8E84A9C9B93391F16
3691:10E6A00076C17B129A7AEE87800744E540F755667B
3692:10E6B0005D3E73898B281A3991ECCDD0E5BBFB5CAC
3693:10E6C00056382F752F72EBDA09BC13F17CF8930AD8
3694:10E6D000EB76A1DDA9139FCF48C98F78037C0DECA1
3695:10E6E000C1F7F27DA2EB9D037834B6287C498B37C5
3696:10E6F00062BD1DADEBE83237F2C2E3CBE87C295FA7
3697:10E7000098B3366B7906C2DD45E01C71729919BF6A
3698:10E71000DFCBDB273F3E0BEFC926AF72A33D36D9D7
3699:10E720005BF93ADCE349AE74E3BD81B9D59204E705
3700:10E7300074CA67B0DDC6652E4CC57EBB68B9648BF4
3701:10E74000BE239E487EADB2DB74FADE15E4D72AFB09
3702:10E7500088F6F2CB60F6BC097EFDB206D90D78B121
3703:10E76000B2B813C6F7AEAB65F7D9F637B0B8BA751D
3704:10E77000D3991C11E39E7FC989F2E2BCF87D29DEA2
3705:10E780006FD2A7A0BFFF9B74E0B39B6CFEC7EC1ACF
3706:10E790007EB9AE618485BFAFAC933FF4C705F71B6C
3707:10E7A000D0C726819E34648DD21BE9FE29684FE6CE
3708:10E7B0008587597A039EFA3F8077482F1DFE3C13C8
3709:10E7C000F64FF8EB843F4F8C23FC7D92E47F463B71
3710:10E7D0007E7B7F9EDE0F253BCC18879B23B3385C66
3711:10E7E0008D9C25B08F2B411FA478B6F28815E1B11E
3712:10E7F000F25B466F749E2FC0388DF66CC41F214F9C
3713:10E80000E93C07BF4BA2F3AC30B4666ADF21D5CC3C
3714:10E81000B3FECAF38C8953E5F392ED0ACEB785585F
3715:10E820003D30AF7AA3E7B01FE4EC792BDAED5ABCA8
3716:10E830003758E03DD916728305DE99DD6EF337C295
3717:10E84000FECB3D5A1DA067EF6F18D61FE69BC8AFE1
3718:10E85000DA6CCB7B03E645D7F716F20957F8D2F30B
3719:10E86000EEE8FAAEE08F7D0FDA7D8FF51FFE3EEB0E
3720:10E87000AF80DF8FC10CDDA84F499CEFC6E295D475
3721:10E88000B0F76B880FA2F4837199814C125C49E157
3722:10E89000543588E117994BF8EFC7D1E3C1269BEFB8
3723:10E8A00034AC57D0DD15E0D30CF37EDCE63B0FF53E
3724:10E8B000611E70CF83F299562EAF5E341AA27A543D
3725:10E8C0004A0AE357ADC904E36762FDDD76FB94AF06
3726:10E8D000A05D7A3FBFE41AF8BDF09C38AE08BF10C7
3727:10E8E000C63D887BA665E09785F8AD3AB559FF7BB4
3728:10E8F00074F470D86EF359A1DF401E7B2F0EF06ABE
3729:10E9000025B9223C1C0E84873FD941E1615729BEBD
3730:10E910000050726665009C5BCC2C1E60E772068717
3731:10E920009677181C761D37201E3F410620DD0D35D9
3732:10E930005CBC1BFAA7FCA31BF433A6B55682F36F8D
3733:10E94000E712B701F86CB7568F6CB832DEF6743048
3734:10E95000BCEDE560FB703FECC3B0B7995DE60A78AB
3735:10E960007B0D8CF73DE07EBD63C4D5F3178A57C39A
3736:10E970001C1ABCBADAB82889DF8F8CED8F9E87D03D
3737:10E980004FB0779709F951F94E761FB47CCF293CE7
3738:10E990007797BF6A42A42C78D5C2EE35D4B1F2F392
3739:10E9A000B9F1FDF9631CEC9C55567B9F472F77030B
3740:10E9B000F8FD97DE8BAE3E72D43F9A3281DD13585C
3741:10E9C0006911F1A0CC4FEAE07896D2C3E705B9927D
3742:10E9D0005248F0BE80C3C6E206DBDF0760749BC608
3743:10E9E000DBB95C6E09E01D7B3F200DDE8B667E6E21
3744:10E9F000C417D960F580DC4F298AA9672B423F6A8A
3745:10EA00005ACC7D82390EEE4735920CE023B596F84C
3746:10EA1000F7805A1D42AFB3E2B94EE1F36AB41BD995
3747:10EA20003B2E7633AE7B71324929C6BC82F23CB6AE
3748:10EA30001F91267B0DBA7B26294556DD3B0A69BE10
3749:10EA40004EBA7CE7195D75F5BBF87BE9CABB950C3E
3750:10EA5000D095F7A81CAACBF75C7A83AE7E16453812
3751:10EA60006DBEF79A5B74F5FB564FD1E5AF5D7FA79E
3752:10EA7000AE7EFFE06C5DF975DB4A75E5836A17EBE6
3753:10EA8000F2D7D73FA8AB2F27D0B35F72B0F38E2C4D
3754:10EA9000F46CFB703FDE2BB29B2593E63C57CDF721
3755:10EAA00023D7519401FEC755F6711970DE6C4CCE18
3756:10EAB0007686E3F42BD27FF41CF6BC436F3FCBE3A6
3757:10EAC000F6B3F3FB281781DF57B19FE201FE7E26E4
3758:10EAD000FFF30E6E0F98E586FAFCDD0AC583EB980E
3759:10EAE000EE30A35D2CB6FF6A873BEEF94936785CC1
3760:10EAF000C552627809BCEC085E2FF3F9FFB3F03A17
3761:10EB00001413F723CE6FB1EDCE390C5CBFF637018D
3762:10EB10007F6B3BA79156D987E7B4CFCF0708F05357
3763:10EB2000827A4B223D408C2F49BE4FA09F587EEAEF
3764:10EB30005B3A8F9D330D5EBC8F95E8FC76CE117BE2
3765:10EB40007E2B9C81FB916CD4C1E9D3363AF7EACE97
3766:10EB50006FAB92B3F1FCB64AF5665CCDF9ED5307A5
3767:10EB600032270A77373BC78AFD347ADCEC1EA75E72
3768:10EB70007F69AF6F53F947D7B90EF43809F4B2146F
3769:10EB8000A67FEF64F7FDC5B857A16F13E755E8DB23
3770:10EB900026E259A3C8B85F4627AC7F5EF87E8BFC9F
3771:10EBA0000FE9D74EE7F7907FEFAB1E8CEF7F7F82A8
3772:10EBB0004CE0DD954B4523F19E74227CFC90DB5F9D
3773:10EBC000DE7532F87664BF787F59C915EF57BC3FC0
3774:10EBD0009EC5514E89795F778493D1CB2427C7078F
3775:10EBE00013B3439C7BD98EF1F0E76EF9087F2FD2E7
3776:10EBF000B9BA61C303F87BC03C4B206E2660B3A357
3777:10EC00007D6FCAF811C397DB3578C47FDF58FE2BC0
3778:10EC1000EF38C07E336547EFB4802D31FE4CE2EB18
3779:10EC2000234AF81A8C977EED0CFE3E9A29BBFAA671
3780:10EC300031FBA23ECE2CD6EE33656939E29BC897F4
3781:10EC40004508C695B5E515769FB82CA2601C5A17E5
3782:10EC5000279783DC2E94105E5709CFD8EF029EEFE2
3783:10EC60008F3FC3EEC55BE2EB1B3F71EAFD16B1F7C8
3784:10EC70005212DDB798CDF7E952D128BC5F3FC5E805
3785:10EC8000EE7B35762A01A7A6CBA792802FEC81FBDD
3786:10EC90002E71FAFF9193F1B33DDE13296096CE35C4
3787:10ECA000B7E603FEE7723B789C78FC0AA0BBB19103
3788:10ECB000A21F241E7FA993DBED78BC7B81D3CDFD01
3789:10ECC00092FA78FC8EEE134D36C6976FD3A2F0FB06
3790:10ECD00008E8F5FE8D2AC6EDCDA7730880FD6D937B
3791:10ECE0008AF6B70F2E9B08F8414E6D509F8138B3BE
3792:10ECF000928DBD373E4EF325E34DE8B799BF89BDF0
3793:10ED00003342C65B82E07F2DD9F4403ABC1BFE192A
3794:10ED1000A5DB4554699ABFF1098C7BF9E0F823180B
3795:10ED20005F7D06E8997E2FF9F667D301FEBB8CD58F
3796:10ED3000D70DA1E9A2ED92EE7E44698D459717F1BA
3797:10ED40007B62FF8814BD37E1A6726433DF2F21AFE9
3798:10ED50008745FD5D9B9DCCDE8171F0E513D8FDA854
3799:10ED6000FD27D9F9FD401F16DF171A7F7BF110BA76
3800:10ED70008EF169EC7D96D8784002CE31783F85C718
3801:10ED8000EB8EFF4469BBC7C2CABDB642CDFD80D77A
3802:10ED90009755E2BE8CFF35B39B8CCF6271ED09E3D2
3803:10EDA0000433DAC5F9F703B9D92E3E307A7FE76824
3804:10EDB0003CBCF9430C5DEF3FC9E201E7BDCDDEC7C6
3805:10EDC000EA886F7EC8E7FDC1F101773D4FE1F1416F
3806:10EDD00011E3E21F5CBE7935BE3FE39308C4659E34
3807:10EDE000BA1CFF9E58B253E84DFEB6FB34B03F53F9
3808:10EDF0008B16B4E5812C6FF3DDA7BB6F73F5FCE6D2
3809:10EE0000CAFC64A593F91162F97B2CDEFF9FE2EF47
3810:10EE100053C61FC884FBF734FD1DDEC3DFC1F86392
3811:10EE20002C9DC7F27331AFD8F996450CBAB8E16999
3812:10EE3000C0074668F9B911F93C55EFD9BB30D94A3A
3813:10EE400070A5847A80E4A270186E0BA6E4D221FE2D
3814:10EE500007B1ADBCC8008000000000001F8B080097
3815:10EE600000000000000BDD7D797C54D5F5F87DF3C2
3816:10EE7000DE2C496692C96412929084093B15718018
3817:10EE8000B008A82F04421482032AA2069D84256C90
3818:10EE90002191AAC54A9B810444441AEA8614ED4094
3819:10EEA00041F95AF41B116B6C834E04115C6345C528
3820:10EEB0007E15C3229B2811AC1FEAC6F79C73EFCDC9
3821:10EEC000CC9B4C58FCFAFBE7173FEDE5BEBB9FFD22
3822:10EED0009CBB4CAD737D82BF2F632929EC369F9D6F
3823:10EEE000B1B3F87755383D611F69760E62ECD138C1
3824:10EEF000BFCD990AF5DECC1CC912191BF856BDE22C
3825:10EF000087FA271536B93E46BB1FE34C8C41BB2D13
3826:10EF1000665EBE05EBF50D97A739F37F8C83FEB6D1
3827:10EF2000DA20857A8CD99C877A3396C74C2C496530
3828:10EF3000AC58F1A7E17815B69695A5503A6FF7B79A
3829:10EF40001628620F5BFCE95A1E63814C8B77636E57
3830:10EF5000FB713D4EA804EDD2168C6407073266B5EE
3831:10EF6000B140DC00C6148D05CC03701CFF2213B425
3832:10EF7000D72633B65C61AC19E686F559EF74134BAE
3833:10EF800063ECD736467F81910C27C30207E28335B5
3834:10EF900030CE8F4CEF8970F889E9BD705E9F30BD2F
3835:10EFA00037A672DC5AB14ECDC4FCCFC58047A953F9
3836:10EFB000E1E3305F4F9F83B1E923993F121E321D79
3837:10EFC000E7D4A85EFE2337E5B440F9E7FB6FCE61D6
3838:10EFD00090EE787848524B8CFA32FD437595771451
3839:10EFE00034BDBFDA4F6912633ACEE781EA99DE5148
3840:10EFF000DD1973421EE735DDE2EB991CD1CF65CEFA
3841:10F0000064C253E2E55B9ABBBA193BB442752A1E4F
3842:10F010004899A908DB1F0C26156DEDCBDBB90DED6A
3843:10F02000F83C55A633D60DD66DD7BE6B11B03BCB91
3844:10F0300070BD8CFAED689DA5024F16E6B5617BCBDD
3845:10F04000816B6CAC2BF4A7E84ECC4B7AB81C4640D5
3846:10F050007AB8173F5D0E74A7F86F71523B3D459625
3847:10F060009FCDC5F18B282FC767592EC6323A861718
3848:10F0700053743FF67394E9A598365802973861BDEA
3849:10F080000DF16C662C7A2E17F8EB21D6C598DD7938
3850:10F09000F812311ECC6F63823E1BFB3969F3CDC57C
3851:10F0A000F4CACEAD352AD24D9C53D46F61887728EF
3852:10F0B000BF1DCB597A0BBB16E07D254C763964FF1A
3853:10F0C00071F400F3009C125B0F310F8C9F88F88B5A
3854:10F0D00001376B32E7ABBF3356149BEF142A5F281E
3855:10F0E000E6B901F8C5E40EF3CB53D0EEB9BEC8774C
3856:10F0F0007EC177FA350CCA37FCD1A52C87F2AEBA9F
3857:10F10000C784F4E16E667A10E121E02EFBDFEBB4F8
3858:10F11000101C900F9573F0E1AA8BE4C30D7F1C6760
3859:10F120008AC379FE96797B78B0DCB3D806F927E6F6
3860:10F130003BBDCB21DF6D05101AD4CF5E10BF5E85BD
3861:10F14000FA6B9D7C9D5D1E628BE3A076EEDA560D18
3862:10F15000E5C3B885CD9A0DEAE7D6B668289F5EFA72
3863:10F16000ED9A1CA4AB639F5FA33AB0FFAF65FF00AD
3864:10F1700020E0F7E14E8E4336B4B40BE267B393C39D
3865:10F1800057AEE38FF1FEA7089F55AD0556A896B37D
3866:10F190008069282F8F29FE3FA774C37EE32707FBD2
3867:10F1A000227A39BDBD74F8789F32C8BF24F95D1941
3868:10F1B00099C9D2191BB1C14CF01CB1E1E15B11DE60
3869:10F1C00023368CD114A8F2841652345C6795AE05B0
3870:10F1D00020FFA6D34CE31FFB7C761705E7FBB19518
3871:10F1E000F58801DF9D62FD9B9D5C7EFDC3129B6ED9
3872:10F1F0005F6D933B9C9F863345CAD757857C4DEC0A
3873:10F2000006F09877F72992AF7F717AA8DF27B4FAD2
3874:10F210009D99342FE60DC0A7D99BDE23792FC79186
3875:10F22000F5E66C5EB714EB65DDE1ECAF7AB05D4BF3
3876:10F230001CD2CFB7711C5FDFDE1D1F5CA410FDF771
3877:10F24000F75D1A830F59C86A4A270CD878AADB4C95
3878:10F250004301AFADADF928F7A0CBC5C89785C91E4E
3879:10F26000035ED6B53AE3915FCEA70F0E087C5E2809
3880:10F270001D6E4FE67C03F25F473C05066BC11AF832
3881:10F28000BECEEE3F8AF23FCF1E4CC9872AB5E7D7E4
3882:10F290009B2710BEA0374FFE2CBD29F4A5D49F6D2F
3883:10F2A000E5029F35427FC6D09B3FC6D29B6E16BCFF
3884:10F2B000BF1FAC879D307937B2F6E32E14FD9E8CCC
3885:10F2C000D7D564187F84C27C386EE289034C89905C
3886:10F2D00043F3045F6F1174F0948BDD3621C63A66F8
3887:10F2E00009FA3495B45A5AB09F4685E8BFFD7AB9F9
3888:10F2F0003C01B998928C7CD605E4A6D25E6EC6C05D
3889:10F300004726CEB3F35BFA76249261C91B1200FD47
3890:10F31000E7C2474E32E143EF82A984FF80B3EA6D32
3891:10F32000BEBEEDE1DF3399CF7F9843EF81F54F0B00
3892:10F330003EEB082F8392393E0A93B93DB3C521EACB
3893:10F34000C519EBDD96CCE13C35D9C89711F81B9473
3894:10F350001C037F520E9F8CF70DC575FFFDE89604C8
3895:10F36000A4238927297FA2F115E6B345B41E807333
3896:10F370003EB68FD63FB27DB41E0AB70FD07CD721E0
3897:10F380001D21BF211D79B89E58D7373C3F49E7253D
3898:10F39000627D67E3F5625C4FF43C9D274CCAB9E699
3899:10F3A00099DCEA5690FF937527A5FF386A52705E84
3900:10F3B000CE564DC17939857E8CD683202E04DDF062
3901:10F3C0007EB6A3DC80F1977E39351DF1BC34DF9F1A
3902:10F3D0005E05F5AF71E8FE64E223BD14E131C5A11D
3903:10F3E0009761FA631CC7F3A0647D1AE693851D1527
3904:10F3F0003DCFB9627D00CF39D84FE22816407D78E5
3905:10F40000D5197B10442C8000E60DFA2151778E44EB
3906:10F410003D96B89679914E53125A9BAC906F7D9859
3907:10F4200079D743BE67C063B2A27EBB435F8CE9D28B
3908:10F430002F55B23B97E6B3E062EA87DBA1ACB66B2F
3909:10F4400090F437F05B24BDFE5ECCE3F7C99C2FC17E
3910:10F450000EB92799E3F977984A3B44F2514776452C
3911:10F46000041FD652BB0BE7C3FB71FD17C1877F4852
3912:10F47000267F42AFA3799E870F1F0DF3E12358FF2C
3913:10F480007C7CF8A4E0C3ED22ED880F5F13707B3322
3914:10F49000B943FFE3C9587CE816F420E91DF910F5DB
3915:10F4A0007DA39827C8CFBFC6A2F70BE0CBADB1F8BC
3916:10F4B000329A1FDBFABB40FAEFC8FE1BE23AB7FDF7
3917:10F4C000D76CE77897FC0CFCB253F0CBEB825F76FD
3918:10F4D000717EE17A399ABFDAF44D2B97138CD525DA
3919:10F4E00020FDC879EE97FC13AFBF17C967D24F91C3
3920:10F4F000F093F5FF23E8FBA848135B0F30940B0053
3921:10F50000B77F45EA8DA704BF048632E217F0B746FD
3922:10F51000A25DF9D209B0232167777179306275F362
3923:10F52000766475A6D5254C74740CA72B5D1E01CF8F
3924:10F53000D87082F1BF8885B746C49BBDBD3D1F8D85
3925:10F54000AFBD623D761787C7CF9D87841FCEE3325C
3926:10F550009A87C7B43C42CF2B2E45D21973417AD536
3927:10F56000A85695D1BC4209E042B5C9539605EDF3C2
3928:10F57000DAB7B785DBDB5C30CFAB7468DF37DC1E16
3929:10F58000C62779D7ED0E90676427EB26D44F4B73CF
3930:10F59000393D44D3FD06B41FFA46E0AB2E93F0B5D7
3931:10F5A000D2E64FC3F96DD03C26B4EB362C732A015A
3932:10F5B000C263553CD28FCDAE135FC7904359AE8B1B
3933:10F5C000B3073C2E2E87725D1720877A0BFC801CB8
3934:10F5D000EA85F5EDE791434304BC86BACE6D0F0C86
3935:10F5E00013FD5E29EAC790434370BC6839B4D5C6A1
3936:10F5F000E110834F8763FD34A73E02F1047C7A85D6
3937:10F600002B42AF41BBAB30BF52B45F5167EA4DF6FE
3938:10F61000338BF7C6F233C6B9EC063BE50AE13FB0DF
3939:10F62000C6EFFFF6DBC18C5562119FE738314FF210
3940:10F630002736D41D4843FCC39F21AEF2E062EFBBE6
3941:10F64000DD116FEFA80CEDD0077FDF62417837C482
3942:10F6500027F6639785C7ADFC0E083205F0F29D8949
3943:10F660005289C7798D8B0632F023F20FFE90837694
3944:10F67000E5C9FDDF517CE484BDAC04C7DFB18DC7B3
3945:10F68000494EBF353505ED7339FE7CC417CC6BB4DC
3946:10F69000DAB73E04EB3DB5CBE2457DAB32CFA323D9
3947:10F6A000603E95BBCC2C48728AD9B0BE994F9799D1
3948:10F6B000772D6D561331AF05447C43394BFE8C27B3
3949:10F6C00009E9D6BC4B65C887CCCDCB03CCB6E82CBA
3950:10F6D000F89B49434DCC13110F49D6E39927223E9D
3951:10F6E0009152E432E4537D9986FA9D2677359467EA
3952:10F6F000F87F6528EF3C7380219F5D35CC50BF0BB0
3953:10F70000F83B91F9DCC03586FADD964D34E47BD4C4
3954:10F71000DD6CA8DF6B7599A1BC4F70B6A1BC7CF7FE
3955:10F72000F316F4AB2FD934DFF0FDD2FADF1ADA0189
3956:10F73000409ABB039D4C631CFE97352C36D49FD654
3957:10F74000327B1CD26DFFD07263BB3AF3210ECF0027
3958:10F7500043781E617E0BD299C65A777606B8CF0BD6
3959:10F760002ADE10549BD590DB0DF9E18B378A762980
3960:10F77000FD605EAB793BD9CFACA0313F47DD4CFC9F
3961:10F78000138DE74AD635C9938774A0B2A012C6FB81
3962:10F790009C4DC6F60CE35DD06E8E584F345D1C61F7
3963:10F7A000558F8C40FA08E8CDDDD3C2EB36B3FAC1F1
3964:10F7B00021FC2EE8C429E844AE5FCE5FAEDB09FF32
3965:10F7C0006139287C0BD2D98C0685AD51DAAF6F66D2
3966:10F7D000E3AAA59D63AC93B1A005FDEDE8F9875CB4
3967:10F7E0000E37C5AD72580EC6AD583BFEB0933C3EC9
3968:10F7F000B5560D5A81AED540EF28FE30AE3F1A8E79
3969:10F8000017CB2F1E01076BBA915FE23CF1D1F436A2
3970:10F8100038C4DAC335A1B7918F241C255C1DDECC1A
3971:10F820009874E581FF387C75F64BC2F704C2372126
3972:10F830000CDF9336FF4994C3A7F77EA312DDF95B73
3973:10F8400006A21EEB482F391C234FA31C83FA3958FC
3974:10F85000BF3201E46212F473E0879EC86FB29E6FFC
3975:10F8600041997714C84545F1FFE08A888B34EBAAAB
3976:10F87000230FF035A741F5A21E3EA9D9972997D1AC
3977:10F88000323DCE3454D2126F1C8F126F4AE3F6FF12
3978:10F8900028002F68E3B760FCB5C86BC3798227479F
3979:10F8A000714E05DC9BB309A467E353283EA2338A5B
3980:10F8B000FF9D62DE1AE8AFC6F1B74BCE130F494C7D
3981:10F8C00021FFC29F118FF6436BCBE967B17BADD9A6
3982:10F8D00089E34CF0FB693D43708260573327C029B0
3983:10F8E000225E04EDD2B1FD84C7FF9880F6F04B870D
3984:10F8F0004EA9A45F3E71933D2CED83F6F67580F41E
3985:10F9000097B4D7C13FEA92C2ED985CECAFCD3F12FD
3986:10F9100076B5F4733AEA07EC8EDE68CF74942AAFBA
3987:10F92000AAA44F5B9578EFFA18FA342F4589A94FAE
3988:10F93000417FE6A5A446C4E3EE3CBD13E51DC07BB4
3989:10F94000087E7738C0AE512EC8AE198EF51F4D48CF
3990:10F9500024BA6EDDAD067B418353364F920BE03601
3991:10F9600052E85945031DE20AB7ABB2B9FA6A03B1CE
3992:10F97000BC4F128BE1A7C87424D64B89882FC619B7
3993:10F98000FDD1A503F8BC8A53B83D739FB09F4AC50B
3994:10F99000BA2B310E97128EC3554EE671E687A3E25D
3995:10F9A00097A5290EAABFC43EB214D7B3345721BBC2
3996:10F9B00069A9A218F6919253F2A9FC16D17F29F4F5
3997:10F9C0008DE33DD595CFCB1DE5BF678BFAD929BC1B
3998:10F9D0005FE0A43E886F8BAAC684E78C143E7F69E3
3999:10F9E0003F49BE192BF8A650C8CBAB7B80BC24E6A0
4000:10F9F000D2C78D86F251A29CA96BF758A17C6C2FBF
4001:10FA000033433A1B857209E5BCD37CA0A57758CE59
4002:10FA100017F6AEDA81E2614C3A7C8F902745CCD75D
4003:10FA200019E9E06A8FF1FBD83D85C7905FC7328D39
4004:10FA3000FAA1EFB91CAE09AE30BDFF3EA54D1E794F
4005:10FA4000CE025F87E2FD0F1663FCE16DD5BB9EB56C
4006:10FA50005FEFFD026F2B849F82FB48E87FB844DA9A
4007:10FA6000BE3E87CF6B76DFFD044F0DE0097C1BB2F5
4008:10FA7000B4D424E1381F301A2773A6DE84F9413E3E
4009:10FA80000FC338F1D25C66F7227DF637511CC4ED06
4010:10FA9000778EB240DEBD963C1566D658C031202C1C
4011:10FAA000179E4EC925F8AF60354D49503F69EDD7D7
4012:10FAB000AC2BF90FCE514E9443D358CCB8E646B197
4013:10FAC0009E098F77D5D00F4BB2297A30C63A368A45
4014:10FAD00075805CD880F2E12ADBFE814AD7B05C41B8
4015:10FAE0005796FEEF9029B85169DFDE662F781AD756
4016:10FAF0003F6826EB20CEC9E731DDE6ABA77A7B3C39
4017:10FB0000B43F512EE5F33413D3806E6E126473D379
4018:10FB1000DAA6FF903DF0C3D9B3AAB4B319F5CF70FC
4019:10FB2000BFA07CAE2388FB07E58DB9018A0FCD54B9
4020:10FB3000685FA3B2F13D1FE6CBF3F29C24D7121409
4021:10FB4000E5706F32D11997631A3B2CE945158B820A
4022:10FB5000FE270BBD20FD79D0032B1200FEE56BD7ED
4023:10FB600035654095FF01858F78DBABFAF7DE03FD45
4024:10FB7000DE00CA69C1004C35564271F474EAE77A76
4025:10FB8000D14FE03BA61CB685C7BDA17137AD67AFAD
4026:10FB900099056C404CE6917C68F36F93687F15F48F
4027:10FBA000298D3BC956371AF5DC494B6B3F2FFAD7E5
4028:10FBB000DB3ECA0E003D7DFABBD30E0678F84C6BD7
4029:10FBC00075E0F7A30BDF77E800BF4F17AA4588CF92
4030:10FBD0005B85DE90F03E22F07EB9DBB70FE17D5B06
4031:10FBE000F58F83FD91719205A924EF670561861158
4032:10FBF000F6C39C4D0968D1B4E52BEA530C79A907EB
4033:10FC00002AACAC2A565CB0B39BFBF3B336AFB374EB
4034:10FC1000F6E0F8FE561CFF28C85BC4CBD1AD8E20A1
4035:10FC2000FAB3723E659BFB5BD0BEF8ACD1CA42E82A
4036:10FC3000AF68CD6666E77244017AF00BBC47CF73BC
4037:10FC4000E7CB09D4DFF487B9DC2985B116005CFD68
4038:10FC50008DB348BE44AF63FAA79EC24E00EFE9F7EA
4039:10FC60008126F7F0FA0B016FFE05F77E8DF65AF448
4040:10FC70003A4B034679337599312FE560B9C037B0F7
4041:10FC8000DF32B47BA7D719EB9537DE4FFD97A39CE6
4042:10FC900092DF61FDC96E61870E6643502ED5D8BBD9
4043:10FCA00026F9CFA1774E548381DA93B1E3D5364A52
4044:10FCB0008F56334AF7A5707A9DDBF8DE5D4837F33F
4045:10FCC0001A9EB3603FB5C1D1CE6150C5DA081C851C
4046:10FCD000F625EE1743D329B85F0CF3ACC18964E075
4047:10FCE0007EB2AF9B1BDA9B9D51FBC7627D2502FE56
4048:10FCF000CCEE22FA2AC1F5F4C3EFDA3791EB39B52D
4049:10FD00006BA00DC7EDEB16F27608AC4BBDF075C9D4
4050:10FD1000F5C8F5C9F20A15E82C467B49DFFB84DCFF
4051:10FD20009AB661C2D24C0045CDB623E41733619731
4052:10FD30006B023F9A7D39D9E51A03BB9BAF53D8E5D7
4053:10FD40006C0FF2ADA4B3683A2A473820133B793BD5
4054:10FD50009BB0D7DBE8A7F1018287C433F0473ADFD5
4055:10FD6000C70BA5E33E1ED0D1A1283A32E4A7D7198C
4056:10FD7000F35F995B7290BF815E0E45C2F7ABA8F34B
4057:10FD800023321DEEEE4AFC36CDA3173AA17C3AF39E
4058:10FD90002D75D2FAEB082E47B5BA9DF720DF6DE03E
4059:10FDA00074FF99C07B83DB57EA267DA5F7437D3539
4060:10FDB000727186EA867AA52B1427F2D3D4DAFE85EF
4061:10FDC000C88703984EFD4DE9C0DEAA7173F89755B8
4062:10FDD0009999059465198C8172AD6CAB1AE4712BFD
4063:10FDE000DD5E0C789829F05071DF73960C486756E9
4064:10FDF00095733B20C8F905E04A76C0EC154DE457F1
4065:10FE0000835F1193DFA41EA8A8379657B215848785
4066:10FE1000CA287BE0F792CFBCCC8BF4E8BFCB615310
4067:10FE200092CEBF5ED63E6E42719553BB7A907D787E
4068:10FE3000CAE3E984F5FC89FC0C8DA2F987E07780A0
4069:10FE400013E9A3D6450941B47FF79F01BF0E6D3278
4070:10FE5000A77F8805E0D2F2AF6CDA6795F429D75313
4071:10FE6000695B41F459C98C7E63293828180F2DDD50
4072:10FE70009812C4FD71E8BF5F03DA151BCD64370427
4073:10FE8000D8FC740674E65B62267958D6904C7E6B7B
4074:10FE9000592DDF4729DB9C1C54B93FBE07E31012E4
4075:10FEA0000FFB6B0B2C1984A75C2FEA35D66036D07C
4076:10FEB000B7C44FB4DF377B59D3CE744FC7718108B5
4077:10FEC000FC1CEA003F8722F1B3250A3F6C610A97C8
4078:10FED00033B7BFD603F78D4E55C579D5187E84D478
4079:10FEE000432C0B08707038BE569429CE3469DE342A
4080:10FEF000C4E7E91583085FD1782AFA692AE183FD0E
4081:10FF0000CBC130EE3AA51BBB6D227CBF4DE1FC316D
4082:10FF1000A5E6EA22D4D76FBAB99C7917E4936E614B
4083:10FF2000EC3D904F3AC8A7F7416E61FE83EA74CA70
4084:10FF30007F54EDA1F4E3EADE941E12F6BCE41B202C
4085:10FF4000000BDA51EF09FDF89E5BFA4177A4A3E9B3
4086:10FF500050F4D3FB834C406BA98159D78CCE66EC0F
4087:10FF60005ADDA8EF265F6FD4672D6667613ADA7DA8
4088:10FF7000F729B4BF50E61B6EA8CF348F6502FAAFE5
4089:10FF8000BD0786BF933DE7B14C047EBF695C8AA183
4090:10FF9000FEA4659D0DF9636E0FB71B8BBA19BEDF0A
4091:10FFA0005C7289215F7A06803010A9D94578B8C380
4092:10FFB000C6847FEDE2714F71BEE49BAA219D7E0352
4093:10FFC000F3FDE62D339547E343E275DA6A13F3C395
4094:10FFD000D4A6AE86B541BF87EA004FD0EE8BBD0EEA
4095:10FFE0008674BC74F3C07786427EFF6633C52FF7F4
4096:10FFF000D7A6AC44FB68FFE6D4448C8BFA97AAC220
4097:020000021000EC
4098:100000008E705A5884BC2AA85D44E74E4A83562F06
4099:10001000D90B3B024FC8BC4741BE679C5FF6A84165
4100:100020008C5301FEB87FFFB495E2F247C16E738234
4101:100030005E38AAB05A4C51B12441F9BF9B5383C8D2
4102:10004000CF453FA97A3AD2D3D37162DF45A1FE8E64
4103:10005000BFD763FD72A22F4F7D88F8D64AFEC0D469
4104:1000600016BE3EA60CE88CF83F9ACCF4649844C5C2
4105:10007000FC8FF66980A7593D9BFB85A05D496E28E2
4106:10008000F5466877628399CEA160BF4EC857FCD50C
4107:10009000BA8ECB11BDD3844B23E119EC87EB9E6262
4108:1000A000F265A7027D1D9F11EC47F26C612AF155A4
4109:1000B00034DC0F59FC04DF00F28112968F613EE3BD
4110:1000C000FB6920D43250CE4C357BD3503F1D5A6152
4111:1000D00026BB13F447228E0F9C4C747C48F314E229
4112:1000E000BA0F2DCB6528AFE4B8652B54F23B90FED8
4113:1000F000A8FE2AD50F3602937A2AB04CF1B34EED02
4114:10010000E9E6D7B70FE984EB89B66F65FA15F0AA6F
4115:100110003FC25E98BD4DF5A1FFC1F25AB4EB2F8DE1
4116:100120005C472DDF5F48E7FDDF21E4FADCAEAFEF8F
4117:10013000B39B50AE774B42BFE2D81E95E8EC58D740
4118:10014000BAC1E9DDF0B8C8AB837F03F92F8A038712
4119:1001500035C83F61F55F930AFDCC31ADC841FFE87A
4120:1001600064E3C195C3A1DDF167CC5E1C76F6D3B321
4121:10017000BA50DC5DD8D7EDE55628539CF3C9500042
4122:100180009E733CF5A4B73D9B61105A7F90FB49429A
4123:100190008F3B1F52D096620707399663DC622AB004
4124:1001A00047A4DD7DD0CCED8292542EA7A47E5F23A0
4125:1001B000F2534D9CAED9CB0AF96DF067D003522EA5
4126:1001C000CF49ED4AF5DBF432AB27793503CFB1C027
4127:1001D000FAE66EB20683B9D4C6897C3E8BA3873D0E
4128:1001E00095EA213936DBF2CC23C843E5AC99E67DAC
4129:1001F000DC1C9CD19C8BEDD7D5BAA8BDD94BF15353
4130:10020000A14F6CC040288FCA05DF55D429C110F119
4131:100210000DD78BD345FF0CF54C84FC6AAF578CFA95
4132:1002200064BAD0A3D35954FCB5CEA8DF7C09DCA9AD
4133:100230009D0DE3A2BE0CCF0BEC6380D90C7F70E761
4134:10024000789AB7E20DC69847396B0DA938EFCD3CC7
4135:100250000E1F3DAFE8755CE83C6778278C4ACE8B73
4136:1002600018376ADE12DE14C08DC08384FB8C0087D1
4137:10027000E78C4685F0F5B9B0CBE08FE2C612EFE52A
4138:10028000CC371ECFD7953F04F232374C076D7AFF3B
4139:10029000B920ED377CC1EA12ED40F773573F37E9DB
4140:1002A000726CB7F63DF22F4A5CA11EA664C65202DC
4141:1002B0007B96175D11639F21CA3EF8A5E083B3D7F3
4142:1002C000068B76008FE91B543DAE9FA11EB597F6B5
4143:1002D000C1CC40C08271C99922DE77BE795662BD19
4144:1002E000011732DFD8F6CCFF75DE7B5285FFD4CE06
4145:1002F0001EEA11D38F6AB383CEA37F3F3187B251F9
4146:10030000FFB6666BA47FBED1BC1FE5BB511FF720B3
4147:10031000BFA023F93A43E8E1E9A897213DBCFAF9E7
4148:1003200044F4DB3F7FE879DADFB43C333D11EDE2A2
4149:10033000C3ABA7AE0C004B1DDE3C95F470F91AA9B7
4150:1003400087FD9648FD5EB0BAF4CFBF43FADC144790
4151:10035000F1F9193BFCC2EE0679877270359777EC9C
4152:10036000212E0FCB515FF5257DD50BEBDD35C3DF9E
4153:100370000BE93CE23BE9B1BBA6FA87507BE60CA156
4154:10038000DF05923384FA4AEA53A9673593DF9486EE
4155:100390007A407DEB83BB61FD5F6E51C9BDAB50D729
4156:1003A000E53831EEDF81DCFEF9F036B5C13BF7020E
4157:1003B000E05D86F026FB87C3FBC0320EE7832B3857
4158:1003C000DC976EEE9688FEED8165DDC8EE39B0B93A
4159:1003D00007C17BDA728037D9BD1EA3DDB30CE08D77
4160:1003E000763EC21BC62DDBE111F0F672782F137A30
4161:1003F00067054FA7B5836BE056942777FDC5EA459F
4162:100400007D7E342E948AFEC8D1E75486E70EDAEC5E
4163:100410002261BF4838FF9BD53D8176543B7B669572
4164:100420009561BC72D60B8E2083FC7125BF1322E030
4165:1004300044DDEB89385E78FC363B66705AA41D7348
4166:1004400081F899C77C742E7F5EE3EB7BD18E577465
4167:10045000EED7CFB3D943C8B7E0EF9C8894E78A07BB
4168:10046000651AC649BC361BD24116F3F8C8AE91FBDB
4169:100470003F7E86FB3FDFF6F8FAD6F9C4CFAD3D23C9
4170:10048000F7492AE343668C2FB53EA710BE2BEEC872
4171:100490004FCC67B8BF5445F3B82E8DEB6345D729D1
4172:1004A0006E6805BA8987F126A579F8778F93C71109
4173:1004B000D7C2B88EF07CA3BF8F47D2437D6E8F1D0D
4174:1004C00087AD15E354A826F23BE65AB8FF21CF7753
4175:1004D0004C15E553D3B8DF3E2B8D9F9F3889F17DB6
4176:1004E000E8F7E4AA04715E7914C533DBE227126EE3
4177:1004F0004EEDAB3679857C25E207FBB00DCC739AC7
4178:1005000055C47341C562FB5B44FB5BEADEA6FD3567
4179:10051000F05C1E47BD3B6581D58BF66B609B95E813
4180:10052000EEDE78BE1FC2DC491AF2D1CD42CEDE52D9
4181:1005300077BF0FF731A7D425E898C2380126E2A784
4182:1005400079B89F9A69A1F86989ADE51974B36F4BC1
4183:100550003F78A70D96B6C8C4ED96452E46E7632EA4
4184:1005600003B31DE3B17874E46CCAB9E8C7181F9EE1
4185:100570008B71DA618C13D65082AB210FF0A5FC9AF7
4186:10058000B4D1631FCA62EC9FCC7329E27B2EC206F2
4187:10059000E9A13489E200D762BCD885A946743651F6
4188:1005A0006301134F9761684DC68FC78B75DF309419
4189:1005B000859260BDA1DDCC10BFBE31640AF5023C5E
4190:1005C0005CAB859A90AE4D368F19FD015F9132007C
4191:1005D000FDE4B98B2F6CBECFA4F968BE734DFC50FF
4192:1005E0005FEBDD4A703DC0E9166072A4CF5B35B6A3
4193:1005F000431DC0F187F457E9F204A8DEED9CBE6507
4194:10060000DC5CE2A93F741F09DF5BC4FCA09F658925
4195:10061000D8DE123B7EF4529AF483B9BD3947F0EB31
4196:100620001C496F9B8D7CFA31F20BD457D0AE05B8C4
4197:10063000DD22D28EE8FD43D1FF8769DCEFDE7191C8
4198:10064000E355585988D6BDCD4A7894E35E2BD23D08
4199:10065000693CFE26E721E999893894092407D2D11B
4200:10066000A1BA1AB29B6646C5815964BC4A8D956F82
4201:10067000933FA6B3985A5AA7E17C942BE3BC48D782
4202:10068000B758EA7B54D9DBD793FBB125ACD9CCEF73
4203:1006900013897896D057A3557B6FF4774A94782FB7
4204:1006A000DABF27F31D015312C65BCC84DA12A00710
4205:1006B00094CF9FC4F1FDF72949778D47BBB024D172
4206:1006C000A2617A1B6B76E4E686ED92A5F930D94CEF
4207:1006D000A4B2C0581DF235284F78FE7E3D8BA24350
4208:1006E00022BFE44DDCB7B8FE07C03FE5978ED54189
4209:1006F0005E9C7C4D94B37BA9FDC925828E03F78F48
4210:10070000C5FA271F96E575BCFC3E59FE10CF3F2069
4211:10071000FB17F95551E58BA2CA1FE379CBA30F8DC7
4212:100720000DA03D2BF6634A8629244F0A059D952C82
4213:100730000E117C4B4CAFF274240BE17D89F3D51B79
4214:10074000D0C957887A4B751C72A0DEBE3C432F443B
4215:10075000BB6340AA3FB913A4B32728010BCAC93D04
4216:10076000C19E42AEC73C675D28E8F6B274DE9F8446
4217:1007700037F493D929F5E2FB7919E735C8D04FB79B
4218:100780009FD3CFF2F6F3E9FB73FA3919D58FB48B07
4219:10079000EECDD4C7209CD821B7E1FCDC9CDF7B9355
4220:1007A000D0AE62787E0E403F67717DCE40E87FCE4E
4221:1007B000B32FE5CC88F0BBE79D31311DECA7CA33E0
4222:1007C0008CD22F9A3EB678603EF3B636590AA15EB7
4223:1007D00025A40511F39A2BCF8FB2166D62845E1F8C
4224:1007E000D7C924CE25AEA2F9CE79F618ED5BCE316D
4225:1007F000D51F5E83F19E613CFE16BDBE3CD16E1FCF
4226:10080000EE23C7B0DB2776E27AF8AE2C7D02AE731A
4227:1008100020CA0C480B6A62EFC3FF49F45712CFE5B8
4228:10082000DBD4C10E9BE732DC47F5D7E0BDAE196BD8
4229:100830007307601CF786D491B710DC3A8C8BB6F244
4230:10084000B868238F8B96B89AEF00E1CD1EE9B4F516
4231:100850007E1BF871631F957C062C0B6D8BAC32FFF1
4232:10086000E6D8515914E7A2FCDD8FEEB83F00FDEC4D
4233:100870008AE7E70CA60CB9341EE5424B6E82C90923
4234:10088000F2E25677E923388F2943AE28C4EFF956B0
4235:1008900047CF521E5727BAB8D5EDBB1DE905EB630C
4236:1008A0005CC36FE1712EFF1B2AC5B9FCFD12FCB1C0
4237:1008B000F6A92B3B71BA79A49393D25D8066B43BC1
4238:1008C000E43CE4F860A8DCD10CFD1D5A9CD11FEF7C
4239:1008D000CF35B8F31F26B888F11BDCFEC59897E327
4240:1008E000C372FBE1F70B9D47B5C0C7C3026FBE11D2
4241:1008F0002AD323FCC589A3120CF9EBC7A5303D32DE
4242:10090000DE7A7D67437E72493743FD9BA75D62288F
4243:100910002FB636E7555D84FD5BE970C4A31DF6690B
4244:10092000E3BF3FBC05EDBA0DAA5781F5CCDAB6F1AD
4245:10093000C3E150EB141E2FA5A0A787E25EC7F15CB0
4246:100940001AF29EA66B91FB355FB2663ACF17B11FC4
4247:1009500060D87799E3DC41E7097FA9FD9AAD9DC492
4248:100960007EC0003C8A8CFAE8038AB3CDB3F3F57CF1
4249:10097000F9D27E0BDD0340FD01F43D061BAAC8E75A
4250:10098000018A431734ECA7FB56933A71B93C2FEB1D
4251:10099000760D2C32560929CAFD42904F49401FCD91
4252:1009A0004DECD2AD780E37D741E7262ACE4C642CD9
4253:1009B00005E928D0F776A837675911E5E79D89A79B
4254:1009C0007EDF559B0BE9BCF58B0AED1714779EB2C1
4255:1009D00018ED51ACFF6B18AFF8BFC714217CE66D62
4256:1009E000E5E72B8AD57FE6613F73EB8AA87DB1CA24
4257:1009F0007629601F8C2DE07AB618753BE4D5C18E40
4258:100A0000E5A85F554BA8E79F509E581C244F92CEF7
4259:100A1000DC4CE3579EB151FB4F84BC30B7F0798D6D
4260:100A20003EE3A3EF12EF073A7535DC0F34A76ED023
4261:100A3000CAEC589F51FD6BCEFC8A52B9CE377AFF73
4262:100A4000C58D72CC9CFA4D219E277DC3AD38C9DC83
4263:100A50008892B7A7AB8624B118F2A86D9C33FC7CB2
4264:100A6000B2F50C3FAF7C20433F837C3D7E618B869B
4265:100A7000FB37CC6E7322BCC60FEDEF9911C147EA6C
4266:100A8000AB3759102FE687DEB3A07EB7425A10511C
4267:100A90005E21CFE347C9E39FDAE4F1224AA57E61F4
4268:100AA000E937913D7AABBCCF2AF8E40B212F64FBE8
4269:100AB00066A471C4E30B56F29FBECFF027A7433F55
4270:100AC000CDF96CF216928FCD39B86FF24BCD1FF085
4271:100AD0006C53C8BE6FA1F3FAE3877A4CB81F9096A7
4272:100AE0002ED7C1F9F57CEB50D3F93ADE55D902EC9B
4273:100AF000F7DDABAE6AD6A1BFA67B060E44B92FC701
4274:100B0000ED956EE1FD3A5B7F407FAEF2E5040FF2BA
4275:100B100075313A4779613B16BE338CFF55BE6C5D2B
4276:100B20008FE7682A13C19F85F10B5E890B211D3762
4277:100B3000BD12A7A17E782ACBDF0BE153F04AAF515B
4278:100B4000E8BFE98D568DE2079DF4DEE9833A9EEF1A
4279:100B5000F9E453349D49BEF42FE3FC522AE8B44C27
4280:100B6000F09F5FF0D1E9AA4EC487A717C2A4719F76
4281:100B700073A172E956B4073C0E3AFF23F9B218FD8F
4282:100B80001EF85E7C4932F97F117C477C38F78C93E4
4283:100B9000FAAB38E3117CEEA2BCE4B732C12F566148
4284:100BA000474C13F43D3CD37F633ACCBFB806F81DE5
4285:100BB000C6F12FCEC8433E0AD38BC5897405F49283
4286:100BC0003E23826F6A9A6E62687F58DD3EA2976903
4287:100BD0009046DA1FD3DBEC0F67611ACC7B7C6DAEDD
4288:100BE000E1FE4989C0FF85D2FDD582BECAECA11EB7
4289:100BF00068AF9AABE2BC789FEE949BEFCFCCBF8FEF
4290:100C0000C36FBED95780F6C3FCC7142F6086EC0AA9
4291:100C1000944783F7565922E38D379DE9C73C0087F7
4292:100C2000EBCE74A7F48654FF6C8443E99949025EC5
4293:100C3000FD7ED63EE0209DC797CC41AB771DEEB33D
4294:100C4000C5F955C4EFD16CE67C3022BE84F1308CFE
4295:100C50008BC9FD41196FB2E27E6A849EFCB756973C
4296:100C600083FE4EBBB853BE711F6D6ED33F079BA072
4297:100C7000FC78AE4EF1A729267F2DD2F3EC89C1670F
4298:100C8000CD909FF3C0F38918EF96F0ACD7423D505A
4299:100C90004FD6031C310E56BF422D0A727B2681EFC0
4300:100CA0007F71BA96741C4DDFB3CF74257A3A5D65B7
4301:100CB00025BD731AE89545E81DA96FA47C977A476E
4302:100CC000D27385C6E556853D89CE5584F5CD041F82
4303:100CD000C671596FC5DB8345EA9BF52B8721FD9FC4
4304:100CE000747BF1AC4F34FDBF589D4EE76CA41E8958
4305:100CF000D637529E4BF92EF5D5DA0CFF8B88F7913B
4306:100D00007FFDFEF97FC1A76B34AEB7AED11C443F67
4307:100D1000172E37F70BB9B9DF2037E77520F71BD34C
4308:100D20002F4EEE3F2DF805EC57B20B51AE47F6F7BC
4309:100D30007DC6C87711DF7BD2793CE0979A7747F27E
4310:100D40007E4F1BFF5E98BC6F12EB3D9FBC3F22E4C1
4311:100D50007DB47CC70B6D28DF4F6EEB43FBD3FB18D4
4312:100D6000E803D47B8D099E8D42FE937E884F0A9EB8
4313:100D70004BFEDF9535F54807F2FFE8FF45FE4B7A5D
4314:100D800094FC22F943F24334FF487E187B3FF87FFE
4315:100D900088A777F9FDA90A2DB099F60F3D09FD91B5
4316:100DA0002FDBECB6AD0AF1593BBD20F826CC274627
4317:100DB0003D21F942F289E48F0AC10FD3A3F861BB48
4318:100DC0005AFFE03068579DE1CFC81814E68BB95B35
4319:100DD000A2F542877485114336DD5DC590AE2A20A9
4320:100DE0008DA42B6B07FC90937171FC60CFB8307AA7
4321:100DF000EA9FF1FF9C9EFA67C4A6A70119BFA03D18
4322:100E000071BAEAA33CBCCF743A0FE46C6E98DEC6AC
4323:100E1000BEC9B8BDD08DDBFDE037D2BC7759B22951
4324:100E20009E33F62C3FD72AE952E259DA01D3453CEA
4325:100E3000615EA66F52466AD85FB8503C5BDDCD1646
4326:100E4000F443A6431AA9FF3BB2776FC9B848BD9FC8
4327:100E5000716176E2DC0C7EDFFD17B4137F83F088CE
4328:100E6000C62B73BA0C7108D07FD791FD16D2E888D3
4329:100E70004C877EC56A0E67995F12D2A4BE4D417D34
4330:100E80000BF4B200C7FBB9F4525CC0443C70D738D5
4331:100E90007D04E0FD0F22CFDE1A877C3869A82CDFA5
4332:100EA000BD42D750EE301947A7B8C8BBAAC807DE65
4333:100EB000786B14AC7FEC832C1C6787F2D12392DA19
4334:100EC000E2280A0BD77FF4B1D7DF5A4178E6E75E14
4335:100ED00098BF45E3FB4C229F077947447E68547EC8
4336:100EE0002DAF9FA8B5307E4E31C8F955C5AD374EF0
4337:100EF0003FBE087B04305988E709C66F559C180728
4338:100F0000B979C449DA8F0DAFFF9FE3303E3BAF5153
4339:100F100011F90FDFC2F5DEBC95E7B73DF6AF15015D
4340:100F20004DF497467132FA33D72B3A9E7F983B5453
4341:100F30000976CD6D0FE76D1946FF06FF34637B869A
4342:100F4000E7EF2EA63DE299DA77A5F621EB458C7FF7
4343:100F5000E388D8F712DE96FC25E209D43FC0F2BA46
4344:100F6000FAD8F7243E10F59B71DF84E0757205D244
4345:100F70004FB345C2F3AB1508CFD18CE73F7BECAB49
4346:100F80007181BE7CFA7AD4FACF35FFA60CA3BD805E
4347:100F90007F1E63FBD0B9E0F77ABBF6827E661AE962
4348:100FA0002949F3ED380DFD2481FF8F76F13C5FDC9C
4349:100FB0000AB4FFC3F4F11FA28F6619CF6F47FFDF9A
4350:100FC0008D1B6527FB47D4FF6105CA379FA9AD3E3E
4351:100FD000E707495FD0BE377F9F8DDAFFE7B1EF5754
4352:100FE000207C003F544E79ED1CFC501F951F11C50D
4353:100FF0003F82FE897F51CE037C7AC49033E9999C6D
4354:101000003EBE14E7AA9B47723BB159DC9B1A9AC9B2
4355:10101000ED424F2687636F51BF393E020E1178862D
4356:10102000BF10FA2111EB2638DDE496EBCE2A1ED74D
4357:101030001DDABB78F980CCF4070259E17C747F7922
4358:101040009959C5185F0DF79FF936C2F52601B7A16A
4359:10105000999DDF0E7079A8205F561081005D6C5558
4360:10106000022AFA09481731D6CD32DBF15520AABD44
4361:101070006E3E477B4BFBF67A547B66CEBB98F602FE
4362:101080006FE3A2F05A1485D75151F912990F1AE45F
4363:101090009F948B650DAB96A4B9312EA9D09DCF300E
4364:1010A0003DFFAA18E9798E53D2EF2504D7303DF7DA
4365:1010B0007D1BE5FFC47A290F2F7D4007BC4D407989
4366:1010C000382C9CBF0EE505E5FB15EB4991FAE2B221
4367:1010D00007507EDEB84CD6F752FD9B6B657FFDA9AD
4368:1010E0005CE291050614135EF384BE080C7C1BCBF6
4369:1010F0006737F2F673D6E4BD1DE87E0E7EA88B82BC
4370:10110000CBDAA87C20AAFE43E7D12FB551ED1746D4
4371:1011100095AF88CAAF8ECA2F33B62F9DA6101F96E3
4372:10112000023D2022CEC797F764B6D9A96DFA54B113
4373:1011300093DD66E0ABB1353CBF644D7EF1B2BE11CC
4374:10114000F9CC82E248BE90F77BAD6E467C61EE4002
4375:101150005EFE3AB30379D93B5ADFF2F2CFF09F1922
4376:10116000B4BF63B00BB6ABC67C932AE73DE1ED3B61
4377:10117000EC11FBA0CC578CFE41C7FB2DE38B474500
4378:10118000DA2581E262A44BB94E59BFF0C7B32A8E6B
4379:10119000F7A7CCE2E20DB89F3352EC43BA780A7A53
4380:1011A0004D45BD5929E23185783E16EBC5877ACC8D
4381:1011B0008FB443587D4F5C67D33DFCDE40A006F002
4382:1011C00083F135E6B5603CA5292969C193507FFBC1
4383:1011D0003DEA02D4A3FB16A4D0B9A43399DC5FD8AE
4384:1011E0009ED4256D3AE49B126EB3E0FDE4A67B47E6
4385:1011F00053FAAAAA2F6D055E7B694D49B1BD0F96C2
4386:1012000027117C5EC89C5CBC08E8BC012FED407BCC
4387:10121000BFCB9986F71AD87233E3EFE5789F20BAEF
4388:1012200079C0DA1FFDE7D24597D0BE55D9C3130A5E
4389:10123000E9DEC21233ED67C01F9D3FF12F1F4DE75E
4390:101240009EA6D58A343086D2577EFA4B4D22EEDFE9
4391:101250003FAED07D892BBEA97F13DFE5295FD6CDB8
4392:101260008BA87919EC7A3C8F7460752FBA2771308E
4393:10127000AE8ACE7D427D86F5CB7FF0BC333E0FEB50
4394:10128000AB4E3C5A7118BEA33D7CF83E75BD82F34F
4395:101290004A74C4E379E9C33F7ADE41BB16CA9D8B29
4396:1012A000E1FBE125B3D2D0CE3AAC78121558FF0756
4397:1012B0006B6617A767E0FD7AABC0E76C4729ACBF48
4398:1012C000D4D4462FA43F6624F3FC0799B38B37C2CE
4399:1012D000FC0F3FD68BCE7D8DEBAC7F980970CAC8D2
4400:1012E000D23FC2F4A0B877FCCA4F7CBFF01F27CA18
4401:1012F000D2305EB75FF0CFCB67CAD2CA22EC9D195D
4402:101300005F6A84F7572C9E3B709EAFC4672B743E78
4403:101310009BD5A760BC7B9AF03F807E173C1FC3EE35
4404:1013200069CC54A9DFA6FB5347205EC3747C37C940
4405:101330004FF21B207F6ACD9DA4D70E5917B083288A
4406:10134000B7C4F94586AF0D21FF6D8E0BC6E562FC73
4407:10135000532FD4C98FA9EF39D111C177A2FEA701AC
4408:101360007E3EF753A88FFEDBA781FF7144EE43C892
4409:10137000FAE5898E001A13471C0E0DF1B04FAB3EF3
4410:101380008CE7FA663C6E26B93FE3F1D485AD286F51
4411:10139000805E303E16BDAE2B3B9B793CA2233E0CBB
4412:1013A0002C35F2215B7A4E3EB4FF69C939F9B05C45
4413:1013B000F829858F9BE99C7AF9208786FB8F231F6C
4414:1013C0007F6D23DD5BBD3D6E00DE4F287FDC4AF87C
4415:1013D0006A7138024EDC1F4D7468C9906676E6F873
4416:1013E0001DDE99F34D81CA34DB004AE95E82DCD709
4417:1013F0003BB6E0C147F018E571169C3404E0770A6B
4418:101400001106703925EF6545EDF355EC7EDE92CF80
4419:10141000CEB1CF779EFD3DBCF18C7C78A1FB7CFDED
4420:101420003B8B73AE6DFB7CE69EB88F582EF6F90AA7
4421:10143000D6F2F35BE50BF83B1C05293CDE7BA83AB2
4422:10144000808FDFE27A034EBC9FFB10D72FE54C095B
4423:10145000DAE09F63D6DE4EEF933E2DE44A29BEA329
4424:10146000D517F9C59B837EFA8CC7E308AEE54FCC50
4425:10147000FAF03168D7B2A8D81DE9178FE96C9670D9
4426:1014800065784F57F67364D1EF7290EE0BFE0CFE49
4427:101490002DDEF74B66CFDE948B78CAC8C1FD485964
4428:1014A000AF7CF13D3D793DF08FC10F2EBD4FE5F78B
4429:1014B000A65FB092BE031E4F6711F799A7D5EEB68F
4430:1014C00058FA86EF7F1D803C5EA98FB80766417889
4431:1014D000C97B49F8973E58D8DB1E921FF4BE70892D
4432:1014E00049A1FB4B20B9E8DECF9D9DF97EE1ECCE12
4433:1014F000DC8E2DCDF1D2FD978A9556EFE25CDE4F62
4434:10150000DBBD6A3CE7646A9E41FB8F7FB3525CA4FB
4435:10151000B2364E8F4BE4E722B6F4A573D19A05F7A5
4436:101520004D3C5C4EDC29E8AFD233610CD20B94EF1A
4437:10153000D5F01C9683CBC38A64F1FE1BB437C13847
4438:1015400027F15FDD78BF19FD22C657C477E8C7933E
4439:1015500018EE7797892DC3B80BD6EFD30FE19832E9
4440:101560006932CEEF1995F81816BF7228DA77CFA82E
4441:1015700003D1AF2DBD6F7BE16ACC3FD71F6F2CB07D
4442:10158000D267DF277D3147E0BF459C072B833CBEF8
4443:10159000AFB6B233D7F77E95C77B560A38493A9033
4444:1015A000E515F7F1F350154BAC64BF542CFA88FAEB
4445:1015B000AD7034A7A1DCAD78C14CF7985789799705
4446:1015C0002DCA1EB117E8AACC9C44EF48CF0D145B7E
4447:1015D000303FB74EA17CB85D6A0ED2E917B52F2611
4448:1015E00022FD1C8C0BF5403DD47A7B9C17CFE1C9C2
4449:1015F00078DB17B53DD6635C669AB3D981F791A6BF
4450:10160000DDD1CD85727B9F3364C1F27DF5B926CCE7
4451:10161000EB4EE708CCEBDA6594FF429C3BA13FA47C
4452:101620001785E379EEE6ED96AE30DEDF047D7CF9DA
4453:10163000CCFB3D514F55E434F7447D0274D0B333B5
4454:10164000C2F96985F4F0BCCDFC9CBAA48379480743
4455:10165000C077B3051DCCDBFAE26F901FE621FE07D1
4456:10166000B4A723A0D31DF47DCBBA42C6DBEF403A2A
4457:1016700091FA0BF2B56617C6DF441EC6C1FC8B0893
4458:10168000CF542A1FC5CB037DF939B7163AB757296E
4459:10169000EE2BB6C9A70EF0BC47E0B16C9195E4ED16
4460:1016A0001E81E796FB5E48443C7EF9CCF69DB84F20
4461:1016B00052B105B4B427065F08B854221C12691D44
4462:1016C000645754E2BA13C37068A37FC18F958CAF7F
4463:1016D00053AEBB52137090E5A2FD07826EE6320155
4464:1016E000B7ADBD38FF097E437EA67776C4FAFC2EDF
4465:1016F000E37BE2DF89F51D147A612ED005DECF622F
4466:10170000783D51CA0928FAF2B97514F791F892F3A5
4467:10171000B66779A4BCD3935D613CB69862BFA77CE1
4468:101720005AC06FFF924E390D00B72FC0BFA273038E
4469:1017300040AF5AC478926EE478057F9D700DAE1765
4470:10174000FA0F61FF72DC7D81040DFBD9C7387F2061
4471:101750007DA2FC947C595033E59AFE78EE37F0A5D3
4472:10176000A35B5F5C2F1FDF9EC5CF2DEB6827407BFF
4473:10177000BD41A1B8F37EE1CFEF5FF2626259049CF4
4474:10178000E2B338BD4B3AC33F8C47C9F9EE72F1382A
4475:101790006EF4BCA51C92F32EB8F7C66BF0BB9CBFD1
4476:1017A000A457499F128E924EE5FDB7687A255A9349
4477:1017B000FA5335C87BD28F63B2BEB6F8EDEDBF47A2
4478:1017C000E7A51D74509CDF6E4D653C5E5F9BBE239C
4479:1017D000F2BE0FFCD923F54E843E59A145E813A96A
4480:1017E000FF2BDD3ABDAF322F8B9F2B39CEEA2DF97F
4481:1017F000D0EFDCA3CD85899EB0DD79C5372115DF1B
4482:101800003599BB959F3F93F09E7B6207D17D85B84C
4483:1018100097547ADFFBC54390BEFFCB4CFB31A54B01
4484:1018200046D3FDE3591BA70E46FAC1FB0C28CF8F08
4485:101830006D1834903FCBE54C9B84F71A363C38E961
4486:1018400066F83EAD41F5925C877E905F4BEF1CC819
4487:10185000905E0EC6B5140F437BFD6ED589F6FAF087
4488:101860008D831662FDE18E2EC9B81E7D430AE57593
4489:101870002D89F482B473E5B9BC1A33A787C9599C82
4490:101880008FAE6D4B399D15D4D4F4C4FDF3D675716C
4491:10189000F49E518945DCE3DCD689FC894A0B5E293C
4492:1018A000A47BA16487CDB4305B063FEF6CCB80EFA7
4493:1018B000BBCDCD77A2FED87DA7A33F9DAB577F18A8
4494:1018C0005CC6ED67BE5F98627C3F48CEE346317EE2
4495:1018D000747FB2FD2E71DEF8A098FFB1DAFF9A8412
4496:1018E000FAEFD8A61E2E5CF7916D71740EFF48D4E6
4497:1018F000BB8C177B4F0BE836EA1ED4627E6F20CB81
4498:1019000068BF493A3FEF3DA54FDC51FB01E73E5F21
4499:1019100074A29AD17DEA4BC1A7C0F6A3127E7C1EA9
4500:10192000CFF5CDA8B33AF13ECB21A47B3ACFA3F2B9
4501:101930007BB736CE07879EEB1F44BF71C627FC7E60
4502:10194000D18E55F7D2B982E96057E251AA363BF9F8
4503:10195000A15593900D4E79FD4B33A0DDA94DFC1C94
4504:1019600044BB770B763FBF33F2DD828BB58F2FD42C
4505:101970002E96718587B38CF7C0245CA57FF40AE0AE
4506:101980007FE880309CBEAA9E4976F1896A3FA527F0
4507:1019900095FD2B8723DD3A92E8BCFE3F1A1E54F1D9
4508:1019A0009D958AADFD7F40FF76983DC989FCFA552B
4509:1019B000F502DAEF3C515D4569F8FDDC20A5576C76
4510:1019C0006DA2765F350C6CC47BAE2FDB9384BC8F2D
4511:1019D000DED7E178ECE8FEAE5CD7F1BB393EE5BC82
4512:1019E0008F6F9A9A88EB6AFA534AE3E588C7842492
4513:1019F00027DA77E5E29CC7E1D5DC7E3E6A4B7A7256
4514:101A00001C9E0F597B5D1ABE8333BDE9FA49F87DF0
4515:101A1000C636C58976BF77DB8444F4433FD75A1274
4516:101A2000F15ED3E7ABE57DA820BDD33AAC88D1BE4B
4517:101A3000D3B090C63CB97C8B19E9E4F2131ADD3BB4
4518:101A4000FD02F7A330EEF1433CC53D98D8679AFEFE
4519:101A5000128F97B4F9B1C28F1B2ED6DD8ABFB39116
4520:101A60001AFE5E30947F3FB2F6F9F1D8DFB10D6611
4521:101A700027CEFBAB0DFC7D86D9E07FE1D594A39BFF
4522:101A8000B87F33BB5E217FF8D826D0CFB0AE8ADBDB
4523:101A9000CD3ABFAF69A4BF0228C7738D92FE66EB33
4524:101AA00041A2EBE8F73392593DDDEBFAA5E8F1707E
4525:101AB00096F13C661B1D76847F0127E45BA4438975
4526:101AC000E7D9ABF9BEB9ABBE7F3ED293C47BF4BBC2
4527:101AD00072351646F71202A6787AFF7782DD6356D2
4528:101AE00060FDD7B95B46A1F89C98CDF5B85A60D295
4529:101AF000F11E1AABE1F7F3DBC98F2C6E0FD56433FF
4530:101B0000EABF73363F2F2CEF63C91416924DEFEFE7
4531:101B100025B8FEED812AF6C76BC76B30FF09C35DA0
4532:101B20007776F3028A1E5F3E5E03BA9D30D0F5429F
4533:101B300057C8A765DFC7F397B9069921BF68D1FDDC
4534:101B4000E347E1EFB264EBF1D911E3C87EE1BB23D7
4535:101B50001BE6B133C5EFC4B4D2C2EF479D545AFB64
4536:101B60002DC80DD77F4F61FBFEA184F32D6646EF94
4537:101B7000C074C6F90FEA38BD255BCFE0E31ABF9702
4538:101B800031B684CEC705F8FD16F8F3D9D2F0FE11B0
4539:101B9000A7A73279DF6599F1BE0BF3F2FB57F21E6E
4540:101BA00092BC67D4277C7F6AEDC5DC9F3A6986F5D5
4541:101BB00026B5BFCFA634BE4EEF61D504584B1CE10D
4542:101BC000C1787FA52281BFD337FF852F772059CDDC
4543:101BD00092F60A2ADBC1E1FBFB2C9DEFFBDF29E833
4544:101BE000F04835EBDE1D58F9DAE6E6440F4CF6C452
4545:101BF000F8504FE46F8FD59F8FF03FB2B6266BBE83
4546:101C00001BEF7D5ABDE3A0FED120BF573957D89BAB
4547:101C10006C43AAE073357415D4DB95DB87DE6F184F
4548:101C20009BCDF5F289DC500EBEA713C8E5FE0DD49E
4549:101C3000A3F36B458BC7A462BD13CFDDDB7D3AE018
4550:101C4000CD8AEFB7B9286578FFE96A3BBE854CEFCE
4551:101C5000BA3195F66983FC9D31A897887ADD3335D2
4552:101C60009DC7D1F9BD39892709FF76788129A03D23
4553:101C70006AB23133CEBF0F5BEB447D21F123DF31FC
4554:101C80009DFF028F9FCC575A6A5330FF8C42E7DF8B
4555:101C90008ED8F8BD9EF67A6EA305413D73ED54C310
4556:101CA000FB3CF2BDD05F3A0E343F5BC897FEAC7F81
4557:101CB000E47BACE5A2ED68B5C483EF49CE4FB5D166
4558:101CC000BB1DF31FEF46FA041C6116598FAD4D2161
4559:101CD000FA589AAB129C6735307A77A7B82193CE21
4560:101CE0002B8E6B70519A78269DBE1F7BF2CD3C2EB9
4561:101CF0007F381E8A9FEA44EF47173FD56B24FFD1F8
4562:101D00008176EFFFF07793ED36BA473B7F37D74BBD
4563:101D1000F36F50293EC9C4FD709F988ECFBE8CE2F0
4564:101D2000393E16FB1D589F7C0756379FF31D5809F7
4565:101D30005FABC04FF4BBB037EC1E988E7EAA7C1709
4566:101D400056BE63D72CEE6D45BF0F7B6F6221BD0F72
4567:101D50003B59E77A24FA7D582D10E745FBD69C6560
4568:101D6000E7EF35F8A3DF8B6DD170DD9346F0F762B6
4569:101D70006F981CF12E02FCCF3CE26B92D3E611ED82
4570:101D8000DE0732237D5B7DC6FA5B24FEFBB03EE7B7
4571:101D90007C8F37CB42EFBC69F85E35E42789F77852
4572:101DA000D18E43FBFC94CEDF95B3C6F37537B3BC3D
4573:101DB00074E4FBFFDFDFA13EDFFBD3D1EF4D47BF74
4574:101DC000333D70D71F0DF941CD6B0CF587EC5D6F7E
4575:101DD00028BFBCE56943F9F0A35B0CF92B5AFF6EF1
4576:101DE000A87FD599570DF97CF6A6A17E81ED7D439C
4577:101DF0007EB4F37F0CF5C7A41F34945FEDF9C25095
4578:101E00003EB6F769E37A34FF59D487C5DEEF0DEDAE
4579:101E1000C633CF1FF01DE71BDD267AAF43C911F68D
4580:101E2000B5A0BB1FB384DEEECE72507E8D564784C4
4581:101E300088EE1A14E2F7683DA67DE1D3311EC75E35
4582:101E4000E4F7BF92C0EED322C64BD66DE01086F306
4583:101E500029454E433ED5976EA8DF69B2C7509EE133
4584:101E6000EF6D28EF3CD36BC867570D35D4EFB24008
4585:101E700037E473034586FADD96F90CF91E75930D68
4586:101E8000F57BADF61BCAFB04671ACA2FD95465C887
4587:101E90005F5ABFC050FFB28680A1BC7F6899A17C09
4588:101EA000E0AE3A437E50F36A43FD217B8386F2CB5A
4589:101EB0005B3619CA871FAD37E4AF686D30D4BFEA0F
4590:101EC0004CC890CF67BB0DF50B6CEF19F2A39D1FAB
4591:101ED0001BEA8F49DF6F28BFDA73CC502EED96B125
4592:101EE000BDBF367E17764CB1F73F86F68191E27D15
4593:101EF000E82D0ABD0F7D5B4E57F9AE684B1CBE8BBB
4594:101F000018F051DCC78507FB504EE1BD6B173F173A
4595:101F10005342F12337D939A48A3C784E07EC8044E8
4596:101F2000F4AE7273D14E4E08DB63596723CEC99D60
4597:101F3000CF1EABC86144E76B73FC6539A9E87F3CF1
4598:101F40005748EF7BB3C0529C877CE7EE9DA8778D06
4599:101F5000657AB5ED288B7CFF78775C5DD68073F869
4600:101F6000EF57DB4E307C57B9AD5F11AF50607DF35A
4601:101F700023FA5F09FE82D69DB1BA6AE01BB091FEDA
4602:101F800058EDA4FC43D5E9947FA4DA43E9EAEADEFC
4603:101F900094AEA9F652F9DAEAA1947FA25AA77CB0CE
4604:101FA000BA88D2F5D53EFABEA17A32E59F04BF18B1
4605:101FB000D34DE02763FA34F8BB58BE19FC5FCC3F21
4606:101FC0005B1DA0B4BE7A197DDF525D47F9ADD5AB7C
4607:101FD00029FFB7EA20A50DD59B28FD7B753D9537D8
4608:101FE000563750FEE5EA10E543D5BB28FF6A753346
4609:101FF000E57754EFA5FCCEEA164A77551FA5F48D78
4610:10200000EA562A7FABFA0CE56B4DFCF740D6E41894
4611:10201000F721645EBEC720EDBFF168BF23710C35A8
4612:102020007F65B0DFA3ECE8687C1C1771DDF0FB096D
4613:102030003DD7D744F84F4F8AF1E47B0CD1EF2830DD
4614:10204000619FCA774FE57B0D33C4BCCA053F0C4284
4615:10205000FAEC4DF4F9D6C5F80BD21F1C90EAFF1B21
4616:10206000D167B62940FEB09DDF27BE21D5FF52CEF5
4617:1020700020DC2F9CBE93C6737A69DFB0D81A4ABDA4
4618:10208000318FDEFBA6B85C47E3558A73DF1D96BF30
4619:102090007C2C0BEDE9A29F547A67EB1DB3837EDFA6
4620:1020A000F02D0197B7724C86F4E354FF9B38CF6F45
4621:1020B0001D55B79A60FEDF5E79FB93BFCE0DFBC95D
4622:1020C000D7A2AB09FECD04E631D3B942A6BF968BA9
4623:1020D0007613185698BF910528BDD5EDDF83FDDC3A
4624:1020E000040637E6FDC3AC39B1D6153DAFCF72B8A3
4625:1020F0003FFC598EC9905AD3FCFB104EDF3A749ABC
4626:10210000D73B978FE989EB92F32A12EF8E8C67AD5C
4627:102110004FE0FCBEDDF6F561A55B18FED21FA77B84
4628:10212000FD28C76E57C4BB76EDDE11A0F2923B15B9
4629:10213000B2CFA6803F83FB43F2DD805355667A0F12
4630:102140001EDF19C0FDB353559FDB919CA11EC3FD3B
4631:102150008D1A3CA003E53577F3FBF425F82EC60075
4632:102160007CB7C0C6FB5DA810DD0D4FCBE5F79FC166
4633:10217000DE23FFC9DD4AF7F4804EBE273AB95CA5DD
4634:102180007BE7EF98823D15DA4F9E6E51607EE56EDB
4635:10219000AFE17703A2E9609EB82F20BF037D99BB12
4636:1021A000C0385FBD34A437C5DF5FBEDC83F0AA3121
4637:1021B000F1FB43813754F17B4E5C44ABC32FA53810
4638:1021C00023D3BC5E8C17158BFB264D2A5B10EBBD11
4639:1021D000F05E5D38BEDE49E7EFE7D544EDB374E964
4640:1021E000C2E9AA4B174E6FC5AFEEA67784E6EDE2C3
4641:1021F000EF1DB2BC96BEB1DEE7AF5CF0469FEE11BC
4642:10220000EBA86CD8CFCF57B096BE91E7C975D1AFC8
4643:10221000A423D5E2F0AFB347CE8FD30FD0754F8450
4644:10222000C3B7C940D7DD88AE0FE3BEE278AB27E97C
4645:1022300046057F25807D85EFFBF8FFECA4F341F296
4646:102240009CD034E6A3B41CC800E9D8175845EFB9B0
4647:10225000CE66F5F47DDED0A9F47BA495AC75543A36
4648:10226000C0ED86658B5EC3E7F0AEAB5B351AE3ABC2
4649:102270001383A5AF613A61837218FD54E08B215D31
4650:10228000301EA2542DC12399376FCE5F825B66E367
4651:10229000558E0FF626C707D08DAEBADAAF13F8E029
4652:1022A0002A6CFF6DB24EEB50138B0C7C50B298E948
4653:1022B0008A3B7CDEBD8D2F86CEF90CB7D498D64AEA
4654:1022C000FBE6952F5B5D88E7D98CEBED703C43EA2C
4655:1022D0006B46743E87C57BB1DE7141D7C7B319D158
4656:1022E000F57185D13D756947B21C7FFA806E61BD7D
4657:1022F0007BDC141C9CD88DF4F2249CEFCEF4EB3CD8
4658:1023000018079BE3B6D1FBA7C793833951EF7CD065
4659:102310007B44328EB5D2CCE34AD1F35286EEE4BF91
4660:102320006B616101DC9FC0DF751E8CFC8CEFE628C1
4661:10233000F40E740BF2BD79A4CF13ABFF5AD1EFAEFC
4662:102340001FB9BF1B80F5E0FDC676E338C538F17CC8
4663:102350001CA93FDA7E473A8D19C6FB4D975CC2CF68
4664:102360003B0E9DE6BFC8944CF226C3E6BF0BE94E78
4665:10237000C675A41FB82BF74877F2D77FA8C942FBD0
4666:102380009CDE2140FBFB4A2E97DE317BE8DDDD77CA
4667:10239000F273297E2FE5EDB54379FCEB5A19EF1A5C
4668:1023A0001115EF8A8AB7B011B1E35F8C79CD386E21
4669:1023B0001FF689840FC5595E1DA1197E3FEA55E1BC
4670:1023C0007F9E2A72E7219DEFEFA2D23A1353F8BB0A
4671:1023D00021AD0E95E86C7BC06BC7DFA3582EE2A43D
4672:1023E0002BA2DEBD5E9E37DF89E702AC0EFE9EE5C6
4673:1023F0000323E367469E477FAD073FB77463CFFC77
4674:1024000077915EFADA8323493DEB9A07E7AF88F5C7
4675:102410005CE204789BD0EEF48978A7FC5D9351A42C
4676:102420009F259E2F543F3FAD0517C7E37ADD8CF8FB
4677:10243000CEB1DA46F253ADD74378343AB5E7C4CDDE
4678:10244000843FCDD71BC7691A1CCFEC50FFDB260B8E
4679:10245000C5A15E3695FD19CFADB77E6C6578CEA16E
4680:10246000DED1594323B7FEC75F8DA2D431BC90BFE4
4681:102470003FC912F09DCCFE4EF697FF462489FB61C2
4682:10248000F50ADBC51F6BD513F09DB77A133B7D159D
4683:10249000CC6B8B7DC0839711A9F9545CE77BDDFD84
4684:1024A000AFE03C06B32ACA3F60F1CD5C07E33EE0F3
4685:1024B000B2117DCCEAEE7B95CF932D1907F3BBB219
4686:1024C00040A1DFAD5B227E97CDE18D37BCB7EB3B02
4687:1024D000D393F4C5DB423ED7A6EBCD78B1A343B886
4688:1024E00039B556C33B592C8BE273128E91F8720E9C
4689:1024F00036E0CB6F8EC4D750C0D7A591F8D2958B5C
4690:10250000C1D7935D18CD57D26560A467D5A83CAEFE
4691:10251000C76AA896338FCEB7B6A34FCFE67AC86FF7
4692:10252000D72E217849FA94F41A834E6FDF8EF23851
4693:10253000DBE4C4FDDD7BC7C5937E93742BE9D5D264
4694:10254000959FAF02BAF57585748ADD371A654834F0
4695:10255000DD62DC2B923E4B3AA463E68CE4D7F1605B
4696:102560003F24B9D0DE39BAA13E823E4BAABED6B8CE
4697:10257000FC387B55FCE0709CEE7F012DB720EB0012
4698:10258000800000001F8B080000000000000BED7DA4
4699:102590000D7854D5B5E83E33672633934972924C93
4700:1025A00092811038934C424826302480FC552721D4
4701:1025B000D0F0EBF05783243A58B4412193026DA335
4702:1025C000D77B33908001EC2DA2F5A1F2EC808A68D4
4703:1025D000B506A51ADB889320DC685107B52DB6DA5D
4704:1025E00006DBCF9FB64A10AF175B5AEE5A6BEF93DC
4705:1025F000CC994C10ED7D7DDFD7F7A27C3BFBEC7DC9
4706:10260000F6CFDAEB7FAD7DB268A6C4DEB130FAB9A1
4707:1026100000FFFCF0EF9D62F81D7F5CF85456DED59C
4708:10262000DA8DE2F915434BE8C7DE2D1EEC675AB68A
4709:10263000A9981918DBDAE264CCCC58BBE4F5E5C004
4710:102640007872D3A90DF87C8B0C1D1D8C853CE6F0AF
4711:1026500043388FEC2FF6A70C8E975554E550B318DE
4712:102660004BB9EC4FC93740BF4FB30D2A93E03DF54E
4713:10267000BA276C93E0BD93C90CDF4BCD8C363C0080
4714:10268000EDFD6F8E65FB60984FD704C62876C6B601
4715:10269000B5C03EDCB89A708E612A967D39062796C1
4716:1026A000AA939701277FCE447B98EA7B5CF98C4DF7
4717:1026B000C6BA4FF4EFA3FEDBCC3B2D369CC7655169
4718:1026C000F64983EBBCC2C89A3A60BED92A6C0AD6D6
4719:1026D000CBCEB7AA8B53B02E51FDCE96DDFEDFBB1D
4720:1026E000713D612A33178459A08C315B71480D41CB
4721:1026F0003FCB6616C0F7E3E179BF4BA675587AEE7B
4722:10270000612AF4CB747BA500F4732C80F13438C3B8
4723:10271000BF45008AB472E8B78FF9D824848F2D1C86
4724:1027200092868EB728ABAA574E1DFEFC16C5E10156
4725:102730001378A09DA7E56FC64087076B4E03CB6655
4726:102740006C23F65519ABCE875F70DE66F3DE2498F6
4727:10275000F75A359DF6FD89A32A8D79869FEF7E383D
4728:102760009F501140BDC542E5BE168585004F1E0431
4729:102770007CC1FAFE1695CA032DC5543EDAE2A5F6D1
4730:10278000C75AA652FD472D3EAA77B4D450FDC916AC
4731:102790003FD50FB5D452FDE99600959D2D0D54FE01
4732:1027A000A4A589DABB5A9AA97E45129C1BEEA738CC
4733:1027B000E45C02E7D17EB3D9A7027CEEC67304B80D
4734:1027C0001FF1E5677AE1BCADC5069604DDACC777BD
4735:1027D00031DC8FD569F085E11CB63A77B1AF43693A
4736:1027E0009A92D22EA5C1FE1FB7B74B13A05DBE9320
4737:1027F000A9F0FC7E29D4C0BC8CFD6B78865F9EC698
4738:1028000098DBF9CDAA0CA8B7862B775A006F8BD42A
4739:10281000C5B59B62EA6A4AF98D0795C1FA18CF5E81
4740:10282000D906EDED6AF54E87C4D7C14632B62B3CCA
4741:10283000C7BF09F02892CF4208F77E97398CF8B8C5
4742:102840001ACF4BC6F52BB4FEF9ACD56980F58F5184
4743:10285000CDE54837D03FC21C97DEFF6E55A5E7F1A6
4744:10286000EF5DAC9F61D225F563C68B8C87EDD245B9
4745:10287000C6B1484B2D5158FB0E93E01F5976E21F0D
4746:10288000ED2676AD1FE0DE6EE5E5699744F3F5BA17
4747:10289000AAAE724179958B9F6BBB35A454E1FC6560
4748:1028A000062FF20BD6EC7A3D1FE6FBF64B32DBAE81
4749:1028B0000EE2E7E3829E0BC7A4F8701EF62F967017
4750:1028C00021CCF3D5318FB76540BDF001AFD708FDFE
4751:1028D0007730AF0DF12474BB813D04F51F4E2AC83B
4752:1028E000580CDD4B27FF382300F8922CD61166AC2C
4753:1028F00006F16DD3961BC6F441F9E909CEA7BAC417
4754:102900003C7B4DD1263ACFC97686FB666C6732F2A6
4755:102910009D4D4E38A4CB18338CE0A5D9A45C8DFD19
4756:10292000CC5BCC2C04EB31FFF5328B1FC66B3D9793
4757:1029300054837C84B16832F231B335A0A4C3F39DD3
4758:102940002103F18556D51E9660DC1DF6F25E15F961
4759:10295000A762F016221C3D0682639BFD6B6123F289
4760:10296000676953032B80F52A4F5A5CF03CEC312801
4761:1029700048E761DF921AAC8702B2B750150C02DB50
4762:102980000319E1ED382EEBFFD9046CAF635E84C30D
4763:1029900096EC3FF72443BD75B9E235F2DEAA3C85DB
4764:1029A000B111F81B4CD96AEADB9C8CEB58C1FBC314
4765:1029B0006FDEC54087A949FCFCBED73D57C92F2310
4766:1029C000B912EAE37C49BA0084289BBC162FB48F65
4767:1029D000B797D7F8A09453CA2D2AECB34D29B7ACBA
4768:1029E000A2FD333B83793219E74FAD8AA1262CDA59
4769:1029F000BFEE2131F5827B0A9112B5B7D9777523E5
4770:102A00003CE4EB1973A9B83E984FE37B000F4BC130
4771:102A1000CC5E15F6D17E4306ED4396BC5467D7CB0A
4772:102A2000B4EE91AA2DC2C6039F372FEC65C03F4676
4773:102A30005A6E5A80F5110DF2EFFB62F8744E405F4A
4774:102A4000CFAAD5D73319D42D31F30ABC89875B3C83
4775:102A50003C46286D2770FD2302323D8C5FFF3DCA46
4776:102A60005DE9950CD769A77566DBAFAB040801CAB1
4777:102A7000F93721FEFDBDEB1CAF2CB1B860FEF10EA5
4778:102A80000382934D60FD9B71DC1D02DFDB5DFC3C2E
4779:102A900007E9CAA8D1A50FE9724CB3818562E48E1B
4780:102AA0002B6463A198F90ADA3374F5C29D2375FD8E
4781:102AB000C7EECED7B58F0B97E8DA4B0F94EBEA65EC
4782:102AC0001DD375FD277456E9EA1323F374FD2B7AA1
4783:102AD00097E8EA93A357EBFA5F76F23A5DFBB4BE50
4784:102AE0001B75ED33DE5FAFAB7FA5FF165D7F20E387
4785:102AF000868E047272BA8BF38536A72FEA4B20CFED
4786:102B000007F42E45EE1F380FE09D494EC0EC98F9B2
4787:102B100052BC3640A6C13A63A3947793459DE47AAC
4788:102B2000ABBA19F139D54CF82CA33C87FAFA9BCDF6
4789:102B3000E124C4C3CBBD2AF217AF8BEB336F17F977
4790:102B4000BE8AE756996A21B920DB793FD93E87F4DE
4791:102B500094D1BB812F55A0D6C806DA93913FB78494
4792:102B6000FC6EF7E0BAADCA4E86F45B995AC3FAEC34
4793:102B700083EFCB8A8F0552703E95E6B32821EA6732
4794:102B800055E1FD987D1D3618981DF97837C809184C
4795:102B9000BF23255746FAEBF86B4935952933E620D4
4796:102BA000BE4F54D8034F40FF0E89F532D0933A0CF4
4797:102BB000EC2CE86CEC497BF99D20AE8135FA8DC890
4798:102BC000EFA6B0262A471B980DCBBD52DF0606FDA7
4799:102BD0003C4D27AA72A0DF0977600DEEFBBBA04336
4800:102BE000E0BEBE3B9EEB595BB2E7A9A897B5BB3AE6
4801:102BF0007AF3713D592057901064BF17F50A6DBFE5
4802:102C0000778AF394F3DBFB50FEAD4FB7A8A82FC92A
4803:102C1000969DFEDF03BCEE37F53DD20AF5364959E5
4804:102C2000DB817CF166BBF72186FA23879B9A62A839
4805:102C3000D80CE3766CF2C9E9D0DEB18D79DB903E39
4806:102C40001C959BD3E179E1A855860CA407F7A6CD86
4807:102C5000586E413D16E61BE7D96BC884F6D24995FC
4808:102C6000B50C65AF02F3650E8F4FC6D4DD0CF7C30C
4809:102C7000DCF2BB8857A8755F80A55766C079C3BCD6
4810:102C8000563C6F894A8283F59C3D6CC5BA9BC3C58F
4811:102C9000EA93C2C95077B87D92CF83EFEDA6F3B522
4812:102CA00046F47AEC1A77E04E84A76381FE5C65CB2C
4813:102CB0005DB4BE1D064E17EDE9EA7194CFED2E7797
4814:102CC00046AB3AB84E8DAFDC2FE4A7F65CE32B0A97
4815:102CD000DA145983FA0DE0F96E4301EA673B19F201
4816:102CE00027EBAD3B19E2B55509A90CF5F07F0B11A7
4817:102CF0009E6BFAED064133D5F9B51694D7671DE5FD
4818:102D0000A4CF5A9BF7D379C5C3CDDA6760BE8BC019
4819:102D100035B5E85E92EFC080D542804F4FB6BD61B9
4820:102D20006F02BD7FAAB01BB6011947495EF92DC8D5
4821:102D3000AF4DC2CE004C30A07C3BAB30925FACC3F9
4822:102D400045F50DE9BCAE8DB321AB3CE762FAB77532
4823:102D5000B7850562F6B10DE641B86C39BFB806E13A
4824:102D6000CA64220EB6E3AF9EBDDB1196C2AE992AAD
4825:102D7000E03D1BE706B88E3633B20BBC8E053548F6
4826:102D800077FE73F9247CFFE4CAA07EDE103336D1CF
4827:102D9000BA4D9A5C325C98406B55CD9A1C26D596FC
4828:102DA000CB2DF8BFFB82847C3F468EF182E4BA26AD
4829:102DB000B70B77EADBC7EED6D7C78587BCFF06CA55
4830:102DC000FDE5FC77900BFAF67B85FC5E8EF21B4AE4
4831:102DD000B6CC4472CF022BBAC0E5EEA01C04BE9064
4832:102DE000D711A944363A6A638C3C64B40F9D7C5C6D
4833:102DF000E3E67CCCDF2B9BF01CFDE7C0F8A818CAEB
4834:102E00009747277178F79853C29BE1BDDBC12E0A23
4835:102E10001471FB3900A4F65DD9FBCB3AB4B37A8DBB
4836:102E20005EC0D881738A3FD715F91C7F7A5DFEBFDB
4837:102E3000BA487FE8AB40BB1AE70BC4CCD7634B1D45
4838:102E4000CFC06E79B92860CC877E1FD73826217F06
4839:102E5000481AC54C489F383F2B1AB4DFAF12F4B460
4840:102E6000C3FB5AD31158C76D2793501D67B38DC745
4841:102E70007B5BA0BE3E4F267EA65CB6F60768275752
4842:102E8000FD1ADAE19DDB543587F4F45E13D9EB5576
4843:102E9000028FAB84FD75B4D044E3E68A75E78812EF
4844:102EA000DEB071FB3B62437DB6F400F062FD792633
4845:102EB000F3761FE9BB651DF1ED3E86745C22F005DB
4846:102EC000EAF64AA84F14F50E26652A708E136AFB9F
4847:102ED0007AD094F0BC78D4867878D0CAF5B7470514
4848:102EE0003E6433C91B81F5671FB07BC3D02FC5C8B3
4849:102EF0000E46611FDE17E47762CF7D7C97BEEE61E0
4850:102F0000317517AE435FBF5D6D92102EB7D7818EBE
4851:102F10000E5BAEC84F71BC5BCA10E645885FB38DCF
4852:102F2000F689684FADAFB433846BD2A9B1FF2B8A59
4853:102F3000FCE38491A15C5092D53BAAE17DE56799C1
4854:102F4000DE4DEAE0F93FDA82AC1BF8DE052F6B03B9
4855:102F50009EFCDD2A5B03EABF8FC179A21CF911D860
4856:102F6000D9D8DE01E78AF527C1CEC6F210D8D9F844
4857:102F7000FC69B0B3B1DE097636963F013B1B9F7703
4858:102F8000819D8DF5AB8A2ABF8AF8526FF7CF9610D4
4859:102F9000AE3E595580AEA44138931F48627DD2059C
4860:102FA00020903A85F525015CCF8DE17490841E2632
4861:102FB000E0C32CE0B5205E7EFE383E6D9C8029D1BA
4862:102FC0003853611CB2132C0AFA45F2E18D3478FEB5
4863:102FD000E1CDBFDA8FF262A11458910FFDD74D7E7B
4864:102FE000C7CCF5E77E33F6DF6305FC073E344AD0F5
4865:102FF00041A80AE08972F725A3B7157A5D3EEBD4A4
4866:10300000862CB0BF6FDA377931DAEF97DF74AA62B6
4867:1030100034D40FEE0B2F964119BFFCE1534FE5025C
4868:103020000FCE796015AFDF79EAEC28684F0BED58C9
4869:103030005C3D0DFD525C3EED91586DAC7ED72CF0A1
4870:103040003BD8BC8BE41CF077867068CDF6937C3C53
4871:10305000EDE84F5D05FD8359FDD9D75D847F079B62
4872:10306000EF2639D49AFA07D23F5A07E48597E485C8
4873:1030700036AF262F3E16B8A7C98BF5565E1DE8174A
4874:1030800028A0E7770ABF0E0B17523DD3CAEBFF5EAD
4875:10309000A5BE8A760FC087ECDC23A925DF9B897645
4876:1030A000658DEC4D82FA9DF6722BCA9B07F3B9DD54
4877:1030B00002E386D08E0FCDB6841FC24375A8448F1D
4878:1030C00019DAF80E372A5D2C43ACE385E9B608DA45
4879:1030D000F9ADD5967DA84FEEB2E7D378AD53CD21AB
4880:1030E000F4AF68F5CDD3A75B509F484FCD70615DBD
4881:1030F000E34FDB01EFB1841F238E5B25B65B65B127
4882:10310000478CC8CF2DA63FC5EAC9761625FCF11A13
4883:10311000C020413E50C0F1AA82796BF1B9596A0AC8
4884:103120002132EEC1B5E33E52849F92E5F2756BFB0E
4885:10313000F0E5F27D69FB483187C43E484FDA6537D8
4886:103140004450DFDB05FBC2F176E7AB049FF87D312D
4887:1031500074BDC2B8B3A68A752B330FE13A661B7CE7
4888:103160006DF8DED1CFEA1C805E6C0E6B92F17901B6
4889:1031700058B4E89705946EBB7011BD23DE2F7BF920
4890:10318000EF24DA0FBBC94CE7F24C215FCFBDE6B0AC
4891:103190008B91811B1EB1246578FC7D6308FEFA18B3
4892:1031A000D2536B868FE3AFD29FBA09F137BD3F7B15
4893:1031B00033ED2B92F03CE2F138FE7C7E0BFF841C59
4894:1031C00030227C3FEF3CB573D4F0205E7E4D28501A
4895:1031D000B4F375D23E7DC59C0E343D8A819D9332F9
4896:1031E000147E5B613CB568B06E76FA493F3639BCF7
4897:1031F000C5E8BF6DFD9BB12191FF36AD80D3C1A65F
4898:10320000541BE9CDADA95C6FEE4E9DA7B377AAC163
4899:10321000FE91003F8C99AC03E9C8987635F9BF8CD4
4900:1032200039A821E1BAE2F4D1B4055C1F55401F4D25
4901:1032300030AF56CAA88F26D05307F4D18C795C1FC3
4902:103240004D35933EBA27C55CBB3701BF792F9FEB45
4903:103250007BDDB88F04F61ED879E487D4EC3CB3123A
4904:10326000207B4DDBE77BF99CAEB4FE494A1343BF9C
4905:1032700098D1EC5551DF34DAB8FE9804DB2C8E91EE
4906:10328000DFDAFCEFE49B088E3D45FCFC0C16AE9F9C
4907:103290005CFEAAD49408EE6A81A63F24C6BBBF0395
4908:1032A0006F882F94DBCD3ED40FCAEDCE2AD40F8683
4909:1032B0007B0F4CCDD0FB19837CC5FBB72946923FD1
4910:1032C000B2D78978D661EA7BEA55B4E38EDA49DE73
4911:1032D00074A48CAA8AD59FC15E0D15C32007FF0276
4912:1032E0009468186AA782FD34BD00C6ED599F3D89D8
4913:1032F0008F0B7A5ED950BD32DE1F3040EFA9FB5DE7
4914:10330000FCBDF0087C4F5A3F3507F12A9EDEB532EE
4915:10331000CFF952DE6A5857DE885E2AB5E7FF9B195F
4916:10332000C9BF16DF7FF1C03970B93C0E264B33920E
4917:103330003C5E8CEBFE70E36BD95E584AA37C86E45E
4918:10334000F2C74D53D36E5339BF3D8072E69B32F1C5
4919:10335000DB516BBAD33362CEF9DE96CE3CD98D7198
4920:1033600083685EB59BEC015FA2F5FEABA03F16192A
4921:1033700043FCD924F0407544E78E05B8AB7683173B
4922:103380005DD2207C757CA0524EAF5660FEBC16E626
4923:10339000B543DDC514F267E55D3012BEE51D594148
4924:1033A000783CC6D12F853C31F3202B8E898B7CD283
4925:1033B000544DF499973360C751FCE013476431D200
4926:1033C000F72777F115E53DA06F07194BFEE61B3691
4927:1033D000DAC2680A8EB95531603DEF07121BE5C2AB
4928:1033E000751C71DD86FE9A6792C95F63DCED267FEE
4929:1033F000CB0FA4C0F505B08E0FC3EAB7D1CEA51F81
4930:10340000E8B7EE3BB67DDB498E45E7921CFB968123
4931:103410003D94C09FD456C0FDE35B04BEE7395FC94D
4932:103420005B5D81E5713AEF4BA5A783C8B7619CDB73
4933:10343000D27652BC2B54C58AD1FE6B37015E25A0D3
4934:10344000D73305226EA6F163013F2B5A2BB00FA391
4935:1034500024F4BC038F3EFA6836CA6D864ADE00DD6E
4936:1034600069E32417775063B2D7C7D0EF20293ECE47
4937:103470006795903384F19DBF1A13E27544E3D3AE90
4938:10348000AD4EEC5FEDF63A910EBA5D539CD701FC60
4939:10349000EC76334B8AE1C31A9EBC903285F4106DF2
4940:1034A0009CF529F917B5B7CDC08FD58BC86933FA0C
4941:1034B000BD519FE999665161BD5BEDE551D4B7B649
4942:1034C000DA1DE5E43FB703DF88F127D9EDC7080F20
4943:1034D000ED5EEE67B323FF457F92D87FB7EB18ED23
4944:1034E0005FEBB7A780D3BDDD1BE1F147B066B09FAE
4945:1034F00055F687D0CEB03A18D995560BA7A76438A1
4946:103500000E4B0C1FD1E6FD7E01B7D7B68E2A8F5623
4947:10351000D2FA64F408B0ADCE7227C9438433EAA36B
4948:103520002306F451F29BBC2EF881364E6B37DFA791
4949:10353000BFD9E9ABCE443BD4FF22F285ADF6EB2CEC
4950:1035400021940B29932E3ADEDBE2DC868ED73C4BAE
4951:103550008CF73AD28331A55CC1F14CC82712E0DF69
4952:103560001FC4BABEAC5F0C20AA90DDC6B87E051899
4953:10357000EF4CA44768A545F8B786BEC7F9A44BD859
4954:103580002FC0273FC5F5AF1BF5CEB14AEAC5ED9672
4955:103590008CB972B10CE7F5319CA0511AB4E3E3F594
4956:1035A000994A633FC9354D1E69F2E95ED467CC8301
4957:1035B000F4A4F95F721BFC24B725879FF006F41B67
4958:1035C00015E9C68871DF04709BEEE6709352A7AAD6
4959:1035D000482FD5E7FB72F1BDC329EFE7B2183F9A38
4960:1035E000C60F5FF86CBF15DB3F69A8BAA8DEA2C59D
4961:1035F00085878B07A7DEF2876FC6EA2DC3C5873F95
4962:103600002F2EDC936A26FFDBFD929E2F4D72733EB8
4963:1036100038C1ADC50F0363DD59D8CFEF25BD51F8D3
4964:1036200053DE2E0A94B8D1FFD56E662138CFC39FE2
4965:103630004D71227E5C2A7C35FFF948A14F8DB4EF95
4966:1036400097904E47368425F47FE7367448BE8BF456
4967:10365000330ABF92D6DF24C6BF42EE37A2BCBA42BD
4968:10366000D071EE399915C7E8817F2BE0FA9449E8CB
4969:10367000EFA93D8F5871BC1E83BFBD08E543AA4129
4970:103680007D2886DE4D6BCA2D5531F069C5B84E8256
4971:10369000F3AB730FE85D641F69F2D6A4C90987AC68
4972:1036A0009313C1648EB79ABE139CCEED21490A2CA8
4973:1036B00047B89E9EFE8745C8B24E4B1D668C7F7FE5
4974:1036C0005E5C6340AF31845769760CD28B57567E6F
4975:1036D000DA07EF4F7CB892E861320B507919E37A40
4976:1036E0001FE8515FC7F92A70C931E7CBD0F590FDCB
4977:1036F000F9FBB812FDDE59E89F8B92FFF4BBE7257A
4978:10370000E2E3F1F0D93F009F81F89DCE0F9A2BE4C0
4979:103710005AAE6857D10FEAC27894DE4F59D1ABAF99
4980:103720004F8EEAEB979D8CF37B867C3F7767F3782F
4981:103730003F0EBA07E80AF9C16A11A71C150A572AF1
4982:10374000B0DE3CD641F1C0DC860C1D5C2F378A3CD4
4983:1037500009E69398B64EF8C995177E80EFDFE7D655
4984:10376000F49F10E9593788F66F54AFFE761BDACE16
4985:103770003B4DE40FB5C0E408AF6FCC5D321BCF7595
4986:10378000883FB549EF47CD8D6D0738DCB0C7A46BD6
4987:10379000F7FB26921DB054F86907F68BEBC8E2FBE5
4988:1037A000CD2D1F3AFFE7CF0BFF3286CEAF8D7B2F9B
4989:1037B000F01BE4A3EC3C9CEB14841B438F03CB93E2
4990:1037C0002312C6A54736311FEAC3B91B992F917F33
4991:1037D000FF6501AF7838B3D01504BF59E2D948BBB3
4992:1037E00091ECF4911B0DA4078E047E807C60D15A6D
4993:1037F0002017A8E7AE55498FBCB2C1C0500EB0F338
4994:103800002DBAF761B9E4EFD4CEFD5E1C0FF5C87593
4995:103810002C6CC0FD3495103DD1BAF207F101E0F5F2
4996:103820000E879785E3F75493CEAF99877ECC18B86F
4997:103830006878901BF7BCD1CDE32E1A5D803C7BD914
4998:103840004D78C2E55C21CA3958D287D34EEEEF805D
4999:10385000F55DBE99D17EFBD36D619EFF30102F3098
5000:103860005E180BFCC932AB18FD2A3B149B01F31404
5001:103870000EA7F7DDC7D219FB2DA8BFD533197BDE04
5002:10388000D65F2A41FD8F0FFECBAE763894C3D6FEAD
5003:103890001FA2B3D77EFBE6253531F5D47FBF9BEA67
5004:1038A0006C2A5365808F0D67807DDA9479078C30A0
5005:1038B000BFCD632727A48D0DD029EDA76DBA7A3B24
5006:1038C000E679B4151A484F62B1EDB08FDA4245D0AF
5007:1038D000B78FF2D8580D8FDBC78E2F3B2E32FE3CB0
5008:1038E000187FD21718DFC2D79F8D8F40BE64E3FACE
5009:1038F000D14F8DE3E3F9A2B328767E319ECC427B93
5010:1039000031BE02F3D9253E9F827924D94C9F3730AE
5011:10391000309F02F395FD03F6533BF43C4C173B8F6D
5012:10392000ABBFD879B4197CB4DED0783BD93F0C9AC0
5013:103930000D53D0CEE0F35965F6825CCEE1DA366500
5014:1039400010AEA0EFD1B8D07DD305016713C25931B5
5015:10395000139C87835B8FC2F398B629B6F026D7FFF6
5016:1039600085F372F2F38A9D0FF5C64B9EEF6A98CFEE
5017:1039700071E9F3217C917E06E00B67B239FBD2E15D
5018:103980000BAB0A5D0A7C7B605C430C5C07F385EE45
5019:103990005150FFB79AFC162FF0DFEB0B791EA2C730
5020:1039A000B1C442F903594B2C9897B7C563AFC1FC1A
5021:1039B000BD2DEE6516538C9CDEE2A9A376E84F7907
5022:1039C0004E9E880DDD13AC8C45C9FEDF36B3DAB9E7
5023:1039D0000AF1A789E74D6979449A3C64223E49FB84
5024:1039E0008217D3BE72A8BF07FA6F6B9A44796269D7
5025:1039F000E97FA6FCA81D0D5E2FB6DF67E571C6BB8B
5026:103A0000459C091195FC68E3A73F80F1D6F2C2F509
5027:103A100012C517D75E3CBE587E265A8579566C155E
5028:103A2000CFA372D6C971F2504FB73B10AE3CDF291D
5029:103A30002C71F8EAC6BBAF308BC79FDDFB18DA7775
5030:103A40004FC158463D7D1930EF289E1E65B34FA9E2
5031:103A500044BD7CBD81D6918BA17C1071E5650B9C2A
5032:103A6000ABE0F9A8EB65AF04CF733CB752FE116829
5033:103A7000F5A46F783CC7ABB03E649FABF5FB88DF25
5034:103A800057FCBA417091BCD1CEABFC8C3719EDA874
5035:103A9000F2C225941F463F1ABD1BE3F69389F6AF89
5036:103AA000C16705396673C7EC8BE9FA093BED7FB650
5037:103AB000BE0D9109E5627CFCEBDFFCB4CE24E6B5DB
5038:103AC00098E9BD3AB217B5B8DA48A41D3CF7D18CD5
5039:103AD000C725E2DF9FC2DF674E1E674BB281E9094F
5040:103AE000F427DD6823FF655212D4E17C2433B38CC4
5041:103AF00080E7F70ABFDF2689C9581F9C2FC270BE16
5042:103B000056C9BFD3EBC292DB4BA6743FE517629850
5043:103B100036D6EEECC1BC0D685FBFC695837EBB3464
5044:103B2000208828DACD222EA5F949520BFA56A2FC9C
5045:103B30007EFDA1BF2CB1A07C46C7D274D0BE0B3F86
5046:103B4000DD159A39489749E7463235C67E49929B3A
5047:103B5000287F23E9DC689D3F2522EC2EADEE73C85B
5048:103B6000D538DF7FA15D00F85CC994367CAF128048
5049:103B7000A2C6FA47CF3975E30C8E3F4A376F04EC83
5050:103B8000E7D838C0F0E32733B53876FCFC61C62FA0
5051:103B90008A1B5F4938FEE0B899BA71B7C89C5F8448
5052:103BA0001CB670227F5E5651D57924E5E1F2CB1C1C
5053:103BB00045DCCE057E2C53DC49E0CD6DCE26CA37E0
5054:103BC00033DA787CD424E22547521A785EC4287D03
5055:103BD000BE591553646CDF923AA75782F62ABB5E32
5056:103BE0004FBFE2FC3B46E43B57C87A3DDDC79A082D
5057:103BF0003F2F67FAE7A6517A3E7010E903FDFE29D0
5058:103C000093A294979665A73C83E1FC076FB530CAF1
5059:103C1000973225FB9B50C695ED4FCBDCE2847A1A98
5060:103C2000C7AF19FBDD4BD11FF496C0E32D40F70859
5061:103C3000C7BAF5397B8D31E3D69923852847EA0C3D
5062:103C40003C3F9F7E60FEB7B246923F357E5ECAF033
5063:103C50008DF147D537497E77CC3EDE12743130DFA7
5064:103C600086DCBDA8C70ECC9714994CF30DE4F988F7
5065:103C7000F9B2BFDC7C6F0B7AD6E6ABFFB67E7FF580
5066:103C8000E628EDAFDEC0445E3F9FEF6DDC9FEB4B5F
5067:103C9000CC27F2B506E6FB8E7E7FF54951DA5FFD53
5068:103CA000803D29E6CBFE72F325999B281E7387C4BD
5069:103CB000CF754351D99DE88F3FBB60BD8AF8A6D927
5070:103CC000678BF005C0B345229FE9CA5166D21BB489
5071:103CD000710FB44C653E33F7DB60593C53A2FCFED8
5072:103CE0007153251FC6C3F600DDFB8AD02FA5507B7C
5073:103CF000B8C549E5BE1695CA07C11EF4917FCACB67
5074:103D0000EB45DCCEBF6384B26235EA0B95369EDFAD
5075:103D10003C730668A283F61618603D56CC23FC1A45
5076:103D20009BB81D6A45BB393C1CD5D9613C27DBC417
5077:103D300017A22D504F9A6654316F3BC9C5FC89FCC0
5078:103D40002E3F28E2FED8DBB47CF8AF483CDE0EFA0A
5079:103D50004825ECFF5A016A665C20A15E75E577D2C2
5080:103D6000491FA95BD697A2C03AAE9126FEDC0DF0A2
5081:103D7000F8ADD047AE1DCDE938DE9E74A0649984BD
5082:103D8000F97AC670187E5D9AB294ECD1A5CB19CBA6
5083:103D900080F7AFC4F740AEBC2AF49957FA9218DA0C
5084:103DA0006BA16A1E67BEE656BD1D798735A2A01EAF
5085:103DB00077C74407C3F3A8DBA86FBF4DC40B96C6F3
5086:103DC000D99557C6E5D180964978823C814D83F3D9
5087:103DD0002A4A71507EABC8A3B9BA48E57C6E948379
5088:103DE00092A833E6BAD330FE98644E7CEF461BEFC0
5089:103DF000A8E03BCCE12338687967CCF8D8447A5FF7
5090:103E0000CCA7BD77AFF4D8888BF935416F7BB7AFBE
5091:103E100098CB67D4AF0FC6ADF3EC82FCEF55B3443B
5092:103E200078DB2FA35F415BFFFF297CBD097D1AB0C2
5093:103E3000EF57677D3289E22D6C14ED7B91863F222E
5094:103E40009F6AE9405D66724C3E1D73F67BF0BCDFF5
5095:103E5000F84AB2773BE19FD01F226F1A2E247FF1E0
5096:103E6000F106D6E1F4E5717F5CB542F94062BCE150
5097:103E7000E01C9FEFA0F96DE82726DFB0752FCF7704
5098:103E80001CE9A8FA00EF45E1F3777478A5BFFFD4E9
5099:103E9000DAFD8884F6C57D789F4B1E9C0FFDB4210A
5100:103EA000D25FF5F7B2E2D7A5DDB7D1D6D36A66C542
5101:103EB000648F1A803FC07C0BED7DB2A4A2DFBD5F92
5102:103EC00046FC2A19CBFD449813CCEFB9703DCF982E
5103:103ED0006BE0F91B6354AEF7B9FB47C7C685D2C682
5104:103EE000F278DAC2E4D736AA20FF4C0F6F5E8AF967
5105:103EF0004B0BD35EDBE882BAE5E1565ECF7DED1376
5106:103F000017E86CB687DB78BDF4B54FF2A16E7F7809
5107:103F1000CB52CC675A38831150521FDE4AF2326DB1
5108:103F2000AC664F4747E17C0B254E1F5FB634261920
5109:103F300012C6EF9D63353F2933E13CFEAEFF388961
5110:103F4000FCC8AFF95F7DFA7823C3A66CBC27247E3A
5111:103F50001CA9A4CFCCC3DF019EF3E54837BE6FB0E8
5112:103F60004408AE63316FA69850E0AE0B17C98F8836
5113:103F7000C72309D0B519F565556175A01FB736B3CC
5114:103F800080B52006CF994FE039CFE3D1D6A3CD3FFE
5115:103F9000645D70A47246ECBAF6D038DABA4E4F4C73
5116:103FA0000AE17D322D7EAAADEBB4D47F3F3A23BE29
5117:103FB000F9C3CEE5786EA753FA474B503FF1F0FBBB
5118:103FC000748EA7B3FAEF97BC3175133FC7CB1FFEB2
5119:103FD000C152948F1B25DFE563317FCE6CA77B6BCD
5120:103FE000ED42CFDB91150831AEDF53BE63288FDF82
5121:103FF00007A89E24F962E3FB3502BFFE632CD71F9E
5122:104000006727ED6C3A01F8183C24B14DD03F78FE9B
5123:10401000AC19EDF1855DA7CC6877371E3A6546BBD4
5124:10402000BA11EB304EE31E33F1AB78781F1F6BD41F
5125:10403000C5D1357BE2685ED11607ACA771B5E4C582
5126:1040400014D9F5CFA6CFC6FAFA55B84BE0EF330F27
5127:10405000CE4674A9F7776FC1F25AD67714E3052BD1
5128:10406000027A3D7F65835E2FAF6FD2EBD3D7EE84AC
5129:10407000D301F9756D73AEEE3D861A32AC678538A3
5130:10408000CF15CEDBA3C6F1588FB987231159937F83
5131:104090006725DF01947ABFC5C22E89E8B8B1D64240
5132:1040A000FED7A3793C7F3EB8D6487941414407AC5E
5133:1040B0003749C29FE523FEA8C9EFD99D678EE5E287
5134:1040C000FB6B4D040716F245D1AF5F2BF0E9DADA4E
5135:1040D0009A0F10CF6AD51BB91C1FB3DF44FE9500A1
5136:1040E000D7C755E1FFAEEBBCA33A03F5CF8D12F96C
5137:1040F000375636E8F5F57AFC05F5B766291C7121C7
5138:104100009CF4EDD736EBEBDBC70A3956CA4A914E21
5139:10411000BE375692896E44FD4F79BF78250213DD74
5140:1041200022F97721DEAD3547C6A35CBB450A505D59
5141:104130006B87E78D5CEE70796F008A22BE6BE27E42
5142:1041400085D03A89F071E510F91FA31F1887D68F23
5143:104150000A7ED26AF56F247BE93949417DA45AF67B
5144:10416000C9199E417B361E1F8F093C7F85F57970EA
5145:104170005D450874807FD1D2B430FAC38A9E5F4512
5146:10418000F98D451592D740F46C60CDE558CAC41F2F
5147:1041900050DFB4425964ECA8257E3DC1ACF0FC412F
5148:1041A000278BE503BE479884797CB8749C77FEA87A
5149:1041B000DECFF01C17EDBEFD0CF23B7781AFFC0E9D
5150:1041C00058DF0E2B9F7FC7B312E9AF8D9E63C417D4
5151:1041D00073004D70DE46A7E08F9DC01FB5FDC3790B
5152:1041E000E720BFC20B210B3C34EF082D3EA0E5D7E2
5153:1041F00046AA0C1780EFE488798F97A9B4EFEC1BDF
5154:104200003B24DC771E0B6D423FD18FC7327AAE95CF
5155:104210009A1F7FF960BCBA06CF739DB3CF4CFAB733
5156:10422000885727E8B764ECE404FD7C4CE747986DB9
5157:104230003C9F8A71E5F5CF155C34AFC26831E8E880
5158:10424000D5A4D874743DBF584FE70BBD7AFABE723F
5159:104250006A81AE7DB1AF54D7BEB4A642575FEE9F20
5160:10426000A1EB7F55ED2CBDBDEF9CA7EB6F5597E8FB
5161:10427000EAC9C557EBFAA778AFD3F31B4707E50F99
5162:10428000982DA1BE808AF7E6199B9A31C8AF4B538F
5163:10429000A13394B60AAB1DCBF68949113CB7F69110
5164:1042A0003C9E9AF4E2B79C11847ADA63964A287F9E
5165:1042B0002885AB305E6411765EC9AD4CC7CF1795CB
5166:1042C000723CD74A5371401907E7E339A0E6F27C04
5167:1042D000E968099E8F051D8888C74F5B48EF9810D5
5168:1042E000A7FFBE5256692B467FEBADBEB9E497EAF5
5169:1042F000640ADE97DD67E6F94CA1A779FEACA7B3A7
5170:10430000CFE08BA1B7BB8B397D7EDF5F45F9498D4F
5171:104310005D20CD10BF77BF6346BF5D6357772ACA64
5172:104320008DF1FE77CCA85F0F3E17F244EEB761FC2B
5173:10433000F2898EC47968738ACD34FE31C16FEBBFC8
5174:10434000C5F92D20DC02B48F34FE597F90EFAF7E8B
5175:10435000B999E85BE3A3C03F75F1B078BEBC726663
5176:10436000780BD22EF0519DFD72EDB2391FA03DC4E5
5177:104370005884F418E0A3FAF6515B89BEAF8DB36F91
5178:1043800026150FF053CF05A097937E43C27D2D2DA8
5179:1043900095695F2703B308DEDF07B8A1DDF8FD21CB
5180:1043A00070E2F0FB3CF83C2EFC89DA39C5F7AB2D06
5181:1043B000E5FAE8E3C3F0CB3DE21CF749D17264664D
5182:1043C00041BF8DF074A5C5B21CF30C8EE57DBA1506
5183:1043D000E309F53F96D09665BFEE7E311BF30ECC18
5184:1043E000078F66633E44B0E368360338AD35A99B5A
5185:1043F000502F063CF06E827369EC8CD0FAD775545E
5186:1044000074E3F3759D92175961F0D09939B44FD682
5187:10441000B715F5F87DC3ACEBBA62AEA7AC2B56A9C5
5188:104420000C06604E94B38792C88EAD3F087C08D7C7
5189:10443000F5AC44F730F66DB3D426D24FEA4BF9F71A
5190:10444000185ED866661847590BEFE33E8EE51D33BC
5191:104450005B106F0E4A6413063B4E2C477F7C70A3A3
5192:104460008961DC565BDF8779D1DFE0FEDF5C6D625E
5193:10447000786FB075358FC7BEB9D148E318AF3751E3
5194:104480007DC51A9E277C64F5EFB6E6C2B86FAE957F
5195:1044900028BF7ED6F5FF790CEB2BD6703D281E7F0A
5196:1044A00007F0350E3F5704F47837044F1BBE1C9EAF
5197:1044B0006E1BC4D3F12867E1DC67E720FEDCCCE8A3
5198:1044C000DE62EDF923A61C586FFE56C58BA1DD32C6
5199:1044D00063784B36F28523BC7DE2DABD12E72F2AE2
5200:1044E000DD67CF6D3733CA532CE67C680F9E5716B5
5201:1044F0006EAD5FC2BC362647F3717D2E91C7F5A421
5202:1045000089D51E443F92CCF94BD933CEBDB17EA4A0
5203:10451000F9021F35BE570AF6FE41F243778CC47B81
5204:10452000E68F9BB87F6CB418AFB0A07FCE6228BB7B
5205:1045300004BEEC17EBD0EADF10F8CF3AF6911C5D21
5206:1045400068E1709FD71CA9C37DDC20071E43FEB71E
5207:1045500060F42FD6A25C6BCF7FC913203F5709C9E7
5208:10456000B5A0388F23D3DEDBB301F3EDC6D9E81C49
5209:1045700017F7DC13C5736D74CB9467682D9C941387
5210:10458000B8881F21784ED5DDDB6BEC3A33C79780B6
5211:10459000AEAF13EB2D13F7F35817F71F003F96A795
5212:1045A000960FF6D3F6AFF93DAC850FD2396DF826EC
5213:1045B0009BC8EFEDDF417058B9F68484F752AE32F4
5214:1045C000F94C7680F32FD2D872B4835F6A61744F4E
5215:1045D000ED38DE570356F24A8B42F5A8B8B7F65AC3
5216:1045E0008B4AE55566FFAB089FE52F341522BC8E3C
5217:1045F000E4DDEDC7EF309C3E2EF459A6F07B8C0233
5218:10460000F7CE76199905DACF1E92C2E43411EBBFCA
5219:10461000E6DC4816007EF22B713F6E5DF3EBC4E7DB
5220:10462000BC0D67E6A09D3171EDA9AD580F36FFE7CF
5221:104630001CD41B7E037202F12BD82931278C5377AF
5222:104640002E83DE5FD779C28CF6FCE386FE3908FF45
5223:10465000D06189EE55059BCE10FFDC23FC2B69E36E
5224:10466000781C31D835D140E7E92BE1F68938FFEEE7
5225:10467000923FA722FFB234ABAFCEC073EC35D23934
5226:104680006EAFEA4F55129CCB491817F3477E25F2BF
5227:10469000F186F0597388FCB2B5026FE3DB93C7195A
5228:1046A000343BDC24F2949804EBA913F8558FDF8394
5229:1046B000C9403D5F8AD8806EEBBB66917FA3BEE99F
5230:1046C000E2DF77190EDF2EB56C64DCBFA1D5D1FE19
5231:1046D0008ACDD742FB4B7F0F3DC4EF71E5B9730222
5232:1046E00017D1EF827D23297ED2D8CE285EB2EE5C30
5233:1046F00009951F3D7B1BDD7BB2D8FAEF46B9C08A16
5234:104700000CA4D7AF0BE9F59B4F4B381D7C5AC2E97F
5235:10471000B8601CD8271636609F801D5284FA0ED8C8
5236:1047200021A93D4C679FC43F27FBC422FC86A02ED5
5237:10473000059E4CB0EEBF9454958ECB42BADA49F840
5238:10474000CD00BF11AFE2F739651C5F9746CF2B7ADA
5239:104750003E30A3BE1BEC4C4CCFE6D2CA2938EEB695
5240:1047600061F2EFCE8B7DAEDBCD085EC1DD1904A713
5241:104770000FD96E7F15E0E587B00EBC977EDAEF4F5C
5242:104780004E87F74F07FCC9189FD3E8BF71B78DDE7E
5243:10479000DBE65E9289DFD1982FF0FEA3CE59168416
5244:1047A000F335BB39DD69F3FD26B22213E967B2A9FF
5245:1047B000DF8CFEC9515DA75251AF9BFCECD24CA4DB
5246:1047C000BFE1D639A384F3E575CD2397D3BD1FF898
5247:1047D0003102DDDF24E4587073C48CF0BFA9991155
5248:1047E000FE763FFDEB46A4DF8FBA921594931F3EF1
5249:1047F000971C427E7FFA7052D80043AD15DF3FFA16
5250:10480000D0D4B788F4C7678D94AF103CFCC7BB9178
5251:104810001E834F27D13D9A9BBA6E3B83726E6DD734
5252:10482000DC0F642C1FFBC7D2C3BAE6D1CB63F38B7A
5253:10483000FFD8726024F2CF8F64CE276EEA7C8AF4B0
5254:10484000D99BCE9F1D8FF9831F3EF79729C8CF8232
5255:10485000CF9F9D827C2CF8D3B353B03DF84C72535C
5256:1048600022FD646D29F79F68F2D1F586ACF3B3643D
5257:104870000B79E06ADB5983DF29987C6219C501B4A2
5258:10488000F6C985063FF69FFCF3EACCEB63DE6B8B43
5259:10489000CA942F31E94475F2EA18BC4C2E35697E72
5260:1048A000BA4BF38F883C04CD3FB22D2AF37B750DB4
5261:1048B000C630E6F1AE8CF2F87BBCDF8431FFFC320F
5262:1048C0003CEF35595EFC3E0FDE4BC7B8C8E99B0B89
5263:1048D000C3742F3D6439EA8ED18356440D9124F47C
5264:1048E00083742545501F5A11954F25C5F8457EA361
5265:1048F0003CB905D5F81501BD1F23DE0F023F297213
5266:104900004CFCA47E63C4A4C9A98530FF2FB6300532
5267:10491000E33643FC23B55F253F4CBC9F448DDE65E9
5268:10492000C1F75437FF9E8EA667E2791D4A40EF1506
5269:10493000829E353A6A8B1AE81CDAA2551637941E05
5270:10494000414787406C86302FA86BE94368A7B79D25
5271:10495000BF2A19E1D5F6C61286DF8B38AD54590A45
5272:10496000F1BDF35FB52CF70CE2C710FE318EF3C733
5273:10497000017D601839F7A1E05BFF2879F7C13F8915
5274:10498000BC03BBBA1FF937D8D52BB9DF83DBD5F110
5275:104990007242E3BFDAB8AA38E7A1FCF703D25FC0DE
5276:1049A000FE25FEAB96A8D46F54D7E24CB28BDF58ED
5277:1049B00096A9DA878E5F207B0D199EA1E36BFA5AC8
5278:1049C00030E43B6A413BC6C7F34F83CB24FA6E54B5
5279:1049D000D02F919E1DAC3385B15D5B4F74198F0B49
5280:1049E0002EF74AF41D104DFFD3F4C381F649D0EEE3
5281:1049F0001AD41735BD30EAE77ED1653E13B55F6541
5282:104A00000EE4944CC6FD59E9F9E4697C5CE0034787
5283:104A1000D1FF79D5D724FA4E97A62F6AF819AF4F50
5284:104A20007EDC5570D1EFCFED1178A9D1D7E838BA37
5285:104A3000D0E4D47C81EF8D28A733514E7F66EEB34E
5286:104A40000FAF77839C2E2DA1F718BD3FE9E7B23F4A
5287:104A500091DD7D588C3B433BB7E80B95B8DE3C16A7
5288:104A6000A5BCA8E1E467AEF0D30CD73EFF12E9F88D
5289:104A700086927F2C1D5F57F2CF41C703FA9F39F111
5290:104A80003EFF52527913E2AFCDD844F7A3D8CF4CB2
5291:104A9000E4B78EEFA76AF6A4CC74787C34CF6C4070
5292:104AA000BB27D8C0EDFEF674F555B24F5EE4F7EEC5
5293:104AB0006F12F94A379E53A86CC70F8361FBB75C2E
5294:104AC000E4B7B9F1C009930FDE5FB9519A88FEA02F
5295:104AD000950DFAFDB467F9E6C6FAC1DB4774505C80
5296:104AE00021F450818AE3D7E366D11FD23E328CB1E4
5297:104AF000C746F4E34CC0E731F72D609E75E2F90C30
5298:104B0000E1DF61717AC04FBBDF247F0FC685907EE5
5299:104B1000CD5D12E585047BB9BFA3B18BF385F71B8F
5300:104B200024E227EF8BFC8C60B395FCDB9A1EF181AD
5301:104B3000E8B7E66689F4BD217A854F1F7759F7E01B
5302:104B4000CF892FC6EB111987F838186F41BFCCD128
5303:104B5000BC2912D6D7815D88DF250DAAEA95B97CDC
5304:104B60007D2C4CFCC5A7F3A37CDCFB3BB223573E5A
5305:104B70002BB14CD23BE2E22FEDF3E2E22FC78EE6FF
5306:104B8000E23842CF50E03FF41FC6EB198D9D274C11
5307:104B900068177C5E9CE59912BD5F708CCCFDAC63A0
5308:104BA000BA2405FD4963049C2EDB662338CD797B4E
5309:104BB0007526D2B9763E1F2DE6E7F5D19B9F54E2CC
5310:104BC0007B53DE9615E4B73F7D73E3EBB9BCAE5A79
5311:104BD000547C6F6332DA211FBDBD3E19E1F85328C2
5312:104BE000F1FB48CF9C9413FA0F0B4B39BF01F976B8
5313:104BF000BC84FCBFC26F2C837C4B19F4BFC4BF378D
5314:104C00004BBCD78EDF2D42FC7B96C7B7DB4704E653
5315:104C100051FD9E7C9E472C737C7DAA2B5D417DAF10
5316:104C200014368B71D81FD9581BC657DAB3022F110F
5317:104C30007DDC6320FC85F7F977270EAA24EFF08A44
5318:104C40001DC63FC683ACB1505EA383FC37DA7761E3
5319:104C500046801D2ABEA3B00CE3AEA5220E32DEC6EE
5320:104C6000641C7F8729B07D1CC65DBA65EF267C4732
5321:104C7000F666E27790E2E3315A7C588BCB6871E2BA
5322:104C8000E1E23212CE339EE359EC774EB4F80BFBDF
5323:104C90001ACFDF6C9DDA44F75F7B31469238EE32F3
5324:104CA0007A5C82784AE938ADBF3E9EB6BDF849C20B
5325:104CB000B72F1A47BBA164B8F9556E77C6CD3F2907
5326:104CC000FDE36CB25FFEFA5FA924CFBACE92DC3965
5327:104CD000DD9F24EE71F6713F759789ECF5D360077F
5328:104CE00065C5C8B3F6717CDC9EAE59848F87A2D5AA
5329:104CF000C9D8FF09F17CDB1BCB96A23E1D8ACA3CBA
5330:104D00001F9B71BBE650549ECCF5832170BAAC2436
5331:104D1000417CCA624B9C07F49EF017BC27F63DEB22
5332:104D20004D6EAF0437F2F88122E82D5863267E726B
5333:104D30002C2F5BD2FCC83989E20BCFF6139FAD5FF5
5334:104D4000C3E3BB971C5FE8EC36B1FC047EDB9A3909
5335:104D5000C46F2ED55FCBD00A9E32C89F2B4BC5F7B0
5336:104D600086CAB8FFF6C5127E5F27A36962257EEF6B
5337:104D7000EEBD61CF3B70B0F4D2E27CCF7B2EAD9F15
5338:104D8000A138513C7068BFA997D86FCE25F6BBA15A
5339:104D9000F8D2D6D77589E3EDBFC4F16E1997A8DFB5
5340:104DA000FFA3F1CFF8F8667C3C343ECE99F4E2F5EF
5341:104DB000216CBB4DBABD3F82D04D7DBA5602529593
5342:104DC000D31FB4205F5B308DC703B6555BC27BA594
5343:104DD000C1B8A806AF87CBB8DEA578CE84F0BB8873
5344:104DE000A37DD1EA4CA0E3D3D318D90DA7ADE27BC4
5345:104DF00048B23262319D9F42DFC369B7268E2FAD24
5346:104E000014E30DC7475E29AB7CBC7432DD1F4AF842
5347:104E10009D8AEA526E67289D8CFC354C56472CA122
5348:104E200079D5112867D25EE0CF53238CF2FBA0DD49
5349:104E3000B584F467D585EBDB25E25E19F38A5CE87F
5350:104E4000A7CB00798B71913B303E427E7D85FA691C
5351:104E5000F34DF2F0F97699988471ACD0389E57C131
5352:104E6000D42788EF68718DE3A6C8EF574914D7E8B7
5353:104E7000C5F5BF6C8878F6B9F8B9207C3D87148AEF
5354:104E8000B7BC32EDE162BA172FE21C1B14DEE50855
5355:104E9000DA19B08E0DCF5510FEAEEC99F6CB3AD4A0
5356:104EA00007DD32C179881E2EECAB93C23ED4ECAB49
5357:104EB0003EB41363EC8DB784DE9080AEDE2A4D40A5
5358:104EC000A7BB246EFF865EE6F66F85D95B109B4F0D
5359:104ED000F5BE80FFAA08F7C36A76ED785FD8900D1B
5360:104EE00070A8B8D9184902395DB1B5CC8CFCBA624A
5361:104EF0006B9E8DFC4AAB0F1A3478273AF78FC53A70
5362:104F0000B7F5F6535CE2A9F87BE61E33B5EF15F86A
5363:104F10003309CF16CA0D85722B8ADFB4998A319175
5364:104F20005FBC1EF47E5CDFAA76BE5E2D0E521F5162
5365:104F300067E13CA78EF66FC5B2BCC1358BFC866BB2
5366:104F4000CF6C45B9193C7FF6D815E40730AB89EE34
5367:104F50000B3C5B6624383C858A08C26BAE4C79BB3F
5368:104F60001573653AEF8C7A2BD9E1192666C4EFAE3A
5369:104F7000662CE672ACBCC6310BEB6C593AC9E1F257
5370:104F80005E35FD7ACFA09D9F31776316C2E9F3E2CB
5371:104F9000439ABFE02AB32FD333F98BC787D61D7F3F
5372:104FA00083F2CCAEE9D3C787B478CF70F1212D3E20
5373:104FB0001BACF944174F0ECAFD73D0AF52F1DC2978
5374:104FC0008A0F073B25C5E91A8C1B050F9D31137C01
5375:104FD00045BC08FA9BF1BD0A38F61119F8BD011E4F
5376:104FE0003F7A1AF371CDF83D3D85F26E7F82F9B8B4
5377:104FF00045F83D3D9E8F7B18F371CD78FF83E7E345
5378:10500000F688FCDE60D7198A374DF30CC9A7A27861
5379:10501000C42D927FA6479F4F45F5F87885D1C6ED00
5380:10502000D060AF89BE771E3C6E213E5BD9B56A0C5D
5381:10503000EA63DA77C81B315E10E35FFAC8E7B5E2CE
5382:10504000FD9E8FFC5E2BC6092ABA3F30ABC4772287
5383:10505000B998C2D42847CD68EF231C28CFAFABD274
5384:105060008A70FD5CBF7EE7FFF7EB7F11BFFEE13288
5385:10507000EED7D7F847B9DF40F7CACB7B7DD6EB63D5
5386:10508000F8C3363FF70F6F73E713FDDDE5CF4F5FD2
5387:105090001DEBC7AFE1F65BC65CB735F6B9713CFFF7
5388:1050A0001E448694F87EC1768F61383D707B62FD28
5389:1050B0002E713C605B0DE7239ABF7F687CC0FBA22A
5390:1050C0003BC6CFFFD1CB16FA7B0ADDCF26913CFF42
5391:1050D000F4B9A47DA87797D7AC1E9302F5F2934953
5392:1050E000CCC5E5912EAEB0B2C6E0B3A6268A23F8B1
5393:1050F00072E97BA1F1F1821A03F1F78178418D7C8D
5394:105100008AEA423FBFE6CC7B29F8E9EBA7A4703BD3
5395:10511000DA174FAD93BCDD6C68FC0006CE655361B9
5396:105120001735DC4EF0D65AC82EF8BCB842DDA113B4
5397:105130005BD04F3091ED6CC7EF4F4E741B14104590
5398:1051400009E20A3CBFB35CE811F1FE01C40F94FB15
5399:10515000F17EC1E7C5F93D2FE4FE5CD4F9B306C783
5400:10516000D1DE8B3F77479974513FA32CE4565B4DBA
5401:10517000F9363CB7D0020343FEDF56536571C78C46
5402:10518000F79A87E7CDECC2388523364EC1E311F19B
5403:10519000F1098D3F55747F3607CFFDAE2EEE3F0AE5
5404:1051A0003AB93FB3E27025DD33195C27DFDF5DCE0E
5405:1051B000817B86E98CEF8B59B89F8BFC0AE50B3E0F
5406:1051C000E9C1BF37C0FCE9F4F70B82C7DDAD76E477
5407:1051D000230BE4C9924AFEED017F37FAA396BEDAAB
5408:1051E000300FF3812B964F3C81E7B2BCCE44794718
5409:1051F0004B5FADA5EF8A6BF2AA62F9DECDF8F768D6
5410:1052000096174B5EAB8AED3555D83EFFB1087AF65E
5411:10521000D8425C1DD04BF438F4CE27FFF6C7483790
5412:10522000158B85DFBB8ECBD5E55D8B4DFCE3567AC8
5413:10523000397724EF53B29BCF7655903F3B13E3ADC4
5414:105240009E413953F11CC89F9441F9F3F7CA1D4799
5415:1052500019CFF39F00F207D793B198C705E3CFFFAB
5416:10526000350F3FFFE1E4C970FC13E507FF7B3BA16D
5417:105270005CC939287755B4A72F1B94BF4A27D4732C
5418:1052800086C7BF7902AFD387D1BF660BFC1C365FE0
5419:10529000A3F31FE3F7AE2CFB27F17B0BFB46F37F59
5420:1052A0006BF6D07D02CE5AB947F08DBF3B5F1985B2
5421:1052B00062C27CE58CC4F9CAD77448F41D1691AF5C
5422:1052C0007CD4CC2A0F3A304F4FDC4B08FB49BF3916
5423:1052D0007AEFAFB63EE2C07B09928262675DC70992
5424:1052E00092CFEB409F213DA8EB8FDC2FD5C1F34B34
5425:1052F000D775EAEF3F68E5112197AB613FE44716A8
5426:10530000797C730E71BA0EFACC61D5857EA16FCB14
5427:10531000B17EA1A01ACDD2F203C35C2E25CCE36BE3
5428:1053200064FD94EFD7D82079511E7C693F918FE7B7
5429:10533000F75DAA9FA8AD4CF885849FF99152CE0FD6
5430:105340006A039284FAA8C5E05F4BF9BD8725255111
5431:105350009EE8BD02DFE70B3FED7E33C783FDD3251B
5432:10536000CAABC57B3178BEFB0FF3FCF9FDE53C7F92
5433:105370005EF3CB6A79F1E306FDB2741F46CBA7D783
5434:10538000F2E3B5FBA18B77DB22A85FEC3075389197
5435:105390000EB5BCA2F9A88B601C467C673C7E9D5B69
5436:1053A000CB2AE79751BF61F59BFD6509F49B33421A
5437:1053B0007E3E56A6CF238AD1CB9F289BACD3CBA9C8
5438:1053C0001EAF97FF4FF965E70CEF17365CA2FFEDB4
5439:1053D0005B97D8AFA12C817DDD6A4DFCBDD0D4F1A7
5440:1053E00082FFC6FDBD1136E47E0F976FED92FACBBA
5441:1053F0001914E732519C4BE32FED297CFCB7055F74
5442:10540000D1CA7382DF0CF75D49E378DE6FA3E47BDA
5443:105410000BCFB1F480DE4F56D6A1F7934DE8CCD038
5444:10542000D5274646EAFA57F4E6EBDA27474B74ED00
5445:10543000979D2CD7D5A7F54DD7F59FF17E95AEFE5C
5446:10544000957EBD9FEC8A734BE2EE1D71FCAE048C21
5447:10545000887D6F96E5EBBA7EB90DFA7DE535E9F703
5448:1054600035A659BF2F6D5C5748BFBF8276FDFE320F
5449:10547000D07FEFF9F2FEFB4D1E55F8EF0BE8BB7F36
5450:10548000BB6ADCF49D6BEDFE9FD6EFBF0137C3FC1A
5451:10549000BB80700000000000000000000000000061
5452:1054A0001F8B080000000000000B53E16760F851FB
5453:1054B0000FC15BF918182EF021F8F4C01CCC0C0CAD
5454:1054C0009C40ACC8C8C02001C4FC40CC06C49E0CA3
5455:1054D0000C0CFF81F81B10BF05E22740EC0CC40741
5456:1054E00058B09BE3C6CAC0E001C4DC40B3789889D9
5457:1054F000B7DF8917C17ECCC3C0700E889FF1D0374B
5458:105500000C061B5E27403FBB7E43ED3A2932F0FE7E
5459:1055100006612131609A1447F0A78AA3CA0B8B2138
5460:10552000D8C9D294D9950FD40F00F19321F08003FC
5461:1055300000000000000000001F8B080000000000B9
5462:10554000000BED7D0B7C94C5B5F87CBBDFBE92DD16
5463:10555000CD26E44900370960501E4B80C84BDDF072
5464:105560003252C40411828A2CAF10027914A9A5FF0B
5465:10557000DABB0B2804AADE5851A37F6A17041B2D3F
5466:10558000DA80D11B6DE02EA208D56A684551AB0DBB
5467:10559000888808498C8F6AB57ACF3933DF66E7CBC4
5468:1055A0002E89B6FE6FFFBF7BC3AF1DE79B993367A4
5469:1055B000CE3973E6CC9999B3268385192E60EC1BFE
5470:1055C000FCBB9C319B893136A62B6D573A86AB3993
5471:1055D0005DE5B7F9BDCC6B66ACCE6FA5748B3F9D16
5472:1055E0007907C3779FA1306867EC5EBF8BF2BFF08D
5473:1055F00017525AEB2FA27A77FA4B287FBBDF47E985
5474:10560000667F197DAFF157537E837F0DA59BD445EF
5475:10561000692C05FA66458559C98C553D9393B71990
5476:10562000725B668D4F504743FE15233366017C9FA6
5477:105630004AFD31D5BD69E0E8AE7A1A9E9BD449FD9A
5478:10564000104EED128E17B3325B8C7A5938CE3B97E1
5479:105650000878F6D69A9CE4A8F50623BCDB4B00DE5E
5480:1056600050287085AC39D1E15D8CF03697A8BC5ECE
5481:1056700072B0263B3A3C0FD6ABB941C04B0F5863D2
5482:10568000D41B83F536DC20F0EBE7ABC98ADEEF787C
5483:10569000ACC75CEADF5AAD8CFEBEC9C6FFB7BB4ED5
5484:1056A0005D2CF246CC263136AEAB9D3E652CC070EB
5485:1056B0009C2AF315121FDC995F7F93CFD84D0813F6
5486:1056C000DA0726B19011FA0F24B1E0FA2CA9FE4CAA
5487:1056D000AADFDAF7EB6F52A5FA014394FA26D6A0B7
5488:1056E00060F9CF518E80EFF7F97329DD28E4E7BE2A
5489:1056F000A106C6B05DBA393808DADDE3F790BCDC44
5490:10570000ED1F4BE5770939FC7721674121670FA22F
5491:105710009C41BA15E5CC8CFDF95A4B014EFBDE7865
5492:10572000B6D94DF2B598F05419C1DFB077C8F6CDAF
5493:1057300000FFBE1B569DDE06F46F6B1EE63142BDB8
5494:105740007B866AF2C5BC2CB9ABDE3DB34F38170D72
5495:10575000257A97219CBB3D827F2A0C2CA2DEDD336B
5496:10576000C2F52AB0DE5D9E30BC5064BF774D09D7CC
5497:105770005B457C56584983BD3B5F763085E6230800
5498:105780000AD1D784F48579F9EC80EB9456689F921E
5499:105790009C97C6A0DDFD381FCD38EFDC4417AD3D2A
5500:1057A000D2D907DF332CAC1AE10365F71B015FD3B5
5501:1057B0006C7722D2E5F66B8B98328CB1BEA23C3569
5502:1057C00050A464015CFB9C2205BF9B6643397C7737
5503:1057D00089F2E435BCFC762C7774952762397C4FCE
5504:1057E000AA8672C8DBE7F2F23BFCC089C15DF536E0
5505:1057F000019F7DC4EF74FE1DD88AF4318DE6A98621
5506:10580000F713282440BF83988EE9C27FD3A07B334F
5507:1058100016DABBF0B50DAEA7BC86DFA6C17194D772
5508:10582000F0B15DD82F6321A47D97F465DE5C311F54
5509:1058300058773A277AB3A5F24CD593A0029D325FF0
5510:1058400032B200B02013C413E1E9DB153103E1D912
5511:10585000E3FC4BEEDDFC330D95E9A0A547053D3497
5512:105860003A6CEC2FD3C13240A6C3C601321D2C17AF
5513:105870009C9F0E3B989BE81C8B1E5ABF9B87C8FDC4
5514:10588000C65D24F7BBF922B9DFB88BFF39FDD664BA
5515:10589000C9FD5AB3E57E6BB2E57EAD39FF58BF4C0A
5516:1058A000F5C064407DA5FD5D28E9B7AB99EF2CB646
5517:1058B000473D87F349D373A6641FF3D9BBF809EBBF
5518:1058C0001463F99170064B7A15E07C8AF5008EF727
5519:1058D000FC705C3A3883F470BE16F8B0483DDD0DBC
5520:1058E0000E1BA81F8749E1ED428688FE99EA6345B1
5521:1058F0008EC8761E5DFF39FAFE9D8A1887E1BCFDD1
5522:10590000BB7574CDD6E39326F06186F3D183B97469
5523:1059100070B2F470DC029F90725E386EFD382E1407
5524:10592000FD071469FD027A0CEB6AD70EF8D13A959F
5525:105930006709EE04FD10DAF7E5295C07CE355EEB6A
5526:10594000B640FDFD232DA1CBA1FC5CB0206881F207
5527:10595000C94F1E75A21D53F1A451C572C33E1BADA4
5528:105960002F6D3B142AAFB2B4DC3901CA3B9E34B26E
5529:10597000EDD45DA601C7774AE81416E2F9521BCFB1
5530:10598000566CDB7F23B62F6BB2301BC0AB787AD955
5531:10599000CC09905F76C8C4B04AC5CEB5E6BE905F6C
5532:1059A0001E541A300FF8D23A15C8B3057742FD7568
5533:1059B000FBBE6C43FCCF359A06213E67609D70C3E9
5534:1059C0003AF192A3257536D0A73CB87B1AB62FDFE3
5535:1059D000A57840C301FE3B0F6620FE8F281E0BB04A
5536:1059E00070457D3C7347CC97538D461AEFAA6D4A9C
5537:1059F0009001BC65AC761AD2B302898378782C41C9
5538:105A00009BD235DFCEF8EBA83F2D5FF108F407ED10
5539:105A10002B1F573C38E44A03F3E13C6E7BDA56F225
5540:105A2000901DC7BBD63CD881E3DC68C67ACB820B1D
5541:105A30009FB2B911CF6DE66988EFD66DE6D2A14865
5542:105A400047B6A06828E2F77F65FCEA8C5E1CEFAAE7
5543:105A50009196ED46C083D943036739BAEBD933B089
5544:105A60005EB923D6CF72067A9FD6EFA0B97858D701
5545:105A7000F72F0D89A43F56D41B99DBDAD58F261F4B
5546:105A80008123423EF63A88DE1A3F57B9F814D0F81F
5547:105A9000B92A51F057EDC89F35AC3B3E77225FC81D
5548:105AA0009E7651FA0B583731DD02EB3CD2EF5EB0F7
5549:105AB0009FDC64977BE8FB03602761BA15EC244CFC
5550:105AC0001F043BC92DEC24ACB71DEC244C77809D02
5551:105AD00084DF1F067B1CD37AB0C7F1FBA3608F6302
5552:105AE000BACB1FA0EF8FFB6B286DF0D752BA07F926
5553:105AF0000669A33F48F59EF2D753DAE46FA0EFCFD3
5554:105B0000F89B28BD5DD0D1399115E03AEAF43217FF
5555:105B1000923D6986B7C004F9A4229E4FBD21506012
5556:105B2000867CAA0FF24097BE2B430516C8F7ADE658
5557:105B3000E5036E6193AC901F10E0E5D9B77B27D9E0
5558:105B4000209F5DCBCB076F0D4C8A83FCE0202FBFDD
5559:105B5000685768523CE42F6AE0E5C39BD9643BE494
5560:105B60008787783EEF25EF6407E4F35A783EFFCF4E
5561:105B700081C94EC8E7B7F2F6E3CF068DEE28EBEF0A
5562:105B80001E937B31AA9C03CADB5E3503F266F74D98
5563:105B9000A8128F2AA728DF68F252F9FB4ABB578563
5564:105BA00075BED1ECA5F22F94CF29FF94C947E5F13A
5565:105BB00006A580F2661F95F737C451BEC914A0F23E
5566:105BC00011863E3C6F0E507981A15F01C27FC614E1
5567:105BD000A4F26B0C8378DE1CA4F25FA8C30BA64072
5568:105BE000FDC70DBEBDA8EFD62BBE32B40F99DA901B
5569:105BF0008EFA4AB32B77E2E0D0CECC30D33CD8F348
5570:105C000087FC87681EE05F32E64B1F46BB14E01C32
5571:105C10002438268063EC194EDECB632538792F9724
5572:105C200069705E2138B6DEC1D9F3F278199F97CB3F
5573:105C30003538C7088EA377E3CA7B65A28CCF2B2BA0
5574:105C40003538C7094E62EFF0693C2AD3A7F168984E
5575:105C50003E67707D589FD23B7C46BF26D367F46B6E
5576:105C600061FA7C4CF864F40E4EE36B327D1A5F0BE4
5577:105C7000D3E72B82D3BF77E31AFDBA4C9FD1AF870E
5578:105C8000E96332209CACDEC179EA6D993E4FBD1DBF
5579:105C9000A68FD380F419D4BB71E5BF23D327FF9D12
5580:105CA000307DD2089F21BD83F3D43B327D9E7A277D
5581:105CB0004C1F37E133AC77E3CAFF8B4C9FFCBF84AA
5582:105CC000E93384E08CEC1D3E4DEFC9F4697A2F4C2A
5583:105CD0009F3C8233A677F88C3D25D367ECA9307DB5
5584:105CE00026109C71BD83D3744AA64FD3A9307DA6DC
5585:105CF000109D2FEDDDB8C6BE2FD367ECFB61FA5CBB
5586:105D000045700A7CF5840F03388ED8709E3927D3EE
5587:105D1000E7997361FACC213853014E4ECF70C6B764
5588:105D2000C9F419DF16A6CF02827365EFE03CD326D3
5589:105D3000D3E799B6307DCA88CE57F56E5CE3DB6554
5590:105D4000FA8C6FE7F4A9B278263BD0BE4B649EED87
5591:105D5000D0E492930D079C9037D99907C1BEA484D3
5592:105D600076207C582BC92E543D9A9DE2616887CEDF
5593:105D700070BA3DE8F7316AF6086BA1FD827D57A243
5594:105D8000E40FFAD230E916C4D701565BA45D923015
5595:105D9000364EB28712BD4952BE4F615FA97E4A514D
5596:105DA000B6549E567291549EE1CB93F29965E3A549
5597:105DB000FAFDAB2749F90BD64C97EA67056649F916
5598:105DC0009C9AEBA4FA836A1749E517D6954BE543ED
5599:105DD00082ABA4FCC5F5FF47AA3FAC619D543EA22F
5600:105DE00069B3543E32F40B293FEAD00352FD312D02
5601:105DF000DBA5F24B8E3D2A958F6BDD23E5279C7E3C
5602:105E0000466707CAFBFFF5058CDB831966B20743BB
5603:105E10000E33E5CDFB6C64FFEFC73CF0D3DC7706B7
5604:105E2000E5CDCF2E7627E37E1A01C07A5FD0B7EC9E
5605:105E300042F4F7DC3CDE77A10BBEDF6CF68D7045DB
5606:105E4000F1477854DF3E03F98B5A14968EA9DB8014
5607:105E5000699C51ECD72D5CBE3666E53F148890D323
5608:105E60009AFE30FF207FD86026FB5593EF8DFD4BC7
5609:105E7000D31746F4B3A1BFB964FB50FE7DB11DFB3F
5610:105E80002B7A11E75995B96330E2A5EFC7923D56D9
5611:105E9000EAC73AA08CFA790DFB89F07B590694E9A0
5612:105EA000FAB1966C17DF453FC7705CB1FAD9983DDF
5613:105EB0005E1ECF8072EAE75D5D3F1B0794EBFA89B7
5614:105EC000E3E381EFA29FF7CE3B9E9C89F2782E58A8
5615:105ED00049FD74E8E866B960A5AE1F3BF583DF179E
5616:105EE000933F17760169C0674B4729C9C17FDA58CC
5617:105EF00000E4C29C59FE6BCCB3B76C6C10F6E38621
5618:105F00007EA11ECBE5FEA3A70D49349ECFE280FF04
5619:105F100011766AD77E3640FBE2A5024516048C60F6
5620:105F20007F5B296473C9AEE20137B9216D3A30F065
5621:105F30006EEC678BC33308F26D4D93CD8BA3C8D342
5622:105F4000D25AD3A9D648BF88B6BF99C472ABA1FFB5
5623:105F50005D369794D7D2958A8B097F04E54FC0BEF2
5624:105F600085C17EE0CFB02F6040AA774D7C9FF60EB2
5625:105F7000EC6F30DF0AFB1B2C676C2DB53B21FCB4AA
5626:105F8000276E578248EFCF7EF24313E9F1007B354D
5627:105F90003D15FD6EFC6FC19A78F4F187F15B18E84E
5628:105FA00023E5415D661AD2695F48FBDF8EA72DC1EC
5629:105FB000ED48D79A4CA0A9A897CDD8EBB0C9CD4849
5630:105FC000A26CA6612C63B3AB8BA7A6D12C52FAAFFF
5631:105FD000023C67358E34410BD6666ABDD163EF82D1
5632:105FE000CBBCA613481F2BFC4338D714423EA2FF5C
5633:105FF0006B8BE4FC5CA676E581DF838DD9826FA292
5634:106000005FB7D7847C2D4AE5F8CCC5340F8BB9BF78
5635:10601000A3C4C5DB6AF8542D36B110ED4F03290C2B
5636:10602000FDD18164AA779DB6CFD4E15762B27A8B55
5637:1060300080AE250B8D44573DBE6FEE8BF71A86431D
5638:106040005A73B7095D9B3DE13FCF2797B332DE9F7F
5639:1060500046574D5E4E09FE9E40FE43FA3EF21FF04B
5640:106060003E29F8DF25C79CFF5516DF4CE47FC7FDAE
5641:106070004646FC127C9F23F8BEB456E6FB1CF49304
5642:1060800043FD39ABB382EBB17E5D1F89BF307099A0
5643:106090000EB5774D05B5DA0DFFB7851C5C57B3FB20
5644:1060A0007964EFF565BAF1093EDC28F8305F478F77
5645:1060B00039826FF305DF96B1C06D19E43F0A9AD0BB
5646:1060C0002F36AF4C61A82FAA7EAAF1AD55E29B4FA7
5647:1060D000E39B0EDF1B05DF6EFC09E79B1EEF56C13D
5648:1060E000B7D6BA8F4D2CBB3BDE7A3C17ACD18D2B8B
5649:1060F000A0E75BAD38777099D1DE29F616F439192F
5650:1061000051FF9AC22BFB9C8CD00BD716154BF9B9BB
5651:1061100025F3A4FAF37C0BA5F2EBCB964BE5F3AB9E
5652:106120007F28E517ACF989547F6160AD54BEB8662D
5653:106130009354BEB4F62E29BFACEE7EA9FEF2E03633
5654:10614000A97C45FD23527945C36E295FD5F4B4542B
5655:10615000DFB06FC8D5285F2F1D3532F4977DEA79FF
5656:106160009FFC759F7A4C1EAC538932370EE5D94D92
5657:10617000F27CCA9F4BE969BF87E4FD8C7F2CA56D3B
5658:106180004D07ECE87FAC8A03BD9F0876B8F1CDB52A
5659:1061900035FD70BD81F6E3196B36B6AE0D40FE00DD
5660:1061A0001E46C1BC99516766A1510CA4BB6F589E95
5661:1061B0003B8C11E5AD3D94D7A92CD4A77BF98CD6A7
5662:1061C000E8DFDB958EC119E8277CC3C27646F8EB81
5663:1061D000BA9F57B04CB42B62959F35B0B2C8F3ACA0
5664:1061E00093467E4EE2344E3A698474A599CFFF956A
5665:1061F0007B32263127E64383ABA3F85DC2FD350031
5666:106200003269C8E71C69DE2FABBBB86B9E33EC2745
5667:106210009BE476797094F47D45FD04A95DAEE27B44
5668:10622000D708F5CEEE37D27ACD4207065C330CF1B3
5669:10623000F39EC4EFAC2985ECAE16BFB7CFC9818CF5
5670:10624000FDD15F48E9ABFE224A5FF397507ACCEF6D
5671:10625000A3F44D7F19A57FF65753FA8E7F0DA5AD98
5672:10626000FE00A527FC35949EF4D7527ACA5F47E911
5673:10627000697F90D233FE7A4ACFFA1B286DF33751EB
5674:10628000AAE9CF9EE4EFB4585FCFA0FC459133F369
5675:10629000AD6C5DCDC42E398B532DEB50CE34FACE80
5676:1062A000A8B308794895E42111D76192B31ECAEBCF
5677:1062B0004C420E63B58F5E8EF2D6F77B9037C6D612
5678:1062C000911CCC1472F75DE58DA1373E05E529538D
5679:1062D000274FB21C6A72A4E9815CA568B83AA64B44
5680:1062E000AE661AB99DA4C9D5CFD14E8C626FDDA020
5681:1062F0002A62FDE3F611F36518D07E5B25FCFECC27
5682:106300009D4EF94ED1F77A00D782F5D4602EAE2398
5683:106310009DB97F1B8CFEF1CE6316867EF858E3D3C1
5684:10632000CB4B6CBA7B69FF501A84456D54F7725B96
5685:106330001CA7ABCDC00A591E9ECFE61FF3013FE359
5686:10634000FEF3E23CDCD7C27795915D15F41447F17A
5687:10635000B73394F1B49EE9ABD53FF5C097F9786EA9
5688:106360003E53CCF3B803467EAE1D7AC8734DC4F9D4
5689:106370000CECB7D3D1EFDC31C8EC22FB21D457A60B
5690:1063800063B0AF44C703833E1B8CE71B9B400E7179
5691:106390007E750E1C9CC0CE231F3DE9F99EE8B928EE
5692:1063A000D8B797F434333C37027A6EC7FB2FBDA5BC
5693:1063B000674F7AB227FD786233A7B353D8A7B1E805
5694:1063C000DC3E09E65D1439BE475565396603F97947
5695:1063D00087467FDC9746D0FF52BB9BEA3FB7EFADC5
5696:1063E00001ADD04F67E385098C9FE7905DD7F1A49D
5697:1063F000B0DBDD99321F5BFB125C0DCE734FBE3EEE
5698:1064000000F7C9B76106E6D993F145BF5253BAE028
5699:10641000F5F61C3ED6B8767FCBF9D99EAACDCF969D
5700:1064200001284F9F093D10737C3DC9298E0FE05C08
5701:10643000A5F0F16D3016FD0EF54C787CA3537A353E
5702:10644000BEAA04335346007E0EB3992530B643F5F9
5703:106450001D54691FE7690DA09F625FBC673DB0A432
5704:10646000CA79E6E5901BDBC9FE8C15F536976C3FC3
5705:1064700025BA64FB29C315693F751E7AC8E903FC78
5706:1064800056A51B5C2747E13AE715EB1C5F5735FC27
5707:106490002A1AB25C76098E9CEFAC550A1B489EDC2A
5708:1064A00009B3A39C9769E9AA74B3EB24AC5767EAD4
5709:1064B0007312B0DF337EAB8BAFAF2E17EF37DD1526
5710:1064C000B9BEAE5C1347F535FC62C1FD67E3C75842
5711:1064D000237BD78AEB2294E5C4AE1F939FEA2766FD
5712:1064E0003A976E367D86F6BB2D57B3DF55CA6B7073
5713:1064F000AB1A8C01CB08FCBE4BEA0FDAB9B5336698
5714:106500006C175B6E54764AE327F0DF8A07EFB46FAF
5715:10651000B5129F7D003101E0B5ABF61A94AB132A9A
5716:106520009FCF55424E2BACAD669F9BC8DD82F2BC1F
5717:10653000682CD326CCDCB7404F7FF0A289EE69B13E
5718:10654000AF007A7ED7558125ACC8894ECF458D2BBB
5719:1065500066E0BAFD8141DB0FD7E6E3B8CF314321D6
5720:10656000EAA573EC8FCE5111F3758889FB63580D42
5721:10657000DFE704E01F8E6F69ADBCEF595627E74B8C
5722:10658000D9AC54D4B7A55B4C2C08B82FC77D933633
5723:106590006ED0BF1926EED758C6AA37E03EFD5E136F
5724:1065A000F7F72C72313513F0AAF88F5FE6A3DFC737
5725:1065B00063E27687769EBC3C89E35D3E3B68F642AB
5726:1065C000FD771B47CD018D0BED831BC8FE29669E11
5727:1065D0009DAC3BDD17D7C8F8F584BF1E5FCD0EEA32
5728:1065E00076AE2DF048AE57BCC1287AEE329322F633
5729:1065F0007F7C7ECC36C9FE9C7926D9EFA3C9814920
5730:10660000C8C109D577B5690CE73BF251513BCCBE07
5731:10661000887AE6AE7AB3CF57CF82F58C546F9E2935
5732:1066200005EB754CA3FD3103791ADA55CFD605EF8A
5733:10663000460E4FAE57F11F8F3D15007929FFED3DF6
5734:106640004E06EBE6076A6DAA07BEAFDC799BD30B5B
5735:10665000E96935E0447E7E10341646A3C796303D86
5736:10666000BC7605FD69423E594D80FC149FED34B95E
5737:10667000C8CF5F6F0959404E2B1B97CF60C3297F4E
5738:106680009CE7377E64C47C93CCAFF25FDF93EAE68D
5739:10669000F76CB83F8985C8CEADDCF1DE345C2FAA3B
5740:1066A0005807C999BE1DF6FF7912CDEB85E684EE39
5741:1066B000E58027F913AAC42CAB6AFCF9474627E604
5742:1066C00065F92813F62AD209F7F9B7991CC9A7E288
5743:1066D000217B09BB04E7B9460F16E476EBFA47EED7
5744:1066E0001B7E1CF039BBE345A73234523F7039EBB7
5745:1066F0006C58FC2BAB21B61E6903398CB48F00306B
5746:10670000B57337097BBB99A72B4D2127DE6759B994
5747:10671000CDE40109642B1F3332BC07C0DEB004D1C5
5748:106720002FBAE2B1E75F1B0F745FB1DB943C830FBC
5749:10673000C7AEA476F1A50AFEB726AF8B0FE54F3C96
5750:106740006F760FE3DF6F49EAE2C78ADDFBCD6C5855
5751:1067500077FA4D6ED86F6EB547E14BC3F169B8CE8D
5752:10676000AE7FE4AF66F4277EB04F616959DDDB97F9
5753:106770006D7B9ED63BA413F151F029CCB76EFC0A79
5754:10678000CD7C6634D573A11E8CC5AF6542EF823CCB
5755:106790003FFE0CDEFF79D3E2C1F1973D7E9313C734
5756:1067A000F1BE5ACDE5FA97B7A5E2FC2E3305525D4E
5757:1067B00094F2EF650FFE88E46DD9911FA592BDC0DC
5758:1067C000BC1906D2C5810C1CDFD2ADD7D2F84A99CC
5759:1067D0008FE4AEEC97C622BC8FF8A9CA0A77479916
5760:1067E00017716685F0797F3B183230BEF7717F896B
5761:1067F000FAEC8F46BA17C5D80FE9DED88FC45861B6
5762:10680000E5A3FCA756CEA7E3424FE24496E475C742
5763:10681000C616E4CF99FEDE343CE7003A0404BD948A
5764:106820006F00AEF1C8D434CE1FE656F3453BD0EF2F
5765:1068300093F13BD66F31796DC3A576421FF2FE57B7
5766:106840008BFE01EF385CAFDE4F8D6EEF8D11E38371
5767:10685000BF1616215F11F39BCFF71D9BF8FCD6E600
5768:106860007BB0B810CB3F7995CF1F6C87EB03E01559
5769:106870004AA3F2FDB315D207B0AF8E36AF7798C4F6
5770:10688000BC96CBC152A4F51EF0569584483901F848
5771:1068900049447FDA07976E817611F65715F647F56A
5772:1068A000CC5DDF23D68765420F98CC30FF2FEE9A60
5773:1068B000FF6C2B9FF73DD9932B4DC1871FC0F9FA71
5774:1068C00086C51370E37C3515E1B83FDC75E0B5EBA8
5775:1068D00040AE3F6CD0E6A9AC3FF5F3B46CCF1816D0
5776:1068E0006D9E7E6887FD55B4790ADFA3CE537B2B5E
5777:1068F000C9F1F7AD3F35BA0D35CB7A13F5E033EE7C
5778:10690000D8F4D3EBC1DF9BDC4447BD1E84BF57598D
5779:106910007E77B9D3E44D93B3F2DF545C80FA262C32
5780:106920008F9ABC85E5519337FD3865BAE9CBFF2ACC
5781:10693000F4CDF5D6C26BD02EB67630DAAF14CC36A5
5782:1069400006719F6CFD84D17C9F74433CE5E71A5B24
5783:106950009F409BEFAD8AB9C3701DBF9E054CFCDC08
5784:10696000BCD64476EA57DF7C3311C6739DA0EBF5A5
5785:1069700040E6AB800F25AA128A033CE7A92C909031
5786:1069800084FE62859D88C0E3FA32398F7F97A576B1
5787:10699000C1E9A9FEB7B5ABBF6B7AC4CFCFAEFE8459
5788:1069A00029ED2FC0708E90A3E2667E4E51355A09B4
5789:1069B00066D3FC6B558B22F6098F99B99D7164CA19
5790:1069C0003563907E05738725907CD70EA17D6095F9
5791:1069D000D05B9D017702EAF3CEE61CDAF7751E5A0A
5792:1069E000ECF045D15F07849C3D2FCE59DAED4AADDE
5793:1069F00011E4BD9D7590DD12B0DBA2FADDEACC0694
5794:106A000061EF08BEC19F11FA2F1172380F9A26E468
5795:106A100045F06DF6551FA8CEEE7CC0BF1311FB8666
5796:106A20007F94BE28D748DF03B6D6694551FC338F23
5797:106A30000A7D7DD9B35F98719D9BD25CA0221DA772
5798:106A4000D88D92BF63BB365F87B2A188D765CF2E42
5799:106A5000BF630CC871D521A3C706E3AB6AFEC8ECBF
5800:106A60008BB27FD3D313E1A3FDD86AE6F6F151537D
5801:106A7000D152A4EBD16BF979EE9FCC9E8A6878CE87
5802:106A8000B6723CE7B1A24F472BFF7AF42D98EB0882
5803:106A90004D027A74DAF9FDE4EEF2C7E77DA74B09FF
5804:106AA000AE55500E8D3C9FCCEFFF4E63BE3B262A69
5805:106AB00034DF2F8FD45F054DC58FE17D96CA66C543
5806:106AC0006580F24AB5D58C725CD5B45B45BBFC07DA
5807:106AD0006EFECE82A9D5C36647F8B75ACDDC9F7447
5808:106AE000E06FD7CD47FA7E3CDBC2102FEFD08F9CF2
5809:106AF000B8DE7FDC3C8AE641AC71FDC1EFB9660AC5
5810:106B0000FAE3CD5C9FE9E5615A72BC94BF7632EB43
5811:106B100087E7BC97595A6FF244E1DF3A0B9FA7BD54
5812:106B2000D66FD6FF61FA6D22E8372ED7A648FD361C
5813:106B3000DDC2E53E42BFA545D36FABD6BAD3502EDA
5814:106B400056EDCD4943BEAE3ABC34259A7E7B41EC2E
5815:106B50006B0F8B7BD2EDFD40BF8D88D06FFD40BFAA
5816:106B600045F1838FB66876670FFACDFADF33FF5EA3
5817:106B700040FD1665BC5708B9D3F45B61F35AD26F78
5818:106B800085FD8CD27DA4CB2CC28E8BA9DF16DE7343
5819:106B90002DE54D9EF828F2837445FD7658E839ECD2
5820:106BA00007F5DCCF2CDF4ECFCDB3727C7BD473FFE7
5821:106BB0004D74D6F4DCAAFE0AD92FDDE590EBB95569
5822:106BC000595CCFADDACBF5DCAA415CCFE9F5DBA4AB
5823:106BD0006EFA8DB7AFCC85F6B44FCCBAEF06BCCF0A
5824:106BE0005762F258A1FE0CB7F6BEA07A4CA4BEFBC9
5825:106BF000992586BEF380BEB3F7ACEF5E417DA792C8
5826:106C00001E1B88F3482F1FD307C64BF7D58E7E7106
5827:106C1000EA37BFC5F9F20723DD077ADDC0F743FB8A
5828:106C2000BE38350AE7DDCB880FCC979D42FEDAFCF3
5829:106C300063499F4E1ECAE77BC5A1385A272A1B15F8
5830:106C40003EDE5B94A01BD781BF7D4EFBE4F97BF950
5831:106C50003E79AE85D383FDD8C8DF4500091646C806
5832:106C600043C9E7E5E4E72B519915EDD70587A67FE2
5833:106C70008076EB82CF6BC8DE5D80DFF17EC5EED61D
5834:106C80000D99D0EFFCE50AED3798B80FA1DD97B864
5835:106C9000BE793FDD5FD1DF83D0F4F9FC6AF9FB02F6
5836:106CA0009D5D7F408C13EC59A20B7BC518D53F77B7
5837:106CB000404F0F0F1F7FC56A6E1F87E901F4712BCC
5838:106CC000DDE9011C9DB130B56BFCF39F8471257724
5839:106CD0008D4BA3877E7CDAFE6481981BB1C6ABD155
5840:106CE000AFDB78357AEAC6FDBC45D84517B36138C5
5841:106CF000CF5E37F8EE188372F17B183FE03367DE22
5842:106D0000A0B4483DFCA2D0E757F98E4F497523BD8A
5843:106D1000F8FBBBEBCA763F9F0AE3B8DA9B9587572F
5844:106D200011AEFD9BD9877E8403B60ED26B9A5C5D53
5845:106D300068E572FE7701E7685FD7145A3F9A141727
5846:106D4000CD97904E6F897B6155404F9C8F554D621A
5847:106D5000BD0179C3F9364D5B7F90FEF09F573573C7
5848:106D6000FA57552B44FF99ACE320D2B73259F1843E
5849:106D700000D4B4A6DDB7E13DAA176CF01DE76D990C
5850:106D8000E2D9CEC961CF488D2A976A34B964D54318
5851:106D9000C8AFA0AD830BB05E12BE17793D05ED13F1
5852:106DA000BDBD7199A5E528E271D98F4D6C1BEB6EC5
5853:106DB0007F68FCCE857FDF44BBCFD383FC0E12F609
5854:106DC000E50B486F3BD2B5C38C725F15E2EB86567C
5855:106DD0005EA5BAA7107D347A37C1BA309AD31BDFCB
5856:106DE0007DE9E979B5964779C6FACD8A09DB5F096D
5857:106DF0007CE80345930D5F1CD4E417DF89E9E98241
5858:106E0000FBFF8C88F98E7A29F2DCB1B2E908D165F2
5859:106E1000FA6A30AB22E88EFAEA7CF4E9361F9AF679
5860:106E200047BD07F56DE7C38556793EECB375BC38B1
5861:106E300002FD5B7B15D207AC3951DADF5F61E5FB00
5862:106E4000A603361FC96DC76113DDF7D6EB8DB1827E
5863:106E5000FEB89F887C0737190782E7BB2E1B7B573C
5864:106E6000C3239BCB4FA4BE7EC1E6233EC5823F4DCC
5865:106E7000C08F652F85F1C5FEF03CC52DF7A75F2FAC
5866:106E8000343F4F4FE3BA46ACF7DF755CE1F349D6C8
5867:106E90006266DC9FBFDB1C71CE3447F8F9353F5882
5868:106EA00044BD999631B1EBA1BF2504E37E61D74380
5869:106EB000E4D73DF7E8F19928B72B7E676456E07375
5870:106EC000DB2E070BF17B14665C57CB1B8D51CF4536
5871:106ED000185B4FF8ADF8AD83F44AF91E4B7006B459
5872:106EE0002F7FEADDE1E89F6A5BC7F54BE051211F88
5873:106EF00081D6E1785E5EAEF2F3623DBC1F0B79395C
5874:106F0000FB747C09EA47A59EBFEB2C6F986BB244DB
5875:106F1000ECCB2BF1C08DD7A37BC8814714F28377CC
5876:106F2000C76F2DAFF708D77BE54DA620BE0F2DAF5D
5877:106F3000DF46FBD9AAFA8FCC68C74DFEED636447E4
5878:106F4000543519653F61BD3164213FA6F138A67AF9
5879:106F50007F5D656305CDC7CA06E10FD3F98B56FC8B
5880:106F600076EF530120CD8A277EED443D73A665A7B9
5881:106F700093FC70F5DCCFA6DAD5E87EB89EFC6F0DE9
5882:106F80009BA2FADFCEE07FC0FCDB6A95FD6FACBE52
5883:106F90004FAFCEC1573CF6E983782E7476CF870F7A
5884:106FA00022DE2BBFFEF8C19FA27DB2CFE6C2F5AEB6
5885:106FB000EAD1A3E457D7DA3D25E655DB23BF7EF8B7
5886:106FC00001987F6D6F58E8FE55DBDEF707B8619CCE
5887:106FD0006DBBBF4845FFE5EABD5369DFB2FAC9C9D9
5888:106FE00069E7BB47827219ECC579889E0F071A8D35
5889:106FF0000CDF419E3B66213B23EC476DA8E07E6998
5890:10700000B7F09FEE8A7EEEA4F9FD2A1BAFB9FA52C3
5891:107010005CF71A4D1E377D177EC09EFCA6AF023F5F
5892:1070200047F4826FBB845F5CC7B773F81FC09F3F94
5893:1070300059657FF3A78D4B7FF5009635F689E937C3
5894:107040000DF5825EDAB9D636ABF71D2BCE873DBF84
5895:1070500021FF34F20B6C6ED6F6D8A703D0DF70DABE
5896:10706000D47123DDBFD86BA17B42E57B5FA7F9D14B
5897:10707000F6E4113A2F62E25CA98D85FFF83980D8D9
5898:10708000CB54ED70707FABA03BFA63DD4EFA2EFC63
5899:10709000AE5C6E357F6C2C3F6C1F9BB8072ECED933
5900:1070A0002A76BC65663ABFB63216F9745C3A17D4D4
5901:1070B000C6AD87E7423A5C12799E10CBCF2DF468BB
5902:1070C000984FFC1CA16D9B385F089F1B30D62F0F7B
5903:1070D000EFBFF3F3EEAAA0F23A8B321FB5F304A789
5904:1070E0004D371F83BD3B47E819DFEF460FC5C6F795
5905:1070F000AD1A5DCE7E155D1F0FB129E2FD812FD740
5906:1071000016B1EE2C10EB4925D08BBF27E3F89E1566
5907:10711000FBBBB38F1A83B80FDED07080F4AA7E5EFB
5908:1071200057B2E8F143C6DBB83EA96CDA3F1CF5CF95
5909:10713000D9679F26B9ABDC75DC1C003807EB9F30A4
5910:10714000B70EED9273D4D7C1087D7DF6F1FDC3F97A
5911:107150003907DF47EAE15F21E05735CBF0AB767DB9
5912:1071600024C15F116830BBEC3DF77346F5CEC5F125
5913:107170009E6931515C94330DC6C268F14A86622023
5914:10718000A9942E3A6D70F0F771C62433D991AB1DD6
5915:10719000638F2524636A76E33E7AFD5A7E1F72FD73
5916:1071A000CF3CE9C897F58973E81CA856474757B202
5917:1071B000AB00F7D7AE2945A351ACF47A20D16B9040
5918:1071C000F05EED284CC3F7DCB70A7B84A91E7ABFBA
5919:1071D00067744E2BC471185D06972DEA3ACAE1997F
5920:1071E000EC45142FC2E492DFD37DEFF11FDCFDE408
5921:1071F000F80F817EFF68FC07467130FEDFC77F080D
5922:10720000603FFF02F11F42E4B7D1E23F247FCFF19C
5923:107210001FD63239FE83E06738FE83E0E7FFC67F82
5924:10722000F8FF2BFE8331EEEF53303E8316FF21250E
5925:10723000CE3C3532FEC38571095323E33F8C8B4B23
5926:107240009F1A19FFE10771595323E33FCC8FBB68A5
5927:107250006A64FC87AAB8515323E33FAC8D9B4879FD
5928:107260002DFEC3DD7153A7CAF11F664E9D02F9B60C
5929:1072700038DFDF71BD8A15FFE13D9C2C637A8EFFFC
5930:107280000070CC716362C77FD0C38915FF01E02411
5931:10729000109C18F11FBAE11323FE03C049273831AF
5932:1072A000E23F74C32746FC078093457062C47FD0D9
5933:1072B000C38915FF01E05C1497123BFE831E4EACA0
5934:1072C000F80F006714E11323FE43377C62C47F008C
5935:1072D0003813094E8CF80FDDF08911FF01E04CA541
5936:1072E00071C588FFA087132BFE03C09949F8C48895
5937:1072F000FFA087132BFE03C0994BF8C488FFD00D65
5938:107300009F18F11F008E8FF08911FFA11B3E31E203
5939:107310003F009CE5042746FC073D9C58F11F00CE2A
5940:107320002A821323FE831E4EACF80F00E7A7042722
5941:1073300046FC876EF8C488FF00706E253831E23F46
5942:1073400074C32746FC07807307C18911FF410F27CB
5943:1073500056FC0780732FC18911FF410F2756FC0788
5944:1073600080F32B821323FE43377C62C47F0038F501
5945:10737000248731E23F74C3E7BBC67FB085062A3954
5946:1073800014FF81E24486E33F247FEBF80FCD88EFC2
5947:10739000FFC67FF89F19FFE166BBEFEB38F2837EF3
5948:1073A000B7F80FB6F86F17FFE1667B517C3CEE2F04
5949:1073B000BF65FC87D4F86F17FF01FA498F1F13BB15
5950:1073C0009F58F11F7274FDF414FF01FA1974DEF175
5951:1073D000C488FFE0D1D1EDFB8AFFF045DCF9E33F43
5952:1073E000FCCBC559806D0A9EFF149328B27F99B8D3
5953:1073F0000BD7C6FF93E32E90B1F0AF1477417BBF5C
5954:10740000DF60C2F5EA4DC1F7D7845CBC25E22F1CD2
5955:107410008B197F217815F94597CBF117A60B3ECE36
5956:10742000F3C9F2309DF1F386E953B278BCCC325DFA
5957:10743000FC855CF9FC7A86EFC81400C7AEF2C8E39D
5958:107440003822E46166C947CF217BAE1E1B3DFEC2D8
5959:107450002CC18F621D5DA60BBE158BF47A7C920247
5960:10746000F23CA3EC888A749DE96E55C9AFFD038D8B
5961:107470007F6E897FB3055C3DBEB304FF665DC9F9CD
5962:10748000A7C7FB55E49F13D2B251C43F3DDE7A3CFF
5963:10749000F5FC6791FC8E889B51C0E4B80B93AD72EC
5964:1074A000DC85A92E39EEC215E972DC852BDD72DC94
5965:1074B000851FE4CA7117AEF2C87117AE1E2BC75DE7
5966:1074C00028F6AED5C57DD8A48BFB70972EEEC3FDF4
5967:1074D000BAB80FDB74711F1ED1C57DD8AD8BFBF020
5968:1074E000B42EEEC37E29BFB8E6B0547F69ED1129F2
5969:1074F000BFACEE0DA9FEF2E071A97C45FD07527903
5970:1075000045C34752BEAAE90BA97E6FE33EBC2ADE03
5971:1075100003BF26DE031F13EF81DF8C11F7E1AF3FBE
5972:10752000FFE2B6C8F7F85FFEFC9BDBF03DBE41BC56
5973:10753000838D15F7215C1E23EE4357FB6F1FF72148
5974:1075400025F99FFF0E3FC7CECF3727C44FCAB1A73B
5975:107550007CF777F8D716C9EF99E796C8EF9973ECDF
5976:107560005C9FCFF3C9EF9AAF2F93DF3597D97CD9C2
5977:1075700088873EEEC384786F8E1DF5A5789F1FC265
5978:10758000F7A9B0363E8BEF53217D0EE33E407A10D3
5979:10759000E33E407A08E33E40FA7B8CFB00E94B185F
5980:1075A000F701D29731EE838A712302226E448D88CF
5981:1075B0001B512BE246D489B811411137A25EC48D0C
5982:1075C000681071239A44DC8810C139E13F44E949CD
5983:1075D0007F0BA5A7FCC7283DED6FA5F48CFF34A554
5984:1075E00067FD1D94B6F93FA7B4B7712334B9FC33D6
5985:1075F000DA0D66EC9FCBB126A733EC033744CA699A
5986:1076000091FDA20D28A7B1E245CC459AA6C48E17DC
5987:10761000112E8F112FA2AB7DEC781169A3BFBF781B
5988:1076200011FF16CFE5F51F8D1731BF5A8E67B06079
5989:10763000CDF9E34594D98A56A35C6AF2F86FF1FC60
5990:10764000BCAAA77811DBEC8A58AF812E6877015D60
5991:1076500068BDEEE1BDFD738E8773713FD1997BD11B
5992:1076600079E31CE8E52236BD795C83EBBEE738118F
5993:107670003DD155ABFF66398F5FF06FF1E78F5FD07B
5994:107680002D4E444FF105067D467AB2B771227A5AE3
5995:10769000177AA2E7ACEF394E444F7AB5277DFAC787
5996:1076A000E99CCE13E2CF1F8F231C17CEDA72901AFB
5997:1076B000BBBC34B555F10EBC60B68BFC27EDBBC42A
5998:1076C000BD312F73BB52F93B75B437DBF7240C6720
5999:1076D000F47EDDC5BCC09F78F15DD9B57F3F9EA724
6000:1076E000DFEA64DEC4248A07EF36E6E03E6CA415C8
6001:1076F000FD29158D1FBDFC3B806B6B36D27DB276AC
6002:10770000C0A185EC3E6F22F22D9EDD4EFB743CE362
6003:10771000FAA64FE47B66DDEF37609588F39BA946B8
6004:107720003BED9B3AB7F27B9E4676F17D1347D37DC6
6005:107730006A167413FFC84E5D21F0ECC414EBFBAC69
6006:10774000643F2E3BFC447E88F1F3CA48BF419F4210
6007:10775000D94F5367730EC777952CE06D41FB7B893A
6008:1077600080975224FB6F3E5C547808CFE997F84A23
6009:10777000E91E425A89ECCF61E2DD386EC7C2F7E5F7
6010:10778000009FD226853DA0747F475ED67CD706DC5D
6011:10779000E72C0FEAED6F968B7256CEE23CB8EF5DA8
6012:1077A000512F973B1CE23E879DD97B45B7D60BEF07
6013:1077B0009B987C5EBA7942587F9783EEC32E3BBC80
6014:1077C000D88CCCB2A4CB74B3B965BAC5E7CAF4D12E
6015:1077D000D3CFE191E9A3A75FC258D9FFA5D14FBB91
6016:1077E0006FA832715F34C8EF91767B87DFB48DF07C
6017:1077F000D4D34F4FAF510E714FA28B5E45D654522A
6018:10780000F98467861A22F9D6CF874C7B48C1FFEEF0
6019:107810009F1C5C4BAD3C0E15F5563A07CD9425BC2C
6020:107820005D3CCE078C2BCB3C341F70478FFEDD7840
6021:10783000F66721F7EFB26F20BDA9F8B9E38BA0740A
6022:107840002BCADB08FEFB0BE4AFD27E3781795CB834
6023:107850008F6AF05BDD4B543C1764EE2503F13CD09E
6024:1078600045E99DE2DD6FFB5046FBFE86D027A978F7
6025:107870008E76675EC74CF43F542D6545B87EFDC8D3
6026:10788000C9DF5D6C12E90827F7CF6C2E3230EF6844
6027:10789000FC1D1E635041BFABCB7BF872B4479B4DC0
6028:1078A0006E7A47ECEA78F97A2A1F45EFA3330CB5D4
6029:1078B00023111FA84FEF6BDB9BDF752E8ED0C36D9E
6030:1078C0004D770FC1FBC5F71BA2BFEB2D7568EFDB32
6031:1078D000F8FD8E115D71064A1D63281EC19DD9D029
6032:1078E0004F657127F15193CB0982FECF954E27FC4E
6033:1078F0009E6C56DCE8AF9B66BCE107C300BF7147D6
6034:1079000055AEBFC4BDEED1A2FED3CC938EF88EBBD4
6035:107910009429387FC6BDC13C0124717529DDA7FBC0
6036:107920009D73DA21E4D7946690279C0F67ED1EBC07
6037:107930002A3FA645BE2F9738C57700EF175E728C99
6038:10794000913EBBE498AABF1F63C4FDFEB856F9FB85
6039:1079500004DDFE739D26774E968A72B7E52B23E1F0
6040:10796000D5DEC13CEB006EFB92BE746EDBFE0923DC
6041:107970003BB1FD2B6361B4FB25773BB8DFEB7E3376
6042:1079800023FD7D7FA99DDE393C5B5A7E01DA179F7E
6043:10799000FDC47741343F65849D96C0DF9F7B13D83B
6044:1079A0005894C35B154EEFDA8CA228EB9626779A93
6045:1079B0001C6AF297511AE78B765F33D9C9EDA34958
6046:1079C000A5B98A19E5679FC290AE6DEB00AFF3AC25
6047:1079D000DB01B62E13F1A96AFA98EE61599B95A8BE
6048:1079E000BFCBF384C3C9EF03AE0BACC5FB1737C3E2
6049:1079F00024423D9561AECD8A063FC0B6905DFA80C7
6050:107A0000C3CDDF0D58451C21B53603EF23B4354DEA
6051:107A1000BE7203E0F900CC07E4EFFD260FE11DA8DC
6052:107A2000608CEE930A7F5DBF996CDBE608FB77AF55
6053:107A3000A3E030CAED6107B71BFBF83C0AE2EDF9A1
6054:107A4000FB5F9D08BFFD730BF1AFAFB037B5762775
6055:107A50001D9C3E254EEF016CCFCA9249F9787C4EB1
6056:107A6000F7923EE837077A47B1AFB4753DC9C7E82A
6057:107A70007C22C96E089272F27ADD2EE9BE7780E62A
6058:107A80008D360F584861F85E5FD36F4AB31272802B
6059:107A9000DC8FB6DA4378FF2CA90CC69D8CF13CAC88
6060:107AA0001C5E8B7A56F66B813CE6A371CFE8BD3F36
6061:107AB0003A5211BEA6F7347D796B22D747B7DEA5BF
6062:107AC000523CD0AD6AAB0DFDA9595EF7240C4D9325
6063:107AD000A4BAE95E4AFF323E0FE3737E9918B603FB
6064:107AE00060928FFCDAB820DA7BA60C94A714A497D6
6065:107AF000EF4307A4C30F753C8BE682C7C6FAF0FBC1
6066:107B000053424F08BB669A58EFC6BD67E0EF284363
6067:107B100097B3C8F7457A3D0172FF27FCFD9EFBDF56
6068:107B200053294E68583F944EA3F58919871E403952
6069:107B30009BF022E3C751423FB8E01FD2E792977C07
6070:107B4000EB118DEFAA17F4FC66216B388F3FCD3611
6071:107B5000EA10CCB7C875D629D67BA1476E2A1EB8C5
6072:107B60001EE797264717DCE231FA22E8A86F1FF6D6
6073:107B7000532AD6F077770EEA91978C783FACBD0008
6074:107B8000F80D747912E70BD03BF193E095C8F72D0F
6075:107B9000CD57D850BE6F0D4D72CD803689D622623A
6076:107BA0005E22F3923F270FA8837122D69350C07EA6
6077:107BB0005D2DCA72A6E03DAE42C9DFA3FD2E1E0CAC
6078:107BC00094F812E603C871E43D564D3EF5F2A8C99B
6079:107BD000EF7ADC60E1F91D7ACC21352A0DC4200B47
6080:107BE000DBEA423DABD997EBC3F65C22ED33560B93
6081:107BF000BB68BD7D9A95D4C0FE645ACF57E3FA04A2
6082:107C0000E35F9DC2681E68E3D0CB63D5E706168CA0
6083:107C1000D81F54A91D748FAFEA73330BF6C171FBE3
6084:107C200026E1B835BA8C1474D1D321DB29F69B82B6
6085:107C30001EB1F1CC77E1FDD944AB976D243C27D13F
6086:107C40003DE786509E15D7DBDB7478F602BF39D14D
6087:107C5000F053ED31F013F1DB2630DFEF5A415EF3E4
6088:107C60006FAACBE0EB057B353D827FFA7933B6A96D
6089:107C7000FA803962BE687E5DFD3C19D1CCAE41BA56
6090:107C80008F0BA90CCF5F7B9A2F9F88F156C5737A13
6091:107C9000B5CFE9188CF2B943F5553BC9BE683560DC
6092:107CA000DCDFF6A719CD67CFFE934E8A6FD4D2BB27
6093:107CB000FBE99A1DA5D94FFA7A9AFDA4E95DED7EFC
6094:107CC000F876A7CF8FFD2B4D209F30FEF52EBE2FCF
6095:107CD000DAEBF0ADC3EFF130063C4A62B9A12CFEFD
6096:107CE000FE5596FF58F21EAF93E706A013FD4E1601
6097:107CF000E8FF414A773CB4FEA73813F9790BCC660C
6098:107D0000D443FDF219EFAC92D1FDC97EC3990FD7D0
6099:107D1000A77E79FCDE5F50ACDBDB84BED5D2BD8EA6
6100:107D2000A2FB117F93CA0296BCEF8E37A28AF7B1ED
6101:107D3000B73BBDF7A1FC590BBD348E4C17F3A0FD2A
6102:107D400099A93628F86E3269A55BE1F7B059D73B9F
6103:107D500026809739C35D80729289FB68ACDF1C3D39
6104:107D60008ED6134E9364677A58384ED513D82FD8D1
6105:107D70009907CD80779F195ADC2BEDDCC6A3209D97
6106:107D8000DA1C7308E9B64F156E8F27727AE9F7038C
6107:107D90004878C44F15F9DBCC4CB525B1AEDFE134E2
6108:107DA00058C98E8F679E06D44B2F3BB3C5B9A8A781
6109:107DB00006F3FFAE7658138776C9F19D13677954A1
6110:107DC000A8E2BCB47338EE99409E0F23BE6D133BFE
6111:107DD00007DF4AC4E818C0E5C66B94E2E268F46FB6
6112:107DE0003249F4B7E13E3B520F3ACCB48F6C53E2C8
6113:107DF0003C38CFDA962B1C4FC52AE206A9F2FE5F6B
6114:107E0000E8234DBF763AB308FF7816A07D00B37A19
6115:107E1000AC748F5DE08F7115C9AFB3373EB81DCF1D
6116:107E2000A3747114F57116272FB6D3BD8B2D7B6DFE
6117:107E3000B42FED2CE2E7F39DCD16D2BFB1E6691A5F
6118:107E40002A83F3C40B04BA7520DDD24CD589A8F778
6119:107E5000D2E6F3F9AFA7473B0E14F73B7F3005A3FB
6120:107E6000BD57D7D2F4F4BEC56897A567A453AA7DC1
6121:107E7000AFB3AB51EF611B1314294EDF10E851EC87
6122:107E8000738C09F0FD9CEF8FAF7959D7BDF6BA38E6
6123:107E90004EBF4EDFF8848751AE40E0E8F704B4737C
6124:107EA0004DB19FD7E22769FD6CF15B8B31E467DD53
6125:107EB000A2E9365C075298F7CA793829B798D84EA4
6126:107EC0006A972BDD77BDD73FB218DF276726F07B97
6127:107ED000B49F6C994AEF9953D93ADB60A0436991FA
6128:107EE000C183FE80738BDE741A407E1665B6E4A3F0
6129:107EF0009C26987C990963C87545FB8D6525E660CD
6130:107F000008E8955C070A81E818B892E8B8D010D55F
6131:107F10003F9C9DC0F79D6F89F5243D7D40F19251B6
6132:107F200091F97E44574D8E60FE642C19DD150F13B8
6133:107F3000F87951429479D06E624DF85E42D347C9C8
6134:107F400042CC347DA8C97132CE0FB4E38A403F4998
6135:107F5000E77D5035B5EBF70C95E617BE403BD6797B
6136:107F6000E924D237306F6B48CE73B9FEB4A13E8B93
6137:107F7000F05BB5EF7DBD3FBE637AFB671F3BF05DF5
6138:107F8000CB5FD40E07EAAFD3B7FCC98171C0DEBEA8
6139:107F900085EF936FD4D9FF5709F90826144D41BADC
6140:107FA0002EF0FF3D3FD25E636BB8FF7979507EBF04
6141:107FB0008AF7BF23FD80150DFAFB00011EA74CFCBC
6142:107FC0003EA79E0FEB041F96EFDA66CE7463FFBEEA
6143:107FD00039D8FF69B1BF39DDE8A0F7141A3E8B76B6
6144:107FE0008D34A3CDFF97668B78A7D762E27AD93B11
6145:107FF00003DFE7F804DDF4781EDC174FF096DEC3EC
6146:10800000DFAF2E84BED6805EF435F3384AFA712C89
6147:108010007DDB3D0DFDE84B3729B48FC3FAB7C03A7D
6148:10802000E15BB391DEF1E8C7B93020FB73F4F11ADC
6149:10803000B5FDC032C1FF25F86BBC3951E23836F3CB
6150:10804000F774CB74F645E7A19C781CFF9A0461672E
6151:10805000E7B34B306EE79E43D909D1E26168E95935
6152:1080600071DE8FF7FA313DED67944E4970F3785D1C
6153:10807000CD476E46B9AA6CDA4DF111F705DFEB3347
6154:108080001EAA14347F6144A12A10F6D87C618FEDBA
6155:10809000615C6EC08EDE8CF27FF9E73A3B5A8CF35E
6156:1080A000064DEE0F2591DCDC80E31A8EDFD54FA262
6157:1080B0008DEBEE04F9FD576FC7A58D471B9F565EEC
6158:1080C00021DE9FEBDB69723E45C8DD921DC51BFAC0
6159:1080D0000229D6EF7D7F8088234771B63439D2CB11
6160:1080E000C932C1B7B03C34DF41E3D2F806F29E2E6C
6161:1080F000DE25A5A33FA327B9D0F3BFCDD43A00E72F
6162:10810000AB9EFF6D31CE7DB627F0738D256EEF34BB
6163:10811000F4AF8079B8C115613F9C566B0FFE14E730
6164:10812000D10E2EC791EB22194B2F9A689D5DE570F9
6165:10813000A725DA05DFC6E1FB454B00EB69FD9CF2A4
6166:10814000D7CC1A48E78DB5B3060EA4771B946AE521
6167:10815000A5F77FEC44FBB43D97917FA1CD21E37B54
6168:1081600004179B319872FAAF545BBE7E0B75D08EAC
6169:10817000168ADF7AEA2BE19FF8CA52186D9C6713C2
6170:10818000B81DA8DD3FB951CCA31B9BF97BBB455B58
6171:108190008BCDE4075823DFD77849714DCB84A6BE39
6172:1081A000869166E4B39E1F4B3D57D03BF06E7C61D9
6173:1081B000B7135F97EADFB5897B4C0B847CCC74B92D
6174:1081C000859DE6A377C44BEA8C64DF2F7357D3FEFB
6175:1081D00066851AFD3DD61897E1BCE3D18F6361A394
6176:1081E000427A4F8FFFB21D6B37F465387E3EBEEE8C
6177:1081F000E308F5233D23C6C95A2FE7EF32C5BAFD80
6178:108200005FB8D1C6A4008000000000001F8B0800EA
6179:1082100000000000000BB57C0D7854D5B5E83E7326
6180:10822000CEFC24334926FF21413C21111212E29059
6181:1082300084000171F24BC4080301826075405184CF
6182:1082400090207A5BEFABB79990682DFA7AA358CB60
6183:108250006DEDFD062BAD0A4880A08126E9041403CC
6184:10826000040D820A96D68014B1053280B5587D8FF0
6185:10827000B7D6DAFB64664E92426F5F87D69D7DCE9D
6186:108280003EFBACBDFED7DA6B9F65ECD94B720E633B
6187:108290000FB7CB8CE53356FBACEC65A98C2D63CACC
6188:1082A000E9BE0C46BF6BA9F85F67E59204C6EEC550
6189:1082B0003F5568DB57553278AE5CAE9985CFF56F88
6190:1082C00090995982EB1EEF53C971D036498E4618EA
6191:1082D000C71E379EEEB33066817FD746D33C8C25D0
6192:1082E000E0FCFCD723B1A75260FEB38AFFBD08783B
6193:1082F000EE2CC0E181799678F873F47EF8FF32C7EE
6194:108300008C2F2478DFFDEDF229730E5E5D6D32C097
6195:10831000F8A52F496C1D8CBFFF69DD78B12EFD3AA1
6196:108320001EDAF0A3B9E91981710F7B9F0BE9C3DA5B
6197:108330005456C0D87D023EF6EA7F05EE73F84DAE86
6198:1083400008C632ED117167B3A05BC0265D4B63AC0C
6199:10835000CE1A99C3A2A03533C2233B64F46E02B88F
6200:10836000D644C08201CE355BA3BD1EC4E3EA68C615
6201:1083700046C0B8F68D26B70DE6C4DFED8C9DAB6F19
6202:108380009E9B9E0EEBAF7F7A6EBAC2D82CBB9DB17E
6203:1083900089408FB6E7685CB7E29A6487FE2A4BDFB4
6204:1083A0008FEF5683F03899D363995C696286C07CFD
6205:1083B000FA7659B3F1CBBEA0751621FC56F86312BC
6206:1083C000C02FFF3DF8D5C4685B006EFDBC7FAADFFF
6207:1083D0001002F74A85395B6C81F568E326DA0DB443
6208:1083E0001EFDF37A7A30E6A5717ABAAC443A04D12C
6209:1083F00017E15400AF3D1D56EF5A89F888E0F67436
6210:108400008411DC1793D6CD3D93C7D8617C00E0AED4
6211:108410001DF132F55F515C6E7B3C5EF48F728DC74F
6212:108420006762199B323CDE6046C6607C2ECE0FE34D
6213:10843000768539F3988CD75DB1C807D31BFAAA2C7F
6214:1084400040AA3AFBA40A05DE33FDB9BEAA30E83FD4
6215:10845000629FCCFB9BFA8E5A1C8C35B02915A5F077
6216:10846000FC63700FE7BB5E9B6F762D66C05735804F
6217:10847000534B0CB4C7C6BC8DF256D35B5921454251
6218:10848000CB984FCA057E7046FAAC39D4678530AEBA
6219:1084900033CAFD1FB8BE55579B2EC938EE98C2E5AA
6220:1084A000A53B8EF0A000EC61F05C53B853B503BE61
6221:1084B0009A622C8EC654BAEE098BC1BE535583AE58
6222:1084C0006BF4C0E7108E2603734643DB75604C5493
6223:1084D0005FF6F078EBAA57AB14A0FFBEFA0C6AF572
6224:1084E000F78B4CF674073C5F6460EE16DBE0FBAF85
6225:1084F00022BF109DD414A4736DB789E41C7F12F0C1
6226:10850000FD2AA1876A81405100CFAA63CC171E893A
6227:10851000E3CABF50B06D95D8E910BE6281BE3C3C45
6228:10852000DC37DAD6E27C4A309F703C152BA9554ADD
6229:10853000D07B4B6D99217D39D19081EB6172B8630D
6230:1085400013E0574E31ACDE01EB976F8616F0A1D8E1
6231:108550001DF212689B4BA6CB4BA16D34B2852DD872
6232:108560001AD8F2603C750879D2DA4B76D76F90EE64
6233:1085700017DEEF2DB0929E1A6927F916EB6D941C49
6234:108580003ED4439E2EE6D804D79A6417E37CDCC21F
6235:10859000908F7F2FE671980D3B55E0D7F7EC0F12C7
6236:1085A000FF3AA20C8FA642FFA3E615150AF0AF23EF
6237:1085B000C570251578F478F34ADECF325C190DFDCD
6238:1085C0004F9A6B787F2A4C99CCD8C9E655159E6C8A
6239:1085D0009C97EB31B6C59985EF510C12C9A9B2D75A
6240:1085E000E46D843F9B22393F3519812F6370BC4A6B
6241:1085F000E39F6A28DE6C05FE578A9DEA6A1BC73531
6242:10860000F2C3FFB4D5F0285B0DAB118FD822BECFDB
6243:1086100088756B7460ADCEAC39A8175A9C5973231A
6244:1086200010AFEECF11AF793DBDD3510FB77EF049FA
6245:10863000813B9BD30BE7C9EB612C12D673E1AD9B59
6246:1086400036CA52803E97EC45E7515F4BA0A61F8784
6247:108650007549AA9DDD0372D7E864AA09D695C85E5C
6248:10866000B2A3FD30207D4005B532AE5F3AA35C5F1A
6249:10867000E2736CA48FEC4CB5DDF515BE5FD3CFACC7
6250:108680003766483DACD757A69CC765067C1093D289
6251:10869000767C29EAF3DF9A1DB7A8088F933D0E7008
6252:1086A0006C333085C5107B642870DFCAC21DEB5067
6253:1086B000DE1D2CC903F2856823E0E01707F6D028F9
6254:1086C00064485B073C5FCAA09D8470DD4AEB9291D1
6255:1086D0009F2630978C7AAB8079ADD8F677BC95849D
6256:1086E000F87A3E8CDDE782D6F22A737A83F4467EEE
6257:1086F000B444F89F1563A436DCD83217F934FC1261
6258:10870000B3A31FD0FF0B9382F38360DC89D71DFBDB
6259:108710000D0CE1FCB5D16B8F82BE3F53515F66817A
6260:10872000F9FA059DB5799F37A999D1D0AF8A9108FB
6261:108730002FBF2EE2F6D8FF85C9FB722AE2C7B2DA54
6262:108740001B2457E3A3F9B8BAB8E2B1D1F07C4B4788
6263:1087500038C3F74FEA0C3720FE376FC90D433ED8B8
6264:1087600086B881F5C798ED8FE07C315700DE54BAAA
6265:10877000EE24BC2AEA8428C06BE14C9BBA0EF0FEC2
6266:10878000EBB09699C8F7FEAD06F632BC629BC931D4
6267:1087900007FBDB2EAB76D4B3BF4E6D09A7F56C3566
6268:1087A000D07AB685FBC7AD01B8D7652815089F629A
6269:1087B000650AEA5FC550AC3E02D7A74573FDA8E93C
6270:1087C000E39A6895FACF4BF0FE5C1C57447253262F
6271:1087D000DB48DEFAFDCC6B86F7C4CFEB95911EE14A
6272:1087E00073809590DF159FCC703E17121A5A9BD15B
6273:1087F000AB929E75DA9600DDA70B3D3BFD644D25DF
6274:108800008BC48EE3D854986F9FCDC8705DB7B13ECE
6275:10881000D902FDDBAE32870FF9E7AA427E981DFE32
6276:1088200005FB7B65629E5F494C898271455FAA0AA0
6277:10883000F257110BF5DBCA36947F81F6ADC4A2BBAB
6278:108840008EFE5C24B64AE03ACCB3285AF861A3D82D
6279:10885000A86BA4CF60D6046147555C7FF67FE1BA70
6280:10886000FA2B4C0E5CFF769BF3E3A9A8077B8D6C7B
6281:10887000131B5E8E7E550F1A7D0C08C7D570E68DD2
6282:10888000253EB421FDC76D68F684C17AC7A5F3F90A
6283:1088900091DF506F8CFD455C2CEAED8868AE4FB4DB
6284:1088A00056E32FE4237B14E723FBAD01F9FB5E7451
6285:1088B0002A8DD3E409F90BE7D963F42E760D6117FD
6286:1088C000812FBF877CB9DDC62A90CF9F1961598857
6287:1088D000F2A4BD67B7E07B7DFB54C39A2E23AEFBA9
6288:1088E0002FA0FF01EED2E4ABA660FBDD15C7E12DA2
6289:1088F00093BF25BFFA62BB44FE7C423BD7D7C17C05
6290:10890000316268BE7801F17A3DBED0C7011A5FECD2
6291:10891000B81E5F74FF637CF18B68E1DF0ECB17DF5D
6292:1089200046E2FA1FEB2849647FC78F69137C30DC6D
6293:10893000FD2956AED7F4D7DB053E779B9AEFCC41A5
6294:10894000B9BFCBE040B906AAA7CC05FBB23B9C3F20
6295:10895000C794D569D8DFAE703DB2BDDD4C7A64BB3B
6296:10896000CDED267B9D6461E82730C5DDF77DD47FA2
6297:10897000C916755D10DF3E2EF4408BD137E573F4D8
6298:108980007F0F70FA4EBE2B5736C1B8110F70B9CE9B
6299:108990003F67DA28C33CD53145BE6818DF17CDEDF7
6300:1089A00062DD1918057C597BC644FAEDADCE23E58E
6301:1089B0004E1BF9374EE4AF497B8E941767E378CEB0
6302:1089C00047DDA2D5FA53704D3164768E25017E5D68
6303:1089D000C24E4C615C0FB9903F72027DE634523C4E
6304:1089E000A6F1413563596827E6F639CA908DAA2A5F
6305:1089F00042E95BED9B4971DFFCE3CEB20858D77CBE
6306:108A000097EEBEA07FB58EFEE007FF01E564D5E6D8
6307:108A1000DE4E1BF2ADCAED698B697516F77B56A762
6308:108A2000A1FFAFC911FD004F2DBFCF78795D901D1B
6309:108A30005763F83A9F752874DFD367F2DE0297FE1A
6310:108A400037E3CFB5087BF3AD90E3DCC7DE588CFC91
6311:108A50009BB7DCB90FF1BF284EA6EBFFC97C96345B
6312:108A6000A48F4321FFABC5A8967C2E05C631C595C2
6313:108A70006183FB7BE2C3F3F0FDD531EE6B4827A6A3
6314:108A8000F8BBF1B94985B9792857B6094DB1687F66
6315:108A900034B801AE8A4DB6001C1A5CE785FEA98E7B
6316:108AA00059720DF180CFA15E693B75D682CF6B7490
6317:108AB0006FE9B8C4E91D447FA47780FED27DD8D782
6318:108AC000F06011ADD6FFE7E9EF1B89F41896FE18A8
6319:108AD000F747FE8FE83F2A6608FA833F958ED73521
6320:108AE0007FAAC5047E7576A0AFD1BDDA5E44E31CD3
6321:108AF000265819FA4F9D1057A21CBAA3D1B9613B51
6322:108B0000EDFC5DFDBF3F3B0A5C4036292686CB93DA
6323:108B1000C93F06FD8D093E89FCBE0920F0F7909FF4
6324:108B20003592F49D43E0879D95A4B319DC05BF966B
6325:108B300082FE9F2F16E56082B9D287FCBEC33A3D04
6326:108B400005FDB75CEBB434E4A737331E3B8426E75E
6327:108B5000CDE4E53B5F51037E8EA6D7F68969B5F774
6328:108B600097C770FADF0E6A16FD3D740D83E1D0F4ED
6329:108B7000379205E1907CD5866B56D2C7ED7D80AFEC
6330:108B8000DB110EC06B97C45A517F17199C7125E8F1
6331:108B90008FC5FB14EED77D3D4A05BEA96C7FF73823
6332:108BA000C25B69B1F930DFC21CC6F37D41F912BD69
6333:108BB0009FABF9259ADFAFF92D5A7C89FE0DDECFE8
6334:108BC000C7EB00BFDD0C00A2FDF159BC0DF0FEE7C4
6335:108BD0002FAB994E21AF0AACA352AC6336EB25B84C
6336:108BE000D8B7D7AE4D03FACC12F8A8EC86B8300748
6337:108BF000EF337617E0E12E85C78B7739203E0CE204
6338:108C0000A3D99343FBF89B9E1098E77AE3F5FA7F8C
6339:108C1000AAC817FCB371A6D676831D3A0D0C70B0A6
6340:108C20009EC73485A3658F82F1803BD380FC582793
6341:108C3000EC1A84C943DB2321AF8586BE1C07E0B74D
6342:108C40006BCF3764FFF6EEF9E623F4E7A67CA1309C
6343:108C5000333C5FF8457E14EA07E60A9DB7EE8FAD18
6344:108C600056C6AF13FFD48AB5EFAFC78C18C267A141
6345:108C7000F637E79F5F8FF37D7946E1BC2DDE5F6EAF
6346:108C800072A7DB6DD8F2787FBFC4FD1DEDFE7E2399
6347:108C9000C00DD737C568717FAF42F919F89983E8DD
6348:108CA0007C17C6FBB901BADE75AEE20B2567307DD5
6349:108CB000F0F7FF23DED7E2FCB744FCC0F69D30A9F5
6350:108CC00000D78CD64714F4A36724C9CC19F4DE3B33
6351:108CD000542B7306C5FB6FC4E8FC907DAFAD9F05B8
6352:108CE00076A4AE477684A1BCB66F3F9483FD5ED96F
6353:108CF000611D828FF4F89DD1FE8882FC9F10CBE528
6354:108D0000E67AEF2F1C077C722BD29D911F77B14022
6355:108D10002239D2D377EF9E9FC7F6650F8FEFE1E838
6356:108D2000AFA7C36FCE1747215EAE470F3DDF76C2B8
6357:108D30003A3DB03E1FACD303FED6DE7A3BF5DFAE44
6358:108D40004FA2BEC6AF751DBF8C457F4DE3D3B25851
6359:108D5000CE375376AF8F65B600BD347C5D1474ABEF
6360:108D6000668EF9B3E0CF5D922382F48487F52615F1
6361:108D700004EC55F5B172F233347B552D671B51FF6E
6362:108D80006AF60AD3C2A8CFF4F6697E7A9111D5AA01
6363:108D9000DE2EC1028DC8BFD50B43AF57F4342B1163
6364:108DA000D433109D2449E043F8D51A3C1F3217C133
6365:108DB000ABA7A7069F1E2ECD9FAE1674837596E1B6
6366:108DC000D2E7AA45B48E417655ACF746EDA93936BF
6367:108DD00034CEBA72AEF4FD9C21F87538BED5DFD71B
6368:108DE000F44039BE20975A0FFA1109B10944AFF285
6369:108DF000AB26E6047BC14686B1CF82F3EFAF649227
6370:108E0000BD7B54D8DFE1F8A6F6AA81B96303FC6301
6371:108E10006C7BCE8AFCB35B69B662DEF136DB9CC646
6372:108E200028C053E91F8BE7A15F57D76760989A2A3C
6373:108E30006BBFB40FE3F6BAE3CC81FAB0B8BDAB04B4
6374:108E4000F9ED6DA557A638FA4BC69E0BF20FDBDA8B
6375:108E50001BADE83FB5C5C914A7EF8FE6FCA8DD6FD1
6376:108E600089E5FCD776E6F22CE710F73F13F74B4F76
6377:108E7000E51AD148F6C74750BEA1FC6903ADBF54FF
6378:108E8000B25755A2FF718791FC7A885BFEF07DCCCA
6379:108E900037B599B763AABEACED878FD881102DFF87
6380:108EA000E7B30633E60FE6488E97615CB9EAEFC296
6381:108EB0007EF9BC54DA8799F47F65F25FFD774B94B5
6382:108EC000F7280776C17EF93DA95ECC3FEC9178DFAB
6383:108ED000D3C1F3FECCEE899D05EFF9A03276C23AFC
6384:108EE000E229AD7F4BEE3A261838289E7A6C17DFC0
6385:108EF0003F7AAC4CA2FDA3327B0AF304F155F9D3BF
6386:108F000040CF3CE0C7F6C462E4DFAA0A997983F84F
6387:108F10007ABECBCABC41E3F7877178FC92D98BF952
6388:108F2000124D5E670AFEAE5E181B327E0EE37EE2D5
6389:108F300042D66C44F9AE13F0D415013CF0FC4C1150
6390:108F4000A7DEED4E09796F256641606856DC68B290
6391:108F50008FB3BFEC23B33A473E796C31BC87657061
6392:108F6000F9D0E4AC4CAE69223E48921C181FCF9752
6393:108F7000C0AB9451DF85CAD1ECC9A1FD394EBD7E8D
6394:108F8000089577BD1ED7E47C7E876CC4387A7E91C5
6395:108F9000E46043E803BD3FADD703930C8E7730AE5A
6396:108FA0009E7BD549FC35480F9CACF887F4C05B200C
6397:108FB0005B93415E7FA4E9839BD84DA80FCAE42D43
6398:108FC000EB913FFAC1AE9987E00FCD2E68F176396B
6399:108FD000C827F2033BCFF725CAAE829CC606E2ED56
6400:108FE00001FD007E8363087FE657B16921FB4903D9
6401:108FF000FA22C86F3016FCF37E4319F88BA65C8406
6402:109000006F24F3E4919EA2FC1EB43ECAB3255DA278
6403:109010003C4A1DC4F114CFB35F125CA8D7A49800DA
6404:10902000DFEBFD092D4F3B42E409F4FC3090B79B88
6405:1090300067F4229F69FC506EE772513E4FA6FCB95F
6406:109040009E3FB4F75D8F2F7C12F085F477F842C80D
6407:10905000D38DF2C5218D1FD259FA8DF083C6071A20
6408:109060005FE8EDC5415DDE65387B71F23AF6E29D61
6409:109070000C23E965BD9DD0ECC28138AE7FC7C7F235
6410:109080007D8A9999F36DE8578C407D80FE9EB037BC
6411:109090000379A30D9C0FDEE95BAA486837500FA443
6412:1090A00006E15DE44D35BEAB7D9A51FEB052E89FBE
6413:1090B0008B1D3C9F56572A7B2DF06749FB73EB793C
6414:1090C000DF48F9B622A54BB1C0BCB31D9203F335FE
6415:1090D0004E917F9B75D5E455293F3FF47E7A95E00C
6416:1090E0001B8C7370FC6CA7E4851074901EAABACA1E
6417:1090F000EDBE5E1F5589FDF22ADD7EB9294ED0F501
6418:109100006676F3BFD2EEC7C72570B919868EDAF33B
6419:109110001A1D35FA4DC0B1283FFBBE36A911DC3F00
6420:1091200046FACDB8AAD03CA3E242FD962FCFE7FE87
6421:1091300027C574627C5DFB25937BFCF0F05FCF2F2D
6422:10914000BD59F3C3855FAEBD7726C8780A3A863A23
6423:10915000FBA1BDE7BAF6423CAFA7D3E4B8D0784252
6424:10916000A387A64707E15BE8D9E1E8753D3DABE998
6425:10917000B37FB59ED5E6D7EC80F65EBDFE1D2E3ED4
6426:10918000D3F4E9531B0D9417B94DC4C1B7893CEB17
6427:109190008342CE970B7DDBFF178B01FDAC6D9DDC11
6428:1091A0001F7198ED87D06F08E4F3385D9F8C601EC7
6429:1091B000DC2F674AAF85F62F8B81A4B87F99CCF757
6430:1091C0002FB7283E17E96987C21A405EFE2AF216B9
6431:1091D0004FEEF52C463DFDE4E93106DA47577CBDFC
6432:1091E00018174FCA55683F28DAAC52BEF76287D9C4
6433:1091F0008ECFF5EFFE5E9711E7F90B7360A8F67658
6434:109200008779603F06F54299DC23635EBEDF0FBEBF
6435:10921000388C9FB6D05782F1CE6DACB711E3EA42DD
6436:10922000A4E310F47B55675FF479FB920EEE27956B
6437:1092300044F0BA9FE980467CEFF43613F985D7CB2A
6438:10924000DB177DC9C85F1A94AF6FE37A0606119FDA
6439:10925000DC68DEBE107D3DE0E39FE8F40E1B267F58
6440:10926000BFCDC4F773FC478C0CFD5E762E6EC8BC78
6441:10927000CBF5F2F8BB3BC39D6A24EEBB71FF7C7754
6442:1092800067B253CD197E7C4E9FBF18F395DBB6CCE9
6443:1092900055284E14F9CF41FB223AFCED9058931516
6444:1092A000F369ED8E528C3F86DBE728F63B69DE1BC7
6445:1092B000C51B63CD9CCEA27EE9762163DBCE863BC7
6446:1092C00091BFB79D4D76223CBB057F6AFCBEFBCCAF
6447:1092D000E570DACF343955DC07F6475B1C2F13BF36
6448:1092E000723E6F1931C68BFBADDB853C6C0BF71FF3
6449:1092F000CC8A0BDECFE0FB179DF59EAA33E9B4DFE5
6450:109300002D61BE51DB27F680BC505D4E0C237E32B2
6451:10931000B21686EF6D74B29F633B7D9A1A85F8BED4
6452:109320001CA7ED47AA519467F8F64A816BFC60BC14
6453:10933000EFA877513D496BFDC22A05607CB3DE4D35
6454:109340006D5BFD726AF7D4AFA6FB6B0F453E8E7660
6455:10935000BFCEB9A04A09D21B9FC5F3FC526ED6E915
6456:1093600012E473F60D6318EF4C7FA24F463D71FB7C
6457:1093700055584748DD887219F14CF9CBB4403F5538
6458:109380005A12867C79FB55E8078D97E2A3391D9A1E
6459:1093900094A65B0A485A881FC2E29D17E3E0FA0FC1
6460:1093A000ED2E7F5C3CF241F5BE0B8CFA97F1FA0E84
6461:1093B000E96EF9028CCBF31551DE380FF3C6B934E0
6462:1093C000ED62C4DFC42E13ED7B6BF9DB5C31AFF3D0
6463:1093D000ABD03C729EC8DBBEC9FA289F9C6F81C08F
6464:1093E000CA807071FA39A5F94912E6FBE24D0EAC5C
6465:1093F000579898E6CAC37C6B573CA3FC695757C281
6466:109400004815F0E054785ED7A9E575D9DFCFEB7643
6467:109410007F1AE9217D057E0AEAA7EEA3910E1FEDD2
6468:10942000FF59C8FFDB810F627D4338AF1760F3E659
6469:10943000511EFD760B5F07D89FF878CAFBF9F61D21
6470:1094400086E77E7B99F17DC4DE93B43F5D62C84CB4
6471:10945000EC0338F74963A3B07DF1D3C86C6A8F463B
6472:109460009E47FC741AAC2ABEF7C37A56857567CE40
6473:10947000F76DB49F31FD7D9B82EDE1FA3EAA477BFB
6474:10948000BFFE1CB547EAFDD41EADBF4AED3B701DC3
6475:10949000F9E7103C8F6DEEE2087A6EC7A20813C29E
6476:1094A000DB19C9B668EFC17A335FB8AF1593F9EF2E
6477:1094B000C57FBECE7213D83BB37BBC3481B113F1F0
6478:1094C0009FCF54A07F68C6A87FFF0BDCFFDD4F2E27
6479:1094D000ACB3005CF38EDA5A7BA0FFE94F2EAEB33B
6480:1094E000A19E3D140ECA0EF546FF41907496873634
6481:1094F0003D9971053B19FAB1A2EFE99F590A245F22
6482:1095000050D297C580B5A6FCC43FD302785C607585
6483:10951000FF1BF64D9E976696DE847DE6C17A2EBFD0
6484:1095200064A4F89E8D94E2B07E6599DD7D2C3EC8E2
6485:109530007E3BA53FD2FE51815362D1714457DACFB1
6486:1095400062F653B1C1F2B6CC5E760CE971473CDFEE
6487:10955000BF9A384D7206D749E8C74D3CA396229D65
6488:109560000ACE9537613BBB229AFAAE85939A509EFC
6489:109570004B6DC33D5F42CF2F8837127F162B524869
6490:109580007D887E5C1E3013FAC7FE03E1941798783D
6491:10959000CCDD8875A36549A9B9B2D0798CFAD11B05
6492:1095A000711F6D62E587A5B1283F36C981E6A180AC
6493:1095B000F535C5C661FD231644E1BA9E2BC1FA9D5F
6494:1095C00089AAE440B41539BB5AF1F9224784A308AB
6495:1095D000FDF1636A299A9CA3CA84C3F9306E46BA26
6496:1095E000ECB0C044477D774CBD00FDA28C28CAE397
6497:1095F0001629ABAF1CA67E84A341C5756CFC792DE2
6498:10960000CD63267BBE6356C97F20FF14BBA228E72B
6499:10961000576A3B3537B82E0CD64D7017D9656F9801
6500:1096200084FCFD83523BF4778C9218CACF515FE6DD
6501:109630009FE97E77B81A0680EE30D94B71BE1D26A1
6502:10964000C9BE96FAAE121CEF196354314F541EF77F
6503:1096500045C8FC334AA5296710FEECA80978AD621D
6504:10966000E4A590FB3D8BAC64272ADFCF267FA8675B
6505:10967000510AD98BCAF7A71563DB63E07E7AE5FB55
6506:10968000951574DFC0E3DFCAC5DF718A3EC5BB959F
6507:109690008B5751BF4B4AFC777CDF95ECA85CCCA381
6508:1096A000CD4CFF7AAE12ECFFADCE24F9CF1579BCCC
6509:1096B0002243E6FA6900FFA307F83E4465B6145258
6510:1096C00037372BFF54483DA86BDA1721FDB9A59712
6511:1096D00042EA43E7557E1DD25F304FAA0A1E5F7AE9
6512:1096E000209FEC6BBEA85FD2F24B458285DEA9CFEE
6513:1096F000A82A05B93C00ED03A01F8A7A45DE55E192
6514:10970000717506FC433D586AD3E577994AFBD91534
6515:10971000DD7CDFBA3CCE783AD83E54C84F707F41EA
6516:10972000B7FEDC0346B293B9D132E5AB34F82A4632
6517:10973000863EAFF95F1502CE1D0677530CE5C79C38
6518:10974000BDE87F68F06BEFD7E0AE90EF29A5EDBFE5
6519:10975000EBC0AF87170025FF4D0FC78178118780B9
6520:10976000BF41FE5937AF4B835FDC50765BF3CF2BA5
6521:10977000414F4507EB299B1487F576C3E9296DDE38
6522:10978000E1FC306DDE6576173DEFDCFAD9D1423968
6523:10979000A89F7A2A3626B8FFDA67EB43EEC79FAA5E
6524:1097A0008A0EEE6FFAAC0AEF4F57D4461BF0E34136
6525:1097B00026393CC89F3DAA82FBCF25C79C4DD89631
6526:1097C0009D746399299B71C6D384EDD4F3DE1E3357
6527:1097D000ACEB8E0C59C5B85DF33FF4F09A13781CCE
6528:1097E00072F0AA6AC5FDD31D1ED58AFEFB8E2754D2
6529:1097F0002BFA1F3B9CAC02E331679A6135FAF3CE3A
6530:109800002C5E677855E8E16FE2F9F35A7B5A717F75
6531:10981000837A11EBC2D127A8FDDA4F75E007D1AFEB
6532:10982000CA1EEC571D54BC367CDFC127BCB6E07D98
6533:10983000C21BF5ABFE8C363A1EF96C4E887C9658EE
6534:10984000EEAE0A96EF32FB9290FB9FC6A904FF8C06
6535:10985000A48743C6DDA13E12D2077F3103FD9146A6
6536:1098600013A33A598F81D7C9EAF1F8A8C0A3C366F8
6537:1098700047378619E354AA6BD38F739470FCE9AF12
6538:10988000A727F0B86823C80CB6F72470F8F475B1B0
6539:10989000FA3EC47C0B713E983909F9DC61355C01F4
6540:1098A0005797391392EEA47AD93CC3A369D0AF4E2F
6541:1098B000C8E2FDA9869D581F7B774236EFDF6AC854
6542:1098C00033821FF02B36FE4EAC07AF0D13759D0F84
6543:1098D00024D27E9816DF2886532F2EC638738F9198
6544:1098E00061FEFE1913D8BDDCC0BEB9D5CCE352ABC6
6545:1098F00089D76D3F957AF429D41B6A987B7A02F94F
6546:1099000051C52AE2EFBCDD42759D8FED2E4B44FA26
6547:10991000DF93C0F35C593BA726A17EF917BC7F56A5
6548:10992000C2C4E1DF8F75BE38CFF91D59E47F67DD12
6549:109930000CE89502F887F098AE87419840E72598A3
6550:109940003309F36C8DD1269AE79E04CE7F37DA0E69
6551:10995000AAFB8D32ACDE0EEDFD82FE0FE07B095FCF
6552:10996000FE51737063CEEE1F35773CEF237D653972
6553:10997000D78F7EACFF3B11B4AFC246FA69FFE5E377
6554:109980007BB21CE89F7E12CEF1B7D03BBAB14FC577
6555:10999000FA0DEF4D582F9191E8AE453C2C327B6F7C
6556:1099A00021FEB1AD8EC0F96FB41E78F07B2180042A
6557:1099B000FA544FE1F4D1DE0B38B5A03DF8589C03C2
6558:1099C000D1E080F7FF00F9408367000E5D5DB89637
6559:1099D00067AEFBA381F20C7512E83DE8EF3CC91CB1
6560:1099E0001E98E7A2E6AF8BBC266E45E17BA61C5E07
6561:1099F0005A628336BF6D258F737B95903CD7A4E365
6562:109A00008A7EBF83ECD654ED795D9E71AA886BA7E0
6563:109A1000EAE2DA1713849D4966C9C1798035226E5E
6564:109A2000B8DC333A0AFD4CD45132E0D5A4CA6C728A
6565:109A30004C40CE5B21EE674171BFC667E38FD9EF23
6566:109A400047B8C71F63F7915DD7E61DC82F70BC5C90
6567:109A50003ECEF132A12FE3A7D3A06FEC3632AF1A7E
6568:109A6000584F2107955DC6FFE078BBC98B75CB05C4
6569:109A7000077E99E7834BE624035383F010A68633D1
6570:109A800035482F5A336242FAB2866F61CFF3C4FC75
6571:109A9000118EE49079F6C49477A37DCFB32D27FB84
6572:109AA0001E357974C83CAC4709B1F3B028DABF9CC5
6573:109AB0000840FD0CF05A704C09B1E793E23CB862E3
6574:109AC00036F9A4A2B3FFCD32CA41E199D0EB0786A3
6575:109AD000A3CB70F863393F45FFEE1FC55FB4331465
6576:109AE0007FB115A1F88B7785E22F7161289E46B86A
6577:109AF00043F192B27C5CC8FD9B56E786F46F7EBC56
6578:109B000030647C2A18A4E07EDAD33343C6DFD23C2B
6579:109B100037A43F76C3A290F199DEA521F7B35E5D2D
6580:109B20007143F41EDFB226649C9EDEB7B6FDAF9093
6581:109B300079357A7BE0DFBF82DEE6C4507AA70AFD82
6582:109B40001AEDE4F565FD46DBD312E8234C13A15E64
6583:109B50008B6E7FF76BCC43788A55AA9FF3CC64B4A5
6584:109B60000FFD82EC92500FA5C0148634AA5FA7FAAD
6585:109B7000BB1F1B0C21FBE28989DCBE2726F27CCDB2
6586:109B8000CF4DFCDC520AF88F64870C2C102F031E7B
6587:109B900022315EA678FAC7CF60BCDC14DD97A14203
6588:109BA0007C6CC6FE4D017DB9C8AC36F6013E26C8B8
6589:109BB0005C1F829E4C4B84F93F919E30723FC26382
6590:109BC000443F22C5C23C91B9643F287F1CCDE224AA
6591:109BD000ACC78F0AE869F51A106BDF8A2C3A07F5D3
6592:109BE0001E4282FEAF2586ECE8DD9A7E5A9E49FA37
6593:109BF000E9B22DD40FBBFC401A5D3F71AF99F6FB63
6594:109C00004F883A446DFDE784DEFA53BD85DAF3F5FB
6595:109C1000F6103DB67CE3FA08F41F4F64707F51BB29
6596:109C20005E82789B88AD2CEC9AC58EF9AC7BC038EF
6597:109C30004701BE5775F7452E62E43716E3BA6B3716
6598:109C40005EB9F74DE8D719FC09DC3E7878BDCCC782
6599:109C50008CFCCFEA6F5888FF343791C7E973C5FC95
6600:109C60000BA0B1039E1600FEA3B17D775A39F227EF
6601:109C70005CA7F369B3BB19D59FCC71A7D23EE35162
6602:109C8000E6F8701780F89D4495E09CC75CB45FFFD0
6603:109C9000D1BDAB2270DCC07CDA3CC028E86F7C1CF4
6604:109CA000ED312660DC7F1BAF6F80F759F0BAEB9E79
6605:109CB0009427D10E69EFFB88B92F7C88FBDDCC415E
6606:109CC000F36AF3331613A29F762C5FF9692CBC6FED
6607:109CD000CD0103E513D6749829EEEA5FF1D7AD2FD5
6608:109CE000C2FDFB52FA6E42BBFCC98A6FC6203FDC44
6609:109CF000BD01F410ACB130CAFD7062509C72E281BB
6610:109D00002B11781FECEBA617D1386E36537DEF2759
6611:109D10002B368F09F6471F4D2CAAC5E7D8E41B3B0D
6612:109D20006F58F27A6622D563097E7A58F0D39AD7B3
6613:109D3000C6921FB52662809F787F13AFEFD0D6F111
6614:109D4000A1E0C715AF7F5D107CCE7407F0913A8615
6615:109D5000EF6BA920533B7B2EE7E0FD57147713C22E
6616:109D6000D779F57424F677BEF737829FCDBB31786B
6617:109D700051063D0581FD65EDDCE5C2F6D83CA43B0E
6618:109D8000C85933CEBFE837AF5DF81DE2A763F3A62D
6619:109D9000EFE3981B3C7FC9847D71083C807DA1F86E
6620:109DA000A09F85F3731D428F2AB8839E86E7991C76
6621:109DB0002AF1B3931DC27D97C62E03C3BA9548DC22
6622:109DC000B409CAB345CA06CD08392D49A09F855E9E
6623:109DD0007925F1E49D4DE4E787FA3DF96FAF08F18D
6624:109DE000775CF08FFC9D97DC8D9807BAAEDFE3338C
6625:109DF0002C3145DDB8FF0381B0532A105B38F06B7E
6626:109E00004B14FB22420F77A21C61FD3FCE85F97AED
6627:109E10005F383F670CA602F5F80F604DF8B0294592
6628:109E2000B4D2C50C0BE8C5BD897F78E669D093969E
6629:109E300074BE5EEC37E2DFDD9CDF06FCABB7C7919A
6630:109E40009E62DFC2DB100F225FA1A7533EC8078BC3
6631:109E50000D9233F1BC6FFFDF22314FBB35467D1FC2
6632:109E6000E9E03F20D33E4D98D2678A1E222E7B1315
6633:109E7000F59E89FB4D546FDEC6F38116D5C9300EB1
6634:109E800008B3DB27049FB36B17FA6ED5FE4F4699D4
6635:109E9000800E170C3D91D9307FCDAE1D91E8C6DF05
6636:109EA0006B747F8A7CB7F2C40705763ACFB671141B
6637:109EB0009D03F08DA6BA83F10AF328B983E1A8DBEC
6638:109EC000904BC6B8760325E3D9F8F6BC87501FD56A
6639:109ED000F9F83A716E2CFCCB6C63D4BFD8D61883DA
6640:109EE000F3D5FDB62319E567733C8F135FBF3A8E38
6641:109EF0003FAF3005C77F99182DF8D96BC03863B3D1
6642:109F0000884F2E5E35D038EDFDE3DB8A643BF043AD
6643:109F1000B6AF792FC543ED6615E91AF60AE37868FE
6644:109F20000F2339AFEB9CC1309FDF1FCD1C12DCDF4C
6645:109F30001AEEFF039D33EB30AB981F0DB337B31808
6646:109F4000987FABD80FCD048EC2F34ADA75ED7D61F0
6647:109F5000ED3FC55802F981F2B4614A33BBCD168C8E
6648:109F6000E708C2733CF2533CBEC767C0FC88FF16CB
6649:109F7000C65E26B80270327AAF066726F9735B4D6B
6650:109F8000FEB3787E05E0B223FD33198793B58F5574
6651:109F900031BE0FB33B691D6176D5E19106C355977C
6652:109FA000C3BC68BF7FBC960DC82BCA6F5D78A06F1D
6653:109FB0000119D83A9A09F9B63F5B3A2DB80F8A646D
6654:109FC00072E0F9711B629E6D1A49718347C638169B
6655:109FD000DA88185CA7CACF3B636A2897E301F7C504
6656:109FE000AD167E7F603CF0B70DFB363ECE1165B7F7
6657:109FF000CE94484E28AF572BE4FD31C977F67690C2
6658:10A00000D3BFF8F6E6A8004BCDBB7B884F571ADAD2
6659:10A010005F1C0FF7375ADCF94980CFB74E1AE81C9E
6660:10A02000E99F5E0BF35662FCB87B63827308F9D03C
6661:10A03000CFFFC3E36B9F4F41FAEF9654CC9BF61BC7
6662:10A04000FDA310DEDAF6CF4D548FD0768AEA938ED8
6663:10A0500024B99DF89EC96D0DB46F3C8535D3BE7192
6664:10A0600096387FDD92C4F5C7E563635E6E08C2FF74
6665:10A070008349DC0F637EF7CD2837ED423E3BD12F7D
6666:10A08000817697F08F7675DD9DA606E5FD1AD8DE00
6667:10A0900014C4F75AF636B5DAF57E2F3FCF98F5910E
6668:10A0A000E53E6710FFB993B89FE716EFF327B9179E
6669:10A0B00024A1DC769D3645AA785EA56514DA911652
6670:10A0C000F09FEC43E065406E757254A7F84D38BEC2
6671:10A0D000EE1C3F770A746EC2FAFFCD1FB58D5B028E
6672:10A0E000D77701AEB1DED373C24C758FBB8CAE1483
6673:10A0F0001CDFF0E15739A8B72A1069F0BFAF3A5614
6674:10A10000DE8C7803BE2F0E47F9DACE488F69F299BC
6675:10A110008DF209CF6723DFE7633F93F4F056532FA7
6676:10A120003FF7B98B9FFB04BE273900BEB7A39F90B2
6677:10A130006D0739A0E7C7927C6FED35D0F9540FE871
6678:10A14000F15BA85F5C85FDADBDA576926FCCC3E7E2
6679:10A15000A29CFAF6D23C2D108320E924E60AF61FD1
6680:10A16000DB1323898F35FD783091EBFF960C350A90
6681:10A17000EBFFADB21C2217417690F7859DECDD50C8
6682:10A18000FCEC0BD3D0DE09BB20FC27769CEBF94717
6683:10A1900085AD5AF34EE1EC2DB0CE3587E5817A6E70
6684:10A1A000F4577D824FF60AFF15ED849AC7EB67F0EE
6685:10A1B000FAC40DBCCEB5C0B9BA04CB38265734EFBB
6686:10A1C000C3B6D0D55282678EA72DECDDC7CF1EF364
6687:10A1D000F3E3AD7BEFC8C27DEAFE136686FB24ADD8
6688:10A1E0007FF3FFE175C0C3773B01FF43D825580ECD
6689:10A1F000F11F58EA149634F87EBFA4E98FF9952828
6690:10A200006F175BE5401FEC612D3038F67F9D54F5EC
6691:10A21000AC07004B1BE17C1D59A230D94D6DFF915D
6692:10A22000BF25A02DD8758CFB4DAD266716F24FEBE0
6693:10A23000E8D0F3FA5AFB62123FE79C6F6643E625CB
6694:10A240000F09BB37C6C39E413EAA6D95ED5EA0FBCC
6695:10A250008556D96902FFE6ACD39D806765CE31CFC4
6696:10A2600082A968E745DCA87D4F6519FA2760A71E1B
6697:10A270007C61501EDF807CF450BBC47E066B5EFEAA
6698:10A28000D2D0FB0A35629E87DB36EE4F013AAE78BC
6699:10A2900025745C8DA813ABD1F92F8792447C98C6A6
6700:10A2A000D2D02F01FE21BD605458B719F8F5C16412
6701:10A2B0007707C61B9BC5770C407F921C7608BEDCD7
6702:10A2C0002AEA04FC5B25DAD7CB7CD52B1BE0F942CC
6703:10A2D000C52BA39D62D0E23EC164A7BB1CF10BEB72
6704:10A2E0003E86FB35CB851E5CAEF9655EBE9F01E602
6705:10A2F00096FCB229CCDB1889EB7E5572F854FC8EA3
6706:10A30000C8A03A5C5A779D5877CD8623FB318C5B89
6707:10A31000D5123AAE4EACBB4EB76E6D5FFBCF49BAAD
6708:10A3200073C837B86FF16723F7133E10F368F7CDA2
6709:10A3300023B83EAC05F0906E355ED9EBE57E9D0D01
6710:10A34000BFC373BF80F77E41EF3AE633A5C0B8556F
6711:10A350002FF075B26743EB3F1F6C7DC484F1959E6F
6712:10A360002F966F31923F0A8833A1BFA8E78B156201
6713:10A37000DD2B74EBAE754B3AB8B89F3C18AE960522
6714:10A3800048D7555B8C0CEB11F5702D6B59528E7CB8
6715:10A3900036985F395D5688F90270AEA6737C370A2D
6716:10A3A000E7A811822FC7B17144978AD81BA28BDE10
6717:10A3B0008FDDBE7F9C15E5FB72F7688ADF35BAEB4F
6718:10A3C0009F2F177EF08C0D8CDA0B6D25D6F118A718
6719:10A3D000F4181C924AF156E478C0475E87CC2AA153
6720:10A3E000DFDF9EB6DE0378CF3D9C5F85F17CDE61CA
6721:10A3F000039D77DBD99D4FFBC07907D263D3281F1C
6722:10A40000EDA0EFCDC03C643FFB7B72D7E3B980FE8B
6723:10A410009ED27C9C57827168E773851D68E8C9B538
6724:10A42000069FEF2E18C1E3F5A7923EFB31FAE13308
6725:10A43000B61BE97CC30CA3FF3DAC9FDAD9ADD0BEFF
6726:10A4400075CDE1A56BC390AEAF49B46FBDBF774D7D
6727:10A45000DC62E4AB76A31DF7A1FBDBFF6D2FDEF71B
6728:10A460006C91E87B12751D65595BA19FBB31CF11C3
6729:10A470007CDE2B375A25F8D8082BC5C3336E3292B1
6730:10A480005D3C9F6CFD25FA372B9C1B498ECFEFD985
6731:10A4900069A2FAB9AD1243D3BF3F69DF1B888FF3BE
6732:10A4A0006F1E31A1935DD27AC4D4F777ECFD052FEE
6733:10A4B00004FE1407379B304E59B551EBF799904E77
6734:10A4C0002EE1FFD4BE728AFA2BDA24D2332B5E92AD
6735:10A4D000E93CFBBE8EB74CC8C7B55B2496981A748E
6736:10A4E0007F8314F21D84A58CF3C152A1675632EF0D
6737:10A4F00053C9306E6533AF23604F87D6E5AEDC328B
6738:10A5000087BEDBB4AC79687DF3B0E0EB87301EBC6E
6739:10A5100015BF83143AEE61EDBB5C3A7E7E5CE3E7E7
6740:10A520004C9689FCFC55911A950DD7BF3AB2E2E6DC
6741:10A53000A1CEB1F7083BACD9C1CB3E03D911FDB8D0
6742:10A540008B6D5708DEBA9ECB26B483E5ED9708EFF6
6743:10A5500095ED5D54C7711773D7209EEE6AB7DA5137
6744:10A560008E2BFBB85E9AD96EF67A25BCDFD284F4C6
6745:10A57000ECEFE4758B9E3D12F92F9ABE7A48E0EF1E
6746:10A580002181BF874041A7E4A21FCBE3DE8733369A
6747:10A59000EE8F81FBB5E27ACD817D91E8EFCD6497B6
6748:10A5A000EE457AC07B18BE87BD148AE73B1987E366
6749:10A5B000CE2DBCDE596FAFFA4764CDA6FC23C49DF7
6750:10A5C000084FCD96503CD7EAE2ED7523B87DDEA466
6751:10A5D000C373A59F59B3110E5576786974AF82EF96
6752:10A5E000EDCE9128BFDAADA6450DB5FFA8B5EF09B0
6753:10A5F000BF59EBCF16E7AB5BECCDB6E038D894CCC7
6754:10A60000EDFF8A29B207E934103FA4EFCB510D8149
6755:10A61000F801E286DF8C88E771041674BC3B526651
6756:10A62000717181F8E18749EB2B73A15FB785CBF995
6757:10A63000C5C9301F7EDF4B61E45FD66D31D339C0B1
6758:10A640003AA03BC509EDFC1C83AB5D2A437A83FF2E
6759:10A65000FDEE888978AE8619E360DD73DA389FCF26
6760:10A6600029BD447C72209DAFF7B2A2260EE58F6B08
6761:10A670007E389EC35283CF3F805CE2F8DA765E0F6D
6762:10A68000D4BAF7EB51A9A8D73AFE3A6A09B45746AB
6763:10A69000F0F56B7E9E1FFCBCD1DCCF3986FEE783D4
6764:10A6A0009ADCD8F93EDA83C2CE30A989F8BBD6D875
6765:10A6B000F2760CFA4D5BF9BE3DDB6DC46F9CB18642
6766:10A6C0000F5E6F8A81755F7C5DA27A347CFE09E043
6767:10A6D000B38B4B5B4EA31FFDD5560BF98F0F828FAB
6768:10A6E000383D77B03C6A72AB7D77AA81AD257F7229
6769:10A6F0002D6BA27695E0E38B6D8D26CA9B79839EA8
6770:10A700001F3DD8EF58A5E33B537228BF357C104E50
6771:10A71000FE5FFF01D98EFB2780A7FF4E0EC687F094
6772:10A720002F5AF786113DFB8FD8C85EFC49F0D979C6
6773:10A7300091376E982CD3FA0D53789BD5F9D668A42F
6774:10A740001FE21BEBDE3777BE358E9FA7F612DE5772
6775:10A75000BE8A49F120385BAC94DBD3FA0D1F2CA2E2
6776:10A76000EFF0D4ED19806B8C292E00D770FC2F49A7
6777:10A770003C1E3448A1F160DD6ED9155CEF05EBB9E4
6778:10A780000FF54F929003A6F813D02F1999AC92FDB4
6779:10A790006A68E7F43474F016DEBF80E73B8CF4FEA1
6780:10A7A00041F78B3D3578FFAB542BDF4FBEEAA9C490
6781:10A7B000FE7747CB544FF9DD0F568C0DD69B0CE13D
6782:10A7C000047AD619FD0914371E31107C75472E27DF
6783:10A7D000A4DB501F6D2CB567A3DEE1FA6EFF68EBBA
6784:10A7E00072E4630FBE373130CF6BC2DE325C6F1262
6785:10A7F0007A152FF079C57AD7B2B9223EE67C942D2E
6786:10A80000FC3D882B26264F1C1C57DCA83F09F6E090
6787:10A81000E86209EB89140FC6B53B8F737DD0D0F188
6788:10A82000D0A7C8E7759F98A9BEEABB9D0F8DA53A32
6789:10A830005BB7FB56F42BBEEA7CF856CAF3496B09AA
6790:10A840002E0FC29784FECB8709580FBAAAE3C30420
6791:10A85000B2AFBB26AEF744A09F927B275E07BF81B5
6792:10A86000F80FFC17E2BF9D3DF99ABF62C579571DED
6793:10A87000505C889F5507F20F55A21F71B8381FD53D
6794:10A88000B874389FFC953CF4576C01FF455B4F65ED
6795:10A8900032AF77E9EF0AA33C81C44673FE61E92138
6796:10A8A000FC53D3FA0ED9F59A3639A46E507BCE9D5F
6797:10A8B000ACF07D7E8D7F5A2427F1C776DED6B4EDCD
6798:10A8C000A4F5AD34B610BD1BB618F9FDADBCD5EA84
6799:10A8D000AA3D2CC683F8388497800E334D5EFA6EFD
6800:10A8E000C5C154EEBFEBE9F15932CF631C3CE1BE68
6801:10A8F00019F9E560917BAC7D08FBE061C53C3E95B4
6802:10A9000004BE5BF97925FDB853C93C8E8F8C0D3D93
6803:10A910003F3A605F9239FFCC340DFD3DBD9F69F237
6804:10A92000C4D83306E08BA39546FB3AE1B78F08FA0B
6805:10A930005E42D55D46F20F8E32FB3B5867384BD3F3
6806:10A94000AF93B95DD5F2DDAE0D2ADFD7197CAE919C
6807:10A95000F4E47C6D3EFD7969E1D7CCD7F935EB3570
6808:10A96000FD37868D41FDD722CEB9ADC90CF306E780
6809:10A97000A3F4ED7EB18F81E775B06DC8FC98F23617
6810:10A9800007BB4EBC41756627C2D8689E97A3FCF5ED
6811:10A99000AA61F2D70D03F2382F84BF347A5C10DF3E
6812:10A9A00055D1D3E30D81776D9F2D5CECB39D56DCC3
6813:10A9B0006F24535DD67913FF8E9A9FE2AB864CEEDF
6814:10A9C0001F5D2893685F1CE01C650ED2EB1746F0F4
6815:10A9D000B8EABB0B24CA9B76E1788C9F5A24AAABB9
6816:10A9E0005EE5EB35211F8D695DF224C9AB871D63E0
6817:10A9F00041DFA9986DE17671806EDABA07EC568C6A
6818:10AA000087EBE1386A713CDAC159C2EEE9CF218D9A
6819:10AA100065BDE51857563B2507EEDBEBE93D77E1D1
6820:10AA20008477E2FF013A9F4B761F21FDD67B7901A7
6821:10AA3000E63F0F667E3E0AED65ED307CFB3BC1B71D
6822:10AA4000DAF7591C63D546FC3EC98F12DD9F207E84
6823:10AA5000FB0DDF468E63F87CDF7FAF91902E8CE894
6824:10AA6000319C9C9C12F39D4A16DF258CE3FB24CB82
6825:10AA7000B18FF26AF48EA4FC42F68DED4B35EC7E7C
6826:10AA80003707F5D6C5AE0339A6203A9E5F03F28E8E
6827:10AA9000F6A3635F826A0BE63303F1972469FCA691
6828:10AAA00008BB18CA77E791EFB2B1FD30321DF5EE61
6829:10AAB000F6A391B7E07CBB783BC09FED328D8378E5
6830:10AAC00067CCFC8860F89E24F82EB4F07918EB1B54
6831:10AAD00053353EF87EE3707C6B4CE1F584217CAB12
6832:10AAE000ADB705BF8783FE7DA799BE8783F9E6E8EA
6833:10AAF00020B9484DE1F230497CFF660AF3D0F700F7
6834:10AB00002789EFE04C51984F89C17D2E9FCCF76586
6835:10AB1000F9798602C1BF93145F17D6394C11FB3205
6836:10AB200085AC97C64D677E6A9DCC4EE7148A9983A3
6837:10AB3000DAC916DF9D9876C96E69A1FA3F5F821265
6838:10AB40007DD622CE430C41B7C0FA15FAEE0DF1A521
6839:10AB50008CE76186FE6E4A650A9773FA3807D2F76A
6840:10AB600002A3FC147EDF0C5F325561155877749B8D
6841:10AB7000C22CE100EFF6B70D24BF9D7DAA17EB4074
6842:10AB80001DB1E2B92F18D5BB4E7272F944D382754C
6843:10AB900012DA7AF5782884F9303F364981C892F084
6844:10ABA000E8A3F7DDCEF8398D22A6D207566EC78FFF
6845:10ABB00027935EF7539C54027112EA7583C543F8DC
6846:10ABC00028C3E4CA44BEBF1109F314364BEC38EE77
6847:10ABD00057A4F1F56AF3170223E0B9BD32B15E4C18
6848:10ABE000811E8FE1FB1E9154385C6AE7DF094AA0A1
6849:10ABF000EF04DD285EFB13F8772123EFF75FFC7E7F
6850:10AC00007E60FFC781DF0D8A0C7C8FD281E74C30DC
6851:10AC10007FE753CE07FBCD77A72CAD4E9918A897A9
6852:10AC2000636EA6A25FA1AF9743F49D0B3ADFACD54C
6853:10AC30007BBCEA9DABE2B9B98571163A4F9B6B19A3
6854:10AC40009587762B23D15D9D42751F5B6EA14914BC
6855:10AC5000EF44574480CFADCC3919F11CA8D7E3DFBE
6856:10AC60004F1A38CF94C0E8FC9FD5CCEB199F01B99F
6857:10AC7000C0EF178154A958D7C29E28A1FAC7A7A22E
6858:10AC80002D0E3C87604678AD01781B2DA2EE47570C
6859:10AC900077D96833D0F7381B59389DE79E15E6FE03
6860:10ACA0001EAEFFB188623A2F9DB56D5A12F983B07E
6861:10ACB000DE69DA7A0D83EB10B1FE0F9FD3D7FF69FF
6862:10ACC000EBC2E3EBF85EBBC097B64EBB76DEC7A91E
6863:10ACD000849CF7D1D6FF4C385FA71177E2D3E859AF
6864:10ACE00015F5837E7D1A3FFC3FDDFB356D605C0012
6865:10ACF00000000000000000001F8B080000000000A2
6866:10AD0000000B7B2ACBC0F0A31E818565181826F1A5
6867:10AD1000A18AD112CFE066607804C42C3C0C0C856B
6868:10AD2000407B23807424101F01E2A340ACC2CBC03F
6869:10AD3000100BC471403C07C89F0BC4A5409C05750F
6870:10AD4000632B0B03433B107702713710EB3033302A
6871:10AD5000E832136F7FBE0803C31309045F51126802
6872:10AD6000A734FDFC3FD8F00A7DFADA276DC0C0B0E9
6873:10AD7000D502C15703B2B759A0AAD96E81DF8C1D85
6874:10AD800068F23BD1F8BBF0E83FAB87CAB7D540E5E6
6875:10AD90004B693130782285899D067EB7A0E30AA0F1
6876:10ADA000DE4A200600FB72DB43680300000000005F
6877:10ADB00000000000000000001F8B080000000000E1
6878:10ADC000000BE57D0B7854D5B5F03E731EF3C8CC6F
6879:10ADD000641242483084092FA30D3821210D14DB61
6880:10ADE0008140448A1AD42A54D4098F24E435011F9F
6881:10ADF000176BDB0C04232060B058A2463B4150F097
6882:10AE0000061D6890200107B034F4A206AFF5D1F614
6883:10AE10007A8352400824E20BBDB6FE7BADBD4FE6FF
6884:10AE20009C9319A07FFBFFB7FFFDE3D71EF639FB0C
6885:10AE3000B1F67AEDB5D65E7B8F6C3213692821DFCF
6886:10AE4000C2DF0F089926114206469EF6D7889BC49A
6887:10AE500013529F4DCB4984A48D2041221032B986D4
6888:10AE6000967309597B27099A3308D97FC484DF5721
6889:10AE7000FA5899B60B99AEA1DF47B2F74F64D27674
6890:10AE8000F4FD1317446C179841829B693981D0DE19
6891:10AE900086133A840F9F933D0DD6D1B47ED39D2661
6892:10AEA000627613F2381D868C27C441BC56429BAE95
6893:10AEB0001CC1FA7B6C86E93951808FE19479B4BC6E
6894:10AEC0006A4A49DE2A5A5A2D33B81A67973C17A0A6
6895:10AED000FDBB4CC3711EB4DE13765AEFD1F74AC9DD
6896:10AEE0002ADA6EC31C93509245EB352BB3825991ED
6897:10AEF000F9ABCF3944E2ED0266533E3CBDFC195636
6898:10AF0000E0F98B89261C674D0DC307ADA798520841
6899:10AF100069ED3C60F1D1FED654B61E2DA4DF1F1999
6900:10AF200061F2500C92473A0F58AFA4E307724D9E5E
6901:10AF300091B4769A14165CF6C878E309057C1CADCA
6902:10AF4000E7D96171DBFBD7A7FD4E8279AFA67817F1
6903:10AF50003322EDC6029CB4DD1A4AB2101DF797B237
6904:10AF6000E7308CFBCB1B12850089D4BB1E80847A12
6905:10AF7000734C244CEB11A9D742E838AB26BE6519B7
6906:10AF800049EBAF2A32C124C81A8FFADD6325D0DF1E
6907:10AF9000D4518747005DAFA7DF611E598FCD8279FD
6908:10AFA0003F3A452180FF5F0AB41E457163B1F24309
6909:10AFB00080CF51435CF09E3EBDD1F0DA2658100E92
6910:10AFC000B27A0321790440C0BF55DEE08A61C05FD8
6911:10AFD000B9C403E5340F6D6FEFDFBE4B30235D1A4C
6912:10AFE000E5402AE02F16FD46707CAECA5C6C057AFF
6913:10AFF00010D29052349A90F580271854F2B9673ADB
6914:10B0000022F557080C3FEB64E215E8FCE27295E08C
6915:10B01000528A6753966B36CCD7EE53C875B4BC5280
6916:10B0200008A48A4097D10AD9EC46BEB08EA4E53573
6917:10B0300057257A80FFEA85508A04DF6FA0DF699781
6918:10B04000078AC6CE06FE6CF228C8CF947F0E03BED8
6919:10B05000D7F812C92A377EEFC4F6F6112E33628272
6920:10B06000C243F13280F212E035FBA6FAEB87037D92
6921:10B07000C6995C40A155C224F73C909F048B0BC637
6922:10B0800097C7DD8CF49307260A4443EF9F03BD293D
6923:10B090009ED6BA8B7E0ECFA7723F4C1849EBAFCE2F
6924:10B0A0007EB911E8F4F4FD16A4DFD3E33A17815C0E
6925:10B0B0003D7121E73D1FCAA5E2D94CFB7926FB442F
6926:10B0C00006A1033E36EDC304C0DF90110DF7102733
6927:10B0D0007DCEE8AD2563287CA4A1687E06F2897048
6928:10B0E0000BC5EB90250A715B182DBF25F09D7843A9
6929:10B0F00059AC6CA7F319C2E9DCDAF996A518FA9BEA
6930:10B1000043C2A39CF8DE929C18D13343724938990C
6931:10B11000F6FFC4824328E74F5F9DEC61729E82FC7C
6932:10B1200092CEFB4983FA54BFA45848208E3E8774C0
6933:10B13000F4DE0C700DC93C3107E0DCFFFA2101E8B8
6934:10B14000F6CC986437E8A3045F27E9A2741F92F550
6935:10B15000CE8350CF610FA6146561FDBF603B03FC39
6936:10B160002D6EEF26C0DB36A1E630D027906DF23091
6937:10B170007A333DB8FADEE420E89121B63FCD14875A
6938:10B18000211F10924CE1731194937A216C190EEDEA
6939:10B190001E60ED8692A000781E921958243AA1BE36
6940:10B1A0004F2872F41FB7153422C807E574E0D7EDB5
6941:10B1B0000A292F8A2207AF7279AE17C82CE46722BA
6942:10B1C000FD15F8666802E31BB5FC0CC043C7DDFE45
6943:10B1D0005AE20FB3283CBF5A322C5BA4F0AC857600
6944:10B1E00051E4660D97035B07090814AFFB7FF73B3B
6945:10B1F0002BE06DBB899441FD4999214B17A72BD0BA
6946:10B20000630161FD37656DB4A0BE103291EF16E4A5
6947:10B210002B5EEB1890BF65828FB64F7131BDECF09D
6948:10B220002841D0CB8E948060A2F0B8B3886B6306BF
6949:10B23000EB2E40F13717FE018C2EB1FAABD7240468
6950:10B2400057D1EF73B3A8A001DE28AE4C74DCF984AB
6951:10B25000CD73AEA77E11D08F902213E073958BD162
6952:10B26000A709C6A153694A63FDACB98F0497011FB2
6953:10B27000B958FB11D084D26D44EECBFF22D07ED3DF
6954:10B28000783B907B68179712B498683B778D89203C
6955:10B290007C52F8B000741F9DEC06789A523CFF3E39
6956:10B2A00003E09F257936D2CF23000EDA4F538DC9A4
6957:10B2B0008BFA225769063DBDCACBF4BC8AAF0C3E5F
6958:10B2C0006E9A272CD0B9930CAA27114FDEB0D50562
6959:10B2D000E52C064F462E9B571FFCA395E032DA382B
6960:10B2E000CD1226504FC54309EFAF84CFC39E125CE9
6961:10B2F0002101DCB90C6EBA2E233C69594A33C8418E
6962:10B300005A0AEBCF4DF1A3E21DE0B2A970E5D2FAE3
6963:10B31000A0873D4A33B0828DC35792C5E0D97FE400
6964:10B32000AD0E81F5877265E3F0DAF8FC09C09BCCBD
6965:10B33000F53AEDAF450E0B22AD1F1C47DC1BD9685B
6966:10B340006E292FF2FDB11A8A075AB0F371C87A3309
6967:10B35000CA037D15F896F2C1BC065ACE8CC8C7C880
6968:10B3600015669DBCD8F9BC49039323CA366168971A
6969:10B370004158D904653A8F924CBD9C118FA64CE17F
6970:10B380007000BF53FDB374BCC2F8E72A66C710A2B1
6971:10B39000A9077C3ECEFDEC6AFCAEE0BA9EFE5345AA
6972:10B3A00007DF909AE4C922E8938E276F36015FDDAC
6973:10B3B0004B4C623CF2B3D0A7BFE8783B1687AD3068
6974:10B3C000495B475122E02DBD2671B20278ECF06155
6975:10B3D000D9D651E3C5272C4D6309194C34E3648059
6976:10B3E0007E7555B450BC921A2504FA7A9C164EFA12
6977:10B3F0003DFDB5869940AF87171D4A05F94D36B416
6978:10B400001F631A86723AE4355A0BC73FF133A8BF5F
6979:10B4100092EB131B403C169FAFC173889DEA59AA5B
6980:10B42000A7D3298295B1117DB1EAAA77B27D76CEF4
6981:10B430003F89F80CC3D3A85734F5AFE2F503C245F2
6982:10B44000EB9DC07A2A3CC6EFE70413EA2907D89996
6983:10B4500014BF8F12D76C5C973D265C17E3F8FB9006
6984:10B46000E7C064A4678878840CD0B77F356BF9E0B7
6985:10B4700027F012F4AD14423951D26D681F52398E43
6986:10B480008375AF49AA2983F7A1341B01BD7060EA17
6987:10B490002101F099D6E61B0A72A8DAB9933DA114EE
6988:10B4A00078FFC861DF95289F31EC46D54E34CEE752
6989:10B4B0008A6B97A13E18EAEBED80F5DE5E2979AE46
6990:10B4C00003FEF251B8ECA827DDE4BB147E4F6029DF
6991:10B4D000E859B78F9607D167257F96B1EF2B6BCBD5
6992:10B4E000728E4B917E578EA0F628D58BEB3BD75BA7
6993:10B4F0006E003BA3C6E406BE5DE379CBE2B54379BB
6994:10B50000F200C0736B916AF78505182FED6D2FDA85
6995:10B5100079E35C8A0B94D6687338D5A5592F9AA61F
6996:10B52000BE3316E020B75222A6C6A6239D2FF2599D
6997:10B53000ACF504603169D691FD993B707D799D5CD5
6998:10B54000857451D715751DC11EA97E99C7E5E811EF
6999:10B5500077C822A0BEA2B24BE9338FEB113BD79B39
7000:10B56000540F333DC7D793358B92713D51F527D892
7001:10B57000D6A024E6717DBB26FBB9841B284C76D06F
7002:10B58000B3A09752C864587F47829E01FD240504EA
7003:10B5900018AF699C8BACC2754CAF4F47D6303DF8A5
7004:10B5A000480A417EA2EB5033AC774D69A114E8A75D
7005:10B5B000A9E680E0D3AC9FEA7AE7A8E924A007E7F0
7006:10B5C000E6B2756E6E161BEF0F80A0710C5ED0ABED
7007:10B5D000C675EF171377A0B28CE3F69611FF828938
7008:10B5E000D9818FCE780BF1B866FE63F8240D1BB0BD
7009:10B5F000BF140BA3C1CACC03F87EB5CF340DECEE5B
7010:10B60000F552E78A1114FEF5D3E62A01FA7DB587D3
7011:10B61000F95DAB26CE7D0ED635B3496170D594A1C8
7012:10B62000BD1AC7E1DA007DA39FA8A05F74DF9D1B50
7013:10B63000570CA3FDA4503F467043A5A0C54CBFDBEB
7014:10B6400081A6A0BF7D6106BF874C2651E0FF0FC1D8
7015:10B65000C6FC505F67C748A4A7C905F0C6797A2D14
7016:10B66000E027BAA91FE67603BC6EEB6884D7E45ADC
7017:10B67000EA8EB4FF3DF717EE82851FECFBD9EF4C45
7018:10B6800003F95A7727F3CB8CF0DF3729D861C271E1
7019:10B6900008BA758E18789D031A0CF48F27887039B4
7020:10B6A00032195CC70546AF473B275F8F7E52117D3D
7021:10B6B0004F3B7AAC739815E4DB68EF3D1DF74136DC
7022:10B6C000DA3B8675E652E521067D3FDA1C9A8EFC50
7023:10B6D000B6CD847A8A10A6E70462727F3B1C1611ED
7024:10B6E0000617B21ED5DFCBE5F0ECF9B4FEF29D767D
7025:10B6F00002F852F9218DF7B9AA86F24194797708B8
7026:10B70000622CBA333B83D3BD13C61B7869FA5369E5
7027:10B71000B682DD160AD60F2E07FFA386F9BBA1F06D
7028:10B7200001D43F69536E433F654B73F2ECF9C05748
7029:10B73000995E0FA0438507EC93687EE27493E5A2BF
7030:10B74000FE7B2C3DDC58B91CFDDEC6CEE8F39F68BD
7031:10B7500062FE7688EA494F56ECF1F34CCC8E4E30BF
7032:10B7600071BE9B7A2845BB9EA9EBAABACE0E914822
7033:10B7700040D4AC87B772FC19D74D22355846313EBC
7034:10B7800047FFB1713E8B436C9868C2F88ACAE7B430
7035:10B790005E0AE095CE03ED39CA8741B0E71E250D5C
7036:10B7A000283701DA7E33E90FF79DC47459F39BC043
7037:10B7B000E7D7371EF7AFEFE2FA6A5DF6FD56E88A83
7038:10B7C0008E9702FCE177323D59E560766CC14E39C7
7039:10B7D000FC030A4755B3807696699F15E13CB7890B
7040:10B7E0009669D7618782F5CFBA2C58F69B3BD77EF6
7041:10B7F0008F967B778A04EDC84C9B09F8F504E757D0
7042:10B80000924BCB600F5B59B1AA79FF5DD05F599B1A
7043:10B81000995869FF55BB4B6FFC1E2D9776C804AA3B
7044:10B82000546D5EAA0CA6E585412104E59EC974A16C
7045:10B8300002BC242A41F0DB7B9C9DC93FA2F33E5D04
7046:10B840006B216E0A4A9DA333F9568A8FF2E0F642C5
7047:10B850006857DE228046A4F3D87C2815E6B555F05B
7048:10B86000807F5FB1254E670F9EA053F901FDBE9802
7049:10B87000CE13E4B2943414C23A57B5799DE2D6C4DB
7050:10B880001F4ED7BA701CB55CB5958E43DB55BF28EB
7051:10B8900078608AD526E2033D746EB775D6B3769884
7052:10B8A000DF52659403E6F5B002F54A83C52F5BDDF0
7053:10B8B000005FB35248BF9737352B10DFF29BC9DDCD
7054:10B8C000E0E7566C19A087AB5144795D9C60D908BC
7055:10B8D000FA9CD8BD29378FEE4FE7D3B554C78E8A6F
7056:10B8E00094CB411F221F0695999AFA43C504E4D7C9
7057:10B8F0008A2DA2DECEE6EB7FE028A37F60AF03E3D4
7058:10B900007E2AFD16737F59A5DFE2044E4FA9372F1B
7059:10B910001A3C6B811E149E06C0177DAEE6F03927D7
7060:10B9200092491077717A894B88C2D7C667834C8A4F
7061:10B930008175FF75D9CC49522ABA0F8B20F2E45A8F
7062:10B940003E7BD2145AFEBDA968B309F587C70D72B4
7063:10B95000A4FAD9CF98985CD6A72A88BF86A979CFB0
7064:10B96000B2F804C175AF616AC9736017D0F6DB4CD9
7065:10B970002887B4FDE8D8ED5D85F9BAF6AEC232B5D8
7066:10B98000FD4E6C6FB978FB86C209FAF10BCBD5F688
7067:10B990007B117EFBC5E1775D37513FFE7595D8DEA3
7068:10B9A0006F66F4EA4DB0A05DB3DCEAF14ACC8E0AD2
7069:10B9B000C37B2971D446A827AAFC403ABD607FDB2F
7070:10B9C0005B12C6AE225ABE98FC3AC0E1A0D2A2E5F4
7071:10B9D0008BF87C9B8E1F13BC89BA32EDC975E23B94
7072:10B9E000BC0C83382D088F3258417D3169B005E198
7073:10B9F000BD7F9F15CBF74F60F0DE3FD88E72866B10
7074:10BA00000BA5E3FD8AEF1AADDD0A2B138492DE103D
7075:10BA10007D1F027E23EFDD26786F13490DEA673321
7076:10BA2000417DF47046DEB3010D7E560CA1F4A5E510
7077:10BA3000B360FF0C8CE0F5E1212529C59A71EA87F6
7078:10BA400028B33666B1F7F3EC305E510FE0C1AFF4C6
7079:10BA50008E02BBD2388E7958BE6E1C4B7A198EF38B
7080:10BA6000B5611C737A99611CCBAC8DFC3D1FE71B43
7081:10BA70009857AC711E1E36413F9FF4721CC72C1A9A
7082:10BA8000E6935E6E18C7C6E643DFF371ACE2C5E627
7083:10BA9000337CA27E3E432B719C2451D1C5ADCC4357
7084:10BAA0002B0DE3D8711C780FE39034E6DF28E6DE37
7085:10BAB00012A4FFAB5602F6B462F63D0FFD923F5A58
7086:10BAC00009EA13371D7710E89544DC2FF80F53224D
7087:10BAD000CEE70B1BA5BF5D4BE7806A17A0BDB38007
7088:10BAE000834882F5E89F57731E9DDF32337D293CE2
7089:10BAF000DB0A528AC1CF5EEFF040FCF45C5B81321E
7090:10BB00002F8A5DB0A0413ED1A5E35FAEF72693CC6E
7091:10BB10001AF0B3B81DA0964F50FD45A8DEFA90EA82
7092:10BB20002F789E94A99EA6EF8F53FD46142DBC4BF3
7093:10BB3000B1DD0989E1F144135B47BE587754C6383B
7094:10BB40005F80BC9D49E7711B9FC6828638E62B70DB
7095:10BB500038FC9C1EBDBBCDC18D480FEF1560F79022
7096:10BB6000C6011457BCDE30C0171597442C5E01F691
7097:10BB7000D18F576CFF0D547B47281EB298CE775655
7098:10BB8000EB3AF90A5A3E2777DDE5B16BFA99257F42
7099:10BB900008F3B6D0FFA09FD93E5AD68C7F4799BEF6
7100:10BBA0007C279122654AB7A9E2304E0F3EAE3B2872
7101:10BBB00003BD6E4B66F0DC09CFB1F0D985F4BACB8A
7102:10BBC000C5DAAAF0F81F944918D7A3AE81CCB81DE6
7103:10BBD00088F57CEABA6280EF2ED9E22DA2F4BCEBA4
7104:10BBE0000111F16884B76B5F9CD744FDAAAEC64FC4
7105:10BBF00065F02F2F05FFDD4BF4DF49808DA7E2555F
7106:10BC0000E583DB674D1A705C536FB6EFFA01C735F9
7107:10BC1000FC7247D94C5DF9CE9AD9BAFA772F29D65A
7108:10BC20007D2F0E2CD47D9FB76291AEBCA0E1015D4B
7109:10BC3000FDD2C6A5BAEF0B832B75DF2BB6ACD3951F
7110:10BC4000AB424FE8EAFBDB9A75DF4DFBAEBA09E485
7111:10BC5000B1EEF72201FBEC73FB89B5605F7D6E9757
7112:10BC6000D0AFAA065EA37278AA3605F9FB74AD1BA5
7113:10BC70009FE7DA72707FCC6FA3F24CD7FA0D75870D
7114:10BC800097AE98087A84D6A73AFCA9BA379706A83F
7115:10BC9000EFBE1182D494EFC546858407801F93D8E8
7116:10BCA000C7D7BDA2E67BD725BE37D2052BA7FF7726
7117:10BCB000B12BFAFB1EA17714D87781F7CDB87F138B
7118:10BCC000CB7EA07F579028FE83FAEC86F88646EF5D
7119:10BCD000BC2A32BBFA1A71F2AB227D562A4CDE2BFB
7120:10BCE00077A44E867841A5121E5513C5CEEE1B2FA4
7121:10BCF00044811904FD30795918BC2222BF48BFE1A4
7122:10BD00003AB9BFC1E4DB07FAB97BBFC8F607C2077F
7123:10BD1000D3619FE61AD1FB2ABC276D03717D7CA7F6
7124:10BD2000D63BE0F80842DEAB9D86CF3FD4160D80AF
7125:10BD3000F8D19F6A6761F9835A1F3EBB6ACBF0F95D
7126:10BD4000616D0D7E3F5EBB04CB276A03F83C55BB9B
7127:10BD5000029FA76B1BF07B776D2396CFD506F1A9C9
7128:10BD6000CA816A8F92246EFF717B9DAE1C583ECFB4
7129:10BD7000E720D27F77A25C7B5240AECFDBBF1805B5
7130:10BD800076EEF9F7CC18448F852723BFC5A69F17F9
7131:10BD9000D7FB9220A57F4EFFEF561BA38FD544A65D
7132:10BDA000817FB672A44220AE6E7BF53B682FD3F73D
7133:10BDB00012417D19F468F711FBFA87390FBA349DE7
7134:10BDC000D4FA279EFCAFBCB959401F465FDB41B196
7135:10BDD00086D1ED590FD04D833F6697EDE4FADC80B4
7136:10BDE0004789CB9D119F6707AAF8EC4C87784B9544
7137:10BDF000586492E8BBF3AD669CD7F9F638B68FED80
7138:10BE00004ABAAC785EC516AB4BAB1FAA42092EBD31
7139:10BE1000BE487569F5C5F98E679D20F78B534CAE0A
7140:10BE2000E339C01F5ECE1F8CEFD4FEAB42192EBB90
7141:10BE3000AE1F7DF97C83308DED2BBAE36F8DE21F51
7142:10BE4000A8CFC5298AEB38D50BA7B70C8F8771A966
7143:10BE50001FE78271BA6B5D2E366E8A4BCB97954B7E
7144:10BE60006C585F852F56BFFF68F860C7EF230B8BB8
7145:10BE700035419C2656FD98F4903E53C03F20EDF28C
7146:10BE800017B0EED832D57547C2B2DAAF3F2406CC30
7147:10BE9000D7C0FB16DD78B49D5BF5A1A15D6CBA4BF4
7148:10BEA000E4844A4FAA27AFE3F921949991CE3EDA70
7149:10BEB000633CEDAF47B2AF80386F86E4467DE787DD
7150:10BEC00081283F5559BA149F1BD1DD8971CF7C550C
7151:10BED000EEDDB7FF91B2DCC7FF26633C837C437B7A
7152:10BEE000A7DF65FE753E2972829331B7B56206E819
7153:10BEF000C98F4DAA3DD09007F33E4B4CB89F7F961B
7154:10BF0000BCE5CCD1D86565128F4FAE60EB7380FE77
7155:10BF100007F3A3769A6EBD2E6DD4974BC8CDC9207A
7156:10BF20000F25EB65D8B1250B61BDD7EC9BCC925C9E
7157:10BF300038EF5252530F76CA2A99EDA3CE7511E904
7158:10BF40000A0A57D5AEA7F3C09EF54B4CDFABFEF304
7159:10BF5000C2440677795250F1D2EF1FB5E6DCF63DC8
7160:10BF600002ED83F5A0D7020EE289168F99B7420F32
7161:10BF7000DFA5E037C24BC8321D1C6ABF2A1CE2167F
7162:10BF8000216A9EC6CF2481C775987CAC91F4F6EBEC
7163:10BF9000631C0F6A7983A1DC64A8AFF289CCF92411
7164:10BFA00043F23D06FAA7CAD25B88761AA1FC911526
7165:10BFB000A9A744EA6DB8583D33D413B15E93342E2B
7166:10BFC000763D6BA4BFE668FD55EDDAF67280F2535C
7167:10BFD000F94B8F3B21E8FBB1D4900CF1AFCACD0FE8
7168:10BFE00039014FA7A48013E8FD71508C1A177CB754
7169:10BFF0000F5F5EBB007E04B236C5FB0B8FDC08FA18
7170:10C00000FA8BCD32E6C5F8B798C366CAC7D5AD0B73
7171:10C010006740FC9E968FB1F2C39FC0BEA1BF4D4F3B
7172:10C02000CFF2E71F4F863811C524B3B74918ED8EFC
7173:10C03000EA4D7F2E043DEE27BDC887C67630FE85CB
7174:10C040004494FB6225BEFF77355FC1CFE5CCDFFAB4
7175:10C05000C8279097E037F04F59DF7AD2A5401CA14E
7176:10C06000437224A15FFE5DF25DD0032A3E4890D961
7177:10C0700013755B378C3946E1E9DEF46F4E41E777A3
7178:10C08000333E3C1F9AF7AB57DCB1F5CC39EE0F4588
7179:10C09000DA05B19DBB8DD93FA49D3D2BE5B013ECD6
7180:10C0A000CDCA66D9433994546E7BF6B927C14F7B0C
7181:10C0B000DF8C7E5AC5B6DFBC3381962BB6CB4933B5
7182:10C0C000D874EC4272842E7EFABF2563237428FF55
7183:10C0D000F56F14F768F6FEA789117A546CDFAF90FC
7184:10C0E000D1FDF15710DAAF74D9A3D02574AC10ECA0
7185:10C0F00095BAAD5F2AE0777DBC4F208332FAB72F27
7186:10C100006BFE0DAE878027A423A7531FDDFAD12B2A
7187:10C110007CE32BB958CF057A3216BD5EE07AB96A56
7188:10C1200097832440FCF30FE6E00CA0E38BF7386123
7189:10C130001E27A51AC6D74F3F940CFB7F657220D9E6
7190:10C14000854FF6BEEC99FB90DF4A859A64B68FE97D
7191:10C150004DE5F1F25498DF82A61FE1FC4A880FF901
7192:10C16000AEEC69B108E2C39F4B64DAF628727183C2
7193:10C17000CCF69F4E6E3443921F3909763ED8D76F66
7194:10C18000891867256411EE83DDA7C671C9622C7F0B
7195:10C19000CEF7A546C826D53FB4E8F875D3C39D4071
7196:10C1A0009FD343BC83004E8A8700C79700FBFDE204
7197:10C1B000D1A983187D58BE01B6A3FABF00DE43FDA6
7198:10C1C0004E19F70935EDB8BE64E3DFCBC7A770DBC6
7199:10C1D000603D3B99CCF62B8DF35BC2E747FF3A8974
7200:10C1E00086BF34F2CDE47DD34A26DFAABC07674E72
7201:10C1F00083EF9FBDCDE407DAC1FA41E10A0FC2EF38
7202:10C20000FB6F15501F9849389A5C6F92B95CEBBF71
7203:10C21000FBA99C425C80C22D413E43844F68FF894C
7204:10C22000887FF44B4AD6D3761AFBCC0FE3613D25C9
7205:10C23000F25EB37E94723D304DD6CB3F691A785989
7206:10C24000F662A54C02605A56BE6F46BFBB729B5C3D
7207:10C2500004F33ED372F09D1F53BE3E1352E554AF1C
7208:10C260003F8D725AB663B300FC6994D3336574B5DD
7209:10C270008E26A7F47D54392DEBFABFA23F55BCF9A9
7210:10C280000D78A37A7068822936FE8C7AD021BBA300
7211:10C29000EA41FAF736C9EBCF772ABFA97C462DB41D
7212:10C2A000A1A0BFFBF851E5B73E7E54F9CD384F3D14
7213:10C2B000DE8CDF2780A146E12ADA2DA35F52D9CE9A
7214:10C2C000F66F68BB4357E4227EBCB87C9186435727
7215:10C2D0002469CB41433964A8EF35948B0CF57D86F6
7216:10C2E000728DAE7E65DB418525198575F5CC4B9E3B
7217:10C2F000241F45B1EFD575C6DFFA8912007E48EBE1
7218:10C300005540CFC9CBA86906F1B3BD22FA5B3DEE1B
7219:10C310005E67227DFF9095F9B13D2E5E4E60E5DEB1
7220:10C32000814A3DE839F57DAF95C5397B8A7A9D090B
7221:10C330001AFFFE58BBE884FDE0AE20CB47ED0F4F5F
7222:10C340001DCA4D1789F59DC505A78AF6F425E0BFDE
7223:10C3500035881E700DE72FBDDD09FB6E3DEDC36F07
7224:10C360009A45DF2F382C82F94C7A6CCE31001709B0
7225:10C3700078A5D43C9E3F41FF4E91C02F2742DE441A
7226:10C380003BB3AFE7AF36D8C3F67B15CC2F5BAF8995
7227:10C390006B69F8BF9CF753D6A4FF5E4E5623FF95FA
7228:10C3A0001BE4C1C7FD81A3AA3C64936CB6BF4D9842
7229:10C3B0001FCBF5EE5431EBA65914EF3D1D22E6CD0F
7230:10C3C0009E6F17493DCCB345C07D4E1218887255FB
7231:10C3D0004D7A51DFA978E906B95162EBA3EE9DFFD2
7232:10C3E00091F720F0C7CB7F1CF3147D76BFFCFEA82D
7233:10C3F0003D50DEF56EFA1F49FFFA05FBBEC27DC453
7234:10C400009E7D668C73F5ECFB6DFA83507EC58C7156
7235:10C41000AE9E6566DC4709EC730447C2F721CC1F6A
7236:10C42000A8DBFBE5189627B91CE9F48DCCFC91F349
7237:10C43000EDFFF501E48F9C6FA7B302BB605F1CCAE0
7238:10C440008DFF152BFADF3D7BBFCCF3D9FF71F3A92C
7239:10C4500056880FF9CF4166ED007E4D60F160FF9E7A
7240:10C46000F1CF427E7355EB7E05E2EC05AFFE650C25
7241:10C47000E8C99E1DCCDE3927773D03FB6166E59355
7242:10C480006532C5F339109EC1843CAB8C2D086445E0
7243:10C49000C30BC3430FC503CC8BE2A50CF47B2C7CF0
7244:10C4A000A42BFFACF8F8E42EA6C7BE8B79F611BC1E
7245:10C4B000085EF6DE11B408387FF67EDF976340CF62
7246:10C4C0009C092D457BE452F3BE5661FB2CFF73E6BD
7247:10C4D0002D842F67DE73FE69E9CDF8FF43585F07AF
7248:10C4E000F69783FE7CBEEB7E2CBFE8F020BC97293C
7249:10C4F000FF3FFD9F46F71D94EECE4BD3FDA97FDA9B
7250:10C50000795F8AEE8739DD1D2ED85FEED9FB178C57
7251:10C510009BAAF3BFD4BC5FF97F74DEAABD3EDD5495
7252:10C52000736426AD7F8484D71751385F4B9BFAF62E
7253:10C530004CFAF5B731EC91D30A8B7FFC96B03CC135
7254:10C54000408AC0F23CB85F5440D8BA5E90598A76AF
7255:10C550004641E623681F10A9E64836C5C7F4F4052E
7256:10C560001E960F3616CFA15C977AAD07E38106FFC2
7257:10C57000F0A040BC900F5D70F5F51DE0AF4C499305
7258:10C58000C3E631F83C06CF43CE69ECBD5DEF17CD75
7259:10C5900000BF46E3E75DEFD67F2FE4FD4D238B8F91
7260:10C5A000CCA4E34F4B135D416837A94182F9CCA07D
7261:10C5B000C2DDA0D90F2A34F47708FC5A4DBCEC6FC9
7262:10C5C000C55F9A99F991BFA5E36703FED2648C0712
7263:10C5D0005E127F84E57F5D979A8DE75188E441FC88
7264:10C5E0004D1F5CC5F1C9FC6689B797ECF59D20B776
7265:10C5F00012A17E2FB3CBD05F56FDDE587826DC8F9C
7266:10C6000096F8902ADEA53419F35535FD213E547A6B
7267:10C61000FCAD7450E9F7F7D2E39C811E699FB92401
7268:10C6200090CF026EFF4FF9AC53C4729A47C2FD28F7
7269:10C630006EFF4FB2274860FF5F2B1D15412E4B2D1B
7270:10C640006DD3214E6FF108C8D757769BD0BFB1E4A8
7271:10C650000A88F7CC4609CB474DAE716068DFF8BD5C
7272:10C660005D671E20101FF62A68789322169FFFE64A
7273:10C67000DB6F27AAE735F03B213750FCCE6F2261F4
7274:10C680001B9DE7028904E21321BE2B900F75F15D1B
7275:10C690007D19FEBE9F1CE9E752F563E9917FF473B3
7276:10C6A00017D55B1F52E6D80D4FDC57A12CA1F18F97
7277:10C6B000BFDBCEF0E53F4282C3502F78C522CDBE0E
7278:10C6C000D92366A63F76FD69470EC4C526F564C525
7279:10C6D000337D3A02FD023FF70BCE13773CE41F9CFB
7280:10C6E0006F1F1E8FFB821DA2C317252EB395FBCF94
7281:10C6F000FF0AF914F4D9B38934C0398C1ED28BF1F6
7282:10C70000D8C0264BD4FDDDFBCD6ABC89D38DFE8914
7283:10C71000EA792337E68B04E2B574EB9EF1B134A6D7
7284:10C720003F1DE0EF43CD7EC9DF8B5FF0D701BF5BDC
7285:10C73000AD5D85D1CE83ADE0F8BBF1C05718C7BC65
7286:10C74000BABDD904FC7BF526936EBF3160E67ED777
7287:10C75000583216E0BAF180D5910B74E9103D903F44
7288:10C76000E86FFF44F145D9B732E213FA87B8F83ED3
7289:10C77000338BF3EF9143F300AF7BCE5A303F67B773
7290:10C78000D250110DCE2BAD4CCF2D20A17BC664FC19
7291:10C79000F3E177528F3D3C19FCCC4D84C7318CFCC2
7292:10C7A00047908FCF6F21783E14FC52D00BE75BD8B7
7293:10C7B00039608A9235E04F5379FF81362E7365DBFD
7294:10C7C000F67F053BA0BA5D7041EA6CB5D4A540BCCC
7295:10C7D000D5DF9620C2BA9BED56F32A5DA36FD5C86C
7296:10C7E000C53E33CB373E3861CF1D30EEA7DD0A01A1
7297:10C7F0007BC4FB5AAF13D6ED4FDB73E2A3E5CDABA1
7298:10C80000CF5FD792E95324E88720DE8DFC90D56274
7299:10C81000D395BF27FA06837CDD68EEBAD713857EF1
7300:10C820003E0BE3B3CBD66FC1FFCFF4DBDBAA7EF3C5
7301:10C8300089451A39CAB4F4D36F83A2E9B7C5827B9C
7302:10C8400010E07DF1DEE18380AE8B0FCB03A3E9B76F
7303:10C850006DB56C3FEF259E0FDBD34AF5DB351AFD36
7304:10C86000D66AC1BC3863BB448B89AF8B97D06FC18C
7305:10C87000FF1EF9DB06FA2DCA7C475A98DE50F5DB1D
7306:10C8800098F663A8DFC6B49A7479A369964BE93722
7307:10C8900061E0AD600F77C89EB828FCB38DDBDF2F59
7308:10C8A000F13C3C1807F4DC1D16B6BF79B97A2ECBE3
7309:10C8B000CAE87D493DF7DF846755CF2DDEA99E7319
7310:10C8C00034F221D3738B77533D27003F323DB77845
7311:10C8D0002FBBC7C1A8DF32FBE93782F5ABC3ACBDC4
7312:10C8E000BF2D63C31CDADF58AFECB1D0FA6323FA73
7313:10C8F0006E9C56DFDD6161F72EF4D3771D97A7EFAD
7314:10C9000076727D47F5D830D0AF46FEF0B4EBF38EAB
7315:10C91000F78C3FD9F26B9097D745DC373CCACFA54F
7316:10C92000BD31FE642EF0578B85E9DF3ACE7FE76A92
7317:10C9300003D87FC16B6C7E5576968F5CDDCAECC3E5
7318:10C94000EA1621E8A6FF2C9CF09502F02FDC2B9034
7319:10C9500041B43CD3CCEA93E7D57D2F32235BC30FA0
7320:10C96000F3F32B306E3F5F221688CB57D80B3F86F0
7321:10C97000787C453E8BE357F0F70B0F77D5433C7B34
7322:10C98000E11302EE7B129E0FA0E63796B62FC57814
7323:10C99000AD312F40D5E70B83FAF715867CC6663E8E
7324:10C9A000CF996217E285BC2946CD4B6836E2A38356
7325:10C9B000E3639388EB661F3E287EDC19FDF1412975
7326:10C9C0003A233B3932FF85AFD379E546E6A5E2C38A
7327:10C9D000383F35EE5CC1DBC59AAF8ABF7EF355F1B7
7328:10C9E0006998F7B3A037402164931CC88BA17C8061
7329:10C9F0007A23F03B11CFEF174D1A3948AB87B77246
7330:10CA00007D9ED330A9209500BE480DF04D49E3A28C
7331:10CA100043A974DEE3DE738F85E5F17B13CC3ED84A
7332:10CA20001FDD6AED45BDA6F2D5D79CAFDEE178DC0F
7333:10CA300033B806CFA9FADB0417D815FEB015F1E715
7334:10CA4000A7F883F32B7E7E7ED14FF90BE4E9E01348
7335:10CA50005F307CED15DC101F2F54D71FC03FAD9FFA
7336:10CA6000D3CEF0EF0F0A88FF5CD28BFB23D58D82EB
7337:10CA7000274CEB57B72DC2BC0755DFD23FBB961EE4
7338:10CA80001A7E94A2F12356D2AC7F15BCDE8DE686C9
7339:10CA900077803F6F7C5E26CD1AFECCA4FF7D1B8580
7340:10CAA0004E2A3E2FC59717389EB6011EED80AF5E09
7341:10CAB000663F85BFC27334EA77BF14D0E1B1E0C9E5
7342:10CAC0000B17C5D338154FC0A7A0A7DA8B452897F9
7343:10CAD000B409644046FF79C2FEA4566E17EE3DC607
7344:10CAE000FA7F5AC07B4B8C7CABCEBB1FDFC6E057B6
7345:10CAF0003897067ED1E5F2EDD706BE7DC3DA7B24FA
7346:10CB000007F876AFC0E207ED09BAFDC5C156B6FE1B
7347:10CB10006FB552FE867DADC3B267A3BBBF7CC7F1C4
7348:10CB2000F50BEC7EEDB9A4AB602290F7B8C5827925
7349:10CB30006408C73066576AF5EA362B19786B6EECD5
7350:10CB4000FE5379FFB1EC1AB53C1AC6837CAF363A76
7351:10CB50005E66643CA35E57FDFC4BCD6BD4DF39AF02
7352:10CB6000BE3C4CD289FB4E1992EF51B3260FEE36E4
7353:10CB70009E67442140FB4A532FCB72917A24C5858E
7354:10CB8000E79FEE71A97CC6F2DD8B781EFB5471E243
7355:10CB9000BBB07E7EEA65FB7CB926F2FB89A09F27AD
7356:10CBA000CB788EEFD32332C66B3F9DC2F2386F7ABB
7357:10CBB000FDA004719A9B4039517CDC344E407F05C6
7358:10CBC0008E61C1BED92E6ADF7847E17C72E01C57C6
7359:10CBD000F6A68602387F3C764BB00E9E9E82DEA47F
7360:10CBE00037008F93440278ECF40E2880FB93EEF923
7361:10CBF00033C1FB43E83A8BEDC7769081506F827763
7362:10CC000020BA03E35BD717407C74E641BB1DEE6797
7363:10CC1000C96C32519F2182BF09245807FBEDE38F75
7364:10CC20007B6F0178CBA8BD0071E7B2F6E63A279496
7365:10CC30009B048F9BF6EF0FF80A9D741EDB1A3F29A9
7366:10CC4000FC0EC823AD07DDF89B583DFF26B87808D9
7367:10CC5000DEAFC33C9B924D021EFCDA16148885F5AC
7368:10CC60001BB4D07EB735D1F6B9B04ED0F6D0EFA612
7369:10CC70004FDEBE05E4FD88C8DAB7B07DEA12DACE31
7370:10CC80000D7CBB6911F6B7B0492029B4BFB216B606
7371:10CC90000E941D913DF0BD75FF13B88ECDA0E3A598
7372:10CCA0006680DE0F4F8132C9115C18EFAC1C8574B1
7373:10CCB000EBE1724E268E64FA43E065EE37A876D338
7374:10CCC0003B5696EF5BE259AA0CA0FDBC913F3003A6
7375:10CCD000D202FC6D9FE0FEF3718A671FEDF228CF50
7376:10CCE000DB3898FF91D2A559873EB5B2FBADE6B7C8
7377:10CCF0004DC27C8605A408F3196E1CCFECB537AF86
7378:10CD0000B506E18A8337E5DE34787FF05A33DABF3F
7379:10CD1000E7B6C9C847E78674617CFA64938CE786F6
7380:10CD2000EB9AD8FD5C275BD83A2E3ECDF6F54B1D2D
7381:10CD30000A960F36DD5208EBDBC94DECBC63C1D35C
7382:10CD400053152897360B1E767F11D38FAAFF56E214
7383:10CD500062F908AAFEABE2F3EE97B768D07755EA1E
7384:10CD60007A63D07755B0AFEC84A7FEBD9FD8991EEB
7385:10CD700004BB1FE81EFE0AF9B7FA884CC0EE173E46
7386:10CD8000EA2EC47CACBD02C6F3C7B70B5ED8D72F62
7387:10CD90007BCF1C447B35587CF74F408FBF6F26827A
7388:10CDA0001BF2DA29DEA97EC837F7FEE917F4FDC7C2
7389:10CDB000472D900943F9A418F1ACE67FE66E667939
7390:10CDC0002CB947D727C3794B326500EADBD24691AD
7391:10CDD000F8347AE363C17BCB8F995EC6FB2954FAA2
7392:10CDE000E52A0D25B08E0DB731BDE4DE2C438E084B
7393:10CDF00039CCE324D49EC6F3B70B77AF4B5668BD4E
7394:10CE00007A9EFFB170EFBA6491BEAF83F58BD65FA7
7395:10CE1000A8B0FE17EE135CCD9AFED5F66A7F6A3F86
7396:10CE2000CA6E7D3FC3F7F2F265F6A3C2A18E1FCB97
7397:10CE30001ECFFFF70BEBE1BE98FC37454C3ACEFF17
7398:10CE400068C670ED7E87FA54E3AF796F9B8857838D
7399:10CE5000B7FC3FD98857C317ADE3A87C53BADDD0E0
7400:10CE600026040194D671C794AA5C2CBB409EAB7972
7401:10CE70009CB67A0ADBB76ACD3EBA1CE47B46AE802C
7402:10CE80007C40023E654012DA416ED85F28CD65EDE8
7403:10CE90004B697B90BBD627981C527DE0067D51DD07
7404:10CEA000B4AE10EB6F12DCD07F6B7331AEF765F967
7405:10CEB00022C1EF9B8EA1FD51D6762C09E495CAE7DD
7406:10CEC0007A587FAB279AF13E2F55EE54397E53E6C0
7407:10CED000F735595CA321AFFF41002A8AFC8A470835
7408:10CEE000F3535B6494337F3E93CB37B78928CF07E6
7409:10CEF000AFBD1DE5F0DC6621861C1728702EF96495
7410:10CF0000907DEF93E3AD029763A61F4EDA995C170D
7411:10CF1000C07790E39D02F707993D689463552E2FE3
7412:10CF200025BF155B0CF21C436E3BA5AE5B61DC7B41
7413:10CF3000AEB522DC05DFDFFDCE3DA87F64CCFB284B
7414:10CF4000F8FE03C9A0EF4A2496AFA4E2B14A62F901
7415:10CF50006CFDE058BF5449BD2C78F4703C657544B5
7416:10CF6000F487087CCEEEE10A6C9291CF8D72F8F7CF
7417:10CF7000CACF3F4A9E0F73FE51E111F7B2F6903FC0
7418:10CF800016A678FA6DCBB398A77AF6856337029E1A
7419:10CF90002BF650BEA5F33DD7E2E0F7BD04719D2905
7420:10CFA0006F15310F9C48E1BC5B1C5AB96479481578
7421:10CFB0002F39903FCA77B07CD2F2973F1A837922FB
7422:10CFC000CB7A31BF2AF002B737035D6380AFCB2540
7423:10CFD000960F6594F35B6DCCFEECDE1D370BE621FE
7424:10CFE0006C61E7F4CB43B7CBC0876ABD1FDA64B589
7425:10CFF0001EEE5F0628DFC2FE3AC0A73D77AEE641CF
7426:10D00000756F65725FDE26A3BF54BEA519E3D8FE17
7427:10D010002D9F609E7BC14BDB307EE06F13F5798FD7
7428:10D020005B44DCC7A24FDCAF32E61F56B756E17E49
7429:10D030005B7588E7F719F2DF2A5EDAFB7280A2A639
7430:10D04000E2D7CF3B410F9CEEDCEC047CD2FE306F8C
7431:10D05000F0FB9F49BABCA8D8F9BD5E7D3E6168650A
7432:10D06000D47CC2D3F00FCAE00FD838BFAA79985B3E
7433:10D0700006F03CED705E5194F87DDFB99D6D9F3FE9
7434:10D080000379EEDD3BCE3C037057FEF5D367209F5E
7435:10D0900089ECB3E2BAE47FE1F79827ACB6FB858D63
7436:10D0A000FBF95B9FC7FCEA73EF9BD1CF39B7F764FD
7437:10D0B0003AE4AF9DDBFE5532C4E3EEDD3B15E3956C
7438:10D0C000F7EE2C1844A2E877F5097C19BC8CFC6EAD
7439:10D0D000231D0EB61EC4BCABB3EF99519FF5E58579
7440:10D0E00086AA589EAD9BE783B644CFA357F318ABEF
7441:10D0F0005B6FB9E95AD0CFADCC9EEBCB6BBC541E65
7442:10D10000E8DB949ED75C06DD5A789EAF816E67E1BE
7443:10D110001F943E2103DD3E6F5DF0AB27E15BEB80AA
7444:10D120009879A0E1CBC0979AA7FF739B778F0DCE1C
7445:10D13000FDED880BA4307A05670860EF7D9E0EE751
7446:10D140001A4EC9BD98EFD1BBD7EC827CC6F2BDEFB9
7447:10D15000A27C9CDB7914E3AA84E7C99F237D7F2C02
7448:10D16000AF59E0F3DBE460F9A31CEF905FEA76E2ED
7449:10D170007B9E47CAF856CD2F8D9557DA6B1BC6E2BA
7450:10D18000D0FCDC4015F593F8BD597DF9A6423ED0A0
7451:10D19000E9982E4F579DB7B13F17D79B91FCE8E810
7452:10D1A00079BB6ABE60844E6C1D51F39FCF35F3BCD2
7453:10D1B00069FA3E6D2CE4C1B1F5DA1F14DE2551E4A5
7454:10D1C00051CD8F3E6333E445072F2F2FFA52F0FEE7
7455:10D1D000EFE2E3031B8B57AB78E9FE26BA3E56E23B
7456:10D1E00098DD49FD53390EF705987F7A37F74F558B
7457:10D1F0007CA9F0D68798DDD0BD85F9074679AE8E3B
7458:10D20000715F52121FA7BA6DFF18D03BDD0776730E
7459:10D210007E63FC5CDD728CE5DD52FD1CD4EA677E2A
7460:10D22000BF84B1BF74DE9FBF3D7A7FFE964FA2F6EA
7461:10D23000775AF2DE0EF09FEE6476D2E990382DDA5E
7462:10D24000FD36963859973F50EF60F765884E1BDAE8
7463:10D2500047F73AF2DF8B4F82A782793D754B791EF3
7464:10D26000D0CF3C78AF689D633A01781E02FC68E23B
7465:10D270000CB2CB47C04E93538A72457704DE3E7A98
7466:10D28000249948504B7F299C06FAFC83EC9332F496
7467:10D29000F79F86F8C87F4AA47E1085EB3F0382671C
7468:10D2A000A93BB65DAD967D3F1575F18C6A73EF07AE
7469:10D2B000609F9357ADB81F2EEEB306303EF60CBB01
7470:10D2C00057E3E0CE2F9FC37B797E6526DC2E14408A
7471:10D2D0001F94F238C5C99D5F3EF35F604742633AD1
7472:10D2E0007EE933B43ED8CF2D7168EFF7EC881F0389
7473:10D2F0007180D2571FBC11F44529E83EB0335F1A44
7474:10D3000014ACA3FD9D18C8CA27B60DC17301153B07
7475:10D310001C984F7870E7AE6AD0F7E75E8A23A0EFDB
7476:10D32000CFCA5D7F85B27F4F3C6976A3DDE7D6AE7D
7477:10D33000AB0B89E4D6DA731550D6E5B710CC6FC1C4
7478:10D34000F81BE5E78AB6783CFFA1A9C7E539309814
7479:10D35000DF133518E48EDA8D6E7DDE33FB3E3F8EB3
7480:10D36000E92FBFB9F77E761F02ABEF577A4B58B95A
7481:10D37000613093DB4EACBF48E557FEBD7FBFACBE0E
7482:10D380003F8EC50322FDB0F6D56676BF8691BE3FBF
7483:10D390008D13F879DCBF5C19EDFE8928F0B37BB9F9
7484:10D3A000041280FB57C9762BE669552AE15190AFEC
7485:10D3B000FEB2C2F63F2A9DE15190AFBE87EBBF4A55
7486:10D3C0001B2DD3F783391C501FCAC4D2F522DEEBC4
7487:10D3D000B4CB8AF7E155BDEAF0A29FF0F297279E01
7488:10D3E000CA857CB538CC93AE7AF55F90FE55E6F0F1
7489:10D3F0005DC0FFBDDBCD783F69F7F6C3E9603774E8
7490:10D40000CBE1F4C48BECEB5485CCBA7D6A751EA7D6
7491:10D410006B974C8073BCEA39C3F218FAE2F5389680
7492:10D42000D7D11CE7FD15D373FAFB654ED7CED2DDFD
7493:10D430009B586E89AEC75A402F68E27862E45C61FF
7494:10D440000BF47B9674D50FA624A9127A717FBC7C4D
7495:10D450004B461AF8BB07AC57E2BED501D98DFE206A
7496:10D460003CB5FAF854AD2747C2F3F499391285A3B5
7497:10D47000A7F99392C104F203ADB3A2E9A7BD7171FC
7498:10D48000C84FE51673D4F39BBFE3FCB60DE46D1CE7
7499:10D490001BCF931519F7801C54008E897637CEA7C1
7500:10D4A0009CFA01EC9EA8D939DA73DB0BA506AC47D0
7501:10D4B000E50BF1B190AC5772EDFDF5CAC225B93953
7502:10D4C000520E2AACAFFBF84D8CD0890492D04E920C
7503:10D4D000380DC9FA545DBEBF241759005F0A29727E
7504:10D4E000492290BA01E5D44642F8B4533384AD439F
7505:10D4F0003504E2E3A7F8FEAC59723F8AF7CD748891
7506:10D50000A8CF2F85B777E39C08B759AA211EB43757
7507:10D5100066B8C01E13023EF22DE587BADA6939EC0F
7508:10D520005C38F142BE1BA6BE51F89CAE435F817DC4
7509:10D5300040F98CDD63F57D12ACA3E3C131638CFF50
7510:10D540004D66F7D91BC7FB86D38104F6EBEE3B870C
7511:10D55000BF5EF5FE3CF0D7E3FF9A0FFB317617096B
7512:10D5600083BD146727E1B831704F9E745A2BBF4EAC
7513:10D57000C2CAC3283B835E734DD47F37F235F1486E
7514:10D580009FF5E94511DB7F6668FFD9C5DAABF8F096
7515:10D590005B367A8EE744F062E373084CF65CE8028F
7516:10D5A0007C8C717AEA808E4AEF070F023EC6D899CA
7517:10D5B0003F98D448B4FE5A8E9DE9ABE5FCFE69FA6B
7518:10D5C0005764D7F4475C168C8FAEE478EFABAFC6E8
7519:10D5D0004DFAD5B74A80D77EF5ADB1EADBA2D77751
7520:10D5E000C482272E3A3C0931FA0F44AF5FFDEABBF3
7521:10D5F0006F84DDF092E90D08CEF373CB3976F0AF8E
7522:10D60000E23F482E665CC1F6030C74B301FF517E05
7523:10D61000B08DD0BC87FFCBD2D06F5814FA9330F2C4
7524:10D620005D31878796EDA914BE1F7370A76C62FBEE
7525:10D630009573EE6571A21F5B587EE9317E1FD09C09
7526:10D6400046E657CF59C2F61149193BE7E3A2FFC19D
7527:10D650007877422794DE773608C17006DC5B63B0CA
7528:10D660005FFBEEC759A840FD6243DC45E527F53C6A
7529:10D67000D23C6E5F6770FE5C407A1D20F7C673EF88
7530:10D68000AF71BDA6EAFDC03A9209E7F64593CD0316
7531:10D69000FBA3223F674A9CEC3E3FE21DC2EE97533C
7532:10D6A000F3B832DDF1B0BE91107FCFF759165FEFBE
7533:10D6B0001EA43DA7255DB0E1FD2075B22705F4A0AD
7534:10D6C0007C81DA75D455532E0C236ECD39326ACF56
7535:10D6D000A170CB2E765FA2E42A22A56007F2FB019F
7536:10D6E00048D2F43EBBEB4D8A87C5EBDC786E758182
7537:10D6F0009DD999BF7014DD631F07F665BE87DD7382
7538:10D70000ABA76360279B5F1DCC2FA33FDC758AC747
7539:10D710008376E7746A31601CC783BFEF209ADDEF20
7540:10D72000BA411EFF4D66BF57D00F0F8C7EE7931294
7541:10D73000F15EF6F9CE551F009FAEE6F711AEA8CD0B
7542:10D74000C4E7AADA14B43BEB6B3DF854F162F13450
7543:10D75000E0BD6F9611AC3F8BCBC7EC0A6ACB403E65
7544:10D7600085E4AA0943D9925643C0DEB5F6E1A70184
7545:10D77000F1A3F4957D5836BBD8EF46C88D3310CF52
7546:10D78000B43D29A5DF173B7C4F829C58DD57EBEE5B
7547:10D790009133A78C35DC3768C09BCA1FDB18FED6D7
7548:10D7A000088C3F8CF85B2377BA615F79CDF57DF704
7549:10D7B000CE20FEA879CFF0F73BB6CF16137FAE444C
7550:10D7C000B45FE7E7D5DF55475F3DC2F7171FAECD22
7551:10D7D000477CADE4F7483E54EBC5A708F8A3F33304
7552:10D7E000670508DC8FCE7E1B823EED455EB87F1656
7553:10D7F0007817F027DA193ECD2935B8BF66B1337CEA
7554:10D8000089F600E245B6337C8976C66F0A2F4B80D5
7555:10D81000BF1C6C8FEF29FE0E007F59D226E8F0A5C1
7556:10D82000244DBE3CFC3D41F147E148E2F265C44372
7557:10D8300092C2EEA754E52A961DF7389D3FACDB1B3C
7558:10D840006A093E07C6F0178739D8BA9964AAD92F52
7559:10D85000033E12095F4F02242D8FB0D443F84B09C9
7560:10D860001037940506076918A2BB57527449867B86
7561:10D87000D9DC1B800FD61F964D902F2F2E99AE3BD3
7562:10D880000F2ACEF226B8119F3EBCA7F9915A37D283
7563:10D890006F1DD011EE01E5FED7439C9E0FF37B2850
7564:10D8A0005772F958C3E5E5512E2775FCDEE4D5D350
7565:10D8B000589E5552B689DF571626DA3CA6044F8883
7566:10D8C00028142EB4A9DDF8C47B16C97BE6E048DA3B
7567:10D8D0002E2E8B78814F12DE7B20C8EE6B2C4A05F2
7568:10D8E0003B2841BD7F71A23B61361E840D4BCCEFBE
7569:10D8F000A0AA10FD984E53B47BAAEA3C072C100F47
7570:10D900008D054F9CC79BF1101D2FAED181F6FB00FA
7571:10D910005FD1EC05B46C6F8CC3F85F1CFF7D163BC8
7572:10D9200085BB5443EF58F7506F745C1FEFA0F4743D
7573:10D93000018CF4F958E370FC5D96C7E522FC1D9755
7574:10D94000C7F97AAADE73AEB6FB9AEB4767EED53A13
7575:10D95000BF75BDECC576AE897AF95FCFF56DE2147F
7576:10D960003D9FABFAF6789FBEF50D0378922F4C41A0
7577:10D970003D96747374BD5B272B786F79DD6826E75D
7578:10D980008162859D6BE9AF07304E7DDE376A23E803
7579:10D990005195AF9611A67702C4E6C17588DF6FA3D3
7580:10D9A000DAC12BE01E40AE5FE1298E60BF3F903CA4
7581:10D9B00087DDE7BB9ADF63B596F215C17B4F3DF873
7582:10D9C0009CEE60FB13CB2C63F13EB53ABB09F584AA
7583:10D9D000F4BE39082687B47FBC0BE20592ECE9F46B
7584:10D9E00042BCCF2185E0DEDC3A7B2EDEFB2E24E438
7585:10D9F000BA80FE5F38E60FBD583E1D9D28DE97E9D0
7586:10DA00004A2A221F66E16E009E5F915D3713881BD4
7587:10DA10006E48AAB102DEC63B585CBFB1380FF14870
7588:10DA2000F17B936360A49F41B3A6F7DD8305DD6EB0
7589:10DA300088710EE60E07B397485A808CD0C879A338
7590:10DA4000FA3B27EE00C9D4C8FBB2918504F687FAE9
7591:10DA5000CB790C3DB699E9B1E542743DA6DA99AAB5
7592:10DA60001E930DFA417DD60F9DA63BA7A524798074
7593:10DA700077E1193079C0BE7BB9FE8E04C4430DE056
7594:10DA800081A44CEFF35F7F300CECC7BCA8FC66D4DC
7595:10DA90005FF3FBD6736F32D0E994EC1E341BF8E9C8
7596:10DAA00070F4F57CD263573D0A7C30FF77A2A0DD8D
7597:10DAB0004F29BDB002D7D3920BF9F82C6B9C867C12
7598:10DAC0004F200AAEF1C34E36DDE704B84E36F23CC5
7599:10DAD00080263908F919271BEFC3FB4A20CF5BD4F6
7600:10DAE000ECEF935C37DA97EA3D632783F738B5FBB1
7601:10DAF000BB25BFB07AC16E8DC55F254DD1FD7A586B
7602:10DB000043217E4A01CC047B98DA37BD61B07F3671
7603:10DB10009A3D011229071EB346CD4F5CEC98FA38A6
7604:10DB2000E07DB1C3FB34C839B1B37B4163F3391B2A
7605:10DB3000F7046C02C37ED3933C4F53F239B5F7BB65
7606:10DB4000F5DDC7C9E324C412E3BB4DFD7D8318DFB7
7607:10DB50009D2C9F83B8A27F57FD84B8889FD006F381
7608:10DB6000A86A3C53FF3EE289FB091CEE533283FB5B
7609:10DB7000D47366F63B3706BE38C5F347160A0CAFBA
7610:10DB80002A7F9FEAB3777C780F8D91FF848D576D44
7611:10DB9000184FFBFDB443C6385C25E51FE01B61E36D
7612:10DBA00078CC5F171E1BFF28E4257D7644C4EFE583
7613:10DBB000172CF8BDFB679E0D7320CEF3BA8CF7755A
7614:10DBC0007FD631359EC579F471E8054EB6CE9FE615
7615:10DBD000725F726115F2671F7F342C5040AE4A2E7F
7616:10DBE000AC457BA6648B80F7449240EFA14912E7D5
7617:10DBF000C309D0FE6CE132C0F7C406DCDF28DD6C5F
7618:10DC0000F6AC12FAD3F9B4C3ADBB57BDB46B35F65D
7619:10DC10004BA83D95A4D9EF3EC5F3804B2FB0FB0137
7620:10DC2000892B405280EFB9DE89F0AFFEDED76E6BF4
7621:10DC3000F438FBD7DC9E29B93041E73744E6F77D5D
7622:10DC4000269F7C3D2FEDCA6770F5CD67C3F868F35A
7623:10DC500089CC6322B6EF4E883E7E06C7F389DA325E
7624:10DC600038B941CA1456AFA4E13E05F449495342BC
7625:10DC7000A2A099576963852E0FA3B4A95899ABE95F
7626:10DC8000374207DB6F278D88D02163AD7CDD323BC7
7627:10DC9000ACF7450E278CB77161DE4FDCD01FD33F48
7628:10DCA0001FCB0DE935A85FEE71463BD790E174EBD1
7629:10DCB000E24AA58D9C3ED44ECED5D047A58BB1FD72
7630:10DCC00089E6D2BC9F403CF909762B486CBD63A025
7631:10DCD0005B4674BC4DE8C35B26E6035D1A6FDFD17B
7632:10DCE000E5FDF4C31BA7AF8A17F53DB58F72005F42
7633:10DCF0001320E03410FA61F4BF14BE22E372FA4F2D
7634:10DD00008A3E0F5FDF3C969000B51FE65F721E0FE4
7635:10DD10009280E522F350E94FAED6D1DFB776E475B5
7636:10DD200020872ABDE71F7802F9773E9547D8973FAD
7637:10DD3000D9709F6E7D88C01783EE2302242BEFFFDE
7638:10DD40001CDD3F9603E990F71558C7D691531B1F6A
7639:10DD500049D7E279B163D202A00BD934F0B2D68FA1
7640:10DD6000C0644F871BD72519E361BB1D3EBF93BE1F
7641:10DD70002FE37EF5F284C251D1D67DEA174E84F8A6
7642:10DD8000735DEDB489106F93B9DD08BFAC05F6265D
7643:10DD90005C811EED7EAD064ED7876A6B307E4D2CC2
7644:10DDA00001E2D29EF725CC2EFA9AB0788BDA4E910A
7645:10DDB0007D2E887F2A0229427B4EF2ADC8C8853865
7646:10DDC0004652764083BFB54E66D7AD4E39E0827C71
7647:10DDD0005233ED1FE2319634E9BC7E9F9295B385B4
7648:10DDE000F132CC474E0A118C6766D1F71A7C2B4969
7649:10DDF00014CE8BF89B92C589FB451261769A3A7FC7
7650:10DE0000FA06D7B387F9BAB40CE2B849608799D05B
7651:10DE10001F5ACFE394BFAC2DE27890701D3327B02A
7652:10DE2000FA4A3C83DB0A716B11D6D530961D70C35C
7653:10DE30008E885793E1EF8F261037FE4EDF0012AE2B
7654:10DE4000C77B4C2675DD0FEFBD71BE2DC0075FA4EB
7655:10DE5000767E20401CBAC87725ACBF8D6220DB4D92
7656:10DE6000EBFF4AECCD867AF0FB5EEF25B2E750C8B7
7657:10DE70005BF669F6A5D8BD9C6E6D5CCF581EBA44A2
7658:10DE800032ECD77C73A5F67B739C7717C091F49125
7659:10DE900080FB30755676AF4F9DE3B67858BF8F72D2
7660:10DEA0007A21FD817F3A981D735E72C727627C33A9
7661:10DEB00033E735DDF81E5D59E2FEDB26CA8F92E6B8
7662:10DEC0005ED61192D704FC32B281BED7D22F4A5C03
7663:10DED0002DD18ED7DF46DD8751E1A3E312C09F78B5
7664:10DEE000A190ADAF063ED82330F8030EEE6F9180BF
7665:10DEF00008F49CADDE172C2D6765F5F722808A1497
7666:10DF00008EF7D5FD05B29C95F93EA57F2EDB8734B3
7667:10DF1000C233BBFDE14E88EBCF6E4F9D07FB53B381
7668:10DF2000EDA3FE0CCF3D72EF8138B003EF13F0FC90
7669:10DF3000C78F7FFF9A1C479F3BDFDE88E78DCF723C
7670:10DF4000B9BB8BF4E23DEC3EE2E2FBE4417C3F17DF
7671:10DF50007E600ECB2119FCF439E1E08F6EA0A53B69
7672:10DF60005F0BDE0066DB5D1DBDBF0135E00BB90A4E
7673:10DF7000710F406DD7E639C4CAAC5D040F166E8FC1
7674:10DF80005A705E91795B100FEFF7E58D07901E7D5B
7675:10DF900078E2F72AA978E99B77FC6DD321CE1B4B59
7676:10DFA0009FCDB667FE996D7E30B88C78FA0C3E51E5
7677:10DFB0003BF233A7D71A4FF5DB474EAF0D9E959630
7678:10DFC000DE746918CA8B13CAD5A26F6832C5C3D96B
7679:10DFD00021BE2B07023E3A075C961EFDC0CAF40024
7680:10DFE000C94DC7F9A8F7BE1F7CE0A403ECCEFA9D8B
7681:10DFF000EFA6C3B34AEC5A733BC63745F487CEB796
7682:10E000005E79D1F3611F40DC89AE7F23E3553E6426
7683:10E01000F3BB9B9FAFB9BB350ECFD7DCBD44D4DD7E
7684:10E02000DB7CF712967747A4CE31B7EAECF5E53101
7685:10E03000FB813880B19F794B26938F06C03EAB6B36
7686:10E0400012C6059E61FC356F8A57847CE4092B0457
7687:10E050008CB78C3FEE6EEBA2E579C104FCBDA379D1
7688:10E060000F2CCE817B08AA3B597C6F90B828FB67A8
7689:10E07000103F39C0D671282F02F9B67BDD764DBC32
7690:10E08000BF5BAEC9867BF70277DABDC03FC5B77A02
7691:10E09000DFC7FB1C781C425D57773516631E6BF19A
7692:10E0A0001C773ED0BD3864C5DF1F2CB610C946F5BD
7693:10E0B00058B1442CF01CA410C90A4F1BB1C0336FD7
7694:10E0C00019BB27BBA47126DA07CEFC2205EEBF2DB3
7695:10E0D0006E7FFE73685F2A85F7B3732D0C3FC5ED25
7696:10E0E00087BF02FE59E02DC2BCC3EF6C5174FEDF46
7697:10E0F000E890BE7C4D9BBE9C1DD697733AF4E5AD6F
7698:10E1000070C799C68E38B0D78CEB44C519764EEFE0
7699:10E110001501D62688079B519E0A2ADAF3603FFA3A
7700:10E12000CC8B0E137CDFF317E6F7F66EB5E27D6F4E
7701:10E13000FBFF602336C82B7CC9BA11BE9FB185F2A4
7702:10E14000200E47EBB3DFD92A0A8D02FFEDE5AB5570
7703:10E150003F3D3806E6F5F25F599E4CEF5633FE7EA2
7704:10E16000CA99DDCFBF08FB6267B65E8176D62B42C7
7705:10E17000C004FD065632FA1BF9B4628BDE2FBE3F97
7706:10E180009EE99B1E81E1FBCA46FDBCAF0AEACB3F7C
7707:10E190008F67FED45CA2799F01FBF7EEFA14585703
7708:10E1A0009F8D7EDFF0435C2E5E784151F956E4F797
7709:10E1B000B311B7E6FCD29EC8FEDDBD57405E05E058
7710:10E1C0006258E47D85615CB5FFA278B60F9FC4F705
7711:10E1D000677A5F17113FA70DBF5BD867D7D5D6A465
7712:10E1E0004ED1AC43258DFB938BC13F6ADA9F3C57E0
7713:10E1F000B3BE546E3D987C07E62549F8BB4C95B3F9
7714:10E200009F5B3B2109DE8B218017BE43DCAB3BF4D7
7715:10E210001B27D4A3F6EE585183F7D2C6FB52A7684A
7716:10E22000E4F46FE54B559E2AB97DB22BBFB310F2D3
7717:10E23000C42B1AD9EF3755847E740BFCFE22696219
7718:10E24000E74CF324522452F9A9DCFEA31FC2EF715C
7719:10E25000F99F1EE701786817B7C2FB8A964FF03C1A
7720:10E26000C12AC3EF08A8CF7D9CBEB47ED844EBAFD3
7721:10E27000BACD5E06FA89F6FB1A940F646EC4FB4DA4
7722:10E280009CA7589C96BE7F0F7E12E5D4E4C01B77F6
7723:10E29000D0A66748E89D1B3260DE7A3EA37C2B80C7
7724:10E2A000DDD5BB59C0DFB5A59656DECD60527B9754
7725:10E2B00062DE2DFD7E77B4F3CE0B83FA7E8CF4FF05
7726:10E2C00003E75FFA97A9E52363BD013302782EB116
7727:10E2D0007209D5771A3BBFF27803DEE7681C078323
7728:10E2E000709A7C03582FDD28DF56F5FE21C192C7B6
7729:10E2F000F36687B332DE5B08FC4A19A5E26A32C5D1
7730:10E300000DF8BE994C83E72B4278AD28323D8171E0
7731:10E31000A06D71A827BA5D5DCF3D05FCD5321AE32B
7732:10E320004F83F979CF6E7718EF79ECE1F1C96E1769
7733:10E330002B97B75B310FE6CC5905F5E8D2D04127D2
7734:10E34000D0A3FB45AB097E97F4CCF60193214FB2E5
7735:10E350003BC4EEFF3D1D1A80BFFF1A6BDD32EA039E
7736:10E36000759D3C06FF84F534DEFB35ACB76439CBD4
7737:10E37000231D34A0263BDAEF49A8ED92949A6CF065
7738:10E3800053FE17A753B28F00800000001F8B0800B8
7739:10E3900000000000000BDD7D0B7854D5B5F03E7316
7740:10E3A000CEBC92996466324926218F09841020E000
7741:10E3B00024860814EB24040C187542D1A2B63880C8
7742:10E3C0004080BC44DB46A55F2624424251428D0872
7743:10E3D000087140B1F48A6DB0A8C106EF80F86AB543
7744:10E3E00037DADE5EB5FDB92370295A1E23F452DBFD
7745:10E3F000DBD67FADB5F799993349AABDF7B6FFF7DC
7746:10E40000FDE9478FFBECC7597BADB5D75A7BADB55E
7747:10E41000F744BE6EF1EC2D60F01728509C8C5DF235
7748:10E42000BB3C9BA0BC4482573318333A7C465B3AD2
7749:10E4300063D672C6BCF0CFF186BC5786FA53B2E7FA
7750:10E440009BB6718CDDC57C0686CF72BF818D853E03
7751:10E450009DD0388BB1650A0B290E782EF4BE2F4D56
7752:10E46000A53263D07FD92E29D801FDEFDA6C64CCB8
7753:10E47000C4E8EF33F8B7A217CAC5B1F22A16343090
7754:10E4800019FE63575C3B187F95123A2AA530B6DA1D
7755:10E49000C442C930EEEAA7B4FDD6B010C1D370E0D3
7756:10E4A0003363FCF8303FC600B4FF64EABCBC6EDBEB
7757:10E4B00034C69C0628C3BC236FEB838887FF907DFE
7758:10E4C00034AF35CC4FE3DCDE5AC54EA531D67C5F88
7759:10E4D0006BD65DF0BCD87A7FD65D57433DC201DF75
7760:10E4E000B730DE9FC1BCF601CED654B3502EC0B7B4
7761:10E4F0001CE69B5406E541293405CB26164829E342
7762:10E50000EF53CBF87CBD71F0D5B31EFA5EFD2EED56
7763:10E510007BF68B34C267031BA27AF6545C3DE0A302
7764:10E5200041E0A1E100BC8FC3C3CC0352C07A159671
7765:10E53000821D19005FD359C63641A9E9D06746CD7F
7766:10E54000F8AC8731C04366126366A0D7A3125BD4D0
7767:10E550005F42FD26D64D8136F8771D96DBA9DD0991
7768:10E5600081BF476F5991E587765BEC50CE16089EC8
7769:10E570000EDFD0E1C7A91C32C17792AE8E96A9BE3C
7770:10E58000623D2FD7D98A6BB6E730B64DEFCFB201D7
7771:10E590001297C9BED77480BF271DFE5B90DF96E936
7772:10E5A000BC790ACE97798B7C00076BE57878ACACA8
7773:10E5B00065624B490CAE187C9CBEDBA4FE900EF845
7774:10E5C0002C7058F2EC7323DF46F47E4BAC5DB34DF8
7775:10E5D000A279A41E0BBF3606E9FEBCC4F642BB1DE1
7776:10E5E000D287AF8D817E3BE6B95907945D4027B94C
7777:10E5F0000CDFB34E09F0527EA8EEEE5791CEE549FE
7778:10E600009EF1F0683C5429375A68FE77FA009ECC98
7779:10E61000E4963D3AA8CFBCB3B80CF91BE67DE702FF
7780:10E62000787FAFCD4DDFCBB270BABBD6070AD69696
7781:10E63000E0F77D77BF0ADF8B4C49F2E0F7330157F3
7782:10E6400056073DBBCCD88EB54BD8EED1143E7EBA22
7783:10E650004EBEB30ECB65BCEC582779F712F36DA50F
7784:10E6600079671A590DC289EF8325B464BC07A93EA6
7785:10E67000C8E93BBBA514C7CB1CC79F4E432807C79F
7786:10E68000794BA5F760968E6520BCF0DF00CFBD0703
7787:10E690002B331DD0FFAD732645970A4F176343D820
7788:10E6A0004E0959183E0B8B797B93685F3A3B1317E1
7789:10E6B00083334FDBEEA2DE9B7A35E025F08ECC90E3
7790:10E6C0001EBFB37853EDD0EE4B063E8F443AF62191
7791:10E6D0007D603ECD9F02E46971745B74C580E33553
7792:10E6E0007FAAB0E0D5B1F7E7DA4C2C58142B37D419
7793:10E6F0001F9B8BED1AD9D006E4ABC6FE64168CE3E3
7794:10E70000F72F258DFC5D95BF9B3FD5B1401AB16FAA
7795:10E710008ECF8AF8896C588EF01F91D83E86F50608
7796:10E720001688FB7EF3A70E6D390A67068D136BC73B
7797:10E73000B4ED067E4FEDD8F4700A7EE7822D9CE2A0
7798:10E7400010F3C37ED9326B41BA5C0CEA027A58C727
7799:10E7500017DCBCFE226335FD96587B75BC0B8B0C19
7800:10E760002C44788FD0B8889700C8B69D839F18DC5A
7801:10E77000506E183C4A7851F9211E3F8138B991D129
7802:10E780003114D2C19AFE856D5557891948714C5D77
7803:10E79000BF6BBABCB3A05ED669D6737279747D9331
7804:10E7A000587954270B79D0D0553D2BBECCDBC7FA16
7805:10E7B00037D654C3FA2F2FE1FD4FD89ADE58AFC495
7806:10E7C000E411CC230FF1122D9B12CA16284F892B6E
7807:10E7D000DB12EA9D09F5AE84720E6F7FCE1ACA93E2
7808:10E7E0003D8C7D645B5BA3807C3997155A2C417905
7809:10E7F00073C7BD35D520E71ACB87BC32CACF41C914
7810:10E8000023B118FE9A3CCC1B04FC593C61C3B212E4
7811:10E81000C4C3D06BB8FE1B06249B047C6EE93F1872
7812:10E82000A232F673C7F5EB97A85F43FF87D46FD486
7813:10E83000F18B75B48E37159FA4768000DB69A0D369
7814:10E840005799C45201A5058AFF8FA8BF1AFB7FC341
7815:10E85000F52E8B18F8FCB81CBC90E57D85E4E01122
7816:10E86000C986EB2ECA7738AE25C6EF6AFB5F4D1915
7817:10E87000FC571C26F9DE4FDA1568FF7F1A7F338DAF
7818:10E8800001A97E854D66A05C0D4E447DBC93F927A1
7819:10E89000A21EFA7AE3F8A33A6877421FDECD005F42
7820:10E8A000C5F64D350AB43B610DE74A2043266DEDB0
7821:10E8B000E5E5F4F06EC46760EBA384DF13B9E15CB7
7822:10E8C0001D94A7DA43BC3C3EBC1BCBB76E7D86973C
7823:10E8D000A7847365E83F3670A0A61ACAFB6C23AF05
7824:10E8E000D77C3B97E32A7C97C779B3EDE9C8765C80
7825:10E8F0004FECD603C6401E2E5EFDF1B3FB000F8B1E
7826:10E90000EF4F2639B5EFDC57E6FB68FE019F520159
7827:10E91000F290B33ED763248F15B203B250773962B9
7828:10E92000F4B0E60DB949CE4F6A3988FA3E737109E1
7829:10E93000C9F94F53BDEDF669B1E72719F00438DA8C
7830:10E94000ED362E97659D97DA3F6025BB678B99CF93
7831:10E9500007D60DD1D722E8512EE6536ED7D133CF4B
7832:10E960003687C6FB40F2EE30C9F8640133D27355E6
7833:10E9700012D91977EC01B90072B957C0DDBB7562C5
7834:10E980003000E3DF21311FCA8D5EBB370BE5C30BBF
7835:10E990007F91EFC4F9F69642199E3F16F2BEB7CEAC
7836:10E9A0009B658FD38BBD7B78BD2A777A0B787F559B
7837:10E9B000DF6476F0EF646E99B817E791AC302F966C
7838:10E9C000972F2ADADB4E7A7B01CD9B79BD5912CC89
7839:10E9D000F7F4AAB13AB42355FAA4157A6FC2F9DC58
7840:10E9E0008EE35B627452BFDF8EF346BD2F83DE87FA
7841:10E9F000F93EE0F0D3FCC10E984A76A0B003DA717C
7842:10EA0000BED362F8654A781ABEFFFF084FF760FD73
7843:10EA1000FF144F23C88B00B66B6C0579A18B93173D
7844:10EA2000027FDBA4903E93CB0B0FEA397CBF00E45E
7845:10EA3000E3ED36FF468447FDFEE2071AC9EE53E1D7
7846:10EA40004AFED68B355F65C3D759A25D76E203D304
7847:10EA500066067AEC84A19FE4E289F9CCD38EF24376
7848:10EA6000C7EA118FAA5D5971FF9AB718D8B397ED0D
7849:10EA700032D1B95BF266E1BCBA81AE26D4C37586E9
7850:10EA8000E0BE82985EECB50777AC40BADE52E20990
7851:10EA9000B8493FD27A0BB42653BB5E7B9829583FC6
7852:10EAA000C36D034890CE448FC86D86E05E09E9CD02
7853:10EAB000F9A577D5A4604022BA07A8FF6D9C7F7A9C
7854:10EAC000EB18D9F7BDB7B9886FCC2C68467846E308
7855:10EAD000838C0E467CC414EFD43A6B0C0F3F13EBBF
7856:10EAE0003AB93CFCFCBFA11DB9D94C7624EA4CDCF8
7857:10EAF00077B19E4C8217E8F902F187BA5F7A242B2E
7858:10EB0000B889F6679E0AA4C746AB7709C1FFED64D2
7859:10EB100037C2BFCBCCBA4C65B8FD609D24EF043C36
7860:10EB2000ACE73186F6D99DC23EFBF7FA4B56B403EB
7861:10EB30005EB573FB0A19C504F26F29E3F54BD725BF
7862:10EB40007F88FB99A5EBE49011F62BAC6B8E371CFC
7863:10EB5000B7CF208E82F1FC425EB2ED112BF28D1FF9
7864:10EB6000FBA5E0F87FB4BA2D5886FE5391ECD0BFD8
7865:10EB700038D6FF3DB16E17CB1C7ED696EC46FC26F0
7866:10EB8000CAF5F754F87A1EF3C67F4FFD4EE2B8B0CF
7867:10EB90008F7B1FF105780FA5A23DFF6D99E89A08BC
7868:10EBA000AFD31079C80CF58BDB64FB7AC0A7BFD557
7869:10EBB0004AF355E1BD3333722DEDAF12C63F93DCFE
7870:10EBC00054A1E0FCC5FE83ADD3EEBF1833C4CAC068
7871:10EBD00017CB5984F631C3DE8B7D6BE2BE8FB1BF9C
7872:10EBE00018E3DBA9EB85B9A504F8055FB92505E9AC
7873:10EBF000E69738DDA2F44E805BC5A7EC18199F4E4E
7874:10EC0000433817E595BFD5487848ECAFEABDC7CC87
7875:10EC1000B03E80AFB64B12F1E3F6FB92498F311351
7876:10EC2000A763F3EA2437F2E74E43E4695A372F1912
7877:10EC300019D2F5A239F202C9A342EE37B8F83379F6
7878:10EC40000FB6BB90CEF9FAC2613DAD270E0CD83B92
7879:10EC50003F93F752BDC4C7BDD09EECC6F5D88C9883
7880:10EC600084EF3707FEAB8D01FE4EE9F83EB87940E0
7881:10EC7000BBDFBD00FFEACB6272E122E3DF090C706B
7882:10EC80003900335D45DFB923896D82719B7492171A
7883:10EC9000EDA3A6D593821D9C5F4CB85E1A04484D27
7884:10ECA0003AD8F795C5D67793EE6411EE9B1A4C9B34
7885:10ECB00087E414AA3F8EFB2D86FB25E8B71A3B1587
7886:10ECC0000CE7E7A6CDBFFD33C2DD74484BF78618CD
7887:10ECD0007F489F49D83F8E5F0A627C40F635CA87DD
7888:10ECE0006A161C2F713F0C96936B8682E887691613
7889:10ECF000FE89F463E1B9C81FD6F27EB6149ECD67D3
7890:10ED0000B97D317370CF2BB8CFB5D70CE5E2349B0A
7891:10ED10005BD75E7DFAEA187D5538670C6E9571FFFA
7892:10ED2000A6DA2571FBC7890BA6C43FD7533FDC8FFA
7893:10ED3000E2F7C2F80AD785C2F5D936A1CF40EF91E4
7894:10ED4000DC5DDE3381F41EEA25945FEA7E16E51968
7895:10ED5000CA8F271D558B1C30CF92B4AAAF38A6F1AD
7896:10ED6000EF901D8F9BA019C3F199A857D476B8AF27
7897:10ED70006DB18CDE2EEAE7D991CAE583225179C5BF
7898:10ED80004FF57B36117C0AF1CBDADD05246F557F18
7899:10ED90004C83F043AD10FE9B15C27FB372BB91B99B
7900:10EDA000E3FD55416DB941ACF74616E67EACFD502A
7901:10EDB0001FEFB7A966212BD6A3FF069FFDDAFECD74
7902:10EDC0002C385B41FA0E7C668C7FCF7AF97CEF148D
7903:10EDD00074DF61E67E9B99EBF6C8DC19C5E79B5AA8
7904:10EDE000E62D7810F5C49B7AF22FFC87A0938A1742
7905:10EDF000A3A3EAEB88EF24DC8F61BB078D8497D354
7906:10EE0000A08F0F0ABFC602DC67B6F9B30A0B113D2B
7907:10EE1000B6BC05D6E1F8DDF492B91EF965B343A797
7908:10EE2000E1A72A879ECAE4EF41BCB727935D0D682E
7909:10EE30009E8A7C543156D5936C2AFA993ED483BD70
7910:10EE400005E5A65B2D7E1C2F8C7601947708F9B51D
7911:10EE5000C361A0F1D472741F27F805BE43E3A1DF9C
7912:10EE6000C517C707C168FBADC25EE47261DBAA24A7
7913:10EE7000924731BED531E2DB129F01FD452F0939A2
7914:10EE8000F2122094F651FD662E47142E9F5E3A3BF7
7915:10EE900089E4DE1B1FAF26B972695112334AD4DEF2
7916:10EEA0002B61FDF3C6E07A28DF25FCA82F49DC0E94
7917:10EEB0000C1CB1D2380D06FF0EF42B343C37DE03A8
7918:10EEC00014632F1882DF7F1AEB5F3693DFAA218548
7919:10EED000C3D9F0D21892933FD6079FF901F9218C3C
7920:10EEE000649F3524B953A9FE27690CEBBB92FD83BF
7921:10EEF00048CF6C23B71B1B0CA1223BE0F16490DBD5
7922:10EF0000BF2751D0E0F88356B26B00CC2CFCFEA991
7923:10EF1000EE4CCF26770C2FA71E9A4CFCBF4DCFE9A5
7924:10EF20001638CCFD9A27F5BEB959503EF97CA90791
7925:10EF3000768EECA2CF1032008CCD5BB8BDB64CE71C
7926:10EF4000EE6B45D9F472B247B3DF7C78652DD637C6
7927:10EF5000AF5E7713CAC1D1D633CAF3787FED0516F9
7928:10EF6000C9A3FD66FDD8FE107CF7C2E0440FA94797
7929:10EF7000E60262039FD878DBD37AC037F2D7113D1F
7930:10EF8000F1EF171D1FE78BFB3FD42FF89D6690BF55
7931:10EF9000513F32C9DFB8B23C5299D3B3F9A54C61A5
7932:10EFA0009F69EBEF48F55F40B9D6F4DDDF9F682538
7933:10EFB000FC4648FEB11EEE1F3FADF72E463EB5574C
7934:10EFC000870C4BE3F6B78634BE8E9619855E6721B3
7935:10EFD00043FCBA53EB2BAAB47CAE3EF5697C1F69A7
7936:10EFE0001DE2727C78BD4EAC9BAF18516F71D70D8E
7937:10EFF000ECA7CF727F8621CD4DF533CF860CCBA009
7938:10F000009CBF2E6458219EB82E00DF2113CCFBF448
7939:10F010000E2B5FCF80061C67C57446F6C80A19EC34
7940:10F02000D0327CEF1E08035DCE3C6FE7FCF527C0B5
7941:10F030000AE07B0913ED8C60B782DC7AB1530AA138
7942:10F040005DBF64BB71AFB900D7B157B6223D774BF6
7943:10F0500024B796745616ED80F2EA435388FE29D3FE
7944:10F06000395FAE0EDA49FFCD147270993168203BDA
7945:10F07000FA19EEA783F1C91E6E804E5965C3F1805F
7946:10F08000F25BC30F416D9C6166BF90A7FBE3E20B8F
7947:10F0900063E3E47A7F427FB0E3B4FC1150F50E974E
7948:10F0A00073CC9D89724E95C34687AF348DE452610F
7949:10F0B00026D217E8C9E5E44189F0DAC85AB8DE106B
7950:10F0C000F23EFA5DA12FCEC801AE978C5BE93937CD
7951:10F0D000AD80E8B61AF50DF9CDF9FE6E343E989B79
7952:10F0E000A6137271643EB85EF041C35916BA16BEDB
7953:10F0F000D7B08E851AA7F2A7752AE941AE0F4D2227
7954:10F100009E61E2F18ECFD38B897A7098DE4BD077F7
7955:10F110009906A1DF049DE3FDD9A8EF67AE0BCAE80D
7956:10F12000D7CCB379AFCD4C8FD92FCDEF994CEEAB77
7957:10F13000B0EC63632DE89FA97CC685FE5DD88FE3A4
7958:10F14000BA4A06BCEC81F7BB55FBD6C5E7EB32707B
7959:10F15000FED52B3E566A41BA0CD17E3592CE6CC894
7960:10F160008F2A3E775BA15F19F6E3EB2DDADFC43A15
7961:10F1700093E2FA57BD6426B97AE5B0356824BBC37B
7962:10F180009F6F87F1327E65243BF4C24B56D29F17A6
7963:10F1900084FE73AAFB7EB681E8D38A744D476EAABB
7964:10F1A0001A83FE5326CD1F832250B5C31AEDA3F94F
7965:10F1B000B3457DC1D0AD9CAF8CB45FBC620F7F13F3
7966:10F1C000CB000F43FBBA05E98CFEF643B34B1F801F
7967:10F1D000F7CD3E8B8763DF5F8AFC6A94EFBD15FD38
7968:10F1E0002A73E57591FB601E8DB9169B11BA54E721
7969:10F1F000FFFA97B741F9A3437A66443AEF9BBD887B
7970:10F200008D1D5DFEAE0AEA4F86E3D6CB9AFDDA721B
7971:10F2100063BFB6DCCC9493E13879FC589AD5796613
7972:10F2200032C90ECF67C0DF4663CBD93D00AFF1C70F
7973:10F2300046D2470D69FE5D69E837D5455E433C1B04
7974:10F24000F3CF4D453F4555FE9F28AE73E5DBCC839C
7975:10F25000705F315792FEBEB2C3EC0EC4C9AF66C137
7976:10F26000FFBD79B554DFBBD3E896787DEDB40AB421
7977:10F2700007E9DBF867D201FE9BB7CFFB88F64D6844
7978:10F28000B543B917ED4BECF79C146C47FB713BD7BA
7979:10F290007BE7C17E34A1FE14EBA9591E9C6B82FF53
7980:10F2A000EC75D44C44F9A2FC59F121FD37E25071C0
7981:10F2B000F6EEE1E8FAE47E9C1BD08F338EFC3887B3
7982:10F2C000516E349AC2864A18E7BA3FFF8EE4F2CAFA
7983:10F2D000D6A564D7C7EC5C23C99195F7F9E9FD2B56
7984:10F2E0003BAEA7799D8179237ECEECE6FBB99539BB
7985:10F2F0009620C2779D9DDBBF2BA19F240DC74B227B
7986:10F300001E7EB3EB7A17D2FB378C7F2FD0CFED84E4
7987:10F31000DFD8865248FEB85B52D0CE6BDE7EFD470A
7988:10F3200028B756EE963DA8C7D9112BF93D56EE9E4B
7989:10F330003371B905C7B99C568978EB9B6393E9BDD6
7990:10F34000EC0B72FFC9D075F05EE9BBC68DEBE4F83B
7991:10F350006E2387CF6E7A1AE1BFEECF32F1BDA26382
7992:10F360007EB4577B0DDE89B8DEDCBBF6CD45BCFE36
7993:10F37000A62E5B47ED9F95980DF1606FCDC0F72BE2
7994:10F3800025C587EBAB7EFBAADA787BA4334D267CC0
7995:10F3900057E6AFCB085B88DF6F453DD7B85B4F764C
7996:10F3A000DDF1051FFCF236678CDF57CA3DB7CE8C06
7997:10F3B000B3379A77DD28F8013436E069A5C0933178
7998:10F3C0007F5D117EF7F3F87FE5FA96221E8FF9EB49
7999:10F3D000EB20BABE77F1F5F007D0F7B45FCF7168D4
8000:10F3E000ECFBD1F641AABFD9E461DE7D168A1B7A17
8001:10F3F000719F9BE754A83ECFC9ED6CE50F6BF7BF3B
8002:10F400000DF0F7A7F98D4E789FCFBCA5485777C46C
8003:10F410005605E6244E89EC1FB6CBC8ED4985FBDDC9
8004:10F42000B6A5B3A737C5C1998DE3A5D3FAB43961A1
8005:10F43000DC0BEFFFE935C45F53DEB9A93C9EF63B18
8006:10F440008A4F590679DCD2E2F131E48BE6C13A7693
8007:10F4500057494C1E367BB8BC4E9CD77227DF6734A9
8008:10F460003B23344E753A5F67AABF77676B12F9F595
8009:10F47000763A8366BEBF0D3094E73795CB3CDE22EB
8010:10F48000EC129FF09399BCAF308CC7308FEC190F02
8011:10F49000E521EFA9CE3428BF5D3EC72343D9E27DE5
8012:10F4A000B26B2CCEDBA317F5E3C85FF8D6AC4AB23B
8013:10F4B0004F6EF2CAF45D569F42FBF521EFCF9D7768
8014:10F4C000C1776F66DEB4D3F08D1A50D648C721FCE1
8015:10F4D00036DA018ABFDC19E75FBDD1332FED74BC8A
8016:10F4E000BEF472FD8FFBF17E113718090F25699567
8017:10F4F0003311BFD77D99D3E1E367F9FEE36333F7B7
8018:10F5000063ABED3EB6723D53EB94841DD89F87727A
8019:10F510003E5AFE5AB1260EEC34F4E7E13AFBADA4B4
8020:10F520001D6775978EE2B3ABBA18C5633FFEFE8BBD
8021:10F5300079286F3FDAF762DED238F812FBA9CF5B89
8022:10F540009D5ABF94EA87748AB8F4528F91FBFB46A8
8023:10F55000F143AAEDD976BE1FBB08D21DF94EED7757
8024:10F56000B13EC98B76E545662279B67450F835BD53
8025:10F57000DE4227EE1FD4FE09E36F41FE01B8A4016D
8026:10F5800089F6E7C9251192AFAB4CBED7C6B8312F6B
8027:10F59000C54BF499877494905FBD069CB722F679A9
8028:10F5A00046C5D788F45CDEA3A56396D326E2944EC5
8029:10F5B000A2BBA1C9A2A07EC8E810F2FA1B3ADABF2A
8030:10F5C00018B25D16944BD715257562DCDD9994321F
8031:10F5D00015FDE6B9D9C5D43E50C5F93A90C1C86FFA
8032:10F5E00095C55A2492B736EEE7CE99CE6C98E7F1DE
8033:10F5F000A293DB832EE6D92E933DD82F91BF5FCC0B
8034:10F600005F95EBC82F28E73E964CC42FD2A044F656
8035:10F610009DACEB5F8CE38EC63FBD09FCD3FB0FE6D0
8036:10F620009F3EF57BC3F8C74F71BAA52ED3C8FC2304
8037:10F63000FCAA5FB8FD6871C26F98543FB384F3AD04
8038:10F6400015E3D59A2C21792AC98773F1FED45D6020
8039:10F6500067E27E448D2B8EE958E2E676FA5018F781
8040:10F66000E5C9D79848CF7D47375480F67C629C1116
8041:10F67000286B47798F3286FC8AAD55BED36971FA03
8042:10F68000FE08DF3734DDE7A5F7B307B97E6F2E3408
8043:10F6900090DDD93C200590CE4D3E43D0544071952D
8044:10F6A00025A4B71F32BB799CC4DD4E71926FBB7924
8045:10F6B0001C25EA470DF73D80FC566F21BF4362BC15
8046:10F6C000E585BFC8FCFBE3197DBFB794C7777AE730
8047:10F6D000B9C9AF911847635DDAF5ABC6512E5A012F
8048:10F6E00031F0BDA59BCD44876C99E399A59AB87E6E
8049:10F6F000192E07C85F9B315D1046C43BA2EB1A244C
8050:10F700000396B345BD1A9FB196F80AD0C2BD3DED30
8051:10F71000B93793D2FF967C86D6EFFCD57C8680B134
8052:10F7200016F3194C683D8B7A041BF4AD5AF69ADD3A
8053:10F7300018BF89D52B60379A0624F1BDE76F98531F
8054:10F74000087890D4EFAFDFE4B550BC58F3BD78F83B
8055:10F750009484F1F530BEC52DDA070ECC9BA3505C26
8056:10F7600052D47FD68DF91B5BF4DAF108A5A23F16BF
8057:10F77000D4EF1DCF9CFB9DCD3931BD0F7680297D07
8058:10F780005A4CFF6FFCA0B6E72AF856B2EDB201F56D
8059:10F79000AAAAC79B9D3CBF2171BD3AD2F97A05FB4D
8060:10F7A000D5914E7283DBB5B5223E09F6EC5C5C5A0E
8061:10F7B000CDEB7C0CE393602F64A4631EC3FBE7CE08
8062:10F7C0001C45FA2DF898ECF9E64F15EE7701BB03CE
8063:10F7D000ED7393E07336A0277DABF2C16A217F7A87
8064:10F7E000EDA0EF915F8F48D302C4172D79B7000DBC
8065:10F7F000EE4FF7BA697CB1EF4A8477463AF7933413
8066:10F800001757ED28C2F19F9218EAFB4DC52733D058
8067:10F810002E691EFC3063795CBF55038F121E56EDB6
8068:10F82000D78F38FF19E9DCBE6C3AFC3CF9073F0E74
8069:10F830004AB496EB9560F74C28D7D7EBD04263E5F6
8070:10F84000C125B791BF7F91818D87F9E50B7DD4BC30
8071:10F85000FF2B8199B83F837F12BCDAE95B417A6F55
8072:10F86000E7229305E30ECDC54BEF263CD892BC882A
8073:10F87000874DC55559F89DA6BAB9368A13807D853E
8074:10F88000F54DF7DD4E7E1315AE4D03FA1AB4BB2AC3
8075:10F89000C0CEFA11C09DEB985FE381F537463E5824
8076:10F8A0007A8F05E3C223CBDF7FC9E0F4EC947C813F
8077:10F8B0009BCBC94FC8E2FD7EF903DC9EAB4B37689A
8078:10F8C000FCC275E9DCCE9C15189A8DBCF7B2124EBD
8079:10F8D00046BBB799793FC1FD25F359DCFB884E5CE7
8080:10F8E0008E38DBDCE43F3239C3DFB90AEB6729B479
8081:10F8F0007F604AF811FCEE856EA7671313FC8BE559
8082:10F90000FB4A822847FF39DDBF18F9AC42D88F1770
8083:10F910000E5F5F8A7E36D53EEADE630E621CB0DB88
8084:10F92000EAFE6E0DCAC13F283CEE6D8A0CCD467AC8
8085:10F93000FCD141E3769B83DD48FFC0563DD51FB621
8086:10F94000FA5721DF9CADAB29A2BC1B4BA008E3BC3E
8087:10F950007A670F433B01B60BE44F30397D0CE3A1CE
8088:10F96000B3034B1409E57C82DD315BE48F92F084B4
8089:10F97000F755428C8D072E3863A225D0F9595ACC01
8090:10F980000E79E34F0B157CA9DA273A138F67552FB1
8091:10F990004A6232F2FD86C86B3AF45F3B87C87E6DDF
8092:10F9A000EC97E83B8DC5CF513ED81A917714CDFF27
8093:10F9B00051C2940FB53E3D59E8F14ECEEF6C88F63A
8094:10F9C000CBEC00A7276361CA938AED23DAA99D3A9D
8095:10F9D0009E41F8DD1B85DF053418D53F94AEDA076C
8096:10F9E000EBC553CDEBE2DFDD260D7965C46BA9A431
8097:10F9F000F117ABCFA7D2B97D987A2C3217D76FE425
8098:10FA0000B09AA7C9F330774C9BE441D369589EE67E
8099:10FA1000C02773916FC0D0A6F5DA34F0C5F234BFB9
8100:10FA20002FF60DFFEB799A1EC9BB179E3F4AB7739D
8101:10FA3000BF959AA7E9E1F853E36C89F99917B242A7
8102:10FA40000ACFB70AF7ED43FE1C30521E57EDC0EB4C
8103:10FA5000EFA17EAC35B17E8C4326DA196DB6AF0CC2
8104:10FA600022DF5F3C7FA6EF418679BA2F78285F239B
8105:10FA7000C17E48DC27ECC52659A3DB7BEF46E9C9EC
8106:10FA8000EDBD68F97FDDDEE3F67C601FCF0F50E54A
8107:10FA900079B3D89F5DACBF94827AE644149E843CCF
8108:10FAA00086A7441EC3E0C8790C8AC807027B3D4084
8109:10FAB0007C7290C775DE783A99E4C7259BB217ED42
8110:10FAC000A5F3D6C83711598AB0933A8F18DD282F7D
8111:10FAD00040DE91FC0E1CD4F3380DC66D308EF3F26F
8112:10FAE0004411C711F1A29792C96E694871A7627F4C
8113:10FAF000354EF363A16F1A92787CA62BD97F397D9E
8114:10FB000084B8CD1E617FED81A16C38DE7B4611C7C4
8115:10FB1000060181FB9D877279DC41C46D2E8AB8CDC8
8116:10FB2000A9625DC8C0FD10E4A77277292C0BEADD3D
8117:10FB3000EF99836EEECF32E940EF2F53E3362F7308
8118:10FB40003FD532119F39B5602EE5072DC7FC7719D7
8119:10FB5000FD18DCCF1CCDC767361DCE670D888B9D89
8120:10FB600028620280F56BE0B5A493D09E707742992D
8121:10FB70008C656F4F0D7C7769A78EF623CBBAB4FEE8
8122:10FB8000F22B9BEEAE41FDBDB193C71F035D12E9A1
8123:10FB9000EF65CCEB427B43E587828C34A273A053A4
8124:10FBA000E7C5EFCCC8E0FE04407D90E6279E9D7A35
8125:10FBB000E1671770B4335D089F3A893F37DA949A4A
8126:10FBC00011F5B218AF53DF62AA443B3657477EDEC9
8127:10FBD0002B06EF22F2933A8A886E9DD696AE1A5E75
8128:10FBE0004F6BE58A39E2A3FA6B156EE831B703E58E
8129:10FBF00064668688DF24CC77798FB69C187F581589
8130:10FC0000D4969731FF842C3C87B05FFB3E3383CB87
8131:10FC1000A92B9B0A849FDF437EFE4EBDFBDD029431
8132:10FC200053DD0AC9C9F61C8E2F5D2E7F8EB5572F66
8133:10FC300022FBC00E7605C1CBE11F7BAD53427DD9BF
8134:10FC400069E77CF93F853B11DECA8C226E27A071E3
8135:10FC500087EBA85B0A727C71B8BFA8BF626986F0A7
8136:10FC60001708F9132DFFEFEF37393F76CB62BDD977
8137:10FC700048FE2C15F1C65392E7E910BEB7805D002F
8138:10FC8000702FEB96CBD03E99FD150BCDA3E9657394
8139:10FC9000D008F58DEBC279B88E9AAAC2452D23E023
8140:10FCA00015A15554B905ED963A617F80EBB64B1B13
8141:10FCB000871A1E57F47E2B231DF721A70EBE8EF444
8142:10FCC0003E6826BD04FF75D488FE8EC305642F4DA3
8143:10FCD0004DF5B765A03E4F0AF57DAF00ED136E1FE1
8144:10FCE000350E1AF7A0FDB7B4537B6E866DD6C6B934
8145:10FCF000589783FC19AC57FB1ECFA768FA0D8B7B76
8146:10FD0000713DBFCDE09F8876DD755FE6F1F5F3AB21
8147:10FD1000740CE9BB4CF6AC403972DEACB5BBCF5BC2
8148:10FD200039BDFAA274F614219DFB46A5B3A708E9D4
8149:10FD3000BC4CC7FCF1E334229DAFC6EC734EE7F335
8150:10FD4000CF5F5384743E77F09A22A4F3367D8F17E9
8151:10FD5000D7CD930EFF5EC4CFE9393EB29BD4BCC968
8152:10FD60002FCA8F8732B4FA305AFE3BF93F46D3830D
8153:10FD7000A1281C5A3DE834B873501E2E3519FFAA2D
8154:10FD80003EC4BF11FD692623F9235EFED3E58751EA
8155:10FD9000BF050665B23FD4F15E56FCE3D05FF0F2DA
8156:10FDA0007B2E4F401A7DFC066157B94C2C807E0F8C
8157:10FDB000D5DE57EDC64479FC0B319FD319DE1AB45A
8158:10FDC000B355FF6CBD18D314BCCCEDD3A724F2BF40
8159:10FDD0009ADCFD3C7FFEC8121BFA67CF06B93FB61E
8160:10FDE000E9F952F2D7AE0ABE12C2FC273628D97002
8161:10FDF000DFB0EAA90F53309E0DFBD0531971F19576
8162:10FE000039621F7A36782A05E3DEF0FD6AFC7EB29D
8163:10FE1000336240FE6D82FD1934614D4A84CE0D354A
8164:10FE20003919E9FBF201ED7E4D8D4FEEF41948DEF4
8165:10FE3000ED1C9482B83FCB30F80B72503FB11CDB05
8166:10FE400099E4D87AF924C36BCB9C161F17F65ECEC3
8167:10FE500088CB570AEF48253E0CEB9997EC801D564E
8168:10FE6000219778BCE63F77D9833C7F89B7FFCF6085
8169:10FE70000195557DBD429CC35B21CEE1A1FC0E25C1
8170:10FE8000C8EFF87234DEAC9E3703791E1A29FE1DC6
8171:10FE900097B714DFBF8945447EDE6746CDB8D17C75
8172:10FEA0009D965237C0BDE66B163A67D80C7CDD5A7A
8173:10FEB00016E3C3063115950F9B845FB7B9FE24ED99
8174:10FEC000039AF17C05DA551ECE870DB03FC2FCCDFA
8175:10FED000C475CBFAB5F98CA3ADE329995ABD122D9F
8176:10FEE000FF83FC98D333B5EB579DBFEA078FCE73E2
8177:10FEF00050E2EB2B615E89FBCA44FFB5BA2FFCA22E
8178:10FF000072EDE64CAD5C8B96FFC172ED8ECCD1E408
8179:10FF10009A363EF037CBB5C4384121F77F639C0059
8180:10FF2000E3B6FFD338C147EE9E0C1DCFC3D7C44FF5
8181:10FF3000BBA4969B4CE330AEC8E3CB8D5623C56182
8182:10FF400013E3AACDEEB9228E38F4CB19A8370FE906
8183:10FF500019EAF37ACB4A8A5736CB070C78A4705843
8184:10FF60003C51394A76FBDF1A575F9F198DAB1760FA
8185:10FF70005CFD15CBE5347F1C3DAB4AC0C02F193D5D
8186:10FF8000DF68B3A053B2C88B302901668FEB3F5AAC
8187:10FF9000BFDE4C6E27BF22F2635C069EC7BEC50A59
8188:10FFA000FB3098BF4BC7F377EE4FF76D43F968729C
8189:10FFB00073FC3E71F8AB0CCF1D3DA1EF27391268E1
8190:10FFC000B478501EAA7E17757C45F80FBE28DFFF57
8191:10FFD0002081EF7FF077E6FB447C0CA872E76F8D01
8192:10FFE000876D07DC68D607A3B8D75B18CF2918CE72
8193:10FFF000C7A38D331A3FFF34D3F75A26C947EF54AE
8194:020000022000DC
8195:10000000CACBFD82F226B93C720AFD3BEC90D18D41
8196:10001000FB0D933897C13667893C4A4F451DE51360
8197:10002000F3730DEAF98FD1ECC20FA3729ADB851F2F
8198:100030008E2AA7FF7B76E1030EDF299CE7E94A6F52
8199:1000400011EACD8D56801FF77BDF378E78CE423D8B
8200:100050000F00FCC4CF9B3CCBE3E0897CF58704FD1B
8201:10006000F287BFB37E194D9EEA5D2A1C7F67795ADD
8202:10007000FFC714F47B8E3E4E80E0A8A81AF28AB81F
8203:1000800015C3B8913A8FE6219E7F9621F2AAD4F744
8204:10009000116117DEE9F266BAA0FFB9F74D26960A9C
8205:1000A0002610F218DA633E0BC5039AFA799E48D3FC
8206:1000B0003A46715FF51C65D3401D43BBAF3FCD5F32
8207:1000C0008079601B3FB004E454F4932F6068EF5DC7
8208:1000D000789F971BD2FCE3294F6C5D581377A8F8E3
8209:1000E000ECF206F46700BCE41F708AFC4C15BE3AC3
8210:1000F000179767EAF32681EFE8BC9C1C4ED62F07C2
8211:10010000D14E4C760F911FA9E91037DE2A642FF9E2
8212:10011000EBD91A079D9F683A54594AE7CDFBCDA504
8213:1001200068E756FCAAD686FE8973D73A29CF204FB6
8214:100130000EAF423BEB9FD3FDB3105E6B79701EDABE
8215:10014000A9F960A7A2DD7BEEE0BC527F9CBF7B1BC0
8216:10015000FABB61DC6D56AD3F9B99789E78FD5E9E43
8217:10016000077CD8EA9F8BF8DD66E6F006B68ABC67A6
8218:10017000E1E74E5CFFEABA8F9E73BCC344716955D8
8219:100180002E6CD3333FEA3D559E94883C39C007CF4F
8220:10019000D31BACE3F91EA26C716AF3154F67CC292F
8221:1001A00041784AD0D13B0DEF518848E8775F2EE285
8222:1001B000F0D78B7C0A357FCAA8F8BE8EEDD9BA9AE3
8223:1001C00058FC7D2CF617F177912793FC29B79FC730
8224:1001D000DA0CC43756585FE41F01BE41FACC8A0CD2
8225:1001E000CDC6F34485BDA15988CF973FD5113E9424
8226:1001F000BAB7287E928A648371C66D0E774F403FEE
8227:100200008AED17D7225DDC3DB62A445D7F9AAF9117
8228:10021000E0505A8A715F59F5AF7A9E07782499FCAD
8229:1002200003BD790D940778E103E388E746D467803E
8230:10023000ADA7BCBFB1033F273FBEF59034623E6718
8231:1002400097CBC2CF0D078628BF8CCD72123E942368
8232:10025000BFA2B8AFD2AD9007A353EFD5E139A84004
8233:100260003B23FFE5F85E9B0EE9922FF24B2EBEFC7E
8234:100270005F53FDB44F51FDF6419E0FA40F6FC07D3B
8235:1002800097D21EFE32AC60D678C8AE6B2AC1F1227E
8236:100290004D3CAF3D99219FE40F8C5BFF2528E7770C
8237:1002A000D99884F2E7A535F9E42F85798E1F619EF0
8238:1002B00077BB78FE8E722459877A4BD9CA28FF50B3
8239:1002C000B1675411DC8F4219C65923F8468D470295
8240:1002D000B82ED44777BAFCBB11CFD17332AD49FCED
8241:1002E0009C8C3877696DFDE0593C7FD267E0E70C64
8242:1002F0008FBD3C7901F9EDBA1509E970C5BE24DF5F
8243:1003000006EFF78B756B558698CD128FFF63946F50
8244:1003100039F608CF4B53F49C4F946EE71EF40B7ED6
8245:100320009AEAA7BCD26B3B4332C5B36CA71FA97135
8246:10033000C7ED6BB6733DD2B49FEFA713F7319FA7FC
8247:100340003F8EBAB47649B4FC0FB24BDE4AD01B7F65
8248:10035000F3FE8469F77589F649E23E6E98DD9D30BB
8249:10036000DE68768A9AD75115FB0EF1C32B56D50E4F
8250:100370000A68F25EAA2CE2DC9B493BFE53224F47FF
8251:10038000CD83C9E870B7635E79E4DB8CFC6C6A3EB0
8252:100390004EA08AEF1B023A139D8773B11ECAC31980
8253:1003A000C3429244F67F98CE7566623E0EF47BDFC0
8254:1003B0003596E0DECD3C5D32C943B784709B318F0A
8255:1003C00083F236833B56E0776EB1D077CC98C77115
8256:1003D0003586E2BD3B507ECEAEE771886CD0B7C8A3
8257:1003E000B7D9859C0FCD8B783E879AAFA1E657A8E9
8258:1003F00078A812F8CD9EB0A200F707DD92FFFBEAC5
8259:1004000079DAF873D2D1F3D1ABC6D27993E8F9B9DE
8260:100410004226EABFD839E9447CAAF91D5536BF2DDA
8261:100420002B7DF87959953FE2E84670ED3CC2EDF539
8262:10043000AA7A03C17F71D57CF2235E5CA563B86E96
8263:10044000AA068D9CDF12BEB7337A0F46D04CF75DFB
8264:1004500008BA7F9EBD0AF42C463FEDB1B69AAB4F69
8265:10046000036E8FB7F9E879D12CF5CB57D179C6C592
8266:1004700028992E67EDACC57B0A2E5A237978CFC117
8267:10048000E5EC076FA4727AE4049653761EBA11EF76
8268:100490003DB8383ED287F71E14EEACE4F5C883D9D8
8269:1004A0008C5D9555716380E6CDFD4EB363E7B3CBAC
8270:1004B000113F8D2CBC6188FC3B3C7F1FF3FD900EEF
8271:1004C0002E8B81EC1997C8B364D522EF12233050DC
8272:1004D000EEC82AA578B585B90F0D617D0E3F2704BA
8273:1004E000F5C4BF1DE3B95FD824E8CA72543F52383F
8274:1004F00080F2A9A3C04EFDA372F49031C8FD59FC4F
8275:10050000FBEF3C3F85E24B6AFE2863B6DC8553284F
8276:10051000DF445356EF37608A2D17ED850EBDB04B83
8277:1005200045392DD55F97156717BD33E75B25B80EA5
8278:10053000CEBFF04021CAA5EB0D60B78F20877E9D0E
8279:10054000CDE5D045BDA54B023BEDE729FEDB719C17
8280:10055000F79217CFB5C3BC16A5551AEC086FE0FB90
8281:1005600032CAC574416FFB420E9FBDDA272D8771D9
8282:100570003BCCB07EA17FBA5FF1529EBD7FA1740BD0
8283:10058000C0DD2171790B9D52695F52EC4EC5FCE5CF
8284:1005900006715E5216EB7E46FF5619EDE977DB06D3
8285:1005A000662A8531F87E2EE2CB3F2F6077D68DB05C
8286:1005B000DF6DCDE2727B81EC9E827CB4411A78AB18
8287:1005C000360BDFBBE9FD9C94D672CC3BBE3EB9A591
8288:1005D0001CF5CFB0F7A9F0BE24AE6CE4ED1A4C9137
8289:1005E0003C3C9FEC4DF6AFCBC2B8D0920F296EF9D0
8290:1005F000CDEC774E60DEC13BFA9ED929A85F0AC4D4
8291:10060000B97EE1377C6D82EA3734F1F264EE378CE3
8292:10061000E6734DE1F964B50BF939C55A91AF30D79E
8293:10062000C6CFF5CC2D2FF074008837B18882726F59
8294:10063000EE7BBE14DCB7B385FE72DF94D1ED19E614
8295:10064000D2BBE3D7EB3C775C19FEDD50AC2DDFE885
8296:10065000D1966F9EFEE709F1E53DC9DE1D38EF1F1B
8297:100660004B3CFF313083D9689E4E298076C7E41712
8298:10067000B3C5F94E9EA7F74F625FF4E27446F519D1
8299:10068000FB4D7B31FF5DF533CBA27EB28B99F21D22
8300:10069000FCBE00D4571149E4FB392996C25EB8DB91
8301:1006A000C6F1076D0D30CE0B4BDCB43E322C3AF662
8302:1006B000655C43E526B2432AC69892906F8E09BEC8
8303:1006C00053CFEBAA7C58A1301FE62FC0A717E2F347
8304:1006D0001DBDED28FA97031F31C6E955A950FEA1AB
8305:1006E000F81663ED547E4CF0F7310153E0DB0AADB0
8306:1006F000E757AD06A2A7FC13790FEA098CCDA0DF5E
8307:10070000F8D2E649049FBA7E6055173A33C8A52D42
8308:10071000C655740844B1B02754FE460B08DB8DC1A2
8309:10072000FF2C203E27791399C6EF4FF879019727C0
8310:1007300091AD0E711E8CC7CB724DD171BD386E5606
8311:10074000F43BFCBC51862843554807F3FE4D560147
8312:1007500097CB83AFFF81F4B2C5E3C7EF18524C7457
8313:100760004E465D37B6CEDFBE553B03E759F40D9AD2
8314:10077000E77CAB0DE7590C6CBDC8414F6F1A8DC7B4
8315:10078000D78F9CE471E33AF94ACDE1994A1CDF40E6
8316:10079000FF46DE3F59DBDF05FD1D71FD53A07FC91C
8317:1007A000F0FE4F594D21DD541CA7C21D26791EA213
8318:1007B000C9CC17F3923378BFF9221FB43005DAA3FE
8319:1007C000BE29D6E66BB0E91E13BFAF439B9F71BD38
8320:1007D000B42E0BD7D53C53E36018C67B5DD0ED7AC1
8321:1007E0009DFF77783FDDEB8B8B8EE37AAB31051580
8322:1007F000DC0FDDC0421B9098172BFD4FD8C7913CF2
8323:10080000F80BAE8B26D93FC101E5F3FA9EC2BB0BB4
8324:1008100068BD7C96356D38BC2A5FA8F0227F209F8A
8325:1008200045F92301EE289D6EEAA744B6DD60F7E0A6
8326:1008300053B583186BE1F9C6EEDCD8BC8089E69A23
8327:100840005A0AD10E79BD3D4072E37AFB2394D7F466
8328:10085000E7317E6736C0B5E8AA4FE85E13E65A3244
8329:1008600001ED7B80373D3BFDFF1DBCAABD372CDF72
8330:10087000F6238326DF76B475A57EB799F1FB69660A
8331:100880000FEEA1FCD9E685160F9E8368C6FCCF72D9
8332:100890008A2F911D87E784E99E13C924ECAE2F9A15
8333:1008A00097CBD7616FA39BECB7A81C1779E5BDA5C3
8334:1008B0001CEEDEBBDDEA3D27DCBE5BC2F83D29EA6B
8335:1008C0003D27CB6D54AFE69FF7EEE17EBCDEE72718
8336:1008D000D07929B0DFC85E60A93A0E5F81F67E1537
8337:1008E000FC933262F9D2DBF4DCDEDCA9F354209E07
8338:1008F00077621CE8AFC47FBF9AADF59BA8E544BF03
8339:10090000DE930EFFEDC817CB4BBC7912F0CF32034C
8340:10091000F7DB017FEDC2B31535ACE529BC3F701E96
8341:100920006BF9856E1CF1979FF86BF227FC5EC1187E
8342:100930007F2DE1FC1520A1A4F25794AF8A13F3ABED
8343:10094000FCABB17DAFBDFF574D68A70E1A892E6A6B
8344:100950009E5CE23A8E83E7B49EC3E394658267EDC2
8345:1009600048F07C113E8FE7AF4CC6F979347ECF5406
8346:1009700058C05A16E3F73DC9FE76843FCAF71BF804
8347:100980007E6418DCB285F8E3D6DB649E3F9ECCF52E
8348:1009900015C62BB2E0FB75E2FBB776733EBAD56A9B
8349:1009A00020BEAB1B6CA47C2256CDE30E1EF81FDFCD
8350:1009B000077A09BF8B44BF85CE523DB2ECC25A6D57
8351:1009C0007C6291458D7FF8F4B81E6F5DA83F19AF2A
8352:1009D000EF17B1CD9F60DEDB228C63A8FDE0BB8FFB
8353:1009E0006747E31813308E715CECD32F027F23FF2F
8354:1009F000BF9ABE72D7DDC0B7131E2F29437FCE9C8E
8355:100A00008C554F6D85F2F7764EA2F2AB1977DCFB71
8356:100A10000ED6F71551B91A2F71C1FD4623EF5F5C51
8357:100A200071DBFC02F8EE71B31817D715EEFB92FCE0
8358:100A3000BD75D0CE35756C19E623560BF970F16E85
8359:100A40009E0F7FC355569EE2B9D24D7EA3EA245134
8360:100A5000FF753EEE5BA5FF568679A9D563238BE92A
8361:100A60003EC6B21F4FC2F271E993C523C54D26178A
8362:100A70004BA189809F6A076F5F5BF6FD6CDCC757EF
8363:100A800057F1F2644F65F738ACD75D5A3CD2B9D014
8364:100A90009F8AF5143DF724D6E98BDE0FE99C93CFAE
8365:100AA0002479708ABEE91FF27B892C920DFD8F3E5E
8366:100AB0006F81827ED2D95E9EB758656ACFC2FDEF44
8367:100AC0004D7E4339E69FDA4CA5C7D1CE489D5E39AD
8368:100AD0000DE93BDBC4F4A89780CFFF85F8FC9A4F63
8369:100AE000F25290B92C5A3E57F9A84EE5EF6A2D1FE5
8370:100AF000C3FAFCD7ECF4CF97AFA3F1317CFFDFB1A1
8371:100B0000FFA22F69F54A74BC84F59638FE6872001E
8372:100B1000FFE2E55C0C8E7E5A57399815360ED75D8C
8373:100B20008FBAEE220887413744E73EF225CF243AB8
8374:100B3000F0388AFE57E1CB05D9C6CA86C3857F8ABD
8375:100B40006A9771086CB60CFC2EAF877E5EE688C192
8376:100B500005DF676350EF6FE0F0EC965AB8DC107673
8377:100B6000B1BA3F6E52E73BA09D6F45123FEFEC429A
8378:100B7000FF05F673964EFA6B70370BBDB9D0E47B68
8379:100B8000C80873B8C5BE8CF8E1AB2CF03CDA27C6B8
8380:100B900054BF634C3AEEBB0247C205E4CFA5BC018B
8381:100BA000A077DA9838FB44852B111F4DA3C8C344A6
8382:100BB000B813F110A3CF10D957EAF9A9E8BC12E68F
8383:100BC000D361E5EB3532CDA8DE5F528CEBE26D6987
8384:100BD0009227DE9E7E3B416F27C2A5DA11AA5E55A1
8385:100BE000E1417F11FF7EA41DCF90DD38662CD99D99
8386:100BF0002ADF640AB80C3A69C438EA8D6374AA7FA4
8387:100C00004E43C7C4734E2ABED4BCA0443CA9793D10
8388:100C1000C3E23509F1C8D1DA49603F8F710CC79F33
8389:100C20001AEF7144FD5C029FA512C93F87F073CD96
8390:100C3000F6F0F309B5ADFC9C7C6D0D4C0070FFB671
8391:100C4000F01FA8787EC8EEBF8DF347781AEED3BFA9
8392:100C50003BEF698A73A8F7C825E267F928F8198D70
8393:100C6000CF47833F2DD5B712BF7B5E1AAAC0CA2DCE
8394:100C7000E9E2FE41E62FC07560B71554A21F02E4F9
8395:100C8000EA679FE1660EAB80AEE50E7F33F2F9575F
8396:100C9000996F0ED2D751E3D773FF3A23FFED5AB1C4
8397:100CA000DF9A23F4EDA55D32C507AABD131F9B850E
8398:100CB00076E21B7A16A4F5EE25FDB946C07F099FA2
8399:100CC000D8DEC2F5EECA377F54012B864DD8AE8BE5
8400:100CD000DDAF00FF26069334F72B4CDEEFD094A750
8401:100CE000F4676BDA5F353056535F1A9AA4A9BFFADE
8402:100CF0008D324D79DAD04C4DFB6BDEABD2946784EC
8403:100D0000E76BDA7FE9EC024DF9DAC8ED9AF6A7C491
8404:100D1000BE9805BC43C51978BF389FEF759F2ED587
8405:100D2000F4FB6DCADC37900FEFDACCF3972B01336D
8406:100D30009A7B267AB85DD102FFE374F52988AF1556
8407:100D4000606F63DEF2CAED5ABBA37E70EB0694A51A
8408:100D5000897915AB594B155E49979857516D5BA230
8409:100D600043BEFBA731C2EEB8865D23EE85F9AB74B6
8410:100D70002D62E3FF5B7435BAB47435BBB5744D2E88
8411:100D8000D6D2D5EAD1D23575BA96AE76AF96AE69DF
8412:100D9000355ABAA6FBB474CD5CA4A56B965F4BD74D
8413:100DA00031F55ABAE6B668E99ADFAAA55F4160B59F
8414:100DB000965E09F456E5E5B8AEB59A7651BAFBEA07
8415:100DC000291F667CCFFD9A7155BA07E07F9CEE2DF6
8416:100DD00094AFFEB7D29DB120F95F13E97E3681DE74
8417:100DE000A0AF3E42B90076C6397C2E9A20EC79DF5E
8418:100DF000C876862A7FE2F57AFCBE7534B9344C8F0A
8419:100E0000897DECA87A2C611FFB3E66F1907DB49938
8420:100E1000FC3CB709FEBC8CAF66A01FF507A49FDFA2
8421:100E20000740A6035CEF23DCF09DF79326939FE138
8422:100E30000E16D2D3BDBF98890883DE8989C932DEF8
8423:100E4000E7E3A6E732A1BF970B3F8437D99F92C350
8424:100E5000FD0FF919F8DD9C217EFFF25B695FE89ECA
8425:100E60008293E887079D721AFDF0F0BC60E6FC7083
8426:100E700046950F5EE676C6E16DE96C89F4323A7C00
8427:100E8000703FBBF4AB12C51996FE9E3FC7E770BB1F
8428:100E900037F1D9D1AAE28DEF876EC87193FECD618B
8429:100EA000FDC27E637ECB381A87FBCD9FE4F78F3E71
8430:100EB0002B3165BA838E49111D334D1CAE67F5CCBD
8431:100EC00084F87B86F9DD8897EF28209A789EFE24A7
8432:100ED000E487A5BF7F672CFAB164D97513DE2F3D77
8433:100EE0001DBF0770CCF95A8B847EDD4C578B847EF6
8434:100EF000A361EF0FDD2FE1F9C26899F176F88778E9
8435:100F000050FD73C53A1EA78EDCCDF7174F7D9D911E
8436:100F1000DFA9A3355019C0F8940C0607E6B1E8F92B
8437:100F200079E41B72B8DF2D8B0DD1BDA6EC356117AE
8438:100F30008AFBE04B44DEFB0511E759B1C7C4304FD3
8439:100F4000A2E4E05107C67556002D87509F297EBA4E
8440:100F50005FA364C7AB0E7ECFB8DE8EE7D8543D3AB0
8441:100F60003ABD1576262E7F1CE8D832921E5F93CBB1
8442:100F7000E3B31D6D35B3302EA3C2F3609B7716F239
8443:100F800087AC7818C693F0DE9DF8FC338313EAE350
8444:100F9000D6AF62A9D194F5161F5D66B1A1AD85F8F3
8445:100FA0004C2FEE07DA98B3D616FFBB01AB7374E291
8446:100FB0001EF200433B9B8B7A7C2A67503EFC91F1EA
8447:100FC0007DA8D105E3C4CBB57BF358BC5FB9ABCDED
8448:100FD00047F06E90FC7E1CC458C842E614CC5BC03F
8449:100FE000B397F07EC7F56F601E8DC1BAD613728FAE
8450:100FF0008E37A34BB9122F971EC801B9941C934B7F
8451:10100000DF6D3B4B78EA685B44DF037C318C9F05E6
8452:10101000B2B87DDAD1B684DEEBC0CE427E7A65C747
8453:1010200084A36EA83F01FFF09E1CA393C3C5CAF31F
8454:10103000483F2D167C803EAB5CE09F13AD7AE2B357
8455:101040007B722D415C84F7BC3DFE28DEF369005EB7
8456:1010500092FF06B8A3DF11783208B904FCE4C3F5A7
8457:1010600066C856C8FFEBB02D203AFD77C753F16B29
8458:101070003033BA87C6906B21BFCD1785F37B390912
8459:101080007ABE3C8FE4E83D022FAFECE0794727EED3
8460:101090006564BFDE731FF7BFDDD3C828FF9BB5C2F1
8461:1010A0005F458C6F54799D8E3781C0CB9E3610344E
8462:1010B000458C3DDC66C293572C19FD64E36274ECE9
8463:1010C000F12A7674C76FAD76D6E1F3E1E9A77B50DC
8464:1010D000AC6C99F5BB217CA28F1BBF6F6B6141B4D7
8465:1010E0003329160BDFB7D74319BE9F22EA53FCBC46
8466:1010F0009C2AEA5317F172AEF739A91A014B88837B
8467:10110000E45A1CF30A51EEDDC5F8B95B71EE7EB707
8468:1011100090BB632C8EBA6AACFF1AA37C7CB5FE71BF
8469:10112000519F6539D9350EE5F2426DFF1D020F99C9
8470:1011300096933DB3295EA2AD57E31BE9964B6F50E2
8471:10114000FF126DFDA3A2BFD572696836D6176ABFBC
8472:10115000FF90A84FB67079C87CFCFE54B5FE3BA248
8473:10116000DE8CF5F87D8FB6BE5B7CBF430A127DE84E
8474:101170008E585C3FE9DC5FDAD7C6AEC5F5D3D3162F
8475:10118000A175F470DBA7442709992C3DB6AE6CAD70
8476:101190006CC4F3E092906729EEB0D73B82BC53EB6E
8477:1011A0001D367EDE5D7619888F8C16212FC43A8C11
8478:1011B000CA0BA9C5C3998BFBB13F8F9F61815D416C
8479:1011C000FB220FFE909F73EED5317F9CDCCA6E48E8
8480:1011D00062FEB8F6AEBB1C9A72C6D7B235ED9D0B57
8481:1011E000C76AEA2DE59334F5CC9B4BEB65ADE0ABDC
8482:1011F000A492324DBD7A0E9FF5E46AEC677DE14C16
8483:101200004DBB4BC56EFAFD9033F3D4DF19F1985006
8484:101210002EACB58ECD44BDF34CDB7434B2D9B3B033
8485:101220009EF0E8D4013BCF2F3E807159B4D7DBBC90
8486:10123000F47E1FD483E5C29E84F5E686F67BDA6CE5
8487:10124000547EA2CD45CFDD6D6E7A3EDE564CF53B29
8488:10125000DA3C547E0CC6C7E7A3300EBE7FA4AD8631
8489:10126000CA5BDB7C54DED2B688CA0FB5F9E9F99DBA
8490:10127000B67A7ADFDDD642E58D6DADF47CB02D40D7
8491:10128000CF8EB62EAABF46D0FB8038C778A0929FDB
8492:101290004B4EA4E3AC5C49732F9835963F302B1727
8493:1012A000F307FAC39AFBDD71DE349E99CF3F71BC20
8494:1012B0003A1C0FBE3B890DB527F3754C71C7F1037E
8495:1012C0009EF5C9C0EF635A381D0A0622549F55CFB8
8496:1012D000695127E065CE00CBA9E0C750B1DD0569B3
8497:1012E000A82A99C76129BF8CB9609E15E27E1C624D
8498:1012F000BBA00EE152A673BDA9D2353A6F3B87134E
8499:10130000E73F12BC5F13F397CBFBF9FD17353D2187
8500:1013100064FB246F0BDD7F615AE40BE1EF57387DEE
8501:101320007E3A8F3FE9D3B9B0B90139F3E997991BF8
8502:101330009E390DDA7D4FF65D659AFD85FCE9C3CCDB
8503:101340007D358C5BA2DD9F2415AED5F433E5DCAF93
8504:10135000A93738D76BEA97AE29D8E0427C8E611462
8505:101360009F316E6E6718525CDEBB95E0DA24F07E2A
8506:101370004172D379DEC041353ECFEDF3EF09BDC2F6
8507:101380004C9B693D4CB0F362516A40877AE1DC8F37
8508:1013900052491E3DFD842E88FED7892CA8C3F53FF7
8509:1013A00019CC3DAC9F8237E8CA74A58A8CE552E619
8510:1013B00096B17C358BD0FE04ECF3F5B9DC3E7FC2F0
8511:1013C0008CF1C15CFFF778DE5288F46691A06791DA
8512:1013D000BA1FD9AE24FA65BB72890FB5E7993A8571
8513:1013E0009DDE6EAFC8C4B8E88551F2CAACAE993381
8514:1013F000F177B4AC59D3E9A9BE7FC8AD1BF19CEE1F
8515:10140000E3025F2ADF4F0426177CFF38CEE37CF926
8516:10141000BB19B8DD6B2A8C10FF5F90BCAE2588D756
8517:101420003765CE878359342F45E0553958E95A023C
8518:10143000F853DE1EE709B0D8779E6EF3CE54945869
8519:10144000B948E445EE6FAB9B591DF7FE75014F316E
8520:101450001BAA41FD545CA2F304696497467E990B74
8521:101460007BBC78CE5C29631E146F1359CF7AD4D518
8522:10147000CA5F64CA73518ECD606ED817582C21860E
8523:101480007941AF47E7C934BFAFF43B5B752ADD173D
8524:10149000981D957BA813F1F79486907F7ED7ABE7D4
8525:1014A000F33AA6AD2FB6F0FC9D15C586A05BC2B081
8526:1014B0007A0FDD8BA7F4490C4D7FE52FB3090FECB4
8527:1014C0008564E2BFE4ED53E94AED9B14FF0F91BE42
8528:1014D000E743EE1774E3042F42BBC6C986BD688F8D
8529:1014E0004D40BCE0840A8B09AFCBC57CF7B72D21FA
8530:1014F0003CFD5ACCA33337011EE6F1E2BD912B7AB5
8531:1015000055FF87769E0F9557DD8CF7EC750CC9C299
8532:1015100056D2E273937E682AFE36DDF930C0251379
8533:101520009CBF46FACBDB2BE8F7954081D0FC1A9F95
8534:1015300080FD7E01C9A31AD2DBD374949F9AC85749
8535:10154000A7841C6BC9E5797F56D79767E2EFBCC5C6
8536:10155000CAB3883F9FD1B162CA2FD1F1FDA59ABF0E
8537:101560000186831BF775A579BAE83D1AF3515FDB55
8538:101570007594F727EF49A2F389B25DA13CE34E4B86
8539:10158000B56D358E635328AE32579E358476B3D110
8540:10159000AEBB1AEDEEE37BEF1FC2FC12395761E8D8
8541:1015A0002FEAB429DCEEC8D1513E9662AF36611CF9
8542:1015B000A6C872BA12F17974CF37C9BF217F43E44C
8543:1015C00088087F925E90AC93B5D0F8811C45DCE72B
8544:1015D000E1AD2DCD10210437EE7F6A3E423FCA7146
8545:1015E000DB2533DA2B6ECB0AF2A715E615D07CF497
8546:1015F000186F83F213EB2ED9516EBDB96783A30028
8547:10160000EDE7A0423648F19F3BB2E9DCF91E039DAD
8548:101610008B57F19A1F503471BBDC566DD99810BFAF
8549:10162000D3279C4BCACA2B107A6E110BC5CD47EF3E
8550:10163000E2FB35E6B4D07EA7304F629FE962E53128
8551:10164000A2BC5F1FC8F6007E8EED59918FF3BA726F
8552:10165000D84F79BEA3D9FB1FE7BAD5DF4332EBE8F9
8553:101660007ED59019F37E9F6A63E968DF99820AE567
8554:101670005DEF13F2ACD0C2F9DF90CFF93CF159D84D
8555:10168000C3D79D722029988C74B3F59705804F2697
8556:10169000BF328FB941FF15DABCE43F2C6C35A4632F
8557:1016A000FEC0DC1F5A884F2E5992C84FA8B4267925
8558:1016B000F07DC7DE8A62771CDCC1365B3AE6E5EC7A
8559:1016C0006D33A5A39C0A8E225FC7D97594AFECD663
8560:1016D000F17CBAF9791CAEF979FCBE9779A2FCA429
8561:1016E000125880703E09F4C43CE9A39BB93DBCB6D6
8562:1016F000DD4470AC7D731CD955A3E1EDE936573A52
8563:10170000DE0FBF77B32E1BFD4795DD859BF09E84D2
8564:10171000B5567E4FAC9C3AE9314C45673FD533B462
8565:10172000DF3B52667A96C5C97739755631F2952CEA
8566:1017300007B2D12F7267DEFC9B315F12E8B713CB83
8567:101740002BFB4A79D91AC8C6FCCAE6BE69BC9C1EE6
8568:10175000D889F995DFEA9BC1CBB9816CFC1DA9B68C
8569:10176000BE6B79797C60279637F655F232FA9E4047
8570:10177000766EE99B7333CAD90E83A71E05F20F005C
8571:10178000FE1280BF5F3CB70ABCA8F5CFE17BC0F377
8572:1017900021F14CAC7F41F41B18A5FE25513F38CAFE
8573:1017A000F82F8B7EA151FA1F13FD8E8FD2FF35D1FA
8574:1017B000EF8D51EA7F22EADF1A65FC9F897E43A301
8575:1017C000F47F57F4FBC528FD7F29FABD374AFD0792
8576:1017D000A2FED709E39F10EDC3E2FD58EBE60F42EE
8577:1017E000C07763418EA05C2AB66E76E03ADFDB55A7
8578:1017F0004EFCDF51C1E33B2ABF8FC5DF6F827A5DAC
8579:101800003EBF4F4A97CFE33CCF88F1810FB720DF2F
8580:10181000AD7D5BA63C9B0E9DE76C10E5E8261DD9CF
8581:10182000036BDFE4FBF3B5DD4A30FEFCC53309F0A2
8582:101830006F10F0750A789FCCE3F139A3CB955E1B4E
8583:10184000EF47B269CB9896857217E437E5ED1677C6
8584:1018500057751597638C4C471688D2680AE17D0D41
8585:101860008A55E8055B794F31C26751E89CBA6257E7
8586:1018700042FBB1BFAB9CEC3B15BE4E8B42F775C92A
8587:1018800056AE07E6FE70960DEDAC4EE61FF2627F97
8588:101890009742F6FBD1AE321BCA3D83F52E1BAEDF5D
8589:1018A00076379F5775537112CA6BF9211DC9EFE343
8590:1018B00036BEDEFB5C3AF25B805EA1F32C20AF3DCE
8591:1018C000A82326B0503B9D8F78F88525DCAFC7ACA8
8592:1018D000A515745E448D434B4A9CFD7F59E0275FFC
8593:1018E000E81105F50B3C9F2C17E71C02DCFF046494
8594:1018F000738D893BAF79394FE6E740D438A25C4B12
8595:10190000F716E5AD5334FEF79C7BB5654382DE5098
8596:1019100012F4CAB82E9093717AA72060D3944FE640
8597:1019200009BF8E8779D07E9DFBC3CD240F2FA17E6A
8598:101930009346977B51F92BE4F193E21E9E2703FC1B
8599:101940001CF1D1CD653F417AAFEDD6D1BDD35F5407
8600:101950008E3E93C7B87FDA0F7A07ED198565E37E6F
8601:10196000E9F3F0305EEF73D0BD0A9F838FF18F965D
8602:101970003B50DE8EF72BA47786E98DCFC1D7B3928B
8603:10198000E73D3FD2D19EC4ED6A1B9F77678693DF08
8604:101990004724CE1FCAC25E7B50F8C195D4B96EFCF5
8605:1019A00089904E7B0B9537489ECC1BA0FD46C96F96
8606:1019B000C3F21B8E24AE777293880FF7A32D43F7E3
8607:1019C0001C16F8D03FD21F34A8F71486F0FF0E6221
8608:1019D0007E8E7A0FA28BEC33710F63EFCDD5D85E7C
8609:1019E000B14D469373DA138F6DD1830D7AD0C0A2B7
8610:1019F000EDF13CD533C775E29EC4DD5BD05E3D980A
8611:101A0000C434F7401E443F3A8D17DC82F73EC2F7DC
8612:101A10006E90610F767DFEF7B658B262F054B90F42
8613:101A20006C69A73C59BE2FB1337E4FF779773805E3
8614:101A3000970BEC4FAECAC77DF99ED3199ADF5D13A1
8615:101A4000ED5345FBA6C148D30137B59F960FEBA0D8
8616:101A50007120925242EB2B5211DF3E45ECF7E3DA54
8617:101A60007F89C61FA57DB10ACF81776F2DE1ED2B50
8618:101A700071FC0BEE7006E5BC24C093367CFCEBFFDA
8619:101A80001A3C9344FBF3A177A9FD0516CE9852406A
8620:101A9000FD6EC27E17DF7AB742CC3B03ED64908ABD
8621:101AA00037E37B34B7F8EFB1B490FDDC6FEAB1A156
8622:101AB000BD66D6F7F850EE16E2BD4ED363CF05F9FA
8623:101AC00085DCAE4A78DF6F6269B5C88FAD3ADABFA0
8624:101AD000F49B86CA4AD09E7ED102320FF5C23A0FDD
8625:101AE000CAC181F05A4F09B4EBCB9945FB8A838672
8626:101AF000967E3ADFBBC442E74FFB6C3D365C3F66E7
8627:101B00007B8F0DE308F27DDC7E52965AFC4F213F1D
8628:101B100085D6162F8F5BBF556E3DC1DFFDAA65339D
8629:101B2000EE03BAF59E9E0968675B15CA3F57960E8D
8630:101B3000CEA7F3823FD03192EF30AF2A287736EA32
8631:101B4000E8BEFA87DD4BEF413C30C5E7AB827E79DA
8632:101B5000E98A84E72F1E547C268C5F1885DDD6E742
8633:101B6000E1BFF7AA7E7787B02F77E4F37BABBA9714
8634:101B70001C287E0DFAF5B5AEEDC7EF99279A18E649
8635:101B800099F5E59CE9C6F3A28FBB60C70B78B0342A
8636:101B9000E8E8F75A1EAF8536A9E8CF3068FC15CFC4
8637:101BA0004AFDD43ED0A8A37D82A5C4A0F16FA43580
8638:101BB000E8BCE8773CE0F66F427EBBFA6DE506FCD8
8639:101BC0009E6BBC6243FDF490EB17261DC09952AE8C
8640:101BD0001DD7364B3B8EA35A5BEFACD5D6672CD4C2
8641:101BE000D6BBBE6648F0D768CB29C8478847900166
8642:101BF00016D04349BC8A2559AED0EF8575FB77F5E1
8643:101C00004C8036C6E440E96B006FD2A424DAEF6F53
8644:101C10007C3509171FC81F467267E3144679AFC7A2
8645:101C200072BFE9427D9A889FBE1C03CDD75208F847
8646:101C30002CC0FDFA59FA5D2F0B8B6B5780F8F13EE3
8647:101C400093CFF7EFCC5581FE394672F059D57F7CA2
8648:101C50000B3F4FD5D7CAFDD20F2DE2798134830ACD
8649:101C60005CDFBC7D0AFECED854F4DB77DD8DF98EC7
8650:101C70008978CDC4FC3239C61F1BD4F32B787AB2D5
8651:101C8000828B655C7797DCFCFECD9705DF1C14F733
8652:101C90002D44DB23FE3218DFCAC2786FE6ABFE07A5
8653:101CA0007E1E609B1A8F1165BCC610CB078F3B6EE2
8654:101CB000C0F5B46DA1A30CD7D3466197A5E618BCB7
8655:101CC0001301DE47DE3004A4ABA0ACB0E37AD0E76A
8656:101CD000071DFCBB86379302789EEA1157399DCFCA
8657:101CE000FA389FFBF39EABF4FCBC96D6A342E7DF29
8658:101CF0001E717ACC65DCDEC0BBAE19A51681697198
8659:101D0000B4B68CF6A98F783D665CAF8FE478CC983A
8660:101D10009F6CCE526CB88E1D2E85EED17AC4E4B77E
8661:101D2000A1DDE2000588BF1F67C8ED9947E7920073
8662:101D300087BA0A1E1260228F0FF3E8D204BEFA5C43
8663:101D400077D9F0FCBAB3F0D0B7D0AF9E86E3A5F058
8664:101D50007E8827BBC0D3A57C37CF4B16E3A7DDF524
8665:101D60001CB5C7BFCE8AB8F13C9CBF0CF358907E1F
8666:101D7000074D7C5F1D273A3EF392DF7EC34F38DE6E
8667:101D8000DA73F9FD4186358CF661CF55FAF71F45B8
8668:101D9000FC6425D13E3BDB955D85FC91FDC6CE05FF
8669:101DA000780E61C34FB8FE342CE7F1A66C8599BE5E
8670:101DB0008CF34EF7DB108F89EB30EB784F1D32DB65
8671:101DC000FF054658D4C60080000000001F8B0800A5
8672:101DD00000000000000BD57D0B7C94C5D5F73C7B43
8673:101DE000CB26D9249B0B212124ECE646201736E193
8674:101DF0002222EA7209A222DDC81D233E210102240B
8675:101E00001040FB46CB6B161214156BA8A86851370F
8676:101E10000A142B6AA88058D177B968A95A4DABBE6D
8677:101E2000A55A692254416E31B4EF4B5B3FFBCDFFA5
8678:101E3000CC4CB2CF9228EDFBF6F7FBBEF86B87795E
8679:101E4000E676E69C3367CE9C7366765702BBCDE799
8680:101E5000602C61A28DB9EC8CFEFECEFF976A61EB1F
8681:101E6000CD098C254DE1DFF342BEA7248DCF2D6235
8682:101E70002C79BAB17E0A0BC9BB79BD239D77B058C6
8683:101E8000C6065419EB3D197DAC9899900BF96EFE7E
8684:101E9000EE7C93D67EDFE0118CF9532D9E6D2EC61D
8685:101EA000D2C3C663EC9B08E4356672FD3D8BB1F18D
8686:101EB000AE78C6FAE17B9DCB57C8D82E9B738223A0
8687:101EC00089B1CE15CCF30C6F3FFE950D73DFE1F9B0
8688:101ED000FF4A77382378ADB423CD6D05FC3BDBA7F3
8689:101EE0000F46FD2D16FDE9685EBEE5687FE6D71852
8690:101EF0008B886675AD1C4F3613D391FE1D7FD7625C
8691:101F00001C2B8D33DEC527359231DE45C094F2CFD0
8692:101F1000A7AD0307E63B3DE8CFDD66E7FDB65A9C7B
8693:101F2000F9169E1FF9F4630F59D3310F0EE3189A77
8694:101F3000B6978D66ECF9C37CDC013CE77FF2A189A2
8695:101F4000165E1ED55DEE47F92E9349E4FD81872686
8696:101F50008E656CE0E1D6350E2763654FEF78C8CE0D
8697:101F6000F116F92B51EEE379BF0578A919D4CEE724
8698:101F700077306309CDBFF177112C82D72B347B36B4
8699:101F800023CF3E8964DB787EC79EB1B35DBC5E63C0
8700:101F9000CC28975EC0D8349746F32F43DAEFD27936
8701:101FA000996D1EDDE3B8F4FB8D126F8C798EB670DF
8702:101FB000FA163E6B63F7F3C23CC00D7AB544069E39
8703:101FC000017D9B1FE34CC7589553D0BC6AEFFD19A8
8704:101FD0000778FA6A4C59A58BB7AF8A99980C78D2D2
8705:101FE0002E32A62772BA35D899CE719596F4338DD4
8706:101FF00071F806261D1EC71CE09BB6354EA4755110
8707:102000004C0FE1CBB48B16A60F477F5EEA0F7FF62D
8708:102010006470A1F86B4AD0D91A0E8F9FE37A1BB86F
8709:10202000D319D5A11581F1277ADBD5FAC8049FB25F
8710:10203000D9AD05E03A81071BC7A9B584A70E4B307F
8711:10204000A297FA77C87A66BB23681EC653E75B4738
8712:10205000A95F87E54CBBBDA79E3D60217CB01A16E9
8713:10206000C8D1084FFE08E4E31228CFBC5E575232B5
8714:10207000F89F1172D32CEC70041F97B897AF9F5440
8715:1020800016A4F4498E1E47162AA5C77F1ECDF089D7
8716:10209000818F9F616C72285FABD434C844F065D7E0
8717:1020A0009BFA9DE0F8C93F14497058D6B340241FED
8718:1020B0002C1BF4E074CBDEC0021637EAD9FA9D4837
8719:1020C000443B97E403A789D178AD43B1AE36BFE571
8720:1020D000D8C0E288BE24773647B16AE04B8DC7D8B6
8721:1020E0001AE28780E48B2D0D4EA2A32A1F5873306D
8722:1020F0008C8E09063AAA7A691707103D7BFA0D50B3
8723:102100007F69F5BB891FD22E66483E717D47FF99D6
8724:102110007DF49F42EDFBEE7F208DFF64F0C3F8A9B4
8725:102120001C153FEEDC1DEFE369A4B5D9E7E905CF47
8726:1021300069B71BE5E4B07D46B9ABF01269F52695A9
8727:1021400071FC47DE61F2B4F0FEAE386AAC37D9FDFF
8728:10215000513CD6634FFD60D234D4AF15F5AF3A6928
8729:10216000ACEF1BB727ACBE80EFDA8BC67AE1F4097F
8730:102170008797C3D56F46085C13EC1186F6B32B2EF8
8731:1021800081ABDFAC10B8AE4B31D6D7D7F40ED78DBC
8732:102190007911DF0A97AAF7BDD197572F7C1ED32656
8733:1021A00047F48177517FD6ECCBEBF796EA6FAF77A8
8734:1021B0005B7DF8387EB95FF1B5C5D77122FEC19756
8735:1021C0004062BDC91BC9F75127EB6458475D725D7A
8736:1021D000253027AD67BEF035ACAB0FF0CF54C686C7
8737:1021E000B87D5F437E4DB07BCB1FE15527CAFD8A8A
8738:1021F0004DE13D5E89CE7D8537175ECA7F8CAD256A
8739:10220000B85ED3749DD13E6BF76CE3EB3B3F8DD949
8740:1022100053B91EC052029937C73016ED56F29A8B49
8741:102220001A0EE75089BB1706B4AE8CA7751E48007E
8742:102230003CFFE8B8FDDDDE0477BF9EFAE1F57AEAFF
8743:102240000B3CD96CAD2B006767ADC383FDE1431434
8744:10225000F176CFCE8C089A39BECE5B1DEB352E675A
8745:102260008E46CF7BAB1FC7C307B1BA0BFDCF9E75A0
8746:10227000FD3DC86B07135D2B397CE72BDA4701AFB7
8747:10228000DE683DDBCDE1A8B1EB8392F914CFA6EB7C
8748:1022900083E3805F5F22E195FFA3D0D72BFC029EF2
8749:1022A000899AC07F629C5E8871269ADA9EF2E19BD1
8750:1022B000A56D14DA31673F82EFAC8DCBBB5ED6BF24
8751:1022C000C2C378D9CF01ABE7EB4E3EBF031BE33C63
8752:1022D0008D1CDEAAC459F396F3A205265F72D06C5A
8753:1022E00080FB2A8C57E3A818940AB8AD126E7B3F86
8754:1022F00089776FF6B7C1DD88F1B0AFFDBB16D8E6C0
8755:1023000016B444FE157F7CE07E9E8F305DF810F29F
8756:10231000A3B3D0E4E17B04DBC2F50B3BDF57DE97D0
8757:10232000F87E92AB3FF604FABE1EDF53A244FB9444
8758:10233000474D8146DEDE37FE55A2D3B3CB1C1E339C
8759:102340001FAB82B96CE0DB4AE6B501FE3F8EFBDBDA
8760:10235000EBED7C7E73DCFA74CCE3B64453C68704A1
8761:10236000879E5FC6F98D8D15F8FF2E7E606C838980
8762:102370008D62EC66A91F2C90789CC6BC568C33836A
8763:10238000E9568CFB9B73362FF4D2DF4007E5F0CE85
8764:10239000627EFA3E870528BD8505A9FEADAC9DF29B
8765:1023A000BF8E2E4AAFE7F0953D363807EB3104EF8C
8766:1023B0004B24BFDC9624F8E58BFEC0FBA67E97C5B8
8767:1023C000BF659AC0DF10B7BECA4DEBD595E4014C8E
8768:1023D000CE09037D3121EB67623FC17F1667CEB71F
8769:1023E000AD9FB6AED822368CE4812395E3E13A491D
8770:1023F000CAEBBC4BA760BE902058AFDF93EBB5D4BF
8771:10240000EC60499C2E6D2E732082C33279DC8A14D5
8772:10241000CCF7176BD8AF8673FAFD629C9935524D95
8773:102420002FB59B2AFB9B3A70D229E827EFB260D2E6
8774:1024300008DEAEF4A27E388EE367AA796713D7B8B8
8775:10244000D9E481D6CFDA43E4DAF549BB2C8CEB2F03
8776:1024500037641BBF4F29E0F910B93B95597ACA3947
8777:10246000FD0F003F903BACD90CFE7DCC1D93047D4D
8778:10247000850D6543C5F9805323643E5DF66F6CE7B7
8779:1024800079BBB7DDFA53E0A395F1E7E691DE611180
8780:10249000F359F69E99F4CACF1A18388F9DE0FAA125
8781:1024A0003797B1CFB97E81FCC986144ABFE4FA00E0
8782:1024B000D2330D79547EAEC143F9AFDCBE9F804E5E
8783:1024C000F3D77F65C1BE746FA4C2B7806395E4BBC8
8784:1024D0007BD3473DF6578ED77BDFE50B83C353DDB8
8785:1024E000DA3C0960AF4AFF6C2DF4E755CF691ED482
8786:1024F0005BBADF6B737078161CD6EF019917BDDBE2
8787:102500003E1562A216FA2BD71BEEB3FAF660BC9109
8788:102510001F9D48D67905EFFE8EB71279FD2F1A461A
8789:10252000135CA71ABC04D7E986C9944665FA5E43D2
8790:102530007D2FFBCA86FA37EDECB0A4F1FAA55ECD8B
8791:102540008BF5788D9705021C9ECD5621DF3773F9E8
8792:102550008EF539AEF0E6276F6790BFFA9B683F2390
8793:10256000A1B234917F9F3ABAC2827AB3BEE632CD2D
8794:10257000DDC387DFBD0E053E6A255DCEBEA1119E7F
8795:10258000CEEECDFFDE55BCBF378E989999C3D57579
8796:10259000D14470751D8D0A406955F556EE31933E54
8797:1025A000B932DD1600FE56EEC9EF0F7DEA34A71BE7
8798:1025B000CBED19EFF40BFFE6D243E4E8E984D6FF54
8799:1025C000FA1872EA5321A7B8BEF9F913906303070A
8800:1025D0007840F77356AE9703D1AC2E1AFBD8329BD6
8801:1025E0005C5F5CCE207F3A4A9C8347BD98361EEBE9
8802:1025F00005E3B96C3D7228F7C5C7327FE0EA196F71
8803:1026000047EB828F9FE0F9B30193DFCAF799B3AC30
8804:10261000F5DCCF2147B73A3C381FDCAB7178B08F7F
8805:102620006E1B40F93CCD12554FFC1CA0F59AA7B982
8806:102630002CF55CFED4FCECF101E0A7D7380E46F394
8807:10264000F2D73646937C7ACDEA39568FFE9E14FD3A
8808:10265000FDE487777EB60FE983B5257702C999092E
8809:1026600084EFAA1F2D1E8AF67C9F66A9BCBFE75F78
8810:10267000D182917C7D166E3AB03695C3376C4B870C
8811:1026800069004F8BB76A8D48F3D36F3862E6E5F681
8812:102690004C17C1317CA7DB9C86653520F0F1B5B4C1
8813:1026A0007F1BF7F5824D5F8DC7F152EDEF43B5D635
8814:1026B0002F5B701ECE385AA213FE9AA99F3DFBA72E
8815:1026C0007D700BC33CB8E600B82B6C1EDA4F02FEDF
8816:1026D00016D0F9AC9EE7B91F6BDAE77F1CF43DAB6F
8817:1026E000277BB0BFEC35F963C7A0FE310BCDF39566
8818:1026F000ADBF8EB5F27CDC6E2B8BE4E5B5C59D934A
8819:1027000050BF36DD45E7F0F4A7AE9B0CFC2CDBBDDB
8820:10271000A785FAA9B17B34ACB33D17DE4AC379E88B
8821:102720007AE6C901DFED16F907267A3DE0B7EA96A9
8822:102730003F8B7C9B8FF23EB3DF6D41FD4AA1E73CAE
8823:1027400026F731D65E44F28E58D9D543AF0778319B
8824:10275000CA37BBFDA9758E9EFD8FEF5BF999BC3C16
8825:10276000D526DB3BA765F8FE817DCB26F721D5DF9B
8826:102770006336E68FE4FDA4F3EF1AF6559BD86FB7E6
8827:1027800071F9027E51FB2D1FF7AA4CD1DE0B39994E
8828:10279000C637D7623E9FB4C72202B4A75FE6F84AA5
8829:1027A0004F5A1E25E499D23F662736BEDECEF1FA97
8830:1027B000A758FD3ACC6F81DCAF99C59382F91D8F84
8831:1027C000F54EC6F835F6CE0CCC81EF8753905F6698
8832:1027D000E6FA535688FE64BFBCFD3022CE7B33DA66
8833:1027E0005F6EFDB151BDCBDFB15DA349FEBE2EE5ED
8834:1027F000EFAA3F9B5831CFAF7A2482E409ED69BD3F
8835:10280000E0E575BEDE752E5FFE0376039E5EFDA7D6
8836:1028100076339D3F0E9B6ADEE2FB290D9D89FFEB1F
8837:102820006C8C1B41792FC87CCD9F4CBD9E0F55CA27
8838:10283000E954877979BF36DA1BAEFDDA69A3FE1D4C
8839:102840000997355F731FF335C78AF9EEC77C39EDF9
8840:10285000567D5542F272FF65CE333DC2BB06F40D84
8841:102860009F0787FB5E7C0F87BB9BBF3B2F0FEE3B19
8842:1028700034E637619D7D650B609DEDE76062DDEEBE
8843:102880005F5C10C07ADE6B13797FAC8DF4CFFD31C5
8844:10289000CC0FF9B1BF2C39E077430E32A19FF6631C
8845:1028A000A23C52B69F934CED074470FEE779764BFD
8846:1028B00094ECBFEE9D4294AF49F37008B87E1B586C
8847:1028C0009F49FAAD99EC8647A5BCDE141FBCC5CC68
8848:1028D000BF6FFA2A97619CA32C98B61CF5AAA3484F
8849:1028E0000E6D8AF7A626703CEEFDC64CFBC2A662B2
8850:1028F0009E77909C26FBCEA6326F6A3CCFCF957414
8851:10290000D9D412D8F628FA2BCBF3F8F93803CCAC8B
8852:102910008EEAB9453F1F5B45BBDF49BAF0754CEB0A
8853:10292000FC83CCF941E0599F1A6D815D84633C556D
8854:10293000E3F03F5195C3485E4ABBD76C4983B93D2C
8855:102940007CE0B58F825E2BFEE62CD81609793CA37D
8856:102950003A92EC5247ABD7C6B8F87833747330026A
8857:10296000FADFF45283DDE9834C2F8DCB0F16F29CF6
8858:1029700010AC041EDFE8B433C8E5BEE859DB3A2EDC
8859:10298000F144083F54DB84FC3829F5A15763F4F780
8860:10299000C0EFCBF75D9F782244DFAB5A509A4B765D
8861:1029A000DFAACB3BDF35824EC368BDFA4DE08FD640
8862:1029B00048A2FFE49BED44EF2E87E919D8256F93D9
8863:1029C000F2AA110761FEBD714F44602DFFB63C2293
8864:1029D0003813F28AD3FFB9EDA0EBEB9144FF1A9BB9
8865:1029E000E0A79A9FE7137FEDB579DDEBD0FF1B11D0
8866:1029F00044F79A58571C95BF9DC824FF91DE501389
8867:102A000015CC8DE7F85C1FAD9F02DE38DF913DB835
8868:102A1000C626BE1F937C758CF70138FC7531C48FB8
8869:102A20004CE6F51F24D2798AEBA3C4BFFA43F9948C
8870:102A3000D76DDED405581F2BA309BE63D29E76AC9A
8871:102A4000269EF8BBFCA1A5EF324ECF63BEEDF7E5A5
8872:102A5000F27AC7F65B3DD8977E5F6F0EDA385DCFAE
8873:102A6000AD3E3E6A33CFB7AFFD24430FB1A395AF60
8874:102A7000AD9D8276E54B564FC57ED917BECB6B22F6
8875:102A8000B8CCEDA1535296D79CC5F1EFC9D26D5980
8876:102A90007C9ECB0BDA1742EE9DB3B53D85F3C1C7E3
8877:102AA000717A24BE9F7FF58BED240F2D9DB9D0CF79
8878:102AB0009759381F802FE5FEB95CF2E54B597A1C17
8879:102AC000EA73FC913E1E5DD026E4DEEACB93F35F11
8880:102AD000EEDFB657E3E32C8DDABF8C5273A008FD0E
8881:102AE0009CD682B15A16F0C7F538DEDF196730166A
8882:102AF00074D0E5B969E90EE3BCF007BBCA52FC83A8
8883:102B0000B75BDA6A26BB0ADFDF6D807F292CBD0642
8884:102B10007F82902BBC9F67681D3A7E3FEF071CFFAA
8885:102B20004B9E1B52027D7269FCBE1F5E45F5783BD1
8886:102B3000C5E7E64BF36A3E97C223E67746F2F919FA
8887:102B400026E5E06C5BF7391C7AD0B917FA1BF8E67A
8888:102B5000DC734328FFA5D6A94571B8CE4979C43C9A
8889:102B6000ADA3CA7080F0B68E823EFBA8FCBE34B125
8890:102B70007514E48F9247CCDE5A44E7EABCD6229C17
8891:102B800027953C63BED65CFA1E68CD45FBBD266129
8892:102B9000A7A03FCCFBF9B416C2835DACC725CFE735
8893:102BA000135ED438E1F40B9FEFD42CE11FE0F0DE8C
8894:102BB000E6E3F5076FB619CA87048CF999B2FEA04F
8895:102BC00030BA0C30771E8880BC7F96D17A0D1FF703
8896:102BD000D62C614FFFE94FBBE96096E745E652F41A
8897:102BE00077097DDB0A7CFFAE1BDFB7A77179BA14CA
8898:102BF00073CCEC99FFDE623D0D72FF9C49D8A9F7BA
8899:102C0000C6F37C01F41C814F9557780CE7A3B5BF40
8900:102C10005B98067FCAFAAC6E3F477FF05B23E425E2
8901:102C200097178D56818F2F1BAA879FB0E03C5A972C
8902:102C30005A65E999CFC2CDC576AC97455B8AEDF36D
8903:102C400043CE3B8D3B861F7171BA9CD96121B34144
8904:102C5000A325F043E8D18D3BCCAD7E46E5762FAF82
8905:102C60007FC671F03DD45BB825BE047AAF6ABF68F9
8906:102C7000F31DA95521F8CEDF61C47F61AB310F7B15
8907:102C80007468FE47D00547FEE3ED8A83C6FCF02357
8908:102C9000C6FC171FDE3E136CFCCA68C1EF27033168
8909:102CA00001F8A9AA3F997404FBDAC9BDAFC4823EFA
8910:102CB0004B3FAD7A0BE796459B8D7CC6E9A641AFAD
8911:102CC000F76FD7883F1607C2D79D5CEF97ACC73523
8912:102CD000CAAE9917CA27E1F43CCD5A677A393FD575
8913:102CE000D4AF1C0E7F48F514CEB81C9E2B5B37DA90
8914:102CF000E037081FAFAF75CF1C5E17EC5515A34525
8915:102D0000D998FAF1EC388CBE1B7E3D09EBADE2019F
8916:102D10008DF6FF8A97071F86FCEED835E7064A67CF
8917:102D20004E263C28FBD9A2FD5A3086E79DA35DFBC9
8918:102D3000DA79BB05018DF687F94D113D7288FFAF39
8919:102D40006A43181C9B42CA39FC8BF61DF88BC6FBE4
8920:102D5000AFDE626CB798E30B727FC9D6BF47847E43
8921:102D600057E7BE31FB5BCC98F70205BFFF1A8679A7
8922:102D7000091724171D525F39810C97F71109BE36C8
8923:102D8000EC2F633689765C605560BEB50E9B0BF305
8924:102D9000ADB5B3603487E3488CCDEBE4DF2F6C8EA8
8925:102DA00021FBD4C208AE179650CA224BD0CE43FBAB
8926:102DB000F4E7EF9B495FA9C5D8E8E7698DCE3FB539
8927:102DC000303622FFACC82F66419A07F8C51B3ABFC0
8928:102DD0008031CF9AC5B9A9C6123C007C2C61EDE2C6
8929:102DE000DCC3E9E80DF1C7D5F0791E4D803E646C77
8930:102DF000BF9CB552FDE5FBFE1E11FA3DC44E4AE7ED
8931:102E00003975AE34DB9817FAB1F9EE28DAEFB9204C
8932:102E10008E027FAED3BC8FDBCD48C5BCFC1B85FECC
8933:102E200033B745EC175C3FCD057E366D1CE2819EC5
8934:102E30003297EBD991D023164751BD4DF18CEC2B35
8935:102E40009BE6E40A3DFB9B978318A7F3118DEC23C7
8936:102E50009B8A45BF9B1E1C42E590871A8D13417AC1
8937:102E6000CBA632559E4E7AD2C7002D157AAEFCDE27
8938:102E7000CF45DF0798BDB9D0D7D9C39174DE577A53
8939:102E8000EDB3097A6C76BF9EF92A3D98555F9EFE98
8940:102E9000B74DEE779D1B85FFF784E67BCB14A29799
8941:102EA0000ECA16FBC3A8F1DEEDB21EF901AA4C65ED
8942:102EB000F75FCBE1A97AD4E46A74F7E09D79BDB9F4
8943:102EC00098FF898D9125E0B351E385BDE758B19016
8944:102ED000DBD1239837C0D3BC6CB17FE4659B0C6910
8945:102EE0004A14E73FDECF8952611F8E19E1233B1B55
8946:102EF000D7D9487E87CF638484AFCAE67BFBEA5E7E
8947:102F0000E0E9E6838942CF38B1427B46C0C5E9CAD1
8948:102F1000F3A37E1449F6B913725F51F8E77C33923C
8949:102F2000F66929AF364A3ED908FA633F5B2CCE4199
8950:102F30003D7C62E483B99AC02B7B50E8A79BE245B5
8951:102F40005EF1013FEFB0BF824F4A19E1BDAF738F11
8952:102F50009AE7A61651CEE93D05F40E3FF7287A33DD
8953:102F60004B6024CE8D7DD17BFEE8F8519A89FCD64A
8954:102F70007EF8ADB1D7115EEEB304D67238065A04AE
8955:102F8000FED32D82BFB854F64795507DAF8DE72B09
8956:102F90001E5EC4BCBC7E451A237B10AFCFE2509F9F
8957:102FA00077833816EC1568571127FAADE8CFE89CFF
8958:102FB000407F5C5E6523CDA47EBDA604D13EB68471
8959:102FC000DAFB4DA2BDD7C2D34159429FEF5C171126
8960:102FD0007806F2F9DEF45CF0C194F1463EF88F6CAD
8961:102FE000B1DFAB74688E4B1A953C2958DFF39B8692
8962:102FF000D07ED118E9ABDD03BABD20F4FF8A7B6E29
8963:10300000BD6924E07B31D103F0BE9CBA8BFC0DF38B
8964:103010009BE6DCF111CE0D3B22E9FB7539FA5DD957
8965:1030200023A107BAE6EDE11FE6CF38644BE1EDF5E9
8966:10303000D6B2B33FE7E954FFAEF7A00F4C9D6EA6A2
8967:10304000FA5399B08FB22631CE4DFEAF2C29BCBFBA
8968:103050009BC66A1433D011E9CC58C1E1AF90F4BBE0
8969:1030600047F26F63249BFD3307E04ACFCDE4DF6F67
8970:103070008286D98BFFEAB0AA3F4EDB02BD66D00440
8971:10308000B1BE547DF4837EDF96EB69A3C48BCA7313
8972:10309000BC52FDAAF5111D59B148ADC1C13CEDCCE2
8973:1030A0001DFF08F86A4A269BB41978BFD38C5805CF
8974:1030B0000E6F6705ADFB985C17F854672C48F1114B
8975:1030C0008121C4D71DE33A3BEEE5F98E96C11EB2CD
8976:1030D000F9C873F4029CAF5C2817724CC99763CE91
8977:1030E000F618E25779AEAE94ACF1C7FA098F5EC11B
8978:1030F000EB573A6C1DD80F163C322D167126959B56
8979:10310000CC229E6383F15CCDCFBF2F812EE1E7E41B
8980:10311000F0F33078067C54B541233E1CD4E8B1A5C9
8981:10312000921CD39C985F9523980DF95EE589F4A0D5
8982:10313000FC4C8337F14436FC119329655F73BC8FD7
8983:10314000823D965110C7C11C7D3FF054D15C41E7D0
8984:10315000C5E8029DE4D3DFB25D84E729B02742DEF3
8985:1031600058DA53B10E6BD5F70467AE83F839920184
8986:103170000F1D56672EE0EA581769C2BE3965ADE0EB
8987:103180006BBECEEC16DEFE3E0B8BC27ABF5FB62F57
8988:103190005F63F1B5F0FC403BB3C42480AF8A89AFD4
8989:1031A0004B06EB1B818793FFCE4663FFAFDCB091EC
8990:1031B000E0517CC12C6D1313A1DF6D7397DCCF7AC6
8991:1031C000F8A864F0F80FD0AE9B1FA66BC4073C3D77
8992:1031D0009045FC70F351944F191FCC5E59003F5637
8993:1031E0000DF3C28F90C23CB00774B14ED227BAB86B
8994:1031F0003E0179A6E489921B9C0FBC88EB51F455E3
8995:10320000F2637B030789E37547839DD29F36389924
8996:1032100085CB809D0D29947FB1C145696B431E7D8F
8997:10322000FF598387F2BB1B46537E6F8397F2FB1ACD
8998:103230002653FAF3061F7DE7782139A4E48A9247E2
8999:103240008A9F945C0AE7A3791CBDD794507B927B3C
9000:103250004ADE611EA6921E79A4E89BA9F9FC296E9C
9001:10326000C8B1F6399017A5E6332FBC023B49B5C368
9002:1032700013E1025E84DCEB72D849CE67D8D83E9C5D
9003:10328000D71B57783BEE0DD9576FA9D69825844F99
9004:103290006FAD8B6496103EBEAD3EDE902FAFFFE06B
9005:1032A000CDFEBC7F2D5E77E470388EDDFDF993BFD7
9006:1032B000E5DF9FBEFBCB1CD09BC3B1ED318CBB3A8D
9007:1032C000AA1B8E04E49BACA43F0C8A12E720FC816D
9008:1032D0002EF399589F4FDFFD575ADF1DF5112E33FE
9009:1032E000AF37BF3E82F0F531E8C4F1FA7B49A78AD7
9010:1032F00075C75F7805EB7CB58DE4DCFC26B92ED76D
9011:10330000737C86E86B9FA532D2CB342F63F0C37CED
9012:10331000F6EFB620DFF3D9679A3DA041F7E187A425
9013:1033200072FE5D5FFF0B8ABFD2EA8F903EAC232E08
9014:103330000B7602BFD5108FA5D5CB38ADF681863878
9015:10334000AAE8115E1BE403781A749B9F7790615D75
9016:10335000B366CD892DA04A7EAF5AAF91BED1AD2FB5
9017:10336000E498898E75D9164ADFC31AA7FDA299F68B
9018:1033700027C5AF5C5E78035817CDC5B68521727836
9019:10338000BEFC5E9967A2547DAFCBB6513FEF41388A
9020:10339000F07EEFCFCBB42D2039E7B2410EA8FAF37F
9021:1033A000F34AEEC91C817EC625B190F5E8CDB15037
9022:1033B000FB3A047AE17C6417F6FF9A3EF601A59782
9023:1033C0009CC43FAF24F8E9BCB5E4C5E75F847F6CDB
9024:1033D000C9271144A725C3A43DA220306A1AE933A6
9025:1033E0005E87C6E7B94CD27FE2F39FC6B6F3F2E53B
9026:1033F000BB85FD92A71D4897ADAE26BBD6320F5FA9
9027:103400001F0990AB463FF2E1173F896DA773853FD7
9028:103410000DF1857C5B486329F0171D9F04BBF87292
9029:10342000D6790FE2BAC2DB2DD7BE8E15F67DE12725
9030:1034300057FECBD2D7FF9C4C70ECB9900CB9B6FCC0
9031:10344000F575C97A2FF35E1EE6BF567E7365075B7E
9032:10345000CE367C05BF5B78BD9539D2AF7D05BB828A
9033:10346000EC141646710C2BED020F5D819C38D6CB07
9034:1034700078DDE36EE6829D9F43BB2CAE380F87F369
9035:103480007C1F717CAFE488FDF9ACF4A39EDF692654
9036:10349000BDF0FCCE18E2FF653B1F7EEB2A9E5FB6B7
9037:1034A00055C3B0AC96B5119E96ED36337BE8F90660
9038:1034B000769BC4BEE15CFA7C4C1DF86971ABE6DD1D
9039:1034C0005600BFBC2BAE5FA8BE28F9696944EB2843
9040:1034D000A28384FF7EA91FA97A8BF73F6C03BD7876
9041:1034E000BD73A4B7BC140D5D9BFF75BE07384F6F4D
9042:1034F000194E7EDDC5ADBB96D1BEBF33DA89297EBC
9043:103500006935DAA30239623D057284BE715ADA7FE9
9044:103510004FBF6826F90338B10EBFD4849D57B5DB81
9045:103520002EDB6D9778BB2947AC47557F716B476C95
9046:1035300036AFFFC5BE0F286D95F35AEC682BC27EDF
9047:10354000F9C5EEE8C9014A7F3CE9353EDED9D671BE
9048:10355000495AC8BA7A3D47C40D9FDD629E0C7CB1C2
9049:10356000808A336AA5F99CDE99A6D1B916F8E6F8E7
9050:1035700039BDFBE55813AD5BBF6827E968B20B7B2B
9051:10358000AADBE292F60BBB137AC65CAED5C57179A5
9052:1035900057BB5BC403847F57F569BDA582DF3B6DD4
9053:1035A00082FFA5FF5EFA97102742FEF8185B00FB2A
9054:1035B000EBBC61AE59B7409EBD6315F418E87A0CB8
9055:1035C000E7AA79EF2792BD62A5D5D51FF93FBD6B5C
9056:1035D00025FBF9BCE1729DA7B48F847DB2C32DF6A3
9057:1035E000F59AF57C85F0290FE0F4F7F3F9D5044C52
9058:1035F000144F793C2793E07AA2DAE4B5919F23989F
9059:103600000B3BE5311BF39BA127FF2C92F4BB9A4C9B
9060:1036100061777F02FCCED39A84606E22EC5D928E3D
9061:103620003537F3F2107AD63C13CC85DE72C626EC21
9062:10363000782877222D11F51A25DFA01FF4DBE1761B
9063:103640009E23FD724F0C839E6F7A2546D8137E12FF
9064:10365000497E07D5EF05C9578DD2CFE5DF26E003B8
9065:103660005CD09B17DB9A73A157AA7117C736D37822
9066:1036700067E4788BA39A85FF40C685A13E8D6F6570
9067:103680005E9CC73B9F8B20FDF4CBD4B6BD18FFCB0F
9068:10369000E786901FBCC31D58B88FCAB9DEC6E9B013
9069:1036A000E4A71141C07BEAB918F2739EB20A3DE863
9070:1036B000544C32E94147621E9D87FEBAB64668B057
9071:1036C000A79CD2982D05E5DBFA91BF6A49433DF9E5
9072:1036D0000996F0E50E7F344F27C3AF7C6ADB10B24A
9073:1036E000B39CFAA599FC8BFCFB7A7CD759F3BCBB45
9074:1036F000B0EE7644939DEDCB9FFE6D48A8FF41A5AB
9075:103700004BB61AED498AFEAA3C2957ACAFA45C819E
9076:10371000C7945CB1CFD446B73E9A49F314EB95D326
9077:1037200081CE5B7C7D24C33E7DACF5D564CD013C70
9078:1037300007737F0CBCEF10E79A2F775AC92FB2E4BA
9079:1037400095182FD96FEEBDC284FD628959E8BF4B31
9080:1037500038BB8954D88796C4E6927D88E39BCE8F88
9081:103760009DDBCC721C31EEA9EDE9C2FE1E94F9BDC1
9082:103770008501F0F9940476DBCDA4DF6C29025E2F7D
9083:103780006C8D36812FF8385EF8ED97DCF50381CF2C
9084:10379000B885A48F33C4418F82BF5CC8CBDA7BAFBE
9085:1037A0008A433C0C7BDFCC20FA2E583CFD210FC312
9086:1037B000F1B52857CACBBD4FDAE03FABE1EB05F1DD
9087:1037C000414BA5DF74E94F35D2E796DE73D563240C
9088:1037D00007DFB3B21C0EC799D6876343E95126FBB6
9089:1037E000E969EFA1FA4B797DD1FE9D588267BBD57F
9090:1037F0000378C2E978D9ED7F6ABEACF6DDFCD1CAA8
9091:10380000F7F5A24BE77D81B57DFF13C8919D911E11
9092:103810003F7D6D25BFF3696BEB42CCFBF40B91242C
9093:103820005F4EC78BF5FE0597877E1BE0B8F121B28E
9094:103830006FFC661A83E85E1430F6ABC69D992BE4E4
9095:103840006F6DA2270EFE8C5A4E07F4C7E9F23D6A4F
9096:10385000FFBE95DA87CF63A46CD7BD3E5F88267E16
9097:10386000393D40D0E3F48B83695FE988177CCEE172
9098:10387000CDC039E574BC487153067CB0449E434FBB
9099:103880008F6BA573F7696D17A51D56D16E49BDF4F1
9100:10389000DB72BE4B01DF8027E1B7B26F68831E0188
9101:1038A000FBF4A8124A83110997DA99C19FD8875E61
9102:1038B000CC15F62CA83590EBE4DF20FDA4D50679D5
9103:1038C000AC4B3DAE66E7A5FE32F283EED4C8EFF313
9104:1038D000A05CA7803A49D9C7393F2EF56B5EC41B5F
9105:1038E0002D6D5AB118FCBEB46EE32DE077358FA56F
9106:1038F000163619E7AB0ECD4CF07444F275033C84D8
9107:103900008E97D983DFCD0A5E809C4C7A2629D75BBF
9108:1039100072C57E857C33EFAFA649DB40E3B8D5792D
9109:1039200052CC4FE189A3C5063B193FE78BF23EE637
9110:10393000AFE00C9FBF82A73557D8273ADCAE87C6C9
9111:1039400082DEBF3293FDF4C2D7C3E312BE452FC35C
9112:1039500089ADDB5ECCE17F9DEFD5E8C70FF986F539
9113:103960000C7B348733778BD1FF91B7D5981FBAD3AF
9114:10397000982FD86DCC17ED37E63D878DF96D725CC9
9115:1039800085279C7311D786732E529C735DB9E29C78
9116:103990008B3CCEB94871CEC5779C7391C7391779E6
9117:1039A0009C7391C7391729CEB9F87E4ECAEF1A69B0
9118:1039B00077041D28BEEAD548E507A7F5727E4E328A
9119:1039C000C94FE5CF3CBFB880F2DDF69C323BD973DE
9120:1039D000549CCE2D71FAD15CF21BB6DD930ABA5914
9121:1039E000DAC98EBBFCE7C28E5B5312E9807DA17DF4
9122:1039F000DD17F7407D2A8AD33FCDA5B8A6CEED22AC
9123:103A00005E294872A37D8DEBFD6B05FDC8CEA1E25A
9124:103A10006E2AB0DF25F44DC7703F0ADB60F49B844B
9125:103A2000FB51C2FD27E17CA0FC264F5B3B5321EFFD
9126:103A30008F3F67DF00F88F4BFB189BED24FD4BE9B0
9127:103A4000D5DDFAD783DA33D8B7BFC94DA0F65D47C5
9128:103A5000B8BEDDCB7EABD2CA8B25A43776E73768FC
9129:103A6000268A1B4989A57D6895842943EBECB81704
9130:103A7000F22EC644FBF8058789CE05173E34931E07
9131:103A80003118FA79C87C8604A20CFC95BF2321CC9E
9132:103A9000FF37C0507FD8BECC30FFDF50A35F6AFA3B
9133:103AA0009A03385F4FDB30DC50AFCA7755181E25BC
9134:103AB000DC522F6D5CBD3903F267554C17C1BF6AEC
9135:103AC0004F24C5D5567178BDF0CB21C351506DF749
9136:103AD0004E05FEAA5BADF1D8E72BE5FEC3EA8DFBF0
9137:103AE00071B585F99D093D7C57ED64DE78DEFE6C8D
9138:103AF00071F37613A7DB59D39647C7BAE0576AC963
9139:103B00007072BEBA5D6B4DBE92F7F7378B5E309820
9140:103B1000F35B8635F8C372C8CB5D596C0DAF777C0B
9141:103B2000C3CBB1A4774B3ECBB03AA340EF966633FC
9142:103B30009D0B60973227F4F0434B736254B6A36732
9143:103B40009E3DF4FF9AE6C7E9E2C13DC52EC7C1819B
9144:103B5000ABA0C7B58AF9568FD3FCA427CBF9AC9498
9145:103B6000FB0ACB16FDDC2EF327E47941CDEFCC9098
9146:103B700003452EF8311BF6659821C74D3BB7E3FE90
9147:103B8000C0DD51FA758347225E32E7B763F9B84B5F
9148:103B90003E12F1BA7FDC3421F64AE89F2F583D539C
9149:103BA00078FEDEE6676D38172FB1046C3877563F24
9150:103BB000D762F3F2F4BA1D2DF47DE18E0A3A6F2F2D
9151:103BC0006275748E3CA9E26F253EAAC76B5B9C1C94
9152:103BD000EE17070BB9511D25E2364ACD63DF445C71
9153:103BE000FA851D5A31E63BDDB7CB5601FBB3AC1766
9154:103BF000BE3EBADE9D56DA0FF6A456E1F7EC6B3DF9
9155:103C0000CC08E6D17A9876D145E9F48B43E91CFBE0
9156:103C100011F315929C28083BCFBE2BE290BBF68B8C
9157:103C200075506D0B264DC33A79C34AEBA496CBAFC2
9158:103C3000D1253827333686A7BEB16603BF2E9F181D
9159:103C40006DE0E7D92CC1E0479E894B9B21F9E953F0
9160:103C5000B20CF5674DCF0FE3FF929E729223630C77
9161:103C60007126B5ABFD2E8DE259C61BBFF37435F13D
9162:103C7000D90D86F6B5ECE69E7A38076FFD35E199E9
9163:103C8000B1361BCE5BD5261157335BEF90DFDBE9F6
9164:103C90003B9F88611D0ECAF2FC56EC8B56B2CB2BB3
9165:103CA000BBF46CFC3BABB77D91135A8E8BF850D8AC
9166:103CB000170CF1851C003A7F3241875A69EFA9CD74
9167:103CC00013F69E5A7F9B0DF1B71CFF96348E9265BA
9168:103CD000CD1AD9F3787D7B5A82C8AFC6F7DDC6FB13
9169:103CE00006E8EF22CA8F982BB05EC2CB97F17943DA
9170:103CF000CF58063B0DEC4CAA7FD9AFE2CF459B8D48
9171:103D000076A365B0E784D0F1ABC12EE2D3253B7634
9172:103D1000BD3580E3659A2FBE18EBA7A6B5CC5A51E6
9173:103D200070299F29F97EA1DA447EEEAE770F119FAC
9174:103D300075555B889FBF0B1FCBBCC29E19CE7F0BF6
9175:103D4000F97CE0975DB85BF30434510F781900BE3D
9176:103D50000CC34B5A2FF85278EAC65B58F922FC6321
9177:103D600004E206B440D0DD1B5E241E55FF6178627C
9178:103D7000A38D7858A8BBDE87BC5978C4CC02973194
9179:103D8000EF45981FC6E7F3C3F8375F147612E5379F
9180:103D90009879D142F96E3EF189F8E9E9538CEBB29A
9181:103DA0009B6F7C629DCCB8984CEDFEB7F9E7BBF8F1
9182:103DB00046C11D1E9FACEEF7FCF76069271CC94683
9183:103DC000D2FABFCCB861B5DF2B3C0FBA7B34C51338
9184:103DD000753932497FE8DE6F9CC6F29531991447F8
9185:103DE000AC4BFB9C92BBBAACA7C6A9E0E5AEE1E048
9186:103DF000E381C9B0BBDED39495D11EA297E8EBACAA
9187:103E00006437CD5893486945A43319FB45C51AB3A7
9188:103E10000FFBE067F7F54F1E0D3BFC3A6BD214DE4B
9189:103E2000F567778EC86085C897527A7C63C4EC507A
9190:103E30007BB64A5D79623FA8BDFB28ED5F674DEF19
9191:103E4000C6CEC63A5BB7271621354BD77D30CAC9D7
9192:103E5000558F168B3E280F71845ACB7627F0E66C6F
9193:103E600029823D7A1868D7AF474F58B2AEB43FECBD
9194:103E70005F35DF1C7A0AFBBBBEC69A0C3DF3D487C4
9195:103E80007CFFD368FF22FDE024E28F93E0B78AA68F
9196:103E9000FB6D2735E685FF66B1F94091D3B09FEE03
9197:103EA0009F09385E8DD287E5919F36B03D05E37B53
9198:103EB000FC142FA9AFC989EBCD5EA2D2E59B85FE8C
9199:103EC000B65DD96BA55D177A3BF2D0DBE11482DEDB
9200:103ED0008E3CF476A4D0DBF1BD4CDAEB07357616D8
9201:103EE000E3DCE91FCFF2EA687F75E4412F5FA54567
9202:103EF00079206F56699EFEB083B1ADA9625F0DA3B4
9203:103F0000AF4AAFEEE4BA5508BF5F7BD1CE42E3C7FC
9204:103F1000C6B178437E823DD550BFD4E936945F97D1
9205:103F200032C4507EBDABD890BF31EF4A43FD9B3CBD
9206:103F3000E30CF9EF8DBEDE50BFCC5B66C84F9B3CF7
9207:103F4000C7507F86AFC2503E6BF66243F91C7D8539
9208:103F5000217F4BF59D86FAB7D6AD31947B99D382FC
9209:103F6000FD6D3FCE531CEF6FE03CC5D355BFCA710A
9210:103F700084D275EC04535D6FF6F8EF4BFEDD3CC464
9211:103F8000BB02FC992EEF81A4CBFB1C4D792EE2CF16
9212:103F900034DCDBA7F36C5B2AF826BC5E78F9D8E842
9213:103FA00083175C9C867FD83173BA85CB87B1571C49
9214:103FB0001C9EC5F309431E986EE17265EC55075FC0
9215:103FC000CEE4F90143DE14E5C30E5E40F903431E5F
9216:103FD00012F9698C548BCC21E3A7FBF93CC65E9B9C
9217:103FE000B9C123EC21BDC65BAA147840DC22F08065
9218:103FF00034C8F913E941CE9F480F73FEACCA66EC92
9219:104000002DCE9F488FF07325BEBFCDCF9548DFE5FD
9220:10401000E74AA4EFF17325D2367EAE44FA9B86D9E7
9221:10402000947ED8A053BBFF6CA8A6F468431D7DFF07
9222:10403000B8A19ED2DF37F8E97B204FD90F826467A1
9223:1040400051FEA465F0E3C10EB7CF7A26D4CFAAFC07
9224:1040500081CAFFD758C7DAA3B14EDB2DF19FDB7BB6
9225:10406000FC7A7DCB590BFB3C44DF6A89F63E9F47C7
9226:104070007692814E92D7F2FB786D5A7A094FFFE221
9227:10408000D27781DE334A2AD7C5B9710FA4CE0A7E12
9228:10409000F9C8D4FBBDE0A63C617F5839C4BB97F892
9229:1040A00044FAB1951FB93B3E25C4CF6D0A898BA157
9230:1040B000BF90F816E56F56F134D7D8457C9EF227AD
9231:1040C000ABB819D55FE94546F2EEEAF516D24F6274
9232:1040D0002C2C88FE557CCCD5F6D662C40B5C5DE3F7
9233:1040E000A038B4FEFCBBAD84EA79CD3CDDFA675E56
9234:1040F000BFA8C77FDD5FC2CFCB09FED28B3AD95DA7
9235:10410000AF96FE7BB4B78B723FDA23760A7A064FFE
9236:10411000C9AEF624E29C4A7AFCE9A81F2DEA07D131
9237:104120005FF67FF1F1627BD64F7A426B31E2A9D222
9238:104130009739289E6ACBB820DDDF5AEED63F039D23
9239:104140007C11CE4FA369FD64A5C34E5026F5DE6FEA
9240:10415000A1C31768A7F0A3F0ACE8A2F01B12774444
9241:1041600078ED8B4EE1F409A78BA247E9C51E3C030D
9242:104170004F97D2A1874EB0C7FEBF4287119656BA5D
9243:10418000FF175163F700AEEFA2CB6D9D6C12EE13DB
9244:104190000FCED49B80E78A8BAEB790AF64E32661E5
9245:1041A0006B52E59EEF289F85F27E7D97DFD147F920
9246:1041B0003B912A1EC1EB28E6749920E5C7AA5281DB
9247:1041C000DFC96E33E17742C122D2479943E8752EA9
9248:1041D000FE1FE4C9A4AF7D4DE86F5292513F54FEDB
9249:1041E000E01B647F93C3FCC03748BDF18630BD70CF
9250:1041F000D410A9F7B9995B9CFBC43DF789729F4E17
9251:104200009374CEE287F9B1A023D32D105A8771CFD2
9252:10421000BD08F7C0FD94BF9E0528BD910569DFBAB2
9253:10422000890B38E4BFC718C5331E8A9E5ABE9CF757
9254:104230003761F8846C7C0FB9D777DD907E74AFEF6F
9255:104240000FCE907B7D0727BA486F3868CF223D0696
9256:10425000EBC01A6247FB2597FB086538C4F705A435
9257:104260006FF27D219B33F92FF8BE80FC0D796B181E
9258:10427000DA4D7219E34D54FB1B9DE3996578DF72AB
9259:10428000F7C6A25707C2BEF24EFCE089B03BBF138F
9260:104290007FC544CCF79DF8FE269146D8282D7C2575
9261:1042A000BB373D4BF161CF78939825F152FC2A7CC6
9262:1042B00086E351E1F79FC0E78ADEF0D9041CC0AE67
9263:1042C00067FF20362513FE2FB1FE6B5F29EC0FF838
9264:1042D0004F0134C425DB055EC2ED3B5F34B081C0C5
9265:1042E0002FDB1A47DFEF903C7475FD18AA7F4DFD58
9266:1042F000689ADF5551FADA217C9C3325C15CAE39CE
9267:10430000B02FB634D2FDDBB32F9A3DD0BF6BCCAE0D
9268:104310000D1EACF577C47D39F6F5A10CF8DBD8D6C7
9269:10432000DEE3766BEC0A6F7EC2A737D3DB24F63F61
9270:10433000718F58EDBF032344BCABBACFDAD77E3CB4
9271:104340002A4AC8958111420E2A3AF176944FE3FD2C
9272:104350008CE27223EDA128D2BF4724781F073ED5F7
9273:10436000391AF14DD8A7AE09E6C7213F19E7499E92
9274:104370007F5BDE4F7B7B685D5226C7F7219BFE2C5F
9275:10438000DA31F3D766ACEBC61C8DEEB9771DC94A9E
9276:1043900002BEB7A97557C48A42DF1B50FA71F7787D
9277:1043A0004966F28BAF847F3409E7263BD98BAE6137
9278:1043B000B9E4379D28C72FFD6525BD83A0EE7D4458
9279:1043C000A4988CEFE7B8A20CEFC144E72518F231AE
9280:1043D0009E0186FA71A3330DE5F1DEA186F2C4C910
9281:1043E00025867C3FDF1843FDFEB3C71BDF75D36F07
9282:1043F00030D44FABBED99057F22B4D7C62E9757328
9283:104400000DED07D5CF37D477FB9718DFB7F17BDBFE
9284:10441000F29221F7C45FD6FA9586F21FC78A7B0D08
9285:10442000931D0BE9BD8A9CE6BB8CE34B3AA5C509FD
9286:104430003A319790AF7EFE1FF8A634C5286F273813
9287:104440008DE76DAE0F6AD8DFD3EA2C86EF9FFD0FA4
9288:10445000E91C8E972EBE3505511FFA10CF5FA30FB2
9289:104460007D08768D8949564F80097B7AE8BC604F7C
9290:104470000FC503ECE9A179D8D38DEF4219E90E7B82
9291:104480007A68F9F02346BA8F6C33D2FD8AA346BA14
9292:104490002B7E0CA7CF95ED467E08A7CF5527C3F8F6
9293:1044A00043D26336FFEFEFE29E34D16B9243634F0A
9294:1044B000B8FF79FA240FE5F4C9EFA1CFFF49D35330
9295:1044C00087F6C3FDF40B1936D0AB53BCD7B742CA3D
9296:1044D0004F154FC8CFBBE23EDD5D66F2EF1F3335AF
9297:1044E000D37B49079DBA1BED6F2BA8D3E03F4861F2
9298:1044F000BE5D0B397CF3FE2382FC09F306897B9DAC
9299:10450000ACA09DE2EC959C9B9726E258860C95E723
9300:104510000B8F886729182AF4C2188F93E25E2B0A42
9301:10452000C43D027E2CC8985708FE793712EF1676E4
9302:104530006D12F6FB76ABB85FEAE77C04BF18F44473
9303:10454000E871E9528F6AFC9DDD0EF8076F66867D83
9304:104550007148C06E88BBCCDFE134E40B5B530CF5D3
9305:1045600087ED7319CA8B837986F2E1473C86FCC8D4
9306:10457000B6D186FA571CF51AF257B64F36D4BFEAB1
9307:10458000A4CF904F639D8F03BF8334711EAD1A2A51
9308:10459000E278F81A227FD2BC7BE3C5FD41794E5503
9309:1045A0007AB08AC7D525DF85EBD3836C3AC5F73659
9310:1045B000A6320FDD03B0CBF30933EAD9BA8CA75585
9311:1045C000FA28F31BE369551C6DB73E2EF56FA50F56
9312:1045D00087C4D17A43E368E7C97BBEE1FB5E9DA453
9313:1045E0007B38FC836C62BE8D77DAE8DE82822B1C1E
9314:1045F0009EBFC9F8CE6DF6DEEF8FDC3D54F8DB7F51
9315:1046000099E5FB3EF8F529888FACDEC6F3B4FB399B
9316:104610007F35FEBBCDB3D6F5DDE3CD1B26E6536E6D
9317:1046200032DD565640714BB37F1632FE0FE5B8AB04
9318:104630000AB45EE7372F4EC415B1389B0BFCDBF78D
9319:1046400078029F2936D644F75C64DCF9AD1B5A1F0B
9320:104650008489BCDCD66C15EF9705ACE08729E3B9FB
9321:10466000FE540CBBD5370F3BB89EF154BD85EC1002
9322:104670008F0CBD69863FBBE71EC1207EBE007F4018
9323:1046800057C1B9C45E20E266F70E15EBBFD4FC75C6
9324:1046900077FC37D9D31993F25B9C5B7AE137E2431D
9325:1046A000358F7F751C78389ED4B990C97D275BC241
9326:1046B000A5F0D77D8E97F853F1F8AE1556DF330E7F
9327:1046C0008AEB9F8C782645BF8105822F4F0E15F40B
9328:1046D000463DC8A3BEEA959A0BE260AFED62AE38E4
9329:1046E000E7B7D823FF557851F8EFEB7E4F5FF2E143
9330:1046F00012B9D0C77D9FBEF893FEFE817B3F21F2A9
9331:1047000041C497487A04B24DE4CFBD37C6B88EFB9A
9332:10471000E70BFCEE57FB859F9F278D7282C1BEDCA5
9333:10472000B8CE2CE584D857A16FE0FB827556D237FE
9334:1047300058BD8847AE96B298315FF29811F0C75ACB
9335:10474000E93DAB6BBC8CF491F90E5BA085D7AFF063
9336:1047500087EFAB5E6A4FFE1A17DE2DF1DC03FB7BA1
9337:10476000E57A63BD450EF1AED782B073E922792EAA
9338:104770005D14762E8DCC97FBB28779486F92FE67D9
9339:104780000567375F05B2282E18E754B3B09750BCC1
9340:1047900052B71D1FFE85907734393EA3F2B06F37B4
9341:1047A000597A8D23EBC6671F7EF233F093BBB0FEC0
9342:1047B000BBE8FE4FD7EE48E14753FE0B59FF8CFF95
9343:1047C0000295A33E7A3B5BDC56043F52B7BF23CC35
9344:1047D0006FD2E530C58E467F3BC5FB0B2A0E60C904
9345:1047E0005F0345CE103FA7DE6E32C45D84A7FA9A00
9346:1047F0003D1417D062D14BF2F93C4E5B3C76BC17AE
9347:10480000799FE36032EE6B4F91F69A7078BBF5D0EA
9348:10481000B19AF013FA851EDA3559233D94CB4586BB
9349:1048200075A4FCD9652C988454F90FF4F5A309CF2D
9350:10483000CA7F50111C4D70CE685C64C5937DED8FAE
9351:10484000AF2E8D72F5F815DAD3453C4A5FFE8569C7
9352:10485000173DD4DFF48B63A89FB27CB7B8C7D5F4FB
9353:10486000E00AF0D1D01DCC8A79B687C563ABF4409D
9354:10487000BEB07F1FCB57725BC6B9ACD1849EAD3141
9355:1048800015F742725BE52F34CB7CA9C8AF5A27F2EB
9356:10489000EDF21DA3EDD2DE807922C57C702EDE29DB
9357:1048A000ED11980752CC03DF21A790879C421E721E
9358:1048B0000A79C829A49053F83E9FF9328ACDC20FD5
9359:1048C000323164DDC00F3231440F821F24340F3F78
9360:1048D00048687DF84142CBE107092D871F24340F3A
9361:1048E0003F48687DF84142F36CF4F53D79C8356F77
9362:1048F00099213F8DEBE31343D62DFC20A1FDC30F7F
9363:1049000062E84F5F61687F0BAB37B4871F24B4FE4A
9364:104910006DF59AC14F729BBC975EB93981F8638E71
9365:10492000DBF7C37C4EDF3F447F738715E734F3FE2C
9366:10493000C5747EAA8DF2083A374F1674373141E7B5
9367:10494000CE3944E7D536912F1571B1BDF91B2666D6
9368:104950000B7F0352F81B90C2DF8014FE06BC870D4C
9369:104960007F0352F81BF01DFE06A4F0372085BF011F
9370:1049700029FC0D48E16F400A7F03DAC1DF8014FE95
9371:10498000067C87BF0129FC0DF87E0C7E8FEC1EB8DB
9372:10499000A0B7671BCE779C0F0DE73BA7210FBD3D4E
9373:1049A000B43EF4F6D072E8EDA1E5D0DB43F3D0DB02
9374:1049B00043EB436F0FCDB70D75D1BA84FE1EDA0EEF
9375:1049C000FA7B68BEB0D9FF266C4C376D3977186911
9376:1049D0007B8CF694C645C1FBCF1F9F01BF517BA4C2
9377:1049E0009611CF97BC553B356322D7CF74195F56CC
9378:1049F000C43AE97D675DBE5BA30719C5C316FE25F2
9379:104A000045C805756F087F9CEEC5BB199D03CAE4B8
9380:104A10007EAADA7B98D34C724BD6EFC9F75E2F7C17
9381:104A20007C558FE465081CFC80588C3888E2D58E54
9382:104A300012C4716F3769220E72AD88430DE72B7374
9383:104A400081904BDB4DBB0E4621AEA542A3F7E2732E
9384:104A50002DEC08DEF12E6CAE2B81BE703A3F5ECE9F
9385:104A6000AB6E0CE26214DCCA0EC8E504DDAB1ADBE7
9386:104A7000C96C5505784F8CD91640BEDB849E807674
9387:104A8000383FE6FB35EF3321FCFDE77CB1BFE9FEA3
9388:104A90001563AAF8F7FC9D7563705F6B4A9468F71D
9389:104AA00093A763098F539BB467702F6EEC4EE6C5D6
9390:104AB000FDCB6FA43CCDDFE9B455D1B84EBAE7A524
9391:104AC000FAADD89241F7D22A58FBC414B2E56BF480
9392:104AD0008EB9C21B9FDF61CC8F8BF82356D247C59E
9393:104AE0007D9128795F44DD13715B7CC1A1237BEE4E
9394:104AF0008B5C3D22BE14F15A6CBF7877EFA611157E
9395:104B0000EBFAF1FEF5807877EFEA3FD5BD49F9ADD4
9396:104B1000E2DD3D628351340EED6B83FD1ABDF7304B
9397:104B2000D5DF624A72E1FEE81A6B32EAEF641EA832
9398:104B30003F8399B807A9E02B606D26BC3BCEB798A0
9399:104B40004389217CC425C074D0BDD863A5F720CA91
9400:104B50002C4E2BE446F83E7E693C5D989E10160F65
9401:104B6000D1B8FA68863913F61E932708B9B5279A83
9402:104B7000F405A5EF54C838A80B4D6FD27BD615BBF2
9403:104B8000847EA0733900F9A7E2236AB3021926E8EC
9404:104B90000B035A8A12CC62FF2FC07D24FFCB334710
9405:104BA000BB708FF14D8AD7AF5837324EDCD711FE2C
9406:104BB000872A89A72A19FFC20A9CC9D03BD53BA6E0
9407:104BC000A5E6B17174DFAD59E873CAFE52F1ABE1ED
9408:104BD0006F81CE154FCAF740D657D03DA0F038149C
9409:104BE000A51FAAF74E16375929BE6571981EB854ED
9410:104BF000EA814BC3F4C01B0AC2F440F53E9DAC539E
9411:104C0000F1AB4333484FA913EFF195AF117A0BDBAA
9412:104C100025DEB12F5F33C184772BCAF7783D5A2F39
9413:104C2000FCF1BED45FA660D044C4F90CA074E6C504
9414:104C3000144A675DCC233980BB18A07FFBAB8CF492
9415:104C4000E90FA4BE3203717EB81FE78F90F17C8C10
9416:104C5000F4A562E62C85DC18EAD50EC17C3DC5AA18
9417:104C6000AF431CE1941646F7616E825EC30B664348
9418:104C7000CF190E3E7797D2BD80C91ADDAFB869C48F
9419:104C80000AC9D79CCF19F8DC2FF9D647F9EEFD40B9
9420:104C9000F2B7EEEFB0D0BBAC7ECD8677D974799EFB
9421:104CA00055FC1BCEE7F3E4EF4D3087B03375DBA145
9422:104CB000002C3DAE72CD4CE88BF360BB1B2009C9C4
9423:104CC00051145320CA9B0AAE99D984C3CDFFD03E5C
9424:104CD00051AE7E8781EB5990A7B7DE5E6C9B1F2299
9425:104CE00057CA8AC63F5BD8AF87EEF3BBEF8D15F48A
9426:104CF00087FEBFF2BE9CFEDF767FB192E319EB63C5
9427:104D00005E5CFB1D7819776B01F34E1C8DF798D50F
9428:104D10003C5910F16A7365FED7058BFE737D01E186
9429:104D200087F2819D5366FA69BD0879750BE4951980
9430:104D3000724A7FAA00F73BECED93408FE8824E79F0
9431:104D40001F5EEE4761F6885F17083A84DB252A0B61
9432:104D5000841C671657C62D744FD545763D05FF67F1
9433:104D600056E3BD4195FE52ED230DFF9A78FBAF92BD
9434:104D7000F59F437E3C6A12F7B707989B99B40F8959
9435:104D8000DFC990EB87C9F70C7AE8CFA506E87F9FCB
9436:104D9000E60CA5BFBE5E13F7A6FBB0E3B0BCCEC762
9437:104DA000B7C18ED7207E9FE3E95CC1474FDF652303
9438:104DB000FDBBDCD6F626DE695278FCA4FE4756F130
9439:104DC0003B2FC11CBC3F35B72E92DE7B2D2BF2B59D
9440:104DD000812ED1051EA2C7B38829E5F5DB9DBE0F44
9441:104DE000309FDA0D079EC2FDF1E5FBDD74AFB162C5
9442:104DF0005FF13D78D7A2AC483F8AF20A87D386FD9F
9443:104E00007B59533CED67F3FACBFB85AC93FC540A1A
9444:104E1000FF9D05C28EB5BD48F47F5E9E432028CB22
9445:104E20000CF5645C71D83A51F6C1703B43F87B02D3
9446:104E30007DAD1F654F80FDC016625F54F6096BDEC5
9447:104E40006773B07F96DB8CF7E154EA2E94E75C79C8
9448:104E50000E5CD0BD7F154CEA0F7D79A346BF5B5336
9449:104E6000E570CDBA92E7AB8E581129C8A624B8C414
9450:104E70003B12F7897724E6F3F50A79532EE386AAE5
9451:104E8000368FA6F55615E06962DFEBF2968D87D274
9452:104E90005F05FF04BD744FBCCAE9B52584ACFBCAED
9453:104EA00066CD70CF5CE5E30B853DAE1C4F98974017
9454:104EB0005EB86D78CBA59CAB1588437317BA0C7E92
9455:104EC000575E8FE218A664B2B7C43B3E1C6EB7189B
9456:104ED000AF24A4FFF9CDC6FBF2BCBE7897A2308602
9457:104EE000FAAB70F279C3FEE174129C1C0F84A7CE5A
9458:104EF00007797F2E1A87E851190C5871DE2E47FC6E
9459:104F000004CFCF7506AC18677E9378B742DF20C612
9460:104F1000D1D7C7DB0AA12F599CB674E04FBE6BCF27
9461:104F2000E1233958C5F182FB3FEA1E60387E2A240E
9462:104F3000BC55CDF1463DAC79A315F498D3C7FDF926
9463:104F40009B24DDE7378DA3FBCF55162FC5D7EB127A
9464:104F5000BF7F5C11793FFC0373363D6675F3FCD56A
9465:104F600085827F6F92789D9219CCA1F76956447A19
9466:104F700000E71C6733CDAF1BBF8F707C687807C517
9467:104F800047F8E57CE1471C59D526233D7BE011F825
9468:104F9000ADDA5441EB6DA145B73943E1D87C200728
9469:104FA000F77AE6F0F58D77779853A7FB369F3F3277
9470:104FB0002B83E6C9E1045E633CAE49786F86F30952
9471:104FC000F1B1E217753F588DB7A050DC135C50D893
9472:104FD000BB7DBD675D7A49BF69E4F485DDBBAF7514
9473:104FE00069C345233EAEAD4ABC0316BE4ED5FA5446
9474:104FF000EB52AD53B57E9FB2FA82295A8F9CE1FBEA
9475:105000006DDDCF7AC1D3B312DEB992AE1CAF874348
9476:10501000EF156D2814F2A83CD3B8DED11FFABD4BB2
9477:10502000958F0FE6E01EA0AAAFC62D97BFD305BE91
9478:1050300007BFDD25E98EFA2BA9BEF17E4465B7BC1A
9479:10504000D8B92E19F2629746FAEECA070FA5FF1BD0
9480:10505000F4D817841E7BBA66DBB254D80D2C818C31
9481:10506000D0F799AA82423E2CE0FA0FE4C542B94F2C
9482:105070005F97A3DF573832A4DEC32FE4EA42BE04B1
9483:10508000215F7EFFC26B1F8D71F5EC9F0AFEF9EB6D
9484:105090007F6DAD7084E24BF0F9FD795D74EFABD2BA
9485:1050A000617321CEB6B2A982E42D4BE1E7092D242C
9486:1050B0004E2A8C0F2A9A347A37ABB27E54C0FCBF8A
9487:1050C00028972B3794D1DB3C8A4EEAFD0DB59F2AF9
9488:1050D000F8774AF8E74A3E7E49AEBFB9D56EDB4263
9489:1050E0005AF76E5B25F85F96CFA9327EEFA653B7CD
9490:1050F0009FB9E09E14798F85CE251BACC2BEB73315
9491:1051000086F4D5D32B5F796F26AFF7E5A32D19D0A1
9492:105110004F141C8BA41D6F81B4C72D947A2BA7D379
9493:105120001B85217276D1D3824E952FFEEA53BC0F98
9494:10513000559E29E5D983E27EF9FCD65D44B739EB6B
9495:10514000375ADDBCDE7B856E839CAEAC2B76C23ECF
9496:105150003D777D8B1572E0BD4281B7707E2F9771D0
9497:10516000A90AAFD877B410FF85AA0FF9B78B8F7350
9498:10517000FB8AC858C465A871FE5BF271655D7C024C
9499:10518000C6ABACABF821CE3D4ADE87AFBBE3916244
9500:105190003DCCE7FD615D1E1FE7A17BB6E5F2F7A5FB
9501:1051A000C2EB9F9374FBB155BC239816DDFA1CC566
9502:1051B000152C8FF2403E6467B707302EF81970DB6C
9503:1051C0004CE2DDC1EC9AF6AF0007578B293E05296A
9504:1051D000DE3B829A9CCCF3CF98C47D20C496204DB0
9505:1051E0002A12FC00D314CA59523BBD7F16129F6984
9506:1051F000E0571BDBBA1EEFAFD89218FDDE8BE24FF3
9507:10520000D58FE24FC5BF7DCDCF517479F33BEE967C
9508:1052100076883C4F06EE51CC7B6830BDCFFF5DF306
9509:10522000B4C977F0BAE71B217EB7E092F9668B73B9
9510:105230004BDFF3DD549ADCCB7CC3E7A9D6898ABD6A
9511:10524000EEF62B340BBFC2718DEF5FBCDDF1159113
9512:1052500014F7A5E6A5ECDE971B2FEF294A9076847C
9513:10526000F618E891E5F2F7205850E4F1BD2CE4BBC4
9514:10527000DAF7D5BB614A3E9FA893FB226B7F10EB08
9515:1052800099D567D13B19C79A8FC7E0FD8EE3E30438
9516:105290007CAADDED5671EF95C5D85C783F919FAF44
9517:1052A000E8771F1634F5A773E4ADF55924176EF5AA
9518:1052B000C70BBB83D4EF174A39187D7BC53D57A078
9519:1052C000FE66B753E3E32C70783EDF4CEDF33DD040
9520:1052D00007A33795D93249EF15E700E507BA5D63B3
9521:1052E0003EBACF043989F5653A908D7D67D16671F4
9522:1052F0000E986262EBE12F1CD4E89B940A39F1B856
9523:105300007837926D31BEAB7430C7776311F016F603
9524:105310001ED9EDD6566F7FC871AE6FC0CEB4C0E156
9525:1053200023BDFD6D29278F6DEAA0F7C9155E2FB942
9526:10533000A76213F7523B634C647FBBDCFB2A55D258
9527:105340009FA4F846F9A39EC0FF5D093C99685F2BB6
9528:105350003597D3BB3EF76C9A4069D5C6D247FD85D9
9529:10536000B80FEB4B1E43705BC93E56553B41DC1FEB
9530:105370007D26221EE79B0CAB3F23542FAD6AB997C5
9531:10538000EEA99C6C89A47B2A139D6513E393E8BD69
9532:105390005DBAF7A5EAFD40AECB25B5130CF74C1668
9533:1053A000F03E1107FBE7D6688A2B55F747EE8ED201
9534:1053B000BF5FD44FDC23B9D225EE8FA4527D57AF07
9535:1053C000F670957EDE20EE2384DC8B993A87B7AFAA
9536:1053D000A97D3916FD2C7DE483511C33B03FAD050A
9537:1053E000DDBAEFC56C16F7621A715E821E99E09BFA
9538:1053F0003907F8FFA599F0DFD778D5F85192907367
9539:10540000C4AD8138D25BF520B3C19FAC3B19E9C56F
9540:1054100027CDAC1E7A80D25FD4F747255E4EC635C5
9541:1054200067803F166F7F2C03FBCBA918912FDF3EBF
9542:10543000EB6DC82B7D6B84D0CF2D8CF4E14ABFD0AF
9543:10544000AF5975827A1733721EFCB145D1E21D1E29
9544:10545000797F46C1A5DE5B3D6511EFC5E05E0CF8C6
9545:10546000FD134B7001E8FB09D75F718EFD819463DA
9546:105470009F349BE97747FC7CA1400FF9A4F9E5181C
9547:10548000DCCF55FA5AA9F9F75EBC47B3728FB8A7BB
9548:105490008A77CDE9CD4A69075926ED202B5FB54EB5
9549:1054A000C2EF8E70FD8BBED45882B6DEE8B744EAF8
9550:1054B00057DDF9DDBBE8DC56B353E80F35AD1DA46D
9551:1054C0003F287D44DD8B5BBAB383F409D56ED96E7A
9552:1054D0008197DADDE27B05E2D6E5EF856AD9384FC0
9553:1054E0006B94FFB460FEAC3596D07C05E53F2D5043
9554:1054F000F6914ED207EFCFFB0D9DC36B9B64BF3C73
9555:105500006F0D19EF4D30693FF13DCB81F662DF57EA
9556:10551000E5B5BBE3A97DB0366A3DF679EF32870584
9557:105520006963AD83F6FD2D75A63CCB080017E581B8
9558:105530001EB75FC66FF55BFA9F91B01FA4B2CE4352
9559:1055400078F7F5A0533F0A7E55BF67A9EEBD9C7F53
9560:10555000FD8BE1E8FF9A41ED17F0C683754DED2C08
9561:10556000F827DA8BE43C0ADA8783AFFB1D14F2F9E3
9562:10557000492B5B4FEF075B7C0C76FBA0F42BFAFF0B
9563:105580006212BF2FA1059F0DD5AF9286093DDC1792
9564:1055900021FC8B5EB77E0A707C4FB31616E34CED90
9565:1055A00032E7A07FF53B2A4A4F1D2FE573BA3C5FD7
9566:1055B000D906A438C0C79AD74BF710D7161CACC46D
9567:1055C000BEFC40A79D7E5F55C5E18DEF8C22BD35A9
9568:1055D0007DC064DACF34978595F3FA070B4C41DC34
9569:1055E000DB7A80D9455C803D4CAF3545523CB2B644
9570:1055F000FF177F813C4F337F7508BF5392F66F1AB8
9571:10560000BD7F39AFEBF327F11B33E52C504CEFE0B6
9572:10561000C5EBA66190C35D933B744EB2079CAD761B
9573:105620008FD8275828FCFBEFFC4B6C82A907AEF300
9574:105630009D9FD3BB82E73BED64AF1DBF5FBEB71735
9575:1056400006CFF91417C545F37AA4679E7798E89DAD
9576:10565000B1F1FB0FD1BB79E3D5BB7A76E3BB7ACC52
9577:10566000951E0F7B32D950B95290DC28E8764D9CBC
9578:10567000F19C98334C9CB7728609F9A1F0D7653F2D
9579:10568000F78EAEF5ACC3E5CA7FAF7E6FAA3A827ED5
9580:105690006FAA6B7FD6B7BE9FF001F407AE176CC838
9581:1056A000F4160EEBD7B37FCE907851FBB059F63F8E
9582:1056B00043E26786C324F011F67B1B8A3F14FD1575
9583:1056C000BCEADE91A21BBBABED4DDC0BE2F42A7C05
9584:1056D00088119DAE203AFDE5DD75B8E63FC0ECEDE2
9585:1056E000D0DDFF123A05F10ECE65D3A92D9C4EC137
9586:1056F000C8C1D0131E11BFBF151ED7C8F218ADF315
9587:1057000079E628B203EAF25D70BEBEDFC4FA56EB5A
9588:105710007AD0E4F642EC8FC7F8D11B70B59B5AE9FA
9589:10572000FBF7878978C281AC2D55C6DF8C845ED6A5
9590:1057300028DF3FEEFE1DC3C50E7A6FE47C40BD7FBF
9591:105740001C787C211F77D38C02B2EB9F6772BD5708
9592:1057500077BF932DDE3FEE7E27DBEC273BC99C28ED
9593:10576000B2F374BF939D23DEBB7E4D63B97887D6B9
9594:105770005F66A7F8F8F077B2F93EF31CFC194F54B6
9595:1057800047911F4ABD8F3CDEA9D7818EE1EF233FB1
9596:10579000AAF9E62C407F850EEAAF7D4ED48BDB055F
9597:1057A0009A83B0E31CAB8FA177A1155F2AFBF5208C
9598:1057B0007FC7E3C093BAD7F907C95F0AEFEA5E9BD8
9599:1057C000C2BFE233BF95D1FD4FD001EFCAAAF7D9CE
9600:1057D000B5D5526EA8FB846F785C481F8CD7D70371
9601:1057E000EEC6155C6E905DBCFD0ECCF7C93B63BC8C
9602:1057F00080EB98C9F8FBBD2A7D7898C9F03BA1F3EE
9603:10580000E47E354FC5FDD71BE3FEC3DFD14C8CF3DF
9604:105810003D328CB73FAB7D300A1FDFFD3FE65EE3D4
9605:10582000489E92EB7F44B4FE24EAABFB0F4A3F7CD8
9606:10583000B7F88B74FABD91AF0FD1EF2ACE75FA028B
9607:10584000A817992DFC017F486DA7FB1A7F98F3D705
9608:1058500074B227AF16EF7F5E2E9C97DEA715FCB0C3
9609:105860006A8188374C6375C4BF293DF7342301C76B
9610:10587000FF6FF7697BEEBB4E1E7E82E22E7CF47BCF
9611:1058800015E1F4181B71F065173FA9FC76D897B3A2
9612:10589000E83E69DCC1556E9E3FF6D239914F3B78A8
9613:1058A000C1CD69D3FED27991CF3F7801F7513F7BCB
9614:1058B000A953E4AF62E4CF3AF1D257B370FFB4BF5B
9615:1058C0005BFF23E835F362DD9BD85E3F5A73F3023A
9616:1058D00037DDA72C4BCF13F7293F41F98CE4F9EBC7
9617:1058E000E2B49EFB94268FEF8FE0DBF35F09FE7638
9618:1058F0007358C127FF6CAAEE932A79DB975C54EBAF
9619:10590000EE5F751F56AD63B6DDB3DE0A26F4FFD336
9620:10591000F7549987CFEBFF021C7874630080000076
9621:10592000000000001F8B080000000000000BB57C89
9622:105930000B7854D5B5F03E73E6994C9249C80B02EA
9623:10594000E104420C18D299BCC05BEA1D2089015ABF
9624:105950001B6CB52018068D90D76442A82DB5D80CC5
9625:105960000611A8DE0B5754B06827400035E8A001A7
9626:105970002718EA00922252BF98FB37F2FD5FE10B35
9627:105980003E90979310B557EF55B96BADBD4FE641BB
9628:1059900022DAFE7FF8DAEDDAEFBDD77BAD7D86B196
9629:1059A000B196F3D18CFEAEC98C1D3FFC9EA249641A
9630:1059B0006C4681D16A90A034772BC6020EBB01DE03
9631:1059C0007595F935B1BC9F36B45FA2D766C17E75B7
9632:1059D00066EA973908FD72B1DF9F476BB1BE416F30
9633:1059E000356430F6B48EB94D098CC5688EC8B84E92
9634:1059F000CC2063CDD07FAC8131631E63297AC6B0E1
9635:105A00001DFA312394BB06F97AE3121A56309867CF
9636:105A10005C85D9DA9C81BBF53056C858DA28FF6816
9637:105A2000DC5FDA4A3DD5C7687A940633638126FF86
9638:105A3000DC0F33192B8E8ACD653F8052CFB2711F98
9639:105A40004C13656D85F54AE4AFBAD2006EEC906CEC
9640:105A5000B0342B36946F671319ABD7029088FF339D
9641:105A6000795A711D6D77F51EE8D7939C66DD08E0C5
9642:105A7000D8D4832C331FC6BBCA72D804C68E5A1C16
9643:105A800039D62468679B241C1F9DC3C7FFAC2C7AA2
9644:105A9000870CE3FB0FDF54E880BA3B0CCA01666554
9645:105AA0002CDF3B7A81F61680E39442C902B075EC94
9646:105AB00002ED688053940312B41BDDA31714DF8238
9647:105AC000E7335A3ECC66EC174C627180970CAD639D
9648:105AD000BA15CEEB2CFB44CF34D83EA02F9F0AF74B
9649:105AE0006A854960FDA4A3704FB0CF8139319E1DF6
9650:105AF000703E96A314627BBA6E20D602F7D1FF9552
9651:105B0000B6CC63A671B13F87FA6BF8F7AF8C3DD77F
9652:105B10002953BD0AABE5375689EED795697E0CEF60
9653:105B2000AF3ED568A4B2F36A29C379B4E59977C0CA
9654:105B30003C763D5B529E73FDF801AB86F695B10E47
9655:105B4000103A86C8CBCE14F8BF28A6C26E369DB1D7
9656:105B5000965F41C5BFF0763809D34FD208F896ADAD
9657:105B6000C5DAB0FE76EC1F6C6776230B8E775AA7EA
9658:105B70006E5D9B29D6433C2F639E49708434D620AA
9659:105B800031B8BF54E627FCBC644BA073D11FE0E9D9
9660:105B9000D94453CB46A45719E8328F4A6681322D37
9661:105BA0001AD683F6B4374C1EA4AB5D264EB7991AAD
9662:105BB0005EEED2F0FEFA28E6463A1D073083F26D1B
9663:105BC0009BE377B6249AC74FF3C8FB6D488FA39920
9664:105BD00097D64F616EDA8FDA6F2CEB3621CCB40397
9665:105BE00059844F5933EC7D26D9666E463A0B34D929
9666:105BF000D947DA607D203A765528FEEA71BC3974BF
9667:105C0000DC2C1AA78E77AED2B08F46E1E1FD443F7F
9668:105C1000CE4C8DDD9383E3D89B521ED677EBCB63BE
9669:105C200082E37A9B8CEC23B8D7FFD3C4A83CDD6415
9670:105C3000A1F5FF6F532A957F6B52A8FE6C533695E2
9671:105C40007D4D56AA7FBF693A95772D8A2940FA770C
9672:105C5000F966B28F8C42CEC0FF9C5E9DA32F04EEEE
9673:105C60009D393C1DBD26E8A83763F8F66E6C077CAD
9674:105C7000F6DECAF1D97F3FF3ECC820BA5C6B49B8B5
9675:105C80001EFF30C284E7EB8F610BBC704F6F17486B
9676:105C9000347FFF680EEFB7EA683EBB866DC5F16FD3
9677:105CA00017E8F9FC133455D86E4FE0F3F666010C93
9678:105CB000FB59307DE6CBC897F664A8CF0BC2BD5325
9679:105CC00078BB7D0CAF57F7ABB6FFCE66E17428F01A
9680:105CD000DEAF83F57388DE697EB5FFD7459C0F2361
9681:105CE000FB7B3235659E61EE23C1C6FB135FC07D31
9682:105CF000B8910F3242F8A25E21BE50E950A5BF977D
9683:105D00006CFC9E330D82CE4127D0FDA16E40F99AE6
9684:105D1000027C20D1BDD8199C679724F825921FA03A
9685:105D20004439AEF283CA072ABDA7019F4909C1734E
9686:105D3000FC28825ED5F2B495E3A53B39E601C26B3F
9687:105D4000A7CE02A210FA03221310BEB3C00EE34A7C
9688:105D50001E35370C27BFE2FED97B50E5C108F7702E
9689:105D6000DDF9F5BCFCBEE727F986721BE9761879E8
9690:105D7000F5B53581F6A3D26D92CDFE5F483FFD9219
9691:105D8000492BC54169E2741379FEB70BF83954FA0F
9692:105D900079C9C6B8BEC4734EBC5EDEA9E7193AE73E
9693:105DA0007246722F338AD747E2573D5788DC8BB152
9694:105DB0001506EF93316E0F8C057B606346907E0372
9695:105DC000495F2E43FDB5CDAAD0FEFEA09109FFAAE2
9696:105DD0003E19AA97E425F373C2F40CB3001E070E14
9697:105DE0001B88BFFD1A56F50A8C6B2555113CF76DC3
9698:105DF000362E0F06174CD2AC827D05FE6E76A3DEE2
9699:105E00000A8C19382BC1F8C0563040C87EB0FF58F4
9700:105E10004A66EC7ED029A897AE809C63598CC9DB7A
9701:105E20003E3F2BC1BE976D9319DA350110DB328CE2
9702:105E3000733D19E331F2718CC1B83A31AE79EBA7F9
9703:105E400077217D9D07FA44FBE62353FD040676CFB8
9704:105E5000EC6D3ABAC765317A0FD61FDBFAC48945B3
9705:105E6000009F6F9714B4374A6533B5D73C2F7B70CA
9706:105E70009D3A73E94509EC9C407BCB535150EFDCD4
9707:105E8000AB63261857DA2E59FD30FF726F0CDE0C0B
9708:105E90005BB645F77E5F76506EDE26F458D52EC988
9709:105EA0000314C3AAB687B7D7EC0A87EB983608C3A2
9710:105EB000FCB36C318964FF4D6636B4FFD896045448
9711:105EC0005643723B92AE506D237EEC8D5C1E33F6D2
9712:105ED00059F21D4097F2E1CFD3DF377378BE80CF00
9713:105EE00001FCC9E7FCFED57BAB1732FF93D1ACC0F8
9714:105EF0000BE7AC3F6CB2B8E160F51D329D23E08D3D
9715:105F0000A37B7645F5DD4E7C7A48B6A01DB6C12749
9716:105F1000BBB1DDD969DAA98173D61F9018DA9F4E1B
9717:105F20009FC1C3EFE9EA326C5FEE3359146C3F64F2
9718:105F300060328C0F00DE4C88C7717D847FC42BDA01
9719:105F4000A7F0F763A928887F19F19518C457F3566D
9720:105F5000BE9FF37B397E4AE5D55AC2578BC4524265
9721:105F6000F0FC67CD8B43F8C27EB3B7FDB50BF1BC37
9722:105F70000CF6675010EF32E1F93CE007E7D51FFE61
9723:105F800028BDCF1CC4B70CF8FEAD3A1EFA2FBF01D6
9724:105F9000BEAB987B1DDA73DF17CF69C8FF4964F782
9725:105FA0009EFF03DABD31608F23E908FB38A9B6F7FD
9726:105FB00078222C589170D9B902EA27A5BEC232C105
9727:105FC0004E90E21D8F225F9F9DF39747101D3D73FA
9728:105FD0005FB4215D34EBFA5A9F860A777CB4157959
9729:105FE000B03F63FEF6D7609DE2842FD3F723BFFC5A
9730:105FF000C96041727A42F023FE1901FF4EC6EF1BC1
9731:10600000F0780ECFEFEC34F80D708FACBDC43E6469
9732:106010000F4C407DECD5A39C2AD10F54AC407B1C87
9733:10602000E6C375242023E4EBDACE3F9F96609CA460
9734:1060300024B2C5081BCD7E19E769D35D193A37CC68
9735:106040002359FE42FDDA6C13E8FC13537EA4A0FC36
9736:10605000695EC81C5113BF4DCE3392F3CF0A7F65E2
9737:1060600044FB6F0479AFDA7DCC3D361EF90BEF822D
9738:10607000F30F973BCBA733F127F842C0556BDCB148
9739:1060800046E8BCFC666B2A9EFF63A4B358A4BF53CA
9740:10609000DA51B0AFBA5689F0568FF483FE15EA375D
9741:1060A000A8EFF70A39F27C77F1A8442C252B702A47
9742:1060B000ABEE94AD7E68AFF6717ABA8E6E84FCA8B2
9743:1060C00069E3F2E33A3A6A0338C44EAB47BA526125
9744:1060D000C0F7C9A0FC987A0DF6FBF23426F4955B64
9745:1060E000D05B4E5C1FD0CB2053E22C39217A4BE29F
9746:1060F000F6962A576EDA0AA23E64DDC91E23D386BD
9747:10610000AC7BF35E4B183CD59B1AD6FF073E25AC03
9748:10611000DDE6CF0E6BCF3F610D830BBBA787F59FED
9749:1061200076DA1E06DFD25716D6FF8717CAC3E0C13C
9750:106130001C38CF3076C7901E4A95C2FACF514C61B9
9751:10614000F3CFCB8E0F8307CDE27E841DA8DAA75F45
9752:10615000D8B81D1459AAF7FB136BF83AAA5FFCD301
9753:10616000E9E1EBCDB787AFF75DF1B21BEC7E2DD83F
9754:10617000F57B413F62F902D8FF5AB0EBDBC0FE4726
9755:10618000F825B0FFB1F482FD8FF5AF80FD8F703B35
9756:10619000D8FF081F047F05615F531995879ACAA924
9757:1061A000FE46F7D725D63D21D63D29D6FD47EF49F6
9758:1061B0002D9D6593345F009FCE4CB8A847396C6F16
9759:1061C000EC2BC538C0C05B32DB810CE2F09C684A26
9760:1061D000447D348AA1DDC2CA07DEC63845FD818907
9761:1061E000968D0AEAA1FF7C07DB03EDB282F2FCA8E0
9762:1061F000EF83589CE7CA17C087F938EE8358F48FAD
9763:10620000EBBE64046F847605E039FB4130903D03BA
9764:10621000720DFB67AAB047CFA02C6FDBAF477CD4D1
9765:10622000EEDD4FED6F7975E1ED7B5BC2DA2DD81FA6
9766:10623000CA5AAD87FCFB4B3E753E3FF5AFCB94ECA5
9767:1062400068175FDAFB9FC9CBB05FDBBBC9F77DCBBB
9768:106250007D7F72F0C51C94EB4ED0C37E73701E67B9
9769:10626000874EC07CDF7599FB4B135011B4496C12FB
9770:106270001457D826B60AE45DADAFB50EE5506DF6FD
9771:10628000221DCB207924E20D206DD15E42E71EEE67
9772:10629000EF8AF7D3D8FB60DE37BCC76FB723FE3A6F
9773:1062A0008FC5E2BAFDED72983F73771EB75BEFCEF4
9774:1062B000D313DEAEB41F8B55A07D83F718BF6FAD2F
9775:1062C0009FCE7D54C0FD50D23DFB643A77F5171A3E
9776:1062D000BA7F75BEFBF3649A678E6F520C9EABC794
9777:1062E000CBD773E529B4CE9CCCA595B8FF93A90B69
9778:1062F0000B65B2F34030A35C9D32AF15E303B55E8E
9779:10630000D93E9CBFB546CCDBA5E374F856E6AB5D41
9780:1063100063803E4E968DB291CC17FD7E93C7EDF112
9781:1063200052BD2313F5428F5989413A7EB86C620CF5
9782:10633000E2F52896585FB653EF80B2A69DAFD763BB
9783:10634000E98E457AEB69CF97D16E51E75B89EB1601
9784:1063500086D0F510DEDC84A72A4F8B19E709E28F7F
9785:10636000D7BBF2B81D7ED2F3EE5D68A7F464475B3D
9786:10637000112F5D7A46FE6D2DE015F5414F675A0BE2
9787:10638000DE83BA9E4BE0A33F5B43780DF874A2DF37
9788:10639000A25616D64FC7F1B52B7C3F16CFB97F5BFF
9789:1063A000847AE959B0ABA1BA4ED7908CE7FF787BDD
9790:1063B000F8FEAAC43DD7E9FCC9C921F45AD731C4B3
9791:1063C0002F66A2EF0E953F14C2A78AC79E6C6EB7C8
9792:1063D000F5A41A3CE82FD6ED6F25BABE3EBED39D7C
9793:1063E00081767EDAAF8D1437BC913FABDA01217E26
9794:1063F0000F433F4E5736B1503321A8EFAFD9EC2FA2
9795:10640000E615A23F544EFE5E0F1B5886CADF897602
9796:10641000701CCADDBF3D85EB0EB683BD07EB3A8D20
9797:10642000BEB91F829D35680546817D0F6ED7798480
9798:106430007F6246FB7499B04F3F561C4532E857E7E0
9799:106440001A0D9DAF2E278ADBB5424E7EB23FE3A7E1
9800:1064500048AF7527648B11ED50F05B086EE3764111
9801:10646000BD37E3DF67A0BDDDA6233B40B53B9CC243
9802:10647000EE382FECD9F36B06F464AF1E96D813B048
9803:106480008F2ADFE6AE346877E6CC257BD529B75175
9804:10649000FC71F9D670BBA0DA130ED7EE0D879D11F3
9805:1064A0007683EAB7F5E40DD90F93D1FF289167A45D
9806:1064B000201F7C2CF0A9FA232BA75A5390DF3768B2
9807:1064C00095B96A3C00EFC975F8D56ADCAFA72ECA4A
9808:1064D0004A7EC1AA43749FFD9F71BFA33F9571FB84
9809:1064E00088F17BEDF771FA76E924EE6700B9D27C8A
9810:1064F00046C9B3069AFADD83B12497182B437E6808
9811:106500005CC8FD483BC65CA1DC9727E24511FAF266
9812:10651000566D9F1C1F221F3ECB9B40FB2FD633077F
9813:10652000EAA9953156D25BE38DDCDE2E59EDB5211B
9814:106530001D8C07FFD81012CF1E6F1E90B0DFAE87E4
9815:1065400078FC5CF5EFE76B2DBAF810BD0792276C6D
9816:106550007E90247CFC8DE6B7C0FCE6E0FC70DF7129
9817:1065600078DF9F1658491FA7CF67AC9BF8B181F819
9818:10657000513DCF15A0B362A0338C9920DEEAB61F3F
9819:10658000A138B09375933F521ACBF7518AFB41382B
9820:106590008A97967C2E37CAF3F9BD350B58955B6FF9
9821:1065A000E5DBE3F3A1DC9BEF48CAA77A0BD1E54A10
9822:1065B000412B60A7A4F40D23771BFFC2FDAA4F81D6
9823:1065C0000F90CFEF699094CC303B88D3B78B57B105
9824:1065D000CBCCDB3B03EFC16DEFCE4E463F8AF3D50C
9825:1065E0009255262533844E5D48E7702F5596EA1F55
9826:1065F000A3DDED5895AC60BCDF85743F01AF91D34E
9827:106600007522FC43FFE23A3AF786C3F0B71DE9ABC7
9828:106610009E19ACA8475CBEC876AB16E33AF9F9C040
9829:10662000073707F9205DD0658B43F2A0DC6FF94A8C
9830:10663000CBE3588B258A5BDD09954897F487FDAA43
9831:10664000667A70FE3B01447F886D4924BEA1469066
9832:10665000233F17E7BD53EB3F827C7C5CE7CDC078DE
9833:10666000CA7127CFEB2C646070807C59CCBAA9EC3E
9834:106670008DAE3FE0A7C9DDE3D06F7ECF61A0384E7D
9835:10668000CBDA1D31284F73D95ACBF96C54EE6CEF2D
9836:10669000B5FC91ED0A2024765EC50BC5853611FE4A
9837:1066A00055BCEECDB7CF47FC8F34BEF6AF076E4773
9838:1066B00097A2F681567D0A279BEEECA220FE5CCCC9
9839:1066C0009B8DFB55F135843FD8F358B887056CA0F6
9840:1066D00008FD1A156F46F8371CDED4FB4CD70DFCAD
9841:1066E0000CAF0CF412C997487CAAF75BCF1A743C24
9842:1066F000CED5F0CE42E87FF75A8D82F6E175F8BD2F
9843:10670000011EFC26DEE48F91C8DF1C092F2A3E54AF
9844:10671000FC9C8EE7E34EDF23539CEEFF355EDECA22
9845:10672000773CFA6DFC18C97F23F1DB9255117C1977
9846:10673000C17F2ABE1CAB6289CF543CD6298CFCD6C3
9847:10674000BACE18AB8705F167867F883FCC53503CA3
9848:10675000A65D62CF48DF850FFB28AF11891FA00D12
9849:106760003BCAF59D11FCA7E26D24F9A3CAAF33CC57
9850:106770007FDC22517E80F3E7AF0C1ECC2FAAF901FB
9851:10678000350F704CC8BFC8F20CD81D9877D998DD6A
9852:106790009384F65AAF5E9D87E71FCFACE91EB70220
9853:1067A000C69F99C9CB5EB4D342607B148FC39D1939
9854:1067B0006D70E3BD9D9126CF423D7E46FAF5ED1CFE
9855:1067C0004ED12B082F4C996501B857A7C6ED1E1660
9856:1067D00072D843E59985D38AA99FC4DEC4FB5024AF
9857:1067E000564EEB48524219ECE7CC0393F29A59F01B
9858:1067F000FCAFE4737BD62BE4F9501CFB3712C5B118
9859:1068000097800AB060BC7DD6D36513A0FEEC8313DD
9860:106810006D94FF6B0C5F1FF56806C50737D37CB717
9861:106820007E31A05B9A13DCD790FE2BBECAEB2B27E0
9862:10683000913F512570684F98CCFD58CFC438D4474C
9863:10684000AA7E1A3CF1AA39347E7911F417D387C095
9864:10685000931F4F0FD56F4776FF3E0BE7A9D2BB734F
9865:10686000AD507FA1E50FE9680754ED7E348BECD283
9866:10687000DD1BB2D0BFA8DAF1FB2C3BC1D10EF26F09
9867:10688000B4FCDC97F7DDB27363881DFC6021F70B65
9868:10689000161B8F94A07D3AF7E64F1EC178F8A40727
9869:1068A000258A8BDDC3BA1F41BD5991CDF9886D3161
9870:1068B000925C87F928EFD83AF927BB509E9FCCFE0F
9871:1068C000405709FD4C055ABA8F0AE6792C05E36159
9872:1068D000EB258A8705FB8FA33CE6D2B5923E3511A6
9873:1068E000F561BC4D56705C3CEDE3DEF5B62EACAF09
9874:1068F00058CDEBE71A3CED3D38CFD37A6BAB821322
9875:10690000954F280FC90B9B0AB8DFB5E43189EC71AC
9876:10691000759D494F25B7849ED35420F4F98C6EE2BF
9877:10692000FF9F0ABCFC78F5BB6FA62A984F72C4156E
9878:1069300040FB3B4F9ECF44F9559C703107E97C9258
9879:10694000DEF14C359E7B8781E28705B969720AF4D6
9880:10695000CFFBE5CC27B05CB27AE933D51807DD6A06
9881:10696000243F4ADD5FA3A468D0DF3CD6F28B7BF1E5
9882:10697000DE2E3C69243BBAB1E5A614360C9FAAE58D
9883:106980001EC0BF92C5D8F34D462A5F6CB230058E4B
9884:10699000B8AF2995E0979B142AD9024E5F8DC25F4C
9885:1069A0001D69BE7CF0F715905705EB613EB0376D61
9886:1069B00026FB143CE7A429CE1D1BC4B926C1789B35
9887:1069C0003B6336DE43C186155D688A2617F0FCE21C
9888:1069D000DB3DEBD3C98E5E7DEEB96A685F5A509E8F
9889:1069E0005F00F76DDC7E95FCFC631D8F56505C7F6D
9890:1069F00087819F4F9CFBC2935929CF60DCF52D1DE9
9891:106A0000F9DFAEEDE79EDB00E57D8FADD087D2FBF1
9892:106A1000773DAF4DECE7467C35D23D7C7FBEFA7DBD
9893:106A20003AF1CF0EE0AB9C7F9CAF5CABD7D0FD3D85
9894:106A30005A507E37DEFB059D3B1DF9E9C2E41F116C
9895:106A40009DBB0F4B74FFAA1C57C72F10E7ADD5781D
9896:106A50001F237B50C8F1CFC1F3C3FB3DD2F17116A8
9897:106A6000DAC39FFB167EEBB90F3661061DE35A466B
9898:106A70002A23DB8BF48E8956385F9186DBC191ED3A
9899:106A80000F17A871719E6FC73F8C0BD709FDE98462
9900:106A90008DC525A0FE93FC51B998E7B8EDA216FD6F
9901:106AA0002FF0EBDE0FB72FD9FB217A7CA4FDDEA8F7
9902:106AB000ACC779B441B93BEDB486F943F4F62D7D0A
9903:106AC00051CC1FB2EE90DF01757ACCB3748C26B92D
9904:106AD0008078C3BC4CA063F20E842FEA391E0307F2
9905:106AE000C1BFE27115261705CF79B1E3722ECAD95D
9906:106AF000C8F3D61FBA4CF451E77BF4AA44E79F735E
9907:106B0000519B7BE3F31FD97D3917F17751D7578418
9908:106B10007E5440DF978B78A87F9DCBF3EF7B0F6A85
9909:106B20007DF57A3D8FEF4916F2074BE42BE4C7075A
9910:106B30004E703FBEBE6327C9D3C14E1E4F7169BAA6
9911:106B40004B5330FED070AE0BE5D9602AF7AF607EB4
9912:106B50003BDEDB8C89420F6A07D2E7835C3B2AF27B
9913:106B6000B5AA5F7701F9578FF378EBE83D526E34A1
9914:106B700043BBE212F233D457ACCA5887747EC19338
9915:106B8000849120F676EEFFD453FCED8D688B4C7625
9916:106B90002BD486E06FE81C1E993F9C61AA9F1ECDF6
9917:106BA000EC21FD5C7AE5A7E41F9FE47932D714CE8F
9918:106BB0004FEC10E727E7DA23FAD490F95E52E58725
9919:106BC000B01FE7BEF13FC497A76CF65328CFA25180
9920:106BD00016E27CA9711E4912FD8A82794073A7F0E2
9921:106BE000C7CB646A77F964361AC7A4C650BEBE8C98
9922:106BF0006DD2A2BD3B977967F077327DFFF643688F
9923:106C00009FF7869C8FEFB1C07EA6FC71699423B379
9924:106C100011ED238D24EED55B303F549F15727B6BB5
9925:106C2000862C911E1B181D4D76CA9C05CEC5B85FDB
9926:106C3000B55F9996EB339887EC2CE619C8C57C268E
9927:106C4000F30FE4629E53ED77D71BD10DA41799B7CC
9928:106C5000E0AE9075C61472BDF929E69F419EB84416
9929:106C6000FEB344FEEA29F4A31A0FF33C61AF26E316
9930:106C70003D7CAFE5867B46BC5E06BCDA51FF3898AA
9931:106C8000DD8EFC3335C983FCE3DA27317CB756DF70
9932:106C900061D881719D7A5D5F32D2F306DF5FF5487E
9933:106CA000CFAE03EFEA95A9389EC781C05ED7E0FD5D
9934:106CB000BA84FE72FA6E7A0FE36ECE135C8B3AB52D
9935:106CC000EF925F5FDBBE9FFCF73AE627FFBDAE2D7C
9936:106CD0009C5E0653799C3D923FC6142A617C3167C5
9937:106CE0002BE78BBB64D680728E89B8E99CD414B232
9938:106CF0004782E3849D285F7E04ED97FE09925582CA
9939:106D0000A9FAA3DC6BD12E7267717BA6FF4F2F16F9
9940:106D10002C23B9E229F819BE8B11F6EE9CF59BB530
9941:106D200072C87EE674F238617F14AB3A48F8768C0C
9942:106D3000453CA4E7958F2DE4EF6472E99D8F86C7EB
9943:106D40003523CFF1AC88E39CC4384F4E70DFF3D2CB
9944:106D5000D2B81C631EA29F2E0D5F5F7DF7A28E5FCF
9945:106D600021E869C81F92787C6A24B98279944A9193
9946:106D700047A91479944A9147A91479944A9147A94B
9947:106D80001479944A9147A91479944A9147A914799E
9948:106D900014AC3F895BA5F7703B9F417AE8421E1B0C
9949:106DA00013847B1322E031E1FD7B13A470788C44C3
9950:106DB000FD8B0B773EE3CEC138A645C8252506EDF1
9951:106DC000AF0B261E5FEA8871CC2D84FACA39CDBB81
9952:106DD000F97B443BBD67294E58B818F96B30D1C0D8
9953:106DE000500EB90B1DF3111F274ECCCEDC4CF2D147
9954:106DF00064C53C77EFDD37C7515CEE2D99C9B0E42F
9955:106E0000CCECFCB50500CF344B44B720277E50AE08
9956:106E1000FA9330CFEC4E9ECF2891EB2A71FEC6D16B
9957:106E2000A67C8A6BE53B161586C40F4AC72CCF4457
9958:106E30003BA84BA7BC87F154F75F740CFD2835FEC7
9959:106E4000A6F6EBCD9B598DFB9A933D716D1ECA1B27
9960:106E5000602E946F763D6BC37DD935D15233C92BEB
9961:106E6000458BFC5F2DF03D4BE1F6B05FAF6813D072
9962:106E70006F8F9A99E85678BEAA52E4AB2A45BE0AAB
9963:106E8000F1730AE36650BE03F55876433D9691EFE1
9964:106E9000B9761794AF24BA6503E9A1EFC1E6225F82
9965:106EA0007139938EF4FC8288C367178A7769F9E594
9966:106EB0000FF2715E9AA756C4DF2EEBC2F378EAB8E0
9967:106EC000E07846E51D3FE0F299C5E9F97BD7B1CC02
9968:106ED0008DEF69EF786D34C593021E8D5B17073017
9969:106EE000F038CA2FF61AF76F592AE7973B5E4DA183
9970:106EF0007ECD220EEA4CE8CE4A40BD2BF84A850FE3
9971:106F00007EC3DFF938F30086F275899FCF79477722
9972:106F1000563CC001C9A4C1F8B873076FEF117CE7F4
9973:106F20009C20E613E761466F3AE2A3FFF06BE9F7B6
9974:106F300002BCD1EC5FC6E5BD3F8BE434F367E17B77
9975:106F4000A1CB92F72CBEB7FDF5C17F5984EF6B2F13
9976:106F5000EBBCCF21FCDB8333382CED3F6B096D4F4D
9977:106F6000F2A6E37BDC5F1FFCE1227C9F7B3969FF9B
9978:106F700073F1D61058F7CA596CD73F3C635131F4BE
9979:106F80009F67F09C6842BA7999D39769DF81F3785B
9980:106F90003FB51DDC5E9FB5EFC09557501F1F88A100
9981:106FA0007CBDAF3083EEBBB963CF63486F81FD3AE0
9982:106FB000E2838D6D7F7DEEB7D4CF40619479066F0B
9983:106FC00001865CDC457FBB1BF7352FDAFB19C29BC2
9984:106FD0008B6EA37DCE1BC5F9F9A9A2B98B903F0397
9985:106FE00007F6FD0AF96F5E1C18B2B89F174D849F13
9986:106FF0009A572717631C2010D35D81F3D7BF60B069
9987:10700000229DD6BC9A320BE302C70B797CBA7ACAAE
9988:10701000A674D4AF9A43CFEFFE2DC6295F30517EC0
9989:10702000C695C0EDBB1AB9A56805E16FE76E7C3760
9990:107030001278DE4479D26A9803D7ABDE3D89E2EA62
9991:10704000AF7FFD4105E2A144DEBE1BEB3FDB65D215
9992:10705000E03DF4E8ED713F423EECD1919F592DE0C7
9993:10706000EADE517C3FD17DA584BFC44DE9A85F6BAA
9994:1070700046FDE676DCF73C79D373E8E7B03D06CA17
9995:10708000155C7C1EEE0DC65D6CD5D12BD5C0F331E1
9996:107090005AA497CBD2A68A6770FE56DEEFB2691368
9997:1070A000DDA7BBF52686EB413F86F2EAB2B439ACE8
9998:1070B000FE62EB9E5CF4432FBD308FFC5195CE55A4
9999:1070C0007EA9D96508D387240992C57B0952B36E7E
10000:1070D00066063D5B2DC04B07B7059E61C1F197DA8F
10001:1070E000747E3DDC51B581ADC5F7C12A3FD4A4DD26
10002:1070F0005686E7ABD1B464A1BD529DDF57817C7148
10003:10710000D1C48CA9F88E4EE8AB9AF635F3D1EE1DBA
10004:10711000693FB1E25DDFE7820F3FF7993CA1F9C11A
10005:10712000C8F26F4D4C3915F26EF89E0603D9EEEA9F
10006:107130007C6FEBBD75E89FD52770F97116FAB781A2
10007:107140001C331771B9B76455787FA988BF4BACD78A
10008:10715000F765A1DE53E7FFA650956B7D5928AF2256
10009:10716000C7CD9385BC7951227953D32E9D93E19E4F
10010:107170006A8C6E0FBEDFA94167929F537B4DE2E39D
10011:10718000528BC4BDC3D8A78B3268DD9A3693DD0419
10012:10719000E36AA3FA62D11EAA8BE98B453B277048AC
10013:1071A000663B04BA1293057E26089485C41DABBDC8
10014:1071B0003ABB2977183CA3DD84EF73F0BF61FDB6BD
10015:1071C00022CE2755BE685A8F59FA8A904EABB687A1
10016:1071D0008FC3735942F82FE0DB991CEA8FDBC4BEE2
10017:1071E000FBA573C427FD5FBF9F8E78AFD1B0B59864
10018:1071F00047BC24F1EF1E00A6EF1E2E897C64CDDF74
10019:10720000CD51482F973EAF23BE0D487D24D7CE1CCD
10020:107210005C407229A0EB23B9D6535441F22110DF10
10021:10722000578172EACCC17ADE3EBAAF4281F64E8413
10022:10723000B17D1C237D7FB9E801921FF364FEBE81FE
10023:10724000EDD459781C687D6F13F9153A25D4EFBE3B
10024:1072500052A4E66DF4C173CB41BE0930655F3BF2C9
10025:10726000619599E239603FB5BD8276DEC2642BC676
10026:10727000C5AB701CA7037D68FE2F31E1CB65889FED
10027:1072800045718E3B8B308F9DD347FE035035D9E936
10028:10729000F57F32901FD9AF1BD88D722A37CEB1B08F
10029:1072A00008F651A7EF5E87A1A72BBABE2ECCFBCD67
10030:1072B00095B93C627B385D057276F2EF2444FEB0EE
10031:1072C000BA88CB5FD05BAC05E942E2F83DE67BF5DE
10032:1072D00014CA9540F74492C7917C73D1F7442CCAE5
10033:1072E00087D3A0C7DD217EFEE9A57B284FBF00DF45
10034:1072F000654079EFDA707A18FCEA67E4EFB1C742CB
10035:10730000EA910EB784C3917484F4E80F933B6EA2A4
10036:107310009B3D82AF6A6775D7E33D0CC177002C8730
10037:10732000C04723E088FEAC9CDB097BF0BF61DEBA7E
10038:1073300071FE5EF2CFF7F177B1CDA0BF083E104DE0
10039:107340007963CD3ED04F895C3FA15EA88DEDA6B894
10040:1073500054E08081F2230F777C4CEF19810E29FED7
10041:1073600052DBF15A32FAED3EF41392480F26D33B2A
10042:1073700095031DC9E86FA8F5751A6F96788F4F763B
10043:10738000BA5AEF94FD59B8FF5AA93B17DB7D851611
10044:10739000D11F60196146E7A89338BFB30E99E4790D
10045:1073A00024DEF60A7A05B9904BEF2C0EF1B8802A4C
10046:1073B00007AA853C398AF5399CEF2D6A5E49C2F7E8
10047:1073C00072D1C3CA879B8A547BB881E236BB8A14C8
10048:1073D0007EAF623CCDCBE34AD45EFFFAE5DC0939EF
10049:1073E000384E11E342E4D0C4A05C41FE4F25FE7F3D
10050:1073F00058970CE7AA794EB236A39C5ABCA614BA89
10051:10740000B3E5DA15A5142F13EF3F23F7154947F617
10052:10741000228EDF1A4D7C4962C87C97C05D4FCD2318
10053:107420003943EFE8EF4F7CBC14E313BF58BC99E835
10054:107430007948DF84F2399E673B97E3C836D734D763
10055:10744000D3F1F286967529C3EC23729FD58E96D21E
10056:1074500064E5FA7A75BF974CEAFE66E99242EF61FD
10057:10746000C19AD22428971BFFD17BE0E7BDD461F0FD
10058:10747000A35EAD5EBC625DDC3074739D3ED81EA21F
10059:10748000BF26207E3D94D71869FF91659DE4EFC526
10060:10749000381103BE6A25FE027E09D10B6542BF0E7C
10061:1074A000C51BAA968E47BF9339968E473D037C55E0
10062:1074B000611DC6AFC42F4B34F476C34D65E47E3EE8
10063:1074C0002BE271D2B222CE2FA76CF66F50BE8EF493
10064:1074D000BD85619AF4ADDF5BA46906DF417E4B4B4D
10065:1074E0008E51300F54323B9AF73B6CB260DCA6FFF2
10066:1074F000F09714D7ED7FC4BC80E70BCC6C34B47725
10067:10750000A54EDD11AA473CD3385F461770BBC59521
10068:10751000ADFBF6B8504ECC505C88EC869C68CA93A4
10069:10752000047C9F92DEEAEF2CB4603E23D00DDE2176
10070:10753000F093EBEBFF4A46FD1AE8FC88DE8305BEBC
10071:10754000FA98DE896D10EFF48EFAC43BAB6E258697
10072:10755000BE8B2BFBA014FB6D1465303EC0E35A6A52
10073:10756000A9FAFF21FEEF946985C3FABF090E73687B
10074:107570005C4049192E8E121A17C8D4F2B80096181A
10075:1075800017C8CCE4710184312E8025C605B01EE3F6
10076:107590000208635C00618C0B208C71012C312E8001
10077:1075A000F59F89EF1FFA4130F178A599E4FA4A7CFA
10078:1075B000DF0EF7B7F230CF3BAD6C95297F8BDF3F05
10079:1075C000A07EBBEEDD4CBB7837E3DD4C793CD701C8
10080:1075D000D98A2872E9068E631CC7B55FB2AE41B97D
10081:1075E000D2B480D6DFD059F8DE62AC6FD559350AF7
10082:1075F000D111C7638B44EFF46B3A5B29EE549C7254
10083:10760000584FF56D12C338E95D06EEE73A65A8CD2F
10084:10761000A33C28D9C14E4337F91FB57B25A532F4C9
10085:107620009DC6F4AB2407D47CF232DEC49C5E935238
10086:1076300039CC3B90A177E7E2DDF432CC33E37B71C8
10087:10764000F92B7AD7EF04877414D2E156FEFED902E3
10088:10765000FF88DF23DE35D574EE5F87EFA122F3CDFF
10089:1076600043DFD345E49DEBA789BCB28D7F5F51F624
10090:1076700064E5BE03B0DEE02603D91BEE42C703D3A8
10091:107680009230EF6FA7F8C8F1C326F28B3EDC7C5333
10092:10769000587C84E53B1E9C46F9F9B114AF68D44987
10093:1076A000A48F67974D4CC17B9C7D42477AA737AF2B
10094:1076B0007C35F66B9CAA503CAAC4C01EA079C47B42
10095:1076C00029151F25CD924703F05266A577F64BE0AA
10096:1076D0009A305ED9AF33AFC7774D4B187FE7A0D252
10097:1076E0004DE36689E8060304789F15E23E9774FE31
10098:1076F000F94B7CC7709F81DBAD691A9EBF4EDBC81A
10099:10770000DF33DCCF1C7AD4B3CB91BA64D28F7FEA5B
10100:10771000837A47F4D8746E972B2938FFD2933A7A3C
10101:107720006F5B92F2932C07E9E9627AC720F917C9D7
10102:10773000D76E1E997F22DF311CD771B902F748FE40
10103:107740005017D225C5651C549E6CAAA2F277E27B25
10104:1077500088EBDFFF0F9C453F312D25C68A726EC432
10105:10776000EFDDA2BEFD7BAF17C4FBB5344D4FBE822B
10106:10777000F7F177B315EF437D2778CA56BE1FF16442
10107:107780008F656E0B7D0F061210EEB5140F22615C33
10108:10779000DB6BC7EF8E060E4B167A977C9D7CDCFC6C
10109:1077A00008BE1371654A1649C1F8F7A69264D877E6
10110:1077B000E9840CDAB7CBC7E3A37443C9183FE7F8F1
10111:1077C0004ACF731C9B5618AC9F27F82600FD399DA5
10112:1077D000FCD083F4F61DE2A6BBB0BF9B99E87B6AA0
10113:1077E000FA83FDCCBB791CC54F55BA196C4BD981B6
10114:1077F00074F39E90FB8B17BFAB43FDDF9BEFE8C19B
10115:107800007D54545E7D2499CE377CFC4A7DA71E1999
10116:10781000BF0A959FFF3FDEA79F6A6AA0F29DA6550B
10117:10782000547637B9A93D44FE5F1A41FE47C63FAFC3
10118:10783000227F47C63F99518923FD09FCCDE3CD1135
10119:10784000F1CEB251F7AE87FB9BBD456FC52A35FE21
10120:1078500089EF87579A491EFCF7B461E39EEABD9908
10121:10786000294E3AC84C7978FFB3B2276A35D0AE9D1D
10122:10787000CEF1A7C61D913FF07CC81F58227F68B586
10123:1078800041FE78560F2C5CC0F5BC9BF4BC89F0BA65
10124:107890006E0DC80F80EF639630F97125427E80C36C
10125:1078A00071377D57D56960182754DF51CE82E28B3E
10126:1078B000BC61E48997CB937151DEE7E97BFFFA283D
10127:1078C0007A9F7B5CBC873BBE81BF87AB64E5B4EE2F
10128:1078D00030722516F171DFA881B37F80FEF7FDDEDF
10129:1078E0004CF6CABAD1CB8AFE19B9724D7CD7F234A4
10130:1078F000FEAE80F6DB7E57E03109F3A18DF7301B39
10131:10790000E259FD5D811491CFFE1EBF2B306D7AE1EF
10132:1079100077FF5D815BA78F5F1CFABB02B7FA323835
10133:10792000ACFEAE001BBF7884DF15983D3DE9FADF61
10134:1079300015B86D3AF71747FA5D01B027CB705C9226
10135:10794000CD3E07CB34B1CFC8EF694F8AFC5D97C6F7
10136:10795000B118CBD258B796EA359E02FA0E5EE3FD17
10137:1079600025F981F98E9FE3794B9FB04DC90638CD3B
10138:10797000E02539D99B67BF13EBAFD9EC77E13A919A
10139:107980007173C42DFAF7B09FBBB13DF2DD958ACF7C
10140:1079900015D3B9DC6814E58CE6E1BF276F9CCEF304
10141:1079A000F237DA37ECB706D71BDAFFA6A505B81F02
10142:1079B000D86F2DD6C37EEBB064E684B0EF53AFA78B
10143:1079C0003337D155E3744E5F20CFE67DC8ED412AB1
10144:1079D000B3B49E78B41FC73CE489C7FD8E691930E3
10145:1079E000E177107F740F9850BFFF71F58009EBFFAE
10146:1079F00068E7EF9523E77F793AF703B2660CD0F892
10147:107A0000F168E3937D3E108FF65356D587EB28DF60
10148:107A1000B27732E997F142BF8C7F6882AF0FE86D91
10149:107A2000FCB638CA67B3E2446AAF31723EAD79A89A
10150:107A3000F2E00185BEDB9AF76188BD33D903FB0E06
10151:107A4000B3BFB483FCDD25C0784F7B750423CDA282
10152:107A50007DE564FCDDE5182137D04E5B0C72C15921
10153:107A6000F5E69794F7C7F1381FE66891FE7CBA41B6
10154:107A7000F17D9A05FDD0E50BD674915FB875A85ECF
10155:107A8000F899FBD7A1DF0CF65B587D4DE5912ED41C
10156:107A900037B57BC3EB9D0D57C97F05FB2DACFE9E13
10157:107AA0005F9ED3F3DF2F08AF07FCEE45BA54F17B9E
10158:107AB0005CE79D8C7EDE71679495BFDFF7D2EF9512
10159:107AC000EC10DF3FEFFC8F599C6E04BE61BC377435
10160:107AD000FCC8F4D14CFDDDB35836F2C38D4A552EA7
10161:107AE0000DFDFE899EB929BE373786E48E4BF855C9
10162:107AF000F59516D2F369F546925F25729415E1A1CA
10163:107B0000DF3F2993859CF212FFF7DC1E4F713C3A50
10164:107B100000C2095329EF93DCCCE1812403C9871209
10165:107B20004D79DD1E28DFD4847FC7FE2CCA0719F9E2
10166:107B3000977F87E9D27BF977E25AA510FDDC66C909
10167:107B4000BE0DBF7B6C96441CB1DA4CF9827E8C2F43
10168:107B5000C279B6C47BB62D8375B6DC9943F6713F06
10169:107B6000E3F2D4BD80E7ADB6C4972F5E81ED0BA7DD
10170:107B700050FBC16F263E5E80F653759415EDA72D20
10171:107B8000366E5F6F999F4DEDAF4BCA1A3CB7FB2124
10172:107B900046EB6C99CFCFBDE5F171E2FB0B8F09F994
10173:107BA000794B8B7D34E6A366591C17105F63443E06
10174:107BB0006E4B06D443F99454BEF07E9C672ADFEFE7
10175:107BC000EF6C0AC98FE30BA73CBE5B2135E2C7BC53
10176:107BD000906B6E0CF9C1FF0BB81F749470470000D6
10177:107BE0000000000000000000050207000000000087
10178:00000001FF
diff --git a/firmware/bnx2x-e1h-5.2.7.0.fw.ihex b/firmware/bnx2x-e1h-5.2.7.0.fw.ihex
deleted file mode 100644
index 280bbcf4f2a1..000000000000
--- a/firmware/bnx2x-e1h-5.2.7.0.fw.ihex
+++ /dev/null
@@ -1,12847 +0,0 @@
1:1000000000003BE8000000600000068800003C5053
2:1000100000001968000042E0000000AC00005C50E5
3:1000200000008DE400005D00000000EC0000EAE844
4:100030000000E3000000EBD8000000940001CEE0D7
5:10004000000058E80001CF78000000C400022868D2
6:100050000000F9700002293000000004000322A80B
7:10006000020400480000000F020400540000004594
8:1000700002040058000000840204005C0000000636
9:100080000204007000000004020400780000000078
10:100090000204007C121700000204008022170000F6
11:1000A00002040084321700000604008800000005E6
12:1000B0000204009C12150000020400A0221500009A
13:1000C000020400A432150000060400A80000000489
14:1000D000020400B802100000020400BC001000007E
15:1000E000020400C010100000020400C42010000030
16:1000F000020400C830100000020400CC40100000D0
17:10010000060400D000000003020400DC0010000020
18:10011000020400E012140000020400E422140000B3
19:10012000020400E832140000020400EC4214000053
20:10013000060400F000000003010401240000000098
21:1001400001040128000000000104012C000000004F
22:100150000104013000000000020401D00000890603
23:1001600002040004000000FF02040008000000FF79
24:100170000204000C000000FF02040010000000FF59
25:1001800002040014000000FF02040018000000FF39
26:100190000204001C000000FF02040020000000FF19
27:1001A000020400240000003E0204002800000000B9
28:1001B0000204002C0000003F020400300000003F59
29:1001C000020400340000003F020400380000003F39
30:1001D0000204003C0000003F020400400000003F19
31:1001E000020400440000003F020404CC00000001AF
32:1001F00002042008000002110204200C000002008A
33:10020000020420100000020402042014000002195D
34:100210000204201C0000FFFF020420200000FFFF5A
35:10022000020420240000FFFF020420280000FFFF3A
36:1002300002042038000000200204203C00000000DE
37:100240000204204000000034020420440000003575
38:10025000060420480000001C020420B80000000131
39:10026000060420BC0000005F0204223807FFFFFFE5
40:100270000204223C0000003F0204224007FFFFFF6F
41:10028000020422440000000F010422480000000084
42:100290000104224C00000000010422500000000074
43:1002A0000104225400000000010422580000000054
44:1002B0000104225C00000000010422600000000034
45:1002C0000104226400000000010422680000000014
46:1002D0000104226C000000000104227000000000F4
47:1002E00001042274000000000104227800000000D4
48:1002F0000104227C000000000C042000000003E840
49:100300000A042000000000010B0420000000000A85
50:1003100002050044000000200205004800000032F1
51:10032000020500900215002002050094021500202D
52:1003300002050098000000300205009C0810000033
53:10034000020500A000000033020500A400000030F8
54:10035000020500A800000031020500AC0000000208
55:10036000020500B000000005020500B40000000610
56:10037000020500B800000002020500BC00000002F7
57:10038000020500C000000000020500C400000005D6
58:10039000020500C800000002020500CC00000002B7
59:1003A000020500D000000002020500D40000000198
60:1003B00002050114000000010205011C00000001FB
61:1003C00002050120000000020205020400000001F5
62:1003D0000205020C0000004002050210000000406F
63:1003E0000205021C0000002002050220000000138C
64:1003F0000205022400000020060502400000000A59
65:1004000004050280002000000205005000000007E3
66:100410000205005400000007020500580000000813
67:100420000205005C000000080205006000000001F9
68:100430000605006400000003020500D80000000665
69:100440000205000400000001020500080000000190
70:100450000205000C00000001020500100000000170
71:100460000205001400000001020500180000000150
72:100470000205001C00000001020500200000000130
73:100480000205002400000001020500280000000110
74:100490000205002C000000010205003000000001F0
75:1004A00002050034000000010205003800000001D0
76:1004B0000205003C000000010205004000000001B0
77:1004C000020500E00000000D020500E80000000742
78:1004D000020500F000000007020500F80000000718
79:1004E000020500E40000002D020500EC00000027DA
80:1004F000020500F400000027020500FC00000027B0
81:10050000020500E00000001D020500E800000017E1
82:10051000020500F000000017020500F800000017B7
83:10052000020500E40000003D020500EC0000003779
84:10053000020500F400000037020500FC000000374F
85:10054000020500E00000004D020500E80000004741
86:10055000020500F000000047020500F80000004717
87:10056000020500E40000006D020500EC00000067D9
88:10057000020500F400000067020500FC00000067AF
89:10058000020500E00000005D020500E800000057E1
90:10059000020500F000000057020500F800000057B7
91:1005A000020500E40000007D020500EC0000007779
92:1005B000020500F400000077020500FC000000774F
93:1005C0000406100002000020020600DC000000010A
94:1005D000010600D80000000004060200000302200B
95:1005E000020600DC00000000010600B80000000068
96:1005F000010600C800000000010600BC0000000069
97:10060000010600CC000000000718040000A900004B
98:10061000081807C800070223071C00002C2100004F
99:10062000071C800038930B09071D0000292B192E89
100:10063000081D685052F60225011800000000000055
101:10064000011800040000000001180008000000006C
102:100650000118000C0000000001180010000000004C
103:100660000118001400000000021800200000000122
104:1006700002180024000000020218002800000003F5
105:100680000218002C000000000218003000000004D6
106:1006900002180034000000010218003800000000B9
107:1006A0000218003C00000001021800400000000495
108:1006B0000218004400000000021800480000000179
109:1006C0000218004C00000003021800500000000057
110:1006D0000218005400000001021800580000000435
111:1006E0000218005C00000000021800600000000119
112:1006F00002180064000000030218006800000000F7
113:100700000218006C000000010218007000000004D4
114:1007100002180074000000000218007800000004B5
115:100720000218007C00000003061800800000000290
116:10073000021800A400003FFF021800A8000003FFF9
117:100740000218022400000000021802340000000019
118:100750000218024C00000000021802E4000000FF32
119:100760000618100000000400021B8BC000000001EE
120:10077000021B800000000034021B804000000018B3
121:10078000021B80800000000C021B80C000000020C3
122:100790000C1B83000007A1200A1B83000000013806
123:1007A0000B1B830000001388021B83C0000001F4B0
124:1007B000021B1480000000010A1B148000000000CE
125:1007C000061A1000000003B3041A1ECC0001022711
126:1007D000061AA020000000C8061AA00000000002AF
127:1007E000021A1ED000000000061A1ED800000006E3
128:1007F000061A36E800000004061A36E0000000027F
129:10080000061A500000000002061A500800000004FA
130:10081000061A501800000004061A502800000004B0
131:10082000061A503800000004061A50480000000460
132:10083000061A505800000004061A50680000000410
133:10084000061A507800000002041A404000020228F4
134:10085000061A400000000002061A400800000002CC
135:10086000041A62C00020022A061AD1000000000209
136:10087000061A200000000124061AB000000000281B
137:10088000061AB1400000000C061A330000000014E4
138:10089000061A33A000000068061A81080000000252
139:1008A000061AD1C800000002061AD1D800000020A4
140:1008B000061A249000000124061AB0A000000028A7
141:1008C000061AB1700000000C061A33500000001424
142:1008D000061A354000000068061A81100000000268
143:1008E000061AD1D000000002061AD25800000020DB
144:1008F000021A292000000000061A30000000000241
145:10090000041A30080005024A061A301C00000009CB
146:10091000061A320000000008061A5000000000020B
147:10092000061A508000000012061A40000000000263
148:10093000061AD0C000000002021A2924000000009C
149:10094000061A304000000002041A30480005024F29
150:10095000061A305C00000009061A32200000000868
151:10096000061A501000000002061A50C800000012BB
152:10097000061A400800000002061AD0C80000000253
153:10098000021A292800000000061A30800000000228
154:10099000041A308800050254061A309C0000000931
155:1009A000061A324000000008061A5020000000021B
156:1009B000061A511000000012041A401000020259D9
157:1009C000061AD0D000000002021A292C00000000F4
158:1009D000061A30C000000002041A30C80005025B8D
159:1009E000061A30DC00000009061A32600000000818
160:1009F000061A503000000002061A5158000000127A
161:100A0000041A401800020260061AD0D80000000242
162:100A1000021A293000000000061A3100000000020E
163:100A2000041A310800050262061A311C0000000990
164:100A3000061A328000000008061A5040000000022A
165:100A4000061A51A000000012041A4020000202679A
166:100A5000061AD0E000000002021A2934000000004B
167:100A6000061A314000000002041A314800050269EC
168:100A7000061A315C00000009061A32A000000008C6
169:100A8000061A505000000002061A51E80000001239
170:100A9000041A40280002026E061AD0E80000000284
171:100AA000021A293800000000061A318000000002F6
172:100AB000041A318800050270061A319C00000009F2
173:100AC000061A32C000000008061A5060000000023A
174:100AD000061A523000000012041A4030000202755B
175:100AE000061AD0F000000002021A293C00000000A3
176:100AF000061A31C000000002041A31C8000502774E
177:100B0000061A31DC00000009061A32E00000000875
178:100B1000061A507000000002061A527800000012F7
179:100B2000041A40380002027C061AD0F800000002C5
180:100B30000200A294071D29110200A29800000000E3
181:100B40000200A29C009C04240200A2A0000000005D
182:100B50000200A2A4000002090200A270000000002E
183:100B60000200A274000000000200A2700000000059
184:100B70000200A274000000000200A2700000000049
185:100B80000200A274000000000200A2700000000039
186:100B90000200A27400000000020100B40000000185
187:100BA000020100B800000001020100DC00000001A9
188:100BB0000201010000000001020101040000000127
189:100BC0000201007C003000000201008400000028C7
190:100BD0000201008C0000000002010130000000044E
191:100BE0000201025C00000001020103280000000075
192:100BF0000201607000000007020160800000000137
193:100C00000201055400000030020100C40000000190
194:100C1000020100CC00000001020100F80000000108
195:100C2000020100F00000000102010080003000001D
196:100C3000020100880000002802010090000000006E
197:100C40000201013400000004020102DC0000000186
198:100C50000201032C00000000020160740000000784
199:100C60000201608400000001020105640000003000
200:100C7000020100C800000001020100D000000001D4
201:100C8000020100FC00000001020100F4000000016C
202:100C9000020C100000000020020C200800000211CD
203:100CA000020C200C00000200020C201000000204C4
204:100CB000020C201C0000FFFF020C20200000FFFFA0
205:100CC000020C20240000FFFF020C20280000FFFF80
206:100CD000060C203800000002020C20400000003406
207:100CE000020C204400000035020C204800000020C7
208:100CF000020C204C00000021020C205000000022B9
209:100D0000020C205400000023020C20580000002494
210:100D1000020C205C00000025020C20600000002670
211:100D2000020C206400000027020C2068000000284C
212:100D3000020C206C00000029020C20700000002A28
213:100D4000020C20740000002B060C207800000056D6
214:100D5000020C21D000000001020C21D4000000018F
215:100D6000020C21D800000001020C21DC000000016F
216:100D7000020C21E000000001020C21E4000000014F
217:100D8000020C21E800000001020C21EC000000012F
218:100D9000020C21F000000001020C21F4000000010F
219:100DA000060C21F800000010020C223807FFFFFF9C
220:100DB000020C223C0000003F020C224007FFFFFF14
221:100DC000020C22440000000F010C22480000000029
222:100DD000010C224C00000000010C22500000000019
223:100DE000010C225400000000010C225800000000F9
224:100DF000010C225C00000000010C226000000000D9
225:100E0000010C226400000000010C226800000000B8
226:100E1000010C226C00000000010C22700000000098
227:100E2000010C227400000000010C22780000000078
228:100E3000010C227C000000000C0C2000000003E8E4
229:100E40000A0C2000000000010B0C20000000000A2A
230:100E5000020C400800000411020C400C00000400C9
231:100E6000020C401000000404020C40140000042195
232:100E7000020C401C0000FFFF020C40200000FFFF9E
233:100E8000020C40240000FFFF020C40280000FFFF7E
234:100E9000020C403800000046020C403C00000005F7
235:100EA000060C404000000002020C40480000000A0E
236:100EB000020C404C000000F0060C40500000001FE7
237:100EC000020C40CC00000001060C40D00000003AAB
238:100ED000020C41B800000001060C41BC00000003F8
239:100EE000020C41C800000001020C41CC00000001CE
240:100EF000060C41D00000001A020C423807FFFFFF29
241:100F0000020C423C0000003F020C424007FFFFFF82
242:100F1000020C42440000000F010C42480000000097
243:100F2000010C424C00000000010C42500000000087
244:100F3000010C425400000000010C42580000000067
245:100F4000010C425C00000000010C42600000000047
246:100F5000010C426400000000010C42680000000027
247:100F6000010C426C00000000010C42700000000007
248:100F7000010C427400000000010C427800000000E7
249:100F8000010C427C00000000010C428000000000C7
250:100F90000C0C4000000003E80A0C400000000001B7
251:100FA0000B0C40000000000A020D0044000000325B
252:100FB000020D008C02150020020D00900215002089
253:100FC000020D009408100000020D0098000000338C
254:100FD000020D009C00000002020D00A000000000B5
255:100FE000020D00A400000005020D00A8000000058D
256:100FF000060D00AC00000002020D00B4000000026B
257:10100000020D00B800000003020D00BC0000000249
258:10101000020D00C000000001020D00C80000000227
259:10102000020D00CC00000002020D010800000001CA
260:10103000020D015C00000001020D016400000001CE
261:10104000020D016800000002020D02040000000110
262:10105000020D020C00000020020D021000000040F2
263:10106000020D021400000040020D022000000003E7
264:10107000020D022400000018060D0280000000127C
265:10108000040D03000024027E020D004C000000014C
266:10109000020D005000000002020D00540000000884
267:1010A000020D005800000008060D005C000000045E
268:1010B000020D00C400000004020D00040000000145
269:1010C000020D000800000001020D000C00000001EC
270:1010D000020D001000000001020D001400000001CC
271:1010E000020D001800000001020D001C00000001AC
272:1010F000020D002000000001020D0024000000018C
273:10110000020D002800000001020D002C000000016B
274:10111000020D003000000001020D0034000000014B
275:10112000020D003800000001020D003C000000012B
276:10113000020D011400000009020D011C0000000A4C
277:10114000020D012400000007020D012C0000000721
278:10115000020D01340000000C020D013C0000000BE8
279:10116000020D014400000007020D011800000029D3
280:10117000020D01200000002A020D012800000027B6
281:10118000020D013000000027020D01380000002C84
282:10119000020D01400000002B020D01480000002755
283:1011A000020D011400000019020D011C0000001ABC
284:1011B000020D012400000017020D012C0000001791
285:1011C000020D01340000001C020D013C0000001B58
286:1011D000020D014400000017020D01180000003943
287:1011E000020D01200000003A020D01280000003726
288:1011F000020D013000000037020D01380000003CF4
289:10120000020D01400000003B020D014800000037C4
290:10121000020D011400000049020D011C0000004AEB
291:10122000020D012400000047020D012C00000047C0
292:10123000020D01340000004C020D013C0000004B87
293:10124000020D014400000047020D01180000006972
294:10125000020D01200000006A020D01280000006755
295:10126000020D013000000067020D01380000006C23
296:10127000020D01400000006B020D014800000067F4
297:10128000020D011400000059020D011C0000005A5B
298:10129000020D012400000057020D012C0000005730
299:1012A000020D01340000005C020D013C0000005BF7
300:1012B000020D014400000057020D011800000079E2
301:1012C000020D01200000007A020D012800000077C5
302:1012D000020D013000000077020D01380000007C93
303:1012E000020D01400000007B020D01480000007764
304:1012F000020E004C00000032020E00940215002085
305:10130000020E009802150020020E009C0000003022
306:10131000020E00A008100000020E00A4000000331E
307:10132000020E00A800000030020E00AC00000031E8
308:10133000020E00B000000002020E00B40000000423
309:10134000020E00B800000000020E00BC0000000207
310:10135000020E00C000000002020E00C400000000E7
311:10136000020E00C800000002020E00CC00000007C0
312:10137000020E00D000000002020E00D400000002A5
313:10138000020E00D800000001020E00E4000000017F
314:10139000020E014400000001020E014C0000000199
315:1013A000020E015000000002020E020400000001C3
316:1013B000020E020C00000040020E0210000000406D
317:1013C000020E021C00000004020E02200000002099
318:1013D000020E02240000000E020E02280000001B74
319:1013E000060E030000000012040E0280001B02A281
320:1013F000020E00540000000C020E0058000000090C
321:10140000020E005C0000000F020E006000000010E1
322:10141000020E00640000000B060E006800000003CE
323:10142000020E00DC00000003020E000400000001B8
324:10143000020E000800000001020E000C0000000176
325:10144000020E001000000001020E00140000000156
326:10145000020E001800000001020E001C0000000136
327:10146000020E002000000001020E00240000000116
328:10147000020E002800000001020E002C00000001F6
329:10148000020E003000000001020E003400000001D6
330:10149000020E003800000001020E003C00000001B6
331:1014A000020E004000000001020E00440000000196
332:1014B000020E01100000000F020E01180000000EC5
333:1014C000020E012000000000020E012800000000B2
334:1014D000020E01140000002F020E011C0000002E5D
335:1014E000020E012400000000020E012C000000008A
336:1014F000020E01100000001F020E01180000001E65
337:10150000020E012000000000020E01280000000071
338:10151000020E01140000003F020E011C0000003EFC
339:10152000020E012400000000020E012C0000000049
340:10153000020E01100000004F020E01180000004EC4
341:10154000020E012000000000020E01280000000031
342:10155000020E01140000006F020E011C0000006E5C
343:10156000020E012400000000020E012C0000000009
344:10157000020E01100000005F020E01180000005E64
345:10158000020E012000000000020E012800000000F1
346:10159000020E01140000007F020E011C0000007EFC
347:1015A000020E012400000000020E012C00000000C9
348:1015B0000730040000E80000083007D8000502BD2D
349:1015C000073400002EAA000007348000312D0BAB39
350:1015D00007350000358217F707358000396D25582B
351:1015E00007360000142D33B40836321039BE02BF5E
352:1015F0000130000000000000013000040000000085
353:1016000001300008000000000130000C0000000064
354:101610000130001000000000013000140000000044
355:10162000023000200000000102300024000000020F
356:1016300002300028000000030230002C00000000EF
357:1016400002300030000000040230003400000001CD
358:1016500002300038000000000230003C00000001B1
359:10166000023000400000000402300044000000008E
360:1016700002300048000000010230004C000000036E
361:101680000230005000000000023000540000000151
362:1016900002300058000000040230005C000000002E
363:1016A000023000600000000102300064000000030E
364:1016B00002300068000000000230006C00000001F1
365:1016C00002300070000000040230007400000000CE
366:1016D00002300078000000040230007C00000003AB
367:1016E0000630008000000002023000A400003FFF2E
368:1016F000023000A8000003FF0230022400000000B6
369:1017000002300234000000000230024C00000000F1
370:10171000023002E40000FFFF063020000000080055
371:1017200002338BC000000001023380000000001A69
372:10173000023380400000004E023380800000001021
373:10174000023380C0000000200C3383000007A1207A
374:101750000A338300000001380B3383000000138834
375:10176000023383C0000001F40C3383801DCD65007B
376:101770000A3383800004C4B40B338380004C4B4095
377:101780000A331480000000000233148000000001BE
378:10179000063220000000010206328020000000C84E
379:1017A000063280000000000206323DA8000000045E
380:1017B00006323D800000000904323DA4000102C150
381:1017C00006323D00000000200632500000000400F8
382:1017D0000632400000000004063240D00000000243
383:1017E00006326B680000000204326B70000202C215
384:1017F00006326B1000000002043274C0000202C402
385:101800000632DA40000000020632E0000000080064
386:10181000023308000100000004330C00001002C66F
387:10182000023308000000000004330C40001002D610
388:1018300006322450000000B406322AD00000000214
389:1018400006321000000001A002323DB80000000086
390:101850000632500000000020063251000000002037
391:101860000632520000000020063253000000002023
392:10187000063254000000002006325500000000200F
393:1018800006325600000000200632570000000020FB
394:1018900006325800000000200632590000000020E7
395:1018A00006325A000000002006325B0000000020D3
396:1018B00006325C000000002006325D0000000020BF
397:1018C00006325E000000002006325F0000000020AB
398:1018D00006326B780000005206326E080000000CE1
399:1018E0000632DA880000000206322720000000B429
400:1018F00006322AD80000000206321680000001A03D
401:1019000002323DBC00000000063250800000002082
402:101910000632518000000020063252800000002074
403:101920000632538000000020063254800000002060
404:10193000063255800000002006325680000000204C
405:101940000632578000000020063258800000002038
406:10195000063259800000002006325A800000002024
407:1019600006325B800000002006325C800000002010
408:1019700006325D800000002006325E8000000020FC
409:1019800006325F800000002006326CC0000000526A
410:1019900006326E380000000C0632DA9000000002B9
411:1019A00002322A300000000006324010000000021F
412:1019B0000632D0000000000602322A340000000087
413:1019C00006324020000000020632D0180000000657
414:1019D00002322A38000000000632403000000002C7
415:1019E0000632D0300000000602322A3C000000001F
416:1019F00006324040000000020632D04800000006D7
417:101A000002322A400000000006324050000000026E
418:101A10000632D0600000000602322A4400000000B6
419:101A200006324060000000020632D0780000000656
420:101A300002322A4800000000063240700000000216
421:101A40000632D0900000000602322A4C000000004E
422:101A500006324080000000020632D0A800000006D6
423:101A6000072004000093000008200780001002E611
424:101A7000072400002ADE0000072480002E050AB893
425:101A80000824E4A061D202E8012000000000000068
426:101A900001200004000000000120000800000000F8
427:101AA0000120000C000000000120001000000000D8
428:101AB00001200014000000000220002000000001AE
429:101AC0000220002400000002022000280000000381
430:101AD0000220002C00000000022000300000000462
431:101AE0000220003400000001022000380000000045
432:101AF0000220003C00000001022000400000000421
433:101B00000220004400000000022000480000000104
434:101B10000220004C000000030220005000000000E2
435:101B200002200054000000010220005800000004C0
436:101B30000220005C000000000220006000000001A4
437:101B40000220006400000003022000680000000082
438:101B50000220006C00000001022000700000000460
439:101B60000220007400000000022000780000000441
440:101B70000220007C0000000306200080000000021C
441:101B8000022000A400003FFF022000A8000003FF85
442:101B900002200224000000000220023400000000A5
443:101BA0000220024C00000000022002E40000FFFFBF
444:101BB000062020000000080002238BC00000000166
445:101BC0000223800000000010022380400000001269
446:101BD0000223808000000030022380C00000000E3D
447:101BE000022383C0000001F40223148000000001DE
448:101BF0000A231480000000000622100000000042AA
449:101C000006227020000000C80622700000000002BA
450:101C1000022211E80000000006223000000000C08F
451:101C2000062240700000008006225280000000045E
452:101C30000622670000000100062290000000040058
453:101C400004226B08002002EA02230800013FFFFF84
454:101C500004230C000010030A022308000000000007
455:101C600004230C400010031A06228100000000A08B
456:101C7000062286000000004006228C000000003C86
457:101C80000622B0000000020006228800000000804A
458:101C900006228DE00000003C0622404000000006C5
459:101CA00006228380000000A006228700000000407A
460:101CB00006228CF00000003C0622B8000000020062
461:101CC00006228A000000008006228ED00000003C20
462:101CD000062240580000000606228000000000088E
463:101CE000022211480000000006223300000000021A
464:101CF000062260400000003006228020000000081C
465:101D00000222114C000000000622330800000002ED
466:101D1000062261000000003006228040000000081A
467:101D200002221150000000000622331000000002C1
468:101D3000062261C00000003006228060000000081A
469:101D40000222115400000000062233180000000295
470:101D50000622628000000030062280800000000819
471:101D60000222115800000000062233200000000269
472:101D70000622634000000030062280A00000000818
473:101D80000222115C0000000006223328000000023D
474:101D90000622640000000030062280C00000000817
475:101DA0000222116000000000062233300000000211
476:101DB000062264C000000030062280E00000000817
477:101DC00002221164000000000622333800000002E5
478:101DD0000622658000000030021610000000002876
479:101DE00002170008000000020217002C0000000388
480:101DF0000217003C00000004021700440000000825
481:101E000002170048000000020217004C000000907A
482:101E1000021700500000009002170054008000904C
483:101E20000217005808140000021700600000008A22
484:101E300002170064000000800217006800000081A3
485:101E40000217006C000000800217007000000006FE
486:101E500002170078000007D00217007C0000076C12
487:101E600002170038007C1004021700040000000F65
488:101E70000616402400000002021640700000001CFC
489:101E80000216420800000001021642100000000184
490:101E90000216422000000001021642280000000144
491:101EA0000216423000000001021642380000000114
492:101EB00002164260000000020C16401C0003D09085
493:101EC0000A16401C0000009C0B16401C000009C4B0
494:101ED0000216403000000008021640340000000CDA
495:101EE0000216403800000010021640440000002096
496:101EF0000216400000000001021640D80000000158
497:101F000002164008000000010216400C000000010B
498:101F100002164010000000010216424000000000BE
499:101F2000021642480000000006164270000000023F
500:101F30000216425000000000021642580000000045
501:101F40000616428000000002021660080000042409
502:101F50000216600C00000410021660100000041449
503:101F60000216601C0000FFFF021660200000FFFF49
504:101F7000021660240000FFFF021660280000FFFF29
505:101F800002166038000000200216603C00000020AD
506:101F90000216604000000034021660440000003564
507:101FA00002166048000000230216604C0000002466
508:101FB0000216605000000025021660540000002642
509:101FC00002166058000000270216605C000000291D
510:101FD000021660600000002A021660640000002BF8
511:101FE000021660680000002C0216606C0000002DD4
512:101FF0000616607000000052021661B80000000171
513:10200000061661BC0000001F0216623807FFFFFFC2
514:102010000216623C0000003F0216624007FFFFFF0D
515:10202000021662440000000F011662480000000022
516:102030000116624C00000000011662500000000012
517:1020400001166254000000000116625800000000F2
518:102050000116625C000000000116626000000000D2
519:1020600001166264000000000116626800000000B2
520:102070000116626C00000000011662700000000092
521:102080000116627400000000011662780000000072
522:102090000116627C000000000C166000000003E8DE
523:1020A0000A166000000000010B1660000000000A24
524:1020B0000216804000000006021680440000000561
525:1020C000021680480000000A0216804C000000053D
526:1020D0000216805400000002021680CC00000004AA
527:1020E000021680D000000004021680D40000000414
528:1020F000021680D800000004021680DC00000004F4
529:10210000021680E000000004021680E400000004D3
530:10211000021680E800000004021688040000000493
531:10212000021680300000007C021680340000003D62
532:10213000021680380000003F0216803C0000009C20
533:10214000021680F000000007061680F4000000056B
534:102150000216880C0101010102168108000000002E
535:102160000216810C00000004021681100000000419
536:1021700002168114000000020216881008012004D3
537:1021800002168118000000050216811C00000005DF
538:1021900002168120000000050216812400000005BF
539:1021A0000216882C20081001021681280000000861
540:1021B0000216812C00000006021681300000000784
541:1021C000021681340000000002168830010101204F
542:1021D000061681380000000402168834010101014E
543:1021E00002168148000000000216814C0000000425
544:1021F0000216815000000004021681540000000203
545:1022000002168838080120040216815800000005D3
546:102210000216815C000000050216816000000005C6
547:1022200002168164000000050216883C2008100197
548:1022300002168168000000080216816C000000068A
549:102240000216817000000007021681740000000170
550:102250000216884001010120021681780000000169
551:102260000216817C0000000102168180000000013E
552:102270000216818400000001021688440101010158
553:1022800002168188000000010216818C0000000403
554:1022900002168190000000040216819400000002E2
555:1022A00002168848080120040216819800000005E3
556:1022B0000216819C00000005021681A000000005A6
557:1022C000021681A4000000050216881420081001DF
558:1022D000021681A800000008021681AC000000066A
559:1022E000021681B000000007021681B40000000150
560:1022F0000216881801010120021681B800000001B1
561:10230000021681BC00000001021681C0000000011D
562:10231000021681C4000000010216881C010101019F
563:10232000021681C800000001021681CC00000004E2
564:10233000021681D000000004021681D400000002C1
565:102340000216882008012004021681D8000000052A
566:10235000021681DC00000005021681E00000000585
567:10236000021681E4000000050216882420081001EE
568:10237000021681E800000008021681EC0000000649
569:10238000021681F0000000070216E40C00000000B5
570:1023900002168828010101200616E410000000043E
571:1023A0000216E000010101010216E4200000000015
572:1023B0000216E424000000040216E42800000004D1
573:1023C0000216E42C000000020216E00408012004BA
574:1023D0000216E430000000050216E4340000000597
575:1023E0000216E438000000050216E43C0000000577
576:1023F0000216E008200810010216E4400000000860
577:102400000216E444000000060216E448000000073B
578:102410000216E44C000000000216E00C010101204D
579:102420000616E450000000040216E010010101014C
580:102430000216E460000000000216E46400000004DC
581:102440000216E468000000040216E46C00000002BA
582:102450000216E014080120040216E47000000005D2
583:102460000216E474000000050216E478000000057E
584:102470000216E47C000000050216E0182008100196
585:102480000216E480000000080216E4840000000642
586:102490000216E488000000070216E48C0000000128
587:1024A0000216E01C010101200216E4900000000168
588:1024B0000216E494000000010216E49800000001F6
589:1024C0000216E49C000000010216E0200101010157
590:1024D0000216E4A0000000010216E4A400000004BB
591:1024E0000216E4A8000000040216E4AC000000029A
592:1024F0000216E024080120040216E4B000000005E2
593:102500000216E4B4000000050216E4B8000000055D
594:102510000216E4BC000000050216E02820081001A5
595:102520000216E4C0000000080216E4C40000000621
596:102530000216E4C8000000070216E4CC0000000107
597:102540000216E02C010101200216E4D00000000177
598:102550000216E4D4000000010216E4D800000001D5
599:102560000216E4DC000000010216E0300101010166
600:102570000216E4E0000000010216E4E4000000049A
601:102580000216E4E8000000040216E4EC0000000279
602:102590000216E034080120040216E4F000000005F1
603:1025A0000216E4F4000000050216E4F8000000053D
604:1025B0000216E4FC000000050216E03820081001B5
605:1025C0000216E500000000080216E50400000006FF
606:1025D0000216E508000000070216E03C0101012098
607:1025E00002168240003F003F0216824400000000B5
608:1025F0000216E524003F003F0216E5280000000017
609:1026000002168248000000000216824C003F003F84
610:102610000216E52C000000000216E530003F003FE6
611:1026200002168250010001000216825401000100CE
612:102630000216E534010001000216E5380100010030
613:1026400006168258000000020216E53C0000000059
614:102650000216E540000000000216826000C000C0C3
615:102660000216826400C000C00216E54400C000C02B
616:102670000216E54800C000C0021682681E001E0057
617:102680000216826C1E001E000216E54C1E001E0083
618:102690000216E5501E001E00021682704000400027
619:1026A00002168274400040000216E55440004000CB
620:1026B0000216E55840004000021682788000800033
621:1026C0000216827C800080000216E55C800080009B
622:1026D0000216E56080008000021682802000200043
623:1026E00002168284200020000216E56420002000EB
624:1026F0000216E5682000200006168288000000020D
625:102700000216E56C000000000216E57000000000F3
626:102710000216829000000000021682940000000061
627:102720000216E574000000000216E57800000000C3
628:1027300002168298000000000216829C0000000031
629:102740000216E57C000000000216E5800000000093
630:10275000021682A000000000021682A40000000100
631:10276000061682A80000000A021681F400000C0878
632:10277000021681F800000040021681FC00000100F2
633:1027800002168200000000200216820400000017DA
634:1027900002168208000000800216820C000002006F
635:1027A00002168210000000000216821801FF01FFCD
636:1027B0000216821401FF01FF0216E51001FF01FF5E
637:1027C0000216E50C01FF01FF0216823C0000001317
638:1027D000021680900000013F021680600000014058
639:1027E00002168064000001400616806800000002A6
640:1027F00002168070000000C00616807400000007FA
641:102800000216809C00000048021680A000000048CC
642:10281000061680A400000002021680AC00000048EA
643:10282000061680B000000007021682380000800003
644:1028300002168234000025E40216809400007FFF17
645:1028400002168220000F000F0216821C000F000FDC
646:102850000216E518000F000F0216E514000F000F16
647:10286000021682280000000002168224FFFFFFFFEC
648:102870000216E520000000000216E51CFFFFFFFF26
649:102880000216E6BC000000000216E6C000000002CE
650:102890000216E6C4000000010216E6C800000003AC
651:1028A0000216E6CC000000040216E6D00000000686
652:1028B0000216E6D4000000050216E6D80000000764
653:1028C000021680EC000000FF02140000000000016E
654:1028D0000214000C0000000102140040000000017E
655:1028E0000214004400007FFF0214000C00000000EE
656:1028F00002140000000000000214006C0000000040
657:102900000214000400000001021400300000000165
658:1029100002140004000000000214005C000000002B
659:10292000021400080000000102140034000000013D
660:102930000214000800000000021400600000000003
661:102940000202005800000032020200A0031500201D
662:10295000020200A403150020020200A801000030BA
663:10296000020200AC08100000020200B000000033B8
664:10297000020200B400000030020200B80000003182
665:10298000020200BC00000003020200C000000006BA
666:10299000020200C400000003020200C8000000039D
667:1029A000020200CC00000002020200D00000000081
668:1029B000020200D400000002020200DC000000005D
669:1029C000020200E000000006020200E40000000431
670:1029D000020200E800000002020200EC0000000217
671:1029E000020200F000000001020200FC00000006EC
672:1029F0000202012000000000020201340000000277
673:102A0000020201B0000000010202020C00000001FD
674:102A1000020202140000000102020218000000027B
675:102A200002020404000000010202040C0000004045
676:102A300002020410000000400202041C0000000416
677:102A40000202042000000020020204240000000210
678:102A50000202042800000020060205000000001207
679:102A600004020480001F032A020200600000000F1D
680:102A70000202006400000007020200680000000B70
681:102A80000202006C0000000E020200700000000E46
682:102A90000602007400000003020200F400000004BB
683:102AA0000202000400000001020200080000000110
684:102AB0000202000C000000010202001000000001F0
685:102AC00002020014000000010202001800000001D0
686:102AD0000202001C000000010202002000000001B0
687:102AE0000202002400000001020200280000000190
688:102AF0000202002C00000001020200300000000170
689:102B0000020200340000000102020038000000014F
690:102B10000202003C0000000102020040000000012F
691:102B2000020200440000000102020048000000010F
692:102B30000202004C000000010202005000000001EF
693:102B400002020108000000C8020201180000000291
694:102B5000020201C400000000020201CC00000000DB
695:102B6000020201D400000002020201DC00000002A7
696:102B7000020201E4000000FF020201EC000000FF7D
697:102B800002020100000000000202010C000000C867
698:102B90000202011C00000002020201C80000000045
699:102BA000020201D000000000020201D80000000271
700:102BB000020201E000000002020201E8000000FF42
701:102BC000020201F0000000FF020201040000000008
702:102BD00002020108000000C8020201180000000201
703:102BE000020201C400000000020201CC000000004B
704:102BF000020201D400000002020201DC0000000217
705:102C0000020201E4000000FF020201EC000000FFEC
706:102C100002020100000000000202010C000000C8D6
707:102C20000202011C00000002020201C800000000B4
708:102C3000020201D000000000020201D800000002E0
709:102C4000020201E000000002020201E8000000FFB1
710:102C5000020201F0000000FF020201040000000077
711:102C600002020108000000C8020201180000000270
712:102C7000020201C400000000020201CC00000000BA
713:102C8000020201D400000002020201DC0000000286
714:102C9000020201E4000000FF020201EC000000FF5C
715:102CA00002020100000000000202010C000000C846
716:102CB0000202011C00000002020201C80000000024
717:102CC000020201D000000000020201D80000000250
718:102CD000020201E000000002020201E8000000FF21
719:102CE000020201F0000000FF0202010400000000E7
720:102CF00002020108000000C80202011800000002E0
721:102D0000020201C400000000020201CC0000000029
722:102D1000020201D400000002020201DC00000002F5
723:102D2000020201E4000000FF020201EC000000FFCB
724:102D300002020100000000000202010C000000C8B5
725:102D40000202011C00000002020201C80000000093
726:102D5000020201D000000000020201D800000002BF
727:102D6000020201E000000002020201E8000000FF90
728:102D7000020201F0000000FF020201040000000056
729:102D80000728040000C00000082807A8000B03491A
730:102D9000072C000032FC0000072C800035790CC0A5
731:102DA000072D00003AC11A1F072D800039EF28D0E7
732:102DB000072E00001C3E374C082E3710391E034BDF
733:102DC00001280000000000000128000400000000AD
734:102DD00001280008000000000128000C000000008D
735:102DE000012800100000000001280014000000006D
736:102DF0000228002000000001022800240000000238
737:102E000002280028000000030228002C0000000017
738:102E100002280030000000040228003400000001F5
739:102E200002280038000000000228003C00000001D9
740:102E300002280040000000040228004400000000B6
741:102E400002280048000000010228004C0000000396
742:102E50000228005000000000022800540000000179
743:102E600002280058000000040228005C0000000056
744:102E70000228006000000001022800640000000336
745:102E800002280068000000000228006C0000000119
746:102E900002280070000000040228007400000000F6
747:102EA00002280078000000040228007C00000003D3
748:102EB0000628008000000002022800A400003FFF56
749:102EC000022800A8000003FF0228022400000000DE
750:102ED00002280234000000000228024C000000001A
751:102EE000022802E40000FFFF06282000000008007E
752:102EF000022B8BC000000001022B800000000000AC
753:102F0000022B804000000018022B80800000000C83
754:102F1000022B80C0000000660C2B83000007A1205C
755:102F20000A2B8300000001380B2B8300000013885C
756:102F3000022B83C0000001F40C2B8340000001F43D
757:102F40000A2B8340000000000B2B8340000000058B
758:102F50000A2B83800004C4B40C2B83801DCD650034
759:102F60000A2B1480000000000B2B8380004C4B4088
760:102F7000022B148000000001062A29C8000000046A
761:102F8000042A29D80002034D062A208000000048A8
762:102F9000062A9020000000C8062A900000000002C7
763:102FA000062A21A800000086062A20000000002032
764:102FB000022A23C800000000042A23D00002034F85
765:102FC000042A249800040351022A2C500000000017
766:102FD000022A2C1000000000042A2C0800020355CD
767:102FE000042A300000020357062A300800000100BE
768:102FF000062A404000000010042A40000010035937
769:10300000062A6AC000000002062A6B0000000004C5
770:10301000042A840800020369022B08000000000053
771:10302000042B0C000010036B022B080001000000B1
772:10303000042B0C400008037B022B08000200000058
773:10304000042B0C6000080383062AC000000000D88F
774:10305000062A24A800000014062A254800000022A1
775:10306000042A25D00002038B062A266800000022CD
776:10307000042A26F00002038D062A27880000002279
777:10308000042A28100002038F062A28A80000002224
778:10309000042A293000020391062AA000000000281B
779:1030A000062AA1400000000C042A29E00002039334
780:1030B000062A502000000002062A503000000002BC
781:1030C000062A500000000002062A501000000002EC
782:1030D000022A520800000001042A6AC8000203956F
783:1030E000062A6B1000000042062A6D200000000432
784:1030F000062ABCD000000002062AC360000000D8E7
785:10310000062A24F800000014062A25D80000002210
786:10311000042A266000020397062A26F800000022EF
787:10312000042A278000020399062A2818000000229A
788:10313000042A28A00002039B062A29380000002246
789:10314000042A29C00002039D062AA0A0000000282E
790:10315000062AA1700000000C042A29E80002039F3F
791:10316000062A502800000002062A503800000002FB
792:10317000062A500800000002062A5018000000022B
793:10318000022A520C00000001042A6AD0000203A1A6
794:10319000062A6C1800000042062A6D300000000468
795:1031A000062ABCD800000002022AC6C000000000A7
796:1031B000042A29F0001003A3062A50480000000E3C
797:1031C000062AB00000000006022AC6C40000000063
798:1031D000042A2A30001003B3062A50800000000E93
799:1031E000062AB01800000006022AC6C80000000027
800:1031F000042A2A70001003C3062A50B80000000EEB
801:10320000062AB03000000006022AC6CC00000000EA
802:10321000042A2AB0001003D3062A50F00000000E42
803:10322000062AB04800000006022AC6D000000000AE
804:10323000042A2AF0001003E3062A51280000000E99
805:10324000062AB06000000006022AC6D40000000072
806:10325000042A2B30001003F3062A51600000000EF0
807:10326000062AB07800000006022AC6D80000000036
808:10327000042A2B7000100403062A51980000000E47
809:10328000062AB09000000006022AC6DC00000000FA
810:10329000042A2BB000100413062A51D00000000E9F
811:1032A000062AB0A800000006021010080000000165
812:1032B0000210105000000001021010000003D000A6
813:1032C000021010040000003D091018000200042341
814:1032D0000910110000280623061011A00000001894
815:1032E00006102400000000E00210201C0000000076
816:1032F0000210202000000001021020C00000000287
817:10330000021020040000000102102008000000014B
818:1033100009103C000005064B091038000005065056
819:10332000091038200005065506104C000000010069
820:1033300002104028000000100210404400003FFF2F
821:103340000210405800280000021040840084924A75
822:1033500002104058000000000210800000001080A1
823:10336000021080AC00000000021080380000001045
824:103370000210810000000000061081200000000201
825:1033800002108008000002B502108010000000004A
826:10339000061082000000004A021081080001FFFFB1
827:1033A00006108140000000020210800000001A8018
828:1033B0000610900000000024061091200000004A32
829:1033C000061093700000004A061095C00000004AE5
830:1033D0000210800400001080021080B00000000184
831:1033E0000210803C00000010021081040000000068
832:1033F00006108128000000020210800C000002B5B7
833:103400000210801400000000061084000000004A32
834:103410000210810C0001FFFF06108148000000022D
835:103420000210800400001A80061090900000002412
836:10343000061092480000004A061094980000004AC6
837:10344000061096E80000004A02108000000010807C
838:10345000021080AC00000002021080380000001052
839:103460000210810000000000061081200000000210
840:1034700002108008000002B5021080100000000059
841:10348000061082000000004A021081080001FFFFC0
842:1034900006108140000000020210800000001A8027
843:1034A0000610900000000024061091200000004A41
844:1034B000061093700000004A061095C00000004AF4
845:1034C0000210800400001080021080B00000000391
846:1034D0000210803C00000010021081040000000077
847:1034E00006108128000000020210800C000002B5C6
848:1034F0000210801400000000061084000000004A42
849:103500000210810C0001FFFF06108148000000023C
850:103510000210800400001A80061090900000002421
851:10352000061092480000004A061094980000004AD5
852:10353000061096E80000004A02108000000010808B
853:10354000021080AC0000000402108038000000105F
854:10355000021081000000000006108120000000021F
855:1035600002108008000002B5021080100000000068
856:10357000061082000000004A021081080001FFFFCF
857:1035800006108140000000020210800000001A8036
858:103590000610900000000024061091200000004A50
859:1035A000061093700000004A061095C00000004A03
860:1035B0000210800400001080021080B0000000059E
861:1035C0000210803C00000010021081040000000086
862:1035D00006108128000000020210800C000002B5D5
863:1035E0000210801400000000061084000000004A51
864:1035F0000210810C0001FFFF06108148000000024C
865:103600000210800400001A80061090900000002430
866:10361000061092480000004A061094980000004AE4
867:10362000061096E80000004A02108000000010809A
868:10363000021080AC0000000602108038000000106C
869:10364000021081000000000006108120000000022E
870:1036500002108008000002B5021080100000000077
871:10366000061082000000004A021081080001FFFFDE
872:1036700006108140000000020210800000001A8045
873:103680000610900000000024061091200000004A5F
874:10369000061093700000004A061095C00000004A12
875:1036A0000210800400001080021080B000000007AB
876:1036B0000210803C00000010021081040000000095
877:1036C00006108128000000020210800C000002B5E4
878:1036D0000210801400000000061084000000004A60
879:1036E0000210810C0001FFFF06108148000000025B
880:1036F0000210800400001A80061090900000002440
881:10370000061092480000004A061094980000004AF3
882:10371000061096E80000004A021205B00000000101
883:103720000212049000E383400212051400003C10D2
884:103730000212066C00000001021206700000000078
885:1037400002120494FFFFFFFF02120498FFFFFFFF25
886:103750000212049CFFFFFFFF021204A0FFFFFFFF05
887:10376000021204A4FFFFFFFF021204A8FFFFFFFFE5
888:10377000021204ACFFFFFFFF021204B0FFFFFFFFC5
889:10378000021204BCFFFFFFFF021204C0FFFFFFFF95
890:10379000021204C4FFFFFFFF021204C8FFFFFFFF75
891:1037A000021204CCFFFFFFFF021204D0FFFFFFFF55
892:1037B000021204D8FFFFFFFF021204DCFFFFFFFF2D
893:1037C000021204E0FFFFFFFF021204E4FFFFFFFF0D
894:1037D000021204E8FFFFFFFF021204ECFFFFFFFFED
895:1037E000021204F0FFFFFFFF021204F4FFFFFFFFCD
896:1037F000021204F8FFFFFFFF021204FCFFFFFFFFAD
897:1038000002120500FFFFFFFF02120504FFFFFFFF8A
898:1038100002120508FFFFFFFF0212050CFFFFFFFF6A
899:1038200002120510FFFFFFFF021204D4FF802000E8
900:10383000021204B4F0005000021204B8F0001000AC
901:1038400002120390000000080212039C000000080E
902:10385000021203A000000008021203A400000002EC
903:10386000021203BC00000004021203C000000005A5
904:10387000021203C400000004021203D00000000082
905:103880000212036C00000001021203680000003FF6
906:10389000021201BC00000040021201C00000180822
907:1038A000021201C400000803021201C8000008034C
908:1038B000021201CC00000040021201D000000003FF
909:1038C000021201D400000803021201D8000008030C
910:1038D000021201DC00000803021201E000010003F3
911:1038E000021201E400000803021201E800000803CC
912:1038F000021201EC00000003021201F000000003BC
913:10390000021201F400000003021201F8000000039B
914:10391000021201FC0000000302120200000000037A
915:103920000212020400000003021202080000000359
916:103930000212020C00000003021202100000000339
917:103940000212021400000003021202180000000319
918:103950000212021C000000030212022000000003F9
919:1039600002120224000000030212022800002403B5
920:103970000212022C0000002F021202300000000987
921:103980000212023400000019021202380000018401
922:103990000212023C000001830212024000000306F2
923:1039A0000212024400000019021202480000000640
924:1039B0000212024C0000030602120250000003062D
925:1039C00002120254000003060212025800000C8684
926:1039D0000212025C000003060212026000000306ED
927:1039E00002120264000000060212026800000006D3
928:1039F0000212026C000000060212027000000006B3
929:103A00000212027400000006021202780000000692
930:103A10000212027C00000006021202800000000672
931:103A20000212028400000006021202880000000652
932:103A30000212028C00000006021202900000000632
933:103A40000212029400000006021202980000000612
934:103A50000212029C00000006021202A000000306EF
935:103A6000021202A400000013021202A800000006C5
936:103A7000021202B000001004021202B4000010048E
937:103A80000212032400106440021203280010644054
938:103A9000021205B400000001021201B00000000192
939:103AA0000600A000000000160200A0EC5554000023
940:103AB0000200A0F0555555550200A0F400005555E0
941:103AC0000200A0F8F00000000200A0FC5554000025
942:103AD0000200A100555555550200A104000055559E
943:103AE0000200A108F00000000200A18C5554000063
944:103AF0000200A190555555550200A194000055555E
945:103B00000200A198F00000000200A19C000000004B
946:103B10000200A1A0000100000200A1A400005014B6
947:103B20000200A1A8000000000200A45C00000C003C
948:103B30000200A61C000000030200A06CFF5C000055
949:103B40000200A070FFF55FFF0200A0740000FFFFFD
950:103B50000200A078F00003E00200A07C000000005A
951:103B60000200A0800000A0000600A0840000000564
952:103B70000200A0980FE000000600A09C00000007D3
953:103B80000200A0B8000004000600A0BC0000000372
954:103B90000200A0C8000010000600A0CC0000000336
955:103BA0000200A0D8000040000600A0DC00000003D6
956:103BB0000200A0E8000100000600A22C00000004A2
957:103BC0000200A10CFF5C00000200A110FFF55FFFE6
958:103BD0000200A1140000FFFF0200A118F00003E0A2
959:103BE0000200A11C000000000200A1200000A000B3
960:103BF0000600A124000000050200A1380FE000002B
961:103C00000600A13C000000070200A15800000800C7
962:103C10000600A15C000000030200A1680000200073
963:103C20000600A16C000000030200A17800008000E3
964:103C30000600A17C000000030200A1880002000031
965:103C40000600A23C0000000400000000000000008C
966:103C50000000003100000000000000000000000033
967:103C60000000000000000000000000000000000054
968:103C700000000000000000000000000000310032E1
969:103C80000000000000000000000000000000000034
970:103C90000000000000000000000000000000000024
971:103CA000000000000000000000320056000000008C
972:103CB0000000000000000000000000000000000004
973:103CC00000000000000000000000000000000000F4
974:103CD000000000000056008C000000000000000002
975:103CE000008C009000900094009400980098009C34
976:103CF000009C00A000A000A400A400A800A800ACA4
977:103D000000AC00B100B100B300B300B5000000008A
978:103D100000000000000000000000000000000000A3
979:103D200000000000000000000000000000B50102DB
980:103D30000102010A010A01120112011B011B0124E7
981:103D40000124012D012D01360136013F013F0148BB
982:103D5000014801510151015A00000000000000001B
983:103D60000000000000000000000000000000000053
984:103D70000000000000000000000000000000000043
985:103D80000000000000000000000000000000000033
986:103D90000000000000000000000000000000000023
987:103DA0000000000000000000000000000000000013
988:103DB0000000000000000000000000000000000003
989:103DC00000000000000000000000000000000000F3
990:103DD00000000000000000000000000000000000E3
991:103DE00000000000000000000000000000000000D3
992:103DF00000000000000000000000000000000000C3
993:103E00000000000000000000015A015F00000000F7
994:103E100000000000015F0160016001610161016259
995:103E2000016201630163016401640165016501666A
996:103E300001660167000000000000000000000000B3
997:103E40000000000000000000000000000000000072
998:103E50000000000000000000000000000000000062
999:103E60000167016C016C0179017901860000000095
1000:103E70000000000000000000000000000000000042
1001:103E80000000000000000000000000000000000032
1002:103E90000000000000000000000000000000000022
1003:103EA0000000000000000000000000000000000012
1004:103EB00000000000000000000186018700000000F3
1005:103EC00000000000000000000000000000000000F2
1006:103ED00000000000000000000000000000000000E2
1007:103EE00000000000018701BE00000000000000008B
1008:103EF00000000000000000000000000000000000C2
1009:103F000000000000000000000000000000000000B1
1010:103F100001BE01E9000000000000000000000000F8
1011:103F20000000000000000000000000000000000091
1012:103F300000000000000000000000000001E9021A7B
1013:103F40000000000000000000021A022102210228E5
1014:103F50000228022F022F02360236023D023D0244A1
1015:103F60000244024B024B02520252028A000000003D
1016:103F700000000000028A028E028E029202920296D5
1017:103F80000296029A029A029E029E02A202A202A631
1018:103F900002A602AA02AA02FA02FA031103110328D6
1019:103FA0000328032B032B032E032E03310331033489
1020:103FB000033403370337033A033A033D033D034019
1021:103FC00003400381038103880388038F038F0393D6
1022:103FD000039303970397039B039B039F039F03A3F1
1023:103FE00003A303A703A703AB03AB03AF03AF03B064
1024:103FF00000000000000000000000000000000000C1
1025:1040000000000000000000000000000000000000B0
1026:10401000000000000000000003B003C20000000028
1027:104020000000000000000000000000000000000090
1028:104030000000000000000000000000000000000080
1029:104040000000000003C203D703D703DA03DA03DD5D
1030:104050000000000000000000000000000000000060
1031:104060000000000000000000000000000000000050
1032:1040700003DD040A00000000000000000000000052
1033:104080000000000000000000000000000000000030
1034:10409000000000000000000000000000040A050D00
1035:1040A0000000000000000000000000000000000010
1036:1040B0000000000000000000000000000000000000
1037:1040C0000000000000000000050D0514051405188F
1038:1040D0000518051C000000000000000000000000A2
1039:1040E00000000000000000000000000000000000D0
1040:1040F00000000000051C055C00000000000000003E
1041:10410000055C05650565056E056E05770577058017
1042:1041100005800589058905920592059B059B05A4E7
1043:1041200005A405FD05FD0613061306290629062D1F
1044:10413000062D063106310635063506390639063DA7
1045:10414000063D064106410645064506490649065014
1046:10415000000000000000000000000000000000005F
1047:10416000000000000000000000000000000000004F
1048:10417000000000000000000006500656000000008D
1049:10418000000000000000000000000000000000002F
1050:10419000000000000000000000000000000000001F
1051:1041A0000000000006560659000000000000000054
1052:1041B00000000000000000000000000000000000FF
1053:1041C00000000000000000000000000000000000EF
1054:1041D0000659065F0000000000000000000000001B
1055:1041E00000000000000000000000000000000000CF
1056:1041F00000000000000000000000000000000000BF
1057:104200000000000000000000065F066E066E067DDE
1058:10421000067D068C068C069B069B06AA06AA06B996
1059:1042200006B906C806C806D706D70748000000002A
1060:10423000000000000000000000000000000000007E
1061:10424000000000000000000000000000000000006E
1062:10425000000000000748075B075B076C076C077DE1
1063:10426000000000000000000000000000000000004E
1064:10427000000000000000000000000000000000003E
1065:10428000000000000000000000000000000000002E
1066:10429000000000000000000000000000000000001E
1067:1042A000000000000000000000000000000000000E
1068:1042B00000000000000000000000000000000000FE
1069:1042C00000000000000000000000000000000000EE
1070:1042D00000000000000000000000000000000000DE
1071:1042E00000010000000204C00003098000040E4029
1072:1042F00000051300000617C000071C8000082140BD
1073:1043000000092600000A2AC0000B2F80000C344050
1074:10431000000D3900000E3DC0000F428000104740E4
1075:1043200000114C00001250C00013558000145A4078
1076:1043300000155F00001663C00017688000186D400C
1077:1043400000197200001A76C0001B7B80001C8040A0
1078:10435000001D8500001E89C0001F8E800020934034
1079:10436000000020000000400000006000000080000D
1080:104370000000A0000000C0000000E00000010000FC
1081:1043800000012000000140000001600000018000E9
1082:104390000001A0000001C0000001E00000020000D8
1083:1043A00000022000000240000002600000028000C5
1084:1043B0000002A0000002C0000002E00000030000B4
1085:1043C00000032000000340000003600000038000A1
1086:1043D0000003A0000003C0000003E0000004000090
1087:1043E000000420000004400000046000000480007D
1088:1043F0000004A0000004C0000004E000000500006C
1089:104400000005200000054000000560000005800058
1090:104410000005A0000005C0000005E0000006000047
1091:104420000006200000064000000660000006800034
1092:104430000006A0000006C0000006E0000007000023
1093:104440000007200000074000000760000007800010
1094:104450000007A0000007C0000007E00000080000FF
1095:1044600000082000000840000008600000088000EC
1096:104470000008A0000008C0000008E00000090000DB
1097:1044800000092000000940000009600000098000C8
1098:104490000009A0000009C0000009E000000A0000B7
1099:1044A000000A2000000A4000000A6000000A8000A4
1100:1044B000000AA000000AC000000AE000000B000093
1101:1044C000000B2000000B4000000B6000000B800080
1102:1044D000000BA000000BC000000BE000000C00006F
1103:1044E000000C2000000C4000000C6000000C80005C
1104:1044F000000CA000000CC000000CE000000D00004B
1105:10450000000D2000000D4000000D6000000D800037
1106:10451000000DA000000DC000000DE000000E000026
1107:10452000000E2000000E4000000E6000000E800013
1108:10453000000EA000000EC000000EE000000F000002
1109:10454000000F2000000F4000000F6000000F8000EF
1110:10455000000FA000000FC000000FE00000100000DE
1111:1045600000102000001040000010600000108000CB
1112:104570000010A0000010C0000010E00000110000BA
1113:1045800000112000001140000011600000118000A7
1114:104590000011A0000011C0000011E0000012000096
1115:1045A0000012200000124000001260000012800083
1116:1045B0000012A0000012C0000012E0000013000072
1117:1045C000001320000013400000136000001380005F
1118:1045D0000013A0000013C0000013E000001400004E
1119:1045E000001420000014400000146000001480003B
1120:1045F0000014A0000014C0000014E000001500002A
1121:104600000015200000154000001560000015800016
1122:104610000015A0000015C0000015E0000016000005
1123:1046200000162000001640000016600000168000F2
1124:104630000016A0000016C0000016E00000170000E1
1125:1046400000172000001740000017600000178000CE
1126:104650000017A0000017C0000017E00000180000BD
1127:1046600000182000001840000018600000188000AA
1128:104670000018A0000018C0000018E0000019000099
1129:104680000019200000194000001960000019800086
1130:104690000019A0000019C0000019E000001A000075
1131:1046A000001A2000001A4000001A6000001A800062
1132:1046B000001AA000001AC000001AE000001B000051
1133:1046C000001B2000001B4000001B6000001B80003E
1134:1046D000001BA000001BC000001BE000001C00002D
1135:1046E000001C2000001C4000001C6000001C80001A
1136:1046F000001CA000001CC000001CE000001D000009
1137:10470000001D2000001D4000001D6000001D8000F5
1138:10471000001DA000001DC000001DE000001E0000E4
1139:10472000001E2000001E4000001E6000001E8000D1
1140:10473000001EA000001EC000001EE000001F0000C0
1141:10474000001F2000001F4000001F6000001F8000AD
1142:10475000001FA000001FC000001FE000002000009C
1143:104760000020200000204000002060000020800089
1144:104770000020A0000020C0000020E0000021000078
1145:104780000021200000214000002160000021800065
1146:104790000021A0000021C0000021E0000022000054
1147:1047A0000022200000224000002260000022800041
1148:1047B0000022A0000022C0000022E0000023000030
1149:1047C000002320000023400000236000002380001D
1150:1047D0000023A0000023C0000023E000002400000C
1151:1047E00000242000002440000024600000248000F9
1152:1047F0000024A0000024C0000024E00000250000E8
1153:1048000000252000002540000025600000258000D4
1154:104810000025A0000025C0000025E00000260000C3
1155:1048200000262000002640000026600000268000B0
1156:104830000026A0000026C0000026E000002700009F
1157:10484000002720000027400000276000002780008C
1158:104850000027A0000027C0000027E000002800007B
1159:104860000028200000284000002860000028800068
1160:104870000028A0000028C0000028E0000029000057
1161:104880000029200000294000002960000029800044
1162:104890000029A0000029C0000029E000002A000033
1163:1048A000002A2000002A4000002A6000002A800020
1164:1048B000002AA000002AC000002AE000002B00000F
1165:1048C000002B2000002B4000002B6000002B8000FC
1166:1048D000002BA000002BC000002BE000002C0000EB
1167:1048E000002C2000002C4000002C6000002C8000D8
1168:1048F000002CA000002CC000002CE000002D0000C7
1169:10490000002D2000002D4000002D6000002D8000B3
1170:10491000002DA000002DC000002DE000002E0000A2
1171:10492000002E2000002E4000002E6000002E80008F
1172:10493000002EA000002EC000002EE000002F00007E
1173:10494000002F2000002F4000002F6000002F80006B
1174:10495000002FA000002FC000002FE000003000005A
1175:104960000030200000304000003060000030800047
1176:104970000030A0000030C0000030E0000031000036
1177:104980000031200000314000003160000031800023
1178:104990000031A0000031C0000031E0000032000012
1179:1049A00000322000003240000032600000328000FF
1180:1049B0000032A0000032C0000032E00000330000EE
1181:1049C00000332000003340000033600000338000DB
1182:1049D0000033A0000033C0000033E00000340000CA
1183:1049E00000342000003440000034600000348000B7
1184:1049F0000034A0000034C0000034E00000350000A6
1185:104A00000035200000354000003560000035800092
1186:104A10000035A0000035C0000035E0000036000081
1187:104A2000003620000036400000366000003680006E
1188:104A30000036A0000036C0000036E000003700005D
1189:104A4000003720000037400000376000003780004A
1190:104A50000037A0000037C0000037E0000038000039
1191:104A60000038200000384000003860000038800026
1192:104A70000038A0000038C0000038E0000039000015
1193:104A80000039200000394000003960000039800002
1194:104A90000039A0000039C0000039E000003A0000F1
1195:104AA000003A2000003A4000003A6000003A8000DE
1196:104AB000003AA000003AC000003AE000003B0000CD
1197:104AC000003B2000003B4000003B6000003B8000BA
1198:104AD000003BA000003BC000003BE000003C0000A9
1199:104AE000003C2000003C4000003C6000003C800096
1200:104AF000003CA000003CC000003CE000003D000085
1201:104B0000003D2000003D4000003D6000003D800071
1202:104B1000003DA000003DC000003DE000003E000060
1203:104B2000003E2000003E4000003E6000003E80004D
1204:104B3000003EA000003EC000003EE000003F00003C
1205:104B4000003F2000003F4000003F6000003F800029
1206:104B5000003FA000003FC000003FE000003FE00138
1207:104B600000000000000001FF0000020000007FF8CC
1208:104B700000007FF800000CDF0000150000000001BD
1209:104B80000000000100000001FFFFFFFFFFFFFFFF2B
1210:104B9000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF25
1211:104BA000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF15
1212:104BB000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF05
1213:104BC000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF5
1214:104BD000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE5
1215:104BE000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD5
1216:104BF000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC5
1217:104C0000FFFFFFFFFFFFFFFFFFFFFFFF00000000B0
1218:104C1000FFFFFFFF00000000FFFFFFFFFFFFFFFFA0
1219:104C200000000000FFFFFFFF00000000FFFFFFFF8C
1220:104C3000FFFFFFFF00000000FFFFFFFF000000007C
1221:104C4000FFFFFFFF0000000300BEBC20FFFFFFFFCF
1222:104C500000000000FFFFFFFF00000000FFFFFFFF5C
1223:104C60000000000300BEBC20FFFFFFFF00000000AB
1224:104C7000FFFFFFFF00000000FFFFFFFF0000000339
1225:104C800000BEBC20FFFFFFFF00000000FFFFFFFF92
1226:104C900000000000FFFFFFFF0000000300BEBC207B
1227:104CA000FFFFFFFF00000000FFFFFFFF000000000C
1228:104CB000FFFFFFFF0000000300BEBC20FFFFFFFF5F
1229:104CC00000000000FFFFFFFF00000000FFFFFFFFEC
1230:104CD0000000000300BEBC2000002000000040C017
1231:104CE00000006180000082400000A3000000C3C0FB
1232:104CF0000000E4800001054000012600000146C0DC
1233:104D000000016780000188400001A9000001C9C0BE
1234:104D10000001EA8000020B4000022C0000024CC09F
1235:104D200000026D8000028E400002AF000002CFC082
1236:104D30000002F0800003114000033200000352C063
1237:104D400000037380000394400003B5000003D5C046
1238:104D50000003F6800004174000043800000458C027
1239:104D60000004798000049A40000080000001038064
1240:104D70000001870000020A8000028E0000031180FB
1241:104D8000000395000004188000049C0000051F80AB
1242:104D90000005A300000626800006AA0000072D805B
1243:104DA0000007B100000834800008B80000093B800B
1244:104DB0000009BF00000A4280000AC600000B4980BB
1245:104DC000000BCD00000C5080000CD400000D57806B
1246:104DD000000DDB0000007FF800007FF80000193EA6
1247:104DE0000000350000001900001000000000000065
1248:104DF00000000000FFFFFFFF400000004000000037
1249:104E000040000000400000004000000040000000A2
1250:104E10004000000040000000400000004000000092
1251:104E20004000000040000000400000004000000082
1252:104E30004000000040000000400000004000000072
1253:104E40004000000040000000400000004000000062
1254:104E50004000000040000000400000004000000052
1255:104E60004000000040000000400000004000000042
1256:104E7000400000004000000000007FF800007FF8C4
1257:104E8000000005C700001500FFFFFFFFFFFFFFFF49
1258:104E9000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF22
1259:104EA000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF12
1260:104EB000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF02
1261:104EC000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF2
1262:104ED000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE2
1263:104EE000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD2
1264:104EF000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC2
1265:104F0000FFFFFFFFFFFFFFFF400000004000000029
1266:104F10004000000040000000400000004000000091
1267:104F20004000000040000000400000004000000081
1268:104F30004000000040000000400000004000000071
1269:104F40004000000040000000400000004000000061
1270:104F50004000000040000000400000004000000051
1271:104F60004000000040000000400000004000000041
1272:104F70004000000040000000400000004000000031
1273:104F800040000000400000000000100000002080F1
1274:104F900000003100000041800000520000006280EB
1275:104FA0000000730000008380000094000000A480D3
1276:104FB0000000B5000000C5800000D6000000E680BB
1277:104FC0000000F700000107800001180000012880A0
1278:104FD000000139000001498000015A0000016A8087
1279:104FE00000017B0000018B8000019C000001AC806F
1280:104FF0000001BD000001CD800001DE000001EE8057
1281:105000000001FF0000007FF800007FF80000112E73
1282:105010000000350010000000000028AD0000000076
1283:105020000001000100070205CCCCCCC5FFFFFFFF4B
1284:10503000FFFFFFFF7058103C000000000000000060
1285:1050400000000001CCCC0201CCCCCCCCCCCC0201F9
1286:10505000CCCCCCCCCCCC0201CCCCCCCCCCCC0201BA
1287:10506000CCCCCCCCCCCC0201CCCCCCCCCCCC0201AA
1288:10507000CCCCCCCCCCCC0201CCCCCCCCCCCC02019A
1289:10508000CCCCCCCC00000000FFFFFFFF40000000B4
1290:105090004000000040000000400000004000000010
1291:1050A0004000000040000000400000004000000000
1292:1050B00040000000400000004000000040000000F0
1293:1050C00040000000400000004000000040000000E0
1294:1050D00040000000400000004000000040000000D0
1295:1050E00040000000400000004000000040000000C0
1296:1050F00040000000400000004000000040000000B0
1297:10510000400000004000000040000000002625A0F4
1298:1051100000000000002625A000000000002625A0B9
1299:1051200000000000002625A000000000000E023252
1300:10513000011600D60010000000000000002625A087
1301:1051400000000000002625A000000000002625A089
1302:1051500000000000002625A00000000000720236BA
1303:10516000012300F300100000000000000000FFFF1A
1304:10517000000000000000FFFF000000000000FFFF33
1305:10518000000000000000FFFF000000000000FFFF23
1306:10519000000000000000FFFF000000000000FFFF13
1307:1051A000000000000000FFFF000000000000FFFF03
1308:1051B000000000000000FFFF000000000000FFFFF3
1309:1051C000000000000000FFFF000000000000FFFFE3
1310:1051D000000000000000FFFF000000000000FFFFD3
1311:1051E000000000000000FFFF000000000000FFFFC3
1312:1051F000000000000000FFFF000000000000FFFFB3
1313:10520000000000000000FFFF000000000000FFFFA2
1314:10521000000000000000FFFF000000000000FFFF92
1315:10522000000000000000FFFF000000000000FFFF82
1316:10523000000000000000FFFF000000000000FFFF72
1317:10524000000000000000FFFF000000000000FFFF62
1318:10525000000000000000FFFF000000000000FFFF52
1319:10526000000000000000FFFF000000000000FFFF42
1320:10527000000000000000FFFF000000000000FFFF32
1321:10528000000000000000FFFF000000000000FFFF22
1322:10529000000000000000FFFF000000000000FFFF12
1323:1052A000000000000000FFFF000000000000FFFF02
1324:1052B000000000000000FFFF000000000000FFFFF2
1325:1052C000000000000000FFFF000000000000FFFFE2
1326:1052D000000000000000FFFF000000000000FFFFD2
1327:1052E000000000000000FFFF000000000000FFFFC2
1328:1052F000000000000000FFFF000000000000FFFFB2
1329:10530000000000000000FFFF000000000000FFFFA1
1330:10531000000000000000FFFF000000000000FFFF91
1331:10532000000000000000FFFF000000000000FFFF81
1332:10533000000000000000FFFF000000000000FFFF71
1333:10534000000000000000FFFF000000000000FFFF61
1334:10535000000000000000FFFF000000000000FFFF51
1335:10536000000000000000FFFF00000000FFFFFFF34F
1336:10537000318FFFFF0C30C30CC30C30C3CF3CF300A4
1337:10538000F3CF3CF30000CF3CCDCDCDCDFFFFFFF1FF
1338:1053900030EFFFFF0C30C30CC30C30C3CF3CF30025
1339:1053A000F3CF3CF30001CF3CCDCDCDCDFFFFFFF6D9
1340:1053B000305FFFFF0C30C30CC30C30C3CF3CF30095
1341:1053C000F3CF3CF30002CF3CCDCDCDCDFFFFF406B3
1342:1053D0001CBFFFFF0C30C305C30C30C3CF3000141B
1343:1053E000F3CF3CF30004CF3CCDCDCDCDFFFFFFF29A
1344:1053F000304FFFFF0C30C30CC30C30C3CF3CF30065
1345:10540000F3CF3CF30008CF3CCDCDCDCDFFFFFFFA6D
1346:10541000302FFFFF0C30C30CC30C30C3CF3CF30064
1347:10542000F3CF3CF30010CF3CCDCDCDCDFFFFFFF748
1348:1054300031EFFFFF0C30C30CC30C30C3CF3CF30083
1349:10544000F3CF3CF30020CF3CCDCDCDCDFFFFFFF51A
1350:10545000302FFFFF0C30C30CC30C30C3CF3CF30024
1351:10546000F3CF3CF30040CF3CCDCDCDCDFFFFFFF3DC
1352:10547000318FFFFF0C30C30CC30C30C3CF3CF300A3
1353:10548000F3CF3CF30000CF3CCDCDCDCDFFFFFFF1FE
1354:10549000310FFFFF0C30C30CC30C30C3CF3CF30003
1355:1054A000F3CF3CF30001CF3CCDCDCDCDFFFFFFF6D8
1356:1054B000305FFFFF0C30C30CC30C30C3CF3CF30094
1357:1054C000F3CF3CF30002CF3CCDCDCDCDFFFFF406B2
1358:1054D0001CBFFFFF0C30C305C30C30C3CF3000141A
1359:1054E000F3CF3CF30004CF3CCDCDCDCDFFFFFFF299
1360:1054F000304FFFFF0C30C30CC30C30C3CF3CF30064
1361:10550000F3CF3CF30008CF3CCDCDCDCDFFFFFFFA6C
1362:10551000302FFFFF0C30C30CC30C30C3CF3CF30063
1363:10552000F3CF3CF30010CF3CCDCDCDCDFFFFFFF747
1364:1055300030EFFFFF0C30C30CC30C30C3CF3CF30083
1365:10554000F3CF3CF30020CF3CCDCDCDCDFFFFFFF519
1366:10555000304FFFFF0C30C30CC30C30C3CF3CF30003
1367:10556000F3CF3CF30040CF3CCDCDCDCDFFFFFFF3DB
1368:1055700031EFFFFF0C30C30CC30C30C3CF3CF30042
1369:10558000F3CF3CF30000CF3CCDCDCDCDFFFFFFF1FD
1370:10559000310FFFFF0C30C30CC30C30C3CF3CF30002
1371:1055A000F3CF3CF30001CF3CCDCDCDCDFFFFFFF6D7
1372:1055B000305FFFFF0C30C30CC30C30C3CF3CF30093
1373:1055C000F3CF3CF30002CF3CCDCDCDCDFFFFF406B1
1374:1055D0001CBFFFFF0C30C305C30C30C3CF30001419
1375:1055E000F3CF3CF30004CF3CCDCDCDCDFFFFFFF298
1376:1055F000304FFFFF0C30C30CC30C30C3CF3CF30063
1377:10560000F3CF3CF30008CF3CCDCDCDCDFFFFFFFA6B
1378:10561000302FFFFF0C30C30CC30C30C3CF3CF30062
1379:10562000F3CF3CF30010CF3CCDCDCDCDFFFFFF97A6
1380:10563000056FFFFF0C30C30CC30C30C3CF3CC00060
1381:10564000F3CF3CF30020CF3CCDCDCDCDFFFFFFF518
1382:10565000310FFFFF0C30C30CC30C30C3CF3CF30041
1383:10566000F3CF3CF30040CF3CCDCDCDCDFFFFFFF3DA
1384:10567000320FFFFF0C30C30CC30C30C3CF3CF30020
1385:10568000F3CF3CF30000CF3CCDCDCDCDFFFFFFF1FC
1386:10569000310FFFFF0C30C30CC30C30C3CF3CF30001
1387:1056A000F3CF3CF30001CF3CCDCDCDCDFFFFFFF6D6
1388:1056B000305FFFFF0C30C30CC30C30C3CF3CF30092
1389:1056C000F3CF3CF30002CF3CCDCDCDCDFFFFF406B0
1390:1056D0001CBFFFFF0C30C305C30C30C3CF30001418
1391:1056E000F3CF3CF30004CF3CCDCDCDCDFFFFFFF297
1392:1056F000304FFFFF0C30C30CC30C30C3CF3CF30062
1393:10570000F3CF3CF30008CF3CCDCDCDCDFFFFFF8ADA
1394:10571000042FFFFF0C30C30CC30C30C3CF3CC000C0
1395:10572000F3CF3CF30010CF3CCDCDCDCDFFFFFF97A5
1396:1057300005CFFFFF0C30C30CC30C30C3CF3CC000FF
1397:10574000F3CF3CF30020CF3CCDCDCDCDFFFFFFF517
1398:10575000310FFFFF0C30C30CC30C30C3CF3CF30040
1399:10576000F3CF3CF30040CF3CCDCDCDCDFFFFFFF3D9
1400:10577000316FFFFF0C30C30CC30C30C3CF3CF300C0
1401:10578000F3CF3CF30000CF3CCDCDCDCDFFFFFFF1FB
1402:10579000302FFFFF0C30C30CC30C30C3CF3CF300E1
1403:1057A000F3CF3CF30001CF3CCDCDCDCDFFFFFFF6D5
1404:1057B000305FFFFF0C30C30CC30C30C3CF3CF30091
1405:1057C000F3CF3CF30002CF3CCDCDCDCDFFFFFFF6B4
1406:1057D00030BFFFFF0C30C30CC30C30C3CF3CF314FD
1407:1057E000F3CF3CF30004CF3CCDCDCDCDFFFFFFF296
1408:1057F000304FFFFF0C30C30CC30C30C3CF3CF30061
1409:10580000F3CF3CF30008CF3CCDCDCDCDFFFFFFFA69
1410:10581000302FFFFF0C30C30CC30C30C3CF3CF30060
1411:10582000F3CF3CF30010CF3CCDCDCDCDFFFFFFF744
1412:1058300031CFFFFF0C30C30CC30C30C3CF3CF3009F
1413:10584000F3CF3CF30020CF3CCDCDCDCDFFFFFFF01B
1414:10585000307FFFFF0C30C30CC30C30C3CF3CF300D0
1415:10586000F3CF3CF30040CF3CCDCDCDCDFFFFFFFFCC
1416:1058700030CFFFFF0C30C30CC30C30C3CF3CF3CC94
1417:10588000F3CF3CF30000CF3CCDCDCDCDFFFFFFFFEC
1418:1058900030CFFFFF0C30C30CC30C30C3CF3CF3CC74
1419:1058A000F3CF3CF30001CF3CCDCDCDCDFFFFFFFFCB
1420:1058B00030CFFFFF0C30C30CC30C30C3CF3CF3CC54
1421:1058C000F3CF3CF30002CF3CCDCDCDCDFFFFFFFFAA
1422:1058D00030CFFFFF0C30C30CC30C30C3CF3CF3CC34
1423:1058E000F3CF3CF30004CF3CCDCDCDCDFFFFFFFF88
1424:1058F00030CFFFFF0C30C30CC30C30C3CF3CF3CC14
1425:10590000F3CF3CF30008CF3CCDCDCDCDFFFFFFFF63
1426:1059100030CFFFFF0C30C30CC30C30C3CF3CF3CCF3
1427:10592000F3CF3CF30010CF3CCDCDCDCDFFFFFFFF3B
1428:1059300030CFFFFF0C30C30CC30C30C3CF3CF3CCD3
1429:10594000F3CF3CF30020CF3CCDCDCDCDFFFFFFFF0B
1430:1059500030CFFFFF0C30C30CC30C30C3CF3CF3CCB3
1431:10596000F3CF3CF30040CF3CCDCDCDCDFFFFFFFFCB
1432:1059700030CFFFFF0C30C30CC30C30C3CF3CF3CC93
1433:10598000F3CF3CF30000CF3CCDCDCDCDFFFFFFFFEB
1434:1059900030CFFFFF0C30C30CC30C30C3CF3CF3CC73
1435:1059A000F3CF3CF30001CF3CCDCDCDCDFFFFFFFFCA
1436:1059B00030CFFFFF0C30C30CC30C30C3CF3CF3CC53
1437:1059C000F3CF3CF30002CF3CCDCDCDCDFFFFFFFFA9
1438:1059D00030CFFFFF0C30C30CC30C30C3CF3CF3CC33
1439:1059E000F3CF3CF30004CF3CCDCDCDCDFFFFFFFF87
1440:1059F00030CFFFFF0C30C30CC30C30C3CF3CF3CC13
1441:105A0000F3CF3CF30008CF3CCDCDCDCDFFFFFFFF62
1442:105A100030CFFFFF0C30C30CC30C30C3CF3CF3CCF2
1443:105A2000F3CF3CF30010CF3CCDCDCDCDFFFFFFFF3A
1444:105A300030CFFFFF0C30C30CC30C30C3CF3CF3CCD2
1445:105A4000F3CF3CF30020CF3CCDCDCDCDFFFFFFFF0A
1446:105A500030CFFFFF0C30C30CC30C30C3CF3CF3CCB2
1447:105A6000F3CF3CF30040CF3CCDCDCDCDFFFFFFFFCA
1448:105A700030CFFFFF0C30C30CC30C30C3CF3CF3CC92
1449:105A8000F3CF3CF30000CF3CCDCDCDCDFFFFFFFFEA
1450:105A900030CFFFFF0C30C30CC30C30C3CF3CF3CC72
1451:105AA000F3CF3CF30001CF3CCDCDCDCDFFFFFFFFC9
1452:105AB00030CFFFFF0C30C30CC30C30C3CF3CF3CC52
1453:105AC000F3CF3CF30002CF3CCDCDCDCDFFFFFFFFA8
1454:105AD00030CFFFFF0C30C30CC30C30C3CF3CF3CC32
1455:105AE000F3CF3CF30004CF3CCDCDCDCDFFFFFFFF86
1456:105AF00030CFFFFF0C30C30CC30C30C3CF3CF3CC12
1457:105B0000F3CF3CF30008CF3CCDCDCDCDFFFFFFFF61
1458:105B100030CFFFFF0C30C30CC30C30C3CF3CF3CCF1
1459:105B2000F3CF3CF30010CF3CCDCDCDCDFFFFFFFF39
1460:105B300030CFFFFF0C30C30CC30C30C3CF3CF3CCD1
1461:105B4000F3CF3CF30020CF3CCDCDCDCDFFFFFFFF09
1462:105B500030CFFFFF0C30C30CC30C30C3CF3CF3CCB1
1463:105B6000F3CF3CF30040CF3CCDCDCDCD000C0000B9
1464:105B7000000700C000028130000B815800020210B3
1465:105B800000010230000F024000010330000C000051
1466:105B9000000800C000028140000B81680002022062
1467:105BA0000001024000070250000202C0000F000086
1468:105BB000000800F000028170000B81980002025082
1469:105BC00000010270000B8280000803380010000002
1470:105BD0000008010000028180000B81A80002026021
1471:105BE00000018280000E829800080380000B0000F4
1472:105BF000000100B0000280C0000580E80002014002
1473:105C000000010160000E017000038250CCCCCCCCAE
1474:105C1000CCCCCCCCCCCCCCCCCCCCCCCC00002000D4
1475:105C2000CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCB4
1476:105C300000002000CCCCCCCCCCCCCCCCCCCCCCCCB4
1477:105C4000CCCCCCCC04002000000000000000000000
1478:105C50001F8B080000000000000BFB51CFC0F003B9
1479:105C60008A59051918AC84117C7A607E4ECAF43BBF
1480:105C7000F232303803B12B103700F1616E06862303
1481:105C8000DCC4EBBF2C8F6087CA32303402F11E694E
1482:105C900006063B3984B8B90203C30A203F0B2AF633
1483:105CA0001E4897CA53E6EEC182B55531C5349411EA
1484:105CB0006C1D2CF2C858174DBE5D1995AF4740FFBB
1485:105CC00040E32C1D54FE742D08FD4D1B4267A3C9F3
1486:105CD000CF80CAFB40FD95A383DD5C5F22FD9DCA9A
1487:105CE00082CA8F47E3B731A2F2CD3850F94950F557
1488:105CF00000CDA28F7AC80300000000000000000061
1489:105D00001F8B080000000000000BED7D0D7854D5BE
1490:105D1000B5E83A73CEFC25672693908409093009CB
1491:105D200021441B700C3F0D16EB097F8636D70E14ED
1492:105D3000696C150744881048A4D6874FFD3291003E
1493:105D4000E17F504B43413CFC29BD97B691A2A596FB
1494:105D5000D2019F165BDFF782CF7AB5B5BD23A5F8D8
1495:105D6000539498774BEDBBDEFAF65A7B9FCC3927DC
1496:105D7000332448BDED7BEFC6AF3DEC73F6CFFADBC5
1497:105D80006BAFB5F6DA7B9C0E37148E04F818FF6EF5
1498:105D900000F81715000A524FA70762D9D700E4E6AA
1499:105DA0006BB16415C0D07C2D0113D8FB802BE49619
1500:105DB00052ED8CE789DC9941ACD75EA00581F5D125
1501:105DC0009E3B0FA2D857B411A01040F100FD19F569
1502:105DD0009D81391EA8A2577FF9D8F82E03AC0994EB
1503:105DE000E5603B7BFF003AC04473D90160F4C9DA37
1504:105DF000790D78CBD98B7C80AC090EFDC652067725
1505:105E0000B99EC0727688C1CDCA274A5FF08C62788D
1506:105E10006CB8DE117653EBBB012601ACC4BE42EC7C
1507:105E2000FDD884F8AE84B13C433ED4E662E5EC7222
1508:105E3000A0FABEB1B1848BDA696A116B1700DE2E4D
1509:105E400050B9B81EC601E468AE145CBC1EE19F2DBB
1510:105E5000EA79CAADDFB361D307B21F4B4988F8585E
1511:105E6000FF35EC7BA5E97BE5CCB7B0DF6C30B563E3
1512:105E7000786CC37F14017C0E7CF9E7B0F3CFC26766
1513:105E8000910E303D0F60727FFAA5E81623FE027076
1514:105E9000BE78A1EF8FF8E0117CB8717AB2C1C1F081
1515:105EA00056A73800F19E297FE4296374DC7C4A26DA
1516:105EB0003A6C6E60FFC7BE6FAE73E8B152C2B3BE3C
1517:105EC00088B51F29F0CC9BF8B2842C5AD7CACAEEE9
1518:105ED000FE747687131ACA891A8E513F6EF66E08C1
1519:105EE000932B77490FC9CDC81A464FA4CB031CEF9B
1520:105EF00018FBEFE3B2143DDD063DA758E9E916F4BF
1521:105F0000CCBBC74A47770DA3A31FBF5BE9A8E33FFC
1522:105F100018BD1619742C80D144C7581ED177B0749F
1523:105F2000CCB5D13160D031966C5050FE908E0CDEE5
1524:105F3000AD9A03B259B9F735B72E23DD625A77907F
1525:105F4000D5574563B586CBD16601D77AA4DF18FA59
1526:105F5000E4700419BFAABA343E6F121296B3AB7440
1527:105F600092772F23CB905294575552183D37563283
1528:105F7000790D119C92A3A63F5CEC8FDA6F64F0A8B8
1529:105F80002678367ABA3C122B6F63F0C624AC76388A
1530:105F9000807269E0ED0E392CF45682593679E7703B
1531:105FA0001AF06DD3F87C36C141EFA1BBAB436270F0
1532:105FB0005E9CE1800DD2C0FD6EEDEBC7DABFBDDFA8
1533:105FC00001E14B06BCE50CBF8B2FCAE10D8C3E1BDB
1534:105FD000435D1D28E75BA7737CFBF3F90AC7EBE978
1535:105FE000F1944F308D17EEF104D2EAB72B1C0772F3
1536:105FF000AD78D504BC81AA2B1F07020B4622FF33C4
1537:10600000F1E3AF067F88C16FA293B73C2061FFDE4A
1538:10601000B10F7B80E6FD610FC2611FA71FBCB67187
1539:10602000EDE32895314DA1924D1F057400937EA19B
1540:106030003A217C727D921DB6EA196FA54DBF84ACE2
1541:106040006545E81BC5A66F3EB0EBEB0983D4335A18
1542:1060500023C11B12708198CFA3C47C9E762819F4AB
1543:1060600030FA95EF32F4F5033FAF64F27040E8EB9D
1544:10607000039D407AF64017D3D734AFB9BE1EC7414F
1545:1060800083AA6FBEEC40FCF7F6E91B2B7DCAE2DA6F
1546:1060900054D43BE5F1B003FB29DBC4F54D59478BE4
1547:1060A00003F9344EE82D38CAE9E061FF99F5759996
1548:1060B0001867D42E2B1DCB90BEAC5DD511DBFB1A1F
1549:1060C000BEEE958189AE6CBCADF80F46AF6112A3F0
1550:1060D000E367D8BF474305D171CA20D73D4147BBCD
1551:1060E000BE2EC3B147313A3ECAF435C36F6480D384
1552:1060F000B1BDC3010ED48FBB1CA41FC794461C584E
1553:10610000CFD0DB0234A814F8EF13EB9D01E7A8070A
1554:106110007A6A51B99743CF0937EB27771384132154
1555:10612000D4D325B538CEE371AEA7CBE3E0889AECA3
1556:10613000A15C01CFE3D37B5F1CC3EAF5C69530A217
1557:10614000B91F420E4F698AAEC67A3B52C8E93F601A
1558:106150002D931CDAF93852C8A59D3E6374ABFC96AA
1559:106160003F6AE3C7266B79A44DAEEB0D7E18723DF6
1560:10617000487EB81588B9F3B0AC937DE761342A60E6
1561:1061800065F907CF6928D76A277F97DBE1D04B995C
1562:10619000DCFADA7959E950F45A36EE6D6880B1F2DA
1563:1061A000E818E86897CAD33548327A8F0E244066DB
1564:1061B000EF474E87B06C9A2F869D69F06F94A0DFF1
1565:1061C00028616FE43CD8EB45397F3CC0E88E7C7F8A
1566:1061D0004011ED7BBC91B129BADBF5C3571AAC7401
1567:1061E000BF39926DA1D7ACD0104B79FCA96197E46F
1568:1061F00093A13F0C3932E8D68F0F312BDF7CD3AD22
1569:10620000DFEDFAA74DB2E99F41F2C975122AD18E8E
1570:1062100019E3C80AEF2DED5FEF61C921EC218F7EF4
1571:10622000968DB70024C861FD2F87E408A4F7513587
1572:1062300044DF5738928558BE003DDB878F4AF53FD3
1573:106240004281A3520E53DA8CBCAB1848C33C90C8B1
1574:1062500026BB18229E422201D14562FFBB95E44530
1575:106260007120BD8A03FC3DC472142C07C1F80B5980
1576:10627000ECC4A2552FFC5962F353124F19F9C8C64A
1577:10628000774294E4C103712A6741173D55E8A6A7F8
1578:106290001F7AE819808084CF3C08D313AED69F4A7A
1579:1062A000901E7D2040F4F4FE0E3ECE4EE1B346F04B
1580:1062B0006D1844BE2F4D443E24C023A7E4D02BE6E6
1581:1062C00037B3D7482F7B2A99FC96A27FC0D6D52A10
1582:1062D0009AFFDC9F99DE134379CE51615884BDDF6C
1583:1062E000D81A20FDBCB9D543CF0EA16F4AAE796153
1584:1062F000C71DEC9F8F8CAD79732F7B9E68DBAEA1A1
1585:106300005DD33196EB97A1D3BBEB46A19D58AF70FF
1586:10631000BBB09DDBAD39825A1DA393FA6A567FCB81
1587:10632000DD9EB0797D31F4D096EB9307F7B1EF7A2B
1588:106330004B167DD7A70B7BEC23C67FC30F42FA8594
1589:1063400005DFEA136487B2F7311FABEFF990213F05
1590:106350009E7D0FF6B4A6D33F1D6559A4FF3A4EAEFD
1591:1063600087105BE7435A4C23BB760A33594BC9BEAF
1592:1063700075C4AA70F6457F2531FAE6C40292A622BA
1593:106380007D40C2761E740891BE4A3C68B657FBFA3F
1594:106390001F1E0B2E64FDC5AE77850F90F88063DE5F
1595:1063A000D8CC72BFBEEDDEAF6A69EC27BF4322FED8
1596:1063B0009EBCBEB008FD5D17048AB227E03C72C1E6
1597:1063C000015C9FAE5F3C329AA65D6A3E19F651FAB7
1598:1063D00067A6766E195ABA4CFD963B1CA42FC1E1F4
1599:1063E000A1676E09979750A5909B18687A1A3BF39E
1600:1063F000F3027E8F128380B0A73F4D7ABD2D713896
1601:10640000D74BD0D095061E1DE19988F3A02986FEB2
1602:10641000404E1B9757A6B534AC1F52F8D3A87FA3A4
1603:10642000A8FFA4C0E332F44DE1A3386FF307A9EF4E
1604:1064300070DC34F884C5F89733EED651688C062C9E
1605:1064400074B7F3B36F7C8797EA5DBC7E7B10FDE782
1606:106450004C70865A58DDA1EC592F9E55E25949BA25
1607:10646000BDDF7897DBDF144788F0B4F70BFBB9FD8D
1608:106470009423D6A913935D34CF873F00229E62D523
1609:106480001BC3991F89FA4D3FC8167809F5062F3F9F
1610:10649000B61FC89EEABDE721B23B4B50AFCA18E712
1611:1064A00088D23C2E8510950DFDB616F51D7B5E84B9
1612:1064B000C82D8E02D42B5D27515FD64FB87B6ABAA8
1613:1064C00078D11DC6FCB88CF5E8F3ECB9C013B9134C
1614:1064D000FB57C3A735B66243EE5C29969DD37F5E1A
1615:1064E00031F10CCE31CF873EB9E0F3A91DE5BD8A6D
1616:1064F000CF9BD9AC5C579E1E4EBDED6291B0FB8622
1617:10650000917FA3C0B039A6F9A83FC8E6156BF7B8CC
1618:10651000E8CF78BF5DE017FB04F3A08E3D03615D1B
1619:106520004375394F6F7122DF6E96A26B10EFB9F58C
1620:1065300091E791F5EAC16E2D2B44EF3B1C6C9CBAA0
1621:10654000501C3907AAD61DC3E763F72CD4908FBD22
1622:106550004C67C969FC66E399A539AC7E92DDEF1BF7
1623:10656000E47CBC3A1C9F8A765865C3891388EE0286
1624:106570004F7427C23524F2945680F0864E6B7926EC
1625:106580007E8D14FC5AE6E0F8E73E20F8A66841E468
1626:10659000C75D10D98BED039AB0BB07094726F947B1
1627:1065A0003B13E93812E59DE9CDF63093F7D2D47C60
1628:1065B000C811F3A15DCC87DE095CFEDB03D58174D5
1629:1065C000EB8521EF86FC1BFAD05E2FF109E4FC2A53
1630:1065D000F6AC8000F9311721FADF900E0C7BB26B1C
1631:1065E00072A777913F67CCABFAF0E9E943183EEA2E
1632:1065F000845035D2DF18F7BC90BB051EEDE7241F91
1633:10660000E56D4A1EC36BCC3D101EC5EACD2ACF9561
1634:10661000CCF2FE6A5FFDC8699A5FF7746B4A68E066
1635:1066200076FF43E077B31479CD2C87AC9F5F615937
1636:106630000D75A384F5D13924EC7BB96D21D90F4CAC
1637:106640003E0348E7792D2DCFE37873AB226BB0BEC4
1638:10665000D1FFAC90CD6E97A26F61BF7639AD83B894
1639:106660000297B17E8C94A217B09FFA5037C19B3B22
1640:106670003D4272C6E0FEE05382FB2F48D74C70BF0C
1641:10668000858D516F86F7905E63F0C9328363F403A2
1642:1066900009258FE87E5A41BA333A3BE582149D07BB
1643:1066A0003BCFB7897936D07C6FC77F4C46BB383A31
1644:1066B00004C7CF13762E244F00F7AFAC71CA19F27E
1645:1066C00079403B2BB72E09181F1A724A0EDFC83EBD
1646:1066D0000DAD0309ED62C38ECD13F3D180674B9FDF
1647:1066E0009D1CA4F933444D06232ACED74964B73DF7
1648:1066F000529B0CA29FB7B63544DF033593D6DF110A
1649:10670000C2E1A304C786D6B0B0AF6BE819AFEB3DCA
1650:1067100085FB025B820EB27F37B5561A71598237FC
1651:10672000CFB093EBCE909DDC1BCC127EA315BE7830
1652:10673000DD19CBBE87D10E82A6385619F623ECEBB5
1653:1067400010D73703B5574BAC74EF6BAF0DAE7DD69A
1654:10675000046BFB5A2DD981F1C400C68F100FA1F72D
1655:10676000FC02C6408D83FC6483DE9E2A6B1C2E5E79
1656:10677000977E1FA76F5DB08D07E559A932068B6222
1657:106780008D04DF4A015FA67ED6887895517666D063
1658:10679000934DB25827C57E5440C0FA88C6E8A1A6DA
1659:1067A000E83144C8DD967AEE874180C7E70C3FC7E1
1660:1067B00009FC7B6A3C8E379549DFC7F83836F88D7F
1661:1067C000F62ED13E131C2E7B7F67593F934CFDD88C
1662:1067D000E0CC049F7D7F0CDEB6F693597FD9DA9D1D
1663:1067E0001F1C1FFAB503133FA99C672B0FB3D52FAE
1664:1067F000B37DBFDAF6BDDA56BECE567FAAADFC0534
1665:106800005BFD39B6F2576DF517DABE2FB57D5F69BE
1666:106810002BFF576BFDAABB3E197DFF3FA39331AF02
1667:10682000FAD345B7ECEFDAE75519244624D8736F4D
1668:10683000EE4B8BF1D3BFC892728EFB243C8E058940
1669:106840007111933DFE7B357A06D7B1BD1F6959A8FA
1670:10685000F7F7C75FF6A33E32DE9F97DEF05F156263
1671:106860007AC19558C1E33E719A3759A09C49562286
1672:1068700097248A9779D44544724F397B6FD26F6ED3
1673:1068800088109F5D25D6F710E7F3B01C7D7AD65FA0
1674:106890006C9B8BECC15811E8A3315E94CFFBA7FA37
1675:1068A000652978AB15AE9F8291782DCEE1610D5DA3
1676:1068B00027F069A753705AECDA1730DEF008F7CBEF
1677:1068C000F7CFB0FAD5B728DC0FB94DB96CBFE0D51A
1678:1068D000F172AAFFFD0FAAE13656653F02C1CAB1A7
1679:1068E000073D3AC63746605C8E6F1A505C6E38883A
1680:1068F0003F117F2BC17FB376C3D55314670B350689
1681:106900004EA2CE9BA354D0788F4B3D57E1788EECAE
1682:10691000F3D7F2FDBCBF7C4CF17741AFE0C649C96B
1683:1069200018A3176C758547139DC34467B702EDEE36
1684:106930006A14134EDFD5ECB578AFF8F2D06D12FCC7
1685:1069400040FD3B0AF7B575E0FE6482CA3E48523905
1686:1069500047D8B9639452EE17083F9379F612FA5F5D
1687:10696000C12F32BF3CCDFA315BAA1DA314A4E29320
1688:106970005288C721A54D2FFC59C278572584F8FEAF
1689:10698000948807AE97A58F311E1E18DCFE4EF06B63
1690:1069900056BE821285D92679FE5A1F3F39BD46055B
1691:1069A00039FEC1ADAE16F46BF6CFB2CA81515F5657
1692:1069B0002E3B5EB17DDCA84F4F0E729551044F7F88
1693:1069C00039B83580FB07528CD12D7BF074CB91B553
1694:1069D000AF2A13114FA0F22149BB5529489515D074
1695:1069E000E69BBFBF2A4716E0F7D854A86C5153FD69
1696:1069F000B0F78B32BC5F92EE7DA961B79EE5EB7874
1697:106A0000B1B0AF86B6C7C92E2D6ACACB32DB59C525
1698:106A1000625DD8D3B4D08BF86E6F48AF078DE74670
1699:106A2000E1F765AAA74A5D11D42B3056810369ECC2
1700:106A3000F26751BE4DFA54ADB2DA5BD317C56AB1F5
1701:106A4000BDBFCE01B86FC2D679B2EF8A842E7B78F3
1702:106A50004A4CC2BC97F872083FC4F0F22F2AF3A642
1703:106A6000B3931ED6B6D3FB1DF5876791DFC2EC3A10
1704:106A700099E2E25DEBB13CA4C6011BD2EC173C21CC
1705:106A8000F0DB5CCFE964FF5EE18268BA79F8AC22A2
1706:106A9000F61994980485A9FD92274E147DA192C100
1707:106AA0005B1C7684BDA1149CA57D765382E855516C
1708:106AB000AD0430DF80297E8BBDB9A3BD7AC71D68C8
1709:106AC000B7B3F768B7EFBC3E300CD78D3DB515B303
1710:106AD0001A517FDFE980D1A1141C633AADF43CD197
1711:106AE000373FADE3B27E6BC97FAA67E44A43872B89
1712:106AF000A547A71837939CD8D755BB1C5CCEFA7016
1713:106B0000937CE5F8FD00E7E144921F8AD30CAD6762
1714:106B10007E5C556A1E197E8A5DCE02750B49CEB623
1715:106B2000D7977911CFDEBA6AC9C5EA6DC19A69FCF7
1716:106B30007163BC4CF05438A3DE00CDC385523ABA21
1717:106B40001546D3C7CF35A7883F2B5109DB67AA3736
1718:106B5000C229E441CCAB4231AF82535AE6D0BCD813
1719:106B6000A5C0438C5E0FD755B78D26FA3948EEA6DF
1720:106B70006B5CCF164EE0FB993E46AF67D9BAF7483B
1721:106B8000038413ECFD23135C96FD9942411FBB3C2B
1722:106B90003E32807E01B3FFC5E45F71AA7CFFB61C64
1723:106BA000CAD19E7AB8EED2ED074BDF608343D39112
1724:106BB000BF35D503C44DDA2E779D9A773DCA63CD94
1725:106BC00020F3276CFA029EBB6BFD68C607DF2EA67A
1726:106BD0002F201D7D5C167F7C207AD8E93F0EE99935
1727:106BE000FDE9D1D3FE7D8853C40107498F27EBCB44
1728:106BF000B6968732D7B7E363B4DB28E6DBE7A14775
1729:106C0000C6F9AF4180E24B53214CCFE910A167B7E1
1730:106C100012FD9293D59F092D5436E2508D0ADF97CD
1731:106C2000802A3EAEB1BFAD4C03B293C78C077D2F17
1732:106C3000EAE72973C4A6AFA29DF3A0D1C6E048E35A
1733:106C400057013C447817DBD663234E31B4295E5F8D
1734:106C5000CDFA2DAE77501CA3B8E6B0D7BC2EFBC53D
1735:106C6000FC31FADBC9BEE3FABCB36970FC32EA3D21
1736:106C7000A12429AFEB899A87DA70B951F2DE0EA60A
1737:106C80006B6FA7EB968FBABC9134F0EC5C7494F206
1738:106C9000B776D65C3A8E3290DC8C91D3DBB39F779B
1739:106CA0007B896E3B733DB7F0E49C5596FC0390D511
1740:106CB00052F3B83B3F82DCC8A5F489669D2F5B9CEC
1741:106CC000221FC4073E94FF4CF4309E9F361D9E9CAD
1742:106CD000DAB23492A67D859BDB136B722186F92292
1743:106CE0004FBEAEE898DFC00496E471D22D211DEDB1
1744:106CF00097355EAE979FAC05FA3E29577C7F2C44B2
1745:106D0000F954C59D1073B1F5ACF8B5458FE4B27A6E
1746:106D10009B16310FB234F57E53F86407EE133FF340
1747:106D20008A2380F6D1246FC2136678D5887570E700
1748:106D3000A29394771CDBA58447937E97409A44DE08
1749:106D4000BC25AE79DCA910BC3BC30F7B716F6E47CD
1750:106D50002849FD7C63F2494F88E1B7A9A4DB837819
1751:106D60006EAE7998D6CBC38BCABE5C4164B5E6974C
1752:106D7000CC94A7746B98BFBB88EF5BE426BB3D98AF
1753:106D80009FE46F50E046069F5FE5F86E5A033AAE07
1754:106D900053D5228F4482D9E41717D9F2B80A6D79F6
1755:106DA0002681F0CC77709F9FF6FF1109B9E991B168
1756:106DB000184F6C7688F4538DE6A94FE0E70B6B54BF
1757:106DC0007FA67CCC8B790B3BDA9500AE7F015BBF55
1758:106DD000763C02103DA149D40F8DB3E351BE4E065F
1759:106DE000265266316B2AE00E30B887B021DBAD70D9
1760:106DF0001B74B58FE3B395DF36E4B91846A31E3292
1761:106E0000E2CE06FC76B9CD9FA41F7999E1BBF315BC
1762:106E100095D6EB9D352F7FAD19D7F94A37E5717DB2
1763:106E2000E1E2C1A6EFB3E72F3E385A8ECF2F16ED21
1764:106E30009FD08C74107912463CAF107B26FB55E82E
1765:106E40003563BCAA3DEDCE7C7A45F9159B4FBEDE7D
1766:106E50008871E7A22620FBB748E1F2E96B77E86D7D
1767:106E60000CFEFCEBE2240FC50D09025A6DE892629C
1768:106E7000267B5E15F69CAF292AE13EFE8D0D712F13
1769:106E8000E68BF844FCD737214E76D20CF90D4F52E1
1770:106E90004DF1CFC87F37E69F9D3F158B78DE497156
1771:106EA000BB1246B08B9B5A1C6487D7F07CEF8ACE0E
1772:106EB0002E89FB7F3C9F9E87D4D933D2C8F30977B4
1773:106EC000713BDDC8FFF63759F917E8CB9F8FD2BE6B
1774:106ED0006B69A7ED7BA4EE2D2E87567E96B9043FF5
1775:106EE0002B44FEA0CD4FDBDC24F6E9548F7E29BB7A
1776:106EF000F6159187F32AE23FA6FFF79B33E8DF9B65
1777:106F0000DC7C9F5F767477901F779D83FC383B1CF9
1778:106F10005B9AB8DEDBEF7258ECF82B1DFF36A1FF51
1779:106F20006547F26F327E531FFE7F9BF1EFFF1B8F91
1780:106F3000BFE16F4CFF1D7F63FC0FFE07E33FAF52C5
1781:106F4000B2F8697B5D1EEAEF87EEBEBC0D8BFE9644
1782:106F50001DE9FDED332E87258FD8C84B9CD6A02D7B
1783:106F600070A1BE0CF3731EF6FE66C82F75A01EDC62
1784:106F700021F2B1991ED564CC779A6C9CD3E0FAAF1C
1785:106F80004EE8BF3AA1FF0E67D0ABD5355CBF33FBEF
1786:106F9000420F95E292119F5581EBF72985F28B0FF5
1787:106FA000035B6650AF85DC69F3B10B05DC767D5A77
1788:106FB00028F469F54BB6F7428FDAD7F9D2BEF82933
1789:106FC00050FCF4BFBB447EA94DAF1A74D851C3ED39
1790:106FD000E5FC39E9EDC14D363EAA135A280FC1CE62
1791:106FE0008F332EEE5F1BFC58E0D17EED2AC8CCEF2C
1792:106FF000A4E0F70D82DFBF7405E869E48D64E277F1
1793:107000008D9B8FF359DFD9601B6213A9253EC8827F
1794:107010004F326CEAA6F82F7C03CCFEE5968F981DC4
1795:1070200082EBBFAA52FCECB3F9E03092ED3F32F6AE
1796:10703000E9D89FB39BC751E57C97CDDFB2DBC11E7A
1797:10704000CA8FDBA9F1F3563B6BF6EE5C81EBD32BD9
1798:107050007C9F79676EE74B78F40DE2E31584C3B04B
1799:107060001B41C467D1A4E0F928F6FD27ABDDBFF3CF
1800:10707000A3AE04DA5F815229CC3C2BE8083D9C9FEB
1801:10708000F63C9ECDDE57DD3E8BBF0B370ECE6E5FDE
1802:107090002DF8CDFCC502B7697EAFF6CD1CCFF3A2AB
1803:1070A000A607709F47D2663A309E9EA91F8CF49E19
1804:1070B00033ED3B352ADA70EC4F42FFB132E53F0247
1805:1070C00094F0F8BC81FF60CF0D34DDC5F7BF055DDE
1806:1070D000F3AFEBFAABF891469CD7A8A72A094877FB
1807:1070E0003EC81EB7BBD1A94D46FC060BFF6E143837
1808:1070F000F6FCE72AB92E5DFC2029F4AB1A79EAC523
1809:107100009B59D50973251EDF67669B795F6D53BE5A
1810:1071100052972EDEF533314F7E894139D2EB09C8C3
1811:107120009328AF04102F633EDAC7BF568C7BED1552
1812:107130008EFF8A98D7D78A790D10A6FD984CE3D692
1813:107140000ABD613C3FE9B8498177AD4BC4350618AB
1814:1071500077B6C073F615E27B5E8C3B7B90F82E1001
1815:10716000E32DB8C2713F14E32E18E4B8770BFADEB2
1816:107170007D8574563C92E86770746E13E3B55DE1EB
1817:10718000B801316EDB20C7DD26E8BBED0AE95C22E1
1818:10719000C6DD66A373A6F9BBF70AC7ABF4F0F9B373
1819:1071A0005FCC5FBB5E33C6578B1C116CBF3368ED81
1820:1071B000E78B6E3EBEF184C4C7E4BF168B7DDDC98C
1821:1071C0002BEE5DA8A519D7A86F5F8F338DF335110E
1822:1071D000AF319EC6387EB11F3AF93A364E1AFA18C8
1823:1071E000F5AF75713D98A9FFA5029EA597898751B6
1824:1071F000BF16FB9F98B9FFFB041CF7D9E01FA87FBF
1825:10720000A3FEEC01E0EF1070745C26FC46FD050364
1826:10721000F4FF2D01C7B72E137EA3FEDD03D0E709CF
1827:1072200001C7139709BF51BF6D80FE9F16703C7D4B
1828:1072300099F01BF5B70D409FE7041CCF5D26FC4677
1829:10724000FDFD7DF3DD3AFF54E33C50182A31DF7831
1830:10725000046485E97E8370F204FA01EA2A7EBF01A4
1831:1072600074D9CF4199CE4FB1297EE2BE8A18D6DFBC
1832:107270007D178FFBEDBE16C88FD85D20F295455C5B
1833:107280004B15F6E0EE6B791C647790E7EF832D5E8B
1834:10729000B49BF93BB4EF5BC2F399D5AA3899983403
1835:1072A0005CA13011439857C3CF5319F69E71AE6A53
1836:1072B000B58853EDD680E254BBAB7879E774D01D26
1837:1072C000A5A6F3569509CA4345C316E3B1A9F362CF
1838:1072D0001AACAA36E563AC4A50BE8122F246184188
1839:1072E000C09297613BA765DCA37073589B816AAE1F
1840:1072F0007402DFCF2B8D58FD87263CBCC5EAFF56B4
1841:10730000E8C900D64BA3670E7914CE3F91B7395721
1842:10731000E06FD0AD5AF073CBEC0FBAA7313C5F9C55
1843:10732000E2C44C1678F194A0E31459E7FBE7E0348B
1844:10733000EBED3E39CFE00FAA9D2D27BD8C3E37BF28
1845:10734000046164A36F97B6264471B58F48FE28AEDA
1846:10735000C6C6BD79575C41F99BD5199A86F1C0B96B
1847:107360002F8556AB987FDD09610DC9FBD1D7A99F49
1848:10737000BC7608EB9C556D01B2736DF139E3BCAF7F
1849:1073800088CF61B8DAEC5FCE127857B707D6E0D66F
1850:107390005DF574B7C57E9D25FCCC2F696EEB394930
1851:1073A00071EE7196CDCFECF458E3756A676406C64A
1852:1073B000BFE5B9A7353CF73C26220586B2CFB745D5
1853:1073C000B629189F9CB5AB85E7F567B80F23E7B1E1
1854:1073D000393EB3FD3E46C8F32F775DDA5E37E20CE7
1855:1073E00046DCE114E619BBD14F0F0ABE70B932E496
1856:1073F000236FAE6491934E0FD7239D1E1EC7FF4F80
1857:1074000039F9EBCAC96F3CD6F843277E63F3B12242
1858:107410009C7E9FBED1E3FACFF9FA29F0C1EF4DCFA0
1859:107420000768CAB1E4131B795576BA19F7C618650F
1860:107430000FA43F8F57E215EBACDDAF7F235A8B785B
1861:1074400019711A80FB6DFB9B53C2978A4BC8C6BD4E
1862:10745000038E3764C4A7D22BF48F020AF56FC3835F
1863:10746000E67D61EA3E1D7B7F6BC4791E032F677941
1864:1074700044C37B56D818B4DF8779EB87AB707D0C9B
1865:1074800058F0D6BC7CBDD950C9E56D43A5A2679321
1866:10749000BC45ADF71695EFF5A4B32B8C2798EFAB51
1867:1074A00028EB0FAFAB3C1A33C3E312F0D8FB999330
1868:1074B000119E464BFCEB72E1715F05D08D72AB30D3
1869:1074C0002926F9FDBAA53F47A54EE7FA33F58367AC
1870:1074D00064082F1B5F328DEF29B19E5770E5675905
1871:1074E000E45D51F36CF78AD8E4AB2F2E34B8F1EC9D
1872:1074F000E718DBC5F9147B7BAF1287701ABA7B43A0
1873:10750000F67C0C9DF8603F5FE30CD8E0B6F5BF0950
1874:10751000DFA5C9F730EE195A27D6B5F58A4EF656CB
1875:107520008C8189F99E6B845C2A019DEE67FAA657CF
1876:107530004A8B3F84D3AFB74A797AF83D2556BABB18
1877:10754000F2F3AC7C50D29FE7586FCCFBC07ECD7C71
1878:10755000BF56FF797E2C7CA9F5BCEF5E2DE937F292
1879:10756000C70CA5035EDB3D1683E4AFF2E11080217A
1880:10757000A632D3AB18AF657384F279EDF54F1BF4E7
1881:107580007B632FC16FE8E9EC5D465EED27C3439254
1882:1075900040EC935BDB679C8742CFC942AE9F1F00E4
1883:1075A000FF4CFCCD2A77D8E6CBE0F8EBC5798FEB22
1884:1075B0009EA2894BB0ACF33ED37810E0F85EEEBCEF
1885:1075C000FFA4700EA98B02EA3357300A51B6CE17CA
1886:1075D00005E3B44FAE4A3D31F4C7D89C0A219F77EA
1887:1075E0000E09F1F3E3A67A53593B67A923E6C43C9D
1888:1075F00010089FC0FAB12074617D8CC7ECAD4AD5EC
1889:10760000532588A0BCAB054A04DF1BFDE54CB1F651
1890:10761000C7CC04D97C1ECBC817205787E1EF9CCC80
1891:10762000FC53D6DEC5ECD03DE9F44916B743B39F11
1892:10763000F3D279435F44D551248B26E894175CD468
1893:107640000861F4E72A3ABB21CA3AFD26C23111BFCC
1894:10765000C7E9DE85A25D71DAB7CF77F373EC454DEC
1895:10766000716981699CCA2C2EDF53E778689DF87A8E
1896:107670002DBFDFA23BB8305E8BE3D5F07D2F5FBE20
1897:1076800002C3183D7CAFB9B9FF392109E67B23DE7F
1898:107690006E85EA45A301DE6DF5D0F37C6B809E819B
1899:1076A0008FFE279DE75B33715208F3472FFA1A4785
1900:1076B000E2BAF17E6B90BE6F7E301CC27C22F9E490
1901:1076C000EB749F444ADE6332D430BA4D486AC83FF7
1902:1076D00013FE7BBDA67DFE3EBC18BE0BD8381B2515
1903:1076E000C7ED381E9617929C7A649729FFC325FC34
1904:1076F00046E71A883C5585F797E8D2DD55A6F75E30
1905:1077000066B7E1FA3A31407C4FD1536F13F4BE169D
1906:10771000FDDDA297045DE7D45C72DF64536BA27B4E
1907:10772000FAE85459CD70EE6DB673EA0D591837C2A8
1908:10773000439F6CBC69732A8722BD1E755ACF931B69
1909:107740004F39303E5C8E7563450E9A87E27E959583
1910:10775000578586E69AFA9F2DE4523EF923A26F766A
1911:1077600015CF0F617FF545A6FCFF926823BFC7AF19
1912:10777000859F9331F62147DE9A6CC32D8991ABAC7E
1913:10778000E767668AFB504AD73828FFB57432E9505C
1914:10779000286D03CAB3DA2787AB51BE1F835772F136
1915:1077A000007B09836F389BAAA5316B3FFB16D7BFBF
1916:1077B000807100E37E95D5EDBCBF11A1F0A910C684
1917:1077C0004FAA1C642F8F84B007FB1FA93A00CF1764
1918:1077D0008D02533FAC3CBCC5DAAF1DDE529FC38166
1919:1077E000F10E039E1170C4A3E553FFA0B3F625CCA0
1920:1077F000CD2B4E039F7D9C5146BDB1D5D509483355
1921:107800002EF4B4E1BE50BFF107E8B7354BD8E13EE6
1922:10781000F0A33EDF2571FC632FCAE103C8D7BB0F7D
1923:1078200052BCA6646527ADEB9D59DCBE5BCBEC0179
1924:10783000D589760A7B8ECE2C877280112E87D68FC3
1925:10784000B4F2F76456EDD62C8C87654DDD8A7298BC
1926:10785000A584BE82FCC83AE504DCC7CCD2E234FF82
1927:10786000A09CDB191BABCA7270BE65B5B8D2FA6BAF
1928:10787000ED594E826F5796A4605E28932DC24B69D6
1929:107880000A7D6B262B7617688FE3387F2E88D2D33C
1930:10789000781F5CD81042F99CB6A48AE25FBD9D12A5
1931:1078A000C5BFDE927417A66A2F9BDB32EE46468F69
1932:1078B000D9B9D127B0DD1239B1D6C9E0597E6B4BA9
1933:1078C00005D2A71EF3FD0A70B818F7074BCE841532
1934:1078D0003C1756A2249C4CBE3D8193AFF167AC1679
1935:1078E000E5DD832761183FFDE5DA3BE837F9C43968
1936:1078F00024197A629817E89F0270C6C437F4E9CC5D
1937:1079000065DCD3359733D17FA0E722D6F6CC685C0F
1938:10791000E5C39A4476814EF47305C2E3104E39787C
1939:10792000AAB0DCB4CEB9057EEE690BC5FD489AF06D
1940:107930006FC260F66FDD022FD4E1674CED9D416BA5
1941:10794000590EFC75F130EC6EE9A7FF7E0EF9B8FA1E
1942:107950006927C53DA73DED4CDCC0CACBF748B4CE86
1943:10796000388E73BDFEFE7E89E67DC2E7223DF05E65
1944:10797000C043E56677F796CFB172CFD332EC25B22C
1945:1079800034D07D52E78CF5F4282F2F160ED2F23D1D
1946:1079900027E6637F8D47DD80EBC4F21F2DB9E973C5
1947:1079A000ACBC84C93156597EA0CD358C95EFD2A59B
1948:1079B0002E2C5F980A2467B13C978E792D17FCDD39
1949:1079C0008537ABB48E41680CEE6F7717CE65F2B891
1950:1079D000547F6A26B65B7A48C2482AC3E3C00B4587
1951:1079E0000CAEE5DF91687D5C76309BDFBD22E877E9
1952:1079F0008EA17203FBBE92E189FA7009C46722BFAF
1953:107A0000961FD8E632AF73EFB65652EA87515EFE44
1954:107A10001D360E6BB7E27B5218515C81F90EB85ED1
1955:107A2000FEC8DBB04F45FCDA5C153EC46B9D0BEB2A
1956:107A30002DD1173CE30D217C7B5C33D9F7A5BBF638
1957:107A4000B8165721DDE0765C57971DFC0CBFB3C01C
1958:107A500080AB53267F6165AE672FDD6BAADAEE47F8
1959:107A6000E9830B2C702D157A83F97D2EF379B76796
1960:107A7000B273494E971D942DE318FC8F9D067E1E10
1961:107A8000ED273E3A8F66F0CF58AF0CFEAD342EFA9C
1962:107A9000537A26A583670BF283C11367FE0D3E1F41
1963:107AA0006E0DD2F3D1D610F1693BD2710CCF4BC120
1964:107AB000F76CDED6E23D687E0D2F0403C8ABD76AB3
1965:107AC000310F332FC2CB85B746A5D025EC74E3B96F
1966:107AD000DD195D8046CE94EC6FCF50983FB6DD1532
1967:107AE000BD1B43D60165EF8CE96CCD6BCA8E4CCAC9
1968:107AF00036EDFBAD15F7275D931D22FCD716B9882F
1969:107B0000DEDB6F9BB44FC49F689DDC7EDBE22730D9
1970:107B10003ECEDA7F3E1BFD0BB1FF97A97DE1FC1A3B
1971:107B20004BFBC2F98D46FB99D4DE73E9F6DBE75FC8
1972:107B3000671D7FFE52A3FD4D04BF7A69F80B6F9F4E
1973:107B4000621DFFF6266ADFECE6FCEDC9F550BE7556
1974:107B5000BB379C407D4C17A94DC07CF28ABD58CFE5
1975:107B6000587798E6D7307F5B3D945BBD01CC72348B
1976:107B7000753EC28179596639CAA9C9B2CCAB5C2DB0
1977:107B8000CF521E5237CC52BF205266F93EB4E16A42
1978:107B90009B5CAA747E91CA08141AE60C4ED7301763
1979:107BA000E9A3DA61DC0EBEF7B897CAF75EC7F1BB8E
1980:107BB00077984AF3186146BFFC5E57F41AF3BDADDF
1981:107BC0000C2F093773EE54A3F7211EA9F72107BE26
1982:107BD000CF12F94E596E207DB7AE74D2BE98899EF1
1983:107BE0001DC3993CB0727BB68BD35DF061DDF0C5EF
1984:107BF00041B3BDBE76B8AB01FD0D7C7F878AE345FE
1985:107C0000D6E278CDAE9E0AB43BECE3B8CB6A2CE367
1986:107C1000784634D238DBB2793CD518C73DA2D1368C
1987:107C20008EA761AF782FC67904E52CD338EBCAAEA6
1988:107C3000B3E23362298DB3DB36CEBA114B6DE36408
1989:107C4000717CD87B318E7EA971DCA3A658F119D93D
1990:107C500044E3FC931D9F914DB671541A07DFE3383E
1991:107C6000CCF00DE17D592E77CF62E2FF4FBD64E786
1992:107C7000B8DCD127C9CEF9B597EC1C564BC37A5066
1993:107C8000C9FDDB7BB2F3F8BD5F598CFFAA99CF31F8
1994:107C900091771023BFF84E0122E80C22A6DF560888
1995:107CA000195C7468F688367C1E9D165C80FEE8A31D
1996:107CB0003E8AE3BD7F749AEB8E34FAE8CEB8F35C6B
1997:107CC000D224CF7D7A55C46383D97C1FD2289F13D9
1998:107CD000F19F33182762CFB79C40FED059112F4A2D
1999:107CE000C1DB46EDCE897DBD73BBF83A7571DB69AA
2000:107CF00027BF37155EA96270CF1368DC19B7DE9312
2001:107D0000D92CF8D1F323373F07045A31DD8FD73907
2002:107D1000C4122FFCCDF17F7881E7DD4131DEF7FB26
2003:107D2000D58EA79EC76AAF4A0B86AF64F8361CD9BA
2004:107D3000E62C66E5F79DC9F961D5D44F8393CEDF74
2005:107D40001B7EC82D51A7C57EFE5AA3B57C9BCD9E38
2006:107D50007E23BBCCD89FE5E3867427F26B1EEEB181
2007:107D60003216DE864F4ABE0B10BFE607785B039ED5
2008:107D7000E6FB9D90A0F52E594071CE5801C569A231
2009:107D8000C6BA65836FBED3A345183FE7DF27131D2F
2010:107D9000EDF0268F676B0EE6E7243BFF9713CFF1DC
2011:107DA0000C04FFEDABACDF21E6B4DC4760C8C15783
2012:107DB0001A6AF79D35C9C72DD159FBCE5AE834DB75
2013:107DC00052BEADE5164BFDDB572DB07C5F10BBCB33
2014:107DD000F2FD8E8EBB2DE53BE3F759EA2FE96CB33C
2015:107DE0007CBF4B5F6FF9BEECE0364B7979D70E4B19
2016:107DF000FDE6A37B2CDF1DC7AFFA12F981BF94E922
2017:107E0000BCF31FD5735BD07EFB6340A1FD9CB7C55F
2018:107E1000FEDDBBE23EA015287B9371FE8CF7A0DF50
2019:107E2000D09CC5E633B325C6A9056B3BA6A01E01B1
2020:107E3000BA5AA35A2D5E1B63CEEE64713E51EE74A6
2021:107E40004162086EAFA4E2B03D72EABB9264DFC744
2022:107E500067FE2E772A69BF2B49256DBF17A49E0A9E
2023:107E6000B41F63AFBBD39E034FCD4B28864BDC2F93
2024:107E700079DE018D66FF6D9ECAE3432F644F9DA797
2025:107E800016D071699AEF4D878BA6A2DFD0E44A54D1
2026:107E9000A4DBB7E91BAF4BA27B03E7A97CBEDCA543
2027:107EA000175BE269CB0E8EB2CCFBD7B2A237ABAC7C
2028:107EB000DEF91332E959483C37E2CB63717C6D1E21
2029:107EC000BE87A305B43EBEDAAAED3BCBFC80D75AF1
2030:107ED000EBE8F9ABD6C8BEB3CC257CA3B581CABF4D
2031:107EE0006D8DD233D9DA48CF33AD2DF4FD6CEB2A4A
2032:107EF0002A9F6B8DD1F3EDD60E7ABEDB1AA7EFE782
2033:107F00005B3BA9FC7EAB4E4F631E18F62E44843DAE
2034:107F1000D9F78309BCDC2B70900B8D386698EE95F1
2035:107F2000EA552F56A01DDDFB9A9BF26E33D1C92E68
2036:107F30007799F9A7D17ABF58B7C6998DA7378BF330
2037:107F4000C7EB803ACC91583FDA4571B4AC9F7E863E
2038:107F5000EC71F65E017ECF7278769AFB3ED1FF46D9
2039:107F60007E0DC427A3FEB96FFFDBA48555C89F32E1
2040:107F70007EEFD773720BE7DBBEF097C70E4C3FB2B4
2041:107F8000F98AFAD351FAE96F46607CEABD02839E12
2042:107F9000DD2330B8A5A8911D2887BD47DC8457EFA5
2043:107FA000B16C9E8F8241B541E4BF2E3BE8D5CDFA3E
2044:107FB000617957AE6ED51745BA595FF49EDAE7C7B7
2045:107FC00079BF3228EB67C7A37C68423EB8DC19FD55
2046:107FD0002FEF2AD5554B3FD6726F5CAAA37B202189
2047:107FE0009433F712F7A7AE0CBA689C770F8EA2FCF9
2048:107FF00003E627EA6779BC53E7E30675B35C36AD61
2049:10800000CAD6CF0E49C197A9DFBF367C0047E077BB
2050:108010009ECCE771077A82F2AF2EBAE7ED98F32291
2051:10802000AE3B6EF6BF8F295F48A1B2D16F73971C2C
2052:1080300073E3795E3864198FB50B193EBAF9FE9C6B
2053:10804000FE7CB7E683FF166589D66D7EBE3C8AE767
2054:10805000CB597F1714B543BA2675BEBC59C8E57213
2055:108060004FD21565AFDE3B32EA92F920EFB69E0A99
2056:1080700028A3318F20EE4267A4B1EBAAE9A81FDF45
2057:108080003BB2BA10E369CBE4DE7BD39D9BFD50E5A8
2058:108090007136D09D3D49133E467C0680F5EB49C1C3
2059:1080A0008F927ECE54B6EB6BE3E9F0F1B8FB8A43D6
2060:1080B000A7677E8EC1BFE2E8072E84E3A81A75F891
2061:1080C0004CF84BE27CFDD2836FBA10BFB79DB18AEA
2062:1080D000FB2FA1A7FAC3A9062DFBA131E8C679BCE5
2063:1080E00090FFF602CAD3577ECDA6E63BBF7002FED4
2064:1080F0009E83B15F619C7B5804113FD26BE1916517
2065:10810000141F7EE7992F0A7B2E3E09E5E33D70D4CC
2066:10811000217EEFC1CBFEF126FA95FBB81F031DDCD3
2067:108120008E31CE05327BD662D72CE9B49617C39C2C
2068:1081300042D41B8B1F75822EE1FD9FA67B9818DE13
2069:10814000F93E6EEF2E8196B568CF296EEE1F2C0C8E
2070:108150008052CCF4E9F21F3E3609EDFECFF8F8BEAE
2071:10816000A311C7B82B8FDB7B4BF37517EE27FCEE03
2072:10817000C8F8799F43E973EB6B715D869CF4FB7FD4
2073:10818000777458E11B087E3BBCC6B9F77EF1140139
2074:10819000877C504A9B9F36D927E44EE891877C56CE
2075:1081A0003B7F9DAD5CEF1371561964E4F37B014F87
2076:1081B000CC9143DFE99C6DECB03BBC3A84F76A4557
2077:1081C00022285FCC2E1807A67ABF57A3F4FEBCF472
2078:1081D000D2623A67AE24C6513E9E07284FD125E4AD
2079:1081E00041CEF28F836B304EDA424EFD6AAF7F2F65
2080:1081F00096D7FAF839A8669CA7ACBFCDFE99A730F0
2081:10820000AEEF8178422BC5FD6F6BFCDB1BB296B3E2
2082:10821000713EA13EC117C88F3050BC28BBD25ACF87
2083:1082200017B69697F6D129219BCF7DF83D6A027F3C
2084:10823000AF026A94F366BB798587C30F78AF2AAB28
2085:108240007F8FB0E757402846798B412E07F7CCE265
2086:108250007913F7F842E118FB2E291A9D8F58874DA4
2087:108260004DEB58F38712E826BDDEACF4B8502E9BD8
2088:108270003F54E8FD6E35FA20D2D5051AD9B91E460D
2089:1082800034DCBF56D43A8BDD0B25E27E405BFEC268
2090:10829000265FC0E2EF197AC129F422D317EB7C05DF
2091:1082A000A8077B66F27DF5A48BEFEFF07AAE54BDA4
2092:1082B0004D0847A67ADE54BD6DE9EA2DFFE1779FB0
2093:1082C00089B1F9BEF4FBDFF4E366DA3B4ABC10F394
2094:1082D0001F9A0EACF1A31CBFADC4FC88F73B7AFA21
2095:1082E000BCF79F097D87F94E785E7E85E0D3BBFFA2
2096:1082F000B8F126A4FBC5034E3A6FDF7CD09D7033E6
2097:1083000026AE38721797A783EE3779791DFDFE48A0
2098:10831000F351EB7C5BFAE4370B43B4B9172B16F738
2099:10832000B393FDBC62FFEF67A23DD20C3DA427ECE6
2100:10833000ED70FC0FF368FD5A80E7FEEDDF8D7CAB3E
2101:108340006621F7CD4736525E55F391599447D56C67
2102:108350009BE78DC20F39EAB3FE6E83410FD0B95D42
2103:10836000BCFA3BDF1AF72683E7FCFE5FF8254BFCDF
2104:1083700088EB89DEAE3B1E7F369459BFBF2FFCFAD7
2105:10838000543B9DDFFF7D94DBF1708C3F9B9C093F4C
2106:10839000FA4D4D7B9C61A641A0E9BBFB9EF836CA15
2107:1083A000F7EB6E8A372CFBEEF3AF5EC7CACB9E723B
2108:1083B000E6D7733454CC0336F88267DC315FD7E0FC
2109:1083C000C3D21F3CEF0A8DE5EF1FC84BF163D953B1
2110:1083D000275C30B63FFDA6759D70F1F3E736BE749D
2111:1083E000BD3913EDEED5DFF9930BE7D73BC7251861
2112:1083F0005ADABF7DE39EE7C9AE433A111F059FFAE3
2113:10840000F8D68F5F899B9E9D40F502B88E0DC4AF54
2114:108410006FA3CC14905C7FEF59DC2FF8953B8C74E4
2115:1084200068FCDED7FD88CF5B4A0B97EFC7D614E216
2116:108430003E7AA3335618A0277FDFB8FB1B24774B67
2117:108440004E7FA390E7416945FCF78C62451407DC39
2118:108450007533E1B918A2247F8D8FC99487FE470533
2119:10846000EA9E4A333F6EF0733DF6D65E375D7EF787
2120:10847000162A5CF4175F96757EDE96E7257EC3D8D4
2121:10848000F7C0FB1B59F98F1ECEAF02BFC3B8D7CAC6
2122:108490006391DBFDEBBA914FEF0ED78662BC92D1B0
2123:1084A0002126E826A11E924FCF18CAF90421659211
2124:1084B00068C7F4E4347C8FF5BB9D9A779CA59D58E2
2125:1084C000D7F8F8F788F119DC59689FBD55C8EC9DBD
2126:1084D00034F82DF31BF39FD91F263933CD733EEFAC
2127:1084E000F7AFE7F3DC98F7FAEC3AFCFEAFAFF079C0
2128:1084F00084ED709D67702586D2F7137325D20B6EBD
2129:1085000048A49BDFFB9D627E5BBF33AF9CEC5B436B
2130:108510004E18FC0AAE5B2979E1FBBC8C0F64BF2DC1
2131:108520007E94B537DBE7382ED573A5DE9BD6FB25C9
2132:10853000421F5CE7B7FD8ECBAE8241DDFBD3E4D4B6
2133:108540009FF836CE5F365F71FD69FAAE93F244FE56
2134:1085500070E8B957BFCAE4FC0F5DC6BCB5EA53FB6F
2135:10856000BC6D3C3C11D2CDDB3FA861483B6FD9FBD1
2136:10857000B4F3564D923CFF47E953837E0BFDD63C46
2137:1085800027433F66A2A35D3FFEC517227ADAF52393
2138:10859000FB7B0526F5974343FE0CB95BFA4FCBE90D
2139:1085A0007742FAE4D390BF3EF934E4CF8EAF957EA4
2140:1085B000F6EF9F4143C58817B3A7F32188F9309E92
2141:1085C000FA1399E2A917184C6B199F2F1C2AA5734F
2142:1085D000C46BBCDC3FBF10E8F1E755D13D3854EE29
2143:1085E0002970AD457D61BCEFF1F2F8F785488FDF6A
2144:1085F0009C07F2E631D98FFB5D491DEAD2F9234C85
2145:1086000023131C49C8F49DC78B2FA0FD87E3658DFC
2146:10861000D0916F336475C42AF4F3E3FCBCFCA2B6BA
2147:10862000AFF8711FFEC2B1515B517FDDF9A20CE2C0
2148:10863000F71315CC37B943F0FF6D886D9FC2F0BCBE
2149:10864000E318F72B166D4A2F2F4B45FDC5EA3D2E3B
2150:10865000D44BCC2F38638E872F15BF4BD6B8CBF6B3
2151:10866000FED81749AE96DAE42A2AFCC6EF1A7275CC
2152:108670002D5C2BFC3687399F6D865CB515ED920B12
2153:10868000A7781CB2F7984CFCE83D24F1FC278C0736
2154:108690004F4679E87199F3D8CEA3FCA5B9DFA0EFD6
2155:1086A000FBD3BF99743FABD2F4CCAFC7ED64CFF32B
2156:1086B000CFBC5EF1632CFFF09F47FC1AFAD79F7680
2157:1086C000FCCFB49F7DE1B89BE0B870FC6723EEC798
2158:1086D000F2B36EBAAFE6C2436E9EFF79DC47F7D6BF
2159:1086E0005E18CEF38556FFE44FE3E8BE3EBCC99D5D
2160:1086F000F1ED353FF7C77A8FFDDB6F317FB8F79823
2161:108700003B8478341FCFA6FDADE667BD14A7B9F052
2162:10871000933F4D32E7335D293E2BC47D88177CD0D3
2163:108720008079CA1772F9BE41F38F27EFC37344CB28
2164:108730008F9C70E17ECCB49FFEFB38D43B170E7348
2165:108740007BE27D677237EEB3FECE7FFB3A27C677BA
2166:1087500071BD1E06D09AA3DF88F7E1F4A70BA7C36B
2167:10876000054607C48BD1A511F565267AFCEFBF5BE2
2168:108770007A7C301FC76F3AF6599A3729BA481A7F60
2169:10878000EFD3F16813C39FBF3FFEA771681FFDA120
2170:10879000AB8DD6F981F02ECAF97F0D6F293118BC47
2171:1087A0006BFE6EF1E6F27FDC1FE2797FB679D05F77
2172:1087B000CE7F782F95BFE70B13BC839CFF0D7FB74F
2173:1087C000F87F42BE1F667CF70FCCF7FF92C3F78598
2174:1087D000FFFEF01E88EF2F0ABEFB02988770E1278C
2175:1087E000FF4EF17503FF81F0DEFE7F29DE863DB48A
2176:1087F000C1118E9795621E76A23BC4E05C53392767
2177:108800008E612959E45DDBE17A2187FB17B2C4E36D
2178:1088100036309CC78F40F81B7DBF03A9F2F3558A01
2179:10882000BA96DF47A684E97EBD0D572F0C536E071D
2180:1088300054BF16C572C914FA7D5BBBDFD52E8126E5
2181:1088400031FB4FB9FA0BA7D0FE77563A12EE71F40E
2182:108850007C139FEB44DCCB197059FC0DD5E62778CF
2183:1088600043D6EF6ED19F07AAE3F8FBDD1E5509E85A
2184:108870006C7CB5364EF8606E67DCB46F88BF8F9D38
2185:1088800030F9637BF107024DF6E4E5D2EF4F39DCB6
2186:10889000FF94A5EA6ECC8B85AB1CFC7E73E0E78A67
2187:1088A00037948475BA8F59F897297AAEED463A2AEB
2188:1088B000C0FC438E1FF99520FC494574A1543A34FD
2189:1088C000AFB59EF09706E40FE7C78826C19F9516BF
2190:1088D0007E18F44FC3170B3F0CFA5E2E5FECFCB012
2191:1088E000D3FDE7393C3E67E793251FA480FB2509AC
2192:1088F0006620FFECD03E8A8BBCF78F6FDE84F59745
2193:10890000FD5806FCDDC4F70FF92081F357D15DE86F
2194:10891000672D3D22535CF8FF002820961900800047
2195:10892000000000001F8B080000000000000BED7D20
2196:108930007B7C54D5B5F03E73CE4C6692C964F29AF6
2197:10894000CCE4C524811834E0244040419D104010FF
2198:10895000EE754011B451470810CC13A4BDB4D51F17
2199:1089600003C1343C6C43E5A5453A202AAD5803A623
2200:108970005E50D4411E62AB6DB4DC5BB46883A280F0
2201:10898000F24869F5C3FB79CBB7D6DA7B67CE994C51
2202:1089900040FBF577BF7FBEFC73B2CFD967EFB5D789
2203:1089A0007BADBDCE9E4B97E0EF26C62E892B632D67
2204:1089B0008C653256F77C3263198CDDBF2B213CA5C8
2205:1089C00000AE2F7E3C940D61ECDCB29E4339703FCB
2206:1089D000F44BC5F714760F750FBD0DEEDFAFB17B0D
2207:1089E00003A5D171E435CD69626C046367F624CDCB
2208:1089F0000CDB1953B6EFBB87C6ED98614E50A2FD54
2209:108A00006C4E33CD0BFDFCF83CF40B253C48E93BA8
2210:108A10001E634BF978BF50387CBBCD611BC2B77D5C
2211:108A20008B250870346DFF8BC50F70543DFF9CA3E0
2212:108A30001BE66BDAADB24809A3BF4B0C9FAB918428
2213:108A4000A1743D8E57C6FC76A582B146FCD70BD7E4
2214:108A5000CE8629CC01D78E557F511DF8BEF9A36E65
2215:108A60006BF4FDBAE75F793104A8A97BE119871798
2216:108A7000AE9F753DE560A534DE7D9614C634BB66B9
2217:108A8000E88FE35E4CEB3B0ECCCB980BEEF35BAC8C
2218:108A9000A963059FAFF35F4E32848FC138126E58C1
2219:108AA000DF67F88F87B151CEE48C4FAF81FF47B2BB
2220:108AB000919754B86E4F67ECBABE788AE22BC4E93E
2221:108AC000F9DC179B43809F33BB3EDF8CF0D7FFFD63
2222:108AD000AF9B7F08F863AFDA9C4FC1BA9B7EF91F4A
2223:108AE0000EA4AF7C6F9A53A1F7CEE5B19007FA9D23
2224:108AF0007B2F211C825BE75E3999EF85F59EDBF9C0
2225:108B000095CB0BFD17BD323E0BD7BFE8D75559CCDF
2226:108B1000DE3F1CE79630164ED0C315263A7A77C34F
2227:108B2000A059D0DC2BAE31F4D8DFB93F1FE13C7B3C
2228:108B300034C1978078827B8BCB913E40A7A1BCFD4E
2229:108B400020E0B771C78FFEA20E8D87E7508EC98DCA
2230:108B500074FD7802C2C9582487B911BF3DAD4E7B60
2231:108B6000DFFEBDF43A02F4BCF61BD06DC70A3E6FBF
2232:108B700007D0CDD1976E67F11FA04F13D22D294A90
2233:108B8000B72F58F0E79E226877A6135DE3E12BF23A
2234:108B90000DF055ABF0F16F70FA7FE044F9D995D440
2235:108BA0004BAF2948AFE7BEC86740EF53E69E7BD87E
2236:108BB00070C67A5E49706E85FBF7BFF24792937379
2237:108BC000BF7EC78274843FBB02EB3AC77AFFBA709C
2238:108BD0009D8D8A58E7B6E44882238AF7C6F0D48987
2239:108BE0005E07DD3F4EF7C39C7F117F39489FF0BE83
2240:108BF000DB9538F4E87016D23A583893D6DDB0EDEC
2241:108C00004F16E41B4927A48F320AE9757C02DE97D0
2242:108C10007492EB8E1DCF897818A9A3DB362E877D41
2243:108C2000E9DA636145F1E805F0E27B082FB4CF6D26
2244:108C300049D094147E3F17D671CECC6676201C6145
2245:108C4000E58FF1E8CBD8325ACFB3B17229D6772568
2246:108C5000B9BC12DCFF285E9E703A697C899F335F45
2247:108C6000C7D7CF8750CE01FEDDF6E041E41FC6AC8A
2248:108C7000E11330CEBD4C61294551BC4978CF688C99
2249:108C8000F4EE995FAAE110ACBFB5633FE9D958F99A
2250:108C90008675F93BE2CCF747315FE3EE7D43510F38
2251:108CA0009D797D0FF15FE38EE396108C7368FB0B6B
2252:108CB00096EED228BFA3FE0EEBF4F7995FED1B4AA8
2253:108CC000FA16C78FA36F4E88F19BF61AC76FDAF1B9
2254:108CD00017C3F875A10E8BD37EE5793ED3FC3370B4
2255:108CE000BD9F759919EABFCF3AD489E138F3BE29FF
2256:108CF000EC97C453EB3B16B263C3DF4D0C27009EC9
2257:108D000016BD33F14F291978B57801B5AC7329E751
2258:108D1000ABCE87FC394897CE77EE52D19EBC88788F
2259:108D2000BC2A3A6EC591E6AA6490DB8A6381E1C8E9
2260:108D300056B1FA60E45193016E98270BF5F372185F
2261:108D4000C70BE330CDE70EC0B8AA63C244844775B1
2262:108D50009A9CB6B876958F67B6075810E03283DDD7
2263:108D6000F6EAF8C93DCD3194A5E0F23C26D40B0BD0
2264:108D700081BD503FBB2DAC4403F89829D1F7148C2A
2265:108D8000BB70B0BFEC20B417CE71FB42F0DC731B9C
2266:108D90007FEFACD31E325D8BEDFC30CA51D24595CE
2267:108DA0007941F59D51DE9ACB40252409BECAE94898
2268:108DB000223B93A4793754433BA956F30146D92764
2269:108DC000F6605E6A26BE67A1F73CA98AF629AEDB8B
2270:108DD000C11C286F727CD94F8ECBB4C8505C3FB396
2271:108DE000328D815DC9651C6E55ACA7887529C8DFB9
2272:108DF0002D531D5BB1BD29B996EC7F3EEBD9E7073A
2273:108E0000BA3DE9987018F518FC6BC27E79CD46FB27
2274:108E10003E60B1B15D10D262E4D76B0A00FF15B5B8
2275:108E200019EF6754552E18E063EC9ED4CE891AE8EA
2276:108E3000EF8C19953B7300A79357BECBDBCF5496AD
2277:108E400079A0FD1F6B1A2669A047327E5F59960FE5
2278:108E5000ED0B69DF9F44CFEB0049D783EA5F3374A2
2279:108E600052A8342AB79900668A4AF27C23E2E16C60
2280:108E7000E04C2B3E6D98FEA5051EE15F00F190379A
2281:108E80008AE321D77E6C2783FE034CDD4B912F7F35
2282:108E9000FECAFF4AC57E5EE6A4F53AD972E7A75638
2283:108EA0005C3C1B7569D8E5F499C63E957CA846E5FF
2284:108EB00020C515BC3515F8AA7556C98609A86BEBEF
2285:108EC0007DC45F30B393ECA1ECEFCC20FAD408FA68
2286:108ED000209C56E0B339BC0BAB65ED420F8D73E2BD
2287:108EE0003C4AA85EBD74CDB7876796E49B64968CB8
2288:108EF000F7B57A2FC1D595E99F83F8FA2A334857F9
2289:108F000079DF3D6BA63708F8BD3135300FD7E199D1
2290:108F10007B311FE19F92CA68BCAA79763FDAD50BF4
2291:108F20007B41FDC5912B79DDBA84F9B441FD3F9FAA
2292:108F30009616FC2E8E5FF89A77D76118EFDA1A8BA7
2293:108F4000CF06535CBB78B84F4B677C41E87708BAD3
2294:108F5000B991962877DF636194BBF3098ADF0FED3F
2295:108F6000F30F38492FE7D64C398CF6EC7C52414749
2296:108F700004EFFFD04BF2081E8082F290B7372562D3
2297:108F800073103F7F19C3CF5F1AF9D738EFF94BDE63
2298:108F9000DDDD349E538C070E113CCF13743AAF7253
2299:108FA000BFFCFC122FC101EEE33EB4B7DF74BEB5C7
2300:108FB000A9C24F12F479C8E65F87F400FC6FD0E3D2
2301:108FC000FF67FDD37133F6033AD235968E73ADCD7C
2302:108FD000F9A817EE0F744C008DCD4ECEFD5E053214
2303:108FE000F7D4D4E036EC5F3FB3EB9099A0692E46FE
2304:108FF000B9ED4B6785F4B96BEF7D4BCDD06E423A3E
2305:1090000079FBD2F3DAC56544371D7D3B70FC6BF705
2306:10901000FEC584F04BBA6E50B81D887DFFE55445FF
2307:10902000CC5BBFD40CF8BCB0DB42FE6F6CBF83A935
2308:109030005EEA27DB43AD153E0DE434CBC482F1C6B6
2309:109040003DD8675CAB2F210EFCBDE339F97880FF7A
2310:1090500037F4F8FF6DFFF8FF9DC0FFEFBE25FE8FD0
2311:10906000209DFBC3BFF4BBEB847EA863ABC9DFFCD0
2312:10907000C43FCD3510E69FA0DA491EE63FA5921CFD
2313:1090800042FF291E57549FCCBFAE791FAE77FE1307
2314:109090000AF16D4D90EBF9CFE74E3984FA7D4EBB66
2315:1090A000D17F9A3B33644138E76D34DE9F1F8E8950
2316:1090B00007994EAF035F9C89F2EF00AE77DC642F17
2317:1090C00055211F55F34A53D05F7AD5ECFD3DF9E3A6
2318:1090D0006FAA6C6B1CFCE7A715903D96EDBC664033
2319:1090E00092CECEB31A9B09F5A51C77DCBCD22CF42A
2320:1090F0006B16267B2F1B870D586CB4EB05A144E63D
2321:10910000D58D5BD49666680F6ACF36F4BF6A63A1CB
2322:10911000E1F9E0F0D586E7D76C2F37B487745C6F40
2323:10912000E87FEDEEB1867659E41643FF6187A71913
2324:10913000DA23BAEE32F41F797496E1F975DDF71B84
2325:109140009E8F3EB5D0D0BEA1E707463FC6C4484F6C
2326:10915000B24485F4E68125A72A4E20C30D57C621C7
2327:109160003EAB46F1BE0716584C4E075E8B4D4EE0A7
2328:109170008FD7E74C213FE0C00297DF4BD70A3FC6AD
2329:109180003F4C1D333C18C7CF1DEF3C5D7142376F1C
2330:1091900095D56CD073E39DC6F6B034113F0CE07CDE
2331:1091A000332ACD285F6AF39488059AD9F30766E1DC
2332:1091B0007C2067A3D3B89CD1F58A72E668AEC0362E
2333:1091C000C859655A1C3963C2DE560A7E82ABDF522B
2334:1091D0008E8C954C76D98F37BD743FA441BC32D666
2335:1091E000EACB3D88EB32F9329009C7CD0C1CE0E3A5
2336:1091F00009FBCC4A4CDFC63E4B39779BBC21B26B96
2337:10920000698CF24B8FCD294E613AFCDE956612FADD
2338:10921000A09DC791CEEDC33489C742FDFD8923B41B
2339:1092200092E87D65DE942C943B773F7AD1E22E1A4A
2340:10923000BC0DF4B1C553405779BF75A66962380EAD
2341:109240007D1BD2789C21FDAEC151BFAB01F17BD615
2342:10925000FDEEFA4180AFC6EA1EF2BBDCA6F605873A
2343:10926000705DBF5179DE0C3C2BD40B73841F3D67BE
2344:10927000D24F171C02FD34E7ED41A49FE43C9B96BE
2345:109280004406EBFD86DC7EE2AAED029ECD4BFC831C
2346:109290006B06115CA41FA49F9E1F6A9880F1CE00EC
2347:1092A000D64C71E37A13AB8D37CE0A314E16921C31
2348:1092B000E175DA494ECECE3DE6D0601D89C9C115B3
2349:1092C000C86FB3AEEDAAE0FE98DF370DF8273F7206
2350:1092D000F77AEC9FEFD65858E93B7F5675B0AD0052
2351:1092E000D6B73CCDE4B353BB47C1FE090F32960E4F
2352:1092F000FD97FF5D257896BF7E1DC3782DC1DECC1E
2353:10930000D0AF95EBDA9FF638E147ED4C223BC8D061
2354:109310002505FC7D57D0FE0B774D17FA1D5FAC3548
2355:10932000D37C5FC01A9D30FE179D6A189DF7436974
2356:10933000891113B4D5B664B2DFF9E88342FFB99D51
2357:10934000C9616F41142FDAC6312C02F62E2197AF76
2358:109350007F799A3D6C2FA075AFC1754B38E5BAF394
2359:10936000FA89432369DCCE327F8981CE1E88C9BA4F
2360:10937000706E0D9C7F18475D6BA638714EAA9DE0FC
2361:109380000C2F090DAE31F75D5FAB7BDAAD77023C98
2362:109390002D4754A6C238DEEE76C2C75CC047D8DB84
2363:1093A00017DF67BD055F9A54823B82FCA86E9C4024
2364:1093B000EB62E8D7C37B0D3F57D8E305C897C18957
2365:1093C00044E76C137BAAA0EF3ADE48E3F9DBC369FC
2366:1093D0004EBA5ADCC55C4EDC03076F83F1DE423DBA
2367:1093E0006565F1FC80DFA7717F9AAEB1FA09EC6088
2368:1093F00008E1B8B051217A9E54C21633A0ACEEF603
2369:1094000066F207A47E52FD2AF91F524F49B8408FD9
2370:10941000BD9FA6B38F6ACA834371DCFEFDB59DFB79
2371:109420002CE8AF3919F96B528FF6E7AFA19F86FC94
2372:1094300027FDB45331EB84F57D2ED6F779BCF5F5D5
2373:10944000D1BF77354B3FE72F6997F133332DF1F5D6
2374:10945000D355E99C0E4D4E0BA3FC14C6CBE83FCC74
2375:109460003785B7621E4A0BDBA6EAF0939D2EFD3CC2
2376:10947000EE6FF4A7F7AE149714AE2A25FD7BA1CBAF
2377:109480009B9206D78C8F95E678E3A88B9F1D8674F8
2378:109490009A6FAB4C4A07389DE9467C3DB6A28FFDDA
2379:1094A0004A4FE7F8A36B1FFCD9017F26839FF86220
2380:1094B000B197F0E749BF8C9F78F6B60F2BD02E9D61
2381:1094C00013786AEC8D7BB99ECE06638579AD06E68E
2382:1094D0007FF244096F5F5268D783F2759BED81413B
2383:1094E000387ED3EE494FEAEDF7D7693C9FC6EC6969
2384:1094F000946F95E3B984DE8738FBC64FBCA4FFBFE9
2385:1095000044FA46E3EDEE0A8CB75A7E7D550AFA67B7
2386:10951000E35EBCD389D70B190309AF675F4CF02317
2387:109520009C67D3401FDBB13DF210E6213E5F7238ED
2388:109530004D4F97B3BF7AA7C20CE39CDDF54E8586ED
2389:10954000F90C91AFE9B54797FE501180F743635985
2390:1095500049B35DC727566E2FD6DA78BE23D3656927
2391:1095600065D7423C92994AEFAF73997E8CF755EBE1
2392:109570001FF24FA09CC5E477D69ABD2D76E03388C4
2393:10958000E57CB84FB070B0DF3307F33B53DD949701
2394:109590006951B81E0DCDE1716846212B2980F1CCAF
2395:1095A0002655C5F77A3CCCB715BA241C688FA0DACB
2396:1095B0004BECEAF023F8C313D3089FA3CF38158CE4
2397:1095C00027643E48ABE2E3F54CB784B7EAF240EEDD
2398:1095D000991AD9C524AD83A19EBE2F338DE097F98A
2399:1095E000A0AA6933039508D7C3268A6740F12AA841
2400:1095F0000F73C43A0A3CBB5648DF4673215B324CBA
2401:10960000FEB055C0FF0301CF0EAFC98FF957476EAB
2402:10961000E4A819FCBB9CE58C7DA4F323932C42DECB
2403:10962000DE5649DE92BFBEC93A13FCA3A4449E573E
2404:1096300075045A17605E1CEF7FA71CE9C2DF27FA8A
2405:10964000A898A662A11400397994715C49BFCE250F
2406:1096500056DF4060E85D4B9C747D7A899BE0FAE9B7
2407:10966000122F5D7FB2A484EEF727A757BA3EB2044B
2408:10967000E6D5F153C648C00AAC37436524CF8F8C7A
2409:10968000A8489915C71F90D7C7971C768D1B241023
2410:1096900008F4C8AE776E59594074462182D5BDBDD5
2411:1096A000C23F86B187CDFE050C586B4DFAD7E3302B
2412:1096B0006FB54A31519EEAA7E96FAC08E5E2D54B98
2413:1096C000744FDAFF1EC37CA76778BB82F2EEA96FE6
2414:1096D000273E18DED5C582E2BE1FDA9E23FCFEC3FC
2415:1096E000368EE7D58C4D4478ED0A0BE0F59C8DFB6A
2416:1096F000839FDAB87E3C2DAE43D2839B518EFFE62A
2417:109700003C5AFC3080672B7D3F1FF73B92F67F452C
2418:10971000F96075A8C58AF2E1D97B9CF6415453B72C
2419:109720008581497EEDD13F537E4DB5040A78FBD744
2420:109730002BB19DE9086C41978D85FE3CE9801BE4C7
2421:1097400006F9E17AC24608E578954DB443C7080F9B
2422:10975000ABCCBCFDDAA37FA275AF3207E6235EB0C7
2423:10976000BD1CC65B95DAE13641DBBEF4BD15876FE3
2424:10977000C0B6ECFFDE8A10BCFF52BAD437010FEA44
2425:109780008FDEB613DA43746D8DB799955FE5FA1ADB
2426:10979000F67F752807F8B571AFD281A079F6AE5182
2427:1097A000709D9EDD6B08DFF407F281CBA03CA935EC
2428:1097B00064C1F79F5E72D8B91CE8ACA5B5B910EFCB
2429:1097C00057B9837E7FBCFC44A6F47FA1BF3ECF1671
2430:1097D00036F774EBFC710FE372C396837E88E35F08
2431:1097E0000CCDAC3C9D01E3AC55822B55D433CF99C5
2432:1097F0009DA8475817D74367C4582C9C4DFE4DBDB4
2433:109800008D37CDCB822B07A39EB85BF361FC5C57F1
2434:10981000D05E89F6BD6E4F816F298BF24B5D6A87F2
2435:10982000AB1CF927D5D86E117997ACD4E6D4D452B5
2436:10983000DC8F58938FFB058DACFD9E1F20BC6FA95C
2437:109840000CFDF4D3FBAE4B190DED0668A3DFD0D0B1
2438:10985000F98E05F9F3D10CAE3F1B3B817F609CD59F
2439:10986000205F7E7064B668CE44D44F4FFB9BAF46FA
2440:1098700017EFEB47FF6B920DE8FB4CA1DF89F47605
2441:109880006798575AC1697CC6E21CCCCAB06D27FEE6
2442:10989000AA2B33713962F6DFF835B1FF09EDE38F9A
2443:1098A0004EBA459FDFF5E0BE0CE0B969933D644ACE
2444:1098B000217BF3BFD1DE366E3485507F99AC5D16C7
2445:1098C000A4AF1BF776893E4EC2DB22A9CF63F4F525
2446:1098D000A24969B7607BD1C385CED065F297B51731
2447:1098E000935858E71F3D9AC1E5B8560BD13E4AED53
2448:1098F00045073DFFE7CD6763E161979BCF4ECFE51D
2449:109900007CF5D1F988AEFBCB7FB37E20D06DD14EF4
2450:10991000B32941C7778B768AFD6A9B3F0BC7C9B4D1
2451:10992000308177F0F701BF5A416F3BA4819C3FD251
2452:109930002BE703568E1B83748B3E67A30C7AC08F74
2453:10994000F1E62389520F5C15BF7F624CFF42D9F6C6
2454:10995000AD1C97DB179ECCC468DB0AFDB5FF4EE853
2455:109960006D237C6B4C31E3A5C9F947D17892AF8E5A
2456:10997000A757FE2634109EA7B65762FD46CF1CE6B9
2457:1099800045BB8CFCEAD3E9FDE3E95CAE6B2F16190D
2458:10999000E81DC57BB1E1FEC9256EC3BEDFBCEA454B
2459:1099A000B43F791CF53C8EC3421457D56ECA616131
2460:1099B0009D3FF5FFE1F847E118DD0F1C37FE0FC3AF
2461:1099C000516090CF281C030DF7FF5138B6DE517C53
2462:1099D0004B017459A784AC8568171E3251DE444D83
2463:1099E0001DE75D8AFB0F0F69E4E7A14B82F51F8538
2464:1099F0001A3BAC95A3FCB4FB31CE67CB78FE08EEE6
2465:109A0000B799CBC90E911F5CB437E13EF4D30A6B12
2466:109A1000FDF3F1CA724B697F43EE0B32910793FB62
2467:109A200019839CAC5203E76D74E67D64A70A03D5E5
2468:109A300075E8CCA9C9C313D13EAE338543385FE87E
2469:109A4000A77CBE4C53B8C38ABAD731D089F62ED37F
2470:109A5000C1F51F5B594AF66FABA9F0EA0500C7C311
2471:109A60004A65E29B88E7D442CAFFE2FD85707FAB7E
2472:109A7000B05B6AAACF89766AABB05B2D42BFCBFBE5
2473:109A8000496981FBD09F3895B1E816EB75A887FC32
2474:109A90006DE9606F4E662C5AE9F6A0BDF1165AC109
2475:109AA000BE9C5CFB00D99BAD4BBDD9CED4687BD0AE
2476:109AB0007F83B5263DF1C04AF45796DB17DE8FFE53
2477:109AC0000E3CFF8D15F4EC336942EF88E785BD7AD3
2478:109AD0000AF412E83175696F3B847AA9B057EF3CFC
2479:109AE000407A67DB6695DA6FC37CE8FFC03A422AAA
2480:109AF000AE7790467EBD0D604984B66D7021ED1342
2481:109B0000C1BA5922FAD783F97399CFB70C32513EB3
2482:109B10001FFB231E6D1EDEDF3295F9705FCB926C4A
2483:109B2000A73844EE0FA8629F2A51D46928CEA91401
2484:109B3000DF5957972FC478CC3AD0B80F6B89A9E773
2485:109B40005063EB3BEC11F2BF4E6788BC7E3A735F0B
2486:109B50002A8ADE07BD5D8E57D79DCB2B11DE85C9C6
2487:109B6000CCA9625E2518A17DCE58BB66053BEAD51F
2488:109B7000C987D5CEFCF1EA090E65723FD67E51A3A6
2489:109B8000F866AD02FE0DDAD164CE67D23F323B25D6
2490:109B9000DF1AEDAEF497CCA97C2D8B268DCDC2F8C3
2491:109BA0005DB5FBADE8E7EC7396535E4065BE5B2B9D
2492:109BB00075FECEF2C824CABF694E3FF9E145224E78
2493:109BC000549D3EA6F7735A9740607915634F56141B
2494:109BD0008F457978DC16B116217DD79928DEDB5FB9
2495:109BE0007E7F48C1FCDB624672FA64856B2CE6D14D
2496:109BF000B7688194BB515E8EC07C5E4E37BE9FDBE2
2497:109C0000A260BEF80B6B2005F5C123C8F73ABC3C37
2498:109C10002FF0F1F70CAE7F1E3673B968057822007D
2499:109C20008776F11ACA6FADC9E4790F4BF538CAFFD0
2500:109C300058001F98DF4B60CD2127AD97E7EB12DC72
2501:109C400026435DA0767128BDFFF70C9321AE6E838D
2502:109C5000757A75FACBC64294AF431C3F15C77F791E
2503:109C60003B93C72356F087BCE49FC4EC73F7F58F92
2504:109C7000C85F91F4E9F55314F04F2E138F3541BCB2
2505:109C8000ACD7F74D5A0FE9DF268887F1FE39A79543
2506:109C9000FC4359F76017FAACD51D6C1F8D7C9EE80C
2507:109CA000188A79008D7510525663DD03EA43B7D6E2
2508:109CB000D3CBFF20F32D36C756ECB75CD44124F943
2509:109CC0008CF293C8DA237E94CF129DDC30C477885F
2510:109CD000C64DF01AEF331664186768EED83A89500B
2511:109CE0006F3D14D5F369EC31DCBF967E6F8EA847CB
2512:109CF0003A9BF421E5D1C0EFAD4CA77D801E8A5B75
2513:109D000064BEE7DBFAC9453806E61116FFB5E20482
2514:109D1000CAD9D40905783F49E37C02AEB896508E83
2515:109D2000E1D584F9A9B0FE3B85FDCB50DBA96EE4FB
2516:109D30003511CFFECD39D3437114E093EA6D127D16
2517:109D4000DD142F0A3F4DEDD58F7F5EE137FA9D215F
2518:109D5000BD9FB76ADD9F572CE7F10AB55F7B3442A0
2519:109D6000FAF3619B6CBF4C6DB073118C97D88B0963
2520:109D70005EE44378DF8FF2C6EE28263F5B2D64D980
2521:109D8000888F710E2BE94DF5C584ADE807435CFC67
2522:109D900052BA6EBFF86CF2D17CF487E38C17328C28
2523:109DA00097FFEDC683F93BB11E473E1FE7D8185118
2524:109DB000F97B5E7C8FE5767D1882F1D7FD3A81AD27
2525:109DC00004143E6E36CABBBC6E15F28CFA465F0FA9
2526:109DD00069A9AEF123534BB94E7027B2888E9FA468
2527:109DE0009C6B1707B3884E4E8A32F9BEAAA6F92992
2528:109DF0008FA45D2CA5E77F4799A6799C579827AD3E
2529:109E00009F798691FEE87F9E0AA15F98D8BFD2A86D
2530:109E1000AE46EA85FEE43C769F2C562FCAABD48B27
2531:109E200059997CFC7D99C6FCEBFD1B3B0E210B7DFB
2532:109E3000660F1EC8A4FAA8630E34E1F5A6C850E464
2533:109E4000E34FFADE6FC4C5BD95CEF3FEC5DB17BC8C
2534:109E50008EECDA9519FC02FDA0DF648AFD4937D843
2535:109E60004315ED1DD88B52CAE77E9181F9DCA077AE
2536:109E7000C37886F27407E573535C81521CBF755A30
2537:109E800005E51C24DCAB96F03A35A967ED5A90F055
2538:109E900065D542FCEA0C820D67EC42A679B2A62099
2539:109EA0003EB91C1D5D7781E4C0A6F989AF6C4E9365
2540:109EB00017FD021BC485A877973A4D7CFFC66DA598
2541:109EC000FC7FAB021122E88D85A98597DD1FB75C69
2542:109ED0007491BD0548DC7ABDFDCF9F2743D807E3C9
2543:109EE0003C9A93FB0D6C3FB7C388848F75FA58FA80
2544:109EF00003B1EFC58E2FF129F16B45BC96923D8CD5
2545:109F0000EB6FD85CC6FDCC2CA96F338F1647E06E83
2546:109F100083D2ED40BF06F4A8CD857A7A488FC3E49A
2547:109F200025FDEBE27E5048F035B3EBF95AE6A9E5A2
2548:109F3000BA24FC0BDF9C63D5EFBFC4C21B6B67ED7B
2549:109F4000A5C6BA059BD758B720BF0B50B500F18DF9
2550:109F5000798CDF8A72B2D459EE443F67B9E6FDA32B
2551:109F60009FEA2DCCE46F83FF6E985F5E1F01F94777
2552:109F700038CA5C26435D8DBC26E33E4A9CF7A6BAF0
2553:109F8000B89E7A64DF9DA487351FDF678AA51F63AB
2554:109F9000EDC42FC9C5CC49F95301AFE30AE3F6C7B5
2555:109FA000473FDE67233F591B650D635D67EC7CAA65
2556:109FB00039E05750EF9631F293D53C3EBF3A885185
2557:109FC0001DB863781A2BD1E1B1D53D8D9E2FCC748D
2558:109FD00032A4B79A6C0AC4E31789A7812E93816FC4
2559:109FE000DC926F3CEF17A31CE8F826108F6F06BABF
2560:109FF000B8BE4238F4F46D751766C5A34F542F727E
2561:10A00000BEBA125FCC4AE27E4EA785EBCD06C411E4
2562:10A01000C44BF5999656CC7F9FB1F2E7CC5FC2FD59
2563:10A02000322BE7B95949F961F4873A357F12FA655D
2564:10A03000B37AF76DFDF4BD47BDCD9F721DDAC777CA
2565:10A04000B8DF7CB2D2DEA6C03827CDFE14C4F7C973
2566:10A0500077546529ED83F3FA39598774D2EC5D752D
2567:10A06000353C9FFD33D5BF941E1BFDC133CC3FEC67
2568:10A070006DF48F77ABB4DF52F0D3FBD421D0BF06A1
2569:10A080001C45E4A75955F610DAE1CEF79B3F447D15
2570:10A09000347B73827719D6B16C1CF625B63F5D9D73
2571:10A0A000EC4DA03C5BA1E2C1FCD79A0227ED9B2CB2
2572:10A0B00066229EBB7D7215E8D05FE2D4327F0D6BC5
2573:10A0C000FE94C9E7A155E3609D5767769AEC00932B
2574:10A0D000B221B4CA0AF47B7869C08DF163876BC67C
2575:10A0E0002A8C1F5D2E7FD74D102F9E70DD3919DB16
2576:10A0F0009D8FCBF1EE5AE507BDFCB22958A0C0F305
2577:10A10000A4AC072653FD6A911CBF959ECFFAF95562
2578:10A110005F1E85F1CB366C9C8C39B78A6AF17EE87C
2579:10A1200009826FCE18D9DE9A543510DE4F62863C14
2580:10A130009A391A8F529EAEB3D7BF7A7A32C69FB37E
2581:10A14000C736576930FEB20D3B569582888C6CAF8E
2582:10A1500074FAA1FDA30DAF4F4E027EEB64FE3A8C64
2583:10A1600077576D3830D97A038C9F6E1C3F4315F9B1
2584:10A17000D8D0E15598C7EB858FBDB7CA3F30DA7F9D
2585:10A18000983B61752837CAFFFF2AF81FF8FD572E44
2586:10A19000DC07B4761FC2145DFEE21E0BAF7B15F523
2587:10A1A00029B9DD4379DD8D689774F33A65D976F383
2588:10A1B00076E7B2F8F6FE2F6E2E779D89F19F7F2805
2589:10A1C000F439C0EDC7FA9594A3CCBF238E3C1D741F
2590:10A1D000D949FE0E82BF674D8BCAD5AD20DBA3B037
2591:10A1E000FEC7CAE194E3C4BE7F4CE82716BA350D1A
2592:10A1F000F9788AE0F3229FC2EB7876278507A1BF22
2593:10A20000C722DA6DB09EED229FB1DDC6EE9D0A53E6
2594:10A21000BB12597027FA9FE9D02EA5F7FD3BEDD16F
2595:10A22000F1DEE2A2CCC61705B6E178E3B33C652DBA
2596:10A2300005D17100EEE5D67203DCDAA8347C1ECAC3
2597:10A240005E50AAC367295F07F009E10BA679F626DD
2598:10A250009097CEAEAB0B57C21256B9BC86B8AFA220
2599:10A260006B1A7D97F29F6EEEFF302F7F3FB38AD738
2600:10A2700085F4EC49A23C05B37615239DE47B1705D4
2601:10A280003EAA7E346503F6ABEF3233AAFFDF59797D
2602:10A29000597FA01EF37A3AFFB15E8B503C578F79FD
2603:10A2A000BD6138DE5B16B463388E57E4AF312F974B
2604:10A2B000D9129FFED21ED65F4C65A1617DF56674F2
2605:10A2C000FC0C7A7EA57545C733C69D7DC7B3887DD6
2606:10A2D0000081774DE0DD121FCE0159824F01DF264C
2607:10A2E0001D7FCD11FC06DA93FC80732F0EDEBAB20F
2608:10A2F000403F2FFFEE06F4F3B337A1BEEC4AA4B8FB
2609:10A30000A542F34FC6FE155D69B4BF20F943F2853F
2610:10A31000A46B675A33E56B7A1E53C80EC6C2552C20
2611:10A32000E1DAA8101C59D541F53E1D7C521E60FC97
2612:10A330004E31FEF051243F4F707900B9B91BE5173B
2613:10A34000F72B711DBEEEA1D386F485FF2768FF466B
2614:10A35000101D39FE7F6D13F51C1C6F7DF19F730579
2615:10A360007AE6D3F38AAED7699DF5FDC8ED5B6E073B
2616:10A37000C1997534E2F042BF4705FF77767CEC184F
2617:10A380008D72B15B658A97AF1BF55685D4C76CEEAD
2618:10A390005B6341FF65F5B6415F7A910EBDFA3362AA
2619:10A3A000B546FBBFE29E3B65393CCB48E0F29AA143
2620:10A3B00082B5298FC2313D8BFB59A382F1FDD27743
2621:10A3C000DDC9F45CE2FBB1C555EC6358DFCF5C7CC2
2622:10A3D000FF7354774841BA48B98ED5538BB2B83C15
2623:10A3E0002EC8FA7FA4A76C57D05336A9A7F8FD83CF
2624:10A3F000101C613F97AB7BA802FE738DC9EFC2387A
2625:10A40000ECC43B3FA0EF38E689BA952158B7827675
2626:10A41000F36880ECCA697CC8EB571EC218704EBB4B
2627:10A42000B17E856DE3DF89C6F255948F42C27F17F6
2628:10A4300070087B706B42F7AF7891B1519E651BE05D
2629:10A440006C3415E99EDBB9DD9274007A2F6769518F
2630:10A4500039FEE8C5AC2DA86F87B9795E31A3C85F16
2631:10A4600086EB9772097655F089E9DE6976AE37A6F4
2632:10A47000C5E1DF27847CCED9C8F9A6F3BFAA26237D
2633:10A48000DE3BDF4D4B5DA6D3134F093B28C7957AC2
2634:10A4900048BE279F3F29F8637B9683DA4FB99245E0
2635:10A4A0009EC714F7BBB9A774F695F8A78DF30FAC48
2636:10A4B00037A4E7EF616EC5605F7BEDAAC0738305CB
2637:10A4C000F00BF8DB6E0E6563DD4E459789C6ABD9A0
2638:10A4D0009D4CF580351D1C8F35EDFB4C753AFCC449
2639:10A4E0008EF71F59DC1FD862E27544074DC06F8894
2640:10A4F000773B87EFDC8B1ED29F8745BF2BDB8D6FB1
2641:10A50000A667B658781D29D097EAF91A5ECAD962AB
2642:10A51000D4D34B05FE832DF81D5BC606E6C35A2B2C
2643:10A52000C0534401B867B885DEB1F82DF8DD6ACFB5
2644:10A53000638CF6F30755FBCBBCD06E0AD8CB15184D
2645:10A54000AFB89DEBE18AB5E0C7A0DC59A55D787393
2646:10A55000877EBE6359C9221EE1FC5CB391E36F1094
2647:10A56000F83FCFE215C6F915F9F11C9E8FD6778C0E
2648:10A57000C6FC937CFFB4A0FF95E0AB40F88647E1B2
2649:10A58000C3F1919F983DB00CC76DFCC3AE1CFDB8E4
2650:10A590005F66717D9BA1CE1A6B433DBF06EC0E49F1
2651:10A5A00067703F7E9750B337D5B992913C9B30EEA0
2652:10A5B00091F3D6883C24C85DC554585A71EF3C923B
2653:10A5C000AEEF3DA75FBFE6E6FEDC3F8BBE9D96206B
2654:10A5D000ADA76727C0EB8DE2A5B3E3BE6536B41324
2655:10A5E00047990FED8484775075B703EB4E9A84FD3D
2656:10A5F00080F59A307EC9F89997B520DEBAC65A30F0
2657:10A600007E8AE56B49A712C6E547C66925B84100B1
2658:10A61000ED3CF750A17F18C5BB1FBDF4CAB32B2971
2659:10A62000BEE27469AAE674AC740767B833A3720813
2660:10A63000FABC02F555CDDA5E7DD4C1EF77E557035C
2661:10A640003EAF754B3937D22523D061C37D0DC9D7B5
2662:10A6500067F70C09AFE474A6F93B3B92C38A82DF2B
2663:10A66000A1362FC5B85BEA0984475F8729E1E9A5D0
2664:10A6700023033A0E89DE1F54CDC76B0279473EAAE9
2665:10A68000579B158F427A80F2AC59A807A09DD5C17F
2666:10A69000FBB1BDFC5C0489A7FA193028C49D7E7704
2667:10A6A00029AD43E22BAB3A62AA875B13AD55FE138B
2668:10A6B0003A7FEDB0D86F40BC4CA37883EBEB7A3592
2669:10A6C000908B712BCB4AA0EF38C10E917E39686315
2670:10A6D0009A0DC67B03AE6897C6AB0BE83B9AF14573
2671:10A6E0000AC931680099F789A03F7DEB4D4924FFE5
2672:10A6F000ECEB0706E23A3393381FC23856318E9599
2673:10A70000ECA0B007BFCF07BF4E89EAE5838A42E3DA
2674:10A710001CBCE19AAD545B28F812C743FFE9A03294
2675:10A720003597EC6567A6282EE2F0F76FCFBAF3F104
2676:10A73000B93E5EC4F82E1A6F96ADBE19786AE4C4AD
2677:10A740008E88C989D2317CCABF01FCE321DEB4C145
2678:10A75000FAEF137C7DB020A43A10AE41B06EB8750C
2679:10A76000283158DA6C8FCEE312F91B97A8DF457FAA
2680:10A7700001AF260FD7FF3FF6707BF181B8BA1CF10D
2681:10A78000F33D1745FF3FDBB99E5E5919FFBBED87CF
2682:10A79000845D9171E7AD62BF03E2CE87DC3CEE14CD
2683:10A7A000F5A77C7F04FC7BC26FD58FAA69DFEF8B96
2684:10A7B000AEE929FC3C04AE0FE688FACF7B1F9AFE77
2685:10A7C00013E4B31358670E78F844F0CB09A7DF8180
2686:10A7D00075520D89F1EB889F14F034083C9C5CC2E3
2687:10A7E000CF2F9883FB72C07FEBDCDCCF9BD77EDB67
2688:10A7F00004A4FBBCB50AEDCBC9FD7F49E7DA4DAA3D
2689:10A8000021BF3E07F7E5D2FF9178AAAC9F786AB8DE
2690:10A81000219E92F3C6C6551F2D711BF60166B51712
2691:10A8200089F32378FFD9CC4770CF6ECB31EC23B2BC
2692:10A83000B6CC6FF4DD3FC651A1B8F0590CF73F5AC2
2693:10A840006265213D1CA70652FDC443EEE0CB6E03BA
2694:10A850001C492C64C8878E71D2F744369E87057FC9
2695:10A860009CC73170DD62277F7D22FAB3BDF930D0FD
2696:10A8700023CE14D44B95FBDD23A2F18394B3FA319C
2697:10A88000F1E38875C20F5AE7E27172CA511957276E
2698:10A890007A513F4ABF3CF6BD777BF9D7E8575E292E
2699:10A8A0000F017C1CD2C749B1E39E72FFA3F177511F
2700:10A8B0003FFC52FC3F127F578C09529E8FB52B54A0
2701:10A8C000D332729C311EFA1AEDFA08BC2619E2A1A5
2702:10A8D0009A6A633FE6E1F69F79920C7E7C7FF8D41A
2703:10A8E000FBF14A11EA413E5EA3E08B82CFDEA57AFE
2704:10A8F000D2311EEE178DC8F62778E0BA5AD493AF3E
2705:10A90000B6F1EFF9B7FCF77EF76CF48FDE36D3FEC5
2706:10A910003FDBCDF9A6F289452D783E80BD4371EA33
2707:10A92000BF5FFD97C58ABF06E43A5DE8BB7A1F5F4B
2708:10A930004FBD2F621968C7FA620E476EC73E45D3F6
2709:10A94000F15D6E2DEF97E7311BF2E205A23DC0E30A
2710:10A950009471CCBE4919D8DFAFA15F90DDA190FD05
2711:10A96000CC6E66E457670F5768FC7F19BE45995D4A
2712:10A970001A5D6F9B696AA913DE6B7325F9D0FE2CF3
2713:10A98000C90E5EE541F88E4522682E471EEBD23097
2714:10A99000DE5A93ED2F413CC8757A556736FAF14976
2715:10A9A000C7387CEDBD79266E7F185B25FCD2ADDC07
2716:10A9B0003F53D961C6FD73B2F3AE65256407E57AEE
2717:10A9C0005C69C28EB85870979DFAB791DF62E57ED8
2718:10A9D000806B5931F9F392AED1B8737039C69D4589
2719:10A9E000AB23DA2C78EFA54DA6B8E7554C10788745
2720:10A9F0007554EAD77125BD25FB99FBC93B4ABE4F6B
2721:10AA00009A183F9E074B48CF2B9FC8B88BE473B969
2722:10AA10008561BE5AE27F4D76E0768427BB638B82E8
2723:10AA2000B8F948D4297C94C8F3F11FAD7C5641FF96
2724:10AA3000F281F9CCA9B2FEE1AE5FACFA6BF4F2BCE4
2725:10AA4000DC427491F14A141E9E8769F070FB7428F1
2726:10AA50003B5083F46EDCBD86E2EAF9DB8E5B2EBBF5
2727:10AA60000FF10DF1A6D4727FBD7EA695EA992A9FBB
2728:10AA7000D088EE75CB2DB46F58BF63277D9FC61E5F
2729:10AA8000643E94FFFA8E9D4A0DCC5BB763A73247B4
2730:10AA900087C79CFA30D56F5F952CF72322E44FC708
2731:10AAA000F237E611D07F3964E3F27FA6D21EC2FDF1
2732:10AAB0008933E6603DF63BE349F2E13EA6C4FB1B69
2733:10AAC0003B6FA6F30292772544F0DA66DAEAB642E3
2734:10AAD000BFB6AB2D3EE4A735D9C1154897342DD06C
2735:10AAE00089EFA76624FB707FC39BC0CAC97E7F43E2
2736:10AAF0003C8C8CE18B910F72797959E817F8A37A25
2737:10AB0000AA273DDC2FC7ED25D45787CC7C1DBB1869
2738:10AB100087D7E4F16F443AB1C369346F767D44C19D
2739:10AB2000FA8BD879A37CE5DFECC9FC3670765850F7
2740:10AB3000CFD7097D53F9C436E5631DDCCF79548244
2741:10AB40002F7BC71605F367F09CF40DF46758EF945C
2742:10AB5000BD83C7AB75F07C8E4EBFC875C4D1339D25
2743:10AB6000089FFD58D701AE67227CBF40C01B4BCF6A
2744:10AB700088C74BF34F007781EE5B4225182F1F2AC1
2745:10AB80004CA4F1A4DCC7CA69C4C3FDCAEC4DDB14F4
2746:10AB9000939DF655C8BF94F0C97E23B2C71EF0102E
2747:10ABA0001EBA080F0D9B345ACF784B60E0029D3CD3
2748:10ABB000BC2BC67B7DC68774AECEDA7F7F87F8B1AB
2749:10ABC00001E26C8A33DADFB14C473B13FA858AFB2A
2750:10ABD0006093B98BC2D68B73A72677723DDCD0B950
2751:10ABE000539B6D8FF269C167AFD379550D1D090C69
2752:10ABF000E32BE0BFA3084F2C9F4AFC483DDB1F3DE1
2753:10AC0000411FF1F829641179BE6001C63F524F9B84
2754:10AC100084FC333BBFFF855857947F829F790C7A21
2755:10AC2000D6467251F059F9EB58EFD9E053E8BC8E93
2756:10AC30008C2A8E4F3D5CFA7830564F623E31C0E32D
2757:10AC4000FBFC69BAEFBA7AF5BD78FF22D29BDB8DA7
2758:10AC500008BFCF0AD17E4BF863E937309BFB6571A3
2759:10AC6000F84CC91ED1D79E493B5FB0799786DFE586
2760:10AC700048FE998C74D7F18F33DB42E33AB33582C7
2761:10AC8000677D25DF8F5C6FE6766CFD522BD567BE46
2762:10AC90007127AF174BBECB12C1EB41D3AC7A7C7E90
2763:10ACA000309BC3D1665A46DFA9815CA66613FF3884
2764:10ACB00018D78F5C1FAE7D81EBB3FA909DE2DFFA6F
2765:10ACC000E0ED35540F9061F3611D2D0B1EB04C4F1C
2766:10ACD000EECB57DE5DFB2C08FFE40E2E7F920EA01C
2767:10ACE0004F89BFA43C48BC46F11936C893A487A934
2768:10ACF000D79F0816707F89C75BA5E23BC25AABFF9E
2769:10AD000090D98B710CCFCB968AEF09655E7696A0B1
2770:10AD1000CB667BC087EBEC9397FD86F142DDE2DFEB
2771:10AD2000527C76BFFB4DBA4AB985B8D620DF3709C9
2772:10AD3000BA176773FB3E219BF34DDDF00E92CBBA41
2773:10AD400013CD24CFF6895CAFD98FC5F88FEC11A154
2774:10AD50008757D37BE3933A26E0BEF2F89F2B4E8CC5
2775:10AD6000F7FB83731E7E8F8571DFA6FD8EFB10BF00
2776:10AD70005F43D4A1FB5E67463697AF33DB01E1C486
2777:10AD8000EFCD96CBF9E3571A8F458E28741E88C0F5
2778:10AD9000E5991D55D77D82FB40DB537CF8DDFDE74F
2779:10ADA0003B6EFBFE2700F7996D37F9D04FC8680955
2780:10ADB00010FFF464DA7C5B799E7622E6B19676EC3D
2781:10ADC00077E0F73DA79FBDB61CF576A380F3B317D8
2782:10ADD000D4C5889765CF3C7F233EAF0B2BE9E8BFF6
2783:10ADE0009ED9FEF3BF67C338B5DB9AF0A431D6F223
2784:10ADF000EC6B141798C25BF8FDED29E4E79E7E72B8
2785:10AE0000CD8D88EF968E167AFED9935BA8FDFA3326
2786:10AE1000CFBFFA5FD0AF3EE0A0EF9E3F7B611FD176
2787:10AE2000A53EA8517D7A7F7CBD7EE73EAE2FD1CE78
2788:10AE3000A31CCCE47A4CF2B5E4DFD3CFDC7B9DDEFF
2789:10AE40006EC8FB6D229FD396C8EDC8E7426EEBC675
2790:10AE5000DADBF0FAF973363A9FB3D1D25D8C717EAA
2791:10AE60007D29E78B07053EEA3B16981BEDF43E8DE6
2792:10AE7000F39F20EF781D02FC897560D06BDB25AA5B
2793:10AE800067FA15F5877EA330DF33A3FA38FFBEB328
2794:10AE9000B4D95C47703ECB9FC3AAF5CF2B16C58FA4
2795:10AEA0002FD767DB0DE7AA65774ECDF5921E48F0E8
2796:10AEB0000DD2F9BFD9B5C19664B87FCBA2A00FBFA0
2797:10AEC0008F7FE9D4BB13F03B86674A9461447F557A
2798:10AED000E1762E64A7791A701F09E28FED424E20A9
2799:10AEE0007CCDB81ED6335E6319F889EF78C68E988C
2800:10AEF000492F3C45E3839F43FE9BF7B5194FA1DFE4
2801:10AF0000B3DE1CF48CC071DA847DDCC6E187F79D6A
2802:10AF1000F6721ACF793DF7D717E27BE7974EC94013
2803:10AF2000FF1EC6ED32EBE231E0C87CB48F38DE7034
2804:10AF3000C4D3C4D04CB2535E0BAD4F9EFB09EB1F84
2805:10AF40007AF790A87CC6E69B503F617EF85076E584
2806:10AF5000BEECCCE8D5D54FBEC69C03CFD19EE5F85C
2807:10AF6000E9FA4DCF117D7DC6396EE75F3E4E7CDB41
2808:10AF7000887C8BF3074F18ECBCAC7759BFE738F1EE
2809:10AF80006DCD6EAE8F1B77575A30DEFA7C899F7D70
2810:10AF90000C8E6EA3E0BFF54AF75CFA4E6C8F8DBE47
2811:10AFA000FF3B27F9B3FDF8A7A87F0A777B289F709E
2812:10AFB0006E0FE7D3832613E5010E6EBD664B8BD271
2813:10AFC000D7AE82BF4D72D2D8CC84BFBDE85DF4CF7E
2814:10AFD0001A6A793D7A630C1F156CFEA815F92515C0
2815:10AFE000BC63ACB3017F66027D3F59CF46A09C662F
2816:10AFF0008FF3EFC9A17D421E9F67D7823E81F62D58
2817:10B0000019F37D78E455EA38F08B91FF326EF061E8
2818:10B01000DE6C7D5E472BFACFA1F18CCE575D6F6E53
2819:10B020001F8B71F0FAF15E276012F0B68DFC6B5643
2820:10B030006211F6AC86FCF246F7777C94D78E95FFCA
2821:10B040003D4BC9BF6BF426FAF0BCDBC9BB9585DC70
2822:10B050009FB13384BF11F08BEDC9E1D16184E7ACBE
2823:10B06000C09FC4E33973179DBB7BEED709748EE193
2824:10B07000E4719C5F53C77590FE7863CFCD64AF25B4
2825:10B080005F26BF9840763B4D732A98E760ECB60484
2826:10B090008467B680A75DD4EBA60A3B52B49AFB71D5
2827:10B0A00029395C9E52724CE26A117C2ECF6509519F
2828:10B0B000DEE1ACA03FB189EE5CA7869A08C953FDDA
2829:10B0C0000E3E5E4682BFEC011DFF4AFF4AEECBE218
2830:10B0D0003EEDD438FC3D42C051B07921D17D76ADF2
2831:10B0E00038F76135F72B18F005E20DE8487C704B16
2832:10B0F000C63CA2DBECD5CA5D44C75005E53FA57F41
2833:10B10000163BFE75627DDB6D81E158EFD79399ECBC
2834:10B11000C33A82EDA97E13ED2394A5521E24339DDC
2835:10B12000FB8B99C25F8CCA7D60B809E639E54AE6B7
2836:10B13000F40EFF5EC3FCF6F81CAFF4FF0C7E5EDF7E
2837:10B14000389F8F37A53D3414E31EB9CF2CF1115E23
2838:10B150009A3853AF4F6F12F8080F6633516F403C67
2839:10B1600061A73CBC13E6C17CC2D6D14FF27C023F42
2840:10B17000FFB92487FB3DE3D303C3D14FCB2C0A2C6B
2841:10B18000E2F693AF33161F87B2651C704F19C6B134
2842:10B190008DB7DB7D28776B5F5666115F87AC7828AB
2843:10B1A00010F03D97437098A8BE8D0535A247637394
2844:10B1B000201C9FEFA7929C3582DF8771C064E4F367
2845:10B1C0000CE2FB30E77B6EFF64BE01F5A4DEDF9688
2846:10B1D000FA40EA19B46FC8CF522E1A6FEC2E46FA15
2847:10B1E0007E53BD72CECCE5FC1CE001E548CA4DF2B1
2848:10B1F0004B5C5E562EF556E2F39520F77A7AC7C679
2849:10B20000670827C62B52BF2FC90E3C90837907537E
2850:10B21000A495BE4115FAB8F1A515C5F1BE2392FA61
2851:10B22000D82ACECDB48693C2FAFD12ACC1482EA75F
2852:10B230006B08ED51D2E2F8F998D61C695FFBD4AFE8
2853:10B24000B5223CB1F56B2EB45D283F5B93E87B36AD
2854:10B25000999F8A1D77B1E037491719A7E0BE07F615
2855:10B26000DF9AC3F9659DE8F76C8E22E4226CE07FDB
2856:10B27000AF29781CEB0FFAB363F2BD7F56BE4CCEFC
2857:10B2800023ED692CFDE5BE0DAE676A69FFFDDAF7B7
2858:10B29000893830861F77093969CE61B4EE7673E458
2859:10B2A0000B92AB05C98CEA7E36327F3AEE07BE7A46
2860:10B2B0001597077F4F318E3F342FE8C81D11CD0BF6
2861:10B2C000E37D8C4FEA34164A009AD46D3787F5DF58
2862:10B2D000D33C95CBC73F9F6C0DA9C0E7FEBCE0BE39
2863:10B2E0009C11743E087D3717FA818DF6B1C0911E0E
2864:10B2F00081FAA589753B10CF8D6A5731E631AB5D78
2865:10B30000C14348FF8F4C5DF9BCFE83EFB31D137939
2866:10B31000DF6322EFDB6989E4FD5B46F41CBB0B8C29
2867:10B32000D75F5DE832A5611CF8C1EE3F3CF732BC47
2868:10B330007DF7CB67EFFE21626B65D23D3F836BB536
2869:10B34000550D68BAFCDCB1E4F87AF6CF82BEBDF5E3
2870:10B35000514B13E2E6FD9FCFE5FD9A62F6B59FCF14
2871:10B36000E5FA34FA7D14DFD7FEA09FF3AFAA72B9D5
2872:10B370005EEF14755BB1CF278A79B69B59F146848D
2873:10B38000674B32D503308D9F5B56FB68810FF7F119
2874:10B390003B0BF939F93DEB14B203C7CC5CFFC0DFBE
2875:10B3A000EDD68AA81D453705FDC45A67286202FDFF
2876:10B3B00051BB283982E765C27D6D0CCA5AC849F570
2877:10B3C000C3B3847D9CDDFCC65798F7A8D598750C4F
2878:10B3D000BC77D25EE340F330F7BB0FE051342CABC7
2879:10B3E000BA5DD4998A73D8FC53D44B4997F3EB8C4C
2880:10B3F000DF97BC901B30E7C2FAAB5338BEAB1FE0FF
2881:10B40000E7F1CAFEBB85DD8BE5B7EDC8AB00EF8782
2882:10B410000AB72FB1F364E78DED40FEAB76079CC809
2883:10B42000C7D50F9C35E8B5734AF7D33F43BE5C9050
2884:10B430002CCE4763F9FA3AA521B95C6EEA70DF0CAD
2885:10B4400054E3F9B2AEE2C505C8FF3DF97FC4BCDBE9
2886:10B45000DE04AA73AEC3FD33DD7E777FFB67FDEFAD
2887:10B460009B792DC8E78D1715E293597BDF388A7ACF
2888:10B47000BD51EB26FE9965B5137D1A2F6AF49CB574
2889:10B4800099CFE8BF975BE4F65F83EB0BFD684C2A2E
2890:10B49000EDBF65C17DC273099DB7B150D49767E711
2891:10B4A00005CB11CF1B921CF7627C78C1CACF576ABB
2892:10B4B000B2F03A7226BE43967CC272938D7CB0F78E
2893:10B4C000CDAF10AE1A6B90CEA99C3313E26915E98B
2894:10B4D0001619E12CD5D37FCCB73A27D7857A03E06C
2895:10B4E000FFC0C2EB88FAF23FA7C3F342BF7C90CD06
2896:10B4F000E5E8837C56BB0BAF57C315DEFBA050B409
2897:10B50000CB793B769C7A21471F0CE5F62BB430298A
2898:10B51000EEF920F708797C21D77F07E255DE7F52CC
2899:10B52000C0919DE7BF13F108FAF16EE2AB14164922
2900:10B5300085F1AA5FE3BF57C096F7501D6BEFBA8A3B
2901:10B5400005BCAEF8702D8D8E5B83E3413F3FF9F172
2902:10B55000AFDAE83B383605F435EAE785790CF533A0
2903:10B56000CC5B8FF3C3B89154EA9740EB606DA0B702
2904:10B57000817FCF8FF0125D5656029F0E17E7EF7B4B
2905:10B58000A37C25F929968FBE9FABF4B7BFFF7D84BE
2906:10B590002B767F9FB181446FE2B76FF13DD9E8749C
2907:10B5A0008E1790FB965CB2BF91217AB9937896FA88
2908:10B5B000F28344235F240A3AAE12FD7AF12CCEB313
2909:10B5C000CA28E27650C60B3F13EB72C45CA55D8BB4
2910:10B5D000DD1F7008FA3B7279FD14D06503C229EDB6
2911:10B5E000611F7A6FE2F4867E9B488F25F4DC930E10
2912:10B5F000F6EC0EF093F03C4B78CF85EFF5C95B8C01
2913:10B60000E376B8696132433FE1E95C51F73DBC87BD
2914:10B61000EFDF95F4903E9AC540EF2857A61FE60845
2915:10B620003CA00F9FC7FA118043C17AA43452035E35
2916:10B630001C0FF0BD3337338AEFD8F98EE123F00BBE
2917:10B640005FCE15DFD995B132A4D73DEFFC35F96E49
2918:10B650002F9E77CEBFEFFDC41E7C0DC739F3FD379B
2919:10B66000290E38668914B7DBE33CB744366F50A225
2920:10B67000CFEFFD851AC2DFB7E8EC3AB36E06F0E50E
2921:10B68000AC2ED58753CE7AF08BB747A27FDD65A667
2922:10B690007D28F02F56E3799FC7445D216B36E6097C
2923:10B6A000FE24E82EBF3396FA49FA09F3998FEBA5E9
2924:10B6B000447EBEFA470BE6D177C6352C7008CF57CB
2925:10B6C0003FBD7012F9CFF35890CEF79EDD663C5F18
2926:10B6D00037F65CDED8F37831A18FF88A3D97F7F31F
2927:10B6E000EFC5AF9BE9CDBB57C5F737B43CCECF9F75
2928:10B6F000F753AFFE37C1AFB2BEA049D617BC72F93F
2929:10B70000FA82A698FA82A83F22EB0BBEE6F505AFB7
2930:10B7100018EB0B3E1F1B1F8EAF7BFD9DA47EC675D5
2931:10B72000D0FDCF0B2FBFCE263C6727EE77E476BA4D
2932:10B73000DF5F7D43A6C4533FF51DA9791C4F4D170C
2933:10B740003D067B9C99E78DF1C772E979534C9D4486
2934:10B75000F439AF8F90F903A02BD5E3493F30F6FBC6
2935:10B760007A99DF97F2F3B1C2AC1ECAB7AD11FAD421
2936:10B770003714FDE68FD11F43F9BDD9FB6A37803AF4
2937:10B78000FB87D7156B8551F98A5D0FF0E567FAEFF6
2938:10B79000D807E789F3207CCC47DF390AB9B8E7FB43
2939:10B7A000E353707FF6CF0F5619BE5FEBFDBEDD226F
2940:10B7B000FD40BBC19EB3187B3F7BF79BE4E7D558A8
2941:10B7C00003F41DDD27AF7C9FECFC5C1670A19C9CF4
2942:10B7D0007FE5AAFCE0FF859D97F0DC16BACFCCFD93
2943:10B7E000FB0CF24FA609786EDBCBFD4C93D56FA610
2944:10B7F00079FCCCEB745108CFE105658BE7E8DDD02F
2945:10B800000B7F299DBF3146C0AFE0FB80DF1BC49595
2946:10B81000CD0ABA116E792E00709D1BAF2DD7F9BCE1
2947:10B8200078BD4909684CF7BDE804D69C8BFD4DD620
2948:10B830006E559C5746E7CC2744F145ED64D15E7EBA
2949:10B84000FB857BE6E07D3B3FAFD822E0B83F4F7CF5
2950:10B85000076D65565C77823D729AF60FC535349652
2951:10B86000FBEDA1425E979C88E721C0BC76FBD91016
2952:10B870002ED6C99CF49DBFCD792182F18BEE77261F
2953:10B880001AF346E87E678245785EABBFE731BF4377
2954:10B890009126E06B117AD283E71516D1B90CA42753
2955:10B8A0007F9A3C97CE27CFB42FA27DEDC71C13699A
2956:10B8B000DFD38588C77AFB89BA7315E07966C078CB
2957:10B8C0009E42D64C63DB1334B6ADEC18D587299174
2958:10B8D00080FB527AF4DC48B3D037B72772B86E4F8A
2959:10B8E000E471DE237926833F1290BF0F93C6CF5DAC
2960:10B8F00038E7B25AB14E03FC9347F2B87FF22150B9
2961:10B900001AE249FEFB316537F907AD1B8EBF8BA2EA
2962:10B91000FA96019D5A93BD4B35F4FBEE14BF23A656
2963:10B920007550FDC3967B527D58AFD36A735662BE85
2964:10B930003494C7F3444DE2BB0FA048DD0E786FCBC3
2965:10B94000B41CEA9751D54379D69E158CFCAA3E7C4F
2966:10B95000FA35F03FE0FB496CE3791035BE2EFC0E62
2967:10B96000D8E357A96E593EDF86CF014E45F005DE7C
2968:10B97000BFA922FA3B4F457BCBF6E379962CA8F87A
2969:10B9800078DAD24BFC3E5DF8F34D7B2B6F1D0170D6
2970:10B9900015750D23361EB857ECD3642488FD667EDA
2971:10B9A0009E6F6CFF81D81FDA4987BDDFA9C7472684
2972:10B9B00088CFF1BDB149B4EE23224FC5847E18195A
2973:10B9C000237FA3A3F240CFCB44BB49D417E2191481
2974:10B9D000FE0A9E06A17E195C3E7C4CFE71B9BD9E9E
2975:10B9E00045FF709CAAE8B8A4A7C6451F47E5109676
2976:10B9F000586EF5B5D443BF8353F9BEFC482DB20F42
2977:10BA0000E57DB4B896892B9BD54EF85DB934F2BA72
2978:10BA1000B90053320115DB15CE152D38CE0D4A84F1
2979:10BA2000AEF933D7B4209B5D9D5F24F241C1F1286C
2980:10BA30009FADE3F9F7D22DA37C3E273C9A3193E7E3
2981:10BA400071A7CFB4521DF6748D9FEFC4B460C11DB1
2982:10BA500020677754F3FC31B6AB75F919B95F7204FE
2983:10BA6000E29B9D71FC83ABF3B95D93EF3789BA21FB
2984:10BA7000F9BC389FE7CBECF9134EE771F8685FF833
2985:10BA80007C9EF0D34A5849CCEFD1FC350FFDAFCAAC
2986:10BA9000DFF6A7278CCF859E98EE7FD44CFEBDD0D5
2987:10BAA00017522F07443D54973897E5BDB11CEFEF6F
2988:10BAB00056CE277D713B6B267D7E070B9911BFBD4E
2989:10BAC000FA7FA2CE3F8279A6078CFED28C99B17EF6
2990:10BAD00015E75739EF9D41E3F369D2EF9D68F47B99
2991:10BAE000ABFFEDEB54B28B594F375C1A10AD7B6A4C
2992:10BAF0008AA97B6A14754F4DBB171CCCD4D53D3534
2993:10BB0000EDE5754F8DBBAF54F7D443FB4F47CCE108
2994:10BB10007DB82F73643E8804C0B95FD4C91CC03A95
2995:10BB200099F2285F264FE3F959605FDA67C97526F5
2996:10BB3000F9909FDA4CE594CF6D7324FBF4F9D3951B
2997:10BB40004B81EF74795C59E774A49FB8B83C9FFBB4
2998:10BB5000C1EB159E4F0FDD69A53830B32860D8BF03
2999:10BB6000C854D951CC4B9E167ED07A912FC1FDBFBF
3000:10BB700061700D2BDCBFE97D1FBF9FC23C668C3E10
3001:10BB8000CA4CF7D1FE4166CA10DA0798B9B76C1BE8
3002:10BB9000E91BBBCD87DF07C8F16706B768587FD4BC
3003:10BBA000B4778B56638FF2DDF87CC1AF492C09F96D
3004:10BBB000B5372FB82B81F2829FD80393F2E1FD7A3B
3005:10BBC0004B642833F233DDEFCFAECD13FC621E1B86
3006:10BBD000B8730EC073FE6D0BCF8F3DC8485E5FD843
3007:10BBE000934A794D6D1A23FBB2BC92F1DF8BD9A237
3008:10BBF000903F7732959F43B47C2A233B782E6D0289
3009:10BC0000D16F3E0B1FC273866A37990DE709DDBFFE
3010:10BC1000CDD8AE671D646FEA77F4E167D25B523F1F
3011:10BC20003630AF8A7AA8B1D3F83E1B68D48F65C28C
3012:10BC30001E0C9B3EAE05EB3C8699B8DE620FFA7295
3013:10BC4000A651DC5DCDED287B9ACEAF3A9F7C4AE5CC
3014:10BC500072CEF5F188A8D634D8A511C2BFBA51E387
3015:10BC6000BFB320FDA511E277170E98F6AAF41B3F8B
3016:10BC7000029EE1E23DE9A7497D2DE952390A7F3371
3017:10BC800002E2F07CE1EF14B242A42B8C4FF2A060F0
3018:10BC9000A0C48F4CA6DF6F182DE603BAF3F3EB4C6C
3019:10BCA000D630F251ABD24C7ADACA84BE5682A4970F
3020:10BCB000FF3D1452910FAE63CDB7E1EF818EB176A7
3021:10BCC00025915F6A0FFE44CF272D2C92BF5331F090
3022:10BCD0000B3D3F93FADBB8FC22ED4AE43DEE6F4C9E
3023:10BCE00066E007C2BCFEF7B91F7440E1F122F88399
3024:10BCF00007305EFCAD6912F1C3245806F61BEF3421
3025:10BD0000D2F966B7B13DC9DB870F54FDEF5980C446
3026:10BD10006908CFE412633FBFD46FCCA8DF0AD8D73D
3027:10BD2000BCAE7EC5A1EF62DE2069312B413F063CEF
3028:10BD3000475FBCDF2BDD85F68298A0CFFECAAEFC44
3029:10BD4000117DF757CE8B3CF1F5AC7BEE0EA52FDFC6
3030:10BD50009C3BB85875EBF84BF2F34BA21E43794D60
3031:10BD6000ECE30EE7F9C2A89DE77C53215AD723DF05
3032:10BD700041FF3F483D207E77E486DDB608FEAE4EAB
3033:10BD80009918E77AE49FF2A85D8F98EC5E4B21F258
3034:10BD900089AF4D55FBFAF3AE342FF1CB30939FF8BA
3035:10BDA0006504F3A5239D46593B5A34847FCFC89C34
3036:10BDB000A0DDC01F7FCC47FBA7007F503EAB8F7D2F
3037:10BDC000343E8FE11F49C7C3C28FBE9979298E982F
3038:10BDD00028FCE84801E79F2AFBED1ABEFF4621CF69
3039:10BDE000378CC38D47FA6ED56817ABAC463E88E5F5
3040:10BDF0002F98D1A49F3796DFFAE39B01C837D22E44
3041:10BE0000A65F996FBEEA9F6FBEBA1CDFC4F28BD4E7
3042:10BE10002B3B6DCE2A3BE6B76A15D2C7C3DE1ED8D0
3043:10BE200082EDAB1A0AA85E6667AA6F3F3D6FE6CF48
3044:10BE30008777F955ACA7295A249E1704AAB0DDB418
3045:10BE400098EF678C38C2EB6D063EC89F972D6BDE6E
3046:10BE50008FDF093685F8FB2F9D6EA5EFA5C2ADE2F9
3047:10BE6000FDCAF62A6C37B5F1F74FE2BED4B55827B4
3048:10BE7000176EC1FB835717F87858CAFDDA9B049FE9
3049:10BE8000EE5476EDA7F7DAF97BF30E5913E977084C
3050:10BE900085DF7AA358E74D9BF83A333EBE857E97FF
3051:10BEA000744E4F88FCA74F4DF5F4BB37FDC59F95E9
3052:10BEB0004A7B2E5E6F467D8287795981AF0BF9BE32
3053:10BEC000E5569862C400EE0FCAFD3EAC3FD0D71BCA
3054:10BED0008C18C0EDBEECE74AE3DFB5B1C793295F2C
3055:10BEE0002CF723231B98827A19D728FC80B8FB9360
3056:10BEF000371735D3BEE4CD03E4BE64B786E7B29707
3057:10BF00005DFAEB847879963162DE53A29E42DEAF11
3058:10BF10000D17D0EF8CED4426A1EFF29FFA3DB5C589
3059:10BF200039E34C7C07B7B380B76F19B0E5276D10C4
3060:10BF3000BCCF33356B782E1BCB57E83BC07FED620F
3061:10BF40009114475FF86FD658C4C2BFE323F8E7B631
3062:10BF500058B6F2EF31B95E9A2ED5CE984124A7B7E4
3063:10BF60000B3ACD1820ECD330360CF5CD7441B73BED
3064:10BF7000ACE0B7925E6B37C7C8FF7706A0FC3FD630
3065:10BF8000AFFF6C7C1EA31F6AC5BC7385DF3C1F7F9F
3066:10BF9000CF54C5F3E2B9FF7CEA31EE37DFCF3A2860
3067:10BFA0001F79FE71EE2F36C0F2905FFAFCDED77675
3068:10BFB00063BBA123F6776643347E9FDF712DE5795D
3069:10BFC000DDF38F3554607EAF76E3DB943FAE95FAB8
3070:10BFD000226CD417E060707DB1E16ACAEB98ACFCCA
3071:10BFE00077368781BEC0BA9461586F0AE30F15E7B0
3072:10BFF00000ACC057C4F7FF03486F4CA47A541A4FE3
3073:10C00000A57DE0B7FDDE287DA4DD88D51765325F0C
3074:10C0100033308DF259527F94093F854D8C8D1FD757
3075:10C02000921C0E13AD8D92BE220E927E07BC4F7EE7
3076:10C030004797C91E3699F47E4698E4B2DC0AF68228
3077:10C0400044C96765E23C81183A6FC2755D268E323D
3078:10C050003E8FE10319C754083EB893F9293E7A513F
3079:10C06000F0C1BBEFF1DF839B6E5F447CF8DEFBDC4D
3080:10C07000EF9471D4B78F9F22FF50FCD44B771BF8FD
3081:10C080009349F8BB169306ADC3FDF44E1BFFFD6B41
3082:10C0900085D3D975E7917C7D7EF15DFC1D17DDEFC1
3083:10C0A00043B44C4AB0E23E628B99C717D3267F5007
3084:10C0B000314BA73F86A45746105FAD4AD7F7FE84A1
3085:10C0C000F1C69BE23CD6BD9944F70B5DFCFE854D65
3086:10C0D000D7F84270FB73B338DF4A699E8B25541240
3087:10C0E0008EB9E2775FE6A9E157BB713F5609BF58A9
3088:10C0F000AFD0EFB4FC0EE5B2CE14B1F0BC5E17E5E4
3089:10C10000E9E5F8FDE72943145F5B5EE7F6B14749CF
3090:10C11000F4F13C6FC8F0FB3FBFF3F27C943F2FF08B
3091:10C120003ECE23ED5F6C7DC2B10537D377AE7F6322
3092:10C13000FE14DC175534FE7BCFB1F3623DC2725D55
3093:10C140009EFA982DFEFEC129A16F4B105730EF4388
3094:10C1500039FED338FF2911179E12FB63A71C7CBF41
3095:10C16000EC6F03781EBCC4CBDF4B14D753623FED9A
3096:10C17000549A319E94FDECE27A628935B05C47575F
3097:10C18000EF868466CC4B641689FA93458CC74F7B47
3098:10C19000520DE72E64792B4BBCB8CF5124CE2DD84D
3099:10C1A000C3ED32EE63E33EF313D941133EFF3FFD8F
3100:10C1B0002524DF00800000001F8B08000000000025
3101:10C1C000000BD57D09785445D668DDBEBD857487E2
3102:10C1D000CE06618B9D7D0F9D0DC3269D8428B86082
3103:10C1E0002780A06C0D0804C8C6E27CCCE8BC3406ED
3104:10C1F00011F95CE2382AFE2E7F83E0EF366384A0DB
3105:10C200005103D32A8330EAD820286A465B46013599
3106:10C21000242D2E836F783FAFCEA9AA74DFDBDD6CAF
3107:10C22000BFFABD47FCACD4ADBA75EB9C3A7BD5A93F
3108:10C23000345A897D7B3E21C4EAD34F2D20A44F225E
3109:10C2400033DB4DB4D4D1923EEF8B6265B65522A458
3110:10C250008C90C1D69A6C6B227DBEC2A7277250BD4E
3111:10C2600086D6D3A0EEC8B6D27E7DD3453BAFDFC322
3112:10C27000EAF49F860C226401FC66A5A5D1E4910B2B
3113:10C28000E9EF1B743DBE6C6C276753099164E22291
3114:10C2900071B4924DAC0E333C1D673996478B28DA4A
3115:10C2A0004EC769D29B364823B1BBC348C79BC3C79F
3116:10C2B00023C3CD5A187F361B8ACCE9DAFF93144387
3117:10C2C000C85C23593F8CB6CFEB1AACA7332075312D
3118:10C2D000AE4C0BC04D265A8ED1EF4AAE68F96C3485
3119:10C2E0001D1BFE4D082D09D19263627E08878B10BD
3120:10C2F000807B8417E1DA58E14FFE8F5242FCBB0C81
3121:10C30000962DF43B0D5D6F1D91285C0D02BE0E2530
3122:10C310007C651C9F8418DD5F1809B99E4864201D48
3123:10C32000A7D3E42C037C36187D384F3AA2DE41D7E0
3124:10C33000C575E7B858847F307D9FCEE7A5163BF9D9
3125:10C34000A72E80CF9516067FB55C5FA54F20E4D45D
3126:10C35000CDC462A08F56EE5FD86AA4F59577110B15
3127:10C36000FBBA5D4346D1F139BE22CD2FD1A1215672
3128:10C3700023AFC367670E20D6EC407D88334E51A7AC
3129:10C38000E31298C7723EEEB0BAA18AF74734A72AE3
3130:10C39000FA5FB62657D19EE22A56D4D3368C51F492
3131:10C3A000CF68AB54D4B3365DADE85F44D206120A11
3132:10C3B00067D33E99B8296A73DCB58AF6BCA76F5279
3133:10C3C000BC7F9C343F348EF6EB888A2924948E5AA5
3134:10C3D000A362B640495C766F3EC5CFCD1C8E82F617
3135:10C3E000058A71BE89B9721FACEBCDDEC5D7124A82
3136:10C3F00057233B9729C65D2ED7B3756BD31DF5D157
3137:10C40000F79AE90FE0B398F8F70EA3F4D1E8966C29
3138:10C410001EDABC64136B17EF2DEDDC8CEF2D752B42
3139:10C420009F2F7F5A59775592EC66CA9FBFB59A13D2
3140:10C43000901E8692A16783F82A4007B413FDDEA9F7
3141:10C44000C764B72105F093F5F038C48F8EB8ADA15D
3142:10C45000EB758A109B07FA3F6FB6B9687DC9FE85F8
3143:10C46000381F4392920EA2AC4A3A88CE56D281D956
3144:10C47000A65CF781E5CA7557E337D69E7B4EFCC6AE
3145:10C480004F52D285C06B39FDF939F1FA24E0333AC5
3146:10C4900080CF923DF65613E2894C338E02FCB1F9FF
3147:10C4A0001A884306394712A89CA1CF6D6C0872D236
3148:10C4B00062726928FDECB04ADA63C6C038455ACFCB
3149:10C4C000EB00CF7AC945E0BD28E24E0279D15AEEA1
3150:10C4D00049F6D075293636C3CA912F4D8E97414EF5
3151:10C4E000D6EB3D85D02EC6FBD2E4C4E73DD23B8BD4
3152:10C4F000098597683D85280F8D04BF2FF0386A00A5
3153:10C50000A3E3E5C48172F8254ECF5F7C5487785C45
3154:10C510004C9AF7DAE9F7BEF998E177297161BF45DE
3155:10C520006D4A3C84E04F85374A3656F86E13877B58
3156:10C5300019216E4D5A283EA52EC9632E0434740964
3157:10C54000B9ED3C5BC2C80EF03986F4FF43F92DF01B
3158:10C550004B3B48C1F209BE671914F89EC0A7905B17
3159:10C56000E23B06D22C27011FA8E418C956AE1301DE
3160:10C5700021310AFFC37FAF52196A8CE31F1B04E30A
3161:10C58000C0E409B99C7F872C7026019E8CA40DD72E
3162:10C590006FA364DB20D3EFC897A5B4128ACF128BA8
3163:10C5A0005D86F52A23DE59F0BCDCD8DEAAA5435D02
3164:10C5B00046CE58909E063FD570363E008724E072E6
3165:10C5C00049444BEBE3797DAA4BF23D9A02F0BCF56E
3166:10C5D000137C773C2FA74249D78F82F9CF4FE8CB06
3167:10C5E000E324EB08F85EEDAB59894037EBA566A272
3168:10C5F0009ADF91D7E838B2C61F0FFDAA8953CBF452
3169:10C60000AE1BF5CD5B920FE77D03B1DF01A5D06FC7
3170:10C610008DA4FDCA59B4DED841F5560C94511E992B
3171:10C6200096A453854FA23D0A750D8504E87B39D445
3172:10C63000C5BAA704DAB12E87D6D7521886C49D5F33
3173:10C64000BF3F9C62E1FAD19FC9DA997CABE3F8AABB
3174:10C65000137ACBAD9C5F37FC328490BFEA294E8AB7
3175:10C66000818F8C2ECD40425253385F169242189FD4
3176:10C67000F255660A1D7F501CE5432998EF587FD17B
3177:10C680001EC2772AF849335DDCD114DFE652BD9330
3178:10C690008ADC85C1F05E003E841DB10CFA02BC2923
3179:10C6A00056AC370CE8FEC00ECDA5DE64D0FF629D0F
3180:10C6B0009AF4C409F618694FC4EF8AE757A7683897
3181:10C6C000BE283D5E009E22AF433ADA43621D2ED45F
3182:10C6D0001E1A1BCFE62FF0E708C5F734053E09C543
3183:10C6E000678102DFD3C2E29BE3E36499F72958270D
3184:10C6F000D97C6810E0797692E346E83FE288EF98CB
3185:10C70000A409CCAB5AEE79EA51D0639DB20D78B949
3186:10C71000713C93738DAFC8C8FABD5D06B744C7A915
3187:10C72000EB7C13EDB39E162A487591F1D40FAF0A36
3188:10C73000DFA1F860EB28E059A1827FEE81EFCC7396
3189:10C74000AC08E72DE7C1C32DE1F0F0CD6FC83C4741
3190:10C750003EC0973FD0971FF86E315FF7DFC7386E46
3191:10C760004DA1DF2F7D7F780CE0A75AEEDA3B14F065
3192:10C77000B05AB219E8772718882B8AAEF39035554E
3193:10C78000E49F74ADCA7DCD360BC547D270934DA6DC
3194:10C79000F8C8BA4576B8E9B8FF58BD2A6E212DBF52
3195:10C7A0006EA19FCEA0CF258D03E98D6CFFF4777429
3196:10C7B000BC2CF36CDB465A9B63A0F3A1DF49F94D17
3197:10C7C000B4278DCA89BFE88911F84D97DA7C703299
3198:10C7D0001DD71F2BDBC00E4E90C944A02F81E784CC
3199:10C7E000680687785EF1F856C9670A3C9FD0EA2F41
3200:10C7F0005949CB19B0EE6501382754F94BC0EE11F9
3201:10C80000784E4863FD89D69F5C1BC41F65800FDA94
3202:10C81000DE0D761DC56763A27E3DE8C15E23AB13C6
3203:10C820007B36DABFAB8D8C3FBAA392DDA01FBB294C
3204:10C83000AC5E1CCF6326A620B918651F7839859B8E
3205:10C840001C90C9365A7C6FB10F8C457C58D838DCA7
3206:10C85000DEEA256412E069F5E4CAC171B44C6C6586
3207:10C86000F851D3C9AB29CCEEAF3F4D19AF24F0BC82
3208:10C870005EEBD15B4CF05CAF787E94E2CD6508D482
3209:10C88000179C48BF92A09CB1AD87FE0B374413574D
3210:10C89000907DD5C1E711092F8DB15AA2A5F86894F2
3211:10C8A00088E35CFD5EFB6F19F1AB9EFFE7BC3DB119
3212:10C8B0002A3C7C47003EDA5E75E7B50F83FDD9E878
3213:10C8C000D511037DB4FA958AC124CC78FD783E3D1C
3214:10C8D00096B8E383EA5A1FE2A3F1F415F8BCEACE56
3215:10C8E0001E3DD03D8C63A5CF5747D907DBCE81E7EE
3216:10C8F000323E8FC6D3B1C4151FFC9CC993C0F80942
3217:10C90000D8FE2C2090D2ADAB53766FA3AF3EBB4F79
3218:10C9100033694B98F9EA5319FCB9895AE4973C0FEB
3219:10C92000B16F0EF37DD16F501C95D72686E79A82A2
3220:10C93000D0F97554FAE6C2FC2F9F48ECE1BE779A15
3221:10C94000D38B9877479C6F31A7FBCC1A7350DDA22D
3222:10C950005CC7442E173AAEF625C3F8BD93991F1F46
3223:10C960008A2736CF51DA6609F05191E42C02395208
3224:10C970003F8356289D0C9EEDD138F3037C1769DD6B
3225:10C9800003F8A6FE57C9B9F0ADC77631DE570739AF
3226:10C990005F12BB49A2FC349FEBADF95B975F4B651F
3227:10C9A00067BF1FF3D526EAC7D04F7C459ADF3443D3
3228:10C9B000BD4D423F658193903554EE2CDE56B21E3C
3229:10C9C000D4C5FC2442AE8863CF6F83729D2EA06FC6
3230:10C9D000F1FF7612AC1FC5F76FBE5B69BFD691BB86
3231:10C9E000BF05FBE7AB834C3E508D867EF8E23F2AC5
3232:10C9F000C7ABDB7ACD7198679DCA0ECA02438FDA46
3233:10CA00002185A9DC4F1B4546811E58B9ED3B7D8C25
3234:10CA100035321F7C4DF93D3D03E4A505CB8A547B9F
3235:10CA2000592AC4190EB0793A529DA353219E72809F
3236:10CA3000CDEB54FD29A6271E4B40FD6400614E7FBF
3237:10CA400035CC32BA5BE93CEEA4E2248AE2C76060EE
3238:10CA5000F690B0036579951C43DB477FB93A0ED653
3239:10CA600037E1B9AB26C17889CF45DB019E8D15F63C
3240:10CA700022881B6CAC31D95AE99046FA3EE80FF790
3241:10CA8000B3A3DF180A5642FBFD95C380ECBA5EF7EC
3242:10CA9000405C6583E6DBBDC368FF0D57105B2B0967
3243:10CAA0007CA7A9ABE645984FF234A66736A6D88B8B
3244:10CAB0002C41E3126ED73572DCF5EDCABA6F2C5DEE
3245:10CAC000DF47F7A1594DE14B1D08722397B075263A
3246:10CAD00067289E289DC0B783EDD71EAAAF4856A0F1
3247:10CAE0009EDB2E7974149E868E1735A00FEB6FF7A0
3248:10CAF0000C9A057AE919AD6D4BD0FC12FE32A4D226
3249:10CB00001A13D047B3240BDA0BC23EBF91887FF9CA
3250:10CB100048373339DDDCC8EDF259D10CBF0B882D15
3251:10CB200019DEBBC948623494A56655B597A1BE5AB3
3252:10CB3000AE8B053B096009B7DEA28C145F6A7CCA24
3253:10CB4000EC92E8BAF74AFE4C18E46B88F9B03893D7
3254:10CB50007B4B4AE838EB5399BC68CCE476623AB137
3255:10CB60009B29DC8DBBB3366FA44D8601741D8B51A0
3256:10CB70002E19CB8BD14E3682FFB3F4B5288F141308
3257:10CB8000C00BB1D88B34102FA81D5EBC116CD32301
3258:10CB900054BE5006EBD5F992918FA9DC91A8EEFB1B
3259:10CBA000CF2D936BB494EE1A87523B8CD6DF4D9DFC
3260:10CBB000C1EAA9BEC51A5AFF614B33ABE7FA8E41F1
3261:10CBC000FDEC965B6BB4942F1A8B7D8B655A1FFA24
3262:10CBD000E45DAC1D1C424A58594FB6D5B8E8F85F21
3263:10CBE000C772FD6EF3CD05FA697C354BB33108DEB3
3264:10CBF000F83426B7BE8E62FDBE4E21F36A01DFD93E
3265:10CC0000BE4C98A7E8F7AF546117B76129E014EF5D
3266:10CC100091A4F0E3FF99BFB7B48ADB25D16403E0A8
3267:10CC20008D2E932B86E27F4F57D616E8FF406A1C65
3268:10CC3000C7171DA734308EC0A3184F7C7719E85D45
3269:10CC400090C73A166715EDAFA532F949BFB30EBFCD
3270:10CC500093CFF0DF583BBC08D68DAE9796AF979632
3271:10CC6000F9AB9BB13F8C1B5B88F2BF444BFBEF39A8
3272:10CC700043FBA704E6ADA68F7D9C3E96B652418845
3273:10CC8000765A1AD2D18468661F9252251C43399E67
3274:10CC9000E3D362199CFDEB3158C2EFB4723C0EA78E
3275:10CCA000782FB878B83FE6F3F9B9E10E5A2FBB0CEC
3276:10CCB000ED9D395B82E121E47EC5385FAF55BD57FC
3277:10CCC0004E1910E6119786EFDD19458CF89C6CE93A
3278:10CCD0007F2FA590D9A560AF3670BB9AB8AEC0E0E3
3279:10CCE000423D971A0D1BBC7A2BB4B74B7637D067F1
3280:10CCF0003A850FF05B7B6D2987CFC2E1B330F8DC5A
3281:10CD00000A3A2587FCC9D3CCA1F4DB8FF7FEF1F2F8
3282:10CD10008BF9780ABE0E371EF047A4F530A5FDCC7E
3283:10CD2000EB21E6A9C2673F9E55F313F8047EC6F7D0
3284:10CD3000F295F4D84FCFA9621D557C9D7289DFAB67
3285:10CD400060EF35FC96AE23D82756253D3774A4688E
3286:10CD500016E407DEEB84B52C0BC4E946A6717F6FA1
3287:10CD600038190EF2DB55C9E2A9AEED065BAB15E34F
3288:10CD70007B2569E1E37BF85CEDEFF5C5EA89847614
3289:10CD80009132DED09768F3DAC14E3D496CDBE8B8EA
3290:10CD900063557607ECDB6C3705DE0BE81365DDC504
3291:10CDA000F920347EE44F86F9951A2A77586D845C11
3292:10CDB000F7E453289F4B0756AE4AA1F5DA279F6642
3293:10CDC000F56195DF418866DA93CFA03C2FCDABFCAF
3294:10CDD0002E15EA69CFB2F609F61D32EE383C5B3308
3295:10CDE0007148C07E989E6665F6479586001D19E4D9
3296:10CDF0001536D093029F91CA5283A6399CFD3AB74B
3297:10CE00009F9FD9BE4639D7CFE5C29FF76915FE7CF3
3298:10CE10005F8CD1250F847D2EAA4F29BC4BD39C0B50
3299:10CE200001FF4DD13D73C114BE3DFA533DD843922D
3300:10CE30009DDA1B101FB15AC86C3A4FA967A303EDC6
3301:10CE4000C06536A316F1C9E35514B6B3749CD77602
3302:10CE50003F73EB30F61907CC6334E7FFA6DD3FFDE7
3303:10CE6000F809E8D1AF4D3608078EEE7A6415D85729
3304:10CE7000A3BBDEFE89E95B13EE5789798F86B82361
3305:10CE80007D5EDE69C0F98FEECA5904FDC7BEDF952D
3306:10CE900006F431BEDBD30AE2A06FD7CBC39CC1FB43
3307:10CEA00057E4B87436EFE2ED8B7E7C7CA927605F97
3308:10CEB000527CDC919608F838B318E28BBD8907D70D
3309:10CEC000FBD04E1BCEE299FC7D6A9767039F9F22A1
3310:10CED000036CB0BFD06766E3A8E39C476A287CF484
3311:10CEE000F9783F9D4190DD3CE1B4910A9040BD82CC
3312:10CEF000C42AEA55C6218AFED5961445FB55493900
3313:10CF00008AF6C9D62245FD9AECD18AFED7D92A14D1
3314:10CF1000F5EBCB272BFAD7D86B14F5224FBBA27FAA
3315:10CF2000C9BE4E65FB212BAE4349B7A30AEC799BE2
3316:10CF3000D7D90AE5E53D6D5503AD2424BE5BEA7300
3317:10CF4000B7C2F3B1679ACB3C2434CE4B9639715FAC
3318:10CF5000C000EB2207ED135478911F7B35366B70C0
3319:10CF60003C77F620E7ABB04E6F4914ED14D9571853
3320:10CF7000FDF1B05ED5F3EE9163605DFC04E35F1DEF
3321:10CF80007ADFBD6341CFCF91D1EEEDD012B41F3B1C
3322:10CF90006616B821067844F2BDF409C8A939D1282B
3323:10CFA0004FC6530B17E186BD5009D6C9A980BB8275
3324:10CFB0002C55ADD30A45BDDAF25B45FFAB92D62ABC
3325:10CFC000DA275BEF52ADD3FD8AFA75B64754EBB45E
3326:10CFD00059B54ECF28DAC77FE16B05369AD0E39278
3327:10CFE000CD74FE638EB455C1BA8CED76CD017E2929
3328:10CFF000F5385B5184EC697E134A0FF5AB20AEF532
3329:10D00000464B12967B5AAC1897DADB928DE5BE162A
3330:10D010001B3EFF5B4B3996EFB4D8B1FC7BCB242C85
3331:10D02000BD2D0E2CDB5BDAB1FFF6964E2C290647A0
3332:10D0300080BE4888E7FA87D6C1DFEFD5F81A61E7E6
3333:10D04000D59FF6BF514EF60EF0F542FD76D76994A6
3334:10D050008B9FA413946FF119ACFC29DDBE2ABD8C03
3335:10D06000C914E44F9D6903E881768DBD08EC6B6DB2
3336:10D07000BAE60FDA1184DCB1D6916489657523AD07
3337:10D08000E362836346347FB00F27E44FA03270938E
3338:10D0900045530BF5BE28D67E364D53EB42FDC0F608
3339:10D0A0009DA705F69DB5E961F69DFF74C26A867875
3340:10D0B000CBC133596680EB208F2FD949916E3E2D1D
3341:10D0C0002BB4453AD08B47547684283F335598018A
3342:10D0D0009E768D6D3AD829AEAB75641B9517B51247
3343:10D0E000F347FBEDC074666FF75D67407FE790C65E
3344:10D0F000BE08E89CCAE927005F195BE36A41AFF408
3345:10D1000099FDC98087B4ADB1AC9EE87F42B205D528
3346:10D11000750CCEE15B2DB5AEFCB070A6C07CD470B2
3347:10D1200066A6F3FD068F7D04E85F513F54636F00F0
3348:10D130003D71A8C29E01F339E83020FFB81C667724
3349:10D14000060839ADBD6C7A50DCC59DAEC3F7A6E9C3
3350:10D15000199F919B64F7B6307EDAEE7466EFE3BAFE
3351:10D16000813F776334DAE18734A46E7B183C7EC05C
3352:10D17000F1F3CD80F0F1970FD3991EAC9C6AC6F104
3353:10D18000FA5647E1BE6F9F230BEDA0BE668A25CA03
3354:10D190001F7D279A4FEEC47683D812C3FDCD595C0C
3355:10D1A0004EFDA96BD50F8769FF4F5747DB50865B54
3356:10D1B00072513FDDC43BCF8937A2DD32A7764425CB
3357:10D1C000E8A5597C9F6CAE593B08B7CBB4B17A0B3C
3358:10D1D0001DE76653D17A50FF8B136AF4B1B45E3702
3359:10D1E0007CC57A2897A5DFAF8FA3657DFE8BEBC149
3360:10D1F0007C6CA0AC5586FE92EFDD163AAF796B647D
3361:10D200002BF39FB85EB32FBFA87319820E018F4016
3362:10D21000A714BFE8171EE1F816EF1DE1F85A9CCEDF
3363:10D22000EDB602527056B9FFB30CF8A167CEBB99A8
3364:10D2300011E2F4CA766EB77DA067DF5DFEB4CE1D45
3365:10D240001C4F12DFFD289DD9D787F4C42E811D778E
3366:10D250009319E9A370E677B79751F80BBB2C1ADC4A
3367:10D26000BF1772DC4B307E5FF68513E5DCE53DBE13
3368:10D27000A70E13A4F34EE093F3E9A9A9AEB5A81F36
3369:10D28000467F4FF50FC8C533CE4F0FA31CACE372DA
3370:10D29000B019E5D79E963558DFDBE2C2725FCB0648
3371:10D2A0002E07DBB0FD9D964D5C0EBAB91C7C1A9F13
3372:10D2B00077B5CCC472778B93CB41B6BF5ACBE969B3
3373:10D2C0007692F33EC093D8C79C6674EA005F7F7D78
3374:10D2D000C44064D89FE832209D520E78E2D10438D1
3375:10D2E0003763B06CB4869E9F51CBDBFEF557EDF7EC
3376:10D2F000AE4EB23F0AFCDD7F5E06ECB3CB22D3CF4D
3377:10D30000416235833CD9917E432DC8E78356AB19E2
3378:10D31000ECD68EADBC6EB79A75B4BE337D06CA9797
3379:10D32000834EABD940EB2F6D9DC1DA5D567314ADC2
3380:10D33000BF9C3E93D5DD0437B7BBD2E7A09CAD20A0
3381:10D34000D21EE0872A63CA442AAEA97EACD8037CE9
3382:10D350007055D2FC89C00779E956A4C3C9D6B57BFC
3383:10D36000A07E4DF6666DBC15A2A145EBE0BDCA845A
3384:10D370001A2DBC3771F88A75F0DE95E9F76B83DFFB
3385:10D380009B94FFE23AA85F6BDBAC057B300FE45661
3386:10D3900062601C5117ED42BE8AF35D23BB1C28C797
3387:10D3A0000B3B1D28C7055E2AA7D5DC0171BAA64E26
3388:10D3B000C922C13CA649FD9BF612B5211ACF506E79
3389:10D3C000A172F6EDF4BAB8B514CE26A88FC1FA1F33
3390:10D3D000D68697BBDE70FAE543CEA7A0376BE83858
3391:10D3E0001F52FE81F368360E5F53D77CF37CD4570F
3392:10D3F0004E33E8D7515C5F8EE1E5325E36F1F233B1
3393:10D4000093FD63F8CEE791F9FA4BA00FCAB78BD919
3394:10D410003C42F85AD9CEF9FA38C72329F52743BD3B
3395:10D4200081B4619CF07CE7BC9606FB6F29705EA21C
3396:10D430001DCF61A8CF4BD4132F1BAF5D75DE82F8D3
3397:10D44000F4B80FDA19F41CE511F73F0630B93713B9
3398:10D450008435381D1914EEECB0706B3312CF09B758
3399:10D46000B29DC3BD94B8F17C9B1A0EE24C44DE5AC7
3400:10D470006E3A84EB190A8F2F3C3C217030FF5D9C83
3401:10D48000671171796A07256494811C341388DF045D
3402:10D49000CB89C3E790136A79F473C9B973C89B1C2D
3403:10D4A000C09B5ADE88735AEA52D873B4EE82737AFC
3404:10D4B000AEDD5118A73F697596C2387D95FE1F35C0
3405:10D4C000E09F25F890CE7E3FCC7939E041D2B3FD84
3406:10D4D0007AFA4626ACDB098DEBCF601755656C41B7
3407:10D4E000B9D30BCA81F2E3585A07BBE7F1A18EF119
3408:10D4F000F01EC966F413E95CE7C40CA68F424BA288
3409:10D5000038DFD8B7F9A7648C639D87DE23E1A15A81
3410:10D510001EE77381BC2F8F4693A747221E89DA7FAF
3411:10D520003D1583D08EE819A1D742F973FB893D23BD
3412:10D5300032717CB5BFD833A4DCC8BE7BE524283B60
3413:10D54000F5CE4DF3C14F1A6D403FE93D7E2E704A36
3414:10D55000343B47F51EEC13D37E538E9E4900FDA548
3415:10D56000F6377BF6CFAEB41686FA9D14CE890067E7
3416:10D57000FDE79A3BE0D9C5FAA1F56B7E24DA78BACB
3417:10D58000AE6BCE106DC985F8A5440671517CC4F60A
3418:10D590002694655F78E30AADE07F0AFB81FBA7E78D
3419:10D5A000398F54EE67F6C28433245B5B0A71A6019F
3420:10D5B000B87F2395BFCDFC565E8A7D91716C0A645D
3421:10D5C000AEC6E4D6A72ACE23256969395BF68D82DB
3422:10D5D0007A2FF1E23E89DA9F7D8BC7A1A85FFB20FD
3423:10D5E000D0ED7A7E4E89AE483CD06FF5EF3E9A7B07
3424:10D5F0002BCA8128B487FAFDDA9D1A3C67D0A1B501
3425:10D600000F1C0F7EED9A0CDB5A5AFFCC9BF8E06B97
3426:10D61000B46CB2FC887813FC5BBFE63BC4A7A8F7E8
3427:10D62000F0B86F9B8EEA1F5AD6FFB78C7AA89E90EF
3428:10D630000DB86EE40DFDCA20BD48DABFEDC7FF4846
3429:10D640002AF76A0081A8172BA7DA69BF1AEE7F10A4
3430:10D65000F226AB73BF8BB852A7DAE9B83589BCBFE5
3431:10D66000EB21561F21DA1F66FD33C478FFAAC5FAE5
3432:10D670001051E7E3E588FA7BAC9E22BEE767F5022E
3433:10D680005137B3F1CDACFFEE6D3BA6823D22E4FDF8
3434:10D690009E0CAE1F8B48113F9FB30FE57FE47329AB
3435:10D6A000CA76AE1FE63D23BBF423617D2647BF0B40
3436:10D6B000FCDD2EE119BAFADB7418EFFE26AEBD7060
3437:10D6C0005590BF22CEB138AACC76B0FF1A5ECADA26
3438:10D6D00022F3733D607F10BE1F5D2D9B707FE2D4EF
3439:10D6E000DD4CEE47B2DF16AF794DB19E21EDB2C4ED
3440:10D6F000FC71D8B8A3DF3B79CFE0CDE85FA47B71A4
3441:10D70000FFFC588624F6E949795CE0DC58421AB1FE
3442:10D7100083BF9AF03295CFB0C65F78511E2F7E99A5
3443:10D72000C57F1B1E7913F5DE02D98AF1DCEBF29D71
3444:10D730003D809F5EB317E38A8BD7ECC679FD9F1CB3
3445:10D740006E3758FCF9C1F8FC3E14FFA7CF83FFD316
3446:10D75000BF26FED571E765A63D08EFB28B3CDFD64C
3447:10D760006B66FBA236BE4E4735D6511C5F719910D1
3448:10D770003F5FE4CD8C95E1F0B177103BB7F44E19E3
3449:10D78000F845A79ACD04D67DF6AA7F143AC3C47D86
3450:10D79000D5FEC0CDF0CDC400BEAC9921F84DCF2C44
3451:10D7A0003B277E95EDBF307E076B7D7A1BECA31E79
3452:10D7B0002138CE28EF517DF0F99889994C0F0FEC64
3453:10D7C00064FB46EA735F1333CDCC6EE2FB330DB5D9
3454:10D7D000EF8C83FD19C10F13A2493BC4DB295DDB2C
3455:10D7E000385DDB80AE05FD06F669E87B61F82B400D
3456:10D7F000BF4471AEEF9A4C6E5F06F07A7DE6B9E9F0
3457:10D8000056D9FE0BE3B583DAC3B8AFB9330AE329BF
3458:10D810006A3CAFE47815F86ECD64FC1F09CFAD808B
3459:10D82000E7C49F1FCFAD9956453C42E03B927E52E4
3460:10D83000AF8F9877183E2DBB143ED5677339A5F589
3461:10D84000E17953F5BA6F0CE5A77BCFC34FF7FE9A8A
3462:10D85000FCA4C69BBAACE7FB9DEAE7CF678AF3015D
3463:10D86000BF0C1EFF7F8BA7CF697E5DD13E6FCD7E43
3464:10D8700045FB7CD701457D9CCF5B05642EE2E357D9
3465:10D880009CF0BF09F54B8DB3478AAF4FD9B1440324
3466:10D89000FB6FE55E16DF6FC8764A5974DDDED3B8DC
3467:10D8A0005BCD14AF9777B7CBB81FE62EC27DC055BE
3468:10D8B0007C8EDF8DFBD7A7B752BAF98E1830FEE900
3469:10D8C000793D476B2D08A5838AD332B107D98915D5
3470:10D8D000C6582DD85315D4520E4737FA2C467778B0
3471:10D8E0001E88F2FB4C23D125503E9F3953C2F34F83
3472:10D8F00033093B574D4B8F93B64FD1128F81D66B67
3473:10D900004C5A8F01F7FD58DEC374364D62D01217A2
3474:10D91000B4938478F483A7C1433A5FD92EE379B6F0
3475:10D92000E9E56CBFF02653BB0EF4E98DFB6E3F7941
3476:10D930002B6D27EB5C65ECDCB6C863FB587331FBE1
3477:10D9400080FA2CC6E77D12DF5796743638E7AA7E38
3478:10D95000EFE34C06EF1479AD0CE75FFC0708DADD66
3479:10D9600082EF287CFB0CC52C4F630CC049749EAC25
3480:10D9700018B09FEFAF82FEF587AC8897A6F2B58509
3481:10D98000B08E4D13A5CF0D8501FFA669CDF768A711
3482:10D9900057CBCFB742FF53475868FCF21E970CFE97
3483:10D9A0004A207EE99B0B7C793E3F48CCBBBBC583BC
3484:10D9B000F4F469CB3E2CDFBBE2ED32B0337C2DDEDC
3485:10D9C000B0F1CB4B8D17883881881B0839F0D96DA1
3486:10D9D0005583812E6D595C2E18A561201788969568
3487:10D9E000425E8ECA0A91AF63B2CEAD5795EDBFB01D
3488:10D9F0007CBD503AAF4F627A514DDF6ABA16F44C93
3489:10DA00005F2B93E8776FA2F61EE8D559C455504FA7
3490:10DA1000E5ECCC256DBAB1D2A5D3F532D317C92424
3491:10DA20004CBECAC5CB732BC22F57C9E81F88F30A57
3492:10DA3000621D1AB242ECA115E759B715BFE6BA85C7
3493:10DA4000EAB52FE65E9A5E230A7BE0EE50B8DBCEA5
3494:10DA50000377DBAF0A778A55E4D1CC953581BC11C9
3495:10DA6000384F0C765C9F9BE545D6A5B4C5E0E1CC6C
3496:10DA7000727F0CD88D4B77C94887446BD70EA1F4C1
3497:10DA8000BA84D36B0FF17C00F4B864DC12CCA7AB82
3498:10DA90007B2CFCB9E246DE7F99A9430F702EDBAAEE
3499:10DAA000ECD7C8CF15D73FAF8C8B368EBBEA388CFE
3500:10DAB000DBA83ACFF35216CF4B2C26C5ECDC85D22F
3501:10DAC0003E5597BD2D4411AFEC3DD382F180DD5919
3502:10DAD000FE075CC383FCFFD0F5DB97756E7B4ED9E8
3503:10DAE000FE2BD3AD6CDE8AF955174BB76B73EDFF88
3504:10DAF00080790B793C1B6413FDEEECD70C6E17ECB0
3505:10DB00008F9659597C5372B7C27E5BDF4F04E3474F
3506:10DB10000B789C33527EBA386F30FA90BB959D37A4
3507:10DB2000B0CB902F3A6A9FA30AB62B4ADE69467B98
3508:10DB300024E2BE95C8B3E2E7872E54AE89B8DEA8CA
3509:10DB400013CD6867D9BC16B487C69C6E7F13F4E307
3510:10DB5000CF15EF16FA706C3CC35BA9CF81765EAF30
3511:10DB6000CE53F621D809AF4485B51362B3D9FA4D27
3512:10DB700075CDD7B1BCC390FDC0D86CBA1E53B9FCEB
3513:10DB8000D718ED3AC053B5DCF3E00CA01FAF8CF111
3514:10DB9000BDD5BF7FFFCF8F5ACFEFF73759BE43BBFD
3515:10DBA0002192FDDFA461F917C555563CE707FE1425
3516:10DBB000C4F744BC4FDD7F426E651ACCAF5A1EE7F6
3517:10DBC000B5C37C36B1F9445A9FA635DF2AE28B9162
3518:10DBD000BEDFB4ABCCB220880F6ECE9684DF613945
3519:10DBE000660CACEF85D2C178FF4C85FDF3FFBA5FC0
3520:10DBF0003145A6A625D59F05929BD9AF84D9B1B34F
3521:10DC00008917CBB9C48FA593B0F3F70B880DCB9BC5
3522:10DC1000793EF3811CE74C58973E9D7F109E9F7C78
3523:10DC2000E9DFF9403727AF18DB06DB5EBF941DD76D
3524:10DC30005764C5EFF7EDFC77329C83399F5C589DA4
3525:10DC4000645F9E1D66FFF9EF15F24C966FF518EABA
3526:10DC5000891A7E1B0399C8F6D1484A0AD243402E3E
3527:10DC60000EDE2CE422ECCF167CAE61E749964AEE3C
3528:10DC70000CDAB5D3A741D62A5894E296A1DEC1DAD0
3529:10DC80000B1A62DD12AD178C8E62ED2B62DD104730
3530:10DC90009F437CC88FF3A82884723E61726F21B1C4
3531:10DCA000B37C07E24F053B6C5197919DF727BE74FB
3532:10DCB00090EF8511FC9FB7B299DF3C3295C9F39183
3533:10DCC00095CA38C53D5C0EF4E6549EC8A6E5A96C1D
3534:10DCD000FBBD80979171DE8D0F9462DC9E80FF709A
3535:10DCE0007CF46F71BF51BC97985BF900F47B416283
3536:10DCF000E7D35DBB0C783E82BE31C81174AEFF40E5
3537:10DD00004ED523D0CFCDED928878257E45FE6C8010
3538:10DD10009F5C38BF91E07361BC9C3E28C7EF62FDF9
3539:10DD2000C5ECDA69EB4C18E37781DD9B98EB7C1648
3540:10DD3000E7AF27C404F37FDCE0DE82F6697332C408
3541:10DD40002B973C61D080DDF01155B79087F2498B5D
3542:10DD500011CB7F503F18CACFA81F0CE5E7D40F8620
3543:10DD6000F29FD40F8672D1E922AA2C283FE5D8DF92
3544:10DD700064F41D3E4FAB4BE05B7C7F971EBFDF9B87
3545:10DD8000E344FCF6AFF72BC40D9B3A2FC4FA87C6C9
3546:10DD90009D83DE22CB198617B15FA86EDFCED7B583
3547:10DDA000B0438BFABDB0D317B338A8DF816C3DCE3A
3548:10DDB000B360E7179887DA6BE9C7AF5DA2204FD150
3549:10DDC000B0FA81EC3AC46F6F8EFD04C04DF9FB30A0
3550:10DDD00094859DEFFF01F27FE8F878EEA04FF23FC7
3551:10DDE000847E800A0E351E045C2FC47A37C2FB2F56
3552:10DDF000EC4C0548A8BC218C6F808EA470F0AEC599
3553:10DE0000F95E6FF097425ECBF567E5B0E78C7B7308
3554:10DE10002A10CFEB04BD093CF1F5BA54BEEEDFFF8A
3555:10DE2000E6744AC43D1E203BADA087CEC480BD57DA
3556:10DE3000C3F7F73B3BD2DF03F85CFB64926145FA22
3557:10DE400055F0DDB01C4627A22CD8A577C03ABDB04E
3558:10DE5000EB58FACD265C97F445B47F744E8622FECB
3559:10DE60005830FAA7FF782001FB5BE0533792CDD5FD
3560:10DE700070FE6496F1F5BF0248732C9F57C3F99367
3561:10DE80007949D25E28E75B53AE847327E27CFCC2FB
3562:10DE9000EC8ABDC04AD7DA6AD04EAB00E112A40FBB
3563:10DEA000AA8CD1B029D85FAFB6C42BEA57250D5341
3564:10DEB000F49F6C4D53B45F939DA76817DFBDD65692
3565:10DEC000A2E83732CE9F0AFE198503F9816C93F1DF
3566:10DED0009C5EC1CE4357E7D1FA94A7A6DBC02C794C
3567:10DEE00081B74FD95EE586F5E8A3F8D45303EA4439
3568:10DEF000F95D0F3D0083A9ECFFFA5D4FEEB55B2F96
3569:10DF0000C2FE8F60F70B39BBBCCB580672F642FDE0
3570:10DF100000F5FA8CCE51FA0591E8A69F2F242BA389
3571:10DF20009BFD32D916866E08B99DD3212BA71C64A0
3572:10DF3000F963172BCFBE0479161FE08FFE52159799
3573:10DF40001BA9B7BDB70AE2F4EFCA04F3F1785EDFAC
3574:10DF500062F85D0ED03BB979F31D4312F0B90BECBA
3575:10DF60005CC82FB5D3F157E470FBA9FEF53B86944E
3576:10DF700006DAC9EACF15FDC96DD27A457D5D8AB250
3577:10DF80007E77C5FAE0F723C9C5C59BE6EB9D98FFF0
3578:10DF900029D9DD61E483984FF51B5178AEEF3A380B
3579:10DFA000AF421F35961ED0C23EEC7511F4A8903FCB
3580:10DFB00037CAA4395CFB6D392CCE7FED1B51780E2E
3581:10DFC000E662C7FD88E212CF19BECCF4E84703BD74
3582:10DFD000DAE075BF93CFFB64D9FDBFFF11F6475F51
3583:10DFE0002178EEF3642C93FF851DC7351AD0830387
3584:10DFF00018BD145A7C1AD02B7D75D12E38D7DFB4BA
3585:10E00000D4CCF25F52FD1F18E9D2DF97F3CE1F8DFB
3586:10E0100074DD3E8624C820BDDA074E11AD6F7AE666
3587:10E02000ED69EBE8FBD7BC11E5D15C023C9BF8BE87
3588:10E03000C4C84AC6E773816EB87E81187BD31DA41D
3589:10E040005FDF805C00F8A1FE5ECE7B87FE0876F87D
3590:10E050007EC6E770C24EEDDFCF0AF2EFC9638C2FA8
3591:10E060008DF4879D5352F1F79E36BDE99C7CDE8E80
3592:10E07000E76E2E94BF77E4F03CE1C8FC7CF01ABA5E
3593:10E080003E4DAFB07B2D4E7565605E6C247DDEB479
3594:10E0900049463EECD75F5DF22437EA29651EBAC0D7
3595:10E0A0002BB1DB903FC5FD512BC7FFAB16F4E6CA81
3596:10E0B0005D5A764824D27736C8C41AF49D17761B69
3597:10E0C000EA30CF8DCFBF4FE8EB5D3FC455E4B3726C
3598:10E0D0006D18BD47F5B42E01F4748D847EE5E15DC5
3599:10E0E000832B014F8725E2B162DE163BA73C950DDD
3600:10E0F00007CF4D786F4952369E4F16FEA5F02BA7DD
3601:10E10000EF9A9E0176E5071D0B0ED39523C772D2B9
3602:10E11000908F661017DAC187631D23202E31859FEB
3603:10E120000F381CEBEF01B97C787CB404FBFD74FC68
3604:10E130007530BE80EBB0CE3182DD3F21CE25E75E6B
3605:10E14000D27D71D5F26D15D7C0FEF66C6201BFF2BB
3606:10E150007A99D9B9E42F8C3F85DC6B92BC7130CFB2
3607:10E160000339B5A773289E06AFB997C75539DEB4F2
3608:10E17000EC1CE285DAB9FDFEECD312BB17C5C6EC88
3609:10E18000FFC671DF3C3803F2E4A8DF2DD1F92CE89B
3610:10E190007C1DEFFF51FBD9FDFECEFF309E1AEA2F0A
3611:10E1A00039E27283E2E46ABFA9DF4E17F6DE367603
3612:10E1B0004EFECDF10FF72EA7F5D5DBA2118F5F3DF7
3613:10E1C0006170811CFF6A8B01FD9FAFE2FCDDABA09B
3614:10E1D000BEBDC0E6C2AFD914F7A32DD1583F04FD90
3615:10E1E00043FEA6C37B3D8E3F6EF0C0798FA54FE600
3616:10E1F0006C017FEAF808EB73CF433CF0B944BC678D
3617:10E200008038D9FBD7717E04FEB252D343FE2F3340
3618:10E21000DA114B770C413926D6EFC4E3519847FF0A
3619:10E22000D5BEA903215ED6A37911F378886C7281DB
3620:10E230003C5EBE250AEDC035166729C05FF55FD785
3621:10E24000CD2881EFBF9F48009EBEAE1D18AF0CAC1D
3622:10E250006F78FD7EAA2B8DC9817E7DCBCEDDCE83EE
3623:10E2600073B76978EE760C8CDF40C4FD8BECDC6D07
3624:10E27000B12CD931EFE09EF079E4D7E432FBB15E06
3625:10E28000C44FE2893109F8D04910DEBE7BB2B680B6
3626:10E29000BFB330378E7FD7CFF32505BD7537BE8628
3627:10E2A000F113033BEF17157E1F7B462ECB2B5E6CC5
3628:10E2B000FC5E11BF695CF39322AED2984F50EF160B
3629:10E2C000B75A4B56D07215C7F3EA54C74D00DFB2A8
3630:10E2D000F6FB5F7A07F1F2D86F3E86EFEE3361DC32
3631:10E2E00086BCC3F0A7F667161BBFE5FCB4596107EF
3632:10E2F0001F7BE4433C6F726C675E21ACDB02D97B11
3633:10E300000CEEE5EA357B3FBD9596DBF71DC47551F4
3634:10E31000CF3764DF5E6272A51EE08887F32E8EE63B
3635:10E320005CDC1766FC7E746301E24FC473FBBE0ABB
3636:10E33000EF6F89798AF1C5FCC4F8A2DFFFE2EB75C3
3637:10E3400052EF2D04FD9C06FB166581F69331DEC26B
3638:10E3500058133C67792D27E3683D886E7EA9FD9DA3
3639:10E360009B789CE78866ED2D7A4A7F3DED0FE89C0F
3640:10E37000C172F422F775C47CC5B9529147FB9FB9AD
3641:10E380003C9E3D828C88907FFB646E59D8FC5B7C00
3642:10E390001E29FFB63FDFF607966F2BF26B4BAB34AF
3643:10E3A000CDC179B6421E96E6D1E7F9B0EFAFD4EF12
3644:10E3B000A52395FD23C9C7F1796C1D4BE3C3E7BBCA
3645:10E3C0001EE2EBDC4A3CEC1E42AE17C772BC8BFB74
3646:10E3D000BF849DD2C8E5B6C8F31CDBC5CE6D8EE503
3647:10E3E000793B540A609E6BC83D6F4979A857C53D7B
3648:10E3F0007D121D6B765CB87C612FCEE30AE2C7D23A
3649:10E400004E2C5A2829FAB19C481C585E499AB19C56
3650:10E4100044DAB0BC9AB463792DF16249723DFCBC18
3651:10E42000E76D2CCF74F2120DE8D7D219E1EDE21F9F
3652:10E43000CF8B0717DE2378B178B892B0FBFE42F09D
3653:10E44000313C1BE95B8D0F75BEE678E2C38B4B2632
3654:10E4500000E1A6811F6CC5F3AD55C48EF5EA0BC46F
3655:10E4600043B9CFA965F9BD2A7C5485A78BB31C1F7E
3656:10E470001B40779605D6A9348FC901B15ED4114BE4
3657:10E4800002F9AF5E47F1BC34BAF23B2B1511C3F26F
3658:10E49000EE988E79DC2595ABD268BDE0B907597D41
3659:10E4A0006CE50EC8F31E99F7F074CCFB1E5959A207
3660:10E4B000B3C17D729BA64FA4ED4E7E6EDAC9CF4BE1
3661:10E4C000136791E29E2CE7DA5BF0DE31E708930DEB
3662:10E4D000E01479E1721ADB5F4D9EE4794347FBED6E
3663:10E4E000B23807E595C139734F8C15EC84B5D578F2
3664:10E4F0007FD49D7AD65FDC6723E013F7DC6CDF9E68
3665:10E50000B74A4A3DFF3CE8F8E97989309F0CCC8F47
3666:10E5100073EE94783E5CE5E099546EF4787504F2FD
3667:10E520000BC4F72CA9CE1C980F81A478CA17C3B8C6
3668:10E530001EEED99E9707EB549AC7F30713524A0071
3669:10E540008F0B521DA5D05FE44597C2BA24462E67B3
3670:10E55000E7D98BA1BFFAB9C8CBAECE7396437B5334
3671:10E56000F419CC37EB2D7A7FBD2F25344FBDD54E16
3672:10E57000DC7A942BCAFCF4BE457ABCCFA9D4E16CFA
3673:10E580008523CA97CFF68FC27CE13C67158EABF727
3674:10E590002517D1F7FE3895E5BFABF3BD77EDDEAFBC
3675:10E5A000C86F177CD69FDF7E8AE5B707F8EB9155D9
3676:10E5B0002428BF5DF08DE0BB3190DF1E03F59C4544
3677:10E5C000D06FFCFBDD98DF3EA1DBC7F3DB3F54E6F9
3678:10E5D000B7DBFF7549F9EDC7F9BD6FC78DECBE24F8
3679:10E5E000719FD4CA9D6CFF77A5C4EE935AF9277624
3680:10E5F0009F94F00BEB387C0DFBB7AD877DBEBAC79F
3681:10E6000016E27D5484DF876AA53FC17EA1B89F547E
3682:10E610009D07D304FE20DACD1EB4BBD4F9304D8F54
3683:10E6200055A13FD8A4B2A36FC9E3F11DAECF08B77F
3684:10E63000FF96F077010E13FA677AB43B573EBECAD5
3685:10E6400066813AE72BB2EF7912DC9F3C168FB4203B
3686:10E65000F86CE90609ED5781BF914F19EC789FF1ED
3687:10E660005383D16EA5F636CF6376337F9BD20A9C57
3688:10E67000877F21D69F0A76F20BBBB26D54C29257A8
3689:10E6800023DE43FDBCEA1EEA2715F7509F82FF8177
3690:10E690009D7642E386714691ECFBC6D17AD909ADED
3691:10E6A000CD6D0DDCCB7CBEFB8705FE0D7CBD2EF653
3692:10E6B0003E62F5BDCF22FF417D2FF19DFC5EE2F170
3693:10E6C00011EE2536C85D32DA0FDF6B15F7135FCE1A
3694:10E6D000E12CB71237DCF73BA647AB58FF725F1B44
3695:10E6E000017B28EA90561147305895F597F3787CCE
3696:10E6F00080DF2F128A6F533F3E0D88CFF487119F22
3697:10E70000AAFB9E059EFAEF7B1E6E42BA1FB37F875F
3698:10E710000CF2E062EFFDFEB5EFF93EDFBDDEEAFB95
3699:10E72000BAD5F77347BAEF5BAC7B9167A5A2BF7A06
3700:10E73000DD4BF6FD4E791F355F6F17FDF939D7FBBD
3701:10E7400007D57AFF1B2E40A37CF8F7981377035B5D
3702:10E750004E896672ADDFAF1FA7433FEB3D6B7C95E3
3703:10E7600019F89FEB2907D753E4B676DC8777707AE0
3704:10E77000B179D93982E223ECFE8A521F3B4F30EA4D
3705:10E7800044F8FCA0EBCB25C5FE6EE8FDC52CCF7888
3706:10E79000EC19764E4FBDEF2FF2866AEC51CAFB1B87
3707:10E7A00022E41189380EB5E3891EEC780DBBCF2E1B
3708:10E7B000CC7DC79BE4B4E03C2227C677A619BDC92F
3709:10E7C00040CFF129CECBF21303F9461320AF4842D4
3710:10E7D0007F90E7E124DC0071C73E48B21D4AC8675C
3711:10E7E00077C7DE80F70624108B6F1473777176F984
3712:10E7F000CE6C18E7A864595F42DFFDFB986F924129
3713:10E800003F19605FBB18F77D73A15D7D4FBF4F63FC
3714:10E8100045FBC2F53B09FD876F60B0D141FCBA41B1
3715:10E82000C7F31A557FC780FB53E2EF181CA543D4EA
3716:10E8300051B93DA793E5512F4FEAE17E18BBC7754B
3717:10E84000E17013DEFF44EC2536E6870BFF6A987C07
3718:10E85000317AF37CE78B96277DA5F073C9F3F11726
3719:10E86000B49F18809B8D7FF4AE68D43747EF1A8130
3720:10E8700071BEC0F8BDE8F7CF69569E339EB7E62358
3721:10E8800005FDCD777DAE68F725F875C328FCBE97EA
3722:10E89000865C398BE2EFE44EC328E033BA6EF3F2C4
3723:10E8A00083FC7BDF3D5913991D703E38BFC17974DD
3724:10E8B000F373A202CE4F5B8E60DDD7E2539DE7710A
3725:10E8C00029FC5251EADF20784F8E5F1A600B1767E0
3726:10E8D000399ECFECF66E9E07D9CDF320BB79DE6270
3727:10E8E00037CF53ECE6798A227FB45B2276384F31FA
3728:10E8F0005B723C315FC2FCD1DB00CEA665FE42C834
3729:10E90000B76B1AE99B2BC9983FDA925F16367FB432
3730:10E9100010F2DE5F797EF60D60D79F18E0C27B496A
3731:10E920005ECC9F7903D8F527F48C3F5E7FBEF2065C
3732:10E93000C81B7B7CA8F32E18E74B49F6203DBF226D
3733:10E94000E17E2AB1FBF4B5E7C82F6DCB67FB0BF76F
3734:10E95000E7B37D0C513E97CFE4D9EBBCAC96EFCE3C
3735:10E96000C4BC9F4D06CCFBA1DFB16B82F6FFD5F98D
3736:10E9700059C57F3178406E8838CCD67CB6CF0A79BD
3737:10E980005B30BF84FB0C2C6FCBE74D863C2F38EF00
3738:10E9900003F7669043C4CEF2C0D8FD7D621DB6E693
3739:10E9A000F3736770A17E69204FAC61FFD14F418E38
3740:10E9B0005C97EF7C1AF99FE72F35C4BC8EE7265E83
3741:10E9C000CDB7E27B74BE083F9507EB24C473481CA7
3742:10E9D000AE3DBF2C34FF3D12FC2717791FCA4F09EB
3743:10E9E000E44F05E54DBD0AF310708B7904C6393745
3744:10E9F0005D8B785220DE756726F049B78ED97BE2B1
3745:10EA0000BEDA62599A574BEB6F71BC88FE9FF2F5E4
3746:10EA10005C9DEAD80FF358D6CCE26EA2BD4F6AFBDC
3747:10EA2000CDC7B06EFB4D28EFD4DF17EFABE16DD84B
3748:10EA3000BD1FF142E19D0B7006C1FB617E507CF071
3749:10EA4000E4AE0F1F02945F2A9C179BCF6C18C0EE98
3750:10EA5000450C8D4BD3850DB2A70CE2FDE1CAFBC678
3751:10EA60000CF0F711E8F73AB81FD2C1FD904E1DFF28
3752:10EA7000FB352ABFB4C3CBCEF57424E9F1DC0EE13B
3753:10EA80007F6F41E8E1D507D8399FD52904DB617E46
3754:10EA9000C00F926F2FEA85FE7BA324AAEF285D7C2E
3755:10EAA00063719202A06BE72AD413F265261BD0F59E
3756:10EAB000F6BF5DCDFD2BA677CAB89E298371008E67
3757:10EAC000FC81A87F4AF97747199BD1BE1D4D5C3C5C
3758:10EAD000DEC2E31277ED55F865FF17386EB02750A8
3759:10EAE00068000000000000001F8B0800000000000C
3760:10EAF000000BFB51CFC0F0038AAF9B3330E4593198
3761:10EB000030CCB1666060B56160683047C8BD114700
3762:10EB1000B0A9897FCB53A67F932403C31620DE06BA
3763:10EB2000C43B2449D7CFAD8D6037AB3230F000F90C
3764:10EB300021409A558381E1B51603032F903F03C806
3765:10EB4000DF03C42780580528F612480BAB31307C10
3766:10EB500001D27C40796D20FB8A1A76F3F9B5F1DB9E
3767:10EB60007F5C0395FF138DFF401DBFFE2C4D02E11E
3768:10EB70004B401E1BE6B3273F3E8228D03B10F830A7
3769:10EB80005ABA7E6CC2C0F0CB9481C10E9AF60F20A7
3770:10EB9000C90700C59E9840E34D8F81E1961903C3D4
3771:10EBA0005E1CF9E20450FE36503EC61CBFFD0ACC86
3772:10EBB000A87C615E4C35DF9810ECC942A872C7840E
3773:10EBC00031D5F38A323000002621667DD80300005B
3774:10EBD00000000000000000001F8B08000000000083
3775:10EBE000000BE57D0D7C54D599F7B973EFDC99499D
3776:10EBF0006E269310C24002CE2411A2243040C09849
3777:10EC00004CE0E68B041270F87829565A27E8226DFA
3778:10EC10004111DDAEEF2E2DC347435454D8A26BAD46
3779:10EC2000BFDD812AEDEE6BFB0B162D9B049D8480CE
3780:10EC300068F88868B5AE6D376AD7061B6C88C1D294
3781:10EC4000DF4BCB7B9EE79C93997B33930475B7FB9B
3782:10EC5000BEAFFCFCDDDC7BCF3D1FCF799EE7FC9F88
3783:10EC60008F73C66AB111D775845C85FF1610327F29
3784:10EC70002221646EF42A9E57D8492879262169F604
3785:10EC8000435D33320859A8C9BE1A0F2113EC0D9DFC
3786:10EC9000A488903262F3D8BC84B44B3FEB9A41EF26
3787:10ECA0004FA4587D3602FFDD4BC83C4236DBE99F5E
3788:10ECB000B4FC894BF44ABF3FF1474B98488454CB8E
3789:10ECC000F54482EFED122FAF6B4B3209A922ECBF56
3790:10ECD000F99748152D46AADC77D593198454BA685C
3791:10ECE000293B7B7795952784962F25AC7EDD6E7C1E
3792:10ECF0005F4A765F949D70D72F070A697D5754E36A
3793:10ED00007B77CD6F8913CAC53C8771C01F940653AA
3794:10ED1000494AC687C9F4EF9BC84D57657A55C61155
3795:10ED20007273942EE62B212142C613D2C2BF5748DC
3796:10ED30006006DC13F23CB69F2EE858DB43DC74DC43
3797:10ED400019C5C457430738A1566F07BA9456A91E70
3798:10ED50001BBD6FAF9E37B14723E4BB179AB3480181
3799:10ED6000FD3CBC01E998C1E9D87EE1C577EFA6DF9B
3800:10ED7000FB6B89CF46EF5BADBE898182E1FDF1D7A8
3801:10ED8000A63B08AD676FA02319EB21E4CF57337979
3802:10ED90003DB984B40572528371BE13D7C7B6BA08A1
3803:10EDA000B145EFF7E8A4B6591B5EEE4598CCB950D3
3804:10EDB000FD1AEC6729A7E57725B2BA19DB5D8DF35B
3805:10EDC000D4CAFBDFA97724F714C0FB48B2858E2391
3806:10EDD00074D1429EA555B4F55524417FB7EB9608F2
3807:10EDE0003C6FEB53C3400FE26ECE5A5638BCFFADBA
3808:10EDF00017D7CEC671053718DAFDFB3E3A5E0DC651
3809:10EE0000F77CF2425ACF409FC525D379DDCB9FB71F
3810:10EE1000069B935DF05D6F3ACEE7635BE9DFD3124B
3811:10EE2000D3E3B1F95FCF096A50CE6EA447DFC0C902
3812:10EE30005C3A6F6DFB141F8C6B347AFE3D6F47DCC0
3813:10EE4000A7FB22952E5AAFBFDF27811CA5F71132F1
3814:10EE5000CE0B72D176CC09F35B4F502EFC810AC7E2
3815:10EE6000F56C1C3ED903EF4FC9C01F7E5704C73154
3816:10EE7000D41FE8DF34E8A71BAF4FF2F69E8079C4B9
3817:10EE8000F16D774CA5FD1D2856B09E03FAF672056C
3818:10EE9000EBBB1291811F37307ECAF004B75981FE57
3819:10EEA00077125FC803F5121CF73FF2F13FCDEB1369
3820:10EEB000EDB4F5A5972BD0BFD5C40762522D6F696D
3821:10EEC00087EFFDEB59FFA73CB04902FA5DB7A507F4
3822:10EED000AF61DECF3DF03D2D90BDA95F02BA4DBEC2
3823:10EEE0003F82D77DDB7ED90EFD4BDD491CA00BF6A2
3824:10EEF0005659D2E0BBBD0B2739E0BD3340059FEA30
3825:10EF000003BFCF756F271DCFBE2A05FBB9AF8FD2C8
3826:10EF10009F9673865C3E906B67C8C3AF3E1F946F2D
3827:10EF2000E5E338CADB7D998FC719D279B94D055011
3828:10EF3000CE190AE135CCC7493C1B91EF360BBEB365
3829:10EF4000066F8479CB18246E42E5F9E8A78B274237
3830:10EF5000BBA27E73F9834FB5CC817E8F1F24EF59FE
3831:10EF600067C035D200ED4D837138E1BEBB41423DF3
3832:10EF7000154639F2F75908C98FEAA90CB2ECD55BEE
3833:10EF8000F0AE1AE548E881D23ED522A5C6CA591589
3834:10EF9000CAC13E2E07557D11E4132A67C72C944E33
3835:10EFA000A10B54CE287FB5062C38DFCFF4ABA88751
3836:10EFB000497E246B59CA70396ABBB86E36F45BC897
3837:10EFC000D370FDF1FF867CEDA3E308C6D16BA23DB3
3838:10EFD000216FE6F7A3CA9B2B84F2D646E52D04F4F5
3839:10EFE0000C581C79207F4D1694137755733B9397DB
3840:10EFF0000D286F1977B2FE4C58134639184DEEF6AE
3841:10F00000795CE50AD4BF9AC9695BDFFBDB6C301F12
3842:10F010006B08D71357DAE1DEFF00936BB39C99E5D9
3843:10F0200030D5DF8DF2E9DDD94FE0EAD9518F7C4D43
3844:10F030005B71A0FC2590C33690C3A2FF7FE4B012A1
3845:10F04000D6712A7769DAAC4E171DF7A27EC2F0900E
3846:10F05000B6B713D6F1EA6C1B5BC727BF7DDB3DF467
3847:10F06000FEA43519E97F723C7D5804F732CA5DBBB6
3848:10F070007757F666FA7E518684EF09598FF25D2341
3849:10F08000F0123CA2F253DE239179E950EE833D95D4
3850:10F09000F4FB577B890F5EBD9A2D637DC7FA0893F9
3851:10F0A000632E9F357CBCC7F8FB81CB240CF2B900E2
3852:10F0B00020097DFEE9F9FE2976FAEAF7962B8524E8
3853:10F0C00087AEC79C6F05CEA8E6F2FF6A86AC83DEEA
3854:10F0D00038B625254CBC585F04F8EDD5076C61990E
3855:10F0E000B6379097FB5C8400FEEB9FBA99BEEF7435
3856:10F0F0007D92122B9FBD7C1E3EE2F3DBC7F144CB19
3857:10F10000F4C03289E2A257F37251BE06F23E994230
3858:10F1100028A9EFC9FDC3877025A4590DA40CAF47DA
3859:10F120007CDFE50E7E59A2F3D31BFEC009F37DE11F
3860:10F13000F02733E04ADCE310778D86CF4A040EEBEC
3861:10F140006DDE01388454513E9917E59309BDCDC752
3862:10F15000806E257D0C8F91DA8D0C67BA185D28FEC4
3863:10F16000CA82EF5EE2FD6A3D4F719A86E50CF5B406
3864:10F170005A7BD60458FDF87D898BCDEB907EE174E7
3865:10F180007F529208C3896CFE4AF8F77EA5F9BB80CE
3866:10F19000B7FD2765DF36FA9DFF724F1589A3870EED
3867:10F1A0004869C8AF65FD467E6DBD705006BAD0FE99
3868:10F1B000CAD0DFD2DE6699E971C66725621DE97D96
3869:10F1C000DEA0DF45FBADBDCF239E1FE855505F2578
3870:10F1D000A26B071FC74B5C9FB4F179A20C85FD3F62
3871:10F1E00046FBFFD008DF570233C6F45BC8DF82CB93
3872:10F1F0004906BC5ED69F6EC2FFC6FECE57587BF353
3873:10F20000815E2431BDB648E9BCFECF462FB35E1106
3874:10F21000F5B6021D0B86F78B00538B7ECBFFFDE905
3875:10F22000DA067F30FBE504C819E93924833C56CB64
3876:10F230001AEA93D22A89E1723ECE7AF89636552B95
3877:10F24000E4CA23A19DB7D82F856B006FF87E807626
3878:10F25000E24091CD037A688267AFD213C36F8BF916
3879:10F26000F7A2DF47B7EA38DEF6B96F6741B9A3D72F
3880:10F270006FCB867958E4793B7933A5FF092E772D3A
3881:10F280005B6BB15CE965F2C82C98973C2667F3F993
3882:10F29000583AB9DEE9E0747B99AF9B6F6D0DE2F5EA
3883:10F2A000CDADEBF17A6EEB26BCBE7AF9790DE6AF07
3884:10F2B0002B3F17D7AF5AA5598967579598D6859789
3885:10F2C0003C14EFD0F2757D6B77CFA2E33E75D98207
3886:10F2D000FAF9547EEE8878A585CFAF28F78AFB0728
3887:10F2E0009540B7FA5EDA5DEFF0F2A5BDC6764B89C0
3888:10F2F000D40CF8AFD4F7BA42A87DB4A468BF168B7B
3889:10F30000635A2F641642BDADD2AF56CCF124EE47FE
3890:10F31000A9BF1BC7B924F28EE249495CEEB4D25DA5
3891:10F320003F07ED54A68F4A7DEF55E9B4BD9A82FDA3
3892:10F33000F5C817838A05F8A2BEE0109F5F17CEC7F5
3893:10F3400012B19E15C9B561E84FDF00F6B3AB401EA0
3894:10F350000FFD7BC822235F2EF1D810CF266C7F5083
3895:10F360002111902F2582F3748AD6037C719ACA31B9
3896:10F370007BDECDEE69BDF0BEDD6BD37C404FB7F0D8
3897:10F3800047AC37F0477DDE9C53BE22584F64C4978C
3898:10F390005D972B94347A7F1AD6574F943F4B397F21
3899:10F3A0009E8679073E0ECBB8FE09BC2CEA3B7A3923
3900:10F3B000E79122DADEE9B035EEF7812AA33CDEE2FE
3901:10F3C0004E36DC57658F33DC9FEE9BFD6600DAA37B
3902:10F3D000FD073C47421B0CFD3F0AFA0BDA7349B8A4
3903:10F3E000FE9FB852D5770F940B1BFB65EE47D7E510
3904:10F3F0009CC757D27A4F1D96914FABDCC67E555EA7
3905:10F400007AF314E8A73AAA5F806E2FE98A0EE33EEA
3906:10F410007D3825BC8DF2E54B05AF27036EA0FF6953
3907:10F420004B683B9584CD6F4586B19E537DEF3F3C45
3908:10F4300013F0AE5D463D57F1C78E9D00AFCE16DD91
3909:10F44000D709746E2512D2A9ECC20119EA5B1536F0
3910:10F450007EBF728D913E1B578E33E97FA37FA9D269
3911:10F46000C3FC44F37D17B1BE12F0FFD0FB0ACDE818
3912:10F47000179A0FCA20A6DE32935FA8C4C3FC4225A8
3913:10F48000E01712E5BC6498DEA7F7D8BEDFB4AE9BE8
3914:10F49000E53BA1FC5BC87AF0A790FEE5A3E096ED02
3915:10F4A000DCBF62D4B744D927C5E28A166B7332E257
3916:10F4B00086594C7F91FEF4B8FE2AB31E21E43EE447
3917:10F4C0002B4147E20A918C79307E5EC6ACFF385DF5
3918:10F4D0009AE8745CC57520C4F18B27AEBC9BBFCF86
3919:10F4E000E6F2BEB097EA4D58AF7DB20BF4C6A9CB99
3920:10F4F0004403793C4BF99DB5DC7335966FEB7A9BF1
3921:10F50000912F69795C064F5DF6A1FC062632F96DF4
3922:10F51000F7D628694C7FC69577B31CF492D0134573
3923:10F52000745E4FE5E53EBE927ED77558E8018B8E3E
3924:10F53000727598E1DED37D9B915F0728BF02D98762
3925:10F54000CBFD392D76DDFFAF9277B39C0FC9FF302D
3926:10F5500079677AEBD4A005C7537949C17AEAAE102E
3927:10F560005CC7CDF27F9ADB6F2FE96F6A3E580F0BB5
3928:10F570003E40FB987C66796776486B2FC1F6CB2EB0
3929:10F58000BC2FD3917F61F22EE45CC8ED35CBFB7FBD
3930:10F59000919C9B9F7FD3C2717F02398DCA7F08CB1C
3931:10F5A000ED4821F9E0676B91927CDBBD20EFCCEF59
3932:10F5B000632E3F4E16FE587BE837745C0D9459520B
3933:10F5C00029A937929E29C00F13267AF0FDDD969E59
3934:10F5D0004CB8FF3DE9CF9C4EAF250A3902EBAFA4F2
3935:10F5E00013F200ED92E4719135B309794C0EDA65AE
3936:10F5F0005A5EEA8DFC51A27426F7130FE0C16952DE
3937:10F6000030199EDB289D345A9E28E710271212419C
3938:10F610007A2DE542B7D4AE45D00F5F6CEDEB117497
3939:10F62000C7F5638DEBC3E9B45E1291AE4E8F8EF3D6
3940:10F63000A0359CE5D3609CE1EFDF0D7EABEFA9BE6A
3941:10F6400067E3D0DDF219C709EA07E96961F40C59EB
3942:10F65000927CCFC6C15B8BAEBDFEB792E8B514E815
3943:10F660003873381DA53E4A3FA083F2E7AB6027966A
3944:10F67000BA197FC9BF5775F0D310D91EBE3E4E3F91
3945:10F6800036F27E3C26EB37516443E4CA66A44F2B26
3946:10F69000CCBF06F4CB20DF8CE1AF85B28AE393EBDD
3947:10F6A000C8265C5F48C4027A64B4F9B02A44916108
3948:10F6B0001EBBAFA2DE6DE4FDB3D1E7DAECC4F325E7
3949:10F6C000D7F9FA23749EC8EFD93CB52E32F2E5166D
3950:10F6D000DEFFFB78BF403DA17D04F5537AC9BF53DF
3951:10F6E00037C55B27760BFA737A99CBB7DECAC62F7C
3952:10F6F000CAEF92993C85AE7DDE564DC84D3C6F8277
3953:10F70000DFA5BE1389E66F53388E7CCF932D7CBC6A
3954:10F7100021692CF2B090F3A55C49E70DC6576DA4A2
3955:10F72000E30E3EAE35BCDEDB25FD7F023F4C93028F
3956:10F730007F075752D58DF2073C0EE5A613FD5BFC03
3957:10F74000FD569053526B7C4F9F6FC7EF5677637C8B
3958:10F750004A3C3F26E93B65F6BE11BFD38DEF291F1A
3959:10F7600036C173CA2F449E0DCF3DD81FCA27C44E41
3960:10F77000EF1BF7DFF165A02BFDFE51AC9F9C337CA6
3961:10F780006F050591CEAED26C767D0AF88EDBA73B75
3962:10F7900056EB4857956CE2F6335BCFE6F3F5CCFEBB
3963:10F7A00047B60E0EB854F46B290E3D1CA1D7745702
3964:10F7B0004407BFF338D21D027B6CD54AD9A0E75766
3965:10F7C0009BD6972FDF695C7FD76CC832DC7FF5FE54
3966:10F7D0005CC37D70CB74437D6B77CE31DCDFB9BB0E
3967:10F7E000D470BF6E5FA5E1FBF54FD719DE7FFD99A1
3968:10F7F0001586FB0DCFDD1637BE29D6BB072DEF6D65
3969:10F8000008D071ED805731785189C62F2D0C8F1992
3970:10F81000BFA3ECE751E6413982AE08339F2AA6F830
3971:10F8200067CF90FC6C36ACB71D216F064005DDAB91
3972:10F830006888FF437A775E66140F547AD6D5C75B23
3973:10F840007F457F145EAE9CF454C2BCE98AB19CC271
3974:10F85000E3B59AAF1FFD30E678ADE25988EBBBB94E
3975:10F86000BFEFCA2919A09768DD1E8CD36A635B4F6E
3976:10F87000471D1FD584631A1F6FAF1CC6999B785C08
3977:10F88000F38BFA65E8DE58C715EDA711F78838F94C
3978:10F8900012569494789F417B6C09F40FD6E7228628
3979:10F8A00077ECF41F5B6719FDEB78F9C0FD2E2BE0B8
3980:10F8B000E34095B19F751C47513954404F94E49BE8
3981:10F8C000DE433F674039235EEAE4FCA8293C5E3E04
3982:10F8D0008FCCC379E072BB4CC86D35F3731057FC05
3983:10F8E00038FAE2CBB4D01C6CDF907FF05A7E6E12F7
3984:10F8F0007CB7A489786C149F3C38779BAB0270BEB0
3985:10F900006EF5D5D2D2953EEE6FD265C4B3D7E5B3CE
3986:10F91000FBFA2AE67F5A1CEC463F60FD9DE16D70C4
3987:10F920009DB43EA2603F4C747DCA134E436CC0E947
3988:10F930009BC5E99525E8CAE928F4F8A40DC679AC79
3989:10F940002F32D26B29A7A799CE4B391D979AE87809
3990:10F9500014FEA074999B808E4B381EB5CFE5F6DD62
3991:10F96000607A5CBBF129EE1F13FCA398D635A13F4A
3992:10F9700086D637CEBF8F811E079CE7E23885AF7BE6
3993:10F9800089E4A83CAF614F39F8C933AC86F8C54269
3994:10F990003ED6923C16EF28C99011F797B8DF88EB56
3995:10F9A00067067A57CF8BF2E7D15E667F34BACFC94C
3996:10F9B000304F75790CE7EFE4F411FEBF56EE1735C2
3997:10F9C000F7EBC4945036E0A3939742D99B8BC0FFCA
3998:10F9D00023219FB4CDBA379BE50BB07EFA797BAF7C
3999:10F9E0005C0CA1FD76B277E4F8A2C0F966BE29F1FD
4000:10F9F0008531CE5802FE62DA5E6D3F5D83E8D01736
4001:10FA000046FE59F61402AE8E28D09F7AF75A05FDAD
4002:10FA100065EE0605FCCBB5EEFD95400F3F09EF7096
4003:10FA2000825FCD23F92240C70226BFEBE9BF58F918
4004:10FA300015FDADE90B2A20EF351EA35DE3E7FC566B
4005:10FA4000ED363DCFAB417EF39BF86DBBE0B3EBC928
4006:10FA5000F5B17CE6E7F3A25ECCE1F21A9FCF44FC5D
4007:10FA6000E2DFB99FF5573C4EF72E8FEBBDB3D58340
4008:10FA7000D757B6E6E3F3E35B7D78FFF6D662BCFFCB
4009:10FA800039F879E9FD1BDC8FFBFAD600DE9FDDBA81
4010:10FA90001AEFBBB89F56F0F12E1E4FA996DBD0BFD0
4011:10FAA00058E70BDA5D31FC54C7FB8DAC0F38A4204E
4012:10FAB000BEFFD536E58802FC756E484E08EA8BE538
4013:10FAC000F5DE030F51BAD8BE4D82802B6D1DFFAA03
4014:10FAD0004CA5FC5F57EBB5AE83F642CDCA1CE0C720
4015:10FAE000C8BF2AB9F0BC7E96F58E38ED8B7612B57C
4016:10FAF0006FD66F2B6A8D76B05FF8D1FB832118E744
4017:10FB000084FE6004FAE777AB9E787EE1F689EBDC51
4018:10FB1000C04F8D17836EE0A7C689276466AF337F19
4019:10FB2000B8CAF95494F7BB8DF17C95F7BB8D3E872D
4020:10FB3000FEB6F58F4D0E44B952A559766989C7674F
4021:10FB4000F637ED94E2DBAD4956866B9D3CBE4A75B7
4022:10FB5000A60272062C0AFD9F40D906E44BD398DF1B
4023:10FB600022D917E47AD9B88EA7150702A097B40C4A
4024:10FB7000E2AB01F5A6F5B8816FE4E285E7619D256A
4025:10FB800005317A1BEC1EB3FD1F7B2FE3D2154A49CA
4026:10FB900087ABB91CA3AFC659A86916EBDFA3DCCFAE
4027:10FBA00021E8AB71FA96784EFE02F4EAA33EE68FA6
4028:10FBB000793483C565078AD7222E2BE176818DECB7
4029:10FBC000C1F249A419AF3B38BD078ACF11907B59C8
4030:10FBD000A1B83903FA630F87E8F74E937E573423B1
4031:10FBE000BD254A933580AF7B1583BD2115333D6F0D
4032:10FBF000077B1DEC188E5FA2765E905C05E28F118C
4033:10FC00004FEDB41AED3171ED552CC80F2EAB299F75
4034:10FC1000EEFF7AFA9DF842E927ECC4219C77EC6B61
4035:10FC200004E231229F50947FC5E46F52B3591CC641
4036:10FC30005CEF2D5646F705568E8F059EF09BDB71C7
4037:10FC400084809E2AB5A71CD2F07A12B5477A678FB6
4038:10FC5000E2B7DE86ED9F555CCC9EE0F940D42C9750
4039:10FC60000CF6895D77837D38EC7BB7C520A7C3FB95
4040:10FC7000CDE8F345F777093548E1BA54E8E1628603
4041:10FC8000279779289EA47F2ED3189F9E2997C2DBA1
4042:10FC9000914F7583BD555B5C731EF512B547D479E2
4043:10FCA0001CA7D3FE3741BDB49ED7278AEF86F489BF
4044:10FCB000E5EACCE1F504AA18EE21A17F5914EB3F47
4045:10FCC000085076C99F0DF5B2EF69D1F6ABF1FAC1D4
4046:10FCD000F556A0F8DEA59A13EE75E949C07B05310B
4047:10FCE000F800E89A6733D2D9A4FFAA86E93DA3BEFB
4048:10FCF0005D48F9F7086DA756DE540F2EEF9ABD6BDD
4049:10FD00000FBF8ADD117688276EBDA7E08F9B01FDAE
4050:10FD100019F10AF1B13C8ECA90A71EE99E2191B05B
4051:10FD200017FA6FECC7C26C931D96611EC71E9CC765
4052:10FD30000E85AE2374BE3AE83CEE41FB38BE3D254D
4053:10FD4000ECBC05DE41B4A784BD47B8BDE7A2FF62A5
4054:10FD5000F158192F5F7EBF4701FC5B6E37F9998719
4055:10FD6000F28F09DA530B88B1BF65DCEE2B33D97DF6
4056:10FD700042DE5F14FA52D8B55C1FDE22ECA9B291C4
4057:10FD8000E3CB9DA67CBA2ADAF1E66B900302BD8232
4058:10FD9000781319A29381BFDABD539B2394AEB7F8B1
4059:10FDA0001C2CDE42FBA9087D8E7462387B292F7FD4
4060:10FDB0008B4745FEF76B2C7E513F8ADFC25FCCE25A
4061:10FDC0000667ED125B0F42E44D12931F5EE961FA84
4062:10FDD0005A33F145B627500571204D917C61329C14
4063:10FDE0005FABB83D07DF6FA1A4A8CAA336F9EC78D2
4064:10FDF000F9E5DDE05A2565B40F4F7913CFAFEEEB8F
4065:10FE0000AF84E919EBFC1213CE3EDBFF3EE6750D25
4066:10FE1000144818F769F77E8AF68188EF44E977027B
4067:10FE2000F351FCC59FA0BD3294B7C5EB5B2AEA2B0A
4068:10FE30003E86F19AEFB88E25433CE60CC471E9F793
4069:10FE400067947E0DEC9045025F518A46043DBDD11A
4070:10FE50007C9308B7ABCEDADF4806BDF912C7F54789
4071:10FE6000FD726D3C3FE70299F999C5F54695AD3BAA
4072:10FE7000F35486E7C4BD98DF217E924F15313BFCD9
4073:10FE80006F0DF36EAE1FCAAF46FF60A460247BB453
4074:10FE9000DE44E7292A5FF738DE180DD78A719AE920
4075:10FEA000601EA7F93BA7CAFC65775AF5E9EADC684A
4076:10FEB0003B62BD33975F96202FA7BCD8E89F5C704C
4077:10FEC000D9989773A73558A2527A562AD2CE540F92
4078:10FED000EA3594A78E2B1AE29881FE8E9D30ADC72D
4079:10FEE00007997FB48CC8611B5B17EA216E27E44633
4080:10FEF000F0BFB91FA3B55F36D883F678F9E5FE2ABF
4081:10FF0000E0BF5BFCEDA8579750BD3A2E8E5E5D2892
4082:10FF1000F7ED1C07F2EB63FB3BCEFEB2BB0AEF35FD
4083:10FF200009F361F5B25C651CF0812BBEBF6A3EE748
4084:10FF300093E1F13CA1575D0AE006B3BF6D3E97BB6C
4085:10FF4000F9267E08AA4338E8A6ABB9A3CF53227E90
4086:10FF500018E81FB82F9E1F555C13E55DDD4D4CF46E
4087:10FF60006D33FA9FCDF5087F1091DBB2419E85FD80
4088:10FF70006B2ED7A4B2B8C7F1C2BB486C5E95D00750
4089:10FF80006A71B3067EF1AEE291D70B733E5C39F431
4090:10FF90003786AE9576633CF609457F10F8318A9333
4091:10FFA0001A98BD5ADC80F6EAD202BE2FA8F02EB411
4092:10FFB0004F855DDD78F321CCE712F95AC23E35F763
4093:10FFC000BB6BE2F398CF335ABF851D7FCA26B33887
4094:10FFD00004B5DB3D68B753DC17E7BB576C8C5E3F5D
4095:10FFE00055F4FD20AF3BADBABB01E28C8536DFB3E3
4096:10FFF00071E6A1D7C6E4BB2B41BCF55710F8988B2E
4097:020000021000EC
4098:10000000E3403A98D71B61C78A7D4A13DC4C6EEBFC
4099:10001000B81D5B5AD080F298E6A6762BD0CDC7ECFF
4100:1000200056D267B453976ADD5930FFE6F54E1EE4A9
4101:1000300076ED18EDD65D0EC6474117B1BBE97B875B
4102:1000400042A1295DFF1E972B8E013D76A511B407B5
4103:10005000CEA4A9E10371FC0D6F737EAB963718F83F
4104:10006000AD8CE312B5AA47037FC09941E6C74B3474
4105:100070006F0F99707A4E3E29B739E1DA5F0EF4A01E
4106:10008000F7BA0DAFFD989FFD70E1BA9C78F51D6839
4107:1000900052E2AE4BBFE3F3B65CE46BD7327FE4DDF4
4108:1000A000052AFA8527D4BE7702F9B49EF3E9121B1C
4109:1000B0008EBBAB50C179E9BAD9DB0C71CDAE423BF6
4110:1000C000E6A3B417FEEC9790AF5D562C19F24B04E3
4111:1000D000FF9601AE86FAEDCCDF79B79BE9E12E8D74
4112:1000E000E3179E37B291CFE999C31F3863F34656A1
4113:1000F00008BEAFE77E72137EA26A246E1C47E4211D
4114:100100007F5CCFFCC2778BF11E39B413E4AE8EF363
4115:100110004DFBA5756E94CF232C3FAFB1B001FD45CB
4116:10012000ED13DF52E17EA3FB4315EECDB842CCEBDD
4117:10013000DDC53F65F9917C5E37823F9EF2FB4B99AE
4118:10014000D3AD1E7ABF3C72B315FC9DC23F3B2C0E53
4119:10015000C5E329356CF8A4C6CDF0F589CC6492943A
4120:1001600001F492C312D02DE22049907FE6B6861D9D
4121:10017000F4BE4EE99902B825D984173F7EE1503686
4122:10018000C8F7F119BF55A0DDEB8ADF6B84714C2AEB
4123:100190003E84FEFEAC23873AD3693D4BF3894FF78B
4124:1001A0000CEF4F355F9FEECE60F94277FBC221D84E
4125:1001B0007776E10ADB4F51F1C21B95B0AC0D8FCBC6
4126:1001C000E804708888EB286E1E17E1F10972E5AA31
4127:1001D000143B6F754AD00EFAB7B1F80D27F4773992
4128:1001E000A75BCE61B901F8BBEA85395F013E2137D3
4129:1001F000DB5CD7D3062FB87EEE9CAAB1F777B17A35
4130:10020000E70769F9BA8243D9EB0A87EB9721F92905
4131:10021000F8C3D620EDCF99453FCB06DCF606D5BB1B
4132:100220001E6897EB2DB3BD645E57CD7931E67167DB
4133:100230002ACB6A6D7361BEBFEFF6C6F019D5036BAA
4134:10024000A1FF1B9FB4631E57DA91D75519F41BC544
4135:10025000EF3552948F36723EAAD398FE6B2C24E170
4136:10026000ED12F0DF87F5A52077AFB27CC30947DE3A
4137:1002700063F9A3A6F5A18BAF1BC2EFDC35F17D942A
4138:100280009F8F0F73790959A4587F9256DCBF12E6ED
4139:10029000C52C27E27E7E7F4FDCF5E15D1BF79B0CD2
4140:1002A000B2F71AD5DF10D736BFF7737BAA0CAE3181
4141:1002B000F5DC6763B8575CAF210FE1896F53F96FC5
4142:1002C000DFDDE1BE03F59486B87DE39143F910B319
4143:1002D000C93C7CA88AEB0BB4CB643ECE09C4837ABC
4144:1002E0006AA96667F103139F5B8BF747003E8B7526
4145:1002F0001A0C722533AA47E4583F441C3B8C84F403
4146:1003000037F362F2BEE8FA4E40AF54BA99FFD5CC4B
4147:100310002769C554EFE024502E8C89FB9AF9B64E1C
4148:100320000BBA219E4DE5E73C8B7FD2F50AFC137298
4149:10033000BD0FE793F3A785FE83F52FD967E44F6BD5
4150:10034000BE6AC02BE67EFCA3CD88FFC5FA9CE6EE14
4151:10035000C1FE2DD59AB3A1FD09EE1EB4B7A87ECF7C
4152:1003600086ABE033A1AF87F8AFF0A6C5A0DF81AFC1
4153:1003700021447EA6784E12E8C13A37C329C4E44F1F
4154:10038000EF728F6C6F749AD6BF332E665FD515935C
4155:1003900024572AC83BF33B753D92BE3F39C62FF721
4156:1003A0004FD6608B2DC6BFEE2CF8D2629713F40C9B
4157:1003B000CBDF2AA1EACB9A1BF5670ABFA988F70908
4158:1003C0003FE9307F66413BE6775945DE058FFF0DFB
4159:1003D000CBFB4910771457E1CFB46D6F567C3C5E70
4160:1003E0008278AC9EFBE106678FE20F65FE078ACF3D
4161:1003F0007E6E1B3F3A3E3BC8EDCC5E501EF4BADE2B
4162:10040000E6C2AB06F928B4AB5D8EF8B8ED656EB701
4163:100410005D8B7C9E94E13BD6CE4726FE12CFA3781F
4164:1004200098C9C184E2439DB178B8AC89D286CE9395
4165:10043000DA44A690D4C47CB77448EFFDD4C05F43BF
4166:10044000F878145C2CF8EB92ACFF19E898A85C1DC6
4167:10045000EF47A2F78D85B6D5906F45CB9109A9ECF2
4168:100460003A8D5E3B671CCAB6D0E7AF01FE8AE9470A
4169:10047000D7F78EE0387EA5B27D365D97D6E5003E93
4170:1004800038ABE8A9F6F163E71FB33CD9E7EA9E6D04
4171:1004900054FE8E66DB717D3EEA6638E4752819C32A
4172:1004A0004F9BD5E075F6B9A8EA7592CE959CE0739E
4173:1004B000509A5563DB27767B72CFFD81185CB91BA0
4174:1004C0005E4D84381FE39B07D51ECCC7B99DD66E01
4175:1004D000A3ED1CD3E4CCB5F47EB69DF1E3B1903529
4176:1004E0006EFEF36C3BC3CF9BD5C06CE82769DE84FE
4177:1004F00072D620C901907FE21B9B7F6E474BFCBCEC
4178:10050000D2CA68FDF3B1FEC3B47EC00D3EEE7F27B4
4179:10051000AECCB8FE763EEE0821B5202F8FA619EDA1
4180:100520004DBF9DAD7BF3A3F52F8EAD1FF3B3E6E278
4181:10053000F32538CFCFB1E7F9762617E5B92CAF4DC3
4182:10054000D051D4BB325ADF4AACEF08FB2ECFCEE3FA
4183:1005500006BCDF02E79BF39F163AD87C44E3A6046F
4184:10056000F56689C6FCF513FAC3C7E0BE9CF07D9919
4185:10057000D2DBB87FEFA8D58BF900ED8E694F6FCA3B
4186:10058000803C0923AEB7719E51EC3F946371BACEA3
4187:10059000714C49760EE2E10E923BA29D237087904A
4188:1005A000EB05C27F7AE500EE176BE1DF8B76CB4D72
4189:1005B000B82EBA5FB11BF72B4EE8EDC6FD89152E9C
4190:1005C0007E5E44DA37D1BEDEE5B897E1F9C99FE235
4191:1005D0007EE505D907E5787E4245F45F7903DB3F88
4192:1005E000EA62EBD402815F4D76C64B995D32E0C87A
4193:1005F00044B8FE84147C26C2FC9A067CEF8F7C6D86
4194:10060000C3214A57BD97B81CF4BE24C2E24C151C46
4195:10061000D75728E12C581F6AB2993FAAE54FDD59F8
4196:10062000B03E1CFF3413D78BEB94FD38DE498A179C
4197:10063000F1FC4213FEAFB01FDA0679138B14898CDC
4198:1006400023C3FB05FBD5C08E2871B3BCA0126AC5BD
4199:10065000819DF1326D1FFC65157FA2F3678987EFDD
4200:100660008D38A5562927AC1CC7FBD9CCBF341A9EA0
4201:10067000AE30D903625E2B943D556097B4809D41A6
4202:100680001FB5283B9474DAAF5D8304229BC4CFBFAF
4203:10069000CBC9B630FB60B2650DD08D58997DB0CB1B
4204:1006A000F5D776B40FE87BB00F2AB87D5061F7A27A
4205:1006B0007D301A8ECFB1333BA1FDE254B49F228E20
4206:1006C0001F66817E16F9E402DF0BFECB54CA4F8011
4207:1006D0003C2FE07C28F0BE4DE0FD2B9B089C275072
4208:1006E000A118F1BE8DF35905C7FB2D10F7027E3D11
4209:1006F0009F79CA0BF11881F7AFB898BF9BE37DB122
4210:10070000CFB203E43306EF779C1FC0BC8597B39943
4211:10071000DE17787FC89EFC8C78BF4CE80F8EE76BA5
4212:10072000386E10EFFBB9DE33E37CF3FB6BC5F98465
4213:10073000E3F8283E36F26FFBEE1C8CAF94B8EC6801
4214:10074000072CE80D0EDE4BAF995736FD662FCA51C8
4215:10075000B20F3EB3713B6CD43C5013EEA776C34E40
4216:10076000D87F539EC7F28ED2B25D55B09FBDC223D3
4217:10077000A1FF69985C98ED806C17DA69954A83C887
4218:100780008F1B11EF57682EC4DB8A523326BC6F963D
4219:10079000AFDA3CDB887C9DED30E617940BBDA9DC1D
4220:1007A0001B42BDA9DC1B01392AB7737F8FE36FDCC5
4221:1007B000B1E73AECE2EB81D0D3425E3B1CD39460CC
4222:1007C0000CFE1AE26B25578BDD5FDCC1F9F2078A5C
4223:1007D00007FDAD1D76661F98F1D850798EF72B383E
4224:1007E000DEAFB033BCDF311CEF173B62F09BD3CEE2
4225:1007F000F0FE58F30A841D5B63B263DFB71BEDD8CC
4226:10080000447CFD215FD7A3F4F4325CAB7811D70AA6
4227:100810007A2A1CD7DA004FCEC4751571AD90E3610A
4228:1008200074B5E61A706D39C7791DCA9871EDADB10E
4229:1008300074315F2B46C1B5BB1C14D76A580E716D5D
4230:1008400085C0B5495E03AE251AC3631DDFCBC771F2
4231:1008500074A4313C6BC66389F107D76F265C21BE57
4232:100860006F4921D9E89F1BC225D3E2E2924438C4E4
4233:100870003CAE16C025DA5F029778709C663E3F9AC0
4234:10088000A2A39D1FC529BFFDC6212A87BB2E123CEE
4235:100890005141E0157FE48FC71A8A102F1087273A3D
4236:1008A0004E8157043E11EB638BC2F249057E49E449
4237:1008B0001F15D76BC52F2732FF17E21E336E117835
4238:1008C000C55C7F8795E199963FBDF59F8A6316EEDB
4239:1008D000A7DC47E5A45CD9867AC9AC075BC05B4D51
4240:1008E000CBBFEC22E110D4FFA773727A1C7D6CC6DB
4241:1008F00033669C32567CB328EF22E61B8E863B3A49
4242:100900009430EE936F51EEB3833E32E31A333D736E
4243:10091000B24903C40304DE49C4C750EE2E6714076E
4244:10092000252A47F538E2A384F5D82F5E2B2E3AEF1F
4245:10093000181117313D50E1667A20115ED9E57369CF
4246:10094000B179AC627D69CFCEF925EE37EF55F1DC98
4247:1009500084F6F353519F26C24B6D26B9EB003DA29E
4248:1009600045D7AF8474E91D407917B86A347D21EE0C
4249:1009700013E129B1AE9401E81F9F386E392589D95A
4250:100980007D0FE6303BDAFC3E9A8762C45524A31003
4251:10099000F9F81EBE1F3311CEA22B9893F9AF42D89F
4252:1009A000CE2A6E87A2CF701ECF43A05D0DE4913C8E
4253:1009B00058270276263767E64A2837CBE0399DD795
4254:1009C000F22A16373A5728613CFD4CB90DE7F5D4A9
4255:1009D000C72C4FB13D85F95FCFCC72F80ED02E7C7D
4256:1009E0000CF5D275F99CA3BB0870C0AC24EE2F485F
4257:1009F00067E35C921CD98071F339D32D21EF7079B4
4258:100A00007F3089F7235DC3F85B1DC7A3103FCC9AE5
4259:100A10003D7C9FC1D3495EAC1FF2E7B368B99D9698
4260:100A2000EE8773E8238785C55BCD74FD98D31D08D9
4261:100A3000638BA1437D9E5D7750FE77DCC8E256470D
4262:100A4000AB6C98A7E380103BADF7A1FC9C9478FCBD
4263:100A500021C6657EBE9F8FFBDCE47E5CDFCEF2BCF0
4264:100A6000DF8D8A14027AA3A22E82631527ED7F8878
4265:100A700016FD4A521AF6EBEC0BAF23DF9E4EE374E1
4266:100A8000D025B4D7CE78983C855C5A18F66BD2EF57
4267:100A9000ADAB46C807E92EAFC9677134422488AFB1
4268:100AA000C11F39C3E9BDA256C671AF70EDBE17E4D0
4269:100AB000F15CED1BC9702EE5D2410B01B95BE12A57
4270:100AC000B90B9EB7A7303E063A038E5A51F5A56F73
4271:100AD000C0F3FA7AE37C9C4CCAC171942A6C3E60E4
4272:100AE000FEB2660F6F97AE7E41353386FEFE9FFDE8
4273:100AF0008D14B3AE887C167B82FCBE44E39662F50F
4274:100B0000AE1CF5474E28DEBF07F6CD048AD879180B
4275:100B1000751E1282F86F9D8F44BC9CBF30CFA633E8
4276:100B20008FED17E2F29556BCBF2907FC97830A8B1D
4277:100B30004B9BD691523A57D9E9E04F67F37366AEB3
4278:100B40008C765E6931C3F9A51CE7D7E90D18EFABC8
4279:100B50007FA473770EBC97B3ABCB3D3C6E1A433F7B
4280:100B60007284F9E79699F83CC5E4FF2FF599F206EF
4281:100B700079BEDFD1FC675CC03F0FA673FE992DA143
4282:100B80001CBD2E791E01B910745A9224E233C4633D
4283:100B90008DE18F217EE0F36BA67B227A9AE964E6F1
4284:100BA0000B33BDCFA498E89580FE89E85D5A5CFEC2
4285:100BB00017A5EF05ABCD0A7CDB6EFD6D36B78F88D0
4286:100BC0001CA34FCC74BBA07952404F9C1B3C87B8F0
4287:100BD000EDF464CF57F07C2C2AC778BE279787E8BE
4288:100BE0003C507970C6CAF3DB53409E299F59A19EA1
4289:100BF0007A5DD21D207F8777DD8BE306397546E568
4290:100C0000C84CFF61F247FF57447F7387CB91399FF0
4291:100C1000ECB3CADFB7409F53BA2D4CF2E055E8D38E
4292:100C20007AE2FA4AECFE5611676FF73606605F7A91
4293:100C30005DAF05CF016A197C5E590BFB5D6B255CCE
4294:100C4000D634D28DFDD59A58BEC4D4A71E2090CFDD
4295:100C5000FEC864E2037DA535B1FC09FA1EF3270442
4296:100C60007E17E73AD2F73ACB17319EBF94E233E6CC
4297:100C7000FF2CEFAB403BA2939F8724EC0491F74AF3
4298:100C80004CFB5E1AE1C9C4E8FE90A64B616647249E
4299:100C9000D80723AE667BC17C3DDEF1CFDF003F622B
4300:100CA000599E8A7EC4B2C1881DEA7BB8A0A316F300
4301:100CB000DC6A2517C4E38E7FDABC03CE415A5EF0AE
4302:100CC0007E5C5CD27AE1091F8CA3D5BAC7970EFA75
4303:100CD000613B5BB71CD30A26AF1D01F7046BCB6BDE
4304:100CE000BD3312E799DC93CCD7F7F6AF1D7810E24D
4305:100CF000DE7DAA0FEC97C53CCE5FA7EC59BD96CE22
4306:100D000067E722C9B78D3EEFBC61EFA60E88639CF2
4307:100D100057D1DFD775E96036D819AF7DCF8EF6E8A9
4308:100D2000F14F0F3E8D79267DEA3C18EF50FFAFD78B
4309:100D3000D8FB8F5F3C097A6679FEF22268C7A190E2
4310:100D40003DC04FD70D36BF0BE725D4F5AA7341FF41
4311:100D50002CAFDD6FFF2BA053ED4FEDD783FD31E8B6
4312:100D6000A986F9BC2E2958994CF55E5681F73B1996
4313:100D7000D08E8FF874A46B3701BA8AFC04610F948B
4314:100D800071BE6959E44D2131743D3798930274CE98
4315:100D9000A9E5790C8BE400D8CBE75CD7A7A07FB29C
4316:100DA00096E52F98E9B51C707A2AF4CF3B795D9CC3
4317:100DB000F53BA7F60F5B83E00FBE81D9E7E6F77737
4318:100DC000707A3B7EB7EE008CD7F17DBB0BE0B5238C
4319:100DD000417EE6D464AEE7DD63F397083C43E96AFD
4320:100DE000B7C6F80129DE5F9F1C1377BDD6F6BF9A00
4321:100DF000CCF4C02539B819E85FCAFD2565DC5F92DF
4322:100E0000A85F25A3F831281F219D96831F6326BB69
4323:100E10004EA3D7CEC5DEC9063F06D1DDA067CF41C0
4324:100E20007C0EF098B26C3BF4A3EB02F36724E2DF94
4325:100E3000E579076FEB88D1775D563D1BECDCCE1B67
4326:100E4000DECE82F9FFCFE2DF213EABFD69139CAB22
4327:100E5000F550C1F2F1A0FF62F8F869988F6BE56375
4328:100E600033FD5A16E5A6102DCACF828F87F3A584CD
4329:100E7000F6A8E0EF44F301E5C01E157C9EA8DCB99E
4330:100E800045D3E2F27FB49E8B23CAC16ACE57770066
4331:100E90005F8D07BDACBB400F2FCC7A17EDD657B88E
4332:100EA0003E1EE29394EEDBEEA17A27F4AC1DE3E85C
4333:100EB000472FA978FEFAD167D6FF00D68DCEC10A9A
4334:100EC000D787B88E97BB56D07EDD00F64301CE4F54
4335:100ED000A712E337BC902CE2E6C67CDF9FB87E9376
4336:100EE0005ECED659AD9CD27B265F276EF43E93042E
4337:100EF000EBF94CBE9F62469B1A775DE61082146444
4338:100F0000BC6E01E85F70D8584E1BDA9FDE6C81F82A
4339:100F1000E08DCF99DEF37DD5E6FCC87F4F36ED7FBF
4340:100F200032ADB7F64B23E769FC0BB77B9FE3F9BF04
4341:100F30003FE1E70936F3F3049F877DAEF47A18F6B4
4342:100F4000B9D2E72FC23E577A7F84EF7325D9633B2E
4343:100F5000375E9CF7A4723A344D0C1BF6698AFDDFAC
4344:100F60002D709E12E001B7CACEA17351B405792A43
4345:100F70001C2F5A92FD7615F6737D44304FE5AFCFA6
4346:100F800077233FECE6EBAC19C788F31ECDFD52A3E7
4347:100F90007454C04F7574727075A0804F18F0CDDC1A
4348:100FA00009FB1F8AC1D3A91AB32B1BB9DD16BA449A
4349:100FB000C2CF4AD1F2A72F91830F313F5B4806DCA5
4350:100FC000017F51165EDC4B10C72D2EDA85F617E037
4351:100FD00040C06578FE580EF8BD5E443CB77870DEC0
4352:100FE0005D0CB7E8C370DC10DD64A413C3E745AF44
4353:100FF000A35F71716F7C7E8BE637ADEECC8BD9979A
4354:10100000503F18ACE7F8C8157B6E826AE22B733D3F
4355:101010006945CC7FBF249FFB7B783C44CCE78E4D59
4356:10102000DDE82FEF2AB279C0BF60C689669CAF1693
4357:10103000B17D64CACD6C3FEBE24B2C5E880C9319FA
4358:101040003D9F4DE579BE2DAEA00FFC98753E13EE89
4359:10105000E5E74B95E51BF1BC19EFABBDAA09EF879E
4360:10106000D87AB89DCDE7998F09DA51CFEE63FE812A
4361:1010700056B787F11F09A3DDB3C06D99F59007E25C
4362:10108000566C7F66C920417F4949AF07FD4F0BFA77
4363:101090004864EA0C3C87B809CF1932D16F01B87A9D
4364:1010A000D3A11E4FE7784AFF050AD909E7CB64DAD6
4365:1010B0001B749003D5BD09F7E3407EC338C647F6DD
4366:1010C00058FAAA49A77680082CE07E35F1BB1513A3
4367:1010D000EC87900F62E66FC4F898CAF94EC4BBCA99
4368:1010E00079FDE57D2CDFCDCC0769F68BEFC239CFDA
4369:1010F00015831A9E036D9EF7E171B0FE0F1E8338B3
4370:10110000CFA524DF7698673B9B67318FAADC26C387
4371:10111000FE0EA2B0F912F130B37FB5D4B46FCEDCBD
4372:101120002F715EC256CDB48F8CE3F80ADEBB26C7A2
4373:1011300021C3B9B5155CCF0CADDBF65C1ED762E7F9
4374:101140009CB6F6CD1E31AED5EA62E7FE11D7F2515C
4375:10115000F4DE76B68EF0F3054A8B4912E09CD23E5F
4376:10116000C2F8EB114B38D91B5B3E6CD857EEEC5BE9
4377:10117000B518CF6974B9AAC0CF564A58FC52EF25AA
4378:1011800018CFD4C9213918332E112F51B95F4C957E
4379:10119000D8B8049DCCFDBB7DD0680F7D2564DC0FE5
4380:1011A00071DB03C6FD1BB76ECA32BCAF599F6B78AB
4381:1011B0005FED996EB8FF92DB787ED0FF081ACF0FF3
4382:1011C0005AB1BAD2507E59C0787ED02DB5C6F383BD
4383:1011D000EAF4DB4CF2AB1BF8FBA8D4FD5D18BF258D
4384:1011E000F997B923F979CB468B2387D879426807D9
4385:1011F000C689B398F7BB7DA409BC609483CE5039EF
4386:101200003B6FA7D7B3AFDC03F12A9F82062E3F576F
4387:10121000A89AB072D56E166FA9CA886FCF0B3D68B9
4388:101220008E4F8873014BFBBA910FCA4CE70096B8FA
4389:1012300017C63DE7F33F34D3B91809CEBF18B67EC1
4390:101240008F757C3CCE34EAF878BB25A4FB98D39B01
4391:10125000787C631DD7507E179C4748E9D10D8F26B7
4392:10126000B2F71A95B79D69F978FE4586BD424919CE
4393:101270001FF577127DCE98F2D1DAB91F9FE82BC601
4394:10128000749E6986DDC3F84267F868A7A487E1FC0D
4395:101290003C731C55CD177154E339188E9D442FA013
4396:1012A000240A55108CEB8772ECE11D12E493B37D98
4397:1012B000A68D375870FD69BCA8EF81FC94A61B145D
4398:1012C000DCE7582D6B585ECD66EB931F72EF217FE4
4399:1012D000E2357DB5E1FC0EF77617C889FA347B9FBD
4400:1012E000683C6D13D5D5F1EC859B52181E3AAB04C2
4401:1012F00066A6207FE86E168F08E37968222F3751A3
4402:101300003E2E058E2EE44322F0019BBFEF403C258C
4403:101310008EFC56A53039F31748612BE497AE246153
4404:10132000EB0876659BDB12D79F5198C2F359AE5CF0
4405:10133000C573EE5471EE5E163B77AFDD749E65218A
4406:101340006FF7788A9DF181F7A021DEEDE7F2B0D842
4407:10135000B38EC4E25971FE8FDAFF3EFA99CE8C72D9
4408:10136000FE8E886FEDE6FB9A2B2F5902F1FA3F9023
4409:10137000A2209D9ED5AC71C7F700EF6FDB141F9EB6
4410:10138000B7DAF8B8859D17EF6E9C84FBBE53FE8AD2
4411:10139000307F17EBFF622EA77E777807498138F5FB
4412:1013A0003B4FC2EF87A8C536F0E591333734E0797B
4413:1013B000B1BBFB295EF446C797C2D71BFFBE8EDACE
4414:1013C0005CC0432765F4F7D4F4B27CF3A5C5FBF900
4415:1013D000392D3DB88FD1FCFB2525B5411DD6E5A59E
4416:1013E000F5911D887F7C9E72FC3D13E2DB86BFAFCA
4417:1013F000326CBFA586B8AB6D90F17DDB8F7CEDF8CC
4418:10140000FB206E811BF5FAEACCE8B96165173B76E3
4419:101410004208C67C6E98F9DC216197A9265C29EC0C
4420:10142000B13A123EA648C3FDCC89ECB1BD29DC1E01
4421:10143000BB81DA6374FE6FB7B13C5BFF16A9188CF1
4422:1014400046C7166922E8AFA7F83CBD5916C4F35B3E
4423:101450001A13ECBFFBDF5CCEDE2C8BE03EA7366FB1
4424:10146000D0ED1BA17C610ADB27A85E61E77EA87630
4425:1014700096D73574E5F93082AFE7396D782D75323E
4426:101480007B7BC1D5E7B2465A3F4BFC4102E3A1FA50
4427:10149000256EBED80BD03EEC178CB0F32BD4A6F73C
4428:1014A000ABE2C9B390C3CD6AE067A03F764A9BC266
4429:1014B0000ED403633FD772A6FCF9F5CD554D3F918D
4430:1014C00042EB7DCDFA0F1E908F1D41E3EF4E89EB6D
4431:1014D0006B5AD08EF477772483BD7931297836859D
4432:1014E000FBBB617F615BFFF376D4A726BA9BEBB9A8
4433:1014F000CFC9E653F5B0F7E417BA67798C9FA4CE4D
4434:1015000029F1F5437F07EA9F6DD5FF0DAE0F56C455
4435:101510008F43662A15BF06FA556B811EB8B6F51FB4
4436:1015200040FF714A92FE1EDC9729FAFBF0FD3F59FD
4437:10153000F50F989EAE727D981FDDEF90689E21702A
4438:10154000F1617E2CBD3E1F9D33EC814136CF7A5038
4439:10155000BBC67976D2EB1A585BE8F73D65F1E3ED4F
4440:101560004F717EA27286F982623F8CDF4DF478EB78
4441:1015700097284FE75F7562BE7B2800FBBACE4CB25E
4442:101580009003317A4E9C63D0D8CFECC281FBA50387
4443:10159000CC2E2478FFA3AF790F407C77E5142EC7BB
4444:1015A0007C3FC61DF71BF7498B766F4E95C6249F6F
4445:1015B0000FF3728DA94C3E1F4FBD46F9CC60F50864
4446:1015C000395515765DEB62F57E98CAF82C294D12D7
4447:1015D000F9E9F94E26873D29D7363F4FACC8FDFCC7
4448:1015E000FC21E441F519F3F51EE1F220F415ED6755
4449:1015F00019CC17ED6730E9DAFA9959F205F0B1D84C
4450:101600009720274B067F78C0C9F8E90EDEDFB38A42
4451:10161000BECCC9E477B97364F95DE564F2BBDA69FD
4452:1016200094DF5B9D4C7EBFEC64F27B9BF373C8EF51
4453:1016300047203F90E7C8FDF8E49451EF505C7C17D9
4454:10164000D4BF5891F83E6FF21B29C6FE58DC1B240C
4455:101650003A5B2C9F89C50D14BFEAB8AFE34D637D9B
4456:10166000EFF0758BEAB1CD50EF3BBCFD1DFFC6E836
4457:1016700007747C3E8E5C0A3ACAB60637EC8B4DB4D2
4458:10168000CE059C6C9D2BB7B17D17E4246DBFD03087
4459:101690009E6D40B7A1F184A865177F3CA1B8E3E92E
4460:1016A00036D617339EDD50AF18CF82ABA74694478E
4461:1016B000BF904757448675DBAFC45F17CE38D9BAA1
4462:1016C0003990AC3F09F432F397B886397F25DA1F99
4463:1016D0007356A90843FF4A14A6078916E99163C601
4464:1016E0005792DF20C61DB4C4FAD97AE3EBC9E79C50
4465:1016F0004372F71CF2DF3EB69F87F2F58FA19DDBA8
4466:10170000C7B956E1FEAF4F98DE7CEB4F5BAC69B4D6
4467:101710009DD5197BBF03D75F3B59DE4BC3C51C2743
4468:101720004C434F19DB17D938919DA7D62819CF55AF
4469:10173000FBB59077AEFFAE41BEDFCA913FBB7C7C6C
4470:101740005EBD40E9D3CDF5528F23F7DAF4D2DC2F1A
4471:10175000A0FD955308E2E3C6FD2A9EBF25E4E67688
4472:10176000985B760E820E79145FA5F7167A3F0846CD
4473:1017700037ED47309B10F76C2C1752F19C04BD17C6
4474:10178000C651ADE9E7E14AF5D04770A57AE8775C44
4475:101790000FF57D1E3D7402C644BF6FA23CD40D7C84
4476:1017A000A88479DE2FB747F8584BF28FC5FDBDA945
4477:1017B000B6DE035A08F206F3D93ED544ED46C0DE44
4478:1017C00080C49504BF6725AEE58FAFB58311B083A4
4479:1017D000E23AF0A3BECCED9436685F83F62CF8FBBA
4480:1017E0003FAF1119E3F0E6FA1A27F3753F85F3F3DB
4481:1017F000C475685FE9578CFEB54A7778F7EC22F834
4482:10180000BDB33BD83EAC2B77905585804F8204CE3C
4483:10181000E154E915F23745BFBDA953193EE5FD5422
4484:1018200089A42C2C88EA91CA7E12595084F806F3B8
4485:1018300066A11E0FAF275808EB7D9A02F1BED712A2
4486:10184000FC4ED3E372303F35C6DF584E8C7885CEE0
4487:10185000FF0DA9E371FE6F4C65EBD074B8D2F92F80
4488:1018600080EFFA9C4CFF3D2E0766C2F360060B41E9
4489:10187000D3F2BE54C62FB352E77E7E3ED941D8EF95
4490:10188000F202FFC6C6AB9FE5FAE1E8F8A00EED5400
4491:10189000FD6859E724FAC986E6063CFF78C175FD64
4492:1018A0009F9C85FCDB2C15E3818D8F18D7911F72CF
4493:1018B000FCF3D2B5EB19C41154FF2D81767710A635
4494:1018C000FF426EF6FBA30D13731E65F0911A9899F3
4495:1018D000D1736DAB5CCBF0DCAEAF3FE79D0DE76045
4496:1018E000A95C3F2F74B7AB6B615E21DF348E3E0F76
4497:1018F0000EF58F6A6FC33A15FFFC97CD1C2752393E
4498:101900006E4865F2BB16E6E785F1FA1DA97F41FC3A
4499:101910002FF4505061FA86DA4D21B09B565DDE748B
4500:101920001C96A9D5646F35C437285FFE2DF4F3CB20
4501:10193000F643C7D94F12862641BB941FFF8E8F678F
4502:101940000BE7C76F717EFCF6E719D7D753191F272E
4503:10195000C29F02870BFC4DF5FC23A94CCF7B9C5FFB
4504:10196000CCBAF10FA90C77079DD7B86EDCFA05B495
4505:101970004FF1C641685F4F2523E2DBE7F8F87F9C13
4506:101980003A846F7F0CDF2DB5EB3F81EB10DE2838FA
4507:10199000F91BC8938BE28D7699E30D25D69FEDA7B1
4508:1019A000F88BE7D5DD6999179513B53F3E0EA94F22
4509:1019B0001DC2214751AFEC6638A47EA8DFBEDE30E1
4510:1019C000C8E1242EEFEF307DDCA0F6DC09FA594D9A
4511:1019D00067F3A8A4337CF92A9FD7F7A494B8FECD67
4512:1019E000AE687B5DC85F5B587B72F22CF67B204251
4513:1019F000AF58256C47F887EBD3D977A29D45FC2AD1
4514:101A000070AAB99D5FA40ED95FBFC071DD2FF60724
4515:101A1000EBEF40BBFE285D23B17405FD62991743CF
4516:101A20004F8EEB12E1B818FAFD078EA789B5334443
4517:101A3000BF607C3D7BAB4B167CF2BBD411F8A39FFF
4518:101A4000F3C7C5287F5CE4FC31908AF884CDC3EDF0
4519:101A5000E38CFBCEFF90CAE8B39BD349CC97B9FF88
4520:101A60000FF2F743F4F09C7C2616D7FAF3D356AD69
4521:101A700006BF6593ECB3D0FBFF032FADAD0C008028
4522:101A8000000000001F8B080000000000000BE57D37
4523:101A90000B6014D5B9F0999DD9D94DB29B4C924D9C
4524:101AA000B281246C20D858032E21C42841264F022D
4525:101AB000448C88888ABA014C42802422B6B6D5CBA1
4526:101AC0006242785A637D142DB60B420B16DB88A94F
4527:101AD000A518700382F80EB68AD6DB1AC4F25084B9
4528:101AE00005B55D5A5AEFF9BE73263BB3D905D4B696
4529:101AF000B7F7FFE3ED3D9C33E7F9BDBFEF7C334B18
4530:101B00000891482A215790FEBF1C13AD17F38A7C19
4531:101B1000D42779F208991420AACF46C817F0373E87
4532:101B200054C629022129842C946BE29431744079A3
4533:101B30008BAB6604213DA57DF36B22F4BF2789F5AD
4534:101B4000BF21635D798A8BF6F7D27658DF49FF2D86
4535:101B5000127263438FE8D18DBBE1A3C373D408F342
4536:101B60007C37C944085DAF75A67B9FAB804EE334DC
4537:101B7000B9379281FD1E4C94B1DF84A13E2981F6D4
4538:101B80007BFD1451D6D37E374E13541F3D57253F4E
4539:101B90005702DF578E2261FF32A8C338B96F4EA4B7
4540:101BA000735CC69F57B988DA49E7A95288BA3542AB
4541:101BB000BFB17C9F136223CF73139F672261F384AD
4542:101BC0003FBF95EF6B4269E4F157F2F967389FAE7A
4543:101BD0004822B09F7566805FBE592D56E8B81551F2
4544:101BE000F0902A95AA80AF180A3A733E21B7D0B177
4545:101BF000263AC1AD80735A3E2C7A2AE1B98782C356
4546:101C0000990F94E01D0478ADB0A913605E7BAC5AC7
4547:101C100005E538499D08E54FCCEA242809F113521F
4548:101C200048C8144E3F53AC36BF184FFF51643EDED8
4549:101C300067656D5F0C85FF3F53397C092102F10B0D
4550:101C40005F5C02759F08F35FE1DAF78E40FB5FA1EE
4551:101C50008D3B2A858DCB500EC7F1BA88FB42F86CBC
4552:101C600037FFD065330D3CA7566EB779AC0087536C
4553:101C7000B19E5AD867AB73BDCD45E1FDB2A7D3EA9B
4554:101C8000A6ED1F271084E3E93875369CBB753B69C8
4555:101C9000E8A4ED629CD0D2A9835F8362C2F5E62AF4
4556:101CA0000C6F6F48EA5C986F8A556D84725A16C53E
4557:101CB000139DF7D6E4BE457AB8DFC1F1343F898D74
4558:101CC000BF4566FDC2F739973F2F96046F1CECC9DC
4559:101CD000B6EF4331027F4E827F51FE293EAA4C9FD0
4560:101CE000E1A0385B2EBA4DB42EE70A11F9D41BE2FD
4561:101CF000532FF2A98BF2A99DD2871C993E82BC7FFB
4562:101D00004514BA1CC3F7590ECF238C1FC1E9B6DCAA
4563:101D1000D123123ABE98F35B78BFBA2491F1B19BFC
4564:101D200054459AE787A17DFF10F7ADB07DE79B6B27
4565:101D30001E85FA4C657F45226D2EB9CF319D380046
4566:101D40001E2662C946385941AE491C4E749B04EAAE
4567:101D50000BADAC2EC5CE2709B4CC72FA568D04F863
4568:101D6000B599DD2E5AFFE0E80722A174B6F1A1D3A0
4569:101D700002A1F2627B8090E46C98478619E1CFF46F
4570:101D80008530703EFACC2569EB51D05C7994A81669
4571:101D90004ABF571605A69278C378F2059DCF16E87C
4572:101DA000F50A803F2BF1C65D8A64FCBB9C549C15F0
4573:101DB000E74BA3EBC279E4CF880FCEA33A3DD564BD
4574:101DC00024218981BE1F3563BBCD3D01CF456CC049
4575:101DD0006FA1732E44FED3F625DBFA9EB89FF6EF73
4576:101DE000FE3CD67D2F9C3B50798CED8778EDC0D79B
4577:101DF00062B51BE43B2116DC9F89FE077C362E482A
4578:101E0000F79BCBF70B8B14E8F64F069EE761B1E624
4579:101E100015C0C7AD56A2C6E7A37C7815F86198999E
4580:101E200076A0706C57049F97F66B7F68CEF26C902B
4581:101E3000D7AB25F77002744EB60994CEC7D275EFB2
4582:101E4000A272472E223685D665273B7FFB7D8E7595
4583:101E500071023C97C84CFA7C6CC07F46A0708877B2
4584:101E6000D6552BF41C321F2F50C0C178C1A59099B4
4585:101E7000F940B7BD2241F9E0447868FCA37E8308AD
4586:101E800087ADA86A08D057B944BC56DA5F70B279FA
4587:101E9000AF2401910C033C504540CB52E2C6F27E88
4588:101EA000D1730CCE6395295EE9FEAD26AB6F890038
4589:101EB000F8AB79B50AE15EAE1CCE0DC9B368720805
4590:101EC00020775883ABF8F5E55EC5A2C87CF58F1086
4591:101ED000DFFC03F98630BD3C6D28933B7BEC7D3302
4592:101EE000F57CBF5C61F26939976B44627CB65056F1
4593:101EF000CD89E7E0F3D55C1E8E4862F2B39544E6E7
4594:101F0000E36712D9BCD3EEF5B50FA2F09B9224B8CB
4595:101F1000410F576CA99506BB42FD06717D989CAA9E
4596:101F20003A60DDD6EDEEA33E07681F19F57BFBBBDB
4597:101F30006406CC5FCBE5E7DFF8BC6712D93E86F0DC
4598:101F4000FA41C13E23125CB213FBE1929D08E7F413
4599:101F500030B88871A3027EBA0E19CCD7310BB84EB7
4600:101F6000CF50261F872719D719CAE51F95FB1727BA
4601:101F7000A2DCF76540BF97CD6C7FE1EBBA43EBBACB
4602:101F800071DDF96CDD4920E781FF5DFB5E10757640
4603:101F9000D7A4808780DD033C6C2A0CC97BD9E51768
4604:101FA0005B687B7114393F8E9F9FAE330EF6455AA6
4605:101FB000181EFDA9EA9550A776C17858BF67A88278
4606:101FC000F2F2F54126B29EF2656DFAD0EF83D8D4D5
4607:101FD000E6F95522A3879EEC76E72C8A2F3940DC60
4608:101FE00016A4F306947BC55CBEB46EF71078EE1DA4
4609:101FF0004465A66EBC1C986525363CCA3FBED0FA27
4610:10200000533E6A0F0C4DF044C08B56AE5ACC44116F
4611:10201000712DC0710BF9B8F07EB68777C5C1FC2B66
4612:10202000A1FF370899CAF1430F8CFB9BC479A735F0
4613:10203000B03EAE8FF6DB9E3BDBB01F7C4EF9A83D79
4614:10204000F78938B097BA33A91E0039F5928872B271
4615:10205000DDCEF0D89E5E47F4F66899D32F1E8679C0
4616:10206000CECE26D329FE8A9D1E72913DB4EFE2DCCE
4617:102070003AAFE0C0F66763E83CDF4EBC08F12EE7FC
4618:102080007948A50DE0D249EAE8F965C52FBA695942
4619:102090001620FEF105D09FCA7981CDE7B2EBE7218A
4620:1020A0009D308FECA6F400E3027EDCCFF6A3E7863A
4621:1020B000A32DCF6490DF1A5F52BBEE5EC07FB97272
4622:1020C0004D79229DBF714B76BE48E7AF74F6C8B319
4623:1020D000F2506EB7029DFC2A456D4BFC5FB4E7667B
4624:1020E000109F19F03E218BE981294D826F3D854F6C
4625:1020F0007B989DF018E7C7B12179B716F9AB48B3C3
4626:1021000013D4C713CF6D07AF83E7E7B0837F06CF44
4627:1021100023D8C19B12991DBC19D6A376F09389CC04
4628:102120000EFE39AEFF15E1768D42343BB40BE673FB
4629:102130002472B9FA7B668F86EFFF1E7EFEE5F4AC53
4630:10214000BD4097924F6274CEF8F40ACEA7938E5298
4631:102150007EC91B48FFDD94FEBD94FE4E53BB49CCA7
4632:102160008E4E4FFE0BE4CB928719DFB73A7721DF13
4633:102170003DCFF9B39BAFDF9D2B56033E5F26A222D6
4634:102180000A03E76BCFF43841AE87F39F7AD648CF86
4635:10219000654EDFEA7CE09B7DB3DDB0AD707E946977
4636:1021A000593722B4EFC3C0876374F2890852E5053A
4637:1021B000F021CCE319017646A204FCD74AD8BADE56
4638:1021C0007D22EA89687C44E9E624E0AF1F2E006C9A
4639:1021D000DDFE29DD04804E289F9DFA3AF4B28AD3B1
4640:1021E00007F543FE0AF3E4F27A6D14FF4248EAD79A
4641:1021F0000F4212F0F74CA687B2135D4847B5C421D1
4642:10220000837E51C5CC2C902F745E7312EDFF66C295
4643:10221000B9E7B525F5F39F0DFA93BBD8BCAF809114
4644:102220003D66E0BC1392A8FD11619E0CBEBF1BA3CE
4645:10223000F80B399A7D92D76F9FA4C37A39C037744F
4646:10224000FD1D29EA60A86B7C53CCED961705A35EB3
4647:10225000BEA4DFDF677A2E8DDB2F644EFFBC390012
4648:102260001F0D9E9A1D50CBE583364F2EE7BF614967
4649:102270000A1BDFC0C63BA04EDB2BB9FF44E172292D
4650:10228000C2DBCA9E9FCF2F7A4061718B3ABE2F2945
4651:1022900051D1F41BC2B52A9ADFA584F43FAEE7669C
4652:1022A000FD4770F8D07615DBABD93EC62A0CEFE1BE
4653:1022B000F18368F8D1E0EFE4E723B96C7EE2ED87C3
4654:1022C000DB64985FA39768707B3381C16D9206B71A
4655:1022D000363E4F983C5825755A9508E7BC91D3ABCC
4656:1022E000568FCB35CA8768F1943121F8D4221C0A65
4657:1022F000D8BEA3C5572EE7FDAF4CEA875F038EB368
4658:10230000B1FD3EC0E5356D9F87ED196CBE3B42EDDA
4659:102310004DD8EE64FDA3F9FD7770FD3537A97FDC5C
4660:102320009D38CEC1C685C713B4B299EF6F7E68DC05
4661:10233000DD382E878D7386F0BE18DBAB58FBD78D4A
4662:10234000BF39F9BADF0DC16515F2BDCACEFFB7843A
4663:10235000FEF6EF637B315B379AFCF85B029B6F05FF
4664:102360009FEF4AF08BE91C8941922B39C06B8A752B
4665:102370004FA05DD282AA1FF447E967B20BE47485CF
4666:1023800068F30A541E4B2E2BFAC9311251C1AFED1E
4667:10239000F9FC5BCEBE3CACFB41AF2F8B29B182DF99
4668:1023A000B93C5B72833E2C794062FEF57113CAFB27
4669:1023B0004A713ECEB34BD1ECDCDB0D7EB44B715594
4670:1023C000C7C03EAC227131FFBFFA2AFA7C3C97D7D6
4671:1023D000BBACC926986F6C268B178C77D5A1BF4EE6
4672:1023E000CE323F5AA5FF31F9ADA25E96F93829A346
4673:1023F0008508581AFD6D99AC3E258E44BD8076D473
4674:10240000D880D1FF965D9547607E99E8C6D175BBAF
4675:1024100093EC0EB4A772C8F02F28FF58720562A182
4676:10242000FE4585E4F1031E26BAEA94527A1E4B86D5
4677:10243000C70A7238C7EC1F0CF184B60CD9ED05360B
4678:102440007CA8DC9A0DFE5607F5CF110E6AD2352313
4679:102450004278B214AB04E890E204F9ABBFB4B132F5
4680:102460002599D1F1F1240BE2B382D7B5E7E1782FBA
4681:102470004C8E65728458BD1FE6829C104802A5C32D
4682:1024800005A42F0BE8312D9DE98F26535F2AD44FE9
4683:102490009240AA8396AD1D525524FFE727DC2F5B9F
4684:1024A000618A6C2FFDC43CF17D80830471834B31C4
4685:1024B0002EE0B10C0BC50F347B558B2344B35BEF7F
4686:1024C000176B8EC13C82E23F03FD07DABF5E76EEFA
4687:1024D0000C26A7B552DB472D87CBE0642B9E6FE718
4688:1024E000DD6564960BF1F439C7D3BECB002AD973EE
4689:1024F00014C0D34BD98FE4405CCA9AFD9003F8B363
4690:102500008A30FBB4C205B29890476D9EB3493AFB3E
4691:1025100066624E2DDA4DC5592D684F2D8BE2977EA0
4692:1025200047C38F4627368F39790CC4BF165A61BC12
4693:10253000A4D4C442B93338154B6AF75AE0F9B20C47
4694:10254000563F1F1EDEE37229DAFE27805E80784D3B
4695:1025500046FF3952607EFADC2BE787CEA1DB5F7A3B
4696:1025600072CAC0FD5993993ED2F625E570BACC35B2
4697:10257000D25D4D32933397246BFEE205D3DDDB173A
4698:102580004277E1E79D98BDA8EA6212DABF765EED78
4699:10259000FCF4BCA3E13C15123BFF46C5A3C21414D6
4700:1025A000CE05008701E7B246D6FBAE64D397E5A31C
4701:1025B0004792865DF879BEC4BCD393BF049CF68C69
4702:1025C000539D204FDA52287D523CB509ACD4FADB3A
4703:1025D000397D3EC3CB2F2327867F89F39538851716
4704:1025E000401F8EF71C2C8365CA8B4781DA017EACB5
4705:1025F000073C94E63D20CDA2F5F6BB67A3FCDC3397
4706:10260000AE05F7BDCC6EDCAF56A6707C1467A9C8CA
4707:102610007F6D9CFF2A08F323B57ECFF37385F347C4
4708:10262000F87CE17CFDA84DBD0BF69592CCF61FF22F
4709:10263000FF7A45BDFF57CAF5D738EB1D86F8C73876
4710:10264000EEFF2DFB6CA8CD4B0F7A9AEAB57F8AFF7F
4711:1026500077863E013F29A3D4AAF7FFDAAC65D8BE3E
4712:102660002C53ADBAD401FA5874DF4B107EE80F7AC0
4713:102670000551D918C11F5C9629FBC7D3E71685FC05
4714:1026800014F65746F525C45F2C8A4A2E1A31D02FEE
4715:10269000DC652D23103739AD9067C11F3BDF7936DC
4716:1026A000271BFD4209FC423E3FFA854A0BE9C378ED
4717:1026B0004F1901BB06DA5D2340EEA8C463073D4213
4718:1026C000FD429D7C3A6DBD03F93D7C3D2AB79E06D7
4719:1026D0007CB5298C8FC3FD413999D9C19A9C0DA72E
4720:1026E000870A27A39B18BA7533931BDB9323C8FB78
4721:1026F0002F2F9FE694830B703D59B2075CB5EB8298
4722:1027000001095C9E6F27337EAAB13DDD06CFB5F986
4723:10271000C3F1434FAE423C1DEC1916BFA1F61AB5EA
4724:10272000A3CCD45E5B2984D65FC6E11D0D1FCB40D0
4725:102730005F47E0A303C9262E7FC2E3447718EF5F0B
4726:10274000142F7114B2B83E89007F91DB49CB29BFA9
4727:10275000C0FDCD32B3DBA9009D6616BFE3017F3E0D
4728:1027600053C6FB0822B538AFB10F3CE772889F45CE
4729:10277000D8DF9F939310AED60C93C13E23E41E8303
4730:10278000FD18EDDC84EFCBCCCF25003C73F5F00CCD
4731:102790003B77B982E706B31EE68D37B9899FF245CC
4732:1027A0007C1671A3C08A37611C56E37385F3B92682
4733:1027B0000F6C0A1B77B56318B3CF445B40A4E75F87
4734:1027C000E5A0F6349DA755DD857A551B9FC0CF6FD8
4735:1027D0001BC7E28D36BB5F5122C0E17ECEE7D1CE72
4736:1027E000D9A14A89E5747FF72BCCFE96C6996A7CFD
4737:1027F000188F62F15A85C34E2C29B082DD3E091C28
4738:10280000F814D8CF56451FB712F97EE2EC743FE7B3
4739:1028100090932BC2F61393DB570EFB97B2552551BD
4740:10282000B7FF0A876607F4227F479BEF3E2EE763D8
4741:1028300072DCA40EEC0D9BDB0FF75A316A5D218828
4742:10284000C5D85C3799AD6B8F550B475B7474D891C5
4743:102850002947BC8FF82F0793FF7649AD81717645E4
4744:1028600022704F66E7F672B479A3EDE37CEBDDC42A
4745:10287000CF3B603D5764BB62A883C90D69DCD61AA3
4746:1028800090D36484448647D013290EC6A7F1729F63
4747:102890000BFC754A8F9E48F3890E99C3FB5FC41FDA
4748:1028A0009ADD5DD2B56F28DD6FAB4D720B20BF8A0C
4749:1028B0008EF6BA74F0A17A7D9643173F106D1E9480
4750:1028C0006FA28BDDBB575998BFBD679CF19EAC8151
4751:1028D000C3EF7D5E46930BE31D9A3DF6AF39E79754
4752:1028E000C55F05E04E07970E800B01FEFA415B6B5A
4753:1028F000047949E1D3FE55E0B39AC3E5694ED7D1D7
4754:10290000E033CA61FA97D241387CCEC7D7213EF373
4755:10291000914311E0D86A97D3671BF8BF03ED904845
4756:10292000FDEA74E78DC6871A7DDCC4F14205A42157
4757:102930002E203BBCBDCCAFBCD3A8E7C4F96E2E9F04
4758:10294000C9590AB744DE3FD146FC71F1A1F9E572DD
4759:10295000633CE179078F0BC4901880CF69F754016D
4760:10296000F2142CA699A394A1B04487007A2215E60C
4761:102970001949C8035C7E86EBC11495F9C983498B5C
4762:10298000C0F44A06EECFC1F711AE07D3A95F03F139
4763:10299000183822F8D38369DD0A360851F11E5CF03D
4764:1029A0009AD05F76129F00F367903E2C87402A02F0
4765:1029B0009D3F9BF40A39147F0F54D48D02F9FD0E0C
4766:1029C0009CE392D039CE678F6AA5667FACFE37C193
4767:1029D000FB93B07DFE1F82F792321DBCE51423DD10
4768:1029E0007C597837707887C7F38A219E970DF13C20
4769:1029F000FF6EE053F92CB33F7AFE2E637CAF2D9B24
4770:102A0000C5F32AC4EA35780FEA92D1FD9072FB56DD
4771:102A1000419E936677A2CE1B168AFB594FFD4082DA
4772:102A2000380A918E229CF06EC885F22C3B05E53168
4773:102A3000B323C6F3FDCBD973AC70EF1DF29FFC221C
4774:102A4000B33798BD24733A287696A2FFD276F6DC87
4775:102A500076C785FA493BA53D787FADF947AD8159E9
4776:102A6000E82F858FF34BFEF7E0FCFE80EC827C9331
4777:102A70006E7E2FD67D6AAF214E1BEE076976D57824
4778:102A8000BEFFB28067DFA570BFA5CC222CBEC9E017
4779:102A900020F375DA9CA7F11EFCF9B326F4B74E7348
4780:102AA0007FAB18FC2C3BF377EAEC03CF794DCA459A
4781:102AB0008638BCE63FC138C8AB2B53FC22D8739A8A
4782:102AC000FF04ED2EFB40FFA9CA127805F637E51585
4783:102AD00011F342A2C137DC6F0AD73F335398FEF996
4784:102AE000560A8F1784C1538BF785DF4BB76BFC27D2
4785:102AF00079053DFF87AF2FEF9A88FB278A2E1E3B73
4786:102B000034144F14542FB92B3F143F8C10376C01E1
4787:102B10003AD4E2869A1ED3E8D842FB5AF19E397223
4788:102B20003CB13B7BEF30E617BE900CFC59A1B0B82E
4789:102B300091B63FEA17DE93A2C3477180E96DCB7F60
4790:102B4000B5F42DA1F02549C4CDFC83169795D62B5D
4791:102B50001592BC12F9CC86795AC50E01F94EF2C70E
4792:102B600060BDF2B8DB1743EB965D2F89A203D69BBD
4793:102B700045628410FD68791D6D810F5601FE4E1F60
4794:102B800097DCE7F2BB2B218866F0936243F844F9A7
4795:102B90009664A83F22791E4D413B6150689C08F91C
4796:102BA00060430DF967CF48EA63D06FBA55FD11F65F
4797:102BB000FFCFC3FB2F53305EBCF72BE13DB40ED3E8
4798:102BC0000760B39174DD7A36DA7839ACE342FAEF14
4799:102BD0008F4B2F22781FB309700671964F880FE232
4800:102BE0002CCF995F14411FB5F379AE201D2E7918B3
4801:102BF000DB2FF4DBBCD1B90EE8E2AD946C9CEF396D
4802:102C00009B67F528DABE6F83340AE236ADAE67AC57
4803:102C1000903FBB6B637B469F8EFFF66DF60C89E49D
4804:102C20001F6A25FD4B3015E1B9E259A98A2627B65E
4805:102C30008B501F609F6DE852609DCD1BAD3322C548
4806:102C400035E454C6EF576C60766D55AEC90DE2ADF4
4807:102C50009878A524B88F7113B79F36C48DD8DA5BE6
4808:102C60000ABA285BC47B0D5ADF1D4FEB716354F425
4809:102C70000F2E1EB115C75FFC49A99BE5517A6DF96E
4810:102C8000B4BE2AB774CC4A5A1F12EB39067C45F5FC
4811:102C90004C8784FAB4330EF200E2464C4D59496B2E
4812:102CA0007102A98964E7FE3D85D9799BCD1A5C251F
4813:102CB000CC83DCB55146FEDA972EE2FD1385DB7C32
4814:102CC000A8FF393D8E504A24E5AAB71CE058413A86
4815:102CD0005BC19F2A775DF3423CF90AF02BD8AA002A
4816:102CE000FFAF8A6287BFC5F7874284D2CFDE0D6D02
4817:102CF00037920879D4FD79D671AA2515EE57F8BD1B
4818:102D00002E714E45FA898EEF7B99BFD9E96F8DA55B
4819:102D100070BC624BC720FDFCEF42D0356520BE2160
4820:102D2000FF995C0AF9B71ECCA76D3D6A42F8BD9CBD
4821:102D300027F8040A9FBDB922B5D9E8AE72ACBEE14E
4822:102D4000B4BE9AD371F596FD6D8380E5531DB8EE40
4823:102D5000CBB94F58597EEB85C7AF47533E6884FBCC
4824:102D6000648A8F094AACCF45F1350FA6A0F5718A68
4825:102D7000D5E7A7EBF5D87BCB12E812CFA508EEF587
4826:102D8000402FB94401F9812E8889214AA175101973
4827:102D9000484F0E82F95CAB0AF3D6435C6C6586AB98
4828:102DA00013F20D778CB062BE59783EF10EA1E58525
4829:102DB00044884B250A28AFF7E6BE89F7747B332C8D
4830:102DC00004E815137EE9F3B624C6A7710546FBB3E4
4831:102DD0002A359BFB9FC46B290CED2B2EC7AAC6502E
4832:102DE000427A31918DDF9723F880DEF6B9B87CA066
4833:102DF000E7DD080691D4214D1F111DAF2F0D9FE077
4834:102E0000D2EC62413BA769E0399E137CCB87C23983
4835:102E10002EA6E7A0757BAE80EBDB9595B7132C8BC8
4836:102E2000EAE11E337CFFF7A632FF50A664970BF24F
4837:102E3000AD73F9447D7E8C5C74FB145B3CE631A180
4838:102E40005D99962BE079261E65F7B903F2B315E27A
4839:102E5000910DF8A156476A68BEB8CF9EFD36E4FFD3
4840:102E60004E2E12FC31B01F9EDF4CFFAF07F48B9C3F
4841:102E700053CBF2AF73D7E179261599DD709733C93B
4842:102E8000E6EB28A5F5978E4918CF9E9C3301F3AB4E
4843:102E9000C3D75FA9107F1585EF4B7912C23BE6A21D
4844:102EA00027709ED7F34C286F26433E36E42FEBF372
4845:102EB000AA511F1AF3B9278BFFAD9640B39BF12B94
4846:102EC00091BC8340BE4F711AE1673F6ABC2FAE2EA2
4847:102ED000B018EA93F3E4303DEC457A793193D1C5EB
4848:102EE0008B170BBEF5D9213A9B7434C90774067F42
4849:102EF00062A1018E8673C6056415E0B7EFE29F3DBF
4850:102F000008F72471AE65B7E33D3887BF4627711CCB
4851:102F1000EFF68C5F7F1BF49406FF703AB870FC5F8D
4852:102F2000535302F82FD0EEEFC3F01F866F8C416A27
4853:102F3000E7183610EFB87EF6407C6B7430E0DCF7B3
4854:102F4000752D1F4AF1FAB29D3E003CAF937DF70A02
4855:102F5000213C9D17AF392548372B950E1BC8FD988E
4856:102F60008B0ED9C03FD0E88288DD057A7BFF9F8534
4857:102F7000EFD2D5027326DD820FE27A6FC0A3CB4376
4858:102F8000EBBC98DA9FD7F5622AD855352C8FA3551C
4859:102F9000CD67EF5D15307D1A2E1FFE902AE2B81E18
4860:102FA000F38B19E7CA53ADB67908DC8FB542BE1D65
4861:102FB0003D9FBCBA16DE6820F2B45A949764B5C03F
4862:102FC000F2108A7F8BF27D8ED3B75488B01E5A32AE
4863:102FD000B84F17937BC5C9D89FCCD0F2926ADEC791
4864:102FE000FD4F63F50BDDD76BFFA47DFD9ED20A8BF1
4865:102FF0007731BBF96A1E97D7ECEE2936967738A55C
4866:1030000058447CBCBE41F0617E24EDE7A574D2C873
4867:10301000C9F66A6E079E2E7AA67D940BEC41D560A8
4868:10302000770AC53D68F7251419FDC14435D680FFE0
4869:10303000E4AA24433DA56690A17FDA8CA1C6B8829C
4870:10304000E79B86E7831BF20DF5CC962B0CFD87DC06
4871:10305000556AA8677B2719FA0F5B3ED5501FDE71B2
4872:10306000A3A1FF37D6CC323CBFD8D768787EC9A69B
4873:103070008586FA88CEEF1AFA5FBAED5EC3F351FE89
4874:103080009586E7A3F7FDC0501FD3FB98A1FF65EF1E
4875:10309000AC373CBFBCEF49C3F3B147B71AEAE30210
4876:1030A000DB0DFDC7077719EA25E41543FF32EB6F07
4877:1030B0000DF50AE53D43FF09CE4386E7135D1F1B6F
4878:1030C0009E6B743039F75343FB55EEBF85BDA75354
4879:1030D000C3E21C100F18068F3AB08C259DEC5E875A
4880:1030E000F462F960A1A73C0DE8F3C7DE7648486AB0
4881:1030F000F506FE0857D3AF170D4B60F6934AF4F26E
4882:1031000053CB4FA57E8B378692427C90D2ED684A96
4883:103110007741014B2548256B32C47B62B04C0A26AF
4884:10312000637B7230114B477030B6A704D3B14C0D9E
4885:103130000EC3322D988DA533780996E9C18BB11C49
4886:10314000141C8DE30607476199111C8BED99C1CBC7
4887:10315000B1CC0A9661FB90600996AEE0642CB38313
4888:1031600013B11C1ABC16FB0D0B5E83654EF0266C6A
4889:103170001F1EBC01CB8B82B3B1FC46B016CBDCE08A
4890:103180003C2C2F0ECEC5F29BC13B70DC25C1DBB1C0
4891:10319000CC0B7E0FDB4704BF83E5C8602B969706F8
4892:1031A0009760E90EAEC27EA3822BB0CC0F3E88EDB5
4893:1031B000A3830F605910FC11B68F093E8A6561F038
4894:1031C000092C2F0BAEC3B228F8732C2F0F6EC6F24A
4895:1031D0008AE033386E6CF0692C8B83CF61FBB8E0EA
4896:1031E0006FB0BC32B81BDBC7077BB05483AF607BCA
4897:1031F00049F0252C4B83BFC5F6B2E07E2CCB83EF84
4898:10320000617B45F05D2C2B8387B09C103C88655515
4899:10321000F0632C27068F613929F8298E9B1C3C8589
4900:103220006575F06FD87E55F00C96FDF22E6ABEB231
4901:10323000C784FE2CF753A3FB0B5E949766FE5E1CBF
4902:10324000E45663FE7F8BE0C378A1A3EF05A89B8BB8
4903:103250002C182FBC9904F03D813F903E3BC8D39E73
4904:10326000CB8F6440BCE9F5147FA63EDFC1CCE30000
4905:1032700015E27109FCD5298E5D29A04F6FA6CD906E
4906:103280006744D42F300F720ACF83BC59A20E16DDCB
4907:10329000EA7E98E172ECE7B7D0FACC6AA2E6D3FEF8
4908:1032A000ED975B30AEDF9E4FFD205ADE97CDF26585
4909:1032B000BBD298BE7C2A8DF9A5CFA531FFEAC942C1
4910:1032C00096C733F3F6E18C9FCA93CFE33731387C4E
4911:1032D0006324CFB3B505B2303FF602C79D48E57908
4912:1032E000B5BCFF836935CFA7D1766F29C96DB1858C
4913:1032F000FAD1F65D51DAF7803C086FDF6562F8F0CD
4914:10330000BE2D723FA12661EA39FC84D717F77EF300
4915:1033100085E1A1FA1B51FC504296B0FBC35DC7AAE0
4916:10332000AFA7FAF0EA22D14D2507F9EFC5DBC67D3C
4917:10333000389CAD0BF999DE5211E317338BF7EF4947
4918:10334000A6F5998B1231EFBE7F5FA5667C3EC5F96D
4919:10335000F6375FA047BFB9E537E33E34C4453D6863
4920:1033600077DDC16994A8E6BFF669CF915E59DCF7B5
4921:103370000E58DC05F2CF8CF3F6AA66DFB9F263884B
4922:103380006A21AA81EE19BC56C1FEC1F7275613ACBB
4923:103390001BCFFB50B8A2DEF7C6CBBE56019C7757B9
4924:1033A00002D05D5C5E809C2BBE0CF0943051A1CFAE
4925:1033B00006764C3478A63819FD2514AB4E2FC54F30
4926:1033C000DBDF45BCE7DA9D58A800FD7FDF9693065A
4927:1033D000FCE174327A6DEB7917E35B090501E2B524
4928:1033E000B1FB739705E2F8562C972E7663D9B6B8E1
4929:1033F00008CB95193FB042BC444C91201398C4644B
4930:10340000CEC17890B6BE397196B5C44DE75B63A95D
4931:103410008610920871066A2224D2FA12EA539C4D51
4932:103420006374FDBAF3431BF0C3D93417D64513BBFD
4933:10343000378E2BF0AB909710E7564A2557A81DFF03
4934:103440001CD8BE1EFC91D749DFEA6B018E2A7B1F78
4935:10345000A395BF6FDA5A329CC3551B1786F7303CD1
4936:103460008BB21BEFADC558DA3F2F3A5EF39C2C2F81
4937:1034700001E84BA2F4F529DF3751E34C309F86DF9A
4938:10348000D35200F3A95A85C87997851ADC155539A6
4939:10349000D73D0A51A4BFEAE5A92D6F5B183DDB506B
4940:1034A000BE621DF2B9B8BCDA9BA6163BE9FC8BAE36
4941:1034B000E472202309E5006D9F7E056DDF66627E64
4942:1034C0008A3749467EA14048803C5F6275254C3D65
4943:1034D000471EC4B2C58A2A99E17EC09500F05AC63B
4944:1034E000F3F5E00D65BD1CF857F50BC90B1F9E2BBE
4945:1034F000BCFF3613E7ABD8183C97C8E1A18D9BEF12
4946:10350000E4F238BBA6D689F1115706C8555A9FED8B
4947:103510001C83E7CF00BEA2F5DBB0AEF4D7EBB1BFA2
4948:1035200093F5C7449A0B90C3745C138E93FAE769C2
4949:10353000C1BAAD7FDD85B88EA3BFBE08EB19ACFF65
4950:1035400085AEA395FDE77F93C9C9CF24352189C2F4
4951:10355000A7E6AED935E5546F5F7BD75C2C3F58DCCE
4952:10356000AB825C3D4CE5491B856B4DC93007F83992
4953:10357000D75E35CCE6D2D16B3D8F6BEE5A6EAE0284
4954:103580007D57BA42ACD980FCB4C49037B7CA69E65B
4955:10359000FE0DDB471DE5F1BB29C9D5AFD9FFCD36FF
4956:1035A0009D3D3A8BB865A0F7D9CBCD21BA263AFE1E
4957:1035B0005458DB3693E7FB37C039568AFCBE82F39A
4958:1035C0006B22E1FEBC2BB5E61C7A872CB7104F04AA
4959:1035D000793C103E84FC95F2C167B61C8CCB524BF3
4960:1035E000CD1A695E0D4ED1D6AB8F12FFD5E0A4C1C6
4961:1035F0005B6B3FB47AB4C2EC6A9F018EB3EF1B835E
4962:10360000F1CA7A1EAF278956CE9FAC5F1D5D672B2E
4963:103610008C935417D03BD423C9176DDD3AFAAFBB56
4964:10362000F323C197C361A599E9F130F81E5E333CDD
4965:103630001EF45038FE2E14CECD1682EF530436DA27
4966:10364000591CC93103E76FE0EB13C74CDC4F035F34
4967:10365000EF859D717E13ED5FBAD1BE1EFCE093A590
4968:10366000DE476A403EAD37633EDBBD3B57BDFD23C1
4969:1036700078EF639D19EF4CE6C63D5C08F7B1A7B83B
4970:103680009EA30AA007BE9FE021DA9F2AC0FCF58412
4971:10369000CD7F52BBFFD89880F03C5ABEA17D2C2D27
4972:1036A000FB762CA886B8CB919D57ED05BF796E2C83
4973:1036B00091D231BEAFC8C87F5EF38746FB400AD5C2
4974:1036C000C581F57AA8EBE247737DE60FF5743E6F8E
4975:1036D00093B1AE8797490F2F57B9115EAE0A03BC5D
4976:1036E00084E7ED7E5107AFF298E10ED0EBEF3A5D43
4977:1036F000088F8698A5A9009F861D2BB09CB729C668
4978:10370000FBA16EDD059D89867AF3B674AF5EAF9C32
4979:10371000DEF7443CD0E142A7E8FD90EAB9E38BD55F
4980:1037200056B0634E2CAEC252C3FF82CE6CAFCD30CA
4981:103730008FB17EBA43A862F2D99530ED1CFCBAD0A5
4982:1037400029E33A1F6D62FEE6478BAD5E58E7F862EB
4983:10375000C5CBD6757A991DC5E035FFAE38EF87A386
4984:1037600043FB8B36EF3F7B7FD4C22787AC04DFD986
4985:10377000F9E21C7A3BAA5C923E93517F749BFF0C4A
4986:103780007463A5FFFB02E3A812D6B5799B3B452FD6
4987:10379000E41313B2C5B01E1DE73AACE3B7E87AC133
4988:1037A000F89D8971100B43F9CCEE413C700F42E754
4989:1037B0003B29D996431C41BB0769868568DF05D63E
4990:1037C0003ED9439B3EE91A76CEF7CC299EB2412FD3
4991:1037D00037583B6450B60D9D1797033F7DD2D59A5D
4992:1037E0000AF2639E78FA5B91DEF7BA3E9DDFCFFB6B
4993:1037F000CC01A3BFE8D3F6992D19F88CD8FACF4D98
4994:10380000EBC7A3BCDF53CBE76DDAB2BF722CDD7F11
4995:10381000D3B65332EC232DDD539B9E123ABFC0EF3B
4996:10382000811A371D94E17C47CDDE8BBE772EFB7E5F
4997:10383000C03E6D4E43DEA197F4027FCE2A221AC30A
4998:103840005EFF1E9537C75E3113B83F2467692FFAB4
4999:103850003C8B3F9D436AE2015EB3BAE6A1FC39F6B8
5000:10386000ECE4BD2CFFA8A310E8E31362C2F7DC3F31
5001:10387000216FC68FD6C16F75BA963FC9BE6FA3E5DB
5002:10388000B7D00DA6637E7A437B2FBC376621929713
5003:10389000CB25817DAFC627A03C6B60ED5E625D826B
5004:1038A000E758CEE49197FE07F5DB3A8CF2A97E8DBE
5005:1038B000B15E47A6A6427E77DD4366C8202273F537
5006:1038C000F28FC2EF8E7466D7D7939676B0E71E97C5
5007:1038D000595EF72C854883A91E5AF0EBC70B6B691C
5008:1038E000FDC17476BFF311F733E0BDC774FABCF1C4
5009:1038F0002E9FACE60D3CDFA1AED1D3C7129C8FE961
5010:10390000AD46CD6E252E88E30F867F0D8D7EFEC1E0
5011:103910005D22DE3B0D86769D7C9EBDDC78BEF39DF0
5012:103920003FFCBC84FC00CFDBB8E91AF4DBB4F368DD
5013:10393000F8D2CE63DE14F93DDF27D30583DDB49DD5
5014:10394000C34FF3BB9F0FABBF10567F299DD9F72103
5015:103950003F9DD1B799F337A5FBE781EE1758039543
5016:103960008C4EFA64FD7DA81CEAF7C2B9FA5938BF3B
5017:10397000D07E2FA58F89DE2F2634DFEB91E65BF01A
5018:10398000EBA79E057FB4F1970FC7C365D031A9237C
5019:1039900015DEB398BF71693CC0E9A8E48D07BA3958
5020:1039A000E613AB22C14B1AC4E506516D02C57B93E9
5021:1039B00046FFC54BA6807EFFF346B3027E61F32629
5022:1039C0008B1FBEBFD4D43517EF6B68FD20AB2FC360
5023:1039D000F72A9BB7993FD0E3B5F1670FA7627E073F
5024:1039E000F10E66F7E9FEC1F0E9A0A60D7FAA043F3B
5025:1039F000B99904909EC3C7C1FAC12494D7B572C2C5
5026:103A0000C0E75ADCB4993591E6AE55A7206EDADCF2
5027:103A100035F108F07D33913ED0D35303D034F557C0
5028:103A20003E4FE779779791CB40BE68F020BE149463
5029:103A3000CFAD9B7F38F220DDCFF10DAFC40B7A7F85
5030:103A400095DFB79FEE9CFD7EF239F4C3094AA7FAD1
5031:103A5000F73134B9EBDA46379046ABDDAC9C6FF604
5032:103A6000C78FA5709DBFCE8CEF87CE7FEA899F3E22
5033:103A7000067944EF5AF0FE63DE537BDEBE82D6E762
5034:103A80003D6D7654B363D8E03E58C34B33FD1FDC25
5035:103A90004F6878687C668F0CEFCF403BF8071A3E82
5036:103AA000E63DDD23931103E157D6D923F7D922E070
5037:103AB000A5F36025BE67B4F92F32E0FDD84E81A48E
5038:103AC000650F1CDFB06E0FDA310027C423C7533FE8
5039:103AD000DE06E0CB3F657B01F653406E9F0F5F072C
5040:103AE00040AFA6205DFF623BDD47C3EF2D6E8043F4
5041:103AF000C32FEE8887F31C915A187D3FBE3415F210
5042:103B0000DC1ACCDE54054BD6DEF0E33B91EEEAF74F
5043:103B1000DF99CAF20ED5749EDF910EE7BC6DED758C
5044:103B200078CE3AE241FA6B785CAC813C98CF255272
5045:103B3000F57404FEB89BF3C791F514B9F49C4740A3
5046:103B40005E3A42FE8EF65EF39DFD7110760FF939F6
5047:103B5000BF879C3A48CB5B67F2B79F6E372C43B95F
5048:103B6000FA51A69A06F793140E9A1C45F92AEEAF5D
5049:103B700048637862F218C751FA2B8376E8DF6BC688
5050:103B80007B61DD382E3FD9FA8BF8FA74DFB1608F94
5051:103B90001C498DFC3ED0A67EFEA7FA5647673A3EEA
5052:103BA000677CBF6105E3738DEF7DD754C1F3CF7E92
5053:103BB000C7F808C6813EA2FBF2A7E1F39E6902CADC
5054:103BC000050BF147E2EF0D66CEDFC6E7D462477B17
5055:103BD0004EA313BA7F09BE4716A217BA4E12E201CE
5056:103BE000ED95BA87E8789D9DDD0CEB623F39D49E58
5057:103BF0001DE2E37A2E0FBE3DC8280FC8DA940B8A67
5058:103C00000BCC37FB7EFA18F02FE557AF0BF8D78CAB
5059:103C1000EFDD7CBC65F7DB37523AFFB853E35BA3BB
5060:103C20003C0DE7DB86AD77627C309C6F3FCE682130
5061:103C300011F93683BF3717CEB7197DFF5679AAC160
5062:103C4000EF2761F0A3F2F127DB5DD1E1182E1FC74A
5063:103C50000E72213CC3E523FDFB1D291C48871AFD7C
5064:103C60006974D7F8F30543400EF5D3A7467FFDF4FA
5065:103C7000A9D15FF8798DF01B20DF20D949673F98E3
5066:103C8000EF255E3BC577608788DF4B3AE90AC4437E
5067:103C9000FC67690CB915ECF0930AAF27B27A20459E
5068:103CA0006E0739A1B5076258BCF2644D203E5167DA
5069:103CB0005F1FEC16E321BEDBE78BFC7D37CC48A40D
5070:103CC000EBF745F9FE9B168F38191B3F12D78BCDAA
5071:103CD000F201BE2A445BD65D9037DA21E2777CE6BA
5072:103CE0002CB93E1EF2434E760FBB7A066DBFED2512
5073:103CF000FE193FAF2AA55338CFE6783F4ABC8F1450
5074:103D0000D3F3CDEE66F6F39CD591E944BB37AFB360
5075:103D10002D92411E51BB35441F049EB3EF2C34AC91
5076:103D20000D6BEF9E8CF4D418464F1EEE1F1D1BC466
5077:103D3000F3FB479151DC3F31E9F3412AC4BCABE1CD
5078:103D4000BB9C27F789986F7DBA5B24ED70CE2D82DE
5079:103D50008F007F7B53902E9BA8FCD0C77F8F03DD05
5080:103D60009DE33DBAE3BFFA43E1F76897F9CFBE3769
5081:103D7000F247B43CFEECBB173D07F55F1FC87A8FD6
5082:103D80000CEC5FB6F3CC2D20FF4FEEB4108CABECF7
5083:103D90007C31EB7B50DF6EC1BCA393F75A54B4A7C0
5084:103DA00077DA318FEE64268BA7B6EEF8CB48CCDB02
5085:103DB000266D8837C760E6779CEEFEDB1FF1FDDAE3
5086:103DC0006E7A2AD0B73BE3D01E6FDE1EE30327F5E1
5087:103DD000E48EBF14EAEF2FBEEE799A6416BF3F69F6
5088:103DE000273320EE753291C5AD9B9FBBFC892574AE
5089:103DF000FD055D3D32BCB753F6FCDF4782BC39B9E7
5090:103E000095D91127CC7D3F266E42860CBEE73E3306
5091:103E1000C5D709B0ED28AF3C3778E755DEBC487010
5092:103E200061703849E100E7A270690039190D1E85FB
5093:103E3000FFB1F038750BAC3FBFFB32BC7F08C1450A
5094:103E40005059BBDD6715F0FCAC7DE75F46823CFE58
5095:103E5000B87309EAF7F39DFBBAFFE7CE2DF82FE41C
5096:103E6000DC8BFE63CFCDE8FFAFA09FC60CE483815F
5097:103E700074FEEB6F61FD177637EEF702F9FF21381C
5098:103E80007FCA7FE2F9BF22DEB70A98BF723EBC3F0D
5099:103E9000F31F7BEEF3E1FD258E77BB0279122777C6
5100:103EA000FC3D8BE8CE7FBE73BFF97F94DE353BA827
5101:103EB000D7D4A214D0FDBD4B3AAECBA6E51BEAA7E2
5102:103EC0000E705B2D51EE694C19CCAFB0082CEF9BF6
5103:103ED0005C2768F1A55E43DE534603DA1B53D4FB2F
5104:103EE000D8F799A4965EC83BED2D9DED5E893DF215
5105:103EF000F17B02BDD3C6F1BAD1DF7A5D20AA40EDD5
5106:103F0000DB29A593F781BD77B52AA23D484BB403C1
5107:103F1000DFCAAA64ED45463FE38630FFE0FA19C6E2
5108:103F2000E7D7F1F9A693854A0185D7F40C49F151F9
5109:103F300010DD50D26286F3DC70B3403A74F1CDEB01
5110:103F4000C2E6FB2304D07476E497855F413FFC16FC
5111:103F5000223C4889766F771EF81106EFDE69A35878
5112:103F60007EB1E466F09BBEC08D7153EE879AF978FE
5113:103F7000B36D792FF0AD9918FD4FCD8F8C0667C2C8
5114:103F8000FD529C676808EE665544BF54371FC24314
5115:103F9000C3C797C58386BFAF8B0F398318EE75B53E
5116:103FA00072AEB5761EDC435821DF9DCE7BF56AF6F6
5117:103FB000FE88354F4038D61499F1FDAD3F996A0A15
5118:103FC000C170AE1E7D59D377D9B46E80CF5C0EC759
5119:103FD0003AD282762739FBC517C58578FB8776EB01
5120:103FE0005C9590ABA85F52572CF863E9F9EB25E29A
5121:103FF0004DC88738A8403ED0C7417DC63AFC5D9980
5122:104000001A9AE77CFDA3C9877F76F93E95471F5032
5123:10401000A41F8412F366D8EF5D68FEE3ADDD0C8E5D
5124:10402000CDF305DF50A423BF597FFFBB3983C5679C
5125:10403000DFBF7B34CAB992FB472430BFB600F379A7
5126:104040009AB9BD7FDAEB4A8078CEE9EE610910AF0C
5127:1040500039BDAF2C3E521ECF7EEE57FE76B115CB4A
5128:1040600093E542879880EF9D4C413D5C1E4340EEB6
5129:10407000848F5B91A1C5655AD8BD246179F875FC20
5130:104080001CF5746842920E6FABAF3A268D1C880700
5131:10409000F8FB4077AFF275E10B7E2CC0757F4C5F6B
5132:1040A00065A4EF13FE88CB85EA5D6764881F4CED3D
5133:1040B000CEC6EF4B4E2D37BE07F86006F7CF4793BD
5134:1040C000D1B0AFEA5D13E32F07BCEC13DD3114BEB2
5135:1040D000CDDDA7644F84FBB97078C2FC10473E6405
5136:1040E00076D7013C0FDD1783EFFFBFC6EF8BF2F8E9
5137:1040F0007721E1D341103FDBC0E17A2683C5D1AF00
5138:10410000AD2E31A7D075F3BA945190573688F73F4A
5139:1041100093E1C2E783F938ADDFA0F9ACDF4159691B
5140:104120008A74FE21598C7EEA89FB5B45C27F1EDEC4
5141:104130004AEEB7FBE1BDB8D3E5027F6F269CAE091E
5142:10414000F2C7E92AC107FA17FC58AC570BA8FF5F62
5143:10415000D3F2EEA6327DA9D17D389CF767980C7911
5144:104160000EA738DCDFE6F4A1C159836FF87EB5FEF7
5145:10417000545E8DD7C75BAEDE36EA17609F34750B91
5146:104180008A894ED524F5C9C087CDDB1E30C3FDC258
5147:104190000DFCF759885433527FBF7B2683FDCECB6D
5148:1041A000EEFCB1683F7EBA9AD9C7EA9C53F160072A
5149:1041B000BD6672BF3116F8F175D1F05DF3F0F2BD56
5150:1041C000C54A63B9593F6F36EEF3DAF92566080F31
5151:1041D000DD34BFC79CA6A3A73319EC7B415AFBA0D3
5152:1041E000F92ECC5FA4EBE13EBCDFB710C8C7C8EB2B
5153:1041F000EC2D8DA3CF6F6A496474D8D0D923639D09
5154:104200007D67585B4F5B279C9FA655C719EAB3CBC8
5155:10421000FA32002ED516FF2277043A7D2853BB8749
5156:10422000FA927A42A5743BF2FF073D71AA32D27727
5157:1042300050676732FAD5E987B448FA61E112571A34
5158:10424000C07FE18E6169C01C0B5FAA488DA41FDE90
5159:104250005ACCEE0F0FF0BCCB93D3A87EB854A71F57
5160:10426000A6C5207D848FBB2AF302F58386AF7FB37A
5161:104270009C790BF44304BEF6641AF5C3F4EE5AD4E9
5162:104280000FD3A789C4A58BC75D9F793EFD50927A55
5163:1042900003D6CDEEB80874F316F74B00AE50C23A11
5164:1042A000A027EECF64723F5C5F4493E7395902BFA9
5165:1042B000DF3E8F3CFF5F82B326CF175EC7DEE31F72
5166:1042C000488704E5F5C21B04FCFD92853B983C5FE2
5167:1042D00078338F4B86C9D71A90AF057AF9CAC6379B
5168:1042E00079983E68DE96FDC399F4F98D1D66B79501
5169:1042F000F6BF31246F0BF5F2F6FE4C49837396122C
5170:1043000001BF3366C61197515EE5809C3A34EAC519
5171:10431000BC6780EE5F63EF99FD89EBF15747BD58AD
5172:1043200000F1F4C37CDE67B9FC3AB1983496533897
5173:1043300094CD61F6F0822D22C2A1A98BD9794D9B33
5174:10434000047C9FB732FF0CDE1BCEDBC1EE0DE17BA0
5175:10435000BE253A3CCE7BADAF7D303C5F27E0BD67EC
5176:104360009D7B1E7BEF6F0D8B135BE97F902FB1223E
5177:10437000367E3DC13C1D15E3CD0B38DCAA2D81BD39
5178:1043800030BEFA67827B1DCA35637C7A41CEA46356
5179:10439000E01FCCDB14D6EE5E81F7190B20EEACF3F8
5180:1043A00047DEE2E7BB4DF4E73D0379816F88117F7B
5181:1043B000EFECAD7038347C4D38ECA77028F8EA701B
5182:1043C00068EE7E00F36FBEEEF90F64F2787B3E2953
5183:1043D000007EF9934945FEF7BE2CE27BC5731E189B
5184:1043E0009EA6CF53FA1387C36B264F7B3AF46B62BA
5185:1043F000EF1FD7AF7D7A0FBC1A3EB3938C82B07D8E
5186:10440000FD1AA39EECD7CB5D2ED4BB335B9E16E08A
5187:104410007BFEB789047F076C76BEC503F7AFFB63ED
5188:104420000228CF343A4CC892D877DCB8BD776850B0
5189:10443000A01CFD8A6D82827C02DFD3803AC5037C9A
5190:104440004F63F7E57FA9E470C7F84CF33686A7669B
5191:104450008A17E0B34A6AEF821EB989EA1DBC2FEBC6
5192:10446000EE3143FF06DA2F19E58E1BFD5D4D3FC18E
5193:10447000FD5D49AA0E6F3B0E32FADD28B84904BC37
5194:10448000E5D2FFCE85B768F8D2EC870BC59B068FC7
5195:10449000842C23FEF6C7F4568FC67B2AF63B40A435
5196:1044A0003B11EF553EEC188678CCE472369CBEC1C9
5197:1044B000DE77E9E24BD7C0C6F1C3F531982787EB29
5198:1044C0000E65F6905EBE84FBD1CDA417ED9AB47450
5199:1044D000CF5319BABCB0E93C7FA5FF5E37D4AF3EDD
5200:1044E000734CF47EC4598AF73F5A7E2DFC7214E651
5201:1044F00083F1FAEECCC20333E9793F5D2EE2FBC9CA
5202:10450000D79B5C6F17031FAF3413A0CB4F5F35AB46
5203:10451000CC0E8D43395CFBDA213384466A21BF809F
5204:10452000F6ABBD87C9DB4330196DFB3DD5632A7CF3
5205:10453000B784748E81BCFD69EE9E0AC8DBBEAE6096
5206:10454000FF52B8A7BBB64C79FB6D80EF0A91007C97
5207:104550003F585E86FECA1DB70B48D7EF2CC6DFC298
5208:1045600022D74DCB7EFB6DBAEECDCB53F09E6DA620
5209:10457000BAA702E86DF6D5761BDCD34DCE15894778
5210:1045800007C79B49EF5290DF335B6EBF0EF6DB40EF
5211:10459000F502C45D1BBAF757A4417DAD80BFA3D619
5212:1045A000ECF5C8F00A54EF9A5332C43FEA683F4032
5213:1045B0004FF35AD6AF798380EFF7D451F900E7ABC8
5214:1045C000DB20107891A497DA7F5636AF0F3ECCD41B
5215:1045D000BB968EA7F57A180FF36E48C4DFBB6B7ECF
5216:1045E00095BD1F5457B4642FC8A73A3A8E3E26BDD6
5217:1045F0001B6EC7F9E6AE1508A4063714657FBF0821
5218:10460000E67BD58CDF0539D0F3A80CFBBE85AE97D1
5219:104610004EE79F2DF655609EF5F70405F3A0ABBF5E
5220:104620008B783BC9F980647C87F199C0EBDC2ED490
5221:10463000F4E3C6ACA12CCFFAAE25ED70AE3E6F4AC6
5222:1046400036B844CDDB4EC960E77DB8183E3C43F137
5223:10465000C6F3E0767B0FC97D3A39B52B6B188E9F78
5224:10466000B3AD04F9FC365283F7E29E254C2F1F5C54
5225:104670001AE313C01E312BA837772FFDC62370FE17
5226:10468000134F99F1BEF444661FC6678FAC35E377CC
5227:10469000435AD78A28478E6C617121F1F1EB2AD3F6
5228:1046A000017E540E00DDED5E5B26833C3CE2137020
5229:1046B0007CD9E377A6B2B8AF517ED4B91A515E3C2B
5230:1046C0001EC3E443FD9AC8F7AB51E5C5A24A26DFF5
5231:1046D000C3E4C1828C768CFB85CB89666263F65D10
5232:1046E0003EC9877AAF3F1DE9B7E9553301FBAE49B3
5233:1046F000526E5903743333066E92295FF8F7807C4B
5234:10470000FBD427B8BCF4F94DB7FE660CC0EF30C03F
5235:104710001BF8627532DEAFD6F96A11AE5A3E62FD01
5236:104720001A233D6B794F3778C4D07B3EF47F373501
5237:10473000C41155D7EFC03D942EE97AB76E137CF0C3
5238:10474000FDA303F71CDC7B6701D615A0C3A6BBB88D
5239:104750005E5D6D47BA3DF09D534B812E6FB95BC0D6
5240:10476000FD13AFA71DF44AD31AC10571CDFABBD909
5241:10477000F87A3A1EE8E5C0A38C7E281DBB80CE9B4C
5242:10478000D63EB017FB6F105C30FF8175B5A8871B54
5243:10479000BC22C1E71B0EA2BD4CF501E60DEDF68A69
5244:1047A000A940E74D6D1605F0AAD18B467F07F9F7B2
5245:1047B000A789D53DF25AF87D8A2C5744BA1367640D
5246:1047C000237D356F3123BD347B193D1D7C4A443A2E
5247:1047D000DCBDF4FA4AA09F131B8528F447E9AB20FF
5248:1047E000445FE2E3661C5FBF99C51776AF65747DD1
5249:1047F000A48BD9A7658F0F47BFA6FE353361F1079C
5250:1048000062D3DB1FE7A3C370BA1BA097381D46A372
5251:104810003B8FB9733AE41FD4FE82EEDF15825759FD
5252:10482000FB77300E50D67E039E57E31F78AF05F21C
5253:1048300036E6742C61F98C12CBEFF9D2FB0ADBC798
5254:104840008321FD980FFA11F24FFC741F2F6E79022D
5255:10485000ED804F9E3C88F98DF39EA3F8A7FD4F6C29
5256:10486000B1133FDAD93E94338D5D22E69712C95FCA
5257:1048700078ADEEFD2D2D2F63DE2FED08F7C6AD16BA
5258:104880005F351DDFF8ECA191784F7E2FB353BD4FFC
5259:10489000B2EFCC106FDFC86B213F5362F921E1FA10
5260:1048A000D73684C5718EFF260EBFC7246CEAC17B44
5261:1048B000A6C6CEEBCD165DDC521C6266BF03F19B33
5262:1048C00038F69E19C53FDC2FC2FEF4BF27A1E5854F
5263:1048D0001CDFCCF8A7719B19EDA3C64DEB30DED7DA
5264:1048E000BCE914E6CF96FDF2A9788043F336D1985F
5265:1048F0003FB549F45B30CF4B3C6861DFE530E431D4
5266:104900003575B1F73B9A3A799E5058FECCBC5FEEB4
5267:1049100078D64B4133EF999FC5033F7DD4BB311E01
5268:10492000E049E7C3FCA3AB8BA2E4279D2F2FA9731B
5269:1049300005CF4BBA0A7FA7233C2FE923F807D5E31D
5270:10494000F94338DEB5BCAE4D4C6E51EC17467A0FCC
5271:1049500049B35FE63DF5F98F218FF6F8D68F7F0CCE
5272:10496000FB9FFF8F4F7F0C791D64678C02F644F329
5273:10497000936F61FEA136AE7A08B3A74E6CFE19E6BE
5274:104980006F9E78D78276E1891D47B2C05E38F1F418
5275:104990009954C8CB5CB4A302E3138B7E5586EF8792
5276:1049A00046F337813E7D17903F1A8E8FDD5DA2DF83
5277:1049B00046F7F9C93B16E4FFFE3CB3CE052C7FCF8A
5278:1049C000C5F3CBB644CED3D5F2A19ABAAEBD7A1C0C
5279:1049D000C8BB2EA6D7FBF3A3CE9757F63B8AD74B7F
5280:1049E0002F007F5B78FE60E75511F3CA3E817F5050
5281:1049F0003C350E31E6957DDE75DB4F1E83675D919C
5282:104A0000DFD3D6F8FA7C70D3F2802F1BA2DE3904F4
5283:104A1000F868EBCF318F0FF056ED02FDFF7916C429
5284:104A2000378F9A0318370CECB02890EFD5B8E30015
5285:104A3000F2CB895FEDC73C5BC2F3714F90FE3F96AE
5286:104A400037C96317CD1BEC2C1F8DC31FF2D55CF14A
5287:104A5000D8CEF3D2181D6BF96AD1F2D47E3E84D938
5288:104A6000415A7EF20257AFACD842F802FC084580AA
5289:104A7000AF8386FC3FEDDCE1F3290087CBF4F997A7
5290:104A8000D1F201B99D3E005F4C2E9F58C7F331FB18
5291:104A9000F32CA949970FF9414C1F36FB840391F081
5292:104AA000ABE55FFE340CBFDAF9A2F185C69FE7DF04
5293:104AB000F75783CB9A212CFF5F83CFF1B391E57435
5294:104AC0000FE777EAB7F887E8FC965BB9DFA2E59DC8
5295:104AD00069FB6DEF647AF9F826663786F3775394AD
5296:104AE000DFD37A6308F3EF9AB6F58C0439747CD778
5297:104AF0006F38DD31BA6EDA7250F672B9EDD3CBEDA4
5298:104B000028BF5FF62EDF37F57723CED7BCE554C438
5299:104B1000F93E92D4EB61FF1FF5323BE4A34E31E244
5300:104B2000EF20ECE67AA9FFDC7619FD2E313E16E582
5301:104B3000D1227BD13BF05DB7457619F31D5A97F032
5302:104B4000FC887BDCF83B1EADF649F8FB0F4B013EC1
5303:104B50003A3FD4AC78F07727CCCE9A02F0AFC2DFE0
5304:104B6000EB941D26E2D3E35FF2E2FBBD5386FE45E4
5305:104B700002BDD3BBD8F8DE48AFA4EC49A6F3F59646
5306:104B80000B6EB07707D29971FE6B54D1103F8358EA
5307:104B9000359CEBB49B7D0FCD6EF22BB40BB1C7F4FB
5308:104BA0003AD1D173B1DFABFE1F05EC5EF50080009A
5309:104BB000000000001F8B080000000000000BB57D06
5310:104BC0000B7C54C5B9F89C3D67379B6437D990047A
5311:104BD000121EE1ECE64D4258C2534539092426F233
5312:104BE00070414554D4253CC23389F8B8D4D2B24080
5313:104BF0008C88B40D824A7BD12E34A87F4B5B40BC9D
5314:104C0000050DFE170816ADB551D16AFFDA06880802
5315:104C10001A6005CBCDF542B9F37D33933DE764438C
5316:104C2000D0DB7FFCB5C39C7366E69BEF3DDF7C3336
5317:104C30009B48E89F8790752BED598A959004E295E3
5318:104C4000884C88D3AB04DAF208FE5DA1FF4B24B494
5319:104C50006EE775371647B34613E2608FE87BD701DE
5320:104C60008B44485C1EC9534612E222715E99D637C6
5321:104C700026686F4A0984AC77FA27D3CEC915F81B8A
5322:104C8000DFBD245EA51DC6B3D3FFAE507812C7D2D8
5323:104C9000BA3D327E9266AC27135D1DE1D108E90B67
5324:104CA000CFE99F4A48B94C21A3702495598231120B
5325:104CB000BE9F9CDD37026F522AF186E0FD148737D4
5326:104CC00040BF7738187C025E0ACF718047A5FF216C
5327:104CD0003C856D010B41B88EEBE1A07F92CF89F04E
5328:104CE0001D37C1775C0FDF30D59972B2805614A2A0
5329:104CF0005CA1F875D85B09C7F3793D9E0909106579
5330:104D000034E053E095BEA7FDB8A54DCA1509F0EAF9
5331:104D10009248268E676A37D075329ED769BF7BE18D
5332:104D20001FD711D27F89DA62A3F3F4D92517A0A186
5333:104D30001F85B51590A0B4DA0019CF3A443D64231D
5334:104D400085F4BB3DEFD9DA68B974E77BF8DE02750C
5335:104D50005A26C7AB13070C27E4FEE0305F5A3E7CAF
5336:104D6000373BCDE2C57AAB924A48C3347F9A653867
5337:104D7000803FACB16520212F92BA21127D6FAF2FF9
5338:104D8000683D7223F015FDEB0FEF0B5AB54278CF5B
5339:104D9000EB8484089DC78B715D75CD9E46EB9EAEFE
5340:104DA0007A00EA4D80FCEB61BC82D67ADAFEB0EA8A
5341:104DB000BB5B1D45C8B4E72C444A21647CA723286B
5342:104DC000011FB4F521241D9AD5C5015DBAF119C59D
5343:104DD0002F498D7CD7233FF2EF289C153BE9FCA798
5344:104DE000F967FB268E20648CC4F04A5C6D23A63BD9
5345:104DF000018EAA256A6AA4DDB4E7CECB1E0ADF12B3
5346:104E0000CA53D03EB1C2754B1E852F710BC5960A91
5347:104E1000DFFB1F00B8B357F82DC01EE349DB831238
5348:104E2000A527F93405E111E334EC97917F1B1EB3FC
5349:104E3000045723FFAA926FA89E7E6D26FA8519FD5E
5350:104E4000F61E43FAD5341F63F4DBBBF500D0BFA6D2
5351:104E50005972C5A8301FEF2ECA44E4F1E0049F3216
5352:104E600088D23526DC0074B59212DFE47CC4EB6393
5353:104E7000309F6E78E5F0F586D7174F6D7BB2887E50
5354:104E80001AE8B078B349045FE2BB1DAA0DBF2BF24C
5355:104E9000F89F023CD46E6A6B88A570BD76EAFD046B
5356:104EA0003F8537BBE37CA888C29B3D0EC5B86BDC51
5357:104EB000173BB61DB0D17FBE087C4C5FE410FF6A83
5358:104EC00097E36AF860FCDD858F3DC7103F16A8D3D5
5359:104ED000E7BB6D6401D0B574AFA40581BF63C8FDA5
5360:104EE0003E5A6E5729A351B8F6A9322F2546C70E50
5361:104EF0008FA2D2F6A5B75BB4202D137919997F3D07
5362:104F0000FF5E61FCC5F121E829F88890C6F8699434
5363:104F10008E79B9FEDD46BE792ADE43DF8F6F3FFE14
5364:104F200020B144DA6D5F497C73AD91EF28FFFCCC72
5365:104F3000D0AEECE1387F61E47BE04BE013337D6879
5366:104F4000BB109397A7E2611EFBDACFCB80EF6BA576
5367:104F5000ABF979EB4ABF6FA2B567F9F195C83EC0CE
5368:104F6000ABF9F9518E5FAA1902ED79A0B5259248E7
5369:104F700051DD2FDD7F14E05B6A6F4BB89DD2B7A681
5370:104F8000E4820DF0B03AFEEC0DFE28FDF40447EB90
5371:104F9000A55C878FCEEF60670CE2BB5B3BA0271D53
5372:104FA000E7DD95337D1329833E119750C4952DDAA3
5373:104FB000B3895CEF4ECC5A349929AD2EBB275D895D
5374:104FC000216810146A47CAE00985AF62EC2E05EC2F
5375:104FD0006719D1D94B37F6BB8D0C037A580D766D16
5376:104FE00052D62DA7C1BEB42A6D6B1229EA5BD32419
5377:104FF000B43F375F6A6C01DB75739AD560E72A5559
5378:10500000637D126176528C334DA374E7EF2FE0FF7E
5379:1050100007717E53558A5ADAFFD4ACB860804EF9D6
5380:10502000D6B177F926EAECC57B97E5FB7D85DDF106
5381:1050300033D92DF0E343BCFE3E96E26718CC73767D
5382:105040003D43D3D5F161C6A3192F133F9D3F99145A
5383:1050500075C7CBB5CEBF0BAF84FC04E6374993C907
5384:105060003A7704AF66FCD0BF29F0DD7B25F43B091D
5385:10507000FC820EC542EB95D74944F805657D7574F1
5386:10508000E7F099F16AC69FF03726F176EF00BE2867
5387:105090003F4D92B738801F2A7FD43A3199EAB1CA7E
5388:1050A000418CBE2444914BF17213419C015EB721A7
5389:1050B000DFB9ACE86750BBCEF8E3D3F2D3121D7F63
5390:1050C00072277D47E12C57A5201511C0CB71135EC7
5391:1050D0008E9BF8E2B87EDE66787F0FFFB82E0ABF9F
5392:1050E000288D7920F713DCD43F01FF2183A857A82E
5393:1050F0003D1AFDC9C844A61FA2DBC9F19DBEAE7E04
5394:10510000183E1A916F24E2EF7AEEA2FD84346B0A06
5395:105110004503996077A19C4C20DA9A763BA04246E1
5396:1051200038055C97D37CB7BB69FB1252B9A65D8F7B
5397:10513000E74F853D67F89EC0F13781040EC80950DE
5398:105140002ADFE8E72DFABB57CC6730190CFED08771
5399:10515000AACAF432EF4FCC2F399984240A6058B28E
5400:1051600007B749003F09D8FA44C6B372FA9ECE9AEF
5401:105170005EED46BD5E47005FE0B6003D4BF9FB5279
5402:10518000BB2304F010BBB5A38B2EE0C390592EF0C7
5403:10519000FB285EC895F8087C0FBB25E5645E04BE5D
5404:1051A0003347EC0199F2F5C474FF0F000F1DD23B99
5405:1051B00045802FEA97E5803E37BFBFF0714B0DBCAD
5406:1051C000A7DFCDC7EFF8BC1683D34DF926BC3F2629
5407:1051D000B8CD1D4D9FAF62FAD74E3D519D9C96C6EE
5408:1051E00031399F447C0AF8970763999CB5C42E44D3
5409:1051F00079282775F543697F7F8CBBF908C8592545
5410:1052000009E077652E231FF6C6A7B790F07DE0F77B
5411:105210004ECAB39AFCE800D2E7606C6E16D8B3832E
5412:10522000B14C2F0BFFE165B7EF5937BECF08825E57
5413:105230003EAE8D7A17EC4455C9888F46D2D262F7BC
5414:10524000D9809EF380BF285EC7027FD1B607A1EB4D
5415:1052500074E4AF20B49FB3D6C45FF664ECDF47D5E7
5416:1052600018C055AA59BFD5FBD55D78E376B2377F14
5417:1052700091B428248FE2752EE7D383B13101F0E396
5418:105280004A9FA0724CF13787F89F6F94000EABC114
5419:105290007F9F1B6B457F6FEECF6351DE69E32D75FA
5420:1052A00074C8F9F4F93ADA0FC95307EAED3A69D448
5421:1052B000B507FADB55E4C7B92EF6AC9DF691DE07CB
5422:1052C000FAA5DA8DE2936CB69ED7F3A579FC1EFBA6
5423:1052D00035B53B28919960570F5AD5815E9DFD7871
5424:1052E000D36DC1F99FB7676FB1787AC6D37C7BB2B3
5425:1052F000A68C88D44FC6C6CE8CE62788FE045EBB3B
5426:10530000D617E49BC6967191F5C563ABBF6E3D326F
5427:1053100048BFBEF8BA55737CFFF5C5A9AD5FE3FA87
5428:10532000E2690BF50F016F8A2F7F9ACE2FFADACD43
5429:10533000FC976096F635C8E1D3DC8FA41C943F6DD2
5430:1053400068F7EFFA2E9F404E50168BB193406C31A8
5431:10535000D5030A09588BE17BFF2A0BA5B73293A02E
5432:105360005DA27A08FD4F331E4E6795FE03F856C8BE
5433:1053700067691CE57F2A8F4F58D4A646F0B3DF96A5
5434:10538000A9CF4A475F3E07FDBFDB962FC4F2DCF191
5435:105390004B39A0174A39BE150FB3EBB5F14CAE6AC5
5436:1053A000E3991CFD31CDAF78E8F3564D768EA4FD20
5437:1053B0002DDE2B7B63102DE10CE0B7DBA6C8A9F036
5438:1053C000FC84DD8AEBC7834E46FF1344AA00FC949D
5439:1053D000BE17E3DB43CB47D34A723D3A3FF1D1B42A
5440:1053E00089582715D4E1A37CB9CCCEE4E10471330C
5441:1053F000B8D74ADEEDF4D1F9B5EE44E0CF8356627A
5442:10540000F047D23D0AC29BEE6178ACEAA4C2398271
5443:10541000F15D1D1DBF4A516DE0FF5775DAF039C0CF
5444:10542000817C196BECC7E361FEB8C7C3F8A9AA5326
5445:10543000C220C1C158733F0A7BCEF9DB4C87A7DC81
5446:105440001372603E8FA669B91EF45F5505F0533A9A
5447:10545000B2E563D087BDEBFF8004FABFF692141A61
5448:105460004CE7DFB1C78AEBBA0EBE2E38B3E750DF88
5449:105470002A5A2EDDF54102AC1FC7727A9D515A138C
5450:1054800000BE25AF527FBA10D9B9EF3DD87ECEE825
5451:10549000756C18BBDE2E5E7F3973A00FBFA3008E24
5452:1054A0008EF86513EC8120C07770953C13E846EDCB
5453:1054B000A6F0CB24D093657B642DB6A8BBBF36D5B0
5454:1054C00063E5FE3AA3E3432E364E4FF25DDA194F01
5455:1054D000823AF92E555405E02FED4CC0E7674E6D2A
5456:1054E000DB3895F27D20CD8AEB436A855AD05F94F4
5457:1054F000085FF0D13A9D4F0B9FCFE13DB7DD7E03B2
5458:10550000FDE79B607FE83713DBFC294CD8E9EA6EA6
5459:1055100074C4FF2A7319FD44B31F29EC5945F3865F
5460:10552000FA0104F01EBCED06E0C3530A013EECE6AE
5461:1055300067DB6FEEC19FDC807CF4DA9E5FE13AAA04
5462:10554000C8A362BD76CF8572E0E31A129A01FDD638
5463:10555000EC915D21FAF561B2A700EC8AB0FB022F55
5464:10556000A14B87EC5EB00BB1B26B35CCD37E8743D9
5465:10557000A578BAE15C610ADA3FBBB502F462696CF6
5466:10558000B6638E8E9F0FA6C815C0078753328DCF86
5467:10559000ED1B0BC0FEEDB3307DD472F26E471B7E67
5468:1055A000775B0AFA71C2EE9BFC561127ABCC96834F
5469:1055B000D1FC61226FD9144BDF4FCAB51219FCF729
5470:1055C000B645E80F74B3FB97FCB83E30DB7F8177BC
5471:1055D0008A6994976E7E6B04CF06FFF5690F8F97EB
5472:1055E000A96428F8A3A14B1B17039CE79AE35DABC2
5473:1055F000311EC1FC9D73ED8B364E81E7EFC8185FFD
5474:1056000039774946793AF8C6E2C16D3A39A61604A7
5475:10561000E97471F8D7675FA7F4B9F8799C3780FC13
5476:10562000B7B320DA7A59ACA3E8C8FD2D69087F7FAB
5477:10563000CB5814375CB7DE1459B7FEDA83EBD6705B
5478:10564000399893B42DC76CC01767A80B0FF00628C4
5479:10565000F1B753BCDEA4B5C92E1D3CFF97CB7791A3
5480:1056600047DB057A25404A0750A7852C88D34A6E28
5481:10567000007F741A716DA3F3D97FAA54B2D2FAB81D
5482:10568000ED6EAF44EBBBC12105BE7D550E6EA77814
5483:10569000D84DF5F16EDAEFC2D6469B9B8E1BD843F0
5484:1056A000811A43EB9490808753D64046928E4F16D2
5485:1056B00065B2714F59FDBF847E4E7D1243607D7887
5486:1056C000EAF3B8A876B83893E9CDD7B99D7364AA40
5487:1056D000D83ED4F1DA9BFD295CA14ED770C0FBA265
5488:1056E00097BE9667D3716EE4FEDAE44DADF510D740
5489:1056F00099BA25AC80FEF1055D656082A7BFE4B56F
5490:10570000825DBA7D87CF0AEEF98C3D7556783F737E
5491:105710006FE361A8DF1DDA89755BA6FF23C0EB4D3F
5492:105720006BC387805DB21A89027241BE617E589850
5493:10573000CB9DA7D37B3011B9BAC4027CDE35FE8A7B
5494:1057400056055CA2A9F56C7CDA5F1BF657179E0024
5495:10575000F62D6339EB2F831C5895A846FA1D7FA9B7
5496:1057600055D2C71B4A7FB804F9E8F947970C4E0693
5497:10577000BCFF358664BBB96CA4C0F38141587F126D
5498:10578000A52D7FBADE3F23A118C637C4CE4AC14F2C
5499:105790009A9DF1912B0EFC85479EA98B03FD90E20B
5500:1057A000536D7E1D9D4A374E1EF216F0696C0CC675
5501:1057B000ED2E0E677EFDC50D8E6080C5BB8700DFB8
5502:1057C0000A7B5505F436C4A384BC33BEA75D04012F
5503:1057D0000E511269B58BE8EB24940670757A187D2A
5504:1057E0009B6CEA2C18AF292EC605E355D9B36DA0E2
5505:1057F0009FBAE29F1044A47AE206EE6FEE3F753046
5506:1058000019E87A71F8AA0C5817842CFF8EFAA83779
5507:10581000BE5AE2D1923211CE4006ACABC4F7FB4E79
5508:10582000C615823D7C5DF861DED98361BEA25D5103
5509:1058300026F30BA83CE0FC851CA4B4126D6B21A2DE
5510:105840004ADBADC3477E268BE38972B7550D3039ED
5511:10585000A27E08C8953364CF0479DD9789F5141FBB
5512:105860007178E9FBDABDD95E594539CFCF4C8DC887
5513:10587000FF8D5CFE535AC32877D7BA3E706532BE9F
5514:105880000D293BB9FC10D443203F4C4F870630FE16
5515:10589000080C00BA805EE0F449976859CDE92CE61F
5516:1058A0009DC2E57E2A976BC003BCAFE4F314EF6F93
5517:1058B000E6F82A930B13DBA2C47DBAF86E793A019D
5518:1058C0007FB16CF9002C2B39BC0BED1B309EBA302C
5519:1058D0006503C65153B4462C174E6CC4E7695B662A
5520:1058E000237F2CDC2C19E2A2A27C81FB5F674E593E
5521:1058F000D07E114B5C7FE03FF1FED7E067B0B8F09F
5522:105900001D80E7D37B363E53A446E2C2A79B983D59
5523:105910005C1067F4EFEEE6F3DAFFCDC164E0978B3D
5524:10592000B18D53EF0639D92EBB56011D9BCA2435C4
5525:105930000AFFE9F10C78AD6DFA4739CCA386B4358E
5526:10594000809E3ECDFD32B559427DAAEEA5653F2A27
5527:105950002C4D4CBF9EB232FD7E4A4A96403E40BF1F
5528:10596000839E3DF5F9BA8C47818F2427FA37A037FB
5529:1059700077E9F863F18EAD0DFDE93F6FBAE41A0ED9
5530:105980007C15528843AF9F059F087D6B867B05A7DA
5531:10599000ABE0C31B22766805E00DE2A740B29A0D8A
5532:1059A000E7317EBA81D3AF09F80DE479ADE0B7E114
5533:1059B00016D4A726391EF32FD2DFFB9EFA4506C662
5534:1059C00025C652B9A5727D1AE43A0A5FFC9CD36FD2
5535:1059D00089C7BF29338ABE3F2DF97F999C1969BFBA
5536:1059E000EFE42D43AA74FD3CC8F171D1EA1FEC8AA3
5537:1059F00082AF085E497FA0F3024A19C003D922B9D9
5538:105A0000C0EF13EF53B6B07D8097B91C89E7A22E83
5539:105A1000F03D1EF09D89F87E3993D97D1B98E4B442
5540:105A200020B3FBC4724B7FB0E30BE3B45B300EB327
5541:105A3000C14220AE44A452E4F794A6A74F5E1E09CB
5542:105A400065AC07F755A85F0DFBA50B9F50711DB8FE
5543:105A5000FA8558E4B350A607E7B5BAC98AFC76DAE6
5544:105A6000DA98817CF9F9A2C1B02F13F884D9A19EEC
5545:105A7000F029F8E727DC5E0BBEF3AC677CD7A4689F
5546:105A800071C077C28E0AFE3CBDFDE6629037D13E02
5547:105A9000C237AEE1826F66D3E79EB56D32D087D252
5548:105AA000ED8F8087CCF561D45F3DD14DECB709FA1D
5549:105AB00009BD9E906531E0FB330E7F0AF75FBAD3D4
5550:105AC0007195811E3746F8FF5333FF5BD5883CFD47
5551:105AD000A11739B83ECBC5E20C9FCD4903FD22F694
5552:105AE0006BC43EAA18FF2CE7879EF65B0EABFE3315
5553:105AF00099BAF9C07EA08A7A9DEDAF94717F7BD967
5554:105B0000F698600CA5DF3E7805FAA23D2E087EA22D
5555:105B10006897AB104D2926E4BF33DD385E2EA80A06
5556:105B20005A4F596E235974DC8BD71D6849A0DF4F3B
5557:105B300009B74D1E46A7B6CFD676FBAD10F725DACE
5558:105B400022F02730560F7CDEC1FA25AE9D0638AD17
5559:105B50005916C33EA898774F76AB277A5C9FC5F756
5560:105B6000C7F87BB39C1FE3F83AC4CBDEE53490085A
5561:105B7000727A1309AC82FD117289B8C01E77C9E927
5562:105B80002582F6657096514E453D8A9C0ECED2CB4D
5563:105B900069671B93532E8F894D562D9A7F32348B14
5564:105BA000AD7B139BCA4AC09E24FA08C63FE8345115
5565:105BB000AE1752B906790D807CF6037C32FEF2688E
5566:105BC0008DF7C17B4F13F3AB2F26B1F92EBC513BA0
5567:105BD00020839C53BF5EA29F3672B9EE19EFA14499
5568:105BE00089D9A744D027378D6B9B00F656857D81D8
5569:105BF0007E303F46DFF1E3483044E9AE5E224C4F51
5570:105C00007CFE8BFB1E05FDB0C1E1CD5623F627ECD3
5571:105C1000F197001E7A9267CA971AC4A396FD9783DC
5572:105C2000AD037BD81F1FBF5C46FEA37C7E4B960E48
5573:105C3000FFE37D6119F09A1CEF4FB32611724FD329
5574:105C4000D0E9F641747E6EEADFD2FA4C5A5F0F71EA
5575:105C5000B73E6D84D79F72A47FFF38DD3D5985EF35
5576:105C6000D753B80399DA5D59A9B86F7D0FC073D3C4
5577:105C700080B00CFEE7B5EEEFD7427C8ECEE7F81D84
5578:105C8000435E984D9F56DDE56B80B7228E3C86C7FC
5579:105C9000916B9B87637C59174F5E94759578726FF3
5580:105CA000E32670B9A7FC8DEBB884B16119F4A2D0DA
5581:105CB0002BCBB3FA707E6E23B0AE10F2057A09FCDE
5582:105CC0005A916700714527EE5704F17BA8271647C4
5583:105CD000F4CDFA464B4534FE7E3CCB11558F92E60F
5584:105CE000FFFE8F4747D3F9C22BA6571FCFD2E9D566
5585:105CF000A6C6E37D999F4AAD3CF51B1EE46BF98D6A
5586:105D0000ABBD7FCE02BE7B57C678CA7531B6800464
5587:105D1000EB7E8DA8AEBEBC3F10BB6629E42CA2F57D
5588:105D20006F25A2419CF25B19CB8D3FF655B8216ED1
5589:105D3000F2B1C5BB9A60BE02E267EC6012B4D37FD9
5590:105D4000EEE5F1CF92130E0DF200CE4976D49FE727
5591:105D50008EC505C07E9E735A306EDEB23F06E5E208
5592:105D600042561C8F67040D710FB19F73E19D39C9B5
5593:105D7000A0F79FE1FB9BCFC4B2B8EA3377E5603C64
5594:105D800052C46D1585E2BE0F84A9285EFB807F3C5E
5595:105D900000E3A9228EDBD73E5B6249456C1CC5CE71
5596:105DA000E6D757F14B101FDFDA4B3EC4EB59361ED6
5597:105DB00007F0EF01FEAD5DD1668375ABF07B855DCD
5598:105DC0001EDCE139007911832B58986C6B87C50272
5599:105DD000F3DC4AD929C9DD9DBF041F6DED9E7770A4
5600:105DE000204B17A79DF618CB3BE8AAF376BFE479C2
5601:105DF00007E3DB8FBF02FE1C95F75D867665A97110
5602:105E0000FE287A6BC6F21F62FB9EF87F8685F8A398
5603:105E1000D99113427F2B7503C04E91BF3F12AF46FD
5604:105E200089CBCCF8AC2A15F0628EA745C6FF318E1F
5605:105E3000FF59168F1F65900CD85FEB6D3FD30CF7A1
5606:105E40004756FFA068764AD0D93C5EF7F66C1DD65F
5607:105E5000F59D8DF8773958BFC5BA7E53B299BF33D7
5608:105E60004362FBF5E432417B2DF884E2FD3F812F54
5609:105E700046FFE9C48838DCE709CBA00F2E7C9C35AF
5610:105E800010F7DB7B58770A7808F16747CBEBA0E384
5611:105E9000F9A2D121299BD1618695ED4748776563A9
5612:105EA0001C60466C8C14A3F34F2E77D95BCDB02FBA
5613:105EB0007B3076CC488C5F5AD581D1F067DEAFBDA0
5614:105EC0009C45905F012FDE28FC24F695059E1B4A19
5615:105ED000B41285C5C7C83630811AD3A3291504F773
5616:105EE000D7C6481AE223339BF94D5B79BEDC857730
5617:105EF00064D40BA34BD4206C91527BE1CE1E85F968
5618:105F000057AF5874F957824F1A7E43EDB2217EC8BD
5619:105F1000E44AAC9F93B83EA65EA3B64BF79DBA0287
5620:105F20007440C41E0CACB71BEA190FB988A2B31792
5621:105F3000495A9AA13ED0E78A8375D3C00AD5D04E7C
5622:105F4000F09DC8FFC3BF1498B70BE34F7D383C6387
5623:105F5000243FF20DE837880F97707AD2F98EC7F98F
5624:105F600056B45DD0F38D986F6FF33ABE92C243156D
5625:105F700058FB4A0A2FD50B73D6BB57A521DE5D040B
5626:105F8000D6132757DAF1F93CDE3E69D3EC86743A32
5627:105F90004452BD8A71D924ADEECD74C8B7ACA37597
5628:105FA000FA37B7519260BD4EF50CB67B6EA50B4B20
5629:105FB000416F177D2F817D2F2579B04FD3931DF32E
5630:105FC000673B0CEBE1ABD8317FF6A8EE76CC62F7FD
5631:105FD000BE05FBFF4B9B6515F862CDE43E1AF0D37E
5632:105FE000C69D9217E26E879A591EDEC619CC9E880E
5633:105FF00071CFBE9A8876E3ACC4E49CB424A11CD4CF
5634:106000002671DAD427E17EEC39BEAE5E91E5AFCBE6
5635:10601000D6E9CF8DCDA362715FD66497E89F4BA27E
5636:10602000ED700F4E02FF69F85A2513F5C072809F7C
5637:10603000CC6F1B119B097CEBFF609C047AE09B0CEE
5638:10604000A0A7795F4FECFF897DC13FA6F95765EBAB
5639:10605000F456F7FD3EE33E959C60C73CDEB132CB83
5640:10606000E3D5D95F02745D037E22E5BB35C7E2103C
5641:106070003F6B2E33F9A370FE04C669718E467E1203
5642:106080007696C259F42EE90E67AD258CF1421D9C1F
5643:10609000CF5C1D4E539E2B87AB0BFF7C7F4A762A2D
5644:1060A00008FF3912E70538F7DABC1FFBC10E9F8DD8
5645:1060B000C3F89EA04F0D97B173941E1285F3DCDEDA
5646:1060C00011B11607F847FE17805EF2A07002F8E7DC
5647:1060D000879A47E4C37C7ADAA73D9255FA7236CAAA
5648:1060E00099FF37D06EBCABEDC26FD5C8FCAFB2BF65
5649:1060F000BB0BDA7D07FCBCA6E7A3DEF053AB38D6BA
5650:106100004A2C408E7E98C4F5B499EFA4E603FF05AF
5651:10611000794754DE30EF339041826B28DE1A8632A5
5652:10612000FE2373898A76D9C4272BB27C6F03FC4285
5653:106130004EAF829F7701EEDA2C5F2B7C0F700C281C
5654:1061400046BDF47E36B36FAFD82CD89EE5AF241190
5655:10615000CCC731EF9F9FCEAAFA04DB0BFF2BCF2FCA
5656:10616000B90ABF931C1CBF3A7F85902F96723C2DB5
5657:10617000857D5DC857DB63ED30E44598F0F0789697
5658:10618000AF83E181F2D948C6676BC855F11186EF3C
5659:106190006BB3FC17002F4E2BE51740CAD8D9698086
5660:1061A000E7C3AAF635ECFBEF5EC5F071EE4F0C1FAE
5661:1061B000FBDA2DC8D74F93212897C596F3F741FFF7
5662:1061C00054BF5C867EC685774AB06EEEB740B58018
5663:1061D0005E1E10F6CA96ABF3AD9483EB27BF022583
5664:1061E000A5C383408711EFB078CE55F8D60EDF7F78
5665:1061F00007BC27E57C07FD43F92A15FA177C75AD26
5666:10620000F956942FC8803EDDFBA3EB28DC5F38B045
5667:106210002F06F555CD6E09F579CD1B5FE07ABDE609
5668:10622000B51864CA89AFC5E2FBF37BD8FBB325D1AF
5669:10623000F3013272FAA0DD59BAF3019FD14E07F093
5670:10624000F9CFB4F3AE2C39B2BF9A3C859D435813B5
5671:106250002BF24DD93E6B02E7B3E4413E0DEC507298
5672:1062600019C17CC10407CB43EC7EDE80C96D2A6F67
5673:10627000E772A912E0D97CFE408E63F985A964FD1E
5674:10628000D780A7E40AE3FB544705EEBBA69ACE29C4
5675:10629000087C97E570FFD946D2408FEC34E55588ED
5676:1062A000F2FD1CEE07D627E17A50E170B5386DC8D3
5677:1062B000B7CB9C769CF7B224923C19EB0ADA7F7339
5678:1062C0003F5DFEA76621AAFE1C45451C5175FE5187
5679:1062D000AAAF8FA1DE6F667FC3F7E97E8FE1FD80F5
5680:1062E00005430CEF07D5151BEA83975F6FF8DE4D6A
5681:1062F00011A0AF67AEBDC5F07D76E374433D77F383
5682:10630000DD86EFF3835586F7052F2D32BC1FBA7358
5683:1063100099A13E6CEFA386EFE51EFCF26773589CD3
5684:106320004D167EB973A41FF84A76DAA518DDFA6F08
5685:1063300019A7474942451AEC5BD63BCBD3607DDABF
5686:106340009244EDF155E26EDF77DDD628E8CFFDAF60
5687:10635000521E773B7B906A11CA7F3587281F0C43FA
5688:10636000FFAB3187FB5FB355F83E6C437BA278717E
5689:106370001E3312EC184F33F7BF2C478DBADE922D27
5690:106380005ED764A9677C09BEEC0D5F9B395EFFB7E1
5691:10639000F8FAC8943724D67BE6767FCEB1707FDCDE
5692:1063A000BF3B47BFAE2361D987EBBA6FCE0608E883
5693:1063B00051827E4D6DBC0BE312663F408CFFC734AB
5694:1063C000DFEBD08F599FFA96CF67DF59E80243EE93
5695:1063D00079BDF7E71CF37AAF6C26D223C966C0D328
5696:1063E000FE2E3A6B86F55E7DD2685CEFD55BB5B468
5697:1063F0006B59EFEDCF2188EFCD40D7541D3D6D5E39
5698:10640000D5857ADEE8BF74F7CFA9FDA3F3DC087E5B
5699:106410009D047E5932F3D7774B386F31EEF7F0CFCA
5700:10642000DBF5F6A927FF3C8678D72A32D2EF4BB0AE
5701:106430004FD41F7F3056FE5EFEF885EF620FDFB748
5702:106440007A318FFDFD29325945F178A1624C3F1216
5703:10645000451F8BF2288FDFECCE2548B7DEE21FEF19
5704:10646000AF5C70D5F31CEF57B23CCDE9C047BA71B1
5705:10647000D373195F8CC8E5FB92312C8E71E63F9C7B
5706:1064800078EEE0CC2D1F261027E4B78D1819803C3C
5707:1064900066E27D08F26F020E27C609A7578E1AB969
5708:1064A000CAA9E3ABB10CCF137EFFA70488FF4CDF72
5709:1064B00095991A70F4CC4F23F8FC88D2968379D939
5710:1064C000AF9FEEABD272FABEEC5416A734E6AD998C
5711:1064D000E346D397D718E47869A74482C9BABAD2F9
5712:1064E0008AF9814B3B157C7E39C71857EA115FD773
5713:1064F000884FF37381CFF72B4F67403CFD6C6C7472
5714:10650000FFE37E8EEF2EFE319D83E9E97C4739EF74
5715:10651000FF42C575FD40CF4DB7A9D9D712E7127814
5716:106520006ABDF4453CE88937E07C4D94FEC7E7B28C
5717:106530007DA537B4CFE1F80329B1872700DF97F0B5
5718:10654000787A94BCFFDB7261BDD459F12FC9FB9FEF
5719:1065500095CBE9C3F3EAF372D5A879FFBD9D5F9AA5
5720:10656000668B6EEFC646F0F721C8EB83CF595D000E
5721:106570005735F84E10BFDB6AC5F8DD07976208ECA7
5722:10658000A77CB1C5FA2BC8575BF05CE6739B687DAE
5723:1065900041650CEEFF546FB5B2FDB9CAD82084AA8C
5724:1065A000166C7DB8EF1C3ADE57546E9764D3F7CF64
5725:1065B0003D8DF9331FB4AFC3FCEDD320CFF4F98286
5726:1065C000CB8FCF00FCEFB335160CA7E5921D92E1FF
5727:1065D0001CC6A2A658435DE4030AFA1129723E4381
5728:1065E000A5F6A421D7781E6B4464DFAC2197D96B44
5729:1065F000CCB3AF99C2CE631D3AC9D6FB87B358BEA0
5730:1066000060A8F2CEC9C3E93C2A53AD182F31E71771
5731:1066100012824427F379FE6FE5270A9EBBAD1CEA80
5732:10662000443FF0CD95754807DACE51A63B8F50F91F
5733:10663000731677A974B3BCF91EF30E4DF986E27C8C
5734:1066400050B73CC3C8F9A0E3D1F8E657B946B93E04
5735:106650007492E515CE7F4766F3EA456F1EE5F3F8C1
5736:10666000A07DC8BDBFA5F8F8A08269F10F2EDDFCA2
5737:1066700018C4BDBEF04904F23CBFB814FD5CDA3F5B
5738:10668000BAECABBFEBDC0ED0E7B68A855D7510CBFC
5739:106690003B7C0F18CEF55CBBBEB9BA3EA9CE65E710
5740:1066A00032CDFADDCCF7FFBFF4FBF4CAC3190127E2
5741:1066B000962F40D9B18BE947B39C9BF5B980CB0CA1
5742:1066C000EFD24ED990873C16F4C028BD3EB7E17B8F
5743:1066D000EAEEE37C02A395E01A09FD80CF81EF4743
5744:1066E0003A82C92574887AD7B6F8ABC56FE8FAF94B
5745:1066F000347C5FE3F6774099FCC7FEA560EF47BCAA
5746:10670000B313F308CFF5904FFEA1DB94BF2619F722
5747:106710000BBECD2DF910D6FFEB54560AF91C498556
5748:1067200090E73B7C9BCBF6E57E0AFB96356F5D449C
5749:10673000F97CDAE64F83F840A0BFCDBB3D4A7E88A6
5750:1067400092F7DDCE25EC80F83CD03D2FCFB0DF07AF
5751:106750007122CC5B381E8771A2E7D3B4B83CFADD56
5752:106760002B695A7C1EE8F334CD91A7B34FF57C9E7C
5753:106770008A25BA5F5C9627F8DF87767C5E29D5BFCD
5754:1067800051F8D09BC7F2F94B9EB92B03E2719F1FC2
5755:10679000BB3B03F463CBD363AE9AD7F633904FAAD7
5756:1067A0003F9F04BD9F1DD94FFD09971B11EF9E67A9
5757:1067B000F3E5E8F3B192F392D87EED75BB5B3D94BF
5758:1067C0004FDAD7CBA8BFDB1D2C8FED8443A9682AF5
5759:1067D00064ED520CEDD8F90519F89ECAB1E250BE2D
5760:1067E000D5EBA332E0E9D49EE759C6E964235E3BCA
5761:1067F000B4B71DBFC50E76549634178BFF337EB8E1
5762:106800008E8E00FCF038D76397D3FCE301EF366E31
5763:106810006FAFE3F6567198ECEBC0ABEF8FEF4DD353
5764:1068200026423F77A7696540D7BDB64001C8CDDE97
5765:10683000B8E8796993F2983F129BC7F98538D07F01
5766:10684000C5F164DCA79F9AC7F6E97D50DE3420BC11
5767:1068500006F2C93F74BBBAF6B97D789EDE7707BCF5
5768:1068600027696DE456C893A3C0C23987D74F1D2747
5769:10687000A0BF12C2ED04F269124CF9AEA2FC2A8F3D
5770:10688000F91FAFF17DCFEE72C7F8CCCFE16CA2F269
5771:1068900002E74185BCC0FE3AE44BAC53FD5CEE58C8
5772:1068A000BE47D3537D24D867F168AA05F803F24C9C
5773:1068B000413F99F3839AF3981E053994AE22870FCE
5774:1068C0007F47396C7A6AB22516E07C94605E075582
5775:1068D0007EABEDB4FEFC329717CE8765AE27B80EBF
5776:1068E0001AB43C6E1BAC93025C9E066F22AB63E94C
5777:1068F000D76E9EC727F2A2DDF56D0A9E177894E544
5778:10690000E99DFEFC16D909FD7F2DFA37E6058A3C84
5779:10691000BE468E5F318F251EFF93C01FE6BCEA9EE8
5780:10692000F3BFBECC873C87E784BCF33C9C713C0F33
5781:10693000675CD3D3188F1BD774B322D14F9E5742B5
5782:1069400012ACF79EAFD314B037BFCB637939BDE536
5783:10695000C1BDCCF9B191D3B9A77CCA17F87751F270
5784:10696000295FC84BD5E593FD80E5533E9EA7E2F72E
5785:10697000CFF33C9AE7EB58BC6ED14BEF49FABC39E8
5786:10698000F19DC8BB1BF810CBBB7B5E698B05FEB9C4
5787:1069900018CBE875F10771C15518946F1B1EFD1CCB
5788:1069A00082398F9CE58F0F0E874B301F8810BC07F4
5789:1069B0006148BE6AA0CBD6B02B0EE4A5377BF0268B
5790:1069C000A7E7B5F2E18BF90C9F51ECE63B80AFEF06
5791:1069D00060375BF398DDFC20EFFBD84D6E2F85FD13
5792:1069E00014EF8F717A56E751BBA9F36B7576F358A4
5793:1069F0005E14BB99428298A7413A2C5E7D5EA8281E
5794:106A0000FDBCDFB73DDA17D07E1C8FA724741C278E
5795:106A1000924E0F4DE7722DEE9778B10FB97F5A94D1
5796:106A2000794CE1FD596685F13E8A8466296A1EDA51
5797:106A3000876EA64FA85EFC4F94B3C1546F4ADDF534
5798:106A400066147AFC13BE1FF08E760898E4FAA4A6AA
5799:106A500078709FAE420F4B7E2AD04393A114F82F3B
5800:106A6000BE625C470AFCC7E533F9ED9BADC5E6D3D2
5801:106A7000F22F5CCE7AA24B7A3EF36386F052E4A901
5802:106A8000EF36F9A313F2195E6ECE37C61575F44BC7
5803:106A9000CF8F423FA187DFF6F806023CAF9DDA1D9B
5804:106AA0000F7C24E824F48F995E11395B25F6C9B375
5805:106AB000F3A3D81FD1DE6C8722ED0308F756E0A3BD
5806:106AC000912CDF07CF11F0F308023EC1E71A9FE7D0
5807:106AD0005F3DDA7080D70CA7ABC3225D0DCEA470EA
5808:106AE0008A04F29FA4B9B07CFD944502B85C6105AC
5809:106AF000F3DD5DDC3E9AED2055171CAFAC9F17B956
5810:106B0000DE6838C3F2101B4AFC6910FFCFC9D626D5
5811:106B1000025CD5795A1994D7656BE5507EE8667E9C
5812:106B20004B7ABE560175912F6086D397DF957770AB
5813:106B30002BE033612209803D84FB64609F2581E75F
5814:106B4000312468AE52B063095B08E60924C7870F99
5815:106B5000C4C0FEDFD3C40BE79F7202AA05D65F99BB
5816:106B60000F69ABA16C38C3EFC52921787EB22B8F9A
5817:106B7000AEDE837974206F7A7EADE278AECA677A32
5818:106B80008EFA21F7E733B866E7EBFC1021473DF9B1
5819:106B9000153A395C80EDAE5D0E6BF3BF9B1C3EC8B1
5820:106BA000E5F0A16B91C31F46E4F051F8BE37395CA4
5821:106BB000C7E5EFC55EE4F0FFF07E7F97DFA31E5DC3
5822:106BC000174D0E459EB0E0779043B0F741DE1FD5DC
5823:106BD0009F3FCB4FFD5E72B9399A5C9AE5B1ABBF6E
5824:106BE0006BE4FF9EFCBF0143FC7CDED1FDBF1D3C7E
5825:106BF0005F5CC833959797B9BCFC9ACBCB0E80F7F6
5826:106C000043B78AE398E5ABCBDE84999E80FC3C7D5C
5827:106C10009ED6E108BE5E857ECC7939E34CF1FCCF8F
5828:106C2000F2193FBCC3CB84F071027A81E2ED8D7C16
5829:106C30009DDD7891CB4B602CCB3BA5925A0A7EE52B
5830:106C4000BE0EEA470238F90CDE719B5B0F81DF480C
5831:106C500094C678B8E7AA273C7986A8625F202A9E66
5832:106C6000E8F87F86F1CD746B06BA39BAFBF3667A21
5833:106C70003573B90D737C7C5F3804FE008E61088724
5834:106C80006A59A7B3F39F733D41E16D0778C74F0C75
5835:106C9000CB04E10AC5C3FE89D0A764206D3FB27B57
5836:106CA000FB8E48FB0EA0D7788DB62F8CB44F825048
5837:106CB0007E26E831AACFD04FD6F0BC62839BF18309
5838:106CC00099EF9B6CEC7C4417BD1AFB23BDE6AAFE32
5839:106CD0006FA1FF26859D1B695AEB92D8794096EFEC
5840:106CE0007B225343BE8DA287C890EFA68794214C88
5841:106CF0000F59875C831E720CE9D243F1F07D38F79F
5842:106D0000EA7A6800FF7EE090ABEBA10CFE9D67483D
5843:106D10008FFEC0009897590FAD53191EA2C8E960A5
5844:106D200080EFDB5C4D8592CAA97B486AC4AED17600
5845:106D300099509FCBDBAF6F64F9160112E78DB6CE89
5846:106D4000F00E715C6BFE9997C3F99DF2A837FEB8FF
5847:106D5000CD06F816794E625C73FEB4A0634DF3AABB
5848:106D6000116428E4695DCA00BFF2DCB16F313E7284
5849:106D700024AB4A83F15BF68F31E46589F197F178B2
5850:106D80005A995CB813E2B3E78FD830EE2913F5D9DE
5851:106D900071149EDA235612443DC5EE1B10FB61D6DA
5852:106DA000230DAD108FB712DDBD50B89E5113816F0A
5853:106DB000AD47D8FD4C2485BD0F10FB2A76BFA371CB
5854:106DC0009F3F4933EEF32757F431EDFB1BF7F9FBF7
5855:106DD000CD34EEF3A7FB8DFBFC0316149BF6FD8D63
5856:106DE000FBFC8397979AF6FD8DFBFC996BA79BF6AE
5857:106DF000FD8DFBFCB99B8DFBFCF941E33E7FF55B10
5858:106E0000AFD8605D5DF0D232D3FEBF71BF9F22A4C8
5859:106E1000354B775FCCB0BDAB0DDFCF6D63F7900D19
5860:106E20000FAD33B66B64F71504E87F80CF2F88DF92
5861:106E3000067CA690F09B0320BF25287943F4B385F8
5862:106E40007B778D86B298C7C5AB371BEF395818349E
5863:106E5000D6BF7ABBE208E481D58210D17E6A5F9208
5864:106E6000824177CF745FFC92B1BD88F32EE6F3398F
5865:106E7000CF9D82F35B643CB76CE693EAB76E63F731
5866:106E80008605B456B8F741E041F08B8BF38B804B0D
5867:106E9000E063B1BC04E55CE041DC9F55639A7FB7D9
5868:106EA000F9EEDD8AEDCCF336CF63FB90AEFBB0702C
5869:106EB0003F8074931307CB13A2F3827D72399067DE
5870:106EC0009213231E7AC2DFB5CA8DCAF1109366945D
5871:106ED0009B5835CECC77486F333EE3F38CF264C6D3
5872:106EE000A7D3DB3F2A7F89FB4F713EB01FB25722E9
5873:106EF000BF90BAE37541F386860151F8897A7E988E
5874:106F0000E761C6EF7B26FC1E56FD47413F5DF8F862
5875:106F10001B19E9EA6F1B01F6EC2AF9671FF3EFAFC3
5876:106F200075BFFD187C2FDA9BF7DBCF419EA4EEBC2A
5877:106F30008AD44537CD942779E8BF601F89B6F1DB45
5878:106F4000200E5BE1B5B3FBC0CCF96BFE736047026A
5879:106F5000A51AC138E079E25D43FB5BE3FC8F825EFA
5880:106F6000E2221786A0BFEBC7FB85C687DB2EFC1687
5881:106F7000BA575A5D304EB47B484DE70F2FC3B8DF88
5882:106F8000F79E47E1B7D3759252C0FC6E5B817E9D40
5883:106F9000D475BF2A5BEFF4D48FC823EBA9940ECA33
5884:106FA0006857C3529C37DA3D65E905467BAF3BE73E
5885:106FB000995EA0B3A3350F5F7813F41EC5F7407830
5886:106FC000EE7452FF46BA26FF4685EF9F8D4F40BEB6
5887:106FD0000EBF250773DD707F959AD8A7B0FB7D4B58
5888:106FE00022AFB00EEE534A86E7F98957CBBF28355A
5889:106FF000DD7365BE97A8A198C155CCE7E9E7F75DB9
5890:1070000095F3BA389726E271B53359BCF969531C28
5891:10701000B3BCC0C9DA679596039D1ADC12FA4F0D0E
5892:107020009264D84FBA38A4A41CE6ABF1FECB21364B
5893:107030009F8AE7EB10AE14D33ADE52C0BEB7149469
5894:1070400062092B7AA0B74D96A3E2735201835FF8D1
5895:1070500051DFE39E99A33123BBDF3363BE1FB13CF5
5896:10706000AFAE05D48379DFF7D5DEEE99395A1E75B8
5897:10707000FF17F01BDF27C2F7730B8CF72086E2FCAB
5898:107080001BA7403CE24FB217CE9B98E7FD4001F3AF
5899:10709000FBD7F3750BEC2BC17AA40F2FBB7FCFF07E
5900:1070A00014CCF23D807855285E29BC211BBB0F34DF
5901:1070B000FC21C171FA2FD00E407D944FC5F3150D00
5902:1070C0006EE280FB82C2C32D181749F1BB26C2BDF8
5903:1070D000BE295BA43E804EA117AC0A093829BF34F3
5904:1070E00016B891CEEBC99A0370BF49E296AF8907F3
5905:1070F000D713AE892ED0477349D438E7937C3ED35B
5906:107100009EF328B02E4BB447BFCFE1493E0FAA1FD4
5907:10711000D6C13CC6DB8F8D903C11FD024B5BFCBFA2
5908:10712000768BE15CB3284F644E68047E1DB580F415
5909:1071300010F7647C7A83EA7B06FA1F7554C5FD8AD2
5910:107140006AA1A7E75A08DC3B7A17679FBBB6B0FC79
5911:107150007572E9CA1559F8DD04FB27B07F50BDC42C
5912:107160001984FD84EA6637DEC7471648B8CF51DB7D
5913:10717000FC9E0FEAD52347BA50BFC54B12DCCB08A3
5914:10718000269FE933859C14FC22F349D1FE6772FBEC
5915:1071900020D6F7D41EAC8FA778AFDEB2F5009C8F57
5916:1071A000F87FD4F003DD3E96FD1FFF90F67B073598
5917:1071B00052CB8BA154C82C8CABA7613FB7F37E0296
5918:1071C000DF12E9A43D32EE1DCD6FE17C3EB6928028
5919:1071D0009D3293B5940D6D7D3411F75B457ECE0CD9
5920:1071E0007B6319D8B973B670119C9F3AB7FF2F8390
5921:1071F000601FFEB31F5D70C2BEFCDF95B0139E9F83
5922:107200005AF18113EEC5FB6C05BB3FEA3E6E3F04AD
5923:10721000BEFFC4F5825AE86B01BADCBFF2F268FD2A
5924:107220003D3864792AEAFD854119533A845C2D7E04
5925:10723000291E3C9BAEFAD29DC986BAB0074B634863
5926:107240005DB438A1A590F1D1C21D5B6D035418DF68
5927:10725000FF118C7F0A1289295D4EED71A2DF28E0B3
5928:10726000A9DA31DC067EC6DF9B634808D62F4AAB1D
5929:10727000959DBFD4264B941FFC9CEE6638DF7C2383
5930:107280001EFB9BF734D33FB3E958CB295EFDCDEC11
5931:107290007E4BF33CE67DA696F7A3F89EF704B5E88F
5932:1072A0002AFB7E05A59B7FF9E3984F6D9EE7EC8056
5933:1072B000F93E4B0DF55F35A7EF9CB5C6F7D5CD4F21
5934:1072C000623F7389BA1EF206E7359ADF577E017E68
5935:1072D0004CB5293FBB53E8A7D1640CE8A783F6CC93
5936:1072E000C468E73045D9B1D285CCF9E54A3B96A7C9
5937:1072F00056122C5B0A18DF2E697EEF11E09F9ABDB3
5938:10730000BBF0FEA143C15129D7D34F263557E27EAA
5939:10731000E124BE8F7C6FF7FB34E30A69FB890ED34F
5940:10732000F9673EEF599C0EE23CF42C986F113C57E4
5941:10733000BED1CFE7FC914C07FA43853CFF660C9D1C
5942:10734000977CEDF312F311F313EF97CA94DFA2B415
5943:10735000177CDE52C0E216739BA635F4A7A858B37B
5944:10736000FF0B5C2F13D37D7A13EC4FB6F27C33C343
5945:107370007D79F4EF28C8AFE0B76AE2C5FB43CD7C66
5946:1073800025E84C1CD600BFEF18FDF82E7E6AFE09DA
5947:10739000E245D01B6EC6D3DFC744F9CAE037533E7F
5948:1073A00032D4E7351AEB67AD6D1920EFD5A6DF476C
5949:1073B000386BCA2F11A5A7D083F23757D5CAE11C65
5950:1073C000CD3CE26B6079B8EC1CDE29A5F1CD1F82C3
5951:1073D0001C363139F83BA7FFB6425F6521DA2FAD85
5952:1073E00008EF415C9D2EC345BFB3D74B2E90AF39FC
5953:1073F000F5C3F13E9D62A2617FF7F6E0872D296417
5954:1074000074A8AAB3121B359E55740CD073557B64B7
5955:1074100071CF95634A5FB8B785D163E913BB6CE957
5956:10742000B45C5057CDFC8320931B718FB4E03FA117
5957:10743000FF17AD3F80EB70BAFE30C8572D9C8B28EC
5958:107440000239363DAFBB19E9506BF213AA057F7ABA
5959:107450008917F8D3FF88D30EE7AA7A9B37E91E5F16
5960:10746000C1F8CBF923D9E83F9E57D57EF09D3F81E7
5961:10747000DD5B2F29FE31F09CE20BED5478553CDEAC
5962:10748000E37BAC53262ADE37E21F03E7DFDBFE3A5D
5963:1074900008F76305BF8AF9D6DAD723BFD612E3BA55
5964:1074A00072365DC040DC74F6F664CCDBA2FD17EDED
5965:1074B000057F63BB15FD8900599606F74CF81E63DE
5966:1074C000F7D056ED4DC2756D553DDB6FA9DA91844D
5967:1074D000E766E9BA12EFF716F438563FC1968EF414
5968:1074E00072E33D5964AF91CF059DBAAF0B4D745A0D
5969:1074F0007BE0CD34B5FB3A5147A7F61EE864B89F50
5970:10750000714B21D78F9C4E6405D73F0F1CCE867DD3
5971:10751000A6F375B15E39CA7AA3EBFEDEB9D7637EF6
5972:107520009988C755F417BF27E0ED0B74BDB07E14E2
5973:10753000D2CD4CAF8A7FCE41BA90BF3A09C469EF31
5974:10754000CD24F74FA7CFEF9798BCDCBBA6B202ECD7
5975:10755000F9AB85CCBFFA33D55B5A2E5D0753BDA579
5976:1075600051BDF501D56750FF70651AD6FFB252C5FF
5977:10757000F293957958B673BF5FC81165041BF8592B
5978:10758000AF73F979BD50AC971E4A03D7A2E29F1F93
5979:107590008CB240E83370DF8CB24184DCAA19EDE193
5980:1075A000CCDB8DF6AECDEA2A87F3BC8127D87D6887
5981:1075B00055BE1B0CDF1345B5C13DB8246F44E439FB
5982:1075C000CA9B6A83F3E8774D4E367C3F63ED0043F8
5983:1075D000FD834295F995159986E777CF2A30D467D0
5984:1075E000F3FB5C893A16E5E6219E374AC8584617F0
5985:1075F0009E8FF24DDD987EFF46E1FDE61D2BBE37E6
5986:10760000D343D075EE6699F8697F733653FD4541D3
5987:107610006C6FA474A2EDBEFAD809674748C38E11F7
5988:10762000EF8EA5F5633B58FEEAB1FAE49F82FF7442
5989:107630006C476A02C451FD0D32F7335C78CF99E88C
5990:107640007742FD2ACC53991D8CC17308B35B02CFDE
5991:107650008B3AFCC400BA78203747E5604842FAB15B
5992:1076600038C0CB3118C73F45FD3A571FB83F8CD4BF
5993:10767000430907A712E9FB7FB4A60641AE2BFE29FA
5994:107680006B69C04F2FC7F27D1A09FBFBF2BDEC6D91
5995:10769000EB90BFD49D2194DF185C2FCC6963F3235A
5996:1076A00052F100A0FFA924A2255120962EFBCBDF8A
5997:1076B000144AA78539AD45704FCC2C7728F54EDAA2
5998:1076C000AEA3C9CAEEA5A7FDBA687DE9AF63B6321D
5999:1076D0007DA2F5837B2222F80C16C1BCF3FBFB6272
6000:1076E0008652FA7D393F58847A6D452ACA9519EF3A
6001:1076F000ED363FE23700722045F46444CED8FE1BDD
6002:10770000556EE9A06FE658BD7DC15EB5AFB7B27BDF
6003:10771000E1142D611A9E33DD8D7CDCAEA8E530EFDF
6004:10772000F6B56EBC4F478C5BB55ED6D87DB8942F4E
6005:10773000E1FB0DB21FEEBF11762BB056F2C33D39FF
6006:1077400066BE79F0813198F76EF67F457996CAAAC0
6007:107750005FE7472CDA2FE3EF5890916DCAED86FB77
6008:107760001DD9EF7D10FF58433EEA12CF1FFEE6B051
6009:10777000A05F9308EB8ED34765E4B3D39EC6D1696F
6010:1077800099905E7270F4BFD1FA57530227E15CED15
6011:107790008383FD2301AF8B2DEB3360FD74AEF9C401
6012:1077A0004FE1FED82F7F63F5C2B08B5E5E3818E3E1
6013:1077B000F4DCFFEEAEB7C4FDA45A3ADC17B458DDD2
6014:1077C00089765CDD211136FF20C229ECBA6B9384E7
6015:1077D000F7049D18E55C07EBE539A6735D27F8BD56
6016:1077E00015E543993E11F6FE315E9F63617C4DDEE7
6017:1077F00090D8BD52FCF71E843D10FA5AE8FD19439B
6018:107800003D2C9EC1F535213B516FCD87DB94E83C83
6019:1078100097BC14C3E2CB2A5DE08FC67B4BF16FE3CC
6020:1078200050A62F16D97EF30CC852356945F8BFB45F
6021:1078300006E7B7BAA1FDD6FA3ED8DEEAC5782BB77F
6022:107840002F70AD3DE8A56A2E7F4B1B25BC1F8970AC
6023:107850003B398FF74F5EB246EC86278A7D31D9954A
6024:1078600079DCAECE23A6786DA3D1DEF9E2D9E2773A
6025:10787000111D17EC67042EEA3F53DCCDF707DF9CA0
6026:107880008A704BDE601438AA493804F7442DDDC1F4
6027:10789000E2D766B8CCF3B85638E77BA74D4C1AA9A7
6028:1078A0001BD704B7C037067C757410789F1F60F82B
6029:1078B0009CDFCCF6033EE7FE1AFDC338B399FED534
6030:1078C000C43715F2F3AA3751FDE98EF083E08385C2
6031:1078D000BB82B85FF115694C70503958B279D78CBA
6032:1078E000EB54583FBF87EB90597D42D99624BA2E6E
6033:1078F00008BCFD4CC5A0DEE3F5FF2A3C117E6F36C7
6034:10790000B6A37899D7C4EEC5D67DC7F3D00388AFA8
6035:107910000581800DE2990B787CB037386B1576EED7
6036:10792000BD7778191EFFD57087861AFDD8887F9499
6037:107930001D75BDD5E517F5628F3FB58606813D0EF5
6038:107940000F52D01E7DA378FF529202F6391BD70D3D
6039:107950003DE9DBF9DC2ECF033B4DCB939B5FC17B35
6040:107960008F3EDFF40AEE8FDA7E332F01FCE5939B26
6041:10797000E7FC14CE059CDC3107ED72F52F845DF633
6042:10798000DBF4F67EC2E6D9BFFC11F0E94BB118D7A3
6043:107990009FDFE2E7FE38D57FA0173733FD4736314A
6044:1079A000FD580DF6AB10ED572E7CF7C87C7F2EF0FE
6045:1079B000BBEE39DAB547E6F8C7607BE20AF1FB7B3C
6046:1079C0004360BF847D1576F7DD74FFD9A16017E4AD
6047:1079D000773EFC019DFF99DD32C67496CA5B33E0A9
6048:1079E000F7507AD2E3DF1FDF962E7CBBAF01DF5565
6049:1079F000806FF48718BE8FAF65783EB19EE1BD61A0
6050:107A0000476602AC838FAFCD443FE8F88E6CC4F775
6051:107A1000DC7514DFE807AB463F682DC537F8FF80FB
6052:107A20006F3A6E558BCAF1ED65F85ECBEDD07A56A4
6053:107A3000CEED86D7C07DA0571EF9558C17EFA18ECD
6054:107A40000DA5C23AE5D42E9940DE42979FC4FD1998
6055:107A500081E77F90C6E7C1AFEAE6DF6C882110DFDF
6056:107A60005CF8AA13CF0D7D2995F403027434FE212E
6057:107A700001C68B8CDFE5D7788A46E9FC9A6BA44F68
6058:107A80000DF1615E7F4DF31F3E06BF1EAE1D827578
6059:107A90007F8DB82F62AFF1BE0849059D86E747ED9F
6060:107AA00076E08381E6FB34FCF8FB3017B3BFBE6F92
6061:107AB00019CA733847BFBF521B17B2423C2ABC4B8E
6062:107AC000427A2F7DA824A184C0BE541DC231BE8835
6063:107AD000AD2B244DC338630CE59B38B8AF0C2ED1C9
6064:107AE00085E7AA8BC51DB7D0719D1178CDCFA78230
6065:107AF0002202FBEE881EB7AD2B627EC052D982EB0C
6066:107B0000902536B61E11F921B7F2F7B716B175C92F
6067:107B10001D452CFFE21C2413D17ECF6D88E7F9CEE2
6068:107B20001331FE29EE0B5004DE5CCA59C3EF27F077
6069:107B3000F8C2DFA00D85736E0C8FFFC24FB6D0F672
6070:107B4000F7F0F6F734FE09F7E5E84AE639B0BFF793
6071:107B50002E8FF1E2FD8C701F1CE5BBC7E3D83E0AF7
6072:107B600049495440AEEEE67AF69EC6277D608FEE18
6073:107B70006D8CD7A0A4E304088FB78E847DD8FE3621
6074:107B80008CB7CEB2B7FD06DCEBFBD34E3C6CA753F3
6075:107B90005B6561FECBAA3E04F36B8651371EE2B7EC
6076:107BA000F4D59E2BC957E31F633C7909C475AF27F1
6077:107BB0008CB1C6225E0D758A5FAC3714DD70E7A606
6078:107BC0007184BC4FD4A140EF25801BE087D9891870
6079:107BD0001FB815E2CB7DA05490CFA62B246061E5A1
6080:107BE0005A07DE87C1E2CD53F9BCEF184B428974C6
6081:107BF000BEA1B78821DE7D67C812CAA574B8550931
6082:107C00001D00BEB6D8552BAC0F7C155231AC9B97DE
6083:107C1000ACBE36787F5E547EE7A681B46E61FBFF12
6084:107C2000E11F48787FC93D54C8813FEF53488B5CC2
6085:107C3000CCE807FC57DB87DDC71D7E80F1B788B332
6086:107C40000B3A0DA7DDEBF17B0F878FF6B33601DA28
6087:107C5000DBA2C797B673B9107EE7622EAF8B05BF64
6088:107C6000ED30CAE961212FE0E752BCDDC3CB9EF8BD
6089:107C7000FD20E7F7839CDF77168975F8B58DB7345B
6090:107C80008684F4BFD724C6BD9597A122E63F0B3862
6091:107C9000043F131E9FB250CD017CD4DEB806FDA672
6092:107CA00005A67831D1C7B1E468F52EFD63B902A508
6093:107CB0002D3C17E0916E8AF5025FDF63DB99CDEE14
6094:107CC0005F317E27F6716791562BBF8F8CC5B9B88F
6095:107CD000BD2A931D784E7F96C4EE5F3A57E20C584A
6096:107CE000A8BFF829BFFFE47C1D3BFF3AEB07EC7C03
6097:107CF000E7BD898F4C05FF7056824D81F253FE3BE4
6098:107D00004FF79356A7DB1DF14F1A4A647E1FE8BF59
6099:107D1000DD09FB196B40AFB0FAB3DA388C2AF1FAFF
6100:107D20008ABFC0FBDB2F513EC0FA8FEED4E8B8E724
6101:107D30000EF3F7015A87FD92C7043FAFC6FECE3D52
6102:107D40002DDE37B0FA13E2FD93ACFE13D13FAF6FD7
6103:107D500030BD5F657AFF7356BF50F4E49D70CE71FD
6104:107D600016DFC79975BD847AA518F88DD277D6EA43
6105:107D700010E27996E5202B4B4908CE5DF4F6DDE064
6106:107D800061BEE2A254B8D7A2DD09F63B77B886F50A
6107:107D90008143FDFF04BBB6689A14B081BE3C1ACC87
6108:107DA000E1FA3D6ABE7631E7DF415ED69FC037ED2E
6109:107DB000276658EA77EF6707C035CAD08FEBFBF428
6110:107DC000B3BC3B3CE9DFA79FCF4CFD08FFE8E16275
6111:107DD0006D24F44726DE6088FB2DFEB13711FC2BA5
6112:107DE000F22EFB7DA5C5AB77668CA0FD2FFEEDBE08
6113:107DF0008CF9BAF5784DA74C34AA8F6A3B252CBF75
6114:107E00003AF0890DEE1FA8D973C0565E08BF0B73F8
6115:107E1000C0364107D71291874ADA94E93AFB7EDDF2
6116:107E2000300BD71BECF76516FFF634EE772EB6EC69
6117:107E30003CF90B88035DCFE272E6F9B979BBBFC1AB
6118:107E4000FE7314FF7DFC30A68FE68FD46E1A06FBFE
6119:107E50007B80335A4E58137D1F7F2DEF6F561CD3F6
6120:107E60007373463BEDD066D451FF1A381F367F8BB3
6121:107E7000BB18E2BCE38796560CBB6ABC34CCE2A5C7
6122:107E8000CD2C5E3AAB4FEB4354899335BF7BF95908
6123:107E9000FB8D844C7A9674DDF30B71483C2E8D7209
6124:107EA00077E0CE890331FE85F5F9C35E7F3640DB8E
6125:107EB0001FE1F7FEDF3B66681CE8873677BCC545E7
6126:107EC000E5B9BC70F61A80E3DE313796C3F3921839
6127:107ED00067CE6C167747BE282FF4DD07F386EF21B7
6128:107EE000DEE1B7B1F897FF6D19E35FFEA2787FB4CA
6129:107EF000FDED591C0F6B8631FFE58885C2591C8149
6130:107F0000438C4F1D96875A697FEDABD387C339BC2D
6131:107F10006D8525AB112F7CFC6D85FE5AA88BF1E990
6132:107F2000748BE0F9B5C2B184C3B11ADAD27E7CE3B6
6133:107F300028BFE9D68DD327C61BEAB74F4E269A3EF7
6134:107F40000E7BFB00437DE6AC4CC3F777CF2D30BCF6
6135:107F50009F12D33AB2EE3BF8C1B54E671CF8639F4F
6136:107F600035FFE3A37BC0BF6B92F1776A16EEDFFEAD
6137:107F700011FC6ED3793AE1640C86AA180FFBF20863
6138:107F8000FB1D4EEAD729FA7D9D33A4F519D807D5F4
6139:107F9000ED1744DD4F15FB058B5D2D98C7F7BFDD51
6140:107FA000D7D9368CAF878B21B519ECD2871887AB20
6141:107FB00071B0799DD9770C7FD702F20AAE503EBFDF
6142:107FC000191AC2BD7A9DABF0F7C226F0DF139E00EE
6143:107FD00097B0C3BA60E0030A9C6BAFA525D897722F
6144:107FE000AAA712299FB41E2043F7405EAFDB897910
6145:107FF000174B3B6FC338F791B840E103F4BBC56B37
6146:108000002BB15ED3198FFDFE596E2DC7FCEDDF4BF2
6147:10801000B89F3065C0BDAB017EF8FE413ADE94DF0B
6148:10802000DD5C0178AAD9C3F233A6C8EF8F847E96AF
6149:10803000345662FB29323922517F21B1F31EEC778D
6150:108040000AD87A5A97473BD781FD956DA19C7F0747
6151:10805000BD6273A25EA9ED8CC5769326303BFD36DA
6152:10806000D71BD636065759E7347C2FE8DF3ACC6366
6153:1080700038776F4D6D52E03E4F6B9B84DFDFD259F6
6154:1080800080A598E7DB79BFC2DFA1B2A67E530EF9C7
6155:10809000996FA7482E743F4C7AF742DD98441245F9
6156:1080A0002F758DD3C9F29D633A59FE73EB70ED24A1
6157:1080B000C8D7D4156D0AECEF1087DD05F89A3A762B
6158:1080C000B83A5F274FF2C1BB6C4017EBA6F76C6064
6159:1080D0009763683941F77EA9C8EF37E9E58E6116E5
6160:1080E000EE3FAEC2F90A3B438EEC457EBC4F9C8FFF
6161:1080F000E5F2F209FFBE0B4FC0EB40C75763703D7E
6162:10810000757AB8FF0AC0DB5AC27EAF8628AD19B0B7
6163:10811000AFF2AF829FD2D92EA1BFDFC67EFF77AC70
6164:108120006A81FD02C52BEC0B935B318FFF017C0252
6165:1081300054430080000000001F8B08000000000076
6166:10814000000BC57D0B7854D5B5F03E73CEBC92992B
6167:10815000C9E43D210F4E208420012643124208C964
6168:10816000242408486080AA840699208F8804424409
6169:108170001BAFF6CF842410042D8AB7372AD2019181
6170:10818000A2D53620B6698B382168E3B5D7467BDBAC
6171:10819000E2ADB5F151048B3580D72FB62A77ADB556
6172:1081A000CFC9CC9924886DEFFDA37C27EBEC7DF63D
6173:1081B00063ADB5D76BAFBDC37ABB184B60EC163B54
6174:1081C000E33F8DF18C253176719A8E31F8F5572287
6175:1081D0006BECCC866749499F3B8EB1EE7BA64F176F
6176:1081E00065C6AEE04F0954711AA81EB30F7CCE725B
6177:1081F00019DB7C3252BE4F60AC3216DE013CF0829D
6178:10820000D17F309DDE33210E9FC68302946FB60D61
6179:10821000647A2C8CCD79D11C6053A1DD17CD1283EB
6180:108220007E3A72BDF1CE787C3FB15CB031E63E6102
6181:108230009418D41B3BCD9DE0CC83364719AF3A9EB2
6182:10824000F027633E3EBEF2593A96CFD81D26FED99E
6183:10825000DC25822F2A8A316FFB7CC660AC3583CB4C
6184:10826000189BCED8EAC14882BD7BF8FBCBF5897359
6185:10827000198CFBF2BD306898C7EA7B8529C7615E1F
6186:108280004CB63A27001E2A93576E6330CE4A5147A8
6187:10829000F3AD9C1CED6F81AA1B07A3E9FB4A91F586
6188:1082A0000A318CD50DA653FB9B0663E9FDE64133ED
6189:1082B0003D570F4EA6F7C64191B9015E33283037BE
6190:1082C000C037CCB1FA7430BE492E6F05E2A3B2E5D7
6191:1082D000FA79D88F775B52AE17F0B1E8DE7EC90429
6192:1082E000E3621683FD49E86F51418E639D2538EFA7
6193:1082F00096EE2A1822B41BE731B8E1FD1A78CE09B0
6194:10830000295F0BA8EDB42026EC731360DC8B5AD3E5
6195:1083100075F7B160F90227CC07F1CD9AE9B948ADFC
6196:108320003F0AFE6728F5575B021374D09EBEDEEC51
6197:10833000DC06E3BA1427CF45BC34ECE4F86BD07B01
6198:10834000E65861DC0D8F084EA00CBB35DF6A623049
6199:10835000CFFC33F5066F76B0FFAAC1A94C063C2CC2
6200:108360001BCCA067C914EF72C443CDE04D0A9DA693
6201:10837000D293C9053A1CCF56A4AB8C032AE074569D
6202:10838000C6F749FD8CC46F41FF9FFC524FE5796EE3
6203:10839000DF2D381EBDDFE83C00E33967F68A48DF91
6204:1083A00073A9CCBE1786784ECF7C76A0D7AD1D22A0
6205:1083B000F341FB6BE0E985E7B968E68E76213E6123
6206:1083C0009E59BCED2BF0EFBFA53D696C3CD0B7E1E9
6207:1083D000776F4BE318BB2DB36F6A00DAAD2E0DC477
6208:1083E000DF0CED5E38A477FAA0DF8DDD6FE4EBA043
6209:1083F000FCC37477221381AE63BC0DC8CF1B96FA01
6210:108400007FA807F8F6FB9FB3CD9483F8EC94021392
6211:1084100024F8BE13F0E8837175EE16E7F9895E2C37
6212:1084200072C994205FAB7C1CCEDF1B06C7137E2E67
6213:10843000D71BA71C47FE057EC5F7750A9FDF8E7CFC
6214:108440000F4F7DFF7C852F39DFABFC5C274165F842
6215:10845000AECE12E5F7C17C2A7F04FC0728DF747CCE
6216:1084600089A714F92E4B704E80C746659D548A0724
6217:108470001F2844FEFF38CED902EF7FD2E400640506
6218:10848000F9BF627009D58B1AFC26F5A7F2BF51E13E
6219:10849000773DF27F08DFC3778CC177F7E5789F449B
6220:1084A0003C95FDE06FCFFD17BC5A2005321F8BC3F2
6221:1084B000A795F827B80E4CF627D3691DC8EB42F8EC
6222:1084C000483C556590015FFA87DFA1756084E79CA1
6223:1084D00090F24DC8D7D988997E69A935F8FE6927E9
6224:1084E000977FD7CAFF1D0AFFCF33B2551E6C4FEAE4
6225:1084F0004B0B6DEF7C4ED90B388F534E81B7F74F36
6226:108500001A37E0C984F885F1BB915E8B0A64DD7D82
6227:10851000E9D88FBA7E399F7CD5F87FE4BC3679FFE5
6228:108520001B45DE87CB7706EDA17CFFF885497E945D
6229:10853000FF6F33D00700FB4E44CA4F2AF29FF4432B
6230:108540004494FF6AF27F5DEEADBF413C8D20FF7F1A
6231:10855000FB8FC87F95AFD4F5A2AE0F753D84AF1FDA
6232:10856000753DDCB0CB19F52DA41320E6495C3F9294
6233:10857000EF199C479D1C9983EB525D479B8E0BB472
6234:10858000CE86E90565DD04D789564F8CB64EEA9450
6235:1085900075B1565917EA7AE8113BF716C277753963
6236:1085A0005E634EC8BAD8782C5C2F8CCA570CF96A17
6237:1085B0006D5C3D43BEAA8367285F1947590F969C9F
6238:1085C000AFA70FFE7A8DFC3436C740EDFD2FF2D3F6
6239:1085D000D89C91ED0919DFFFB3EC89CBF5BFCB95A2
6240:1085E000613C977341CEA607F9ED865719B717C6B8
6241:1085F0005B9DC83FBD117C9EBD86547F0BD6BBC220
6242:10860000EA118FAAFE5F8B748F0DF269B5CB5B8E7A
6243:108610007456E9DF1BE1CBDE927DED7436C6F519A9
6244:10862000DCD948EF3E8DFEAF1B85CEF373BE9EDCDA
6245:108630009B91736D745E91F34FB713D78E4457E6D9
6246:10864000E6F640902EC66564BF0540A109A3D35548
6247:10865000DFC1F1AEC26D0149D5B7B1A86F815FD658
6248:10866000E5FC03F2A7720EFC3A06C11797BB8B809C
6249:10867000EEDF5160D6B31CD7E14D056A79A0C32D5A
6250:10868000A1DC81DF0BA9073733117E39ECEB3E53B8
6251:108690000EF56FD83B54EEC3F28AA228A53DE6162C
6252:1086A00058B07EDBD1936776D33CF6F0F5EBED97CF
6253:1086B0003C5342E05C80AD21704118BC8FD7B74974
6254:1086C000FDCC4EEDF8F97A85F60517E71F4F883D8A
6255:1086D00002949C1B8DF6E471C17E1FD07F45D1C7EB
6256:1086E00006A45770FEAF2C77A780BC3C2128F07FF2
6257:1086F0009CC1F9AE38CEE11F1C7DBDC32729ED0119
6258:108700009E372A68D6770A6E11DADD5820F8C7A599
6259:108710000FC7F30F86F8561D07A860EDF7CC10F7CA
6260:10872000F5BEC7F54DDF8FA3EF03C6AFD1FFCD4533
6261:10873000CCEDB70CAFF773558E7E0EB0DA3EE0721B
6262:1087400019CCCF9F3DBC7E8F52BF4FA753F075B65B
6263:1087500003F9A7CFA0E2F34F0457300EFFC7D13F74
6264:108760002DF771BE65EEB0F95F6DFC3FCAD1DA0B33
6265:10877000F8236BBF0F5C0D7FCF0FC39FC23FB55A6D
6266:108780007E8A923CA72F433B5171821DEDE24D1E24
6267:10879000F36EB4FF83FC3140FCD1676643FCACE56B
6268:1087A000FF8BCBCBB3C9FE51EA5FEE40F9E6D10DAA
6269:1087B000D5E7EB41E52FF83E0BF8094D64FCFE834D
6270:1087C000A3973A7CD9441F2A2758BACA7AE80C835F
6271:1087D0008BC2D68FC2FFB47E51CE037E268C20671B
6272:1087E0000C2E8EDF8F04B61CE5645F19B713FBC631
6273:1087F000F167A64B20BCD95C1C8F09CAB32F220499
6274:108800000F29413AC34F00FD909079139EAAE2D4FC
6275:1088100079C7562DCC80EF6378B9EC8A7AC4971269
6276:1088200084C3DB1BE78AAD42BC04DB8F7E13E552B9
6277:108830009582B74C57CC9B0A5F09B82EEB884180D4
6278:108840002F8E0B3E11FD04E48B11E6FD97E17CE5D4
6279:108850000BFBDEADBFCAF79F0C5F97EEB0EF993E02
6280:10886000F7EB7CAFD06D61185DE785D1B53C0CAE00
6281:108870005661BF46FEA9727175D7836D09308FDBD3
6282:108880008F08A86642F839BD0AD7E7ED76957FC70D
6283:10889000BD89FC1AE4E7F184E7A59DAA3CCC78C425
6284:1088A0000D745B82F2B030082F437941F0842AF7CF
6285:1088B000B4507D91F908CACF9BDBD5FA13A9FE8A83
6286:1088C00056B5BD2C82553A32DFA42AECBF2A57D1C7
6287:1088D00017BEEBDEC4F20D27F8F755C726BFE9CB6C
6288:1088E000B8CA7AD81386977D61B02FACFEC35FA15A
6289:1088F0005F5AC3BEBF37AC7C7718DC1106B76BBFBD
6290:10890000AF5923D03AAC017E40427CD5BABC4D5918
6291:108910009743F480190816B2DB34EBEA86160EDFB3
6292:1089200071ACA0AADD1202BB0A69DDA8EB42CFF848
6293:108930008F318ED1BAD08F222F6B5CA3F06556B8E1
6294:10894000BEE5E57FC45F93D00E661ABBA047D4C2D4
6295:10895000DDA23AEE796F6ECDC6972A7C7D15FA07B7
6296:1089600037FC9B765EE0AF2A704555794A885DE218
6297:108970002BAF7287CC53AD3FF78B2B22F6B7D35575
6298:108980005E7508DAAF2E0B4CA8877AD531FC097AD0
6299:108990004D44BDB95989C7CC7D41F4A05EAB8E086A
6300:1089A0004C68C80E9927EBCCC47976DF23127D7C06
6301:1089B0002D401F8CAF317030C135EB8E8A6A3C0C74
6302:1089C000F57BEE111B518FBEDD189B80E33FEBE280
6303:1089D000FE424FD4D884B5007747AE32C850AF7B43
6304:1089E00047053D4F89EEED03B0D6BE7F6C599565C6
6305:1089F000129647117E9E702DAE6A06BE3EEC92E93D
6306:108A00007B6F8C3DA10BEDE7FBF4EC4919C7E3DC70
6307:108A10004F7C73BF3107FDE79AE6C909684FAEFE88
6308:108A2000D7257393A0DEEA36BD53A07A6C2A8EDB7D
6309:108A30007B5F8501CBD7B42A4FDFF5F47CF1CB27E0
6310:108A40005A6C507FE071C17910EACFFEA4F3D5A92A
6311:108A500000AF6F1FEF44D29C1CD4313BF4F36EC7C0
6312:108A600044BF08FCF89EB9FEE545BC3EC3FAEB3FA7
6313:108A7000975F5B948BF545FB36A87F16DEA33D7CA4
6314:108A800076A77850C071D9AC11024CE9EC17F26BA3
6315:108A900068D742B97D1BBC3FDB765B02DA596705BC
6316:108AA000D926C0FC7B8ED55439805FD67718157ACD
6317:108AB000D624D5C0FC6B7443FC42FA635D34877BDB
6318:108AC0005C35554F227E1F9968433CCF9AEE3EEDB0
6319:108AD000023C9972DD2FE1F33D33D7532F7E29AE4F
6320:108AE000427BFCE717562760BCEE57CAFA3939B803
6321:108AF0003A617588BDB3EE2389E8FEA241DE8AE3C0
6322:108B00007C312255407F19E81EBB04D6EF1AC5FF01
6323:108B100000FE6D7C6E04BBE76997487CDFBD2BBE11
6324:108B200048D6F0713DC94FF21B00EE3FB6F1111F60
6325:108B3000C8D7F78D8DEC3D5C7CF742C14C78F69838
6326:108B4000297EA57FC6EC37A763FCD33D17F9993979
6327:108B50003A33975A43D69D52FF0F3E2BD5FF03D48D
6328:108B600047FFED0FBEDF5B9965B81DBFDE66F5A15F
6329:108B700031F181D52A211DDE969ACEDE0DDFAD7B47
6330:108B80005C4F727FDDE3F1F70EA0BC017EC1F858A7
6331:108B9000F8BCA64CD713BE465D87BE6F6BD721FBD2
6332:108BA00036C9EBD1D6E15F8FDD5B75C832FA3A5C2E
6333:108BB000AFF829731FD77B701DADCFB34A0CF447B4
6334:108BC000D9E32F3D89FCBE7E8BD9658481AF7FDCE4
6335:108BD00048F4EAB75A7D7628F7DAAC52343C4DD3E4
6336:108BE000397DAF9BCED7CD1C914926173D5B314EC9
6337:108BF0007A09C6130BF0F9C6BDDF9D01FD7CC8FCE8
6338:108C000037CD00FC5D4282015E2E1D17297EC824EF
6339:108C1000B75409F2B19671B950F7CA738652F8B5D4
6340:108C2000B67EFD42F4EB6EF3EBDFED577CB62BCA5C
6341:108C300034519E6EE6AF40AF6ACB37B3DD17C5A99E
6342:108C4000C4C6065C8F759D61E5F5D77F80F197CD31
6343:108C50004C7AB75F8DD7C238E4E9D6B8B39100B883
6344:108C6000980B30C42ED5EB33194C71BD05D615CCFD
6345:108C700077CE3E81C6BDBE51F41BA1FE9C581EF7A7
6346:108C80007DBF09E83F91E6EDB303BCFE61AE67D658
6347:108C900033C16F825FAFDFB745C2F5D081F205E324
6348:108CA000D402F3207FBF6776A6A1BFBEEE7133E189
6349:108CB00077FDFEDB7EFB087CD7DF5C1917EA1FE738
6350:108CC0002B7C01ED33534CB09D0F9ABF9D86FC3F2A
6351:108CD000E77BE0E7C27CD747B31F56A523BD92D2FE
6352:108CE000644BB0DEFA6DF764F27AE027C3BC6B76B2
6353:108CF0008A340FF6BC91F41EAC7507C965059F6BED
6354:108D00005A5F3118B2514EEFEE13A1FEBB008B1625
6355:108D1000C2974FC1A301F1B50ABF4DE2DF38F2158A
6356:108D2000BB5B2639E2C5F955EB84554B49AE0F18AC
6357:108D3000685D4FE7F1CDAAE9DC9EAD4973DE427173
6358:108D4000E4078C4E9453F823AAE300BFAA4ED7B78A
6359:108D50000EE3B9ECC7468A8F6C6E35BBCD36F23B5D
6360:108D6000DCC7707C12930C808F8D3297176B143E8A
6361:108D7000DC2C2FB91EF906CACF48B8BF62E572B124
6362:108D80002E1AF0CEED54B70EFAF9187F1BCFDB4D3B
6363:108D90009A1AD2BFA0BC8776645BB0DD5E1D6BC73C
6364:108DA000380BD69F3415F1187BD3721CDFB322AD7C
6365:108DB0006798FC030568E73D2B4E47FFB66667CF13
6366:108DC000DC0E848FE6D8B1C99A1FFE9AF4C6ED0A6C
6367:108DD000FDFBD1DE473D02F051787E7B3AD7FB5E4A
6368:108DE00091C77DBEADE049E503B5BC6EA79EC7DF68
6369:108DF000DB8C64C7D435FF8EDAADB3F625A0FCADAD
6370:108E00007B5E9F8F72DAA78C7B75736AD119E0AB9A
6371:108E1000D5FA28BB00AF36FA2A0D086FDC23101CE8
6372:108E2000FC2E3E0DF9F4CFAD3FB121FFBC670E4CD7
6373:108E3000407D34B0C5EC3C881350E26E7F6E9D706F
6374:108E400010E3336BEC7D5601CAD76C1D1F83F2FB18
6375:108E50006D7BC080E56F77A6EB1076DBED4508BB38
6376:108E6000A56904FF1944198F2B31F29F37099CCE55
6377:108E70001B9FE9318C83FE9E54E6FBD1B3BFCE44E9
6378:108E80007D5597D697897A05F8203319F1FCB440BF
6379:108E9000FA78D333A2DB3C35C8079B900F60DD6DB9
6380:108EA00050F860D3F19F7C0BD7C326A4BF6B381F4B
6381:108EB000019F9EA6F7C70ECC65FCFBD3C827AA1E50
6382:108EC00003B8558FF1348302433F081F9ECED7135A
6383:108ED0009497F3725F36C953D66F40BB737397DEB6
6384:108EE000D71FB2FF331A9D7B143AAE6E3692DCED7B
6385:108EF00051E6DDBFF3791BD2F1A3677B5EC6FD921D
6386:108F0000BA63A0ADE511D6858297CD88071BCD83C6
6387:108F1000EC8BCD386F5B100F43FCAFACC7CD8CCF63
6388:108F2000539DF76649C1835AAE7C7F5AE19B8D4CB5
6389:108F3000C1DBF1897CFD29EB0DD733CA55757EDE87
6390:108F400018FEBDCAA7E715BDF08632CF8DC017CE7B
6391:108F50006CE21FB741951350F4D1D10314FF51E9CE
6392:108F6000A58EFB6F417DE28E8E09D2B15FC76A3B51
6393:108F700047889BBCABE0EF9DB6C4B42EC0DB9FC15D
6394:108F8000CF427B0AF9550AE94FE51BB5BF393F5877
6395:108F9000B200E70BED07B07DB5DFB77D9112B6F3F8
6396:108FA00036E3EB03F913E5A7BA2EE7B4AC5C9063A4
6397:108FB000C37A1F59C767E37CB95CFBDB743B3DDDBB
6398:108FC000682FC0F7EE2E81E2CFEF287EFD3B6D3F8C
6399:108FD000B1AD0EC1D367CAB8553EC31F8C4BA9E3D0
6400:108FE000ED8DE1F1DCF071AB72481DF79C1D372F60
6401:108FF000C0F7EAF8557E55F953C5A3CAA7ECDE7849
6402:10900000B26BC2F995784DD5ABA246DE937EBC3EDD
6403:10901000E5A2C16B19FE3E1C56EDA1F7304E83F25E
6404:10902000E329D14FF2A3D5713A2344CFC38F2554FE
6405:10903000EF346FB9DE5E8AFBAFCF084E347942F46D
6406:10904000CB6E2944BFA876C12DB9E3B8BC8F739FFE
6407:10905000473A6E3CD737D72607EDD0D99F04C428AE
6408:109060008C4B1D4F7785EAD38D174E13FFD7B1BEBA
6409:10907000EDE847D5ECFC75E50CE4F3A7F4B43F53F9
6410:10908000D3566140BBFEB6276FCD473E7AB77D3CD5
6411:10909000C9F5F387F2A6135F317BC24DC0FF6B0E9B
6412:1090A000EDBD6905BC5FD3253A49BE433BB86E6B45
6413:1090B000EE9CCE906FDE33F75716A2FD7EB7684761
6414:1090C000FB7DD69379F762FD59D6B1D1380FF7A160
6415:1090D0005882DD5214E907D5EE7D5B91932D7ACE4F
6416:1090E00017F372F97A2A197A727E9BD3D29289FB8E
6417:1090F000E90307403EE3BEB241EE0C607F2F2492AD
6418:109100007FB119DC2107D0FD9CC0EDB25A03332595
6419:10911000B9E8BD2909DEBFA2EFBB13F5C82B775A0A
6420:10912000739A7100E2E7F9ABB93DCDF70F6379FFB0
6421:109130002ADED4715CAFF41FDE9EFA7D2FFA11286F
6422:109140004F95F19F6F7DEA26D483E78F4C88C179D4
6423:109150007FF082B91DEDA90FF45C2E0EF9DB7EFDC8
6424:10916000FBA1761AD8751A18EC380D0CFCFBBED68C
6425:109170002EDCC6ED8B5CAD1DA7F27BF5960951A1E7
6426:109180007904E1F63BCB08DFB79911C5469037EA81
6427:10919000F34213200A1835156D7AF8BE3CF28BE7BE
6428:1091A000FAD0DEDF63B41B619EEF23FFE3BED4F38E
6429:1091B000A21FF761D036C7F5F0FED11C3FFA91EB44
6430:1091C000DEF2CEC5F64F3FB883F20CD6827D9928E9
6431:1091D00084D8CD0F3F7813B2FF25A7777B127C7719
6432:1091E000E908CF8B80624B98BDFC7292FC8FDBCB81
6433:1091F000D76A27ABF186ED88E7C9F0BB933911CF69
6434:109200002A7E55BFE945E083025748BCAFA996ECDA
6435:10921000E40B4D5E7A7E2CBCF3C02CE45F6B94F3C0
6436:10922000207CF6F3AEBD6232D2F978CEE7E8F716CD
6437:109230005AA2ECB86EFFD2D4489B8F179AEAE9A9DC
6438:10924000D2598DB7CD3EDE4DDFFDA56BFA8959F0C1
6439:10925000DD494B1497FFC3F67B383DC3F340EED88E
6440:10926000322311DFABF3FAF06E4E5775DC1F1EB9D7
6441:10927000D586F3EA7E2CF6C44CA46764941DEDBD3C
6442:10928000F54AFEC7D90E6E4F9F33451D5E88792380
6443:10929000FB96253090B36BBBBF7113BE5FF7826046
6444:1092A000473FC0F9C2121BFA6B7F92FA6D767CC2FF
6445:1092B00077011C8FE417511E15CE63B41F5518900B
6446:1092C000989C4E5BBDC42F332F487ECC1BF933EEE8
6447:1092D00053613CE4F3088A873065FF69ED4F791CE0
6448:1092E00065C8BF55FCBB59CABCDFCD8DE1FCADBC28
6449:1092F0009F53C0DF7FB0EFB945D8DEF9437A3B8E8C
6450:10930000FB2F87F4D4FE06F0CB7430DE7347B8BF72
6451:10931000B3A153203FF9FC11D0D730AFBA2D7AB7A3
6452:10932000216A381FCE81F27E4B900F37B8FDC4DF23
6453:109330004CE14713FC7765DC707E8C669DDB111F6A
6454:10934000FF285F9E095BF743FC381A1F28F8C27597
6455:109350008CFCA8D27B4307DF578FE9CC2945BE524E
6456:10936000E9AFCA095F19CB42BDDA6260599887E359
6457:10937000D34538717D2FB1C87A01F0B02CAEBF1C37
6458:10938000C569451E9793E21C9D5B87FAA5C5487287
6459:10939000205C8E5CCCE5765223F234FCB3E6713B64
6460:1093A00042CFEAC90F519FA07752517F2F898CF984
6461:1093B0006F19AA7C79FCDB2B2418FF925931778E28
6462:1093C000778253F67CCB0A09F877C9F498E7C7018E
6463:1093D0006CCADBC6CBA7C5E4E9016E6E6E5D510EAB
6464:1093E000F0843CF7E7B9F1C17ED476E1FD157CFF4E
6465:1093F000CC64AF2E2F1EE5BA85E4F4C7C2C0D4C634
6466:10940000F460FDD705F6F6CF8520DCAF676968DF2D
6467:1094100059B1ADF8D19F8BF2DC917979C3DFAF669A
6468:10942000AC8DF2E77CBF3823703FCC63027A2D56B7
6469:10943000F86AB5C912207FBE5D7F6188DEC847CE5D
6470:109440002809E9BA48E1A3C552A01BBF9FC45AED41
6471:10945000674D6442EDBB123BBAFC8685C7CEAAEDD0
6472:1094600001BF7CAC87F9025F0BC09E8DB0640440E5
6473:109470007235C82FE1C42F3EC3765B7CACDF4C74E1
6474:10948000A8B6A3DC13985777059E7591B6A918372F
6475:10949000A98B4CF323DF373CFFD16964AFDB54FB6E
6476:1094A000C55B40FCBED5CEE7C3BC85C48F772AFC24
6477:1094B000F84113ABCF80A5B7B8AFCF26C3A02F2CF0
6478:1094C0000A64E27ABF9CE6CD453A7CB0AF25A5019F
6479:1094D000F8E7A36346E742A87FCEFF1CC5E1362A22
6480:1094E000F6283B14AFAC7B315002F57AD3271D44EC
6481:1094F000FD529CC7F5F585F440DA3D2837D2B9FF17
6482:1095000003F528CF6DDEB6EBE3B1DE85A33B32D6A3
6483:1095100002FD8C12F35963E8C96C30EFF9D0760183
6484:10952000C07A8045DACFF5537B58CF86FA5EBED538
6485:10953000C1E3EDCC837245A5974A8761F48121A0F0
6486:10954000BDAA33313D8E7F12DB67C7F5AAD2E9038E
6487:1095500013E011E36726C023ACEF0A0C3AE4223E85
6488:1095600079BCA541E86F8D45F85981F2E686EBC1DB
6489:10957000270D88F2DA7DB792FC51E58E0CFF8D2421
6490:1095800077BE76DC68DF9C11E5CEFA3C45EEE4B0B0
6491:109590009C2BDC4024FAAE57BEAD10AB6509C71D4D
6492:1095A0006F72623CADE1F1F1A46F58F67FB2D07AF0
6493:1095B0006C5F2CD7ABE922E1FDB62E81F21B2BBBF1
6494:1095C00092990C450BBB62E9691B4CA2F7E70FBFF0
6495:1095D0009ACBE512A74BE5F713CB28AFE8FB13E9CD
6496:1095E000A98EA341E1BB0A31BB3380768405C60155
6497:1095F00070C32B5C6F35DC28525C93A1884E4062AF
6498:10960000F21F8FA59DE23F1E3664DF0B57284E2BBD
6499:1096100047215D3CBD2243FE016FC3C7F16C6A4622
6500:109620003C1B1D3A268F607F18153A99E50826875E
6501:10963000F81D926FD2778A301EFB0DBDD30FE52D3A
6502:1096400066DB415C4FCCE7EE437F61B9F25D9F99E9
6503:10965000F34764568CE6FB1DB6B9BDC86FCBDD5C25
6504:10966000EF589D6334FD1BC58D7A6432E6E5F6A2A2
6505:10967000CA0FC497D0EF628F40FAF5C6E5501ED2EC
6506:10968000AEBEE822C9717D91D6CE347AB4F5BEAFB4
6507:10969000D27F129B144AFF20DE2D6EB4D32FB9ADBA
6508:1096A000C4C7A0DDFFAD08E09B7AF50CE76B8CE04A
6509:1096B000F3BA8498C2B8A85BF463BC6407E201DE25
6510:1096C000471568F119EDD6E22F769E161FF11EEDB3
6511:1096D000FC13978FD3942779AFD39427D7BA3470DC
6512:1096E0006A7DA1A6FED8C6320D9CEE5BA0A93FBE46
6513:1096F0007DA9069EB06785A6FEC48ED59AF249FE66
6514:109700000D9AF2C9471A34F094CE7FD1D49FD6B5C2
6515:109710004D539E13B84F533EBDF7210D9CD7F7A86C
6516:10972000A6FE8C330735E533FB9FD694CF3A774CB2
6517:1097300003CF1EF899A67EC9E0290D5CCA5ED5D478
6518:109740009F63FAB506AEB0FF5E53FF7AC77B9AF20D
6519:10975000F9F29F35E537645DD6F26B04977F95CEBD
6520:10976000BF69BE1353BC9FA23E60E20509F9B6650E
6521:10977000A5C062319EDEBBCC847260308C0F3FCEC0
6522:10978000B52B7E0D4B43795621160570DD5EEA122E
6523:1097900068FD87EB3BE9CF1E37C6F3D84F0427C6D9
6524:1097A000D9A2406D4921FD47BB4DE04806E1D8797B
6525:1097B000760D1CEF7168EA272E9735E549DE2C4DB2
6526:1097C0007972AD5303A7D61768EA8F6D746BE07496
6527:1097D000DF3C4DFDF1ED1E0D3C61CF724DFD891D4D
6528:1097E0005E4DF9247FADA67CF2917A0D3CA5B35174
6529:1097F000537F5A974F539E1368D7944FEFDDA38141
6530:10980000F3FA3A34F5679CF16BCA67F61FD194CF2F
6531:109810003AD7A981670F7469EA970C063470297BDF
6532:1098200045537F8EE9750D5C617F5353FF7AC73BCB
6533:109830009AF2F9F2794DB96ADFDC907551FB5EB1AD
6534:10984000772A9D9F69BEF795B919F287EF98E06C6A
6535:1098500091417EE5F3F80BC8F57EB388F69187E277
6536:1098600046319820087C1905420CF90A5D856A8A00
6537:109870003FC551DC9754938CF93E60270010A34BF1
6538:109880004F477B3A3268B7A55C997EED76DB1A6864
6539:1098900013F97C6FBEB72A3F0FFD95A373D16EBF3E
6540:1098A0008DF9B6E33840EF45F5C3FA78CDAC8D6756
6541:1098B000A8CFF926C04B487FAF98F7A4B8AEE2F71F
6542:1098C000CF375DA0FA43ED2A710E01E6D710D2FE24
6543:1098D00003E0574860D7ED698275030EE3434D7688
6544:1098E000821F6E7210FCDD26999E1D4D59F47CB4CA
6545:1098F000C949E5FB9A0A08DEDFE426D8DF348F9EEB
6546:10990000079B3CF4FE50D372820F831F8DCF23E060
6547:1099100057E3F369F08FB1FC19F09711FE61938F53
6548:109920009E9D4DEDF4FE58D31E828F377510FCE3DB
6549:10993000263F3DBB9A8ED0F3674D9D547EA2A98BE6
6550:10994000E0934D0182034DBD049F6AEA23F874D36E
6551:1099500019825F6EEAA7676FD3397AFE7BD30095D1
6552:10996000FFB26990E0568CD7023E1ECCE77E908A0B
6553:10997000171566AC9CF841B50F17A19D8FCC51A06F
6554:10998000FF8BC6CE0FB3B7C3E9F1A11217D69781EB
6555:10999000B988F1C33199075B42FCACC795FE7644A8
6556:1099A000309F19F8BD59C7FDDAE6184679D64CB193
6557:1099B0005FD72B7CC9E2B8DDBA4E19D77A653DE492
6558:1099C000217F66117FFEF2EBF815AADF9832C5FB06
6559:1099D0002CF167AACE47FEB3C59F89F673C9146FF1
6560:1099E000677E3CEE37AE7D99FAB33B69DFB1D218A2
6561:1099F00088BF19E323AF8814CF1BADBFCD4AFEF853
6562:109A0000A8E527CFA7A0BD3DEF4BD18B787A4D6F4E
6563:109A10005D8EF1829E7C1E7FEEC9D7699E2F4DF12F
6564:109A20009EC2F17C6AADBF4507E3FFB478CBE13B52
6565:109A3000D283FEF4627449C10F5AC2643DE52732F5
6566:109A4000F74BE9D0D48D6060217C33F3D1736EB6CF
6567:109A5000F7556CA70A0C7184BD85C6B491E6153E16
6568:109A6000AEDF2AF4FA6DBE4EF3BC3CC5FB1B3E2EA6
6569:109A7000378DEBB599D767E2BCD471E54E9595BCAF
6570:109A8000E481FD38BE4F5FB87856181FC4BFEAB7EF
6571:109A90006F2F55F24AB6083C2EA7DA6B4A5E8AEA67
6572:109AA0007754DF29F8D15E5F09FE0EEE2FBDA5D8F1
6573:109AB0009F6F99B97EBE54AFCF42BBBE5A8870E249
6574:109AC0003EDCA5FA3F5950DD427D86FB242D98737C
6575:109AD00000E52D770B94CF5D0DEDE8A09D6A0C0499
6576:109AE000E277F70AC47F13A7A6D3B8ABC1FC233F24
6577:109AF0002B6E200DF74B815F2EE37C37CC147D0657
6578:109B0000B0875FD3F93305DA975E6B10609CEBE3A7
6579:109B1000804FC68DCE0F9B94F307EA7BE0B32FB046
6580:109B2000BDBFFC744616C5F14FCE94116F2D3A7E21
6581:109B30001EC9F7EFA293E7BB70512DCE9A42714A2E
6582:109B400026399D1867AA54CEAF748BACF1E8087221
6583:109B500074EC0CCE4FAF39F4F3FCD4AE76BF267163
6584:109B600006A763E20C4EDFCA53AFA4E2F9AB4DBDCA
6585:109B70007AB247586E7FB6C73AC27C1A77DD951124
6586:109B8000C2DF9BBBDEE1F91AAC3F3B343FBD40E98D
6587:109B90005FE527D160F51EB0848E6F88BFD3662045
6588:109BA0001F45037F8F27FE3E8BF6F622A31C7533DD
6589:109BB0003CFB014501787ABF67A77C2335EF680D30
6590:109BC000F3D0733DB003F2B3C7F7A001F1BF8175C5
6591:109BD000D2FB4D05B7A621BC990D943BD09F686F71
6592:109BE0007EC901A35CB6E7C10A8CCF2EF5D7BC8431
6593:109BF000CF258784B3E8BFC2FA983603E327427DB6
6594:109C0000DB18E86FC533A56DC9F07E91C8E9C15E68
6595:109C1000E5F400BE718B31C3E709EB61067EFF6995
6596:109C2000B49BE621DAE669D643F536E616E282F918
6597:109C3000F343EBA3E0F63F26A33F240DD0FEFBE663
6598:109C400093C618A4F306C6F57730FEA1EA6D467CEC
6599:109C50007E3B8B7062BD0F15BEFE3095115F7F2875
6600:109C60008083E70ADA932CCDEB708D0FEADF0F7556
6601:109C7000FE7CDB78D2CF8B10EF2F3B96C91837BB19
6602:109C80003DCEE414B13CDA9FC6F75187E43CBB12E9
6603:109C9000198C7B3DA0E771A8F07109052F7F86F62E
6604:109CA00083D1C07CB8BF01EB9BE5E3BA1E63A0750E
6605:109CB000D582A8C5F85999471EA9FD56A5DDDE2F06
6606:109CC000B81FEC83F9E079C961FDD8957E22783F11
6607:109CD000AA1EC1FE488E24304D7F9B31C905D78115
6608:109CE000D54DE36FD64593DCF978AC7713D24B8D25
6609:109CF000FFA8FE616FFA0719E4C77FDE9282763A09
6610:109D0000F02FCF4B2CE6F2E935BDEC43F8B5D27419
6611:109D10008AFFAB727771018F972D56E3634561F12E
6612:109D2000B1B0B80C2B1A395EC698538FFD4E626FD6
6613:109D3000A9F8A178CCA92289E8EE03BA63BCF9940A
6614:109D4000E2A7964672FFFCF73362899F62E66710CE
6615:109D5000BFD9625980F6A3AC22F15B0FCBB1C484AA
6616:109D6000C889FB9438EB6EB08758487CFDBEDC0692
6617:109D700013E61BECB0F0738CF79745D486E6BBFF77
6618:109D80006EB69EF0797B71E92BC83FD9167F19A971
6619:109D90006DB724E37C04657E93ED807F1D36ED5125
6620:109DA000E2A54E138F4F9593DE56E97EAD7AFB699F
6621:109DB000C9BF2D02E71FC7681D5A3BCC244FC54EB3
6622:109DC000770053AF27152F3D4CF4943C59D84F776B
6623:109DD0007E04B340FD4FBB0DE4E79FD4ADFE1EE60D
6624:109DE000C50FBC6964B8FFD9694D96506F747E7118
6625:109DF0005D393DADB3E6321EEF8CD481A0C8B1B35E
6626:109E0000277E844453CE9F750AAC9751DCCD1DA9A3
6627:109E1000035FAC53C72E97C0B88E595C7BA711EB7C
6628:109E200079449CE77B45DE9F225EF2593DC1F71BDA
6629:109E30003CB507A0DFFB634CC42FF714794EF071DB
6630:109E4000B2B68530BEE23902C3F3BC6D066E9F59CF
6631:109E50009D117C6F8A713BDF339849FDFF429197DA
6632:109E6000AD0E771F1E1C19156F766960283E427C67
6633:109E70009742713D158FA1F4B2E76BE8E5D587D223
6634:109E8000AB00E83525945E6EE1EBD0CB8F4966F1EF
6635:109E9000C3F9D457263F589ECBF51BA6CA85F36954
6636:109EA000A971B605F35CBA6DA20EE9D61D919C8D21
6637:109EB000F139954F55BE1D815FB7F4A0DC4891EC98
6638:109EC000B86F6CAC8CA07D18957F55BEB514F2FCB4
6639:109ED0002DE0DF5585F05C69F154A06C09E75F8CDB
6640:109EE0009385F269F5A8FCCCECA1EB7811D815515B
6641:109EF00031680F9D3BD419C2A7D5F517252E57AE53
6642:109F00009444E407E37A8B8A04F66E28BDE1DFBB54
6643:109F100059CAFCC81E92C80F53F17AADF8D77FA377
6644:109F2000390BEDBBED786E11F0D52E38DD8918EFC9
6645:109F3000AA7FE70E7CDFA69C1BF6651BB8DDA5ACEF
6646:109F40001BB5BD49C5655105B82F30E342E43AA8B9
6647:109F5000F769824E46E4B4C9AB7F44EBF04C24C3AE
6648:109F6000EF6CB17DB54FD0BA9AC870DFF0D3DBBCCF
6649:109F700063711F7F27D0E95D4AB2F627EA688FAB8D
6650:109F80003F11D71520D7C19F5E077FCF94723FC185
6651:109F900087668E53F2ACDD4AFD7EAABFD3B0C714EC
6652:109FA00081FDA49BEC0743F8BF4489BB5716A8E783
6653:109FB000755A64B4D72A0BB85DB3B7E9C8ECF72774
6654:109FC000E0783A67BF0FE3895DE8675EE0EB882CD5
6655:109FD0009F8CA921A62FE70878AE815DC73A311E74
6656:109FE0008FEF9BA704DB7715F07567423B06E867A8
6657:109FF000DAE69343E5A849277847CA83393C53E218
6658:10A00000DF6D63546E3AF5089DF38FCD700A980F9B
6659:10A010006DDAB687E13E8D39C0DFC765B885352179
6660:10A02000EDC62D847187F005F0972F0AE48FE920A3
6661:10A0300030662ED22182E292E1FD2E8A2FEB956CC2
6662:10A04000A3F34938BF3185DF54BE51E74927564253
6663:10A05000CEEB978FE376725BA3E100E5A116441384
6664:10A060007E3F892B8B6223D89FEA733FF081CF8894
6665:10A070007EB3899E07C1EFF64D44BFD941F061F030
6666:10A08000BBF17904FC6E7C3E0D7E37963F037E3734
6667:10A09000C23F04BF1BE14EF0BB113E067E37C2C774
6668:10A0A000C1EF46F8C7E077E3B30BFC6E7CFE0CFC17
6669:10A0B0006E2C3F017E37C22546E00F9C4F96CFB1F4
6670:10A0C00014E8DA7EB7C18D7984FB15BAF6B8C7C536
6671:10A0D0003A81FEE62C1DC5C4CDBF7C88E17CCC0E48
6672:10A0E0001D9D0BDBEE7888DD8AFE6CBE95ECA9B673
6673:10A0F00067B99D6296F632943BFB055F2D73C2FBF8
6674:10A10000AE926ADCDFCB706C298B01785757C53E65
6675:10A1100013AC8F4C79C9F2E61058B6BA361CB507A5
6676:10A12000E1B1D90724F058D89E8279FBF048108E0F
6677:10A1300003F3871FED5A50DD0C2C1418C7C8DE1826
6678:10A14000483750DECE1AA417C6230A783CF106D64B
6679:10A15000E2C0FDCCB132784502D50FB0B86BAFBFCD
6680:10A16000BF40A6F7E1DF5DAD9E2EF79AEA31F12AF6
6681:10A17000ED61B97095764CC232531F8C7D975E911C
6682:10A1800053F1169253ED18DF01BCB79BF9F3BF678B
6683:10A190002A7ECECCB25533E1B96A26A76BBBD9670C
6684:10A1A0002FC3FEA7E8289F8135A6FF7A1CF477D736
6685:10A1B000BF4B0CF34155FE7C5EE1830963AD742E09
6686:10A1C0009FDD63A2FDFCEBC73EDB1A03F084279CF6
6687:10A1D0004ECC7BD8C59C11C827BEDD3ACA7BFC415A
6688:10A1E000EEF89825507D72DEF33128D763677279D7
6689:10A1F000E357F2859ADBD68DC578D4A7AF7379780B
6690:10A200005AE9E780BEAF9EE89967213B04284FF6E4
6691:10A2100046B303880D3A5397C49F06BD7D05D633D8
6692:10A2200080618079D9862F6698D0DF6B1934CEE3B0
6693:10A2300079B37D648718CC5E7B34BCDFE3D3915C5B
6694:10A2400068912D94E7B6CBE2EAC573CE3EBB8EF2A1
6695:10A25000617765EB088FAD969BFC68E74B42732DE9
6696:10A26000EA31BFFD98291DDEFBB37594DFE8772F37
6697:10A270009D87B0CF2B51FE15FD60B93786CE77EFA5
6698:10A280006203AF4EC3F26A6E87B525FCF55424C64F
6699:10A29000BF6FB43BF9760B93313F8C52C574E877AE
6700:10A2A000F76F8BC4715431C59FF591FF6A3372FA11
6701:10A2B0007DA77BBE7D1CD91921FB5A468CD5394D13
6702:10A2C0004E289F6A71CD43FF52B2BA4C98F7D76AB5
6703:10A2D00077996A68FE3C5F8DF232A0DD16BB8EFC7A
6704:10A2E0005C2CBF359BD4E1E98C7C25155FC6793F9A
6705:10A2F000D48DF890D632962EE3F8245FE8BEA1699B
6706:10A300007C51AF0CF3685F1743F3900427C16CAD29
6707:10A3100044E31E2347D0B9E6BD86CA5EB417C7988A
6708:10A320006EA7FDADA45A49B3FF94E8D5C2F1CBB5F1
6709:10A33000702C9382FB57D0AF7DA61A7FD3E22D1CE1
6710:10A340001F49F6D6D771FC495E3A04396CFC8FD8A8
6711:10A350001F8E2E65384E0B8D33C1B2BA14EDA67820
6712:10A36000E66946FEFB47C739D5BED4940EFD4F8D36
6713:10A37000D39179348D0D6CC3767729FCDE9ECEE9BE
6714:10A38000195C5722CD0BD6E53C5C97631B75E0B09A
6715:10A3900005DB4FF781E3A6D93F88D1C013F68CD1F6
6716:10A3A000D49FD8314E533EC97F9DA67CF2119706AB
6717:10A3B0009ED259A8A93FADAB4C03E7041668EA4FFB
6718:10A3C000EF5DAA81F3FA5668EACF38B35A533EB329
6719:10A3D0007F83A67CD6B9060D3C7BE05F34F555FB48
6720:10A3E0003E5C3F96CDFCFBEC7AA3638CE67E9B70D3
6721:10A3F000BF21DCEE377DD9226F437EB619889F25B9
6722:10A40000D4E7B8DF7C37F78F4CC54E19E54B81C2D6
6723:10A410008F9F15BB1723DD4A6D26D20B9285D793EC
6724:10A420002C73C95E49EB30D0BD3B929D0D9547A280
6725:10A430007C6EF2CDCE98101CB7D9BE87EEAF28B592
6726:10A44000CD63988FA47E2FD9DDCC6BC5FE64EACF97
6727:10A4500064F7513DB30CDF87CCE3A44EC72C28C76B
6728:10A46000C18F43FF6034BF4DF5D7543F6D34FF4C6F
6729:10A47000F5CBD2742C029F0784FE3BD07FCFAE7FFA
6730:10A48000BD2C9191FFB605E77D3F9EDB46BF6D2A4F
6731:10A49000B7B3DA1216C818CF694FEFEC1D87E389FE
6732:10A4A000D751BC14EC66E7D2107BF1B199DC0E9564
6733:10A4B000C6B5F7A3FE6B8836C9682F49A603B3DF7C
6734:10A4C000077CEDD7F73F85F18956C1BEB113E5E2B0
6735:10A4D000DD16CA03D9ABE04DB6EAA66F83763B9B87
6736:10A4E000DD129ECFEFDCC99CADB83EE24AB745C352
6737:10A4F000FB0929353A0C034DCC68DE86CFFB67F2A9
6738:10A500007D9F49D90774B1503E39B77439C6BD44EF
6739:10A510003BF4779538B468EB60381F96219D45BEB3
6740:10A5200042EBFE0A0CBD34C644FB9266A4B7404F12
6741:10A53000C28379D0E237239CC1F162760BFE488159
6742:10A54000DBAD9847571AD341F455ED59B473B1FDBB
6743:10A550007B8ABC8F213EE3166AE92A990E113E766A
6744:10A5600029FB12EDD1F22F513FB7A767C4E07E96C9
6745:10A570003A4E55AE1C56EC7BF5BD2A571C986B9392
6746:10A5800017B46F80CF3B30FE6696F6D0B94CF3BD62
6747:10A590007B18F2B5194FB193BDEF933DA43F3C9AA0
6748:10A5A0003CB4F271CB4DA8AF2FC7B9C89E3537FE6A
6749:10A5B00098C6178E37733FCF471B0DAFB6CC4749B0
6750:10A5C000BF830096F13CCFA9044B6D68DC537DBA84
6751:10A5D0000BB8DDA257F386C093407D7659CD4B7200
6752:10A5E00047F2F14573B82773058DEF8E7857E2D5A2
6753:10A5F000EC6D33F89BDE10BAEF943C26C443DBE7E6
6754:10A600004BE6D1BC255A0C6CD717D907289EACF85D
6755:10A610004B6EC53EA9445F0C9E69067E8EC019B77D
6756:10A6200090EE3353E3209766F2FC45A78F893C8E6A
6757:10A630003794B7AEBB328DC62A1B54BD4BA62CD760
6758:10A6400053F07F37E6AB8C6F97B479EE8A1E57F5DF
6759:10A65000F4843DDAF2891D5A78927FD8F7FF897A1F
6760:10A66000FE46FE3BE8016DF9A38ABEBE11F535EE4C
6761:10A67000677D83E78B98604457B89E0DEA3D900351
6762:10A68000A99D8152149B295B254D9EC998307D78E8
6763:10A690004F914C78F0F44A7AD4B36A9C265C0E0B46
6764:10A6A000F75CD882EBA534325246F989710CAF9130
6765:10A6B000FBE55EF053EE979CBFAB46BFAA57A43CA8
6766:10A6C0002A954EE174AD2D14147DEA110BC93FEEAD
6767:10A6D0009F8EFE3AF6E70DE94F8DB79C2FF69A3123
6768:10A6E000BEA1C65D2ECD935E12E4601C458D0BAC01
6769:10A6F00052D6CF2EE71BF53D308E9E33468A8154CD
6770:10A7000088BFEC6DC23CA95489E4977DC6C6EFA111
6771:10A71000FF5DF67B28C778A22C27925DDEABA738B9
6772:10A720004099C2C7658ABFA5C65BD20B399FA72ACD
6773:10A730004FF82282FBF58108B45F271F01D9ABA532
6774:10A7400067242FE771B6299DE1E56ECA5FBA4EE135
6775:10A7500017CC3B2B4DC0742F0E773221D60E749C34
6776:10A76000B6BCFF14BA0ED9AFBC14817C78D4CCED42
6777:10A77000B5A7157E48608213F3F3138E589C7EA80C
6778:10A780006715D9D13E9887F3B4A4C9339B7A420B9D
6779:10A7900067B310381DC7A18577CBF5B8F5CC7657D0
6780:10A7A000834D0E539E59A8E46567B24CE4AF0AD1BD
6781:10A7B0009283FE5343A985215E8DEF4CFCB73E94F6
6782:10A7C00017AFF37BABEC91F283E5F0BDFDD5586795
6783:10A7D000B31CA4FFD3E047A37EF8EE15276BD50783
6784:10A7E000E35ACF003D33687FD94EE59D4057848FB3
6785:10A7F000815F9D41FBCB59F4FEC7E05723DC057E0A
6786:10A80000353E7F067E35BE3F017E35C2B71797DEE7
6787:10A8100084FCF216D443BE88C8396E1A8F716E8BD1
6788:10A8200048E76EC2F97147FD7B969B4156153BC6C2
6789:10A830002E8C477ED82AD2F9E49B0AC72EC4F3DBBC
6790:10A84000A171B5D0386330AED62FA8713523D0E7CB
6791:10A85000F20C59C95F50E26B5E1E5FFBEA76DC6A60
6792:10A860003B14BF1CD6CE501CD3E47B3F0B8F6C092E
6793:10A870002C0ADE7F74F77F1D463D9398E4ADC579C1
6794:10A88000D7E5BD6BE076373F4F95A2ACA37D669EC2
6795:10A890004F9AA2E40185C72F8BE7BC73473CA0EC1D
6796:10A8A0009E9FCD5E89FE7FF1EDEF4C4F03F854E1A2
6797:10A8B000532B31FFB7F8FBEF3C970C78CA9AB58160
6798:10A8C000C37BDFB99CE2C43C8C875762FEAF2D96F8
6799:10A8D000EBB77DCAB9A421BDA7AC97CD8D4F901E13
6800:10A8E000073B83213E5A123CA45F3F8E1BB0D540EC
6801:10A8F000FDCDF10309ABAFA20F36371EA6EFF70966
6802:10A90000CE737E1CF74C13CF3B55F4CD2585775580
6803:10A910007DD360E6A03A1ED0B0F47EAF120762EE9F
6804:10A9200064FA2ED6CCE11E5B21E9A507CAE45FC913
6805:10A930007CDF92FCE31EDB75DFC1BCBA967912EDB9
6806:10A9400027EEB5B8CCA8B79E53E418B4EFA3FC9596
6807:10A950000A13EDF3B0B8E5B4AE63D47EE2AA291FC2
6808:10A96000214619CFE9C28800C6075ACA4D07518E41
6809:10A970003E641947EDB514187C189751E16D853088
6810:10A980001EC067B42D261D6155CEA9716386BB6AB2
6811:10A99000D06E9932ED3235CFC1A4BF106A5F5B58DB
6812:10A9A0001FF18F53278B681FBA67C9448FE9CCB951
6813:10A9B0001CDF1B847A1F3223CE43173A0FB95C3B4E
6814:10A9C0000FB942330FA1C11440BBB0A502E601F597
6815:10A9D0004F5BF369BCE17453E7F3FD42CECFE1F383
6816:10A9E00064CA7E927A7EA0CC5E741CC755A173B7F0
6817:10A9F000E2B85EFAAC3A0E2F929CCBEA257C3F3E41
6818:10AA000098CFD3FA75F2258ADF13F8FED7ED069AB0
6819:10AA1000DF2BB3F9781E35F8D3E96087E44FC27DA8
6820:10AA2000DFD1F8F84F0ABD837CEC66B8BE5A62DC11
6821:10AA30009C8FED03B666E4E3E881846D34AFC08893
6822:10AA4000F409E7E7707A0DE05D09E447FB44C4FFD1
6823:10AA500057D157A56BF83E98CA2FEE597695DE0E62
6824:10AA60009A67204DB34F082DC823ED8F6F87F6E40A
6825:10AA700090FD3483C34376B63ECE9985F1E6962F9A
6826:10AA8000C511CF4DCAB3F87A6FB64590FDDD62E3CC
6827:10AA9000F677B76D81C66F2A073F0AF791C558D67A
6828:10AAA00089EB4A8C5A41713431112D2F620BAD5D07
6829:10AAB0001BB590DBB576D755CF4F49FDA2E65EB505
6830:10AAC00061766DCC026ED7DA0C64D7EEB31A961F9E
6831:10AAD0001841EE0C16723BBD1BE73182DF08FE22E7
6832:10AAE000C533557FD160F792DFA7CE7350E177B5BC
6833:10AAF000BED15ECF30BE261A9C32DAB1A272BE152C
6834:10AB0000F39AB342EC02B5FFCBCAFECEDBC5FC3CE8
6835:10AB1000849ADF5EFC2BA17E24BCE7CC52ED92919F
6836:10AB2000F9EE1FE01B92132E8BC18D7687CBE2A02E
6837:10AB30003CF0D1BEC32DEC73314139E3FC325F24CC
6838:10AB40007D243929AFBF53DFFFDCAFD01F7CC94262
6839:10AB50007AA7D39A52166A9783D14AF9C9E0FFFAC5
6840:10AB6000B2A0B1A37F8315A90BFABDE087DD302B1E
6841:10AB7000645FF254C359DA070AB757C3E30A43EBD9
6842:10AB8000DD76389D8FC79F84EB5768284844BE0AFE
6843:10AB90005FEFEA33D531FDBA3530AED4A41C7AAAC2
6844:10ABA000EF1F67E2BC91EE4F5B3D4407AEA7274124
6845:10ABB000675122E9E7D538EE8FB6BE91E094F19C5B
6846:10ABC000ED45D2D397EA0BA27620BF67C5907C4DA6
6847:10ABD00051CE8FA9E349B9AD3B3AC682797C039344
6848:10ABE00030FFCDDFE4B9AE5C4F7E867BA4F13E3012
6849:10ABF0004B89C305C6B2D0FB81E4B8BEF91301EF9F
6850:10AC0000B245E794697DD949FFA972A0548A2EB74D
6851:10AC1000039FA73631A745C6AB93ED14174BBD2252
6852:10AC200012BFA5F6F0FB9DC7C60D0878FFD0503FB8
6853:10AC30004A9E93BABFF2497D39ADCFD444C6FA28B3
6854:10AC40007EE9A17D884FE2024B707D7FF2301F517B
6855:10AC5000EA13DA72D0B914B75EB735C22F43D363A3
6856:10AC6000EF85F1E178BE27B094741C474FFA0E8C43
6857:10AC7000FBFC2492E23E624706C56D6E4BF2DE4558
6858:10AC800078F5CB77E9C62B93857A75DF8AA0FB042C
6859:10AC9000F6097DF3299FE24E1D7B7284B8D4BFCEA6
6860:10ACA000E2EBFCBBB3F83A4B75E4737A3B72AF5BF3
6861:10ACB000137BEDEBE914CA6D18C7AE283FEDD3A99D
6862:10ACC0007961BBF523F3152BE27EEA903C56F067E1
6863:10ACD000422F08F8451414BBEFC8D34F3F9DC0F86E
6864:10ACE00011C3717C3F3274DF3822C34F85114E3758
6865:10ACF000C91FC1EEE672D65EEFF0017FEFF8421C8D
6866:10AD0000B1FFD715FA35A7DEE5C0FAE5B2939EDDAF
6867:10AD1000A9F9676A007F168B811943E4B0CA27E15D
6868:10AD20007ABEC13AEEAA7EBC01E4B17C953883417B
6869:10AD3000C9FFDA7E6AA609EF0FDD6E71F5A1FDB5D8
6870:10AD4000DD12E7A238BC05E446485CCA627999F88E
6871:10AD5000D0E2E4F13A0BCA5F8C4BE1FCB371FC2FFB
6872:10AD6000D3FCD57ACF2A72C8E20CD07EA9D9B98794
6873:10AD7000EA99240F9D9F33C531CA6730D9F9BDA325
6874:10AD800011193A661A411E1F9EC5FDC0EDD9AEBE0F
6875:10AD9000321A9F84C7AAD87687CB41FA10F10CDF0C
6876:10ADA000F758F3A342F1F39E220F5ABAF9FC3C8DF7
6877:10ADB00049F6723C6753ECF9AF5979D8CE6A13DE85
6878:10ADC00073275A73AFDACE8561ED3C92501E4BED7E
6879:10ADD000BC87ED8856971DDBD12BF7A786E3F933A7
6880:10ADE00085DE7F6F3C0D3048793C8417224C404310
6881:10ADF00097F0A705E362B1237DC7E562BAE2BF80A1
6882:10AE00005CD417C1BCEAB2DF7D99AF31EEB7C4CCD8
6883:10AE1000E779429780B3F1DEAAF0FC8B703B46D510
6884:10AE20003FAA3E8276446CE751B4632606D7911A56
6885:10AE3000CF49AEF5F0F512E7217E01BB46C6F522FB
6886:10AE40002A797EE1F3B9A188E35FB015C8A82FCABB
6887:10AE50003FEF4FC6EF4E5ACF25733B56BBCF7CFA20
6888:10AE6000B3C3662CFFA4B6ECAAF68ABAAF3CDA7E6E
6889:10AE7000B2ED5F3EDC126AAF8CB6BFFC55FBCAA7D1
6890:10AE80006C068ADFED17B4E7E32B8AB8FC7317A9C9
6891:10AE90007119EF8C228C430A1E273FF0CCE3339FBD
6892:10AEA000157B0B914E69ED06E603BA9EFC2CDFE1A3
6893:10AEB0000D69E75AF1ACC6E1C728F6D418CB610199
6894:10AEC000D7E9985ABF8071F4E4DA4EC17D957AB122
6895:10AED000455C8FABF5F54AFB25D28088FAAAC4CE33
6896:10AEE000F562F2A0C4B242E48EAD88AF5FBD62BF2E
6897:10AEF000DB4E3D65C6F64EE93CED99A81F6C3AF96C
6898:10AF0000C990F5AEBFCD652A0B995F0BEE0F8D4052
6899:10AF1000C74D45AA1E0C90FE56F5AD5ED513719235
6900:10AF2000464F6C8EE47CACDA3B9B0BB93FB4399254
6901:10AF3000FBE5AF3ABCEB11FF1F177EB868BC8CE78E
6902:10AF4000643B0DB89FFE55FB2443F68DCE5FA3FAFC
6903:10AF500033C8FF4EC9FEF37EF83EE7FBA564EFE57C
6904:10AF6000E18D23226ECD72FB0FECA93B8BE2F9D56C
6905:10AF7000FCA1F46661F70B8E361F2FDE6B9A87F10A
6906:10AF8000BF3E8ACFDEFFB930E27988AE22D52E1AD5
6907:10AF9000DA0FD4C4599315FD96AC94CB18674DC7FE
6908:10AFA000FD2D6D1C747AAF16CEEBD3C233CE84C5A3
6909:10AFB000557DEEDFE0793FCC1FC046F7C13A4339FB
6910:10AFC000B146D9F74CF1F94BF19C782AEBA4FDC5B9
6911:10AFD000E4DA180D5E8B4525EF02AF3956C7093FFD
6912:10AFE000C952E579FCFED921FAFB9826BFBF7CCD7A
6913:10AFF0005D782526DBC3CFF999A073C4D7FAF94B46
6914:10B000002B90AEC3E2B5F5DA386D726839E061DDD8
6915:10B010003EED79418F3B87FC8165DFD09E1B54F369
6916:10B02000D271BEC9AEE1FD7F75BFF02F6678FF6AB1
6917:10B03000BB8F82FC21F9AADC279C8A45D88E14108C
6918:10B04000709F7B4C3DA37B8593B732F748FB057F10
6919:10B0500054F0158E67E62B21FCCD51DE8DB1F07CCE
6920:10B06000D5315B75640F8E01B9407F6F6023C800D6
6921:10B07000809337CA644F2EAED531D40FECF326CD72
6922:10B08000F7305C8AA7AA747FD4C2F37153EB985F40
6923:10B0900087F3A9BF8ED6138D6B5C901F005F9A7BE0
6924:10B0A00005161768CFEBA6869DD355F92039ECBD60
6925:10B0B000AFC8AE5917A0E7FE58447CC2F5DF04D4F0
6926:10B0C0007F30A48F669E398CF975C5DB18BFD726F3
6927:10B0D0003A82DF6B13DC8F10AF00BF9E32CDC942C6
6928:10B0E0007B65973D4287790F27A3FB1F63D18C5D5A
6929:10B0F0002C62BEF222BCEF7060B200F017275AF744
6930:10B10000B7CF8672F3C00F30986CD9BDEB9679A992
6931:10B1100041D8F6C0F70866054CC67B8130E714D7E6
6932:10B120005D847DC111BCEF3A22DB42C1C908A6BDD6
6933:10B130007FA7B550DE8D7923AD1374CA39E99072BB
6934:10B1400098C786D9EAB97F37E5DFB1793C0F20B4DB
6935:10B150007DCCCF1EB5FD05D07EEED768DFC4C79F7E
6936:10B1600080AF40CF24E0F8310E8EED237D3168149E
6937:10B17000DABFD29EC47C0770FF06FAB308BC3F3B1F
6938:10B18000E6A524306D1EC2507F76E86FCAFFC17CF1
6939:10B19000960FA787FE6AF458F1F5E8D1AA73D37821
6940:10B1A0007D532DE407E13D56785F9D59E9CFACDC36
6941:10B1B000DB85786DCD0FE215EC406A17AA375F5139
6942:10B1C000F08C7986097603E17934BC9DB2F3BCA892
6943:10B1D0009DF6087F73FAFF077A3938BD42FB437B3F
6944:10B1E000F29AFB5B01FDC55D7B7F885F5C3F43F8A6
6945:10B1F000059A6C4BB876FCC2A87CD782DF53D0AEE0
6946:10B200002E04AFC1FCA347ECE81798F51E13E663C4
6947:10B210007E6B7634C9EBECB8A526CA47885F4AF93D
6948:10B22000C56DD916CA876FCBF886491FA2A7DBB2B6
6949:10B23000ABA91CEA53DE54762002C3146C0AEBA3BC
6950:10B2400038C0CEA27207FA85BE7A9E87A5E625A9E8
6951:10B25000FA9029FB9F342FF8306AF6F18153507F22
6952:10B26000677D2EE59D4545FF95F2AD76D53A9D5813
6953:10B27000FE9899EF637E57D9C74246A578DAD4C2C3
6954:10B2800027703FD735A141A0FDCB8D57DFBF745D3F
6955:10B29000EC2BC3BC2D56C3F3B21CD552983ED4AE92
6956:10B2A000DB5D88579E3FE517387E35ED3D3B3B9E85
6957:10B2B000F0B633E320C3BF3BF41CB4256AD7970E26
6958:10B2C000F398C2D7A36470D33D63AC4147E348C64B
6959:10B2D000D4005071AE290B1D35F03E65AD44F7F931
6960:10B2E0002666DF4BF94C60E593BD919DFDCB328422
6961:10B2F00087CD738D761EE1F30A1FB77ACFB14A2F3F
6962:10B30000D7456724FA57AE094B29DF8C7ED4F52E3A
6963:10B3100086CD07EC61739C8EEE838BC8089917D39A
6964:10B32000D453FCB77F2EFC18E82A5A47E1FB62FF92
6965:10B330008F9F1B3232A7C940DFA9E76CF87EDB186C
6966:10B340005C3B48F734C6F3BEC3BFCFE7DF3307DF4C
6967:10B350007F334630139EB3113644501CD368041813
6968:10B36000CFE128F78D3DAAC4DB9A052625B942FB1B
6969:10B370000B50DEBC68BA2103FD8653A665763ADF22
6970:10B38000A6F851FA680FE52DB2AC188D3F7A4A390C
6971:10B39000A7D6705B7A22C6EFA2A0AC0FFD6AC9697E
6972:10B3A000427AAB7113DBF8FE6FA21E3F3B5BBFCA54
6973:10B3B000847A1B9DE042C62EBF70653FDE33ACAE83
6974:10B3C0004FE320BFAF630896EA292FC43898A679C7
6975:10B3D0001F50FC301576C749E5141F2A9609CFA5E2
6976:10B3E000CCDE8ADF95027234F70328F77F0C6F3FBB
6977:10B3F00045F33E00FE75E8BEC0E8ED476AEE193041
6978:10B4000082BF3372FB9961EDDB476C3FD86EACA60F
6979:10B41000DD3689CB0D5F5C847FA4F81EE6FF17C77D
6980:10B420008F9EB79655ACE4DB9B40A2E13E94C23FB1
6981:10B430003B1CF594C72646F07D533D8811E4A71EBA
6982:10B440006B2DCFBF48D1E6B1A9F78BB4E1BD215038
6983:10B450005E66D1DAEBA56CA0679A807EAAD65E2FD5
6984:10B4600046498AFB532CDC8EAFA77D527D8A562E2F
6985:10B47000F4E07A81F9E8ACB97D94F7166FA1BC8647
6986:10B48000D1E20B6F3531CAC7D2477AEA51E7959EB0
6987:10B490004C1ADB56007014E7B3C527A7AEC2B8D16B
6988:10B4A0005B0A3FB7811CA073A40D8907C49076ABDB
6989:10B4B0000D8109A857AA75FC1C00FD40FF6FC58FC0
6990:10B4C000A1386B78BFEAFD312ABCB25E989D11327B
6991:10B4D000BFB794F531D4DF1DC907D0AE1DEACF1830
6992:10B4E000C8A3FE86F28A94FE12FEBEFEFEA0AC6FDA
6993:10B4F000B5BF957769E7B7D2D047F35BA9DC5BAA04
6994:10B50000F6F7079C5FFADFD19F920F36D4DFB7B40E
6995:10B51000F35B69ECA3F9AD1CF22F95FE12FEBEFEA3
6996:10B52000D47C07A3B1BE16F969B4BC0735DFA1D03E
6997:10B5300091AAC97700CF6661A9C4D88302E78BEFCF
6998:10B5400014CFFA1EF2C5E5850D4EB253147F8FCE8F
6999:10B550000789743E88F4E8E2146E87A8ED1F692A13
7000:10B5600060EE893C1E84CFAC2281CE1F4C2A10DCB9
7001:10B57000B8CFB60FE407DE83B71FD63996FB9B1C06
7002:10B58000F43CD824D3F310F8976E8A7F39090E144F
7003:10B59000737FF1C1247BD51AB43F4A2378FE75D15D
7004:10B5A0002CB06C83FE1BAC975366CC73BC89E5E072
7005:10B5B00039B4CC0E8ECFB8F204BAF73E22E7745FEE
7006:10B5C00013C03B0A4419F3CA77C823C7737E5ECC05
7007:10B5D000E3443B94BC491F9E9724A502FE24CC7FE4
7008:10B5E00095422A262EA4F3368BBF154DF64DF5371E
7009:10B5F000FAAD7618C72D42CE6F32001F7F54EC9BF8
7010:10B6000055690B481E84FBA771A8A972319F50F49D
7011:10B61000FBE1D765D665E4DF2EBB91B118F87E312A
7012:10B620007E077AEA578A7DF45ABF91A1FFE72BE79C
7013:10B63000FBD7B7DCABF54B1F3407EC68173E98130C
7014:10B64000C7901ED55BB5E53B0C7CBD2D0BF35317A6
7015:10B6500087E5FDA8F720EEC05F6732D655ACDCFF6A
7016:10B66000A2E4FDDC85721EE338293194E4AD9ED35B
7017:10B67000341AD988FB926A7BBF53E4168B73131E6E
7018:10B68000D43C39263E9383DFABFDA9DF3D2A3C93B2
7019:10B6900074B5B829D88167FBB3B8BE477BFD3F8A34
7020:10B6A000B5F94997178EFB4E391B896F07248C53C8
7021:10B6B000A8E3FFDFE2D71DC57CBEBF9AF3492E3F4A
7022:10B6C0006797C242CFD7A9F95FCB866089EE15563E
7023:10B6D000F3FF9863201BE9FD9FB3239DF711FF291A
7024:10B6E000F648E04DDD95C8AFDFDED0381CEE54CD16
7025:10B6F000F955A5BDD1F03CDABD13F413921FD9D290
7026:10B70000EC74D079BA78BECF3626AEEC3C9EDFC260
7027:10B71000F27735FCA53DA7D5D2FD94807ECB63782A
7028:10B72000BE4D1FEC17E3C06D166CD7CFE34A81A75F
7029:10B7300028FE9B521B105AB383E781C2E562CA46BA
7030:10B74000ED79B3F0FB142B2DFD922063BC7F80CEEE
7031:10B7500031CE2FE1F4A23B3BB05E3CB727C5641D60
7032:10B76000CF17192B73FB3263202D74BF636A899244
7033:10B77000671AF9C65619446F46C943AB306FAA32EF
7034:10B78000EA8DADE9288A4BF6AEC23CA9CAE4373E41
7035:10B790004907793BA9E4610E4F7EE39371004F2E78
7036:10B7A000F9570ECF6284A42925DF5D85FBAA534B90
7037:10B7B00094FB95581F9DDB4E4CE27CF4F73E45A36D
7038:10B7C0006EC47539A3448D5B323AA7ED39F18B33E2
7039:10B7D00028A73C6A9CD7ADDDDF64CAFD8937A8EC99
7040:10B7E0001567237B6901FE0EF8BC41B97747670AEC
7041:10B7F000105E2706EF3579F8EBDCBB133C27CFEF63
7042:10B80000116A69645EEDFD886E85FF79DE903A1EEF
7043:10B81000B5FF61E3C2FB016342C7B58FDA51C7F5DB
7044:10B82000718ED1274C0BEED7AAE3FA5818D88F4166
7045:10B830008F033D7D3548D78FAD0369F8774E60990A
7046:10B8400079098E1FD82F3843603DA7E3CA921F9114
7047:10B850003D559CE45E5982F97B067E7F41BB624781
7048:10B86000EE8AF7FAD0AF077EA3BC4D5F2A3FC750E0
7049:10B870009EABFD7B6CEB4BB85DFA27E55961DC5361
7050:10B88000FF7A2EDEA72EB066A8BFF9F3CB06F4FB35
7051:10B890002B4FF0BFD7BAE9F83B06F4DF37210CEDA8
7052:10B8A0006CDA6718F1EFC17D888709F8FAD5F82BB3
7053:10B8B0002FA566B6C5C17836ADE1F76437FC34BA5A
7054:10B8C00002E1861A9A255B5174B4023F5BE9E96E86
7055:10B8D000C3E72AD6FF12EE4B5479B57EC4376BB559
7056:10B8E00076FFCA7AADBDBE6A0F5007F4DAAAC6E485
7057:10B8F000B0FBFCF83D81550A3DAB1CBBFBF0FE8163
7058:10B900002A16764FA08FC791BEC967004F6D7CA4E1
7059:10B9100012FFAE14CE63A34871DE9752B74B78FE88
7060:10B920006D733DBF9FACA2EBA281CAA11EEE2B2579
7061:10B930008CE1F7E1A9F253D5EFDF7CE1801EE3054E
7062:10B94000E1F705AE5A3E8FEE055F2E6FE0FA7DEC13
7063:10B950006F2B62E07DF83D80D55D5CBF57370A7E76
7064:10B96000BC77F79BB55A7F6025EB6B437F6665BD5F
7065:10B97000F6FDAA462D7CA444D1BF93D9645C1FCFA9
7066:10B98000960812AD1705BE90FADBD702C83F499E54
7067:10B990004EE4B78D86C054D473E5495E82D5727883
7068:10B9A000BF89EB21AEFF75B09248FEEA79DCC25741
7069:10B9B000C7EF67FBE6307B20C45E1087C3EFA9F2B8
7070:10B9C000D3ECD94A7ED80B02FD7DF072C92DC58417
7071:10B9D000F8C9E17CF8BE223F5F63FDD938AE4C6404
7072:10B9E0003AA04BE632FEF79F335FACA1BCCACCE96C
7073:10B9F000825347EB58C71AF15E3190172817D0FED3
7074:10BA0000C4FB3232C5CEE524A7A719ECFCDE1D0726
7075:10BA10000B5DFFEEA79880F9823874DAC74DE9A56F
7076:10BA20007B371675ECBE88722E63BCDBF5208C6FFD
7077:10BA30009772AFF6AE9F0A64CF6ECA7E99E4612218
7078:10BA4000B005F6BBC9A1C8C52EED7D188928A7F0A1
7079:10BA500000CBC26CEA3749DD7F50F37A036574BFCF
7080:10BA600054A2D2EF971532FF7B7B1B3A059C772AB5
7081:10BA7000F335631CEAD7280BE3834F759FE0C6E0DC
7082:10BA80003EF97AA4679DA39FEE8751F7C947A8B7EF
7083:10BA9000A5247E78BDD1E4EFFFF5F37F007E0B583F
7084:10BAA000CA008000000000001F8B0800000000009A
7085:10BAB000000BED5A7B7054559AFF4EF7ED4E7712FE
7086:10BAC0004227813C0C819BD72C90109B8420E8EE70
7087:10BAD00078BB3BC984D7D8E1310642A49909BB5150
7088:10BAE00092741474A3656D1A616207DD2AA1D045B2
7089:10BAF000CB3F1A4A5CA756778366B1D186ED80A109
7090:10BB000050519B151D184B2AB0AC23C50089382E07
7091:10BB1000CEB0C37EDF39F7D27D3B378A535356ED23
7092:10BB2000EC26953A39F73CEE39DFFBFB7D171430F4
7093:10BB3000C15C80071C002003D499AF650C5760FFDF
7094:10BB400040492E607B9D7EEE1CDB9A6D26906DC079
7095:10BB50007FAEE39FC5910AF2F4787FD1F46C5D7FEC
7096:10BB600089B34037FFAE7925BAF146A55C37BEAC44
7097:10BB7000A15AD75FE1BD4337FFEE268FAE9F92B744
7098:10BB80005037DF2E2FD5F5D3A6AFD2CD9FE0FCA93D
7099:10BB90006E1C26F5E7792700586D81611FD221C8F8
7100:10BBA00000E665E1BED6F4209B08509E8193B14D1E
7101:10BBB000ADB6A7531B9C9D126519D8DE925149FD65
7102:10BBC00094B71FCC8BE236B6892FDB5CD8FE130B03
7103:10BBD000B9B3710F2493AF1FE938F351504209F400
7104:10BBE000FC3B8F09A026DECE517C77BAB0AD7849F8
7105:10BBF0002E408EE04F6CA67716AE4FC57FE7E0DF94
7106:10BC00003E5B684F11C0ADB827CC8FEF03F5AEF99E
7107:10BC10000AAD7B54590093B01F064719CEDB6D0562
7108:10BC200085FA817D56BEAE223C6C52D2E3EB86147F
7109:10BC3000C6DFFBB4D7BD80F6EF8C3007E0BCCE9DED
7110:10BC400067AD7205F50733146C2BBD67AD909EF898
7111:10BC5000FC8C959E774A23A90E6CFFA5DFDC103281
7112:10BC6000909307152BDFFF4821B6788E9607CDA15C
7113:10BC7000143A3B288B5D286F4D20E4AD65EF48D426
7114:10BC80008CEF6FE960CE003E6A92EF5B0C4857F094
7115:10BC900059CE0E23C96DF87BBD18CF999FB11B6E8D
7116:10BCA000E5EB017200D608D6C1AA79510BD1ABB928
7117:10BCB0004DCCD7F8B96679FD795689FB76253D9F3D
7118:10BCC000D23B6ACEA0F5D2D9614D1EF0DE3F53269D
7119:10BCD0004CFA2C0D3BE55071BD04E0A4D76478AF5D
7120:10BCE000CD1E0960328EFB3C9CDE4F23DDCC8CE800
7121:10BCF000984C2741BF6FA3CF2BC4EB043E25CF0B3D
7122:10BD00007A049F5E61D0D49F3E76FC5DE2239E67FD
7123:10BD1000378B558119C0EF4DE572DA6C5BBBFE5C69
7124:10BD200035D1FFAB5E46F4FF570629B8FF27836F76
7125:10BD3000E7C824E77B877286713F7FFF500EA09C87
7126:10BD4000B55BE44DD2242E07CE4DC897CE70949F9C
7127:10BD5000BFA3BF7A909E778499D38E47F50F8CD678
7128:10BD6000F37BC270AF239DDE6B7CAE6D8A899FEB47
7129:10BD70007945E6E7F7FBF09D93687D4A28C488EF94
7130:10BD8000C3562E17FB193C85FDDD7DB6A690C13E3E
7131:10BD90007F4FF4C6F56FF55941423969C7F5748F85
7132:10BDA000238547AC36929BBD782F46F738BE228D4F
7133:10BDB000F6DF680199C5CF77B130769AEE7FAAD5C4
7134:10BDC00002017CBEB9D5CCE97D6AA399EF635EF729
7135:10BDD0009FBD05D85F89F29782473DDC7AE548012F
7136:10BDE000EE7BAA0DFB785FCF3A0BD7BF95F7333EBA
7137:10BDF0003F597E35797D4E95CF953EBDBC25CBEB29
7138:10BE000018396DFB6E721A8ECB69E57533E77B5D71
7139:10BE10002EC9CFC3E0DC43FA73EDB02517CF5BDC4E
7140:10BE2000EB703E86FD59E6D0CF73C82E1C16E3B3E7
7141:10BE3000DB7731615FE45574AF82A015B63292238F
7142:10BE4000C1AF77895F93E96A232C8DF4558A1593E6
7143:10BE50001DC2572BC4E7572DD0B4B7829E0BFB32BF
7144:10BE6000EBF5BC5D5B13E4F611551E35BB576E0553
7145:10BE7000DFDE749ADF7F4B23EEF30AAEA7E753D5DC
7146:10BE8000FDCA4A46EA1BB1BDA0083BF8917A0EAD47
7147:10BE9000FF0F1EB11FB4A396211D97D804DD17769E
7148:10BEA0004757D33DE64EF17D42F66FF1D48FDB016B
7149:10BEB000ED44B0F89D0A1F9D0F9C269AEF57E97E2E
7150:10BEC00078FEAF9FDF80F7B5CF48E57C6D3CF46C22
7151:10BED0008CF8DC592A01F1DD5E3627D767207F5ABE
7152:10BEE000EBBF5A04BEEC78BF33325AAF18E8F57690
7153:10BEF000F5BCB3ACE2FE104122E5737B2CCDAB8ADE
7154:10BF0000CFD3EE0FF018BFA7BDEC05CEA70DF7C33A
7155:10BF10006C333FF136BE4F73FB71B616F7B9DBA237
7156:10BF200058D291CE1F4F6C5A7FAE0CE09D1E3491BB
7157:10BF30007891633D36F0FD05C0FB3D0EDE8FF5E4E4
7158:10BF4000F1FEBFF7C8BC9D31D5FB0705F759F15687
7159:10BF50005719D1EB70E1335E37BEE7F2310BA7031F
7160:10BF6000809BD369832A7B572266B0E1F89501163E
7161:10BF700002163FFF3D570BC087F6E457F43E5CD8EE
7162:10BF8000D1FD21B773CEB6D17A399DE4EA4C2FF5B5
7163:10BF9000FDDDBFADA7B8E134FA09922F7F98411EAD
7164:10BFA000EEB3FA6A365FDF113E6E95490E4C23F50B
7165:10BFB00044FFC041062497FEAE516E3F9FC77B29C8
7166:10BFC00078EE1FBA32F9FDFD91D926C1CF39224E44
7167:10BFD00051F93F38F3771964BF6CDDF20777101F12
7168:10BFE0008F9A391FB7BA47321C067C3989FB428ABF
7169:10BFF000383FB5C9E34DD6409913D735A9729B3C5C
7170:10C000007EBB4BC82552D8427102FD30A4DB6A5575
7171:10C01000BE5AF02A13315E581D66D154D4DB96887F
7172:10C02000E7BC446D1783B33A7B007056D367F3F8CF
7173:10C03000F276B36D27ED5716EFAFF4E1A609714E16
7174:10C04000735B1A39D184F707F83D520A4B737DDFD1
7175:10C0500010DFF987315E437E75622024A3DC775CB4
7176:10C060002DE7EDA5FD8FCBA427B6D49167C82FC0CF
7177:10C070000F4C8E3DC8DF8E803EBE2953F5A0CC23E9
7178:10C08000E8B6D4C5A4CFA673BB554EF7AECDF7AD79
7179:10C0900070E1F3DF147E9C7188D4DB1AAD04E3E712
7180:10C0A0009D80FED846FA84EF2D47FEBC6A70EE995B
7181:10C0B0001EF72A8A9FA6C2535CBE01E59BE42AF9BB
7182:10C0C0009EEB5CE25C9A3EAF3C74DE4AF1AE3F6CA4
7183:10C0D000ACCF351ED73A3A4F1F4083919F2B57FD67
7184:10C0E00073C74EC6E9E5DF99CDE97411767ADD288C
7185:10C0F0009717F11CBB512E2F7BBD6999B8FEB2CFAB
7186:10C100009B96951ED7FFCE9D697C5D5FE9D2ECB50D
7187:10C11000D87F4495FB4B618F8DE87CCF4EA177DAB9
7188:10C12000FB4E47576693FED45846AC4E1C9F1239BF
7189:10C130009341715DCDFE65D9A47FE39DF33EB7B811
7190:10C140007747F786F5E7B2853C98519FD6AB7ECC12
7191:10C15000FF58D44AF45FDF0D5C7E07F77DD249FAC1
7192:10C160007B2992E620BF77F1405A80ECFDE58329D8
7193:10C1700021136ED54EF28EF6ECA265F8C73C7EDC3C
7194:10C180006F7604709EFFE08567481FFDFB501B71B2
7195:10C19000DFF591C747C9BFB547169C97A87DF9FB46
7196:10C1A000D5878EEE87F87DB5FE851E9B4CF6F39203
7197:10C1B00024ECC4FAF06B3C9E5D7FED4AA5B782EE9D
7198:10C1C000F9FBB964CFFCFF76652ED931FF9B57E6AA
7199:10C1D000D2B8FFF5B42EA3F8E4798F99D355F38F35
7200:10C1E00045272425715E9DAA07455B9E6A2846FA6D
7201:10C1F000D51C5FEE34CB09F25566F2D2FC9A8F6AF9
7202:10C20000B3D725ACDB12931AE8F99CE3B569AD0905
7203:10C210007279BBC7A2DA21D46AB43F2B551AAECCCF
7204:10C220007B3266AEA4BE1450E308769DC7DB204B7C
7205:10C23000C8E766FA0F55B12F26F17826D0660E951D
7206:10C24000E17873CCA4D82B691CD725C41900DE452E
7207:10C25000B388DFF74E766E95B9BF871EEA3F5C164E
7208:10C26000227F0F01DB5069421CB432668AA6A0DC33
7209:10C27000344552A2140FAD8C4967785F8D8F4E3BC9
7210:10C280005EFD7931F0F8E85C629C83F1D0397DBCC9
7211:10C290000413E8BC5ABCF431C55518CFB66C8C5A9F
7212:10C2A000C85F619CA49BBFA6E947E7290F5BD3AD9C
7213:10C2B0007F5E14934C4BF09E4568EE880C7DB11D5B
7214:10C2C00036D20F2DCE247E0D18E8FB4FDD429F3570
7215:10C2D0003DDA1233713E6C89B96DA5D836ABE303F4
7216:10C2E0000E130470FF2D91657B186EB6E5DADD69DB
7217:10C2F00044AF2D2796C263A4EF0EB7AD8CD65DFB7D
7218:10C30000916D45455C3EC6D80FB7B08FF178C0D867
7219:10C31000CF4D51DFFB7DF9BB3CF79F87BFC3BC7A94
7220:10C320009A7B32CFAB9B293ED4F2EA643FA1D95F1E
7221:10C330006DDFBB547A8FB5BFE779FC82F92FB7BFA9
7222:10C3400077B9653E6F4AA4319BE7C5279667CBE96D
7223:10C3500063F72F919CA6AC8AB1FB6BF19A3FA00CBE
7224:10C36000D9288F51CC5C3FFDCB598851DFCB789CCD
7225:10C37000ED5F6D09D1B8769ED872C6E7AD70B29008
7226:10C380009DC5E33F2D3EBC313E07C78BE2F1A216AF
7227:10C3900017C6BC8CE741CB150B1F9F31D557EFAEAD
7228:10C3A000A1FBD9F9F39AF9625FB40343941FDDFD51
7229:10C3B0001306DC0EA8F1A2269FC9F1E41791928919
7230:10C3C000DF841B3DAFCAA5A65F5393F442F3538F9E
7231:10C3D000B8047D3AC94F57939FFEDA4A7A305EDC43
7232:10C3E0008D7E7A959BAF03BE7ECE4792D728EFBE57
7233:10C3F000A8FAFFFB886FD84E89BDE5A2F316426C00
7234:10C4000013E58BE3F9CF856A1C33DEF8232E91AF59
7235:10C410007C9B1E3FADDEEFFBD2E36D6E71AEFFED98
7236:10C420007A7C23FEB31ADF73A6C7F51CC96FAAB9BD
7237:10C430002BE622BD7B17F54E1E3BEF2E2D9F944021
7238:10C44000C79FA142AB89F21E7F9BC0018299F20770
7239:10C450003C3F79DB0CB4CFFAABF93C4EBBEF6A261C
7240:10C460006F83F920FCE883451CB7B9EFA5E31605F7
7241:10C47000D7376F64B3090F6A6ED3DF273859E138B5
7242:10C480005BE000E3F17230BFFF08E955604F894C73
7243:10C49000FBB7D065090F69CB0C6D26FC82709C5BE5
7244:10C4A000E9796A9C0EF89E0EF5F91D2ABE034971C2
7245:10C4B000C09B83A738DEE31F6040FA6B8DA0FD2090
7246:10C4C0007B7254E01D9D1161173EEFB6737BF2B98C
7247:10C4D00024EEE1EF66A14D2C1E479C8F6CCB213DD5
7248:10C4E0001B134F28184FE4C4E3898E173EE2F63041
7249:10C4F000397EC81A10EFF1B79B4384C70C15CE657F
7250:10C50000D4EFC07C3097E24459BEAB409C0B42DC78
7251:10C51000AE283A9C64F72DC2EF7F71F43F781ED9A4
7252:10C52000BC9F41368F3B9458694E3CEE58135CC813
7253:10C53000FDBF1667AC997664A880F653E30C07FE3E
7254:10C54000127E981C6774868F5B282F18134F24C5A2
7255:10C55000119FB9F5B8E03449E0ACD322CC4178D290
7256:10C5600034959EB7F5A5F2B8B8FED3D66CD2738DCC
7257:10C570003F971A05BF2E9DFAD245EBE67E2A39C8B1
7258:10C58000DEBE796AE38705A22FDB645AB7318DF2EC
7259:10C59000904B9F3E9046F47C135B407D7DFDA464F0
7260:10C5A000881F2E57ED11FAB7DF73FFF6A88A1B4BD1
7261:10C5B000E8DF26C4F197E4751BD475414C3338EE9F
7262:10C5C000B81FB8FC06F37D0B79FFD962D8C3711F81
7263:10C5D00021AFAF45321D14EF95E365BBD14EFC731F
7264:10C5E0002A6CB157913CFBDEE1FAF1AC89CB2FAE5E
7265:10C5F0000F30EAEF95B9BF2BC7BFD538BFD28A67D6
7266:10C60000A902F132D4B7992ADFF2310FFDCCC64529
7267:10C6100068F975A453F994A35F131F2B5341A2FD2E
7268:10C620009FB0F8B6CEC0254F0C4ACE4DB4467266C8
7269:10C6300037E2BD9EB08BAD9ED88FF28AE742E9E625
7270:10C64000E7EAAC387292D633D901AB717D675E7A76
7271:10C6500094F033085B7E73432E510E18BDA752C869
7272:10C660001BE5A30C14761DF9FB873A59D8859F78F2
7273:10C6700081F2A0CDF3BA80F2CEDFD5811A07D902BC
7274:10C68000E770FE0A5C31119FE7E6FB96505ED89199
7275:10C69000376C1571C58895E28A55E47FB8BD15B829
7276:10C6A0009D09E793BDDC3AFD552E6FCDF43C419FCB
7277:10C6B0002111DF338FED3FEDD6F64B7EBF2CF2CE4E
7278:10C6C000A4F7CFC9FC2287E72FFFFD5F19DC9F4548
7279:10C6D000AE70BF73792405621CB71B163875C4C2CF
7280:10C6E000F3F5CB98074D4EF067AFBB041D0E453CEC
7281:10C6F0005C1E0762B56934FFB4FABCEFC4F2654B47
7282:10C70000484E6292B38C9F52E4350331A946C40768
7283:10C7100063E8F4D76E033AD952853D4F96CF1C5546
7284:10C720003E733CE2DE9E53225FF16F14F50387AA4D
7285:10C730006FFE2EC6EDCA91C21CA6E1C8B946F585AA
7286:10C74000FD23DCCEB6DCCB9C0179FCFAC27635CF7A
7287:10C7500048B6439DE1BD826FC9B86D433DB73B37D5
7288:10C760008BDB0265C373E376FA7E8F6A5766091C1A
7289:10C77000F7AADBC1EF9BD535DB950BF1FB1BD0F3A3
7290:10C780008CC780EF06F3466A0DE86E306FB67273A1
7291:10C79000F3FEE626E73D7893F39E566EEE1E176E87
7292:10C7A00072DE4737F9DE5F18E92DFC1FAD8326D70F
7293:10C7B0003993EBA2C9F5CE94B7D70568EC71F6E4CE
7294:10C7C0004894A89BB1AF89A1CA4A992FD8484F165F
7295:10C7D000CF177581BE5A5B68178BD747357A9DAAEC
7296:10C7E00013F197A36234908D749EAAC46AB3519FCB
7297:10C7F0002FCF079E3F5CB68BFA00488EFC46CE3F9B
7298:10C8000047FE52B4FB41BB719DE94975BFF1EC098C
7299:10C81000D4BB3E257D71505C6EC0C78D2A7EE70873
7300:10C8200003C76D4092F397F2F7CAF9E46F26BE256D
7301:10C830009E674441D9C5CF25172DE571B45C44E707
7302:10C84000DBAED6BFB216FEA088F0BA2CF4BB541FE4
7303:10C85000D94675129E0738F83CED7DADB5E27DDB1B
7304:10C860002DC0A89E1598C1789C0AC31319C99F565C
7305:10C87000DF3866899E5BCB787DE3AA07EFF79E29B8
7306:10C880005AB1BB48F085E85B31E0E07597F7E7FF08
7307:10C89000E3741F7F8FA8776C7088298729DFC073A6
7308:10C8A0006C3850CDE5B7F9D0FC5FAEA6B8B054E215
7309:10C8B000741E138FAB79D649354FD4F2AC61CA17C9
7310:10C8C00013F28EF45AD378FE30DDC8DE6C67220F87
7311:10C8D0000EBC27F2E06AABB3A42B814F79B5827FFF
7312:10C8E0006BA3028FD5F2DB4A2564CA413A543F6CF0
7313:10C8F0008EA6A0BFAEEE9D6525BB5DDD5B98CAF13F
7314:10C90000A5D6BD268DDE467C2F56CFD9777484D729
7315:10C91000275E4BAA53B6D65AF9F887AAFCB4D602BA
7316:10C920006F3794499BC90D4FFC4B87D9081F6FC1C6
7317:10C93000F89FCEB73628CEABD5435AA2B287DE7366
7318:10C940006668A497DAAAB6220FC70FDB477BC97FB8
7319:10C95000FAAF5D397227C703AC32C557C9FB5EA871
7320:10C960001338E26B149010BD1648219A57BD40E26F
7321:10C97000FCCE6AB1F37C3CCB02E674EA370A7F5600
7322:10C98000D530C9437D589EC9FD71D55139735D4578
7323:10C990003CDFCF5AB07132D1E9DBEA441A6E306322
7324:10C9A000AAE2213E7ED73A51C7B11356BAF73DC32A
7325:10C9B000FA3A9156F719AF4EA4D569FD0D5FEAEA30
7326:10C9C000CA7E69A49EF095EA0367789DD81F668E9B
7327:10C9D000BCA278FDC83F306AE5F455EB4638DF4A23
7328:10C9E000EB067A44FD681FBE9FDA30DE57C173BC88
7329:10C9F00081F7A53682F7A5E7077BA6F336DAE3E4ED
7330:10CA0000EDA19E79BCAD46B1C9CFA2BAD328AF3B48
7331:10CA1000DD5BCB248A53B5BA855697A8CDF7B613FC
7332:10CA20009D12EA16BC9F5CB730A78A7CD47FD4E203
7333:10CA3000DC8DCFFDC76CDCCEBA226BA7515CF6D57E
7334:10CA400071DF3407AF0364F3BC5293874B8AD39EE4
7335:10CA500049F980D769A77A41F5E079ABCCED4EB4BE
7336:10CA600000F2087F8A5929EF273A283C9E73D9891A
7337:10CA7000AEDF8AEF87FF1FDFFF2EF8FE485C2FB97D
7338:10CA8000FDA8F29A945DD41E55ECEB12EC439F572F
7339:10CA9000E0C47DA5C55CFF76788B335B13F1FC06A3
7340:10CAA00091C7652D28B5273EAFA917787E1603AF2D
7341:10CAB000911D7BA3D6345E1CF846AD615C645C17A7
7342:10CAC000E86B107644C3FDC7D6099C6F9726E0FD3E
7343:10CAD00097DE4339C5BC75707F0AF7E75F1D48D9FB
7344:10CAE0004DF1775543EBB409D8AF3A990245C21FCF
7345:10CAF000E9EA0BCD0D26C59E61544F500A4C28B76C
7346:10CB000063EA060D266EDF6FD40D1AA433BCAFC6E0
7347:10CB1000E9F78CFE7A421123FA87829467BCD6C16A
7348:10CB20009C8330B68E801B17C03CBC45C3095E5742
7349:10CB3000767631A72C7F7B7D2147C5193AC399664C
7350:10CB400092F396B700E8BBADB17586061EEF57C1EC
7351:10CB500053C15AFA1EABD4E4207F968C17909C9058
7352:10CB6000FF4FC60947547F34A2FABB87D5F8BE4AA7
7353:10CB70008D4BB475C9FCAF53FDD378B8634D9D8818
7354:10CB800027B63454F511FF028B4D407E604B83DB9A
7355:10CB9000569AB09FB94E7C47B39DEA169312EB1696
7356:10CBA000A23E915CAFD0EC54F5E0D7F5C4FF1D1167
7357:10CBB0008127F9F304BE597DD07594F43E7E4E7101
7358:10CBC000BF1DC8E3188FA39C9920EE0536817B71A9
7359:10CBD0009CA16AF19787D2887E5EF45764978E9500
7360:10CBE0006E4E277BB258AA6132C7BB6FE0DF844F1D
7361:10CBF0002DFBA06D2190FF5F31FB38D17DC56A0B05
7362:10CC0000FF0E49F357CB3E68AA17E3BB1E4BA5F1B5
7363:10CC1000E9CC6997E979839B9E2F7A394A481F2C82
7364:10CC2000A1D3A1DEC48E9D93485F664CF595D4E1F7
7365:10CC300079AB1B551C7CB5F0AF2B228D16481FEB32
7366:10CC4000EF0E177EC5F3E82B916A8E6F6753FDB523
7367:10CC500022EE2FAA0FA01F9AF0A7F34375750E4E70
7368:10CC6000CF5BD10FD179B21A459D3099FF6695FF00
7369:10CC7000E3F995F1EC28F911D33CA1372C2FEE7F85
7370:10CC800065CAAF6F8BFB614718FBB9DF807BABF6E2
7371:10CC900029739C38EC21557EC7FD7E23FCFDE0E026
7372:10CCA0000FD4FD99E0E06A9EA3E1E15A5EF49E4A4A
7373:10CCB00067AD7D5F6D93F1320D27CB5500BABF0193
7374:10CCC00027CB251C2D8BCC7605C7EDF2D533DCC0E8
7375:10CCD000CDA259A6EBE5384FC5ED34FC2CE79E7E7E
7376:10CCE000467146210436917D19B2826BEF24FA6EAB
7377:10CCF0008FC126D2EF50238F73869EFB55EF2FE80E
7378:10CD00007BC301E620F7D3D17F9CFBE90E8C6B78C7
7379:10CD10003C14B92070AA7EF1BD694798294638E8CD
7380:10CD20006F55FF5CAB00B71B1DEA777DF50342AF83
7381:10CD3000E338D14352224EE4976393B5EF0543C2E3
7382:10CD40003F197ED7D70923FC7BC0CE36E68CE2F3B1
7383:10CD500064DC28192F7A4AFD0E705CDC48F96EDF1E
7384:10CD6000FBEDAB9B30E933025355FCF99447D88572
7385:10CD7000261F63B4BFCDE46DE7DFFD1E640EA3EF95
7386:10CD8000478FA972BF48C56F5FB40A7978F17616EC
7387:10CD9000A2786E11089CF6C5836B397EFB62157311
7388:10CDA0009AE89E2A5EBB50A5C78C385EBB83F0DA3A
7389:10CDB0001FA33B219C7691CA7F80107F4FE3CED486
7390:10CDC00028C51B4F58FAF3481FB5EF8D1EAD13FE53
7391:10CDD0002E3505BA8CF4335CE77AB48ECF1B37BF9F
7392:10CDE0003C596710EF14D58A7D4FD7E9BF2F4A8889
7393:10CDF000D3CFD0BA84389DF793E3F43F155EFBB7E9
7394:10CE0000E3E3C555C6F1DA98797B6E12B77BD68815
7395:10CE10001E9B55FC2499BE4ABD6687A73838EE781C
7396:10CE2000E3FC20EAB92AEE35A4FAB920937F79070A
7397:10CE3000AF7F5978FD4BB333C10962FF89F5C2EF6B
7398:10CE400068ED4C75FFA0C518A7A951E7FD305FC973
7399:10CE5000A8C779E52FE971B359FD7ADCECD6709655
7400:10CE6000AE3F3B7A8B6E7EF5D162DD784D6CA66E5F
7401:10CE7000FCB69355BAFEFCE1DB75F3EFF8DCADEBE5
7402:10CE8000FFD5881E37BBF3AA1E37D3E4DB8512918A
7403:10CE9000B8CE63FB996E5E419BFE5E855DFA7B4D6D
7404:10CEA000EBD6DF4BDBB728A0BF5F49507FBF2CC25A
7405:10CEB000F52BFE785C7F6FADACE2FA25765AB7BDF4
7406:10CEC000A1D44E714C6EBE90576DDEFF0085A782D7
7407:10CED000721032000000000000000000000000009E
7408:10CEE0001F8B080000000000000BE3146060F85185
7409:10CEF0000FC1D3F9191836F323F8F4C0C7981918DD
7410:10CF00008E83302303C33E20DE0AC46B80F83D03CA
7411:10CF100003C352203D07882703711710BF048AD529
7412:10CF2000B1623787858D81810D884F02CD3AC54C1E
7413:10CF3000BCFD8A7C08F6215E0686B5407C9497BECF
7414:10CF40006130D8F00C41FAD9F50C6AD76ED181F76F
7415:10CF50003708B38A3330304A20F8FD12A8F26CE269
7416:10CF60000876960C65769501F50300295128158001
7417:10CF700003000000000000001F8B080000000000FC
7418:10CF8000000BED7D09785445B670DDEE7B7B49BA28
7419:10CF90003B9D9095257480202A4BCB1201113B219B
7420:10CFA00089010306440928D26C2184249D01661E50
7421:10CFB0003EFDFF6E0842C4D1898A1AFC195F83E0E6
7422:10CFC00004079DE0A0139DC0348B8833E804C70597
7423:10CFD00097795F401E204212A338E8F3C9AB73AAC9
7424:10CFE0006EBAEB763769B7FFF97FFF840F8ABA55BF
7425:10CFF000F7D4A9B3D5A953754F149D9124DD40C82A
7426:10D0000025F8A1E5AB0A2124255876489DC3E58182
7427:10D01000C1F6B55E1771190979C06BC272BD379D33
7428:10D02000B8AEA0CF47EB8AFC1642EEF7DAF1F9E38F
7429:10D03000DE122C1FF59662F988D78DFD1EF29663DD
7430:10D04000F92B6F0D96F77A8BB0BDCEBB0AEB372A62
7431:10D050000BD2605C425CA6AC64423C2F0F1CB981D1
7432:10D06000D6D6678E4F9047D3FA5FF5449F45DF1BB6
7433:10D070002D17F987D206B9A4286B74B09F8AE78D63
7434:10D080004A5E5F80F3F8581DEB67AA792D3B72BFAB
7435:10D090002C3286E2395646FC89A564727672C47ECB
7436:10D0A0008301DE2343D93C89DDF9DAA0C8F0AE065E
7437:10D0B000780F0DE5F825DB270F8A0CCF09FD7EE5FB
7438:10D0C000E4F0D23B0F0F8CDC6F0CF4AB7372787D05
7439:10D0D0007DA60191C71D0FFD62E013C589105F8B0E
7440:10D0E000D19F9DF5FDF9455CF42FC5A763AF79EBA2
7441:10D0F0000609F9370DE8B4D6BEFCCC163A4E7BCB08
7442:10D1000030A7DE41C8672E6782DD1213DF6E81799A
7443:10D11000C4C0B752182706BECD8D916F0BA05F0C0F
7444:10D120007C5B02FD62E05B658C7CFBD94F846FF712
7445:10D13000021EDF836F1B62D4B75FC5C8B78D31F2A3
7446:10D140006D538CFAF6648C7C7B2A946FEA73B5DCA1
7447:10D150004124B48B372A253BA09F27B3CD3620EB43
7448:10D1600027C1BF3DDF53EFF6C7C8BF5763E4DF11E8
7449:10D17000A04F0CFC3B1A23FFDE89917F1FC4A877C8
7450:10D180006DB8CE58E4AFDA8610FCB93400FEB5D8DD
7451:10D190004F5DCDEB7AC03B89908C7039504BCA51B2
7452:10D1A000940799B8DBD9BA55F0CDA51C425698E83A
7453:10D1B0007FE9FBBE3C12D0D3F17D36E2AF9584FE11
7454:10D1C0009F039E84E47F732955E8EFD345EC4F74A9
7455:10D1D000D0FE30C815E5FF66EF102CEBB91C6D2EA4
7456:10D1E000D2A13CF8920D285F4F789DD8DEE01D8BD0
7457:10D1F000E5635C2E3772397A00E4EE0A90C3522E52
7458:10D20000574CEE0829719453BA76EC89271B1C28D9
7459:10D21000576609F09499BCDDBBE7CAAD1B28FCCD6D
7460:10D2200035BA2BB785C8D91345AA7C51C94C0EF61F
7461:10D230007BA2FC846DC150A4B70DE03414EBD47E06
7462:10D24000BED07E0DEEEE7EBDA0DF63C55CBE641277
7463:10D25000081DF7B1D2EE7EE912A5CBBD12296DB241
7464:10D2600084F3658AC4F4942A0AF243E6F4DD9F77D6
7465:10D2700096B4D1F76DF6916984964F827EA2FE39FD
7466:10D28000B054DFAFA77476537A641A494D13E04B5C
7467:10D290005A2585E22B8F7524821C3D34CE45242BE4
7468:10D2A00021FDA19D8EDF67741BC9A265E2F83622BD
7469:10D2B0000D837EB49DD653787BC650DA4EE13C0494
7470:10D2C000EDD6607B2A6F4F73F0F7AF63ED0F7B09EC
7471:10D2D0008EAFF6BB8FF2D94DF15B47F1C5E7C5C400
7472:10D2E000057494293BFD21F39F2DE971DE95BC5413
7473:10D2F000F1BF2FFB54C6FCA1417CCD832F66CC0F20
7474:10D30000C1EFBEC173B0AEE263BEA212EBFD57F532
7475:10D31000A69E18D707124EE7D49903847687EC446B
7476:10D320003FCD71444F7C945F0E2A9E91F8F3051512
7477:10D33000E71F54FF5C8C1EDAF6BB3574589721D278
7478:10D34000C1D05BA4C3BADE221D0C7D2E4F8729926B
7479:10D3500003E147A3873AEE862BC571E3AE12C7DD22
7480:10D360007095386EDCD53FCCB8EBFB89E31A33C53A
7481:10D3700071D7678AE31AFB7FBF7189ECA40F99B953
7482:10D38000200EF8679E60DF2E10F7C3A0DF60E7F481
7483:10D39000C9413B27DB4B88DB12E42791E9CB39A15C
7484:10D3A00070EE14EC2A85F37F381CD7E5E1D8357090
7485:10D3B000E66AE16CE37048A89D0E8343EED0CEE3AD
7486:10D3C000B7FCBD802E647CBABE92126BE87B4ECD5A
7487:10D3D000F8B76BC7DF0D760CE6A1BBECF80E0D5D60
7488:10D3E000E768F1D9C3E110DDE5E841EC1A38B3B5DF
7489:10D3F000700E713801E9B2704AB5F3785DE5AB247F
7490:10D40000AC5F941EC382EF75E4759E423FE845C54C
7491:10D41000B19DB64B7FB2066EA0FD8F6C91FC465A53
7492:10D420000FEC8DC7F5E3FCB6E958DF778D11D7898E
7493:10D43000F3CEC97E23B527935E78DB06F6A5EA0511
7494:10D44000BD0C75DDDE8F6D6D142F8FB1F5C1EBE86E
7495:10D45000F3CE17F4642B4A63A10EE87E8ACB2659DB
7496:10D46000C5EA656656ADDAB2EF4E805BDE6C2466C7
7497:10D470000AA7EAA525D3AEA3F5258715025DAAB6AE
7498:10D48000AF36F4A6F5A57EA909EA1D79A41CF469B6
7499:10D49000CDDEFF6C87F5E8FC6E251BC63F4BD70938
7500:10D4A00007B5C747ACADA933291E15FE5D85F05EF3
7501:10D4B000C54EC9492D1CC577FBA10CC07787E43444
7502:10D4C000527A2F6B8C270ED5DED1BFA776EB71FE7B
7503:10D4D000CBE9FC0985B784D417023DAB803830BE58
7504:10D4E000D3E8374B417D3BEB3D8CE3A9F5AA1D7496
7505:10D4F0003CFA7EF5739213A65AAD236EC0B3FD2598
7506:10D5000073E9531698E76AC3602BCC6FBD01FA2DFF
7507:10D51000F1CF7FD1EC003CB7180A01DFCD5B0C6581
7508:10D5200043817E645EC950C0EF2F227E0D7A17CCF6
7509:10D5300077F935C6AD7AE0A72530688635DCCE9E12
7510:10D54000A5EB952364FDAC20CCEE13D96F983E2C4F
7511:10D55000F8FC257D22CAC1B2463D7184DA0D2E1F2A
7512:10D56000BEA384F9317BACFEED59413E2EB77379F1
7513:10D57000E57C5C9EC8F92A77E6CC18168ECF83C06E
7514:10D580001723F38FA07C98AE9B0EF47F1C48BFC777
7515:10D59000A8FFE440FFC889CF9FA07E12949BA99F5B
7516:10D5A00004E593D44F82D24FFD24E8B795FA495051
7517:10D5B0006EA37E123C7F9AFAE7503652FF1C9E3FC4
7518:10D5C00043FD7228777A7DF8FC396F1D964DDE7A1F
7519:10D5D0002C9FF73660B9DBEBC77E2F7A1BB16CF658
7520:10D5E00036E1F397BDCD58B6780358EE053ED332F9
7521:10D5F000E06DC572BFF7189607BD6DF8DE21EF1913
7522:10D600002C7FC9E96E9B4072652A2F3617B1039BA8
7523:10D61000928A5DB9E0AF2495B07AEA1DBE5C03AD95
7524:10D62000A7BA699DD2B1776520D748EBBD6B587B0F
7525:10D63000E63D24CF44EB993ED63EE097AE3C33AD79
7526:10D640000FA867ED8337FBF2E2687DB09FB55FB549
7527:10D650003390174FEB5735B1F6E12D649285D6879D
7528:10D6600007587DE411D7242BAD8F6C65F59C0F7D99
7529:10D67000936CB49ED3C6DE1F7F2E302981D6C77728
7530:10D68000B2F6895F937C3BAD4F2412D6F32CB9F9E7
7531:10D6900089B49E6767F5C2BEF3654784F57DAFD256
7532:10D6A000B6104CDACF7539B932F513F61ADA56805E
7533:10D6B000C95DAFBB21571E47E9A79045D0BE49576A
7534:10D6C000C4EA06B212DA7FAB9B8EF5FD8A03DBF764
7535:10D6D000E8E6B0BAC181ED7FD52DC4FA41C585ED2C
7536:10D6E000C77595AC6E7061FB67BA9FE37887143796
7537:10D6F000B62BFAFFCDEA0637B63F2CAFCFCDA7FD4C
7538:10D700002BF56E8F8ECA75ADE42E2703415E9BD23A
7539:10D71000C11EAEE37EEB2C9D03E57E5D8601F56CBC
7540:10D72000EF7FE53C857A063FC9502F7B1AFC5E0AE5
7541:10D730006715C251281C7DCF70267E33568033F189
7542:10D740009B7215CE6A84638E0DCEDE6FC68BF87C1D
7543:10D7500053A1C2D9A0A3F6BED61ADBBC265E9A207E
7544:10D76000E273A95285F308E293181B3E01E55A01C2
7545:10D770004E4059A2C2D98C705262C3C7651827C0E7
7546:10D78000711996AA70B6239C8CD8E0040CD789F83E
7547:10D790001896A9709E43FAF48B6D5E2EE3F5223E37
7548:10D7A000C62A15CE1F109FACD8E0ECB78AF4D96F0B
7549:10D7B000EDA64F00E164C736AF3C9B489F3C5B370A
7550:10D7C0007D5E433857C60667BF4DA4CF7E5B377D6D
7551:10D7D000DE4438C3629B575E82489FBC846EFA7CED
7552:10D7E0008070AE890D9F8329227D0EA674D3E72415
7553:10D7F000C219131B3EF9A9227DF253BBE9731EE146
7554:10D800008C8B0DCEC154913E0753BBE9F305C2B9D1
7555:10D810003EB679E5A789F4C94FEBA6CF258493EBF3
7556:10D820006E447C0885638D0EE7503F913E87FA7504
7557:10D83000D3C7A407380514CEC09EE114668AF42924
7558:10D84000CCECA64FA21EF462726C700E658AF4399D
7559:10D8500094D94D9FDE88CFD4D8E655D85FA44F61C8
7560:10D860007F461F8FB173921DFCC644E2DC4A5F996C
7561:10D8700094FCB383B0EE2816E204B047A4C036800F
7562:10D880004FD756F44B65A7EA073909F8B9C536876B
7563:10D8900013E2017AD5DF21ADB81FB1EC4C14E24D93
7564:10D8A0002FE9F38603BE56EA1586FA3D0963E304C1
7565:10D8B0007F2BD19524D47B15F516FAA7940C10DA9A
7566:10D8C000D34AAF12DA33DC23857A9FF2F142FF7E2E
7567:10D8D000357942BDFFAA2942FF2CDF0CA13EB06E74
7568:10D8E0008ED03FBB7E81D07E454385D07EA57FB95B
7569:10D8F00050BFBAF15F85FEC39AD608ED239A370868
7570:10D90000EDD7041E16EAA30E3F21F41FD3BA5568C3
7571:10D91000BFF6D83342FBB8B6E785FA75675E16FAEC
7572:10D920005FDFB95FA8DF70F1CF42FF5CF237A13E45
7573:10D93000C9F481D0BFC0FE91D07E63FA271A3F564A
7574:10D940008C5FD4E612E6CF6618D09F0D580D58377D
7575:10D95000EC35B3FD0DD493210E518C75C3FE858E2D
7576:10D960006488070000EA4FE4F62EBF02E255BF18B4
7577:10D97000EFBE02E2B8BF30B847D823F841EDB2FBA2
7578:10D980001E3DC6135B25920EA54307659C9EC713DB
7579:10D990008C4C7ED767E53CE50BD183BA7ED4BFA023
7580:10D9A000F5F57A8AC798A0FEACEF57963E3F649C87
7581:10D9B00075FD0CA55B87B2E70B2D305EC97D309EEF
7582:10D9C000C7D03918F0D28E631C305618C794598EC0
7583:10D9D000E36C84715282E31833CB35E3984AB7F293
7584:10D9E000E77C9CC7406FA28DB37EC078713E9915CD
7585:10D9F00038CE16CD38EB332B34E3C4B1F9D0E77C05
7586:10DA00009CA72E378E71E004713EFD2B719CE7B40C
7587:10DA1000F3E95FA919C782E3C0731887F4A5BB981F
7588:10DA200034CA67636719CAC19FCC182733F4A9F8B1
7589:10DA30000DD4C90766920DE338E8B8B41F199244B3
7590:10DA4000859A907FD127217FBE88A3FC0F89A705E7
7591:10DA5000F7E33EDCD72FE628123FC588EE93AAB93C
7592:10DA60006C2EDA393D73858396CD07063D02E36C53
7593:10DA7000B43AB369BDBD7992616104795A5CAF9CD7
7594:10DA80006A0B91F3EEFD591E195243C75F116747A8
7595:10DA90007CD4BA5A26E9C4E727E8BE8BD0FDC987F3
7596:10DAA000749F42E87EE52385ED33FF9DEECFA0DE37
7597:10DAB00046F767D04EC86A7CEF048F339FF8A5E421
7598:10DAC000077A7F71D7CF145C277CE4ADF4548826A5
7599:10DAD000B09F79ABE2291382F8CDF7F512EAD41C96
7600:10DAE000F7D1A5E3BE16E3079D2F19FD5B81AE7547
7601:10DAF0007D284D79BF0184BCBB77EA21C986D53E1C
7602:10DB0000BAB184CCAC995E90865A24F55B4EF19CF8
7603:10DB1000B1FB1A85BE41DA95B63B9D96205CE25278
7604:10DB20004E007D4CF40FC0B9A588D643C6BFB5449E
7605:10DB3000ACCF2272B04EF97D523F80B0F83F1FD774
7606:10DB4000E15280AF25748E1994D5B3A01C09CD2C59
7607:10DB50005E536A67EFAAF878162A2480FB6B5F0A87
7608:10DB6000C4B1892F19FBCD51F7C91AFC4A1593ABE3
7609:10DB700084D2B574BE1EE9AAC5F7FDBDF12EDD70D5
7610:10DB80005AD63DA24068B627FC67BBC57652CEC6C2
7611:10DB900053E9AACACB29CEDF13C07F5A9E06FE5393
7612:10DBA000BC4F72FE07E598F1DF63744F03FE776E9A
7613:10DBB000D213E417E7FB6D9CEF8BEB45BEDF06E766
7614:10DBC00071B4FF6D2BB358BCA9A197C05F3A719196
7615:10DBD0000EF50F1550B31A86FFDFB91CCCA9DBF583
7616:10DBE0000AB0F7F672CDFC381FEEE47C98ABA1C703
7617:10DBF0006D9C6F7339DF9610DFBD1918BFF02B10C5
7618:10DC0000D79B5D2E11B0179EBB55BEB5097C73AB7B
7619:10DC10007CD3E07B27E7DB9D7731BE69F16EE37C47
7620:10DC20006B6BF84C2103C2F1D6E2396F95665E3E0C
7621:10DC30002DDFEAB95CDA0DE04F4D77E5AE3819D249
7622:10DC4000FF96A2C92B4E86D8855B4BA60BF559A52E
7623:10DC5000B385FEB3DDF385F6DBCB970AED736B7E00
7624:10DC600026D4E7ADBA4BE83FDFB75A685F58779FD5
7625:10DC7000D0BEB8FE21A1BEA46193D07FA97F8BD076
7626:10DC8000BEAC7187D05ED5B44BA87B9A5F12FAEB1D
7627:10DC9000F65E7933C8D791B7F504E27D179CA731BA
7628:10DCA000CE78C1A938A1CF49AF03E5F8947708969B
7629:10DCB00067BC4E94F3B3DEB15856834C8E033B7B66
7630:10DCC000C002F1534F1CB5FB89741D97C7ADA99BCA
7631:10DCD00000EB0D6D1F4FC8BFCA37ACF1F5A55A0058
7632:10DCE000716F4AFFE20603098C2254BA7B77CB732B
7633:10DCF000A73EA4BDAD87F60699047A85B717B74548
7634:10DD00007EDE21750ECE80B8EC7B46B23D24DE1857
7635:10DD10007EDE42FA805F11ADFD9C8E94879EF76C8B
7636:10DD200095D939CF117DDE5699E2556960FA5FF9D0
7637:10DD30007C461EB1413D30B8C67299F19A283269CD
7638:10DD4000C0E78182DE2F69B83AA8E704C661F6749D
7639:10DD5000A97F94F07C59E375C27B6F48EE2D80C794
7640:10DD6000B97D7A5CAF49E040E62DC3003FD7561934
7641:10DD7000D6D1E614F4BB5ABDAE15271542DEF41613
7642:10DD800061F996B704CB77BCA5581EF3BAB17CDF16
7643:10DD90005B8EE587DE1A2CFFDDBB0ACB36AF0FCBDF
7644:10DDA00013DE3A2C4F7AEBB13CE56DC0F28CD78F85
7645:10DDB000E5596F2396E7BC4D58B67B9BB154ED6790
7646:10DDC0004FF27786AFAF67410E8DE1727670EDBC92
7647:10DDD00035757D837276582E433953E95BDC60E4F8
7648:10DDE000F2902AC8C35F611D4E0179E9A1BD41E1EE
7649:10DDF0007218EDFDC8ED206FBD7F047923640DCA54
7650:10DE00008105E4EE7BC81B8153841490A73E1A79E8
7651:10DE100012E550952355CFDF904ACE817CA97265DB
7652:10DE200091993FA4CAD5FDE02746F0B77A2B125F3F
7653:10DE3000FF987F4402B93A20D9727E5E417C2EACB5
7654:10DE400077F1B16B29B856E827FB87C03AD235E4A1
7655:10DE5000ABC110DFEF3A4685202BFAFCB4F2129DDD
7656:10DE6000EE2EDC3F94F929F37B85B79BE3185DCD5B
7657:10DE70003A524446C2F972CE3137E567DC9FAE1E96
7658:10DE800009FB66FA5C264900C7EF9C1EE1BC800CCA
7659:10DE90002248E79EE8ABF63FF5C47FE6C0B9BF0570
7660:10DEA000F49CCE3DEE80BE86E9EF53CE5B42CE972A
7661:10DEB0003C46673AC4C13BB30D76E63F4C12E94895
7662:10DEC00026E1F9814AC703D95F0C86F399FBA81CA8
7663:10DED000827E750D1A9C402E231F3DD9FB9EE8B90A
7664:10DEE00000E61B133D0D04CEB9283DB7C27DC758CF
7665:10DEF000E9D9939DECC93E9ED8C0E87C84FBA7D1AC
7666:10DF0000E8AC9E8769F1B84591391FB81C933B3442
7667:10DF1000F42F15E8DFD7EAC0FE07F77E9009E7780F
7668:10DF20005DBBAF48204343DF2F60E73DDDEFE70BEC
7669:10DF30007A20FDE9EF99B03F3EF8C2BB58AE254CC0
7670:10DF40000F375A4AE62A6382F062BD47106D5E1EA3
7671:10DF50004512E7D5837E76A4AAFAD99A09F2B49B32
7672:10DF6000DB81B0F9F5209FEAFC0EC0FC289CA920BB
7673:10DF7000D3741EF972C95DC2FC46A7E0BC7B9A9FB0
7674:10DF800027C140A411143FABC14012A83C2AEEB5F2
7675:10DF90000AEEEB9C6D3E8853EC8D77D65296786CEA
7676:10DFA00067DF0838E03D319EB1ACD15C23FA4F8980
7677:10DFB00035A2FF945113EA3F751D7ECAE6A6F82DDF
7678:10DFC0004FD7D79CEC05EB9C8BAF736C5D55F1ABD9
7679:10DFD0006ACAAAB10870C47A57BD54C4EEE13812B7
7680:10DFE000664638EF53CBE5E9061CE76CE3C004183E
7681:10DFF000F7ACD754C3D6577B0D1B37BD26747DAD08
7682:10E000005C155F73725410BF68707F68FCA8449001
7683:10E010008F4CB02ED2B681D1FB47E5A7FCB901CF1A
7684:10E02000D55B942FC07F370F51FD7719EB2A5C4FDA
7685:10E0300093DE671C01CF770AE3D1F71CEAD938BC1D
7686:10E04000175D6E64724AE5A71ECEBB08DF1F98906D
7687:10E05000CF6E0A3181C2EB902D7520577E85E9B3D2
7688:10E0600087CB6995A9CDE07620B95B41AE178C5579
7689:10E07000E5DC31EB036AA73FFE8B82F7CCC8D714EF
7690:10E080007A4EF0AAC322526283A0EA82DDCB8A6173
7691:10E09000DDFEF8C59BF83EBD3E07E67D9EE88AC0E2
7692:10E0A0002E9D276FDA4685E8EB6985C5B1481DDBF3
7693:10E0B000E7F8E81F98DFE27A71DFB3A441AC9791EB
7694:10E0C00019A9606FCB362AC44F715F0AFB2675DE33
7695:10E0D000D4FEBEABD811B925A4661DECD31F53588E
7696:10E0E000BC67819DC87DA8BDAEFAC3AF7320EED3D7
7697:10E0F000AE307F573D0F5F9AC4F6831533FD061788
7698:10E10000EDFFD1EE51B7518B4BDFF7AF43FF673ACD
7699:10E11000716E27E1745F5827E2D713FE5A7C553F92
7700:10E1200028EC5C9EE391DC2845BC2FF535B773AA3B
7701:10E130007E2419EC42DC274D5357E540E172E0574D
7702:10E14000DC56430AE33BF051923B0DEE907E866035
7703:10E15000BF24C398E8FD8CD04F8FFDD258BFCE426C
7704:10E16000DC1F132A4F4383FDCC41787DD9B862BFB1
7705:10E17000AA3F3CFBA28FCA4BC5EF1EB511BA6E7EFB
7706:10E180002CD7A73AE9F3CAEDF7DA5CB43C23FB6C71
7707:10E19000C0CF8FFDFA88F77D6F31A8F470592488BD
7708:10E1A000A771F924753E8C537CB15DB1E33942A36C
7709:10E1B0003160A4F259BD7B6931198EF5E3ACBEFE26
7710:10E1C000533DD49B457E55FCE6D15407BB27C4E2A2
7711:10E1D0004924807E6EF5B6FF2884F5C2433A51CEBD
7712:10E1E000B4EFC1F8179350AFE71B12C2DBF16270B6
7713:10E1F0002ABCCF7E3CBBEFFF546F8372F269D02301
7714:10E200008F464ECAB9DF0AF482FD7EBEC19A8CF6F3
7715:10E21000FE5A722DE8BB4A17E267FE6BED8EC78788
7716:10E220001FA7789DDBF6179B3434D44E3079EB6A08
7717:10E230005AF86F265D747BD24EE531D44FA280F13F
7718:10E240003D4733F7BB5B5859A9046C701FA7728B0D
7719:10E25000E2A492482A9FD513B89F40DE33FA213EAC
7720:10E26000BAECD957DE194FE9BF6C97925CCCA66324
7721:10E27000915283FCF1D0BFAB4606F951F1FB570C2C
7722:10E280008E61ECF93D4941BE2CDBB5CF408685D38C
7723:10E290007152D33E439B25027F9A8E17C27A5BBB95
7724:10E2A000E31F06882B7EBC57226959E1EF976F79EF
7725:10E2B00005D73DA013F293F3AB9B7F617C0B4C7BA6
7726:10E2C0007934F6B3833DEC896FD9B09F4B41F97E29
7727:10E2D000EE65B8C7F4BED10974287F6E850DE6736C
7728:10E2E0005AAE6172FEEB7B5341DFCB155FAA1D4B2B
7729:10E2F000F6BCFCC99FA3FC2D39FAF354F41F882BFC
7730:10E300004387B6D99701F35CBCF9569C671971A392
7731:10E310001C96FF5A5F02F74C2FC8A46857043DF9BA
7732:10E320008B81ED5F4E6FA5CCA5F33C0DF8817D7B15
7733:10E3300053EFDF8E71F39FE13DB89FF339D3951012
7734:10E34000EB174C8C5F5B0C3A351E6A12E477DBFAF4
7735:10E3500056E0D3D97EAE3438F7A074F071BA49973D
7736:10E36000285CFDD18234C627E29073F87BD4DE4F5F
7737:10E3700082E7D0BF557199870BEF71FBC8C65FC9A3
7738:10E38000C7A778C7C1FA753A35B2FFF70F3E3FFA13
7739:10E39000D34A42E42C44DF99FE6FBB8FE9BBAAFF4E
7740:10E3A000FEE945D0FEF95B4C8FE03D582F285E8199
7741:10E3B000346CDF375342FB40F7D991F47C9BC2F5B4
7742:10E3C0005C6CA73B1C5CFF5539A1F8CB5242A8BC42
7743:10E3D000D07192900FB83F2EDB48DF0FF1CB3C306D
7744:10E3E0002EF633049F87AC1B4BB85D38A4B107648D
7745:10E3F000734A4C7E74A5E27FFA09D0DFF78C4E9FFA
7746:10E4000003F4572981F97FB2F3C03B73A89C7FD2F4
7747:10E41000A4EAAD6857B57A5BFEFC1812496F3FB1AC
7748:10E42000D07D5724BDA5CF23EAADA50DE5F9FF9614
7749:10E430005D55E9D7AEA11FD8C7971DD1E9A8B58F03
7750:10E440001B0C8E88F691FEBC4572C2E550953F5577
7751:10E45000EE2A7E5BD51FEC50B77CAAF2D72D9FAA7F
7752:10E46000FC69E72BD24FDBFE07D06F8AD7EDA64DB4
7753:10E47000D3C07F3675128CC3E7CED4E33D4DD3E7CE
7754:10E4800084DDD3B8231EEBB3F46DBF079FF083AADE
7755:10E4900059C3609DBF9DF814766E5FAFA01FFBF55A
7756:10E4A000A54B13E87CE670FADE4EC93D95F2A35405
7757:10E4B00096027114CFD932F12524413C59222742CA
7758:10E4C000F0B8BD5CACC3CFC4D4209C9EFA7F5BBFC8
7759:10E4D000FBBB9647295F4F6413F2372871FF411D3C
7760:10E4E000EB10799ADEC2CE313CA325FF00D4C336AF
7761:10E4F000B924641FE13132FB7334FF963140BFDC35
7762:10E5000059C312989C0FC6FDA287DBB12E9F230131
7763:10E51000EC7B57CB40DC17761D5E687547B067070C
7764:10E52000B89CBDC2CF613A2C52BD9ECA7D07E9445A
7765:10E53000BFC66731478CCBCD31AA769AF38DFEE802
7766:10E54000E9F8A55C0E67D357134686F06DE6D48FC5
7767:10E55000655B381FE0E744C8BEE2FBD217E41AE867
7768:10E560007BC0DC565812217E53C9E93771FF9706EC
7769:10E5700058F7F25B7265A063BE452FC4431619B904
7770:10E58000BE0E254301AF89FB973E3086CAB1E7B086
7771:10E59000DE69A6F3F3B47C6A7047D8DF69E909F055
7772:10E5A000C1BFDC6A64FEF2DB4AC962A0EBDBB7B232
7773:10E5B000F3DEBF199C5591F04C37337F733629B980
7774:10E5C000305AFAE9D1377796359047E9D16561F746
7775:10E5D000B5C3E58FE97D975DF2AF96400EF5AC9E31
7776:10E5E000CCEE371712F7031324D4F71B42ED576E06
7777:10E5F000F3F467E13E4D758B64D7D1F66AB9CD006F
7778:10E6000072EC69DE2583DF7E9383B8707F2DD70C93
7779:10E610009B1912FFA2CB1ED2EBC05773E6027D3FBF
7780:10E620009B692480976BE8A73658FF3F6B19857A62
7781:10E63000106D5EAF7BC9B47C05E0307BA69587C2C8
7782:10E64000E478A17EEB24D217CE81271ADB5638233B
7783:10E65000F02FDFC4E42C66FB66FAFFCCBE4DA0F6BB
7784:10E660008DC9B5126ADF2CA630FB9616C9BE2D5F88
7785:10E67000ED4803B958BE67207EBFB5FCB5C52991EA
7786:10E68000ECDBAB7CDFFB1ABF07DED197DAB71121D9
7787:10E69000F6AD2FB56F11E2E45FC46ADF4CFF33FAC9
7788:10E6A000F72AD8B708F3359B44FB56D4B21AED5B72
7789:10E6B000515FBD705F8998A87D8BBF9C7D9BFFE8F3
7790:10E6C000AD58579CF111E407E80AF6ED356EE760A6
7791:10E6D0001CB0733798587C33563BD72F563BF73FC7
7792:10E6E0004467D5CE2DEF27A1FF122E87CCCE2DCF9C
7793:10E6F00062766EF91E66E79667333BA7B56F796160
7794:10E70000F68DBD5F3D84BE8FFBC7ACC7EF80FB8439
7795:10E71000A58AD344FB173BD4EF276AC684DABB1B18
7796:10E720004C32D239CCDE393FC5EF607AB2777F0503
7797:10E730007B978D766C10E891563EA60C8A17EEB347
7798:10E74000BDFDE5A9DFFE0EF4E5753DDE177A57C77E
7799:10E75000F6477BBF3C350AF4EE2113B3BF4B4C8C1C
7800:10E760009FED5E1FDAD3494399BE57DDC3E857BD1D
7801:10E770005B62F35DA9F73B601DF8EA22EE9FE7EECE
7802:10E7800061FBE759C6D69478B897F42F0A61DF7D0C
7803:10E7900090E2F921F2507AB102E380CFC7D9B6C234
7804:10E7A000FEB2542626F063E71D9EF231F8AFF32E39
7805:10E7B000D6A1DF3B0F9EC33909BF27A1DEA398D3A3
7806:10E7C000BCEB953E24FC7EC44423E3C3C415927F76
7807:10E7D0004B16DC4710DBE769FCFA757C9ED49F453D
7808:10E7E000BA90BFEA23C6EFD669E9E164F3AF5AA94C
7809:10E7F00017E9512345A407E568F1FCD4E0FCE7BE26
7810:10E80000D0B6AE0FB42F95703FA5D2433B4F953E87
7811:10E81000EA7E651ED7114FCB2E05F8A59DBF4ABFD6
7812:10E82000B079ABF4D4CCBF4EB51F579361A06FEF56
7813:10E83000EADC0F8C01F9F833A503C5EBB6D9D96929
7814:10E84000A1F6F8416E97A6BA8FE7A73A806EECBBA7
7815:10E85000C439E5BB5E49A5F3B9D9953512BE1FBED3
7816:10E86000F52B831BE20B07CC9D68DF54F9FA84CBB0
7817:10E870007B80C379BBB73D1FD79166C98E7A13D011
7818:10E88000D82F7E7FCC730FD3AB03D23FD6F5198D33
7819:10E890007485658014AAEB10F081FE776A0BE38320
7820:10E8A00007F840FF3B8D741E023A57274BCE00F409
7821:10E8B0006FDE752FC8CDAB66FA1CF4B75C72B2EF91
7822:10E8C000CB882523F5B2F22947924F0C4EE404D7AA
7823:10E8D000C579D02F29DCEF98686C7D1BF09848F53E
7824:10E8E000610B09F74354BE0FA17F2E45BAF7D383BE
7825:10E8F0001C7FCCE5F355A0B705E8DA69007FC613A5
7826:10E9000060EB87DAEE911DF9481F95DECD747D1816
7827:10E91000CDE8AD8B40CF9BD53AA7A7A74552E0FDE8
7828:10E92000C974FFDA4B82D3AD2F0FA9720CDFC36914
7829:10E93000E901F1808C10BD07FB147A3E59DD7C148F
7830:10E94000E932652575AF42E80E76EB72F489A617B9
7831:10E95000D5CD3F8C5E7CA2D18BBDE6CEBF8C80F83E
7832:10E96000D71E09ED03694914F6FBF166E6671C3012
7833:10E97000BB517E3B5F53F0FEB9D68E7CCDE51EF6D3
7834:10E9800017A1DFFD4D8289809DB39BC9472A1E03D5
7835:10E99000981C85DAEF57CD6EE45734F8717C1D8EE4
7836:10E9A000E63FA9F51B613CB88FE810C70BF32F7841
7837:10E9B000FCA7A779A5F171BFEBBCBACF3349AB81F6
7838:10E9C000B0F8FF0A63C8B9D46DFC5CA03B4E16ECEE
7839:10E9D00067375DA61FC45F0274DEAFEE7C0AE3BF3B
7840:10E9E000E79F393E0DE477D91FF5C444F9DCBED367
7841:10E9F0004A02ECDE8501D6D98ADDFA88E72884D47C
7842:10EA0000B2EF1C7F6745FB52F1BCD15F4CDFAF78A2
7843:10EA1000F1A3E110B76A5FC3EC8CEF192E1FBEB6ED
7844:10EA2000E170BE5E21B373612DBCEBB8BC9C7B2949
7845:10EA3000BE14ECA4D4C8BE5FAD689AA51843F6E92D
7846:10EA400023CD0A8E4BFBE1BD65DF0E09E3E5E1F85E
7847:10EA5000AD66F07630FB57D1ACF8E13BD88AC62DD5
7848:10EA6000B8BFF5347E6A00BF6ED2EF9E65DFD73641
7849:10EA7000EBC5F861A33E60C438A7FEB87138D35B1C
7850:10EA800049884755A15E5637F13899267EB4EC7710
7851:10EA90007B5EF451D22CFBFD6F6C606FCEB66EB70F
7852:10EAA000617CAE91C5DF648B1C393ED7535CAEE907
7853:10EAB0003E1E979B7A9A0C0F8FCB9D85FF503D9CF5
7854:10EAC0006FE6FAAAC6351B7BC5747EBEECD90B4F28
7855:10EAD000C279D2B9E73F7912F0AFFCE6B327EF86EF
7856:10EAE0007389BD663BAC7F9E67DEC6F8BBFADEDD90
7857:10EAF0005CCEDB77FCE6E927A81EB6BF67C47B5B6C
7858:10EB0000ED7B4E67C2F78CEDBBBE4C85F8E6CA3D87
7859:10EB100005B89F59F9C2A4B4CBDD3F01F9F4C77021
7860:10EB20007EA2E5C781DD7A02DF739E3F6644FFA3C4
7861:10EB30003BCEDA54C5E2D70E1E5FDD19F9BC4A8D13
7862:10EB40000756EFBEE5E6EB611DDCAD381DF89CC74E
7863:10EB5000077B8AABBE45F93A2206FEEDE4F1F3A647
7864:10EB6000A911E3AAE7E13F944F9BCC625CF5C2EEAA
7865:10EB7000C5FFF604B4EDEE1535AE1A88816EEA795C
7866:10EB80005899D9B5CD0CFAF1FC6F318E0D7CA33EAE
7867:10EB900039697FF64226C423CE289D77E23DE53DC4
7868:10EBA00046BC6754B1E75DD497F6178EE23913E19E
7869:10EBB000E751EDA4FB879D1BF0BD8E679B95C56358
7870:10EBC00039FD215EEBB0E1731E976572ACC66BA395
7871:10EBD000C569DF37B3FB50EAF95CD5B60F0C4413B7
7872:10EBE000FF96C602BF8E0BE78AEABCB5F0EC408701
7873:10EBF0006B43CF1FA2C5C3B95D0DE3173B7768DF39
7874:10EC0000C2CF23BACF1908E93B12CEC7D9B9B9C7C9
7875:10EC10002FBD1B89BFEAF9C3DB5AFDF4C776EED0DE
7876:10EC200033DEDF8D2EAF9AD9FE56A5CFB9AF23DBE9
7877:10EC3000E94EAEEF749DE930E3B9315B67E6F175FB
7878:10EC4000A69AD28D7DF7C6F03DC7F781E79ED1FB2E
7879:10EC500061BFBCAEE900DA5BAD9E571316FFD28EE2
7880:10EC600027C531FFA0BA79DF70B047E7F6BF84F25D
7881:10EC700057BDF3B8C147E11C6AFCBDA16D6850DE09
7882:10EC8000C18EFB43ECF8B9E7F60D67E72291F3B4C8
7883:10EC9000D8387C4F8B08DFB3F35301FE325F93C14A
7884:10ECA0006EE9799CB3B26B16CCF76CAB42E03EFBDD
7885:10ECB000D9267D913FC2B89FC13A362648A77556DE
7886:10ECC000F61D9F3EC9807EE64AEBD863F0FDF84A08
7887:10ECD000ABC101FBEDDAD5EC5E65EDFF72A6035F1B
7888:10ECE0006A136FC373A37A0D1DEDC9F65CD887DB79
7889:10ECF000F34B46835869ED41A24B27E0BDD25A94AD
7890:10ED0000E6B0405E2FE6A710D989DF19EA6D854588
7891:10ED1000300FBD5D6737475C5F193CC5C2F266289E
7892:10ED200076F1BBBFEF900783403E8E6F9D07A353E4
7893:10ED30009307A3FCC6FFD7F260F8609C9F401E8C2F
7894:10ED400000C677D43C18C93F721E0C882F8D0EC99F
7895:10ED500083D1A9C983C1F9F8CF3C18FFCC8301A5A1
7896:10ED60009A07E39D0D650590A742CD83716683A741
7897:10ED700000F252A87930BEDAB08AD5791E0CCBFDEC
7898:10ED8000AB0B42F36064DEBF01DBD53C18CEFB1F4A
7899:10ED90002908CD839177FFE682D03C1833EFDF5E00
7900:10EDA000109A07A3ECFEE70A843C186BFF50007929
7901:10EDB000305E8F77B7C6A544CF83D11CE788290F73
7902:10EDC0000685F31EC2899207430B275A1E0C0AE7D9
7903:10EDD00044DC98E87930C2F089920783C2F904E1F3
7904:10EDE00044C98311864F943C1814CEE738AF287974
7905:10EDF00030B470A2E5C1A070FE0BE144C983A185C7
7906:10EE0000132D0F068563884F899E07230C9F287951
7907:10EE100030289C048413250F46183E51F260503868
7908:10EE2000E908274A1E0C2D9C687930289C2C8413F5
7909:10EE3000250F86164EB43C1814CE55F163A2E7C1D7
7910:10EE400008C3274A1E0C0A6714E213250F46183E12
7911:10EE500051F260503813104E943C185A38D1F26079
7912:10EE600050380538AF287930B470A2E5C1A070A63B
7913:10EE7000213E51F26084E113250F0685330BF189A1
7914:10EE80009207230C9F287930281C37E213250F8620
7915:10EE9000164EB43C1814CE528413250F86164EB469
7916:10EEA0003C1814CE728413250F46183E51F2605060
7917:10EEB0003877239C287930C2F0F9AE7930CC814183
7918:10EEC000D240CC8381F938BBF360247FEB3C18BF80
7919:10EED000027CFF9907E39F79307E8C3C18B75ADD9E
7920:10EEE0007F8FC77DE377CB8371265E9337A2873C04
7921:10EEF00018B75A4BCE823C7FDB3C1817E2BF5D1E31
7922:10EF00000C3ACE3F2E374EB43C183ACBB7CB8341A8
7923:10EF1000C7912D632E339F287930122C62FE901FEB
7924:10EF20002B0FC6B1F8249C4FB43C183FB97C137426
7925:10EF30009B05FBB4E9288AE427937F62B485C70D5B
7926:10EF40007FA8FC1330E99C9F52FE09358F41930244
7927:10EF5000EBE1FB9CEFEF70B9F880E7A13816350FB5
7928:10EF6000857F2AC677978A7928A6703ECE768BF25F
7929:10EF70003085B0739429F959FE5AD8AF976BF25087
7930:10EF80000C11CFE98BDD47F3293832D529CEE328A0
7931:10EF9000978769A59F1E04F6DC3C36721E8A199C71
7932:10EFA0001FD3357499C2F9369D97B7C3A739549EBC
7933:10EFB0008BCB8FCA40D7698E3619E3F437A9FC731F
7934:10EFC00008FC9BC9E16AF19DC1F9376332E39F16E2
7935:10EFD000EFB7807F14EFB7CA4721FFB4786BF1D445
7936:10EFE000F29F84F23B247F482E11F34F4C3289F973
7937:10EFF000270AEC62FE891BD3C5FC13931D62FE89B0
7938:10F000009B8688F927A63AC5FC13378F15F34F4C1A
7939:10F0100077ADD6E4BFB84F93FFE2214DFE8B4D9AFA
7940:10F02000FC175B34F92F7668F25FECD2E4BF7849C5
7941:10F0300093FF629F505F58F79AD07F71FD51A1BE38
7942:10F04000A4E13DA1FF52FF71A17D59E3C7427B5569
7943:10F05000D3A742DDD3FCA5D0BFA7FC036FF1EFA17E
7944:10F06000DFE1DF431FE3DF43BFDF43FE8B772C4B42
7945:10F07000D785E6BF78DFE2590779098E5B1C3CAF84
7946:10F0800040E4FC16DDED51F25F04DFFFF6F92F528C
7947:10F09000927FF87C043A2BFB1EB0B7254F674DF9E1
7948:10F0A000EEF9086E2D11BFEB9E552A7ED7ADB3B297
7949:10F0B000EFB567BBC5EFBB6F2F17BFEF1E11E7960C
7950:10F0C000000F6DFE8BDE1697CE0AF692E72908C078
7951:10F0D00077BAD9106F2BC2F220E4BFC886785B29BB
7952:10F0E000968721FF052DFF0CF92F687904F25FD078
7953:10F0F000F20DC87F910DF9337C3C7F461DCF9F51A7
7954:10F10000CFF36734F0FC197E9E3FA391E7CF68E20E
7955:10F11000F9339A79FE8C00C239E13D8CE5496F2BB9
7956:10F1200096A7BCC7B03CE36DC3F2ACF70C96E7BC46
7957:10F130009D58B67B2F62196BFE0C552E3F04BFE124
7958:10F140000A189FC9B32AA7573FF0C8BAD0FC1923A1
7959:10F150001ED884721A2D6F460E7CD397123D6F46CF
7960:10F16000777B94BC19C1F7A3E7CD481BFDE3E5CD40
7961:10F17000986BF961F266CCAD11F33ACC5B75F9BCD2
7962:10F180001923E24A6E41F9E3F238D7125BDE0C9F95
7963:10F1900055E2DFE553BA80DF45E982EB750F790769
7964:10F1A0000E5A9F1E02FB89AE21575D36DF83562E15
7965:10F1B000A2D39BE57798F323E7CBE889AE6AFFF704
7966:10F1C0002B581E87B9966F992FA3877C0B07B3BF67
7967:10F1D000403B196BBE8C9ED6879EE839E347CE979D
7968:10F1E000D1935DEDC99EBE3985D1B9770F7456BFF5
7969:10F1F00097AE34B51EC297ED2E546D997F0F9F3B8D
7970:10F20000D38EF1998E9DFC5E9C8B38ECA9EC7B7DB6
7971:10F21000F0373B9E4F184EF03B7E3B7151FEC4F3DE
7972:10F22000E7D2CE7DFBE05EC05A1B71252681B34735
7973:10F230001CFA81B00FBBC604F19AAADD9FBEF1474C
7974:10F240000AD7DCA2C7FB721D148756F4FB5C89C089
7975:10F25000B778F24BDCA7C319DDA55EA1DF756B7E25
7976:10F260000F0774490D9E3F15E82DB86FEADACCEE12
7977:10F27000B3EAC9D58F4F188DF7C689DF81FC433FAC
7978:10F280007519C7B38B106700FAEFB4E2FDD525AF4F
7979:10F290002D34C0A070DE1A1A37E85524C6811ACC66
7980:10F2A000B6E1706F2F5DBDBFE773B5821FBE88C327
7981:10F2B0004D2911E3449F2C283A0CFEF3227719DEE6
7982:10F2C000AB482B15E346847F470FDB32F03365C232
7983:10F2D000EF75FAD97DCFB0EFEA9BB7209E4BFD9A30
7984:10F2E000FB4B8D625DA5DB392BBF9762219698E8B9
7985:10F2F000D676C5E31392BF3DDD8CE922DDCC0E91BD
7986:10F300006EF14344BA68E966758A74D1D22D61AC56
7987:10F31000185F53E9A6DEA7FCA1E89664E3F73C82F8
7988:10F32000F42A31A5A2C9473C33E400CAB7561FFAF4
7989:10F330005802F01B7E48BF64FF6A7CCB6995C16EA2
7990:10F34000A533D0445AC4DE8B077D80FCBDC489FA46
7991:10F35000A0FE3E8A78F22197FB8FC8255AAE987E90
7992:10F36000F0F802DABA19E46D04FB3D1A18AF4A222C
7993:10F37000B89F5388D30EFBA826AFC9B94881734DF7
7994:10F38000E25C940DE799762C1FE4DF3B770C25B8FF
7995:10F39000EF6F0A7C9E0AF7061E1CD9390DE20F9EFC
7996:10F3A000C5A404D6AF59096C7D5DC64B5B028BCFFB
7997:10F3B0006C28D111D768F87D4A7ABF44C76BB7BBB8
7998:10F3C0005EBB01FCD116763F80D83BDFB81DDB4722
7999:10F3D000E1F7E119BAFA6B001FDA1FBF2BEE68F9EB
8000:10F3E000C8B630C40EB7373F7225DC6BDDA48BFC8A
8001:10F3F0003D73818DFFFE1D7E3F654430DF42816D90
8002:10F400000CE6657870001DA77A7A17F25195CBEB60
8003:10F4100038FD0F964D41FC5E68911C10AF2BD4DF78
8004:10F4200071D3308ADFB8B7657EAF97DD5F1FCDFB44
8005:10F43000D79AA9FEA2FDAAFF1BFC9E95974ECA98DB
8006:10F440000F71744D19DE13FCA3ADF030F02BC7D54E
8007:10F45000340AE429BF2511CF713D1F12277E9AD5AA
8008:10F460002ADE07CCE1F7B673DA881F84E2DA63623A
8009:10F47000FBB836B17E9D66FF39DFC6F5D4465241F2
8010:10F48000EE367EAD9760FDE8E824CE3514DF8E457C
8011:10F49000BD71FC8ECF09FA891D5FEB8B22DD8F5980
8012:10F4A0006E63FCDB642068BF379559F0DEF9FEB26D
8013:10F4B0008AFEE05F7C7197BB7FA43865889F96C009
8014:10F4C000BEBB772590B120876B2546EFFA8C92085A
8015:10F4D000EB962A77AA1CAAF2975116E78E740FF5BD
8016:10F4E000339B8472965736443280FCEC9530FCD5C1
8017:10F4F000BE86E2759975DB47D6F4017C3CCD9FE171
8018:10F500007D32538BE48A744FE7619B8DDD6F5CE342
8019:10F510005B0DF7467E419508EC5486A13E2B127C8C
8020:10F520001FD9887EE95D36077BCFC4F320C9F51962
8021:10F53000709FA2BD79D2E47514CF27A83EC07AB5DA
8022:10F54000497122DEBE2A42F09E2C8FD7F59D46B629
8023:10F550006C08F17F37DB721B6D145EA38D7D6FD954
8024:10F56000CBED94006FE77FFDC306F03B2E1A917F31
8025:10F57000BDB9BFA9BE7780D3675C826B2BBC4FE05F
8026:10F58000979F51E3E374DB9C8B46415C9ED23BC466
8027:10F590000E06F9E663F951DC04CF3F922C3A94430E
8028:10F5A000E27239ECC27D761FEA8DAA07242011C8C9
8029:10F5B00053A0DA37A9450A58A9DC8F365902708F53
8030:10F5C0002EA99CCE3B19F29A9818BC56F99C18D7D4
8031:10F5D000A2F29803CE3DC1ABF3104805F8AADD5363
8032:10F5E000EDE5DA44668FD63E24635ED4CD729B1976
8033:10F5F000E2A9592E471EA4884C921D78AFA65F3908
8034:10F6000071520C49FCC05F2776FB0154C9AFF94623
8035:10F610003F2FD2775B176DCCDF1E97E0FE33D06BA8
8036:10F62000F8E1CEFDE02E38CDA417BBFFC5ED04F701
8037:10F630006B0AF97A37EE3F74EC7BD1C00D24F43BB2
8038:10F640002AAD9DD86466EBFCB8EBD9BA37EEBC05A1
8039:10F65000D7BD6E3B515688EBD4C8965107E09EC586
8040:10F66000C80F997E126E1FECF40FD029E7B04F0F30
8041:10F67000F4F9B67641CB6F123075D787EAE01C8675
8042:10F68000EA5BC8FB67357664C5F441B5185EE6727F
8043:10F69000D4FF1EA7DE1D4247EDFBDD714AC9D4FD34
8044:10F6A000DC3110ECC8113DDC0BE9C8A5F3A3F3DF96
8045:10F6B000C8F525F173FF6498D7C6961BCD20DF6B84
8046:10F6C0000379F662FA4EA2A9049997485C18CF19FB
8047:10F6D000493D32C88F518B4241FD41A58424A4C0CD
8048:10F6E0003DB42221DE432C493CFF4B00F9D22DA72B
8049:10F6F000548E43EFE5AAF2A99547557E6BE1A0052C
8050:10F70000CE0721624E4BBDD484878146B2D90EEB21
8051:10F71000BBEA5FD6727FAED69CE9C7EF977C19E84B
8052:10F720001FADE4FE51ADA5D084E6605F32AEEB2B99
8053:10F73000217E42E9B03285D979753E5AB9F45CD45C
8054:10F74000137FC83EC12377E27D44CF45033E5FA7C8
8055:10F75000B807C0FC55FA5CC3E9A3A58794C0F79D20
8056:10F760009C2E3DE39B63877BC1892617598FF8E662
8057:10F77000E13DEEA6C04813ACBFF76AF08D01CF6B38
8058:10F7800013C684E3295BA2E099CCF0BC8EB8FFD805
8059:10F7900046E53767455D6D3CEA15792B3D275CAF43
8060:10F7A000B47AA4EA8D1AE7BDB6B2FE005EBBED41A5
8061:10F7B0006F3CF18C2E4EA504EF5739F7C4A31DD131
8062:10F7C000EAD3E77CFE9E7846BF058A7B06CCCFA3B2
8063:10F7D000EBCC043919EE20BD8A2992C39BF5A8E72A
8064:10F7E000A435B67BF8AA7FA5FA55DA7EAA5FA5DA1A
8065:10F7F00063F51EFCDA04F77C9003A999CA2DC5A70E
8066:10F80000D6CEF64B9B6DEE4580573CC53D0EF68D32
8067:10F81000430259ECFB5F512FA2E941BC46CE9B024B
8068:10F8200032AE0B3EBA2E644BE178A8E30F4A48642F
8069:10F830007CA45A0EEB7DDF1CC206AB269837A7EFDF
8070:10F8400070E28675ABEF48769F714D02B3BFB50984
8071:10F850006CDD52CBCDB692BB51BF65E2338EFCEE70
8072:10F860007803AA70DF7C6D82EB2EA087A9C885F390
8073:10F87000E863274EF04BFBC84D127C379A54E99051
8074:10F88000D83D7312FC7E8BC2EB53ECC8057DED03B3
8075:10F89000FB6BE8DF1239CFD8A309EAFD5EE67F3AB9
8076:10F8A00049771EAF471398FF7908529FF42A56F301
8077:10F8B00082A9E7394E09E8D46EBD0D916EBF2031A3
8078:10F8C0003F3D91D14BBB4F00C287FEFEBD7B0D4437
8079:10F8D000362791E0EF59D599D0BF8F27CE26B05764
8080:10F8E000BB1206F0734C671DD47F25779A128706EA
8081:10F8F000E55D95E30727CC70422A52DBF55DC361D5
8082:10F900004F45E57A27D0BF7D42D760CC41493A3395
8083:10F9100099FCB8F442BE20950FCD8AC00733ECC3E2
8084:10F9200043EDA4D53004FCD17629CE09F72CDA9723
8085:10F930004A0C5FC9C4F329C9C23CD3E3997FDDC136
8086:10F94000EDD53B09592827AA3DA6F3AB83523B0FBF
8087:10F950008F11EF7490CE3DF1FEAD706EA5C93FA939
8088:10F96000CD4F3969A105EF7F6CDC63C6FD6B57098C
8089:10F970003BC7EF6A31A27D8EA6B7696DE688711C20
8090:10F98000B5A4F47B0BE897A6D424823D4C9B7BD294
8091:10F99000067CD7D2A543F25D7308F645AF2B11BFA5
8092:10F9A000BB55CBF4F49B1217D1FEE91993B1549FC8
8093:10F9B0003758E488F7CD4F73BD52E5F14A3A22DF5C
8094:10F9C0000F9D06793CEF7EF31D1709DEDF6F88631C
8095:10F9D000746C886374EC728F4F781AE4CD9781FA57
8096:10F9E000B0583D07E5FB7F35CF943ADE46AF29514D
8097:10F9F000A62AD0B0608A19D68914E29A3C1B947565
8098:10FA0000A342E03BA2C7BC3B12F3318E6D12EFF96B
8099:10FA1000DAD9BDE1CF3716E077DEA9648D7930A55C
8100:10FA2000475989CE09F183F30BDEB7E9A83C2DE8ED
8101:10FA3000D39A03F2FBBAE226F63118EAC2FDC99264
8102:10FA400052833F40F996DC400D05A5CB7F03F9D4E6
8103:10FA500012800080000000001F8B080000000000E2
8104:10FA6000000BB57D0B7854D5B5F03E73CE3C929922
8105:10FA70002433794E1EC009E19D108724BC1F4E9E81
8106:10FA8000448830BC0485EA8028CF2488D6DFB6DEDF
8107:10FA9000CBC444F4A2B745E9AFF4D6DB7FB0A2A84B
8108:10FAA000200182069AA41340E4113408A8A8AD519D
8109:10FAB00029620BC908EAC5D67BFDD75A7B9FCCCCFF
8110:10FAC0004922D8DE4E3EBFED3E8FBDD75EEFB5F684
8111:10FAD000DA872EC977134B64CCB7D8C0B64A8C7D71
8112:10FAE00087BF1B43ADD96E602C89B196383BB54EAC
8113:10FAF000E70CC7D284F07E8563693E63D5D6D85CB7
8114:10FB000016876D7F3F8B85F18A58EAD202685BAC1D
8115:10FB1000AE5A95B12546AFDD0ECF774EBA3CA48ED6
8116:10FB2000E12FD8DF3392B12E236B94E2B01F606CCB
8117:10FB30000C4350F8CFED56EDD097F0FFE1FD448B2C
8118:10FB40002D20C3B8CCA35CECB0F047BE1B281E4DE3
8119:10FB500066CC285E939ADEF846CA652C76721163ED
8120:10FB600070DFCA5C8FB22CB8318CA99E18C6A2D89F
8121:10FB700033F6F3D98C19F07D584757F3BBFD7C0061
8122:10FB8000C71FFEE54A0C83FB1F29C118570E6317D8
8123:10FB90001E3C15E3B6C1F507E5723FF46F4740C65A
8124:10FBA00087F0926F870BA3197BC4EE1981EBBA63C0
8125:10FBB000DD7F8FF1DA42F7D903703195B1157E19E7
8126:10FBC000E7E6F0C27FABB65919B384FA95F509118F
8127:10FBD0007DC018E1B5D2CCD6D4DB7AD26305D2038E
8128:10FBE000E65DB17D8B295DC5F9BD93ECD0BFA0C0AA
8129:10FBF000AB80EF0B0D317E5F66089E25DB4799D207
8130:10FC0000E1D6474D6616807530A5DDC86C84B50A0F
8131:10FC100009F0E61578D3C379B8C54AE3DDF57F6509
8132:10FC2000BF1996BA18E67A201E9E6F5A51C1727B90
8133:10FC3000AEE3AE3FA8652940BCBBFE4D623E953F9A
8134:10FC4000FF601E3CFFC0235F20DDF4EB5CEC337EE5
8135:10FC5000D211B16E376300CF3241EF3B1F8DBCBF75
8136:10FC6000ACE9311A6729F39A909E776DD4DFBFE92A
8137:10FC700033E4BB654C095D073C5C3E9265453CDC6A
8138:10FC8000618F493C0F20038F8DFD0EDEDF7D6460A8
8139:10FC90009C37A7277EB5F6E23AE06F33637F5E6755
8140:10FCA000A1F6C23A46ED08BB4AF459DD74F27EE48F
8141:10FCB000AFAAC65D261CA7C5FFA78409F04861D37B
8142:10FCC000373232572173DF7B0EF0F92326B3EF0072
8143:10FCD0007FBB19E79FF546CF3D48AF1BAF96D37D5D
8144:10FCE000FDFA1769FC7F249EF86711AE3B17AF2B16
8145:10FCF0005FF6B6AE9FE2BA809FD95858977CFDEB6D
8146:10FD0000D2D6A3AD4FBB5F2903DFF5F2BEC6EF230A
8147:10FD1000843E58FADCACF569808ADAE6CFFA7710CF
8148:10FD20003FB1D328BF1A3F2D1374D2F38D46C76E4F
8149:10FD3000FE68FA775A9F463FE07FA7C1896DC06988
8150:10FD400018D7934FF47CA1E7834E63477F945F3DC0
8151:10FD50001F744A6C416FEBFA37FB405AD752D55D9E
8152:10FD60006687FB7731CF7A3BAD67235DBFA06C3CE4
8153:10FD7000FC3394ABE7385F77EB3933973776DCE8C1
8154:10FD800047BDB936464D71D804FD80CE9DBBCC3EF3
8155:10FD90007C4E9BE7FC3AB77B9011F15E4EED9FD70E
8156:10FDA00079DC830687EEDFFDAB2BB12ABCDF358C17
8157:10FDB00095A3DC77C644C2BBCF2E133CFB900EC884
8158:10FDC0007F4AFBFF7C803AE9B9F631A847CF7FFB39
8159:10FDD0005FB11E78BEEB5B73796FEB3C2DE807EAF1
8160:10FDE000E5B413F8EC762167B73755125D963C33CE
8161:10FDF000CB84FCCC1EE0F8B4C01FEAD7B6A8D86705
8162:10FE0000711D8B1B24D2237A7ADCE59AFA39EADB5E
8163:10FE10003BFD85F47E0FFAB0C789BE77213D86850C
8164:10FE2000E831D6A1727854F803BEB943F0CD7965B4
8165:10FE30008DC9007AE4FC33806F007995C2DCBDE99E
8166:10FE4000C1FE0ECE877DAD47BF8EBEE05FF65CCDB6
8167:10FE5000FA3486EB1F654AEB45EF68EBBF8BB9625E
8168:10FE600049EF88F5B28E1B495EAB2D7C5E6D9D2BF4
8169:10FE70009AEE9C817C51B519E895D973DDA8771766
8170:10FE8000F7026F997CD16881F7BA1E905CA86FFB6E
8171:10FE9000A283A627EE12F85AB96DF10C349A8B6141
8172:10FEA0003E3913F5D1176FC624A25C415FFA1E7A62
8173:10FEB00035C91F9B711D8CE37B09E07B8374FDF4C6
8174:10FEC0005BB6B9D03D28ECB915FE9BDC83C2F59931
8175:10FED0008EAE6CDBACD0F364B7DD26B4C7F10EA1F7
8176:10FEE000BF845EEE5BBE60E100E7DA1D0EB26F6CB0
8177:10FEF0008D83F46375D31653B8DDD5E44B93B7B156
8178:10FF00000E3BF15955E313F41CE85FD501FD4A4B54
8179:10FF1000C7CF6F55C3F0394ED051AE30A1FEEE4B76
8180:10FF20007F82BEF9B2236C9D231CC2AE08FD7B2DDF
8181:10FF3000FDA0C1AD1F57D3071ADC1ADF6BEBD1F35D
8182:10FF40007D5FF0E9E9C2989FFB0B3AFAAC427A84F4
8183:10FF5000F5115E05F0DBD66CF53F04F0B6491C7E6A
8184:10FF60005F7314C1DFE92C769F033FAF2A7521B57B
8185:10FF700027F0C554F4EB3CD3109F9A3FC70A1222D6
8186:10FF8000FC247DABF93779C29FDA1BE5CE07130954
8187:10FF90003F4F02F2C3949A8E391620D9AD8EEDE50B
8188:10FFA0000A8C3FE5898E3951D05FE8D8C1FB5B3BB5
8189:10FFB0004E595C8CD5B057CA4BA07F3BA013C7BB32
8190:10FFC000565B60F62C44F95D0D7E9205ECD1EAD3C8
8191:10FFD000430EA1DCAD6EAF2897C0EEAC0683238143
8192:10FFE0003DAA74C706ACB9D46713E0B9E7EDDE6586
8193:10FFF000C42F57EBC86EAD3EAD70B9399248EB5780
8194:020000022000DC
8195:1000000000F62878AF2E1AFC55C0575DBCC5559B2D
8196:1000100049D77D51F1D877AB6AD8758D1EF81EC2CD
8197:100020005167606E07B4AD4787C4757C8FDD6E5D28
8198:10003000C72A14E08383EB2CD4EAEF179AEC83D021
8199:10004000EE151A98B7377DF9A483FB8DC0E4E94813
8200:10005000E7AA23269277FCA11F5829F451151028EE
8201:100060000EE0A93CCD02D1B1F85CD9E70AB60D1279
8202:10007000FB24C25F61A1BEDC37DCD7DB56E17883AD
8203:10008000C3F984E3A948912A94B0794B6C51117D4E
8204:1000900039C5300CD7C3E468D756C0AF9C6E58B38F
8205:1000A0001BD62F0F8016F0A1D85DF2626837164F6D
8206:1000B0009197405B6BE476B5D6C09687E3E90581FE
8207:1000C0001FADFDC0E1D98A74BFF456FB182BE9AB14
8208:1000D0000C3BC9B9586FADE40A50DCD4CA5C5BE193
8209:1000E0005A9DEC619C8FEB19F2F11B621C97D9B001
8210:1000F00047057E6D747C40FCEB8A33DC9B09FDC0B8
8211:10010000131FF17EBAE14A26F0F781273ACA15900B
8212:100110000757B6E1CA40E81F7AE2637E7F220C09E6
8213:1001200006EAF0139F94FB6C382ED7676CBB3B1B21
8214:10013000E7510C12C9A972C0E4AF85FFAD8BE5FC95
8215:1001400054073C82FCF786B0B3EB6B8A5EB602FFC5
8216:100150002B456E750D8CE3C78069F4DFDF6A7894F8
8217:10016000AD068A53B0457CBF29D6ADD18135B8B331
8218:1001700067A15EA87767CF8E41BC7A4F225EF3DB22
8219:10018000DAA7A03E6E78FBFD31E8AF22BD709CFC83
8220:100190003688DD603D975EEBB7450E8B473F7014A8
8221:1001A000BEE3003996DCDC9F94543B5B047257EB52
8222:1001B00066AA09D695A28BEB1A18D72FCFDB3D7F05
8223:1001C000C4F7584680EC4DA1C3FB31CEAF8F5759D1
8224:1001D0007B7CAF7A59AFB74CB90FC8E8E7C4A737F3
8225:1001E000BEB704F5FBEFCDAEC12AC2E5660F003CF9
8226:1001F0003B0D4C61F1C426C394028C3FA35D1B50A0
8227:10020000EE5DCCE90339C3308D80845FE298B0B8ED
8228:1002100055AC07DE2F61D08E45F86EA0F5C9C857E2
8229:10022000A3984746FD3586F9ADD87635BFE644BC80
8230:100230003D19C5EE40BFCFB28DB9FD61FA63403CB8
8231:10024000F7F726251809EE6863FD6CE4D7E82F98C8
8232:100250001DFDAAAEFF3429383E08C874BCEE3A6CC6
8233:100260006008E70B46BF3D0EFAC1E18AFA2C0B8D00
8234:10027000D725E8AD8DFBA4491DEE407D93C0FB2F33
8235:100280001472FB1CFCDCE47F3613F16359E30F931B
8236:100290002F673CF75BBD4945F1F1D0D63747339C1A
8237:1002A0007F6C4BB401E9F0F2F6BC28E4879D881B13
8238:1002B000587FBCD97E0F8E177F05E0CDA4EB6EC2B0
8239:1002C000ABA28E8A03BC4E9866533700DE5F88AAC5
8240:1002D0009F86FC1FDC6160CFC2143B4DAE59D8DF56
8241:1002E0007959B5A3BE7D21B33E9AD6B3C340EBD9AD
8242:1002F000191D1CB116E0DE304C2947F8142B535061
8243:100300000F2B8622F51EB83E349EDB574D2F2F88CB
8244:10031000E7F2F3A404F3E7E17385243FA5B28DE48B
8245:10032000AE2BC8FC669827696EBB8CF4889E05AC22
8246:10033000847CAF046406FD491E46498D4936A35F9F
8247:10034000257DEBB62D06BA4F11FA76CA87AB2B780E
8248:10035000DCE33A3D11C63B6833325CD764D621A357
8249:100360003F38F92A7305907FAEF278C60E7FE83FDA
8250:100370003DAFF3074BC578EEA0BD042F17B2483F41
8251:10038000AE7473D9E712CDA32A68A78B2DBAFBE808
8252:10039000E7C5621B193795C50BFFA63FEBFF1DE9AB
8253:1003A00037E05E98EF3E3B9FAF54CEF915AEAFAB52
8254:1003B000DCE4423CECB2B9DF9D887AB1DDC8B6B26C
8255:1003C000BEE5E979883FFDE0730CBB6A65FE7CE21F
8256:1003D000471BAE67C4E68DBE2858F788417C7CE495
8257:1003E0003BD42343FF333101F5F855A15FB456E305
8258:1003F00033E4277B1CE727FB0D2139BC333E939E5A
8259:10040000D3E40AF90CC7D96FF42FF4F46227813FC3
8260:10041000EF44FEDC656314473D966A598072A5CDB2
8261:10042000F3BCE0637DBBBE666DAB11D7FD15D80391
8262:1004300080BB24EDAA29DC9EEF49E27C552A7F4B44
8263:10044000FE766793C4D0CF4F6EE2FA3B9C3F527B5F
8264:10045000E78F5F225EAFC51F5ABCB0FB87F2C79122
8265:10046000BF8F3F365C933FBE8D453CDCD75C9CC262
8266:10047000BEC7BF6914FCD0D7FDF156AEE7F4D75F15
8267:100480001178DD67DA383D17F5C0CD0617CA395047
8268:100490003F7D36AC635F347F8F296BB2B0BF4BE1D9
8269:1004A0007A65579399F4CA2E9BD74B76DC6961E83D
8270:1004B0003F30C5DBF133D4876916754318FF2E8DA5
8271:1004C000E7FC566F0C8CFF0CFDE2A39CCEE36ECED6
8272:1004D000934DF05CEA522EE705174C5B300E2B4D26
8273:1004E00028DC817C74027516B4D5E7E029407CD500
8274:1004F0003913E9BBD75A4E96617E11FC1E37F2D9EB
8275:10050000D8FD27CB8A72F079AE4FF78A56EB8FC7AA
8276:1005100035C5B3EE78D723ECC678C6F59207F92433
8277:1005200037D4676E23C56B1A3FD447033F805CCC3A
8278:1005300067AA3116869C73CEF330984336A73C9257
8279:10054000CEF303D3283E9C7BBAFD55D0CC6C9E479E
8280:10055000775FF0C17C1D1F809D3D1E8FFED2F18014
8281:10056000C980F399D664737F684D16F293264FF4D1
8282:10057000033CD5FF61D8B31BC2EC7B6C0297A3C7C9
8283:100580005D0ADDF77598FC83E1D2BF33FE5EBDB036
8284:100590003F9FA33C63FC70DF2B0BD18EE62F771FB0
8285:1005A00044FC4F4F92E9FA2F58C09285F47129E428
8286:1005B00097D51BD5E2CFA4D0734CF10CB3C1FDFD90
8287:1005C00049D1F9387F6982F722D28929C123F8DE1F
8288:1005D000D80979F9285FB6517509688F34B801AE2A
8289:1005E000F2ADB6101C1A5C67055F94262CBE88EB32
8290:1005F000C7F750BF347E7CDE82EF6B74AF6FFE8234
8291:10060000D33B8CFE48EF10FDA53BB0AFE1E12BA141
8292:1006100057B4FE3F4A7F2D7F704DFA637E20F6EF80
8293:10062000A2BF352129447FF0B3E2B1AFF7B3EA4D61
8294:10063000E077E7F4BC5EE828A4E75D265821FA5588
8295:100640002D1077A23C7A1DB42FB0C7CEE7EAFAC3CB
8296:10065000F9FEE022B2C109F184F76A537008FA2169
8297:10066000A30212F985A340F01791FF95417ACF2597
8298:10067000F0C4CE4BD2F961DC45FF2E1DFDC3400214
8299:10068000FA51A3CC1501E4F7DDD629E9E8D7E559FD
8300:100690002765215FBD3AECBEE368825E4D5BBEE735
8301:1006A0003935E4FF68FAEDA018569BBF2081EBA115
8302:1006B0001B41DDA21F882E63381C9A3E47F2201C86
8303:1006C0005260BEE13B2BE9E5A60EA0C78D0807E00E
8304:1006D000A155620DA8CF0B0DEEC462F4D392020AAD
8305:1006E000F7F7BEE98FF9C18AA637DE43782B703F52
8306:1006F00004E35097F162773E62604F3F58F357B47E
8307:10070000B840F367B4F813FD1EBC3F405CB79B01D3
8308:1007100040B447018BBF06E67FF2B23ADC2DE456C7
8309:100720008175548875CC64ED0417FBF6BBEF260188
8310:100730007D66087C541C81B83117EF337633E0E1D5
8311:100740006685C79337BB207E0CE3A399E322FBF8B1
8312:100750009B921C1AE75ACFEBEDC044DDFECC3FDA8A
8313:100760001E017BF409B8CEC7D6F1B874C240D9A730
8314:10077000A0E11C9769407EAC16F60DC2E85EEDD292
8315:100780004BC22F9E60E8C875017E5BF7FF8DECE0E1
8316:1007900081FD7F7B07FDBCF19F2BCC0CEF4FF8BC9C
8317:1007A000200EF5041BA7125F69E356FFA9C1CAF822
8318:1007B00075E2FF2AB1F6C3008F7B28C267A1F677E6
8319:1007C000179FDC84E37D794EE1BC2DE62F3379075A
8320:1007D000611EBBCCC4F3018725EEFF68F70F1B0138
8321:1007E0006EB8BE2941CB0BB493DDC79F398CCE3791
8322:1007F000633E202F44D79B2F947FAEE4F6A40FFED8
8323:10080000FE37F2015A1E60ABC01F3B78D6A4025CD3
8324:10081000531BEE51D0BF9EEA94993B6CDE9B542B48
8325:100820007387E5039E49D0F923075FDC3403EC4965
8326:10083000759BEC8A42796DDA753C17FBEDB2CBDA29
8327:100840000B1FE9F13BB5E91E05F9DF98A8927C5F23
8328:100850006BFE0923804F6E40BA33F2EB3AC748244F
8329:10086000477AFA1ED8FFEB848E9CBEF1DD17FDF5AA
8330:1008700074F8DDC522DAEFB9163DF47CDB02EBF447
8331:10088000C1FA02B04E1FF85D07D6D9A97F689D93C3
8332:10089000FA1ABF5637FF3601FD368D4F4B1338DF3E
8333:1008A0008CDFB72981D942F4D2F0F5A1B0577BA3F0
8334:1008B000347FC3356F065C3A05768718D4C7DA9D56
8335:1008C0006342F66BFEE932F23734FB355F5E544A21
8336:1008D0006A53D82F4C23A35ED3DBA9B9EA6223EB7A
8337:1008E000CD3E2D88EC97B76D5462A867203A4992A7
8338:1008F000C087F0B33538CE300FC1A9A7A706971E21
8339:100900001E6D7D9A7F3D5FD06FCEA04C23C2DFC3AA
8340:10091000AE8A75E2409887B85EBBFAB58E9FAF5C31
8341:1009200028792BB717BEED8B7FF5F7357D508613F1
8342:10093000E451EB43BFC298984C742BBB6A626EB013
8343:100940001B2C238A7D1A665758C550E29F7B851D54
8344:10095000EE8B7FAAAECACC9B1FE22363E31356E45F
8345:10096000A37DCA462BE62727DB66D5C6019E4AFE35
8346:10097000543417FDBCEA0E03C3145669D31707316C
8347:10098000AEAF7E8FB9502F1635B51623DF1D52DA64
8348:10099000658AB3BF64EC89307FB1B1A9D68AFE54B1
8349:1009A00063A24C71FC6107E74BEDFE9644AE3F1A23
8350:1009B000CF5D9EE1EEE5FE1971BFE4E33CE2A3B238
8351:1009C0004741AE310E4D8AA1BC4489649F53817E5C
8352:1009D000C84D46F2F3218EF923EE035E6A34EFC26E
8353:1009E000D47E69E323F7D88110F5FFFD698D19F3F3
8354:1009F0000BB324D7B3F05C991A6CC57ED9DC4CAA32
8355:100A00007B18FB3F32F9B3C15B25CA8B9401BB60F5
8356:100A1000BF6C51A61FF313FB25DEF735F37D02668D
8357:100A2000F725CC8079DEAE4818B581784AEB0FCE39
8358:100A3000DBC0042387C557F7ED9549CFDC572AF96A
8359:100A400071BFA9D49ECE7C617C55F6A889D635BBF2
8360:100A500029A508F9784EB9CCFC61FC1D107EE13C5B
8361:100A60000FC4E161EF1D8EE270051703DC52486E82
8362:100A7000A7093E9FC5B89F387F4142C47BF0C62D71
8363:100A8000688F6E6D8238157AD344FC7AAB373D623D
8364:100A90005E0FE37ECD09162C8983F1FB250D24FE24
8365:100AA0009B11B48F0EA8A877CE24A25E63C3B89C16
8366:100AB0006872572AAFAE237E70F27DB279124893E6
8367:100AC0008CFA2F529E668E8BECCF72F7A8378890E7
8368:100AD0007FBD5ED7E47E5EB34CFB72F30A2517EB55
8369:100AE000453FE8FDECB1D17DE8856FD587E37AD34A
8370:100AF0000B1F96FF5D7AE135082BC681FCFE345151
8371:100B0000E8877EAC1FEA875279FB26E4972EB07700
8372:100B1000E65EF845B3175A3C5E06F24AF27E91EF64
8373:100B200067945E4D65BEFC503CDEAD2FC09F70F5F6
8374:100B3000E2E73C9D984572D4AD5F34FD11E64F1855
8375:100B4000C7FCE3FE4429F891A63C842F83E02B6385
8376:100B50003C1F588685439897737E41F9966A88F3BF
8377:100B600029DE67BF25B850CF49F12139D0FB195A8A
8378:100B70005ED72AF2087ABEE8CEF3CD35521D8CC678
8379:100B80001765762E1F657365CABBEBF9449B4FCF83
8380:100B90001F015D5EE69AFC21E4EC87F24773A2D860
8381:100BA000571DC4065D0F5F68FCA0F187DE8E1CD365
8382:100BB000E567FAB2236FA21D19DDB71D797D989103
8383:100BC000F4B5DE7E68F6E277495C2F6724F27D8E0D
8384:100BD00069C3E7D9D0EFB026F13A0DCD0E75E7978E
8385:100BE00036737E78BD638922A13D41BD9019867F11
8386:100BF000916FD5F8AFEA5189F28D15422F7536F312
8387:100C0000FC5B7589ECB7C0FF16373DB189F78D9451
8388:100C10009F2B545A150B8C3BD325B930AFE316F9F3
8389:100C2000BA196E89E7EB5C91FBF42D3AFACE117C90
8390:100C3000349305EBD01FD7EBA53957B95FA0D74F39
8391:100C400073C4BEFB1CDDBEFB554DDE07B001FF4C7F
8392:100C50007FC09CF4FDFE80F6BE46478D7E2AEEC521
8393:100C6000A11C1DFCC6A4C670FF19E937F5AA42E312
8394:100C7000D893045F0A7FE6CB8B79BFA0984F3C5F87
8395:100C8000DDF485C93BB26FF8AFE5B7C6A29F3E3A27
8396:100C9000E4B76BF34E53184B47C74C674F6689EB6D
8397:100CA0003FD47E0CD7AD43A383A6477BE059E8D958
8398:100CB000BEE8742D3DABE9B37FB69ED5C6D7EC80B8
8399:100CC00036AF5EFFF615B769FA74FD1603E54B26DD
8400:100CD0008BF878B2C8C3CE4FE2F1C1AD493CEEEC1F
8401:100CE000FACA62407BB9B385FB272EB3FD38FA05FB
8402:100CF000A17C1FA7E7C331CC87FBEC4C69B7D0BE02
8403:100D000067119012F73DD3F8BEE77625E0213DED5F
8404:100D100052580DC8C9397C0FE679F8806F21EAE98D
8405:100D2000873F1962A0FD7725D08EFEC9D83C85F695
8406:100D30008F1C6695F2C19DCD663BBED7B5EFFFB463
8407:100D40001A719CAF980B43B843CDE6EEFD1BD40758
8408:100D5000A5729B8CF9FBAE20C8083C3F6941A018E6
8409:100D6000E3A0C9ACBD16E57B02D2B117FAFD2A4952
8410:100D70008BB37BCFEF1737733FAE3846263F6E8A73
8411:100D8000AFBD18F7ADA62892AB169FD5E5F75FD19A
8412:100D9000C51FA1FCBEAAF0FA435DFEBE91EB99EB24
8413:100DA000CDEB4F40DD067CBC5EE373A16F581FF9AD
8414:100DB000FD9D26BEEF133C6964E807B30B89BDE6D1
8415:100DC00063AE95E7DFD712ED5663719F8EFBEBFBA9
8416:100DD0005AD2DC6A6EDFCFE776048BD03CEEDC3E85
8417:100DE0005BA1FA35911FEDB17FD2C7FE88BBD17EE2
8418:100DF00008D5695FFB21C55FAA94F6B95EBC697529
8419:100E00000B4CD43FDDC8B49F9BE474E7F96837F21C
8420:100E1000F9CEF3696E84EB79C1A71ADFEF3B77391E
8421:100E20009AF6414D6E15F78F830E8BEB59E25BCE30
8422:100E3000EFF5A943FCB84FFB1B21173BA383C7B2B7
8423:100E400013C3F73DF83E47CBBA47679F33D27EB90D
8424:100E500084F9486D7FD9077243753DF18CE20F2309
8425:100E6000AB67386FAD9BFD1ADB2993D438C4FBE523
8426:100E7000446D1F538DA33CC4B757A8CE508FFFDDE0
8427:100E8000EB9807EB511AD6593C0AC8FFABEBECD4F0
8428:100E90006F5CE7A476FF3A95DA878EC73E8076BF0F
8429:100EA000DA6DF22861FAE39D64EE77E5657F524CD6
8430:100EB000C5DF7F6354873EE5C10E19F5C58D5761C7
8431:100EC0001D117527CA65C437E537B342FD4C6971FA
8432:100ED0000CF66FBC0AFDB0E7AF2439B83DAA53EA5F
8433:100EE000462793B4105FFC2DC9DD9104D7EF7178CC
8434:100EF0003EC176B734FFE02546FD73BC7FAB7C096D
8435:100F00009ECB0F14525E391FF3CA7934EC42C4DF12
8436:100F1000E85613ED976BF9DD3C4DFEBE8ECC33E702
8437:100F20008BBCEEABAC83F2CD051608B40C0817A74A
8438:100F30009F5B9AE794301F98647261BDC3E82C4FA1
8439:100F40003EE6635B9318C547ADADC9196A0E720FD3
8440:100F5000CFFBBAB5BC2FFBFEBCEF918F627DA4B76F
8441:100F6000AE9A687FFAC8A9585780F60B2DE4FF693E
8442:100F7000F5C82DD1BCCE80652CA03CD38DA29ED1CE
8443:100F800062F69A93495F050E9E80F77E7F99F17D08
8444:100F9000C7F60F695FBBD8303C05EB7E0F4A43E3D1
8445:100FA000B07DEAA3D81C6A4FC55E44FCB418AC2AD5
8446:100FB000CE7B669D5A82756D27D6B112AC637B6B72
8447:100FC0009D85DA93EBECD49E5AE7A4F675B88EFCB7
8448:100FD000731C9E477E71BF65A37D92296FD9146CE7
8449:100FE000F316C650BBFBB61813C2DB12CBB66BF3BD
8450:100FF00060BD5A203AD080C9FED6A7BC8F59FA816D
8451:10100000DD337B474AA3186B7BCA3B5D990CE34EEB
8452:10101000EDFF93AFE0FE9BC9CB1EB3005C734FD9CD
8453:101020001ADAA0FF76F2F2C76CA86F8F4783D2C39B
8454:10103000F5AE38EE1E047443A590C605978D837EE9
8455:1010400082D65F31BD641263B71477643360ADEC50
8456:10105000E495D32D80C75BACDE1F63DFE44B9A5E63
8457:10106000D20FFBCC87F56041C948713FCB9012B1DC
8458:10107000FE65A6C3FB467258FD9E5BFA13ED338DE9
8459:10108000714BCC41871F8CB4EFC5EC1F2784CBDBA1
8460:101090004C47E91B488F89C9BC0E78F424C91D5EF2
8461:1010A0005FA17F6EF439B504E934E642591DB633C9
8462:1010B000CB1DD4F72C185B87F25C62EBEBFD627AF8
8463:1010C000BF3C99D78D142952445D89FEB97C6026B6
8464:1010D000F48F8347A3294F30FAB4B716EB4F4B9DDB
8465:1010E0009979B2A6FAA8EFD882FB6DA32BCE9424EF
8466:1010F000A0FCD824179A8931ACA32E01EE17DAB1DF
8467:10110000A00AD7F54431D6FF8C562517A2ADD0DD05
8468:10111000DA80EF17BA625C85E88F9F564BD0F49C5B
8469:1011200052469D2880E7A60E925D1618E854E0A668
8470:101130008997A05F382C8EF2BC85CA9A2B27A81FEE
8471:10114000E3AA51711D5B7E5D45E398C9AEEF9E51E8
8472:10115000FC2FC83F459E38CA09023E4AC2EBCA600E
8473:10116000DD0477A15DF64749C8DFFF5A6287FEEECE
8474:10117000FE1296CBC37CC3FF42F78F44AB5100E80D
8475:101180006E93BD04C7DB6D92EC0F51DF538CCFFB28
8476:10119000861855CC1F952546458C3FB5441A7F0EC1
8477:1011A000E1CF891B85D7CA331C11F7DB6EB3929D43
8478:1011B000A8782B87FCA2B6DBD2C95E54BC35A9083F
8479:1011C000DB3603F7D32BDEAA28A7FB061E07572C16
8480:1011D000FC915BF429EEAD585849FD5629E52738B6
8481:1011E000DF959CB83CCCAF4D1B945AA244F88103C8
8482:1011F00049FEF3447EAFD0307CD32480FFDEA37C55
8483:101200009FA2222733E2F91905524978FDA86752B7
8484:1012100054447F7689A324BC0E756E456A44FF96BC
8485:10122000B99911FD92A30564BF410F5494801E38F3
8486:101230000AED5260C1025107A5E59F0A054B15B69C
8487:101240008BBCACC2E3EB61F0877AB0C41669A777B8
8488:1012500047733B5FCED6D00649F911BEBF5D966895
8489:10126000FC24DC4E94CB15365E97158987BCA346CB
8490:10127000B2977931921FE3FA92A34BEBD0F49667C1
8491:1012800044BEAFF961E5023E6D5EE673B7A33FA2CF
8492:10129000C1ADCDAFC15F2E2F2AA17CF735D6A18776
8493:1012A00097C17A503FE8E1684A16FE1AF81FE4AF8A
8494:1012B000897324F04BECCD7E6BFE7A05E82B47B8A2
8495:1012C000BEB2498958B7D797BED2C6EDCB2FD3C689
8496:1012D0009DE9F0D0FBEE1D9F9E9A2087F5333F4E8F
8497:1012E000880FEFBFF8E9A688FB491FCF7184F7B7D5
8498:1012F0007E3A07EF4F51D45A1BF0E53126B97CC82E
8499:10130000076DAA1203F4283EEDAEC3B6F4432F9640
8500:10131000ABB2A9E77C75D84EBCE86F33C3BA6E1A7E
8501:1013200026AB18BF6B7E881EDEBF26F3BCC3B1ABF5
8502:10133000AA15F75977FB542BFAF3BB1F54ADE88776
8503:10134000EC76F37319EE2C039D8F7167F37AC5BFAA
8504:1013500024F3BA834EF1BED6FA8DDE4E841BEBCC5D
8505:10136000D137A8FA264875E5C7D0BFCAE9E95F1D9D
8506:1013700053FC369CEFD8837E5BF87EE2F5FA577F0C
8507:10138000041E43380A99E409D723C596284FB8DCD0
8508:1013900096DA1D11FD93C20F99EA4C8D78EF263530
8509:1013A00033E239F01B87A15F526B62546FEB33F06D
8510:1013B0007A5B3D1E57A4F0F8CE65B3A33B83FB6672
8511:1013C000726FE7915CC5865ECFB7A5A4707FF03FD2
8512:1013D0005218C1352B85C3A7AFAFD5F76BF17C0F82
8513:1013E000E293B99CC8E72EABE10AB8BCACE0E927B0
8514:1013F000A6535D6DBEE1DE2CE8573CBD753AAFAB40
8515:1014000035ECC13ADB194F3FCFEFDF60C837823F81
8516:10141000B0CDF7C274AC2BAF8AE2F5095551A23EAC
8517:10142000B46E7444DCA3183E7E6A21C69FFB8D0C0B
8518:10143000F3FC8F99C00EE685F6D9AD661EAF5A4D06
8519:10144000BC0E7C7DE6A9F5A83F3E8BF2E6A5509E3A
8520:10145000B148453C5EB45BA83EF4BE7DA529C807F3
8521:10146000B35278DE2B7BCF44279D2FFBE7C151FC85
8522:101470007D7060FD308E73717736F9E5D903189D64
8523:1014800027D1E801E1335D8F82F081CE6330B7135D
8524:10149000F36FB50E138D332B85F3E3F5B63DEA8973
8525:1014A000E30C6B7641BB2085C7CDB7E2BC046FB0BF
8526:1014B000FF2CDCD0B307FBCF1EC9FB486F59CE0B06
8527:1014C000A27F1BFC510CEDC3BC1FCDF1C63282B410
8528:1014D0006FF3EEA26CD706BACEF1B8C03FB0B643F8
8529:1014E000C5FA0F7F3FACB718E8F42E457CDC66F6F2
8530:1014F0000F26BEB2AD89C179AEB7DEB8EFF921E0F3
8531:10150000047B327F3CA797363FE0D882747C579C9F
8532:101510003BD1E001387E8C70687075C3A3AB3FEFA0
8533:10152000147E7B278E971BCA5357FFC940798A6A5E
8534:1015300009F424F4F77CC85C3E95E8437950DCD28A
8535:10154000C2F9C69F58526C83B6A071158F8FDB9578
8536:1015500088BC9866CF268AE7C7BEA744D8A389224D
8537:10156000FE1DAFCB4F4E6C9C4EE7F826EAE2E25FE1
8538:10157000A488BC651A4B0BCF23AC15F1C6E5B68128
8539:1015800071E89F2A10E7CA806F932AB371F121BDD9
8540:10159000D0B08E459C53D4F870E469FB9D38DFC809
8541:1015A000D3EC0EF207B471BBF3131C2F97DFE37873
8542:1015B00019D531ECE949D0371E3132BF1A5AE70448
8543:1015C0000E2A833087E2A4CB176C645FC61C9D4350
8544:1015D000F5DE66A781A961EB8F52A3991AA62FADFC
8545:1015E000C3E223FAB2A04F5D54A41F902FE6897185
8546:1015F000A5458CB73FBEEC08FA05F9B6E5E417C47B
8547:101600008D1B18311E6B5322FC833CE67163DCE8B2
8548:1016100002FAE27ED998D34A841F302EB091CEA12F
8549:101620008EFB30F2FA847391FD037DD1A52FFCB1BE
8550:10163000DCA7D12FFCA1F873B823F197501E89BF06
8551:10164000244F24FE521644E227D51B898FF4E5234C
8552:1016500022EEF75B9317D11FF0C08488E733C18077
8553:1016600085F7B31E9D16F1FCE08DB323FA4337DFF7
8554:1016700016F1FC70FF9288FBD9DB56FE207A8FAC06
8555:101680005F1BF1BC9EDE3734FE34627C8DDE3EF89B
8556:10169000FBDFA437730AFF50D03B51D859879BD743
8557:1016A000AD75196D8FE2797C3C3682FACE81E7E91F
8558:1016B00063D1FEAB5497E79BC6685FFB97B2474286
8559:1016C000BD940EA8356451BD3CD5F5FDDC6088D8CD
8560:1016D00067B73BB93F6477723DFE6B133F2F950EA2
8561:1016E000FE26D929030BC5D916AC77648299AC8F35
8562:1016F000639C5DE7E818A63A306F07FDC921BDAAD3
8563:10170000E9D1DBCC6A6D07E8975132D793A03FFB54
8564:1017100039619EF7A5078DDCFFF019D1FF48B7307E
8565:101720005F6C1ED919CA433B58A284E700E2427A93
8566:101730005CFD0E88757065369DC37A134140BF59B4
8567:1017400075D17ED3AD9A9E5A3E9CF4D4655BA4FFBE
8568:10175000767969165D3F7BBB99EA07CE8A3A470DD9
8569:101760000FFAF3D6DA396CEDFEF22D9B62D0EF3C26
8570:101770002BCEFF6AD7270BFC4D76CAC2FE59D66026
8571:101780003E6C1118F138C07BE5918ED8DB18F99BBF
8572:101790009370DD555BAEDCFE2AF4AB0DC1646E3791
8573:1017A0007CF4DEFC77F9B9EEF97F8BFCAE408593D3
8574:1017B000C7F91562FC5BA0B1039E6E013A38B07D9B
8575:1017C000635219F2275CA7F371338F3023CAF32CCD
8576:1017D0006F26D54D9C62AE337B01C4F94E95E09CDB
8577:1017E000CB3C46CC5BBD737B650C3ED73D9E360E35
8578:1017F000300CFA25EF3A7CC664CC1B4CE6751330EE
8579:101800009F05AF7B16A53F8C76499BEF1DE6BD7407
8580:1018100006E83B9BB9685C6D7C86E9F9303DB57B99
8581:10182000F9AA8F1260BEB5470D948F58DB6CA6786D
8582:10183000AD6BE57FED780AEEDF91DED10FEDF6FBC3
8583:101840002BFF3604F9E1D6CD325381DEAADD7BA72A
8584:10185000336C5FE5ECD22B31781FECEED6A7D05875
8585:10186000BE6CA63AE2F757BE3C24DC8FAD74162E50
8586:10187000C7F7D8B8EB3BEF58FCD2F014AAF712FC2C
8587:10188000B442F0D3DA178792BFB536A69B9F787F14
8588:101890002BAF1BD1D67146F0E3CA97BE89F8CEC4F0
8589:1018A0006EE023D5CCF7C5D4A160EFDB2EE7D2776D
8590:1018B0001F8CDE7F75C2BC2D573F89C5FE9E37FF4A
8591:1018C0004AF0B3B9D7072FCAA26F4C687F5A3BEFD3
8592:1018D000B9A029211FE90E72B601C7BFED772F5EAF
8593:1018E000FA00F1D3FCF2D69FE133D779FE739796D5
8594:1018F0007714F6C625F001F686E28B2E16CDCF932F
8595:1019000008FF46C11DF92CFA9E874A7CED66C77117
8596:101910001FA7B6D5407526B1B8091496AF8B950DA3
8597:101920009A51725B9CA0AF859EF97FCEDB2AEAA814
8598:101930003E20D21F2A38B432C20FF2C05FAF7ED031
8599:1019400033DE5ACC2FE9FDA1F101C36253DCF7F875
8600:101950004587A6F5EA174140ED96C688AD21F835D2
8601:10196000E8F4F37E2157F53816E6FF03D1FCFC338B
8602:10197000980EF47B7F9ACAF5B72D83F1F36952E78D
8603:10198000300BE8CB16E7A2C71F856B96417CDDD8EC
8604:10199000AFA53335F9C47FDD7ED7A111A4B7D8B781
8605:1019A000301BE243E43DF4742BC0F3ECF961722781
8606:1019B000DE0F1CFE6B2CE67D77C4AB6F213D8247AA
8607:1019C00065DAFF89523A4C8E5EE2BB57510F029F97
8608:1019D000CAA9DC1E581A797ED1A2BA19C60F51764F
8609:1019E000FBA8F0737F8D4E1E4F561E7EBFBF09E8C9
8610:1019F00071C9D0169B03E3AFDEBB3B16DDFF0C9332
8611:101A0000F703E4C35567DF1E63A7FCCD96FE180FEE
8612:101A1000D607F87730462ACCA7E4F584A37A332C8E
8613:101A20002601CFE927503BB2297F19F2597580AFC3
8614:101A300013C7C642BEE18D12F53B1B6BE371BCEAD6
8615:101A4000DF37A7A13CBD9CC4E3CD97AE66F3F71585
8616:101A5000A6E0F341A74310D36FC0F8E46511D77433
8617:101A60005E95E9396DFE918D85B21DF82127B0F1A3
8618:101A700000C5514D6615E91AF51CE378688A22B94C
8619:101A8000AF6E99CAD0EE7739984B82FB3BA2837F29
8620:101A9000A4F36ECD6615F3AD51F68D2C1EC6DF2175
8621:101AA000F659870347E17929EDBA365F54D3D31845
8622:101AB00073203F50DE374AD9C826DBC2F11C437879
8623:101AC00076A4723EDA111D30609E253898B1670900
8624:101AD000AE109C8CE6D5E01CEEC7F3843B4CC1F302
8625:101AE000786E06E0B223FD87330E276B1AAA629E3A
8626:101AF00020CAEEA67544D955974FEA0957752EF3BB
8627:101B0000A35DFFF943AC5B6E518EABA3437D0BC865
8628:101B1000C08E814CC8F9CF1F2FC908EF83621917F7
8629:101B20007A7FC8AF363E5E3789E2099F8CF12FB4C9
8630:101B300031F1B84E95D6A7608A298FE301F7DBAD66
8631:101B4000167EBFFB79E06F1BF66DFC39579CDD3AC2
8632:101B50004D2239E1F5B8421FDC2705CEDF08A4FD90
8633:101B60002A702057055856BFB19FF87495A1E9A96E
8634:101B70009170FFEE28AF2B15E67BED43039D6BFDC7
8635:101B8000F38B51FE0AC0C7B07D5B92DDBDC8877E76
8636:101B9000FC47DE7BE8C974A4FF3E49C53C6C973125
8637:101BA00048DF37A96AFACC44F50D8D1F53DDD39B6E
8638:101BB000A9DE4938CFB8C61ADA8F1ECF36D27E7466
8639:101BC000B6380F5EEFE4FAE3F2E921CFD684E17F85
8640:101BD000492A972F16F40E40B96912F2D9827E0A6B
8641:101BE000B47B85BFB4B7F5D62C352C7F58C30EA473
8642:101BF00023BE1F6287A8D5AE77F9F9B9CAEC772C56
8643:101C000077B8C3F86F9190F745A9224F96EA9D8D5A
8644:101C1000F0AE6AFDC414ABE23999FAFE6857EAC126
8645:101C20009FB2F782976EB9D5C951B51234E1F3D599
8646:101C300017F8F957A0731D9E3778F99DC6118BE1EF
8647:101C4000FA5EC035D695FACE9AA9BE72AFD1938E00
8648:101C5000CFD79CF93A17F556090201F07CDDBC6A32
8649:101C600000E20DF8BE281AE56B17233DA6C9670EE2
8650:101C7000CA27BC9F837C5F80FDE1A4877798DAF94F
8651:101C8000F9D3BDFCFC29F03DC901F0BD1DFD861C4A
8652:101C90003BC801BD3F94E47B47BB81CEC9FA408F6E
8653:101CA0000FA67ED11CECEF682FB1937C635E3F0FD3
8654:101CB000E5347080C6A987D8044927314FB83FD989
8655:101CC000E88C25BA69FAF1B093093BA1C6E1790322
8656:101CD000AB2C47C845983DE47D612F4FFC2AF0F8B6
8657:101CE0002FD176B8855D10FE14F3E6939EBF57D8CA
8658:101CF000AAB5AF4F98B91DD6B9F684DC5D3F8EFE0C
8659:101D00006B40F0C901E1CFA29D5013783D0E5E1FDC
8660:101D1000BD99D7D58E71AF29C6B3CFE3CA371EC4DC
8661:101D20007682A7BE18CF3E4F5AD07E909F81E6E7BD
8662:101D3000D91B0EDC948DFBDE5D67CD0CF75D1AFEC2
8663:101D40001AFCE34B8087FB5B00FFBDD825580EF1E2
8664:101D50001F58EC74E6EC79BF4BD2F4C7A90AE4C76C
8665:101D6000CE0639D40740AA80C1B1FFDBD4938FFBE4
8666:101D7000A09F95E67E3E15FDED742FB55D27FF9A79
8667:101D80008CB660EF69EE473598DCD9C83F0D032368
8668:101D9000BF1FA0B54FA61A890E057D7CBFEB482A50
8669:101DA000CF6F0EF1B1C7908FAA1A64BB1FE87EA94E
8670:101DB00041769BC01F3AEFF626E3D99C0BCC77CB3C
8671:101DC00044B4F3228ED4BEF77217FA2960A7EEFE50
8672:101DD00065EFFB0FAB99F65B6340BE5AD624B1FFAB
8673:101DE000001C2C7F26F2F9D5DAF76A1AB71CC6EF69
8674:101DF00088AD7C4E771FFD15FA0E46A41F7324553F
8675:101E0000F827592C0BFD13E023D20F46851D310313
8676:101E1000DFAE48F7EE437BFCB2F8BE02E85192C752
8677:101E20007D4E615744FD417007AF2B1EBECD2F1B69
8678:101E3000E0FD098A5F467BC5A0C57D87716E6F197D
8679:101E40007D87C9E73E8DFB3ECB853E5CAEF9697E62
8680:101E5000BE3F026637C24FAB16AB1FCFFCB5B1B861
8681:101E6000FE6D12C5CBABB645EEA7548BF5AFDE7C4D
8682:101E7000F2309ABCCA7ADD7DB1FE6ADDFAB57DF337
8683:101E8000CF5323EBBFAE773FE42F46EE37BC2DC6D2
8684:101E9000D1EE9BD2B87EAC826520DD56FB65BF9F3C
8685:101EA000FB7936FC5ED09D625D770AFAD33AE1B9E0
8686:101EB000CA6D923F803CFE78649DE95DF58BCB90C6
8687:101EC000AE7A3E5929D6BD7CBB91FC55FCFE0FCAAB
8688:101ED0009D9E3F568AF5AFD4ADBFCA2BE9E0E37EA5
8689:101EE000744FF8EA6F413A576E37B2DEE0D3E8B587
8690:101EF00052E3EB3EE0D5E0D4E0FEA1F0F64F13F95B
8691:101F0000AD116C04D1A93CE1BAE8A4F773771D1EAA
8692:101F100041DF5BBB7C6420C5FB1A1FE8DF2F137E0B
8693:101F2000F2D4CDDC6FBCD4586C1D89F14C9BC1251B
8694:101F3000A9149FC58E04BCE437CBAC02FA5D4D59A1
8695:101F40009BF0FB8379270AE660FC9F7FC240E7EFA6
8696:101F5000F61C29A07DE7FCA38312B228CFEDA2EFE7
8697:101F6000E3C038645FBBDAF236E1F984AEB69202C0
8698:101F70001C5782E7D00FC81376A2A62DCF1A7EFE7B
8699:101F80007C4C1A8FEFD73B3FFD39FAE9537719E9BB
8700:101F90009CC55463F04DACDBDA7344A17DF2D527C8
8701:101FA000963C1485F47D51A27DF2C3ED6B1317228C
8702:101FB0009F3519EDB8EFDDD5F4E30378DFB75DA207
8703:101FC000EF5E54379766EF807EDE967C57F8F9B364
8704:101FD0003C874AF0B1542BC5CF53FB19C96E5E4CF8
8705:101FE000B3FE16FD9F95EE2D24DF17F7EF3151DD7F
8706:101FF000DE0E89A1293BEC3CF80AE2E3E2AB274D77
8707:10200000E88417379C34757C8F3F70C92FB300C5A7
8708:10201000CD1B4D18C7546ED1FA1D26A49347F8471F
8709:1020200055CF7D4CFD95E8CFC37C2B9F91A97EF7C2
8710:1020300060F36B26E4E7AAED124BC90CBBBF598ACB
8711:10204000F85EC312C6F96089D03FAB987F7D1A3C19
8712:10205000B76A23AF5B608F46D6016BFCBD42F0F7D9
8713:10206000AAEDB3E8FB533DBE5B8871E30DF81CE7B6
8714:10207000EF659B23EFAF107CBD42C7D73F4913FAF2
8715:1020800067381B8E7CFD75A11A9703D7BF3EB972C6
8716:10209000406FE7ECDB84BDD6ECE5E58081EC8DFE9E
8717:1020A000B9CEC62B046775DB6513FAA7654D5F10C3
8718:1020B000FE2B9A5AA97EE466E65D8DF8BAB9C96A24
8719:1020C00047B9AEE8E07A685A93D9EF97F07E3DD5EC
8720:1020D0003977B5F0BA49DF7E89FC1C4D8F69DF770F
8721:1020E0005C26F0B80C14787A1EFABB3C6EAE127106
8722:1020F000F28A615B0EE33E7B95B8BFFAE8C158F403
8723:102100000FA7B12F6E47FAC07C0CE763CF44E27D86
8724:10211000BAD08BD3B773BDA8B76B5DA9D933298F5C
8725:1021200009712AC2B57A7B24BEAB74F1F963693CAC
8726:102130003FF6820EDF154166CD413854D9E5A7A799
8727:10214000DB159CF7482ED85BB4936AD6F77E87F1EF
8728:102150004DE1676BFD99E21C78BD7DA32D3C6E8E31
8729:102160004AE7FEC2CAF1B20FE9D51D6F0C3A98AB2F
8730:102170001A42F106C419CD69493CEEC08292373249
8731:10218000649698188A371E716EAAC8837EF5762EDB
8732:10219000F79DE3603C3C7FAD30F247ABB79BE99CD9
8733:1021A0006235D09FE28A267E9EC2D3249522DDC16D
8734:1021B0005F3F9A86FBB198528575CF6AE47C3FAB4E
8735:1021C000E40BE297A383F87A2F2B6A4A6FFEBBE6F3
8736:1021D000B7E3F93035CC7FAF0239C5E7AB9A783D2C
8737:1021E00052C3816FFA67A29E6BFEAFFE8BA1FD5AB0
8738:1021F000D845CD2F0C825F3890FB45F4BDC9BB8517
8739:102200007C2DB3F37DBABB85FD61521DF17995B18B
8740:10221000FE503CFA593B78BD00DB871F8503FDF873
8741:10222000F64B75F1B0EECE9724AA87C3F7F17B94F5
8742:102230009D4BEA3F41BFFBEB1D16F237EF06BF6532
8743:102240004A5E4FB9D4E45BFB6E560D7B88FCCF87AA
8744:10225000581DB595829F3B1B6BE9FBA09ABF42EFCF
8745:102260000FECE98F540ABEAFD4F15F547A24DFD566
8746:10227000BC1D4D7E63D751D98EFB3180AFDFA48565
8747:10228000E345F8210D07A288AE5D276D6447FE2C5B
8748:10229000F8EDA2C83FD78C93090F86F1BCCD6E79BB
8749:1022A0006D20D211F18EF5F72FB7BC36829FFBF669
8750:1022B00013FE576D9323BE0F5B591FF9FDD79AB7D5
8751:1022C0006FA3EF0855EFEF866B88293104575F72D3
8752:1022D00020493C8E3448917164F53ED9135E7706EF
8753:1022E000EBB903F551BA9007A6049331FF35009D71
8754:1022F0000680AFA689D3D5D0CC5B98FF169E273138
8755:10230000D2FC3DEE17F956E3FDAF33AD7CFFFAAAE0
8756:10231000AF02FBF70F94A9AEF3FEB7570E0DD7A38C
8757:102320000CE104BA561B83C9146F9E34107CD52768
8758:102330002F270FB2A15EDA5282DF0F9D2EF4DFE16C
8759:1023400081D6E5C8CF3E9C372534CECB69BC7E8F85
8760:10235000E17A9DE86DFC928F2BD6FB109B2DE26AF3
8761:10236000CE4F39697CBD108F8C4BEF251EB95EBFF7
8762:1023700013ECC3A98512D633293E8C87F7BCC7F569
8763:10238000424DF3B28F90DFABDF37539DD7FD2DCB9E
8764:102390008652BDAFD77B03FA1B5FB7ACB881F2831F
8765:1023A000D24304970FE173A25F732619EB522B9B64
8766:1023B000CF2493DDDD3B7A932F06FD97BCE9781D92
8767:1023C000FC09E23FF06B88FFF6B415687E8C15C7F8
8768:1023D000AD3CAA78103F95470B8E57A07F71A2A8FD
8769:1023E00000D5B974A280FC987CF4636C21BFA65B15
8770:1023F0004FA6733FA6AB358AF20B121BC8F9870DA7
8771:102400008AE09FD50DAF93BD5FDD2847D42F6AEFDB
8772:10241000DD99AED038CB34FEA997DCC41FBB78BBA6
8773:10242000BA710FAD6F95B19EE85DB3DDC8EFEFE017
8774:10243000ADF67D581F8BF7213E8EE325A0C3349364
8775:102440003F03F3D3C732B99FAFA7C7E7E93CFF719A
8776:10245000ECAC7700F2CBB142EF507B2F76C2C78A4B
8777:10246000785C2B097C37F07353FAE73E4B97C477BF
8778:102470004222CFB76AEDA974AE3FA7997AFF2EE04A
8779:102480006FD2B57309EC31430146C546FB06E1D76F
8780:10249000A7867DD761CECD46F2174E31FBEB58EFC4
8781:1024A0003843D3B3E3B87DD5E7CBE789F73C9B55F9
8782:1024B000BE5FA43B3F334F3BDFA43BEF364FF83BBF
8783:1024C000F374FECED3E9C28F1FC286A01EAC17E7FD
8784:1024D000EFD60E8FF287E7B3F4ED61B12F82E78775
8785:1024E000B0AD19FE2EE57D8EB59E7D85EADDCE462A
8786:1024F000B1813CAF47F9EFCA3EF2DF35DD723937C3
8787:1025000082CF34BA5C12DF83D1D365B7A6AFC4BE25
8788:102510005DB4D8B7F31BBDBB519E2B2D174DBCEE40
8789:102520003068427D56339CFB4D974A25DA6F073859
8790:10253000FB9BC3F4FBA5541E7FDD7F8B4479D756EC
8791:102540007C1EE3AC7A89EABC2B03ED26E4A7210DBF
8792:102550008B1F26B9F5B1D32CECBB1A332DDC4E768C
8793:10256000D34F5B77B71D8BF7717D9C482D3E8F76DF
8794:102570007186B083FA735143597B593AC033DF2DCA
8795:10258000B9B01EA02F3ACF5E30EA7544C3F5D2BB76
8796:1025900033DDFB4E3ACA79FBE55B308F7A6CF86726
8797:1025A000FDD18E56F5C1C71F0B3CEBBF2BE31AAA1A
8798:1025B000D6E2F7556A9DDE0ED29F866F6347301CC8
8799:1025C000A7E3376B25A41323FEEF4B7E3E13E37E78
8800:1025D00096CEBF770FB8A77D9755E9BC4EEB98D143
8801:1025E0009F41798A9CEBDBF7AAD9F7462EEAB3CE56
8802:1025F000D6A3B9A630BA5E5C0B7A00ED4AF3C1648B
8803:10260000D516CE7706E23749D2F84F11F632920F3F
8804:102610002F221FE6607B267610EAE35DA76207E3C0
8805:10262000787B79DBCDAF4DFC7BF6101F0D9917132E
8806:102630000EDFC304DFA57A3E0E631D43E68C0CBF9C
8807:102640005FDB171F5B33888F3B22F8585B6F3D7E43
8808:10265000CF07E38016337DCF07F3D78E3039199A31
8809:10266000C1F5CF58F1FD9EF1CC47DF391C2BBEE3FD
8810:10267000335E6101251EF7CD0232DFF7E5E72DC697
8811:10268000087E1EAB045AB18E62BCD8E799C0DAE965
8812:10269000B9292C48AD9BD9E91C451173513BCE1289
8813:1026A000988EEE544E7D3DD525069215C7798B3810
8814:1026B000AFD10BDD42EB57E8BB3DC49F329ED7E95B
8815:1026C000FDBB2FB333B8DCD3C74590BE9718E5B92F
8816:1026D000F07B6D38C9448595637DD3648559A2012B
8817:1026E000DE5D870C24CF2D1DAA1FEB535D09E2BDD3
8818:1026F000CF19D5E18E757379459383F518DA7AF59C
8819:10270000789800E3619E6DAC029128E13140F3DDE1
8820:10271000C8F8399242A652FD736946A6D0F7418A9D
8821:10272000A38A218E427D6FB0F8081FD33354BA8F2D
8822:10273000FB25B130CE848D127B0FF73FB2F87AB50E
8823:10274000F1270023E0F9C2E919DC9E614AF5BD7862
8824:10275000BE8F124B05CD2576FE9DA364FACED1F532
8825:10276000E2B52B997FEF32F6CE60E7CF0A42FB4904
8826:102770002EFCEE516CE83B9B2EEDDF830844FE7B84
8827:102780001077642CF911F2A356AFC7BCFCDF7DD0E3
8828:10279000D7EB85D5E7B10B61E7B0B5BA926DFED93D
8829:1027A0002A9EF35B9068A173BF7996FEF968C7060D
8830:1027B0003ABD34FEFBD2F6C13498E21FED8909F12F
8831:1027C000BB95B9C721BE437583FC3B50DDE7AE9294
8832:1027D000199D57B49A797DE563201FF81D26902E28
8833:1027E00015EB68D883C5548FB9DE6171E17909337F
8834:1027F000C26D0DC15D6B11DF05B5F07D717D3D686A
8835:10280000ADCD40DF1DAD65D1740E3D29DABB2E0381
8836:10281000E0BA2FA688CE7767EF9CE444BF317CFDF9
8837:1028200093B4F51B7AD647C27A1FC9E8A51E515B3F
8838:10283000A7F6EF76D805FEB475DBB5734A6E25E2D0
8839:102840009C92868FC7A2F9BA8DB8F39F45EFAAA8CC
8840:1028500037F4EBFDFFDC29BC16A06400000000008B
8841:1028600000000000000000001F8B080000000000B6
8842:10287000000BB3D36660F8518FC0C19A0C0C5DD2C7
8843:10288000A862B4C41D120C0C9780F80B106702EDFF
8844:10289000F5926460F006E26D40BC1D88C5A518186D
8845:1028A0000280381088FB80FC7E204E07E224A81BA3
8846:1028B000B30519187281381F880B815848808141EF
8847:1028C000588078FB8B1519185EAB22F85A6A0C0CED
8848:1028D000C91AF4F3FF60C381B6F4B5EF16D0BEE5B4
8849:1028E0006E08BE0490BDC20D55CD4A37FC66AC42A1
8850:1028F000935F8DC65F83477F810D2A7FAB292A7F37
8851:10290000AF3903C3072435DB4CF1BB051D2B00FD9C
8852:10291000A788274C9730A2F22732A1F2F9A17C00B8
8853:10292000BE1E313CA80300000000000000000000B3
8854:102930001F8B080000000000000BED7D0D7854D5C2
8855:1029400099F0B93F7367269999DC24433260126E7F
8856:102950007ED0A001879860B0586E20E147A30E0892
8857:102960002CB440262888166DC49FC6DD500609BFCA
8858:102970000921E14F70D11D105DEA63FBC5565B75FF
8859:10298000BB7682D646AB3568D787767765A015BF0C
8860:10299000BA761BD96D976EBBF57BDFF79CCBCCBDB0
8861:1029A0009900FEECB7BBDFF3C5C7E770EE3D3FEF24
8862:1029B00079CFFB7FDE73C725BB59701A631FE31FF6
8863:1029C0009413731963B5A9B2C5C362D9398CE5767E
8864:1029D000488CD530B6B25D89CF827F1676B4BC8282
8865:1029E000F5E56D6EC35DCA58FF036E7F0DD44F6F62
8866:1029F00057C26EE8DAA8F8A8BEACCB15761BF07CFF
8867:102A0000EB472FE7E3FB8D5298419DB1BB199BCC5F
8868:102A1000D81A0FFC13EACB2A921DF8FEDD2D52388E
8869:102A200086AF99E99B04EF6F65FC7DF3038AC6646A
8870:102A3000A8EFBBAD894D64EC961E98C5430DD9C770
8871:102A4000BC3D63058C45F823D6B205DE57A6DE47AC
8872:102A500058D7470AF46B8E399EEF9BF53E0BE07B0F
8873:102A60002DF51CD6730CFF3185B14B993F783A1B7D
8874:102A7000FE1D66E18F15281BF2191B9DC297B364DA
8875:102A80000CA01FC5D85CC65CAC1CC6A9BDCCC5CA11
8876:102A9000607D161EDB381E97354984C7653E46F5B6
8877:102AA00077E74AF1074BA91F9B5E0D253C2FC88392
8878:102AB00032C8CC4228231E96C806F8E7B65DF61E3B
8879:102AC000AE7F034E359ADA2702F07E018BBA18C02A
8880:102AD000F7672C46E56216A7F2CB2C41702C6543B4
8881:102AE000252AD4EF52129B18CC130E45A7E3FEFE05
8882:102AF000AEFED8BB12BCBFBF5AAA9D0225F3E5D1DA
8883:102B0000BA2FB43E6B7E9545AEC37118935D113FED
8884:102B100063E3AD751E66B18A20637A8F8FD3CB6174
8885:102B2000D6CFA03EBE41D04BE3FB7208D6DDF33CCE
8886:102B30000B633D049B3905EAA1AEACF806A8F73C4F
8887:102B40001EAB47BC1C6B01CC43FF638D6E295A053D
8888:102B5000A54B7745A00CA98C2980A7FA86F592028F
8889:102B6000EDE646F938E34D4D665742FD704C52C5CF
8890:102B700073ECAFEB314987FA78A83F28E17BDDC5DC
8891:102B8000609C86865C57B20AF1DD334687B2E2B0BC
8892:102B9000969001BFF5A64ECF195B4474355ED0DA2E
8893:102BA0005C93F79B7B38CFCFE83DFBD3C7D67BC088
8894:102BB000EF25457CDF8E1D2ECB417859D4DEBF48F2
8895:102BC00065314F5E0ACF3BD7C10B770ABFBB0E976B
8896:102BD0006D45BC1DEB53C382946DE3C3B8BD0DF0CE
8897:102BE000FE4C951C560CE4B3220E7F85EED77DA9D2
8898:102BF0007176AE83F697A5E06854A6F6133E4C4670
8899:102C0000FC38B706DA57A5DA3F81ED018E3D080F93
8900:102C1000F55B73D48BF34418CD33123DBCB04EA793
8901:102C20007E83621DD7FCEF30EDD3DC861689CF2B77
8902:102C3000E06BB0C36795167C238D7F4CC0658D6FAC
8903:102C4000CDF7C4BA10958D4AD523F7E2BA8E687CC9
8904:102C50005DF38DC77723FE8E78C231A83F79DDDF23
8905:102C60008CB91786B862FAF3973FC370BEE50FDFE1
8906:102C70008EEB7A2E8BD6F5D487675EBB910D9FF7CE
8907:102C80002D81879F9E9B3F44756BFEB9A6344602FB
8908:102C90003AAB34A5840BE8E558FD571EBED7C07A81
8909:102CA000BF89F2A4D23C664A504E846168BF99FA4B
8910:102CB000A78F419E554277E4C7490D520BB67BE280
8911:102CC000C687BE741F3CFAA98BC37DC55F72B82F3F
8912:102CD000BB7EED9308EF6537AEFDF93350BF02853B
8913:102CE00020F0DDA537ED5FF377F0CF6F2CFCCBE55F
8914:102CF0007B18C9855836C0916B4A0CF777D9F7DD38
8915:102D000036B972EC793FC99542B33486FCB7AC4F03
8916:102D100022F9DCDF08721FDFFFCC1D77237F3D2007
8917:102D200099D4FE59771CE5C3311763288F971DF797
8918:102D3000C6915FD8AA6524AF2396BC36F397DE0B05
8919:102D4000E3BDDB60C9734EA7F41ED6F7AEF98BED79
8920:102D50005743FF33A62B8C62D392174E3CBF2BF008
8921:102D60001BA92F273A58A6265DE10CF4D0DCA6D883
8922:102D7000E4767DC349A2AB6550B2343E9D2BF86C1E
8923:102D800059C32F047FEA24979CF0BC515B589C895F
8924:102D9000EE4E09789282DEDEC5FDBE0CE1835E4810
8925:102DA000375D4A5C4993D3F0E78A4CA07A0C59FA14
8926:102DB000962D76382DB9DD12CBB6E92B90BFFF8268
8927:102DC00072B3B92DDFF67C6E0EAB9DFAE9E4F01F0D
8928:102DD000480E27258207F42FED7F242EC5512E5A49
8929:102DE000FB7387D89F4805A3F5FCEA80148FC1FECA
8930:102DF000FEEA8858DF3E29AE4844AFE6690F8E0BE5
8931:102E00007396A7F6FF76B1FFA9FDE3F8B1F095D26E
8932:102E100073B99B9200428B2F5282F2DAE21F0BBFF2
8933:102E2000FD7B7E5482FB57D856DA5D87701E508832
8934:102E30007F3FAC3F598CFBF6AE0BF00AFD23871F9A
8935:102E40000B305F0AFE1621073FE8007A81E712C2C5
8936:102E5000599906A780DB857568777B83D4877CFAD0
8937:102E60004B31AFD5EF475B66CC44FCDCD12331C49A
8938:102E7000CFED477A97FD39AC7F753C3B8C53FCAA6C
8939:102E8000B1387009C0B3A2C7BE9FA7B6DC1C40BA58
8940:102E9000F9B02FBF00C7B97D6A42433857275ED5C6
8941:102EA0000CA0B35966AF96CC40571FF66D0860FB77
8942:102EB0000FD59E1BAFC179F629E1F530FEEA23A5B7
8943:102EC000334D4EA744BFAB057E4FAA3D33C7007CB0
8944:102ED0002DDF282779F05E9F323B9E417E7E5D523A
8945:102EE000880E56B7B9655CE748F4F261878B2570A8
8946:102EF0001E3541F81CA9DD077D2DF4BEFF81C21BE4
8947:102F0000D07EBBBDDD45F2E2F63637D1D3EA0629E5
8948:102F1000CEA414BFAD10F0AEDEADD0FB93A644F24C
8949:102F2000C3DAAFDB05BD9D3C7CD52BA8EFCF80FC81
8950:102F300041B93B63E30FB54B000F2BB67079747248
8951:102F400077EED27B508E087D798718F7B6B862E3AA
8952:102F50008F95EDD9B6FD8876E5DBEAA78FE4DF58DB
8953:102F60008774DDA590FEBC65E3635A88E493DDDEDB
8954:102F7000440E9B5490B22F4FB0A105D748297AB286
8955:102F8000E8E7D636B03703C3EDCD962312D9A317A1
8956:102F90006D67B6819D3971B89D69C99108DA67E599
8957:102FA000293962C98DBB94E8D820C0F16B57F4B2BF
8958:102FB000FC72921B0F48B54827FA6FD1AE6431A559
8959:102FC00016E5DBC5CA0B5AACC547F0F75E07D0550E
8960:102FD000067A9D817405F3CCECE9CF48CF33248386
8961:102FE000C64BD1CD2D01E25B1C14E068F6985D085C
8962:102FF000E72530B1B79A4AA6E4F15285FA668419FA
8963:10300000E8E1D45A297EA894B7F3A13C05B8AE8173
8964:10301000E7CD5D97C7B7496817C21FEACF366E770D
8965:10302000433BD39F47CF4D09CAA2F6D297717F2E5B
8966:103030000101A055F3F6380FD8598412689F7057D4
8967:1030400053D75800CA62E827F3FEF41EDB05488E0A
8968:10305000C769BD383E8E53A1C4D7A09CB1E878990A
8969:10306000903B20572B55A0AF66961546BDD9DC5630
8970:103070007E5EFBE586B05D7EDC5467D703734DBB97
8971:10308000FCBF79F625B6F60B22E5B6F77FB6E80A5F
8972:10309000DBFBC5D1AB6CF52FAFFA82ADFDD2D619F3
8973:1030A000763FE9A7B9B49E35822F4782FB75212F61
8974:1030B0007FE2B04FADB2E9FA44CDDBB04F6C9D3B3F
8975:1030C000FC381427E6B0457D6972C5274B84CFDFF5
8976:1030D000009B70FFE04F1F131E437CDEA6BF70B73E
8977:1030E00066A23B4DF4437309ED2567FB138B619E8C
8978:1030F000B47EFF26494487E7FA314FCF2F01E4160B
8979:10310000E0E41C40FD9D2C5982FBE6CE35E8FD5DD8
8980:1031100072B200EBBF61437BF3717F7DC962E49FB4
8981:1031200066953D27E560BFB0C70DF38135C4DA80F1
8982:103130003E5ADA7E741CED38C908B22558F7F812E9
8983:10314000C8DFACC3F561D2C23BF0616F28FAA104BD
8984:103150007048EDFDBF97F0FDF799817A98258B7245
8985:10316000D17FC4A9D2F9B069066B457C9D68B4E3F0
8986:10317000CD2BD6F17349A676CF31F3B7C8472725B3
8987:103180009DAF4FC0BB4D32CFE27C16DCEFE6EA1AB2
8988:10319000FB74702B722DC2FD23827B432B4B662B5D
8989:1031A00023C37D0533DDF2A8E1F09C656656A6E7F2
8990:1031B000B3805D333DBFDCCD2AD15E3D216585D72F
8991:1031C000976239F48F5F03BE8A7DC3177EDC184E89
8992:1031D0001753E55C9ABF59D8BB85ED52221BED53BE
8993:1031E000E621FB95F53C647A50AE0911D7D2269DB5
8994:1031F000C4F5B38E4633E949AD9719124B6F776E1C
8995:10320000DFDBDCD4DE923796DCB2F069C9154B7E89
8996:103210005978758E3F929CC1F1D43C843F3A494E17
8997:10322000A7131DF03101E131AB71FFAC7D033732E3
8998:10323000E6A91E79DF2C3905ED18FAFF23ED17E01A
8999:1032400089EC3A5798119EDE0D0E2D7D0AD63DD0A1
9000:10325000C6F5F5BB458CECC3336D570DE4207E3CC1
9001:103260009E0AC44F219F8A150687D6A17CF5A9899D
9002:103270007E84AB50E82F2FE3FAAB90193BAE46FFAC
9003:10328000BEFDE4126C67ED4FAED89F66D81FF447C1
9004:103290009A7D43C56827B951AF413B37C85D94CB90
9005:1032A00085EDEFFF07EAC542875E4448583A1C594E
9006:1032B000553BAE36D2C7FF6823DA97D6B8D4217D06
9007:1032C000FF83DA49C46F61FBE6BB95806D7CE963DF
9008:1032D000C48390DB68769D9BA714ED5539E10EA45D
9009:1032E000E8C20997D56F243A61E9F394DBEA644FA9
9010:1032F00038EBEEB06693CFEFFEB13CA7D5771E7AE0
9011:10330000738EE7A46F271F083C7C0A3ADDC4E9945A
9012:10331000CB058B6FFFB3E8346AED6B2CF78E23A8D7
9013:103320005FBBB4F02C03ED84A11F723BC16D1C4246
9014:103330003A8B495995F03EDAA192DD68D915FD6BBB
9015:10334000FF7A4B193C3F512B931F71623DA7FB3D08
9016:103350000F707BD4D2DB51A1B7D12E40BC82DD30BF
9017:10336000E0E6A507C7F1AFBFB95402B83DC650BFEC
9018:103370001BDBB71964AFE6D4C5F54628E315873CD7
9019:10338000E38C945C4AC6F2F396C37E7D2BD7581625
9020:1033900021FB3A3A7AAE3FF5FEC732D74FD34A58AF
9021:1033A000DE6C182FB9550E3F08FD932EBB1EB3CA15
9022:1033B000350AD797492F2B413F78A476438AA557E2
9023:1033C000758DF665FEC071DCA791F6017640A738D1
9024:1033D000E6393AE478877968FCA4DFAE874E0A3D87
9025:1033E00064C1FF09F4EAC262A08FBD5266B83F1201
9026:1033F000E3459F030060BFA32A3333B573AEFB1FC1
9027:1034000044BF84ACD27C3B2A76CEC6FD8EC5947078
9028:10341000FA7E58E55F285C7FE6CC6DC86D84766CDB
9029:103420007DE67679A2DD63F7652D42FF0A50A7623B
9030:10343000BC2614D3E7CDC678E4D4BC49E863FF18B2
9031:10344000F50FCCBB3B72466FF17D227C14849491C6
9032:10345000F1F1A62CF37D74F0ED1E70D7507E262579
9033:103460000FC55F5A62EE8C7C6CC929A73C72EA39A1
9034:10347000C934595BF570B9628DFB49F519C8872CC1
9035:103480006554CA6E3FA7CF2E961E47900325328BF8
9036:10349000F665F04FAF56389EFA633C4EA19A32E97A
9037:1034A000AD994A1393004F1B828CE4411EEE35F216
9038:1034B0006D038B030A583E0B0FF8509E046596204F
9039:1034C000BFD5E9079A4DE8070639684C1F55D65F06
9040:1034D00008CF83F357D239038B7079ABC37F9C8FAE
9041:1034E0004CD2176E81D7686C12C539F39AEC72DC36
9042:1034F0008D7E20C847BDC1F17CFE4C3A6F70B3B4DD
9043:10350000E7B08EAB147FF03498F6AC9AD5207F5696
9044:10351000EFBF6AD76218BFE6919BDFC672F2C17B2C
9045:10352000F2BF0465DDE3BB6EC6B2E4B5E8D84CF18A
9046:1035300054AB044E61721DC0E763863B67E476C6F8
9047:103540007A25827635EC6307D24332569E85F4BDE8
9048:103550004AE1FCDFBF400B607C46DDC2E5AA3A1FB2
9049:103560009047F4CFFDF4E6943F4D7E852AFC24A5D8
9050:103570005DA13842522FA378CBA12DB28625C8D9A0
9051:1035800018CE63CDDF2BE2D49D22DEEA84AFB76490
9052:10359000A818E5E089F51F917DA8E859E1D9305FC9
9053:1035A000979F95101C225ED02CF62FB9B6DE931E85
9054:1035B0002F52849FD37174CE80817430A084BD0655
9055:1035C000F18D86E346B74C67187F99A58719DA1302
9056:1035D0009DC2EF517C26C37DCDD6D94CF46BE195CD
9057:1035E00016C2FE552C9CC0FEEDFD885B58AF793BA2
9058:1035F000F2C10FAEE576C88952BBDC0612EA823D05
9059:1036000065B38AD6AB489B4DC1495721CDFF5E2992
9060:10361000107295D3EB1BB5531EDB0674F09CDBBC1C
9061:103620004719F509F8C821D77F006C82FBF6A8641A
9062:1036300097E75679D0C9476D12D985AAC9D73953AA
9063:10364000F9B011F5E446B01B0B8DE1FCB2F1754603
9064:1036500076E346E0BF586926FEA99650465C2CFFEB
9065:10366000E4B5E74A18C7F8ACFCF3978A38A713FC0F
9066:10367000037496403BE651C9E89C02EBFBCEBEC604
9067:103680001F4F81D7CF1E58917D0D94DF8B6FBCFEED
9068:103690001A98FFF6C7F764E33E3FFA2AF0D379FCA5
9069:1036A000788B9F9AD1863D4F9CCD586BE727637DE1
9070:1036B00005F1D35B0AD75FFD0B7EF7C6D5FF9F9F51
9071:1036C000CEC74F6F2B409FD3FE74B6387A1EF9D603
9072:1036D0005CC434B4B7A08D89741E0DDA4B9F9A4533
9073:1036E000F85EE7E272CCEFF272BB23C4DF3BC7FBAC
9074:1036F0001BF593C70F16947F763E5DE7333FFA3C88
9075:10370000F81DE40EC99B13E3EC7CDFE9E274F72BB0
9076:10371000D7275EDF3B5FF81CD607763DD977D7A960
9077:10372000CC403F60E20B1E1216AF8EDB780459626C
9078:103730001A3C0FE5F1F7EE3C929771B46386944A18
9079:10374000EA6F326EC737D56C3EC2CF25062B168185
9080:10375000BF3C07FE85F6C8753EEE57C0382C04E323
9081:10376000AFF6468BD551341EF997AF3EBF2F88F286
9082:10377000E5758F5982CF5952CDC5F301CBEE18991B
9083:10378000DF55763ACDCF7A5A6304C7A94B358A57AD
9084:10379000A2180B407D6BE9A514A764E1D87109EB71
9085:1037A000A37486725C094616931DD2E63666417D87
9086:1037B0002B1850B120D12DC94DA5BD37144039006B
9087:1037C0007609BE5763733D1AFA2FA3640C42337710
9088:1037D000DB47E4779F28E6F2B6630AA3739A810772
9089:1037E000FE6DA98CF64EBB9BCE2DC06E247E8D0A3D
9090:1037F000B9910C4E0FB5A09F51A48525A86F8AFDE5
9091:10380000E2F8D7B83C313D93D3E3233CDED112E25A
9092:10381000FEAED3EEDBFCF5CBDE3470BC1FBED6753E
9093:103820003994AF3FF9F3D72F87776F7CEBB51A8CBC
9094:103830007BBBEB345BDCD1CD8C37D1DE029F29A181
9095:10384000A17C8E9D5C829B99F2EBA418E2275AE33F
9096:103850008FE37A91B7113FC9290A3F5F84BF10C037
9097:103860001710F075074F55D13CB1F7FF2393BCA754
9098:10387000BFC9428F40BBCD79F7C7518EA4E69B44A8
9099:10388000F2290AF209FDC8A8AF67C91A9ACF1F7EAC
9100:1038900010FBFC11767572EABCF0D096792D88E7A2
9101:1038A000B90B3C3AD2993BB6F96EA473E73ACFF81C
9102:1038B0001EBC144373B6F9814FDC159AE925FB97BA
9103:1038C0001DA6FD104D2CB8755020187780FECB56E4
9104:1038D000B00CFD0DE88FEB047986F6B6D50FC8D88D
9105:1038E000C4F59EF14DBF94E2FD225E61F5BB292631
9106:1038F000D139C14DE5C006E5C3F1B4C127FFE46B82
9107:1039000078EE12537485D341A8220D6FF8678F9B10
9108:1039100071BAB86C9F5DEFC2FC0B4BF17D4C217A04
9109:1039200071F2CBF8B8BDFD06DFF9CFF587EF27C7F9
9110:10393000F344C16F567F0B3E8257CA145FB79FCBCB
9111:10394000DC5467AFCF1D868FF3C3355DB59FDB3485
9112:10395000F8ECE3CD0CDADFCF2EB2D73760FCE6937C
9113:10396000ACDBC1774F8F31BFA37E06BFDE92BBEFCA
9114:103970007B227F4BE3A86186E3F42FD83B7F1ED0E8
9115:1039800041A1CEED8EC2F90B1B726B504E31916787
9116:1039900092D9FE2814FA5E697F49C9417FD4E4EDCB
9117:1039A000934BDE9A9183E7C5758CCED3A3EA3DB1E4
9118:1039B0001C23658FF4ABE55988E7CFDF1EB9DB9B8D
9119:1039C0009E7793B2471E78D5A8C9608FA8F748267E
9120:1039D0008C336B09D82355E9F648AB8432287B0930
9121:1039E000D823647744DF437C8D6497FCD8B2EFFD25
9122:1039F00099EDEA3FA85CCF829EF9A7CFA267C6796E
9123:103A0000CD7F513F077B605A89B13292810E3F5082
9124:103A100079BCC3D29F8DC1848267E7A03755173C1C
9125:103A2000BFB62EF9128AE30E7D6710D70DEB71B980
9126:103A30006A3FFD7ACEA81C9E892ACF8319A9DFB7D9
9127:103A400046F057BC9A57D82DF6FDEE5FF08E2EA3A8
9128:103A5000FF027E0CFA2F495FD9368C0B9E89A91480
9129:103A6000AF53E7AFDC3D17E909EC6C4ECFE7B7AFDA
9130:103A7000AF1D926D7C3CED6C968DEFEB99FD9C6ECD
9131:103A800086C77E4ED7A8DBCFE96685ECE774730C5A
9132:103A9000FB39DDF595F6733AA77D3F73B4EBBFA70D
9133:103AA0007D1F6A64C44F17B0EF819F6E427A1A89F6
9134:103AB0009FAECB37EE8F64D8EF6A8DDBA9ABBD919B
9135:103AC000054877D30C6ED74563EB291F302F0AF2D8
9136:103AD000A694E28614F7B2E25A56DCCBCA0BB4E2E3
9137:103AE00059CEF89515F7B2E258528CC7AD9A3DD130
9138:103AF00015086F73FB4919E588FE1CCC838C609D0B
9139:103B0000E30D8BCF7179D0D29E392EE78CBF8DD843
9140:103B1000EE53F2D5E7A01FD6E37A2DFD007CFEE040
9141:103B200067E173905BDB70BC7F417E1F45F2A49B15
9142:103B3000F6AF02708D763AEC838671FA05A7F763CB
9143:103B40003C4E3DEE26BEBD58FF17131D64D8B42869
9144:103B5000F8E018CF8AC64A49BF587C63F189D33F41
9145:103B60001EC61FFFD5FC7391FE31F0CFF75CE7D185
9146:103B700047C01FCF23BEA75572FC3AF9C1A27F20D0
9147:103B80008984548DFB1D4D607B8BDED98B6113E1E5
9148:103B90009C28FC9A13A335F22F4E3CFFEFFC1CF639
9149:103BA000794F789C5823BE9FD85D10DF569AE23338
9150:103BB0008B9FDA3DD11FBBD2F240AC7CC7C31EF352
9151:103BC000757C1E52FB12E8AF8466B3F00683F8ECF6
9152:103BD000187FCEF9D41766143FFDCC7ED95E571CF2
9153:103BE000CF875AA4A1A58CFC56A621DFAA429EBC71
9154:103BF00098153D89F86C9E1E29E1F43434CE077087
9155:103C0000FDA243217FEDB3F253F348F83F878FE8DD
9156:103C100090AB76787E40BADC42F9160A69F10D5213
9157:103C2000067925F01567E131B83ED8CF7F473CE6ED
9158:103C30005531899623F8B8D963FEC1F5D9EC0F4503
9159:103C4000AB4DF131E0CDA3A15CAC06BC950FC7DB59
9160:103C500049175FBF93FE426A5246FA0F811CDD206E
9161:103C6000A59D930ABC58EB19493E5B749A76DE1009
9162:103C7000D2D2D7FBFFA85CB6E4E5E59EE864DC079A
9163:103C8000B71911F2CFA4FD75CA99E176904CE78C73
9164:103C900067C0EEC16E172B5FA79DF5E261099B7AA5
9165:103CA00056A1F2DAB37478C2BE78369B4AF36C3E02
9166:103CB00095F56773A99C7EF6122A679C1D4D65C316
9167:103CC0005900064C9CC6B3A554CE3C7B0595B3CE9B
9168:103CD0008EA772F6D9ABA8DD9CB393A8BCEEEC1707
9169:103CE000A8BCFEEC142A9DF68FB15E25F96DC92F94
9170:103CF0004BBE3BE5B725FFFEAFC9EF58C345D93FE3
9171:103D0000A0FFBEAA9D477E8F242F80AFEFD3D2E5C0
9172:103D1000444A3FDFAF7D06BE3E2EF814F8F73D8CD7
9173:103D2000C378C08BA3385598C7A9028666609EC623
9174:103D30003E6C025BEA2F8D9CC4B841F3028F1E03D8
9175:103D4000B8074A35924FDB821A9DBB6D96F4D15C61
9176:103D50001E2413487F3B431A8DB7ED8F8A17F31744
9177:103D60005E1A5510C079BAFDB28EEDBF959BDC7717
9178:103D70000B9EE34F61E14330DE8A3D7B3CE97EF8F8
9179:103D80007E340E00BE40EC69C680AF378EFADD523D
9180:103D90009CCF3795513C064A3353BED837DDE27C81
9181:103DA0005A1D0A219EB6FA64D207DDBA47E4A1265D
9182:103DB000075AD0CFAD93D9369877C3E877B620D8D5
9183:103DC000EAB8B21D6550DF5957E6C54D7AFA950F2E
9184:103DD00042644FC03B0405CA8428CD1CD89F4E6F57
9185:103DE000D838DF799B620CAD4362C5FEEEEA91DB09
9186:103DF0006DF20F84903E3A264DAEBC05E6EF9D5421
9187:103E0000301AE7DF5E73D4860F45B7C753140C38FA
9188:103E1000A21F5E97A4B8DA06D9D85106EB0B887CAE
9189:103E20006B00B33292967760C1A184611D1CAE8491
9190:103E3000C2D7C30AE0796E5D2296E4EB3531EEEA33
9191:103E4000F32543E82F2A75A729DED6E94F2EA2BA1B
9192:103E5000030E6BFCDF6A565E00E71B9FE09BE649A2
9193:103E6000DF5E4479E4551AED5BB76B6801D6636B8E
9194:103E70005DECF10CF19B0D829FB7559E3F2EA3FA8E
9195:103E8000EC70747BEDFEA205CFFBA274C2D1EC1ADC
9196:103E90001A9569FF3EEDFC175AF7E73D5FE708F911
9197:103EA0000397BBEDFB1010F2BC79CAB743782E6EB6
9198:103EB000C1D329C13ED47CFEFBD03C85CBEBCF7B6C
9199:103EC000BDFFD3C6FDBDC6E32AC0A7B3CB31CE38F4
9200:103ED000667208E3B53E2B1E1D8E537E5200E3D161
9201:103EE000D4CB203DA4EA7C0C456509E44339FBC3EF
9202:103EF00004EE9352AD190AC9D9CCFBAE8437515E9A
9203:103F00009B933F2DB8E96FB2301DE8FCD06BC5A77D
9204:103F10000D7532BF2F81F15F8559E7B33C3E6DF5DA
9205:103F2000572B648A4753203B6D1C15F4309EE328C1
9206:103F300018A7CE1B3EFF7753F4689FBF88C7C715ED
9207:103F400095FB81EF491C1FB15715CAF7EC7A9ECB40
9208:103F500037769C91FCEEAA35E85C6507FC8FFE4342
9209:103F6000ACD61747BA551CF978672AA787508E5ADE
9210:103F700071719A8F9F0F509C1BF314296E6EB00ABB
9211:103F80007CDF2D40B3C651ADB87CE59A49D8CE6FE1
9212:103F900030CF73B03E7F1D4B5C02F006DDAD5B2F72
9213:103FA0002FCD100FAF5CF38D2761DEDD4F4DFFD5B8
9214:103FB0009350DF25875FAD8376F95FAE23BC3AE38C
9215:103FC000E1DB2A655347F9E0F31DC27D051B9AE842
9216:103FD000E2D61E2986CFB37DBE837CBF5B430AE257
9217:103FE00005F424E2C5EBCC8B4CC77719C2B17360E2
9218:103FF0001EFCDBBB75DE329C17E1C6FCCA15BDF5A5
9219:104000001AEA99E012FBF985BFC95EF756D9E1DCDF
9220:104010002AF6EF42F4EFCC43EC31E72D42BA3D13E0
9221:10402000D418CA9B8D6BAFBE91E4FE76858D2BCDE7
9222:1040300040BF8E75756A2ED2FFDD46FDDE0AD41BA9
9223:104040000D1AE5F574C7BD714CF1DE5E973A37B1D4
9224:10405000D9EF86C6CFB16AE4843B931D2FCEC70249
9225:10406000E219739C8375CF96C9AEE9EEE1F358E38C
9226:1040700075D7BDE5413931D2B84F8F318FB8D19E58
9227:104080008AE65DD4BD8BFB36BA385D4FD1E252294A
9228:10409000DAA3FAC24550DF3C4E267B8809FFAFFB0E
9229:1040A0005A7E9EF8B066D8EE576C9AB292EC869B18
9230:1040B000DCBAE02FB00B27A4EE5B1CF09A2FB8E11E
9231:1040C000B9FA1C8C04F6C07BB9E11B912E1A831F30
9232:1040D000911D756B91AC237DADD8D348EBDAACCB99
9233:1040E0002C8176AFDA4A466A136B35F13C00133502
9234:1040F00091EEE6C01B99EE45240F75029C73C61520
9235:104100004EDA063577512BE5B1341A12F961D70131
9236:1041100066501EB4144754A90AFBCD7F07EDBE3983
9237:10412000C15219FDFDEB54D6A0A5D9E760171F7346
9238:10413000A7ADEBC4B83D41B90AE7877970FE451ECB
9239:10414000BA4FE046FBF8CA947D3C1111996627FFEF
9240:104150001A8D4A8C6714257E4F79DEDF4FCA382FBF
9241:104160007B81556F933EB95F0DFEE52F713FE3CC28
9242:10417000E8C754C3CF1A97F8BA26F649DC5B39EC86
9243:1041800089FC06C7B7E20113357EBF79730B0BC7F5
9244:10419000D2E22A9B9FFFF3E368AF5AF197737977D6
9245:1041A000024E0BEE4D12CB223DEF89FEC19DEE1764
9246:1041B000B364D9DC099F1FDC19F2E57CB5C04F63FD
9247:1041C00005FFE4D55678516E8EC57C1FDC87762EB0
9248:1041D0004F4CF82F3DDF4711CC170CB7F6CBC6700C
9249:1041E000B9A4887B5340D712DAB1CE7C2005F37E88
9250:1041F000260E971B0704FD5FE211F93F93D964EE89
9251:1042000087DBCFAFFC4BB9DE67AD7919EFA17E5FDD
9252:10421000E8FD17855F9910F71A8F8A7B8B2FAF33D4
9253:10422000C8CF7B655D259503EBC2F4FCB57575546D
9254:10423000A6EE57F179F3851DA662500DCFF97D2CBE
9255:104240006E00BCFE516B064A91CFEBF8FDEEEEA678
9256:10425000535BCAC96EE4E7169B8BAA1385E8BF00BF
9257:10426000ACF95077F9FA3CFC9E97395859C0D51CE7
9258:10427000E2FDBFFABCC24917BAB5FF8EFDF6B156D2
9259:1042800086F22E60DAF73B3BECF46FF8FEBB8A2E29
9260:104290006EDF7BF11FB08F5FB2F6FD6A7635FF3EB1
9261:1042A000C3C5C963E4A34A2107C6003F1D007FDEE2
9262:1042B000ADF07CF57C9EE76A8638BF992AAFC7C609
9263:1042C0008BF62E4E426C208FE7B517F3F304EA8786
9264:1042D00079E5F81EC3922FF0F816CB11F9EF63C5FC
9265:1042E00038ABC5B813ABE9DE2E3FFF677D3A963E8B
9266:1042F00096A47A2EF0019641D62A2132C7B041F217
9267:10430000B78BA521AA1B929E85F532295CC6FDF0CC
9268:1043100038E9CF72C5FC7605213F22F3785172311E
9269:10432000D993A097512EC6D5C822942F1BDAB4304A
9270:1043300060E25C9E1CDE9FC372435FCD009E7FC423
9271:104340006232C91FE53996A55F49F61EE9AF0DEB4C
9272:10435000F30E6653BE4692F2DCF77B4A6D7A6AA290
9273:104360006FE1753AECD746914FE782FE2C43FEA9E8
9274:10437000954F07E396647A6F951BFDDAA24C7EFF9A
9275:10438000C31E49C43392A3290E28F6353E55CE7874
9276:104390009F719F87DB358F9666B6A7197B90C6DB2A
9277:1043A000EFD11DE3265BE8FE8CCEE31B592E93F282
9278:1043B0006B36B6F17BFA16FE46835D8BF6F0C6BE11
9279:1043C000F9B391BF63952AE59BC3FA7D883F97C8EF
9280:1043D0004BDE383E78309BC7254A514EF723FE6AA4
9281:1043E000D3F0175CD984F8EB7895E7F7823EF7B104
9282:1043F0000CF98616FE5C3EF6C54CEFADB26394B682
9283:1044000028D3BDE1A31ECB4E4F96723AE1F8CBBA4A
9284:10441000568D646A9F10F82E2963D1F3E1AFDFA3B4
9285:10442000DBC6B5CE7D9511E25D922F4171AE891A42
9286:10443000B733362CE678DDF0FC35C7A369E710BF4B
9287:10444000C421A7A4E2C156DCD8D29BED9EE83F7AF6
9288:1044500046A5F425FB3E23B9CB5EF01CC47DCB7092
9289:104460000E71CA539BE11CA2E7E2BEEF3256F0ED9B
9290:10447000A12D47E7E13C7F55C7C8BE0A3CC3E7CD45
9291:10448000D5595C2EC5EF149812C659AE89E8F56867
9292:10449000BFB9DA9989F9336345DCA6B0BD4F41BA9B
9293:1044A00008C25E164A78AF2919C3EF998CDDCDC8D2
9294:1044B0004F540B67AE5A6F08519A961FA5B0A17E54
9295:1044C0005A5FBB663C5E4A60FD14F5C318F13ED0EE
9296:1044D0003EF3572837C744A294870BFD627EB42F62
9297:1044E000041E0BBC9C6F9737842509DA0783498A21
9298:1044F0004F3AE5FA18C0CF2569F65B40D4D92A2E89
9299:10450000A765F80FF57C7EC42EB7C739EE45071CAA
9300:10451000792FB95E91EF6EC9ED22BEA913D441394E
9301:10452000935F9ED2AF0EF8508655A7FA07ACFA6794
9302:10453000840F0881E8D98207AF52A2DCDDE3D2BF45
9303:10454000F214EAE77A8DE79189FB72D902EF3E74A3
9304:1045500098A1DDC094574CDCD71D61FE5D9A3353A2
9305:10456000E7911F9A5D67DDA7E3F795A18C619C2E0B
9306:104570005BCC6FDDABCB66C69BE5400FD96692EE98
9307:10458000D5E9D677154C96C03C1CDD27531E9DEE11
9308:104590008B907CEA59E0D1F13B1F9AB8A7E712F75C
9309:1045A000C7B3CDD374BF2E7BD8FAF8FD3A0BEEEC2F
9310:1045B000ACAA37CB0DDB3CEB31BE0D6B1F9DF17E02
9311:1045C0005D1DF793B24D1E87481B9FEED7ED985A9D
9312:1045D00066BB5F47F3A01F27E8CFBA67E784EB5CB1
9313:1045E000BF9ACC76DA84B0DD8EB8D0FD3A57C8DEFB
9314:1045F0007EC705F2B33EF1FD3A818761ED1CF6A05E
9315:10460000CBB24347C90CF7EF4C834CDF11C9FD28EF
9316:10461000199921515C82F4BD65E7E5F1A1FEDBD972
9317:104620007979565EBFC3CEB3ECB7DCD9767C3BED6F
9318:104630003E775584FA5CAC9DB70BFF01F4F290D73E
9319:1046400061E73565A60FA7BCC86783BBAF84718ED1
9320:10465000D6FE48C17CB55DB9FCFB476C987FF0D6AF
9321:104660000CDA171FFFDED1AE29FD2A7EFFE6774B5D
9322:1046700019D949561CC12D60DE5524AFA7B07BD790
9323:1046800043849FA0C043137E80AC8670151F477C77
9324:10469000667A316F21BF8951A3C28A30ED3B7E9685
9325:1046A00040A64B5B3115F5783D62250D4F333CF646
9326:1046B000EF0434EAF98E7DB4EFF3B973F007F9F73C
9327:1046C00014E618F67DB7FC24346771BEEB2BED744D
9328:1046D00070428A0C2AD0E5E9AC5261FF0CEAA82F9F
9329:1046E000BBD7BAC86E7C6849D9D62BD15F0DCA3A00
9330:1046F0003F8E1C1A87F651F351D38B76DEF6C874C1
9331:10470000EF3878FF50871246F3F0A9256B5EC57A23
9332:104710006CB78BECA0A7FAE615AC48E3BBCDBB1792
9333:104720002C5C8CEF3B5CA4DF57ECB96FA03488FDA8
9334:104730005DB5E9DF9B6AD9789F8E7EDB1BB5DE8C89
9335:1047400076CCD559DC2ED9A82529FEB4719EC6D0C9
9336:10475000E5DA58523F7A05DA0FD76819EF93DF95FB
9337:10476000E5E6F7F95CAD12CAF7C268E67B0156BB15
9338:10477000B135BFA5738CE06C99A11FE7BA7E9E8C02
9339:10478000F587605F7529454F79829E3616DDBBB58A
9340:1047900002D73790F9DEA155AECD1AC7E93462E7EA
9341:1047A000735761D3685CB7CB1D19A847E22A94758B
9342:1047B0008C8BB8DCAD919BD11EBDDA8514CE3677DB
9343:1047C000FCB06111EE4B58D2259827A84656119D92
9344:1047D00005B318EA8386259156C44B21E83F0CEDBA
9345:1047E0001516FD92CE290AEB34E685BA67494FC209
9346:1047F00005EF3D15D1AB10EF2FADE5DF79290CFAB0
9347:10480000E85E5061849FC315B6BB199A0C1BC105A5
9348:1048100076917F20519CC8C947D6BA9A977239BE03
9349:104820007BED6F4765FADE4C455619E1D56BD8D75D
9350:10483000ED41BD0BE34C35079710BE6BDC2C4EFCF5
9351:10484000EB26FADE55EB22B8764D39F91584EB7775
9352:10485000BFCFA2FDBE969912C2953FC4CF59AD7984
9353:10486000F29B06151E0FE77CE8E43B8B1F9CF0EDE6
9354:104870009C3D8FCEE336B3C1F988EFD85999E868EB
9355:1048800073D11A6F7A5CB455D01FEC03C99798CED8
9356:1048900068BF957F65EB311F76E3172395C81F6FBF
9357:1048A0007BF9BDD5FB966AB48E87E66A146F7CC827
9358:1048B000DF4A747F6AA32B7C08C151F585B89FBB82
9359:1048C0008B2BC2186FFB3B3C7C4EF30F768FFA525A
9360:1048D00025E2F38B7FC8E2E34C51AD717E46F45E76
9361:1048E000EB25386728ED3F5B8176E8127932E54E9B
9362:1048F000AF5A42F2CB25E4F8CB4BF2EAD14F09DCB8
9363:10490000B09C7179C8E31481B5D5FC3E8343EE2792
9364:10491000EAD4DD33689778FCA75EC8BBB1374CAFEB
9365:10492000C775D60BBD60AA99BFCB982BDA170E4579
9366:10493000D0241B16FFC915FA63EC6EC773A117725A
9367:1049400087C5C1072B6E06F9F3A52C61478E10F7BA
9368:10495000D9B5641EF1C319E0078A4B979C24FA8FDE
9369:10496000819C40BBF90D29195A91761E667D67EE30
9370:1049700027221E14314B294FF82D110FFAA9F8EEFA
9371:10498000DC3B221E745CC4837E2EE241FF80F1205A
9372:10499000FC7E98F772DAB771751FF5631C6767CDF7
9373:1049A000028F01E34CD5075F4220BF680EFA44FE38
9374:1049B0003DC11BB4F4D0DCF3C7A91208971BE35226
9375:1049C0001CCE97C5F7E85E11700D08B85E137059DC
9376:1049D0007A10E506D2191BABEA99E461506D95F0A7
9377:1049E000BC17E5457F90E405CF130FAE918C09C34A
9378:1049F000E5048C373ADD4EB7E8EFD4281FD1B17308
9379:104A0000FC47B3F8BDC397D6CEDACF8269F228B29D
9380:104A10007015D25D3EEC0FCAA3681397E351BC77C3
9381:104A2000912657AD781AEC4898F4CE0D1C4F23C947
9382:104A3000970BC99542875CD98D7205EABB51AE04CC
9383:104A4000D3E54A6B3FAE3B887285A5F45030F2C97E
9384:104A5000E4CACFBC65B63889255FAE0636263B3141
9385:104A60000CFAD4FFE9F5E9DB424E5C48AF5AF91F76
9386:104A70000193915EDF837921E8CF8C67740F473112
9387:104A800007299F28B7DDC5301F642B76198DFECC12
9388:104A900042CA07D931DFA3235D3C2C254288CF7D54
9389:104AA000528F97EF8BDE8FF6C2B6093C4EB2E38F82
9390:104AB000F778D1CE7EE9F682009EE3F4E65A7920BB
9391:104AC000FAE25BA17EAA91119DACD8B3C296F7F031
9392:104AD000F3AC3CC2476E0CE40FE0E3E1DBB9FED17E
9393:104AE0000D9E070265C63C10B74FC483D45808E931
9394:104AF000639B14F5501CA651263DD51BE6F92BBD32
9395:104B0000E097E3F9606FC3CE39A89F37DC2A33CA38
9396:104B100017AFECB907E54CC7848506F2A56B74D9CD
9397:104B20009B688E6FF0C9DEF43C523C4ED0AAF9B9B6
9398:104B3000A128CD1C0079B3D734CE777F54157E1FC2
9399:104B4000F6779F270FBE3337341AE304BD8D0B432E
9400:104B5000386FEFA848288FF253C6903DB071D4A6A5
9401:104B6000C5187FEA58AEB1743B69D87C41BB7D6DF6
9402:104B7000C519D5069E3FD22173FF32579C4F035F64
9403:104B80005522DED2D78970AA26CF1FC1F52A7CBD57
9404:104B9000F47DD3DC06F00FABF8FAD17FD57DFA684F
9405:104BA000941F6A03CF1FD9ECD717A3DFE884C31A79
9406:104BB000FFDA6CC9E61FE956DE42FD1A7E8E58C444
9407:104BC000F3167A5DE7CF5BE810F2D0F21B47C2879D
9408:104BD000CB714EDDEBB5C7012D78AE14A5138E91C8
9409:104BE000F2053EEDFC175AF7E73DDF4879046BB25A
9410:104BF00025DBFD8A5C2B9FA5714D08E58405CFE67A
9411:104C00000BE48F7C5AB89A1B79FBCF7BBDFFD3C6D0
9412:104C1000ADCFE6FA11F87400EF51764C9C19423989
9413:104C2000948AC70C0D94A33D27EE335AF9232E9D89
9414:104C3000FF5355F977EEE4EC22FACEB23A9DE78FB6
9415:104C4000D05F863C904D8CCD467F4715F11B279F4A
9416:104C50005E087E67DEC8CD3EE137461DF3893C1114
9417:104C6000E6C83B51433CBFC4CA27E992607DC154AA
9418:104C70003EC888F33AF0365EC8FDF71CFD87AD3BB1
9419:104C8000CCEF575AF927C3F248A6CAFB710B86E549
9420:104C900091887C949E5C23CEF3C4795E09AA4D8CE6
9421:104CA000E70DCB23993A3D84DF949C5622FADDC070
9422:104CB000E8FBBB3D5E5EEF9DC3E2F8BDB35EAC2397
9423:104CC0003FD532CA6B19965F32750DE14963916524
9424:104CD000FC7C879FF75B7870E6975C90DE2E9047B0
9425:104CE00012F459DFA388D03C3DFEF04FEA083E990C
9426:104CF000CEE30BBE743C9C3EFE253E2E277B441E1D
9427:104D00005E4FAE3D1FEF3EB12F15A29D737FF52282
9428:104D10004ED75DF53AC5DDDD0D3C5E39EC3B103517
9429:104D2000767FC019CF3B21E4F585D6EF8CEB6D1B68
9430:104D3000E1BED9021FCFE37A68C921CA8B3DB30A0D
9431:104D4000F42CE0EB61CC67A9B9F87C96D7B3783E38
9432:104D50004BAF51BFF052D463518DA13CEDC57C16D1
9433:104D600078BFA161847C16114FB4E2A323E5B3E4BC
9434:104D70009E3B8FB7E7B3F4DECAF3597A7BF83CD693
9435:104D800078BD0DD564678D34EED3634CD987FB5F56
9436:104D90007171E7A7D34A227F86F92B3DA59AFEA021
9437:104DA00081F4C2E9B9AB5123FAEE72713F36369AFB
9438:104DB000FBCD4C8D8716429B2DFEC4228A278BBCCF
9439:104DC0008C5E717FFEEFB30C9B7DDCD9F8DD10DAD1
9440:104DD000F540872FEB9C4F689C7CB5743DD880CC08
9441:104DE000ADB798E8530E64F338822B746CA02E8D07
9442:104DF0004EB7087D87F891013FB9D2397C45E5026D
9443:104E00008AEED3DF1A419F6F64F3F92D3A64EAA466
9444:104E1000303FFF631528472CFF75583B0F6F374C09
9445:104E2000FE38E4480FE6B761C592273758F2C44E02
9446:104E30009796FC600E39734E9ECCE176FA39790272
9447:104E4000F2033F75E69443BD5EAE2F2C78DC2898C4
9448:104E5000418EBCE70ADBE2344EB973213EFABCE571
9449:104E6000CE4BD9F9C2FEE0722788B4817C936D9D48
9450:104E700023F27B0F67A63E48F2D0A3F2757B228C0B
9451:104E80007E2700EB28CF3D788E9251AE574B146FA2
9452:104E900010E722F9E2FB830FBBC2949FF630F03398
9453:104EA000FA79130CA77D76FE7305E779D2C36BBF41
9454:104EB000C6FD33C037FA5D172B872C39F161365F99
9455:104EC000F739FA32399C167DA5D1337D5FC0A25FD8
9456:104ED0006B5C8B8E193268C179E855D03586A32971
9457:104EE0004E1D93E21807B1F2C8ACF1DEF0717B649D
9458:104EF000A4FB5556BBEF587ED7B978B01ED0299F7A
9459:104F0000AC87EE9BB32E4E7F73D86E754D15E513AF
9460:104F1000A88CF2092225E8CF1CF6D9FD622B1F6C64
9461:104F20005A493884726283B0D3AD3C322B2FEDB036
9462:104F30002FD73A67B6E5A76D18E17EF69BE7F073C9
9463:104F4000F1DF3FC1EFB6ADF69A8FA35C047C99E226
9464:104F50007B4E9487668DFB5D81A7D73DE693BECFE0
9465:104F6000707FF2C52C7BDE55A7CF70C405385E2755
9466:104F7000EAB17ABA8F17E5F7AA9CE7EA23DD7F75D5
9467:104F8000DEDB3B77FF559CBF377BA22F13FC2FF254
9468:104F9000FC373D1C3DD8C93EBFF51CF09A3FC1F11E
9469:104FA0003B057F4F0BF27B3BEF7BA26FE3F3EB18EC
9470:104FB000F7AB2D3BE730B683FEFE97416A03BD6C2D
9471:104FC000AAE5F45A54C9E8FBE3D35B797DC752FEE6
9472:104FD0005DD3FED7F9BD8F6D51FE3D53E8D7270352
9473:104FE0005E768CE7FA707F15EFB71FEF37219F567B
9474:104FF00070BB2B0FA3F70A8AEB2895D36B7ABC13EF
9475:10500000E0FD81A532C545F708BE083093E21CDB00
9476:105010002AF93CBB2AE427C4F76816DD02F5CED98D
9477:105020002B27E3FD92ED229EB26FF1CA2730AFEF3E
9478:105030008340B9A0BB04DD7BED397E1BC5471E5AFA
9479:105040009227AD8435EE3B9839BFA5CAAF8A7E3131
9480:10505000B788278932A161B9D51479ABAD4C7C8F63
9481:105060003DA661FCE999419EB7DABDFA99633351D7
9482:105070001F57CA9467D63578D47B19AEBB8EE7F537
9483:1050800014A90929DD7FF1FA5DDC4EAB39EA31AABA
9484:1050900086B77F66F028D1DD76C0BB92E6FFC902F5
9485:1050A000CE6EF427A0DF5E57CFC04C68B7775C9E0A
9486:1050B000143352ED46FB39FF752F91C577E8197D02
9487:1050C000C7A1D33CE541B9D989E71FD0BEBBC6CA49
9488:1050D0004BEDA17B597BE74C9E8379E2DB6EE0C10F
9489:1050E000D2AEF021F2937B6673BB6CAF04ED605FD0
9490:1050F000F6B568D7D33DA6561E278232639CA81703
9491:10510000138111AFE2DC8E525F60DECE86BE019C61
9492:10511000A7A88E7FDFA2A82673FF17026EEABFCF73
9493:1051200015A3F8E748FBF7AF3E8ECFCE2A7E5EC0D0
9494:10513000589CE252BB85DFC5D4A891FE9DD0960055
9495:10514000C7CF4E1733315EE6ABD348AFCB6183ECAC
9496:10515000503FD88F188FDB26C516637E486C92C6E9
9497:105160001E278C98DE7118BF9B901746FADB24250A
9498:1051700042F85DE5D8381EDF3E1AD949F7AE0E80F9
9499:105180001D4DE16096203DD51DCDA3FB504723D595
9500:1051900083D4DF57A1BB2D8D8279F3F4A148C626B5
9501:1051A0005DB6692BDA359D53641DF3363BA5FA28AD
9502:1051B0008E17CBF5501CD935651EED9F6B549E9410
9503:1051C000AE8F6EF473BD30342172A31FD6159A7260
9504:1051D0002A17E396DB6B5FD987FBF7C8FD1EA2A3F6
9505:1051E000476A07EFC679F69FBDEA7894F8929FD791
9506:1051F0003D5A7BBA14ED9E5D4DA772117FC5189F75
9507:10520000037D585CC1E368A801C93E537BD8CD80BB
9508:10521000C7E2368D1969FAD8CBF8791EFEF92693C4
9509:10522000DCA3BF67064F795A70BC252C7169809E3C
9510:105230007B309E65C999E23A96280079B87FC53BD4
9511:1052400031CC937B646201DDA32C12EF4972C278EA
9512:105250002562BCFE375E598FED1EAD2E30505E14B8
9513:105260000F0CCD4325515C759AE26C21EBFE47D4BF
9514:10527000D87F2BD1A74CDFA92C0EBFF317B88E8097
9515:10528000AF8FF41CB4A7B899731D8189E67D7EC0E9
9516:10529000E337A5D657C70553FE18FD213FDECBEFF8
9517:1052A000651767FDC35C252DDFB644C40536498309
9518:1052B000B3C92E7D80DBE163599CE45C7155EC6ED3
9519:1052C0009E6F1BA57C5BE7BCDBFDE7F4AB44F7A856
9520:1052D000F39BC4BD12FE3B3625E2776C9C741F0A1B
9521:1052E000E557755C95AAEF8B9E22FA7F5A33EECA7A
9522:1052F000F4BD877D422E6C12FE9835FED85C3EBE12
9523:10530000557F54E7F4F8F4CB79D757C17AFEAAADAC
9524:105310006C12C63F778CE0C7AD0C70FACB1E000B49
9525:1053200007F440FF6BAF79319FE56999AD4239557C
9526:105330005F95F024AB041E617CF2C560FC03E16F55
9527:105340007B502E7D35504970AD98CAE3069D550FB0
9528:10535000D2395048E77A07F913E5BB2F149330EEA2
9529:10536000BDBC86E98744BC2506F8A7BBF3324BE5F4
9530:10537000F56FCF253F077885DFABC1DCA4C9E2F725
9531:1053800027CAF19C68D3DD227F56467C778A7980D4
9532:105390006F699E0345629CFBB8FD8FFE05F62F17D3
9533:1053A000F394D77DF76BA8C78B744E1729F8FA3C96
9534:1053B000045FABCC083E35F12AFAA1DB271518486B
9535:1053C000370742E1B79BA0BE7C914AF1F8F21A0E72
9536:1053D000C78156997E0FC85FA71DA4FB6326E88B83
9537:1053E000347C1962DEA29A8484E75A462B5F17B494
9538:1053F000F3A25C34C2000FD40DB1AE73F04FD208EB
9539:10540000FE22CF20E6169DC3C34A1C0FE877651D18
9540:10541000EFE70FF56D4139B6BC8EC30DFA9DE0295B
9541:105420000A6B0751DF1785F878CB013F87A4145C1E
9542:10543000D9165C7532E55F15D56807D10FCE16F029
9543:10544000AD0C7378FA5F3F3520F1F10C1C2F5BC077
9544:105450009B2DD64F09BB05423FC0784FB912F57856
9545:105460002FE7D414661CE2B3513CCB7ABFAB15F0E6
9546:1054700000F8F18B79D86E37F1132C31F6B1CC7F6F
9547:105480003FC4488B5B54ECD66C75BFD83FD6C59FE4
9548:10549000931F472A91D765E1D7ADACB2F763356961
9549:1054A000F532BC5FC6E97DFDB5FCBCE3C0046E1FF0
9550:1054B000A1DF718EBF91CEA7188F7505F1BD46FA99
9551:1054C000AEA4DD3E6E716BC174940FC5030FCF9314
9552:1054D000613D45F73259C9217A96CEC93F98EFDB35
9553:1054E0006B12747F367B209287F2AEA4356F3A7EC2
9554:1054F000FF2D7B204AF5EC815693E79F810B938724
9555:10550000F97A69F394A29CE6F974AC55EB43B95669
9556:105510009B0E27BC2F79B9672EF6DF7CF72BA39162
9557:105520007F0B1CFD3D39DC7F287E195A0570FED3A8
9558:105530006BB1BD15DFC94688F3A87C19CB621FC8C3
9559:1055400063284B44FE9D252F3A27BC3329EA13F4E8
9560:1055500043F9782C916EE73B4B683F5EB48F49E787
9561:105560006D779ADA8D146F1A08F0785340D8AB3DF6
9562:10557000CCD84FFABD86E77BF8F039E88FBE9AA306
9563:10558000D3693FFB5818E9B9B8ED4FEE74797D73D4
9564:10559000A054DC834E10DD6B255974BE077C4CDFB4
9565:1055A000373DA0B6D2396B5F113FD73C3AE71509BA
9566:1055B000F159F41CCFD3B6ECE5E93589103EEF7A0A
9567:1055C000357A19F1E708F6A7656F3AD77349FD8375
9568:1055D000240FC6469917CFD7FCAB55CA632D890255
9569:1055E0005C55281780A40B01FE9AD87AA41B23CA05
9570:1055F000EBC66A51AE82F26AB06FD70D94FFD295B6
9571:105600001A776B05D8B5683F0DEEF6DC80F64A2BAD
9572:10561000582306DA8BA73CF83D95EED6E9F988E7E2
9573:105620006722967D999070FCA29F9A642FD6EA9A81
9574:105630008E719809EEC4E8F473BA0373DEA9A6EF7D
9575:1056400089CDBFB87CB291F409C222A7E991FEAA24
9576:10565000A3A45F9EF08F273D64E9154B8FD088206F
9577:105660005F6E117CD465243C12C92BE05D80F3167B
9578:10567000942340C7FE222ECF410E733967E993BBB6
9579:10568000B9DEB7E4678518E71694B7D0AFBBF689E3
9580:10569000DC1B50AE0839EB0F1933F17CAE42C85712
9581:1056A000A6C6249CEFC014FEBDCA80439E56B4F229
9582:1056B00071BA428CE809F4D041A49B034509BA278A
9583:1056C0007EA0F5A8947ECFD4D27781D624C3FD1FC7
9584:1056D00057C7E5E0382157BFE337387D7AB85C3DDE
9585:1056E000A7F784BCDD6A1E65E2BBB019F3B0FE5EAD
9586:1056F000E8F39E8A43E4176CBBF514E1D38A8786EE
9587:10570000443CB4BBEA2D7ABF3DCAEF01EC32A7CFCF
9588:1057100021F823CB35CA3FAD393AA70CFD8DA6E55C
9589:105720001ADA75270305D6F9977721DA93ADABC856
9590:10573000FEF5897D7C28CC84DFA9919F75DFD26F2F
9591:105740000F60FF10F84592818DFA3C6EA473FC9EA9
9592:1057500002E23B3A489D7D35067D07C2B98EEF05D2
9593:10576000F87769FDD1E4C038DA5799AEF4F86A18D1
9594:10577000F99DCBC1AFC36177AB61EF0478BFBB4983
9595:10578000D6D7B354FFFF15E0F96813FDFC9EC2CED7
9596:10579000C5A7B7609C6FE752F19D3307FCF735F65C
9597:1057A00079149A07630294C79CF17BFB55FE2CFE8B
9598:1057B000FD859ABE01B4E703551CAE170306C7FB6F
9599:1057C00020C7634F44263EDA3558ED457DE7B41BCC
9600:1057D0001FC97E7712CF6BB1EB9B0BD58B1D727FF0
9601:1057E00082BBEF3A9277DF94495E31C6E59DC4648F
9602:1057F000037F57A325C0E9A94AC8EB0E57623FE6CD
9603:1058000015743CEB63EB8D145D1489313B5BE58CC7
9604:10581000BF9F7628A0F0FD1FBEEFDC7E10FBFEA42C
9605:10582000C0C385F61FC32C684FF7C5378DB903E594
9606:10583000782BF79FFB126F51DE51D1EC85E4F71CFA
9607:10584000397829F9034555A6EDF735B347F05B2BB9
9608:10585000723CE78D078C248FF7ADEE203F7BDF6035
9609:10586000E67B3105393C2FAD0FE4257EDF64A4F9DA
9610:10587000F51CCE7FFF14107437E71DFA5E469A9E22
9611:105880007D59E859D2B7C52A8B2969790E1304FED0
9612:105890009CFA93A971CFA53544E784BF7DE2FCE271
9613:1058A000215326BC5B748EE7078857588729E890F8
9614:1058B000CE377A58DC837C136BE2791E4EB827F81A
9615:1058C000E58B5A5F3087FB21E7E613FEFA443F87FA
9616:1058D0007B67EDFD74CF11E60B217D483FF88FD338
9617:1058E000741FEA5917FD9EED8C675D098C69DD799F
9618:1058F00090FFDEA2FCA297E0FCE7C3FCFBEA093FB5
9619:10590000B7C77EADF3DF2BFAAA7BB0FB0B501F7A33
9620:105910005661644FC6417101BD9E16F4CA9EE3F5FF
9621:10592000955E5EBDF360FF321C6FD5733C0FF3CE06
9622:10593000E76FBBF10B50BF6DC0457706EE7C7CBDB9
9623:105940003606EAB7C7A53EACFF663AA3DFFB8CE597
9624:105950006914E7FA4D60B06001E0FB83751E665C78
9625:105960008671D2C182F980873BE24FCFC47E773CFB
9626:105970002585916D673CFBF82BA301AE3BBF215100
9627:10598000FED7578E64DBECC2D3B09469F07ECD4174
9628:10599000FEBB91B7B19E99888F3B1FEFA5DF3FB447
9629:1059A000F0F9C1BA4A66A4FD6ED89DDF789A7ECF21
9630:1059B000F0AE6F49F4FB8A77C9FC1ED13F3FEF5D23
9631:1059C000F4980FD7B75EBBD48FEBDAAC61BBDBE2E8
9632:1059D0002DDFC594A63BE207B599F0FE8E0307B50F
9633:1059E00095E897B95933EA9FAF1CB9C226774EEFB5
9634:1059F00053C83F5893EBA1FBF5CC6786E64D18BE24
9635:105A0000CF1FAC6336B8EEB0E2046A5C9B9BD6DE77
9636:105A1000A573FFF72B4714DB3C961D103BC6F542E0
9637:105A2000EC6FFD143FB7F66F8DF0BBADFD5B63050A
9638:105A3000E2D5A1C999E0E9C6FD00787AD6E954EE2D
9639:105A40005C17A272F73A83F6692FE211CA2E01772A
9640:105A5000602AABC7EFF3074C9E769CD764D6E3DD94
9641:105A6000B2BC08AF172C89921F32921D63957B5DE3
9642:105A7000D116F4213B77F4CF52C1EED9AB45EFC636
9643:105A8000C897DEF1EAAC06A8FF4D4E64630EC99BD1
9644:105A9000B0817C67F9E75FCFE17277D3688DF0BDA5
9645:105AA00077E9E4C714CBFFC2B8DFD2954FA03D0120
9646:105AB000FDB7E710DF86E93B5D23F52F585667EB0E
9647:105AC0005FB06C95D57F0FF5F79CBFFFDE65D7D82B
9648:105AD000E75F7687D5FF1182DF777EF80B9AA7DA2A
9649:105AE000E76F5E4DFDBFEAE6FB3B94EBA17CFA0E4F
9650:105AF0006F38E122FF99D1F739D4BC4B0FD1F7931E
9651:105B0000CEC599064DD4B3BEA772AB518EA5E86839
9652:105B1000FA37711D7EE0AE743ACAA9CBB2F155AE28
9653:105B20009967ABE7CF1E636B3F2A52667B5FB8E88D
9654:105B300072075DFA74CA83655C9F9A18E70438B5EA
9655:105B400031FC7B4DF5633CB4BEFB5FF452FDFE6B54
9656:105B5000F8FAEE1FE3233E26DD05FB7EBF16BD32BD
9657:105B6000DD3E86754918F27A468F0EE4D4A63F379B
9658:105B7000647C9EA5F0DFB1CB72737DB9B974F2631A
9659:105B8000B1347C6E29067A80FADB399A2DCEB3B90E
9660:105B90007865A8256D9E4DC5DAA24355FCF92D68A0
9661:105BA000C7EB91BFC3F9BEAA0D5D8AF6AB731E7732
9662:105BB000599D6D1E4FC92A9A27E998C75DB2CA310F
9663:105BC0008F67D121F15CCC730AE964A47936975DC3
9664:105BD000635F4FC91D34CFAF719EDAB4F594DCE139
9665:105BE00098278BAF079E8B797E73DEF5944FB5AF08
9666:105BF00067EC6A9AE7DF1DF3B8C7AE76CCE3A3790A
9667:105C0000F039CEC38AB81FA5B98756D2FEFFC0CBE4
9668:105C1000300EA4B9A37F4D9754FEDE4B71616865C9
9669:105C200062BBFF03D8CCA6FA008000000000000091
9670:105C30001F8B080000000000000BE57D097854452B
9671:105C4000B670DDBEF7F69274773AFB4208378010E3
9672:105C500034C40E840C203A0D41061DC0E00A2ED03B
9673:105C600061C99E74449C87A34E1AA28888DA286A68
9674:105C700050601A04071CD0C0040810B001757006EB
9675:105C800035BEE7B8CC82CD2241884983A8F866F1B9
9676:105C9000AF73AA6EFADE4E079837F3FF6FDEFBE3B1
9677:105CA0003753D4ADFD6C75CEA953D52427819051BF
9678:105CB000841C8CA3E90842BE89715FEDB012F23DED
9679:105CC000FCFD90D03F2F21C93C4D21642EE17FFE89
9680:105CD000C5022924A4D6CCB273364FCD5A08694BDD
9681:105CE000515A4901FDC70A9BF30A8590CE9622E3DB
9682:105CF000ECDC707F6A3AD7279F0CE6B0B6DF93F0F2
9683:105D000038DE7124A78E8E5F16E7C0F9A8F993F5E7
9684:105D1000346F22E4583DC1B45D26338BE9F713F5A7
9685:105D2000740283B5F35D88ED4E4AF49F49345D25D6
9686:105D3000F8BD025DD7F20F64320087F93087AEE319
9687:105D400076BE8CB9BE5842CCE179784CC405ED42A0
9688:105D5000BB4CFE75027C75F531A4D1A43191107550
9689:105D6000BEFD09F9D3BEC96F0B76CCF6318C24E4A5
9690:105D7000CE255BDF826A1F09257DE7D1F54E6B5E7C
9691:105D80002EF7A1F94E3938C369D5F4334D3E06EBF1
9692:105D900036D3FFA09FE96E9AD78C7F57B93E7F0F0D
9693:105DA00091C2F96C42AE72F4E7F8E0E32A7E19F092
9694:105DB000753B5D533A45E13D900E836207E26B8689
9695:105DC00083B555E7E379502601988F144C26B950D6
9696:105DD000928CF5DC504FE939BF19B2D9554CF139E5
9697:105DE000E30111E11839DFE0BE5897218FA68D5FDE
9698:105DF000C9A4FFA5E73F7381BE9C78D9782A5C557A
9699:105E00003AB863DAD8674F68E863BAFB86674FE849
9700:105E1000E0345597BFA76EBAAEFECC0525BAF21294
9701:105E20006F85AE7CF6927B75F9B9BE0774F5CB1A17
9702:105E300017EACA2BFC8FEBCAAB362ED7E56B9A5606
9703:105E4000EAEA7B5AD6EACA0DFB86DC44281C1B7E94
9704:105E500027121385E3D7D6934F5D9304A9E404B8C2
9705:105E60009FAA4F43BA3E5DAF605A0BB4370AF8673A
9706:105E7000B8D94DF1E48909959278421EF68D59B250
9707:105E8000640CCD1B69F9684AEDBE714BBC99842C3A
9708:105E9000712848F762A3910428A90A24A19BAE4364
9709:105EA000A2A63C7889F246890486F72C1783D1BFD5
9710:105EB0007709A14119741DDE4F4D6483D093CFC380
9711:105EC0007C49FA90B4DECB3B0CA4BC49237736382E
9712:105ED0000C389F64C7B80D0E4A0FD546C6EFD5DB08
9713:105EE000D2C7113BE40383EAAC1719AF894E2615DC
9714:105EF000FA61FC52E1EF13E65FC4DF001DDF0F8E95
9715:105F000073AF77D0F13AF68BD3601E247030EB96E6
9716:105F1000A130BE6B037C272DB49374CADFF5AE6746
9717:105F20004F5C41C827F51331FD7D7DF1B3276442F5
9718:105F3000FE583F0DF347EADD9806EBCB313D565F47
9719:105F400087E527EA1760FE64BD17D353F54B303D54
9720:105F50005DEFC3F28EFA46CC77D6FB3155F980CA95
9721:105F6000A399C5C0A7C5C506E0D37916C2FF58FEE0
9722:105F70001C5F8348FFDD867CED4C03BE3E67FD66FB
9723:105F80005006A5B7739F5062CAEE1D4E9174D73B61
9724:105F9000FE5C06C05FA99F124F62CF724B0CC38F8D
9725:105FA000C54026122A7F1EBFC248243A7ECC1B570A
9726:105FB000AD13B3F1BB04A443370EE7545B94FE0763
9727:105FC00012C4D7A5F0A4D63FF9E29F0B67E5027E85
9728:105FD000FA239DC41C14EB18DE5E7602DE2E053F0C
9729:105FE00089F357241C8537FE9415A4F5BF4C56E160
9730:105FF000D99645687A8BA3F814D0C1B96613AEEB75
9731:106000005C6BAC9F401F8E24A48BDEE1C6E651B5CD
9732:10601000D1E2D3CA879AA6789F5E5EA4FBB4F2E26F
9733:10602000DCA197EDC0F7F3D244DF89E1401F2E4E8B
9734:106030001F8CEED4FE6B9AB27D565D3FFAFC399F01
9735:1060400030B109E5BC1277EBD0DEE7392FCD88E31C
9736:106050009CDE38200EC63D5D6FF6C1381DF50E1F63
9737:106060001B37CDA7A5CBEA05B1BE1389E1F9F5D65B
9738:10607000EF3F7B7E843493E36682A0FF7E40EFF5A2
9739:106080007BC58774DE580CF4D12A7F03FB4E4C8EFF
9740:10609000BAEF489857FBF534895ED3D5F07DB36EDF
9741:1060A0003CDA4E39A9E2A9FFC5F02E9193EA3AA94C
9742:1060B0009C1C4A6537D0292566C4B39BF61847FB5C
9743:1060C000EB92AC4B043A8E295EC1720F0C44E9A9E5
9744:1060D000C61C34BA1504771BE859B346AA7CAFDC5A
9745:1060E000F1074A725FFC56264BA1FC2FB4775A2E5B
9746:1060F000F3D239A4D84EE878B39AAB26819CFC62DF
9747:10610000C78FB99EE22B84757F490C13814FBE2443
9748:10611000FF6E1FAED1CBA6C41BD9FC96B0FDD94BE8
9749:10612000FF83F5513D4DB75F9735EAF3A5E4E614DB
9750:10613000E087D21532F1D3B957C07EAFAE9BF2FDE6
9751:1061400075F14C8F2B23758B414F592A936980EF42
9752:10615000590E22F5A172A266E7EAC2129ABF2DDE9D
9753:106160008074759AEA770A954315094C8FA94CF209
9754:106170001B5DB4FC78F3F0DBAF21D0DEBF18E49AEE
9755:10618000D7469C1B484FB8CF5EA29FDFA5E61F39BC
9756:106190005F4216E17CD579A8FDAAF310370A2E7F5D
9757:1061A000147D7676BC10D693697A5FBC5E7F5D0005
9758:1061B000798D7EFB70447E51445EA51399D3892965
9759:1061C000DEBD203E19E8223401F53442E923375C74
9760:1061D000CF18AEF7F0C5EA99A09E88F5165DAC9E83
9761:1061E00025DCDF63D1EAD5ECDCB2C34BE9A9F2F5DB
9762:1061F000E7EC84CAF32F245F8A937EAFDEF0A81DFC
9763:10620000E0744AF2DA01DF5FF8C589D1E0B5AF1B6F
9764:106210005E2EAB007604923685FBAB4F4C013DE918
9765:106220009B0DB243A4553C1B4D0113A5DFDAE68A52
9766:1062300049240FF34759FEB1B322E45BF4F8ACFCF8
9767:10624000C573298A0DF1C0F46D1240BDA376FDE738
9768:1062500013408E7B4808E930B21D8C7F2101F9BEC6
9769:10626000C418D7B39CCE13F5640FE7334FF313670D
9770:10627000453BA437B4039F7922E8A8BC7B7F091A69
9771:106280008BE97C5E8FB7259DBC8A667F407E00F2DD
9772:1062900040850BF133BDA261D30B7947E9BC3AD6F7
9773:1062A000FFD62EE46AE508A3C7734DB37FBE5BE952
9774:1062B0005DDE7472BB28DCCE8FED9416A607915676
9775:1062C0009656CB013BE89DD56B6527A55452BDE59D
9776:1062D000E5575E047BED5313DA6B555BDEFA6834E9
9777:1062E000CD576D959326B1E5588594307E3CF47F6B
9778:1062F0000B8685F151F9ABB78CCA50F6FDA18430FD
9779:106300005EAAB6EE3792A13DE158D4B4DF18B44688
9780:10631000C14FD3D109A0B7346CFAD608F6D717FB12
9781:1063200004929ADDB37DF9DAB7705F0438213E3903
9782:10633000BEBAF1D7036F8129BB0BB09E03E4E5A57C
9783:10634000F0E6E372BA66A78DC4D37994FFDEE49FCA
9784:1063500004F87CED3E3BACA75DAA6374BEFAD11491
9785:10636000171DBF5CF6A6383065DFCBD7DC8FF4573E
9786:1063700026D4A538909F5CE90694DDDE7458E7DCEE
9787:1063800055B7E13A4B891BE9B07CB558ECA7E9D782
9788:106390001299B8350A9F1426303E695F47914BD752
9789:1063A000D90E7A3FE8DBFF2EFA37A07D7A2F01F96C
9790:1063B0007F3F5F33DD2931FFB599E1CB9A6050ED26
9791:1063C00045B38E7ED73FD606783ADDD7950AF3A43B
9792:1063D00070F072B809DFD37EC50FAE4F6578228AA0
9793:1063E00054C8DBD1FDA008BE43FD36D965C9D3B57D
9794:1063F000E3F2938D3F9F8F4FE71D03FB5B7B0AD535
9795:10640000EFA3AC6F16AC0FF745BACF69E84CC3EFFA
9796:106410008CFFD73FCEF85DE57FFFD489507EFE43E9
9797:10642000C647D00EF6133AAF402A96EFBF5540F953
9798:10643000602281687CBE5EE67CAE2FF7507E053F11
9799:10644000814A2774FE9210A7A5173A4E02E201ED89
9800:1064500095D215B4BD56BF8171B19E31FC5DB3AF0D
9801:106460009471B9909F40E5416C581E9055C997A50D
9802:106470004756CBC40B2A67F5A726B4C7ABB7C8C528
9803:10648000B0FE339B0F7E7427A5F3334D2ADFEAE578
9804:106490006A24DF966FDB20009D46F2ED9972BA8B7D
9805:1064A00047E35BFA3D2ADF9607FF9FCA55157ED367
9806:1064B00013F4F294CAC77EA042F406C748F9F8352F
9807:1064C000E85BC93DE523FDFB9014F6A44395FE541B
9808:1064D000BAA31A5C3F90EBDDF4A9D25F377DAAF432
9809:1064E00017B95E3DFC22CBFB838D44E9A47817D518
9810:1064F000E8283EAB5B05BF09F9DCFB769F0284937D
9811:106500000BB737E27BBB4F9236EF8FC83745D47756
9812:1065100045E48B23EABB23F275BAFAD52D078D0427
9813:10652000F11FD0D5332D78891C8F620FAAFB8FA75E
9814:10653000F9ACD10B7491193282DC931751D50DFC53
9815:106540006B7B45F4AF7529217B02FDFEA885D969D7
9816:106550005D0E9E8F67F950B27131C83DF57BC84220
9817:10656000D03EEF2A0ED9E335F6FFD156D1AED0F2A8
9818:10657000A09F4CD4FA11C2F369407C07496FE5CC67
9819:106580006FD81563CFC3F162B2FC407FD78BD6AC16
9820:106590000560EFF94427251F3267E11D7642E9AC1B
9821:1065A000AB75C04DD3E8F7B9EF88A06E53F4B8A42B
9822:1065B000744A37B3391D9F22DEE7C7D0F5CD6E652B
9823:1065C0007AF89C65D1E9BE92D72FB5CE37827CA5EB
9824:1065D0007AF431AD5FB4922C43BA2B5F15F1BDF55F
9825:1065E000C7C81F9511FCE1E6F6C35E953FF2493E30
9826:1065F000CA174298FDCBE5F2F562EE4DD3281EBADC
9827:106600000E89C4A4803D2B92C5B0CECD821FFC055F
9828:10661000C49B8C7C564B42280F553875001F0DEEDD
9829:106620005D4E756CFF53E183402F3BFE90F7124D9A
9830:106630003B767C3A680FE4777E9CF507D2B37ED137
9831:10664000BEEF66C07ED6B5CF847EB1AE7DBFCE7ABA
9832:1066500010F2BB4DE817EB5A6472011F78F7D9FCB2
9833:106660005740795F663F34ECFD362F88FBEB23887B
9834:10667000B75309CC7E39D7FAE7234212A47455A048
9835:106680003FEC8B453EF2ECB6A0BDDEB5F7DB42B782
9836:10669000F59FB79E5A2371233DDAC8B46D40BFF110
9837:1066A000CC7FECD933EAE58574FC9AE6FDC6D9B413
9838:1066B000BCE88DBFE681FCECDAC6F4A24E39B886A0
9839:1066C0003809F92AA1EC7119FC7CC04C19843C9D55
9840:1066D000B8F1066F6E34B83038745138C0BA285CDF
9841:1066E000CA41EEF7068F984423D2FBBF1E3CCECEA4
9842:1066F0006072ED0704FC4261B8082EF6DDE6370B48
9843:10670000B87EF67DDFB7792077CE342D447DE55213
9844:10671000EB1E92F8AF4A07FFD5750B81CB59F7C432
9845:106720007F597C33FA7F2F41C17946F2414F3ADFDE
9846:10673000F913CCBF6673E27C2F93FFCBFFB7E17DEB
9847:106740001BC5BBFDD2787FEC7F2CDEDFE178B7394B
9848:106750004C20CFF6FE15FDACEAFA2FB5EE57FE87BA
9849:10676000AE5BD5E36F34D41D9E4AEB1F268115C561
9850:10677000749E6F665EFFE1545AFAEB5EF4938F12DB
9851:10678000991DF86B503EC0FE4B13FC1BD0AE6076DB
9852:10679000531161FB7A514E19EA1B45394FA0DE4077
9853:1067A000A4BAC3F9141E3766CD752EC5EAC33E716F
9854:1067B000D3FC8FD2AF75A2FF30C27E3C2810974029
9855:1067C000F5D8A22B6F380476CCF84C3960CAC3F4E4
9856:1067D00028A46FDB27B2EF56BDDD3409EC1D8D1DFB
9857:1067E0007883A22F9FC0FB9B48E61D9E4AC79F98B7
9858:1067F000293AFCD06EAC4F82F54CA2CCEDD39C1F55
9859:106800004D88E86F1BD531B5FEB5BF177EE624660F
9860:1068100067FE9A8E9F0FF0CB94D17F7849F801BC28
9861:10682000115EF9FEA5A05B494E84DF8D19351C9ED3
9862:10683000CCAE96787BC9BAB80DF85622D42E667ABB
9863:1068400019DAD3AA5DDC1B9C09B7B3253EA40A77ED
9864:106850002993DAD9FAFE101E2A3EFE5E3CA8F8FB08
9865:1068600047F1F17BC0C788303E32CF3B24E0CF22D6
9866:106870006E0F8C3FDF26623ED329E1F90BB707C6C6
9867:106880005AE325B007AE953E10812FCBCCBB2AE151
9868:106890001CC1EC1490AE077718D0DE31170808F74A
9869:1068A0009C4609F31F181C2340D19E72CDCE330F96
9870:1068B00010F027BB8C4CF12E66FEFCBF7CFFFD98D0
9871:1068C00042F0ABB0BF32FABFC914BE735691400C50
9872:1068D0005DE75C897821C4612E5DD4319D3F589F6E
9873:1068E00087BFEB52C2FD5CAA7E6F72E49F9DEEA44F
9874:1068F00072EBD81584EC829439FB25ADDDFC835610
9875:10690000062FCF61E2EF8F72C125166BCED9FE2D17
9876:1069100089C98F9D7FDC361CFC6763BB72E3983CA2
9877:106920002D30005D7AB85D708E287110AF70AE7535
9878:10693000401C9E231E126DEE287E9B4DDC9EFE6544
9879:106940003D3A9549D77AE213C16E2221F4DF7AD716
9880:106950009BA39E07CF4A3270BAE178A37F62219C45
9881:106960005BB0F1E7D2A6715ABC754CFA42CAEB890A
9882:1069700007F83BA6395FF947E10BF63BC077932553
9883:1069800038A1388AFC98CFE137E5C077E8EFBCB290
9884:1069900075AD01E8F7CAF506DDF9647512B7BB8677
9885:1069A000916130AF29072CB602C0CB21D169A1EB90
9886:1069B000F3B49E35BAA39C7345C213FA073FFAABF2
9887:1069C00049EC5C608FDC341BE0BAE74B33F152FCDE
9888:1069D000EE32FAAAA2CD332985C9B9B9A4E9BEBC61
9889:1069E000EC7F3DF88EEDB206C6819DB99E70BF4624
9890:1069F00024FD11A4E3731B891FF653B04B412E9C59
9891:106A0000DB4C703FA7207912EC6ACAEF3FD4FA69D9
9892:106A100006B76CFD25E801B5AD82C340CB6BA5A0E0
9893:106A200011FCB19E967811F6DD7C85B8F07C587229
9894:106A30000CBD55C317AF264908DF83A3F7DC05E378
9895:106A40007ED56124A08FB8DE0CD961DFFEAA75382F
9896:106A5000F2416FEBFA553DA91C2F433F4C1E46D225
9897:106A600043EEE6185DFE1AD19D01FC35C5149CEF7E
9898:106A70008C82BF49C98CCE2E5BBEF9FF3F936F1F3E
9899:106A8000AAF2CD2D166BF8282999D1BD46BEA54690
9900:106A9000936FF3042515E03E6FEF8054C0EBBC7795
9901:106AA000E4E468F26D4B3D3BFF7B9DF223A45DCD9A
9902:106AB00054BE5DAD916FCD54BE65F76CF7B7CB9505
9903:106AC0006FFEFF1EFEDB02F22DCA7AE339FC54F999
9904:106AD00096D77A14E55B5EB381281ABF9339F952D1
9905:106AE000F24D48BE15F4E143B233360AFD6CE1FACB
9906:106AF000F7EB3C6E0FC60139F7A364765E7AB97284
9907:106B00002E3D85F1C925E5DC7F139C5539376F3B58
9908:106B10009573D9D1E890C9B979BBA89C13801E9907
9909:106B20009C9BB79730FF5B847CCBE921DF08D6AF15
9910:106B30000DB0F69E96EC17EEA6FD0D73C94E33AD63
9911:106B40003F2C2CEF4668E5DD8F922584730F797713
9912:106B5000E8F2E4DD762EEFA81CEB0FF235923E9CB6
9913:106B6000AD31BAFC9E51ED9B7F05FCF2AE88E78B00
9914:106B70001F18D839D07BA3DA0B80BE56F2F97838CB
9915:106B8000FD75D67BB1FFA237D9FA6A3633FF776D30
9916:106B900033D30F6BD78B7E85FE73C2E8EF8C30FF4B
9917:106BA0008ABD0249A5F9A926DFF35690C1BF900915
9918:106BB0003B172393F235F430676415FAF11B2CF67A
9919:106BC0007584F2F11C8998C15F5F659DF005F8E955
9920:106BD000AB4632FF7E15FF4E78DC801A0759DA7219
9921:106BE000EFDB7D48CFF881292686C7292F0BFEB51C
9922:106BF000D910BFA42FAF8A887F7C8AAF73AA1844AC
9923:106C0000B890F7C5A8710C4F45C2E31087075DBF68
9924:106C10000E1E7E212A3C284627E5A784D75FF16E09
9925:106C20007031F8F32B560A78EEABC223729D2A7CA2
9926:106C300054FF74156FEF69BD17CFFD23D7AFC2AFF7
9927:106C4000C7BA557846ACDF97CCCFBDF2C97088A7DC
9928:106C5000A1F480F2C3FB1B0A073A4EF1D82B52B5C0
9929:106C6000F2F8790E87E1BEB145E904E046EA807E9C
9930:106C70004A1BEF7D3B9DAE7FC427CA30D826AF1993
9931:106C80006D72C339EA264B08E59B4A5FED2ABDF3D6
9932:106C90007EF664D48D437BBD4570807EE10958103B
9933:106CA0008E1E4A67165AE5E0CA6F2670383A4CC8FD
9934:106CB000577CDFA17037D0FA13D47D88C21DF866E7
9935:106CC00078EB593CCF2D20213C2FA96D149C01BAA3
9936:106CD0008EDA16062F55DED23FAB161F51E8518AC9
9937:106CE000468F049CC485E17DB08AD79B62F27D0407
9938:106CF000E7305328BDAF25613CE6D0FF008F917887
9939:106D000052E17929FAFC9CEB1F5B008E5680578874
9940:106D1000E95101BA2FD8C2E51EC9AB8363D18B17E5
9941:106D2000187DED1514384FE88613D02B2D1FD1CACE
9942:106D3000E815E0A600DC5B4B44C89752F82666F7DE
9943:106D40005C279C5F6AF9B762EF51D6FF6AC149A21E
9944:106D5000D0AFBAEEDEE8F71FA5DBF608BA7DCF129A
9945:106D60003A3C1CE876AFC0FC08ADF1BA7347530A51
9946:106D70003B77DF64A1F40DE75DEFC8CE754A4F3E67
9947:106D8000BFC0E109FABFA2F14B0D8105C059E04631
9948:106D900033C69FE13CFA33FD522B5FB75848F2AD42
9949:106DA00005BDF76FE4F6406FFA8D9A1F0AE381DCA8
9950:106DB0006BA1E3E584C78B94EFAABD7FA97525A6D7
9951:106DC000FC63EBEA8EDF246D78FE648A773F98845B
9952:106DD000FE1F169F743B8F4FA233403D4B532F2D08
9953:106DE0007944EFF5489A19F7E1FB785CFCF5A29538
9954:106DF00078E93ABE72C948A77497FEDD1890CBE3D4
9955:106E0000E83E4293AF0E8FF8F86E2C17F13CEAA6DD
9956:106E100077136BE09CEE261046F4FB4DF902EEBFB3
9957:106E20001F4067A3408F3513978993302D1FF98337
9958:106E300078F41BE5AFF71529949F866DF43740EA87
9959:106E40002C0A25BD07F01B2B12805F9B2BB108F687
9960:106E5000AFFB3E27F9A282FB2CF633EC1049867A71
9961:106E6000A35DC9680E8C6A5E5104FED1A907AD56B8
9962:106E7000A0F39C5506E2D6D0EF68E26F8073F8511C
9963:106E8000275CB700FF95537D01FCCEE5AD6B1BEC95
9964:106E9000905F253815DABFC7EB9E60A7F3DAD2788A
9965:106EA00076C255C087B41E74E359C5EA79D60B4E35
9966:106EB00008952D6D5D8EF138A5EB05E280FA7E8197
9967:106EC0009859BF7E33ED77CB2ADA9EE6CBA03DF40E
9968:106ED000BBFEEC87B7009F1F1659FBCDECDCBA94C4
9969:106EE000B653805ED7DF8BFD55AC12481AEDAF7CF0
9970:106EF0003393FFE58765279437EF5F89FBD8243A02
9971:106F00005E7A36C8FBC078C893E18203FD9D99770D
9972:106F1000225F7771BE261DD398DC10789EDB0DAA08
9973:106F2000DE742085C507973A171A13693FEF8D4C19
9974:106F3000CE8630014FCB593C8F3E41E1ECA670FE2E
9975:106F400080C7731C1C79DC18D4EC3F9FA50C403A19
9976:106F50009CD33216E31CE692628C7398328AE96BFA
9977:106F6000EF5F6BF10B745EEFCBA14CF87EF05A1320
9978:106F7000EABF9D5B643C2FEEEC1B44FF74FB2A9937
9979:106F800040BC46C32A11E562FB66B68F8BAB6F9B94
9980:106F9000900EF0DB2038416E1E5C5564847DADDDC3
9981:106FA0002F60FBA2D5F7A7303B86C943D56E2B7562
9982:106FB00054E8F68F48F9A6CABF1A0E87483957A376
9983:106FC000EE331172AE06CE9BED90EABF7B8895C979
9984:106FD0003FD0FB01EF81EF907E6B0FCB04F47EE19D
9985:106FE00078C7048CDB827D93968F6A155C70CE5FC8
9986:106FF000FE89C98FFAAABF64E64F417E7F6A22826A
9987:107000000271F014EE542E8C3485FEF82CFDFEC572
9988:1070100007668890A17452827056E3450B36B0F82B
9989:1070200096820F56A494021CC627A29C2D6B14892D
9990:107030005B232FBE105CB7DCC9E4B16383461E1529
9991:10704000187DA5B07F3952991C5436C8103342B60A
9992:1070500073F944F56917E80D15BB96A71869BDC506
9993:107060003C1EA462EFF2142A1A4803EC5BB47E853E
9994:1070700091F55FB14F70ACD5F4AFB657FB53FB3110
9995:10708000EED2F733602FCF5F663FEA3CD4F17BD37B
9996:10709000C747FEC7851502ED6FE4FB2206298F3C2A
9997:1070A0003E6980F6BC434D55FF6BE18706E2D2C0D6
9998:1070B0006DE41F63884B4317CD23287F53BC4D6E6F
9999:1070C00061FA50F388A3C69A02CC3B809F6BB99FAC
10000:1070D000B6763C3BB76ACEFFE011E0EF490502D23D
10001:1070E00001F1BA8D8949A8072970BE5056C0DA97B8
10002:1070F000D1F6C077CD2B191F5279A080BCA85DB501
10003:107100007C02D65F2F28D07FF3DA12DCE7CB478AE8
10004:1071100004CBD71F45BDA3BCE56812F02BE5CF1506
10005:10712000B0EFD68E3139803F54BE53F9F87D99C502
10006:107130008710B36328DC03284B51A2F2AF78983054
10007:107140003B75B38C7CE719C9F8F2FD2D22F2F3C12F
10008:107150006BEF98007CD8B941E8858F299F1684F998
10009:10716000545CCDE275CA36317BE5E02A261FDA9BF6
10010:10717000999E58B45A9E0CF9B27765C2FC5E4C1FBA
10011:10718000BC5C7EEEA1A76C8CCECFBDF1EF14B9E94B
10012:10719000A3FBE8FC6E7A8DCE5F09C3ABE8BA07ECBF
10013:1071A000E8A7BF6E3AAE579543A5128B679AE35B8B
10014:1071B000C8E27D2516F7F677CF2B621E8FA5D8C2C1
10015:1071C0007244047A8F6771D2EB65A4F7487EFC475E
10016:1071D000F9E89FC5D7DB391DA9F311F7B2F61057AF
10017:1071E00016A070FCF5E69731AEF5CB578F4E013CFB
10018:1071F00057EDA1F44BD7DBB9D9460220B7243FEEB7
10019:107200003795CD22C68F132950788B4DCB9F2C3EBE
10020:10721000A9EA751BD24DE53616775AB9E3781EC632
10021:107220008B2C0A61DC95F755AE6F7A837940DF9538
10022:10723000128B938AE4F7B1A94CFFECD8153B0DD61D
10023:10724000216CDC8FE7AD954D77C8407FDDF223558B
10024:1072500056EBE139A697D22F9CB3C3FCA60ED5CE30
10025:107260006F21E2A96313E3FFCA16D96F81F96D5C40
10026:107270008BFE6CCFC6B3181F5FF4FA16F423785A4E
10027:10728000447D5CE44611CFB3688AE75691F189B535
10028:10729000CD3578EE56DBC4E3FF22E2E2AA5EDFBB27
10029:1072A000C34B4153F5AB5FD8411E9C6EDB60077842
10030:1072B000D2FE30AEF0BAF3922E3EAAF77860973E37
10031:1072C000DEB0E9711E6F38B99DE4F58C373C0DFFD7
10032:1072D00080FD2635225E7363228FEF0E141647F170
10033:1072E000E777DFFBD9F2F51A8893EFD876660DCCF5
10034:1072F000BFFA6F5FAD81F826B2CF82FB94E7D5DF8E
10035:10730000615CB1DA6E612AA3B7CE4DBFC0B8ECCED6
10036:107310004F4D68EF74EE6DCF82F8B6CEADDFA5802D
10037:107320007F6EFEDEEBD17F397F7B512A8922EFD53C
10038:1073300014E8D37F1971E191F838D87C10E3B0BE1E
10039:10734000FCC484F2AD3B7EB4A986C5E52A3C6E74CC
10040:1073500073F4387C35CEB1B6F9969BAE0579DDCCA9
10041:10736000F4BBEEB8C74BC58B7E48F17AF565E06F8C
10042:10737000338F0B6E9A1C355EF44BF807C5D3CF5391
10043:10738000F5F1A25F37CFFDF98B50D69CD86BBC6866
10044:10739000E032E0A6C6F957A7BA5E4D053EDA16EB15
10045:1073A0004D6378F34F12400FFC3A0BEE479C92432B
10046:1073B000180712DA6B7240DC63E5DE8F915F3AB733
10047:1073C0007F80FE56C2E3EC3B49F71F8B8716F83AE5
10048:1073D000D7DB589C29873FC4A12A76FCCEE34D1900
10049:1073E0001DAB71A8BDC59F0653F9FD617EEFA08658
10050:1073F000DA4D2C4E3D1C972A8C047C1DD5C5F5AA70
10051:10740000EB8EECCFC1E56838AE3A7A9CAF1A47D81C
10052:10741000135F6C5F51E3A63BD7F2786BFA3D7318AC
10053:10742000C4C9B1FDDCE3173E8E865F35AEFA0F119D
10054:10743000F855D7D71B5FA8FC79A979FF57E1F26E01
10055:107440002AF367ABF0E9F84B7439FD0DE7776AB7BB
10056:107450007E9DAAB16F6772BB55859B3ADFC54D4CC7
10057:10746000AFE8D8C8EC8748FEA6EB71458BB397D23E
10058:1074700098FE5BDBB23F0FE450C7815D9CEE185D68
10059:10748000D76E3ECAE274A9DCF66BE536617EE4C8CD
10060:10749000FEECBC3F4F6BF4FE3C9BCF46EDEFB4E4FB
10061:1074A000BA03E67FBA8DE951A79BC489FE28FD5F28
10062:1074B000E0FB52F7BA6D468C9712ED31A84FCDB76D
10063:1074C0008DFC242E095223C6FD342CE471420F3B5F
10064:1074D000D300CE0DB61B09CCE751808FC6FF203BF1
10065:1074E000DC04F43839ADB84054C2F355CB8D4906AD
10066:1074F000E2D7E25F0A64827C3F92DF2E437F9F45A2
10067:10750000F84D3E93C8E2543AAFCFBC8273A1D2BBD0
10068:10751000DEADE6DD0F893A3F47AD297404F477F21A
10069:107520008605FDD6E23E8B17FD666B2CB8CE83DB5D
10070:10753000BF7D05E0D5F9731361E7089430A85C2896
10071:10754000E3FE8BF6EDDFAEF933E899D0988E5FB6A7
10072:1075500086D607FD7A732CDA035DDBE2F2509F7C5E
10073:10756000E3C1292037CA600F033DEFF5547F03EDD7
10074:10757000EF6432CB9FDCD217EF13546DB361BCE1E3
10075:10758000C1ED3B6B41FE77BE1E0BC7D1E44B39F812
10076:1075900037C87BF6C491B50AEA818A76BFAD2092DE
10077:1075A000A2D5F3AA20AF8B7F2168A7A33F8ED27309
10078:1075B000554B1CDE1FD1D4E3FCECCD60F7650219FE
10079:1075C000C077549FD48DA396DF9AD69FDFEF0DFD31
10080:1075D00084BDAFC0EA7B8CA15296F76530BE6DC307
10081:1075E000FA252ABDF2F29EFDB2FA33D3FAEBEAA9EC
10082:1075F000ED6B4DA42E1A1F54A709FC7EEF5F0747C1
10083:107600007BCF22CAFCF1FBFD02F11A400FD86AC100
10084:1076100038AE6A636010C4B7EF30B2F3916A7B6032
10085:1076200010C4B7EFE1F2AF3A86E6E9F70C3E0FA8D7
10086:107630000F79620EBE06F8AED969214BC17E7FC3B9
10087:10764000E6023CD7ECF8F6E44B0510CF168B7EAB88
10088:107650009A37FE0DF15F630ACC00FA0F6D35917514
10089:10766000B47EC7D677B2408FE8900359091739F72F
10090:10767000A96932E9CEB1D5759CAEF70F84FBEBEA70
10091:10768000BDC5CA5EE4C5DE34A68F2E4F733D9D8610
10092:107690007C6D75A0BC86FE44E8A76580F65E73A588
10093:1076A000125D8EAD4A9375F768C5F03DC555D0EFB4
10094:1076B0009724B83883A2A44608E1F979E5C6B34314
10095:1076C000C11EFEEC6757E1B9D667C6D05090DB9F6C
10096:1076D0006585866AE5F1A97AB322C9E897C0B46BDB
10097:1076E000EDD9D20C02F1839669D1E4D396B4589CBB
10098:1076F00047E543B151EF83EEE6F4B61A6830998D51
10099:107700000B7E0875DCCF8C7E23CC23375DC1F2CA9B
10100:107710004CBF11BE576DDC3540F7EE84E4C37A945C
10101:10772000BF101E156485B1C0DA53AE542CB02A12B6
10102:10773000DE8F96FEB39BDEC4309ED0C909716A1CF1
10103:10774000877467423FA87A1F40928BCD002F232970
10104:10775000764822A0DA877C1A439A30B5527584EDB8
10105:10776000437504E28A4EF1F35B93A43C0DF2C374BB
10106:107770004844797E29B8FD3ACD8EF3364975C489DF
10107:107780007AC72407E8D582D74DBEA7F4D050BF7181
10108:10779000C00976FEEF8278380C8DA3F3B33BDEFE92
10109:1077A0000EF4034A6768677BAF23FE063A9E646463
10110:1077B00079328EF8A39DC777703C10EF7E943F56C8
10111:1077C00012FE0BD17C2C4A283A6EDCDF46829D6B80
10112:1077D000759000E84DB1561288A5A935573AADE528
10113:1077E0005F3B61F9FE949C41AE39C6E8CB23E99A30
10114:1077F00038A5F3DD7251C4F6E723DA9FBF587B1535
10115:107800001E1EF3806C76FF9DC12586AFC13BCE79ED
10116:107810002108F0C8B33B1B008FC6D09107011E7929
10117:10782000566627263512AD1D37209DC9AB4704B6D5
10118:107830005FD2BF62ABA63FE230A3FFF4710EF7EE5A
10119:10784000FAAA5FA5477D8B0470ED51DFD25BFD98EE
10120:10785000E8F56DBDCD2736FA7CE27BE9DF1BBD7E06
10121:10786000ED1B1FBF1750E023931B1231A8F7A00791
10122:10787000A483BD157724A58451053B2788C05B0CE4
10123:10788000D01FA58798819AEFF07FB91AFCF58F82F7
10124:107890007F1240BA2BE1F3A1796B3A9DDF9D7CBA50
10125:1078A000E3D7B373CCBBE7333FD29D0FB1FB424765
10126:1078B0007FC6EEEDDFDDC8ECEDBB17B0733352CE03
10127:1078C000EE0139E87F30DE3DD009C5F73D3EC11FEE
10128:1078D000C886777022F4D7EEF776EE97A07E4984BB
10129:1078E0003F46A527F5DED26CAE5F6773FA9C4B422C
10130:1078F00036E0FBC87BF4CD692C2E8D9A632E58DFC1
10131:107900005D7C7DEA3EE05D4E72E05D00D110E38477
10132:10791000F31191DF5B257623BBB77A6B824EFE9C19
10133:10792000CB51E260BF236FF2EFFC3DA2793728A96B
10134:10793000DA7B5ED285587C7FA44176A6815C942F49
10135:10794000FC9828942F8C17061045730F8DEA77C882
10136:10795000ECB283A01F4772149332D00BE3399D25FC
10137:10796000DDD8AD87BD4FE1326FB982F760EF486770
10138:10797000FBCBD28CE2B94017A27DA4D36DED895721
10139:10798000EF76B6BE06585F76CF7937189D4ED44352
10140:107990006FA41A04FA7B9C66988F68523E56803F0B
10141:1079A0007F2B13B0FF7BC281E1F35C52821FE25F49
10142:1079B000E6D8971E01BA5D56EFC073B425F5399825
10143:1079C0002EAD4F433D7471BD1353152E66A7CF25C1
10144:1079D00052389B07B2FECC0E37D333E83E04F11782
10145:1079E00092A32E007973661D01FDD7D20D1F1FC211
10146:1079F000C7D89D7763DE04799ACA8D9310BEB43DD3
10147:107A000029033F6A867B19C0C7A25C49140D5D98A3
10148:107A1000D286E9F23DE0A6D2C71606BF2705461F6B
10149:107A200091F07B526E53E0FCF9C91BBADFB541F807
10150:107A300051759FC1EF37EC7CAE57F83912509F9DBE
10151:107A400053B8784603FDF4043F877CAC7E24C2EB38
10152:107A50007188EB1A0CF6810B5311E047E9C894EBDF
10153:107A600025226D6F52D89C4DD66297A180D12EC031
10154:107A70004FB432789AD2EAF03CCE6C65F012AD5E2B
10155:107A8000848B6C65F012AD8CDE8C3C2F01FC866320
10156:107A90007BFC4EE1D79C3E02F0305A072F63D2B8F0
10157:107AA000CB83DF4A0A3F3A8F24CE5F917048827BB6
10158:107AB0000AB961BEEA4DAF7B8EAE1FF6F117287C86
10159:107AC000204DEEC57E4CCE607234C950B75F06784B
10160:107AD0002410BEBF7849662161A18AF097E6250A85
10161:107AE000E405360FB25E8F57D12145BCFBA6BC0022
10162:107AF00074B0E21DD900E7A4E2821FEBEE938AD3B3
10163:107B00005CF10AC2D32DC0FEFC44BD82F85B0E7846
10164:107B10001C0CFB23B3C71EE5F87C0CF804F1CBF872
10165:107B2000E349CE2F4F733E6970B2FB13CB26B2B838
10166:107B3000ACA47C037F0F2D40B4714FF1CE2662A41C
10167:107B4000F3421D5BC134807AC62726FF15B45D6CF5
10168:107B50002E71019DC47FF2801FD74A8AD3412F8A9C
10169:107B6000E7FA2F19A3C44FC78BB40189D921541444
10170:107B7000A25DD36688F60E5683F38019FCA6BDCDB0
10171:107B800067FFD41D4897A5576378304974174F9FF6
10172:107B90004BF3D6C658F40FC63ADD858F029F37DA0D
10173:107BA000904EAD74FE651ABCC7F682D717336E309F
10174:107BB00064503A144169A3F87DA6718005E0FC9CED
10175:107BC0005C9C0EF2F539BECF521C28DA73A80E2E3B
10176:107BD00027ED0557EAECD915B20BDB39C6E8E5C04D
10177:107BE0000A2E7713C6EBE95D95BB1F75CB5D773227
10178:107BF000CC27E5C278E4C7A49BA3CBDF06D9E885F0
10179:107C000077051A86327EF79618D97D989EF200FD88
10180:107C1000DAE7DC83D6813C55E96B1161F2C74B6230
10181:107C20009CB81FF1777454FD7809BC37C8E52CA4C3
10182:107C3000E24023D24DCADD068CCF5BC6DFCB7A8A09
10183:107C4000D217A43E4A5F905E9BC1CE33169987E15E
10184:107C5000BB6D0D5603CA0BE95393DF0AFAEAFE51D6
10185:107C60000EF02348B2B3CD05FE409BD4B48E40BD88
10186:107C70000233BC2721C41738800EBEB1CDE977B1DD
10187:107C8000383C8A4E01E8C891544C8EE5E2E901DEA9
10188:107C90007B911D3713F02BBE90546701B8E5663019
10189:107CA000BBABB1A410E148E13B2E2339DC4FEAB471
10190:107CB0001BBBDFDB826E5FE8E5FECC940CAE476752
10191:107CC0007AC9400DBF370A5C0F53BC2447C3F78BFA
10192:107CD000AE9840E05CA927BFF722CF363079F6880E
10193:107CE000105D9EA9FAA72ACFE40839A1A68BFB4D07
10194:107CF000D4DDEF322639817621F51A288A24EFD592
10195:107D00004FDE158F70980D7020693776DBB53FEC2C
10196:107D10000F7A6561547A8B946373BAF775570AE0EA
10197:107D2000E994ACA44E077A7AA7B77DDD558A74E84A
10198:107D3000EBA3C0BEB4FF991FA35FE7C4333605E4CD
10199:107D400050D985C7717F28BD300AD3F2C61B703F5A
10200:107D5000179E9D5C08F4D0BEEAFABC4FC1CFE3B3D6
10201:107D6000E1BEDDDE583408CF237DB10AC477B437D5
10202:107D7000D2F2827039C48B8B9A780102DE77CDFD06
10203:107D80006F52A0A05EAABE7B46ED3AFB68F00BAD39
10204:107D900016F15E58E9B33617E89FBDD15FE9AAE84E
10205:107DA000FE00D86BC1EF4A07CC013D7ABF7D742835
10206:107DB00040FB9DB38E9D2334185D2703A0373D63A0
10207:107DC000C173C88684E8EF82CCCDB87E19C881B96A
10208:107DD00019AEE7104F56F64E69EFFCC0C63F098753
10209:107DE000CC708EF5227F1F4572DBA7EACED9D83939
10210:107DF000D649EE6721E65ECA6378B9D24BB99DC514
10211:107E00008B1047F472D5CE880DDB194DB08E9AC613
10212:107E1000338B3F4578713B83CFFB94CCE67DEA15ED
10213:107E2000937F5114FA3FC5E3532A04065F950F4E22
10214:107E300075EB476E7C0F27924E8575435E1845FBA8
10215:107E4000FDEA908CFB4635A52FA4AB75A3303E5EB2
10216:107E50007866D4D310377CFEB088E595172C58DEB1
10217:107E6000F1B0F305887B0ABD2B13904FE70F5D1F20
10218:107E7000C7FC447A3FF63D7D985C38C6E543E9850A
10219:107E800027907EBBE9C437D708FC577AE12946DF43
10220:107E90001B057CB79278ABDF1D3B90D3E768685F2A
10221:107EA000317911C07B8C0FCF49CA36989CA00F4402
10222:107EB000E2F95886A2F37B94059761BF84EA5F4993
10223:107EC0009AF3F4533CCEB8EC027BAF9038BC240D4F
10224:107ED000F881CBA7301DEBDFA1EDB044F7D39FE3D2
10225:107EE000FA4FE9856B747646787DD7E1F752BEFF8D
10226:107EF000970547613EBC9E1746455B4F781D63B0B2
10227:107F00007E477CF4F1D3399C4FD6971317956FE5D4
10228:107F10004656AFD477BF11E44EE9AAF80441B3AE98
10229:107F2000B2C62A5D9C47D9AA12E32C4DBF613C2CF6
10230:107F30007E77AC14C643FA4B0B272FB2825E502CCF
10231:107F4000F7017E5A5751F85305FA63F2E90BD997B6
10232:107F500005F2BABDF13E7BB47B13E97D22F0D3C8B4
10233:107F6000F143F5EA020D7E54BC44B63FB9B6ACF01D
10234:107F7000A7E08F5EC95E21E95DFE44E02D3B3ADC5F
10235:107F80008675C32D07E38D2E0DB7AB7471453DE0AB
10236:107F9000C6F1ABC245FD4EF5A8ABFA8C80F108BB2B
10237:107FA000BFD3C8F07F297885C7E5F81F1B7D1DD397
10238:107FB000BAD7B1807829A3CEB9E43A1E245EF3453E
10239:107FC000D6A1E29FBCA2C3FFB497D6221FAAF89EF7
10240:107FD000736025D2EF1CCA8F70DEDFEEBBDF1E2D73
10241:107FE000BE685A6F781FE825B985FFF7F0FE85EC6B
10242:107FF000CD82B832EF720BDA23A7D63D91A585F377
10243:10800000DC8CB1F7005EC8FAE4CBDA3FBCE39C87B6
10244:10801000C0BEF43E23A33F6D6B86BB0CDA97733B67
10245:10802000FC91F80983A2E9078FD61F1A027EBA864F
10246:10803000FA364C65AE5F12D02FB3515F72457BDFCD
10247:108040006B491F26571EAD6F637E4FB39738B4F749
10248:108050008909D39FFE93307F8DDACE28BB1DE03F88
10249:10806000350AA418F53EC9BD24BB00FC1E49F95EC3
10250:108070000DFC16F761F79196A51D70C0BD6213ED5A
10251:108080001FFC39E64CE99CFE9C93E5F3854F45883F
10252:108090006F96939A08FA4373E9770DBC8D496D3A50
10253:1080A000FF74241C24B31DCF9B24C2F43975FDF446
10254:1080B0000BEE4B8FF17D6905F76B3E5FDF847EFF32
10255:1080C00045B176DCFF16F733307BCA2CE17B35A651
10256:1080D0007856DF18C7E66D01BFB708FB6A00F336B4
10257:1080E00078D147C4A7D104C8C71345807C22092C86
10258:1080F000C67752C6067F02DF9D696E3FE0F19BF4B2
10259:10810000B62302F8B18BDD8361FF6D14BDF90AADB2
10260:10811000FF7331940FF5B268D127092CED07F1D028
10261:108120006ECDB9167B2754D1FA0523F3FD164811FD
10262:10813000E73D7F19AC2D5F9EE67A1DE6D16061EFC9
10263:108140000C251D17F03CA7C1C2DE1B6AB0DD1E075F
10264:10815000FBF86FFA30BD1DE900E8E810D367CE499F
10265:108160004A5C02F3932A6FEAFCFC66E54DCD3812B7
10266:10817000B7F7D653BA9434E72A03259701E8E60AFD
10267:108180001FFDAE9D67147F5C82159FE58D7A9EA3CF
10268:10819000CE0FE2F6018EE2850968AF45D2C39E6E2E
10269:1081A0003FB357047C4E57DF2F961E61F978A2FE2D
10270:1081B000A1FDF569B73EFA08CBF3734ECF2C768E4E
10271:1081C000D9501287F171EA3CA6B73ED6067AEAF496
10272:1081D000D6F4D970BE35DD3AE87348F7C8A103B1CB
10273:1081E000A007DE2FE0BD923B7FF7A61C4BD3ED1F0F
10274:1081F000AEC3FBCC9F73793A8384F05D783771F01E
10275:1082000073763F7E9F459C3CDF24835D7F77C07FF4
10276:10821000DB649ABBE74DFF6450DB661C0ABD056258
10277:10822000C0DDE4988067086ABB16E7DB2CCFDA75FF
10278:10823000AF5F32E37AC2EB35E3FAD5F5D19922FC90
10279:10824000BBE1C3DF6B52E121CEA2EBA6F4323DEEDF
10280:10825000F61BC945F4F2E9D69CCFD9A1099B4F245E
10281:108260007CCE4311D51F3BFAB84826C5DF1FFAB8AC
10282:108270000448ABCDA12CA93FF2890CF95AD1DD0FEE
10283:10828000429FBFECEB1E9C0C70684BBC2CF979C470
10284:10829000C2F8FF08D033C4795D48C275A9EFD01F7A
10285:1082A0007CA0DD067AE7E2ED1FE33BCB3562F0C947
10286:1082B0003BD01F2AA2DD74AE79F045EF9F1D013F30
10287:1082C00015DDFFFA66AAF72CD93A674A8C4F663655
10288:1082D000C7623CFECC05A2EE1DE9990B583C1F91EC
10289:1082E000DAF26ED5E9EB8FF4DA0FF80B22FB99BDC9
10290:1082F000A0881C1F0EE7B48EB1E83F58C3E86BF6A8
10291:10830000789708F1CEA3970878DE3AEA84D212A4CF
10292:10831000F9D9FE7827B0E7EC07FE6300BC7350DBA9
10293:10832000C6FC81A9E2BDF90F839FE500DBC7217F71
10294:108330002FD089D5A55835E7051D725D3EBCF7E7FE
10295:10834000BDC7EA02FE2FB9D5F529BE17C1FD15EA52
10296:10835000BEBAB3B104E3644BEE564602FE4B9A2C10
10297:108360002E4CCD448AA172AC44226648538D44B24F
10298:10837000401A43CC90162E62EF7697364E45FDC0DC
10299:108380003EB2D808EFF196B4FEE26B685F2605F6C0
10300:108390000B7961F894B4BEF31DE075AEAB18E31928
10301:1083A000AFDA68D4D981439BF4F9AB5BF4F9FC8074
10302:1083B0003E3FFC903EBF2193201DCD32DF920BF05B
10303:1083C0003AB0D744F72288FF3361BCCB3181E1C793
10304:1083D000BBC982F2B0A8AAB510ECE033AFD90C60EB
10305:1083E00047EFF9EBAFF03C3CB42596409CD5FEDF5F
10306:1083F000C7901888577CDDB20ECAAB28EEC07F59F3
10307:10840000F5BA652DD8E13BAE54ED787F1EAC67C759
10308:10841000DF587C4D6893C90FE7E36776FDE2353896
10309:108420004F3BB3A90FEA57C704AF2106C6FF82F935
10310:108430003F83FCBDB8207F2FAE6AA3DE2E9E97C976
10311:10844000E44C70D13571D1F42635CD494BCC1D4F5C
10312:10845000E7D6F5B86926F8810637EAE1A2D61BE22D
10313:10846000D77F7F90F73F9A18C3749A0D7102FE066A
10314:108470003BECBF2F477F277911E79F575FED6E27B2
10315:10848000F277E288A2B9371596DF647E1F88DF0095
10316:10849000F8F70F7FAF229AF968F49389BCFFAFCC4D
10317:1084A0002C9E3989BFDF7FBAFE10EEFBDD7A5FBDFF
10318:1084B000CB355E932F6DDC9F5202F6D3AAFD29B314
10319:1084C00034F0AADE7430E52E8C7B92C0834BAAA7D1
10320:1084D000BFF214F82BAA37894D304F2807B87534EE
10321:1084E000BD65877A541F1E067E90B03E7ABD6BBC78
10322:1084F000868FFF5EBA55F9AD9AEB2F3B47B64D809C
10323:1085000038F5AA46C109D5AA9A6EBB6532C07B155B
10324:10851000BBE75A28916291F257F5D6DB7E3C14E214
10325:1085200066568F70C27C6817B7C2F7AACD67F13E56
10326:10853000C3D288DF3D50D3DD994C2FA4F503065AF2
10327:108540007FE9EDD672905FB4DF37217F20671DBED3
10328:10855000AF623FC5CE1FE8F74F0C546F3935CEFBE5
10329:10856000DE5DB4E919D2F4D164F02B35EAE991D299
10330:10857000B7007A596883E05C875F1715DE0C2AB76D
10331:108580006B21C6FBD2F299D1EE5B57F8F5FD44E2C0
10332:10859000FD233E5FFA97A3A59FC87A8993BC184F25
10333:1085A0005EBD80CA438D9FA0FA840FDF978C1C8725
10334:1085B00068E99AE913440179B8C5A2BE7F24980BF3
10335:1085C000799CEE0096C77715814E29A1545D49C666
10336:1085D0002B00EF9BC9444847835C81F7F44736E59D
10337:1085E00041FDDD42F09597B03F1BCAF10E4700DF19
10338:1085F00099CCE0F74C3B1496EFE27E4EB5BCB2D579
10339:1086000082713667BE34A29C5DD87410E3E83B5E8D
10340:10861000B3180C541E9CD99A380EE2313B9AD83BC1
10341:10862000C5A79B12C7192FB26F47CA0D753F3D0AE8
10342:10863000FFA4FBEE9F335DDF64C23EF5088B574D10
10343:108640004DACCB8FF6FB176ABB24635D3ED831A1DE
10344:108650007BACCE7508276FB6847EF03427C40995AD
10345:1086600008AC5F63BF62B12FAD6FA375C11F9D7072
10346:1086700048C4DF6B382E3A7FE21880EFC9A31E345E
10347:10868000A7C08DEF539247585CE56C8904244A6F6C
10348:10869000B3613FCAC33CCAE5D9AB048C2B9BB34C36
10349:1086A000BF1E782757BB8F56103F7BDF42EB47EC4E
10350:1086B0000FF12E74BF81772DCD2CFEA272BDBE5D51
10351:1086C0001509E07CAA377F6F8A06AFAF89BA2E57AB
10352:1086D00026AC4BB8D98CF3BAEFB93876DE63242ECA
10353:1086E000D84F43CFD950BE571137F67727DFD73D44
10354:1086F0000F94B8E6801C5E30DB352711EEDBB2FD4F
10355:108700000F4D3EE46F01F79DAAF124D097BDBB4108
10356:10871000605FAD6A150243216F265EFB30F61DDEF9
10357:108720001F80756BEFD794131F8E57BE4AFF9D7C39
10358:10873000C8F05ACDEF3192F59AF2FEA09F317854ED
10359:108740006F36E9FC3AA3370B5E1BDE77F537A4D012
10360:10875000F9D59EA2B282409CEAF7265DFF10CF3386
10361:1087600002F77D62A1787BAE5BAEFB87448BF33F63
10362:10877000C2E1F8DC6DA5E9C0AF4F83DE9AC1013DCF
10363:1087800012E516F71F9080998E1333BC3B8FE58559
10364:108790008B587ECAEA57A6348EA1769EECC673A18A
10365:1087A000D962F1DB701FECE57EEE9BFBD271661B9C
10366:1087B0005C5912F2AD6B10FA43173038BC30AC6E16
10367:1087C000485D143D50C5F3F3425300CE65BDBB98E0
10368:1087D000FE652B08C9DAFDB5BA2F93477107827879
10369:1087E0006F22B45DC07B962B85A3781F71E50D0ABF
10370:1087F00001FB3E8DE209E4F14A813C2250B8143479
10371:108800004FBDF72DC073418C137EEEA2A679AC58F4
10372:1088100063C5F5333D2DB66E2D9CE7A4CECC19066D
10373:10882000744ED73DF366FAFDDEBE0A8E976E65780C
10374:108830004F5BE4CD86DF818A3B507CEF5BC0874392
10375:1088400063F09E6C2A85952D01D325A07FA5918587
10376:1088500002D47BCECEFA4F368833A7427E18CB2780
10377:108860003C24B8D621F12DC7FE534D6422CC13BE53
10378:10887000831E6906BF0296FB197E8BEAF2A1BFD464
10379:10888000012C4D320632A19FC3DDF876A35D319FE6
10380:10889000EF63F3B78E4D053BEF700735B8A9DC3AAF
10381:1088A0009CA6EA43012BFE3ED4C01C569FDB85F3F9
10382:1088B000F3D97D83A42C7DBD2ED915371CE4E807A0
10383:1088C0004C8F3F6F75A17FFA1A63747FD64B7D99E9
10384:1088D000DEE2B92010BF661FF04CFB06F54ACF055B
10385:1088E00049F7BDA3DEAC8B73AE2E3F80F7EE6B482D
10386:1088F0001BC661D734C5EAE276AF89893EAE4ADF4E
10387:108900009E0B22F1461DD7A8FF7E21917813A3D597
10388:108910004BD17FA7EBD0E55BBEED5E077C272383C1
10389:1089200076B0072771BDB6CB6FF0CA5787F1D2E991
10390:1089300008EAF69D4E85E5BBF8799C5AAEF6DF391C
10391:10894000CDC8EF15B17795013EDEC184BCD87A164B
10392:10895000FDD1D5ADFB27B0DFF76274A18593572316
10393:108960003F521ADA0206CADBFFDEF7D453B94328B6
10394:10897000891D50F9F8F4532ECAB729A241C7D7B1BF
10395:1089800005DD7C8EE2E53983C8E5C299A7C68FD1A3
10396:10899000E659FD70FB8E29E3A96E5F90CBDAFFB13B
10397:1089A000EF97EF2D1A18964B741D59C5364DDE1CE6
10398:1089B00091B7D2FC504DDE11519E14519E1691CFAD
10399:1089C00064F53B6C812CD149487BDFB353A45170D3
10400:1089D0008E1D98012F0A2C6BF86ACA789AAF296805
10401:1089E000C3F899DA56C189C7FA6A7CBC93E959562B
10402:1089F00067107FCF2EB6A0ED6D9003D52D8243A0DA
10403:108A0000F46E6DDA8A7135D5D04ED1B46B6276676B
10404:108A100075D3516CD76BFF3906E4E7A539C7B09E13
10405:108A20007A7E7407E9FEBD8E0B202F6B9ADAD93E51
10406:108A30001C717ED499EE3A88F230E2FEAB07FAB5AB
10407:108A400086E95EADFF87A1ADBF836E62E79F5D28BB
10408:108A5000D1FA7FAA691F01FA12BC710972FF79C1AC
10409:108A60003F04F6E717897B08EC47F7D45CB1DF4099
10410:108A7000EB1D9183ABE1A9864159969B242AA78FD0
10411:108A8000D8827D052A4B72D624DE04F03C921CC4A9
10412:108A9000171A7EB6268995F70DF68573D7DCAC1FBD
10413:108AA000B2FC15C1D590BF75CD952C3F34D857A4D5
10414:108AB000EDFB7BAFBA09E0BFC1119D6FFB66317959
10415:108AC000AECEAF2CDF959605FA6635DB2FE0FAA522
10416:108AD00099CAC51995A7B76CA07098F1D358945747
10417:108AE0001B3A6EB9B118D7EF2D863837F6C43BDF85
10418:108AF000CF502E4BA807A4C31E9610C6872DAB4D92
10419:108B000041797F65DD56D8F75367E4A2BC3F9FE902
10420:108B1000AACF1A114EBF1DC0D2FA2C76DF235534CE
10421:108B200060BC41EA8336D4839EE6E749946F10BF68
10422:108B3000568E8F61594CFE0DCB62765246DFEBEBC1
10423:108B4000613D7772FD74C5E3FE4D160AFFDF0391A8
10424:108B500024A17F1BF5DDBBD652B91107F114AE7409
10425:108B600090077781FF37379C57F5F715F9346F0D6C
10426:108B7000DB692BA6BAD2B571402BD6B27255DEACEA
10427:108B8000C866EDD57D27B581C127F5E921EB601DCC
10428:108B9000B112C1FB1773A70D5AB710F7EF9B71BE47
10429:108BA000C4E54A07FBFB44457F03E8952A7E1ECBBC
10430:108BB000774DC2F5882C5E5DC5933A7E3D5FF76CBC
10431:108BC00091EEFF749D0FF673231CA93E90C7820B94
10432:108BD000983E500F8ED8E4307C89141C01DFFF17BB
10433:108BE000C1E95E58F73F0AA728F2E267306ECD026E
10434:108BF0002A2F0C1A79C1E1F7BC1090530B34EF9770
10435:108C0000D0EF6007DED1D7FD6896E61C67C68335D6
10436:108C1000A8FFA9F38AFDB79D13EF203DF92C523F21
10437:108C20003BF27BF332F4031A9B502E1EB991381796
10438:108C300082FCE0E7B2AA7E59F8D3AAC360479DCB75
10439:108C400012B19D45C5AB50BCB594C2E971BAADC275
10440:108C50007D74EF5416DFA3EE9B2BF8BBBB2B1EB825
10441:108C60000AE3FCBA48107F97CD3B92A0FCEB2E9F05
10442:108C70003E08CB29BEBD16E0F78A18FCDD8115F948
10443:108C800004EFD9AC987E2596EF51FD4AD3CD38CE6E
10444:108C90008AA98C9E5654B0384CD847006EBDD1433B
10445:108CA0004A03F36F10C995A78D077897E32FB62075
10446:108CB000B8FD63D02B975950AF84BD13CF477CA923
10447:108CC000381EC5EBF62CA46F368FD9CFA6FB97E2E2
10448:108CD000B84EB4CF1FB3B94A505E3D1CABC0FC5771
10449:108CE00059C812F3303047C82328F7F87C88EF05BD
10450:108CF0008CF398C9F5B5CFCACFD9401F7893CB1B59
10451:108D00002018B0976711563EEBA1D8A360DFCC7A4C
10452:108D100048C4FB8564C9F52EFD79079D6B0AF8C729
10453:108D2000F95F63C8067070433B3BF4FF9F3678CF12
10454:108D3000C4FD10BBDF4BBCB4BD261EFA63E05FF080
10455:108D4000B38B6CFEA43E5689F62EE8C75CBED3F901
10456:108D5000BBB4E3A9E344F64BEDBB4F005E14EE0158
10457:108D6000B807167A58E4BFD7AA9F6F9231F4A4854A
10458:108D700096CFA817E3175178BA17D870BDEA7C6769
10459:108D8000A686AE65BF0BABEFFF646C6D21F8C355D3
10460:108D90007B843CA4B7C7C02FD19D17314E1AED9AE2
10461:108DA0001EDFB93D1B690712F23793B65EF73D0D22
10462:108DB0004588983FA72B4590006F6E1EBFD08DEF62
10463:108DC0008879ABF034F48B0ECF2463B02FC82DF725
10464:108DD0000213C221B2BDBAFFBD60215EB0131B05F4
10465:108DE00001E9B1F18158DCCF8899E1D15319A30091
10466:108DF0007DBE680C611C937737FBFDCF2E4B680757
10467:108E0000CAA581CC9FD0F59EB816EA752633BAEE76
10468:108E1000DC25737E22EC1D89F7C475582EB07E3B8D
10469:108E200017C6627C14DCFF34C2BD4CEF9FEBC1BFA0
10470:108E3000A2DAF1C777B0F714E0777BB47630DC9B29
10471:108E40002D1F16960FF83E0CF0734B2CF713B92B11
10472:108E500070BCBB6208C461D41A048CEBADADBC120B
10473:108E6000EF9110FE8E73359F5AAD81DA83C3C27CB9
10474:108E70005E6B383608ECA96AF3327CDF9996BF093D
10475:108E80007618FCCC6EF7EF7864F7A4EBDA6567FE32
10476:108E90008AF7DA9BF5F8AF0ED309DE8FABD4D24D4B
10477:108EA00076981E50DF0639319EE0BD7C1BCFC74E41
10478:108EB0006CF3839FC6C3FD16C907D8BBB5B682261F
10479:108EC000027E53CF29A66F8C6E5D7B10ECDFF88994
10480:108ED0006D6071D1FACCEF16797F6854EB7211ECAA
10481:108EE0003A554FD1D895436E1EAA4DD97D5BB053EC
10482:108EF00061BC207C02FE90D8FEF63CDFDFE83E88B5
10483:108F0000F278AE6F30EE83B04F811C53ED5C906B06
10484:108F100020475EEE376E5A3FBACE3C65DC2DFDD859
10485:108F200039CC10D4EBBD9777DEA4D6037BF7E2FEF5
10486:108F30003006B7D0CA382627E00740C14FFC5B791E
10487:108F40002DBEEB0D8297CE77DEEA6C94BBAA9FA66E
10488:108F50009AFBA94AB95FA794FB75C0AFAA8D7B05A0
10489:108F6000BFA5365FCDF9BE067E4F0ADF0B3085E325
10490:108F70005EC19F339E046C500E7E1D3BBB5FA76D90
10491:108F8000EF21FE2209E9FC7B93EE5DAC156CBD334D
10492:108F900039DE575A983F67F4436B45E6A462EB8D80
10493:108FA0001BE6CA7EB420FC3ED7E71C4F2A5C8CFD32
10494:108FB000C6DD03708F11D9FBE6A147D9EF5D9FA0F5
10495:108FC000FBF356EEEFB8D98AF78B5D03212E417281
10496:108FD00064DD1CE5775B97EEB6E03BFDCBFAB1F3C1
10497:108FE00060F5FBB87EECFE2EFA8100EE0B6351CFEC
10498:108FF000A660CE033A2AECAFEE97240FFC4F4779D8
10499:109000007C67EDED5637F417E47EF195FDD8BEB5DB
10500:10901000B21F7BEF5FCD77DB759C5ED4732CF0C7FE
10501:1090200068FDD7FEEEFACC7FA2EEAFCF57C4A05CAE
10502:109030000AD3AD01EF4FC6E6161BC18FB49BCB918F
10503:10904000126EAFEF86035A90274DDCEF2C3966C0C5
10504:10905000EF02ED3E958BF1924946265F76DF19438C
10505:10906000207EEFD0E9579F788F969F3B65C4F7F03D
10506:10907000E6707FEB6E78F71DE4E57613FA11AB8DA1
10507:109080004C5FACDE3794E92946F74A88EBF66E93DD
10508:10909000D1AF556DF76F7A05CBD39D14B3701F9484
10509:1090A000E9B9BB6259FB18FF2F5F03BB735FAAD3FB
10510:1090B0004BEB2F4873EF03BC66989438A29EAB0A23
10511:1090C000E1FBA2C7FC4C2F3E068207C669B5F1DF63
10512:1090D0009173A5CFA5FD1C7F3C15D743E52DEA4F25
10513:1090E000C79F32E1B9D9F3DDE332FFE731B918DFC9
10514:1090F0008B39B63DDF492D4BD2556C0C807FDBF3AD
10515:1091000034D3E7661B9435001FB22FD6A9B3479F0F
10516:109110002A63EF47543E34E562E7D820DFB5FEDD31
10517:109120004E12CA427BB4BC7F13C49376B60E71B2A2
10518:10913000E3AA343C24A9E5E7CB276406DFD05E1917
10519:10914000E9F972FB07BAE8FE9D3B91E0EFB769CF02
10520:10915000D322CF217AE6191E3DBB53B9DEA62FBF1D
10521:1091600025D31D02F956FBCCB7471628305E08E51B
10522:1091700021F1317FFA09D93503E8367E7C4017A703
10523:109180006556185FCD36F1FD9E048C5A3E54CB0BCC
10524:10919000C791A8E7362685E901367EEE1C59FE7F89
10525:1091A00000F2988AEC008000000000001F8B08008D
10526:1091B00000000000000BC57D0B7854D5B5F03E7360
10527:1091C000CEBC92996426992493F7C93BE4014308E5
10528:1091D000112DEA24040C98D209A062B538BC41C90B
10529:1091E00043B0BDB1C566201102A2861A1128E084E1
10530:1091F0008762D5367801A346EF8048B1D5FBC747D3
10531:109200005BB4F7F78B4A29528188964BEFB5F55F2F
10532:109210006BED7D92394322D8DBDB3F7CB0D967BF51
10533:10922000D65E6BEDB5D65E7BED1DB36A602C81C159
10534:10923000CF4C334B64EC1AC67F324F316FD0C69897
10535:109240004555A9FC9A5321D37CC867AE0C99168961
10536:10925000D40FE909230B59CA21DD620FEECCC29667
10537:109260005E86FD2C9A00FF85A68B64D66629C3EF27
10538:109270006A4FBF8BB193079C9EF5F09D7DF995CC0D
10539:109280002A189BCB443D336BB7C431F67C9B14B298
10540:1092900040BDB99BCD3BADD05FC56AAF6C87FCC00C
10541:1092A00076C9B313EACD6DABCCDF02F93BF7977A01
10542:1092B00064681A83E3603EE80CCA50FF9AE649EC02
10543:1092C000E3718CCD37074D0A7C674F4B6C0FA3FEC3
10544:1092D000DBB0FF65D02819E0F90A7FAE1F4A176F8F
10545:1092E00036C364F9DCBFC27F8261F96CE8B7BB4B5F
10546:1092F00066305FB617BE170E7D5FA6840E49318CAF
10547:10930000D57747B4677F330FD643405980F0E832B2
10548:10931000B13B7C369A74525D29637FC0FF26336669
10549:10932000CAF48D53C763263769861DE65DC5E735E8
10550:10933000B04F22BCD6B32613C37E3AE319BB3A6CB6
10551:109340005C0B0B45437A520E50F922F3464A6BD41C
10552:109350002C1AEF4ED66F6239D8EF80C907E3D9FBDC
10553:1093600080AE2597CEBF06F960FCC87C3055F0C1B1
10554:10937000B2532C742D8CB76C250BD58FE6A91DD25A
10555:10938000450A0BC4005E17010E62451A55C6F1AAC4
10556:10939000160EE16569509F477CAA6178463C869726
10557:1093A00037F67C650ECF279918B3C60DD11908453D
10558:1093B00070274D6A1ADB04705EB3322833985F4A17
10559:1093C000BA77522EC01B5DCEE7DB78DC6251C760F6
10560:1093D000DEC7B2A1DE176995CFE54179A3C2BCDD36
10561:1093E000501E0D78E982EFDBAD2C80FD3F9EA75229
10562:1093F000BF6E13E75FA3E263636D4897BE9001E918
10563:1094000092C01CC88F1A3EB7DBA15D19B693A8DDC8
10564:10941000607B0B6B8B0A6B5FF5A29531582F175E43
10565:10942000B007CD509529FE4C27F497F87B335B0F9E
10566:10943000F9B32FDA97607F678D6C7637D477C9AC34
10567:10944000A99BF8650DE1FF8748D7F1C84D55A90CD8
10568:10945000795F9A96CADC58BE9ABED73B81BF86A177
10569:10946000EF607956DFCD9CAFCCEA4E18EF82B3FFA8
10570:10947000079807785800F2CB550E77E3FE49637FD3
10571:1094800004DF1B7D360FC7BE7F2CF2AB59BEE766EB
10572:109490000BF0D71479E5C0BD308FFA749BC30C4D27
10573:1094A000AA33FFE3B7B742FE93FD4666463AEF990B
10574:1094B000349B655F0A87962E0D1A3FEA0F5B2F7764
10575:1094C000EDD5E7EBBBF5F946A67CD4AFF101A06082
10576:1094D0008B6A779D8C26D9E1F90AF8DB6C6E3AD558
10577:1094E00005F09A5F327B56C1E706D5BF03D7538399
10578:1094F00061E028E2D99CF9E9683FE0A52AF3CBA313
10579:10950000A988FFFB9807E1BE60AD9C4BF4D862557B
10580:109510000361F2AB51F07F67462D95776E35AB1244
10581:109520002FAF1D0F726B092D61AA623100FE1B3730
10582:109530004FFD441A4DE516A44727F029B57B4E0A86
10583:10954000AE82764B362FAE65507E86054D1680E78F
10584:109550000F623D35CABD532CF0DFCEB89A51285F5B
10585:1095600094BF2A3EA4FF5AECEAEA217CBD34B83EFF
10586:109570002D1D27002F373289C5E2BC9DFE97709EB6
10587:10958000F5967E5325F473FD5FBF20B9BCB8F9D5BD
10588:109590009C13E350DE78E712BD617E284716DF7B1F
10589:1095A00088BE4B332C04DFC9745BD00CDF5FDD62F7
10590:1095B000E679A789F227B74B945FDC2D052D595822
10591:1095C000FF627C25CAEFED4687995D8AA748BCFCFF
10592:1095D00071DBEF621880FC47102DB8BE98A329C636
10593:1095E00067C7B2A69819A588AF1B3E41F9B578BBED
10594:1095F000EC09A19C7ED9EEC963989F3C6AA10DDB62
10595:109600007F1E5F89F8DB31D921D377D9877288290A
10596:10961000DEBEEBE1BBB2E32A15D7CB91ED1CEEC564
10597:109620004ECB1348E7EBFF2A13FF2B06E6DF674319
10598:109630003A7847E1BA53B7ED9982F8FD635D8A81C4
10599:10964000EA3F2B3107E2C3D99C88DF174B8A0FD73B
10600:10965000D992CD4B6B59CC10DED7A832E1BD327315
10601:109660006562BF8DF8FE66D477F5DB81CF71FC199A
10602:10967000EFFFF656D710DF4B33364FBF06FB7FD2D6
10603:1096800048FCA5F5D3B8EDDB823F180B019E160B05
10604:109690003C993357E6E3F8975B0F8B5737E53B6C04
10605:1096A000975F1783EB7D1BAC8F62C6FEAA4AEC2B3B
10606:1096B000A0034B8B233D33D27AD4F493ADD0C0F5C5
10607:1096C000BE8779F7409A64665E09E457769642E56C
10608:1096D000D95926C287F297E57BDF04F89F53FDD165
10609:1096E0005990CF64DEB1A867D40147552CF4664386
10610:1096F00006294738CCC13D24E7200F78DA94C09E74
10611:10970000581F066786E80FD6AB0BFB39FBDE974781
10612:10971000118F0D199F8E46BDDD78F10B930AF4B4BD
10613:10972000F54A24676D1E1F43FE68ECAD630B4A8645
10614:10973000E463A387CBEF4BE44C9691CB33D700F592
10615:1097400033359BCBB74E275F9F5B9BA38228F7B631
10616:10975000BA8256043ABA3CC050BE4F2F973D08B665
10617:1097600066A7F82C9C5E16EFAB4C467EF5C81E141F
10618:10977000F17DDE8FDBE221FF66F9648F0C799B7748
10619:10978000577B36CEDB6314E539019CF71B132BC9DD
10620:109790005E99EE95695CB6242688AAA2CFFB8E6BF3
10621:1097A000018CFB1DE67DE404D0B1069437D2B10FE5
10622:1097B000C7067A9D71F827205EB4F97CDB33F591FA
10623:1097C00013E1768697DB03F089EBB1F2E1F1305AD1
10624:1097D000ADBC0EFBB9FE3A4E87D3CF9A83AB61FC8A
10625:1097E000D356D03361FAE2B49DEB1D5F9624ECC2F0
10626:1097F000EE0C94FB8379659401D7FD3D0E8E0F9797
10627:10980000A93B03D7DB9F247D3F77B6CB2C0872663C
10628:1098100069BBC48200E2E9A79ECF40F9FBC99EE77D
10629:1098200033E685C117D94E4BBFAB8DD7F198D70220
10630:10983000E3CD63DA78A1341C6F9EC7FC21CA0FD632
10631:109840003ED9DB1F663F90840CABCF367B497E9FB1
10632:1098500083D5887CA7B53BB724CA8B76E6396609E1
10633:109860004A30D4BC5E3964C6FEBCDE5C17D0BB4156
10634:109870006B1FD17FA7E01FA9470AD9A17E74C90039
10635:10988000C9DBA516DFD154285A8A7484FA53918E05
10636:1098900012F2ABD784F356242ECFCF387C7767C132
10637:1098A000BC1676E8E9989EE5E0F375B8B83DD86057
10638:1098B00053505F24B6326E077EDF10447DED8A8AF6
10639:1098C00019CDC08E31A5B86D28A7AECF8F6A33C42D
10640:1098D000E2F78C20D64F4F29A476812ACEDF81442F
10641:1098E000166C95B0CB2689EC40473F53E07BDA04F9
10642:1098F000E6580FD9DE2C6E27BA9967B34C7662B75B
10643:109900008476A286074DBE23DFA0DC3B2D59886FED
10644:10991000A45E89EC3ED9D03D07FB1D898FB644F08B
10645:10992000D1967F321FED1A918FFC2AF191DB323CE8
10646:109930001F81DCFC46F559C0A700BE9204BE1E166E
10647:10994000F265E0FB16A21BFC4838DF5AD15FADC5BB
10648:10995000169247939CF874507E433FDBC0FEC47D53
10649:109960004A32DACF90A6B6CE55B9FDDED72F417F69
10650:10997000D1575948EF3D60E8CB423B3FA9A8691F4A
10651:10998000F247D29C92B256B24FD29C28F751D6E001
10652:10999000FC1B9A27F9B81D00FD221FD599683FD1FD
10653:1099A000706FA58FDB0135B43E1A375855D46793D5
10654:1099B0007AB356217F34AE04FB08E56F4FD7964546
10655:1099C000906F9865F3A09D62B5CC2CC176AC5DBF5D
10656:1099D000CED649DD641707A6320FCAED734143C0E6
10657:1099E0003806E56CFF8E1FA11E5F5AE209A8B8DE9B
10658:1099F000045FE632D20B9D4E6F721CE0F5E0DF642F
10659:109A0000DA17758E853CA42F097A76D679939D90C6
10660:109A10009FB7C14A78EFECE2E5E7EC8020E83F45EC
10661:109A2000E6FDB1580BD73397CA030BE23D7102D361
10662:109A30007E36633E45CB773C46768CB6DE3BB3380C
10663:109A40003CF6125F165ABEB7ABE3FAA260BD27CA56
10664:109A5000066D531440BB3B1AC7E4792F0EF7A801DB
10665:109A60000049C1EC7F6FAC9E189EE7F587DA3F3066
10666:109A7000A33A8DF4EB6039820D7A57CB7BAD00C7EA
10667:109A80005AFB50B902F6A4A54712ED27CC980CAAB0
10668:109A9000F89C24C60F281BBD808F87AD4C375E38DD
10669:109AA0007C4A44FF46E8DFA68AFA8152DFE45C8004
10670:109AB000B74C6BBFAAC30BF03D6CD4F7472815ED2C
10671:109AC00031A38DF7EBDCD7376E481BD2FF600FD880
10672:109AD000B3C70FD9016BDFAFED180363453B3E37CA
10673:109AE000A17ED5F479A34B223B2372BD2665F3F505
10674:109AF0000A766D5236C90D6EEFD6A2BD2B939D3BF3
10675:109B0000059756E34A1F43FB12EC86D46CB21B3E0A
10676:109B10003D7908BE77CE384D767EE34585EC8F469D
10677:109B2000B03FD06EB7F4727B96F51849EF6A74BFF8
10678:109B300053C89F4E27E87DE4D397A5F1C8A78C357D
10679:109B400065DC043468C9F6E6211CDA7E2C12DEEBF3
10680:109B5000B2B95DDE5858B5251FFBDF2D31D4FBEBC4
10681:109B60000B3F4A44FBA4B1F7C3C48561ED96F63CB4
10682:109B70004A7858BAD738ECFCAFCB9669FE0D2F1C4B
10683:109B8000F0E27A3F1D94682D2F5182EBD0AE5CB28B
10684:109B9000C480961A2B0FCEBD15D73D9B6D627930D0
10685:109BA000BF5CD44BB89FD83B33700DEEDBE0AF0405
10686:109BB0009FB6FA16D1FADE3ADB62635908E7BCBBFE
10687:109BC000090F8E282FE2617D6155328ED35037C543
10688:109BD00081FE9346B0B3B0BCE1DEEF923F45836BAC
10689:109BE0007D8FB106EDAF0AB0B7FE15E04E8F9B56E4
10690:109BF000E381F5982AEF1BBB02F29B4690BFBFC9D9
10691:109C0000E1F46C937C81EFE0BA7F41627BD4A1F2F6
10692:109C1000CC1E6ED7DD9CCDED40EDFBCDD9DCDE9CBE
10693:109C200018E89B84BCF78AD21F8DF66F23F37E86DB
10694:109C3000FB4EE6B3A97B884E5CEEB85A54F22B5922
10695:109C40005CFD0F8CC1F2890AED2798D2FF088E7B4C
10696:109C5000769DCBB39E09FEC5FCBD2541DA3F64FB72
10697:109C6000E7237D2B841D79F6851BC6CE2B19B29375
10698:109C7000D6755983AB010FEBECEA4F6A50BEFD4538
10699:109C800021F9C62C037D93901EFF1547FDAEB30648
10700:109C9000D721FD031B8D54BE2FC5DF807C79AAAE72
10701:109CA000261FF7C1CC16C8AF037E32BA3A18DA0BBA
10702:109CB000B07D203F83C5E5632AE42705E62A12CA62
10703:109CC000F908FB6312FA7968DF0083C3F72A21B62B
10704:109CD000F2800B4E5A6809B47D153F648F1CFB72ED
10705:109CE00096821F353BC560F12FC5A6D5B3A3988CCE
10706:109CF0007CBF66E0A801E613EDEA233BB6BE5BA29B
10707:109D000071EA0B9F33A1DFE4AE6EBE2E1BC53E0091
10708:109D1000F09781F6C0DAEC68A1C7DB38BFB33EDA52
10709:109D200047B367383D19837AF6F0FDC42AAAA7F530
10710:109D3000675ACDFD5EF5C21F037290CA7F922D89CE
10711:109D40007DED6A9176F0548CBB49EAF3CA88D7B1AD
10712:109D500092279C6FB4F429212F620F0F4CC1F53B61
10713:109D600000FC857E992D52DDDDAFC1FCB68C2FF253
10714:109D7000A009E5067692CBF03BB022E0BDBCE7B38C
10715:109D800029C8376070D37A6DE8A994EB6DA4B769E0
10716:109D9000FF9814DDD485E5497714925E8D1AC7EEDD
10717:109DA0009801DF7F2EF09A6CE37E2EF7EA40D6F220
10718:109DB000121CDF77F76B387E6914F929938036F629
10719:109DC000384ADBD12FE466AB24ACF7680CEF3FC117
10720:109DD00020DF5157427297F2711EC9BB13D29E6C9D
10721:109DE00027F76799590DC289DF693F069C81FB59A6
10722:109DF000F473613F49393C3D9B1C5250406C65FDFA
10723:109E00003BF6207FF6981D88A7DA9E5F1E477D5996
10724:109E10006B61DD32DA2B1176C6CAF49987903FCF99
10725:109E20009D39B9E37EF8F6E84D073D7EA28BDE7ED4
10726:109E300088DC2FECC42AC923DB7BBFCBD6DB7B833A
10727:109E4000F97FB8BDC7EDFAC09E68754F983C6F1496
10728:109E5000FBB4734BCEC7A09EF97890BF404F570C10
10729:109E6000D92BF376477F88EB6AD0EE8FB01B8E3DFF
10730:109E7000111D40FA9FEFB6929F4E41BB07E0396338
10731:109E80001FF80122C765F27925DC3FEC337A56438F
10732:109E90007F8D779EFEB901D69DD205764F2CDAFBD9
10733:109EA0006A2CC9D9D765B607ED32C5EB40BF870626
10734:109EB000BFE29CE2F696A05CE4F35F660AE5931DC0
10735:109EC00064624B281F13CA47BBE725A1779645411B
10736:109ED0001EBE37BBFD7F41BAA598B9BCC276F8BD9E
10737:109EE0004BD85B5D801207E2E538ECBBB384FEC65D
10738:109EF000FDCF83E9C1F5E4C7B1103D3F7EC5BC137A
10739:109F0000FD3C1F171A4226EE97203F96DAAEB0644A
10740:109F1000A8AF1EB70655EEEFB21840FFCF7FF8AEE0
10741:109F200037705F31FF15EEC79A7FE7CAE9B8FFF8CF
10742:109F300078C61413CA9B85CC4F7EE7C58CFBA197CE
10743:109F4000B220F757338701C7BB0BC4C6561435017F
10744:109F5000C0FE55F05932486857A86D9027A3D9DB49
10745:109F60005103E3CE6B33D0BE647EBBDE9F7E61FDCA
10746:109F7000DD35A8C7D7B619B8FDD82E911E9FCFBC26
10747:109F80006EB43B34BC16E4C473FF689BC18BE35CC6
10748:109F90009F6322FE031205697E226D330A3FBC8057
10749:109FA000631533843035483C5DEB506A86D3CF5A15
10750:109FB0007F6DC6260BFAC306D20DE407BE60F2CE53
10751:109FC000263F6A5C3E433F629BBDA9BD8697D39AFC
10752:109FD000B9601DF051F9B50A37F8981A87F2323D89
10753:109FE00087DB0F91F35DD8A1CF479E4F2C0DEAF38D
10754:109FF000F399BF203907FD46FAEFE9395C5E5D58F9
10755:10A000009F25CE013C740ED06654DFCE4279B54E0A
10756:10A010002179B92A8DE3CB90CED36C67F56CE25FE2
10757:10A0200027D817042F873FFB5A97847AB3CDC9F9F5
10758:10A03000F27F0A7724BC37E4E413BC6D68E4C1788E
10759:10A040006DEBA420C71787FB4AFD174B72F47268AB
10760:10A0500030FF8FDF77727E5C278BF5E6203934CFB7
10761:10A06000C1E7F4B1E4792284DF6D601F00DCF3D72F
10762:10A07000C96568A74C9A69A37934BC62257F6BFDDA
10763:10A08000CAFE0CB267ABFAF39B86C12B42AB68F2F7
10764:10A090000BEACD73C13E01D76DBBFE9C0A342D0B7C
10765:10A0A0003F779A99E6BD2F2701F7231FEFFB25D2B3
10766:10A0B0007B9F95F413FCEF9019E5D70B596437E5B6
10767:10A0C000A7F9EFCF41BD1E15DAF16416DA29DC4E8F
10768:10A0D000AAEF3577A11D38AF2DECDC0BFFD9A03FDF
10769:10A0E0000763ED71E4DF609DFAEF4BB645B4BBE466
10770:10A0F0005C8CEBFB4D26FF28B4EFAEBFCE9B8C7281
10771:10A10000F5CC520343FACE973D8B508E9CB1EAEDCD
10772:10A11000EF33764EAFDD8374F6E4239D778F486787
10773:10A120004F3ED279BE81F9C3FBA9473A037D970917
10774:10A130003A9F3970553ED2F9D37D57E5239D3719A3
10775:10A140003BBCB86E7665FAF7221E4F4CF691FD04C3
10776:10A15000F22AFF9BF0E38B11FCF8E2FF1E3F52BB9B
10777:10A1600091F4E1D19CE1F5A1CBA4A6A13C9C67317F
10778:10A170007FAD5EC49F61FD6B1633F9255EF9F2F386
10779:10A18000879E403BA457263B44EBEF15C59F837E3B
10780:10A1900085578EBB3D0169E4FEEF16FB18B78505B8
10781:10A1A000D0FFA1D9FD9AFD18298FDF17783C9DE3D8
10782:10A1B000FD36ED1785BF7689E8D312FC9CDBA9BB81
10783:10A1C00025F2C75AD46E2FDABD0D2FCF75A0BFF67A
10784:10A1D0005490FB671B0E8C25FFEDD2E0ABA154B46D
10785:10A1E0000B7B2507EE1F96EEFE3006CFBB613FFAD4
10786:10A1F000494ED87E74B2D88F9E0A7E1C83E7E23027
10787:10A20000FE54D4CBD1AE0113F26F03ECD3A00A6B92
10788:10A2100050068E627F0D2EE609A0A8E8D1EFDBB4D0
10789:10A22000F3CBAD3E13C9BBADBD5210F76989267F94
10790:10A23000561AEA2796E6A0732EB15EFE33C79B98A6
10791:10A240003B3EFCDCD8FB971C7EAE4CEDFBB7C4124A
10792:10A250001FF61B9997EC802D7621971492537FDE81
10793:10A26000E6A47D0FFD40FD3F07B328AFE9EB450AAB
10794:10A270000B2980F745B3BCEF21DD507E8722E477C0
10795:10A28000787EF03C9AF571FD02F23C34DCF9B83886
10796:10A29000A7C6F3DDF0F60D6C80DAE139AFAE5F6D85
10797:10A2A0001FC09AC6AA00F75DB7DB3C68BF34025FE7
10798:10A2B00037970DF1E13231158D0F1B849FB771C9AE
10799:10A2C00047B41F68EC911CE8DF5DE6E17CB80CF652
10800:10A2D00049E6D197AE5BD60D7C1806F748EB785C63
10801:10A2E000AE7E1D0FE6FF49FECCEB72F5EB579BBF30
10802:10A2F000E6171F9C67AFC4D757C4BC22F79791FEDF
10803:10A300006C6D7F78A572EDA6087CDCF4BF8C8F9114
10804:10A31000E4DADCDC91E49AFEBCE01BCBB5C87383C5
10805:10A320005CEE07C773033CD7FD9F9E1B7CA276247F
10806:10A330001A480F7A75E7A968A7E338EDDB65B20F15
10807:10A34000A6C8FC1CBADE6E263F6DE4796BA33A45C5
10808:10A350009C2FF6FDF66AD49FFB8D0CF5FA12DB629A
10809:10A360003ACF6C949F3139D461CE19954364BF7F45
10810:10A37000D3F3F775B983E7EF5978FEFEAAEDF378CA
10811:10A380007F185DAB4AC0D02FA1389661E5F62382D5
10812:10A390004FA245FC844509306758FB91DAFD34979C
10813:10A3A000DBCBAF8A381AB789B5637CC6C3F6682F92
10814:10A3B000EE4BDC061EE7D392EDDB8E72D2A2723C2E
10815:10A3C0003FFEC22DCC00F37FDCD84DF224506FF35A
10816:10A3D000A05CD4FC305AFF56B15FBD52FE3F30C87E
10817:10A3E000779CFF07F3FF2479F06FDA78DFF49C6C39
10818:10A3F00033E046B74E189D87BD81E73B5997F2F38E
10819:10A4000048FD8CC4D76FE7FADECC25B9E01D4DE7D7
10820:10A41000FE572877A2CB073E467F0FDB6F5671DFD2
10821:10A42000817E0FD2971B92B91E533C158867B0F7F7
10822:10A430002A304EEA03FCEFD523DB87A706E513B7E6
10823:10A440000F4F8D289FFE3EFBF04799BED3C867276C
10824:10A450002ABDF9A83FD7DA017EDCF73DC5E36BB62C
10825:10A4600059397F6E93385FB2E678CD7F42F30A3C6C
10826:10A47000CBCFC723F98AE5E9F96A30FF4F96ABB62F
10827:10A480004138FE97E5EA92FF8A413FE8C8FD04881B
10828:10A490006E15557D84B7819725B633CC3FDDD8C77F
10829:10A4A000E3D4D205BCDAF70BC2DE5D94E7CDC07809
10830:10A4B000AF4FDFB358582C9842C8636897F96C7453
10831:10A4C0003ED0D0CDE3481A56323A0F6E40FF6709AE
10832:10A4D000FA05EB18DA7FCFA9FEC2BCF1789E610BBA
10833:10A4E000C8B1E8379FC1D0EE3BFB1ECF37A8FE12A4
10834:10A4F0002C6F5CD9AF3B87A8F8EAF335E8D7007832
10835:10A50000C94FE042BF4D189D66E7F1F84B2DBD29BC
10836:10A51000027EF4E313FF77CB41B417A3D53E3A177D
10837:10A5200068D8CF8DB80AD94BFE7B76571C433E6A5C
10838:10A53000D85F39F635AA6F1D8BF66EC5EF6B1DE837
10839:10A54000A7F8F45A17C51F64C8FD4BD1DE3A92ED47
10840:10A550009F84F8B09707A7A2BD9A09F62ADABF9F91
10841:10A56000EE9B3A16E1D6E4DF26F47F43BF9BEC7AFC
10842:10A57000FF36B378B3EE47FFF7CE24DA3FEE4BF168
10843:10A580007F1BE7BFC9CAE10D6CB4F2F52AFCDE916E
10844:10A59000EB5F5BF749B281C649BACD42E7D49A5C1A
10845:10A5A000D864647E4BCE903C1927E2E9001F3C9EA4
10846:10A5B000AFB78EC78188BCCDA58F6B3C9D33791C0E
10847:10A5C000C2332E4FA1760B2D0312FAE1178AF3F94D
10848:10A5D0001B449C85166775C6E15B80F8602B6B8613
10849:10A5E000CEE5B3B1BD83F3BF889F89BEC8EDE86CEB
10850:10A5F0008789F8C6DECEF8B912F00DD267E240DFE7
10851:10A60000A458984F6E676822E2F3958B06C2875272
10852:10A61000F7069DA7C422D9A09F9C0DFDEB0AD09FF1
10853:10A62000E278F75AA48BDAE1A842D43DA7FAEEC942
10854:10A63000A375DE5488FBCBAADF1879BCE0CBD164CC
10855:10A640000774662CA378C1B3EF03BF665DAA0FB48D
10856:10A6500034C056537C6076CF3BE4D7B7EF97868DF6
10857:10A66000FB7C38CFC6E36F027D1487C626BA081F6D
10858:10A67000CACBBF0FA0FDA1AC53C893D166F41AACEE
10859:10A6800048D7558CFCF0799D0E03D22553C49D9C70
10860:10A690007BE5BF47FB69BFA2F9F1833C4EC8D8BF39
10861:10A6A00006F75FCAAAFEEB6005B3FAFD4E4303FA54
10862:10A6B0003D8D030DE43779399AFCA3993D39ABBF41
10863:10A6C00005F9CC76079350FEBC785726F27500E664
10864:10A6D0009937CC3C9BF38CB45E9497A30DA8B794A8
10865:10A6E0008D8CE21415676215C1FD28E4A19FE582F7
10866:10A6F0006FB4F34900D78DFA68519E7F37D23B5A29
10867:10A70000C801D61C45FE44BBC2FD1EF6E6F79F5DA0
10868:10A7100005F91DC21F7BF895E219E4BF5BA7484805
10869:10A72000870BCEB9990EF8FE8B3C6E8FD8953EE61E
10870:10A73000B085E3FF30C56566BFCCE3D61423E713CD
10871:10A74000659DAB0BFD835FA4F929FEF4DAB6904C4E
10872:10A75000E75B8E138FD4A861FB9BCD5C8F34ECE557
10873:10A76000FBEAC8FDCCE5F4C7B13CBD5D3E98FF27D0
10874:10A77000D925EF0C8EFF77EE53987E7F17699F44A3
10875:10A78000EEE72EB1BF23FA1BC94ED1E23CAA86C622
10876:10A79000217E78D5AED941015D1C4C958D8FCB2C97
10877:10A7A000FAFE9F12F13B5A5C4C62ABBA0AE3CF0748
10878:10A7B000EE63E46FD3E276B4389D4015DF47040CB6
10879:10A7C00020F7B2F07CA883E27352594892683FD0D8
10880:10A7D000CFB07D12C6E940FBFEBC6C827F3BF3B478
10881:10A7E000CB24175509E1B7627C473CC21DDCB20897
10882:10A7F000C7BBC946E35931BE239EF611B48E537CC4
10883:10A800003CAE73D2121E0F9A02FA17F329B99C2F8D
10884:10A81000ADB34D14E7A9C56D68F11D1A5EAA04BE5B
10885:10A82000530A1665E17E418B03D914157CCA2A634D
10886:10A83000FC8790FB4B0D24F7B5F8BACE3C3588FC6D
10887:10A840007E0EE3406D571EEF11895F2DEEE3FA7423
10888:10A850007F72FE788AFB203DAAC56B68FC1246C752
10889:10A860008015C6DFFA32B7DFAB969808FE734BA7A8
10890:10A87000917FF1DC5203C37554D56BE6FC1731DED2
10891:10A88000D6D92616C27E95A015E5A7C60797B35F51
10892:10A8900081AE85E8BF3DDCB237E704ACF9232DDD9E
10893:10A8A000949EB34ADDF2184C07E6A0A41AFD64C6D4
10894:10A8B0004CE56A8C6319C8908075CAF6E6CEA27C16
10895:10A8C000C2C007989FF6E4AC590AE8897379033B44
10896:10A8D00024A8EF2FF87026E5912753189BF0C46F3A
10897:10A8E000660668DEDC1F3549F8A3CC4EFFB5F909D2
10898:10A8F000785FA07F4D1FF97D78DC3FC605223DDCE7
10899:10A900003613D9376E118FC9AA457C269ECC40BE1E
10900:10A9100035792C9D67DB98BABF0FCBD3CC5CDF3386
10901:10A92000CECFAD79DC5F4C2A1265679AE65FEA0FFD
10902:10A93000A0BC6ACD7252FB41B9BADF1CE47E2E3E48
10903:10A94000FE5B074AE91C4A8B3365CC913EAB94E22F
10904:10A950005174F987ADFC5C94298E74B41F5A8DC272
10905:10A960004E15F9A834FF77F3C3ECA4B726FF4B09C3
10906:10A97000AE8733077F948B72EA0613D8F1C3C8A55C
10907:10A98000D4422E97CE196DED12D86D6FA4FAE7233D
10908:10A99000BE8E47CF99E28479CD8EAF343911DEC0B7
10909:10A9A0005332CAC904416FE72C0E9FB3DA272D84B6
10910:10A9B0007E5BADB09EA17D825FF192BDEE9F25DDF5
10911:10A9C0000470B74AC27E676A2CD9ED856A2C9EFB5B
10912:10A9D0002D6B7E87E2AE652107642107DE6EE9CF2D
10913:10A9E00055F240E5766F94D1DE7E479C3FBF93C51C
10914:10A9F000EEA81B66FFBB299FDB873364B514F9C83B
10915:10AA000075FFC4776A812F64932748F44BB7ABC8AE
10916:10AA1000EF87EC15EE7EE847CABCAF1CE3965BD32C
10917:10AA2000EF2BC7B81339CEE3F685E537E5733EAEB5
10918:10AA3000C67A88B7E8A672D463FFB0FE62A1BF925F
10919:10AA4000BFBFBFC17ECC1CAE6596810C05D6A7C723
10920:10AA5000EDDF8A74BB30F7433A8FFD41CA5B1F605C
10921:10AA6000FCC45BC68E49312887B224C1B7DC5E3B8B
10922:10AA70005AA0F93D79DCFBD162EEF70439C4E32B2F
10923:10AA80004BF93D9BDA598CD673AD88BB98E2E0F761
10924:10AA900096A69467795A616AD3D98082727ACA710C
10925:10AAA0005F0CD28FCDF297FB4A47B6C398DBA886DE
10926:10AAB000CB95A96A581EFEDE58A8CF7FDBA3CF7FB7
10927:10AAC00067C25F0BC2F31BDDDEE771DE2F493C8EF0
10928:10AAD00033703573D03C5D5200EDA5E2E753BA8484
10929:10AAE0007F97E20D7F26F673CF4F60549EB8D7B2A2
10930:10AAF00013EF1F687E72599417BB9925338EF0416E
10931:10AB00007A764012718B2E3A0B6207EF7670FC4119
10932:10AB10005D13F47370AE4AEB38D16660D7E15A2FFB
10933:10AB2000B790FDA4AD8B562BF037E0B122D512853E
10934:10AB3000FCDE6AF46CC6BEE428B38A7AB532C6423B
10935:10AB40007DCB3F56482FADB29A29F4F5F08351944E
10936:10AB5000AF50980FE33500C45998BE65F4049B705C
10937:10AB6000BE500FE7DBEA6424AFE40A13E969E89713
10938:10AB7000E87A78A321C868FE950AC5630A98B57576
10939:10AB80000723D1F7C7C4BA960D2C44722CC5427264
10940:10AB9000EC08F48FFD1E7E5DEE223F5BA17A3B96B2
10941:10ABA0009FB714D0FD9CC6C17B478A01812B1476C8
10942:10ABB00094B397DF0FD3D6B3265F22D73348C15C57
10943:10ABC0005722E320AAF80F4C2311F53E237B5E3B6E
10944:10ABD0003F4CB768E58A17C7491EACCFEF67258A97
10945:10ABE0007C6A4116AD37A8123294A1FDF1CBBF208B
10946:10ABF000DF6AF261C7DA1F937CB814FF85DFA7FC18
10947:10AC000034BB83E3BF200DD7A11C559086FAAED587
10948:10AC1000E9517D61F9425846B3E3103F500FF233DA
10949:10AC20006B3ECC55C2FC83A9052A094BA8E78D07CA
10950:10AC3000380E5BD5345CAFC38C5BCFC78DFEC78E3F
10951:10AC4000EB8671A1DE613B8C0BF5765BCD2143CCAD
10952:10AC500070E34F5071BCCB8D0BE824A44E137806E3
10953:10AC6000BE08A05FEAB0DD40FC394DC4EF1E4EE0E7
10954:10AC7000E3B1427D7C4D6E148C4FFE587D3CCD0D72
10955:10AC8000D2B636D4CB8F596376223FFE52F0C9D16B
10956:10AC9000E81FE7A25DF5CB39F94750AE4C895DD589
10957:10ACA000864C328D7593BCD1E4DE85E40F2B300FDA
10958:10ACB000F2EF9A02A0FB0FB2DF9A839D1F713E96BE
10959:10ACC0008BFA0FE4C3B70A122E855FE3470D6EE4DB
10960:10ACD000435C07837C1801BFC6476C7A3705206E3A
10961:10ACE00007BB1453CD4E65AC89C789ABE943F30369
10962:10ACF000269E6269E2F3581520B86F703E42F168F3
10963:10AD0000D78EF2FB10DED9633ECB50B0B27B6E0122
10964:10AD1000EEC300DEBAFF9FF046DAE5978B97D6E0E8
10965:10AD20008A5CC7DAF8D28CBD142FDD38CB46F1D35C
10966:10AD30009344DC69E31203C511C1FE8DECFE066687
10967:10AD400009A21CBE46D8D15A1CFF8B12F77F060EF3
10968:10AD500098D53D61F6F8A571D42AC5690756F278F1
10969:10AD6000EB417BBB9EDBDB837A4DDC1BE81CCB65B8
10970:10AD700079E7DD2AC553BC24F1FA81B98CDBEB7588
10971:10AD8000A27CA143C45BC05C1287E2D93BBB18F133
10972:10AD90007FA73D9BCA5364AE7FD8B7B8FEE9CCE22B
10973:10ADA000F664E7ADF9540EFB825188F7F932D8CF3B
10974:10ADB000FCFC9EEF0FF2F878917EDA4D05DC2E1B3D
10975:10ADC000B473443ED22FBB2BD3BF05F965618937DD
10976:10ADD0004302BE9A6FE27E57E0BB6D7867A6863568
10977:10ADE000ED5672F0FE45D3BB861CE2BBC789EF8AE5
10978:10ADF00081EF72747C172C18CFE52F0A538DEF0664
10979:10AE0000F9AD30325ECEFF148EDBE9ECFE7D03EE51
10980:10AE10002B7ACD44072DEE31729D87C173C2C8E1F4
10981:10AE200071C932C1B36F3878AE84FFC3F92D89710F
10982:10AE30003E1F691D24292C602F1B5A071BDDFE10A5
10983:10AE4000C23FB81ED6F07DE42570CB36E28B9B6FF7
10984:10AE50009539BF46737D8EE74DC9307E9D18FFE65C
10985:10AE600075BE6A27D6AB93080F75BDF51417C6AA31
10986:10AE7000F9B99107FE203CAD42CE69E75BB345FBD3
10987:10AE8000998E3A23FAE366D5EACF9966DBF839D68C
10988:10AE9000CDB38C1F85DB3DB3D986CF308E71369E06
10989:10AEA0004369F5818FDE2F183C872AC073A823C21F
10990:10AEB000CF720EF81AF9FEB584C5DBEE06BE2BF88C
10991:10AEC000694919FAE326272EDDBD11F24F6E2DA236
10992:10AED000FC6B89B7DDF31696EFC8A77CB541223E1F
10993:10AEE0003D57CFDB1756DC3A2D2B06E5BFE817D7C9
10994:10AEF00013EED7A3FC9D7550CF3D3ABB0CE34BAB93
10995:10AF000085DFE0DCDD8CCA6F1C63E721BB8B55F26B
10996:10AF1000FB554789F2EFF17EDF18FBBB328C33AE75
10997:10AF2000CE1E9883FCFD46D94B45983F227D36675F
10998:10AF3000B873AFE24229340AF0521DC7EBD7963DF1
10999:10AF400095827E98EA2A9E2FF654AECBC172C3F941
11000:10AF500039C3DDFF8D12FB9EC1FB6C625D3FEFFDCF
11001:10AF600090EEAFF92C9207A7E89BF021F91D984DC0
11002:10AF700072A0EBCCE7CD52D0CF3DC9CBE350AB2C88
11003:10AF8000AB92517E4DF79BCA319ED861197B04E389
11004:10AF90000C6227548E47BA4EB230A22BF0794C2166
11005:10AFA000FAB5AFFA2C230699CBA6E7738D8FEA3456
11006:10AFB000FEAED6F331AC4F57E1F8CBCBDB91F818AE
11007:10AFC000C6CFC0F6B3BFA5D73783FD45ACB7C8FE23
11008:10AFD000479203F8132E1787E0E8A6759586D17D72
11009:10AFE00039B8EE3AB4753706E13019FAE81E4FA6C3
11010:10AFF000E429A20BAD133C16D24711706BF0A58368
11011:10B000006C636597C2853F8A662F72081C8E441C4C
11012:10B010009797433B2F8B1B820BC6BF1EE9C0D67090
11013:10B0200078B64B4D5C6E88FD81E6CF68D0E6DBA339
11014:10B030009F6F4514BFD7EE46BF13B6738D2DFA3AF6
11015:10B04000B81B853E9D65F13D688639DCE49C4FFC6C
11016:10B05000700B683427CCFF6FA9FE3AC447AB147855
11017:10B06000B93F8BFCF114FF01F49E5118660768701C
11018:10B0700045E2A3610479180977241E86E8D3978CEA
11019:10B08000A9761F6E705E11F369B5F3F53A30DECC28
11020:10B09000DFB550C01485FC9B5211C5A16870BD2955
11021:10B0A00071BF6440E2F78F347B2212BEC87B7A1AEC
11022:10B0B0005CE8EFE3700CACC23B820F166A7E3E4E3A
11023:10B0C000AF24019FC9200D7B1EFE60A141F3B3EAAE
11024:10B0D000E819797F4DC39B16E715892F2D4EEB920A
11025:10B0E00073B78873E591EA4960A7A7C65D8A47ED03
11026:10B0F000DC2E6ED04FC9FD4003F7DA490EC60DFABB
11027:10B10000298F2968DF4FF21C52D02EAFAD81090084
11028:10B110000DDE147E1F0DDF0F64F8B71492DEEE1FF4
11029:10B120008FFE959F4C7D82CEAB3E30703F7D247E5E
11030:10B13000F68C809F91F87D24F8A3D27C4FE2B8670B
11031:10B14000A4BE0A2CECCC16E742CC9F85EBC1E9C823
11032:10B15000AA44FF11C8D7AFBEC24D2B16015DCB3339
11033:10B16000FDBFC076B730DF64A46F5C8DDFC8CF4908
11034:10B1700018F9E1978BFDE364A177CF6FE3F11ED55A
11035:10B18000DE518F4D44BBF198910569DD7B497FDE2F
11036:10B1900025E03F0F2A3684F59FB193FE5DFCFA7CD3
11037:10B1A0008AE328D86C187A4F03FE8E0A46E9DED36C
11038:10B1B00028DE1BA7CB9776A7E8EA8FE9C9D6958F3B
11039:10B1C0000D15E9CAC71D2BD3E5C7F75DA3AB7FD526
11040:10B1D000F12A5DFEEAFE69BAFADF3A354397BF7697
11041:10B1E000E0BBBAFA1F0FFA0F84DD10F0F615C2BCEF
11042:10B1F0001788795F7F719EAEFD9F62A61C437E5CBF
11043:10B20000B081C7A557028674EF8B7470FBA209FE4C
11044:10B21000207D27B3018A076C084A9E10C3F836BD0B
11045:10B22000FDB1B4A78BF078B9FBF805AEB90634B917
11046:10B230004F170AFBE32A76158F67FD7ABAE6B3BC8F
11047:10B24000BF8BAE66B79EAE56554FD7E8423D5DED1B
11048:10B250001E3D5D6327E8E9EAF4EAE91A5FA3A76BFC
11049:10B26000824F4FD7A4D97ABA26FBF5744D5DA2A7B9
11050:10B270006B7A939EAE99CD7ABA6505EED4958F44DC
11051:10B280006F4D9EE6B42FD7D51FA4BB6F09C537E518
11052:10B2900075FC50D7BF46F700FC41BA17301187F94B
11053:10B2A0003FA47BE1283DBD416F8D1A359EEC8D1288
11054:10B2B0004C671708BBDE37BCBDA1C99F70FD1EBE21
11055:10B2C000AF1D492E5DA2CFC43E77447D16B1CF7D20
11056:10B2D0008F81BEA5413690DFEA56C19F87A338DE35
11057:10B2E0003FC7A2ABA11ED4990070BD8770C338EFD1
11058:10B2F0004515933FE2BBACDB88FDDFCEFA289DC34A
11059:10B300000628F53307E9EF79CC43E902E63309FF74
11060:10B31000C4F45109E8B7E8AF40FD7F61EE5B1FD090
11061:10B32000B9D61BF157F40EC547787E92C7D849218C
11062:10B330000F4EE0390AE4CF5A07F5ABEA0AC3DB49FE
11063:10B34000E16F9C3749223DCDE4288AEF9A778B4400
11064:10B35000E744F3FE93A78B46493C1E24226D6DD62D
11065:10B36000F0C7F7473B47A904471AEB16F61CF3DB77
11066:10B3700072A81F7EEEB1CB44FB58B785C3F7ACC4AF
11067:10B38000940971741D8EE8EAB670789E35320BE22E
11068:10B39000F369E65791180F2820A2F83D8C22E48F1C
11069:10B3A00079FFF95636FAE9A2A25E98557D359ECB13
11070:10B3B0000456919FFC7B4CEF27BFBD49223FF9F714
11071:10B3C000004E48DD0E8F1BED7C2DFFB080B71AEBD1
11072:10B3D000C1F7247793847EA97F587FFB7FC8EBFD5C
11073:10B3E0009DFD0DF6C3385CF883F4D3FC9E85061EE4
11074:10B3F00027317037DF1FEDFE1EE3FEBBE640650020
11075:10B40000CF45653094308ECAC8EFC7EF1CC5FD9E8E
11076:10B41000C9AC8FFC0BECA866D7FA49FE9688FB17DF
11077:10B4200067C5B9E2A22E0BC3389D927D87E2F01C5E
11078:10B430007111F0601FEA61C54FEFBF946C792D8EDA
11079:10B44000FBFD8C4EBC57A9E9FF91F9546127C3EE6F
11080:10B450003100DF350D677FBC5AC4E3035A5BFA46FF
11081:10B46000E139A006CFFD2DC7282F2B1E86E797F8C0
11082:10B470003E5478FCA3C905E561F24EB141FB303979
11083:10B4800064B4F9E89195352D7D74BE6814EF58AD1C
11084:10B490004D5BEEF087D989874609FBC71260B84F2C
11085:10B4A000E02A0A53E524CAB5FF627C1F6D76433F4C
11086:10B4B000E1F2F362020B3F1F686F394EF0AE91FC70
11087:10B4C0007EECC49CCB4256A08F59C1BBC0F07DCB53
11088:10B4D0000DC7308ECB645FEE09A923E3CDEC562E69
11089:10B4E00084CBD3B723E4E94F5A068A719CD6967E63
11090:10B4F0000D5F0CCF6B03C9DCBE6E6DF984BE1BC043
11091:10B500003E447E7B754BC12115CA3F80BFF8DE8E5D
11092:10B51000D9C5E162175DA457E7083E405F5C3AF089
11093:10B52000CF07CD46E2B315E9363A2758F166DE215A
11094:10B530002FAC67134C57FE06700F8DC3F16412F2E7
11095:10B5400014F8C987F2C194A2D079419C6306D1E96D
11096:10B55000EFED4FC3AFC9CAE89D2453BA8DEC822BDF
11097:10B5600085F36FA3F83B4083F6C94517C9FF150261
11098:10B570002FDABB4F1FDCC3C8DFB3E25EEE375C518E
11099:10B58000CFE81E026B869F8A21BED1F44C02BE50CA
11100:10B59000031F3B5A60C541170FB55898BF00EC1008
11101:10B5A0008CDBCF19A2638757716288C1C66A571DA9
11102:10B5B000A60F4D38D181E2EFE1895FF4618A67041B
11103:10B5C00038BEA38905D13EA6B37F18DFB904F23097
11104:10B5D0007E8C288FF1F37CAC288F9DCDF3E9DEE7DC
11105:10B5E000A46A042CE23C2BDD16373517E5F402C6BD
11106:10B5F000EF818B7720B60B7D916A8BABABC6F2DB0C
11107:10B6000019DD0BD1CA7F2ACA936D1FB5E7A01E9919
11108:10B61000A56FBF45E021C9F651C7243AF7D2976B11
11109:10B62000E74A09B6F3C7A87D89BEFC51D1DE6E3B5F
11110:10B63000DF3709CB73F5E33F28CAA36D5C1E321FC9
11111:10B64000E3EF1588F20744B915CB717C0F2F97B53E
11112:10B65000773944BD75020E8CA923BFEB28EE77DD48
11113:10B66000D1622921BAB45C24FA3CD4C2287F6B5140
11114:10B670001CC909430DC7779C8BF383A3990DFB4E1F
11115:10B68000C1AD42AEC5A8FD5EEF30724F2B8F73F097
11116:10B69000771864B789F8C96C137243ACC741B921F4
11117:10B6A00035793893713FFDE5F81A16DA05B48F3213
11118:10B6B000E007F93AED1E03F387C9CB946551CC1F1F
11119:10B6C00056DFBD204E974FBC3D4557DF352B5B57AE
11120:10B6D0006E2B2FD295B35971B46E960BFE8A2A2920
11121:10B6E000D3956BEF43B0DDA29E58BFC6DC6B74F5FB
11122:10B6F000CE17AAB1C8E327A782FEA178068F05E579
11123:10B70000C3727B7612EA9FA75B2610729E85750531
11124:10B71000462B7BC6C9E3DC9FC1F34328FF598B97B7
11125:10B72000BEEF817215D25DB0EE54A8DFD5E2A0FC69
11126:10B73000E32D6E4AB7B7A894FEB4A590CAB7B47803
11127:10B7400028FF18F48FE9A3D00F7E7FA4A586F21BF3
11128:10B750005B7C947FB86536E51F6CF153FA40CB12E1
11129:10B76000FABEAEA589F26B5B9A29BDBF2540696B15
11130:10B770004B3B6F57C4F5CC33E25EED3395FCBE7C9A
11131:10B78000241D3B8B841F52C4ADD887E2563A8B30C0
11132:10B790006EA5BB9FEC702D6E05E74DFD59F9FC239E
11133:10B7A000FB7BAA88DB6F45AC6F55345FCF743E9C42
11134:10B7B000D7E3591D0D7C9FDAC4E990D53340E5C924
11135:10B7C0004B382D9E12FCC95C01965641510254EF34
11136:10B7D000ACD45715CDCFD529CE91B9619E15E2FDD8
11137:10B7E0002662BBA001E1522670FDA9D17570DE4E24
11138:10B7F0000E27CE7F3878F70B78E5F26EFE2E4B4D94
11139:10B800004708D93ECADB44EFB25866FB420AA42E71
11140:10B810009F9FDE8928BA38053667206F2E5EC75491
11141:10B8200048D396E9F76D290BCA74FB22F9E2434C21
11142:10B830000539602BD1EFAFA27297EBDA59D27EA80F
11143:10B840002B37B956EBCAE7DD95B5C68DF84CE5E761
11144:10B850004BE60DAB5832C0B5B07323C1F59198C714
11145:10B860005949A5FBE5817D5ABC05DF5F3C29F40BF6
11146:10B87000B36C207BACC0C9B3F9B10103EA874FFFB9
11147:10B880003596E4D2138F1B82E84706F164C0F55F5A
11148:10B890000C661F9697B27ECA63A80CE6C73255C6DF
11149:10B8A000FC383640FB2BD85FBC5F8471ABB2FF71B4
11150:10B8B0002BE4CFA4FB9FE4717321D29FF9829EF900
11151:10B8C000DA7E6AB312E95FEE2F22FF8DFE7E5D9B6A
11152:10B8D000D85FB459B99F6E95B32209EDD6B323C48E
11153:10B8E00039DADDAF1E5D00F8B6271FA274D02FA78E
11154:10B8F0001A86BD3FFE4504FF8F026617FCFF05F266
11155:10B90000FF99F2B713D10DD5903B40EBE0ACE47555
11156:10B91000CF45FCBE2E737E841D17CE4F11F855F611
11157:10B9200055BAE7021E9537733C013634CE132DC746
11158:10B9300073300E41CBE78B38DDBD2DC9B9D561DF42
11159:10B94000D5624EC742D65783FAAAB0C4E00962C78F
11160:10B950005E87CE8F61CDEDF0E27B084A19F3A098A7
11161:10B960001BC53A56A3EE56FE26539C9572F86AA65E
11162:10B97000C27EC6660B318C4BD3FA65C21F728F90A4
11163:10B980009B5F38AA63E99DCB9441F9873A927D6128
11164:10B99000F3F6211F7DD169E4F33AAC2F2FB471BFC8
11165:10B9A000E1A242535095F05DB50E7AC751D921B14D
11166:10B9B000B42C846312E1811D8C263E8CDE3C9A05FA
11167:10B9C00060BD943BFD9662F4DB85D483861CC193F5
11168:10B9D00050AFBED8B413EDB302C48B0DF1726B6ED1
11169:10B9E000350E9D5B48F85D28E63DBE98D3AB2D3DF6
11170:10B9F000021EE6F1E27BA78B3A353F8E7E9E0F96C4
11171:10BA0000577D07DF856CED93B95A8BC0E77A63DF0A
11172:10BA1000E8B9D0F5997E804B2638C717A30DBAB97F
11173:10BA20008205488FF3F9D53F2EB1AD5924976A4866
11174:10BA30008F8F37B0F0F3532D9D58CCE5EFB1221E18
11175:10BA4000876A771F257E1CCA1F39BA00F0F1B481BE
11176:10BA500015D2B9B181EF8FB5781D19FD0078AFA16E
11177:10BA600058C845D6C6A6A1DE761A28FE54EE8AA28C
11178:10BA70007BB3B253A1B8F7365BB5E34EECC7A1D0A8
11179:10BA800039D11479621FDAD166A7611CDAE14776F1
11180:10BA9000FEB00FE386E47485A1DFABCDA1703B243B
11181:10BAA000CD40F1808AB3DA82E74AF9B6139588CFA0
11182:10BAB000435D3FA07722E4EF8B981DE117330A9294
11183:10BAC000B5B126EA3F90A688F766BCB56313C59169
11184:10BAD000888AFBA19A4F70BF7DC471DE8AFB02D5B4
11185:10BAE000B688FC81F715F37DA211CF0F21FFF8CAAC
11186:10BAF000F34E945FAF77AD89CB427B3AA8902D523D
11187:10BB0000F8D7D6147A0FA1CB44EF356878CD0C283E
11188:10BB1000BA73C8F4667DDE1C711E698CB827B75CE9
11189:10BB20008C8F2797A1B0F918DD7CFFC65C36DAFF51
11190:10BB3000DC572CDEE914F97B447EAF3190E201FC46
11191:10BB40001CEE5A9489F3BAF0829FE2CE47B2FF27E7
11192:10BB500015AB62BC80D540EF0287AC1887BEBB85B1
11193:10BB600079D0CEB30415BA07B047C8B35C1BE7FF62
11194:10BB70003B4AF87A8D4C733BF8BA539E890A4623A8
11195:10BB8000DD1CDD650158E7C5AF4E652AE8C15C875D
11196:10BB9000D780FEF7DC669307EDCF29BFB0119F9CDD
11197:10BBA000B7F1382EA5F90115BFB7EEAC2854C3E0A4
11198:10BBB0000EB6383C289F76B6583C181B1F1C41BE59
11199:10BBC000E6380D143FAF1A783CE72EB11E7715F317
11200:10BBD000F788760A39B34B09CC403877013D316E8E
11201:10BBE000FFD0066E1F2F5F65213896BF9E43F6D5A6
11202:10BBF00048787BA2C5EDC94578361852D05F55B953
11203:10BC00002E773DBEDFB1DCCEDF3796638B1EC3AB34
11204:10BC100011ECD74686F67C6BCC359EF961F25D8ED1
11205:10BC20009D58887C25CB8114F4E7F43C7DE1268C7B
11206:10BC3000E705FA6DC57CA8F8839B307E77AF3D9011
11207:10BC400082F1BDC78A3FE2E50981AD18DFDB577C91
11208:10BC50009297A707520C903F5E7C9A97E705B662D1
11209:10BC6000BEBFF82CCFE3D91BC8CE53C5E76F0AA0DF
11210:10BC7000BFC5E4598202F9E7007F092CB16E919E9D
11211:10BC80001678D1CA9FC3EFB001DB2FD2C8F283A2CE
11212:10BC90005DCF08E52F8AF2DE11FA7F45B40B8DD017
11213:10BCA000FEB068776484F64745BB632394FF4A94EB
11214:10BCB000BF3142FFFF2EDAF58DD0FE6DD1EEDD11E2
11215:10BCC000DAFF56B43B3E42F9FBA2FC3F22FAFF40AA
11216:10BCD000D4EF17DFB3ED1BDE47FF7D36C811944B61
11217:10BCE00085F60D71B8CE77B69713FFB756F0732A65
11218:10BCF0008DDFB32546EF0EDF56C2DF3BBBAD84CBF5
11219:10BD000071A584F339F0E1C3C877CBDF94299EA8ED
11220:10BD1000D5E039154439BADE40F6C0F2D7F97E7D58
11221:10BD2000F93A25187E1F486BAFC1BF06E103C66D07
11222:10BD3000C314D6DB97C5FC9CD1EC767B6AC3E4992F
11223:10BD4000D1A1CF83BC602877417E53DC78E1BAAAC9
11224:10BD5000F6C2723CEB339005A2D45B42F88E886247
11225:10BD6000177AC151DE5188F0D9147A3F4193F3CC50
11226:10BD7000E6D6F935DA6C0ABD2727DB79F9945F4CF2
11227:10BD800074A09DD5C6FC7D5E6CEF56C88E3FD45E18
11228:10BD9000E640B967B22F70E0FAFDB894E3BDBAA1EE
11229:10BDA000300AE5B5FCA081E4F711075FEF3BDC3C0E
11230:10BDB000CE0AF40ADDAF0279ED411D51C042AB500D
11231:10BDC0006EEE7DE8E05CEEE763F6B115747F493B0B
11232:10BDD000579794B07D406D09C74FA6D0230AEA1744
11233:10BDE0004877958B7B3701EE8FCA54983B35ECFE34
11234:10BDF000706D89CCEF3D69E7A1722DBDAB95B15255
11235:10BE0000D19D23A4DDA3CF9B22F48612A15772DA21
11236:10BE1000414EEACE4F1CBAFCB74A849FC7C33C6868
11237:10BE2000C74EF9C5069287E751BF4923CBBD41F9FB
11238:10BE30002BE4F12E4400CAD100BFDF7E6843D9AFA6
11239:10BE400090DECBD719E83DEB2B95A30AE218F090D2
11240:10BE5000E797482FC0845270DF74393CE4197D7134
11241:10BE6000F4DEC765F091F768791CCADB3CBF42FD80
11242:10BE70005FA2372E83AF6725CF713FD2D11925EC52
11243:10BE80006A6000F4DBC54575E1F9BE49F853B43882
11244:10BE9000652549E1EFF58B7BB2B2E0E3FB99578D65
11245:10BEA000CBC1F78A9AC8BFBF62DF3D6EB4DBD71A39
11246:10BEB000FC0ECC1F8B9B3680E32C874D3FE26F2F0F
11247:10BEC000F641EF72BE7D33FA4DBA8326ED5DCD109B
11248:10BED000FEB30FE38FB4773BDD64AF897CD5CDD55E
11249:10BEE00030DF6EC5518C266847C9E44D46B049F72E
11250:10BEF00099D8607DBCEFF7F41183E8EFC64DD520EB
11251:10BF000097F64531DDBBA5FBD0CF4EF9E99BF09DFF
11252:10BF10005218EF4619F6663B9F99B5C976F5103C65
11253:10BF2000BB9FFDEEA655E8B013FB1427E3EFCD9FB2
11254:10BF300051FB6390B4B05F595F82FBF5AE1389E1AA
11255:10BF4000FB75AD7EACA8DFD03BD0F08C4AF53B4A08
11256:10BF5000801FEA7B06624A08DF0315E1F563841F50
11257:10BF600020ACFEA6AFAB5FA8C1F3CCDB3797F0FAED
11258:10BF7000DBB0FE59B53F91627A22E089BFB4FF9DE4
11259:10BF800004FF08FD1789FA67426F53FDB3AC3FB158
11260:10BF9000348BDA3D85E39C7BE3ED0A31EF443CC70B
11261:10BFA00079D7E6FD197E6FC13E707FA734A9F8BD31
11262:10BFB000DBD2E140FBCD6AECF0A11CCEC5F7C72671
11263:10BFC0000CA5CFA2F2187FE9F7487EEEB6B0F85A7A
11264:10BFD000E4D76603ED6F7AFA0D0F205FEE489BE819
11265:10BFE000C0FDF33E535F5909DAAF076C64BF1A32E4
11266:10BFF0003FB5A2DFDC5CC0D7BFD5D9E42981BC3511
11267:10C00000BD84DE0F95EF5DDE4DEF98DFC7DFF752A1
11268:10C010007E6CF2EF46FE0A2D2F5C18B6BE7797F2C3
11269:10C020007B96EB5EB36DC0FDC13AA3A7A300ED7094
11270:10C03000BB42719FCA8F0F4E23FBF0E70646F21FEB
11271:10C04000E65905FDB6CD55E8F7300C94CEEB2B2123
11272:10C050007CF87C55502F234191F07ED0FD8ACF8211
11273:10C06000E71D6661D7EDF0F0FB61DAB81784FD7962
11274:10C07000A184BFB7B623EDC27B8B5DF8FE8389EE4A
11275:10C0800075DA961942A618BCE7B6F3D462A46774B1
11276:10C09000FF3ABCE71C95A238707E3FAD85323A97D7
11277:10C0A000EBA6EF817A03ED1BE29719BCE87F8CCAFF
11278:10C0B00035E9FC1D361827DC1F1233DAFF47A4E7E9
11279:10C0C000B837951B11CFEEBB0DF43EEA83EE772D0A
11280:10C0D000068033A65CDFDE3151DF3EAE5A5FEEAA4A
11281:10C0E000D59727CED297BB6F3745F875F4F9268DD3
11282:10C0F000AF4026D8404F45F1221665BBD082FB9E4B
11283:10C10000B5AF4531A2CFCA4D1D05B83EA307085FA4
11284:10C11000514551E417589B6C22B9BEB694FBF50FFC
11285:10C12000A79B6EA43CCC0BF96347DA51DA8F5C8293
11286:10C1300017DBA9BF62FF3616F61DFDF2A3BD9652AE
11287:10C140001E57C3DC15E8C763240F9F95BC9E438828
11288:10C15000EFB7B8BF624733F7633F388BC741D20CA4
11289:10C160002A70BDF3FA31960D7DB82F8BB1B5DF8DF6
11290:10C17000F19D91784D14E70D3BF0762FF29D9FBF16
11291:10C180001BBD46BB6785DF2BE8D604BD8B366BB481
11292:10C1900078EF4FD809B1EEF892B6B0FB1A89C26FAA
11293:10C1A000F2F0C47956D41FFBC43B2283FDA9342886
11294:10C1B0000F79457F54A9E6AFE1ED3769E73C229F4F
11295:10C1C000E0E4F97D47E26EC4F5B569565C19EEF717
11296:10C1D000D70AFB2E36CDE41D05F37AE49829208D8D
11297:10C1E00081BCC28E18C12ED817C7C735BD1E15C059
11298:10C1F0007B818FB8CBE99E61AD80FBB94ACF3BB85C
11299:10C20000DE07601DED84FE1F7179AC65E2DC340051
11300:10C21000F051A8159828876ACB68BFFB88D763457B
11301:10C22000BDF9489AC78A71DAD664C581716B716E9F
11302:10C2300085DE897BC4E277A0FD13078AD484E749B1
11303:10C24000E91D53E97E1DE0DA50C18F1A98886FC44A
11304:10C25000F8C27881CF1DEE050E7C97C195BBFF5FBC
11305:10C26000D04F1F8FFDC5F0768827A7C0D3AC52955D
11306:10C27000E07689FEE3173C47F5F1A7AD22AC3F41DC
11307:10C2800047D35416C47D9A36BED6CF60FFCC4BE759
11308:10C29000006B7EC5F1B62A9DBF8F65BA8BD17EEE4D
11309:10C2A000B94AFF5EE4B381E428927729EE942AE448
11310:10C2B000A394635B67E0BD8B35BF8AE2E32CE4FCAB
11311:10C2C0009EA230CB7538EF04BF03F118B95E938F8F
11312:10C2D00074D421536A74895CBFC90A6B97E32E5DDD
11313:10C2E000C7C96E5755FEE861D673C47A493E36F029
11314:10C2F0007DEC3F725D6F8FFE602CD72361DFE5CB55
11315:10C30000E7DBA4FE75248793155A67E911E3E13B47
11316:10C310007B98979841C5B8E8DDA54EC1C7A0974A5C
11317:10C3200091EF1D936CFCBC9DF8ABEAF90DDFFD3578
11318:10C33000E42FE0EFF3815AA9C73AFA482FF6F80B39
11319:10C34000B0FE36C5FF38FAD3B71D4FA2F72BCDD1BB
11320:10C35000FCFD5153C47B299ABED85DCAFD486AC40E
11321:10C36000BB9BDF34ED4E4B2B7678B0BFB77F6B496C
11322:10C37000F8C7DB3F6947BA57D9604D3F5372F32680
11323:10C38000BCFF6C7D93973F0DF980827859467E976C
11324:10C39000C31977D2FC5BDF33933FAB54F66CC63CDA
11325:10C3A000FBBD95FC717B0F4C9C8DEBA4D55EA1A2CF
11326:10C3B000BD7F40ACE37F1569E4BC6493C78FF64052
11327:10C3C000E4F7674B35FF9BE77817D0B7749789DEA2
11328:10C3D000711A8C8FE8B2F2785461872E10F26CC11A
11329:10C3E000C1F5198718BEC351F75A29B45F60AF4E23
11330:10C3F0004478522F4ACC0FF26F9B389F4D753D27E2
11331:10C40000A19C49731DA944799FCEFA56A1DC486FBF
11332:10C41000D29F97A55E54A8DDBE142FF5873F18075D
11333:10C420006A62624DC7F9D92A94F329FCBCC5E48835
11334:10C43000E271A1EE6ADD3D6AED7DDBB7851C350159
11335:10C440004E8D6590DA147E6F3FA2FEEF443D19FDDC
11336:10C45000F6E8FC771C3D4EFDDA944FC3E34D715F67
11337:10C460004A426B193FFF043C05701FCA62E3F8792A
11338:10C47000A9D7AB86C7DFA682DC359761FC4980E28D
11339:10C480004492C5BD082DAE0730E044BF9B16F7B1FE
11340:10C4900093E9ED112DD5F6E7B9CD32ED3B8A5FB5C5
11341:10C4A000F2FD413B0B5A25F48731923BB91BF8F959
11342:10C4B000B4E617BB0D1713EA257C0F97C6EBA63819
11343:10C4C0006ACDAE02FA92DC5917F1CE94F68EB661BF
11344:10C4D00034E78B6D2D0EA2A3569EE68FA4A3FE9C7F
11345:10C4E00053AB977A3195F9E3C3FB0D527FA9CDFB8E
11346:10C4F000891F522F6650F9B616F532FD678FD07F2F
11347:10C5000032F1CBC8FDA751F9F6D0BBCEE9808A9FA6
11348:10C510000EEC77FA54942BA1A99E61F09C7A8F5E61
11349:10C520004E8EE9D1CB5D0D2FDB14AFAB0EF0BDED20
11350:10C530001E83A78B61FCA9BE5E4DD66F9CFC5D6B14
11351:10C54000AD7EC83513EB2FE3F5BF754A5FDF577932
11352:10C5500020B23EC177FD457DBD48FA44C20B70252F
11353:10C56000DC1406D7248BFEF7DACD9E7B095C09B775
11354:10C5700084C175835B5FDFBF6A78B86E2C347F2D12
11355:10C580005C5ABDEF4CB8B27A91F39859631E01EF33
11356:10C59000BCFE2DB3AFACDFDB967C7DBD3B9A23C7E1
11357:10C5A000096871DB3A7B24BE99DBEF0E36407126B9
11358:10C5B0009ADD11C71C22FE8BDB0DEFE07F93197B08
11359:10C5C00060B46FCEE804C4BFF7F64755BC1FC3F58F
11360:10C5D00015ABE5EF56C2BEA434FC5DEE21B8565350
11361:10C5E000BF2F61BC13E9598B07EDCEE25466494673
11362:10C5F000E3CB1DCCC6F7C7EA476BF29AC79717097A
11363:10C60000DC3D9BD2BDDC49EB3C1887F07CD371EF5D
11364:10C610001DEDBD67F4F8A1FA23F95B343C994CDDBC
11365:10C62000F47B1D06EA6D1ED40FEF6211B4DB75B307
11366:10C63000398476B516877A3C7ACED10495DE3D589A
11367:10C640008DFDCFBE65EA1ACC4B87E3D5E536BC3706
11368:10C65000D5AFDD2F5D83785B66F167261AE87CB580
11369:10C6600000F7C3CC172F2E23FB4A878BD3D0E0A92A
11370:10C670009638FEA3D2FC0FE338D586BE1D3EFCA63D
11371:10C68000F4F17DB62381BFBB84EFEB0CB3FE353CE8
11372:10C6900054897E0E193D5F0EC0FC0E6D8CA57BF893
11373:10C6A0000BE26F99836FB22C34F812F1003D0CEE5F
11374:10C6B000ED04B76D6E6632C26D14705B1204DEBDA0
11375:10C6C000B95F07F760BCCC7D92F67E3AE59F0F38E4
11376:10C6D000E9BEBBD9F0F9BB33510F971A3C68776EAE
11377:10C6E00003FB02DF77FB3F02DFDBF18C258EBED33D
11378:10C6F000BB6F6E71EFCBBDC940EFBCF8AA5E203AAC
11379:10C70000ED6AB07970DF3E97A9F4EEEA7C710FE62E
11380:10C710000F95FFFD723FCCEFA5D1FE83388F3BE232
11381:10C720000D19EF121CFE627A476BE295C5CF6AE7DE
11382:10C73000F033847DB050E07126F352DCEE4DCC6FC7
11383:10C74000C471DF3E6BF2A25DFAB68847BE8505E88C
11384:10C75000FBAD2C48E96D2C44F5BF872FCA42FEADD6
11385:10C76000E8D1E9CD005FDD630579B81EC3F0FE06B0
11386:10C77000D219F8E50E17E7973F2621DE3B13AE8866
11387:10C780007FEB248EBF0746FB7FC3D7ABEAF2204C7A
11388:10C790008E4969E847195C3FD5099CFF1447DED7ED
11389:10C7A000AD9FBEF3DA7D7FAF2DB902DFFBE23F37ED
11390:10C7B00078EFA278718CCB77011DFA547ECF11C42B
11391:10C7C000863D0074AAA994296E6FED67E27E363A21
11392:10C7D00031A0DE2FC7CAF43E99762E395DF4373D7D
11393:10C7E0008DDF57ACAD9CD9160B7899F2657F79082F
11394:10C7F000D29A34FDFDC5A9AE2E7AD27C5AAEFEFB8C
11395:10C800008DAC830E886B4BF471E6D323FC9F87704D
11396:10C810006CE0AB8BA345BC64112B0ABF6FF01DD13C
11397:10C82000F67CEDE7A673307EC918FF57488FE5DF29
11398:10C83000FEC31CDAD729ECCD7130BF867F97C99E25
11399:10C84000FCA80566528071D516E60583FF24D8152D
11400:10C85000983FD5E2A6F434D801987EDA5248E567CD
11401:10C860005B3C949F35C6671903FDCE6BFF4C417D41
11402:10C87000B4568BC716706871856B45FCC40AFBF211
11403:10C88000E318BFB08202DE192CF68E2908FE9D3D0A
11404:10C89000DD473185EF32EE43566C94C8AFB3F08874
11405:10C8A0007F0D9279F11BFDD3514C8CFFCD8944DC77
11406:10C8B000A7D7A31D0BACBF22CE9B340658C0DBFB11
11407:10C8C000E1D178A8FFC7960904DF272D5E82EF4FDC
11408:10C8D0002D3594D68FF1A5533DF619BDF3F4ED67D0
11409:10C8E0003E54F0F7B34DF64AE4BFBFCECB8241C011
11410:10C8F000EB662397EF9B41BEE3FAAC2C9DB1FD1E86
11411:10C9000086F2D75F80F3BC296EFEE478F83E7DC2E4
11412:10C910005C05EBDDF225E8A0AC213EBC1C5F9F79F5
11413:10C920004522FC9C79C549F8D0F0542FE875E660A3
11414:10C93000F177F0DDB3578EC9147F7AFEA281E03B18
11415:10C940007F3C8AE25323DB2F3F909384F6D89F806D
11416:10C950007E78F0B1FC4031F9E3FFF4ECBFA8E1715F
11417:10C96000BF7F8AEBBEF03ECAA9FFCBE514D89B2758
11418:10C97000B7A21C4B4BA1F77B06E3D5585334EAB161
11419:10C980000693585F206730FFA728BE0FAEF8796A7C
11420:10C9900015AE171C0FE3BDCCE2F760407F1FFC1003
11421:10C9A000FA3BB8D54DEFFD7CBAEFB16C1C7F6FF749
11422:10C9B000C2F7B742FF6782FCF7609C61DD675F44A6
11423:10C9C00079BADB467ECBB512C085FA744F0AE50B07
11424:10C9D0002525AA999C19411E8722A90ABE7FB6EC7B
11425:10C9E000B92D29C85F784F1DE3EA5FDA184D72EA66
11426:10C9F00025A3E78366EC6F3BEFEFC987EEFDA80741
11427:10CA0000D307EBCBEE45393786C7312EF8C9D22292
11428:10CA10006C0FFA9A7EDFF3D3CF4B21F48394761E0A
11429:10CA20005A8D714C63B67D68488174EC6EA915D33C
11430:10CA3000E2F469C7D07F70D71895DA8F7B264BC692
11431:10CA4000D8F4A294E0FBD7F3B8119D7E2FE9FCAC9B
11432:10CA50000AB7999A9E2F92BA4F77E1BE38E37819B8
11433:10CA6000BFDFC5DFAF3ED03BF39DDB18CE032C0804
11434:10CA7000847BAE89E22E5830D085743EE32FF4D00B
11435:10CA8000BB2ABEC016E4AF33FE44BA5F78D010882C
11436:10CA9000C1DFE314F880FFBEA1E777BF1583F1146F
11437:10CAA000B1FB8D0C7F2F76FDD88129141F92AED259
11438:10CAB0007E3C7DC70D35889F86FD07BAA89F651609
11439:10CAC0000FFA63971CF89CEEBDB0A93C0EF5CC7E26
11440:10CAD0009E7FA0DA4BEF9D2FE9FA33CFF7F928EFCD
11441:10CAE000930359747F623EB7771E13FA8CF58F66F5
11442:10CAF000E1EF2169F47A008AB17C73562019DFBD19
11443:10CB0000D2F420E8AF8770FDA1DB91DA3B66F27BBF
11444:10CB1000F257A8BF4C421F69FD3D66E2EFF4A21830
11445:10CB2000C1DF8BB3CDC4F5EE1E9037C82F9ADE85DA
11446:10CB30007177E0BA3589FB32A9A064C7C27C521F65
11447:10CB40003373F97D85E347DE67D5EC90D9F1AD7499
11448:10CB50006FF5D354FFCF701CEDFE2A533CF4AEE0CA
11449:10CB6000EF53BD4F8F49E0EF75E01C402FFE02F3FD
11450:10CB70000D32D85139617694E5CAF4E2DF52BD072F
11451:10CB8000709C2BAD1F2987270AF857D80D8487156D
11452:10CB90008F9AC91F3651DC439D78FE7834CA9315AD
11453:10CBA0007F2E23B9D2CAD8B0F879B985C779FF1BCF
11454:10CBB000FA1120BDF68B7E99F623470CCB8E827E30
11455:10CBC0002510C87F38D01A5B4E792F92FBBA2F0CF4
11456:10CBD000C3EE17B514E8F52EC9E92FF5FE87EBBFB4
11457:10CBE00074D0EFCD64B6B82B9AF7D0FB3EFAF96B50
11458:10CBF000EF6CC1FCFA51BFAFF8CC40FCBBE2B332E2
11459:10CC0000929BBD57385FABCB7B12E18C9C0FC0FF72
11460:10CC100029D22712FE417E1FB832F8BF2F31FA7D8C
11461:10CC200043A0AEC8BFDD2BDE31E85D5A42EF691C80
11462:10CC3000C4F748506ECEE0F78E7AC5FDE4DE0407F7
11463:10CC4000BDF7F19291E703B78AF6E27DC8DE5B5348
11464:10CC5000F87B1DE6A65F9762FFAD3C3EAED718A4F9
11465:10CC6000DF53FBFF00D94A3097008000000000002E
11466:10CC70001F8B080000000000000BE57D7B7CD4C505
11467:10CC8000D5F7FCF696DD64936C42C88590B0B91078
11468:10CC90008206DCDCB806582041B468038802C6B8B6
11469:10CCA0002101426E844BFBC4969AC500A2C51A1E90
11470:10CCB00011D1A22E14282ADA50115183CF0A4269C9
11471:10CCC000BDA5D5FAD86A692278E59210B40FF6E1CD
11472:10CCD0006DDFF99E99C9EE6F49D4F67DFAC7F379F5
11473:10CCE000E347C7F9CDFD9C33E79C3967CE6CFB8FDA
11474:10CCF00006B9BC4EC68CD6B939A7F3197BCF67F0FD
11475:10CD00009AA3196BD1FCB71A0B18F35EB0B0DD69AA
11476:10CD10008C6D89F1272FE7F92DCBAEA2FAEF3136D2
11477:10CD2000B32D07DFDD49B13C3DF837E3EDA5769E35
11478:10CD3000CFE5799EBEA4B1F9543EDB9D14C3F30B3D
11479:10CD4000C3A346B36B787E876FF7D6387CCFA67EB9
11480:10CD500086185923D54B13FDFCD12CDAFD81F1BF88
11481:10CD600024C61E3533AF2D96B1F1AE45C35D858C1B
11482:10CD7000796E8C30B16814BA93343E9F47AA86B35B
11483:10CD80007B359E6D7D88B178C6E65B19FDA9F150B3
11484:10CD9000D13A86B179E2335BB078B7CDC3E733AF30
11485:10CDA000DAD6A58DE6EBA8BE2BD2C9C79BE731FA30
11486:10CDB000C3A278859B4ADC9DD9A2EEDFD331AE9B1E
11487:10CDC000C66555837886A7267F25E3E3BEDC6365C9
11488:10CDD000F772B8FC1D7F5302298718638319FBD4AF
11489:10CDE00026C6AF6F9BFAC069D51FFFB7DA62DFA80E
11490:10CDF00045A33CD5C7F8F8FB87780AD0FFF243D7A4
11491:10CE00003D70DA1AA857B5B8248B1902E3868E1341
11492:10CE10003A5E0BF0C6C71B063CF2262DBCC000FCD8
11493:10CE2000B5D97CC01F33F5FC6129CFB7CCBFCA751B
11494:10CE30002FCFCE9C63756B1C0FBD07C27C611ABEE1
11495:10CE400087BBB1AE96C3913E03CFDFAE09F8B7689A
11496:10CE50008CBE7BF79B7DBBF9B73A8BEF893DBC5D00
11497:10CE6000DDCB235D7C6476D0C2FF83F21723447947
11498:10CE7000943B6D7D01CA1308BF2F999DD154FE6B61
11499:10CE800023A3F2707F560C877753A2678E8BCF7BDC
11500:10CE90004818C7BF1DFD8AEF2725FD9DE4DD02BFB1
11501:10CEA000DEC648EA97C9BCE787837CF7D27ADC49BB
11502:10CEB0008B915F7535ADC78379F079B1068DD67BDF
11503:10CEC000D2E1BB278B979F6C1F4CF38893F470B211
11504:10CED000F42F6F8CE5F54E1E32BAD0E7074D46BFF2
11505:10CEE000250AE5021FDA1C6BD636DEEED48B91AE36
11506:10CEF000305E5E767FEDEBF85E7657FD2C4A6BD6A2
11507:10CF0000DCC878FDCEBBDE4FF5E45C898FB23ADE3B
11508:10CF10002A088F77BADCF5C0EF232E4F23D6BB3C0F
11509:10CF2000A77309E37475DED2F1183332F6EE50CFF1
11510:10CF30002A7CEF7EE1933DF8CEF194553A8A2FC3D7
11511:10CF4000C4E904F4DB399AE87AB9A4DFF45CCF1DB4
11512:10CF5000E88FC3B19C65301691D361C13CD89AC1AA
11513:10CF6000DF8A4E3E6FDF7D50E3E3D486B737506AE9
11514:10CF7000F48D463F67347F94964170F460FF9D7551
11515:10CF8000F8A3800F8F81E7397E6AF7EAD7853F13D0
11516:10CF90009F572DFE87B7AB6D33BA6DD83FCC67C1B5
11517:10CFA000FC6B9925503F4DEC43D001EF6727ED57BF
11518:10CFB000FB07E53FE478A8796264DEBD1C3FB5312C
11519:10CFC000877E3291EAF1766ABF18AFCCABF55C3957
11520:10CFD0001FB1BEB3721F9CE55FCCA09F7D6182FE36
11521:10CFE00099A08FF34F2449FA11747BFE89113ECC2E
11522:10CFF000275EEE9BF39AD7108E763F62AEDD7C5EA5
11523:10D00000CCD53666F628CCBE6DCC9C48C6B64ABE9A
11524:10D01000563BA86D0CF895E25FCCDA367A362F676E
11525:10D02000D96DA3E78C0AF03F56DA9645DF7D6D593E
11526:10D03000687FD0C0AA014F359F9AA79277103CAC69
11527:10D0400062BFD63C7535C1478DD3023E027E0C7E51
11528:10D050001175E5BA5F766962FF478E49005F1B086C
11529:10D06000FFD9898372C04ACE2FB0DCEEE6FD8ED8A0
11530:10D0700066D1F5A3EA8DF4E9BFFF0AFD737A1B16AA
11531:10D0800082CF21C69E57C2F87CD9CF389CD895E371
11532:10D09000BD29DB3DF9641FFE8C029F8C3915DD38FC
11533:10D0A000094E024F7FB0283CAD4EE6FCBA1630491F
11534:10D0B0000FC0EB60AE271972E53CF29037313CCFE0
11535:10D0C000D306097F9557700FA5BFBBFEB024B99357
11536:10D0D000B7FF6F9781E6150AD7B51C7E286F31B36D
11537:10D0E000DB4B79FBCF9B4F649C3607D6F371B3DBE8
11538:10D0F000CD454D5F7EC9B65C2BF6DDD2EDB9D64588
11539:10D1000041706FD99B7FC2C9F17A76AF0923B116FE
11540:10D1100093EF2713E2F0DDD8E665546E75F3FA67F6
11541:10D12000ED47DE44BD25DB63F28CCE40FBA5DB4A38
11542:10D13000DC5541F0BF7AAF1E1FA3DAF4F96B0EE99C
11543:10D14000F3E65C46F4F08FB6CBF5EBF3F927F4F990
11544:10D150004FDE597D33B6C1F3E3C4BEF9D417E9B34A
11545:10D1600072B856BF3FE304E4E8A7079F8F02BE6A88
11546:10D17000FF54753C99611D7A3AE578D44C7CBDDE4C
11547:10D180003D1AD1CB325FE8FE957CE38A7DBD96F0F7
11548:10D19000859D154C37A1F83DC3DA6E7673FAAA6BFC
11549:10D1A0007A3B037A4CF52C4EC890DF6D9B2DCC7EDC
11550:10D1B000E57803F10F66773B19A7BF8A71A26C422D
11551:10D1C000D374768AF7C736FD7606F66BC58F35D2EF
11552:10D1D000372A9E1DF12AE8A66BFF82EB29BD79262E
11553:10D1E000C1A192B92DE0874BDB357F24CF3BC639F7
11554:10D1F0000F75F2768B7D9A0BF35EB42E2CC0CFF8B0
11555:10D20000BF559B42E6B125A89CCF7FE9A157BED26E
11556:10D2100078FFD5DBF5ED967178417ED4ECFA7B583A
11557:10D22000F077AE0811BC26B4EF3062DD8BE5FC95DB
11558:10D23000FC63DEC90CEB9B209AB0D3F80F971B96CA
11559:10D24000619EE2DCC2801C9CB045B4E78CAF02EB6F
11560:10D25000AEB75B9C5877BD95F923F87C4E445ADCF9
11561:10D260000EFEFDE2B648D21F968431AF358F52666E
11562:10D27000CB433B5734DA7DFC9691F4A47ACE7BA85D
11563:10D280009FC7355F0BFA316A22FF33915FC6FCB44A
11564:10D290001ED08D3B789D3E7D9EB50E22BDA4CEE472
11565:10D2A0007F0570A9619D046FC6F1E95670E470AB0B
11566:10D2B000E3EB7C2F16FA97BEFD72D646F5971FFA60
11567:10D2C0007B58F077AE67322BAFBF3D9CA7347F1FF2
11568:10D2D000C1D168616E039FA7F1CE709F97F490D281
11569:10D2E00070D0A959EACB5BEE716761DEEB357796BA
11570:10D2F000037C6CB3CD053EB6708790435B62B8FE8D
11571:10D300001A477A33B55F087D0A7ACA02C1EFB6C4FC
11572:10D31000B4F9C1F7B73C9826F4A9BF19092E3DF717
11573:10D32000D97C3B35E8D342EFD9B27904B507BF24A5
11574:10D330007DEABE48D17EB680EB96C10E9F97E7FF8F
11575:10D3400088292641CF766759A91DD7D3D202724AC0
11576:10D35000E9D33F1BE6B90BF856EB55FA37ABFE762F
11577:10D36000FAE66E293F7B36F379F2FE4F6BA5C70DC7
11578:10D3700041FAF003B982FF8F99E6DE23EBB950AF93
11579:10D38000CA30FBDE297CBE555B0DCE96B400DC991D
11580:10D39000DB9D05389FDE6CCB039D8D99C6E83C7103
11581:10D3A0003257F0F38802E6F6F174BBEC777BAE41BE
11582:10D3B00097268673FAE3FD9C2EF19B81DFC882528B
11583:10D3C0000BE42197E1C4CF43D7B13757C8CD2A4BDF
11584:10D3D000E96F26F5339F3E3A28167ACBE915DA4EE7
11585:10D3E000312F81E731FF6E73B5D0BAC5FC14DC393B
11586:10D3F000DD1492BC977C2BA68F4E7C4FD8386A37B1
11587:10D400002B7D1AF8D7747442F0DC72DF28C2E34235
11588:10D410008967769F4DD209637F45798993CABFE9B1
11589:10D42000BCA5D6C9E980CA39BEFDC077E8794BE111
11590:10D430009B997C85A59103E37BD1B898311A077538
11591:10D44000B28979C3385C20F3082EF7987C77F1F91C
11592:10D450000C3509F8A798047D71EEEC0DCFA3FA6E98
11593:10D460000BCF573CB094B979FD8A64E6D2447D165F
11594:10D470008DFABC1B234F2133D0AE225AF45B91C0EE
11595:10D480007C7749BD1FFC2A13693AF5EB36C48AF64E
11596:10D490005179D4DE6B10EDDD269E0ECB10FBA56717
11597:10D4A0007D18ED9F8ABB53B24007B3A6E9E9203F40
11598:10D4B0004FD08D4A1FCF734A39E34AC4FE5EB46E23
11599:10D4C00024C98D165B69FD73C0D7D311A40F566CA8
11600:10D4D000B8ED8642CCEF9941D070D8E737EE1F0304
11601:10D4E0007A5BB46EC1F77E8FF3C85E1B7D6FCFF39E
11602:10D4F0009CCF85BEAD39CB9FE31F16CD3B6A49E477
11603:10D50000ED3D6DB3CFBDC8D31BBDFBDF845E70E3C3
11604:10D510004D46AA7F236BFBCB1FC117D689716EF0D6
11605:10D520005E3025F2FE6E28D218CABB6C8ED4157CF4
11606:10D53000FE15127F7F95FBA0C5C6E6FFD28E79A5AA
11607:10D5400064A5F3EF374053ED470F1C9727F5C4A9A7
11608:10D55000DA76E83DC3A68BFDA5EAA31FF43B19F0DC
11609:10D56000E0F5CC122E2ACFE14AF5AB36867565443C
11610:10D570002135FB47F07471C1345B1EAF372B9DCD55
11611:10D58000C0B9A9E70E23DB49F3EDA9A07D1F99E5FA
11612:10D59000C4BEF730E627BEE71B4974DF35B5A7EBFD
11613:10D5A0006E9EEFDA31C2D5427C5D9CDF173B18C915
11614:10D5B000F7AEA982AF29FE72D2D11949F42ACFF36E
11615:10D5C0009592343E6A9ABE752CAF5F69B774411E5E
11616:10D5D0002C7E706E9493CFB3720B3FCF7339C636E7
11617:10D5E000E9CFF3FCBC9D9137F8CA7379E8F91B3495
11618:10D5F000033AAADAA4111D0E6B715992888F690E35
11619:10D60000ACAFCAEECF84FCAB72D95C283FDBEC7EBA
11620:10D61000E034D70FCF37CFA4945DE670E7F3BC0AB0
11621:10D62000C8E3FB7E6CBEC7053855B456D0793222AC
11622:10D63000C743FC69B9A4BB591CCC1AF88DA933099E
11623:10D64000FBB02B577E8F7564D9899E6D0C70E832C4
11624:10D650003BB230AFAEF53603E4E6ACBB045DF37D20
11625:10D660006635F1F6F7985838F6FBDFD09EAFB36C0D
11626:10D67000ADA97407CF0FB53253642CE82A97E8FAA6
11627:10D68000E7051E33E0F0E98FD838E805959B36D3DF
11628:10D690007C145D305347F120E879BBD3F270BE565D
11629:10D6A00074F4F38269D7E605D3C34D1AD1014F5FF5
11630:10D6B000C9207A98338BE8619A3F73259F5789B1C7
11631:10D6C0008EB961674864AE303EFF5ED643FA442FA0
11632:10D6D000D72720CF143F517C83D381DB1A1FC0EFA3
11633:10D6E0009E663E15CE93F7365B297DB2D9C14C1CA0
11634:10D6F000BEFB9A1329FF4CB393D2B6E66CFAFECB6D
11635:10D700006617E50F348FA3FCC16637E50F35CFA44C
11636:10D71000F4C5E652FAAEF812870BF121C557143F53
11637:10D7200052F4A4F852281D953BB137A83DF13DC5F0
11638:10D73000EFB00E435E801F29FCA66BA5DEC434F05B
11639:10D74000B1CE05E01725C6B34F3FCFE1DB5B6D7768
11640:10D7500085390117C1F77AED5692F3A9167608E7D5
11641:10D76000FF9615EEAEBB83E4EAADD51A3305D1EDD5
11642:10D770006D8D36660AA2DBDB9B6274F9B2A6B78FA9
11643:10D7800025F0FEFF9EE2F1022F27EFFCF8D1FFE427
11644:10D79000DF1FBFF3F3E1C0379FC7EE8730EE9AF08B
11645:10D7A000BE79C422BFCE4C726658B838270D0B170D
11646:10D7B000E724FC013F8B98D8A78FDFF957DAE75DA4
11647:10D7C0004D614E23F40FE08BC3F70389AF454D61E4
11648:10D7D00004C78AF5A79E7E1EFB7D8D85F8DDA275A8
11649:10D7E000727F6EE4700DD2DB3E4C62A49F696EC600
11650:10D7F0009A38FC3EFC91C5CF653FFB50B3FA34DE4E
11651:10D8000050E387A632FEDDB3F157EF41DFD69A4EE3
11652:10D81000907EECB1DAFD46CCCF6B3E1BDC9FD6741C
11653:10D820009CEAB1CEA1311F47D0566480634481DBAE
11654:10D83000023E01DA06FE16651F61D8DFAC55730C97
11655:10D84000E7EBAA92DFAB366AA47728F83F9167A48A
11656:10D850007D753AD744789D863D3B981818C929456F
11657:10D86000B79C6FB87DD81FADB9962541FC7891FC67
11658:10D870005E996DA0547D3FCDB725FA9986CDC5FB45
11659:10D88000BD373BDDB298F89DD3027EA0EA2FCACE09
11660:10D89000DB905E807EA6C6B1A07DF95C9E49CECBB2
11661:10D8A00021E49895CB31DEAE6E0079A0F4934FF170
11662:10D8B000BFE369FE74FEAA79E6A9675E845DE2FDB6
11663:10D8C00030C253CD35D2BE91E31B3397F41AB75D06
11664:10D8D000E3EB6C90F82F7EEA4F519DBC7CF901611F
11665:10D8E0003FE56917D28635D5642F6B70F17D827D57
11666:10D8F00070C8FC6167105DBEFACCFB519D74BEF030
11667:10D90000261B1291FA93194F1B0E9C9AC1D01FEB44
11668:10D91000D9E0B05FD96EB97699CE996A1D2587BFD7
11669:10D920008CA7F1B54BF154FFF0FAF8FEEC20CB993F
11670:10D93000E9C3BEFD4B7606B7CEAEB69C6DBA60E4C9
11671:10D94000F35DBE66E627A0F3D0FA9FE445C6817E6C
11672:10D95000D8583696EC18266600BE575A051C7A7DB4
11673:10D96000C3A3D9D7D85F966FE38DB8AAD56B72469B
11674:10D97000BBF87CBB613FEFA77E4EBE90EBE7F83E65
11675:10D9800062FC2CD5BDCF48E785EE7D9144FF0DFBB1
11676:10D990001E383E91E71B76691896D5B30E8253C3A5
11677:10D9A0000123B306CB33D877060D3CCFDAA7221B71
11678:10D9B000414FCBDA34F76E3E9F5EAB337A70D07C4A
11679:10D9C0006CF9829E6AC3DAC6105CE5FCFF2EF999F9
11680:10D9D000AAB7ACFD010BF0C5EB9D27FDE517118C37
11681:10D9E000EC66ACE74DCCF3CCF67C17EC7BCBDAF6EF
11682:10D9F0003790FCDF17E118CED7F1B9B4F3AB7E0650
11683:10DA0000E78BFD34385FE81D67A43DF7CC3346E271
11684:10DA1000439827F6E1E7D07383E6992CE7999C2F8A
11685:10DA2000F49B23D88F8581FACBDABAA23279FD4FE5
11686:10DA30000EBD4DE97039CE327BC768C8CD4F0E445C
11687:10DA4000CCF451FAD3192FF1F1CEB54D8DD382F626
11688:10DA5000555EBE99FA3DB7DD3813F062BE4152CF34
11689:10DA60006FA3F59CD997ACD1F916F0E67AFE99032D
11690:10DA7000CF461968DF7A453B89478355D869C36229
11691:10DA80009C52CFB4B642DF58C8B5BB68CEEFEA0FA0
11692:10DA90005C20F91BFA5DD5A7FD9684F3770FD93585
11693:10DAA000F89F01F45BEF10382F31E624601F945F7C
11694:10DAB000E3BCE556F0B1D7CC020F439D0FE15C55B6
11695:10DAC000FED620B25BAC343B1390FFE2757E10E4CF
11696:10DAD000F32ECF97FB3BB1B31076CEAE3421D7EB0C
11697:10DAE00036F2830A5FCF108E772F5F729DCFC83CCE
11698:10DAF000F9013FD1FCFC745ADF23D506B785FC2C15
11699:10DB0000FE2CD83D4F5A9897FC46BFB4097F40BAC7
11700:10DB1000B0EB3F22FD4575B1FEAC41B07F493CD62C
11701:10DB2000CDE1E541F8ACDBE9CF82FE72D622EC7C98
11702:10DB3000287720CD13F55A24DDA01FF4DB95E638B5
11703:10DB40004F7AE673910CFABEE1F9486157F8B96D66
11704:10DB5000675890DCAC9674C575262FD6EFDD2DE6A0
11705:10DB60008779417F5E6669CD827EA9C65D16D54AFA
11706:10DB7000E39D95E32D0B6F15FE098BB047A23E8DFB
11707:10DB80006F66E447E979228CF4D4CF933A0E62FCB5
11708:10DB9000CF9F18C920C7BBD27C4B0E5139D7DF3875
11709:10DBA0003E6A9E0CF363BE9F3D11E963BCFE67664F
11710:10DBB000A10F7D16194FFAD089C8ADE5E497D915A4
11711:10DBC000A6C1AEF299C62C8928DF2DFC1835CD4DA3
11712:10DBD000E47FA8E1DB9DE5513A93C5A27C24D95BA3
11713:10DBE0003EFB35DFA71A7DDF88EF1ED65AFE03EC19
11714:10DBF000BBBD116477FBFCC9FF1ED99FDFA26697EE
11715:10DC0000DEBEA4E84095DF23F9D23D128EF7E53B56
11716:10DC100008FFF5116D5BD3699D62BF723CD0B98B73
11717:10DC2000EF8F78D8BB4FB6BD10AFD901677FD64F05
11718:10DC300001F7BDE27CF3F93E33F95D6A9E8F749380
11719:10DC40001DE7EEB106C88B1AA3D0836B0C1C7C3C7D
11720:10DC5000D5EEDC9B053DBBE5095B1EE0C1E14DE770
11721:10DC6000C89EDD46398E18F7B33D29C2AEEF97F94D
11722:10DC700083A3C8AE3F2B96DD3E87F49CEDA301D76E
11723:10DC80008BBB220CA00B3E8E5BE3F0A9F9C10F0504
11724:10DC90003CA397905ECEF71FF1CB3AC92FEBEF9ED6
11725:10DCA000183D11FBE92D23835E70D1E44A003F0C3F
11726:10DCB00085D70792AFD41E7CD402BF5D1DDF371E0F
11727:10DCC000BE6F6AA57FACF6498DF4BADA0D131F2238
11728:10DCD0003EF8A6990DE7F338DBF64054303E8E4B04
11729:10DCE0007E1668EFA2FAB5BCBE68FF5A14CD678FE6
11730:10DCF000D985F984E2F15BB77FD2F8ADDAF7D14785
11731:10DD00001B97EBA3AF5CF745D6F1FDF7C14FF6D9F2
11732:10DD1000C87EC5F19E0ABDE38CB96D09D67DE66962
11733:10DD20001BF199333162BF7FC2F9A17704E6F19DFF
11734:10DD3000FBC9BEF1BBB90CF260A94FDFAF1AF735D2
11735:10DD4000C97FEB07B9A26127ABE778407F1C2FDFC3
11736:10DD5000A5F66F99A97DE83A9E44BBC2A0FDF9746F
11737:10DD600004D1CB9921021F679E194172A52B46D081
11738:10DD7000399F6F2ACE2B676244CAA08C703AA89153
11739:10DD8000E7D13353DBE8FC7D46DB4F699759B4ABF1
11740:10DD900069927E634E7789A01BD024FC61D64D1D0D
11741:10DDA000D02760AF1E9347A93F2CF64ABB33E81338
11742:10DDB0007228A340C82F86F1E2A5FF83F494360BA6
11743:10DDC000F8B247EA7175FBAEF4C301BF75FB34F2DC
11744:10DDD0002319543F7CD671CA5ECEE9B1D6ABB96D7A
11745:10DDE00098CFBA15CBC88FD4B8F956D0BB5A47AD27
11746:10DDF00089CDC479A84B33D27CBA6C7CDF000EC1CC
11747:10DE0000E305E95D91817198239EF44C52AE630A5B
11748:10DE100084BC42BE95F757B74EDB44E3A4A973A573
11749:10DE2000589F8213078B05F6327EDE17E503AC5F41
11750:10DE3000CD3374FD6A3EC30B849DA22BCD797F1137
11751:10DE4000F0FD86D18573FAC5CBF9D1B15FA397E117
11752:10DE5000E4D66737E6F3CF034DF1F97F29F95B2D5F
11753:10DE6000ECD27C9E59DBF5FE90EC5DFAFC55FBF4A0
11754:10DE7000F99C03FAFCE8767DDEF5AA3E3F448EABC2
11755:10DE8000E08473AF738438F722C5B9D71926CEBDA5
11756:10DE9000C8E3DC8B14E75E7CC7B917799C7B91C71C
11757:10DEA000B917799C7B91E2DC8BEF9505827FD7498E
11758:10DEB000BB23F000BF0C7BC1A6FCECB45FBA17C457
11759:10DEC00013FF547ED2EE653994EFB3EBCCB6925D7E
11760:10DED000876C375C2F993BD473434121FCA71D1BF2
11761:10DEE0009280375327D97397BF28ECB97579363BA1
11762:10DEF000EC0C9DEB3FD900F5296BA8670EEA779BE8
11763:10DF00007BF6101D98FCC4373AD73ADF9A22F047C7
11764:10DF1000F60E668FA5F34905E45DECC0780CF5AB11
11765:10DF2000B04D7A3F4AA85F25D49F124A07CA8FF2A4
11766:10DF3000B8B92709FCFED413D64D98FF2969276389
11767:10DF4000F3ADA47F29BDBAC4682738ADBC4FDB0947
11768:10DF500039B5AA2096DAF79EE0FA763FF256A595F3
11769:10DF600097F2855EADF29B3403F9693C6E9243AB48
11770:10DF7000E49C52B59EAEBB4123910692E317ED0699
11771:10DF80003A175C7CC7487AC4886D06DD7A46FAC2C7
11772:10DF900075F475F5DED8107FE0105DFD6B0EA5877A
11773:10DFA000F803AFD2FBA96E5AFB0ACED77337E5EB65
11774:10DFB000EA55954E0C81A39CB7D44B5BD66C4B05B0
11775:10DFC000FF5915D94BF35FF59C8DEE5D5471F9E265
11776:10DFD000E6EBAE4686F3C76AABFB46C0AFBACD1CD4
11777:10DFE00003BB56A5943FAC492F8FAB4DCCEB880DAE
11778:10DFF000D05DB583B96378FB73B9AD7B0C1C6FE75B
11779:10E000000CDBB71639E15FDA91EAE074B55A6B8B35
11780:10E010001FCFFB3B15E3D951C0F773AAD9FF933249
11781:10E02000F0CBFD196C2DAF776AD3B351A4774B3A7F
11782:10E030004B353BC281EF1DAD463A17C03E057B9084
11783:10E04000A2871DAD83C233ED817506F07F99D6C7D7
11784:10E05000F142F7467AED4786AE821ED726D65B3D63
11785:10E0600055F3929E2CD7B352CA15B64EF4B35AE666
11786:10E070004FCBF3825ADFD991AF8C76C2AFD97C28CF
11787:10E08000D5083E6ED8B72709FA4582A71DFBA77AA7
11788:10E09000C7F0FF2CE2E3D6FCDEC8E047FE68CBF415
11789:10E0A000A8F1D03F9F36BB66F1FCDDAD3FB3E05C2D
11790:10E0B0005063F25970EEAC7E628705FEFF6BF7EE9F
11791:10E0C000A0EF4BF656D0797B296BA473E4A76621A9
11792:10E0D000A7153CAAA769DB1D7CDE998582BF568700
11793:10E0E0008BFB2025C6A2637158EF5E2D17EBBDA9EF
11794:10E0F00074BFA5827F7F57F2E1D0FDD1FBFADC929D
11795:10E10000C1B02BB5093FE840FB619E7F24ED87B984
11796:10E1100097D228BDE9D2D574AEFA3D2B1D457C229D
11797:10E1200027E43CFBBA51D8CDDAC53EA8B6F8E3E601
11798:10E13000629FBC6CA67D526F82ED1BE764C626F021
11799:10E14000B4B4C8A8A3D7E5C5113A7A9ECF62757E4C
11800:10E15000E59BD9105DFEA65919BAFAB7DC747508AB
11801:10E16000FDE705CA898F4CD0DD5FA95FE3756A645E
11802:10E17000479BA6FFCED3354467D7EBDAD7B33981B7
11803:10E180007A3807EFFA2DC199B10E0BCE5BD5067127
11804:10E190005F67BEA74B7EEFA4EF7C21BA7D382CC30E
11805:10E1A000F59F422E9AC93EAFECD3F3F1FF19FDC99A
11806:10E1B000458E68396EB451D8173C7ABDA383CE9F83
11807:10E1C0004CE0A15EDA7BEAB385BDA7DEDB6169B412
11808:10E1D00013FC4DC91C240DAD1AD9F3787D6B72ACBC
11809:10E1E000C8AFC1F703E6809D8589FE2EA1FC84B1EE
11810:10E1F00002FB25B4BC81AF1B7A4603EC3564679AF9
11811:10E20000F909D999D438B27F45A74BB7E9ED470D45
11812:10E21000B0EB04E17359A193E8B566EFFEE3433830
11813:10E220007CE696C6E4621FD5B5CD3657E45C496FEF
11814:10E230008ACF5FAC3690DFBBF7F5A3446FBDD52620
11815:10E24000A2EB6F824B835BD83543E970095F9795EA
11816:10E250008FBFE480E6F269A21EE03304F419029F46
11817:10E26000E47EE0A6E0D507BF90F2A5F89F02DC2788
11818:10E27000D07CFEB4FEE012024F354E08BCD8383DCB
11819:10E280003C96789C6F81FF2C396164BE6FB1FEA50E
11820:10E290005827E6C1D78979CCB924EC26CA9F70F3F8
11821:10E2A0002513E5FBE8A694C32B0FFB4EBF4FFBE8FD
11822:10E2B000A854EC9B7997E2A9DDBF8A9EBE898ED4D3
11823:10E2C000FC15DF0EECA3BB486E2C2F8C8CFB98B397
11824:10E2D0000AFEFF85C417247F1D582FF50A3EEAD198
11825:10E2E000CB9961778EA37B47BDF674D22BFAE4906D
11826:10E2F000435FBE32323D01E51E69B753FCD823EBC4
11827:10E30000A9712A78B97310E87A683CECB11BD6651C
11828:10E31000A47606E92B9EF5E678D80B53D70EA2B467
11829:10E32000C2E688871CA9586B2C857CFCF09E84F87B
11830:10E3300071B0CFAF37C7CDE25D7F7847412A1B85EB
11831:10E340007C09A5A73687CD0FB673AB745BA1D0430C
11832:10E35000EBEF7C8FE4DA39C3EB51F3B1EFD63F1723
11833:10E3600085AB37B5EBDF1EE3E02AC9DD319E870AB6
11834:10E37000C98FBA638F037073EC180D3BF5CF6143FF
11835:10E380001B1CD01F6AD69724C02E56F7B7A38F4107
11836:10E39000EE7BD69AE3A17F7EF60E978B1AC935D213
11837:10E3A0001B3EB5313A2F7DBA3BC207FFFDA71A735A
11838:10E3B000C3BFB3CCF8CA68874ECEB6DF8C79EC4DBC
11839:10E3C000F0FCBCB010E3FBF624627C9797EE677A12
11840:10E3D000D60E8FEECF8EA2D2E5DB845EB747D97121
11841:10E3E000A5BD17FA3CF2D0E7D908A1CF230F7D1EB7
11842:10E3F00029F4797C3F26EDF8C35A7A72711EF54EE6
11843:10E4000063D98D2477EDD9D0D75769E12ED2333532
11844:10E410005702EC63EC9D18216F43F0ABD2493D5C91
11845:10E42000E70AA2FB2997AC2CF89ED95416A3CB4F30
11846:10E43000B726E9EA9738D274E5D7268ED4955FE7F8
11847:10E44000CCD5E5BF933D5E57FF06D7545DFEBBE3D9
11848:10E45000AED3D59FED9EADCBCF9DB940577F5E69C2
11849:10E4600085AEFC96F9CB74E50B3C2B74F95BABEFF6
11850:10E47000D0D5BFAD71ADAEDCCD1C26C8BD769CB38A
11851:10E4800038DC5FC6398BA7ABDE186E0FC66BD17454
11852:10E4900043637F76FAF3521F9A38D6FD19E823C5F5
11853:10E4A00020E890A76EA81097A55C49667E4D9C73E6
11854:10E4B0003B924037A1F542CB8B228E5C74721C2EAE
11855:10E4C00039187BAB89F391A2B147F23378FE9931C9
11856:10E4D0000B447EE29167D379FEE0C1ADB79A38FF75
11857:10E4E00028BAE6C845948F1E5B2EF27319A91C4703
11858:10E4F000C6FC6DA197AFA3684AFA2697B093F47B48
11859:10E500004F53A58003EE37020E48FD9C3E911EE15D
11860:10E51000F489F4554E9F5566C68E73FA447A829FED
11861:10E5200037F1FD37FCBC89F4757EDE44FA263F6F77
11862:10E5300022EDE0E74DA4BF6B9E4FE93BCD1E6AF78D
11863:10E540006E7335A5EF3537D2F73F363751FA41B301
11864:10E5500097BE278E5176053FD95F949FA901FE3D56
11865:10E56000D8E70E99CF06FB61959F50F9055B1A59C4
11866:10E570006704F669A729E6636BC0DF37309F35B1C2
11867:10E580008F83F4B0CD89EE8C3134FE5007F97BE4F3
11868:10E59000F769DADC14B8FE6E1DED193986E37B5E8F
11869:10E5A0005EE5FA68CE3FA65C6E34835E7E2FEFA9EF
11870:10E5B00086F67F59D249DC58F768B49B6C15F7F0A2
11871:10E5C000265BC53DBBC9A6CE16F0A3962F9913F7BF
11872:10E5D000685E89B4107F6AB9C7E4839D52FB82519B
11873:10E5E0007E521CA37CCB971D742F6FB2C39548F24B
11874:10E5F00046E6FBFCE7F80BBA2FA3FCD9EA9E4CF1E8
11875:10E60000179DD3A1074CB25B9C6121FE77F8AD5FEB
11876:10E61000897C57CD87613CE527DFF525F31B46074D
11877:10E62000FCE193AD1D69B0134C5A6D7505DFFF51C8
11878:10E630007E6FED8B0E23E489BAE7A3C651F38D34C8
11879:10E64000F1FEF202F778263BDA7271AFA1A5DE4E39
11880:10E65000FD25F0EF963CAAE73652BBB65CD8812781
11881:10E66000D5D95DB06F2B7F7B825C37AF47EB2CFE3B
11882:10E67000C243F70D26C9FB06E8C72ACABDE86752A0
11883:10E680009C3FC984F5375A5CB0873EAAF1F6790100
11884:10E69000FF3FEA4704ED5FCC13FD66FE85CF177A96
11885:10E6A000BBDB4DF09DABCE6F4E9997F29959A79178
11886:10E6B000FDCA28F3BF1DED590EBC978639FE1441E3
11887:10E6C000FB3C2305768ED9526FFF1A7A59FD3F43E2
11888:10E6D0002F6E81EFA18CEC69A174A3F0A2F03C1025
11889:10E6E0001D29BC07DDD7223CF7DDBF92FD84D2D7C0
11890:10E6F0004074A5E869B255E01D78C53D1A4547DA72
11891:10E70000176D3B681D755692738A8E42E9E04A3A4E
11892:10E710001274D9F23D2BF577251D05F00F78FCF327
11893:10E7200074D46184DCFD47E9E7F61E36239A17DDD1
11894:10E730007B8DE732E446C525E771E42BD9D4192057
11895:10E740002955FE00CA075F591E4A5FAAFE8B03F4D3
11896:10E75000E7F9A2C71C1D449793A40CFCC300F55F06
11897:10E7600093F7E25FB3A9FB1E6E7B2EA783E9920F9E
11898:10E77000AF2A11F43533CD48FE8CE9394B49BF67D8
11899:10E7800076A11F3BF93F646F93FEF5EB65BB1997CC
11900:10E790004BD7619C19717AFDFB7AA977CF0CF1B741
11901:10E7A0005F9F732DE9E1D787E8D9EF8D917A741ACD
11902:10E7B0004B13E7EB4DA4FF16CBFD982CF19DE134F4
11903:10E7C000B2220EF712E6314108BC7ADEE2467FD76C
11904:10E7D000322FE5AF633E4ABFC3FCA407DCC0050689
11905:10E7E000F2DF658CEE8F1E8DB8B16C39EF6F7AFE5B
11906:10E7F000F44C7CAFB3F6A45A0CB81DE8F90CF2A1A6
11907:10E80000C1E8F933F4CC73299E11381F1F29769281
11908:10E810001E76C49A417A21F69339C85EF96B2E4769
11909:10E8200033B99C3BCAE52CD2635CCE667279F72B78
11910:10E830002E6791BF3E7B2D43BB194EFDFD1ED5FEBD
11911:10E840003B8EE9CC34686039F69DD12F0C851DEBE9
11912:10E85000B59811C5C0DB6B31638BB1DED762120C8A
11913:10E86000220DB3503AEAF9CCFEF45645AF81F16679
11914:10E87000D078A1F055F00C85A382EF3F01CF416322
11915:10E880000BAF84E765E8F7B09F5ADF8E4A4C879F4D
11916:10E8900051C6D345083E58FFFCA804ACA3CE2AE0DD
11917:10E8A00032A96922A5939BC633533EF999BC80EFE8
11918:10E8B0006758020CCE217636669A46F9EF49DACAD5
11919:10E8C0004EF00CC73CCEE6F9B3B846C63ED9DE12D0
11920:10E8D00085FB99E79E31BA70AEA9333A37B9602704
11921:10E8E0007FCD28E2822E1F4D857F93EDEAFFBE7417
11922:10E8F0009D55C1CF4B70FDD9356EDA6F0CDED9F85E
11923:10E90000805E33344CDC3326F742DEC07ACE98701A
11924:10E91000C167868609FEA8F0C5DB09B9CBFB19C320
11925:10E92000F95AF2FDE174AE2918E62EC27AF879811F
11926:10E93000E28A7AB323C85EF11B199738D97F35C5AF
11927:10E94000E5CDC4B99D7F378647EDC4BEFF8D8C4BA6
11928:10E95000FCC520CFB5687F6D5A5E22E0318509BFC6
11929:10E96000CA7556B3CBCFE774DD58B90F47B3D13270
11930:10E97000AE4777FE507692DE3823C9A1C92CEB2131
11931:10E98000D8098A4F98C94ED077DF2D51F8457B4F73
11932:10E990005C3482AF94446A6C505A203E272CD1C01C
11933:10E9A0009C417ABBCD19CE9C41FB23223B56978FCD
11934:10E9B000740DD1D58F1E97AE2B8F715FA52B1F3491
11935:10E9C000334F971F5C3A41573F61FE345D3EC97338
11936:10E9D000BDAE7E72F51C5D5EF1BD64F189A5342E7D
11937:10E9E000D4B51FD6B448573FCD5BA32B5778605E94
11938:10E9F0007747763CF8A2F8CBD8B85257EFA7512208
11939:10EA0000DE64A67DC92CECF7E1AD3FD0CFCBF8BAE0
11940:10EA100046F1A34EC16FBDFC1FD05149A29EFF4ECF
11941:10EA200077E8ED1AC98D265D7EC33F8A67CF553AD8
11942:10EA30003C87C283E3DDE5477D2EBFBD3C5FF2EB43
11943:10EA40004A13F40BF82F82E70FFF45F07AE1BF0875
11944:10EA5000CEC37F115C1FFE8BE072F82F82CBF34F89
11945:10EA6000E8F15CD8A1C7F3D8F7F47856F437103E34
11946:10EA7000C677EAE920141F133F0DA10B8987F9FC23
11947:10EA80009FFEF04047114EFFD31B19D9E7BE092F57
11948:10EA90002F84E065D2484F3BF6EBFC4117532DC065
11949:10EAA000538F6704CE939F493B49E83D4E2F57074C
11950:10EAB000280EE107468ABF396968D5C097FD299EAF
11951:10EAC000636379FDDB731A897E1259E9FE257C3E6A
11952:10EAD000E5FF11467E9CF261225E97E574529C83AD
11953:10EAE000E277E5C9E21ED11B63E5F9CD25EE13758A
11954:10EAF0008C15FA6CA4CB41F78E2B72441C073F7621
11955:10EB0000A5968F02FDBC6E1B017AD822FC269D883B
11956:10EB1000178E0BC40B43DF847E9722F5AB963F58CC
11957:10EB2000AD58C7886D4C272747FAACBA7BAF57EF73
11958:10EB300075E8F2A3DA1275F5AF39E4D495E7FAB3C4
11959:10EB400075E5F9275CBA7C61C7385DFDB1EFB97531
11960:10EB5000F9F19D3375F5277E5AAACB27B39E87011D
11961:10EB6000DF619A38EF5B395FA27B604E110F547EF4
11962:10EB7000778C8803957600A54FABFBD01E4977A113
11963:10EB80007AFA308BD0535B9298388759E5798BE9C4
11964:10EB9000F5758FBCCFACF454E6D5DF6756F798FB1C
11965:10EBA000F47AA9B72BFD38E81EB33BF81E73B98C75
11966:10EBB000DF0E957F71E3847D2F74FEC32C62BD2D23
11967:10EBC0007758286E44CD2B743ECBF304DDEEB6F6B9
11968:10EBD0001FBF933E4EA3FE8B724B878CE3F51E3313
11969:10EBE000BB7C6447B9623C57A717E7CA1F595C77DB
11970:10EBF00039BF79BCF26BC47ACA0C86DB67E7D07D7B
11971:10EC0000B1F9BF0C1A3F6F9CA0EFF8095ABFEB2B6C
11972:10EC10008F16F7B958B4C509FA1D783C01CF440BDB
11973:10EC20005B477146F2DEFF6D9BDAEE1BC18BCA2C8F
11974:10EC3000AD66325E309F19F4306B1AD7A772611738
11975:10EC40007CF1113BD7371E6B32919D67FCB8616533
11976:10EC50005C13EB8BE318C6CF1BA00FE82C38A73C46
11977:10EC600039DE48E32C1C27D65762BCDC77FF9EFCBC
11978:10EC7000178C49FECDE83E4C3FF44674A8D6F1AF60
11979:10EC8000BA8FAFE836144EEA7CC9A4DCC994F352BB
11980:10EC9000F053FB41C14FC5433857984B77DA29AE43
11981:10ECA0006226EE9129FCBD3C5EF0A34D8047A1A8F1
11982:10ECB000077E3450BD12634E34ECE1BDCC19EDF843
11983:10ECC0001A7BEFBF304E81E03F507CD540FCE10A1B
11984:10ECD000BE3040BCD540F4497FFF40DC55107F106A
11985:10ECE000F77A243E7C9906F2A3DF1DA9DFC72F8C9B
11986:10ECF00013F0F5C87DCCE5AB3D57CF2718ECF72DC9
11987:10ED0000EB8D924F08B90A7D03DF17AF3793BEC171
11988:10ED100058E956C4117DB4C54CF75B27BB9D335CE5
11989:10ED2000C23F4F7A07F9BDF8D42ABC7A79CAE5FB0D
11990:10ED30004EE8C153986B03FC19951BF5E54BED3379
11991:10ED40003E833C5F1C722E5D2ACFAB4B43CEA54F5A
11992:10ED50008D93F2D8C55CA427493F7FB5ACD3474714
11993:10ED6000BE8C686977A1FDC953BA17A6E0E284BFDB
11994:10ED7000263F90E7F00BCF869C5E67EAF7BE5E1FEA
11995:10ED8000FC06B88F7016F7119CD8EFBD146FD57BB9
11996:10ED9000C026FC94CA1F24EB9FF55EA472D4476F73
11997:10EDA000E7723B46430FE9F31F85F8A17AED86A889
11998:10EDB00071E86F9F99FA53F72D6AFEEA1BED08F28E
11999:10EDC000277B3A8DBAFB2D57CC7FED7374FFE2EEB3
12000:10EDD00018CF3BE0E3674C2E2BF0778FFD483CE2E9
12001:10EDE000E46749BB4DE87CFBF4CE224DF861BD22BF
12002:10EDF0006EB677A646F700381F64D837EADEC06CD7
12003:10EE0000E68F43AAFC319E8DE309CECA1F53E11F52
12004:10EE10004FF39CD7B2D41CCEAB743EBCA624DC19F5
12005:10EE2000F0D374A6887B3F03F96BE65ECAA5FE6E3D
12006:10EE3000BA3491FAB9382E4DE85DEBEE5B013ABA7F
12007:10EE40006A2F33639D9D21F7DE555A29F98D77BCD2
12008:10EE5000E2D3F23ED15A8DE87CA5C6D4FD22E2D39E
12009:10EE60002A7FB155E64B447ED57A91EF348B776695
12010:10EE7000F6487B03D68914EBC1B9789FB447601D6F
12011:10EE800048B10E7C075F421E7C0979F025E4C197EA
12012:10EE900090822FE1FB22569A9A6B147EA5E2A07D08
12013:10EEA00003BF527190DE03BF52701E7EA5E0FAF0E0
12014:10EEB0002B0597C3AF145C0EBF52701E7EA5E0FAFF
12015:10EEC000F02B05E7D9B8EB0279F031F76C5D7E2EB7
12016:10EED000D7BF8B83F62DFC4AC1FDC3AFA4EBCFB3E4
12017:10EEE00042D7FE56D6A46B0FBF5270FDDB9B349DFC
12018:10EEF000DFE976F91E40E5B641441F2F8D2E758D52
12019:10EF0000E7FBF5CF117FFB9E19E70063FB32D0EDE5
12020:10EF1000CAFA7097C073EB4C8177031378EE5940AF
12021:10EF2000785E6311F91271FFB83FFF4DB159F86F68
12022:10EF300090C27F8314FE1BA4F0DF140F17FE1BA4E6
12023:10EF4000F0DFE03BFC3748E1BF410AFF0D52F86FAC
12024:10EF500090C27F8314FE1BB483FF0629FC37F80E92
12025:10EF6000FF0D52F86FF0FD24FC4841EF66404FCF93
12026:10EF7000D49DEB381DEACE750E5D1E7A7A707DE861
12027:10EF8000E9C1E5D0D383CBA1A707E7A1A707D7871E
12028:10EF90009E1E9C5F3DCE49FC12FA7A703BE8EBC1A5
12029:10EFA000F951ADDE63B01DDDB0FDFCAB483B23B5D0
12030:10EFB000C734CE0A56BC70A00C7EB64E9B961AC3C0
12031:10EFC00039A5597BB1AC98E73DF21EDF68D66300E6
12032:10EFD000BEC9CFCEF1E6F133BA773CEAAB242A576B
12033:10EFE0007E5DFAE378CF3DC048EF3F26E33D557B99
12034:10EFF00017731891AAFA817CFFF542C757F5885F0D
12035:10F0000006CD831F0C7371CF24778D3D0FF7E5F785
12036:10F01000183471DFF42E71DF3794AE764BBEB4C76F
12037:10F02000B0FF4838EE0F55682EC4316499D8097383
12038:10F030001EE0D49807FDE0BEF131725D8D1370FFC4
12039:10F0400048CD5BD901399FA0F8B5A21E66A9E2E3BD
12040:10F050004CFA82591683BF5B845E8076382F5EED52
12041:10F06000D5DC3B83E8FBA1F142BE79BC2B2654F1F1
12042:10F07000EF57EF6B9C80B8B859E1A2DDCF1F8F220C
12043:10F0800038DEB84EDB89F8C3A27DCC8D78579F9CC3
12044:10F09000F7D5FB1C962A1AD741F174AADF8AEDA98D
12045:10F0A00014FF57C13A8B115FC10A3406FFA8821BB7
12046:10F0B0005FDFAB585F16DF2A66D23F455C4EB88CE7
12047:10F0C000CB51F1386131A555905B2A2E6752414CE6
12048:10F0D00009EEC5B176E64218F00D0515EB07F3FE13
12049:10F0E0003D3EB70BF78A267DD1788CF2BB4A294F7B
12050:10F0F000643086C621B936C2ABD1FB1A377A77188D
12051:10F10000E29C88D75D6B8E47FD7DCC0575878B1A99
12052:10F110008A3B55F3CB611D069B06BCB3A38382E8F3
12053:10F120008873809B80F75C9799DEDF986D7298C139
12054:10F130003742E5F895F71643F48490FB252D6BDEF6
12055:10F140004B35A6E37E89C1E507DF7A2E82F405A55B
12056:10F15000EF54C8FB6617D71D1B7C0B2FAFD82FF4BD
12057:10F1600003CF368DF89FBA6F529FE14B35405F1841
12058:10F17000B26374AC51C87FF0C533DE676FC616AD9D
12059:10F18000587F8CE2222AD617468BB828E187A892AE
12060:10F1900070AA92F78A588E231E7AE6879CEFB847AA
12061:10F1A000D0BDC4688A2B6C15FA9CB2B7287D50BDBF
12062:10F1B0001F53F146FE71E0BDE251F92ECBC60A8A1B
12063:10F1C000BF0ABDE7532BF5BD65EBCC747F6859884A
12064:10F1D0003E582BEF0BD586E883E7C687E883F2FC21
12065:10F1E000A2EEF356BC71741EE92B8D66F2CB95AD81
12066:10F1F00015FA0BDBCF7C8867285B3BDD807743CA41
12067:10F200009E73BBB47EE8E42DA9C7CCEAB4115CE7D9
12068:10F210005C4AA6F4E64B4994DE7249DCA344EC0B4D
12069:10F22000E8A0F305467AF4DB526F99877B9588470F
12070:10F23000F486C9FB938CF4A65CE62801FFB8CAAD3E
12071:10F240001D85DA37CBEC598F7B9BB376308A3FBA7A
12072:10F2500001FA0DE2BFA0EFC0EE5E90564271183386
12073:10F26000358A67B9A16085A46F4EEF0CF4EE95F472
12074:10F270005B4AF93EB920E9DCE3ED3201EE3778353F
12075:10F280000BDEE1F3C873ACA2E3507A2F8F90F62720
12076:10F29000BBB02FF5D99F30593C6AE38DBE0DF75BAB
12077:10F2A000CB61B31BC204E239CC237344F98817A3A2
12078:10F2B0006F5B8743CDFFA35DA2CC6010F14E5CDF96
12079:10F2C000025FBD6D75AE6551107FF962E2B419132E
12080:10F2D0000B03785F1412A7B7F29EE1095F172F5A4C
12081:10F2E000C9E18C7D521EDDF93D4EA1ECDA09CC5D01
12082:10F2F000CCCFAC0B18538FF7F8712F70A1CCAF7E29
12083:10F3000071DC9F36DA093E949F3E21F5362FF15588
12084:10F31000C1B76E05DF32825F79A64E207ED53903F4
12085:10F32000F888C8E991EF1048B9146287583DC1299F
12086:10F33000D61B628FA8CC11FC9C999CA9B7525CB0DB
12087:10F3400093EC796AFE1F9AF5719A7D7E9109529E1F
12088:10F3500034FF6BE21BFE2BC3731BD6B7D520E2E64E
12089:10F3600087185B99B40BD1FE57FC83C9772402F848
12090:10F37000E77A1AF9D1354730FE3D1B3511A73E809B
12091:10F38000FD8665F73CBC1BF6BB660B439CEBE35963
12092:10F39000828E1EFF8185F4F0324BC731BC93A5E00D
12093:10F3A000F87ED3BF9BC92ECFFCC3F1FED7C2469BCC
12094:10F3B0000BFCF98B89A5AB30EF881C17E16306DFE6
12095:10F3C00066E8FF644AE9F7095F9B5E790C71FBCB45
12096:10F3D000DBD3288EB4E250EE06BC27F2C544CF0F33
12097:10F3E00027C08F6B775820C71BD6C5905C2B4F90DA
12098:10F3F000719DAC87FC540AFE0F4C10F6ABEB8A04EF
12099:10F400001D77CBF30818E66C5D3D798F3B649F2830
12100:10F41000BB60A87D21F41D8781F68FB223C06E608A
12101:10F4200009B22B2ABB8439FBC30590A365167DFC6A
12102:10F43000A14A5F557637791E5CDC27C77266244087
12103:10F440006FDEAC3920C7AAECCE5BC6F37CD509339E
12104:10F450006E60B259B14EF17EC73DE2FD8E457CBF74
12105:10F4600082DF94C9FB5855DBC6D37EABF2F1347F03
12106:10F47000E07D79EBE6A3292F807EFC6E8ACBAF720C
12107:10F48000B82DB141FBBEB255D3C5F5ABFC8109C265
12108:10F490000E57C6D574C0EFB6D56916BCA153C6D5F4
12109:10F4A0000BDCEF7B7582531757CDEBD1BD8659E945
12110:10F4B000ECB8783F89CF3B4D8C9717D4FFA256FD0F
12111:10F4C000FB04BC3EE9452F4F8824FC5538F8BAD3DD
12112:10F4D000903A689E1C0E04A79EFB787F4E1A87F018
12113:10F4E00051E9F79971EE2EC37D0A9E5FE8F09931DC
12114:10F4F000CEA275E2BD10CF26318E67638C6514F401
12115:10F500002693C39202F8E1B01C47F3233E58C5E1AD
12116:10F5100082782B1577190A9F0A39DFAAD618BD3EC3
12117:10F52000D6BAD90C7C2C18E0BD821E49B78BD64DBB
12118:10F53000A578F32A939BE2193C12BE1FADB0DD0BF8
12119:10F54000BFC0822D0F99D370CE9E20ECCF3D72DFCD
12120:10F55000CD4AF70FA7778156D85C98E702472BADC5
12121:10F56000AF0FBE0F727868787FA694E0CBE9C28BAC
12122:10F57000FB79555BF4F80CCC47C0B76A4B05EDB787
12123:10F5800025268FC5113C8F6DAF0CC73D94057C7F40
12124:10F59000E3BD23E6F0507CD3C70FDE924AEBE4F3E1
12125:10F5A000A47B502EE70CBCF3C3E984E858D18B8AC6
12126:10F5B000CB56E359278AB84CEBC46FDA976ED26BFF
12127:10F5C0005A387E61EF1E685F5A10D8C5C7B5548996
12128:10F5D000F7D742F7A9DA9F6A5FAA7DAAF6EF63E63A
12129:10F5E000527FA216E0335CDE36FEB21F38CD90F3B8
12130:10F5F0005D28F1CAE1FA6A701CD73513055ECBD2DB
12131:10F60000F5FB1DFDA1DF948962BF974DF30F47DC29
12132:10F61000A5AAAFC62D8B15ED40F7A0B7948986BE7D
12133:10F62000FA2BA9BE3E1EA5B28F5FEC5B1F0F7EB109
12134:10F630005F23BD77E57D4753FE0DFAECD3429F3D36
12135:10F6400053B7BB21097AA3C9971AFC2E56955FF0D0
12136:10F6500087C55CFF01BF5822E5747B9E276762D097
12137:10F66000FEAD7AE0E92C8FE02F7EF0970F9E7EE9C9
12138:10F67000F7139C01F9A9E6BF68E36FCD15F6607832
12139:10F6800089F5DD9BDD4B717695768B13F7972BD73C
12140:10F690005510BF6589FC5CA105F01D4A0715EB34C8
12141:10F6A0007A5FACB2698CCFF83FC8972B37CDA637BD
12142:10F6B00091149ED47B274A9EAAF97F57CE7FA1A49E
12143:10F6C000E33913C5FE5B589D665942FB3ECD520996
12144:10F6D000FA97E50BAAF4DFFBF0D4E75FCED980FD03
12145:10F6E00081B8213A9F6C320B3BDFBE48D257CFAC7A
12146:10F6F0007CFECD9B79BDCFB7EE48857EA2E6B154A6
12147:10F70000DAF3164BBBDC12A9B7723C5504E369E986
12148:10F71000E3024F95CFBCF127BCCB55962EF9D97D8E
12149:10F72000229E7F51DB7EC2DB828D9BCD69BCDE8A4F
12150:10F730008969BA7B32958DFCA0CBE1B970E30E33B9
12151:10F74000F8C08A89026EA1F45E26EFFB2AB842EE69
12152:10F7500068417E0B551FFC6F3F1F67F50A5B14EC79
12153:10F76000D36A9C47245D5736C6C462BCCAC68A9F0A
12154:10F77000E0DCA1F87DE8BE3B6513FB6111EF0FFBF8
12155:10F78000F2D45417C535C3AFD59F5CDD2CF1F653C9
12156:10F79000B378BF3139A2ED09C0217979B80BFC21CA
12157:10F7A00033B393FCC6A067CCDB6210EF3D66D67521
12158:10F7B0005EC03CB84A4DF75390E29D29A8D8F13C71
12159:10F7C000BFD320E2AFD28D227D5EC28797FB51CEA0
12160:10F7D000E23AE9DDB9BE779342E8D5C2766DC47BE3
12161:10F7E000379638E66A7106E853F5A3E853D1EF403F
12162:10F7F000EBFB85E423DFB4BE5369D21E91ED4A458D
12163:10F800009C4AF9FD235CB0CF7CD33A2DF2FDC1BEFA
12164:10F81000F572621D17DBCF7A33C5B965E0F56E2945
12165:10F8200089EF67BDA1EB54FB44DD69EFF32FB40A08
12166:10F83000FFC2298DCB2FDEEED40A1BDDFF52EB5227
12167:10F84000F6EF6F1B87F0F6C458694FE88C841E5999
12168:10F85000162EF7BF5FE4F17D76D07725F7D57B6D67
12169:10F860008A3F9F6E94729175DE87FDCC9A32E87D57
12170:10F870009293ADA722F15ECAA9A9627EAADD6AB3FE
12171:10F88000883366911627DE3FE4E7AB934DF0FBAC7F
12172:10F890004BA073E46D4D19C4176EF3C608FB83D4F7
12173:10F8A000EF97483E18B1BA6203DEF95EBC2DCDA1D8
12174:10F8B000F17116DB5D1F6FA3F657BBA00F466C9965
12175:10F8C0006D4927BD579C03949F68B5C64A296E0CA5
12176:10F8D0007C12FBCBF04A26E4CED26DE21C30CBC0CA
12177:10F8E00036C24F38ACA5744612F8C4C31AC599B3D2
12178:10F8F000EDFA77ACC6E6979EA7F35FC83B70ABCD39
12179:10F900006DEE04F071AE6FC0DEB4D85E4A7A7BBD96
12180:10F91000E49327B774D17BF40AAE57C4FF58441C54
12181:10F92000704FA481EC70DF360EA84AFA9514DD28DA
12182:10F93000BFD423F8CF78C0C94872ADC45846EF2968
12183:10F940006DD8329DD2AACD255BBDA3107F5C1A3F36
12184:10F9500081E66D263B5955FD7411AFBB332C06E78C
12185:10F960009B54B33735582FADDA7137C5FF7CBAC316
12186:10F9700046F13FC58ED9C53171F4DE31C5D7A97ABC
12187:10F98000A94582EFD4D44FD7C5EF2CE67DE29DCDBB
12188:10F990002FDB22E87E988ACBA94BF024150D16F1B7
12189:10F9A00039E39D222E2789EA3BFBB58BABF4E36656
12190:10F9B00011E711146F74E302DEBEAEFED928F453D2
12191:10F9C000FBE0DB631C06B2430D47FF7DF146DB44E1
12192:10F9D000BC51963C2FCD8A2DBD7901E0FF6B23C130
12193:10F9E0007FA0F1AA0F693A3FDE6DBE68D25B3D7E13
12194:10F9F00066811FD9E360A4177F6A644DD00394FE2B
12195:10FA0000A2BE8F9770F934BA3515F4B16CCF43A903
12196:10FA1000902F9F458A7CD99E5B7E037EE5D9152673
12197:10FA2000F47313237DB8D22BF46B561DABDE23B5D4
12198:10FA300095733A9A5E1421DE3DDAA68F3757EFDCD4
12199:10FA40007E6612EFF320DE08F4FEBEC9BF18F87D13
12200:10FA50009FEBAF38C7A61609FA7CBFD53883EE0DE9
12201:10FA6000F18D023DE4FDD66723110FADF4B512E32D
12202:10FA7000076EBCFFB3F23911178CF7E9E9AD506995
12203:10FA80000769907690952F986724C791FE455FEAA5
12204:10FA90004C7E4B7FF8AB91FA555FFEC07E3AB7D5EE
12205:10FAA000ED13FA435D5B17E90F4A1F517187B5FBF0
12206:10FAB000BA489F50ED1A0E08B8D41F10DF2BB20DB4
12207:10FAC000CA8EE2D632719ED628EF7D31BF7CAD2939
12208:10FAD000389F57BE16CC7E82B28FF4903E786FF678
12209:10FAE000EFE81C5EBF4EF6CBF3E6A0F1AA414485D9
12210:10FAF000E27B861DED9DBAF35DFD81186AEFAF0FC5
12211:10FB0000DF0839EF6EB09B90B6D4DB49EE6F6F34EF
12212:10FB100064E39EBA5B0B77418F6B97F7B706D7BE4E
12213:10FB20006B83FD2089F51CC57BBBFE14CF0F8B7842
12214:10FB3000BF0978DDC5188827EA3EFC493EFA9F3C9C
12215:10FB4000ACF322DED4306B53CAE1A7682992EBC82C
12216:10FB5000E9CC075D0F3E22F8F3A366B691DE6D3661
12217:10FB60009532D8EFFDD2BFE8FDCA40EFCFB66BFEAD
12218:10FB70009F05EB5787247D9686093FE3CED19E4DA6
12219:10FB800098C77735F3A85CBA77681C8EFEBBA51FB3
12220:10FB900052E9A9D3247F4E91E72BCB90443BE85800
12221:10FBA000DDB7D3DC6E8AF7BC2BE74825E4F38F7B07
12222:10FBB000AC142F30AD279CF4D6942133499EA977FD
12223:10FBC000DB35A78995F1FA47720C7EC4C5FD9859BB
12224:10FBD000C5BD006B887E6BB0D1FD64ADFD575F8104
12225:10FBE000AF271B2F1C8DC67DD97FD3E8FDD1F2DE58
12226:10FBF0008F1F7D8BE13CECCBA578E814CF1EACE7E2
12227:10FC000064EFCC2E0F47DD8F1D6D569790172C7823
12228:10FC10001DED777C15156B08CCAFBBE7637AD7B1C8
12229:10FC2000BBC74A76DB69EDF29DC390F974273AE9C8
12230:10FC30009E34AF47FA66B7DD40EFBB4D6B3F4AEFEE
12231:10FC4000154E53EF195AF5EF1932674A0CECCA6496
12232:10FC50004BE5CA417C8BC0DFE468FD79F1B522A198
12233:10FC60002FBE56A4F5FBDEBD8A5B5172E565FB9E97
12234:10FC7000DB845D4AECD3E5CACF7F299DF489DEF6AB
12235:10FC80008CAF7DC7E26DE8155C5FB8708DFBEDA2AF
12236:10FC9000C2805C9D27E1A4E4B38A5B9827E135CF5D
12237:10FCA0006E10F009F9DD154537A17411C0BB88F756
12238:10FCB00052F8643FE83886782C8EC751F733C2DF9C
12239:10FCC00049C2DF57AFAFC7B30B438CEE2E4FDABF3D
12240:10FCD000047FF47EF7B7C65F4728FEFCB611D02339
12241:10FCE0001E34901EA1EE3B7AE47BEDEADE23CB6668
12242:10FCF000C40FCA8DE1642FF4C877DA391F38063E85
12243:10FD0000A0F6FFB0999DA320474FF2233AE6D769AA
12244:10FD100068A3EFA993D269BF0E651D49F27E4E21FB
12245:10FD2000F43763E07D6AA2FB16CDF7F012DCBF9CCE
12246:10FD300067A77BEEDDBE90F7A9E53BE6DD4CF287D9
12247:10FD4000F9EA1D73BE9F79BB2D0B4479DF3BE6C3F7
12248:10FD5000199DA3B6E4B22CE85FEA777F067CC77CE6
12249:10FD6000592CD94D1F79C43712F240BD5F3D25C5CE
12250:10FD7000933869F095EF576FD54A17E07760BCA3C9
12251:10FD8000C47C3B17843FB34780DB0F7BCFC9A648B9
12252:10FD90007AB75BD1A9B2730FF3763D0C38A9B8DA04
12253:10FDA0003F4B7A53F05771857121785074E73533A2
12254:10FDB0008AC3053E1067D4F7FB316B247F51719DD8
12255:10FDC0002FBB9C487F9CEAC99D847DB882C399EC77
12256:10FDD000E89DDFC37A1FBD23D28DF99D94BF6B11BF
12257:10FDE000BAAF8A261994BF98E206CAA57C2B577130
12258:10FDF000024DFA3881D0774EC387964E06DCCE6925
12259:10FE00006F8FC1C7D7FF8FB1DFFB27D74E127C2280
12260:10FE100033D1336312C9B9693A7DF2F5DC4F52E848
12261:10FE200077662E1F1D0AF9774B4AE975E8D79629A0
12262:10FE3000FC077F4EEAA4388F3F2FF86B0AD99FD773
12263:10FE400088F759BFED3CAF8C6B16F4B06AB1B89728
12264:10FE500098CC1A898E1303F1B236CCE37F5B5C73C6
12265:10FE600020EE782FFDBEC8CBCD6D19A787F783F79D
12266:10FE7000B023CF3AF9C9C67BF8E5728AFB8D3EB252
12267:10FE80002A8DE7371E3E5A4E71BEC9472EA671DC39
12268:10FE9000DC7BF85591BFFAC845C4056F3A7C4CD459
12269:10FEA00087FF6008633F397CBCDCCBF171C768CF4A
12270:10FEB000FDC0D7CD971A8F411CFF7EED9CC56914FC
12271:10FEC000D73A3B255BC4B5AE03DEE7C52F5A1FAD5D
12272:10FED00005E25AF74D12EDBA2F887DD07D41D079D9
12273:10FEE00018F8C1E07F3E55F1BD8A0F0FC42FD53EF3
12274:10FEF000FC57C527ABFDCCF6B8369A418CDE7F3A6D
12275:10FF00006EF8C949B42E7DDC70B7B9E731F22B5DCC
12276:10FF1000604EF0895722DF75425EB4148AB846AD50
12277:10FF2000A7C389FB18450522DF72A1C3093E8F3C98
12278:10FF3000EC5BDD3122DE51C5C5B65CF027619F1454
12279:10FF4000217E91D72FEEE929071F2DC27DDE34F4E3
12280:10FF50007FFCA81C8FA1BF5D1744DC61B7ADC3E96E
12281:10FF600090E3A01F3E6E1AF863D16A2BDD3B6AB99D
12282:10FF7000D0B882FA29B3F78DAB858C6BFDFA71A7E7
12283:10FF80006B41E366F68AF84E8CEBD48DEBA7B86034
12284:10FF9000DE1FC59F76C7B81271EE57F96294F3FC65
12285:10FFA00043F2772A8A9C7E23E4808A934AB0C8F77A
12286:10FFB000B8E5B985D7A3B8CC5DBD629DE79BFD359B
12287:10FFC000D84FC5926F175B84DC64867017EE639719
12288:10FFD000182F1F4FC6F9E405713E290E2BDD8EFD4B
12289:10FFE000D86012FC86C5A9DF4BEB58F6735EEF773D
12290:10FFF000F1C9F4FB6243130FB24C9C8F97CFCC81B5
12291:020000023000CC
12292:10000000DCE07AF719E0FB77AC5513BFC325DACFF4
12293:100010009D1941F750BA0F8F28C4FE9913E67C8EC4
12294:10002000F17DDB3BE92BDAA773A29D8538F1F41E45
12295:10003000FE6F914F703E07FFAE957D45FAB9F2D73E
12296:10004000DE12F0D7FE17C6A99F79CE22F4B31E7A2E
12297:10005000A7F9BF2789F7E9B8FE4EFA47CF75F2DD59
12298:10006000CD1C6721CA53CD3D51805BF7659378B7AE
12299:1000700096F544DD14E49F7DAC5DBC671B4AD787D1
12300:10008000270B39B03CD34EEF9D35245AAD94B65F63
12301:100090009841BF07632ACDC4F9C06DE9DFEEF88B44
12302:1000A000C9425EA56DB004FCEF5C7EB8C399CA7B03
12303:1000B000D938C6767C3FBCEFFC051163192ECF639F
12304:1000C000DEC4C78B4DBAFA6ED4EF2B67E29936D5F2
12305:1000D0003EE765FBE3EB4C723CE07989B83F112ABF
12306:1000E0002F1AA6C4F6BD57487237CE46F7AE328DEA
12307:1000F000D29EC7EB3AC82E28FCB7C9FF61A338BA15
12308:100100005D364187990691EE32C8785F69EF53E713
12309:10011000981F4FF14C9A3298FAF1533FC6FDB9D06F
12310:100120002B92581B8DAFF433558FEB61366232F250
12311:10013000F7DE8A8C867EE1F9CEE4A9A5930B41D740
12312:100140005EF651909C381F11D5148CBF06A3DEEECD
12313:10015000F9CEE469D44EB5AF6F9ACE3EA278443F53
12314:10016000D14F7DA681CEAD0D46F62AFDEE00EB20E7
12315:100170007FA66AF72EE7931FD1BB0D6E4ADFE3FC23
12316:10018000F223BAEF379FD20F9A3DF4FD647335A581
12317:100190009DCD8DF4FDC3E6264A6FBE35B200F4BF97
12318:1001A000FCD05AF651907CAC6F337B82EFD7BC3BCE
12319:1001B000B57F3AFAFE64E1B77937ADFFF2FB55F946
12320:1001C0006481CFEEC542CFE474B9CE113BB0BED04E
12321:1001D0001D29EE25BC344D9C5FBB9344BE71B278A3
12322:1001E0002FD46D60DBD0FEA56916CABF9B6EA077C9
12323:1001F0001DDCB1A2DF77B30CA4A75D3F636A03E007
12324:10020000E48EE7DFF302F977AF12E5EE21E2BB9A65
12325:10021000AF2A9F34A5CF8E9025CEC7C2FFCEE99DD1
12326:10022000FAEFC36FB1985F687D759F3E141EBF954E
12327:10023000FB96F605F477EC83B4A07DD1E0A47DA114
12328:10024000E850D15FC314B15F33C3249D73D945F027
12329:10025000830CC3F938C146FE4137FC177C3DBB64B3
12330:10026000BCFB15FB41FA03D47E50FB40D17B32DF4F
12331:1002700067C2DF21D631C9D8BF9DFEA1C962DD1D8D
12332:10028000F191A41F77B79B1D9037938CC2EFD0DDFF
12333:100290003EAF00F7C24BEEB637F6C7BFDE94EDFFB8
12334:1002A0006938287E30001CAE58BF45DAEDFFC1F535
12335:1002B000137F03DF5E2CEE6586D26BFB64657717D8
12336:1002C00074FBCE64F741D04FB76633E19CD26DEB3F
12337:1002D000FF1EF94BD3C4BE50F4D33085C97768F8FC
12338:1002E0003A33AEE4776A3D7DEB5CCA88EF65CA7845
12339:1002F000E350FCAA7505F1BDD7270F0EC09331AEB0
12340:10030000AFF07E86D6D9E99CAAE8F7FCE0AF96402C
12341:100310007ECD9FEC147E268351BE072BE449DF7708
12342:10032000CD487157417286416FE9392CFC717E7E50
12343:100330004E823F0B36E8E0B86BCB14B1EEDEF985A8
12344:1003400006D809CEFFC5EE85DC3A3FA4E724F49237
12345:10035000F3DBC47BE7BCC7591AEE8D20FEC789DFEB
12346:100360006D117E10E3C35F9E843EB4E46123E92FE8
12347:10037000E7716CE6ED963F287EE74EDD1FAC93ED0E
12348:100380005AB65DBC997EDF8CD327F49F8F6C0DE944
12349:10039000D08BA73FFCE009BCBFBEE4390DE6667612
12350:1003A0001476779EFF78AF51FCCEAA8C3B9921EF53
12351:1003B000F7D7EC16F7FBEB106F02FDE5C08EADF83A
12352:1003C000FDC9FABD6666E3DF67E09D343ECED2B676
12353:1003D000487E90E4FD6ED1C78D5ECBBC1B604FAEF6
12354:1003E000DEAEFF5EB34B9FAF0BB9B7A84D91BF67B1
12355:1003F0003092E5D2FDC42DC25EACF8F695FAAE9708
12356:10040000E0EB5EA9EEEB7E41EF7B1B0F7F99FAA13B
12357:100410005DE467CB7C17CF9FFB52C05FC1AD41F25B
12358:10042000FC7349ACA08DAFAFE1B0CD013B40C30B35
12359:10043000C24E70BE2D9AE0BC3CBC93FC0AEC45A3B6
12360:10044000037AD83D878C6457A86FB7FD0CBF4BDB90
12361:10045000F09C46EFD5D61F0AF309F85C5882F2A546
12362:10046000876C0E27CA5F0C63B03F9FE778C3BDD887
12363:10047000F3299D847FE0157609FE370BBF5FA1F05D
12364:100480006F7C58F893973C21F1B36D9589F0EAD3CE
12365:100490005842DA95785278FE95E1A93E3CA1DDF408
12366:1004A000877F7F5CE29D21DEE6E8B64AFA5D0C8537
12367:1004B0006FCBE18F52A1F72A3C1B399E7FA8DA3B14
12368:1004C000E57B785F83E76AE0D9FE8FE3F98F908F51
12369:1004D00085A4F77EFC53E8BD9116F2A32BBB86B230
12370:1004E0005B0CAE7DF7581C1F7878E2B3A4E796C783
12371:1004F0009EA95FC1C88E76ED14D8D1AE7B033FEBC9
12372:10050000CB7E77FD53B9A08F167327FD6E8C3746CF
12373:10051000BC2BDF9D367BFBF37CBCE2D8AF52F7638C
12374:10052000DFBC1C46EE93B9725FE2CF1AFC2E60BBB3
12375:100530008DEC6DF5ED61C2BE7640EF3FEB4E12BF24
12376:10054000D35762E9295F01BD9CF78771D479B0B6B2
12377:100550005DFEFE8B3CBFD52A3BC3BE90F7A11C6F4E
12378:1005600050BDBA2922DE36236192137CA86501F3BF
12379:1005700084677C1DBF67C4EFD5EFE50DA8070EC0EB
12380:10058000F795FEC7BC7A3B87E23F4BE5EF4BF6EDB4
12381:100590000F99AF5EEB8DB21A89EEE8DD86BA47C5DA
12382:1005A000EF2B7E02BA8B0AD053838C4F3BF6FDDFD4
12383:1005B00098F03B4DDDBBC4FD08CE21B7E29EFED9CD
12384:1005C00036110F5753D035C6EFC4EF74083EB46CE4
12385:1005D0009FE673A6F54347CCB741BC6B1F424FFB68
12386:1005E000BEFEDDC37B037C64D4DF393C77943029C5
12387:1005F000B7BCFDC64FF6C9AF90DFF1F8DF16CFDD0F
12388:100600009BC3D7F335FEC66B13F5EFB85CE7D4FF99
12389:100610004ED377B2F5BFD3D46B97F091FAA0D253F3
12390:100620000F4D11723C3455F0BDC1A51F479D8BBFC6
12391:100630003B4E3FDE6CB77EBC6F8B977F555CEB37D4
12392:10064000C1EFB81CF7841CF73772DC7F164E2A1DE9
12393:1006500068BCFF5FD3FF0B8D21EA0800800000001B
12394:100660001F8B080000000000000BB55B0B7C94D5CD
12395:1006700095BFDF7CF3CC7308210904C224242160D8
12396:10068000880324542B94C9D300D6065C2D688401BA
12397:1006900052C83B80B5D2D6FE3208222F5BA8D1A229
12398:1006A000224E82E1A1613B118289863A286411AD14
12399:1006B0001B698BFDFD56DCF828F23213A374E55755
12400:1006C0005DF6FCCFFD3E321942B5DDDDE4A737E72C
12401:1006D000BEBE73CFFB9C7BA929CE317C394588DC1B
12402:1006E0009873E69E08215CAB7A8A12B385E87B4357
12403:1006F000154D0E2184DB7BBC3E5688DA8EE16253B9
12404:1007000032C1257D6F1A00B78DB36FA2F18DED7FD9
12405:10071000781BE3BD07558785C65F6BFF280AFB5C26
12406:10072000FC325C88E158F7519420B8FAB2C2F02646
12407:100730001A77103CAB5515FE4CDACFE83363FC62F8
12408:10074000AA0E7BCD82DA929656730FB5557B5B79F4
12409:10075000FC0D9F69F0F8DEC641E376CCA7B6CAE887
12410:100760008DB2537BBE5DDFCFCFF3AB53159717FD33
12411:100770007BFF10B70CF35ADE895B4AED15FCCCBC4D
12412:10078000B6FDF4D00B996E5A57D341FB440CEC5391
12413:10079000D361D2608977756A6B510CD14BB4282232
12414:1007A0008D9A8B62AB584DF4AC6A6FAE16D45F95E0
12415:1007B000718F49105D023EB518DFA71F8388A375AE
12416:1007C00076FA8BE877D1F779D452DAF755DFB1DBD7
12417:1007D0005DD4063A5F8FC2770307697EE6003ED399
12418:1007E0005D44BF1CB4662146D0BA83AF4739687CEC
12419:1007F000A3EF75496FA39FCFFD9A0607A8653AB787
12420:10080000AB7CEE8A2F55A6BFBEDFAD2E95F799D5EE
12421:100810009E1689739DF4C9EFCD7539647FEAE23283
12422:10082000E07F2261418E9ACC78BB000726CE69DE3C
12423:1008300044A854F968DFCC6BE9B654DBB7CB24E6A7
12424:10084000FBC0B7D4035DA3483E4E140F9F4C235703
12425:10085000E7DDE332F0BC22B33B7505CD3B19E188FF
12426:10086000B4D37E0F158F8B045F5F438BFEE25D6612
12427:1008700037B59507E5F74EDABBA3206F270F4E5526
12428:100880003DCAC07E776ADF15C2C3ED00DF3CCCA74E
12429:10089000726F6304F619E09FEC9FEBB2F3FC13DE7A
12430:1008A00077EEBA87CE773223DC09BE749945B98FCB
12431:1008B000E5843E82EF752636820EFAF7E6821FB493
12432:1008C0002E906160BEF6B69BB479F7348B41F34C41
12433:1008D000CCB78BCF0DC6C7EEFDE097F7D0FCEA672B
12434:1008E0005461A1EE6AD38A389CFF931D83F12BD704
12435:1008F000E85C6DF2C7C505C96B75C7557D8960F9A0
12436:10090000EED0F5C3C1FCD4F978324395782558BCB4
12437:100910008250AE6E6D66B92675F3D8A6702BECD4F6
12438:10092000268677272B74FEC407ACCEB584FF738A66
12439:10093000366EA03686608384CDD45AA97DC624FB4A
12440:10094000A1B6583F86D8A9106C2A1E976348A17D8E
12441:10095000D4D6C9E0EBAB335D8FBA088FCD334B668D
12442:10096000CC043EA26F99A06FD65C8AF08868210AF9
12443:10097000D5F79EC077FB0F9A04EC478DB5A3F263C1
12444:1009800092D37E27290AE1DDBFC3E4F5B0FCB9228A
12445:100990009469422CBB49EACD270EF734751CCD5F14
12446:1009A00063E0F355B7A85E1BCDEBAD271210C93F2E
12447:1009B0006D4DFE01E4B5FAB86AB7D2B9F37DC9BF8F
12448:1009C0009A0EB8C5E4B4D0FA5A1F75125CBB57F141
12449:1009D0003AE4FE027A597313CBBA3863AB4D11591E
12450:1009E000D4AEE93363DE99C38A788CE66D0E8B6AE8
12451:1009F00002DE3599B3CF2951D4AA5BD627D27ECB5C
12452:100A0000B79B3EECB1CAB557E8BFBACE6D2CB7154F
12453:100A1000DEC1FD557B07C335C23800D3FECDF8E3F8
12454:100A20006621DA5C91B1676EA0BF2788095754D060
12455:100A3000697A3CF4E104F84AF2241A88D82385B88C
12456:100A40006F92331E7ABFD1E8980D3A043A4D76D0B2
12457:100A5000ABEEF0810AE0EDAD0E731AE8A8B5AB5F1E
12458:100A600061BA06BE20BADF486D82E0F30784A46F46
12459:100A7000A05DCA799D49F15AB19E68C8FB5915EF2E
12460:100A80001A1A0A78FAA3D83E09510CBD58B520C7E6
12461:100A9000003B07351684CAAF747D506C46251AADED
12462:100AA000D4FFEF197BD4614176E23F5D298C7F81D1
12463:100AB00059B87DD47F5FA4331A723FD61A9505BC0E
12464:100AC000C65A93BCA0FB5863DF1A7C7FF328C5F19C
12465:100AD000106D7D24EBE5C90AE0DA0827E4444958A3
12466:100AE0006C043D368F5A6C84BC8FB5FB324A32079A
12467:100AF000E0028C431F8497BF5714E136E23BCF8D51
12468:100B000054FC06DA3F6023FCA02746BB09F8054CDD
12469:100B1000121662CD20FCC82231FCFF8E9F9DF08B07
12470:100B200018C08FF81D8DF59F67137DA84D9A2B4433
12471:100B300037DB85156C17747A5E24792F205EA52922
12472:100B4000526EAA771C29C2788DE85E8F754551F2E6
12473:100B50001C45380FE030D9AAB9925FB95A7B7FAEF5
12474:100B6000F42FBAFDECC8751973A9DD9E5B62465B74
12475:100B7000A866C6F70C61EF5729569693CF49FF60D8
12476:100B80008FEF5DA1D8533306E45BD7AB3AD97555E7
12477:100B90007FAA7EBFCB2C52F0395777068D970BA9D1
12478:100BA000D78B56DBECA9C17A043D237A94DB2B6EFC
12479:100BB00013A46FEED571F6D4A9D4AF5E340BC89EE2
12480:100BC000A65FB1F47B256508FDF285E865FB60D87A
12481:100BD0006F9372EE8F54BC6B09FFD4DCC17A97A47B
12482:100BE000E941A35BE1F3357E6564D853AA7841F30C
12483:100BF0003BA973758C7638CC2BCFF5C23FDE4960AC
12484:100C000029FA1B62594F7990ECD7BF68E7BCD3E84B
12485:100C10003F02FB71CCE44BB6D3D0B11AAB13FB2F20
12486:100C20001014E8905D2B15DDDC9E0AAF6DF3F3E642
12487:100C30009E3190AF77DD1627E2B0C6754D91B0E3D7
12488:100C400059629DFD4C06820AB1F7CAD4EBC7332422
12489:100C500038E28CCE1738628A53C06F9DAFDB735D6C
12490:100C600079B939D75F5FF5A7B6DBBF03FB757FB3F3
12491:100C7000395E8A4977C6B401BEE97CAD131EC65BF6
12492:100C8000E7D755FE11EEA3410FF5E25CB633CFAACC
12493:100C900082E30A8D7F56FA1D8A7F3A7D676A7C5807
12494:100CA000DE21ED51285F757AFF9036C4F7C98FEECB
12495:100CB000607E080BDBBF50BE7F135F28C22CC5507F
12496:100CC0007EAC45809F8906691F1397919C10DEF7C3
12497:100CD00008F7E11E6AEF0A7FCBC472A8F1E75EF065
12498:100CE00087A6BE2BBCDFCF48FEBFE34F476EC903CC
12499:100CF000C17A18AA77D7D3B36A87F3DF75BF47964F
12500:100D000086F42B443F43F44FE7977B7514EBD9559A
12501:100D10003EAA2D525F357E45D0EF90FA863FE87BA4
12502:100D200035ED8AD79FFC2DF44F21C4896F8F85E85C
12503:100D30009DCE9FEBD91DDD4E9D16FE63763AFFA931
12504:100D4000141907787E62F136034E3794C3EE9D9AEC
12505:100D500028DB039A7D0B6D4F539CA3901FDB94718E
12506:100D60007204FCF529B3BE8FCDDB4CF89F5ED33DFA
12507:100D70006625AD3F9D2BDB53880B83605798580445
12508:100D8000BB7E7AA4C5033A9D5626E4C13F9C561EFD
12509:100D9000B85DC2F16607E005F17976824F99E47C8F
12510:100DA000DDAFE8F6FFF482EF14F03C451C053D1C76
12511:100DB0008A28E1EF284A4C31E173FAFEB4296BC569
12512:100DC000C0F99B720DBCCEABD96FC283E9DEF7537D
12513:100DD000C5DB445D8BE05208FFE4BCDF14A750FF85
12514:100DE000FB3F1B3719FC75AD1AFC7DF8EBE41B01CA
12515:100DF0006FE37DBEF7659F6971905FBAEA270B3E8E
12516:100E000093FD653906E84BB9C64357CC8468F0A713
12517:100E1000DF3B2E1A7E47F743FDC70F44B883F876B1
12518:100E20008EFC94181F044F783429D88F1DD9BD39F2
12519:100E30001DFB949B3D594EEA3FDBF87412E28DF2A4
12520:100E4000DD8FA4731CBC7B633AF299F2A6CDE92E28
12521:100E500086C3DD9C4F19E5B92FECBF79D7A6A0B8A2
12522:100E6000BB2A5F65FC4BAD470AE16F67DFF0E9C362
12523:100E7000769A97F633C50EF1BA57743F0CFFB81047
12524:100E8000F131F2B7062BDB73DACF05FE374FF8FEF0
12525:100E900073D0E313191F99CA68DEE55C23D367A1F9
12526:100EA000F06E89A771B141B1378BE0F9631A317FD8
12527:100EB000F13AC59C003BB062D864D58175C3188FE8
12528:100EC000251B2677A17FE183B27FB6C57BF024F690
12529:100ED000F98DD9D9EC607B9352326900FFCBB966AA
12530:100EE0005EB7688BC2F1BFFE9DB427E21A83CF794B
12531:100EF00059E3BFF8CAA2802F3FD0F872DB83EF1C02
12532:100F00004DA07DEDB1EE2BB01B6F3F7E26D54FFD82
12533:100F10000531E73221E76966F75315387793C589BC
12534:100F200073646725AAF1347FCA8F731F43BBE8C17E
12535:100F3000C54F55C0DE6EB772DEA6E3B74A711A60C0
12536:100F40008F5F6FFCE112D0EDECE3568EDB57358EF0
12537:100F50008F1743E8A9DEEE21FE3B28D1D9576FE574
12538:100F6000F6857ABB70903CECAF4F60F8B7F50E6E2B
12539:100F7000C57C295FABB4FCF87AFB4DFD325C3828A8
12540:100F80009ECDDE60130EB2534971AE517974CEB46A
12541:100F900089354D1BB573A5D1FAC99EE47CD0217B60
12542:100FA000E3CA2E84BCE63C998FBD797243128CF261
12543:100FB000F2073FD85941E373F34AC6E551BF75C7FD
12544:100FC000675C5778BDE39185A0777993459E4F3B49
12545:100FD000F7D9C7D3E39FA2FD3D6F9838DFAFDBF1B0
12546:100FE000C1CE8DD42EDDB2D21C2CEFDFF6BCC91AD7
12547:100FF0003EDFA457D7A3C33FAE579B93587F9A4871
12548:10100000AF32FF79BDAA7B700DD3EF81BC92D9A01E
12549:10101000FB59932709FA7476C20C9673CF6185E960
12550:10102000AFDB717D7DB176DE2A836FCBF4E4013BCB
12551:101030007E4964337D8F747C928EB8F752FB82BFF9
12552:101040007BEE43746E3F9DBB9DE8EB1F7FEDF83454
12553:10105000B37B9C93CE37CD20E3DD6BE2D63C835649
12554:101060002FE83697444A9A2BA8CB68FE93FC982722
12555:101070009AF0A9EE54FC6159F067B79E3322DFA3C2
12556:10108000BCF1C3E038827E3E0CF2DBD7C3F79BDABB
12557:101090005AEC93366077BFF36783F007F9E99B7BDF
12558:1010A000C2843FE8BB57F313EA33139F7A3B46B23F
12559:1010B0005D00DF8CA8C7754C68027CCE2CF9D87B0C
12560:1010C00088E22659C711EAB481739EEBB890053BBC
12561:1010D0001B7ADEDA972FB07C54B73FF299C2E79FB4
12562:1010E00075CE98F5CDE73FB2FB4216F877CED433F4
12563:1010F0000DF956AFB9270B7CA87D45DAF37F940E26
12564:101100007A7FC5063A08E979AD62653929542F72AC
12565:10111000DDA0F7B8AC1BD476EC627BDADF29EB37C5
12566:101120007586EEA278D43B567CD0057BD69F20F303
12567:1011300028DADF05BA4D1FA7F941635FD25CB26BB5
12568:101140002F5E950799FF9D85FE8EC73EBE6AD8012A
12569:1011500091152E10579C873E53FFC2D5C9EB21E74E
12570:1011600067BD23A6C03EBE99F5B75AAEF7BD1A6E4D
12571:101170005739EEA1DE20FE5D3D875715AE41F58063
12572:1011800070E10A9A576776FC80E3E313AA405C5744
12573:101190003751EA937859EA53CDBA23E684A0FD7615
12574:1011A000429F186F192FCE7EF56FAC975B66BA3AE7
12575:1011B000A197E1B085D82F21DAAB28DA3CE27FADE8
12576:1011C000864344A796F717AB3C5ED7AE8A915893F7
12577:1011D00010E94DA373148BAD46C4D3B3856F3AEABF
12578:1011E00036C2D8F3CB5B687CCEABEAD44D82F3A792
12579:1011F00045259C57BA5357213E32281A5D7DD97335
12580:1012000083FD599EF453D35585FD58DFC8708E5326
12581:1012100066CDAF2905BEFABCAC61721EEDC37196F6
12582:10122000F0F665CD857EFAFBB2E6450ECCBBEBD57C
12583:10123000F015EC17852FFBAEA0EF84E5CBFAE8E7BD
12584:10124000E4472027759764BDA350FDEA09C4E7ABC6
12585:101250000E93BC203E3424BF6B801D273A83AF170A
12586:1012600088AF2EF81FB770B9A03F934678A13F759D
12587:10127000FB1561449DA8C3D2843A52ADA9270EF252
12588:10128000BCB1FD4F66C8735DDB3B66C724AC977588
12589:10129000275248B6E3759AFFAA691FFF2EEA7C35EC
12590:1012A000C7A517AD31BEC3F97BD5C156CED3AB852B
12591:1012B0009FF3F4EA96C1F2D29FE0E0BA48A87E8498
12592:1012C000E53B06E9C5ACED522FEE52C50AD839A16F
12593:1012D000D5696725C4733C32B04EC6BB2EF5C2C378
12594:1012E000885F02298A53A1AD02619E75888B3CE913
12595:1012F000329E09FCEE85EC656C57BCD977D0B902FB
12596:101300005ABC3B6BC336A31A84CFAC4E59970C849E
12597:1013100089F243CC6FF768F041B84A22F27358AFB4
12598:10132000B26057030659470D3D47BD562F3A817AA3
12599:1013300052E600DE731213A51D135E969F2E83FCEA
12600:10134000BECB40E35306D62FC997EB07F2215907CE
12601:10135000BB9E5DD94DFC2923FEEC253EA37D9EFC62
12602:101360007119D99916F2C780FF95FC315A5F7D0635
12603:10137000F7BF58EF64F860FD4D0C1FAA7731DC5EB3
12604:101380005FCCEDCBF525DC7F02A87E17FF7BBA1181
12605:10139000F2D0051D1B35009F8A0981470D9E7F2ACB
12606:1013A00046190C8F52787E76FED38D1ED48B66DA6A
12607:1013B00035FD764422FE3A6B9375A8B33659876A99
12608:1013C0001DE5BE259FC6CB66ADDD2DF350573AE631
12609:1013D00015C42CE0FCB59FF257D8A395F9EE3CF06C
12610:1013E000E5F8F1FCD46D6C276D5C073D75F70DD108
12611:1013F0005C077C83F271FA746EC6D475D904E74633
12612:10140000282CBF642F6E2CD1F34ADA27BF53DEA3FA
12613:1014100014AAD565D87FD548DB54D8DFCF5DEEDB85
12614:1014200080874EEFA251CB53110F75991CEFA28EFE
12615:10143000EBF9BD49209FD2EB7DFABC0E57EEDD588B
12616:10144000372B63DCBA29B03BA464B0732EB36801B8
12617:101450005E2E43B8B296ED96C3083B70B726C779A7
12618:101460000E1917FBCD0E630CEA3761B9B11E5AD7BE
12619:10147000A5F1F9B8C6E7131A9FDF429D8CDAB7A928
12620:101480001F6D37F5A39D01FA4A7965BA3D91575210
12621:10149000C6F22BFA9200EB75C1D9D02F696F92205A
12622:1014A000D75B34F94DD0EC4D576E49955CE7E37D41
12623:1014B000AAB47ADB05ED1E443FAFBE6E60BDE07698
12624:1014C000DE8DC263859D7F49E69D6234C52304CFCE
12625:1014D0007B299EED906ABD23F363D2F37953651E99
12626:1014E000200E58E4BC04470EF464AD566FEDF51AB7
12627:1014F0003C26D4A763BAD363E07F35FDD2E143FF36
12628:10150000ADB2BDAE994230B5AF28F27C35F3BAD357
12629:101510008761BD6233707DBB498E9FD4F4AF264591
12630:10152000DB4F3B8FB0FA92C08FC0E197929610BC10
12631:1015300029C2BF4CDA7D7F3ADB6BE14F9F07BBA826
12632:10154000F8DE174E8A2B0BA62E318E043D7C3B0114
12633:101550005717E42C31DE8CF1D6F7EDC1E3237C493B
12634:101560008A1D70B61C1FD1BA7398330836BDF83E79
12635:10157000C6CD869C250504CFB1788FD7436E7E2BD0
12636:10158000E5CBB6BFED0CE856D521E3F6BCFD6D17F3
12637:101590005F845F6E8B74C2BCEFCB4F667AAFEDD8C1
12638:1015A000B305F2D6DB2AEF0336B5FC69E7CF799EA7
12639:1015B00005D724B4AF2F5BD077561EFDE362E0352C
12640:1015C00027DCF705E0878ECE643CE70C977AFDC8F0
12641:1015D000D1BC25D0D3DEB6FD3F81FECD89A68016D5
12642:1015E000F8BC60E33A44E5810905D0D3DEC8EE8556
12643:1015F000D8BFF6798B13725A79203E0FF58143F9E3
12644:10160000B21E5E31716B12FCACE1E57DBB7F8EFBDF
12645:10161000D5E76D7C2F541723E3BC4AB571DA4AE64F
12646:10162000DFAEDD4F03EF7D36BE9FAD40AD8AE08A71
12647:10163000DD695CC77FE5EB8F16820F85EA8EDDE8FA
12648:10164000FFE2399B017438697645CF801E9E347164
12649:10165000BE59A1C115A7864B7CC27B8A987FB15B1E
12650:1016600093E0672B87FFF476E03D47DDBA13F98EF0
12651:10167000D863E1BB8973FB886EB4EE5CB3690AB8CA
12652:10168000DCBB2FD20879B9A06C5DF814F66F96F325
12653:101690002ED8B6323D3DCDE305BE47F304ECD6056A
12654:1016A00065DBA0FE73CD7BB2908F9E7F7E0EE7A59B
12655:1016B000BAFCEAFA52F99C65905F644B40F6A85276
12656:1016C000FB5BD83D2282FC6D85069E3FF464EF53A0
12657:1016D0006260FDF91693DF4C34AAB08875D6980184
12658:1016E0007DA84CBCB518E7AB3434A6236EA998DAB4
12659:1016F000B3107A71CE26AC0934EF4DCD6F551E5C18
12660:101700003317F1EFF5F0B9A2D9A34B09D27F5D6A87
12661:10171000B77983EF2543DBF7EA85FDADB401F8DE49
12662:1017200015168EE1F5FDDE34FBAA91A7D5C648FB60
12663:10173000F13ECD6F213BF6B5E6EF16AD1E3CBF3F47
12664:101740003F86BF5F6BEE4987FFD3F70FE46B7EC325
12665:10175000D8930E7B15BA6E0EC211D8911714B6230A
12666:101760009507950F54A253A5D5E355411761D6CFE0
12667:1017700069BCA2C87509D334BAD3DA0D05C9FCDD3A
12668:10178000CA169BCB46EBAAC27AA210175547F6445D
12669:1017900021DEE97D59154D1ABB62E334FEA4682CA5
12670:1017A0000BAA3756F84C2E5BD6107C46FC44F396B9
12671:1017B000E36FFAFE3305297C9EF2F670FE9EB0F7C9
12672:1017C0004C839C96EF18BC0EE7B207E95F6FFBAE47
12673:1017D000B8E0BC3C45C33BA07CC07A12F8FAC324F5
12674:1017E000F0BDD220D6E1FEF23CADC1BD26C1C22A79
12675:1017F00061BEF7ACFC6B4418E4E5FCA56AD6DB5E81
12676:10180000A587EDDADB0573D92EF59A7AD8AEBD7EC1
12677:10181000F42EB60FBDC37A16C24EBD5DB05C8E8F7E
12678:10182000EC59E8A0F1FD3A3C46B0DF7FEF680DDBF4
12679:101830008F39AA7C57217699ECB21EB4E1543DE76A
12680:1018400017264770FE7DBA40ABF70CF087F32E5D8C
12681:101850006F7A8563FF41E8617904D775288E6A79CC
12682:1018600011F1DE823827DE6B94639D940373F07D63
12683:10187000636CCCE565E0CF1DA3DD450539B8DFEC31
12684:10188000E13C82A49AFD4DEDEF2C9C4F064C7DBBB4
12685:1018900061A7D247BB6717101ED5E6EEF5D984D2F3
12686:1018A00045534F174AE4B355698FC41E2957BD9954
12687:1018B000BBE43D8D765F79B7467F41494C23E442D6
12688:1018C00091FC7DBDFDC05BB02BBDDDE3D81E87EA7A
12689:1018D000CDB9F6C7A2601FFE4C7EDC1394EFFF79F2
12690:1018E000F11EBE679D8FF720D42E5937581EFABFC0
12691:1018F000BA83F33EB125A81F72D830180E9523C8BD
12692:10190000A37F90DDF130DDB76B7A5595D75D0B3A4B
12693:101910005C85E711AC06C1AF85C021F345898C1306
12694:10192000B6C3FF133DAAC7F84F719EBEDF2460C740
12695:10193000D792FF62B82DDC8B7CC5B09FFC53ACF412
12696:101940004FF00B5551DD5C9FEA6DB3F07DEF431D09
12697:101950009F24E1FC24875C87A9EA78290EF9FB3EE5
12698:101960002D5F203F18C7EF63DA3AE29077E8FDD5A4
12699:10197000065F3AF0A28888E375BDBF46F5A703FF6E
12700:101980002AA53B0BE3FBF2EDDA7C8255C082CF51F6
12701:10199000AD487D171D2ADBF350BE3DA9C92BD98563
12702:1019A0002C7EDFF1B2AC0FE876A042B327AFA13FA7
12703:1019B00053EABD5DBF57A2A515D0F721EC43428184
12704:1019C0001E17AFE0FACDE3050E096BEB795F595FA7
12705:1019D000E2F1DA572E64A564629D362FD80E8D1B76
12706:1019E000B02BD0FF04D6FF874C7174AECA9D8A73AA
12707:1019F0002DEC54E99A229A2E961B571671DD4C78DD
12708:101A0000386F0BC52B548E2617483A551A8615C6C3
12709:101A100006ED779E6C7AC214B6337ED89D1FC53E04
12710:101A20005A843AC50F4BE5BB81ABFE2658CF719E59
12711:101A30001DD28E436DAE18AE95E3E52B1AD7C70FB6
12712:101A40008147289E15EEC6A238C7B5FD3ABEE76DA0
12713:101A50003A7E79A611C17498BFA66804B5CBADFFD4
12714:101A60002C1DE479CF7758FCF0AB15A52BD7470F89
12715:101A70002137D7F8831D41FE2B05FCF5F2FDC6F595
12716:101A8000F00F6DAB15FF29D48B04E95533EB17E943
12717:101A90004B905FB8B920A4EE50BE782CE26AE15EAC
12718:101AA0003C167E86F46AA17388FC920CE42803BF7E
12719:101AB00019F1701B8ACF5F0AE4BBA49B0BA49E6F35
12720:101AC00099E90AC06ECE500D1C8787EEF765818CB0
12721:101AD00027BAE322EFD7DF7380D9335449B74443A1
12722:101AE000FFDBD0B7C4B84807EE830AF3C3E5BCC335
12723:101AF000363BEA3781C397B9BE1B783862BEBC3724
12724:101B000088102369BC2B615253B01FF975A13C6F3B
12725:101B100078B68C5BEA324C7FBF3E941979B53EC4EF
12726:101B200071436638DF97F4B67FCE7E2BD09963C7BA
12727:101B3000BD466F376587A44F755FFF571CFC6B6F01
12728:101B4000E75FF81D5AEF579FF0FBB48DDAFBC0D763
12729:101B5000DAB5F75DDD8E48F4078A3F2AC2BC4D5ADC
12730:101B60003B502790F562BDD5F35FBD1E1094078FE3
12731:101B70002E1C3A0F8E714704D7091CF143D55582AC
12732:101B8000EB04A969B24E801675825493AC130046DB
12733:101B90009D002DEA04E8479D0030EA0480512700AB
12734:101BA0008C3A015AD409D0FFC57CF95E2640422CFC
12735:101BB000EB97116CDFEF6B56BD88CFEF3B2CEFA19D
12736:101BC000EE6B54F89DD645FA3EFCDC35EF750E6A97
12737:101BD000EF757CDBF85EAFAE4D75825575A6BE63C2
12738:101BE000A8EBD4B52ACE35B02FF5F3F9FB1B3B7328
12739:101BF000DE2D457FB3C96970804F97E250AFAAECE4
12740:101C00006CE6FA5341FC6133F3B74511A897DE65E2
12741:101C100091796E8D4ABD53F83E94E3E01A4B37E755
12742:101C20001F557B157B59F07DEE4D9FB11D586B8B79
12743:101C30006A029E353E9BBD6C88F71F7C2FEC1057C7
12744:101C4000EF9B97C929A226A288EF9B97E19E995AFC
12745:101C5000A17E65E4FB634A4C87431EF1AE2A03660E
12746:101C6000DD2EF53EE43D556567EBFA4471ED3D34FC
12747:101C70002A03E07FE8FDB3BB3032F64C380C859880
12748:101C80008CB8A9F8F1B2FD6DF4BDFEAD168E3B56D1
12749:101C9000E6BB97438E8E995C5C273976D8C6F9D11E
12750:101CA000C7DBC60FAA937CEE725717F2FDFC68AE35
12751:101CB0005BAC3229EC97F38BC7C5F3BB81E326F607
12752:101CC0003F1DAE925ACC5B35C9C1F5A9428BB89F76
12753:101CD000F7D1DE6951CBFA54B856F11A085E2C9C44
12754:101CE00066E8CF22221BCB8B296203DE532D12F232
12755:101CF0007D832E37ABB6291C1770A1200EF7929268
12756:101D0000BE8B3AFFED32DE2F2CB5C8F835D120EF6F
12757:101D1000B31337C9F72D3F126E33FCED72F28B68A7
12758:101D2000C94FFEAE87FADDE1A393647CEE88C7FE5F
12759:101D30008B4F98F8BD6F61FCF7D3DDECAF0BF81D4E
12760:101D400083E2BF47BD72C3F5F527F41DC33193B4D9
12761:101D50002F4447CE8BBA20975C9F71737BA2BE9CA9
12762:101D6000DB1933A59DBEFA2E91786407FEE17DEF65
12763:101D7000235F4C8C8F74C2DEE97A7FCDFBC430D9EF
12764:101D8000EAEF13C7502B82DE276E713978FF44C308
12765:101D9000C9A90ED0E3AF114ED0437FA7B86566C97D
12766:101DA0002EF0C915253CF82EEE51B6125D8B701041
12767:101DB00005756E9F4B45DDFAB062E777D1D7D8C97C
12768:101DC0006D0FE31D4F5DAA62571CA8876F2D8C23F2
12769:101DD000BC8B529219EFBA76592F650AC5A19EAEF7
12770:101DE000E983CBDD563862A07F8EA617BD345FCA6B
12771:101DF000C92D5EC8DBB7A8A33E87F91E6173366B99
12772:101E0000F91AF83EE786315C4FD5E5A6BF25BE0935
12773:101E100072F346A1F433A5A5EF98100774E5BA8FC5
12774:101E2000E2FC0BCB3E7B388ECF37741D8BEC28DF6A
12775:101E30004B86D6B174BBBC5BAB83C37E1AB53AABE1
12776:101E400051ABB31AB53AAB51ABB31AB53AAB51ABD0
12777:101E5000B31AB53AAB51ABB31AB53AAB91EB772B9A
12778:101E6000B87DBB7E35B7DDF51E1E0FB2FFEF5DC737
12779:101E7000FE87D6413FC2BCD03AA8B03AA2D98F92D1
12780:101E80007ECBFA7348DDB378F8920D44BFFC06B3FD
12781:101E9000135D7A1D14EF97EF8B607B70B170C8FAF9
12782:101EA000A74EB708AE97F60BDB14D03F2F639CD13B
12783:101EB00040E37FD5F8A0D71FA11F381FF4032DF4EE
12784:101EC000C39836A01FCF984985B3A5BFF7B0BFB759
12785:101ED000315FD7AF21FB41F052611F643F2E86D89E
12786:101EE0000F4A3CEE061ECB3AE5BB26FDFD661E35CD
12787:101EF0005F4E19C29EF8A43D1913E6DB87EF8CA94B
12788:101F00000DE3F7C1C7B4F758C736CA777165A28425
12789:101F1000BF3B845D89023F960EEF7BFF699ABF74D9
12790:101F20007304C72DEB472E9BF6BFB12B9F150AA656
12791:101F3000DB6FEAFD951F132E056152FE0ACC2203CA
12792:101F4000F735C210C67A50A86E51703FBAEA5E31BA
12793:101F5000197C2EB094EC009EF1DAFDB688D5EAAD7E
12794:101F6000C6EE8A3D049F8C4B74E25E6B74C2218185
12795:101F7000F74F8575C599B08BFE31EE09453978BFAD
12796:101F8000BC55C1FAF04C79FE3B8AC39B205781C3F4
12797:101F9000E373C0EF7916471BEA00CEA284A5C8F30D
12798:101FA000E7453B72500770768D9270BCA34D71224D
12799:101FB000944D585AC0EFCFAC5B3FB6E2DD9A22A2F7
12800:101FC000E95C9661EE1C7CA7A6F85399378B3EF628
12801:101FD000633717C9FC6BC46BC28F7BABBE59917C56
12802:101FE0007F26321D3918A7B8F2BB45241F7FFC9EFF
12803:101FF000EB16AC4FD4F08CC72DA20AAE76DBD09E88
12804:10200000D0EEF3BA0CEE52B445511E23F71BBCD9E7
12805:1020100068DF34F87E8C7E92E722EC57F4D8E489AE
12806:102020001904275A7C6C273B5CAE5BB1FFAB335D78
12807:10203000C5180FAD9F83B7C8F3099FDB302FF41D80
12808:1020400096CECFA54552EECB8AA4FD98BE56DEC7EC
12809:1020500086F2BDACC8A0D9B7BF8F37E15B8AEFE984
12810:10206000F88BAD8BB3810FE17B2FF0247C17625C82
12811:1020700044C470BDE3FA72E6E1EF951549F9227B9D
12812:1020800056F5B1B467DCA61BBDC3103F8EFA857749
12813:1020900018F01DD5D867C3BFC378D6D367837F7FB9
12814:1020A000F6C13E1BFA9F75C977D2A1FB3716C9F757
12815:1020B00013E9D3FB78FD58FA5637C7E97DC31047BB
12816:1020C000A5977FBC5EDEBB64B07F19ABF997B1BF4B
12817:1020D0004869EF21791BFB6434DF6F8B82581EAF98
12818:1020E000B44A3DADFC45D9A1366AC76F277C83E26F
12819:1020F000AF095EC27B505C64EC97EF2D09069DF63C
12820:102100009A1886CC22BEAA11F2BDE528CD6E206EAB
12821:102110002B25BB50537EF432BF03C07AEC8F3B5B60
12822:10212000C85FBB49C2E4AE918F2E9FBFA68BF3C39D
12823:10213000ED57FBB57CB3753DF2678ADF06F5579620
12824:102140001DE982BFA9DA3BB8BF66C5679CC752FCD0
12825:1021500036A8FFDE1F7FC0EF6CEADA07F7137F9F18
12826:10216000029F75FE1E33F92620DF3B5613E694FFCF
12827:102170007EC0B712FADE541DC1EF6777FD3A8FE5D6
12828:1021800046E737AD6FFA76F2B196E77BF24406F494
12829:10219000E19BDA5ED8A7B441F6C9C375BED9916C8C
12830:1021A00077EAB4FCAAB6CCCE7E3EB1D6CAF6AB5026
12831:1021B0000D7302AE354A3B238A55CD4EF958FF4F79
12832:1021C000DE3E8CEB797C00C03193F8DD71DC5A097E
12833:1021D000F78DB0B07D28349454EFA1F6A86105DBEB
12834:1021E0008104BCB824BE3F03FBA0427F655DB5CE31
12835:1021F000EC53E4FDBE2307F9AE7EDFD4B0D1DB7A29
12836:1022000010F9B2E27D7219EA8A7746F0FD4100F5D5
12837:10221000463A4FC33069471B16A4B31F088892D2B1
12838:10222000958843E68771FDB16198E351DC27365408
12839:102230004CE438FAD07F4BBFDB37D7EA441CD530AB
12840:10224000D9B106EF551A7EE1E0F15714B99FE75175
12841:10225000499F86B9F2FC0D15319CF7E87C686874DB
12842:102260008DC4FDD4CC31EEFF00DF4769F7730DC993
12843:10227000D44FED134AC9821F619F4912DF19331DE4
12844:10228000AC77C7164C7C74B783DD891FF74475B3F0
12845:102290002307E5C5FF033C759D8B10370000000048
12846:1022A0000000000000000000050207000000000020
12847:00000001FF
diff --git a/fs/9p/v9fs.h b/fs/9p/v9fs.h
index 79000bf62491..6b801d1ddf4b 100644
--- a/fs/9p/v9fs.h
+++ b/fs/9p/v9fs.h
@@ -24,7 +24,7 @@
24/** 24/**
25 * enum p9_session_flags - option flags for each 9P session 25 * enum p9_session_flags - option flags for each 9P session
26 * @V9FS_PROTO_2000U: whether or not to use 9P2000.u extensions 26 * @V9FS_PROTO_2000U: whether or not to use 9P2000.u extensions
27 * @V9FS_PROTO_2010L: whether or not to use 9P2010.l extensions 27 * @V9FS_PROTO_2000L: whether or not to use 9P2000.l extensions
28 * @V9FS_ACCESS_SINGLE: only the mounting user can access the hierarchy 28 * @V9FS_ACCESS_SINGLE: only the mounting user can access the hierarchy
29 * @V9FS_ACCESS_USER: a new attach will be issued for every user (default) 29 * @V9FS_ACCESS_USER: a new attach will be issued for every user (default)
30 * @V9FS_ACCESS_ANY: use a single attach for all users 30 * @V9FS_ACCESS_ANY: use a single attach for all users
@@ -34,7 +34,7 @@
34 */ 34 */
35enum p9_session_flags { 35enum p9_session_flags {
36 V9FS_PROTO_2000U = 0x01, 36 V9FS_PROTO_2000U = 0x01,
37 V9FS_PROTO_2010L = 0x02, 37 V9FS_PROTO_2000L = 0x02,
38 V9FS_ACCESS_SINGLE = 0x04, 38 V9FS_ACCESS_SINGLE = 0x04,
39 V9FS_ACCESS_USER = 0x08, 39 V9FS_ACCESS_USER = 0x08,
40 V9FS_ACCESS_ANY = 0x0C, 40 V9FS_ACCESS_ANY = 0x0C,
@@ -130,5 +130,5 @@ static inline int v9fs_proto_dotu(struct v9fs_session_info *v9ses)
130 130
131static inline int v9fs_proto_dotl(struct v9fs_session_info *v9ses) 131static inline int v9fs_proto_dotl(struct v9fs_session_info *v9ses)
132{ 132{
133 return v9ses->flags & V9FS_PROTO_2010L; 133 return v9ses->flags & V9FS_PROTO_2000L;
134} 134}
diff --git a/fs/9p/vfs_dir.c b/fs/9p/vfs_dir.c
index 6580aa449541..d8a3afe4ff72 100644
--- a/fs/9p/vfs_dir.c
+++ b/fs/9p/vfs_dir.c
@@ -76,6 +76,15 @@ static inline int dt_type(struct p9_wstat *mistat)
76 return rettype; 76 return rettype;
77} 77}
78 78
79static void p9stat_init(struct p9_wstat *stbuf)
80{
81 stbuf->name = NULL;
82 stbuf->uid = NULL;
83 stbuf->gid = NULL;
84 stbuf->muid = NULL;
85 stbuf->extension = NULL;
86}
87
79/** 88/**
80 * v9fs_dir_readdir - read a directory 89 * v9fs_dir_readdir - read a directory
81 * @filp: opened file structure 90 * @filp: opened file structure
@@ -131,8 +140,8 @@ static int v9fs_dir_readdir(struct file *filp, void *dirent, filldir_t filldir)
131 rdir->head = 0; 140 rdir->head = 0;
132 rdir->tail = err; 141 rdir->tail = err;
133 } 142 }
134
135 while (rdir->head < rdir->tail) { 143 while (rdir->head < rdir->tail) {
144 p9stat_init(&st);
136 err = p9stat_read(rdir->buf + rdir->head, 145 err = p9stat_read(rdir->buf + rdir->head,
137 buflen - rdir->head, &st, 146 buflen - rdir->head, &st,
138 fid->clnt->proto_version); 147 fid->clnt->proto_version);
diff --git a/fs/9p/vfs_file.c b/fs/9p/vfs_file.c
index 36122683fae8..df52d488d2a6 100644
--- a/fs/9p/vfs_file.c
+++ b/fs/9p/vfs_file.c
@@ -114,7 +114,7 @@ static int v9fs_file_lock(struct file *filp, int cmd, struct file_lock *fl)
114 P9_DPRINTK(P9_DEBUG_VFS, "filp: %p lock: %p\n", filp, fl); 114 P9_DPRINTK(P9_DEBUG_VFS, "filp: %p lock: %p\n", filp, fl);
115 115
116 /* No mandatory locks */ 116 /* No mandatory locks */
117 if (__mandatory_lock(inode)) 117 if (__mandatory_lock(inode) && fl->fl_type != F_UNLCK)
118 return -ENOLCK; 118 return -ENOLCK;
119 119
120 if ((IS_SETLK(cmd) || IS_SETLKW(cmd)) && fl->fl_type != F_UNLCK) { 120 if ((IS_SETLK(cmd) || IS_SETLKW(cmd)) && fl->fl_type != F_UNLCK) {
@@ -215,7 +215,7 @@ v9fs_file_write(struct file *filp, const char __user * data,
215 struct p9_fid *fid; 215 struct p9_fid *fid;
216 struct p9_client *clnt; 216 struct p9_client *clnt;
217 struct inode *inode = filp->f_path.dentry->d_inode; 217 struct inode *inode = filp->f_path.dentry->d_inode;
218 int origin = *offset; 218 loff_t origin = *offset;
219 unsigned long pg_start, pg_end; 219 unsigned long pg_start, pg_end;
220 220
221 P9_DPRINTK(P9_DEBUG_VFS, "data %p count %d offset %x\n", data, 221 P9_DPRINTK(P9_DEBUG_VFS, "data %p count %d offset %x\n", data,
diff --git a/fs/affs/bitmap.c b/fs/affs/bitmap.c
index dc5ef14bdc1c..8306d53307ed 100644
--- a/fs/affs/bitmap.c
+++ b/fs/affs/bitmap.c
@@ -128,7 +128,7 @@ err_range:
128/* 128/*
129 * Allocate a block in the given allocation zone. 129 * Allocate a block in the given allocation zone.
130 * Since we have to byte-swap the bitmap on little-endian 130 * Since we have to byte-swap the bitmap on little-endian
131 * machines, this is rather expensive. Therefor we will 131 * machines, this is rather expensive. Therefore we will
132 * preallocate up to 16 blocks from the same word, if 132 * preallocate up to 16 blocks from the same word, if
133 * possible. We are not doing preallocations in the 133 * possible. We are not doing preallocations in the
134 * header zone, though. 134 * header zone, though.
diff --git a/fs/anon_inodes.c b/fs/anon_inodes.c
index 9f0bf13291e5..2de009565d8e 100644
--- a/fs/anon_inodes.c
+++ b/fs/anon_inodes.c
@@ -209,6 +209,7 @@ static struct inode *anon_inode_mkinode(void)
209 inode->i_mode = S_IRUSR | S_IWUSR; 209 inode->i_mode = S_IRUSR | S_IWUSR;
210 inode->i_uid = current_fsuid(); 210 inode->i_uid = current_fsuid();
211 inode->i_gid = current_fsgid(); 211 inode->i_gid = current_fsgid();
212 inode->i_flags |= S_PRIVATE;
212 inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; 213 inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
213 return inode; 214 return inode;
214} 215}
diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c
index 6d6a16c5e9bb..2c32d00a6690 100644
--- a/fs/binfmt_elf_fdpic.c
+++ b/fs/binfmt_elf_fdpic.c
@@ -1374,7 +1374,7 @@ static inline void fill_note(struct memelfnote *note, const char *name, int type
1374 1374
1375/* 1375/*
1376 * fill up all the fields in prstatus from the given task struct, except 1376 * fill up all the fields in prstatus from the given task struct, except
1377 * registers which need to be filled up seperately. 1377 * registers which need to be filled up separately.
1378 */ 1378 */
1379static void fill_prstatus(struct elf_prstatus *prstatus, 1379static void fill_prstatus(struct elf_prstatus *prstatus,
1380 struct task_struct *p, long signr) 1380 struct task_struct *p, long signr)
diff --git a/fs/bio.c b/fs/bio.c
index d89e0199dc0d..e7bf6ca64dcf 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -264,13 +264,12 @@ EXPORT_SYMBOL(bio_init);
264 * bio_alloc_bioset - allocate a bio for I/O 264 * bio_alloc_bioset - allocate a bio for I/O
265 * @gfp_mask: the GFP_ mask given to the slab allocator 265 * @gfp_mask: the GFP_ mask given to the slab allocator
266 * @nr_iovecs: number of iovecs to pre-allocate 266 * @nr_iovecs: number of iovecs to pre-allocate
267 * @bs: the bio_set to allocate from. If %NULL, just use kmalloc 267 * @bs: the bio_set to allocate from.
268 * 268 *
269 * Description: 269 * Description:
270 * bio_alloc_bioset will first try its own mempool to satisfy the allocation. 270 * bio_alloc_bioset will try its own mempool to satisfy the allocation.
271 * If %__GFP_WAIT is set then we will block on the internal pool waiting 271 * If %__GFP_WAIT is set then we will block on the internal pool waiting
272 * for a &struct bio to become free. If a %NULL @bs is passed in, we will 272 * for a &struct bio to become free.
273 * fall back to just using @kmalloc to allocate the required memory.
274 * 273 *
275 * Note that the caller must set ->bi_destructor on successful return 274 * Note that the caller must set ->bi_destructor on successful return
276 * of a bio, to do the appropriate freeing of the bio once the reference 275 * of a bio, to do the appropriate freeing of the bio once the reference
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 2b59201b955c..0427183e3e05 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -901,7 +901,7 @@ static int __setup_root(u32 nodesize, u32 leafsize, u32 sectorsize,
901 root->highest_objectid = 0; 901 root->highest_objectid = 0;
902 root->name = NULL; 902 root->name = NULL;
903 root->in_sysfs = 0; 903 root->in_sysfs = 0;
904 root->inode_tree.rb_node = NULL; 904 root->inode_tree = RB_ROOT;
905 905
906 INIT_LIST_HEAD(&root->dirty_list); 906 INIT_LIST_HEAD(&root->dirty_list);
907 INIT_LIST_HEAD(&root->orphan_list); 907 INIT_LIST_HEAD(&root->orphan_list);
@@ -1673,7 +1673,7 @@ struct btrfs_root *open_ctree(struct super_block *sb,
1673 insert_inode_hash(fs_info->btree_inode); 1673 insert_inode_hash(fs_info->btree_inode);
1674 1674
1675 spin_lock_init(&fs_info->block_group_cache_lock); 1675 spin_lock_init(&fs_info->block_group_cache_lock);
1676 fs_info->block_group_cache_tree.rb_node = NULL; 1676 fs_info->block_group_cache_tree = RB_ROOT;
1677 1677
1678 extent_io_tree_init(&fs_info->freed_extents[0], 1678 extent_io_tree_init(&fs_info->freed_extents[0],
1679 fs_info->btree_inode->i_mapping, GFP_NOFS); 1679 fs_info->btree_inode->i_mapping, GFP_NOFS);
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index b177ed319612..7073cbb1b2d4 100644
--- a/fs/btrfs/extent_io.c
+++ b/fs/btrfs/extent_io.c
@@ -104,8 +104,8 @@ void extent_io_exit(void)
104void extent_io_tree_init(struct extent_io_tree *tree, 104void extent_io_tree_init(struct extent_io_tree *tree,
105 struct address_space *mapping, gfp_t mask) 105 struct address_space *mapping, gfp_t mask)
106{ 106{
107 tree->state.rb_node = NULL; 107 tree->state = RB_ROOT;
108 tree->buffer.rb_node = NULL; 108 tree->buffer = RB_ROOT;
109 tree->ops = NULL; 109 tree->ops = NULL;
110 tree->dirty_bytes = 0; 110 tree->dirty_bytes = 0;
111 spin_lock_init(&tree->lock); 111 spin_lock_init(&tree->lock);
diff --git a/fs/btrfs/extent_map.c b/fs/btrfs/extent_map.c
index 428fcac45f90..28d87ba60ce8 100644
--- a/fs/btrfs/extent_map.c
+++ b/fs/btrfs/extent_map.c
@@ -35,7 +35,7 @@ void extent_map_exit(void)
35 */ 35 */
36void extent_map_tree_init(struct extent_map_tree *tree, gfp_t mask) 36void extent_map_tree_init(struct extent_map_tree *tree, gfp_t mask)
37{ 37{
38 tree->map.rb_node = NULL; 38 tree->map = RB_ROOT;
39 rwlock_init(&tree->lock); 39 rwlock_init(&tree->lock);
40} 40}
41 41
diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c
index cb2849f03251..dd831ed31eea 100644
--- a/fs/btrfs/free-space-cache.c
+++ b/fs/btrfs/free-space-cache.c
@@ -870,7 +870,7 @@ __btrfs_return_cluster_to_free_space(
870 tree_insert_offset(&block_group->free_space_offset, 870 tree_insert_offset(&block_group->free_space_offset,
871 entry->offset, &entry->offset_index, 0); 871 entry->offset, &entry->offset_index, 0);
872 } 872 }
873 cluster->root.rb_node = NULL; 873 cluster->root = RB_ROOT;
874 874
875out: 875out:
876 spin_unlock(&cluster->lock); 876 spin_unlock(&cluster->lock);
@@ -1355,7 +1355,7 @@ void btrfs_init_free_cluster(struct btrfs_free_cluster *cluster)
1355{ 1355{
1356 spin_lock_init(&cluster->lock); 1356 spin_lock_init(&cluster->lock);
1357 spin_lock_init(&cluster->refill_lock); 1357 spin_lock_init(&cluster->refill_lock);
1358 cluster->root.rb_node = NULL; 1358 cluster->root = RB_ROOT;
1359 cluster->max_size = 0; 1359 cluster->max_size = 0;
1360 cluster->points_to_bitmap = false; 1360 cluster->points_to_bitmap = false;
1361 INIT_LIST_HEAD(&cluster->block_group_list); 1361 INIT_LIST_HEAD(&cluster->block_group_list);
diff --git a/fs/btrfs/ordered-data.h b/fs/btrfs/ordered-data.h
index 1fe1282ef47c..9116c6d0c5a9 100644
--- a/fs/btrfs/ordered-data.h
+++ b/fs/btrfs/ordered-data.h
@@ -129,7 +129,7 @@ static inline void
129btrfs_ordered_inode_tree_init(struct btrfs_ordered_inode_tree *t) 129btrfs_ordered_inode_tree_init(struct btrfs_ordered_inode_tree *t)
130{ 130{
131 mutex_init(&t->mutex); 131 mutex_init(&t->mutex);
132 t->tree.rb_node = NULL; 132 t->tree = RB_ROOT;
133 t->last = NULL; 133 t->last = NULL;
134} 134}
135 135
diff --git a/fs/btrfs/ref-cache.h b/fs/btrfs/ref-cache.h
index bc283ad2db73..e2a55cb2072b 100644
--- a/fs/btrfs/ref-cache.h
+++ b/fs/btrfs/ref-cache.h
@@ -52,7 +52,7 @@ static inline size_t btrfs_leaf_ref_size(int nr_extents)
52 52
53static inline void btrfs_leaf_ref_tree_init(struct btrfs_leaf_ref_tree *tree) 53static inline void btrfs_leaf_ref_tree_init(struct btrfs_leaf_ref_tree *tree)
54{ 54{
55 tree->root.rb_node = NULL; 55 tree->root = RB_ROOT;
56 INIT_LIST_HEAD(&tree->list); 56 INIT_LIST_HEAD(&tree->list);
57 spin_lock_init(&tree->lock); 57 spin_lock_init(&tree->lock);
58} 58}
diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c
index ab7ab5318745..0109e5606bad 100644
--- a/fs/btrfs/relocation.c
+++ b/fs/btrfs/relocation.c
@@ -170,14 +170,14 @@ struct async_merge {
170 170
171static void mapping_tree_init(struct mapping_tree *tree) 171static void mapping_tree_init(struct mapping_tree *tree)
172{ 172{
173 tree->rb_root.rb_node = NULL; 173 tree->rb_root = RB_ROOT;
174 spin_lock_init(&tree->lock); 174 spin_lock_init(&tree->lock);
175} 175}
176 176
177static void backref_cache_init(struct backref_cache *cache) 177static void backref_cache_init(struct backref_cache *cache)
178{ 178{
179 int i; 179 int i;
180 cache->rb_root.rb_node = NULL; 180 cache->rb_root = RB_ROOT;
181 for (i = 0; i < BTRFS_MAX_LEVEL; i++) 181 for (i = 0; i < BTRFS_MAX_LEVEL; i++)
182 INIT_LIST_HEAD(&cache->pending[i]); 182 INIT_LIST_HEAD(&cache->pending[i]);
183 spin_lock_init(&cache->lock); 183 spin_lock_init(&cache->lock);
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 8a1ea6e64575..f8b4521de907 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -128,7 +128,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
128{ 128{
129 struct btrfs_fs_info *info = root->fs_info; 129 struct btrfs_fs_info *info = root->fs_info;
130 substring_t args[MAX_OPT_ARGS]; 130 substring_t args[MAX_OPT_ARGS];
131 char *p, *num; 131 char *p, *num, *orig;
132 int intarg; 132 int intarg;
133 int ret = 0; 133 int ret = 0;
134 134
@@ -143,6 +143,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
143 if (!options) 143 if (!options)
144 return -ENOMEM; 144 return -ENOMEM;
145 145
146 orig = options;
146 147
147 while ((p = strsep(&options, ",")) != NULL) { 148 while ((p = strsep(&options, ",")) != NULL) {
148 int token; 149 int token;
@@ -280,7 +281,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
280 } 281 }
281 } 282 }
282out: 283out:
283 kfree(options); 284 kfree(orig);
284 return ret; 285 return ret;
285} 286}
286 287
diff --git a/fs/btrfs/sysfs.c b/fs/btrfs/sysfs.c
index a240b6fa81df..4ce16ef702a3 100644
--- a/fs/btrfs/sysfs.c
+++ b/fs/btrfs/sysfs.c
@@ -164,12 +164,12 @@ static void btrfs_root_release(struct kobject *kobj)
164 complete(&root->kobj_unregister); 164 complete(&root->kobj_unregister);
165} 165}
166 166
167static struct sysfs_ops btrfs_super_attr_ops = { 167static const struct sysfs_ops btrfs_super_attr_ops = {
168 .show = btrfs_super_attr_show, 168 .show = btrfs_super_attr_show,
169 .store = btrfs_super_attr_store, 169 .store = btrfs_super_attr_store,
170}; 170};
171 171
172static struct sysfs_ops btrfs_root_attr_ops = { 172static const struct sysfs_ops btrfs_root_attr_ops = {
173 .show = btrfs_root_attr_show, 173 .show = btrfs_root_attr_show,
174 .store = btrfs_root_attr_store, 174 .store = btrfs_root_attr_store,
175}; 175};
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c
index b2acc79f1b34..2a36e236a492 100644
--- a/fs/btrfs/transaction.c
+++ b/fs/btrfs/transaction.c
@@ -69,7 +69,7 @@ static noinline int join_transaction(struct btrfs_root *root)
69 cur_trans->commit_done = 0; 69 cur_trans->commit_done = 0;
70 cur_trans->start_time = get_seconds(); 70 cur_trans->start_time = get_seconds();
71 71
72 cur_trans->delayed_refs.root.rb_node = NULL; 72 cur_trans->delayed_refs.root = RB_ROOT;
73 cur_trans->delayed_refs.num_entries = 0; 73 cur_trans->delayed_refs.num_entries = 0;
74 cur_trans->delayed_refs.num_heads_ready = 0; 74 cur_trans->delayed_refs.num_heads_ready = 0;
75 cur_trans->delayed_refs.num_heads = 0; 75 cur_trans->delayed_refs.num_heads = 0;
diff --git a/fs/buffer.c b/fs/buffer.c
index 6fa530256bfd..c9c266db0624 100644
--- a/fs/buffer.c
+++ b/fs/buffer.c
@@ -2893,7 +2893,7 @@ int block_write_full_page_endio(struct page *page, get_block_t *get_block,
2893 2893
2894 /* 2894 /*
2895 * The page straddles i_size. It must be zeroed out on each and every 2895 * The page straddles i_size. It must be zeroed out on each and every
2896 * writepage invokation because it may be mmapped. "A file is mapped 2896 * writepage invocation because it may be mmapped. "A file is mapped
2897 * in multiples of the page size. For a file that is not a multiple of 2897 * in multiples of the page size. For a file that is not a multiple of
2898 * the page size, the remaining memory is zeroed when mapped, and 2898 * the page size, the remaining memory is zeroed when mapped, and
2899 * writes to that region are not written out to the file." 2899 * writes to that region are not written out to the file."
@@ -3265,7 +3265,7 @@ static void recalc_bh_state(void)
3265 3265
3266struct buffer_head *alloc_buffer_head(gfp_t gfp_flags) 3266struct buffer_head *alloc_buffer_head(gfp_t gfp_flags)
3267{ 3267{
3268 struct buffer_head *ret = kmem_cache_alloc(bh_cachep, gfp_flags); 3268 struct buffer_head *ret = kmem_cache_zalloc(bh_cachep, gfp_flags);
3269 if (ret) { 3269 if (ret) {
3270 INIT_LIST_HEAD(&ret->b_assoc_buffers); 3270 INIT_LIST_HEAD(&ret->b_assoc_buffers);
3271 get_cpu_var(bh_accounting).nr++; 3271 get_cpu_var(bh_accounting).nr++;
@@ -3352,15 +3352,6 @@ int bh_submit_read(struct buffer_head *bh)
3352} 3352}
3353EXPORT_SYMBOL(bh_submit_read); 3353EXPORT_SYMBOL(bh_submit_read);
3354 3354
3355static void
3356init_buffer_head(void *data)
3357{
3358 struct buffer_head *bh = data;
3359
3360 memset(bh, 0, sizeof(*bh));
3361 INIT_LIST_HEAD(&bh->b_assoc_buffers);
3362}
3363
3364void __init buffer_init(void) 3355void __init buffer_init(void)
3365{ 3356{
3366 int nrpages; 3357 int nrpages;
@@ -3369,7 +3360,7 @@ void __init buffer_init(void)
3369 sizeof(struct buffer_head), 0, 3360 sizeof(struct buffer_head), 0,
3370 (SLAB_RECLAIM_ACCOUNT|SLAB_PANIC| 3361 (SLAB_RECLAIM_ACCOUNT|SLAB_PANIC|
3371 SLAB_MEM_SPREAD), 3362 SLAB_MEM_SPREAD),
3372 init_buffer_head); 3363 NULL);
3373 3364
3374 /* 3365 /*
3375 * Limit the bh occupancy to 10% of ZONE_NORMAL 3366 * Limit the bh occupancy to 10% of ZONE_NORMAL
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index 20692fbfdb24..a20bea598933 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -136,7 +136,7 @@ asn1_enum_decode(struct asn1_ctx *ctx, __le32 *val)
136 return 0; 136 return 0;
137 } 137 }
138 138
139 ch = *(ctx->pointer)++; /* ch has 0xa, ptr points to lenght octet */ 139 ch = *(ctx->pointer)++; /* ch has 0xa, ptr points to length octet */
140 if ((ch) == ASN1_ENUM) /* if ch value is ENUM, 0xa */ 140 if ((ch) == ASN1_ENUM) /* if ch value is ENUM, 0xa */
141 *val = *(++(ctx->pointer)); /* value has enum value */ 141 *val = *(++(ctx->pointer)); /* value has enum value */
142 else 142 else
diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c
index b44ce0a0711c..b1d61d0bdfc7 100644
--- a/fs/cifs/cifs_dfs_ref.c
+++ b/fs/cifs/cifs_dfs_ref.c
@@ -54,7 +54,7 @@ void cifs_dfs_release_automount_timer(void)
54 * Extracts sharename form full UNC. 54 * Extracts sharename form full UNC.
55 * i.e. strips from UNC trailing path that is not part of share 55 * i.e. strips from UNC trailing path that is not part of share
56 * name and fixup missing '\' in the begining of DFS node refferal 56 * name and fixup missing '\' in the begining of DFS node refferal
57 * if neccessary. 57 * if necessary.
58 * Returns pointer to share name on success or ERR_PTR on error. 58 * Returns pointer to share name on success or ERR_PTR on error.
59 * Caller is responsible for freeing returned string. 59 * Caller is responsible for freeing returned string.
60 */ 60 */
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 9d17df3e0768..611835899844 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -3886,7 +3886,7 @@ parse_DFS_referrals(TRANSACTION2_GET_DFS_REFER_RSP *pSMBr,
3886 goto parse_DFS_referrals_exit; 3886 goto parse_DFS_referrals_exit;
3887 } 3887 }
3888 3888
3889 /* collect neccessary data from referrals */ 3889 /* collect necessary data from referrals */
3890 for (i = 0; i < *num_of_nodes; i++) { 3890 for (i = 0; i < *num_of_nodes; i++) {
3891 char *temp; 3891 char *temp;
3892 int max_len; 3892 int max_len;
diff --git a/fs/compat.c b/fs/compat.c
index 00d90c2e66f0..030602d453b7 100644
--- a/fs/compat.c
+++ b/fs/compat.c
@@ -1795,6 +1795,24 @@ asmlinkage long compat_sys_select(int n, compat_ulong_t __user *inp,
1795 return ret; 1795 return ret;
1796} 1796}
1797 1797
1798struct compat_sel_arg_struct {
1799 compat_ulong_t n;
1800 compat_uptr_t inp;
1801 compat_uptr_t outp;
1802 compat_uptr_t exp;
1803 compat_uptr_t tvp;
1804};
1805
1806asmlinkage long compat_sys_old_select(struct compat_sel_arg_struct __user *arg)
1807{
1808 struct compat_sel_arg_struct a;
1809
1810 if (copy_from_user(&a, arg, sizeof(a)))
1811 return -EFAULT;
1812 return compat_sys_select(a.n, compat_ptr(a.inp), compat_ptr(a.outp),
1813 compat_ptr(a.exp), compat_ptr(a.tvp));
1814}
1815
1798#ifdef HAVE_SET_RESTORE_SIGMASK 1816#ifdef HAVE_SET_RESTORE_SIGMASK
1799static long do_compat_pselect(int n, compat_ulong_t __user *inp, 1817static long do_compat_pselect(int n, compat_ulong_t __user *inp,
1800 compat_ulong_t __user *outp, compat_ulong_t __user *exp, 1818 compat_ulong_t __user *outp, compat_ulong_t __user *exp,
diff --git a/fs/dlm/lockspace.c b/fs/dlm/lockspace.c
index 26a8bd40400a..f994a7dfda85 100644
--- a/fs/dlm/lockspace.c
+++ b/fs/dlm/lockspace.c
@@ -148,7 +148,7 @@ static void lockspace_kobj_release(struct kobject *k)
148 kfree(ls); 148 kfree(ls);
149} 149}
150 150
151static struct sysfs_ops dlm_attr_ops = { 151static const struct sysfs_ops dlm_attr_ops = {
152 .show = dlm_attr_show, 152 .show = dlm_attr_show,
153 .store = dlm_attr_store, 153 .store = dlm_attr_store,
154}; 154};
diff --git a/fs/dlm/member.c b/fs/dlm/member.c
index 84f70bfb0baf..b12532e553f8 100644
--- a/fs/dlm/member.c
+++ b/fs/dlm/member.c
@@ -312,7 +312,7 @@ int dlm_ls_stop(struct dlm_ls *ls)
312 /* 312 /*
313 * This in_recovery lock does two things: 313 * This in_recovery lock does two things:
314 * 1) Keeps this function from returning until all threads are out 314 * 1) Keeps this function from returning until all threads are out
315 * of locking routines and locking is truely stopped. 315 * of locking routines and locking is truly stopped.
316 * 2) Keeps any new requests from being processed until it's unlocked 316 * 2) Keeps any new requests from being processed until it's unlocked
317 * when recovery is complete. 317 * when recovery is complete.
318 */ 318 */
diff --git a/fs/ext3/super.c b/fs/ext3/super.c
index e844accbf55d..1bee604cc6cd 100644
--- a/fs/ext3/super.c
+++ b/fs/ext3/super.c
@@ -164,7 +164,7 @@ void ext3_msg(struct super_block *sb, const char *prefix,
164 * write out the superblock safely. 164 * write out the superblock safely.
165 * 165 *
166 * We'll just use the journal_abort() error code to record an error in 166 * We'll just use the journal_abort() error code to record an error in
167 * the journal instead. On recovery, the journal will compain about 167 * the journal instead. On recovery, the journal will complain about
168 * that error until we've noted it down and cleared it. 168 * that error until we've noted it down and cleared it.
169 */ 169 */
170 170
diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c
index 506713a2ebd8..54df209d2eed 100644
--- a/fs/ext4/mballoc.c
+++ b/fs/ext4/mballoc.c
@@ -69,7 +69,7 @@
69 * 69 *
70 * pa_lstart -> the logical start block for this prealloc space 70 * pa_lstart -> the logical start block for this prealloc space
71 * pa_pstart -> the physical start block for this prealloc space 71 * pa_pstart -> the physical start block for this prealloc space
72 * pa_len -> lenght for this prealloc space 72 * pa_len -> length for this prealloc space
73 * pa_free -> free space available in this prealloc space 73 * pa_free -> free space available in this prealloc space
74 * 74 *
75 * The inode preallocation space is used looking at the _logical_ start 75 * The inode preallocation space is used looking at the _logical_ start
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 2b83b96cb2eb..ba191dae8730 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -302,7 +302,7 @@ void ext4_journal_abort_handle(const char *caller, const char *err_fn,
302 * write out the superblock safely. 302 * write out the superblock safely.
303 * 303 *
304 * We'll just use the jbd2_journal_abort() error code to record an error in 304 * We'll just use the jbd2_journal_abort() error code to record an error in
305 * the journal instead. On recovery, the journal will compain about 305 * the journal instead. On recovery, the journal will complain about
306 * that error until we've noted it down and cleared it. 306 * that error until we've noted it down and cleared it.
307 */ 307 */
308 308
@@ -2358,7 +2358,7 @@ static void ext4_sb_release(struct kobject *kobj)
2358} 2358}
2359 2359
2360 2360
2361static struct sysfs_ops ext4_attr_ops = { 2361static const struct sysfs_ops ext4_attr_ops = {
2362 .show = ext4_attr_show, 2362 .show = ext4_attr_show,
2363 .store = ext4_attr_store, 2363 .store = ext4_attr_store,
2364}; 2364};
diff --git a/fs/fat/inode.c b/fs/fat/inode.c
index fbeecdc194dc..0ce143bd7d56 100644
--- a/fs/fat/inode.c
+++ b/fs/fat/inode.c
@@ -558,7 +558,7 @@ static int fat_statfs(struct dentry *dentry, struct kstatfs *buf)
558 buf->f_bavail = sbi->free_clusters; 558 buf->f_bavail = sbi->free_clusters;
559 buf->f_fsid.val[0] = (u32)id; 559 buf->f_fsid.val[0] = (u32)id;
560 buf->f_fsid.val[1] = (u32)(id >> 32); 560 buf->f_fsid.val[1] = (u32)(id >> 32);
561 buf->f_namelen = sbi->options.isvfat ? 260 : 12; 561 buf->f_namelen = sbi->options.isvfat ? FAT_LFN_LEN : 12;
562 562
563 return 0; 563 return 0;
564} 564}
diff --git a/fs/fat/namei_vfat.c b/fs/fat/namei_vfat.c
index f565f24019b5..c1ef50154868 100644
--- a/fs/fat/namei_vfat.c
+++ b/fs/fat/namei_vfat.c
@@ -502,14 +502,14 @@ xlate_to_uni(const unsigned char *name, int len, unsigned char *outname,
502 *outlen = utf8s_to_utf16s(name, len, (wchar_t *)outname); 502 *outlen = utf8s_to_utf16s(name, len, (wchar_t *)outname);
503 if (*outlen < 0) 503 if (*outlen < 0)
504 return *outlen; 504 return *outlen;
505 else if (*outlen > 255) 505 else if (*outlen > FAT_LFN_LEN)
506 return -ENAMETOOLONG; 506 return -ENAMETOOLONG;
507 507
508 op = &outname[*outlen * sizeof(wchar_t)]; 508 op = &outname[*outlen * sizeof(wchar_t)];
509 } else { 509 } else {
510 if (nls) { 510 if (nls) {
511 for (i = 0, ip = name, op = outname, *outlen = 0; 511 for (i = 0, ip = name, op = outname, *outlen = 0;
512 i < len && *outlen <= 255; 512 i < len && *outlen <= FAT_LFN_LEN;
513 *outlen += 1) 513 *outlen += 1)
514 { 514 {
515 if (escape && (*ip == ':')) { 515 if (escape && (*ip == ':')) {
@@ -549,7 +549,7 @@ xlate_to_uni(const unsigned char *name, int len, unsigned char *outname,
549 return -ENAMETOOLONG; 549 return -ENAMETOOLONG;
550 } else { 550 } else {
551 for (i = 0, ip = name, op = outname, *outlen = 0; 551 for (i = 0, ip = name, op = outname, *outlen = 0;
552 i < len && *outlen <= 255; 552 i < len && *outlen <= FAT_LFN_LEN;
553 i++, *outlen += 1) 553 i++, *outlen += 1)
554 { 554 {
555 *op++ = *ip++; 555 *op++ = *ip++;
@@ -701,6 +701,15 @@ static int vfat_find(struct inode *dir, struct qstr *qname,
701 return fat_search_long(dir, qname->name, len, sinfo); 701 return fat_search_long(dir, qname->name, len, sinfo);
702} 702}
703 703
704/*
705 * (nfsd's) anonymous disconnected dentry?
706 * NOTE: !IS_ROOT() is not anonymous (I.e. d_splice_alias() did the job).
707 */
708static int vfat_d_anon_disconn(struct dentry *dentry)
709{
710 return IS_ROOT(dentry) && (dentry->d_flags & DCACHE_DISCONNECTED);
711}
712
704static struct dentry *vfat_lookup(struct inode *dir, struct dentry *dentry, 713static struct dentry *vfat_lookup(struct inode *dir, struct dentry *dentry,
705 struct nameidata *nd) 714 struct nameidata *nd)
706{ 715{
@@ -729,11 +738,11 @@ static struct dentry *vfat_lookup(struct inode *dir, struct dentry *dentry,
729 } 738 }
730 739
731 alias = d_find_alias(inode); 740 alias = d_find_alias(inode);
732 if (alias && !(alias->d_flags & DCACHE_DISCONNECTED)) { 741 if (alias && !vfat_d_anon_disconn(alias)) {
733 /* 742 /*
734 * This inode has non DCACHE_DISCONNECTED dentry. This 743 * This inode has non anonymous-DCACHE_DISCONNECTED
735 * means, the user did ->lookup() by an another name 744 * dentry. This means, the user did ->lookup() by an
736 * (longname vs 8.3 alias of it) in past. 745 * another name (longname vs 8.3 alias of it) in past.
737 * 746 *
738 * Switch to new one for reason of locality if possible. 747 * Switch to new one for reason of locality if possible.
739 */ 748 */
@@ -743,7 +752,9 @@ static struct dentry *vfat_lookup(struct inode *dir, struct dentry *dentry,
743 iput(inode); 752 iput(inode);
744 unlock_super(sb); 753 unlock_super(sb);
745 return alias; 754 return alias;
746 } 755 } else
756 dput(alias);
757
747out: 758out:
748 unlock_super(sb); 759 unlock_super(sb);
749 dentry->d_op = sb->s_root->d_op; 760 dentry->d_op = sb->s_root->d_op;
diff --git a/fs/fscache/Kconfig b/fs/fscache/Kconfig
index 864dac20a242..cc94bb9563f2 100644
--- a/fs/fscache/Kconfig
+++ b/fs/fscache/Kconfig
@@ -1,7 +1,6 @@
1 1
2config FSCACHE 2config FSCACHE
3 tristate "General filesystem local caching manager" 3 tristate "General filesystem local caching manager"
4 depends on EXPERIMENTAL
5 select SLOW_WORK 4 select SLOW_WORK
6 help 5 help
7 This option enables a generic filesystem caching manager that can be 6 This option enables a generic filesystem caching manager that can be
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 1a822ce2b24b..ec14d19ce501 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -850,7 +850,7 @@ static void fuse_send_init(struct fuse_conn *fc, struct fuse_req *req)
850 req->in.args[0].size = sizeof(*arg); 850 req->in.args[0].size = sizeof(*arg);
851 req->in.args[0].value = arg; 851 req->in.args[0].value = arg;
852 req->out.numargs = 1; 852 req->out.numargs = 1;
853 /* Variable length arguement used for backward compatibility 853 /* Variable length argument used for backward compatibility
854 with interface version < 7.5. Rest of init_out is zeroed 854 with interface version < 7.5. Rest of init_out is zeroed
855 by do_get_request(), so a short reply is not a problem */ 855 by do_get_request(), so a short reply is not a problem */
856 req->out.argvar = 1; 856 req->out.argvar = 1;
diff --git a/fs/gfs2/Kconfig b/fs/gfs2/Kconfig
index 4dcddf83326f..a47b43107112 100644
--- a/fs/gfs2/Kconfig
+++ b/fs/gfs2/Kconfig
@@ -8,7 +8,6 @@ config GFS2_FS
8 select FS_POSIX_ACL 8 select FS_POSIX_ACL
9 select CRC32 9 select CRC32
10 select SLOW_WORK 10 select SLOW_WORK
11 select QUOTA
12 select QUOTACTL 11 select QUOTACTL
13 help 12 help
14 A cluster filesystem. 13 A cluster filesystem.
diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c
index a6abbae8a278..e6dd2aec6f82 100644
--- a/fs/gfs2/file.c
+++ b/fs/gfs2/file.c
@@ -640,7 +640,7 @@ static int gfs2_lock(struct file *file, int cmd, struct file_lock *fl)
640 640
641 if (!(fl->fl_flags & FL_POSIX)) 641 if (!(fl->fl_flags & FL_POSIX))
642 return -ENOLCK; 642 return -ENOLCK;
643 if (__mandatory_lock(&ip->i_inode)) 643 if (__mandatory_lock(&ip->i_inode) && fl->fl_type != F_UNLCK)
644 return -ENOLCK; 644 return -ENOLCK;
645 645
646 if (cmd == F_CANCELLK) { 646 if (cmd == F_CANCELLK) {
diff --git a/fs/gfs2/incore.h b/fs/gfs2/incore.h
index b8025e51cabf..3aac46f6853e 100644
--- a/fs/gfs2/incore.h
+++ b/fs/gfs2/incore.h
@@ -616,7 +616,7 @@ struct gfs2_sbd {
616 unsigned int sd_log_blks_reserved; 616 unsigned int sd_log_blks_reserved;
617 unsigned int sd_log_commited_buf; 617 unsigned int sd_log_commited_buf;
618 unsigned int sd_log_commited_databuf; 618 unsigned int sd_log_commited_databuf;
619 unsigned int sd_log_commited_revoke; 619 int sd_log_commited_revoke;
620 620
621 unsigned int sd_log_num_buf; 621 unsigned int sd_log_num_buf;
622 unsigned int sd_log_num_revoke; 622 unsigned int sd_log_num_revoke;
diff --git a/fs/gfs2/log.c b/fs/gfs2/log.c
index 4511b08fc451..e5bf4b59d46e 100644
--- a/fs/gfs2/log.c
+++ b/fs/gfs2/log.c
@@ -417,7 +417,7 @@ static unsigned int calc_reserved(struct gfs2_sbd *sdp)
417 databufhdrs_needed = (sdp->sd_log_commited_databuf + 417 databufhdrs_needed = (sdp->sd_log_commited_databuf +
418 (dbuf_limit - 1)) / dbuf_limit; 418 (dbuf_limit - 1)) / dbuf_limit;
419 419
420 if (sdp->sd_log_commited_revoke) 420 if (sdp->sd_log_commited_revoke > 0)
421 revokes = gfs2_struct2blk(sdp, sdp->sd_log_commited_revoke, 421 revokes = gfs2_struct2blk(sdp, sdp->sd_log_commited_revoke,
422 sizeof(u64)); 422 sizeof(u64));
423 423
@@ -790,7 +790,6 @@ static void log_refund(struct gfs2_sbd *sdp, struct gfs2_trans *tr)
790 gfs2_assert_withdraw(sdp, (((int)sdp->sd_log_commited_buf) >= 0) || 790 gfs2_assert_withdraw(sdp, (((int)sdp->sd_log_commited_buf) >= 0) ||
791 (((int)sdp->sd_log_commited_databuf) >= 0)); 791 (((int)sdp->sd_log_commited_databuf) >= 0));
792 sdp->sd_log_commited_revoke += tr->tr_num_revoke - tr->tr_num_revoke_rm; 792 sdp->sd_log_commited_revoke += tr->tr_num_revoke - tr->tr_num_revoke_rm;
793 gfs2_assert_withdraw(sdp, ((int)sdp->sd_log_commited_revoke) >= 0);
794 reserved = calc_reserved(sdp); 793 reserved = calc_reserved(sdp);
795 gfs2_assert_withdraw(sdp, sdp->sd_log_blks_reserved + tr->tr_reserved >= reserved); 794 gfs2_assert_withdraw(sdp, sdp->sd_log_blks_reserved + tr->tr_reserved >= reserved);
796 unused = sdp->sd_log_blks_reserved - reserved + tr->tr_reserved; 795 unused = sdp->sd_log_blks_reserved - reserved + tr->tr_reserved;
diff --git a/fs/gfs2/ops_fstype.c b/fs/gfs2/ops_fstype.c
index a054b526dc08..c1309ed1c496 100644
--- a/fs/gfs2/ops_fstype.c
+++ b/fs/gfs2/ops_fstype.c
@@ -1001,7 +1001,7 @@ static const struct lm_lockops nolock_ops = {
1001/** 1001/**
1002 * gfs2_lm_mount - mount a locking protocol 1002 * gfs2_lm_mount - mount a locking protocol
1003 * @sdp: the filesystem 1003 * @sdp: the filesystem
1004 * @args: mount arguements 1004 * @args: mount arguments
1005 * @silent: if 1, don't complain if the FS isn't a GFS2 fs 1005 * @silent: if 1, don't complain if the FS isn't a GFS2 fs
1006 * 1006 *
1007 * Returns: errno 1007 * Returns: errno
diff --git a/fs/gfs2/sys.c b/fs/gfs2/sys.c
index b5f1a46133c8..419042f7f0b6 100644
--- a/fs/gfs2/sys.c
+++ b/fs/gfs2/sys.c
@@ -49,7 +49,7 @@ static ssize_t gfs2_attr_store(struct kobject *kobj, struct attribute *attr,
49 return a->store ? a->store(sdp, buf, len) : len; 49 return a->store ? a->store(sdp, buf, len) : len;
50} 50}
51 51
52static struct sysfs_ops gfs2_attr_ops = { 52static const struct sysfs_ops gfs2_attr_ops = {
53 .show = gfs2_attr_show, 53 .show = gfs2_attr_show,
54 .store = gfs2_attr_store, 54 .store = gfs2_attr_store,
55}; 55};
@@ -574,7 +574,7 @@ static int gfs2_uevent(struct kset *kset, struct kobject *kobj,
574 return 0; 574 return 0;
575} 575}
576 576
577static struct kset_uevent_ops gfs2_uevent_ops = { 577static const struct kset_uevent_ops gfs2_uevent_ops = {
578 .uevent = gfs2_uevent, 578 .uevent = gfs2_uevent,
579}; 579};
580 580
diff --git a/fs/jbd/transaction.c b/fs/jbd/transaction.c
index 99e9fea11077..5ae71e75a491 100644
--- a/fs/jbd/transaction.c
+++ b/fs/jbd/transaction.c
@@ -1398,7 +1398,7 @@ int journal_stop(handle_t *handle)
1398 * the case where our storage is so fast that it is more optimal to go 1398 * the case where our storage is so fast that it is more optimal to go
1399 * ahead and force a flush and wait for the transaction to be committed 1399 * ahead and force a flush and wait for the transaction to be committed
1400 * than it is to wait for an arbitrary amount of time for new writers to 1400 * than it is to wait for an arbitrary amount of time for new writers to
1401 * join the transaction. We acheive this by measuring how long it takes 1401 * join the transaction. We achieve this by measuring how long it takes
1402 * to commit a transaction, and compare it with how long this 1402 * to commit a transaction, and compare it with how long this
1403 * transaction has been running, and if run time < commit time then we 1403 * transaction has been running, and if run time < commit time then we
1404 * sleep for the delta and commit. This greatly helps super fast disks 1404 * sleep for the delta and commit. This greatly helps super fast disks
diff --git a/fs/locks.c b/fs/locks.c
index ae9ded026b7c..ab24d49fc048 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1455,7 +1455,7 @@ EXPORT_SYMBOL(generic_setlease);
1455 * leases held by processes on this node. 1455 * leases held by processes on this node.
1456 * 1456 *
1457 * There is also no break_lease method; filesystems that 1457 * There is also no break_lease method; filesystems that
1458 * handle their own leases shoud break leases themselves from the 1458 * handle their own leases should break leases themselves from the
1459 * filesystem's open, create, and (on truncate) setattr methods. 1459 * filesystem's open, create, and (on truncate) setattr methods.
1460 * 1460 *
1461 * Warning: the only current setlease methods exist only to disable 1461 * Warning: the only current setlease methods exist only to disable
diff --git a/fs/mpage.c b/fs/mpage.c
index 42381bd6543b..598d54e200eb 100644
--- a/fs/mpage.c
+++ b/fs/mpage.c
@@ -561,7 +561,7 @@ page_is_mapped:
561 if (page->index >= end_index) { 561 if (page->index >= end_index) {
562 /* 562 /*
563 * The page straddles i_size. It must be zeroed out on each 563 * The page straddles i_size. It must be zeroed out on each
564 * and every writepage invokation because it may be mmapped. 564 * and every writepage invocation because it may be mmapped.
565 * "A file is mapped in multiples of the page size. For a file 565 * "A file is mapped in multiples of the page size. For a file
566 * that is not a multiple of the page size, the remaining memory 566 * that is not a multiple of the page size, the remaining memory
567 * is zeroed when mapped, and writes to that region are not 567 * is zeroed when mapped, and writes to that region are not
diff --git a/fs/namei.c b/fs/namei.c
index 48e60a187325..1c0fca6e899e 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -2544,7 +2544,7 @@ SYSCALL_DEFINE2(link, const char __user *, oldname, const char __user *, newname
2544 * e) conversion from fhandle to dentry may come in the wrong moment - when 2544 * e) conversion from fhandle to dentry may come in the wrong moment - when
2545 * we are removing the target. Solution: we will have to grab ->i_mutex 2545 * we are removing the target. Solution: we will have to grab ->i_mutex
2546 * in the fhandle_to_dentry code. [FIXME - current nfsfh.c relies on 2546 * in the fhandle_to_dentry code. [FIXME - current nfsfh.c relies on
2547 * ->i_mutex on parents, which works but leads to some truely excessive 2547 * ->i_mutex on parents, which works but leads to some truly excessive
2548 * locking]. 2548 * locking].
2549 */ 2549 */
2550static int vfs_rename_dir(struct inode *old_dir, struct dentry *old_dentry, 2550static int vfs_rename_dir(struct inode *old_dir, struct dentry *old_dentry,
diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c
index 78c7e24e5129..c47b4d7bafa7 100644
--- a/fs/nfsd/nfs4xdr.c
+++ b/fs/nfsd/nfs4xdr.c
@@ -1528,7 +1528,7 @@ static void write_cinfo(__be32 **p, struct nfsd4_change_info *c)
1528 } } while (0); 1528 } } while (0);
1529 1529
1530/* Encode as an array of strings the string given with components 1530/* Encode as an array of strings the string given with components
1531 * seperated @sep. 1531 * separated @sep.
1532 */ 1532 */
1533static __be32 nfsd4_encode_components(char sep, char *components, 1533static __be32 nfsd4_encode_components(char sep, char *components,
1534 __be32 **pp, int *buflen) 1534 __be32 **pp, int *buflen)
diff --git a/fs/nilfs2/alloc.h b/fs/nilfs2/alloc.h
index f4543ac4f560..5cccf874d692 100644
--- a/fs/nilfs2/alloc.h
+++ b/fs/nilfs2/alloc.h
@@ -42,7 +42,7 @@ void *nilfs_palloc_block_get_entry(const struct inode *, __u64,
42 const struct buffer_head *, void *); 42 const struct buffer_head *, void *);
43 43
44/** 44/**
45 * nilfs_palloc_req - persistent alloctor request and reply 45 * nilfs_palloc_req - persistent allocator request and reply
46 * @pr_entry_nr: entry number (vblocknr or inode number) 46 * @pr_entry_nr: entry number (vblocknr or inode number)
47 * @pr_desc_bh: buffer head of the buffer containing block group descriptors 47 * @pr_desc_bh: buffer head of the buffer containing block group descriptors
48 * @pr_bitmap_bh: buffer head of the buffer containing a block group bitmap 48 * @pr_bitmap_bh: buffer head of the buffer containing a block group bitmap
diff --git a/fs/nilfs2/dat.c b/fs/nilfs2/dat.c
index 9d1e5de91afb..013146755683 100644
--- a/fs/nilfs2/dat.c
+++ b/fs/nilfs2/dat.c
@@ -288,7 +288,7 @@ int nilfs_dat_mark_dirty(struct inode *dat, __u64 vblocknr)
288 * @vblocknrs and @nitems. 288 * @vblocknrs and @nitems.
289 * 289 *
290 * Return Value: On success, 0 is returned. On error, one of the following 290 * Return Value: On success, 0 is returned. On error, one of the following
291 * nagative error codes is returned. 291 * negative error codes is returned.
292 * 292 *
293 * %-EIO - I/O error. 293 * %-EIO - I/O error.
294 * 294 *
diff --git a/fs/nilfs2/dir.c b/fs/nilfs2/dir.c
index 0092840492ee..85c89dfc71f0 100644
--- a/fs/nilfs2/dir.c
+++ b/fs/nilfs2/dir.c
@@ -396,7 +396,7 @@ nilfs_find_entry(struct inode *dir, const struct qstr *qstr,
396 /* next page is past the blocks we've got */ 396 /* next page is past the blocks we've got */
397 if (unlikely(n > (dir->i_blocks >> (PAGE_CACHE_SHIFT - 9)))) { 397 if (unlikely(n > (dir->i_blocks >> (PAGE_CACHE_SHIFT - 9)))) {
398 nilfs_error(dir->i_sb, __func__, 398 nilfs_error(dir->i_sb, __func__,
399 "dir %lu size %lld exceeds block cout %llu", 399 "dir %lu size %lld exceeds block count %llu",
400 dir->i_ino, dir->i_size, 400 dir->i_ino, dir->i_size,
401 (unsigned long long)dir->i_blocks); 401 (unsigned long long)dir->i_blocks);
402 goto out; 402 goto out;
diff --git a/fs/nilfs2/gcinode.c b/fs/nilfs2/gcinode.c
index e16a6664dfa2..8880a9e281e7 100644
--- a/fs/nilfs2/gcinode.c
+++ b/fs/nilfs2/gcinode.c
@@ -28,10 +28,10 @@
28 * gcinodes), and this file provides lookup function of the dummy 28 * gcinodes), and this file provides lookup function of the dummy
29 * inodes and their buffer read function. 29 * inodes and their buffer read function.
30 * 30 *
31 * Since NILFS2 keeps up multiple checkpoints/snapshots accross GC, it 31 * Since NILFS2 keeps up multiple checkpoints/snapshots across GC, it
32 * has to treat blocks that belong to a same file but have different 32 * has to treat blocks that belong to a same file but have different
33 * checkpoint numbers. To avoid interference among generations, dummy 33 * checkpoint numbers. To avoid interference among generations, dummy
34 * inodes are managed separatly from actual inodes, and their lookup 34 * inodes are managed separately from actual inodes, and their lookup
35 * function (nilfs_gc_iget) is designed to be specified with a 35 * function (nilfs_gc_iget) is designed to be specified with a
36 * checkpoint number argument as well as an inode number. 36 * checkpoint number argument as well as an inode number.
37 * 37 *
diff --git a/fs/nilfs2/page.c b/fs/nilfs2/page.c
index a2692bbc7b50..fc246dba112a 100644
--- a/fs/nilfs2/page.c
+++ b/fs/nilfs2/page.c
@@ -292,7 +292,7 @@ void nilfs_free_private_page(struct page *page)
292 * @src: source page 292 * @src: source page
293 * @copy_dirty: flag whether to copy dirty states on the page's buffer heads. 293 * @copy_dirty: flag whether to copy dirty states on the page's buffer heads.
294 * 294 *
295 * This fuction is for both data pages and btnode pages. The dirty flag 295 * This function is for both data pages and btnode pages. The dirty flag
296 * should be treated by caller. The page must not be under i/o. 296 * should be treated by caller. The page must not be under i/o.
297 * Both src and dst page must be locked 297 * Both src and dst page must be locked
298 */ 298 */
@@ -388,7 +388,7 @@ repeat:
388} 388}
389 389
390/** 390/**
391 * nilfs_copy_back_pages -- copy back pages to orignal cache from shadow cache 391 * nilfs_copy_back_pages -- copy back pages to original cache from shadow cache
392 * @dmap: destination page cache 392 * @dmap: destination page cache
393 * @smap: source page cache 393 * @smap: source page cache
394 * 394 *
diff --git a/fs/nilfs2/segbuf.c b/fs/nilfs2/segbuf.c
index ab56fe44e377..636eaafd6ea2 100644
--- a/fs/nilfs2/segbuf.c
+++ b/fs/nilfs2/segbuf.c
@@ -32,7 +32,7 @@
32struct nilfs_write_info { 32struct nilfs_write_info {
33 struct the_nilfs *nilfs; 33 struct the_nilfs *nilfs;
34 struct bio *bio; 34 struct bio *bio;
35 int start, end; /* The region to be submitted */ 35 int start, end; /* The region to be submitted */
36 int rest_blocks; 36 int rest_blocks;
37 int max_pages; 37 int max_pages;
38 int nr_vecs; 38 int nr_vecs;
@@ -174,7 +174,7 @@ int nilfs_segbuf_reset(struct nilfs_segment_buffer *segbuf, unsigned flags,
174} 174}
175 175
176/* 176/*
177 * Setup segument summary 177 * Setup segment summary
178 */ 178 */
179void nilfs_segbuf_fill_in_segsum(struct nilfs_segment_buffer *segbuf) 179void nilfs_segbuf_fill_in_segsum(struct nilfs_segment_buffer *segbuf)
180{ 180{
@@ -470,8 +470,8 @@ static int nilfs_segbuf_submit_bh(struct nilfs_segment_buffer *segbuf,
470 * 470 *
471 * %-ENOMEM - Insufficient memory available. 471 * %-ENOMEM - Insufficient memory available.
472 */ 472 */
473int nilfs_segbuf_write(struct nilfs_segment_buffer *segbuf, 473static int nilfs_segbuf_write(struct nilfs_segment_buffer *segbuf,
474 struct the_nilfs *nilfs) 474 struct the_nilfs *nilfs)
475{ 475{
476 struct nilfs_write_info wi; 476 struct nilfs_write_info wi;
477 struct buffer_head *bh; 477 struct buffer_head *bh;
@@ -514,7 +514,7 @@ int nilfs_segbuf_write(struct nilfs_segment_buffer *segbuf,
514 * 514 *
515 * %-EIO - I/O error 515 * %-EIO - I/O error
516 */ 516 */
517int nilfs_segbuf_wait(struct nilfs_segment_buffer *segbuf) 517static int nilfs_segbuf_wait(struct nilfs_segment_buffer *segbuf)
518{ 518{
519 int err = 0; 519 int err = 0;
520 520
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c
index ada2f1b947a3..69576a95e13f 100644
--- a/fs/nilfs2/segment.c
+++ b/fs/nilfs2/segment.c
@@ -141,7 +141,7 @@ int nilfs_init_transaction_cache(void)
141} 141}
142 142
143/** 143/**
144 * nilfs_detroy_transaction_cache - destroy the cache for transaction info 144 * nilfs_destroy_transaction_cache - destroy the cache for transaction info
145 * 145 *
146 * nilfs_destroy_transaction_cache() frees the slab cache for the struct 146 * nilfs_destroy_transaction_cache() frees the slab cache for the struct
147 * nilfs_transaction_info. 147 * nilfs_transaction_info.
@@ -201,7 +201,7 @@ static int nilfs_prepare_segment_lock(struct nilfs_transaction_info *ti)
201 * This function allocates a nilfs_transaction_info struct to keep context 201 * This function allocates a nilfs_transaction_info struct to keep context
202 * information on it. It is initialized and hooked onto the current task in 202 * information on it. It is initialized and hooked onto the current task in
203 * the outermost call. If a pre-allocated struct is given to @ti, it is used 203 * the outermost call. If a pre-allocated struct is given to @ti, it is used
204 * instead; othewise a new struct is assigned from a slab. 204 * instead; otherwise a new struct is assigned from a slab.
205 * 205 *
206 * When @vacancy_check flag is set, this function will check the amount of 206 * When @vacancy_check flag is set, this function will check the amount of
207 * free space, and will wait for the GC to reclaim disk space if low capacity. 207 * free space, and will wait for the GC to reclaim disk space if low capacity.
@@ -2214,7 +2214,7 @@ static int nilfs_segctor_do_construct(struct nilfs_sc_info *sci, int mode)
2214} 2214}
2215 2215
2216/** 2216/**
2217 * nilfs_secgtor_start_timer - set timer of background write 2217 * nilfs_segctor_start_timer - set timer of background write
2218 * @sci: nilfs_sc_info 2218 * @sci: nilfs_sc_info
2219 * 2219 *
2220 * If the timer has already been set, it ignores the new request. 2220 * If the timer has already been set, it ignores the new request.
@@ -2854,7 +2854,7 @@ static void nilfs_segctor_destroy(struct nilfs_sc_info *sci)
2854 * @sbi: nilfs_sb_info 2854 * @sbi: nilfs_sb_info
2855 * 2855 *
2856 * nilfs_attach_segment_constructor() allocates a struct nilfs_sc_info, 2856 * nilfs_attach_segment_constructor() allocates a struct nilfs_sc_info,
2857 * initilizes it, and starts the segment constructor. 2857 * initializes it, and starts the segment constructor.
2858 * 2858 *
2859 * Return Value: On success, 0 is returned. On error, one of the following 2859 * Return Value: On success, 0 is returned. On error, one of the following
2860 * negative error code is returned. 2860 * negative error code is returned.
diff --git a/fs/nilfs2/segment.h b/fs/nilfs2/segment.h
index 3155e0c7f415..82dfd6a686b9 100644
--- a/fs/nilfs2/segment.h
+++ b/fs/nilfs2/segment.h
@@ -30,7 +30,7 @@
30#include "sb.h" 30#include "sb.h"
31 31
32/** 32/**
33 * struct nilfs_recovery_info - Recovery infomation 33 * struct nilfs_recovery_info - Recovery information
34 * @ri_need_recovery: Recovery status 34 * @ri_need_recovery: Recovery status
35 * @ri_super_root: Block number of the last super root 35 * @ri_super_root: Block number of the last super root
36 * @ri_ri_cno: Number of the last checkpoint 36 * @ri_ri_cno: Number of the last checkpoint
@@ -71,7 +71,7 @@ struct nilfs_recovery_info {
71 */ 71 */
72struct nilfs_cstage { 72struct nilfs_cstage {
73 int scnt; 73 int scnt;
74 unsigned flags; 74 unsigned flags;
75 struct nilfs_inode_info *dirty_file_ptr; 75 struct nilfs_inode_info *dirty_file_ptr;
76 struct nilfs_inode_info *gc_inode_ptr; 76 struct nilfs_inode_info *gc_inode_ptr;
77}; 77};
diff --git a/fs/nilfs2/sufile.c b/fs/nilfs2/sufile.c
index b6c36d0cc331..3c6cc6005c2e 100644
--- a/fs/nilfs2/sufile.c
+++ b/fs/nilfs2/sufile.c
@@ -18,7 +18,7 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 * 19 *
20 * Written by Koji Sato <koji@osrg.net>. 20 * Written by Koji Sato <koji@osrg.net>.
21 * Rivised by Ryusuke Konishi <ryusuke@osrg.net>. 21 * Revised by Ryusuke Konishi <ryusuke@osrg.net>.
22 */ 22 */
23 23
24#include <linux/kernel.h> 24#include <linux/kernel.h>
diff --git a/fs/nilfs2/super.c b/fs/nilfs2/super.c
index 92579cc4c935..0cdbc5e7655a 100644
--- a/fs/nilfs2/super.c
+++ b/fs/nilfs2/super.c
@@ -436,7 +436,7 @@ static int nilfs_statfs(struct dentry *dentry, struct kstatfs *buf)
436 /* 436 /*
437 * Compute the overhead 437 * Compute the overhead
438 * 438 *
439 * When distributing meta data blocks outside semgent structure, 439 * When distributing meta data blocks outside segment structure,
440 * We must count them as the overhead. 440 * We must count them as the overhead.
441 */ 441 */
442 overhead = 0; 442 overhead = 0;
@@ -866,7 +866,7 @@ static int nilfs_remount(struct super_block *sb, int *flags, char *data)
866 if ((*flags & MS_RDONLY) && 866 if ((*flags & MS_RDONLY) &&
867 sbi->s_snapshot_cno != old_opts.snapshot_cno) { 867 sbi->s_snapshot_cno != old_opts.snapshot_cno) {
868 printk(KERN_WARNING "NILFS (device %s): couldn't " 868 printk(KERN_WARNING "NILFS (device %s): couldn't "
869 "remount to a different snapshot. \n", 869 "remount to a different snapshot.\n",
870 sb->s_id); 870 sb->s_id);
871 err = -EINVAL; 871 err = -EINVAL;
872 goto restore_opts; 872 goto restore_opts;
diff --git a/fs/nilfs2/the_nilfs.c b/fs/nilfs2/the_nilfs.c
index 92733d5651d2..33871f7e4f01 100644
--- a/fs/nilfs2/the_nilfs.c
+++ b/fs/nilfs2/the_nilfs.c
@@ -386,7 +386,7 @@ static int nilfs_store_disk_layout(struct the_nilfs *nilfs,
386 386
387 nilfs->ns_blocks_per_segment = le32_to_cpu(sbp->s_blocks_per_segment); 387 nilfs->ns_blocks_per_segment = le32_to_cpu(sbp->s_blocks_per_segment);
388 if (nilfs->ns_blocks_per_segment < NILFS_SEG_MIN_BLOCKS) { 388 if (nilfs->ns_blocks_per_segment < NILFS_SEG_MIN_BLOCKS) {
389 printk(KERN_ERR "NILFS: too short segment. \n"); 389 printk(KERN_ERR "NILFS: too short segment.\n");
390 return -EINVAL; 390 return -EINVAL;
391 } 391 }
392 392
diff --git a/fs/ntfs/ChangeLog b/fs/ntfs/ChangeLog
deleted file mode 100644
index 37c11e194372..000000000000
--- a/fs/ntfs/ChangeLog
+++ /dev/null
@@ -1,1702 +0,0 @@
1ToDo/Notes:
2 - Find and fix bugs.
3 - The only places in the kernel where a file is resized are
4 ntfs_file_write*() and ntfs_truncate() for both of which i_mutex is
5 held. Just have to be careful in read-/writepage and other helpers
6 not running under i_mutex that we play nice. Also need to be careful
7 with initialized_size extension in ntfs_file_write*() and writepage.
8 UPDATE: The only things that need to be checked are the compressed
9 write and the other attribute resize/write cases like index
10 attributes, etc. For now none of these are implemented so are safe.
11 - Implement filling in of holes in aops.c::ntfs_writepage() and its
12 helpers.
13 - Implement mft.c::sync_mft_mirror_umount(). We currently will just
14 leave the volume dirty on umount if the final iput(vol->mft_ino)
15 causes a write of any mirrored mft records due to the mft mirror
16 inode having been discarded already. Whether this can actually ever
17 happen is unclear however so it is worth waiting until someone hits
18 the problem.
19
202.1.29 - Fix a deadlock at mount time.
21
22 - During mount the VFS holds s_umount lock on the superblock. So when
23 we try to empty the journal $LogFile contents by calling
24 ntfs_attr_set() when the machine does not have much memory and the
25 journal is large ntfs_attr_set() results in the VM trying to balance
26 dirty pages which in turn tries to that the s_umount lock and thus we
27 get a deadlock. The solution is to not use ntfs_attr_set() and
28 instead do the zeroing by hand at the block level rather than page
29 cache level.
30 - Fix sparse warnings.
31
322.1.28 - Fix a deadlock.
33
34 - Fix deadlock in fs/ntfs/inode.c::ntfs_put_inode(). Thanks to Sergey
35 Vlasov for the report and detailed analysis of the deadlock. The fix
36 involved getting rid of ntfs_put_inode() altogether and hence NTFS no
37 longer has a ->put_inode super operation.
38
392.1.27 - Various bug fixes and cleanups.
40
41 - Fix two compiler warnings on Alpha. Thanks to Andrew Morton for
42 reporting them.
43 - Fix an (innocent) off-by-one error in the runlist code.
44 - Fix a buggette in an "should be impossible" case handling where we
45 continued the attribute lookup loop instead of aborting it.
46 - Use buffer_migrate_page() for the ->migratepage function of all ntfs
47 address space operations.
48 - Fix comparison of $MFT and $MFTMirr to not bail out when there are
49 unused, invalid mft records which are the same in both $MFT and
50 $MFTMirr.
51 - Add support for sparse files which have a compression unit of 0.
52 - Remove all the make_bad_inode() calls. This should only be called
53 from read inode and new inode code paths.
54 - Limit name length in fs/ntfs/unistr.c::ntfs_nlstoucs() to maximum
55 allowed by NTFS, i.e. 255 Unicode characters, not including the
56 terminating NULL (which is not stored on disk).
57 - Improve comments on file attribute flags in fs/ntfs/layout.h.
58 - Fix a bug in fs/ntfs/inode.c::ntfs_read_locked_index_inode() where we
59 forgot to update a temporary variable so loading index inodes which
60 have an index allocation attribute failed.
61 - Add a missing call to flush_dcache_mft_record_page() in
62 fs/ntfs/inode.c::ntfs_write_inode().
63 - Handle the recently introduced -ENAMETOOLONG return value from
64 fs/ntfs/unistr.c::ntfs_nlstoucs() in fs/ntfs/namei.c::ntfs_lookup().
65 - Semaphore to mutex conversion. (Ingo Molnar)
66
672.1.26 - Minor bug fixes and updates.
68
69 - Fix a potential overflow in file.c where a cast to s64 was missing in
70 a left shift of a page index.
71 - The struct inode has had its i_sem semaphore changed to a mutex named
72 i_mutex.
73 - We have struct kmem_cache now so use it instead of the typedef
74 kmem_cache_t. (Pekka Enberg)
75 - Implement support for sector sizes above 512 bytes (up to the maximum
76 supported by NTFS which is 4096 bytes).
77 - Do more detailed reporting of why we cannot mount read-write by
78 special casing the VOLUME_MODIFIED_BY_CHKDSK flag.
79 - Miscellaneous updates to layout.h.
80 - Cope with attribute list attribute having invalid flags. Windows
81 copes with this and even chkdsk does not detect or fix this so we
82 have to cope with it, too. Thanks to Pawel Kot for reporting the
83 problem.
84
852.1.25 - (Almost) fully implement write(2) and truncate(2).
86
87 - Change ntfs_map_runlist_nolock(), ntfs_attr_find_vcn_nolock() and
88 {__,}ntfs_cluster_free() to also take an optional attribute search
89 context as argument. This allows calling these functions with the
90 mft record mapped. Update all callers.
91 - Fix potential deadlock in ntfs_mft_data_extend_allocation_nolock()
92 error handling by passing in the active search context when calling
93 ntfs_cluster_free().
94 - Change ntfs_cluster_alloc() to take an extra boolean parameter
95 specifying whether the cluster are being allocated to extend an
96 attribute or to fill a hole.
97 - Change ntfs_attr_make_non_resident() to call ntfs_cluster_alloc()
98 with @is_extension set to TRUE and remove the runlist terminator
99 fixup code as this is now done by ntfs_cluster_alloc().
100 - Change ntfs_attr_make_non_resident to take the attribute value size
101 as an extra parameter. This is needed since we need to know the size
102 before we can map the mft record and our callers always know it. The
103 reason we cannot simply read the size from the vfs inode i_size is
104 that this is not necessarily uptodate. This happens when
105 ntfs_attr_make_non_resident() is called in the ->truncate call path.
106 - Fix ntfs_attr_make_non_resident() to update the vfs inode i_blocks
107 which is zero for a resident attribute but should no longer be zero
108 once the attribute is non-resident as it then has real clusters
109 allocated.
110 - Add fs/ntfs/attrib.[hc]::ntfs_attr_extend_allocation(), a function to
111 extend the allocation of an attributes. Optionally, the data size,
112 but not the initialized size can be extended, too.
113 - Implement fs/ntfs/inode.[hc]::ntfs_truncate(). It only supports
114 uncompressed and unencrypted files and it never creates sparse files
115 at least for the moment (making a file sparse requires us to modify
116 its directory entries and we do not support directory operations at
117 the moment). Also, support for highly fragmented files, i.e. ones
118 whose data attribute is split across multiple extents, is severly
119 limited. When such a case is encountered, EOPNOTSUPP is returned.
120 - Enable ATTR_SIZE attribute changes in ntfs_setattr(). This completes
121 the initial implementation of file truncation. Now both open(2)ing
122 a file with the O_TRUNC flag and the {,f}truncate(2) system calls
123 will resize a file appropriately. The limitations are that only
124 uncompressed and unencrypted files are supported. Also, there is
125 only very limited support for highly fragmented files (the ones whose
126 $DATA attribute is split into multiple attribute extents).
127 - In attrib.c::ntfs_attr_set() call balance_dirty_pages_ratelimited()
128 and cond_resched() in the main loop as we could be dirtying a lot of
129 pages and this ensures we play nice with the VM and the system as a
130 whole.
131 - Implement file operations ->write, ->aio_write, ->writev for regular
132 files. This replaces the old use of generic_file_write(), et al and
133 the address space operations ->prepare_write and ->commit_write.
134 This means that both sparse and non-sparse (unencrypted and
135 uncompressed) files can now be extended using the normal write(2)
136 code path. There are two limitations at present and these are that
137 we never create sparse files and that we only have limited support
138 for highly fragmented files, i.e. ones whose data attribute is split
139 across multiple extents. When such a case is encountered,
140 EOPNOTSUPP is returned.
141 - $EA attributes can be both resident and non-resident.
142 - Use %z for size_t to fix compilation warnings. (Andrew Morton)
143 - Fix compilation warnings with gcc-4.0.2 on SUSE 10.0.
144 - Document extended attribute ($EA) NEED_EA flag. (Based on libntfs
145 patch by Yura Pakhuchiy.)
146
1472.1.24 - Lots of bug fixes and support more clean journal states.
148
149 - Support journals ($LogFile) which have been modified by chkdsk. This
150 means users can boot into Windows after we marked the volume dirty.
151 The Windows boot will run chkdsk and then reboot. The user can then
152 immediately boot into Linux rather than having to do a full Windows
153 boot first before rebooting into Linux and we will recognize such a
154 journal and empty it as it is clean by definition. Note, this only
155 works if chkdsk left the journal in an obviously clean state.
156 - Support journals ($LogFile) with only one restart page as well as
157 journals with two different restart pages. We sanity check both and
158 either use the only sane one or the more recent one of the two in the
159 case that both are valid.
160 - Add fs/ntfs/malloc.h::ntfs_malloc_nofs_nofail() which is analogous to
161 ntfs_malloc_nofs() but it performs allocations with __GFP_NOFAIL and
162 hence cannot fail.
163 - Use ntfs_malloc_nofs_nofail() in the two critical regions in
164 fs/ntfs/runlist.c::ntfs_runlists_merge(). This means we no longer
165 need to panic() if the allocation fails as it now cannot fail.
166 - Fix two nasty runlist merging bugs that had gone unnoticed so far.
167 Thanks to Stefano Picerno for the bug report.
168 - Remove two bogus BUG_ON()s from fs/ntfs/mft.c.
169 - Fix handling of valid but empty mapping pairs array in
170 fs/ntfs/runlist.c::ntfs_mapping_pairs_decompress().
171 - Report unrepresentable inodes during ntfs_readdir() as KERN_WARNING
172 messages and include the inode number. Thanks to Yura Pakhuchiy for
173 pointing this out.
174 - Change ntfs_rl_truncate_nolock() to throw away the runlist if the new
175 length is zero.
176 - Add runlist.[hc]::ntfs_rl_punch_nolock() which punches a caller
177 specified hole into a runlist.
178 - Fix a bug in fs/ntfs/index.c::ntfs_index_lookup(). When the returned
179 index entry is in the index root, we forgot to set the @ir pointer in
180 the index context. Thanks to Yura Pakhuchiy for finding this bug.
181 - Remove bogus setting of PageError in ntfs_read_compressed_block().
182 - Add fs/ntfs/attrib.[hc]::ntfs_resident_attr_value_resize().
183 - Fix a bug in ntfs_map_runlist_nolock() where we forgot to protect
184 access to the allocated size in the ntfs inode with the size lock.
185 - Fix ntfs_attr_vcn_to_lcn_nolock() and ntfs_attr_find_vcn_nolock() to
186 return LCN_ENOENT when there is no runlist and the allocated size is
187 zero.
188 - Fix load_attribute_list() to handle the case of a NULL runlist.
189 - Fix handling of sparse attributes in ntfs_attr_make_non_resident().
190 - Add BUG() checks to ntfs_attr_make_non_resident() and ntfs_attr_set()
191 to ensure that these functions are never called for compressed or
192 encrypted attributes.
193 - Fix cluster (de)allocators to work when the runlist is NULL and more
194 importantly to take a locked runlist rather than them locking it
195 which leads to lock reversal.
196 - Truncate {a,c,m}time to the ntfs supported time granularity when
197 updating the times in the inode in ntfs_setattr().
198 - Fixup handling of sparse, compressed, and encrypted attributes in
199 fs/ntfs/inode.c::ntfs_read_locked_{,attr_,index_}inode(),
200 fs/ntfs/aops.c::ntfs_{read,write}page().
201 - Make ntfs_write_block() not instantiate sparse blocks if they contain
202 only zeroes.
203 - Optimize fs/ntfs/aops.c::ntfs_write_block() by extending the page
204 lock protection over the buffer submission for i/o which allows the
205 removal of the get_bh()/put_bh() pairs for each buffer.
206 - Fix fs/ntfs/aops.c::ntfs_{read,write}_block() to handle the case
207 where a concurrent truncate has truncated the runlist under our feet.
208 - Fix page_has_buffers()/page_buffers() handling in fs/ntfs/aops.c.
209 - In fs/ntfs/aops.c::ntfs_end_buffer_async_read(), use a bit spin lock
210 in the first buffer head instead of a driver global spin lock to
211 improve scalability.
212 - Minor fix to error handling and error message display in
213 fs/ntfs/aops.c::ntfs_prepare_nonresident_write().
214 - Change the mount options {u,f,d}mask to always parse the number as
215 an octal number to conform to how chmod(1) works, too. Thanks to
216 Giuseppe Bilotta and Horst von Brand for pointing out the errors of
217 my ways.
218 - Fix various bugs in the runlist merging code. (Based on libntfs
219 changes by Richard Russon.)
220 - Fix sparse warnings that have crept in over time.
221 - Change ntfs_cluster_free() to require a write locked runlist on entry
222 since we otherwise get into a lock reversal deadlock if a read locked
223 runlist is passed in. In the process also change it to take an ntfs
224 inode instead of a vfs inode as parameter.
225 - Fix the definition of the CHKD ntfs record magic. It had an off by
226 two error causing it to be CHKB instead of CHKD.
227 - Fix a stupid bug in __ntfs_bitmap_set_bits_in_run() which caused the
228 count to become negative and hence we had a wild memset() scribbling
229 all over the system's ram.
230
2312.1.23 - Implement extension of resident files and make writing safe as well as
232 many bug fixes, cleanups, and enhancements...
233
234 - Add printk rate limiting for ntfs_warning() and ntfs_error() when
235 compiled without debug. This avoids a possible denial of service
236 attack. Thanks to Carl-Daniel Hailfinger from SuSE for pointing this
237 out.
238 - Fix compilation warnings on ia64. (Randy Dunlap)
239 - Use i_size_{read,write}() instead of reading i_size by hand and cache
240 the value where apropriate.
241 - Add size_lock to the ntfs_inode structure. This is an rw spinlock
242 and it locks against access to the inode sizes. Note, ->size_lock
243 is also accessed from irq context so you must use the _irqsave and
244 _irqrestore lock and unlock functions, respectively. Protect all
245 accesses to allocated_size, initialized_size, and compressed_size.
246 - Minor optimization to fs/ntfs/super.c::ntfs_statfs() and its helpers.
247 - Implement extension of resident files in the regular file write code
248 paths (fs/ntfs/aops.c::ntfs_{prepare,commit}_write()). At present
249 this only works until the data attribute becomes too big for the mft
250 record after which we abort the write returning -EOPNOTSUPP from
251 ntfs_prepare_write().
252 - Add disable_sparse mount option together with a per volume sparse
253 enable bit which is set appropriately and a per inode sparse disable
254 bit which is preset on some system file inodes as appropriate.
255 - Enforce that sparse support is disabled on NTFS volumes pre 3.0.
256 - Fix a bug in fs/ntfs/runlist.c::ntfs_mapping_pairs_decompress() in
257 the creation of the unmapped runlist element for the base attribute
258 extent.
259 - Split ntfs_map_runlist() into ntfs_map_runlist() and a non-locking
260 helper ntfs_map_runlist_nolock() which is used by ntfs_map_runlist().
261 This allows us to map runlist fragments with the runlist lock already
262 held without having to drop and reacquire it around the call. Adapt
263 all callers.
264 - Change ntfs_find_vcn() to ntfs_find_vcn_nolock() which takes a locked
265 runlist. This allows us to find runlist elements with the runlist
266 lock already held without having to drop and reacquire it around the
267 call. Adapt all callers.
268 - Change time to u64 in time.h::ntfs2utc() as it otherwise generates a
269 warning in the do_div() call on sparc32. Thanks to Meelis Roos for
270 the report and analysis of the warning.
271 - Fix a nasty runlist merge bug when merging two holes.
272 - Set the ntfs_inode->allocated_size to the real allocated size in the
273 mft record for resident attributes (fs/ntfs/inode.c).
274 - Small readability cleanup to use "a" instead of "ctx->attr"
275 everywhere (fs/ntfs/inode.c).
276 - Make fs/ntfs/namei.c::ntfs_get_{parent,dentry} static and move the
277 definition of ntfs_export_ops from fs/ntfs/super.c to namei.c. Also,
278 declare ntfs_export_ops in fs/ntfs/ntfs.h.
279 - Correct sparse file handling. The compressed values need to be
280 checked and set in the ntfs inode as done for compressed files and
281 the compressed size needs to be used for vfs inode->i_blocks instead
282 of the allocated size, again, as done for compressed files.
283 - Add AT_EA in addition to AT_DATA to whitelist for being allowed to be
284 non-resident in fs/ntfs/attrib.c::ntfs_attr_can_be_non_resident().
285 - Add fs/ntfs/attrib.c::ntfs_attr_vcn_to_lcn_nolock() used by the new
286 write code.
287 - Fix bug in fs/ntfs/attrib.c::ntfs_find_vcn_nolock() where after
288 dropping the read lock and taking the write lock we were not checking
289 whether someone else did not already do the work we wanted to do.
290 - Rename fs/ntfs/attrib.c::ntfs_find_vcn_nolock() to
291 ntfs_attr_find_vcn_nolock() and update all callers.
292 - Add fs/ntfs/attrib.[hc]::ntfs_attr_make_non_resident().
293 - Fix sign of various error return values to be negative in
294 fs/ntfs/lcnalloc.c.
295 - Modify ->readpage and ->writepage (fs/ntfs/aops.c) so they detect and
296 handle the case where an attribute is converted from resident to
297 non-resident by a concurrent file write.
298 - Remove checks for NULL before calling kfree() since kfree() does the
299 checking itself. (Jesper Juhl)
300 - Some utilities modify the boot sector but do not update the checksum.
301 Thus, relax the checking in fs/ntfs/super.c::is_boot_sector_ntfs() to
302 only emit a warning when the checksum is incorrect rather than
303 refusing the mount. Thanks to Bernd Casimir for pointing this
304 problem out.
305 - Update attribute definition handling.
306 - Add NTFS_MAX_CLUSTER_SIZE and NTFS_MAX_PAGES_PER_CLUSTER constants.
307 - Use NTFS_MAX_CLUSTER_SIZE in super.c instead of hard coding 0x10000.
308 - Use MAX_BUF_PER_PAGE instead of variable sized array allocation for
309 better code generation and one less sparse warning in fs/ntfs/aops.c.
310 - Remove spurious void pointer casts from fs/ntfs/. (Pekka Enberg)
311 - Use C99 style structure initialization after memory allocation where
312 possible (fs/ntfs/{attrib.c,index.c,super.c}). Thanks to Al Viro and
313 Pekka Enberg.
314 - Stamp the transaction log ($UsnJrnl), aka user space journal, if it
315 is active on the volume and we are mounting read-write or remounting
316 from read-only to read-write.
317 - Fix a bug in address space operations error recovery code paths where
318 if the runlist was not mapped at all and a mapping error occured we
319 would leave the runlist locked on exit to the function so that the
320 next access to the same file would try to take the lock and deadlock.
321 - Detect the case when Windows has been suspended to disk on the volume
322 to be mounted and if this is the case do not allow (re)mounting
323 read-write. This is done by parsing hiberfil.sys if present.
324 - Fix several occurences of a bug where we would perform 'var & ~const'
325 with a 64-bit variable and a int, i.e. 32-bit, constant. This causes
326 the higher order 32-bits of the 64-bit variable to be zeroed. To fix
327 this cast the 'const' to the same 64-bit type as 'var'.
328 - Change the runlist terminator of the newly allocated cluster(s) to
329 LCN_ENOENT in ntfs_attr_make_non_resident(). Otherwise the runlist
330 code gets confused.
331 - Add an extra parameter @last_vcn to ntfs_get_size_for_mapping_pairs()
332 and ntfs_mapping_pairs_build() to allow the runlist encoding to be
333 partial which is desirable when filling holes in sparse attributes.
334 Update all callers.
335 - Change ntfs_map_runlist_nolock() to only decompress the mapping pairs
336 if the requested vcn is inside it. Otherwise we get into problems
337 when we try to map an out of bounds vcn because we then try to map
338 the already mapped runlist fragment which causes
339 ntfs_mapping_pairs_decompress() to fail and return error. Update
340 ntfs_attr_find_vcn_nolock() accordingly.
341 - Fix a nasty deadlock that appeared in recent kernels.
342 The situation: VFS inode X on a mounted ntfs volume is dirty. For
343 same inode X, the ntfs_inode is dirty and thus corresponding on-disk
344 inode, i.e. mft record, which is in a dirty PAGE_CACHE_PAGE belonging
345 to the table of inodes, i.e. $MFT, inode 0.
346 What happens:
347 Process 1: sys_sync()/umount()/whatever... calls
348 __sync_single_inode() for $MFT -> do_writepages() -> write_page for
349 the dirty page containing the on-disk inode X, the page is now locked
350 -> ntfs_write_mst_block() which clears PageUptodate() on the page to
351 prevent anyone else getting hold of it whilst it does the write out.
352 This is necessary as the on-disk inode needs "fixups" applied before
353 the write to disk which are removed again after the write and
354 PageUptodate is then set again. It then analyses the page looking
355 for dirty on-disk inodes and when it finds one it calls
356 ntfs_may_write_mft_record() to see if it is safe to write this
357 on-disk inode. This then calls ilookup5() to check if the
358 corresponding VFS inode is in icache(). This in turn calls ifind()
359 which waits on the inode lock via wait_on_inode whilst holding the
360 global inode_lock.
361 Process 2: pdflush results in a call to __sync_single_inode for the
362 same VFS inode X on the ntfs volume. This locks the inode (I_LOCK)
363 then calls write-inode -> ntfs_write_inode -> map_mft_record() ->
364 read_cache_page() for the page (in page cache of table of inodes
365 $MFT, inode 0) containing the on-disk inode. This page has
366 PageUptodate() clear because of Process 1 (see above) so
367 read_cache_page() blocks when it tries to take the page lock for the
368 page so it can call ntfs_read_page().
369 Thus Process 1 is holding the page lock on the page containing the
370 on-disk inode X and it is waiting on the inode X to be unlocked in
371 ifind() so it can write the page out and then unlock the page.
372 And Process 2 is holding the inode lock on inode X and is waiting for
373 the page to be unlocked so it can call ntfs_readpage() or discover
374 that Process 1 set PageUptodate() again and use the page.
375 Thus we have a deadlock due to ifind() waiting on the inode lock.
376 The solution: The fix is to use the newly introduced
377 ilookup5_nowait() which does not wait on the inode's lock and hence
378 avoids the deadlock. This is safe as we do not care about the VFS
379 inode and only use the fact that it is in the VFS inode cache and the
380 fact that the vfs and ntfs inodes are one struct in memory to find
381 the ntfs inode in memory if present. Also, the ntfs inode has its
382 own locking so it does not matter if the vfs inode is locked.
383 - Fix bug in mft record writing where we forgot to set the device in
384 the buffers when mapping them after the VM had discarded them.
385 Thanks to Martin MOKREJÃ… for the bug report.
386
3872.1.22 - Many bug and race fixes and error handling improvements.
388
389 - Improve error handling in fs/ntfs/inode.c::ntfs_truncate().
390 - Change fs/ntfs/inode.c::ntfs_truncate() to return an error code
391 instead of void and provide a helper ntfs_truncate_vfs() for the
392 vfs ->truncate method.
393 - Add a new ntfs inode flag NInoTruncateFailed() and modify
394 fs/ntfs/inode.c::ntfs_truncate() to set and clear it appropriately.
395 - Fix min_size and max_size definitions in ATTR_DEF structure in
396 fs/ntfs/layout.h to be signed.
397 - Add attribute definition handling helpers to fs/ntfs/attrib.[hc]:
398 ntfs_attr_size_bounds_check(), ntfs_attr_can_be_non_resident(), and
399 ntfs_attr_can_be_resident(), which in turn use the new private helper
400 ntfs_attr_find_in_attrdef().
401 - In fs/ntfs/aops.c::mark_ntfs_record_dirty(), take the
402 mapping->private_lock around the dirtying of the buffer heads
403 analagous to the way it is done in __set_page_dirty_buffers().
404 - Ensure the mft record size does not exceed the PAGE_CACHE_SIZE at
405 mount time as this cannot work with the current implementation.
406 - Check for location of attribute name and improve error handling in
407 general in fs/ntfs/inode.c::ntfs_read_locked_inode() and friends.
408 - In fs/ntfs/aops.c::ntfs_writepage(), if the page is fully outside
409 i_size, i.e. race with truncate, invalidate the buffers on the page
410 so that they become freeable and hence the page does not leak.
411 - Remove unused function fs/ntfs/runlist.c::ntfs_rl_merge(). (Adrian
412 Bunk)
413 - Fix stupid bug in fs/ntfs/attrib.c::ntfs_attr_find() that resulted in
414 a NULL pointer dereference in the error code path when a corrupt
415 attribute was found. (Thanks to Domen Puncer for the bug report.)
416 - Add MODULE_VERSION() to fs/ntfs/super.c.
417 - Make several functions and variables static. (Adrian Bunk)
418 - Modify fs/ntfs/aops.c::mark_ntfs_record_dirty() so it allocates
419 buffers for the page if they are not present and then marks the
420 buffers belonging to the ntfs record dirty. This causes the buffers
421 to become busy and hence they are safe from removal until the page
422 has been written out.
423 - Fix stupid bug in fs/ntfs/attrib.c::ntfs_external_attr_find() in the
424 error handling code path that resulted in a BUG() due to trying to
425 unmap an extent mft record when the mapping of it had failed and it
426 thus was not mapped. (Thanks to Ken MacFerrin for the bug report.)
427 - Drop the runlist lock after the vcn has been read in
428 fs/ntfs/lcnalloc.c::__ntfs_cluster_free().
429 - Rewrite handling of multi sector transfer errors. We now do not set
430 PageError() when such errors are detected in the async i/o handler
431 fs/ntfs/aops.c::ntfs_end_buffer_async_read(). All users of mst
432 protected attributes now check the magic of each ntfs record as they
433 use it and act appropriately. This has the effect of making errors
434 granular per ntfs record rather than per page which solves the case
435 where we cannot access any of the ntfs records in a page when a
436 single one of them had an mst error. (Thanks to Ken MacFerrin for
437 the bug report.)
438 - Fix error handling in fs/ntfs/quota.c::ntfs_mark_quotas_out_of_date()
439 where we failed to release i_mutex on the $Quota/$Q attribute inode.
440 - Fix bug in handling of bad inodes in fs/ntfs/namei.c::ntfs_lookup().
441 - Add mapping of unmapped buffers to all remaining code paths, i.e.
442 fs/ntfs/aops.c::ntfs_write_mst_block(), mft.c::ntfs_sync_mft_mirror(),
443 and write_mft_record_nolock(). From now on we require that the
444 complete runlist for the mft mirror is always mapped into memory.
445 - Add creation of buffers to fs/ntfs/mft.c::ntfs_sync_mft_mirror().
446 - Improve error handling in fs/ntfs/aops.c::ntfs_{read,write}_block().
447 - Cleanup fs/ntfs/aops.c::ntfs_{read,write}page() since we know that a
448 resident attribute will be smaller than a page which makes the code
449 simpler. Also make the code more tolerant to concurrent ->truncate.
450
4512.1.21 - Fix some races and bugs, rewrite mft write code, add mft allocator.
452
453 - Implement extent mft record deallocation
454 fs/ntfs/mft.c::ntfs_extent_mft_record_free().
455 - Splitt runlist related functions off from attrib.[hc] to runlist.[hc].
456 - Add vol->mft_data_pos and initialize it at mount time.
457 - Rename init_runlist() to ntfs_init_runlist(), ntfs_vcn_to_lcn() to
458 ntfs_rl_vcn_to_lcn(), decompress_mapping_pairs() to
459 ntfs_mapping_pairs_decompress(), ntfs_merge_runlists() to
460 ntfs_runlists_merge() and adapt all callers.
461 - Add fs/ntfs/runlist.[hc]::ntfs_get_nr_significant_bytes(),
462 ntfs_get_size_for_mapping_pairs(), ntfs_write_significant_bytes(),
463 and ntfs_mapping_pairs_build(), adapted from libntfs.
464 - Make fs/ntfs/lcnalloc.c::ntfs_cluster_free_from_rl_nolock() not
465 static and add a declaration for it to lcnalloc.h.
466 - Add fs/ntfs/lcnalloc.h::ntfs_cluster_free_from_rl() which is a static
467 inline wrapper for ntfs_cluster_free_from_rl_nolock() which takes the
468 cluster bitmap lock for the duration of the call.
469 - Add fs/ntfs/attrib.[hc]::ntfs_attr_record_resize().
470 - Implement the equivalent of memset() for an ntfs attribute in
471 fs/ntfs/attrib.[hc]::ntfs_attr_set() and switch
472 fs/ntfs/logfile.c::ntfs_empty_logfile() to using it.
473 - Remove unnecessary casts from LCN_* constants.
474 - Implement fs/ntfs/runlist.c::ntfs_rl_truncate_nolock().
475 - Add MFT_RECORD_OLD as a copy of MFT_RECORD in fs/ntfs/layout.h and
476 change MFT_RECORD to contain the NTFS 3.1+ specific fields.
477 - Add a helper function fs/ntfs/aops.c::mark_ntfs_record_dirty() which
478 marks all buffers belonging to an ntfs record dirty, followed by
479 marking the page the ntfs record is in dirty and also marking the vfs
480 inode containing the ntfs record dirty (I_DIRTY_PAGES).
481 - Switch fs/ntfs/index.h::ntfs_index_entry_mark_dirty() to using the
482 new helper fs/ntfs/aops.c::mark_ntfs_record_dirty() and remove the no
483 longer needed fs/ntfs/index.[hc]::__ntfs_index_entry_mark_dirty().
484 - Move ntfs_{un,}map_page() from ntfs.h to aops.h and fix resulting
485 include errors.
486 - Move the typedefs for runlist_element and runlist from types.h to
487 runlist.h and fix resulting include errors.
488 - Remove unused {__,}format_mft_record() from fs/ntfs/mft.c.
489 - Modify fs/ntfs/mft.c::__mark_mft_record_dirty() to use the helper
490 mark_ntfs_record_dirty() which also changes the behaviour in that we
491 now set the buffers belonging to the mft record dirty as well as the
492 page itself.
493 - Update fs/ntfs/mft.c::write_mft_record_nolock() and sync_mft_mirror()
494 to cope with the fact that there now are dirty buffers in mft pages.
495 - Update fs/ntfs/inode.c::ntfs_write_inode() to also use the helper
496 mark_ntfs_record_dirty() and thus to set the buffers belonging to the
497 mft record dirty as well as the page itself.
498 - Fix compiler warnings on x86-64 in fs/ntfs/dir.c. (Randy Dunlap,
499 slightly modified by me)
500 - Add fs/ntfs/mft.c::try_map_mft_record() which fails with -EALREADY if
501 the mft record is already locked and otherwise behaves the same way
502 as fs/ntfs/mft.c::map_mft_record().
503 - Modify fs/ntfs/mft.c::write_mft_record_nolock() so that it only
504 writes the mft record if the buffers belonging to it are dirty.
505 Otherwise we assume that it was written out by other means already.
506 - Attempting to write outside initialized size is _not_ a bug so remove
507 the bug check from fs/ntfs/aops.c::ntfs_write_mst_block(). It is in
508 fact required to write outside initialized size when preparing to
509 extend the initialized size.
510 - Map the page instead of using page_address() before writing to it in
511 fs/ntfs/aops.c::ntfs_mft_writepage().
512 - Provide exclusion between opening an inode / mapping an mft record
513 and accessing the mft record in fs/ntfs/mft.c::ntfs_mft_writepage()
514 by setting the page not uptodate throughout ntfs_mft_writepage().
515 - Clear the page uptodate flag in fs/ntfs/aops.c::ntfs_write_mst_block()
516 to ensure noone can see the page whilst the mst fixups are applied.
517 - Add the helper fs/ntfs/mft.c::ntfs_may_write_mft_record() which
518 checks if an mft record may be written out safely obtaining any
519 necessary locks in the process. This is used by
520 fs/ntfs/aops.c::ntfs_write_mst_block().
521 - Modify fs/ntfs/aops.c::ntfs_write_mst_block() to also work for
522 writing mft records and improve its error handling in the process.
523 Now if any of the records in the page fail to be written out, all
524 other records will be written out instead of aborting completely.
525 - Remove ntfs_mft_aops and update all users to use ntfs_mst_aops.
526 - Modify fs/ntfs/inode.c::ntfs_read_locked_inode() to set the
527 ntfs_mst_aops for all inodes which are NInoMstProtected() and
528 ntfs_aops for all other inodes.
529 - Rename fs/ntfs/mft.c::sync_mft_mirror{,_umount}() to
530 ntfs_sync_mft_mirror{,_umount}() and change their parameters so they
531 no longer require an ntfs inode to be present. Update all callers.
532 - Cleanup the error handling in fs/ntfs/mft.c::ntfs_sync_mft_mirror().
533 - Clear the page uptodate flag in fs/ntfs/mft.c::ntfs_sync_mft_mirror()
534 to ensure noone can see the page whilst the mst fixups are applied.
535 - Remove the no longer needed fs/ntfs/mft.c::ntfs_mft_writepage() and
536 fs/ntfs/mft.c::try_map_mft_record().
537 - Fix callers of fs/ntfs/aops.c::mark_ntfs_record_dirty() to call it
538 with the ntfs inode which contains the page rather than the ntfs
539 inode the mft record of which is in the page.
540 - Fix race condition in fs/ntfs/inode.c::ntfs_put_inode() by moving the
541 index inode bitmap inode release code from there to
542 fs/ntfs/inode.c::ntfs_clear_big_inode(). (Thanks to Christoph
543 Hellwig for spotting this.)
544 - Fix race condition in fs/ntfs/inode.c::ntfs_put_inode() by taking the
545 inode semaphore around the code that sets ni->itype.index.bmp_ino to
546 NULL and reorganize the code to optimize it a bit. (Thanks to
547 Christoph Hellwig for spotting this.)
548 - Modify fs/ntfs/aops.c::mark_ntfs_record_dirty() to no longer take the
549 ntfs inode as a parameter as this is confusing and misleading and the
550 needed ntfs inode is available via NTFS_I(page->mapping->host).
551 Adapt all callers to this change.
552 - Modify fs/ntfs/mft.c::write_mft_record_nolock() and
553 fs/ntfs/aops.c::ntfs_write_mst_block() to only check the dirty state
554 of the first buffer in a record and to take this as the ntfs record
555 dirty state. We cannot look at the dirty state for subsequent
556 buffers because we might be racing with
557 fs/ntfs/aops.c::mark_ntfs_record_dirty().
558 - Move the static inline ntfs_init_big_inode() from fs/ntfs/inode.c to
559 inode.h and make fs/ntfs/inode.c::__ntfs_init_inode() non-static and
560 add a declaration for it to inode.h. Fix some compilation issues
561 that resulted due to #includes and header file interdependencies.
562 - Simplify setup of i_mode in fs/ntfs/inode.c::ntfs_read_locked_inode().
563 - Add helpers fs/ntfs/layout.h::MK_MREF() and MK_LE_MREF().
564 - Modify fs/ntfs/mft.c::map_extent_mft_record() to only verify the mft
565 record sequence number if it is specified (i.e. not zero).
566 - Add fs/ntfs/mft.[hc]::ntfs_mft_record_alloc() and various helper
567 functions used by it.
568 - Update Documentation/filesystems/ntfs.txt with instructions on how to
569 use the Device-Mapper driver with NTFS ftdisk/LDM raid. This removes
570 the linear raid problem with the Software RAID / MD driver when one
571 or more of the devices has an odd number of sectors.
572
5732.1.20 - Fix two stupid bugs introduced in 2.1.18 release.
574
575 - Fix stupid bug in fs/ntfs/attrib.c::ntfs_attr_reinit_search_ctx()
576 where we did not clear ctx->al_entry but it was still set due to
577 changes in ntfs_attr_lookup() and ntfs_external_attr_find() in
578 particular.
579 - Fix another stupid bug in fs/ntfs/attrib.c::ntfs_external_attr_find()
580 where we forgot to unmap the extent mft record when we had finished
581 enumerating an attribute which caused a bug check to trigger when the
582 VFS calls ->clear_inode.
583
5842.1.19 - Many cleanups, improvements, and a minor bug fix.
585
586 - Update ->setattr (fs/ntfs/inode.c::ntfs_setattr()) to refuse to
587 change the uid, gid, and mode of an inode as we do not support NTFS
588 ACLs yet.
589 - Remove BKL use from ntfs_setattr() syncing up with the rest of the
590 kernel.
591 - Get rid of the ugly transparent union in fs/ntfs/dir.c::ntfs_readdir()
592 and ntfs_filldir() as per suggestion from Al Viro.
593 - Change '\0' and L'\0' to simply 0 as per advice from Linus Torvalds.
594 - Update ->truncate (fs/ntfs/inode.c::ntfs_truncate()) to check if the
595 inode size has changed and to only output an error if so.
596 - Rename fs/ntfs/attrib.h::attribute_value_length() to ntfs_attr_size().
597 - Add le{16,32,64} as well as sle{16,32,64} data types to
598 fs/ntfs/types.h.
599 - Change ntfschar to be le16 instead of u16 in fs/ntfs/types.h.
600 - Add le versions of VCN, LCN, and LSN called leVCN, leLCN, and leLSN,
601 respectively, to fs/ntfs/types.h.
602 - Update endianness conversion macros in fs/ntfs/endian.h to use the
603 new types as appropriate.
604 - Do proper type casting when using sle64_to_cpup() in fs/ntfs/dir.c
605 and index.c.
606 - Add leMFT_REF data type to fs/ntfs/layout.h.
607 - Update all NTFS header files with the new little endian data types.
608 Affected files are fs/ntfs/layout.h, logfile.h, and time.h.
609 - Do proper type casting when using ntfs_is_*_recordp() in
610 fs/ntfs/logfile.c, mft.c, and super.c.
611 - Fix all the sparse bitwise warnings. Had to change all the typedef
612 enums storing little endian values to simple enums plus a typedef for
613 the datatype to make sparse happy.
614 - Fix a bug found by the new sparse bitwise warnings where the default
615 upcase table was defined as a pointer to wchar_t rather than ntfschar
616 in fs/ntfs/ntfs.h and super.c.
617 - Change {const_,}cpu_to_le{16,32}(0) to just 0 as suggested by Al Viro.
618
6192.1.18 - Fix scheduling latencies at mount time as well as an endianness bug.
620
621 - Remove vol->nr_mft_records as it was pretty meaningless and optimize
622 the calculation of total/free inodes as used by statfs().
623 - Fix scheduling latencies in ntfs_fill_super() by dropping the BKL
624 because the code itself is using the ntfs_lock semaphore which
625 provides safe locking. (Ingo Molnar)
626 - Fix a potential bug in fs/ntfs/mft.c::map_extent_mft_record() that
627 could occur in the future for when we start closing/freeing extent
628 inodes if we don't set base_ni->ext.extent_ntfs_inos to NULL after
629 we free it.
630 - Rename {find,lookup}_attr() to ntfs_attr_{find,lookup}() as well as
631 find_external_attr() to ntfs_external_attr_find() to cleanup the
632 namespace a bit and to be more consistent with libntfs.
633 - Rename {{re,}init,get,put}_attr_search_ctx() to
634 ntfs_attr_{{re,}init,get,put}_search_ctx() as well as the type
635 attr_search_context to ntfs_attr_search_ctx.
636 - Force use of ntfs_attr_find() in ntfs_attr_lookup() when searching
637 for the attribute list attribute itself.
638 - Fix endianness bug in ntfs_external_attr_find().
639 - Change ntfs_{external_,}attr_find() to return 0 on success, -ENOENT
640 if the attribute is not found, and -EIO on real error. In the case
641 of -ENOENT, the search context is updated to describe the attribute
642 before which the attribute being searched for would need to be
643 inserted if such an action were to be desired and in the case of
644 ntfs_external_attr_find() the search context is also updated to
645 indicate the attribute list entry before which the attribute list
646 entry of the attribute being searched for would need to be inserted
647 if such an action were to be desired. Also make ntfs_find_attr()
648 static and remove its prototype from attrib.h as it is not used
649 anywhere other than attrib.c. Update ntfs_attr_lookup() and all
650 callers of ntfs_{external,}attr_{find,lookup}() for the new return
651 values.
652 - Minor cleanup of fs/ntfs/inode.c::ntfs_init_locked_inode().
653
6542.1.17 - Fix bugs in mount time error code paths and other updates.
655
656 - Implement bitmap modification code (fs/ntfs/bitmap.[hc]). This
657 includes functions to set/clear a single bit or a run of bits.
658 - Add fs/ntfs/attrib.[hc]::ntfs_find_vcn() which returns the locked
659 runlist element containing a particular vcn. It also takes care of
660 mapping any needed runlist fragments.
661 - Implement cluster (de-)allocation code (fs/ntfs/lcnalloc.[hc]).
662 - Load attribute definition table from $AttrDef at mount time.
663 - Fix bugs in mount time error code paths involving (de)allocation of
664 the default and volume upcase tables.
665 - Remove ntfs_nr_mounts as it is no longer used.
666
6672.1.16 - Implement access time updates, file sync, async io, and read/writev.
668
669 - Add support for readv/writev and aio_read/aio_write (fs/ntfs/file.c).
670 This is done by setting the appropriate file operations pointers to
671 the generic helper functions provided by mm/filemap.c.
672 - Implement fsync, fdatasync, and msync both for files (fs/ntfs/file.c)
673 and directories (fs/ntfs/dir.c).
674 - Add support for {a,m,c}time updates to inode.c::ntfs_write_inode().
675 Note, except for the root directory and any other system files opened
676 by the user, the system files will not have their access times
677 updated as they are only accessed at the inode level an hence the
678 file level functions which cause the times to be updated are never
679 invoked.
680
6812.1.15 - Invalidate quotas when (re)mounting read-write.
682
683 - Add new element itype.index.collation_rule to the ntfs inode
684 structure and set it appropriately in ntfs_read_locked_inode().
685 - Implement a new inode type "index" to allow efficient access to the
686 indices found in various system files and adapt inode handling
687 accordingly (fs/ntfs/inode.[hc]). An index inode is essentially an
688 attribute inode (NInoAttr() is true) with an attribute type of
689 AT_INDEX_ALLOCATION. As such, it is no longer allowed to call
690 ntfs_attr_iget() with an attribute type of AT_INDEX_ALLOCATION as
691 there would be no way to distinguish between normal attribute inodes
692 and index inodes. The function to obtain an index inode is
693 ntfs_index_iget() and it uses the helper function
694 ntfs_read_locked_index_inode(). Note, we do not overload
695 ntfs_attr_iget() as indices consist of multiple attributes so using
696 ntfs_attr_iget() to obtain an index inode would be confusing.
697 - Ensure that there is no overflow when doing page->index <<
698 PAGE_CACHE_SHIFT by casting page->index to s64 in fs/ntfs/aops.c.
699 - Use atomic kmap instead of kmap() in fs/ntfs/aops.c::ntfs_read_page()
700 and ntfs_read_block().
701 - Use case sensitive attribute lookups instead of case insensitive ones.
702 - Lock all page cache pages belonging to mst protected attributes while
703 accessing them to ensure we never see corrupt data while the page is
704 under writeout.
705 - Add framework for generic ntfs collation (fs/ntfs/collation.[hc]).
706 We have ntfs_is_collation_rule_supported() to check if the collation
707 rule you want to use is supported and ntfs_collation() which actually
708 collates two data items. We currently only support COLLATION_BINARY
709 and COLLATION_NTOFS_ULONG but support for other collation rules will
710 be added as the need arises.
711 - Add a new type, ntfs_index_context, to allow retrieval of an index
712 entry using the corresponding index key. To get an index context,
713 use ntfs_index_ctx_get() and to release it, use ntfs_index_ctx_put().
714 This also adds a new slab cache for the index contexts. To lookup a
715 key in an index inode, use ntfs_index_lookup(). After modifying an
716 index entry, call ntfs_index_entry_flush_dcache_page() followed by
717 ntfs_index_entry_mark_dirty() to ensure the changes are written out
718 to disk. For details see fs/ntfs/index.[hc]. Note, at present, if
719 an index entry is in the index allocation attribute rather than the
720 index root attribute it will not be written out (you will get a
721 warning message about discarded changes instead).
722 - Load the quota file ($Quota) and check if quota tracking is enabled
723 and if so, mark the quotas out of date. This causes windows to
724 rescan the volume on boot and update all quota entries.
725 - Add a set_page_dirty address space operation for ntfs_m[fs]t_aops.
726 It is simply set to __set_page_dirty_nobuffers() to make sure that
727 running set_page_dirty() on a page containing mft/ntfs records will
728 not affect the dirty state of the page buffers.
729 - Add fs/ntfs/index.c::__ntfs_index_entry_mark_dirty() which sets all
730 buffers that are inside the ntfs record in the page dirty after which
731 it sets the page dirty. This allows ->writepage to only write the
732 dirty index records rather than having to write all the records in
733 the page. Modify fs/ntfs/index.h::ntfs_index_entry_mark_dirty() to
734 use this rather than __set_page_dirty_nobuffers().
735 - Implement fs/ntfs/aops.c::ntfs_write_mst_block() which enables the
736 writing of page cache pages belonging to mst protected attributes
737 like the index allocation attribute in directory indices and other
738 indices like $Quota/$Q, etc. This means that the quota is now marked
739 out of date on all volumes rather than only on ones where the quota
740 defaults entry is in the index root attribute of the $Quota/$Q index.
741
7422.1.14 - Fix an NFSd caused deadlock reported by several users.
743
744 - Modify fs/ntfs/ntfs_readdir() to copy the index root attribute value
745 to a buffer so that we can put the search context and unmap the mft
746 record before calling the filldir() callback. We need to do this
747 because of NFSd which calls ->lookup() from its filldir callback()
748 and this causes NTFS to deadlock as ntfs_lookup() maps the mft record
749 of the directory and since ntfs_readdir() has got it mapped already
750 ntfs_lookup() deadlocks.
751
7522.1.13 - Enable overwriting of resident files and housekeeping of system files.
753
754 - Implement writing of mft records (fs/ntfs/mft.[hc]), which includes
755 keeping the mft mirror in sync with the mft when mirrored mft records
756 are written. The functions are write_mft_record{,_nolock}(). The
757 implementation is quite rudimentary for now with lots of things not
758 implemented yet but I am not sure any of them can actually occur so
759 I will wait for people to hit each one and only then implement it.
760 - Commit open system inodes at umount time. This should make it
761 virtually impossible for sync_mft_mirror_umount() to ever be needed.
762 - Implement ->write_inode (fs/ntfs/inode.c::ntfs_write_inode()) for the
763 ntfs super operations. This gives us inode writing via the VFS inode
764 dirty code paths. Note: Access time updates are not implemented yet.
765 - Implement fs/ntfs/mft.[hc]::{,__}mark_mft_record_dirty() and make
766 fs/ntfs/aops.c::ntfs_writepage() and ntfs_commit_write() use it, thus
767 finally enabling resident file overwrite! (-8 This also includes a
768 placeholder for ->writepage (ntfs_mft_writepage()), which for now
769 just redirties the page and returns. Also, at umount time, we for
770 now throw away all mft data page cache pages after the last call to
771 ntfs_commit_inode() in the hope that all inodes will have been
772 written out by then and hence no dirty (meta)data will be lost. We
773 also check for this case and emit an error message telling the user
774 to run chkdsk.
775 - Use set_page_writeback() and end_page_writeback() in the resident
776 attribute code path of fs/ntfs/aops.c::ntfs_writepage() otherwise
777 the radix-tree tag PAGECACHE_TAG_DIRTY remains set even though the
778 page is clean.
779 - Implement ntfs_mft_writepage() so it now checks if any of the mft
780 records in the page are dirty and if so redirties the page and
781 returns. Otherwise it just returns (after doing set_page_writeback(),
782 unlock_page(), end_page_writeback() or the radix-tree tag
783 PAGECACHE_TAG_DIRTY remains set even though the page is clean), thus
784 alowing the VM to do with the page as it pleases. Also, at umount
785 time, now only throw away dirty mft (meta)data pages if dirty inodes
786 are present and ask the user to email us if they see this happening.
787 - Add functions ntfs_{clear,set}_volume_flags(), to modify the volume
788 information flags (fs/ntfs/super.c).
789 - Mark the volume dirty when (re)mounting read-write and mark it clean
790 when unmounting or remounting read-only. If any volume errors are
791 found, the volume is left marked dirty to force chkdsk to run.
792 - Add code to set the NT4 compatibility flag when (re)mounting
793 read-write for newer NTFS versions but leave it commented out for now
794 since we do not make any modifications that are NTFS 1.2 specific yet
795 and since setting this flag breaks Captive-NTFS which is not nice.
796 This code must be enabled once we start writing NTFS 1.2 specific
797 changes otherwise Windows NTFS driver might crash / cause corruption.
798
7992.1.12 - Fix the second fix to the decompression engine and some cleanups.
800
801 - Add a new address space operations struct, ntfs_mst_aops, for mst
802 protected attributes. This is because the default ntfs_aops do not
803 make sense with mst protected data and were they to write anything to
804 such an attribute they would cause data corruption so we provide
805 ntfs_mst_aops which does not have any write related operations set.
806 - Cleanup dirty ntfs inode handling (fs/ntfs/inode.[hc]) which also
807 includes an adapted ntfs_commit_inode() and an implementation of
808 ntfs_write_inode() which for now just cleans dirty inodes without
809 writing them (it does emit a warning that this is happening).
810 - Undo the second decompression engine fix (see 2.1.9 release ChangeLog
811 entry) as it was only fixing a theoretical bug but at the same time
812 it badly broke the handling of sparse and uncompressed compression
813 blocks.
814
8152.1.11 - Driver internal cleanups.
816
817 - Only build logfile.o if building the driver with read-write support.
818 - Really final white space cleanups.
819 - Use generic_ffs() instead of ffs() in logfile.c which allows the
820 log_page_size variable to be optimized by gcc into a constant.
821 - Rename uchar_t to ntfschar everywhere as uchar_t is unsigned 1-byte
822 char as defined by POSIX and as found on some systems.
823
8242.1.10 - Force read-only (re)mounting of volumes with unsupported volume flags.
825
826 - Finish off the white space cleanups (remove trailing spaces, etc).
827 - Clean up ntfs_fill_super() and ntfs_read_inode_mount() by removing
828 the kludges around the first iget(). Instead of (re)setting ->s_op
829 we have the $MFT inode set up by explicit new_inode() / set ->i_ino /
830 insert_inode_hash() / call ntfs_read_inode_mount() directly. This
831 kills the need for second super_operations and allows to return error
832 from ntfs_read_inode_mount() without resorting to ugly "poisoning"
833 tricks. (Al Viro)
834 - Force read-only (re)mounting if any of the following bits are set in
835 the volume information flags:
836 VOLUME_IS_DIRTY, VOLUME_RESIZE_LOG_FILE,
837 VOLUME_UPGRADE_ON_MOUNT, VOLUME_DELETE_USN_UNDERWAY,
838 VOLUME_REPAIR_OBJECT_ID, VOLUME_MODIFIED_BY_CHKDSK
839 To make this easier we define VOLUME_MUST_MOUNT_RO_MASK with all the
840 above bits set so the test is made easy.
841
8422.1.9 - Fix two bugs in decompression engine.
843
844 - Fix a bug where we would not always detect that we have reached the
845 end of a compression block because we were ending at minus one byte
846 which is effectively the same as being at the end. The fix is to
847 check whether the uncompressed buffer has been fully filled and if so
848 we assume we have reached the end of the compression block. A big
849 thank you to Marcin Gibuła for the bug report, the assistance in
850 tracking down the bug and testing the fix.
851 - Fix a possible bug where when a compressed read is truncated to the
852 end of the file, the offset inside the last page was not truncated.
853
8542.1.8 - Handle $MFT mirror and $LogFile, improve time handling, and cleanups.
855
856 - Use get_bh() instead of manual atomic_inc() in fs/ntfs/compress.c.
857 - Modify fs/ntfs/time.c::ntfs2utc(), get_current_ntfs_time(), and
858 utc2ntfs() to work with struct timespec instead of time_t on the
859 Linux UTC time side thus preserving the full precision of the NTFS
860 time and only loosing up to 99 nano-seconds in the Linux UTC time.
861 - Move fs/ntfs/time.c to fs/ntfs/time.h and make the time functions
862 static inline.
863 - Remove unused ntfs_dirty_inode().
864 - Cleanup super operations declaration in fs/ntfs/super.c.
865 - Wrap flush_dcache_mft_record_page() in #ifdef NTFS_RW.
866 - Add NInoTestSetFoo() and NInoTestClearFoo() macro magic to
867 fs/ntfs/inode.h and use it to declare NInoTest{Set,Clear}Dirty.
868 - Move typedefs for ntfs_attr and test_t from fs/ntfs/inode.c to
869 fs/ntfs/inode.h so they can be used elsewhere.
870 - Determine the mft mirror size as the number of mirrored mft records
871 and store it in ntfs_volume->mftmirr_size (fs/ntfs/super.c).
872 - Load the mft mirror at mount time and compare the mft records stored
873 in it to the ones in the mft. Force a read-only mount if the two do
874 not match (fs/ntfs/super.c).
875 - Fix type casting related warnings on 64-bit architectures. Thanks
876 to Meelis Roos for reporting them.
877 - Move %L to %ll as %L is floating point and %ll is integer which is
878 what we want.
879 - Read the journal ($LogFile) and determine if the volume has been
880 shutdown cleanly and force a read-only mount if not (fs/ntfs/super.c
881 and fs/ntfs/logfile.c). This is a little bit of a crude check in
882 that we only look at the restart areas and not at the actual log
883 records so that there will be a very small number of cases where we
884 think that a volume is dirty when in fact it is clean. This should
885 only affect volumes that have not been shutdown cleanly and did not
886 have any pending, non-check-pointed i/o.
887 - If the $LogFile indicates a clean shutdown and a read-write (re)mount
888 is requested, empty $LogFile by overwriting it with 0xff bytes to
889 ensure that Windows cannot cause data corruption by replaying a stale
890 journal after Linux has written to the volume.
891
8922.1.7 - Enable NFS exporting of mounted NTFS volumes.
893
894 - Set i_generation in the VFS inode from the seq_no of the NTFS inode.
895 - Make ntfs_lookup() NFS export safe, i.e. use d_splice_alias(), etc.
896 - Implement ->get_dentry() in fs/ntfs/namei.c::ntfs_get_dentry() as the
897 default doesn't allow inode number 0 which is a valid inode on NTFS
898 and even if it did allow that it uses iget() instead of ntfs_iget()
899 which makes it useless for us.
900 - Implement ->get_parent() in fs/ntfs/namei.c::ntfs_get_parent() as the
901 default just returns -EACCES which is not very useful.
902 - Define export operations (->s_export_op) for NTFS (ntfs_export_ops)
903 and set them up in the super block at mount time (super.c) this
904 allows mounted NTFS volumes to be exported via NFS.
905 - Add missing return -EOPNOTSUPP; in
906 fs/ntfs/aops.c::ntfs_commit_nonresident_write().
907 - Enforce no atime and no dir atime updates at mount/remount time as
908 they are not implemented yet anyway.
909 - Move a few assignments in fs/ntfs/attrib.c::load_attribute_list() to
910 after a NULL check. Thanks to Dave Jones for pointing this out.
911
9122.1.6 - Fix minor bug in handling of compressed directories.
913
914 - Fix bug in handling of compressed directories. A compressed
915 directory is not really compressed so when we set the ->i_blocks
916 field of a compressed directory inode we were setting it from the
917 non-existing field ni->itype.compressed.size which gave random
918 results... For directories we now always use ni->allocated_size.
919
9202.1.5 - Fix minor bug in attribute list attribute handling.
921
922 - Fix bug in attribute list handling. Actually it is not as much a bug
923 as too much protection in that we were not allowing attribute lists
924 which waste space on disk while Windows XP clearly allows it and in
925 fact creates such attribute lists so our driver was failing.
926 - Update NTFS documentation ready for 2.6 kernel release.
927
9282.1.4 - Reduce compiler requirements.
929
930 - Remove all uses of unnamed structs and unions in the driver to make
931 old and newer gcc versions happy. Makes it a bit uglier IMO but at
932 least people will stop hassling me about it.
933
9342.1.3 - Important bug fixes in corner cases.
935
936 - super.c::parse_ntfs_boot_sector(): Correct the check for 64-bit
937 clusters. (Philipp Thomas)
938 - attrib.c::load_attribute_list(): Fix bug when initialized_size is a
939 multiple of the block_size but not the cluster size. (Szabolcs
940 Szakacsits)
941
9422.1.2 - Important bug fixes aleviating the hangs in statfs.
943
944 - Fix buggy free cluster and free inode determination logic.
945
9462.1.1 - Minor updates.
947
948 - Add handling for initialized_size != data_size in compressed files.
949 - Reduce function local stack usage from 0x3d4 bytes to just noise in
950 fs/ntfs/upcase.c. (Randy Dunlap)
951 - Remove compiler warnings for newer gcc.
952 - Pages are no longer kmapped by mm/filemap.c::generic_file_write()
953 around calls to ->{prepare,commit}_write. Adapt NTFS appropriately
954 in fs/ntfs/aops.c::ntfs_prepare_nonresident_write() by using
955 kmap_atomic(KM_USER0).
956
9572.1.0 - First steps towards write support: implement file overwrite.
958
959 - Add configuration option for developmental write support with an
960 appropriately scary configuration help text.
961 - Initial implementation of fs/ntfs/aops.c::ntfs_writepage() and its
962 helper fs/ntfs/aops.c::ntfs_write_block(). This enables mmap(2) based
963 overwriting of existing files on ntfs. Note: Resident files are
964 only written into memory, and not written out to disk at present, so
965 avoid writing to files smaller than about 1kiB.
966 - Initial implementation of fs/ntfs/aops.c::ntfs_prepare_write(), its
967 helper fs/ntfs/aops.c::ntfs_prepare_nonresident_write() and their
968 counterparts, fs/ntfs/aops.c::ntfs_commit_write(), and
969 fs/ntfs/aops.c::ntfs_commit_nonresident_write(), respectively. Also,
970 add generic_file_write() to the ntfs file operations (fs/ntfs/file.c).
971 This enables write(2) based overwriting of existing files on ntfs.
972 Note: As with mmap(2) based overwriting, resident files are only
973 written into memory, and not written out to disk at present, so avoid
974 writing to files smaller than about 1kiB.
975 - Implement ->truncate (fs/ntfs/inode.c::ntfs_truncate()) and
976 ->setattr() (fs/ntfs/inode.c::ntfs_setattr()) inode operations for
977 files with the purpose of intercepting and aborting all i_size
978 changes which we do not support yet. ntfs_truncate() actually only
979 emits a warning message but AFAICS our interception of i_size changes
980 elsewhere means ntfs_truncate() never gets called for i_size changes.
981 It is only called from generic_file_write() when we fail in
982 ntfs_prepare_{,nonresident_}write() in order to discard any
983 instantiated buffers beyond i_size. Thus i_size is not actually
984 changed so our warning message is enough. Unfortunately it is not
985 possible to easily determine if i_size is being changed or not hence
986 we just emit an appropriately worded error message.
987
9882.0.25 - Small bug fixes and cleanups.
989
990 - Unlock the page in an out of memory error code path in
991 fs/ntfs/aops.c::ntfs_read_block().
992 - If fs/ntfs/aops.c::ntfs_read_page() is called on an uptodate page,
993 just unlock the page and return. (This can happen due to ->writepage
994 clearing PageUptodate() during write out of MstProtected()
995 attributes.
996 - Remove leaked write code again.
997
9982.0.24 - Cleanups.
999
1000 - Treat BUG_ON() as ASSERT() not VERIFY(), i.e. do not use side effects
1001 inside BUG_ON(). (Adam J. Richter)
1002 - Split logical OR expressions inside BUG_ON() into individual BUG_ON()
1003 calls for improved debugging. (Adam J. Richter)
1004 - Add errors flag to the ntfs volume state, accessed via
1005 NVol{,Set,Clear}Errors(vol).
1006 - Do not allow read-write remounts of read-only volumes with errors.
1007 - Clarify comment for ntfs file operation sendfile which was added by
1008 Christoph Hellwig a while ago (just using generic_file_sendfile())
1009 to say that ntfs ->sendfile is only used for the case where the
1010 source data is on the ntfs partition and the destination is
1011 somewhere else, i.e. nothing we need to concern ourselves with.
1012 - Add generic_file_write() as our ntfs file write operation.
1013
10142.0.23 - Major bug fixes (races, deadlocks, non-i386 architectures).
1015
1016 - Massive internal locking changes to mft record locking. Fixes lock
1017 recursion and replaces the mrec_lock read/write semaphore with a
1018 mutex. Also removes the now superfluous mft_count. This fixes several
1019 race conditions and deadlocks, especially in the future write code.
1020 - Fix ntfs over loopback for compressed files by adding an
1021 optimization barrier. (gcc was screwing up otherwise ?)
1022 - Miscellaneous cleanups all over the code and a fix or two in error
1023 handling code paths.
1024 Thanks go to Christoph Hellwig for pointing out the following two:
1025 - Remove now unused function fs/ntfs/malloc.h::vmalloc_nofs().
1026 - Fix ntfs_free() for ia64 and parisc by checking for VMALLOC_END, too.
1027
10282.0.22 - Cleanups, mainly to ntfs_readdir(), and use C99 initializers.
1029
1030 - Change fs/ntfs/dir.c::ntfs_reddir() to only read/write ->f_pos once
1031 at entry/exit respectively.
1032 - Use C99 initializers for structures.
1033 - Remove unused variable blocks from fs/ntfs/aops.c::ntfs_read_block().
1034
10352.0.21 - Check for, and refuse to work with too large files/directories/volumes.
1036
1037 - Limit volume size at mount time to 2TiB on architectures where
1038 unsigned long is 32-bits (fs/ntfs/super.c::parse_ntfs_boot_sector()).
1039 This is the most we can do without overflowing the 32-bit limit of
1040 the block device size imposed on us by sb_bread() and sb_getblk()
1041 for the time being.
1042 - Limit file/directory size at open() time to 16TiB on architectures
1043 where unsigned long is 32-bits (fs/ntfs/file.c::ntfs_file_open() and
1044 fs/ntfs/dir.c::ntfs_dir_open()). This is the most we can do without
1045 overflowing the page cache page index.
1046
10472.0.20 - Support non-resident directory index bitmaps, fix page leak in readdir.
1048
1049 - Move the directory index bitmap to use an attribute inode instead of
1050 having special fields for it inside the ntfs inode structure. This
1051 means that the index bitmaps now use the page cache for i/o, too,
1052 and also as a side effect we get support for non-resident index
1053 bitmaps for free.
1054 - Simplify/cleanup error handling in fs/ntfs/dir.c::ntfs_readdir() and
1055 fix a page leak that manifested itself in some cases.
1056 - Add fs/ntfs/inode.c::ntfs_put_inode(), which we need to release the
1057 index bitmap inode on the final iput().
1058
10592.0.19 - Fix race condition, improvements, and optimizations in i/o interface.
1060
1061 - Apply block optimization added to fs/ntfs/aops.c::ntfs_read_block()
1062 to fs/ntfs/compress.c::ntfs_file_read_compressed_block() as well.
1063 - Drop the "file" from ntfs_file_read_compressed_block().
1064 - Rename fs/ntfs/aops.c::ntfs_enb_buffer_read_async() to
1065 ntfs_end_buffer_async_read() (more like the fs/buffer.c counterpart).
1066 - Update ntfs_end_buffer_async_read() with the improved logic from
1067 its updated counterpart fs/buffer.c::end_buffer_async_read(). Apply
1068 further logic improvements to better determine when we set PageError.
1069 - Update submission of buffers in fs/ntfs/aops.c::ntfs_read_block() to
1070 check for the buffers being uptodate first in line with the updated
1071 fs/buffer.c::block_read_full_page(). This plugs a small race
1072 condition.
1073
10742.0.18 - Fix race condition in reading of compressed files.
1075
1076 - There was a narrow window between checking a buffer head for being
1077 uptodate and locking it in ntfs_file_read_compressed_block(). We now
1078 lock the buffer and then check whether it is uptodate or not.
1079
10802.0.17 - Cleanups and optimizations - shrinking the ToDo list.
1081
1082 - Modify fs/ntfs/inode.c::ntfs_read_locked_inode() to return an error
1083 code and update callers, i.e. ntfs_iget(), to pass that error code
1084 up instead of just using -EIO.
1085 - Modifications to super.c to ensure that both mount and remount
1086 cannot set any write related options when the driver is compiled
1087 read-only.
1088 - Optimize block resolution in fs/ntfs/aops.c::ntfs_read_block() to
1089 cache the current runlist element. This should improve performance
1090 when reading very large and/or very fragmented data.
1091
10922.0.16 - Convert access to $MFT/$BITMAP to attribute inode API.
1093
1094 - Fix a stupid bug introduced in 2.0.15 where we were unmapping the
1095 wrong inode in fs/ntfs/inode.c::ntfs_attr_iget().
1096 - Fix debugging check in fs/ntfs/aops.c::ntfs_read_block().
1097 - Convert $MFT/$BITMAP access to attribute inode API and remove all
1098 remnants of the ugly mftbmp address space and operations hack. This
1099 means we finally have only one readpage function as well as only one
1100 async io completion handler. Yey! The mft bitmap is now just an
1101 attribute inode and is accessed from vol->mftbmp_ino just as if it
1102 were a normal file. Fake inodes rule. (-:
1103
11042.0.15 - Fake inodes based attribute i/o via the pagecache, fixes and cleanups.
1105
1106 - Fix silly bug in fs/ntfs/super.c::parse_options() which was causing
1107 remounts to fail when the partition had an entry in /etc/fstab and
1108 the entry specified the nls= option.
1109 - Apply same macro magic used in fs/ntfs/inode.h to fs/ntfs/volume.h to
1110 expand all the helper functions NVolFoo(), NVolSetFoo(), and
1111 NVolClearFoo().
1112 - Move copyright statement from driver initialisation message to
1113 module description (fs/super.c). This makes the initialisation
1114 message fit on one line and fits in better with rest of kernel.
1115 - Update fs/ntfs/attrib.c::map_run_list() to work on both real and
1116 attribute inodes, and both for files and directories.
1117 - Implement fake attribute inodes allowing all attribute i/o to go via
1118 the page cache and to use all the normal vfs/mm functionality:
1119 - Add ntfs_attr_iget() and its helper ntfs_read_locked_attr_inode()
1120 to fs/ntfs/inode.c.
1121 - Add needed cleanup code to ntfs_clear_big_inode().
1122 - Merge address space operations for files and directories (aops.c),
1123 now just have ntfs_aops:
1124 - Rename:
1125 end_buffer_read_attr_async() -> ntfs_end_buffer_read_async(),
1126 ntfs_attr_read_block() -> ntfs_read_block(),
1127 ntfs_file_read_page() -> ntfs_readpage().
1128 - Rewrite fs/ntfs/aops.c::ntfs_readpage() to work on both real and
1129 attribute inodes, and both for files and directories.
1130 - Remove obsolete fs/ntfs/aops.c::ntfs_mst_readpage().
1131
11322.0.14 - Run list merging code cleanup, minor locking changes, typo fixes.
1133
1134 - Change fs/ntfs/super.c::ntfs_statfs() to not rely on BKL by moving
1135 the locking out of super.c::get_nr_free_mft_records() and taking and
1136 dropping the mftbmp_lock rw_semaphore in ntfs_statfs() itself.
1137 - Bring attribute runlist merging code (fs/ntfs/attrib.c) in sync with
1138 current userspace ntfs library code. This means that if a merge
1139 fails the original runlists are always left unmodified instead of
1140 being silently corrupted.
1141 - Misc typo fixes.
1142
11432.0.13 - Use iget5_locked() in preparation for fake inodes and small cleanups.
1144
1145 - Remove nr_mft_bits and the now superfluous union with nr_mft_records
1146 from ntfs_volume structure.
1147 - Remove nr_lcn_bits and the now superfluous union with nr_clusters
1148 from ntfs_volume structure.
1149 - Use iget5_locked() and friends instead of conventional iget(). Wrap
1150 the call in fs/ntfs/inode.c::ntfs_iget() and update callers of iget()
1151 to use ntfs_iget(). Leave only one iget() call at mount time so we
1152 don't need an ntfs_iget_mount().
1153 - Change fs/ntfs/inode.c::ntfs_new_extent_inode() to take mft_no as an
1154 additional argument.
1155
11562.0.12 - Initial cleanup of address space operations following 2.0.11 changes.
1157
1158 - Merge fs/ntfs/aops.c::end_buffer_read_mst_async() and
1159 fs/ntfs/aops.c::end_buffer_read_file_async() into one function
1160 fs/ntfs/aops.c::end_buffer_read_attr_async() using NInoMstProtected()
1161 to determine whether to apply mst fixups or not.
1162 - Above change allows merging fs/ntfs/aops.c::ntfs_file_read_block()
1163 and fs/ntfs/aops.c::ntfs_mst_readpage() into one function
1164 fs/ntfs/aops.c::ntfs_attr_read_block(). Also, create a tiny wrapper
1165 fs/ntfs/aops.c::ntfs_mst_readpage() to transform the parameters from
1166 the VFS readpage function prototype to the ntfs_attr_read_block()
1167 function prototype.
1168
11692.0.11 - Initial preparations for fake inode based attribute i/o.
1170
1171 - Move definition of ntfs_inode_state_bits to fs/ntfs/inode.h and
1172 do some macro magic (adapted from include/linux/buffer_head.h) to
1173 expand all the helper functions NInoFoo(), NInoSetFoo(), and
1174 NInoClearFoo().
1175 - Add new flag to ntfs_inode_state_bits: NI_Sparse.
1176 - Add new fields to ntfs_inode structure to allow use of fake inodes
1177 for attribute i/o: type, name, name_len. Also add new state bits:
1178 NI_Attr, which, if set, indicates the inode is a fake inode, and
1179 NI_MstProtected, which, if set, indicates the attribute uses multi
1180 sector transfer protection, i.e. fixups need to be applied after
1181 reads and before/after writes.
1182 - Rename fs/ntfs/inode.c::ntfs_{new,clear,destroy}_inode() to
1183 ntfs_{new,clear,destroy}_extent_inode() and update callers.
1184 - Use ntfs_clear_extent_inode() in fs/ntfs/inode.c::__ntfs_clear_inode()
1185 instead of ntfs_destroy_extent_inode().
1186 - Cleanup memory deallocations in {__,}ntfs_clear_{,big_}inode().
1187 - Make all operations on ntfs inode state bits use the NIno* functions.
1188 - Set up the new ntfs inode fields and state bits in
1189 fs/ntfs/inode.c::ntfs_read_inode() and add appropriate cleanup of
1190 allocated memory to __ntfs_clear_inode().
1191 - Cleanup ntfs_inode structure a bit for better ordering of elements
1192 w.r.t. their size to allow better packing of the structure in memory.
1193
11942.0.10 - There can only be 2^32 - 1 inodes on an NTFS volume.
1195
1196 - Add check at mount time to verify that the number of inodes on the
1197 volume does not exceed 2^32 - 1, which is the maximum allowed for
1198 NTFS according to Microsoft.
1199 - Change mft_no member of ntfs_inode structure to be unsigned long.
1200 Update all users. This makes ntfs_inode->mft_no just a copy of struct
1201 inode->i_ino. But we can't just always use struct inode->i_ino and
1202 remove mft_no because extent inodes do not have an attached struct
1203 inode.
1204
12052.0.9 - Decompression engine now uses a single buffer and other cleanups.
1206
1207 - Change decompression engine to use a single buffer protected by a
1208 spin lock instead of per-CPU buffers. (Rusty Russell)
1209 - Do not update cb_pos when handling a partial final page during
1210 decompression of a sparse compression block, as the value is later
1211 reset without being read/used. (Rusty Russell)
1212 - Switch to using the new KM_BIO_SRC_IRQ for atomic kmap()s. (Andrew
1213 Morton)
1214 - Change buffer size in ntfs_readdir()/ntfs_filldir() to use
1215 NLS_MAX_CHARSET_SIZE which makes the buffers almost 1kiB each but
1216 it also makes everything safer so it is a good thing.
1217 - Miscellaneous minor cleanups to comments.
1218
12192.0.8 - Major updates for handling of case sensitivity and dcache aliasing.
1220
1221 Big thanks go to Al Viro and other inhabitants of #kernel for investing
1222 their time to discuss the case sensitivity and dcache aliasing issues.
1223
1224 - Remove unused source file fs/ntfs/attraops.c.
1225 - Remove show_inodes mount option(s), thus dropping support for
1226 displaying of short file names.
1227 - Remove deprecated mount option posix.
1228 - Restore show_sys_files mount option.
1229 - Add new mount option case_sensitive, to determine if the driver
1230 treats file names as case sensitive or not. If case sensitive, create
1231 file names in the POSIX namespace. Otherwise create file names in the
1232 LONG/WIN32 namespace. Note, files remain accessible via their short
1233 file name, if it exists.
1234 - Remove really dumb logic bug in boot sector recovery code.
1235 - Fix dcache aliasing issues wrt short/long file names via changes
1236 to fs/ntfs/dir.c::ntfs_lookup_inode_by_name() and
1237 fs/ntfs/namei.c::ntfs_lookup():
1238 - Add additional argument to ntfs_lookup_inode_by_name() in which we
1239 return information about the matching file name if the case is not
1240 matching or the match is a short file name. See comments above the
1241 function definition for details.
1242 - Change ntfs_lookup() to only create dcache entries for the correctly
1243 cased file name and only for the WIN32 namespace counterpart of DOS
1244 namespace file names. This ensures we have only one dentry per
1245 directory and also removes all dcache aliasing issues between short
1246 and long file names once we add write support. See comments above
1247 function for details.
1248 - Fix potential 1 byte overflow in fs/ntfs/unistr.c::ntfs_ucstonls().
1249
12502.0.7 - Minor cleanups and updates for changes in core kernel code.
1251
1252 - Remove much of the NULL struct element initializers.
1253 - Various updates to make compatible with recent kernels.
1254 - Remove defines of MAX_BUF_PER_PAGE and include linux/buffer_head.h
1255 in fs/ntfs/ntfs.h instead.
1256 - Remove no longer needed KERNEL_VERSION checks. We are now in the
1257 kernel proper so they are no longer needed.
1258
12592.0.6 - Major bugfix to make compatible with other kernel changes.
1260
1261 - Initialize the mftbmp address space properly now that there are more
1262 fields in the struct address_space. This was leading to hangs and
1263 oopses on umount since 2.5.12 because of changes to other parts of
1264 the kernel. We probably want a kernel generic init_address_space()
1265 function...
1266 - Drop BKL from ntfs_readdir() after consultation with Al Viro. The
1267 only caller of ->readdir() is vfs_readdir() which holds i_mutex
1268 during the call, and i_mutex is sufficient protection against changes
1269 in the directory inode (including ->i_size).
1270 - Use generic_file_llseek() for directories (as opposed to
1271 default_llseek()) as this downs i_mutex instead of the BKL which is
1272 what we now need for exclusion against ->f_pos changes considering we
1273 no longer take the BKL in ntfs_readdir().
1274
12752.0.5 - Major bugfix. Buffer overflow in extent inode handling.
1276
1277 - No need to set old blocksize in super.c::ntfs_fill_super() as the
1278 VFS does so via invocation of deactivate_super() calling
1279 fs->fill_super() calling block_kill_super() which does it.
1280 - BKL moved from VFS into dir.c::ntfs_readdir(). (Linus Torvalds)
1281 -> Do we really need it? I don't think so as we have exclusion on
1282 the directory ntfs_inode rw_semaphore mrec_lock. We mmight have to
1283 move the ->f_pos accesses under the mrec_lock though. Check this...
1284 - Fix really, really, really stupid buffer overflow in extent inode
1285 handling in mft.c::map_extent_mft_record().
1286
12872.0.4 - Cleanups and updates for kernel 2.5.11.
1288
1289 - Add documentation on how to use the MD driver to be able to use NTFS
1290 stripe and volume sets in Linux and generally cleanup documentation
1291 a bit.
1292 Remove all uses of kdev_t in favour of struct block_device *:
1293 - Change compress.c::ntfs_file_read_compressed_block() to use
1294 sb_getblk() instead of getblk().
1295 - Change super.c::ntfs_fill_super() to use bdev_hardsect_size() instead
1296 of get_hardsect_size().
1297 - No need to get old blocksize in super.c::ntfs_fill_super() as
1298 fs/super.c::get_sb_bdev() already does this.
1299 - Set bh->b_bdev instead of bh->b_dev throughout aops.c.
1300
13012.0.3 - Small bug fixes, cleanups, and performance improvements.
1302
1303 - Remove some dead code from mft.c.
1304 - Optimize readpage and read_block functions throughout aops.c so that
1305 only initialized blocks are read. Non-initialized ones have their
1306 buffer head mapped, zeroed, and set up to date, without scheduling
1307 any i/o. Thanks to Al Viro for advice on how to avoid the device i/o.
1308 Thanks go to Andrew Morton for spotting the below:
1309 - Fix buglet in allocate_compression_buffers() error code path.
1310 - Call flush_dcache_page() after modifying page cache page contents in
1311 ntfs_file_readpage().
1312 - Check for existence of page buffers throughout aops.c before calling
1313 create_empty_buffers(). This happens when an I/O error occurs and the
1314 read is retried. (It also happens once writing is implemented so that
1315 needed doing anyway but I had left it for later...)
1316 - Don't BUG_ON() uptodate and/or mapped buffers throughout aops.c in
1317 readpage and read_block functions. Reasoning same as above (i.e. I/O
1318 error retries and future write code paths.)
1319
13202.0.2 - Minor updates and cleanups.
1321
1322 - Cleanup: rename mst.c::__post_read_mst_fixup to post_write_mst_fixup
1323 and cleanup the code a bit, removing the unused size parameter.
1324 - Change default fmask to 0177 and update documentation.
1325 - Change attrib.c::get_attr_search_ctx() to return the search context
1326 directly instead of taking the address of a pointer. A return value
1327 of NULL means the allocation failed. Updated all callers
1328 appropriately.
1329 - Update to 2.5.9 kernel (preserving backwards compatibility) by
1330 replacing all occurences of page->buffers with page_buffers(page).
1331 - Fix minor bugs in runlist merging, also minor cleanup.
1332 - Updates to bootsector layout and mft mirror contents descriptions.
1333 - Small bug fix in error detection in unistr.c and some cleanups.
1334 - Grow name buffer allocations in unistr.c in aligned mutlipled of 64
1335 bytes.
1336
13372.0.1 - Minor updates.
1338
1339 - Make default umask correspond to documentation.
1340 - Improve documentation.
1341 - Set default mode to include execute bit. The {u,f,d}mask can be used
1342 to take it away if desired. This allows binaries to be executed from
1343 a mounted ntfs partition.
1344
13452.0.0 - New version number. Remove TNG from the name. Now in the kernel.
1346
1347 - Add kill_super, just keeping up with the vfs changes in the kernel.
1348 - Repeat some changes from tng-0.0.8 that somehow got lost on the way
1349 from the CVS import into BitKeeper.
1350 - Begin to implement proper handling of allocated_size vs
1351 initialized_size vs data_size (i.e. i_size). Done are
1352 mft.c::ntfs_mft_readpage(), aops.c::end_buffer_read_index_async(),
1353 and attrib.c::load_attribute_list().
1354 - Lock the runlist in attrib.c::load_attribute_list() while using it.
1355 - Fix memory leak in ntfs_file_read_compressed_block() and generally
1356 clean up compress.c a little, removing some uncommented/unused debug
1357 code.
1358 - Tidy up dir.c a little bit.
1359 - Don't bother getting the runlist in inode.c::ntfs_read_inode().
1360 - Merge mft.c::ntfs_mft_readpage() and aops.c::ntfs_index_readpage()
1361 creating aops.c::ntfs_mst_readpage(), improving the handling of
1362 holes and overflow in the process and implementing the correct
1363 equivalent of ntfs_file_get_block() in ntfs_mst_readpage() itself.
1364 I am aiming for correctness at the moment. Modularisation can come
1365 later.
1366 - Rename aops.c::end_buffer_read_index_async() to
1367 end_buffer_read_mst_async() and optimize the overflow checking and
1368 handling.
1369 - Use the host of the mftbmp address space mapping to hold the ntfs
1370 volume. This is needed so the async i/o completion handler can
1371 retrieve a pointer to the volume. Hopefully this will not cause
1372 problems elsewhere in the kernel... Otherwise will need to use a
1373 fake inode.
1374 - Complete implementation of proper handling of allocated_size vs
1375 initialized_size vs data_size (i.e. i_size) in whole driver.
1376 Basically aops.c is now completely rewritten.
1377 - Change NTFS driver name to just NTFS and set version number to 2.0.0
1378 to make a clear distinction from the old driver which is still on
1379 version 1.1.22.
1380
1381tng-0.0.8 - 08/03/2002 - Now using BitKeeper, http://linux-ntfs.bkbits.net/
1382
1383 - Replace bdevname(sb->s_dev) with sb->s_id.
1384 - Remove now superfluous new-line characters in all callers of
1385 ntfs_debug().
1386 - Apply kludge in ntfs_read_inode(), setting i_nlink to 1 for
1387 directories. Without this the "find" utility gets very upset which is
1388 fair enough as Linux/Unix do not support directory hard links.
1389 - Further runlist merging work. (Richard Russon)
1390 - Backwards compatibility for gcc-2.95. (Richard Russon)
1391 - Update to kernel 2.5.5-pre1 and rediff the now tiny patch.
1392 - Convert to new filesystem declaration using ->ntfs_get_sb() and
1393 replacing ntfs_read_super() with ntfs_fill_super().
1394 - Set s_maxbytes to MAX_LFS_FILESIZE to avoid page cache page index
1395 overflow on 32-bit architectures.
1396 - Cleanup upcase loading code to use ntfs_(un)map_page().
1397 - Disable/reenable preemtion in critical sections of compession engine.
1398 - Replace device size determination in ntfs_fill_super() with
1399 sb->s_bdev->bd_inode->i_size (in bytes) and remove now superfluous
1400 function super.c::get_nr_blocks().
1401 - Implement a mount time option (show_inodes) allowing choice of which
1402 types of inode names readdir() returns and modify ntfs_filldir()
1403 accordingly. There are several parameters to show_inodes:
1404 system: system files
1405 win32: long file names (including POSIX file names) [DEFAULT]
1406 long: same as win32
1407 dos: short file names only (excluding POSIX file names)
1408 short: same as dos
1409 posix: same as both win32 and dos
1410 all: all file names
1411 Note that the options are additive, i.e. specifying:
1412 -o show_inodes=system,show_inodes=win32,show_inodes=dos
1413 is the same as specifying:
1414 -o show_inodes=all
1415 Note that the "posix" and "all" options will show all directory
1416 names, BUT the link count on each directory inode entry is set to 1,
1417 due to Linux not supporting directory hard links. This may well
1418 confuse some userspace applications, since the directory names will
1419 have the same inode numbers. Thus it is NOT advisable to use the
1420 "posix" or "all" options. We provide them only for completeness sake.
1421 - Add copies of allocated_size, initialized_size, and compressed_size to
1422 the ntfs inode structure and set them up in
1423 inode.c::ntfs_read_inode(). These reflect the unnamed data attribute
1424 for files and the index allocation attribute for directories.
1425 - Add copies of allocated_size and initialized_size to ntfs inode for
1426 $BITMAP attribute of large directories and set them up in
1427 inode.c::ntfs_read_inode().
1428 - Add copies of allocated_size and initialized_size to ntfs volume for
1429 $BITMAP attribute of $MFT and set them up in
1430 super.c::load_system_files().
1431 - Parse deprecated ntfs driver options (iocharset, show_sys_files,
1432 posix, and utf8) and tell user what the new options to use are. Note
1433 we still do support them but they will be removed with kernel 2.7.x.
1434 - Change all occurences of integer long long printf formatting to hex
1435 as printk() will not support long long integer format if/when the
1436 div64 patch goes into the kernel.
1437 - Make slab caches have stable names and change the names to what they
1438 were intended to be. These changes are required/made possible by the
1439 new slab cache name handling which removes the length limitation by
1440 requiring the caller of kmem_cache_create() to supply a stable name
1441 which is then referenced but not copied.
1442 - Rename run_list structure to run_list_element and create a new
1443 run_list structure containing a pointer to a run_list_element
1444 structure and a read/write semaphore. Adapt all users of runlists
1445 to new scheme and take and release the lock as needed. This fixes a
1446 nasty race as the run_list changes even when inodes are locked for
1447 reading and even when the inode isn't locked at all, so we really
1448 needed the serialization. We use a semaphore rather than a spinlock
1449 as memory allocations can sleep and doing everything GFP_ATOMIC
1450 would be silly.
1451 - Cleanup read_inode() removing all code checking for lowest_vcn != 0.
1452 This can never happen due to the nature of lookup_attr() and how we
1453 support attribute lists. If it did happen it would imply the inode
1454 being corrupt.
1455 - Check for lowest_vcn != 0 in ntfs_read_inode() and mark the inode as
1456 bad if found.
1457 - Update to 2.5.6-pre2 changes in struct address_space.
1458 - Use parent_ino() when accessing d_parent inode number in dir.c.
1459 - Import Sourceforge CVS repository into BitKeeper repository:
1460 http://linux-ntfs.bkbits.net/ntfs-tng-2.5
1461 - Update fs/Makefile, fs/Config.help, fs/Config.in, and
1462 Documentation/filesystems/ntfs.txt for NTFS TNG.
1463 - Create kernel configuration option controlling whether debugging
1464 is enabled or not.
1465 - Add the required export of end_buffer_io_sync() from the patches
1466 directory to the kernel code.
1467 - Update inode.c::ntfs_show_options() with show_inodes mount option.
1468 - Update errors mount option.
1469
1470tng-0.0.7 - 13/02/2002 - The driver is now feature complete for read-only!
1471
1472 - Cleanup mft.c and it's debug/error output in particular. Fix a minor
1473 bug in mapping of extent inodes. Update all the comments to fit all
1474 the recent code changes.
1475 - Modify vcn_to_lcn() to cope with entirely unmapped runlists.
1476 - Cleanups in compress.c, mostly comments and folding help.
1477 - Implement attrib.c::map_run_list() as a generic helper.
1478 - Make compress.c::ntfs_file_read_compressed_block() use map_run_list()
1479 thus making code shorter and enabling attribute list support.
1480 - Cleanup incorrect use of [su]64 with %L printf format specifier in
1481 all source files. Type casts to [unsigned] long long added to correct
1482 the mismatches (important for architectures which have long long not
1483 being 64 bits).
1484 - Merge async io completion handlers for directory indexes and $MFT
1485 data into one by setting the index_block_size{_bits} of the ntfs
1486 inode for $MFT to the mft_record_size{_bits} of the ntfs_volume.
1487 - Cleanup aops.c, update comments.
1488 - Make ntfs_file_get_block() use map_run_list() so all files now
1489 support attribute lists.
1490 - Make ntfs_dir_readpage() almost verbatim copy of
1491 block_read_full_page() by using ntfs_file_get_block() with only real
1492 difference being the use of our own async io completion handler
1493 rather than the default one, thus reducing the amount of code and
1494 automatically enabling attribute list support for directory indices.
1495 - Fix bug in load_attribute_list() - forgot to call brelse in error
1496 code path.
1497 - Change parameters to find_attr() and lookup_attr(). We no longer
1498 pass in the upcase table and its length. These can be gotten from
1499 ctx->ntfs_ino->vol->upcase{_len}. Update all callers.
1500 - Cleanups in attrib.c.
1501 - Implement merging of runlists, attrib.c::merge_run_lists() and its
1502 helpers. (Richard Russon)
1503 - Attribute lists part 2, attribute extents and multi part runlists:
1504 enable proper support for LCN_RL_NOT_MAPPED and automatic mapping of
1505 further runlist parts via attrib.c::map_run_list().
1506 - Tiny endianness bug fix in decompress_mapping_pairs().
1507
1508tng-0.0.6 - Encrypted directories, bug fixes, cleanups, debugging enhancements.
1509
1510 - Enable encrypted directories. (Their index root is marked encrypted
1511 to indicate that new files in that directory should be created
1512 encrypted.)
1513 - Fix bug in NInoBmpNonResident() macro. (Cut and paste error.)
1514 - Enable $Extend system directory. Most (if not all) extended system
1515 files do not have unnamed data attributes so ntfs_read_inode() had to
1516 special case them but that is ok, as the special casing recovery
1517 happens inside an error code path so there is zero slow down in the
1518 normal fast path. The special casing is done by introducing a new
1519 function inode.c::ntfs_is_extended_system_file() which checks if any
1520 of the hard links in the inode point to $Extend as being their parent
1521 directory and if they do we assume this is an extended system file.
1522 - Create a sysctl/proc interface to allow {dis,en}abling of debug output
1523 when compiled with -DDEBUG. Default is debug messages to be disabled.
1524 To enable them, one writes a non-zero value to /proc/sys/fs/ntfs-debug
1525 (if /proc is enabled) or uses sysctl(2) to effect the same (if sysctl
1526 interface is enabled). Inspired by old ntfs driver.
1527 - Add debug_msgs insmod/kernel boot parameter to set whether debug
1528 messages are {dis,en}abled. This is useful to enable debug messages
1529 during ntfs initialization and is the only way to activate debugging
1530 when the sysctl interface is not enabled.
1531 - Cleanup debug output in various places.
1532 - Remove all dollar signs ($) from the source (except comments) to
1533 enable compilation on architectures whose gcc compiler does not
1534 support dollar signs in the names of variables/constants. Attribute
1535 types now start with AT_ instead of $ and $I30 is now just I30.
1536 - Cleanup ntfs_lookup() and add consistency check of sequence numbers.
1537 - Load complete runlist for $MFT/$BITMAP during mount and cleanup
1538 access functions. This means we now cope with $MFT/$BITMAP being
1539 spread accross several mft records.
1540 - Disable modification of mft_zone_multiplier on remount. We can always
1541 reenable this later on if we really want to, but we will need to make
1542 sure we readjust the mft_zone size / layout accordingly.
1543
1544tng-0.0.5 - Modernize for 2.5.x and further in line-ing with Al Viro's comments.
1545
1546 - Use sb_set_blocksize() instead of set_blocksize() and verify the
1547 return value.
1548 - Use sb_bread() instead of bread() throughout.
1549 - Add index_vcn_size{_bits} to ntfs_inode structure to store the size
1550 of a directory index block vcn. Apply resulting simplifications in
1551 dir.c everywhere.
1552 - Fix a small bug somewhere (but forgot what it was).
1553 - Change ntfs_{debug,error,warning} to enable gcc to do type checking
1554 on the printf-format parameter list and fix bugs reported by gcc
1555 as a result. (Richard Russon)
1556 - Move inode allocation strategy to Al's new stuff but maintain the
1557 divorce of ntfs_inode from struct inode. To achieve this we have two
1558 separate slab caches, one for big ntfs inodes containing a struct
1559 inode and pure ntfs inodes and at the same time fix some faulty
1560 error code paths in ntfs_read_inode().
1561 - Show mount options in proc (inode.c::ntfs_show_options()).
1562
1563tng-0.0.4 - Big changes, getting in line with Al Viro's comments.
1564
1565 - Modified (un)map_mft_record functions to be common for read and write
1566 case. To specify which is which, added extra parameter at front of
1567 parameter list. Pass either READ or WRITE to this, each has the
1568 obvious meaning.
1569 - General cleanups to allow for easier folding in vi.
1570 - attrib.c::decompress_mapping_pairs() now accepts the old runlist
1571 argument, and invokes attrib.c::merge_run_lists() to merge the old
1572 and the new runlists.
1573 - Removed attrib.c::find_first_attr().
1574 - Implemented loading of attribute list and complete runlist for $MFT.
1575 This means we now cope with $MFT being spread across several mft
1576 records.
1577 - Adapt to 2.5.2-pre9 and the changed create_empty_buffers() syntax.
1578 - Adapt major/minor/kdev_t/[bk]devname stuff to new 2.5.x kernels.
1579 - Make ntfs_volume be allocated via kmalloc() instead of using a slab
1580 cache. There are too little ntfs_volume structures at any one time
1581 to justify a private slab cache.
1582 - Fix bogus kmap() use in async io completion. Now use kmap_atomic().
1583 Use KM_BIO_IRQ on advice from IRC/kernel...
1584 - Use ntfs_map_page() in map_mft_record() and create ->readpage method
1585 for reading $MFT (ntfs_mft_readpage). In the process create dedicated
1586 address space operations (ntfs_mft_aops) for $MFT inode mapping. Also
1587 removed the now superfluous exports from the kernel core patch.
1588 - Fix a bug where kfree() was used instead of ntfs_free().
1589 - Change map_mft_record() to take ntfs_inode as argument instead of
1590 vfs inode. Dito for unmap_mft_record(). Adapt all callers.
1591 - Add pointer to ntfs_volume to ntfs_inode.
1592 - Add mft record number and sequence number to ntfs_inode. Stop using
1593 i_ino and i_generation for in-driver purposes.
1594 - Implement attrib.c::merge_run_lists(). (Richard Russon)
1595 - Remove use of proper inodes by extent inodes. Move i_ino and
1596 i_generation to ntfs_inode to do this. Apply simplifications that
1597 result and remove iget_no_wait(), etc.
1598 - Pass ntfs_inode everywhere in the driver (used to be struct inode).
1599 - Add reference counting in ntfs_inode for the ntfs inode itself and
1600 for the mapped mft record.
1601 - Extend mft record mapping so we can (un)map extent mft records (new
1602 functions (un)map_extent_mft_record), and so mappings are reference
1603 counted and don't have to happen twice if already mapped - just ref
1604 count increases.
1605 - Add -o iocharset as alias to -o nls for backwards compatibility.
1606 - The latest core patch is now tiny. In fact just a single additional
1607 export is necessary over the base kernel.
1608
1609tng-0.0.3 - Cleanups, enhancements, bug fixes.
1610
1611 - Work on attrib.c::decompress_mapping_pairs() to detect base extents
1612 and setup the runlist appropriately using knowledge provided by the
1613 sizes in the base attribute record.
1614 - Balance the get_/put_attr_search_ctx() calls so we don't leak memory
1615 any more.
1616 - Introduce ntfs_malloc_nofs() and ntfs_free() to allocate/free a single
1617 page or use vmalloc depending on the amount of memory requested.
1618 - Cleanup error output. The __FUNCTION__ "(): " is now added
1619 automatically. Introduced a new header file debug.h to support this
1620 and also moved ntfs_debug() function into it.
1621 - Make reading of compressed files more intelligent and especially get
1622 rid of the vmalloc_nofs() from readpage(). This now uses per CPU
1623 buffers (allocated at first mount with cluster size <= 4kiB and
1624 deallocated on last umount with cluster size <= 4kiB), and
1625 asynchronous io for the compressed data using a list of buffer heads.
1626 Er, we use synchronous io as async io only works on whole pages
1627 covered by buffers and not on individual buffer heads...
1628 - Bug fix for reading compressed files with sparse compression blocks.
1629
1630tng-0.0.2 - Now handles larger/fragmented/compressed volumes/files/dirs.
1631
1632 - Fixed handling of directories when cluster size exceeds index block
1633 size.
1634 - Hide DOS only name space directory entries from readdir() but allow
1635 them in lookup(). This should fix the problem that Linux doesn't
1636 support directory hard links, while still allowing access to entries
1637 via their short file name. This also has the benefit of mimicking
1638 what Windows users are used to, so it is the ideal solution.
1639 - Implemented sync_page everywhere so no more hangs in D state when
1640 waiting for a page.
1641 - Stop using bforget() in favour of brelse().
1642 - Stop locking buffers unnecessarily.
1643 - Implemented compressed files (inode->mapping contains uncompressed
1644 data, raw compressed data is currently bread() into a vmalloc()ed
1645 memory buffer).
1646 - Enable compressed directories. (Their index root is marked compressed
1647 to indicate that new files in that directory should be created
1648 compressed.)
1649 - Use vsnprintf rather than vsprintf in the ntfs_error and ntfs_warning
1650 functions. (Thanks to Will Dyson for pointing this out.)
1651 - Moved the ntfs_inode and ntfs_volume (the former ntfs_inode_info and
1652 ntfs_sb_info) out of the common inode and super_block structures and
1653 started using the generic_ip and generic_sbp pointers instead. This
1654 makes ntfs entirely private with respect to the kernel tree.
1655 - Detect compiler version and abort with error message if gcc less than
1656 2.96 is used.
1657 - Fix bug in name comparison function in unistr.c.
1658 - Implement attribute lists part 1, the infrastructure: search contexts
1659 and operations, find_external_attr(), lookup_attr()) and make the
1660 code use the infrastructure.
1661 - Fix stupid buffer overflow bug that became apparent on larger run
1662 list containing attributes.
1663 - Fix bugs in readdir() that became apparent on larger directories.
1664
1665 The driver is now really useful and survives the test
1666 find . -type f -exec md5sum "{}" \;
1667 without any error messages on a over 1GiB sized partition with >16k
1668 files on it, including compressed files and directories and many files
1669 and directories with attribute lists.
1670
1671tng-0.0.1 - The first useful version.
1672
1673 - Added ntfs_lookup().
1674 - Added default upcase generation and handling.
1675 - Added compile options to be shown on module init.
1676 - Many bug fixes that were "hidden" before.
1677 - Update to latest kernel.
1678 - Added ntfs_readdir().
1679 - Added file operations for mmap(), read(), open() and llseek(). We just
1680 use the generic ones. The whole point of going through implementing
1681 readpage() methods and where possible get_block() call backs is that
1682 this allows us to make use of the generic high level methods provided
1683 by the kernel.
1684
1685 The driver is now actually useful! Yey. (-: It undoubtedly has got bugs
1686 though and it doesn't implement accesssing compressed files yet. Also,
1687 accessing files with attribute list attributes is not implemented yet
1688 either. But for small or simple filesystems it should work and allow
1689 you to list directories, use stat on directory entries and the file
1690 system, open, read, mmap and llseek around in files. A big mile stone
1691 has been reached!
1692
1693tng-0.0.0 - Initial version tag.
1694
1695 Initial driver implementation. The driver can mount and umount simple
1696 NTFS filesystems (i.e. ones without attribute lists in the system
1697 files). If the mount fails there might be problems in the error handling
1698 code paths, so be warned. Otherwise it seems to be loading the system
1699 files nicely and the mft record read mapping/unmapping seems to be
1700 working nicely, too. Proof of inode metadata in the page cache and non-
1701 resident file unnamed stream data in the page cache concepts is thus
1702 complete.
diff --git a/fs/ocfs2/cluster/masklog.c b/fs/ocfs2/cluster/masklog.c
index b39da877b12f..3bb928a2bf7d 100644
--- a/fs/ocfs2/cluster/masklog.c
+++ b/fs/ocfs2/cluster/masklog.c
@@ -136,7 +136,7 @@ static ssize_t mlog_store(struct kobject *obj, struct attribute *attr,
136 return mlog_mask_store(mlog_attr->mask, buf, count); 136 return mlog_mask_store(mlog_attr->mask, buf, count);
137} 137}
138 138
139static struct sysfs_ops mlog_attr_ops = { 139static const struct sysfs_ops mlog_attr_ops = {
140 .show = mlog_show, 140 .show = mlog_show,
141 .store = mlog_store, 141 .store = mlog_store,
142}; 142};
diff --git a/fs/ocfs2/cluster/tcp.c b/fs/ocfs2/cluster/tcp.c
index d8d0c65ac03c..73e743eea2c8 100644
--- a/fs/ocfs2/cluster/tcp.c
+++ b/fs/ocfs2/cluster/tcp.c
@@ -72,9 +72,9 @@
72 72
73#include "tcp_internal.h" 73#include "tcp_internal.h"
74 74
75#define SC_NODEF_FMT "node %s (num %u) at %u.%u.%u.%u:%u" 75#define SC_NODEF_FMT "node %s (num %u) at %pI4:%u"
76#define SC_NODEF_ARGS(sc) sc->sc_node->nd_name, sc->sc_node->nd_num, \ 76#define SC_NODEF_ARGS(sc) sc->sc_node->nd_name, sc->sc_node->nd_num, \
77 NIPQUAD(sc->sc_node->nd_ipv4_address), \ 77 &sc->sc_node->nd_ipv4_address, \
78 ntohs(sc->sc_node->nd_ipv4_port) 78 ntohs(sc->sc_node->nd_ipv4_port)
79 79
80/* 80/*
diff --git a/fs/ocfs2/dlmglue.c b/fs/ocfs2/dlmglue.c
index 8298608d4165..50c4ee805da4 100644
--- a/fs/ocfs2/dlmglue.c
+++ b/fs/ocfs2/dlmglue.c
@@ -1881,7 +1881,7 @@ out:
1881 * ocfs2_file_lock() and ocfs2_file_unlock() map to a single pair of 1881 * ocfs2_file_lock() and ocfs2_file_unlock() map to a single pair of
1882 * flock() calls. The locking approach this requires is sufficiently 1882 * flock() calls. The locking approach this requires is sufficiently
1883 * different from all other cluster lock types that we implement a 1883 * different from all other cluster lock types that we implement a
1884 * seperate path to the "low-level" dlm calls. In particular: 1884 * separate path to the "low-level" dlm calls. In particular:
1885 * 1885 *
1886 * - No optimization of lock levels is done - we take at exactly 1886 * - No optimization of lock levels is done - we take at exactly
1887 * what's been requested. 1887 * what's been requested.
diff --git a/fs/ocfs2/extent_map.c b/fs/ocfs2/extent_map.c
index 5328529e7fd2..c562a7581cf9 100644
--- a/fs/ocfs2/extent_map.c
+++ b/fs/ocfs2/extent_map.c
@@ -453,7 +453,7 @@ static int ocfs2_get_clusters_nocache(struct inode *inode,
453 if (i == -1) { 453 if (i == -1) {
454 /* 454 /*
455 * Holes can be larger than the maximum size of an 455 * Holes can be larger than the maximum size of an
456 * extent, so we return their lengths in a seperate 456 * extent, so we return their lengths in a separate
457 * field. 457 * field.
458 */ 458 */
459 if (hole_len) { 459 if (hole_len) {
diff --git a/fs/qnx4/inode.c b/fs/qnx4/inode.c
index ebf3440d28ca..277575ddc05c 100644
--- a/fs/qnx4/inode.c
+++ b/fs/qnx4/inode.c
@@ -201,7 +201,8 @@ static const char *qnx4_checkroot(struct super_block *sb)
201 rootdir = (struct qnx4_inode_entry *) (bh->b_data + i * QNX4_DIR_ENTRY_SIZE); 201 rootdir = (struct qnx4_inode_entry *) (bh->b_data + i * QNX4_DIR_ENTRY_SIZE);
202 if (rootdir->di_fname != NULL) { 202 if (rootdir->di_fname != NULL) {
203 QNX4DEBUG((KERN_INFO "rootdir entry found : [%s]\n", rootdir->di_fname)); 203 QNX4DEBUG((KERN_INFO "rootdir entry found : [%s]\n", rootdir->di_fname));
204 if (!strncmp(rootdir->di_fname, QNX4_BMNAME, sizeof QNX4_BMNAME)) { 204 if (!strcmp(rootdir->di_fname,
205 QNX4_BMNAME)) {
205 found = 1; 206 found = 1;
206 qnx4_sb(sb)->BitMap = kmalloc( sizeof( struct qnx4_inode_entry ), GFP_KERNEL ); 207 qnx4_sb(sb)->BitMap = kmalloc( sizeof( struct qnx4_inode_entry ), GFP_KERNEL );
207 if (!qnx4_sb(sb)->BitMap) { 208 if (!qnx4_sb(sb)->BitMap) {
diff --git a/fs/reiserfs/bitmap.c b/fs/reiserfs/bitmap.c
index dc014f7def05..483442e66ed6 100644
--- a/fs/reiserfs/bitmap.c
+++ b/fs/reiserfs/bitmap.c
@@ -169,7 +169,7 @@ static int scan_bitmap_block(struct reiserfs_transaction_handle *th,
169 return 0; // No free blocks in this bitmap 169 return 0; // No free blocks in this bitmap
170 } 170 }
171 171
172 /* search for a first zero bit -- beggining of a window */ 172 /* search for a first zero bit -- beginning of a window */
173 *beg = reiserfs_find_next_zero_le_bit 173 *beg = reiserfs_find_next_zero_le_bit
174 ((unsigned long *)(bh->b_data), boundary, *beg); 174 ((unsigned long *)(bh->b_data), boundary, *beg);
175 175
diff --git a/fs/select.c b/fs/select.c
index 73715e90030f..500a669f7790 100644
--- a/fs/select.c
+++ b/fs/select.c
@@ -691,6 +691,23 @@ SYSCALL_DEFINE6(pselect6, int, n, fd_set __user *, inp, fd_set __user *, outp,
691} 691}
692#endif /* HAVE_SET_RESTORE_SIGMASK */ 692#endif /* HAVE_SET_RESTORE_SIGMASK */
693 693
694#ifdef __ARCH_WANT_SYS_OLD_SELECT
695struct sel_arg_struct {
696 unsigned long n;
697 fd_set __user *inp, *outp, *exp;
698 struct timeval __user *tvp;
699};
700
701SYSCALL_DEFINE1(old_select, struct sel_arg_struct __user *, arg)
702{
703 struct sel_arg_struct a;
704
705 if (copy_from_user(&a, arg, sizeof(a)))
706 return -EFAULT;
707 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
708}
709#endif
710
694struct poll_list { 711struct poll_list {
695 struct poll_list *next; 712 struct poll_list *next;
696 int len; 713 int len;
diff --git a/fs/sysfs/bin.c b/fs/sysfs/bin.c
index a0a500af24a1..e9d293593e52 100644
--- a/fs/sysfs/bin.c
+++ b/fs/sysfs/bin.c
@@ -54,14 +54,14 @@ fill_read(struct dentry *dentry, char *buffer, loff_t off, size_t count)
54 int rc; 54 int rc;
55 55
56 /* need attr_sd for attr, its parent for kobj */ 56 /* need attr_sd for attr, its parent for kobj */
57 if (!sysfs_get_active_two(attr_sd)) 57 if (!sysfs_get_active(attr_sd))
58 return -ENODEV; 58 return -ENODEV;
59 59
60 rc = -EIO; 60 rc = -EIO;
61 if (attr->read) 61 if (attr->read)
62 rc = attr->read(kobj, attr, buffer, off, count); 62 rc = attr->read(kobj, attr, buffer, off, count);
63 63
64 sysfs_put_active_two(attr_sd); 64 sysfs_put_active(attr_sd);
65 65
66 return rc; 66 return rc;
67} 67}
@@ -125,14 +125,14 @@ flush_write(struct dentry *dentry, char *buffer, loff_t offset, size_t count)
125 int rc; 125 int rc;
126 126
127 /* need attr_sd for attr, its parent for kobj */ 127 /* need attr_sd for attr, its parent for kobj */
128 if (!sysfs_get_active_two(attr_sd)) 128 if (!sysfs_get_active(attr_sd))
129 return -ENODEV; 129 return -ENODEV;
130 130
131 rc = -EIO; 131 rc = -EIO;
132 if (attr->write) 132 if (attr->write)
133 rc = attr->write(kobj, attr, buffer, offset, count); 133 rc = attr->write(kobj, attr, buffer, offset, count);
134 134
135 sysfs_put_active_two(attr_sd); 135 sysfs_put_active(attr_sd);
136 136
137 return rc; 137 return rc;
138} 138}
@@ -184,12 +184,12 @@ static void bin_vma_open(struct vm_area_struct *vma)
184 if (!bb->vm_ops || !bb->vm_ops->open) 184 if (!bb->vm_ops || !bb->vm_ops->open)
185 return; 185 return;
186 186
187 if (!sysfs_get_active_two(attr_sd)) 187 if (!sysfs_get_active(attr_sd))
188 return; 188 return;
189 189
190 bb->vm_ops->open(vma); 190 bb->vm_ops->open(vma);
191 191
192 sysfs_put_active_two(attr_sd); 192 sysfs_put_active(attr_sd);
193} 193}
194 194
195static void bin_vma_close(struct vm_area_struct *vma) 195static void bin_vma_close(struct vm_area_struct *vma)
@@ -201,12 +201,12 @@ static void bin_vma_close(struct vm_area_struct *vma)
201 if (!bb->vm_ops || !bb->vm_ops->close) 201 if (!bb->vm_ops || !bb->vm_ops->close)
202 return; 202 return;
203 203
204 if (!sysfs_get_active_two(attr_sd)) 204 if (!sysfs_get_active(attr_sd))
205 return; 205 return;
206 206
207 bb->vm_ops->close(vma); 207 bb->vm_ops->close(vma);
208 208
209 sysfs_put_active_two(attr_sd); 209 sysfs_put_active(attr_sd);
210} 210}
211 211
212static int bin_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 212static int bin_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
@@ -219,12 +219,12 @@ static int bin_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
219 if (!bb->vm_ops || !bb->vm_ops->fault) 219 if (!bb->vm_ops || !bb->vm_ops->fault)
220 return VM_FAULT_SIGBUS; 220 return VM_FAULT_SIGBUS;
221 221
222 if (!sysfs_get_active_two(attr_sd)) 222 if (!sysfs_get_active(attr_sd))
223 return VM_FAULT_SIGBUS; 223 return VM_FAULT_SIGBUS;
224 224
225 ret = bb->vm_ops->fault(vma, vmf); 225 ret = bb->vm_ops->fault(vma, vmf);
226 226
227 sysfs_put_active_two(attr_sd); 227 sysfs_put_active(attr_sd);
228 return ret; 228 return ret;
229} 229}
230 230
@@ -241,12 +241,12 @@ static int bin_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf)
241 if (!bb->vm_ops->page_mkwrite) 241 if (!bb->vm_ops->page_mkwrite)
242 return 0; 242 return 0;
243 243
244 if (!sysfs_get_active_two(attr_sd)) 244 if (!sysfs_get_active(attr_sd))
245 return VM_FAULT_SIGBUS; 245 return VM_FAULT_SIGBUS;
246 246
247 ret = bb->vm_ops->page_mkwrite(vma, vmf); 247 ret = bb->vm_ops->page_mkwrite(vma, vmf);
248 248
249 sysfs_put_active_two(attr_sd); 249 sysfs_put_active(attr_sd);
250 return ret; 250 return ret;
251} 251}
252 252
@@ -261,12 +261,12 @@ static int bin_access(struct vm_area_struct *vma, unsigned long addr,
261 if (!bb->vm_ops || !bb->vm_ops->access) 261 if (!bb->vm_ops || !bb->vm_ops->access)
262 return -EINVAL; 262 return -EINVAL;
263 263
264 if (!sysfs_get_active_two(attr_sd)) 264 if (!sysfs_get_active(attr_sd))
265 return -EINVAL; 265 return -EINVAL;
266 266
267 ret = bb->vm_ops->access(vma, addr, buf, len, write); 267 ret = bb->vm_ops->access(vma, addr, buf, len, write);
268 268
269 sysfs_put_active_two(attr_sd); 269 sysfs_put_active(attr_sd);
270 return ret; 270 return ret;
271} 271}
272 272
@@ -281,12 +281,12 @@ static int bin_set_policy(struct vm_area_struct *vma, struct mempolicy *new)
281 if (!bb->vm_ops || !bb->vm_ops->set_policy) 281 if (!bb->vm_ops || !bb->vm_ops->set_policy)
282 return 0; 282 return 0;
283 283
284 if (!sysfs_get_active_two(attr_sd)) 284 if (!sysfs_get_active(attr_sd))
285 return -EINVAL; 285 return -EINVAL;
286 286
287 ret = bb->vm_ops->set_policy(vma, new); 287 ret = bb->vm_ops->set_policy(vma, new);
288 288
289 sysfs_put_active_two(attr_sd); 289 sysfs_put_active(attr_sd);
290 return ret; 290 return ret;
291} 291}
292 292
@@ -301,12 +301,12 @@ static struct mempolicy *bin_get_policy(struct vm_area_struct *vma,
301 if (!bb->vm_ops || !bb->vm_ops->get_policy) 301 if (!bb->vm_ops || !bb->vm_ops->get_policy)
302 return vma->vm_policy; 302 return vma->vm_policy;
303 303
304 if (!sysfs_get_active_two(attr_sd)) 304 if (!sysfs_get_active(attr_sd))
305 return vma->vm_policy; 305 return vma->vm_policy;
306 306
307 pol = bb->vm_ops->get_policy(vma, addr); 307 pol = bb->vm_ops->get_policy(vma, addr);
308 308
309 sysfs_put_active_two(attr_sd); 309 sysfs_put_active(attr_sd);
310 return pol; 310 return pol;
311} 311}
312 312
@@ -321,12 +321,12 @@ static int bin_migrate(struct vm_area_struct *vma, const nodemask_t *from,
321 if (!bb->vm_ops || !bb->vm_ops->migrate) 321 if (!bb->vm_ops || !bb->vm_ops->migrate)
322 return 0; 322 return 0;
323 323
324 if (!sysfs_get_active_two(attr_sd)) 324 if (!sysfs_get_active(attr_sd))
325 return 0; 325 return 0;
326 326
327 ret = bb->vm_ops->migrate(vma, from, to, flags); 327 ret = bb->vm_ops->migrate(vma, from, to, flags);
328 328
329 sysfs_put_active_two(attr_sd); 329 sysfs_put_active(attr_sd);
330 return ret; 330 return ret;
331} 331}
332#endif 332#endif
@@ -356,7 +356,7 @@ static int mmap(struct file *file, struct vm_area_struct *vma)
356 356
357 /* need attr_sd for attr, its parent for kobj */ 357 /* need attr_sd for attr, its parent for kobj */
358 rc = -ENODEV; 358 rc = -ENODEV;
359 if (!sysfs_get_active_two(attr_sd)) 359 if (!sysfs_get_active(attr_sd))
360 goto out_unlock; 360 goto out_unlock;
361 361
362 rc = -EINVAL; 362 rc = -EINVAL;
@@ -384,7 +384,7 @@ static int mmap(struct file *file, struct vm_area_struct *vma)
384 bb->vm_ops = vma->vm_ops; 384 bb->vm_ops = vma->vm_ops;
385 vma->vm_ops = &bin_vm_ops; 385 vma->vm_ops = &bin_vm_ops;
386out_put: 386out_put:
387 sysfs_put_active_two(attr_sd); 387 sysfs_put_active(attr_sd);
388out_unlock: 388out_unlock:
389 mutex_unlock(&bb->mutex); 389 mutex_unlock(&bb->mutex);
390 390
@@ -399,7 +399,7 @@ static int open(struct inode * inode, struct file * file)
399 int error; 399 int error;
400 400
401 /* binary file operations requires both @sd and its parent */ 401 /* binary file operations requires both @sd and its parent */
402 if (!sysfs_get_active_two(attr_sd)) 402 if (!sysfs_get_active(attr_sd))
403 return -ENODEV; 403 return -ENODEV;
404 404
405 error = -EACCES; 405 error = -EACCES;
@@ -426,11 +426,11 @@ static int open(struct inode * inode, struct file * file)
426 mutex_unlock(&sysfs_bin_lock); 426 mutex_unlock(&sysfs_bin_lock);
427 427
428 /* open succeeded, put active references */ 428 /* open succeeded, put active references */
429 sysfs_put_active_two(attr_sd); 429 sysfs_put_active(attr_sd);
430 return 0; 430 return 0;
431 431
432 err_out: 432 err_out:
433 sysfs_put_active_two(attr_sd); 433 sysfs_put_active(attr_sd);
434 kfree(bb); 434 kfree(bb);
435 return error; 435 return error;
436} 436}
diff --git a/fs/sysfs/dir.c b/fs/sysfs/dir.c
index 699f371b9f12..590717861c7a 100644
--- a/fs/sysfs/dir.c
+++ b/fs/sysfs/dir.c
@@ -93,7 +93,7 @@ static void sysfs_unlink_sibling(struct sysfs_dirent *sd)
93 * RETURNS: 93 * RETURNS:
94 * Pointer to @sd on success, NULL on failure. 94 * Pointer to @sd on success, NULL on failure.
95 */ 95 */
96static struct sysfs_dirent *sysfs_get_active(struct sysfs_dirent *sd) 96struct sysfs_dirent *sysfs_get_active(struct sysfs_dirent *sd)
97{ 97{
98 if (unlikely(!sd)) 98 if (unlikely(!sd))
99 return NULL; 99 return NULL;
@@ -124,7 +124,7 @@ static struct sysfs_dirent *sysfs_get_active(struct sysfs_dirent *sd)
124 * Put an active reference to @sd. This function is noop if @sd 124 * Put an active reference to @sd. This function is noop if @sd
125 * is NULL. 125 * is NULL.
126 */ 126 */
127static void sysfs_put_active(struct sysfs_dirent *sd) 127void sysfs_put_active(struct sysfs_dirent *sd)
128{ 128{
129 struct completion *cmpl; 129 struct completion *cmpl;
130 int v; 130 int v;
@@ -145,45 +145,6 @@ static void sysfs_put_active(struct sysfs_dirent *sd)
145} 145}
146 146
147/** 147/**
148 * sysfs_get_active_two - get active references to sysfs_dirent and parent
149 * @sd: sysfs_dirent of interest
150 *
151 * Get active reference to @sd and its parent. Parent's active
152 * reference is grabbed first. This function is noop if @sd is
153 * NULL.
154 *
155 * RETURNS:
156 * Pointer to @sd on success, NULL on failure.
157 */
158struct sysfs_dirent *sysfs_get_active_two(struct sysfs_dirent *sd)
159{
160 if (sd) {
161 if (sd->s_parent && unlikely(!sysfs_get_active(sd->s_parent)))
162 return NULL;
163 if (unlikely(!sysfs_get_active(sd))) {
164 sysfs_put_active(sd->s_parent);
165 return NULL;
166 }
167 }
168 return sd;
169}
170
171/**
172 * sysfs_put_active_two - put active references to sysfs_dirent and parent
173 * @sd: sysfs_dirent of interest
174 *
175 * Put active references to @sd and its parent. This function is
176 * noop if @sd is NULL.
177 */
178void sysfs_put_active_two(struct sysfs_dirent *sd)
179{
180 if (sd) {
181 sysfs_put_active(sd);
182 sysfs_put_active(sd->s_parent);
183 }
184}
185
186/**
187 * sysfs_deactivate - deactivate sysfs_dirent 148 * sysfs_deactivate - deactivate sysfs_dirent
188 * @sd: sysfs_dirent to deactivate 149 * @sd: sysfs_dirent to deactivate
189 * 150 *
@@ -195,6 +156,10 @@ static void sysfs_deactivate(struct sysfs_dirent *sd)
195 int v; 156 int v;
196 157
197 BUG_ON(sd->s_sibling || !(sd->s_flags & SYSFS_FLAG_REMOVED)); 158 BUG_ON(sd->s_sibling || !(sd->s_flags & SYSFS_FLAG_REMOVED));
159
160 if (!(sysfs_type(sd) & SYSFS_ACTIVE_REF))
161 return;
162
198 sd->s_sibling = (void *)&wait; 163 sd->s_sibling = (void *)&wait;
199 164
200 rwsem_acquire(&sd->dep_map, 0, 0, _RET_IP_); 165 rwsem_acquire(&sd->dep_map, 0, 0, _RET_IP_);
@@ -354,7 +319,6 @@ struct sysfs_dirent *sysfs_new_dirent(const char *name, umode_t mode, int type)
354 319
355 atomic_set(&sd->s_count, 1); 320 atomic_set(&sd->s_count, 1);
356 atomic_set(&sd->s_active, 0); 321 atomic_set(&sd->s_active, 0);
357 sysfs_dirent_init_lockdep(sd);
358 322
359 sd->s_name = name; 323 sd->s_name = name;
360 sd->s_mode = mode; 324 sd->s_mode = mode;
@@ -681,7 +645,7 @@ static struct dentry * sysfs_lookup(struct inode *dir, struct dentry *dentry,
681 } 645 }
682 646
683 /* attach dentry and inode */ 647 /* attach dentry and inode */
684 inode = sysfs_get_inode(sd); 648 inode = sysfs_get_inode(dir->i_sb, sd);
685 if (!inode) { 649 if (!inode) {
686 ret = ERR_PTR(-ENOMEM); 650 ret = ERR_PTR(-ENOMEM);
687 goto out_unlock; 651 goto out_unlock;
@@ -837,11 +801,46 @@ static inline unsigned char dt_type(struct sysfs_dirent *sd)
837 return (sd->s_mode >> 12) & 15; 801 return (sd->s_mode >> 12) & 15;
838} 802}
839 803
804static int sysfs_dir_release(struct inode *inode, struct file *filp)
805{
806 sysfs_put(filp->private_data);
807 return 0;
808}
809
810static struct sysfs_dirent *sysfs_dir_pos(struct sysfs_dirent *parent_sd,
811 ino_t ino, struct sysfs_dirent *pos)
812{
813 if (pos) {
814 int valid = !(pos->s_flags & SYSFS_FLAG_REMOVED) &&
815 pos->s_parent == parent_sd &&
816 ino == pos->s_ino;
817 sysfs_put(pos);
818 if (valid)
819 return pos;
820 }
821 pos = NULL;
822 if ((ino > 1) && (ino < INT_MAX)) {
823 pos = parent_sd->s_dir.children;
824 while (pos && (ino > pos->s_ino))
825 pos = pos->s_sibling;
826 }
827 return pos;
828}
829
830static struct sysfs_dirent *sysfs_dir_next_pos(struct sysfs_dirent *parent_sd,
831 ino_t ino, struct sysfs_dirent *pos)
832{
833 pos = sysfs_dir_pos(parent_sd, ino, pos);
834 if (pos)
835 pos = pos->s_sibling;
836 return pos;
837}
838
840static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) 839static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir)
841{ 840{
842 struct dentry *dentry = filp->f_path.dentry; 841 struct dentry *dentry = filp->f_path.dentry;
843 struct sysfs_dirent * parent_sd = dentry->d_fsdata; 842 struct sysfs_dirent * parent_sd = dentry->d_fsdata;
844 struct sysfs_dirent *pos; 843 struct sysfs_dirent *pos = filp->private_data;
845 ino_t ino; 844 ino_t ino;
846 845
847 if (filp->f_pos == 0) { 846 if (filp->f_pos == 0) {
@@ -857,29 +856,31 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir)
857 if (filldir(dirent, "..", 2, filp->f_pos, ino, DT_DIR) == 0) 856 if (filldir(dirent, "..", 2, filp->f_pos, ino, DT_DIR) == 0)
858 filp->f_pos++; 857 filp->f_pos++;
859 } 858 }
860 if ((filp->f_pos > 1) && (filp->f_pos < INT_MAX)) { 859 mutex_lock(&sysfs_mutex);
861 mutex_lock(&sysfs_mutex); 860 for (pos = sysfs_dir_pos(parent_sd, filp->f_pos, pos);
862 861 pos;
863 /* Skip the dentries we have already reported */ 862 pos = sysfs_dir_next_pos(parent_sd, filp->f_pos, pos)) {
864 pos = parent_sd->s_dir.children; 863 const char * name;
865 while (pos && (filp->f_pos > pos->s_ino)) 864 unsigned int type;
866 pos = pos->s_sibling; 865 int len, ret;
867 866
868 for ( ; pos; pos = pos->s_sibling) { 867 name = pos->s_name;
869 const char * name; 868 len = strlen(name);
870 int len; 869 ino = pos->s_ino;
871 870 type = dt_type(pos);
872 name = pos->s_name; 871 filp->f_pos = ino;
873 len = strlen(name); 872 filp->private_data = sysfs_get(pos);
874 filp->f_pos = ino = pos->s_ino;
875 873
876 if (filldir(dirent, name, len, filp->f_pos, ino,
877 dt_type(pos)) < 0)
878 break;
879 }
880 if (!pos)
881 filp->f_pos = INT_MAX;
882 mutex_unlock(&sysfs_mutex); 874 mutex_unlock(&sysfs_mutex);
875 ret = filldir(dirent, name, len, filp->f_pos, ino, type);
876 mutex_lock(&sysfs_mutex);
877 if (ret < 0)
878 break;
879 }
880 mutex_unlock(&sysfs_mutex);
881 if ((filp->f_pos > 1) && !pos) { /* EOF */
882 filp->f_pos = INT_MAX;
883 filp->private_data = NULL;
883 } 884 }
884 return 0; 885 return 0;
885} 886}
@@ -888,5 +889,6 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir)
888const struct file_operations sysfs_dir_operations = { 889const struct file_operations sysfs_dir_operations = {
889 .read = generic_read_dir, 890 .read = generic_read_dir,
890 .readdir = sysfs_readdir, 891 .readdir = sysfs_readdir,
892 .release = sysfs_dir_release,
891 .llseek = generic_file_llseek, 893 .llseek = generic_file_llseek,
892}; 894};
diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c
index dc30d9e31683..e222b2582746 100644
--- a/fs/sysfs/file.c
+++ b/fs/sysfs/file.c
@@ -53,7 +53,7 @@ struct sysfs_buffer {
53 size_t count; 53 size_t count;
54 loff_t pos; 54 loff_t pos;
55 char * page; 55 char * page;
56 struct sysfs_ops * ops; 56 const struct sysfs_ops * ops;
57 struct mutex mutex; 57 struct mutex mutex;
58 int needs_read_fill; 58 int needs_read_fill;
59 int event; 59 int event;
@@ -75,7 +75,7 @@ static int fill_read_buffer(struct dentry * dentry, struct sysfs_buffer * buffer
75{ 75{
76 struct sysfs_dirent *attr_sd = dentry->d_fsdata; 76 struct sysfs_dirent *attr_sd = dentry->d_fsdata;
77 struct kobject *kobj = attr_sd->s_parent->s_dir.kobj; 77 struct kobject *kobj = attr_sd->s_parent->s_dir.kobj;
78 struct sysfs_ops * ops = buffer->ops; 78 const struct sysfs_ops * ops = buffer->ops;
79 int ret = 0; 79 int ret = 0;
80 ssize_t count; 80 ssize_t count;
81 81
@@ -85,13 +85,13 @@ static int fill_read_buffer(struct dentry * dentry, struct sysfs_buffer * buffer
85 return -ENOMEM; 85 return -ENOMEM;
86 86
87 /* need attr_sd for attr and ops, its parent for kobj */ 87 /* need attr_sd for attr and ops, its parent for kobj */
88 if (!sysfs_get_active_two(attr_sd)) 88 if (!sysfs_get_active(attr_sd))
89 return -ENODEV; 89 return -ENODEV;
90 90
91 buffer->event = atomic_read(&attr_sd->s_attr.open->event); 91 buffer->event = atomic_read(&attr_sd->s_attr.open->event);
92 count = ops->show(kobj, attr_sd->s_attr.attr, buffer->page); 92 count = ops->show(kobj, attr_sd->s_attr.attr, buffer->page);
93 93
94 sysfs_put_active_two(attr_sd); 94 sysfs_put_active(attr_sd);
95 95
96 /* 96 /*
97 * The code works fine with PAGE_SIZE return but it's likely to 97 * The code works fine with PAGE_SIZE return but it's likely to
@@ -199,16 +199,16 @@ flush_write_buffer(struct dentry * dentry, struct sysfs_buffer * buffer, size_t
199{ 199{
200 struct sysfs_dirent *attr_sd = dentry->d_fsdata; 200 struct sysfs_dirent *attr_sd = dentry->d_fsdata;
201 struct kobject *kobj = attr_sd->s_parent->s_dir.kobj; 201 struct kobject *kobj = attr_sd->s_parent->s_dir.kobj;
202 struct sysfs_ops * ops = buffer->ops; 202 const struct sysfs_ops * ops = buffer->ops;
203 int rc; 203 int rc;
204 204
205 /* need attr_sd for attr and ops, its parent for kobj */ 205 /* need attr_sd for attr and ops, its parent for kobj */
206 if (!sysfs_get_active_two(attr_sd)) 206 if (!sysfs_get_active(attr_sd))
207 return -ENODEV; 207 return -ENODEV;
208 208
209 rc = ops->store(kobj, attr_sd->s_attr.attr, buffer->page, count); 209 rc = ops->store(kobj, attr_sd->s_attr.attr, buffer->page, count);
210 210
211 sysfs_put_active_two(attr_sd); 211 sysfs_put_active(attr_sd);
212 212
213 return rc; 213 return rc;
214} 214}
@@ -335,7 +335,7 @@ static int sysfs_open_file(struct inode *inode, struct file *file)
335 struct sysfs_dirent *attr_sd = file->f_path.dentry->d_fsdata; 335 struct sysfs_dirent *attr_sd = file->f_path.dentry->d_fsdata;
336 struct kobject *kobj = attr_sd->s_parent->s_dir.kobj; 336 struct kobject *kobj = attr_sd->s_parent->s_dir.kobj;
337 struct sysfs_buffer *buffer; 337 struct sysfs_buffer *buffer;
338 struct sysfs_ops *ops; 338 const struct sysfs_ops *ops;
339 int error = -EACCES; 339 int error = -EACCES;
340 char *p; 340 char *p;
341 341
@@ -344,7 +344,7 @@ static int sysfs_open_file(struct inode *inode, struct file *file)
344 memmove(last_sysfs_file, p, strlen(p) + 1); 344 memmove(last_sysfs_file, p, strlen(p) + 1);
345 345
346 /* need attr_sd for attr and ops, its parent for kobj */ 346 /* need attr_sd for attr and ops, its parent for kobj */
347 if (!sysfs_get_active_two(attr_sd)) 347 if (!sysfs_get_active(attr_sd))
348 return -ENODEV; 348 return -ENODEV;
349 349
350 /* every kobject with an attribute needs a ktype assigned */ 350 /* every kobject with an attribute needs a ktype assigned */
@@ -393,13 +393,13 @@ static int sysfs_open_file(struct inode *inode, struct file *file)
393 goto err_free; 393 goto err_free;
394 394
395 /* open succeeded, put active references */ 395 /* open succeeded, put active references */
396 sysfs_put_active_two(attr_sd); 396 sysfs_put_active(attr_sd);
397 return 0; 397 return 0;
398 398
399 err_free: 399 err_free:
400 kfree(buffer); 400 kfree(buffer);
401 err_out: 401 err_out:
402 sysfs_put_active_two(attr_sd); 402 sysfs_put_active(attr_sd);
403 return error; 403 return error;
404} 404}
405 405
@@ -437,12 +437,12 @@ static unsigned int sysfs_poll(struct file *filp, poll_table *wait)
437 struct sysfs_open_dirent *od = attr_sd->s_attr.open; 437 struct sysfs_open_dirent *od = attr_sd->s_attr.open;
438 438
439 /* need parent for the kobj, grab both */ 439 /* need parent for the kobj, grab both */
440 if (!sysfs_get_active_two(attr_sd)) 440 if (!sysfs_get_active(attr_sd))
441 goto trigger; 441 goto trigger;
442 442
443 poll_wait(filp, &od->poll, wait); 443 poll_wait(filp, &od->poll, wait);
444 444
445 sysfs_put_active_two(attr_sd); 445 sysfs_put_active(attr_sd);
446 446
447 if (buffer->event != atomic_read(&od->event)) 447 if (buffer->event != atomic_read(&od->event))
448 goto trigger; 448 goto trigger;
@@ -509,6 +509,7 @@ int sysfs_add_file_mode(struct sysfs_dirent *dir_sd,
509 if (!sd) 509 if (!sd)
510 return -ENOMEM; 510 return -ENOMEM;
511 sd->s_attr.attr = (void *)attr; 511 sd->s_attr.attr = (void *)attr;
512 sysfs_dirent_init_lockdep(sd);
512 513
513 sysfs_addrm_start(&acxt, dir_sd); 514 sysfs_addrm_start(&acxt, dir_sd);
514 rc = sysfs_add_one(&acxt, sd); 515 rc = sysfs_add_one(&acxt, sd);
@@ -542,6 +543,18 @@ int sysfs_create_file(struct kobject * kobj, const struct attribute * attr)
542 543
543} 544}
544 545
546int sysfs_create_files(struct kobject *kobj, const struct attribute **ptr)
547{
548 int err = 0;
549 int i;
550
551 for (i = 0; ptr[i] && !err; i++)
552 err = sysfs_create_file(kobj, ptr[i]);
553 if (err)
554 while (--i >= 0)
555 sysfs_remove_file(kobj, ptr[i]);
556 return err;
557}
545 558
546/** 559/**
547 * sysfs_add_file_to_group - add an attribute file to a pre-existing group. 560 * sysfs_add_file_to_group - add an attribute file to a pre-existing group.
@@ -614,6 +627,12 @@ void sysfs_remove_file(struct kobject * kobj, const struct attribute * attr)
614 sysfs_hash_and_remove(kobj->sd, attr->name); 627 sysfs_hash_and_remove(kobj->sd, attr->name);
615} 628}
616 629
630void sysfs_remove_files(struct kobject * kobj, const struct attribute **ptr)
631{
632 int i;
633 for (i = 0; ptr[i]; i++)
634 sysfs_remove_file(kobj, ptr[i]);
635}
617 636
618/** 637/**
619 * sysfs_remove_file_from_group - remove an attribute file from a group. 638 * sysfs_remove_file_from_group - remove an attribute file from a group.
@@ -732,3 +751,5 @@ EXPORT_SYMBOL_GPL(sysfs_schedule_callback);
732 751
733EXPORT_SYMBOL_GPL(sysfs_create_file); 752EXPORT_SYMBOL_GPL(sysfs_create_file);
734EXPORT_SYMBOL_GPL(sysfs_remove_file); 753EXPORT_SYMBOL_GPL(sysfs_remove_file);
754EXPORT_SYMBOL_GPL(sysfs_remove_files);
755EXPORT_SYMBOL_GPL(sysfs_create_files);
diff --git a/fs/sysfs/inode.c b/fs/sysfs/inode.c
index 6a06a1d1ea7b..082daaecac1b 100644
--- a/fs/sysfs/inode.c
+++ b/fs/sysfs/inode.c
@@ -111,20 +111,20 @@ int sysfs_setattr(struct dentry *dentry, struct iattr *iattr)
111 if (!sd) 111 if (!sd)
112 return -EINVAL; 112 return -EINVAL;
113 113
114 mutex_lock(&sysfs_mutex);
114 error = inode_change_ok(inode, iattr); 115 error = inode_change_ok(inode, iattr);
115 if (error) 116 if (error)
116 return error; 117 goto out;
117 118
118 iattr->ia_valid &= ~ATTR_SIZE; /* ignore size changes */ 119 iattr->ia_valid &= ~ATTR_SIZE; /* ignore size changes */
119 120
120 error = inode_setattr(inode, iattr); 121 error = inode_setattr(inode, iattr);
121 if (error) 122 if (error)
122 return error; 123 goto out;
123 124
124 mutex_lock(&sysfs_mutex);
125 error = sysfs_sd_setattr(sd, iattr); 125 error = sysfs_sd_setattr(sd, iattr);
126out:
126 mutex_unlock(&sysfs_mutex); 127 mutex_unlock(&sysfs_mutex);
127
128 return error; 128 return error;
129} 129}
130 130
@@ -283,6 +283,7 @@ static void sysfs_init_inode(struct sysfs_dirent *sd, struct inode *inode)
283 283
284/** 284/**
285 * sysfs_get_inode - get inode for sysfs_dirent 285 * sysfs_get_inode - get inode for sysfs_dirent
286 * @sb: super block
286 * @sd: sysfs_dirent to allocate inode for 287 * @sd: sysfs_dirent to allocate inode for
287 * 288 *
288 * Get inode for @sd. If such inode doesn't exist, a new inode 289 * Get inode for @sd. If such inode doesn't exist, a new inode
@@ -295,11 +296,11 @@ static void sysfs_init_inode(struct sysfs_dirent *sd, struct inode *inode)
295 * RETURNS: 296 * RETURNS:
296 * Pointer to allocated inode on success, NULL on failure. 297 * Pointer to allocated inode on success, NULL on failure.
297 */ 298 */
298struct inode * sysfs_get_inode(struct sysfs_dirent *sd) 299struct inode * sysfs_get_inode(struct super_block *sb, struct sysfs_dirent *sd)
299{ 300{
300 struct inode *inode; 301 struct inode *inode;
301 302
302 inode = iget_locked(sysfs_sb, sd->s_ino); 303 inode = iget_locked(sb, sd->s_ino);
303 if (inode && (inode->i_state & I_NEW)) 304 if (inode && (inode->i_state & I_NEW))
304 sysfs_init_inode(sd, inode); 305 sysfs_init_inode(sd, inode);
305 306
diff --git a/fs/sysfs/mount.c b/fs/sysfs/mount.c
index 49749955ccaf..0cb10884a2fc 100644
--- a/fs/sysfs/mount.c
+++ b/fs/sysfs/mount.c
@@ -23,7 +23,6 @@
23 23
24 24
25static struct vfsmount *sysfs_mount; 25static struct vfsmount *sysfs_mount;
26struct super_block * sysfs_sb = NULL;
27struct kmem_cache *sysfs_dir_cachep; 26struct kmem_cache *sysfs_dir_cachep;
28 27
29static const struct super_operations sysfs_ops = { 28static const struct super_operations sysfs_ops = {
@@ -50,11 +49,10 @@ static int sysfs_fill_super(struct super_block *sb, void *data, int silent)
50 sb->s_magic = SYSFS_MAGIC; 49 sb->s_magic = SYSFS_MAGIC;
51 sb->s_op = &sysfs_ops; 50 sb->s_op = &sysfs_ops;
52 sb->s_time_gran = 1; 51 sb->s_time_gran = 1;
53 sysfs_sb = sb;
54 52
55 /* get root inode, initialize and unlock it */ 53 /* get root inode, initialize and unlock it */
56 mutex_lock(&sysfs_mutex); 54 mutex_lock(&sysfs_mutex);
57 inode = sysfs_get_inode(&sysfs_root); 55 inode = sysfs_get_inode(sb, &sysfs_root);
58 mutex_unlock(&sysfs_mutex); 56 mutex_unlock(&sysfs_mutex);
59 if (!inode) { 57 if (!inode) {
60 pr_debug("sysfs: could not get root inode\n"); 58 pr_debug("sysfs: could not get root inode\n");
diff --git a/fs/sysfs/symlink.c b/fs/sysfs/symlink.c
index c5eff49fa41b..1b9a3a1e8a17 100644
--- a/fs/sysfs/symlink.c
+++ b/fs/sysfs/symlink.c
@@ -123,6 +123,44 @@ void sysfs_remove_link(struct kobject * kobj, const char * name)
123 sysfs_hash_and_remove(parent_sd, name); 123 sysfs_hash_and_remove(parent_sd, name);
124} 124}
125 125
126/**
127 * sysfs_rename_link - rename symlink in object's directory.
128 * @kobj: object we're acting for.
129 * @targ: object we're pointing to.
130 * @old: previous name of the symlink.
131 * @new: new name of the symlink.
132 *
133 * A helper function for the common rename symlink idiom.
134 */
135int sysfs_rename_link(struct kobject *kobj, struct kobject *targ,
136 const char *old, const char *new)
137{
138 struct sysfs_dirent *parent_sd, *sd = NULL;
139 int result;
140
141 if (!kobj)
142 parent_sd = &sysfs_root;
143 else
144 parent_sd = kobj->sd;
145
146 result = -ENOENT;
147 sd = sysfs_get_dirent(parent_sd, old);
148 if (!sd)
149 goto out;
150
151 result = -EINVAL;
152 if (sysfs_type(sd) != SYSFS_KOBJ_LINK)
153 goto out;
154 if (sd->s_symlink.target_sd->s_dir.kobj != targ)
155 goto out;
156
157 result = sysfs_rename(sd, parent_sd, new);
158
159out:
160 sysfs_put(sd);
161 return result;
162}
163
126static int sysfs_get_target_path(struct sysfs_dirent *parent_sd, 164static int sysfs_get_target_path(struct sysfs_dirent *parent_sd,
127 struct sysfs_dirent *target_sd, char *path) 165 struct sysfs_dirent *target_sd, char *path)
128{ 166{
diff --git a/fs/sysfs/sysfs.h b/fs/sysfs/sysfs.h
index cdd9377a6e06..30f5a44fb5d3 100644
--- a/fs/sysfs/sysfs.h
+++ b/fs/sysfs/sysfs.h
@@ -66,8 +66,8 @@ struct sysfs_dirent {
66 }; 66 };
67 67
68 unsigned int s_flags; 68 unsigned int s_flags;
69 unsigned short s_mode;
69 ino_t s_ino; 70 ino_t s_ino;
70 umode_t s_mode;
71 struct sysfs_inode_attrs *s_iattr; 71 struct sysfs_inode_attrs *s_iattr;
72}; 72};
73 73
@@ -79,6 +79,7 @@ struct sysfs_dirent {
79#define SYSFS_KOBJ_BIN_ATTR 0x0004 79#define SYSFS_KOBJ_BIN_ATTR 0x0004
80#define SYSFS_KOBJ_LINK 0x0008 80#define SYSFS_KOBJ_LINK 0x0008
81#define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK) 81#define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK)
82#define SYSFS_ACTIVE_REF (SYSFS_KOBJ_ATTR | SYSFS_KOBJ_BIN_ATTR)
82 83
83#define SYSFS_FLAG_MASK ~SYSFS_TYPE_MASK 84#define SYSFS_FLAG_MASK ~SYSFS_TYPE_MASK
84#define SYSFS_FLAG_REMOVED 0x0200 85#define SYSFS_FLAG_REMOVED 0x0200
@@ -91,9 +92,12 @@ static inline unsigned int sysfs_type(struct sysfs_dirent *sd)
91#ifdef CONFIG_DEBUG_LOCK_ALLOC 92#ifdef CONFIG_DEBUG_LOCK_ALLOC
92#define sysfs_dirent_init_lockdep(sd) \ 93#define sysfs_dirent_init_lockdep(sd) \
93do { \ 94do { \
94 static struct lock_class_key __key; \ 95 struct attribute *attr = sd->s_attr.attr; \
96 struct lock_class_key *key = attr->key; \
97 if (!key) \
98 key = &attr->skey; \
95 \ 99 \
96 lockdep_init_map(&sd->dep_map, "s_active", &__key, 0); \ 100 lockdep_init_map(&sd->dep_map, "s_active", key, 0); \
97} while(0) 101} while(0)
98#else 102#else
99#define sysfs_dirent_init_lockdep(sd) do {} while(0) 103#define sysfs_dirent_init_lockdep(sd) do {} while(0)
@@ -111,7 +115,6 @@ struct sysfs_addrm_cxt {
111 * mount.c 115 * mount.c
112 */ 116 */
113extern struct sysfs_dirent sysfs_root; 117extern struct sysfs_dirent sysfs_root;
114extern struct super_block *sysfs_sb;
115extern struct kmem_cache *sysfs_dir_cachep; 118extern struct kmem_cache *sysfs_dir_cachep;
116 119
117/* 120/*
@@ -124,8 +127,8 @@ extern const struct file_operations sysfs_dir_operations;
124extern const struct inode_operations sysfs_dir_inode_operations; 127extern const struct inode_operations sysfs_dir_inode_operations;
125 128
126struct dentry *sysfs_get_dentry(struct sysfs_dirent *sd); 129struct dentry *sysfs_get_dentry(struct sysfs_dirent *sd);
127struct sysfs_dirent *sysfs_get_active_two(struct sysfs_dirent *sd); 130struct sysfs_dirent *sysfs_get_active(struct sysfs_dirent *sd);
128void sysfs_put_active_two(struct sysfs_dirent *sd); 131void sysfs_put_active(struct sysfs_dirent *sd);
129void sysfs_addrm_start(struct sysfs_addrm_cxt *acxt, 132void sysfs_addrm_start(struct sysfs_addrm_cxt *acxt,
130 struct sysfs_dirent *parent_sd); 133 struct sysfs_dirent *parent_sd);
131int __sysfs_add_one(struct sysfs_addrm_cxt *acxt, struct sysfs_dirent *sd); 134int __sysfs_add_one(struct sysfs_addrm_cxt *acxt, struct sysfs_dirent *sd);
@@ -168,7 +171,7 @@ static inline void __sysfs_put(struct sysfs_dirent *sd)
168/* 171/*
169 * inode.c 172 * inode.c
170 */ 173 */
171struct inode *sysfs_get_inode(struct sysfs_dirent *sd); 174struct inode *sysfs_get_inode(struct super_block *sb, struct sysfs_dirent *sd);
172void sysfs_delete_inode(struct inode *inode); 175void sysfs_delete_inode(struct inode *inode);
173int sysfs_sd_setattr(struct sysfs_dirent *sd, struct iattr *iattr); 176int sysfs_sd_setattr(struct sysfs_dirent *sd, struct iattr *iattr);
174int sysfs_permission(struct inode *inode, int mask); 177int sysfs_permission(struct inode *inode, int mask);
diff --git a/fs/udf/balloc.c b/fs/udf/balloc.c
index ccc3ad7242d4..19626e2491c4 100644
--- a/fs/udf/balloc.c
+++ b/fs/udf/balloc.c
@@ -31,55 +31,8 @@
31#define udf_clear_bit(nr, addr) ext2_clear_bit(nr, addr) 31#define udf_clear_bit(nr, addr) ext2_clear_bit(nr, addr)
32#define udf_set_bit(nr, addr) ext2_set_bit(nr, addr) 32#define udf_set_bit(nr, addr) ext2_set_bit(nr, addr)
33#define udf_test_bit(nr, addr) ext2_test_bit(nr, addr) 33#define udf_test_bit(nr, addr) ext2_test_bit(nr, addr)
34#define udf_find_first_one_bit(addr, size) find_first_one_bit(addr, size)
35#define udf_find_next_one_bit(addr, size, offset) \ 34#define udf_find_next_one_bit(addr, size, offset) \
36 find_next_one_bit(addr, size, offset) 35 ext2_find_next_bit(addr, size, offset)
37
38#define leBPL_to_cpup(x) leNUM_to_cpup(BITS_PER_LONG, x)
39#define leNUM_to_cpup(x, y) xleNUM_to_cpup(x, y)
40#define xleNUM_to_cpup(x, y) (le ## x ## _to_cpup(y))
41#define uintBPL_t uint(BITS_PER_LONG)
42#define uint(x) xuint(x)
43#define xuint(x) __le ## x
44
45static inline int find_next_one_bit(void *addr, int size, int offset)
46{
47 uintBPL_t *p = ((uintBPL_t *) addr) + (offset / BITS_PER_LONG);
48 int result = offset & ~(BITS_PER_LONG - 1);
49 unsigned long tmp;
50
51 if (offset >= size)
52 return size;
53 size -= result;
54 offset &= (BITS_PER_LONG - 1);
55 if (offset) {
56 tmp = leBPL_to_cpup(p++);
57 tmp &= ~0UL << offset;
58 if (size < BITS_PER_LONG)
59 goto found_first;
60 if (tmp)
61 goto found_middle;
62 size -= BITS_PER_LONG;
63 result += BITS_PER_LONG;
64 }
65 while (size & ~(BITS_PER_LONG - 1)) {
66 tmp = leBPL_to_cpup(p++);
67 if (tmp)
68 goto found_middle;
69 result += BITS_PER_LONG;
70 size -= BITS_PER_LONG;
71 }
72 if (!size)
73 return result;
74 tmp = leBPL_to_cpup(p);
75found_first:
76 tmp &= ~0UL >> (BITS_PER_LONG - size);
77found_middle:
78 return result + ffz(~tmp);
79}
80
81#define find_first_one_bit(addr, size)\
82 find_next_one_bit((addr), (size), 0)
83 36
84static int read_block_bitmap(struct super_block *sb, 37static int read_block_bitmap(struct super_block *sb,
85 struct udf_bitmap *bitmap, unsigned int block, 38 struct udf_bitmap *bitmap, unsigned int block,
diff --git a/fs/udf/inode.c b/fs/udf/inode.c
index b57ab0402d89..bb863fe579ac 100644
--- a/fs/udf/inode.c
+++ b/fs/udf/inode.c
@@ -106,7 +106,7 @@ void udf_clear_inode(struct inode *inode)
106 if (iinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB && 106 if (iinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB &&
107 inode->i_size != iinfo->i_lenExtents) { 107 inode->i_size != iinfo->i_lenExtents) {
108 printk(KERN_WARNING "UDF-fs (%s): Inode %lu (mode %o) has " 108 printk(KERN_WARNING "UDF-fs (%s): Inode %lu (mode %o) has "
109 "inode size %llu different from extent lenght %llu. " 109 "inode size %llu different from extent length %llu. "
110 "Filesystem need not be standards compliant.\n", 110 "Filesystem need not be standards compliant.\n",
111 inode->i_sb->s_id, inode->i_ino, inode->i_mode, 111 inode->i_sb->s_id, inode->i_ino, inode->i_mode,
112 (unsigned long long)inode->i_size, 112 (unsigned long long)inode->i_size,
@@ -1408,20 +1408,19 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1408 unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits; 1408 unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits;
1409 struct udf_inode_info *iinfo = UDF_I(inode); 1409 struct udf_inode_info *iinfo = UDF_I(inode);
1410 1410
1411 bh = udf_tread(inode->i_sb, 1411 bh = udf_tgetblk(inode->i_sb,
1412 udf_get_lb_pblock(inode->i_sb, 1412 udf_get_lb_pblock(inode->i_sb, &iinfo->i_location, 0));
1413 &iinfo->i_location, 0));
1414 if (!bh) { 1413 if (!bh) {
1415 udf_debug("bread failure\n"); 1414 udf_debug("getblk failure\n");
1416 return -EIO; 1415 return -ENOMEM;
1417 } 1416 }
1418 1417
1419 memset(bh->b_data, 0x00, inode->i_sb->s_blocksize); 1418 lock_buffer(bh);
1420 1419 memset(bh->b_data, 0, inode->i_sb->s_blocksize);
1421 fe = (struct fileEntry *)bh->b_data; 1420 fe = (struct fileEntry *)bh->b_data;
1422 efe = (struct extendedFileEntry *)bh->b_data; 1421 efe = (struct extendedFileEntry *)bh->b_data;
1423 1422
1424 if (fe->descTag.tagIdent == cpu_to_le16(TAG_IDENT_USE)) { 1423 if (iinfo->i_use) {
1425 struct unallocSpaceEntry *use = 1424 struct unallocSpaceEntry *use =
1426 (struct unallocSpaceEntry *)bh->b_data; 1425 (struct unallocSpaceEntry *)bh->b_data;
1427 1426
@@ -1429,20 +1428,18 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1429 memcpy(bh->b_data + sizeof(struct unallocSpaceEntry), 1428 memcpy(bh->b_data + sizeof(struct unallocSpaceEntry),
1430 iinfo->i_ext.i_data, inode->i_sb->s_blocksize - 1429 iinfo->i_ext.i_data, inode->i_sb->s_blocksize -
1431 sizeof(struct unallocSpaceEntry)); 1430 sizeof(struct unallocSpaceEntry));
1431 use->descTag.tagIdent = cpu_to_le16(TAG_IDENT_USE);
1432 use->descTag.tagLocation =
1433 cpu_to_le32(iinfo->i_location.logicalBlockNum);
1432 crclen = sizeof(struct unallocSpaceEntry) + 1434 crclen = sizeof(struct unallocSpaceEntry) +
1433 iinfo->i_lenAlloc - sizeof(struct tag); 1435 iinfo->i_lenAlloc - sizeof(struct tag);
1434 use->descTag.tagLocation = cpu_to_le32(
1435 iinfo->i_location.
1436 logicalBlockNum);
1437 use->descTag.descCRCLength = cpu_to_le16(crclen); 1436 use->descTag.descCRCLength = cpu_to_le16(crclen);
1438 use->descTag.descCRC = cpu_to_le16(crc_itu_t(0, (char *)use + 1437 use->descTag.descCRC = cpu_to_le16(crc_itu_t(0, (char *)use +
1439 sizeof(struct tag), 1438 sizeof(struct tag),
1440 crclen)); 1439 crclen));
1441 use->descTag.tagChecksum = udf_tag_checksum(&use->descTag); 1440 use->descTag.tagChecksum = udf_tag_checksum(&use->descTag);
1442 1441
1443 mark_buffer_dirty(bh); 1442 goto out;
1444 brelse(bh);
1445 return err;
1446 } 1443 }
1447 1444
1448 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_UID_FORGET)) 1445 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_UID_FORGET))
@@ -1597,18 +1594,21 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1597 fe->descTag.tagSerialNum = cpu_to_le16(sbi->s_serial_number); 1594 fe->descTag.tagSerialNum = cpu_to_le16(sbi->s_serial_number);
1598 fe->descTag.tagLocation = cpu_to_le32( 1595 fe->descTag.tagLocation = cpu_to_le32(
1599 iinfo->i_location.logicalBlockNum); 1596 iinfo->i_location.logicalBlockNum);
1600 crclen += iinfo->i_lenEAttr + iinfo->i_lenAlloc - 1597 crclen += iinfo->i_lenEAttr + iinfo->i_lenAlloc - sizeof(struct tag);
1601 sizeof(struct tag);
1602 fe->descTag.descCRCLength = cpu_to_le16(crclen); 1598 fe->descTag.descCRCLength = cpu_to_le16(crclen);
1603 fe->descTag.descCRC = cpu_to_le16(crc_itu_t(0, (char *)fe + sizeof(struct tag), 1599 fe->descTag.descCRC = cpu_to_le16(crc_itu_t(0, (char *)fe + sizeof(struct tag),
1604 crclen)); 1600 crclen));
1605 fe->descTag.tagChecksum = udf_tag_checksum(&fe->descTag); 1601 fe->descTag.tagChecksum = udf_tag_checksum(&fe->descTag);
1606 1602
1603out:
1604 set_buffer_uptodate(bh);
1605 unlock_buffer(bh);
1606
1607 /* write the data blocks */ 1607 /* write the data blocks */
1608 mark_buffer_dirty(bh); 1608 mark_buffer_dirty(bh);
1609 if (do_sync) { 1609 if (do_sync) {
1610 sync_dirty_buffer(bh); 1610 sync_dirty_buffer(bh);
1611 if (buffer_req(bh) && !buffer_uptodate(bh)) { 1611 if (buffer_write_io_error(bh)) {
1612 printk(KERN_WARNING "IO error syncing udf inode " 1612 printk(KERN_WARNING "IO error syncing udf inode "
1613 "[%s:%08lx]\n", inode->i_sb->s_id, 1613 "[%s:%08lx]\n", inode->i_sb->s_id,
1614 inode->i_ino); 1614 inode->i_ino);
diff --git a/fs/ufs/super.c b/fs/ufs/super.c
index 66b63a751615..14743d935a93 100644
--- a/fs/ufs/super.c
+++ b/fs/ufs/super.c
@@ -1016,6 +1016,9 @@ magic_found:
1016 case UFS_FSSTABLE: 1016 case UFS_FSSTABLE:
1017 UFSD("fs is stable\n"); 1017 UFSD("fs is stable\n");
1018 break; 1018 break;
1019 case UFS_FSLOG:
1020 UFSD("fs is logging fs\n");
1021 break;
1019 case UFS_FSOSF1: 1022 case UFS_FSOSF1:
1020 UFSD("fs is DEC OSF/1\n"); 1023 UFSD("fs is DEC OSF/1\n");
1021 break; 1024 break;
diff --git a/fs/ufs/ufs_fs.h b/fs/ufs/ufs_fs.h
index 54bde1895a80..6943ec677c0b 100644
--- a/fs/ufs/ufs_fs.h
+++ b/fs/ufs/ufs_fs.h
@@ -138,6 +138,7 @@ typedef __u16 __bitwise __fs16;
138 138
139#define UFS_USEEFT ((__u16)65535) 139#define UFS_USEEFT ((__u16)65535)
140 140
141/* fs_clean values */
141#define UFS_FSOK 0x7c269d38 142#define UFS_FSOK 0x7c269d38
142#define UFS_FSACTIVE ((__s8)0x00) 143#define UFS_FSACTIVE ((__s8)0x00)
143#define UFS_FSCLEAN ((__s8)0x01) 144#define UFS_FSCLEAN ((__s8)0x01)
@@ -145,6 +146,11 @@ typedef __u16 __bitwise __fs16;
145#define UFS_FSOSF1 ((__s8)0x03) /* is this correct for DEC OSF/1? */ 146#define UFS_FSOSF1 ((__s8)0x03) /* is this correct for DEC OSF/1? */
146#define UFS_FSBAD ((__s8)0xff) 147#define UFS_FSBAD ((__s8)0xff)
147 148
149/* Solaris-specific fs_clean values */
150#define UFS_FSSUSPEND ((__s8)0xfe) /* temporarily suspended */
151#define UFS_FSLOG ((__s8)0xfd) /* logging fs */
152#define UFS_FSFIX ((__s8)0xfc) /* being repaired while mounted */
153
148/* From here to next blank line, s_flags for ufs_sb_info */ 154/* From here to next blank line, s_flags for ufs_sb_info */
149/* directory entry encoding */ 155/* directory entry encoding */
150#define UFS_DE_MASK 0x00000010 /* mask for the following */ 156#define UFS_DE_MASK 0x00000010 /* mask for the following */
@@ -227,11 +233,16 @@ typedef __u16 __bitwise __fs16;
227 */ 233 */
228#define ufs_cbtocylno(bno) \ 234#define ufs_cbtocylno(bno) \
229 ((bno) * uspi->s_nspf / uspi->s_spc) 235 ((bno) * uspi->s_nspf / uspi->s_spc)
230#define ufs_cbtorpos(bno) \ 236#define ufs_cbtorpos(bno) \
237 ((UFS_SB(sb)->s_flags & UFS_CG_SUN) ? \
238 (((((bno) * uspi->s_nspf % uspi->s_spc) % \
239 uspi->s_nsect) * \
240 uspi->s_nrpos) / uspi->s_nsect) \
241 : \
231 ((((bno) * uspi->s_nspf % uspi->s_spc / uspi->s_nsect \ 242 ((((bno) * uspi->s_nspf % uspi->s_spc / uspi->s_nsect \
232 * uspi->s_trackskew + (bno) * uspi->s_nspf % uspi->s_spc \ 243 * uspi->s_trackskew + (bno) * uspi->s_nspf % uspi->s_spc \
233 % uspi->s_nsect * uspi->s_interleave) % uspi->s_nsect \ 244 % uspi->s_nsect * uspi->s_interleave) % uspi->s_nsect \
234 * uspi->s_nrpos) / uspi->s_npsect) 245 * uspi->s_nrpos) / uspi->s_npsect))
235 246
236/* 247/*
237 * The following macros optimize certain frequently calculated 248 * The following macros optimize certain frequently calculated
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index 1172c27adadf..86825ddbe14e 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -320,8 +320,16 @@ static inline int acpi_processor_get_bios_limit(int cpu, unsigned int *limit)
320 320
321#endif /* CONFIG_CPU_FREQ */ 321#endif /* CONFIG_CPU_FREQ */
322 322
323/* in processor_pdc.c */ 323/* in processor_core.c */
324void acpi_processor_set_pdc(acpi_handle handle); 324void acpi_processor_set_pdc(acpi_handle handle);
325#ifdef CONFIG_SMP
326int acpi_get_cpuid(acpi_handle, int type, u32 acpi_id);
327#else
328static inline int acpi_get_cpuid(acpi_handle handle, int type, u32 acpi_id)
329{
330 return -1;
331}
332#endif
325 333
326/* in processor_throttling.c */ 334/* in processor_throttling.c */
327int acpi_processor_tstate_has_changed(struct acpi_processor *pr); 335int acpi_processor_tstate_has_changed(struct acpi_processor *pr);
diff --git a/include/asm-generic/pci-dma-compat.h b/include/asm-generic/pci-dma-compat.h
index 37b3706226e7..1437b7da09b2 100644
--- a/include/asm-generic/pci-dma-compat.h
+++ b/include/asm-generic/pci-dma-compat.h
@@ -6,9 +6,6 @@
6 6
7#include <linux/dma-mapping.h> 7#include <linux/dma-mapping.h>
8 8
9/* note pci_set_dma_mask isn't here, since it's a public function
10 * exported from drivers/pci, use dma_supported instead */
11
12static inline int 9static inline int
13pci_dma_supported(struct pci_dev *hwdev, u64 mask) 10pci_dma_supported(struct pci_dev *hwdev, u64 mask)
14{ 11{
@@ -104,4 +101,16 @@ pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
104 return dma_mapping_error(&pdev->dev, dma_addr); 101 return dma_mapping_error(&pdev->dev, dma_addr);
105} 102}
106 103
104#ifdef CONFIG_PCI
105static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
106{
107 return dma_set_mask(&dev->dev, mask);
108}
109
110static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
111{
112 return dma_set_coherent_mask(&dev->dev, mask);
113}
114#endif
115
107#endif 116#endif
diff --git a/include/linux/acct.h b/include/linux/acct.h
index 882dc7248766..3e4737fa6cce 100644
--- a/include/linux/acct.h
+++ b/include/linux/acct.h
@@ -121,16 +121,15 @@ struct vfsmount;
121struct super_block; 121struct super_block;
122struct pacct_struct; 122struct pacct_struct;
123struct pid_namespace; 123struct pid_namespace;
124extern int acct_parm[]; /* for sysctl */
124extern void acct_auto_close_mnt(struct vfsmount *m); 125extern void acct_auto_close_mnt(struct vfsmount *m);
125extern void acct_auto_close(struct super_block *sb); 126extern void acct_auto_close(struct super_block *sb);
126extern void acct_init_pacct(struct pacct_struct *pacct);
127extern void acct_collect(long exitcode, int group_dead); 127extern void acct_collect(long exitcode, int group_dead);
128extern void acct_process(void); 128extern void acct_process(void);
129extern void acct_exit_ns(struct pid_namespace *); 129extern void acct_exit_ns(struct pid_namespace *);
130#else 130#else
131#define acct_auto_close_mnt(x) do { } while (0) 131#define acct_auto_close_mnt(x) do { } while (0)
132#define acct_auto_close(x) do { } while (0) 132#define acct_auto_close(x) do { } while (0)
133#define acct_init_pacct(x) do { } while (0)
134#define acct_collect(x,y) do { } while (0) 133#define acct_collect(x,y) do { } while (0)
135#define acct_process() do { } while (0) 134#define acct_process() do { } while (0)
136#define acct_exit_ns(ns) do { } while (0) 135#define acct_exit_ns(ns) do { } while (0)
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index c9bbcb2a75ae..b8ad1ea99586 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -37,16 +37,24 @@ extern void cgroup_post_fork(struct task_struct *p);
37extern void cgroup_exit(struct task_struct *p, int run_callbacks); 37extern void cgroup_exit(struct task_struct *p, int run_callbacks);
38extern int cgroupstats_build(struct cgroupstats *stats, 38extern int cgroupstats_build(struct cgroupstats *stats,
39 struct dentry *dentry); 39 struct dentry *dentry);
40extern int cgroup_load_subsys(struct cgroup_subsys *ss);
41extern void cgroup_unload_subsys(struct cgroup_subsys *ss);
40 42
41extern const struct file_operations proc_cgroup_operations; 43extern const struct file_operations proc_cgroup_operations;
42 44
43/* Define the enumeration of all cgroup subsystems */ 45/* Define the enumeration of all builtin cgroup subsystems */
44#define SUBSYS(_x) _x ## _subsys_id, 46#define SUBSYS(_x) _x ## _subsys_id,
45enum cgroup_subsys_id { 47enum cgroup_subsys_id {
46#include <linux/cgroup_subsys.h> 48#include <linux/cgroup_subsys.h>
47 CGROUP_SUBSYS_COUNT 49 CGROUP_BUILTIN_SUBSYS_COUNT
48}; 50};
49#undef SUBSYS 51#undef SUBSYS
52/*
53 * This define indicates the maximum number of subsystems that can be loaded
54 * at once. We limit to this many since cgroupfs_root has subsys_bits to keep
55 * track of all of them.
56 */
57#define CGROUP_SUBSYS_COUNT (BITS_PER_BYTE*sizeof(unsigned long))
50 58
51/* Per-subsystem/per-cgroup state maintained by the system. */ 59/* Per-subsystem/per-cgroup state maintained by the system. */
52struct cgroup_subsys_state { 60struct cgroup_subsys_state {
@@ -76,6 +84,12 @@ enum {
76 CSS_REMOVED, /* This CSS is dead */ 84 CSS_REMOVED, /* This CSS is dead */
77}; 85};
78 86
87/* Caller must verify that the css is not for root cgroup */
88static inline void __css_get(struct cgroup_subsys_state *css, int count)
89{
90 atomic_add(count, &css->refcnt);
91}
92
79/* 93/*
80 * Call css_get() to hold a reference on the css; it can be used 94 * Call css_get() to hold a reference on the css; it can be used
81 * for a reference obtained via: 95 * for a reference obtained via:
@@ -87,7 +101,7 @@ static inline void css_get(struct cgroup_subsys_state *css)
87{ 101{
88 /* We don't need to reference count the root state */ 102 /* We don't need to reference count the root state */
89 if (!test_bit(CSS_ROOT, &css->flags)) 103 if (!test_bit(CSS_ROOT, &css->flags))
90 atomic_inc(&css->refcnt); 104 __css_get(css, 1);
91} 105}
92 106
93static inline bool css_is_removed(struct cgroup_subsys_state *css) 107static inline bool css_is_removed(struct cgroup_subsys_state *css)
@@ -118,11 +132,11 @@ static inline bool css_tryget(struct cgroup_subsys_state *css)
118 * css_get() or css_tryget() 132 * css_get() or css_tryget()
119 */ 133 */
120 134
121extern void __css_put(struct cgroup_subsys_state *css); 135extern void __css_put(struct cgroup_subsys_state *css, int count);
122static inline void css_put(struct cgroup_subsys_state *css) 136static inline void css_put(struct cgroup_subsys_state *css)
123{ 137{
124 if (!test_bit(CSS_ROOT, &css->flags)) 138 if (!test_bit(CSS_ROOT, &css->flags))
125 __css_put(css); 139 __css_put(css, 1);
126} 140}
127 141
128/* bits in struct cgroup flags field */ 142/* bits in struct cgroup flags field */
@@ -221,6 +235,10 @@ struct cgroup {
221 235
222 /* For RCU-protected deletion */ 236 /* For RCU-protected deletion */
223 struct rcu_head rcu_head; 237 struct rcu_head rcu_head;
238
239 /* List of events which userspace want to recieve */
240 struct list_head event_list;
241 spinlock_t event_list_lock;
224}; 242};
225 243
226/* 244/*
@@ -258,7 +276,8 @@ struct css_set {
258 /* 276 /*
259 * Set of subsystem states, one for each subsystem. This array 277 * Set of subsystem states, one for each subsystem. This array
260 * is immutable after creation apart from the init_css_set 278 * is immutable after creation apart from the init_css_set
261 * during subsystem registration (at boot time). 279 * during subsystem registration (at boot time) and modular subsystem
280 * loading/unloading.
262 */ 281 */
263 struct cgroup_subsys_state *subsys[CGROUP_SUBSYS_COUNT]; 282 struct cgroup_subsys_state *subsys[CGROUP_SUBSYS_COUNT];
264 283
@@ -363,6 +382,23 @@ struct cftype {
363 int (*trigger)(struct cgroup *cgrp, unsigned int event); 382 int (*trigger)(struct cgroup *cgrp, unsigned int event);
364 383
365 int (*release)(struct inode *inode, struct file *file); 384 int (*release)(struct inode *inode, struct file *file);
385
386 /*
387 * register_event() callback will be used to add new userspace
388 * waiter for changes related to the cftype. Implement it if
389 * you want to provide this functionality. Use eventfd_signal()
390 * on eventfd to send notification to userspace.
391 */
392 int (*register_event)(struct cgroup *cgrp, struct cftype *cft,
393 struct eventfd_ctx *eventfd, const char *args);
394 /*
395 * unregister_event() callback will be called when userspace
396 * closes the eventfd or on cgroup removing.
397 * This callback must be implemented, if you want provide
398 * notification functionality.
399 */
400 int (*unregister_event)(struct cgroup *cgrp, struct cftype *cft,
401 struct eventfd_ctx *eventfd);
366}; 402};
367 403
368struct cgroup_scanner { 404struct cgroup_scanner {
@@ -428,6 +464,8 @@ struct cgroup_subsys {
428 void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp); 464 void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
429 int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp, 465 int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
430 struct task_struct *tsk, bool threadgroup); 466 struct task_struct *tsk, bool threadgroup);
467 void (*cancel_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
468 struct task_struct *tsk, bool threadgroup);
431 void (*attach)(struct cgroup_subsys *ss, struct cgroup *cgrp, 469 void (*attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
432 struct cgroup *old_cgrp, struct task_struct *tsk, 470 struct cgroup *old_cgrp, struct task_struct *tsk,
433 bool threadgroup); 471 bool threadgroup);
@@ -472,6 +510,9 @@ struct cgroup_subsys {
472 /* used when use_id == true */ 510 /* used when use_id == true */
473 struct idr idr; 511 struct idr idr;
474 spinlock_t id_lock; 512 spinlock_t id_lock;
513
514 /* should be defined only by modular subsystems */
515 struct module *module;
475}; 516};
476 517
477#define SUBSYS(_x) extern struct cgroup_subsys _x ## _subsys; 518#define SUBSYS(_x) extern struct cgroup_subsys _x ## _subsys;
diff --git a/include/linux/compat.h b/include/linux/compat.h
index ef68119a4fd2..717c691ecd8e 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -23,6 +23,7 @@
23typedef __compat_uid32_t compat_uid_t; 23typedef __compat_uid32_t compat_uid_t;
24typedef __compat_gid32_t compat_gid_t; 24typedef __compat_gid32_t compat_gid_t;
25 25
26struct compat_sel_arg_struct;
26struct rusage; 27struct rusage;
27 28
28struct compat_itimerspec { 29struct compat_itimerspec {
@@ -249,6 +250,8 @@ asmlinkage long compat_sys_select(int n, compat_ulong_t __user *inp,
249 compat_ulong_t __user *outp, compat_ulong_t __user *exp, 250 compat_ulong_t __user *outp, compat_ulong_t __user *exp,
250 struct compat_timeval __user *tvp); 251 struct compat_timeval __user *tvp);
251 252
253asmlinkage long compat_sys_old_select(struct compat_sel_arg_struct __user *arg);
254
252asmlinkage long compat_sys_wait4(compat_pid_t pid, 255asmlinkage long compat_sys_wait4(compat_pid_t pid,
253 compat_uint_t __user *stat_addr, int options, 256 compat_uint_t __user *stat_addr, int options,
254 struct compat_rusage __user *ru); 257 struct compat_rusage __user *ru);
diff --git a/include/linux/coredump.h b/include/linux/coredump.h
index b3c91d7cede4..8ba66a9d9022 100644
--- a/include/linux/coredump.h
+++ b/include/linux/coredump.h
@@ -16,6 +16,8 @@ static inline int dump_write(struct file *file, const void *addr, int nr)
16 16
17static inline int dump_seek(struct file *file, loff_t off) 17static inline int dump_seek(struct file *file, loff_t off)
18{ 18{
19 int ret = 1;
20
19 if (file->f_op->llseek && file->f_op->llseek != no_llseek) { 21 if (file->f_op->llseek && file->f_op->llseek != no_llseek) {
20 if (file->f_op->llseek(file, off, SEEK_CUR) < 0) 22 if (file->f_op->llseek(file, off, SEEK_CUR) < 0)
21 return 0; 23 return 0;
@@ -29,13 +31,15 @@ static inline int dump_seek(struct file *file, loff_t off)
29 31
30 if (n > PAGE_SIZE) 32 if (n > PAGE_SIZE)
31 n = PAGE_SIZE; 33 n = PAGE_SIZE;
32 if (!dump_write(file, buf, n)) 34 if (!dump_write(file, buf, n)) {
33 return 0; 35 ret = 0;
36 break;
37 }
34 off -= n; 38 off -= n;
35 } 39 }
36 free_page((unsigned long)buf); 40 free_page((unsigned long)buf);
37 } 41 }
38 return 1; 42 return ret;
39} 43}
40 44
41#endif /* _LINUX_COREDUMP_H */ 45#endif /* _LINUX_COREDUMP_H */
diff --git a/include/linux/cred.h b/include/linux/cred.h
index 4db09f89b637..52507c3e1387 100644
--- a/include/linux/cred.h
+++ b/include/linux/cred.h
@@ -280,7 +280,7 @@ static inline void put_cred(const struct cred *_cred)
280 * task or by holding tasklist_lock to prevent it from being unlinked. 280 * task or by holding tasklist_lock to prevent it from being unlinked.
281 */ 281 */
282#define __task_cred(task) \ 282#define __task_cred(task) \
283 ((const struct cred *)(rcu_dereference_check((task)->real_cred, rcu_read_lock_held() || lockdep_is_held(&tasklist_lock)))) 283 ((const struct cred *)(rcu_dereference_check((task)->real_cred, rcu_read_lock_held() || lockdep_tasklist_lock_is_held())))
284 284
285/** 285/**
286 * get_task_cred - Get another task's objective credentials 286 * get_task_cred - Get another task's objective credentials
diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
index 5032b9a31ae7..ad5ec1d0475e 100644
--- a/include/linux/decompress/mm.h
+++ b/include/linux/decompress/mm.h
@@ -14,11 +14,21 @@
14 14
15/* Code active when included from pre-boot environment: */ 15/* Code active when included from pre-boot environment: */
16 16
17/*
18 * Some architectures want to ensure there is no local data in their
19 * pre-boot environment, so that data can arbitarily relocated (via
20 * GOT references). This is achieved by defining STATIC_RW_DATA to
21 * be null.
22 */
23#ifndef STATIC_RW_DATA
24#define STATIC_RW_DATA static
25#endif
26
17/* A trivial malloc implementation, adapted from 27/* A trivial malloc implementation, adapted from
18 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 28 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
19 */ 29 */
20static unsigned long malloc_ptr; 30STATIC_RW_DATA unsigned long malloc_ptr;
21static int malloc_count; 31STATIC_RW_DATA int malloc_count;
22 32
23static void *malloc(int size) 33static void *malloc(int size)
24{ 34{
diff --git a/include/linux/device.h b/include/linux/device.h
index b30527db3ac0..182192892d45 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -106,7 +106,7 @@ extern int bus_unregister_notifier(struct bus_type *bus,
106 106
107/* All 4 notifers below get called with the target struct device * 107/* All 4 notifers below get called with the target struct device *
108 * as an argument. Note that those functions are likely to be called 108 * as an argument. Note that those functions are likely to be called
109 * with the device semaphore held in the core, so be careful. 109 * with the device lock held in the core, so be careful.
110 */ 110 */
111#define BUS_NOTIFY_ADD_DEVICE 0x00000001 /* device added */ 111#define BUS_NOTIFY_ADD_DEVICE 0x00000001 /* device added */
112#define BUS_NOTIFY_DEL_DEVICE 0x00000002 /* device removed */ 112#define BUS_NOTIFY_DEL_DEVICE 0x00000002 /* device removed */
@@ -251,8 +251,10 @@ extern struct device *class_find_device(struct class *class,
251 251
252struct class_attribute { 252struct class_attribute {
253 struct attribute attr; 253 struct attribute attr;
254 ssize_t (*show)(struct class *class, char *buf); 254 ssize_t (*show)(struct class *class, struct class_attribute *attr,
255 ssize_t (*store)(struct class *class, const char *buf, size_t count); 255 char *buf);
256 ssize_t (*store)(struct class *class, struct class_attribute *attr,
257 const char *buf, size_t count);
256}; 258};
257 259
258#define CLASS_ATTR(_name, _mode, _show, _store) \ 260#define CLASS_ATTR(_name, _mode, _show, _store) \
@@ -263,6 +265,23 @@ extern int __must_check class_create_file(struct class *class,
263extern void class_remove_file(struct class *class, 265extern void class_remove_file(struct class *class,
264 const struct class_attribute *attr); 266 const struct class_attribute *attr);
265 267
268/* Simple class attribute that is just a static string */
269
270struct class_attribute_string {
271 struct class_attribute attr;
272 char *str;
273};
274
275/* Currently read-only only */
276#define _CLASS_ATTR_STRING(_name, _mode, _str) \
277 { __ATTR(_name, _mode, show_class_attr_string, NULL), _str }
278#define CLASS_ATTR_STRING(_name, _mode, _str) \
279 struct class_attribute_string class_attr_##_name = \
280 _CLASS_ATTR_STRING(_name, _mode, _str)
281
282extern ssize_t show_class_attr_string(struct class *class, struct class_attribute *attr,
283 char *buf);
284
266struct class_interface { 285struct class_interface {
267 struct list_head node; 286 struct list_head node;
268 struct class *class; 287 struct class *class;
@@ -489,6 +508,21 @@ static inline bool device_async_suspend_enabled(struct device *dev)
489 return !!dev->power.async_suspend; 508 return !!dev->power.async_suspend;
490} 509}
491 510
511static inline void device_lock(struct device *dev)
512{
513 down(&dev->sem);
514}
515
516static inline int device_trylock(struct device *dev)
517{
518 return down_trylock(&dev->sem);
519}
520
521static inline void device_unlock(struct device *dev)
522{
523 up(&dev->sem);
524}
525
492void driver_init(void); 526void driver_init(void);
493 527
494/* 528/*
diff --git a/include/linux/dm9000.h b/include/linux/dm9000.h
index c30879cf93bc..96e87693d933 100644
--- a/include/linux/dm9000.h
+++ b/include/linux/dm9000.h
@@ -23,7 +23,7 @@
23#define DM9000_PLATF_NO_EEPROM (0x0010) 23#define DM9000_PLATF_NO_EEPROM (0x0010)
24#define DM9000_PLATF_SIMPLE_PHY (0x0020) /* Use NSR to find LinkStatus */ 24#define DM9000_PLATF_SIMPLE_PHY (0x0020) /* Use NSR to find LinkStatus */
25 25
26/* platfrom data for platfrom device structure's platfrom_data field */ 26/* platform data for platform device structure's platform_data field */
27 27
28struct dm9000_plat_data { 28struct dm9000_plat_data {
29 unsigned int flags; 29 unsigned int flags;
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 91b761846061..ca32ed78b057 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -127,6 +127,14 @@ static inline u64 dma_get_mask(struct device *dev)
127 return DMA_BIT_MASK(32); 127 return DMA_BIT_MASK(32);
128} 128}
129 129
130static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
131{
132 if (!dma_supported(dev, mask))
133 return -EIO;
134 dev->coherent_dma_mask = mask;
135 return 0;
136}
137
130extern u64 dma_get_required_mask(struct device *dev); 138extern u64 dma_get_required_mask(struct device *dev);
131 139
132static inline unsigned int dma_get_max_seg_size(struct device *dev) 140static inline unsigned int dma_get_max_seg_size(struct device *dev)
@@ -232,4 +240,20 @@ struct dma_attrs;
232 240
233#endif /* CONFIG_HAVE_DMA_ATTRS */ 241#endif /* CONFIG_HAVE_DMA_ATTRS */
234 242
243#ifdef CONFIG_NEED_DMA_MAP_STATE
244#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
245#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
246#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
247#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
248#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
249#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
250#else
251#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
252#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
253#define dma_unmap_addr(PTR, ADDR_NAME) (0)
254#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
255#define dma_unmap_len(PTR, LEN_NAME) (0)
256#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
257#endif
258
235#endif 259#endif
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index cca1c3de140d..b33f316bb92e 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -61,6 +61,13 @@ struct ethtool_drvinfo {
61 /* For PCI devices, use pci_name(pci_dev). */ 61 /* For PCI devices, use pci_name(pci_dev). */
62 char reserved1[32]; 62 char reserved1[32];
63 char reserved2[12]; 63 char reserved2[12];
64 /*
65 * Some struct members below are filled in
66 * using ops->get_sset_count(). Obtaining
67 * this info from ethtool_drvinfo is now
68 * deprecated; Use ETHTOOL_GSSET_INFO
69 * instead.
70 */
64 __u32 n_priv_flags; /* number of flags valid in ETHTOOL_GPFLAGS */ 71 __u32 n_priv_flags; /* number of flags valid in ETHTOOL_GPFLAGS */
65 __u32 n_stats; /* number of u64's from ETHTOOL_GSTATS */ 72 __u32 n_stats; /* number of u64's from ETHTOOL_GSTATS */
66 __u32 testinfo_len; 73 __u32 testinfo_len;
@@ -253,6 +260,17 @@ struct ethtool_gstrings {
253 __u8 data[0]; 260 __u8 data[0];
254}; 261};
255 262
263struct ethtool_sset_info {
264 __u32 cmd; /* ETHTOOL_GSSET_INFO */
265 __u32 reserved;
266 __u64 sset_mask; /* input: each bit selects an sset to query */
267 /* output: each bit a returned sset */
268 __u32 data[0]; /* ETH_SS_xxx count, in order, based on bits
269 in sset_mask. One bit implies one
270 __u32, two bits implies two
271 __u32's, etc. */
272};
273
256enum ethtool_test_flags { 274enum ethtool_test_flags {
257 ETH_TEST_FL_OFFLINE = (1 << 0), /* online / offline */ 275 ETH_TEST_FL_OFFLINE = (1 << 0), /* online / offline */
258 ETH_TEST_FL_FAILED = (1 << 1), /* test passed / failed */ 276 ETH_TEST_FL_FAILED = (1 << 1), /* test passed / failed */
@@ -606,9 +624,9 @@ struct ethtool_ops {
606#define ETHTOOL_SRXCLSRLINS 0x00000032 /* Insert RX classification rule */ 624#define ETHTOOL_SRXCLSRLINS 0x00000032 /* Insert RX classification rule */
607#define ETHTOOL_FLASHDEV 0x00000033 /* Flash firmware to device */ 625#define ETHTOOL_FLASHDEV 0x00000033 /* Flash firmware to device */
608#define ETHTOOL_RESET 0x00000034 /* Reset hardware */ 626#define ETHTOOL_RESET 0x00000034 /* Reset hardware */
609 627#define ETHTOOL_SRXNTUPLE 0x00000035 /* Add an n-tuple filter to device */
610#define ETHTOOL_SRXNTUPLE 0x00000035 /* Add an n-tuple filter to device */ 628#define ETHTOOL_GRXNTUPLE 0x00000036 /* Get n-tuple filters from device */
611#define ETHTOOL_GRXNTUPLE 0x00000036 /* Get n-tuple filters from device */ 629#define ETHTOOL_GSSET_INFO 0x00000037 /* Get string set info */
612 630
613/* compatibility with older code */ 631/* compatibility with older code */
614#define SPARC_ETH_GSET ETHTOOL_GSET 632#define SPARC_ETH_GSET ETHTOOL_GSET
diff --git a/include/linux/hil.h b/include/linux/hil.h
index 13352d7d0caf..523785a9de70 100644
--- a/include/linux/hil.h
+++ b/include/linux/hil.h
@@ -168,14 +168,14 @@ enum hil_command {
168 HIL_CMD_PR6 = 0x45, /* Prompt6 */ 168 HIL_CMD_PR6 = 0x45, /* Prompt6 */
169 HIL_CMD_PR7 = 0x46, /* Prompt7 */ 169 HIL_CMD_PR7 = 0x46, /* Prompt7 */
170 HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */ 170 HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */
171 HIL_CMD_AK1 = 0x48, /* Acknowlege1 */ 171 HIL_CMD_AK1 = 0x48, /* Acknowledge1 */
172 HIL_CMD_AK2 = 0x49, /* Acknowlege2 */ 172 HIL_CMD_AK2 = 0x49, /* Acknowledge2 */
173 HIL_CMD_AK3 = 0x4a, /* Acknowlege3 */ 173 HIL_CMD_AK3 = 0x4a, /* Acknowledge3 */
174 HIL_CMD_AK4 = 0x4b, /* Acknowlege4 */ 174 HIL_CMD_AK4 = 0x4b, /* Acknowledge4 */
175 HIL_CMD_AK5 = 0x4c, /* Acknowlege5 */ 175 HIL_CMD_AK5 = 0x4c, /* Acknowledge5 */
176 HIL_CMD_AK6 = 0x4d, /* Acknowlege6 */ 176 HIL_CMD_AK6 = 0x4d, /* Acknowledge6 */
177 HIL_CMD_AK7 = 0x4e, /* Acknowlege7 */ 177 HIL_CMD_AK7 = 0x4e, /* Acknowledge7 */
178 HIL_CMD_ACK = 0x4f, /* Acknowlege (General Purpose) */ 178 HIL_CMD_ACK = 0x4f, /* Acknowledge (General Purpose) */
179 179
180 /* 0x50 to 0x78 reserved for future use */ 180 /* 0x50 to 0x78 reserved for future use */
181 /* 0x80 to 0xEF device-specific commands */ 181 /* 0x80 to 0xEF device-specific commands */
diff --git a/include/linux/hw_breakpoint.h b/include/linux/hw_breakpoint.h
index 5977b724f7c6..c70d27af03f9 100644
--- a/include/linux/hw_breakpoint.h
+++ b/include/linux/hw_breakpoint.h
@@ -66,14 +66,14 @@ register_wide_hw_breakpoint_cpu(struct perf_event_attr *attr,
66 perf_overflow_handler_t triggered, 66 perf_overflow_handler_t triggered,
67 int cpu); 67 int cpu);
68 68
69extern struct perf_event ** 69extern struct perf_event * __percpu *
70register_wide_hw_breakpoint(struct perf_event_attr *attr, 70register_wide_hw_breakpoint(struct perf_event_attr *attr,
71 perf_overflow_handler_t triggered); 71 perf_overflow_handler_t triggered);
72 72
73extern int register_perf_hw_breakpoint(struct perf_event *bp); 73extern int register_perf_hw_breakpoint(struct perf_event *bp);
74extern int __register_perf_hw_breakpoint(struct perf_event *bp); 74extern int __register_perf_hw_breakpoint(struct perf_event *bp);
75extern void unregister_hw_breakpoint(struct perf_event *bp); 75extern void unregister_hw_breakpoint(struct perf_event *bp);
76extern void unregister_wide_hw_breakpoint(struct perf_event **cpu_events); 76extern void unregister_wide_hw_breakpoint(struct perf_event * __percpu *cpu_events);
77 77
78extern int dbg_reserve_bp_slot(struct perf_event *bp); 78extern int dbg_reserve_bp_slot(struct perf_event *bp);
79extern int dbg_release_bp_slot(struct perf_event *bp); 79extern int dbg_release_bp_slot(struct perf_event *bp);
@@ -100,7 +100,7 @@ static inline struct perf_event *
100register_wide_hw_breakpoint_cpu(struct perf_event_attr *attr, 100register_wide_hw_breakpoint_cpu(struct perf_event_attr *attr,
101 perf_overflow_handler_t triggered, 101 perf_overflow_handler_t triggered,
102 int cpu) { return NULL; } 102 int cpu) { return NULL; }
103static inline struct perf_event ** 103static inline struct perf_event * __percpu *
104register_wide_hw_breakpoint(struct perf_event_attr *attr, 104register_wide_hw_breakpoint(struct perf_event_attr *attr,
105 perf_overflow_handler_t triggered) { return NULL; } 105 perf_overflow_handler_t triggered) { return NULL; }
106static inline int 106static inline int
@@ -109,7 +109,7 @@ static inline int
109__register_perf_hw_breakpoint(struct perf_event *bp) { return -ENOSYS; } 109__register_perf_hw_breakpoint(struct perf_event *bp) { return -ENOSYS; }
110static inline void unregister_hw_breakpoint(struct perf_event *bp) { } 110static inline void unregister_hw_breakpoint(struct perf_event *bp) { }
111static inline void 111static inline void
112unregister_wide_hw_breakpoint(struct perf_event **cpu_events) { } 112unregister_wide_hw_breakpoint(struct perf_event * __percpu *cpu_events) { }
113static inline int 113static inline int
114reserve_bp_slot(struct perf_event *bp) {return -ENOSYS; } 114reserve_bp_slot(struct perf_event *bp) {return -ENOSYS; }
115static inline void release_bp_slot(struct perf_event *bp) { } 115static inline void release_bp_slot(struct perf_event *bp) { }
diff --git a/include/linux/i2c-algo-bit.h b/include/linux/i2c-algo-bit.h
index 111334f5b922..4f98148c11c3 100644
--- a/include/linux/i2c-algo-bit.h
+++ b/include/linux/i2c-algo-bit.h
@@ -36,6 +36,8 @@ struct i2c_algo_bit_data {
36 void (*setscl) (void *data, int state); 36 void (*setscl) (void *data, int state);
37 int (*getsda) (void *data); 37 int (*getsda) (void *data);
38 int (*getscl) (void *data); 38 int (*getscl) (void *data);
39 int (*pre_xfer) (struct i2c_adapter *);
40 void (*post_xfer) (struct i2c_adapter *);
39 41
40 /* local settings */ 42 /* local settings */
41 int udelay; /* half clock cycle time in us, 43 int udelay; /* half clock cycle time in us,
diff --git a/include/linux/i2c-xiic.h b/include/linux/i2c-xiic.h
new file mode 100644
index 000000000000..4f9f2256a97e
--- /dev/null
+++ b/include/linux/i2c-xiic.h
@@ -0,0 +1,43 @@
1/*
2 * i2c-xiic.h
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* Supports:
20 * Xilinx IIC
21 */
22
23#ifndef _LINUX_I2C_XIIC_H
24#define _LINUX_I2C_XIIC_H
25
26/**
27 * struct xiic_i2c_platform_data - Platform data of the Xilinx I2C driver
28 * @num_devices: Number of devices that shall be added when the driver
29 * is probed.
30 * @devices: The actuall devices to add.
31 *
32 * This purpose of this platform data struct is to be able to provide a number
33 * of devices that should be added to the I2C bus. The reason is that sometimes
34 * the I2C board info is not enough, a new PCI board can for instance be
35 * plugged into a standard PC, and the bus number might be unknown at
36 * early init time.
37 */
38struct xiic_i2c_platform_data {
39 u8 num_devices;
40 struct i2c_board_info const *devices;
41};
42
43#endif /* _LINUX_I2C_XIIC_H */
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index abec69b63d7e..b1ed1cd8e2a8 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -32,14 +32,6 @@ extern struct fs_struct init_fs;
32} 32}
33 33
34extern struct nsproxy init_nsproxy; 34extern struct nsproxy init_nsproxy;
35#define INIT_NSPROXY(nsproxy) { \
36 .pid_ns = &init_pid_ns, \
37 .count = ATOMIC_INIT(1), \
38 .uts_ns = &init_uts_ns, \
39 .mnt_ns = NULL, \
40 INIT_NET_NS(net_ns) \
41 INIT_IPC_NS(ipc_ns) \
42}
43 35
44#define INIT_SIGHAND(sighand) { \ 36#define INIT_SIGHAND(sighand) { \
45 .count = ATOMIC_INIT(1), \ 37 .count = ATOMIC_INIT(1), \
diff --git a/include/linux/input.h b/include/linux/input.h
index dc24effb6d0e..7ed2251b33f1 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -58,10 +58,10 @@ struct input_absinfo {
58 58
59#define EVIOCGVERSION _IOR('E', 0x01, int) /* get driver version */ 59#define EVIOCGVERSION _IOR('E', 0x01, int) /* get driver version */
60#define EVIOCGID _IOR('E', 0x02, struct input_id) /* get device ID */ 60#define EVIOCGID _IOR('E', 0x02, struct input_id) /* get device ID */
61#define EVIOCGREP _IOR('E', 0x03, int[2]) /* get repeat settings */ 61#define EVIOCGREP _IOR('E', 0x03, unsigned int[2]) /* get repeat settings */
62#define EVIOCSREP _IOW('E', 0x03, int[2]) /* set repeat settings */ 62#define EVIOCSREP _IOW('E', 0x03, unsigned int[2]) /* set repeat settings */
63#define EVIOCGKEYCODE _IOR('E', 0x04, int[2]) /* get keycode */ 63#define EVIOCGKEYCODE _IOR('E', 0x04, unsigned int[2]) /* get keycode */
64#define EVIOCSKEYCODE _IOW('E', 0x04, int[2]) /* set keycode */ 64#define EVIOCSKEYCODE _IOW('E', 0x04, unsigned int[2]) /* set keycode */
65 65
66#define EVIOCGNAME(len) _IOC(_IOC_READ, 'E', 0x06, len) /* get device name */ 66#define EVIOCGNAME(len) _IOC(_IOC_READ, 'E', 0x06, len) /* get device name */
67#define EVIOCGPHYS(len) _IOC(_IOC_READ, 'E', 0x07, len) /* get physical location */ 67#define EVIOCGPHYS(len) _IOC(_IOC_READ, 'E', 0x07, len) /* get physical location */
@@ -1142,8 +1142,10 @@ struct input_dev {
1142 unsigned int keycodemax; 1142 unsigned int keycodemax;
1143 unsigned int keycodesize; 1143 unsigned int keycodesize;
1144 void *keycode; 1144 void *keycode;
1145 int (*setkeycode)(struct input_dev *dev, int scancode, int keycode); 1145 int (*setkeycode)(struct input_dev *dev,
1146 int (*getkeycode)(struct input_dev *dev, int scancode, int *keycode); 1146 unsigned int scancode, unsigned int keycode);
1147 int (*getkeycode)(struct input_dev *dev,
1148 unsigned int scancode, unsigned int *keycode);
1147 1149
1148 struct ff_device *ff; 1150 struct ff_device *ff;
1149 1151
@@ -1415,8 +1417,10 @@ static inline void input_set_abs_params(struct input_dev *dev, int axis, int min
1415 dev->absbit[BIT_WORD(axis)] |= BIT_MASK(axis); 1417 dev->absbit[BIT_WORD(axis)] |= BIT_MASK(axis);
1416} 1418}
1417 1419
1418int input_get_keycode(struct input_dev *dev, int scancode, int *keycode); 1420int input_get_keycode(struct input_dev *dev,
1419int input_set_keycode(struct input_dev *dev, int scancode, int keycode); 1421 unsigned int scancode, unsigned int *keycode);
1422int input_set_keycode(struct input_dev *dev,
1423 unsigned int scancode, unsigned int keycode);
1420 1424
1421extern struct class input_class; 1425extern struct class input_class;
1422 1426
diff --git a/include/linux/iocontext.h b/include/linux/iocontext.h
index 1195a806fe0c..a0bb301afac0 100644
--- a/include/linux/iocontext.h
+++ b/include/linux/iocontext.h
@@ -42,7 +42,7 @@ struct io_context {
42 unsigned short ioprio; 42 unsigned short ioprio;
43 unsigned short ioprio_changed; 43 unsigned short ioprio_changed;
44 44
45#ifdef CONFIG_BLK_CGROUP 45#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
46 unsigned short cgroup_changed; 46 unsigned short cgroup_changed;
47#endif 47#endif
48 48
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index dda98410d588..71ab79da7e7f 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -34,22 +34,24 @@ struct resource_list {
34 */ 34 */
35#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ 35#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
36 36
37#define IORESOURCE_TYPE_BITS 0x00000f00 /* Resource type */ 37#define IORESOURCE_TYPE_BITS 0x00001f00 /* Resource type */
38#define IORESOURCE_IO 0x00000100 38#define IORESOURCE_IO 0x00000100
39#define IORESOURCE_MEM 0x00000200 39#define IORESOURCE_MEM 0x00000200
40#define IORESOURCE_IRQ 0x00000400 40#define IORESOURCE_IRQ 0x00000400
41#define IORESOURCE_DMA 0x00000800 41#define IORESOURCE_DMA 0x00000800
42#define IORESOURCE_BUS 0x00001000
42 43
43#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */ 44#define IORESOURCE_PREFETCH 0x00002000 /* No side effects */
44#define IORESOURCE_READONLY 0x00002000 45#define IORESOURCE_READONLY 0x00004000
45#define IORESOURCE_CACHEABLE 0x00004000 46#define IORESOURCE_CACHEABLE 0x00008000
46#define IORESOURCE_RANGELENGTH 0x00008000 47#define IORESOURCE_RANGELENGTH 0x00010000
47#define IORESOURCE_SHADOWABLE 0x00010000 48#define IORESOURCE_SHADOWABLE 0x00020000
48 49
49#define IORESOURCE_SIZEALIGN 0x00020000 /* size indicates alignment */ 50#define IORESOURCE_SIZEALIGN 0x00040000 /* size indicates alignment */
50#define IORESOURCE_STARTALIGN 0x00040000 /* start field is alignment */ 51#define IORESOURCE_STARTALIGN 0x00080000 /* start field is alignment */
51 52
52#define IORESOURCE_MEM_64 0x00100000 53#define IORESOURCE_MEM_64 0x00100000
54#define IORESOURCE_WINDOW 0x00200000 /* forwarded by bridge */
53 55
54#define IORESOURCE_EXCLUSIVE 0x08000000 /* Userland may not map this resource */ 56#define IORESOURCE_EXCLUSIVE 0x08000000 /* Userland may not map this resource */
55#define IORESOURCE_DISABLED 0x10000000 57#define IORESOURCE_DISABLED 0x10000000
diff --git a/include/linux/ipc_namespace.h b/include/linux/ipc_namespace.h
index 07baa38bce37..51952989ad42 100644
--- a/include/linux/ipc_namespace.h
+++ b/include/linux/ipc_namespace.h
@@ -62,11 +62,6 @@ extern struct ipc_namespace init_ipc_ns;
62extern atomic_t nr_ipc_ns; 62extern atomic_t nr_ipc_ns;
63 63
64extern spinlock_t mq_lock; 64extern spinlock_t mq_lock;
65#if defined(CONFIG_POSIX_MQUEUE) || defined(CONFIG_SYSVIPC)
66#define INIT_IPC_NS(ns) .ns = &init_ipc_ns,
67#else
68#define INIT_IPC_NS(ns)
69#endif
70 65
71#ifdef CONFIG_SYSVIPC 66#ifdef CONFIG_SYSVIPC
72extern int register_ipcns_notifier(struct ipc_namespace *); 67extern int register_ipcns_notifier(struct ipc_namespace *);
diff --git a/include/linux/ipmi_smi.h b/include/linux/ipmi_smi.h
index f7c9c75a2775..4b48318ac542 100644
--- a/include/linux/ipmi_smi.h
+++ b/include/linux/ipmi_smi.h
@@ -39,7 +39,6 @@
39#include <linux/module.h> 39#include <linux/module.h>
40#include <linux/device.h> 40#include <linux/device.h>
41#include <linux/platform_device.h> 41#include <linux/platform_device.h>
42#include <linux/ipmi_smi.h>
43 42
44/* This files describes the interface for IPMI system management interface 43/* This files describes the interface for IPMI system management interface
45 drivers to bind into the IPMI message handler. */ 44 drivers to bind into the IPMI message handler. */
diff --git a/include/linux/kmod.h b/include/linux/kmod.h
index 384ca8bbf1ac..facb27fe7de0 100644
--- a/include/linux/kmod.h
+++ b/include/linux/kmod.h
@@ -27,6 +27,7 @@
27#define KMOD_PATH_LEN 256 27#define KMOD_PATH_LEN 256
28 28
29#ifdef CONFIG_MODULES 29#ifdef CONFIG_MODULES
30extern char modprobe_path[]; /* for sysctl */
30/* modprobe exit status on success, -ve on error. Return value 31/* modprobe exit status on success, -ve on error. Return value
31 * usually useless though. */ 32 * usually useless though. */
32extern int __request_module(bool wait, const char *name, ...) \ 33extern int __request_module(bool wait, const char *name, ...) \
diff --git a/include/linux/kobject.h b/include/linux/kobject.h
index 58ae8e00fcdd..3950d3c2850d 100644
--- a/include/linux/kobject.h
+++ b/include/linux/kobject.h
@@ -106,7 +106,7 @@ extern char *kobject_get_path(struct kobject *kobj, gfp_t flag);
106 106
107struct kobj_type { 107struct kobj_type {
108 void (*release)(struct kobject *kobj); 108 void (*release)(struct kobject *kobj);
109 struct sysfs_ops *sysfs_ops; 109 const struct sysfs_ops *sysfs_ops;
110 struct attribute **default_attrs; 110 struct attribute **default_attrs;
111}; 111};
112 112
@@ -118,9 +118,9 @@ struct kobj_uevent_env {
118}; 118};
119 119
120struct kset_uevent_ops { 120struct kset_uevent_ops {
121 int (*filter)(struct kset *kset, struct kobject *kobj); 121 int (* const filter)(struct kset *kset, struct kobject *kobj);
122 const char *(*name)(struct kset *kset, struct kobject *kobj); 122 const char *(* const name)(struct kset *kset, struct kobject *kobj);
123 int (*uevent)(struct kset *kset, struct kobject *kobj, 123 int (* const uevent)(struct kset *kset, struct kobject *kobj,
124 struct kobj_uevent_env *env); 124 struct kobj_uevent_env *env);
125}; 125};
126 126
@@ -132,7 +132,7 @@ struct kobj_attribute {
132 const char *buf, size_t count); 132 const char *buf, size_t count);
133}; 133};
134 134
135extern struct sysfs_ops kobj_sysfs_ops; 135extern const struct sysfs_ops kobj_sysfs_ops;
136 136
137/** 137/**
138 * struct kset - a set of kobjects of a specific type, belonging to a specific subsystem. 138 * struct kset - a set of kobjects of a specific type, belonging to a specific subsystem.
@@ -155,14 +155,14 @@ struct kset {
155 struct list_head list; 155 struct list_head list;
156 spinlock_t list_lock; 156 spinlock_t list_lock;
157 struct kobject kobj; 157 struct kobject kobj;
158 struct kset_uevent_ops *uevent_ops; 158 const struct kset_uevent_ops *uevent_ops;
159}; 159};
160 160
161extern void kset_init(struct kset *kset); 161extern void kset_init(struct kset *kset);
162extern int __must_check kset_register(struct kset *kset); 162extern int __must_check kset_register(struct kset *kset);
163extern void kset_unregister(struct kset *kset); 163extern void kset_unregister(struct kset *kset);
164extern struct kset * __must_check kset_create_and_add(const char *name, 164extern struct kset * __must_check kset_create_and_add(const char *name,
165 struct kset_uevent_ops *u, 165 const struct kset_uevent_ops *u,
166 struct kobject *parent_kobj); 166 struct kobject *parent_kobj);
167 167
168static inline struct kset *to_kset(struct kobject *kobj) 168static inline struct kset *to_kset(struct kobject *kobj)
diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h
index 10206a87da19..a03977a96d7e 100644
--- a/include/linux/lockdep.h
+++ b/include/linux/lockdep.h
@@ -12,6 +12,10 @@
12struct task_struct; 12struct task_struct;
13struct lockdep_map; 13struct lockdep_map;
14 14
15/* for sysctl */
16extern int prove_locking;
17extern int lock_stat;
18
15#ifdef CONFIG_LOCKDEP 19#ifdef CONFIG_LOCKDEP
16 20
17#include <linux/linkage.h> 21#include <linux/linkage.h>
diff --git a/include/linux/lru_cache.h b/include/linux/lru_cache.h
index 3a2b2d9b0472..de48d167568b 100644
--- a/include/linux/lru_cache.h
+++ b/include/linux/lru_cache.h
@@ -64,7 +64,7 @@ For crash recovery after replication node failure,
64 usually the condition is softened to regions that _may_ have been target of 64 usually the condition is softened to regions that _may_ have been target of
65 in-flight WRITE IO, e.g. by only lazily clearing the on-disk write-intent 65 in-flight WRITE IO, e.g. by only lazily clearing the on-disk write-intent
66 bitmap, trading frequency of meta data transactions against amount of 66 bitmap, trading frequency of meta data transactions against amount of
67 (possibly unneccessary) resync traffic. 67 (possibly unnecessary) resync traffic.
68 68
69 If we set a hard limit on the area that may be "hot" at any given time, we 69 If we set a hard limit on the area that may be "hot" at any given time, we
70 limit the amount of resync traffic needed for crash recovery. 70 limit the amount of resync traffic needed for crash recovery.
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index 1f9b119f4ace..44301c6affa8 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -124,7 +124,6 @@ static inline bool mem_cgroup_disabled(void)
124 return false; 124 return false;
125} 125}
126 126
127extern bool mem_cgroup_oom_called(struct task_struct *task);
128void mem_cgroup_update_file_mapped(struct page *page, int val); 127void mem_cgroup_update_file_mapped(struct page *page, int val);
129unsigned long mem_cgroup_soft_limit_reclaim(struct zone *zone, int order, 128unsigned long mem_cgroup_soft_limit_reclaim(struct zone *zone, int order,
130 gfp_t gfp_mask, int nid, 129 gfp_t gfp_mask, int nid,
@@ -258,11 +257,6 @@ static inline bool mem_cgroup_disabled(void)
258 return true; 257 return true;
259} 258}
260 259
261static inline bool mem_cgroup_oom_called(struct task_struct *task)
262{
263 return false;
264}
265
266static inline int 260static inline int
267mem_cgroup_inactive_anon_is_low(struct mem_cgroup *memcg) 261mem_cgroup_inactive_anon_is_low(struct mem_cgroup *memcg)
268{ 262{
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 3899395a03de..e70f21beb4b4 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -971,7 +971,13 @@ static inline void setmax_mm_hiwater_rss(unsigned long *maxrss,
971 *maxrss = hiwater_rss; 971 *maxrss = hiwater_rss;
972} 972}
973 973
974#if defined(SPLIT_RSS_COUNTING)
974void sync_mm_rss(struct task_struct *task, struct mm_struct *mm); 975void sync_mm_rss(struct task_struct *task, struct mm_struct *mm);
976#else
977static inline void sync_mm_rss(struct task_struct *task, struct mm_struct *mm)
978{
979}
980#endif
975 981
976/* 982/*
977 * A callback you can register to apply pressure to ageable caches. 983 * A callback you can register to apply pressure to ageable caches.
@@ -1459,5 +1465,7 @@ extern void shake_page(struct page *p, int access);
1459extern atomic_long_t mce_bad_pages; 1465extern atomic_long_t mce_bad_pages;
1460extern int soft_offline_page(struct page *page, int flags); 1466extern int soft_offline_page(struct page *page, int flags);
1461 1467
1468extern void dump_page(struct page *page);
1469
1462#endif /* __KERNEL__ */ 1470#endif /* __KERNEL__ */
1463#endif /* _LINUX_MM_H */ 1471#endif /* _LINUX_MM_H */
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 048b46270aa5..b8bb9a6a1f37 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -203,7 +203,7 @@ enum {
203 NR_MM_COUNTERS 203 NR_MM_COUNTERS
204}; 204};
205 205
206#if USE_SPLIT_PTLOCKS 206#if USE_SPLIT_PTLOCKS && defined(CONFIG_MMU)
207#define SPLIT_RSS_COUNTING 207#define SPLIT_RSS_COUNTING
208struct mm_rss_stat { 208struct mm_rss_stat {
209 atomic_long_t count[NR_MM_COUNTERS]; 209 atomic_long_t count[NR_MM_COUNTERS];
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index bc209d8b7b5c..cf9e458e96b0 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -342,7 +342,7 @@ struct zone {
342 * prev_priority holds the scanning priority for this zone. It is 342 * prev_priority holds the scanning priority for this zone. It is
343 * defined as the scanning priority at which we achieved our reclaim 343 * defined as the scanning priority at which we achieved our reclaim
344 * target at the previous try_to_free_pages() or balance_pgdat() 344 * target at the previous try_to_free_pages() or balance_pgdat()
345 * invokation. 345 * invocation.
346 * 346 *
347 * We use prev_priority as a measure of how much stress page reclaim is 347 * We use prev_priority as a measure of how much stress page reclaim is
348 * under - it drives the swappiness decision: whether to unmap mapped 348 * under - it drives the swappiness decision: whether to unmap mapped
diff --git a/include/linux/module.h b/include/linux/module.h
index dd618eb026aa..5e869ffd34aa 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -175,6 +175,7 @@ struct notifier_block;
175 175
176#ifdef CONFIG_MODULES 176#ifdef CONFIG_MODULES
177 177
178extern int modules_disabled; /* for sysctl */
178/* Get/put a kernel symbol (calls must be symmetric) */ 179/* Get/put a kernel symbol (calls must be symmetric) */
179void *__symbol_get(const char *symbol); 180void *__symbol_get(const char *symbol);
180void *__symbol_get_gpl(const char *symbol); 181void *__symbol_get_gpl(const char *symbol);
diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h
index ce38f1caa5e1..34066e65fdeb 100644
--- a/include/linux/msdos_fs.h
+++ b/include/linux/msdos_fs.h
@@ -15,6 +15,7 @@
15#define MSDOS_DPB_BITS 4 /* log2(MSDOS_DPB) */ 15#define MSDOS_DPB_BITS 4 /* log2(MSDOS_DPB) */
16#define MSDOS_DPS (SECTOR_SIZE / sizeof(struct msdos_dir_entry)) 16#define MSDOS_DPS (SECTOR_SIZE / sizeof(struct msdos_dir_entry))
17#define MSDOS_DPS_BITS 4 /* log2(MSDOS_DPS) */ 17#define MSDOS_DPS_BITS 4 /* log2(MSDOS_DPS) */
18#define MSDOS_LONGNAME 256 /* maximum name length */
18#define CF_LE_W(v) le16_to_cpu(v) 19#define CF_LE_W(v) le16_to_cpu(v)
19#define CF_LE_L(v) le32_to_cpu(v) 20#define CF_LE_L(v) le32_to_cpu(v)
20#define CT_LE_W(v) cpu_to_le16(v) 21#define CT_LE_W(v) cpu_to_le16(v)
@@ -47,8 +48,8 @@
47#define DELETED_FLAG 0xe5 /* marks file as deleted when in name[0] */ 48#define DELETED_FLAG 0xe5 /* marks file as deleted when in name[0] */
48#define IS_FREE(n) (!*(n) || *(n) == DELETED_FLAG) 49#define IS_FREE(n) (!*(n) || *(n) == DELETED_FLAG)
49 50
51#define FAT_LFN_LEN 255 /* maximum long name length */
50#define MSDOS_NAME 11 /* maximum name length */ 52#define MSDOS_NAME 11 /* maximum name length */
51#define MSDOS_LONGNAME 256 /* maximum name length */
52#define MSDOS_SLOTS 21 /* max # of slots for short and long names */ 53#define MSDOS_SLOTS 21 /* max # of slots for short and long names */
53#define MSDOS_DOT ". " /* ".", padded to MSDOS_NAME chars */ 54#define MSDOS_DOT ". " /* ".", padded to MSDOS_NAME chars */
54#define MSDOS_DOTDOT ".. " /* "..", padded to MSDOS_NAME chars */ 55#define MSDOS_DOTDOT ".. " /* "..", padded to MSDOS_NAME chars */
diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h
index c4fa64b585ff..dba35e413371 100644
--- a/include/linux/nodemask.h
+++ b/include/linux/nodemask.h
@@ -483,7 +483,7 @@ static inline int num_node_state(enum node_states state)
483 type *name = kmalloc(sizeof(*name), gfp_flags) 483 type *name = kmalloc(sizeof(*name), gfp_flags)
484#define NODEMASK_FREE(m) kfree(m) 484#define NODEMASK_FREE(m) kfree(m)
485#else 485#else
486#define NODEMASK_ALLOC(type, name, gfp_flags) type _name, *name = &_name 486#define NODEMASK_ALLOC(type, name, gfp_flags) type _##name, *name = &_##name
487#define NODEMASK_FREE(m) do {} while (0) 487#define NODEMASK_FREE(m) do {} while (0)
488#endif 488#endif
489 489
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h
index b0e4eb126236..30b08136fdf3 100644
--- a/include/linux/page_cgroup.h
+++ b/include/linux/page_cgroup.h
@@ -118,6 +118,8 @@ static inline void __init page_cgroup_init_flatmem(void)
118#include <linux/swap.h> 118#include <linux/swap.h>
119 119
120#ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP 120#ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP
121extern unsigned short swap_cgroup_cmpxchg(swp_entry_t ent,
122 unsigned short old, unsigned short new);
121extern unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id); 123extern unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id);
122extern unsigned short lookup_swap_cgroup(swp_entry_t ent); 124extern unsigned short lookup_swap_cgroup(swp_entry_t ent);
123extern int swap_cgroup_swapon(int type, unsigned long max_pages); 125extern int swap_cgroup_swapon(int type, unsigned long max_pages);
diff --git a/include/linux/pci-dma.h b/include/linux/pci-dma.h
new file mode 100644
index 000000000000..549a041f9c08
--- /dev/null
+++ b/include/linux/pci-dma.h
@@ -0,0 +1,11 @@
1#ifndef _LINUX_PCI_DMA_H
2#define _LINUX_PCI_DMA_H
3
4#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) DEFINE_DMA_UNMAP_ADDR(ADDR_NAME);
5#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) DEFINE_DMA_UNMAP_LEN(LEN_NAME);
6#define pci_unmap_addr dma_unmap_addr
7#define pci_unmap_addr_set dma_unmap_addr_set
8#define pci_unmap_len dma_unmap_len
9#define pci_unmap_len_set dma_unmap_len_set
10
11#endif
diff --git a/include/linux/pci.h b/include/linux/pci.h
index cd5809a5963e..a788fa12ff31 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -769,8 +769,6 @@ int pci_try_set_mwi(struct pci_dev *dev);
769void pci_clear_mwi(struct pci_dev *dev); 769void pci_clear_mwi(struct pci_dev *dev);
770void pci_intx(struct pci_dev *dev, int enable); 770void pci_intx(struct pci_dev *dev, int enable);
771void pci_msi_off(struct pci_dev *dev); 771void pci_msi_off(struct pci_dev *dev);
772int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
773int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
774int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); 772int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
775int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); 773int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
776int pcix_get_max_mmrbc(struct pci_dev *dev); 774int pcix_get_max_mmrbc(struct pci_dev *dev);
@@ -904,6 +902,7 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
904 unsigned int command_bits, bool change_bridge); 902 unsigned int command_bits, bool change_bridge);
905/* kmem_cache style wrapper around pci_alloc_consistent() */ 903/* kmem_cache style wrapper around pci_alloc_consistent() */
906 904
905#include <linux/pci-dma.h>
907#include <linux/dmapool.h> 906#include <linux/dmapool.h>
908 907
909#define pci_pool dma_pool 908#define pci_pool dma_pool
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 7b18b4fd5df7..6f8cd7da1a01 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -487,9 +487,8 @@ struct hw_perf_event {
487 struct hrtimer hrtimer; 487 struct hrtimer hrtimer;
488 }; 488 };
489#ifdef CONFIG_HAVE_HW_BREAKPOINT 489#ifdef CONFIG_HAVE_HW_BREAKPOINT
490 union { /* breakpoint */ 490 /* breakpoint */
491 struct arch_hw_breakpoint info; 491 struct arch_hw_breakpoint info;
492 };
493#endif 492#endif
494 }; 493 };
495 atomic64_t prev_count; 494 atomic64_t prev_count;
@@ -802,6 +801,13 @@ struct perf_sample_data {
802 struct perf_raw_record *raw; 801 struct perf_raw_record *raw;
803}; 802};
804 803
804static inline
805void perf_sample_data_init(struct perf_sample_data *data, u64 addr)
806{
807 data->addr = addr;
808 data->raw = NULL;
809}
810
805extern void perf_output_sample(struct perf_output_handle *handle, 811extern void perf_output_sample(struct perf_output_handle *handle,
806 struct perf_event_header *header, 812 struct perf_event_header *header,
807 struct perf_sample_data *data, 813 struct perf_sample_data *data,
@@ -858,6 +864,21 @@ extern int sysctl_perf_event_paranoid;
858extern int sysctl_perf_event_mlock; 864extern int sysctl_perf_event_mlock;
859extern int sysctl_perf_event_sample_rate; 865extern int sysctl_perf_event_sample_rate;
860 866
867static inline bool perf_paranoid_tracepoint_raw(void)
868{
869 return sysctl_perf_event_paranoid > -1;
870}
871
872static inline bool perf_paranoid_cpu(void)
873{
874 return sysctl_perf_event_paranoid > 0;
875}
876
877static inline bool perf_paranoid_kernel(void)
878{
879 return sysctl_perf_event_paranoid > 1;
880}
881
861extern void perf_event_init(void); 882extern void perf_event_init(void);
862extern void perf_tp_event(int event_id, u64 addr, u64 count, void *record, int entry_size); 883extern void perf_tp_event(int event_id, u64 addr, u64 count, void *record, int entry_size);
863extern void perf_bp_event(struct perf_event *event, void *data); 884extern void perf_bp_event(struct perf_event *event, void *data);
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 71ff887ca44e..212da17d06af 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -21,7 +21,7 @@ struct platform_device {
21 u32 num_resources; 21 u32 num_resources;
22 struct resource * resource; 22 struct resource * resource;
23 23
24 struct platform_device_id *id_entry; 24 const struct platform_device_id *id_entry;
25 25
26 /* arch specific additions */ 26 /* arch specific additions */
27 struct pdev_archdata archdata; 27 struct pdev_archdata archdata;
@@ -62,7 +62,7 @@ struct platform_driver {
62 int (*suspend)(struct platform_device *, pm_message_t state); 62 int (*suspend)(struct platform_device *, pm_message_t state);
63 int (*resume)(struct platform_device *); 63 int (*resume)(struct platform_device *);
64 struct device_driver driver; 64 struct device_driver driver;
65 struct platform_device_id *id_table; 65 const struct platform_device_id *id_table;
66}; 66};
67 67
68extern int platform_driver_register(struct platform_driver *); 68extern int platform_driver_register(struct platform_driver *);
@@ -77,6 +77,11 @@ extern int platform_driver_probe(struct platform_driver *driver,
77#define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) 77#define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev)
78#define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data)) 78#define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data))
79 79
80extern struct platform_device *platform_create_bundle(struct platform_driver *driver,
81 int (*probe)(struct platform_device *),
82 struct resource *res, unsigned int n_res,
83 const void *data, size_t size);
84
80/* early platform driver interface */ 85/* early platform driver interface */
81struct early_platform_driver { 86struct early_platform_driver {
82 const char *class_str; 87 const char *class_str;
diff --git a/include/linux/poll.h b/include/linux/poll.h
index 6673743946f7..600cc1fde64d 100644
--- a/include/linux/poll.h
+++ b/include/linux/poll.h
@@ -10,8 +10,10 @@
10#include <linux/wait.h> 10#include <linux/wait.h>
11#include <linux/string.h> 11#include <linux/string.h>
12#include <linux/fs.h> 12#include <linux/fs.h>
13#include <linux/sysctl.h>
13#include <asm/uaccess.h> 14#include <asm/uaccess.h>
14 15
16extern struct ctl_table epoll_table[]; /* for sysctl */
15/* ~832 bytes of stack space used max in sys_select/sys_poll before allocating 17/* ~832 bytes of stack space used max in sys_select/sys_poll before allocating
16 additional memory. */ 18 additional memory. */
17#define MAX_STACK_ALLOC 832 19#define MAX_STACK_ALLOC 832
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index b5d096d3a9be..ebd2b8fb00d0 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -82,6 +82,7 @@ enum power_supply_property {
82 POWER_SUPPLY_PROP_PRESENT, 82 POWER_SUPPLY_PROP_PRESENT,
83 POWER_SUPPLY_PROP_ONLINE, 83 POWER_SUPPLY_PROP_ONLINE,
84 POWER_SUPPLY_PROP_TECHNOLOGY, 84 POWER_SUPPLY_PROP_TECHNOLOGY,
85 POWER_SUPPLY_PROP_CYCLE_COUNT,
85 POWER_SUPPLY_PROP_VOLTAGE_MAX, 86 POWER_SUPPLY_PROP_VOLTAGE_MAX,
86 POWER_SUPPLY_PROP_VOLTAGE_MIN, 87 POWER_SUPPLY_PROP_VOLTAGE_MIN,
87 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, 88 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index c5eab89da51e..e1fb60729979 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -264,6 +264,9 @@ static inline void user_enable_single_step(struct task_struct *task)
264static inline void user_disable_single_step(struct task_struct *task) 264static inline void user_disable_single_step(struct task_struct *task)
265{ 265{
266} 266}
267#else
268extern void user_enable_single_step(struct task_struct *);
269extern void user_disable_single_step(struct task_struct *);
267#endif /* arch_has_single_step */ 270#endif /* arch_has_single_step */
268 271
269#ifndef arch_has_block_step 272#ifndef arch_has_block_step
@@ -291,6 +294,8 @@ static inline void user_enable_block_step(struct task_struct *task)
291{ 294{
292 BUG(); /* This can never be called. */ 295 BUG(); /* This can never be called. */
293} 296}
297#else
298extern void user_enable_block_step(struct task_struct *);
294#endif /* arch_has_block_step */ 299#endif /* arch_has_block_step */
295 300
296#ifdef ARCH_HAS_USER_SINGLE_STEP_INFO 301#ifdef ARCH_HAS_USER_SINGLE_STEP_INFO
diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h
index 9c295411d01f..5210a5c60877 100644
--- a/include/linux/rbtree.h
+++ b/include/linux/rbtree.h
@@ -25,10 +25,10 @@
25 25
26 Some example of insert and search follows here. The search is a plain 26 Some example of insert and search follows here. The search is a plain
27 normal search over an ordered tree. The insert instead must be implemented 27 normal search over an ordered tree. The insert instead must be implemented
28 int two steps: as first thing the code must insert the element in 28 in two steps: First, the code must insert the element in order as a red leaf
29 order as a red leaf in the tree, then the support library function 29 in the tree, and then the support library function rb_insert_color() must
30 rb_insert_color() must be called. Such function will do the 30 be called. Such function will do the not trivial work to rebalance the
31 not trivial work to rebalance the rbtree if necessary. 31 rbtree, if necessary.
32 32
33----------------------------------------------------------------------- 33-----------------------------------------------------------------------
34static inline struct page * rb_search_page_cache(struct inode * inode, 34static inline struct page * rb_search_page_cache(struct inode * inode,
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index c84373626336..3024050c82a1 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -41,6 +41,10 @@
41#include <linux/lockdep.h> 41#include <linux/lockdep.h>
42#include <linux/completion.h> 42#include <linux/completion.h>
43 43
44#ifdef CONFIG_RCU_TORTURE_TEST
45extern int rcutorture_runnable; /* for sysctl */
46#endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
47
44/** 48/**
45 * struct rcu_head - callback structure for use with RCU 49 * struct rcu_head - callback structure for use with RCU
46 * @next: next update requests in a list 50 * @next: next update requests in a list
@@ -97,6 +101,11 @@ extern struct lockdep_map rcu_sched_lock_map;
97# define rcu_read_release_sched() \ 101# define rcu_read_release_sched() \
98 lock_release(&rcu_sched_lock_map, 1, _THIS_IP_) 102 lock_release(&rcu_sched_lock_map, 1, _THIS_IP_)
99 103
104static inline int debug_lockdep_rcu_enabled(void)
105{
106 return likely(rcu_scheduler_active && debug_locks);
107}
108
100/** 109/**
101 * rcu_read_lock_held - might we be in RCU read-side critical section? 110 * rcu_read_lock_held - might we be in RCU read-side critical section?
102 * 111 *
@@ -104,12 +113,14 @@ extern struct lockdep_map rcu_sched_lock_map;
104 * an RCU read-side critical section. In absence of CONFIG_PROVE_LOCKING, 113 * an RCU read-side critical section. In absence of CONFIG_PROVE_LOCKING,
105 * this assumes we are in an RCU read-side critical section unless it can 114 * this assumes we are in an RCU read-side critical section unless it can
106 * prove otherwise. 115 * prove otherwise.
116 *
117 * Check rcu_scheduler_active to prevent false positives during boot.
107 */ 118 */
108static inline int rcu_read_lock_held(void) 119static inline int rcu_read_lock_held(void)
109{ 120{
110 if (debug_locks) 121 if (!debug_lockdep_rcu_enabled())
111 return lock_is_held(&rcu_lock_map); 122 return 1;
112 return 1; 123 return lock_is_held(&rcu_lock_map);
113} 124}
114 125
115/** 126/**
@@ -119,12 +130,14 @@ static inline int rcu_read_lock_held(void)
119 * an RCU-bh read-side critical section. In absence of CONFIG_PROVE_LOCKING, 130 * an RCU-bh read-side critical section. In absence of CONFIG_PROVE_LOCKING,
120 * this assumes we are in an RCU-bh read-side critical section unless it can 131 * this assumes we are in an RCU-bh read-side critical section unless it can
121 * prove otherwise. 132 * prove otherwise.
133 *
134 * Check rcu_scheduler_active to prevent false positives during boot.
122 */ 135 */
123static inline int rcu_read_lock_bh_held(void) 136static inline int rcu_read_lock_bh_held(void)
124{ 137{
125 if (debug_locks) 138 if (!debug_lockdep_rcu_enabled())
126 return lock_is_held(&rcu_bh_lock_map); 139 return 1;
127 return 1; 140 return lock_is_held(&rcu_bh_lock_map);
128} 141}
129 142
130/** 143/**
@@ -135,15 +148,26 @@ static inline int rcu_read_lock_bh_held(void)
135 * this assumes we are in an RCU-sched read-side critical section unless it 148 * this assumes we are in an RCU-sched read-side critical section unless it
136 * can prove otherwise. Note that disabling of preemption (including 149 * can prove otherwise. Note that disabling of preemption (including
137 * disabling irqs) counts as an RCU-sched read-side critical section. 150 * disabling irqs) counts as an RCU-sched read-side critical section.
151 *
152 * Check rcu_scheduler_active to prevent false positives during boot.
138 */ 153 */
154#ifdef CONFIG_PREEMPT
139static inline int rcu_read_lock_sched_held(void) 155static inline int rcu_read_lock_sched_held(void)
140{ 156{
141 int lockdep_opinion = 0; 157 int lockdep_opinion = 0;
142 158
159 if (!debug_lockdep_rcu_enabled())
160 return 1;
143 if (debug_locks) 161 if (debug_locks)
144 lockdep_opinion = lock_is_held(&rcu_sched_lock_map); 162 lockdep_opinion = lock_is_held(&rcu_sched_lock_map);
145 return lockdep_opinion || preempt_count() != 0 || !rcu_scheduler_active; 163 return lockdep_opinion || preempt_count() != 0;
164}
165#else /* #ifdef CONFIG_PREEMPT */
166static inline int rcu_read_lock_sched_held(void)
167{
168 return 1;
146} 169}
170#endif /* #else #ifdef CONFIG_PREEMPT */
147 171
148#else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ 172#else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
149 173
@@ -164,10 +188,17 @@ static inline int rcu_read_lock_bh_held(void)
164 return 1; 188 return 1;
165} 189}
166 190
191#ifdef CONFIG_PREEMPT
167static inline int rcu_read_lock_sched_held(void) 192static inline int rcu_read_lock_sched_held(void)
168{ 193{
169 return preempt_count() != 0 || !rcu_scheduler_active; 194 return !rcu_scheduler_active || preempt_count() != 0;
195}
196#else /* #ifdef CONFIG_PREEMPT */
197static inline int rcu_read_lock_sched_held(void)
198{
199 return 1;
170} 200}
201#endif /* #else #ifdef CONFIG_PREEMPT */
171 202
172#endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ 203#endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */
173 204
@@ -184,7 +215,7 @@ static inline int rcu_read_lock_sched_held(void)
184 */ 215 */
185#define rcu_dereference_check(p, c) \ 216#define rcu_dereference_check(p, c) \
186 ({ \ 217 ({ \
187 if (debug_locks && !(c)) \ 218 if (debug_lockdep_rcu_enabled() && !(c)) \
188 lockdep_rcu_dereference(__FILE__, __LINE__); \ 219 lockdep_rcu_dereference(__FILE__, __LINE__); \
189 rcu_dereference_raw(p); \ 220 rcu_dereference_raw(p); \
190 }) 221 })
diff --git a/include/linux/reboot.h b/include/linux/reboot.h
index 988e55fe649b..3005d5a7fce5 100644
--- a/include/linux/reboot.h
+++ b/include/linux/reboot.h
@@ -64,6 +64,7 @@ extern void kernel_restart(char *cmd);
64extern void kernel_halt(void); 64extern void kernel_halt(void);
65extern void kernel_power_off(void); 65extern void kernel_power_off(void);
66 66
67extern int C_A_D; /* for sysctl */
67void ctrl_alt_del(void); 68void ctrl_alt_del(void);
68 69
69#define POWEROFF_CMD_PATH_LEN 256 70#define POWEROFF_CMD_PATH_LEN 256
diff --git a/include/linux/rfkill.h b/include/linux/rfkill.h
index 97059d08a626..4f82326eb294 100644
--- a/include/linux/rfkill.h
+++ b/include/linux/rfkill.h
@@ -29,7 +29,7 @@
29/** 29/**
30 * enum rfkill_type - type of rfkill switch. 30 * enum rfkill_type - type of rfkill switch.
31 * 31 *
32 * @RFKILL_TYPE_ALL: toggles all switches (userspace only) 32 * @RFKILL_TYPE_ALL: toggles all switches (requests only - not a switch type)
33 * @RFKILL_TYPE_WLAN: switch is on a 802.11 wireless network device. 33 * @RFKILL_TYPE_WLAN: switch is on a 802.11 wireless network device.
34 * @RFKILL_TYPE_BLUETOOTH: switch is on a bluetooth device. 34 * @RFKILL_TYPE_BLUETOOTH: switch is on a bluetooth device.
35 * @RFKILL_TYPE_UWB: switch is on a ultra wideband device. 35 * @RFKILL_TYPE_UWB: switch is on a ultra wideband device.
diff --git a/include/linux/rtc.h b/include/linux/rtc.h
index 60f88a7fb13d..14dbc83ded20 100644
--- a/include/linux/rtc.h
+++ b/include/linux/rtc.h
@@ -238,6 +238,12 @@ static inline bool is_leap_year(unsigned int year)
238 return (!(year % 4) && (year % 100)) || !(year % 400); 238 return (!(year % 4) && (year % 100)) || !(year % 400);
239} 239}
240 240
241#ifdef CONFIG_RTC_HCTOSYS
242extern int rtc_hctosys_ret;
243#else
244#define rtc_hctosys_ret -ENODEV
245#endif
246
241#endif /* __KERNEL__ */ 247#endif /* __KERNEL__ */
242 248
243#endif /* _LINUX_RTC_H_ */ 249#endif /* _LINUX_RTC_H_ */
diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h
index 281d8fd775e8..8d522ffeda33 100644
--- a/include/linux/rtmutex.h
+++ b/include/linux/rtmutex.h
@@ -16,6 +16,8 @@
16#include <linux/plist.h> 16#include <linux/plist.h>
17#include <linux/spinlock_types.h> 17#include <linux/spinlock_types.h>
18 18
19extern int max_lock_depth; /* for sysctl */
20
19/** 21/**
20 * The rt_mutex structure 22 * The rt_mutex structure
21 * 23 *
diff --git a/include/linux/rwlock.h b/include/linux/rwlock.h
index 71e0b00b6f2c..bc2994ed66e1 100644
--- a/include/linux/rwlock.h
+++ b/include/linux/rwlock.h
@@ -29,25 +29,25 @@ do { \
29#endif 29#endif
30 30
31#ifdef CONFIG_DEBUG_SPINLOCK 31#ifdef CONFIG_DEBUG_SPINLOCK
32 extern void do_raw_read_lock(rwlock_t *lock); 32 extern void do_raw_read_lock(rwlock_t *lock) __acquires(lock);
33#define do_raw_read_lock_flags(lock, flags) do_raw_read_lock(lock) 33#define do_raw_read_lock_flags(lock, flags) do_raw_read_lock(lock)
34 extern int do_raw_read_trylock(rwlock_t *lock); 34 extern int do_raw_read_trylock(rwlock_t *lock);
35 extern void do_raw_read_unlock(rwlock_t *lock); 35 extern void do_raw_read_unlock(rwlock_t *lock) __releases(lock);
36 extern void do_raw_write_lock(rwlock_t *lock); 36 extern void do_raw_write_lock(rwlock_t *lock) __acquires(lock);
37#define do_raw_write_lock_flags(lock, flags) do_raw_write_lock(lock) 37#define do_raw_write_lock_flags(lock, flags) do_raw_write_lock(lock)
38 extern int do_raw_write_trylock(rwlock_t *lock); 38 extern int do_raw_write_trylock(rwlock_t *lock);
39 extern void do_raw_write_unlock(rwlock_t *lock); 39 extern void do_raw_write_unlock(rwlock_t *lock) __releases(lock);
40#else 40#else
41# define do_raw_read_lock(rwlock) arch_read_lock(&(rwlock)->raw_lock) 41# define do_raw_read_lock(rwlock) do {__acquire(lock); arch_read_lock(&(rwlock)->raw_lock); } while (0)
42# define do_raw_read_lock_flags(lock, flags) \ 42# define do_raw_read_lock_flags(lock, flags) \
43 arch_read_lock_flags(&(lock)->raw_lock, *(flags)) 43 do {__acquire(lock); arch_read_lock_flags(&(lock)->raw_lock, *(flags)); } while (0)
44# define do_raw_read_trylock(rwlock) arch_read_trylock(&(rwlock)->raw_lock) 44# define do_raw_read_trylock(rwlock) arch_read_trylock(&(rwlock)->raw_lock)
45# define do_raw_read_unlock(rwlock) arch_read_unlock(&(rwlock)->raw_lock) 45# define do_raw_read_unlock(rwlock) do {arch_read_unlock(&(rwlock)->raw_lock); __release(lock); } while (0)
46# define do_raw_write_lock(rwlock) arch_write_lock(&(rwlock)->raw_lock) 46# define do_raw_write_lock(rwlock) do {__acquire(lock); arch_write_lock(&(rwlock)->raw_lock); } while (0)
47# define do_raw_write_lock_flags(lock, flags) \ 47# define do_raw_write_lock_flags(lock, flags) \
48 arch_write_lock_flags(&(lock)->raw_lock, *(flags)) 48 do {__acquire(lock); arch_write_lock_flags(&(lock)->raw_lock, *(flags)); } while (0)
49# define do_raw_write_trylock(rwlock) arch_write_trylock(&(rwlock)->raw_lock) 49# define do_raw_write_trylock(rwlock) arch_write_trylock(&(rwlock)->raw_lock)
50# define do_raw_write_unlock(rwlock) arch_write_unlock(&(rwlock)->raw_lock) 50# define do_raw_write_unlock(rwlock) do {arch_write_unlock(&(rwlock)->raw_lock); __release(lock); } while (0)
51#endif 51#endif
52 52
53#define read_can_lock(rwlock) arch_read_can_lock(&(rwlock)->raw_lock) 53#define read_can_lock(rwlock) arch_read_can_lock(&(rwlock)->raw_lock)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 46c6f8d5dc06..dad7f668ebf7 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -258,6 +258,10 @@ extern spinlock_t mmlist_lock;
258 258
259struct task_struct; 259struct task_struct;
260 260
261#ifdef CONFIG_PROVE_RCU
262extern int lockdep_tasklist_lock_is_held(void);
263#endif /* #ifdef CONFIG_PROVE_RCU */
264
261extern void sched_init(void); 265extern void sched_init(void);
262extern void sched_init_smp(void); 266extern void sched_init_smp(void);
263extern asmlinkage void schedule_tail(struct task_struct *prev); 267extern asmlinkage void schedule_tail(struct task_struct *prev);
@@ -1473,7 +1477,7 @@ struct task_struct {
1473 1477
1474 struct list_head *scm_work_list; 1478 struct list_head *scm_work_list;
1475#ifdef CONFIG_FUNCTION_GRAPH_TRACER 1479#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1476 /* Index of current stored adress in ret_stack */ 1480 /* Index of current stored address in ret_stack */
1477 int curr_ret_stack; 1481 int curr_ret_stack;
1478 /* Stack of return addresses for return function tracing */ 1482 /* Stack of return addresses for return function tracing */
1479 struct ftrace_ret_stack *ret_stack; 1483 struct ftrace_ret_stack *ret_stack;
@@ -2391,9 +2395,7 @@ void thread_group_cputimer(struct task_struct *tsk, struct task_cputime *times);
2391 2395
2392static inline void thread_group_cputime_init(struct signal_struct *sig) 2396static inline void thread_group_cputime_init(struct signal_struct *sig)
2393{ 2397{
2394 sig->cputimer.cputime = INIT_CPUTIME;
2395 spin_lock_init(&sig->cputimer.lock); 2398 spin_lock_init(&sig->cputimer.lock);
2396 sig->cputimer.running = 0;
2397} 2399}
2398 2400
2399static inline void thread_group_cputime_free(struct signal_struct *sig) 2401static inline void thread_group_cputime_free(struct signal_struct *sig)
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 8c3dd36fe91a..78dd1e7120a9 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -491,9 +491,13 @@ uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
491{ 491{
492 struct uart_state *state = uport->state; 492 struct uart_state *state = uport->state;
493 struct tty_port *port = &state->port; 493 struct tty_port *port = &state->port;
494 struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
495 struct timespec ts;
494 496
495 uport->icount.dcd++; 497 if (ld && ld->ops->dcd_change)
498 getnstimeofday(&ts);
496 499
500 uport->icount.dcd++;
497#ifdef CONFIG_HARD_PPS 501#ifdef CONFIG_HARD_PPS
498 if ((uport->flags & UPF_HARDPPS_CD) && status) 502 if ((uport->flags & UPF_HARDPPS_CD) && status)
499 hardpps(); 503 hardpps();
@@ -505,6 +509,11 @@ uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
505 else if (port->tty) 509 else if (port->tty)
506 tty_hangup(port->tty); 510 tty_hangup(port->tty);
507 } 511 }
512
513 if (ld && ld->ops->dcd_change)
514 ld->ops->dcd_change(port->tty, status, &ts);
515 if (ld)
516 tty_ldisc_deref(ld);
508} 517}
509 518
510/** 519/**
diff --git a/include/linux/signal.h b/include/linux/signal.h
index ab9272cc270c..fcd2b14b1932 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -7,6 +7,8 @@
7#ifdef __KERNEL__ 7#ifdef __KERNEL__
8#include <linux/list.h> 8#include <linux/list.h>
9 9
10/* for sysctl */
11extern int print_fatal_signals;
10/* 12/*
11 * Real Time signals may be queued. 13 * Real Time signals may be queued.
12 */ 14 */
diff --git a/include/linux/snmp.h b/include/linux/snmp.h
index e28f5a0182e8..4435d1084755 100644
--- a/include/linux/snmp.h
+++ b/include/linux/snmp.h
@@ -225,6 +225,8 @@ enum
225 LINUX_MIB_SACKSHIFTED, 225 LINUX_MIB_SACKSHIFTED,
226 LINUX_MIB_SACKMERGED, 226 LINUX_MIB_SACKMERGED,
227 LINUX_MIB_SACKSHIFTFALLBACK, 227 LINUX_MIB_SACKSHIFTFALLBACK,
228 LINUX_MIB_TCPBACKLOGDROP,
229 LINUX_MIB_TCPMINTTLDROP, /* RFC 5082 */
228 __LINUX_MIB_MAX 230 __LINUX_MIB_MAX
229}; 231};
230 232
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
index 51948eb6927a..b4ae570d3c98 100644
--- a/include/linux/spi/ads7846.h
+++ b/include/linux/spi/ads7846.h
@@ -12,7 +12,7 @@ enum ads7846_filter {
12}; 12};
13 13
14struct ads7846_platform_data { 14struct ads7846_platform_data {
15 u16 model; /* 7843, 7845, 7846. */ 15 u16 model; /* 7843, 7845, 7846, 7873. */
16 u16 vref_delay_usecs; /* 0 for external vref; etc */ 16 u16 vref_delay_usecs; /* 0 for external vref; etc */
17 u16 vref_mv; /* external vref value, milliVolts */ 17 u16 vref_mv; /* external vref value, milliVolts */
18 bool keep_vref_on; /* set to keep vref on for differential 18 bool keep_vref_on; /* set to keep vref on for differential
@@ -53,5 +53,6 @@ struct ads7846_platform_data {
53 int (*filter) (void *filter_data, int data_idx, int *val); 53 int (*filter) (void *filter_data, int data_idx, int *val);
54 void (*filter_cleanup)(void *filter_data); 54 void (*filter_cleanup)(void *filter_data);
55 void (*wait_for_sync)(void); 55 void (*wait_for_sync)(void);
56 bool wakeup;
56}; 57};
57 58
diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h
index 86088213334a..89fac6a3f78b 100644
--- a/include/linux/spinlock.h
+++ b/include/linux/spinlock.h
@@ -128,19 +128,21 @@ static inline void smp_mb__after_lock(void) { smp_mb(); }
128#define raw_spin_unlock_wait(lock) arch_spin_unlock_wait(&(lock)->raw_lock) 128#define raw_spin_unlock_wait(lock) arch_spin_unlock_wait(&(lock)->raw_lock)
129 129
130#ifdef CONFIG_DEBUG_SPINLOCK 130#ifdef CONFIG_DEBUG_SPINLOCK
131 extern void do_raw_spin_lock(raw_spinlock_t *lock); 131 extern void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock);
132#define do_raw_spin_lock_flags(lock, flags) do_raw_spin_lock(lock) 132#define do_raw_spin_lock_flags(lock, flags) do_raw_spin_lock(lock)
133 extern int do_raw_spin_trylock(raw_spinlock_t *lock); 133 extern int do_raw_spin_trylock(raw_spinlock_t *lock);
134 extern void do_raw_spin_unlock(raw_spinlock_t *lock); 134 extern void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock);
135#else 135#else
136static inline void do_raw_spin_lock(raw_spinlock_t *lock) 136static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock)
137{ 137{
138 __acquire(lock);
138 arch_spin_lock(&lock->raw_lock); 139 arch_spin_lock(&lock->raw_lock);
139} 140}
140 141
141static inline void 142static inline void
142do_raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long *flags) 143do_raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long *flags) __acquires(lock)
143{ 144{
145 __acquire(lock);
144 arch_spin_lock_flags(&lock->raw_lock, *flags); 146 arch_spin_lock_flags(&lock->raw_lock, *flags);
145} 147}
146 148
@@ -149,9 +151,10 @@ static inline int do_raw_spin_trylock(raw_spinlock_t *lock)
149 return arch_spin_trylock(&(lock)->raw_lock); 151 return arch_spin_trylock(&(lock)->raw_lock);
150} 152}
151 153
152static inline void do_raw_spin_unlock(raw_spinlock_t *lock) 154static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock)
153{ 155{
154 arch_spin_unlock(&lock->raw_lock); 156 arch_spin_unlock(&lock->raw_lock);
157 __release(lock);
155} 158}
156#endif 159#endif
157 160
diff --git a/include/linux/swap.h b/include/linux/swap.h
index a2602a8207a6..1f59d9340c4d 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -355,6 +355,7 @@ static inline void disable_swap_token(void)
355#ifdef CONFIG_CGROUP_MEM_RES_CTLR 355#ifdef CONFIG_CGROUP_MEM_RES_CTLR
356extern void 356extern void
357mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout); 357mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout);
358extern int mem_cgroup_count_swap_user(swp_entry_t ent, struct page **pagep);
358#else 359#else
359static inline void 360static inline void
360mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout) 361mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout)
@@ -485,6 +486,14 @@ mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent)
485{ 486{
486} 487}
487 488
489#ifdef CONFIG_CGROUP_MEM_RES_CTLR
490static inline int
491mem_cgroup_count_swap_user(swp_entry_t ent, struct page **pagep)
492{
493 return 0;
494}
495#endif
496
488#endif /* CONFIG_SWAP */ 497#endif /* CONFIG_SWAP */
489#endif /* __KERNEL__*/ 498#endif /* __KERNEL__*/
490#endif /* _LINUX_SWAP_H */ 499#endif /* _LINUX_SWAP_H */
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index 8126f239edf0..44f2ad0e8825 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -23,6 +23,7 @@ struct kexec_segment;
23struct linux_dirent; 23struct linux_dirent;
24struct linux_dirent64; 24struct linux_dirent64;
25struct list_head; 25struct list_head;
26struct mmap_arg_struct;
26struct msgbuf; 27struct msgbuf;
27struct msghdr; 28struct msghdr;
28struct mmsghdr; 29struct mmsghdr;
@@ -30,10 +31,13 @@ struct msqid_ds;
30struct new_utsname; 31struct new_utsname;
31struct nfsctl_arg; 32struct nfsctl_arg;
32struct __old_kernel_stat; 33struct __old_kernel_stat;
34struct oldold_utsname;
35struct old_utsname;
33struct pollfd; 36struct pollfd;
34struct rlimit; 37struct rlimit;
35struct rusage; 38struct rusage;
36struct sched_param; 39struct sched_param;
40struct sel_arg_struct;
37struct semaphore; 41struct semaphore;
38struct sembuf; 42struct sembuf;
39struct shmid_ds; 43struct shmid_ds;
@@ -638,6 +642,7 @@ asmlinkage long sys_poll(struct pollfd __user *ufds, unsigned int nfds,
638 long timeout); 642 long timeout);
639asmlinkage long sys_select(int n, fd_set __user *inp, fd_set __user *outp, 643asmlinkage long sys_select(int n, fd_set __user *inp, fd_set __user *outp,
640 fd_set __user *exp, struct timeval __user *tvp); 644 fd_set __user *exp, struct timeval __user *tvp);
645asmlinkage long sys_old_select(struct sel_arg_struct __user *arg);
641asmlinkage long sys_epoll_create(int size); 646asmlinkage long sys_epoll_create(int size);
642asmlinkage long sys_epoll_create1(int flags); 647asmlinkage long sys_epoll_create1(int flags);
643asmlinkage long sys_epoll_ctl(int epfd, int op, int fd, 648asmlinkage long sys_epoll_ctl(int epfd, int op, int fd,
@@ -652,6 +657,8 @@ asmlinkage long sys_gethostname(char __user *name, int len);
652asmlinkage long sys_sethostname(char __user *name, int len); 657asmlinkage long sys_sethostname(char __user *name, int len);
653asmlinkage long sys_setdomainname(char __user *name, int len); 658asmlinkage long sys_setdomainname(char __user *name, int len);
654asmlinkage long sys_newuname(struct new_utsname __user *name); 659asmlinkage long sys_newuname(struct new_utsname __user *name);
660asmlinkage long sys_uname(struct old_utsname __user *);
661asmlinkage long sys_olduname(struct oldold_utsname __user *);
655 662
656asmlinkage long sys_getrlimit(unsigned int resource, 663asmlinkage long sys_getrlimit(unsigned int resource,
657 struct rlimit __user *rlim); 664 struct rlimit __user *rlim);
@@ -681,6 +688,8 @@ asmlinkage long sys_shmat(int shmid, char __user *shmaddr, int shmflg);
681asmlinkage long sys_shmget(key_t key, size_t size, int flag); 688asmlinkage long sys_shmget(key_t key, size_t size, int flag);
682asmlinkage long sys_shmdt(char __user *shmaddr); 689asmlinkage long sys_shmdt(char __user *shmaddr);
683asmlinkage long sys_shmctl(int shmid, int cmd, struct shmid_ds __user *buf); 690asmlinkage long sys_shmctl(int shmid, int cmd, struct shmid_ds __user *buf);
691asmlinkage long sys_ipc(unsigned int call, int first, int second,
692 unsigned long third, void __user *ptr, long fifth);
684 693
685asmlinkage long sys_mq_open(const char __user *name, int oflag, mode_t mode, struct mq_attr __user *attr); 694asmlinkage long sys_mq_open(const char __user *name, int oflag, mode_t mode, struct mq_attr __user *attr);
686asmlinkage long sys_mq_unlink(const char __user *name); 695asmlinkage long sys_mq_unlink(const char __user *name);
@@ -836,4 +845,6 @@ asmlinkage long sys_perf_event_open(
836asmlinkage long sys_mmap_pgoff(unsigned long addr, unsigned long len, 845asmlinkage long sys_mmap_pgoff(unsigned long addr, unsigned long len,
837 unsigned long prot, unsigned long flags, 846 unsigned long prot, unsigned long flags,
838 unsigned long fd, unsigned long pgoff); 847 unsigned long fd, unsigned long pgoff);
848asmlinkage long sys_old_mmap(struct mmap_arg_struct __user *arg);
849
839#endif 850#endif
diff --git a/include/linux/sysdev.h b/include/linux/sysdev.h
index f395bb3fa2f2..1154c29f4101 100644
--- a/include/linux/sysdev.h
+++ b/include/linux/sysdev.h
@@ -27,10 +27,12 @@
27 27
28 28
29struct sys_device; 29struct sys_device;
30struct sysdev_class_attribute;
30 31
31struct sysdev_class { 32struct sysdev_class {
32 const char *name; 33 const char *name;
33 struct list_head drivers; 34 struct list_head drivers;
35 struct sysdev_class_attribute **attrs;
34 36
35 /* Default operations for these types of devices */ 37 /* Default operations for these types of devices */
36 int (*shutdown)(struct sys_device *); 38 int (*shutdown)(struct sys_device *);
@@ -41,8 +43,10 @@ struct sysdev_class {
41 43
42struct sysdev_class_attribute { 44struct sysdev_class_attribute {
43 struct attribute attr; 45 struct attribute attr;
44 ssize_t (*show)(struct sysdev_class *, char *); 46 ssize_t (*show)(struct sysdev_class *, struct sysdev_class_attribute *,
45 ssize_t (*store)(struct sysdev_class *, const char *, size_t); 47 char *);
48 ssize_t (*store)(struct sysdev_class *, struct sysdev_class_attribute *,
49 const char *, size_t);
46}; 50};
47 51
48#define _SYSDEV_CLASS_ATTR(_name,_mode,_show,_store) \ 52#define _SYSDEV_CLASS_ATTR(_name,_mode,_show,_store) \
@@ -119,6 +123,19 @@ struct sysdev_attribute {
119extern int sysdev_create_file(struct sys_device *, struct sysdev_attribute *); 123extern int sysdev_create_file(struct sys_device *, struct sysdev_attribute *);
120extern void sysdev_remove_file(struct sys_device *, struct sysdev_attribute *); 124extern void sysdev_remove_file(struct sys_device *, struct sysdev_attribute *);
121 125
126/* Create/remove NULL terminated attribute list */
127static inline int
128sysdev_create_files(struct sys_device *d, struct sysdev_attribute **a)
129{
130 return sysfs_create_files(&d->kobj, (const struct attribute **)a);
131}
132
133static inline void
134sysdev_remove_files(struct sys_device *d, struct sysdev_attribute **a)
135{
136 return sysfs_remove_files(&d->kobj, (const struct attribute **)a);
137}
138
122struct sysdev_ext_attribute { 139struct sysdev_ext_attribute {
123 struct sysdev_attribute attr; 140 struct sysdev_attribute attr;
124 void *var; 141 void *var;
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index cfa83083a2d4..f0496b3d1811 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -15,6 +15,7 @@
15#include <linux/compiler.h> 15#include <linux/compiler.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/list.h> 17#include <linux/list.h>
18#include <linux/lockdep.h>
18#include <asm/atomic.h> 19#include <asm/atomic.h>
19 20
20struct kobject; 21struct kobject;
@@ -29,8 +30,33 @@ struct attribute {
29 const char *name; 30 const char *name;
30 struct module *owner; 31 struct module *owner;
31 mode_t mode; 32 mode_t mode;
33#ifdef CONFIG_DEBUG_LOCK_ALLOC
34 struct lock_class_key *key;
35 struct lock_class_key skey;
36#endif
32}; 37};
33 38
39/**
40 * sysfs_attr_init - initialize a dynamically allocated sysfs attribute
41 * @attr: struct attribute to initialize
42 *
43 * Initialize a dynamically allocated struct attribute so we can
44 * make lockdep happy. This is a new requirement for attributes
45 * and initially this is only needed when lockdep is enabled.
46 * Lockdep gives a nice error when your attribute is added to
47 * sysfs if you don't have this.
48 */
49#ifdef CONFIG_DEBUG_LOCK_ALLOC
50#define sysfs_attr_init(attr) \
51do { \
52 static struct lock_class_key __key; \
53 \
54 (attr)->key = &__key; \
55} while(0)
56#else
57#define sysfs_attr_init(attr) do {} while(0)
58#endif
59
34struct attribute_group { 60struct attribute_group {
35 const char *name; 61 const char *name;
36 mode_t (*is_visible)(struct kobject *, 62 mode_t (*is_visible)(struct kobject *,
@@ -74,6 +100,18 @@ struct bin_attribute {
74 struct vm_area_struct *vma); 100 struct vm_area_struct *vma);
75}; 101};
76 102
103/**
104 * sysfs_bin_attr_init - initialize a dynamically allocated bin_attribute
105 * @attr: struct bin_attribute to initialize
106 *
107 * Initialize a dynamically allocated struct bin_attribute so we
108 * can make lockdep happy. This is a new requirement for
109 * attributes and initially this is only needed when lockdep is
110 * enabled. Lockdep gives a nice error when your attribute is
111 * added to sysfs if you don't have this.
112 */
113#define sysfs_bin_attr_init(bin_attr) sysfs_attr_init(&(bin_attr)->attr)
114
77struct sysfs_ops { 115struct sysfs_ops {
78 ssize_t (*show)(struct kobject *, struct attribute *,char *); 116 ssize_t (*show)(struct kobject *, struct attribute *,char *);
79 ssize_t (*store)(struct kobject *,struct attribute *,const char *, size_t); 117 ssize_t (*store)(struct kobject *,struct attribute *,const char *, size_t);
@@ -94,9 +132,12 @@ int __must_check sysfs_move_dir(struct kobject *kobj,
94 132
95int __must_check sysfs_create_file(struct kobject *kobj, 133int __must_check sysfs_create_file(struct kobject *kobj,
96 const struct attribute *attr); 134 const struct attribute *attr);
135int __must_check sysfs_create_files(struct kobject *kobj,
136 const struct attribute **attr);
97int __must_check sysfs_chmod_file(struct kobject *kobj, struct attribute *attr, 137int __must_check sysfs_chmod_file(struct kobject *kobj, struct attribute *attr,
98 mode_t mode); 138 mode_t mode);
99void sysfs_remove_file(struct kobject *kobj, const struct attribute *attr); 139void sysfs_remove_file(struct kobject *kobj, const struct attribute *attr);
140void sysfs_remove_files(struct kobject *kobj, const struct attribute **attr);
100 141
101int __must_check sysfs_create_bin_file(struct kobject *kobj, 142int __must_check sysfs_create_bin_file(struct kobject *kobj,
102 const struct bin_attribute *attr); 143 const struct bin_attribute *attr);
@@ -110,6 +151,9 @@ int __must_check sysfs_create_link_nowarn(struct kobject *kobj,
110 const char *name); 151 const char *name);
111void sysfs_remove_link(struct kobject *kobj, const char *name); 152void sysfs_remove_link(struct kobject *kobj, const char *name);
112 153
154int sysfs_rename_link(struct kobject *kobj, struct kobject *target,
155 const char *old_name, const char *new_name);
156
113int __must_check sysfs_create_group(struct kobject *kobj, 157int __must_check sysfs_create_group(struct kobject *kobj,
114 const struct attribute_group *grp); 158 const struct attribute_group *grp);
115int sysfs_update_group(struct kobject *kobj, 159int sysfs_update_group(struct kobject *kobj,
@@ -164,6 +208,12 @@ static inline int sysfs_create_file(struct kobject *kobj,
164 return 0; 208 return 0;
165} 209}
166 210
211static inline int sysfs_create_files(struct kobject *kobj,
212 const struct attribute **attr)
213{
214 return 0;
215}
216
167static inline int sysfs_chmod_file(struct kobject *kobj, 217static inline int sysfs_chmod_file(struct kobject *kobj,
168 struct attribute *attr, mode_t mode) 218 struct attribute *attr, mode_t mode)
169{ 219{
@@ -175,6 +225,11 @@ static inline void sysfs_remove_file(struct kobject *kobj,
175{ 225{
176} 226}
177 227
228static inline void sysfs_remove_files(struct kobject *kobj,
229 const struct attribute **attr)
230{
231}
232
178static inline int sysfs_create_bin_file(struct kobject *kobj, 233static inline int sysfs_create_bin_file(struct kobject *kobj,
179 const struct bin_attribute *attr) 234 const struct bin_attribute *attr)
180{ 235{
@@ -203,6 +258,12 @@ static inline void sysfs_remove_link(struct kobject *kobj, const char *name)
203{ 258{
204} 259}
205 260
261static inline int sysfs_rename_link(struct kobject *k, struct kobject *t,
262 const char *old_name, const char *new_name)
263{
264 return 0;
265}
266
206static inline int sysfs_create_group(struct kobject *kobj, 267static inline int sysfs_create_group(struct kobject *kobj,
207 const struct attribute_group *grp) 268 const struct attribute_group *grp)
208{ 269{
diff --git a/include/linux/taskstats_kern.h b/include/linux/taskstats_kern.h
index 3398f4553269..b6523c1427ce 100644
--- a/include/linux/taskstats_kern.h
+++ b/include/linux/taskstats_kern.h
@@ -14,11 +14,6 @@
14extern struct kmem_cache *taskstats_cache; 14extern struct kmem_cache *taskstats_cache;
15extern struct mutex taskstats_exit_mutex; 15extern struct mutex taskstats_exit_mutex;
16 16
17static inline void taskstats_tgid_init(struct signal_struct *sig)
18{
19 sig->stats = NULL;
20}
21
22static inline void taskstats_tgid_free(struct signal_struct *sig) 17static inline void taskstats_tgid_free(struct signal_struct *sig)
23{ 18{
24 if (sig->stats) 19 if (sig->stats)
@@ -30,8 +25,6 @@ extern void taskstats_init_early(void);
30#else 25#else
31static inline void taskstats_exit(struct task_struct *tsk, int group_dead) 26static inline void taskstats_exit(struct task_struct *tsk, int group_dead)
32{} 27{}
33static inline void taskstats_tgid_init(struct signal_struct *sig)
34{}
35static inline void taskstats_tgid_free(struct signal_struct *sig) 28static inline void taskstats_tgid_free(struct signal_struct *sig)
36{} 29{}
37static inline void taskstats_init_early(void) 30static inline void taskstats_init_early(void)
diff --git a/include/linux/tty.h b/include/linux/tty.h
index d96e5882f129..568369a86306 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -514,6 +514,7 @@ extern void tty_ldisc_enable(struct tty_struct *tty);
514 514
515/* n_tty.c */ 515/* n_tty.c */
516extern struct tty_ldisc_ops tty_ldisc_N_TTY; 516extern struct tty_ldisc_ops tty_ldisc_N_TTY;
517extern void n_tty_inherit_ops(struct tty_ldisc_ops *ops);
517 518
518/* tty_audit.c */ 519/* tty_audit.c */
519#ifdef CONFIG_AUDIT 520#ifdef CONFIG_AUDIT
diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h
index 0c4ee9b88f85..526d66f066a3 100644
--- a/include/linux/tty_ldisc.h
+++ b/include/linux/tty_ldisc.h
@@ -99,6 +99,12 @@
99 * cease I/O to the tty driver. Can sleep. The driver should 99 * cease I/O to the tty driver. Can sleep. The driver should
100 * seek to perform this action quickly but should wait until 100 * seek to perform this action quickly but should wait until
101 * any pending driver I/O is completed. 101 * any pending driver I/O is completed.
102 *
103 * void (*dcd_change)(struct tty_struct *tty, unsigned int status,
104 * struct timespec *ts)
105 *
106 * Tells the discipline that the DCD pin has changed its status and
107 * the relative timestamp. Pointer ts can be NULL.
102 */ 108 */
103 109
104#include <linux/fs.h> 110#include <linux/fs.h>
@@ -136,6 +142,8 @@ struct tty_ldisc_ops {
136 void (*receive_buf)(struct tty_struct *, const unsigned char *cp, 142 void (*receive_buf)(struct tty_struct *, const unsigned char *cp,
137 char *fp, int count); 143 char *fp, int count);
138 void (*write_wakeup)(struct tty_struct *); 144 void (*write_wakeup)(struct tty_struct *);
145 void (*dcd_change)(struct tty_struct *, unsigned int,
146 struct timespec *);
139 147
140 struct module *owner; 148 struct module *owner;
141 149
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 3492abf82e75..8c9f053111bb 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -512,9 +512,9 @@ extern struct usb_device *usb_get_dev(struct usb_device *dev);
512extern void usb_put_dev(struct usb_device *dev); 512extern void usb_put_dev(struct usb_device *dev);
513 513
514/* USB device locking */ 514/* USB device locking */
515#define usb_lock_device(udev) down(&(udev)->dev.sem) 515#define usb_lock_device(udev) device_lock(&(udev)->dev)
516#define usb_unlock_device(udev) up(&(udev)->dev.sem) 516#define usb_unlock_device(udev) device_unlock(&(udev)->dev)
517#define usb_trylock_device(udev) down_trylock(&(udev)->dev.sem) 517#define usb_trylock_device(udev) device_trylock(&(udev)->dev)
518extern int usb_lock_device_for_reset(struct usb_device *udev, 518extern int usb_lock_device_for_reset(struct usb_device *udev,
519 const struct usb_interface *iface); 519 const struct usb_interface *iface);
520 520
diff --git a/include/linux/usb/audio.h b/include/linux/usb/audio.h
index 6bb293684eb8..4d3e450e2b03 100644
--- a/include/linux/usb/audio.h
+++ b/include/linux/usb/audio.h
@@ -269,8 +269,8 @@ struct uac_format_type_i_ext_descriptor {
269 __u8 bLength; 269 __u8 bLength;
270 __u8 bDescriptorType; 270 __u8 bDescriptorType;
271 __u8 bDescriptorSubtype; 271 __u8 bDescriptorSubtype;
272 __u8 bSubslotSize;
273 __u8 bFormatType; 272 __u8 bFormatType;
273 __u8 bSubslotSize;
274 __u8 bBitResolution; 274 __u8 bBitResolution;
275 __u8 bHeaderLength; 275 __u8 bHeaderLength;
276 __u8 bControlSize; 276 __u8 bControlSize;
diff --git a/include/linux/virtio.h b/include/linux/virtio.h
index f508c651e53d..40d1709bdbf4 100644
--- a/include/linux/virtio.h
+++ b/include/linux/virtio.h
@@ -98,6 +98,7 @@ struct virtio_device {
98 void *priv; 98 void *priv;
99}; 99};
100 100
101#define dev_to_virtio(dev) container_of(dev, struct virtio_device, dev)
101int register_virtio_device(struct virtio_device *dev); 102int register_virtio_device(struct virtio_device *dev);
102void unregister_virtio_device(struct virtio_device *dev); 103void unregister_virtio_device(struct virtio_device *dev);
103 104
diff --git a/include/linux/virtio_9p.h b/include/linux/virtio_9p.h
index 332275080083..5cf11765146b 100644
--- a/include/linux/virtio_9p.h
+++ b/include/linux/virtio_9p.h
@@ -5,4 +5,16 @@
5#include <linux/virtio_ids.h> 5#include <linux/virtio_ids.h>
6#include <linux/virtio_config.h> 6#include <linux/virtio_config.h>
7 7
8/* The feature bitmap for virtio 9P */
9
10/* The mount point is specified in a config variable */
11#define VIRTIO_9P_MOUNT_TAG 0
12
13struct virtio_9p_config {
14 /* length of the tag name */
15 __u16 tag_len;
16 /* non-NULL terminated tag name */
17 __u8 tag[0];
18} __attribute__((packed));
19
8#endif /* _LINUX_VIRTIO_9P_H */ 20#endif /* _LINUX_VIRTIO_9P_H */
diff --git a/include/math-emu/op-common.h b/include/math-emu/op-common.h
index f456534dcaf9..fd882261225e 100644
--- a/include/math-emu/op-common.h
+++ b/include/math-emu/op-common.h
@@ -29,7 +29,7 @@
29 _FP_FRAC_DECL_##wc(X) 29 _FP_FRAC_DECL_##wc(X)
30 30
31/* 31/*
32 * Finish truely unpacking a native fp value by classifying the kind 32 * Finish truly unpacking a native fp value by classifying the kind
33 * of fp value and normalizing both the exponent and the fraction. 33 * of fp value and normalizing both the exponent and the fraction.
34 */ 34 */
35 35
diff --git a/include/media/davinci/vpfe_capture.h b/include/media/davinci/vpfe_capture.h
index d863e5e8426d..4314a5f6a087 100644
--- a/include/media/davinci/vpfe_capture.h
+++ b/include/media/davinci/vpfe_capture.h
@@ -165,7 +165,7 @@ struct vpfe_device {
165 u8 started; 165 u8 started;
166 /* 166 /*
167 * offset where second field starts from the starting of the 167 * offset where second field starts from the starting of the
168 * buffer for field seperated YCbCr formats 168 * buffer for field separated YCbCr formats
169 */ 169 */
170 u32 field_off; 170 u32 field_off;
171}; 171};
diff --git a/include/net/9p/client.h b/include/net/9p/client.h
index 52e1fff709e4..f076dfa75ae8 100644
--- a/include/net/9p/client.h
+++ b/include/net/9p/client.h
@@ -32,13 +32,13 @@
32/** enum p9_proto_versions - 9P protocol versions 32/** enum p9_proto_versions - 9P protocol versions
33 * @p9_proto_legacy: 9P Legacy mode, pre-9P2000.u 33 * @p9_proto_legacy: 9P Legacy mode, pre-9P2000.u
34 * @p9_proto_2000u: 9P2000.u extension 34 * @p9_proto_2000u: 9P2000.u extension
35 * @p9_proto_2010L: 9P2010.L extension 35 * @p9_proto_2000L: 9P2000.L extension
36 */ 36 */
37 37
38enum p9_proto_versions{ 38enum p9_proto_versions{
39 p9_proto_legacy = 0, 39 p9_proto_legacy = 0,
40 p9_proto_2000u = 1, 40 p9_proto_2000u = 1,
41 p9_proto_2010L = 2, 41 p9_proto_2000L = 2,
42}; 42};
43 43
44 44
diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h
index 4a808de7c0f6..68f67836e146 100644
--- a/include/net/ip6_route.h
+++ b/include/net/ip6_route.h
@@ -37,6 +37,24 @@ struct route_info {
37#define RT6_LOOKUP_F_SRCPREF_PUBLIC 0x00000010 37#define RT6_LOOKUP_F_SRCPREF_PUBLIC 0x00000010
38#define RT6_LOOKUP_F_SRCPREF_COA 0x00000020 38#define RT6_LOOKUP_F_SRCPREF_COA 0x00000020
39 39
40/*
41 * rt6_srcprefs2flags() and rt6_flags2srcprefs() translate
42 * between IPV6_ADDR_PREFERENCES socket option values
43 * IPV6_PREFER_SRC_TMP = 0x1
44 * IPV6_PREFER_SRC_PUBLIC = 0x2
45 * IPV6_PREFER_SRC_COA = 0x4
46 * and above RT6_LOOKUP_F_SRCPREF_xxx flags.
47 */
48static inline int rt6_srcprefs2flags(unsigned int srcprefs)
49{
50 /* No need to bitmask because srcprefs have only 3 bits. */
51 return srcprefs << 3;
52}
53
54static inline unsigned int rt6_flags2srcprefs(int flags)
55{
56 return (flags >> 3) & 7;
57}
40 58
41extern void ip6_route_input(struct sk_buff *skb); 59extern void ip6_route_input(struct sk_buff *skb);
42 60
diff --git a/include/net/ip6_tunnel.h b/include/net/ip6_tunnel.h
index 83b4e008b16d..fbf9d1cda27b 100644
--- a/include/net/ip6_tunnel.h
+++ b/include/net/ip6_tunnel.h
@@ -15,7 +15,6 @@
15struct ip6_tnl { 15struct ip6_tnl {
16 struct ip6_tnl *next; /* next tunnel in list */ 16 struct ip6_tnl *next; /* next tunnel in list */
17 struct net_device *dev; /* virtual device associated with tunnel */ 17 struct net_device *dev; /* virtual device associated with tunnel */
18 int recursion; /* depth of hard_start_xmit recursion */
19 struct ip6_tnl_parm parms; /* tunnel configuration parameters */ 18 struct ip6_tnl_parm parms; /* tunnel configuration parameters */
20 struct flowi fl; /* flowi template for xmit */ 19 struct flowi fl; /* flowi template for xmit */
21 struct dst_entry *dst_cache; /* cached dst */ 20 struct dst_entry *dst_cache; /* cached dst */
diff --git a/include/net/irda/irttp.h b/include/net/irda/irttp.h
index 0788c23d2828..11aee7a2972a 100644
--- a/include/net/irda/irttp.h
+++ b/include/net/irda/irttp.h
@@ -97,7 +97,7 @@
97#define TTP_MAX_SDU_SIZE 0x01 97#define TTP_MAX_SDU_SIZE 0x01
98 98
99/* 99/*
100 * This structure contains all data assosiated with one instance of a TTP 100 * This structure contains all data associated with one instance of a TTP
101 * connection. 101 * connection.
102 */ 102 */
103struct tsap_cb { 103struct tsap_cb {
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index 80eb7cc42ce9..45d7d44d7cbe 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -2426,7 +2426,8 @@ struct rate_control_ops {
2426 struct ieee80211_sta *sta, void *priv_sta); 2426 struct ieee80211_sta *sta, void *priv_sta);
2427 void (*rate_update)(void *priv, struct ieee80211_supported_band *sband, 2427 void (*rate_update)(void *priv, struct ieee80211_supported_band *sband,
2428 struct ieee80211_sta *sta, 2428 struct ieee80211_sta *sta,
2429 void *priv_sta, u32 changed); 2429 void *priv_sta, u32 changed,
2430 enum nl80211_channel_type oper_chan_type);
2430 void (*free_sta)(void *priv, struct ieee80211_sta *sta, 2431 void (*free_sta)(void *priv, struct ieee80211_sta *sta,
2431 void *priv_sta); 2432 void *priv_sta);
2432 2433
diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h
index 82b7be4db89a..bd10a7908993 100644
--- a/include/net/net_namespace.h
+++ b/include/net/net_namespace.h
@@ -100,14 +100,9 @@ struct net {
100extern struct net init_net; 100extern struct net init_net;
101 101
102#ifdef CONFIG_NET 102#ifdef CONFIG_NET
103#define INIT_NET_NS(net_ns) .net_ns = &init_net,
104
105extern struct net *copy_net_ns(unsigned long flags, struct net *net_ns); 103extern struct net *copy_net_ns(unsigned long flags, struct net *net_ns);
106 104
107#else /* CONFIG_NET */ 105#else /* CONFIG_NET */
108
109#define INIT_NET_NS(net_ns)
110
111static inline struct net *copy_net_ns(unsigned long flags, struct net *net_ns) 106static inline struct net *copy_net_ns(unsigned long flags, struct net *net_ns)
112{ 107{
113 /* There is nothing to copy so this is a noop */ 108 /* There is nothing to copy so this is a noop */
diff --git a/include/net/sock.h b/include/net/sock.h
index 6cb1676e409a..092b0551e77f 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -253,6 +253,8 @@ struct sock {
253 struct { 253 struct {
254 struct sk_buff *head; 254 struct sk_buff *head;
255 struct sk_buff *tail; 255 struct sk_buff *tail;
256 int len;
257 int limit;
256 } sk_backlog; 258 } sk_backlog;
257 wait_queue_head_t *sk_sleep; 259 wait_queue_head_t *sk_sleep;
258 struct dst_entry *sk_dst_cache; 260 struct dst_entry *sk_dst_cache;
@@ -589,8 +591,8 @@ static inline int sk_stream_memory_free(struct sock *sk)
589 return sk->sk_wmem_queued < sk->sk_sndbuf; 591 return sk->sk_wmem_queued < sk->sk_sndbuf;
590} 592}
591 593
592/* The per-socket spinlock must be held here. */ 594/* OOB backlog add */
593static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb) 595static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb)
594{ 596{
595 if (!sk->sk_backlog.tail) { 597 if (!sk->sk_backlog.tail) {
596 sk->sk_backlog.head = sk->sk_backlog.tail = skb; 598 sk->sk_backlog.head = sk->sk_backlog.tail = skb;
@@ -601,6 +603,17 @@ static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb)
601 skb->next = NULL; 603 skb->next = NULL;
602} 604}
603 605
606/* The per-socket spinlock must be held here. */
607static inline __must_check int sk_add_backlog(struct sock *sk, struct sk_buff *skb)
608{
609 if (sk->sk_backlog.len >= max(sk->sk_backlog.limit, sk->sk_rcvbuf << 1))
610 return -ENOBUFS;
611
612 __sk_add_backlog(sk, skb);
613 sk->sk_backlog.len += skb->truesize;
614 return 0;
615}
616
604static inline int sk_backlog_rcv(struct sock *sk, struct sk_buff *skb) 617static inline int sk_backlog_rcv(struct sock *sk, struct sk_buff *skb)
605{ 618{
606 return sk->sk_backlog_rcv(sk, skb); 619 return sk->sk_backlog_rcv(sk, skb);
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 56f0aec40ed6..75be5a28815d 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -939,7 +939,7 @@ static inline int tcp_prequeue(struct sock *sk, struct sk_buff *skb)
939 939
940 tp->ucopy.memory = 0; 940 tp->ucopy.memory = 0;
941 } else if (skb_queue_len(&tp->ucopy.prequeue) == 1) { 941 } else if (skb_queue_len(&tp->ucopy.prequeue) == 1) {
942 wake_up_interruptible_poll(sk->sk_sleep, 942 wake_up_interruptible_sync_poll(sk->sk_sleep,
943 POLLIN | POLLRDNORM | POLLRDBAND); 943 POLLIN | POLLRDNORM | POLLRDBAND);
944 if (!inet_csk_ack_scheduled(sk)) 944 if (!inet_csk_ack_scheduled(sk))
945 inet_csk_reset_xmit_timer(sk, ICSK_TIME_DACK, 945 inet_csk_reset_xmit_timer(sk, ICSK_TIME_DACK,
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index a7df3275b860..d74e080ba6c9 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -275,7 +275,8 @@ struct xfrm_policy_afinfo {
275 struct dst_entry *dst, 275 struct dst_entry *dst,
276 int nfheader_len); 276 int nfheader_len);
277 int (*fill_dst)(struct xfrm_dst *xdst, 277 int (*fill_dst)(struct xfrm_dst *xdst,
278 struct net_device *dev); 278 struct net_device *dev,
279 struct flowi *fl);
279}; 280};
280 281
281extern int xfrm_policy_register_afinfo(struct xfrm_policy_afinfo *afinfo); 282extern int xfrm_policy_register_afinfo(struct xfrm_policy_afinfo *afinfo);
diff --git a/include/scsi/sg.h b/include/scsi/sg.h
index 934ae389671d..a9f3c6fc3f57 100644
--- a/include/scsi/sg.h
+++ b/include/scsi/sg.h
@@ -70,6 +70,9 @@ Major new features in SG 3.x driver (cf SG 2.x drivers)
70 (for the lk 2.2 series). 70 (for the lk 2.2 series).
71*/ 71*/
72 72
73#ifdef __KERNEL__
74extern int sg_big_buff; /* for sysctl */
75#endif
73 76
74/* New interface introduced in the 3.x SG drivers follows */ 77/* New interface introduced in the 3.x SG drivers follows */
75 78
diff --git a/include/sound/asound.h b/include/sound/asound.h
index 1f57bb92eb5a..098595500632 100644
--- a/include/sound/asound.h
+++ b/include/sound/asound.h
@@ -544,7 +544,7 @@ struct snd_rawmidi_status {
544 * Timer section - /dev/snd/timer 544 * Timer section - /dev/snd/timer
545 */ 545 */
546 546
547#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5) 547#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
548 548
549enum { 549enum {
550 SNDRV_TIMER_CLASS_NONE = -1, 550 SNDRV_TIMER_CLASS_NONE = -1,
diff --git a/include/trace/ftrace.h b/include/trace/ftrace.h
index 0804cd594803..601ad7744247 100644
--- a/include/trace/ftrace.h
+++ b/include/trace/ftrace.h
@@ -699,9 +699,9 @@ __attribute__((section("_ftrace_events"))) event_##call = { \
699 * __cpu = smp_processor_id(); 699 * __cpu = smp_processor_id();
700 * 700 *
701 * if (in_nmi()) 701 * if (in_nmi())
702 * trace_buf = rcu_dereference(perf_trace_buf_nmi); 702 * trace_buf = rcu_dereference_sched(perf_trace_buf_nmi);
703 * else 703 * else
704 * trace_buf = rcu_dereference(perf_trace_buf); 704 * trace_buf = rcu_dereference_sched(perf_trace_buf);
705 * 705 *
706 * if (!trace_buf) 706 * if (!trace_buf)
707 * goto end; 707 * goto end;
diff --git a/include/video/broadsheetfb.h b/include/video/broadsheetfb.h
index a758534c0272..548d28f4ec67 100644
--- a/include/video/broadsheetfb.h
+++ b/include/video/broadsheetfb.h
@@ -29,11 +29,19 @@
29#define BS_CMD_UPD_FULL 0x33 29#define BS_CMD_UPD_FULL 0x33
30#define BS_CMD_UPD_GDRV_CLR 0x37 30#define BS_CMD_UPD_GDRV_CLR 0x37
31 31
32/* Broadsheet register interface defines */
33#define BS_REG_REV 0x00
34#define BS_REG_PRC 0x02
35
32/* Broadsheet pin interface specific defines */ 36/* Broadsheet pin interface specific defines */
33#define BS_CS 0x01 37#define BS_CS 0x01
34#define BS_DC 0x02 38#define BS_DC 0x02
35#define BS_WR 0x03 39#define BS_WR 0x03
36 40
41/* Broadsheet IO interface specific defines */
42#define BS_MMIO_CMD 0x01
43#define BS_MMIO_DATA 0x02
44
37/* struct used by broadsheet. board specific stuff comes from *board */ 45/* struct used by broadsheet. board specific stuff comes from *board */
38struct broadsheetfb_par { 46struct broadsheetfb_par {
39 struct fb_info *info; 47 struct fb_info *info;
@@ -41,6 +49,8 @@ struct broadsheetfb_par {
41 void (*write_reg)(struct broadsheetfb_par *, u16 reg, u16 val); 49 void (*write_reg)(struct broadsheetfb_par *, u16 reg, u16 val);
42 u16 (*read_reg)(struct broadsheetfb_par *, u16 reg); 50 u16 (*read_reg)(struct broadsheetfb_par *, u16 reg);
43 wait_queue_head_t waitq; 51 wait_queue_head_t waitq;
52 int panel_index;
53 struct mutex io_lock;
44}; 54};
45 55
46/* board specific routines */ 56/* board specific routines */
@@ -48,12 +58,17 @@ struct broadsheet_board {
48 struct module *owner; 58 struct module *owner;
49 int (*init)(struct broadsheetfb_par *); 59 int (*init)(struct broadsheetfb_par *);
50 int (*wait_for_rdy)(struct broadsheetfb_par *); 60 int (*wait_for_rdy)(struct broadsheetfb_par *);
51 void (*set_ctl)(struct broadsheetfb_par *, unsigned char, u8);
52 void (*set_hdb)(struct broadsheetfb_par *, u16);
53 u16 (*get_hdb)(struct broadsheetfb_par *);
54 void (*cleanup)(struct broadsheetfb_par *); 61 void (*cleanup)(struct broadsheetfb_par *);
55 int (*get_panel_type)(void); 62 int (*get_panel_type)(void);
56 int (*setup_irq)(struct fb_info *); 63 int (*setup_irq)(struct fb_info *);
57};
58 64
65 /* Functions for boards that use GPIO */
66 void (*set_ctl)(struct broadsheetfb_par *, unsigned char, u8);
67 void (*set_hdb)(struct broadsheetfb_par *, u16);
68 u16 (*get_hdb)(struct broadsheetfb_par *);
69
70 /* Functions for boards that have specialized MMIO */
71 void (*mmio_write)(struct broadsheetfb_par *, int type, u16);
72 u16 (*mmio_read)(struct broadsheetfb_par *);
73};
59#endif 74#endif
diff --git a/init/Kconfig b/init/Kconfig
index 089a230e5652..eb77e8ccde1c 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -463,6 +463,7 @@ config HAVE_UNSTABLE_SCHED_CLOCK
463 463
464menuconfig CGROUPS 464menuconfig CGROUPS
465 boolean "Control Group support" 465 boolean "Control Group support"
466 depends on EVENTFD
466 help 467 help
467 This option adds support for grouping sets of processes together, for 468 This option adds support for grouping sets of processes together, for
468 use with process control subsystems such as Cpusets, CFS, memory 469 use with process control subsystems such as Cpusets, CFS, memory
diff --git a/ipc/Makefile b/ipc/Makefile
index 4e1955ea815d..9075e172e52c 100644
--- a/ipc/Makefile
+++ b/ipc/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5obj-$(CONFIG_SYSVIPC_COMPAT) += compat.o 5obj-$(CONFIG_SYSVIPC_COMPAT) += compat.o
6obj-$(CONFIG_SYSVIPC) += util.o msgutil.o msg.o sem.o shm.o ipcns_notifier.o 6obj-$(CONFIG_SYSVIPC) += util.o msgutil.o msg.o sem.o shm.o ipcns_notifier.o syscall.o
7obj-$(CONFIG_SYSVIPC_SYSCTL) += ipc_sysctl.o 7obj-$(CONFIG_SYSVIPC_SYSCTL) += ipc_sysctl.o
8obj_mq-$(CONFIG_COMPAT) += compat_mq.o 8obj_mq-$(CONFIG_COMPAT) += compat_mq.o
9obj-$(CONFIG_POSIX_MQUEUE) += mqueue.o msgutil.o $(obj_mq-y) 9obj-$(CONFIG_POSIX_MQUEUE) += mqueue.o msgutil.o $(obj_mq-y)
diff --git a/ipc/mqueue.c b/ipc/mqueue.c
index b6cb06451f4b..e4e3f04803ca 100644
--- a/ipc/mqueue.c
+++ b/ipc/mqueue.c
@@ -155,7 +155,7 @@ static struct inode *mqueue_get_inode(struct super_block *sb,
155 spin_lock(&mq_lock); 155 spin_lock(&mq_lock);
156 if (u->mq_bytes + mq_bytes < u->mq_bytes || 156 if (u->mq_bytes + mq_bytes < u->mq_bytes ||
157 u->mq_bytes + mq_bytes > 157 u->mq_bytes + mq_bytes >
158 p->signal->rlim[RLIMIT_MSGQUEUE].rlim_cur) { 158 task_rlimit(p, RLIMIT_MSGQUEUE)) {
159 spin_unlock(&mq_lock); 159 spin_unlock(&mq_lock);
160 kfree(info->messages); 160 kfree(info->messages);
161 goto out_inode; 161 goto out_inode;
diff --git a/ipc/shm.c b/ipc/shm.c
index 23256b855819..1a314c89f93c 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -764,8 +764,7 @@ SYSCALL_DEFINE3(shmctl, int, shmid, int, cmd, struct shmid_ds __user *, buf)
764 if (euid != shp->shm_perm.uid && 764 if (euid != shp->shm_perm.uid &&
765 euid != shp->shm_perm.cuid) 765 euid != shp->shm_perm.cuid)
766 goto out_unlock; 766 goto out_unlock;
767 if (cmd == SHM_LOCK && 767 if (cmd == SHM_LOCK && !rlimit(RLIMIT_MEMLOCK))
768 !current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur)
769 goto out_unlock; 768 goto out_unlock;
770 } 769 }
771 770
diff --git a/ipc/syscall.c b/ipc/syscall.c
new file mode 100644
index 000000000000..355a3da9ec73
--- /dev/null
+++ b/ipc/syscall.c
@@ -0,0 +1,99 @@
1/*
2 * sys_ipc() is the old de-multiplexer for the SysV IPC calls.
3 *
4 * This is really horribly ugly, and new architectures should just wire up
5 * the individual syscalls instead.
6 */
7#include <linux/unistd.h>
8
9#ifdef __ARCH_WANT_SYS_IPC
10#include <linux/errno.h>
11#include <linux/ipc.h>
12#include <linux/shm.h>
13#include <linux/syscalls.h>
14#include <linux/uaccess.h>
15
16SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, int, second,
17 unsigned long, third, void __user *, ptr, long, fifth)
18{
19 int version, ret;
20
21 version = call >> 16; /* hack for backward compatibility */
22 call &= 0xffff;
23
24 switch (call) {
25 case SEMOP:
26 return sys_semtimedop(first, (struct sembuf __user *)ptr,
27 second, NULL);
28 case SEMTIMEDOP:
29 return sys_semtimedop(first, (struct sembuf __user *)ptr,
30 second,
31 (const struct timespec __user *)fifth);
32
33 case SEMGET:
34 return sys_semget(first, second, third);
35 case SEMCTL: {
36 union semun fourth;
37 if (!ptr)
38 return -EINVAL;
39 if (get_user(fourth.__pad, (void __user * __user *) ptr))
40 return -EFAULT;
41 return sys_semctl(first, second, third, fourth);
42 }
43
44 case MSGSND:
45 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
46 second, third);
47 case MSGRCV:
48 switch (version) {
49 case 0: {
50 struct ipc_kludge tmp;
51 if (!ptr)
52 return -EINVAL;
53
54 if (copy_from_user(&tmp,
55 (struct ipc_kludge __user *) ptr,
56 sizeof(tmp)))
57 return -EFAULT;
58 return sys_msgrcv(first, tmp.msgp, second,
59 tmp.msgtyp, third);
60 }
61 default:
62 return sys_msgrcv(first,
63 (struct msgbuf __user *) ptr,
64 second, fifth, third);
65 }
66 case MSGGET:
67 return sys_msgget((key_t) first, second);
68 case MSGCTL:
69 return sys_msgctl(first, second, (struct msqid_ds __user *)ptr);
70
71 case SHMAT:
72 switch (version) {
73 default: {
74 unsigned long raddr;
75 ret = do_shmat(first, (char __user *)ptr,
76 second, &raddr);
77 if (ret)
78 return ret;
79 return put_user(raddr, (unsigned long __user *) third);
80 }
81 case 1:
82 /*
83 * This was the entry point for kernel-originating calls
84 * from iBCS2 in 2.2 days.
85 */
86 return -EINVAL;
87 }
88 case SHMDT:
89 return sys_shmdt((char __user *)ptr);
90 case SHMGET:
91 return sys_shmget(first, second, third);
92 case SHMCTL:
93 return sys_shmctl(first, second,
94 (struct shmid_ds __user *) ptr);
95 default:
96 return -ENOSYS;
97 }
98}
99#endif
diff --git a/kernel/acct.c b/kernel/acct.c
index a6605ca921b6..24f8c81fc48d 100644
--- a/kernel/acct.c
+++ b/kernel/acct.c
@@ -588,16 +588,6 @@ out:
588} 588}
589 589
590/** 590/**
591 * acct_init_pacct - initialize a new pacct_struct
592 * @pacct: per-process accounting info struct to initialize
593 */
594void acct_init_pacct(struct pacct_struct *pacct)
595{
596 memset(pacct, 0, sizeof(struct pacct_struct));
597 pacct->ac_utime = pacct->ac_stime = cputime_zero;
598}
599
600/**
601 * acct_collect - collect accounting information into pacct_struct 591 * acct_collect - collect accounting information into pacct_struct
602 * @exitcode: task exit code 592 * @exitcode: task exit code
603 * @group_dead: not 0, if this thread is the last one in the process. 593 * @group_dead: not 0, if this thread is the last one in the process.
diff --git a/kernel/audit.c b/kernel/audit.c
index 5feed232be9d..78f7f86aa238 100644
--- a/kernel/audit.c
+++ b/kernel/audit.c
@@ -398,7 +398,7 @@ static void kauditd_send_skb(struct sk_buff *skb)
398 skb_get(skb); 398 skb_get(skb);
399 err = netlink_unicast(audit_sock, skb, audit_nlk_pid, 0); 399 err = netlink_unicast(audit_sock, skb, audit_nlk_pid, 0);
400 if (err < 0) { 400 if (err < 0) {
401 BUG_ON(err != -ECONNREFUSED); /* Shoudn't happen */ 401 BUG_ON(err != -ECONNREFUSED); /* Shouldn't happen */
402 printk(KERN_ERR "audit: *NO* daemon at audit_pid=%d\n", audit_pid); 402 printk(KERN_ERR "audit: *NO* daemon at audit_pid=%d\n", audit_pid);
403 audit_log_lost("auditd dissapeared\n"); 403 audit_log_lost("auditd dissapeared\n");
404 audit_pid = 0; 404 audit_pid = 0;
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 4fd90e129772..ef909a329750 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -4,6 +4,10 @@
4 * Based originally on the cpuset system, extracted by Paul Menage 4 * Based originally on the cpuset system, extracted by Paul Menage
5 * Copyright (C) 2006 Google, Inc 5 * Copyright (C) 2006 Google, Inc
6 * 6 *
7 * Notifications support
8 * Copyright (C) 2009 Nokia Corporation
9 * Author: Kirill A. Shutemov
10 *
7 * Copyright notices from the original cpuset code: 11 * Copyright notices from the original cpuset code:
8 * -------------------------------------------------- 12 * --------------------------------------------------
9 * Copyright (C) 2003 BULL SA. 13 * Copyright (C) 2003 BULL SA.
@@ -44,6 +48,7 @@
44#include <linux/string.h> 48#include <linux/string.h>
45#include <linux/sort.h> 49#include <linux/sort.h>
46#include <linux/kmod.h> 50#include <linux/kmod.h>
51#include <linux/module.h>
47#include <linux/delayacct.h> 52#include <linux/delayacct.h>
48#include <linux/cgroupstats.h> 53#include <linux/cgroupstats.h>
49#include <linux/hash.h> 54#include <linux/hash.h>
@@ -52,15 +57,21 @@
52#include <linux/pid_namespace.h> 57#include <linux/pid_namespace.h>
53#include <linux/idr.h> 58#include <linux/idr.h>
54#include <linux/vmalloc.h> /* TODO: replace with more sophisticated array */ 59#include <linux/vmalloc.h> /* TODO: replace with more sophisticated array */
60#include <linux/eventfd.h>
61#include <linux/poll.h>
55 62
56#include <asm/atomic.h> 63#include <asm/atomic.h>
57 64
58static DEFINE_MUTEX(cgroup_mutex); 65static DEFINE_MUTEX(cgroup_mutex);
59 66
60/* Generate an array of cgroup subsystem pointers */ 67/*
68 * Generate an array of cgroup subsystem pointers. At boot time, this is
69 * populated up to CGROUP_BUILTIN_SUBSYS_COUNT, and modular subsystems are
70 * registered after that. The mutable section of this array is protected by
71 * cgroup_mutex.
72 */
61#define SUBSYS(_x) &_x ## _subsys, 73#define SUBSYS(_x) &_x ## _subsys,
62 74static struct cgroup_subsys *subsys[CGROUP_SUBSYS_COUNT] = {
63static struct cgroup_subsys *subsys[] = {
64#include <linux/cgroup_subsys.h> 75#include <linux/cgroup_subsys.h>
65}; 76};
66 77
@@ -147,6 +158,35 @@ struct css_id {
147 unsigned short stack[0]; /* Array of Length (depth+1) */ 158 unsigned short stack[0]; /* Array of Length (depth+1) */
148}; 159};
149 160
161/*
162 * cgroup_event represents events which userspace want to recieve.
163 */
164struct cgroup_event {
165 /*
166 * Cgroup which the event belongs to.
167 */
168 struct cgroup *cgrp;
169 /*
170 * Control file which the event associated.
171 */
172 struct cftype *cft;
173 /*
174 * eventfd to signal userspace about the event.
175 */
176 struct eventfd_ctx *eventfd;
177 /*
178 * Each of these stored in a list by the cgroup.
179 */
180 struct list_head list;
181 /*
182 * All fields below needed to unregister event when
183 * userspace closes eventfd.
184 */
185 poll_table pt;
186 wait_queue_head_t *wqh;
187 wait_queue_t wait;
188 struct work_struct remove;
189};
150 190
151/* The list of hierarchy roots */ 191/* The list of hierarchy roots */
152 192
@@ -250,7 +290,8 @@ struct cg_cgroup_link {
250static struct css_set init_css_set; 290static struct css_set init_css_set;
251static struct cg_cgroup_link init_css_set_link; 291static struct cg_cgroup_link init_css_set_link;
252 292
253static int cgroup_subsys_init_idr(struct cgroup_subsys *ss); 293static int cgroup_init_idr(struct cgroup_subsys *ss,
294 struct cgroup_subsys_state *css);
254 295
255/* css_set_lock protects the list of css_set objects, and the 296/* css_set_lock protects the list of css_set objects, and the
256 * chain of tasks off each css_set. Nests outside task->alloc_lock 297 * chain of tasks off each css_set. Nests outside task->alloc_lock
@@ -448,8 +489,11 @@ static struct css_set *find_existing_css_set(
448 struct hlist_node *node; 489 struct hlist_node *node;
449 struct css_set *cg; 490 struct css_set *cg;
450 491
451 /* Built the set of subsystem state objects that we want to 492 /*
452 * see in the new css_set */ 493 * Build the set of subsystem state objects that we want to see in the
494 * new css_set. while subsystems can change globally, the entries here
495 * won't change, so no need for locking.
496 */
453 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 497 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
454 if (root->subsys_bits & (1UL << i)) { 498 if (root->subsys_bits & (1UL << i)) {
455 /* Subsystem is in this hierarchy. So we want 499 /* Subsystem is in this hierarchy. So we want
@@ -696,6 +740,7 @@ void cgroup_lock(void)
696{ 740{
697 mutex_lock(&cgroup_mutex); 741 mutex_lock(&cgroup_mutex);
698} 742}
743EXPORT_SYMBOL_GPL(cgroup_lock);
699 744
700/** 745/**
701 * cgroup_unlock - release lock on cgroup changes 746 * cgroup_unlock - release lock on cgroup changes
@@ -706,6 +751,7 @@ void cgroup_unlock(void)
706{ 751{
707 mutex_unlock(&cgroup_mutex); 752 mutex_unlock(&cgroup_mutex);
708} 753}
754EXPORT_SYMBOL_GPL(cgroup_unlock);
709 755
710/* 756/*
711 * A couple of forward declarations required, due to cyclic reference loop: 757 * A couple of forward declarations required, due to cyclic reference loop:
@@ -757,6 +803,7 @@ static int cgroup_call_pre_destroy(struct cgroup *cgrp)
757 if (ret) 803 if (ret)
758 break; 804 break;
759 } 805 }
806
760 return ret; 807 return ret;
761} 808}
762 809
@@ -884,7 +931,11 @@ void cgroup_release_and_wakeup_rmdir(struct cgroup_subsys_state *css)
884 css_put(css); 931 css_put(css);
885} 932}
886 933
887 934/*
935 * Call with cgroup_mutex held. Drops reference counts on modules, including
936 * any duplicate ones that parse_cgroupfs_options took. If this function
937 * returns an error, no reference counts are touched.
938 */
888static int rebind_subsystems(struct cgroupfs_root *root, 939static int rebind_subsystems(struct cgroupfs_root *root,
889 unsigned long final_bits) 940 unsigned long final_bits)
890{ 941{
@@ -892,6 +943,8 @@ static int rebind_subsystems(struct cgroupfs_root *root,
892 struct cgroup *cgrp = &root->top_cgroup; 943 struct cgroup *cgrp = &root->top_cgroup;
893 int i; 944 int i;
894 945
946 BUG_ON(!mutex_is_locked(&cgroup_mutex));
947
895 removed_bits = root->actual_subsys_bits & ~final_bits; 948 removed_bits = root->actual_subsys_bits & ~final_bits;
896 added_bits = final_bits & ~root->actual_subsys_bits; 949 added_bits = final_bits & ~root->actual_subsys_bits;
897 /* Check that any added subsystems are currently free */ 950 /* Check that any added subsystems are currently free */
@@ -900,6 +953,12 @@ static int rebind_subsystems(struct cgroupfs_root *root,
900 struct cgroup_subsys *ss = subsys[i]; 953 struct cgroup_subsys *ss = subsys[i];
901 if (!(bit & added_bits)) 954 if (!(bit & added_bits))
902 continue; 955 continue;
956 /*
957 * Nobody should tell us to do a subsys that doesn't exist:
958 * parse_cgroupfs_options should catch that case and refcounts
959 * ensure that subsystems won't disappear once selected.
960 */
961 BUG_ON(ss == NULL);
903 if (ss->root != &rootnode) { 962 if (ss->root != &rootnode) {
904 /* Subsystem isn't free */ 963 /* Subsystem isn't free */
905 return -EBUSY; 964 return -EBUSY;
@@ -919,6 +978,7 @@ static int rebind_subsystems(struct cgroupfs_root *root,
919 unsigned long bit = 1UL << i; 978 unsigned long bit = 1UL << i;
920 if (bit & added_bits) { 979 if (bit & added_bits) {
921 /* We're binding this subsystem to this hierarchy */ 980 /* We're binding this subsystem to this hierarchy */
981 BUG_ON(ss == NULL);
922 BUG_ON(cgrp->subsys[i]); 982 BUG_ON(cgrp->subsys[i]);
923 BUG_ON(!dummytop->subsys[i]); 983 BUG_ON(!dummytop->subsys[i]);
924 BUG_ON(dummytop->subsys[i]->cgroup != dummytop); 984 BUG_ON(dummytop->subsys[i]->cgroup != dummytop);
@@ -930,8 +990,10 @@ static int rebind_subsystems(struct cgroupfs_root *root,
930 if (ss->bind) 990 if (ss->bind)
931 ss->bind(ss, cgrp); 991 ss->bind(ss, cgrp);
932 mutex_unlock(&ss->hierarchy_mutex); 992 mutex_unlock(&ss->hierarchy_mutex);
993 /* refcount was already taken, and we're keeping it */
933 } else if (bit & removed_bits) { 994 } else if (bit & removed_bits) {
934 /* We're removing this subsystem */ 995 /* We're removing this subsystem */
996 BUG_ON(ss == NULL);
935 BUG_ON(cgrp->subsys[i] != dummytop->subsys[i]); 997 BUG_ON(cgrp->subsys[i] != dummytop->subsys[i]);
936 BUG_ON(cgrp->subsys[i]->cgroup != cgrp); 998 BUG_ON(cgrp->subsys[i]->cgroup != cgrp);
937 mutex_lock(&ss->hierarchy_mutex); 999 mutex_lock(&ss->hierarchy_mutex);
@@ -942,9 +1004,20 @@ static int rebind_subsystems(struct cgroupfs_root *root,
942 subsys[i]->root = &rootnode; 1004 subsys[i]->root = &rootnode;
943 list_move(&ss->sibling, &rootnode.subsys_list); 1005 list_move(&ss->sibling, &rootnode.subsys_list);
944 mutex_unlock(&ss->hierarchy_mutex); 1006 mutex_unlock(&ss->hierarchy_mutex);
1007 /* subsystem is now free - drop reference on module */
1008 module_put(ss->module);
945 } else if (bit & final_bits) { 1009 } else if (bit & final_bits) {
946 /* Subsystem state should already exist */ 1010 /* Subsystem state should already exist */
1011 BUG_ON(ss == NULL);
947 BUG_ON(!cgrp->subsys[i]); 1012 BUG_ON(!cgrp->subsys[i]);
1013 /*
1014 * a refcount was taken, but we already had one, so
1015 * drop the extra reference.
1016 */
1017 module_put(ss->module);
1018#ifdef CONFIG_MODULE_UNLOAD
1019 BUG_ON(ss->module && !module_refcount(ss->module));
1020#endif
948 } else { 1021 } else {
949 /* Subsystem state shouldn't exist */ 1022 /* Subsystem state shouldn't exist */
950 BUG_ON(cgrp->subsys[i]); 1023 BUG_ON(cgrp->subsys[i]);
@@ -986,13 +1059,20 @@ struct cgroup_sb_opts {
986 1059
987}; 1060};
988 1061
989/* Convert a hierarchy specifier into a bitmask of subsystems and 1062/*
990 * flags. */ 1063 * Convert a hierarchy specifier into a bitmask of subsystems and flags. Call
991static int parse_cgroupfs_options(char *data, 1064 * with cgroup_mutex held to protect the subsys[] array. This function takes
992 struct cgroup_sb_opts *opts) 1065 * refcounts on subsystems to be used, unless it returns error, in which case
1066 * no refcounts are taken.
1067 */
1068static int parse_cgroupfs_options(char *data, struct cgroup_sb_opts *opts)
993{ 1069{
994 char *token, *o = data ?: "all"; 1070 char *token, *o = data ?: "all";
995 unsigned long mask = (unsigned long)-1; 1071 unsigned long mask = (unsigned long)-1;
1072 int i;
1073 bool module_pin_failed = false;
1074
1075 BUG_ON(!mutex_is_locked(&cgroup_mutex));
996 1076
997#ifdef CONFIG_CPUSETS 1077#ifdef CONFIG_CPUSETS
998 mask = ~(1UL << cpuset_subsys_id); 1078 mask = ~(1UL << cpuset_subsys_id);
@@ -1005,10 +1085,11 @@ static int parse_cgroupfs_options(char *data,
1005 return -EINVAL; 1085 return -EINVAL;
1006 if (!strcmp(token, "all")) { 1086 if (!strcmp(token, "all")) {
1007 /* Add all non-disabled subsystems */ 1087 /* Add all non-disabled subsystems */
1008 int i;
1009 opts->subsys_bits = 0; 1088 opts->subsys_bits = 0;
1010 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 1089 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
1011 struct cgroup_subsys *ss = subsys[i]; 1090 struct cgroup_subsys *ss = subsys[i];
1091 if (ss == NULL)
1092 continue;
1012 if (!ss->disabled) 1093 if (!ss->disabled)
1013 opts->subsys_bits |= 1ul << i; 1094 opts->subsys_bits |= 1ul << i;
1014 } 1095 }
@@ -1026,7 +1107,6 @@ static int parse_cgroupfs_options(char *data,
1026 if (!opts->release_agent) 1107 if (!opts->release_agent)
1027 return -ENOMEM; 1108 return -ENOMEM;
1028 } else if (!strncmp(token, "name=", 5)) { 1109 } else if (!strncmp(token, "name=", 5)) {
1029 int i;
1030 const char *name = token + 5; 1110 const char *name = token + 5;
1031 /* Can't specify an empty name */ 1111 /* Can't specify an empty name */
1032 if (!strlen(name)) 1112 if (!strlen(name))
@@ -1050,9 +1130,10 @@ static int parse_cgroupfs_options(char *data,
1050 return -ENOMEM; 1130 return -ENOMEM;
1051 } else { 1131 } else {
1052 struct cgroup_subsys *ss; 1132 struct cgroup_subsys *ss;
1053 int i;
1054 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 1133 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
1055 ss = subsys[i]; 1134 ss = subsys[i];
1135 if (ss == NULL)
1136 continue;
1056 if (!strcmp(token, ss->name)) { 1137 if (!strcmp(token, ss->name)) {
1057 if (!ss->disabled) 1138 if (!ss->disabled)
1058 set_bit(i, &opts->subsys_bits); 1139 set_bit(i, &opts->subsys_bits);
@@ -1087,9 +1168,54 @@ static int parse_cgroupfs_options(char *data,
1087 if (!opts->subsys_bits && !opts->name) 1168 if (!opts->subsys_bits && !opts->name)
1088 return -EINVAL; 1169 return -EINVAL;
1089 1170
1171 /*
1172 * Grab references on all the modules we'll need, so the subsystems
1173 * don't dance around before rebind_subsystems attaches them. This may
1174 * take duplicate reference counts on a subsystem that's already used,
1175 * but rebind_subsystems handles this case.
1176 */
1177 for (i = CGROUP_BUILTIN_SUBSYS_COUNT; i < CGROUP_SUBSYS_COUNT; i++) {
1178 unsigned long bit = 1UL << i;
1179
1180 if (!(bit & opts->subsys_bits))
1181 continue;
1182 if (!try_module_get(subsys[i]->module)) {
1183 module_pin_failed = true;
1184 break;
1185 }
1186 }
1187 if (module_pin_failed) {
1188 /*
1189 * oops, one of the modules was going away. this means that we
1190 * raced with a module_delete call, and to the user this is
1191 * essentially a "subsystem doesn't exist" case.
1192 */
1193 for (i--; i >= CGROUP_BUILTIN_SUBSYS_COUNT; i--) {
1194 /* drop refcounts only on the ones we took */
1195 unsigned long bit = 1UL << i;
1196
1197 if (!(bit & opts->subsys_bits))
1198 continue;
1199 module_put(subsys[i]->module);
1200 }
1201 return -ENOENT;
1202 }
1203
1090 return 0; 1204 return 0;
1091} 1205}
1092 1206
1207static void drop_parsed_module_refcounts(unsigned long subsys_bits)
1208{
1209 int i;
1210 for (i = CGROUP_BUILTIN_SUBSYS_COUNT; i < CGROUP_SUBSYS_COUNT; i++) {
1211 unsigned long bit = 1UL << i;
1212
1213 if (!(bit & subsys_bits))
1214 continue;
1215 module_put(subsys[i]->module);
1216 }
1217}
1218
1093static int cgroup_remount(struct super_block *sb, int *flags, char *data) 1219static int cgroup_remount(struct super_block *sb, int *flags, char *data)
1094{ 1220{
1095 int ret = 0; 1221 int ret = 0;
@@ -1106,21 +1232,19 @@ static int cgroup_remount(struct super_block *sb, int *flags, char *data)
1106 if (ret) 1232 if (ret)
1107 goto out_unlock; 1233 goto out_unlock;
1108 1234
1109 /* Don't allow flags to change at remount */ 1235 /* Don't allow flags or name to change at remount */
1110 if (opts.flags != root->flags) { 1236 if (opts.flags != root->flags ||
1111 ret = -EINVAL; 1237 (opts.name && strcmp(opts.name, root->name))) {
1112 goto out_unlock;
1113 }
1114
1115 /* Don't allow name to change at remount */
1116 if (opts.name && strcmp(opts.name, root->name)) {
1117 ret = -EINVAL; 1238 ret = -EINVAL;
1239 drop_parsed_module_refcounts(opts.subsys_bits);
1118 goto out_unlock; 1240 goto out_unlock;
1119 } 1241 }
1120 1242
1121 ret = rebind_subsystems(root, opts.subsys_bits); 1243 ret = rebind_subsystems(root, opts.subsys_bits);
1122 if (ret) 1244 if (ret) {
1245 drop_parsed_module_refcounts(opts.subsys_bits);
1123 goto out_unlock; 1246 goto out_unlock;
1247 }
1124 1248
1125 /* (re)populate subsystem files */ 1249 /* (re)populate subsystem files */
1126 cgroup_populate_dir(cgrp); 1250 cgroup_populate_dir(cgrp);
@@ -1151,6 +1275,8 @@ static void init_cgroup_housekeeping(struct cgroup *cgrp)
1151 INIT_LIST_HEAD(&cgrp->release_list); 1275 INIT_LIST_HEAD(&cgrp->release_list);
1152 INIT_LIST_HEAD(&cgrp->pidlists); 1276 INIT_LIST_HEAD(&cgrp->pidlists);
1153 mutex_init(&cgrp->pidlist_mutex); 1277 mutex_init(&cgrp->pidlist_mutex);
1278 INIT_LIST_HEAD(&cgrp->event_list);
1279 spin_lock_init(&cgrp->event_list_lock);
1154} 1280}
1155 1281
1156static void init_cgroup_root(struct cgroupfs_root *root) 1282static void init_cgroup_root(struct cgroupfs_root *root)
@@ -1306,7 +1432,9 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
1306 struct cgroupfs_root *new_root; 1432 struct cgroupfs_root *new_root;
1307 1433
1308 /* First find the desired set of subsystems */ 1434 /* First find the desired set of subsystems */
1435 mutex_lock(&cgroup_mutex);
1309 ret = parse_cgroupfs_options(data, &opts); 1436 ret = parse_cgroupfs_options(data, &opts);
1437 mutex_unlock(&cgroup_mutex);
1310 if (ret) 1438 if (ret)
1311 goto out_err; 1439 goto out_err;
1312 1440
@@ -1317,7 +1445,7 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
1317 new_root = cgroup_root_from_opts(&opts); 1445 new_root = cgroup_root_from_opts(&opts);
1318 if (IS_ERR(new_root)) { 1446 if (IS_ERR(new_root)) {
1319 ret = PTR_ERR(new_root); 1447 ret = PTR_ERR(new_root);
1320 goto out_err; 1448 goto drop_modules;
1321 } 1449 }
1322 opts.new_root = new_root; 1450 opts.new_root = new_root;
1323 1451
@@ -1326,7 +1454,7 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
1326 if (IS_ERR(sb)) { 1454 if (IS_ERR(sb)) {
1327 ret = PTR_ERR(sb); 1455 ret = PTR_ERR(sb);
1328 cgroup_drop_root(opts.new_root); 1456 cgroup_drop_root(opts.new_root);
1329 goto out_err; 1457 goto drop_modules;
1330 } 1458 }
1331 1459
1332 root = sb->s_fs_info; 1460 root = sb->s_fs_info;
@@ -1382,6 +1510,11 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
1382 free_cg_links(&tmp_cg_links); 1510 free_cg_links(&tmp_cg_links);
1383 goto drop_new_super; 1511 goto drop_new_super;
1384 } 1512 }
1513 /*
1514 * There must be no failure case after here, since rebinding
1515 * takes care of subsystems' refcounts, which are explicitly
1516 * dropped in the failure exit path.
1517 */
1385 1518
1386 /* EBUSY should be the only error here */ 1519 /* EBUSY should be the only error here */
1387 BUG_ON(ret); 1520 BUG_ON(ret);
@@ -1420,6 +1553,8 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
1420 * any) is not needed 1553 * any) is not needed
1421 */ 1554 */
1422 cgroup_drop_root(opts.new_root); 1555 cgroup_drop_root(opts.new_root);
1556 /* no subsys rebinding, so refcounts don't change */
1557 drop_parsed_module_refcounts(opts.subsys_bits);
1423 } 1558 }
1424 1559
1425 simple_set_mnt(mnt, sb); 1560 simple_set_mnt(mnt, sb);
@@ -1429,6 +1564,8 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
1429 1564
1430 drop_new_super: 1565 drop_new_super:
1431 deactivate_locked_super(sb); 1566 deactivate_locked_super(sb);
1567 drop_modules:
1568 drop_parsed_module_refcounts(opts.subsys_bits);
1432 out_err: 1569 out_err:
1433 kfree(opts.release_agent); 1570 kfree(opts.release_agent);
1434 kfree(opts.name); 1571 kfree(opts.name);
@@ -1542,6 +1679,7 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen)
1542 memmove(buf, start, buf + buflen - start); 1679 memmove(buf, start, buf + buflen - start);
1543 return 0; 1680 return 0;
1544} 1681}
1682EXPORT_SYMBOL_GPL(cgroup_path);
1545 1683
1546/** 1684/**
1547 * cgroup_attach_task - attach task 'tsk' to cgroup 'cgrp' 1685 * cgroup_attach_task - attach task 'tsk' to cgroup 'cgrp'
@@ -1554,7 +1692,7 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen)
1554int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk) 1692int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1555{ 1693{
1556 int retval = 0; 1694 int retval = 0;
1557 struct cgroup_subsys *ss; 1695 struct cgroup_subsys *ss, *failed_ss = NULL;
1558 struct cgroup *oldcgrp; 1696 struct cgroup *oldcgrp;
1559 struct css_set *cg; 1697 struct css_set *cg;
1560 struct css_set *newcg; 1698 struct css_set *newcg;
@@ -1568,8 +1706,16 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1568 for_each_subsys(root, ss) { 1706 for_each_subsys(root, ss) {
1569 if (ss->can_attach) { 1707 if (ss->can_attach) {
1570 retval = ss->can_attach(ss, cgrp, tsk, false); 1708 retval = ss->can_attach(ss, cgrp, tsk, false);
1571 if (retval) 1709 if (retval) {
1572 return retval; 1710 /*
1711 * Remember on which subsystem the can_attach()
1712 * failed, so that we only call cancel_attach()
1713 * against the subsystems whose can_attach()
1714 * succeeded. (See below)
1715 */
1716 failed_ss = ss;
1717 goto out;
1718 }
1573 } 1719 }
1574 } 1720 }
1575 1721
@@ -1583,14 +1729,17 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1583 */ 1729 */
1584 newcg = find_css_set(cg, cgrp); 1730 newcg = find_css_set(cg, cgrp);
1585 put_css_set(cg); 1731 put_css_set(cg);
1586 if (!newcg) 1732 if (!newcg) {
1587 return -ENOMEM; 1733 retval = -ENOMEM;
1734 goto out;
1735 }
1588 1736
1589 task_lock(tsk); 1737 task_lock(tsk);
1590 if (tsk->flags & PF_EXITING) { 1738 if (tsk->flags & PF_EXITING) {
1591 task_unlock(tsk); 1739 task_unlock(tsk);
1592 put_css_set(newcg); 1740 put_css_set(newcg);
1593 return -ESRCH; 1741 retval = -ESRCH;
1742 goto out;
1594 } 1743 }
1595 rcu_assign_pointer(tsk->cgroups, newcg); 1744 rcu_assign_pointer(tsk->cgroups, newcg);
1596 task_unlock(tsk); 1745 task_unlock(tsk);
@@ -1616,7 +1765,22 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1616 * is no longer empty. 1765 * is no longer empty.
1617 */ 1766 */
1618 cgroup_wakeup_rmdir_waiter(cgrp); 1767 cgroup_wakeup_rmdir_waiter(cgrp);
1619 return 0; 1768out:
1769 if (retval) {
1770 for_each_subsys(root, ss) {
1771 if (ss == failed_ss)
1772 /*
1773 * This subsystem was the one that failed the
1774 * can_attach() check earlier, so we don't need
1775 * to call cancel_attach() against it or any
1776 * remaining subsystems.
1777 */
1778 break;
1779 if (ss->cancel_attach)
1780 ss->cancel_attach(ss, cgrp, tsk, false);
1781 }
1782 }
1783 return retval;
1620} 1784}
1621 1785
1622/* 1786/*
@@ -1682,6 +1846,7 @@ bool cgroup_lock_live_group(struct cgroup *cgrp)
1682 } 1846 }
1683 return true; 1847 return true;
1684} 1848}
1849EXPORT_SYMBOL_GPL(cgroup_lock_live_group);
1685 1850
1686static int cgroup_release_agent_write(struct cgroup *cgrp, struct cftype *cft, 1851static int cgroup_release_agent_write(struct cgroup *cgrp, struct cftype *cft,
1687 const char *buffer) 1852 const char *buffer)
@@ -1950,6 +2115,16 @@ static const struct inode_operations cgroup_dir_inode_operations = {
1950 .rename = cgroup_rename, 2115 .rename = cgroup_rename,
1951}; 2116};
1952 2117
2118/*
2119 * Check if a file is a control file
2120 */
2121static inline struct cftype *__file_cft(struct file *file)
2122{
2123 if (file->f_dentry->d_inode->i_fop != &cgroup_file_operations)
2124 return ERR_PTR(-EINVAL);
2125 return __d_cft(file->f_dentry);
2126}
2127
1953static int cgroup_create_file(struct dentry *dentry, mode_t mode, 2128static int cgroup_create_file(struct dentry *dentry, mode_t mode,
1954 struct super_block *sb) 2129 struct super_block *sb)
1955{ 2130{
@@ -2069,6 +2244,7 @@ int cgroup_add_file(struct cgroup *cgrp,
2069 error = PTR_ERR(dentry); 2244 error = PTR_ERR(dentry);
2070 return error; 2245 return error;
2071} 2246}
2247EXPORT_SYMBOL_GPL(cgroup_add_file);
2072 2248
2073int cgroup_add_files(struct cgroup *cgrp, 2249int cgroup_add_files(struct cgroup *cgrp,
2074 struct cgroup_subsys *subsys, 2250 struct cgroup_subsys *subsys,
@@ -2083,6 +2259,7 @@ int cgroup_add_files(struct cgroup *cgrp,
2083 } 2259 }
2084 return 0; 2260 return 0;
2085} 2261}
2262EXPORT_SYMBOL_GPL(cgroup_add_files);
2086 2263
2087/** 2264/**
2088 * cgroup_task_count - count the number of tasks in a cgroup. 2265 * cgroup_task_count - count the number of tasks in a cgroup.
@@ -2468,7 +2645,8 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
2468{ 2645{
2469 struct cgroup_pidlist *l; 2646 struct cgroup_pidlist *l;
2470 /* don't need task_nsproxy() if we're looking at ourself */ 2647 /* don't need task_nsproxy() if we're looking at ourself */
2471 struct pid_namespace *ns = get_pid_ns(current->nsproxy->pid_ns); 2648 struct pid_namespace *ns = current->nsproxy->pid_ns;
2649
2472 /* 2650 /*
2473 * We can't drop the pidlist_mutex before taking the l->mutex in case 2651 * We can't drop the pidlist_mutex before taking the l->mutex in case
2474 * the last ref-holder is trying to remove l from the list at the same 2652 * the last ref-holder is trying to remove l from the list at the same
@@ -2478,8 +2656,6 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
2478 mutex_lock(&cgrp->pidlist_mutex); 2656 mutex_lock(&cgrp->pidlist_mutex);
2479 list_for_each_entry(l, &cgrp->pidlists, links) { 2657 list_for_each_entry(l, &cgrp->pidlists, links) {
2480 if (l->key.type == type && l->key.ns == ns) { 2658 if (l->key.type == type && l->key.ns == ns) {
2481 /* found a matching list - drop the extra refcount */
2482 put_pid_ns(ns);
2483 /* make sure l doesn't vanish out from under us */ 2659 /* make sure l doesn't vanish out from under us */
2484 down_write(&l->mutex); 2660 down_write(&l->mutex);
2485 mutex_unlock(&cgrp->pidlist_mutex); 2661 mutex_unlock(&cgrp->pidlist_mutex);
@@ -2490,13 +2666,12 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
2490 l = kmalloc(sizeof(struct cgroup_pidlist), GFP_KERNEL); 2666 l = kmalloc(sizeof(struct cgroup_pidlist), GFP_KERNEL);
2491 if (!l) { 2667 if (!l) {
2492 mutex_unlock(&cgrp->pidlist_mutex); 2668 mutex_unlock(&cgrp->pidlist_mutex);
2493 put_pid_ns(ns);
2494 return l; 2669 return l;
2495 } 2670 }
2496 init_rwsem(&l->mutex); 2671 init_rwsem(&l->mutex);
2497 down_write(&l->mutex); 2672 down_write(&l->mutex);
2498 l->key.type = type; 2673 l->key.type = type;
2499 l->key.ns = ns; 2674 l->key.ns = get_pid_ns(ns);
2500 l->use_count = 0; /* don't increment here */ 2675 l->use_count = 0; /* don't increment here */
2501 l->list = NULL; 2676 l->list = NULL;
2502 l->owner = cgrp; 2677 l->owner = cgrp;
@@ -2804,6 +2979,174 @@ static int cgroup_write_notify_on_release(struct cgroup *cgrp,
2804} 2979}
2805 2980
2806/* 2981/*
2982 * Unregister event and free resources.
2983 *
2984 * Gets called from workqueue.
2985 */
2986static void cgroup_event_remove(struct work_struct *work)
2987{
2988 struct cgroup_event *event = container_of(work, struct cgroup_event,
2989 remove);
2990 struct cgroup *cgrp = event->cgrp;
2991
2992 /* TODO: check return code */
2993 event->cft->unregister_event(cgrp, event->cft, event->eventfd);
2994
2995 eventfd_ctx_put(event->eventfd);
2996 kfree(event);
2997 dput(cgrp->dentry);
2998}
2999
3000/*
3001 * Gets called on POLLHUP on eventfd when user closes it.
3002 *
3003 * Called with wqh->lock held and interrupts disabled.
3004 */
3005static int cgroup_event_wake(wait_queue_t *wait, unsigned mode,
3006 int sync, void *key)
3007{
3008 struct cgroup_event *event = container_of(wait,
3009 struct cgroup_event, wait);
3010 struct cgroup *cgrp = event->cgrp;
3011 unsigned long flags = (unsigned long)key;
3012
3013 if (flags & POLLHUP) {
3014 remove_wait_queue_locked(event->wqh, &event->wait);
3015 spin_lock(&cgrp->event_list_lock);
3016 list_del(&event->list);
3017 spin_unlock(&cgrp->event_list_lock);
3018 /*
3019 * We are in atomic context, but cgroup_event_remove() may
3020 * sleep, so we have to call it in workqueue.
3021 */
3022 schedule_work(&event->remove);
3023 }
3024
3025 return 0;
3026}
3027
3028static void cgroup_event_ptable_queue_proc(struct file *file,
3029 wait_queue_head_t *wqh, poll_table *pt)
3030{
3031 struct cgroup_event *event = container_of(pt,
3032 struct cgroup_event, pt);
3033
3034 event->wqh = wqh;
3035 add_wait_queue(wqh, &event->wait);
3036}
3037
3038/*
3039 * Parse input and register new cgroup event handler.
3040 *
3041 * Input must be in format '<event_fd> <control_fd> <args>'.
3042 * Interpretation of args is defined by control file implementation.
3043 */
3044static int cgroup_write_event_control(struct cgroup *cgrp, struct cftype *cft,
3045 const char *buffer)
3046{
3047 struct cgroup_event *event = NULL;
3048 unsigned int efd, cfd;
3049 struct file *efile = NULL;
3050 struct file *cfile = NULL;
3051 char *endp;
3052 int ret;
3053
3054 efd = simple_strtoul(buffer, &endp, 10);
3055 if (*endp != ' ')
3056 return -EINVAL;
3057 buffer = endp + 1;
3058
3059 cfd = simple_strtoul(buffer, &endp, 10);
3060 if ((*endp != ' ') && (*endp != '\0'))
3061 return -EINVAL;
3062 buffer = endp + 1;
3063
3064 event = kzalloc(sizeof(*event), GFP_KERNEL);
3065 if (!event)
3066 return -ENOMEM;
3067 event->cgrp = cgrp;
3068 INIT_LIST_HEAD(&event->list);
3069 init_poll_funcptr(&event->pt, cgroup_event_ptable_queue_proc);
3070 init_waitqueue_func_entry(&event->wait, cgroup_event_wake);
3071 INIT_WORK(&event->remove, cgroup_event_remove);
3072
3073 efile = eventfd_fget(efd);
3074 if (IS_ERR(efile)) {
3075 ret = PTR_ERR(efile);
3076 goto fail;
3077 }
3078
3079 event->eventfd = eventfd_ctx_fileget(efile);
3080 if (IS_ERR(event->eventfd)) {
3081 ret = PTR_ERR(event->eventfd);
3082 goto fail;
3083 }
3084
3085 cfile = fget(cfd);
3086 if (!cfile) {
3087 ret = -EBADF;
3088 goto fail;
3089 }
3090
3091 /* the process need read permission on control file */
3092 ret = file_permission(cfile, MAY_READ);
3093 if (ret < 0)
3094 goto fail;
3095
3096 event->cft = __file_cft(cfile);
3097 if (IS_ERR(event->cft)) {
3098 ret = PTR_ERR(event->cft);
3099 goto fail;
3100 }
3101
3102 if (!event->cft->register_event || !event->cft->unregister_event) {
3103 ret = -EINVAL;
3104 goto fail;
3105 }
3106
3107 ret = event->cft->register_event(cgrp, event->cft,
3108 event->eventfd, buffer);
3109 if (ret)
3110 goto fail;
3111
3112 if (efile->f_op->poll(efile, &event->pt) & POLLHUP) {
3113 event->cft->unregister_event(cgrp, event->cft, event->eventfd);
3114 ret = 0;
3115 goto fail;
3116 }
3117
3118 /*
3119 * Events should be removed after rmdir of cgroup directory, but before
3120 * destroying subsystem state objects. Let's take reference to cgroup
3121 * directory dentry to do that.
3122 */
3123 dget(cgrp->dentry);
3124
3125 spin_lock(&cgrp->event_list_lock);
3126 list_add(&event->list, &cgrp->event_list);
3127 spin_unlock(&cgrp->event_list_lock);
3128
3129 fput(cfile);
3130 fput(efile);
3131
3132 return 0;
3133
3134fail:
3135 if (cfile)
3136 fput(cfile);
3137
3138 if (event && event->eventfd && !IS_ERR(event->eventfd))
3139 eventfd_ctx_put(event->eventfd);
3140
3141 if (!IS_ERR_OR_NULL(efile))
3142 fput(efile);
3143
3144 kfree(event);
3145
3146 return ret;
3147}
3148
3149/*
2807 * for the common functions, 'private' gives the type of file 3150 * for the common functions, 'private' gives the type of file
2808 */ 3151 */
2809/* for hysterical raisins, we can't put this on the older files */ 3152/* for hysterical raisins, we can't put this on the older files */
@@ -2828,6 +3171,11 @@ static struct cftype files[] = {
2828 .read_u64 = cgroup_read_notify_on_release, 3171 .read_u64 = cgroup_read_notify_on_release,
2829 .write_u64 = cgroup_write_notify_on_release, 3172 .write_u64 = cgroup_write_notify_on_release,
2830 }, 3173 },
3174 {
3175 .name = CGROUP_FILE_GENERIC_PREFIX "event_control",
3176 .write_string = cgroup_write_event_control,
3177 .mode = S_IWUGO,
3178 },
2831}; 3179};
2832 3180
2833static struct cftype cft_release_agent = { 3181static struct cftype cft_release_agent = {
@@ -2892,8 +3240,14 @@ static void cgroup_lock_hierarchy(struct cgroupfs_root *root)
2892 /* We need to take each hierarchy_mutex in a consistent order */ 3240 /* We need to take each hierarchy_mutex in a consistent order */
2893 int i; 3241 int i;
2894 3242
3243 /*
3244 * No worry about a race with rebind_subsystems that might mess up the
3245 * locking order, since both parties are under cgroup_mutex.
3246 */
2895 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 3247 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
2896 struct cgroup_subsys *ss = subsys[i]; 3248 struct cgroup_subsys *ss = subsys[i];
3249 if (ss == NULL)
3250 continue;
2897 if (ss->root == root) 3251 if (ss->root == root)
2898 mutex_lock(&ss->hierarchy_mutex); 3252 mutex_lock(&ss->hierarchy_mutex);
2899 } 3253 }
@@ -2905,6 +3259,8 @@ static void cgroup_unlock_hierarchy(struct cgroupfs_root *root)
2905 3259
2906 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 3260 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
2907 struct cgroup_subsys *ss = subsys[i]; 3261 struct cgroup_subsys *ss = subsys[i];
3262 if (ss == NULL)
3263 continue;
2908 if (ss->root == root) 3264 if (ss->root == root)
2909 mutex_unlock(&ss->hierarchy_mutex); 3265 mutex_unlock(&ss->hierarchy_mutex);
2910 } 3266 }
@@ -3028,11 +3384,16 @@ static int cgroup_has_css_refs(struct cgroup *cgrp)
3028 * synchronization other than RCU, and the subsystem linked 3384 * synchronization other than RCU, and the subsystem linked
3029 * list isn't RCU-safe */ 3385 * list isn't RCU-safe */
3030 int i; 3386 int i;
3387 /*
3388 * We won't need to lock the subsys array, because the subsystems
3389 * we're concerned about aren't going anywhere since our cgroup root
3390 * has a reference on them.
3391 */
3031 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 3392 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
3032 struct cgroup_subsys *ss = subsys[i]; 3393 struct cgroup_subsys *ss = subsys[i];
3033 struct cgroup_subsys_state *css; 3394 struct cgroup_subsys_state *css;
3034 /* Skip subsystems not in this hierarchy */ 3395 /* Skip subsystems not present or not in this hierarchy */
3035 if (ss->root != cgrp->root) 3396 if (ss == NULL || ss->root != cgrp->root)
3036 continue; 3397 continue;
3037 css = cgrp->subsys[ss->subsys_id]; 3398 css = cgrp->subsys[ss->subsys_id];
3038 /* When called from check_for_release() it's possible 3399 /* When called from check_for_release() it's possible
@@ -3106,6 +3467,7 @@ static int cgroup_rmdir(struct inode *unused_dir, struct dentry *dentry)
3106 struct dentry *d; 3467 struct dentry *d;
3107 struct cgroup *parent; 3468 struct cgroup *parent;
3108 DEFINE_WAIT(wait); 3469 DEFINE_WAIT(wait);
3470 struct cgroup_event *event, *tmp;
3109 int ret; 3471 int ret;
3110 3472
3111 /* the vfs holds both inode->i_mutex already */ 3473 /* the vfs holds both inode->i_mutex already */
@@ -3189,6 +3551,20 @@ again:
3189 set_bit(CGRP_RELEASABLE, &parent->flags); 3551 set_bit(CGRP_RELEASABLE, &parent->flags);
3190 check_for_release(parent); 3552 check_for_release(parent);
3191 3553
3554 /*
3555 * Unregister events and notify userspace.
3556 * Notify userspace about cgroup removing only after rmdir of cgroup
3557 * directory to avoid race between userspace and kernelspace
3558 */
3559 spin_lock(&cgrp->event_list_lock);
3560 list_for_each_entry_safe(event, tmp, &cgrp->event_list, list) {
3561 list_del(&event->list);
3562 remove_wait_queue(event->wqh, &event->wait);
3563 eventfd_signal(event->eventfd, 1);
3564 schedule_work(&event->remove);
3565 }
3566 spin_unlock(&cgrp->event_list_lock);
3567
3192 mutex_unlock(&cgroup_mutex); 3568 mutex_unlock(&cgroup_mutex);
3193 return 0; 3569 return 0;
3194} 3570}
@@ -3223,7 +3599,196 @@ static void __init cgroup_init_subsys(struct cgroup_subsys *ss)
3223 mutex_init(&ss->hierarchy_mutex); 3599 mutex_init(&ss->hierarchy_mutex);
3224 lockdep_set_class(&ss->hierarchy_mutex, &ss->subsys_key); 3600 lockdep_set_class(&ss->hierarchy_mutex, &ss->subsys_key);
3225 ss->active = 1; 3601 ss->active = 1;
3602
3603 /* this function shouldn't be used with modular subsystems, since they
3604 * need to register a subsys_id, among other things */
3605 BUG_ON(ss->module);
3606}
3607
3608/**
3609 * cgroup_load_subsys: load and register a modular subsystem at runtime
3610 * @ss: the subsystem to load
3611 *
3612 * This function should be called in a modular subsystem's initcall. If the
3613 * subsytem is built as a module, it will be assigned a new subsys_id and set
3614 * up for use. If the subsystem is built-in anyway, work is delegated to the
3615 * simpler cgroup_init_subsys.
3616 */
3617int __init_or_module cgroup_load_subsys(struct cgroup_subsys *ss)
3618{
3619 int i;
3620 struct cgroup_subsys_state *css;
3621
3622 /* check name and function validity */
3623 if (ss->name == NULL || strlen(ss->name) > MAX_CGROUP_TYPE_NAMELEN ||
3624 ss->create == NULL || ss->destroy == NULL)
3625 return -EINVAL;
3626
3627 /*
3628 * we don't support callbacks in modular subsystems. this check is
3629 * before the ss->module check for consistency; a subsystem that could
3630 * be a module should still have no callbacks even if the user isn't
3631 * compiling it as one.
3632 */
3633 if (ss->fork || ss->exit)
3634 return -EINVAL;
3635
3636 /*
3637 * an optionally modular subsystem is built-in: we want to do nothing,
3638 * since cgroup_init_subsys will have already taken care of it.
3639 */
3640 if (ss->module == NULL) {
3641 /* a few sanity checks */
3642 BUG_ON(ss->subsys_id >= CGROUP_BUILTIN_SUBSYS_COUNT);
3643 BUG_ON(subsys[ss->subsys_id] != ss);
3644 return 0;
3645 }
3646
3647 /*
3648 * need to register a subsys id before anything else - for example,
3649 * init_cgroup_css needs it.
3650 */
3651 mutex_lock(&cgroup_mutex);
3652 /* find the first empty slot in the array */
3653 for (i = CGROUP_BUILTIN_SUBSYS_COUNT; i < CGROUP_SUBSYS_COUNT; i++) {
3654 if (subsys[i] == NULL)
3655 break;
3656 }
3657 if (i == CGROUP_SUBSYS_COUNT) {
3658 /* maximum number of subsystems already registered! */
3659 mutex_unlock(&cgroup_mutex);
3660 return -EBUSY;
3661 }
3662 /* assign ourselves the subsys_id */
3663 ss->subsys_id = i;
3664 subsys[i] = ss;
3665
3666 /*
3667 * no ss->create seems to need anything important in the ss struct, so
3668 * this can happen first (i.e. before the rootnode attachment).
3669 */
3670 css = ss->create(ss, dummytop);
3671 if (IS_ERR(css)) {
3672 /* failure case - need to deassign the subsys[] slot. */
3673 subsys[i] = NULL;
3674 mutex_unlock(&cgroup_mutex);
3675 return PTR_ERR(css);
3676 }
3677
3678 list_add(&ss->sibling, &rootnode.subsys_list);
3679 ss->root = &rootnode;
3680
3681 /* our new subsystem will be attached to the dummy hierarchy. */
3682 init_cgroup_css(css, ss, dummytop);
3683 /* init_idr must be after init_cgroup_css because it sets css->id. */
3684 if (ss->use_id) {
3685 int ret = cgroup_init_idr(ss, css);
3686 if (ret) {
3687 dummytop->subsys[ss->subsys_id] = NULL;
3688 ss->destroy(ss, dummytop);
3689 subsys[i] = NULL;
3690 mutex_unlock(&cgroup_mutex);
3691 return ret;
3692 }
3693 }
3694
3695 /*
3696 * Now we need to entangle the css into the existing css_sets. unlike
3697 * in cgroup_init_subsys, there are now multiple css_sets, so each one
3698 * will need a new pointer to it; done by iterating the css_set_table.
3699 * furthermore, modifying the existing css_sets will corrupt the hash
3700 * table state, so each changed css_set will need its hash recomputed.
3701 * this is all done under the css_set_lock.
3702 */
3703 write_lock(&css_set_lock);
3704 for (i = 0; i < CSS_SET_TABLE_SIZE; i++) {
3705 struct css_set *cg;
3706 struct hlist_node *node, *tmp;
3707 struct hlist_head *bucket = &css_set_table[i], *new_bucket;
3708
3709 hlist_for_each_entry_safe(cg, node, tmp, bucket, hlist) {
3710 /* skip entries that we already rehashed */
3711 if (cg->subsys[ss->subsys_id])
3712 continue;
3713 /* remove existing entry */
3714 hlist_del(&cg->hlist);
3715 /* set new value */
3716 cg->subsys[ss->subsys_id] = css;
3717 /* recompute hash and restore entry */
3718 new_bucket = css_set_hash(cg->subsys);
3719 hlist_add_head(&cg->hlist, new_bucket);
3720 }
3721 }
3722 write_unlock(&css_set_lock);
3723
3724 mutex_init(&ss->hierarchy_mutex);
3725 lockdep_set_class(&ss->hierarchy_mutex, &ss->subsys_key);
3726 ss->active = 1;
3727
3728 /* success! */
3729 mutex_unlock(&cgroup_mutex);
3730 return 0;
3226} 3731}
3732EXPORT_SYMBOL_GPL(cgroup_load_subsys);
3733
3734/**
3735 * cgroup_unload_subsys: unload a modular subsystem
3736 * @ss: the subsystem to unload
3737 *
3738 * This function should be called in a modular subsystem's exitcall. When this
3739 * function is invoked, the refcount on the subsystem's module will be 0, so
3740 * the subsystem will not be attached to any hierarchy.
3741 */
3742void cgroup_unload_subsys(struct cgroup_subsys *ss)
3743{
3744 struct cg_cgroup_link *link;
3745 struct hlist_head *hhead;
3746
3747 BUG_ON(ss->module == NULL);
3748
3749 /*
3750 * we shouldn't be called if the subsystem is in use, and the use of
3751 * try_module_get in parse_cgroupfs_options should ensure that it
3752 * doesn't start being used while we're killing it off.
3753 */
3754 BUG_ON(ss->root != &rootnode);
3755
3756 mutex_lock(&cgroup_mutex);
3757 /* deassign the subsys_id */
3758 BUG_ON(ss->subsys_id < CGROUP_BUILTIN_SUBSYS_COUNT);
3759 subsys[ss->subsys_id] = NULL;
3760
3761 /* remove subsystem from rootnode's list of subsystems */
3762 list_del(&ss->sibling);
3763
3764 /*
3765 * disentangle the css from all css_sets attached to the dummytop. as
3766 * in loading, we need to pay our respects to the hashtable gods.
3767 */
3768 write_lock(&css_set_lock);
3769 list_for_each_entry(link, &dummytop->css_sets, cgrp_link_list) {
3770 struct css_set *cg = link->cg;
3771
3772 hlist_del(&cg->hlist);
3773 BUG_ON(!cg->subsys[ss->subsys_id]);
3774 cg->subsys[ss->subsys_id] = NULL;
3775 hhead = css_set_hash(cg->subsys);
3776 hlist_add_head(&cg->hlist, hhead);
3777 }
3778 write_unlock(&css_set_lock);
3779
3780 /*
3781 * remove subsystem's css from the dummytop and free it - need to free
3782 * before marking as null because ss->destroy needs the cgrp->subsys
3783 * pointer to find their state. note that this also takes care of
3784 * freeing the css_id.
3785 */
3786 ss->destroy(ss, dummytop);
3787 dummytop->subsys[ss->subsys_id] = NULL;
3788
3789 mutex_unlock(&cgroup_mutex);
3790}
3791EXPORT_SYMBOL_GPL(cgroup_unload_subsys);
3227 3792
3228/** 3793/**
3229 * cgroup_init_early - cgroup initialization at system boot 3794 * cgroup_init_early - cgroup initialization at system boot
@@ -3253,7 +3818,8 @@ int __init cgroup_init_early(void)
3253 for (i = 0; i < CSS_SET_TABLE_SIZE; i++) 3818 for (i = 0; i < CSS_SET_TABLE_SIZE; i++)
3254 INIT_HLIST_HEAD(&css_set_table[i]); 3819 INIT_HLIST_HEAD(&css_set_table[i]);
3255 3820
3256 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 3821 /* at bootup time, we don't worry about modular subsystems */
3822 for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
3257 struct cgroup_subsys *ss = subsys[i]; 3823 struct cgroup_subsys *ss = subsys[i];
3258 3824
3259 BUG_ON(!ss->name); 3825 BUG_ON(!ss->name);
@@ -3288,12 +3854,13 @@ int __init cgroup_init(void)
3288 if (err) 3854 if (err)
3289 return err; 3855 return err;
3290 3856
3291 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 3857 /* at bootup time, we don't worry about modular subsystems */
3858 for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
3292 struct cgroup_subsys *ss = subsys[i]; 3859 struct cgroup_subsys *ss = subsys[i];
3293 if (!ss->early_init) 3860 if (!ss->early_init)
3294 cgroup_init_subsys(ss); 3861 cgroup_init_subsys(ss);
3295 if (ss->use_id) 3862 if (ss->use_id)
3296 cgroup_subsys_init_idr(ss); 3863 cgroup_init_idr(ss, init_css_set.subsys[ss->subsys_id]);
3297 } 3864 }
3298 3865
3299 /* Add init_css_set to the hash table */ 3866 /* Add init_css_set to the hash table */
@@ -3397,9 +3964,16 @@ static int proc_cgroupstats_show(struct seq_file *m, void *v)
3397 int i; 3964 int i;
3398 3965
3399 seq_puts(m, "#subsys_name\thierarchy\tnum_cgroups\tenabled\n"); 3966 seq_puts(m, "#subsys_name\thierarchy\tnum_cgroups\tenabled\n");
3967 /*
3968 * ideally we don't want subsystems moving around while we do this.
3969 * cgroup_mutex is also necessary to guarantee an atomic snapshot of
3970 * subsys/hierarchy state.
3971 */
3400 mutex_lock(&cgroup_mutex); 3972 mutex_lock(&cgroup_mutex);
3401 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 3973 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
3402 struct cgroup_subsys *ss = subsys[i]; 3974 struct cgroup_subsys *ss = subsys[i];
3975 if (ss == NULL)
3976 continue;
3403 seq_printf(m, "%s\t%d\t%d\t%d\n", 3977 seq_printf(m, "%s\t%d\t%d\t%d\n",
3404 ss->name, ss->root->hierarchy_id, 3978 ss->name, ss->root->hierarchy_id,
3405 ss->root->number_of_cgroups, !ss->disabled); 3979 ss->root->number_of_cgroups, !ss->disabled);
@@ -3457,7 +4031,12 @@ void cgroup_fork_callbacks(struct task_struct *child)
3457{ 4031{
3458 if (need_forkexit_callback) { 4032 if (need_forkexit_callback) {
3459 int i; 4033 int i;
3460 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 4034 /*
4035 * forkexit callbacks are only supported for builtin
4036 * subsystems, and the builtin section of the subsys array is
4037 * immutable, so we don't need to lock the subsys array here.
4038 */
4039 for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
3461 struct cgroup_subsys *ss = subsys[i]; 4040 struct cgroup_subsys *ss = subsys[i];
3462 if (ss->fork) 4041 if (ss->fork)
3463 ss->fork(ss, child); 4042 ss->fork(ss, child);
@@ -3526,7 +4105,11 @@ void cgroup_exit(struct task_struct *tsk, int run_callbacks)
3526 struct css_set *cg; 4105 struct css_set *cg;
3527 4106
3528 if (run_callbacks && need_forkexit_callback) { 4107 if (run_callbacks && need_forkexit_callback) {
3529 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 4108 /*
4109 * modular subsystems can't use callbacks, so no need to lock
4110 * the subsys array
4111 */
4112 for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
3530 struct cgroup_subsys *ss = subsys[i]; 4113 struct cgroup_subsys *ss = subsys[i];
3531 if (ss->exit) 4114 if (ss->exit)
3532 ss->exit(ss, tsk); 4115 ss->exit(ss, tsk);
@@ -3720,12 +4303,13 @@ static void check_for_release(struct cgroup *cgrp)
3720 } 4303 }
3721} 4304}
3722 4305
3723void __css_put(struct cgroup_subsys_state *css) 4306/* Caller must verify that the css is not for root cgroup */
4307void __css_put(struct cgroup_subsys_state *css, int count)
3724{ 4308{
3725 struct cgroup *cgrp = css->cgroup; 4309 struct cgroup *cgrp = css->cgroup;
3726 int val; 4310 int val;
3727 rcu_read_lock(); 4311 rcu_read_lock();
3728 val = atomic_dec_return(&css->refcnt); 4312 val = atomic_sub_return(count, &css->refcnt);
3729 if (val == 1) { 4313 if (val == 1) {
3730 if (notify_on_release(cgrp)) { 4314 if (notify_on_release(cgrp)) {
3731 set_bit(CGRP_RELEASABLE, &cgrp->flags); 4315 set_bit(CGRP_RELEASABLE, &cgrp->flags);
@@ -3736,6 +4320,7 @@ void __css_put(struct cgroup_subsys_state *css)
3736 rcu_read_unlock(); 4320 rcu_read_unlock();
3737 WARN_ON_ONCE(val < 1); 4321 WARN_ON_ONCE(val < 1);
3738} 4322}
4323EXPORT_SYMBOL_GPL(__css_put);
3739 4324
3740/* 4325/*
3741 * Notify userspace when a cgroup is released, by running the 4326 * Notify userspace when a cgroup is released, by running the
@@ -3817,8 +4402,11 @@ static int __init cgroup_disable(char *str)
3817 while ((token = strsep(&str, ",")) != NULL) { 4402 while ((token = strsep(&str, ",")) != NULL) {
3818 if (!*token) 4403 if (!*token)
3819 continue; 4404 continue;
3820 4405 /*
3821 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 4406 * cgroup_disable, being at boot time, can't know about module
4407 * subsystems, so we don't worry about them.
4408 */
4409 for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
3822 struct cgroup_subsys *ss = subsys[i]; 4410 struct cgroup_subsys *ss = subsys[i];
3823 4411
3824 if (!strcmp(token, ss->name)) { 4412 if (!strcmp(token, ss->name)) {
@@ -3848,6 +4436,7 @@ unsigned short css_id(struct cgroup_subsys_state *css)
3848 return cssid->id; 4436 return cssid->id;
3849 return 0; 4437 return 0;
3850} 4438}
4439EXPORT_SYMBOL_GPL(css_id);
3851 4440
3852unsigned short css_depth(struct cgroup_subsys_state *css) 4441unsigned short css_depth(struct cgroup_subsys_state *css)
3853{ 4442{
@@ -3857,6 +4446,7 @@ unsigned short css_depth(struct cgroup_subsys_state *css)
3857 return cssid->depth; 4446 return cssid->depth;
3858 return 0; 4447 return 0;
3859} 4448}
4449EXPORT_SYMBOL_GPL(css_depth);
3860 4450
3861bool css_is_ancestor(struct cgroup_subsys_state *child, 4451bool css_is_ancestor(struct cgroup_subsys_state *child,
3862 const struct cgroup_subsys_state *root) 4452 const struct cgroup_subsys_state *root)
@@ -3893,6 +4483,7 @@ void free_css_id(struct cgroup_subsys *ss, struct cgroup_subsys_state *css)
3893 spin_unlock(&ss->id_lock); 4483 spin_unlock(&ss->id_lock);
3894 call_rcu(&id->rcu_head, __free_css_id_cb); 4484 call_rcu(&id->rcu_head, __free_css_id_cb);
3895} 4485}
4486EXPORT_SYMBOL_GPL(free_css_id);
3896 4487
3897/* 4488/*
3898 * This is called by init or create(). Then, calls to this function are 4489 * This is called by init or create(). Then, calls to this function are
@@ -3942,15 +4533,14 @@ err_out:
3942 4533
3943} 4534}
3944 4535
3945static int __init cgroup_subsys_init_idr(struct cgroup_subsys *ss) 4536static int __init_or_module cgroup_init_idr(struct cgroup_subsys *ss,
4537 struct cgroup_subsys_state *rootcss)
3946{ 4538{
3947 struct css_id *newid; 4539 struct css_id *newid;
3948 struct cgroup_subsys_state *rootcss;
3949 4540
3950 spin_lock_init(&ss->id_lock); 4541 spin_lock_init(&ss->id_lock);
3951 idr_init(&ss->idr); 4542 idr_init(&ss->idr);
3952 4543
3953 rootcss = init_css_set.subsys[ss->subsys_id];
3954 newid = get_new_cssid(ss, 0); 4544 newid = get_new_cssid(ss, 0);
3955 if (IS_ERR(newid)) 4545 if (IS_ERR(newid))
3956 return PTR_ERR(newid); 4546 return PTR_ERR(newid);
@@ -4010,6 +4600,7 @@ struct cgroup_subsys_state *css_lookup(struct cgroup_subsys *ss, int id)
4010 4600
4011 return rcu_dereference(cssid->css); 4601 return rcu_dereference(cssid->css);
4012} 4602}
4603EXPORT_SYMBOL_GPL(css_lookup);
4013 4604
4014/** 4605/**
4015 * css_get_next - lookup next cgroup under specified hierarchy. 4606 * css_get_next - lookup next cgroup under specified hierarchy.
diff --git a/kernel/exit.c b/kernel/exit.c
index ce1e48c2d93d..cce59cb5ee6a 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -87,7 +87,7 @@ static void __exit_signal(struct task_struct *tsk)
87 87
88 sighand = rcu_dereference_check(tsk->sighand, 88 sighand = rcu_dereference_check(tsk->sighand,
89 rcu_read_lock_held() || 89 rcu_read_lock_held() ||
90 lockdep_is_held(&tasklist_lock)); 90 lockdep_tasklist_lock_is_held());
91 spin_lock(&sighand->siglock); 91 spin_lock(&sighand->siglock);
92 92
93 posix_cpu_timers_exit(tsk); 93 posix_cpu_timers_exit(tsk);
diff --git a/kernel/fork.c b/kernel/fork.c
index b0ec34abc0bb..4799c5f0e6d0 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -86,7 +86,14 @@ int max_threads; /* tunable limit on nr_threads */
86DEFINE_PER_CPU(unsigned long, process_counts) = 0; 86DEFINE_PER_CPU(unsigned long, process_counts) = 0;
87 87
88__cacheline_aligned DEFINE_RWLOCK(tasklist_lock); /* outer */ 88__cacheline_aligned DEFINE_RWLOCK(tasklist_lock); /* outer */
89EXPORT_SYMBOL_GPL(tasklist_lock); 89
90#ifdef CONFIG_PROVE_RCU
91int lockdep_tasklist_lock_is_held(void)
92{
93 return lockdep_is_held(&tasklist_lock);
94}
95EXPORT_SYMBOL_GPL(lockdep_tasklist_lock_is_held);
96#endif /* #ifdef CONFIG_PROVE_RCU */
90 97
91int nr_processes(void) 98int nr_processes(void)
92{ 99{
@@ -833,17 +840,6 @@ static void posix_cpu_timers_init_group(struct signal_struct *sig)
833 /* Thread group counters. */ 840 /* Thread group counters. */
834 thread_group_cputime_init(sig); 841 thread_group_cputime_init(sig);
835 842
836 /* Expiration times and increments. */
837 sig->it[CPUCLOCK_PROF].expires = cputime_zero;
838 sig->it[CPUCLOCK_PROF].incr = cputime_zero;
839 sig->it[CPUCLOCK_VIRT].expires = cputime_zero;
840 sig->it[CPUCLOCK_VIRT].incr = cputime_zero;
841
842 /* Cached expiration times. */
843 sig->cputime_expires.prof_exp = cputime_zero;
844 sig->cputime_expires.virt_exp = cputime_zero;
845 sig->cputime_expires.sched_exp = 0;
846
847 cpu_limit = ACCESS_ONCE(sig->rlim[RLIMIT_CPU].rlim_cur); 843 cpu_limit = ACCESS_ONCE(sig->rlim[RLIMIT_CPU].rlim_cur);
848 if (cpu_limit != RLIM_INFINITY) { 844 if (cpu_limit != RLIM_INFINITY) {
849 sig->cputime_expires.prof_exp = secs_to_cputime(cpu_limit); 845 sig->cputime_expires.prof_exp = secs_to_cputime(cpu_limit);
@@ -863,7 +859,7 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
863 if (clone_flags & CLONE_THREAD) 859 if (clone_flags & CLONE_THREAD)
864 return 0; 860 return 0;
865 861
866 sig = kmem_cache_alloc(signal_cachep, GFP_KERNEL); 862 sig = kmem_cache_zalloc(signal_cachep, GFP_KERNEL);
867 tsk->signal = sig; 863 tsk->signal = sig;
868 if (!sig) 864 if (!sig)
869 return -ENOMEM; 865 return -ENOMEM;
@@ -871,46 +867,21 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
871 atomic_set(&sig->count, 1); 867 atomic_set(&sig->count, 1);
872 atomic_set(&sig->live, 1); 868 atomic_set(&sig->live, 1);
873 init_waitqueue_head(&sig->wait_chldexit); 869 init_waitqueue_head(&sig->wait_chldexit);
874 sig->flags = 0;
875 if (clone_flags & CLONE_NEWPID) 870 if (clone_flags & CLONE_NEWPID)
876 sig->flags |= SIGNAL_UNKILLABLE; 871 sig->flags |= SIGNAL_UNKILLABLE;
877 sig->group_exit_code = 0;
878 sig->group_exit_task = NULL;
879 sig->group_stop_count = 0;
880 sig->curr_target = tsk; 872 sig->curr_target = tsk;
881 init_sigpending(&sig->shared_pending); 873 init_sigpending(&sig->shared_pending);
882 INIT_LIST_HEAD(&sig->posix_timers); 874 INIT_LIST_HEAD(&sig->posix_timers);
883 875
884 hrtimer_init(&sig->real_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 876 hrtimer_init(&sig->real_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
885 sig->it_real_incr.tv64 = 0;
886 sig->real_timer.function = it_real_fn; 877 sig->real_timer.function = it_real_fn;
887 878
888 sig->leader = 0; /* session leadership doesn't inherit */
889 sig->tty_old_pgrp = NULL;
890 sig->tty = NULL;
891
892 sig->utime = sig->stime = sig->cutime = sig->cstime = cputime_zero;
893 sig->gtime = cputime_zero;
894 sig->cgtime = cputime_zero;
895#ifndef CONFIG_VIRT_CPU_ACCOUNTING
896 sig->prev_utime = sig->prev_stime = cputime_zero;
897#endif
898 sig->nvcsw = sig->nivcsw = sig->cnvcsw = sig->cnivcsw = 0;
899 sig->min_flt = sig->maj_flt = sig->cmin_flt = sig->cmaj_flt = 0;
900 sig->inblock = sig->oublock = sig->cinblock = sig->coublock = 0;
901 sig->maxrss = sig->cmaxrss = 0;
902 task_io_accounting_init(&sig->ioac);
903 sig->sum_sched_runtime = 0;
904 taskstats_tgid_init(sig);
905
906 task_lock(current->group_leader); 879 task_lock(current->group_leader);
907 memcpy(sig->rlim, current->signal->rlim, sizeof sig->rlim); 880 memcpy(sig->rlim, current->signal->rlim, sizeof sig->rlim);
908 task_unlock(current->group_leader); 881 task_unlock(current->group_leader);
909 882
910 posix_cpu_timers_init_group(sig); 883 posix_cpu_timers_init_group(sig);
911 884
912 acct_init_pacct(&sig->pacct);
913
914 tty_audit_fork(sig); 885 tty_audit_fork(sig);
915 886
916 sig->oom_adj = current->signal->oom_adj; 887 sig->oom_adj = current->signal->oom_adj;
diff --git a/kernel/hw_breakpoint.c b/kernel/hw_breakpoint.c
index 967e66143e11..03808ed342a6 100644
--- a/kernel/hw_breakpoint.c
+++ b/kernel/hw_breakpoint.c
@@ -413,17 +413,17 @@ EXPORT_SYMBOL_GPL(unregister_hw_breakpoint);
413 * 413 *
414 * @return a set of per_cpu pointers to perf events 414 * @return a set of per_cpu pointers to perf events
415 */ 415 */
416struct perf_event ** 416struct perf_event * __percpu *
417register_wide_hw_breakpoint(struct perf_event_attr *attr, 417register_wide_hw_breakpoint(struct perf_event_attr *attr,
418 perf_overflow_handler_t triggered) 418 perf_overflow_handler_t triggered)
419{ 419{
420 struct perf_event **cpu_events, **pevent, *bp; 420 struct perf_event * __percpu *cpu_events, **pevent, *bp;
421 long err; 421 long err;
422 int cpu; 422 int cpu;
423 423
424 cpu_events = alloc_percpu(typeof(*cpu_events)); 424 cpu_events = alloc_percpu(typeof(*cpu_events));
425 if (!cpu_events) 425 if (!cpu_events)
426 return ERR_PTR(-ENOMEM); 426 return (void __percpu __force *)ERR_PTR(-ENOMEM);
427 427
428 get_online_cpus(); 428 get_online_cpus();
429 for_each_online_cpu(cpu) { 429 for_each_online_cpu(cpu) {
@@ -451,7 +451,7 @@ fail:
451 put_online_cpus(); 451 put_online_cpus();
452 452
453 free_percpu(cpu_events); 453 free_percpu(cpu_events);
454 return ERR_PTR(err); 454 return (void __percpu __force *)ERR_PTR(err);
455} 455}
456EXPORT_SYMBOL_GPL(register_wide_hw_breakpoint); 456EXPORT_SYMBOL_GPL(register_wide_hw_breakpoint);
457 457
@@ -459,7 +459,7 @@ EXPORT_SYMBOL_GPL(register_wide_hw_breakpoint);
459 * unregister_wide_hw_breakpoint - unregister a wide breakpoint in the kernel 459 * unregister_wide_hw_breakpoint - unregister a wide breakpoint in the kernel
460 * @cpu_events: the per cpu set of events to unregister 460 * @cpu_events: the per cpu set of events to unregister
461 */ 461 */
462void unregister_wide_hw_breakpoint(struct perf_event **cpu_events) 462void unregister_wide_hw_breakpoint(struct perf_event * __percpu *cpu_events)
463{ 463{
464 int cpu; 464 int cpu;
465 struct perf_event **pevent; 465 struct perf_event **pevent;
@@ -489,5 +489,4 @@ struct pmu perf_ops_bp = {
489 .enable = arch_install_hw_breakpoint, 489 .enable = arch_install_hw_breakpoint,
490 .disable = arch_uninstall_hw_breakpoint, 490 .disable = arch_uninstall_hw_breakpoint,
491 .read = hw_breakpoint_pmu_read, 491 .read = hw_breakpoint_pmu_read,
492 .unthrottle = hw_breakpoint_pmu_unthrottle
493}; 492};
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index d70394f12ee9..42ec11b2af8a 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -554,7 +554,7 @@ out:
554 * signal. The occurence is latched into the irq controller hardware 554 * signal. The occurence is latched into the irq controller hardware
555 * and must be acked in order to be reenabled. After the ack another 555 * and must be acked in order to be reenabled. After the ack another
556 * interrupt can happen on the same source even before the first one 556 * interrupt can happen on the same source even before the first one
557 * is handled by the assosiacted event handler. If this happens it 557 * is handled by the associated event handler. If this happens it
558 * might be necessary to disable (mask) the interrupt depending on the 558 * might be necessary to disable (mask) the interrupt depending on the
559 * controller hardware. This requires to reenable the interrupt inside 559 * controller hardware. This requires to reenable the interrupt inside
560 * of the loop which handles the interrupts which have arrived while 560 * of the loop which handles the interrupts which have arrived while
diff --git a/kernel/irq/devres.c b/kernel/irq/devres.c
index d06df9c41cba..1ef4ffcdfa55 100644
--- a/kernel/irq/devres.c
+++ b/kernel/irq/devres.c
@@ -42,7 +42,7 @@ static int devm_irq_match(struct device *dev, void *res, void *data)
42 * automatically freed on driver detach. 42 * automatically freed on driver detach.
43 * 43 *
44 * If an IRQ allocated with this function needs to be freed 44 * If an IRQ allocated with this function needs to be freed
45 * separately, dev_free_irq() must be used. 45 * separately, devm_free_irq() must be used.
46 */ 46 */
47int devm_request_threaded_irq(struct device *dev, unsigned int irq, 47int devm_request_threaded_irq(struct device *dev, unsigned int irq,
48 irq_handler_t handler, irq_handler_t thread_fn, 48 irq_handler_t handler, irq_handler_t thread_fn,
@@ -81,7 +81,7 @@ EXPORT_SYMBOL(devm_request_threaded_irq);
81 * Except for the extra @dev argument, this function takes the 81 * Except for the extra @dev argument, this function takes the
82 * same arguments and performs the same function as free_irq(). 82 * same arguments and performs the same function as free_irq().
83 * This function instead of free_irq() should be used to manually 83 * This function instead of free_irq() should be used to manually
84 * free IRQs allocated with dev_request_irq(). 84 * free IRQs allocated with devm_request_irq().
85 */ 85 */
86void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id) 86void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id)
87{ 87{
diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c
index 6b1ccc3f0205..21fe3c426948 100644
--- a/kernel/ksysfs.c
+++ b/kernel/ksysfs.c
@@ -33,7 +33,7 @@ static ssize_t uevent_seqnum_show(struct kobject *kobj,
33} 33}
34KERNEL_ATTR_RO(uevent_seqnum); 34KERNEL_ATTR_RO(uevent_seqnum);
35 35
36/* uevent helper program, used during early boo */ 36/* uevent helper program, used during early boot */
37static ssize_t uevent_helper_show(struct kobject *kobj, 37static ssize_t uevent_helper_show(struct kobject *kobj,
38 struct kobj_attribute *attr, char *buf) 38 struct kobj_attribute *attr, char *buf)
39{ 39{
diff --git a/kernel/lockdep.c b/kernel/lockdep.c
index 0c30d0455de1..681bc2e1e187 100644
--- a/kernel/lockdep.c
+++ b/kernel/lockdep.c
@@ -3822,6 +3822,7 @@ void lockdep_rcu_dereference(const char *file, const int line)
3822 printk("%s:%d invoked rcu_dereference_check() without protection!\n", 3822 printk("%s:%d invoked rcu_dereference_check() without protection!\n",
3823 file, line); 3823 file, line);
3824 printk("\nother info that might help us debug this:\n\n"); 3824 printk("\nother info that might help us debug this:\n\n");
3825 printk("\nrcu_scheduler_active = %d, debug_locks = %d\n", rcu_scheduler_active, debug_locks);
3825 lockdep_print_held_locks(curr); 3826 lockdep_print_held_locks(curr);
3826 printk("\nstack backtrace:\n"); 3827 printk("\nstack backtrace:\n");
3827 dump_stack(); 3828 dump_stack();
diff --git a/kernel/module.c b/kernel/module.c
index e5538d5f00ad..c968d3606dca 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -1085,6 +1085,7 @@ static void add_sect_attrs(struct module *mod, unsigned int nsect,
1085 if (sattr->name == NULL) 1085 if (sattr->name == NULL)
1086 goto out; 1086 goto out;
1087 sect_attrs->nsections++; 1087 sect_attrs->nsections++;
1088 sysfs_attr_init(&sattr->mattr.attr);
1088 sattr->mattr.show = module_sect_show; 1089 sattr->mattr.show = module_sect_show;
1089 sattr->mattr.store = NULL; 1090 sattr->mattr.store = NULL;
1090 sattr->mattr.attr.name = sattr->name; 1091 sattr->mattr.attr.name = sattr->name;
@@ -1180,6 +1181,7 @@ static void add_notes_attrs(struct module *mod, unsigned int nsect,
1180 if (sect_empty(&sechdrs[i])) 1181 if (sect_empty(&sechdrs[i]))
1181 continue; 1182 continue;
1182 if (sechdrs[i].sh_type == SHT_NOTE) { 1183 if (sechdrs[i].sh_type == SHT_NOTE) {
1184 sysfs_bin_attr_init(nattr);
1183 nattr->attr.name = mod->sect_attrs->attrs[loaded].name; 1185 nattr->attr.name = mod->sect_attrs->attrs[loaded].name;
1184 nattr->attr.mode = S_IRUGO; 1186 nattr->attr.mode = S_IRUGO;
1185 nattr->size = sechdrs[i].sh_size; 1187 nattr->size = sechdrs[i].sh_size;
@@ -1252,6 +1254,7 @@ int module_add_modinfo_attrs(struct module *mod)
1252 if (!attr->test || 1254 if (!attr->test ||
1253 (attr->test && attr->test(mod))) { 1255 (attr->test && attr->test(mod))) {
1254 memcpy(temp_attr, attr, sizeof(*temp_attr)); 1256 memcpy(temp_attr, attr, sizeof(*temp_attr));
1257 sysfs_attr_init(&temp_attr->attr);
1255 error = sysfs_create_file(&mod->mkobj.kobj,&temp_attr->attr); 1258 error = sysfs_create_file(&mod->mkobj.kobj,&temp_attr->attr);
1256 ++temp_attr; 1259 ++temp_attr;
1257 } 1260 }
diff --git a/kernel/nsproxy.c b/kernel/nsproxy.c
index 09b4ff9711b2..2ab67233ee8f 100644
--- a/kernel/nsproxy.c
+++ b/kernel/nsproxy.c
@@ -24,7 +24,18 @@
24 24
25static struct kmem_cache *nsproxy_cachep; 25static struct kmem_cache *nsproxy_cachep;
26 26
27struct nsproxy init_nsproxy = INIT_NSPROXY(init_nsproxy); 27struct nsproxy init_nsproxy = {
28 .count = ATOMIC_INIT(1),
29 .uts_ns = &init_uts_ns,
30#if defined(CONFIG_POSIX_MQUEUE) || defined(CONFIG_SYSVIPC)
31 .ipc_ns = &init_ipc_ns,
32#endif
33 .mnt_ns = NULL,
34 .pid_ns = &init_pid_ns,
35#ifdef CONFIG_NET
36 .net_ns = &init_net,
37#endif
38};
28 39
29static inline struct nsproxy *create_nsproxy(void) 40static inline struct nsproxy *create_nsproxy(void)
30{ 41{
diff --git a/kernel/params.c b/kernel/params.c
index 8d95f5451b22..0b30ecd53a52 100644
--- a/kernel/params.c
+++ b/kernel/params.c
@@ -401,8 +401,8 @@ int param_get_string(char *buffer, struct kernel_param *kp)
401} 401}
402 402
403/* sysfs output in /sys/modules/XYZ/parameters/ */ 403/* sysfs output in /sys/modules/XYZ/parameters/ */
404#define to_module_attr(n) container_of(n, struct module_attribute, attr); 404#define to_module_attr(n) container_of(n, struct module_attribute, attr)
405#define to_module_kobject(n) container_of(n, struct module_kobject, kobj); 405#define to_module_kobject(n) container_of(n, struct module_kobject, kobj)
406 406
407extern struct kernel_param __start___param[], __stop___param[]; 407extern struct kernel_param __start___param[], __stop___param[];
408 408
@@ -420,7 +420,7 @@ struct module_param_attrs
420}; 420};
421 421
422#ifdef CONFIG_SYSFS 422#ifdef CONFIG_SYSFS
423#define to_param_attr(n) container_of(n, struct param_attribute, mattr); 423#define to_param_attr(n) container_of(n, struct param_attribute, mattr)
424 424
425static ssize_t param_attr_show(struct module_attribute *mattr, 425static ssize_t param_attr_show(struct module_attribute *mattr,
426 struct module *mod, char *buf) 426 struct module *mod, char *buf)
@@ -516,6 +516,7 @@ static __modinit int add_sysfs_param(struct module_kobject *mk,
516 new->grp.attrs = attrs; 516 new->grp.attrs = attrs;
517 517
518 /* Tack new one on the end. */ 518 /* Tack new one on the end. */
519 sysfs_attr_init(&new->attrs[num].mattr.attr);
519 new->attrs[num].param = kp; 520 new->attrs[num].param = kp;
520 new->attrs[num].mattr.show = param_attr_show; 521 new->attrs[num].mattr.show = param_attr_show;
521 new->attrs[num].mattr.store = param_attr_store; 522 new->attrs[num].mattr.store = param_attr_store;
@@ -722,7 +723,7 @@ static ssize_t module_attr_store(struct kobject *kobj,
722 return ret; 723 return ret;
723} 724}
724 725
725static struct sysfs_ops module_sysfs_ops = { 726static const struct sysfs_ops module_sysfs_ops = {
726 .show = module_attr_show, 727 .show = module_attr_show,
727 .store = module_attr_store, 728 .store = module_attr_store,
728}; 729};
@@ -736,7 +737,7 @@ static int uevent_filter(struct kset *kset, struct kobject *kobj)
736 return 0; 737 return 0;
737} 738}
738 739
739static struct kset_uevent_ops module_uevent_ops = { 740static const struct kset_uevent_ops module_uevent_ops = {
740 .filter = uevent_filter, 741 .filter = uevent_filter,
741}; 742};
742 743
diff --git a/kernel/perf_event.c b/kernel/perf_event.c
index 8e352c756ba7..4393b9e73740 100644
--- a/kernel/perf_event.c
+++ b/kernel/perf_event.c
@@ -56,21 +56,6 @@ static atomic_t nr_task_events __read_mostly;
56 */ 56 */
57int sysctl_perf_event_paranoid __read_mostly = 1; 57int sysctl_perf_event_paranoid __read_mostly = 1;
58 58
59static inline bool perf_paranoid_tracepoint_raw(void)
60{
61 return sysctl_perf_event_paranoid > -1;
62}
63
64static inline bool perf_paranoid_cpu(void)
65{
66 return sysctl_perf_event_paranoid > 0;
67}
68
69static inline bool perf_paranoid_kernel(void)
70{
71 return sysctl_perf_event_paranoid > 1;
72}
73
74int sysctl_perf_event_mlock __read_mostly = 512; /* 'free' kb per user */ 59int sysctl_perf_event_mlock __read_mostly = 512; /* 'free' kb per user */
75 60
76/* 61/*
@@ -4123,8 +4108,7 @@ void __perf_sw_event(u32 event_id, u64 nr, int nmi,
4123 if (rctx < 0) 4108 if (rctx < 0)
4124 return; 4109 return;
4125 4110
4126 data.addr = addr; 4111 perf_sample_data_init(&data, addr);
4127 data.raw = NULL;
4128 4112
4129 do_perf_sw_event(PERF_TYPE_SOFTWARE, event_id, nr, nmi, &data, regs); 4113 do_perf_sw_event(PERF_TYPE_SOFTWARE, event_id, nr, nmi, &data, regs);
4130 4114
@@ -4169,11 +4153,10 @@ static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer)
4169 struct perf_event *event; 4153 struct perf_event *event;
4170 u64 period; 4154 u64 period;
4171 4155
4172 event = container_of(hrtimer, struct perf_event, hw.hrtimer); 4156 event = container_of(hrtimer, struct perf_event, hw.hrtimer);
4173 event->pmu->read(event); 4157 event->pmu->read(event);
4174 4158
4175 data.addr = 0; 4159 perf_sample_data_init(&data, 0);
4176 data.raw = NULL;
4177 data.period = event->hw.last_period; 4160 data.period = event->hw.last_period;
4178 regs = get_irq_regs(); 4161 regs = get_irq_regs();
4179 /* 4162 /*
@@ -4337,17 +4320,15 @@ static const struct pmu perf_ops_task_clock = {
4337void perf_tp_event(int event_id, u64 addr, u64 count, void *record, 4320void perf_tp_event(int event_id, u64 addr, u64 count, void *record,
4338 int entry_size) 4321 int entry_size)
4339{ 4322{
4323 struct pt_regs *regs = get_irq_regs();
4324 struct perf_sample_data data;
4340 struct perf_raw_record raw = { 4325 struct perf_raw_record raw = {
4341 .size = entry_size, 4326 .size = entry_size,
4342 .data = record, 4327 .data = record,
4343 }; 4328 };
4344 4329
4345 struct perf_sample_data data = { 4330 perf_sample_data_init(&data, addr);
4346 .addr = addr, 4331 data.raw = &raw;
4347 .raw = &raw,
4348 };
4349
4350 struct pt_regs *regs = get_irq_regs();
4351 4332
4352 if (!regs) 4333 if (!regs)
4353 regs = task_pt_regs(current); 4334 regs = task_pt_regs(current);
@@ -4463,8 +4444,7 @@ void perf_bp_event(struct perf_event *bp, void *data)
4463 struct perf_sample_data sample; 4444 struct perf_sample_data sample;
4464 struct pt_regs *regs = data; 4445 struct pt_regs *regs = data;
4465 4446
4466 sample.raw = NULL; 4447 perf_sample_data_init(&sample, bp->attr.bp_addr);
4467 sample.addr = bp->attr.bp_addr;
4468 4448
4469 if (!perf_exclude_event(bp, regs)) 4449 if (!perf_exclude_event(bp, regs))
4470 perf_swevent_add(bp, 1, 1, &sample, regs); 4450 perf_swevent_add(bp, 1, 1, &sample, regs);
@@ -5481,13 +5461,16 @@ void __init perf_event_init(void)
5481 register_cpu_notifier(&perf_cpu_nb); 5461 register_cpu_notifier(&perf_cpu_nb);
5482} 5462}
5483 5463
5484static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) 5464static ssize_t perf_show_reserve_percpu(struct sysdev_class *class,
5465 struct sysdev_class_attribute *attr,
5466 char *buf)
5485{ 5467{
5486 return sprintf(buf, "%d\n", perf_reserved_percpu); 5468 return sprintf(buf, "%d\n", perf_reserved_percpu);
5487} 5469}
5488 5470
5489static ssize_t 5471static ssize_t
5490perf_set_reserve_percpu(struct sysdev_class *class, 5472perf_set_reserve_percpu(struct sysdev_class *class,
5473 struct sysdev_class_attribute *attr,
5491 const char *buf, 5474 const char *buf,
5492 size_t count) 5475 size_t count)
5493{ 5476{
@@ -5516,13 +5499,17 @@ perf_set_reserve_percpu(struct sysdev_class *class,
5516 return count; 5499 return count;
5517} 5500}
5518 5501
5519static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) 5502static ssize_t perf_show_overcommit(struct sysdev_class *class,
5503 struct sysdev_class_attribute *attr,
5504 char *buf)
5520{ 5505{
5521 return sprintf(buf, "%d\n", perf_overcommit); 5506 return sprintf(buf, "%d\n", perf_overcommit);
5522} 5507}
5523 5508
5524static ssize_t 5509static ssize_t
5525perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) 5510perf_set_overcommit(struct sysdev_class *class,
5511 struct sysdev_class_attribute *attr,
5512 const char *buf, size_t count)
5526{ 5513{
5527 unsigned long val; 5514 unsigned long val;
5528 int err; 5515 int err;
diff --git a/kernel/pid.c b/kernel/pid.c
index 86b296943e5f..aebb30d9c233 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -367,7 +367,9 @@ struct task_struct *pid_task(struct pid *pid, enum pid_type type)
367 struct task_struct *result = NULL; 367 struct task_struct *result = NULL;
368 if (pid) { 368 if (pid) {
369 struct hlist_node *first; 369 struct hlist_node *first;
370 first = rcu_dereference_check(pid->tasks[type].first, rcu_read_lock_held() || lockdep_is_held(&tasklist_lock)); 370 first = rcu_dereference_check(pid->tasks[type].first,
371 rcu_read_lock_held() ||
372 lockdep_tasklist_lock_is_held());
371 if (first) 373 if (first)
372 result = hlist_entry(first, struct task_struct, pids[(type)].node); 374 result = hlist_entry(first, struct task_struct, pids[(type)].node);
373 } 375 }
diff --git a/kernel/pid_namespace.c b/kernel/pid_namespace.c
index 86b3796b0436..79aac93acf99 100644
--- a/kernel/pid_namespace.c
+++ b/kernel/pid_namespace.c
@@ -161,13 +161,12 @@ void zap_pid_ns_processes(struct pid_namespace *pid_ns)
161 rcu_read_lock(); 161 rcu_read_lock();
162 162
163 /* 163 /*
164 * Use force_sig() since it clears SIGNAL_UNKILLABLE ensuring 164 * Any nested-container's init processes won't ignore the
165 * any nested-container's init processes don't ignore the 165 * SEND_SIG_NOINFO signal, see send_signal()->si_fromuser().
166 * signal
167 */ 166 */
168 task = pid_task(find_vpid(nr), PIDTYPE_PID); 167 task = pid_task(find_vpid(nr), PIDTYPE_PID);
169 if (task) 168 if (task)
170 force_sig(SIGKILL, task); 169 send_sig_info(SIGKILL, SEND_SIG_NOINFO, task);
171 170
172 rcu_read_unlock(); 171 rcu_read_unlock();
173 172
diff --git a/kernel/rcutree.h b/kernel/rcutree.h
index 1439eb504c22..4a525a30e08e 100644
--- a/kernel/rcutree.h
+++ b/kernel/rcutree.h
@@ -246,12 +246,21 @@ struct rcu_data {
246 246
247#define RCU_JIFFIES_TILL_FORCE_QS 3 /* for rsp->jiffies_force_qs */ 247#define RCU_JIFFIES_TILL_FORCE_QS 3 /* for rsp->jiffies_force_qs */
248#ifdef CONFIG_RCU_CPU_STALL_DETECTOR 248#ifdef CONFIG_RCU_CPU_STALL_DETECTOR
249#define RCU_SECONDS_TILL_STALL_CHECK (10 * HZ) /* for rsp->jiffies_stall */ 249
250#define RCU_SECONDS_TILL_STALL_RECHECK (30 * HZ) /* for rsp->jiffies_stall */ 250#ifdef CONFIG_PROVE_RCU
251#define RCU_STALL_RAT_DELAY 2 /* Allow other CPUs time */ 251#define RCU_STALL_DELAY_DELTA (5 * HZ)
252 /* to take at least one */ 252#else
253 /* scheduling clock irq */ 253#define RCU_STALL_DELAY_DELTA 0
254 /* before ratting on them. */ 254#endif
255
256#define RCU_SECONDS_TILL_STALL_CHECK (10 * HZ + RCU_STALL_DELAY_DELTA)
257 /* for rsp->jiffies_stall */
258#define RCU_SECONDS_TILL_STALL_RECHECK (30 * HZ + RCU_STALL_DELAY_DELTA)
259 /* for rsp->jiffies_stall */
260#define RCU_STALL_RAT_DELAY 2 /* Allow other CPUs time */
261 /* to take at least one */
262 /* scheduling clock irq */
263 /* before ratting on them. */
255 264
256#endif /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */ 265#endif /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */
257 266
diff --git a/kernel/rcutree_plugin.h b/kernel/rcutree_plugin.h
index 464ad2cdee00..79b53bda8943 100644
--- a/kernel/rcutree_plugin.h
+++ b/kernel/rcutree_plugin.h
@@ -1010,6 +1010,10 @@ int rcu_needs_cpu(int cpu)
1010 int c = 0; 1010 int c = 0;
1011 int thatcpu; 1011 int thatcpu;
1012 1012
1013 /* Check for being in the holdoff period. */
1014 if (per_cpu(rcu_dyntick_holdoff, cpu) == jiffies)
1015 return rcu_needs_cpu_quick_check(cpu);
1016
1013 /* Don't bother unless we are the last non-dyntick-idle CPU. */ 1017 /* Don't bother unless we are the last non-dyntick-idle CPU. */
1014 for_each_cpu_not(thatcpu, nohz_cpu_mask) 1018 for_each_cpu_not(thatcpu, nohz_cpu_mask)
1015 if (thatcpu != cpu) { 1019 if (thatcpu != cpu) {
@@ -1041,10 +1045,8 @@ int rcu_needs_cpu(int cpu)
1041 } 1045 }
1042 1046
1043 /* If RCU callbacks are still pending, RCU still needs this CPU. */ 1047 /* If RCU callbacks are still pending, RCU still needs this CPU. */
1044 if (c) { 1048 if (c)
1045 raise_softirq(RCU_SOFTIRQ); 1049 raise_softirq(RCU_SOFTIRQ);
1046 per_cpu(rcu_dyntick_holdoff, cpu) = jiffies;
1047 }
1048 return c; 1050 return c;
1049} 1051}
1050 1052
diff --git a/kernel/sched.c b/kernel/sched.c
index b47ceeec1a91..9ab3cd7858d3 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -2359,7 +2359,7 @@ static int try_to_wake_up(struct task_struct *p, unsigned int state,
2359{ 2359{
2360 int cpu, orig_cpu, this_cpu, success = 0; 2360 int cpu, orig_cpu, this_cpu, success = 0;
2361 unsigned long flags; 2361 unsigned long flags;
2362 struct rq *rq, *orig_rq; 2362 struct rq *rq;
2363 2363
2364 if (!sched_feat(SYNC_WAKEUPS)) 2364 if (!sched_feat(SYNC_WAKEUPS))
2365 wake_flags &= ~WF_SYNC; 2365 wake_flags &= ~WF_SYNC;
@@ -2367,7 +2367,7 @@ static int try_to_wake_up(struct task_struct *p, unsigned int state,
2367 this_cpu = get_cpu(); 2367 this_cpu = get_cpu();
2368 2368
2369 smp_wmb(); 2369 smp_wmb();
2370 rq = orig_rq = task_rq_lock(p, &flags); 2370 rq = task_rq_lock(p, &flags);
2371 update_rq_clock(rq); 2371 update_rq_clock(rq);
2372 if (!(p->state & state)) 2372 if (!(p->state & state))
2373 goto out; 2373 goto out;
@@ -7406,11 +7406,13 @@ static ssize_t sched_power_savings_store(const char *buf, size_t count, int smt)
7406 7406
7407#ifdef CONFIG_SCHED_MC 7407#ifdef CONFIG_SCHED_MC
7408static ssize_t sched_mc_power_savings_show(struct sysdev_class *class, 7408static ssize_t sched_mc_power_savings_show(struct sysdev_class *class,
7409 struct sysdev_class_attribute *attr,
7409 char *page) 7410 char *page)
7410{ 7411{
7411 return sprintf(page, "%u\n", sched_mc_power_savings); 7412 return sprintf(page, "%u\n", sched_mc_power_savings);
7412} 7413}
7413static ssize_t sched_mc_power_savings_store(struct sysdev_class *class, 7414static ssize_t sched_mc_power_savings_store(struct sysdev_class *class,
7415 struct sysdev_class_attribute *attr,
7414 const char *buf, size_t count) 7416 const char *buf, size_t count)
7415{ 7417{
7416 return sched_power_savings_store(buf, count, 0); 7418 return sched_power_savings_store(buf, count, 0);
@@ -7422,11 +7424,13 @@ static SYSDEV_CLASS_ATTR(sched_mc_power_savings, 0644,
7422 7424
7423#ifdef CONFIG_SCHED_SMT 7425#ifdef CONFIG_SCHED_SMT
7424static ssize_t sched_smt_power_savings_show(struct sysdev_class *dev, 7426static ssize_t sched_smt_power_savings_show(struct sysdev_class *dev,
7427 struct sysdev_class_attribute *attr,
7425 char *page) 7428 char *page)
7426{ 7429{
7427 return sprintf(page, "%u\n", sched_smt_power_savings); 7430 return sprintf(page, "%u\n", sched_smt_power_savings);
7428} 7431}
7429static ssize_t sched_smt_power_savings_store(struct sysdev_class *dev, 7432static ssize_t sched_smt_power_savings_store(struct sysdev_class *dev,
7433 struct sysdev_class_attribute *attr,
7430 const char *buf, size_t count) 7434 const char *buf, size_t count)
7431{ 7435{
7432 return sched_power_savings_store(buf, count, 1); 7436 return sched_power_savings_store(buf, count, 1);
diff --git a/kernel/sched_cpupri.c b/kernel/sched_cpupri.c
index 82095bf2099f..fccf9fbb0d7b 100644
--- a/kernel/sched_cpupri.c
+++ b/kernel/sched_cpupri.c
@@ -56,7 +56,7 @@ static int convert_prio(int prio)
56 * @lowest_mask: A mask to fill in with selected CPUs (or NULL) 56 * @lowest_mask: A mask to fill in with selected CPUs (or NULL)
57 * 57 *
58 * Note: This function returns the recommended CPUs as calculated during the 58 * Note: This function returns the recommended CPUs as calculated during the
59 * current invokation. By the time the call returns, the CPUs may have in 59 * current invocation. By the time the call returns, the CPUs may have in
60 * fact changed priorities any number of times. While not ideal, it is not 60 * fact changed priorities any number of times. While not ideal, it is not
61 * an issue of correctness since the normal rebalancer logic will correct 61 * an issue of correctness since the normal rebalancer logic will correct
62 * any discrepancies created by racing against the uncertainty of the current 62 * any discrepancies created by racing against the uncertainty of the current
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
index 3e1fd96c6cf9..5a5ea2cd924f 100644
--- a/kernel/sched_fair.c
+++ b/kernel/sched_fair.c
@@ -3476,7 +3476,7 @@ static void run_rebalance_domains(struct softirq_action *h)
3476 3476
3477static inline int on_null_domain(int cpu) 3477static inline int on_null_domain(int cpu)
3478{ 3478{
3479 return !rcu_dereference(cpu_rq(cpu)->sd); 3479 return !rcu_dereference_sched(cpu_rq(cpu)->sd);
3480} 3480}
3481 3481
3482/* 3482/*
diff --git a/kernel/sched_rt.c b/kernel/sched_rt.c
index 5a6ed1f0990a..b5b920ae2ea7 100644
--- a/kernel/sched_rt.c
+++ b/kernel/sched_rt.c
@@ -1146,7 +1146,12 @@ static struct task_struct *pick_next_highest_task_rt(struct rq *rq, int cpu)
1146 if (next && next->prio < idx) 1146 if (next && next->prio < idx)
1147 continue; 1147 continue;
1148 list_for_each_entry(rt_se, array->queue + idx, run_list) { 1148 list_for_each_entry(rt_se, array->queue + idx, run_list) {
1149 struct task_struct *p = rt_task_of(rt_se); 1149 struct task_struct *p;
1150
1151 if (!rt_entity_is_task(rt_se))
1152 continue;
1153
1154 p = rt_task_of(rt_se);
1150 if (pick_rt_task(rq, p, cpu)) { 1155 if (pick_rt_task(rq, p, cpu)) {
1151 next = p; 1156 next = p;
1152 break; 1157 break;
diff --git a/kernel/sys.c b/kernel/sys.c
index 9814e43fb23b..8298878f4f71 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -33,6 +33,7 @@
33#include <linux/task_io_accounting_ops.h> 33#include <linux/task_io_accounting_ops.h>
34#include <linux/seccomp.h> 34#include <linux/seccomp.h>
35#include <linux/cpu.h> 35#include <linux/cpu.h>
36#include <linux/personality.h>
36#include <linux/ptrace.h> 37#include <linux/ptrace.h>
37#include <linux/fs_struct.h> 38#include <linux/fs_struct.h>
38 39
@@ -1114,6 +1115,15 @@ out:
1114 1115
1115DECLARE_RWSEM(uts_sem); 1116DECLARE_RWSEM(uts_sem);
1116 1117
1118#ifdef COMPAT_UTS_MACHINE
1119#define override_architecture(name) \
1120 (current->personality == PER_LINUX32 && \
1121 copy_to_user(name->machine, COMPAT_UTS_MACHINE, \
1122 sizeof(COMPAT_UTS_MACHINE)))
1123#else
1124#define override_architecture(name) 0
1125#endif
1126
1117SYSCALL_DEFINE1(newuname, struct new_utsname __user *, name) 1127SYSCALL_DEFINE1(newuname, struct new_utsname __user *, name)
1118{ 1128{
1119 int errno = 0; 1129 int errno = 0;
@@ -1122,9 +1132,66 @@ SYSCALL_DEFINE1(newuname, struct new_utsname __user *, name)
1122 if (copy_to_user(name, utsname(), sizeof *name)) 1132 if (copy_to_user(name, utsname(), sizeof *name))
1123 errno = -EFAULT; 1133 errno = -EFAULT;
1124 up_read(&uts_sem); 1134 up_read(&uts_sem);
1135
1136 if (!errno && override_architecture(name))
1137 errno = -EFAULT;
1125 return errno; 1138 return errno;
1126} 1139}
1127 1140
1141#ifdef __ARCH_WANT_SYS_OLD_UNAME
1142/*
1143 * Old cruft
1144 */
1145SYSCALL_DEFINE1(uname, struct old_utsname __user *, name)
1146{
1147 int error = 0;
1148
1149 if (!name)
1150 return -EFAULT;
1151
1152 down_read(&uts_sem);
1153 if (copy_to_user(name, utsname(), sizeof(*name)))
1154 error = -EFAULT;
1155 up_read(&uts_sem);
1156
1157 if (!error && override_architecture(name))
1158 error = -EFAULT;
1159 return error;
1160}
1161
1162SYSCALL_DEFINE1(olduname, struct oldold_utsname __user *, name)
1163{
1164 int error;
1165
1166 if (!name)
1167 return -EFAULT;
1168 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
1169 return -EFAULT;
1170
1171 down_read(&uts_sem);
1172 error = __copy_to_user(&name->sysname, &utsname()->sysname,
1173 __OLD_UTS_LEN);
1174 error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
1175 error |= __copy_to_user(&name->nodename, &utsname()->nodename,
1176 __OLD_UTS_LEN);
1177 error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
1178 error |= __copy_to_user(&name->release, &utsname()->release,
1179 __OLD_UTS_LEN);
1180 error |= __put_user(0, name->release + __OLD_UTS_LEN);
1181 error |= __copy_to_user(&name->version, &utsname()->version,
1182 __OLD_UTS_LEN);
1183 error |= __put_user(0, name->version + __OLD_UTS_LEN);
1184 error |= __copy_to_user(&name->machine, &utsname()->machine,
1185 __OLD_UTS_LEN);
1186 error |= __put_user(0, name->machine + __OLD_UTS_LEN);
1187 up_read(&uts_sem);
1188
1189 if (!error && override_architecture(name))
1190 error = -EFAULT;
1191 return error ? -EFAULT : 0;
1192}
1193#endif
1194
1128SYSCALL_DEFINE2(sethostname, char __user *, name, int, len) 1195SYSCALL_DEFINE2(sethostname, char __user *, name, int, len)
1129{ 1196{
1130 int errno; 1197 int errno;
diff --git a/kernel/sys_ni.c b/kernel/sys_ni.c
index 695384f12a7d..70f2ea758ffe 100644
--- a/kernel/sys_ni.c
+++ b/kernel/sys_ni.c
@@ -126,6 +126,7 @@ cond_syscall(sys_setreuid16);
126cond_syscall(sys_setuid16); 126cond_syscall(sys_setuid16);
127cond_syscall(sys_vm86old); 127cond_syscall(sys_vm86old);
128cond_syscall(sys_vm86); 128cond_syscall(sys_vm86);
129cond_syscall(sys_ipc);
129cond_syscall(compat_sys_ipc); 130cond_syscall(compat_sys_ipc);
130cond_syscall(compat_sys_sysctl); 131cond_syscall(compat_sys_sysctl);
131cond_syscall(sys_flock); 132cond_syscall(sys_flock);
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 0ef19c614f6d..8686b0f5fc12 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -23,6 +23,7 @@
23#include <linux/swap.h> 23#include <linux/swap.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/sysctl.h> 25#include <linux/sysctl.h>
26#include <linux/signal.h>
26#include <linux/proc_fs.h> 27#include <linux/proc_fs.h>
27#include <linux/security.h> 28#include <linux/security.h>
28#include <linux/ctype.h> 29#include <linux/ctype.h>
@@ -60,13 +61,23 @@
60#include <asm/stacktrace.h> 61#include <asm/stacktrace.h>
61#include <asm/io.h> 62#include <asm/io.h>
62#endif 63#endif
64#ifdef CONFIG_BSD_PROCESS_ACCT
65#include <linux/acct.h>
66#endif
67#ifdef CONFIG_RT_MUTEXES
68#include <linux/rtmutex.h>
69#endif
70#if defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_LOCK_STAT)
71#include <linux/lockdep.h>
72#endif
73#ifdef CONFIG_CHR_DEV_SG
74#include <scsi/sg.h>
75#endif
63 76
64 77
65#if defined(CONFIG_SYSCTL) 78#if defined(CONFIG_SYSCTL)
66 79
67/* External variables not in a header file. */ 80/* External variables not in a header file. */
68extern int C_A_D;
69extern int print_fatal_signals;
70extern int sysctl_overcommit_memory; 81extern int sysctl_overcommit_memory;
71extern int sysctl_overcommit_ratio; 82extern int sysctl_overcommit_ratio;
72extern int sysctl_panic_on_oom; 83extern int sysctl_panic_on_oom;
@@ -88,9 +99,6 @@ extern int sysctl_nr_open_min, sysctl_nr_open_max;
88#ifndef CONFIG_MMU 99#ifndef CONFIG_MMU
89extern int sysctl_nr_trim_pages; 100extern int sysctl_nr_trim_pages;
90#endif 101#endif
91#ifdef CONFIG_RCU_TORTURE_TEST
92extern int rcutorture_runnable;
93#endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
94#ifdef CONFIG_BLOCK 102#ifdef CONFIG_BLOCK
95extern int blk_iopoll_enabled; 103extern int blk_iopoll_enabled;
96#endif 104#endif
@@ -120,14 +128,6 @@ static int min_percpu_pagelist_fract = 8;
120 128
121static int ngroups_max = NGROUPS_MAX; 129static int ngroups_max = NGROUPS_MAX;
122 130
123#ifdef CONFIG_MODULES
124extern char modprobe_path[];
125extern int modules_disabled;
126#endif
127#ifdef CONFIG_CHR_DEV_SG
128extern int sg_big_buff;
129#endif
130
131#ifdef CONFIG_SPARC 131#ifdef CONFIG_SPARC
132#include <asm/system.h> 132#include <asm/system.h>
133#endif 133#endif
@@ -149,10 +149,6 @@ extern int sysctl_userprocess_debug;
149extern int spin_retry; 149extern int spin_retry;
150#endif 150#endif
151 151
152#ifdef CONFIG_BSD_PROCESS_ACCT
153extern int acct_parm[];
154#endif
155
156#ifdef CONFIG_IA64 152#ifdef CONFIG_IA64
157extern int no_unaligned_warning; 153extern int no_unaligned_warning;
158extern int unaligned_dump_stack; 154extern int unaligned_dump_stack;
@@ -160,10 +156,6 @@ extern int unaligned_dump_stack;
160 156
161extern struct ratelimit_state printk_ratelimit_state; 157extern struct ratelimit_state printk_ratelimit_state;
162 158
163#ifdef CONFIG_RT_MUTEXES
164extern int max_lock_depth;
165#endif
166
167#ifdef CONFIG_PROC_SYSCTL 159#ifdef CONFIG_PROC_SYSCTL
168static int proc_do_cad_pid(struct ctl_table *table, int write, 160static int proc_do_cad_pid(struct ctl_table *table, int write,
169 void __user *buffer, size_t *lenp, loff_t *ppos); 161 void __user *buffer, size_t *lenp, loff_t *ppos);
@@ -202,9 +194,6 @@ extern struct ctl_table epoll_table[];
202int sysctl_legacy_va_layout; 194int sysctl_legacy_va_layout;
203#endif 195#endif
204 196
205extern int prove_locking;
206extern int lock_stat;
207
208/* The default sysctl tables: */ 197/* The default sysctl tables: */
209 198
210static struct ctl_table root_table[] = { 199static struct ctl_table root_table[] = {
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 1f663d23e85e..1f5dde637457 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -592,6 +592,10 @@ static inline void clocksource_select(void) { }
592 */ 592 */
593static int __init clocksource_done_booting(void) 593static int __init clocksource_done_booting(void)
594{ 594{
595 mutex_lock(&clocksource_mutex);
596 curr_clocksource = clocksource_default_clock();
597 mutex_unlock(&clocksource_mutex);
598
595 finished_booting = 1; 599 finished_booting = 1;
596 600
597 /* 601 /*
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 83783579378f..d9062f5cc0c0 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -27,6 +27,7 @@
27#include <linux/ctype.h> 27#include <linux/ctype.h>
28#include <linux/list.h> 28#include <linux/list.h>
29#include <linux/hash.h> 29#include <linux/hash.h>
30#include <linux/rcupdate.h>
30 31
31#include <trace/events/sched.h> 32#include <trace/events/sched.h>
32 33
@@ -84,22 +85,22 @@ ftrace_func_t ftrace_trace_function __read_mostly = ftrace_stub;
84ftrace_func_t __ftrace_trace_function __read_mostly = ftrace_stub; 85ftrace_func_t __ftrace_trace_function __read_mostly = ftrace_stub;
85ftrace_func_t ftrace_pid_function __read_mostly = ftrace_stub; 86ftrace_func_t ftrace_pid_function __read_mostly = ftrace_stub;
86 87
87#ifdef CONFIG_FUNCTION_GRAPH_TRACER 88/*
88static int ftrace_set_func(unsigned long *array, int *idx, char *buffer); 89 * Traverse the ftrace_list, invoking all entries. The reason that we
89#endif 90 * can use rcu_dereference_raw() is that elements removed from this list
90 91 * are simply leaked, so there is no need to interact with a grace-period
92 * mechanism. The rcu_dereference_raw() calls are needed to handle
93 * concurrent insertions into the ftrace_list.
94 *
95 * Silly Alpha and silly pointer-speculation compiler optimizations!
96 */
91static void ftrace_list_func(unsigned long ip, unsigned long parent_ip) 97static void ftrace_list_func(unsigned long ip, unsigned long parent_ip)
92{ 98{
93 struct ftrace_ops *op = ftrace_list; 99 struct ftrace_ops *op = rcu_dereference_raw(ftrace_list); /*see above*/
94
95 /* in case someone actually ports this to alpha! */
96 read_barrier_depends();
97 100
98 while (op != &ftrace_list_end) { 101 while (op != &ftrace_list_end) {
99 /* silly alpha */
100 read_barrier_depends();
101 op->func(ip, parent_ip); 102 op->func(ip, parent_ip);
102 op = op->next; 103 op = rcu_dereference_raw(op->next); /*see above*/
103 }; 104 };
104} 105}
105 106
@@ -154,8 +155,7 @@ static int __register_ftrace_function(struct ftrace_ops *ops)
154 * the ops->next pointer is valid before another CPU sees 155 * the ops->next pointer is valid before another CPU sees
155 * the ops pointer included into the ftrace_list. 156 * the ops pointer included into the ftrace_list.
156 */ 157 */
157 smp_wmb(); 158 rcu_assign_pointer(ftrace_list, ops);
158 ftrace_list = ops;
159 159
160 if (ftrace_enabled) { 160 if (ftrace_enabled) {
161 ftrace_func_t func; 161 ftrace_func_t func;
@@ -2276,6 +2276,8 @@ __setup("ftrace_filter=", set_ftrace_filter);
2276 2276
2277#ifdef CONFIG_FUNCTION_GRAPH_TRACER 2277#ifdef CONFIG_FUNCTION_GRAPH_TRACER
2278static char ftrace_graph_buf[FTRACE_FILTER_SIZE] __initdata; 2278static char ftrace_graph_buf[FTRACE_FILTER_SIZE] __initdata;
2279static int ftrace_set_func(unsigned long *array, int *idx, char *buffer);
2280
2279static int __init set_graph_function(char *str) 2281static int __init set_graph_function(char *str)
2280{ 2282{
2281 strlcpy(ftrace_graph_buf, str, FTRACE_FILTER_SIZE); 2283 strlcpy(ftrace_graph_buf, str, FTRACE_FILTER_SIZE);
@@ -3351,6 +3353,7 @@ void ftrace_graph_init_task(struct task_struct *t)
3351{ 3353{
3352 /* Make sure we do not use the parent ret_stack */ 3354 /* Make sure we do not use the parent ret_stack */
3353 t->ret_stack = NULL; 3355 t->ret_stack = NULL;
3356 t->curr_ret_stack = -1;
3354 3357
3355 if (ftrace_graph_active) { 3358 if (ftrace_graph_active) {
3356 struct ftrace_ret_stack *ret_stack; 3359 struct ftrace_ret_stack *ret_stack;
@@ -3360,7 +3363,6 @@ void ftrace_graph_init_task(struct task_struct *t)
3360 GFP_KERNEL); 3363 GFP_KERNEL);
3361 if (!ret_stack) 3364 if (!ret_stack)
3362 return; 3365 return;
3363 t->curr_ret_stack = -1;
3364 atomic_set(&t->tracing_graph_pause, 0); 3366 atomic_set(&t->tracing_graph_pause, 0);
3365 atomic_set(&t->trace_overrun, 0); 3367 atomic_set(&t->trace_overrun, 0);
3366 t->ftrace_timestamp = 0; 3368 t->ftrace_timestamp = 0;
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 0287f9f52f5a..05a9f83b8819 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -2233,12 +2233,12 @@ ring_buffer_lock_reserve(struct ring_buffer *buffer, unsigned long length)
2233 if (ring_buffer_flags != RB_BUFFERS_ON) 2233 if (ring_buffer_flags != RB_BUFFERS_ON)
2234 return NULL; 2234 return NULL;
2235 2235
2236 if (atomic_read(&buffer->record_disabled))
2237 return NULL;
2238
2239 /* If we are tracing schedule, we don't want to recurse */ 2236 /* If we are tracing schedule, we don't want to recurse */
2240 resched = ftrace_preempt_disable(); 2237 resched = ftrace_preempt_disable();
2241 2238
2239 if (atomic_read(&buffer->record_disabled))
2240 goto out_nocheck;
2241
2242 if (trace_recursive_lock()) 2242 if (trace_recursive_lock())
2243 goto out_nocheck; 2243 goto out_nocheck;
2244 2244
@@ -2470,11 +2470,11 @@ int ring_buffer_write(struct ring_buffer *buffer,
2470 if (ring_buffer_flags != RB_BUFFERS_ON) 2470 if (ring_buffer_flags != RB_BUFFERS_ON)
2471 return -EBUSY; 2471 return -EBUSY;
2472 2472
2473 if (atomic_read(&buffer->record_disabled))
2474 return -EBUSY;
2475
2476 resched = ftrace_preempt_disable(); 2473 resched = ftrace_preempt_disable();
2477 2474
2475 if (atomic_read(&buffer->record_disabled))
2476 goto out;
2477
2478 cpu = raw_smp_processor_id(); 2478 cpu = raw_smp_processor_id();
2479 2479
2480 if (!cpumask_test_cpu(cpu, buffer->cpumask)) 2480 if (!cpumask_test_cpu(cpu, buffer->cpumask))
@@ -2542,7 +2542,7 @@ EXPORT_SYMBOL_GPL(ring_buffer_record_disable);
2542 * @buffer: The ring buffer to enable writes 2542 * @buffer: The ring buffer to enable writes
2543 * 2543 *
2544 * Note, multiple disables will need the same number of enables 2544 * Note, multiple disables will need the same number of enables
2545 * to truely enable the writing (much like preempt_disable). 2545 * to truly enable the writing (much like preempt_disable).
2546 */ 2546 */
2547void ring_buffer_record_enable(struct ring_buffer *buffer) 2547void ring_buffer_record_enable(struct ring_buffer *buffer)
2548{ 2548{
@@ -2578,7 +2578,7 @@ EXPORT_SYMBOL_GPL(ring_buffer_record_disable_cpu);
2578 * @cpu: The CPU to enable. 2578 * @cpu: The CPU to enable.
2579 * 2579 *
2580 * Note, multiple disables will need the same number of enables 2580 * Note, multiple disables will need the same number of enables
2581 * to truely enable the writing (much like preempt_disable). 2581 * to truly enable the writing (much like preempt_disable).
2582 */ 2582 */
2583void ring_buffer_record_enable_cpu(struct ring_buffer *buffer, int cpu) 2583void ring_buffer_record_enable_cpu(struct ring_buffer *buffer, int cpu)
2584{ 2584{
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index ed01fdba4a55..3ec2ee6f6560 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -374,6 +374,21 @@ static int __init set_buf_size(char *str)
374} 374}
375__setup("trace_buf_size=", set_buf_size); 375__setup("trace_buf_size=", set_buf_size);
376 376
377static int __init set_tracing_thresh(char *str)
378{
379 unsigned long threshhold;
380 int ret;
381
382 if (!str)
383 return 0;
384 ret = strict_strtoul(str, 0, &threshhold);
385 if (ret < 0)
386 return 0;
387 tracing_thresh = threshhold * 1000;
388 return 1;
389}
390__setup("tracing_thresh=", set_tracing_thresh);
391
377unsigned long nsecs_to_usecs(unsigned long nsecs) 392unsigned long nsecs_to_usecs(unsigned long nsecs)
378{ 393{
379 return nsecs / 1000; 394 return nsecs / 1000;
@@ -579,9 +594,10 @@ static ssize_t trace_seq_to_buffer(struct trace_seq *s, void *buf, size_t cnt)
579static arch_spinlock_t ftrace_max_lock = 594static arch_spinlock_t ftrace_max_lock =
580 (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; 595 (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED;
581 596
597unsigned long __read_mostly tracing_thresh;
598
582#ifdef CONFIG_TRACER_MAX_TRACE 599#ifdef CONFIG_TRACER_MAX_TRACE
583unsigned long __read_mostly tracing_max_latency; 600unsigned long __read_mostly tracing_max_latency;
584unsigned long __read_mostly tracing_thresh;
585 601
586/* 602/*
587 * Copy the new maximum trace into the separate maximum-trace 603 * Copy the new maximum trace into the separate maximum-trace
@@ -592,7 +608,7 @@ static void
592__update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu) 608__update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu)
593{ 609{
594 struct trace_array_cpu *data = tr->data[cpu]; 610 struct trace_array_cpu *data = tr->data[cpu];
595 struct trace_array_cpu *max_data = tr->data[cpu]; 611 struct trace_array_cpu *max_data;
596 612
597 max_tr.cpu = cpu; 613 max_tr.cpu = cpu;
598 max_tr.time_start = data->preempt_timestamp; 614 max_tr.time_start = data->preempt_timestamp;
@@ -602,7 +618,7 @@ __update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu)
602 max_data->critical_start = data->critical_start; 618 max_data->critical_start = data->critical_start;
603 max_data->critical_end = data->critical_end; 619 max_data->critical_end = data->critical_end;
604 620
605 memcpy(data->comm, tsk->comm, TASK_COMM_LEN); 621 memcpy(max_data->comm, tsk->comm, TASK_COMM_LEN);
606 max_data->pid = tsk->pid; 622 max_data->pid = tsk->pid;
607 max_data->uid = task_uid(tsk); 623 max_data->uid = task_uid(tsk);
608 max_data->nice = tsk->static_prio - 20 - MAX_RT_PRIO; 624 max_data->nice = tsk->static_prio - 20 - MAX_RT_PRIO;
@@ -824,10 +840,10 @@ out:
824 mutex_unlock(&trace_types_lock); 840 mutex_unlock(&trace_types_lock);
825} 841}
826 842
827static void __tracing_reset(struct trace_array *tr, int cpu) 843static void __tracing_reset(struct ring_buffer *buffer, int cpu)
828{ 844{
829 ftrace_disable_cpu(); 845 ftrace_disable_cpu();
830 ring_buffer_reset_cpu(tr->buffer, cpu); 846 ring_buffer_reset_cpu(buffer, cpu);
831 ftrace_enable_cpu(); 847 ftrace_enable_cpu();
832} 848}
833 849
@@ -839,7 +855,7 @@ void tracing_reset(struct trace_array *tr, int cpu)
839 855
840 /* Make sure all commits have finished */ 856 /* Make sure all commits have finished */
841 synchronize_sched(); 857 synchronize_sched();
842 __tracing_reset(tr, cpu); 858 __tracing_reset(buffer, cpu);
843 859
844 ring_buffer_record_enable(buffer); 860 ring_buffer_record_enable(buffer);
845} 861}
@@ -857,7 +873,7 @@ void tracing_reset_online_cpus(struct trace_array *tr)
857 tr->time_start = ftrace_now(tr->cpu); 873 tr->time_start = ftrace_now(tr->cpu);
858 874
859 for_each_online_cpu(cpu) 875 for_each_online_cpu(cpu)
860 __tracing_reset(tr, cpu); 876 __tracing_reset(buffer, cpu);
861 877
862 ring_buffer_record_enable(buffer); 878 ring_buffer_record_enable(buffer);
863} 879}
@@ -934,6 +950,8 @@ void tracing_start(void)
934 goto out; 950 goto out;
935 } 951 }
936 952
953 /* Prevent the buffers from switching */
954 arch_spin_lock(&ftrace_max_lock);
937 955
938 buffer = global_trace.buffer; 956 buffer = global_trace.buffer;
939 if (buffer) 957 if (buffer)
@@ -943,6 +961,8 @@ void tracing_start(void)
943 if (buffer) 961 if (buffer)
944 ring_buffer_record_enable(buffer); 962 ring_buffer_record_enable(buffer);
945 963
964 arch_spin_unlock(&ftrace_max_lock);
965
946 ftrace_start(); 966 ftrace_start();
947 out: 967 out:
948 spin_unlock_irqrestore(&tracing_start_lock, flags); 968 spin_unlock_irqrestore(&tracing_start_lock, flags);
@@ -964,6 +984,9 @@ void tracing_stop(void)
964 if (trace_stop_count++) 984 if (trace_stop_count++)
965 goto out; 985 goto out;
966 986
987 /* Prevent the buffers from switching */
988 arch_spin_lock(&ftrace_max_lock);
989
967 buffer = global_trace.buffer; 990 buffer = global_trace.buffer;
968 if (buffer) 991 if (buffer)
969 ring_buffer_record_disable(buffer); 992 ring_buffer_record_disable(buffer);
@@ -972,6 +995,8 @@ void tracing_stop(void)
972 if (buffer) 995 if (buffer)
973 ring_buffer_record_disable(buffer); 996 ring_buffer_record_disable(buffer);
974 997
998 arch_spin_unlock(&ftrace_max_lock);
999
975 out: 1000 out:
976 spin_unlock_irqrestore(&tracing_start_lock, flags); 1001 spin_unlock_irqrestore(&tracing_start_lock, flags);
977} 1002}
@@ -1259,6 +1284,13 @@ ftrace_trace_userstack(struct ring_buffer *buffer, unsigned long flags, int pc)
1259 if (!(trace_flags & TRACE_ITER_USERSTACKTRACE)) 1284 if (!(trace_flags & TRACE_ITER_USERSTACKTRACE))
1260 return; 1285 return;
1261 1286
1287 /*
1288 * NMIs can not handle page faults, even with fix ups.
1289 * The save user stack can (and often does) fault.
1290 */
1291 if (unlikely(in_nmi()))
1292 return;
1293
1262 event = trace_buffer_lock_reserve(buffer, TRACE_USER_STACK, 1294 event = trace_buffer_lock_reserve(buffer, TRACE_USER_STACK,
1263 sizeof(*entry), flags, pc); 1295 sizeof(*entry), flags, pc);
1264 if (!event) 1296 if (!event)
@@ -1703,6 +1735,7 @@ static void *s_start(struct seq_file *m, loff_t *pos)
1703 1735
1704 ftrace_enable_cpu(); 1736 ftrace_enable_cpu();
1705 1737
1738 iter->leftover = 0;
1706 for (p = iter; p && l < *pos; p = s_next(m, p, &l)) 1739 for (p = iter; p && l < *pos; p = s_next(m, p, &l))
1707 ; 1740 ;
1708 1741
@@ -4248,10 +4281,10 @@ static __init int tracer_init_debugfs(void)
4248#ifdef CONFIG_TRACER_MAX_TRACE 4281#ifdef CONFIG_TRACER_MAX_TRACE
4249 trace_create_file("tracing_max_latency", 0644, d_tracer, 4282 trace_create_file("tracing_max_latency", 0644, d_tracer,
4250 &tracing_max_latency, &tracing_max_lat_fops); 4283 &tracing_max_latency, &tracing_max_lat_fops);
4284#endif
4251 4285
4252 trace_create_file("tracing_thresh", 0644, d_tracer, 4286 trace_create_file("tracing_thresh", 0644, d_tracer,
4253 &tracing_thresh, &tracing_max_lat_fops); 4287 &tracing_thresh, &tracing_max_lat_fops);
4254#endif
4255 4288
4256 trace_create_file("README", 0444, d_tracer, 4289 trace_create_file("README", 0444, d_tracer,
4257 NULL, &tracing_readme_fops); 4290 NULL, &tracing_readme_fops);
diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h
index fd05bcaf91b0..2825ef2c0b15 100644
--- a/kernel/trace/trace.h
+++ b/kernel/trace/trace.h
@@ -396,9 +396,10 @@ extern int process_new_ksym_entry(char *ksymname, int op, unsigned long addr);
396 396
397extern unsigned long nsecs_to_usecs(unsigned long nsecs); 397extern unsigned long nsecs_to_usecs(unsigned long nsecs);
398 398
399extern unsigned long tracing_thresh;
400
399#ifdef CONFIG_TRACER_MAX_TRACE 401#ifdef CONFIG_TRACER_MAX_TRACE
400extern unsigned long tracing_max_latency; 402extern unsigned long tracing_max_latency;
401extern unsigned long tracing_thresh;
402 403
403void update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu); 404void update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu);
404void update_max_tr_single(struct trace_array *tr, 405void update_max_tr_single(struct trace_array *tr,
@@ -550,7 +551,7 @@ static inline int ftrace_trace_task(struct task_struct *task)
550 * struct trace_parser - servers for reading the user input separated by spaces 551 * struct trace_parser - servers for reading the user input separated by spaces
551 * @cont: set if the input is not complete - no final space char was found 552 * @cont: set if the input is not complete - no final space char was found
552 * @buffer: holds the parsed user input 553 * @buffer: holds the parsed user input
553 * @idx: user input lenght 554 * @idx: user input length
554 * @size: buffer size 555 * @size: buffer size
555 */ 556 */
556struct trace_parser { 557struct trace_parser {
diff --git a/kernel/trace/trace_clock.c b/kernel/trace/trace_clock.c
index 84a3a7ba072a..6fbfb8f417b9 100644
--- a/kernel/trace/trace_clock.c
+++ b/kernel/trace/trace_clock.c
@@ -13,6 +13,7 @@
13 * Tracer plugins will chose a default from these clocks. 13 * Tracer plugins will chose a default from these clocks.
14 */ 14 */
15#include <linux/spinlock.h> 15#include <linux/spinlock.h>
16#include <linux/irqflags.h>
16#include <linux/hardirq.h> 17#include <linux/hardirq.h>
17#include <linux/module.h> 18#include <linux/module.h>
18#include <linux/percpu.h> 19#include <linux/percpu.h>
diff --git a/kernel/trace/trace_event_profile.c b/kernel/trace/trace_event_profile.c
index f0d693005075..c1cc3ab633de 100644
--- a/kernel/trace/trace_event_profile.c
+++ b/kernel/trace/trace_event_profile.c
@@ -138,9 +138,9 @@ __kprobes void *ftrace_perf_buf_prepare(int size, unsigned short type,
138 cpu = smp_processor_id(); 138 cpu = smp_processor_id();
139 139
140 if (in_nmi()) 140 if (in_nmi())
141 trace_buf = rcu_dereference(perf_trace_buf_nmi); 141 trace_buf = rcu_dereference_sched(perf_trace_buf_nmi);
142 else 142 else
143 trace_buf = rcu_dereference(perf_trace_buf); 143 trace_buf = rcu_dereference_sched(perf_trace_buf);
144 144
145 if (!trace_buf) 145 if (!trace_buf)
146 goto err; 146 goto err;
diff --git a/kernel/trace/trace_functions_graph.c b/kernel/trace/trace_functions_graph.c
index 3fc2a575664f..e6989d9b44da 100644
--- a/kernel/trace/trace_functions_graph.c
+++ b/kernel/trace/trace_functions_graph.c
@@ -237,6 +237,14 @@ int trace_graph_entry(struct ftrace_graph_ent *trace)
237 return ret; 237 return ret;
238} 238}
239 239
240int trace_graph_thresh_entry(struct ftrace_graph_ent *trace)
241{
242 if (tracing_thresh)
243 return 1;
244 else
245 return trace_graph_entry(trace);
246}
247
240static void __trace_graph_return(struct trace_array *tr, 248static void __trace_graph_return(struct trace_array *tr,
241 struct ftrace_graph_ret *trace, 249 struct ftrace_graph_ret *trace,
242 unsigned long flags, 250 unsigned long flags,
@@ -290,13 +298,26 @@ void set_graph_array(struct trace_array *tr)
290 smp_mb(); 298 smp_mb();
291} 299}
292 300
301void trace_graph_thresh_return(struct ftrace_graph_ret *trace)
302{
303 if (tracing_thresh &&
304 (trace->rettime - trace->calltime < tracing_thresh))
305 return;
306 else
307 trace_graph_return(trace);
308}
309
293static int graph_trace_init(struct trace_array *tr) 310static int graph_trace_init(struct trace_array *tr)
294{ 311{
295 int ret; 312 int ret;
296 313
297 set_graph_array(tr); 314 set_graph_array(tr);
298 ret = register_ftrace_graph(&trace_graph_return, 315 if (tracing_thresh)
299 &trace_graph_entry); 316 ret = register_ftrace_graph(&trace_graph_thresh_return,
317 &trace_graph_thresh_entry);
318 else
319 ret = register_ftrace_graph(&trace_graph_return,
320 &trace_graph_entry);
300 if (ret) 321 if (ret)
301 return ret; 322 return ret;
302 tracing_start_cmdline_record(); 323 tracing_start_cmdline_record();
@@ -920,7 +941,7 @@ print_graph_return(struct ftrace_graph_ret *trace, struct trace_seq *s,
920 if (!ret) 941 if (!ret)
921 return TRACE_TYPE_PARTIAL_LINE; 942 return TRACE_TYPE_PARTIAL_LINE;
922 } else { 943 } else {
923 ret = trace_seq_printf(s, "} (%ps)\n", (void *)trace->func); 944 ret = trace_seq_printf(s, "} /* %ps */\n", (void *)trace->func);
924 if (!ret) 945 if (!ret)
925 return TRACE_TYPE_PARTIAL_LINE; 946 return TRACE_TYPE_PARTIAL_LINE;
926 } 947 }
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index b520ec1f33c5..8e5ec5e1ab91 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -532,6 +532,14 @@ config LOCK_STAT
532 532
533 For more details, see Documentation/lockstat.txt 533 For more details, see Documentation/lockstat.txt
534 534
535 This also enables lock events required by "perf lock",
536 subcommand of perf.
537 If you want to use "perf lock", you also need to turn on
538 CONFIG_EVENT_TRACING.
539
540 CONFIG_LOCK_STAT defines "contended" and "acquired" lock events.
541 (CONFIG_LOCKDEP defines "acquire" and "release" events.)
542
535config DEBUG_LOCKDEP 543config DEBUG_LOCKDEP
536 bool "Lock dependency engine debugging" 544 bool "Lock dependency engine debugging"
537 depends on DEBUG_KERNEL && LOCKDEP 545 depends on DEBUG_KERNEL && LOCKDEP
diff --git a/lib/kobject.c b/lib/kobject.c
index b512b746d2af..8115eb1bbf4d 100644
--- a/lib/kobject.c
+++ b/lib/kobject.c
@@ -700,7 +700,7 @@ static ssize_t kobj_attr_store(struct kobject *kobj, struct attribute *attr,
700 return ret; 700 return ret;
701} 701}
702 702
703struct sysfs_ops kobj_sysfs_ops = { 703const struct sysfs_ops kobj_sysfs_ops = {
704 .show = kobj_attr_show, 704 .show = kobj_attr_show,
705 .store = kobj_attr_store, 705 .store = kobj_attr_store,
706}; 706};
@@ -789,7 +789,7 @@ static struct kobj_type kset_ktype = {
789 * If the kset was not able to be created, NULL will be returned. 789 * If the kset was not able to be created, NULL will be returned.
790 */ 790 */
791static struct kset *kset_create(const char *name, 791static struct kset *kset_create(const char *name,
792 struct kset_uevent_ops *uevent_ops, 792 const struct kset_uevent_ops *uevent_ops,
793 struct kobject *parent_kobj) 793 struct kobject *parent_kobj)
794{ 794{
795 struct kset *kset; 795 struct kset *kset;
@@ -832,7 +832,7 @@ static struct kset *kset_create(const char *name,
832 * If the kset was not able to be created, NULL will be returned. 832 * If the kset was not able to be created, NULL will be returned.
833 */ 833 */
834struct kset *kset_create_and_add(const char *name, 834struct kset *kset_create_and_add(const char *name,
835 struct kset_uevent_ops *uevent_ops, 835 const struct kset_uevent_ops *uevent_ops,
836 struct kobject *parent_kobj) 836 struct kobject *parent_kobj)
837{ 837{
838 struct kset *kset; 838 struct kset *kset;
diff --git a/lib/kobject_uevent.c b/lib/kobject_uevent.c
index 920a3ca6e259..c9d3a3e8405d 100644
--- a/lib/kobject_uevent.c
+++ b/lib/kobject_uevent.c
@@ -95,7 +95,7 @@ int kobject_uevent_env(struct kobject *kobj, enum kobject_action action,
95 const char *subsystem; 95 const char *subsystem;
96 struct kobject *top_kobj; 96 struct kobject *top_kobj;
97 struct kset *kset; 97 struct kset *kset;
98 struct kset_uevent_ops *uevent_ops; 98 const struct kset_uevent_ops *uevent_ops;
99 u64 seq; 99 u64 seq;
100 int i = 0; 100 int i = 0;
101 int retval = 0; 101 int retval = 0;
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 0d461c7c14db..24112e5a5780 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -609,6 +609,12 @@ static char *resource_string(char *buf, char *end, struct resource *res,
609 .precision = -1, 609 .precision = -1,
610 .flags = SPECIAL | SMALL | ZEROPAD, 610 .flags = SPECIAL | SMALL | ZEROPAD,
611 }; 611 };
612 static const struct printf_spec bus_spec = {
613 .base = 16,
614 .field_width = 2,
615 .precision = -1,
616 .flags = SMALL | ZEROPAD,
617 };
612 static const struct printf_spec dec_spec = { 618 static const struct printf_spec dec_spec = {
613 .base = 10, 619 .base = 10,
614 .precision = -1, 620 .precision = -1,
@@ -629,7 +635,7 @@ static char *resource_string(char *buf, char *end, struct resource *res,
629 * 64-bit res (sizeof==8): 20 chars in dec, 18 in hex ("0x" + 16) */ 635 * 64-bit res (sizeof==8): 20 chars in dec, 18 in hex ("0x" + 16) */
630#define RSRC_BUF_SIZE ((2 * sizeof(resource_size_t)) + 4) 636#define RSRC_BUF_SIZE ((2 * sizeof(resource_size_t)) + 4)
631#define FLAG_BUF_SIZE (2 * sizeof(res->flags)) 637#define FLAG_BUF_SIZE (2 * sizeof(res->flags))
632#define DECODED_BUF_SIZE sizeof("[mem - 64bit pref disabled]") 638#define DECODED_BUF_SIZE sizeof("[mem - 64bit pref window disabled]")
633#define RAW_BUF_SIZE sizeof("[mem - flags 0x]") 639#define RAW_BUF_SIZE sizeof("[mem - flags 0x]")
634 char sym[max(2*RSRC_BUF_SIZE + DECODED_BUF_SIZE, 640 char sym[max(2*RSRC_BUF_SIZE + DECODED_BUF_SIZE,
635 2*RSRC_BUF_SIZE + FLAG_BUF_SIZE + RAW_BUF_SIZE)]; 641 2*RSRC_BUF_SIZE + FLAG_BUF_SIZE + RAW_BUF_SIZE)];
@@ -651,6 +657,9 @@ static char *resource_string(char *buf, char *end, struct resource *res,
651 } else if (res->flags & IORESOURCE_DMA) { 657 } else if (res->flags & IORESOURCE_DMA) {
652 p = string(p, pend, "dma ", str_spec); 658 p = string(p, pend, "dma ", str_spec);
653 specp = &dec_spec; 659 specp = &dec_spec;
660 } else if (res->flags & IORESOURCE_BUS) {
661 p = string(p, pend, "bus ", str_spec);
662 specp = &bus_spec;
654 } else { 663 } else {
655 p = string(p, pend, "??? ", str_spec); 664 p = string(p, pend, "??? ", str_spec);
656 specp = &mem_spec; 665 specp = &mem_spec;
@@ -666,6 +675,8 @@ static char *resource_string(char *buf, char *end, struct resource *res,
666 p = string(p, pend, " 64bit", str_spec); 675 p = string(p, pend, " 64bit", str_spec);
667 if (res->flags & IORESOURCE_PREFETCH) 676 if (res->flags & IORESOURCE_PREFETCH)
668 p = string(p, pend, " pref", str_spec); 677 p = string(p, pend, " pref", str_spec);
678 if (res->flags & IORESOURCE_WINDOW)
679 p = string(p, pend, " window", str_spec);
669 if (res->flags & IORESOURCE_DISABLED) 680 if (res->flags & IORESOURCE_DISABLED)
670 p = string(p, pend, " disabled", str_spec); 681 p = string(p, pend, " disabled", str_spec);
671 } else { 682 } else {
diff --git a/lib/zlib_inflate/inffast.c b/lib/zlib_inflate/inffast.c
index 215447c55261..2c13ecc5bb2c 100644
--- a/lib/zlib_inflate/inffast.c
+++ b/lib/zlib_inflate/inffast.c
@@ -8,21 +8,6 @@
8#include "inflate.h" 8#include "inflate.h"
9#include "inffast.h" 9#include "inffast.h"
10 10
11/* Only do the unaligned "Faster" variant when
12 * CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set
13 *
14 * On powerpc, it won't be as we don't include autoconf.h
15 * automatically for the boot wrapper, which is intended as
16 * we run in an environment where we may not be able to deal
17 * with (even rare) alignment faults. In addition, we do not
18 * define __KERNEL__ for arch/powerpc/boot unlike x86
19 */
20
21#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
22#include <asm/unaligned.h>
23#include <asm/byteorder.h>
24#endif
25
26#ifndef ASMINF 11#ifndef ASMINF
27 12
28/* Allow machine dependent optimization for post-increment or pre-increment. 13/* Allow machine dependent optimization for post-increment or pre-increment.
@@ -36,14 +21,31 @@
36 - Pentium III (Anderson) 21 - Pentium III (Anderson)
37 - M68060 (Nikl) 22 - M68060 (Nikl)
38 */ 23 */
24union uu {
25 unsigned short us;
26 unsigned char b[2];
27};
28
29/* Endian independed version */
30static inline unsigned short
31get_unaligned16(const unsigned short *p)
32{
33 union uu mm;
34 unsigned char *b = (unsigned char *)p;
35
36 mm.b[0] = b[0];
37 mm.b[1] = b[1];
38 return mm.us;
39}
40
39#ifdef POSTINC 41#ifdef POSTINC
40# define OFF 0 42# define OFF 0
41# define PUP(a) *(a)++ 43# define PUP(a) *(a)++
42# define UP_UNALIGNED(a) get_unaligned((a)++) 44# define UP_UNALIGNED(a) get_unaligned16((a)++)
43#else 45#else
44# define OFF 1 46# define OFF 1
45# define PUP(a) *++(a) 47# define PUP(a) *++(a)
46# define UP_UNALIGNED(a) get_unaligned(++(a)) 48# define UP_UNALIGNED(a) get_unaligned16(++(a))
47#endif 49#endif
48 50
49/* 51/*
@@ -256,7 +258,6 @@ void inflate_fast(z_streamp strm, unsigned start)
256 } 258 }
257 } 259 }
258 else { 260 else {
259#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
260 unsigned short *sout; 261 unsigned short *sout;
261 unsigned long loops; 262 unsigned long loops;
262 263
@@ -274,22 +275,25 @@ void inflate_fast(z_streamp strm, unsigned start)
274 sfrom = (unsigned short *)(from - OFF); 275 sfrom = (unsigned short *)(from - OFF);
275 loops = len >> 1; 276 loops = len >> 1;
276 do 277 do
278#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
279 PUP(sout) = PUP(sfrom);
280#else
277 PUP(sout) = UP_UNALIGNED(sfrom); 281 PUP(sout) = UP_UNALIGNED(sfrom);
282#endif
278 while (--loops); 283 while (--loops);
279 out = (unsigned char *)sout + OFF; 284 out = (unsigned char *)sout + OFF;
280 from = (unsigned char *)sfrom + OFF; 285 from = (unsigned char *)sfrom + OFF;
281 } else { /* dist == 1 or dist == 2 */ 286 } else { /* dist == 1 or dist == 2 */
282 unsigned short pat16; 287 unsigned short pat16;
283 288
284 pat16 = *(sout-2+2*OFF); 289 pat16 = *(sout-1+OFF);
285 if (dist == 1) 290 if (dist == 1) {
286#if defined(__BIG_ENDIAN) 291 union uu mm;
287 pat16 = (pat16 & 0xff) | ((pat16 & 0xff) << 8); 292 /* copy one char pattern to both bytes */
288#elif defined(__LITTLE_ENDIAN) 293 mm.us = pat16;
289 pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00) >> 8); 294 mm.b[0] = mm.b[1];
290#else 295 pat16 = mm.us;
291#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined 296 }
292#endif
293 loops = len >> 1; 297 loops = len >> 1;
294 do 298 do
295 PUP(sout) = pat16; 299 PUP(sout) = pat16;
@@ -298,20 +302,6 @@ void inflate_fast(z_streamp strm, unsigned start)
298 } 302 }
299 if (len & 1) 303 if (len & 1)
300 PUP(out) = PUP(from); 304 PUP(out) = PUP(from);
301#else /* CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS */
302 from = out - dist; /* copy direct from output */
303 do { /* minimum length is three */
304 PUP(out) = PUP(from);
305 PUP(out) = PUP(from);
306 PUP(out) = PUP(from);
307 len -= 3;
308 } while (len > 2);
309 if (len) {
310 PUP(out) = PUP(from);
311 if (len > 1)
312 PUP(out) = PUP(from);
313 }
314#endif /* !CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS */
315 } 305 }
316 } 306 }
317 else if ((op & 64) == 0) { /* 2nd level distance code */ 307 else if ((op & 64) == 0) { /* 2nd level distance code */
diff --git a/mm/highmem.c b/mm/highmem.c
index 9c1e627f282e..bed8a8bfd01f 100644
--- a/mm/highmem.c
+++ b/mm/highmem.c
@@ -220,7 +220,7 @@ EXPORT_SYMBOL(kmap_high);
220 * @page: &struct page to pin 220 * @page: &struct page to pin
221 * 221 *
222 * Returns the page's current virtual memory address, or NULL if no mapping 222 * Returns the page's current virtual memory address, or NULL if no mapping
223 * exists. When and only when a non null address is returned then a 223 * exists. If and only if a non null address is returned then a
224 * matching call to kunmap_high() is necessary. 224 * matching call to kunmap_high() is necessary.
225 * 225 *
226 * This can be called from any context. 226 * This can be called from any context.
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index d813823ab08f..7973b5221fb8 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -6,6 +6,10 @@
6 * Copyright 2007 OpenVZ SWsoft Inc 6 * Copyright 2007 OpenVZ SWsoft Inc
7 * Author: Pavel Emelianov <xemul@openvz.org> 7 * Author: Pavel Emelianov <xemul@openvz.org>
8 * 8 *
9 * Memory thresholds
10 * Copyright (C) 2009 Nokia Corporation
11 * Author: Kirill A. Shutemov
12 *
9 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 14 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or 15 * the Free Software Foundation; either version 2 of the License, or
@@ -21,6 +25,7 @@
21#include <linux/memcontrol.h> 25#include <linux/memcontrol.h>
22#include <linux/cgroup.h> 26#include <linux/cgroup.h>
23#include <linux/mm.h> 27#include <linux/mm.h>
28#include <linux/hugetlb.h>
24#include <linux/pagemap.h> 29#include <linux/pagemap.h>
25#include <linux/smp.h> 30#include <linux/smp.h>
26#include <linux/page-flags.h> 31#include <linux/page-flags.h>
@@ -32,7 +37,10 @@
32#include <linux/rbtree.h> 37#include <linux/rbtree.h>
33#include <linux/slab.h> 38#include <linux/slab.h>
34#include <linux/swap.h> 39#include <linux/swap.h>
40#include <linux/swapops.h>
35#include <linux/spinlock.h> 41#include <linux/spinlock.h>
42#include <linux/eventfd.h>
43#include <linux/sort.h>
36#include <linux/fs.h> 44#include <linux/fs.h>
37#include <linux/seq_file.h> 45#include <linux/seq_file.h>
38#include <linux/vmalloc.h> 46#include <linux/vmalloc.h>
@@ -55,7 +63,15 @@ static int really_do_swap_account __initdata = 1; /* for remember boot option*/
55#define do_swap_account (0) 63#define do_swap_account (0)
56#endif 64#endif
57 65
58#define SOFTLIMIT_EVENTS_THRESH (1000) 66/*
67 * Per memcg event counter is incremented at every pagein/pageout. This counter
68 * is used for trigger some periodic events. This is straightforward and better
69 * than using jiffies etc. to handle periodic memcg event.
70 *
71 * These values will be used as !((event) & ((1 <<(thresh)) - 1))
72 */
73#define THRESHOLDS_EVENTS_THRESH (7) /* once in 128 */
74#define SOFTLIMIT_EVENTS_THRESH (10) /* once in 1024 */
59 75
60/* 76/*
61 * Statistics for memory cgroup. 77 * Statistics for memory cgroup.
@@ -69,62 +85,16 @@ enum mem_cgroup_stat_index {
69 MEM_CGROUP_STAT_FILE_MAPPED, /* # of pages charged as file rss */ 85 MEM_CGROUP_STAT_FILE_MAPPED, /* # of pages charged as file rss */
70 MEM_CGROUP_STAT_PGPGIN_COUNT, /* # of pages paged in */ 86 MEM_CGROUP_STAT_PGPGIN_COUNT, /* # of pages paged in */
71 MEM_CGROUP_STAT_PGPGOUT_COUNT, /* # of pages paged out */ 87 MEM_CGROUP_STAT_PGPGOUT_COUNT, /* # of pages paged out */
72 MEM_CGROUP_STAT_EVENTS, /* sum of pagein + pageout for internal use */
73 MEM_CGROUP_STAT_SWAPOUT, /* # of pages, swapped out */ 88 MEM_CGROUP_STAT_SWAPOUT, /* # of pages, swapped out */
89 MEM_CGROUP_EVENTS, /* incremented at every pagein/pageout */
74 90
75 MEM_CGROUP_STAT_NSTATS, 91 MEM_CGROUP_STAT_NSTATS,
76}; 92};
77 93
78struct mem_cgroup_stat_cpu { 94struct mem_cgroup_stat_cpu {
79 s64 count[MEM_CGROUP_STAT_NSTATS]; 95 s64 count[MEM_CGROUP_STAT_NSTATS];
80} ____cacheline_aligned_in_smp;
81
82struct mem_cgroup_stat {
83 struct mem_cgroup_stat_cpu cpustat[0];
84}; 96};
85 97
86static inline void
87__mem_cgroup_stat_reset_safe(struct mem_cgroup_stat_cpu *stat,
88 enum mem_cgroup_stat_index idx)
89{
90 stat->count[idx] = 0;
91}
92
93static inline s64
94__mem_cgroup_stat_read_local(struct mem_cgroup_stat_cpu *stat,
95 enum mem_cgroup_stat_index idx)
96{
97 return stat->count[idx];
98}
99
100/*
101 * For accounting under irq disable, no need for increment preempt count.
102 */
103static inline void __mem_cgroup_stat_add_safe(struct mem_cgroup_stat_cpu *stat,
104 enum mem_cgroup_stat_index idx, int val)
105{
106 stat->count[idx] += val;
107}
108
109static s64 mem_cgroup_read_stat(struct mem_cgroup_stat *stat,
110 enum mem_cgroup_stat_index idx)
111{
112 int cpu;
113 s64 ret = 0;
114 for_each_possible_cpu(cpu)
115 ret += stat->cpustat[cpu].count[idx];
116 return ret;
117}
118
119static s64 mem_cgroup_local_usage(struct mem_cgroup_stat *stat)
120{
121 s64 ret;
122
123 ret = mem_cgroup_read_stat(stat, MEM_CGROUP_STAT_CACHE);
124 ret += mem_cgroup_read_stat(stat, MEM_CGROUP_STAT_RSS);
125 return ret;
126}
127
128/* 98/*
129 * per-zone information in memory controller. 99 * per-zone information in memory controller.
130 */ 100 */
@@ -174,6 +144,22 @@ struct mem_cgroup_tree {
174 144
175static struct mem_cgroup_tree soft_limit_tree __read_mostly; 145static struct mem_cgroup_tree soft_limit_tree __read_mostly;
176 146
147struct mem_cgroup_threshold {
148 struct eventfd_ctx *eventfd;
149 u64 threshold;
150};
151
152struct mem_cgroup_threshold_ary {
153 /* An array index points to threshold just below usage. */
154 atomic_t current_threshold;
155 /* Size of entries[] */
156 unsigned int size;
157 /* Array of thresholds */
158 struct mem_cgroup_threshold entries[0];
159};
160
161static void mem_cgroup_threshold(struct mem_cgroup *mem);
162
177/* 163/*
178 * The memory controller data structure. The memory controller controls both 164 * The memory controller data structure. The memory controller controls both
179 * page cache and RSS per cgroup. We would eventually like to provide 165 * page cache and RSS per cgroup. We would eventually like to provide
@@ -217,7 +203,7 @@ struct mem_cgroup {
217 * Should the accounting and control be hierarchical, per subtree? 203 * Should the accounting and control be hierarchical, per subtree?
218 */ 204 */
219 bool use_hierarchy; 205 bool use_hierarchy;
220 unsigned long last_oom_jiffies; 206 atomic_t oom_lock;
221 atomic_t refcnt; 207 atomic_t refcnt;
222 208
223 unsigned int swappiness; 209 unsigned int swappiness;
@@ -225,10 +211,48 @@ struct mem_cgroup {
225 /* set when res.limit == memsw.limit */ 211 /* set when res.limit == memsw.limit */
226 bool memsw_is_minimum; 212 bool memsw_is_minimum;
227 213
214 /* protect arrays of thresholds */
215 struct mutex thresholds_lock;
216
217 /* thresholds for memory usage. RCU-protected */
218 struct mem_cgroup_threshold_ary *thresholds;
219
220 /* thresholds for mem+swap usage. RCU-protected */
221 struct mem_cgroup_threshold_ary *memsw_thresholds;
222
228 /* 223 /*
229 * statistics. This must be placed at the end of memcg. 224 * Should we move charges of a task when a task is moved into this
225 * mem_cgroup ? And what type of charges should we move ?
230 */ 226 */
231 struct mem_cgroup_stat stat; 227 unsigned long move_charge_at_immigrate;
228
229 /*
230 * percpu counter.
231 */
232 struct mem_cgroup_stat_cpu *stat;
233};
234
235/* Stuffs for move charges at task migration. */
236/*
237 * Types of charges to be moved. "move_charge_at_immitgrate" is treated as a
238 * left-shifted bitmap of these types.
239 */
240enum move_type {
241 MOVE_CHARGE_TYPE_ANON, /* private anonymous page and swap of it */
242 NR_MOVE_TYPE,
243};
244
245/* "mc" and its members are protected by cgroup_mutex */
246static struct move_charge_struct {
247 struct mem_cgroup *from;
248 struct mem_cgroup *to;
249 unsigned long precharge;
250 unsigned long moved_charge;
251 unsigned long moved_swap;
252 struct task_struct *moving_task; /* a task moving charges */
253 wait_queue_head_t waitq; /* a waitq for other context */
254} mc = {
255 .waitq = __WAIT_QUEUE_HEAD_INITIALIZER(mc.waitq),
232}; 256};
233 257
234/* 258/*
@@ -371,23 +395,6 @@ mem_cgroup_remove_exceeded(struct mem_cgroup *mem,
371 spin_unlock(&mctz->lock); 395 spin_unlock(&mctz->lock);
372} 396}
373 397
374static bool mem_cgroup_soft_limit_check(struct mem_cgroup *mem)
375{
376 bool ret = false;
377 int cpu;
378 s64 val;
379 struct mem_cgroup_stat_cpu *cpustat;
380
381 cpu = get_cpu();
382 cpustat = &mem->stat.cpustat[cpu];
383 val = __mem_cgroup_stat_read_local(cpustat, MEM_CGROUP_STAT_EVENTS);
384 if (unlikely(val > SOFTLIMIT_EVENTS_THRESH)) {
385 __mem_cgroup_stat_reset_safe(cpustat, MEM_CGROUP_STAT_EVENTS);
386 ret = true;
387 }
388 put_cpu();
389 return ret;
390}
391 398
392static void mem_cgroup_update_tree(struct mem_cgroup *mem, struct page *page) 399static void mem_cgroup_update_tree(struct mem_cgroup *mem, struct page *page)
393{ 400{
@@ -481,17 +488,31 @@ mem_cgroup_largest_soft_limit_node(struct mem_cgroup_tree_per_zone *mctz)
481 return mz; 488 return mz;
482} 489}
483 490
491static s64 mem_cgroup_read_stat(struct mem_cgroup *mem,
492 enum mem_cgroup_stat_index idx)
493{
494 int cpu;
495 s64 val = 0;
496
497 for_each_possible_cpu(cpu)
498 val += per_cpu(mem->stat->count[idx], cpu);
499 return val;
500}
501
502static s64 mem_cgroup_local_usage(struct mem_cgroup *mem)
503{
504 s64 ret;
505
506 ret = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_RSS);
507 ret += mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_CACHE);
508 return ret;
509}
510
484static void mem_cgroup_swap_statistics(struct mem_cgroup *mem, 511static void mem_cgroup_swap_statistics(struct mem_cgroup *mem,
485 bool charge) 512 bool charge)
486{ 513{
487 int val = (charge) ? 1 : -1; 514 int val = (charge) ? 1 : -1;
488 struct mem_cgroup_stat *stat = &mem->stat; 515 this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_SWAPOUT], val);
489 struct mem_cgroup_stat_cpu *cpustat;
490 int cpu = get_cpu();
491
492 cpustat = &stat->cpustat[cpu];
493 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_SWAPOUT, val);
494 put_cpu();
495} 516}
496 517
497static void mem_cgroup_charge_statistics(struct mem_cgroup *mem, 518static void mem_cgroup_charge_statistics(struct mem_cgroup *mem,
@@ -499,24 +520,21 @@ static void mem_cgroup_charge_statistics(struct mem_cgroup *mem,
499 bool charge) 520 bool charge)
500{ 521{
501 int val = (charge) ? 1 : -1; 522 int val = (charge) ? 1 : -1;
502 struct mem_cgroup_stat *stat = &mem->stat;
503 struct mem_cgroup_stat_cpu *cpustat;
504 int cpu = get_cpu();
505 523
506 cpustat = &stat->cpustat[cpu]; 524 preempt_disable();
525
507 if (PageCgroupCache(pc)) 526 if (PageCgroupCache(pc))
508 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_CACHE, val); 527 __this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_CACHE], val);
509 else 528 else
510 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_RSS, val); 529 __this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_RSS], val);
511 530
512 if (charge) 531 if (charge)
513 __mem_cgroup_stat_add_safe(cpustat, 532 __this_cpu_inc(mem->stat->count[MEM_CGROUP_STAT_PGPGIN_COUNT]);
514 MEM_CGROUP_STAT_PGPGIN_COUNT, 1);
515 else 533 else
516 __mem_cgroup_stat_add_safe(cpustat, 534 __this_cpu_inc(mem->stat->count[MEM_CGROUP_STAT_PGPGOUT_COUNT]);
517 MEM_CGROUP_STAT_PGPGOUT_COUNT, 1); 535 __this_cpu_inc(mem->stat->count[MEM_CGROUP_EVENTS]);
518 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_EVENTS, 1); 536
519 put_cpu(); 537 preempt_enable();
520} 538}
521 539
522static unsigned long mem_cgroup_get_local_zonestat(struct mem_cgroup *mem, 540static unsigned long mem_cgroup_get_local_zonestat(struct mem_cgroup *mem,
@@ -534,6 +552,29 @@ static unsigned long mem_cgroup_get_local_zonestat(struct mem_cgroup *mem,
534 return total; 552 return total;
535} 553}
536 554
555static bool __memcg_event_check(struct mem_cgroup *mem, int event_mask_shift)
556{
557 s64 val;
558
559 val = this_cpu_read(mem->stat->count[MEM_CGROUP_EVENTS]);
560
561 return !(val & ((1 << event_mask_shift) - 1));
562}
563
564/*
565 * Check events in order.
566 *
567 */
568static void memcg_check_events(struct mem_cgroup *mem, struct page *page)
569{
570 /* threshold event is triggered in finer grain than soft limit */
571 if (unlikely(__memcg_event_check(mem, THRESHOLDS_EVENTS_THRESH))) {
572 mem_cgroup_threshold(mem);
573 if (unlikely(__memcg_event_check(mem, SOFTLIMIT_EVENTS_THRESH)))
574 mem_cgroup_update_tree(mem, page);
575 }
576}
577
537static struct mem_cgroup *mem_cgroup_from_cont(struct cgroup *cont) 578static struct mem_cgroup *mem_cgroup_from_cont(struct cgroup *cont)
538{ 579{
539 return container_of(cgroup_subsys_state(cont, 580 return container_of(cgroup_subsys_state(cont,
@@ -1000,7 +1041,7 @@ static int mem_cgroup_count_children_cb(struct mem_cgroup *mem, void *data)
1000} 1041}
1001 1042
1002/** 1043/**
1003 * mem_cgroup_print_mem_info: Called from OOM with tasklist_lock held in read mode. 1044 * mem_cgroup_print_oom_info: Called from OOM with tasklist_lock held in read mode.
1004 * @memcg: The memory cgroup that went over limit 1045 * @memcg: The memory cgroup that went over limit
1005 * @p: Task that is going to be killed 1046 * @p: Task that is going to be killed
1006 * 1047 *
@@ -1174,7 +1215,7 @@ static int mem_cgroup_hierarchical_reclaim(struct mem_cgroup *root_mem,
1174 } 1215 }
1175 } 1216 }
1176 } 1217 }
1177 if (!mem_cgroup_local_usage(&victim->stat)) { 1218 if (!mem_cgroup_local_usage(victim)) {
1178 /* this cgroup's local usage == 0 */ 1219 /* this cgroup's local usage == 0 */
1179 css_put(&victim->css); 1220 css_put(&victim->css);
1180 continue; 1221 continue;
@@ -1205,32 +1246,102 @@ static int mem_cgroup_hierarchical_reclaim(struct mem_cgroup *root_mem,
1205 return total; 1246 return total;
1206} 1247}
1207 1248
1208bool mem_cgroup_oom_called(struct task_struct *task) 1249static int mem_cgroup_oom_lock_cb(struct mem_cgroup *mem, void *data)
1209{ 1250{
1210 bool ret = false; 1251 int *val = (int *)data;
1211 struct mem_cgroup *mem; 1252 int x;
1212 struct mm_struct *mm; 1253 /*
1254 * Logically, we can stop scanning immediately when we find
1255 * a memcg is already locked. But condidering unlock ops and
1256 * creation/removal of memcg, scan-all is simple operation.
1257 */
1258 x = atomic_inc_return(&mem->oom_lock);
1259 *val = max(x, *val);
1260 return 0;
1261}
1262/*
1263 * Check OOM-Killer is already running under our hierarchy.
1264 * If someone is running, return false.
1265 */
1266static bool mem_cgroup_oom_lock(struct mem_cgroup *mem)
1267{
1268 int lock_count = 0;
1213 1269
1214 rcu_read_lock(); 1270 mem_cgroup_walk_tree(mem, &lock_count, mem_cgroup_oom_lock_cb);
1215 mm = task->mm; 1271
1216 if (!mm) 1272 if (lock_count == 1)
1217 mm = &init_mm; 1273 return true;
1218 mem = mem_cgroup_from_task(rcu_dereference(mm->owner)); 1274 return false;
1219 if (mem && time_before(jiffies, mem->last_oom_jiffies + HZ/10))
1220 ret = true;
1221 rcu_read_unlock();
1222 return ret;
1223} 1275}
1224 1276
1225static int record_last_oom_cb(struct mem_cgroup *mem, void *data) 1277static int mem_cgroup_oom_unlock_cb(struct mem_cgroup *mem, void *data)
1226{ 1278{
1227 mem->last_oom_jiffies = jiffies; 1279 /*
1280 * When a new child is created while the hierarchy is under oom,
1281 * mem_cgroup_oom_lock() may not be called. We have to use
1282 * atomic_add_unless() here.
1283 */
1284 atomic_add_unless(&mem->oom_lock, -1, 0);
1228 return 0; 1285 return 0;
1229} 1286}
1230 1287
1231static void record_last_oom(struct mem_cgroup *mem) 1288static void mem_cgroup_oom_unlock(struct mem_cgroup *mem)
1232{ 1289{
1233 mem_cgroup_walk_tree(mem, NULL, record_last_oom_cb); 1290 mem_cgroup_walk_tree(mem, NULL, mem_cgroup_oom_unlock_cb);
1291}
1292
1293static DEFINE_MUTEX(memcg_oom_mutex);
1294static DECLARE_WAIT_QUEUE_HEAD(memcg_oom_waitq);
1295
1296/*
1297 * try to call OOM killer. returns false if we should exit memory-reclaim loop.
1298 */
1299bool mem_cgroup_handle_oom(struct mem_cgroup *mem, gfp_t mask)
1300{
1301 DEFINE_WAIT(wait);
1302 bool locked;
1303
1304 /* At first, try to OOM lock hierarchy under mem.*/
1305 mutex_lock(&memcg_oom_mutex);
1306 locked = mem_cgroup_oom_lock(mem);
1307 /*
1308 * Even if signal_pending(), we can't quit charge() loop without
1309 * accounting. So, UNINTERRUPTIBLE is appropriate. But SIGKILL
1310 * under OOM is always welcomed, use TASK_KILLABLE here.
1311 */
1312 if (!locked)
1313 prepare_to_wait(&memcg_oom_waitq, &wait, TASK_KILLABLE);
1314 mutex_unlock(&memcg_oom_mutex);
1315
1316 if (locked)
1317 mem_cgroup_out_of_memory(mem, mask);
1318 else {
1319 schedule();
1320 finish_wait(&memcg_oom_waitq, &wait);
1321 }
1322 mutex_lock(&memcg_oom_mutex);
1323 mem_cgroup_oom_unlock(mem);
1324 /*
1325 * Here, we use global waitq .....more fine grained waitq ?
1326 * Assume following hierarchy.
1327 * A/
1328 * 01
1329 * 02
1330 * assume OOM happens both in A and 01 at the same time. Tthey are
1331 * mutually exclusive by lock. (kill in 01 helps A.)
1332 * When we use per memcg waitq, we have to wake up waiters on A and 02
1333 * in addtion to waiters on 01. We use global waitq for avoiding mess.
1334 * It will not be a big problem.
1335 * (And a task may be moved to other groups while it's waiting for OOM.)
1336 */
1337 wake_up_all(&memcg_oom_waitq);
1338 mutex_unlock(&memcg_oom_mutex);
1339
1340 if (test_thread_flag(TIF_MEMDIE) || fatal_signal_pending(current))
1341 return false;
1342 /* Give chance to dying process */
1343 schedule_timeout(1);
1344 return true;
1234} 1345}
1235 1346
1236/* 1347/*
@@ -1240,9 +1351,6 @@ static void record_last_oom(struct mem_cgroup *mem)
1240void mem_cgroup_update_file_mapped(struct page *page, int val) 1351void mem_cgroup_update_file_mapped(struct page *page, int val)
1241{ 1352{
1242 struct mem_cgroup *mem; 1353 struct mem_cgroup *mem;
1243 struct mem_cgroup_stat *stat;
1244 struct mem_cgroup_stat_cpu *cpustat;
1245 int cpu;
1246 struct page_cgroup *pc; 1354 struct page_cgroup *pc;
1247 1355
1248 pc = lookup_page_cgroup(page); 1356 pc = lookup_page_cgroup(page);
@@ -1258,13 +1366,10 @@ void mem_cgroup_update_file_mapped(struct page *page, int val)
1258 goto done; 1366 goto done;
1259 1367
1260 /* 1368 /*
1261 * Preemption is already disabled, we don't need get_cpu() 1369 * Preemption is already disabled. We can use __this_cpu_xxx
1262 */ 1370 */
1263 cpu = smp_processor_id(); 1371 __this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_FILE_MAPPED], val);
1264 stat = &mem->stat;
1265 cpustat = &stat->cpustat[cpu];
1266 1372
1267 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED, val);
1268done: 1373done:
1269 unlock_page_cgroup(pc); 1374 unlock_page_cgroup(pc);
1270} 1375}
@@ -1401,19 +1506,21 @@ static int __cpuinit memcg_stock_cpu_callback(struct notifier_block *nb,
1401 * oom-killer can be invoked. 1506 * oom-killer can be invoked.
1402 */ 1507 */
1403static int __mem_cgroup_try_charge(struct mm_struct *mm, 1508static int __mem_cgroup_try_charge(struct mm_struct *mm,
1404 gfp_t gfp_mask, struct mem_cgroup **memcg, 1509 gfp_t gfp_mask, struct mem_cgroup **memcg, bool oom)
1405 bool oom, struct page *page)
1406{ 1510{
1407 struct mem_cgroup *mem, *mem_over_limit; 1511 struct mem_cgroup *mem, *mem_over_limit;
1408 int nr_retries = MEM_CGROUP_RECLAIM_RETRIES; 1512 int nr_retries = MEM_CGROUP_RECLAIM_RETRIES;
1409 struct res_counter *fail_res; 1513 struct res_counter *fail_res;
1410 int csize = CHARGE_SIZE; 1514 int csize = CHARGE_SIZE;
1411 1515
1412 if (unlikely(test_thread_flag(TIF_MEMDIE))) { 1516 /*
1413 /* Don't account this! */ 1517 * Unlike gloval-vm's OOM-kill, we're not in memory shortage
1414 *memcg = NULL; 1518 * in system level. So, allow to go ahead dying process in addition to
1415 return 0; 1519 * MEMDIE process.
1416 } 1520 */
1521 if (unlikely(test_thread_flag(TIF_MEMDIE)
1522 || fatal_signal_pending(current)))
1523 goto bypass;
1417 1524
1418 /* 1525 /*
1419 * We always charge the cgroup the mm_struct belongs to. 1526 * We always charge the cgroup the mm_struct belongs to.
@@ -1440,7 +1547,7 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
1440 unsigned long flags = 0; 1547 unsigned long flags = 0;
1441 1548
1442 if (consume_stock(mem)) 1549 if (consume_stock(mem))
1443 goto charged; 1550 goto done;
1444 1551
1445 ret = res_counter_charge(&mem->res, csize, &fail_res); 1552 ret = res_counter_charge(&mem->res, csize, &fail_res);
1446 if (likely(!ret)) { 1553 if (likely(!ret)) {
@@ -1483,28 +1590,70 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
1483 if (mem_cgroup_check_under_limit(mem_over_limit)) 1590 if (mem_cgroup_check_under_limit(mem_over_limit))
1484 continue; 1591 continue;
1485 1592
1593 /* try to avoid oom while someone is moving charge */
1594 if (mc.moving_task && current != mc.moving_task) {
1595 struct mem_cgroup *from, *to;
1596 bool do_continue = false;
1597 /*
1598 * There is a small race that "from" or "to" can be
1599 * freed by rmdir, so we use css_tryget().
1600 */
1601 rcu_read_lock();
1602 from = mc.from;
1603 to = mc.to;
1604 if (from && css_tryget(&from->css)) {
1605 if (mem_over_limit->use_hierarchy)
1606 do_continue = css_is_ancestor(
1607 &from->css,
1608 &mem_over_limit->css);
1609 else
1610 do_continue = (from == mem_over_limit);
1611 css_put(&from->css);
1612 }
1613 if (!do_continue && to && css_tryget(&to->css)) {
1614 if (mem_over_limit->use_hierarchy)
1615 do_continue = css_is_ancestor(
1616 &to->css,
1617 &mem_over_limit->css);
1618 else
1619 do_continue = (to == mem_over_limit);
1620 css_put(&to->css);
1621 }
1622 rcu_read_unlock();
1623 if (do_continue) {
1624 DEFINE_WAIT(wait);
1625 prepare_to_wait(&mc.waitq, &wait,
1626 TASK_INTERRUPTIBLE);
1627 /* moving charge context might have finished. */
1628 if (mc.moving_task)
1629 schedule();
1630 finish_wait(&mc.waitq, &wait);
1631 continue;
1632 }
1633 }
1634
1486 if (!nr_retries--) { 1635 if (!nr_retries--) {
1487 if (oom) { 1636 if (!oom)
1488 mem_cgroup_out_of_memory(mem_over_limit, gfp_mask); 1637 goto nomem;
1489 record_last_oom(mem_over_limit); 1638 if (mem_cgroup_handle_oom(mem_over_limit, gfp_mask)) {
1639 nr_retries = MEM_CGROUP_RECLAIM_RETRIES;
1640 continue;
1490 } 1641 }
1491 goto nomem; 1642 /* When we reach here, current task is dying .*/
1643 css_put(&mem->css);
1644 goto bypass;
1492 } 1645 }
1493 } 1646 }
1494 if (csize > PAGE_SIZE) 1647 if (csize > PAGE_SIZE)
1495 refill_stock(mem, csize - PAGE_SIZE); 1648 refill_stock(mem, csize - PAGE_SIZE);
1496charged:
1497 /*
1498 * Insert ancestor (and ancestor's ancestors), to softlimit RB-tree.
1499 * if they exceeds softlimit.
1500 */
1501 if (mem_cgroup_soft_limit_check(mem))
1502 mem_cgroup_update_tree(mem, page);
1503done: 1649done:
1504 return 0; 1650 return 0;
1505nomem: 1651nomem:
1506 css_put(&mem->css); 1652 css_put(&mem->css);
1507 return -ENOMEM; 1653 return -ENOMEM;
1654bypass:
1655 *memcg = NULL;
1656 return 0;
1508} 1657}
1509 1658
1510/* 1659/*
@@ -1512,14 +1661,23 @@ nomem:
1512 * This function is for that and do uncharge, put css's refcnt. 1661 * This function is for that and do uncharge, put css's refcnt.
1513 * gotten by try_charge(). 1662 * gotten by try_charge().
1514 */ 1663 */
1515static void mem_cgroup_cancel_charge(struct mem_cgroup *mem) 1664static void __mem_cgroup_cancel_charge(struct mem_cgroup *mem,
1665 unsigned long count)
1516{ 1666{
1517 if (!mem_cgroup_is_root(mem)) { 1667 if (!mem_cgroup_is_root(mem)) {
1518 res_counter_uncharge(&mem->res, PAGE_SIZE); 1668 res_counter_uncharge(&mem->res, PAGE_SIZE * count);
1519 if (do_swap_account) 1669 if (do_swap_account)
1520 res_counter_uncharge(&mem->memsw, PAGE_SIZE); 1670 res_counter_uncharge(&mem->memsw, PAGE_SIZE * count);
1671 VM_BUG_ON(test_bit(CSS_ROOT, &mem->css.flags));
1672 WARN_ON_ONCE(count > INT_MAX);
1673 __css_put(&mem->css, (int)count);
1521 } 1674 }
1522 css_put(&mem->css); 1675 /* we don't need css_put for root */
1676}
1677
1678static void mem_cgroup_cancel_charge(struct mem_cgroup *mem)
1679{
1680 __mem_cgroup_cancel_charge(mem, 1);
1523} 1681}
1524 1682
1525/* 1683/*
@@ -1615,6 +1773,12 @@ static void __mem_cgroup_commit_charge(struct mem_cgroup *mem,
1615 mem_cgroup_charge_statistics(mem, pc, true); 1773 mem_cgroup_charge_statistics(mem, pc, true);
1616 1774
1617 unlock_page_cgroup(pc); 1775 unlock_page_cgroup(pc);
1776 /*
1777 * "charge_statistics" updated event counter. Then, check it.
1778 * Insert ancestor (and ancestor's ancestors), to softlimit RB-tree.
1779 * if they exceeds softlimit.
1780 */
1781 memcg_check_events(mem, pc->page);
1618} 1782}
1619 1783
1620/** 1784/**
@@ -1622,22 +1786,22 @@ static void __mem_cgroup_commit_charge(struct mem_cgroup *mem,
1622 * @pc: page_cgroup of the page. 1786 * @pc: page_cgroup of the page.
1623 * @from: mem_cgroup which the page is moved from. 1787 * @from: mem_cgroup which the page is moved from.
1624 * @to: mem_cgroup which the page is moved to. @from != @to. 1788 * @to: mem_cgroup which the page is moved to. @from != @to.
1789 * @uncharge: whether we should call uncharge and css_put against @from.
1625 * 1790 *
1626 * The caller must confirm following. 1791 * The caller must confirm following.
1627 * - page is not on LRU (isolate_page() is useful.) 1792 * - page is not on LRU (isolate_page() is useful.)
1628 * - the pc is locked, used, and ->mem_cgroup points to @from. 1793 * - the pc is locked, used, and ->mem_cgroup points to @from.
1629 * 1794 *
1630 * This function does "uncharge" from old cgroup but doesn't do "charge" to 1795 * This function doesn't do "charge" nor css_get to new cgroup. It should be
1631 * new cgroup. It should be done by a caller. 1796 * done by a caller(__mem_cgroup_try_charge would be usefull). If @uncharge is
1797 * true, this function does "uncharge" from old cgroup, but it doesn't if
1798 * @uncharge is false, so a caller should do "uncharge".
1632 */ 1799 */
1633 1800
1634static void __mem_cgroup_move_account(struct page_cgroup *pc, 1801static void __mem_cgroup_move_account(struct page_cgroup *pc,
1635 struct mem_cgroup *from, struct mem_cgroup *to) 1802 struct mem_cgroup *from, struct mem_cgroup *to, bool uncharge)
1636{ 1803{
1637 struct page *page; 1804 struct page *page;
1638 int cpu;
1639 struct mem_cgroup_stat *stat;
1640 struct mem_cgroup_stat_cpu *cpustat;
1641 1805
1642 VM_BUG_ON(from == to); 1806 VM_BUG_ON(from == to);
1643 VM_BUG_ON(PageLRU(pc->page)); 1807 VM_BUG_ON(PageLRU(pc->page));
@@ -1645,38 +1809,28 @@ static void __mem_cgroup_move_account(struct page_cgroup *pc,
1645 VM_BUG_ON(!PageCgroupUsed(pc)); 1809 VM_BUG_ON(!PageCgroupUsed(pc));
1646 VM_BUG_ON(pc->mem_cgroup != from); 1810 VM_BUG_ON(pc->mem_cgroup != from);
1647 1811
1648 if (!mem_cgroup_is_root(from))
1649 res_counter_uncharge(&from->res, PAGE_SIZE);
1650 mem_cgroup_charge_statistics(from, pc, false);
1651
1652 page = pc->page; 1812 page = pc->page;
1653 if (page_mapped(page) && !PageAnon(page)) { 1813 if (page_mapped(page) && !PageAnon(page)) {
1654 cpu = smp_processor_id(); 1814 /* Update mapped_file data for mem_cgroup */
1655 /* Update mapped_file data for mem_cgroup "from" */ 1815 preempt_disable();
1656 stat = &from->stat; 1816 __this_cpu_dec(from->stat->count[MEM_CGROUP_STAT_FILE_MAPPED]);
1657 cpustat = &stat->cpustat[cpu]; 1817 __this_cpu_inc(to->stat->count[MEM_CGROUP_STAT_FILE_MAPPED]);
1658 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED, 1818 preempt_enable();
1659 -1);
1660
1661 /* Update mapped_file data for mem_cgroup "to" */
1662 stat = &to->stat;
1663 cpustat = &stat->cpustat[cpu];
1664 __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED,
1665 1);
1666 } 1819 }
1820 mem_cgroup_charge_statistics(from, pc, false);
1821 if (uncharge)
1822 /* This is not "cancel", but cancel_charge does all we need. */
1823 mem_cgroup_cancel_charge(from);
1667 1824
1668 if (do_swap_account && !mem_cgroup_is_root(from)) 1825 /* caller should have done css_get */
1669 res_counter_uncharge(&from->memsw, PAGE_SIZE);
1670 css_put(&from->css);
1671
1672 css_get(&to->css);
1673 pc->mem_cgroup = to; 1826 pc->mem_cgroup = to;
1674 mem_cgroup_charge_statistics(to, pc, true); 1827 mem_cgroup_charge_statistics(to, pc, true);
1675 /* 1828 /*
1676 * We charges against "to" which may not have any tasks. Then, "to" 1829 * We charges against "to" which may not have any tasks. Then, "to"
1677 * can be under rmdir(). But in current implementation, caller of 1830 * can be under rmdir(). But in current implementation, caller of
1678 * this function is just force_empty() and it's garanteed that 1831 * this function is just force_empty() and move charge, so it's
1679 * "to" is never removed. So, we don't check rmdir status here. 1832 * garanteed that "to" is never removed. So, we don't check rmdir
1833 * status here.
1680 */ 1834 */
1681} 1835}
1682 1836
@@ -1685,15 +1839,20 @@ static void __mem_cgroup_move_account(struct page_cgroup *pc,
1685 * __mem_cgroup_move_account() 1839 * __mem_cgroup_move_account()
1686 */ 1840 */
1687static int mem_cgroup_move_account(struct page_cgroup *pc, 1841static int mem_cgroup_move_account(struct page_cgroup *pc,
1688 struct mem_cgroup *from, struct mem_cgroup *to) 1842 struct mem_cgroup *from, struct mem_cgroup *to, bool uncharge)
1689{ 1843{
1690 int ret = -EINVAL; 1844 int ret = -EINVAL;
1691 lock_page_cgroup(pc); 1845 lock_page_cgroup(pc);
1692 if (PageCgroupUsed(pc) && pc->mem_cgroup == from) { 1846 if (PageCgroupUsed(pc) && pc->mem_cgroup == from) {
1693 __mem_cgroup_move_account(pc, from, to); 1847 __mem_cgroup_move_account(pc, from, to, uncharge);
1694 ret = 0; 1848 ret = 0;
1695 } 1849 }
1696 unlock_page_cgroup(pc); 1850 unlock_page_cgroup(pc);
1851 /*
1852 * check events
1853 */
1854 memcg_check_events(to, pc->page);
1855 memcg_check_events(from, pc->page);
1697 return ret; 1856 return ret;
1698} 1857}
1699 1858
@@ -1722,15 +1881,13 @@ static int mem_cgroup_move_parent(struct page_cgroup *pc,
1722 goto put; 1881 goto put;
1723 1882
1724 parent = mem_cgroup_from_cont(pcg); 1883 parent = mem_cgroup_from_cont(pcg);
1725 ret = __mem_cgroup_try_charge(NULL, gfp_mask, &parent, false, page); 1884 ret = __mem_cgroup_try_charge(NULL, gfp_mask, &parent, false);
1726 if (ret || !parent) 1885 if (ret || !parent)
1727 goto put_back; 1886 goto put_back;
1728 1887
1729 ret = mem_cgroup_move_account(pc, child, parent); 1888 ret = mem_cgroup_move_account(pc, child, parent, true);
1730 if (!ret) 1889 if (ret)
1731 css_put(&parent->css); /* drop extra refcnt by try_charge() */ 1890 mem_cgroup_cancel_charge(parent);
1732 else
1733 mem_cgroup_cancel_charge(parent); /* does css_put */
1734put_back: 1891put_back:
1735 putback_lru_page(page); 1892 putback_lru_page(page);
1736put: 1893put:
@@ -1760,7 +1917,7 @@ static int mem_cgroup_charge_common(struct page *page, struct mm_struct *mm,
1760 prefetchw(pc); 1917 prefetchw(pc);
1761 1918
1762 mem = memcg; 1919 mem = memcg;
1763 ret = __mem_cgroup_try_charge(mm, gfp_mask, &mem, true, page); 1920 ret = __mem_cgroup_try_charge(mm, gfp_mask, &mem, true);
1764 if (ret || !mem) 1921 if (ret || !mem)
1765 return ret; 1922 return ret;
1766 1923
@@ -1880,14 +2037,14 @@ int mem_cgroup_try_charge_swapin(struct mm_struct *mm,
1880 if (!mem) 2037 if (!mem)
1881 goto charge_cur_mm; 2038 goto charge_cur_mm;
1882 *ptr = mem; 2039 *ptr = mem;
1883 ret = __mem_cgroup_try_charge(NULL, mask, ptr, true, page); 2040 ret = __mem_cgroup_try_charge(NULL, mask, ptr, true);
1884 /* drop extra refcnt from tryget */ 2041 /* drop extra refcnt from tryget */
1885 css_put(&mem->css); 2042 css_put(&mem->css);
1886 return ret; 2043 return ret;
1887charge_cur_mm: 2044charge_cur_mm:
1888 if (unlikely(!mm)) 2045 if (unlikely(!mm))
1889 mm = &init_mm; 2046 mm = &init_mm;
1890 return __mem_cgroup_try_charge(mm, mask, ptr, true, page); 2047 return __mem_cgroup_try_charge(mm, mask, ptr, true);
1891} 2048}
1892 2049
1893static void 2050static void
@@ -2064,8 +2221,7 @@ __mem_cgroup_uncharge_common(struct page *page, enum charge_type ctype)
2064 mz = page_cgroup_zoneinfo(pc); 2221 mz = page_cgroup_zoneinfo(pc);
2065 unlock_page_cgroup(pc); 2222 unlock_page_cgroup(pc);
2066 2223
2067 if (mem_cgroup_soft_limit_check(mem)) 2224 memcg_check_events(mem, page);
2068 mem_cgroup_update_tree(mem, page);
2069 /* at swapout, this memcg will be accessed to record to swap */ 2225 /* at swapout, this memcg will be accessed to record to swap */
2070 if (ctype != MEM_CGROUP_CHARGE_TYPE_SWAPOUT) 2226 if (ctype != MEM_CGROUP_CHARGE_TYPE_SWAPOUT)
2071 css_put(&mem->css); 2227 css_put(&mem->css);
@@ -2192,6 +2348,64 @@ void mem_cgroup_uncharge_swap(swp_entry_t ent)
2192 } 2348 }
2193 rcu_read_unlock(); 2349 rcu_read_unlock();
2194} 2350}
2351
2352/**
2353 * mem_cgroup_move_swap_account - move swap charge and swap_cgroup's record.
2354 * @entry: swap entry to be moved
2355 * @from: mem_cgroup which the entry is moved from
2356 * @to: mem_cgroup which the entry is moved to
2357 * @need_fixup: whether we should fixup res_counters and refcounts.
2358 *
2359 * It succeeds only when the swap_cgroup's record for this entry is the same
2360 * as the mem_cgroup's id of @from.
2361 *
2362 * Returns 0 on success, -EINVAL on failure.
2363 *
2364 * The caller must have charged to @to, IOW, called res_counter_charge() about
2365 * both res and memsw, and called css_get().
2366 */
2367static int mem_cgroup_move_swap_account(swp_entry_t entry,
2368 struct mem_cgroup *from, struct mem_cgroup *to, bool need_fixup)
2369{
2370 unsigned short old_id, new_id;
2371
2372 old_id = css_id(&from->css);
2373 new_id = css_id(&to->css);
2374
2375 if (swap_cgroup_cmpxchg(entry, old_id, new_id) == old_id) {
2376 mem_cgroup_swap_statistics(from, false);
2377 mem_cgroup_swap_statistics(to, true);
2378 /*
2379 * This function is only called from task migration context now.
2380 * It postpones res_counter and refcount handling till the end
2381 * of task migration(mem_cgroup_clear_mc()) for performance
2382 * improvement. But we cannot postpone mem_cgroup_get(to)
2383 * because if the process that has been moved to @to does
2384 * swap-in, the refcount of @to might be decreased to 0.
2385 */
2386 mem_cgroup_get(to);
2387 if (need_fixup) {
2388 if (!mem_cgroup_is_root(from))
2389 res_counter_uncharge(&from->memsw, PAGE_SIZE);
2390 mem_cgroup_put(from);
2391 /*
2392 * we charged both to->res and to->memsw, so we should
2393 * uncharge to->res.
2394 */
2395 if (!mem_cgroup_is_root(to))
2396 res_counter_uncharge(&to->res, PAGE_SIZE);
2397 css_put(&to->css);
2398 }
2399 return 0;
2400 }
2401 return -EINVAL;
2402}
2403#else
2404static inline int mem_cgroup_move_swap_account(swp_entry_t entry,
2405 struct mem_cgroup *from, struct mem_cgroup *to, bool need_fixup)
2406{
2407 return -EINVAL;
2408}
2195#endif 2409#endif
2196 2410
2197/* 2411/*
@@ -2216,8 +2430,7 @@ int mem_cgroup_prepare_migration(struct page *page, struct mem_cgroup **ptr)
2216 unlock_page_cgroup(pc); 2430 unlock_page_cgroup(pc);
2217 2431
2218 if (mem) { 2432 if (mem) {
2219 ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false, 2433 ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false);
2220 page);
2221 css_put(&mem->css); 2434 css_put(&mem->css);
2222 } 2435 }
2223 *ptr = mem; 2436 *ptr = mem;
@@ -2704,7 +2917,7 @@ static int
2704mem_cgroup_get_idx_stat(struct mem_cgroup *mem, void *data) 2917mem_cgroup_get_idx_stat(struct mem_cgroup *mem, void *data)
2705{ 2918{
2706 struct mem_cgroup_idx_data *d = data; 2919 struct mem_cgroup_idx_data *d = data;
2707 d->val += mem_cgroup_read_stat(&mem->stat, d->idx); 2920 d->val += mem_cgroup_read_stat(mem, d->idx);
2708 return 0; 2921 return 0;
2709} 2922}
2710 2923
@@ -2719,40 +2932,50 @@ mem_cgroup_get_recursive_idx_stat(struct mem_cgroup *mem,
2719 *val = d.val; 2932 *val = d.val;
2720} 2933}
2721 2934
2935static inline u64 mem_cgroup_usage(struct mem_cgroup *mem, bool swap)
2936{
2937 u64 idx_val, val;
2938
2939 if (!mem_cgroup_is_root(mem)) {
2940 if (!swap)
2941 return res_counter_read_u64(&mem->res, RES_USAGE);
2942 else
2943 return res_counter_read_u64(&mem->memsw, RES_USAGE);
2944 }
2945
2946 mem_cgroup_get_recursive_idx_stat(mem, MEM_CGROUP_STAT_CACHE, &idx_val);
2947 val = idx_val;
2948 mem_cgroup_get_recursive_idx_stat(mem, MEM_CGROUP_STAT_RSS, &idx_val);
2949 val += idx_val;
2950
2951 if (swap) {
2952 mem_cgroup_get_recursive_idx_stat(mem,
2953 MEM_CGROUP_STAT_SWAPOUT, &idx_val);
2954 val += idx_val;
2955 }
2956
2957 return val << PAGE_SHIFT;
2958}
2959
2722static u64 mem_cgroup_read(struct cgroup *cont, struct cftype *cft) 2960static u64 mem_cgroup_read(struct cgroup *cont, struct cftype *cft)
2723{ 2961{
2724 struct mem_cgroup *mem = mem_cgroup_from_cont(cont); 2962 struct mem_cgroup *mem = mem_cgroup_from_cont(cont);
2725 u64 idx_val, val; 2963 u64 val;
2726 int type, name; 2964 int type, name;
2727 2965
2728 type = MEMFILE_TYPE(cft->private); 2966 type = MEMFILE_TYPE(cft->private);
2729 name = MEMFILE_ATTR(cft->private); 2967 name = MEMFILE_ATTR(cft->private);
2730 switch (type) { 2968 switch (type) {
2731 case _MEM: 2969 case _MEM:
2732 if (name == RES_USAGE && mem_cgroup_is_root(mem)) { 2970 if (name == RES_USAGE)
2733 mem_cgroup_get_recursive_idx_stat(mem, 2971 val = mem_cgroup_usage(mem, false);
2734 MEM_CGROUP_STAT_CACHE, &idx_val); 2972 else
2735 val = idx_val;
2736 mem_cgroup_get_recursive_idx_stat(mem,
2737 MEM_CGROUP_STAT_RSS, &idx_val);
2738 val += idx_val;
2739 val <<= PAGE_SHIFT;
2740 } else
2741 val = res_counter_read_u64(&mem->res, name); 2973 val = res_counter_read_u64(&mem->res, name);
2742 break; 2974 break;
2743 case _MEMSWAP: 2975 case _MEMSWAP:
2744 if (name == RES_USAGE && mem_cgroup_is_root(mem)) { 2976 if (name == RES_USAGE)
2745 mem_cgroup_get_recursive_idx_stat(mem, 2977 val = mem_cgroup_usage(mem, true);
2746 MEM_CGROUP_STAT_CACHE, &idx_val); 2978 else
2747 val = idx_val;
2748 mem_cgroup_get_recursive_idx_stat(mem,
2749 MEM_CGROUP_STAT_RSS, &idx_val);
2750 val += idx_val;
2751 mem_cgroup_get_recursive_idx_stat(mem,
2752 MEM_CGROUP_STAT_SWAPOUT, &idx_val);
2753 val += idx_val;
2754 val <<= PAGE_SHIFT;
2755 } else
2756 val = res_counter_read_u64(&mem->memsw, name); 2979 val = res_counter_read_u64(&mem->memsw, name);
2757 break; 2980 break;
2758 default: 2981 default:
@@ -2865,6 +3088,39 @@ static int mem_cgroup_reset(struct cgroup *cont, unsigned int event)
2865 return 0; 3088 return 0;
2866} 3089}
2867 3090
3091static u64 mem_cgroup_move_charge_read(struct cgroup *cgrp,
3092 struct cftype *cft)
3093{
3094 return mem_cgroup_from_cont(cgrp)->move_charge_at_immigrate;
3095}
3096
3097#ifdef CONFIG_MMU
3098static int mem_cgroup_move_charge_write(struct cgroup *cgrp,
3099 struct cftype *cft, u64 val)
3100{
3101 struct mem_cgroup *mem = mem_cgroup_from_cont(cgrp);
3102
3103 if (val >= (1 << NR_MOVE_TYPE))
3104 return -EINVAL;
3105 /*
3106 * We check this value several times in both in can_attach() and
3107 * attach(), so we need cgroup lock to prevent this value from being
3108 * inconsistent.
3109 */
3110 cgroup_lock();
3111 mem->move_charge_at_immigrate = val;
3112 cgroup_unlock();
3113
3114 return 0;
3115}
3116#else
3117static int mem_cgroup_move_charge_write(struct cgroup *cgrp,
3118 struct cftype *cft, u64 val)
3119{
3120 return -ENOSYS;
3121}
3122#endif
3123
2868 3124
2869/* For read statistics */ 3125/* For read statistics */
2870enum { 3126enum {
@@ -2910,18 +3166,18 @@ static int mem_cgroup_get_local_stat(struct mem_cgroup *mem, void *data)
2910 s64 val; 3166 s64 val;
2911 3167
2912 /* per cpu stat */ 3168 /* per cpu stat */
2913 val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_CACHE); 3169 val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_CACHE);
2914 s->stat[MCS_CACHE] += val * PAGE_SIZE; 3170 s->stat[MCS_CACHE] += val * PAGE_SIZE;
2915 val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_RSS); 3171 val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_RSS);
2916 s->stat[MCS_RSS] += val * PAGE_SIZE; 3172 s->stat[MCS_RSS] += val * PAGE_SIZE;
2917 val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_FILE_MAPPED); 3173 val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_FILE_MAPPED);
2918 s->stat[MCS_FILE_MAPPED] += val * PAGE_SIZE; 3174 s->stat[MCS_FILE_MAPPED] += val * PAGE_SIZE;
2919 val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_PGPGIN_COUNT); 3175 val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_PGPGIN_COUNT);
2920 s->stat[MCS_PGPGIN] += val; 3176 s->stat[MCS_PGPGIN] += val;
2921 val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_PGPGOUT_COUNT); 3177 val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_PGPGOUT_COUNT);
2922 s->stat[MCS_PGPGOUT] += val; 3178 s->stat[MCS_PGPGOUT] += val;
2923 if (do_swap_account) { 3179 if (do_swap_account) {
2924 val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_SWAPOUT); 3180 val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_SWAPOUT);
2925 s->stat[MCS_SWAP] += val * PAGE_SIZE; 3181 s->stat[MCS_SWAP] += val * PAGE_SIZE;
2926 } 3182 }
2927 3183
@@ -3049,12 +3305,249 @@ static int mem_cgroup_swappiness_write(struct cgroup *cgrp, struct cftype *cft,
3049 return 0; 3305 return 0;
3050} 3306}
3051 3307
3308static void __mem_cgroup_threshold(struct mem_cgroup *memcg, bool swap)
3309{
3310 struct mem_cgroup_threshold_ary *t;
3311 u64 usage;
3312 int i;
3313
3314 rcu_read_lock();
3315 if (!swap)
3316 t = rcu_dereference(memcg->thresholds);
3317 else
3318 t = rcu_dereference(memcg->memsw_thresholds);
3319
3320 if (!t)
3321 goto unlock;
3322
3323 usage = mem_cgroup_usage(memcg, swap);
3324
3325 /*
3326 * current_threshold points to threshold just below usage.
3327 * If it's not true, a threshold was crossed after last
3328 * call of __mem_cgroup_threshold().
3329 */
3330 i = atomic_read(&t->current_threshold);
3331
3332 /*
3333 * Iterate backward over array of thresholds starting from
3334 * current_threshold and check if a threshold is crossed.
3335 * If none of thresholds below usage is crossed, we read
3336 * only one element of the array here.
3337 */
3338 for (; i >= 0 && unlikely(t->entries[i].threshold > usage); i--)
3339 eventfd_signal(t->entries[i].eventfd, 1);
3340
3341 /* i = current_threshold + 1 */
3342 i++;
3343
3344 /*
3345 * Iterate forward over array of thresholds starting from
3346 * current_threshold+1 and check if a threshold is crossed.
3347 * If none of thresholds above usage is crossed, we read
3348 * only one element of the array here.
3349 */
3350 for (; i < t->size && unlikely(t->entries[i].threshold <= usage); i++)
3351 eventfd_signal(t->entries[i].eventfd, 1);
3352
3353 /* Update current_threshold */
3354 atomic_set(&t->current_threshold, i - 1);
3355unlock:
3356 rcu_read_unlock();
3357}
3358
3359static void mem_cgroup_threshold(struct mem_cgroup *memcg)
3360{
3361 __mem_cgroup_threshold(memcg, false);
3362 if (do_swap_account)
3363 __mem_cgroup_threshold(memcg, true);
3364}
3365
3366static int compare_thresholds(const void *a, const void *b)
3367{
3368 const struct mem_cgroup_threshold *_a = a;
3369 const struct mem_cgroup_threshold *_b = b;
3370
3371 return _a->threshold - _b->threshold;
3372}
3373
3374static int mem_cgroup_register_event(struct cgroup *cgrp, struct cftype *cft,
3375 struct eventfd_ctx *eventfd, const char *args)
3376{
3377 struct mem_cgroup *memcg = mem_cgroup_from_cont(cgrp);
3378 struct mem_cgroup_threshold_ary *thresholds, *thresholds_new;
3379 int type = MEMFILE_TYPE(cft->private);
3380 u64 threshold, usage;
3381 int size;
3382 int i, ret;
3383
3384 ret = res_counter_memparse_write_strategy(args, &threshold);
3385 if (ret)
3386 return ret;
3387
3388 mutex_lock(&memcg->thresholds_lock);
3389 if (type == _MEM)
3390 thresholds = memcg->thresholds;
3391 else if (type == _MEMSWAP)
3392 thresholds = memcg->memsw_thresholds;
3393 else
3394 BUG();
3395
3396 usage = mem_cgroup_usage(memcg, type == _MEMSWAP);
3397
3398 /* Check if a threshold crossed before adding a new one */
3399 if (thresholds)
3400 __mem_cgroup_threshold(memcg, type == _MEMSWAP);
3401
3402 if (thresholds)
3403 size = thresholds->size + 1;
3404 else
3405 size = 1;
3406
3407 /* Allocate memory for new array of thresholds */
3408 thresholds_new = kmalloc(sizeof(*thresholds_new) +
3409 size * sizeof(struct mem_cgroup_threshold),
3410 GFP_KERNEL);
3411 if (!thresholds_new) {
3412 ret = -ENOMEM;
3413 goto unlock;
3414 }
3415 thresholds_new->size = size;
3416
3417 /* Copy thresholds (if any) to new array */
3418 if (thresholds)
3419 memcpy(thresholds_new->entries, thresholds->entries,
3420 thresholds->size *
3421 sizeof(struct mem_cgroup_threshold));
3422 /* Add new threshold */
3423 thresholds_new->entries[size - 1].eventfd = eventfd;
3424 thresholds_new->entries[size - 1].threshold = threshold;
3425
3426 /* Sort thresholds. Registering of new threshold isn't time-critical */
3427 sort(thresholds_new->entries, size,
3428 sizeof(struct mem_cgroup_threshold),
3429 compare_thresholds, NULL);
3430
3431 /* Find current threshold */
3432 atomic_set(&thresholds_new->current_threshold, -1);
3433 for (i = 0; i < size; i++) {
3434 if (thresholds_new->entries[i].threshold < usage) {
3435 /*
3436 * thresholds_new->current_threshold will not be used
3437 * until rcu_assign_pointer(), so it's safe to increment
3438 * it here.
3439 */
3440 atomic_inc(&thresholds_new->current_threshold);
3441 }
3442 }
3443
3444 if (type == _MEM)
3445 rcu_assign_pointer(memcg->thresholds, thresholds_new);
3446 else
3447 rcu_assign_pointer(memcg->memsw_thresholds, thresholds_new);
3448
3449 /* To be sure that nobody uses thresholds before freeing it */
3450 synchronize_rcu();
3451
3452 kfree(thresholds);
3453unlock:
3454 mutex_unlock(&memcg->thresholds_lock);
3455
3456 return ret;
3457}
3458
3459static int mem_cgroup_unregister_event(struct cgroup *cgrp, struct cftype *cft,
3460 struct eventfd_ctx *eventfd)
3461{
3462 struct mem_cgroup *memcg = mem_cgroup_from_cont(cgrp);
3463 struct mem_cgroup_threshold_ary *thresholds, *thresholds_new;
3464 int type = MEMFILE_TYPE(cft->private);
3465 u64 usage;
3466 int size = 0;
3467 int i, j, ret;
3468
3469 mutex_lock(&memcg->thresholds_lock);
3470 if (type == _MEM)
3471 thresholds = memcg->thresholds;
3472 else if (type == _MEMSWAP)
3473 thresholds = memcg->memsw_thresholds;
3474 else
3475 BUG();
3476
3477 /*
3478 * Something went wrong if we trying to unregister a threshold
3479 * if we don't have thresholds
3480 */
3481 BUG_ON(!thresholds);
3482
3483 usage = mem_cgroup_usage(memcg, type == _MEMSWAP);
3484
3485 /* Check if a threshold crossed before removing */
3486 __mem_cgroup_threshold(memcg, type == _MEMSWAP);
3487
3488 /* Calculate new number of threshold */
3489 for (i = 0; i < thresholds->size; i++) {
3490 if (thresholds->entries[i].eventfd != eventfd)
3491 size++;
3492 }
3493
3494 /* Set thresholds array to NULL if we don't have thresholds */
3495 if (!size) {
3496 thresholds_new = NULL;
3497 goto assign;
3498 }
3499
3500 /* Allocate memory for new array of thresholds */
3501 thresholds_new = kmalloc(sizeof(*thresholds_new) +
3502 size * sizeof(struct mem_cgroup_threshold),
3503 GFP_KERNEL);
3504 if (!thresholds_new) {
3505 ret = -ENOMEM;
3506 goto unlock;
3507 }
3508 thresholds_new->size = size;
3509
3510 /* Copy thresholds and find current threshold */
3511 atomic_set(&thresholds_new->current_threshold, -1);
3512 for (i = 0, j = 0; i < thresholds->size; i++) {
3513 if (thresholds->entries[i].eventfd == eventfd)
3514 continue;
3515
3516 thresholds_new->entries[j] = thresholds->entries[i];
3517 if (thresholds_new->entries[j].threshold < usage) {
3518 /*
3519 * thresholds_new->current_threshold will not be used
3520 * until rcu_assign_pointer(), so it's safe to increment
3521 * it here.
3522 */
3523 atomic_inc(&thresholds_new->current_threshold);
3524 }
3525 j++;
3526 }
3527
3528assign:
3529 if (type == _MEM)
3530 rcu_assign_pointer(memcg->thresholds, thresholds_new);
3531 else
3532 rcu_assign_pointer(memcg->memsw_thresholds, thresholds_new);
3533
3534 /* To be sure that nobody uses thresholds before freeing it */
3535 synchronize_rcu();
3536
3537 kfree(thresholds);
3538unlock:
3539 mutex_unlock(&memcg->thresholds_lock);
3540
3541 return ret;
3542}
3052 3543
3053static struct cftype mem_cgroup_files[] = { 3544static struct cftype mem_cgroup_files[] = {
3054 { 3545 {
3055 .name = "usage_in_bytes", 3546 .name = "usage_in_bytes",
3056 .private = MEMFILE_PRIVATE(_MEM, RES_USAGE), 3547 .private = MEMFILE_PRIVATE(_MEM, RES_USAGE),
3057 .read_u64 = mem_cgroup_read, 3548 .read_u64 = mem_cgroup_read,
3549 .register_event = mem_cgroup_register_event,
3550 .unregister_event = mem_cgroup_unregister_event,
3058 }, 3551 },
3059 { 3552 {
3060 .name = "max_usage_in_bytes", 3553 .name = "max_usage_in_bytes",
@@ -3098,6 +3591,11 @@ static struct cftype mem_cgroup_files[] = {
3098 .read_u64 = mem_cgroup_swappiness_read, 3591 .read_u64 = mem_cgroup_swappiness_read,
3099 .write_u64 = mem_cgroup_swappiness_write, 3592 .write_u64 = mem_cgroup_swappiness_write,
3100 }, 3593 },
3594 {
3595 .name = "move_charge_at_immigrate",
3596 .read_u64 = mem_cgroup_move_charge_read,
3597 .write_u64 = mem_cgroup_move_charge_write,
3598 },
3101}; 3599};
3102 3600
3103#ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP 3601#ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP
@@ -3106,6 +3604,8 @@ static struct cftype memsw_cgroup_files[] = {
3106 .name = "memsw.usage_in_bytes", 3604 .name = "memsw.usage_in_bytes",
3107 .private = MEMFILE_PRIVATE(_MEMSWAP, RES_USAGE), 3605 .private = MEMFILE_PRIVATE(_MEMSWAP, RES_USAGE),
3108 .read_u64 = mem_cgroup_read, 3606 .read_u64 = mem_cgroup_read,
3607 .register_event = mem_cgroup_register_event,
3608 .unregister_event = mem_cgroup_unregister_event,
3109 }, 3609 },
3110 { 3610 {
3111 .name = "memsw.max_usage_in_bytes", 3611 .name = "memsw.max_usage_in_bytes",
@@ -3180,17 +3680,12 @@ static void free_mem_cgroup_per_zone_info(struct mem_cgroup *mem, int node)
3180 kfree(mem->info.nodeinfo[node]); 3680 kfree(mem->info.nodeinfo[node]);
3181} 3681}
3182 3682
3183static int mem_cgroup_size(void)
3184{
3185 int cpustat_size = nr_cpu_ids * sizeof(struct mem_cgroup_stat_cpu);
3186 return sizeof(struct mem_cgroup) + cpustat_size;
3187}
3188
3189static struct mem_cgroup *mem_cgroup_alloc(void) 3683static struct mem_cgroup *mem_cgroup_alloc(void)
3190{ 3684{
3191 struct mem_cgroup *mem; 3685 struct mem_cgroup *mem;
3192 int size = mem_cgroup_size(); 3686 int size = sizeof(struct mem_cgroup);
3193 3687
3688 /* Can be very big if MAX_NUMNODES is very big */
3194 if (size < PAGE_SIZE) 3689 if (size < PAGE_SIZE)
3195 mem = kmalloc(size, GFP_KERNEL); 3690 mem = kmalloc(size, GFP_KERNEL);
3196 else 3691 else
@@ -3198,6 +3693,14 @@ static struct mem_cgroup *mem_cgroup_alloc(void)
3198 3693
3199 if (mem) 3694 if (mem)
3200 memset(mem, 0, size); 3695 memset(mem, 0, size);
3696 mem->stat = alloc_percpu(struct mem_cgroup_stat_cpu);
3697 if (!mem->stat) {
3698 if (size < PAGE_SIZE)
3699 kfree(mem);
3700 else
3701 vfree(mem);
3702 mem = NULL;
3703 }
3201 return mem; 3704 return mem;
3202} 3705}
3203 3706
@@ -3222,7 +3725,8 @@ static void __mem_cgroup_free(struct mem_cgroup *mem)
3222 for_each_node_state(node, N_POSSIBLE) 3725 for_each_node_state(node, N_POSSIBLE)
3223 free_mem_cgroup_per_zone_info(mem, node); 3726 free_mem_cgroup_per_zone_info(mem, node);
3224 3727
3225 if (mem_cgroup_size() < PAGE_SIZE) 3728 free_percpu(mem->stat);
3729 if (sizeof(struct mem_cgroup) < PAGE_SIZE)
3226 kfree(mem); 3730 kfree(mem);
3227 else 3731 else
3228 vfree(mem); 3732 vfree(mem);
@@ -3233,9 +3737,9 @@ static void mem_cgroup_get(struct mem_cgroup *mem)
3233 atomic_inc(&mem->refcnt); 3737 atomic_inc(&mem->refcnt);
3234} 3738}
3235 3739
3236static void mem_cgroup_put(struct mem_cgroup *mem) 3740static void __mem_cgroup_put(struct mem_cgroup *mem, int count)
3237{ 3741{
3238 if (atomic_dec_and_test(&mem->refcnt)) { 3742 if (atomic_sub_and_test(count, &mem->refcnt)) {
3239 struct mem_cgroup *parent = parent_mem_cgroup(mem); 3743 struct mem_cgroup *parent = parent_mem_cgroup(mem);
3240 __mem_cgroup_free(mem); 3744 __mem_cgroup_free(mem);
3241 if (parent) 3745 if (parent)
@@ -3243,6 +3747,11 @@ static void mem_cgroup_put(struct mem_cgroup *mem)
3243 } 3747 }
3244} 3748}
3245 3749
3750static void mem_cgroup_put(struct mem_cgroup *mem)
3751{
3752 __mem_cgroup_put(mem, 1);
3753}
3754
3246/* 3755/*
3247 * Returns the parent mem_cgroup in memcgroup hierarchy with hierarchy enabled. 3756 * Returns the parent mem_cgroup in memcgroup hierarchy with hierarchy enabled.
3248 */ 3757 */
@@ -3319,7 +3828,6 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
3319 INIT_WORK(&stock->work, drain_local_stock); 3828 INIT_WORK(&stock->work, drain_local_stock);
3320 } 3829 }
3321 hotcpu_notifier(memcg_stock_cpu_callback, 0); 3830 hotcpu_notifier(memcg_stock_cpu_callback, 0);
3322
3323 } else { 3831 } else {
3324 parent = mem_cgroup_from_cont(cont->parent); 3832 parent = mem_cgroup_from_cont(cont->parent);
3325 mem->use_hierarchy = parent->use_hierarchy; 3833 mem->use_hierarchy = parent->use_hierarchy;
@@ -3345,6 +3853,8 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
3345 if (parent) 3853 if (parent)
3346 mem->swappiness = get_swappiness(parent); 3854 mem->swappiness = get_swappiness(parent);
3347 atomic_set(&mem->refcnt, 1); 3855 atomic_set(&mem->refcnt, 1);
3856 mem->move_charge_at_immigrate = 0;
3857 mutex_init(&mem->thresholds_lock);
3348 return &mem->css; 3858 return &mem->css;
3349free_out: 3859free_out:
3350 __mem_cgroup_free(mem); 3860 __mem_cgroup_free(mem);
@@ -3381,16 +3891,444 @@ static int mem_cgroup_populate(struct cgroup_subsys *ss,
3381 return ret; 3891 return ret;
3382} 3892}
3383 3893
3894#ifdef CONFIG_MMU
3895/* Handlers for move charge at task migration. */
3896#define PRECHARGE_COUNT_AT_ONCE 256
3897static int mem_cgroup_do_precharge(unsigned long count)
3898{
3899 int ret = 0;
3900 int batch_count = PRECHARGE_COUNT_AT_ONCE;
3901 struct mem_cgroup *mem = mc.to;
3902
3903 if (mem_cgroup_is_root(mem)) {
3904 mc.precharge += count;
3905 /* we don't need css_get for root */
3906 return ret;
3907 }
3908 /* try to charge at once */
3909 if (count > 1) {
3910 struct res_counter *dummy;
3911 /*
3912 * "mem" cannot be under rmdir() because we've already checked
3913 * by cgroup_lock_live_cgroup() that it is not removed and we
3914 * are still under the same cgroup_mutex. So we can postpone
3915 * css_get().
3916 */
3917 if (res_counter_charge(&mem->res, PAGE_SIZE * count, &dummy))
3918 goto one_by_one;
3919 if (do_swap_account && res_counter_charge(&mem->memsw,
3920 PAGE_SIZE * count, &dummy)) {
3921 res_counter_uncharge(&mem->res, PAGE_SIZE * count);
3922 goto one_by_one;
3923 }
3924 mc.precharge += count;
3925 VM_BUG_ON(test_bit(CSS_ROOT, &mem->css.flags));
3926 WARN_ON_ONCE(count > INT_MAX);
3927 __css_get(&mem->css, (int)count);
3928 return ret;
3929 }
3930one_by_one:
3931 /* fall back to one by one charge */
3932 while (count--) {
3933 if (signal_pending(current)) {
3934 ret = -EINTR;
3935 break;
3936 }
3937 if (!batch_count--) {
3938 batch_count = PRECHARGE_COUNT_AT_ONCE;
3939 cond_resched();
3940 }
3941 ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false);
3942 if (ret || !mem)
3943 /* mem_cgroup_clear_mc() will do uncharge later */
3944 return -ENOMEM;
3945 mc.precharge++;
3946 }
3947 return ret;
3948}
3949#else /* !CONFIG_MMU */
3950static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
3951 struct cgroup *cgroup,
3952 struct task_struct *p,
3953 bool threadgroup)
3954{
3955 return 0;
3956}
3957static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss,
3958 struct cgroup *cgroup,
3959 struct task_struct *p,
3960 bool threadgroup)
3961{
3962}
3384static void mem_cgroup_move_task(struct cgroup_subsys *ss, 3963static void mem_cgroup_move_task(struct cgroup_subsys *ss,
3385 struct cgroup *cont, 3964 struct cgroup *cont,
3386 struct cgroup *old_cont, 3965 struct cgroup *old_cont,
3387 struct task_struct *p, 3966 struct task_struct *p,
3388 bool threadgroup) 3967 bool threadgroup)
3389{ 3968{
3969}
3970#endif
3971
3972/**
3973 * is_target_pte_for_mc - check a pte whether it is valid for move charge
3974 * @vma: the vma the pte to be checked belongs
3975 * @addr: the address corresponding to the pte to be checked
3976 * @ptent: the pte to be checked
3977 * @target: the pointer the target page or swap ent will be stored(can be NULL)
3978 *
3979 * Returns
3980 * 0(MC_TARGET_NONE): if the pte is not a target for move charge.
3981 * 1(MC_TARGET_PAGE): if the page corresponding to this pte is a target for
3982 * move charge. if @target is not NULL, the page is stored in target->page
3983 * with extra refcnt got(Callers should handle it).
3984 * 2(MC_TARGET_SWAP): if the swap entry corresponding to this pte is a
3985 * target for charge migration. if @target is not NULL, the entry is stored
3986 * in target->ent.
3987 *
3988 * Called with pte lock held.
3989 */
3990union mc_target {
3991 struct page *page;
3992 swp_entry_t ent;
3993};
3994
3995enum mc_target_type {
3996 MC_TARGET_NONE, /* not used */
3997 MC_TARGET_PAGE,
3998 MC_TARGET_SWAP,
3999};
4000
4001static int is_target_pte_for_mc(struct vm_area_struct *vma,
4002 unsigned long addr, pte_t ptent, union mc_target *target)
4003{
4004 struct page *page = NULL;
4005 struct page_cgroup *pc;
4006 int ret = 0;
4007 swp_entry_t ent = { .val = 0 };
4008 int usage_count = 0;
4009 bool move_anon = test_bit(MOVE_CHARGE_TYPE_ANON,
4010 &mc.to->move_charge_at_immigrate);
4011
4012 if (!pte_present(ptent)) {
4013 /* TODO: handle swap of shmes/tmpfs */
4014 if (pte_none(ptent) || pte_file(ptent))
4015 return 0;
4016 else if (is_swap_pte(ptent)) {
4017 ent = pte_to_swp_entry(ptent);
4018 if (!move_anon || non_swap_entry(ent))
4019 return 0;
4020 usage_count = mem_cgroup_count_swap_user(ent, &page);
4021 }
4022 } else {
4023 page = vm_normal_page(vma, addr, ptent);
4024 if (!page || !page_mapped(page))
4025 return 0;
4026 /*
4027 * TODO: We don't move charges of file(including shmem/tmpfs)
4028 * pages for now.
4029 */
4030 if (!move_anon || !PageAnon(page))
4031 return 0;
4032 if (!get_page_unless_zero(page))
4033 return 0;
4034 usage_count = page_mapcount(page);
4035 }
4036 if (usage_count > 1) {
4037 /*
4038 * TODO: We don't move charges of shared(used by multiple
4039 * processes) pages for now.
4040 */
4041 if (page)
4042 put_page(page);
4043 return 0;
4044 }
4045 if (page) {
4046 pc = lookup_page_cgroup(page);
4047 /*
4048 * Do only loose check w/o page_cgroup lock.
4049 * mem_cgroup_move_account() checks the pc is valid or not under
4050 * the lock.
4051 */
4052 if (PageCgroupUsed(pc) && pc->mem_cgroup == mc.from) {
4053 ret = MC_TARGET_PAGE;
4054 if (target)
4055 target->page = page;
4056 }
4057 if (!ret || !target)
4058 put_page(page);
4059 }
4060 /* throught */
4061 if (ent.val && do_swap_account && !ret &&
4062 css_id(&mc.from->css) == lookup_swap_cgroup(ent)) {
4063 ret = MC_TARGET_SWAP;
4064 if (target)
4065 target->ent = ent;
4066 }
4067 return ret;
4068}
4069
4070static int mem_cgroup_count_precharge_pte_range(pmd_t *pmd,
4071 unsigned long addr, unsigned long end,
4072 struct mm_walk *walk)
4073{
4074 struct vm_area_struct *vma = walk->private;
4075 pte_t *pte;
4076 spinlock_t *ptl;
4077
4078 pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
4079 for (; addr != end; pte++, addr += PAGE_SIZE)
4080 if (is_target_pte_for_mc(vma, addr, *pte, NULL))
4081 mc.precharge++; /* increment precharge temporarily */
4082 pte_unmap_unlock(pte - 1, ptl);
4083 cond_resched();
4084
4085 return 0;
4086}
4087
4088static unsigned long mem_cgroup_count_precharge(struct mm_struct *mm)
4089{
4090 unsigned long precharge;
4091 struct vm_area_struct *vma;
4092
4093 down_read(&mm->mmap_sem);
4094 for (vma = mm->mmap; vma; vma = vma->vm_next) {
4095 struct mm_walk mem_cgroup_count_precharge_walk = {
4096 .pmd_entry = mem_cgroup_count_precharge_pte_range,
4097 .mm = mm,
4098 .private = vma,
4099 };
4100 if (is_vm_hugetlb_page(vma))
4101 continue;
4102 /* TODO: We don't move charges of shmem/tmpfs pages for now. */
4103 if (vma->vm_flags & VM_SHARED)
4104 continue;
4105 walk_page_range(vma->vm_start, vma->vm_end,
4106 &mem_cgroup_count_precharge_walk);
4107 }
4108 up_read(&mm->mmap_sem);
4109
4110 precharge = mc.precharge;
4111 mc.precharge = 0;
4112
4113 return precharge;
4114}
4115
4116static int mem_cgroup_precharge_mc(struct mm_struct *mm)
4117{
4118 return mem_cgroup_do_precharge(mem_cgroup_count_precharge(mm));
4119}
4120
4121static void mem_cgroup_clear_mc(void)
4122{
4123 /* we must uncharge all the leftover precharges from mc.to */
4124 if (mc.precharge) {
4125 __mem_cgroup_cancel_charge(mc.to, mc.precharge);
4126 mc.precharge = 0;
4127 }
3390 /* 4128 /*
3391 * FIXME: It's better to move charges of this process from old 4129 * we didn't uncharge from mc.from at mem_cgroup_move_account(), so
3392 * memcg to new memcg. But it's just on TODO-List now. 4130 * we must uncharge here.
3393 */ 4131 */
4132 if (mc.moved_charge) {
4133 __mem_cgroup_cancel_charge(mc.from, mc.moved_charge);
4134 mc.moved_charge = 0;
4135 }
4136 /* we must fixup refcnts and charges */
4137 if (mc.moved_swap) {
4138 WARN_ON_ONCE(mc.moved_swap > INT_MAX);
4139 /* uncharge swap account from the old cgroup */
4140 if (!mem_cgroup_is_root(mc.from))
4141 res_counter_uncharge(&mc.from->memsw,
4142 PAGE_SIZE * mc.moved_swap);
4143 __mem_cgroup_put(mc.from, mc.moved_swap);
4144
4145 if (!mem_cgroup_is_root(mc.to)) {
4146 /*
4147 * we charged both to->res and to->memsw, so we should
4148 * uncharge to->res.
4149 */
4150 res_counter_uncharge(&mc.to->res,
4151 PAGE_SIZE * mc.moved_swap);
4152 VM_BUG_ON(test_bit(CSS_ROOT, &mc.to->css.flags));
4153 __css_put(&mc.to->css, mc.moved_swap);
4154 }
4155 /* we've already done mem_cgroup_get(mc.to) */
4156
4157 mc.moved_swap = 0;
4158 }
4159 mc.from = NULL;
4160 mc.to = NULL;
4161 mc.moving_task = NULL;
4162 wake_up_all(&mc.waitq);
4163}
4164
4165static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
4166 struct cgroup *cgroup,
4167 struct task_struct *p,
4168 bool threadgroup)
4169{
4170 int ret = 0;
4171 struct mem_cgroup *mem = mem_cgroup_from_cont(cgroup);
4172
4173 if (mem->move_charge_at_immigrate) {
4174 struct mm_struct *mm;
4175 struct mem_cgroup *from = mem_cgroup_from_task(p);
4176
4177 VM_BUG_ON(from == mem);
4178
4179 mm = get_task_mm(p);
4180 if (!mm)
4181 return 0;
4182 /* We move charges only when we move a owner of the mm */
4183 if (mm->owner == p) {
4184 VM_BUG_ON(mc.from);
4185 VM_BUG_ON(mc.to);
4186 VM_BUG_ON(mc.precharge);
4187 VM_BUG_ON(mc.moved_charge);
4188 VM_BUG_ON(mc.moved_swap);
4189 VM_BUG_ON(mc.moving_task);
4190 mc.from = from;
4191 mc.to = mem;
4192 mc.precharge = 0;
4193 mc.moved_charge = 0;
4194 mc.moved_swap = 0;
4195 mc.moving_task = current;
4196
4197 ret = mem_cgroup_precharge_mc(mm);
4198 if (ret)
4199 mem_cgroup_clear_mc();
4200 }
4201 mmput(mm);
4202 }
4203 return ret;
4204}
4205
4206static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss,
4207 struct cgroup *cgroup,
4208 struct task_struct *p,
4209 bool threadgroup)
4210{
4211 mem_cgroup_clear_mc();
4212}
4213
4214static int mem_cgroup_move_charge_pte_range(pmd_t *pmd,
4215 unsigned long addr, unsigned long end,
4216 struct mm_walk *walk)
4217{
4218 int ret = 0;
4219 struct vm_area_struct *vma = walk->private;
4220 pte_t *pte;
4221 spinlock_t *ptl;
4222
4223retry:
4224 pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
4225 for (; addr != end; addr += PAGE_SIZE) {
4226 pte_t ptent = *(pte++);
4227 union mc_target target;
4228 int type;
4229 struct page *page;
4230 struct page_cgroup *pc;
4231 swp_entry_t ent;
4232
4233 if (!mc.precharge)
4234 break;
4235
4236 type = is_target_pte_for_mc(vma, addr, ptent, &target);
4237 switch (type) {
4238 case MC_TARGET_PAGE:
4239 page = target.page;
4240 if (isolate_lru_page(page))
4241 goto put;
4242 pc = lookup_page_cgroup(page);
4243 if (!mem_cgroup_move_account(pc,
4244 mc.from, mc.to, false)) {
4245 mc.precharge--;
4246 /* we uncharge from mc.from later. */
4247 mc.moved_charge++;
4248 }
4249 putback_lru_page(page);
4250put: /* is_target_pte_for_mc() gets the page */
4251 put_page(page);
4252 break;
4253 case MC_TARGET_SWAP:
4254 ent = target.ent;
4255 if (!mem_cgroup_move_swap_account(ent,
4256 mc.from, mc.to, false)) {
4257 mc.precharge--;
4258 /* we fixup refcnts and charges later. */
4259 mc.moved_swap++;
4260 }
4261 break;
4262 default:
4263 break;
4264 }
4265 }
4266 pte_unmap_unlock(pte - 1, ptl);
4267 cond_resched();
4268
4269 if (addr != end) {
4270 /*
4271 * We have consumed all precharges we got in can_attach().
4272 * We try charge one by one, but don't do any additional
4273 * charges to mc.to if we have failed in charge once in attach()
4274 * phase.
4275 */
4276 ret = mem_cgroup_do_precharge(1);
4277 if (!ret)
4278 goto retry;
4279 }
4280
4281 return ret;
4282}
4283
4284static void mem_cgroup_move_charge(struct mm_struct *mm)
4285{
4286 struct vm_area_struct *vma;
4287
4288 lru_add_drain_all();
4289 down_read(&mm->mmap_sem);
4290 for (vma = mm->mmap; vma; vma = vma->vm_next) {
4291 int ret;
4292 struct mm_walk mem_cgroup_move_charge_walk = {
4293 .pmd_entry = mem_cgroup_move_charge_pte_range,
4294 .mm = mm,
4295 .private = vma,
4296 };
4297 if (is_vm_hugetlb_page(vma))
4298 continue;
4299 /* TODO: We don't move charges of shmem/tmpfs pages for now. */
4300 if (vma->vm_flags & VM_SHARED)
4301 continue;
4302 ret = walk_page_range(vma->vm_start, vma->vm_end,
4303 &mem_cgroup_move_charge_walk);
4304 if (ret)
4305 /*
4306 * means we have consumed all precharges and failed in
4307 * doing additional charge. Just abandon here.
4308 */
4309 break;
4310 }
4311 up_read(&mm->mmap_sem);
4312}
4313
4314static void mem_cgroup_move_task(struct cgroup_subsys *ss,
4315 struct cgroup *cont,
4316 struct cgroup *old_cont,
4317 struct task_struct *p,
4318 bool threadgroup)
4319{
4320 struct mm_struct *mm;
4321
4322 if (!mc.to)
4323 /* no need to move charge */
4324 return;
4325
4326 mm = get_task_mm(p);
4327 if (mm) {
4328 mem_cgroup_move_charge(mm);
4329 mmput(mm);
4330 }
4331 mem_cgroup_clear_mc();
3394} 4332}
3395 4333
3396struct cgroup_subsys mem_cgroup_subsys = { 4334struct cgroup_subsys mem_cgroup_subsys = {
@@ -3400,6 +4338,8 @@ struct cgroup_subsys mem_cgroup_subsys = {
3400 .pre_destroy = mem_cgroup_pre_destroy, 4338 .pre_destroy = mem_cgroup_pre_destroy,
3401 .destroy = mem_cgroup_destroy, 4339 .destroy = mem_cgroup_destroy,
3402 .populate = mem_cgroup_populate, 4340 .populate = mem_cgroup_populate,
4341 .can_attach = mem_cgroup_can_attach,
4342 .cancel_attach = mem_cgroup_cancel_attach,
3403 .attach = mem_cgroup_move_task, 4343 .attach = mem_cgroup_move_task,
3404 .early_init = 0, 4344 .early_init = 0,
3405 .use_id = 1, 4345 .use_id = 1,
diff --git a/mm/memory.c b/mm/memory.c
index d1153e37e9ba..5b7f2002e54b 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -190,9 +190,6 @@ static void check_sync_rss_stat(struct task_struct *task)
190{ 190{
191} 191}
192 192
193void sync_mm_rss(struct task_struct *task, struct mm_struct *mm)
194{
195}
196#endif 193#endif
197 194
198/* 195/*
@@ -512,12 +509,8 @@ static void print_bad_pte(struct vm_area_struct *vma, unsigned long addr,
512 "BUG: Bad page map in process %s pte:%08llx pmd:%08llx\n", 509 "BUG: Bad page map in process %s pte:%08llx pmd:%08llx\n",
513 current->comm, 510 current->comm,
514 (long long)pte_val(pte), (long long)pmd_val(*pmd)); 511 (long long)pte_val(pte), (long long)pmd_val(*pmd));
515 if (page) { 512 if (page)
516 printk(KERN_ALERT 513 dump_page(page);
517 "page:%p flags:%p count:%d mapcount:%d mapping:%p index:%lx\n",
518 page, (void *)page->flags, page_count(page),
519 page_mapcount(page), page->mapping, page->index);
520 }
521 printk(KERN_ALERT 514 printk(KERN_ALERT
522 "addr:%p vm_flags:%08lx anon_vma:%p mapping:%p index:%lx\n", 515 "addr:%p vm_flags:%08lx anon_vma:%p mapping:%p index:%lx\n",
523 (void *)addr, vma->vm_flags, vma->anon_vma, mapping, index); 516 (void *)addr, vma->vm_flags, vma->anon_vma, mapping, index);
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index 78e34e63c7b8..be211a582930 100644
--- a/mm/memory_hotplug.c
+++ b/mm/memory_hotplug.c
@@ -688,9 +688,9 @@ do_migrate_range(unsigned long start_pfn, unsigned long end_pfn)
688 if (page_count(page)) 688 if (page_count(page))
689 not_managed++; 689 not_managed++;
690#ifdef CONFIG_DEBUG_VM 690#ifdef CONFIG_DEBUG_VM
691 printk(KERN_INFO "removing from LRU failed" 691 printk(KERN_ALERT "removing pfn %lx from LRU failed\n",
692 " %lx/%d/%lx\n", 692 pfn);
693 pfn, page_count(page), page->flags); 693 dump_page(page);
694#endif 694#endif
695 } 695 }
696 } 696 }
diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index bda230e52acd..643f66e10187 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -1756,10 +1756,12 @@ struct mempolicy *__mpol_dup(struct mempolicy *old)
1756 1756
1757 if (!new) 1757 if (!new)
1758 return ERR_PTR(-ENOMEM); 1758 return ERR_PTR(-ENOMEM);
1759 rcu_read_lock();
1759 if (current_cpuset_is_being_rebound()) { 1760 if (current_cpuset_is_being_rebound()) {
1760 nodemask_t mems = cpuset_mems_allowed(current); 1761 nodemask_t mems = cpuset_mems_allowed(current);
1761 mpol_rebind_policy(old, &mems); 1762 mpol_rebind_policy(old, &mems);
1762 } 1763 }
1764 rcu_read_unlock();
1763 *new = *old; 1765 *new = *old;
1764 atomic_set(&new->refcnt, 1); 1766 atomic_set(&new->refcnt, 1);
1765 return new; 1767 return new;
diff --git a/mm/mmap.c b/mm/mmap.c
index f1b4448626bf..75557c639ad4 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -1088,6 +1088,30 @@ out:
1088 return retval; 1088 return retval;
1089} 1089}
1090 1090
1091#ifdef __ARCH_WANT_SYS_OLD_MMAP
1092struct mmap_arg_struct {
1093 unsigned long addr;
1094 unsigned long len;
1095 unsigned long prot;
1096 unsigned long flags;
1097 unsigned long fd;
1098 unsigned long offset;
1099};
1100
1101SYSCALL_DEFINE1(old_mmap, struct mmap_arg_struct __user *, arg)
1102{
1103 struct mmap_arg_struct a;
1104
1105 if (copy_from_user(&a, arg, sizeof(a)))
1106 return -EFAULT;
1107 if (a.offset & ~PAGE_MASK)
1108 return -EINVAL;
1109
1110 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
1111 a.offset >> PAGE_SHIFT);
1112}
1113#endif /* __ARCH_WANT_SYS_OLD_MMAP */
1114
1091/* 1115/*
1092 * Some shared mappigns will want the pages marked read-only 1116 * Some shared mappigns will want the pages marked read-only
1093 * to track write events. If so, we'll downgrade vm_page_prot 1117 * to track write events. If so, we'll downgrade vm_page_prot
diff --git a/mm/nommu.c b/mm/nommu.c
index b9b5cceb1b68..605ace8982a8 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -1428,6 +1428,30 @@ out:
1428 return retval; 1428 return retval;
1429} 1429}
1430 1430
1431#ifdef __ARCH_WANT_SYS_OLD_MMAP
1432struct mmap_arg_struct {
1433 unsigned long addr;
1434 unsigned long len;
1435 unsigned long prot;
1436 unsigned long flags;
1437 unsigned long fd;
1438 unsigned long offset;
1439};
1440
1441SYSCALL_DEFINE1(old_mmap, struct mmap_arg_struct __user *, arg)
1442{
1443 struct mmap_arg_struct a;
1444
1445 if (copy_from_user(&a, arg, sizeof(a)))
1446 return -EFAULT;
1447 if (a.offset & ~PAGE_MASK)
1448 return -EINVAL;
1449
1450 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
1451 a.offset >> PAGE_SHIFT);
1452}
1453#endif /* __ARCH_WANT_SYS_OLD_MMAP */
1454
1431/* 1455/*
1432 * split a vma into two pieces at address 'addr', a new vma is allocated either 1456 * split a vma into two pieces at address 'addr', a new vma is allocated either
1433 * for the first part or the tail. 1457 * for the first part or the tail.
diff --git a/mm/oom_kill.c b/mm/oom_kill.c
index 35755a4156d6..9b223af6a147 100644
--- a/mm/oom_kill.c
+++ b/mm/oom_kill.c
@@ -473,6 +473,8 @@ void mem_cgroup_out_of_memory(struct mem_cgroup *mem, gfp_t gfp_mask)
473 unsigned long points = 0; 473 unsigned long points = 0;
474 struct task_struct *p; 474 struct task_struct *p;
475 475
476 if (sysctl_panic_on_oom == 2)
477 panic("out of memory(memcg). panic_on_oom is selected.\n");
476 read_lock(&tasklist_lock); 478 read_lock(&tasklist_lock);
477retry: 479retry:
478 p = select_bad_process(&points, mem); 480 p = select_bad_process(&points, mem);
@@ -601,13 +603,6 @@ void pagefault_out_of_memory(void)
601 /* Got some memory back in the last second. */ 603 /* Got some memory back in the last second. */
602 return; 604 return;
603 605
604 /*
605 * If this is from memcg, oom-killer is already invoked.
606 * and not worth to go system-wide-oom.
607 */
608 if (mem_cgroup_oom_called(current))
609 goto rest_and_return;
610
611 if (sysctl_panic_on_oom) 606 if (sysctl_panic_on_oom)
612 panic("out of memory from page fault. panic_on_oom is selected.\n"); 607 panic("out of memory from page fault. panic_on_oom is selected.\n");
613 608
@@ -619,7 +614,6 @@ void pagefault_out_of_memory(void)
619 * Give "p" a good chance of killing itself before we 614 * Give "p" a good chance of killing itself before we
620 * retry to allocate memory. 615 * retry to allocate memory.
621 */ 616 */
622rest_and_return:
623 if (!test_thread_flag(TIF_MEMDIE)) 617 if (!test_thread_flag(TIF_MEMDIE))
624 schedule_timeout_uninterruptible(1); 618 schedule_timeout_uninterruptible(1);
625} 619}
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index a8182c89de59..d03c946d5566 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -50,6 +50,7 @@
50#include <linux/kmemleak.h> 50#include <linux/kmemleak.h>
51#include <linux/memory.h> 51#include <linux/memory.h>
52#include <trace/events/kmem.h> 52#include <trace/events/kmem.h>
53#include <linux/ftrace_event.h>
53 54
54#include <asm/tlbflush.h> 55#include <asm/tlbflush.h>
55#include <asm/div64.h> 56#include <asm/div64.h>
@@ -288,10 +289,7 @@ static void bad_page(struct page *page)
288 289
289 printk(KERN_ALERT "BUG: Bad page state in process %s pfn:%05lx\n", 290 printk(KERN_ALERT "BUG: Bad page state in process %s pfn:%05lx\n",
290 current->comm, page_to_pfn(page)); 291 current->comm, page_to_pfn(page));
291 printk(KERN_ALERT 292 dump_page(page);
292 "page:%p flags:%p count:%d mapcount:%d mapping:%p index:%lx\n",
293 page, (void *)page->flags, page_count(page),
294 page_mapcount(page), page->mapping, page->index);
295 293
296 dump_stack(); 294 dump_stack();
297out: 295out:
@@ -3224,7 +3222,7 @@ static int __zone_pcp_update(void *data)
3224 int cpu; 3222 int cpu;
3225 unsigned long batch = zone_batchsize(zone), flags; 3223 unsigned long batch = zone_batchsize(zone), flags;
3226 3224
3227 for (cpu = 0; cpu < NR_CPUS; cpu++) { 3225 for_each_possible_cpu(cpu) {
3228 struct per_cpu_pageset *pset; 3226 struct per_cpu_pageset *pset;
3229 struct per_cpu_pages *pcp; 3227 struct per_cpu_pages *pcp;
3230 3228
@@ -5183,3 +5181,80 @@ bool is_free_buddy_page(struct page *page)
5183 return order < MAX_ORDER; 5181 return order < MAX_ORDER;
5184} 5182}
5185#endif 5183#endif
5184
5185static struct trace_print_flags pageflag_names[] = {
5186 {1UL << PG_locked, "locked" },
5187 {1UL << PG_error, "error" },
5188 {1UL << PG_referenced, "referenced" },
5189 {1UL << PG_uptodate, "uptodate" },
5190 {1UL << PG_dirty, "dirty" },
5191 {1UL << PG_lru, "lru" },
5192 {1UL << PG_active, "active" },
5193 {1UL << PG_slab, "slab" },
5194 {1UL << PG_owner_priv_1, "owner_priv_1" },
5195 {1UL << PG_arch_1, "arch_1" },
5196 {1UL << PG_reserved, "reserved" },
5197 {1UL << PG_private, "private" },
5198 {1UL << PG_private_2, "private_2" },
5199 {1UL << PG_writeback, "writeback" },
5200#ifdef CONFIG_PAGEFLAGS_EXTENDED
5201 {1UL << PG_head, "head" },
5202 {1UL << PG_tail, "tail" },
5203#else
5204 {1UL << PG_compound, "compound" },
5205#endif
5206 {1UL << PG_swapcache, "swapcache" },
5207 {1UL << PG_mappedtodisk, "mappedtodisk" },
5208 {1UL << PG_reclaim, "reclaim" },
5209 {1UL << PG_buddy, "buddy" },
5210 {1UL << PG_swapbacked, "swapbacked" },
5211 {1UL << PG_unevictable, "unevictable" },
5212#ifdef CONFIG_MMU
5213 {1UL << PG_mlocked, "mlocked" },
5214#endif
5215#ifdef CONFIG_ARCH_USES_PG_UNCACHED
5216 {1UL << PG_uncached, "uncached" },
5217#endif
5218#ifdef CONFIG_MEMORY_FAILURE
5219 {1UL << PG_hwpoison, "hwpoison" },
5220#endif
5221 {-1UL, NULL },
5222};
5223
5224static void dump_page_flags(unsigned long flags)
5225{
5226 const char *delim = "";
5227 unsigned long mask;
5228 int i;
5229
5230 printk(KERN_ALERT "page flags: %#lx(", flags);
5231
5232 /* remove zone id */
5233 flags &= (1UL << NR_PAGEFLAGS) - 1;
5234
5235 for (i = 0; pageflag_names[i].name && flags; i++) {
5236
5237 mask = pageflag_names[i].mask;
5238 if ((flags & mask) != mask)
5239 continue;
5240
5241 flags &= ~mask;
5242 printk("%s%s", delim, pageflag_names[i].name);
5243 delim = "|";
5244 }
5245
5246 /* check for left over flags */
5247 if (flags)
5248 printk("%s%#lx", delim, flags);
5249
5250 printk(")\n");
5251}
5252
5253void dump_page(struct page *page)
5254{
5255 printk(KERN_ALERT
5256 "page:%p count:%d mapcount:%d mapping:%p index:%#lx\n",
5257 page, page_count(page), page_mapcount(page),
5258 page->mapping, page->index);
5259 dump_page_flags(page->flags);
5260}
diff --git a/mm/page_cgroup.c b/mm/page_cgroup.c
index 3d535d594826..3dd88539a0e6 100644
--- a/mm/page_cgroup.c
+++ b/mm/page_cgroup.c
@@ -335,6 +335,37 @@ not_enough_page:
335} 335}
336 336
337/** 337/**
338 * swap_cgroup_cmpxchg - cmpxchg mem_cgroup's id for this swp_entry.
339 * @end: swap entry to be cmpxchged
340 * @old: old id
341 * @new: new id
342 *
343 * Returns old id at success, 0 at failure.
344 * (There is no mem_cgroup useing 0 as its id)
345 */
346unsigned short swap_cgroup_cmpxchg(swp_entry_t ent,
347 unsigned short old, unsigned short new)
348{
349 int type = swp_type(ent);
350 unsigned long offset = swp_offset(ent);
351 unsigned long idx = offset / SC_PER_PAGE;
352 unsigned long pos = offset & SC_POS_MASK;
353 struct swap_cgroup_ctrl *ctrl;
354 struct page *mappage;
355 struct swap_cgroup *sc;
356
357 ctrl = &swap_cgroup_ctrl[type];
358
359 mappage = ctrl->map[idx];
360 sc = page_address(mappage);
361 sc += pos;
362 if (cmpxchg(&sc->id, old, new) == old)
363 return old;
364 else
365 return 0;
366}
367
368/**
338 * swap_cgroup_record - record mem_cgroup for this swp_entry. 369 * swap_cgroup_record - record mem_cgroup for this swp_entry.
339 * @ent: swap entry to be recorded into 370 * @ent: swap entry to be recorded into
340 * @mem: mem_cgroup to be recorded 371 * @mem: mem_cgroup to be recorded
@@ -358,8 +389,7 @@ unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id)
358 mappage = ctrl->map[idx]; 389 mappage = ctrl->map[idx];
359 sc = page_address(mappage); 390 sc = page_address(mappage);
360 sc += pos; 391 sc += pos;
361 old = sc->id; 392 old = xchg(&sc->id, id);
362 sc->id = id;
363 393
364 return old; 394 return old;
365} 395}
diff --git a/mm/slub.c b/mm/slub.c
index 0bfd3863d521..b364844a1068 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -2960,7 +2960,7 @@ static void slab_mem_offline_callback(void *arg)
2960 /* 2960 /*
2961 * if n->nr_slabs > 0, slabs still exist on the node 2961 * if n->nr_slabs > 0, slabs still exist on the node
2962 * that is going down. We were unable to free them, 2962 * that is going down. We were unable to free them,
2963 * and offline_pages() function shoudn't call this 2963 * and offline_pages() function shouldn't call this
2964 * callback. So, we must fail. 2964 * callback. So, we must fail.
2965 */ 2965 */
2966 BUG_ON(slabs_node(s, offline_node)); 2966 BUG_ON(slabs_node(s, offline_node));
@@ -4390,7 +4390,7 @@ static void kmem_cache_release(struct kobject *kobj)
4390 kfree(s); 4390 kfree(s);
4391} 4391}
4392 4392
4393static struct sysfs_ops slab_sysfs_ops = { 4393static const struct sysfs_ops slab_sysfs_ops = {
4394 .show = slab_attr_show, 4394 .show = slab_attr_show,
4395 .store = slab_attr_store, 4395 .store = slab_attr_store,
4396}; 4396};
@@ -4409,7 +4409,7 @@ static int uevent_filter(struct kset *kset, struct kobject *kobj)
4409 return 0; 4409 return 0;
4410} 4410}
4411 4411
4412static struct kset_uevent_ops slab_uevent_ops = { 4412static const struct kset_uevent_ops slab_uevent_ops = {
4413 .filter = uevent_filter, 4413 .filter = uevent_filter,
4414}; 4414};
4415 4415
diff --git a/mm/swapfile.c b/mm/swapfile.c
index 84374d8cf814..6cd0a8f90dc7 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -723,6 +723,37 @@ int free_swap_and_cache(swp_entry_t entry)
723 return p != NULL; 723 return p != NULL;
724} 724}
725 725
726#ifdef CONFIG_CGROUP_MEM_RES_CTLR
727/**
728 * mem_cgroup_count_swap_user - count the user of a swap entry
729 * @ent: the swap entry to be checked
730 * @pagep: the pointer for the swap cache page of the entry to be stored
731 *
732 * Returns the number of the user of the swap entry. The number is valid only
733 * for swaps of anonymous pages.
734 * If the entry is found on swap cache, the page is stored to pagep with
735 * refcount of it being incremented.
736 */
737int mem_cgroup_count_swap_user(swp_entry_t ent, struct page **pagep)
738{
739 struct page *page;
740 struct swap_info_struct *p;
741 int count = 0;
742
743 page = find_get_page(&swapper_space, ent.val);
744 if (page)
745 count += page_mapcount(page);
746 p = swap_info_get(ent);
747 if (p) {
748 count += swap_count(p->swap_map[swp_offset(ent)]);
749 spin_unlock(&swap_lock);
750 }
751
752 *pagep = page;
753 return count;
754}
755#endif
756
726#ifdef CONFIG_HIBERNATION 757#ifdef CONFIG_HIBERNATION
727/* 758/*
728 * Find the swap type that corresponds to given device (if any). 759 * Find the swap type that corresponds to given device (if any).
diff --git a/net/9p/client.c b/net/9p/client.c
index bde9f3d38c57..e3e5bf4469ce 100644
--- a/net/9p/client.c
+++ b/net/9p/client.c
@@ -60,7 +60,7 @@ static const match_table_t tokens = {
60 60
61inline int p9_is_proto_dotl(struct p9_client *clnt) 61inline int p9_is_proto_dotl(struct p9_client *clnt)
62{ 62{
63 return (clnt->proto_version == p9_proto_2010L); 63 return (clnt->proto_version == p9_proto_2000L);
64} 64}
65EXPORT_SYMBOL(p9_is_proto_dotl); 65EXPORT_SYMBOL(p9_is_proto_dotl);
66 66
@@ -80,9 +80,9 @@ static unsigned char get_protocol_version(const substring_t *name)
80 } else if (!strncmp("9p2000.u", name->from, name->to-name->from)) { 80 } else if (!strncmp("9p2000.u", name->from, name->to-name->from)) {
81 version = p9_proto_2000u; 81 version = p9_proto_2000u;
82 P9_DPRINTK(P9_DEBUG_9P, "Protocol version: 9P2000.u\n"); 82 P9_DPRINTK(P9_DEBUG_9P, "Protocol version: 9P2000.u\n");
83 } else if (!strncmp("9p2010.L", name->from, name->to-name->from)) { 83 } else if (!strncmp("9p2000.L", name->from, name->to-name->from)) {
84 version = p9_proto_2010L; 84 version = p9_proto_2000L;
85 P9_DPRINTK(P9_DEBUG_9P, "Protocol version: 9P2010.L\n"); 85 P9_DPRINTK(P9_DEBUG_9P, "Protocol version: 9P2000.L\n");
86 } else { 86 } else {
87 P9_DPRINTK(P9_DEBUG_ERROR, "Unknown protocol version %s. ", 87 P9_DPRINTK(P9_DEBUG_ERROR, "Unknown protocol version %s. ",
88 name->from); 88 name->from);
@@ -672,9 +672,9 @@ int p9_client_version(struct p9_client *c)
672 c->msize, c->proto_version); 672 c->msize, c->proto_version);
673 673
674 switch (c->proto_version) { 674 switch (c->proto_version) {
675 case p9_proto_2010L: 675 case p9_proto_2000L:
676 req = p9_client_rpc(c, P9_TVERSION, "ds", 676 req = p9_client_rpc(c, P9_TVERSION, "ds",
677 c->msize, "9P2010.L"); 677 c->msize, "9P2000.L");
678 break; 678 break;
679 case p9_proto_2000u: 679 case p9_proto_2000u:
680 req = p9_client_rpc(c, P9_TVERSION, "ds", 680 req = p9_client_rpc(c, P9_TVERSION, "ds",
@@ -700,8 +700,8 @@ int p9_client_version(struct p9_client *c)
700 } 700 }
701 701
702 P9_DPRINTK(P9_DEBUG_9P, "<<< RVERSION msize %d %s\n", msize, version); 702 P9_DPRINTK(P9_DEBUG_9P, "<<< RVERSION msize %d %s\n", msize, version);
703 if (!strncmp(version, "9P2010.L", 8)) 703 if (!strncmp(version, "9P2000.L", 8))
704 c->proto_version = p9_proto_2010L; 704 c->proto_version = p9_proto_2000L;
705 else if (!strncmp(version, "9P2000.u", 8)) 705 else if (!strncmp(version, "9P2000.u", 8))
706 c->proto_version = p9_proto_2000u; 706 c->proto_version = p9_proto_2000u;
707 else if (!strncmp(version, "9P2000", 6)) 707 else if (!strncmp(version, "9P2000", 6))
diff --git a/net/9p/trans_virtio.c b/net/9p/trans_virtio.c
index 0aaed4819379..afde1a89fbb3 100644
--- a/net/9p/trans_virtio.c
+++ b/net/9p/trans_virtio.c
@@ -78,6 +78,12 @@ struct virtio_chan {
78 /* Scatterlist: can be too big for stack. */ 78 /* Scatterlist: can be too big for stack. */
79 struct scatterlist sg[VIRTQUEUE_NUM]; 79 struct scatterlist sg[VIRTQUEUE_NUM];
80 80
81 int tag_len;
82 /*
83 * tag name to identify a mount Non-null terminated
84 */
85 char *tag;
86
81 struct list_head chan_list; 87 struct list_head chan_list;
82}; 88};
83 89
@@ -214,6 +220,20 @@ p9_virtio_request(struct p9_client *client, struct p9_req_t *req)
214 return 0; 220 return 0;
215} 221}
216 222
223static ssize_t p9_mount_tag_show(struct device *dev,
224 struct device_attribute *attr, char *buf)
225{
226 struct virtio_chan *chan;
227 struct virtio_device *vdev;
228
229 vdev = dev_to_virtio(dev);
230 chan = vdev->priv;
231
232 return snprintf(buf, chan->tag_len + 1, "%s", chan->tag);
233}
234
235static DEVICE_ATTR(mount_tag, 0444, p9_mount_tag_show, NULL);
236
217/** 237/**
218 * p9_virtio_probe - probe for existence of 9P virtio channels 238 * p9_virtio_probe - probe for existence of 9P virtio channels
219 * @vdev: virtio device to probe 239 * @vdev: virtio device to probe
@@ -224,6 +244,8 @@ p9_virtio_request(struct p9_client *client, struct p9_req_t *req)
224 244
225static int p9_virtio_probe(struct virtio_device *vdev) 245static int p9_virtio_probe(struct virtio_device *vdev)
226{ 246{
247 __u16 tag_len;
248 char *tag;
227 int err; 249 int err;
228 struct virtio_chan *chan; 250 struct virtio_chan *chan;
229 251
@@ -248,6 +270,28 @@ static int p9_virtio_probe(struct virtio_device *vdev)
248 sg_init_table(chan->sg, VIRTQUEUE_NUM); 270 sg_init_table(chan->sg, VIRTQUEUE_NUM);
249 271
250 chan->inuse = false; 272 chan->inuse = false;
273 if (virtio_has_feature(vdev, VIRTIO_9P_MOUNT_TAG)) {
274 vdev->config->get(vdev,
275 offsetof(struct virtio_9p_config, tag_len),
276 &tag_len, sizeof(tag_len));
277 } else {
278 err = -EINVAL;
279 goto out_free_vq;
280 }
281 tag = kmalloc(tag_len, GFP_KERNEL);
282 if (!tag) {
283 err = -ENOMEM;
284 goto out_free_vq;
285 }
286 vdev->config->get(vdev, offsetof(struct virtio_9p_config, tag),
287 tag, tag_len);
288 chan->tag = tag;
289 chan->tag_len = tag_len;
290 err = sysfs_create_file(&(vdev->dev.kobj), &dev_attr_mount_tag.attr);
291 if (err) {
292 kfree(tag);
293 goto out_free_vq;
294 }
251 mutex_lock(&virtio_9p_lock); 295 mutex_lock(&virtio_9p_lock);
252 list_add_tail(&chan->chan_list, &virtio_chan_list); 296 list_add_tail(&chan->chan_list, &virtio_chan_list);
253 mutex_unlock(&virtio_9p_lock); 297 mutex_unlock(&virtio_9p_lock);
@@ -284,7 +328,7 @@ p9_virtio_create(struct p9_client *client, const char *devname, char *args)
284 328
285 mutex_lock(&virtio_9p_lock); 329 mutex_lock(&virtio_9p_lock);
286 list_for_each_entry(chan, &virtio_chan_list, chan_list) { 330 list_for_each_entry(chan, &virtio_chan_list, chan_list) {
287 if (!strcmp(devname, dev_name(&chan->vdev->dev))) { 331 if (!strncmp(devname, chan->tag, chan->tag_len)) {
288 if (!chan->inuse) { 332 if (!chan->inuse) {
289 chan->inuse = true; 333 chan->inuse = true;
290 found = 1; 334 found = 1;
@@ -323,6 +367,8 @@ static void p9_virtio_remove(struct virtio_device *vdev)
323 mutex_lock(&virtio_9p_lock); 367 mutex_lock(&virtio_9p_lock);
324 list_del(&chan->chan_list); 368 list_del(&chan->chan_list);
325 mutex_unlock(&virtio_9p_lock); 369 mutex_unlock(&virtio_9p_lock);
370 sysfs_remove_file(&(vdev->dev.kobj), &dev_attr_mount_tag.attr);
371 kfree(chan->tag);
326 kfree(chan); 372 kfree(chan);
327 373
328} 374}
@@ -332,13 +378,19 @@ static struct virtio_device_id id_table[] = {
332 { 0 }, 378 { 0 },
333}; 379};
334 380
381static unsigned int features[] = {
382 VIRTIO_9P_MOUNT_TAG,
383};
384
335/* The standard "struct lguest_driver": */ 385/* The standard "struct lguest_driver": */
336static struct virtio_driver p9_virtio_drv = { 386static struct virtio_driver p9_virtio_drv = {
337 .driver.name = KBUILD_MODNAME, 387 .feature_table = features,
338 .driver.owner = THIS_MODULE, 388 .feature_table_size = ARRAY_SIZE(features),
339 .id_table = id_table, 389 .driver.name = KBUILD_MODNAME,
340 .probe = p9_virtio_probe, 390 .driver.owner = THIS_MODULE,
341 .remove = p9_virtio_remove, 391 .id_table = id_table,
392 .probe = p9_virtio_probe,
393 .remove = p9_virtio_remove,
342}; 394};
343 395
344static struct p9_trans_module p9_virtio_trans = { 396static struct p9_trans_module p9_virtio_trans = {
diff --git a/net/bluetooth/hci_sysfs.c b/net/bluetooth/hci_sysfs.c
index 1a79a6c7e30e..cafb55b0cea5 100644
--- a/net/bluetooth/hci_sysfs.c
+++ b/net/bluetooth/hci_sysfs.c
@@ -3,6 +3,7 @@
3#include <linux/kernel.h> 3#include <linux/kernel.h>
4#include <linux/init.h> 4#include <linux/init.h>
5#include <linux/debugfs.h> 5#include <linux/debugfs.h>
6#include <linux/seq_file.h>
6 7
7#include <net/bluetooth/bluetooth.h> 8#include <net/bluetooth/bluetooth.h>
8#include <net/bluetooth/hci_core.h> 9#include <net/bluetooth/hci_core.h>
@@ -405,20 +406,11 @@ static struct device_type bt_host = {
405 .release = bt_host_release, 406 .release = bt_host_release,
406}; 407};
407 408
408static int inquiry_cache_open(struct inode *inode, struct file *file) 409static int inquiry_cache_show(struct seq_file *f, void *p)
409{
410 file->private_data = inode->i_private;
411 return 0;
412}
413
414static ssize_t inquiry_cache_read(struct file *file, char __user *userbuf,
415 size_t count, loff_t *ppos)
416{ 410{
417 struct hci_dev *hdev = file->private_data; 411 struct hci_dev *hdev = f->private;
418 struct inquiry_cache *cache = &hdev->inq_cache; 412 struct inquiry_cache *cache = &hdev->inq_cache;
419 struct inquiry_entry *e; 413 struct inquiry_entry *e;
420 char buf[4096];
421 int n = 0;
422 414
423 hci_dev_lock_bh(hdev); 415 hci_dev_lock_bh(hdev);
424 416
@@ -426,23 +418,30 @@ static ssize_t inquiry_cache_read(struct file *file, char __user *userbuf,
426 struct inquiry_data *data = &e->data; 418 struct inquiry_data *data = &e->data;
427 bdaddr_t bdaddr; 419 bdaddr_t bdaddr;
428 baswap(&bdaddr, &data->bdaddr); 420 baswap(&bdaddr, &data->bdaddr);
429 n += sprintf(buf + n, "%s %d %d %d 0x%.2x%.2x%.2x 0x%.4x %d %d %u\n", 421 seq_printf(f, "%s %d %d %d 0x%.2x%.2x%.2x 0x%.4x %d %d %u\n",
430 batostr(&bdaddr), 422 batostr(&bdaddr),
431 data->pscan_rep_mode, data->pscan_period_mode, 423 data->pscan_rep_mode, data->pscan_period_mode,
432 data->pscan_mode, data->dev_class[2], 424 data->pscan_mode, data->dev_class[2],
433 data->dev_class[1], data->dev_class[0], 425 data->dev_class[1], data->dev_class[0],
434 __le16_to_cpu(data->clock_offset), 426 __le16_to_cpu(data->clock_offset),
435 data->rssi, data->ssp_mode, e->timestamp); 427 data->rssi, data->ssp_mode, e->timestamp);
436 } 428 }
437 429
438 hci_dev_unlock_bh(hdev); 430 hci_dev_unlock_bh(hdev);
439 431
440 return simple_read_from_buffer(userbuf, count, ppos, buf, n); 432 return 0;
433}
434
435static int inquiry_cache_open(struct inode *inode, struct file *file)
436{
437 return single_open(file, inquiry_cache_show, inode->i_private);
441} 438}
442 439
443static const struct file_operations inquiry_cache_fops = { 440static const struct file_operations inquiry_cache_fops = {
444 .open = inquiry_cache_open, 441 .open = inquiry_cache_open,
445 .read = inquiry_cache_read, 442 .read = seq_read,
443 .llseek = seq_lseek,
444 .release = single_release,
446}; 445};
447 446
448int hci_register_sysfs(struct hci_dev *hdev) 447int hci_register_sysfs(struct hci_dev *hdev)
diff --git a/net/bluetooth/l2cap.c b/net/bluetooth/l2cap.c
index 400efa26ddba..4db7ae2fe07d 100644
--- a/net/bluetooth/l2cap.c
+++ b/net/bluetooth/l2cap.c
@@ -3937,7 +3937,9 @@ drop:
3937 return 0; 3937 return 0;
3938} 3938}
3939 3939
3940static ssize_t l2cap_sysfs_show(struct class *dev, char *buf) 3940static ssize_t l2cap_sysfs_show(struct class *dev,
3941 struct class_attribute *attr,
3942 char *buf)
3941{ 3943{
3942 struct sock *sk; 3944 struct sock *sk;
3943 struct hlist_node *node; 3945 struct hlist_node *node;
diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c
index 89f4a59eb82b..db8a68e1a5ba 100644
--- a/net/bluetooth/rfcomm/core.c
+++ b/net/bluetooth/rfcomm/core.c
@@ -2098,7 +2098,9 @@ static struct hci_cb rfcomm_cb = {
2098 .security_cfm = rfcomm_security_cfm 2098 .security_cfm = rfcomm_security_cfm
2099}; 2099};
2100 2100
2101static ssize_t rfcomm_dlc_sysfs_show(struct class *dev, char *buf) 2101static ssize_t rfcomm_dlc_sysfs_show(struct class *dev,
2102 struct class_attribute *attr,
2103 char *buf)
2102{ 2104{
2103 struct rfcomm_session *s; 2105 struct rfcomm_session *s;
2104 struct list_head *pp, *p; 2106 struct list_head *pp, *p;
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
index 4b5968dda673..ca87d6ac6a20 100644
--- a/net/bluetooth/rfcomm/sock.c
+++ b/net/bluetooth/rfcomm/sock.c
@@ -1061,7 +1061,9 @@ done:
1061 return result; 1061 return result;
1062} 1062}
1063 1063
1064static ssize_t rfcomm_sock_sysfs_show(struct class *dev, char *buf) 1064static ssize_t rfcomm_sock_sysfs_show(struct class *dev,
1065 struct class_attribute *attr,
1066 char *buf)
1065{ 1067{
1066 struct sock *sk; 1068 struct sock *sk;
1067 struct hlist_node *node; 1069 struct hlist_node *node;
diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c
index dd8f6ec57dce..f93b939539bc 100644
--- a/net/bluetooth/sco.c
+++ b/net/bluetooth/sco.c
@@ -953,7 +953,9 @@ drop:
953 return 0; 953 return 0;
954} 954}
955 955
956static ssize_t sco_sysfs_show(struct class *dev, char *buf) 956static ssize_t sco_sysfs_show(struct class *dev,
957 struct class_attribute *attr,
958 char *buf)
957{ 959{
958 struct sock *sk; 960 struct sock *sk;
959 struct hlist_node *node; 961 struct hlist_node *node;
diff --git a/net/bridge/Kconfig b/net/bridge/Kconfig
index 19a6b9629c51..d115d5cea5b6 100644
--- a/net/bridge/Kconfig
+++ b/net/bridge/Kconfig
@@ -35,6 +35,7 @@ config BRIDGE
35config BRIDGE_IGMP_SNOOPING 35config BRIDGE_IGMP_SNOOPING
36 bool "IGMP snooping" 36 bool "IGMP snooping"
37 depends on BRIDGE 37 depends on BRIDGE
38 depends on INET
38 default y 39 default y
39 ---help--- 40 ---help---
40 If you say Y here, then the Ethernet bridge will be able selectively 41 If you say Y here, then the Ethernet bridge will be able selectively
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index 2559fb539836..fd96a8dc97f4 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -38,7 +38,7 @@ static struct net_bridge_mdb_entry *__br_mdb_ip_get(
38 struct net_bridge_mdb_entry *mp; 38 struct net_bridge_mdb_entry *mp;
39 struct hlist_node *p; 39 struct hlist_node *p;
40 40
41 hlist_for_each_entry(mp, p, &mdb->mhash[hash], hlist[mdb->ver]) { 41 hlist_for_each_entry_rcu(mp, p, &mdb->mhash[hash], hlist[mdb->ver]) {
42 if (dst == mp->addr) 42 if (dst == mp->addr)
43 return mp; 43 return mp;
44 } 44 }
@@ -627,8 +627,8 @@ static void br_multicast_port_query_expired(unsigned long data)
627 struct net_bridge *br = port->br; 627 struct net_bridge *br = port->br;
628 628
629 spin_lock(&br->multicast_lock); 629 spin_lock(&br->multicast_lock);
630 if (port && (port->state == BR_STATE_DISABLED || 630 if (port->state == BR_STATE_DISABLED ||
631 port->state == BR_STATE_BLOCKING)) 631 port->state == BR_STATE_BLOCKING)
632 goto out; 632 goto out;
633 633
634 if (port->multicast_startup_queries_sent < 634 if (port->multicast_startup_queries_sent <
@@ -823,6 +823,7 @@ static int br_multicast_query(struct net_bridge *br,
823 unsigned long max_delay; 823 unsigned long max_delay;
824 unsigned long now = jiffies; 824 unsigned long now = jiffies;
825 __be32 group; 825 __be32 group;
826 int err = 0;
826 827
827 spin_lock(&br->multicast_lock); 828 spin_lock(&br->multicast_lock);
828 if (!netif_running(br->dev) || 829 if (!netif_running(br->dev) ||
@@ -841,12 +842,14 @@ static int br_multicast_query(struct net_bridge *br,
841 group = 0; 842 group = 0;
842 } 843 }
843 } else { 844 } else {
844 if (!pskb_may_pull(skb, sizeof(struct igmpv3_query))) 845 if (!pskb_may_pull(skb, sizeof(struct igmpv3_query))) {
845 return -EINVAL; 846 err = -EINVAL;
847 goto out;
848 }
846 849
847 ih3 = igmpv3_query_hdr(skb); 850 ih3 = igmpv3_query_hdr(skb);
848 if (ih3->nsrcs) 851 if (ih3->nsrcs)
849 return 0; 852 goto out;
850 853
851 max_delay = ih3->code ? 1 : 854 max_delay = ih3->code ? 1 :
852 IGMPV3_MRC(ih3->code) * (HZ / IGMP_TIMER_SCALE); 855 IGMPV3_MRC(ih3->code) * (HZ / IGMP_TIMER_SCALE);
@@ -876,7 +879,7 @@ static int br_multicast_query(struct net_bridge *br,
876 879
877out: 880out:
878 spin_unlock(&br->multicast_lock); 881 spin_unlock(&br->multicast_lock);
879 return 0; 882 return err;
880} 883}
881 884
882static void br_multicast_leave_group(struct net_bridge *br, 885static void br_multicast_leave_group(struct net_bridge *br,
@@ -1135,7 +1138,7 @@ void br_multicast_stop(struct net_bridge *br)
1135 1138
1136 if (mdb->old) { 1139 if (mdb->old) {
1137 spin_unlock_bh(&br->multicast_lock); 1140 spin_unlock_bh(&br->multicast_lock);
1138 synchronize_rcu_bh(); 1141 rcu_barrier_bh();
1139 spin_lock_bh(&br->multicast_lock); 1142 spin_lock_bh(&br->multicast_lock);
1140 WARN_ON(mdb->old); 1143 WARN_ON(mdb->old);
1141 } 1144 }
diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h
index 1cf2cef78584..fef0384e3c0b 100644
--- a/net/bridge/br_private.h
+++ b/net/bridge/br_private.h
@@ -423,7 +423,7 @@ extern void br_ifinfo_notify(int event, struct net_bridge_port *port);
423 423
424#ifdef CONFIG_SYSFS 424#ifdef CONFIG_SYSFS
425/* br_sysfs_if.c */ 425/* br_sysfs_if.c */
426extern struct sysfs_ops brport_sysfs_ops; 426extern const struct sysfs_ops brport_sysfs_ops;
427extern int br_sysfs_addif(struct net_bridge_port *p); 427extern int br_sysfs_addif(struct net_bridge_port *p);
428 428
429/* br_sysfs_br.c */ 429/* br_sysfs_br.c */
diff --git a/net/bridge/br_sysfs_if.c b/net/bridge/br_sysfs_if.c
index 696596cd3384..0b9916489d6b 100644
--- a/net/bridge/br_sysfs_if.c
+++ b/net/bridge/br_sysfs_if.c
@@ -238,7 +238,7 @@ static ssize_t brport_store(struct kobject * kobj,
238 return ret; 238 return ret;
239} 239}
240 240
241struct sysfs_ops brport_sysfs_ops = { 241const struct sysfs_ops brport_sysfs_ops = {
242 .show = brport_show, 242 .show = brport_show,
243 .store = brport_store, 243 .store = brport_store,
244}; 244};
diff --git a/net/core/dev_mcast.c b/net/core/dev_mcast.c
index fd91569e2394..3dc295beb483 100644
--- a/net/core/dev_mcast.c
+++ b/net/core/dev_mcast.c
@@ -97,8 +97,9 @@ int dev_mc_add(struct net_device *dev, void *addr, int alen, int glbl)
97 97
98 netif_addr_lock_bh(dev); 98 netif_addr_lock_bh(dev);
99 if (alen != dev->addr_len) 99 if (alen != dev->addr_len)
100 return -EINVAL; 100 err = -EINVAL;
101 err = __dev_addr_add(&dev->mc_list, &dev->mc_count, addr, alen, glbl); 101 else
102 err = __dev_addr_add(&dev->mc_list, &dev->mc_count, addr, alen, glbl);
102 if (!err) 103 if (!err)
103 __dev_set_rx_mode(dev); 104 __dev_set_rx_mode(dev);
104 netif_addr_unlock_bh(dev); 105 netif_addr_unlock_bh(dev);
diff --git a/net/core/ethtool.c b/net/core/ethtool.c
index 0f2f82185ec4..f4cb6b6299d9 100644
--- a/net/core/ethtool.c
+++ b/net/core/ethtool.c
@@ -17,6 +17,7 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/ethtool.h> 18#include <linux/ethtool.h>
19#include <linux/netdevice.h> 19#include <linux/netdevice.h>
20#include <linux/bitops.h>
20#include <asm/uaccess.h> 21#include <asm/uaccess.h>
21 22
22/* 23/*
@@ -199,10 +200,7 @@ static int ethtool_set_settings(struct net_device *dev, void __user *useraddr)
199 return dev->ethtool_ops->set_settings(dev, &cmd); 200 return dev->ethtool_ops->set_settings(dev, &cmd);
200} 201}
201 202
202/* 203static noinline_for_stack int ethtool_get_drvinfo(struct net_device *dev, void __user *useraddr)
203 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool()
204 */
205static noinline int ethtool_get_drvinfo(struct net_device *dev, void __user *useraddr)
206{ 204{
207 struct ethtool_drvinfo info; 205 struct ethtool_drvinfo info;
208 const struct ethtool_ops *ops = dev->ethtool_ops; 206 const struct ethtool_ops *ops = dev->ethtool_ops;
@@ -214,6 +212,10 @@ static noinline int ethtool_get_drvinfo(struct net_device *dev, void __user *use
214 info.cmd = ETHTOOL_GDRVINFO; 212 info.cmd = ETHTOOL_GDRVINFO;
215 ops->get_drvinfo(dev, &info); 213 ops->get_drvinfo(dev, &info);
216 214
215 /*
216 * this method of obtaining string set info is deprecated;
217 * Use ETHTOOL_GSSET_INFO instead.
218 */
217 if (ops->get_sset_count) { 219 if (ops->get_sset_count) {
218 int rc; 220 int rc;
219 221
@@ -237,10 +239,67 @@ static noinline int ethtool_get_drvinfo(struct net_device *dev, void __user *use
237 return 0; 239 return 0;
238} 240}
239 241
240/* 242static noinline_for_stack int ethtool_get_sset_info(struct net_device *dev,
241 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool() 243 void __user *useraddr)
242 */ 244{
243static noinline int ethtool_set_rxnfc(struct net_device *dev, void __user *useraddr) 245 struct ethtool_sset_info info;
246 const struct ethtool_ops *ops = dev->ethtool_ops;
247 u64 sset_mask;
248 int i, idx = 0, n_bits = 0, ret, rc;
249 u32 *info_buf = NULL;
250
251 if (!ops->get_sset_count)
252 return -EOPNOTSUPP;
253
254 if (copy_from_user(&info, useraddr, sizeof(info)))
255 return -EFAULT;
256
257 /* store copy of mask, because we zero struct later on */
258 sset_mask = info.sset_mask;
259 if (!sset_mask)
260 return 0;
261
262 /* calculate size of return buffer */
263 n_bits = hweight64(sset_mask);
264
265 memset(&info, 0, sizeof(info));
266 info.cmd = ETHTOOL_GSSET_INFO;
267
268 info_buf = kzalloc(n_bits * sizeof(u32), GFP_USER);
269 if (!info_buf)
270 return -ENOMEM;
271
272 /*
273 * fill return buffer based on input bitmask and successful
274 * get_sset_count return
275 */
276 for (i = 0; i < 64; i++) {
277 if (!(sset_mask & (1ULL << i)))
278 continue;
279
280 rc = ops->get_sset_count(dev, i);
281 if (rc >= 0) {
282 info.sset_mask |= (1ULL << i);
283 info_buf[idx++] = rc;
284 }
285 }
286
287 ret = -EFAULT;
288 if (copy_to_user(useraddr, &info, sizeof(info)))
289 goto out;
290
291 useraddr += offsetof(struct ethtool_sset_info, data);
292 if (copy_to_user(useraddr, info_buf, idx * sizeof(u32)))
293 goto out;
294
295 ret = 0;
296
297out:
298 kfree(info_buf);
299 return ret;
300}
301
302static noinline_for_stack int ethtool_set_rxnfc(struct net_device *dev, void __user *useraddr)
244{ 303{
245 struct ethtool_rxnfc cmd; 304 struct ethtool_rxnfc cmd;
246 305
@@ -253,10 +312,7 @@ static noinline int ethtool_set_rxnfc(struct net_device *dev, void __user *usera
253 return dev->ethtool_ops->set_rxnfc(dev, &cmd); 312 return dev->ethtool_ops->set_rxnfc(dev, &cmd);
254} 313}
255 314
256/* 315static noinline_for_stack int ethtool_get_rxnfc(struct net_device *dev, void __user *useraddr)
257 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool()
258 */
259static noinline int ethtool_get_rxnfc(struct net_device *dev, void __user *useraddr)
260{ 316{
261 struct ethtool_rxnfc info; 317 struct ethtool_rxnfc info;
262 const struct ethtool_ops *ops = dev->ethtool_ops; 318 const struct ethtool_ops *ops = dev->ethtool_ops;
@@ -328,10 +384,7 @@ static void __rx_ntuple_filter_add(struct ethtool_rx_ntuple_list *list,
328 list->count++; 384 list->count++;
329} 385}
330 386
331/* 387static noinline_for_stack int ethtool_set_rx_ntuple(struct net_device *dev, void __user *useraddr)
332 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool()
333 */
334static noinline int ethtool_set_rx_ntuple(struct net_device *dev, void __user *useraddr)
335{ 388{
336 struct ethtool_rx_ntuple cmd; 389 struct ethtool_rx_ntuple cmd;
337 const struct ethtool_ops *ops = dev->ethtool_ops; 390 const struct ethtool_ops *ops = dev->ethtool_ops;
@@ -799,10 +852,7 @@ static int ethtool_set_eeprom(struct net_device *dev, void __user *useraddr)
799 return ret; 852 return ret;
800} 853}
801 854
802/* 855static noinline_for_stack int ethtool_get_coalesce(struct net_device *dev, void __user *useraddr)
803 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool()
804 */
805static noinline int ethtool_get_coalesce(struct net_device *dev, void __user *useraddr)
806{ 856{
807 struct ethtool_coalesce coalesce = { .cmd = ETHTOOL_GCOALESCE }; 857 struct ethtool_coalesce coalesce = { .cmd = ETHTOOL_GCOALESCE };
808 858
@@ -816,10 +866,7 @@ static noinline int ethtool_get_coalesce(struct net_device *dev, void __user *us
816 return 0; 866 return 0;
817} 867}
818 868
819/* 869static noinline_for_stack int ethtool_set_coalesce(struct net_device *dev, void __user *useraddr)
820 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool()
821 */
822static noinline int ethtool_set_coalesce(struct net_device *dev, void __user *useraddr)
823{ 870{
824 struct ethtool_coalesce coalesce; 871 struct ethtool_coalesce coalesce;
825 872
@@ -1229,10 +1276,7 @@ static int ethtool_set_value(struct net_device *dev, char __user *useraddr,
1229 return actor(dev, edata.data); 1276 return actor(dev, edata.data);
1230} 1277}
1231 1278
1232/* 1279static noinline_for_stack int ethtool_flash_device(struct net_device *dev, char __user *useraddr)
1233 * noinline attribute so that gcc doesnt use too much stack in dev_ethtool()
1234 */
1235static noinline int ethtool_flash_device(struct net_device *dev, char __user *useraddr)
1236{ 1280{
1237 struct ethtool_flash efl; 1281 struct ethtool_flash efl;
1238 1282
@@ -1471,6 +1515,9 @@ int dev_ethtool(struct net *net, struct ifreq *ifr)
1471 case ETHTOOL_GRXNTUPLE: 1515 case ETHTOOL_GRXNTUPLE:
1472 rc = ethtool_get_rx_ntuple(dev, useraddr); 1516 rc = ethtool_get_rx_ntuple(dev, useraddr);
1473 break; 1517 break;
1518 case ETHTOOL_GSSET_INFO:
1519 rc = ethtool_get_sset_info(dev, useraddr);
1520 break;
1474 default: 1521 default:
1475 rc = -EOPNOTSUPP; 1522 rc = -EOPNOTSUPP;
1476 } 1523 }
diff --git a/net/core/neighbour.c b/net/core/neighbour.c
index d102f6d9abdc..6cee6434da67 100644
--- a/net/core/neighbour.c
+++ b/net/core/neighbour.c
@@ -771,6 +771,8 @@ static __inline__ int neigh_max_probes(struct neighbour *n)
771} 771}
772 772
773static void neigh_invalidate(struct neighbour *neigh) 773static void neigh_invalidate(struct neighbour *neigh)
774 __releases(neigh->lock)
775 __acquires(neigh->lock)
774{ 776{
775 struct sk_buff *skb; 777 struct sk_buff *skb;
776 778
diff --git a/net/core/sock.c b/net/core/sock.c
index fcd397a762ff..c5812bbc2cc9 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -340,8 +340,12 @@ int sk_receive_skb(struct sock *sk, struct sk_buff *skb, const int nested)
340 rc = sk_backlog_rcv(sk, skb); 340 rc = sk_backlog_rcv(sk, skb);
341 341
342 mutex_release(&sk->sk_lock.dep_map, 1, _RET_IP_); 342 mutex_release(&sk->sk_lock.dep_map, 1, _RET_IP_);
343 } else 343 } else if (sk_add_backlog(sk, skb)) {
344 sk_add_backlog(sk, skb); 344 bh_unlock_sock(sk);
345 atomic_inc(&sk->sk_drops);
346 goto discard_and_relse;
347 }
348
345 bh_unlock_sock(sk); 349 bh_unlock_sock(sk);
346out: 350out:
347 sock_put(sk); 351 sock_put(sk);
@@ -1139,6 +1143,7 @@ struct sock *sk_clone(const struct sock *sk, const gfp_t priority)
1139 sock_lock_init(newsk); 1143 sock_lock_init(newsk);
1140 bh_lock_sock(newsk); 1144 bh_lock_sock(newsk);
1141 newsk->sk_backlog.head = newsk->sk_backlog.tail = NULL; 1145 newsk->sk_backlog.head = newsk->sk_backlog.tail = NULL;
1146 newsk->sk_backlog.len = 0;
1142 1147
1143 atomic_set(&newsk->sk_rmem_alloc, 0); 1148 atomic_set(&newsk->sk_rmem_alloc, 0);
1144 /* 1149 /*
@@ -1542,6 +1547,12 @@ static void __release_sock(struct sock *sk)
1542 1547
1543 bh_lock_sock(sk); 1548 bh_lock_sock(sk);
1544 } while ((skb = sk->sk_backlog.head) != NULL); 1549 } while ((skb = sk->sk_backlog.head) != NULL);
1550
1551 /*
1552 * Doing the zeroing here guarantee we can not loop forever
1553 * while a wild producer attempts to flood us.
1554 */
1555 sk->sk_backlog.len = 0;
1545} 1556}
1546 1557
1547/** 1558/**
@@ -1874,6 +1885,7 @@ void sock_init_data(struct socket *sock, struct sock *sk)
1874 sk->sk_allocation = GFP_KERNEL; 1885 sk->sk_allocation = GFP_KERNEL;
1875 sk->sk_rcvbuf = sysctl_rmem_default; 1886 sk->sk_rcvbuf = sysctl_rmem_default;
1876 sk->sk_sndbuf = sysctl_wmem_default; 1887 sk->sk_sndbuf = sysctl_wmem_default;
1888 sk->sk_backlog.limit = sk->sk_rcvbuf << 1;
1877 sk->sk_state = TCP_CLOSE; 1889 sk->sk_state = TCP_CLOSE;
1878 sk_set_socket(sk, sock); 1890 sk_set_socket(sk, sock);
1879 1891
@@ -2276,7 +2288,8 @@ out_free_request_sock_slab:
2276 prot->rsk_prot->slab = NULL; 2288 prot->rsk_prot->slab = NULL;
2277 } 2289 }
2278out_free_request_sock_slab_name: 2290out_free_request_sock_slab_name:
2279 kfree(prot->rsk_prot->slab_name); 2291 if (prot->rsk_prot)
2292 kfree(prot->rsk_prot->slab_name);
2280out_free_sock_slab: 2293out_free_sock_slab:
2281 kmem_cache_destroy(prot->slab); 2294 kmem_cache_destroy(prot->slab);
2282 prot->slab = NULL; 2295 prot->slab = NULL;
diff --git a/net/dccp/minisocks.c b/net/dccp/minisocks.c
index af226a063141..0d508c359fa9 100644
--- a/net/dccp/minisocks.c
+++ b/net/dccp/minisocks.c
@@ -254,7 +254,7 @@ int dccp_child_process(struct sock *parent, struct sock *child,
254 * in main socket hash table and lock on listening 254 * in main socket hash table and lock on listening
255 * socket does not protect us more. 255 * socket does not protect us more.
256 */ 256 */
257 sk_add_backlog(child, skb); 257 __sk_add_backlog(child, skb);
258 } 258 }
259 259
260 bh_unlock_sock(child); 260 bh_unlock_sock(child);
diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c
index c0c5274d0271..f47c9f76754b 100644
--- a/net/ipv4/ip_gre.c
+++ b/net/ipv4/ip_gre.c
@@ -1144,12 +1144,9 @@ static int ipgre_header(struct sk_buff *skb, struct net_device *dev,
1144 1144
1145 if (saddr) 1145 if (saddr)
1146 memcpy(&iph->saddr, saddr, 4); 1146 memcpy(&iph->saddr, saddr, 4);
1147 1147 if (daddr)
1148 if (daddr) {
1149 memcpy(&iph->daddr, daddr, 4); 1148 memcpy(&iph->daddr, daddr, 4);
1150 return t->hlen; 1149 if (iph->daddr)
1151 }
1152 if (iph->daddr && !ipv4_is_multicast(iph->daddr))
1153 return t->hlen; 1150 return t->hlen;
1154 1151
1155 return -t->hlen; 1152 return -t->hlen;
diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 10a6a604bf32..678909281648 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -187,6 +187,16 @@ struct ic_device {
187static struct ic_device *ic_first_dev __initdata = NULL;/* List of open device */ 187static struct ic_device *ic_first_dev __initdata = NULL;/* List of open device */
188static struct net_device *ic_dev __initdata = NULL; /* Selected device */ 188static struct net_device *ic_dev __initdata = NULL; /* Selected device */
189 189
190static bool __init ic_device_match(struct net_device *dev)
191{
192 if (user_dev_name[0] ? !strcmp(dev->name, user_dev_name) :
193 (!(dev->flags & IFF_LOOPBACK) &&
194 (dev->flags & (IFF_POINTOPOINT|IFF_BROADCAST)) &&
195 strncmp(dev->name, "dummy", 5)))
196 return true;
197 return false;
198}
199
190static int __init ic_open_devs(void) 200static int __init ic_open_devs(void)
191{ 201{
192 struct ic_device *d, **last; 202 struct ic_device *d, **last;
@@ -207,10 +217,7 @@ static int __init ic_open_devs(void)
207 for_each_netdev(&init_net, dev) { 217 for_each_netdev(&init_net, dev) {
208 if (dev->flags & IFF_LOOPBACK) 218 if (dev->flags & IFF_LOOPBACK)
209 continue; 219 continue;
210 if (user_dev_name[0] ? !strcmp(dev->name, user_dev_name) : 220 if (ic_device_match(dev)) {
211 (!(dev->flags & IFF_LOOPBACK) &&
212 (dev->flags & (IFF_POINTOPOINT|IFF_BROADCAST)) &&
213 strncmp(dev->name, "dummy", 5))) {
214 int able = 0; 221 int able = 0;
215 if (dev->mtu >= 364) 222 if (dev->mtu >= 364)
216 able |= IC_BOOTP; 223 able |= IC_BOOTP;
@@ -228,7 +235,7 @@ static int __init ic_open_devs(void)
228 } 235 }
229 if (!(d = kmalloc(sizeof(struct ic_device), GFP_KERNEL))) { 236 if (!(d = kmalloc(sizeof(struct ic_device), GFP_KERNEL))) {
230 rtnl_unlock(); 237 rtnl_unlock();
231 return -1; 238 return -ENOMEM;
232 } 239 }
233 d->dev = dev; 240 d->dev = dev;
234 *last = d; 241 *last = d;
@@ -253,7 +260,7 @@ static int __init ic_open_devs(void)
253 printk(KERN_ERR "IP-Config: Device `%s' not found.\n", user_dev_name); 260 printk(KERN_ERR "IP-Config: Device `%s' not found.\n", user_dev_name);
254 else 261 else
255 printk(KERN_ERR "IP-Config: No network devices available.\n"); 262 printk(KERN_ERR "IP-Config: No network devices available.\n");
256 return -1; 263 return -ENODEV;
257 } 264 }
258 return 0; 265 return 0;
259} 266}
@@ -1303,6 +1310,32 @@ __be32 __init root_nfs_parse_addr(char *name)
1303 return addr; 1310 return addr;
1304} 1311}
1305 1312
1313#define DEVICE_WAIT_MAX 12 /* 12 seconds */
1314
1315static int __init wait_for_devices(void)
1316{
1317 int i;
1318
1319 msleep(CONF_PRE_OPEN);
1320 for (i = 0; i < DEVICE_WAIT_MAX; i++) {
1321 struct net_device *dev;
1322 int found = 0;
1323
1324 rtnl_lock();
1325 for_each_netdev(&init_net, dev) {
1326 if (ic_device_match(dev)) {
1327 found = 1;
1328 break;
1329 }
1330 }
1331 rtnl_unlock();
1332 if (found)
1333 return 0;
1334 ssleep(1);
1335 }
1336 return -ENODEV;
1337}
1338
1306/* 1339/*
1307 * IP Autoconfig dispatcher. 1340 * IP Autoconfig dispatcher.
1308 */ 1341 */
@@ -1313,6 +1346,7 @@ static int __init ip_auto_config(void)
1313#ifdef IPCONFIG_DYNAMIC 1346#ifdef IPCONFIG_DYNAMIC
1314 int retries = CONF_OPEN_RETRIES; 1347 int retries = CONF_OPEN_RETRIES;
1315#endif 1348#endif
1349 int err;
1316 1350
1317#ifdef CONFIG_PROC_FS 1351#ifdef CONFIG_PROC_FS
1318 proc_net_fops_create(&init_net, "pnp", S_IRUGO, &pnp_seq_fops); 1352 proc_net_fops_create(&init_net, "pnp", S_IRUGO, &pnp_seq_fops);
@@ -1325,12 +1359,15 @@ static int __init ip_auto_config(void)
1325#ifdef IPCONFIG_DYNAMIC 1359#ifdef IPCONFIG_DYNAMIC
1326 try_try_again: 1360 try_try_again:
1327#endif 1361#endif
1328 /* Give hardware a chance to settle */ 1362 /* Wait for devices to appear */
1329 msleep(CONF_PRE_OPEN); 1363 err = wait_for_devices();
1364 if (err)
1365 return err;
1330 1366
1331 /* Setup all network devices */ 1367 /* Setup all network devices */
1332 if (ic_open_devs() < 0) 1368 err = ic_open_devs();
1333 return -1; 1369 if (err)
1370 return err;
1334 1371
1335 /* Give drivers a chance to settle */ 1372 /* Give drivers a chance to settle */
1336 ssleep(CONF_POST_OPEN); 1373 ssleep(CONF_POST_OPEN);
diff --git a/net/ipv4/proc.c b/net/ipv4/proc.c
index 242ed2307370..4f1f337f4337 100644
--- a/net/ipv4/proc.c
+++ b/net/ipv4/proc.c
@@ -249,6 +249,8 @@ static const struct snmp_mib snmp4_net_list[] = {
249 SNMP_MIB_ITEM("TCPSackShifted", LINUX_MIB_SACKSHIFTED), 249 SNMP_MIB_ITEM("TCPSackShifted", LINUX_MIB_SACKSHIFTED),
250 SNMP_MIB_ITEM("TCPSackMerged", LINUX_MIB_SACKMERGED), 250 SNMP_MIB_ITEM("TCPSackMerged", LINUX_MIB_SACKMERGED),
251 SNMP_MIB_ITEM("TCPSackShiftFallback", LINUX_MIB_SACKSHIFTFALLBACK), 251 SNMP_MIB_ITEM("TCPSackShiftFallback", LINUX_MIB_SACKSHIFTFALLBACK),
252 SNMP_MIB_ITEM("TCPBacklogDrop", LINUX_MIB_TCPBACKLOGDROP),
253 SNMP_MIB_ITEM("TCPMinTTLDrop", LINUX_MIB_TCPMINTTLDROP),
252 SNMP_MIB_SENTINEL 254 SNMP_MIB_SENTINEL
253}; 255};
254 256
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index b2ba5581d2ae..d9b40248b97f 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -146,7 +146,6 @@ static struct dst_entry *ipv4_negative_advice(struct dst_entry *dst);
146static void ipv4_link_failure(struct sk_buff *skb); 146static void ipv4_link_failure(struct sk_buff *skb);
147static void ip_rt_update_pmtu(struct dst_entry *dst, u32 mtu); 147static void ip_rt_update_pmtu(struct dst_entry *dst, u32 mtu);
148static int rt_garbage_collect(struct dst_ops *ops); 148static int rt_garbage_collect(struct dst_ops *ops);
149static void rt_emergency_hash_rebuild(struct net *net);
150 149
151 150
152static struct dst_ops ipv4_dst_ops = { 151static struct dst_ops ipv4_dst_ops = {
@@ -780,11 +779,30 @@ static void rt_do_flush(int process_context)
780#define FRACT_BITS 3 779#define FRACT_BITS 3
781#define ONE (1UL << FRACT_BITS) 780#define ONE (1UL << FRACT_BITS)
782 781
782/*
783 * Given a hash chain and an item in this hash chain,
784 * find if a previous entry has the same hash_inputs
785 * (but differs on tos, mark or oif)
786 * Returns 0 if an alias is found.
787 * Returns ONE if rth has no alias before itself.
788 */
789static int has_noalias(const struct rtable *head, const struct rtable *rth)
790{
791 const struct rtable *aux = head;
792
793 while (aux != rth) {
794 if (compare_hash_inputs(&aux->fl, &rth->fl))
795 return 0;
796 aux = aux->u.dst.rt_next;
797 }
798 return ONE;
799}
800
783static void rt_check_expire(void) 801static void rt_check_expire(void)
784{ 802{
785 static unsigned int rover; 803 static unsigned int rover;
786 unsigned int i = rover, goal; 804 unsigned int i = rover, goal;
787 struct rtable *rth, *aux, **rthp; 805 struct rtable *rth, **rthp;
788 unsigned long samples = 0; 806 unsigned long samples = 0;
789 unsigned long sum = 0, sum2 = 0; 807 unsigned long sum = 0, sum2 = 0;
790 unsigned long delta; 808 unsigned long delta;
@@ -835,15 +853,7 @@ nofree:
835 * attributes don't unfairly skew 853 * attributes don't unfairly skew
836 * the length computation 854 * the length computation
837 */ 855 */
838 for (aux = rt_hash_table[i].chain;;) { 856 length += has_noalias(rt_hash_table[i].chain, rth);
839 if (aux == rth) {
840 length += ONE;
841 break;
842 }
843 if (compare_hash_inputs(&aux->fl, &rth->fl))
844 break;
845 aux = aux->u.dst.rt_next;
846 }
847 continue; 857 continue;
848 } 858 }
849 } else if (!rt_may_expire(rth, tmo, ip_rt_gc_timeout)) 859 } else if (!rt_may_expire(rth, tmo, ip_rt_gc_timeout))
@@ -1073,6 +1083,21 @@ work_done:
1073out: return 0; 1083out: return 0;
1074} 1084}
1075 1085
1086/*
1087 * Returns number of entries in a hash chain that have different hash_inputs
1088 */
1089static int slow_chain_length(const struct rtable *head)
1090{
1091 int length = 0;
1092 const struct rtable *rth = head;
1093
1094 while (rth) {
1095 length += has_noalias(head, rth);
1096 rth = rth->u.dst.rt_next;
1097 }
1098 return length >> FRACT_BITS;
1099}
1100
1076static int rt_intern_hash(unsigned hash, struct rtable *rt, 1101static int rt_intern_hash(unsigned hash, struct rtable *rt,
1077 struct rtable **rp, struct sk_buff *skb) 1102 struct rtable **rp, struct sk_buff *skb)
1078{ 1103{
@@ -1185,7 +1210,8 @@ restart:
1185 rt_free(cand); 1210 rt_free(cand);
1186 } 1211 }
1187 } else { 1212 } else {
1188 if (chain_length > rt_chain_length_max) { 1213 if (chain_length > rt_chain_length_max &&
1214 slow_chain_length(rt_hash_table[hash].chain) > rt_chain_length_max) {
1189 struct net *net = dev_net(rt->u.dst.dev); 1215 struct net *net = dev_net(rt->u.dst.dev);
1190 int num = ++net->ipv4.current_rt_cache_rebuild_count; 1216 int num = ++net->ipv4.current_rt_cache_rebuild_count;
1191 if (!rt_caching(dev_net(rt->u.dst.dev))) { 1217 if (!rt_caching(dev_net(rt->u.dst.dev))) {
diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c
index c3588b4fd979..70df40980a87 100644
--- a/net/ipv4/tcp_ipv4.c
+++ b/net/ipv4/tcp_ipv4.c
@@ -1651,13 +1651,15 @@ int tcp_v4_rcv(struct sk_buff *skb)
1651 if (!sk) 1651 if (!sk)
1652 goto no_tcp_socket; 1652 goto no_tcp_socket;
1653 1653
1654 if (iph->ttl < inet_sk(sk)->min_ttl)
1655 goto discard_and_relse;
1656
1657process: 1654process:
1658 if (sk->sk_state == TCP_TIME_WAIT) 1655 if (sk->sk_state == TCP_TIME_WAIT)
1659 goto do_time_wait; 1656 goto do_time_wait;
1660 1657
1658 if (unlikely(iph->ttl < inet_sk(sk)->min_ttl)) {
1659 NET_INC_STATS_BH(net, LINUX_MIB_TCPMINTTLDROP);
1660 goto discard_and_relse;
1661 }
1662
1661 if (!xfrm4_policy_check(sk, XFRM_POLICY_IN, skb)) 1663 if (!xfrm4_policy_check(sk, XFRM_POLICY_IN, skb))
1662 goto discard_and_relse; 1664 goto discard_and_relse;
1663 nf_reset(skb); 1665 nf_reset(skb);
@@ -1682,8 +1684,11 @@ process:
1682 if (!tcp_prequeue(sk, skb)) 1684 if (!tcp_prequeue(sk, skb))
1683 ret = tcp_v4_do_rcv(sk, skb); 1685 ret = tcp_v4_do_rcv(sk, skb);
1684 } 1686 }
1685 } else 1687 } else if (unlikely(sk_add_backlog(sk, skb))) {
1686 sk_add_backlog(sk, skb); 1688 bh_unlock_sock(sk);
1689 NET_INC_STATS_BH(net, LINUX_MIB_TCPBACKLOGDROP);
1690 goto discard_and_relse;
1691 }
1687 bh_unlock_sock(sk); 1692 bh_unlock_sock(sk);
1688 1693
1689 sock_put(sk); 1694 sock_put(sk);
diff --git a/net/ipv4/tcp_minisocks.c b/net/ipv4/tcp_minisocks.c
index f206ee5dda80..4199bc6915c5 100644
--- a/net/ipv4/tcp_minisocks.c
+++ b/net/ipv4/tcp_minisocks.c
@@ -728,7 +728,7 @@ int tcp_child_process(struct sock *parent, struct sock *child,
728 * in main socket hash table and lock on listening 728 * in main socket hash table and lock on listening
729 * socket does not protect us more. 729 * socket does not protect us more.
730 */ 730 */
731 sk_add_backlog(child, skb); 731 __sk_add_backlog(child, skb);
732 } 732 }
733 733
734 bh_unlock_sock(child); 734 bh_unlock_sock(child);
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 4a1605d3f909..f181b78f2385 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -2395,13 +2395,17 @@ struct sk_buff *tcp_make_synack(struct sock *sk, struct dst_entry *dst,
2395 struct tcp_extend_values *xvp = tcp_xv(rvp); 2395 struct tcp_extend_values *xvp = tcp_xv(rvp);
2396 struct inet_request_sock *ireq = inet_rsk(req); 2396 struct inet_request_sock *ireq = inet_rsk(req);
2397 struct tcp_sock *tp = tcp_sk(sk); 2397 struct tcp_sock *tp = tcp_sk(sk);
2398 const struct tcp_cookie_values *cvp = tp->cookie_values;
2398 struct tcphdr *th; 2399 struct tcphdr *th;
2399 struct sk_buff *skb; 2400 struct sk_buff *skb;
2400 struct tcp_md5sig_key *md5; 2401 struct tcp_md5sig_key *md5;
2401 int tcp_header_size; 2402 int tcp_header_size;
2402 int mss; 2403 int mss;
2404 int s_data_desired = 0;
2403 2405
2404 skb = sock_wmalloc(sk, MAX_TCP_HEADER + 15, 1, GFP_ATOMIC); 2406 if (cvp != NULL && cvp->s_data_constant && cvp->s_data_desired)
2407 s_data_desired = cvp->s_data_desired;
2408 skb = sock_wmalloc(sk, MAX_TCP_HEADER + 15 + s_data_desired, 1, GFP_ATOMIC);
2405 if (skb == NULL) 2409 if (skb == NULL)
2406 return NULL; 2410 return NULL;
2407 2411
@@ -2457,16 +2461,12 @@ struct sk_buff *tcp_make_synack(struct sock *sk, struct dst_entry *dst,
2457 TCPCB_FLAG_SYN | TCPCB_FLAG_ACK); 2461 TCPCB_FLAG_SYN | TCPCB_FLAG_ACK);
2458 2462
2459 if (OPTION_COOKIE_EXTENSION & opts.options) { 2463 if (OPTION_COOKIE_EXTENSION & opts.options) {
2460 const struct tcp_cookie_values *cvp = tp->cookie_values; 2464 if (s_data_desired) {
2461 2465 u8 *buf = skb_put(skb, s_data_desired);
2462 if (cvp != NULL &&
2463 cvp->s_data_constant &&
2464 cvp->s_data_desired > 0) {
2465 u8 *buf = skb_put(skb, cvp->s_data_desired);
2466 2466
2467 /* copy data directly from the listening socket. */ 2467 /* copy data directly from the listening socket. */
2468 memcpy(buf, cvp->s_data_payload, cvp->s_data_desired); 2468 memcpy(buf, cvp->s_data_payload, s_data_desired);
2469 TCP_SKB_CB(skb)->end_seq += cvp->s_data_desired; 2469 TCP_SKB_CB(skb)->end_seq += s_data_desired;
2470 } 2470 }
2471 2471
2472 if (opts.hash_size > 0) { 2472 if (opts.hash_size > 0) {
diff --git a/net/ipv4/tcp_timer.c b/net/ipv4/tcp_timer.c
index a17629b8912e..b2e6bbccaee1 100644
--- a/net/ipv4/tcp_timer.c
+++ b/net/ipv4/tcp_timer.c
@@ -134,7 +134,7 @@ static void tcp_mtu_probing(struct inet_connection_sock *icsk, struct sock *sk)
134} 134}
135 135
136/* This function calculates a "timeout" which is equivalent to the timeout of a 136/* This function calculates a "timeout" which is equivalent to the timeout of a
137 * TCP connection after "boundary" unsucessful, exponentially backed-off 137 * TCP connection after "boundary" unsuccessful, exponentially backed-off
138 * retransmissions with an initial RTO of TCP_RTO_MIN. 138 * retransmissions with an initial RTO of TCP_RTO_MIN.
139 */ 139 */
140static bool retransmits_timed_out(struct sock *sk, 140static bool retransmits_timed_out(struct sock *sk,
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index 608a5446d05b..7af756d0f931 100644
--- a/net/ipv4/udp.c
+++ b/net/ipv4/udp.c
@@ -1371,8 +1371,10 @@ int udp_queue_rcv_skb(struct sock *sk, struct sk_buff *skb)
1371 bh_lock_sock(sk); 1371 bh_lock_sock(sk);
1372 if (!sock_owned_by_user(sk)) 1372 if (!sock_owned_by_user(sk))
1373 rc = __udp_queue_rcv_skb(sk, skb); 1373 rc = __udp_queue_rcv_skb(sk, skb);
1374 else 1374 else if (sk_add_backlog(sk, skb)) {
1375 sk_add_backlog(sk, skb); 1375 bh_unlock_sock(sk);
1376 goto drop;
1377 }
1376 bh_unlock_sock(sk); 1378 bh_unlock_sock(sk);
1377 1379
1378 return rc; 1380 return rc;
diff --git a/net/ipv4/xfrm4_policy.c b/net/ipv4/xfrm4_policy.c
index 67107d63c1cd..e4a1483fba77 100644
--- a/net/ipv4/xfrm4_policy.c
+++ b/net/ipv4/xfrm4_policy.c
@@ -91,11 +91,12 @@ static int xfrm4_init_path(struct xfrm_dst *path, struct dst_entry *dst,
91 return 0; 91 return 0;
92} 92}
93 93
94static int xfrm4_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) 94static int xfrm4_fill_dst(struct xfrm_dst *xdst, struct net_device *dev,
95 struct flowi *fl)
95{ 96{
96 struct rtable *rt = (struct rtable *)xdst->route; 97 struct rtable *rt = (struct rtable *)xdst->route;
97 98
98 xdst->u.rt.fl = rt->fl; 99 xdst->u.rt.fl = *fl;
99 100
100 xdst->u.dst.dev = dev; 101 xdst->u.dst.dev = dev;
101 dev_hold(dev); 102 dev_hold(dev);
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 88fd8c5877ee..3381b4317c27 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -1380,6 +1380,8 @@ static void addrconf_dad_stop(struct inet6_ifaddr *ifp, int dad_failed)
1380 if (dad_failed) 1380 if (dad_failed)
1381 ifp->flags |= IFA_F_DADFAILED; 1381 ifp->flags |= IFA_F_DADFAILED;
1382 spin_unlock_bh(&ifp->lock); 1382 spin_unlock_bh(&ifp->lock);
1383 if (dad_failed)
1384 ipv6_ifa_notify(0, ifp);
1383 in6_ifa_put(ifp); 1385 in6_ifa_put(ifp);
1384#ifdef CONFIG_IPV6_PRIVACY 1386#ifdef CONFIG_IPV6_PRIVACY
1385 } else if (ifp->flags&IFA_F_TEMPORARY) { 1387 } else if (ifp->flags&IFA_F_TEMPORARY) {
@@ -2615,7 +2617,7 @@ static void addrconf_bonding_change(struct net_device *dev, unsigned long event)
2615static int addrconf_ifdown(struct net_device *dev, int how) 2617static int addrconf_ifdown(struct net_device *dev, int how)
2616{ 2618{
2617 struct inet6_dev *idev; 2619 struct inet6_dev *idev;
2618 struct inet6_ifaddr *ifa, **bifa; 2620 struct inet6_ifaddr *ifa, *keep_list, **bifa;
2619 struct net *net = dev_net(dev); 2621 struct net *net = dev_net(dev);
2620 int i; 2622 int i;
2621 2623
@@ -2649,11 +2651,11 @@ static int addrconf_ifdown(struct net_device *dev, int how)
2649 write_lock_bh(&addrconf_hash_lock); 2651 write_lock_bh(&addrconf_hash_lock);
2650 while ((ifa = *bifa) != NULL) { 2652 while ((ifa = *bifa) != NULL) {
2651 if (ifa->idev == idev && 2653 if (ifa->idev == idev &&
2652 (how || !(ifa->flags&IFA_F_PERMANENT))) { 2654 (how || !(ifa->flags&IFA_F_PERMANENT) ||
2655 ipv6_addr_type(&ifa->addr) & IPV6_ADDR_LINKLOCAL)) {
2653 *bifa = ifa->lst_next; 2656 *bifa = ifa->lst_next;
2654 ifa->lst_next = NULL; 2657 ifa->lst_next = NULL;
2655 addrconf_del_timer(ifa); 2658 __in6_ifa_put(ifa);
2656 in6_ifa_put(ifa);
2657 continue; 2659 continue;
2658 } 2660 }
2659 bifa = &ifa->lst_next; 2661 bifa = &ifa->lst_next;
@@ -2689,31 +2691,51 @@ static int addrconf_ifdown(struct net_device *dev, int how)
2689 write_lock_bh(&idev->lock); 2691 write_lock_bh(&idev->lock);
2690 } 2692 }
2691#endif 2693#endif
2692 bifa = &idev->addr_list; 2694 keep_list = NULL;
2693 while ((ifa = *bifa) != NULL) { 2695 bifa = &keep_list;
2694 if (how == 0 && (ifa->flags&IFA_F_PERMANENT)) { 2696 while ((ifa = idev->addr_list) != NULL) {
2695 /* Retain permanent address on admin down */ 2697 idev->addr_list = ifa->if_next;
2698 ifa->if_next = NULL;
2699
2700 addrconf_del_timer(ifa);
2701
2702 /* If just doing link down, and address is permanent
2703 and not link-local, then retain it. */
2704 if (how == 0 &&
2705 (ifa->flags&IFA_F_PERMANENT) &&
2706 !(ipv6_addr_type(&ifa->addr) & IPV6_ADDR_LINKLOCAL)) {
2707
2708 /* Move to holding list */
2709 *bifa = ifa;
2696 bifa = &ifa->if_next; 2710 bifa = &ifa->if_next;
2697 2711
2698 /* Restart DAD if needed when link comes back up */ 2712 /* If not doing DAD on this address, just keep it. */
2699 if ( !((dev->flags&(IFF_NOARP|IFF_LOOPBACK)) || 2713 if ((dev->flags&(IFF_NOARP|IFF_LOOPBACK)) ||
2700 idev->cnf.accept_dad <= 0 || 2714 idev->cnf.accept_dad <= 0 ||
2701 (ifa->flags & IFA_F_NODAD))) 2715 (ifa->flags & IFA_F_NODAD))
2702 ifa->flags |= IFA_F_TENTATIVE; 2716 continue;
2703 } else {
2704 *bifa = ifa->if_next;
2705 ifa->if_next = NULL;
2706 2717
2718 /* If it was tentative already, no need to notify */
2719 if (ifa->flags & IFA_F_TENTATIVE)
2720 continue;
2721
2722 /* Flag it for later restoration when link comes up */
2723 ifa->flags |= IFA_F_TENTATIVE;
2724 in6_ifa_hold(ifa);
2725 } else {
2707 ifa->dead = 1; 2726 ifa->dead = 1;
2708 write_unlock_bh(&idev->lock); 2727 }
2728 write_unlock_bh(&idev->lock);
2709 2729
2710 __ipv6_ifa_notify(RTM_DELADDR, ifa); 2730 __ipv6_ifa_notify(RTM_DELADDR, ifa);
2711 atomic_notifier_call_chain(&inet6addr_chain, NETDEV_DOWN, ifa); 2731 atomic_notifier_call_chain(&inet6addr_chain, NETDEV_DOWN, ifa);
2712 in6_ifa_put(ifa); 2732 in6_ifa_put(ifa);
2713 2733
2714 write_lock_bh(&idev->lock); 2734 write_lock_bh(&idev->lock);
2715 }
2716 } 2735 }
2736
2737 idev->addr_list = keep_list;
2738
2717 write_unlock_bh(&idev->lock); 2739 write_unlock_bh(&idev->lock);
2718 2740
2719 /* Step 5: Discard multicast list */ 2741 /* Step 5: Discard multicast list */
@@ -2739,28 +2761,29 @@ static int addrconf_ifdown(struct net_device *dev, int how)
2739static void addrconf_rs_timer(unsigned long data) 2761static void addrconf_rs_timer(unsigned long data)
2740{ 2762{
2741 struct inet6_ifaddr *ifp = (struct inet6_ifaddr *) data; 2763 struct inet6_ifaddr *ifp = (struct inet6_ifaddr *) data;
2764 struct inet6_dev *idev = ifp->idev;
2742 2765
2743 if (ifp->idev->cnf.forwarding) 2766 read_lock(&idev->lock);
2767 if (idev->dead || !(idev->if_flags & IF_READY))
2744 goto out; 2768 goto out;
2745 2769
2746 if (ifp->idev->if_flags & IF_RA_RCVD) { 2770 if (idev->cnf.forwarding)
2747 /* 2771 goto out;
2748 * Announcement received after solicitation 2772
2749 * was sent 2773 /* Announcement received after solicitation was sent */
2750 */ 2774 if (idev->if_flags & IF_RA_RCVD)
2751 goto out; 2775 goto out;
2752 }
2753 2776
2754 spin_lock(&ifp->lock); 2777 spin_lock(&ifp->lock);
2755 if (ifp->probes++ < ifp->idev->cnf.rtr_solicits) { 2778 if (ifp->probes++ < idev->cnf.rtr_solicits) {
2756 /* The wait after the last probe can be shorter */ 2779 /* The wait after the last probe can be shorter */
2757 addrconf_mod_timer(ifp, AC_RS, 2780 addrconf_mod_timer(ifp, AC_RS,
2758 (ifp->probes == ifp->idev->cnf.rtr_solicits) ? 2781 (ifp->probes == idev->cnf.rtr_solicits) ?
2759 ifp->idev->cnf.rtr_solicit_delay : 2782 idev->cnf.rtr_solicit_delay :
2760 ifp->idev->cnf.rtr_solicit_interval); 2783 idev->cnf.rtr_solicit_interval);
2761 spin_unlock(&ifp->lock); 2784 spin_unlock(&ifp->lock);
2762 2785
2763 ndisc_send_rs(ifp->idev->dev, &ifp->addr, &in6addr_linklocal_allrouters); 2786 ndisc_send_rs(idev->dev, &ifp->addr, &in6addr_linklocal_allrouters);
2764 } else { 2787 } else {
2765 spin_unlock(&ifp->lock); 2788 spin_unlock(&ifp->lock);
2766 /* 2789 /*
@@ -2768,10 +2791,11 @@ static void addrconf_rs_timer(unsigned long data)
2768 * assumption any longer. 2791 * assumption any longer.
2769 */ 2792 */
2770 printk(KERN_DEBUG "%s: no IPv6 routers present\n", 2793 printk(KERN_DEBUG "%s: no IPv6 routers present\n",
2771 ifp->idev->dev->name); 2794 idev->dev->name);
2772 } 2795 }
2773 2796
2774out: 2797out:
2798 read_unlock(&idev->lock);
2775 in6_ifa_put(ifp); 2799 in6_ifa_put(ifp);
2776} 2800}
2777 2801
@@ -2850,9 +2874,9 @@ static void addrconf_dad_timer(unsigned long data)
2850 struct inet6_dev *idev = ifp->idev; 2874 struct inet6_dev *idev = ifp->idev;
2851 struct in6_addr mcaddr; 2875 struct in6_addr mcaddr;
2852 2876
2853 read_lock_bh(&idev->lock); 2877 read_lock(&idev->lock);
2854 if (idev->dead) { 2878 if (idev->dead || !(idev->if_flags & IF_READY)) {
2855 read_unlock_bh(&idev->lock); 2879 read_unlock(&idev->lock);
2856 goto out; 2880 goto out;
2857 } 2881 }
2858 2882
@@ -2864,7 +2888,7 @@ static void addrconf_dad_timer(unsigned long data)
2864 2888
2865 ifp->flags &= ~(IFA_F_TENTATIVE|IFA_F_OPTIMISTIC|IFA_F_DADFAILED); 2889 ifp->flags &= ~(IFA_F_TENTATIVE|IFA_F_OPTIMISTIC|IFA_F_DADFAILED);
2866 spin_unlock(&ifp->lock); 2890 spin_unlock(&ifp->lock);
2867 read_unlock_bh(&idev->lock); 2891 read_unlock(&idev->lock);
2868 2892
2869 addrconf_dad_completed(ifp); 2893 addrconf_dad_completed(ifp);
2870 2894
@@ -2874,7 +2898,7 @@ static void addrconf_dad_timer(unsigned long data)
2874 ifp->probes--; 2898 ifp->probes--;
2875 addrconf_mod_timer(ifp, AC_DAD, ifp->idev->nd_parms->retrans_time); 2899 addrconf_mod_timer(ifp, AC_DAD, ifp->idev->nd_parms->retrans_time);
2876 spin_unlock(&ifp->lock); 2900 spin_unlock(&ifp->lock);
2877 read_unlock_bh(&idev->lock); 2901 read_unlock(&idev->lock);
2878 2902
2879 /* send a neighbour solicitation for our addr */ 2903 /* send a neighbour solicitation for our addr */
2880 addrconf_addr_solict_mult(&ifp->addr, &mcaddr); 2904 addrconf_addr_solict_mult(&ifp->addr, &mcaddr);
diff --git a/net/ipv6/fib6_rules.c b/net/ipv6/fib6_rules.c
index 551882b9dfd6..5e463c43fcc2 100644
--- a/net/ipv6/fib6_rules.c
+++ b/net/ipv6/fib6_rules.c
@@ -84,18 +84,11 @@ static int fib6_rule_action(struct fib_rule *rule, struct flowi *flp,
84 if ((rule->flags & FIB_RULE_FIND_SADDR) && 84 if ((rule->flags & FIB_RULE_FIND_SADDR) &&
85 r->src.plen && !(flags & RT6_LOOKUP_F_HAS_SADDR)) { 85 r->src.plen && !(flags & RT6_LOOKUP_F_HAS_SADDR)) {
86 struct in6_addr saddr; 86 struct in6_addr saddr;
87 unsigned int srcprefs = 0;
88
89 if (flags & RT6_LOOKUP_F_SRCPREF_TMP)
90 srcprefs |= IPV6_PREFER_SRC_TMP;
91 if (flags & RT6_LOOKUP_F_SRCPREF_PUBLIC)
92 srcprefs |= IPV6_PREFER_SRC_PUBLIC;
93 if (flags & RT6_LOOKUP_F_SRCPREF_COA)
94 srcprefs |= IPV6_PREFER_SRC_COA;
95 87
96 if (ipv6_dev_get_saddr(net, 88 if (ipv6_dev_get_saddr(net,
97 ip6_dst_idev(&rt->u.dst)->dev, 89 ip6_dst_idev(&rt->u.dst)->dev,
98 &flp->fl6_dst, srcprefs, 90 &flp->fl6_dst,
91 rt6_flags2srcprefs(flags),
99 &saddr)) 92 &saddr))
100 goto again; 93 goto again;
101 if (!ipv6_prefix_equal(&saddr, &r->src.addr, 94 if (!ipv6_prefix_equal(&saddr, &r->src.addr,
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index b08879e97f22..52cd3eff31dc 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -819,15 +819,8 @@ struct dst_entry * ip6_route_output(struct net *net, struct sock *sk,
819 819
820 if (!ipv6_addr_any(&fl->fl6_src)) 820 if (!ipv6_addr_any(&fl->fl6_src))
821 flags |= RT6_LOOKUP_F_HAS_SADDR; 821 flags |= RT6_LOOKUP_F_HAS_SADDR;
822 else if (sk) { 822 else if (sk)
823 unsigned int prefs = inet6_sk(sk)->srcprefs; 823 flags |= rt6_srcprefs2flags(inet6_sk(sk)->srcprefs);
824 if (prefs & IPV6_PREFER_SRC_TMP)
825 flags |= RT6_LOOKUP_F_SRCPREF_TMP;
826 if (prefs & IPV6_PREFER_SRC_PUBLIC)
827 flags |= RT6_LOOKUP_F_SRCPREF_PUBLIC;
828 if (prefs & IPV6_PREFER_SRC_COA)
829 flags |= RT6_LOOKUP_F_SRCPREF_COA;
830 }
831 824
832 return fib6_rule_lookup(net, fl, flags, ip6_pol_route_output); 825 return fib6_rule_lookup(net, fl, flags, ip6_pol_route_output);
833} 826}
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index 6963a6b6763e..9b6dbba80d31 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -1740,8 +1740,11 @@ process:
1740 if (!tcp_prequeue(sk, skb)) 1740 if (!tcp_prequeue(sk, skb))
1741 ret = tcp_v6_do_rcv(sk, skb); 1741 ret = tcp_v6_do_rcv(sk, skb);
1742 } 1742 }
1743 } else 1743 } else if (unlikely(sk_add_backlog(sk, skb))) {
1744 sk_add_backlog(sk, skb); 1744 bh_unlock_sock(sk);
1745 NET_INC_STATS_BH(net, LINUX_MIB_TCPBACKLOGDROP);
1746 goto discard_and_relse;
1747 }
1745 bh_unlock_sock(sk); 1748 bh_unlock_sock(sk);
1746 1749
1747 sock_put(sk); 1750 sock_put(sk);
diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c
index 52b8347ae3b2..3c0c9c755c92 100644
--- a/net/ipv6/udp.c
+++ b/net/ipv6/udp.c
@@ -583,16 +583,20 @@ static void flush_stack(struct sock **stack, unsigned int count,
583 bh_lock_sock(sk); 583 bh_lock_sock(sk);
584 if (!sock_owned_by_user(sk)) 584 if (!sock_owned_by_user(sk))
585 udpv6_queue_rcv_skb(sk, skb1); 585 udpv6_queue_rcv_skb(sk, skb1);
586 else 586 else if (sk_add_backlog(sk, skb1)) {
587 sk_add_backlog(sk, skb1); 587 kfree_skb(skb1);
588 bh_unlock_sock(sk);
589 goto drop;
590 }
588 bh_unlock_sock(sk); 591 bh_unlock_sock(sk);
589 } else { 592 continue;
590 atomic_inc(&sk->sk_drops);
591 UDP6_INC_STATS_BH(sock_net(sk),
592 UDP_MIB_RCVBUFERRORS, IS_UDPLITE(sk));
593 UDP6_INC_STATS_BH(sock_net(sk),
594 UDP_MIB_INERRORS, IS_UDPLITE(sk));
595 } 593 }
594drop:
595 atomic_inc(&sk->sk_drops);
596 UDP6_INC_STATS_BH(sock_net(sk),
597 UDP_MIB_RCVBUFERRORS, IS_UDPLITE(sk));
598 UDP6_INC_STATS_BH(sock_net(sk),
599 UDP_MIB_INERRORS, IS_UDPLITE(sk));
596 } 600 }
597} 601}
598/* 602/*
@@ -754,8 +758,12 @@ int __udp6_lib_rcv(struct sk_buff *skb, struct udp_table *udptable,
754 bh_lock_sock(sk); 758 bh_lock_sock(sk);
755 if (!sock_owned_by_user(sk)) 759 if (!sock_owned_by_user(sk))
756 udpv6_queue_rcv_skb(sk, skb); 760 udpv6_queue_rcv_skb(sk, skb);
757 else 761 else if (sk_add_backlog(sk, skb)) {
758 sk_add_backlog(sk, skb); 762 atomic_inc(&sk->sk_drops);
763 bh_unlock_sock(sk);
764 sock_put(sk);
765 goto discard;
766 }
759 bh_unlock_sock(sk); 767 bh_unlock_sock(sk);
760 sock_put(sk); 768 sock_put(sk);
761 return 0; 769 return 0;
diff --git a/net/ipv6/xfrm6_policy.c b/net/ipv6/xfrm6_policy.c
index dbdc696f5fc5..ae181651c75a 100644
--- a/net/ipv6/xfrm6_policy.c
+++ b/net/ipv6/xfrm6_policy.c
@@ -116,7 +116,8 @@ static int xfrm6_init_path(struct xfrm_dst *path, struct dst_entry *dst,
116 return 0; 116 return 0;
117} 117}
118 118
119static int xfrm6_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) 119static int xfrm6_fill_dst(struct xfrm_dst *xdst, struct net_device *dev,
120 struct flowi *fl)
120{ 121{
121 struct rt6_info *rt = (struct rt6_info*)xdst->route; 122 struct rt6_info *rt = (struct rt6_info*)xdst->route;
122 123
diff --git a/net/llc/llc_c_ac.c b/net/llc/llc_c_ac.c
index 019c780512e8..86d6985b9d49 100644
--- a/net/llc/llc_c_ac.c
+++ b/net/llc/llc_c_ac.c
@@ -1437,7 +1437,7 @@ static void llc_process_tmr_ev(struct sock *sk, struct sk_buff *skb)
1437 llc_conn_state_process(sk, skb); 1437 llc_conn_state_process(sk, skb);
1438 else { 1438 else {
1439 llc_set_backlog_type(skb, LLC_EVENT); 1439 llc_set_backlog_type(skb, LLC_EVENT);
1440 sk_add_backlog(sk, skb); 1440 __sk_add_backlog(sk, skb);
1441 } 1441 }
1442 } 1442 }
1443} 1443}
diff --git a/net/llc/llc_conn.c b/net/llc/llc_conn.c
index a8dde9b010da..a12144da7974 100644
--- a/net/llc/llc_conn.c
+++ b/net/llc/llc_conn.c
@@ -827,7 +827,8 @@ void llc_conn_handler(struct llc_sap *sap, struct sk_buff *skb)
827 else { 827 else {
828 dprintk("%s: adding to backlog...\n", __func__); 828 dprintk("%s: adding to backlog...\n", __func__);
829 llc_set_backlog_type(skb, LLC_PACKET); 829 llc_set_backlog_type(skb, LLC_PACKET);
830 sk_add_backlog(sk, skb); 830 if (sk_add_backlog(sk, skb))
831 goto drop_unlock;
831 } 832 }
832out: 833out:
833 bh_unlock_sock(sk); 834 bh_unlock_sock(sk);
diff --git a/net/mac80211/debugfs_netdev.c b/net/mac80211/debugfs_netdev.c
index 9affe2cd185f..b4ddb2f83914 100644
--- a/net/mac80211/debugfs_netdev.c
+++ b/net/mac80211/debugfs_netdev.c
@@ -48,20 +48,24 @@ static ssize_t ieee80211_if_write(
48 ssize_t (*write)(struct ieee80211_sub_if_data *, const char *, int)) 48 ssize_t (*write)(struct ieee80211_sub_if_data *, const char *, int))
49{ 49{
50 u8 *buf; 50 u8 *buf;
51 ssize_t ret = -ENODEV; 51 ssize_t ret;
52 52
53 buf = kzalloc(count, GFP_KERNEL); 53 buf = kmalloc(count, GFP_KERNEL);
54 if (!buf) 54 if (!buf)
55 return -ENOMEM; 55 return -ENOMEM;
56 56
57 ret = -EFAULT;
57 if (copy_from_user(buf, userbuf, count)) 58 if (copy_from_user(buf, userbuf, count))
58 return -EFAULT; 59 goto freebuf;
59 60
61 ret = -ENODEV;
60 rtnl_lock(); 62 rtnl_lock();
61 if (sdata->dev->reg_state == NETREG_REGISTERED) 63 if (sdata->dev->reg_state == NETREG_REGISTERED)
62 ret = (*write)(sdata, buf, count); 64 ret = (*write)(sdata, buf, count);
63 rtnl_unlock(); 65 rtnl_unlock();
64 66
67freebuf:
68 kfree(buf);
65 return ret; 69 return ret;
66} 70}
67 71
diff --git a/net/mac80211/mesh_plink.c b/net/mac80211/mesh_plink.c
index bc4e20e57ff5..1a29c4a8139e 100644
--- a/net/mac80211/mesh_plink.c
+++ b/net/mac80211/mesh_plink.c
@@ -744,7 +744,7 @@ void mesh_rx_plink_frame(struct ieee80211_sub_if_data *sdata, struct ieee80211_m
744 break; 744 break;
745 default: 745 default:
746 /* should not get here, PLINK_BLOCKED is dealt with at the 746 /* should not get here, PLINK_BLOCKED is dealt with at the
747 * beggining of the function 747 * beginning of the function
748 */ 748 */
749 spin_unlock_bh(&sta->lock); 749 spin_unlock_bh(&sta->lock);
750 break; 750 break;
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
index 41812a15eea0..be5f723d643a 100644
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
@@ -177,7 +177,8 @@ static u32 ieee80211_enable_ht(struct ieee80211_sub_if_data *sdata,
177 sta = sta_info_get(sdata, bssid); 177 sta = sta_info_get(sdata, bssid);
178 if (sta) 178 if (sta)
179 rate_control_rate_update(local, sband, sta, 179 rate_control_rate_update(local, sband, sta,
180 IEEE80211_RC_HT_CHANGED); 180 IEEE80211_RC_HT_CHANGED,
181 local->oper_channel_type);
181 rcu_read_unlock(); 182 rcu_read_unlock();
182 } 183 }
183 184
@@ -435,10 +436,12 @@ static void ieee80211_enable_ps(struct ieee80211_local *local,
435 if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) 436 if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK)
436 ieee80211_send_nullfunc(local, sdata, 1); 437 ieee80211_send_nullfunc(local, sdata, 1);
437 438
438 if (!(local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS)) { 439 if ((local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) &&
439 conf->flags |= IEEE80211_CONF_PS; 440 (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS))
440 ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS); 441 return;
441 } 442
443 conf->flags |= IEEE80211_CONF_PS;
444 ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
442 } 445 }
443} 446}
444 447
@@ -557,7 +560,8 @@ void ieee80211_dynamic_ps_enable_work(struct work_struct *work)
557 (!(ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED))) 560 (!(ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED)))
558 ieee80211_send_nullfunc(local, sdata, 1); 561 ieee80211_send_nullfunc(local, sdata, 1);
559 562
560 if (!(local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) || 563 if (!((local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) &&
564 (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK)) ||
561 (ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED)) { 565 (ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED)) {
562 ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED; 566 ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED;
563 local->hw.conf.flags |= IEEE80211_CONF_PS; 567 local->hw.conf.flags |= IEEE80211_CONF_PS;
@@ -1893,8 +1897,20 @@ int ieee80211_mgd_assoc(struct ieee80211_sub_if_data *sdata,
1893 1897
1894 mutex_lock(&ifmgd->mtx); 1898 mutex_lock(&ifmgd->mtx);
1895 if (ifmgd->associated) { 1899 if (ifmgd->associated) {
1896 mutex_unlock(&ifmgd->mtx); 1900 if (!req->prev_bssid ||
1897 return -EALREADY; 1901 memcmp(req->prev_bssid, ifmgd->associated->bssid,
1902 ETH_ALEN)) {
1903 /*
1904 * We are already associated and the request was not a
1905 * reassociation request from the current BSS, so
1906 * reject it.
1907 */
1908 mutex_unlock(&ifmgd->mtx);
1909 return -EALREADY;
1910 }
1911
1912 /* Trying to reassociate - clear previous association state */
1913 ieee80211_set_disassoc(sdata);
1898 } 1914 }
1899 mutex_unlock(&ifmgd->mtx); 1915 mutex_unlock(&ifmgd->mtx);
1900 1916
diff --git a/net/mac80211/rate.h b/net/mac80211/rate.h
index b6108bca96d4..065a96190e32 100644
--- a/net/mac80211/rate.h
+++ b/net/mac80211/rate.h
@@ -66,7 +66,8 @@ static inline void rate_control_rate_init(struct sta_info *sta)
66 66
67static inline void rate_control_rate_update(struct ieee80211_local *local, 67static inline void rate_control_rate_update(struct ieee80211_local *local,
68 struct ieee80211_supported_band *sband, 68 struct ieee80211_supported_band *sband,
69 struct sta_info *sta, u32 changed) 69 struct sta_info *sta, u32 changed,
70 enum nl80211_channel_type oper_chan_type)
70{ 71{
71 struct rate_control_ref *ref = local->rate_ctrl; 72 struct rate_control_ref *ref = local->rate_ctrl;
72 struct ieee80211_sta *ista = &sta->sta; 73 struct ieee80211_sta *ista = &sta->sta;
@@ -74,7 +75,7 @@ static inline void rate_control_rate_update(struct ieee80211_local *local,
74 75
75 if (ref && ref->ops->rate_update) 76 if (ref && ref->ops->rate_update)
76 ref->ops->rate_update(ref->priv, sband, ista, 77 ref->ops->rate_update(ref->priv, sband, ista,
77 priv_sta, changed); 78 priv_sta, changed, oper_chan_type);
78} 79}
79 80
80static inline void *rate_control_alloc_sta(struct rate_control_ref *ref, 81static inline void *rate_control_alloc_sta(struct rate_control_ref *ref,
diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c
index 211c475f73c6..56422d894351 100644
--- a/net/mac80211/sta_info.c
+++ b/net/mac80211/sta_info.c
@@ -434,6 +434,7 @@ int sta_info_insert_rcu(struct sta_info *sta) __acquires(RCU)
434 /* check if STA exists already */ 434 /* check if STA exists already */
435 if (sta_info_get_bss(sdata, sta->sta.addr)) { 435 if (sta_info_get_bss(sdata, sta->sta.addr)) {
436 spin_unlock_irqrestore(&local->sta_lock, flags); 436 spin_unlock_irqrestore(&local->sta_lock, flags);
437 mutex_unlock(&local->sta_mtx);
437 rcu_read_lock(); 438 rcu_read_lock();
438 err = -EEXIST; 439 err = -EEXIST;
439 goto out_free; 440 goto out_free;
diff --git a/net/netfilter/nf_conntrack_sip.c b/net/netfilter/nf_conntrack_sip.c
index 8dd75d90efc0..c6cd1b84eddd 100644
--- a/net/netfilter/nf_conntrack_sip.c
+++ b/net/netfilter/nf_conntrack_sip.c
@@ -284,7 +284,7 @@ EXPORT_SYMBOL_GPL(ct_sip_parse_request);
284 * tabs, spaces and continuation lines, which are treated as a single whitespace 284 * tabs, spaces and continuation lines, which are treated as a single whitespace
285 * character. 285 * character.
286 * 286 *
287 * Some headers may appear multiple times. A comma seperated list of values is 287 * Some headers may appear multiple times. A comma separated list of values is
288 * equivalent to multiple headers. 288 * equivalent to multiple headers.
289 */ 289 */
290static const struct sip_header ct_sip_hdrs[] = { 290static const struct sip_header ct_sip_hdrs[] = {
@@ -421,7 +421,7 @@ int ct_sip_get_header(const struct nf_conn *ct, const char *dptr,
421} 421}
422EXPORT_SYMBOL_GPL(ct_sip_get_header); 422EXPORT_SYMBOL_GPL(ct_sip_get_header);
423 423
424/* Get next header field in a list of comma seperated values */ 424/* Get next header field in a list of comma separated values */
425static int ct_sip_next_header(const struct nf_conn *ct, const char *dptr, 425static int ct_sip_next_header(const struct nf_conn *ct, const char *dptr,
426 unsigned int dataoff, unsigned int datalen, 426 unsigned int dataoff, unsigned int datalen,
427 enum sip_header_types type, 427 enum sip_header_types type,
diff --git a/net/netfilter/xt_hashlimit.c b/net/netfilter/xt_hashlimit.c
index d952806b6469..9e9c48963942 100644
--- a/net/netfilter/xt_hashlimit.c
+++ b/net/netfilter/xt_hashlimit.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * xt_hashlimit - Netfilter module to limit the number of packets per time 2 * xt_hashlimit - Netfilter module to limit the number of packets per time
3 * seperately for each hashbucket (sourceip/sourceport/dstip/dstport) 3 * separately for each hashbucket (sourceip/sourceport/dstip/dstport)
4 * 4 *
5 * (C) 2003-2004 by Harald Welte <laforge@netfilter.org> 5 * (C) 2003-2004 by Harald Welte <laforge@netfilter.org>
6 * Copyright © CC Computer Consultants GmbH, 2007 - 2008 6 * Copyright © CC Computer Consultants GmbH, 2007 - 2008
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 031a5e6fb4aa..1612d417d10c 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -1688,6 +1688,8 @@ static int packet_dev_mc(struct net_device *dev, struct packet_mclist *i,
1688{ 1688{
1689 switch (i->type) { 1689 switch (i->type) {
1690 case PACKET_MR_MULTICAST: 1690 case PACKET_MR_MULTICAST:
1691 if (i->alen != dev->addr_len)
1692 return -EINVAL;
1691 if (what > 0) 1693 if (what > 0)
1692 return dev_mc_add(dev, i->addr, i->alen, 0); 1694 return dev_mc_add(dev, i->addr, i->alen, 0);
1693 else 1695 else
@@ -1700,6 +1702,8 @@ static int packet_dev_mc(struct net_device *dev, struct packet_mclist *i,
1700 return dev_set_allmulti(dev, what); 1702 return dev_set_allmulti(dev, what);
1701 break; 1703 break;
1702 case PACKET_MR_UNICAST: 1704 case PACKET_MR_UNICAST:
1705 if (i->alen != dev->addr_len)
1706 return -EINVAL;
1703 if (what > 0) 1707 if (what > 0)
1704 return dev_unicast_add(dev, i->addr); 1708 return dev_unicast_add(dev, i->addr);
1705 else 1709 else
@@ -1734,7 +1738,7 @@ static int packet_mc_add(struct sock *sk, struct packet_mreq_max *mreq)
1734 goto done; 1738 goto done;
1735 1739
1736 err = -EINVAL; 1740 err = -EINVAL;
1737 if (mreq->mr_alen != dev->addr_len) 1741 if (mreq->mr_alen > dev->addr_len)
1738 goto done; 1742 goto done;
1739 1743
1740 err = -ENOBUFS; 1744 err = -ENOBUFS;
diff --git a/net/rfkill/input.c b/net/rfkill/input.c
index a7295ad5f9cb..3713d7ecab96 100644
--- a/net/rfkill/input.c
+++ b/net/rfkill/input.c
@@ -212,6 +212,9 @@ static void rfkill_event(struct input_handle *handle, unsigned int type,
212 case KEY_WIMAX: 212 case KEY_WIMAX:
213 rfkill_schedule_toggle(RFKILL_TYPE_WIMAX); 213 rfkill_schedule_toggle(RFKILL_TYPE_WIMAX);
214 break; 214 break;
215 case KEY_RFKILL:
216 rfkill_schedule_toggle(RFKILL_TYPE_ALL);
217 break;
215 } 218 }
216 } else if (type == EV_SW && code == SW_RFKILL_ALL) 219 } else if (type == EV_SW && code == SW_RFKILL_ALL)
217 rfkill_schedule_evsw_rfkillall(data); 220 rfkill_schedule_evsw_rfkillall(data);
@@ -295,6 +298,11 @@ static const struct input_device_id rfkill_ids[] = {
295 .keybit = { [BIT_WORD(KEY_WIMAX)] = BIT_MASK(KEY_WIMAX) }, 298 .keybit = { [BIT_WORD(KEY_WIMAX)] = BIT_MASK(KEY_WIMAX) },
296 }, 299 },
297 { 300 {
301 .flags = INPUT_DEVICE_ID_MATCH_EVBIT | INPUT_DEVICE_ID_MATCH_KEYBIT,
302 .evbit = { BIT_MASK(EV_KEY) },
303 .keybit = { [BIT_WORD(KEY_RFKILL)] = BIT_MASK(KEY_RFKILL) },
304 },
305 {
298 .flags = INPUT_DEVICE_ID_MATCH_EVBIT | INPUT_DEVICE_ID_MATCH_SWBIT, 306 .flags = INPUT_DEVICE_ID_MATCH_EVBIT | INPUT_DEVICE_ID_MATCH_SWBIT,
299 .evbit = { BIT(EV_SW) }, 307 .evbit = { BIT(EV_SW) },
300 .swbit = { [BIT_WORD(SW_RFKILL_ALL)] = BIT_MASK(SW_RFKILL_ALL) }, 308 .swbit = { [BIT_WORD(SW_RFKILL_ALL)] = BIT_MASK(SW_RFKILL_ALL) },
diff --git a/net/sctp/input.c b/net/sctp/input.c
index c0c973e67add..3d74b264ea22 100644
--- a/net/sctp/input.c
+++ b/net/sctp/input.c
@@ -75,7 +75,7 @@ static struct sctp_association *__sctp_lookup_association(
75 const union sctp_addr *peer, 75 const union sctp_addr *peer,
76 struct sctp_transport **pt); 76 struct sctp_transport **pt);
77 77
78static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb); 78static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb);
79 79
80 80
81/* Calculate the SCTP checksum of an SCTP packet. */ 81/* Calculate the SCTP checksum of an SCTP packet. */
@@ -265,8 +265,13 @@ int sctp_rcv(struct sk_buff *skb)
265 } 265 }
266 266
267 if (sock_owned_by_user(sk)) { 267 if (sock_owned_by_user(sk)) {
268 if (sctp_add_backlog(sk, skb)) {
269 sctp_bh_unlock_sock(sk);
270 sctp_chunk_free(chunk);
271 skb = NULL; /* sctp_chunk_free already freed the skb */
272 goto discard_release;
273 }
268 SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_BACKLOG); 274 SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_BACKLOG);
269 sctp_add_backlog(sk, skb);
270 } else { 275 } else {
271 SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_SOFTIRQ); 276 SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_SOFTIRQ);
272 sctp_inq_push(&chunk->rcvr->inqueue, chunk); 277 sctp_inq_push(&chunk->rcvr->inqueue, chunk);
@@ -336,8 +341,10 @@ int sctp_backlog_rcv(struct sock *sk, struct sk_buff *skb)
336 sctp_bh_lock_sock(sk); 341 sctp_bh_lock_sock(sk);
337 342
338 if (sock_owned_by_user(sk)) { 343 if (sock_owned_by_user(sk)) {
339 sk_add_backlog(sk, skb); 344 if (sk_add_backlog(sk, skb))
340 backloged = 1; 345 sctp_chunk_free(chunk);
346 else
347 backloged = 1;
341 } else 348 } else
342 sctp_inq_push(inqueue, chunk); 349 sctp_inq_push(inqueue, chunk);
343 350
@@ -362,22 +369,27 @@ done:
362 return 0; 369 return 0;
363} 370}
364 371
365static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb) 372static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb)
366{ 373{
367 struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk; 374 struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk;
368 struct sctp_ep_common *rcvr = chunk->rcvr; 375 struct sctp_ep_common *rcvr = chunk->rcvr;
376 int ret;
369 377
370 /* Hold the assoc/ep while hanging on the backlog queue. 378 ret = sk_add_backlog(sk, skb);
371 * This way, we know structures we need will not disappear from us 379 if (!ret) {
372 */ 380 /* Hold the assoc/ep while hanging on the backlog queue.
373 if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type) 381 * This way, we know structures we need will not disappear
374 sctp_association_hold(sctp_assoc(rcvr)); 382 * from us
375 else if (SCTP_EP_TYPE_SOCKET == rcvr->type) 383 */
376 sctp_endpoint_hold(sctp_ep(rcvr)); 384 if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type)
377 else 385 sctp_association_hold(sctp_assoc(rcvr));
378 BUG(); 386 else if (SCTP_EP_TYPE_SOCKET == rcvr->type)
387 sctp_endpoint_hold(sctp_ep(rcvr));
388 else
389 BUG();
390 }
391 return ret;
379 392
380 sk_add_backlog(sk, skb);
381} 393}
382 394
383/* Handle icmp frag needed error. */ 395/* Handle icmp frag needed error. */
diff --git a/net/sctp/sm_sideeffect.c b/net/sctp/sm_sideeffect.c
index 4e4ca65cd320..500886bda9b4 100644
--- a/net/sctp/sm_sideeffect.c
+++ b/net/sctp/sm_sideeffect.c
@@ -475,7 +475,7 @@ static void sctp_do_8_2_transport_strike(struct sctp_association *asoc,
475 * used to provide an upper bound to this doubling operation. 475 * used to provide an upper bound to this doubling operation.
476 * 476 *
477 * Special Case: the first HB doesn't trigger exponential backoff. 477 * Special Case: the first HB doesn't trigger exponential backoff.
478 * The first unacknowleged HB triggers it. We do this with a flag 478 * The first unacknowledged HB triggers it. We do this with a flag
479 * that indicates that we have an outstanding HB. 479 * that indicates that we have an outstanding HB.
480 */ 480 */
481 if (!is_hb || transport->hb_sent) { 481 if (!is_hb || transport->hb_sent) {
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index f6d1e59c4151..dfc5c127efd4 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -3720,6 +3720,9 @@ SCTP_STATIC int sctp_init_sock(struct sock *sk)
3720 SCTP_DBG_OBJCNT_INC(sock); 3720 SCTP_DBG_OBJCNT_INC(sock);
3721 percpu_counter_inc(&sctp_sockets_allocated); 3721 percpu_counter_inc(&sctp_sockets_allocated);
3722 3722
3723 /* Set socket backlog limit. */
3724 sk->sk_backlog.limit = sysctl_sctp_rmem[1];
3725
3723 local_bh_disable(); 3726 local_bh_disable();
3724 sock_prot_inuse_add(sock_net(sk), sk->sk_prot, 1); 3727 sock_prot_inuse_add(sock_net(sk), sk->sk_prot, 1);
3725 local_bh_enable(); 3728 local_bh_enable();
diff --git a/net/sunrpc/xprtrdma/transport.c b/net/sunrpc/xprtrdma/transport.c
index 7018eef1dcdd..f96c2fe6137b 100644
--- a/net/sunrpc/xprtrdma/transport.c
+++ b/net/sunrpc/xprtrdma/transport.c
@@ -160,16 +160,15 @@ xprt_rdma_format_addresses(struct rpc_xprt *xprt)
160 (void)rpc_ntop(sap, buf, sizeof(buf)); 160 (void)rpc_ntop(sap, buf, sizeof(buf));
161 xprt->address_strings[RPC_DISPLAY_ADDR] = kstrdup(buf, GFP_KERNEL); 161 xprt->address_strings[RPC_DISPLAY_ADDR] = kstrdup(buf, GFP_KERNEL);
162 162
163 (void)snprintf(buf, sizeof(buf), "%u", rpc_get_port(sap)); 163 snprintf(buf, sizeof(buf), "%u", rpc_get_port(sap));
164 xprt->address_strings[RPC_DISPLAY_PORT] = kstrdup(buf, GFP_KERNEL); 164 xprt->address_strings[RPC_DISPLAY_PORT] = kstrdup(buf, GFP_KERNEL);
165 165
166 xprt->address_strings[RPC_DISPLAY_PROTO] = "rdma"; 166 xprt->address_strings[RPC_DISPLAY_PROTO] = "rdma";
167 167
168 (void)snprintf(buf, sizeof(buf), "%02x%02x%02x%02x", 168 snprintf(buf, sizeof(buf), "%08x", ntohl(sin->sin_addr.s_addr));
169 NIPQUAD(sin->sin_addr.s_addr));
170 xprt->address_strings[RPC_DISPLAY_HEX_ADDR] = kstrdup(buf, GFP_KERNEL); 169 xprt->address_strings[RPC_DISPLAY_HEX_ADDR] = kstrdup(buf, GFP_KERNEL);
171 170
172 (void)snprintf(buf, sizeof(buf), "%4hx", rpc_get_port(sap)); 171 snprintf(buf, sizeof(buf), "%4hx", rpc_get_port(sap));
173 xprt->address_strings[RPC_DISPLAY_HEX_PORT] = kstrdup(buf, GFP_KERNEL); 172 xprt->address_strings[RPC_DISPLAY_HEX_PORT] = kstrdup(buf, GFP_KERNEL);
174 173
175 /* netid */ 174 /* netid */
diff --git a/net/sunrpc/xprtsock.c b/net/sunrpc/xprtsock.c
index 712412982cee..75ab08eac66b 100644
--- a/net/sunrpc/xprtsock.c
+++ b/net/sunrpc/xprtsock.c
@@ -297,12 +297,11 @@ static void xs_format_common_peer_addresses(struct rpc_xprt *xprt)
297 switch (sap->sa_family) { 297 switch (sap->sa_family) {
298 case AF_INET: 298 case AF_INET:
299 sin = xs_addr_in(xprt); 299 sin = xs_addr_in(xprt);
300 (void)snprintf(buf, sizeof(buf), "%02x%02x%02x%02x", 300 snprintf(buf, sizeof(buf), "%08x", ntohl(sin->sin_addr.s_addr));
301 NIPQUAD(sin->sin_addr.s_addr));
302 break; 301 break;
303 case AF_INET6: 302 case AF_INET6:
304 sin6 = xs_addr_in6(xprt); 303 sin6 = xs_addr_in6(xprt);
305 (void)snprintf(buf, sizeof(buf), "%pi6", &sin6->sin6_addr); 304 snprintf(buf, sizeof(buf), "%pi6", &sin6->sin6_addr);
306 break; 305 break;
307 default: 306 default:
308 BUG(); 307 BUG();
@@ -315,10 +314,10 @@ static void xs_format_common_peer_ports(struct rpc_xprt *xprt)
315 struct sockaddr *sap = xs_addr(xprt); 314 struct sockaddr *sap = xs_addr(xprt);
316 char buf[128]; 315 char buf[128];
317 316
318 (void)snprintf(buf, sizeof(buf), "%u", rpc_get_port(sap)); 317 snprintf(buf, sizeof(buf), "%u", rpc_get_port(sap));
319 xprt->address_strings[RPC_DISPLAY_PORT] = kstrdup(buf, GFP_KERNEL); 318 xprt->address_strings[RPC_DISPLAY_PORT] = kstrdup(buf, GFP_KERNEL);
320 319
321 (void)snprintf(buf, sizeof(buf), "%4hx", rpc_get_port(sap)); 320 snprintf(buf, sizeof(buf), "%4hx", rpc_get_port(sap));
322 xprt->address_strings[RPC_DISPLAY_HEX_PORT] = kstrdup(buf, GFP_KERNEL); 321 xprt->address_strings[RPC_DISPLAY_HEX_PORT] = kstrdup(buf, GFP_KERNEL);
323} 322}
324 323
diff --git a/net/tipc/bearer.c b/net/tipc/bearer.c
index 327011fcc407..78091375ca12 100644
--- a/net/tipc/bearer.c
+++ b/net/tipc/bearer.c
@@ -45,10 +45,10 @@
45 45
46#define MAX_ADDR_STR 32 46#define MAX_ADDR_STR 32
47 47
48static struct media *media_list = NULL; 48static struct media media_list[MAX_MEDIA];
49static u32 media_count = 0; 49static u32 media_count = 0;
50 50
51struct bearer *tipc_bearers = NULL; 51struct bearer tipc_bearers[MAX_BEARERS];
52 52
53/** 53/**
54 * media_name_valid - validate media name 54 * media_name_valid - validate media name
@@ -108,9 +108,11 @@ int tipc_register_media(u32 media_type,
108 int res = -EINVAL; 108 int res = -EINVAL;
109 109
110 write_lock_bh(&tipc_net_lock); 110 write_lock_bh(&tipc_net_lock);
111 if (!media_list)
112 goto exit;
113 111
112 if (tipc_mode != TIPC_NET_MODE) {
113 warn("Media <%s> rejected, not in networked mode yet\n", name);
114 goto exit;
115 }
114 if (!media_name_valid(name)) { 116 if (!media_name_valid(name)) {
115 warn("Media <%s> rejected, illegal name\n", name); 117 warn("Media <%s> rejected, illegal name\n", name);
116 goto exit; 118 goto exit;
@@ -660,33 +662,10 @@ int tipc_disable_bearer(const char *name)
660 662
661 663
662 664
663int tipc_bearer_init(void)
664{
665 int res;
666
667 write_lock_bh(&tipc_net_lock);
668 tipc_bearers = kcalloc(MAX_BEARERS, sizeof(struct bearer), GFP_ATOMIC);
669 media_list = kcalloc(MAX_MEDIA, sizeof(struct media), GFP_ATOMIC);
670 if (tipc_bearers && media_list) {
671 res = 0;
672 } else {
673 kfree(tipc_bearers);
674 kfree(media_list);
675 tipc_bearers = NULL;
676 media_list = NULL;
677 res = -ENOMEM;
678 }
679 write_unlock_bh(&tipc_net_lock);
680 return res;
681}
682
683void tipc_bearer_stop(void) 665void tipc_bearer_stop(void)
684{ 666{
685 u32 i; 667 u32 i;
686 668
687 if (!tipc_bearers)
688 return;
689
690 for (i = 0; i < MAX_BEARERS; i++) { 669 for (i = 0; i < MAX_BEARERS; i++) {
691 if (tipc_bearers[i].active) 670 if (tipc_bearers[i].active)
692 tipc_bearers[i].publ.blocked = 1; 671 tipc_bearers[i].publ.blocked = 1;
@@ -695,10 +674,6 @@ void tipc_bearer_stop(void)
695 if (tipc_bearers[i].active) 674 if (tipc_bearers[i].active)
696 bearer_disable(tipc_bearers[i].publ.name); 675 bearer_disable(tipc_bearers[i].publ.name);
697 } 676 }
698 kfree(tipc_bearers);
699 kfree(media_list);
700 tipc_bearers = NULL;
701 media_list = NULL;
702 media_count = 0; 677 media_count = 0;
703} 678}
704 679
diff --git a/net/tipc/bearer.h b/net/tipc/bearer.h
index ca5734892713..000228e93f9e 100644
--- a/net/tipc/bearer.h
+++ b/net/tipc/bearer.h
@@ -114,7 +114,7 @@ struct bearer_name {
114 114
115struct link; 115struct link;
116 116
117extern struct bearer *tipc_bearers; 117extern struct bearer tipc_bearers[];
118 118
119void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a); 119void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a);
120struct sk_buff *tipc_media_get_names(void); 120struct sk_buff *tipc_media_get_names(void);
diff --git a/net/tipc/link.c b/net/tipc/link.c
index 6f50f6423f63..1a7e4665af80 100644
--- a/net/tipc/link.c
+++ b/net/tipc/link.c
@@ -1882,6 +1882,15 @@ void tipc_recv_msg(struct sk_buff *head, struct tipc_bearer *tb_ptr)
1882 (msg_destnode(msg) != tipc_own_addr))) 1882 (msg_destnode(msg) != tipc_own_addr)))
1883 goto cont; 1883 goto cont;
1884 1884
1885 /* Discard non-routeable messages destined for another node */
1886
1887 if (unlikely(!msg_isdata(msg) &&
1888 (msg_destnode(msg) != tipc_own_addr))) {
1889 if ((msg_user(msg) != CONN_MANAGER) &&
1890 (msg_user(msg) != MSG_FRAGMENTER))
1891 goto cont;
1892 }
1893
1885 /* Locate unicast link endpoint that should handle message */ 1894 /* Locate unicast link endpoint that should handle message */
1886 1895
1887 n_ptr = tipc_node_find(msg_prevnode(msg)); 1896 n_ptr = tipc_node_find(msg_prevnode(msg));
diff --git a/net/tipc/net.c b/net/tipc/net.c
index 7906608bf510..f25b1cdb64eb 100644
--- a/net/tipc/net.c
+++ b/net/tipc/net.c
@@ -116,7 +116,8 @@
116*/ 116*/
117 117
118DEFINE_RWLOCK(tipc_net_lock); 118DEFINE_RWLOCK(tipc_net_lock);
119struct network tipc_net = { NULL }; 119struct _zone *tipc_zones[256] = { NULL, };
120struct network tipc_net = { tipc_zones };
120 121
121struct tipc_node *tipc_net_select_remote_node(u32 addr, u32 ref) 122struct tipc_node *tipc_net_select_remote_node(u32 addr, u32 ref)
122{ 123{
@@ -158,28 +159,12 @@ void tipc_net_send_external_routes(u32 dest)
158 } 159 }
159} 160}
160 161
161static int net_init(void)
162{
163 memset(&tipc_net, 0, sizeof(tipc_net));
164 tipc_net.zones = kcalloc(tipc_max_zones + 1, sizeof(struct _zone *), GFP_ATOMIC);
165 if (!tipc_net.zones) {
166 return -ENOMEM;
167 }
168 return 0;
169}
170
171static void net_stop(void) 162static void net_stop(void)
172{ 163{
173 u32 z_num; 164 u32 z_num;
174 165
175 if (!tipc_net.zones) 166 for (z_num = 1; z_num <= tipc_max_zones; z_num++)
176 return;
177
178 for (z_num = 1; z_num <= tipc_max_zones; z_num++) {
179 tipc_zone_delete(tipc_net.zones[z_num]); 167 tipc_zone_delete(tipc_net.zones[z_num]);
180 }
181 kfree(tipc_net.zones);
182 tipc_net.zones = NULL;
183} 168}
184 169
185static void net_route_named_msg(struct sk_buff *buf) 170static void net_route_named_msg(struct sk_buff *buf)
@@ -282,9 +267,7 @@ int tipc_net_start(u32 addr)
282 tipc_named_reinit(); 267 tipc_named_reinit();
283 tipc_port_reinit(); 268 tipc_port_reinit();
284 269
285 if ((res = tipc_bearer_init()) || 270 if ((res = tipc_cltr_init()) ||
286 (res = net_init()) ||
287 (res = tipc_cltr_init()) ||
288 (res = tipc_bclink_init())) { 271 (res = tipc_bclink_init())) {
289 return res; 272 return res;
290 } 273 }
diff --git a/net/tipc/socket.c b/net/tipc/socket.c
index 1ea64f09cc45..4b235fc1c70f 100644
--- a/net/tipc/socket.c
+++ b/net/tipc/socket.c
@@ -1322,8 +1322,10 @@ static u32 dispatch(struct tipc_port *tport, struct sk_buff *buf)
1322 if (!sock_owned_by_user(sk)) { 1322 if (!sock_owned_by_user(sk)) {
1323 res = filter_rcv(sk, buf); 1323 res = filter_rcv(sk, buf);
1324 } else { 1324 } else {
1325 sk_add_backlog(sk, buf); 1325 if (sk_add_backlog(sk, buf))
1326 res = TIPC_OK; 1326 res = TIPC_ERR_OVERLOAD;
1327 else
1328 res = TIPC_OK;
1327 } 1329 }
1328 bh_unlock_sock(sk); 1330 bh_unlock_sock(sk);
1329 1331
diff --git a/net/tipc/subscr.c b/net/tipc/subscr.c
index ac91f0dfa144..ff123e56114a 100644
--- a/net/tipc/subscr.c
+++ b/net/tipc/subscr.c
@@ -76,19 +76,6 @@ struct top_srv {
76static struct top_srv topsrv = { 0 }; 76static struct top_srv topsrv = { 0 };
77 77
78/** 78/**
79 * htohl - convert value to endianness used by destination
80 * @in: value to convert
81 * @swap: non-zero if endianness must be reversed
82 *
83 * Returns converted value
84 */
85
86static u32 htohl(u32 in, int swap)
87{
88 return swap ? swab32(in) : in;
89}
90
91/**
92 * subscr_send_event - send a message containing a tipc_event to the subscriber 79 * subscr_send_event - send a message containing a tipc_event to the subscriber
93 * 80 *
94 * Note: Must not hold subscriber's server port lock, since tipc_send() will 81 * Note: Must not hold subscriber's server port lock, since tipc_send() will
@@ -107,11 +94,11 @@ static void subscr_send_event(struct subscription *sub,
107 msg_sect.iov_base = (void *)&sub->evt; 94 msg_sect.iov_base = (void *)&sub->evt;
108 msg_sect.iov_len = sizeof(struct tipc_event); 95 msg_sect.iov_len = sizeof(struct tipc_event);
109 96
110 sub->evt.event = htohl(event, sub->swap); 97 sub->evt.event = htonl(event);
111 sub->evt.found_lower = htohl(found_lower, sub->swap); 98 sub->evt.found_lower = htonl(found_lower);
112 sub->evt.found_upper = htohl(found_upper, sub->swap); 99 sub->evt.found_upper = htonl(found_upper);
113 sub->evt.port.ref = htohl(port_ref, sub->swap); 100 sub->evt.port.ref = htonl(port_ref);
114 sub->evt.port.node = htohl(node, sub->swap); 101 sub->evt.port.node = htonl(node);
115 tipc_send(sub->server_ref, 1, &msg_sect); 102 tipc_send(sub->server_ref, 1, &msg_sect);
116} 103}
117 104
@@ -287,16 +274,23 @@ static void subscr_cancel(struct tipc_subscr *s,
287{ 274{
288 struct subscription *sub; 275 struct subscription *sub;
289 struct subscription *sub_temp; 276 struct subscription *sub_temp;
277 __u32 type, lower, upper;
290 int found = 0; 278 int found = 0;
291 279
292 /* Find first matching subscription, exit if not found */ 280 /* Find first matching subscription, exit if not found */
293 281
282 type = ntohl(s->seq.type);
283 lower = ntohl(s->seq.lower);
284 upper = ntohl(s->seq.upper);
285
294 list_for_each_entry_safe(sub, sub_temp, &subscriber->subscription_list, 286 list_for_each_entry_safe(sub, sub_temp, &subscriber->subscription_list,
295 subscription_list) { 287 subscription_list) {
296 if (!memcmp(s, &sub->evt.s, sizeof(struct tipc_subscr))) { 288 if ((type == sub->seq.type) &&
297 found = 1; 289 (lower == sub->seq.lower) &&
298 break; 290 (upper == sub->seq.upper)) {
299 } 291 found = 1;
292 break;
293 }
300 } 294 }
301 if (!found) 295 if (!found)
302 return; 296 return;
@@ -325,16 +319,10 @@ static struct subscription *subscr_subscribe(struct tipc_subscr *s,
325 struct subscriber *subscriber) 319 struct subscriber *subscriber)
326{ 320{
327 struct subscription *sub; 321 struct subscription *sub;
328 int swap;
329
330 /* Determine subscriber's endianness */
331
332 swap = !(s->filter & (TIPC_SUB_PORTS | TIPC_SUB_SERVICE));
333 322
334 /* Detect & process a subscription cancellation request */ 323 /* Detect & process a subscription cancellation request */
335 324
336 if (s->filter & htohl(TIPC_SUB_CANCEL, swap)) { 325 if (ntohl(s->filter) & TIPC_SUB_CANCEL) {
337 s->filter &= ~htohl(TIPC_SUB_CANCEL, swap);
338 subscr_cancel(s, subscriber); 326 subscr_cancel(s, subscriber);
339 return NULL; 327 return NULL;
340 } 328 }
@@ -359,11 +347,11 @@ static struct subscription *subscr_subscribe(struct tipc_subscr *s,
359 347
360 /* Initialize subscription object */ 348 /* Initialize subscription object */
361 349
362 sub->seq.type = htohl(s->seq.type, swap); 350 sub->seq.type = ntohl(s->seq.type);
363 sub->seq.lower = htohl(s->seq.lower, swap); 351 sub->seq.lower = ntohl(s->seq.lower);
364 sub->seq.upper = htohl(s->seq.upper, swap); 352 sub->seq.upper = ntohl(s->seq.upper);
365 sub->timeout = htohl(s->timeout, swap); 353 sub->timeout = ntohl(s->timeout);
366 sub->filter = htohl(s->filter, swap); 354 sub->filter = ntohl(s->filter);
367 if ((!(sub->filter & TIPC_SUB_PORTS) == 355 if ((!(sub->filter & TIPC_SUB_PORTS) ==
368 !(sub->filter & TIPC_SUB_SERVICE)) || 356 !(sub->filter & TIPC_SUB_SERVICE)) ||
369 (sub->seq.lower > sub->seq.upper)) { 357 (sub->seq.lower > sub->seq.upper)) {
@@ -376,7 +364,6 @@ static struct subscription *subscr_subscribe(struct tipc_subscr *s,
376 INIT_LIST_HEAD(&sub->nameseq_list); 364 INIT_LIST_HEAD(&sub->nameseq_list);
377 list_add(&sub->subscription_list, &subscriber->subscription_list); 365 list_add(&sub->subscription_list, &subscriber->subscription_list);
378 sub->server_ref = subscriber->port_ref; 366 sub->server_ref = subscriber->port_ref;
379 sub->swap = swap;
380 memcpy(&sub->evt.s, s, sizeof(struct tipc_subscr)); 367 memcpy(&sub->evt.s, s, sizeof(struct tipc_subscr));
381 atomic_inc(&topsrv.subscription_count); 368 atomic_inc(&topsrv.subscription_count);
382 if (sub->timeout != TIPC_WAIT_FOREVER) { 369 if (sub->timeout != TIPC_WAIT_FOREVER) {
diff --git a/net/tipc/subscr.h b/net/tipc/subscr.h
index 45d89bf4d202..c20f496d95b2 100644
--- a/net/tipc/subscr.h
+++ b/net/tipc/subscr.h
@@ -53,7 +53,6 @@ typedef void (*tipc_subscr_event) (struct subscription *sub,
53 * @nameseq_list: adjacent subscriptions in name sequence's subscription list 53 * @nameseq_list: adjacent subscriptions in name sequence's subscription list
54 * @subscription_list: adjacent subscriptions in subscriber's subscription list 54 * @subscription_list: adjacent subscriptions in subscriber's subscription list
55 * @server_ref: object reference of server port associated with subscription 55 * @server_ref: object reference of server port associated with subscription
56 * @swap: indicates if subscriber uses opposite endianness in its messages
57 * @evt: template for events generated by subscription 56 * @evt: template for events generated by subscription
58 */ 57 */
59 58
@@ -66,7 +65,6 @@ struct subscription {
66 struct list_head nameseq_list; 65 struct list_head nameseq_list;
67 struct list_head subscription_list; 66 struct list_head subscription_list;
68 u32 server_ref; 67 u32 server_ref;
69 int swap;
70 struct tipc_event evt; 68 struct tipc_event evt;
71}; 69};
72 70
diff --git a/net/x25/x25_dev.c b/net/x25/x25_dev.c
index 3e1efe534645..52e304212241 100644
--- a/net/x25/x25_dev.c
+++ b/net/x25/x25_dev.c
@@ -53,7 +53,7 @@ static int x25_receive_data(struct sk_buff *skb, struct x25_neigh *nb)
53 if (!sock_owned_by_user(sk)) { 53 if (!sock_owned_by_user(sk)) {
54 queued = x25_process_rx_frame(sk, skb); 54 queued = x25_process_rx_frame(sk, skb);
55 } else { 55 } else {
56 sk_add_backlog(sk, skb); 56 queued = !sk_add_backlog(sk, skb);
57 } 57 }
58 bh_unlock_sock(sk); 58 bh_unlock_sock(sk);
59 sock_put(sk); 59 sock_put(sk);
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 34a5ef8316e7..843e066649cb 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -1372,7 +1372,8 @@ static inline int xfrm_init_path(struct xfrm_dst *path, struct dst_entry *dst,
1372 return err; 1372 return err;
1373} 1373}
1374 1374
1375static inline int xfrm_fill_dst(struct xfrm_dst *xdst, struct net_device *dev) 1375static inline int xfrm_fill_dst(struct xfrm_dst *xdst, struct net_device *dev,
1376 struct flowi *fl)
1376{ 1377{
1377 struct xfrm_policy_afinfo *afinfo = 1378 struct xfrm_policy_afinfo *afinfo =
1378 xfrm_policy_get_afinfo(xdst->u.dst.ops->family); 1379 xfrm_policy_get_afinfo(xdst->u.dst.ops->family);
@@ -1381,7 +1382,7 @@ static inline int xfrm_fill_dst(struct xfrm_dst *xdst, struct net_device *dev)
1381 if (!afinfo) 1382 if (!afinfo)
1382 return -EINVAL; 1383 return -EINVAL;
1383 1384
1384 err = afinfo->fill_dst(xdst, dev); 1385 err = afinfo->fill_dst(xdst, dev, fl);
1385 1386
1386 xfrm_policy_put_afinfo(afinfo); 1387 xfrm_policy_put_afinfo(afinfo);
1387 1388
@@ -1486,7 +1487,7 @@ static struct dst_entry *xfrm_bundle_create(struct xfrm_policy *policy,
1486 for (dst_prev = dst0; dst_prev != dst; dst_prev = dst_prev->child) { 1487 for (dst_prev = dst0; dst_prev != dst; dst_prev = dst_prev->child) {
1487 struct xfrm_dst *xdst = (struct xfrm_dst *)dst_prev; 1488 struct xfrm_dst *xdst = (struct xfrm_dst *)dst_prev;
1488 1489
1489 err = xfrm_fill_dst(xdst, dev); 1490 err = xfrm_fill_dst(xdst, dev, fl);
1490 if (err) 1491 if (err)
1491 goto free_dst; 1492 goto free_dst;
1492 1493
diff --git a/samples/hw_breakpoint/data_breakpoint.c b/samples/hw_breakpoint/data_breakpoint.c
index c69cbe9b2426..bd0f337afcab 100644
--- a/samples/hw_breakpoint/data_breakpoint.c
+++ b/samples/hw_breakpoint/data_breakpoint.c
@@ -34,7 +34,7 @@
34#include <linux/perf_event.h> 34#include <linux/perf_event.h>
35#include <linux/hw_breakpoint.h> 35#include <linux/hw_breakpoint.h>
36 36
37struct perf_event **sample_hbp; 37struct perf_event * __percpu *sample_hbp;
38 38
39static char ksym_name[KSYM_NAME_LEN] = "pid_max"; 39static char ksym_name[KSYM_NAME_LEN] = "pid_max";
40module_param_string(ksym, ksym_name, KSYM_NAME_LEN, S_IRUGO); 40module_param_string(ksym, ksym_name, KSYM_NAME_LEN, S_IRUGO);
@@ -61,8 +61,8 @@ static int __init hw_break_module_init(void)
61 attr.bp_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R; 61 attr.bp_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
62 62
63 sample_hbp = register_wide_hw_breakpoint(&attr, sample_hbp_handler); 63 sample_hbp = register_wide_hw_breakpoint(&attr, sample_hbp_handler);
64 if (IS_ERR(sample_hbp)) { 64 if (IS_ERR((void __force *)sample_hbp)) {
65 ret = PTR_ERR(sample_hbp); 65 ret = PTR_ERR((void __force *)sample_hbp);
66 goto fail; 66 goto fail;
67 } 67 }
68 68
diff --git a/samples/kobject/kobject-example.c b/samples/kobject/kobject-example.c
index 8d9b55a12023..86ea0c3ad975 100644
--- a/samples/kobject/kobject-example.c
+++ b/samples/kobject/kobject-example.c
@@ -44,7 +44,7 @@ static struct kobj_attribute foo_attribute =
44 __ATTR(foo, 0666, foo_show, foo_store); 44 __ATTR(foo, 0666, foo_show, foo_store);
45 45
46/* 46/*
47 * More complex function where we determine which varible is being accessed by 47 * More complex function where we determine which variable is being accessed by
48 * looking at the attribute for the "baz" and "bar" files. 48 * looking at the attribute for the "baz" and "bar" files.
49 */ 49 */
50static ssize_t b_show(struct kobject *kobj, struct kobj_attribute *attr, 50static ssize_t b_show(struct kobject *kobj, struct kobj_attribute *attr,
@@ -79,7 +79,7 @@ static struct kobj_attribute bar_attribute =
79 79
80 80
81/* 81/*
82 * Create a group of attributes so that we can create and destory them all 82 * Create a group of attributes so that we can create and destroy them all
83 * at once. 83 * at once.
84 */ 84 */
85static struct attribute *attrs[] = { 85static struct attribute *attrs[] = {
diff --git a/samples/kobject/kset-example.c b/samples/kobject/kset-example.c
index 45b7d56fb541..3b126d1f8599 100644
--- a/samples/kobject/kset-example.c
+++ b/samples/kobject/kset-example.c
@@ -87,7 +87,7 @@ static ssize_t foo_attr_store(struct kobject *kobj,
87} 87}
88 88
89/* Our custom sysfs_ops that we will associate with our ktype later on */ 89/* Our custom sysfs_ops that we will associate with our ktype later on */
90static struct sysfs_ops foo_sysfs_ops = { 90static const struct sysfs_ops foo_sysfs_ops = {
91 .show = foo_attr_show, 91 .show = foo_attr_show,
92 .store = foo_attr_store, 92 .store = foo_attr_store,
93}; 93};
@@ -127,7 +127,7 @@ static struct foo_attribute foo_attribute =
127 __ATTR(foo, 0666, foo_show, foo_store); 127 __ATTR(foo, 0666, foo_show, foo_store);
128 128
129/* 129/*
130 * More complex function where we determine which varible is being accessed by 130 * More complex function where we determine which variable is being accessed by
131 * looking at the attribute for the "baz" and "bar" files. 131 * looking at the attribute for the "baz" and "bar" files.
132 */ 132 */
133static ssize_t b_show(struct foo_obj *foo_obj, struct foo_attribute *attr, 133static ssize_t b_show(struct foo_obj *foo_obj, struct foo_attribute *attr,
@@ -161,7 +161,7 @@ static struct foo_attribute bar_attribute =
161 __ATTR(bar, 0666, b_show, b_store); 161 __ATTR(bar, 0666, b_show, b_store);
162 162
163/* 163/*
164 * Create a group of attributes so that we can create and destory them all 164 * Create a group of attributes so that we can create and destroy them all
165 * at once. 165 * at once.
166 */ 166 */
167static struct attribute *foo_default_attrs[] = { 167static struct attribute *foo_default_attrs[] = {
diff --git a/scripts/gfp-translate b/scripts/gfp-translate
index 073cb6d152a0..d81b968d864e 100644
--- a/scripts/gfp-translate
+++ b/scripts/gfp-translate
@@ -19,7 +19,7 @@ usage() {
19 exit 0 19 exit 0
20} 20}
21 21
22# Parse command-line arguements 22# Parse command-line arguments
23while [ $# -gt 0 ]; do 23while [ $# -gt 0 ]; do
24 case $1 in 24 case $1 in
25 --source) 25 --source)
diff --git a/scripts/kernel-doc b/scripts/kernel-doc
index 208ad3b0ca51..c7865c362d28 100755
--- a/scripts/kernel-doc
+++ b/scripts/kernel-doc
@@ -2103,7 +2103,7 @@ sub process_file($) {
2103 $section = $newsection; 2103 $section = $newsection;
2104 } elsif (/$doc_end/) { 2104 } elsif (/$doc_end/) {
2105 2105
2106 if ($contents ne "") { 2106 if (($contents ne "") && ($contents ne "\n")) {
2107 dump_section($file, $section, xml_escape($contents)); 2107 dump_section($file, $section, xml_escape($contents));
2108 $section = $section_default; 2108 $section = $section_default;
2109 $contents = ""; 2109 $contents = "";
diff --git a/security/selinux/avc.c b/security/selinux/avc.c
index db0fd9f33499..989fef82563a 100644
--- a/security/selinux/avc.c
+++ b/security/selinux/avc.c
@@ -337,7 +337,7 @@ static inline struct avc_node *avc_search_node(u32 ssid, u32 tsid, u16 tclass)
337 * Look up an AVC entry that is valid for the 337 * Look up an AVC entry that is valid for the
338 * (@ssid, @tsid), interpreting the permissions 338 * (@ssid, @tsid), interpreting the permissions
339 * based on @tclass. If a valid AVC entry exists, 339 * based on @tclass. If a valid AVC entry exists,
340 * then this function return the avc_node. 340 * then this function returns the avc_node.
341 * Otherwise, this function returns NULL. 341 * Otherwise, this function returns NULL.
342 */ 342 */
343static struct avc_node *avc_lookup(u32 ssid, u32 tsid, u16 tclass) 343static struct avc_node *avc_lookup(u32 ssid, u32 tsid, u16 tclass)
@@ -523,7 +523,7 @@ void avc_audit(u32 ssid, u32 tsid,
523 * @perms: permissions 523 * @perms: permissions
524 * 524 *
525 * Register a callback function for events in the set @events 525 * Register a callback function for events in the set @events
526 * related to the SID pair (@ssid, @tsid) and 526 * related to the SID pair (@ssid, @tsid)
527 * and the permissions @perms, interpreting 527 * and the permissions @perms, interpreting
528 * @perms based on @tclass. Returns %0 on success or 528 * @perms based on @tclass. Returns %0 on success or
529 * -%ENOMEM if insufficient memory exists to add the callback. 529 * -%ENOMEM if insufficient memory exists to add the callback.
@@ -568,7 +568,7 @@ static inline int avc_sidcmp(u32 x, u32 y)
568 * 568 *
569 * if a valid AVC entry doesn't exist,this function returns -ENOENT. 569 * if a valid AVC entry doesn't exist,this function returns -ENOENT.
570 * if kmalloc() called internal returns NULL, this function returns -ENOMEM. 570 * if kmalloc() called internal returns NULL, this function returns -ENOMEM.
571 * otherwise, this function update the AVC entry. The original AVC-entry object 571 * otherwise, this function updates the AVC entry. The original AVC-entry object
572 * will release later by RCU. 572 * will release later by RCU.
573 */ 573 */
574static int avc_update_node(u32 event, u32 perms, u32 ssid, u32 tsid, u16 tclass, 574static int avc_update_node(u32 event, u32 perms, u32 ssid, u32 tsid, u16 tclass,
diff --git a/security/tomoyo/common.c b/security/tomoyo/common.c
index ff51f1026b57..ef89947a774b 100644
--- a/security/tomoyo/common.c
+++ b/security/tomoyo/common.c
@@ -886,6 +886,7 @@ static struct tomoyo_profile *tomoyo_find_or_assign_new_profile(const unsigned
886 ptr = kmalloc(sizeof(*ptr), GFP_KERNEL); 886 ptr = kmalloc(sizeof(*ptr), GFP_KERNEL);
887 if (!tomoyo_memory_ok(ptr)) { 887 if (!tomoyo_memory_ok(ptr)) {
888 kfree(ptr); 888 kfree(ptr);
889 ptr = NULL;
889 goto ok; 890 goto ok;
890 } 891 }
891 for (i = 0; i < TOMOYO_MAX_CONTROL_INDEX; i++) 892 for (i = 0; i < TOMOYO_MAX_CONTROL_INDEX; i++)
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 6fdca97186e7..88eec3847df2 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/irq.h> 23#include <asm/irq.h>
24#include <mach/regs-ac97.h> 24#include <mach/regs-ac97.h>
25#include <mach/pxa2xx-gpio.h>
26#include <mach/audio.h> 25#include <mach/audio.h>
27 26
28static DEFINE_MUTEX(car_mutex); 27static DEFINE_MUTEX(car_mutex);
@@ -32,6 +31,8 @@ static struct clk *ac97_clk;
32static struct clk *ac97conf_clk; 31static struct clk *ac97conf_clk;
33static int reset_gpio; 32static int reset_gpio;
34 33
34extern void pxa27x_assert_ac97reset(int reset_gpio, int on);
35
35/* 36/*
36 * Beware PXA27x bugs: 37 * Beware PXA27x bugs:
37 * 38 *
@@ -42,45 +43,6 @@ static int reset_gpio;
42 * 1 jiffy timeout if interrupt never comes). 43 * 1 jiffy timeout if interrupt never comes).
43 */ 44 */
44 45
45enum {
46 RESETGPIO_FORCE_HIGH,
47 RESETGPIO_FORCE_LOW,
48 RESETGPIO_NORMAL_ALTFUNC
49};
50
51/**
52 * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA
53 * @mode: chosen action
54 *
55 * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line
56 * must be done to insure proper work of AC97 reset line. This function
57 * computes the correct gpio_mode for further use by reset functions, and
58 * applied the change through pxa_gpio_mode.
59 */
60static void set_resetgpio_mode(int resetgpio_action)
61{
62 int mode = 0;
63
64 if (reset_gpio)
65 switch (resetgpio_action) {
66 case RESETGPIO_NORMAL_ALTFUNC:
67 if (reset_gpio == 113)
68 mode = 113 | GPIO_ALT_FN_2_OUT;
69 if (reset_gpio == 95)
70 mode = 95 | GPIO_ALT_FN_1_OUT;
71 break;
72 case RESETGPIO_FORCE_LOW:
73 mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW;
74 break;
75 case RESETGPIO_FORCE_HIGH:
76 mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH;
77 break;
78 };
79
80 if (mode)
81 pxa_gpio_mode(mode);
82}
83
84unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 46unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
85{ 47{
86 unsigned short val = -1; 48 unsigned short val = -1;
@@ -174,12 +136,11 @@ static inline void pxa_ac97_warm_pxa27x(void)
174{ 136{
175 gsr_bits = 0; 137 gsr_bits = 0;
176 138
177 /* warm reset broken on Bulverde, 139 /* warm reset broken on Bulverde, so manually keep AC97 reset high */
178 so manually keep AC97 reset high */ 140 pxa27x_assert_ac97reset(reset_gpio, 1);
179 set_resetgpio_mode(RESETGPIO_FORCE_HIGH);
180 udelay(10); 141 udelay(10);
181 GCR |= GCR_WARM_RST; 142 GCR |= GCR_WARM_RST;
182 set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); 143 pxa27x_assert_ac97reset(reset_gpio, 0);
183 udelay(500); 144 udelay(500);
184} 145}
185 146
@@ -345,16 +306,6 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_suspend);
345 306
346int pxa2xx_ac97_hw_resume(void) 307int pxa2xx_ac97_hw_resume(void)
347{ 308{
348 if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
349 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
350 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
351 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
352 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
353 }
354 if (cpu_is_pxa27x()) {
355 /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */
356 set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
357 }
358 clk_enable(ac97_clk); 309 clk_enable(ac97_clk);
359 return 0; 310 return 0;
360} 311}
@@ -386,16 +337,9 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
386 reset_gpio = 113; 337 reset_gpio = 113;
387 } 338 }
388 339
389 if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
390 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
391 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
392 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
393 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
394 }
395
396 if (cpu_is_pxa27x()) { 340 if (cpu_is_pxa27x()) {
397 /* Use GPIO 113 as AC97 Reset on Bulverde */ 341 /* Use GPIO 113 as AC97 Reset on Bulverde */
398 set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); 342 pxa27x_assert_ac97reset(reset_gpio, 0);
399 ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); 343 ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
400 if (IS_ERR(ac97conf_clk)) { 344 if (IS_ERR(ac97conf_clk)) {
401 ret = PTR_ERR(ac97conf_clk); 345 ret = PTR_ERR(ac97conf_clk);
diff --git a/sound/core/timer.c b/sound/core/timer.c
index 8f8b17ac074d..73943651caed 100644
--- a/sound/core/timer.c
+++ b/sound/core/timer.c
@@ -393,7 +393,7 @@ static void snd_timer_notify1(struct snd_timer_instance *ti, int event)
393 event == SNDRV_TIMER_EVENT_CONTINUE) 393 event == SNDRV_TIMER_EVENT_CONTINUE)
394 resolution = snd_timer_resolution(ti); 394 resolution = snd_timer_resolution(ti);
395 if (ti->ccallback) 395 if (ti->ccallback)
396 ti->ccallback(ti, SNDRV_TIMER_EVENT_START, &tstamp, resolution); 396 ti->ccallback(ti, event, &tstamp, resolution);
397 if (ti->flags & SNDRV_TIMER_IFLG_SLAVE) 397 if (ti->flags & SNDRV_TIMER_IFLG_SLAVE)
398 return; 398 return;
399 timer = ti->timer; 399 timer = ti->timer;
diff --git a/sound/isa/opti9xx/miro.c b/sound/isa/opti9xx/miro.c
index b865e45a8f9b..5913717c1be6 100644
--- a/sound/isa/opti9xx/miro.c
+++ b/sound/isa/opti9xx/miro.c
@@ -1558,7 +1558,7 @@ static int __devinit snd_card_miro_pnp(struct snd_miro *chip,
1558 1558
1559 err = pnp_activate_dev(devmc); 1559 err = pnp_activate_dev(devmc);
1560 if (err < 0) { 1560 if (err < 0) {
1561 snd_printk(KERN_ERR "OPL syntg pnp configure failure: %d\n", 1561 snd_printk(KERN_ERR "MC pnp configure failure: %d\n",
1562 err); 1562 err);
1563 return err; 1563 return err;
1564 } 1564 }
diff --git a/sound/isa/opti9xx/opti92x-ad1848.c b/sound/isa/opti9xx/opti92x-ad1848.c
index a4af53b5c1cf..4d2d0405bdc7 100644
--- a/sound/isa/opti9xx/opti92x-ad1848.c
+++ b/sound/isa/opti9xx/opti92x-ad1848.c
@@ -144,12 +144,8 @@ struct snd_opti9xx {
144 144
145 spinlock_t lock; 145 spinlock_t lock;
146 146
147 long wss_base;
147 int irq; 148 int irq;
148
149#ifdef CONFIG_PNP
150 struct pnp_dev *dev;
151 struct pnp_dev *devmpu;
152#endif /* CONFIG_PNP */
153}; 149};
154 150
155static int snd_opti9xx_pnp_is_probed; 151static int snd_opti9xx_pnp_is_probed;
@@ -159,12 +155,17 @@ static int snd_opti9xx_pnp_is_probed;
159static struct pnp_card_device_id snd_opti9xx_pnpids[] = { 155static struct pnp_card_device_id snd_opti9xx_pnpids[] = {
160#ifndef OPTi93X 156#ifndef OPTi93X
161 /* OPTi 82C924 */ 157 /* OPTi 82C924 */
162 { .id = "OPT0924", .devs = { { "OPT0000" }, { "OPT0002" } }, .driver_data = 0x0924 }, 158 { .id = "OPT0924",
159 .devs = { { "OPT0000" }, { "OPT0002" }, { "OPT0005" } },
160 .driver_data = 0x0924 },
163 /* OPTi 82C925 */ 161 /* OPTi 82C925 */
164 { .id = "OPT0925", .devs = { { "OPT9250" }, { "OPT0002" } }, .driver_data = 0x0925 }, 162 { .id = "OPT0925",
163 .devs = { { "OPT9250" }, { "OPT0002" }, { "OPT0005" } },
164 .driver_data = 0x0925 },
165#else 165#else
166 /* OPTi 82C931/3 */ 166 /* OPTi 82C931/3 */
167 { .id = "OPT0931", .devs = { { "OPT9310" }, { "OPT0002" } }, .driver_data = 0x0931 }, 167 { .id = "OPT0931", .devs = { { "OPT9310" }, { "OPT0002" } },
168 .driver_data = 0x0931 },
168#endif /* OPTi93X */ 169#endif /* OPTi93X */
169 { .id = "" } 170 { .id = "" }
170}; 171};
@@ -207,24 +208,35 @@ static int __devinit snd_opti9xx_init(struct snd_opti9xx *chip,
207 chip->hardware = hardware; 208 chip->hardware = hardware;
208 strcpy(chip->name, snd_opti9xx_names[hardware]); 209 strcpy(chip->name, snd_opti9xx_names[hardware]);
209 210
210 chip->mc_base_size = opti9xx_mc_size[hardware];
211
212 spin_lock_init(&chip->lock); 211 spin_lock_init(&chip->lock);
213 212
214 chip->irq = -1; 213 chip->irq = -1;
215 214
215#ifndef OPTi93X
216#ifdef CONFIG_PNP
217 if (isapnp && chip->mc_base)
218 /* PnP resource gives the least 10 bits */
219 chip->mc_base |= 0xc00;
220 else
221#endif /* CONFIG_PNP */
222 {
223 chip->mc_base = 0xf8c;
224 chip->mc_base_size = opti9xx_mc_size[hardware];
225 }
226#else
227 chip->mc_base_size = opti9xx_mc_size[hardware];
228#endif
229
216 switch (hardware) { 230 switch (hardware) {
217#ifndef OPTi93X 231#ifndef OPTi93X
218 case OPTi9XX_HW_82C928: 232 case OPTi9XX_HW_82C928:
219 case OPTi9XX_HW_82C929: 233 case OPTi9XX_HW_82C929:
220 chip->mc_base = 0xf8c;
221 chip->password = (hardware == OPTi9XX_HW_82C928) ? 0xe2 : 0xe3; 234 chip->password = (hardware == OPTi9XX_HW_82C928) ? 0xe2 : 0xe3;
222 chip->pwd_reg = 3; 235 chip->pwd_reg = 3;
223 break; 236 break;
224 237
225 case OPTi9XX_HW_82C924: 238 case OPTi9XX_HW_82C924:
226 case OPTi9XX_HW_82C925: 239 case OPTi9XX_HW_82C925:
227 chip->mc_base = 0xf8c;
228 chip->password = 0xe5; 240 chip->password = 0xe5;
229 chip->pwd_reg = 3; 241 chip->pwd_reg = 3;
230 break; 242 break;
@@ -292,7 +304,7 @@ static unsigned char snd_opti9xx_read(struct snd_opti9xx *chip,
292 spin_unlock_irqrestore(&chip->lock, flags); 304 spin_unlock_irqrestore(&chip->lock, flags);
293 return retval; 305 return retval;
294} 306}
295 307
296static void snd_opti9xx_write(struct snd_opti9xx *chip, unsigned char reg, 308static void snd_opti9xx_write(struct snd_opti9xx *chip, unsigned char reg,
297 unsigned char value) 309 unsigned char value)
298{ 310{
@@ -341,7 +353,7 @@ static void snd_opti9xx_write(struct snd_opti9xx *chip, unsigned char reg,
341 353
342 354
343static int __devinit snd_opti9xx_configure(struct snd_opti9xx *chip, 355static int __devinit snd_opti9xx_configure(struct snd_opti9xx *chip,
344 long wss_base, 356 long port,
345 int irq, int dma1, int dma2, 357 int irq, int dma1, int dma2,
346 long mpu_port, int mpu_irq) 358 long mpu_port, int mpu_irq)
347{ 359{
@@ -354,16 +366,23 @@ static int __devinit snd_opti9xx_configure(struct snd_opti9xx *chip,
354 switch (chip->hardware) { 366 switch (chip->hardware) {
355#ifndef OPTi93X 367#ifndef OPTi93X
356 case OPTi9XX_HW_82C924: 368 case OPTi9XX_HW_82C924:
369 /* opti 929 mode (?), OPL3 clock output, audio enable */
357 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0xf0, 0xfc); 370 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0xf0, 0xfc);
371 /* enable wave audio */
358 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x02); 372 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x02);
359 373
360 case OPTi9XX_HW_82C925: 374 case OPTi9XX_HW_82C925:
375 /* enable WSS mode */
361 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80); 376 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80);
377 /* OPL3 FM synthesis */
362 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2), 0x00, 0x20); 378 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2), 0x00, 0x20);
379 /* disable Sound Blaster IRQ and DMA */
363 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0xf0, 0xff); 380 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0xf0, 0xff);
364#ifdef CS4231 381#ifdef CS4231
382 /* cs4231/4248 fix enabled */
365 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02); 383 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02);
366#else 384#else
385 /* cs4231/4248 fix disabled */
367 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x00, 0x02); 386 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x00, 0x02);
368#endif /* CS4231 */ 387#endif /* CS4231 */
369 break; 388 break;
@@ -411,21 +430,26 @@ static int __devinit snd_opti9xx_configure(struct snd_opti9xx *chip,
411 return -EINVAL; 430 return -EINVAL;
412 } 431 }
413 432
414 switch (wss_base) { 433 /* PnP resource says it decodes only 10 bits of address */
415 case 0x530: 434 switch (port & 0x3ff) {
435 case 0x130:
436 chip->wss_base = 0x530;
416 wss_base_bits = 0x00; 437 wss_base_bits = 0x00;
417 break; 438 break;
418 case 0x604: 439 case 0x204:
440 chip->wss_base = 0x604;
419 wss_base_bits = 0x03; 441 wss_base_bits = 0x03;
420 break; 442 break;
421 case 0xe80: 443 case 0x280:
444 chip->wss_base = 0xe80;
422 wss_base_bits = 0x01; 445 wss_base_bits = 0x01;
423 break; 446 break;
424 case 0xf40: 447 case 0x340:
448 chip->wss_base = 0xf40;
425 wss_base_bits = 0x02; 449 wss_base_bits = 0x02;
426 break; 450 break;
427 default: 451 default:
428 snd_printk(KERN_WARNING "WSS port 0x%lx not valid\n", wss_base); 452 snd_printk(KERN_WARNING "WSS port 0x%lx not valid\n", port);
429 goto __skip_base; 453 goto __skip_base;
430 } 454 }
431 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), wss_base_bits << 4, 0x30); 455 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), wss_base_bits << 4, 0x30);
@@ -487,7 +511,7 @@ __skip_base:
487#endif /* CS4231 || OPTi93X */ 511#endif /* CS4231 || OPTi93X */
488 512
489#ifndef OPTi93X 513#ifndef OPTi93X
490 outb(irq_bits << 3 | dma_bits, wss_base); 514 outb(irq_bits << 3 | dma_bits, chip->wss_base);
491#else /* OPTi93X */ 515#else /* OPTi93X */
492 snd_opti9xx_write(chip, OPTi9XX_MC_REG(3), (irq_bits << 3 | dma_bits)); 516 snd_opti9xx_write(chip, OPTi9XX_MC_REG(3), (irq_bits << 3 | dma_bits));
493#endif /* OPTi93X */ 517#endif /* OPTi93X */
@@ -729,15 +753,15 @@ static int __devinit snd_card_opti9xx_pnp(struct snd_opti9xx *chip,
729{ 753{
730 struct pnp_dev *pdev; 754 struct pnp_dev *pdev;
731 int err; 755 int err;
756 struct pnp_dev *devmpu;
757#ifndef OPTi93X
758 struct pnp_dev *devmc;
759#endif
732 760
733 chip->dev = pnp_request_card_device(card, pid->devs[0].id, NULL); 761 pdev = pnp_request_card_device(card, pid->devs[0].id, NULL);
734 if (chip->dev == NULL) 762 if (pdev == NULL)
735 return -EBUSY; 763 return -EBUSY;
736 764
737 chip->devmpu = pnp_request_card_device(card, pid->devs[1].id, NULL);
738
739 pdev = chip->dev;
740
741 err = pnp_activate_dev(pdev); 765 err = pnp_activate_dev(pdev);
742 if (err < 0) { 766 if (err < 0) {
743 snd_printk(KERN_ERR "AUDIO pnp configure failure: %d\n", err); 767 snd_printk(KERN_ERR "AUDIO pnp configure failure: %d\n", err);
@@ -750,9 +774,24 @@ static int __devinit snd_card_opti9xx_pnp(struct snd_opti9xx *chip,
750 chip->mc_indir_index = pnp_port_start(pdev, 3) + 2; 774 chip->mc_indir_index = pnp_port_start(pdev, 3) + 2;
751 chip->mc_indir_size = pnp_port_len(pdev, 3) - 2; 775 chip->mc_indir_size = pnp_port_len(pdev, 3) - 2;
752#else 776#else
753 if (pid->driver_data != 0x0924) 777 devmc = pnp_request_card_device(card, pid->devs[2].id, NULL);
754 port = pnp_port_start(pdev, 1); 778 if (devmc == NULL)
779 return -EBUSY;
780
781 err = pnp_activate_dev(devmc);
782 if (err < 0) {
783 snd_printk(KERN_ERR "MC pnp configure failure: %d\n", err);
784 return err;
785 }
786
787 port = pnp_port_start(pdev, 1);
755 fm_port = pnp_port_start(pdev, 2) + 8; 788 fm_port = pnp_port_start(pdev, 2) + 8;
789 /*
790 * The MC(0) is never accessed and card does not
791 * include it in the PnP resource range. OPTI93x include it.
792 */
793 chip->mc_base = pnp_port_start(devmc, 0) - 1;
794 chip->mc_base_size = pnp_port_len(devmc, 0) + 1;
756#endif /* OPTi93X */ 795#endif /* OPTi93X */
757 irq = pnp_irq(pdev, 0); 796 irq = pnp_irq(pdev, 0);
758 dma1 = pnp_dma(pdev, 0); 797 dma1 = pnp_dma(pdev, 0);
@@ -760,16 +799,16 @@ static int __devinit snd_card_opti9xx_pnp(struct snd_opti9xx *chip,
760 dma2 = pnp_dma(pdev, 1); 799 dma2 = pnp_dma(pdev, 1);
761#endif /* CS4231 || OPTi93X */ 800#endif /* CS4231 || OPTi93X */
762 801
763 pdev = chip->devmpu; 802 devmpu = pnp_request_card_device(card, pid->devs[1].id, NULL);
764 if (pdev && mpu_port > 0) { 803
765 err = pnp_activate_dev(pdev); 804 if (devmpu && mpu_port > 0) {
805 err = pnp_activate_dev(devmpu);
766 if (err < 0) { 806 if (err < 0) {
767 snd_printk(KERN_ERR "AUDIO pnp configure failure\n"); 807 snd_printk(KERN_ERR "MPU401 pnp configure failure\n");
768 mpu_port = -1; 808 mpu_port = -1;
769 chip->devmpu = NULL;
770 } else { 809 } else {
771 mpu_port = pnp_port_start(pdev, 0); 810 mpu_port = pnp_port_start(devmpu, 0);
772 mpu_irq = pnp_irq(pdev, 0); 811 mpu_irq = pnp_irq(devmpu, 0);
773 } 812 }
774 } 813 }
775 return pid->driver_data; 814 return pid->driver_data;
@@ -824,7 +863,7 @@ static int __devinit snd_opti9xx_probe(struct snd_card *card)
824 if (error) 863 if (error)
825 return error; 864 return error;
826 865
827 error = snd_wss_create(card, port + 4, -1, irq, dma1, xdma2, 866 error = snd_wss_create(card, chip->wss_base + 4, -1, irq, dma1, xdma2,
828#ifdef OPTi93X 867#ifdef OPTi93X
829 WSS_HW_OPTI93X, WSS_HWSHARE_IRQ, 868 WSS_HW_OPTI93X, WSS_HWSHARE_IRQ,
830#else 869#else
@@ -865,10 +904,11 @@ static int __devinit snd_opti9xx_probe(struct snd_card *card)
865 sprintf(card->shortname, "OPTi %s", card->driver); 904 sprintf(card->shortname, "OPTi %s", card->driver);
866#if defined(CS4231) || defined(OPTi93X) 905#if defined(CS4231) || defined(OPTi93X)
867 sprintf(card->longname, "%s, %s at 0x%lx, irq %d, dma %d&%d", 906 sprintf(card->longname, "%s, %s at 0x%lx, irq %d, dma %d&%d",
868 card->shortname, pcm->name, port + 4, irq, dma1, xdma2); 907 card->shortname, pcm->name,
908 chip->wss_base + 4, irq, dma1, xdma2);
869#else 909#else
870 sprintf(card->longname, "%s, %s at 0x%lx, irq %d, dma %d", 910 sprintf(card->longname, "%s, %s at 0x%lx, irq %d, dma %d",
871 card->shortname, pcm->name, port + 4, irq, dma1); 911 card->shortname, pcm->name, chip->wss_base + 4, irq, dma1);
872#endif /* CS4231 || OPTi93X */ 912#endif /* CS4231 || OPTi93X */
873 913
874 if (mpu_port <= 0 || mpu_port == SNDRV_AUTO_PORT) 914 if (mpu_port <= 0 || mpu_port == SNDRV_AUTO_PORT)
@@ -1062,9 +1102,6 @@ static int __devinit snd_opti9xx_pnp_probe(struct pnp_card_link *pcard,
1062 snd_card_free(card); 1102 snd_card_free(card);
1063 return error; 1103 return error;
1064 } 1104 }
1065 if (hw <= OPTi9XX_HW_82C930)
1066 chip->mc_base -= 0x80;
1067
1068 error = snd_opti9xx_read_check(chip); 1105 error = snd_opti9xx_read_check(chip);
1069 if (error) { 1106 if (error) {
1070 snd_printk(KERN_ERR "OPTI chip not found\n"); 1107 snd_printk(KERN_ERR "OPTI chip not found\n");
diff --git a/sound/isa/sb/jazz16.c b/sound/isa/sb/jazz16.c
index 8d21a3feda3a..8ccbcddf08e1 100644
--- a/sound/isa/sb/jazz16.c
+++ b/sound/isa/sb/jazz16.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/delay.h>
17#include <asm/dma.h> 18#include <asm/dma.h>
18#include <linux/isa.h> 19#include <linux/isa.h>
19#include <sound/core.h> 20#include <sound/core.h>
diff --git a/sound/oss/coproc.h b/sound/oss/coproc.h
index 7306346e9ac4..7bec21bbdd88 100644
--- a/sound/oss/coproc.h
+++ b/sound/oss/coproc.h
@@ -4,7 +4,7 @@
4 */ 4 */
5 5
6/* 6/*
7 * Coprocessor access types 7 * Coprocessor access types
8 */ 8 */
9#define COPR_CUSTOM 0x0001 /* Custom applications */ 9#define COPR_CUSTOM 0x0001 /* Custom applications */
10#define COPR_MIDI 0x0002 /* MIDI (MPU-401) emulation */ 10#define COPR_MIDI 0x0002 /* MIDI (MPU-401) emulation */
diff --git a/sound/oss/v_midi.h b/sound/oss/v_midi.h
index 1b86cb45c607..08e2185ee816 100644
--- a/sound/oss/v_midi.h
+++ b/sound/oss/v_midi.h
@@ -2,9 +2,9 @@ typedef struct vmidi_devc {
2 int dev; 2 int dev;
3 3
4 /* State variables */ 4 /* State variables */
5 int opened; 5 int opened;
6 spinlock_t lock; 6 spinlock_t lock;
7 7
8 /* MIDI fields */ 8 /* MIDI fields */
9 int my_mididev; 9 int my_mididev;
10 int pair_mididev; 10 int pair_mididev;
@@ -12,4 +12,3 @@ typedef struct vmidi_devc {
12 int intr_active; 12 int intr_active;
13 void (*midi_input_intr) (int dev, unsigned char data); 13 void (*midi_input_intr) (int dev, unsigned char data);
14 } vmidi_devc; 14 } vmidi_devc;
15
diff --git a/sound/pci/hda/Kconfig b/sound/pci/hda/Kconfig
index 556cff937be7..567348b05b5a 100644
--- a/sound/pci/hda/Kconfig
+++ b/sound/pci/hda/Kconfig
@@ -157,7 +157,7 @@ config SND_HDA_CODEC_INTELHDMI
157 157
158config SND_HDA_ELD 158config SND_HDA_ELD
159 def_bool y 159 def_bool y
160 depends on SND_HDA_CODEC_INTELHDMI 160 depends on SND_HDA_CODEC_INTELHDMI || SND_HDA_CODEC_NVHDMI
161 161
162config SND_HDA_CODEC_CIRRUS 162config SND_HDA_CODEC_CIRRUS
163 bool "Build Cirrus Logic codec support" 163 bool "Build Cirrus Logic codec support"
diff --git a/sound/pci/hda/Makefile b/sound/pci/hda/Makefile
index 315a1c4f8998..24bc195b02da 100644
--- a/sound/pci/hda/Makefile
+++ b/sound/pci/hda/Makefile
@@ -3,7 +3,7 @@ snd-hda-intel-objs := hda_intel.o
3snd-hda-codec-y := hda_codec.o 3snd-hda-codec-y := hda_codec.o
4snd-hda-codec-$(CONFIG_SND_HDA_GENERIC) += hda_generic.o 4snd-hda-codec-$(CONFIG_SND_HDA_GENERIC) += hda_generic.o
5snd-hda-codec-$(CONFIG_PROC_FS) += hda_proc.o 5snd-hda-codec-$(CONFIG_PROC_FS) += hda_proc.o
6# snd-hda-codec-$(CONFIG_SND_HDA_ELD) += hda_eld.o 6snd-hda-codec-$(CONFIG_SND_HDA_ELD) += hda_eld.o
7snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o 7snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o
8snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o 8snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o
9 9
@@ -18,7 +18,7 @@ snd-hda-codec-ca0110-objs := patch_ca0110.o
18snd-hda-codec-conexant-objs := patch_conexant.o 18snd-hda-codec-conexant-objs := patch_conexant.o
19snd-hda-codec-via-objs := patch_via.o 19snd-hda-codec-via-objs := patch_via.o
20snd-hda-codec-nvhdmi-objs := patch_nvhdmi.o 20snd-hda-codec-nvhdmi-objs := patch_nvhdmi.o
21snd-hda-codec-intelhdmi-objs := patch_intelhdmi.o hda_eld.o 21snd-hda-codec-intelhdmi-objs := patch_intelhdmi.o
22 22
23# common driver 23# common driver
24obj-$(CONFIG_SND_HDA_INTEL) := snd-hda-codec.o 24obj-$(CONFIG_SND_HDA_INTEL) := snd-hda-codec.o
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index 76d3c4c049db..5bd7cf45f3a5 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -978,8 +978,9 @@ static void hda_set_power_state(struct hda_codec *codec, hda_nid_t fg,
978 * 978 *
979 * Returns 0 if successful, or a negative error code. 979 * Returns 0 if successful, or a negative error code.
980 */ 980 */
981int /*__devinit*/ snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr, 981int /*__devinit*/ snd_hda_codec_new(struct hda_bus *bus,
982 struct hda_codec **codecp) 982 unsigned int codec_addr,
983 struct hda_codec **codecp)
983{ 984{
984 struct hda_codec *codec; 985 struct hda_codec *codec;
985 char component[31]; 986 char component[31];
@@ -1186,7 +1187,7 @@ EXPORT_SYMBOL_HDA(snd_hda_codec_cleanup_stream);
1186 */ 1187 */
1187 1188
1188/* FIXME: more better hash key? */ 1189/* FIXME: more better hash key? */
1189#define HDA_HASH_KEY(nid,dir,idx) (u32)((nid) + ((idx) << 16) + ((dir) << 24)) 1190#define HDA_HASH_KEY(nid, dir, idx) (u32)((nid) + ((idx) << 16) + ((dir) << 24))
1190#define HDA_HASH_PINCAP_KEY(nid) (u32)((nid) + (0x02 << 24)) 1191#define HDA_HASH_PINCAP_KEY(nid) (u32)((nid) + (0x02 << 24))
1191#define HDA_HASH_PARPCM_KEY(nid) (u32)((nid) + (0x03 << 24)) 1192#define HDA_HASH_PARPCM_KEY(nid) (u32)((nid) + (0x03 << 24))
1192#define HDA_HASH_PARSTR_KEY(nid) (u32)((nid) + (0x04 << 24)) 1193#define HDA_HASH_PARSTR_KEY(nid) (u32)((nid) + (0x04 << 24))
@@ -1356,7 +1357,8 @@ u32 snd_hda_pin_sense(struct hda_codec *codec, hda_nid_t nid)
1356 if (!codec->no_trigger_sense) { 1357 if (!codec->no_trigger_sense) {
1357 pincap = snd_hda_query_pin_caps(codec, nid); 1358 pincap = snd_hda_query_pin_caps(codec, nid);
1358 if (pincap & AC_PINCAP_TRIG_REQ) /* need trigger? */ 1359 if (pincap & AC_PINCAP_TRIG_REQ) /* need trigger? */
1359 snd_hda_codec_read(codec, nid, 0, AC_VERB_SET_PIN_SENSE, 0); 1360 snd_hda_codec_read(codec, nid, 0,
1361 AC_VERB_SET_PIN_SENSE, 0);
1360 } 1362 }
1361 return snd_hda_codec_read(codec, nid, 0, 1363 return snd_hda_codec_read(codec, nid, 0,
1362 AC_VERB_GET_PIN_SENSE, 0); 1364 AC_VERB_GET_PIN_SENSE, 0);
@@ -1372,8 +1374,8 @@ EXPORT_SYMBOL_HDA(snd_hda_pin_sense);
1372 */ 1374 */
1373int snd_hda_jack_detect(struct hda_codec *codec, hda_nid_t nid) 1375int snd_hda_jack_detect(struct hda_codec *codec, hda_nid_t nid)
1374{ 1376{
1375 u32 sense = snd_hda_pin_sense(codec, nid); 1377 u32 sense = snd_hda_pin_sense(codec, nid);
1376 return !!(sense & AC_PINSENSE_PRESENCE); 1378 return !!(sense & AC_PINSENSE_PRESENCE);
1377} 1379}
1378EXPORT_SYMBOL_HDA(snd_hda_jack_detect); 1380EXPORT_SYMBOL_HDA(snd_hda_jack_detect);
1379 1381
@@ -1952,7 +1954,7 @@ int snd_hda_add_vmaster(struct hda_codec *codec, char *name,
1952 err = snd_hda_ctl_add(codec, 0, kctl); 1954 err = snd_hda_ctl_add(codec, 0, kctl);
1953 if (err < 0) 1955 if (err < 0)
1954 return err; 1956 return err;
1955 1957
1956 for (s = slaves; *s; s++) { 1958 for (s = slaves; *s; s++) {
1957 struct snd_kcontrol *sctl; 1959 struct snd_kcontrol *sctl;
1958 int i = 0; 1960 int i = 0;
@@ -2439,27 +2441,27 @@ static struct snd_kcontrol_new dig_mixes[] = {
2439 { 2441 {
2440 .access = SNDRV_CTL_ELEM_ACCESS_READ, 2442 .access = SNDRV_CTL_ELEM_ACCESS_READ,
2441 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2443 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2442 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 2444 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
2443 .info = snd_hda_spdif_mask_info, 2445 .info = snd_hda_spdif_mask_info,
2444 .get = snd_hda_spdif_cmask_get, 2446 .get = snd_hda_spdif_cmask_get,
2445 }, 2447 },
2446 { 2448 {
2447 .access = SNDRV_CTL_ELEM_ACCESS_READ, 2449 .access = SNDRV_CTL_ELEM_ACCESS_READ,
2448 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2450 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2449 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 2451 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
2450 .info = snd_hda_spdif_mask_info, 2452 .info = snd_hda_spdif_mask_info,
2451 .get = snd_hda_spdif_pmask_get, 2453 .get = snd_hda_spdif_pmask_get,
2452 }, 2454 },
2453 { 2455 {
2454 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2456 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2455 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 2457 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
2456 .info = snd_hda_spdif_mask_info, 2458 .info = snd_hda_spdif_mask_info,
2457 .get = snd_hda_spdif_default_get, 2459 .get = snd_hda_spdif_default_get,
2458 .put = snd_hda_spdif_default_put, 2460 .put = snd_hda_spdif_default_put,
2459 }, 2461 },
2460 { 2462 {
2461 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2463 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2462 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 2464 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH),
2463 .info = snd_hda_spdif_out_switch_info, 2465 .info = snd_hda_spdif_out_switch_info,
2464 .get = snd_hda_spdif_out_switch_get, 2466 .get = snd_hda_spdif_out_switch_get,
2465 .put = snd_hda_spdif_out_switch_put, 2467 .put = snd_hda_spdif_out_switch_put,
@@ -2610,7 +2612,7 @@ static int snd_hda_spdif_in_status_get(struct snd_kcontrol *kcontrol,
2610static struct snd_kcontrol_new dig_in_ctls[] = { 2612static struct snd_kcontrol_new dig_in_ctls[] = {
2611 { 2613 {
2612 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2614 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2613 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 2615 .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
2614 .info = snd_hda_spdif_in_switch_info, 2616 .info = snd_hda_spdif_in_switch_info,
2615 .get = snd_hda_spdif_in_switch_get, 2617 .get = snd_hda_spdif_in_switch_get,
2616 .put = snd_hda_spdif_in_switch_put, 2618 .put = snd_hda_spdif_in_switch_put,
@@ -2618,7 +2620,7 @@ static struct snd_kcontrol_new dig_in_ctls[] = {
2618 { 2620 {
2619 .access = SNDRV_CTL_ELEM_ACCESS_READ, 2621 .access = SNDRV_CTL_ELEM_ACCESS_READ,
2620 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2622 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2621 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), 2623 .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
2622 .info = snd_hda_spdif_mask_info, 2624 .info = snd_hda_spdif_mask_info,
2623 .get = snd_hda_spdif_in_status_get, 2625 .get = snd_hda_spdif_in_status_get,
2624 }, 2626 },
@@ -2883,7 +2885,7 @@ int /*__devinit*/ snd_hda_build_controls(struct hda_bus *bus)
2883 int err = snd_hda_codec_build_controls(codec); 2885 int err = snd_hda_codec_build_controls(codec);
2884 if (err < 0) { 2886 if (err < 0) {
2885 printk(KERN_ERR "hda_codec: cannot build controls" 2887 printk(KERN_ERR "hda_codec: cannot build controls"
2886 "for #%d (error %d)\n", codec->addr, err); 2888 "for #%d (error %d)\n", codec->addr, err);
2887 err = snd_hda_codec_reset(codec); 2889 err = snd_hda_codec_reset(codec);
2888 if (err < 0) { 2890 if (err < 0) {
2889 printk(KERN_ERR 2891 printk(KERN_ERR
@@ -2979,8 +2981,12 @@ unsigned int snd_hda_calc_stream_format(unsigned int rate,
2979 val |= channels - 1; 2981 val |= channels - 1;
2980 2982
2981 switch (snd_pcm_format_width(format)) { 2983 switch (snd_pcm_format_width(format)) {
2982 case 8: val |= 0x00; break; 2984 case 8:
2983 case 16: val |= 0x10; break; 2985 val |= 0x00;
2986 break;
2987 case 16:
2988 val |= 0x10;
2989 break;
2984 case 20: 2990 case 20:
2985 case 24: 2991 case 24:
2986 case 32: 2992 case 32:
@@ -3298,7 +3304,8 @@ static int get_empty_pcm_device(struct hda_bus *bus, int type)
3298 if (!test_and_set_bit(audio_idx[type][i], bus->pcm_dev_bits)) 3304 if (!test_and_set_bit(audio_idx[type][i], bus->pcm_dev_bits))
3299 return audio_idx[type][i]; 3305 return audio_idx[type][i];
3300 3306
3301 snd_printk(KERN_WARNING "Too many %s devices\n", snd_hda_pcm_type_name[type]); 3307 snd_printk(KERN_WARNING "Too many %s devices\n",
3308 snd_hda_pcm_type_name[type]);
3302 return -EAGAIN; 3309 return -EAGAIN;
3303} 3310}
3304 3311
@@ -3336,7 +3343,7 @@ int snd_hda_codec_build_pcms(struct hda_codec *codec)
3336 err = codec->patch_ops.build_pcms(codec); 3343 err = codec->patch_ops.build_pcms(codec);
3337 if (err < 0) { 3344 if (err < 0) {
3338 printk(KERN_ERR "hda_codec: cannot build PCMs" 3345 printk(KERN_ERR "hda_codec: cannot build PCMs"
3339 "for #%d (error %d)\n", codec->addr, err); 3346 "for #%d (error %d)\n", codec->addr, err);
3340 err = snd_hda_codec_reset(codec); 3347 err = snd_hda_codec_reset(codec);
3341 if (err < 0) { 3348 if (err < 0) {
3342 printk(KERN_ERR 3349 printk(KERN_ERR
@@ -3466,8 +3473,8 @@ EXPORT_SYMBOL_HDA(snd_hda_check_board_config);
3466 3473
3467/** 3474/**
3468 * snd_hda_check_board_codec_sid_config - compare the current codec 3475 * snd_hda_check_board_codec_sid_config - compare the current codec
3469 subsystem ID with the 3476 subsystem ID with the
3470 config table 3477 config table
3471 3478
3472 This is important for Gateway notebooks with SB450 HDA Audio 3479 This is important for Gateway notebooks with SB450 HDA Audio
3473 where the vendor ID of the PCI device is: 3480 where the vendor ID of the PCI device is:
@@ -3607,7 +3614,7 @@ void snd_hda_update_power_acct(struct hda_codec *codec)
3607 * 3614 *
3608 * Increment the power-up counter and power up the hardware really when 3615 * Increment the power-up counter and power up the hardware really when
3609 * not turned on yet. 3616 * not turned on yet.
3610 */ 3617 */
3611void snd_hda_power_up(struct hda_codec *codec) 3618void snd_hda_power_up(struct hda_codec *codec)
3612{ 3619{
3613 struct hda_bus *bus = codec->bus; 3620 struct hda_bus *bus = codec->bus;
@@ -3636,7 +3643,7 @@ EXPORT_SYMBOL_HDA(snd_hda_power_up);
3636 * 3643 *
3637 * Decrement the power-up counter and schedules the power-off work if 3644 * Decrement the power-up counter and schedules the power-off work if
3638 * the counter rearches to zero. 3645 * the counter rearches to zero.
3639 */ 3646 */
3640void snd_hda_power_down(struct hda_codec *codec) 3647void snd_hda_power_down(struct hda_codec *codec)
3641{ 3648{
3642 --codec->power_count; 3649 --codec->power_count;
@@ -3662,7 +3669,7 @@ EXPORT_SYMBOL_HDA(snd_hda_power_down);
3662 * 3669 *
3663 * This function is supposed to be set or called from the check_power_status 3670 * This function is supposed to be set or called from the check_power_status
3664 * patch ops. 3671 * patch ops.
3665 */ 3672 */
3666int snd_hda_check_amp_list_power(struct hda_codec *codec, 3673int snd_hda_check_amp_list_power(struct hda_codec *codec,
3667 struct hda_loopback_check *check, 3674 struct hda_loopback_check *check,
3668 hda_nid_t nid) 3675 hda_nid_t nid)
@@ -3830,7 +3837,7 @@ static void setup_dig_out_stream(struct hda_codec *codec, hda_nid_t nid,
3830{ 3837{
3831 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 3838 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3832 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) 3839 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
3833 set_dig_out_convert(codec, nid, 3840 set_dig_out_convert(codec, nid,
3834 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff, 3841 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff,
3835 -1); 3842 -1);
3836 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format); 3843 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
@@ -4089,13 +4096,13 @@ static int is_in_nid_list(hda_nid_t nid, hda_nid_t *list)
4089/* 4096/*
4090 * Sort an associated group of pins according to their sequence numbers. 4097 * Sort an associated group of pins according to their sequence numbers.
4091 */ 4098 */
4092static void sort_pins_by_sequence(hda_nid_t * pins, short * sequences, 4099static void sort_pins_by_sequence(hda_nid_t *pins, short *sequences,
4093 int num_pins) 4100 int num_pins)
4094{ 4101{
4095 int i, j; 4102 int i, j;
4096 short seq; 4103 short seq;
4097 hda_nid_t nid; 4104 hda_nid_t nid;
4098 4105
4099 for (i = 0; i < num_pins; i++) { 4106 for (i = 0; i < num_pins; i++) {
4100 for (j = i + 1; j < num_pins; j++) { 4107 for (j = i + 1; j < num_pins; j++) {
4101 if (sequences[i] > sequences[j]) { 4108 if (sequences[i] > sequences[j]) {
@@ -4123,7 +4130,7 @@ static void sort_pins_by_sequence(hda_nid_t * pins, short * sequences,
4123 * is detected, one of speaker of HP pins is assigned as the primary 4130 * is detected, one of speaker of HP pins is assigned as the primary
4124 * output, i.e. to line_out_pins[0]. So, line_outs is always positive 4131 * output, i.e. to line_out_pins[0]. So, line_outs is always positive
4125 * if any analog output exists. 4132 * if any analog output exists.
4126 * 4133 *
4127 * The analog input pins are assigned to input_pins array. 4134 * The analog input pins are assigned to input_pins array.
4128 * The digital input/output pins are assigned to dig_in_pin and dig_out_pin, 4135 * The digital input/output pins are assigned to dig_in_pin and dig_out_pin,
4129 * respectively. 4136 * respectively.
@@ -4186,9 +4193,9 @@ int snd_hda_parse_pin_def_config(struct hda_codec *codec,
4186 case AC_JACK_SPEAKER: 4193 case AC_JACK_SPEAKER:
4187 seq = get_defcfg_sequence(def_conf); 4194 seq = get_defcfg_sequence(def_conf);
4188 assoc = get_defcfg_association(def_conf); 4195 assoc = get_defcfg_association(def_conf);
4189 if (! assoc) 4196 if (!assoc)
4190 continue; 4197 continue;
4191 if (! assoc_speaker) 4198 if (!assoc_speaker)
4192 assoc_speaker = assoc; 4199 assoc_speaker = assoc;
4193 else if (assoc_speaker != assoc) 4200 else if (assoc_speaker != assoc)
4194 continue; 4201 continue;
@@ -4286,7 +4293,7 @@ int snd_hda_parse_pin_def_config(struct hda_codec *codec,
4286 cfg->speaker_outs); 4293 cfg->speaker_outs);
4287 sort_pins_by_sequence(cfg->hp_pins, sequences_hp, 4294 sort_pins_by_sequence(cfg->hp_pins, sequences_hp,
4288 cfg->hp_outs); 4295 cfg->hp_outs);
4289 4296
4290 /* if we have only one mic, make it AUTO_PIN_MIC */ 4297 /* if we have only one mic, make it AUTO_PIN_MIC */
4291 if (!cfg->input_pins[AUTO_PIN_MIC] && 4298 if (!cfg->input_pins[AUTO_PIN_MIC] &&
4292 cfg->input_pins[AUTO_PIN_FRONT_MIC]) { 4299 cfg->input_pins[AUTO_PIN_FRONT_MIC]) {
@@ -4436,7 +4443,7 @@ EXPORT_SYMBOL_HDA(snd_hda_resume);
4436/** 4443/**
4437 * snd_array_new - get a new element from the given array 4444 * snd_array_new - get a new element from the given array
4438 * @array: the array object 4445 * @array: the array object
4439 * 4446 *
4440 * Get a new element from the given array. If it exceeds the 4447 * Get a new element from the given array. If it exceeds the
4441 * pre-allocated array size, re-allocate the array. 4448 * pre-allocated array size, re-allocate the array.
4442 * 4449 *
diff --git a/sound/pci/hda/hda_eld.c b/sound/pci/hda/hda_eld.c
index 4228f2fe5956..dcd22446cfc7 100644
--- a/sound/pci/hda/hda_eld.c
+++ b/sound/pci/hda/hda_eld.c
@@ -331,6 +331,7 @@ int snd_hdmi_get_eld_size(struct hda_codec *codec, hda_nid_t nid)
331 return snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE, 331 return snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE,
332 AC_DIPSIZE_ELD_BUF); 332 AC_DIPSIZE_ELD_BUF);
333} 333}
334EXPORT_SYMBOL_HDA(snd_hdmi_get_eld_size);
334 335
335int snd_hdmi_get_eld(struct hdmi_eld *eld, 336int snd_hdmi_get_eld(struct hdmi_eld *eld,
336 struct hda_codec *codec, hda_nid_t nid) 337 struct hda_codec *codec, hda_nid_t nid)
@@ -366,6 +367,7 @@ int snd_hdmi_get_eld(struct hdmi_eld *eld,
366 kfree(buf); 367 kfree(buf);
367 return ret; 368 return ret;
368} 369}
370EXPORT_SYMBOL_HDA(snd_hdmi_get_eld);
369 371
370static void hdmi_show_short_audio_desc(struct cea_sad *a) 372static void hdmi_show_short_audio_desc(struct cea_sad *a)
371{ 373{
@@ -404,6 +406,7 @@ void snd_print_channel_allocation(int spk_alloc, char *buf, int buflen)
404 } 406 }
405 buf[j] = '\0'; /* necessary when j == 0 */ 407 buf[j] = '\0'; /* necessary when j == 0 */
406} 408}
409EXPORT_SYMBOL_HDA(snd_print_channel_allocation);
407 410
408void snd_hdmi_show_eld(struct hdmi_eld *e) 411void snd_hdmi_show_eld(struct hdmi_eld *e)
409{ 412{
@@ -422,6 +425,7 @@ void snd_hdmi_show_eld(struct hdmi_eld *e)
422 for (i = 0; i < e->sad_count; i++) 425 for (i = 0; i < e->sad_count; i++)
423 hdmi_show_short_audio_desc(e->sad + i); 426 hdmi_show_short_audio_desc(e->sad + i);
424} 427}
428EXPORT_SYMBOL_HDA(snd_hdmi_show_eld);
425 429
426#ifdef CONFIG_PROC_FS 430#ifdef CONFIG_PROC_FS
427 431
@@ -580,6 +584,7 @@ int snd_hda_eld_proc_new(struct hda_codec *codec, struct hdmi_eld *eld,
580 584
581 return 0; 585 return 0;
582} 586}
587EXPORT_SYMBOL_HDA(snd_hda_eld_proc_new);
583 588
584void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld) 589void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld)
585{ 590{
@@ -588,5 +593,6 @@ void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld)
588 eld->proc_entry = NULL; 593 eld->proc_entry = NULL;
589 } 594 }
590} 595}
596EXPORT_SYMBOL_HDA(snd_hda_eld_proc_free);
591 597
592#endif /* CONFIG_PROC_FS */ 598#endif /* CONFIG_PROC_FS */
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index d5c93ad852ee..da1ac9068aac 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -267,7 +267,8 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
267#define RIRB_INT_MASK 0x05 267#define RIRB_INT_MASK 0x05
268 268
269/* STATESTS int mask: S3,SD2,SD1,SD0 */ 269/* STATESTS int mask: S3,SD2,SD1,SD0 */
270#define AZX_MAX_CODECS 4 270#define AZX_MAX_CODECS 8
271#define AZX_DEFAULT_CODECS 4
271#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1) 272#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1)
272 273
273/* SD_CTL bits */ 274/* SD_CTL bits */
@@ -1367,6 +1368,7 @@ static void azx_bus_reset(struct hda_bus *bus)
1367 1368
1368/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */ 1369/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1369static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] __devinitdata = { 1370static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] __devinitdata = {
1371 [AZX_DRIVER_NVIDIA] = 8,
1370 [AZX_DRIVER_TERA] = 1, 1372 [AZX_DRIVER_TERA] = 1,
1371}; 1373};
1372 1374
@@ -1399,7 +1401,7 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model)
1399 codecs = 0; 1401 codecs = 0;
1400 max_slots = azx_max_codecs[chip->driver_type]; 1402 max_slots = azx_max_codecs[chip->driver_type];
1401 if (!max_slots) 1403 if (!max_slots)
1402 max_slots = AZX_MAX_CODECS; 1404 max_slots = AZX_DEFAULT_CODECS;
1403 1405
1404 /* First try to probe all given codec slots */ 1406 /* First try to probe all given codec slots */
1405 for (c = 0; c < max_slots; c++) { 1407 for (c = 0; c < max_slots; c++) {
@@ -2263,10 +2265,12 @@ static int azx_dev_free(struct snd_device *device)
2263static struct snd_pci_quirk position_fix_list[] __devinitdata = { 2265static struct snd_pci_quirk position_fix_list[] __devinitdata = {
2264 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB), 2266 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
2265 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB), 2267 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
2268 SND_PCI_QUIRK(0x1028, 0x01f6, "Dell Latitude 131L", POS_FIX_LPIB),
2266 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB), 2269 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
2267 SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), 2270 SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB),
2268 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), 2271 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
2269 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB), 2272 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
2273 SND_PCI_QUIRK(0x1565, 0x820f, "Biostar Microtech", POS_FIX_LPIB),
2270 {} 2274 {}
2271}; 2275};
2272 2276
@@ -2354,6 +2358,8 @@ static void __devinit check_probe_mask(struct azx *chip, int dev)
2354static struct snd_pci_quirk msi_black_list[] __devinitdata = { 2358static struct snd_pci_quirk msi_black_list[] __devinitdata = {
2355 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */ 2359 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
2356 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */ 2360 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
2361 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
2362 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
2357 {} 2363 {}
2358}; 2364};
2359 2365
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
new file mode 100644
index 000000000000..2c2bafbf0258
--- /dev/null
+++ b/sound/pci/hda/patch_hdmi.c
@@ -0,0 +1,849 @@
1/*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Wu Fengguang <wfg@linux.intel.com>
9 *
10 * Maintained by:
11 * Wu Fengguang <wfg@linux.intel.com>
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the Free
15 * Software Foundation; either version 2 of the License, or (at your option)
16 * any later version.
17 *
18 * This program is distributed in the hope that it will be useful, but
19 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
20 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
21 * for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software Foundation,
25 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 */
27
28
29struct hdmi_spec {
30 int num_cvts;
31 int num_pins;
32 hda_nid_t cvt[MAX_HDMI_CVTS+1]; /* audio sources */
33 hda_nid_t pin[MAX_HDMI_PINS+1]; /* audio sinks */
34
35 /*
36 * source connection for each pin
37 */
38 hda_nid_t pin_cvt[MAX_HDMI_PINS+1];
39
40 /*
41 * HDMI sink attached to each pin
42 */
43 struct hdmi_eld sink_eld[MAX_HDMI_PINS];
44
45 /*
46 * export one pcm per pipe
47 */
48 struct hda_pcm pcm_rec[MAX_HDMI_CVTS];
49
50 /*
51 * nvhdmi specific
52 */
53 struct hda_multi_out multiout;
54 unsigned int codec_type;
55};
56
57
58struct hdmi_audio_infoframe {
59 u8 type; /* 0x84 */
60 u8 ver; /* 0x01 */
61 u8 len; /* 0x0a */
62
63 u8 checksum; /* PB0 */
64 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
65 u8 SS01_SF24;
66 u8 CXT04;
67 u8 CA;
68 u8 LFEPBL01_LSV36_DM_INH7;
69 u8 reserved[5]; /* PB6 - PB10 */
70};
71
72/*
73 * CEA speaker placement:
74 *
75 * FLH FCH FRH
76 * FLW FL FLC FC FRC FR FRW
77 *
78 * LFE
79 * TC
80 *
81 * RL RLC RC RRC RR
82 *
83 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
84 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
85 */
86enum cea_speaker_placement {
87 FL = (1 << 0), /* Front Left */
88 FC = (1 << 1), /* Front Center */
89 FR = (1 << 2), /* Front Right */
90 FLC = (1 << 3), /* Front Left Center */
91 FRC = (1 << 4), /* Front Right Center */
92 RL = (1 << 5), /* Rear Left */
93 RC = (1 << 6), /* Rear Center */
94 RR = (1 << 7), /* Rear Right */
95 RLC = (1 << 8), /* Rear Left Center */
96 RRC = (1 << 9), /* Rear Right Center */
97 LFE = (1 << 10), /* Low Frequency Effect */
98 FLW = (1 << 11), /* Front Left Wide */
99 FRW = (1 << 12), /* Front Right Wide */
100 FLH = (1 << 13), /* Front Left High */
101 FCH = (1 << 14), /* Front Center High */
102 FRH = (1 << 15), /* Front Right High */
103 TC = (1 << 16), /* Top Center */
104};
105
106/*
107 * ELD SA bits in the CEA Speaker Allocation data block
108 */
109static int eld_speaker_allocation_bits[] = {
110 [0] = FL | FR,
111 [1] = LFE,
112 [2] = FC,
113 [3] = RL | RR,
114 [4] = RC,
115 [5] = FLC | FRC,
116 [6] = RLC | RRC,
117 /* the following are not defined in ELD yet */
118 [7] = FLW | FRW,
119 [8] = FLH | FRH,
120 [9] = TC,
121 [10] = FCH,
122};
123
124struct cea_channel_speaker_allocation {
125 int ca_index;
126 int speakers[8];
127
128 /* derived values, just for convenience */
129 int channels;
130 int spk_mask;
131};
132
133/*
134 * ALSA sequence is:
135 *
136 * surround40 surround41 surround50 surround51 surround71
137 * ch0 front left = = = =
138 * ch1 front right = = = =
139 * ch2 rear left = = = =
140 * ch3 rear right = = = =
141 * ch4 LFE center center center
142 * ch5 LFE LFE
143 * ch6 side left
144 * ch7 side right
145 *
146 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
147 */
148static int hdmi_channel_mapping[0x32][8] = {
149 /* stereo */
150 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
151 /* 2.1 */
152 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
153 /* Dolby Surround */
154 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
155 /* surround40 */
156 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
157 /* 4ch */
158 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
159 /* surround41 */
160 [0x09] = { 0x00, 0x11, 0x24, 0x34, 0x43, 0xf2, 0xf6, 0xf7 },
161 /* surround50 */
162 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
163 /* surround51 */
164 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
165 /* 7.1 */
166 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
167};
168
169/*
170 * This is an ordered list!
171 *
172 * The preceding ones have better chances to be selected by
173 * hdmi_setup_channel_allocation().
174 */
175static struct cea_channel_speaker_allocation channel_allocations[] = {
176/* channel: 7 6 5 4 3 2 1 0 */
177{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
178 /* 2.1 */
179{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
180 /* Dolby Surround */
181{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
182 /* surround40 */
183{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
184 /* surround41 */
185{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
186 /* surround50 */
187{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
188 /* surround51 */
189{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
190 /* 6.1 */
191{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
192 /* surround71 */
193{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
194
195{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
196{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
197{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
198{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
199{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
200{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
201{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
202{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
203{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
204{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
205{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
206{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
207{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
208{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
209{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
210{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
211{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
212{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
213{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
214{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
215{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
216{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
217{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
218{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
219{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
220{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
221{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
222{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
223{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
224{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
225{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
226{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
227{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
228{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
229{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
230{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
231{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
232{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
233{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
234{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
235{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
236};
237
238
239/*
240 * HDMI routines
241 */
242
243static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
244{
245 int i;
246
247 for (i = 0; nids[i]; i++)
248 if (nids[i] == nid)
249 return i;
250
251 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
252 return -EINVAL;
253}
254
255static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
256 struct hdmi_eld *eld)
257{
258 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
259 snd_hdmi_show_eld(eld);
260}
261
262#ifdef BE_PARANOID
263static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
264 int *packet_index, int *byte_index)
265{
266 int val;
267
268 val = snd_hda_codec_read(codec, pin_nid, 0,
269 AC_VERB_GET_HDMI_DIP_INDEX, 0);
270
271 *packet_index = val >> 5;
272 *byte_index = val & 0x1f;
273}
274#endif
275
276static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
277 int packet_index, int byte_index)
278{
279 int val;
280
281 val = (packet_index << 5) | (byte_index & 0x1f);
282
283 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
284}
285
286static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
287 unsigned char val)
288{
289 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
290}
291
292static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
293{
294 /* Unmute */
295 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
296 snd_hda_codec_write(codec, pin_nid, 0,
297 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
298 /* Enable pin out */
299 snd_hda_codec_write(codec, pin_nid, 0,
300 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
301}
302
303static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
304{
305 return 1 + snd_hda_codec_read(codec, nid, 0,
306 AC_VERB_GET_CVT_CHAN_COUNT, 0);
307}
308
309static void hdmi_set_channel_count(struct hda_codec *codec,
310 hda_nid_t nid, int chs)
311{
312 if (chs != hdmi_get_channel_count(codec, nid))
313 snd_hda_codec_write(codec, nid, 0,
314 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
315}
316
317
318/*
319 * Channel mapping routines
320 */
321
322/*
323 * Compute derived values in channel_allocations[].
324 */
325static void init_channel_allocations(void)
326{
327 int i, j;
328 struct cea_channel_speaker_allocation *p;
329
330 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
331 p = channel_allocations + i;
332 p->channels = 0;
333 p->spk_mask = 0;
334 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
335 if (p->speakers[j]) {
336 p->channels++;
337 p->spk_mask |= p->speakers[j];
338 }
339 }
340}
341
342/*
343 * The transformation takes two steps:
344 *
345 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
346 * spk_mask => (channel_allocations[]) => ai->CA
347 *
348 * TODO: it could select the wrong CA from multiple candidates.
349*/
350static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
351 struct hdmi_audio_infoframe *ai)
352{
353 struct hdmi_spec *spec = codec->spec;
354 struct hdmi_eld *eld;
355 int i;
356 int spk_mask = 0;
357 int channels = 1 + (ai->CC02_CT47 & 0x7);
358 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
359
360 /*
361 * CA defaults to 0 for basic stereo audio
362 */
363 if (channels <= 2)
364 return 0;
365
366 i = hda_node_index(spec->pin_cvt, nid);
367 if (i < 0)
368 return 0;
369 eld = &spec->sink_eld[i];
370
371 /*
372 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
373 * in console or for audio devices. Assume the highest speakers
374 * configuration, to _not_ prohibit multi-channel audio playback.
375 */
376 if (!eld->spk_alloc)
377 eld->spk_alloc = 0xffff;
378
379 /*
380 * expand ELD's speaker allocation mask
381 *
382 * ELD tells the speaker mask in a compact(paired) form,
383 * expand ELD's notions to match the ones used by Audio InfoFrame.
384 */
385 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
386 if (eld->spk_alloc & (1 << i))
387 spk_mask |= eld_speaker_allocation_bits[i];
388 }
389
390 /* search for the first working match in the CA table */
391 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
392 if (channels == channel_allocations[i].channels &&
393 (spk_mask & channel_allocations[i].spk_mask) ==
394 channel_allocations[i].spk_mask) {
395 ai->CA = channel_allocations[i].ca_index;
396 break;
397 }
398 }
399
400 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
401 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
402 ai->CA, channels, buf);
403
404 return ai->CA;
405}
406
407static void hdmi_debug_channel_mapping(struct hda_codec *codec,
408 hda_nid_t pin_nid)
409{
410#ifdef CONFIG_SND_DEBUG_VERBOSE
411 int i;
412 int slot;
413
414 for (i = 0; i < 8; i++) {
415 slot = snd_hda_codec_read(codec, pin_nid, 0,
416 AC_VERB_GET_HDMI_CHAN_SLOT, i);
417 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
418 slot >> 4, slot & 0xf);
419 }
420#endif
421}
422
423
424static void hdmi_setup_channel_mapping(struct hda_codec *codec,
425 hda_nid_t pin_nid,
426 struct hdmi_audio_infoframe *ai)
427{
428 int i;
429 int ca = ai->CA;
430 int err;
431
432 if (hdmi_channel_mapping[ca][1] == 0) {
433 for (i = 0; i < channel_allocations[ca].channels; i++)
434 hdmi_channel_mapping[ca][i] = i | (i << 4);
435 for (; i < 8; i++)
436 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
437 }
438
439 for (i = 0; i < 8; i++) {
440 err = snd_hda_codec_write(codec, pin_nid, 0,
441 AC_VERB_SET_HDMI_CHAN_SLOT,
442 hdmi_channel_mapping[ca][i]);
443 if (err) {
444 snd_printdd(KERN_NOTICE
445 "HDMI: channel mapping failed\n");
446 break;
447 }
448 }
449
450 hdmi_debug_channel_mapping(codec, pin_nid);
451}
452
453
454/*
455 * Audio InfoFrame routines
456 */
457
458/*
459 * Enable Audio InfoFrame Transmission
460 */
461static void hdmi_start_infoframe_trans(struct hda_codec *codec,
462 hda_nid_t pin_nid)
463{
464 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
465 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
466 AC_DIPXMIT_BEST);
467}
468
469/*
470 * Disable Audio InfoFrame Transmission
471 */
472static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
473 hda_nid_t pin_nid)
474{
475 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
476 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
477 AC_DIPXMIT_DISABLE);
478}
479
480static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
481{
482#ifdef CONFIG_SND_DEBUG_VERBOSE
483 int i;
484 int size;
485
486 size = snd_hdmi_get_eld_size(codec, pin_nid);
487 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
488
489 for (i = 0; i < 8; i++) {
490 size = snd_hda_codec_read(codec, pin_nid, 0,
491 AC_VERB_GET_HDMI_DIP_SIZE, i);
492 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
493 }
494#endif
495}
496
497static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
498{
499#ifdef BE_PARANOID
500 int i, j;
501 int size;
502 int pi, bi;
503 for (i = 0; i < 8; i++) {
504 size = snd_hda_codec_read(codec, pin_nid, 0,
505 AC_VERB_GET_HDMI_DIP_SIZE, i);
506 if (size == 0)
507 continue;
508
509 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
510 for (j = 1; j < 1000; j++) {
511 hdmi_write_dip_byte(codec, pin_nid, 0x0);
512 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
513 if (pi != i)
514 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
515 bi, pi, i);
516 if (bi == 0) /* byte index wrapped around */
517 break;
518 }
519 snd_printd(KERN_INFO
520 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
521 i, size, j);
522 }
523#endif
524}
525
526static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
527{
528 u8 *bytes = (u8 *)ai;
529 u8 sum = 0;
530 int i;
531
532 ai->checksum = 0;
533
534 for (i = 0; i < sizeof(*ai); i++)
535 sum += bytes[i];
536
537 ai->checksum = -sum;
538}
539
540static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
541 hda_nid_t pin_nid,
542 struct hdmi_audio_infoframe *ai)
543{
544 u8 *bytes = (u8 *)ai;
545 int i;
546
547 hdmi_debug_dip_size(codec, pin_nid);
548 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
549
550 hdmi_checksum_audio_infoframe(ai);
551
552 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
553 for (i = 0; i < sizeof(*ai); i++)
554 hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
555}
556
557static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
558 struct hdmi_audio_infoframe *ai)
559{
560 u8 *bytes = (u8 *)ai;
561 u8 val;
562 int i;
563
564 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
565 != AC_DIPXMIT_BEST)
566 return false;
567
568 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
569 for (i = 0; i < sizeof(*ai); i++) {
570 val = snd_hda_codec_read(codec, pin_nid, 0,
571 AC_VERB_GET_HDMI_DIP_DATA, 0);
572 if (val != bytes[i])
573 return false;
574 }
575
576 return true;
577}
578
579static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
580 struct snd_pcm_substream *substream)
581{
582 struct hdmi_spec *spec = codec->spec;
583 hda_nid_t pin_nid;
584 int i;
585 struct hdmi_audio_infoframe ai = {
586 .type = 0x84,
587 .ver = 0x01,
588 .len = 0x0a,
589 .CC02_CT47 = substream->runtime->channels - 1,
590 };
591
592 hdmi_setup_channel_allocation(codec, nid, &ai);
593
594 for (i = 0; i < spec->num_pins; i++) {
595 if (spec->pin_cvt[i] != nid)
596 continue;
597 if (!spec->sink_eld[i].monitor_present)
598 continue;
599
600 pin_nid = spec->pin[i];
601 if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
602 snd_printdd("hdmi_setup_audio_infoframe: "
603 "cvt=%d pin=%d channels=%d\n",
604 nid, pin_nid,
605 substream->runtime->channels);
606 hdmi_setup_channel_mapping(codec, pin_nid, &ai);
607 hdmi_stop_infoframe_trans(codec, pin_nid);
608 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
609 hdmi_start_infoframe_trans(codec, pin_nid);
610 }
611 }
612}
613
614
615/*
616 * Unsolicited events
617 */
618
619static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
620{
621 struct hdmi_spec *spec = codec->spec;
622 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
623 int pind = !!(res & AC_UNSOL_RES_PD);
624 int eldv = !!(res & AC_UNSOL_RES_ELDV);
625 int index;
626
627 printk(KERN_INFO
628 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
629 tag, pind, eldv);
630
631 index = hda_node_index(spec->pin, tag);
632 if (index < 0)
633 return;
634
635 spec->sink_eld[index].monitor_present = pind;
636 spec->sink_eld[index].eld_valid = eldv;
637
638 if (pind && eldv) {
639 hdmi_get_show_eld(codec, spec->pin[index],
640 &spec->sink_eld[index]);
641 /* TODO: do real things about ELD */
642 }
643}
644
645static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
646{
647 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
648 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
649 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
650 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
651
652 printk(KERN_INFO
653 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
654 tag,
655 subtag,
656 cp_state,
657 cp_ready);
658
659 /* TODO */
660 if (cp_state)
661 ;
662 if (cp_ready)
663 ;
664}
665
666
667static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
668{
669 struct hdmi_spec *spec = codec->spec;
670 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
671 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
672
673 if (hda_node_index(spec->pin, tag) < 0) {
674 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
675 return;
676 }
677
678 if (subtag == 0)
679 hdmi_intrinsic_event(codec, res);
680 else
681 hdmi_non_intrinsic_event(codec, res);
682}
683
684/*
685 * Callbacks
686 */
687
688static void hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
689 u32 stream_tag, int format)
690{
691 int tag;
692 int fmt;
693
694 tag = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0) >> 4;
695 fmt = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_STREAM_FORMAT, 0);
696
697 snd_printdd("hdmi_setup_stream: "
698 "NID=0x%x, %sstream=0x%x, %sformat=0x%x\n",
699 nid,
700 tag == stream_tag ? "" : "new-",
701 stream_tag,
702 fmt == format ? "" : "new-",
703 format);
704
705 if (tag != stream_tag)
706 snd_hda_codec_write(codec, nid, 0,
707 AC_VERB_SET_CHANNEL_STREAMID,
708 stream_tag << 4);
709 if (fmt != format)
710 snd_hda_codec_write(codec, nid, 0,
711 AC_VERB_SET_STREAM_FORMAT, format);
712}
713
714/*
715 * HDA/HDMI auto parsing
716 */
717
718static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
719{
720 struct hdmi_spec *spec = codec->spec;
721 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
722 int conn_len, curr;
723 int index;
724
725 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
726 snd_printk(KERN_WARNING
727 "HDMI: pin %d wcaps %#x "
728 "does not support connection list\n",
729 pin_nid, get_wcaps(codec, pin_nid));
730 return -EINVAL;
731 }
732
733 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
734 HDA_MAX_CONNECTIONS);
735 if (conn_len > 1)
736 curr = snd_hda_codec_read(codec, pin_nid, 0,
737 AC_VERB_GET_CONNECT_SEL, 0);
738 else
739 curr = 0;
740
741 index = hda_node_index(spec->pin, pin_nid);
742 if (index < 0)
743 return -EINVAL;
744
745 spec->pin_cvt[index] = conn_list[curr];
746
747 return 0;
748}
749
750static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
751 struct hdmi_eld *eld)
752{
753 int present = snd_hda_pin_sense(codec, pin_nid);
754
755 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
756 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
757
758 if (present & AC_PINSENSE_ELDV)
759 hdmi_get_show_eld(codec, pin_nid, eld);
760}
761
762static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
763{
764 struct hdmi_spec *spec = codec->spec;
765
766 if (spec->num_pins >= MAX_HDMI_PINS) {
767 snd_printk(KERN_WARNING
768 "HDMI: no space for pin %d\n", pin_nid);
769 return -EINVAL;
770 }
771
772 hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
773
774 spec->pin[spec->num_pins] = pin_nid;
775 spec->num_pins++;
776
777 /*
778 * It is assumed that converter nodes come first in the node list and
779 * hence have been registered and usable now.
780 */
781 return hdmi_read_pin_conn(codec, pin_nid);
782}
783
784static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
785{
786 struct hdmi_spec *spec = codec->spec;
787
788 if (spec->num_cvts >= MAX_HDMI_CVTS) {
789 snd_printk(KERN_WARNING
790 "HDMI: no space for converter %d\n", nid);
791 return -EINVAL;
792 }
793
794 spec->cvt[spec->num_cvts] = nid;
795 spec->num_cvts++;
796
797 return 0;
798}
799
800static int hdmi_parse_codec(struct hda_codec *codec)
801{
802 hda_nid_t nid;
803 int i, nodes;
804
805 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
806 if (!nid || nodes < 0) {
807 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
808 return -EINVAL;
809 }
810
811 for (i = 0; i < nodes; i++, nid++) {
812 unsigned int caps;
813 unsigned int type;
814
815 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
816 type = get_wcaps_type(caps);
817
818 if (!(caps & AC_WCAP_DIGITAL))
819 continue;
820
821 switch (type) {
822 case AC_WID_AUD_OUT:
823 if (hdmi_add_cvt(codec, nid) < 0)
824 return -EINVAL;
825 break;
826 case AC_WID_PIN:
827 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
828 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
829 continue;
830 if (hdmi_add_pin(codec, nid) < 0)
831 return -EINVAL;
832 break;
833 }
834 }
835
836 /*
837 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
838 * can be lost and presence sense verb will become inaccurate if the
839 * HDA link is powered off at hot plug or hw initialization time.
840 */
841#ifdef CONFIG_SND_HDA_POWER_SAVE
842 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
843 AC_PWRST_EPSS))
844 codec->bus->power_keep_link_on = 1;
845#endif
846
847 return 0;
848}
849
diff --git a/sound/pci/hda/patch_intelhdmi.c b/sound/pci/hda/patch_intelhdmi.c
index 918f40378d52..88d035104cc5 100644
--- a/sound/pci/hda/patch_intelhdmi.c
+++ b/sound/pci/hda/patch_intelhdmi.c
@@ -40,815 +40,20 @@
40 * 40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes. 41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */ 42 */
43#define INTEL_HDMI_CVTS 2 43#define MAX_HDMI_CVTS 2
44#define INTEL_HDMI_PINS 3 44#define MAX_HDMI_PINS 3
45 45
46static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = { 46#include "patch_hdmi.c"
47
48static char *intel_hdmi_pcm_names[MAX_HDMI_CVTS] = {
47 "INTEL HDMI 0", 49 "INTEL HDMI 0",
48 "INTEL HDMI 1", 50 "INTEL HDMI 1",
49}; 51};
50 52
51struct intel_hdmi_spec {
52 int num_cvts;
53 int num_pins;
54 hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
55 hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
56
57 /*
58 * source connection for each pin
59 */
60 hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
61
62 /*
63 * HDMI sink attached to each pin
64 */
65 struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
66
67 /*
68 * export one pcm per pipe
69 */
70 struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
71};
72
73struct hdmi_audio_infoframe {
74 u8 type; /* 0x84 */
75 u8 ver; /* 0x01 */
76 u8 len; /* 0x0a */
77
78 u8 checksum; /* PB0 */
79 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
80 u8 SS01_SF24;
81 u8 CXT04;
82 u8 CA;
83 u8 LFEPBL01_LSV36_DM_INH7;
84 u8 reserved[5]; /* PB6 - PB10 */
85};
86
87/*
88 * CEA speaker placement:
89 *
90 * FLH FCH FRH
91 * FLW FL FLC FC FRC FR FRW
92 *
93 * LFE
94 * TC
95 *
96 * RL RLC RC RRC RR
97 *
98 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
99 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
100 */
101enum cea_speaker_placement {
102 FL = (1 << 0), /* Front Left */
103 FC = (1 << 1), /* Front Center */
104 FR = (1 << 2), /* Front Right */
105 FLC = (1 << 3), /* Front Left Center */
106 FRC = (1 << 4), /* Front Right Center */
107 RL = (1 << 5), /* Rear Left */
108 RC = (1 << 6), /* Rear Center */
109 RR = (1 << 7), /* Rear Right */
110 RLC = (1 << 8), /* Rear Left Center */
111 RRC = (1 << 9), /* Rear Right Center */
112 LFE = (1 << 10), /* Low Frequency Effect */
113 FLW = (1 << 11), /* Front Left Wide */
114 FRW = (1 << 12), /* Front Right Wide */
115 FLH = (1 << 13), /* Front Left High */
116 FCH = (1 << 14), /* Front Center High */
117 FRH = (1 << 15), /* Front Right High */
118 TC = (1 << 16), /* Top Center */
119};
120
121/*
122 * ELD SA bits in the CEA Speaker Allocation data block
123 */
124static int eld_speaker_allocation_bits[] = {
125 [0] = FL | FR,
126 [1] = LFE,
127 [2] = FC,
128 [3] = RL | RR,
129 [4] = RC,
130 [5] = FLC | FRC,
131 [6] = RLC | RRC,
132 /* the following are not defined in ELD yet */
133 [7] = FLW | FRW,
134 [8] = FLH | FRH,
135 [9] = TC,
136 [10] = FCH,
137};
138
139struct cea_channel_speaker_allocation {
140 int ca_index;
141 int speakers[8];
142
143 /* derived values, just for convenience */
144 int channels;
145 int spk_mask;
146};
147
148/*
149 * ALSA sequence is:
150 *
151 * surround40 surround41 surround50 surround51 surround71
152 * ch0 front left = = = =
153 * ch1 front right = = = =
154 * ch2 rear left = = = =
155 * ch3 rear right = = = =
156 * ch4 LFE center center center
157 * ch5 LFE LFE
158 * ch6 side left
159 * ch7 side right
160 *
161 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
162 */
163static int hdmi_channel_mapping[0x32][8] = {
164 /* stereo */
165 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
166 /* 2.1 */
167 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
168 /* Dolby Surround */
169 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
170 /* surround40 */
171 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
172 /* 4ch */
173 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
174 /* surround41 */
175 [0x09] = { 0x00, 0x11, 0x24, 0x34, 0x43, 0xf2, 0xf6, 0xf7 },
176 /* surround50 */
177 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
178 /* surround51 */
179 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
180 /* 7.1 */
181 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
182};
183
184/*
185 * This is an ordered list!
186 *
187 * The preceding ones have better chances to be selected by
188 * hdmi_setup_channel_allocation().
189 */
190static struct cea_channel_speaker_allocation channel_allocations[] = {
191/* channel: 7 6 5 4 3 2 1 0 */
192{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
193 /* 2.1 */
194{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
195 /* Dolby Surround */
196{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
197 /* surround40 */
198{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
199 /* surround41 */
200{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
201 /* surround50 */
202{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
203 /* surround51 */
204{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
205 /* 6.1 */
206{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
207 /* surround71 */
208{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
209
210{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
211{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
212{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
213{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
214{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
215{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
216{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
217{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
218{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
219{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
220{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
221{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
222{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
223{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
224{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
225{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
226{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
227{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
228{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
229{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
230{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
231{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
232{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
233{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
234{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
235{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
236{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
237{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
238{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
239{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
240{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
241{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
242{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
243{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
244{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
245{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
246{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
247{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
248{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
249{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
250{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
251};
252
253/*
254 * HDA/HDMI auto parsing
255 */
256
257static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
258{
259 int i;
260
261 for (i = 0; nids[i]; i++)
262 if (nids[i] == nid)
263 return i;
264
265 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
266 return -EINVAL;
267}
268
269static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
270{
271 struct intel_hdmi_spec *spec = codec->spec;
272 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
273 int conn_len, curr;
274 int index;
275
276 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
277 snd_printk(KERN_WARNING
278 "HDMI: pin %d wcaps %#x "
279 "does not support connection list\n",
280 pin_nid, get_wcaps(codec, pin_nid));
281 return -EINVAL;
282 }
283
284 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
285 HDA_MAX_CONNECTIONS);
286 if (conn_len > 1)
287 curr = snd_hda_codec_read(codec, pin_nid, 0,
288 AC_VERB_GET_CONNECT_SEL, 0);
289 else
290 curr = 0;
291
292 index = hda_node_index(spec->pin, pin_nid);
293 if (index < 0)
294 return -EINVAL;
295
296 spec->pin_cvt[index] = conn_list[curr];
297
298 return 0;
299}
300
301static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
302 struct hdmi_eld *eld)
303{
304 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
305 snd_hdmi_show_eld(eld);
306}
307
308static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
309 struct hdmi_eld *eld)
310{
311 int present = snd_hda_pin_sense(codec, pin_nid);
312
313 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
314 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
315
316 if (present & AC_PINSENSE_ELDV)
317 hdmi_get_show_eld(codec, pin_nid, eld);
318}
319
320static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
321{
322 struct intel_hdmi_spec *spec = codec->spec;
323
324 if (spec->num_pins >= INTEL_HDMI_PINS) {
325 snd_printk(KERN_WARNING
326 "HDMI: no space for pin %d \n", pin_nid);
327 return -EINVAL;
328 }
329
330 hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
331
332 spec->pin[spec->num_pins] = pin_nid;
333 spec->num_pins++;
334
335 /*
336 * It is assumed that converter nodes come first in the node list and
337 * hence have been registered and usable now.
338 */
339 return intel_hdmi_read_pin_conn(codec, pin_nid);
340}
341
342static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
343{
344 struct intel_hdmi_spec *spec = codec->spec;
345
346 if (spec->num_cvts >= INTEL_HDMI_CVTS) {
347 snd_printk(KERN_WARNING
348 "HDMI: no space for converter %d \n", nid);
349 return -EINVAL;
350 }
351
352 spec->cvt[spec->num_cvts] = nid;
353 spec->num_cvts++;
354
355 return 0;
356}
357
358static int intel_hdmi_parse_codec(struct hda_codec *codec)
359{
360 hda_nid_t nid;
361 int i, nodes;
362
363 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
364 if (!nid || nodes < 0) {
365 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
366 return -EINVAL;
367 }
368
369 for (i = 0; i < nodes; i++, nid++) {
370 unsigned int caps;
371 unsigned int type;
372
373 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
374 type = get_wcaps_type(caps);
375
376 if (!(caps & AC_WCAP_DIGITAL))
377 continue;
378
379 switch (type) {
380 case AC_WID_AUD_OUT:
381 if (intel_hdmi_add_cvt(codec, nid) < 0)
382 return -EINVAL;
383 break;
384 case AC_WID_PIN:
385 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
386 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
387 continue;
388 if (intel_hdmi_add_pin(codec, nid) < 0)
389 return -EINVAL;
390 break;
391 }
392 }
393
394 /*
395 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
396 * can be lost and presence sense verb will become inaccurate if the
397 * HDA link is powered off at hot plug or hw initialization time.
398 */
399#ifdef CONFIG_SND_HDA_POWER_SAVE
400 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
401 AC_PWRST_EPSS))
402 codec->bus->power_keep_link_on = 1;
403#endif
404
405 return 0;
406}
407
408/*
409 * HDMI routines
410 */
411
412#ifdef BE_PARANOID
413static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
414 int *packet_index, int *byte_index)
415{
416 int val;
417
418 val = snd_hda_codec_read(codec, pin_nid, 0,
419 AC_VERB_GET_HDMI_DIP_INDEX, 0);
420
421 *packet_index = val >> 5;
422 *byte_index = val & 0x1f;
423}
424#endif
425
426static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
427 int packet_index, int byte_index)
428{
429 int val;
430
431 val = (packet_index << 5) | (byte_index & 0x1f);
432
433 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
434}
435
436static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
437 unsigned char val)
438{
439 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
440}
441
442static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
443{
444 /* Unmute */
445 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
446 snd_hda_codec_write(codec, pin_nid, 0,
447 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
448 /* Enable pin out */
449 snd_hda_codec_write(codec, pin_nid, 0,
450 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
451}
452
453/*
454 * Enable Audio InfoFrame Transmission
455 */
456static void hdmi_start_infoframe_trans(struct hda_codec *codec,
457 hda_nid_t pin_nid)
458{
459 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
460 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
461 AC_DIPXMIT_BEST);
462}
463
464/*
465 * Disable Audio InfoFrame Transmission
466 */
467static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
468 hda_nid_t pin_nid)
469{
470 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
471 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
472 AC_DIPXMIT_DISABLE);
473}
474
475static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
476{
477 return 1 + snd_hda_codec_read(codec, nid, 0,
478 AC_VERB_GET_CVT_CHAN_COUNT, 0);
479}
480
481static void hdmi_set_channel_count(struct hda_codec *codec,
482 hda_nid_t nid, int chs)
483{
484 if (chs != hdmi_get_channel_count(codec, nid))
485 snd_hda_codec_write(codec, nid, 0,
486 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
487}
488
489static void hdmi_debug_channel_mapping(struct hda_codec *codec,
490 hda_nid_t pin_nid)
491{
492#ifdef CONFIG_SND_DEBUG_VERBOSE
493 int i;
494 int slot;
495
496 for (i = 0; i < 8; i++) {
497 slot = snd_hda_codec_read(codec, pin_nid, 0,
498 AC_VERB_GET_HDMI_CHAN_SLOT, i);
499 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
500 slot >> 4, slot & 0xf);
501 }
502#endif
503}
504
505
506/*
507 * Audio InfoFrame routines
508 */
509
510static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
511{
512#ifdef CONFIG_SND_DEBUG_VERBOSE
513 int i;
514 int size;
515
516 size = snd_hdmi_get_eld_size(codec, pin_nid);
517 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
518
519 for (i = 0; i < 8; i++) {
520 size = snd_hda_codec_read(codec, pin_nid, 0,
521 AC_VERB_GET_HDMI_DIP_SIZE, i);
522 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
523 }
524#endif
525}
526
527static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
528{
529#ifdef BE_PARANOID
530 int i, j;
531 int size;
532 int pi, bi;
533 for (i = 0; i < 8; i++) {
534 size = snd_hda_codec_read(codec, pin_nid, 0,
535 AC_VERB_GET_HDMI_DIP_SIZE, i);
536 if (size == 0)
537 continue;
538
539 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
540 for (j = 1; j < 1000; j++) {
541 hdmi_write_dip_byte(codec, pin_nid, 0x0);
542 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
543 if (pi != i)
544 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
545 bi, pi, i);
546 if (bi == 0) /* byte index wrapped around */
547 break;
548 }
549 snd_printd(KERN_INFO
550 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
551 i, size, j);
552 }
553#endif
554}
555
556static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
557{
558 u8 *bytes = (u8 *)ai;
559 u8 sum = 0;
560 int i;
561
562 ai->checksum = 0;
563
564 for (i = 0; i < sizeof(*ai); i++)
565 sum += bytes[i];
566
567 ai->checksum = - sum;
568}
569
570static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
571 hda_nid_t pin_nid,
572 struct hdmi_audio_infoframe *ai)
573{
574 u8 *bytes = (u8 *)ai;
575 int i;
576
577 hdmi_debug_dip_size(codec, pin_nid);
578 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
579
580 hdmi_checksum_audio_infoframe(ai);
581
582 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
583 for (i = 0; i < sizeof(*ai); i++)
584 hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
585}
586
587/*
588 * Compute derived values in channel_allocations[].
589 */
590static void init_channel_allocations(void)
591{
592 int i, j;
593 struct cea_channel_speaker_allocation *p;
594
595 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
596 p = channel_allocations + i;
597 p->channels = 0;
598 p->spk_mask = 0;
599 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
600 if (p->speakers[j]) {
601 p->channels++;
602 p->spk_mask |= p->speakers[j];
603 }
604 }
605}
606
607/*
608 * The transformation takes two steps:
609 *
610 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
611 * spk_mask => (channel_allocations[]) => ai->CA
612 *
613 * TODO: it could select the wrong CA from multiple candidates.
614*/
615static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
616 struct hdmi_audio_infoframe *ai)
617{
618 struct intel_hdmi_spec *spec = codec->spec;
619 struct hdmi_eld *eld;
620 int i;
621 int spk_mask = 0;
622 int channels = 1 + (ai->CC02_CT47 & 0x7);
623 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
624
625 /*
626 * CA defaults to 0 for basic stereo audio
627 */
628 if (channels <= 2)
629 return 0;
630
631 i = hda_node_index(spec->pin_cvt, nid);
632 if (i < 0)
633 return 0;
634 eld = &spec->sink_eld[i];
635
636 /*
637 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
638 * in console or for audio devices. Assume the highest speakers
639 * configuration, to _not_ prohibit multi-channel audio playback.
640 */
641 if (!eld->spk_alloc)
642 eld->spk_alloc = 0xffff;
643
644 /*
645 * expand ELD's speaker allocation mask
646 *
647 * ELD tells the speaker mask in a compact(paired) form,
648 * expand ELD's notions to match the ones used by Audio InfoFrame.
649 */
650 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
651 if (eld->spk_alloc & (1 << i))
652 spk_mask |= eld_speaker_allocation_bits[i];
653 }
654
655 /* search for the first working match in the CA table */
656 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
657 if (channels == channel_allocations[i].channels &&
658 (spk_mask & channel_allocations[i].spk_mask) ==
659 channel_allocations[i].spk_mask) {
660 ai->CA = channel_allocations[i].ca_index;
661 break;
662 }
663 }
664
665 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
666 snd_printdd(KERN_INFO
667 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
668 ai->CA, channels, buf);
669
670 return ai->CA;
671}
672
673static void hdmi_setup_channel_mapping(struct hda_codec *codec,
674 hda_nid_t pin_nid,
675 struct hdmi_audio_infoframe *ai)
676{
677 int i;
678 int ca = ai->CA;
679 int err;
680
681 if (hdmi_channel_mapping[ca][1] == 0) {
682 for (i = 0; i < channel_allocations[ca].channels; i++)
683 hdmi_channel_mapping[ca][i] = i | (i << 4);
684 for (; i < 8; i++)
685 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
686 }
687
688 for (i = 0; i < 8; i++) {
689 err = snd_hda_codec_write(codec, pin_nid, 0,
690 AC_VERB_SET_HDMI_CHAN_SLOT,
691 hdmi_channel_mapping[ca][i]);
692 if (err) {
693 snd_printdd(KERN_INFO "HDMI: channel mapping failed\n");
694 break;
695 }
696 }
697
698 hdmi_debug_channel_mapping(codec, pin_nid);
699}
700
701static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
702 struct hdmi_audio_infoframe *ai)
703{
704 u8 *bytes = (u8 *)ai;
705 u8 val;
706 int i;
707
708 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
709 != AC_DIPXMIT_BEST)
710 return false;
711
712 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
713 for (i = 0; i < sizeof(*ai); i++) {
714 val = snd_hda_codec_read(codec, pin_nid, 0,
715 AC_VERB_GET_HDMI_DIP_DATA, 0);
716 if (val != bytes[i])
717 return false;
718 }
719
720 return true;
721}
722
723static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
724 struct snd_pcm_substream *substream)
725{
726 struct intel_hdmi_spec *spec = codec->spec;
727 hda_nid_t pin_nid;
728 int i;
729 struct hdmi_audio_infoframe ai = {
730 .type = 0x84,
731 .ver = 0x01,
732 .len = 0x0a,
733 .CC02_CT47 = substream->runtime->channels - 1,
734 };
735
736 hdmi_setup_channel_allocation(codec, nid, &ai);
737
738 for (i = 0; i < spec->num_pins; i++) {
739 if (spec->pin_cvt[i] != nid)
740 continue;
741 if (!spec->sink_eld[i].monitor_present)
742 continue;
743
744 pin_nid = spec->pin[i];
745 if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
746 hdmi_setup_channel_mapping(codec, pin_nid, &ai);
747 hdmi_stop_infoframe_trans(codec, pin_nid);
748 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
749 hdmi_start_infoframe_trans(codec, pin_nid);
750 }
751 }
752}
753
754
755/* 53/*
756 * Unsolicited events 54 * HDMI callbacks
757 */ 55 */
758 56
759static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
760{
761 struct intel_hdmi_spec *spec = codec->spec;
762 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
763 int pind = !!(res & AC_UNSOL_RES_PD);
764 int eldv = !!(res & AC_UNSOL_RES_ELDV);
765 int index;
766
767 printk(KERN_INFO
768 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
769 tag, pind, eldv);
770
771 index = hda_node_index(spec->pin, tag);
772 if (index < 0)
773 return;
774
775 spec->sink_eld[index].monitor_present = pind;
776 spec->sink_eld[index].eld_valid = eldv;
777
778 if (pind && eldv) {
779 hdmi_get_show_eld(codec, spec->pin[index], &spec->sink_eld[index]);
780 /* TODO: do real things about ELD */
781 }
782}
783
784static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
785{
786 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
787 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
788 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
789 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
790
791 printk(KERN_INFO
792 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
793 tag,
794 subtag,
795 cp_state,
796 cp_ready);
797
798 /* TODO */
799 if (cp_state)
800 ;
801 if (cp_ready)
802 ;
803}
804
805
806static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
807{
808 struct intel_hdmi_spec *spec = codec->spec;
809 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
810 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
811
812 if (hda_node_index(spec->pin, tag) < 0) {
813 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
814 return;
815 }
816
817 if (subtag == 0)
818 hdmi_intrinsic_event(codec, res);
819 else
820 hdmi_non_intrinsic_event(codec, res);
821}
822
823/*
824 * Callbacks
825 */
826
827static void hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
828 u32 stream_tag, int format)
829{
830 int tag;
831 int fmt;
832
833 tag = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0) >> 4;
834 fmt = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_STREAM_FORMAT, 0);
835
836 snd_printdd("hdmi_setup_stream: "
837 "NID=0x%x, %sstream=0x%x, %sformat=0x%x\n",
838 nid,
839 tag == stream_tag ? "" : "new-",
840 stream_tag,
841 fmt == format ? "" : "new-",
842 format);
843
844 if (tag != stream_tag)
845 snd_hda_codec_write(codec, nid, 0,
846 AC_VERB_SET_CHANNEL_STREAMID, stream_tag << 4);
847 if (fmt != format)
848 snd_hda_codec_write(codec, nid, 0,
849 AC_VERB_SET_STREAM_FORMAT, format);
850}
851
852static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 57static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
853 struct hda_codec *codec, 58 struct hda_codec *codec,
854 unsigned int stream_tag, 59 unsigned int stream_tag,
@@ -882,7 +87,7 @@ static struct hda_pcm_stream intel_hdmi_pcm_playback = {
882 87
883static int intel_hdmi_build_pcms(struct hda_codec *codec) 88static int intel_hdmi_build_pcms(struct hda_codec *codec)
884{ 89{
885 struct intel_hdmi_spec *spec = codec->spec; 90 struct hdmi_spec *spec = codec->spec;
886 struct hda_pcm *info = spec->pcm_rec; 91 struct hda_pcm *info = spec->pcm_rec;
887 int i; 92 int i;
888 93
@@ -908,7 +113,7 @@ static int intel_hdmi_build_pcms(struct hda_codec *codec)
908 113
909static int intel_hdmi_build_controls(struct hda_codec *codec) 114static int intel_hdmi_build_controls(struct hda_codec *codec)
910{ 115{
911 struct intel_hdmi_spec *spec = codec->spec; 116 struct hdmi_spec *spec = codec->spec;
912 int err; 117 int err;
913 int i; 118 int i;
914 119
@@ -923,7 +128,7 @@ static int intel_hdmi_build_controls(struct hda_codec *codec)
923 128
924static int intel_hdmi_init(struct hda_codec *codec) 129static int intel_hdmi_init(struct hda_codec *codec)
925{ 130{
926 struct intel_hdmi_spec *spec = codec->spec; 131 struct hdmi_spec *spec = codec->spec;
927 int i; 132 int i;
928 133
929 for (i = 0; spec->pin[i]; i++) { 134 for (i = 0; spec->pin[i]; i++) {
@@ -937,7 +142,7 @@ static int intel_hdmi_init(struct hda_codec *codec)
937 142
938static void intel_hdmi_free(struct hda_codec *codec) 143static void intel_hdmi_free(struct hda_codec *codec)
939{ 144{
940 struct intel_hdmi_spec *spec = codec->spec; 145 struct hdmi_spec *spec = codec->spec;
941 int i; 146 int i;
942 147
943 for (i = 0; i < spec->num_pins; i++) 148 for (i = 0; i < spec->num_pins; i++)
@@ -951,12 +156,12 @@ static struct hda_codec_ops intel_hdmi_patch_ops = {
951 .free = intel_hdmi_free, 156 .free = intel_hdmi_free,
952 .build_pcms = intel_hdmi_build_pcms, 157 .build_pcms = intel_hdmi_build_pcms,
953 .build_controls = intel_hdmi_build_controls, 158 .build_controls = intel_hdmi_build_controls,
954 .unsol_event = intel_hdmi_unsol_event, 159 .unsol_event = hdmi_unsol_event,
955}; 160};
956 161
957static int patch_intel_hdmi(struct hda_codec *codec) 162static int patch_intel_hdmi(struct hda_codec *codec)
958{ 163{
959 struct intel_hdmi_spec *spec; 164 struct hdmi_spec *spec;
960 int i; 165 int i;
961 166
962 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 167 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
@@ -964,7 +169,7 @@ static int patch_intel_hdmi(struct hda_codec *codec)
964 return -ENOMEM; 169 return -ENOMEM;
965 170
966 codec->spec = spec; 171 codec->spec = spec;
967 if (intel_hdmi_parse_codec(codec) < 0) { 172 if (hdmi_parse_codec(codec) < 0) {
968 codec->spec = NULL; 173 codec->spec = NULL;
969 kfree(spec); 174 kfree(spec);
970 return -EINVAL; 175 return -EINVAL;
diff --git a/sound/pci/hda/patch_nvhdmi.c b/sound/pci/hda/patch_nvhdmi.c
index 6afdab09bab7..70669a246902 100644
--- a/sound/pci/hda/patch_nvhdmi.c
+++ b/sound/pci/hda/patch_nvhdmi.c
@@ -29,13 +29,23 @@
29#include "hda_codec.h" 29#include "hda_codec.h"
30#include "hda_local.h" 30#include "hda_local.h"
31 31
32#define MAX_HDMI_CVTS 1
33#define MAX_HDMI_PINS 1
34
35#include "patch_hdmi.c"
36
37static char *nvhdmi_pcm_names[MAX_HDMI_CVTS] = {
38 "NVIDIA HDMI",
39};
40
32/* define below to restrict the supported rates and formats */ 41/* define below to restrict the supported rates and formats */
33/* #define LIMITED_RATE_FMT_SUPPORT */ 42/* #define LIMITED_RATE_FMT_SUPPORT */
34 43
35struct nvhdmi_spec { 44enum HDACodec {
36 struct hda_multi_out multiout; 45 HDA_CODEC_NVIDIA_MCP7X,
37 46 HDA_CODEC_NVIDIA_MCP89,
38 struct hda_pcm pcm_rec; 47 HDA_CODEC_NVIDIA_GT21X,
48 HDA_CODEC_INVALID
39}; 49};
40 50
41#define Nv_VERB_SET_Channel_Allocation 0xF79 51#define Nv_VERB_SET_Channel_Allocation 0xF79
@@ -43,15 +53,18 @@ struct nvhdmi_spec {
43#define Nv_VERB_SET_Audio_Protection_On 0xF98 53#define Nv_VERB_SET_Audio_Protection_On 0xF98
44#define Nv_VERB_SET_Audio_Protection_Off 0xF99 54#define Nv_VERB_SET_Audio_Protection_Off 0xF99
45 55
46#define Nv_Master_Convert_nid 0x04 56#define nvhdmi_master_con_nid_7x 0x04
47#define Nv_Master_Pin_nid 0x05 57#define nvhdmi_master_pin_nid_7x 0x05
48 58
49static hda_nid_t nvhdmi_convert_nids[4] = { 59#define nvhdmi_master_con_nid_89 0x04
60#define nvhdmi_master_pin_nid_89 0x05
61
62static hda_nid_t nvhdmi_con_nids_7x[4] = {
50 /*front, rear, clfe, rear_surr */ 63 /*front, rear, clfe, rear_surr */
51 0x6, 0x8, 0xa, 0xc, 64 0x6, 0x8, 0xa, 0xc,
52}; 65};
53 66
54static struct hda_verb nvhdmi_basic_init[] = { 67static struct hda_verb nvhdmi_basic_init_7x[] = {
55 /* set audio protect on */ 68 /* set audio protect on */
56 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 69 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
57 /* enable digital output on pin widget */ 70 /* enable digital output on pin widget */
@@ -84,22 +97,60 @@ static struct hda_verb nvhdmi_basic_init[] = {
84 */ 97 */
85static int nvhdmi_build_controls(struct hda_codec *codec) 98static int nvhdmi_build_controls(struct hda_codec *codec)
86{ 99{
87 struct nvhdmi_spec *spec = codec->spec; 100 struct hdmi_spec *spec = codec->spec;
88 int err; 101 int err;
102 int i;
89 103
90 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid); 104 if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
91 if (err < 0) 105 || (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
92 return err; 106 for (i = 0; i < codec->num_pcms; i++) {
107 err = snd_hda_create_spdif_out_ctls(codec,
108 spec->cvt[i]);
109 if (err < 0)
110 return err;
111 }
112 } else {
113 err = snd_hda_create_spdif_out_ctls(codec,
114 spec->multiout.dig_out_nid);
115 if (err < 0)
116 return err;
117 }
93 118
94 return 0; 119 return 0;
95} 120}
96 121
97static int nvhdmi_init(struct hda_codec *codec) 122static int nvhdmi_init(struct hda_codec *codec)
98{ 123{
99 snd_hda_sequence_write(codec, nvhdmi_basic_init); 124 struct hdmi_spec *spec = codec->spec;
125 int i;
126 if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
127 || (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
128 for (i = 0; spec->pin[i]; i++) {
129 hdmi_enable_output(codec, spec->pin[i]);
130 snd_hda_codec_write(codec, spec->pin[i], 0,
131 AC_VERB_SET_UNSOLICITED_ENABLE,
132 AC_USRSP_EN | spec->pin[i]);
133 }
134 } else {
135 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
136 }
100 return 0; 137 return 0;
101} 138}
102 139
140static void nvhdmi_free(struct hda_codec *codec)
141{
142 struct hdmi_spec *spec = codec->spec;
143 int i;
144
145 if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
146 || (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
147 for (i = 0; i < spec->num_pins; i++)
148 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
149 }
150
151 kfree(spec);
152}
153
103/* 154/*
104 * Digital out 155 * Digital out
105 */ 156 */
@@ -107,25 +158,25 @@ static int nvhdmi_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
107 struct hda_codec *codec, 158 struct hda_codec *codec,
108 struct snd_pcm_substream *substream) 159 struct snd_pcm_substream *substream)
109{ 160{
110 struct nvhdmi_spec *spec = codec->spec; 161 struct hdmi_spec *spec = codec->spec;
111 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 162 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
112} 163}
113 164
114static int nvhdmi_dig_playback_pcm_close_8ch(struct hda_pcm_stream *hinfo, 165static int nvhdmi_dig_playback_pcm_close_8ch_7x(struct hda_pcm_stream *hinfo,
115 struct hda_codec *codec, 166 struct hda_codec *codec,
116 struct snd_pcm_substream *substream) 167 struct snd_pcm_substream *substream)
117{ 168{
118 struct nvhdmi_spec *spec = codec->spec; 169 struct hdmi_spec *spec = codec->spec;
119 int i; 170 int i;
120 171
121 snd_hda_codec_write(codec, Nv_Master_Convert_nid, 172 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
122 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 173 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
123 for (i = 0; i < 4; i++) { 174 for (i = 0; i < 4; i++) {
124 /* set the stream id */ 175 /* set the stream id */
125 snd_hda_codec_write(codec, nvhdmi_convert_nids[i], 0, 176 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
126 AC_VERB_SET_CHANNEL_STREAMID, 0); 177 AC_VERB_SET_CHANNEL_STREAMID, 0);
127 /* set the stream format */ 178 /* set the stream format */
128 snd_hda_codec_write(codec, nvhdmi_convert_nids[i], 0, 179 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
129 AC_VERB_SET_STREAM_FORMAT, 0); 180 AC_VERB_SET_STREAM_FORMAT, 0);
130 } 181 }
131 182
@@ -136,10 +187,25 @@ static int nvhdmi_dig_playback_pcm_close_2ch(struct hda_pcm_stream *hinfo,
136 struct hda_codec *codec, 187 struct hda_codec *codec,
137 struct snd_pcm_substream *substream) 188 struct snd_pcm_substream *substream)
138{ 189{
139 struct nvhdmi_spec *spec = codec->spec; 190 struct hdmi_spec *spec = codec->spec;
140 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 191 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
141} 192}
142 193
194static int nvhdmi_dig_playback_pcm_prepare_8ch_89(struct hda_pcm_stream *hinfo,
195 struct hda_codec *codec,
196 unsigned int stream_tag,
197 unsigned int format,
198 struct snd_pcm_substream *substream)
199{
200 hdmi_set_channel_count(codec, hinfo->nid,
201 substream->runtime->channels);
202
203 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
204
205 hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
206 return 0;
207}
208
143static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo, 209static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
144 struct hda_codec *codec, 210 struct hda_codec *codec,
145 unsigned int stream_tag, 211 unsigned int stream_tag,
@@ -181,29 +247,29 @@ static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
181 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 247 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
182 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) 248 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
183 snd_hda_codec_write(codec, 249 snd_hda_codec_write(codec,
184 Nv_Master_Convert_nid, 250 nvhdmi_master_con_nid_7x,
185 0, 251 0,
186 AC_VERB_SET_DIGI_CONVERT_1, 252 AC_VERB_SET_DIGI_CONVERT_1,
187 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff); 253 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
188 254
189 /* set the stream id */ 255 /* set the stream id */
190 snd_hda_codec_write(codec, Nv_Master_Convert_nid, 0, 256 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
191 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 257 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
192 258
193 /* set the stream format */ 259 /* set the stream format */
194 snd_hda_codec_write(codec, Nv_Master_Convert_nid, 0, 260 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
195 AC_VERB_SET_STREAM_FORMAT, format); 261 AC_VERB_SET_STREAM_FORMAT, format);
196 262
197 /* turn on again (if needed) */ 263 /* turn on again (if needed) */
198 /* enable and set the channel status audio/data flag */ 264 /* enable and set the channel status audio/data flag */
199 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) { 265 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
200 snd_hda_codec_write(codec, 266 snd_hda_codec_write(codec,
201 Nv_Master_Convert_nid, 267 nvhdmi_master_con_nid_7x,
202 0, 268 0,
203 AC_VERB_SET_DIGI_CONVERT_1, 269 AC_VERB_SET_DIGI_CONVERT_1,
204 codec->spdif_ctls & 0xff); 270 codec->spdif_ctls & 0xff);
205 snd_hda_codec_write(codec, 271 snd_hda_codec_write(codec,
206 Nv_Master_Convert_nid, 272 nvhdmi_master_con_nid_7x,
207 0, 273 0,
208 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 274 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
209 } 275 }
@@ -220,19 +286,19 @@ static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
220 if (codec->spdif_status_reset && 286 if (codec->spdif_status_reset &&
221 (codec->spdif_ctls & AC_DIG1_ENABLE)) 287 (codec->spdif_ctls & AC_DIG1_ENABLE))
222 snd_hda_codec_write(codec, 288 snd_hda_codec_write(codec,
223 nvhdmi_convert_nids[i], 289 nvhdmi_con_nids_7x[i],
224 0, 290 0,
225 AC_VERB_SET_DIGI_CONVERT_1, 291 AC_VERB_SET_DIGI_CONVERT_1,
226 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff); 292 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
227 /* set the stream id */ 293 /* set the stream id */
228 snd_hda_codec_write(codec, 294 snd_hda_codec_write(codec,
229 nvhdmi_convert_nids[i], 295 nvhdmi_con_nids_7x[i],
230 0, 296 0,
231 AC_VERB_SET_CHANNEL_STREAMID, 297 AC_VERB_SET_CHANNEL_STREAMID,
232 (stream_tag << 4) | channel_id); 298 (stream_tag << 4) | channel_id);
233 /* set the stream format */ 299 /* set the stream format */
234 snd_hda_codec_write(codec, 300 snd_hda_codec_write(codec,
235 nvhdmi_convert_nids[i], 301 nvhdmi_con_nids_7x[i],
236 0, 302 0,
237 AC_VERB_SET_STREAM_FORMAT, 303 AC_VERB_SET_STREAM_FORMAT,
238 format); 304 format);
@@ -241,12 +307,12 @@ static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
241 if (codec->spdif_status_reset && 307 if (codec->spdif_status_reset &&
242 (codec->spdif_ctls & AC_DIG1_ENABLE)) { 308 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
243 snd_hda_codec_write(codec, 309 snd_hda_codec_write(codec,
244 nvhdmi_convert_nids[i], 310 nvhdmi_con_nids_7x[i],
245 0, 311 0,
246 AC_VERB_SET_DIGI_CONVERT_1, 312 AC_VERB_SET_DIGI_CONVERT_1,
247 codec->spdif_ctls & 0xff); 313 codec->spdif_ctls & 0xff);
248 snd_hda_codec_write(codec, 314 snd_hda_codec_write(codec,
249 nvhdmi_convert_nids[i], 315 nvhdmi_con_nids_7x[i],
250 0, 316 0,
251 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 317 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
252 } 318 }
@@ -261,28 +327,47 @@ static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
261 return 0; 327 return 0;
262} 328}
263 329
330static int nvhdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
331 struct hda_codec *codec,
332 struct snd_pcm_substream *substream)
333{
334 return 0;
335}
336
264static int nvhdmi_dig_playback_pcm_prepare_2ch(struct hda_pcm_stream *hinfo, 337static int nvhdmi_dig_playback_pcm_prepare_2ch(struct hda_pcm_stream *hinfo,
265 struct hda_codec *codec, 338 struct hda_codec *codec,
266 unsigned int stream_tag, 339 unsigned int stream_tag,
267 unsigned int format, 340 unsigned int format,
268 struct snd_pcm_substream *substream) 341 struct snd_pcm_substream *substream)
269{ 342{
270 struct nvhdmi_spec *spec = codec->spec; 343 struct hdmi_spec *spec = codec->spec;
271 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag, 344 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag,
272 format, substream); 345 format, substream);
273} 346}
274 347
275static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch = { 348static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch_89 = {
349 .substreams = 1,
350 .channels_min = 2,
351 .rates = SUPPORTED_RATES,
352 .maxbps = SUPPORTED_MAXBPS,
353 .formats = SUPPORTED_FORMATS,
354 .ops = {
355 .prepare = nvhdmi_dig_playback_pcm_prepare_8ch_89,
356 .cleanup = nvhdmi_playback_pcm_cleanup,
357 },
358};
359
360static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch_7x = {
276 .substreams = 1, 361 .substreams = 1,
277 .channels_min = 2, 362 .channels_min = 2,
278 .channels_max = 8, 363 .channels_max = 8,
279 .nid = Nv_Master_Convert_nid, 364 .nid = nvhdmi_master_con_nid_7x,
280 .rates = SUPPORTED_RATES, 365 .rates = SUPPORTED_RATES,
281 .maxbps = SUPPORTED_MAXBPS, 366 .maxbps = SUPPORTED_MAXBPS,
282 .formats = SUPPORTED_FORMATS, 367 .formats = SUPPORTED_FORMATS,
283 .ops = { 368 .ops = {
284 .open = nvhdmi_dig_playback_pcm_open, 369 .open = nvhdmi_dig_playback_pcm_open,
285 .close = nvhdmi_dig_playback_pcm_close_8ch, 370 .close = nvhdmi_dig_playback_pcm_close_8ch_7x,
286 .prepare = nvhdmi_dig_playback_pcm_prepare_8ch 371 .prepare = nvhdmi_dig_playback_pcm_prepare_8ch
287 }, 372 },
288}; 373};
@@ -291,7 +376,7 @@ static struct hda_pcm_stream nvhdmi_pcm_digital_playback_2ch = {
291 .substreams = 1, 376 .substreams = 1,
292 .channels_min = 2, 377 .channels_min = 2,
293 .channels_max = 2, 378 .channels_max = 2,
294 .nid = Nv_Master_Convert_nid, 379 .nid = nvhdmi_master_con_nid_7x,
295 .rates = SUPPORTED_RATES, 380 .rates = SUPPORTED_RATES,
296 .maxbps = SUPPORTED_MAXBPS, 381 .maxbps = SUPPORTED_MAXBPS,
297 .formats = SUPPORTED_FORMATS, 382 .formats = SUPPORTED_FORMATS,
@@ -302,10 +387,36 @@ static struct hda_pcm_stream nvhdmi_pcm_digital_playback_2ch = {
302 }, 387 },
303}; 388};
304 389
305static int nvhdmi_build_pcms_8ch(struct hda_codec *codec) 390static int nvhdmi_build_pcms_8ch_89(struct hda_codec *codec)
391{
392 struct hdmi_spec *spec = codec->spec;
393 struct hda_pcm *info = spec->pcm_rec;
394 int i;
395
396 codec->num_pcms = spec->num_cvts;
397 codec->pcm_info = info;
398
399 for (i = 0; i < codec->num_pcms; i++, info++) {
400 unsigned int chans;
401
402 chans = get_wcaps(codec, spec->cvt[i]);
403 chans = get_wcaps_channels(chans);
404
405 info->name = nvhdmi_pcm_names[i];
406 info->pcm_type = HDA_PCM_TYPE_HDMI;
407 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
408 = nvhdmi_pcm_digital_playback_8ch_89;
409 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
410 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
411 }
412
413 return 0;
414}
415
416static int nvhdmi_build_pcms_8ch_7x(struct hda_codec *codec)
306{ 417{
307 struct nvhdmi_spec *spec = codec->spec; 418 struct hdmi_spec *spec = codec->spec;
308 struct hda_pcm *info = &spec->pcm_rec; 419 struct hda_pcm *info = spec->pcm_rec;
309 420
310 codec->num_pcms = 1; 421 codec->num_pcms = 1;
311 codec->pcm_info = info; 422 codec->pcm_info = info;
@@ -313,15 +424,15 @@ static int nvhdmi_build_pcms_8ch(struct hda_codec *codec)
313 info->name = "NVIDIA HDMI"; 424 info->name = "NVIDIA HDMI";
314 info->pcm_type = HDA_PCM_TYPE_HDMI; 425 info->pcm_type = HDA_PCM_TYPE_HDMI;
315 info->stream[SNDRV_PCM_STREAM_PLAYBACK] 426 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
316 = nvhdmi_pcm_digital_playback_8ch; 427 = nvhdmi_pcm_digital_playback_8ch_7x;
317 428
318 return 0; 429 return 0;
319} 430}
320 431
321static int nvhdmi_build_pcms_2ch(struct hda_codec *codec) 432static int nvhdmi_build_pcms_2ch(struct hda_codec *codec)
322{ 433{
323 struct nvhdmi_spec *spec = codec->spec; 434 struct hdmi_spec *spec = codec->spec;
324 struct hda_pcm *info = &spec->pcm_rec; 435 struct hda_pcm *info = spec->pcm_rec;
325 436
326 codec->num_pcms = 1; 437 codec->num_pcms = 1;
327 codec->pcm_info = info; 438 codec->pcm_info = info;
@@ -334,14 +445,17 @@ static int nvhdmi_build_pcms_2ch(struct hda_codec *codec)
334 return 0; 445 return 0;
335} 446}
336 447
337static void nvhdmi_free(struct hda_codec *codec) 448static struct hda_codec_ops nvhdmi_patch_ops_8ch_89 = {
338{ 449 .build_controls = nvhdmi_build_controls,
339 kfree(codec->spec); 450 .build_pcms = nvhdmi_build_pcms_8ch_89,
340} 451 .init = nvhdmi_init,
452 .free = nvhdmi_free,
453 .unsol_event = hdmi_unsol_event,
454};
341 455
342static struct hda_codec_ops nvhdmi_patch_ops_8ch = { 456static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
343 .build_controls = nvhdmi_build_controls, 457 .build_controls = nvhdmi_build_controls,
344 .build_pcms = nvhdmi_build_pcms_8ch, 458 .build_pcms = nvhdmi_build_pcms_8ch_7x,
345 .init = nvhdmi_init, 459 .init = nvhdmi_init,
346 .free = nvhdmi_free, 460 .free = nvhdmi_free,
347}; 461};
@@ -353,9 +467,36 @@ static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
353 .free = nvhdmi_free, 467 .free = nvhdmi_free,
354}; 468};
355 469
356static int patch_nvhdmi_8ch(struct hda_codec *codec) 470static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
471{
472 struct hdmi_spec *spec;
473 int i;
474
475 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
476 if (spec == NULL)
477 return -ENOMEM;
478
479 codec->spec = spec;
480 spec->codec_type = HDA_CODEC_NVIDIA_MCP89;
481
482 if (hdmi_parse_codec(codec) < 0) {
483 codec->spec = NULL;
484 kfree(spec);
485 return -EINVAL;
486 }
487 codec->patch_ops = nvhdmi_patch_ops_8ch_89;
488
489 for (i = 0; i < spec->num_pins; i++)
490 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
491
492 init_channel_allocations();
493
494 return 0;
495}
496
497static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
357{ 498{
358 struct nvhdmi_spec *spec; 499 struct hdmi_spec *spec;
359 500
360 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 501 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
361 if (spec == NULL) 502 if (spec == NULL)
@@ -365,16 +506,17 @@ static int patch_nvhdmi_8ch(struct hda_codec *codec)
365 506
366 spec->multiout.num_dacs = 0; /* no analog */ 507 spec->multiout.num_dacs = 0; /* no analog */
367 spec->multiout.max_channels = 8; 508 spec->multiout.max_channels = 8;
368 spec->multiout.dig_out_nid = Nv_Master_Convert_nid; 509 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
510 spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
369 511
370 codec->patch_ops = nvhdmi_patch_ops_8ch; 512 codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
371 513
372 return 0; 514 return 0;
373} 515}
374 516
375static int patch_nvhdmi_2ch(struct hda_codec *codec) 517static int patch_nvhdmi_2ch(struct hda_codec *codec)
376{ 518{
377 struct nvhdmi_spec *spec; 519 struct hdmi_spec *spec;
378 520
379 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 521 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
380 if (spec == NULL) 522 if (spec == NULL)
@@ -384,7 +526,8 @@ static int patch_nvhdmi_2ch(struct hda_codec *codec)
384 526
385 spec->multiout.num_dacs = 0; /* no analog */ 527 spec->multiout.num_dacs = 0; /* no analog */
386 spec->multiout.max_channels = 2; 528 spec->multiout.max_channels = 2;
387 spec->multiout.dig_out_nid = Nv_Master_Convert_nid; 529 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
530 spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
388 531
389 codec->patch_ops = nvhdmi_patch_ops_2ch; 532 codec->patch_ops = nvhdmi_patch_ops_2ch;
390 533
@@ -395,13 +538,24 @@ static int patch_nvhdmi_2ch(struct hda_codec *codec)
395 * patch entries 538 * patch entries
396 */ 539 */
397static struct hda_codec_preset snd_hda_preset_nvhdmi[] = { 540static struct hda_codec_preset snd_hda_preset_nvhdmi[] = {
398 { .id = 0x10de0002, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
399 { .id = 0x10de0003, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
400 { .id = 0x10de0005, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
401 { .id = 0x10de0006, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch },
402 { .id = 0x10de0007, .name = "MCP7A HDMI", .patch = patch_nvhdmi_8ch },
403 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 541 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
404 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 542 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
543 { .id = 0x10de0002, .name = "MCP77/78 HDMI",
544 .patch = patch_nvhdmi_8ch_7x },
545 { .id = 0x10de0003, .name = "MCP77/78 HDMI",
546 .patch = patch_nvhdmi_8ch_7x },
547 { .id = 0x10de0005, .name = "MCP77/78 HDMI",
548 .patch = patch_nvhdmi_8ch_7x },
549 { .id = 0x10de0006, .name = "MCP77/78 HDMI",
550 .patch = patch_nvhdmi_8ch_7x },
551 { .id = 0x10de0007, .name = "MCP79/7A HDMI",
552 .patch = patch_nvhdmi_8ch_7x },
553 { .id = 0x10de000c, .name = "MCP89 HDMI",
554 .patch = patch_nvhdmi_8ch_89 },
555 { .id = 0x10de000b, .name = "GT21x HDMI",
556 .patch = patch_nvhdmi_8ch_89 },
557 { .id = 0x10de000d, .name = "GT240 HDMI",
558 .patch = patch_nvhdmi_8ch_89 },
405 {} /* terminator */ 559 {} /* terminator */
406}; 560};
407 561
@@ -412,9 +566,12 @@ MODULE_ALIAS("snd-hda-codec-id:10de0006");
412MODULE_ALIAS("snd-hda-codec-id:10de0007"); 566MODULE_ALIAS("snd-hda-codec-id:10de0007");
413MODULE_ALIAS("snd-hda-codec-id:10de0067"); 567MODULE_ALIAS("snd-hda-codec-id:10de0067");
414MODULE_ALIAS("snd-hda-codec-id:10de8001"); 568MODULE_ALIAS("snd-hda-codec-id:10de8001");
569MODULE_ALIAS("snd-hda-codec-id:10de000c");
570MODULE_ALIAS("snd-hda-codec-id:10de000b");
571MODULE_ALIAS("snd-hda-codec-id:10de000d");
415 572
416MODULE_LICENSE("GPL"); 573MODULE_LICENSE("GPL");
417MODULE_DESCRIPTION("Nvidia HDMI HD-audio codec"); 574MODULE_DESCRIPTION("NVIDIA HDMI HD-audio codec");
418 575
419static struct hda_codec_preset_list nvhdmi_list = { 576static struct hda_codec_preset_list nvhdmi_list = {
420 .preset = snd_hda_preset_nvhdmi, 577 .preset = snd_hda_preset_nvhdmi,
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index e8cbe216e912..3a8371990d75 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -411,6 +411,8 @@ static int alc_mux_enum_info(struct snd_kcontrol *kcontrol,
411 unsigned int mux_idx = snd_ctl_get_ioffidx(kcontrol, &uinfo->id); 411 unsigned int mux_idx = snd_ctl_get_ioffidx(kcontrol, &uinfo->id);
412 if (mux_idx >= spec->num_mux_defs) 412 if (mux_idx >= spec->num_mux_defs)
413 mux_idx = 0; 413 mux_idx = 0;
414 if (!spec->input_mux[mux_idx].num_items && mux_idx > 0)
415 mux_idx = 0;
414 return snd_hda_input_mux_info(&spec->input_mux[mux_idx], uinfo); 416 return snd_hda_input_mux_info(&spec->input_mux[mux_idx], uinfo);
415} 417}
416 418
@@ -439,6 +441,8 @@ static int alc_mux_enum_put(struct snd_kcontrol *kcontrol,
439 441
440 mux_idx = adc_idx >= spec->num_mux_defs ? 0 : adc_idx; 442 mux_idx = adc_idx >= spec->num_mux_defs ? 0 : adc_idx;
441 imux = &spec->input_mux[mux_idx]; 443 imux = &spec->input_mux[mux_idx];
444 if (!imux->num_items && mux_idx > 0)
445 imux = &spec->input_mux[0];
442 446
443 type = get_wcaps_type(get_wcaps(codec, nid)); 447 type = get_wcaps_type(get_wcaps(codec, nid));
444 if (type == AC_WID_AUD_MIX) { 448 if (type == AC_WID_AUD_MIX) {
@@ -4915,7 +4919,7 @@ static void fixup_automic_adc(struct hda_codec *codec)
4915static void fixup_single_adc(struct hda_codec *codec) 4919static void fixup_single_adc(struct hda_codec *codec)
4916{ 4920{
4917 struct alc_spec *spec = codec->spec; 4921 struct alc_spec *spec = codec->spec;
4918 hda_nid_t pin; 4922 hda_nid_t pin = 0;
4919 int i; 4923 int i;
4920 4924
4921 /* search for the input pin; there must be only one */ 4925 /* search for the input pin; there must be only one */
@@ -10105,6 +10109,8 @@ static void alc882_auto_init_input_src(struct hda_codec *codec)
10105 continue; 10109 continue;
10106 mux_idx = c >= spec->num_mux_defs ? 0 : c; 10110 mux_idx = c >= spec->num_mux_defs ? 0 : c;
10107 imux = &spec->input_mux[mux_idx]; 10111 imux = &spec->input_mux[mux_idx];
10112 if (!imux->num_items && mux_idx > 0)
10113 imux = &spec->input_mux[0];
10108 for (idx = 0; idx < conns; idx++) { 10114 for (idx = 0; idx < conns; idx++) {
10109 /* if the current connection is the selected one, 10115 /* if the current connection is the selected one,
10110 * unmute it as default - otherwise mute it 10116 * unmute it as default - otherwise mute it
@@ -13201,7 +13207,7 @@ static int patch_alc268(struct hda_codec *codec)
13201 13207
13202 if (board_config < 0 || board_config >= ALC268_MODEL_LAST) 13208 if (board_config < 0 || board_config >= ALC268_MODEL_LAST)
13203 board_config = snd_hda_check_board_codec_sid_config(codec, 13209 board_config = snd_hda_check_board_codec_sid_config(codec,
13204 ALC882_MODEL_LAST, alc268_models, alc268_ssid_cfg_tbl); 13210 ALC268_MODEL_LAST, alc268_models, alc268_ssid_cfg_tbl);
13205 13211
13206 if (board_config < 0 || board_config >= ALC268_MODEL_LAST) { 13212 if (board_config < 0 || board_config >= ALC268_MODEL_LAST) {
13207 printk(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n", 13213 printk(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
@@ -13561,6 +13567,8 @@ static void alc269_lifebook_unsol_event(struct hda_codec *codec,
13561static void alc269_quanta_fl1_setup(struct hda_codec *codec) 13567static void alc269_quanta_fl1_setup(struct hda_codec *codec)
13562{ 13568{
13563 struct alc_spec *spec = codec->spec; 13569 struct alc_spec *spec = codec->spec;
13570 spec->autocfg.hp_pins[0] = 0x15;
13571 spec->autocfg.speaker_pins[0] = 0x14;
13564 spec->ext_mic.pin = 0x18; 13572 spec->ext_mic.pin = 0x18;
13565 spec->ext_mic.mux_idx = 0; 13573 spec->ext_mic.mux_idx = 0;
13566 spec->int_mic.pin = 0x19; 13574 spec->int_mic.pin = 0x19;
@@ -13656,6 +13664,8 @@ static void alc269_laptop_unsol_event(struct hda_codec *codec,
13656static void alc269_laptop_dmic_setup(struct hda_codec *codec) 13664static void alc269_laptop_dmic_setup(struct hda_codec *codec)
13657{ 13665{
13658 struct alc_spec *spec = codec->spec; 13666 struct alc_spec *spec = codec->spec;
13667 spec->autocfg.hp_pins[0] = 0x15;
13668 spec->autocfg.speaker_pins[0] = 0x14;
13659 spec->ext_mic.pin = 0x18; 13669 spec->ext_mic.pin = 0x18;
13660 spec->ext_mic.mux_idx = 0; 13670 spec->ext_mic.mux_idx = 0;
13661 spec->int_mic.pin = 0x12; 13671 spec->int_mic.pin = 0x12;
@@ -13666,6 +13676,8 @@ static void alc269_laptop_dmic_setup(struct hda_codec *codec)
13666static void alc269vb_laptop_dmic_setup(struct hda_codec *codec) 13676static void alc269vb_laptop_dmic_setup(struct hda_codec *codec)
13667{ 13677{
13668 struct alc_spec *spec = codec->spec; 13678 struct alc_spec *spec = codec->spec;
13679 spec->autocfg.hp_pins[0] = 0x15;
13680 spec->autocfg.speaker_pins[0] = 0x14;
13669 spec->ext_mic.pin = 0x18; 13681 spec->ext_mic.pin = 0x18;
13670 spec->ext_mic.mux_idx = 0; 13682 spec->ext_mic.mux_idx = 0;
13671 spec->int_mic.pin = 0x12; 13683 spec->int_mic.pin = 0x12;
@@ -13676,6 +13688,8 @@ static void alc269vb_laptop_dmic_setup(struct hda_codec *codec)
13676static void alc269_laptop_amic_setup(struct hda_codec *codec) 13688static void alc269_laptop_amic_setup(struct hda_codec *codec)
13677{ 13689{
13678 struct alc_spec *spec = codec->spec; 13690 struct alc_spec *spec = codec->spec;
13691 spec->autocfg.hp_pins[0] = 0x15;
13692 spec->autocfg.speaker_pins[0] = 0x14;
13679 spec->ext_mic.pin = 0x18; 13693 spec->ext_mic.pin = 0x18;
13680 spec->ext_mic.mux_idx = 0; 13694 spec->ext_mic.mux_idx = 0;
13681 spec->int_mic.pin = 0x19; 13695 spec->int_mic.pin = 0x19;
diff --git a/sound/pci/oxygen/xonar_wm87x6.c b/sound/pci/oxygen/xonar_wm87x6.c
index 7754db166d9e..dbc4b89d74e4 100644
--- a/sound/pci/oxygen/xonar_wm87x6.c
+++ b/sound/pci/oxygen/xonar_wm87x6.c
@@ -68,7 +68,7 @@ static void wm8776_write(struct oxygen *chip,
68 OXYGEN_SPI_CEN_LATCH_CLOCK_LO, 68 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
69 (reg << 9) | value); 69 (reg << 9) | value);
70 if (reg < ARRAY_SIZE(data->wm8776_regs)) { 70 if (reg < ARRAY_SIZE(data->wm8776_regs)) {
71 if (reg >= WM8776_HPLVOL || reg <= WM8776_DACMASTER) 71 if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
72 value &= ~WM8776_UPDATE; 72 value &= ~WM8776_UPDATE;
73 data->wm8776_regs[reg] = value; 73 data->wm8776_regs[reg] = value;
74 } 74 }
diff --git a/sound/pci/riptide/riptide.c b/sound/pci/riptide/riptide.c
index 960a227eb653..ad4462677615 100644
--- a/sound/pci/riptide/riptide.c
+++ b/sound/pci/riptide/riptide.c
@@ -1974,9 +1974,9 @@ snd_riptide_proc_read(struct snd_info_entry *entry,
1974 } 1974 }
1975 snd_iprintf(buffer, "Paths:\n"); 1975 snd_iprintf(buffer, "Paths:\n");
1976 i = getpaths(cif, p); 1976 i = getpaths(cif, p);
1977 while (i--) { 1977 while (i >= 2) {
1978 snd_iprintf(buffer, "%x->%x ", p[i - 1], p[i]); 1978 i -= 2;
1979 i--; 1979 snd_iprintf(buffer, "%x->%x ", p[i], p[i + 1]);
1980 } 1980 }
1981 snd_iprintf(buffer, "\n"); 1981 snd_iprintf(buffer, "\n");
1982} 1982}
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index 3d72c1effeef..547b713d7204 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -2479,7 +2479,7 @@ static int snd_hdspm_put_qs_wire(struct snd_kcontrol *kcontrol,
2479 on MADICARD 2479 on MADICARD
2480 - playback mixer matrix: [channelout+64] [output] [value] 2480 - playback mixer matrix: [channelout+64] [output] [value]
2481 - input(thru) mixer matrix: [channelin] [output] [value] 2481 - input(thru) mixer matrix: [channelin] [output] [value]
2482 (better do 2 kontrols for seperation ?) 2482 (better do 2 kontrols for separation ?)
2483*/ 2483*/
2484 2484
2485#define HDSPM_MIXER(xname, xindex) \ 2485#define HDSPM_MIXER(xname, xindex) \
diff --git a/sound/soc/codecs/ak4104.c b/sound/soc/codecs/ak4104.c
index b9ef7e45891d..b68d99fb6af0 100644
--- a/sound/soc/codecs/ak4104.c
+++ b/sound/soc/codecs/ak4104.c
@@ -90,12 +90,10 @@ static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg,
90 if (reg >= codec->reg_cache_size) 90 if (reg >= codec->reg_cache_size)
91 return -EINVAL; 91 return -EINVAL;
92 92
93 reg &= AK4104_REG_MASK;
94 reg |= AK4104_WRITE;
95
96 /* only write to the hardware if value has changed */ 93 /* only write to the hardware if value has changed */
97 if (cache[reg] != value) { 94 if (cache[reg] != value) {
98 u8 tmp[2] = { reg, value }; 95 u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value };
96
99 if (spi_write(spi, tmp, sizeof(tmp))) { 97 if (spi_write(spi, tmp, sizeof(tmp))) {
100 dev_err(&spi->dev, "SPI write failed\n"); 98 dev_err(&spi->dev, "SPI write failed\n");
101 return -EIO; 99 return -EIO;
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c
index a54dc77b7f34..056b787b6ee0 100644
--- a/sound/soc/codecs/wm8990.c
+++ b/sound/soc/codecs/wm8990.c
@@ -990,7 +990,7 @@ static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
990 reg = snd_soc_read(codec, WM8990_CLOCKING_2); 990 reg = snd_soc_read(codec, WM8990_CLOCKING_2);
991 snd_soc_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC); 991 snd_soc_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC);
992 992
993 /* set up N , fractional mode and pre-divisor if neccessary */ 993 /* set up N , fractional mode and pre-divisor if necessary */
994 snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | 994 snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM |
995 (pll_div.div2?WM8990_PRESCALE:0)); 995 (pll_div.div2?WM8990_PRESCALE:0));
996 snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); 996 snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8));
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index e69397f40f72..9e95e5117c88 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -42,11 +42,14 @@
42 * SSP audio private data 42 * SSP audio private data
43 */ 43 */
44struct ssp_priv { 44struct ssp_priv {
45 struct ssp_dev dev; 45 struct ssp_device *ssp;
46 unsigned int sysclk; 46 unsigned int sysclk;
47 int dai_fmt; 47 int dai_fmt;
48#ifdef CONFIG_PM 48#ifdef CONFIG_PM
49 struct ssp_state state; 49 uint32_t cr0;
50 uint32_t cr1;
51 uint32_t to;
52 uint32_t psp;
50#endif 53#endif
51}; 54};
52 55
@@ -61,6 +64,22 @@ static void dump_registers(struct ssp_device *ssp)
61 ssp_read_reg(ssp, SSACD)); 64 ssp_read_reg(ssp, SSACD));
62} 65}
63 66
67static void ssp_enable(struct ssp_device *ssp)
68{
69 uint32_t sscr0;
70
71 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
72 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
73}
74
75static void ssp_disable(struct ssp_device *ssp)
76{
77 uint32_t sscr0;
78
79 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
80 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
81}
82
64struct pxa2xx_pcm_dma_data { 83struct pxa2xx_pcm_dma_data {
65 struct pxa2xx_pcm_dma_params params; 84 struct pxa2xx_pcm_dma_params params;
66 char name[20]; 85 char name[20];
@@ -94,13 +113,12 @@ static int pxa_ssp_startup(struct snd_pcm_substream *substream,
94 struct snd_soc_pcm_runtime *rtd = substream->private_data; 113 struct snd_soc_pcm_runtime *rtd = substream->private_data;
95 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; 114 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
96 struct ssp_priv *priv = cpu_dai->private_data; 115 struct ssp_priv *priv = cpu_dai->private_data;
116 struct ssp_device *ssp = priv->ssp;
97 int ret = 0; 117 int ret = 0;
98 118
99 if (!cpu_dai->active) { 119 if (!cpu_dai->active) {
100 priv->dev.port = cpu_dai->id + 1; 120 clk_enable(ssp->clk);
101 priv->dev.irq = NO_IRQ; 121 ssp_disable(ssp);
102 clk_enable(priv->dev.ssp->clk);
103 ssp_disable(&priv->dev);
104 } 122 }
105 123
106 if (cpu_dai->dma_data) { 124 if (cpu_dai->dma_data) {
@@ -116,10 +134,11 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
116 struct snd_soc_pcm_runtime *rtd = substream->private_data; 134 struct snd_soc_pcm_runtime *rtd = substream->private_data;
117 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; 135 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
118 struct ssp_priv *priv = cpu_dai->private_data; 136 struct ssp_priv *priv = cpu_dai->private_data;
137 struct ssp_device *ssp = priv->ssp;
119 138
120 if (!cpu_dai->active) { 139 if (!cpu_dai->active) {
121 ssp_disable(&priv->dev); 140 ssp_disable(ssp);
122 clk_disable(priv->dev.ssp->clk); 141 clk_disable(ssp->clk);
123 } 142 }
124 143
125 if (cpu_dai->dma_data) { 144 if (cpu_dai->dma_data) {
@@ -133,27 +152,39 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
133static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai) 152static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
134{ 153{
135 struct ssp_priv *priv = cpu_dai->private_data; 154 struct ssp_priv *priv = cpu_dai->private_data;
155 struct ssp_device *ssp = priv->ssp;
136 156
137 if (!cpu_dai->active) 157 if (!cpu_dai->active)
138 clk_enable(priv->dev.ssp->clk); 158 clk_enable(ssp->clk);
139 159
140 ssp_save_state(&priv->dev, &priv->state); 160 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
141 clk_disable(priv->dev.ssp->clk); 161 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
162 priv->to = __raw_readl(ssp->mmio_base + SSTO);
163 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
142 164
165 ssp_disable(ssp);
166 clk_disable(ssp->clk);
143 return 0; 167 return 0;
144} 168}
145 169
146static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai) 170static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
147{ 171{
148 struct ssp_priv *priv = cpu_dai->private_data; 172 struct ssp_priv *priv = cpu_dai->private_data;
173 struct ssp_device *ssp = priv->ssp;
174 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
175
176 clk_enable(ssp->clk);
149 177
150 clk_enable(priv->dev.ssp->clk); 178 __raw_writel(sssr, ssp->mmio_base + SSSR);
151 ssp_restore_state(&priv->dev, &priv->state); 179 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
180 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
181 __raw_writel(priv->to, ssp->mmio_base + SSTO);
182 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
152 183
153 if (cpu_dai->active) 184 if (cpu_dai->active)
154 ssp_enable(&priv->dev); 185 ssp_enable(ssp);
155 else 186 else
156 clk_disable(priv->dev.ssp->clk); 187 clk_disable(ssp->clk);
157 188
158 return 0; 189 return 0;
159} 190}
@@ -203,7 +234,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
203 int clk_id, unsigned int freq, int dir) 234 int clk_id, unsigned int freq, int dir)
204{ 235{
205 struct ssp_priv *priv = cpu_dai->private_data; 236 struct ssp_priv *priv = cpu_dai->private_data;
206 struct ssp_device *ssp = priv->dev.ssp; 237 struct ssp_device *ssp = priv->ssp;
207 int val; 238 int val;
208 239
209 u32 sscr0 = ssp_read_reg(ssp, SSCR0) & 240 u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
@@ -244,11 +275,11 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
244 /* The SSP clock must be disabled when changing SSP clock mode 275 /* The SSP clock must be disabled when changing SSP clock mode
245 * on PXA2xx. On PXA3xx it must be enabled when doing so. */ 276 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
246 if (!cpu_is_pxa3xx()) 277 if (!cpu_is_pxa3xx())
247 clk_disable(priv->dev.ssp->clk); 278 clk_disable(ssp->clk);
248 val = ssp_read_reg(ssp, SSCR0) | sscr0; 279 val = ssp_read_reg(ssp, SSCR0) | sscr0;
249 ssp_write_reg(ssp, SSCR0, val); 280 ssp_write_reg(ssp, SSCR0, val);
250 if (!cpu_is_pxa3xx()) 281 if (!cpu_is_pxa3xx())
251 clk_enable(priv->dev.ssp->clk); 282 clk_enable(ssp->clk);
252 283
253 return 0; 284 return 0;
254} 285}
@@ -260,7 +291,7 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
260 int div_id, int div) 291 int div_id, int div)
261{ 292{
262 struct ssp_priv *priv = cpu_dai->private_data; 293 struct ssp_priv *priv = cpu_dai->private_data;
263 struct ssp_device *ssp = priv->dev.ssp; 294 struct ssp_device *ssp = priv->ssp;
264 int val; 295 int val;
265 296
266 switch (div_id) { 297 switch (div_id) {
@@ -311,7 +342,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
311 int source, unsigned int freq_in, unsigned int freq_out) 342 int source, unsigned int freq_in, unsigned int freq_out)
312{ 343{
313 struct ssp_priv *priv = cpu_dai->private_data; 344 struct ssp_priv *priv = cpu_dai->private_data;
314 struct ssp_device *ssp = priv->dev.ssp; 345 struct ssp_device *ssp = priv->ssp;
315 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70; 346 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
316 347
317#if defined(CONFIG_PXA3xx) 348#if defined(CONFIG_PXA3xx)
@@ -380,7 +411,7 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
380 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) 411 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
381{ 412{
382 struct ssp_priv *priv = cpu_dai->private_data; 413 struct ssp_priv *priv = cpu_dai->private_data;
383 struct ssp_device *ssp = priv->dev.ssp; 414 struct ssp_device *ssp = priv->ssp;
384 u32 sscr0; 415 u32 sscr0;
385 416
386 sscr0 = ssp_read_reg(ssp, SSCR0); 417 sscr0 = ssp_read_reg(ssp, SSCR0);
@@ -415,7 +446,7 @@ static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
415 int tristate) 446 int tristate)
416{ 447{
417 struct ssp_priv *priv = cpu_dai->private_data; 448 struct ssp_priv *priv = cpu_dai->private_data;
418 struct ssp_device *ssp = priv->dev.ssp; 449 struct ssp_device *ssp = priv->ssp;
419 u32 sscr1; 450 u32 sscr1;
420 451
421 sscr1 = ssp_read_reg(ssp, SSCR1); 452 sscr1 = ssp_read_reg(ssp, SSCR1);
@@ -437,7 +468,7 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
437 unsigned int fmt) 468 unsigned int fmt)
438{ 469{
439 struct ssp_priv *priv = cpu_dai->private_data; 470 struct ssp_priv *priv = cpu_dai->private_data;
440 struct ssp_device *ssp = priv->dev.ssp; 471 struct ssp_device *ssp = priv->ssp;
441 u32 sscr0; 472 u32 sscr0;
442 u32 sscr1; 473 u32 sscr1;
443 u32 sspsp; 474 u32 sspsp;
@@ -532,7 +563,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
532 struct snd_soc_pcm_runtime *rtd = substream->private_data; 563 struct snd_soc_pcm_runtime *rtd = substream->private_data;
533 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; 564 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
534 struct ssp_priv *priv = cpu_dai->private_data; 565 struct ssp_priv *priv = cpu_dai->private_data;
535 struct ssp_device *ssp = priv->dev.ssp; 566 struct ssp_device *ssp = priv->ssp;
536 int chn = params_channels(params); 567 int chn = params_channels(params);
537 u32 sscr0; 568 u32 sscr0;
538 u32 sspsp; 569 u32 sspsp;
@@ -642,12 +673,12 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
642 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; 673 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
643 int ret = 0; 674 int ret = 0;
644 struct ssp_priv *priv = cpu_dai->private_data; 675 struct ssp_priv *priv = cpu_dai->private_data;
645 struct ssp_device *ssp = priv->dev.ssp; 676 struct ssp_device *ssp = priv->ssp;
646 int val; 677 int val;
647 678
648 switch (cmd) { 679 switch (cmd) {
649 case SNDRV_PCM_TRIGGER_RESUME: 680 case SNDRV_PCM_TRIGGER_RESUME:
650 ssp_enable(&priv->dev); 681 ssp_enable(ssp);
651 break; 682 break;
652 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 683 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
653 val = ssp_read_reg(ssp, SSCR1); 684 val = ssp_read_reg(ssp, SSCR1);
@@ -666,7 +697,7 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
666 else 697 else
667 val |= SSCR1_RSRE; 698 val |= SSCR1_RSRE;
668 ssp_write_reg(ssp, SSCR1, val); 699 ssp_write_reg(ssp, SSCR1, val);
669 ssp_enable(&priv->dev); 700 ssp_enable(ssp);
670 break; 701 break;
671 case SNDRV_PCM_TRIGGER_STOP: 702 case SNDRV_PCM_TRIGGER_STOP:
672 val = ssp_read_reg(ssp, SSCR1); 703 val = ssp_read_reg(ssp, SSCR1);
@@ -677,7 +708,7 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
677 ssp_write_reg(ssp, SSCR1, val); 708 ssp_write_reg(ssp, SSCR1, val);
678 break; 709 break;
679 case SNDRV_PCM_TRIGGER_SUSPEND: 710 case SNDRV_PCM_TRIGGER_SUSPEND:
680 ssp_disable(&priv->dev); 711 ssp_disable(ssp);
681 break; 712 break;
682 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 713 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
683 val = ssp_read_reg(ssp, SSCR1); 714 val = ssp_read_reg(ssp, SSCR1);
@@ -707,8 +738,8 @@ static int pxa_ssp_probe(struct platform_device *pdev,
707 if (!priv) 738 if (!priv)
708 return -ENOMEM; 739 return -ENOMEM;
709 740
710 priv->dev.ssp = ssp_request(dai->id + 1, "SoC audio"); 741 priv->ssp = ssp_request(dai->id + 1, "SoC audio");
711 if (priv->dev.ssp == NULL) { 742 if (priv->ssp == NULL) {
712 ret = -ENODEV; 743 ret = -ENODEV;
713 goto err_priv; 744 goto err_priv;
714 } 745 }
@@ -727,7 +758,7 @@ static void pxa_ssp_remove(struct platform_device *pdev,
727 struct snd_soc_dai *dai) 758 struct snd_soc_dai *dai)
728{ 759{
729 struct ssp_priv *priv = dai->private_data; 760 struct ssp_priv *priv = dai->private_data;
730 ssp_free(priv->dev.ssp); 761 ssp_free(priv->ssp);
731} 762}
732 763
733#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 764#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
diff --git a/sound/soc/s3c24xx/s3c64xx-i2s.c b/sound/soc/s3c24xx/s3c64xx-i2s.c
index 93ed3aad1631..a72c251401ac 100644
--- a/sound/soc/s3c24xx/s3c64xx-i2s.c
+++ b/sound/soc/s3c24xx/s3c64xx-i2s.c
@@ -22,8 +22,8 @@
22#include <sound/soc.h> 22#include <sound/soc.h>
23 23
24#include <plat/regs-s3c2412-iis.h> 24#include <plat/regs-s3c2412-iis.h>
25#include <plat/gpio-bank-d.h> 25#include <mach/gpio-bank-d.h>
26#include <plat/gpio-bank-e.h> 26#include <mach/gpio-bank-e.h>
27#include <plat/gpio-cfg.h> 27#include <plat/gpio-cfg.h>
28 28
29#include <mach/map.h> 29#include <mach/map.h>
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index a03bac943aaf..c8b0556ef431 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -427,24 +427,24 @@ static int soc_pcm_open(struct snd_pcm_substream *substream)
427 if (!runtime->hw.rates) { 427 if (!runtime->hw.rates) {
428 printk(KERN_ERR "asoc: %s <-> %s No matching rates\n", 428 printk(KERN_ERR "asoc: %s <-> %s No matching rates\n",
429 codec_dai->name, cpu_dai->name); 429 codec_dai->name, cpu_dai->name);
430 goto machine_err; 430 goto config_err;
431 } 431 }
432 if (!runtime->hw.formats) { 432 if (!runtime->hw.formats) {
433 printk(KERN_ERR "asoc: %s <-> %s No matching formats\n", 433 printk(KERN_ERR "asoc: %s <-> %s No matching formats\n",
434 codec_dai->name, cpu_dai->name); 434 codec_dai->name, cpu_dai->name);
435 goto machine_err; 435 goto config_err;
436 } 436 }
437 if (!runtime->hw.channels_min || !runtime->hw.channels_max) { 437 if (!runtime->hw.channels_min || !runtime->hw.channels_max) {
438 printk(KERN_ERR "asoc: %s <-> %s No matching channels\n", 438 printk(KERN_ERR "asoc: %s <-> %s No matching channels\n",
439 codec_dai->name, cpu_dai->name); 439 codec_dai->name, cpu_dai->name);
440 goto machine_err; 440 goto config_err;
441 } 441 }
442 442
443 /* Symmetry only applies if we've already got an active stream. */ 443 /* Symmetry only applies if we've already got an active stream. */
444 if (cpu_dai->active || codec_dai->active) { 444 if (cpu_dai->active || codec_dai->active) {
445 ret = soc_pcm_apply_symmetry(substream); 445 ret = soc_pcm_apply_symmetry(substream);
446 if (ret != 0) 446 if (ret != 0)
447 goto machine_err; 447 goto config_err;
448 } 448 }
449 449
450 pr_debug("asoc: %s <-> %s info:\n", codec_dai->name, cpu_dai->name); 450 pr_debug("asoc: %s <-> %s info:\n", codec_dai->name, cpu_dai->name);
@@ -464,10 +464,14 @@ static int soc_pcm_open(struct snd_pcm_substream *substream)
464 mutex_unlock(&pcm_mutex); 464 mutex_unlock(&pcm_mutex);
465 return 0; 465 return 0;
466 466
467machine_err: 467config_err:
468 if (machine->ops && machine->ops->shutdown) 468 if (machine->ops && machine->ops->shutdown)
469 machine->ops->shutdown(substream); 469 machine->ops->shutdown(substream);
470 470
471machine_err:
472 if (codec_dai->ops->shutdown)
473 codec_dai->ops->shutdown(substream, codec_dai);
474
471codec_dai_err: 475codec_dai_err:
472 if (platform->pcm_ops->close) 476 if (platform->pcm_ops->close)
473 platform->pcm_ops->close(substream); 477 platform->pcm_ops->close(substream);
diff --git a/sound/usb/Kconfig b/sound/usb/Kconfig
index 8c2925814ce4..c570ae3e6d55 100644
--- a/sound/usb/Kconfig
+++ b/sound/usb/Kconfig
@@ -22,13 +22,13 @@ config SND_USB_AUDIO
22 will be called snd-usb-audio. 22 will be called snd-usb-audio.
23 23
24config SND_USB_UA101 24config SND_USB_UA101
25 tristate "Edirol UA-101 driver (EXPERIMENTAL)" 25 tristate "Edirol UA-101/UA-1000 driver (EXPERIMENTAL)"
26 depends on EXPERIMENTAL 26 depends on EXPERIMENTAL
27 select SND_PCM 27 select SND_PCM
28 select SND_RAWMIDI 28 select SND_RAWMIDI
29 help 29 help
30 Say Y here to include support for the Edirol UA-101 audio/MIDI 30 Say Y here to include support for the Edirol UA-101 and UA-1000
31 interface. 31 audio/MIDI interfaces.
32 32
33 To compile this driver as a module, choose M here: the module 33 To compile this driver as a module, choose M here: the module
34 will be called snd-ua101. 34 will be called snd-ua101.
diff --git a/sound/usb/caiaq/midi.h b/sound/usb/caiaq/midi.h
index 9d16db027fc3..380f984babc9 100644
--- a/sound/usb/caiaq/midi.h
+++ b/sound/usb/caiaq/midi.h
@@ -3,6 +3,6 @@
3 3
4int snd_usb_caiaq_midi_init(struct snd_usb_caiaqdev *dev); 4int snd_usb_caiaq_midi_init(struct snd_usb_caiaqdev *dev);
5void snd_usb_caiaq_midi_handle_input(struct snd_usb_caiaqdev *dev, int port, const char *buf, int len); 5void snd_usb_caiaq_midi_handle_input(struct snd_usb_caiaqdev *dev, int port, const char *buf, int len);
6void snd_usb_caiaq_midi_output_done(struct urb* urb); 6void snd_usb_caiaq_midi_output_done(struct urb *urb);
7 7
8#endif /* CAIAQ_MIDI_H */ 8#endif /* CAIAQ_MIDI_H */
diff --git a/sound/usb/ua101.c b/sound/usb/ua101.c
index 4f4ccdf70dd0..3d458d3b9962 100644
--- a/sound/usb/ua101.c
+++ b/sound/usb/ua101.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Edirol UA-101 driver 2 * Edirol UA-101/UA-1000 driver
3 * Copyright (c) Clemens Ladisch <clemens@ladisch.de> 3 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
4 * 4 *
5 * This driver is free software: you can redistribute it and/or modify 5 * This driver is free software: you can redistribute it and/or modify
@@ -25,13 +25,10 @@
25#include <sound/pcm_params.h> 25#include <sound/pcm_params.h>
26#include "usbaudio.h" 26#include "usbaudio.h"
27 27
28MODULE_DESCRIPTION("Edirol UA-101 driver"); 28MODULE_DESCRIPTION("Edirol UA-101/1000 driver");
29MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 29MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
30MODULE_LICENSE("GPL v2"); 30MODULE_LICENSE("GPL v2");
31MODULE_SUPPORTED_DEVICE("{{Edirol,UA-101}}"); 31MODULE_SUPPORTED_DEVICE("{{Edirol,UA-101},{Edirol,UA-1000}}");
32
33/* I use my UA-1A for testing because I don't have a UA-101 ... */
34#define UA1A_HACK
35 32
36/* 33/*
37 * Should not be lower than the minimum scheduling delay of the host 34 * Should not be lower than the minimum scheduling delay of the host
@@ -132,9 +129,6 @@ struct ua101 {
132 dma_addr_t dma; 129 dma_addr_t dma;
133 } buffers[MAX_MEMORY_BUFFERS]; 130 } buffers[MAX_MEMORY_BUFFERS];
134 } capture, playback; 131 } capture, playback;
135
136 unsigned int fps[10];
137 unsigned int frame_counter;
138}; 132};
139 133
140static DEFINE_MUTEX(devices_mutex); 134static DEFINE_MUTEX(devices_mutex);
@@ -424,16 +418,6 @@ static void capture_urb_complete(struct urb *urb)
424 if (do_period_elapsed) 418 if (do_period_elapsed)
425 snd_pcm_period_elapsed(stream->substream); 419 snd_pcm_period_elapsed(stream->substream);
426 420
427 /* for debugging: measure the sample rate relative to the USB clock */
428 ua->fps[ua->frame_counter++ / ua->packets_per_second] += frames;
429 if (ua->frame_counter >= ARRAY_SIZE(ua->fps) * ua->packets_per_second) {
430 printk(KERN_DEBUG "capture rate:");
431 for (frames = 0; frames < ARRAY_SIZE(ua->fps); ++frames)
432 printk(KERN_CONT " %u", ua->fps[frames]);
433 printk(KERN_CONT "\n");
434 memset(ua->fps, 0, sizeof(ua->fps));
435 ua->frame_counter = 0;
436 }
437 return; 421 return;
438 422
439stream_stopped: 423stream_stopped:
@@ -1200,13 +1184,30 @@ static int ua101_probe(struct usb_interface *interface,
1200 .type = QUIRK_MIDI_FIXED_ENDPOINT, 1184 .type = QUIRK_MIDI_FIXED_ENDPOINT,
1201 .data = &midi_ep 1185 .data = &midi_ep
1202 }; 1186 };
1187 static const int intf_numbers[2][3] = {
1188 { /* UA-101 */
1189 [INTF_PLAYBACK] = 0,
1190 [INTF_CAPTURE] = 1,
1191 [INTF_MIDI] = 2,
1192 },
1193 { /* UA-1000 */
1194 [INTF_CAPTURE] = 1,
1195 [INTF_PLAYBACK] = 2,
1196 [INTF_MIDI] = 3,
1197 },
1198 };
1203 struct snd_card *card; 1199 struct snd_card *card;
1204 struct ua101 *ua; 1200 struct ua101 *ua;
1205 unsigned int card_index, i; 1201 unsigned int card_index, i;
1202 int is_ua1000;
1203 const char *name;
1206 char usb_path[32]; 1204 char usb_path[32];
1207 int err; 1205 int err;
1208 1206
1209 if (interface->altsetting->desc.bInterfaceNumber != 0) 1207 is_ua1000 = usb_id->idProduct == 0x0044;
1208
1209 if (interface->altsetting->desc.bInterfaceNumber !=
1210 intf_numbers[is_ua1000][0])
1210 return -ENODEV; 1211 return -ENODEV;
1211 1212
1212 mutex_lock(&devices_mutex); 1213 mutex_lock(&devices_mutex);
@@ -1239,20 +1240,13 @@ static int ua101_probe(struct usb_interface *interface,
1239 init_waitqueue_head(&ua->rate_feedback_wait); 1240 init_waitqueue_head(&ua->rate_feedback_wait);
1240 init_waitqueue_head(&ua->alsa_playback_wait); 1241 init_waitqueue_head(&ua->alsa_playback_wait);
1241 1242
1242#ifdef UA1A_HACK
1243 if (ua->dev->descriptor.idProduct == cpu_to_le16(0x0018)) {
1244 ua->intf[2] = interface;
1245 ua->intf[0] = usb_ifnum_to_if(ua->dev, 1);
1246 ua->intf[1] = usb_ifnum_to_if(ua->dev, 2);
1247 usb_driver_claim_interface(&ua101_driver, ua->intf[0], ua);
1248 usb_driver_claim_interface(&ua101_driver, ua->intf[1], ua);
1249 } else {
1250#endif
1251 ua->intf[0] = interface; 1243 ua->intf[0] = interface;
1252 for (i = 1; i < ARRAY_SIZE(ua->intf); ++i) { 1244 for (i = 1; i < ARRAY_SIZE(ua->intf); ++i) {
1253 ua->intf[i] = usb_ifnum_to_if(ua->dev, i); 1245 ua->intf[i] = usb_ifnum_to_if(ua->dev,
1246 intf_numbers[is_ua1000][i]);
1254 if (!ua->intf[i]) { 1247 if (!ua->intf[i]) {
1255 dev_err(&ua->dev->dev, "interface %u not found\n", i); 1248 dev_err(&ua->dev->dev, "interface %u not found\n",
1249 intf_numbers[is_ua1000][i]);
1256 err = -ENXIO; 1250 err = -ENXIO;
1257 goto probe_error; 1251 goto probe_error;
1258 } 1252 }
@@ -1264,39 +1258,19 @@ static int ua101_probe(struct usb_interface *interface,
1264 goto probe_error; 1258 goto probe_error;
1265 } 1259 }
1266 } 1260 }
1267#ifdef UA1A_HACK
1268 }
1269#endif
1270 1261
1271 snd_card_set_dev(card, &interface->dev); 1262 snd_card_set_dev(card, &interface->dev);
1272 1263
1273#ifdef UA1A_HACK
1274 if (ua->dev->descriptor.idProduct == cpu_to_le16(0x0018)) {
1275 ua->format_bit = SNDRV_PCM_FMTBIT_S16_LE;
1276 ua->rate = 44100;
1277 ua->packets_per_second = 1000;
1278 ua->capture.channels = 2;
1279 ua->playback.channels = 2;
1280 ua->capture.frame_bytes = 4;
1281 ua->playback.frame_bytes = 4;
1282 ua->capture.usb_pipe = usb_rcvisocpipe(ua->dev, 2);
1283 ua->playback.usb_pipe = usb_sndisocpipe(ua->dev, 1);
1284 ua->capture.max_packet_bytes = 192;
1285 ua->playback.max_packet_bytes = 192;
1286 } else {
1287#endif
1288 err = detect_usb_format(ua); 1264 err = detect_usb_format(ua);
1289 if (err < 0) 1265 if (err < 0)
1290 goto probe_error; 1266 goto probe_error;
1291#ifdef UA1A_HACK
1292 }
1293#endif
1294 1267
1268 name = usb_id->idProduct == 0x0044 ? "UA-1000" : "UA-101";
1295 strcpy(card->driver, "UA-101"); 1269 strcpy(card->driver, "UA-101");
1296 strcpy(card->shortname, "UA-101"); 1270 strcpy(card->shortname, name);
1297 usb_make_path(ua->dev, usb_path, sizeof(usb_path)); 1271 usb_make_path(ua->dev, usb_path, sizeof(usb_path));
1298 snprintf(ua->card->longname, sizeof(ua->card->longname), 1272 snprintf(ua->card->longname, sizeof(ua->card->longname),
1299 "EDIROL UA-101 (serial %s), %u Hz at %s, %s speed", 1273 "EDIROL %s (serial %s), %u Hz at %s, %s speed", name,
1300 ua->dev->serial ? ua->dev->serial : "?", ua->rate, usb_path, 1274 ua->dev->serial ? ua->dev->serial : "?", ua->rate, usb_path,
1301 ua->dev->speed == USB_SPEED_HIGH ? "high" : "full"); 1275 ua->dev->speed == USB_SPEED_HIGH ? "high" : "full");
1302 1276
@@ -1314,24 +1288,18 @@ static int ua101_probe(struct usb_interface *interface,
1314 if (err < 0) 1288 if (err < 0)
1315 goto probe_error; 1289 goto probe_error;
1316 1290
1317 err = snd_pcm_new(card, "UA-101", 0, 1, 1, &ua->pcm); 1291 err = snd_pcm_new(card, name, 0, 1, 1, &ua->pcm);
1318 if (err < 0) 1292 if (err < 0)
1319 goto probe_error; 1293 goto probe_error;
1320 ua->pcm->private_data = ua; 1294 ua->pcm->private_data = ua;
1321 strcpy(ua->pcm->name, "UA-101"); 1295 strcpy(ua->pcm->name, name);
1322 snd_pcm_set_ops(ua->pcm, SNDRV_PCM_STREAM_PLAYBACK, &playback_pcm_ops); 1296 snd_pcm_set_ops(ua->pcm, SNDRV_PCM_STREAM_PLAYBACK, &playback_pcm_ops);
1323 snd_pcm_set_ops(ua->pcm, SNDRV_PCM_STREAM_CAPTURE, &capture_pcm_ops); 1297 snd_pcm_set_ops(ua->pcm, SNDRV_PCM_STREAM_CAPTURE, &capture_pcm_ops);
1324 1298
1325#ifdef UA1A_HACK
1326 if (ua->dev->descriptor.idProduct != cpu_to_le16(0x0018)) {
1327#endif
1328 err = snd_usbmidi_create(card, ua->intf[INTF_MIDI], 1299 err = snd_usbmidi_create(card, ua->intf[INTF_MIDI],
1329 &ua->midi_list, &midi_quirk); 1300 &ua->midi_list, &midi_quirk);
1330 if (err < 0) 1301 if (err < 0)
1331 goto probe_error; 1302 goto probe_error;
1332#ifdef UA1A_HACK
1333 }
1334#endif
1335 1303
1336 err = snd_card_register(card); 1304 err = snd_card_register(card);
1337 if (err < 0) 1305 if (err < 0)
@@ -1386,11 +1354,9 @@ static void ua101_disconnect(struct usb_interface *interface)
1386} 1354}
1387 1355
1388static struct usb_device_id ua101_ids[] = { 1356static struct usb_device_id ua101_ids[] = {
1389#ifdef UA1A_HACK 1357 { USB_DEVICE(0x0582, 0x0044) }, /* UA-1000 high speed */
1390 { USB_DEVICE(0x0582, 0x0018) }, 1358 { USB_DEVICE(0x0582, 0x007d) }, /* UA-101 high speed */
1391#endif 1359 { USB_DEVICE(0x0582, 0x008d) }, /* UA-101 full speed */
1392 { USB_DEVICE(0x0582, 0x007d) },
1393 { USB_DEVICE(0x0582, 0x008d) },
1394 { } 1360 { }
1395}; 1361};
1396MODULE_DEVICE_TABLE(usb, ua101_ids); 1362MODULE_DEVICE_TABLE(usb, ua101_ids);
diff --git a/sound/usb/usbaudio.c b/sound/usb/usbaudio.c
index c539f7fe292f..11b0826b8fe6 100644
--- a/sound/usb/usbaudio.c
+++ b/sound/usb/usbaudio.c
@@ -2483,7 +2483,6 @@ static int parse_audio_format_i_type(struct snd_usb_audio *chip,
2483 sample_width, sample_bytes); 2483 sample_width, sample_bytes);
2484 } 2484 }
2485 /* check the format byte size */ 2485 /* check the format byte size */
2486 printk(" XXXXX SAMPLE BYTES %d\n", sample_bytes);
2487 switch (sample_bytes) { 2486 switch (sample_bytes) {
2488 case 1: 2487 case 1:
2489 pcm_format = SNDRV_PCM_FORMAT_S8; 2488 pcm_format = SNDRV_PCM_FORMAT_S8;
@@ -2581,6 +2580,9 @@ static int parse_audio_format_rates_v1(struct snd_usb_audio *chip, struct audiof
2581 chip->usb_id == USB_ID(0x0d8c, 0x0102)) && 2580 chip->usb_id == USB_ID(0x0d8c, 0x0102)) &&
2582 fp->altsetting == 5 && fp->maxpacksize == 392) 2581 fp->altsetting == 5 && fp->maxpacksize == 392)
2583 rate = 96000; 2582 rate = 96000;
2583 /* Creative VF0470 Live Cam reports 16 kHz instead of 8kHz */
2584 if (rate == 16000 && chip->usb_id == USB_ID(0x041e, 0x4068))
2585 rate = 8000;
2584 fp->rate_table[fp->nr_rates] = rate; 2586 fp->rate_table[fp->nr_rates] = rate;
2585 if (!fp->rate_min || rate < fp->rate_min) 2587 if (!fp->rate_min || rate < fp->rate_min)
2586 fp->rate_min = rate; 2588 fp->rate_min = rate;
@@ -3386,58 +3388,6 @@ static int create_uaxx_quirk(struct snd_usb_audio *chip,
3386 return 0; 3388 return 0;
3387} 3389}
3388 3390
3389/*
3390 * Create a stream for an Edirol UA-1000 interface.
3391 */
3392static int create_ua1000_quirk(struct snd_usb_audio *chip,
3393 struct usb_interface *iface,
3394 const struct snd_usb_audio_quirk *quirk)
3395{
3396 static const struct audioformat ua1000_format = {
3397 .format = SNDRV_PCM_FORMAT_S32_LE,
3398 .fmt_type = UAC_FORMAT_TYPE_I,
3399 .altsetting = 1,
3400 .altset_idx = 1,
3401 .attributes = 0,
3402 .rates = SNDRV_PCM_RATE_CONTINUOUS,
3403 };
3404 struct usb_host_interface *alts;
3405 struct usb_interface_descriptor *altsd;
3406 struct audioformat *fp;
3407 int stream, err;
3408
3409 if (iface->num_altsetting != 2)
3410 return -ENXIO;
3411 alts = &iface->altsetting[1];
3412 altsd = get_iface_desc(alts);
3413 if (alts->extralen != 11 || alts->extra[1] != USB_DT_CS_INTERFACE ||
3414 altsd->bNumEndpoints != 1)
3415 return -ENXIO;
3416
3417 fp = kmemdup(&ua1000_format, sizeof(*fp), GFP_KERNEL);
3418 if (!fp)
3419 return -ENOMEM;
3420
3421 fp->channels = alts->extra[4];
3422 fp->iface = altsd->bInterfaceNumber;
3423 fp->endpoint = get_endpoint(alts, 0)->bEndpointAddress;
3424 fp->ep_attr = get_endpoint(alts, 0)->bmAttributes;
3425 fp->datainterval = parse_datainterval(chip, alts);
3426 fp->maxpacksize = le16_to_cpu(get_endpoint(alts, 0)->wMaxPacketSize);
3427 fp->rate_max = fp->rate_min = combine_triple(&alts->extra[8]);
3428
3429 stream = (fp->endpoint & USB_DIR_IN)
3430 ? SNDRV_PCM_STREAM_CAPTURE : SNDRV_PCM_STREAM_PLAYBACK;
3431 err = add_audio_endpoint(chip, stream, fp);
3432 if (err < 0) {
3433 kfree(fp);
3434 return err;
3435 }
3436 /* FIXME: playback must be synchronized to capture */
3437 usb_set_interface(chip->dev, fp->iface, 0);
3438 return 0;
3439}
3440
3441static int snd_usb_create_quirk(struct snd_usb_audio *chip, 3391static int snd_usb_create_quirk(struct snd_usb_audio *chip,
3442 struct usb_interface *iface, 3392 struct usb_interface *iface,
3443 const struct snd_usb_audio_quirk *quirk); 3393 const struct snd_usb_audio_quirk *quirk);
@@ -3686,7 +3636,6 @@ static int snd_usb_create_quirk(struct snd_usb_audio *chip,
3686 [QUIRK_MIDI_CME] = create_any_midi_quirk, 3636 [QUIRK_MIDI_CME] = create_any_midi_quirk,
3687 [QUIRK_AUDIO_STANDARD_INTERFACE] = create_standard_audio_quirk, 3637 [QUIRK_AUDIO_STANDARD_INTERFACE] = create_standard_audio_quirk,
3688 [QUIRK_AUDIO_FIXED_ENDPOINT] = create_fixed_stream_quirk, 3638 [QUIRK_AUDIO_FIXED_ENDPOINT] = create_fixed_stream_quirk,
3689 [QUIRK_AUDIO_EDIROL_UA1000] = create_ua1000_quirk,
3690 [QUIRK_AUDIO_EDIROL_UAXX] = create_uaxx_quirk, 3639 [QUIRK_AUDIO_EDIROL_UAXX] = create_uaxx_quirk,
3691 [QUIRK_AUDIO_ALIGN_TRANSFER] = create_align_transfer_quirk 3640 [QUIRK_AUDIO_ALIGN_TRANSFER] = create_align_transfer_quirk
3692 }; 3641 };
diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h
index 6b016d4aac6b..42c299cbf63a 100644
--- a/sound/usb/usbaudio.h
+++ b/sound/usb/usbaudio.h
@@ -75,7 +75,6 @@ enum quirk_type {
75 QUIRK_MIDI_US122L, 75 QUIRK_MIDI_US122L,
76 QUIRK_AUDIO_STANDARD_INTERFACE, 76 QUIRK_AUDIO_STANDARD_INTERFACE,
77 QUIRK_AUDIO_FIXED_ENDPOINT, 77 QUIRK_AUDIO_FIXED_ENDPOINT,
78 QUIRK_AUDIO_EDIROL_UA1000,
79 QUIRK_AUDIO_EDIROL_UAXX, 78 QUIRK_AUDIO_EDIROL_UAXX,
80 QUIRK_AUDIO_ALIGN_TRANSFER, 79 QUIRK_AUDIO_ALIGN_TRANSFER,
81 80
@@ -112,7 +111,7 @@ struct snd_usb_midi_endpoint_info {
112 111
113/* for QUIRK_AUDIO/MIDI_STANDARD_INTERFACE, data is NULL */ 112/* for QUIRK_AUDIO/MIDI_STANDARD_INTERFACE, data is NULL */
114 113
115/* for QUIRK_AUDIO_EDIROL_UA700_UA25/UA1000, data is NULL */ 114/* for QUIRK_AUDIO_EDIROL_UAXX, data is NULL */
116 115
117/* for QUIRK_IGNORE_INTERFACE, data is NULL */ 116/* for QUIRK_IGNORE_INTERFACE, data is NULL */
118 117
diff --git a/sound/usb/usbquirks.h b/sound/usb/usbquirks.h
index f06faf7917b9..2b426c1fd0e8 100644
--- a/sound/usb/usbquirks.h
+++ b/sound/usb/usbquirks.h
@@ -1016,36 +1016,6 @@ YAMAHA_DEVICE(0x7010, "UB99"),
1016 } 1016 }
1017}, 1017},
1018{ 1018{
1019 USB_DEVICE(0x0582, 0x0044),
1020 .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) {
1021 .vendor_name = "Roland",
1022 .product_name = "UA-1000",
1023 .ifnum = QUIRK_ANY_INTERFACE,
1024 .type = QUIRK_COMPOSITE,
1025 .data = (const struct snd_usb_audio_quirk[]) {
1026 {
1027 .ifnum = 1,
1028 .type = QUIRK_AUDIO_EDIROL_UA1000
1029 },
1030 {
1031 .ifnum = 2,
1032 .type = QUIRK_AUDIO_EDIROL_UA1000
1033 },
1034 {
1035 .ifnum = 3,
1036 .type = QUIRK_MIDI_FIXED_ENDPOINT,
1037 .data = & (const struct snd_usb_midi_endpoint_info) {
1038 .out_cables = 0x0003,
1039 .in_cables = 0x0003
1040 }
1041 },
1042 {
1043 .ifnum = -1
1044 }
1045 }
1046 }
1047},
1048{
1049 /* has ID 0x0049 when not in "Advanced Driver" mode */ 1019 /* has ID 0x0049 when not in "Advanced Driver" mode */
1050 USB_DEVICE(0x0582, 0x0047), 1020 USB_DEVICE(0x0582, 0x0047),
1051 .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { 1021 .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) {
diff --git a/tools/perf/Documentation/perf-lock.txt b/tools/perf/Documentation/perf-lock.txt
new file mode 100644
index 000000000000..b317102138c8
--- /dev/null
+++ b/tools/perf/Documentation/perf-lock.txt
@@ -0,0 +1,29 @@
1perf-lock(1)
2============
3
4NAME
5----
6perf-lock - Analyze lock events
7
8SYNOPSIS
9--------
10[verse]
11'perf lock' {record|report|trace}
12
13DESCRIPTION
14-----------
15You can analyze various lock behaviours
16and statistics with this 'perf lock' command.
17
18 'perf lock record <command>' records lock events
19 between start and end <command>. And this command
20 produces the file "perf.data" which contains tracing
21 results of lock events.
22
23 'perf lock trace' shows raw lock events.
24
25 'perf lock report' reports statistical data.
26
27SEE ALSO
28--------
29linkperf:perf[1]
diff --git a/tools/perf/builtin-lock.c b/tools/perf/builtin-lock.c
index fb9ab2ad3f92..e12c844df1e2 100644
--- a/tools/perf/builtin-lock.c
+++ b/tools/perf/builtin-lock.c
@@ -460,6 +460,150 @@ process_raw_event(void *data, int cpu,
460 process_lock_release_event(data, event, cpu, timestamp, thread); 460 process_lock_release_event(data, event, cpu, timestamp, thread);
461} 461}
462 462
463struct raw_event_queue {
464 u64 timestamp;
465 int cpu;
466 void *data;
467 struct thread *thread;
468 struct list_head list;
469};
470
471static LIST_HEAD(raw_event_head);
472
473#define FLUSH_PERIOD (5 * NSEC_PER_SEC)
474
475static u64 flush_limit = ULLONG_MAX;
476static u64 last_flush = 0;
477struct raw_event_queue *last_inserted;
478
479static void flush_raw_event_queue(u64 limit)
480{
481 struct raw_event_queue *tmp, *iter;
482
483 list_for_each_entry_safe(iter, tmp, &raw_event_head, list) {
484 if (iter->timestamp > limit)
485 return;
486
487 if (iter == last_inserted)
488 last_inserted = NULL;
489
490 process_raw_event(iter->data, iter->cpu, iter->timestamp,
491 iter->thread);
492
493 last_flush = iter->timestamp;
494 list_del(&iter->list);
495 free(iter->data);
496 free(iter);
497 }
498}
499
500static void __queue_raw_event_end(struct raw_event_queue *new)
501{
502 struct raw_event_queue *iter;
503
504 list_for_each_entry_reverse(iter, &raw_event_head, list) {
505 if (iter->timestamp < new->timestamp) {
506 list_add(&new->list, &iter->list);
507 return;
508 }
509 }
510
511 list_add(&new->list, &raw_event_head);
512}
513
514static void __queue_raw_event_before(struct raw_event_queue *new,
515 struct raw_event_queue *iter)
516{
517 list_for_each_entry_continue_reverse(iter, &raw_event_head, list) {
518 if (iter->timestamp < new->timestamp) {
519 list_add(&new->list, &iter->list);
520 return;
521 }
522 }
523
524 list_add(&new->list, &raw_event_head);
525}
526
527static void __queue_raw_event_after(struct raw_event_queue *new,
528 struct raw_event_queue *iter)
529{
530 list_for_each_entry_continue(iter, &raw_event_head, list) {
531 if (iter->timestamp > new->timestamp) {
532 list_add_tail(&new->list, &iter->list);
533 return;
534 }
535 }
536 list_add_tail(&new->list, &raw_event_head);
537}
538
539/* The queue is ordered by time */
540static void __queue_raw_event(struct raw_event_queue *new)
541{
542 if (!last_inserted) {
543 __queue_raw_event_end(new);
544 return;
545 }
546
547 /*
548 * Most of the time the current event has a timestamp
549 * very close to the last event inserted, unless we just switched
550 * to another event buffer. Having a sorting based on a list and
551 * on the last inserted event that is close to the current one is
552 * probably more efficient than an rbtree based sorting.
553 */
554 if (last_inserted->timestamp >= new->timestamp)
555 __queue_raw_event_before(new, last_inserted);
556 else
557 __queue_raw_event_after(new, last_inserted);
558}
559
560static void queue_raw_event(void *data, int raw_size, int cpu,
561 u64 timestamp, struct thread *thread)
562{
563 struct raw_event_queue *new;
564
565 if (flush_limit == ULLONG_MAX)
566 flush_limit = timestamp + FLUSH_PERIOD;
567
568 if (timestamp < last_flush) {
569 printf("Warning: Timestamp below last timeslice flush\n");
570 return;
571 }
572
573 new = malloc(sizeof(*new));
574 if (!new)
575 die("Not enough memory\n");
576
577 new->timestamp = timestamp;
578 new->cpu = cpu;
579 new->thread = thread;
580
581 new->data = malloc(raw_size);
582 if (!new->data)
583 die("Not enough memory\n");
584
585 memcpy(new->data, data, raw_size);
586
587 __queue_raw_event(new);
588 last_inserted = new;
589
590 /*
591 * We want to have a slice of events covering 2 * FLUSH_PERIOD
592 * If FLUSH_PERIOD is big enough, it ensures every events that occured
593 * in the first half of the timeslice have all been buffered and there
594 * are none remaining (we need that because of the weakly ordered
595 * event recording we have). Then once we reach the 2 * FLUSH_PERIOD
596 * timeslice, we flush the first half to be gentle with the memory
597 * (the second half can still get new events in the middle, so wait
598 * another period to flush it)
599 */
600 if (new->timestamp > flush_limit &&
601 new->timestamp - flush_limit > FLUSH_PERIOD) {
602 flush_limit += FLUSH_PERIOD;
603 flush_raw_event_queue(flush_limit);
604 }
605}
606
463static int process_sample_event(event_t *event, struct perf_session *session) 607static int process_sample_event(event_t *event, struct perf_session *session)
464{ 608{
465 struct thread *thread; 609 struct thread *thread;
@@ -480,7 +624,7 @@ static int process_sample_event(event_t *event, struct perf_session *session)
480 if (profile_cpu != -1 && profile_cpu != (int) data.cpu) 624 if (profile_cpu != -1 && profile_cpu != (int) data.cpu)
481 return 0; 625 return 0;
482 626
483 process_raw_event(data.raw_data, data.cpu, data.time, thread); 627 queue_raw_event(data.raw_data, data.raw_size, data.cpu, data.time, thread);
484 628
485 return 0; 629 return 0;
486} 630}
@@ -576,6 +720,7 @@ static void __cmd_report(void)
576 setup_pager(); 720 setup_pager();
577 select_key(); 721 select_key();
578 read_events(); 722 read_events();
723 flush_raw_event_queue(ULLONG_MAX);
579 sort_result(); 724 sort_result();
580 print_result(); 725 print_result();
581} 726}
@@ -608,7 +753,6 @@ static const char *record_args[] = {
608 "record", 753 "record",
609 "-a", 754 "-a",
610 "-R", 755 "-R",
611 "-M",
612 "-f", 756 "-f",
613 "-m", "1024", 757 "-m", "1024",
614 "-c", "1", 758 "-c", "1",
diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c
index 5db687fc13de..407041d20de0 100644
--- a/tools/perf/builtin-trace.c
+++ b/tools/perf/builtin-trace.c
@@ -573,7 +573,8 @@ int cmd_trace(int argc, const char **argv, const char *prefix __used)
573 573
574 if (symbol__init() < 0) 574 if (symbol__init() < 0)
575 return -1; 575 return -1;
576 setup_pager(); 576 if (!script_name)
577 setup_pager();
577 578
578 session = perf_session__new(input_name, O_RDONLY, 0); 579 session = perf_session__new(input_name, O_RDONLY, 0);
579 if (session == NULL) 580 if (session == NULL)
@@ -608,7 +609,6 @@ int cmd_trace(int argc, const char **argv, const char *prefix __used)
608 return -1; 609 return -1;
609 } 610 }
610 611
611 perf_header__read(&session->header, input);
612 err = scripting_ops->generate_script("perf-trace"); 612 err = scripting_ops->generate_script("perf-trace");
613 goto out; 613 goto out;
614 } 614 }
diff --git a/tools/perf/command-list.txt b/tools/perf/command-list.txt
index 9afcff2e3ae5..db6ee94d4a8e 100644
--- a/tools/perf/command-list.txt
+++ b/tools/perf/command-list.txt
@@ -18,3 +18,4 @@ perf-top mainporcelain common
18perf-trace mainporcelain common 18perf-trace mainporcelain common
19perf-probe mainporcelain common 19perf-probe mainporcelain common
20perf-kmem mainporcelain common 20perf-kmem mainporcelain common
21perf-lock mainporcelain common
diff --git a/tools/perf/perf-archive.sh b/tools/perf/perf-archive.sh
index 45fbe2f07b15..910468e6e01c 100644
--- a/tools/perf/perf-archive.sh
+++ b/tools/perf/perf-archive.sh
@@ -9,8 +9,9 @@ fi
9 9
10DEBUGDIR=~/.debug/ 10DEBUGDIR=~/.debug/
11BUILDIDS=$(mktemp /tmp/perf-archive-buildids.XXXXXX) 11BUILDIDS=$(mktemp /tmp/perf-archive-buildids.XXXXXX)
12NOBUILDID=0000000000000000000000000000000000000000
12 13
13perf buildid-list -i $PERF_DATA --with-hits > $BUILDIDS 14perf buildid-list -i $PERF_DATA --with-hits | grep -v "^$NOBUILDID " > $BUILDIDS
14if [ ! -s $BUILDIDS ] ; then 15if [ ! -s $BUILDIDS ] ; then
15 echo "perf archive: no build-ids found" 16 echo "perf archive: no build-ids found"
16 rm -f $BUILDIDS 17 rm -f $BUILDIDS
diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index 57cb107c1f13..cd32c200cdb3 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -445,7 +445,7 @@ int main(int argc, const char **argv)
445 445
446 /* 446 /*
447 * We use PATH to find perf commands, but we prepend some higher 447 * We use PATH to find perf commands, but we prepend some higher
448 * precidence paths: the "--exec-path" option, the PERF_EXEC_PATH 448 * precedence paths: the "--exec-path" option, the PERF_EXEC_PATH
449 * environment, and the $(perfexecdir) from the Makefile at build 449 * environment, and the $(perfexecdir) from the Makefile at build
450 * time. 450 * time.
451 */ 451 */
diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index 75f941bfba9e..6fb379bc1d1f 100644
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -65,9 +65,7 @@
65 * Use the __kuser_memory_barrier helper in the CPU helper page. See 65 * Use the __kuser_memory_barrier helper in the CPU helper page. See
66 * arch/arm/kernel/entry-armv.S in the kernel source for details. 66 * arch/arm/kernel/entry-armv.S in the kernel source for details.
67 */ 67 */
68#define rmb() asm volatile("mov r0, #0xffff0fff; mov lr, pc;" \ 68#define rmb() ((void(*)(void))0xffff0fa0)()
69 "sub pc, r0, #95" ::: "r0", "lr", "cc", \
70 "memory")
71#define cpu_relax() asm volatile("":::"memory") 69#define cpu_relax() asm volatile("":::"memory")
72#endif 70#endif
73 71
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index e8daf5ca6fd2..44408c2621cf 100644
--- a/tools/perf/util/hist.c
+++ b/tools/perf/util/hist.c
@@ -321,7 +321,7 @@ static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
321 new_depth_mask &= ~(1 << (depth - 1)); 321 new_depth_mask &= ~(1 << (depth - 1));
322 322
323 /* 323 /*
324 * But we keep the older depth mask for the line seperator 324 * But we keep the older depth mask for the line separator
325 * to keep the level link until we reach the last child 325 * to keep the level link until we reach the last child
326 */ 326 */
327 ret += ipchain__fprintf_graph_line(fp, depth, depth_mask, 327 ret += ipchain__fprintf_graph_line(fp, depth, depth_mask,
diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index c971e81e9cbf..53181dbfe4a8 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -508,8 +508,8 @@ void show_perf_probe_events(void)
508 struct str_node *ent; 508 struct str_node *ent;
509 509
510 setup_pager(); 510 setup_pager();
511
512 memset(&pp, 0, sizeof(pp)); 511 memset(&pp, 0, sizeof(pp));
512
513 fd = open_kprobe_events(O_RDONLY, 0); 513 fd = open_kprobe_events(O_RDONLY, 0);
514 rawlist = get_trace_kprobe_event_rawlist(fd); 514 rawlist = get_trace_kprobe_event_rawlist(fd);
515 close(fd); 515 close(fd);