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-rw-r--r--arch/arm/mach-mx5/cpu.c47
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
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index 000000000000..41c769f08c4d
--- /dev/null
+++ b/arch/arm/mach-mx5/cpu.c
@@ -0,0 +1,47 @@
1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 *
11 * This file contains the CPU initialization code.
12 */
13
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <mach/hardware.h>
18#include <asm/io.h>
19
20static int __init post_cpu_init(void)
21{
22 unsigned int reg;
23 void __iomem *base;
24
25 if (!cpu_is_mx51())
26 return 0;
27
28 base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
29 __raw_writel(0x0, base + 0x40);
30 __raw_writel(0x0, base + 0x44);
31 __raw_writel(0x0, base + 0x48);
32 __raw_writel(0x0, base + 0x4C);
33 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
34 __raw_writel(reg, base + 0x50);
35
36 base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
37 __raw_writel(0x0, base + 0x40);
38 __raw_writel(0x0, base + 0x44);
39 __raw_writel(0x0, base + 0x48);
40 __raw_writel(0x0, base + 0x4C);
41 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
42 __raw_writel(reg, base + 0x50);
43
44 return 0;
45}
46
47postcore_initcall(post_cpu_init);