diff options
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach/pll.h')
-rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/pll.h | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h new file mode 100644 index 000000000000..90bbd72fdc4e --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/pll.h | |||
@@ -0,0 +1,74 @@ | |||
1 | /* arch/arm/plat-s3c64xx/include/plat/pll.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX PLL code | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) | ||
16 | #define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) | ||
17 | #define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) | ||
18 | #define S3C6400_PLL_MDIV_SHIFT (16) | ||
19 | #define S3C6400_PLL_PDIV_SHIFT (8) | ||
20 | #define S3C6400_PLL_SDIV_SHIFT (0) | ||
21 | |||
22 | #include <asm/div64.h> | ||
23 | |||
24 | static inline unsigned long s3c6400_get_pll(unsigned long baseclk, | ||
25 | u32 pllcon) | ||
26 | { | ||
27 | u32 mdiv, pdiv, sdiv; | ||
28 | u64 fvco = baseclk; | ||
29 | |||
30 | mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; | ||
31 | pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; | ||
32 | sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; | ||
33 | |||
34 | fvco *= mdiv; | ||
35 | do_div(fvco, (pdiv << sdiv)); | ||
36 | |||
37 | return (unsigned long)fvco; | ||
38 | } | ||
39 | |||
40 | #define S3C6400_EPLL_MDIV_MASK ((1 << (23-16)) - 1) | ||
41 | #define S3C6400_EPLL_PDIV_MASK ((1 << (13-8)) - 1) | ||
42 | #define S3C6400_EPLL_SDIV_MASK ((1 << (2-0)) - 1) | ||
43 | #define S3C6400_EPLL_MDIV_SHIFT (16) | ||
44 | #define S3C6400_EPLL_PDIV_SHIFT (8) | ||
45 | #define S3C6400_EPLL_SDIV_SHIFT (0) | ||
46 | #define S3C6400_EPLL_KDIV_MASK (0xffff) | ||
47 | |||
48 | static inline unsigned long s3c6400_get_epll(unsigned long baseclk) | ||
49 | { | ||
50 | unsigned long result; | ||
51 | u32 epll0 = __raw_readl(S3C_EPLL_CON0); | ||
52 | u32 epll1 = __raw_readl(S3C_EPLL_CON1); | ||
53 | u32 mdiv, pdiv, sdiv, kdiv; | ||
54 | u64 tmp; | ||
55 | |||
56 | mdiv = (epll0 >> S3C6400_EPLL_MDIV_SHIFT) & S3C6400_EPLL_MDIV_MASK; | ||
57 | pdiv = (epll0 >> S3C6400_EPLL_PDIV_SHIFT) & S3C6400_EPLL_PDIV_MASK; | ||
58 | sdiv = (epll0 >> S3C6400_EPLL_SDIV_SHIFT) & S3C6400_EPLL_SDIV_MASK; | ||
59 | kdiv = epll1 & S3C6400_EPLL_KDIV_MASK; | ||
60 | |||
61 | /* We need to multiple baseclk by mdiv (the integer part) and kdiv | ||
62 | * which is in 2^16ths, so shift mdiv up (does not overflow) and | ||
63 | * add kdiv before multiplying. The use of tmp is to avoid any | ||
64 | * overflows before shifting bac down into result when multipling | ||
65 | * by the mdiv and kdiv pair. | ||
66 | */ | ||
67 | |||
68 | tmp = baseclk; | ||
69 | tmp *= (mdiv << 16) + kdiv; | ||
70 | do_div(tmp, (pdiv << sdiv)); | ||
71 | result = tmp >> 16; | ||
72 | |||
73 | return result; | ||
74 | } | ||