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-rw-r--r--drivers/media/common/tuners/Kconfig9
-rw-r--r--drivers/media/common/tuners/Makefile1
-rw-r--r--drivers/media/common/tuners/max2165.c39
-rw-r--r--drivers/media/common/tuners/mc44s803.c10
-rw-r--r--drivers/media/common/tuners/mt2060.c13
-rw-r--r--drivers/media/common/tuners/mt2060_priv.h1
-rw-r--r--drivers/media/common/tuners/mt2063.c2307
-rw-r--r--drivers/media/common/tuners/mt2063.h36
-rw-r--r--drivers/media/common/tuners/mt2131.c20
-rw-r--r--drivers/media/common/tuners/mt2131_priv.h1
-rw-r--r--drivers/media/common/tuners/mt2266.c25
-rw-r--r--drivers/media/common/tuners/mxl5005s.c69
-rw-r--r--drivers/media/common/tuners/mxl5007t.c98
-rw-r--r--drivers/media/common/tuners/qt1010.c21
-rw-r--r--drivers/media/common/tuners/qt1010_priv.h1
-rw-r--r--drivers/media/common/tuners/tda18212.c72
-rw-r--r--drivers/media/common/tuners/tda18212.h4
-rw-r--r--drivers/media/common/tuners/tda18218.c34
-rw-r--r--drivers/media/common/tuners/tda18218_priv.h2
-rw-r--r--drivers/media/common/tuners/tda18271-fe.c83
-rw-r--r--drivers/media/common/tuners/tda18271-maps.c4
-rw-r--r--drivers/media/common/tuners/tda18271-priv.h2
-rw-r--r--drivers/media/common/tuners/tda18271.h1
-rw-r--r--drivers/media/common/tuners/tda827x.c52
-rw-r--r--drivers/media/common/tuners/tuner-simple.c68
-rw-r--r--drivers/media/common/tuners/tuner-xc2028.c116
-rw-r--r--drivers/media/common/tuners/xc4000.c105
-rw-r--r--drivers/media/common/tuners/xc5000.c147
-rw-r--r--drivers/media/dvb/b2c2/flexcop.c29
-rw-r--r--drivers/media/dvb/bt8xx/dst.c72
-rw-r--r--drivers/media/dvb/bt8xx/dst_common.h2
-rw-r--r--drivers/media/dvb/bt8xx/dvb-bt8xx.c205
-rw-r--r--drivers/media/dvb/ddbridge/ddbridge-core.c2
-rw-r--r--drivers/media/dvb/dm1105/dm1105.c7
-rw-r--r--drivers/media/dvb/dvb-core/dvb_ca_en50221.c4
-rw-r--r--drivers/media/dvb/dvb-core/dvb_frontend.c885
-rw-r--r--drivers/media/dvb/dvb-core/dvb_frontend.h27
-rw-r--r--drivers/media/dvb/dvb-core/dvb_net.c4
-rw-r--r--drivers/media/dvb/dvb-usb/Kconfig5
-rw-r--r--drivers/media/dvb/dvb-usb/af9005-fe.c105
-rw-r--r--drivers/media/dvb/dvb-usb/af9005.c23
-rw-r--r--drivers/media/dvb/dvb-usb/af9015.c492
-rw-r--r--drivers/media/dvb/dvb-usb/af9015.h6
-rw-r--r--drivers/media/dvb/dvb-usb/anysee.c411
-rw-r--r--drivers/media/dvb/dvb-usb/anysee.h6
-rw-r--r--drivers/media/dvb/dvb-usb/cinergyT2-fe.c33
-rw-r--r--drivers/media/dvb/dvb-usb/cxusb.c11
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700_devices.c717
-rw-r--r--drivers/media/dvb/dvb-usb/digitv.c4
-rw-r--r--drivers/media/dvb/dvb-usb/dtt200u-fe.c33
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb-dvb.c8
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb-ids.h6
-rw-r--r--drivers/media/dvb/dvb-usb/dw2102.c93
-rw-r--r--drivers/media/dvb/dvb-usb/friio-fe.c29
-rw-r--r--drivers/media/dvb/dvb-usb/gp8psk-fe.c24
-rw-r--r--drivers/media/dvb/dvb-usb/it913x.c336
-rw-r--r--drivers/media/dvb/dvb-usb/lmedm04.c8
-rw-r--r--drivers/media/dvb/dvb-usb/mxl111sf-demod.c42
-rw-r--r--drivers/media/dvb/dvb-usb/mxl111sf-tuner.c102
-rw-r--r--drivers/media/dvb/dvb-usb/mxl111sf.c16
-rw-r--r--drivers/media/dvb/dvb-usb/ttusb2.c19
-rw-r--r--drivers/media/dvb/dvb-usb/vp702x-fe.c20
-rw-r--r--drivers/media/dvb/dvb-usb/vp7045-fe.c32
-rw-r--r--drivers/media/dvb/firewire/firedtv-avc.c98
-rw-r--r--drivers/media/dvb/firewire/firedtv-dvb.c5
-rw-r--r--drivers/media/dvb/firewire/firedtv-fe.c35
-rw-r--r--drivers/media/dvb/firewire/firedtv.h4
-rw-r--r--drivers/media/dvb/frontends/Kconfig7
-rw-r--r--drivers/media/dvb/frontends/Makefile1
-rw-r--r--drivers/media/dvb/frontends/af9013.c1727
-rw-r--r--drivers/media/dvb/frontends/af9013.h113
-rw-r--r--drivers/media/dvb/frontends/af9013_priv.h93
-rw-r--r--drivers/media/dvb/frontends/atbm8830.c27
-rw-r--r--drivers/media/dvb/frontends/au8522_dig.c58
-rw-r--r--drivers/media/dvb/frontends/bcm3510.c18
-rw-r--r--drivers/media/dvb/frontends/bsbe1.h7
-rw-r--r--drivers/media/dvb/frontends/bsru6.h9
-rw-r--r--drivers/media/dvb/frontends/cx22700.c51
-rw-r--r--drivers/media/dvb/frontends/cx22702.c69
-rw-r--r--drivers/media/dvb/frontends/cx24110.c20
-rw-r--r--drivers/media/dvb/frontends/cx24113.c10
-rw-r--r--drivers/media/dvb/frontends/cx24116.c36
-rw-r--r--drivers/media/dvb/frontends/cx24123.c56
-rw-r--r--drivers/media/dvb/frontends/cxd2820r.h13
-rw-r--r--drivers/media/dvb/frontends/cxd2820r_c.c25
-rw-r--r--drivers/media/dvb/frontends/cxd2820r_core.c641
-rw-r--r--drivers/media/dvb/frontends/cxd2820r_priv.h23
-rw-r--r--drivers/media/dvb/frontends/cxd2820r_t.c63
-rw-r--r--drivers/media/dvb/frontends/cxd2820r_t2.c70
-rw-r--r--drivers/media/dvb/frontends/dib0070.c10
-rw-r--r--drivers/media/dvb/frontends/dib0090.c165
-rw-r--r--drivers/media/dvb/frontends/dib0090.h54
-rw-r--r--drivers/media/dvb/frontends/dib3000mb.c113
-rw-r--r--drivers/media/dvb/frontends/dib3000mb_priv.h2
-rw-r--r--drivers/media/dvb/frontends/dib3000mc.c132
-rw-r--r--drivers/media/dvb/frontends/dib7000m.c136
-rw-r--r--drivers/media/dvb/frontends/dib7000p.c456
-rw-r--r--drivers/media/dvb/frontends/dib7000p.h16
-rw-r--r--drivers/media/dvb/frontends/dib8000.c1073
-rw-r--r--drivers/media/dvb/frontends/dib8000.h42
-rw-r--r--drivers/media/dvb/frontends/dib9000.c36
-rw-r--r--drivers/media/dvb/frontends/dibx000_common.h17
-rw-r--r--drivers/media/dvb/frontends/drxd.h2
-rw-r--r--drivers/media/dvb/frontends/drxd_hard.c62
-rw-r--r--drivers/media/dvb/frontends/drxk.h11
-rw-r--r--drivers/media/dvb/frontends/drxk_hard.c314
-rw-r--r--drivers/media/dvb/frontends/drxk_hard.h8
-rw-r--r--drivers/media/dvb/frontends/ds3000.c36
-rw-r--r--drivers/media/dvb/frontends/dvb-pll.c65
-rw-r--r--drivers/media/dvb/frontends/dvb_dummy_fe.c18
-rw-r--r--drivers/media/dvb/frontends/ec100.c20
-rw-r--r--drivers/media/dvb/frontends/hd29l2.c861
-rw-r--r--drivers/media/dvb/frontends/hd29l2.h66
-rw-r--r--drivers/media/dvb/frontends/hd29l2_priv.h314
-rw-r--r--drivers/media/dvb/frontends/it913x-fe-priv.h806
-rw-r--r--drivers/media/dvb/frontends/it913x-fe.c289
-rw-r--r--drivers/media/dvb/frontends/it913x-fe.h43
-rw-r--r--drivers/media/dvb/frontends/itd1000.c7
-rw-r--r--drivers/media/dvb/frontends/ix2505v.c8
-rw-r--r--drivers/media/dvb/frontends/l64781.c117
-rw-r--r--drivers/media/dvb/frontends/lgdt3305.c98
-rw-r--r--drivers/media/dvb/frontends/lgdt330x.c37
-rw-r--r--drivers/media/dvb/frontends/lgs8gl5.c29
-rw-r--r--drivers/media/dvb/frontends/lgs8gxx.c26
-rw-r--r--drivers/media/dvb/frontends/mb86a16.c8
-rw-r--r--drivers/media/dvb/frontends/mb86a20s.c546
-rw-r--r--drivers/media/dvb/frontends/mt312.c37
-rw-r--r--drivers/media/dvb/frontends/mt352.c65
-rw-r--r--drivers/media/dvb/frontends/nxt200x.c17
-rw-r--r--drivers/media/dvb/frontends/nxt6000.c32
-rw-r--r--drivers/media/dvb/frontends/or51132.c52
-rw-r--r--drivers/media/dvb/frontends/or51211.c13
-rw-r--r--drivers/media/dvb/frontends/s5h1409.c48
-rw-r--r--drivers/media/dvb/frontends/s5h1411.c48
-rw-r--r--drivers/media/dvb/frontends/s5h1420.c71
-rw-r--r--drivers/media/dvb/frontends/s5h1432.c36
-rw-r--r--drivers/media/dvb/frontends/s921.c23
-rw-r--r--drivers/media/dvb/frontends/si21xx.c20
-rw-r--r--drivers/media/dvb/frontends/sp8870.c29
-rw-r--r--drivers/media/dvb/frontends/sp887x.c50
-rw-r--r--drivers/media/dvb/frontends/stb0899_drv.c37
-rw-r--r--drivers/media/dvb/frontends/stb6000.c8
-rw-r--r--drivers/media/dvb/frontends/stb6100.c6
-rw-r--r--drivers/media/dvb/frontends/stv0288.c17
-rw-r--r--drivers/media/dvb/frontends/stv0297.c37
-rw-r--r--drivers/media/dvb/frontends/stv0299.c32
-rw-r--r--drivers/media/dvb/frontends/stv0367.c156
-rw-r--r--drivers/media/dvb/frontends/stv0900_core.c37
-rw-r--r--drivers/media/dvb/frontends/stv090x.c13
-rw-r--r--drivers/media/dvb/frontends/stv6110.c3
-rw-r--r--drivers/media/dvb/frontends/tda10021.c111
-rw-r--r--drivers/media/dvb/frontends/tda10023.c103
-rw-r--r--drivers/media/dvb/frontends/tda10048.c83
-rw-r--r--drivers/media/dvb/frontends/tda1004x.c111
-rw-r--r--drivers/media/dvb/frontends/tda10071.c8
-rw-r--r--drivers/media/dvb/frontends/tda10086.c62
-rw-r--r--drivers/media/dvb/frontends/tda18271c2dd.c52
-rw-r--r--drivers/media/dvb/frontends/tda8083.c19
-rw-r--r--drivers/media/dvb/frontends/tda826x.c7
-rw-r--r--drivers/media/dvb/frontends/tdhd1.h11
-rw-r--r--drivers/media/dvb/frontends/tua6100.c31
-rw-r--r--drivers/media/dvb/frontends/ves1820.c23
-rw-r--r--drivers/media/dvb/frontends/ves1x93.c23
-rw-r--r--drivers/media/dvb/frontends/zl10036.c10
-rw-r--r--drivers/media/dvb/frontends/zl10039.c10
-rw-r--r--drivers/media/dvb/frontends/zl10353.c116
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1033.c8
-rw-r--r--drivers/media/dvb/mantis/mantis_vp2033.c9
-rw-r--r--drivers/media/dvb/mantis/mantis_vp2040.c9
-rw-r--r--drivers/media/dvb/ngene/ngene-cards.c2
-rw-r--r--drivers/media/dvb/pluto2/pluto2.c6
-rw-r--r--drivers/media/dvb/pt1/va1j5jf8007s.c6
-rw-r--r--drivers/media/dvb/pt1/va1j5jf8007t.c6
-rw-r--r--drivers/media/dvb/siano/smsdvb.c33
-rw-r--r--drivers/media/dvb/ttpci/av7110.c102
-rw-r--r--drivers/media/dvb/ttpci/av7110.h3
-rw-r--r--drivers/media/dvb/ttpci/budget-av.c50
-rw-r--r--drivers/media/dvb/ttpci/budget-ci.c51
-rw-r--r--drivers/media/dvb/ttpci/budget-patch.c27
-rw-r--r--drivers/media/dvb/ttpci/budget.c68
-rw-r--r--drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c102
-rw-r--r--drivers/media/dvb/ttusb-dec/ttusbdecfe.c14
-rw-r--r--drivers/media/media-device.c3
-rw-r--r--drivers/media/radio/Kconfig297
-rw-r--r--drivers/media/radio/radio-si4713.c15
-rw-r--r--drivers/media/radio/radio-timb.c15
-rw-r--r--drivers/media/radio/radio-wl1273.c17
-rw-r--r--drivers/media/radio/tef6862.c8
-rw-r--r--drivers/media/radio/wl128x/Kconfig2
-rw-r--r--drivers/media/radio/wl128x/fmdrv_common.c58
-rw-r--r--drivers/media/radio/wl128x/fmdrv_common.h28
-rw-r--r--drivers/media/radio/wl128x/fmdrv_rx.c84
-rw-r--r--drivers/media/radio/wl128x/fmdrv_rx.h50
-rw-r--r--drivers/media/radio/wl128x/fmdrv_tx.c61
-rw-r--r--drivers/media/radio/wl128x/fmdrv_tx.h20
-rw-r--r--drivers/media/radio/wl128x/fmdrv_v4l2.c1
-rw-r--r--drivers/media/rc/Kconfig10
-rw-r--r--drivers/media/rc/Makefile1
-rw-r--r--drivers/media/rc/ir-nec-decoder.c4
-rw-r--r--drivers/media/rc/ir-raw.c1
-rw-r--r--drivers/media/rc/ir-rc6-decoder.c67
-rw-r--r--drivers/media/rc/ir-sanyo-decoder.c205
-rw-r--r--drivers/media/rc/keymaps/rc-hauppauge.c51
-rw-r--r--drivers/media/rc/keymaps/rc-videomate-m1f.c24
-rw-r--r--drivers/media/rc/rc-core-priv.h12
-rw-r--r--drivers/media/rc/rc-main.c1
-rw-r--r--drivers/media/rc/redrat3.c52
-rw-r--r--drivers/media/video/Kconfig427
-rw-r--r--drivers/media/video/Makefile4
-rw-r--r--drivers/media/video/adv7170.c62
-rw-r--r--drivers/media/video/as3645a.c904
-rw-r--r--drivers/media/video/atmel-isi.c35
-rw-r--r--drivers/media/video/au0828/Kconfig1
-rw-r--r--drivers/media/video/au0828/au0828-i2c.c2
-rw-r--r--drivers/media/video/bt8xx/bt848.h5
-rw-r--r--drivers/media/video/bt8xx/bttv-cards.c58
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c1
-rw-r--r--drivers/media/video/bt8xx/bttv-i2c.c2
-rw-r--r--drivers/media/video/bt8xx/bttv.h3
-rw-r--r--drivers/media/video/cx18/cx18-i2c.c2
-rw-r--r--drivers/media/video/cx18/cx18-i2c.h2
-rw-r--r--drivers/media/video/cx231xx/Kconfig6
-rw-r--r--drivers/media/video/cx231xx/cx231xx-audio.c24
-rw-r--r--drivers/media/video/cx231xx/cx231xx-cards.c86
-rw-r--r--drivers/media/video/cx231xx/cx231xx-core.c7
-rw-r--r--drivers/media/video/cx231xx/cx231xx-dvb.c4
-rw-r--r--drivers/media/video/cx231xx/cx231xx-input.c11
-rw-r--r--drivers/media/video/cx231xx/cx231xx-vbi.c4
-rw-r--r--drivers/media/video/cx231xx/cx231xx-video.c14
-rw-r--r--drivers/media/video/cx231xx/cx231xx.h2
-rw-r--r--drivers/media/video/cx23885/cx23885-417.c141
-rw-r--r--drivers/media/video/cx23885/cx23885-cards.c75
-rw-r--r--drivers/media/video/cx23885/cx23885-core.c24
-rw-r--r--drivers/media/video/cx23885/cx23885-dvb.c108
-rw-r--r--drivers/media/video/cx23885/cx23885-i2c.c2
-rw-r--r--drivers/media/video/cx23885/cx23885-video.c175
-rw-r--r--drivers/media/video/cx23885/cx23885.h14
-rw-r--r--drivers/media/video/cx25821/cx25821-alsa.c73
-rw-r--r--drivers/media/video/cx25821/cx25821-audio-upstream.c113
-rw-r--r--drivers/media/video/cx25821/cx25821-audio.h39
-rw-r--r--drivers/media/video/cx25821/cx25821-cards.c2
-rw-r--r--drivers/media/video/cx25821/cx25821-core.c57
-rw-r--r--drivers/media/video/cx25821/cx25821-i2c.c12
-rw-r--r--drivers/media/video/cx25821/cx25821-medusa-defines.h6
-rw-r--r--drivers/media/video/cx25821/cx25821-medusa-reg.h518
-rw-r--r--drivers/media/video/cx25821/cx25821-medusa-video.c410
-rw-r--r--drivers/media/video/cx25821/cx25821-video-upstream-ch2.c138
-rw-r--r--drivers/media/video/cx25821/cx25821-video-upstream.c156
-rw-r--r--drivers/media/video/cx25821/cx25821-video.c145
-rw-r--r--drivers/media/video/cx25821/cx25821.h4
-rw-r--r--drivers/media/video/cx25840/cx25840-audio.c10
-rw-r--r--drivers/media/video/cx25840/cx25840-core.c3241
-rw-r--r--drivers/media/video/cx88/Kconfig10
-rw-r--r--drivers/media/video/cx88/cx88-cards.c94
-rw-r--r--drivers/media/video/cx88/cx88-dvb.c30
-rw-r--r--drivers/media/video/cx88/cx88-i2c.c2
-rw-r--r--drivers/media/video/cx88/cx88-input.c4
-rw-r--r--drivers/media/video/cx88/cx88.h2
-rw-r--r--drivers/media/video/davinci/dm355_ccdc.c13
-rw-r--r--drivers/media/video/davinci/dm644x_ccdc.c13
-rw-r--r--drivers/media/video/davinci/isif.c13
-rw-r--r--drivers/media/video/davinci/vpbe.c76
-rw-r--r--drivers/media/video/davinci/vpbe_display.c43
-rw-r--r--drivers/media/video/davinci/vpbe_osd.c491
-rw-r--r--drivers/media/video/davinci/vpbe_venc.c223
-rw-r--r--drivers/media/video/davinci/vpfe_capture.c18
-rw-r--r--drivers/media/video/davinci/vpif_capture.c14
-rw-r--r--drivers/media/video/em28xx/em28xx-audio.c2
-rw-r--r--drivers/media/video/em28xx/em28xx-cards.c256
-rw-r--r--drivers/media/video/em28xx/em28xx-core.c61
-rw-r--r--drivers/media/video/em28xx/em28xx-dvb.c190
-rw-r--r--drivers/media/video/em28xx/em28xx-input.c7
-rw-r--r--drivers/media/video/em28xx/em28xx-reg.h5
-rw-r--r--drivers/media/video/em28xx/em28xx-video.c14
-rw-r--r--drivers/media/video/em28xx/em28xx.h8
-rw-r--r--drivers/media/video/fsl-viu.c13
-rw-r--r--drivers/media/video/gspca/Kconfig10
-rw-r--r--drivers/media/video/gspca/Makefile2
-rw-r--r--drivers/media/video/gspca/benq.c7
-rw-r--r--drivers/media/video/gspca/gl860/gl860.c1
-rw-r--r--drivers/media/video/gspca/gspca.c73
-rw-r--r--drivers/media/video/gspca/gspca.h5
-rw-r--r--drivers/media/video/gspca/jl2005bcd.c554
-rw-r--r--drivers/media/video/gspca/konica.c3
-rw-r--r--drivers/media/video/gspca/mars.c1
-rw-r--r--drivers/media/video/gspca/nw80x.c2
-rw-r--r--drivers/media/video/gspca/ov519.c5
-rw-r--r--drivers/media/video/gspca/ov534_9.c141
-rw-r--r--drivers/media/video/gspca/pac207.c10
-rw-r--r--drivers/media/video/gspca/pac7302.c1
-rw-r--r--drivers/media/video/gspca/se401.c10
-rw-r--r--drivers/media/video/gspca/sn9c20x.c38
-rw-r--r--drivers/media/video/gspca/sonixb.c15
-rw-r--r--drivers/media/video/gspca/sonixj.c18
-rw-r--r--drivers/media/video/gspca/spca561.c2
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx.c4
-rw-r--r--drivers/media/video/gspca/t613.c25
-rw-r--r--drivers/media/video/gspca/topro.c2
-rw-r--r--drivers/media/video/gspca/vicam.c3
-rw-r--r--drivers/media/video/gspca/xirlink_cit.c6
-rw-r--r--drivers/media/video/gspca/zc3xx.c117
-rw-r--r--drivers/media/video/ir-kbd-i2c.c25
-rw-r--r--drivers/media/video/ivtv/ivtv-i2c.h2
-rw-r--r--drivers/media/video/m5mols/m5mols.h46
-rw-r--r--drivers/media/video/m5mols/m5mols_capture.c83
-rw-r--r--drivers/media/video/m5mols/m5mols_core.c288
-rw-r--r--drivers/media/video/m5mols/m5mols_reg.h247
-rw-r--r--drivers/media/video/marvell-ccic/mcam-core.c36
-rw-r--r--drivers/media/video/marvell-ccic/mmp-driver.c35
-rw-r--r--drivers/media/video/mt9m001.c5
-rw-r--r--drivers/media/video/mt9m111.c380
-rw-r--r--drivers/media/video/mt9p031.c5
-rw-r--r--drivers/media/video/mt9t001.c5
-rw-r--r--drivers/media/video/mt9t031.c5
-rw-r--r--drivers/media/video/mt9v022.c5
-rw-r--r--drivers/media/video/mt9v032.c8
-rw-r--r--drivers/media/video/mx1_camera.c2
-rw-r--r--drivers/media/video/mx2_camera.c299
-rw-r--r--drivers/media/video/mx3_camera.c17
-rw-r--r--drivers/media/video/omap/omap_vout.c187
-rw-r--r--drivers/media/video/omap/omap_voutdef.h2
-rw-r--r--drivers/media/video/omap1_camera.c16
-rw-r--r--drivers/media/video/omap24xxcam.c19
-rw-r--r--drivers/media/video/omap3isp/isp.c72
-rw-r--r--drivers/media/video/omap3isp/ispccdc.c14
-rw-r--r--drivers/media/video/omap3isp/ispccdc.h2
-rw-r--r--drivers/media/video/omap3isp/ispccp2.c22
-rw-r--r--drivers/media/video/omap3isp/ispccp2.h3
-rw-r--r--drivers/media/video/omap3isp/ispcsi2.c18
-rw-r--r--drivers/media/video/omap3isp/ispcsi2.h2
-rw-r--r--drivers/media/video/omap3isp/isppreview.c25
-rw-r--r--drivers/media/video/omap3isp/isppreview.h2
-rw-r--r--drivers/media/video/omap3isp/ispresizer.c7
-rw-r--r--drivers/media/video/omap3isp/ispresizer.h1
-rw-r--r--drivers/media/video/omap3isp/ispvideo.c27
-rw-r--r--drivers/media/video/omap3isp/ispvideo.h8
-rw-r--r--drivers/media/video/pvrusb2/pvrusb2-hdw.c5
-rw-r--r--drivers/media/video/pwc/pwc-ctrl.c726
-rw-r--r--drivers/media/video/pwc/pwc-dec23.c288
-rw-r--r--drivers/media/video/pwc/pwc-dec23.h5
-rw-r--r--drivers/media/video/pwc/pwc-if.c297
-rw-r--r--drivers/media/video/pwc/pwc-kiara.h2
-rw-r--r--drivers/media/video/pwc/pwc-misc.c87
-rw-r--r--drivers/media/video/pwc/pwc-timon.h2
-rw-r--r--drivers/media/video/pwc/pwc-uncompress.c46
-rw-r--r--drivers/media/video/pwc/pwc-v4l.c258
-rw-r--r--drivers/media/video/pwc/pwc.h66
-rw-r--r--drivers/media/video/pxa_camera.c17
-rw-r--r--drivers/media/video/s5p-fimc/fimc-capture.c11
-rw-r--r--drivers/media/video/s5p-fimc/fimc-core.c134
-rw-r--r--drivers/media/video/s5p-fimc/fimc-core.h30
-rw-r--r--drivers/media/video/s5p-fimc/fimc-reg.c53
-rw-r--r--drivers/media/video/s5p-fimc/mipi-csis.c22
-rw-r--r--drivers/media/video/s5p-fimc/mipi-csis.h3
-rw-r--r--drivers/media/video/s5p-fimc/regs-fimc.h5
-rw-r--r--drivers/media/video/s5p-g2d/Makefile3
-rw-r--r--drivers/media/video/s5p-g2d/g2d-hw.c104
-rw-r--r--drivers/media/video/s5p-g2d/g2d-regs.h115
-rw-r--r--drivers/media/video/s5p-g2d/g2d.c810
-rw-r--r--drivers/media/video/s5p-g2d/g2d.h83
-rw-r--r--drivers/media/video/s5p-jpeg/Makefile2
-rw-r--r--drivers/media/video/s5p-jpeg/jpeg-core.c1481
-rw-r--r--drivers/media/video/s5p-jpeg/jpeg-core.h143
-rw-r--r--drivers/media/video/s5p-jpeg/jpeg-hw.h353
-rw-r--r--drivers/media/video/s5p-jpeg/jpeg-regs.h170
-rw-r--r--drivers/media/video/s5p-mfc/s5p_mfc.c22
-rw-r--r--drivers/media/video/s5p-tv/hdmi_drv.c30
-rw-r--r--drivers/media/video/s5p-tv/mixer.h14
-rw-r--r--drivers/media/video/s5p-tv/mixer_grp_layer.c157
-rw-r--r--drivers/media/video/s5p-tv/mixer_video.c342
-rw-r--r--drivers/media/video/s5p-tv/mixer_vp_layer.c108
-rw-r--r--drivers/media/video/s5p-tv/sdo_drv.c22
-rw-r--r--drivers/media/video/saa7134/saa7134-cards.c33
-rw-r--r--drivers/media/video/saa7134/saa7134-core.c1
-rw-r--r--drivers/media/video/saa7134/saa7134-dvb.c33
-rw-r--r--drivers/media/video/saa7134/saa7134-input.c23
-rw-r--r--drivers/media/video/saa7134/saa7134-tvaudio.c65
-rw-r--r--drivers/media/video/saa7134/saa7134-video.c2
-rw-r--r--drivers/media/video/saa7134/saa7134.h2
-rw-r--r--drivers/media/video/saa7164/saa7164-bus.c4
-rw-r--r--drivers/media/video/sh_mobile_ceu_camera.c11
-rw-r--r--drivers/media/video/sh_mobile_csi2.c13
-rw-r--r--drivers/media/video/soc_camera.c4
-rw-r--r--drivers/media/video/soc_camera_platform.c13
-rw-r--r--drivers/media/video/stk-webcam.c4
-rw-r--r--drivers/media/video/timblogiw.c15
-rw-r--r--drivers/media/video/tlg2300/pd-common.h2
-rw-r--r--drivers/media/video/tlg2300/pd-dvb.c22
-rw-r--r--drivers/media/video/tm6000/Kconfig6
-rw-r--r--drivers/media/video/tm6000/tm6000-alsa.c21
-rw-r--r--drivers/media/video/tm6000/tm6000-cards.c35
-rw-r--r--drivers/media/video/tm6000/tm6000-core.c86
-rw-r--r--drivers/media/video/tm6000/tm6000-dvb.c21
-rw-r--r--drivers/media/video/tm6000/tm6000-i2c.c8
-rw-r--r--drivers/media/video/tm6000/tm6000-input.c407
-rw-r--r--drivers/media/video/tm6000/tm6000-regs.h14
-rw-r--r--drivers/media/video/tm6000/tm6000-stds.c89
-rw-r--r--drivers/media/video/tm6000/tm6000-video.c21
-rw-r--r--drivers/media/video/tm6000/tm6000.h3
-rw-r--r--drivers/media/video/tuner-core.c1
-rw-r--r--drivers/media/video/tvp5150.c81
-rw-r--r--drivers/media/video/usbvision/usbvision-i2c.c46
-rw-r--r--drivers/media/video/uvc/Kconfig1
-rw-r--r--drivers/media/video/uvc/Makefile2
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c19
-rw-r--r--drivers/media/video/uvc/uvc_debugfs.c136
-rw-r--r--drivers/media/video/uvc/uvc_driver.c30
-rw-r--r--drivers/media/video/uvc/uvc_isight.c10
-rw-r--r--drivers/media/video/uvc/uvc_queue.c564
-rw-r--r--drivers/media/video/uvc/uvc_v4l2.c29
-rw-r--r--drivers/media/video/uvc/uvc_video.c625
-rw-r--r--drivers/media/video/uvc/uvcvideo.h128
-rw-r--r--drivers/media/video/v4l2-compat-ioctl32.c2
-rw-r--r--drivers/media/video/v4l2-ctrls.c5
-rw-r--r--drivers/media/video/v4l2-dev.c14
-rw-r--r--drivers/media/video/v4l2-device.c4
-rw-r--r--drivers/media/video/v4l2-ioctl.c120
-rw-r--r--drivers/media/video/v4l2-subdev.c4
-rw-r--r--drivers/media/video/via-camera.c22
-rw-r--r--drivers/media/video/videobuf-dvb.c7
-rw-r--r--drivers/media/video/videobuf2-core.c118
-rw-r--r--drivers/media/video/videobuf2-dma-sg.c3
-rw-r--r--drivers/media/video/videobuf2-memops.c28
-rw-r--r--drivers/media/video/videobuf2-vmalloc.c90
-rw-r--r--drivers/media/video/vino.c2
-rw-r--r--drivers/staging/media/as102/Kconfig1
-rw-r--r--drivers/staging/media/as102/Makefile2
-rw-r--r--drivers/staging/media/as102/as102_drv.c126
-rw-r--r--drivers/staging/media/as102/as102_drv.h59
-rw-r--r--drivers/staging/media/as102/as102_fe.c81
-rw-r--r--drivers/staging/media/as102/as102_fw.c44
-rw-r--r--drivers/staging/media/as102/as102_fw.h10
-rw-r--r--drivers/staging/media/as102/as102_usb_drv.c48
-rw-r--r--drivers/staging/media/as102/as102_usb_drv.h6
-rw-r--r--drivers/staging/media/as102/as10x_cmd.c143
-rw-r--r--drivers/staging/media/as102/as10x_cmd.h895
-rw-r--r--drivers/staging/media/as102/as10x_cmd_cfg.c66
-rw-r--r--drivers/staging/media/as102/as10x_cmd_stream.c56
-rw-r--r--drivers/staging/media/as102/as10x_handle.h26
-rw-r--r--drivers/staging/media/as102/as10x_types.h250
-rw-r--r--drivers/staging/media/dt3155v4l/dt3155v4l.c17
-rw-r--r--drivers/staging/media/easycap/easycap.h93
-rw-r--r--drivers/staging/media/easycap/easycap_ioctl.c60
-rw-r--r--drivers/staging/media/easycap/easycap_low.c273
-rw-r--r--drivers/staging/media/easycap/easycap_main.c379
-rw-r--r--drivers/staging/media/easycap/easycap_settings.c2
-rw-r--r--drivers/staging/media/easycap/easycap_sound.c340
-rw-r--r--drivers/staging/media/go7007/go7007-usb.c8
-rw-r--r--drivers/staging/media/lirc/lirc_imon.c4
-rw-r--r--drivers/staging/media/lirc/lirc_serial.c113
-rw-r--r--drivers/staging/media/solo6x10/Makefile2
-rw-r--r--drivers/staging/media/solo6x10/solo6x10-jpeg.h (renamed from drivers/staging/media/solo6x10/jpeg.h)0
-rw-r--r--drivers/staging/media/solo6x10/v4l2-enc.c2
453 files changed, 30114 insertions, 13494 deletions
diff --git a/drivers/media/common/tuners/Kconfig b/drivers/media/common/tuners/Kconfig
index 996302ae210..4a6d5cef396 100644
--- a/drivers/media/common/tuners/Kconfig
+++ b/drivers/media/common/tuners/Kconfig
@@ -26,7 +26,7 @@ config MEDIA_TUNER
26 select MEDIA_TUNER_XC4000 if !MEDIA_TUNER_CUSTOMISE 26 select MEDIA_TUNER_XC4000 if !MEDIA_TUNER_CUSTOMISE
27 select MEDIA_TUNER_MT20XX if !MEDIA_TUNER_CUSTOMISE 27 select MEDIA_TUNER_MT20XX if !MEDIA_TUNER_CUSTOMISE
28 select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE 28 select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE
29 select MEDIA_TUNER_TEA5761 if !MEDIA_TUNER_CUSTOMISE 29 select MEDIA_TUNER_TEA5761 if !MEDIA_TUNER_CUSTOMISE && EXPERIMENTAL
30 select MEDIA_TUNER_TEA5767 if !MEDIA_TUNER_CUSTOMISE 30 select MEDIA_TUNER_TEA5767 if !MEDIA_TUNER_CUSTOMISE
31 select MEDIA_TUNER_SIMPLE if !MEDIA_TUNER_CUSTOMISE 31 select MEDIA_TUNER_SIMPLE if !MEDIA_TUNER_CUSTOMISE
32 select MEDIA_TUNER_TDA9887 if !MEDIA_TUNER_CUSTOMISE 32 select MEDIA_TUNER_TDA9887 if !MEDIA_TUNER_CUSTOMISE
@@ -116,6 +116,13 @@ config MEDIA_TUNER_MT2060
116 help 116 help
117 A driver for the silicon IF tuner MT2060 from Microtune. 117 A driver for the silicon IF tuner MT2060 from Microtune.
118 118
119config MEDIA_TUNER_MT2063
120 tristate "Microtune MT2063 silicon IF tuner"
121 depends on VIDEO_MEDIA && I2C
122 default m if MEDIA_TUNER_CUSTOMISE
123 help
124 A driver for the silicon IF tuner MT2063 from Microtune.
125
119config MEDIA_TUNER_MT2266 126config MEDIA_TUNER_MT2266
120 tristate "Microtune MT2266 silicon tuner" 127 tristate "Microtune MT2266 silicon tuner"
121 depends on VIDEO_MEDIA && I2C 128 depends on VIDEO_MEDIA && I2C
diff --git a/drivers/media/common/tuners/Makefile b/drivers/media/common/tuners/Makefile
index 196c12a55f9..8295854ab94 100644
--- a/drivers/media/common/tuners/Makefile
+++ b/drivers/media/common/tuners/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_MEDIA_TUNER_TDA18271) += tda18271.o
18obj-$(CONFIG_MEDIA_TUNER_XC5000) += xc5000.o 18obj-$(CONFIG_MEDIA_TUNER_XC5000) += xc5000.o
19obj-$(CONFIG_MEDIA_TUNER_XC4000) += xc4000.o 19obj-$(CONFIG_MEDIA_TUNER_XC4000) += xc4000.o
20obj-$(CONFIG_MEDIA_TUNER_MT2060) += mt2060.o 20obj-$(CONFIG_MEDIA_TUNER_MT2060) += mt2060.o
21obj-$(CONFIG_MEDIA_TUNER_MT2063) += mt2063.o
21obj-$(CONFIG_MEDIA_TUNER_MT2266) += mt2266.o 22obj-$(CONFIG_MEDIA_TUNER_MT2266) += mt2266.o
22obj-$(CONFIG_MEDIA_TUNER_QT1010) += qt1010.o 23obj-$(CONFIG_MEDIA_TUNER_QT1010) += qt1010.o
23obj-$(CONFIG_MEDIA_TUNER_MT2131) += mt2131.o 24obj-$(CONFIG_MEDIA_TUNER_MT2131) += mt2131.o
diff --git a/drivers/media/common/tuners/max2165.c b/drivers/media/common/tuners/max2165.c
index 9883617b786..cb2c98fbad1 100644
--- a/drivers/media/common/tuners/max2165.c
+++ b/drivers/media/common/tuners/max2165.c
@@ -151,7 +151,7 @@ static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw)
151{ 151{
152 u8 val; 152 u8 val;
153 153
154 if (bw == BANDWIDTH_8_MHZ) 154 if (bw == 8000000)
155 val = priv->bb_filter_8mhz_cfg; 155 val = priv->bb_filter_8mhz_cfg;
156 else 156 else
157 val = priv->bb_filter_7mhz_cfg; 157 val = priv->bb_filter_7mhz_cfg;
@@ -257,39 +257,28 @@ static void max2165_debug_status(struct max2165_priv *priv)
257 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc); 257 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc);
258} 258}
259 259
260static int max2165_set_params(struct dvb_frontend *fe, 260static int max2165_set_params(struct dvb_frontend *fe)
261 struct dvb_frontend_parameters *params)
262{ 261{
263 struct max2165_priv *priv = fe->tuner_priv; 262 struct max2165_priv *priv = fe->tuner_priv;
263 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
264 int ret; 264 int ret;
265 265
266 dprintk("%s() frequency=%d (Hz)\n", __func__, params->frequency); 266 switch (c->bandwidth_hz) {
267 if (fe->ops.info.type == FE_ATSC) { 267 case 7000000:
268 return -EINVAL; 268 case 8000000:
269 } else if (fe->ops.info.type == FE_OFDM) { 269 priv->frequency = c->frequency;
270 dprintk("%s() OFDM\n", __func__); 270 break;
271 switch (params->u.ofdm.bandwidth) { 271 default:
272 case BANDWIDTH_6_MHZ: 272 printk(KERN_INFO "MAX2165: bandwidth %d Hz not supported.\n",
273 return -EINVAL; 273 c->bandwidth_hz);
274 case BANDWIDTH_7_MHZ:
275 case BANDWIDTH_8_MHZ:
276 priv->frequency = params->frequency;
277 priv->bandwidth = params->u.ofdm.bandwidth;
278 break;
279 default:
280 printk(KERN_ERR "MAX2165 bandwidth not set!\n");
281 return -EINVAL;
282 }
283 } else {
284 printk(KERN_ERR "MAX2165 modulation type not supported!\n");
285 return -EINVAL; 274 return -EINVAL;
286 } 275 }
287 276
288 dprintk("%s() frequency=%d\n", __func__, priv->frequency); 277 dprintk("%s() frequency=%d\n", __func__, c->frequency);
289 278
290 if (fe->ops.i2c_gate_ctrl) 279 if (fe->ops.i2c_gate_ctrl)
291 fe->ops.i2c_gate_ctrl(fe, 1); 280 fe->ops.i2c_gate_ctrl(fe, 1);
292 max2165_set_bandwidth(priv, priv->bandwidth); 281 max2165_set_bandwidth(priv, c->bandwidth_hz);
293 ret = max2165_set_rf(priv, priv->frequency); 282 ret = max2165_set_rf(priv, priv->frequency);
294 mdelay(50); 283 mdelay(50);
295 max2165_debug_status(priv); 284 max2165_debug_status(priv);
@@ -370,7 +359,7 @@ static int max2165_init(struct dvb_frontend *fe)
370 359
371 max2165_read_rom_table(priv); 360 max2165_read_rom_table(priv);
372 361
373 max2165_set_bandwidth(priv, BANDWIDTH_8_MHZ); 362 max2165_set_bandwidth(priv, 8000000);
374 363
375 if (fe->ops.i2c_gate_ctrl) 364 if (fe->ops.i2c_gate_ctrl)
376 fe->ops.i2c_gate_ctrl(fe, 0); 365 fe->ops.i2c_gate_ctrl(fe, 0);
diff --git a/drivers/media/common/tuners/mc44s803.c b/drivers/media/common/tuners/mc44s803.c
index fe5c4b8d83e..5ddce7e326f 100644
--- a/drivers/media/common/tuners/mc44s803.c
+++ b/drivers/media/common/tuners/mc44s803.c
@@ -214,22 +214,22 @@ exit:
214 return err; 214 return err;
215} 215}
216 216
217static int mc44s803_set_params(struct dvb_frontend *fe, 217static int mc44s803_set_params(struct dvb_frontend *fe)
218 struct dvb_frontend_parameters *params)
219{ 218{
220 struct mc44s803_priv *priv = fe->tuner_priv; 219 struct mc44s803_priv *priv = fe->tuner_priv;
220 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
221 u32 r1, r2, n1, n2, lo1, lo2, freq, val; 221 u32 r1, r2, n1, n2, lo1, lo2, freq, val;
222 int err; 222 int err;
223 223
224 priv->frequency = params->frequency; 224 priv->frequency = c->frequency;
225 225
226 r1 = MC44S803_OSC / 1000000; 226 r1 = MC44S803_OSC / 1000000;
227 r2 = MC44S803_OSC / 100000; 227 r2 = MC44S803_OSC / 100000;
228 228
229 n1 = (params->frequency + MC44S803_IF1 + 500000) / 1000000; 229 n1 = (c->frequency + MC44S803_IF1 + 500000) / 1000000;
230 freq = MC44S803_OSC / r1 * n1; 230 freq = MC44S803_OSC / r1 * n1;
231 lo1 = ((60 * n1) + (r1 / 2)) / r1; 231 lo1 = ((60 * n1) + (r1 / 2)) / r1;
232 freq = freq - params->frequency; 232 freq = freq - c->frequency;
233 233
234 n2 = (freq - MC44S803_IF2 + 50000) / 100000; 234 n2 = (freq - MC44S803_IF2 + 50000) / 100000;
235 lo2 = ((60 * n2) + (r2 / 2)) / r2; 235 lo2 = ((60 * n2) + (r2 / 2)) / r2;
diff --git a/drivers/media/common/tuners/mt2060.c b/drivers/media/common/tuners/mt2060.c
index 2d0e7689c6a..13381de58a8 100644
--- a/drivers/media/common/tuners/mt2060.c
+++ b/drivers/media/common/tuners/mt2060.c
@@ -153,8 +153,9 @@ static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
153#define IF2 36150 // IF2 frequency = 36.150 MHz 153#define IF2 36150 // IF2 frequency = 36.150 MHz
154#define FREF 16000 // Quartz oscillator 16 MHz 154#define FREF 16000 // Quartz oscillator 16 MHz
155 155
156static int mt2060_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 156static int mt2060_set_params(struct dvb_frontend *fe)
157{ 157{
158 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
158 struct mt2060_priv *priv; 159 struct mt2060_priv *priv;
159 int ret=0; 160 int ret=0;
160 int i=0; 161 int i=0;
@@ -176,8 +177,7 @@ static int mt2060_set_params(struct dvb_frontend *fe, struct dvb_frontend_parame
176 177
177 mt2060_writeregs(priv,b,2); 178 mt2060_writeregs(priv,b,2);
178 179
179 freq = params->frequency / 1000; // Hz -> kHz 180 freq = c->frequency / 1000; /* Hz -> kHz */
180 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
181 181
182 f_lo1 = freq + if1 * 1000; 182 f_lo1 = freq + if1 * 1000;
183 f_lo1 = (f_lo1 / 250) * 250; 183 f_lo1 = (f_lo1 / 250) * 250;
@@ -293,10 +293,9 @@ static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency)
293 return 0; 293 return 0;
294} 294}
295 295
296static int mt2060_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) 296static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
297{ 297{
298 struct mt2060_priv *priv = fe->tuner_priv; 298 *frequency = IF2 * 1000;
299 *bandwidth = priv->bandwidth;
300 return 0; 299 return 0;
301} 300}
302 301
@@ -356,7 +355,7 @@ static const struct dvb_tuner_ops mt2060_tuner_ops = {
356 355
357 .set_params = mt2060_set_params, 356 .set_params = mt2060_set_params,
358 .get_frequency = mt2060_get_frequency, 357 .get_frequency = mt2060_get_frequency,
359 .get_bandwidth = mt2060_get_bandwidth 358 .get_if_frequency = mt2060_get_if_frequency,
360}; 359};
361 360
362/* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */ 361/* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
diff --git a/drivers/media/common/tuners/mt2060_priv.h b/drivers/media/common/tuners/mt2060_priv.h
index 5eaccdefd0b..2b60de6c707 100644
--- a/drivers/media/common/tuners/mt2060_priv.h
+++ b/drivers/media/common/tuners/mt2060_priv.h
@@ -97,7 +97,6 @@ struct mt2060_priv {
97 struct i2c_adapter *i2c; 97 struct i2c_adapter *i2c;
98 98
99 u32 frequency; 99 u32 frequency;
100 u32 bandwidth;
101 u16 if1_freq; 100 u16 if1_freq;
102 u8 fmfreq; 101 u8 fmfreq;
103}; 102};
diff --git a/drivers/media/common/tuners/mt2063.c b/drivers/media/common/tuners/mt2063.c
new file mode 100644
index 00000000000..c89af3cd5eb
--- /dev/null
+++ b/drivers/media/common/tuners/mt2063.c
@@ -0,0 +1,2307 @@
1/*
2 * Driver for mt2063 Micronas tuner
3 *
4 * Copyright (c) 2011 Mauro Carvalho Chehab <mchehab@redhat.com>
5 *
6 * This driver came from a driver originally written by:
7 * Henry Wang <Henry.wang@AzureWave.com>
8 * Made publicly available by Terratec, at:
9 * http://linux.terratec.de/files/TERRATEC_H7/20110323_TERRATEC_H7_Linux.tar.gz
10 * The original driver's license is GPL, as declared with MODULE_LICENSE()
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation under version 2 of the License.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 */
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/videodev2.h>
27
28#include "mt2063.h"
29
30static unsigned int debug;
31module_param(debug, int, 0644);
32MODULE_PARM_DESC(debug, "Set Verbosity level");
33
34#define dprintk(level, fmt, arg...) do { \
35if (debug >= level) \
36 printk(KERN_DEBUG "mt2063 %s: " fmt, __func__, ## arg); \
37} while (0)
38
39
40/* positive error codes used internally */
41
42/* Info: Unavoidable LO-related spur may be present in the output */
43#define MT2063_SPUR_PRESENT_ERR (0x00800000)
44
45/* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
46#define MT2063_SPUR_CNT_MASK (0x001f0000)
47#define MT2063_SPUR_SHIFT (16)
48
49/* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
50#define MT2063_UPC_RANGE (0x04000000)
51
52/* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
53#define MT2063_DNC_RANGE (0x08000000)
54
55/*
56 * Constant defining the version of the following structure
57 * and therefore the API for this code.
58 *
59 * When compiling the tuner driver, the preprocessor will
60 * check against this version number to make sure that
61 * it matches the version that the tuner driver knows about.
62 */
63
64/* DECT Frequency Avoidance */
65#define MT2063_DECT_AVOID_US_FREQS 0x00000001
66
67#define MT2063_DECT_AVOID_EURO_FREQS 0x00000002
68
69#define MT2063_EXCLUDE_US_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_US_FREQS) != 0)
70
71#define MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_EURO_FREQS) != 0)
72
73enum MT2063_DECT_Avoid_Type {
74 MT2063_NO_DECT_AVOIDANCE = 0, /* Do not create DECT exclusion zones. */
75 MT2063_AVOID_US_DECT = MT2063_DECT_AVOID_US_FREQS, /* Avoid US DECT frequencies. */
76 MT2063_AVOID_EURO_DECT = MT2063_DECT_AVOID_EURO_FREQS, /* Avoid European DECT frequencies. */
77 MT2063_AVOID_BOTH /* Avoid both regions. Not typically used. */
78};
79
80#define MT2063_MAX_ZONES 48
81
82struct MT2063_ExclZone_t {
83 u32 min_;
84 u32 max_;
85 struct MT2063_ExclZone_t *next_;
86};
87
88/*
89 * Structure of data needed for Spur Avoidance
90 */
91struct MT2063_AvoidSpursData_t {
92 u32 f_ref;
93 u32 f_in;
94 u32 f_LO1;
95 u32 f_if1_Center;
96 u32 f_if1_Request;
97 u32 f_if1_bw;
98 u32 f_LO2;
99 u32 f_out;
100 u32 f_out_bw;
101 u32 f_LO1_Step;
102 u32 f_LO2_Step;
103 u32 f_LO1_FracN_Avoid;
104 u32 f_LO2_FracN_Avoid;
105 u32 f_zif_bw;
106 u32 f_min_LO_Separation;
107 u32 maxH1;
108 u32 maxH2;
109 enum MT2063_DECT_Avoid_Type avoidDECT;
110 u32 bSpurPresent;
111 u32 bSpurAvoided;
112 u32 nSpursFound;
113 u32 nZones;
114 struct MT2063_ExclZone_t *freeZones;
115 struct MT2063_ExclZone_t *usedZones;
116 struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES];
117};
118
119/*
120 * Parameter for function MT2063_SetPowerMask that specifies the power down
121 * of various sections of the MT2063.
122 */
123enum MT2063_Mask_Bits {
124 MT2063_REG_SD = 0x0040, /* Shutdown regulator */
125 MT2063_SRO_SD = 0x0020, /* Shutdown SRO */
126 MT2063_AFC_SD = 0x0010, /* Shutdown AFC A/D */
127 MT2063_PD_SD = 0x0002, /* Enable power detector shutdown */
128 MT2063_PDADC_SD = 0x0001, /* Enable power detector A/D shutdown */
129 MT2063_VCO_SD = 0x8000, /* Enable VCO shutdown */
130 MT2063_LTX_SD = 0x4000, /* Enable LTX shutdown */
131 MT2063_LT1_SD = 0x2000, /* Enable LT1 shutdown */
132 MT2063_LNA_SD = 0x1000, /* Enable LNA shutdown */
133 MT2063_UPC_SD = 0x0800, /* Enable upconverter shutdown */
134 MT2063_DNC_SD = 0x0400, /* Enable downconverter shutdown */
135 MT2063_VGA_SD = 0x0200, /* Enable VGA shutdown */
136 MT2063_AMP_SD = 0x0100, /* Enable AMP shutdown */
137 MT2063_ALL_SD = 0xFF73, /* All shutdown bits for this tuner */
138 MT2063_NONE_SD = 0x0000 /* No shutdown bits */
139};
140
141/*
142 * Possible values for MT2063_DNC_OUTPUT
143 */
144enum MT2063_DNC_Output_Enable {
145 MT2063_DNC_NONE = 0,
146 MT2063_DNC_1,
147 MT2063_DNC_2,
148 MT2063_DNC_BOTH
149};
150
151/*
152 * Two-wire serial bus subaddresses of the tuner registers.
153 * Also known as the tuner's register addresses.
154 */
155enum MT2063_Register_Offsets {
156 MT2063_REG_PART_REV = 0, /* 0x00: Part/Rev Code */
157 MT2063_REG_LO1CQ_1, /* 0x01: LO1C Queued Byte 1 */
158 MT2063_REG_LO1CQ_2, /* 0x02: LO1C Queued Byte 2 */
159 MT2063_REG_LO2CQ_1, /* 0x03: LO2C Queued Byte 1 */
160 MT2063_REG_LO2CQ_2, /* 0x04: LO2C Queued Byte 2 */
161 MT2063_REG_LO2CQ_3, /* 0x05: LO2C Queued Byte 3 */
162 MT2063_REG_RSVD_06, /* 0x06: Reserved */
163 MT2063_REG_LO_STATUS, /* 0x07: LO Status */
164 MT2063_REG_FIFFC, /* 0x08: FIFF Center */
165 MT2063_REG_CLEARTUNE, /* 0x09: ClearTune Filter */
166 MT2063_REG_ADC_OUT, /* 0x0A: ADC_OUT */
167 MT2063_REG_LO1C_1, /* 0x0B: LO1C Byte 1 */
168 MT2063_REG_LO1C_2, /* 0x0C: LO1C Byte 2 */
169 MT2063_REG_LO2C_1, /* 0x0D: LO2C Byte 1 */
170 MT2063_REG_LO2C_2, /* 0x0E: LO2C Byte 2 */
171 MT2063_REG_LO2C_3, /* 0x0F: LO2C Byte 3 */
172 MT2063_REG_RSVD_10, /* 0x10: Reserved */
173 MT2063_REG_PWR_1, /* 0x11: PWR Byte 1 */
174 MT2063_REG_PWR_2, /* 0x12: PWR Byte 2 */
175 MT2063_REG_TEMP_STATUS, /* 0x13: Temp Status */
176 MT2063_REG_XO_STATUS, /* 0x14: Crystal Status */
177 MT2063_REG_RF_STATUS, /* 0x15: RF Attn Status */
178 MT2063_REG_FIF_STATUS, /* 0x16: FIF Attn Status */
179 MT2063_REG_LNA_OV, /* 0x17: LNA Attn Override */
180 MT2063_REG_RF_OV, /* 0x18: RF Attn Override */
181 MT2063_REG_FIF_OV, /* 0x19: FIF Attn Override */
182 MT2063_REG_LNA_TGT, /* 0x1A: Reserved */
183 MT2063_REG_PD1_TGT, /* 0x1B: Pwr Det 1 Target */
184 MT2063_REG_PD2_TGT, /* 0x1C: Pwr Det 2 Target */
185 MT2063_REG_RSVD_1D, /* 0x1D: Reserved */
186 MT2063_REG_RSVD_1E, /* 0x1E: Reserved */
187 MT2063_REG_RSVD_1F, /* 0x1F: Reserved */
188 MT2063_REG_RSVD_20, /* 0x20: Reserved */
189 MT2063_REG_BYP_CTRL, /* 0x21: Bypass Control */
190 MT2063_REG_RSVD_22, /* 0x22: Reserved */
191 MT2063_REG_RSVD_23, /* 0x23: Reserved */
192 MT2063_REG_RSVD_24, /* 0x24: Reserved */
193 MT2063_REG_RSVD_25, /* 0x25: Reserved */
194 MT2063_REG_RSVD_26, /* 0x26: Reserved */
195 MT2063_REG_RSVD_27, /* 0x27: Reserved */
196 MT2063_REG_FIFF_CTRL, /* 0x28: FIFF Control */
197 MT2063_REG_FIFF_OFFSET, /* 0x29: FIFF Offset */
198 MT2063_REG_CTUNE_CTRL, /* 0x2A: Reserved */
199 MT2063_REG_CTUNE_OV, /* 0x2B: Reserved */
200 MT2063_REG_CTRL_2C, /* 0x2C: Reserved */
201 MT2063_REG_FIFF_CTRL2, /* 0x2D: Fiff Control */
202 MT2063_REG_RSVD_2E, /* 0x2E: Reserved */
203 MT2063_REG_DNC_GAIN, /* 0x2F: DNC Control */
204 MT2063_REG_VGA_GAIN, /* 0x30: VGA Gain Ctrl */
205 MT2063_REG_RSVD_31, /* 0x31: Reserved */
206 MT2063_REG_TEMP_SEL, /* 0x32: Temperature Selection */
207 MT2063_REG_RSVD_33, /* 0x33: Reserved */
208 MT2063_REG_RSVD_34, /* 0x34: Reserved */
209 MT2063_REG_RSVD_35, /* 0x35: Reserved */
210 MT2063_REG_RSVD_36, /* 0x36: Reserved */
211 MT2063_REG_RSVD_37, /* 0x37: Reserved */
212 MT2063_REG_RSVD_38, /* 0x38: Reserved */
213 MT2063_REG_RSVD_39, /* 0x39: Reserved */
214 MT2063_REG_RSVD_3A, /* 0x3A: Reserved */
215 MT2063_REG_RSVD_3B, /* 0x3B: Reserved */
216 MT2063_REG_RSVD_3C, /* 0x3C: Reserved */
217 MT2063_REG_END_REGS
218};
219
220struct mt2063_state {
221 struct i2c_adapter *i2c;
222
223 bool init;
224
225 const struct mt2063_config *config;
226 struct dvb_tuner_ops ops;
227 struct dvb_frontend *frontend;
228 struct tuner_state status;
229
230 u32 frequency;
231 u32 srate;
232 u32 bandwidth;
233 u32 reference;
234
235 u32 tuner_id;
236 struct MT2063_AvoidSpursData_t AS_Data;
237 u32 f_IF1_actual;
238 u32 rcvr_mode;
239 u32 ctfilt_sw;
240 u32 CTFiltMax[31];
241 u32 num_regs;
242 u8 reg[MT2063_REG_END_REGS];
243};
244
245/*
246 * mt2063_write - Write data into the I2C bus
247 */
248static u32 mt2063_write(struct mt2063_state *state, u8 reg, u8 *data, u32 len)
249{
250 struct dvb_frontend *fe = state->frontend;
251 int ret;
252 u8 buf[60];
253 struct i2c_msg msg = {
254 .addr = state->config->tuner_address,
255 .flags = 0,
256 .buf = buf,
257 .len = len + 1
258 };
259
260 dprintk(2, "\n");
261
262 msg.buf[0] = reg;
263 memcpy(msg.buf + 1, data, len);
264
265 if (fe->ops.i2c_gate_ctrl)
266 fe->ops.i2c_gate_ctrl(fe, 1);
267 ret = i2c_transfer(state->i2c, &msg, 1);
268 if (fe->ops.i2c_gate_ctrl)
269 fe->ops.i2c_gate_ctrl(fe, 0);
270
271 if (ret < 0)
272 printk(KERN_ERR "%s error ret=%d\n", __func__, ret);
273
274 return ret;
275}
276
277/*
278 * mt2063_write - Write register data into the I2C bus, caching the value
279 */
280static u32 mt2063_setreg(struct mt2063_state *state, u8 reg, u8 val)
281{
282 u32 status;
283
284 dprintk(2, "\n");
285
286 if (reg >= MT2063_REG_END_REGS)
287 return -ERANGE;
288
289 status = mt2063_write(state, reg, &val, 1);
290 if (status < 0)
291 return status;
292
293 state->reg[reg] = val;
294
295 return 0;
296}
297
298/*
299 * mt2063_read - Read data from the I2C bus
300 */
301static u32 mt2063_read(struct mt2063_state *state,
302 u8 subAddress, u8 *pData, u32 cnt)
303{
304 u32 status = 0; /* Status to be returned */
305 struct dvb_frontend *fe = state->frontend;
306 u32 i = 0;
307
308 dprintk(2, "addr 0x%02x, cnt %d\n", subAddress, cnt);
309
310 if (fe->ops.i2c_gate_ctrl)
311 fe->ops.i2c_gate_ctrl(fe, 1);
312
313 for (i = 0; i < cnt; i++) {
314 u8 b0[] = { subAddress + i };
315 struct i2c_msg msg[] = {
316 {
317 .addr = state->config->tuner_address,
318 .flags = 0,
319 .buf = b0,
320 .len = 1
321 }, {
322 .addr = state->config->tuner_address,
323 .flags = I2C_M_RD,
324 .buf = pData + i,
325 .len = 1
326 }
327 };
328
329 status = i2c_transfer(state->i2c, msg, 2);
330 dprintk(2, "addr 0x%02x, ret = %d, val = 0x%02x\n",
331 subAddress + i, status, *(pData + i));
332 if (status < 0)
333 break;
334 }
335 if (fe->ops.i2c_gate_ctrl)
336 fe->ops.i2c_gate_ctrl(fe, 0);
337
338 if (status < 0)
339 printk(KERN_ERR "Can't read from address 0x%02x,\n",
340 subAddress + i);
341
342 return status;
343}
344
345/*
346 * FIXME: Is this really needed?
347 */
348static int MT2063_Sleep(struct dvb_frontend *fe)
349{
350 /*
351 * ToDo: Add code here to implement a OS blocking
352 */
353 msleep(10);
354
355 return 0;
356}
357
358/*
359 * Microtune spur avoidance
360 */
361
362/* Implement ceiling, floor functions. */
363#define ceil(n, d) (((n) < 0) ? (-((-(n))/(d))) : (n)/(d) + ((n)%(d) != 0))
364#define floor(n, d) (((n) < 0) ? (-((-(n))/(d))) - ((n)%(d) != 0) : (n)/(d))
365
366struct MT2063_FIFZone_t {
367 s32 min_;
368 s32 max_;
369};
370
371static struct MT2063_ExclZone_t *InsertNode(struct MT2063_AvoidSpursData_t
372 *pAS_Info,
373 struct MT2063_ExclZone_t *pPrevNode)
374{
375 struct MT2063_ExclZone_t *pNode;
376
377 dprintk(2, "\n");
378
379 /* Check for a node in the free list */
380 if (pAS_Info->freeZones != NULL) {
381 /* Use one from the free list */
382 pNode = pAS_Info->freeZones;
383 pAS_Info->freeZones = pNode->next_;
384 } else {
385 /* Grab a node from the array */
386 pNode = &pAS_Info->MT2063_ExclZones[pAS_Info->nZones];
387 }
388
389 if (pPrevNode != NULL) {
390 pNode->next_ = pPrevNode->next_;
391 pPrevNode->next_ = pNode;
392 } else { /* insert at the beginning of the list */
393
394 pNode->next_ = pAS_Info->usedZones;
395 pAS_Info->usedZones = pNode;
396 }
397
398 pAS_Info->nZones++;
399 return pNode;
400}
401
402static struct MT2063_ExclZone_t *RemoveNode(struct MT2063_AvoidSpursData_t
403 *pAS_Info,
404 struct MT2063_ExclZone_t *pPrevNode,
405 struct MT2063_ExclZone_t
406 *pNodeToRemove)
407{
408 struct MT2063_ExclZone_t *pNext = pNodeToRemove->next_;
409
410 dprintk(2, "\n");
411
412 /* Make previous node point to the subsequent node */
413 if (pPrevNode != NULL)
414 pPrevNode->next_ = pNext;
415
416 /* Add pNodeToRemove to the beginning of the freeZones */
417 pNodeToRemove->next_ = pAS_Info->freeZones;
418 pAS_Info->freeZones = pNodeToRemove;
419
420 /* Decrement node count */
421 pAS_Info->nZones--;
422
423 return pNext;
424}
425
426/*
427 * MT_AddExclZone()
428 *
429 * Add (and merge) an exclusion zone into the list.
430 * If the range (f_min, f_max) is totally outside the
431 * 1st IF BW, ignore the entry.
432 * If the range (f_min, f_max) is negative, ignore the entry.
433 */
434static void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
435 u32 f_min, u32 f_max)
436{
437 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
438 struct MT2063_ExclZone_t *pPrev = NULL;
439 struct MT2063_ExclZone_t *pNext = NULL;
440
441 dprintk(2, "\n");
442
443 /* Check to see if this overlaps the 1st IF filter */
444 if ((f_max > (pAS_Info->f_if1_Center - (pAS_Info->f_if1_bw / 2)))
445 && (f_min < (pAS_Info->f_if1_Center + (pAS_Info->f_if1_bw / 2)))
446 && (f_min < f_max)) {
447 /*
448 * 1 2 3 4 5 6
449 *
450 * New entry: |---| |--| |--| |-| |---| |--|
451 * or or or or or
452 * Existing: |--| |--| |--| |---| |-| |--|
453 */
454
455 /* Check for our place in the list */
456 while ((pNode != NULL) && (pNode->max_ < f_min)) {
457 pPrev = pNode;
458 pNode = pNode->next_;
459 }
460
461 if ((pNode != NULL) && (pNode->min_ < f_max)) {
462 /* Combine me with pNode */
463 if (f_min < pNode->min_)
464 pNode->min_ = f_min;
465 if (f_max > pNode->max_)
466 pNode->max_ = f_max;
467 } else {
468 pNode = InsertNode(pAS_Info, pPrev);
469 pNode->min_ = f_min;
470 pNode->max_ = f_max;
471 }
472
473 /* Look for merging possibilities */
474 pNext = pNode->next_;
475 while ((pNext != NULL) && (pNext->min_ < pNode->max_)) {
476 if (pNext->max_ > pNode->max_)
477 pNode->max_ = pNext->max_;
478 /* Remove pNext, return ptr to pNext->next */
479 pNext = RemoveNode(pAS_Info, pNode, pNext);
480 }
481 }
482}
483
484/*
485 * Reset all exclusion zones.
486 * Add zones to protect the PLL FracN regions near zero
487 */
488static void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info)
489{
490 u32 center;
491
492 dprintk(2, "\n");
493
494 pAS_Info->nZones = 0; /* this clears the used list */
495 pAS_Info->usedZones = NULL; /* reset ptr */
496 pAS_Info->freeZones = NULL; /* reset ptr */
497
498 center =
499 pAS_Info->f_ref *
500 ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 +
501 pAS_Info->f_in) / pAS_Info->f_ref) - pAS_Info->f_in;
502 while (center <
503 pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
504 pAS_Info->f_LO1_FracN_Avoid) {
505 /* Exclude LO1 FracN */
506 MT2063_AddExclZone(pAS_Info,
507 center - pAS_Info->f_LO1_FracN_Avoid,
508 center - 1);
509 MT2063_AddExclZone(pAS_Info, center + 1,
510 center + pAS_Info->f_LO1_FracN_Avoid);
511 center += pAS_Info->f_ref;
512 }
513
514 center =
515 pAS_Info->f_ref *
516 ((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 -
517 pAS_Info->f_out) / pAS_Info->f_ref) + pAS_Info->f_out;
518 while (center <
519 pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
520 pAS_Info->f_LO2_FracN_Avoid) {
521 /* Exclude LO2 FracN */
522 MT2063_AddExclZone(pAS_Info,
523 center - pAS_Info->f_LO2_FracN_Avoid,
524 center - 1);
525 MT2063_AddExclZone(pAS_Info, center + 1,
526 center + pAS_Info->f_LO2_FracN_Avoid);
527 center += pAS_Info->f_ref;
528 }
529
530 if (MT2063_EXCLUDE_US_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
531 /* Exclude LO1 values that conflict with DECT channels */
532 MT2063_AddExclZone(pAS_Info, 1920836000 - pAS_Info->f_in, 1922236000 - pAS_Info->f_in); /* Ctr = 1921.536 */
533 MT2063_AddExclZone(pAS_Info, 1922564000 - pAS_Info->f_in, 1923964000 - pAS_Info->f_in); /* Ctr = 1923.264 */
534 MT2063_AddExclZone(pAS_Info, 1924292000 - pAS_Info->f_in, 1925692000 - pAS_Info->f_in); /* Ctr = 1924.992 */
535 MT2063_AddExclZone(pAS_Info, 1926020000 - pAS_Info->f_in, 1927420000 - pAS_Info->f_in); /* Ctr = 1926.720 */
536 MT2063_AddExclZone(pAS_Info, 1927748000 - pAS_Info->f_in, 1929148000 - pAS_Info->f_in); /* Ctr = 1928.448 */
537 }
538
539 if (MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
540 MT2063_AddExclZone(pAS_Info, 1896644000 - pAS_Info->f_in, 1898044000 - pAS_Info->f_in); /* Ctr = 1897.344 */
541 MT2063_AddExclZone(pAS_Info, 1894916000 - pAS_Info->f_in, 1896316000 - pAS_Info->f_in); /* Ctr = 1895.616 */
542 MT2063_AddExclZone(pAS_Info, 1893188000 - pAS_Info->f_in, 1894588000 - pAS_Info->f_in); /* Ctr = 1893.888 */
543 MT2063_AddExclZone(pAS_Info, 1891460000 - pAS_Info->f_in, 1892860000 - pAS_Info->f_in); /* Ctr = 1892.16 */
544 MT2063_AddExclZone(pAS_Info, 1889732000 - pAS_Info->f_in, 1891132000 - pAS_Info->f_in); /* Ctr = 1890.432 */
545 MT2063_AddExclZone(pAS_Info, 1888004000 - pAS_Info->f_in, 1889404000 - pAS_Info->f_in); /* Ctr = 1888.704 */
546 MT2063_AddExclZone(pAS_Info, 1886276000 - pAS_Info->f_in, 1887676000 - pAS_Info->f_in); /* Ctr = 1886.976 */
547 MT2063_AddExclZone(pAS_Info, 1884548000 - pAS_Info->f_in, 1885948000 - pAS_Info->f_in); /* Ctr = 1885.248 */
548 MT2063_AddExclZone(pAS_Info, 1882820000 - pAS_Info->f_in, 1884220000 - pAS_Info->f_in); /* Ctr = 1883.52 */
549 MT2063_AddExclZone(pAS_Info, 1881092000 - pAS_Info->f_in, 1882492000 - pAS_Info->f_in); /* Ctr = 1881.792 */
550 }
551}
552
553/*
554 * MT_ChooseFirstIF - Choose the best available 1st IF
555 * If f_Desired is not excluded, choose that first.
556 * Otherwise, return the value closest to f_Center that is
557 * not excluded
558 */
559static u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
560{
561 /*
562 * Update "f_Desired" to be the nearest "combinational-multiple" of
563 * "f_LO1_Step".
564 * The resulting number, F_LO1 must be a multiple of f_LO1_Step.
565 * And F_LO1 is the arithmetic sum of f_in + f_Center.
566 * Neither f_in, nor f_Center must be a multiple of f_LO1_Step.
567 * However, the sum must be.
568 */
569 const u32 f_Desired =
570 pAS_Info->f_LO1_Step *
571 ((pAS_Info->f_if1_Request + pAS_Info->f_in +
572 pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) -
573 pAS_Info->f_in;
574 const u32 f_Step =
575 (pAS_Info->f_LO1_Step >
576 pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info->
577 f_LO2_Step;
578 u32 f_Center;
579 s32 i;
580 s32 j = 0;
581 u32 bDesiredExcluded = 0;
582 u32 bZeroExcluded = 0;
583 s32 tmpMin, tmpMax;
584 s32 bestDiff;
585 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
586 struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES];
587
588 dprintk(2, "\n");
589
590 if (pAS_Info->nZones == 0)
591 return f_Desired;
592
593 /*
594 * f_Center needs to be an integer multiple of f_Step away
595 * from f_Desired
596 */
597 if (pAS_Info->f_if1_Center > f_Desired)
598 f_Center =
599 f_Desired +
600 f_Step *
601 ((pAS_Info->f_if1_Center - f_Desired +
602 f_Step / 2) / f_Step);
603 else
604 f_Center =
605 f_Desired -
606 f_Step *
607 ((f_Desired - pAS_Info->f_if1_Center +
608 f_Step / 2) / f_Step);
609
610 /*
611 * Take MT_ExclZones, center around f_Center and change the
612 * resolution to f_Step
613 */
614 while (pNode != NULL) {
615 /* floor function */
616 tmpMin =
617 floor((s32) (pNode->min_ - f_Center), (s32) f_Step);
618
619 /* ceil function */
620 tmpMax =
621 ceil((s32) (pNode->max_ - f_Center), (s32) f_Step);
622
623 if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired))
624 bDesiredExcluded = 1;
625
626 if ((tmpMin < 0) && (tmpMax > 0))
627 bZeroExcluded = 1;
628
629 /* See if this zone overlaps the previous */
630 if ((j > 0) && (tmpMin < zones[j - 1].max_))
631 zones[j - 1].max_ = tmpMax;
632 else {
633 /* Add new zone */
634 zones[j].min_ = tmpMin;
635 zones[j].max_ = tmpMax;
636 j++;
637 }
638 pNode = pNode->next_;
639 }
640
641 /*
642 * If the desired is okay, return with it
643 */
644 if (bDesiredExcluded == 0)
645 return f_Desired;
646
647 /*
648 * If the desired is excluded and the center is okay, return with it
649 */
650 if (bZeroExcluded == 0)
651 return f_Center;
652
653 /* Find the value closest to 0 (f_Center) */
654 bestDiff = zones[0].min_;
655 for (i = 0; i < j; i++) {
656 if (abs(zones[i].min_) < abs(bestDiff))
657 bestDiff = zones[i].min_;
658 if (abs(zones[i].max_) < abs(bestDiff))
659 bestDiff = zones[i].max_;
660 }
661
662 if (bestDiff < 0)
663 return f_Center - ((u32) (-bestDiff) * f_Step);
664
665 return f_Center + (bestDiff * f_Step);
666}
667
668/**
669 * gcd() - Uses Euclid's algorithm
670 *
671 * @u, @v: Unsigned values whose GCD is desired.
672 *
673 * Returns THE greatest common divisor of u and v, if either value is 0,
674 * the other value is returned as the result.
675 */
676static u32 MT2063_gcd(u32 u, u32 v)
677{
678 u32 r;
679
680 while (v != 0) {
681 r = u % v;
682 u = v;
683 v = r;
684 }
685
686 return u;
687}
688
689/**
690 * IsSpurInBand() - Checks to see if a spur will be present within the IF's
691 * bandwidth. (fIFOut +/- fIFBW, -fIFOut +/- fIFBW)
692 *
693 * ma mb mc md
694 * <--+-+-+-------------------+-------------------+-+-+-->
695 * | ^ 0 ^ |
696 * ^ b=-fIFOut+fIFBW/2 -b=+fIFOut-fIFBW/2 ^
697 * a=-fIFOut-fIFBW/2 -a=+fIFOut+fIFBW/2
698 *
699 * Note that some equations are doubled to prevent round-off
700 * problems when calculating fIFBW/2
701 *
702 * @pAS_Info: Avoid Spurs information block
703 * @fm: If spur, amount f_IF1 has to move negative
704 * @fp: If spur, amount f_IF1 has to move positive
705 *
706 * Returns 1 if an LO spur would be present, otherwise 0.
707 */
708static u32 IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
709 u32 *fm, u32 * fp)
710{
711 /*
712 ** Calculate LO frequency settings.
713 */
714 u32 n, n0;
715 const u32 f_LO1 = pAS_Info->f_LO1;
716 const u32 f_LO2 = pAS_Info->f_LO2;
717 const u32 d = pAS_Info->f_out + pAS_Info->f_out_bw / 2;
718 const u32 c = d - pAS_Info->f_out_bw;
719 const u32 f = pAS_Info->f_zif_bw / 2;
720 const u32 f_Scale = (f_LO1 / (UINT_MAX / 2 / pAS_Info->maxH1)) + 1;
721 s32 f_nsLO1, f_nsLO2;
722 s32 f_Spur;
723 u32 ma, mb, mc, md, me, mf;
724 u32 lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs;
725
726 dprintk(2, "\n");
727
728 *fm = 0;
729
730 /*
731 ** For each edge (d, c & f), calculate a scale, based on the gcd
732 ** of f_LO1, f_LO2 and the edge value. Use the larger of this
733 ** gcd-based scale factor or f_Scale.
734 */
735 lo_gcd = MT2063_gcd(f_LO1, f_LO2);
736 gd_Scale = max((u32) MT2063_gcd(lo_gcd, d), f_Scale);
737 hgds = gd_Scale / 2;
738 gc_Scale = max((u32) MT2063_gcd(lo_gcd, c), f_Scale);
739 hgcs = gc_Scale / 2;
740 gf_Scale = max((u32) MT2063_gcd(lo_gcd, f), f_Scale);
741 hgfs = gf_Scale / 2;
742
743 n0 = DIV_ROUND_UP(f_LO2 - d, f_LO1 - f_LO2);
744
745 /* Check out all multiples of LO1 from n0 to m_maxLOSpurHarmonic */
746 for (n = n0; n <= pAS_Info->maxH1; ++n) {
747 md = (n * ((f_LO1 + hgds) / gd_Scale) -
748 ((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);
749
750 /* If # fLO2 harmonics > m_maxLOSpurHarmonic, then no spurs present */
751 if (md >= pAS_Info->maxH1)
752 break;
753
754 ma = (n * ((f_LO1 + hgds) / gd_Scale) +
755 ((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);
756
757 /* If no spurs between +/- (f_out + f_IFBW/2), then try next harmonic */
758 if (md == ma)
759 continue;
760
761 mc = (n * ((f_LO1 + hgcs) / gc_Scale) -
762 ((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
763 if (mc != md) {
764 f_nsLO1 = (s32) (n * (f_LO1 / gc_Scale));
765 f_nsLO2 = (s32) (mc * (f_LO2 / gc_Scale));
766 f_Spur =
767 (gc_Scale * (f_nsLO1 - f_nsLO2)) +
768 n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale);
769
770 *fp = ((f_Spur - (s32) c) / (mc - n)) + 1;
771 *fm = (((s32) d - f_Spur) / (mc - n)) + 1;
772 return 1;
773 }
774
775 /* Location of Zero-IF-spur to be checked */
776 me = (n * ((f_LO1 + hgfs) / gf_Scale) +
777 ((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
778 mf = (n * ((f_LO1 + hgfs) / gf_Scale) -
779 ((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
780 if (me != mf) {
781 f_nsLO1 = n * (f_LO1 / gf_Scale);
782 f_nsLO2 = me * (f_LO2 / gf_Scale);
783 f_Spur =
784 (gf_Scale * (f_nsLO1 - f_nsLO2)) +
785 n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale);
786
787 *fp = ((f_Spur + (s32) f) / (me - n)) + 1;
788 *fm = (((s32) f - f_Spur) / (me - n)) + 1;
789 return 1;
790 }
791
792 mb = (n * ((f_LO1 + hgcs) / gc_Scale) +
793 ((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
794 if (ma != mb) {
795 f_nsLO1 = n * (f_LO1 / gc_Scale);
796 f_nsLO2 = ma * (f_LO2 / gc_Scale);
797 f_Spur =
798 (gc_Scale * (f_nsLO1 - f_nsLO2)) +
799 n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale);
800
801 *fp = (((s32) d + f_Spur) / (ma - n)) + 1;
802 *fm = (-(f_Spur + (s32) c) / (ma - n)) + 1;
803 return 1;
804 }
805 }
806
807 /* No spurs found */
808 return 0;
809}
810
811/*
812 * MT_AvoidSpurs() - Main entry point to avoid spurs.
813 * Checks for existing spurs in present LO1, LO2 freqs
814 * and if present, chooses spur-free LO1, LO2 combination
815 * that tunes the same input/output frequencies.
816 */
817static u32 MT2063_AvoidSpurs(struct MT2063_AvoidSpursData_t *pAS_Info)
818{
819 u32 status = 0;
820 u32 fm, fp; /* restricted range on LO's */
821 pAS_Info->bSpurAvoided = 0;
822 pAS_Info->nSpursFound = 0;
823
824 dprintk(2, "\n");
825
826 if (pAS_Info->maxH1 == 0)
827 return 0;
828
829 /*
830 * Avoid LO Generated Spurs
831 *
832 * Make sure that have no LO-related spurs within the IF output
833 * bandwidth.
834 *
835 * If there is an LO spur in this band, start at the current IF1 frequency
836 * and work out until we find a spur-free frequency or run up against the
837 * 1st IF SAW band edge. Use temporary copies of fLO1 and fLO2 so that they
838 * will be unchanged if a spur-free setting is not found.
839 */
840 pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
841 if (pAS_Info->bSpurPresent) {
842 u32 zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */
843 u32 zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */
844 u32 zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */
845 u32 delta_IF1;
846 u32 new_IF1;
847
848 /*
849 ** Spur was found, attempt to find a spur-free 1st IF
850 */
851 do {
852 pAS_Info->nSpursFound++;
853
854 /* Raise f_IF1_upper, if needed */
855 MT2063_AddExclZone(pAS_Info, zfIF1 - fm, zfIF1 + fp);
856
857 /* Choose next IF1 that is closest to f_IF1_CENTER */
858 new_IF1 = MT2063_ChooseFirstIF(pAS_Info);
859
860 if (new_IF1 > zfIF1) {
861 pAS_Info->f_LO1 += (new_IF1 - zfIF1);
862 pAS_Info->f_LO2 += (new_IF1 - zfIF1);
863 } else {
864 pAS_Info->f_LO1 -= (zfIF1 - new_IF1);
865 pAS_Info->f_LO2 -= (zfIF1 - new_IF1);
866 }
867 zfIF1 = new_IF1;
868
869 if (zfIF1 > pAS_Info->f_if1_Center)
870 delta_IF1 = zfIF1 - pAS_Info->f_if1_Center;
871 else
872 delta_IF1 = pAS_Info->f_if1_Center - zfIF1;
873
874 pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
875 /*
876 * Continue while the new 1st IF is still within the 1st IF bandwidth
877 * and there is a spur in the band (again)
878 */
879 } while ((2 * delta_IF1 + pAS_Info->f_out_bw <= pAS_Info->f_if1_bw) && pAS_Info->bSpurPresent);
880
881 /*
882 * Use the LO-spur free values found. If the search went all
883 * the way to the 1st IF band edge and always found spurs, just
884 * leave the original choice. It's as "good" as any other.
885 */
886 if (pAS_Info->bSpurPresent == 1) {
887 status |= MT2063_SPUR_PRESENT_ERR;
888 pAS_Info->f_LO1 = zfLO1;
889 pAS_Info->f_LO2 = zfLO2;
890 } else
891 pAS_Info->bSpurAvoided = 1;
892 }
893
894 status |=
895 ((pAS_Info->
896 nSpursFound << MT2063_SPUR_SHIFT) & MT2063_SPUR_CNT_MASK);
897
898 return status;
899}
900
901/*
902 * Constants used by the tuning algorithm
903 */
904#define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */
905#define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */
906#define MT2063_TUNE_STEP_SIZE (50000UL) /* Tune in steps of 50 kHz */
907#define MT2063_SPUR_STEP_HZ (250000UL) /* Step size (in Hz) to move IF1 when avoiding spurs */
908#define MT2063_ZIF_BW (2000000UL) /* Zero-IF spur-free bandwidth (in Hz) */
909#define MT2063_MAX_HARMONICS_1 (15UL) /* Highest intra-tuner LO Spur Harmonic to be avoided */
910#define MT2063_MAX_HARMONICS_2 (5UL) /* Highest inter-tuner LO Spur Harmonic to be avoided */
911#define MT2063_MIN_LO_SEP (1000000UL) /* Minimum inter-tuner LO frequency separation */
912#define MT2063_LO1_FRACN_AVOID (0UL) /* LO1 FracN numerator avoid region (in Hz) */
913#define MT2063_LO2_FRACN_AVOID (199999UL) /* LO2 FracN numerator avoid region (in Hz) */
914#define MT2063_MIN_FIN_FREQ (44000000UL) /* Minimum input frequency (in Hz) */
915#define MT2063_MAX_FIN_FREQ (1100000000UL) /* Maximum input frequency (in Hz) */
916#define MT2063_MIN_FOUT_FREQ (36000000UL) /* Minimum output frequency (in Hz) */
917#define MT2063_MAX_FOUT_FREQ (57000000UL) /* Maximum output frequency (in Hz) */
918#define MT2063_MIN_DNC_FREQ (1293000000UL) /* Minimum LO2 frequency (in Hz) */
919#define MT2063_MAX_DNC_FREQ (1614000000UL) /* Maximum LO2 frequency (in Hz) */
920#define MT2063_MIN_UPC_FREQ (1396000000UL) /* Minimum LO1 frequency (in Hz) */
921#define MT2063_MAX_UPC_FREQ (2750000000UL) /* Maximum LO1 frequency (in Hz) */
922
923/*
924 * Define the supported Part/Rev codes for the MT2063
925 */
926#define MT2063_B0 (0x9B)
927#define MT2063_B1 (0x9C)
928#define MT2063_B2 (0x9D)
929#define MT2063_B3 (0x9E)
930
931/**
932 * mt2063_lockStatus - Checks to see if LO1 and LO2 are locked
933 *
934 * @state: struct mt2063_state pointer
935 *
936 * This function returns 0, if no lock, 1 if locked and a value < 1 if error
937 */
938static unsigned int mt2063_lockStatus(struct mt2063_state *state)
939{
940 const u32 nMaxWait = 100; /* wait a maximum of 100 msec */
941 const u32 nPollRate = 2; /* poll status bits every 2 ms */
942 const u32 nMaxLoops = nMaxWait / nPollRate;
943 const u8 LO1LK = 0x80;
944 u8 LO2LK = 0x08;
945 u32 status;
946 u32 nDelays = 0;
947
948 dprintk(2, "\n");
949
950 /* LO2 Lock bit was in a different place for B0 version */
951 if (state->tuner_id == MT2063_B0)
952 LO2LK = 0x40;
953
954 do {
955 status = mt2063_read(state, MT2063_REG_LO_STATUS,
956 &state->reg[MT2063_REG_LO_STATUS], 1);
957
958 if (status < 0)
959 return status;
960
961 if ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) ==
962 (LO1LK | LO2LK)) {
963 return TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO;
964 }
965 msleep(nPollRate); /* Wait between retries */
966 } while (++nDelays < nMaxLoops);
967
968 /*
969 * Got no lock or partial lock
970 */
971 return 0;
972}
973
974/*
975 * Constants for setting receiver modes.
976 * (6 modes defined at this time, enumerated by mt2063_delivery_sys)
977 * (DNC1GC & DNC2GC are the values, which are used, when the specific
978 * DNC Output is selected, the other is always off)
979 *
980 * enum mt2063_delivery_sys
981 * -------------+----------------------------------------------
982 * Mode 0 : | MT2063_CABLE_QAM
983 * Mode 1 : | MT2063_CABLE_ANALOG
984 * Mode 2 : | MT2063_OFFAIR_COFDM
985 * Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS
986 * Mode 4 : | MT2063_OFFAIR_ANALOG
987 * Mode 5 : | MT2063_OFFAIR_8VSB
988 * --------------+----------------------------------------------
989 *
990 * |<---------- Mode -------------->|
991 * Reg Field | 0 | 1 | 2 | 3 | 4 | 5 |
992 * ------------+-----+-----+-----+-----+-----+-----+
993 * RFAGCen | OFF | OFF | OFF | OFF | OFF | OFF
994 * LNARin | 0 | 0 | 3 | 3 | 3 | 3
995 * FIFFQen | 1 | 1 | 1 | 1 | 1 | 1
996 * FIFFq | 0 | 0 | 0 | 0 | 0 | 0
997 * DNC1gc | 0 | 0 | 0 | 0 | 0 | 0
998 * DNC2gc | 0 | 0 | 0 | 0 | 0 | 0
999 * GCU Auto | 1 | 1 | 1 | 1 | 1 | 1
1000 * LNA max Atn | 31 | 31 | 31 | 31 | 31 | 31
1001 * LNA Target | 44 | 43 | 43 | 43 | 43 | 43
1002 * ign RF Ovl | 0 | 0 | 0 | 0 | 0 | 0
1003 * RF max Atn | 31 | 31 | 31 | 31 | 31 | 31
1004 * PD1 Target | 36 | 36 | 38 | 38 | 36 | 38
1005 * ign FIF Ovl | 0 | 0 | 0 | 0 | 0 | 0
1006 * FIF max Atn | 5 | 5 | 5 | 5 | 5 | 5
1007 * PD2 Target | 40 | 33 | 42 | 42 | 33 | 42
1008 */
1009
1010enum mt2063_delivery_sys {
1011 MT2063_CABLE_QAM = 0,
1012 MT2063_CABLE_ANALOG,
1013 MT2063_OFFAIR_COFDM,
1014 MT2063_OFFAIR_COFDM_SAWLESS,
1015 MT2063_OFFAIR_ANALOG,
1016 MT2063_OFFAIR_8VSB,
1017 MT2063_NUM_RCVR_MODES
1018};
1019
1020static const char *mt2063_mode_name[] = {
1021 [MT2063_CABLE_QAM] = "digital cable",
1022 [MT2063_CABLE_ANALOG] = "analog cable",
1023 [MT2063_OFFAIR_COFDM] = "digital offair",
1024 [MT2063_OFFAIR_COFDM_SAWLESS] = "digital offair without SAW",
1025 [MT2063_OFFAIR_ANALOG] = "analog offair",
1026 [MT2063_OFFAIR_8VSB] = "analog offair 8vsb",
1027};
1028
1029static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 };
1030static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 };
1031static const u8 FIFFQEN[] = { 1, 1, 1, 1, 1, 1 };
1032static const u8 FIFFQ[] = { 0, 0, 0, 0, 0, 0 };
1033static const u8 DNC1GC[] = { 0, 0, 0, 0, 0, 0 };
1034static const u8 DNC2GC[] = { 0, 0, 0, 0, 0, 0 };
1035static const u8 ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 };
1036static const u8 LNATGT[] = { 44, 43, 43, 43, 43, 43 };
1037static const u8 RFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
1038static const u8 ACRFMAX[] = { 31, 31, 31, 31, 31, 31 };
1039static const u8 PD1TGT[] = { 36, 36, 38, 38, 36, 38 };
1040static const u8 FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
1041static const u8 ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 };
1042static const u8 PD2TGT[] = { 40, 33, 38, 42, 30, 38 };
1043
1044/*
1045 * mt2063_set_dnc_output_enable()
1046 */
1047static u32 mt2063_get_dnc_output_enable(struct mt2063_state *state,
1048 enum MT2063_DNC_Output_Enable *pValue)
1049{
1050 dprintk(2, "\n");
1051
1052 if ((state->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) { /* if DNC1 is off */
1053 if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
1054 *pValue = MT2063_DNC_NONE;
1055 else
1056 *pValue = MT2063_DNC_2;
1057 } else { /* DNC1 is on */
1058 if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
1059 *pValue = MT2063_DNC_1;
1060 else
1061 *pValue = MT2063_DNC_BOTH;
1062 }
1063 return 0;
1064}
1065
1066/*
1067 * mt2063_set_dnc_output_enable()
1068 */
1069static u32 mt2063_set_dnc_output_enable(struct mt2063_state *state,
1070 enum MT2063_DNC_Output_Enable nValue)
1071{
1072 u32 status = 0; /* Status to be returned */
1073 u8 val = 0;
1074
1075 dprintk(2, "\n");
1076
1077 /* selects, which DNC output is used */
1078 switch (nValue) {
1079 case MT2063_DNC_NONE:
1080 val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03; /* Set DNC1GC=3 */
1081 if (state->reg[MT2063_REG_DNC_GAIN] !=
1082 val)
1083 status |=
1084 mt2063_setreg(state,
1085 MT2063_REG_DNC_GAIN,
1086 val);
1087
1088 val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */
1089 if (state->reg[MT2063_REG_VGA_GAIN] !=
1090 val)
1091 status |=
1092 mt2063_setreg(state,
1093 MT2063_REG_VGA_GAIN,
1094 val);
1095
1096 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */
1097 if (state->reg[MT2063_REG_RSVD_20] !=
1098 val)
1099 status |=
1100 mt2063_setreg(state,
1101 MT2063_REG_RSVD_20,
1102 val);
1103
1104 break;
1105 case MT2063_DNC_1:
1106 val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[state->rcvr_mode] & 0x03); /* Set DNC1GC=x */
1107 if (state->reg[MT2063_REG_DNC_GAIN] !=
1108 val)
1109 status |=
1110 mt2063_setreg(state,
1111 MT2063_REG_DNC_GAIN,
1112 val);
1113
1114 val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */
1115 if (state->reg[MT2063_REG_VGA_GAIN] !=
1116 val)
1117 status |=
1118 mt2063_setreg(state,
1119 MT2063_REG_VGA_GAIN,
1120 val);
1121
1122 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */
1123 if (state->reg[MT2063_REG_RSVD_20] !=
1124 val)
1125 status |=
1126 mt2063_setreg(state,
1127 MT2063_REG_RSVD_20,
1128 val);
1129
1130 break;
1131 case MT2063_DNC_2:
1132 val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | 0x03; /* Set DNC1GC=3 */
1133 if (state->reg[MT2063_REG_DNC_GAIN] !=
1134 val)
1135 status |=
1136 mt2063_setreg(state,
1137 MT2063_REG_DNC_GAIN,
1138 val);
1139
1140 val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=x */
1141 if (state->reg[MT2063_REG_VGA_GAIN] !=
1142 val)
1143 status |=
1144 mt2063_setreg(state,
1145 MT2063_REG_VGA_GAIN,
1146 val);
1147
1148 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */
1149 if (state->reg[MT2063_REG_RSVD_20] !=
1150 val)
1151 status |=
1152 mt2063_setreg(state,
1153 MT2063_REG_RSVD_20,
1154 val);
1155
1156 break;
1157 case MT2063_DNC_BOTH:
1158 val = (state->reg[MT2063_REG_DNC_GAIN] & 0xFC) | (DNC1GC[state->rcvr_mode] & 0x03); /* Set DNC1GC=x */
1159 if (state->reg[MT2063_REG_DNC_GAIN] !=
1160 val)
1161 status |=
1162 mt2063_setreg(state,
1163 MT2063_REG_DNC_GAIN,
1164 val);
1165
1166 val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=x */
1167 if (state->reg[MT2063_REG_VGA_GAIN] !=
1168 val)
1169 status |=
1170 mt2063_setreg(state,
1171 MT2063_REG_VGA_GAIN,
1172 val);
1173
1174 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */
1175 if (state->reg[MT2063_REG_RSVD_20] !=
1176 val)
1177 status |=
1178 mt2063_setreg(state,
1179 MT2063_REG_RSVD_20,
1180 val);
1181
1182 break;
1183 default:
1184 break;
1185 }
1186
1187 return status;
1188}
1189
1190/*
1191 * MT2063_SetReceiverMode() - Set the MT2063 receiver mode, according with
1192 * the selected enum mt2063_delivery_sys type.
1193 *
1194 * (DNC1GC & DNC2GC are the values, which are used, when the specific
1195 * DNC Output is selected, the other is always off)
1196 *
1197 * @state: ptr to mt2063_state structure
1198 * @Mode: desired reciever delivery system
1199 *
1200 * Note: Register cache must be valid for it to work
1201 */
1202
1203static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1204 enum mt2063_delivery_sys Mode)
1205{
1206 u32 status = 0; /* Status to be returned */
1207 u8 val;
1208 u32 longval;
1209
1210 dprintk(2, "\n");
1211
1212 if (Mode >= MT2063_NUM_RCVR_MODES)
1213 status = -ERANGE;
1214
1215 /* RFAGCen */
1216 if (status >= 0) {
1217 val =
1218 (state->
1219 reg[MT2063_REG_PD1_TGT] & (u8) ~0x40) | (RFAGCEN[Mode]
1220 ? 0x40 :
1221 0x00);
1222 if (state->reg[MT2063_REG_PD1_TGT] != val)
1223 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
1224 }
1225
1226 /* LNARin */
1227 if (status >= 0) {
1228 u8 val = (state->reg[MT2063_REG_CTRL_2C] & (u8) ~0x03) |
1229 (LNARIN[Mode] & 0x03);
1230 if (state->reg[MT2063_REG_CTRL_2C] != val)
1231 status |= mt2063_setreg(state, MT2063_REG_CTRL_2C, val);
1232 }
1233
1234 /* FIFFQEN and FIFFQ */
1235 if (status >= 0) {
1236 val =
1237 (state->
1238 reg[MT2063_REG_FIFF_CTRL2] & (u8) ~0xF0) |
1239 (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4);
1240 if (state->reg[MT2063_REG_FIFF_CTRL2] != val) {
1241 status |=
1242 mt2063_setreg(state, MT2063_REG_FIFF_CTRL2, val);
1243 /* trigger FIFF calibration, needed after changing FIFFQ */
1244 val =
1245 (state->reg[MT2063_REG_FIFF_CTRL] | (u8) 0x01);
1246 status |=
1247 mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
1248 val =
1249 (state->
1250 reg[MT2063_REG_FIFF_CTRL] & (u8) ~0x01);
1251 status |=
1252 mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
1253 }
1254 }
1255
1256 /* DNC1GC & DNC2GC */
1257 status |= mt2063_get_dnc_output_enable(state, &longval);
1258 status |= mt2063_set_dnc_output_enable(state, longval);
1259
1260 /* acLNAmax */
1261 if (status >= 0) {
1262 u8 val = (state->reg[MT2063_REG_LNA_OV] & (u8) ~0x1F) |
1263 (ACLNAMAX[Mode] & 0x1F);
1264 if (state->reg[MT2063_REG_LNA_OV] != val)
1265 status |= mt2063_setreg(state, MT2063_REG_LNA_OV, val);
1266 }
1267
1268 /* LNATGT */
1269 if (status >= 0) {
1270 u8 val = (state->reg[MT2063_REG_LNA_TGT] & (u8) ~0x3F) |
1271 (LNATGT[Mode] & 0x3F);
1272 if (state->reg[MT2063_REG_LNA_TGT] != val)
1273 status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);
1274 }
1275
1276 /* ACRF */
1277 if (status >= 0) {
1278 u8 val = (state->reg[MT2063_REG_RF_OV] & (u8) ~0x1F) |
1279 (ACRFMAX[Mode] & 0x1F);
1280 if (state->reg[MT2063_REG_RF_OV] != val)
1281 status |= mt2063_setreg(state, MT2063_REG_RF_OV, val);
1282 }
1283
1284 /* PD1TGT */
1285 if (status >= 0) {
1286 u8 val = (state->reg[MT2063_REG_PD1_TGT] & (u8) ~0x3F) |
1287 (PD1TGT[Mode] & 0x3F);
1288 if (state->reg[MT2063_REG_PD1_TGT] != val)
1289 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
1290 }
1291
1292 /* FIFATN */
1293 if (status >= 0) {
1294 u8 val = ACFIFMAX[Mode];
1295 if (state->reg[MT2063_REG_PART_REV] != MT2063_B3 && val > 5)
1296 val = 5;
1297 val = (state->reg[MT2063_REG_FIF_OV] & (u8) ~0x1F) |
1298 (val & 0x1F);
1299 if (state->reg[MT2063_REG_FIF_OV] != val)
1300 status |= mt2063_setreg(state, MT2063_REG_FIF_OV, val);
1301 }
1302
1303 /* PD2TGT */
1304 if (status >= 0) {
1305 u8 val = (state->reg[MT2063_REG_PD2_TGT] & (u8) ~0x3F) |
1306 (PD2TGT[Mode] & 0x3F);
1307 if (state->reg[MT2063_REG_PD2_TGT] != val)
1308 status |= mt2063_setreg(state, MT2063_REG_PD2_TGT, val);
1309 }
1310
1311 /* Ignore ATN Overload */
1312 if (status >= 0) {
1313 val = (state->reg[MT2063_REG_LNA_TGT] & (u8) ~0x80) |
1314 (RFOVDIS[Mode] ? 0x80 : 0x00);
1315 if (state->reg[MT2063_REG_LNA_TGT] != val)
1316 status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);
1317 }
1318
1319 /* Ignore FIF Overload */
1320 if (status >= 0) {
1321 val = (state->reg[MT2063_REG_PD1_TGT] & (u8) ~0x80) |
1322 (FIFOVDIS[Mode] ? 0x80 : 0x00);
1323 if (state->reg[MT2063_REG_PD1_TGT] != val)
1324 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
1325 }
1326
1327 if (status >= 0) {
1328 state->rcvr_mode = Mode;
1329 dprintk(1, "mt2063 mode changed to %s\n",
1330 mt2063_mode_name[state->rcvr_mode]);
1331 }
1332
1333 return status;
1334}
1335
1336/*
1337 * MT2063_ClearPowerMaskBits () - Clears the power-down mask bits for various
1338 * sections of the MT2063
1339 *
1340 * @Bits: Mask bits to be cleared.
1341 *
1342 * See definition of MT2063_Mask_Bits type for description
1343 * of each of the power bits.
1344 */
1345static u32 MT2063_ClearPowerMaskBits(struct mt2063_state *state,
1346 enum MT2063_Mask_Bits Bits)
1347{
1348 u32 status = 0;
1349
1350 dprintk(2, "\n");
1351 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */
1352 if ((Bits & 0xFF00) != 0) {
1353 state->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8);
1354 status |=
1355 mt2063_write(state,
1356 MT2063_REG_PWR_2,
1357 &state->reg[MT2063_REG_PWR_2], 1);
1358 }
1359 if ((Bits & 0xFF) != 0) {
1360 state->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF);
1361 status |=
1362 mt2063_write(state,
1363 MT2063_REG_PWR_1,
1364 &state->reg[MT2063_REG_PWR_1], 1);
1365 }
1366
1367 return status;
1368}
1369
1370/*
1371 * MT2063_SoftwareShutdown() - Enables or disables software shutdown function.
1372 * When Shutdown is 1, any section whose power
1373 * mask is set will be shutdown.
1374 */
1375static u32 MT2063_SoftwareShutdown(struct mt2063_state *state, u8 Shutdown)
1376{
1377 u32 status;
1378
1379 dprintk(2, "\n");
1380 if (Shutdown == 1)
1381 state->reg[MT2063_REG_PWR_1] |= 0x04;
1382 else
1383 state->reg[MT2063_REG_PWR_1] &= ~0x04;
1384
1385 status = mt2063_write(state,
1386 MT2063_REG_PWR_1,
1387 &state->reg[MT2063_REG_PWR_1], 1);
1388
1389 if (Shutdown != 1) {
1390 state->reg[MT2063_REG_BYP_CTRL] =
1391 (state->reg[MT2063_REG_BYP_CTRL] & 0x9F) | 0x40;
1392 status |=
1393 mt2063_write(state,
1394 MT2063_REG_BYP_CTRL,
1395 &state->reg[MT2063_REG_BYP_CTRL],
1396 1);
1397 state->reg[MT2063_REG_BYP_CTRL] =
1398 (state->reg[MT2063_REG_BYP_CTRL] & 0x9F);
1399 status |=
1400 mt2063_write(state,
1401 MT2063_REG_BYP_CTRL,
1402 &state->reg[MT2063_REG_BYP_CTRL],
1403 1);
1404 }
1405
1406 return status;
1407}
1408
1409static u32 MT2063_Round_fLO(u32 f_LO, u32 f_LO_Step, u32 f_ref)
1410{
1411 return f_ref * (f_LO / f_ref)
1412 + f_LO_Step * (((f_LO % f_ref) + (f_LO_Step / 2)) / f_LO_Step);
1413}
1414
1415/**
1416 * fLO_FractionalTerm() - Calculates the portion contributed by FracN / denom.
1417 * This function preserves maximum precision without
1418 * risk of overflow. It accurately calculates
1419 * f_ref * num / denom to within 1 HZ with fixed math.
1420 *
1421 * @num : Fractional portion of the multiplier
1422 * @denom: denominator portion of the ratio
1423 * @f_Ref: SRO frequency.
1424 *
1425 * This calculation handles f_ref as two separate 14-bit fields.
1426 * Therefore, a maximum value of 2^28-1 may safely be used for f_ref.
1427 * This is the genesis of the magic number "14" and the magic mask value of
1428 * 0x03FFF.
1429 *
1430 * This routine successfully handles denom values up to and including 2^18.
1431 * Returns: f_ref * num / denom
1432 */
1433static u32 MT2063_fLO_FractionalTerm(u32 f_ref, u32 num, u32 denom)
1434{
1435 u32 t1 = (f_ref >> 14) * num;
1436 u32 term1 = t1 / denom;
1437 u32 loss = t1 % denom;
1438 u32 term2 =
1439 (((f_ref & 0x00003FFF) * num + (loss << 14)) + (denom / 2)) / denom;
1440 return (term1 << 14) + term2;
1441}
1442
1443/*
1444 * CalcLO1Mult()- Calculates Integer divider value and the numerator
1445 * value for a FracN PLL.
1446 *
1447 * This function assumes that the f_LO and f_Ref are
1448 * evenly divisible by f_LO_Step.
1449 *
1450 * @Div: OUTPUT: Whole number portion of the multiplier
1451 * @FracN: OUTPUT: Fractional portion of the multiplier
1452 * @f_LO: desired LO frequency.
1453 * @f_LO_Step: Minimum step size for the LO (in Hz).
1454 * @f_Ref: SRO frequency.
1455 * @f_Avoid: Range of PLL frequencies to avoid near integer multiples
1456 * of f_Ref (in Hz).
1457 *
1458 * Returns: Recalculated LO frequency.
1459 */
1460static u32 MT2063_CalcLO1Mult(u32 *Div,
1461 u32 *FracN,
1462 u32 f_LO,
1463 u32 f_LO_Step, u32 f_Ref)
1464{
1465 /* Calculate the whole number portion of the divider */
1466 *Div = f_LO / f_Ref;
1467
1468 /* Calculate the numerator value (round to nearest f_LO_Step) */
1469 *FracN =
1470 (64 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) +
1471 (f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);
1472
1473 return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN, 64);
1474}
1475
1476/**
1477 * CalcLO2Mult() - Calculates Integer divider value and the numerator
1478 * value for a FracN PLL.
1479 *
1480 * This function assumes that the f_LO and f_Ref are
1481 * evenly divisible by f_LO_Step.
1482 *
1483 * @Div: OUTPUT: Whole number portion of the multiplier
1484 * @FracN: OUTPUT: Fractional portion of the multiplier
1485 * @f_LO: desired LO frequency.
1486 * @f_LO_Step: Minimum step size for the LO (in Hz).
1487 * @f_Ref: SRO frequency.
1488 * @f_Avoid: Range of PLL frequencies to avoid near
1489 * integer multiples of f_Ref (in Hz).
1490 *
1491 * Returns: Recalculated LO frequency.
1492 */
1493static u32 MT2063_CalcLO2Mult(u32 *Div,
1494 u32 *FracN,
1495 u32 f_LO,
1496 u32 f_LO_Step, u32 f_Ref)
1497{
1498 /* Calculate the whole number portion of the divider */
1499 *Div = f_LO / f_Ref;
1500
1501 /* Calculate the numerator value (round to nearest f_LO_Step) */
1502 *FracN =
1503 (8191 * (((f_LO % f_Ref) + (f_LO_Step / 2)) / f_LO_Step) +
1504 (f_Ref / f_LO_Step / 2)) / (f_Ref / f_LO_Step);
1505
1506 return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN,
1507 8191);
1508}
1509
1510/*
1511 * FindClearTuneFilter() - Calculate the corrrect ClearTune filter to be
1512 * used for a given input frequency.
1513 *
1514 * @state: ptr to tuner data structure
1515 * @f_in: RF input center frequency (in Hz).
1516 *
1517 * Returns: ClearTune filter number (0-31)
1518 */
1519static u32 FindClearTuneFilter(struct mt2063_state *state, u32 f_in)
1520{
1521 u32 RFBand;
1522 u32 idx; /* index loop */
1523
1524 /*
1525 ** Find RF Band setting
1526 */
1527 RFBand = 31; /* def when f_in > all */
1528 for (idx = 0; idx < 31; ++idx) {
1529 if (state->CTFiltMax[idx] >= f_in) {
1530 RFBand = idx;
1531 break;
1532 }
1533 }
1534 return RFBand;
1535}
1536
1537/*
1538 * MT2063_Tune() - Change the tuner's tuned frequency to RFin.
1539 */
1540static u32 MT2063_Tune(struct mt2063_state *state, u32 f_in)
1541{ /* RF input center frequency */
1542
1543 u32 status = 0;
1544 u32 LO1; /* 1st LO register value */
1545 u32 Num1; /* Numerator for LO1 reg. value */
1546 u32 f_IF1; /* 1st IF requested */
1547 u32 LO2; /* 2nd LO register value */
1548 u32 Num2; /* Numerator for LO2 reg. value */
1549 u32 ofLO1, ofLO2; /* last time's LO frequencies */
1550 u8 fiffc = 0x80; /* FIFF center freq from tuner */
1551 u32 fiffof; /* Offset from FIFF center freq */
1552 const u8 LO1LK = 0x80; /* Mask for LO1 Lock bit */
1553 u8 LO2LK = 0x08; /* Mask for LO2 Lock bit */
1554 u8 val;
1555 u32 RFBand;
1556
1557 dprintk(2, "\n");
1558 /* Check the input and output frequency ranges */
1559 if ((f_in < MT2063_MIN_FIN_FREQ) || (f_in > MT2063_MAX_FIN_FREQ))
1560 return -EINVAL;
1561
1562 if ((state->AS_Data.f_out < MT2063_MIN_FOUT_FREQ)
1563 || (state->AS_Data.f_out > MT2063_MAX_FOUT_FREQ))
1564 return -EINVAL;
1565
1566 /*
1567 * Save original LO1 and LO2 register values
1568 */
1569 ofLO1 = state->AS_Data.f_LO1;
1570 ofLO2 = state->AS_Data.f_LO2;
1571
1572 /*
1573 * Find and set RF Band setting
1574 */
1575 if (state->ctfilt_sw == 1) {
1576 val = (state->reg[MT2063_REG_CTUNE_CTRL] | 0x08);
1577 if (state->reg[MT2063_REG_CTUNE_CTRL] != val) {
1578 status |=
1579 mt2063_setreg(state, MT2063_REG_CTUNE_CTRL, val);
1580 }
1581 val = state->reg[MT2063_REG_CTUNE_OV];
1582 RFBand = FindClearTuneFilter(state, f_in);
1583 state->reg[MT2063_REG_CTUNE_OV] =
1584 (u8) ((state->reg[MT2063_REG_CTUNE_OV] & ~0x1F)
1585 | RFBand);
1586 if (state->reg[MT2063_REG_CTUNE_OV] != val) {
1587 status |=
1588 mt2063_setreg(state, MT2063_REG_CTUNE_OV, val);
1589 }
1590 }
1591
1592 /*
1593 * Read the FIFF Center Frequency from the tuner
1594 */
1595 if (status >= 0) {
1596 status |=
1597 mt2063_read(state,
1598 MT2063_REG_FIFFC,
1599 &state->reg[MT2063_REG_FIFFC], 1);
1600 fiffc = state->reg[MT2063_REG_FIFFC];
1601 }
1602 /*
1603 * Assign in the requested values
1604 */
1605 state->AS_Data.f_in = f_in;
1606 /* Request a 1st IF such that LO1 is on a step size */
1607 state->AS_Data.f_if1_Request =
1608 MT2063_Round_fLO(state->AS_Data.f_if1_Request + f_in,
1609 state->AS_Data.f_LO1_Step,
1610 state->AS_Data.f_ref) - f_in;
1611
1612 /*
1613 * Calculate frequency settings. f_IF1_FREQ + f_in is the
1614 * desired LO1 frequency
1615 */
1616 MT2063_ResetExclZones(&state->AS_Data);
1617
1618 f_IF1 = MT2063_ChooseFirstIF(&state->AS_Data);
1619
1620 state->AS_Data.f_LO1 =
1621 MT2063_Round_fLO(f_IF1 + f_in, state->AS_Data.f_LO1_Step,
1622 state->AS_Data.f_ref);
1623
1624 state->AS_Data.f_LO2 =
1625 MT2063_Round_fLO(state->AS_Data.f_LO1 - state->AS_Data.f_out - f_in,
1626 state->AS_Data.f_LO2_Step, state->AS_Data.f_ref);
1627
1628 /*
1629 * Check for any LO spurs in the output bandwidth and adjust
1630 * the LO settings to avoid them if needed
1631 */
1632 status |= MT2063_AvoidSpurs(&state->AS_Data);
1633 /*
1634 * MT_AvoidSpurs spurs may have changed the LO1 & LO2 values.
1635 * Recalculate the LO frequencies and the values to be placed
1636 * in the tuning registers.
1637 */
1638 state->AS_Data.f_LO1 =
1639 MT2063_CalcLO1Mult(&LO1, &Num1, state->AS_Data.f_LO1,
1640 state->AS_Data.f_LO1_Step, state->AS_Data.f_ref);
1641 state->AS_Data.f_LO2 =
1642 MT2063_Round_fLO(state->AS_Data.f_LO1 - state->AS_Data.f_out - f_in,
1643 state->AS_Data.f_LO2_Step, state->AS_Data.f_ref);
1644 state->AS_Data.f_LO2 =
1645 MT2063_CalcLO2Mult(&LO2, &Num2, state->AS_Data.f_LO2,
1646 state->AS_Data.f_LO2_Step, state->AS_Data.f_ref);
1647
1648 /*
1649 * Check the upconverter and downconverter frequency ranges
1650 */
1651 if ((state->AS_Data.f_LO1 < MT2063_MIN_UPC_FREQ)
1652 || (state->AS_Data.f_LO1 > MT2063_MAX_UPC_FREQ))
1653 status |= MT2063_UPC_RANGE;
1654 if ((state->AS_Data.f_LO2 < MT2063_MIN_DNC_FREQ)
1655 || (state->AS_Data.f_LO2 > MT2063_MAX_DNC_FREQ))
1656 status |= MT2063_DNC_RANGE;
1657 /* LO2 Lock bit was in a different place for B0 version */
1658 if (state->tuner_id == MT2063_B0)
1659 LO2LK = 0x40;
1660
1661 /*
1662 * If we have the same LO frequencies and we're already locked,
1663 * then skip re-programming the LO registers.
1664 */
1665 if ((ofLO1 != state->AS_Data.f_LO1)
1666 || (ofLO2 != state->AS_Data.f_LO2)
1667 || ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) !=
1668 (LO1LK | LO2LK))) {
1669 /*
1670 * Calculate the FIFFOF register value
1671 *
1672 * IF1_Actual
1673 * FIFFOF = ------------ - 8 * FIFFC - 4992
1674 * f_ref/64
1675 */
1676 fiffof =
1677 (state->AS_Data.f_LO1 -
1678 f_in) / (state->AS_Data.f_ref / 64) - 8 * (u32) fiffc -
1679 4992;
1680 if (fiffof > 0xFF)
1681 fiffof = 0xFF;
1682
1683 /*
1684 * Place all of the calculated values into the local tuner
1685 * register fields.
1686 */
1687 if (status >= 0) {
1688 state->reg[MT2063_REG_LO1CQ_1] = (u8) (LO1 & 0xFF); /* DIV1q */
1689 state->reg[MT2063_REG_LO1CQ_2] = (u8) (Num1 & 0x3F); /* NUM1q */
1690 state->reg[MT2063_REG_LO2CQ_1] = (u8) (((LO2 & 0x7F) << 1) /* DIV2q */
1691 |(Num2 >> 12)); /* NUM2q (hi) */
1692 state->reg[MT2063_REG_LO2CQ_2] = (u8) ((Num2 & 0x0FF0) >> 4); /* NUM2q (mid) */
1693 state->reg[MT2063_REG_LO2CQ_3] = (u8) (0xE0 | (Num2 & 0x000F)); /* NUM2q (lo) */
1694
1695 /*
1696 * Now write out the computed register values
1697 * IMPORTANT: There is a required order for writing
1698 * (0x05 must follow all the others).
1699 */
1700 status |= mt2063_write(state, MT2063_REG_LO1CQ_1, &state->reg[MT2063_REG_LO1CQ_1], 5); /* 0x01 - 0x05 */
1701 if (state->tuner_id == MT2063_B0) {
1702 /* Re-write the one-shot bits to trigger the tune operation */
1703 status |= mt2063_write(state, MT2063_REG_LO2CQ_3, &state->reg[MT2063_REG_LO2CQ_3], 1); /* 0x05 */
1704 }
1705 /* Write out the FIFF offset only if it's changing */
1706 if (state->reg[MT2063_REG_FIFF_OFFSET] !=
1707 (u8) fiffof) {
1708 state->reg[MT2063_REG_FIFF_OFFSET] =
1709 (u8) fiffof;
1710 status |=
1711 mt2063_write(state,
1712 MT2063_REG_FIFF_OFFSET,
1713 &state->
1714 reg[MT2063_REG_FIFF_OFFSET],
1715 1);
1716 }
1717 }
1718
1719 /*
1720 * Check for LO's locking
1721 */
1722
1723 if (status < 0)
1724 return status;
1725
1726 status = mt2063_lockStatus(state);
1727 if (status < 0)
1728 return status;
1729 if (!status)
1730 return -EINVAL; /* Couldn't lock */
1731
1732 /*
1733 * If we locked OK, assign calculated data to mt2063_state structure
1734 */
1735 state->f_IF1_actual = state->AS_Data.f_LO1 - f_in;
1736 }
1737
1738 return status;
1739}
1740
1741static const u8 MT2063B0_defaults[] = {
1742 /* Reg, Value */
1743 0x19, 0x05,
1744 0x1B, 0x1D,
1745 0x1C, 0x1F,
1746 0x1D, 0x0F,
1747 0x1E, 0x3F,
1748 0x1F, 0x0F,
1749 0x20, 0x3F,
1750 0x22, 0x21,
1751 0x23, 0x3F,
1752 0x24, 0x20,
1753 0x25, 0x3F,
1754 0x27, 0xEE,
1755 0x2C, 0x27, /* bit at 0x20 is cleared below */
1756 0x30, 0x03,
1757 0x2C, 0x07, /* bit at 0x20 is cleared here */
1758 0x2D, 0x87,
1759 0x2E, 0xAA,
1760 0x28, 0xE1, /* Set the FIFCrst bit here */
1761 0x28, 0xE0, /* Clear the FIFCrst bit here */
1762 0x00
1763};
1764
1765/* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
1766static const u8 MT2063B1_defaults[] = {
1767 /* Reg, Value */
1768 0x05, 0xF0,
1769 0x11, 0x10, /* New Enable AFCsd */
1770 0x19, 0x05,
1771 0x1A, 0x6C,
1772 0x1B, 0x24,
1773 0x1C, 0x28,
1774 0x1D, 0x8F,
1775 0x1E, 0x14,
1776 0x1F, 0x8F,
1777 0x20, 0x57,
1778 0x22, 0x21, /* New - ver 1.03 */
1779 0x23, 0x3C, /* New - ver 1.10 */
1780 0x24, 0x20, /* New - ver 1.03 */
1781 0x2C, 0x24, /* bit at 0x20 is cleared below */
1782 0x2D, 0x87, /* FIFFQ=0 */
1783 0x2F, 0xF3,
1784 0x30, 0x0C, /* New - ver 1.11 */
1785 0x31, 0x1B, /* New - ver 1.11 */
1786 0x2C, 0x04, /* bit at 0x20 is cleared here */
1787 0x28, 0xE1, /* Set the FIFCrst bit here */
1788 0x28, 0xE0, /* Clear the FIFCrst bit here */
1789 0x00
1790};
1791
1792/* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
1793static const u8 MT2063B3_defaults[] = {
1794 /* Reg, Value */
1795 0x05, 0xF0,
1796 0x19, 0x3D,
1797 0x2C, 0x24, /* bit at 0x20 is cleared below */
1798 0x2C, 0x04, /* bit at 0x20 is cleared here */
1799 0x28, 0xE1, /* Set the FIFCrst bit here */
1800 0x28, 0xE0, /* Clear the FIFCrst bit here */
1801 0x00
1802};
1803
1804static int mt2063_init(struct dvb_frontend *fe)
1805{
1806 u32 status;
1807 struct mt2063_state *state = fe->tuner_priv;
1808 u8 all_resets = 0xF0; /* reset/load bits */
1809 const u8 *def = NULL;
1810 char *step;
1811 u32 FCRUN;
1812 s32 maxReads;
1813 u32 fcu_osc;
1814 u32 i;
1815
1816 dprintk(2, "\n");
1817
1818 state->rcvr_mode = MT2063_CABLE_QAM;
1819
1820 /* Read the Part/Rev code from the tuner */
1821 status = mt2063_read(state, MT2063_REG_PART_REV,
1822 &state->reg[MT2063_REG_PART_REV], 1);
1823 if (status < 0) {
1824 printk(KERN_ERR "Can't read mt2063 part ID\n");
1825 return status;
1826 }
1827
1828 /* Check the part/rev code */
1829 switch (state->reg[MT2063_REG_PART_REV]) {
1830 case MT2063_B0:
1831 step = "B0";
1832 break;
1833 case MT2063_B1:
1834 step = "B1";
1835 break;
1836 case MT2063_B2:
1837 step = "B2";
1838 break;
1839 case MT2063_B3:
1840 step = "B3";
1841 break;
1842 default:
1843 printk(KERN_ERR "mt2063: Unknown mt2063 device ID (0x%02x)\n",
1844 state->reg[MT2063_REG_PART_REV]);
1845 return -ENODEV; /* Wrong tuner Part/Rev code */
1846 }
1847
1848 /* Check the 2nd byte of the Part/Rev code from the tuner */
1849 status = mt2063_read(state, MT2063_REG_RSVD_3B,
1850 &state->reg[MT2063_REG_RSVD_3B], 1);
1851
1852 /* b7 != 0 ==> NOT MT2063 */
1853 if (status < 0 || ((state->reg[MT2063_REG_RSVD_3B] & 0x80) != 0x00)) {
1854 printk(KERN_ERR "mt2063: Unknown part ID (0x%02x%02x)\n",
1855 state->reg[MT2063_REG_PART_REV],
1856 state->reg[MT2063_REG_RSVD_3B]);
1857 return -ENODEV; /* Wrong tuner Part/Rev code */
1858 }
1859
1860 printk(KERN_INFO "mt2063: detected a mt2063 %s\n", step);
1861
1862 /* Reset the tuner */
1863 status = mt2063_write(state, MT2063_REG_LO2CQ_3, &all_resets, 1);
1864 if (status < 0)
1865 return status;
1866
1867 /* change all of the default values that vary from the HW reset values */
1868 /* def = (state->reg[PART_REV] == MT2063_B0) ? MT2063B0_defaults : MT2063B1_defaults; */
1869 switch (state->reg[MT2063_REG_PART_REV]) {
1870 case MT2063_B3:
1871 def = MT2063B3_defaults;
1872 break;
1873
1874 case MT2063_B1:
1875 def = MT2063B1_defaults;
1876 break;
1877
1878 case MT2063_B0:
1879 def = MT2063B0_defaults;
1880 break;
1881
1882 default:
1883 return -ENODEV;
1884 break;
1885 }
1886
1887 while (status >= 0 && *def) {
1888 u8 reg = *def++;
1889 u8 val = *def++;
1890 status = mt2063_write(state, reg, &val, 1);
1891 }
1892 if (status < 0)
1893 return status;
1894
1895 /* Wait for FIFF location to complete. */
1896 FCRUN = 1;
1897 maxReads = 10;
1898 while (status >= 0 && (FCRUN != 0) && (maxReads-- > 0)) {
1899 msleep(2);
1900 status = mt2063_read(state,
1901 MT2063_REG_XO_STATUS,
1902 &state->
1903 reg[MT2063_REG_XO_STATUS], 1);
1904 FCRUN = (state->reg[MT2063_REG_XO_STATUS] & 0x40) >> 6;
1905 }
1906
1907 if (FCRUN != 0 || status < 0)
1908 return -ENODEV;
1909
1910 status = mt2063_read(state,
1911 MT2063_REG_FIFFC,
1912 &state->reg[MT2063_REG_FIFFC], 1);
1913 if (status < 0)
1914 return status;
1915
1916 /* Read back all the registers from the tuner */
1917 status = mt2063_read(state,
1918 MT2063_REG_PART_REV,
1919 state->reg, MT2063_REG_END_REGS);
1920 if (status < 0)
1921 return status;
1922
1923 /* Initialize the tuner state. */
1924 state->tuner_id = state->reg[MT2063_REG_PART_REV];
1925 state->AS_Data.f_ref = MT2063_REF_FREQ;
1926 state->AS_Data.f_if1_Center = (state->AS_Data.f_ref / 8) *
1927 ((u32) state->reg[MT2063_REG_FIFFC] + 640);
1928 state->AS_Data.f_if1_bw = MT2063_IF1_BW;
1929 state->AS_Data.f_out = 43750000UL;
1930 state->AS_Data.f_out_bw = 6750000UL;
1931 state->AS_Data.f_zif_bw = MT2063_ZIF_BW;
1932 state->AS_Data.f_LO1_Step = state->AS_Data.f_ref / 64;
1933 state->AS_Data.f_LO2_Step = MT2063_TUNE_STEP_SIZE;
1934 state->AS_Data.maxH1 = MT2063_MAX_HARMONICS_1;
1935 state->AS_Data.maxH2 = MT2063_MAX_HARMONICS_2;
1936 state->AS_Data.f_min_LO_Separation = MT2063_MIN_LO_SEP;
1937 state->AS_Data.f_if1_Request = state->AS_Data.f_if1_Center;
1938 state->AS_Data.f_LO1 = 2181000000UL;
1939 state->AS_Data.f_LO2 = 1486249786UL;
1940 state->f_IF1_actual = state->AS_Data.f_if1_Center;
1941 state->AS_Data.f_in = state->AS_Data.f_LO1 - state->f_IF1_actual;
1942 state->AS_Data.f_LO1_FracN_Avoid = MT2063_LO1_FRACN_AVOID;
1943 state->AS_Data.f_LO2_FracN_Avoid = MT2063_LO2_FRACN_AVOID;
1944 state->num_regs = MT2063_REG_END_REGS;
1945 state->AS_Data.avoidDECT = MT2063_AVOID_BOTH;
1946 state->ctfilt_sw = 0;
1947
1948 state->CTFiltMax[0] = 69230000;
1949 state->CTFiltMax[1] = 105770000;
1950 state->CTFiltMax[2] = 140350000;
1951 state->CTFiltMax[3] = 177110000;
1952 state->CTFiltMax[4] = 212860000;
1953 state->CTFiltMax[5] = 241130000;
1954 state->CTFiltMax[6] = 274370000;
1955 state->CTFiltMax[7] = 309820000;
1956 state->CTFiltMax[8] = 342450000;
1957 state->CTFiltMax[9] = 378870000;
1958 state->CTFiltMax[10] = 416210000;
1959 state->CTFiltMax[11] = 456500000;
1960 state->CTFiltMax[12] = 495790000;
1961 state->CTFiltMax[13] = 534530000;
1962 state->CTFiltMax[14] = 572610000;
1963 state->CTFiltMax[15] = 598970000;
1964 state->CTFiltMax[16] = 635910000;
1965 state->CTFiltMax[17] = 672130000;
1966 state->CTFiltMax[18] = 714840000;
1967 state->CTFiltMax[19] = 739660000;
1968 state->CTFiltMax[20] = 770410000;
1969 state->CTFiltMax[21] = 814660000;
1970 state->CTFiltMax[22] = 846950000;
1971 state->CTFiltMax[23] = 867820000;
1972 state->CTFiltMax[24] = 915980000;
1973 state->CTFiltMax[25] = 947450000;
1974 state->CTFiltMax[26] = 983110000;
1975 state->CTFiltMax[27] = 1021630000;
1976 state->CTFiltMax[28] = 1061870000;
1977 state->CTFiltMax[29] = 1098330000;
1978 state->CTFiltMax[30] = 1138990000;
1979
1980 /*
1981 ** Fetch the FCU osc value and use it and the fRef value to
1982 ** scale all of the Band Max values
1983 */
1984
1985 state->reg[MT2063_REG_CTUNE_CTRL] = 0x0A;
1986 status = mt2063_write(state, MT2063_REG_CTUNE_CTRL,
1987 &state->reg[MT2063_REG_CTUNE_CTRL], 1);
1988 if (status < 0)
1989 return status;
1990
1991 /* Read the ClearTune filter calibration value */
1992 status = mt2063_read(state, MT2063_REG_FIFFC,
1993 &state->reg[MT2063_REG_FIFFC], 1);
1994 if (status < 0)
1995 return status;
1996
1997 fcu_osc = state->reg[MT2063_REG_FIFFC];
1998
1999 state->reg[MT2063_REG_CTUNE_CTRL] = 0x00;
2000 status = mt2063_write(state, MT2063_REG_CTUNE_CTRL,
2001 &state->reg[MT2063_REG_CTUNE_CTRL], 1);
2002 if (status < 0)
2003 return status;
2004
2005 /* Adjust each of the values in the ClearTune filter cross-over table */
2006 for (i = 0; i < 31; i++)
2007 state->CTFiltMax[i] = (state->CTFiltMax[i] / 768) * (fcu_osc + 640);
2008
2009 status = MT2063_SoftwareShutdown(state, 1);
2010 if (status < 0)
2011 return status;
2012 status = MT2063_ClearPowerMaskBits(state, MT2063_ALL_SD);
2013 if (status < 0)
2014 return status;
2015
2016 state->init = true;
2017
2018 return 0;
2019}
2020
2021static int mt2063_get_status(struct dvb_frontend *fe, u32 *tuner_status)
2022{
2023 struct mt2063_state *state = fe->tuner_priv;
2024 int status;
2025
2026 dprintk(2, "\n");
2027
2028 if (!state->init)
2029 return -ENODEV;
2030
2031 *tuner_status = 0;
2032 status = mt2063_lockStatus(state);
2033 if (status < 0)
2034 return status;
2035 if (status)
2036 *tuner_status = TUNER_STATUS_LOCKED;
2037
2038 dprintk(1, "Tuner status: %d", *tuner_status);
2039
2040 return 0;
2041}
2042
2043static int mt2063_release(struct dvb_frontend *fe)
2044{
2045 struct mt2063_state *state = fe->tuner_priv;
2046
2047 dprintk(2, "\n");
2048
2049 fe->tuner_priv = NULL;
2050 kfree(state);
2051
2052 return 0;
2053}
2054
2055static int mt2063_set_analog_params(struct dvb_frontend *fe,
2056 struct analog_parameters *params)
2057{
2058 struct mt2063_state *state = fe->tuner_priv;
2059 s32 pict_car;
2060 s32 pict2chanb_vsb;
2061 s32 ch_bw;
2062 s32 if_mid;
2063 s32 rcvr_mode;
2064 int status;
2065
2066 dprintk(2, "\n");
2067
2068 if (!state->init) {
2069 status = mt2063_init(fe);
2070 if (status < 0)
2071 return status;
2072 }
2073
2074 switch (params->mode) {
2075 case V4L2_TUNER_RADIO:
2076 pict_car = 38900000;
2077 ch_bw = 8000000;
2078 pict2chanb_vsb = -(ch_bw / 2);
2079 rcvr_mode = MT2063_OFFAIR_ANALOG;
2080 break;
2081 case V4L2_TUNER_ANALOG_TV:
2082 rcvr_mode = MT2063_CABLE_ANALOG;
2083 if (params->std & ~V4L2_STD_MN) {
2084 pict_car = 38900000;
2085 ch_bw = 6000000;
2086 pict2chanb_vsb = -1250000;
2087 } else if (params->std & V4L2_STD_PAL_G) {
2088 pict_car = 38900000;
2089 ch_bw = 7000000;
2090 pict2chanb_vsb = -1250000;
2091 } else { /* PAL/SECAM standards */
2092 pict_car = 38900000;
2093 ch_bw = 8000000;
2094 pict2chanb_vsb = -1250000;
2095 }
2096 break;
2097 default:
2098 return -EINVAL;
2099 }
2100 if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2));
2101
2102 state->AS_Data.f_LO2_Step = 125000; /* FIXME: probably 5000 for FM */
2103 state->AS_Data.f_out = if_mid;
2104 state->AS_Data.f_out_bw = ch_bw + 750000;
2105 status = MT2063_SetReceiverMode(state, rcvr_mode);
2106 if (status < 0)
2107 return status;
2108
2109 dprintk(1, "Tuning to frequency: %d, bandwidth %d, foffset %d\n",
2110 params->frequency, ch_bw, pict2chanb_vsb);
2111
2112 status = MT2063_Tune(state, (params->frequency + (pict2chanb_vsb + (ch_bw / 2))));
2113 if (status < 0)
2114 return status;
2115
2116 state->frequency = params->frequency;
2117 return 0;
2118}
2119
2120/*
2121 * As defined on EN 300 429, the DVB-C roll-off factor is 0.15.
2122 * So, the amount of the needed bandwith is given by:
2123 * Bw = Symbol_rate * (1 + 0.15)
2124 * As such, the maximum symbol rate supported by 6 MHz is given by:
2125 * max_symbol_rate = 6 MHz / 1.15 = 5217391 Bauds
2126 */
2127#define MAX_SYMBOL_RATE_6MHz 5217391
2128
2129static int mt2063_set_params(struct dvb_frontend *fe)
2130{
2131 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
2132 struct mt2063_state *state = fe->tuner_priv;
2133 int status;
2134 s32 pict_car;
2135 s32 pict2chanb_vsb;
2136 s32 ch_bw;
2137 s32 if_mid;
2138 s32 rcvr_mode;
2139
2140 if (!state->init) {
2141 status = mt2063_init(fe);
2142 if (status < 0)
2143 return status;
2144 }
2145
2146 dprintk(2, "\n");
2147
2148 if (c->bandwidth_hz == 0)
2149 return -EINVAL;
2150 if (c->bandwidth_hz <= 6000000)
2151 ch_bw = 6000000;
2152 else if (c->bandwidth_hz <= 7000000)
2153 ch_bw = 7000000;
2154 else
2155 ch_bw = 8000000;
2156
2157 switch (c->delivery_system) {
2158 case SYS_DVBT:
2159 rcvr_mode = MT2063_OFFAIR_COFDM;
2160 pict_car = 36125000;
2161 pict2chanb_vsb = -(ch_bw / 2);
2162 break;
2163 case SYS_DVBC_ANNEX_A:
2164 case SYS_DVBC_ANNEX_C:
2165 rcvr_mode = MT2063_CABLE_QAM;
2166 pict_car = 36125000;
2167 pict2chanb_vsb = -(ch_bw / 2);
2168 break;
2169 default:
2170 return -EINVAL;
2171 }
2172 if_mid = pict_car - (pict2chanb_vsb + (ch_bw / 2));
2173
2174 state->AS_Data.f_LO2_Step = 125000; /* FIXME: probably 5000 for FM */
2175 state->AS_Data.f_out = if_mid;
2176 state->AS_Data.f_out_bw = ch_bw + 750000;
2177 status = MT2063_SetReceiverMode(state, rcvr_mode);
2178 if (status < 0)
2179 return status;
2180
2181 dprintk(1, "Tuning to frequency: %d, bandwidth %d, foffset %d\n",
2182 c->frequency, ch_bw, pict2chanb_vsb);
2183
2184 status = MT2063_Tune(state, (c->frequency + (pict2chanb_vsb + (ch_bw / 2))));
2185
2186 if (status < 0)
2187 return status;
2188
2189 state->frequency = c->frequency;
2190 return 0;
2191}
2192
2193static int mt2063_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
2194{
2195 struct mt2063_state *state = fe->tuner_priv;
2196
2197 dprintk(2, "\n");
2198
2199 if (!state->init)
2200 return -ENODEV;
2201
2202 *freq = state->AS_Data.f_out;
2203
2204 dprintk(1, "IF frequency: %d\n", *freq);
2205
2206 return 0;
2207}
2208
2209static int mt2063_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
2210{
2211 struct mt2063_state *state = fe->tuner_priv;
2212
2213 dprintk(2, "\n");
2214
2215 if (!state->init)
2216 return -ENODEV;
2217
2218 *bw = state->AS_Data.f_out_bw - 750000;
2219
2220 dprintk(1, "bandwidth: %d\n", *bw);
2221
2222 return 0;
2223}
2224
2225static struct dvb_tuner_ops mt2063_ops = {
2226 .info = {
2227 .name = "MT2063 Silicon Tuner",
2228 .frequency_min = 45000000,
2229 .frequency_max = 850000000,
2230 .frequency_step = 0,
2231 },
2232
2233 .init = mt2063_init,
2234 .sleep = MT2063_Sleep,
2235 .get_status = mt2063_get_status,
2236 .set_analog_params = mt2063_set_analog_params,
2237 .set_params = mt2063_set_params,
2238 .get_if_frequency = mt2063_get_if_frequency,
2239 .get_bandwidth = mt2063_get_bandwidth,
2240 .release = mt2063_release,
2241};
2242
2243struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
2244 struct mt2063_config *config,
2245 struct i2c_adapter *i2c)
2246{
2247 struct mt2063_state *state = NULL;
2248
2249 dprintk(2, "\n");
2250
2251 state = kzalloc(sizeof(struct mt2063_state), GFP_KERNEL);
2252 if (state == NULL)
2253 goto error;
2254
2255 state->config = config;
2256 state->i2c = i2c;
2257 state->frontend = fe;
2258 state->reference = config->refclock / 1000; /* kHz */
2259 fe->tuner_priv = state;
2260 fe->ops.tuner_ops = mt2063_ops;
2261
2262 printk(KERN_INFO "%s: Attaching MT2063\n", __func__);
2263 return fe;
2264
2265error:
2266 kfree(state);
2267 return NULL;
2268}
2269EXPORT_SYMBOL_GPL(mt2063_attach);
2270
2271/*
2272 * Ancillary routines visible outside mt2063
2273 * FIXME: Remove them in favor of using standard tuner callbacks
2274 */
2275unsigned int tuner_MT2063_SoftwareShutdown(struct dvb_frontend *fe)
2276{
2277 struct mt2063_state *state = fe->tuner_priv;
2278 int err = 0;
2279
2280 dprintk(2, "\n");
2281
2282 err = MT2063_SoftwareShutdown(state, 1);
2283 if (err < 0)
2284 printk(KERN_ERR "%s: Couldn't shutdown\n", __func__);
2285
2286 return err;
2287}
2288EXPORT_SYMBOL_GPL(tuner_MT2063_SoftwareShutdown);
2289
2290unsigned int tuner_MT2063_ClearPowerMaskBits(struct dvb_frontend *fe)
2291{
2292 struct mt2063_state *state = fe->tuner_priv;
2293 int err = 0;
2294
2295 dprintk(2, "\n");
2296
2297 err = MT2063_ClearPowerMaskBits(state, MT2063_ALL_SD);
2298 if (err < 0)
2299 printk(KERN_ERR "%s: Invalid parameter\n", __func__);
2300
2301 return err;
2302}
2303EXPORT_SYMBOL_GPL(tuner_MT2063_ClearPowerMaskBits);
2304
2305MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
2306MODULE_DESCRIPTION("MT2063 Silicon tuner");
2307MODULE_LICENSE("GPL");
diff --git a/drivers/media/common/tuners/mt2063.h b/drivers/media/common/tuners/mt2063.h
new file mode 100644
index 00000000000..62d0e8ec4e9
--- /dev/null
+++ b/drivers/media/common/tuners/mt2063.h
@@ -0,0 +1,36 @@
1#ifndef __MT2063_H__
2#define __MT2063_H__
3
4#include "dvb_frontend.h"
5
6struct mt2063_config {
7 u8 tuner_address;
8 u32 refclock;
9};
10
11#if defined(CONFIG_MEDIA_TUNER_MT2063) || (defined(CONFIG_MEDIA_TUNER_MT2063_MODULE) && defined(MODULE))
12struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
13 struct mt2063_config *config,
14 struct i2c_adapter *i2c);
15
16#else
17
18static inline struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
19 struct mt2063_config *config,
20 struct i2c_adapter *i2c)
21{
22 printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
23 return NULL;
24}
25
26int mt2063_setTune(struct dvb_frontend *fe, u32 f_in,
27 u32 bw_in,
28 enum MTTune_atv_standard tv_type);
29
30/* FIXME: Should use the standard DVB attachment interfaces */
31unsigned int tuner_MT2063_SoftwareShutdown(struct dvb_frontend *fe);
32unsigned int tuner_MT2063_ClearPowerMaskBits(struct dvb_frontend *fe);
33
34#endif /* CONFIG_DVB_MT2063 */
35
36#endif /* __MT2063_H__ */
diff --git a/drivers/media/common/tuners/mt2131.c b/drivers/media/common/tuners/mt2131.c
index a4f830bb25d..f83b0c1ea6c 100644
--- a/drivers/media/common/tuners/mt2131.c
+++ b/drivers/media/common/tuners/mt2131.c
@@ -92,9 +92,9 @@ static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
92 return 0; 92 return 0;
93} 93}
94 94
95static int mt2131_set_params(struct dvb_frontend *fe, 95static int mt2131_set_params(struct dvb_frontend *fe)
96 struct dvb_frontend_parameters *params)
97{ 96{
97 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
98 struct mt2131_priv *priv; 98 struct mt2131_priv *priv;
99 int ret=0, i; 99 int ret=0, i;
100 u32 freq; 100 u32 freq;
@@ -105,12 +105,8 @@ static int mt2131_set_params(struct dvb_frontend *fe,
105 u8 lockval = 0; 105 u8 lockval = 0;
106 106
107 priv = fe->tuner_priv; 107 priv = fe->tuner_priv;
108 if (fe->ops.info.type == FE_OFDM)
109 priv->bandwidth = params->u.ofdm.bandwidth;
110 else
111 priv->bandwidth = 0;
112 108
113 freq = params->frequency / 1000; // Hz -> kHz 109 freq = c->frequency / 1000; /* Hz -> kHz */
114 dprintk(1, "%s() freq=%d\n", __func__, freq); 110 dprintk(1, "%s() freq=%d\n", __func__, freq);
115 111
116 f_lo1 = freq + MT2131_IF1 * 1000; 112 f_lo1 = freq + MT2131_IF1 * 1000;
@@ -193,14 +189,6 @@ static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
193 return 0; 189 return 0;
194} 190}
195 191
196static int mt2131_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
197{
198 struct mt2131_priv *priv = fe->tuner_priv;
199 dprintk(1, "%s()\n", __func__);
200 *bandwidth = priv->bandwidth;
201 return 0;
202}
203
204static int mt2131_get_status(struct dvb_frontend *fe, u32 *status) 192static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
205{ 193{
206 struct mt2131_priv *priv = fe->tuner_priv; 194 struct mt2131_priv *priv = fe->tuner_priv;
@@ -263,7 +251,6 @@ static const struct dvb_tuner_ops mt2131_tuner_ops = {
263 251
264 .set_params = mt2131_set_params, 252 .set_params = mt2131_set_params,
265 .get_frequency = mt2131_get_frequency, 253 .get_frequency = mt2131_get_frequency,
266 .get_bandwidth = mt2131_get_bandwidth,
267 .get_status = mt2131_get_status 254 .get_status = mt2131_get_status
268}; 255};
269 256
@@ -281,7 +268,6 @@ struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
281 return NULL; 268 return NULL;
282 269
283 priv->cfg = cfg; 270 priv->cfg = cfg;
284 priv->bandwidth = 6000000; /* 6MHz */
285 priv->i2c = i2c; 271 priv->i2c = i2c;
286 272
287 if (mt2131_readreg(priv, 0, &id) != 0) { 273 if (mt2131_readreg(priv, 0, &id) != 0) {
diff --git a/drivers/media/common/tuners/mt2131_priv.h b/drivers/media/common/tuners/mt2131_priv.h
index 4e05a67e88c..62aeedf5c55 100644
--- a/drivers/media/common/tuners/mt2131_priv.h
+++ b/drivers/media/common/tuners/mt2131_priv.h
@@ -38,7 +38,6 @@ struct mt2131_priv {
38 struct i2c_adapter *i2c; 38 struct i2c_adapter *i2c;
39 39
40 u32 frequency; 40 u32 frequency;
41 u32 bandwidth;
42}; 41};
43 42
44#endif /* __MT2131_PRIV_H__ */ 43#endif /* __MT2131_PRIV_H__ */
diff --git a/drivers/media/common/tuners/mt2266.c b/drivers/media/common/tuners/mt2266.c
index 25a8ea342c4..bca4d75e42d 100644
--- a/drivers/media/common/tuners/mt2266.c
+++ b/drivers/media/common/tuners/mt2266.c
@@ -122,8 +122,9 @@ static u8 mt2266_vhf[] = { 0x1d, 0xfe, 0x00, 0x00, 0xb4, 0x03, 0xa5, 0xa5,
122 122
123#define FREF 30000 // Quartz oscillator 30 MHz 123#define FREF 30000 // Quartz oscillator 30 MHz
124 124
125static int mt2266_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 125static int mt2266_set_params(struct dvb_frontend *fe)
126{ 126{
127 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
127 struct mt2266_priv *priv; 128 struct mt2266_priv *priv;
128 int ret=0; 129 int ret=0;
129 u32 freq; 130 u32 freq;
@@ -135,32 +136,32 @@ static int mt2266_set_params(struct dvb_frontend *fe, struct dvb_frontend_parame
135 136
136 priv = fe->tuner_priv; 137 priv = fe->tuner_priv;
137 138
138 freq = params->frequency / 1000; // Hz -> kHz 139 freq = priv->frequency / 1000; /* Hz -> kHz */
139 if (freq < 470000 && freq > 230000) 140 if (freq < 470000 && freq > 230000)
140 return -EINVAL; /* Gap between VHF and UHF bands */ 141 return -EINVAL; /* Gap between VHF and UHF bands */
141 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
142 priv->frequency = freq * 1000;
143 142
143 priv->frequency = c->frequency;
144 tune = 2 * freq * (8192/16) / (FREF/16); 144 tune = 2 * freq * (8192/16) / (FREF/16);
145 band = (freq < 300000) ? MT2266_VHF : MT2266_UHF; 145 band = (freq < 300000) ? MT2266_VHF : MT2266_UHF;
146 if (band == MT2266_VHF) 146 if (band == MT2266_VHF)
147 tune *= 2; 147 tune *= 2;
148 148
149 switch (params->u.ofdm.bandwidth) { 149 switch (c->bandwidth_hz) {
150 case BANDWIDTH_6_MHZ: 150 case 6000000:
151 mt2266_writeregs(priv, mt2266_init_6mhz, 151 mt2266_writeregs(priv, mt2266_init_6mhz,
152 sizeof(mt2266_init_6mhz)); 152 sizeof(mt2266_init_6mhz));
153 break; 153 break;
154 case BANDWIDTH_7_MHZ: 154 case 8000000:
155 mt2266_writeregs(priv, mt2266_init_7mhz,
156 sizeof(mt2266_init_7mhz));
157 break;
158 case BANDWIDTH_8_MHZ:
159 default:
160 mt2266_writeregs(priv, mt2266_init_8mhz, 155 mt2266_writeregs(priv, mt2266_init_8mhz,
161 sizeof(mt2266_init_8mhz)); 156 sizeof(mt2266_init_8mhz));
162 break; 157 break;
158 case 7000000:
159 default:
160 mt2266_writeregs(priv, mt2266_init_7mhz,
161 sizeof(mt2266_init_7mhz));
162 break;
163 } 163 }
164 priv->bandwidth = c->bandwidth_hz;
164 165
165 if (band == MT2266_VHF && priv->band == MT2266_UHF) { 166 if (band == MT2266_VHF && priv->band == MT2266_UHF) {
166 dprintk("Switch from UHF to VHF"); 167 dprintk("Switch from UHF to VHF");
diff --git a/drivers/media/common/tuners/mxl5005s.c b/drivers/media/common/tuners/mxl5005s.c
index 54be9e6faaa..6133315fb0e 100644
--- a/drivers/media/common/tuners/mxl5005s.c
+++ b/drivers/media/common/tuners/mxl5005s.c
@@ -3979,54 +3979,47 @@ static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type,
3979 return 0; 3979 return 0;
3980} 3980}
3981 3981
3982static int mxl5005s_set_params(struct dvb_frontend *fe, 3982static int mxl5005s_set_params(struct dvb_frontend *fe)
3983 struct dvb_frontend_parameters *params)
3984{ 3983{
3985 struct mxl5005s_state *state = fe->tuner_priv; 3984 struct mxl5005s_state *state = fe->tuner_priv;
3985 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
3986 u32 delsys = c->delivery_system;
3987 u32 bw = c->bandwidth_hz;
3986 u32 req_mode, req_bw = 0; 3988 u32 req_mode, req_bw = 0;
3987 int ret; 3989 int ret;
3988 3990
3989 dprintk(1, "%s()\n", __func__); 3991 dprintk(1, "%s()\n", __func__);
3990 3992
3991 if (fe->ops.info.type == FE_ATSC) { 3993 switch (delsys) {
3992 switch (params->u.vsb.modulation) { 3994 case SYS_ATSC:
3993 case VSB_8: 3995 req_mode = MXL_ATSC;
3994 req_mode = MXL_ATSC; break; 3996 req_bw = MXL5005S_BANDWIDTH_6MHZ;
3995 default: 3997 break;
3996 case QAM_64: 3998 case SYS_DVBC_ANNEX_B:
3997 case QAM_256: 3999 req_mode = MXL_QAM;
3998 case QAM_AUTO: 4000 req_bw = MXL5005S_BANDWIDTH_6MHZ;
3999 req_mode = MXL_QAM; break; 4001 break;
4000 } 4002 default: /* Assume DVB-T */
4001 } else
4002 req_mode = MXL_DVBT; 4003 req_mode = MXL_DVBT;
4003 4004 switch (bw) {
4004 /* Change tuner for new modulation type if reqd */ 4005 case 6000000:
4005 if (req_mode != state->current_mode) { 4006 req_bw = MXL5005S_BANDWIDTH_6MHZ;
4006 switch (req_mode) { 4007 break;
4007 case MXL_ATSC: 4008 case 7000000:
4008 case MXL_QAM: 4009 req_bw = MXL5005S_BANDWIDTH_7MHZ;
4009 req_bw = MXL5005S_BANDWIDTH_6MHZ; 4010 break;
4011 case 8000000:
4012 case 0:
4013 req_bw = MXL5005S_BANDWIDTH_8MHZ;
4010 break; 4014 break;
4011 case MXL_DVBT:
4012 default: 4015 default:
4013 /* Assume DVB-T */ 4016 return -EINVAL;
4014 switch (params->u.ofdm.bandwidth) {
4015 case BANDWIDTH_6_MHZ:
4016 req_bw = MXL5005S_BANDWIDTH_6MHZ;
4017 break;
4018 case BANDWIDTH_7_MHZ:
4019 req_bw = MXL5005S_BANDWIDTH_7MHZ;
4020 break;
4021 case BANDWIDTH_AUTO:
4022 case BANDWIDTH_8_MHZ:
4023 req_bw = MXL5005S_BANDWIDTH_8MHZ;
4024 break;
4025 default:
4026 return -EINVAL;
4027 }
4028 } 4017 }
4018 }
4029 4019
4020 /* Change tuner for new modulation type if reqd */
4021 if (req_mode != state->current_mode ||
4022 req_bw != state->Chan_Bandwidth) {
4030 state->current_mode = req_mode; 4023 state->current_mode = req_mode;
4031 ret = mxl5005s_reconfigure(fe, req_mode, req_bw); 4024 ret = mxl5005s_reconfigure(fe, req_mode, req_bw);
4032 4025
@@ -4034,8 +4027,8 @@ static int mxl5005s_set_params(struct dvb_frontend *fe,
4034 ret = 0; 4027 ret = 0;
4035 4028
4036 if (ret == 0) { 4029 if (ret == 0) {
4037 dprintk(1, "%s() freq=%d\n", __func__, params->frequency); 4030 dprintk(1, "%s() freq=%d\n", __func__, c->frequency);
4038 ret = mxl5005s_SetRfFreqHz(fe, params->frequency); 4031 ret = mxl5005s_SetRfFreqHz(fe, c->frequency);
4039 } 4032 }
4040 4033
4041 return ret; 4034 return ret;
diff --git a/drivers/media/common/tuners/mxl5007t.c b/drivers/media/common/tuners/mxl5007t.c
index 5d02221e99d..69e453ef0a1 100644
--- a/drivers/media/common/tuners/mxl5007t.c
+++ b/drivers/media/common/tuners/mxl5007t.c
@@ -165,6 +165,8 @@ struct mxl5007t_state {
165 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)]; 165 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
166 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)]; 166 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
167 167
168 enum mxl5007t_if_freq if_freq;
169
168 u32 frequency; 170 u32 frequency;
169 u32 bandwidth; 171 u32 bandwidth;
170}; 172};
@@ -286,6 +288,8 @@ static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
286 /* set inverted IF or normal IF */ 288 /* set inverted IF or normal IF */
287 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00); 289 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
288 290
291 state->if_freq = if_freq;
292
289 return; 293 return;
290} 294}
291 295
@@ -612,47 +616,43 @@ fail:
612 616
613/* ------------------------------------------------------------------------- */ 617/* ------------------------------------------------------------------------- */
614 618
615static int mxl5007t_set_params(struct dvb_frontend *fe, 619static int mxl5007t_set_params(struct dvb_frontend *fe)
616 struct dvb_frontend_parameters *params)
617{ 620{
621 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
622 u32 delsys = c->delivery_system;
618 struct mxl5007t_state *state = fe->tuner_priv; 623 struct mxl5007t_state *state = fe->tuner_priv;
619 enum mxl5007t_bw_mhz bw; 624 enum mxl5007t_bw_mhz bw;
620 enum mxl5007t_mode mode; 625 enum mxl5007t_mode mode;
621 int ret; 626 int ret;
622 u32 freq = params->frequency; 627 u32 freq = c->frequency;
623 628
624 if (fe->ops.info.type == FE_ATSC) { 629 switch (delsys) {
625 switch (params->u.vsb.modulation) { 630 case SYS_ATSC:
626 case VSB_8: 631 mode = MxL_MODE_ATSC;
627 case VSB_16: 632 bw = MxL_BW_6MHz;
628 mode = MxL_MODE_ATSC; 633 break;
629 break; 634 case SYS_DVBC_ANNEX_B:
630 case QAM_64: 635 mode = MxL_MODE_CABLE;
631 case QAM_256:
632 mode = MxL_MODE_CABLE;
633 break;
634 default:
635 mxl_err("modulation not set!");
636 return -EINVAL;
637 }
638 bw = MxL_BW_6MHz; 636 bw = MxL_BW_6MHz;
639 } else if (fe->ops.info.type == FE_OFDM) { 637 break;
640 switch (params->u.ofdm.bandwidth) { 638 case SYS_DVBT:
641 case BANDWIDTH_6_MHZ: 639 case SYS_DVBT2:
640 mode = MxL_MODE_DVBT;
641 switch (c->bandwidth_hz) {
642 case 6000000:
642 bw = MxL_BW_6MHz; 643 bw = MxL_BW_6MHz;
643 break; 644 break;
644 case BANDWIDTH_7_MHZ: 645 case 7000000:
645 bw = MxL_BW_7MHz; 646 bw = MxL_BW_7MHz;
646 break; 647 break;
647 case BANDWIDTH_8_MHZ: 648 case 8000000:
648 bw = MxL_BW_8MHz; 649 bw = MxL_BW_8MHz;
649 break; 650 break;
650 default: 651 default:
651 mxl_err("bandwidth not set!");
652 return -EINVAL; 652 return -EINVAL;
653 } 653 }
654 mode = MxL_MODE_DVBT; 654 break;
655 } else { 655 default:
656 mxl_err("modulation type not supported!"); 656 mxl_err("modulation type not supported!");
657 return -EINVAL; 657 return -EINVAL;
658 } 658 }
@@ -671,8 +671,7 @@ static int mxl5007t_set_params(struct dvb_frontend *fe,
671 goto fail; 671 goto fail;
672 672
673 state->frequency = freq; 673 state->frequency = freq;
674 state->bandwidth = (fe->ops.info.type == FE_OFDM) ? 674 state->bandwidth = c->bandwidth_hz;
675 params->u.ofdm.bandwidth : 0;
676fail: 675fail:
677 mutex_unlock(&state->lock); 676 mutex_unlock(&state->lock);
678 677
@@ -738,6 +737,50 @@ static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
738 return 0; 737 return 0;
739} 738}
740 739
740static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
741{
742 struct mxl5007t_state *state = fe->tuner_priv;
743
744 *frequency = 0;
745
746 switch (state->if_freq) {
747 case MxL_IF_4_MHZ:
748 *frequency = 4000000;
749 break;
750 case MxL_IF_4_5_MHZ:
751 *frequency = 4500000;
752 break;
753 case MxL_IF_4_57_MHZ:
754 *frequency = 4570000;
755 break;
756 case MxL_IF_5_MHZ:
757 *frequency = 5000000;
758 break;
759 case MxL_IF_5_38_MHZ:
760 *frequency = 5380000;
761 break;
762 case MxL_IF_6_MHZ:
763 *frequency = 6000000;
764 break;
765 case MxL_IF_6_28_MHZ:
766 *frequency = 6280000;
767 break;
768 case MxL_IF_9_1915_MHZ:
769 *frequency = 9191500;
770 break;
771 case MxL_IF_35_25_MHZ:
772 *frequency = 35250000;
773 break;
774 case MxL_IF_36_15_MHZ:
775 *frequency = 36150000;
776 break;
777 case MxL_IF_44_MHZ:
778 *frequency = 44000000;
779 break;
780 }
781 return 0;
782}
783
741static int mxl5007t_release(struct dvb_frontend *fe) 784static int mxl5007t_release(struct dvb_frontend *fe)
742{ 785{
743 struct mxl5007t_state *state = fe->tuner_priv; 786 struct mxl5007t_state *state = fe->tuner_priv;
@@ -767,6 +810,7 @@ static struct dvb_tuner_ops mxl5007t_tuner_ops = {
767 .get_frequency = mxl5007t_get_frequency, 810 .get_frequency = mxl5007t_get_frequency,
768 .get_bandwidth = mxl5007t_get_bandwidth, 811 .get_bandwidth = mxl5007t_get_bandwidth,
769 .release = mxl5007t_release, 812 .release = mxl5007t_release,
813 .get_if_frequency = mxl5007t_get_if_frequency,
770}; 814};
771 815
772static int mxl5007t_get_chip_id(struct mxl5007t_state *state) 816static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
diff --git a/drivers/media/common/tuners/qt1010.c b/drivers/media/common/tuners/qt1010.c
index 9f5dba244cb..2d79b1f5d5e 100644
--- a/drivers/media/common/tuners/qt1010.c
+++ b/drivers/media/common/tuners/qt1010.c
@@ -82,9 +82,9 @@ static void qt1010_dump_regs(struct qt1010_priv *priv)
82 printk(KERN_CONT "\n"); 82 printk(KERN_CONT "\n");
83} 83}
84 84
85static int qt1010_set_params(struct dvb_frontend *fe, 85static int qt1010_set_params(struct dvb_frontend *fe)
86 struct dvb_frontend_parameters *params)
87{ 86{
87 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
88 struct qt1010_priv *priv; 88 struct qt1010_priv *priv;
89 int err; 89 int err;
90 u32 freq, div, mod1, mod2; 90 u32 freq, div, mod1, mod2;
@@ -144,13 +144,11 @@ static int qt1010_set_params(struct dvb_frontend *fe,
144#define FREQ2 4000000 /* 4 MHz Quartz oscillator in the stick? */ 144#define FREQ2 4000000 /* 4 MHz Quartz oscillator in the stick? */
145 145
146 priv = fe->tuner_priv; 146 priv = fe->tuner_priv;
147 freq = params->frequency; 147 freq = c->frequency;
148 div = (freq + QT1010_OFFSET) / QT1010_STEP; 148 div = (freq + QT1010_OFFSET) / QT1010_STEP;
149 freq = (div * QT1010_STEP) - QT1010_OFFSET; 149 freq = (div * QT1010_STEP) - QT1010_OFFSET;
150 mod1 = (freq + QT1010_OFFSET) % FREQ1; 150 mod1 = (freq + QT1010_OFFSET) % FREQ1;
151 mod2 = (freq + QT1010_OFFSET) % FREQ2; 151 mod2 = (freq + QT1010_OFFSET) % FREQ2;
152 priv->bandwidth =
153 (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
154 priv->frequency = freq; 152 priv->frequency = freq;
155 153
156 if (fe->ops.i2c_gate_ctrl) 154 if (fe->ops.i2c_gate_ctrl)
@@ -320,7 +318,7 @@ static u8 qt1010_init_meas2(struct qt1010_priv *priv,
320static int qt1010_init(struct dvb_frontend *fe) 318static int qt1010_init(struct dvb_frontend *fe)
321{ 319{
322 struct qt1010_priv *priv = fe->tuner_priv; 320 struct qt1010_priv *priv = fe->tuner_priv;
323 struct dvb_frontend_parameters params; 321 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
324 int err = 0; 322 int err = 0;
325 u8 i, tmpval, *valptr = NULL; 323 u8 i, tmpval, *valptr = NULL;
326 324
@@ -397,9 +395,9 @@ static int qt1010_init(struct dvb_frontend *fe)
397 if ((err = qt1010_init_meas2(priv, i, &tmpval))) 395 if ((err = qt1010_init_meas2(priv, i, &tmpval)))
398 return err; 396 return err;
399 397
400 params.frequency = 545000000; /* Sigmatek DVB-110 545000000 */ 398 c->frequency = 545000000; /* Sigmatek DVB-110 545000000 */
401 /* MSI Megasky 580 GL861 533000000 */ 399 /* MSI Megasky 580 GL861 533000000 */
402 return qt1010_set_params(fe, &params); 400 return qt1010_set_params(fe);
403} 401}
404 402
405static int qt1010_release(struct dvb_frontend *fe) 403static int qt1010_release(struct dvb_frontend *fe)
@@ -416,10 +414,9 @@ static int qt1010_get_frequency(struct dvb_frontend *fe, u32 *frequency)
416 return 0; 414 return 0;
417} 415}
418 416
419static int qt1010_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) 417static int qt1010_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
420{ 418{
421 struct qt1010_priv *priv = fe->tuner_priv; 419 *frequency = 36125000;
422 *bandwidth = priv->bandwidth;
423 return 0; 420 return 0;
424} 421}
425 422
@@ -437,7 +434,7 @@ static const struct dvb_tuner_ops qt1010_tuner_ops = {
437 434
438 .set_params = qt1010_set_params, 435 .set_params = qt1010_set_params,
439 .get_frequency = qt1010_get_frequency, 436 .get_frequency = qt1010_get_frequency,
440 .get_bandwidth = qt1010_get_bandwidth 437 .get_if_frequency = qt1010_get_if_frequency,
441}; 438};
442 439
443struct dvb_frontend * qt1010_attach(struct dvb_frontend *fe, 440struct dvb_frontend * qt1010_attach(struct dvb_frontend *fe,
diff --git a/drivers/media/common/tuners/qt1010_priv.h b/drivers/media/common/tuners/qt1010_priv.h
index 090cf475f09..2c42d3f0163 100644
--- a/drivers/media/common/tuners/qt1010_priv.h
+++ b/drivers/media/common/tuners/qt1010_priv.h
@@ -99,7 +99,6 @@ struct qt1010_priv {
99 u8 reg25_init_val; 99 u8 reg25_init_val;
100 100
101 u32 frequency; 101 u32 frequency;
102 u32 bandwidth;
103}; 102};
104 103
105#endif 104#endif
diff --git a/drivers/media/common/tuners/tda18212.c b/drivers/media/common/tuners/tda18212.c
index e29cc2bc113..602c2e392b1 100644
--- a/drivers/media/common/tuners/tda18212.c
+++ b/drivers/media/common/tuners/tda18212.c
@@ -25,6 +25,8 @@
25struct tda18212_priv { 25struct tda18212_priv {
26 struct tda18212_config *cfg; 26 struct tda18212_config *cfg;
27 struct i2c_adapter *i2c; 27 struct i2c_adapter *i2c;
28
29 u32 if_frequency;
28}; 30};
29 31
30#define dbg(fmt, arg...) \ 32#define dbg(fmt, arg...) \
@@ -128,20 +130,31 @@ static void tda18212_dump_regs(struct tda18212_priv *priv)
128} 130}
129#endif 131#endif
130 132
131static int tda18212_set_params(struct dvb_frontend *fe, 133static int tda18212_set_params(struct dvb_frontend *fe)
132 struct dvb_frontend_parameters *p)
133{ 134{
134 struct tda18212_priv *priv = fe->tuner_priv; 135 struct tda18212_priv *priv = fe->tuner_priv;
135 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 136 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
136 int ret, i; 137 int ret, i;
137 u32 if_khz; 138 u32 if_khz;
138 u8 buf[9]; 139 u8 buf[9];
140 #define DVBT_6 0
141 #define DVBT_7 1
142 #define DVBT_8 2
143 #define DVBT2_6 3
144 #define DVBT2_7 4
145 #define DVBT2_8 5
146 #define DVBC_6 6
147 #define DVBC_8 7
139 static const u8 bw_params[][3] = { 148 static const u8 bw_params[][3] = {
140 /* 0f 13 23 */ 149 /* reg: 0f 13 23 */
141 { 0xb3, 0x20, 0x03 }, /* DVB-T 6 MHz */ 150 [DVBT_6] = { 0xb3, 0x20, 0x03 },
142 { 0xb3, 0x31, 0x01 }, /* DVB-T 7 MHz */ 151 [DVBT_7] = { 0xb3, 0x31, 0x01 },
143 { 0xb3, 0x22, 0x01 }, /* DVB-T 8 MHz */ 152 [DVBT_8] = { 0xb3, 0x22, 0x01 },
144 { 0x92, 0x53, 0x03 }, /* DVB-C */ 153 [DVBT2_6] = { 0xbc, 0x20, 0x03 },
154 [DVBT2_7] = { 0xbc, 0x72, 0x03 },
155 [DVBT2_8] = { 0xbc, 0x22, 0x01 },
156 [DVBC_6] = { 0x92, 0x50, 0x03 },
157 [DVBC_8] = { 0x92, 0x53, 0x03 },
145 }; 158 };
146 159
147 dbg("delsys=%d RF=%d BW=%d\n", 160 dbg("delsys=%d RF=%d BW=%d\n",
@@ -155,24 +168,44 @@ static int tda18212_set_params(struct dvb_frontend *fe,
155 switch (c->bandwidth_hz) { 168 switch (c->bandwidth_hz) {
156 case 6000000: 169 case 6000000:
157 if_khz = priv->cfg->if_dvbt_6; 170 if_khz = priv->cfg->if_dvbt_6;
158 i = 0; 171 i = DVBT_6;
159 break; 172 break;
160 case 7000000: 173 case 7000000:
161 if_khz = priv->cfg->if_dvbt_7; 174 if_khz = priv->cfg->if_dvbt_7;
162 i = 1; 175 i = DVBT_7;
163 break; 176 break;
164 case 8000000: 177 case 8000000:
165 if_khz = priv->cfg->if_dvbt_8; 178 if_khz = priv->cfg->if_dvbt_8;
166 i = 2; 179 i = DVBT_8;
167 break; 180 break;
168 default: 181 default:
169 ret = -EINVAL; 182 ret = -EINVAL;
170 goto error; 183 goto error;
171 } 184 }
172 break; 185 break;
173 case SYS_DVBC_ANNEX_AC: 186 case SYS_DVBT2:
187 switch (c->bandwidth_hz) {
188 case 6000000:
189 if_khz = priv->cfg->if_dvbt2_6;
190 i = DVBT2_6;
191 break;
192 case 7000000:
193 if_khz = priv->cfg->if_dvbt2_7;
194 i = DVBT2_7;
195 break;
196 case 8000000:
197 if_khz = priv->cfg->if_dvbt2_8;
198 i = DVBT2_8;
199 break;
200 default:
201 ret = -EINVAL;
202 goto error;
203 }
204 break;
205 case SYS_DVBC_ANNEX_A:
206 case SYS_DVBC_ANNEX_C:
174 if_khz = priv->cfg->if_dvbc; 207 if_khz = priv->cfg->if_dvbc;
175 i = 3; 208 i = DVBC_8;
176 break; 209 break;
177 default: 210 default:
178 ret = -EINVAL; 211 ret = -EINVAL;
@@ -194,7 +227,7 @@ static int tda18212_set_params(struct dvb_frontend *fe,
194 buf[0] = 0x02; 227 buf[0] = 0x02;
195 buf[1] = bw_params[i][1]; 228 buf[1] = bw_params[i][1];
196 buf[2] = 0x03; /* default value */ 229 buf[2] = 0x03; /* default value */
197 buf[3] = if_khz / 50; 230 buf[3] = DIV_ROUND_CLOSEST(if_khz, 50);
198 buf[4] = ((c->frequency / 1000) >> 16) & 0xff; 231 buf[4] = ((c->frequency / 1000) >> 16) & 0xff;
199 buf[5] = ((c->frequency / 1000) >> 8) & 0xff; 232 buf[5] = ((c->frequency / 1000) >> 8) & 0xff;
200 buf[6] = ((c->frequency / 1000) >> 0) & 0xff; 233 buf[6] = ((c->frequency / 1000) >> 0) & 0xff;
@@ -204,6 +237,9 @@ static int tda18212_set_params(struct dvb_frontend *fe,
204 if (ret) 237 if (ret)
205 goto error; 238 goto error;
206 239
240 /* actual IF rounded as it is on register */
241 priv->if_frequency = buf[3] * 50 * 1000;
242
207exit: 243exit:
208 if (fe->ops.i2c_gate_ctrl) 244 if (fe->ops.i2c_gate_ctrl)
209 fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */ 245 fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
@@ -215,6 +251,15 @@ error:
215 goto exit; 251 goto exit;
216} 252}
217 253
254static int tda18212_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
255{
256 struct tda18212_priv *priv = fe->tuner_priv;
257
258 *frequency = priv->if_frequency;
259
260 return 0;
261}
262
218static int tda18212_release(struct dvb_frontend *fe) 263static int tda18212_release(struct dvb_frontend *fe)
219{ 264{
220 kfree(fe->tuner_priv); 265 kfree(fe->tuner_priv);
@@ -234,6 +279,7 @@ static const struct dvb_tuner_ops tda18212_tuner_ops = {
234 .release = tda18212_release, 279 .release = tda18212_release,
235 280
236 .set_params = tda18212_set_params, 281 .set_params = tda18212_set_params,
282 .get_if_frequency = tda18212_get_if_frequency,
237}; 283};
238 284
239struct dvb_frontend *tda18212_attach(struct dvb_frontend *fe, 285struct dvb_frontend *tda18212_attach(struct dvb_frontend *fe,
diff --git a/drivers/media/common/tuners/tda18212.h b/drivers/media/common/tuners/tda18212.h
index 83b497f59e1..9bd5da4aabb 100644
--- a/drivers/media/common/tuners/tda18212.h
+++ b/drivers/media/common/tuners/tda18212.h
@@ -29,6 +29,10 @@ struct tda18212_config {
29 u16 if_dvbt_6; 29 u16 if_dvbt_6;
30 u16 if_dvbt_7; 30 u16 if_dvbt_7;
31 u16 if_dvbt_8; 31 u16 if_dvbt_8;
32 u16 if_dvbt2_5;
33 u16 if_dvbt2_6;
34 u16 if_dvbt2_7;
35 u16 if_dvbt2_8;
32 u16 if_dvbc; 36 u16 if_dvbc;
33}; 37};
34 38
diff --git a/drivers/media/common/tuners/tda18218.c b/drivers/media/common/tuners/tda18218.c
index 4fc29730a12..dfb3a831df4 100644
--- a/drivers/media/common/tuners/tda18218.c
+++ b/drivers/media/common/tuners/tda18218.c
@@ -109,10 +109,11 @@ static int tda18218_rd_reg(struct tda18218_priv *priv, u8 reg, u8 *val)
109 return tda18218_rd_regs(priv, reg, val, 1); 109 return tda18218_rd_regs(priv, reg, val, 1);
110} 110}
111 111
112static int tda18218_set_params(struct dvb_frontend *fe, 112static int tda18218_set_params(struct dvb_frontend *fe)
113 struct dvb_frontend_parameters *params)
114{ 113{
115 struct tda18218_priv *priv = fe->tuner_priv; 114 struct tda18218_priv *priv = fe->tuner_priv;
115 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
116 u32 bw = c->bandwidth_hz;
116 int ret; 117 int ret;
117 u8 buf[3], i, BP_Filter, LP_Fc; 118 u8 buf[3], i, BP_Filter, LP_Fc;
118 u32 LO_Frac; 119 u32 LO_Frac;
@@ -138,22 +139,19 @@ static int tda18218_set_params(struct dvb_frontend *fe,
138 fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */ 139 fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
139 140
140 /* low-pass filter cut-off frequency */ 141 /* low-pass filter cut-off frequency */
141 switch (params->u.ofdm.bandwidth) { 142 if (bw <= 6000000) {
142 case BANDWIDTH_6_MHZ:
143 LP_Fc = 0; 143 LP_Fc = 0;
144 LO_Frac = params->frequency + 3000000; 144 priv->if_frequency = 3000000;
145 break; 145 } else if (bw <= 7000000) {
146 case BANDWIDTH_7_MHZ:
147 LP_Fc = 1; 146 LP_Fc = 1;
148 LO_Frac = params->frequency + 3500000; 147 priv->if_frequency = 3500000;
149 break; 148 } else {
150 case BANDWIDTH_8_MHZ:
151 default:
152 LP_Fc = 2; 149 LP_Fc = 2;
153 LO_Frac = params->frequency + 4000000; 150 priv->if_frequency = 4000000;
154 break;
155 } 151 }
156 152
153 LO_Frac = c->frequency + priv->if_frequency;
154
157 /* band-pass filter */ 155 /* band-pass filter */
158 if (LO_Frac < 188000000) 156 if (LO_Frac < 188000000)
159 BP_Filter = 3; 157 BP_Filter = 3;
@@ -206,6 +204,14 @@ error:
206 return ret; 204 return ret;
207} 205}
208 206
207static int tda18218_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
208{
209 struct tda18218_priv *priv = fe->tuner_priv;
210 *frequency = priv->if_frequency;
211 dbg("%s: if=%d", __func__, *frequency);
212 return 0;
213}
214
209static int tda18218_sleep(struct dvb_frontend *fe) 215static int tda18218_sleep(struct dvb_frontend *fe)
210{ 216{
211 struct tda18218_priv *priv = fe->tuner_priv; 217 struct tda18218_priv *priv = fe->tuner_priv;
@@ -268,6 +274,8 @@ static const struct dvb_tuner_ops tda18218_tuner_ops = {
268 .sleep = tda18218_sleep, 274 .sleep = tda18218_sleep,
269 275
270 .set_params = tda18218_set_params, 276 .set_params = tda18218_set_params,
277
278 .get_if_frequency = tda18218_get_if_frequency,
271}; 279};
272 280
273struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe, 281struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe,
diff --git a/drivers/media/common/tuners/tda18218_priv.h b/drivers/media/common/tuners/tda18218_priv.h
index 904e5365c78..dc52b72e140 100644
--- a/drivers/media/common/tuners/tda18218_priv.h
+++ b/drivers/media/common/tuners/tda18218_priv.h
@@ -100,6 +100,8 @@ struct tda18218_priv {
100 struct tda18218_config *cfg; 100 struct tda18218_config *cfg;
101 struct i2c_adapter *i2c; 101 struct i2c_adapter *i2c;
102 102
103 u32 if_frequency;
104
103 u8 regs[TDA18218_NUM_REGS]; 105 u8 regs[TDA18218_NUM_REGS];
104}; 106};
105 107
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c
index 63cc4004e21..2e67f445990 100644
--- a/drivers/media/common/tuners/tda18271-fe.c
+++ b/drivers/media/common/tuners/tda18271-fe.c
@@ -928,59 +928,49 @@ fail:
928 928
929/* ------------------------------------------------------------------ */ 929/* ------------------------------------------------------------------ */
930 930
931static int tda18271_set_params(struct dvb_frontend *fe, 931static int tda18271_set_params(struct dvb_frontend *fe)
932 struct dvb_frontend_parameters *params)
933{ 932{
933 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
934 u32 delsys = c->delivery_system;
935 u32 bw = c->bandwidth_hz;
936 u32 freq = c->frequency;
934 struct tda18271_priv *priv = fe->tuner_priv; 937 struct tda18271_priv *priv = fe->tuner_priv;
935 struct tda18271_std_map *std_map = &priv->std; 938 struct tda18271_std_map *std_map = &priv->std;
936 struct tda18271_std_map_item *map; 939 struct tda18271_std_map_item *map;
937 int ret; 940 int ret;
938 u32 bw, freq = params->frequency;
939 941
940 priv->mode = TDA18271_DIGITAL; 942 priv->mode = TDA18271_DIGITAL;
941 943
942 if (fe->ops.info.type == FE_ATSC) { 944 switch (delsys) {
943 switch (params->u.vsb.modulation) { 945 case SYS_ATSC:
944 case VSB_8: 946 map = &std_map->atsc_6;
945 case VSB_16:
946 map = &std_map->atsc_6;
947 break;
948 case QAM_64:
949 case QAM_256:
950 map = &std_map->qam_6;
951 break;
952 default:
953 tda_warn("modulation not set!\n");
954 return -EINVAL;
955 }
956#if 0
957 /* userspace request is already center adjusted */
958 freq += 1750000; /* Adjust to center (+1.75MHZ) */
959#endif
960 bw = 6000000; 947 bw = 6000000;
961 } else if (fe->ops.info.type == FE_OFDM) { 948 break;
962 switch (params->u.ofdm.bandwidth) { 949 case SYS_ISDBT:
963 case BANDWIDTH_6_MHZ: 950 case SYS_DVBT:
964 bw = 6000000; 951 case SYS_DVBT2:
952 if (bw <= 6000000) {
965 map = &std_map->dvbt_6; 953 map = &std_map->dvbt_6;
966 break; 954 } else if (bw <= 7000000) {
967 case BANDWIDTH_7_MHZ:
968 bw = 7000000;
969 map = &std_map->dvbt_7; 955 map = &std_map->dvbt_7;
970 break; 956 } else {
971 case BANDWIDTH_8_MHZ:
972 bw = 8000000;
973 map = &std_map->dvbt_8; 957 map = &std_map->dvbt_8;
974 break;
975 default:
976 tda_warn("bandwidth not set!\n");
977 return -EINVAL;
978 } 958 }
979 } else if (fe->ops.info.type == FE_QAM) { 959 break;
980 /* DVB-C */ 960 case SYS_DVBC_ANNEX_B:
981 map = &std_map->qam_8; 961 bw = 6000000;
982 bw = 8000000; 962 /* falltrough */
983 } else { 963 case SYS_DVBC_ANNEX_A:
964 case SYS_DVBC_ANNEX_C:
965 if (bw <= 6000000) {
966 map = &std_map->qam_6;
967 } else if (bw <= 7000000) {
968 map = &std_map->qam_7;
969 } else {
970 map = &std_map->qam_8;
971 }
972 break;
973 default:
984 tda_warn("modulation type not supported!\n"); 974 tda_warn("modulation type not supported!\n");
985 return -EINVAL; 975 return -EINVAL;
986 } 976 }
@@ -994,9 +984,9 @@ static int tda18271_set_params(struct dvb_frontend *fe,
994 if (tda_fail(ret)) 984 if (tda_fail(ret))
995 goto fail; 985 goto fail;
996 986
987 priv->if_freq = map->if_freq;
997 priv->frequency = freq; 988 priv->frequency = freq;
998 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? 989 priv->bandwidth = bw;
999 params->u.ofdm.bandwidth : 0;
1000fail: 990fail:
1001 return ret; 991 return ret;
1002} 992}
@@ -1050,6 +1040,7 @@ static int tda18271_set_analog_params(struct dvb_frontend *fe,
1050 if (tda_fail(ret)) 1040 if (tda_fail(ret))
1051 goto fail; 1041 goto fail;
1052 1042
1043 priv->if_freq = map->if_freq;
1053 priv->frequency = freq; 1044 priv->frequency = freq;
1054 priv->bandwidth = 0; 1045 priv->bandwidth = 0;
1055fail: 1046fail:
@@ -1086,6 +1077,13 @@ static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1086 return 0; 1077 return 0;
1087} 1078}
1088 1079
1080static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
1081{
1082 struct tda18271_priv *priv = fe->tuner_priv;
1083 *frequency = (u32)priv->if_freq * 1000;
1084 return 0;
1085}
1086
1089/* ------------------------------------------------------------------ */ 1087/* ------------------------------------------------------------------ */
1090 1088
1091#define tda18271_update_std(std_cfg, name) do { \ 1089#define tda18271_update_std(std_cfg, name) do { \
@@ -1245,6 +1243,7 @@ static const struct dvb_tuner_ops tda18271_tuner_ops = {
1245 .set_config = tda18271_set_config, 1243 .set_config = tda18271_set_config,
1246 .get_frequency = tda18271_get_frequency, 1244 .get_frequency = tda18271_get_frequency,
1247 .get_bandwidth = tda18271_get_bandwidth, 1245 .get_bandwidth = tda18271_get_bandwidth,
1246 .get_if_frequency = tda18271_get_if_frequency,
1248}; 1247};
1249 1248
1250struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr, 1249struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
diff --git a/drivers/media/common/tuners/tda18271-maps.c b/drivers/media/common/tuners/tda18271-maps.c
index 3d5b6ab7e33..fb881c667c9 100644
--- a/drivers/media/common/tuners/tda18271-maps.c
+++ b/drivers/media/common/tuners/tda18271-maps.c
@@ -1213,6 +1213,8 @@ static struct tda18271_std_map tda18271c1_std_map = {
1213 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */ 1213 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
1214 .qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5, 1214 .qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
1215 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */ 1215 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1216 .qam_7 = { .if_freq = 4500, .fm_rfn = 0, .agc_mode = 3, .std = 6,
1217 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
1216 .qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7, 1218 .qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7,
1217 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */ 1219 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */
1218}; 1220};
@@ -1244,6 +1246,8 @@ static struct tda18271_std_map tda18271c2_std_map = {
1244 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */ 1246 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1245 .qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5, 1247 .qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
1246 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */ 1248 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1249 .qam_7 = { .if_freq = 4500, .fm_rfn = 0, .agc_mode = 3, .std = 6,
1250 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
1247 .qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7, 1251 .qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7,
1248 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */ 1252 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */
1249}; 1253};
diff --git a/drivers/media/common/tuners/tda18271-priv.h b/drivers/media/common/tuners/tda18271-priv.h
index 94340f47562..454c152ccaa 100644
--- a/drivers/media/common/tuners/tda18271-priv.h
+++ b/drivers/media/common/tuners/tda18271-priv.h
@@ -122,6 +122,8 @@ struct tda18271_priv {
122 122
123 struct mutex lock; 123 struct mutex lock;
124 124
125 u16 if_freq;
126
125 u32 frequency; 127 u32 frequency;
126 u32 bandwidth; 128 u32 bandwidth;
127}; 129};
diff --git a/drivers/media/common/tuners/tda18271.h b/drivers/media/common/tuners/tda18271.h
index 50cfa8cebb9..640bae4e6a5 100644
--- a/drivers/media/common/tuners/tda18271.h
+++ b/drivers/media/common/tuners/tda18271.h
@@ -53,6 +53,7 @@ struct tda18271_std_map {
53 struct tda18271_std_map_item dvbt_7; 53 struct tda18271_std_map_item dvbt_7;
54 struct tda18271_std_map_item dvbt_8; 54 struct tda18271_std_map_item dvbt_8;
55 struct tda18271_std_map_item qam_6; 55 struct tda18271_std_map_item qam_6;
56 struct tda18271_std_map_item qam_7;
56 struct tda18271_std_map_item qam_8; 57 struct tda18271_std_map_item qam_8;
57}; 58};
58 59
diff --git a/drivers/media/common/tuners/tda827x.c b/drivers/media/common/tuners/tda827x.c
index e0d5b43772b..a0d17626747 100644
--- a/drivers/media/common/tuners/tda827x.c
+++ b/drivers/media/common/tuners/tda827x.c
@@ -152,9 +152,9 @@ static int tuner_transfer(struct dvb_frontend *fe,
152 return rc; 152 return rc;
153} 153}
154 154
155static int tda827xo_set_params(struct dvb_frontend *fe, 155static int tda827xo_set_params(struct dvb_frontend *fe)
156 struct dvb_frontend_parameters *params)
157{ 156{
157 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
158 struct tda827x_priv *priv = fe->tuner_priv; 158 struct tda827x_priv *priv = fe->tuner_priv;
159 u8 buf[14]; 159 u8 buf[14];
160 int rc; 160 int rc;
@@ -165,18 +165,16 @@ static int tda827xo_set_params(struct dvb_frontend *fe,
165 u32 N; 165 u32 N;
166 166
167 dprintk("%s:\n", __func__); 167 dprintk("%s:\n", __func__);
168 switch (params->u.ofdm.bandwidth) { 168 if (c->bandwidth_hz == 0) {
169 case BANDWIDTH_6_MHZ: 169 if_freq = 5000000;
170 } else if (c->bandwidth_hz <= 6000000) {
170 if_freq = 4000000; 171 if_freq = 4000000;
171 break; 172 } else if (c->bandwidth_hz <= 7000000) {
172 case BANDWIDTH_7_MHZ:
173 if_freq = 4500000; 173 if_freq = 4500000;
174 break; 174 } else { /* 8 MHz */
175 default: /* 8 MHz or Auto */
176 if_freq = 5000000; 175 if_freq = 5000000;
177 break;
178 } 176 }
179 tuner_freq = params->frequency; 177 tuner_freq = c->frequency;
180 178
181 i = 0; 179 i = 0;
182 while (tda827x_table[i].lomax < tuner_freq) { 180 while (tda827x_table[i].lomax < tuner_freq) {
@@ -220,8 +218,8 @@ static int tda827xo_set_params(struct dvb_frontend *fe,
220 if (rc < 0) 218 if (rc < 0)
221 goto err; 219 goto err;
222 220
223 priv->frequency = params->frequency; 221 priv->frequency = c->frequency;
224 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; 222 priv->bandwidth = c->bandwidth_hz;
225 223
226 return 0; 224 return 0;
227 225
@@ -513,9 +511,9 @@ static void tda827xa_lna_gain(struct dvb_frontend *fe, int high,
513 } 511 }
514} 512}
515 513
516static int tda827xa_set_params(struct dvb_frontend *fe, 514static int tda827xa_set_params(struct dvb_frontend *fe)
517 struct dvb_frontend_parameters *params)
518{ 515{
516 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
519 struct tda827x_priv *priv = fe->tuner_priv; 517 struct tda827x_priv *priv = fe->tuner_priv;
520 struct tda827xa_data *frequency_map = tda827xa_dvbt; 518 struct tda827xa_data *frequency_map = tda827xa_dvbt;
521 u8 buf[11]; 519 u8 buf[11];
@@ -531,22 +529,25 @@ static int tda827xa_set_params(struct dvb_frontend *fe,
531 tda827xa_lna_gain(fe, 1, NULL); 529 tda827xa_lna_gain(fe, 1, NULL);
532 msleep(20); 530 msleep(20);
533 531
534 switch (params->u.ofdm.bandwidth) { 532 if (c->bandwidth_hz == 0) {
535 case BANDWIDTH_6_MHZ: 533 if_freq = 5000000;
534 } else if (c->bandwidth_hz <= 6000000) {
536 if_freq = 4000000; 535 if_freq = 4000000;
537 break; 536 } else if (c->bandwidth_hz <= 7000000) {
538 case BANDWIDTH_7_MHZ:
539 if_freq = 4500000; 537 if_freq = 4500000;
540 break; 538 } else { /* 8 MHz */
541 default: /* 8 MHz or Auto */
542 if_freq = 5000000; 539 if_freq = 5000000;
543 break;
544 } 540 }
545 tuner_freq = params->frequency; 541 tuner_freq = c->frequency;
546 542
547 if (fe->ops.info.type == FE_QAM) { 543 switch (c->delivery_system) {
544 case SYS_DVBC_ANNEX_A:
545 case SYS_DVBC_ANNEX_C:
548 dprintk("%s select tda827xa_dvbc\n", __func__); 546 dprintk("%s select tda827xa_dvbc\n", __func__);
549 frequency_map = tda827xa_dvbc; 547 frequency_map = tda827xa_dvbc;
548 break;
549 default:
550 break;
550 } 551 }
551 552
552 i = 0; 553 i = 0;
@@ -645,9 +646,8 @@ static int tda827xa_set_params(struct dvb_frontend *fe,
645 if (rc < 0) 646 if (rc < 0)
646 goto err; 647 goto err;
647 648
648 priv->frequency = params->frequency; 649 priv->frequency = c->frequency;
649 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; 650 priv->bandwidth = c->bandwidth_hz;
650
651 651
652 return 0; 652 return 0;
653 653
diff --git a/drivers/media/common/tuners/tuner-simple.c b/drivers/media/common/tuners/tuner-simple.c
index f8ee29e6059..39e7e583c8c 100644
--- a/drivers/media/common/tuners/tuner-simple.c
+++ b/drivers/media/common/tuners/tuner-simple.c
@@ -751,6 +751,17 @@ static int simple_set_radio_freq(struct dvb_frontend *fe,
751 if (4 != rc) 751 if (4 != rc)
752 tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc); 752 tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
753 753
754 /* Write AUX byte */
755 switch (priv->type) {
756 case TUNER_PHILIPS_FM1216ME_MK3:
757 buffer[2] = 0x98;
758 buffer[3] = 0x20; /* set TOP AGC */
759 rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 4);
760 if (4 != rc)
761 tuner_warn("i2c i/o error: rc == %d (should be 4)\n", rc);
762 break;
763 }
764
754 return 0; 765 return 0;
755} 766}
756 767
@@ -780,24 +791,26 @@ static int simple_set_params(struct dvb_frontend *fe,
780} 791}
781 792
782static void simple_set_dvb(struct dvb_frontend *fe, u8 *buf, 793static void simple_set_dvb(struct dvb_frontend *fe, u8 *buf,
783 const struct dvb_frontend_parameters *params) 794 const u32 delsys,
795 const u32 frequency,
796 const u32 bandwidth)
784{ 797{
785 struct tuner_simple_priv *priv = fe->tuner_priv; 798 struct tuner_simple_priv *priv = fe->tuner_priv;
786 799
787 switch (priv->type) { 800 switch (priv->type) {
788 case TUNER_PHILIPS_FMD1216ME_MK3: 801 case TUNER_PHILIPS_FMD1216ME_MK3:
789 case TUNER_PHILIPS_FMD1216MEX_MK3: 802 case TUNER_PHILIPS_FMD1216MEX_MK3:
790 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ && 803 if (bandwidth == 8000000 &&
791 params->frequency >= 158870000) 804 frequency >= 158870000)
792 buf[3] |= 0x08; 805 buf[3] |= 0x08;
793 break; 806 break;
794 case TUNER_PHILIPS_TD1316: 807 case TUNER_PHILIPS_TD1316:
795 /* determine band */ 808 /* determine band */
796 buf[3] |= (params->frequency < 161000000) ? 1 : 809 buf[3] |= (frequency < 161000000) ? 1 :
797 (params->frequency < 444000000) ? 2 : 4; 810 (frequency < 444000000) ? 2 : 4;
798 811
799 /* setup PLL filter */ 812 /* setup PLL filter */
800 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 813 if (bandwidth == 8000000)
801 buf[3] |= 1 << 3; 814 buf[3] |= 1 << 3;
802 break; 815 break;
803 case TUNER_PHILIPS_TUV1236D: 816 case TUNER_PHILIPS_TUV1236D:
@@ -808,12 +821,11 @@ static void simple_set_dvb(struct dvb_frontend *fe, u8 *buf,
808 if (dtv_input[priv->nr]) 821 if (dtv_input[priv->nr])
809 new_rf = dtv_input[priv->nr]; 822 new_rf = dtv_input[priv->nr];
810 else 823 else
811 switch (params->u.vsb.modulation) { 824 switch (delsys) {
812 case QAM_64: 825 case SYS_DVBC_ANNEX_B:
813 case QAM_256:
814 new_rf = 1; 826 new_rf = 1;
815 break; 827 break;
816 case VSB_8: 828 case SYS_ATSC:
817 default: 829 default:
818 new_rf = 0; 830 new_rf = 0;
819 break; 831 break;
@@ -827,7 +839,9 @@ static void simple_set_dvb(struct dvb_frontend *fe, u8 *buf,
827} 839}
828 840
829static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf, 841static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
830 const struct dvb_frontend_parameters *params) 842 const u32 delsys,
843 const u32 freq,
844 const u32 bw)
831{ 845{
832 /* This function returns the tuned frequency on success, 0 on error */ 846 /* This function returns the tuned frequency on success, 0 on error */
833 struct tuner_simple_priv *priv = fe->tuner_priv; 847 struct tuner_simple_priv *priv = fe->tuner_priv;
@@ -836,7 +850,7 @@ static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
836 u8 config, cb; 850 u8 config, cb;
837 u32 div; 851 u32 div;
838 int ret; 852 int ret;
839 unsigned frequency = params->frequency / 62500; 853 u32 frequency = freq / 62500;
840 854
841 if (!tun->stepsize) { 855 if (!tun->stepsize) {
842 /* tuner-core was loaded before the digital tuner was 856 /* tuner-core was loaded before the digital tuner was
@@ -860,7 +874,7 @@ static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
860 buf[2] = config; 874 buf[2] = config;
861 buf[3] = cb; 875 buf[3] = cb;
862 876
863 simple_set_dvb(fe, buf, params); 877 simple_set_dvb(fe, buf, delsys, freq, bw);
864 878
865 tuner_dbg("%s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", 879 tuner_dbg("%s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
866 tun->name, div, buf[0], buf[1], buf[2], buf[3]); 880 tun->name, div, buf[0], buf[1], buf[2], buf[3]);
@@ -870,32 +884,37 @@ static u32 simple_dvb_configure(struct dvb_frontend *fe, u8 *buf,
870} 884}
871 885
872static int simple_dvb_calc_regs(struct dvb_frontend *fe, 886static int simple_dvb_calc_regs(struct dvb_frontend *fe,
873 struct dvb_frontend_parameters *params,
874 u8 *buf, int buf_len) 887 u8 *buf, int buf_len)
875{ 888{
889 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
890 u32 delsys = c->delivery_system;
891 u32 bw = c->bandwidth_hz;
876 struct tuner_simple_priv *priv = fe->tuner_priv; 892 struct tuner_simple_priv *priv = fe->tuner_priv;
877 u32 frequency; 893 u32 frequency;
878 894
879 if (buf_len < 5) 895 if (buf_len < 5)
880 return -EINVAL; 896 return -EINVAL;
881 897
882 frequency = simple_dvb_configure(fe, buf+1, params); 898 frequency = simple_dvb_configure(fe, buf+1, delsys, c->frequency, bw);
883 if (frequency == 0) 899 if (frequency == 0)
884 return -EINVAL; 900 return -EINVAL;
885 901
886 buf[0] = priv->i2c_props.addr; 902 buf[0] = priv->i2c_props.addr;
887 903
888 priv->frequency = frequency; 904 priv->frequency = frequency;
889 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? 905 priv->bandwidth = c->bandwidth_hz;
890 params->u.ofdm.bandwidth : 0;
891 906
892 return 5; 907 return 5;
893} 908}
894 909
895static int simple_dvb_set_params(struct dvb_frontend *fe, 910static int simple_dvb_set_params(struct dvb_frontend *fe)
896 struct dvb_frontend_parameters *params)
897{ 911{
912 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
913 u32 delsys = c->delivery_system;
914 u32 bw = c->bandwidth_hz;
915 u32 freq = c->frequency;
898 struct tuner_simple_priv *priv = fe->tuner_priv; 916 struct tuner_simple_priv *priv = fe->tuner_priv;
917 u32 frequency;
899 u32 prev_freq, prev_bw; 918 u32 prev_freq, prev_bw;
900 int ret; 919 int ret;
901 u8 buf[5]; 920 u8 buf[5];
@@ -906,9 +925,14 @@ static int simple_dvb_set_params(struct dvb_frontend *fe,
906 prev_freq = priv->frequency; 925 prev_freq = priv->frequency;
907 prev_bw = priv->bandwidth; 926 prev_bw = priv->bandwidth;
908 927
909 ret = simple_dvb_calc_regs(fe, params, buf, 5); 928 frequency = simple_dvb_configure(fe, buf+1, delsys, freq, bw);
910 if (ret != 5) 929 if (frequency == 0)
911 goto fail; 930 return -EINVAL;
931
932 buf[0] = priv->i2c_props.addr;
933
934 priv->frequency = frequency;
935 priv->bandwidth = bw;
912 936
913 /* put analog demod in standby when tuning digital */ 937 /* put analog demod in standby when tuning digital */
914 if (fe->ops.analog_ops.standby) 938 if (fe->ops.analog_ops.standby)
diff --git a/drivers/media/common/tuners/tuner-xc2028.c b/drivers/media/common/tuners/tuner-xc2028.c
index 3acbaa04e1b..27555995f7e 100644
--- a/drivers/media/common/tuners/tuner-xc2028.c
+++ b/drivers/media/common/tuners/tuner-xc2028.c
@@ -311,7 +311,7 @@ static int load_all_firmwares(struct dvb_frontend *fe)
311 n_array, fname, name, 311 n_array, fname, name,
312 priv->firm_version >> 8, priv->firm_version & 0xff); 312 priv->firm_version >> 8, priv->firm_version & 0xff);
313 313
314 priv->firm = kzalloc(sizeof(*priv->firm) * n_array, GFP_KERNEL); 314 priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
315 if (priv->firm == NULL) { 315 if (priv->firm == NULL) {
316 tuner_err("Not enough memory to load firmware file.\n"); 316 tuner_err("Not enough memory to load firmware file.\n");
317 rc = -ENOMEM; 317 rc = -ENOMEM;
@@ -891,7 +891,7 @@ static int xc2028_signal(struct dvb_frontend *fe, u16 *strength)
891 891
892 /* Frequency is locked */ 892 /* Frequency is locked */
893 if (frq_lock == 1) 893 if (frq_lock == 1)
894 signal = 32768; 894 signal = 1 << 11;
895 895
896 /* Get SNR of the video signal */ 896 /* Get SNR of the video signal */
897 rc = xc2028_get_reg(priv, 0x0040, &signal); 897 rc = xc2028_get_reg(priv, 0x0040, &signal);
@@ -962,14 +962,24 @@ static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
962 * For DTV 7/8, the firmware uses BW = 8000, so it needs a 962 * For DTV 7/8, the firmware uses BW = 8000, so it needs a
963 * further adjustment to get the frequency center on VHF 963 * further adjustment to get the frequency center on VHF
964 */ 964 */
965
966 /*
967 * The firmware DTV78 used to work fine in UHF band (8 MHz
968 * bandwidth) but not at all in VHF band (7 MHz bandwidth).
969 * The real problem was connected to the formula used to
970 * calculate the center frequency offset in VHF band.
971 * In fact, removing the 500KHz adjustment fixed the problem.
972 * This is coherent to what was implemented for the DTV7
973 * firmware.
974 * In the end, now the center frequency is the same for all 3
975 * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel
976 * bandwidth.
977 */
978
965 if (priv->cur_fw.type & DTV6) 979 if (priv->cur_fw.type & DTV6)
966 offset = 1750000; 980 offset = 1750000;
967 else if (priv->cur_fw.type & DTV7) 981 else /* DTV7 or DTV8 or DTV78 */
968 offset = 2250000;
969 else /* DTV8 or DTV78 */
970 offset = 2750000; 982 offset = 2750000;
971 if ((priv->cur_fw.type & DTV78) && freq < 470000000)
972 offset -= 500000;
973 983
974 /* 984 /*
975 * xc3028 additional "magic" 985 * xc3028 additional "magic"
@@ -979,17 +989,13 @@ static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
979 * newer firmwares 989 * newer firmwares
980 */ 990 */
981 991
982#if 1
983 /* 992 /*
984 * The proper adjustment would be to do it at s-code table. 993 * The proper adjustment would be to do it at s-code table.
985 * However, this didn't work, as reported by 994 * However, this didn't work, as reported by
986 * Robert Lowery <rglowery@exemail.com.au> 995 * Robert Lowery <rglowery@exemail.com.au>
987 */ 996 */
988 997
989 if (priv->cur_fw.type & DTV7) 998#if 0
990 offset += 500000;
991
992#else
993 /* 999 /*
994 * Still need tests for XC3028L (firmware 3.2 or upper) 1000 * Still need tests for XC3028L (firmware 3.2 or upper)
995 * So, for now, let's just comment the per-firmware 1001 * So, for now, let's just comment the per-firmware
@@ -1084,68 +1090,28 @@ static int xc2028_set_analog_freq(struct dvb_frontend *fe,
1084 V4L2_TUNER_ANALOG_TV, type, p->std, 0); 1090 V4L2_TUNER_ANALOG_TV, type, p->std, 0);
1085} 1091}
1086 1092
1087static int xc2028_set_params(struct dvb_frontend *fe, 1093static int xc2028_set_params(struct dvb_frontend *fe)
1088 struct dvb_frontend_parameters *p)
1089{ 1094{
1095 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1096 u32 delsys = c->delivery_system;
1097 u32 bw = c->bandwidth_hz;
1090 struct xc2028_data *priv = fe->tuner_priv; 1098 struct xc2028_data *priv = fe->tuner_priv;
1091 unsigned int type=0; 1099 unsigned int type=0;
1092 fe_bandwidth_t bw = BANDWIDTH_8_MHZ;
1093 u16 demod = 0; 1100 u16 demod = 0;
1094 1101
1095 tuner_dbg("%s called\n", __func__); 1102 tuner_dbg("%s called\n", __func__);
1096 1103
1097 switch(fe->ops.info.type) { 1104 switch (delsys) {
1098 case FE_OFDM: 1105 case SYS_DVBT:
1099 bw = p->u.ofdm.bandwidth; 1106 case SYS_DVBT2:
1100 /* 1107 /*
1101 * The only countries with 6MHz seem to be Taiwan/Uruguay. 1108 * The only countries with 6MHz seem to be Taiwan/Uruguay.
1102 * Both seem to require QAM firmware for OFDM decoding 1109 * Both seem to require QAM firmware for OFDM decoding
1103 * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com> 1110 * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com>
1104 */ 1111 */
1105 if (bw == BANDWIDTH_6_MHZ) 1112 if (bw <= 6000000)
1106 type |= QAM; 1113 type |= QAM;
1107 break;
1108 case FE_ATSC:
1109 bw = BANDWIDTH_6_MHZ;
1110 /* The only ATSC firmware (at least on v2.7) is D2633 */
1111 type |= ATSC | D2633;
1112 break;
1113 /* DVB-S and pure QAM (FE_QAM) are not supported */
1114 default:
1115 return -EINVAL;
1116 }
1117
1118 switch (bw) {
1119 case BANDWIDTH_8_MHZ:
1120 if (p->frequency < 470000000)
1121 priv->ctrl.vhfbw7 = 0;
1122 else
1123 priv->ctrl.uhfbw8 = 1;
1124 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8;
1125 type |= F8MHZ;
1126 break;
1127 case BANDWIDTH_7_MHZ:
1128 if (p->frequency < 470000000)
1129 priv->ctrl.vhfbw7 = 1;
1130 else
1131 priv->ctrl.uhfbw8 = 0;
1132 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7;
1133 type |= F8MHZ;
1134 break;
1135 case BANDWIDTH_6_MHZ:
1136 type |= DTV6;
1137 priv->ctrl.vhfbw7 = 0;
1138 priv->ctrl.uhfbw8 = 0;
1139 break;
1140 default:
1141 tuner_err("error: bandwidth not supported.\n");
1142 };
1143 1114
1144 /*
1145 Selects between D2633 or D2620 firmware.
1146 It doesn't make sense for ATSC, since it should be D2633 on all cases
1147 */
1148 if (fe->ops.info.type != FE_ATSC) {
1149 switch (priv->ctrl.type) { 1115 switch (priv->ctrl.type) {
1150 case XC2028_D2633: 1116 case XC2028_D2633:
1151 type |= D2633; 1117 type |= D2633;
@@ -1161,6 +1127,34 @@ static int xc2028_set_params(struct dvb_frontend *fe,
1161 else 1127 else
1162 type |= D2620; 1128 type |= D2620;
1163 } 1129 }
1130 break;
1131 case SYS_ATSC:
1132 /* The only ATSC firmware (at least on v2.7) is D2633 */
1133 type |= ATSC | D2633;
1134 break;
1135 /* DVB-S and pure QAM (FE_QAM) are not supported */
1136 default:
1137 return -EINVAL;
1138 }
1139
1140 if (bw <= 6000000) {
1141 type |= DTV6;
1142 priv->ctrl.vhfbw7 = 0;
1143 priv->ctrl.uhfbw8 = 0;
1144 } else if (bw <= 7000000) {
1145 if (c->frequency < 470000000)
1146 priv->ctrl.vhfbw7 = 1;
1147 else
1148 priv->ctrl.uhfbw8 = 0;
1149 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7;
1150 type |= F8MHZ;
1151 } else {
1152 if (c->frequency < 470000000)
1153 priv->ctrl.vhfbw7 = 0;
1154 else
1155 priv->ctrl.uhfbw8 = 1;
1156 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8;
1157 type |= F8MHZ;
1164 } 1158 }
1165 1159
1166 /* All S-code tables need a 200kHz shift */ 1160 /* All S-code tables need a 200kHz shift */
@@ -1185,7 +1179,7 @@ static int xc2028_set_params(struct dvb_frontend *fe,
1185 */ 1179 */
1186 } 1180 }
1187 1181
1188 return generic_set_freq(fe, p->frequency, 1182 return generic_set_freq(fe, c->frequency,
1189 V4L2_TUNER_DIGITAL_TV, type, 0, demod); 1183 V4L2_TUNER_DIGITAL_TV, type, 0, demod);
1190} 1184}
1191 1185
diff --git a/drivers/media/common/tuners/xc4000.c b/drivers/media/common/tuners/xc4000.c
index 634f4d9b6c6..d218c1d68c3 100644
--- a/drivers/media/common/tuners/xc4000.c
+++ b/drivers/media/common/tuners/xc4000.c
@@ -758,7 +758,7 @@ static int xc4000_fwupload(struct dvb_frontend *fe)
758 n_array, fname, name, 758 n_array, fname, name,
759 priv->firm_version >> 8, priv->firm_version & 0xff); 759 priv->firm_version >> 8, priv->firm_version & 0xff);
760 760
761 priv->firm = kzalloc(sizeof(*priv->firm) * n_array, GFP_KERNEL); 761 priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
762 if (priv->firm == NULL) { 762 if (priv->firm == NULL) {
763 printk(KERN_ERR "Not enough memory to load firmware file.\n"); 763 printk(KERN_ERR "Not enough memory to load firmware file.\n");
764 rc = -ENOMEM; 764 rc = -ENOMEM;
@@ -1121,83 +1121,62 @@ static void xc_debug_dump(struct xc4000_priv *priv)
1121 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality); 1121 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality);
1122} 1122}
1123 1123
1124static int xc4000_set_params(struct dvb_frontend *fe, 1124static int xc4000_set_params(struct dvb_frontend *fe)
1125 struct dvb_frontend_parameters *params)
1126{ 1125{
1126 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1127 u32 delsys = c->delivery_system;
1128 u32 bw = c->bandwidth_hz;
1127 struct xc4000_priv *priv = fe->tuner_priv; 1129 struct xc4000_priv *priv = fe->tuner_priv;
1128 unsigned int type; 1130 unsigned int type;
1129 int ret = -EREMOTEIO; 1131 int ret = -EREMOTEIO;
1130 1132
1131 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, params->frequency); 1133 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, c->frequency);
1132 1134
1133 mutex_lock(&priv->lock); 1135 mutex_lock(&priv->lock);
1134 1136
1135 if (fe->ops.info.type == FE_ATSC) { 1137 switch (delsys) {
1136 dprintk(1, "%s() ATSC\n", __func__); 1138 case SYS_ATSC:
1137 switch (params->u.vsb.modulation) { 1139 dprintk(1, "%s() VSB modulation\n", __func__);
1138 case VSB_8: 1140 priv->rf_mode = XC_RF_MODE_AIR;
1139 case VSB_16: 1141 priv->freq_hz = c->frequency - 1750000;
1140 dprintk(1, "%s() VSB modulation\n", __func__); 1142 priv->video_standard = XC4000_DTV6;
1141 priv->rf_mode = XC_RF_MODE_AIR; 1143 type = DTV6;
1142 priv->freq_hz = params->frequency - 1750000; 1144 break;
1143 priv->bandwidth = BANDWIDTH_6_MHZ; 1145 case SYS_DVBC_ANNEX_B:
1144 priv->video_standard = XC4000_DTV6; 1146 dprintk(1, "%s() QAM modulation\n", __func__);
1145 type = DTV6; 1147 priv->rf_mode = XC_RF_MODE_CABLE;
1146 break; 1148 priv->freq_hz = c->frequency - 1750000;
1147 case QAM_64: 1149 priv->video_standard = XC4000_DTV6;
1148 case QAM_256: 1150 type = DTV6;
1149 case QAM_AUTO: 1151 break;
1150 dprintk(1, "%s() QAM modulation\n", __func__); 1152 case SYS_DVBT:
1151 priv->rf_mode = XC_RF_MODE_CABLE; 1153 case SYS_DVBT2:
1152 priv->freq_hz = params->frequency - 1750000;
1153 priv->bandwidth = BANDWIDTH_6_MHZ;
1154 priv->video_standard = XC4000_DTV6;
1155 type = DTV6;
1156 break;
1157 default:
1158 ret = -EINVAL;
1159 goto fail;
1160 }
1161 } else if (fe->ops.info.type == FE_OFDM) {
1162 dprintk(1, "%s() OFDM\n", __func__); 1154 dprintk(1, "%s() OFDM\n", __func__);
1163 switch (params->u.ofdm.bandwidth) { 1155 if (bw == 0) {
1164 case BANDWIDTH_6_MHZ: 1156 if (c->frequency < 400000000) {
1165 priv->bandwidth = BANDWIDTH_6_MHZ; 1157 priv->freq_hz = c->frequency - 2250000;
1158 } else {
1159 priv->freq_hz = c->frequency - 2750000;
1160 }
1161 priv->video_standard = XC4000_DTV7_8;
1162 type = DTV78;
1163 } else if (bw <= 6000000) {
1166 priv->video_standard = XC4000_DTV6; 1164 priv->video_standard = XC4000_DTV6;
1167 priv->freq_hz = params->frequency - 1750000; 1165 priv->freq_hz = c->frequency - 1750000;
1168 type = DTV6; 1166 type = DTV6;
1169 break; 1167 } else if (bw <= 7000000) {
1170 case BANDWIDTH_7_MHZ:
1171 priv->bandwidth = BANDWIDTH_7_MHZ;
1172 priv->video_standard = XC4000_DTV7; 1168 priv->video_standard = XC4000_DTV7;
1173 priv->freq_hz = params->frequency - 2250000; 1169 priv->freq_hz = c->frequency - 2250000;
1174 type = DTV7; 1170 type = DTV7;
1175 break; 1171 } else {
1176 case BANDWIDTH_8_MHZ:
1177 priv->bandwidth = BANDWIDTH_8_MHZ;
1178 priv->video_standard = XC4000_DTV8; 1172 priv->video_standard = XC4000_DTV8;
1179 priv->freq_hz = params->frequency - 2750000; 1173 priv->freq_hz = c->frequency - 2750000;
1180 type = DTV8; 1174 type = DTV8;
1181 break;
1182 case BANDWIDTH_AUTO:
1183 if (params->frequency < 400000000) {
1184 priv->bandwidth = BANDWIDTH_7_MHZ;
1185 priv->freq_hz = params->frequency - 2250000;
1186 } else {
1187 priv->bandwidth = BANDWIDTH_8_MHZ;
1188 priv->freq_hz = params->frequency - 2750000;
1189 }
1190 priv->video_standard = XC4000_DTV7_8;
1191 type = DTV78;
1192 break;
1193 default:
1194 printk(KERN_ERR "xc4000 bandwidth not set!\n");
1195 ret = -EINVAL;
1196 goto fail;
1197 } 1175 }
1198 priv->rf_mode = XC_RF_MODE_AIR; 1176 priv->rf_mode = XC_RF_MODE_AIR;
1199 } else { 1177 break;
1200 printk(KERN_ERR "xc4000 modulation type not supported!\n"); 1178 default:
1179 printk(KERN_ERR "xc4000 delivery system not supported!\n");
1201 ret = -EINVAL; 1180 ret = -EINVAL;
1202 goto fail; 1181 goto fail;
1203 } 1182 }
@@ -1209,6 +1188,8 @@ static int xc4000_set_params(struct dvb_frontend *fe,
1209 if (check_firmware(fe, type, 0, priv->if_khz) != 0) 1188 if (check_firmware(fe, type, 0, priv->if_khz) != 0)
1210 goto fail; 1189 goto fail;
1211 1190
1191 priv->bandwidth = c->bandwidth_hz;
1192
1212 ret = xc_set_signal_source(priv, priv->rf_mode); 1193 ret = xc_set_signal_source(priv, priv->rf_mode);
1213 if (ret != 0) { 1194 if (ret != 0) {
1214 printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n", 1195 printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n",
@@ -1605,7 +1586,7 @@ struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe,
1605 break; 1586 break;
1606 case 1: 1587 case 1:
1607 /* new tuner instance */ 1588 /* new tuner instance */
1608 priv->bandwidth = BANDWIDTH_6_MHZ; 1589 priv->bandwidth = 6000000;
1609 /* set default configuration */ 1590 /* set default configuration */
1610 priv->if_khz = 4560; 1591 priv->if_khz = 4560;
1611 priv->default_pm = 0; 1592 priv->default_pm = 0;
diff --git a/drivers/media/common/tuners/xc5000.c b/drivers/media/common/tuners/xc5000.c
index aa1b2e844d3..296df05b8cd 100644
--- a/drivers/media/common/tuners/xc5000.c
+++ b/drivers/media/common/tuners/xc5000.c
@@ -628,20 +628,13 @@ static void xc_debug_dump(struct xc5000_priv *priv)
628 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality); 628 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality);
629} 629}
630 630
631/* 631static int xc5000_set_params(struct dvb_frontend *fe)
632 * As defined on EN 300 429, the DVB-C roll-off factor is 0.15.
633 * So, the amount of the needed bandwith is given by:
634 * Bw = Symbol_rate * (1 + 0.15)
635 * As such, the maximum symbol rate supported by 6 MHz is given by:
636 * max_symbol_rate = 6 MHz / 1.15 = 5217391 Bauds
637 */
638#define MAX_SYMBOL_RATE_6MHz 5217391
639
640static int xc5000_set_params(struct dvb_frontend *fe,
641 struct dvb_frontend_parameters *params)
642{ 632{
633 int ret, b;
643 struct xc5000_priv *priv = fe->tuner_priv; 634 struct xc5000_priv *priv = fe->tuner_priv;
644 int ret; 635 u32 bw = fe->dtv_property_cache.bandwidth_hz;
636 u32 freq = fe->dtv_property_cache.frequency;
637 u32 delsys = fe->dtv_property_cache.delivery_system;
645 638
646 if (xc5000_is_firmware_loaded(fe) != XC_RESULT_SUCCESS) { 639 if (xc5000_is_firmware_loaded(fe) != XC_RESULT_SUCCESS) {
647 if (xc_load_fw_and_init_tuner(fe) != XC_RESULT_SUCCESS) { 640 if (xc_load_fw_and_init_tuner(fe) != XC_RESULT_SUCCESS) {
@@ -650,88 +643,69 @@ static int xc5000_set_params(struct dvb_frontend *fe,
650 } 643 }
651 } 644 }
652 645
653 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, params->frequency); 646 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
654 647
655 if (fe->ops.info.type == FE_ATSC) { 648 switch (delsys) {
656 dprintk(1, "%s() ATSC\n", __func__); 649 case SYS_ATSC:
657 switch (params->u.vsb.modulation) { 650 dprintk(1, "%s() VSB modulation\n", __func__);
658 case VSB_8: 651 priv->rf_mode = XC_RF_MODE_AIR;
659 case VSB_16: 652 priv->freq_hz = freq - 1750000;
660 dprintk(1, "%s() VSB modulation\n", __func__); 653 priv->video_standard = DTV6;
661 priv->rf_mode = XC_RF_MODE_AIR; 654 break;
662 priv->freq_hz = params->frequency - 1750000; 655 case SYS_DVBC_ANNEX_B:
663 priv->bandwidth = BANDWIDTH_6_MHZ; 656 dprintk(1, "%s() QAM modulation\n", __func__);
664 priv->video_standard = DTV6; 657 priv->rf_mode = XC_RF_MODE_CABLE;
665 break; 658 priv->freq_hz = freq - 1750000;
666 case QAM_64: 659 priv->video_standard = DTV6;
667 case QAM_256: 660 break;
668 case QAM_AUTO: 661 case SYS_DVBT:
669 dprintk(1, "%s() QAM modulation\n", __func__); 662 case SYS_DVBT2:
670 priv->rf_mode = XC_RF_MODE_CABLE;
671 priv->freq_hz = params->frequency - 1750000;
672 priv->bandwidth = BANDWIDTH_6_MHZ;
673 priv->video_standard = DTV6;
674 break;
675 default:
676 return -EINVAL;
677 }
678 } else if (fe->ops.info.type == FE_OFDM) {
679 dprintk(1, "%s() OFDM\n", __func__); 663 dprintk(1, "%s() OFDM\n", __func__);
680 switch (params->u.ofdm.bandwidth) { 664 switch (bw) {
681 case BANDWIDTH_6_MHZ: 665 case 6000000:
682 priv->bandwidth = BANDWIDTH_6_MHZ;
683 priv->video_standard = DTV6; 666 priv->video_standard = DTV6;
684 priv->freq_hz = params->frequency - 1750000; 667 priv->freq_hz = freq - 1750000;
685 break; 668 break;
686 case BANDWIDTH_7_MHZ: 669 case 7000000:
687 printk(KERN_ERR "xc5000 bandwidth 7MHz not supported\n"); 670 priv->video_standard = DTV7;
688 return -EINVAL; 671 priv->freq_hz = freq - 2250000;
689 case BANDWIDTH_8_MHZ: 672 break;
690 priv->bandwidth = BANDWIDTH_8_MHZ; 673 case 8000000:
691 priv->video_standard = DTV8; 674 priv->video_standard = DTV8;
692 priv->freq_hz = params->frequency - 2750000; 675 priv->freq_hz = freq - 2750000;
693 break; 676 break;
694 default: 677 default:
695 printk(KERN_ERR "xc5000 bandwidth not set!\n"); 678 printk(KERN_ERR "xc5000 bandwidth not set!\n");
696 return -EINVAL; 679 return -EINVAL;
697 } 680 }
698 priv->rf_mode = XC_RF_MODE_AIR; 681 priv->rf_mode = XC_RF_MODE_AIR;
699 } else if (fe->ops.info.type == FE_QAM) { 682 case SYS_DVBC_ANNEX_A:
700 switch (params->u.qam.modulation) { 683 case SYS_DVBC_ANNEX_C:
701 case QAM_256: 684 dprintk(1, "%s() QAM modulation\n", __func__);
702 case QAM_AUTO: 685 priv->rf_mode = XC_RF_MODE_CABLE;
703 case QAM_16: 686 if (bw <= 6000000) {
704 case QAM_32: 687 priv->video_standard = DTV6;
705 case QAM_64: 688 priv->freq_hz = freq - 1750000;
706 case QAM_128: 689 b = 6;
707 dprintk(1, "%s() QAM modulation\n", __func__); 690 } else if (bw <= 7000000) {
708 priv->rf_mode = XC_RF_MODE_CABLE; 691 priv->video_standard = DTV7;
709 /* 692 priv->freq_hz = freq - 2250000;
710 * Using a 8MHz bandwidth sometimes fail 693 b = 7;
711 * with 6MHz-spaced channels, due to inter-carrier 694 } else {
712 * interference. So, use DTV6 firmware 695 priv->video_standard = DTV7_8;
713 */ 696 priv->freq_hz = freq - 2750000;
714 if (params->u.qam.symbol_rate <= MAX_SYMBOL_RATE_6MHz) { 697 b = 8;
715 priv->bandwidth = BANDWIDTH_6_MHZ;
716 priv->video_standard = DTV6;
717 priv->freq_hz = params->frequency - 1750000;
718 } else {
719 priv->bandwidth = BANDWIDTH_8_MHZ;
720 priv->video_standard = DTV7_8;
721 priv->freq_hz = params->frequency - 2750000;
722 }
723 break;
724 default:
725 dprintk(1, "%s() Unsupported QAM type\n", __func__);
726 return -EINVAL;
727 } 698 }
728 } else { 699 dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
729 printk(KERN_ERR "xc5000 modulation type not supported!\n"); 700 b, bw);
701 break;
702 default:
703 printk(KERN_ERR "xc5000: delivery system is not supported!\n");
730 return -EINVAL; 704 return -EINVAL;
731 } 705 }
732 706
733 dprintk(1, "%s() frequency=%d (compensated)\n", 707 dprintk(1, "%s() frequency=%d (compensated to %d)\n",
734 __func__, priv->freq_hz); 708 __func__, freq, priv->freq_hz);
735 709
736 ret = xc_SetSignalSource(priv, priv->rf_mode); 710 ret = xc_SetSignalSource(priv, priv->rf_mode);
737 if (ret != XC_RESULT_SUCCESS) { 711 if (ret != XC_RESULT_SUCCESS) {
@@ -763,6 +737,8 @@ static int xc5000_set_params(struct dvb_frontend *fe,
763 if (debug) 737 if (debug)
764 xc_debug_dump(priv); 738 xc_debug_dump(priv);
765 739
740 priv->bandwidth = bw;
741
766 return 0; 742 return 0;
767} 743}
768 744
@@ -968,6 +944,14 @@ static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
968 return 0; 944 return 0;
969} 945}
970 946
947static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
948{
949 struct xc5000_priv *priv = fe->tuner_priv;
950 dprintk(1, "%s()\n", __func__);
951 *freq = priv->if_khz * 1000;
952 return 0;
953}
954
971static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) 955static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
972{ 956{
973 struct xc5000_priv *priv = fe->tuner_priv; 957 struct xc5000_priv *priv = fe->tuner_priv;
@@ -1108,6 +1092,7 @@ static const struct dvb_tuner_ops xc5000_tuner_ops = {
1108 .set_params = xc5000_set_params, 1092 .set_params = xc5000_set_params,
1109 .set_analog_params = xc5000_set_analog_params, 1093 .set_analog_params = xc5000_set_analog_params,
1110 .get_frequency = xc5000_get_frequency, 1094 .get_frequency = xc5000_get_frequency,
1095 .get_if_frequency = xc5000_get_if_frequency,
1111 .get_bandwidth = xc5000_get_bandwidth, 1096 .get_bandwidth = xc5000_get_bandwidth,
1112 .get_status = xc5000_get_status 1097 .get_status = xc5000_get_status
1113}; 1098};
@@ -1135,7 +1120,7 @@ struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
1135 break; 1120 break;
1136 case 1: 1121 case 1:
1137 /* new tuner instance */ 1122 /* new tuner instance */
1138 priv->bandwidth = BANDWIDTH_6_MHZ; 1123 priv->bandwidth = 6000000;
1139 fe->tuner_priv = priv; 1124 fe->tuner_priv = priv;
1140 break; 1125 break;
1141 default: 1126 default:
diff --git a/drivers/media/dvb/b2c2/flexcop.c b/drivers/media/dvb/b2c2/flexcop.c
index 2df1b0214dc..b1e8c99f469 100644
--- a/drivers/media/dvb/b2c2/flexcop.c
+++ b/drivers/media/dvb/b2c2/flexcop.c
@@ -86,7 +86,8 @@ static int flexcop_dvb_init(struct flexcop_device *fc)
86 fc->demux.stop_feed = flexcop_dvb_stop_feed; 86 fc->demux.stop_feed = flexcop_dvb_stop_feed;
87 fc->demux.write_to_decoder = NULL; 87 fc->demux.write_to_decoder = NULL;
88 88
89 if ((ret = dvb_dmx_init(&fc->demux)) < 0) { 89 ret = dvb_dmx_init(&fc->demux);
90 if (ret < 0) {
90 err("dvb_dmx failed: error %d", ret); 91 err("dvb_dmx failed: error %d", ret);
91 goto err_dmx; 92 goto err_dmx;
92 } 93 }
@@ -96,32 +97,42 @@ static int flexcop_dvb_init(struct flexcop_device *fc)
96 fc->dmxdev.filternum = fc->demux.feednum; 97 fc->dmxdev.filternum = fc->demux.feednum;
97 fc->dmxdev.demux = &fc->demux.dmx; 98 fc->dmxdev.demux = &fc->demux.dmx;
98 fc->dmxdev.capabilities = 0; 99 fc->dmxdev.capabilities = 0;
99 if ((ret = dvb_dmxdev_init(&fc->dmxdev, &fc->dvb_adapter)) < 0) { 100 ret = dvb_dmxdev_init(&fc->dmxdev, &fc->dvb_adapter);
101 if (ret < 0) {
100 err("dvb_dmxdev_init failed: error %d", ret); 102 err("dvb_dmxdev_init failed: error %d", ret);
101 goto err_dmx_dev; 103 goto err_dmx_dev;
102 } 104 }
103 105
104 if ((ret = fc->demux.dmx.add_frontend(&fc->demux.dmx, &fc->hw_frontend)) < 0) { 106 ret = fc->demux.dmx.add_frontend(&fc->demux.dmx, &fc->hw_frontend);
107 if (ret < 0) {
105 err("adding hw_frontend to dmx failed: error %d", ret); 108 err("adding hw_frontend to dmx failed: error %d", ret);
106 goto err_dmx_add_hw_frontend; 109 goto err_dmx_add_hw_frontend;
107 } 110 }
108 111
109 fc->mem_frontend.source = DMX_MEMORY_FE; 112 fc->mem_frontend.source = DMX_MEMORY_FE;
110 if ((ret = fc->demux.dmx.add_frontend(&fc->demux.dmx, &fc->mem_frontend)) < 0) { 113 ret = fc->demux.dmx.add_frontend(&fc->demux.dmx, &fc->mem_frontend);
114 if (ret < 0) {
111 err("adding mem_frontend to dmx failed: error %d", ret); 115 err("adding mem_frontend to dmx failed: error %d", ret);
112 goto err_dmx_add_mem_frontend; 116 goto err_dmx_add_mem_frontend;
113 } 117 }
114 118
115 if ((ret = fc->demux.dmx.connect_frontend(&fc->demux.dmx, &fc->hw_frontend)) < 0) { 119 ret = fc->demux.dmx.connect_frontend(&fc->demux.dmx, &fc->hw_frontend);
120 if (ret < 0) {
116 err("connect frontend failed: error %d", ret); 121 err("connect frontend failed: error %d", ret);
117 goto err_connect_frontend; 122 goto err_connect_frontend;
118 } 123 }
119 124
120 dvb_net_init(&fc->dvb_adapter, &fc->dvbnet, &fc->demux.dmx); 125 ret = dvb_net_init(&fc->dvb_adapter, &fc->dvbnet, &fc->demux.dmx);
126 if (ret < 0) {
127 err("dvb_net_init failed: error %d", ret);
128 goto err_net;
129 }
121 130
122 fc->init_state |= FC_STATE_DVB_INIT; 131 fc->init_state |= FC_STATE_DVB_INIT;
123 return 0; 132 return 0;
124 133
134err_net:
135 fc->demux.dmx.disconnect_frontend(&fc->demux.dmx);
125err_connect_frontend: 136err_connect_frontend:
126 fc->demux.dmx.remove_frontend(&fc->demux.dmx, &fc->mem_frontend); 137 fc->demux.dmx.remove_frontend(&fc->demux.dmx, &fc->mem_frontend);
127err_dmx_add_mem_frontend: 138err_dmx_add_mem_frontend:
@@ -254,7 +265,8 @@ int flexcop_device_initialize(struct flexcop_device *fc)
254 flexcop_hw_filter_init(fc); 265 flexcop_hw_filter_init(fc);
255 flexcop_smc_ctrl(fc, 0); 266 flexcop_smc_ctrl(fc, 0);
256 267
257 if ((ret = flexcop_dvb_init(fc))) 268 ret = flexcop_dvb_init(fc);
269 if (ret)
258 goto error; 270 goto error;
259 271
260 /* i2c has to be done before doing EEProm stuff - 272 /* i2c has to be done before doing EEProm stuff -
@@ -272,7 +284,8 @@ int flexcop_device_initialize(struct flexcop_device *fc)
272 } else 284 } else
273 warn("reading of MAC address failed.\n"); 285 warn("reading of MAC address failed.\n");
274 286
275 if ((ret = flexcop_frontend_init(fc))) 287 ret = flexcop_frontend_init(fc);
288 if (ret)
276 goto error; 289 goto error;
277 290
278 flexcop_device_name(fc,"initialization of","complete"); 291 flexcop_device_name(fc,"initialization of","complete");
diff --git a/drivers/media/dvb/bt8xx/dst.c b/drivers/media/dvb/bt8xx/dst.c
index caa4e18ed1c..430b3eb1181 100644
--- a/drivers/media/dvb/bt8xx/dst.c
+++ b/drivers/media/dvb/bt8xx/dst.c
@@ -386,7 +386,7 @@ static int dst_set_freq(struct dst_state *state, u32 freq)
386 return 0; 386 return 0;
387} 387}
388 388
389static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth) 389static int dst_set_bandwidth(struct dst_state *state, u32 bandwidth)
390{ 390{
391 state->bandwidth = bandwidth; 391 state->bandwidth = bandwidth;
392 392
@@ -394,7 +394,7 @@ static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth)
394 return -EOPNOTSUPP; 394 return -EOPNOTSUPP;
395 395
396 switch (bandwidth) { 396 switch (bandwidth) {
397 case BANDWIDTH_6_MHZ: 397 case 6000000:
398 if (state->dst_hw_cap & DST_TYPE_HAS_CA) 398 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
399 state->tx_tuna[7] = 0x06; 399 state->tx_tuna[7] = 0x06;
400 else { 400 else {
@@ -402,7 +402,7 @@ static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth)
402 state->tx_tuna[7] = 0x00; 402 state->tx_tuna[7] = 0x00;
403 } 403 }
404 break; 404 break;
405 case BANDWIDTH_7_MHZ: 405 case 7000000:
406 if (state->dst_hw_cap & DST_TYPE_HAS_CA) 406 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
407 state->tx_tuna[7] = 0x07; 407 state->tx_tuna[7] = 0x07;
408 else { 408 else {
@@ -410,7 +410,7 @@ static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth)
410 state->tx_tuna[7] = 0x00; 410 state->tx_tuna[7] = 0x00;
411 } 411 }
412 break; 412 break;
413 case BANDWIDTH_8_MHZ: 413 case 8000000:
414 if (state->dst_hw_cap & DST_TYPE_HAS_CA) 414 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
415 state->tx_tuna[7] = 0x08; 415 state->tx_tuna[7] = 0x08;
416 else { 416 else {
@@ -1561,7 +1561,7 @@ static int dst_init(struct dvb_frontend *fe)
1561 state->tone = SEC_TONE_OFF; 1561 state->tone = SEC_TONE_OFF;
1562 state->diseq_flags = 0; 1562 state->diseq_flags = 0;
1563 state->k22 = 0x02; 1563 state->k22 = 0x02;
1564 state->bandwidth = BANDWIDTH_7_MHZ; 1564 state->bandwidth = 7000000;
1565 state->cur_jiff = jiffies; 1565 state->cur_jiff = jiffies;
1566 if (state->dst_type == DST_TYPE_IS_SAT) 1566 if (state->dst_type == DST_TYPE_IS_SAT)
1567 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204)); 1567 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
@@ -1609,8 +1609,9 @@ static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
1609 return retval; 1609 return retval;
1610} 1610}
1611 1611
1612static int dst_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 1612static int dst_set_frontend(struct dvb_frontend *fe)
1613{ 1613{
1614 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1614 int retval = -EINVAL; 1615 int retval = -EINVAL;
1615 struct dst_state *state = fe->demodulator_priv; 1616 struct dst_state *state = fe->demodulator_priv;
1616 1617
@@ -1623,17 +1624,17 @@ static int dst_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_paramet
1623 if (state->dst_type == DST_TYPE_IS_SAT) { 1624 if (state->dst_type == DST_TYPE_IS_SAT) {
1624 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) 1625 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1625 dst_set_inversion(state, p->inversion); 1626 dst_set_inversion(state, p->inversion);
1626 dst_set_fec(state, p->u.qpsk.fec_inner); 1627 dst_set_fec(state, p->fec_inner);
1627 dst_set_symbolrate(state, p->u.qpsk.symbol_rate); 1628 dst_set_symbolrate(state, p->symbol_rate);
1628 dst_set_polarization(state); 1629 dst_set_polarization(state);
1629 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate); 1630 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->symbol_rate);
1630 1631
1631 } else if (state->dst_type == DST_TYPE_IS_TERR) 1632 } else if (state->dst_type == DST_TYPE_IS_TERR)
1632 dst_set_bandwidth(state, p->u.ofdm.bandwidth); 1633 dst_set_bandwidth(state, p->bandwidth_hz);
1633 else if (state->dst_type == DST_TYPE_IS_CABLE) { 1634 else if (state->dst_type == DST_TYPE_IS_CABLE) {
1634 dst_set_fec(state, p->u.qam.fec_inner); 1635 dst_set_fec(state, p->fec_inner);
1635 dst_set_symbolrate(state, p->u.qam.symbol_rate); 1636 dst_set_symbolrate(state, p->symbol_rate);
1636 dst_set_modulation(state, p->u.qam.modulation); 1637 dst_set_modulation(state, p->modulation);
1637 } 1638 }
1638 retval = dst_write_tuna(fe); 1639 retval = dst_write_tuna(fe);
1639 } 1640 }
@@ -1642,31 +1643,32 @@ static int dst_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_paramet
1642} 1643}
1643 1644
1644static int dst_tune_frontend(struct dvb_frontend* fe, 1645static int dst_tune_frontend(struct dvb_frontend* fe,
1645 struct dvb_frontend_parameters* p, 1646 bool re_tune,
1646 unsigned int mode_flags, 1647 unsigned int mode_flags,
1647 unsigned int *delay, 1648 unsigned int *delay,
1648 fe_status_t *status) 1649 fe_status_t *status)
1649{ 1650{
1650 struct dst_state *state = fe->demodulator_priv; 1651 struct dst_state *state = fe->demodulator_priv;
1652 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1651 1653
1652 if (p != NULL) { 1654 if (re_tune) {
1653 dst_set_freq(state, p->frequency); 1655 dst_set_freq(state, p->frequency);
1654 dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency); 1656 dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
1655 1657
1656 if (state->dst_type == DST_TYPE_IS_SAT) { 1658 if (state->dst_type == DST_TYPE_IS_SAT) {
1657 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) 1659 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1658 dst_set_inversion(state, p->inversion); 1660 dst_set_inversion(state, p->inversion);
1659 dst_set_fec(state, p->u.qpsk.fec_inner); 1661 dst_set_fec(state, p->fec_inner);
1660 dst_set_symbolrate(state, p->u.qpsk.symbol_rate); 1662 dst_set_symbolrate(state, p->symbol_rate);
1661 dst_set_polarization(state); 1663 dst_set_polarization(state);
1662 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate); 1664 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->symbol_rate);
1663 1665
1664 } else if (state->dst_type == DST_TYPE_IS_TERR) 1666 } else if (state->dst_type == DST_TYPE_IS_TERR)
1665 dst_set_bandwidth(state, p->u.ofdm.bandwidth); 1667 dst_set_bandwidth(state, p->bandwidth_hz);
1666 else if (state->dst_type == DST_TYPE_IS_CABLE) { 1668 else if (state->dst_type == DST_TYPE_IS_CABLE) {
1667 dst_set_fec(state, p->u.qam.fec_inner); 1669 dst_set_fec(state, p->fec_inner);
1668 dst_set_symbolrate(state, p->u.qam.symbol_rate); 1670 dst_set_symbolrate(state, p->symbol_rate);
1669 dst_set_modulation(state, p->u.qam.modulation); 1671 dst_set_modulation(state, p->modulation);
1670 } 1672 }
1671 dst_write_tuna(fe); 1673 dst_write_tuna(fe);
1672 } 1674 }
@@ -1683,22 +1685,23 @@ static int dst_get_tuning_algo(struct dvb_frontend *fe)
1683 return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW; 1685 return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
1684} 1686}
1685 1687
1686static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 1688static int dst_get_frontend(struct dvb_frontend *fe)
1687{ 1689{
1690 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1688 struct dst_state *state = fe->demodulator_priv; 1691 struct dst_state *state = fe->demodulator_priv;
1689 1692
1690 p->frequency = state->decode_freq; 1693 p->frequency = state->decode_freq;
1691 if (state->dst_type == DST_TYPE_IS_SAT) { 1694 if (state->dst_type == DST_TYPE_IS_SAT) {
1692 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) 1695 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1693 p->inversion = state->inversion; 1696 p->inversion = state->inversion;
1694 p->u.qpsk.symbol_rate = state->symbol_rate; 1697 p->symbol_rate = state->symbol_rate;
1695 p->u.qpsk.fec_inner = dst_get_fec(state); 1698 p->fec_inner = dst_get_fec(state);
1696 } else if (state->dst_type == DST_TYPE_IS_TERR) { 1699 } else if (state->dst_type == DST_TYPE_IS_TERR) {
1697 p->u.ofdm.bandwidth = state->bandwidth; 1700 p->bandwidth_hz = state->bandwidth;
1698 } else if (state->dst_type == DST_TYPE_IS_CABLE) { 1701 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
1699 p->u.qam.symbol_rate = state->symbol_rate; 1702 p->symbol_rate = state->symbol_rate;
1700 p->u.qam.fec_inner = dst_get_fec(state); 1703 p->fec_inner = dst_get_fec(state);
1701 p->u.qam.modulation = dst_get_modulation(state); 1704 p->modulation = dst_get_modulation(state);
1702 } 1705 }
1703 1706
1704 return 0; 1707 return 0;
@@ -1756,10 +1759,9 @@ struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_ad
1756EXPORT_SYMBOL(dst_attach); 1759EXPORT_SYMBOL(dst_attach);
1757 1760
1758static struct dvb_frontend_ops dst_dvbt_ops = { 1761static struct dvb_frontend_ops dst_dvbt_ops = {
1759 1762 .delsys = { SYS_DVBT },
1760 .info = { 1763 .info = {
1761 .name = "DST DVB-T", 1764 .name = "DST DVB-T",
1762 .type = FE_OFDM,
1763 .frequency_min = 137000000, 1765 .frequency_min = 137000000,
1764 .frequency_max = 858000000, 1766 .frequency_max = 858000000,
1765 .frequency_stepsize = 166667, 1767 .frequency_stepsize = 166667,
@@ -1786,10 +1788,9 @@ static struct dvb_frontend_ops dst_dvbt_ops = {
1786}; 1788};
1787 1789
1788static struct dvb_frontend_ops dst_dvbs_ops = { 1790static struct dvb_frontend_ops dst_dvbs_ops = {
1789 1791 .delsys = { SYS_DVBS },
1790 .info = { 1792 .info = {
1791 .name = "DST DVB-S", 1793 .name = "DST DVB-S",
1792 .type = FE_QPSK,
1793 .frequency_min = 950000, 1794 .frequency_min = 950000,
1794 .frequency_max = 2150000, 1795 .frequency_max = 2150000,
1795 .frequency_stepsize = 1000, /* kHz for QPSK frontends */ 1796 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
@@ -1816,10 +1817,9 @@ static struct dvb_frontend_ops dst_dvbs_ops = {
1816}; 1817};
1817 1818
1818static struct dvb_frontend_ops dst_dvbc_ops = { 1819static struct dvb_frontend_ops dst_dvbc_ops = {
1819 1820 .delsys = { SYS_DVBC_ANNEX_A },
1820 .info = { 1821 .info = {
1821 .name = "DST DVB-C", 1822 .name = "DST DVB-C",
1822 .type = FE_QAM,
1823 .frequency_stepsize = 62500, 1823 .frequency_stepsize = 62500,
1824 .frequency_min = 51000000, 1824 .frequency_min = 51000000,
1825 .frequency_max = 858000000, 1825 .frequency_max = 858000000,
@@ -1846,9 +1846,9 @@ static struct dvb_frontend_ops dst_dvbc_ops = {
1846}; 1846};
1847 1847
1848static struct dvb_frontend_ops dst_atsc_ops = { 1848static struct dvb_frontend_ops dst_atsc_ops = {
1849 .delsys = { SYS_ATSC },
1849 .info = { 1850 .info = {
1850 .name = "DST ATSC", 1851 .name = "DST ATSC",
1851 .type = FE_ATSC,
1852 .frequency_stepsize = 62500, 1852 .frequency_stepsize = 62500,
1853 .frequency_min = 510000000, 1853 .frequency_min = 510000000,
1854 .frequency_max = 858000000, 1854 .frequency_max = 858000000,
diff --git a/drivers/media/dvb/bt8xx/dst_common.h b/drivers/media/dvb/bt8xx/dst_common.h
index d88cf2add82..d70d98f1a57 100644
--- a/drivers/media/dvb/bt8xx/dst_common.h
+++ b/drivers/media/dvb/bt8xx/dst_common.h
@@ -124,7 +124,7 @@ struct dst_state {
124 u16 decode_snr; 124 u16 decode_snr;
125 unsigned long cur_jiff; 125 unsigned long cur_jiff;
126 u8 k22; 126 u8 k22;
127 fe_bandwidth_t bandwidth; 127 u32 bandwidth;
128 u32 dst_hw_cap; 128 u32 dst_hw_cap;
129 u8 dst_fw_version; 129 u8 dst_fw_version;
130 fe_sec_mini_cmd_t minicmd; 130 fe_sec_mini_cmd_t minicmd;
diff --git a/drivers/media/dvb/bt8xx/dvb-bt8xx.c b/drivers/media/dvb/bt8xx/dvb-bt8xx.c
index 521d6910498..81fab9adc1c 100644
--- a/drivers/media/dvb/bt8xx/dvb-bt8xx.c
+++ b/drivers/media/dvb/bt8xx/dvb-bt8xx.c
@@ -19,6 +19,8 @@
19 * 19 *
20 */ 20 */
21 21
22#define pr_fmt(fmt) "dvb_bt8xx: " fmt
23
22#include <linux/bitops.h> 24#include <linux/bitops.h>
23#include <linux/module.h> 25#include <linux/module.h>
24#include <linux/init.h> 26#include <linux/init.h>
@@ -148,8 +150,9 @@ static int thomson_dtt7579_demod_init(struct dvb_frontend* fe)
148 return 0; 150 return 0;
149} 151}
150 152
151static int thomson_dtt7579_tuner_calc_regs(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf, int buf_len) 153static int thomson_dtt7579_tuner_calc_regs(struct dvb_frontend *fe, u8* pllbuf, int buf_len)
152{ 154{
155 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
153 u32 div; 156 u32 div;
154 unsigned char bs = 0; 157 unsigned char bs = 0;
155 unsigned char cp = 0; 158 unsigned char cp = 0;
@@ -157,18 +160,18 @@ static int thomson_dtt7579_tuner_calc_regs(struct dvb_frontend* fe, struct dvb_f
157 if (buf_len < 5) 160 if (buf_len < 5)
158 return -EINVAL; 161 return -EINVAL;
159 162
160 div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; 163 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
161 164
162 if (params->frequency < 542000000) 165 if (c->frequency < 542000000)
163 cp = 0xb4; 166 cp = 0xb4;
164 else if (params->frequency < 771000000) 167 else if (c->frequency < 771000000)
165 cp = 0xbc; 168 cp = 0xbc;
166 else 169 else
167 cp = 0xf4; 170 cp = 0xf4;
168 171
169 if (params->frequency == 0) 172 if (c->frequency == 0)
170 bs = 0x03; 173 bs = 0x03;
171 else if (params->frequency < 443250000) 174 else if (c->frequency < 443250000)
172 bs = 0x02; 175 bs = 0x02;
173 else 176 else
174 bs = 0x08; 177 bs = 0x08;
@@ -191,13 +194,12 @@ static struct zl10353_config thomson_dtt7579_zl10353_config = {
191 .demod_address = 0x0f, 194 .demod_address = 0x0f,
192}; 195};
193 196
194static int cx24108_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 197static int cx24108_tuner_set_params(struct dvb_frontend *fe)
195{ 198{
196 u32 freq = params->frequency; 199 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
197 200 u32 freq = c->frequency;
198 int i, a, n, pump; 201 int i, a, n, pump;
199 u32 band, pll; 202 u32 band, pll;
200
201 u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000, 203 u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000,
202 1576000,1718000,1856000,2036000,2150000}; 204 1576000,1718000,1856000,2036000,2150000};
203 u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000, 205 u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000,
@@ -205,7 +207,7 @@ static int cx24108_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend
205 0x00120000,0x00140000}; 207 0x00120000,0x00140000};
206 208
207 #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */ 209 #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */
208 printk("cx24108 debug: entering SetTunerFreq, freq=%d\n",freq); 210 dprintk("cx24108 debug: entering SetTunerFreq, freq=%d\n", freq);
209 211
210 /* This is really the bit driving the tuner chip cx24108 */ 212 /* This is really the bit driving the tuner chip cx24108 */
211 213
@@ -216,7 +218,7 @@ static int cx24108_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend
216 218
217 /* decide which VCO to use for the input frequency */ 219 /* decide which VCO to use for the input frequency */
218 for(i = 1; (i < ARRAY_SIZE(osci) - 1) && (osci[i] < freq); i++); 220 for(i = 1; (i < ARRAY_SIZE(osci) - 1) && (osci[i] < freq); i++);
219 printk("cx24108 debug: select vco #%d (f=%d)\n",i,freq); 221 dprintk("cx24108 debug: select vco #%d (f=%d)\n", i, freq);
220 band=bandsel[i]; 222 band=bandsel[i];
221 /* the gain values must be set by SetSymbolrate */ 223 /* the gain values must be set by SetSymbolrate */
222 /* compute the pll divider needed, from Conexant data sheet, 224 /* compute the pll divider needed, from Conexant data sheet,
@@ -232,7 +234,7 @@ static int cx24108_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend
232 ((a&0x1f)<<11); 234 ((a&0x1f)<<11);
233 /* everything is shifted left 11 bits to left-align the bits in the 235 /* everything is shifted left 11 bits to left-align the bits in the
234 32bit word. Output to the tuner goes MSB-aligned, after all */ 236 32bit word. Output to the tuner goes MSB-aligned, after all */
235 printk("cx24108 debug: pump=%d, n=%d, a=%d\n",pump,n,a); 237 dprintk("cx24108 debug: pump=%d, n=%d, a=%d\n", pump, n, a);
236 cx24110_pll_write(fe,band); 238 cx24110_pll_write(fe,band);
237 /* set vga and vca to their widest-band settings, as a precaution. 239 /* set vga and vca to their widest-band settings, as a precaution.
238 SetSymbolrate might not be called to set this up */ 240 SetSymbolrate might not be called to set this up */
@@ -267,31 +269,32 @@ static struct cx24110_config pctvsat_config = {
267 .demod_address = 0x55, 269 .demod_address = 0x55,
268}; 270};
269 271
270static int microtune_mt7202dtf_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 272static int microtune_mt7202dtf_tuner_set_params(struct dvb_frontend *fe)
271{ 273{
274 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
272 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv; 275 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
273 u8 cfg, cpump, band_select; 276 u8 cfg, cpump, band_select;
274 u8 data[4]; 277 u8 data[4];
275 u32 div; 278 u32 div;
276 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) }; 279 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
277 280
278 div = (36000000 + params->frequency + 83333) / 166666; 281 div = (36000000 + c->frequency + 83333) / 166666;
279 cfg = 0x88; 282 cfg = 0x88;
280 283
281 if (params->frequency < 175000000) 284 if (c->frequency < 175000000)
282 cpump = 2; 285 cpump = 2;
283 else if (params->frequency < 390000000) 286 else if (c->frequency < 390000000)
284 cpump = 1; 287 cpump = 1;
285 else if (params->frequency < 470000000) 288 else if (c->frequency < 470000000)
286 cpump = 2; 289 cpump = 2;
287 else if (params->frequency < 750000000) 290 else if (c->frequency < 750000000)
288 cpump = 2; 291 cpump = 2;
289 else 292 else
290 cpump = 3; 293 cpump = 3;
291 294
292 if (params->frequency < 175000000) 295 if (c->frequency < 175000000)
293 band_select = 0x0e; 296 band_select = 0x0e;
294 else if (params->frequency < 470000000) 297 else if (c->frequency < 470000000)
295 band_select = 0x05; 298 band_select = 0x05;
296 else 299 else
297 band_select = 0x03; 300 band_select = 0x03;
@@ -342,50 +345,51 @@ static int advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe)
342 return 0; 345 return 0;
343} 346}
344 347
345static int advbt771_samsung_tdtc9251dh0_tuner_calc_regs(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf, int buf_len) 348static int advbt771_samsung_tdtc9251dh0_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
346{ 349{
350 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
347 u32 div; 351 u32 div;
348 unsigned char bs = 0; 352 unsigned char bs = 0;
349 unsigned char cp = 0; 353 unsigned char cp = 0;
350 354
351 if (buf_len < 5) return -EINVAL; 355 if (buf_len < 5) return -EINVAL;
352 356
353 div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; 357 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
354 358
355 if (params->frequency < 150000000) 359 if (c->frequency < 150000000)
356 cp = 0xB4; 360 cp = 0xB4;
357 else if (params->frequency < 173000000) 361 else if (c->frequency < 173000000)
358 cp = 0xBC; 362 cp = 0xBC;
359 else if (params->frequency < 250000000) 363 else if (c->frequency < 250000000)
360 cp = 0xB4; 364 cp = 0xB4;
361 else if (params->frequency < 400000000) 365 else if (c->frequency < 400000000)
362 cp = 0xBC; 366 cp = 0xBC;
363 else if (params->frequency < 420000000) 367 else if (c->frequency < 420000000)
364 cp = 0xF4; 368 cp = 0xF4;
365 else if (params->frequency < 470000000) 369 else if (c->frequency < 470000000)
366 cp = 0xFC; 370 cp = 0xFC;
367 else if (params->frequency < 600000000) 371 else if (c->frequency < 600000000)
368 cp = 0xBC; 372 cp = 0xBC;
369 else if (params->frequency < 730000000) 373 else if (c->frequency < 730000000)
370 cp = 0xF4; 374 cp = 0xF4;
371 else 375 else
372 cp = 0xFC; 376 cp = 0xFC;
373 377
374 if (params->frequency < 150000000) 378 if (c->frequency < 150000000)
375 bs = 0x01; 379 bs = 0x01;
376 else if (params->frequency < 173000000) 380 else if (c->frequency < 173000000)
377 bs = 0x01; 381 bs = 0x01;
378 else if (params->frequency < 250000000) 382 else if (c->frequency < 250000000)
379 bs = 0x02; 383 bs = 0x02;
380 else if (params->frequency < 400000000) 384 else if (c->frequency < 400000000)
381 bs = 0x02; 385 bs = 0x02;
382 else if (params->frequency < 420000000) 386 else if (c->frequency < 420000000)
383 bs = 0x02; 387 bs = 0x02;
384 else if (params->frequency < 470000000) 388 else if (c->frequency < 470000000)
385 bs = 0x02; 389 bs = 0x02;
386 else if (params->frequency < 600000000) 390 else if (c->frequency < 600000000)
387 bs = 0x08; 391 bs = 0x08;
388 else if (params->frequency < 730000000) 392 else if (c->frequency < 730000000)
389 bs = 0x08; 393 bs = 0x08;
390 else 394 else
391 bs = 0x08; 395 bs = 0x08;
@@ -461,25 +465,26 @@ static struct or51211_config or51211_config = {
461 .sleep = or51211_sleep, 465 .sleep = or51211_sleep,
462}; 466};
463 467
464static int vp3021_alps_tded4_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 468static int vp3021_alps_tded4_tuner_set_params(struct dvb_frontend *fe)
465{ 469{
470 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
466 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv; 471 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
467 u8 buf[4]; 472 u8 buf[4];
468 u32 div; 473 u32 div;
469 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf) }; 474 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf) };
470 475
471 div = (params->frequency + 36166667) / 166667; 476 div = (c->frequency + 36166667) / 166667;
472 477
473 buf[0] = (div >> 8) & 0x7F; 478 buf[0] = (div >> 8) & 0x7F;
474 buf[1] = div & 0xFF; 479 buf[1] = div & 0xFF;
475 buf[2] = 0x85; 480 buf[2] = 0x85;
476 if ((params->frequency >= 47000000) && (params->frequency < 153000000)) 481 if ((c->frequency >= 47000000) && (c->frequency < 153000000))
477 buf[3] = 0x01; 482 buf[3] = 0x01;
478 else if ((params->frequency >= 153000000) && (params->frequency < 430000000)) 483 else if ((c->frequency >= 153000000) && (c->frequency < 430000000))
479 buf[3] = 0x02; 484 buf[3] = 0x02;
480 else if ((params->frequency >= 430000000) && (params->frequency < 824000000)) 485 else if ((c->frequency >= 430000000) && (c->frequency < 824000000))
481 buf[3] = 0x0C; 486 buf[3] = 0x0C;
482 else if ((params->frequency >= 824000000) && (params->frequency < 863000000)) 487 else if ((c->frequency >= 824000000) && (c->frequency < 863000000))
483 buf[3] = 0x8C; 488 buf[3] = 0x8C;
484 else 489 else
485 return -EINVAL; 490 return -EINVAL;
@@ -513,31 +518,31 @@ static int digitv_alps_tded4_demod_init(struct dvb_frontend* fe)
513 return 0; 518 return 0;
514} 519}
515 520
516static int digitv_alps_tded4_tuner_calc_regs(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf, int buf_len) 521static int digitv_alps_tded4_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
517{ 522{
518 u32 div; 523 u32 div;
519 struct dvb_ofdm_parameters *op = &params->u.ofdm; 524 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
520 525
521 if (buf_len < 5) 526 if (buf_len < 5)
522 return -EINVAL; 527 return -EINVAL;
523 528
524 div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; 529 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
525 530
526 pllbuf[0] = 0x61; 531 pllbuf[0] = 0x61;
527 pllbuf[1] = (div >> 8) & 0x7F; 532 pllbuf[1] = (div >> 8) & 0x7F;
528 pllbuf[2] = div & 0xFF; 533 pllbuf[2] = div & 0xFF;
529 pllbuf[3] = 0x85; 534 pllbuf[3] = 0x85;
530 535
531 dprintk("frequency %u, div %u\n", params->frequency, div); 536 dprintk("frequency %u, div %u\n", c->frequency, div);
532 537
533 if (params->frequency < 470000000) 538 if (c->frequency < 470000000)
534 pllbuf[4] = 0x02; 539 pllbuf[4] = 0x02;
535 else if (params->frequency > 823000000) 540 else if (c->frequency > 823000000)
536 pllbuf[4] = 0x88; 541 pllbuf[4] = 0x88;
537 else 542 else
538 pllbuf[4] = 0x08; 543 pllbuf[4] = 0x08;
539 544
540 if (op->bandwidth == 8) 545 if (c->bandwidth_hz == 8000000)
541 pllbuf[4] |= 0x04; 546 pllbuf[4] |= 0x04;
542 547
543 return 5; 548 return 5;
@@ -663,7 +668,7 @@ static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
663 /* DST is not a frontend driver !!! */ 668 /* DST is not a frontend driver !!! */
664 state = kmalloc(sizeof (struct dst_state), GFP_KERNEL); 669 state = kmalloc(sizeof (struct dst_state), GFP_KERNEL);
665 if (!state) { 670 if (!state) {
666 printk("dvb_bt8xx: No memory\n"); 671 pr_err("No memory\n");
667 break; 672 break;
668 } 673 }
669 /* Setup the Card */ 674 /* Setup the Card */
@@ -673,7 +678,7 @@ static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
673 state->dst_ca = NULL; 678 state->dst_ca = NULL;
674 /* DST is not a frontend, attaching the ASIC */ 679 /* DST is not a frontend, attaching the ASIC */
675 if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) { 680 if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) {
676 printk("%s: Could not find a Twinhan DST.\n", __func__); 681 pr_err("%s: Could not find a Twinhan DST\n", __func__);
677 break; 682 break;
678 } 683 }
679 /* Attach other DST peripherals if any */ 684 /* Attach other DST peripherals if any */
@@ -702,14 +707,14 @@ static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
702 } 707 }
703 708
704 if (card->fe == NULL) 709 if (card->fe == NULL)
705 printk("dvb-bt8xx: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n", 710 pr_err("A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
706 card->bt->dev->vendor, 711 card->bt->dev->vendor,
707 card->bt->dev->device, 712 card->bt->dev->device,
708 card->bt->dev->subsystem_vendor, 713 card->bt->dev->subsystem_vendor,
709 card->bt->dev->subsystem_device); 714 card->bt->dev->subsystem_device);
710 else 715 else
711 if (dvb_register_frontend(&card->dvb_adapter, card->fe)) { 716 if (dvb_register_frontend(&card->dvb_adapter, card->fe)) {
712 printk("dvb-bt8xx: Frontend registration failed!\n"); 717 pr_err("Frontend registration failed!\n");
713 dvb_frontend_detach(card->fe); 718 dvb_frontend_detach(card->fe);
714 card->fe = NULL; 719 card->fe = NULL;
715 } 720 }
@@ -723,7 +728,7 @@ static int __devinit dvb_bt8xx_load_card(struct dvb_bt8xx_card *card, u32 type)
723 THIS_MODULE, &card->bt->dev->dev, 728 THIS_MODULE, &card->bt->dev->dev,
724 adapter_nr); 729 adapter_nr);
725 if (result < 0) { 730 if (result < 0) {
726 printk("dvb_bt8xx: dvb_register_adapter failed (errno = %d)\n", result); 731 pr_err("dvb_register_adapter failed (errno = %d)\n", result);
727 return result; 732 return result;
728 } 733 }
729 card->dvb_adapter.priv = card; 734 card->dvb_adapter.priv = card;
@@ -741,66 +746,69 @@ static int __devinit dvb_bt8xx_load_card(struct dvb_bt8xx_card *card, u32 type)
741 card->demux.stop_feed = dvb_bt8xx_stop_feed; 746 card->demux.stop_feed = dvb_bt8xx_stop_feed;
742 card->demux.write_to_decoder = NULL; 747 card->demux.write_to_decoder = NULL;
743 748
744 if ((result = dvb_dmx_init(&card->demux)) < 0) { 749 result = dvb_dmx_init(&card->demux);
745 printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); 750 if (result < 0) {
746 751 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
747 dvb_unregister_adapter(&card->dvb_adapter); 752 goto err_unregister_adaptor;
748 return result;
749 } 753 }
750 754
751 card->dmxdev.filternum = 256; 755 card->dmxdev.filternum = 256;
752 card->dmxdev.demux = &card->demux.dmx; 756 card->dmxdev.demux = &card->demux.dmx;
753 card->dmxdev.capabilities = 0; 757 card->dmxdev.capabilities = 0;
754 758
755 if ((result = dvb_dmxdev_init(&card->dmxdev, &card->dvb_adapter)) < 0) { 759 result = dvb_dmxdev_init(&card->dmxdev, &card->dvb_adapter);
756 printk("dvb_bt8xx: dvb_dmxdev_init failed (errno = %d)\n", result); 760 if (result < 0) {
757 761 pr_err("dvb_dmxdev_init failed (errno = %d)\n", result);
758 dvb_dmx_release(&card->demux); 762 goto err_dmx_release;
759 dvb_unregister_adapter(&card->dvb_adapter);
760 return result;
761 } 763 }
762 764
763 card->fe_hw.source = DMX_FRONTEND_0; 765 card->fe_hw.source = DMX_FRONTEND_0;
764 766
765 if ((result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_hw)) < 0) { 767 result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_hw);
766 printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); 768 if (result < 0) {
767 769 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
768 dvb_dmxdev_release(&card->dmxdev); 770 goto err_dmxdev_release;
769 dvb_dmx_release(&card->demux);
770 dvb_unregister_adapter(&card->dvb_adapter);
771 return result;
772 } 771 }
773 772
774 card->fe_mem.source = DMX_MEMORY_FE; 773 card->fe_mem.source = DMX_MEMORY_FE;
775 774
776 if ((result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_mem)) < 0) { 775 result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_mem);
777 printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); 776 if (result < 0) {
778 777 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
779 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw); 778 goto err_remove_hw_frontend;
780 dvb_dmxdev_release(&card->dmxdev);
781 dvb_dmx_release(&card->demux);
782 dvb_unregister_adapter(&card->dvb_adapter);
783 return result;
784 } 779 }
785 780
786 if ((result = card->demux.dmx.connect_frontend(&card->demux.dmx, &card->fe_hw)) < 0) { 781 result = card->demux.dmx.connect_frontend(&card->demux.dmx, &card->fe_hw);
787 printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); 782 if (result < 0) {
788 783 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
789 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem); 784 goto err_remove_mem_frontend;
790 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
791 dvb_dmxdev_release(&card->dmxdev);
792 dvb_dmx_release(&card->demux);
793 dvb_unregister_adapter(&card->dvb_adapter);
794 return result;
795 } 785 }
796 786
797 dvb_net_init(&card->dvb_adapter, &card->dvbnet, &card->demux.dmx); 787 result = dvb_net_init(&card->dvb_adapter, &card->dvbnet, &card->demux.dmx);
788 if (result < 0) {
789 pr_err("dvb_net_init failed (errno = %d)\n", result);
790 goto err_disconnect_frontend;
791 }
798 792
799 tasklet_init(&card->bt->tasklet, dvb_bt8xx_task, (unsigned long) card); 793 tasklet_init(&card->bt->tasklet, dvb_bt8xx_task, (unsigned long) card);
800 794
801 frontend_init(card, type); 795 frontend_init(card, type);
802 796
803 return 0; 797 return 0;
798
799err_disconnect_frontend:
800 card->demux.dmx.disconnect_frontend(&card->demux.dmx);
801err_remove_mem_frontend:
802 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
803err_remove_hw_frontend:
804 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
805err_dmxdev_release:
806 dvb_dmxdev_release(&card->dmxdev);
807err_dmx_release:
808 dvb_dmx_release(&card->demux);
809err_unregister_adaptor:
810 dvb_unregister_adapter(&card->dvb_adapter);
811 return result;
804} 812}
805 813
806static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub) 814static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub)
@@ -881,8 +889,7 @@ static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub)
881 break; 889 break;
882 890
883 default: 891 default:
884 printk(KERN_WARNING "dvb_bt8xx: Unknown bttv card type: %d.\n", 892 pr_err("Unknown bttv card type: %d\n", sub->core->type);
885 sub->core->type);
886 kfree(card); 893 kfree(card);
887 return -ENODEV; 894 return -ENODEV;
888 } 895 }
@@ -890,16 +897,14 @@ static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub)
890 dprintk("dvb_bt8xx: identified card%d as %s\n", card->bttv_nr, card->card_name); 897 dprintk("dvb_bt8xx: identified card%d as %s\n", card->bttv_nr, card->card_name);
891 898
892 if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) { 899 if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) {
893 printk("dvb_bt8xx: no pci device for card %d\n", card->bttv_nr); 900 pr_err("no pci device for card %d\n", card->bttv_nr);
894 kfree(card); 901 kfree(card);
895 return -ENODEV; 902 return -ENODEV;
896 } 903 }
897 904
898 if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) { 905 if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) {
899 printk("dvb_bt8xx: unable to determine DMA core of card %d,\n", 906 pr_err("unable to determine DMA core of card %d,\n", card->bttv_nr);
900 card->bttv_nr); 907 pr_err("if you have the ALSA bt87x audio driver installed, try removing it.\n");
901 printk("dvb_bt8xx: if you have the ALSA bt87x audio driver "
902 "installed, try removing it.\n");
903 908
904 kfree(card); 909 kfree(card);
905 return -ENODEV; 910 return -ENODEV;
diff --git a/drivers/media/dvb/ddbridge/ddbridge-core.c b/drivers/media/dvb/ddbridge/ddbridge-core.c
index d1e91bc80e7..ce4f85849e7 100644
--- a/drivers/media/dvb/ddbridge/ddbridge-core.c
+++ b/drivers/media/dvb/ddbridge/ddbridge-core.c
@@ -580,7 +580,7 @@ static int demod_attach_drxk(struct ddb_input *input)
580 memset(&config, 0, sizeof(config)); 580 memset(&config, 0, sizeof(config));
581 config.adr = 0x29 + (input->nr & 1); 581 config.adr = 0x29 + (input->nr & 1);
582 582
583 fe = input->fe = dvb_attach(drxk_attach, &config, i2c, &input->fe2); 583 fe = input->fe = dvb_attach(drxk_attach, &config, i2c);
584 if (!input->fe) { 584 if (!input->fe) {
585 printk(KERN_ERR "No DRXK found!\n"); 585 printk(KERN_ERR "No DRXK found!\n");
586 return -ENODEV; 586 return -ENODEV;
diff --git a/drivers/media/dvb/dm1105/dm1105.c b/drivers/media/dvb/dm1105/dm1105.c
index 55e6533f15e..a609b3a9b14 100644
--- a/drivers/media/dvb/dm1105/dm1105.c
+++ b/drivers/media/dvb/dm1105/dm1105.c
@@ -1115,11 +1115,14 @@ static int __devinit dm1105_probe(struct pci_dev *pdev,
1115 if (ret < 0) 1115 if (ret < 0)
1116 goto err_remove_mem_frontend; 1116 goto err_remove_mem_frontend;
1117 1117
1118 ret = frontend_init(dev); 1118 ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1119 if (ret < 0) 1119 if (ret < 0)
1120 goto err_disconnect_frontend; 1120 goto err_disconnect_frontend;
1121 1121
1122 dvb_net_init(dvb_adapter, &dev->dvbnet, dmx); 1122 ret = frontend_init(dev);
1123 if (ret < 0)
1124 goto err_dvb_net;
1125
1123 dm1105_ir_init(dev); 1126 dm1105_ir_init(dev);
1124 1127
1125 INIT_WORK(&dev->work, dm1105_dmx_buffer); 1128 INIT_WORK(&dev->work, dm1105_dmx_buffer);
diff --git a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
index 7ea517b7e18..9be65a3b931 100644
--- a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
+++ b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
@@ -1306,6 +1306,10 @@ static ssize_t dvb_ca_en50221_io_write(struct file *file,
1306 /* fragment the packets & store in the buffer */ 1306 /* fragment the packets & store in the buffer */
1307 while (fragpos < count) { 1307 while (fragpos < count) {
1308 fraglen = ca->slot_info[slot].link_buf_size - 2; 1308 fraglen = ca->slot_info[slot].link_buf_size - 2;
1309 if (fraglen < 0)
1310 break;
1311 if (fraglen > HOST_LINK_BUF_SIZE - 2)
1312 fraglen = HOST_LINK_BUF_SIZE - 2;
1309 if ((count - fragpos) < fraglen) 1313 if ((count - fragpos) < fraglen)
1310 fraglen = count - fragpos; 1314 fraglen = count - fragpos;
1311 1315
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
index 2c0acdb4d81..b15db4fe347 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -25,6 +25,9 @@
25 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html 25 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
26 */ 26 */
27 27
28/* Enables DVBv3 compatibility bits at the headers */
29#define __DVB_CORE__
30
28#include <linux/string.h> 31#include <linux/string.h>
29#include <linux/kernel.h> 32#include <linux/kernel.h>
30#include <linux/sched.h> 33#include <linux/sched.h>
@@ -105,7 +108,6 @@ struct dvb_frontend_private {
105 108
106 /* thread/frontend values */ 109 /* thread/frontend values */
107 struct dvb_device *dvbdev; 110 struct dvb_device *dvbdev;
108 struct dvb_frontend_parameters parameters_in;
109 struct dvb_frontend_parameters parameters_out; 111 struct dvb_frontend_parameters parameters_out;
110 struct dvb_fe_events events; 112 struct dvb_fe_events events;
111 struct semaphore sem; 113 struct semaphore sem;
@@ -139,6 +141,62 @@ struct dvb_frontend_private {
139}; 141};
140 142
141static void dvb_frontend_wakeup(struct dvb_frontend *fe); 143static void dvb_frontend_wakeup(struct dvb_frontend *fe);
144static int dtv_get_frontend(struct dvb_frontend *fe,
145 struct dvb_frontend_parameters *p_out);
146
147static bool has_get_frontend(struct dvb_frontend *fe)
148{
149 return fe->ops.get_frontend;
150}
151
152/*
153 * Due to DVBv3 API calls, a delivery system should be mapped into one of
154 * the 4 DVBv3 delivery systems (FE_QPSK, FE_QAM, FE_OFDM or FE_ATSC),
155 * otherwise, a DVBv3 call will fail.
156 */
157enum dvbv3_emulation_type {
158 DVBV3_UNKNOWN,
159 DVBV3_QPSK,
160 DVBV3_QAM,
161 DVBV3_OFDM,
162 DVBV3_ATSC,
163};
164
165static enum dvbv3_emulation_type dvbv3_type(u32 delivery_system)
166{
167 switch (delivery_system) {
168 case SYS_DVBC_ANNEX_A:
169 case SYS_DVBC_ANNEX_C:
170 return DVBV3_QAM;
171 case SYS_DVBS:
172 case SYS_DVBS2:
173 case SYS_TURBO:
174 case SYS_ISDBS:
175 case SYS_DSS:
176 return DVBV3_QPSK;
177 case SYS_DVBT:
178 case SYS_DVBT2:
179 case SYS_ISDBT:
180 case SYS_DMBTH:
181 return DVBV3_OFDM;
182 case SYS_ATSC:
183 case SYS_DVBC_ANNEX_B:
184 return DVBV3_ATSC;
185 case SYS_UNDEFINED:
186 case SYS_ISDBC:
187 case SYS_DVBH:
188 case SYS_DAB:
189 case SYS_ATSCMH:
190 default:
191 /*
192 * Doesn't know how to emulate those types and/or
193 * there's no frontend driver from this type yet
194 * with some emulation code, so, we're not sure yet how
195 * to handle them, or they're not compatible with a DVBv3 call.
196 */
197 return DVBV3_UNKNOWN;
198 }
199}
142 200
143static void dvb_frontend_add_event(struct dvb_frontend *fe, fe_status_t status) 201static void dvb_frontend_add_event(struct dvb_frontend *fe, fe_status_t status)
144{ 202{
@@ -149,8 +207,8 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe, fe_status_t status)
149 207
150 dprintk ("%s\n", __func__); 208 dprintk ("%s\n", __func__);
151 209
152 if ((status & FE_HAS_LOCK) && fe->ops.get_frontend) 210 if ((status & FE_HAS_LOCK) && has_get_frontend(fe))
153 fe->ops.get_frontend(fe, &fepriv->parameters_out); 211 dtv_get_frontend(fe, &fepriv->parameters_out);
154 212
155 mutex_lock(&events->mtx); 213 mutex_lock(&events->mtx);
156 214
@@ -277,12 +335,13 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
277 int ready = 0; 335 int ready = 0;
278 int fe_set_err = 0; 336 int fe_set_err = 0;
279 struct dvb_frontend_private *fepriv = fe->frontend_priv; 337 struct dvb_frontend_private *fepriv = fe->frontend_priv;
280 int original_inversion = fepriv->parameters_in.inversion; 338 struct dtv_frontend_properties *c = &fe->dtv_property_cache, tmp;
281 u32 original_frequency = fepriv->parameters_in.frequency; 339 int original_inversion = c->inversion;
340 u32 original_frequency = c->frequency;
282 341
283 /* are we using autoinversion? */ 342 /* are we using autoinversion? */
284 autoinversion = ((!(fe->ops.info.caps & FE_CAN_INVERSION_AUTO)) && 343 autoinversion = ((!(fe->ops.info.caps & FE_CAN_INVERSION_AUTO)) &&
285 (fepriv->parameters_in.inversion == INVERSION_AUTO)); 344 (c->inversion == INVERSION_AUTO));
286 345
287 /* setup parameters correctly */ 346 /* setup parameters correctly */
288 while(!ready) { 347 while(!ready) {
@@ -348,19 +407,20 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
348 fepriv->auto_step, fepriv->auto_sub_step, fepriv->started_auto_step); 407 fepriv->auto_step, fepriv->auto_sub_step, fepriv->started_auto_step);
349 408
350 /* set the frontend itself */ 409 /* set the frontend itself */
351 fepriv->parameters_in.frequency += fepriv->lnb_drift; 410 c->frequency += fepriv->lnb_drift;
352 if (autoinversion) 411 if (autoinversion)
353 fepriv->parameters_in.inversion = fepriv->inversion; 412 c->inversion = fepriv->inversion;
413 tmp = *c;
354 if (fe->ops.set_frontend) 414 if (fe->ops.set_frontend)
355 fe_set_err = fe->ops.set_frontend(fe, &fepriv->parameters_in); 415 fe_set_err = fe->ops.set_frontend(fe);
356 fepriv->parameters_out = fepriv->parameters_in; 416 *c = tmp;
357 if (fe_set_err < 0) { 417 if (fe_set_err < 0) {
358 fepriv->state = FESTATE_ERROR; 418 fepriv->state = FESTATE_ERROR;
359 return fe_set_err; 419 return fe_set_err;
360 } 420 }
361 421
362 fepriv->parameters_in.frequency = original_frequency; 422 c->frequency = original_frequency;
363 fepriv->parameters_in.inversion = original_inversion; 423 c->inversion = original_inversion;
364 424
365 fepriv->auto_sub_step++; 425 fepriv->auto_sub_step++;
366 return 0; 426 return 0;
@@ -371,6 +431,7 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
371 fe_status_t s = 0; 431 fe_status_t s = 0;
372 int retval = 0; 432 int retval = 0;
373 struct dvb_frontend_private *fepriv = fe->frontend_priv; 433 struct dvb_frontend_private *fepriv = fe->frontend_priv;
434 struct dtv_frontend_properties *c = &fe->dtv_property_cache, tmp;
374 435
375 /* if we've got no parameters, just keep idling */ 436 /* if we've got no parameters, just keep idling */
376 if (fepriv->state & FESTATE_IDLE) { 437 if (fepriv->state & FESTATE_IDLE) {
@@ -382,10 +443,10 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
382 /* in SCAN mode, we just set the frontend when asked and leave it alone */ 443 /* in SCAN mode, we just set the frontend when asked and leave it alone */
383 if (fepriv->tune_mode_flags & FE_TUNE_MODE_ONESHOT) { 444 if (fepriv->tune_mode_flags & FE_TUNE_MODE_ONESHOT) {
384 if (fepriv->state & FESTATE_RETUNE) { 445 if (fepriv->state & FESTATE_RETUNE) {
446 tmp = *c;
385 if (fe->ops.set_frontend) 447 if (fe->ops.set_frontend)
386 retval = fe->ops.set_frontend(fe, 448 retval = fe->ops.set_frontend(fe);
387 &fepriv->parameters_in); 449 *c = tmp;
388 fepriv->parameters_out = fepriv->parameters_in;
389 if (retval < 0) 450 if (retval < 0)
390 fepriv->state = FESTATE_ERROR; 451 fepriv->state = FESTATE_ERROR;
391 else 452 else
@@ -415,8 +476,8 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
415 476
416 /* if we're tuned, then we have determined the correct inversion */ 477 /* if we're tuned, then we have determined the correct inversion */
417 if ((!(fe->ops.info.caps & FE_CAN_INVERSION_AUTO)) && 478 if ((!(fe->ops.info.caps & FE_CAN_INVERSION_AUTO)) &&
418 (fepriv->parameters_in.inversion == INVERSION_AUTO)) { 479 (c->inversion == INVERSION_AUTO)) {
419 fepriv->parameters_in.inversion = fepriv->inversion; 480 c->inversion = fepriv->inversion;
420 } 481 }
421 return; 482 return;
422 } 483 }
@@ -507,7 +568,7 @@ static int dvb_frontend_is_exiting(struct dvb_frontend *fe)
507 return 1; 568 return 1;
508 569
509 if (fepriv->dvbdev->writers == 1) 570 if (fepriv->dvbdev->writers == 1)
510 if (time_after(jiffies, fepriv->release_jiffies + 571 if (time_after_eq(jiffies, fepriv->release_jiffies +
511 dvb_shutdown_timeout * HZ)) 572 dvb_shutdown_timeout * HZ))
512 return 1; 573 return 1;
513 574
@@ -540,7 +601,7 @@ static int dvb_frontend_thread(void *data)
540 fe_status_t s; 601 fe_status_t s;
541 enum dvbfe_algo algo; 602 enum dvbfe_algo algo;
542 603
543 struct dvb_frontend_parameters *params; 604 bool re_tune = false;
544 605
545 dprintk("%s\n", __func__); 606 dprintk("%s\n", __func__);
546 607
@@ -589,18 +650,15 @@ restart:
589 switch (algo) { 650 switch (algo) {
590 case DVBFE_ALGO_HW: 651 case DVBFE_ALGO_HW:
591 dprintk("%s: Frontend ALGO = DVBFE_ALGO_HW\n", __func__); 652 dprintk("%s: Frontend ALGO = DVBFE_ALGO_HW\n", __func__);
592 params = NULL; /* have we been asked to RETUNE ? */
593 653
594 if (fepriv->state & FESTATE_RETUNE) { 654 if (fepriv->state & FESTATE_RETUNE) {
595 dprintk("%s: Retune requested, FESTATE_RETUNE\n", __func__); 655 dprintk("%s: Retune requested, FESTATE_RETUNE\n", __func__);
596 params = &fepriv->parameters_in; 656 re_tune = true;
597 fepriv->state = FESTATE_TUNED; 657 fepriv->state = FESTATE_TUNED;
598 } 658 }
599 659
600 if (fe->ops.tune) 660 if (fe->ops.tune)
601 fe->ops.tune(fe, params, fepriv->tune_mode_flags, &fepriv->delay, &s); 661 fe->ops.tune(fe, re_tune, fepriv->tune_mode_flags, &fepriv->delay, &s);
602 if (params)
603 fepriv->parameters_out = *params;
604 662
605 if (s != fepriv->status && !(fepriv->tune_mode_flags & FE_TUNE_MODE_ONESHOT)) { 663 if (s != fepriv->status && !(fepriv->tune_mode_flags & FE_TUNE_MODE_ONESHOT)) {
606 dprintk("%s: state changed, adding current state\n", __func__); 664 dprintk("%s: state changed, adding current state\n", __func__);
@@ -624,7 +682,7 @@ restart:
624 */ 682 */
625 if (fepriv->algo_status & DVBFE_ALGO_SEARCH_AGAIN) { 683 if (fepriv->algo_status & DVBFE_ALGO_SEARCH_AGAIN) {
626 if (fe->ops.search) { 684 if (fe->ops.search) {
627 fepriv->algo_status = fe->ops.search(fe, &fepriv->parameters_in); 685 fepriv->algo_status = fe->ops.search(fe);
628 /* We did do a search as was requested, the flags are 686 /* We did do a search as was requested, the flags are
629 * now unset as well and has the flags wrt to search. 687 * now unset as well and has the flags wrt to search.
630 */ 688 */
@@ -633,14 +691,10 @@ restart:
633 } 691 }
634 } 692 }
635 /* Track the carrier if the search was successful */ 693 /* Track the carrier if the search was successful */
636 if (fepriv->algo_status == DVBFE_ALGO_SEARCH_SUCCESS) { 694 if (fepriv->algo_status != DVBFE_ALGO_SEARCH_SUCCESS) {
637 if (fe->ops.track)
638 fe->ops.track(fe, &fepriv->parameters_in);
639 } else {
640 fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN; 695 fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
641 fepriv->delay = HZ / 2; 696 fepriv->delay = HZ / 2;
642 } 697 }
643 fepriv->parameters_out = fepriv->parameters_in;
644 fe->ops.read_status(fe, &s); 698 fe->ops.read_status(fe, &s);
645 if (s != fepriv->status) { 699 if (s != fepriv->status) {
646 dvb_frontend_add_event(fe, s); /* update event list */ 700 dvb_frontend_add_event(fe, s); /* update event list */
@@ -807,52 +861,40 @@ static void dvb_frontend_get_frequency_limits(struct dvb_frontend *fe,
807 fe->dvb->num,fe->id); 861 fe->dvb->num,fe->id);
808} 862}
809 863
810static int dvb_frontend_check_parameters(struct dvb_frontend *fe, 864static int dvb_frontend_check_parameters(struct dvb_frontend *fe)
811 struct dvb_frontend_parameters *parms)
812{ 865{
866 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
813 u32 freq_min; 867 u32 freq_min;
814 u32 freq_max; 868 u32 freq_max;
815 869
816 /* range check: frequency */ 870 /* range check: frequency */
817 dvb_frontend_get_frequency_limits(fe, &freq_min, &freq_max); 871 dvb_frontend_get_frequency_limits(fe, &freq_min, &freq_max);
818 if ((freq_min && parms->frequency < freq_min) || 872 if ((freq_min && c->frequency < freq_min) ||
819 (freq_max && parms->frequency > freq_max)) { 873 (freq_max && c->frequency > freq_max)) {
820 printk(KERN_WARNING "DVB: adapter %i frontend %i frequency %u out of range (%u..%u)\n", 874 printk(KERN_WARNING "DVB: adapter %i frontend %i frequency %u out of range (%u..%u)\n",
821 fe->dvb->num, fe->id, parms->frequency, freq_min, freq_max); 875 fe->dvb->num, fe->id, c->frequency, freq_min, freq_max);
822 return -EINVAL; 876 return -EINVAL;
823 } 877 }
824 878
825 /* range check: symbol rate */ 879 /* range check: symbol rate */
826 if (fe->ops.info.type == FE_QPSK) { 880 switch (c->delivery_system) {
827 if ((fe->ops.info.symbol_rate_min && 881 case SYS_DVBS:
828 parms->u.qpsk.symbol_rate < fe->ops.info.symbol_rate_min) || 882 case SYS_DVBS2:
829 (fe->ops.info.symbol_rate_max && 883 case SYS_TURBO:
830 parms->u.qpsk.symbol_rate > fe->ops.info.symbol_rate_max)) { 884 case SYS_DVBC_ANNEX_A:
831 printk(KERN_WARNING "DVB: adapter %i frontend %i symbol rate %u out of range (%u..%u)\n", 885 case SYS_DVBC_ANNEX_C:
832 fe->dvb->num, fe->id, parms->u.qpsk.symbol_rate,
833 fe->ops.info.symbol_rate_min, fe->ops.info.symbol_rate_max);
834 return -EINVAL;
835 }
836
837 } else if (fe->ops.info.type == FE_QAM) {
838 if ((fe->ops.info.symbol_rate_min && 886 if ((fe->ops.info.symbol_rate_min &&
839 parms->u.qam.symbol_rate < fe->ops.info.symbol_rate_min) || 887 c->symbol_rate < fe->ops.info.symbol_rate_min) ||
840 (fe->ops.info.symbol_rate_max && 888 (fe->ops.info.symbol_rate_max &&
841 parms->u.qam.symbol_rate > fe->ops.info.symbol_rate_max)) { 889 c->symbol_rate > fe->ops.info.symbol_rate_max)) {
842 printk(KERN_WARNING "DVB: adapter %i frontend %i symbol rate %u out of range (%u..%u)\n", 890 printk(KERN_WARNING "DVB: adapter %i frontend %i symbol rate %u out of range (%u..%u)\n",
843 fe->dvb->num, fe->id, parms->u.qam.symbol_rate, 891 fe->dvb->num, fe->id, c->symbol_rate,
844 fe->ops.info.symbol_rate_min, fe->ops.info.symbol_rate_max); 892 fe->ops.info.symbol_rate_min,
893 fe->ops.info.symbol_rate_max);
845 return -EINVAL; 894 return -EINVAL;
846 } 895 }
847 } 896 default:
848 897 break;
849 /* check for supported modulation */
850 if (fe->ops.info.type == FE_QAM &&
851 (parms->u.qam.modulation > QAM_AUTO ||
852 !((1 << (parms->u.qam.modulation + 10)) & fe->ops.info.caps))) {
853 printk(KERN_WARNING "DVB: adapter %i frontend %i modulation %u not supported\n",
854 fe->dvb->num, fe->id, parms->u.qam.modulation);
855 return -EINVAL;
856 } 898 }
857 899
858 return 0; 900 return 0;
@@ -866,28 +908,52 @@ static int dvb_frontend_clear_cache(struct dvb_frontend *fe)
866 memset(c, 0, sizeof(struct dtv_frontend_properties)); 908 memset(c, 0, sizeof(struct dtv_frontend_properties));
867 909
868 c->state = DTV_CLEAR; 910 c->state = DTV_CLEAR;
869 c->delivery_system = SYS_UNDEFINED; 911
870 c->inversion = INVERSION_AUTO; 912 dprintk("%s() Clearing cache for delivery system %d\n", __func__,
871 c->fec_inner = FEC_AUTO; 913 c->delivery_system);
914
872 c->transmission_mode = TRANSMISSION_MODE_AUTO; 915 c->transmission_mode = TRANSMISSION_MODE_AUTO;
873 c->bandwidth_hz = BANDWIDTH_AUTO; 916 c->bandwidth_hz = 0; /* AUTO */
874 c->guard_interval = GUARD_INTERVAL_AUTO; 917 c->guard_interval = GUARD_INTERVAL_AUTO;
875 c->hierarchy = HIERARCHY_AUTO; 918 c->hierarchy = HIERARCHY_AUTO;
876 c->symbol_rate = QAM_AUTO; 919 c->symbol_rate = 0;
877 c->code_rate_HP = FEC_AUTO; 920 c->code_rate_HP = FEC_AUTO;
878 c->code_rate_LP = FEC_AUTO; 921 c->code_rate_LP = FEC_AUTO;
879 922 c->fec_inner = FEC_AUTO;
880 c->isdbt_partial_reception = -1; 923 c->rolloff = ROLLOFF_AUTO;
881 c->isdbt_sb_mode = -1; 924 c->voltage = SEC_VOLTAGE_OFF;
882 c->isdbt_sb_subchannel = -1; 925 c->sectone = SEC_TONE_OFF;
883 c->isdbt_sb_segment_idx = -1; 926 c->pilot = PILOT_AUTO;
884 c->isdbt_sb_segment_count = -1; 927
885 c->isdbt_layer_enabled = 0x7; 928 c->isdbt_partial_reception = 0;
929 c->isdbt_sb_mode = 0;
930 c->isdbt_sb_subchannel = 0;
931 c->isdbt_sb_segment_idx = 0;
932 c->isdbt_sb_segment_count = 0;
933 c->isdbt_layer_enabled = 0;
886 for (i = 0; i < 3; i++) { 934 for (i = 0; i < 3; i++) {
887 c->layer[i].fec = FEC_AUTO; 935 c->layer[i].fec = FEC_AUTO;
888 c->layer[i].modulation = QAM_AUTO; 936 c->layer[i].modulation = QAM_AUTO;
889 c->layer[i].interleaving = -1; 937 c->layer[i].interleaving = 0;
890 c->layer[i].segment_count = -1; 938 c->layer[i].segment_count = 0;
939 }
940
941 c->isdbs_ts_id = 0;
942 c->dvbt2_plp_id = 0;
943
944 switch (c->delivery_system) {
945 case SYS_DVBS:
946 case SYS_DVBS2:
947 case SYS_TURBO:
948 c->modulation = QPSK; /* implied for DVB-S in legacy API */
949 c->rolloff = ROLLOFF_35;/* implied for DVB-S */
950 break;
951 case SYS_ATSC:
952 c->modulation = VSB_8;
953 break;
954 default:
955 c->modulation = QAM_AUTO;
956 break;
891 } 957 }
892 958
893 return 0; 959 return 0;
@@ -973,6 +1039,8 @@ static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = {
973 _DTV_CMD(DTV_GUARD_INTERVAL, 0, 0), 1039 _DTV_CMD(DTV_GUARD_INTERVAL, 0, 0),
974 _DTV_CMD(DTV_TRANSMISSION_MODE, 0, 0), 1040 _DTV_CMD(DTV_TRANSMISSION_MODE, 0, 0),
975 _DTV_CMD(DTV_HIERARCHY, 0, 0), 1041 _DTV_CMD(DTV_HIERARCHY, 0, 0),
1042
1043 _DTV_CMD(DTV_ENUM_DELSYS, 0, 0),
976}; 1044};
977 1045
978static void dtv_property_dump(struct dtv_property *tvp) 1046static void dtv_property_dump(struct dtv_property *tvp)
@@ -1006,70 +1074,54 @@ static void dtv_property_dump(struct dtv_property *tvp)
1006 dprintk("%s() tvp.u.data = 0x%08x\n", __func__, tvp->u.data); 1074 dprintk("%s() tvp.u.data = 0x%08x\n", __func__, tvp->u.data);
1007} 1075}
1008 1076
1009static int is_legacy_delivery_system(fe_delivery_system_t s)
1010{
1011 if((s == SYS_UNDEFINED) || (s == SYS_DVBC_ANNEX_AC) ||
1012 (s == SYS_DVBC_ANNEX_B) || (s == SYS_DVBT) || (s == SYS_DVBS) ||
1013 (s == SYS_ATSC))
1014 return 1;
1015
1016 return 0;
1017}
1018
1019/* Initialize the cache with some default values derived from the
1020 * legacy frontend_info structure.
1021 */
1022static void dtv_property_cache_init(struct dvb_frontend *fe,
1023 struct dtv_frontend_properties *c)
1024{
1025 switch (fe->ops.info.type) {
1026 case FE_QPSK:
1027 c->modulation = QPSK; /* implied for DVB-S in legacy API */
1028 c->rolloff = ROLLOFF_35;/* implied for DVB-S */
1029 c->delivery_system = SYS_DVBS;
1030 break;
1031 case FE_QAM:
1032 c->delivery_system = SYS_DVBC_ANNEX_AC;
1033 break;
1034 case FE_OFDM:
1035 c->delivery_system = SYS_DVBT;
1036 break;
1037 case FE_ATSC:
1038 break;
1039 }
1040}
1041
1042/* Synchronise the legacy tuning parameters into the cache, so that demodulator 1077/* Synchronise the legacy tuning parameters into the cache, so that demodulator
1043 * drivers can use a single set_frontend tuning function, regardless of whether 1078 * drivers can use a single set_frontend tuning function, regardless of whether
1044 * it's being used for the legacy or new API, reducing code and complexity. 1079 * it's being used for the legacy or new API, reducing code and complexity.
1045 */ 1080 */
1046static void dtv_property_cache_sync(struct dvb_frontend *fe, 1081static int dtv_property_cache_sync(struct dvb_frontend *fe,
1047 struct dtv_frontend_properties *c, 1082 struct dtv_frontend_properties *c,
1048 const struct dvb_frontend_parameters *p) 1083 const struct dvb_frontend_parameters *p)
1049{ 1084{
1050 c->frequency = p->frequency; 1085 c->frequency = p->frequency;
1051 c->inversion = p->inversion; 1086 c->inversion = p->inversion;
1052 1087
1053 switch (fe->ops.info.type) { 1088 switch (dvbv3_type(c->delivery_system)) {
1054 case FE_QPSK: 1089 case DVBV3_QPSK:
1090 dprintk("%s() Preparing QPSK req\n", __func__);
1055 c->symbol_rate = p->u.qpsk.symbol_rate; 1091 c->symbol_rate = p->u.qpsk.symbol_rate;
1056 c->fec_inner = p->u.qpsk.fec_inner; 1092 c->fec_inner = p->u.qpsk.fec_inner;
1057 break; 1093 break;
1058 case FE_QAM: 1094 case DVBV3_QAM:
1095 dprintk("%s() Preparing QAM req\n", __func__);
1059 c->symbol_rate = p->u.qam.symbol_rate; 1096 c->symbol_rate = p->u.qam.symbol_rate;
1060 c->fec_inner = p->u.qam.fec_inner; 1097 c->fec_inner = p->u.qam.fec_inner;
1061 c->modulation = p->u.qam.modulation; 1098 c->modulation = p->u.qam.modulation;
1062 break; 1099 break;
1063 case FE_OFDM: 1100 case DVBV3_OFDM:
1064 if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ) 1101 dprintk("%s() Preparing OFDM req\n", __func__);
1065 c->bandwidth_hz = 6000000; 1102 switch (p->u.ofdm.bandwidth) {
1066 else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ) 1103 case BANDWIDTH_10_MHZ:
1067 c->bandwidth_hz = 7000000; 1104 c->bandwidth_hz = 10000000;
1068 else if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 1105 break;
1106 case BANDWIDTH_8_MHZ:
1069 c->bandwidth_hz = 8000000; 1107 c->bandwidth_hz = 8000000;
1070 else 1108 break;
1071 /* Including BANDWIDTH_AUTO */ 1109 case BANDWIDTH_7_MHZ:
1110 c->bandwidth_hz = 7000000;
1111 break;
1112 case BANDWIDTH_6_MHZ:
1113 c->bandwidth_hz = 6000000;
1114 break;
1115 case BANDWIDTH_5_MHZ:
1116 c->bandwidth_hz = 5000000;
1117 break;
1118 case BANDWIDTH_1_712_MHZ:
1119 c->bandwidth_hz = 1712000;
1120 break;
1121 case BANDWIDTH_AUTO:
1072 c->bandwidth_hz = 0; 1122 c->bandwidth_hz = 0;
1123 }
1124
1073 c->code_rate_HP = p->u.ofdm.code_rate_HP; 1125 c->code_rate_HP = p->u.ofdm.code_rate_HP;
1074 c->code_rate_LP = p->u.ofdm.code_rate_LP; 1126 c->code_rate_LP = p->u.ofdm.code_rate_LP;
1075 c->modulation = p->u.ofdm.constellation; 1127 c->modulation = p->u.ofdm.constellation;
@@ -1077,50 +1129,78 @@ static void dtv_property_cache_sync(struct dvb_frontend *fe,
1077 c->guard_interval = p->u.ofdm.guard_interval; 1129 c->guard_interval = p->u.ofdm.guard_interval;
1078 c->hierarchy = p->u.ofdm.hierarchy_information; 1130 c->hierarchy = p->u.ofdm.hierarchy_information;
1079 break; 1131 break;
1080 case FE_ATSC: 1132 case DVBV3_ATSC:
1133 dprintk("%s() Preparing ATSC req\n", __func__);
1081 c->modulation = p->u.vsb.modulation; 1134 c->modulation = p->u.vsb.modulation;
1082 if ((c->modulation == VSB_8) || (c->modulation == VSB_16)) 1135 if ((c->modulation == VSB_8) || (c->modulation == VSB_16))
1083 c->delivery_system = SYS_ATSC; 1136 c->delivery_system = SYS_ATSC;
1084 else 1137 else
1085 c->delivery_system = SYS_DVBC_ANNEX_B; 1138 c->delivery_system = SYS_DVBC_ANNEX_B;
1086 break; 1139 break;
1140 case DVBV3_UNKNOWN:
1141 printk(KERN_ERR
1142 "%s: doesn't know how to handle a DVBv3 call to delivery system %i\n",
1143 __func__, c->delivery_system);
1144 return -EINVAL;
1087 } 1145 }
1146
1147 return 0;
1088} 1148}
1089 1149
1090/* Ensure the cached values are set correctly in the frontend 1150/* Ensure the cached values are set correctly in the frontend
1091 * legacy tuning structures, for the advanced tuning API. 1151 * legacy tuning structures, for the advanced tuning API.
1092 */ 1152 */
1093static void dtv_property_legacy_params_sync(struct dvb_frontend *fe) 1153static int dtv_property_legacy_params_sync(struct dvb_frontend *fe,
1154 struct dvb_frontend_parameters *p)
1094{ 1155{
1095 const struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1156 const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1096 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1097 struct dvb_frontend_parameters *p = &fepriv->parameters_in;
1098 1157
1099 p->frequency = c->frequency; 1158 p->frequency = c->frequency;
1100 p->inversion = c->inversion; 1159 p->inversion = c->inversion;
1101 1160
1102 switch (fe->ops.info.type) { 1161 switch (dvbv3_type(c->delivery_system)) {
1103 case FE_QPSK: 1162 case DVBV3_UNKNOWN:
1163 printk(KERN_ERR
1164 "%s: doesn't know how to handle a DVBv3 call to delivery system %i\n",
1165 __func__, c->delivery_system);
1166 return -EINVAL;
1167 case DVBV3_QPSK:
1104 dprintk("%s() Preparing QPSK req\n", __func__); 1168 dprintk("%s() Preparing QPSK req\n", __func__);
1105 p->u.qpsk.symbol_rate = c->symbol_rate; 1169 p->u.qpsk.symbol_rate = c->symbol_rate;
1106 p->u.qpsk.fec_inner = c->fec_inner; 1170 p->u.qpsk.fec_inner = c->fec_inner;
1107 break; 1171 break;
1108 case FE_QAM: 1172 case DVBV3_QAM:
1109 dprintk("%s() Preparing QAM req\n", __func__); 1173 dprintk("%s() Preparing QAM req\n", __func__);
1110 p->u.qam.symbol_rate = c->symbol_rate; 1174 p->u.qam.symbol_rate = c->symbol_rate;
1111 p->u.qam.fec_inner = c->fec_inner; 1175 p->u.qam.fec_inner = c->fec_inner;
1112 p->u.qam.modulation = c->modulation; 1176 p->u.qam.modulation = c->modulation;
1113 break; 1177 break;
1114 case FE_OFDM: 1178 case DVBV3_OFDM:
1115 dprintk("%s() Preparing OFDM req\n", __func__); 1179 dprintk("%s() Preparing OFDM req\n", __func__);
1116 if (c->bandwidth_hz == 6000000) 1180
1117 p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; 1181 switch (c->bandwidth_hz) {
1118 else if (c->bandwidth_hz == 7000000) 1182 case 10000000:
1119 p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ; 1183 p->u.ofdm.bandwidth = BANDWIDTH_10_MHZ;
1120 else if (c->bandwidth_hz == 8000000) 1184 break;
1185 case 8000000:
1121 p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 1186 p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
1122 else 1187 break;
1188 case 7000000:
1189 p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
1190 break;
1191 case 6000000:
1192 p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
1193 break;
1194 case 5000000:
1195 p->u.ofdm.bandwidth = BANDWIDTH_5_MHZ;
1196 break;
1197 case 1712000:
1198 p->u.ofdm.bandwidth = BANDWIDTH_1_712_MHZ;
1199 break;
1200 case 0:
1201 default:
1123 p->u.ofdm.bandwidth = BANDWIDTH_AUTO; 1202 p->u.ofdm.bandwidth = BANDWIDTH_AUTO;
1203 }
1124 p->u.ofdm.code_rate_HP = c->code_rate_HP; 1204 p->u.ofdm.code_rate_HP = c->code_rate_HP;
1125 p->u.ofdm.code_rate_LP = c->code_rate_LP; 1205 p->u.ofdm.code_rate_LP = c->code_rate_LP;
1126 p->u.ofdm.constellation = c->modulation; 1206 p->u.ofdm.constellation = c->modulation;
@@ -1128,78 +1208,40 @@ static void dtv_property_legacy_params_sync(struct dvb_frontend *fe)
1128 p->u.ofdm.guard_interval = c->guard_interval; 1208 p->u.ofdm.guard_interval = c->guard_interval;
1129 p->u.ofdm.hierarchy_information = c->hierarchy; 1209 p->u.ofdm.hierarchy_information = c->hierarchy;
1130 break; 1210 break;
1131 case FE_ATSC: 1211 case DVBV3_ATSC:
1132 dprintk("%s() Preparing VSB req\n", __func__); 1212 dprintk("%s() Preparing VSB req\n", __func__);
1133 p->u.vsb.modulation = c->modulation; 1213 p->u.vsb.modulation = c->modulation;
1134 break; 1214 break;
1135 } 1215 }
1216 return 0;
1136} 1217}
1137 1218
1138/* Ensure the cached values are set correctly in the frontend 1219/**
1139 * legacy tuning structures, for the legacy tuning API. 1220 * dtv_get_frontend - calls a callback for retrieving DTV parameters
1221 * @fe: struct dvb_frontend pointer
1222 * @c: struct dtv_frontend_properties pointer (DVBv5 cache)
1223 * @p_out struct dvb_frontend_parameters pointer (DVBv3 FE struct)
1224 *
1225 * This routine calls either the DVBv3 or DVBv5 get_frontend call.
1226 * If c is not null, it will update the DVBv5 cache struct pointed by it.
1227 * If p_out is not null, it will update the DVBv3 params pointed by it.
1140 */ 1228 */
1141static void dtv_property_adv_params_sync(struct dvb_frontend *fe) 1229static int dtv_get_frontend(struct dvb_frontend *fe,
1230 struct dvb_frontend_parameters *p_out)
1142{ 1231{
1143 const struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1232 int r;
1144 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1145 struct dvb_frontend_parameters *p = &fepriv->parameters_in;
1146
1147 p->frequency = c->frequency;
1148 p->inversion = c->inversion;
1149
1150 if (c->delivery_system == SYS_DSS ||
1151 c->delivery_system == SYS_DVBS ||
1152 c->delivery_system == SYS_DVBS2 ||
1153 c->delivery_system == SYS_ISDBS ||
1154 c->delivery_system == SYS_TURBO) {
1155 p->u.qpsk.symbol_rate = c->symbol_rate;
1156 p->u.qpsk.fec_inner = c->fec_inner;
1157 }
1158 1233
1159 /* Fake out a generic DVB-T request so we pass validation in the ioctl */ 1234 if (fe->ops.get_frontend) {
1160 if ((c->delivery_system == SYS_ISDBT) || 1235 r = fe->ops.get_frontend(fe);
1161 (c->delivery_system == SYS_DVBT2)) { 1236 if (unlikely(r < 0))
1162 p->u.ofdm.constellation = QAM_AUTO; 1237 return r;
1163 p->u.ofdm.code_rate_HP = FEC_AUTO; 1238 if (p_out)
1164 p->u.ofdm.code_rate_LP = FEC_AUTO; 1239 dtv_property_legacy_params_sync(fe, p_out);
1165 p->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO; 1240 return 0;
1166 p->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
1167 p->u.ofdm.hierarchy_information = HIERARCHY_AUTO;
1168 if (c->bandwidth_hz == 8000000)
1169 p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
1170 else if (c->bandwidth_hz == 7000000)
1171 p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
1172 else if (c->bandwidth_hz == 6000000)
1173 p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
1174 else
1175 p->u.ofdm.bandwidth = BANDWIDTH_AUTO;
1176 } 1241 }
1177}
1178
1179static void dtv_property_cache_submit(struct dvb_frontend *fe)
1180{
1181 const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1182 1242
1183 /* For legacy delivery systems we don't need the delivery_system to 1243 /* As everything is in cache, get_frontend fops are always supported */
1184 * be specified, but we populate the older structures from the cache 1244 return 0;
1185 * so we can call set_frontend on older drivers.
1186 */
1187 if(is_legacy_delivery_system(c->delivery_system)) {
1188
1189 dprintk("%s() legacy, modulation = %d\n", __func__, c->modulation);
1190 dtv_property_legacy_params_sync(fe);
1191
1192 } else {
1193 dprintk("%s() adv, modulation = %d\n", __func__, c->modulation);
1194
1195 /* For advanced delivery systems / modulation types ...
1196 * we seed the lecacy dvb_frontend_parameters structure
1197 * so that the sanity checking code later in the IOCTL processing
1198 * can validate our basic frequency ranges, symbolrates, modulation
1199 * etc.
1200 */
1201 dtv_property_adv_params_sync(fe);
1202 }
1203} 1245}
1204 1246
1205static int dvb_frontend_ioctl_legacy(struct file *file, 1247static int dvb_frontend_ioctl_legacy(struct file *file,
@@ -1208,25 +1250,21 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1208 unsigned int cmd, void *parg); 1250 unsigned int cmd, void *parg);
1209 1251
1210static int dtv_property_process_get(struct dvb_frontend *fe, 1252static int dtv_property_process_get(struct dvb_frontend *fe,
1253 const struct dtv_frontend_properties *c,
1211 struct dtv_property *tvp, 1254 struct dtv_property *tvp,
1212 struct file *file) 1255 struct file *file)
1213{ 1256{
1214 const struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1257 int r, ncaps;
1215 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1216 struct dtv_frontend_properties cdetected;
1217 int r;
1218
1219 /*
1220 * If the driver implements a get_frontend function, then convert
1221 * detected parameters to S2API properties.
1222 */
1223 if (fe->ops.get_frontend) {
1224 cdetected = *c;
1225 dtv_property_cache_sync(fe, &cdetected, &fepriv->parameters_out);
1226 c = &cdetected;
1227 }
1228 1258
1229 switch(tvp->cmd) { 1259 switch(tvp->cmd) {
1260 case DTV_ENUM_DELSYS:
1261 ncaps = 0;
1262 while (fe->ops.delsys[ncaps] && ncaps < MAX_DELSYS) {
1263 tvp->u.buffer.data[ncaps] = fe->ops.delsys[ncaps];
1264 ncaps++;
1265 }
1266 tvp->u.buffer.len = ncaps;
1267 break;
1230 case DTV_FREQUENCY: 1268 case DTV_FREQUENCY:
1231 tvp->u.data = c->frequency; 1269 tvp->u.data = c->frequency;
1232 break; 1270 break;
@@ -1356,14 +1394,159 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
1356 return 0; 1394 return 0;
1357} 1395}
1358 1396
1397static int dtv_set_frontend(struct dvb_frontend *fe);
1398
1399static bool is_dvbv3_delsys(u32 delsys)
1400{
1401 bool status;
1402
1403 status = (delsys == SYS_DVBT) || (delsys == SYS_DVBC_ANNEX_A) ||
1404 (delsys == SYS_DVBS) || (delsys == SYS_ATSC);
1405
1406 return status;
1407}
1408
1409static int set_delivery_system(struct dvb_frontend *fe, u32 desired_system)
1410{
1411 int ncaps, i;
1412 u32 delsys = SYS_UNDEFINED;
1413 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1414 enum dvbv3_emulation_type type;
1415
1416 if (desired_system == SYS_UNDEFINED) {
1417 /*
1418 * A DVBv3 call doesn't know what's the desired system.
1419 * Also, DVBv3 applications don't know that ops.info->type
1420 * could be changed, and they simply dies when it doesn't
1421 * match.
1422 * So, don't change the current delivery system, as it
1423 * may be trying to do the wrong thing, like setting an
1424 * ISDB-T frontend as DVB-T. Instead, find the closest
1425 * DVBv3 system that matches the delivery system.
1426 */
1427 if (is_dvbv3_delsys(c->delivery_system)) {
1428 dprintk("%s() Using delivery system to %d\n",
1429 __func__, c->delivery_system);
1430 return 0;
1431 }
1432 type = dvbv3_type(c->delivery_system);
1433 switch (type) {
1434 case DVBV3_QPSK:
1435 desired_system = SYS_DVBS;
1436 break;
1437 case DVBV3_QAM:
1438 desired_system = SYS_DVBC_ANNEX_A;
1439 break;
1440 case DVBV3_ATSC:
1441 desired_system = SYS_ATSC;
1442 break;
1443 case DVBV3_OFDM:
1444 desired_system = SYS_DVBT;
1445 break;
1446 default:
1447 dprintk("%s(): This frontend doesn't support DVBv3 calls\n",
1448 __func__);
1449 return -EINVAL;
1450 }
1451 } else {
1452 /*
1453 * This is a DVBv5 call. So, it likely knows the supported
1454 * delivery systems.
1455 */
1456
1457 /* Check if the desired delivery system is supported */
1458 ncaps = 0;
1459 while (fe->ops.delsys[ncaps] && ncaps < MAX_DELSYS) {
1460 if (fe->ops.delsys[ncaps] == desired_system) {
1461 c->delivery_system = desired_system;
1462 dprintk("%s() Changing delivery system to %d\n",
1463 __func__, desired_system);
1464 return 0;
1465 }
1466 ncaps++;
1467 }
1468 type = dvbv3_type(desired_system);
1469
1470 /*
1471 * The delivery system is not supported. See if it can be
1472 * emulated.
1473 * The emulation only works if the desired system is one of the
1474 * DVBv3 delivery systems
1475 */
1476 if (!is_dvbv3_delsys(desired_system)) {
1477 dprintk("%s() can't use a DVBv3 FE_SET_FRONTEND call on this frontend\n",
1478 __func__);
1479 return -EINVAL;
1480 }
1481
1482 /*
1483 * Get the last non-DVBv3 delivery system that has the same type
1484 * of the desired system
1485 */
1486 ncaps = 0;
1487 while (fe->ops.delsys[ncaps] && ncaps < MAX_DELSYS) {
1488 if ((dvbv3_type(fe->ops.delsys[ncaps]) == type) &&
1489 !is_dvbv3_delsys(fe->ops.delsys[ncaps]))
1490 delsys = fe->ops.delsys[ncaps];
1491 ncaps++;
1492 }
1493 /* There's nothing compatible with the desired delivery system */
1494 if (delsys == SYS_UNDEFINED) {
1495 dprintk("%s() Incompatible DVBv3 FE_SET_FRONTEND call for this frontend\n",
1496 __func__);
1497 return -EINVAL;
1498 }
1499 c->delivery_system = delsys;
1500 }
1501
1502 /*
1503 * The DVBv3 or DVBv5 call is requesting a different system. So,
1504 * emulation is needed.
1505 *
1506 * Emulate newer delivery systems like ISDBT, DVBT and DMBTH
1507 * for older DVBv5 applications. The emulation will try to use
1508 * the auto mode for most things, and will assume that the desired
1509 * delivery system is the last one at the ops.delsys[] array
1510 */
1511 dprintk("%s() Using delivery system %d emulated as if it were a %d\n",
1512 __func__, delsys, desired_system);
1513
1514 /*
1515 * For now, handles ISDB-T calls. More code may be needed here for the
1516 * other emulated stuff
1517 */
1518 if (type == DVBV3_OFDM) {
1519 if (c->delivery_system == SYS_ISDBT) {
1520 dprintk("%s() Using defaults for SYS_ISDBT\n",
1521 __func__);
1522 if (!c->bandwidth_hz)
1523 c->bandwidth_hz = 6000000;
1524
1525 c->isdbt_partial_reception = 0;
1526 c->isdbt_sb_mode = 0;
1527 c->isdbt_sb_subchannel = 0;
1528 c->isdbt_sb_segment_idx = 0;
1529 c->isdbt_sb_segment_count = 0;
1530 c->isdbt_layer_enabled = 0;
1531 for (i = 0; i < 3; i++) {
1532 c->layer[i].fec = FEC_AUTO;
1533 c->layer[i].modulation = QAM_AUTO;
1534 c->layer[i].interleaving = 0;
1535 c->layer[i].segment_count = 0;
1536 }
1537 }
1538 }
1539 dprintk("change delivery system on cache to %d\n", c->delivery_system);
1540
1541 return 0;
1542}
1543
1359static int dtv_property_process_set(struct dvb_frontend *fe, 1544static int dtv_property_process_set(struct dvb_frontend *fe,
1360 struct dtv_property *tvp, 1545 struct dtv_property *tvp,
1361 struct file *file) 1546 struct file *file)
1362{ 1547{
1363 int r = 0; 1548 int r = 0;
1364 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1549 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1365 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1366 dtv_property_dump(tvp);
1367 1550
1368 /* Allow the frontend to validate incoming properties */ 1551 /* Allow the frontend to validate incoming properties */
1369 if (fe->ops.set_property) { 1552 if (fe->ops.set_property) {
@@ -1374,11 +1557,11 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
1374 1557
1375 switch(tvp->cmd) { 1558 switch(tvp->cmd) {
1376 case DTV_CLEAR: 1559 case DTV_CLEAR:
1377 /* Reset a cache of data specific to the frontend here. This does 1560 /*
1561 * Reset a cache of data specific to the frontend here. This does
1378 * not effect hardware. 1562 * not effect hardware.
1379 */ 1563 */
1380 dvb_frontend_clear_cache(fe); 1564 dvb_frontend_clear_cache(fe);
1381 dprintk("%s() Flushing property cache\n", __func__);
1382 break; 1565 break;
1383 case DTV_TUNE: 1566 case DTV_TUNE:
1384 /* interpret the cache of data, build either a traditional frontend 1567 /* interpret the cache of data, build either a traditional frontend
@@ -1387,10 +1570,8 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
1387 */ 1570 */
1388 c->state = tvp->cmd; 1571 c->state = tvp->cmd;
1389 dprintk("%s() Finalised property cache\n", __func__); 1572 dprintk("%s() Finalised property cache\n", __func__);
1390 dtv_property_cache_submit(fe);
1391 1573
1392 r = dvb_frontend_ioctl_legacy(file, FE_SET_FRONTEND, 1574 r = dtv_set_frontend(fe);
1393 &fepriv->parameters_in);
1394 break; 1575 break;
1395 case DTV_FREQUENCY: 1576 case DTV_FREQUENCY:
1396 c->frequency = tvp->u.data; 1577 c->frequency = tvp->u.data;
@@ -1417,7 +1598,7 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
1417 c->rolloff = tvp->u.data; 1598 c->rolloff = tvp->u.data;
1418 break; 1599 break;
1419 case DTV_DELIVERY_SYSTEM: 1600 case DTV_DELIVERY_SYSTEM:
1420 c->delivery_system = tvp->u.data; 1601 r = set_delivery_system(fe, tvp->u.data);
1421 break; 1602 break;
1422 case DTV_VOLTAGE: 1603 case DTV_VOLTAGE:
1423 c->voltage = tvp->u.data; 1604 c->voltage = tvp->u.data;
@@ -1594,7 +1775,6 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1594 1775
1595 } else 1776 } else
1596 if(cmd == FE_GET_PROPERTY) { 1777 if(cmd == FE_GET_PROPERTY) {
1597
1598 tvps = (struct dtv_properties __user *)parg; 1778 tvps = (struct dtv_properties __user *)parg;
1599 1779
1600 dprintk("%s() properties.num = %d\n", __func__, tvps->num); 1780 dprintk("%s() properties.num = %d\n", __func__, tvps->num);
@@ -1616,8 +1796,13 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1616 goto out; 1796 goto out;
1617 } 1797 }
1618 1798
1799 /*
1800 * Fills the cache out struct with the cache contents, plus
1801 * the data retrieved from get_frontend.
1802 */
1803 dtv_get_frontend(fe, NULL);
1619 for (i = 0; i < tvps->num; i++) { 1804 for (i = 0; i < tvps->num; i++) {
1620 err = dtv_property_process_get(fe, tvp + i, file); 1805 err = dtv_property_process_get(fe, c, tvp + i, file);
1621 if (err < 0) 1806 if (err < 0)
1622 goto out; 1807 goto out;
1623 (tvp + i)->result = err; 1808 (tvp + i)->result = err;
@@ -1636,12 +1821,121 @@ out:
1636 return err; 1821 return err;
1637} 1822}
1638 1823
1824static int dtv_set_frontend(struct dvb_frontend *fe)
1825{
1826 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1827 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1828 struct dvb_frontend_tune_settings fetunesettings;
1829 u32 rolloff = 0;
1830
1831 if (dvb_frontend_check_parameters(fe) < 0)
1832 return -EINVAL;
1833
1834 /*
1835 * Be sure that the bandwidth will be filled for all
1836 * non-satellite systems, as tuners need to know what
1837 * low pass/Nyquist half filter should be applied, in
1838 * order to avoid inter-channel noise.
1839 *
1840 * ISDB-T and DVB-T/T2 already sets bandwidth.
1841 * ATSC and DVB-C don't set, so, the core should fill it.
1842 *
1843 * On DVB-C Annex A and C, the bandwidth is a function of
1844 * the roll-off and symbol rate. Annex B defines different
1845 * roll-off factors depending on the modulation. Fortunately,
1846 * Annex B is only used with 6MHz, so there's no need to
1847 * calculate it.
1848 *
1849 * While not officially supported, a side effect of handling it at
1850 * the cache level is that a program could retrieve the bandwidth
1851 * via DTV_BANDWIDTH_HZ, which may be useful for test programs.
1852 */
1853 switch (c->delivery_system) {
1854 case SYS_ATSC:
1855 case SYS_DVBC_ANNEX_B:
1856 c->bandwidth_hz = 6000000;
1857 break;
1858 case SYS_DVBC_ANNEX_A:
1859 rolloff = 115;
1860 break;
1861 case SYS_DVBC_ANNEX_C:
1862 rolloff = 113;
1863 break;
1864 default:
1865 break;
1866 }
1867 if (rolloff)
1868 c->bandwidth_hz = (c->symbol_rate * rolloff) / 100;
1869
1870 /* force auto frequency inversion if requested */
1871 if (dvb_force_auto_inversion)
1872 c->inversion = INVERSION_AUTO;
1873
1874 /*
1875 * without hierarchical coding code_rate_LP is irrelevant,
1876 * so we tolerate the otherwise invalid FEC_NONE setting
1877 */
1878 if (c->hierarchy == HIERARCHY_NONE && c->code_rate_LP == FEC_NONE)
1879 c->code_rate_LP = FEC_AUTO;
1880
1881 /* get frontend-specific tuning settings */
1882 memset(&fetunesettings, 0, sizeof(struct dvb_frontend_tune_settings));
1883 if (fe->ops.get_tune_settings && (fe->ops.get_tune_settings(fe, &fetunesettings) == 0)) {
1884 fepriv->min_delay = (fetunesettings.min_delay_ms * HZ) / 1000;
1885 fepriv->max_drift = fetunesettings.max_drift;
1886 fepriv->step_size = fetunesettings.step_size;
1887 } else {
1888 /* default values */
1889 switch (c->delivery_system) {
1890 case SYS_DVBC_ANNEX_A:
1891 case SYS_DVBC_ANNEX_C:
1892 fepriv->min_delay = HZ / 20;
1893 fepriv->step_size = c->symbol_rate / 16000;
1894 fepriv->max_drift = c->symbol_rate / 2000;
1895 break;
1896 case SYS_DVBT:
1897 case SYS_DVBT2:
1898 case SYS_ISDBT:
1899 case SYS_DMBTH:
1900 fepriv->min_delay = HZ / 20;
1901 fepriv->step_size = fe->ops.info.frequency_stepsize * 2;
1902 fepriv->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
1903 break;
1904 default:
1905 /*
1906 * FIXME: This sounds wrong! if freqency_stepsize is
1907 * defined by the frontend, why not use it???
1908 */
1909 fepriv->min_delay = HZ / 20;
1910 fepriv->step_size = 0; /* no zigzag */
1911 fepriv->max_drift = 0;
1912 break;
1913 }
1914 }
1915 if (dvb_override_tune_delay > 0)
1916 fepriv->min_delay = (dvb_override_tune_delay * HZ) / 1000;
1917
1918 fepriv->state = FESTATE_RETUNE;
1919
1920 /* Request the search algorithm to search */
1921 fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
1922
1923 dvb_frontend_clear_events(fe);
1924 dvb_frontend_add_event(fe, 0);
1925 dvb_frontend_wakeup(fe);
1926 fepriv->status = 0;
1927
1928 return 0;
1929}
1930
1931
1639static int dvb_frontend_ioctl_legacy(struct file *file, 1932static int dvb_frontend_ioctl_legacy(struct file *file,
1640 unsigned int cmd, void *parg) 1933 unsigned int cmd, void *parg)
1641{ 1934{
1642 struct dvb_device *dvbdev = file->private_data; 1935 struct dvb_device *dvbdev = file->private_data;
1643 struct dvb_frontend *fe = dvbdev->priv; 1936 struct dvb_frontend *fe = dvbdev->priv;
1644 struct dvb_frontend_private *fepriv = fe->frontend_priv; 1937 struct dvb_frontend_private *fepriv = fe->frontend_priv;
1938 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1645 int cb_err, err = -EOPNOTSUPP; 1939 int cb_err, err = -EOPNOTSUPP;
1646 1940
1647 if (fe->dvb->fe_ioctl_override) { 1941 if (fe->dvb->fe_ioctl_override) {
@@ -1658,9 +1952,43 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
1658 switch (cmd) { 1952 switch (cmd) {
1659 case FE_GET_INFO: { 1953 case FE_GET_INFO: {
1660 struct dvb_frontend_info* info = parg; 1954 struct dvb_frontend_info* info = parg;
1955
1661 memcpy(info, &fe->ops.info, sizeof(struct dvb_frontend_info)); 1956 memcpy(info, &fe->ops.info, sizeof(struct dvb_frontend_info));
1662 dvb_frontend_get_frequency_limits(fe, &info->frequency_min, &info->frequency_max); 1957 dvb_frontend_get_frequency_limits(fe, &info->frequency_min, &info->frequency_max);
1663 1958
1959 /*
1960 * Associate the 4 delivery systems supported by DVBv3
1961 * API with their DVBv5 counterpart. For the other standards,
1962 * use the closest type, assuming that it would hopefully
1963 * work with a DVBv3 application.
1964 * It should be noticed that, on multi-frontend devices with
1965 * different types (terrestrial and cable, for example),
1966 * a pure DVBv3 application won't be able to use all delivery
1967 * systems. Yet, changing the DVBv5 cache to the other delivery
1968 * system should be enough for making it work.
1969 */
1970 switch (dvbv3_type(c->delivery_system)) {
1971 case DVBV3_QPSK:
1972 info->type = FE_QPSK;
1973 break;
1974 case DVBV3_ATSC:
1975 info->type = FE_ATSC;
1976 break;
1977 case DVBV3_QAM:
1978 info->type = FE_QAM;
1979 break;
1980 case DVBV3_OFDM:
1981 info->type = FE_OFDM;
1982 break;
1983 default:
1984 printk(KERN_ERR
1985 "%s: doesn't know how to handle a DVBv3 call to delivery system %i\n",
1986 __func__, c->delivery_system);
1987 fe->ops.info.type = FE_OFDM;
1988 }
1989 dprintk("current delivery system on cache: %d, V3 type: %d\n",
1990 c->delivery_system, fe->ops.info.type);
1991
1664 /* Force the CAN_INVERSION_AUTO bit on. If the frontend doesn't 1992 /* Force the CAN_INVERSION_AUTO bit on. If the frontend doesn't
1665 * do it, it is done for it. */ 1993 * do it, it is done for it. */
1666 info->caps |= FE_CAN_INVERSION_AUTO; 1994 info->caps |= FE_CAN_INVERSION_AUTO;
@@ -1819,108 +2147,22 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
1819 err = fe->ops.enable_high_lnb_voltage(fe, (long) parg); 2147 err = fe->ops.enable_high_lnb_voltage(fe, (long) parg);
1820 break; 2148 break;
1821 2149
1822 case FE_SET_FRONTEND: { 2150 case FE_SET_FRONTEND:
1823 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 2151 err = set_delivery_system(fe, SYS_UNDEFINED);
1824 struct dvb_frontend_tune_settings fetunesettings; 2152 if (err)
1825 2153 break;
1826 if (c->state == DTV_TUNE) {
1827 if (dvb_frontend_check_parameters(fe, &fepriv->parameters_in) < 0) {
1828 err = -EINVAL;
1829 break;
1830 }
1831 } else {
1832 if (dvb_frontend_check_parameters(fe, parg) < 0) {
1833 err = -EINVAL;
1834 break;
1835 }
1836
1837 memcpy (&fepriv->parameters_in, parg,
1838 sizeof (struct dvb_frontend_parameters));
1839 dtv_property_cache_init(fe, c);
1840 dtv_property_cache_sync(fe, c, &fepriv->parameters_in);
1841 }
1842
1843 /*
1844 * Initialize output parameters to match the values given by
1845 * the user. FE_SET_FRONTEND triggers an initial frontend event
1846 * with status = 0, which copies output parameters to userspace.
1847 */
1848 fepriv->parameters_out = fepriv->parameters_in;
1849
1850 memset(&fetunesettings, 0, sizeof(struct dvb_frontend_tune_settings));
1851 memcpy(&fetunesettings.parameters, parg,
1852 sizeof (struct dvb_frontend_parameters));
1853
1854 /* force auto frequency inversion if requested */
1855 if (dvb_force_auto_inversion) {
1856 fepriv->parameters_in.inversion = INVERSION_AUTO;
1857 fetunesettings.parameters.inversion = INVERSION_AUTO;
1858 }
1859 if (fe->ops.info.type == FE_OFDM) {
1860 /* without hierarchical coding code_rate_LP is irrelevant,
1861 * so we tolerate the otherwise invalid FEC_NONE setting */
1862 if (fepriv->parameters_in.u.ofdm.hierarchy_information == HIERARCHY_NONE &&
1863 fepriv->parameters_in.u.ofdm.code_rate_LP == FEC_NONE)
1864 fepriv->parameters_in.u.ofdm.code_rate_LP = FEC_AUTO;
1865 }
1866
1867 /* get frontend-specific tuning settings */
1868 if (fe->ops.get_tune_settings && (fe->ops.get_tune_settings(fe, &fetunesettings) == 0)) {
1869 fepriv->min_delay = (fetunesettings.min_delay_ms * HZ) / 1000;
1870 fepriv->max_drift = fetunesettings.max_drift;
1871 fepriv->step_size = fetunesettings.step_size;
1872 } else {
1873 /* default values */
1874 switch(fe->ops.info.type) {
1875 case FE_QPSK:
1876 fepriv->min_delay = HZ/20;
1877 fepriv->step_size = fepriv->parameters_in.u.qpsk.symbol_rate / 16000;
1878 fepriv->max_drift = fepriv->parameters_in.u.qpsk.symbol_rate / 2000;
1879 break;
1880
1881 case FE_QAM:
1882 fepriv->min_delay = HZ/20;
1883 fepriv->step_size = 0; /* no zigzag */
1884 fepriv->max_drift = 0;
1885 break;
1886
1887 case FE_OFDM:
1888 fepriv->min_delay = HZ/20;
1889 fepriv->step_size = fe->ops.info.frequency_stepsize * 2;
1890 fepriv->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
1891 break;
1892 case FE_ATSC:
1893 fepriv->min_delay = HZ/20;
1894 fepriv->step_size = 0;
1895 fepriv->max_drift = 0;
1896 break;
1897 }
1898 }
1899 if (dvb_override_tune_delay > 0)
1900 fepriv->min_delay = (dvb_override_tune_delay * HZ) / 1000;
1901
1902 fepriv->state = FESTATE_RETUNE;
1903
1904 /* Request the search algorithm to search */
1905 fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
1906 2154
1907 dvb_frontend_clear_events(fe); 2155 err = dtv_property_cache_sync(fe, c, parg);
1908 dvb_frontend_add_event(fe, 0); 2156 if (err)
1909 dvb_frontend_wakeup(fe); 2157 break;
1910 fepriv->status = 0; 2158 err = dtv_set_frontend(fe);
1911 err = 0;
1912 break; 2159 break;
1913 }
1914
1915 case FE_GET_EVENT: 2160 case FE_GET_EVENT:
1916 err = dvb_frontend_get_event (fe, parg, file->f_flags); 2161 err = dvb_frontend_get_event (fe, parg, file->f_flags);
1917 break; 2162 break;
1918 2163
1919 case FE_GET_FRONTEND: 2164 case FE_GET_FRONTEND:
1920 if (fe->ops.get_frontend) { 2165 err = dtv_get_frontend(fe, parg);
1921 err = fe->ops.get_frontend(fe, &fepriv->parameters_out);
1922 memcpy(parg, &fepriv->parameters_out, sizeof(struct dvb_frontend_parameters));
1923 }
1924 break; 2166 break;
1925 2167
1926 case FE_SET_FRONTEND_TUNE_MODE: 2168 case FE_SET_FRONTEND_TUNE_MODE:
@@ -2061,12 +2303,15 @@ static int dvb_frontend_release(struct inode *inode, struct file *file)
2061 2303
2062 dprintk ("%s\n", __func__); 2304 dprintk ("%s\n", __func__);
2063 2305
2064 if ((file->f_flags & O_ACCMODE) != O_RDONLY) 2306 if ((file->f_flags & O_ACCMODE) != O_RDONLY) {
2065 fepriv->release_jiffies = jiffies; 2307 fepriv->release_jiffies = jiffies;
2308 mb();
2309 }
2066 2310
2067 ret = dvb_generic_release (inode, file); 2311 ret = dvb_generic_release (inode, file);
2068 2312
2069 if (dvbdev->users == -1) { 2313 if (dvbdev->users == -1) {
2314 wake_up(&fepriv->wait_queue);
2070 if (fepriv->exit != DVB_FE_NO_EXIT) { 2315 if (fepriv->exit != DVB_FE_NO_EXIT) {
2071 fops_put(file->f_op); 2316 fops_put(file->f_op);
2072 file->f_op = NULL; 2317 file->f_op = NULL;
@@ -2127,6 +2372,14 @@ int dvb_register_frontend(struct dvb_adapter* dvb,
2127 dvb_register_device (fe->dvb, &fepriv->dvbdev, &dvbdev_template, 2372 dvb_register_device (fe->dvb, &fepriv->dvbdev, &dvbdev_template,
2128 fe, DVB_DEVICE_FRONTEND); 2373 fe, DVB_DEVICE_FRONTEND);
2129 2374
2375 /*
2376 * Initialize the cache to the proper values according with the
2377 * first supported delivery system (ops->delsys[0])
2378 */
2379
2380 fe->dtv_property_cache.delivery_system = fe->ops.delsys[0];
2381 dvb_frontend_clear_cache(fe);
2382
2130 mutex_unlock(&frontend_mutex); 2383 mutex_unlock(&frontend_mutex);
2131 return 0; 2384 return 0;
2132} 2385}
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h
index 67bbfa72801..d63a8215fe0 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.h
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.h
@@ -42,11 +42,16 @@
42 42
43#include "dvbdev.h" 43#include "dvbdev.h"
44 44
45/*
46 * Maximum number of Delivery systems per frontend. It
47 * should be smaller or equal to 32
48 */
49#define MAX_DELSYS 8
50
45struct dvb_frontend_tune_settings { 51struct dvb_frontend_tune_settings {
46 int min_delay_ms; 52 int min_delay_ms;
47 int step_size; 53 int step_size;
48 int max_drift; 54 int max_drift;
49 struct dvb_frontend_parameters parameters;
50}; 55};
51 56
52struct dvb_frontend; 57struct dvb_frontend;
@@ -198,11 +203,11 @@ struct dvb_tuner_ops {
198 int (*sleep)(struct dvb_frontend *fe); 203 int (*sleep)(struct dvb_frontend *fe);
199 204
200 /** This is for simple PLLs - set all parameters in one go. */ 205 /** This is for simple PLLs - set all parameters in one go. */
201 int (*set_params)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p); 206 int (*set_params)(struct dvb_frontend *fe);
202 int (*set_analog_params)(struct dvb_frontend *fe, struct analog_parameters *p); 207 int (*set_analog_params)(struct dvb_frontend *fe, struct analog_parameters *p);
203 208
204 /** This is support for demods like the mt352 - fills out the supplied buffer with what to write. */ 209 /** This is support for demods like the mt352 - fills out the supplied buffer with what to write. */
205 int (*calc_regs)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p, u8 *buf, int buf_len); 210 int (*calc_regs)(struct dvb_frontend *fe, u8 *buf, int buf_len);
206 211
207 /** This is to allow setting tuner-specific configs */ 212 /** This is to allow setting tuner-specific configs */
208 int (*set_config)(struct dvb_frontend *fe, void *priv_cfg); 213 int (*set_config)(struct dvb_frontend *fe, void *priv_cfg);
@@ -250,10 +255,14 @@ struct analog_demod_ops {
250 int (*set_config)(struct dvb_frontend *fe, void *priv_cfg); 255 int (*set_config)(struct dvb_frontend *fe, void *priv_cfg);
251}; 256};
252 257
258struct dtv_frontend_properties;
259
253struct dvb_frontend_ops { 260struct dvb_frontend_ops {
254 261
255 struct dvb_frontend_info info; 262 struct dvb_frontend_info info;
256 263
264 u8 delsys[MAX_DELSYS];
265
257 void (*release)(struct dvb_frontend* fe); 266 void (*release)(struct dvb_frontend* fe);
258 void (*release_sec)(struct dvb_frontend* fe); 267 void (*release_sec)(struct dvb_frontend* fe);
259 268
@@ -264,7 +273,7 @@ struct dvb_frontend_ops {
264 273
265 /* if this is set, it overrides the default swzigzag */ 274 /* if this is set, it overrides the default swzigzag */
266 int (*tune)(struct dvb_frontend* fe, 275 int (*tune)(struct dvb_frontend* fe,
267 struct dvb_frontend_parameters* params, 276 bool re_tune,
268 unsigned int mode_flags, 277 unsigned int mode_flags,
269 unsigned int *delay, 278 unsigned int *delay,
270 fe_status_t *status); 279 fe_status_t *status);
@@ -272,10 +281,10 @@ struct dvb_frontend_ops {
272 enum dvbfe_algo (*get_frontend_algo)(struct dvb_frontend *fe); 281 enum dvbfe_algo (*get_frontend_algo)(struct dvb_frontend *fe);
273 282
274 /* these two are only used for the swzigzag code */ 283 /* these two are only used for the swzigzag code */
275 int (*set_frontend)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); 284 int (*set_frontend)(struct dvb_frontend *fe);
276 int (*get_tune_settings)(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* settings); 285 int (*get_tune_settings)(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* settings);
277 286
278 int (*get_frontend)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); 287 int (*get_frontend)(struct dvb_frontend *fe);
279 288
280 int (*read_status)(struct dvb_frontend* fe, fe_status_t* status); 289 int (*read_status)(struct dvb_frontend* fe, fe_status_t* status);
281 int (*read_ber)(struct dvb_frontend* fe, u32* ber); 290 int (*read_ber)(struct dvb_frontend* fe, u32* ber);
@@ -297,8 +306,7 @@ struct dvb_frontend_ops {
297 /* These callbacks are for devices that implement their own 306 /* These callbacks are for devices that implement their own
298 * tuning algorithms, rather than a simple swzigzag 307 * tuning algorithms, rather than a simple swzigzag
299 */ 308 */
300 enum dvbfe_search (*search)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p); 309 enum dvbfe_search (*search)(struct dvb_frontend *fe);
301 int (*track)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p);
302 310
303 struct dvb_tuner_ops tuner_ops; 311 struct dvb_tuner_ops tuner_ops;
304 struct analog_demod_ops analog_ops; 312 struct analog_demod_ops analog_ops;
@@ -307,6 +315,7 @@ struct dvb_frontend_ops {
307 int (*get_property)(struct dvb_frontend* fe, struct dtv_property* tvp); 315 int (*get_property)(struct dvb_frontend* fe, struct dtv_property* tvp);
308}; 316};
309 317
318#ifdef __DVB_CORE__
310#define MAX_EVENT 8 319#define MAX_EVENT 8
311 320
312struct dvb_fe_events { 321struct dvb_fe_events {
@@ -317,6 +326,7 @@ struct dvb_fe_events {
317 wait_queue_head_t wait_queue; 326 wait_queue_head_t wait_queue;
318 struct mutex mtx; 327 struct mutex mtx;
319}; 328};
329#endif
320 330
321struct dtv_frontend_properties { 331struct dtv_frontend_properties {
322 332
@@ -374,6 +384,7 @@ struct dvb_frontend {
374 void *analog_demod_priv; 384 void *analog_demod_priv;
375 struct dtv_frontend_properties dtv_property_cache; 385 struct dtv_frontend_properties dtv_property_cache;
376#define DVB_FRONTEND_COMPONENT_TUNER 0 386#define DVB_FRONTEND_COMPONENT_TUNER 0
387#define DVB_FRONTEND_COMPONENT_DEMOD 1
377 int (*callback)(void *adapter_priv, int component, int cmd, int arg); 388 int (*callback)(void *adapter_priv, int component, int cmd, int arg);
378 int id; 389 int id;
379}; 390};
diff --git a/drivers/media/dvb/dvb-core/dvb_net.c b/drivers/media/dvb/dvb-core/dvb_net.c
index 93d9869e0f1..8766ce8c354 100644
--- a/drivers/media/dvb/dvb-core/dvb_net.c
+++ b/drivers/media/dvb/dvb-core/dvb_net.c
@@ -1510,9 +1510,7 @@ int dvb_net_init (struct dvb_adapter *adap, struct dvb_net *dvbnet,
1510 for (i=0; i<DVB_NET_DEVICES_MAX; i++) 1510 for (i=0; i<DVB_NET_DEVICES_MAX; i++)
1511 dvbnet->state[i] = 0; 1511 dvbnet->state[i] = 0;
1512 1512
1513 dvb_register_device (adap, &dvbnet->dvbdev, &dvbdev_net, 1513 return dvb_register_device(adap, &dvbnet->dvbdev, &dvbdev_net,
1514 dvbnet, DVB_DEVICE_NET); 1514 dvbnet, DVB_DEVICE_NET);
1515
1516 return 0;
1517} 1515}
1518EXPORT_SYMBOL(dvb_net_init); 1516EXPORT_SYMBOL(dvb_net_init);
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 58257165761..9f203c6767a 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -311,6 +311,7 @@ config DVB_USB_ANYSEE
311 select DVB_STV0900 if !DVB_FE_CUSTOMISE 311 select DVB_STV0900 if !DVB_FE_CUSTOMISE
312 select DVB_STV6110 if !DVB_FE_CUSTOMISE 312 select DVB_STV6110 if !DVB_FE_CUSTOMISE
313 select DVB_ISL6423 if !DVB_FE_CUSTOMISE 313 select DVB_ISL6423 if !DVB_FE_CUSTOMISE
314 select DVB_CXD2820R if !DVB_FE_CUSTOMISE
314 help 315 help
315 Say Y here to support the Anysee E30, Anysee E30 Plus or 316 Say Y here to support the Anysee E30, Anysee E30 Plus or
316 Anysee E30 C Plus DVB USB2.0 receiver. 317 Anysee E30 C Plus DVB USB2.0 receiver.
@@ -340,7 +341,7 @@ config DVB_USB_AF9015
340 341
341config DVB_USB_CE6230 342config DVB_USB_CE6230
342 tristate "Intel CE6230 DVB-T USB2.0 support" 343 tristate "Intel CE6230 DVB-T USB2.0 support"
343 depends on DVB_USB && EXPERIMENTAL 344 depends on DVB_USB
344 select DVB_ZL10353 345 select DVB_ZL10353
345 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE 346 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE
346 help 347 help
@@ -354,7 +355,7 @@ config DVB_USB_FRIIO
354 355
355config DVB_USB_EC168 356config DVB_USB_EC168
356 tristate "E3C EC168 DVB-T USB2.0 support" 357 tristate "E3C EC168 DVB-T USB2.0 support"
357 depends on DVB_USB && EXPERIMENTAL 358 depends on DVB_USB
358 select DVB_EC100 359 select DVB_EC100
359 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE 360 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE
360 help 361 help
diff --git a/drivers/media/dvb/dvb-usb/af9005-fe.c b/drivers/media/dvb/dvb-usb/af9005-fe.c
index 3263e9749d0..740f3f496f1 100644
--- a/drivers/media/dvb/dvb-usb/af9005-fe.c
+++ b/drivers/media/dvb/dvb-usb/af9005-fe.c
@@ -303,7 +303,7 @@ static int af9005_get_pre_vit_err_bit_count(struct dvb_frontend *fe,
303 return -EINVAL; 303 return -EINVAL;
304 } 304 }
305 305
306 /* read constellation mode */ 306 /* read modulation mode */
307 ret = 307 ret =
308 af9005_read_register_bits(state->d, xd_g_reg_tpsd_const, 308 af9005_read_register_bits(state->d, xd_g_reg_tpsd_const,
309 reg_tpsd_const_pos, reg_tpsd_const_len, 309 reg_tpsd_const_pos, reg_tpsd_const_len,
@@ -321,7 +321,7 @@ static int af9005_get_pre_vit_err_bit_count(struct dvb_frontend *fe,
321 bits = 6; 321 bits = 6;
322 break; 322 break;
323 default: 323 default:
324 err("invalid constellation mode"); 324 err("invalid modulation mode");
325 return -EINVAL; 325 return -EINVAL;
326 } 326 }
327 *pre_bit_count = super_frame_count * 68 * 4 * x * bits; 327 *pre_bit_count = super_frame_count * 68 * 4 * x * bits;
@@ -533,13 +533,13 @@ static int af9005_fe_read_signal_strength(struct dvb_frontend *fe,
533 533
534static int af9005_fe_read_snr(struct dvb_frontend *fe, u16 * snr) 534static int af9005_fe_read_snr(struct dvb_frontend *fe, u16 * snr)
535{ 535{
536 /* the snr can be derived from the ber and the constellation 536 /* the snr can be derived from the ber and the modulation
537 but I don't think this kind of complex calculations belong 537 but I don't think this kind of complex calculations belong
538 in the driver. I may be wrong.... */ 538 in the driver. I may be wrong.... */
539 return -ENOSYS; 539 return -ENOSYS;
540} 540}
541 541
542static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw) 542static int af9005_fe_program_cfoe(struct dvb_usb_device *d, u32 bw)
543{ 543{
544 u8 temp0, temp1, temp2, temp3, buf[4]; 544 u8 temp0, temp1, temp2, temp3, buf[4];
545 int ret; 545 int ret;
@@ -551,7 +551,7 @@ static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw)
551 u32 NS_coeff2_8k; 551 u32 NS_coeff2_8k;
552 552
553 switch (bw) { 553 switch (bw) {
554 case BANDWIDTH_6_MHZ: 554 case 6000000:
555 NS_coeff1_2048Nu = 0x2ADB6DC; 555 NS_coeff1_2048Nu = 0x2ADB6DC;
556 NS_coeff1_8191Nu = 0xAB7313; 556 NS_coeff1_8191Nu = 0xAB7313;
557 NS_coeff1_8192Nu = 0xAB6DB7; 557 NS_coeff1_8192Nu = 0xAB6DB7;
@@ -560,7 +560,7 @@ static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw)
560 NS_coeff2_8k = 0x55B6DC; 560 NS_coeff2_8k = 0x55B6DC;
561 break; 561 break;
562 562
563 case BANDWIDTH_7_MHZ: 563 case 7000000:
564 NS_coeff1_2048Nu = 0x3200001; 564 NS_coeff1_2048Nu = 0x3200001;
565 NS_coeff1_8191Nu = 0xC80640; 565 NS_coeff1_8191Nu = 0xC80640;
566 NS_coeff1_8192Nu = 0xC80000; 566 NS_coeff1_8192Nu = 0xC80000;
@@ -569,7 +569,7 @@ static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw)
569 NS_coeff2_8k = 0x640000; 569 NS_coeff2_8k = 0x640000;
570 break; 570 break;
571 571
572 case BANDWIDTH_8_MHZ: 572 case 8000000:
573 NS_coeff1_2048Nu = 0x3924926; 573 NS_coeff1_2048Nu = 0x3924926;
574 NS_coeff1_8191Nu = 0xE4996E; 574 NS_coeff1_8191Nu = 0xE4996E;
575 NS_coeff1_8192Nu = 0xE49249; 575 NS_coeff1_8192Nu = 0xE49249;
@@ -773,17 +773,17 @@ static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw)
773 773
774} 774}
775 775
776static int af9005_fe_select_bw(struct dvb_usb_device *d, fe_bandwidth_t bw) 776static int af9005_fe_select_bw(struct dvb_usb_device *d, u32 bw)
777{ 777{
778 u8 temp; 778 u8 temp;
779 switch (bw) { 779 switch (bw) {
780 case BANDWIDTH_6_MHZ: 780 case 6000000:
781 temp = 0; 781 temp = 0;
782 break; 782 break;
783 case BANDWIDTH_7_MHZ: 783 case 7000000:
784 temp = 1; 784 temp = 1;
785 break; 785 break;
786 case BANDWIDTH_8_MHZ: 786 case 8000000:
787 temp = 2; 787 temp = 2;
788 break; 788 break;
789 default: 789 default:
@@ -930,10 +930,11 @@ static int af9005_fe_init(struct dvb_frontend *fe)
930 930
931 /* init other parameters: program cfoe and select bandwidth */ 931 /* init other parameters: program cfoe and select bandwidth */
932 deb_info("program cfoe\n"); 932 deb_info("program cfoe\n");
933 if ((ret = af9005_fe_program_cfoe(state->d, BANDWIDTH_6_MHZ))) 933 ret = af9005_fe_program_cfoe(state->d, 6000000);
934 if (ret)
934 return ret; 935 return ret;
935 /* set read-update bit for constellation */ 936 /* set read-update bit for modulation */
936 deb_info("set read-update bit for constellation\n"); 937 deb_info("set read-update bit for modulation\n");
937 if ((ret = 938 if ((ret =
938 af9005_write_register_bits(state->d, xd_p_reg_feq_read_update, 939 af9005_write_register_bits(state->d, xd_p_reg_feq_read_update,
939 reg_feq_read_update_pos, 940 reg_feq_read_update_pos,
@@ -943,8 +944,8 @@ static int af9005_fe_init(struct dvb_frontend *fe)
943 /* sample code has a set MPEG TS code here 944 /* sample code has a set MPEG TS code here
944 but sniffing reveals that it doesn't do it */ 945 but sniffing reveals that it doesn't do it */
945 946
946 /* set read-update bit to 1 for DCA constellation */ 947 /* set read-update bit to 1 for DCA modulation */
947 deb_info("set read-update bit 1 for DCA constellation\n"); 948 deb_info("set read-update bit 1 for DCA modulation\n");
948 if ((ret = 949 if ((ret =
949 af9005_write_register_bits(state->d, xd_p_reg_dca_read_update, 950 af9005_write_register_bits(state->d, xd_p_reg_dca_read_update,
950 reg_dca_read_update_pos, 951 reg_dca_read_update_pos,
@@ -1099,15 +1100,15 @@ static int af9005_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
1099 return 0; 1100 return 0;
1100} 1101}
1101 1102
1102static int af9005_fe_set_frontend(struct dvb_frontend *fe, 1103static int af9005_fe_set_frontend(struct dvb_frontend *fe)
1103 struct dvb_frontend_parameters *fep)
1104{ 1104{
1105 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
1105 struct af9005_fe_state *state = fe->demodulator_priv; 1106 struct af9005_fe_state *state = fe->demodulator_priv;
1106 int ret; 1107 int ret;
1107 u8 temp, temp0, temp1, temp2; 1108 u8 temp, temp0, temp1, temp2;
1108 1109
1109 deb_info("af9005_fe_set_frontend freq %d bw %d\n", fep->frequency, 1110 deb_info("af9005_fe_set_frontend freq %d bw %d\n", fep->frequency,
1110 fep->u.ofdm.bandwidth); 1111 fep->bandwidth_hz);
1111 if (fe->ops.tuner_ops.release == NULL) { 1112 if (fe->ops.tuner_ops.release == NULL) {
1112 err("Tuner not attached"); 1113 err("Tuner not attached");
1113 return -ENODEV; 1114 return -ENODEV;
@@ -1167,10 +1168,10 @@ static int af9005_fe_set_frontend(struct dvb_frontend *fe,
1167 1168
1168 /* select bandwidth */ 1169 /* select bandwidth */
1169 deb_info("select bandwidth"); 1170 deb_info("select bandwidth");
1170 ret = af9005_fe_select_bw(state->d, fep->u.ofdm.bandwidth); 1171 ret = af9005_fe_select_bw(state->d, fep->bandwidth_hz);
1171 if (ret) 1172 if (ret)
1172 return ret; 1173 return ret;
1173 ret = af9005_fe_program_cfoe(state->d, fep->u.ofdm.bandwidth); 1174 ret = af9005_fe_program_cfoe(state->d, fep->bandwidth_hz);
1174 if (ret) 1175 if (ret)
1175 return ret; 1176 return ret;
1176 1177
@@ -1189,7 +1190,7 @@ static int af9005_fe_set_frontend(struct dvb_frontend *fe,
1189 return ret; 1190 return ret;
1190 /* set tuner */ 1191 /* set tuner */
1191 deb_info("set tuner\n"); 1192 deb_info("set tuner\n");
1192 ret = fe->ops.tuner_ops.set_params(fe, fep); 1193 ret = fe->ops.tuner_ops.set_params(fe);
1193 if (ret) 1194 if (ret)
1194 return ret; 1195 return ret;
1195 1196
@@ -1225,9 +1226,9 @@ static int af9005_fe_set_frontend(struct dvb_frontend *fe,
1225 return 0; 1226 return 0;
1226} 1227}
1227 1228
1228static int af9005_fe_get_frontend(struct dvb_frontend *fe, 1229static int af9005_fe_get_frontend(struct dvb_frontend *fe)
1229 struct dvb_frontend_parameters *fep)
1230{ 1230{
1231 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
1231 struct af9005_fe_state *state = fe->demodulator_priv; 1232 struct af9005_fe_state *state = fe->demodulator_priv;
1232 int ret; 1233 int ret;
1233 u8 temp; 1234 u8 temp;
@@ -1239,19 +1240,19 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1239 &temp); 1240 &temp);
1240 if (ret) 1241 if (ret)
1241 return ret; 1242 return ret;
1242 deb_info("===== fe_get_frontend ==============\n"); 1243 deb_info("===== fe_get_frontend_legacy = =============\n");
1243 deb_info("CONSTELLATION "); 1244 deb_info("CONSTELLATION ");
1244 switch (temp) { 1245 switch (temp) {
1245 case 0: 1246 case 0:
1246 fep->u.ofdm.constellation = QPSK; 1247 fep->modulation = QPSK;
1247 deb_info("QPSK\n"); 1248 deb_info("QPSK\n");
1248 break; 1249 break;
1249 case 1: 1250 case 1:
1250 fep->u.ofdm.constellation = QAM_16; 1251 fep->modulation = QAM_16;
1251 deb_info("QAM_16\n"); 1252 deb_info("QAM_16\n");
1252 break; 1253 break;
1253 case 2: 1254 case 2:
1254 fep->u.ofdm.constellation = QAM_64; 1255 fep->modulation = QAM_64;
1255 deb_info("QAM_64\n"); 1256 deb_info("QAM_64\n");
1256 break; 1257 break;
1257 } 1258 }
@@ -1266,19 +1267,19 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1266 deb_info("HIERARCHY "); 1267 deb_info("HIERARCHY ");
1267 switch (temp) { 1268 switch (temp) {
1268 case 0: 1269 case 0:
1269 fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; 1270 fep->hierarchy = HIERARCHY_NONE;
1270 deb_info("NONE\n"); 1271 deb_info("NONE\n");
1271 break; 1272 break;
1272 case 1: 1273 case 1:
1273 fep->u.ofdm.hierarchy_information = HIERARCHY_1; 1274 fep->hierarchy = HIERARCHY_1;
1274 deb_info("1\n"); 1275 deb_info("1\n");
1275 break; 1276 break;
1276 case 2: 1277 case 2:
1277 fep->u.ofdm.hierarchy_information = HIERARCHY_2; 1278 fep->hierarchy = HIERARCHY_2;
1278 deb_info("2\n"); 1279 deb_info("2\n");
1279 break; 1280 break;
1280 case 3: 1281 case 3:
1281 fep->u.ofdm.hierarchy_information = HIERARCHY_4; 1282 fep->hierarchy = HIERARCHY_4;
1282 deb_info("4\n"); 1283 deb_info("4\n");
1283 break; 1284 break;
1284 } 1285 }
@@ -1302,23 +1303,23 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1302 deb_info("CODERATE HP "); 1303 deb_info("CODERATE HP ");
1303 switch (temp) { 1304 switch (temp) {
1304 case 0: 1305 case 0:
1305 fep->u.ofdm.code_rate_HP = FEC_1_2; 1306 fep->code_rate_HP = FEC_1_2;
1306 deb_info("FEC_1_2\n"); 1307 deb_info("FEC_1_2\n");
1307 break; 1308 break;
1308 case 1: 1309 case 1:
1309 fep->u.ofdm.code_rate_HP = FEC_2_3; 1310 fep->code_rate_HP = FEC_2_3;
1310 deb_info("FEC_2_3\n"); 1311 deb_info("FEC_2_3\n");
1311 break; 1312 break;
1312 case 2: 1313 case 2:
1313 fep->u.ofdm.code_rate_HP = FEC_3_4; 1314 fep->code_rate_HP = FEC_3_4;
1314 deb_info("FEC_3_4\n"); 1315 deb_info("FEC_3_4\n");
1315 break; 1316 break;
1316 case 3: 1317 case 3:
1317 fep->u.ofdm.code_rate_HP = FEC_5_6; 1318 fep->code_rate_HP = FEC_5_6;
1318 deb_info("FEC_5_6\n"); 1319 deb_info("FEC_5_6\n");
1319 break; 1320 break;
1320 case 4: 1321 case 4:
1321 fep->u.ofdm.code_rate_HP = FEC_7_8; 1322 fep->code_rate_HP = FEC_7_8;
1322 deb_info("FEC_7_8\n"); 1323 deb_info("FEC_7_8\n");
1323 break; 1324 break;
1324 } 1325 }
@@ -1333,23 +1334,23 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1333 deb_info("CODERATE LP "); 1334 deb_info("CODERATE LP ");
1334 switch (temp) { 1335 switch (temp) {
1335 case 0: 1336 case 0:
1336 fep->u.ofdm.code_rate_LP = FEC_1_2; 1337 fep->code_rate_LP = FEC_1_2;
1337 deb_info("FEC_1_2\n"); 1338 deb_info("FEC_1_2\n");
1338 break; 1339 break;
1339 case 1: 1340 case 1:
1340 fep->u.ofdm.code_rate_LP = FEC_2_3; 1341 fep->code_rate_LP = FEC_2_3;
1341 deb_info("FEC_2_3\n"); 1342 deb_info("FEC_2_3\n");
1342 break; 1343 break;
1343 case 2: 1344 case 2:
1344 fep->u.ofdm.code_rate_LP = FEC_3_4; 1345 fep->code_rate_LP = FEC_3_4;
1345 deb_info("FEC_3_4\n"); 1346 deb_info("FEC_3_4\n");
1346 break; 1347 break;
1347 case 3: 1348 case 3:
1348 fep->u.ofdm.code_rate_LP = FEC_5_6; 1349 fep->code_rate_LP = FEC_5_6;
1349 deb_info("FEC_5_6\n"); 1350 deb_info("FEC_5_6\n");
1350 break; 1351 break;
1351 case 4: 1352 case 4:
1352 fep->u.ofdm.code_rate_LP = FEC_7_8; 1353 fep->code_rate_LP = FEC_7_8;
1353 deb_info("FEC_7_8\n"); 1354 deb_info("FEC_7_8\n");
1354 break; 1355 break;
1355 } 1356 }
@@ -1363,19 +1364,19 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1363 deb_info("GUARD INTERVAL "); 1364 deb_info("GUARD INTERVAL ");
1364 switch (temp) { 1365 switch (temp) {
1365 case 0: 1366 case 0:
1366 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 1367 fep->guard_interval = GUARD_INTERVAL_1_32;
1367 deb_info("1_32\n"); 1368 deb_info("1_32\n");
1368 break; 1369 break;
1369 case 1: 1370 case 1:
1370 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; 1371 fep->guard_interval = GUARD_INTERVAL_1_16;
1371 deb_info("1_16\n"); 1372 deb_info("1_16\n");
1372 break; 1373 break;
1373 case 2: 1374 case 2:
1374 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; 1375 fep->guard_interval = GUARD_INTERVAL_1_8;
1375 deb_info("1_8\n"); 1376 deb_info("1_8\n");
1376 break; 1377 break;
1377 case 3: 1378 case 3:
1378 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; 1379 fep->guard_interval = GUARD_INTERVAL_1_4;
1379 deb_info("1_4\n"); 1380 deb_info("1_4\n");
1380 break; 1381 break;
1381 } 1382 }
@@ -1390,11 +1391,11 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1390 deb_info("TRANSMISSION MODE "); 1391 deb_info("TRANSMISSION MODE ");
1391 switch (temp) { 1392 switch (temp) {
1392 case 0: 1393 case 0:
1393 fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; 1394 fep->transmission_mode = TRANSMISSION_MODE_2K;
1394 deb_info("2K\n"); 1395 deb_info("2K\n");
1395 break; 1396 break;
1396 case 1: 1397 case 1:
1397 fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 1398 fep->transmission_mode = TRANSMISSION_MODE_8K;
1398 deb_info("8K\n"); 1399 deb_info("8K\n");
1399 break; 1400 break;
1400 } 1401 }
@@ -1406,15 +1407,15 @@ static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1406 deb_info("BANDWIDTH "); 1407 deb_info("BANDWIDTH ");
1407 switch (temp) { 1408 switch (temp) {
1408 case 0: 1409 case 0:
1409 fep->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; 1410 fep->bandwidth_hz = 6000000;
1410 deb_info("6\n"); 1411 deb_info("6\n");
1411 break; 1412 break;
1412 case 1: 1413 case 1:
1413 fep->u.ofdm.bandwidth = BANDWIDTH_7_MHZ; 1414 fep->bandwidth_hz = 7000000;
1414 deb_info("7\n"); 1415 deb_info("7\n");
1415 break; 1416 break;
1416 case 2: 1417 case 2:
1417 fep->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 1418 fep->bandwidth_hz = 8000000;
1418 deb_info("8\n"); 1419 deb_info("8\n");
1419 break; 1420 break;
1420 } 1421 }
@@ -1454,9 +1455,9 @@ struct dvb_frontend *af9005_fe_attach(struct dvb_usb_device *d)
1454} 1455}
1455 1456
1456static struct dvb_frontend_ops af9005_fe_ops = { 1457static struct dvb_frontend_ops af9005_fe_ops = {
1458 .delsys = { SYS_DVBT },
1457 .info = { 1459 .info = {
1458 .name = "AF9005 USB DVB-T", 1460 .name = "AF9005 USB DVB-T",
1459 .type = FE_OFDM,
1460 .frequency_min = 44250000, 1461 .frequency_min = 44250000,
1461 .frequency_max = 867250000, 1462 .frequency_max = 867250000,
1462 .frequency_stepsize = 250000, 1463 .frequency_stepsize = 250000,
diff --git a/drivers/media/dvb/dvb-usb/af9005.c b/drivers/media/dvb/dvb-usb/af9005.c
index 4fc024d7704..af176b6ce73 100644
--- a/drivers/media/dvb/dvb-usb/af9005.c
+++ b/drivers/media/dvb/dvb-usb/af9005.c
@@ -977,11 +977,20 @@ static int af9005_usb_probe(struct usb_interface *intf,
977 THIS_MODULE, NULL, adapter_nr); 977 THIS_MODULE, NULL, adapter_nr);
978} 978}
979 979
980enum af9005_usb_table_entry {
981 AFATECH_AF9005,
982 TERRATEC_AF9005,
983 ANSONIC_AF9005,
984};
985
980static struct usb_device_id af9005_usb_table[] = { 986static struct usb_device_id af9005_usb_table[] = {
981 {USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9005)}, 987 [AFATECH_AF9005] = {USB_DEVICE(USB_VID_AFATECH,
982 {USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_USB_XE)}, 988 USB_PID_AFATECH_AF9005)},
983 {USB_DEVICE(USB_VID_ANSONIC, USB_PID_ANSONIC_DVBT_USB)}, 989 [TERRATEC_AF9005] = {USB_DEVICE(USB_VID_TERRATEC,
984 {0}, 990 USB_PID_TERRATEC_CINERGY_T_USB_XE)},
991 [ANSONIC_AF9005] = {USB_DEVICE(USB_VID_ANSONIC,
992 USB_PID_ANSONIC_DVBT_USB)},
993 { }
985}; 994};
986 995
987MODULE_DEVICE_TABLE(usb, af9005_usb_table); 996MODULE_DEVICE_TABLE(usb, af9005_usb_table);
@@ -1041,15 +1050,15 @@ static struct dvb_usb_device_properties af9005_properties = {
1041 .num_device_descs = 3, 1050 .num_device_descs = 3,
1042 .devices = { 1051 .devices = {
1043 {.name = "Afatech DVB-T USB1.1 stick", 1052 {.name = "Afatech DVB-T USB1.1 stick",
1044 .cold_ids = {&af9005_usb_table[0], NULL}, 1053 .cold_ids = {&af9005_usb_table[AFATECH_AF9005], NULL},
1045 .warm_ids = {NULL}, 1054 .warm_ids = {NULL},
1046 }, 1055 },
1047 {.name = "TerraTec Cinergy T USB XE", 1056 {.name = "TerraTec Cinergy T USB XE",
1048 .cold_ids = {&af9005_usb_table[1], NULL}, 1057 .cold_ids = {&af9005_usb_table[TERRATEC_AF9005], NULL},
1049 .warm_ids = {NULL}, 1058 .warm_ids = {NULL},
1050 }, 1059 },
1051 {.name = "Ansonic DVB-T USB1.1 stick", 1060 {.name = "Ansonic DVB-T USB1.1 stick",
1052 .cold_ids = {&af9005_usb_table[2], NULL}, 1061 .cold_ids = {&af9005_usb_table[ANSONIC_AF9005], NULL},
1053 .warm_ids = {NULL}, 1062 .warm_ids = {NULL},
1054 }, 1063 },
1055 {NULL}, 1064 {NULL},
diff --git a/drivers/media/dvb/dvb-usb/af9015.c b/drivers/media/dvb/dvb-usb/af9015.c
index 56cbd3636c3..282a43d648d 100644
--- a/drivers/media/dvb/dvb-usb/af9015.c
+++ b/drivers/media/dvb/dvb-usb/af9015.c
@@ -50,14 +50,14 @@ static int af9015_properties_count = ARRAY_SIZE(af9015_properties);
50 50
51static struct af9013_config af9015_af9013_config[] = { 51static struct af9013_config af9015_af9013_config[] = {
52 { 52 {
53 .demod_address = AF9015_I2C_DEMOD, 53 .i2c_addr = AF9015_I2C_DEMOD,
54 .output_mode = AF9013_OUTPUT_MODE_USB, 54 .ts_mode = AF9013_TS_USB,
55 .api_version = { 0, 1, 9, 0 }, 55 .api_version = { 0, 1, 9, 0 },
56 .gpio[0] = AF9013_GPIO_HI, 56 .gpio[0] = AF9013_GPIO_HI,
57 .gpio[3] = AF9013_GPIO_TUNER_ON, 57 .gpio[3] = AF9013_GPIO_TUNER_ON,
58 58
59 }, { 59 }, {
60 .output_mode = AF9013_OUTPUT_MODE_SERIAL, 60 .ts_mode = AF9013_TS_SERIAL,
61 .api_version = { 0, 1, 9, 0 }, 61 .api_version = { 0, 1, 9, 0 },
62 .gpio[0] = AF9013_GPIO_TUNER_ON, 62 .gpio[0] = AF9013_GPIO_TUNER_ON,
63 .gpio[1] = AF9013_GPIO_LO, 63 .gpio[1] = AF9013_GPIO_LO,
@@ -216,8 +216,8 @@ static int af9015_write_reg_i2c(struct dvb_usb_device *d, u8 addr, u16 reg,
216{ 216{
217 struct req_t req = {WRITE_I2C, addr, reg, 1, 1, 1, &val}; 217 struct req_t req = {WRITE_I2C, addr, reg, 1, 1, 1, &val};
218 218
219 if (addr == af9015_af9013_config[0].demod_address || 219 if (addr == af9015_af9013_config[0].i2c_addr ||
220 addr == af9015_af9013_config[1].demod_address) 220 addr == af9015_af9013_config[1].i2c_addr)
221 req.addr_len = 3; 221 req.addr_len = 3;
222 222
223 return af9015_ctrl_msg(d, &req); 223 return af9015_ctrl_msg(d, &req);
@@ -228,8 +228,8 @@ static int af9015_read_reg_i2c(struct dvb_usb_device *d, u8 addr, u16 reg,
228{ 228{
229 struct req_t req = {READ_I2C, addr, reg, 0, 1, 1, val}; 229 struct req_t req = {READ_I2C, addr, reg, 0, 1, 1, val};
230 230
231 if (addr == af9015_af9013_config[0].demod_address || 231 if (addr == af9015_af9013_config[0].i2c_addr ||
232 addr == af9015_af9013_config[1].demod_address) 232 addr == af9015_af9013_config[1].i2c_addr)
233 req.addr_len = 3; 233 req.addr_len = 3;
234 234
235 return af9015_ctrl_msg(d, &req); 235 return af9015_ctrl_msg(d, &req);
@@ -271,8 +271,8 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate.
271 return -EAGAIN; 271 return -EAGAIN;
272 272
273 while (i < num) { 273 while (i < num) {
274 if (msg[i].addr == af9015_af9013_config[0].demod_address || 274 if (msg[i].addr == af9015_af9013_config[0].i2c_addr ||
275 msg[i].addr == af9015_af9013_config[1].demod_address) { 275 msg[i].addr == af9015_af9013_config[1].i2c_addr) {
276 addr = msg[i].buf[0] << 8; 276 addr = msg[i].buf[0] << 8;
277 addr += msg[i].buf[1]; 277 addr += msg[i].buf[1];
278 mbox = msg[i].buf[2]; 278 mbox = msg[i].buf[2];
@@ -288,8 +288,7 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate.
288 ret = -EOPNOTSUPP; 288 ret = -EOPNOTSUPP;
289 goto error; 289 goto error;
290 } 290 }
291 if (msg[i].addr == 291 if (msg[i].addr == af9015_af9013_config[0].i2c_addr)
292 af9015_af9013_config[0].demod_address)
293 req.cmd = READ_MEMORY; 292 req.cmd = READ_MEMORY;
294 else 293 else
295 req.cmd = READ_I2C; 294 req.cmd = READ_I2C;
@@ -307,7 +306,7 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate.
307 goto error; 306 goto error;
308 } 307 }
309 if (msg[i].addr == 308 if (msg[i].addr ==
310 af9015_af9013_config[0].demod_address) { 309 af9015_af9013_config[0].i2c_addr) {
311 ret = -EINVAL; 310 ret = -EINVAL;
312 goto error; 311 goto error;
313 } 312 }
@@ -325,8 +324,7 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate.
325 ret = -EOPNOTSUPP; 324 ret = -EOPNOTSUPP;
326 goto error; 325 goto error;
327 } 326 }
328 if (msg[i].addr == 327 if (msg[i].addr == af9015_af9013_config[0].i2c_addr)
329 af9015_af9013_config[0].demod_address)
330 req.cmd = WRITE_MEMORY; 328 req.cmd = WRITE_MEMORY;
331 else 329 else
332 req.cmd = WRITE_I2C; 330 req.cmd = WRITE_I2C;
@@ -508,7 +506,7 @@ static int af9015_copy_firmware(struct dvb_usb_device *d)
508 msleep(100); 506 msleep(100);
509 507
510 ret = af9015_read_reg_i2c(d, 508 ret = af9015_read_reg_i2c(d,
511 af9015_af9013_config[1].demod_address, 0x98be, &val); 509 af9015_af9013_config[1].i2c_addr, 0x98be, &val);
512 if (ret) 510 if (ret)
513 goto error; 511 goto error;
514 else 512 else
@@ -536,7 +534,7 @@ static int af9015_copy_firmware(struct dvb_usb_device *d)
536 goto error; 534 goto error;
537 535
538 /* request boot firmware */ 536 /* request boot firmware */
539 ret = af9015_write_reg_i2c(d, af9015_af9013_config[1].demod_address, 537 ret = af9015_write_reg_i2c(d, af9015_af9013_config[1].i2c_addr,
540 0xe205, 1); 538 0xe205, 1);
541 deb_info("%s: firmware boot cmd status:%d\n", __func__, ret); 539 deb_info("%s: firmware boot cmd status:%d\n", __func__, ret);
542 if (ret) 540 if (ret)
@@ -547,7 +545,7 @@ static int af9015_copy_firmware(struct dvb_usb_device *d)
547 545
548 /* check firmware status */ 546 /* check firmware status */
549 ret = af9015_read_reg_i2c(d, 547 ret = af9015_read_reg_i2c(d,
550 af9015_af9013_config[1].demod_address, 0x98be, &val); 548 af9015_af9013_config[1].i2c_addr, 0x98be, &val);
551 deb_info("%s: firmware status cmd status:%d fw status:%02x\n", 549 deb_info("%s: firmware status cmd status:%d fw status:%02x\n",
552 __func__, ret, val); 550 __func__, ret, val);
553 if (ret) 551 if (ret)
@@ -840,7 +838,7 @@ static int af9015_read_config(struct usb_device *udev)
840 if (ret) 838 if (ret)
841 goto error; 839 goto error;
842 840
843 deb_info("%s: IR mode:%d\n", __func__, val); 841 deb_info("%s: IR mode=%d\n", __func__, val);
844 for (i = 0; i < af9015_properties_count; i++) { 842 for (i = 0; i < af9015_properties_count; i++) {
845 if (val == AF9015_IR_MODE_DISABLED) 843 if (val == AF9015_IR_MODE_DISABLED)
846 af9015_properties[i].rc.core.rc_codes = NULL; 844 af9015_properties[i].rc.core.rc_codes = NULL;
@@ -854,7 +852,7 @@ static int af9015_read_config(struct usb_device *udev)
854 if (ret) 852 if (ret)
855 goto error; 853 goto error;
856 af9015_config.dual_mode = val; 854 af9015_config.dual_mode = val;
857 deb_info("%s: TS mode:%d\n", __func__, af9015_config.dual_mode); 855 deb_info("%s: TS mode=%d\n", __func__, af9015_config.dual_mode);
858 856
859 /* Set adapter0 buffer size according to USB port speed, adapter1 buffer 857 /* Set adapter0 buffer size according to USB port speed, adapter1 buffer
860 size can be static because it is enabled only USB2.0 */ 858 size can be static because it is enabled only USB2.0 */
@@ -878,7 +876,7 @@ static int af9015_read_config(struct usb_device *udev)
878 ret = af9015_rw_udev(udev, &req); 876 ret = af9015_rw_udev(udev, &req);
879 if (ret) 877 if (ret)
880 goto error; 878 goto error;
881 af9015_af9013_config[1].demod_address = val; 879 af9015_af9013_config[1].i2c_addr = val;
882 880
883 /* enable 2nd adapter */ 881 /* enable 2nd adapter */
884 for (i = 0; i < af9015_properties_count; i++) 882 for (i = 0; i < af9015_properties_count; i++)
@@ -900,34 +898,38 @@ static int af9015_read_config(struct usb_device *udev)
900 goto error; 898 goto error;
901 switch (val) { 899 switch (val) {
902 case 0: 900 case 0:
903 af9015_af9013_config[i].adc_clock = 28800; 901 af9015_af9013_config[i].clock = 28800000;
904 break; 902 break;
905 case 1: 903 case 1:
906 af9015_af9013_config[i].adc_clock = 20480; 904 af9015_af9013_config[i].clock = 20480000;
907 break; 905 break;
908 case 2: 906 case 2:
909 af9015_af9013_config[i].adc_clock = 28000; 907 af9015_af9013_config[i].clock = 28000000;
910 break; 908 break;
911 case 3: 909 case 3:
912 af9015_af9013_config[i].adc_clock = 25000; 910 af9015_af9013_config[i].clock = 25000000;
913 break; 911 break;
914 }; 912 };
915 deb_info("%s: [%d] xtal:%d set adc_clock:%d\n", __func__, i, 913 deb_info("%s: [%d] xtal=%d set clock=%d\n", __func__, i,
916 val, af9015_af9013_config[i].adc_clock); 914 val, af9015_af9013_config[i].clock);
917 915
918 /* tuner IF */ 916 /* IF frequency */
919 req.addr = AF9015_EEPROM_IF1H + offset; 917 req.addr = AF9015_EEPROM_IF1H + offset;
920 ret = af9015_rw_udev(udev, &req); 918 ret = af9015_rw_udev(udev, &req);
921 if (ret) 919 if (ret)
922 goto error; 920 goto error;
923 af9015_af9013_config[i].tuner_if = val << 8; 921
922 af9015_af9013_config[i].if_frequency = val << 8;
923
924 req.addr = AF9015_EEPROM_IF1L + offset; 924 req.addr = AF9015_EEPROM_IF1L + offset;
925 ret = af9015_rw_udev(udev, &req); 925 ret = af9015_rw_udev(udev, &req);
926 if (ret) 926 if (ret)
927 goto error; 927 goto error;
928 af9015_af9013_config[i].tuner_if += val; 928
929 deb_info("%s: [%d] IF1:%d\n", __func__, i, 929 af9015_af9013_config[i].if_frequency += val;
930 af9015_af9013_config[0].tuner_if); 930 af9015_af9013_config[i].if_frequency *= 1000;
931 deb_info("%s: [%d] IF frequency=%d\n", __func__, i,
932 af9015_af9013_config[0].if_frequency);
931 933
932 /* MT2060 IF1 */ 934 /* MT2060 IF1 */
933 req.addr = AF9015_EEPROM_MT2060_IF1H + offset; 935 req.addr = AF9015_EEPROM_MT2060_IF1H + offset;
@@ -940,7 +942,7 @@ static int af9015_read_config(struct usb_device *udev)
940 if (ret) 942 if (ret)
941 goto error; 943 goto error;
942 af9015_config.mt2060_if1[i] += val; 944 af9015_config.mt2060_if1[i] += val;
943 deb_info("%s: [%d] MT2060 IF1:%d\n", __func__, i, 945 deb_info("%s: [%d] MT2060 IF1=%d\n", __func__, i,
944 af9015_config.mt2060_if1[i]); 946 af9015_config.mt2060_if1[i]);
945 947
946 /* tuner */ 948 /* tuner */
@@ -957,30 +959,30 @@ static int af9015_read_config(struct usb_device *udev)
957 case AF9013_TUNER_TDA18271: 959 case AF9013_TUNER_TDA18271:
958 case AF9013_TUNER_QT1010A: 960 case AF9013_TUNER_QT1010A:
959 case AF9013_TUNER_TDA18218: 961 case AF9013_TUNER_TDA18218:
960 af9015_af9013_config[i].rf_spec_inv = 1; 962 af9015_af9013_config[i].spec_inv = 1;
961 break; 963 break;
962 case AF9013_TUNER_MXL5003D: 964 case AF9013_TUNER_MXL5003D:
963 case AF9013_TUNER_MXL5005D: 965 case AF9013_TUNER_MXL5005D:
964 case AF9013_TUNER_MXL5005R: 966 case AF9013_TUNER_MXL5005R:
965 case AF9013_TUNER_MXL5007T: 967 case AF9013_TUNER_MXL5007T:
966 af9015_af9013_config[i].rf_spec_inv = 0; 968 af9015_af9013_config[i].spec_inv = 0;
967 break; 969 break;
968 case AF9013_TUNER_MC44S803: 970 case AF9013_TUNER_MC44S803:
969 af9015_af9013_config[i].gpio[1] = AF9013_GPIO_LO; 971 af9015_af9013_config[i].gpio[1] = AF9013_GPIO_LO;
970 af9015_af9013_config[i].rf_spec_inv = 1; 972 af9015_af9013_config[i].spec_inv = 1;
971 break; 973 break;
972 default: 974 default:
973 warn("tuner id:%d not supported, please report!", val); 975 warn("tuner id=%d not supported, please report!", val);
974 return -ENODEV; 976 return -ENODEV;
975 }; 977 };
976 978
977 af9015_af9013_config[i].tuner = val; 979 af9015_af9013_config[i].tuner = val;
978 deb_info("%s: [%d] tuner id:%d\n", __func__, i, val); 980 deb_info("%s: [%d] tuner id=%d\n", __func__, i, val);
979 } 981 }
980 982
981error: 983error:
982 if (ret) 984 if (ret)
983 err("eeprom read failed:%d", ret); 985 err("eeprom read failed=%d", ret);
984 986
985 /* AverMedia AVerTV Volar Black HD (A850) device have bad EEPROM 987 /* AverMedia AVerTV Volar Black HD (A850) device have bad EEPROM
986 content :-( Override some wrong values here. Ditto for the 988 content :-( Override some wrong values here. Ditto for the
@@ -998,7 +1000,7 @@ error:
998 af9015_properties[i].num_adapters = 1; 1000 af9015_properties[i].num_adapters = 1;
999 1001
1000 /* set correct IF */ 1002 /* set correct IF */
1001 af9015_af9013_config[0].tuner_if = 4570; 1003 af9015_af9013_config[0].if_frequency = 4570000;
1002 } 1004 }
1003 1005
1004 return ret; 1006 return ret;
@@ -1093,9 +1095,79 @@ error:
1093 return ret; 1095 return ret;
1094} 1096}
1095 1097
1098/* override demod callbacks for resource locking */
1099static int af9015_af9013_set_frontend(struct dvb_frontend *fe)
1100{
1101 int ret;
1102 struct dvb_usb_adapter *adap = fe->dvb->priv;
1103 struct af9015_state *priv = adap->dev->priv;
1104
1105 if (mutex_lock_interruptible(&adap->dev->usb_mutex))
1106 return -EAGAIN;
1107
1108 ret = priv->set_frontend[adap->id](fe);
1109
1110 mutex_unlock(&adap->dev->usb_mutex);
1111
1112 return ret;
1113}
1114
1115/* override demod callbacks for resource locking */
1116static int af9015_af9013_read_status(struct dvb_frontend *fe,
1117 fe_status_t *status)
1118{
1119 int ret;
1120 struct dvb_usb_adapter *adap = fe->dvb->priv;
1121 struct af9015_state *priv = adap->dev->priv;
1122
1123 if (mutex_lock_interruptible(&adap->dev->usb_mutex))
1124 return -EAGAIN;
1125
1126 ret = priv->read_status[adap->id](fe, status);
1127
1128 mutex_unlock(&adap->dev->usb_mutex);
1129
1130 return ret;
1131}
1132
1133/* override demod callbacks for resource locking */
1134static int af9015_af9013_init(struct dvb_frontend *fe)
1135{
1136 int ret;
1137 struct dvb_usb_adapter *adap = fe->dvb->priv;
1138 struct af9015_state *priv = adap->dev->priv;
1139
1140 if (mutex_lock_interruptible(&adap->dev->usb_mutex))
1141 return -EAGAIN;
1142
1143 ret = priv->init[adap->id](fe);
1144
1145 mutex_unlock(&adap->dev->usb_mutex);
1146
1147 return ret;
1148}
1149
1150/* override demod callbacks for resource locking */
1151static int af9015_af9013_sleep(struct dvb_frontend *fe)
1152{
1153 int ret;
1154 struct dvb_usb_adapter *adap = fe->dvb->priv;
1155 struct af9015_state *priv = adap->dev->priv;
1156
1157 if (mutex_lock_interruptible(&adap->dev->usb_mutex))
1158 return -EAGAIN;
1159
1160 ret = priv->sleep[adap->id](fe);
1161
1162 mutex_unlock(&adap->dev->usb_mutex);
1163
1164 return ret;
1165}
1166
1096static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap) 1167static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap)
1097{ 1168{
1098 int ret; 1169 int ret;
1170 struct af9015_state *state = adap->dev->priv;
1099 1171
1100 if (adap->id == 1) { 1172 if (adap->id == 1) {
1101 /* copy firmware to 2nd demodulator */ 1173 /* copy firmware to 2nd demodulator */
@@ -1116,6 +1188,32 @@ static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap)
1116 adap->fe_adap[0].fe = dvb_attach(af9013_attach, &af9015_af9013_config[adap->id], 1188 adap->fe_adap[0].fe = dvb_attach(af9013_attach, &af9015_af9013_config[adap->id],
1117 &adap->dev->i2c_adap); 1189 &adap->dev->i2c_adap);
1118 1190
1191 /*
1192 * AF9015 firmware does not like if it gets interrupted by I2C adapter
1193 * request on some critical phases. During normal operation I2C adapter
1194 * is used only 2nd demodulator and tuner on dual tuner devices.
1195 * Override demodulator callbacks and use mutex for limit access to
1196 * those "critical" paths to keep AF9015 happy.
1197 * Note: we abuse unused usb_mutex here.
1198 */
1199 if (adap->fe_adap[0].fe) {
1200 state->set_frontend[adap->id] =
1201 adap->fe_adap[0].fe->ops.set_frontend;
1202 adap->fe_adap[0].fe->ops.set_frontend =
1203 af9015_af9013_set_frontend;
1204
1205 state->read_status[adap->id] =
1206 adap->fe_adap[0].fe->ops.read_status;
1207 adap->fe_adap[0].fe->ops.read_status =
1208 af9015_af9013_read_status;
1209
1210 state->init[adap->id] = adap->fe_adap[0].fe->ops.init;
1211 adap->fe_adap[0].fe->ops.init = af9015_af9013_init;
1212
1213 state->sleep[adap->id] = adap->fe_adap[0].fe->ops.sleep;
1214 adap->fe_adap[0].fe->ops.sleep = af9015_af9013_sleep;
1215 }
1216
1119 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1217 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1120} 1218}
1121 1219
@@ -1245,49 +1343,112 @@ static int af9015_tuner_attach(struct dvb_usb_adapter *adap)
1245 return ret; 1343 return ret;
1246} 1344}
1247 1345
1346enum af9015_usb_table_entry {
1347 AFATECH_9015,
1348 AFATECH_9016,
1349 WINFAST_DTV_GOLD,
1350 PINNACLE_PCTV_71E,
1351 KWORLD_PLUSTV_399U,
1352 TINYTWIN,
1353 AZUREWAVE_TU700,
1354 TERRATEC_AF9015,
1355 KWORLD_PLUSTV_PC160,
1356 AVERTV_VOLAR_X,
1357 XTENSIONS_380U,
1358 MSI_DIGIVOX_DUO,
1359 AVERTV_VOLAR_X_REV2,
1360 TELESTAR_STARSTICK_2,
1361 AVERMEDIA_A309_USB,
1362 MSI_DIGIVOX_MINI_III,
1363 KWORLD_E396,
1364 KWORLD_E39B,
1365 KWORLD_E395,
1366 TREKSTOR_DVBT,
1367 AVERTV_A850,
1368 AVERTV_A805,
1369 CONCEPTRONIC_CTVDIGRCU,
1370 KWORLD_MC810,
1371 GENIUS_TVGO_DVB_T03,
1372 KWORLD_399U_2,
1373 KWORLD_PC160_T,
1374 SVEON_STV20,
1375 TINYTWIN_2,
1376 WINFAST_DTV2000DS,
1377 KWORLD_UB383_T,
1378 KWORLD_E39A,
1379 AVERMEDIA_A815M,
1380 CINERGY_T_STICK_RC,
1381 CINERGY_T_DUAL_RC,
1382 AVERTV_A850T,
1383 TINYTWIN_3,
1384 SVEON_STV22,
1385};
1386
1248static struct usb_device_id af9015_usb_table[] = { 1387static struct usb_device_id af9015_usb_table[] = {
1249/* 0 */{USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9015)}, 1388 [AFATECH_9015] =
1250 {USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9016)}, 1389 {USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9015)},
1251 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_GOLD)}, 1390 [AFATECH_9016] =
1252 {USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV71E)}, 1391 {USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9016)},
1253 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U)}, 1392 [WINFAST_DTV_GOLD] =
1254/* 5 */{USB_DEVICE(USB_VID_VISIONPLUS, 1393 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_GOLD)},
1255 USB_PID_TINYTWIN)}, 1394 [PINNACLE_PCTV_71E] =
1256 {USB_DEVICE(USB_VID_VISIONPLUS, 1395 {USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV71E)},
1257 USB_PID_AZUREWAVE_AD_TU700)}, 1396 [KWORLD_PLUSTV_399U] =
1258 {USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_USB_XE_REV2)}, 1397 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U)},
1259 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_2T)}, 1398 [TINYTWIN] = {USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_TINYTWIN)},
1260 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X)}, 1399 [AZUREWAVE_TU700] =
1261/* 10 */{USB_DEVICE(USB_VID_XTENSIONS, USB_PID_XTENSIONS_XD_380)}, 1400 {USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_AZUREWAVE_AD_TU700)},
1262 {USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGIVOX_DUO)}, 1401 [TERRATEC_AF9015] = {USB_DEVICE(USB_VID_TERRATEC,
1263 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X_2)}, 1402 USB_PID_TERRATEC_CINERGY_T_USB_XE_REV2)},
1264 {USB_DEVICE(USB_VID_TELESTAR, USB_PID_TELESTAR_STARSTICK_2)}, 1403 [KWORLD_PLUSTV_PC160] =
1265 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A309)}, 1404 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_2T)},
1266/* 15 */{USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGI_VOX_MINI_III)}, 1405 [AVERTV_VOLAR_X] =
1267 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U)}, 1406 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X)},
1268 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_2)}, 1407 [XTENSIONS_380U] =
1269 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_3)}, 1408 {USB_DEVICE(USB_VID_XTENSIONS, USB_PID_XTENSIONS_XD_380)},
1270 {USB_DEVICE(USB_VID_AFATECH, USB_PID_TREKSTOR_DVBT)}, 1409 [MSI_DIGIVOX_DUO] =
1271/* 20 */{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850)}, 1410 {USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGIVOX_DUO)},
1272 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A805)}, 1411 [AVERTV_VOLAR_X_REV2] =
1273 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_CONCEPTRONIC_CTVDIGRCU)}, 1412 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X_2)},
1274 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_MC810)}, 1413 [TELESTAR_STARSTICK_2] =
1275 {USB_DEVICE(USB_VID_KYE, USB_PID_GENIUS_TVGO_DVB_T03)}, 1414 {USB_DEVICE(USB_VID_TELESTAR, USB_PID_TELESTAR_STARSTICK_2)},
1276/* 25 */{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U_2)}, 1415 [AVERMEDIA_A309_USB] =
1277 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_T)}, 1416 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A309)},
1278 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV20)}, 1417 [MSI_DIGIVOX_MINI_III] =
1279 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_TINYTWIN_2)}, 1418 {USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGI_VOX_MINI_III)},
1280 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)}, 1419 [KWORLD_E396] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U)},
1281/* 30 */{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB383_T)}, 1420 [KWORLD_E39B] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_2)},
1282 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_4)}, 1421 [KWORLD_E395] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_3)},
1283 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A815M)}, 1422 [TREKSTOR_DVBT] = {USB_DEVICE(USB_VID_AFATECH, USB_PID_TREKSTOR_DVBT)},
1284 {USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_STICK_RC)}, 1423 [AVERTV_A850] = {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850)},
1285 {USB_DEVICE(USB_VID_TERRATEC, 1424 [AVERTV_A805] = {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A805)},
1286 USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC)}, 1425 [CONCEPTRONIC_CTVDIGRCU] =
1287/* 35 */{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)}, 1426 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_CONCEPTRONIC_CTVDIGRCU)},
1288 {USB_DEVICE(USB_VID_GTEK, USB_PID_TINYTWIN_3)}, 1427 [KWORLD_MC810] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_MC810)},
1289 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV22)}, 1428 [GENIUS_TVGO_DVB_T03] =
1290 {0}, 1429 {USB_DEVICE(USB_VID_KYE, USB_PID_GENIUS_TVGO_DVB_T03)},
1430 [KWORLD_399U_2] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U_2)},
1431 [KWORLD_PC160_T] =
1432 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_T)},
1433 [SVEON_STV20] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV20)},
1434 [TINYTWIN_2] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_TINYTWIN_2)},
1435 [WINFAST_DTV2000DS] =
1436 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)},
1437 [KWORLD_UB383_T] =
1438 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB383_T)},
1439 [KWORLD_E39A] =
1440 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_4)},
1441 [AVERMEDIA_A815M] =
1442 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A815M)},
1443 [CINERGY_T_STICK_RC] = {USB_DEVICE(USB_VID_TERRATEC,
1444 USB_PID_TERRATEC_CINERGY_T_STICK_RC)},
1445 [CINERGY_T_DUAL_RC] = {USB_DEVICE(USB_VID_TERRATEC,
1446 USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC)},
1447 [AVERTV_A850T] =
1448 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)},
1449 [TINYTWIN_3] = {USB_DEVICE(USB_VID_GTEK, USB_PID_TINYTWIN_3)},
1450 [SVEON_STV22] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV22)},
1451 { }
1291}; 1452};
1292MODULE_DEVICE_TABLE(usb, af9015_usb_table); 1453MODULE_DEVICE_TABLE(usb, af9015_usb_table);
1293 1454
@@ -1362,68 +1523,104 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1362 .devices = { 1523 .devices = {
1363 { 1524 {
1364 .name = "Afatech AF9015 DVB-T USB2.0 stick", 1525 .name = "Afatech AF9015 DVB-T USB2.0 stick",
1365 .cold_ids = {&af9015_usb_table[0], 1526 .cold_ids = {
1366 &af9015_usb_table[1], NULL}, 1527 &af9015_usb_table[AFATECH_9015],
1528 &af9015_usb_table[AFATECH_9016],
1529 NULL
1530 },
1367 .warm_ids = {NULL}, 1531 .warm_ids = {NULL},
1368 }, 1532 },
1369 { 1533 {
1370 .name = "Leadtek WinFast DTV Dongle Gold", 1534 .name = "Leadtek WinFast DTV Dongle Gold",
1371 .cold_ids = {&af9015_usb_table[2], NULL}, 1535 .cold_ids = {
1536 &af9015_usb_table[WINFAST_DTV_GOLD],
1537 NULL
1538 },
1372 .warm_ids = {NULL}, 1539 .warm_ids = {NULL},
1373 }, 1540 },
1374 { 1541 {
1375 .name = "Pinnacle PCTV 71e", 1542 .name = "Pinnacle PCTV 71e",
1376 .cold_ids = {&af9015_usb_table[3], NULL}, 1543 .cold_ids = {
1544 &af9015_usb_table[PINNACLE_PCTV_71E],
1545 NULL
1546 },
1377 .warm_ids = {NULL}, 1547 .warm_ids = {NULL},
1378 }, 1548 },
1379 { 1549 {
1380 .name = "KWorld PlusTV Dual DVB-T Stick " \ 1550 .name = "KWorld PlusTV Dual DVB-T Stick " \
1381 "(DVB-T 399U)", 1551 "(DVB-T 399U)",
1382 .cold_ids = {&af9015_usb_table[4], 1552 .cold_ids = {
1383 &af9015_usb_table[25], NULL}, 1553 &af9015_usb_table[KWORLD_PLUSTV_399U],
1554 &af9015_usb_table[KWORLD_399U_2],
1555 NULL
1556 },
1384 .warm_ids = {NULL}, 1557 .warm_ids = {NULL},
1385 }, 1558 },
1386 { 1559 {
1387 .name = "DigitalNow TinyTwin DVB-T Receiver", 1560 .name = "DigitalNow TinyTwin DVB-T Receiver",
1388 .cold_ids = {&af9015_usb_table[5], 1561 .cold_ids = {
1389 &af9015_usb_table[28], 1562 &af9015_usb_table[TINYTWIN],
1390 &af9015_usb_table[36], NULL}, 1563 &af9015_usb_table[TINYTWIN_2],
1564 &af9015_usb_table[TINYTWIN_3],
1565 NULL
1566 },
1391 .warm_ids = {NULL}, 1567 .warm_ids = {NULL},
1392 }, 1568 },
1393 { 1569 {
1394 .name = "TwinHan AzureWave AD-TU700(704J)", 1570 .name = "TwinHan AzureWave AD-TU700(704J)",
1395 .cold_ids = {&af9015_usb_table[6], NULL}, 1571 .cold_ids = {
1572 &af9015_usb_table[AZUREWAVE_TU700],
1573 NULL
1574 },
1396 .warm_ids = {NULL}, 1575 .warm_ids = {NULL},
1397 }, 1576 },
1398 { 1577 {
1399 .name = "TerraTec Cinergy T USB XE", 1578 .name = "TerraTec Cinergy T USB XE",
1400 .cold_ids = {&af9015_usb_table[7], NULL}, 1579 .cold_ids = {
1580 &af9015_usb_table[TERRATEC_AF9015],
1581 NULL
1582 },
1401 .warm_ids = {NULL}, 1583 .warm_ids = {NULL},
1402 }, 1584 },
1403 { 1585 {
1404 .name = "KWorld PlusTV Dual DVB-T PCI " \ 1586 .name = "KWorld PlusTV Dual DVB-T PCI " \
1405 "(DVB-T PC160-2T)", 1587 "(DVB-T PC160-2T)",
1406 .cold_ids = {&af9015_usb_table[8], NULL}, 1588 .cold_ids = {
1589 &af9015_usb_table[KWORLD_PLUSTV_PC160],
1590 NULL
1591 },
1407 .warm_ids = {NULL}, 1592 .warm_ids = {NULL},
1408 }, 1593 },
1409 { 1594 {
1410 .name = "AVerMedia AVerTV DVB-T Volar X", 1595 .name = "AVerMedia AVerTV DVB-T Volar X",
1411 .cold_ids = {&af9015_usb_table[9], NULL}, 1596 .cold_ids = {
1597 &af9015_usb_table[AVERTV_VOLAR_X],
1598 NULL
1599 },
1412 .warm_ids = {NULL}, 1600 .warm_ids = {NULL},
1413 }, 1601 },
1414 { 1602 {
1415 .name = "TerraTec Cinergy T Stick RC", 1603 .name = "TerraTec Cinergy T Stick RC",
1416 .cold_ids = {&af9015_usb_table[33], NULL}, 1604 .cold_ids = {
1605 &af9015_usb_table[CINERGY_T_STICK_RC],
1606 NULL
1607 },
1417 .warm_ids = {NULL}, 1608 .warm_ids = {NULL},
1418 }, 1609 },
1419 { 1610 {
1420 .name = "TerraTec Cinergy T Stick Dual RC", 1611 .name = "TerraTec Cinergy T Stick Dual RC",
1421 .cold_ids = {&af9015_usb_table[34], NULL}, 1612 .cold_ids = {
1613 &af9015_usb_table[CINERGY_T_DUAL_RC],
1614 NULL
1615 },
1422 .warm_ids = {NULL}, 1616 .warm_ids = {NULL},
1423 }, 1617 },
1424 { 1618 {
1425 .name = "AverMedia AVerTV Red HD+ (A850T)", 1619 .name = "AverMedia AVerTV Red HD+ (A850T)",
1426 .cold_ids = {&af9015_usb_table[35], NULL}, 1620 .cold_ids = {
1621 &af9015_usb_table[AVERTV_A850T],
1622 NULL
1623 },
1427 .warm_ids = {NULL}, 1624 .warm_ids = {NULL},
1428 }, 1625 },
1429 } 1626 }
@@ -1496,57 +1693,87 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1496 .devices = { 1693 .devices = {
1497 { 1694 {
1498 .name = "Xtensions XD-380", 1695 .name = "Xtensions XD-380",
1499 .cold_ids = {&af9015_usb_table[10], NULL}, 1696 .cold_ids = {
1697 &af9015_usb_table[XTENSIONS_380U],
1698 NULL
1699 },
1500 .warm_ids = {NULL}, 1700 .warm_ids = {NULL},
1501 }, 1701 },
1502 { 1702 {
1503 .name = "MSI DIGIVOX Duo", 1703 .name = "MSI DIGIVOX Duo",
1504 .cold_ids = {&af9015_usb_table[11], NULL}, 1704 .cold_ids = {
1705 &af9015_usb_table[MSI_DIGIVOX_DUO],
1706 NULL
1707 },
1505 .warm_ids = {NULL}, 1708 .warm_ids = {NULL},
1506 }, 1709 },
1507 { 1710 {
1508 .name = "Fujitsu-Siemens Slim Mobile USB DVB-T", 1711 .name = "Fujitsu-Siemens Slim Mobile USB DVB-T",
1509 .cold_ids = {&af9015_usb_table[12], NULL}, 1712 .cold_ids = {
1713 &af9015_usb_table[AVERTV_VOLAR_X_REV2],
1714 NULL
1715 },
1510 .warm_ids = {NULL}, 1716 .warm_ids = {NULL},
1511 }, 1717 },
1512 { 1718 {
1513 .name = "Telestar Starstick 2", 1719 .name = "Telestar Starstick 2",
1514 .cold_ids = {&af9015_usb_table[13], NULL}, 1720 .cold_ids = {
1721 &af9015_usb_table[TELESTAR_STARSTICK_2],
1722 NULL
1723 },
1515 .warm_ids = {NULL}, 1724 .warm_ids = {NULL},
1516 }, 1725 },
1517 { 1726 {
1518 .name = "AVerMedia A309", 1727 .name = "AVerMedia A309",
1519 .cold_ids = {&af9015_usb_table[14], NULL}, 1728 .cold_ids = {
1729 &af9015_usb_table[AVERMEDIA_A309_USB],
1730 NULL
1731 },
1520 .warm_ids = {NULL}, 1732 .warm_ids = {NULL},
1521 }, 1733 },
1522 { 1734 {
1523 .name = "MSI Digi VOX mini III", 1735 .name = "MSI Digi VOX mini III",
1524 .cold_ids = {&af9015_usb_table[15], NULL}, 1736 .cold_ids = {
1737 &af9015_usb_table[MSI_DIGIVOX_MINI_III],
1738 NULL
1739 },
1525 .warm_ids = {NULL}, 1740 .warm_ids = {NULL},
1526 }, 1741 },
1527 { 1742 {
1528 .name = "KWorld USB DVB-T TV Stick II " \ 1743 .name = "KWorld USB DVB-T TV Stick II " \
1529 "(VS-DVB-T 395U)", 1744 "(VS-DVB-T 395U)",
1530 .cold_ids = {&af9015_usb_table[16], 1745 .cold_ids = {
1531 &af9015_usb_table[17], 1746 &af9015_usb_table[KWORLD_E396],
1532 &af9015_usb_table[18], 1747 &af9015_usb_table[KWORLD_E39B],
1533 &af9015_usb_table[31], NULL}, 1748 &af9015_usb_table[KWORLD_E395],
1749 &af9015_usb_table[KWORLD_E39A],
1750 NULL
1751 },
1534 .warm_ids = {NULL}, 1752 .warm_ids = {NULL},
1535 }, 1753 },
1536 { 1754 {
1537 .name = "TrekStor DVB-T USB Stick", 1755 .name = "TrekStor DVB-T USB Stick",
1538 .cold_ids = {&af9015_usb_table[19], NULL}, 1756 .cold_ids = {
1757 &af9015_usb_table[TREKSTOR_DVBT],
1758 NULL
1759 },
1539 .warm_ids = {NULL}, 1760 .warm_ids = {NULL},
1540 }, 1761 },
1541 { 1762 {
1542 .name = "AverMedia AVerTV Volar Black HD " \ 1763 .name = "AverMedia AVerTV Volar Black HD " \
1543 "(A850)", 1764 "(A850)",
1544 .cold_ids = {&af9015_usb_table[20], NULL}, 1765 .cold_ids = {
1766 &af9015_usb_table[AVERTV_A850],
1767 NULL
1768 },
1545 .warm_ids = {NULL}, 1769 .warm_ids = {NULL},
1546 }, 1770 },
1547 { 1771 {
1548 .name = "Sveon STV22 Dual USB DVB-T Tuner HDTV", 1772 .name = "Sveon STV22 Dual USB DVB-T Tuner HDTV",
1549 .cold_ids = {&af9015_usb_table[37], NULL}, 1773 .cold_ids = {
1774 &af9015_usb_table[SVEON_STV22],
1775 NULL
1776 },
1550 .warm_ids = {NULL}, 1777 .warm_ids = {NULL},
1551 }, 1778 },
1552 } 1779 }
@@ -1619,50 +1846,77 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1619 .devices = { 1846 .devices = {
1620 { 1847 {
1621 .name = "AverMedia AVerTV Volar GPS 805 (A805)", 1848 .name = "AverMedia AVerTV Volar GPS 805 (A805)",
1622 .cold_ids = {&af9015_usb_table[21], NULL}, 1849 .cold_ids = {
1850 &af9015_usb_table[AVERTV_A805],
1851 NULL
1852 },
1623 .warm_ids = {NULL}, 1853 .warm_ids = {NULL},
1624 }, 1854 },
1625 { 1855 {
1626 .name = "Conceptronic USB2.0 DVB-T CTVDIGRCU " \ 1856 .name = "Conceptronic USB2.0 DVB-T CTVDIGRCU " \
1627 "V3.0", 1857 "V3.0",
1628 .cold_ids = {&af9015_usb_table[22], NULL}, 1858 .cold_ids = {
1859 &af9015_usb_table[CONCEPTRONIC_CTVDIGRCU],
1860 NULL
1861 },
1629 .warm_ids = {NULL}, 1862 .warm_ids = {NULL},
1630 }, 1863 },
1631 { 1864 {
1632 .name = "KWorld Digial MC-810", 1865 .name = "KWorld Digial MC-810",
1633 .cold_ids = {&af9015_usb_table[23], NULL}, 1866 .cold_ids = {
1867 &af9015_usb_table[KWORLD_MC810],
1868 NULL
1869 },
1634 .warm_ids = {NULL}, 1870 .warm_ids = {NULL},
1635 }, 1871 },
1636 { 1872 {
1637 .name = "Genius TVGo DVB-T03", 1873 .name = "Genius TVGo DVB-T03",
1638 .cold_ids = {&af9015_usb_table[24], NULL}, 1874 .cold_ids = {
1875 &af9015_usb_table[GENIUS_TVGO_DVB_T03],
1876 NULL
1877 },
1639 .warm_ids = {NULL}, 1878 .warm_ids = {NULL},
1640 }, 1879 },
1641 { 1880 {
1642 .name = "KWorld PlusTV DVB-T PCI Pro Card " \ 1881 .name = "KWorld PlusTV DVB-T PCI Pro Card " \
1643 "(DVB-T PC160-T)", 1882 "(DVB-T PC160-T)",
1644 .cold_ids = {&af9015_usb_table[26], NULL}, 1883 .cold_ids = {
1884 &af9015_usb_table[KWORLD_PC160_T],
1885 NULL
1886 },
1645 .warm_ids = {NULL}, 1887 .warm_ids = {NULL},
1646 }, 1888 },
1647 { 1889 {
1648 .name = "Sveon STV20 Tuner USB DVB-T HDTV", 1890 .name = "Sveon STV20 Tuner USB DVB-T HDTV",
1649 .cold_ids = {&af9015_usb_table[27], NULL}, 1891 .cold_ids = {
1892 &af9015_usb_table[SVEON_STV20],
1893 NULL
1894 },
1650 .warm_ids = {NULL}, 1895 .warm_ids = {NULL},
1651 }, 1896 },
1652 { 1897 {
1653 .name = "Leadtek WinFast DTV2000DS", 1898 .name = "Leadtek WinFast DTV2000DS",
1654 .cold_ids = {&af9015_usb_table[29], NULL}, 1899 .cold_ids = {
1900 &af9015_usb_table[WINFAST_DTV2000DS],
1901 NULL
1902 },
1655 .warm_ids = {NULL}, 1903 .warm_ids = {NULL},
1656 }, 1904 },
1657 { 1905 {
1658 .name = "KWorld USB DVB-T Stick Mobile " \ 1906 .name = "KWorld USB DVB-T Stick Mobile " \
1659 "(UB383-T)", 1907 "(UB383-T)",
1660 .cold_ids = {&af9015_usb_table[30], NULL}, 1908 .cold_ids = {
1909 &af9015_usb_table[KWORLD_UB383_T],
1910 NULL
1911 },
1661 .warm_ids = {NULL}, 1912 .warm_ids = {NULL},
1662 }, 1913 },
1663 { 1914 {
1664 .name = "AverMedia AVerTV Volar M (A815Mac)", 1915 .name = "AverMedia AVerTV Volar M (A815Mac)",
1665 .cold_ids = {&af9015_usb_table[32], NULL}, 1916 .cold_ids = {
1917 &af9015_usb_table[AVERMEDIA_A815M],
1918 NULL
1919 },
1666 .warm_ids = {NULL}, 1920 .warm_ids = {NULL},
1667 }, 1921 },
1668 } 1922 }
diff --git a/drivers/media/dvb/dvb-usb/af9015.h b/drivers/media/dvb/dvb-usb/af9015.h
index 6252ea6c190..f619063fa72 100644
--- a/drivers/media/dvb/dvb-usb/af9015.h
+++ b/drivers/media/dvb/dvb-usb/af9015.h
@@ -102,6 +102,12 @@ struct af9015_state {
102 u8 rc_repeat; 102 u8 rc_repeat;
103 u32 rc_keycode; 103 u32 rc_keycode;
104 u8 rc_last[4]; 104 u8 rc_last[4];
105
106 /* for demod callback override */
107 int (*set_frontend[2]) (struct dvb_frontend *fe);
108 int (*read_status[2]) (struct dvb_frontend *fe, fe_status_t *status);
109 int (*init[2]) (struct dvb_frontend *fe);
110 int (*sleep[2]) (struct dvb_frontend *fe);
105}; 111};
106 112
107struct af9015_config { 113struct af9015_config {
diff --git a/drivers/media/dvb/dvb-usb/anysee.c b/drivers/media/dvb/dvb-usb/anysee.c
index b39f14f85e7..d66192974d6 100644
--- a/drivers/media/dvb/dvb-usb/anysee.c
+++ b/drivers/media/dvb/dvb-usb/anysee.c
@@ -41,6 +41,7 @@
41#include "stv0900.h" 41#include "stv0900.h"
42#include "stv6110.h" 42#include "stv6110.h"
43#include "isl6423.h" 43#include "isl6423.h"
44#include "cxd2820r.h"
44 45
45/* debug */ 46/* debug */
46static int dvb_usb_anysee_debug; 47static int dvb_usb_anysee_debug;
@@ -66,10 +67,12 @@ static int anysee_ctrl_msg(struct dvb_usb_device *d, u8 *sbuf, u8 slen,
66 if (mutex_lock_interruptible(&anysee_usb_mutex) < 0) 67 if (mutex_lock_interruptible(&anysee_usb_mutex) < 0)
67 return -EAGAIN; 68 return -EAGAIN;
68 69
70 deb_xfer(">>> ");
71 debug_dump(buf, slen, deb_xfer);
72
69 /* We need receive one message more after dvb_usb_generic_rw due 73 /* We need receive one message more after dvb_usb_generic_rw due
70 to weird transaction flow, which is 1 x send + 2 x receive. */ 74 to weird transaction flow, which is 1 x send + 2 x receive. */
71 ret = dvb_usb_generic_rw(d, buf, sizeof(buf), buf, sizeof(buf), 0); 75 ret = dvb_usb_generic_rw(d, buf, sizeof(buf), buf, sizeof(buf), 0);
72
73 if (!ret) { 76 if (!ret) {
74 /* receive 2nd answer */ 77 /* receive 2nd answer */
75 ret = usb_bulk_msg(d->udev, usb_rcvbulkpipe(d->udev, 78 ret = usb_bulk_msg(d->udev, usb_rcvbulkpipe(d->udev,
@@ -79,7 +82,10 @@ static int anysee_ctrl_msg(struct dvb_usb_device *d, u8 *sbuf, u8 slen,
79 err("%s: recv bulk message failed: %d", __func__, ret); 82 err("%s: recv bulk message failed: %d", __func__, ret);
80 else { 83 else {
81 deb_xfer("<<< "); 84 deb_xfer("<<< ");
82 debug_dump(buf, act_len, deb_xfer); 85 debug_dump(buf, rlen, deb_xfer);
86
87 if (buf[63] != 0x4f)
88 deb_info("%s: cmd failed\n", __func__);
83 } 89 }
84 } 90 }
85 91
@@ -129,6 +135,29 @@ static int anysee_wr_reg_mask(struct dvb_usb_device *d, u16 reg, u8 val,
129 return anysee_write_reg(d, reg, val); 135 return anysee_write_reg(d, reg, val);
130} 136}
131 137
138/* read single register with mask */
139static int anysee_rd_reg_mask(struct dvb_usb_device *d, u16 reg, u8 *val,
140 u8 mask)
141{
142 int ret, i;
143 u8 tmp;
144
145 ret = anysee_read_reg(d, reg, &tmp);
146 if (ret)
147 return ret;
148
149 tmp &= mask;
150
151 /* find position of the first bit */
152 for (i = 0; i < 8; i++) {
153 if ((mask >> i) & 0x01)
154 break;
155 }
156 *val = tmp >> i;
157
158 return 0;
159}
160
132static int anysee_get_hw_info(struct dvb_usb_device *d, u8 *id) 161static int anysee_get_hw_info(struct dvb_usb_device *d, u8 *id)
133{ 162{
134 u8 buf[] = {CMD_GET_HW_INFO}; 163 u8 buf[] = {CMD_GET_HW_INFO};
@@ -156,22 +185,6 @@ static int anysee_ir_ctrl(struct dvb_usb_device *d, u8 onoff)
156 return anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0); 185 return anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0);
157} 186}
158 187
159static int anysee_init(struct dvb_usb_device *d)
160{
161 int ret;
162 /* LED light */
163 ret = anysee_led_ctrl(d, 0x01, 0x03);
164 if (ret)
165 return ret;
166
167 /* enable IR */
168 ret = anysee_ir_ctrl(d, 1);
169 if (ret)
170 return ret;
171
172 return 0;
173}
174
175/* I2C */ 188/* I2C */
176static int anysee_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, 189static int anysee_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
177 int num) 190 int num)
@@ -297,7 +310,7 @@ static struct tda10023_config anysee_tda10023_tda18212_config = {
297 .pll_m = 12, 310 .pll_m = 12,
298 .pll_p = 3, 311 .pll_p = 3,
299 .pll_n = 1, 312 .pll_n = 1,
300 .output_mode = TDA10023_OUTPUT_MODE_PARALLEL_C, 313 .output_mode = TDA10023_OUTPUT_MODE_PARALLEL_B,
301 .deltaf = 0xba02, 314 .deltaf = 0xba02,
302}; 315};
303 316
@@ -309,6 +322,17 @@ static struct tda18212_config anysee_tda18212_config = {
309 .if_dvbc = 5000, 322 .if_dvbc = 5000,
310}; 323};
311 324
325static struct tda18212_config anysee_tda18212_config2 = {
326 .i2c_address = 0x60 /* (0xc0 >> 1) */,
327 .if_dvbt_6 = 3550,
328 .if_dvbt_7 = 3700,
329 .if_dvbt_8 = 4150,
330 .if_dvbt2_6 = 3250,
331 .if_dvbt2_7 = 4000,
332 .if_dvbt2_8 = 4000,
333 .if_dvbc = 5000,
334};
335
312static struct cx24116_config anysee_cx24116_config = { 336static struct cx24116_config anysee_cx24116_config = {
313 .demod_address = (0xaa >> 1), 337 .demod_address = (0xaa >> 1),
314 .mpg_clk_pos_pol = 0x00, 338 .mpg_clk_pos_pol = 0x00,
@@ -339,6 +363,11 @@ static struct isl6423_config anysee_isl6423_config = {
339 .addr = (0x10 >> 1), 363 .addr = (0x10 >> 1),
340}; 364};
341 365
366static struct cxd2820r_config anysee_cxd2820r_config = {
367 .i2c_address = 0x6d, /* (0xda >> 1) */
368 .ts_mode = 0x38,
369};
370
342/* 371/*
343 * New USB device strings: Mfr=1, Product=2, SerialNumber=0 372 * New USB device strings: Mfr=1, Product=2, SerialNumber=0
344 * Manufacturer: AMT.CO.KR 373 * Manufacturer: AMT.CO.KR
@@ -421,6 +450,14 @@ static struct isl6423_config anysee_isl6423_config = {
421 * IOA[7] TS 1=enabled 450 * IOA[7] TS 1=enabled
422 * IOE[5] STV0903 1=enabled 451 * IOE[5] STV0903 1=enabled
423 * 452 *
453 * E7 T2C VID=1c73 PID=861f HW=20 FW=0.1 AMTCI=0.5 "anysee-E7T2C(LP)"
454 * PCB: 508T2C (rev0.3)
455 * parts: DNOQ44QCH106A(CXD2820R, TDA18212), TDA8024
456 * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff
457 * IOA=4d IOB=00 IOC=cc IOD=48 IOE=e4
458 * IOA[7] TS 1=enabled
459 * IOE[5] CXD2820R 1=enabled
460 *
424 * E7 PTC VID=1c73 PID=861f HW=21 FW=0.1 AMTCI=?? "anysee-E7PTC(LP)" 461 * E7 PTC VID=1c73 PID=861f HW=21 FW=0.1 AMTCI=?? "anysee-E7PTC(LP)"
425 * PCB: 508PTC (rev0.5) 462 * PCB: 508PTC (rev0.5)
426 * parts: ZL10353, TDA10023, DNOD44CDH086A(TDA18212) 463 * parts: ZL10353, TDA10023, DNOD44CDH086A(TDA18212)
@@ -437,7 +474,7 @@ static struct isl6423_config anysee_isl6423_config = {
437 * IOD[6] ZL10353 1=enabled 474 * IOD[6] ZL10353 1=enabled
438 * IOE[0] IF 0=enabled 475 * IOE[0] IF 0=enabled
439 * 476 *
440 * E7 S2 VID=1c73 PID=861f HW=22 FW=0.1 AMTCI=?? "anysee-E7PS2(LP)" 477 * E7 PS2 VID=1c73 PID=861f HW=22 FW=0.1 AMTCI=?? "anysee-E7PS2(LP)"
441 * PCB: 508PS2 (rev0.4) 478 * PCB: 508PS2 (rev0.4)
442 * parts: DNBU10512IST(STV0903, STV6110), ISL6423 479 * parts: DNBU10512IST(STV0903, STV6110), ISL6423
443 * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff 480 * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff
@@ -446,6 +483,16 @@ static struct isl6423_config anysee_isl6423_config = {
446 * IOE[5] STV0903 1=enabled 483 * IOE[5] STV0903 1=enabled
447 */ 484 */
448 485
486
487/* external I2C gate used for DNOD44CDH086A(TDA18212) tuner module */
488static int anysee_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
489{
490 struct dvb_usb_adapter *adap = fe->dvb->priv;
491
492 /* enable / disable tuner access on IOE[4] */
493 return anysee_wr_reg_mask(adap->dev, REG_IOE, (enable << 4), 0x10);
494}
495
449static int anysee_frontend_ctrl(struct dvb_frontend *fe, int onoff) 496static int anysee_frontend_ctrl(struct dvb_frontend *fe, int onoff)
450{ 497{
451 struct dvb_usb_adapter *adap = fe->dvb->priv; 498 struct dvb_usb_adapter *adap = fe->dvb->priv;
@@ -577,7 +624,8 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
577 /* detect hardware only once */ 624 /* detect hardware only once */
578 if (adap->fe_adap[0].fe == NULL) { 625 if (adap->fe_adap[0].fe == NULL) {
579 /* Check which hardware we have. 626 /* Check which hardware we have.
580 * We must do this call two times to get reliable values (hw bug). 627 * We must do this call two times to get reliable values
628 * (hw/fw bug).
581 */ 629 */
582 ret = anysee_get_hw_info(adap->dev, hw_info); 630 ret = anysee_get_hw_info(adap->dev, hw_info);
583 if (ret) 631 if (ret)
@@ -606,14 +654,14 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
606 break; 654 break;
607 655
608 /* attach demod */ 656 /* attach demod */
609 adap->fe_adap[0].fe = dvb_attach(mt352_attach, &anysee_mt352_config, 657 adap->fe_adap[0].fe = dvb_attach(mt352_attach,
610 &adap->dev->i2c_adap); 658 &anysee_mt352_config, &adap->dev->i2c_adap);
611 if (adap->fe_adap[0].fe) 659 if (adap->fe_adap[0].fe)
612 break; 660 break;
613 661
614 /* attach demod */ 662 /* attach demod */
615 adap->fe_adap[0].fe = dvb_attach(zl10353_attach, &anysee_zl10353_config, 663 adap->fe_adap[0].fe = dvb_attach(zl10353_attach,
616 &adap->dev->i2c_adap); 664 &anysee_zl10353_config, &adap->dev->i2c_adap);
617 665
618 break; 666 break;
619 case ANYSEE_HW_507CD: /* 6 */ 667 case ANYSEE_HW_507CD: /* 6 */
@@ -665,8 +713,8 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
665 goto error; 713 goto error;
666 714
667 /* attach demod */ 715 /* attach demod */
668 adap->fe_adap[0].fe = dvb_attach(cx24116_attach, &anysee_cx24116_config, 716 adap->fe_adap[0].fe = dvb_attach(cx24116_attach,
669 &adap->dev->i2c_adap); 717 &anysee_cx24116_config, &adap->dev->i2c_adap);
670 718
671 break; 719 break;
672 case ANYSEE_HW_507FA: /* 15 */ 720 case ANYSEE_HW_507FA: /* 15 */
@@ -747,17 +795,19 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
747 } 795 }
748 } 796 }
749 797
798 /* I2C gate for DNOD44CDH086A(TDA18212) tuner module */
799 if (tmp == 0xc7) {
800 if (adap->fe_adap[state->fe_id].fe)
801 adap->fe_adap[state->fe_id].fe->ops.i2c_gate_ctrl =
802 anysee_i2c_gate_ctrl;
803 }
804
750 break; 805 break;
751 case ANYSEE_HW_508TC: /* 18 */ 806 case ANYSEE_HW_508TC: /* 18 */
752 case ANYSEE_HW_508PTC: /* 21 */ 807 case ANYSEE_HW_508PTC: /* 21 */
753 /* E7 TC */ 808 /* E7 TC */
754 /* E7 PTC */ 809 /* E7 PTC */
755 810
756 /* enable transport stream on IOA[7] */
757 ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80);
758 if (ret)
759 goto error;
760
761 if ((state->fe_id ^ dvb_usb_anysee_delsys) == 0) { 811 if ((state->fe_id ^ dvb_usb_anysee_delsys) == 0) {
762 /* disable DVB-T demod on IOD[6] */ 812 /* disable DVB-T demod on IOD[6] */
763 ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (0 << 6), 813 ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (0 << 6),
@@ -772,7 +822,8 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
772 goto error; 822 goto error;
773 823
774 /* attach demod */ 824 /* attach demod */
775 adap->fe_adap[state->fe_id].fe = dvb_attach(tda10023_attach, 825 adap->fe_adap[state->fe_id].fe =
826 dvb_attach(tda10023_attach,
776 &anysee_tda10023_tda18212_config, 827 &anysee_tda10023_tda18212_config,
777 &adap->dev->i2c_adap, 0x48); 828 &adap->dev->i2c_adap, 0x48);
778 } else { 829 } else {
@@ -789,11 +840,19 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
789 goto error; 840 goto error;
790 841
791 /* attach demod */ 842 /* attach demod */
792 adap->fe_adap[state->fe_id].fe = dvb_attach(zl10353_attach, 843 adap->fe_adap[state->fe_id].fe =
844 dvb_attach(zl10353_attach,
793 &anysee_zl10353_tda18212_config, 845 &anysee_zl10353_tda18212_config,
794 &adap->dev->i2c_adap); 846 &adap->dev->i2c_adap);
795 } 847 }
796 848
849 /* I2C gate for DNOD44CDH086A(TDA18212) tuner module */
850 if (adap->fe_adap[state->fe_id].fe)
851 adap->fe_adap[state->fe_id].fe->ops.i2c_gate_ctrl =
852 anysee_i2c_gate_ctrl;
853
854 state->has_ci = true;
855
797 break; 856 break;
798 case ANYSEE_HW_508S2: /* 19 */ 857 case ANYSEE_HW_508S2: /* 19 */
799 case ANYSEE_HW_508PS2: /* 22 */ 858 case ANYSEE_HW_508PS2: /* 22 */
@@ -803,19 +862,41 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
803 if (state->fe_id) 862 if (state->fe_id)
804 break; 863 break;
805 864
806 /* enable transport stream on IOA[7] */ 865 /* enable DVB-S/S2 demod on IOE[5] */
807 ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80); 866 ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 5), 0x20);
808 if (ret) 867 if (ret)
809 goto error; 868 goto error;
810 869
811 /* enable DVB-S/S2 demod on IOE[5] */ 870 /* attach demod */
871 adap->fe_adap[0].fe = dvb_attach(stv0900_attach,
872 &anysee_stv0900_config, &adap->dev->i2c_adap, 0);
873
874 state->has_ci = true;
875
876 break;
877 case ANYSEE_HW_508T2C: /* 20 */
878 /* E7 T2C */
879
880 /* enable DVB-T/T2/C demod on IOE[5] */
812 ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 5), 0x20); 881 ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 5), 0x20);
813 if (ret) 882 if (ret)
814 goto error; 883 goto error;
815 884
816 /* attach demod */ 885 if (state->fe_id == 0) {
817 adap->fe_adap[0].fe = dvb_attach(stv0900_attach, &anysee_stv0900_config, 886 /* DVB-T/T2 */
818 &adap->dev->i2c_adap, 0); 887 adap->fe_adap[state->fe_id].fe =
888 dvb_attach(cxd2820r_attach,
889 &anysee_cxd2820r_config,
890 &adap->dev->i2c_adap, NULL);
891 } else {
892 /* DVB-C */
893 adap->fe_adap[state->fe_id].fe =
894 dvb_attach(cxd2820r_attach,
895 &anysee_cxd2820r_config,
896 &adap->dev->i2c_adap, adap->fe_adap[0].fe);
897 }
898
899 state->has_ci = true;
819 900
820 break; 901 break;
821 } 902 }
@@ -842,24 +923,26 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
842 /* E30 */ 923 /* E30 */
843 924
844 /* attach tuner */ 925 /* attach tuner */
845 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, (0xc2 >> 1), 926 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe,
846 NULL, DVB_PLL_THOMSON_DTT7579); 927 (0xc2 >> 1), NULL, DVB_PLL_THOMSON_DTT7579);
847 928
848 break; 929 break;
849 case ANYSEE_HW_507CD: /* 6 */ 930 case ANYSEE_HW_507CD: /* 6 */
850 /* E30 Plus */ 931 /* E30 Plus */
851 932
852 /* attach tuner */ 933 /* attach tuner */
853 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, (0xc2 >> 1), 934 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe,
854 &adap->dev->i2c_adap, DVB_PLL_THOMSON_DTT7579); 935 (0xc2 >> 1), &adap->dev->i2c_adap,
936 DVB_PLL_THOMSON_DTT7579);
855 937
856 break; 938 break;
857 case ANYSEE_HW_507DC: /* 10 */ 939 case ANYSEE_HW_507DC: /* 10 */
858 /* E30 C Plus */ 940 /* E30 C Plus */
859 941
860 /* attach tuner */ 942 /* attach tuner */
861 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, (0xc0 >> 1), 943 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe,
862 &adap->dev->i2c_adap, DVB_PLL_SAMSUNG_DTOS403IH102A); 944 (0xc0 >> 1), &adap->dev->i2c_adap,
945 DVB_PLL_SAMSUNG_DTOS403IH102A);
863 946
864 break; 947 break;
865 case ANYSEE_HW_507SI: /* 11 */ 948 case ANYSEE_HW_507SI: /* 11 */
@@ -877,22 +960,12 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
877 /* Try first attach TDA18212 silicon tuner on IOE[4], if that 960 /* Try first attach TDA18212 silicon tuner on IOE[4], if that
878 * fails attach old simple PLL. */ 961 * fails attach old simple PLL. */
879 962
880 /* enable tuner on IOE[4] */
881 ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10);
882 if (ret)
883 goto error;
884
885 /* attach tuner */ 963 /* attach tuner */
886 fe = dvb_attach(tda18212_attach, adap->fe_adap[state->fe_id].fe, 964 fe = dvb_attach(tda18212_attach, adap->fe_adap[state->fe_id].fe,
887 &adap->dev->i2c_adap, &anysee_tda18212_config); 965 &adap->dev->i2c_adap, &anysee_tda18212_config);
888 if (fe) 966 if (fe)
889 break; 967 break;
890 968
891 /* disable tuner on IOE[4] */
892 ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (0 << 4), 0x10);
893 if (ret)
894 goto error;
895
896 /* attach tuner */ 969 /* attach tuner */
897 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[state->fe_id].fe, 970 fe = dvb_attach(dvb_pll_attach, adap->fe_adap[state->fe_id].fe,
898 (0xc0 >> 1), &adap->dev->i2c_adap, 971 (0xc0 >> 1), &adap->dev->i2c_adap,
@@ -904,11 +977,6 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
904 /* E7 TC */ 977 /* E7 TC */
905 /* E7 PTC */ 978 /* E7 PTC */
906 979
907 /* enable tuner on IOE[4] */
908 ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10);
909 if (ret)
910 goto error;
911
912 /* attach tuner */ 980 /* attach tuner */
913 fe = dvb_attach(tda18212_attach, adap->fe_adap[state->fe_id].fe, 981 fe = dvb_attach(tda18212_attach, adap->fe_adap[state->fe_id].fe,
914 &adap->dev->i2c_adap, &anysee_tda18212_config); 982 &adap->dev->i2c_adap, &anysee_tda18212_config);
@@ -930,6 +998,15 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
930 } 998 }
931 999
932 break; 1000 break;
1001
1002 case ANYSEE_HW_508T2C: /* 20 */
1003 /* E7 T2C */
1004
1005 /* attach tuner */
1006 fe = dvb_attach(tda18212_attach, adap->fe_adap[state->fe_id].fe,
1007 &adap->dev->i2c_adap, &anysee_tda18212_config2);
1008
1009 break;
933 default: 1010 default:
934 fe = NULL; 1011 fe = NULL;
935 } 1012 }
@@ -939,7 +1016,6 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
939 else 1016 else
940 ret = -ENODEV; 1017 ret = -ENODEV;
941 1018
942error:
943 return ret; 1019 return ret;
944} 1020}
945 1021
@@ -969,6 +1045,201 @@ static int anysee_rc_query(struct dvb_usb_device *d)
969 return 0; 1045 return 0;
970} 1046}
971 1047
1048static int anysee_ci_read_attribute_mem(struct dvb_ca_en50221 *ci, int slot,
1049 int addr)
1050{
1051 struct dvb_usb_device *d = ci->data;
1052 int ret;
1053 u8 buf[] = {CMD_CI, 0x02, 0x40 | addr >> 8, addr & 0xff, 0x00, 1};
1054 u8 val;
1055
1056 ret = anysee_ctrl_msg(d, buf, sizeof(buf), &val, 1);
1057 if (ret)
1058 return ret;
1059
1060 return val;
1061}
1062
1063static int anysee_ci_write_attribute_mem(struct dvb_ca_en50221 *ci, int slot,
1064 int addr, u8 val)
1065{
1066 struct dvb_usb_device *d = ci->data;
1067 int ret;
1068 u8 buf[] = {CMD_CI, 0x03, 0x40 | addr >> 8, addr & 0xff, 0x00, 1, val};
1069
1070 ret = anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0);
1071 if (ret)
1072 return ret;
1073
1074 return 0;
1075}
1076
1077static int anysee_ci_read_cam_control(struct dvb_ca_en50221 *ci, int slot,
1078 u8 addr)
1079{
1080 struct dvb_usb_device *d = ci->data;
1081 int ret;
1082 u8 buf[] = {CMD_CI, 0x04, 0x40, addr, 0x00, 1};
1083 u8 val;
1084
1085 ret = anysee_ctrl_msg(d, buf, sizeof(buf), &val, 1);
1086 if (ret)
1087 return ret;
1088
1089 return val;
1090}
1091
1092static int anysee_ci_write_cam_control(struct dvb_ca_en50221 *ci, int slot,
1093 u8 addr, u8 val)
1094{
1095 struct dvb_usb_device *d = ci->data;
1096 int ret;
1097 u8 buf[] = {CMD_CI, 0x05, 0x40, addr, 0x00, 1, val};
1098
1099 ret = anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0);
1100 if (ret)
1101 return ret;
1102
1103 return 0;
1104}
1105
1106static int anysee_ci_slot_reset(struct dvb_ca_en50221 *ci, int slot)
1107{
1108 struct dvb_usb_device *d = ci->data;
1109 int ret;
1110 struct anysee_state *state = d->priv;
1111
1112 state->ci_cam_ready = jiffies + msecs_to_jiffies(1000);
1113
1114 ret = anysee_wr_reg_mask(d, REG_IOA, (0 << 7), 0x80);
1115 if (ret)
1116 return ret;
1117
1118 msleep(300);
1119
1120 ret = anysee_wr_reg_mask(d, REG_IOA, (1 << 7), 0x80);
1121 if (ret)
1122 return ret;
1123
1124 return 0;
1125}
1126
1127static int anysee_ci_slot_shutdown(struct dvb_ca_en50221 *ci, int slot)
1128{
1129 struct dvb_usb_device *d = ci->data;
1130 int ret;
1131
1132 ret = anysee_wr_reg_mask(d, REG_IOA, (0 << 7), 0x80);
1133 if (ret)
1134 return ret;
1135
1136 msleep(30);
1137
1138 ret = anysee_wr_reg_mask(d, REG_IOA, (1 << 7), 0x80);
1139 if (ret)
1140 return ret;
1141
1142 return 0;
1143}
1144
1145static int anysee_ci_slot_ts_enable(struct dvb_ca_en50221 *ci, int slot)
1146{
1147 struct dvb_usb_device *d = ci->data;
1148 int ret;
1149
1150 ret = anysee_wr_reg_mask(d, REG_IOD, (0 << 1), 0x02);
1151 if (ret)
1152 return ret;
1153
1154 return 0;
1155}
1156
1157static int anysee_ci_poll_slot_status(struct dvb_ca_en50221 *ci, int slot,
1158 int open)
1159{
1160 struct dvb_usb_device *d = ci->data;
1161 struct anysee_state *state = d->priv;
1162 int ret;
1163 u8 tmp;
1164
1165 ret = anysee_rd_reg_mask(d, REG_IOC, &tmp, 0x40);
1166 if (ret)
1167 return ret;
1168
1169 if (tmp == 0) {
1170 ret = DVB_CA_EN50221_POLL_CAM_PRESENT;
1171 if (time_after(jiffies, state->ci_cam_ready))
1172 ret |= DVB_CA_EN50221_POLL_CAM_READY;
1173 }
1174
1175 return ret;
1176}
1177
1178static int anysee_ci_init(struct dvb_usb_device *d)
1179{
1180 struct anysee_state *state = d->priv;
1181 int ret;
1182
1183 state->ci.owner = THIS_MODULE;
1184 state->ci.read_attribute_mem = anysee_ci_read_attribute_mem;
1185 state->ci.write_attribute_mem = anysee_ci_write_attribute_mem;
1186 state->ci.read_cam_control = anysee_ci_read_cam_control;
1187 state->ci.write_cam_control = anysee_ci_write_cam_control;
1188 state->ci.slot_reset = anysee_ci_slot_reset;
1189 state->ci.slot_shutdown = anysee_ci_slot_shutdown;
1190 state->ci.slot_ts_enable = anysee_ci_slot_ts_enable;
1191 state->ci.poll_slot_status = anysee_ci_poll_slot_status;
1192 state->ci.data = d;
1193
1194 ret = anysee_wr_reg_mask(d, REG_IOA, (1 << 7), 0x80);
1195 if (ret)
1196 return ret;
1197
1198 ret = dvb_ca_en50221_init(&d->adapter[0].dvb_adap, &state->ci, 0, 1);
1199 if (ret)
1200 return ret;
1201
1202 return 0;
1203}
1204
1205static void anysee_ci_release(struct dvb_usb_device *d)
1206{
1207 struct anysee_state *state = d->priv;
1208
1209 /* detach CI */
1210 if (state->has_ci)
1211 dvb_ca_en50221_release(&state->ci);
1212
1213 return;
1214}
1215
1216static int anysee_init(struct dvb_usb_device *d)
1217{
1218 struct anysee_state *state = d->priv;
1219 int ret;
1220
1221 /* LED light */
1222 ret = anysee_led_ctrl(d, 0x01, 0x03);
1223 if (ret)
1224 return ret;
1225
1226 /* enable IR */
1227 ret = anysee_ir_ctrl(d, 1);
1228 if (ret)
1229 return ret;
1230
1231 /* attach CI */
1232 if (state->has_ci) {
1233 ret = anysee_ci_init(d);
1234 if (ret) {
1235 state->has_ci = false;
1236 return ret;
1237 }
1238 }
1239
1240 return 0;
1241}
1242
972/* DVB USB Driver stuff */ 1243/* DVB USB Driver stuff */
973static struct dvb_usb_device_properties anysee_properties; 1244static struct dvb_usb_device_properties anysee_properties;
974 1245
@@ -1010,6 +1281,16 @@ static int anysee_probe(struct usb_interface *intf,
1010 return anysee_init(d); 1281 return anysee_init(d);
1011} 1282}
1012 1283
1284static void anysee_disconnect(struct usb_interface *intf)
1285{
1286 struct dvb_usb_device *d = usb_get_intfdata(intf);
1287
1288 anysee_ci_release(d);
1289 dvb_usb_device_exit(intf);
1290
1291 return;
1292}
1293
1013static struct usb_device_id anysee_table[] = { 1294static struct usb_device_id anysee_table[] = {
1014 { USB_DEVICE(USB_VID_CYPRESS, USB_PID_ANYSEE) }, 1295 { USB_DEVICE(USB_VID_CYPRESS, USB_PID_ANYSEE) },
1015 { USB_DEVICE(USB_VID_AMT, USB_PID_ANYSEE) }, 1296 { USB_DEVICE(USB_VID_AMT, USB_PID_ANYSEE) },
@@ -1029,7 +1310,7 @@ static struct dvb_usb_device_properties anysee_properties = {
1029 { 1310 {
1030 .num_frontends = 2, 1311 .num_frontends = 2,
1031 .frontend_ctrl = anysee_frontend_ctrl, 1312 .frontend_ctrl = anysee_frontend_ctrl,
1032 .fe = {{ 1313 .fe = { {
1033 .streaming_ctrl = anysee_streaming_ctrl, 1314 .streaming_ctrl = anysee_streaming_ctrl,
1034 .frontend_attach = anysee_frontend_attach, 1315 .frontend_attach = anysee_frontend_attach,
1035 .tuner_attach = anysee_tuner_attach, 1316 .tuner_attach = anysee_tuner_attach,
@@ -1057,7 +1338,7 @@ static struct dvb_usb_device_properties anysee_properties = {
1057 } 1338 }
1058 } 1339 }
1059 }, 1340 },
1060 }}, 1341 } },
1061 } 1342 }
1062 }, 1343 },
1063 1344
@@ -1087,7 +1368,7 @@ static struct dvb_usb_device_properties anysee_properties = {
1087static struct usb_driver anysee_driver = { 1368static struct usb_driver anysee_driver = {
1088 .name = "dvb_usb_anysee", 1369 .name = "dvb_usb_anysee",
1089 .probe = anysee_probe, 1370 .probe = anysee_probe,
1090 .disconnect = dvb_usb_device_exit, 1371 .disconnect = anysee_disconnect,
1091 .id_table = anysee_table, 1372 .id_table = anysee_table,
1092}; 1373};
1093 1374
diff --git a/drivers/media/dvb/dvb-usb/anysee.h b/drivers/media/dvb/dvb-usb/anysee.h
index 57ee500b8c0..8ac87943154 100644
--- a/drivers/media/dvb/dvb-usb/anysee.h
+++ b/drivers/media/dvb/dvb-usb/anysee.h
@@ -36,6 +36,7 @@
36 36
37#define DVB_USB_LOG_PREFIX "anysee" 37#define DVB_USB_LOG_PREFIX "anysee"
38#include "dvb-usb.h" 38#include "dvb-usb.h"
39#include "dvb_ca_en50221.h"
39 40
40#define deb_info(args...) dprintk(dvb_usb_anysee_debug, 0x01, args) 41#define deb_info(args...) dprintk(dvb_usb_anysee_debug, 0x01, args)
41#define deb_xfer(args...) dprintk(dvb_usb_anysee_debug, 0x02, args) 42#define deb_xfer(args...) dprintk(dvb_usb_anysee_debug, 0x02, args)
@@ -54,12 +55,16 @@ enum cmd {
54 CMD_GET_IR_CODE = 0x41, 55 CMD_GET_IR_CODE = 0x41,
55 CMD_GET_HW_INFO = 0x19, 56 CMD_GET_HW_INFO = 0x19,
56 CMD_SMARTCARD = 0x34, 57 CMD_SMARTCARD = 0x34,
58 CMD_CI = 0x37,
57}; 59};
58 60
59struct anysee_state { 61struct anysee_state {
60 u8 hw; /* PCB ID */ 62 u8 hw; /* PCB ID */
61 u8 seq; 63 u8 seq;
62 u8 fe_id:1; /* frondend ID */ 64 u8 fe_id:1; /* frondend ID */
65 u8 has_ci:1;
66 struct dvb_ca_en50221 ci;
67 unsigned long ci_cam_ready; /* jiffies */
63}; 68};
64 69
65#define ANYSEE_HW_507T 2 /* E30 */ 70#define ANYSEE_HW_507T 2 /* E30 */
@@ -69,6 +74,7 @@ struct anysee_state {
69#define ANYSEE_HW_507FA 15 /* E30 Combo Plus / E30 C Plus */ 74#define ANYSEE_HW_507FA 15 /* E30 Combo Plus / E30 C Plus */
70#define ANYSEE_HW_508TC 18 /* E7 TC */ 75#define ANYSEE_HW_508TC 18 /* E7 TC */
71#define ANYSEE_HW_508S2 19 /* E7 S2 */ 76#define ANYSEE_HW_508S2 19 /* E7 S2 */
77#define ANYSEE_HW_508T2C 20 /* E7 T2C */
72#define ANYSEE_HW_508PTC 21 /* E7 PTC Plus */ 78#define ANYSEE_HW_508PTC 21 /* E7 PTC Plus */
73#define ANYSEE_HW_508PS2 22 /* E7 PS2 Plus */ 79#define ANYSEE_HW_508PS2 22 /* E7 PS2 Plus */
74 80
diff --git a/drivers/media/dvb/dvb-usb/cinergyT2-fe.c b/drivers/media/dvb/dvb-usb/cinergyT2-fe.c
index 9cd51ac1207..8a57ed8272d 100644
--- a/drivers/media/dvb/dvb-usb/cinergyT2-fe.c
+++ b/drivers/media/dvb/dvb-usb/cinergyT2-fe.c
@@ -40,9 +40,8 @@
40 * We replace errornous fields by default TPS fields (the ones with value 0). 40 * We replace errornous fields by default TPS fields (the ones with value 0).
41 */ 41 */
42 42
43static uint16_t compute_tps(struct dvb_frontend_parameters *p) 43static uint16_t compute_tps(struct dtv_frontend_properties *op)
44{ 44{
45 struct dvb_ofdm_parameters *op = &p->u.ofdm;
46 uint16_t tps = 0; 45 uint16_t tps = 0;
47 46
48 switch (op->code_rate_HP) { 47 switch (op->code_rate_HP) {
@@ -83,7 +82,7 @@ static uint16_t compute_tps(struct dvb_frontend_parameters *p)
83 /* tps |= (0 << 4) */; 82 /* tps |= (0 << 4) */;
84 } 83 }
85 84
86 switch (op->constellation) { 85 switch (op->modulation) {
87 case QAM_16: 86 case QAM_16:
88 tps |= (1 << 13); 87 tps |= (1 << 13);
89 break; 88 break;
@@ -119,7 +118,7 @@ static uint16_t compute_tps(struct dvb_frontend_parameters *p)
119 /* tps |= (0 << 2) */; 118 /* tps |= (0 << 2) */;
120 } 119 }
121 120
122 switch (op->hierarchy_information) { 121 switch (op->hierarchy) {
123 case HIERARCHY_1: 122 case HIERARCHY_1:
124 tps |= (1 << 10); 123 tps |= (1 << 10);
125 break; 124 break;
@@ -263,9 +262,9 @@ static int cinergyt2_fe_get_tune_settings(struct dvb_frontend *fe,
263 return 0; 262 return 0;
264} 263}
265 264
266static int cinergyt2_fe_set_frontend(struct dvb_frontend *fe, 265static int cinergyt2_fe_set_frontend(struct dvb_frontend *fe)
267 struct dvb_frontend_parameters *fep)
268{ 266{
267 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
269 struct cinergyt2_fe_state *state = fe->demodulator_priv; 268 struct cinergyt2_fe_state *state = fe->demodulator_priv;
270 struct dvbt_set_parameters_msg param; 269 struct dvbt_set_parameters_msg param;
271 char result[2]; 270 char result[2];
@@ -274,9 +273,20 @@ static int cinergyt2_fe_set_frontend(struct dvb_frontend *fe,
274 param.cmd = CINERGYT2_EP1_SET_TUNER_PARAMETERS; 273 param.cmd = CINERGYT2_EP1_SET_TUNER_PARAMETERS;
275 param.tps = cpu_to_le16(compute_tps(fep)); 274 param.tps = cpu_to_le16(compute_tps(fep));
276 param.freq = cpu_to_le32(fep->frequency / 1000); 275 param.freq = cpu_to_le32(fep->frequency / 1000);
277 param.bandwidth = 8 - fep->u.ofdm.bandwidth - BANDWIDTH_8_MHZ;
278 param.flags = 0; 276 param.flags = 0;
279 277
278 switch (fep->bandwidth_hz) {
279 case 8000000:
280 param.bandwidth = 0;
281 break;
282 case 7000000:
283 param.bandwidth = 1;
284 break;
285 case 6000000:
286 param.bandwidth = 2;
287 break;
288 }
289
280 err = dvb_usb_generic_rw(state->d, 290 err = dvb_usb_generic_rw(state->d,
281 (char *)&param, sizeof(param), 291 (char *)&param, sizeof(param),
282 result, sizeof(result), 0); 292 result, sizeof(result), 0);
@@ -286,12 +296,6 @@ static int cinergyt2_fe_set_frontend(struct dvb_frontend *fe,
286 return (err < 0) ? err : 0; 296 return (err < 0) ? err : 0;
287} 297}
288 298
289static int cinergyt2_fe_get_frontend(struct dvb_frontend *fe,
290 struct dvb_frontend_parameters *fep)
291{
292 return 0;
293}
294
295static void cinergyt2_fe_release(struct dvb_frontend *fe) 299static void cinergyt2_fe_release(struct dvb_frontend *fe)
296{ 300{
297 struct cinergyt2_fe_state *state = fe->demodulator_priv; 301 struct cinergyt2_fe_state *state = fe->demodulator_priv;
@@ -316,9 +320,9 @@ struct dvb_frontend *cinergyt2_fe_attach(struct dvb_usb_device *d)
316 320
317 321
318static struct dvb_frontend_ops cinergyt2_fe_ops = { 322static struct dvb_frontend_ops cinergyt2_fe_ops = {
323 .delsys = { SYS_DVBT },
319 .info = { 324 .info = {
320 .name = DRIVER_NAME, 325 .name = DRIVER_NAME,
321 .type = FE_OFDM,
322 .frequency_min = 174000000, 326 .frequency_min = 174000000,
323 .frequency_max = 862000000, 327 .frequency_max = 862000000,
324 .frequency_stepsize = 166667, 328 .frequency_stepsize = 166667,
@@ -341,7 +345,6 @@ static struct dvb_frontend_ops cinergyt2_fe_ops = {
341 .sleep = cinergyt2_fe_sleep, 345 .sleep = cinergyt2_fe_sleep,
342 346
343 .set_frontend = cinergyt2_fe_set_frontend, 347 .set_frontend = cinergyt2_fe_set_frontend,
344 .get_frontend = cinergyt2_fe_get_frontend,
345 .get_tune_settings = cinergyt2_fe_get_tune_settings, 348 .get_tune_settings = cinergyt2_fe_get_tune_settings,
346 349
347 .read_status = cinergyt2_fe_read_status, 350 .read_status = cinergyt2_fe_read_status,
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c
index 949ea1bc0aa..3940bb0f9ef 100644
--- a/drivers/media/dvb/dvb-usb/cxusb.c
+++ b/drivers/media/dvb/dvb-usb/cxusb.c
@@ -1067,18 +1067,17 @@ static struct dib0070_config dib7070p_dib0070_config = {
1067}; 1067};
1068 1068
1069struct dib0700_adapter_state { 1069struct dib0700_adapter_state {
1070 int (*set_param_save) (struct dvb_frontend *, 1070 int (*set_param_save) (struct dvb_frontend *);
1071 struct dvb_frontend_parameters *);
1072}; 1071};
1073 1072
1074static int dib7070_set_param_override(struct dvb_frontend *fe, 1073static int dib7070_set_param_override(struct dvb_frontend *fe)
1075 struct dvb_frontend_parameters *fep)
1076{ 1074{
1075 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1077 struct dvb_usb_adapter *adap = fe->dvb->priv; 1076 struct dvb_usb_adapter *adap = fe->dvb->priv;
1078 struct dib0700_adapter_state *state = adap->priv; 1077 struct dib0700_adapter_state *state = adap->priv;
1079 1078
1080 u16 offset; 1079 u16 offset;
1081 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000); 1080 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
1082 switch (band) { 1081 switch (band) {
1083 case BAND_VHF: offset = 950; break; 1082 case BAND_VHF: offset = 950; break;
1084 default: 1083 default:
@@ -1087,7 +1086,7 @@ static int dib7070_set_param_override(struct dvb_frontend *fe,
1087 1086
1088 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 1087 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
1089 1088
1090 return state->set_param_save(fe, fep); 1089 return state->set_param_save(fe);
1091} 1090}
1092 1091
1093static int cxusb_dualdig4_rev2_tuner_attach(struct dvb_usb_adapter *adap) 1092static int cxusb_dualdig4_rev2_tuner_attach(struct dvb_usb_adapter *adap)
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index f313182eb9d..81ef4b46f79 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -30,7 +30,7 @@ MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplif
30 "if applicable for the device (default: 0=automatic/off)."); 30 "if applicable for the device (default: 0=automatic/off).");
31 31
32struct dib0700_adapter_state { 32struct dib0700_adapter_state {
33 int (*set_param_save) (struct dvb_frontend *, struct dvb_frontend_parameters *); 33 int (*set_param_save) (struct dvb_frontend *);
34 const struct firmware *frontend_firmware; 34 const struct firmware *frontend_firmware;
35}; 35};
36 36
@@ -804,13 +804,14 @@ static struct dib0070_config dib7770p_dib0070_config = {
804 .charge_pump = 2, 804 .charge_pump = 2,
805}; 805};
806 806
807static int dib7070_set_param_override(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 807static int dib7070_set_param_override(struct dvb_frontend *fe)
808{ 808{
809 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
809 struct dvb_usb_adapter *adap = fe->dvb->priv; 810 struct dvb_usb_adapter *adap = fe->dvb->priv;
810 struct dib0700_adapter_state *state = adap->priv; 811 struct dib0700_adapter_state *state = adap->priv;
811 812
812 u16 offset; 813 u16 offset;
813 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000); 814 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
814 switch (band) { 815 switch (band) {
815 case BAND_VHF: offset = 950; break; 816 case BAND_VHF: offset = 950; break;
816 case BAND_UHF: 817 case BAND_UHF:
@@ -818,17 +819,17 @@ static int dib7070_set_param_override(struct dvb_frontend *fe, struct dvb_fronte
818 } 819 }
819 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe)); 820 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
820 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 821 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
821 return state->set_param_save(fe, fep); 822 return state->set_param_save(fe);
822} 823}
823 824
824static int dib7770_set_param_override(struct dvb_frontend *fe, 825static int dib7770_set_param_override(struct dvb_frontend *fe)
825 struct dvb_frontend_parameters *fep)
826{ 826{
827 struct dvb_usb_adapter *adap = fe->dvb->priv; 827 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
828 struct dib0700_adapter_state *state = adap->priv; 828 struct dvb_usb_adapter *adap = fe->dvb->priv;
829 struct dib0700_adapter_state *state = adap->priv;
829 830
830 u16 offset; 831 u16 offset;
831 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000); 832 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
832 switch (band) { 833 switch (band) {
833 case BAND_VHF: 834 case BAND_VHF:
834 dib7000p_set_gpio(fe, 0, 0, 1); 835 dib7000p_set_gpio(fe, 0, 0, 1);
@@ -842,7 +843,7 @@ static int dib7770_set_param_override(struct dvb_frontend *fe,
842 } 843 }
843 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe)); 844 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
844 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 845 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
845 return state->set_param_save(fe, fep); 846 return state->set_param_save(fe);
846} 847}
847 848
848static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap) 849static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
@@ -1205,14 +1206,14 @@ static struct dib0070_config dib807x_dib0070_config[2] = {
1205 } 1206 }
1206}; 1207};
1207 1208
1208static int dib807x_set_param_override(struct dvb_frontend *fe, 1209static int dib807x_set_param_override(struct dvb_frontend *fe)
1209 struct dvb_frontend_parameters *fep)
1210{ 1210{
1211 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1211 struct dvb_usb_adapter *adap = fe->dvb->priv; 1212 struct dvb_usb_adapter *adap = fe->dvb->priv;
1212 struct dib0700_adapter_state *state = adap->priv; 1213 struct dib0700_adapter_state *state = adap->priv;
1213 1214
1214 u16 offset = dib0070_wbd_offset(fe); 1215 u16 offset = dib0070_wbd_offset(fe);
1215 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000); 1216 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
1216 switch (band) { 1217 switch (band) {
1217 case BAND_VHF: 1218 case BAND_VHF:
1218 offset += 750; 1219 offset += 750;
@@ -1224,7 +1225,7 @@ static int dib807x_set_param_override(struct dvb_frontend *fe,
1224 deb_info("WBD for DiB8000: %d\n", offset); 1225 deb_info("WBD for DiB8000: %d\n", offset);
1225 dib8000_set_wbd_ref(fe, offset); 1226 dib8000_set_wbd_ref(fe, offset);
1226 1227
1227 return state->set_param_save(fe, fep); 1228 return state->set_param_save(fe);
1228} 1229}
1229 1230
1230static int dib807x_tuner_attach(struct dvb_usb_adapter *adap) 1231static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
@@ -1279,7 +1280,7 @@ static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1279 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1280 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1280 1281
1281 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1282 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
1282 0x80); 1283 0x80, 0);
1283 1284
1284 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, 1285 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
1285 &dib807x_dib8000_config[0]); 1286 &dib807x_dib8000_config[0]);
@@ -1308,7 +1309,7 @@ static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1308 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1309 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1309 1310
1310 /* initialize IC 0 */ 1311 /* initialize IC 0 */
1311 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80); 1312 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
1312 1313
1313 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, 1314 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
1314 &dib807x_dib8000_config[0]); 1315 &dib807x_dib8000_config[0]);
@@ -1319,7 +1320,7 @@ static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1319static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap) 1320static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1320{ 1321{
1321 /* initialize IC 1 */ 1322 /* initialize IC 1 */
1322 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82); 1323 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
1323 1324
1324 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x82, 1325 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x82,
1325 &dib807x_dib8000_config[1]); 1326 &dib807x_dib8000_config[1]);
@@ -1328,7 +1329,7 @@ static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1328} 1329}
1329 1330
1330/* STK8096GP */ 1331/* STK8096GP */
1331struct dibx000_agc_config dib8090_agc_config[2] = { 1332static struct dibx000_agc_config dib8090_agc_config[2] = {
1332 { 1333 {
1333 BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 1334 BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
1334 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, 1335 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
@@ -1503,22 +1504,22 @@ static struct dib0090_config dib809x_dib0090_config = {
1503 .fref_clock_ratio = 6, 1504 .fref_clock_ratio = 6,
1504}; 1505};
1505 1506
1506static int dib8096_set_param_override(struct dvb_frontend *fe, 1507static int dib8096_set_param_override(struct dvb_frontend *fe)
1507 struct dvb_frontend_parameters *fep)
1508{ 1508{
1509 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1509 struct dvb_usb_adapter *adap = fe->dvb->priv; 1510 struct dvb_usb_adapter *adap = fe->dvb->priv;
1510 struct dib0700_adapter_state *state = adap->priv; 1511 struct dib0700_adapter_state *state = adap->priv;
1511 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000); 1512 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
1512 u16 target; 1513 u16 target;
1513 int ret = 0; 1514 int ret = 0;
1514 enum frontend_tune_state tune_state = CT_SHUTDOWN; 1515 enum frontend_tune_state tune_state = CT_SHUTDOWN;
1515 u16 ltgain, rf_gain_limit; 1516 u16 ltgain, rf_gain_limit;
1516 1517
1517 ret = state->set_param_save(fe, fep); 1518 ret = state->set_param_save(fe);
1518 if (ret < 0) 1519 if (ret < 0)
1519 return ret; 1520 return ret;
1520 1521
1521 target = (dib0090_get_wbd_offset(fe) * 8 * 18 / 33 + 1) / 2; 1522 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
1522 dib8000_set_wbd_ref(fe, target); 1523 dib8000_set_wbd_ref(fe, target);
1523 1524
1524 1525
@@ -1578,7 +1579,7 @@ static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1578 msleep(10); 1579 msleep(10);
1579 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1580 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1580 1581
1581 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80); 1582 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
1582 1583
1583 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]); 1584 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
1584 1585
@@ -1629,7 +1630,7 @@ static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1629 msleep(20); 1630 msleep(20);
1630 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1631 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1631 1632
1632 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80); 1633 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
1633 1634
1634 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]); 1635 adap->fe_adap[0].fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
1635 if (adap->fe_adap[0].fe == NULL) 1636 if (adap->fe_adap[0].fe == NULL)
@@ -1641,6 +1642,261 @@ static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1641 return fe_slave == NULL ? -ENODEV : 0; 1642 return fe_slave == NULL ? -ENODEV : 0;
1642} 1643}
1643 1644
1645/* TFE8096P */
1646static struct dibx000_agc_config dib8096p_agc_config[2] = {
1647 {
1648 .band_caps = BAND_UHF,
1649 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1650 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1651 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1652 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1653 P_agc_write=0 */
1654 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1655 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1656 | (0 << 4) | (5 << 1) | (0 << 0),
1657
1658 .inv_gain = 684,
1659 .time_stabiliz = 10,
1660
1661 .alpha_level = 0,
1662 .thlock = 118,
1663
1664 .wbd_inv = 0,
1665 .wbd_ref = 1200,
1666 .wbd_sel = 3,
1667 .wbd_alpha = 5,
1668
1669 .agc1_max = 65535,
1670 .agc1_min = 0,
1671
1672 .agc2_max = 32767,
1673 .agc2_min = 0,
1674
1675 .agc1_pt1 = 0,
1676 .agc1_pt2 = 0,
1677 .agc1_pt3 = 105,
1678 .agc1_slope1 = 0,
1679 .agc1_slope2 = 156,
1680 .agc2_pt1 = 105,
1681 .agc2_pt2 = 255,
1682 .agc2_slope1 = 54,
1683 .agc2_slope2 = 0,
1684
1685 .alpha_mant = 28,
1686 .alpha_exp = 26,
1687 .beta_mant = 31,
1688 .beta_exp = 51,
1689
1690 .perform_agc_softsplit = 0,
1691 } , {
1692 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1693 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1694 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1695 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1696 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1697 P_agc_write=0 */
1698 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1699 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1700 | (0 << 4) | (5 << 1) | (0 << 0),
1701
1702 .inv_gain = 732,
1703 .time_stabiliz = 10,
1704
1705 .alpha_level = 0,
1706 .thlock = 118,
1707
1708 .wbd_inv = 0,
1709 .wbd_ref = 1200,
1710 .wbd_sel = 3,
1711 .wbd_alpha = 5,
1712
1713 .agc1_max = 65535,
1714 .agc1_min = 0,
1715
1716 .agc2_max = 32767,
1717 .agc2_min = 0,
1718
1719 .agc1_pt1 = 0,
1720 .agc1_pt2 = 0,
1721 .agc1_pt3 = 98,
1722 .agc1_slope1 = 0,
1723 .agc1_slope2 = 167,
1724 .agc2_pt1 = 98,
1725 .agc2_pt2 = 255,
1726 .agc2_slope1 = 52,
1727 .agc2_slope2 = 0,
1728
1729 .alpha_mant = 28,
1730 .alpha_exp = 26,
1731 .beta_mant = 31,
1732 .beta_exp = 51,
1733
1734 .perform_agc_softsplit = 0,
1735 }
1736};
1737
1738static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
1739 108000, 13500,
1740 1, 9, 1, 0, 0,
1741 0, 0, 0, 0, 2,
1742 (3 << 14) | (1 << 12) | (524 << 0),
1743 (0 << 25) | 0,
1744 20199729,
1745 12000000,
1746};
1747
1748static struct dib8000_config tfe8096p_dib8000_config = {
1749 .output_mpeg2_in_188_bytes = 1,
1750 .hostbus_diversity = 1,
1751 .update_lna = NULL,
1752
1753 .agc_config_count = 2,
1754 .agc = dib8096p_agc_config,
1755 .pll = &dib8096p_clock_config_12_mhz,
1756
1757 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1758 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1759 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1760
1761 .agc_control = NULL,
1762 .diversity_delay = 48,
1763 .output_mode = OUTMODE_MPEG2_FIFO,
1764 .enMpegOutput = 1,
1765};
1766
1767static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1768 { 380, 81, 850, 64, 540, 4},
1769 { 860, 51, 866, 21, 375, 4},
1770 {1700, 0, 250, 0, 100, 6},
1771 {2600, 0, 250, 0, 100, 6},
1772 { 0xFFFF, 0, 0, 0, 0, 0},
1773};
1774
1775static const struct dib0090_config tfe8096p_dib0090_config = {
1776 .io.clock_khz = 12000,
1777 .io.pll_bypass = 0,
1778 .io.pll_range = 0,
1779 .io.pll_prediv = 3,
1780 .io.pll_loopdiv = 6,
1781 .io.adc_clock_ratio = 0,
1782 .io.pll_int_loop_filt = 0,
1783 .reset = dib8096p_tuner_sleep,
1784 .sleep = dib8096p_tuner_sleep,
1785
1786 .freq_offset_khz_uhf = -143,
1787 .freq_offset_khz_vhf = -143,
1788
1789 .get_adc_power = dib8090_get_adc_power,
1790
1791 .clkouttobamse = 1,
1792 .analog_output = 0,
1793
1794 .wbd_vhf_offset = 0,
1795 .wbd_cband_offset = 0,
1796 .use_pwm_agc = 1,
1797 .clkoutdrive = 0,
1798
1799 .fref_clock_ratio = 1,
1800
1801 .wbd = dib8096p_wbd_table,
1802
1803 .ls_cfg_pad_drv = 0,
1804 .data_tx_drv = 0,
1805 .low_if = NULL,
1806 .in_soc = 1,
1807 .force_cband_input = 0,
1808};
1809
1810struct dibx090p_adc {
1811 u32 freq; /* RF freq MHz */
1812 u32 timf; /* New Timf */
1813 u32 pll_loopdiv; /* New prediv */
1814 u32 pll_prediv; /* New loopdiv */
1815};
1816
1817struct dibx090p_adc dib8090p_adc_tab[] = {
1818 { 50000, 17043521, 16, 3}, /* 64 MHz */
1819 {878000, 20199729, 9, 1}, /* 60 MHz */
1820 {0xffffffff, 0, 0, 0}, /* 60 MHz */
1821};
1822
1823static int dib8096p_agc_startup(struct dvb_frontend *fe)
1824{
1825 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1826 struct dvb_usb_adapter *adap = fe->dvb->priv;
1827 struct dib0700_adapter_state *state = adap->priv;
1828 struct dibx000_bandwidth_config pll;
1829 u16 target;
1830 int better_sampling_freq = 0, ret;
1831 struct dibx090p_adc *adc_table = &dib8090p_adc_tab[0];
1832
1833 ret = state->set_param_save(fe);
1834 if (ret < 0)
1835 return ret;
1836 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
1837
1838 dib0090_pwm_gain_reset(fe);
1839 /* dib0090_get_wbd_target is returning any possible
1840 temperature compensated wbd-target */
1841 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
1842 dib8000_set_wbd_ref(fe, target);
1843
1844
1845 while (p->frequency / 1000 > adc_table->freq) {
1846 better_sampling_freq = 1;
1847 adc_table++;
1848 }
1849
1850 if ((adc_table->freq != 0xffffffff) && better_sampling_freq) {
1851 pll.pll_ratio = adc_table->pll_loopdiv;
1852 pll.pll_prediv = adc_table->pll_prediv;
1853 dib8000_update_pll(fe, &pll);
1854 dib8000_ctrl_timf(fe, DEMOD_TIMF_SET, adc_table->timf);
1855 }
1856 return 0;
1857}
1858
1859static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
1860{
1861 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1862 msleep(20);
1863 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1864 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1865 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1866
1867 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1868
1869 dib0700_ctrl_clock(adap->dev, 72, 1);
1870
1871 msleep(20);
1872 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1873 msleep(20);
1874 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1875
1876 dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
1877
1878 adap->fe_adap[0].fe = dvb_attach(dib8000_attach,
1879 &adap->dev->i2c_adap, 0x80, &tfe8096p_dib8000_config);
1880
1881 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1882}
1883
1884static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
1885{
1886 struct dib0700_adapter_state *st = adap->priv;
1887 struct i2c_adapter *tun_i2c = dib8096p_get_i2c_tuner(adap->fe_adap[0].fe);
1888
1889 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
1890 &tfe8096p_dib0090_config) == NULL)
1891 return -ENODEV;
1892
1893 dib8000_set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
1894
1895 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1896 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
1897 return 0;
1898}
1899
1644/* STK9090M */ 1900/* STK9090M */
1645static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff) 1901static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
1646{ 1902{
@@ -1883,7 +2139,7 @@ static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
1883 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0); 2139 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
1884 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0) 2140 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
1885 return -ENODEV; 2141 return -ENODEV;
1886 dib0700_set_i2c_speed(adap->dev, 2000); 2142 dib0700_set_i2c_speed(adap->dev, 1500);
1887 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0) 2143 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
1888 return -ENODEV; 2144 return -ENODEV;
1889 release_firmware(state->frontend_firmware); 2145 release_firmware(state->frontend_firmware);
@@ -1962,7 +2218,8 @@ static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
1962 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0); 2218 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
1963 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0) 2219 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
1964 return -ENODEV; 2220 return -ENODEV;
1965 dib0700_set_i2c_speed(adap->dev, 2000); 2221
2222 dib0700_set_i2c_speed(adap->dev, 1500);
1966 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0) 2223 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
1967 return -ENODEV; 2224 return -ENODEV;
1968 2225
@@ -1975,7 +2232,7 @@ static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
1975 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL) 2232 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
1976 return -ENODEV; 2233 return -ENODEV;
1977 fe_slave->dvb = adap->fe_adap[0].fe->dvb; 2234 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
1978 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 2000); 2235 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
1979 if (dib9000_firmware_post_pll_init(fe_slave) < 0) 2236 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
1980 return -ENODEV; 2237 return -ENODEV;
1981 } 2238 }
@@ -2064,7 +2321,7 @@ static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dib7090p_
2064 return 0; 2321 return 0;
2065} 2322}
2066 2323
2067static int dib7090_agc_startup(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 2324static int dib7090_agc_startup(struct dvb_frontend *fe)
2068{ 2325{
2069 struct dvb_usb_adapter *adap = fe->dvb->priv; 2326 struct dvb_usb_adapter *adap = fe->dvb->priv;
2070 struct dib0700_adapter_state *state = adap->priv; 2327 struct dib0700_adapter_state *state = adap->priv;
@@ -2073,13 +2330,13 @@ static int dib7090_agc_startup(struct dvb_frontend *fe, struct dvb_frontend_para
2073 struct dib7090p_best_adc adc; 2330 struct dib7090p_best_adc adc;
2074 int ret; 2331 int ret;
2075 2332
2076 ret = state->set_param_save(fe, fep); 2333 ret = state->set_param_save(fe);
2077 if (ret < 0) 2334 if (ret < 0)
2078 return ret; 2335 return ret;
2079 2336
2080 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config)); 2337 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2081 dib0090_pwm_gain_reset(fe); 2338 dib0090_pwm_gain_reset(fe);
2082 target = (dib0090_get_wbd_offset(fe) * 8 + 1) / 2; 2339 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
2083 dib7000p_set_wbd_ref(fe, target); 2340 dib7000p_set_wbd_ref(fe, target);
2084 2341
2085 if (dib7090p_get_best_sampling(fe, &adc) == 0) { 2342 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
@@ -2092,6 +2349,49 @@ static int dib7090_agc_startup(struct dvb_frontend *fe, struct dvb_frontend_para
2092 return 0; 2349 return 0;
2093} 2350}
2094 2351
2352static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2353{
2354 deb_info("AGC restart callback: %d", restart);
2355 if (restart == 0) /* before AGC startup */
2356 dib0090_set_dc_servo(fe, 1);
2357 return 0;
2358}
2359
2360static int dib7090e_update_lna(struct dvb_frontend *fe, u16 agc_global)
2361{
2362 u16 agc1 = 0, agc2, wbd = 0, wbd_target, wbd_offset, threshold_agc1;
2363 s16 wbd_delta;
2364
2365 if ((fe->dtv_property_cache.frequency) < 400000000)
2366 threshold_agc1 = 25000;
2367 else
2368 threshold_agc1 = 30000;
2369
2370 wbd_target = (dib0090_get_wbd_target(fe)*8+1)/2;
2371 wbd_offset = dib0090_get_wbd_offset(fe);
2372 dib7000p_get_agc_values(fe, NULL, &agc1, &agc2, &wbd);
2373 wbd_delta = (s16)wbd - (((s16)wbd_offset+10)*4) ;
2374
2375 deb_info("update lna, agc_global=%d agc1=%d agc2=%d",
2376 agc_global, agc1, agc2);
2377 deb_info("update lna, wbd=%d wbd target=%d wbd offset=%d wbd delta=%d",
2378 wbd, wbd_target, wbd_offset, wbd_delta);
2379
2380 if ((agc1 < threshold_agc1) && (wbd_delta > 0)) {
2381 dib0090_set_switch(fe, 1, 1, 1);
2382 dib0090_set_vga(fe, 0);
2383 dib0090_update_rframp_7090(fe, 0);
2384 dib0090_update_tuning_table_7090(fe, 0);
2385 } else {
2386 dib0090_set_vga(fe, 1);
2387 dib0090_update_rframp_7090(fe, 1);
2388 dib0090_update_tuning_table_7090(fe, 1);
2389 dib0090_set_switch(fe, 0, 0, 0);
2390 }
2391
2392 return 0;
2393}
2394
2095static struct dib0090_wbd_slope dib7090_wbd_table[] = { 2395static struct dib0090_wbd_slope dib7090_wbd_table[] = {
2096 { 380, 81, 850, 64, 540, 4}, 2396 { 380, 81, 850, 64, 540, 4},
2097 { 860, 51, 866, 21, 375, 4}, 2397 { 860, 51, 866, 21, 375, 4},
@@ -2100,7 +2400,16 @@ static struct dib0090_wbd_slope dib7090_wbd_table[] = {
2100 { 0xFFFF, 0, 0, 0, 0, 0}, 2400 { 0xFFFF, 0, 0, 0, 0, 0},
2101}; 2401};
2102 2402
2103struct dibx000_agc_config dib7090_agc_config[2] = { 2403static struct dib0090_wbd_slope dib7090e_wbd_table[] = {
2404 { 380, 81, 850, 64, 540, 4},
2405 { 700, 51, 866, 21, 320, 4},
2406 { 860, 48, 666, 18, 330, 6},
2407 {1700, 0, 250, 0, 100, 6},
2408 {2600, 0, 250, 0, 100, 6},
2409 { 0xFFFF, 0, 0, 0, 0, 0},
2410};
2411
2412static struct dibx000_agc_config dib7090_agc_config[2] = {
2104 { 2413 {
2105 .band_caps = BAND_UHF, 2414 .band_caps = BAND_UHF,
2106 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 2415 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
@@ -2278,6 +2587,34 @@ static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2278 } 2587 }
2279}; 2588};
2280 2589
2590static struct dib7000p_config tfe7090e_dib7000p_config = {
2591 .output_mpeg2_in_188_bytes = 1,
2592 .hostbus_diversity = 1,
2593 .tuner_is_baseband = 1,
2594 .update_lna = dib7090e_update_lna,
2595
2596 .agc_config_count = 2,
2597 .agc = dib7090_agc_config,
2598
2599 .bw = &dib7090_clock_config_12_mhz,
2600
2601 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2602 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2603 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2604
2605 .pwm_freq_div = 0,
2606
2607 .agc_control = dib7090_agc_restart,
2608
2609 .spur_protect = 0,
2610 .disable_sample_and_hold = 0,
2611 .enable_current_mirror = 0,
2612 .diversity_delay = 0,
2613
2614 .output_mode = OUTMODE_MPEG2_FIFO,
2615 .enMpegOutput = 1,
2616};
2617
2281static const struct dib0090_config nim7090_dib0090_config = { 2618static const struct dib0090_config nim7090_dib0090_config = {
2282 .io.clock_khz = 12000, 2619 .io.clock_khz = 12000,
2283 .io.pll_bypass = 0, 2620 .io.pll_bypass = 0,
@@ -2312,6 +2649,107 @@ static const struct dib0090_config nim7090_dib0090_config = {
2312 .in_soc = 1, 2649 .in_soc = 1,
2313}; 2650};
2314 2651
2652static const struct dib0090_config tfe7090e_dib0090_config = {
2653 .io.clock_khz = 12000,
2654 .io.pll_bypass = 0,
2655 .io.pll_range = 0,
2656 .io.pll_prediv = 3,
2657 .io.pll_loopdiv = 6,
2658 .io.adc_clock_ratio = 0,
2659 .io.pll_int_loop_filt = 0,
2660 .reset = dib7090_tuner_sleep,
2661 .sleep = dib7090_tuner_sleep,
2662
2663 .freq_offset_khz_uhf = 0,
2664 .freq_offset_khz_vhf = 0,
2665
2666 .get_adc_power = dib7090_get_adc_power,
2667
2668 .clkouttobamse = 1,
2669 .analog_output = 0,
2670
2671 .wbd_vhf_offset = 0,
2672 .wbd_cband_offset = 0,
2673 .use_pwm_agc = 1,
2674 .clkoutdrive = 0,
2675
2676 .fref_clock_ratio = 0,
2677
2678 .wbd = dib7090e_wbd_table,
2679
2680 .ls_cfg_pad_drv = 0,
2681 .data_tx_drv = 0,
2682 .low_if = NULL,
2683 .in_soc = 1,
2684 .force_cband_input = 1,
2685 .is_dib7090e = 1,
2686};
2687
2688static struct dib7000p_config tfe7790e_dib7000p_config = {
2689 .output_mpeg2_in_188_bytes = 1,
2690 .hostbus_diversity = 1,
2691 .tuner_is_baseband = 1,
2692 .update_lna = dib7090e_update_lna,
2693
2694 .agc_config_count = 2,
2695 .agc = dib7090_agc_config,
2696
2697 .bw = &dib7090_clock_config_12_mhz,
2698
2699 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2700 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2701 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2702
2703 .pwm_freq_div = 0,
2704
2705 .agc_control = dib7090_agc_restart,
2706
2707 .spur_protect = 0,
2708 .disable_sample_and_hold = 0,
2709 .enable_current_mirror = 0,
2710 .diversity_delay = 0,
2711
2712 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2713 .enMpegOutput = 1,
2714};
2715
2716static const struct dib0090_config tfe7790e_dib0090_config = {
2717 .io.clock_khz = 12000,
2718 .io.pll_bypass = 0,
2719 .io.pll_range = 0,
2720 .io.pll_prediv = 3,
2721 .io.pll_loopdiv = 6,
2722 .io.adc_clock_ratio = 0,
2723 .io.pll_int_loop_filt = 0,
2724 .reset = dib7090_tuner_sleep,
2725 .sleep = dib7090_tuner_sleep,
2726
2727 .freq_offset_khz_uhf = 0,
2728 .freq_offset_khz_vhf = 0,
2729
2730 .get_adc_power = dib7090_get_adc_power,
2731
2732 .clkouttobamse = 1,
2733 .analog_output = 0,
2734
2735 .wbd_vhf_offset = 0,
2736 .wbd_cband_offset = 0,
2737 .use_pwm_agc = 1,
2738 .clkoutdrive = 0,
2739
2740 .fref_clock_ratio = 0,
2741
2742 .wbd = dib7090e_wbd_table,
2743
2744 .ls_cfg_pad_drv = 0,
2745 .data_tx_drv = 0,
2746 .low_if = NULL,
2747 .in_soc = 1,
2748 .force_cband_input = 1,
2749 .is_dib7090e = 1,
2750 .force_crystal_mode = 1,
2751};
2752
2315static const struct dib0090_config tfe7090pvr_dib0090_config[2] = { 2753static const struct dib0090_config tfe7090pvr_dib0090_config[2] = {
2316 { 2754 {
2317 .io.clock_khz = 12000, 2755 .io.clock_khz = 12000,
@@ -2504,6 +2942,97 @@ static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
2504 return 0; 2942 return 0;
2505} 2943}
2506 2944
2945static int tfe7090e_frontend_attach(struct dvb_usb_adapter *adap)
2946{
2947 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2948 msleep(20);
2949 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2950 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2951 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2952 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2953
2954 msleep(20);
2955 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2956 msleep(20);
2957 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2958
2959 if (dib7000p_i2c_enumeration(&adap->dev->i2c_adap,
2960 1, 0x10, &tfe7090e_dib7000p_config) != 0) {
2961 err("%s: dib7000p_i2c_enumeration failed. Cannot continue\n",
2962 __func__);
2963 return -ENODEV;
2964 }
2965 adap->fe_adap[0].fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap,
2966 0x80, &tfe7090e_dib7000p_config);
2967
2968 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2969}
2970
2971static int tfe7790e_frontend_attach(struct dvb_usb_adapter *adap)
2972{
2973 struct dib0700_state *st = adap->dev->priv;
2974
2975 /* The TFE7790E requires the dib0700 to not be in master mode */
2976 st->disable_streaming_master_mode = 1;
2977
2978 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2979 msleep(20);
2980 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2981 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2982 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2983 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2984 msleep(20);
2985 dib0700_ctrl_clock(adap->dev, 72, 1);
2986 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2987 msleep(20);
2988 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2989
2990 if (dib7000p_i2c_enumeration(&adap->dev->i2c_adap,
2991 1, 0x10, &tfe7790e_dib7000p_config) != 0) {
2992 err("%s: dib7000p_i2c_enumeration failed. Cannot continue\n",
2993 __func__);
2994 return -ENODEV;
2995 }
2996 adap->fe_adap[0].fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap,
2997 0x80, &tfe7790e_dib7000p_config);
2998
2999 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3000}
3001
3002static int tfe7790e_tuner_attach(struct dvb_usb_adapter *adap)
3003{
3004 struct dib0700_adapter_state *st = adap->priv;
3005 struct i2c_adapter *tun_i2c =
3006 dib7090_get_i2c_tuner(adap->fe_adap[0].fe);
3007
3008 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
3009 &tfe7790e_dib0090_config) == NULL)
3010 return -ENODEV;
3011
3012 dib7000p_set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
3013
3014 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3015 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3016 return 0;
3017}
3018
3019static int tfe7090e_tuner_attach(struct dvb_usb_adapter *adap)
3020{
3021 struct dib0700_adapter_state *st = adap->priv;
3022 struct i2c_adapter *tun_i2c =
3023 dib7090_get_i2c_tuner(adap->fe_adap[0].fe);
3024
3025 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
3026 &tfe7090e_dib0090_config) == NULL)
3027 return -ENODEV;
3028
3029 dib7000p_set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
3030
3031 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3032 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3033 return 0;
3034}
3035
2507/* STK7070PD */ 3036/* STK7070PD */
2508static struct dib7000p_config stk7070pd_dib7000p_config[2] = { 3037static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
2509 { 3038 {
@@ -2960,6 +3489,9 @@ struct usb_device_id dib0700_usb_id_table[] = {
2960/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) }, 3489/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
2961 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) }, 3490 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
2962 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) }, 3491 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
3492 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090E) },
3493 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790E) },
3494/* 80 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
2963 { 0 } /* Terminating entry */ 3495 { 0 } /* Terminating entry */
2964}; 3496};
2965MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); 3497MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -4025,6 +4557,127 @@ struct dvb_usb_device_properties dib0700_devices[] = {
4025 RC_TYPE_NEC, 4557 RC_TYPE_NEC,
4026 .change_protocol = dib0700_change_protocol, 4558 .change_protocol = dib0700_change_protocol,
4027 }, 4559 },
4560 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4561 .num_adapters = 1,
4562 .adapter = {
4563 {
4564 .num_frontends = 1,
4565 .fe = {{
4566 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4567 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4568 .pid_filter_count = 32,
4569 .pid_filter = stk70x0p_pid_filter,
4570 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4571 .frontend_attach = tfe7090e_frontend_attach,
4572 .tuner_attach = tfe7090e_tuner_attach,
4573
4574 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4575 } },
4576
4577 .size_of_priv =
4578 sizeof(struct dib0700_adapter_state),
4579 },
4580 },
4581
4582 .num_device_descs = 1,
4583 .devices = {
4584 { "DiBcom TFE7090E reference design",
4585 { &dib0700_usb_id_table[78], NULL },
4586 { NULL },
4587 },
4588 },
4589
4590 .rc.core = {
4591 .rc_interval = DEFAULT_RC_INTERVAL,
4592 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4593 .module_name = "dib0700",
4594 .rc_query = dib0700_rc_query_old_firmware,
4595 .allowed_protos = RC_TYPE_RC5 |
4596 RC_TYPE_RC6 |
4597 RC_TYPE_NEC,
4598 .change_protocol = dib0700_change_protocol,
4599 },
4600 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4601 .num_adapters = 1,
4602 .adapter = {
4603 {
4604 .num_frontends = 1,
4605 .fe = {{
4606 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4607 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4608 .pid_filter_count = 32,
4609 .pid_filter = stk70x0p_pid_filter,
4610 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4611 .frontend_attach = tfe7790e_frontend_attach,
4612 .tuner_attach = tfe7790e_tuner_attach,
4613
4614 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4615 } },
4616
4617 .size_of_priv =
4618 sizeof(struct dib0700_adapter_state),
4619 },
4620 },
4621
4622 .num_device_descs = 1,
4623 .devices = {
4624 { "DiBcom TFE7790E reference design",
4625 { &dib0700_usb_id_table[79], NULL },
4626 { NULL },
4627 },
4628 },
4629
4630 .rc.core = {
4631 .rc_interval = DEFAULT_RC_INTERVAL,
4632 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4633 .module_name = "dib0700",
4634 .rc_query = dib0700_rc_query_old_firmware,
4635 .allowed_protos = RC_TYPE_RC5 |
4636 RC_TYPE_RC6 |
4637 RC_TYPE_NEC,
4638 .change_protocol = dib0700_change_protocol,
4639 },
4640 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4641 .num_adapters = 1,
4642 .adapter = {
4643 {
4644 .num_frontends = 1,
4645 .fe = {{
4646 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4647 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4648 .pid_filter_count = 32,
4649 .pid_filter = stk80xx_pid_filter,
4650 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4651 .frontend_attach = tfe8096p_frontend_attach,
4652 .tuner_attach = tfe8096p_tuner_attach,
4653
4654 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4655
4656 } },
4657
4658 .size_of_priv =
4659 sizeof(struct dib0700_adapter_state),
4660 },
4661 },
4662
4663 .num_device_descs = 1,
4664 .devices = {
4665 { "DiBcom TFE8096P reference design",
4666 { &dib0700_usb_id_table[80], NULL },
4667 { NULL },
4668 },
4669 },
4670
4671 .rc.core = {
4672 .rc_interval = DEFAULT_RC_INTERVAL,
4673 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4674 .module_name = "dib0700",
4675 .rc_query = dib0700_rc_query_old_firmware,
4676 .allowed_protos = RC_TYPE_RC5 |
4677 RC_TYPE_RC6 |
4678 RC_TYPE_NEC,
4679 .change_protocol = dib0700_change_protocol,
4680 },
4028 }, 4681 },
4029}; 4682};
4030 4683
diff --git a/drivers/media/dvb/dvb-usb/digitv.c b/drivers/media/dvb/dvb-usb/digitv.c
index 0a9a79820f2..ff34419a4c8 100644
--- a/drivers/media/dvb/dvb-usb/digitv.c
+++ b/drivers/media/dvb/dvb-usb/digitv.c
@@ -118,12 +118,12 @@ static struct mt352_config digitv_mt352_config = {
118 .demod_init = digitv_mt352_demod_init, 118 .demod_init = digitv_mt352_demod_init,
119}; 119};
120 120
121static int digitv_nxt6000_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 121static int digitv_nxt6000_tuner_set_params(struct dvb_frontend *fe)
122{ 122{
123 struct dvb_usb_adapter *adap = fe->dvb->priv; 123 struct dvb_usb_adapter *adap = fe->dvb->priv;
124 u8 b[5]; 124 u8 b[5];
125 125
126 fe->ops.tuner_ops.calc_regs(fe, fep, b, sizeof(b)); 126 fe->ops.tuner_ops.calc_regs(fe, b, sizeof(b));
127 if (fe->ops.i2c_gate_ctrl) 127 if (fe->ops.i2c_gate_ctrl)
128 fe->ops.i2c_gate_ctrl(fe, 1); 128 fe->ops.i2c_gate_ctrl(fe, 1);
129 return digitv_ctrl_msg(adap->dev, USB_WRITE_TUNER, 0, &b[1], 4, NULL, 0); 129 return digitv_ctrl_msg(adap->dev, USB_WRITE_TUNER, 0, &b[1], 4, NULL, 0);
diff --git a/drivers/media/dvb/dvb-usb/dtt200u-fe.c b/drivers/media/dvb/dvb-usb/dtt200u-fe.c
index 17413adec7a..3d81daa4917 100644
--- a/drivers/media/dvb/dvb-usb/dtt200u-fe.c
+++ b/drivers/media/dvb/dvb-usb/dtt200u-fe.c
@@ -16,7 +16,7 @@ struct dtt200u_fe_state {
16 16
17 fe_status_t stat; 17 fe_status_t stat;
18 18
19 struct dvb_frontend_parameters fep; 19 struct dtv_frontend_properties fep;
20 struct dvb_frontend frontend; 20 struct dvb_frontend frontend;
21}; 21};
22 22
@@ -100,22 +100,27 @@ static int dtt200u_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_fron
100 return 0; 100 return 0;
101} 101}
102 102
103static int dtt200u_fe_set_frontend(struct dvb_frontend* fe, 103static int dtt200u_fe_set_frontend(struct dvb_frontend *fe)
104 struct dvb_frontend_parameters *fep)
105{ 104{
105 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
106 struct dtt200u_fe_state *state = fe->demodulator_priv; 106 struct dtt200u_fe_state *state = fe->demodulator_priv;
107 int i; 107 int i;
108 fe_status_t st; 108 fe_status_t st;
109 u16 freq = fep->frequency / 250000; 109 u16 freq = fep->frequency / 250000;
110 u8 bwbuf[2] = { SET_BANDWIDTH, 0 },freqbuf[3] = { SET_RF_FREQ, 0, 0 }; 110 u8 bwbuf[2] = { SET_BANDWIDTH, 0 },freqbuf[3] = { SET_RF_FREQ, 0, 0 };
111 111
112 switch (fep->u.ofdm.bandwidth) { 112 switch (fep->bandwidth_hz) {
113 case BANDWIDTH_8_MHZ: bwbuf[1] = 8; break; 113 case 8000000:
114 case BANDWIDTH_7_MHZ: bwbuf[1] = 7; break; 114 bwbuf[1] = 8;
115 case BANDWIDTH_6_MHZ: bwbuf[1] = 6; break; 115 break;
116 case BANDWIDTH_AUTO: return -EOPNOTSUPP; 116 case 7000000:
117 default: 117 bwbuf[1] = 7;
118 return -EINVAL; 118 break;
119 case 6000000:
120 bwbuf[1] = 6;
121 break;
122 default:
123 return -EINVAL;
119 } 124 }
120 125
121 dvb_usb_generic_write(state->d,bwbuf,2); 126 dvb_usb_generic_write(state->d,bwbuf,2);
@@ -134,11 +139,11 @@ static int dtt200u_fe_set_frontend(struct dvb_frontend* fe,
134 return 0; 139 return 0;
135} 140}
136 141
137static int dtt200u_fe_get_frontend(struct dvb_frontend* fe, 142static int dtt200u_fe_get_frontend(struct dvb_frontend* fe)
138 struct dvb_frontend_parameters *fep)
139{ 143{
144 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
140 struct dtt200u_fe_state *state = fe->demodulator_priv; 145 struct dtt200u_fe_state *state = fe->demodulator_priv;
141 memcpy(fep,&state->fep,sizeof(struct dvb_frontend_parameters)); 146 memcpy(fep, &state->fep, sizeof(struct dtv_frontend_properties));
142 return 0; 147 return 0;
143} 148}
144 149
@@ -172,9 +177,9 @@ error:
172} 177}
173 178
174static struct dvb_frontend_ops dtt200u_fe_ops = { 179static struct dvb_frontend_ops dtt200u_fe_ops = {
180 .delsys = { SYS_DVBT },
175 .info = { 181 .info = {
176 .name = "WideView USB DVB-T", 182 .name = "WideView USB DVB-T",
177 .type = FE_OFDM,
178 .frequency_min = 44250000, 183 .frequency_min = 44250000,
179 .frequency_max = 867250000, 184 .frequency_max = 867250000,
180 .frequency_stepsize = 250000, 185 .frequency_stepsize = 250000,
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c b/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c
index ba4a7517354..ddf282f355b 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c
@@ -141,11 +141,17 @@ int dvb_usb_adapter_dvb_init(struct dvb_usb_adapter *adap, short *adapter_nums)
141 goto err_dmx_dev; 141 goto err_dmx_dev;
142 } 142 }
143 143
144 dvb_net_init(&adap->dvb_adap, &adap->dvb_net, &adap->demux.dmx); 144 if ((ret = dvb_net_init(&adap->dvb_adap, &adap->dvb_net,
145 &adap->demux.dmx)) < 0) {
146 err("dvb_net_init failed: error %d",ret);
147 goto err_net_init;
148 }
145 149
146 adap->state |= DVB_USB_ADAP_STATE_DVB; 150 adap->state |= DVB_USB_ADAP_STATE_DVB;
147 return 0; 151 return 0;
148 152
153err_net_init:
154 dvb_dmxdev_release(&adap->dmxdev);
149err_dmx_dev: 155err_dmx_dev:
150 dvb_dmx_release(&adap->demux); 156 dvb_dmx_release(&adap->demux);
151err_dmx: 157err_dmx:
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index 2d08c9b5128..d390ddaa5a5 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -109,10 +109,13 @@
109#define USB_PID_DIBCOM_STK807XPVR 0x1f98 109#define USB_PID_DIBCOM_STK807XPVR 0x1f98
110#define USB_PID_DIBCOM_STK8096GP 0x1fa0 110#define USB_PID_DIBCOM_STK8096GP 0x1fa0
111#define USB_PID_DIBCOM_NIM8096MD 0x1fa8 111#define USB_PID_DIBCOM_NIM8096MD 0x1fa8
112#define USB_PID_DIBCOM_TFE8096P 0x1f9C
112#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131 113#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131
113#define USB_PID_DIBCOM_STK7770P 0x1e80 114#define USB_PID_DIBCOM_STK7770P 0x1e80
114#define USB_PID_DIBCOM_NIM7090 0x1bb2 115#define USB_PID_DIBCOM_NIM7090 0x1bb2
115#define USB_PID_DIBCOM_TFE7090PVR 0x1bb4 116#define USB_PID_DIBCOM_TFE7090PVR 0x1bb4
117#define USB_PID_DIBCOM_TFE7090E 0x1bb7
118#define USB_PID_DIBCOM_TFE7790E 0x1e6e
116#define USB_PID_DIBCOM_NIM9090M 0x2383 119#define USB_PID_DIBCOM_NIM9090M 0x2383
117#define USB_PID_DIBCOM_NIM9090MD 0x2384 120#define USB_PID_DIBCOM_NIM9090MD 0x2384
118#define USB_PID_DPOSH_M9206_COLD 0x9206 121#define USB_PID_DPOSH_M9206_COLD 0x9206
@@ -128,6 +131,8 @@
128#define USB_PID_GRANDTEC_DVBT_USB_WARM 0x0fa1 131#define USB_PID_GRANDTEC_DVBT_USB_WARM 0x0fa1
129#define USB_PID_INTEL_CE9500 0x9500 132#define USB_PID_INTEL_CE9500 0x9500
130#define USB_PID_ITETECH_IT9135 0x9135 133#define USB_PID_ITETECH_IT9135 0x9135
134#define USB_PID_ITETECH_IT9135_9005 0x9005
135#define USB_PID_ITETECH_IT9135_9006 0x9006
131#define USB_PID_KWORLD_399U 0xe399 136#define USB_PID_KWORLD_399U 0xe399
132#define USB_PID_KWORLD_399U_2 0xe400 137#define USB_PID_KWORLD_399U_2 0xe400
133#define USB_PID_KWORLD_395U 0xe396 138#define USB_PID_KWORLD_395U 0xe396
@@ -322,6 +327,7 @@
322#define USB_PID_TVWAY_PLUS 0x0002 327#define USB_PID_TVWAY_PLUS 0x0002
323#define USB_PID_SVEON_STV20 0xe39d 328#define USB_PID_SVEON_STV20 0xe39d
324#define USB_PID_SVEON_STV22 0xe401 329#define USB_PID_SVEON_STV22 0xe401
330#define USB_PID_SVEON_STV22_IT9137 0xe411
325#define USB_PID_AZUREWAVE_AZ6027 0x3275 331#define USB_PID_AZUREWAVE_AZ6027 0x3275
326#define USB_PID_TERRATEC_DVBS2CI_V1 0x10a4 332#define USB_PID_TERRATEC_DVBS2CI_V1 0x10a4
327#define USB_PID_TERRATEC_DVBS2CI_V2 0x10ac 333#define USB_PID_TERRATEC_DVBS2CI_V2 0x10ac
diff --git a/drivers/media/dvb/dvb-usb/dw2102.c b/drivers/media/dvb/dvb-usb/dw2102.c
index ff941d20e6b..451c5a7adfb 100644
--- a/drivers/media/dvb/dvb-usb/dw2102.c
+++ b/drivers/media/dvb/dvb-usb/dw2102.c
@@ -1435,22 +1435,40 @@ static int dw2102_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
1435 return 0; 1435 return 0;
1436} 1436}
1437 1437
1438enum dw2102_table_entry {
1439 CYPRESS_DW2102,
1440 CYPRESS_DW2101,
1441 CYPRESS_DW2104,
1442 TEVII_S650,
1443 TERRATEC_CINERGY_S,
1444 CYPRESS_DW3101,
1445 TEVII_S630,
1446 PROF_1100,
1447 TEVII_S660,
1448 PROF_7500,
1449 GENIATECH_SU3000,
1450 TERRATEC_CINERGY_S2,
1451 TEVII_S480_1,
1452 TEVII_S480_2,
1453 X3M_SPC1400HD,
1454};
1455
1438static struct usb_device_id dw2102_table[] = { 1456static struct usb_device_id dw2102_table[] = {
1439 {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW2102)}, 1457 [CYPRESS_DW2102] = {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW2102)},
1440 {USB_DEVICE(USB_VID_CYPRESS, 0x2101)}, 1458 [CYPRESS_DW2101] = {USB_DEVICE(USB_VID_CYPRESS, 0x2101)},
1441 {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW2104)}, 1459 [CYPRESS_DW2104] = {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW2104)},
1442 {USB_DEVICE(0x9022, USB_PID_TEVII_S650)}, 1460 [TEVII_S650] = {USB_DEVICE(0x9022, USB_PID_TEVII_S650)},
1443 {USB_DEVICE(USB_VID_TERRATEC, USB_PID_CINERGY_S)}, 1461 [TERRATEC_CINERGY_S] = {USB_DEVICE(USB_VID_TERRATEC, USB_PID_CINERGY_S)},
1444 {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW3101)}, 1462 [CYPRESS_DW3101] = {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW3101)},
1445 {USB_DEVICE(0x9022, USB_PID_TEVII_S630)}, 1463 [TEVII_S630] = {USB_DEVICE(0x9022, USB_PID_TEVII_S630)},
1446 {USB_DEVICE(0x3011, USB_PID_PROF_1100)}, 1464 [PROF_1100] = {USB_DEVICE(0x3011, USB_PID_PROF_1100)},
1447 {USB_DEVICE(0x9022, USB_PID_TEVII_S660)}, 1465 [TEVII_S660] = {USB_DEVICE(0x9022, USB_PID_TEVII_S660)},
1448 {USB_DEVICE(0x3034, 0x7500)}, 1466 [PROF_7500] = {USB_DEVICE(0x3034, 0x7500)},
1449 {USB_DEVICE(0x1f4d, 0x3000)}, 1467 [GENIATECH_SU3000] = {USB_DEVICE(0x1f4d, 0x3000)},
1450 {USB_DEVICE(USB_VID_TERRATEC, 0x00a8)}, 1468 [TERRATEC_CINERGY_S2] = {USB_DEVICE(USB_VID_TERRATEC, 0x00a8)},
1451 {USB_DEVICE(0x9022, USB_PID_TEVII_S480_1)}, 1469 [TEVII_S480_1] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_1)},
1452 {USB_DEVICE(0x9022, USB_PID_TEVII_S480_2)}, 1470 [TEVII_S480_2] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_2)},
1453 {USB_DEVICE(0x1f4d, 0x3100)}, 1471 [X3M_SPC1400HD] = {USB_DEVICE(0x1f4d, 0x3100)},
1454 { } 1472 { }
1455}; 1473};
1456 1474
@@ -1610,15 +1628,15 @@ static struct dvb_usb_device_properties dw2102_properties = {
1610 .num_device_descs = 3, 1628 .num_device_descs = 3,
1611 .devices = { 1629 .devices = {
1612 {"DVBWorld DVB-S 2102 USB2.0", 1630 {"DVBWorld DVB-S 2102 USB2.0",
1613 {&dw2102_table[0], NULL}, 1631 {&dw2102_table[CYPRESS_DW2102], NULL},
1614 {NULL}, 1632 {NULL},
1615 }, 1633 },
1616 {"DVBWorld DVB-S 2101 USB2.0", 1634 {"DVBWorld DVB-S 2101 USB2.0",
1617 {&dw2102_table[1], NULL}, 1635 {&dw2102_table[CYPRESS_DW2101], NULL},
1618 {NULL}, 1636 {NULL},
1619 }, 1637 },
1620 {"TerraTec Cinergy S USB", 1638 {"TerraTec Cinergy S USB",
1621 {&dw2102_table[4], NULL}, 1639 {&dw2102_table[TERRATEC_CINERGY_S], NULL},
1622 {NULL}, 1640 {NULL},
1623 }, 1641 },
1624 } 1642 }
@@ -1664,11 +1682,11 @@ static struct dvb_usb_device_properties dw2104_properties = {
1664 .num_device_descs = 2, 1682 .num_device_descs = 2,
1665 .devices = { 1683 .devices = {
1666 { "DVBWorld DW2104 USB2.0", 1684 { "DVBWorld DW2104 USB2.0",
1667 {&dw2102_table[2], NULL}, 1685 {&dw2102_table[CYPRESS_DW2104], NULL},
1668 {NULL}, 1686 {NULL},
1669 }, 1687 },
1670 { "TeVii S650 USB2.0", 1688 { "TeVii S650 USB2.0",
1671 {&dw2102_table[3], NULL}, 1689 {&dw2102_table[TEVII_S650], NULL},
1672 {NULL}, 1690 {NULL},
1673 }, 1691 },
1674 } 1692 }
@@ -1715,7 +1733,7 @@ static struct dvb_usb_device_properties dw3101_properties = {
1715 .num_device_descs = 1, 1733 .num_device_descs = 1,
1716 .devices = { 1734 .devices = {
1717 { "DVBWorld DVB-C 3101 USB2.0", 1735 { "DVBWorld DVB-C 3101 USB2.0",
1718 {&dw2102_table[5], NULL}, 1736 {&dw2102_table[CYPRESS_DW3101], NULL},
1719 {NULL}, 1737 {NULL},
1720 }, 1738 },
1721 } 1739 }
@@ -1761,7 +1779,7 @@ static struct dvb_usb_device_properties s6x0_properties = {
1761 .num_device_descs = 1, 1779 .num_device_descs = 1,
1762 .devices = { 1780 .devices = {
1763 {"TeVii S630 USB", 1781 {"TeVii S630 USB",
1764 {&dw2102_table[6], NULL}, 1782 {&dw2102_table[TEVII_S630], NULL},
1765 {NULL}, 1783 {NULL},
1766 }, 1784 },
1767 } 1785 }
@@ -1770,33 +1788,33 @@ static struct dvb_usb_device_properties s6x0_properties = {
1770struct dvb_usb_device_properties *p1100; 1788struct dvb_usb_device_properties *p1100;
1771static struct dvb_usb_device_description d1100 = { 1789static struct dvb_usb_device_description d1100 = {
1772 "Prof 1100 USB ", 1790 "Prof 1100 USB ",
1773 {&dw2102_table[7], NULL}, 1791 {&dw2102_table[PROF_1100], NULL},
1774 {NULL}, 1792 {NULL},
1775}; 1793};
1776 1794
1777struct dvb_usb_device_properties *s660; 1795struct dvb_usb_device_properties *s660;
1778static struct dvb_usb_device_description d660 = { 1796static struct dvb_usb_device_description d660 = {
1779 "TeVii S660 USB", 1797 "TeVii S660 USB",
1780 {&dw2102_table[8], NULL}, 1798 {&dw2102_table[TEVII_S660], NULL},
1781 {NULL}, 1799 {NULL},
1782}; 1800};
1783 1801
1784static struct dvb_usb_device_description d480_1 = { 1802static struct dvb_usb_device_description d480_1 = {
1785 "TeVii S480.1 USB", 1803 "TeVii S480.1 USB",
1786 {&dw2102_table[12], NULL}, 1804 {&dw2102_table[TEVII_S480_1], NULL},
1787 {NULL}, 1805 {NULL},
1788}; 1806};
1789 1807
1790static struct dvb_usb_device_description d480_2 = { 1808static struct dvb_usb_device_description d480_2 = {
1791 "TeVii S480.2 USB", 1809 "TeVii S480.2 USB",
1792 {&dw2102_table[13], NULL}, 1810 {&dw2102_table[TEVII_S480_2], NULL},
1793 {NULL}, 1811 {NULL},
1794}; 1812};
1795 1813
1796struct dvb_usb_device_properties *p7500; 1814struct dvb_usb_device_properties *p7500;
1797static struct dvb_usb_device_description d7500 = { 1815static struct dvb_usb_device_description d7500 = {
1798 "Prof 7500 USB DVB-S2", 1816 "Prof 7500 USB DVB-S2",
1799 {&dw2102_table[9], NULL}, 1817 {&dw2102_table[PROF_7500], NULL},
1800 {NULL}, 1818 {NULL},
1801}; 1819};
1802 1820
@@ -1842,15 +1860,15 @@ static struct dvb_usb_device_properties su3000_properties = {
1842 .num_device_descs = 3, 1860 .num_device_descs = 3,
1843 .devices = { 1861 .devices = {
1844 { "SU3000HD DVB-S USB2.0", 1862 { "SU3000HD DVB-S USB2.0",
1845 { &dw2102_table[10], NULL }, 1863 { &dw2102_table[GENIATECH_SU3000], NULL },
1846 { NULL }, 1864 { NULL },
1847 }, 1865 },
1848 { "Terratec Cinergy S2 USB HD", 1866 { "Terratec Cinergy S2 USB HD",
1849 { &dw2102_table[11], NULL }, 1867 { &dw2102_table[TERRATEC_CINERGY_S2], NULL },
1850 { NULL }, 1868 { NULL },
1851 }, 1869 },
1852 { "X3M TV SPC1400HD PCI", 1870 { "X3M TV SPC1400HD PCI",
1853 { &dw2102_table[14], NULL }, 1871 { &dw2102_table[X3M_SPC1400HD], NULL },
1854 { NULL }, 1872 { NULL },
1855 }, 1873 },
1856 } 1874 }
@@ -1859,12 +1877,11 @@ static struct dvb_usb_device_properties su3000_properties = {
1859static int dw2102_probe(struct usb_interface *intf, 1877static int dw2102_probe(struct usb_interface *intf,
1860 const struct usb_device_id *id) 1878 const struct usb_device_id *id)
1861{ 1879{
1862 p1100 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL); 1880 p1100 = kmemdup(&s6x0_properties,
1881 sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
1863 if (!p1100) 1882 if (!p1100)
1864 return -ENOMEM; 1883 return -ENOMEM;
1865 /* copy default structure */ 1884 /* copy default structure */
1866 memcpy(p1100, &s6x0_properties,
1867 sizeof(struct dvb_usb_device_properties));
1868 /* fill only different fields */ 1885 /* fill only different fields */
1869 p1100->firmware = "dvb-usb-p1100.fw"; 1886 p1100->firmware = "dvb-usb-p1100.fw";
1870 p1100->devices[0] = d1100; 1887 p1100->devices[0] = d1100;
@@ -1872,13 +1889,12 @@ static int dw2102_probe(struct usb_interface *intf,
1872 p1100->rc.legacy.rc_map_size = ARRAY_SIZE(rc_map_tbs_table); 1889 p1100->rc.legacy.rc_map_size = ARRAY_SIZE(rc_map_tbs_table);
1873 p1100->adapter->fe[0].frontend_attach = stv0288_frontend_attach; 1890 p1100->adapter->fe[0].frontend_attach = stv0288_frontend_attach;
1874 1891
1875 s660 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL); 1892 s660 = kmemdup(&s6x0_properties,
1893 sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
1876 if (!s660) { 1894 if (!s660) {
1877 kfree(p1100); 1895 kfree(p1100);
1878 return -ENOMEM; 1896 return -ENOMEM;
1879 } 1897 }
1880 memcpy(s660, &s6x0_properties,
1881 sizeof(struct dvb_usb_device_properties));
1882 s660->firmware = "dvb-usb-s660.fw"; 1898 s660->firmware = "dvb-usb-s660.fw";
1883 s660->num_device_descs = 3; 1899 s660->num_device_descs = 3;
1884 s660->devices[0] = d660; 1900 s660->devices[0] = d660;
@@ -1886,14 +1902,13 @@ static int dw2102_probe(struct usb_interface *intf,
1886 s660->devices[2] = d480_2; 1902 s660->devices[2] = d480_2;
1887 s660->adapter->fe[0].frontend_attach = ds3000_frontend_attach; 1903 s660->adapter->fe[0].frontend_attach = ds3000_frontend_attach;
1888 1904
1889 p7500 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL); 1905 p7500 = kmemdup(&s6x0_properties,
1906 sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
1890 if (!p7500) { 1907 if (!p7500) {
1891 kfree(p1100); 1908 kfree(p1100);
1892 kfree(s660); 1909 kfree(s660);
1893 return -ENOMEM; 1910 return -ENOMEM;
1894 } 1911 }
1895 memcpy(p7500, &s6x0_properties,
1896 sizeof(struct dvb_usb_device_properties));
1897 p7500->firmware = "dvb-usb-p7500.fw"; 1912 p7500->firmware = "dvb-usb-p7500.fw";
1898 p7500->devices[0] = d7500; 1913 p7500->devices[0] = d7500;
1899 p7500->rc.legacy.rc_map_table = rc_map_tbs_table; 1914 p7500->rc.legacy.rc_map_table = rc_map_tbs_table;
diff --git a/drivers/media/dvb/dvb-usb/friio-fe.c b/drivers/media/dvb/dvb-usb/friio-fe.c
index 015b4e8af1a..90a70c66a96 100644
--- a/drivers/media/dvb/dvb-usb/friio-fe.c
+++ b/drivers/media/dvb/dvb-usb/friio-fe.c
@@ -282,23 +282,24 @@ static int jdvbt90502_set_property(struct dvb_frontend *fe,
282 return r; 282 return r;
283} 283}
284 284
285static int jdvbt90502_get_frontend(struct dvb_frontend *fe, 285static int jdvbt90502_get_frontend(struct dvb_frontend *fe)
286 struct dvb_frontend_parameters *p)
287{ 286{
287 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
288 p->inversion = INVERSION_AUTO; 288 p->inversion = INVERSION_AUTO;
289 p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; 289 p->bandwidth_hz = 6000000;
290 p->u.ofdm.code_rate_HP = FEC_AUTO; 290 p->code_rate_HP = FEC_AUTO;
291 p->u.ofdm.code_rate_LP = FEC_AUTO; 291 p->code_rate_LP = FEC_AUTO;
292 p->u.ofdm.constellation = QAM_64; 292 p->modulation = QAM_64;
293 p->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO; 293 p->transmission_mode = TRANSMISSION_MODE_AUTO;
294 p->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO; 294 p->guard_interval = GUARD_INTERVAL_AUTO;
295 p->u.ofdm.hierarchy_information = HIERARCHY_AUTO; 295 p->hierarchy = HIERARCHY_AUTO;
296 return 0; 296 return 0;
297} 297}
298 298
299static int jdvbt90502_set_frontend(struct dvb_frontend *fe, 299static int jdvbt90502_set_frontend(struct dvb_frontend *fe)
300 struct dvb_frontend_parameters *p)
301{ 300{
301 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
302
302 /** 303 /**
303 * NOTE: ignore all the parameters except frequency. 304 * NOTE: ignore all the parameters except frequency.
304 * others should be fixed to the proper value for ISDB-T, 305 * others should be fixed to the proper value for ISDB-T,
@@ -438,14 +439,12 @@ error:
438} 439}
439 440
440static struct dvb_frontend_ops jdvbt90502_ops = { 441static struct dvb_frontend_ops jdvbt90502_ops = {
441 442 .delsys = { SYS_ISDBT },
442 .info = { 443 .info = {
443 .name = "Comtech JDVBT90502 ISDB-T", 444 .name = "Comtech JDVBT90502 ISDB-T",
444 .type = FE_OFDM,
445 .frequency_min = 473000000, /* UHF 13ch, center */ 445 .frequency_min = 473000000, /* UHF 13ch, center */
446 .frequency_max = 767142857, /* UHF 62ch, center */ 446 .frequency_max = 767142857, /* UHF 62ch, center */
447 .frequency_stepsize = JDVBT90502_PLL_CLK / 447 .frequency_stepsize = JDVBT90502_PLL_CLK / JDVBT90502_PLL_DIVIDER,
448 JDVBT90502_PLL_DIVIDER,
449 .frequency_tolerance = 0, 448 .frequency_tolerance = 0,
450 449
451 /* NOTE: this driver ignores all parameters but frequency. */ 450 /* NOTE: this driver ignores all parameters but frequency. */
diff --git a/drivers/media/dvb/dvb-usb/gp8psk-fe.c b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
index 5426267980c..67957dd99ed 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk-fe.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
@@ -113,28 +113,12 @@ static int gp8psk_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_front
113 return 0; 113 return 0;
114} 114}
115 115
116static int gp8psk_fe_set_property(struct dvb_frontend *fe, 116static int gp8psk_fe_set_frontend(struct dvb_frontend *fe)
117 struct dtv_property *tvp)
118{
119 deb_fe("%s(..)\n", __func__);
120 return 0;
121}
122
123static int gp8psk_fe_get_property(struct dvb_frontend *fe,
124 struct dtv_property *tvp)
125{
126 deb_fe("%s(..)\n", __func__);
127 return 0;
128}
129
130
131static int gp8psk_fe_set_frontend(struct dvb_frontend* fe,
132 struct dvb_frontend_parameters *fep)
133{ 117{
134 struct gp8psk_fe_state *state = fe->demodulator_priv; 118 struct gp8psk_fe_state *state = fe->demodulator_priv;
135 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 119 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
136 u8 cmd[10]; 120 u8 cmd[10];
137 u32 freq = fep->frequency * 1000; 121 u32 freq = c->frequency * 1000;
138 int gp_product_id = le16_to_cpu(state->d->udev->descriptor.idProduct); 122 int gp_product_id = le16_to_cpu(state->d->udev->descriptor.idProduct);
139 123
140 deb_fe("%s()\n", __func__); 124 deb_fe("%s()\n", __func__);
@@ -342,9 +326,9 @@ success:
342 326
343 327
344static struct dvb_frontend_ops gp8psk_fe_ops = { 328static struct dvb_frontend_ops gp8psk_fe_ops = {
329 .delsys = { SYS_DVBS },
345 .info = { 330 .info = {
346 .name = "Genpix DVB-S", 331 .name = "Genpix DVB-S",
347 .type = FE_QPSK,
348 .frequency_min = 800000, 332 .frequency_min = 800000,
349 .frequency_max = 2250000, 333 .frequency_max = 2250000,
350 .frequency_stepsize = 100, 334 .frequency_stepsize = 100,
@@ -366,8 +350,6 @@ static struct dvb_frontend_ops gp8psk_fe_ops = {
366 .init = NULL, 350 .init = NULL,
367 .sleep = NULL, 351 .sleep = NULL,
368 352
369 .set_property = gp8psk_fe_set_property,
370 .get_property = gp8psk_fe_get_property,
371 .set_frontend = gp8psk_fe_set_frontend, 353 .set_frontend = gp8psk_fe_set_frontend,
372 354
373 .get_tune_settings = gp8psk_fe_get_tune_settings, 355 .get_tune_settings = gp8psk_fe_get_tune_settings,
diff --git a/drivers/media/dvb/dvb-usb/it913x.c b/drivers/media/dvb/dvb-usb/it913x.c
index 67094b879bb..9f01cd7a6e3 100644
--- a/drivers/media/dvb/dvb-usb/it913x.c
+++ b/drivers/media/dvb/dvb-usb/it913x.c
@@ -52,42 +52,59 @@ static int pid_filter;
52module_param_named(pid, pid_filter, int, 0644); 52module_param_named(pid, pid_filter, int, 0644);
53MODULE_PARM_DESC(pid, "set default 0=on 1=off"); 53MODULE_PARM_DESC(pid, "set default 0=on 1=off");
54 54
55static int dvb_usb_it913x_firmware;
56module_param_named(firmware, dvb_usb_it913x_firmware, int, 0644);
57MODULE_PARM_DESC(firmware, "set firmware 0=auto 1=IT9137 2=IT9135V1");
58
59
55int cmd_counter; 60int cmd_counter;
56 61
57DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 62DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
58 63
59struct it913x_state { 64struct it913x_state {
60 u8 id; 65 u8 id;
61}; 66 struct ite_config it913x_config;
62
63struct ite_config {
64 u8 chip_ver;
65 u16 chip_type;
66 u32 firmware;
67 u8 tuner_id_0;
68 u8 tuner_id_1;
69 u8 dual_mode;
70}; 67};
71 68
72struct ite_config it913x_config; 69struct ite_config it913x_config;
73 70
71#define IT913X_RETRY 10
72#define IT913X_SND_TIMEOUT 100
73#define IT913X_RCV_TIMEOUT 200
74
74static int it913x_bulk_write(struct usb_device *dev, 75static int it913x_bulk_write(struct usb_device *dev,
75 u8 *snd, int len, u8 pipe) 76 u8 *snd, int len, u8 pipe)
76{ 77{
77 int ret, actual_l; 78 int ret, actual_l, i;
79
80 for (i = 0; i < IT913X_RETRY; i++) {
81 ret = usb_bulk_msg(dev, usb_sndbulkpipe(dev, pipe),
82 snd, len , &actual_l, IT913X_SND_TIMEOUT);
83 if (ret == 0 || ret != -EBUSY || ret != -ETIMEDOUT)
84 break;
85 }
86
87 if (len != actual_l && ret == 0)
88 ret = -EAGAIN;
78 89
79 ret = usb_bulk_msg(dev, usb_sndbulkpipe(dev, pipe),
80 snd, len , &actual_l, 100);
81 return ret; 90 return ret;
82} 91}
83 92
84static int it913x_bulk_read(struct usb_device *dev, 93static int it913x_bulk_read(struct usb_device *dev,
85 u8 *rev, int len, u8 pipe) 94 u8 *rev, int len, u8 pipe)
86{ 95{
87 int ret, actual_l; 96 int ret, actual_l, i;
97
98 for (i = 0; i < IT913X_RETRY; i++) {
99 ret = usb_bulk_msg(dev, usb_rcvbulkpipe(dev, pipe),
100 rev, len , &actual_l, IT913X_RCV_TIMEOUT);
101 if (ret == 0 || ret != -EBUSY || ret != -ETIMEDOUT)
102 break;
103 }
104
105 if (len != actual_l && ret == 0)
106 ret = -EAGAIN;
88 107
89 ret = usb_bulk_msg(dev, usb_rcvbulkpipe(dev, pipe),
90 rev, len , &actual_l, 200);
91 return ret; 108 return ret;
92} 109}
93 110
@@ -100,7 +117,7 @@ static u16 check_sum(u8 *p, u8 len)
100 return ~sum; 117 return ~sum;
101} 118}
102 119
103static int it913x_io(struct usb_device *udev, u8 mode, u8 pro, 120static int it913x_usb_talk(struct usb_device *udev, u8 mode, u8 pro,
104 u8 cmd, u32 reg, u8 addr, u8 *data, u8 len) 121 u8 cmd, u32 reg, u8 addr, u8 *data, u8 len)
105{ 122{
106 int ret = 0, i, buf_size = 1; 123 int ret = 0, i, buf_size = 1;
@@ -159,22 +176,41 @@ static int it913x_io(struct usb_device *udev, u8 mode, u8 pro,
159 buff[buf_size++] = (chk_sum & 0xff); 176 buff[buf_size++] = (chk_sum & 0xff);
160 177
161 ret = it913x_bulk_write(udev, buff, buf_size , 0x02); 178 ret = it913x_bulk_write(udev, buff, buf_size , 0x02);
179 if (ret < 0)
180 goto error;
162 181
163 ret |= it913x_bulk_read(udev, buff, (mode & 1) ? 182 ret = it913x_bulk_read(udev, buff, (mode & 1) ?
164 5 : len + 5 , 0x01); 183 5 : len + 5 , 0x01);
184 if (ret < 0)
185 goto error;
165 186
166 rlen = (mode & 0x1) ? 0x1 : len; 187 rlen = (mode & 0x1) ? 0x1 : len;
167 188
168 if (mode & 1) 189 if (mode & 1)
169 ret |= buff[2]; 190 ret = buff[2];
170 else 191 else
171 memcpy(data, &buff[3], rlen); 192 memcpy(data, &buff[3], rlen);
172 193
173 cmd_counter++; 194 cmd_counter++;
174 195
175 kfree(buff); 196error: kfree(buff);
176 197
177 return (ret < 0) ? -ENODEV : 0; 198 return ret;
199}
200
201static int it913x_io(struct usb_device *udev, u8 mode, u8 pro,
202 u8 cmd, u32 reg, u8 addr, u8 *data, u8 len)
203{
204 int ret, i;
205
206 for (i = 0; i < IT913X_RETRY; i++) {
207 ret = it913x_usb_talk(udev, mode, pro,
208 cmd, reg, addr, data, len);
209 if (ret != -EAGAIN)
210 break;
211 }
212
213 return ret;
178} 214}
179 215
180static int it913x_wr_reg(struct usb_device *udev, u8 pro, u32 reg , u8 data) 216static int it913x_wr_reg(struct usb_device *udev, u8 pro, u32 reg , u8 data)
@@ -223,15 +259,15 @@ static u32 it913x_query(struct usb_device *udev, u8 pro)
223 259
224static int it913x_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff) 260static int it913x_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff)
225{ 261{
226 int ret = 0; 262 struct usb_device *udev = adap->dev->udev;
263 int ret;
227 u8 pro = (adap->id == 0) ? DEV_0_DMOD : DEV_1_DMOD; 264 u8 pro = (adap->id == 0) ? DEV_0_DMOD : DEV_1_DMOD;
228 265
229 if (mutex_lock_interruptible(&adap->dev->i2c_mutex) < 0) 266 if (mutex_lock_interruptible(&adap->dev->i2c_mutex) < 0)
230 return -EAGAIN; 267 return -EAGAIN;
231 deb_info(1, "PID_C (%02x)", onoff); 268 deb_info(1, "PID_C (%02x)", onoff);
232 269
233 if (!onoff) 270 ret = it913x_wr_reg(udev, pro, PID_EN, onoff);
234 ret = it913x_wr_reg(adap->dev->udev, pro, PID_RST, 0x1);
235 271
236 mutex_unlock(&adap->dev->i2c_mutex); 272 mutex_unlock(&adap->dev->i2c_mutex);
237 return ret; 273 return ret;
@@ -241,27 +277,20 @@ static int it913x_pid_filter(struct dvb_usb_adapter *adap,
241 int index, u16 pid, int onoff) 277 int index, u16 pid, int onoff)
242{ 278{
243 struct usb_device *udev = adap->dev->udev; 279 struct usb_device *udev = adap->dev->udev;
244 int ret = 0; 280 int ret;
245 u8 pro = (adap->id == 0) ? DEV_0_DMOD : DEV_1_DMOD; 281 u8 pro = (adap->id == 0) ? DEV_0_DMOD : DEV_1_DMOD;
246 282
247 if (pid_filter > 0)
248 return 0;
249
250 if (mutex_lock_interruptible(&adap->dev->i2c_mutex) < 0) 283 if (mutex_lock_interruptible(&adap->dev->i2c_mutex) < 0)
251 return -EAGAIN; 284 return -EAGAIN;
252 deb_info(1, "PID_F (%02x)", onoff); 285 deb_info(1, "PID_F (%02x)", onoff);
253 if (onoff) {
254 ret = it913x_wr_reg(udev, pro, PID_EN, 0x1);
255
256 ret |= it913x_wr_reg(udev, pro, PID_LSB, (u8)(pid & 0xff));
257 286
258 ret |= it913x_wr_reg(udev, pro, PID_MSB, (u8)(pid >> 8)); 287 ret = it913x_wr_reg(udev, pro, PID_LSB, (u8)(pid & 0xff));
259 288
260 ret |= it913x_wr_reg(udev, pro, PID_INX_EN, (u8)onoff); 289 ret |= it913x_wr_reg(udev, pro, PID_MSB, (u8)(pid >> 8));
261 290
262 ret |= it913x_wr_reg(udev, pro, PID_INX, (u8)(index & 0x1f)); 291 ret |= it913x_wr_reg(udev, pro, PID_INX_EN, (u8)onoff);
263 292
264 } 293 ret |= it913x_wr_reg(udev, pro, PID_INX, (u8)(index & 0x1f));
265 294
266 mutex_unlock(&adap->dev->i2c_mutex); 295 mutex_unlock(&adap->dev->i2c_mutex);
267 return 0; 296 return 0;
@@ -337,15 +366,73 @@ static int it913x_rc_query(struct dvb_usb_device *d)
337 366
338 if ((ibuf[2] + ibuf[3]) == 0xff) { 367 if ((ibuf[2] + ibuf[3]) == 0xff) {
339 key = ibuf[2]; 368 key = ibuf[2];
340 key += ibuf[0] << 8; 369 key += ibuf[0] << 16;
341 deb_info(1, "INT Key =%08x", key); 370 key += ibuf[1] << 8;
371 deb_info(1, "NEC Extended Key =%08x", key);
342 if (d->rc_dev != NULL) 372 if (d->rc_dev != NULL)
343 rc_keydown(d->rc_dev, key, 0); 373 rc_keydown(d->rc_dev, key, 0);
344 } 374 }
375
345 mutex_unlock(&d->i2c_mutex); 376 mutex_unlock(&d->i2c_mutex);
346 377
347 return ret; 378 return ret;
348} 379}
380
381/* Firmware sets raw */
382const char fw_it9135_v1[] = "dvb-usb-it9135-01.fw";
383const char fw_it9135_v2[] = "dvb-usb-it9135-02.fw";
384const char fw_it9137[] = "dvb-usb-it9137-01.fw";
385
386static int ite_firmware_select(struct usb_device *udev,
387 struct dvb_usb_device_properties *props)
388{
389 int sw;
390 /* auto switch */
391 if (le16_to_cpu(udev->descriptor.idProduct) ==
392 USB_PID_ITETECH_IT9135)
393 sw = IT9135_V1_FW;
394 else if (le16_to_cpu(udev->descriptor.idProduct) ==
395 USB_PID_ITETECH_IT9135_9005)
396 sw = IT9135_V1_FW;
397 else if (le16_to_cpu(udev->descriptor.idProduct) ==
398 USB_PID_ITETECH_IT9135_9006) {
399 sw = IT9135_V2_FW;
400 if (it913x_config.tuner_id_0 == 0)
401 it913x_config.tuner_id_0 = IT9135_60;
402 } else
403 sw = IT9137_FW;
404
405 /* force switch */
406 if (dvb_usb_it913x_firmware != IT9135_AUTO)
407 sw = dvb_usb_it913x_firmware;
408
409 switch (sw) {
410 case IT9135_V1_FW:
411 it913x_config.firmware_ver = 1;
412 it913x_config.adc_x2 = 1;
413 props->firmware = fw_it9135_v1;
414 break;
415 case IT9135_V2_FW:
416 it913x_config.firmware_ver = 1;
417 it913x_config.adc_x2 = 1;
418 props->firmware = fw_it9135_v2;
419 break;
420 case IT9137_FW:
421 default:
422 it913x_config.firmware_ver = 0;
423 it913x_config.adc_x2 = 0;
424 props->firmware = fw_it9137;
425 }
426
427 return 0;
428}
429
430#define TS_MPEG_PKT_SIZE 188
431#define EP_LOW 21
432#define TS_BUFFER_SIZE_PID (EP_LOW*TS_MPEG_PKT_SIZE)
433#define EP_HIGH 348
434#define TS_BUFFER_SIZE_MAX (EP_HIGH*TS_MPEG_PKT_SIZE)
435
349static int it913x_identify_state(struct usb_device *udev, 436static int it913x_identify_state(struct usb_device *udev,
350 struct dvb_usb_device_properties *props, 437 struct dvb_usb_device_properties *props,
351 struct dvb_usb_device_description **desc, 438 struct dvb_usb_device_description **desc,
@@ -359,6 +446,19 @@ static int it913x_identify_state(struct usb_device *udev,
359 /* checnk for dual mode */ 446 /* checnk for dual mode */
360 it913x_config.dual_mode = it913x_read_reg(udev, 0x49c5); 447 it913x_config.dual_mode = it913x_read_reg(udev, 0x49c5);
361 448
449 if (udev->speed != USB_SPEED_HIGH) {
450 props->adapter[0].fe[0].pid_filter_count = 5;
451 info("USB 1 low speed mode - connect to USB 2 port");
452 if (pid_filter > 0)
453 pid_filter = 0;
454 if (it913x_config.dual_mode) {
455 it913x_config.dual_mode = 0;
456 info("Dual mode not supported in USB 1");
457 }
458 } else /* For replugging */
459 if(props->adapter[0].fe[0].pid_filter_count == 5)
460 props->adapter[0].fe[0].pid_filter_count = 31;
461
362 /* TODO different remotes */ 462 /* TODO different remotes */
363 remote = it913x_read_reg(udev, 0x49ac); /* Remote */ 463 remote = it913x_read_reg(udev, 0x49ac); /* Remote */
364 if (remote == 0) 464 if (remote == 0)
@@ -370,6 +470,28 @@ static int it913x_identify_state(struct usb_device *udev,
370 info("Dual mode=%x Remote=%x Tuner Type=%x", it913x_config.dual_mode 470 info("Dual mode=%x Remote=%x Tuner Type=%x", it913x_config.dual_mode
371 , remote, it913x_config.tuner_id_0); 471 , remote, it913x_config.tuner_id_0);
372 472
473 /* Select Stream Buffer Size and pid filter option*/
474 if (pid_filter) {
475 props->adapter[0].fe[0].stream.u.bulk.buffersize =
476 TS_BUFFER_SIZE_MAX;
477 props->adapter[0].fe[0].caps &=
478 ~DVB_USB_ADAP_NEED_PID_FILTERING;
479 } else
480 props->adapter[0].fe[0].stream.u.bulk.buffersize =
481 TS_BUFFER_SIZE_PID;
482
483 if (it913x_config.dual_mode) {
484 props->adapter[1].fe[0].stream.u.bulk.buffersize =
485 props->adapter[0].fe[0].stream.u.bulk.buffersize;
486 props->num_adapters = 2;
487 if (pid_filter)
488 props->adapter[1].fe[0].caps =
489 props->adapter[0].fe[0].caps;
490 } else
491 props->num_adapters = 1;
492
493 ret = ite_firmware_select(udev, props);
494
373 if (firm_no > 0) { 495 if (firm_no > 0) {
374 *cold = 0; 496 *cold = 0;
375 return 0; 497 return 0;
@@ -391,18 +513,22 @@ static int it913x_identify_state(struct usb_device *udev,
391 ret = it913x_wr_reg(udev, DEV_0, 513 ret = it913x_wr_reg(udev, DEV_0,
392 GPIOH1_O, 0x0); 514 GPIOH1_O, 0x0);
393 } 515 }
394 props->num_adapters = 2; 516 }
395 } else
396 props->num_adapters = 1;
397 517
398 reg = it913x_read_reg(udev, IO_MUX_POWER_CLK); 518 reg = it913x_read_reg(udev, IO_MUX_POWER_CLK);
399 519
400 if (it913x_config.dual_mode) { 520 if (it913x_config.dual_mode) {
401 ret |= it913x_wr_reg(udev, DEV_0, 0x4bfb, CHIP2_I2C_ADDR); 521 ret |= it913x_wr_reg(udev, DEV_0, 0x4bfb, CHIP2_I2C_ADDR);
402 ret |= it913x_wr_reg(udev, DEV_0, CLK_O_EN, 0x1); 522 if (it913x_config.firmware_ver == 1)
523 ret |= it913x_wr_reg(udev, DEV_0, 0xcfff, 0x1);
524 else
525 ret |= it913x_wr_reg(udev, DEV_0, CLK_O_EN, 0x1);
403 } else { 526 } else {
404 ret |= it913x_wr_reg(udev, DEV_0, 0x4bfb, 0x0); 527 ret |= it913x_wr_reg(udev, DEV_0, 0x4bfb, 0x0);
405 ret |= it913x_wr_reg(udev, DEV_0, CLK_O_EN, 0x0); 528 if (it913x_config.firmware_ver == 1)
529 ret |= it913x_wr_reg(udev, DEV_0, 0xcfff, 0x0);
530 else
531 ret |= it913x_wr_reg(udev, DEV_0, CLK_O_EN, 0x0);
406 } 532 }
407 533
408 *cold = 1; 534 *cold = 1;
@@ -428,35 +554,45 @@ static int it913x_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
428 return ret; 554 return ret;
429} 555}
430 556
431
432static int it913x_download_firmware(struct usb_device *udev, 557static int it913x_download_firmware(struct usb_device *udev,
433 const struct firmware *fw) 558 const struct firmware *fw)
434{ 559{
435 int ret = 0, i; 560 int ret = 0, i = 0, pos = 0;
436 u8 packet_size, dlen; 561 u8 packet_size, min_pkt;
437 u8 *fw_data; 562 u8 *fw_data;
438 563
439 packet_size = 0x29;
440
441 ret = it913x_wr_reg(udev, DEV_0, I2C_CLK, I2C_CLK_100); 564 ret = it913x_wr_reg(udev, DEV_0, I2C_CLK, I2C_CLK_100);
442 565
443 info("FRM Starting Firmware Download"); 566 info("FRM Starting Firmware Download");
444 /* This uses scatter write firmware headers follow */ 567
445 /* 03 XX 00 XX = chip number? */ 568 /* Multi firmware loader */
446 569 /* This uses scatter write firmware headers */
447 for (i = 0; i < fw->size; i += packet_size) { 570 /* The firmware must start with 03 XX 00 */
448 if (i > 0) 571 /* and be the extact firmware length */
449 packet_size = 0x39; 572
450 fw_data = (u8 *)(fw->data + i); 573 if (it913x_config.chip_ver == 2)
451 dlen = ((i + packet_size) > fw->size) 574 min_pkt = 0x11;
452 ? (fw->size - i) : packet_size; 575 else
453 ret |= it913x_io(udev, WRITE_DATA, DEV_0, 576 min_pkt = 0x19;
454 CMD_SCATTER_WRITE, 0, 0, fw_data, dlen); 577
455 udelay(1000); 578 while (i <= fw->size) {
579 if (((fw->data[i] == 0x3) && (fw->data[i + 2] == 0x0))
580 || (i == fw->size)) {
581 packet_size = i - pos;
582 if ((packet_size > min_pkt) || (i == fw->size)) {
583 fw_data = (u8 *)(fw->data + pos);
584 pos += packet_size;
585 if (packet_size > 0)
586 ret |= it913x_io(udev, WRITE_DATA,
587 DEV_0, CMD_SCATTER_WRITE, 0,
588 0, fw_data, packet_size);
589 udelay(1000);
590 }
591 }
592 i++;
456 } 593 }
457 594
458 ret |= it913x_io(udev, WRITE_CMD, DEV_0, 595 ret |= it913x_io(udev, WRITE_CMD, DEV_0, CMD_BOOT, 0, 0, NULL, 0);
459 CMD_BOOT, 0, 0, NULL, 0);
460 596
461 msleep(100); 597 msleep(100);
462 598
@@ -474,12 +610,17 @@ static int it913x_download_firmware(struct usb_device *udev,
474 /* Tuner function */ 610 /* Tuner function */
475 if (it913x_config.dual_mode) 611 if (it913x_config.dual_mode)
476 ret |= it913x_wr_reg(udev, DEV_0_DMOD , 0xec4c, 0xa0); 612 ret |= it913x_wr_reg(udev, DEV_0_DMOD , 0xec4c, 0xa0);
477 613 else
478 ret |= it913x_wr_reg(udev, DEV_0, PADODPU, 0x0); 614 ret |= it913x_wr_reg(udev, DEV_0_DMOD , 0xec4c, 0x68);
479 ret |= it913x_wr_reg(udev, DEV_0, AGC_O_D, 0x0); 615
480 if (it913x_config.dual_mode) { 616 if ((it913x_config.chip_ver == 1) &&
481 ret |= it913x_wr_reg(udev, DEV_1, PADODPU, 0x0); 617 (it913x_config.chip_type == 0x9135)) {
482 ret |= it913x_wr_reg(udev, DEV_1, AGC_O_D, 0x0); 618 ret |= it913x_wr_reg(udev, DEV_0, PADODPU, 0x0);
619 ret |= it913x_wr_reg(udev, DEV_0, AGC_O_D, 0x0);
620 if (it913x_config.dual_mode) {
621 ret |= it913x_wr_reg(udev, DEV_1, PADODPU, 0x0);
622 ret |= it913x_wr_reg(udev, DEV_1, AGC_O_D, 0x0);
623 }
483 } 624 }
484 625
485 return (ret < 0) ? -ENODEV : 0; 626 return (ret < 0) ? -ENODEV : 0;
@@ -500,32 +641,23 @@ static int it913x_name(struct dvb_usb_adapter *adap)
500static int it913x_frontend_attach(struct dvb_usb_adapter *adap) 641static int it913x_frontend_attach(struct dvb_usb_adapter *adap)
501{ 642{
502 struct usb_device *udev = adap->dev->udev; 643 struct usb_device *udev = adap->dev->udev;
644 struct it913x_state *st = adap->dev->priv;
503 int ret = 0; 645 int ret = 0;
504 u8 adf = it913x_read_reg(udev, IO_MUX_POWER_CLK);
505 u8 adap_addr = I2C_BASE_ADDR + (adap->id << 5); 646 u8 adap_addr = I2C_BASE_ADDR + (adap->id << 5);
506 u16 ep_size = adap->props.fe[0].stream.u.bulk.buffersize; 647 u16 ep_size = adap->props.fe[0].stream.u.bulk.buffersize / 4;
507 u8 tuner_id, tuner_type; 648 u8 pkt_size = 0x80;
649
650 if (adap->dev->udev->speed != USB_SPEED_HIGH)
651 pkt_size = 0x10;
652
653 it913x_config.adf = it913x_read_reg(udev, IO_MUX_POWER_CLK);
508 654
509 if (adap->id == 0) 655 if (adap->id == 0)
510 tuner_id = it913x_config.tuner_id_0; 656 memcpy(&st->it913x_config, &it913x_config,
511 else 657 sizeof(struct ite_config));
512 tuner_id = it913x_config.tuner_id_1;
513
514 /* TODO we always use IT9137 possible references here*/
515 /* Documentation suggests don't care */
516 switch (tuner_id) {
517 case 0x51:
518 case 0x52:
519 case 0x60:
520 case 0x61:
521 case 0x62:
522 default:
523 case 0x38:
524 tuner_type = IT9137;
525 }
526 658
527 adap->fe_adap[0].fe = dvb_attach(it913x_fe_attach, 659 adap->fe_adap[0].fe = dvb_attach(it913x_fe_attach,
528 &adap->dev->i2c_adap, adap_addr, adf, tuner_type); 660 &adap->dev->i2c_adap, adap_addr, &st->it913x_config);
529 661
530 if (adap->id == 0 && adap->fe_adap[0].fe) { 662 if (adap->id == 0 && adap->fe_adap[0].fe) {
531 ret = it913x_wr_reg(udev, DEV_0_DMOD, MP2_SW_RST, 0x1); 663 ret = it913x_wr_reg(udev, DEV_0_DMOD, MP2_SW_RST, 0x1);
@@ -536,13 +668,13 @@ static int it913x_frontend_attach(struct dvb_usb_adapter *adap)
536 ret = it913x_wr_reg(udev, DEV_0, EP4_TX_LEN_LSB, 668 ret = it913x_wr_reg(udev, DEV_0, EP4_TX_LEN_LSB,
537 ep_size & 0xff); 669 ep_size & 0xff);
538 ret = it913x_wr_reg(udev, DEV_0, EP4_TX_LEN_MSB, ep_size >> 8); 670 ret = it913x_wr_reg(udev, DEV_0, EP4_TX_LEN_MSB, ep_size >> 8);
539 ret = it913x_wr_reg(udev, DEV_0, EP4_MAX_PKT, 0x80); 671 ret = it913x_wr_reg(udev, DEV_0, EP4_MAX_PKT, pkt_size);
540 } else if (adap->id == 1 && adap->fe_adap[0].fe) { 672 } else if (adap->id == 1 && adap->fe_adap[0].fe) {
541 ret = it913x_wr_reg(udev, DEV_0, EP0_TX_EN, 0x6f); 673 ret = it913x_wr_reg(udev, DEV_0, EP0_TX_EN, 0x6f);
542 ret = it913x_wr_reg(udev, DEV_0, EP5_TX_LEN_LSB, 674 ret = it913x_wr_reg(udev, DEV_0, EP5_TX_LEN_LSB,
543 ep_size & 0xff); 675 ep_size & 0xff);
544 ret = it913x_wr_reg(udev, DEV_0, EP5_TX_LEN_MSB, ep_size >> 8); 676 ret = it913x_wr_reg(udev, DEV_0, EP5_TX_LEN_MSB, ep_size >> 8);
545 ret = it913x_wr_reg(udev, DEV_0, EP5_MAX_PKT, 0x80); 677 ret = it913x_wr_reg(udev, DEV_0, EP5_MAX_PKT, pkt_size);
546 ret = it913x_wr_reg(udev, DEV_0_DMOD, MP2IF2_EN, 0x1); 678 ret = it913x_wr_reg(udev, DEV_0_DMOD, MP2IF2_EN, 0x1);
547 ret = it913x_wr_reg(udev, DEV_1_DMOD, MP2IF_SERIAL, 0x1); 679 ret = it913x_wr_reg(udev, DEV_1_DMOD, MP2IF_SERIAL, 0x1);
548 ret = it913x_wr_reg(udev, DEV_1, TOP_HOSTB_SER_MODE, 0x1); 680 ret = it913x_wr_reg(udev, DEV_1, TOP_HOSTB_SER_MODE, 0x1);
@@ -582,6 +714,9 @@ static int it913x_probe(struct usb_interface *intf,
582static struct usb_device_id it913x_table[] = { 714static struct usb_device_id it913x_table[] = {
583 { USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB499_2T_T09) }, 715 { USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB499_2T_T09) },
584 { USB_DEVICE(USB_VID_ITETECH, USB_PID_ITETECH_IT9135) }, 716 { USB_DEVICE(USB_VID_ITETECH, USB_PID_ITETECH_IT9135) },
717 { USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV22_IT9137) },
718 { USB_DEVICE(USB_VID_ITETECH, USB_PID_ITETECH_IT9135_9005) },
719 { USB_DEVICE(USB_VID_ITETECH, USB_PID_ITETECH_IT9135_9006) },
585 {} /* Terminating entry */ 720 {} /* Terminating entry */
586}; 721};
587 722
@@ -614,8 +749,8 @@ static struct dvb_usb_device_properties it913x_properties = {
614 .endpoint = 0x04, 749 .endpoint = 0x04,
615 .u = {/* Keep Low if PID filter on */ 750 .u = {/* Keep Low if PID filter on */
616 .bulk = { 751 .bulk = {
617 .buffersize = 3584, 752 .buffersize =
618 753 TS_BUFFER_SIZE_PID,
619 } 754 }
620 } 755 }
621 } 756 }
@@ -639,8 +774,8 @@ static struct dvb_usb_device_properties it913x_properties = {
639 .endpoint = 0x05, 774 .endpoint = 0x05,
640 .u = { 775 .u = {
641 .bulk = { 776 .bulk = {
642 .buffersize = 3584, 777 .buffersize =
643 778 TS_BUFFER_SIZE_PID,
644 } 779 }
645 } 780 }
646 } 781 }
@@ -654,10 +789,10 @@ static struct dvb_usb_device_properties it913x_properties = {
654 .rc_query = it913x_rc_query, 789 .rc_query = it913x_rc_query,
655 .rc_interval = IT913X_POLL, 790 .rc_interval = IT913X_POLL,
656 .allowed_protos = RC_TYPE_NEC, 791 .allowed_protos = RC_TYPE_NEC,
657 .rc_codes = RC_MAP_KWORLD_315U, 792 .rc_codes = RC_MAP_MSI_DIGIVOX_III,
658 }, 793 },
659 .i2c_algo = &it913x_i2c_algo, 794 .i2c_algo = &it913x_i2c_algo,
660 .num_device_descs = 2, 795 .num_device_descs = 5,
661 .devices = { 796 .devices = {
662 { "Kworld UB499-2T T09(IT9137)", 797 { "Kworld UB499-2T T09(IT9137)",
663 { &it913x_table[0], NULL }, 798 { &it913x_table[0], NULL },
@@ -665,6 +800,15 @@ static struct dvb_usb_device_properties it913x_properties = {
665 { "ITE 9135 Generic", 800 { "ITE 9135 Generic",
666 { &it913x_table[1], NULL }, 801 { &it913x_table[1], NULL },
667 }, 802 },
803 { "Sveon STV22 Dual DVB-T HDTV(IT9137)",
804 { &it913x_table[2], NULL },
805 },
806 { "ITE 9135(9005) Generic",
807 { &it913x_table[3], NULL },
808 },
809 { "ITE 9135(9006) Generic",
810 { &it913x_table[4], NULL },
811 },
668 } 812 }
669}; 813};
670 814
@@ -679,5 +823,5 @@ module_usb_driver(it913x_driver);
679 823
680MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>"); 824MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>");
681MODULE_DESCRIPTION("it913x USB 2 Driver"); 825MODULE_DESCRIPTION("it913x USB 2 Driver");
682MODULE_VERSION("1.07"); 826MODULE_VERSION("1.22");
683MODULE_LICENSE("GPL"); 827MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/lmedm04.c b/drivers/media/dvb/dvb-usb/lmedm04.c
index 1a876a65ed5..b3fe05bbffc 100644
--- a/drivers/media/dvb/dvb-usb/lmedm04.c
+++ b/drivers/media/dvb/dvb-usb/lmedm04.c
@@ -388,8 +388,7 @@ static int lme2510_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid,
388 deb_info(3, "%s PID=%04x Index=%04x onoff=%02x", __func__, 388 deb_info(3, "%s PID=%04x Index=%04x onoff=%02x", __func__,
389 pid, index, onoff); 389 pid, index, onoff);
390 390
391 if (onoff) 391 if (onoff) {
392 if (!pid_filter) {
393 ret = mutex_lock_interruptible(&adap->dev->i2c_mutex); 392 ret = mutex_lock_interruptible(&adap->dev->i2c_mutex);
394 if (ret < 0) 393 if (ret < 0)
395 return -EAGAIN; 394 return -EAGAIN;
@@ -654,6 +653,9 @@ static int lme2510_identify_state(struct usb_device *udev,
654 struct dvb_usb_device_description **desc, 653 struct dvb_usb_device_description **desc,
655 int *cold) 654 int *cold)
656{ 655{
656 if (pid_filter > 0)
657 props->adapter[0].fe[0].caps &=
658 ~DVB_USB_ADAP_NEED_PID_FILTERING;
657 *cold = 0; 659 *cold = 0;
658 return 0; 660 return 0;
659} 661}
@@ -1293,5 +1295,5 @@ module_usb_driver(lme2510_driver);
1293 1295
1294MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>"); 1296MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>");
1295MODULE_DESCRIPTION("LME2510(C) DVB-S USB2.0"); 1297MODULE_DESCRIPTION("LME2510(C) DVB-S USB2.0");
1296MODULE_VERSION("1.90"); 1298MODULE_VERSION("1.91");
1297MODULE_LICENSE("GPL"); 1299MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/mxl111sf-demod.c b/drivers/media/dvb/dvb-usb/mxl111sf-demod.c
index d1f58371c71..d83df4bb72d 100644
--- a/drivers/media/dvb/dvb-usb/mxl111sf-demod.c
+++ b/drivers/media/dvb/dvb-usb/mxl111sf-demod.c
@@ -102,8 +102,8 @@ fail:
102} 102}
103 103
104static 104static
105int mxl1x1sf_demod_get_tps_constellation(struct mxl111sf_demod_state *state, 105int mxl1x1sf_demod_get_tps_modulation(struct mxl111sf_demod_state *state,
106 fe_modulation_t *constellation) 106 fe_modulation_t *modulation)
107{ 107{
108 u8 val; 108 u8 val;
109 int ret = mxl111sf_demod_read_reg(state, V6_MODORDER_TPS_REG, &val); 109 int ret = mxl111sf_demod_read_reg(state, V6_MODORDER_TPS_REG, &val);
@@ -113,13 +113,13 @@ int mxl1x1sf_demod_get_tps_constellation(struct mxl111sf_demod_state *state,
113 113
114 switch ((val & V6_PARAM_CONSTELLATION_MASK) >> 4) { 114 switch ((val & V6_PARAM_CONSTELLATION_MASK) >> 4) {
115 case 0: 115 case 0:
116 *constellation = QPSK; 116 *modulation = QPSK;
117 break; 117 break;
118 case 1: 118 case 1:
119 *constellation = QAM_16; 119 *modulation = QAM_16;
120 break; 120 break;
121 case 2: 121 case 2:
122 *constellation = QAM_64; 122 *modulation = QAM_64;
123 break; 123 break;
124 } 124 }
125fail: 125fail:
@@ -284,8 +284,7 @@ static int mxl1x1sf_demod_reset_irq_status(struct mxl111sf_demod_state *state)
284 284
285/* ------------------------------------------------------------------------ */ 285/* ------------------------------------------------------------------------ */
286 286
287static int mxl111sf_demod_set_frontend(struct dvb_frontend *fe, 287static int mxl111sf_demod_set_frontend(struct dvb_frontend *fe)
288 struct dvb_frontend_parameters *param)
289{ 288{
290 struct mxl111sf_demod_state *state = fe->demodulator_priv; 289 struct mxl111sf_demod_state *state = fe->demodulator_priv;
291 int ret = 0; 290 int ret = 0;
@@ -303,7 +302,7 @@ static int mxl111sf_demod_set_frontend(struct dvb_frontend *fe,
303 mxl_dbg("()"); 302 mxl_dbg("()");
304 303
305 if (fe->ops.tuner_ops.set_params) { 304 if (fe->ops.tuner_ops.set_params) {
306 ret = fe->ops.tuner_ops.set_params(fe, param); 305 ret = fe->ops.tuner_ops.set_params(fe);
307 if (mxl_fail(ret)) 306 if (mxl_fail(ret))
308 goto fail; 307 goto fail;
309 msleep(50); 308 msleep(50);
@@ -481,13 +480,13 @@ static int mxl111sf_demod_read_signal_strength(struct dvb_frontend *fe,
481 u16 *signal_strength) 480 u16 *signal_strength)
482{ 481{
483 struct mxl111sf_demod_state *state = fe->demodulator_priv; 482 struct mxl111sf_demod_state *state = fe->demodulator_priv;
484 fe_modulation_t constellation; 483 fe_modulation_t modulation;
485 u16 snr; 484 u16 snr;
486 485
487 mxl111sf_demod_calc_snr(state, &snr); 486 mxl111sf_demod_calc_snr(state, &snr);
488 mxl1x1sf_demod_get_tps_constellation(state, &constellation); 487 mxl1x1sf_demod_get_tps_modulation(state, &modulation);
489 488
490 switch (constellation) { 489 switch (modulation) {
491 case QPSK: 490 case QPSK:
492 *signal_strength = (snr >= 1300) ? 491 *signal_strength = (snr >= 1300) ?
493 min(65535, snr * 44) : snr * 38; 492 min(65535, snr * 44) : snr * 38;
@@ -508,9 +507,9 @@ static int mxl111sf_demod_read_signal_strength(struct dvb_frontend *fe,
508 return 0; 507 return 0;
509} 508}
510 509
511static int mxl111sf_demod_get_frontend(struct dvb_frontend *fe, 510static int mxl111sf_demod_get_frontend(struct dvb_frontend *fe)
512 struct dvb_frontend_parameters *p)
513{ 511{
512 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
514 struct mxl111sf_demod_state *state = fe->demodulator_priv; 513 struct mxl111sf_demod_state *state = fe->demodulator_priv;
515 514
516 mxl_dbg("()"); 515 mxl_dbg("()");
@@ -518,18 +517,18 @@ static int mxl111sf_demod_get_frontend(struct dvb_frontend *fe,
518 p->inversion = /* FIXME */ ? INVERSION_ON : INVERSION_OFF; 517 p->inversion = /* FIXME */ ? INVERSION_ON : INVERSION_OFF;
519#endif 518#endif
520 if (fe->ops.tuner_ops.get_bandwidth) 519 if (fe->ops.tuner_ops.get_bandwidth)
521 fe->ops.tuner_ops.get_bandwidth(fe, &p->u.ofdm.bandwidth); 520 fe->ops.tuner_ops.get_bandwidth(fe, &p->bandwidth_hz);
522 if (fe->ops.tuner_ops.get_frequency) 521 if (fe->ops.tuner_ops.get_frequency)
523 fe->ops.tuner_ops.get_frequency(fe, &p->frequency); 522 fe->ops.tuner_ops.get_frequency(fe, &p->frequency);
524 mxl1x1sf_demod_get_tps_code_rate(state, &p->u.ofdm.code_rate_HP); 523 mxl1x1sf_demod_get_tps_code_rate(state, &p->code_rate_HP);
525 mxl1x1sf_demod_get_tps_code_rate(state, &p->u.ofdm.code_rate_LP); 524 mxl1x1sf_demod_get_tps_code_rate(state, &p->code_rate_LP);
526 mxl1x1sf_demod_get_tps_constellation(state, &p->u.ofdm.constellation); 525 mxl1x1sf_demod_get_tps_modulation(state, &p->modulation);
527 mxl1x1sf_demod_get_tps_guard_fft_mode(state, 526 mxl1x1sf_demod_get_tps_guard_fft_mode(state,
528 &p->u.ofdm.transmission_mode); 527 &p->transmission_mode);
529 mxl1x1sf_demod_get_tps_guard_interval(state, 528 mxl1x1sf_demod_get_tps_guard_interval(state,
530 &p->u.ofdm.guard_interval); 529 &p->guard_interval);
531 mxl1x1sf_demod_get_tps_hierarchy(state, 530 mxl1x1sf_demod_get_tps_hierarchy(state,
532 &p->u.ofdm.hierarchy_information); 531 &p->hierarchy);
533 532
534 return 0; 533 return 0;
535} 534}
@@ -551,10 +550,9 @@ static void mxl111sf_demod_release(struct dvb_frontend *fe)
551} 550}
552 551
553static struct dvb_frontend_ops mxl111sf_demod_ops = { 552static struct dvb_frontend_ops mxl111sf_demod_ops = {
554 553 .delsys = { SYS_DVBT },
555 .info = { 554 .info = {
556 .name = "MaxLinear MxL111SF DVB-T demodulator", 555 .name = "MaxLinear MxL111SF DVB-T demodulator",
557 .type = FE_OFDM,
558 .frequency_min = 177000000, 556 .frequency_min = 177000000,
559 .frequency_max = 858000000, 557 .frequency_max = 858000000,
560 .frequency_stepsize = 166666, 558 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c b/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c
index a6341058c4e..72db6eef4b9 100644
--- a/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c
+++ b/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c
@@ -38,6 +38,8 @@ struct mxl111sf_tuner_state {
38 38
39 struct mxl111sf_tuner_config *cfg; 39 struct mxl111sf_tuner_config *cfg;
40 40
41 enum mxl_if_freq if_freq;
42
41 u32 frequency; 43 u32 frequency;
42 u32 bandwidth; 44 u32 bandwidth;
43}; 45};
@@ -186,7 +188,10 @@ static int mxl1x1sf_tuner_set_if_output_freq(struct mxl111sf_tuner_state *state)
186 ctrl = iffcw & 0x00ff; 188 ctrl = iffcw & 0x00ff;
187#endif 189#endif
188 ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_FCW_REG, ctrl); 190 ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_FCW_REG, ctrl);
189 mxl_fail(ret); 191 if (mxl_fail(ret))
192 goto fail;
193
194 state->if_freq = state->cfg->if_freq;
190fail: 195fail:
191 return ret; 196 return ret;
192} 197}
@@ -267,55 +272,49 @@ static int mxl1x1sf_tuner_loop_thru_ctrl(struct mxl111sf_tuner_state *state,
267 272
268/* ------------------------------------------------------------------------ */ 273/* ------------------------------------------------------------------------ */
269 274
270static int mxl111sf_tuner_set_params(struct dvb_frontend *fe, 275static int mxl111sf_tuner_set_params(struct dvb_frontend *fe)
271 struct dvb_frontend_parameters *params)
272{ 276{
277 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
278 u32 delsys = c->delivery_system;
273 struct mxl111sf_tuner_state *state = fe->tuner_priv; 279 struct mxl111sf_tuner_state *state = fe->tuner_priv;
274 int ret; 280 int ret;
275 u8 bw; 281 u8 bw;
276 282
277 mxl_dbg("()"); 283 mxl_dbg("()");
278 284
279 if (fe->ops.info.type == FE_ATSC) { 285 switch (delsys) {
280 switch (params->u.vsb.modulation) { 286 case SYS_ATSC:
281 case VSB_8: 287 bw = 0; /* ATSC */
282 case VSB_16: 288 break;
283 bw = 0; /* ATSC */ 289 case SYS_DVBC_ANNEX_B:
284 break; 290 bw = 1; /* US CABLE */
285 case QAM_64: 291 break;
286 case QAM_256: 292 case SYS_DVBT:
287 bw = 1; /* US CABLE */ 293 switch (c->bandwidth_hz) {
288 break; 294 case 6000000:
289 default:
290 err("%s: modulation not set!", __func__);
291 return -EINVAL;
292 }
293 } else if (fe->ops.info.type == FE_OFDM) {
294 switch (params->u.ofdm.bandwidth) {
295 case BANDWIDTH_6_MHZ:
296 bw = 6; 295 bw = 6;
297 break; 296 break;
298 case BANDWIDTH_7_MHZ: 297 case 7000000:
299 bw = 7; 298 bw = 7;
300 break; 299 break;
301 case BANDWIDTH_8_MHZ: 300 case 8000000:
302 bw = 8; 301 bw = 8;
303 break; 302 break;
304 default: 303 default:
305 err("%s: bandwidth not set!", __func__); 304 err("%s: bandwidth not set!", __func__);
306 return -EINVAL; 305 return -EINVAL;
307 } 306 }
308 } else { 307 break;
308 default:
309 err("%s: modulation type not supported!", __func__); 309 err("%s: modulation type not supported!", __func__);
310 return -EINVAL; 310 return -EINVAL;
311 } 311 }
312 ret = mxl1x1sf_tune_rf(fe, params->frequency, bw); 312 ret = mxl1x1sf_tune_rf(fe, c->frequency, bw);
313 if (mxl_fail(ret)) 313 if (mxl_fail(ret))
314 goto fail; 314 goto fail;
315 315
316 state->frequency = params->frequency; 316 state->frequency = c->frequency;
317 state->bandwidth = (fe->ops.info.type == FE_OFDM) ? 317 state->bandwidth = c->bandwidth_hz;
318 params->u.ofdm.bandwidth : 0;
319fail: 318fail:
320 return ret; 319 return ret;
321} 320}
@@ -407,6 +406,54 @@ static int mxl111sf_tuner_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
407 return 0; 406 return 0;
408} 407}
409 408
409static int mxl111sf_tuner_get_if_frequency(struct dvb_frontend *fe,
410 u32 *frequency)
411{
412 struct mxl111sf_tuner_state *state = fe->tuner_priv;
413
414 *frequency = 0;
415
416 switch (state->if_freq) {
417 case MXL_IF_4_0: /* 4.0 MHz */
418 *frequency = 4000000;
419 break;
420 case MXL_IF_4_5: /* 4.5 MHz */
421 *frequency = 4500000;
422 break;
423 case MXL_IF_4_57: /* 4.57 MHz */
424 *frequency = 4570000;
425 break;
426 case MXL_IF_5_0: /* 5.0 MHz */
427 *frequency = 5000000;
428 break;
429 case MXL_IF_5_38: /* 5.38 MHz */
430 *frequency = 5380000;
431 break;
432 case MXL_IF_6_0: /* 6.0 MHz */
433 *frequency = 6000000;
434 break;
435 case MXL_IF_6_28: /* 6.28 MHz */
436 *frequency = 6280000;
437 break;
438 case MXL_IF_7_2: /* 7.2 MHz */
439 *frequency = 7200000;
440 break;
441 case MXL_IF_35_25: /* 35.25 MHz */
442 *frequency = 35250000;
443 break;
444 case MXL_IF_36: /* 36 MHz */
445 *frequency = 36000000;
446 break;
447 case MXL_IF_36_15: /* 36.15 MHz */
448 *frequency = 36150000;
449 break;
450 case MXL_IF_44: /* 44 MHz */
451 *frequency = 44000000;
452 break;
453 }
454 return 0;
455}
456
410static int mxl111sf_tuner_release(struct dvb_frontend *fe) 457static int mxl111sf_tuner_release(struct dvb_frontend *fe)
411{ 458{
412 struct mxl111sf_tuner_state *state = fe->tuner_priv; 459 struct mxl111sf_tuner_state *state = fe->tuner_priv;
@@ -436,6 +483,7 @@ static struct dvb_tuner_ops mxl111sf_tuner_tuner_ops = {
436 .get_rf_strength = mxl111sf_get_rf_strength, 483 .get_rf_strength = mxl111sf_get_rf_strength,
437 .get_frequency = mxl111sf_tuner_get_frequency, 484 .get_frequency = mxl111sf_tuner_get_frequency,
438 .get_bandwidth = mxl111sf_tuner_get_bandwidth, 485 .get_bandwidth = mxl111sf_tuner_get_bandwidth,
486 .get_if_frequency = mxl111sf_tuner_get_if_frequency,
439 .release = mxl111sf_tuner_release, 487 .release = mxl111sf_tuner_release,
440}; 488};
441 489
diff --git a/drivers/media/dvb/dvb-usb/mxl111sf.c b/drivers/media/dvb/dvb-usb/mxl111sf.c
index 825a8b242e0..38ef0253d3b 100644
--- a/drivers/media/dvb/dvb-usb/mxl111sf.c
+++ b/drivers/media/dvb/dvb-usb/mxl111sf.c
@@ -758,6 +758,7 @@ MODULE_DEVICE_TABLE(usb, mxl111sf_table);
758 758
759 759
760#define MXL111SF_EP4_BULK_STREAMING_CONFIG \ 760#define MXL111SF_EP4_BULK_STREAMING_CONFIG \
761 .size_of_priv = sizeof(struct mxl111sf_adap_state), \
761 .streaming_ctrl = mxl111sf_ep4_streaming_ctrl, \ 762 .streaming_ctrl = mxl111sf_ep4_streaming_ctrl, \
762 .stream = { \ 763 .stream = { \
763 .type = USB_BULK, \ 764 .type = USB_BULK, \
@@ -772,6 +773,7 @@ MODULE_DEVICE_TABLE(usb, mxl111sf_table);
772 773
773/* FIXME: works for v6 but not v8 silicon */ 774/* FIXME: works for v6 but not v8 silicon */
774#define MXL111SF_EP4_ISOC_STREAMING_CONFIG \ 775#define MXL111SF_EP4_ISOC_STREAMING_CONFIG \
776 .size_of_priv = sizeof(struct mxl111sf_adap_state), \
775 .streaming_ctrl = mxl111sf_ep4_streaming_ctrl, \ 777 .streaming_ctrl = mxl111sf_ep4_streaming_ctrl, \
776 .stream = { \ 778 .stream = { \
777 .type = USB_ISOC, \ 779 .type = USB_ISOC, \
@@ -788,6 +790,7 @@ MODULE_DEVICE_TABLE(usb, mxl111sf_table);
788 } 790 }
789 791
790#define MXL111SF_EP6_BULK_STREAMING_CONFIG \ 792#define MXL111SF_EP6_BULK_STREAMING_CONFIG \
793 .size_of_priv = sizeof(struct mxl111sf_adap_state), \
791 .streaming_ctrl = mxl111sf_ep6_streaming_ctrl, \ 794 .streaming_ctrl = mxl111sf_ep6_streaming_ctrl, \
792 .stream = { \ 795 .stream = { \
793 .type = USB_BULK, \ 796 .type = USB_BULK, \
@@ -802,6 +805,7 @@ MODULE_DEVICE_TABLE(usb, mxl111sf_table);
802 805
803/* FIXME */ 806/* FIXME */
804#define MXL111SF_EP6_ISOC_STREAMING_CONFIG \ 807#define MXL111SF_EP6_ISOC_STREAMING_CONFIG \
808 .size_of_priv = sizeof(struct mxl111sf_adap_state), \
805 .streaming_ctrl = mxl111sf_ep6_streaming_ctrl, \ 809 .streaming_ctrl = mxl111sf_ep6_streaming_ctrl, \
806 .stream = { \ 810 .stream = { \
807 .type = USB_ISOC, \ 811 .type = USB_ISOC, \
@@ -839,8 +843,6 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_bulk_properties = {
839 .fe_ioctl_override = mxl111sf_fe_ioctl_override, 843 .fe_ioctl_override = mxl111sf_fe_ioctl_override,
840 .num_frontends = 1, 844 .num_frontends = 1,
841 .fe = {{ 845 .fe = {{
842 .size_of_priv = sizeof(struct mxl111sf_adap_state),
843
844 .frontend_attach = mxl111sf_attach_demod, 846 .frontend_attach = mxl111sf_attach_demod,
845 .tuner_attach = mxl111sf_attach_tuner, 847 .tuner_attach = mxl111sf_attach_tuner,
846 848
@@ -883,8 +885,6 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_isoc_properties = {
883 .fe_ioctl_override = mxl111sf_fe_ioctl_override, 885 .fe_ioctl_override = mxl111sf_fe_ioctl_override,
884 .num_frontends = 1, 886 .num_frontends = 1,
885 .fe = {{ 887 .fe = {{
886 .size_of_priv = sizeof(struct mxl111sf_adap_state),
887
888 .frontend_attach = mxl111sf_attach_demod, 888 .frontend_attach = mxl111sf_attach_demod,
889 .tuner_attach = mxl111sf_attach_tuner, 889 .tuner_attach = mxl111sf_attach_tuner,
890 890
@@ -927,16 +927,12 @@ static struct dvb_usb_device_properties mxl111sf_atsc_bulk_properties = {
927 .fe_ioctl_override = mxl111sf_fe_ioctl_override, 927 .fe_ioctl_override = mxl111sf_fe_ioctl_override,
928 .num_frontends = 2, 928 .num_frontends = 2,
929 .fe = {{ 929 .fe = {{
930 .size_of_priv = sizeof(struct mxl111sf_adap_state),
931
932 .frontend_attach = mxl111sf_lgdt3305_frontend_attach, 930 .frontend_attach = mxl111sf_lgdt3305_frontend_attach,
933 .tuner_attach = mxl111sf_attach_tuner, 931 .tuner_attach = mxl111sf_attach_tuner,
934 932
935 MXL111SF_EP6_BULK_STREAMING_CONFIG, 933 MXL111SF_EP6_BULK_STREAMING_CONFIG,
936 }, 934 },
937 { 935 {
938 .size_of_priv = sizeof(struct mxl111sf_adap_state),
939
940 .frontend_attach = mxl111sf_attach_demod, 936 .frontend_attach = mxl111sf_attach_demod,
941 .tuner_attach = mxl111sf_attach_tuner, 937 .tuner_attach = mxl111sf_attach_tuner,
942 938
@@ -992,16 +988,12 @@ static struct dvb_usb_device_properties mxl111sf_atsc_isoc_properties = {
992 .fe_ioctl_override = mxl111sf_fe_ioctl_override, 988 .fe_ioctl_override = mxl111sf_fe_ioctl_override,
993 .num_frontends = 2, 989 .num_frontends = 2,
994 .fe = {{ 990 .fe = {{
995 .size_of_priv = sizeof(struct mxl111sf_adap_state),
996
997 .frontend_attach = mxl111sf_lgdt3305_frontend_attach, 991 .frontend_attach = mxl111sf_lgdt3305_frontend_attach,
998 .tuner_attach = mxl111sf_attach_tuner, 992 .tuner_attach = mxl111sf_attach_tuner,
999 993
1000 MXL111SF_EP6_ISOC_STREAMING_CONFIG, 994 MXL111SF_EP6_ISOC_STREAMING_CONFIG,
1001 }, 995 },
1002 { 996 {
1003 .size_of_priv = sizeof(struct mxl111sf_adap_state),
1004
1005 .frontend_attach = mxl111sf_attach_demod, 997 .frontend_attach = mxl111sf_attach_demod,
1006 .tuner_attach = mxl111sf_attach_tuner, 998 .tuner_attach = mxl111sf_attach_tuner,
1007 999
diff --git a/drivers/media/dvb/dvb-usb/ttusb2.c b/drivers/media/dvb/dvb-usb/ttusb2.c
index 56acf8e55d5..e53a1061cb8 100644
--- a/drivers/media/dvb/dvb-usb/ttusb2.c
+++ b/drivers/media/dvb/dvb-usb/ttusb2.c
@@ -75,10 +75,18 @@ static int ttusb2_msg(struct dvb_usb_device *d, u8 cmd,
75 u8 *wbuf, int wlen, u8 *rbuf, int rlen) 75 u8 *wbuf, int wlen, u8 *rbuf, int rlen)
76{ 76{
77 struct ttusb2_state *st = d->priv; 77 struct ttusb2_state *st = d->priv;
78 u8 s[wlen+4],r[64] = { 0 }; 78 u8 *s, *r = NULL;
79 int ret = 0; 79 int ret = 0;
80 80
81 memset(s,0,wlen+4); 81 s = kzalloc(wlen+4, GFP_KERNEL);
82 if (!s)
83 return -ENOMEM;
84
85 r = kzalloc(64, GFP_KERNEL);
86 if (!r) {
87 kfree(s);
88 return -ENOMEM;
89 }
82 90
83 s[0] = 0xaa; 91 s[0] = 0xaa;
84 s[1] = ++st->id; 92 s[1] = ++st->id;
@@ -94,12 +102,17 @@ static int ttusb2_msg(struct dvb_usb_device *d, u8 cmd,
94 r[2] != cmd || 102 r[2] != cmd ||
95 (rlen > 0 && r[3] != rlen)) { 103 (rlen > 0 && r[3] != rlen)) {
96 warn("there might have been an error during control message transfer. (rlen = %d, was %d)",rlen,r[3]); 104 warn("there might have been an error during control message transfer. (rlen = %d, was %d)",rlen,r[3]);
105 kfree(s);
106 kfree(r);
97 return -EIO; 107 return -EIO;
98 } 108 }
99 109
100 if (rlen > 0) 110 if (rlen > 0)
101 memcpy(rbuf, &r[4], rlen); 111 memcpy(rbuf, &r[4], rlen);
102 112
113 kfree(s);
114 kfree(r);
115
103 return 0; 116 return 0;
104} 117}
105 118
@@ -384,7 +397,7 @@ static int ttusb2_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num
384 397
385 memcpy(&obuf[3], msg[i].buf, msg[i].len); 398 memcpy(&obuf[3], msg[i].buf, msg[i].len);
386 399
387 if (ttusb2_msg(d, CMD_I2C_XFER, obuf, msg[i].len+3, ibuf, obuf[2] + 3) < 0) { 400 if (ttusb2_msg(d, CMD_I2C_XFER, obuf, obuf[1]+3, ibuf, obuf[2] + 3) < 0) {
388 err("i2c transfer failed."); 401 err("i2c transfer failed.");
389 break; 402 break;
390 } 403 }
diff --git a/drivers/media/dvb/dvb-usb/vp702x-fe.c b/drivers/media/dvb/dvb-usb/vp702x-fe.c
index 2bb8d4cc8d8..5eab468dd90 100644
--- a/drivers/media/dvb/dvb-usb/vp702x-fe.c
+++ b/drivers/media/dvb/dvb-usb/vp702x-fe.c
@@ -135,9 +135,9 @@ static int vp702x_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_front
135 return 0; 135 return 0;
136} 136}
137 137
138static int vp702x_fe_set_frontend(struct dvb_frontend* fe, 138static int vp702x_fe_set_frontend(struct dvb_frontend *fe)
139 struct dvb_frontend_parameters *fep)
140{ 139{
140 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
141 struct vp702x_fe_state *st = fe->demodulator_priv; 141 struct vp702x_fe_state *st = fe->demodulator_priv;
142 struct vp702x_device_state *dst = st->d->priv; 142 struct vp702x_device_state *dst = st->d->priv;
143 u32 freq = fep->frequency/1000; 143 u32 freq = fep->frequency/1000;
@@ -155,14 +155,14 @@ static int vp702x_fe_set_frontend(struct dvb_frontend* fe,
155 cmd[1] = freq & 0xff; 155 cmd[1] = freq & 0xff;
156 cmd[2] = 1; /* divrate == 4 -> frequencyRef[1] -> 1 here */ 156 cmd[2] = 1; /* divrate == 4 -> frequencyRef[1] -> 1 here */
157 157
158 sr = (u64) (fep->u.qpsk.symbol_rate/1000) << 20; 158 sr = (u64) (fep->symbol_rate/1000) << 20;
159 do_div(sr,88000); 159 do_div(sr,88000);
160 cmd[3] = (sr >> 12) & 0xff; 160 cmd[3] = (sr >> 12) & 0xff;
161 cmd[4] = (sr >> 4) & 0xff; 161 cmd[4] = (sr >> 4) & 0xff;
162 cmd[5] = (sr << 4) & 0xf0; 162 cmd[5] = (sr << 4) & 0xf0;
163 163
164 deb_fe("setting frontend to: %u -> %u (%x) LNB-based GHz, symbolrate: %d -> %lu (%lx)\n", 164 deb_fe("setting frontend to: %u -> %u (%x) LNB-based GHz, symbolrate: %d -> %lu (%lx)\n",
165 fep->frequency,freq,freq, fep->u.qpsk.symbol_rate, 165 fep->frequency, freq, freq, fep->symbol_rate,
166 (unsigned long) sr, (unsigned long) sr); 166 (unsigned long) sr, (unsigned long) sr);
167 167
168/* if (fep->inversion == INVERSION_ON) 168/* if (fep->inversion == INVERSION_ON)
@@ -171,7 +171,7 @@ static int vp702x_fe_set_frontend(struct dvb_frontend* fe,
171 if (st->voltage == SEC_VOLTAGE_18) 171 if (st->voltage == SEC_VOLTAGE_18)
172 cmd[6] |= 0x40; 172 cmd[6] |= 0x40;
173 173
174/* if (fep->u.qpsk.symbol_rate > 8000000) 174/* if (fep->symbol_rate > 8000000)
175 cmd[6] |= 0x20; 175 cmd[6] |= 0x20;
176 176
177 if (fep->frequency < 1531000) 177 if (fep->frequency < 1531000)
@@ -211,13 +211,6 @@ static int vp702x_fe_sleep(struct dvb_frontend *fe)
211 return 0; 211 return 0;
212} 212}
213 213
214static int vp702x_fe_get_frontend(struct dvb_frontend* fe,
215 struct dvb_frontend_parameters *fep)
216{
217 deb_fe("%s\n",__func__);
218 return 0;
219}
220
221static int vp702x_fe_send_diseqc_msg (struct dvb_frontend* fe, 214static int vp702x_fe_send_diseqc_msg (struct dvb_frontend* fe,
222 struct dvb_diseqc_master_cmd *m) 215 struct dvb_diseqc_master_cmd *m)
223{ 216{
@@ -350,9 +343,9 @@ error:
350 343
351 344
352static struct dvb_frontend_ops vp702x_fe_ops = { 345static struct dvb_frontend_ops vp702x_fe_ops = {
346 .delsys = { SYS_DVBS },
353 .info = { 347 .info = {
354 .name = "Twinhan DST-like frontend (VP7021/VP7020) DVB-S", 348 .name = "Twinhan DST-like frontend (VP7021/VP7020) DVB-S",
355 .type = FE_QPSK,
356 .frequency_min = 950000, 349 .frequency_min = 950000,
357 .frequency_max = 2150000, 350 .frequency_max = 2150000,
358 .frequency_stepsize = 1000, /* kHz for QPSK frontends */ 351 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
@@ -371,7 +364,6 @@ static struct dvb_frontend_ops vp702x_fe_ops = {
371 .sleep = vp702x_fe_sleep, 364 .sleep = vp702x_fe_sleep,
372 365
373 .set_frontend = vp702x_fe_set_frontend, 366 .set_frontend = vp702x_fe_set_frontend,
374 .get_frontend = vp702x_fe_get_frontend,
375 .get_tune_settings = vp702x_fe_get_tune_settings, 367 .get_tune_settings = vp702x_fe_get_tune_settings,
376 368
377 .read_status = vp702x_fe_read_status, 369 .read_status = vp702x_fe_read_status,
diff --git a/drivers/media/dvb/dvb-usb/vp7045-fe.c b/drivers/media/dvb/dvb-usb/vp7045-fe.c
index 8452eef9032..b8825b18c00 100644
--- a/drivers/media/dvb/dvb-usb/vp7045-fe.c
+++ b/drivers/media/dvb/dvb-usb/vp7045-fe.c
@@ -103,9 +103,9 @@ static int vp7045_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_front
103 return 0; 103 return 0;
104} 104}
105 105
106static int vp7045_fe_set_frontend(struct dvb_frontend* fe, 106static int vp7045_fe_set_frontend(struct dvb_frontend *fe)
107 struct dvb_frontend_parameters *fep)
108{ 107{
108 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
109 struct vp7045_fe_state *state = fe->demodulator_priv; 109 struct vp7045_fe_state *state = fe->demodulator_priv;
110 u8 buf[5]; 110 u8 buf[5];
111 u32 freq = fep->frequency / 1000; 111 u32 freq = fep->frequency / 1000;
@@ -115,25 +115,24 @@ static int vp7045_fe_set_frontend(struct dvb_frontend* fe,
115 buf[2] = freq & 0xff; 115 buf[2] = freq & 0xff;
116 buf[3] = 0; 116 buf[3] = 0;
117 117
118 switch (fep->u.ofdm.bandwidth) { 118 switch (fep->bandwidth_hz) {
119 case BANDWIDTH_8_MHZ: buf[4] = 8; break; 119 case 8000000:
120 case BANDWIDTH_7_MHZ: buf[4] = 7; break; 120 buf[4] = 8;
121 case BANDWIDTH_6_MHZ: buf[4] = 6; break; 121 break;
122 case BANDWIDTH_AUTO: return -EOPNOTSUPP; 122 case 7000000:
123 default: 123 buf[4] = 7;
124 return -EINVAL; 124 break;
125 case 6000000:
126 buf[4] = 6;
127 break;
128 default:
129 return -EINVAL;
125 } 130 }
126 131
127 vp7045_usb_op(state->d,LOCK_TUNER_COMMAND,buf,5,NULL,0,200); 132 vp7045_usb_op(state->d,LOCK_TUNER_COMMAND,buf,5,NULL,0,200);
128 return 0; 133 return 0;
129} 134}
130 135
131static int vp7045_fe_get_frontend(struct dvb_frontend* fe,
132 struct dvb_frontend_parameters *fep)
133{
134 return 0;
135}
136
137static void vp7045_fe_release(struct dvb_frontend* fe) 136static void vp7045_fe_release(struct dvb_frontend* fe)
138{ 137{
139 struct vp7045_fe_state *state = fe->demodulator_priv; 138 struct vp7045_fe_state *state = fe->demodulator_priv;
@@ -159,9 +158,9 @@ error:
159 158
160 159
161static struct dvb_frontend_ops vp7045_fe_ops = { 160static struct dvb_frontend_ops vp7045_fe_ops = {
161 .delsys = { SYS_DVBT },
162 .info = { 162 .info = {
163 .name = "Twinhan VP7045/46 USB DVB-T", 163 .name = "Twinhan VP7045/46 USB DVB-T",
164 .type = FE_OFDM,
165 .frequency_min = 44250000, 164 .frequency_min = 44250000,
166 .frequency_max = 867250000, 165 .frequency_max = 867250000,
167 .frequency_stepsize = 1000, 166 .frequency_stepsize = 1000,
@@ -181,7 +180,6 @@ static struct dvb_frontend_ops vp7045_fe_ops = {
181 .sleep = vp7045_fe_sleep, 180 .sleep = vp7045_fe_sleep,
182 181
183 .set_frontend = vp7045_fe_set_frontend, 182 .set_frontend = vp7045_fe_set_frontend,
184 .get_frontend = vp7045_fe_get_frontend,
185 .get_tune_settings = vp7045_fe_get_tune_settings, 183 .get_tune_settings = vp7045_fe_get_tune_settings,
186 184
187 .read_status = vp7045_fe_read_status, 185 .read_status = vp7045_fe_read_status,
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c
index 489ae824586..d1a1a1324ef 100644
--- a/drivers/media/dvb/firewire/firedtv-avc.c
+++ b/drivers/media/dvb/firewire/firedtv-avc.c
@@ -335,7 +335,7 @@ static int add_pid_filter(struct firedtv *fdtv, u8 *operand)
335 * (not supported by the AVC standard) 335 * (not supported by the AVC standard)
336 */ 336 */
337static int avc_tuner_tuneqpsk(struct firedtv *fdtv, 337static int avc_tuner_tuneqpsk(struct firedtv *fdtv,
338 struct dvb_frontend_parameters *params) 338 struct dtv_frontend_properties *p)
339{ 339{
340 struct avc_command_frame *c = (void *)fdtv->avc_data; 340 struct avc_command_frame *c = (void *)fdtv->avc_data;
341 341
@@ -349,15 +349,15 @@ static int avc_tuner_tuneqpsk(struct firedtv *fdtv,
349 else 349 else
350 c->operand[3] = SFE_VENDOR_OPCODE_TUNE_QPSK; 350 c->operand[3] = SFE_VENDOR_OPCODE_TUNE_QPSK;
351 351
352 c->operand[4] = (params->frequency >> 24) & 0xff; 352 c->operand[4] = (p->frequency >> 24) & 0xff;
353 c->operand[5] = (params->frequency >> 16) & 0xff; 353 c->operand[5] = (p->frequency >> 16) & 0xff;
354 c->operand[6] = (params->frequency >> 8) & 0xff; 354 c->operand[6] = (p->frequency >> 8) & 0xff;
355 c->operand[7] = params->frequency & 0xff; 355 c->operand[7] = p->frequency & 0xff;
356 356
357 c->operand[8] = ((params->u.qpsk.symbol_rate / 1000) >> 8) & 0xff; 357 c->operand[8] = ((p->symbol_rate / 1000) >> 8) & 0xff;
358 c->operand[9] = (params->u.qpsk.symbol_rate / 1000) & 0xff; 358 c->operand[9] = (p->symbol_rate / 1000) & 0xff;
359 359
360 switch (params->u.qpsk.fec_inner) { 360 switch (p->fec_inner) {
361 case FEC_1_2: c->operand[10] = 0x1; break; 361 case FEC_1_2: c->operand[10] = 0x1; break;
362 case FEC_2_3: c->operand[10] = 0x2; break; 362 case FEC_2_3: c->operand[10] = 0x2; break;
363 case FEC_3_4: c->operand[10] = 0x3; break; 363 case FEC_3_4: c->operand[10] = 0x3; break;
@@ -392,10 +392,11 @@ static int avc_tuner_tuneqpsk(struct firedtv *fdtv,
392 default: c->operand[13] = 0x2; break; 392 default: c->operand[13] = 0x2; break;
393 } 393 }
394 switch (fdtv->fe.dtv_property_cache.rolloff) { 394 switch (fdtv->fe.dtv_property_cache.rolloff) {
395 case ROLLOFF_AUTO: c->operand[14] = 0x2; break;
396 case ROLLOFF_35: c->operand[14] = 0x2; break; 395 case ROLLOFF_35: c->operand[14] = 0x2; break;
397 case ROLLOFF_20: c->operand[14] = 0x0; break; 396 case ROLLOFF_20: c->operand[14] = 0x0; break;
398 case ROLLOFF_25: c->operand[14] = 0x1; break; 397 case ROLLOFF_25: c->operand[14] = 0x1; break;
398 case ROLLOFF_AUTO:
399 default: c->operand[14] = 0x2; break;
399 /* case ROLLOFF_NONE: c->operand[14] = 0xff; break; */ 400 /* case ROLLOFF_NONE: c->operand[14] = 0xff; break; */
400 } 401 }
401 switch (fdtv->fe.dtv_property_cache.pilot) { 402 switch (fdtv->fe.dtv_property_cache.pilot) {
@@ -415,7 +416,7 @@ static int avc_tuner_tuneqpsk(struct firedtv *fdtv,
415} 416}
416 417
417static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv, 418static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
418 struct dvb_frontend_parameters *params) 419 struct dtv_frontend_properties *p)
419{ 420{
420 struct avc_command_frame *c = (void *)fdtv->avc_data; 421 struct avc_command_frame *c = (void *)fdtv->avc_data;
421 422
@@ -434,8 +435,8 @@ static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
434 | 1 << 4 /* Frequency */ 435 | 1 << 4 /* Frequency */
435 | 1 << 3 /* Symbol_Rate */ 436 | 1 << 3 /* Symbol_Rate */
436 | 0 << 2 /* FEC_outer */ 437 | 0 << 2 /* FEC_outer */
437 | (params->u.qam.fec_inner != FEC_AUTO ? 1 << 1 : 0) 438 | (p->fec_inner != FEC_AUTO ? 1 << 1 : 0)
438 | (params->u.qam.modulation != QAM_AUTO ? 1 << 0 : 0); 439 | (p->modulation != QAM_AUTO ? 1 << 0 : 0);
439 440
440 /* multiplex_valid_flags, low byte */ 441 /* multiplex_valid_flags, low byte */
441 c->operand[6] = 0 << 7 /* NetworkID */ 442 c->operand[6] = 0 << 7 /* NetworkID */
@@ -446,15 +447,15 @@ static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
446 c->operand[9] = 0x00; 447 c->operand[9] = 0x00;
447 c->operand[10] = 0x00; 448 c->operand[10] = 0x00;
448 449
449 c->operand[11] = (((params->frequency / 4000) >> 16) & 0xff) | (2 << 6); 450 c->operand[11] = (((p->frequency / 4000) >> 16) & 0xff) | (2 << 6);
450 c->operand[12] = ((params->frequency / 4000) >> 8) & 0xff; 451 c->operand[12] = ((p->frequency / 4000) >> 8) & 0xff;
451 c->operand[13] = (params->frequency / 4000) & 0xff; 452 c->operand[13] = (p->frequency / 4000) & 0xff;
452 c->operand[14] = ((params->u.qpsk.symbol_rate / 1000) >> 12) & 0xff; 453 c->operand[14] = ((p->symbol_rate / 1000) >> 12) & 0xff;
453 c->operand[15] = ((params->u.qpsk.symbol_rate / 1000) >> 4) & 0xff; 454 c->operand[15] = ((p->symbol_rate / 1000) >> 4) & 0xff;
454 c->operand[16] = ((params->u.qpsk.symbol_rate / 1000) << 4) & 0xf0; 455 c->operand[16] = ((p->symbol_rate / 1000) << 4) & 0xf0;
455 c->operand[17] = 0x00; 456 c->operand[17] = 0x00;
456 457
457 switch (params->u.qpsk.fec_inner) { 458 switch (p->fec_inner) {
458 case FEC_1_2: c->operand[18] = 0x1; break; 459 case FEC_1_2: c->operand[18] = 0x1; break;
459 case FEC_2_3: c->operand[18] = 0x2; break; 460 case FEC_2_3: c->operand[18] = 0x2; break;
460 case FEC_3_4: c->operand[18] = 0x3; break; 461 case FEC_3_4: c->operand[18] = 0x3; break;
@@ -466,7 +467,7 @@ static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
466 default: c->operand[18] = 0x0; 467 default: c->operand[18] = 0x0;
467 } 468 }
468 469
469 switch (params->u.qam.modulation) { 470 switch (p->modulation) {
470 case QAM_16: c->operand[19] = 0x08; break; 471 case QAM_16: c->operand[19] = 0x08; break;
471 case QAM_32: c->operand[19] = 0x10; break; 472 case QAM_32: c->operand[19] = 0x10; break;
472 case QAM_64: c->operand[19] = 0x18; break; 473 case QAM_64: c->operand[19] = 0x18; break;
@@ -483,9 +484,8 @@ static int avc_tuner_dsd_dvb_c(struct firedtv *fdtv,
483} 484}
484 485
485static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv, 486static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
486 struct dvb_frontend_parameters *params) 487 struct dtv_frontend_properties *p)
487{ 488{
488 struct dvb_ofdm_parameters *ofdm = &params->u.ofdm;
489 struct avc_command_frame *c = (void *)fdtv->avc_data; 489 struct avc_command_frame *c = (void *)fdtv->avc_data;
490 490
491 c->opcode = AVC_OPCODE_DSD; 491 c->opcode = AVC_OPCODE_DSD;
@@ -500,42 +500,42 @@ static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
500 c->operand[5] = 500 c->operand[5] =
501 0 << 7 /* reserved */ 501 0 << 7 /* reserved */
502 | 1 << 6 /* CenterFrequency */ 502 | 1 << 6 /* CenterFrequency */
503 | (ofdm->bandwidth != BANDWIDTH_AUTO ? 1 << 5 : 0) 503 | (p->bandwidth_hz != 0 ? 1 << 5 : 0)
504 | (ofdm->constellation != QAM_AUTO ? 1 << 4 : 0) 504 | (p->modulation != QAM_AUTO ? 1 << 4 : 0)
505 | (ofdm->hierarchy_information != HIERARCHY_AUTO ? 1 << 3 : 0) 505 | (p->hierarchy != HIERARCHY_AUTO ? 1 << 3 : 0)
506 | (ofdm->code_rate_HP != FEC_AUTO ? 1 << 2 : 0) 506 | (p->code_rate_HP != FEC_AUTO ? 1 << 2 : 0)
507 | (ofdm->code_rate_LP != FEC_AUTO ? 1 << 1 : 0) 507 | (p->code_rate_LP != FEC_AUTO ? 1 << 1 : 0)
508 | (ofdm->guard_interval != GUARD_INTERVAL_AUTO ? 1 << 0 : 0); 508 | (p->guard_interval != GUARD_INTERVAL_AUTO ? 1 << 0 : 0);
509 509
510 /* multiplex_valid_flags, low byte */ 510 /* multiplex_valid_flags, low byte */
511 c->operand[6] = 511 c->operand[6] =
512 0 << 7 /* NetworkID */ 512 0 << 7 /* NetworkID */
513 | (ofdm->transmission_mode != TRANSMISSION_MODE_AUTO ? 1 << 6 : 0) 513 | (p->transmission_mode != TRANSMISSION_MODE_AUTO ? 1 << 6 : 0)
514 | 0 << 5 /* OtherFrequencyFlag */ 514 | 0 << 5 /* OtherFrequencyFlag */
515 | 0 << 0 /* reserved */ ; 515 | 0 << 0 /* reserved */ ;
516 516
517 c->operand[7] = 0x0; 517 c->operand[7] = 0x0;
518 c->operand[8] = (params->frequency / 10) >> 24; 518 c->operand[8] = (p->frequency / 10) >> 24;
519 c->operand[9] = ((params->frequency / 10) >> 16) & 0xff; 519 c->operand[9] = ((p->frequency / 10) >> 16) & 0xff;
520 c->operand[10] = ((params->frequency / 10) >> 8) & 0xff; 520 c->operand[10] = ((p->frequency / 10) >> 8) & 0xff;
521 c->operand[11] = (params->frequency / 10) & 0xff; 521 c->operand[11] = (p->frequency / 10) & 0xff;
522 522
523 switch (ofdm->bandwidth) { 523 switch (p->bandwidth_hz) {
524 case BANDWIDTH_7_MHZ: c->operand[12] = 0x20; break; 524 case 7000000: c->operand[12] = 0x20; break;
525 case BANDWIDTH_8_MHZ: 525 case 8000000:
526 case BANDWIDTH_6_MHZ: /* not defined by AVC spec */ 526 case 6000000: /* not defined by AVC spec */
527 case BANDWIDTH_AUTO: 527 case 0:
528 default: c->operand[12] = 0x00; 528 default: c->operand[12] = 0x00;
529 } 529 }
530 530
531 switch (ofdm->constellation) { 531 switch (p->modulation) {
532 case QAM_16: c->operand[13] = 1 << 6; break; 532 case QAM_16: c->operand[13] = 1 << 6; break;
533 case QAM_64: c->operand[13] = 2 << 6; break; 533 case QAM_64: c->operand[13] = 2 << 6; break;
534 case QPSK: 534 case QPSK:
535 default: c->operand[13] = 0x00; 535 default: c->operand[13] = 0x00;
536 } 536 }
537 537
538 switch (ofdm->hierarchy_information) { 538 switch (p->hierarchy) {
539 case HIERARCHY_1: c->operand[13] |= 1 << 3; break; 539 case HIERARCHY_1: c->operand[13] |= 1 << 3; break;
540 case HIERARCHY_2: c->operand[13] |= 2 << 3; break; 540 case HIERARCHY_2: c->operand[13] |= 2 << 3; break;
541 case HIERARCHY_4: c->operand[13] |= 3 << 3; break; 541 case HIERARCHY_4: c->operand[13] |= 3 << 3; break;
@@ -544,7 +544,7 @@ static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
544 default: break; 544 default: break;
545 } 545 }
546 546
547 switch (ofdm->code_rate_HP) { 547 switch (p->code_rate_HP) {
548 case FEC_2_3: c->operand[13] |= 1; break; 548 case FEC_2_3: c->operand[13] |= 1; break;
549 case FEC_3_4: c->operand[13] |= 2; break; 549 case FEC_3_4: c->operand[13] |= 2; break;
550 case FEC_5_6: c->operand[13] |= 3; break; 550 case FEC_5_6: c->operand[13] |= 3; break;
@@ -553,7 +553,7 @@ static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
553 default: break; 553 default: break;
554 } 554 }
555 555
556 switch (ofdm->code_rate_LP) { 556 switch (p->code_rate_LP) {
557 case FEC_2_3: c->operand[14] = 1 << 5; break; 557 case FEC_2_3: c->operand[14] = 1 << 5; break;
558 case FEC_3_4: c->operand[14] = 2 << 5; break; 558 case FEC_3_4: c->operand[14] = 2 << 5; break;
559 case FEC_5_6: c->operand[14] = 3 << 5; break; 559 case FEC_5_6: c->operand[14] = 3 << 5; break;
@@ -562,7 +562,7 @@ static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
562 default: c->operand[14] = 0x00; break; 562 default: c->operand[14] = 0x00; break;
563 } 563 }
564 564
565 switch (ofdm->guard_interval) { 565 switch (p->guard_interval) {
566 case GUARD_INTERVAL_1_16: c->operand[14] |= 1 << 3; break; 566 case GUARD_INTERVAL_1_16: c->operand[14] |= 1 << 3; break;
567 case GUARD_INTERVAL_1_8: c->operand[14] |= 2 << 3; break; 567 case GUARD_INTERVAL_1_8: c->operand[14] |= 2 << 3; break;
568 case GUARD_INTERVAL_1_4: c->operand[14] |= 3 << 3; break; 568 case GUARD_INTERVAL_1_4: c->operand[14] |= 3 << 3; break;
@@ -571,7 +571,7 @@ static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
571 default: break; 571 default: break;
572 } 572 }
573 573
574 switch (ofdm->transmission_mode) { 574 switch (p->transmission_mode) {
575 case TRANSMISSION_MODE_8K: c->operand[14] |= 1 << 1; break; 575 case TRANSMISSION_MODE_8K: c->operand[14] |= 1 << 1; break;
576 case TRANSMISSION_MODE_2K: 576 case TRANSMISSION_MODE_2K:
577 case TRANSMISSION_MODE_AUTO: 577 case TRANSMISSION_MODE_AUTO:
@@ -585,7 +585,7 @@ static int avc_tuner_dsd_dvb_t(struct firedtv *fdtv,
585} 585}
586 586
587int avc_tuner_dsd(struct firedtv *fdtv, 587int avc_tuner_dsd(struct firedtv *fdtv,
588 struct dvb_frontend_parameters *params) 588 struct dtv_frontend_properties *p)
589{ 589{
590 struct avc_command_frame *c = (void *)fdtv->avc_data; 590 struct avc_command_frame *c = (void *)fdtv->avc_data;
591 int pos, ret; 591 int pos, ret;
@@ -597,9 +597,9 @@ int avc_tuner_dsd(struct firedtv *fdtv,
597 597
598 switch (fdtv->type) { 598 switch (fdtv->type) {
599 case FIREDTV_DVB_S: 599 case FIREDTV_DVB_S:
600 case FIREDTV_DVB_S2: pos = avc_tuner_tuneqpsk(fdtv, params); break; 600 case FIREDTV_DVB_S2: pos = avc_tuner_tuneqpsk(fdtv, p); break;
601 case FIREDTV_DVB_C: pos = avc_tuner_dsd_dvb_c(fdtv, params); break; 601 case FIREDTV_DVB_C: pos = avc_tuner_dsd_dvb_c(fdtv, p); break;
602 case FIREDTV_DVB_T: pos = avc_tuner_dsd_dvb_t(fdtv, params); break; 602 case FIREDTV_DVB_T: pos = avc_tuner_dsd_dvb_t(fdtv, p); break;
603 default: 603 default:
604 BUG(); 604 BUG();
605 } 605 }
diff --git a/drivers/media/dvb/firewire/firedtv-dvb.c b/drivers/media/dvb/firewire/firedtv-dvb.c
index fd8bbbfa5c5..eb7496eab13 100644
--- a/drivers/media/dvb/firewire/firedtv-dvb.c
+++ b/drivers/media/dvb/firewire/firedtv-dvb.c
@@ -203,7 +203,9 @@ int fdtv_dvb_register(struct firedtv *fdtv, const char *name)
203 if (err) 203 if (err)
204 goto fail_rem_frontend; 204 goto fail_rem_frontend;
205 205
206 dvb_net_init(&fdtv->adapter, &fdtv->dvbnet, &fdtv->demux.dmx); 206 err = dvb_net_init(&fdtv->adapter, &fdtv->dvbnet, &fdtv->demux.dmx);
207 if (err)
208 goto fail_disconnect_frontend;
207 209
208 fdtv_frontend_init(fdtv, name); 210 fdtv_frontend_init(fdtv, name);
209 err = dvb_register_frontend(&fdtv->adapter, &fdtv->fe); 211 err = dvb_register_frontend(&fdtv->adapter, &fdtv->fe);
@@ -218,6 +220,7 @@ int fdtv_dvb_register(struct firedtv *fdtv, const char *name)
218 220
219fail_net_release: 221fail_net_release:
220 dvb_net_release(&fdtv->dvbnet); 222 dvb_net_release(&fdtv->dvbnet);
223fail_disconnect_frontend:
221 fdtv->demux.dmx.close(&fdtv->demux.dmx); 224 fdtv->demux.dmx.close(&fdtv->demux.dmx);
222fail_rem_frontend: 225fail_rem_frontend:
223 fdtv->demux.dmx.remove_frontend(&fdtv->demux.dmx, &fdtv->frontend); 226 fdtv->demux.dmx.remove_frontend(&fdtv->demux.dmx, &fdtv->frontend);
diff --git a/drivers/media/dvb/firewire/firedtv-fe.c b/drivers/media/dvb/firewire/firedtv-fe.c
index 8748a61be73..6fe9793b98b 100644
--- a/drivers/media/dvb/firewire/firedtv-fe.c
+++ b/drivers/media/dvb/firewire/firedtv-fe.c
@@ -141,28 +141,12 @@ static int fdtv_read_uncorrected_blocks(struct dvb_frontend *fe, u32 *ucblocks)
141 return -EOPNOTSUPP; 141 return -EOPNOTSUPP;
142} 142}
143 143
144static int fdtv_set_frontend(struct dvb_frontend *fe, 144static int fdtv_set_frontend(struct dvb_frontend *fe)
145 struct dvb_frontend_parameters *params)
146{ 145{
146 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
147 struct firedtv *fdtv = fe->sec_priv; 147 struct firedtv *fdtv = fe->sec_priv;
148 148
149 return avc_tuner_dsd(fdtv, params); 149 return avc_tuner_dsd(fdtv, p);
150}
151
152static int fdtv_get_frontend(struct dvb_frontend *fe,
153 struct dvb_frontend_parameters *params)
154{
155 return -EOPNOTSUPP;
156}
157
158static int fdtv_get_property(struct dvb_frontend *fe, struct dtv_property *tvp)
159{
160 return 0;
161}
162
163static int fdtv_set_property(struct dvb_frontend *fe, struct dtv_property *tvp)
164{
165 return 0;
166} 150}
167 151
168void fdtv_frontend_init(struct firedtv *fdtv, const char *name) 152void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
@@ -174,10 +158,6 @@ void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
174 ops->sleep = fdtv_sleep; 158 ops->sleep = fdtv_sleep;
175 159
176 ops->set_frontend = fdtv_set_frontend; 160 ops->set_frontend = fdtv_set_frontend;
177 ops->get_frontend = fdtv_get_frontend;
178
179 ops->get_property = fdtv_get_property;
180 ops->set_property = fdtv_set_property;
181 161
182 ops->read_status = fdtv_read_status; 162 ops->read_status = fdtv_read_status;
183 ops->read_ber = fdtv_read_ber; 163 ops->read_ber = fdtv_read_ber;
@@ -192,7 +172,7 @@ void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
192 172
193 switch (fdtv->type) { 173 switch (fdtv->type) {
194 case FIREDTV_DVB_S: 174 case FIREDTV_DVB_S:
195 fi->type = FE_QPSK; 175 ops->delsys[0] = SYS_DVBS;
196 176
197 fi->frequency_min = 950000; 177 fi->frequency_min = 950000;
198 fi->frequency_max = 2150000; 178 fi->frequency_max = 2150000;
@@ -211,7 +191,8 @@ void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
211 break; 191 break;
212 192
213 case FIREDTV_DVB_S2: 193 case FIREDTV_DVB_S2:
214 fi->type = FE_QPSK; 194 ops->delsys[0] = SYS_DVBS;
195 ops->delsys[1] = SYS_DVBS2;
215 196
216 fi->frequency_min = 950000; 197 fi->frequency_min = 950000;
217 fi->frequency_max = 2150000; 198 fi->frequency_max = 2150000;
@@ -231,7 +212,7 @@ void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
231 break; 212 break;
232 213
233 case FIREDTV_DVB_C: 214 case FIREDTV_DVB_C:
234 fi->type = FE_QAM; 215 ops->delsys[0] = SYS_DVBC_ANNEX_A;
235 216
236 fi->frequency_min = 47000000; 217 fi->frequency_min = 47000000;
237 fi->frequency_max = 866000000; 218 fi->frequency_max = 866000000;
@@ -249,7 +230,7 @@ void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
249 break; 230 break;
250 231
251 case FIREDTV_DVB_T: 232 case FIREDTV_DVB_T:
252 fi->type = FE_OFDM; 233 ops->delsys[0] = SYS_DVBT;
253 234
254 fi->frequency_min = 49000000; 235 fi->frequency_min = 49000000;
255 fi->frequency_max = 861000000; 236 fi->frequency_max = 861000000;
diff --git a/drivers/media/dvb/firewire/firedtv.h b/drivers/media/dvb/firewire/firedtv.h
index bd00b04e079..4fdcd8cb753 100644
--- a/drivers/media/dvb/firewire/firedtv.h
+++ b/drivers/media/dvb/firewire/firedtv.h
@@ -112,8 +112,8 @@ struct firedtv {
112/* firedtv-avc.c */ 112/* firedtv-avc.c */
113int avc_recv(struct firedtv *fdtv, void *data, size_t length); 113int avc_recv(struct firedtv *fdtv, void *data, size_t length);
114int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat); 114int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat);
115struct dvb_frontend_parameters; 115struct dtv_frontend_properties;
116int avc_tuner_dsd(struct firedtv *fdtv, struct dvb_frontend_parameters *params); 116int avc_tuner_dsd(struct firedtv *fdtv, struct dtv_frontend_properties *params);
117int avc_tuner_set_pids(struct firedtv *fdtv, unsigned char pidc, u16 pid[]); 117int avc_tuner_set_pids(struct firedtv *fdtv, unsigned char pidc, u16 pid[]);
118int avc_tuner_get_ts(struct firedtv *fdtv); 118int avc_tuner_get_ts(struct firedtv *fdtv);
119int avc_identify_subunit(struct firedtv *fdtv); 119int avc_identify_subunit(struct firedtv *fdtv);
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index 4a2d2e6c91a..ebb5ed7a778 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -404,6 +404,13 @@ config DVB_EC100
404 help 404 help
405 Say Y when you want to support this frontend. 405 Say Y when you want to support this frontend.
406 406
407config DVB_HD29L2
408 tristate "HDIC HD29L2"
409 depends on DVB_CORE && I2C
410 default m if DVB_FE_CUSTOMISE
411 help
412 Say Y when you want to support this frontend.
413
407config DVB_STV0367 414config DVB_STV0367
408 tristate "ST STV0367 based" 415 tristate "ST STV0367 based"
409 depends on DVB_CORE && I2C 416 depends on DVB_CORE && I2C
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index f639f678155..00a20636df6 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -84,6 +84,7 @@ obj-$(CONFIG_DVB_STV090x) += stv090x.o
84obj-$(CONFIG_DVB_STV6110x) += stv6110x.o 84obj-$(CONFIG_DVB_STV6110x) += stv6110x.o
85obj-$(CONFIG_DVB_ISL6423) += isl6423.o 85obj-$(CONFIG_DVB_ISL6423) += isl6423.o
86obj-$(CONFIG_DVB_EC100) += ec100.o 86obj-$(CONFIG_DVB_EC100) += ec100.o
87obj-$(CONFIG_DVB_HD29L2) += hd29l2.o
87obj-$(CONFIG_DVB_DS3000) += ds3000.o 88obj-$(CONFIG_DVB_DS3000) += ds3000.o
88obj-$(CONFIG_DVB_MB86A16) += mb86a16.o 89obj-$(CONFIG_DVB_MB86A16) += mb86a16.o
89obj-$(CONFIG_DVB_MB86A20S) += mb86a20s.o 90obj-$(CONFIG_DVB_MB86A20S) += mb86a20s.o
diff --git a/drivers/media/dvb/frontends/af9013.c b/drivers/media/dvb/frontends/af9013.c
index 345311c3338..6bcbcf543b3 100644
--- a/drivers/media/dvb/frontends/af9013.c
+++ b/drivers/media/dvb/frontends/af9013.c
@@ -2,6 +2,7 @@
2 * Afatech AF9013 demodulator driver 2 * Afatech AF9013 demodulator driver
3 * 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
5 * 6 *
6 * Thanks to Afatech who kindly provided information. 7 * Thanks to Afatech who kindly provided information.
7 * 8 *
@@ -21,25 +22,15 @@
21 * 22 *
22 */ 23 */
23 24
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/string.h>
30#include <linux/slab.h>
31#include <linux/firmware.h>
32
33#include "dvb_frontend.h"
34#include "af9013_priv.h" 25#include "af9013_priv.h"
35#include "af9013.h"
36 26
37int af9013_debug; 27int af9013_debug;
28module_param_named(debug, af9013_debug, int, 0644);
29MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
38 30
39struct af9013_state { 31struct af9013_state {
40 struct i2c_adapter *i2c; 32 struct i2c_adapter *i2c;
41 struct dvb_frontend frontend; 33 struct dvb_frontend fe;
42
43 struct af9013_config config; 34 struct af9013_config config;
44 35
45 /* tuner/demod RF and IF AGC limits used for signal strength calc */ 36 /* tuner/demod RF and IF AGC limits used for signal strength calc */
@@ -48,107 +39,178 @@ struct af9013_state {
48 u32 ber; 39 u32 ber;
49 u32 ucblocks; 40 u32 ucblocks;
50 u16 snr; 41 u16 snr;
51 u32 frequency; 42 u32 bandwidth_hz;
52 unsigned long next_statistics_check; 43 fe_status_t fe_status;
44 unsigned long set_frontend_jiffies;
45 unsigned long read_status_jiffies;
46 bool first_tune;
47 bool i2c_gate_state;
48 unsigned int statistics_step:3;
49 struct delayed_work statistics_work;
53}; 50};
54 51
55static u8 regmask[8] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff }; 52/* write multiple registers */
56 53static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
57static int af9013_write_regs(struct af9013_state *state, u8 mbox, u16 reg, 54 const u8 *val, int len)
58 u8 *val, u8 len)
59{ 55{
56 int ret;
60 u8 buf[3+len]; 57 u8 buf[3+len];
61 struct i2c_msg msg = { 58 struct i2c_msg msg[1] = {
62 .addr = state->config.demod_address, 59 {
63 .flags = 0, 60 .addr = priv->config.i2c_addr,
64 .len = sizeof(buf), 61 .flags = 0,
65 .buf = buf }; 62 .len = sizeof(buf),
66 63 .buf = buf,
67 buf[0] = reg >> 8; 64 }
68 buf[1] = reg & 0xff; 65 };
66
67 buf[0] = (reg >> 8) & 0xff;
68 buf[1] = (reg >> 0) & 0xff;
69 buf[2] = mbox; 69 buf[2] = mbox;
70 memcpy(&buf[3], val, len); 70 memcpy(&buf[3], val, len);
71 71
72 if (i2c_transfer(state->i2c, &msg, 1) != 1) { 72 ret = i2c_transfer(priv->i2c, msg, 1);
73 warn("I2C write failed reg:%04x len:%d", reg, len); 73 if (ret == 1) {
74 return -EREMOTEIO; 74 ret = 0;
75 } else {
76 warn("i2c wr failed=%d reg=%04x len=%d", ret, reg, len);
77 ret = -EREMOTEIO;
75 } 78 }
76 return 0; 79 return ret;
77} 80}
78 81
79static int af9013_write_ofdm_regs(struct af9013_state *state, u16 reg, u8 *val, 82/* read multiple registers */
80 u8 len) 83static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
84 u8 *val, int len)
81{ 85{
82 u8 mbox = (1 << 0)|(1 << 1)|((len - 1) << 2)|(0 << 6)|(0 << 7); 86 int ret;
83 return af9013_write_regs(state, mbox, reg, val, len); 87 u8 buf[3];
88 struct i2c_msg msg[2] = {
89 {
90 .addr = priv->config.i2c_addr,
91 .flags = 0,
92 .len = 3,
93 .buf = buf,
94 }, {
95 .addr = priv->config.i2c_addr,
96 .flags = I2C_M_RD,
97 .len = len,
98 .buf = val,
99 }
100 };
101
102 buf[0] = (reg >> 8) & 0xff;
103 buf[1] = (reg >> 0) & 0xff;
104 buf[2] = mbox;
105
106 ret = i2c_transfer(priv->i2c, msg, 2);
107 if (ret == 2) {
108 ret = 0;
109 } else {
110 warn("i2c rd failed=%d reg=%04x len=%d", ret, reg, len);
111 ret = -EREMOTEIO;
112 }
113 return ret;
84} 114}
85 115
86static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val, 116/* write multiple registers */
87 u8 len) 117static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val,
118 int len)
119{
120 int ret, i;
121 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0);
122
123 if ((priv->config.ts_mode == AF9013_TS_USB) &&
124 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
125 mbox |= ((len - 1) << 2);
126 ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len);
127 } else {
128 for (i = 0; i < len; i++) {
129 ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1);
130 if (ret)
131 goto err;
132 }
133 }
134
135err:
136 return 0;
137}
138
139/* read multiple registers */
140static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len)
88{ 141{
89 u8 mbox = (1 << 0)|(1 << 1)|((len - 1) << 2)|(1 << 6)|(1 << 7); 142 int ret, i;
90 return af9013_write_regs(state, mbox, reg, val, len); 143 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0);
144
145 if ((priv->config.ts_mode == AF9013_TS_USB) &&
146 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
147 mbox |= ((len - 1) << 2);
148 ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len);
149 } else {
150 for (i = 0; i < len; i++) {
151 ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1);
152 if (ret)
153 goto err;
154 }
155 }
156
157err:
158 return 0;
91} 159}
92 160
93/* write single register */ 161/* write single register */
94static int af9013_write_reg(struct af9013_state *state, u16 reg, u8 val) 162static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val)
95{ 163{
96 return af9013_write_ofdm_regs(state, reg, &val, 1); 164 return af9013_wr_regs(priv, reg, &val, 1);
97} 165}
98 166
99/* read single register */ 167/* read single register */
100static int af9013_read_reg(struct af9013_state *state, u16 reg, u8 *val) 168static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val)
101{ 169{
102 u8 obuf[3] = { reg >> 8, reg & 0xff, 0 }; 170 return af9013_rd_regs(priv, reg, val, 1);
103 u8 ibuf[1]; 171}
104 struct i2c_msg msg[2] = {
105 {
106 .addr = state->config.demod_address,
107 .flags = 0,
108 .len = sizeof(obuf),
109 .buf = obuf
110 }, {
111 .addr = state->config.demod_address,
112 .flags = I2C_M_RD,
113 .len = sizeof(ibuf),
114 .buf = ibuf
115 }
116 };
117 172
118 if (i2c_transfer(state->i2c, msg, 2) != 2) { 173static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
119 warn("I2C read failed reg:%04x", reg); 174 u8 len)
120 return -EREMOTEIO; 175{
121 } 176 u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0);
122 *val = ibuf[0]; 177 return af9013_wr_regs_i2c(state, mbox, reg, val, len);
123 return 0;
124} 178}
125 179
126static int af9013_write_reg_bits(struct af9013_state *state, u16 reg, u8 pos, 180static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos,
127 u8 len, u8 val) 181 int len, u8 val)
128{ 182{
129 int ret; 183 int ret;
130 u8 tmp, mask; 184 u8 tmp, mask;
131 185
132 ret = af9013_read_reg(state, reg, &tmp); 186 /* no need for read if whole reg is written */
133 if (ret) 187 if (len != 8) {
134 return ret; 188 ret = af9013_rd_reg(state, reg, &tmp);
189 if (ret)
190 return ret;
135 191
136 mask = regmask[len - 1] << pos; 192 mask = (0xff >> (8 - len)) << pos;
137 tmp = (tmp & ~mask) | ((val << pos) & mask); 193 val <<= pos;
194 tmp &= ~mask;
195 val |= tmp;
196 }
138 197
139 return af9013_write_reg(state, reg, tmp); 198 return af9013_wr_reg(state, reg, val);
140} 199}
141 200
142static int af9013_read_reg_bits(struct af9013_state *state, u16 reg, u8 pos, 201static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos,
143 u8 len, u8 *val) 202 int len, u8 *val)
144{ 203{
145 int ret; 204 int ret;
146 u8 tmp; 205 u8 tmp;
147 206
148 ret = af9013_read_reg(state, reg, &tmp); 207 ret = af9013_rd_reg(state, reg, &tmp);
149 if (ret) 208 if (ret)
150 return ret; 209 return ret;
151 *val = (tmp >> pos) & regmask[len - 1]; 210
211 *val = (tmp >> pos);
212 *val &= (0xff >> (8 - len));
213
152 return 0; 214 return 0;
153} 215}
154 216
@@ -157,10 +219,13 @@ static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
157 int ret; 219 int ret;
158 u8 pos; 220 u8 pos;
159 u16 addr; 221 u16 addr;
160 deb_info("%s: gpio:%d gpioval:%02x\n", __func__, gpio, gpioval);
161 222
162/* GPIO0 & GPIO1 0xd735 223 dbg("%s: gpio=%d gpioval=%02x", __func__, gpio, gpioval);
163 GPIO2 & GPIO3 0xd736 */ 224
225 /*
226 * GPIO0 & GPIO1 0xd735
227 * GPIO2 & GPIO3 0xd736
228 */
164 229
165 switch (gpio) { 230 switch (gpio) {
166 case 0: 231 case 0:
@@ -175,7 +240,7 @@ static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
175 default: 240 default:
176 err("invalid gpio:%d\n", gpio); 241 err("invalid gpio:%d\n", gpio);
177 ret = -EINVAL; 242 ret = -EINVAL;
178 goto error; 243 goto err;
179 }; 244 };
180 245
181 switch (gpio) { 246 switch (gpio) {
@@ -190,16 +255,21 @@ static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
190 break; 255 break;
191 }; 256 };
192 257
193 ret = af9013_write_reg_bits(state, addr, pos, 4, gpioval); 258 ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval);
259 if (ret)
260 goto err;
194 261
195error: 262 return ret;
263err:
264 dbg("%s: failed=%d", __func__, ret);
196 return ret; 265 return ret;
197} 266}
198 267
199static u32 af913_div(u32 a, u32 b, u32 x) 268static u32 af913_div(u32 a, u32 b, u32 x)
200{ 269{
201 u32 r = 0, c = 0, i; 270 u32 r = 0, c = 0, i;
202 deb_info("%s: a:%d b:%d x:%d\n", __func__, a, b, x); 271
272 dbg("%s: a=%d b=%d x=%d", __func__, a, b, x);
203 273
204 if (a > b) { 274 if (a > b) {
205 c = a / b; 275 c = a / b;
@@ -216,205 +286,407 @@ static u32 af913_div(u32 a, u32 b, u32 x)
216 } 286 }
217 r = (c << (u32)x) + r; 287 r = (c << (u32)x) + r;
218 288
219 deb_info("%s: a:%d b:%d x:%d r:%d r:%x\n", __func__, a, b, x, r, r); 289 dbg("%s: a=%d b=%d x=%d r=%x", __func__, a, b, x, r);
220 return r; 290 return r;
221} 291}
222 292
223static int af9013_set_coeff(struct af9013_state *state, fe_bandwidth_t bw) 293static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
224{ 294{
225 int ret, i, j, found; 295 int ret, i;
226 deb_info("%s: adc_clock:%d bw:%d\n", __func__, 296 u8 tmp;
227 state->config.adc_clock, bw);
228
229 /* lookup coeff from table */
230 for (i = 0, found = 0; i < ARRAY_SIZE(coeff_table); i++) {
231 if (coeff_table[i].adc_clock == state->config.adc_clock &&
232 coeff_table[i].bw == bw) {
233 found = 1;
234 break;
235 }
236 }
237 297
238 if (!found) { 298 dbg("%s: onoff=%d", __func__, onoff);
239 err("invalid bw or clock"); 299
240 ret = -EINVAL; 300 /* enable reset */
241 goto error; 301 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1);
302 if (ret)
303 goto err;
304
305 /* start reset mechanism */
306 ret = af9013_wr_reg(state, 0xaeff, 1);
307 if (ret)
308 goto err;
309
310 /* wait reset performs */
311 for (i = 0; i < 150; i++) {
312 ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp);
313 if (ret)
314 goto err;
315
316 if (tmp)
317 break; /* reset done */
318
319 usleep_range(5000, 25000);
242 } 320 }
243 321
244 deb_info("%s: coeff: ", __func__); 322 if (!tmp)
245 debug_dump(coeff_table[i].val, sizeof(coeff_table[i].val), deb_info); 323 return -ETIMEDOUT;
246 324
247 /* program */ 325 if (onoff) {
248 for (j = 0; j < sizeof(coeff_table[i].val); j++) { 326 /* clear reset */
249 ret = af9013_write_reg(state, 0xae00 + j, 327 ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0);
250 coeff_table[i].val[j]);
251 if (ret) 328 if (ret)
252 break; 329 goto err;
330
331 /* disable reset */
332 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0);
333
334 /* power on */
335 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0);
336 } else {
337 /* power off */
338 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1);
253 } 339 }
254 340
255error: 341 return ret;
342err:
343 dbg("%s: failed=%d", __func__, ret);
344 return ret;
345}
346
347static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe)
348{
349 struct af9013_state *state = fe->demodulator_priv;
350 int ret;
351
352 dbg("%s", __func__);
353
354 /* reset and start BER counter */
355 ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1);
356 if (ret)
357 goto err;
358
359 return ret;
360err:
361 dbg("%s: failed=%d", __func__, ret);
256 return ret; 362 return ret;
257} 363}
258 364
259static int af9013_set_adc_ctrl(struct af9013_state *state) 365static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe)
260{ 366{
367 struct af9013_state *state = fe->demodulator_priv;
261 int ret; 368 int ret;
262 u8 buf[3], tmp, i; 369 u8 buf[5];
263 u32 adc_cw;
264 370
265 deb_info("%s: adc_clock:%d\n", __func__, state->config.adc_clock); 371 dbg("%s", __func__);
266 372
267 /* adc frequency type */ 373 /* check if error bit count is ready */
268 switch (state->config.adc_clock) { 374 ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]);
269 case 28800: /* 28.800 MHz */ 375 if (ret)
270 tmp = 0; 376 goto err;
271 break; 377
272 case 20480: /* 20.480 MHz */ 378 if (!buf[0]) {
273 tmp = 1; 379 dbg("%s: not ready", __func__);
380 return 0;
381 }
382
383 ret = af9013_rd_regs(state, 0xd387, buf, 5);
384 if (ret)
385 goto err;
386
387 state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0];
388 state->ucblocks += (buf[4] << 8) | buf[3];
389
390 return ret;
391err:
392 dbg("%s: failed=%d", __func__, ret);
393 return ret;
394}
395
396static int af9013_statistics_snr_start(struct dvb_frontend *fe)
397{
398 struct af9013_state *state = fe->demodulator_priv;
399 int ret;
400
401 dbg("%s", __func__);
402
403 /* start SNR meas */
404 ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1);
405 if (ret)
406 goto err;
407
408 return ret;
409err:
410 dbg("%s: failed=%d", __func__, ret);
411 return ret;
412}
413
414static int af9013_statistics_snr_result(struct dvb_frontend *fe)
415{
416 struct af9013_state *state = fe->demodulator_priv;
417 int ret, i, len;
418 u8 buf[3], tmp;
419 u32 snr_val;
420 const struct af9013_snr *uninitialized_var(snr_lut);
421
422 dbg("%s", __func__);
423
424 /* check if SNR ready */
425 ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp);
426 if (ret)
427 goto err;
428
429 if (!tmp) {
430 dbg("%s: not ready", __func__);
431 return 0;
432 }
433
434 /* read value */
435 ret = af9013_rd_regs(state, 0xd2e3, buf, 3);
436 if (ret)
437 goto err;
438
439 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
440
441 /* read current modulation */
442 ret = af9013_rd_reg(state, 0xd3c1, &tmp);
443 if (ret)
444 goto err;
445
446 switch ((tmp >> 6) & 3) {
447 case 0:
448 len = ARRAY_SIZE(qpsk_snr_lut);
449 snr_lut = qpsk_snr_lut;
274 break; 450 break;
275 case 28000: /* 28.000 MHz */ 451 case 1:
276 tmp = 2; 452 len = ARRAY_SIZE(qam16_snr_lut);
453 snr_lut = qam16_snr_lut;
277 break; 454 break;
278 case 25000: /* 25.000 MHz */ 455 case 2:
279 tmp = 3; 456 len = ARRAY_SIZE(qam64_snr_lut);
457 snr_lut = qam64_snr_lut;
280 break; 458 break;
281 default: 459 default:
282 err("invalid xtal"); 460 goto err;
283 return -EINVAL; 461 break;
284 } 462 }
285 463
286 adc_cw = af913_div(state->config.adc_clock*1000, 1000000ul, 19ul); 464 for (i = 0; i < len; i++) {
465 tmp = snr_lut[i].snr;
287 466
288 buf[0] = (u8) ((adc_cw & 0x000000ff)); 467 if (snr_val < snr_lut[i].val)
289 buf[1] = (u8) ((adc_cw & 0x0000ff00) >> 8); 468 break;
290 buf[2] = (u8) ((adc_cw & 0x00ff0000) >> 16); 469 }
470 state->snr = tmp * 10; /* dB/10 */
291 471
292 deb_info("%s: adc_cw:", __func__); 472 return ret;
293 debug_dump(buf, sizeof(buf), deb_info); 473err:
474 dbg("%s: failed=%d", __func__, ret);
475 return ret;
476}
477
478static int af9013_statistics_signal_strength(struct dvb_frontend *fe)
479{
480 struct af9013_state *state = fe->demodulator_priv;
481 int ret = 0;
482 u8 buf[2], rf_gain, if_gain;
483 int signal_strength;
484
485 dbg("%s", __func__);
486
487 if (!state->signal_strength_en)
488 return 0;
489
490 ret = af9013_rd_regs(state, 0xd07c, buf, 2);
491 if (ret)
492 goto err;
493
494 rf_gain = buf[0];
495 if_gain = buf[1];
496
497 signal_strength = (0xffff / \
498 (9 * (state->rf_50 + state->if_50) - \
499 11 * (state->rf_80 + state->if_80))) * \
500 (10 * (rf_gain + if_gain) - \
501 11 * (state->rf_80 + state->if_80));
502 if (signal_strength < 0)
503 signal_strength = 0;
504 else if (signal_strength > 0xffff)
505 signal_strength = 0xffff;
506
507 state->signal_strength = signal_strength;
294 508
295 /* program */ 509 return ret;
296 for (i = 0; i < sizeof(buf); i++) { 510err:
297 ret = af9013_write_reg(state, 0xd180 + i, buf[i]); 511 dbg("%s: failed=%d", __func__, ret);
298 if (ret)
299 goto error;
300 }
301 ret = af9013_write_reg_bits(state, 0x9bd2, 0, 4, tmp);
302error:
303 return ret; 512 return ret;
304} 513}
305 514
306static int af9013_set_freq_ctrl(struct af9013_state *state, fe_bandwidth_t bw) 515static void af9013_statistics_work(struct work_struct *work)
307{ 516{
308 int ret; 517 int ret;
309 u16 addr; 518 struct af9013_state *state = container_of(work,
310 u8 buf[3], i, j; 519 struct af9013_state, statistics_work.work);
311 u32 adc_freq, freq_cw; 520 unsigned int next_msec;
312 s8 bfs_spec_inv; 521
313 int if_sample_freq; 522 /* update only signal strength when demod is not locked */
314 523 if (!(state->fe_status & FE_HAS_LOCK)) {
315 for (j = 0; j < 3; j++) { 524 state->statistics_step = 0;
316 if (j == 0) { 525 state->ber = 0;
317 addr = 0xd140; /* fcw normal */ 526 state->snr = 0;
318 bfs_spec_inv = state->config.rf_spec_inv ? -1 : 1; 527 }
319 } else if (j == 1) { 528
320 addr = 0x9be7; /* fcw dummy ram */ 529 switch (state->statistics_step) {
321 bfs_spec_inv = state->config.rf_spec_inv ? -1 : 1; 530 default:
322 } else { 531 state->statistics_step = 0;
323 addr = 0x9bea; /* fcw inverted */ 532 case 0:
324 bfs_spec_inv = state->config.rf_spec_inv ? 1 : -1; 533 ret = af9013_statistics_signal_strength(&state->fe);
325 } 534 state->statistics_step++;
535 next_msec = 300;
536 break;
537 case 1:
538 ret = af9013_statistics_snr_start(&state->fe);
539 state->statistics_step++;
540 next_msec = 200;
541 break;
542 case 2:
543 ret = af9013_statistics_ber_unc_start(&state->fe);
544 state->statistics_step++;
545 next_msec = 1000;
546 break;
547 case 3:
548 ret = af9013_statistics_snr_result(&state->fe);
549 state->statistics_step++;
550 next_msec = 400;
551 break;
552 case 4:
553 ret = af9013_statistics_ber_unc_result(&state->fe);
554 state->statistics_step++;
555 next_msec = 100;
556 break;
557 }
326 558
327 adc_freq = state->config.adc_clock * 1000; 559 schedule_delayed_work(&state->statistics_work,
328 if_sample_freq = state->config.tuner_if * 1000; 560 msecs_to_jiffies(next_msec));
329 561
330 /* TDA18271 uses different sampling freq for every bw */ 562 return;
331 if (state->config.tuner == AF9013_TUNER_TDA18271) { 563}
332 switch (bw) { 564
333 case BANDWIDTH_6_MHZ: 565static int af9013_get_tune_settings(struct dvb_frontend *fe,
334 if_sample_freq = 3300000; /* 3.3 MHz */ 566 struct dvb_frontend_tune_settings *fesettings)
335 break; 567{
336 case BANDWIDTH_7_MHZ: 568 fesettings->min_delay_ms = 800;
337 if_sample_freq = 3500000; /* 3.5 MHz */ 569 fesettings->step_size = 0;
338 break; 570 fesettings->max_drift = 0;
339 case BANDWIDTH_8_MHZ: 571
340 default: 572 return 0;
341 if_sample_freq = 4000000; /* 4.0 MHz */ 573}
342 break; 574
343 } 575static int af9013_set_frontend(struct dvb_frontend *fe)
344 } else if (state->config.tuner == AF9013_TUNER_TDA18218) { 576{
345 switch (bw) { 577 struct af9013_state *state = fe->demodulator_priv;
346 case BANDWIDTH_6_MHZ: 578 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
347 if_sample_freq = 3000000; /* 3 MHz */ 579 int ret, i, sampling_freq;
348 break; 580 bool auto_mode, spec_inv;
349 case BANDWIDTH_7_MHZ: 581 u8 buf[6];
350 if_sample_freq = 3500000; /* 3.5 MHz */ 582 u32 if_frequency, freq_cw;
351 break; 583
352 case BANDWIDTH_8_MHZ: 584 dbg("%s: frequency=%d bandwidth_hz=%d", __func__,
353 default: 585 c->frequency, c->bandwidth_hz);
354 if_sample_freq = 4000000; /* 4 MHz */ 586
587 /* program tuner */
588 if (fe->ops.tuner_ops.set_params)
589 fe->ops.tuner_ops.set_params(fe);
590
591 /* program CFOE coefficients */
592 if (c->bandwidth_hz != state->bandwidth_hz) {
593 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
594 if (coeff_lut[i].clock == state->config.clock &&
595 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
355 break; 596 break;
356 } 597 }
357 } 598 }
358 599
359 while (if_sample_freq > (adc_freq / 2)) 600 ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val,
360 if_sample_freq = if_sample_freq - adc_freq; 601 sizeof(coeff_lut[i].val));
602 }
361 603
362 if (if_sample_freq >= 0) 604 /* program frequency control */
363 bfs_spec_inv = bfs_spec_inv * (-1); 605 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
606 /* get used IF frequency */
607 if (fe->ops.tuner_ops.get_if_frequency)
608 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
364 else 609 else
365 if_sample_freq = if_sample_freq * (-1); 610 if_frequency = state->config.if_frequency;
611
612 sampling_freq = if_frequency;
366 613
367 freq_cw = af913_div(if_sample_freq, adc_freq, 23ul); 614 while (sampling_freq > (state->config.clock / 2))
615 sampling_freq -= state->config.clock;
368 616
369 if (bfs_spec_inv == -1) 617 if (sampling_freq < 0) {
370 freq_cw = 0x00800000 - freq_cw; 618 sampling_freq *= -1;
619 spec_inv = state->config.spec_inv;
620 } else {
621 spec_inv = !state->config.spec_inv;
622 }
371 623
372 buf[0] = (u8) ((freq_cw & 0x000000ff)); 624 freq_cw = af913_div(sampling_freq, state->config.clock, 23);
373 buf[1] = (u8) ((freq_cw & 0x0000ff00) >> 8);
374 buf[2] = (u8) ((freq_cw & 0x007f0000) >> 16);
375 625
626 if (spec_inv)
627 freq_cw = 0x800000 - freq_cw;
376 628
377 deb_info("%s: freq_cw:", __func__); 629 buf[0] = (freq_cw >> 0) & 0xff;
378 debug_dump(buf, sizeof(buf), deb_info); 630 buf[1] = (freq_cw >> 8) & 0xff;
631 buf[2] = (freq_cw >> 16) & 0x7f;
379 632
380 /* program */ 633 freq_cw = 0x800000 - freq_cw;
381 for (i = 0; i < sizeof(buf); i++) { 634
382 ret = af9013_write_reg(state, addr++, buf[i]); 635 buf[3] = (freq_cw >> 0) & 0xff;
383 if (ret) 636 buf[4] = (freq_cw >> 8) & 0xff;
384 goto error; 637 buf[5] = (freq_cw >> 16) & 0x7f;
385 } 638
639 ret = af9013_wr_regs(state, 0xd140, buf, 3);
640 if (ret)
641 goto err;
642
643 ret = af9013_wr_regs(state, 0x9be7, buf, 6);
644 if (ret)
645 goto err;
386 } 646 }
387error:
388 return ret;
389}
390 647
391static int af9013_set_ofdm_params(struct af9013_state *state, 648 /* clear TPS lock flag */
392 struct dvb_ofdm_parameters *params, u8 *auto_mode) 649 ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1);
393{ 650 if (ret)
394 int ret; 651 goto err;
395 u8 i, buf[3] = {0, 0, 0}; 652
396 *auto_mode = 0; /* set if parameters are requested to auto set */ 653 /* clear MPEG2 lock flag */
654 ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0);
655 if (ret)
656 goto err;
657
658 /* empty channel function */
659 ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0);
660 if (ret)
661 goto err;
397 662
398 /* Try auto-detect transmission parameters in case of AUTO requested or 663 /* empty DVB-T channel function */
399 garbage parameters given by application for compatibility. 664 ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0);
400 MPlayer seems to provide garbage parameters currently. */ 665 if (ret)
666 goto err;
667
668 /* transmission parameters */
669 auto_mode = false;
670 memset(buf, 0, 3);
401 671
402 switch (params->transmission_mode) { 672 switch (c->transmission_mode) {
403 case TRANSMISSION_MODE_AUTO: 673 case TRANSMISSION_MODE_AUTO:
404 *auto_mode = 1; 674 auto_mode = 1;
675 break;
405 case TRANSMISSION_MODE_2K: 676 case TRANSMISSION_MODE_2K:
406 break; 677 break;
407 case TRANSMISSION_MODE_8K: 678 case TRANSMISSION_MODE_8K:
408 buf[0] |= (1 << 0); 679 buf[0] |= (1 << 0);
409 break; 680 break;
410 default: 681 default:
411 deb_info("%s: invalid transmission_mode\n", __func__); 682 dbg("%s: invalid transmission_mode", __func__);
412 *auto_mode = 1; 683 auto_mode = 1;
413 } 684 }
414 685
415 switch (params->guard_interval) { 686 switch (c->guard_interval) {
416 case GUARD_INTERVAL_AUTO: 687 case GUARD_INTERVAL_AUTO:
417 *auto_mode = 1; 688 auto_mode = 1;
689 break;
418 case GUARD_INTERVAL_1_32: 690 case GUARD_INTERVAL_1_32:
419 break; 691 break;
420 case GUARD_INTERVAL_1_16: 692 case GUARD_INTERVAL_1_16:
@@ -427,13 +699,14 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
427 buf[0] |= (3 << 2); 699 buf[0] |= (3 << 2);
428 break; 700 break;
429 default: 701 default:
430 deb_info("%s: invalid guard_interval\n", __func__); 702 dbg("%s: invalid guard_interval", __func__);
431 *auto_mode = 1; 703 auto_mode = 1;
432 } 704 }
433 705
434 switch (params->hierarchy_information) { 706 switch (c->hierarchy) {
435 case HIERARCHY_AUTO: 707 case HIERARCHY_AUTO:
436 *auto_mode = 1; 708 auto_mode = 1;
709 break;
437 case HIERARCHY_NONE: 710 case HIERARCHY_NONE:
438 break; 711 break;
439 case HIERARCHY_1: 712 case HIERARCHY_1:
@@ -446,13 +719,14 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
446 buf[0] |= (3 << 4); 719 buf[0] |= (3 << 4);
447 break; 720 break;
448 default: 721 default:
449 deb_info("%s: invalid hierarchy_information\n", __func__); 722 dbg("%s: invalid hierarchy", __func__);
450 *auto_mode = 1; 723 auto_mode = 1;
451 }; 724 };
452 725
453 switch (params->constellation) { 726 switch (c->modulation) {
454 case QAM_AUTO: 727 case QAM_AUTO:
455 *auto_mode = 1; 728 auto_mode = 1;
729 break;
456 case QPSK: 730 case QPSK:
457 break; 731 break;
458 case QAM_16: 732 case QAM_16:
@@ -462,16 +736,17 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
462 buf[1] |= (2 << 6); 736 buf[1] |= (2 << 6);
463 break; 737 break;
464 default: 738 default:
465 deb_info("%s: invalid constellation\n", __func__); 739 dbg("%s: invalid modulation", __func__);
466 *auto_mode = 1; 740 auto_mode = 1;
467 } 741 }
468 742
469 /* Use HP. How and which case we can switch to LP? */ 743 /* Use HP. How and which case we can switch to LP? */
470 buf[1] |= (1 << 4); 744 buf[1] |= (1 << 4);
471 745
472 switch (params->code_rate_HP) { 746 switch (c->code_rate_HP) {
473 case FEC_AUTO: 747 case FEC_AUTO:
474 *auto_mode = 1; 748 auto_mode = 1;
749 break;
475 case FEC_1_2: 750 case FEC_1_2:
476 break; 751 break;
477 case FEC_2_3: 752 case FEC_2_3:
@@ -487,16 +762,14 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
487 buf[2] |= (4 << 0); 762 buf[2] |= (4 << 0);
488 break; 763 break;
489 default: 764 default:
490 deb_info("%s: invalid code_rate_HP\n", __func__); 765 dbg("%s: invalid code_rate_HP", __func__);
491 *auto_mode = 1; 766 auto_mode = 1;
492 } 767 }
493 768
494 switch (params->code_rate_LP) { 769 switch (c->code_rate_LP) {
495 case FEC_AUTO: 770 case FEC_AUTO:
496 /* if HIERARCHY_NONE and FEC_NONE then LP FEC is set to FEC_AUTO 771 auto_mode = 1;
497 by dvb_frontend.c for compatibility */ 772 break;
498 if (params->hierarchy_information != HIERARCHY_NONE)
499 *auto_mode = 1;
500 case FEC_1_2: 773 case FEC_1_2:
501 break; 774 break;
502 case FEC_2_3: 775 case FEC_2_3:
@@ -512,709 +785,373 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
512 buf[2] |= (4 << 3); 785 buf[2] |= (4 << 3);
513 break; 786 break;
514 case FEC_NONE: 787 case FEC_NONE:
515 if (params->hierarchy_information == HIERARCHY_AUTO) 788 break;
516 break;
517 default: 789 default:
518 deb_info("%s: invalid code_rate_LP\n", __func__); 790 dbg("%s: invalid code_rate_LP", __func__);
519 *auto_mode = 1; 791 auto_mode = 1;
520 } 792 }
521 793
522 switch (params->bandwidth) { 794 switch (c->bandwidth_hz) {
523 case BANDWIDTH_6_MHZ: 795 case 6000000:
524 break; 796 break;
525 case BANDWIDTH_7_MHZ: 797 case 7000000:
526 buf[1] |= (1 << 2); 798 buf[1] |= (1 << 2);
527 break; 799 break;
528 case BANDWIDTH_8_MHZ: 800 case 8000000:
529 buf[1] |= (2 << 2); 801 buf[1] |= (2 << 2);
530 break; 802 break;
531 default: 803 default:
532 deb_info("%s: invalid bandwidth\n", __func__); 804 dbg("%s: invalid bandwidth_hz", __func__);
533 buf[1] |= (2 << 2); /* cannot auto-detect BW, try 8 MHz */ 805 ret = -EINVAL;
534 } 806 goto err;
535
536 /* program */
537 for (i = 0; i < sizeof(buf); i++) {
538 ret = af9013_write_reg(state, 0xd3c0 + i, buf[i]);
539 if (ret)
540 break;
541 } 807 }
542 808
543 return ret; 809 ret = af9013_wr_regs(state, 0xd3c0, buf, 3);
544}
545
546static int af9013_reset(struct af9013_state *state, u8 sleep)
547{
548 int ret;
549 u8 tmp, i;
550 deb_info("%s\n", __func__);
551
552 /* enable OFDM reset */
553 ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 1);
554 if (ret)
555 goto error;
556
557 /* start reset mechanism */
558 ret = af9013_write_reg(state, 0xaeff, 1);
559 if (ret) 810 if (ret)
560 goto error; 811 goto err;
561 812
562 /* reset is done when bit 1 is set */ 813 if (auto_mode) {
563 for (i = 0; i < 150; i++) { 814 /* clear easy mode flag */
564 ret = af9013_read_reg_bits(state, 0xd417, 1, 1, &tmp); 815 ret = af9013_wr_reg(state, 0xaefd, 0);
565 if (ret)
566 goto error;
567 if (tmp)
568 break; /* reset done */
569 msleep(10);
570 }
571 if (!tmp)
572 return -ETIMEDOUT;
573
574 /* don't clear reset when going to sleep */
575 if (!sleep) {
576 /* clear OFDM reset */
577 ret = af9013_write_reg_bits(state, 0xd417, 1, 1, 0);
578 if (ret) 816 if (ret)
579 goto error; 817 goto err;
580
581 /* disable OFDM reset */
582 ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 0);
583 }
584error:
585 return ret;
586}
587
588static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
589{
590 int ret;
591 deb_info("%s: onoff:%d\n", __func__, onoff);
592 818
593 if (onoff) { 819 dbg("%s: auto params", __func__);
594 /* power on */
595 ret = af9013_write_reg_bits(state, 0xd73a, 3, 1, 0);
596 if (ret)
597 goto error;
598 ret = af9013_write_reg_bits(state, 0xd417, 1, 1, 0);
599 if (ret)
600 goto error;
601 ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 0);
602 } else { 820 } else {
603 /* power off */ 821 /* set easy mode flag */
604 ret = af9013_reset(state, 1); 822 ret = af9013_wr_reg(state, 0xaefd, 1);
605 if (ret) 823 if (ret)
606 goto error; 824 goto err;
607 ret = af9013_write_reg_bits(state, 0xd73a, 3, 1, 1);
608 }
609error:
610 return ret;
611}
612
613static int af9013_lock_led(struct af9013_state *state, u8 onoff)
614{
615 deb_info("%s: onoff:%d\n", __func__, onoff);
616
617 return af9013_write_reg_bits(state, 0xd730, 0, 1, onoff);
618}
619
620static int af9013_set_frontend(struct dvb_frontend *fe,
621 struct dvb_frontend_parameters *params)
622{
623 struct af9013_state *state = fe->demodulator_priv;
624 int ret;
625 u8 auto_mode; /* auto set TPS */
626 825
627 deb_info("%s: freq:%d bw:%d\n", __func__, params->frequency, 826 ret = af9013_wr_reg(state, 0xaefe, 0);
628 params->u.ofdm.bandwidth);
629
630 state->frequency = params->frequency;
631
632 /* program tuner */
633 if (fe->ops.tuner_ops.set_params)
634 fe->ops.tuner_ops.set_params(fe, params);
635
636 /* program CFOE coefficients */
637 ret = af9013_set_coeff(state, params->u.ofdm.bandwidth);
638 if (ret)
639 goto error;
640
641 /* program frequency control */
642 ret = af9013_set_freq_ctrl(state, params->u.ofdm.bandwidth);
643 if (ret)
644 goto error;
645
646 /* clear TPS lock flag (inverted flag) */
647 ret = af9013_write_reg_bits(state, 0xd330, 3, 1, 1);
648 if (ret)
649 goto error;
650
651 /* clear MPEG2 lock flag */
652 ret = af9013_write_reg_bits(state, 0xd507, 6, 1, 0);
653 if (ret)
654 goto error;
655
656 /* empty channel function */
657 ret = af9013_write_reg_bits(state, 0x9bfe, 0, 1, 0);
658 if (ret)
659 goto error;
660
661 /* empty DVB-T channel function */
662 ret = af9013_write_reg_bits(state, 0x9bc2, 0, 1, 0);
663 if (ret)
664 goto error;
665
666 /* program TPS and bandwidth, check if auto mode needed */
667 ret = af9013_set_ofdm_params(state, &params->u.ofdm, &auto_mode);
668 if (ret)
669 goto error;
670
671 if (auto_mode) {
672 /* clear easy mode flag */
673 ret = af9013_write_reg(state, 0xaefd, 0);
674 deb_info("%s: auto TPS\n", __func__);
675 } else {
676 /* set easy mode flag */
677 ret = af9013_write_reg(state, 0xaefd, 1);
678 if (ret) 827 if (ret)
679 goto error; 828 goto err;
680 ret = af9013_write_reg(state, 0xaefe, 0); 829
681 deb_info("%s: manual TPS\n", __func__); 830 dbg("%s: manual params", __func__);
682 } 831 }
683 if (ret)
684 goto error;
685 832
686 /* everything is set, lets try to receive channel - OFSM GO! */ 833 /* tune */
687 ret = af9013_write_reg(state, 0xffff, 0); 834 ret = af9013_wr_reg(state, 0xffff, 0);
688 if (ret) 835 if (ret)
689 goto error; 836 goto err;
837
838 state->bandwidth_hz = c->bandwidth_hz;
839 state->set_frontend_jiffies = jiffies;
840 state->first_tune = false;
690 841
691error: 842 return ret;
843err:
844 dbg("%s: failed=%d", __func__, ret);
692 return ret; 845 return ret;
693} 846}
694 847
695static int af9013_get_frontend(struct dvb_frontend *fe, 848static int af9013_get_frontend(struct dvb_frontend *fe)
696 struct dvb_frontend_parameters *p)
697{ 849{
850 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
698 struct af9013_state *state = fe->demodulator_priv; 851 struct af9013_state *state = fe->demodulator_priv;
699 int ret; 852 int ret;
700 u8 i, buf[3]; 853 u8 buf[3];
701 deb_info("%s\n", __func__);
702 854
703 /* read TPS registers */ 855 dbg("%s", __func__);
704 for (i = 0; i < 3; i++) { 856
705 ret = af9013_read_reg(state, 0xd3c0 + i, &buf[i]); 857 ret = af9013_rd_regs(state, 0xd3c0, buf, 3);
706 if (ret) 858 if (ret)
707 goto error; 859 goto err;
708 }
709 860
710 switch ((buf[1] >> 6) & 3) { 861 switch ((buf[1] >> 6) & 3) {
711 case 0: 862 case 0:
712 p->u.ofdm.constellation = QPSK; 863 c->modulation = QPSK;
713 break; 864 break;
714 case 1: 865 case 1:
715 p->u.ofdm.constellation = QAM_16; 866 c->modulation = QAM_16;
716 break; 867 break;
717 case 2: 868 case 2:
718 p->u.ofdm.constellation = QAM_64; 869 c->modulation = QAM_64;
719 break; 870 break;
720 } 871 }
721 872
722 switch ((buf[0] >> 0) & 3) { 873 switch ((buf[0] >> 0) & 3) {
723 case 0: 874 case 0:
724 p->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; 875 c->transmission_mode = TRANSMISSION_MODE_2K;
725 break; 876 break;
726 case 1: 877 case 1:
727 p->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 878 c->transmission_mode = TRANSMISSION_MODE_8K;
728 } 879 }
729 880
730 switch ((buf[0] >> 2) & 3) { 881 switch ((buf[0] >> 2) & 3) {
731 case 0: 882 case 0:
732 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 883 c->guard_interval = GUARD_INTERVAL_1_32;
733 break; 884 break;
734 case 1: 885 case 1:
735 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; 886 c->guard_interval = GUARD_INTERVAL_1_16;
736 break; 887 break;
737 case 2: 888 case 2:
738 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; 889 c->guard_interval = GUARD_INTERVAL_1_8;
739 break; 890 break;
740 case 3: 891 case 3:
741 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; 892 c->guard_interval = GUARD_INTERVAL_1_4;
742 break; 893 break;
743 } 894 }
744 895
745 switch ((buf[0] >> 4) & 7) { 896 switch ((buf[0] >> 4) & 7) {
746 case 0: 897 case 0:
747 p->u.ofdm.hierarchy_information = HIERARCHY_NONE; 898 c->hierarchy = HIERARCHY_NONE;
748 break; 899 break;
749 case 1: 900 case 1:
750 p->u.ofdm.hierarchy_information = HIERARCHY_1; 901 c->hierarchy = HIERARCHY_1;
751 break; 902 break;
752 case 2: 903 case 2:
753 p->u.ofdm.hierarchy_information = HIERARCHY_2; 904 c->hierarchy = HIERARCHY_2;
754 break; 905 break;
755 case 3: 906 case 3:
756 p->u.ofdm.hierarchy_information = HIERARCHY_4; 907 c->hierarchy = HIERARCHY_4;
757 break; 908 break;
758 } 909 }
759 910
760 switch ((buf[2] >> 0) & 7) { 911 switch ((buf[2] >> 0) & 7) {
761 case 0: 912 case 0:
762 p->u.ofdm.code_rate_HP = FEC_1_2; 913 c->code_rate_HP = FEC_1_2;
763 break; 914 break;
764 case 1: 915 case 1:
765 p->u.ofdm.code_rate_HP = FEC_2_3; 916 c->code_rate_HP = FEC_2_3;
766 break; 917 break;
767 case 2: 918 case 2:
768 p->u.ofdm.code_rate_HP = FEC_3_4; 919 c->code_rate_HP = FEC_3_4;
769 break; 920 break;
770 case 3: 921 case 3:
771 p->u.ofdm.code_rate_HP = FEC_5_6; 922 c->code_rate_HP = FEC_5_6;
772 break; 923 break;
773 case 4: 924 case 4:
774 p->u.ofdm.code_rate_HP = FEC_7_8; 925 c->code_rate_HP = FEC_7_8;
775 break; 926 break;
776 } 927 }
777 928
778 switch ((buf[2] >> 3) & 7) { 929 switch ((buf[2] >> 3) & 7) {
779 case 0: 930 case 0:
780 p->u.ofdm.code_rate_LP = FEC_1_2; 931 c->code_rate_LP = FEC_1_2;
781 break; 932 break;
782 case 1: 933 case 1:
783 p->u.ofdm.code_rate_LP = FEC_2_3; 934 c->code_rate_LP = FEC_2_3;
784 break; 935 break;
785 case 2: 936 case 2:
786 p->u.ofdm.code_rate_LP = FEC_3_4; 937 c->code_rate_LP = FEC_3_4;
787 break; 938 break;
788 case 3: 939 case 3:
789 p->u.ofdm.code_rate_LP = FEC_5_6; 940 c->code_rate_LP = FEC_5_6;
790 break; 941 break;
791 case 4: 942 case 4:
792 p->u.ofdm.code_rate_LP = FEC_7_8; 943 c->code_rate_LP = FEC_7_8;
793 break; 944 break;
794 } 945 }
795 946
796 switch ((buf[1] >> 2) & 3) { 947 switch ((buf[1] >> 2) & 3) {
797 case 0: 948 case 0:
798 p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; 949 c->bandwidth_hz = 6000000;
799 break; 950 break;
800 case 1: 951 case 1:
801 p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ; 952 c->bandwidth_hz = 7000000;
802 break; 953 break;
803 case 2: 954 case 2:
804 p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 955 c->bandwidth_hz = 8000000;
805 break; 956 break;
806 } 957 }
807 958
808 p->inversion = INVERSION_AUTO;
809 p->frequency = state->frequency;
810
811error:
812 return ret; 959 return ret;
813} 960err:
814 961 dbg("%s: failed=%d", __func__, ret);
815static int af9013_update_ber_unc(struct dvb_frontend *fe)
816{
817 struct af9013_state *state = fe->demodulator_priv;
818 int ret;
819 u8 buf[3], i;
820 u32 error_bit_count = 0;
821 u32 total_bit_count = 0;
822 u32 abort_packet_count = 0;
823
824 state->ber = 0;
825
826 /* check if error bit count is ready */
827 ret = af9013_read_reg_bits(state, 0xd391, 4, 1, &buf[0]);
828 if (ret)
829 goto error;
830 if (!buf[0])
831 goto exit;
832
833 /* get RSD packet abort count */
834 for (i = 0; i < 2; i++) {
835 ret = af9013_read_reg(state, 0xd38a + i, &buf[i]);
836 if (ret)
837 goto error;
838 }
839 abort_packet_count = (buf[1] << 8) + buf[0];
840
841 /* get error bit count */
842 for (i = 0; i < 3; i++) {
843 ret = af9013_read_reg(state, 0xd387 + i, &buf[i]);
844 if (ret)
845 goto error;
846 }
847 error_bit_count = (buf[2] << 16) + (buf[1] << 8) + buf[0];
848 error_bit_count = error_bit_count - abort_packet_count * 8 * 8;
849
850 /* get used RSD counting period (10000 RSD packets used) */
851 for (i = 0; i < 2; i++) {
852 ret = af9013_read_reg(state, 0xd385 + i, &buf[i]);
853 if (ret)
854 goto error;
855 }
856 total_bit_count = (buf[1] << 8) + buf[0];
857 total_bit_count = total_bit_count - abort_packet_count;
858 total_bit_count = total_bit_count * 204 * 8;
859
860 if (total_bit_count)
861 state->ber = error_bit_count * 1000000000 / total_bit_count;
862
863 state->ucblocks += abort_packet_count;
864
865 deb_info("%s: err bits:%d total bits:%d abort count:%d\n", __func__,
866 error_bit_count, total_bit_count, abort_packet_count);
867
868 /* set BER counting range */
869 ret = af9013_write_reg(state, 0xd385, 10000 & 0xff);
870 if (ret)
871 goto error;
872 ret = af9013_write_reg(state, 0xd386, 10000 >> 8);
873 if (ret)
874 goto error;
875 /* reset and start BER counter */
876 ret = af9013_write_reg_bits(state, 0xd391, 4, 1, 1);
877 if (ret)
878 goto error;
879
880exit:
881error:
882 return ret; 962 return ret;
883} 963}
884 964
885static int af9013_update_snr(struct dvb_frontend *fe) 965static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
886{ 966{
887 struct af9013_state *state = fe->demodulator_priv; 967 struct af9013_state *state = fe->demodulator_priv;
888 int ret; 968 int ret;
889 u8 buf[3], i, len; 969 u8 tmp;
890 u32 quant = 0;
891 struct snr_table *uninitialized_var(snr_table);
892
893 /* check if quantizer ready (for snr) */
894 ret = af9013_read_reg_bits(state, 0xd2e1, 3, 1, &buf[0]);
895 if (ret)
896 goto error;
897 if (buf[0]) {
898 /* quantizer ready - read it */
899 for (i = 0; i < 3; i++) {
900 ret = af9013_read_reg(state, 0xd2e3 + i, &buf[i]);
901 if (ret)
902 goto error;
903 }
904 quant = (buf[2] << 16) + (buf[1] << 8) + buf[0];
905
906 /* read current constellation */
907 ret = af9013_read_reg(state, 0xd3c1, &buf[0]);
908 if (ret)
909 goto error;
910
911 switch ((buf[0] >> 6) & 3) {
912 case 0:
913 len = ARRAY_SIZE(qpsk_snr_table);
914 snr_table = qpsk_snr_table;
915 break;
916 case 1:
917 len = ARRAY_SIZE(qam16_snr_table);
918 snr_table = qam16_snr_table;
919 break;
920 case 2:
921 len = ARRAY_SIZE(qam64_snr_table);
922 snr_table = qam64_snr_table;
923 break;
924 default:
925 len = 0;
926 break;
927 }
928
929 if (len) {
930 for (i = 0; i < len; i++) {
931 if (quant < snr_table[i].val) {
932 state->snr = snr_table[i].snr * 10;
933 break;
934 }
935 }
936 }
937
938 /* set quantizer super frame count */
939 ret = af9013_write_reg(state, 0xd2e2, 1);
940 if (ret)
941 goto error;
942
943 /* check quantizer availability */
944 for (i = 0; i < 10; i++) {
945 msleep(10);
946 ret = af9013_read_reg_bits(state, 0xd2e6, 0, 1,
947 &buf[0]);
948 if (ret)
949 goto error;
950 if (!buf[0])
951 break;
952 }
953
954 /* reset quantizer */
955 ret = af9013_write_reg_bits(state, 0xd2e1, 3, 1, 1);
956 if (ret)
957 goto error;
958 }
959
960error:
961 return ret;
962}
963
964static int af9013_update_signal_strength(struct dvb_frontend *fe)
965{
966 struct af9013_state *state = fe->demodulator_priv;
967 int ret = 0;
968 u8 rf_gain, if_gain;
969 int signal_strength;
970
971 deb_info("%s\n", __func__);
972 970
973 if (state->signal_strength_en) { 971 /*
974 ret = af9013_read_reg(state, 0xd07c, &rf_gain); 972 * Return status from the cache if it is younger than 2000ms with the
975 if (ret) 973 * exception of last tune is done during 4000ms.
976 goto error; 974 */
977 ret = af9013_read_reg(state, 0xd07d, &if_gain); 975 if (time_is_after_jiffies(
978 if (ret) 976 state->read_status_jiffies + msecs_to_jiffies(2000)) &&
979 goto error; 977 time_is_before_jiffies(
980 signal_strength = (0xffff / \ 978 state->set_frontend_jiffies + msecs_to_jiffies(4000))
981 (9 * (state->rf_50 + state->if_50) - \ 979 ) {
982 11 * (state->rf_80 + state->if_80))) * \ 980 *status = state->fe_status;
983 (10 * (rf_gain + if_gain) - \ 981 return 0;
984 11 * (state->rf_80 + state->if_80));
985 if (signal_strength < 0)
986 signal_strength = 0;
987 else if (signal_strength > 0xffff)
988 signal_strength = 0xffff;
989
990 state->signal_strength = signal_strength;
991 } else { 982 } else {
992 state->signal_strength = 0; 983 *status = 0;
993 } 984 }
994 985
995error:
996 return ret;
997}
998
999static int af9013_update_statistics(struct dvb_frontend *fe)
1000{
1001 struct af9013_state *state = fe->demodulator_priv;
1002 int ret;
1003
1004 if (time_before(jiffies, state->next_statistics_check))
1005 return 0;
1006
1007 /* set minimum statistic update interval */
1008 state->next_statistics_check = jiffies + msecs_to_jiffies(1200);
1009
1010 ret = af9013_update_signal_strength(fe);
1011 if (ret)
1012 goto error;
1013 ret = af9013_update_snr(fe);
1014 if (ret)
1015 goto error;
1016 ret = af9013_update_ber_unc(fe);
1017 if (ret)
1018 goto error;
1019
1020error:
1021 return ret;
1022}
1023
1024static int af9013_get_tune_settings(struct dvb_frontend *fe,
1025 struct dvb_frontend_tune_settings *fesettings)
1026{
1027 fesettings->min_delay_ms = 800;
1028 fesettings->step_size = 0;
1029 fesettings->max_drift = 0;
1030
1031 return 0;
1032}
1033
1034static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
1035{
1036 struct af9013_state *state = fe->demodulator_priv;
1037 int ret = 0;
1038 u8 tmp;
1039 *status = 0;
1040
1041 /* MPEG2 lock */ 986 /* MPEG2 lock */
1042 ret = af9013_read_reg_bits(state, 0xd507, 6, 1, &tmp); 987 ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp);
1043 if (ret) 988 if (ret)
1044 goto error; 989 goto err;
990
1045 if (tmp) 991 if (tmp)
1046 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | 992 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
1047 FE_HAS_SYNC | FE_HAS_LOCK; 993 FE_HAS_SYNC | FE_HAS_LOCK;
1048 994
1049 if (!*status) { 995 if (!*status) {
1050 /* TPS lock */ 996 /* TPS lock */
1051 ret = af9013_read_reg_bits(state, 0xd330, 3, 1, &tmp); 997 ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp);
1052 if (ret) 998 if (ret)
1053 goto error; 999 goto err;
1000
1054 if (tmp) 1001 if (tmp)
1055 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | 1002 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
1056 FE_HAS_VITERBI; 1003 FE_HAS_VITERBI;
1057 } 1004 }
1058 1005
1059 if (!*status) { 1006 state->fe_status = *status;
1060 /* CFO lock */ 1007 state->read_status_jiffies = jiffies;
1061 ret = af9013_read_reg_bits(state, 0xd333, 7, 1, &tmp);
1062 if (ret)
1063 goto error;
1064 if (tmp)
1065 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
1066 }
1067
1068 if (!*status) {
1069 /* SFOE lock */
1070 ret = af9013_read_reg_bits(state, 0xd334, 6, 1, &tmp);
1071 if (ret)
1072 goto error;
1073 if (tmp)
1074 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
1075 }
1076 1008
1077 if (!*status) { 1009 return ret;
1078 /* AGC lock */ 1010err:
1079 ret = af9013_read_reg_bits(state, 0xd1a0, 6, 1, &tmp); 1011 dbg("%s: failed=%d", __func__, ret);
1080 if (ret)
1081 goto error;
1082 if (tmp)
1083 *status |= FE_HAS_SIGNAL;
1084 }
1085
1086 ret = af9013_update_statistics(fe);
1087
1088error:
1089 return ret; 1012 return ret;
1090} 1013}
1091 1014
1092 1015static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
1093static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
1094{ 1016{
1095 struct af9013_state *state = fe->demodulator_priv; 1017 struct af9013_state *state = fe->demodulator_priv;
1096 int ret; 1018 *snr = state->snr;
1097 ret = af9013_update_statistics(fe); 1019 return 0;
1098 *ber = state->ber;
1099 return ret;
1100} 1020}
1101 1021
1102static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 1022static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1103{ 1023{
1104 struct af9013_state *state = fe->demodulator_priv; 1024 struct af9013_state *state = fe->demodulator_priv;
1105 int ret;
1106 ret = af9013_update_statistics(fe);
1107 *strength = state->signal_strength; 1025 *strength = state->signal_strength;
1108 return ret; 1026 return 0;
1109} 1027}
1110 1028
1111static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr) 1029static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
1112{ 1030{
1113 struct af9013_state *state = fe->demodulator_priv; 1031 struct af9013_state *state = fe->demodulator_priv;
1114 int ret; 1032 *ber = state->ber;
1115 ret = af9013_update_statistics(fe); 1033 return 0;
1116 *snr = state->snr;
1117 return ret;
1118} 1034}
1119 1035
1120static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 1036static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1121{ 1037{
1122 struct af9013_state *state = fe->demodulator_priv; 1038 struct af9013_state *state = fe->demodulator_priv;
1123 int ret;
1124 ret = af9013_update_statistics(fe);
1125 *ucblocks = state->ucblocks; 1039 *ucblocks = state->ucblocks;
1126 return ret; 1040 return 0;
1127}
1128
1129static int af9013_sleep(struct dvb_frontend *fe)
1130{
1131 struct af9013_state *state = fe->demodulator_priv;
1132 int ret;
1133 deb_info("%s\n", __func__);
1134
1135 ret = af9013_lock_led(state, 0);
1136 if (ret)
1137 goto error;
1138
1139 ret = af9013_power_ctrl(state, 0);
1140error:
1141 return ret;
1142} 1041}
1143 1042
1144static int af9013_init(struct dvb_frontend *fe) 1043static int af9013_init(struct dvb_frontend *fe)
1145{ 1044{
1146 struct af9013_state *state = fe->demodulator_priv; 1045 struct af9013_state *state = fe->demodulator_priv;
1147 int ret, i, len; 1046 int ret, i, len;
1148 u8 tmp0, tmp1; 1047 u8 buf[3], tmp;
1149 struct regdesc *init; 1048 u32 adc_cw;
1150 deb_info("%s\n", __func__); 1049 const struct af9013_reg_bit *init;
1151 1050
1152 /* reset OFDM */ 1051 dbg("%s", __func__);
1153 ret = af9013_reset(state, 0);
1154 if (ret)
1155 goto error;
1156 1052
1157 /* power on */ 1053 /* power on */
1158 ret = af9013_power_ctrl(state, 1); 1054 ret = af9013_power_ctrl(state, 1);
1159 if (ret) 1055 if (ret)
1160 goto error; 1056 goto err;
1161 1057
1162 /* enable ADC */ 1058 /* enable ADC */
1163 ret = af9013_write_reg(state, 0xd73a, 0xa4); 1059 ret = af9013_wr_reg(state, 0xd73a, 0xa4);
1164 if (ret) 1060 if (ret)
1165 goto error; 1061 goto err;
1166 1062
1167 /* write API version to firmware */ 1063 /* write API version to firmware */
1168 for (i = 0; i < sizeof(state->config.api_version); i++) { 1064 ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4);
1169 ret = af9013_write_reg(state, 0x9bf2 + i, 1065 if (ret)
1170 state->config.api_version[i]); 1066 goto err;
1171 if (ret)
1172 goto error;
1173 }
1174 1067
1175 /* program ADC control */ 1068 /* program ADC control */
1176 ret = af9013_set_adc_ctrl(state); 1069 switch (state->config.clock) {
1070 case 28800000: /* 28.800 MHz */
1071 tmp = 0;
1072 break;
1073 case 20480000: /* 20.480 MHz */
1074 tmp = 1;
1075 break;
1076 case 28000000: /* 28.000 MHz */
1077 tmp = 2;
1078 break;
1079 case 25000000: /* 25.000 MHz */
1080 tmp = 3;
1081 break;
1082 default:
1083 err("invalid clock");
1084 return -EINVAL;
1085 }
1086
1087 adc_cw = af913_div(state->config.clock, 1000000ul, 19);
1088 buf[0] = (adc_cw >> 0) & 0xff;
1089 buf[1] = (adc_cw >> 8) & 0xff;
1090 buf[2] = (adc_cw >> 16) & 0xff;
1091
1092 ret = af9013_wr_regs(state, 0xd180, buf, 3);
1093 if (ret)
1094 goto err;
1095
1096 ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp);
1177 if (ret) 1097 if (ret)
1178 goto error; 1098 goto err;
1179 1099
1180 /* set I2C master clock */ 1100 /* set I2C master clock */
1181 ret = af9013_write_reg(state, 0xd416, 0x14); 1101 ret = af9013_wr_reg(state, 0xd416, 0x14);
1182 if (ret) 1102 if (ret)
1183 goto error; 1103 goto err;
1184 1104
1185 /* set 16 embx */ 1105 /* set 16 embx */
1186 ret = af9013_write_reg_bits(state, 0xd700, 1, 1, 1); 1106 ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1);
1187 if (ret) 1107 if (ret)
1188 goto error; 1108 goto err;
1189 1109
1190 /* set no trigger */ 1110 /* set no trigger */
1191 ret = af9013_write_reg_bits(state, 0xd700, 2, 1, 0); 1111 ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0);
1192 if (ret) 1112 if (ret)
1193 goto error; 1113 goto err;
1194 1114
1195 /* set read-update bit for constellation */ 1115 /* set read-update bit for constellation */
1196 ret = af9013_write_reg_bits(state, 0xd371, 1, 1, 1); 1116 ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1);
1197 if (ret) 1117 if (ret)
1198 goto error; 1118 goto err;
1199 1119
1200 /* enable FEC monitor */ 1120 /* settings for mp2if */
1201 ret = af9013_write_reg_bits(state, 0xd392, 1, 1, 1); 1121 if (state->config.ts_mode == AF9013_TS_USB) {
1122 /* AF9015 split PSB to 1.5k + 0.5k */
1123 ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1);
1124 if (ret)
1125 goto err;
1126 } else {
1127 /* AF9013 change the output bit to data7 */
1128 ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1);
1129 if (ret)
1130 goto err;
1131
1132 /* AF9013 set mpeg to full speed */
1133 ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1);
1134 if (ret)
1135 goto err;
1136 }
1137
1138 ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1);
1202 if (ret) 1139 if (ret)
1203 goto error; 1140 goto err;
1204 1141
1205 /* load OFSM settings */ 1142 /* load OFSM settings */
1206 deb_info("%s: load ofsm settings\n", __func__); 1143 dbg("%s: load ofsm settings", __func__);
1207 len = ARRAY_SIZE(ofsm_init); 1144 len = ARRAY_SIZE(ofsm_init);
1208 init = ofsm_init; 1145 init = ofsm_init;
1209 for (i = 0; i < len; i++) { 1146 for (i = 0; i < len; i++) {
1210 ret = af9013_write_reg_bits(state, init[i].addr, init[i].pos, 1147 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
1211 init[i].len, init[i].val); 1148 init[i].len, init[i].val);
1212 if (ret) 1149 if (ret)
1213 goto error; 1150 goto err;
1214 } 1151 }
1215 1152
1216 /* load tuner specific settings */ 1153 /* load tuner specific settings */
1217 deb_info("%s: load tuner specific settings\n", __func__); 1154 dbg("%s: load tuner specific settings", __func__);
1218 switch (state->config.tuner) { 1155 switch (state->config.tuner) {
1219 case AF9013_TUNER_MXL5003D: 1156 case AF9013_TUNER_MXL5003D:
1220 len = ARRAY_SIZE(tuner_init_mxl5003d); 1157 len = ARRAY_SIZE(tuner_init_mxl5003d);
@@ -1260,65 +1197,133 @@ static int af9013_init(struct dvb_frontend *fe)
1260 } 1197 }
1261 1198
1262 for (i = 0; i < len; i++) { 1199 for (i = 0; i < len; i++) {
1263 ret = af9013_write_reg_bits(state, init[i].addr, init[i].pos, 1200 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
1264 init[i].len, init[i].val); 1201 init[i].len, init[i].val);
1265 if (ret) 1202 if (ret)
1266 goto error; 1203 goto err;
1267 } 1204 }
1268 1205
1269 /* set TS mode */ 1206 /* TS mode */
1270 deb_info("%s: setting ts mode\n", __func__); 1207 ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode);
1271 tmp0 = 0; /* parallel mode */
1272 tmp1 = 0; /* serial mode */
1273 switch (state->config.output_mode) {
1274 case AF9013_OUTPUT_MODE_PARALLEL:
1275 tmp0 = 1;
1276 break;
1277 case AF9013_OUTPUT_MODE_SERIAL:
1278 tmp1 = 1;
1279 break;
1280 case AF9013_OUTPUT_MODE_USB:
1281 /* usb mode for AF9015 */
1282 default:
1283 break;
1284 }
1285 ret = af9013_write_reg_bits(state, 0xd500, 1, 1, tmp0); /* parallel */
1286 if (ret) 1208 if (ret)
1287 goto error; 1209 goto err;
1288 ret = af9013_write_reg_bits(state, 0xd500, 2, 1, tmp1); /* serial */
1289 if (ret)
1290 goto error;
1291 1210
1292 /* enable lock led */ 1211 /* enable lock led */
1293 ret = af9013_lock_led(state, 1); 1212 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1);
1294 if (ret) 1213 if (ret)
1295 goto error; 1214 goto err;
1296 1215
1297 /* read values needed for signal strength calculation */ 1216 /* check if we support signal strength */
1298 ret = af9013_read_reg_bits(state, 0x9bee, 0, 1, 1217 if (!state->signal_strength_en) {
1299 &state->signal_strength_en); 1218 ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1,
1300 if (ret) 1219 &state->signal_strength_en);
1301 goto error; 1220 if (ret)
1221 goto err;
1222 }
1302 1223
1303 if (state->signal_strength_en) { 1224 /* read values needed for signal strength calculation */
1304 ret = af9013_read_reg(state, 0x9bbd, &state->rf_50); 1225 if (state->signal_strength_en && !state->rf_50) {
1226 ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50);
1305 if (ret) 1227 if (ret)
1306 goto error; 1228 goto err;
1307 ret = af9013_read_reg(state, 0x9bd0, &state->rf_80); 1229
1230 ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80);
1308 if (ret) 1231 if (ret)
1309 goto error; 1232 goto err;
1310 ret = af9013_read_reg(state, 0x9be2, &state->if_50); 1233
1234 ret = af9013_rd_reg(state, 0x9be2, &state->if_50);
1311 if (ret) 1235 if (ret)
1312 goto error; 1236 goto err;
1313 ret = af9013_read_reg(state, 0x9be4, &state->if_80); 1237
1238 ret = af9013_rd_reg(state, 0x9be4, &state->if_80);
1314 if (ret) 1239 if (ret)
1315 goto error; 1240 goto err;
1316 } 1241 }
1317 1242
1318error: 1243 /* SNR */
1244 ret = af9013_wr_reg(state, 0xd2e2, 1);
1245 if (ret)
1246 goto err;
1247
1248 /* BER / UCB */
1249 buf[0] = (10000 >> 0) & 0xff;
1250 buf[1] = (10000 >> 8) & 0xff;
1251 ret = af9013_wr_regs(state, 0xd385, buf, 2);
1252 if (ret)
1253 goto err;
1254
1255 /* enable FEC monitor */
1256 ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1);
1257 if (ret)
1258 goto err;
1259
1260 state->first_tune = true;
1261 schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400));
1262
1263 return ret;
1264err:
1265 dbg("%s: failed=%d", __func__, ret);
1319 return ret; 1266 return ret;
1320} 1267}
1321 1268
1269static int af9013_sleep(struct dvb_frontend *fe)
1270{
1271 struct af9013_state *state = fe->demodulator_priv;
1272 int ret;
1273
1274 dbg("%s", __func__);
1275
1276 /* stop statistics polling */
1277 cancel_delayed_work_sync(&state->statistics_work);
1278
1279 /* disable lock led */
1280 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0);
1281 if (ret)
1282 goto err;
1283
1284 /* power off */
1285 ret = af9013_power_ctrl(state, 0);
1286 if (ret)
1287 goto err;
1288
1289 return ret;
1290err:
1291 dbg("%s: failed=%d", __func__, ret);
1292 return ret;
1293}
1294
1295static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1296{
1297 int ret;
1298 struct af9013_state *state = fe->demodulator_priv;
1299
1300 dbg("%s: enable=%d", __func__, enable);
1301
1302 /* gate already open or close */
1303 if (state->i2c_gate_state == enable)
1304 return 0;
1305
1306 if (state->config.ts_mode == AF9013_TS_USB)
1307 ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable);
1308 else
1309 ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable);
1310 if (ret)
1311 goto err;
1312
1313 state->i2c_gate_state = enable;
1314
1315 return ret;
1316err:
1317 dbg("%s: failed=%d", __func__, ret);
1318 return ret;
1319}
1320
1321static void af9013_release(struct dvb_frontend *fe)
1322{
1323 struct af9013_state *state = fe->demodulator_priv;
1324 kfree(state);
1325}
1326
1322static struct dvb_frontend_ops af9013_ops; 1327static struct dvb_frontend_ops af9013_ops;
1323 1328
1324static int af9013_download_firmware(struct af9013_state *state) 1329static int af9013_download_firmware(struct af9013_state *state)
@@ -1332,11 +1337,11 @@ static int af9013_download_firmware(struct af9013_state *state)
1332 1337
1333 msleep(100); 1338 msleep(100);
1334 /* check whether firmware is already running */ 1339 /* check whether firmware is already running */
1335 ret = af9013_read_reg(state, 0x98be, &val); 1340 ret = af9013_rd_reg(state, 0x98be, &val);
1336 if (ret) 1341 if (ret)
1337 goto error; 1342 goto err;
1338 else 1343 else
1339 deb_info("%s: firmware status:%02x\n", __func__, val); 1344 dbg("%s: firmware status=%02x", __func__, val);
1340 1345
1341 if (val == 0x0c) /* fw is running, no need for download */ 1346 if (val == 0x0c) /* fw is running, no need for download */
1342 goto exit; 1347 goto exit;
@@ -1351,7 +1356,7 @@ static int af9013_download_firmware(struct af9013_state *state)
1351 "Please see linux/Documentation/dvb/ for more details" \ 1356 "Please see linux/Documentation/dvb/ for more details" \
1352 " on firmware-problems. (%d)", 1357 " on firmware-problems. (%d)",
1353 fw_file, ret); 1358 fw_file, ret);
1354 goto error; 1359 goto err;
1355 } 1360 }
1356 1361
1357 info("downloading firmware from file '%s'", fw_file); 1362 info("downloading firmware from file '%s'", fw_file);
@@ -1369,7 +1374,7 @@ static int af9013_download_firmware(struct af9013_state *state)
1369 ret = af9013_write_ofsm_regs(state, 0x50fc, 1374 ret = af9013_write_ofsm_regs(state, 0x50fc,
1370 fw_params, sizeof(fw_params)); 1375 fw_params, sizeof(fw_params));
1371 if (ret) 1376 if (ret)
1372 goto error_release; 1377 goto err_release;
1373 1378
1374 #define FW_ADDR 0x5100 /* firmware start address */ 1379 #define FW_ADDR 0x5100 /* firmware start address */
1375 #define LEN_MAX 16 /* max packet size */ 1380 #define LEN_MAX 16 /* max packet size */
@@ -1383,24 +1388,24 @@ static int af9013_download_firmware(struct af9013_state *state)
1383 (u8 *) &fw->data[fw->size - remaining], len); 1388 (u8 *) &fw->data[fw->size - remaining], len);
1384 if (ret) { 1389 if (ret) {
1385 err("firmware download failed:%d", ret); 1390 err("firmware download failed:%d", ret);
1386 goto error_release; 1391 goto err_release;
1387 } 1392 }
1388 } 1393 }
1389 1394
1390 /* request boot firmware */ 1395 /* request boot firmware */
1391 ret = af9013_write_reg(state, 0xe205, 1); 1396 ret = af9013_wr_reg(state, 0xe205, 1);
1392 if (ret) 1397 if (ret)
1393 goto error_release; 1398 goto err_release;
1394 1399
1395 for (i = 0; i < 15; i++) { 1400 for (i = 0; i < 15; i++) {
1396 msleep(100); 1401 msleep(100);
1397 1402
1398 /* check firmware status */ 1403 /* check firmware status */
1399 ret = af9013_read_reg(state, 0x98be, &val); 1404 ret = af9013_rd_reg(state, 0x98be, &val);
1400 if (ret) 1405 if (ret)
1401 goto error_release; 1406 goto err_release;
1402 1407
1403 deb_info("%s: firmware status:%02x\n", __func__, val); 1408 dbg("%s: firmware status=%02x", __func__, val);
1404 1409
1405 if (val == 0x0c || val == 0x04) /* success or fail */ 1410 if (val == 0x0c || val == 0x04) /* success or fail */
1406 break; 1411 break;
@@ -1408,43 +1413,21 @@ static int af9013_download_firmware(struct af9013_state *state)
1408 1413
1409 if (val == 0x04) { 1414 if (val == 0x04) {
1410 err("firmware did not run"); 1415 err("firmware did not run");
1411 ret = -1; 1416 ret = -ENODEV;
1412 } else if (val != 0x0c) { 1417 } else if (val != 0x0c) {
1413 err("firmware boot timeout"); 1418 err("firmware boot timeout");
1414 ret = -1; 1419 ret = -ENODEV;
1415 } 1420 }
1416 1421
1417error_release: 1422err_release:
1418 release_firmware(fw); 1423 release_firmware(fw);
1419error: 1424err:
1420exit: 1425exit:
1421 if (!ret) 1426 if (!ret)
1422 info("found a '%s' in warm state.", af9013_ops.info.name); 1427 info("found a '%s' in warm state.", af9013_ops.info.name);
1423 return ret; 1428 return ret;
1424} 1429}
1425 1430
1426static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1427{
1428 int ret;
1429 struct af9013_state *state = fe->demodulator_priv;
1430 deb_info("%s: enable:%d\n", __func__, enable);
1431
1432 if (state->config.output_mode == AF9013_OUTPUT_MODE_USB)
1433 ret = af9013_write_reg_bits(state, 0xd417, 3, 1, enable);
1434 else
1435 ret = af9013_write_reg_bits(state, 0xd607, 2, 1, enable);
1436
1437 return ret;
1438}
1439
1440static void af9013_release(struct dvb_frontend *fe)
1441{
1442 struct af9013_state *state = fe->demodulator_priv;
1443 kfree(state);
1444}
1445
1446static struct dvb_frontend_ops af9013_ops;
1447
1448struct dvb_frontend *af9013_attach(const struct af9013_config *config, 1431struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1449 struct i2c_adapter *i2c) 1432 struct i2c_adapter *i2c)
1450{ 1433{
@@ -1455,91 +1438,65 @@ struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1455 /* allocate memory for the internal state */ 1438 /* allocate memory for the internal state */
1456 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL); 1439 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
1457 if (state == NULL) 1440 if (state == NULL)
1458 goto error; 1441 goto err;
1459 1442
1460 /* setup the state */ 1443 /* setup the state */
1461 state->i2c = i2c; 1444 state->i2c = i2c;
1462 memcpy(&state->config, config, sizeof(struct af9013_config)); 1445 memcpy(&state->config, config, sizeof(struct af9013_config));
1463 1446
1464 /* download firmware */ 1447 /* download firmware */
1465 if (state->config.output_mode != AF9013_OUTPUT_MODE_USB) { 1448 if (state->config.ts_mode != AF9013_TS_USB) {
1466 ret = af9013_download_firmware(state); 1449 ret = af9013_download_firmware(state);
1467 if (ret) 1450 if (ret)
1468 goto error; 1451 goto err;
1469 } 1452 }
1470 1453
1471 /* firmware version */ 1454 /* firmware version */
1472 for (i = 0; i < 4; i++) { 1455 ret = af9013_rd_regs(state, 0x5103, buf, 4);
1473 ret = af9013_read_reg(state, 0x5103 + i, &buf[i]);
1474 if (ret)
1475 goto error;
1476 }
1477 info("firmware version:%d.%d.%d.%d", buf[0], buf[1], buf[2], buf[3]);
1478
1479 /* chip version */
1480 ret = af9013_read_reg_bits(state, 0xd733, 4, 4, &buf[2]);
1481 if (ret) 1456 if (ret)
1482 goto error; 1457 goto err;
1483 1458
1484 /* ROM version */ 1459 info("firmware version %d.%d.%d.%d", buf[0], buf[1], buf[2], buf[3]);
1485 for (i = 0; i < 2; i++) {
1486 ret = af9013_read_reg(state, 0x116b + i, &buf[i]);
1487 if (ret)
1488 goto error;
1489 }
1490 deb_info("%s: chip version:%d ROM version:%d.%d\n", __func__,
1491 buf[2], buf[0], buf[1]);
1492
1493 /* settings for mp2if */
1494 if (state->config.output_mode == AF9013_OUTPUT_MODE_USB) {
1495 /* AF9015 split PSB to 1.5k + 0.5k */
1496 ret = af9013_write_reg_bits(state, 0xd50b, 2, 1, 1);
1497 } else {
1498 /* AF9013 change the output bit to data7 */
1499 ret = af9013_write_reg_bits(state, 0xd500, 3, 1, 1);
1500 if (ret)
1501 goto error;
1502 /* AF9013 set mpeg to full speed */
1503 ret = af9013_write_reg_bits(state, 0xd502, 4, 1, 1);
1504 }
1505 if (ret)
1506 goto error;
1507 ret = af9013_write_reg_bits(state, 0xd520, 4, 1, 1);
1508 if (ret)
1509 goto error;
1510 1460
1511 /* set GPIOs */ 1461 /* set GPIOs */
1512 for (i = 0; i < sizeof(state->config.gpio); i++) { 1462 for (i = 0; i < sizeof(state->config.gpio); i++) {
1513 ret = af9013_set_gpio(state, i, state->config.gpio[i]); 1463 ret = af9013_set_gpio(state, i, state->config.gpio[i]);
1514 if (ret) 1464 if (ret)
1515 goto error; 1465 goto err;
1516 } 1466 }
1517 1467
1518 /* create dvb_frontend */ 1468 /* create dvb_frontend */
1519 memcpy(&state->frontend.ops, &af9013_ops, 1469 memcpy(&state->fe.ops, &af9013_ops,
1520 sizeof(struct dvb_frontend_ops)); 1470 sizeof(struct dvb_frontend_ops));
1521 state->frontend.demodulator_priv = state; 1471 state->fe.demodulator_priv = state;
1472
1473 INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work);
1522 1474
1523 return &state->frontend; 1475 return &state->fe;
1524error: 1476err:
1525 kfree(state); 1477 kfree(state);
1526 return NULL; 1478 return NULL;
1527} 1479}
1528EXPORT_SYMBOL(af9013_attach); 1480EXPORT_SYMBOL(af9013_attach);
1529 1481
1530static struct dvb_frontend_ops af9013_ops = { 1482static struct dvb_frontend_ops af9013_ops = {
1483 .delsys = { SYS_DVBT },
1531 .info = { 1484 .info = {
1532 .name = "Afatech AF9013 DVB-T", 1485 .name = "Afatech AF9013",
1533 .type = FE_OFDM,
1534 .frequency_min = 174000000, 1486 .frequency_min = 174000000,
1535 .frequency_max = 862000000, 1487 .frequency_max = 862000000,
1536 .frequency_stepsize = 250000, 1488 .frequency_stepsize = 250000,
1537 .frequency_tolerance = 0, 1489 .frequency_tolerance = 0,
1538 .caps = 1490 .caps = FE_CAN_FEC_1_2 |
1539 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 1491 FE_CAN_FEC_2_3 |
1540 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 1492 FE_CAN_FEC_3_4 |
1541 FE_CAN_QPSK | FE_CAN_QAM_16 | 1493 FE_CAN_FEC_5_6 |
1542 FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | 1494 FE_CAN_FEC_7_8 |
1495 FE_CAN_FEC_AUTO |
1496 FE_CAN_QPSK |
1497 FE_CAN_QAM_16 |
1498 FE_CAN_QAM_64 |
1499 FE_CAN_QAM_AUTO |
1543 FE_CAN_TRANSMISSION_MODE_AUTO | 1500 FE_CAN_TRANSMISSION_MODE_AUTO |
1544 FE_CAN_GUARD_INTERVAL_AUTO | 1501 FE_CAN_GUARD_INTERVAL_AUTO |
1545 FE_CAN_HIERARCHY_AUTO | 1502 FE_CAN_HIERARCHY_AUTO |
@@ -1548,24 +1505,22 @@ static struct dvb_frontend_ops af9013_ops = {
1548 }, 1505 },
1549 1506
1550 .release = af9013_release, 1507 .release = af9013_release,
1508
1551 .init = af9013_init, 1509 .init = af9013_init,
1552 .sleep = af9013_sleep, 1510 .sleep = af9013_sleep,
1553 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1554 1511
1512 .get_tune_settings = af9013_get_tune_settings,
1555 .set_frontend = af9013_set_frontend, 1513 .set_frontend = af9013_set_frontend,
1556 .get_frontend = af9013_get_frontend, 1514 .get_frontend = af9013_get_frontend,
1557 1515
1558 .get_tune_settings = af9013_get_tune_settings,
1559
1560 .read_status = af9013_read_status, 1516 .read_status = af9013_read_status,
1561 .read_ber = af9013_read_ber,
1562 .read_signal_strength = af9013_read_signal_strength,
1563 .read_snr = af9013_read_snr, 1517 .read_snr = af9013_read_snr,
1518 .read_signal_strength = af9013_read_signal_strength,
1519 .read_ber = af9013_read_ber,
1564 .read_ucblocks = af9013_read_ucblocks, 1520 .read_ucblocks = af9013_read_ucblocks,
1565};
1566 1521
1567module_param_named(debug, af9013_debug, int, 0644); 1522 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1568MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 1523};
1569 1524
1570MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 1525MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1571MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver"); 1526MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
diff --git a/drivers/media/dvb/frontends/af9013.h b/drivers/media/dvb/frontends/af9013.h
index e53d873f755..b973fc5a038 100644
--- a/drivers/media/dvb/frontends/af9013.h
+++ b/drivers/media/dvb/frontends/af9013.h
@@ -2,6 +2,7 @@
2 * Afatech AF9013 demodulator driver 2 * Afatech AF9013 demodulator driver
3 * 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
5 * 6 *
6 * Thanks to Afatech who kindly provided information. 7 * Thanks to Afatech who kindly provided information.
7 * 8 *
@@ -21,33 +22,11 @@
21 * 22 *
22 */ 23 */
23 24
24#ifndef _AF9013_H_ 25#ifndef AF9013_H
25#define _AF9013_H_ 26#define AF9013_H
26 27
27#include <linux/dvb/frontend.h> 28#include <linux/dvb/frontend.h>
28 29
29enum af9013_ts_mode {
30 AF9013_OUTPUT_MODE_PARALLEL,
31 AF9013_OUTPUT_MODE_SERIAL,
32 AF9013_OUTPUT_MODE_USB, /* only for AF9015 */
33};
34
35enum af9013_tuner {
36 AF9013_TUNER_MXL5003D = 3, /* MaxLinear */
37 AF9013_TUNER_MXL5005D = 13, /* MaxLinear */
38 AF9013_TUNER_MXL5005R = 30, /* MaxLinear */
39 AF9013_TUNER_ENV77H11D5 = 129, /* Panasonic */
40 AF9013_TUNER_MT2060 = 130, /* Microtune */
41 AF9013_TUNER_MC44S803 = 133, /* Freescale */
42 AF9013_TUNER_QT1010 = 134, /* Quantek */
43 AF9013_TUNER_UNKNOWN = 140, /* for can tuners ? */
44 AF9013_TUNER_MT2060_2 = 147, /* Microtune */
45 AF9013_TUNER_TDA18271 = 156, /* NXP */
46 AF9013_TUNER_QT1010A = 162, /* Quantek */
47 AF9013_TUNER_MXL5007T = 177, /* MaxLinear */
48 AF9013_TUNER_TDA18218 = 179, /* NXP */
49};
50
51/* AF9013/5 GPIOs (mostly guessed) 30/* AF9013/5 GPIOs (mostly guessed)
52 demod#1-gpio#0 - set demod#2 i2c-addr for dual devices 31 demod#1-gpio#0 - set demod#2 i2c-addr for dual devices
53 demod#1-gpio#1 - xtal setting (?) 32 demod#1-gpio#1 - xtal setting (?)
@@ -55,44 +34,74 @@ enum af9013_tuner {
55 demod#2-gpio#0 - tuner#2 34 demod#2-gpio#0 - tuner#2
56 demod#2-gpio#1 - xtal setting (?) 35 demod#2-gpio#1 - xtal setting (?)
57*/ 36*/
37
38struct af9013_config {
39 /*
40 * I2C address
41 */
42 u8 i2c_addr;
43
44 /*
45 * clock
46 * 20480000, 25000000, 28000000, 28800000
47 */
48 u32 clock;
49
50 /*
51 * tuner
52 */
53#define AF9013_TUNER_MXL5003D 3 /* MaxLinear */
54#define AF9013_TUNER_MXL5005D 13 /* MaxLinear */
55#define AF9013_TUNER_MXL5005R 30 /* MaxLinear */
56#define AF9013_TUNER_ENV77H11D5 129 /* Panasonic */
57#define AF9013_TUNER_MT2060 130 /* Microtune */
58#define AF9013_TUNER_MC44S803 133 /* Freescale */
59#define AF9013_TUNER_QT1010 134 /* Quantek */
60#define AF9013_TUNER_UNKNOWN 140 /* for can tuners ? */
61#define AF9013_TUNER_MT2060_2 147 /* Microtune */
62#define AF9013_TUNER_TDA18271 156 /* NXP */
63#define AF9013_TUNER_QT1010A 162 /* Quantek */
64#define AF9013_TUNER_MXL5007T 177 /* MaxLinear */
65#define AF9013_TUNER_TDA18218 179 /* NXP */
66 u8 tuner;
67
68 /*
69 * IF frequency
70 */
71 u32 if_frequency;
72
73 /*
74 * TS settings
75 */
76#define AF9013_TS_USB 0
77#define AF9013_TS_PARALLEL 1
78#define AF9013_TS_SERIAL 2
79 u8 ts_mode:2;
80
81 /*
82 * input spectrum inversion
83 */
84 bool spec_inv;
85
86 /*
87 * firmware API version
88 */
89 u8 api_version[4];
90
91 /*
92 * GPIOs
93 */
58#define AF9013_GPIO_ON (1 << 0) 94#define AF9013_GPIO_ON (1 << 0)
59#define AF9013_GPIO_EN (1 << 1) 95#define AF9013_GPIO_EN (1 << 1)
60#define AF9013_GPIO_O (1 << 2) 96#define AF9013_GPIO_O (1 << 2)
61#define AF9013_GPIO_I (1 << 3) 97#define AF9013_GPIO_I (1 << 3)
62
63#define AF9013_GPIO_LO (AF9013_GPIO_ON|AF9013_GPIO_EN) 98#define AF9013_GPIO_LO (AF9013_GPIO_ON|AF9013_GPIO_EN)
64#define AF9013_GPIO_HI (AF9013_GPIO_ON|AF9013_GPIO_EN|AF9013_GPIO_O) 99#define AF9013_GPIO_HI (AF9013_GPIO_ON|AF9013_GPIO_EN|AF9013_GPIO_O)
65
66#define AF9013_GPIO_TUNER_ON (AF9013_GPIO_ON|AF9013_GPIO_EN) 100#define AF9013_GPIO_TUNER_ON (AF9013_GPIO_ON|AF9013_GPIO_EN)
67#define AF9013_GPIO_TUNER_OFF (AF9013_GPIO_ON|AF9013_GPIO_EN|AF9013_GPIO_O) 101#define AF9013_GPIO_TUNER_OFF (AF9013_GPIO_ON|AF9013_GPIO_EN|AF9013_GPIO_O)
68
69struct af9013_config {
70 /* demodulator's I2C address */
71 u8 demod_address;
72
73 /* frequencies in kHz */
74 u32 adc_clock;
75
76 /* tuner ID */
77 u8 tuner;
78
79 /* tuner IF */
80 u16 tuner_if;
81
82 /* TS data output mode */
83 u8 output_mode:2;
84
85 /* RF spectrum inversion */
86 u8 rf_spec_inv:1;
87
88 /* API version */
89 u8 api_version[4];
90
91 /* GPIOs */
92 u8 gpio[4]; 102 u8 gpio[4];
93}; 103};
94 104
95
96#if defined(CONFIG_DVB_AF9013) || \ 105#if defined(CONFIG_DVB_AF9013) || \
97 (defined(CONFIG_DVB_AF9013_MODULE) && defined(MODULE)) 106 (defined(CONFIG_DVB_AF9013_MODULE) && defined(MODULE))
98extern struct dvb_frontend *af9013_attach(const struct af9013_config *config, 107extern struct dvb_frontend *af9013_attach(const struct af9013_config *config,
@@ -106,4 +115,4 @@ const struct af9013_config *config, struct i2c_adapter *i2c)
106} 115}
107#endif /* CONFIG_DVB_AF9013 */ 116#endif /* CONFIG_DVB_AF9013 */
108 117
109#endif /* _AF9013_H_ */ 118#endif /* AF9013_H */
diff --git a/drivers/media/dvb/frontends/af9013_priv.h b/drivers/media/dvb/frontends/af9013_priv.h
index e00b2a4a2db..fa848af6e9b 100644
--- a/drivers/media/dvb/frontends/af9013_priv.h
+++ b/drivers/media/dvb/frontends/af9013_priv.h
@@ -2,6 +2,7 @@
2 * Afatech AF9013 demodulator driver 2 * Afatech AF9013 demodulator driver
3 * 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
5 * 6 *
6 * Thanks to Afatech who kindly provided information. 7 * Thanks to Afatech who kindly provided information.
7 * 8 *
@@ -21,24 +22,19 @@
21 * 22 *
22 */ 23 */
23 24
24#ifndef _AF9013_PRIV_ 25#ifndef AF9013_PRIV_H
25#define _AF9013_PRIV_ 26#define AF9013_PRIV_H
26 27
27#define LOG_PREFIX "af9013" 28#include "dvb_frontend.h"
28extern int af9013_debug; 29#include "af9013.h"
29 30#include <linux/firmware.h>
30#define dprintk(var, level, args...) \
31 do { if ((var & level)) printk(args); } while (0)
32 31
33#define debug_dump(b, l, func) {\ 32#define LOG_PREFIX "af9013"
34 int loop_; \
35 for (loop_ = 0; loop_ < l; loop_++) \
36 func("%02x ", b[loop_]); \
37 func("\n");\
38}
39
40#define deb_info(args...) dprintk(af9013_debug, 0x01, args)
41 33
34#undef dbg
35#define dbg(f, arg...) \
36 if (af9013_debug) \
37 printk(KERN_INFO LOG_PREFIX": " f "\n" , ## arg)
42#undef err 38#undef err
43#define err(f, arg...) printk(KERN_ERR LOG_PREFIX": " f "\n" , ## arg) 39#define err(f, arg...) printk(KERN_ERR LOG_PREFIX": " f "\n" , ## arg)
44#undef info 40#undef info
@@ -48,70 +44,71 @@ extern int af9013_debug;
48 44
49#define AF9013_DEFAULT_FIRMWARE "dvb-fe-af9013.fw" 45#define AF9013_DEFAULT_FIRMWARE "dvb-fe-af9013.fw"
50 46
51struct regdesc { 47struct af9013_reg_bit {
52 u16 addr; 48 u16 addr;
53 u8 pos:4; 49 u8 pos:4;
54 u8 len:4; 50 u8 len:4;
55 u8 val; 51 u8 val;
56}; 52};
57 53
58struct snr_table { 54struct af9013_snr {
59 u32 val; 55 u32 val;
60 u8 snr; 56 u8 snr;
61}; 57};
62 58
63struct coeff { 59struct af9013_coeff {
64 u32 adc_clock; 60 u32 clock;
65 fe_bandwidth_t bw; 61 u32 bandwidth_hz;
66 u8 val[24]; 62 u8 val[24];
67}; 63};
68 64
69/* pre-calculated coeff lookup table */ 65/* pre-calculated coeff lookup table */
70static struct coeff coeff_table[] = { 66static const struct af9013_coeff coeff_lut[] = {
71 /* 28.800 MHz */ 67 /* 28.800 MHz */
72 { 28800, BANDWIDTH_8_MHZ, { 0x02, 0x8a, 0x28, 0xa3, 0x05, 0x14, 68 { 28800000, 8000000, { 0x02, 0x8a, 0x28, 0xa3, 0x05, 0x14,
73 0x51, 0x11, 0x00, 0xa2, 0x8f, 0x3d, 0x00, 0xa2, 0x8a, 69 0x51, 0x11, 0x00, 0xa2, 0x8f, 0x3d, 0x00, 0xa2, 0x8a,
74 0x29, 0x00, 0xa2, 0x85, 0x14, 0x01, 0x45, 0x14, 0x14 } }, 70 0x29, 0x00, 0xa2, 0x85, 0x14, 0x01, 0x45, 0x14, 0x14 } },
75 { 28800, BANDWIDTH_7_MHZ, { 0x02, 0x38, 0xe3, 0x8e, 0x04, 0x71, 71 { 28800000, 7000000, { 0x02, 0x38, 0xe3, 0x8e, 0x04, 0x71,
76 0xc7, 0x07, 0x00, 0x8e, 0x3d, 0x55, 0x00, 0x8e, 0x38, 72 0xc7, 0x07, 0x00, 0x8e, 0x3d, 0x55, 0x00, 0x8e, 0x38,
77 0xe4, 0x00, 0x8e, 0x34, 0x72, 0x01, 0x1c, 0x71, 0x32 } }, 73 0xe4, 0x00, 0x8e, 0x34, 0x72, 0x01, 0x1c, 0x71, 0x32 } },
78 { 28800, BANDWIDTH_6_MHZ, { 0x01, 0xe7, 0x9e, 0x7a, 0x03, 0xcf, 74 { 28800000, 6000000, { 0x01, 0xe7, 0x9e, 0x7a, 0x03, 0xcf,
79 0x3c, 0x3d, 0x00, 0x79, 0xeb, 0x6e, 0x00, 0x79, 0xe7, 75 0x3c, 0x3d, 0x00, 0x79, 0xeb, 0x6e, 0x00, 0x79, 0xe7,
80 0x9e, 0x00, 0x79, 0xe3, 0xcf, 0x00, 0xf3, 0xcf, 0x0f } }, 76 0x9e, 0x00, 0x79, 0xe3, 0xcf, 0x00, 0xf3, 0xcf, 0x0f } },
81 /* 20.480 MHz */ 77 /* 20.480 MHz */
82 { 20480, BANDWIDTH_8_MHZ, { 0x03, 0x92, 0x49, 0x26, 0x07, 0x24, 78 { 20480000, 8000000, { 0x03, 0x92, 0x49, 0x26, 0x07, 0x24,
83 0x92, 0x13, 0x00, 0xe4, 0x99, 0x6e, 0x00, 0xe4, 0x92, 79 0x92, 0x13, 0x00, 0xe4, 0x99, 0x6e, 0x00, 0xe4, 0x92,
84 0x49, 0x00, 0xe4, 0x8b, 0x25, 0x01, 0xc9, 0x24, 0x25 } }, 80 0x49, 0x00, 0xe4, 0x8b, 0x25, 0x01, 0xc9, 0x24, 0x25 } },
85 { 20480, BANDWIDTH_7_MHZ, { 0x03, 0x20, 0x00, 0x01, 0x06, 0x40, 81 { 20480000, 7000000, { 0x03, 0x20, 0x00, 0x01, 0x06, 0x40,
86 0x00, 0x00, 0x00, 0xc8, 0x06, 0x40, 0x00, 0xc8, 0x00, 82 0x00, 0x00, 0x00, 0xc8, 0x06, 0x40, 0x00, 0xc8, 0x00,
87 0x00, 0x00, 0xc7, 0xf9, 0xc0, 0x01, 0x90, 0x00, 0x00 } }, 83 0x00, 0x00, 0xc7, 0xf9, 0xc0, 0x01, 0x90, 0x00, 0x00 } },
88 { 20480, BANDWIDTH_6_MHZ, { 0x02, 0xad, 0xb6, 0xdc, 0x05, 0x5b, 84 { 20480000, 6000000, { 0x02, 0xad, 0xb6, 0xdc, 0x05, 0x5b,
89 0x6d, 0x2e, 0x00, 0xab, 0x73, 0x13, 0x00, 0xab, 0x6d, 85 0x6d, 0x2e, 0x00, 0xab, 0x73, 0x13, 0x00, 0xab, 0x6d,
90 0xb7, 0x00, 0xab, 0x68, 0x5c, 0x01, 0x56, 0xdb, 0x1c } }, 86 0xb7, 0x00, 0xab, 0x68, 0x5c, 0x01, 0x56, 0xdb, 0x1c } },
91 /* 28.000 MHz */ 87 /* 28.000 MHz */
92 { 28000, BANDWIDTH_8_MHZ, { 0x02, 0x9c, 0xbc, 0x15, 0x05, 0x39, 88 { 28000000, 8000000, { 0x02, 0x9c, 0xbc, 0x15, 0x05, 0x39,
93 0x78, 0x0a, 0x00, 0xa7, 0x34, 0x3f, 0x00, 0xa7, 0x2f, 89 0x78, 0x0a, 0x00, 0xa7, 0x34, 0x3f, 0x00, 0xa7, 0x2f,
94 0x05, 0x00, 0xa7, 0x29, 0xcc, 0x01, 0x4e, 0x5e, 0x03 } }, 90 0x05, 0x00, 0xa7, 0x29, 0xcc, 0x01, 0x4e, 0x5e, 0x03 } },
95 { 28000, BANDWIDTH_7_MHZ, { 0x02, 0x49, 0x24, 0x92, 0x04, 0x92, 91 { 28000000, 7000000, { 0x02, 0x49, 0x24, 0x92, 0x04, 0x92,
96 0x49, 0x09, 0x00, 0x92, 0x4d, 0xb7, 0x00, 0x92, 0x49, 92 0x49, 0x09, 0x00, 0x92, 0x4d, 0xb7, 0x00, 0x92, 0x49,
97 0x25, 0x00, 0x92, 0x44, 0x92, 0x01, 0x24, 0x92, 0x12 } }, 93 0x25, 0x00, 0x92, 0x44, 0x92, 0x01, 0x24, 0x92, 0x12 } },
98 { 28000, BANDWIDTH_6_MHZ, { 0x01, 0xf5, 0x8d, 0x10, 0x03, 0xeb, 94 { 28000000, 6000000, { 0x01, 0xf5, 0x8d, 0x10, 0x03, 0xeb,
99 0x1a, 0x08, 0x00, 0x7d, 0x67, 0x2f, 0x00, 0x7d, 0x63, 95 0x1a, 0x08, 0x00, 0x7d, 0x67, 0x2f, 0x00, 0x7d, 0x63,
100 0x44, 0x00, 0x7d, 0x5f, 0x59, 0x00, 0xfa, 0xc6, 0x22 } }, 96 0x44, 0x00, 0x7d, 0x5f, 0x59, 0x00, 0xfa, 0xc6, 0x22 } },
101 /* 25.000 MHz */ 97 /* 25.000 MHz */
102 { 25000, BANDWIDTH_8_MHZ, { 0x02, 0xec, 0xfb, 0x9d, 0x05, 0xd9, 98 { 25000000, 8000000, { 0x02, 0xec, 0xfb, 0x9d, 0x05, 0xd9,
103 0xf7, 0x0e, 0x00, 0xbb, 0x44, 0xc1, 0x00, 0xbb, 0x3e, 99 0xf7, 0x0e, 0x00, 0xbb, 0x44, 0xc1, 0x00, 0xbb, 0x3e,
104 0xe7, 0x00, 0xbb, 0x39, 0x0d, 0x01, 0x76, 0x7d, 0x34 } }, 100 0xe7, 0x00, 0xbb, 0x39, 0x0d, 0x01, 0x76, 0x7d, 0x34 } },
105 { 25000, BANDWIDTH_7_MHZ, { 0x02, 0x8f, 0x5c, 0x29, 0x05, 0x1e, 101 { 25000000, 7000000, { 0x02, 0x8f, 0x5c, 0x29, 0x05, 0x1e,
106 0xb8, 0x14, 0x00, 0xa3, 0xdc, 0x29, 0x00, 0xa3, 0xd7, 102 0xb8, 0x14, 0x00, 0xa3, 0xdc, 0x29, 0x00, 0xa3, 0xd7,
107 0x0a, 0x00, 0xa3, 0xd1, 0xec, 0x01, 0x47, 0xae, 0x05 } }, 103 0x0a, 0x00, 0xa3, 0xd1, 0xec, 0x01, 0x47, 0xae, 0x05 } },
108 { 25000, BANDWIDTH_6_MHZ, { 0x02, 0x31, 0xbc, 0xb5, 0x04, 0x63, 104 { 25000000, 6000000, { 0x02, 0x31, 0xbc, 0xb5, 0x04, 0x63,
109 0x79, 0x1b, 0x00, 0x8c, 0x73, 0x91, 0x00, 0x8c, 0x6f, 105 0x79, 0x1b, 0x00, 0x8c, 0x73, 0x91, 0x00, 0x8c, 0x6f,
110 0x2d, 0x00, 0x8c, 0x6a, 0xca, 0x01, 0x18, 0xde, 0x17 } }, 106 0x2d, 0x00, 0x8c, 0x6a, 0xca, 0x01, 0x18, 0xde, 0x17 } },
111}; 107};
112 108
113/* QPSK SNR lookup table */ 109/* QPSK SNR lookup table */
114static struct snr_table qpsk_snr_table[] = { 110static const struct af9013_snr qpsk_snr_lut[] = {
111 { 0x000000, 0 },
115 { 0x0b4771, 0 }, 112 { 0x0b4771, 0 },
116 { 0x0c1aed, 1 }, 113 { 0x0c1aed, 1 },
117 { 0x0d0d27, 2 }, 114 { 0x0d0d27, 2 },
@@ -131,7 +128,8 @@ static struct snr_table qpsk_snr_table[] = {
131}; 128};
132 129
133/* QAM16 SNR lookup table */ 130/* QAM16 SNR lookup table */
134static struct snr_table qam16_snr_table[] = { 131static const struct af9013_snr qam16_snr_lut[] = {
132 { 0x000000, 0 },
135 { 0x05eb62, 5 }, 133 { 0x05eb62, 5 },
136 { 0x05fecf, 6 }, 134 { 0x05fecf, 6 },
137 { 0x060b80, 7 }, 135 { 0x060b80, 7 },
@@ -151,7 +149,8 @@ static struct snr_table qam16_snr_table[] = {
151}; 149};
152 150
153/* QAM64 SNR lookup table */ 151/* QAM64 SNR lookup table */
154static struct snr_table qam64_snr_table[] = { 152static const struct af9013_snr qam64_snr_lut[] = {
153 { 0x000000, 0 },
155 { 0x03109b, 12 }, 154 { 0x03109b, 12 },
156 { 0x0310d4, 13 }, 155 { 0x0310d4, 13 },
157 { 0x031920, 14 }, 156 { 0x031920, 14 },
@@ -170,7 +169,7 @@ static struct snr_table qam64_snr_table[] = {
170 { 0xffffff, 27 }, 169 { 0xffffff, 27 },
171}; 170};
172 171
173static struct regdesc ofsm_init[] = { 172static const struct af9013_reg_bit ofsm_init[] = {
174 { 0xd73a, 0, 8, 0xa1 }, 173 { 0xd73a, 0, 8, 0xa1 },
175 { 0xd73b, 0, 8, 0x1f }, 174 { 0xd73b, 0, 8, 0x1f },
176 { 0xd73c, 4, 4, 0x0a }, 175 { 0xd73c, 4, 4, 0x0a },
@@ -252,7 +251,7 @@ static struct regdesc ofsm_init[] = {
252 251
253/* Panasonic ENV77H11D5 tuner init 252/* Panasonic ENV77H11D5 tuner init
254 AF9013_TUNER_ENV77H11D5 = 129 */ 253 AF9013_TUNER_ENV77H11D5 = 129 */
255static struct regdesc tuner_init_env77h11d5[] = { 254static const struct af9013_reg_bit tuner_init_env77h11d5[] = {
256 { 0x9bd5, 0, 8, 0x01 }, 255 { 0x9bd5, 0, 8, 0x01 },
257 { 0x9bd6, 0, 8, 0x03 }, 256 { 0x9bd6, 0, 8, 0x03 },
258 { 0x9bbe, 0, 8, 0x01 }, 257 { 0x9bbe, 0, 8, 0x01 },
@@ -318,7 +317,7 @@ static struct regdesc tuner_init_env77h11d5[] = {
318 317
319/* Microtune MT2060 tuner init 318/* Microtune MT2060 tuner init
320 AF9013_TUNER_MT2060 = 130 */ 319 AF9013_TUNER_MT2060 = 130 */
321static struct regdesc tuner_init_mt2060[] = { 320static const struct af9013_reg_bit tuner_init_mt2060[] = {
322 { 0x9bd5, 0, 8, 0x01 }, 321 { 0x9bd5, 0, 8, 0x01 },
323 { 0x9bd6, 0, 8, 0x07 }, 322 { 0x9bd6, 0, 8, 0x07 },
324 { 0xd1a0, 1, 1, 0x01 }, 323 { 0xd1a0, 1, 1, 0x01 },
@@ -395,7 +394,7 @@ static struct regdesc tuner_init_mt2060[] = {
395 394
396/* Microtune MT2060 tuner init 395/* Microtune MT2060 tuner init
397 AF9013_TUNER_MT2060_2 = 147 */ 396 AF9013_TUNER_MT2060_2 = 147 */
398static struct regdesc tuner_init_mt2060_2[] = { 397static const struct af9013_reg_bit tuner_init_mt2060_2[] = {
399 { 0x9bd5, 0, 8, 0x01 }, 398 { 0x9bd5, 0, 8, 0x01 },
400 { 0x9bd6, 0, 8, 0x06 }, 399 { 0x9bd6, 0, 8, 0x06 },
401 { 0x9bbe, 0, 8, 0x01 }, 400 { 0x9bbe, 0, 8, 0x01 },
@@ -462,7 +461,7 @@ static struct regdesc tuner_init_mt2060_2[] = {
462 461
463/* MaxLinear MXL5003 tuner init 462/* MaxLinear MXL5003 tuner init
464 AF9013_TUNER_MXL5003D = 3 */ 463 AF9013_TUNER_MXL5003D = 3 */
465static struct regdesc tuner_init_mxl5003d[] = { 464static const struct af9013_reg_bit tuner_init_mxl5003d[] = {
466 { 0x9bd5, 0, 8, 0x01 }, 465 { 0x9bd5, 0, 8, 0x01 },
467 { 0x9bd6, 0, 8, 0x09 }, 466 { 0x9bd6, 0, 8, 0x09 },
468 { 0xd1a0, 1, 1, 0x01 }, 467 { 0xd1a0, 1, 1, 0x01 },
@@ -534,7 +533,7 @@ static struct regdesc tuner_init_mxl5003d[] = {
534 AF9013_TUNER_MXL5005D = 13 533 AF9013_TUNER_MXL5005D = 13
535 AF9013_TUNER_MXL5005R = 30 534 AF9013_TUNER_MXL5005R = 30
536 AF9013_TUNER_MXL5007T = 177 */ 535 AF9013_TUNER_MXL5007T = 177 */
537static struct regdesc tuner_init_mxl5005[] = { 536static const struct af9013_reg_bit tuner_init_mxl5005[] = {
538 { 0x9bd5, 0, 8, 0x01 }, 537 { 0x9bd5, 0, 8, 0x01 },
539 { 0x9bd6, 0, 8, 0x07 }, 538 { 0x9bd6, 0, 8, 0x07 },
540 { 0xd1a0, 1, 1, 0x01 }, 539 { 0xd1a0, 1, 1, 0x01 },
@@ -613,7 +612,7 @@ static struct regdesc tuner_init_mxl5005[] = {
613/* Quantek QT1010 tuner init 612/* Quantek QT1010 tuner init
614 AF9013_TUNER_QT1010 = 134 613 AF9013_TUNER_QT1010 = 134
615 AF9013_TUNER_QT1010A = 162 */ 614 AF9013_TUNER_QT1010A = 162 */
616static struct regdesc tuner_init_qt1010[] = { 615static const struct af9013_reg_bit tuner_init_qt1010[] = {
617 { 0x9bd5, 0, 8, 0x01 }, 616 { 0x9bd5, 0, 8, 0x01 },
618 { 0x9bd6, 0, 8, 0x09 }, 617 { 0x9bd6, 0, 8, 0x09 },
619 { 0xd1a0, 1, 1, 0x01 }, 618 { 0xd1a0, 1, 1, 0x01 },
@@ -690,7 +689,7 @@ static struct regdesc tuner_init_qt1010[] = {
690 689
691/* Freescale MC44S803 tuner init 690/* Freescale MC44S803 tuner init
692 AF9013_TUNER_MC44S803 = 133 */ 691 AF9013_TUNER_MC44S803 = 133 */
693static struct regdesc tuner_init_mc44s803[] = { 692static const struct af9013_reg_bit tuner_init_mc44s803[] = {
694 { 0x9bd5, 0, 8, 0x01 }, 693 { 0x9bd5, 0, 8, 0x01 },
695 { 0x9bd6, 0, 8, 0x06 }, 694 { 0x9bd6, 0, 8, 0x06 },
696 { 0xd1a0, 1, 1, 0x01 }, 695 { 0xd1a0, 1, 1, 0x01 },
@@ -772,7 +771,7 @@ static struct regdesc tuner_init_mc44s803[] = {
772 771
773/* unknown, probably for tin can tuner, tuner init 772/* unknown, probably for tin can tuner, tuner init
774 AF9013_TUNER_UNKNOWN = 140 */ 773 AF9013_TUNER_UNKNOWN = 140 */
775static struct regdesc tuner_init_unknown[] = { 774static const struct af9013_reg_bit tuner_init_unknown[] = {
776 { 0x9bd5, 0, 8, 0x01 }, 775 { 0x9bd5, 0, 8, 0x01 },
777 { 0x9bd6, 0, 8, 0x02 }, 776 { 0x9bd6, 0, 8, 0x02 },
778 { 0xd1a0, 1, 1, 0x01 }, 777 { 0xd1a0, 1, 1, 0x01 },
@@ -845,7 +844,7 @@ static struct regdesc tuner_init_unknown[] = {
845/* NXP TDA18271 & TDA18218 tuner init 844/* NXP TDA18271 & TDA18218 tuner init
846 AF9013_TUNER_TDA18271 = 156 845 AF9013_TUNER_TDA18271 = 156
847 AF9013_TUNER_TDA18218 = 179 */ 846 AF9013_TUNER_TDA18218 = 179 */
848static struct regdesc tuner_init_tda18271[] = { 847static const struct af9013_reg_bit tuner_init_tda18271[] = {
849 { 0x9bd5, 0, 8, 0x01 }, 848 { 0x9bd5, 0, 8, 0x01 },
850 { 0x9bd6, 0, 8, 0x04 }, 849 { 0x9bd6, 0, 8, 0x04 },
851 { 0xd1a0, 1, 1, 0x01 }, 850 { 0xd1a0, 1, 1, 0x01 },
@@ -920,4 +919,4 @@ static struct regdesc tuner_init_tda18271[] = {
920 { 0x9bee, 0, 1, 0x01 }, 919 { 0x9bee, 0, 1, 0x01 },
921}; 920};
922 921
923#endif /* _AF9013_PRIV_ */ 922#endif /* AF9013_PRIV_H */
diff --git a/drivers/media/dvb/frontends/atbm8830.c b/drivers/media/dvb/frontends/atbm8830.c
index 1539ea1f81a..a2261ea2cf8 100644
--- a/drivers/media/dvb/frontends/atbm8830.c
+++ b/drivers/media/dvb/frontends/atbm8830.c
@@ -267,8 +267,7 @@ static void atbm8830_release(struct dvb_frontend *fe)
267 kfree(state); 267 kfree(state);
268} 268}
269 269
270static int atbm8830_set_fe(struct dvb_frontend *fe, 270static int atbm8830_set_fe(struct dvb_frontend *fe)
271 struct dvb_frontend_parameters *fe_params)
272{ 271{
273 struct atbm_state *priv = fe->demodulator_priv; 272 struct atbm_state *priv = fe->demodulator_priv;
274 int i; 273 int i;
@@ -279,7 +278,7 @@ static int atbm8830_set_fe(struct dvb_frontend *fe,
279 if (fe->ops.tuner_ops.set_params) { 278 if (fe->ops.tuner_ops.set_params) {
280 if (fe->ops.i2c_gate_ctrl) 279 if (fe->ops.i2c_gate_ctrl)
281 fe->ops.i2c_gate_ctrl(fe, 1); 280 fe->ops.i2c_gate_ctrl(fe, 1);
282 fe->ops.tuner_ops.set_params(fe, fe_params); 281 fe->ops.tuner_ops.set_params(fe);
283 if (fe->ops.i2c_gate_ctrl) 282 if (fe->ops.i2c_gate_ctrl)
284 fe->ops.i2c_gate_ctrl(fe, 0); 283 fe->ops.i2c_gate_ctrl(fe, 0);
285 } 284 }
@@ -298,31 +297,31 @@ static int atbm8830_set_fe(struct dvb_frontend *fe,
298 return 0; 297 return 0;
299} 298}
300 299
301static int atbm8830_get_fe(struct dvb_frontend *fe, 300static int atbm8830_get_fe(struct dvb_frontend *fe)
302 struct dvb_frontend_parameters *fe_params)
303{ 301{
302 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
304 dprintk("%s\n", __func__); 303 dprintk("%s\n", __func__);
305 304
306 /* TODO: get real readings from device */ 305 /* TODO: get real readings from device */
307 /* inversion status */ 306 /* inversion status */
308 fe_params->inversion = INVERSION_OFF; 307 c->inversion = INVERSION_OFF;
309 308
310 /* bandwidth */ 309 /* bandwidth */
311 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 310 c->bandwidth_hz = 8000000;
312 311
313 fe_params->u.ofdm.code_rate_HP = FEC_AUTO; 312 c->code_rate_HP = FEC_AUTO;
314 fe_params->u.ofdm.code_rate_LP = FEC_AUTO; 313 c->code_rate_LP = FEC_AUTO;
315 314
316 fe_params->u.ofdm.constellation = QAM_AUTO; 315 c->modulation = QAM_AUTO;
317 316
318 /* transmission mode */ 317 /* transmission mode */
319 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO; 318 c->transmission_mode = TRANSMISSION_MODE_AUTO;
320 319
321 /* guard interval */ 320 /* guard interval */
322 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO; 321 c->guard_interval = GUARD_INTERVAL_AUTO;
323 322
324 /* hierarchy */ 323 /* hierarchy */
325 fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE; 324 c->hierarchy = HIERARCHY_NONE;
326 325
327 return 0; 326 return 0;
328} 327}
@@ -429,9 +428,9 @@ static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
429} 428}
430 429
431static struct dvb_frontend_ops atbm8830_ops = { 430static struct dvb_frontend_ops atbm8830_ops = {
431 .delsys = { SYS_DMBTH },
432 .info = { 432 .info = {
433 .name = "AltoBeam ATBM8830/8831 DMB-TH", 433 .name = "AltoBeam ATBM8830/8831 DMB-TH",
434 .type = FE_OFDM,
435 .frequency_min = 474000000, 434 .frequency_min = 474000000,
436 .frequency_max = 858000000, 435 .frequency_max = 858000000,
437 .frequency_stepsize = 10000, 436 .frequency_stepsize = 10000,
diff --git a/drivers/media/dvb/frontends/au8522_dig.c b/drivers/media/dvb/frontends/au8522_dig.c
index 1d572940e24..c688b95df48 100644
--- a/drivers/media/dvb/frontends/au8522_dig.c
+++ b/drivers/media/dvb/frontends/au8522_dig.c
@@ -576,19 +576,19 @@ static int au8522_enable_modulation(struct dvb_frontend *fe,
576} 576}
577 577
578/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ 578/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
579static int au8522_set_frontend(struct dvb_frontend *fe, 579static int au8522_set_frontend(struct dvb_frontend *fe)
580 struct dvb_frontend_parameters *p)
581{ 580{
581 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
582 struct au8522_state *state = fe->demodulator_priv; 582 struct au8522_state *state = fe->demodulator_priv;
583 int ret = -EINVAL; 583 int ret = -EINVAL;
584 584
585 dprintk("%s(frequency=%d)\n", __func__, p->frequency); 585 dprintk("%s(frequency=%d)\n", __func__, c->frequency);
586 586
587 if ((state->current_frequency == p->frequency) && 587 if ((state->current_frequency == c->frequency) &&
588 (state->current_modulation == p->u.vsb.modulation)) 588 (state->current_modulation == c->modulation))
589 return 0; 589 return 0;
590 590
591 au8522_enable_modulation(fe, p->u.vsb.modulation); 591 au8522_enable_modulation(fe, c->modulation);
592 592
593 /* Allow the demod to settle */ 593 /* Allow the demod to settle */
594 msleep(100); 594 msleep(100);
@@ -596,7 +596,7 @@ static int au8522_set_frontend(struct dvb_frontend *fe,
596 if (fe->ops.tuner_ops.set_params) { 596 if (fe->ops.tuner_ops.set_params) {
597 if (fe->ops.i2c_gate_ctrl) 597 if (fe->ops.i2c_gate_ctrl)
598 fe->ops.i2c_gate_ctrl(fe, 1); 598 fe->ops.i2c_gate_ctrl(fe, 1);
599 ret = fe->ops.tuner_ops.set_params(fe, p); 599 ret = fe->ops.tuner_ops.set_params(fe);
600 if (fe->ops.i2c_gate_ctrl) 600 if (fe->ops.i2c_gate_ctrl)
601 fe->ops.i2c_gate_ctrl(fe, 0); 601 fe->ops.i2c_gate_ctrl(fe, 0);
602 } 602 }
@@ -604,7 +604,7 @@ static int au8522_set_frontend(struct dvb_frontend *fe,
604 if (ret < 0) 604 if (ret < 0)
605 return ret; 605 return ret;
606 606
607 state->current_frequency = p->frequency; 607 state->current_frequency = c->frequency;
608 608
609 return 0; 609 return 0;
610} 610}
@@ -862,7 +862,36 @@ static int au8522_read_snr(struct dvb_frontend *fe, u16 *snr)
862static int au8522_read_signal_strength(struct dvb_frontend *fe, 862static int au8522_read_signal_strength(struct dvb_frontend *fe,
863 u16 *signal_strength) 863 u16 *signal_strength)
864{ 864{
865 return au8522_read_snr(fe, signal_strength); 865 /* borrowed from lgdt330x.c
866 *
867 * Calculate strength from SNR up to 35dB
868 * Even though the SNR can go higher than 35dB,
869 * there is some comfort factor in having a range of
870 * strong signals that can show at 100%
871 */
872 u16 snr;
873 u32 tmp;
874 int ret = au8522_read_snr(fe, &snr);
875
876 *signal_strength = 0;
877
878 if (0 == ret) {
879 /* The following calculation method was chosen
880 * purely for the sake of code re-use from the
881 * other demod drivers that use this method */
882
883 /* Convert from SNR in dB * 10 to 8.24 fixed-point */
884 tmp = (snr * ((1 << 24) / 10));
885
886 /* Convert from 8.24 fixed-point to
887 * scale the range 0 - 35*2^24 into 0 - 65535*/
888 if (tmp >= 8960 * 0x10000)
889 *signal_strength = 0xffff;
890 else
891 *signal_strength = tmp / 8960;
892 }
893
894 return ret;
866} 895}
867 896
868static int au8522_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 897static int au8522_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
@@ -882,13 +911,13 @@ static int au8522_read_ber(struct dvb_frontend *fe, u32 *ber)
882 return au8522_read_ucblocks(fe, ber); 911 return au8522_read_ucblocks(fe, ber);
883} 912}
884 913
885static int au8522_get_frontend(struct dvb_frontend *fe, 914static int au8522_get_frontend(struct dvb_frontend *fe)
886 struct dvb_frontend_parameters *p)
887{ 915{
916 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
888 struct au8522_state *state = fe->demodulator_priv; 917 struct au8522_state *state = fe->demodulator_priv;
889 918
890 p->frequency = state->current_frequency; 919 c->frequency = state->current_frequency;
891 p->u.vsb.modulation = state->current_modulation; 920 c->modulation = state->current_modulation;
892 921
893 return 0; 922 return 0;
894} 923}
@@ -981,10 +1010,9 @@ error:
981EXPORT_SYMBOL(au8522_attach); 1010EXPORT_SYMBOL(au8522_attach);
982 1011
983static struct dvb_frontend_ops au8522_ops = { 1012static struct dvb_frontend_ops au8522_ops = {
984 1013 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
985 .info = { 1014 .info = {
986 .name = "Auvitek AU8522 QAM/8VSB Frontend", 1015 .name = "Auvitek AU8522 QAM/8VSB Frontend",
987 .type = FE_ATSC,
988 .frequency_min = 54000000, 1016 .frequency_min = 54000000,
989 .frequency_max = 858000000, 1017 .frequency_max = 858000000,
990 .frequency_stepsize = 62500, 1018 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/bcm3510.c b/drivers/media/dvb/frontends/bcm3510.c
index 8aff5868a5e..033cd7ad3ca 100644
--- a/drivers/media/dvb/frontends/bcm3510.c
+++ b/drivers/media/dvb/frontends/bcm3510.c
@@ -479,16 +479,16 @@ static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
479 return -EINVAL; 479 return -EINVAL;
480} 480}
481 481
482static int bcm3510_set_frontend(struct dvb_frontend* fe, 482static int bcm3510_set_frontend(struct dvb_frontend *fe)
483 struct dvb_frontend_parameters *p)
484{ 483{
484 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
485 struct bcm3510_state* st = fe->demodulator_priv; 485 struct bcm3510_state* st = fe->demodulator_priv;
486 struct bcm3510_hab_cmd_ext_acquire cmd; 486 struct bcm3510_hab_cmd_ext_acquire cmd;
487 struct bcm3510_hab_cmd_bert_control bert; 487 struct bcm3510_hab_cmd_bert_control bert;
488 int ret; 488 int ret;
489 489
490 memset(&cmd,0,sizeof(cmd)); 490 memset(&cmd,0,sizeof(cmd));
491 switch (p->u.vsb.modulation) { 491 switch (c->modulation) {
492 case QAM_256: 492 case QAM_256:
493 cmd.ACQUIRE0.MODE = 0x1; 493 cmd.ACQUIRE0.MODE = 0x1;
494 cmd.ACQUIRE1.SYM_RATE = 0x1; 494 cmd.ACQUIRE1.SYM_RATE = 0x1;
@@ -499,7 +499,8 @@ static int bcm3510_set_frontend(struct dvb_frontend* fe,
499 cmd.ACQUIRE1.SYM_RATE = 0x2; 499 cmd.ACQUIRE1.SYM_RATE = 0x2;
500 cmd.ACQUIRE1.IF_FREQ = 0x1; 500 cmd.ACQUIRE1.IF_FREQ = 0x1;
501 break; 501 break;
502/* case QAM_256: 502#if 0
503 case QAM_256:
503 cmd.ACQUIRE0.MODE = 0x3; 504 cmd.ACQUIRE0.MODE = 0x3;
504 break; 505 break;
505 case QAM_128: 506 case QAM_128:
@@ -513,7 +514,8 @@ static int bcm3510_set_frontend(struct dvb_frontend* fe,
513 break; 514 break;
514 case QAM_16: 515 case QAM_16:
515 cmd.ACQUIRE0.MODE = 0x7; 516 cmd.ACQUIRE0.MODE = 0x7;
516 break;*/ 517 break;
518#endif
517 case VSB_8: 519 case VSB_8:
518 cmd.ACQUIRE0.MODE = 0x8; 520 cmd.ACQUIRE0.MODE = 0x8;
519 cmd.ACQUIRE1.SYM_RATE = 0x0; 521 cmd.ACQUIRE1.SYM_RATE = 0x0;
@@ -552,7 +554,8 @@ static int bcm3510_set_frontend(struct dvb_frontend* fe,
552 554
553 bcm3510_bert_reset(st); 555 bcm3510_bert_reset(st);
554 556
555 if ((ret = bcm3510_set_freq(st,p->frequency)) < 0) 557 ret = bcm3510_set_freq(st, c->frequency);
558 if (ret < 0)
556 return ret; 559 return ret;
557 560
558 memset(&st->status1,0,sizeof(st->status1)); 561 memset(&st->status1,0,sizeof(st->status1));
@@ -819,10 +822,9 @@ error:
819EXPORT_SYMBOL(bcm3510_attach); 822EXPORT_SYMBOL(bcm3510_attach);
820 823
821static struct dvb_frontend_ops bcm3510_ops = { 824static struct dvb_frontend_ops bcm3510_ops = {
822 825 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
823 .info = { 826 .info = {
824 .name = "Broadcom BCM3510 VSB/QAM frontend", 827 .name = "Broadcom BCM3510 VSB/QAM frontend",
825 .type = FE_ATSC,
826 .frequency_min = 54000000, 828 .frequency_min = 54000000,
827 .frequency_max = 803000000, 829 .frequency_max = 803000000,
828 /* stepsize is just a guess */ 830 /* stepsize is just a guess */
diff --git a/drivers/media/dvb/frontends/bsbe1.h b/drivers/media/dvb/frontends/bsbe1.h
index 5e431ebd089..53e4d0dbb74 100644
--- a/drivers/media/dvb/frontends/bsbe1.h
+++ b/drivers/media/dvb/frontends/bsbe1.h
@@ -69,18 +69,19 @@ static int alps_bsbe1_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ra
69 return 0; 69 return 0;
70} 70}
71 71
72static int alps_bsbe1_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 72static int alps_bsbe1_tuner_set_params(struct dvb_frontend *fe)
73{ 73{
74 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
74 int ret; 75 int ret;
75 u8 data[4]; 76 u8 data[4];
76 u32 div; 77 u32 div;
77 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 78 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
78 struct i2c_adapter *i2c = fe->tuner_priv; 79 struct i2c_adapter *i2c = fe->tuner_priv;
79 80
80 if ((params->frequency < 950000) || (params->frequency > 2150000)) 81 if ((p->frequency < 950000) || (p->frequency > 2150000))
81 return -EINVAL; 82 return -EINVAL;
82 83
83 div = params->frequency / 1000; 84 div = p->frequency / 1000;
84 data[0] = (div >> 8) & 0x7f; 85 data[0] = (div >> 8) & 0x7f;
85 data[1] = div & 0xff; 86 data[1] = div & 0xff;
86 data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1; 87 data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1;
diff --git a/drivers/media/dvb/frontends/bsru6.h b/drivers/media/dvb/frontends/bsru6.h
index c480c839b30..c2a578e1314 100644
--- a/drivers/media/dvb/frontends/bsru6.h
+++ b/drivers/media/dvb/frontends/bsru6.h
@@ -101,23 +101,24 @@ static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ra
101 return 0; 101 return 0;
102} 102}
103 103
104static int alps_bsru6_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 104static int alps_bsru6_tuner_set_params(struct dvb_frontend *fe)
105{ 105{
106 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
106 u8 buf[4]; 107 u8 buf[4];
107 u32 div; 108 u32 div;
108 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; 109 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
109 struct i2c_adapter *i2c = fe->tuner_priv; 110 struct i2c_adapter *i2c = fe->tuner_priv;
110 111
111 if ((params->frequency < 950000) || (params->frequency > 2150000)) 112 if ((p->frequency < 950000) || (p->frequency > 2150000))
112 return -EINVAL; 113 return -EINVAL;
113 114
114 div = (params->frequency + (125 - 1)) / 125; // round correctly 115 div = (p->frequency + (125 - 1)) / 125; /* round correctly */
115 buf[0] = (div >> 8) & 0x7f; 116 buf[0] = (div >> 8) & 0x7f;
116 buf[1] = div & 0xff; 117 buf[1] = div & 0xff;
117 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; 118 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
118 buf[3] = 0xC4; 119 buf[3] = 0xC4;
119 120
120 if (params->frequency > 1530000) 121 if (p->frequency > 1530000)
121 buf[3] = 0xc0; 122 buf[3] = 0xc0;
122 123
123 if (fe->ops.i2c_gate_ctrl) 124 if (fe->ops.i2c_gate_ctrl)
diff --git a/drivers/media/dvb/frontends/cx22700.c b/drivers/media/dvb/frontends/cx22700.c
index 0142214b013..f2a90f990ce 100644
--- a/drivers/media/dvb/frontends/cx22700.c
+++ b/drivers/media/dvb/frontends/cx22700.c
@@ -121,7 +121,8 @@ static int cx22700_set_inversion (struct cx22700_state* state, int inversion)
121 } 121 }
122} 122}
123 123
124static int cx22700_set_tps (struct cx22700_state *state, struct dvb_ofdm_parameters *p) 124static int cx22700_set_tps(struct cx22700_state *state,
125 struct dtv_frontend_properties *p)
125{ 126{
126 static const u8 qam_tab [4] = { 0, 1, 0, 2 }; 127 static const u8 qam_tab [4] = { 0, 1, 0, 2 };
127 static const u8 fec_tab [6] = { 0, 1, 2, 0, 3, 4 }; 128 static const u8 fec_tab [6] = { 0, 1, 2, 0, 3, 4 };
@@ -146,25 +147,25 @@ static int cx22700_set_tps (struct cx22700_state *state, struct dvb_ofdm_paramet
146 p->transmission_mode != TRANSMISSION_MODE_8K) 147 p->transmission_mode != TRANSMISSION_MODE_8K)
147 return -EINVAL; 148 return -EINVAL;
148 149
149 if (p->constellation != QPSK && 150 if (p->modulation != QPSK &&
150 p->constellation != QAM_16 && 151 p->modulation != QAM_16 &&
151 p->constellation != QAM_64) 152 p->modulation != QAM_64)
152 return -EINVAL; 153 return -EINVAL;
153 154
154 if (p->hierarchy_information < HIERARCHY_NONE || 155 if (p->hierarchy < HIERARCHY_NONE ||
155 p->hierarchy_information > HIERARCHY_4) 156 p->hierarchy > HIERARCHY_4)
156 return -EINVAL; 157 return -EINVAL;
157 158
158 if (p->bandwidth < BANDWIDTH_8_MHZ || p->bandwidth > BANDWIDTH_6_MHZ) 159 if (p->bandwidth_hz > 8000000 || p->bandwidth_hz < 6000000)
159 return -EINVAL; 160 return -EINVAL;
160 161
161 if (p->bandwidth == BANDWIDTH_7_MHZ) 162 if (p->bandwidth_hz == 7000000)
162 cx22700_writereg (state, 0x09, cx22700_readreg (state, 0x09 | 0x10)); 163 cx22700_writereg (state, 0x09, cx22700_readreg (state, 0x09 | 0x10));
163 else 164 else
164 cx22700_writereg (state, 0x09, cx22700_readreg (state, 0x09 & ~0x10)); 165 cx22700_writereg (state, 0x09, cx22700_readreg (state, 0x09 & ~0x10));
165 166
166 val = qam_tab[p->constellation - QPSK]; 167 val = qam_tab[p->modulation - QPSK];
167 val |= p->hierarchy_information - HIERARCHY_NONE; 168 val |= p->hierarchy - HIERARCHY_NONE;
168 169
169 cx22700_writereg (state, 0x04, val); 170 cx22700_writereg (state, 0x04, val);
170 171
@@ -184,7 +185,8 @@ static int cx22700_set_tps (struct cx22700_state *state, struct dvb_ofdm_paramet
184 return 0; 185 return 0;
185} 186}
186 187
187static int cx22700_get_tps (struct cx22700_state* state, struct dvb_ofdm_parameters *p) 188static int cx22700_get_tps(struct cx22700_state *state,
189 struct dtv_frontend_properties *p)
188{ 190{
189 static const fe_modulation_t qam_tab [3] = { QPSK, QAM_16, QAM_64 }; 191 static const fe_modulation_t qam_tab [3] = { QPSK, QAM_16, QAM_64 };
190 static const fe_code_rate_t fec_tab [5] = { FEC_1_2, FEC_2_3, FEC_3_4, 192 static const fe_code_rate_t fec_tab [5] = { FEC_1_2, FEC_2_3, FEC_3_4,
@@ -199,14 +201,14 @@ static int cx22700_get_tps (struct cx22700_state* state, struct dvb_ofdm_paramet
199 val = cx22700_readreg (state, 0x01); 201 val = cx22700_readreg (state, 0x01);
200 202
201 if ((val & 0x7) > 4) 203 if ((val & 0x7) > 4)
202 p->hierarchy_information = HIERARCHY_AUTO; 204 p->hierarchy = HIERARCHY_AUTO;
203 else 205 else
204 p->hierarchy_information = HIERARCHY_NONE + (val & 0x7); 206 p->hierarchy = HIERARCHY_NONE + (val & 0x7);
205 207
206 if (((val >> 3) & 0x3) > 2) 208 if (((val >> 3) & 0x3) > 2)
207 p->constellation = QAM_AUTO; 209 p->modulation = QAM_AUTO;
208 else 210 else
209 p->constellation = qam_tab[(val >> 3) & 0x3]; 211 p->modulation = qam_tab[(val >> 3) & 0x3];
210 212
211 val = cx22700_readreg (state, 0x02); 213 val = cx22700_readreg (state, 0x02);
212 214
@@ -318,33 +320,35 @@ static int cx22700_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
318 return 0; 320 return 0;
319} 321}
320 322
321static int cx22700_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 323static int cx22700_set_frontend(struct dvb_frontend *fe)
322{ 324{
325 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
323 struct cx22700_state* state = fe->demodulator_priv; 326 struct cx22700_state* state = fe->demodulator_priv;
324 327
325 cx22700_writereg (state, 0x00, 0x02); /* XXX CHECKME: soft reset*/ 328 cx22700_writereg (state, 0x00, 0x02); /* XXX CHECKME: soft reset*/
326 cx22700_writereg (state, 0x00, 0x00); 329 cx22700_writereg (state, 0x00, 0x00);
327 330
328 if (fe->ops.tuner_ops.set_params) { 331 if (fe->ops.tuner_ops.set_params) {
329 fe->ops.tuner_ops.set_params(fe, p); 332 fe->ops.tuner_ops.set_params(fe);
330 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 333 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
331 } 334 }
332 335
333 cx22700_set_inversion (state, p->inversion); 336 cx22700_set_inversion(state, c->inversion);
334 cx22700_set_tps (state, &p->u.ofdm); 337 cx22700_set_tps(state, c);
335 cx22700_writereg (state, 0x37, 0x01); /* PAL loop filter off */ 338 cx22700_writereg (state, 0x37, 0x01); /* PAL loop filter off */
336 cx22700_writereg (state, 0x00, 0x01); /* restart acquire */ 339 cx22700_writereg (state, 0x00, 0x01); /* restart acquire */
337 340
338 return 0; 341 return 0;
339} 342}
340 343
341static int cx22700_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 344static int cx22700_get_frontend(struct dvb_frontend *fe)
342{ 345{
346 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
343 struct cx22700_state* state = fe->demodulator_priv; 347 struct cx22700_state* state = fe->demodulator_priv;
344 u8 reg09 = cx22700_readreg (state, 0x09); 348 u8 reg09 = cx22700_readreg (state, 0x09);
345 349
346 p->inversion = reg09 & 0x1 ? INVERSION_ON : INVERSION_OFF; 350 c->inversion = reg09 & 0x1 ? INVERSION_ON : INVERSION_OFF;
347 return cx22700_get_tps (state, &p->u.ofdm); 351 return cx22700_get_tps(state, c);
348} 352}
349 353
350static int cx22700_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) 354static int cx22700_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
@@ -401,10 +405,9 @@ error:
401} 405}
402 406
403static struct dvb_frontend_ops cx22700_ops = { 407static struct dvb_frontend_ops cx22700_ops = {
404 408 .delsys = { SYS_DVBT },
405 .info = { 409 .info = {
406 .name = "Conexant CX22700 DVB-T", 410 .name = "Conexant CX22700 DVB-T",
407 .type = FE_OFDM,
408 .frequency_min = 470000000, 411 .frequency_min = 470000000,
409 .frequency_max = 860000000, 412 .frequency_max = 860000000,
410 .frequency_stepsize = 166667, 413 .frequency_stepsize = 166667,
diff --git a/drivers/media/dvb/frontends/cx22702.c b/drivers/media/dvb/frontends/cx22702.c
index 3139558148b..faba8248508 100644
--- a/drivers/media/dvb/frontends/cx22702.c
+++ b/drivers/media/dvb/frontends/cx22702.c
@@ -146,7 +146,7 @@ static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
146 146
147/* Retrieve the demod settings */ 147/* Retrieve the demod settings */
148static int cx22702_get_tps(struct cx22702_state *state, 148static int cx22702_get_tps(struct cx22702_state *state,
149 struct dvb_ofdm_parameters *p) 149 struct dtv_frontend_properties *p)
150{ 150{
151 u8 val; 151 u8 val;
152 152
@@ -157,27 +157,27 @@ static int cx22702_get_tps(struct cx22702_state *state,
157 val = cx22702_readreg(state, 0x01); 157 val = cx22702_readreg(state, 0x01);
158 switch ((val & 0x18) >> 3) { 158 switch ((val & 0x18) >> 3) {
159 case 0: 159 case 0:
160 p->constellation = QPSK; 160 p->modulation = QPSK;
161 break; 161 break;
162 case 1: 162 case 1:
163 p->constellation = QAM_16; 163 p->modulation = QAM_16;
164 break; 164 break;
165 case 2: 165 case 2:
166 p->constellation = QAM_64; 166 p->modulation = QAM_64;
167 break; 167 break;
168 } 168 }
169 switch (val & 0x07) { 169 switch (val & 0x07) {
170 case 0: 170 case 0:
171 p->hierarchy_information = HIERARCHY_NONE; 171 p->hierarchy = HIERARCHY_NONE;
172 break; 172 break;
173 case 1: 173 case 1:
174 p->hierarchy_information = HIERARCHY_1; 174 p->hierarchy = HIERARCHY_1;
175 break; 175 break;
176 case 2: 176 case 2:
177 p->hierarchy_information = HIERARCHY_2; 177 p->hierarchy = HIERARCHY_2;
178 break; 178 break;
179 case 3: 179 case 3:
180 p->hierarchy_information = HIERARCHY_4; 180 p->hierarchy = HIERARCHY_4;
181 break; 181 break;
182 } 182 }
183 183
@@ -260,14 +260,14 @@ static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
260} 260}
261 261
262/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ 262/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
263static int cx22702_set_tps(struct dvb_frontend *fe, 263static int cx22702_set_tps(struct dvb_frontend *fe)
264 struct dvb_frontend_parameters *p)
265{ 264{
265 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
266 u8 val; 266 u8 val;
267 struct cx22702_state *state = fe->demodulator_priv; 267 struct cx22702_state *state = fe->demodulator_priv;
268 268
269 if (fe->ops.tuner_ops.set_params) { 269 if (fe->ops.tuner_ops.set_params) {
270 fe->ops.tuner_ops.set_params(fe, p); 270 fe->ops.tuner_ops.set_params(fe);
271 if (fe->ops.i2c_gate_ctrl) 271 if (fe->ops.i2c_gate_ctrl)
272 fe->ops.i2c_gate_ctrl(fe, 0); 272 fe->ops.i2c_gate_ctrl(fe, 0);
273 } 273 }
@@ -277,14 +277,14 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
277 277
278 /* set bandwidth */ 278 /* set bandwidth */
279 val = cx22702_readreg(state, 0x0C) & 0xcf; 279 val = cx22702_readreg(state, 0x0C) & 0xcf;
280 switch (p->u.ofdm.bandwidth) { 280 switch (p->bandwidth_hz) {
281 case BANDWIDTH_6_MHZ: 281 case 6000000:
282 val |= 0x20; 282 val |= 0x20;
283 break; 283 break;
284 case BANDWIDTH_7_MHZ: 284 case 7000000:
285 val |= 0x10; 285 val |= 0x10;
286 break; 286 break;
287 case BANDWIDTH_8_MHZ: 287 case 8000000:
288 break; 288 break;
289 default: 289 default:
290 dprintk("%s: invalid bandwidth\n", __func__); 290 dprintk("%s: invalid bandwidth\n", __func__);
@@ -292,15 +292,15 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
292 } 292 }
293 cx22702_writereg(state, 0x0C, val); 293 cx22702_writereg(state, 0x0C, val);
294 294
295 p->u.ofdm.code_rate_LP = FEC_AUTO; /* temp hack as manual not working */ 295 p->code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
296 296
297 /* use auto configuration? */ 297 /* use auto configuration? */
298 if ((p->u.ofdm.hierarchy_information == HIERARCHY_AUTO) || 298 if ((p->hierarchy == HIERARCHY_AUTO) ||
299 (p->u.ofdm.constellation == QAM_AUTO) || 299 (p->modulation == QAM_AUTO) ||
300 (p->u.ofdm.code_rate_HP == FEC_AUTO) || 300 (p->code_rate_HP == FEC_AUTO) ||
301 (p->u.ofdm.code_rate_LP == FEC_AUTO) || 301 (p->code_rate_LP == FEC_AUTO) ||
302 (p->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO) || 302 (p->guard_interval == GUARD_INTERVAL_AUTO) ||
303 (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO)) { 303 (p->transmission_mode == TRANSMISSION_MODE_AUTO)) {
304 304
305 /* TPS Source - use hardware driven values */ 305 /* TPS Source - use hardware driven values */
306 cx22702_writereg(state, 0x06, 0x10); 306 cx22702_writereg(state, 0x06, 0x10);
@@ -316,7 +316,7 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
316 } 316 }
317 317
318 /* manually programmed values */ 318 /* manually programmed values */
319 switch (p->u.ofdm.constellation) { /* mask 0x18 */ 319 switch (p->modulation) { /* mask 0x18 */
320 case QPSK: 320 case QPSK:
321 val = 0x00; 321 val = 0x00;
322 break; 322 break;
@@ -327,10 +327,10 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
327 val = 0x10; 327 val = 0x10;
328 break; 328 break;
329 default: 329 default:
330 dprintk("%s: invalid constellation\n", __func__); 330 dprintk("%s: invalid modulation\n", __func__);
331 return -EINVAL; 331 return -EINVAL;
332 } 332 }
333 switch (p->u.ofdm.hierarchy_information) { /* mask 0x07 */ 333 switch (p->hierarchy) { /* mask 0x07 */
334 case HIERARCHY_NONE: 334 case HIERARCHY_NONE:
335 break; 335 break;
336 case HIERARCHY_1: 336 case HIERARCHY_1:
@@ -348,7 +348,7 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
348 } 348 }
349 cx22702_writereg(state, 0x06, val); 349 cx22702_writereg(state, 0x06, val);
350 350
351 switch (p->u.ofdm.code_rate_HP) { /* mask 0x38 */ 351 switch (p->code_rate_HP) { /* mask 0x38 */
352 case FEC_NONE: 352 case FEC_NONE:
353 case FEC_1_2: 353 case FEC_1_2:
354 val = 0x00; 354 val = 0x00;
@@ -369,7 +369,7 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
369 dprintk("%s: invalid code_rate_HP\n", __func__); 369 dprintk("%s: invalid code_rate_HP\n", __func__);
370 return -EINVAL; 370 return -EINVAL;
371 } 371 }
372 switch (p->u.ofdm.code_rate_LP) { /* mask 0x07 */ 372 switch (p->code_rate_LP) { /* mask 0x07 */
373 case FEC_NONE: 373 case FEC_NONE:
374 case FEC_1_2: 374 case FEC_1_2:
375 break; 375 break;
@@ -391,7 +391,7 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
391 } 391 }
392 cx22702_writereg(state, 0x07, val); 392 cx22702_writereg(state, 0x07, val);
393 393
394 switch (p->u.ofdm.guard_interval) { /* mask 0x0c */ 394 switch (p->guard_interval) { /* mask 0x0c */
395 case GUARD_INTERVAL_1_32: 395 case GUARD_INTERVAL_1_32:
396 val = 0x00; 396 val = 0x00;
397 break; 397 break;
@@ -408,7 +408,7 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
408 dprintk("%s: invalid guard_interval\n", __func__); 408 dprintk("%s: invalid guard_interval\n", __func__);
409 return -EINVAL; 409 return -EINVAL;
410 } 410 }
411 switch (p->u.ofdm.transmission_mode) { /* mask 0x03 */ 411 switch (p->transmission_mode) { /* mask 0x03 */
412 case TRANSMISSION_MODE_2K: 412 case TRANSMISSION_MODE_2K:
413 break; 413 break;
414 case TRANSMISSION_MODE_8K: 414 case TRANSMISSION_MODE_8K:
@@ -546,15 +546,15 @@ static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
546 return 0; 546 return 0;
547} 547}
548 548
549static int cx22702_get_frontend(struct dvb_frontend *fe, 549static int cx22702_get_frontend(struct dvb_frontend *fe)
550 struct dvb_frontend_parameters *p)
551{ 550{
551 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
552 struct cx22702_state *state = fe->demodulator_priv; 552 struct cx22702_state *state = fe->demodulator_priv;
553 553
554 u8 reg0C = cx22702_readreg(state, 0x0C); 554 u8 reg0C = cx22702_readreg(state, 0x0C);
555 555
556 p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF; 556 c->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
557 return cx22702_get_tps(state, &p->u.ofdm); 557 return cx22702_get_tps(state, c);
558} 558}
559 559
560static int cx22702_get_tune_settings(struct dvb_frontend *fe, 560static int cx22702_get_tune_settings(struct dvb_frontend *fe,
@@ -603,10 +603,9 @@ error:
603EXPORT_SYMBOL(cx22702_attach); 603EXPORT_SYMBOL(cx22702_attach);
604 604
605static const struct dvb_frontend_ops cx22702_ops = { 605static const struct dvb_frontend_ops cx22702_ops = {
606 606 .delsys = { SYS_DVBT },
607 .info = { 607 .info = {
608 .name = "Conexant CX22702 DVB-T", 608 .name = "Conexant CX22702 DVB-T",
609 .type = FE_OFDM,
610 .frequency_min = 177000000, 609 .frequency_min = 177000000,
611 .frequency_max = 858000000, 610 .frequency_max = 858000000,
612 .frequency_stepsize = 166666, 611 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c
index bf9c999aa47..5101f10f2d7 100644
--- a/drivers/media/dvb/frontends/cx24110.c
+++ b/drivers/media/dvb/frontends/cx24110.c
@@ -531,26 +531,27 @@ static int cx24110_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
531 return 0; 531 return 0;
532} 532}
533 533
534static int cx24110_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 534static int cx24110_set_frontend(struct dvb_frontend *fe)
535{ 535{
536 struct cx24110_state *state = fe->demodulator_priv; 536 struct cx24110_state *state = fe->demodulator_priv;
537 537 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
538 538
539 if (fe->ops.tuner_ops.set_params) { 539 if (fe->ops.tuner_ops.set_params) {
540 fe->ops.tuner_ops.set_params(fe, p); 540 fe->ops.tuner_ops.set_params(fe);
541 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 541 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
542 } 542 }
543 543
544 cx24110_set_inversion (state, p->inversion); 544 cx24110_set_inversion(state, p->inversion);
545 cx24110_set_fec (state, p->u.qpsk.fec_inner); 545 cx24110_set_fec(state, p->fec_inner);
546 cx24110_set_symbolrate (state, p->u.qpsk.symbol_rate); 546 cx24110_set_symbolrate(state, p->symbol_rate);
547 cx24110_writereg(state,0x04,0x05); /* start acquisition */ 547 cx24110_writereg(state,0x04,0x05); /* start acquisition */
548 548
549 return 0; 549 return 0;
550} 550}
551 551
552static int cx24110_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 552static int cx24110_get_frontend(struct dvb_frontend *fe)
553{ 553{
554 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
554 struct cx24110_state *state = fe->demodulator_priv; 555 struct cx24110_state *state = fe->demodulator_priv;
555 s32 afc; unsigned sclk; 556 s32 afc; unsigned sclk;
556 557
@@ -571,7 +572,7 @@ static int cx24110_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
571 p->frequency += afc; 572 p->frequency += afc;
572 p->inversion = (cx24110_readreg (state, 0x22) & 0x10) ? 573 p->inversion = (cx24110_readreg (state, 0x22) & 0x10) ?
573 INVERSION_ON : INVERSION_OFF; 574 INVERSION_ON : INVERSION_OFF;
574 p->u.qpsk.fec_inner = cx24110_get_fec (state); 575 p->fec_inner = cx24110_get_fec(state);
575 576
576 return 0; 577 return 0;
577} 578}
@@ -623,10 +624,9 @@ error:
623} 624}
624 625
625static struct dvb_frontend_ops cx24110_ops = { 626static struct dvb_frontend_ops cx24110_ops = {
626 627 .delsys = { SYS_DVBS },
627 .info = { 628 .info = {
628 .name = "Conexant CX24110 DVB-S", 629 .name = "Conexant CX24110 DVB-S",
629 .type = FE_QPSK,
630 .frequency_min = 950000, 630 .frequency_min = 950000,
631 .frequency_max = 2150000, 631 .frequency_max = 2150000,
632 .frequency_stepsize = 1011, /* kHz for QPSK frontends */ 632 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/cx24113.c b/drivers/media/dvb/frontends/cx24113.c
index c341d57d5e8..3883c3b31ae 100644
--- a/drivers/media/dvb/frontends/cx24113.c
+++ b/drivers/media/dvb/frontends/cx24113.c
@@ -476,21 +476,21 @@ static int cx24113_init(struct dvb_frontend *fe)
476 return ret; 476 return ret;
477} 477}
478 478
479static int cx24113_set_params(struct dvb_frontend *fe, 479static int cx24113_set_params(struct dvb_frontend *fe)
480 struct dvb_frontend_parameters *p)
481{ 480{
481 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
482 struct cx24113_state *state = fe->tuner_priv; 482 struct cx24113_state *state = fe->tuner_priv;
483 /* for a ROLL-OFF factor of 0.35, 0.2: 600, 0.25: 625 */ 483 /* for a ROLL-OFF factor of 0.35, 0.2: 600, 0.25: 625 */
484 u32 roll_off = 675; 484 u32 roll_off = 675;
485 u32 bw; 485 u32 bw;
486 486
487 bw = ((p->u.qpsk.symbol_rate/100) * roll_off) / 1000; 487 bw = ((c->symbol_rate/100) * roll_off) / 1000;
488 bw += (10000000/100) + 5; 488 bw += (10000000/100) + 5;
489 bw /= 10; 489 bw /= 10;
490 bw += 1000; 490 bw += 1000;
491 cx24113_set_bandwidth(state, bw); 491 cx24113_set_bandwidth(state, bw);
492 492
493 cx24113_set_frequency(state, p->frequency); 493 cx24113_set_frequency(state, c->frequency);
494 msleep(5); 494 msleep(5);
495 return cx24113_get_status(fe, &bw); 495 return cx24113_get_status(fe, &bw);
496} 496}
@@ -547,11 +547,9 @@ static const struct dvb_tuner_ops cx24113_tuner_ops = {
547 .release = cx24113_release, 547 .release = cx24113_release,
548 548
549 .init = cx24113_init, 549 .init = cx24113_init,
550 .sleep = NULL,
551 550
552 .set_params = cx24113_set_params, 551 .set_params = cx24113_set_params,
553 .get_frequency = cx24113_get_frequency, 552 .get_frequency = cx24113_get_frequency,
554 .get_bandwidth = NULL,
555 .get_status = cx24113_get_status, 553 .get_status = cx24113_get_status,
556}; 554};
557 555
diff --git a/drivers/media/dvb/frontends/cx24116.c b/drivers/media/dvb/frontends/cx24116.c
index ccd05255d52..b4887918653 100644
--- a/drivers/media/dvb/frontends/cx24116.c
+++ b/drivers/media/dvb/frontends/cx24116.c
@@ -1212,25 +1212,10 @@ static int cx24116_sleep(struct dvb_frontend *fe)
1212 return 0; 1212 return 0;
1213} 1213}
1214 1214
1215static int cx24116_set_property(struct dvb_frontend *fe,
1216 struct dtv_property *tvp)
1217{
1218 dprintk("%s(..)\n", __func__);
1219 return 0;
1220}
1221
1222static int cx24116_get_property(struct dvb_frontend *fe,
1223 struct dtv_property *tvp)
1224{
1225 dprintk("%s(..)\n", __func__);
1226 return 0;
1227}
1228
1229/* dvb-core told us to tune, the tv property cache will be complete, 1215/* dvb-core told us to tune, the tv property cache will be complete,
1230 * it's safe for is to pull values and use them for tuning purposes. 1216 * it's safe for is to pull values and use them for tuning purposes.
1231 */ 1217 */
1232static int cx24116_set_frontend(struct dvb_frontend *fe, 1218static int cx24116_set_frontend(struct dvb_frontend *fe)
1233 struct dvb_frontend_parameters *p)
1234{ 1219{
1235 struct cx24116_state *state = fe->demodulator_priv; 1220 struct cx24116_state *state = fe->demodulator_priv;
1236 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1221 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
@@ -1455,12 +1440,20 @@ tuned: /* Set/Reset B/W */
1455 return cx24116_cmd_execute(fe, &cmd); 1440 return cx24116_cmd_execute(fe, &cmd);
1456} 1441}
1457 1442
1458static int cx24116_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, 1443static int cx24116_tune(struct dvb_frontend *fe, bool re_tune,
1459 unsigned int mode_flags, unsigned int *delay, fe_status_t *status) 1444 unsigned int mode_flags, unsigned int *delay, fe_status_t *status)
1460{ 1445{
1446 /*
1447 * It is safe to discard "params" here, as the DVB core will sync
1448 * fe->dtv_property_cache with fepriv->parameters_in, where the
1449 * DVBv3 params are stored. The only practical usage for it indicate
1450 * that re-tuning is needed, e. g. (fepriv->state & FESTATE_RETUNE) is
1451 * true.
1452 */
1453
1461 *delay = HZ / 5; 1454 *delay = HZ / 5;
1462 if (params) { 1455 if (re_tune) {
1463 int ret = cx24116_set_frontend(fe, params); 1456 int ret = cx24116_set_frontend(fe);
1464 if (ret) 1457 if (ret)
1465 return ret; 1458 return ret;
1466 } 1459 }
@@ -1473,10 +1466,9 @@ static int cx24116_get_algo(struct dvb_frontend *fe)
1473} 1466}
1474 1467
1475static struct dvb_frontend_ops cx24116_ops = { 1468static struct dvb_frontend_ops cx24116_ops = {
1476 1469 .delsys = { SYS_DVBS, SYS_DVBS2 },
1477 .info = { 1470 .info = {
1478 .name = "Conexant CX24116/CX24118", 1471 .name = "Conexant CX24116/CX24118",
1479 .type = FE_QPSK,
1480 .frequency_min = 950000, 1472 .frequency_min = 950000,
1481 .frequency_max = 2150000, 1473 .frequency_max = 2150000,
1482 .frequency_stepsize = 1011, /* kHz for QPSK frontends */ 1474 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
@@ -1507,8 +1499,6 @@ static struct dvb_frontend_ops cx24116_ops = {
1507 .get_frontend_algo = cx24116_get_algo, 1499 .get_frontend_algo = cx24116_get_algo,
1508 .tune = cx24116_tune, 1500 .tune = cx24116_tune,
1509 1501
1510 .set_property = cx24116_set_property,
1511 .get_property = cx24116_get_property,
1512 .set_frontend = cx24116_set_frontend, 1502 .set_frontend = cx24116_set_frontend,
1513}; 1503};
1514 1504
diff --git a/drivers/media/dvb/frontends/cx24123.c b/drivers/media/dvb/frontends/cx24123.c
index b1dd8acc607..7e28b4ee7d4 100644
--- a/drivers/media/dvb/frontends/cx24123.c
+++ b/drivers/media/dvb/frontends/cx24123.c
@@ -526,9 +526,9 @@ static int cx24123_set_symbolrate(struct cx24123_state *state, u32 srate)
526 * to be configured and the correct band selected. 526 * to be configured and the correct band selected.
527 * Calculate those values. 527 * Calculate those values.
528 */ 528 */
529static int cx24123_pll_calculate(struct dvb_frontend *fe, 529static int cx24123_pll_calculate(struct dvb_frontend *fe)
530 struct dvb_frontend_parameters *p)
531{ 530{
531 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
532 struct cx24123_state *state = fe->demodulator_priv; 532 struct cx24123_state *state = fe->demodulator_priv;
533 u32 ndiv = 0, adiv = 0, vco_div = 0; 533 u32 ndiv = 0, adiv = 0, vco_div = 0;
534 int i = 0; 534 int i = 0;
@@ -548,8 +548,8 @@ static int cx24123_pll_calculate(struct dvb_frontend *fe,
548 * FILTUNE programming bits */ 548 * FILTUNE programming bits */
549 for (i = 0; i < ARRAY_SIZE(cx24123_AGC_vals); i++) { 549 for (i = 0; i < ARRAY_SIZE(cx24123_AGC_vals); i++) {
550 agcv = &cx24123_AGC_vals[i]; 550 agcv = &cx24123_AGC_vals[i];
551 if ((agcv->symbolrate_low <= p->u.qpsk.symbol_rate) && 551 if ((agcv->symbolrate_low <= p->symbol_rate) &&
552 (agcv->symbolrate_high >= p->u.qpsk.symbol_rate)) { 552 (agcv->symbolrate_high >= p->symbol_rate)) {
553 state->VCAarg = agcv->VCAprogdata; 553 state->VCAarg = agcv->VCAprogdata;
554 state->VGAarg = agcv->VGAprogdata; 554 state->VGAarg = agcv->VGAprogdata;
555 state->FILTune = agcv->FILTune; 555 state->FILTune = agcv->FILTune;
@@ -601,8 +601,7 @@ static int cx24123_pll_calculate(struct dvb_frontend *fe,
601 * Tuner cx24109 is written through a dedicated 3wire interface 601 * Tuner cx24109 is written through a dedicated 3wire interface
602 * on the demod chip. 602 * on the demod chip.
603 */ 603 */
604static int cx24123_pll_writereg(struct dvb_frontend *fe, 604static int cx24123_pll_writereg(struct dvb_frontend *fe, u32 data)
605 struct dvb_frontend_parameters *p, u32 data)
606{ 605{
607 struct cx24123_state *state = fe->demodulator_priv; 606 struct cx24123_state *state = fe->demodulator_priv;
608 unsigned long timeout; 607 unsigned long timeout;
@@ -659,26 +658,26 @@ static int cx24123_pll_writereg(struct dvb_frontend *fe,
659 return 0; 658 return 0;
660} 659}
661 660
662static int cx24123_pll_tune(struct dvb_frontend *fe, 661static int cx24123_pll_tune(struct dvb_frontend *fe)
663 struct dvb_frontend_parameters *p)
664{ 662{
663 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
665 struct cx24123_state *state = fe->demodulator_priv; 664 struct cx24123_state *state = fe->demodulator_priv;
666 u8 val; 665 u8 val;
667 666
668 dprintk("frequency=%i\n", p->frequency); 667 dprintk("frequency=%i\n", p->frequency);
669 668
670 if (cx24123_pll_calculate(fe, p) != 0) { 669 if (cx24123_pll_calculate(fe) != 0) {
671 err("%s: cx24123_pll_calcutate failed\n", __func__); 670 err("%s: cx24123_pll_calcutate failed\n", __func__);
672 return -EINVAL; 671 return -EINVAL;
673 } 672 }
674 673
675 /* Write the new VCO/VGA */ 674 /* Write the new VCO/VGA */
676 cx24123_pll_writereg(fe, p, state->VCAarg); 675 cx24123_pll_writereg(fe, state->VCAarg);
677 cx24123_pll_writereg(fe, p, state->VGAarg); 676 cx24123_pll_writereg(fe, state->VGAarg);
678 677
679 /* Write the new bandselect and pll args */ 678 /* Write the new bandselect and pll args */
680 cx24123_pll_writereg(fe, p, state->bandselectarg); 679 cx24123_pll_writereg(fe, state->bandselectarg);
681 cx24123_pll_writereg(fe, p, state->pllarg); 680 cx24123_pll_writereg(fe, state->pllarg);
682 681
683 /* set the FILTUNE voltage */ 682 /* set the FILTUNE voltage */
684 val = cx24123_readreg(state, 0x28) & ~0x3; 683 val = cx24123_readreg(state, 0x28) & ~0x3;
@@ -925,10 +924,10 @@ static int cx24123_read_snr(struct dvb_frontend *fe, u16 *snr)
925 return 0; 924 return 0;
926} 925}
927 926
928static int cx24123_set_frontend(struct dvb_frontend *fe, 927static int cx24123_set_frontend(struct dvb_frontend *fe)
929 struct dvb_frontend_parameters *p)
930{ 928{
931 struct cx24123_state *state = fe->demodulator_priv; 929 struct cx24123_state *state = fe->demodulator_priv;
930 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
932 931
933 dprintk("\n"); 932 dprintk("\n");
934 933
@@ -936,16 +935,16 @@ static int cx24123_set_frontend(struct dvb_frontend *fe,
936 state->config->set_ts_params(fe, 0); 935 state->config->set_ts_params(fe, 0);
937 936
938 state->currentfreq = p->frequency; 937 state->currentfreq = p->frequency;
939 state->currentsymbolrate = p->u.qpsk.symbol_rate; 938 state->currentsymbolrate = p->symbol_rate;
940 939
941 cx24123_set_inversion(state, p->inversion); 940 cx24123_set_inversion(state, p->inversion);
942 cx24123_set_fec(state, p->u.qpsk.fec_inner); 941 cx24123_set_fec(state, p->fec_inner);
943 cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate); 942 cx24123_set_symbolrate(state, p->symbol_rate);
944 943
945 if (!state->config->dont_use_pll) 944 if (!state->config->dont_use_pll)
946 cx24123_pll_tune(fe, p); 945 cx24123_pll_tune(fe);
947 else if (fe->ops.tuner_ops.set_params) 946 else if (fe->ops.tuner_ops.set_params)
948 fe->ops.tuner_ops.set_params(fe, p); 947 fe->ops.tuner_ops.set_params(fe);
949 else 948 else
950 err("it seems I don't have a tuner..."); 949 err("it seems I don't have a tuner...");
951 950
@@ -960,9 +959,9 @@ static int cx24123_set_frontend(struct dvb_frontend *fe,
960 return 0; 959 return 0;
961} 960}
962 961
963static int cx24123_get_frontend(struct dvb_frontend *fe, 962static int cx24123_get_frontend(struct dvb_frontend *fe)
964 struct dvb_frontend_parameters *p)
965{ 963{
964 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
966 struct cx24123_state *state = fe->demodulator_priv; 965 struct cx24123_state *state = fe->demodulator_priv;
967 966
968 dprintk("\n"); 967 dprintk("\n");
@@ -971,12 +970,12 @@ static int cx24123_get_frontend(struct dvb_frontend *fe,
971 err("%s: Failed to get inversion status\n", __func__); 970 err("%s: Failed to get inversion status\n", __func__);
972 return -EREMOTEIO; 971 return -EREMOTEIO;
973 } 972 }
974 if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) { 973 if (cx24123_get_fec(state, &p->fec_inner) != 0) {
975 err("%s: Failed to get fec status\n", __func__); 974 err("%s: Failed to get fec status\n", __func__);
976 return -EREMOTEIO; 975 return -EREMOTEIO;
977 } 976 }
978 p->frequency = state->currentfreq; 977 p->frequency = state->currentfreq;
979 p->u.qpsk.symbol_rate = state->currentsymbolrate; 978 p->symbol_rate = state->currentsymbolrate;
980 979
981 return 0; 980 return 0;
982} 981}
@@ -1007,15 +1006,15 @@ static int cx24123_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
1007} 1006}
1008 1007
1009static int cx24123_tune(struct dvb_frontend *fe, 1008static int cx24123_tune(struct dvb_frontend *fe,
1010 struct dvb_frontend_parameters *params, 1009 bool re_tune,
1011 unsigned int mode_flags, 1010 unsigned int mode_flags,
1012 unsigned int *delay, 1011 unsigned int *delay,
1013 fe_status_t *status) 1012 fe_status_t *status)
1014{ 1013{
1015 int retval = 0; 1014 int retval = 0;
1016 1015
1017 if (params != NULL) 1016 if (re_tune)
1018 retval = cx24123_set_frontend(fe, params); 1017 retval = cx24123_set_frontend(fe);
1019 1018
1020 if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) 1019 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1021 cx24123_read_status(fe, status); 1020 cx24123_read_status(fe, status);
@@ -1126,10 +1125,9 @@ error:
1126EXPORT_SYMBOL(cx24123_attach); 1125EXPORT_SYMBOL(cx24123_attach);
1127 1126
1128static struct dvb_frontend_ops cx24123_ops = { 1127static struct dvb_frontend_ops cx24123_ops = {
1129 1128 .delsys = { SYS_DVBS },
1130 .info = { 1129 .info = {
1131 .name = "Conexant CX24123/CX24109", 1130 .name = "Conexant CX24123/CX24109",
1132 .type = FE_QPSK,
1133 .frequency_min = 950000, 1131 .frequency_min = 950000,
1134 .frequency_max = 2150000, 1132 .frequency_max = 2150000,
1135 .frequency_stepsize = 1011, /* kHz for QPSK frontends */ 1133 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/cxd2820r.h b/drivers/media/dvb/frontends/cxd2820r.h
index 03cab7b547f..cf0f546aa1d 100644
--- a/drivers/media/dvb/frontends/cxd2820r.h
+++ b/drivers/media/dvb/frontends/cxd2820r.h
@@ -63,19 +63,6 @@ struct cxd2820r_config {
63 */ 63 */
64 bool spec_inv; 64 bool spec_inv;
65 65
66 /* IFs for all used modes.
67 * Default: none, must set
68 * Values: <kHz>
69 */
70 u16 if_dvbt_6;
71 u16 if_dvbt_7;
72 u16 if_dvbt_8;
73 u16 if_dvbt2_5;
74 u16 if_dvbt2_6;
75 u16 if_dvbt2_7;
76 u16 if_dvbt2_8;
77 u16 if_dvbc;
78
79 /* GPIOs for all used modes. 66 /* GPIOs for all used modes.
80 * Default: none, disabled 67 * Default: none, disabled
81 * Values: <see above> 68 * Values: <see above>
diff --git a/drivers/media/dvb/frontends/cxd2820r_c.c b/drivers/media/dvb/frontends/cxd2820r_c.c
index b85f5011e34..94540499152 100644
--- a/drivers/media/dvb/frontends/cxd2820r_c.c
+++ b/drivers/media/dvb/frontends/cxd2820r_c.c
@@ -21,13 +21,13 @@
21 21
22#include "cxd2820r_priv.h" 22#include "cxd2820r_priv.h"
23 23
24int cxd2820r_set_frontend_c(struct dvb_frontend *fe, 24int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
25 struct dvb_frontend_parameters *params)
26{ 25{
27 struct cxd2820r_priv *priv = fe->demodulator_priv; 26 struct cxd2820r_priv *priv = fe->demodulator_priv;
28 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 27 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
29 int ret, i; 28 int ret, i;
30 u8 buf[2]; 29 u8 buf[2];
30 u32 if_freq;
31 u16 if_ctl; 31 u16 if_ctl;
32 u64 num; 32 u64 num;
33 struct reg_val_mask tab[] = { 33 struct reg_val_mask tab[] = {
@@ -56,9 +56,9 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe,
56 56
57 /* program tuner */ 57 /* program tuner */
58 if (fe->ops.tuner_ops.set_params) 58 if (fe->ops.tuner_ops.set_params)
59 fe->ops.tuner_ops.set_params(fe, params); 59 fe->ops.tuner_ops.set_params(fe);
60 60
61 if (priv->delivery_system != SYS_DVBC_ANNEX_AC) { 61 if (priv->delivery_system != SYS_DVBC_ANNEX_A) {
62 for (i = 0; i < ARRAY_SIZE(tab); i++) { 62 for (i = 0; i < ARRAY_SIZE(tab); i++) {
63 ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, 63 ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
64 tab[i].val, tab[i].mask); 64 tab[i].val, tab[i].mask);
@@ -67,10 +67,20 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe,
67 } 67 }
68 } 68 }
69 69
70 priv->delivery_system = SYS_DVBC_ANNEX_AC; 70 priv->delivery_system = SYS_DVBC_ANNEX_A;
71 priv->ber_running = 0; /* tune stops BER counter */ 71 priv->ber_running = 0; /* tune stops BER counter */
72 72
73 num = priv->cfg.if_dvbc; 73 /* program IF frequency */
74 if (fe->ops.tuner_ops.get_if_frequency) {
75 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
76 if (ret)
77 goto error;
78 } else
79 if_freq = 0;
80
81 dbg("%s: if_freq=%d", __func__, if_freq);
82
83 num = if_freq / 1000; /* Hz => kHz */
74 num *= 0x4000; 84 num *= 0x4000;
75 if_ctl = cxd2820r_div_u64_round_closest(num, 41000); 85 if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
76 buf[0] = (if_ctl >> 8) & 0x3f; 86 buf[0] = (if_ctl >> 8) & 0x3f;
@@ -94,8 +104,7 @@ error:
94 return ret; 104 return ret;
95} 105}
96 106
97int cxd2820r_get_frontend_c(struct dvb_frontend *fe, 107int cxd2820r_get_frontend_c(struct dvb_frontend *fe)
98 struct dvb_frontend_parameters *p)
99{ 108{
100 struct cxd2820r_priv *priv = fe->demodulator_priv; 109 struct cxd2820r_priv *priv = fe->demodulator_priv;
101 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 110 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
diff --git a/drivers/media/dvb/frontends/cxd2820r_core.c b/drivers/media/dvb/frontends/cxd2820r_core.c
index 036480f967b..93e1b12e790 100644
--- a/drivers/media/dvb/frontends/cxd2820r_core.c
+++ b/drivers/media/dvb/frontends/cxd2820r_core.c
@@ -240,422 +240,234 @@ error:
240 return ret; 240 return ret;
241} 241}
242 242
243/* lock FE */
244static int cxd2820r_lock(struct cxd2820r_priv *priv, int active_fe)
245{
246 int ret = 0;
247 dbg("%s: active_fe=%d", __func__, active_fe);
248
249 mutex_lock(&priv->fe_lock);
250
251 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
252 if (priv->active_fe == active_fe)
253 ;
254 else if (priv->active_fe == -1)
255 priv->active_fe = active_fe;
256 else
257 ret = -EBUSY;
258
259 mutex_unlock(&priv->fe_lock);
260
261 return ret;
262}
263
264/* unlock FE */
265static void cxd2820r_unlock(struct cxd2820r_priv *priv, int active_fe)
266{
267 dbg("%s: active_fe=%d", __func__, active_fe);
268
269 mutex_lock(&priv->fe_lock);
270
271 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
272 if (priv->active_fe == active_fe)
273 priv->active_fe = -1;
274
275 mutex_unlock(&priv->fe_lock);
276
277 return;
278}
279
280/* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */ 243/* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
281u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor) 244u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
282{ 245{
283 return div_u64(dividend + (divisor / 2), divisor); 246 return div_u64(dividend + (divisor / 2), divisor);
284} 247}
285 248
286static int cxd2820r_set_frontend(struct dvb_frontend *fe, 249static int cxd2820r_set_frontend(struct dvb_frontend *fe)
287 struct dvb_frontend_parameters *p)
288{ 250{
289 struct cxd2820r_priv *priv = fe->demodulator_priv;
290 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 251 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
291 int ret; 252 int ret;
292 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
293 253
294 if (fe->ops.info.type == FE_OFDM) { 254 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
295 /* DVB-T/T2 */ 255 switch (c->delivery_system) {
296 ret = cxd2820r_lock(priv, 0); 256 case SYS_DVBT:
297 if (ret) 257 ret = cxd2820r_init_t(fe);
298 return ret; 258 if (ret < 0)
299 259 goto err;
300 switch (priv->delivery_system) { 260 ret = cxd2820r_set_frontend_t(fe);
301 case SYS_UNDEFINED: 261 if (ret < 0)
302 if (c->delivery_system == SYS_DVBT) { 262 goto err;
303 /* SLEEP => DVB-T */ 263 break;
304 ret = cxd2820r_set_frontend_t(fe, p); 264 case SYS_DVBT2:
305 } else { 265 ret = cxd2820r_init_t(fe);
306 /* SLEEP => DVB-T2 */ 266 if (ret < 0)
307 ret = cxd2820r_set_frontend_t2(fe, p); 267 goto err;
308 } 268 ret = cxd2820r_set_frontend_t2(fe);
309 break; 269 if (ret < 0)
310 case SYS_DVBT: 270 goto err;
311 if (c->delivery_system == SYS_DVBT) { 271 break;
312 /* DVB-T => DVB-T */ 272 case SYS_DVBC_ANNEX_A:
313 ret = cxd2820r_set_frontend_t(fe, p); 273 ret = cxd2820r_init_c(fe);
314 } else if (c->delivery_system == SYS_DVBT2) { 274 if (ret < 0)
315 /* DVB-T => DVB-T2 */ 275 goto err;
316 ret = cxd2820r_sleep_t(fe); 276 ret = cxd2820r_set_frontend_c(fe);
317 if (ret) 277 if (ret < 0)
318 break; 278 goto err;
319 ret = cxd2820r_set_frontend_t2(fe, p); 279 break;
320 } 280 default:
321 break; 281 dbg("%s: error state=%d", __func__, fe->dtv_property_cache.delivery_system);
322 case SYS_DVBT2: 282 ret = -EINVAL;
323 if (c->delivery_system == SYS_DVBT2) { 283 break;
324 /* DVB-T2 => DVB-T2 */
325 ret = cxd2820r_set_frontend_t2(fe, p);
326 } else if (c->delivery_system == SYS_DVBT) {
327 /* DVB-T2 => DVB-T */
328 ret = cxd2820r_sleep_t2(fe);
329 if (ret)
330 break;
331 ret = cxd2820r_set_frontend_t(fe, p);
332 }
333 break;
334 default:
335 dbg("%s: error state=%d", __func__,
336 priv->delivery_system);
337 ret = -EINVAL;
338 }
339 } else {
340 /* DVB-C */
341 ret = cxd2820r_lock(priv, 1);
342 if (ret)
343 return ret;
344
345 ret = cxd2820r_set_frontend_c(fe, p);
346 } 284 }
347 285err:
348 return ret; 286 return ret;
349} 287}
350
351static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status) 288static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
352{ 289{
353 struct cxd2820r_priv *priv = fe->demodulator_priv;
354 int ret; 290 int ret;
355 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
356
357 if (fe->ops.info.type == FE_OFDM) {
358 /* DVB-T/T2 */
359 ret = cxd2820r_lock(priv, 0);
360 if (ret)
361 return ret;
362
363 switch (fe->dtv_property_cache.delivery_system) {
364 case SYS_DVBT:
365 ret = cxd2820r_read_status_t(fe, status);
366 break;
367 case SYS_DVBT2:
368 ret = cxd2820r_read_status_t2(fe, status);
369 break;
370 default:
371 ret = -EINVAL;
372 }
373 } else {
374 /* DVB-C */
375 ret = cxd2820r_lock(priv, 1);
376 if (ret)
377 return ret;
378 291
292 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
293 switch (fe->dtv_property_cache.delivery_system) {
294 case SYS_DVBT:
295 ret = cxd2820r_read_status_t(fe, status);
296 break;
297 case SYS_DVBT2:
298 ret = cxd2820r_read_status_t2(fe, status);
299 break;
300 case SYS_DVBC_ANNEX_A:
379 ret = cxd2820r_read_status_c(fe, status); 301 ret = cxd2820r_read_status_c(fe, status);
302 break;
303 default:
304 ret = -EINVAL;
305 break;
380 } 306 }
381
382 return ret; 307 return ret;
383} 308}
384 309
385static int cxd2820r_get_frontend(struct dvb_frontend *fe, 310static int cxd2820r_get_frontend(struct dvb_frontend *fe)
386 struct dvb_frontend_parameters *p)
387{ 311{
388 struct cxd2820r_priv *priv = fe->demodulator_priv;
389 int ret; 312 int ret;
390 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
391 313
392 if (fe->ops.info.type == FE_OFDM) { 314 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
393 /* DVB-T/T2 */ 315 switch (fe->dtv_property_cache.delivery_system) {
394 ret = cxd2820r_lock(priv, 0); 316 case SYS_DVBT:
395 if (ret) 317 ret = cxd2820r_get_frontend_t(fe);
396 return ret; 318 break;
397 319 case SYS_DVBT2:
398 switch (fe->dtv_property_cache.delivery_system) { 320 ret = cxd2820r_get_frontend_t2(fe);
399 case SYS_DVBT: 321 break;
400 ret = cxd2820r_get_frontend_t(fe, p); 322 case SYS_DVBC_ANNEX_A:
401 break; 323 ret = cxd2820r_get_frontend_c(fe);
402 case SYS_DVBT2: 324 break;
403 ret = cxd2820r_get_frontend_t2(fe, p); 325 default:
404 break; 326 ret = -EINVAL;
405 default: 327 break;
406 ret = -EINVAL;
407 }
408 } else {
409 /* DVB-C */
410 ret = cxd2820r_lock(priv, 1);
411 if (ret)
412 return ret;
413
414 ret = cxd2820r_get_frontend_c(fe, p);
415 } 328 }
416
417 return ret; 329 return ret;
418} 330}
419 331
420static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber) 332static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
421{ 333{
422 struct cxd2820r_priv *priv = fe->demodulator_priv;
423 int ret; 334 int ret;
424 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
425
426 if (fe->ops.info.type == FE_OFDM) {
427 /* DVB-T/T2 */
428 ret = cxd2820r_lock(priv, 0);
429 if (ret)
430 return ret;
431
432 switch (fe->dtv_property_cache.delivery_system) {
433 case SYS_DVBT:
434 ret = cxd2820r_read_ber_t(fe, ber);
435 break;
436 case SYS_DVBT2:
437 ret = cxd2820r_read_ber_t2(fe, ber);
438 break;
439 default:
440 ret = -EINVAL;
441 }
442 } else {
443 /* DVB-C */
444 ret = cxd2820r_lock(priv, 1);
445 if (ret)
446 return ret;
447 335
336 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
337 switch (fe->dtv_property_cache.delivery_system) {
338 case SYS_DVBT:
339 ret = cxd2820r_read_ber_t(fe, ber);
340 break;
341 case SYS_DVBT2:
342 ret = cxd2820r_read_ber_t2(fe, ber);
343 break;
344 case SYS_DVBC_ANNEX_A:
448 ret = cxd2820r_read_ber_c(fe, ber); 345 ret = cxd2820r_read_ber_c(fe, ber);
346 break;
347 default:
348 ret = -EINVAL;
349 break;
449 } 350 }
450
451 return ret; 351 return ret;
452} 352}
453 353
454static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 354static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
455{ 355{
456 struct cxd2820r_priv *priv = fe->demodulator_priv;
457 int ret; 356 int ret;
458 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
459
460 if (fe->ops.info.type == FE_OFDM) {
461 /* DVB-T/T2 */
462 ret = cxd2820r_lock(priv, 0);
463 if (ret)
464 return ret;
465
466 switch (fe->dtv_property_cache.delivery_system) {
467 case SYS_DVBT:
468 ret = cxd2820r_read_signal_strength_t(fe, strength);
469 break;
470 case SYS_DVBT2:
471 ret = cxd2820r_read_signal_strength_t2(fe, strength);
472 break;
473 default:
474 ret = -EINVAL;
475 }
476 } else {
477 /* DVB-C */
478 ret = cxd2820r_lock(priv, 1);
479 if (ret)
480 return ret;
481 357
358 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
359 switch (fe->dtv_property_cache.delivery_system) {
360 case SYS_DVBT:
361 ret = cxd2820r_read_signal_strength_t(fe, strength);
362 break;
363 case SYS_DVBT2:
364 ret = cxd2820r_read_signal_strength_t2(fe, strength);
365 break;
366 case SYS_DVBC_ANNEX_A:
482 ret = cxd2820r_read_signal_strength_c(fe, strength); 367 ret = cxd2820r_read_signal_strength_c(fe, strength);
368 break;
369 default:
370 ret = -EINVAL;
371 break;
483 } 372 }
484
485 return ret; 373 return ret;
486} 374}
487 375
488static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr) 376static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
489{ 377{
490 struct cxd2820r_priv *priv = fe->demodulator_priv;
491 int ret; 378 int ret;
492 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
493
494 if (fe->ops.info.type == FE_OFDM) {
495 /* DVB-T/T2 */
496 ret = cxd2820r_lock(priv, 0);
497 if (ret)
498 return ret;
499
500 switch (fe->dtv_property_cache.delivery_system) {
501 case SYS_DVBT:
502 ret = cxd2820r_read_snr_t(fe, snr);
503 break;
504 case SYS_DVBT2:
505 ret = cxd2820r_read_snr_t2(fe, snr);
506 break;
507 default:
508 ret = -EINVAL;
509 }
510 } else {
511 /* DVB-C */
512 ret = cxd2820r_lock(priv, 1);
513 if (ret)
514 return ret;
515 379
380 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
381 switch (fe->dtv_property_cache.delivery_system) {
382 case SYS_DVBT:
383 ret = cxd2820r_read_snr_t(fe, snr);
384 break;
385 case SYS_DVBT2:
386 ret = cxd2820r_read_snr_t2(fe, snr);
387 break;
388 case SYS_DVBC_ANNEX_A:
516 ret = cxd2820r_read_snr_c(fe, snr); 389 ret = cxd2820r_read_snr_c(fe, snr);
390 break;
391 default:
392 ret = -EINVAL;
393 break;
517 } 394 }
518
519 return ret; 395 return ret;
520} 396}
521 397
522static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 398static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
523{ 399{
524 struct cxd2820r_priv *priv = fe->demodulator_priv;
525 int ret; 400 int ret;
526 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
527
528 if (fe->ops.info.type == FE_OFDM) {
529 /* DVB-T/T2 */
530 ret = cxd2820r_lock(priv, 0);
531 if (ret)
532 return ret;
533
534 switch (fe->dtv_property_cache.delivery_system) {
535 case SYS_DVBT:
536 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
537 break;
538 case SYS_DVBT2:
539 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
540 break;
541 default:
542 ret = -EINVAL;
543 }
544 } else {
545 /* DVB-C */
546 ret = cxd2820r_lock(priv, 1);
547 if (ret)
548 return ret;
549 401
402 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
403 switch (fe->dtv_property_cache.delivery_system) {
404 case SYS_DVBT:
405 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
406 break;
407 case SYS_DVBT2:
408 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
409 break;
410 case SYS_DVBC_ANNEX_A:
550 ret = cxd2820r_read_ucblocks_c(fe, ucblocks); 411 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
412 break;
413 default:
414 ret = -EINVAL;
415 break;
551 } 416 }
552
553 return ret; 417 return ret;
554} 418}
555 419
556static int cxd2820r_init(struct dvb_frontend *fe) 420static int cxd2820r_init(struct dvb_frontend *fe)
557{ 421{
558 struct cxd2820r_priv *priv = fe->demodulator_priv; 422 return 0;
559 int ret;
560 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
561
562 priv->delivery_system = SYS_UNDEFINED;
563 /* delivery system is unknown at that (init) phase */
564
565 if (fe->ops.info.type == FE_OFDM) {
566 /* DVB-T/T2 */
567 ret = cxd2820r_lock(priv, 0);
568 if (ret)
569 return ret;
570
571 ret = cxd2820r_init_t(fe);
572 } else {
573 /* DVB-C */
574 ret = cxd2820r_lock(priv, 1);
575 if (ret)
576 return ret;
577
578 ret = cxd2820r_init_c(fe);
579 }
580
581 return ret;
582} 423}
583 424
584static int cxd2820r_sleep(struct dvb_frontend *fe) 425static int cxd2820r_sleep(struct dvb_frontend *fe)
585{ 426{
586 struct cxd2820r_priv *priv = fe->demodulator_priv;
587 int ret; 427 int ret;
588 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
589
590 if (fe->ops.info.type == FE_OFDM) {
591 /* DVB-T/T2 */
592 ret = cxd2820r_lock(priv, 0);
593 if (ret)
594 return ret;
595
596 switch (fe->dtv_property_cache.delivery_system) {
597 case SYS_DVBT:
598 ret = cxd2820r_sleep_t(fe);
599 break;
600 case SYS_DVBT2:
601 ret = cxd2820r_sleep_t2(fe);
602 break;
603 default:
604 ret = -EINVAL;
605 }
606
607 cxd2820r_unlock(priv, 0);
608 } else {
609 /* DVB-C */
610 ret = cxd2820r_lock(priv, 1);
611 if (ret)
612 return ret;
613 428
429 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
430 switch (fe->dtv_property_cache.delivery_system) {
431 case SYS_DVBT:
432 ret = cxd2820r_sleep_t(fe);
433 break;
434 case SYS_DVBT2:
435 ret = cxd2820r_sleep_t2(fe);
436 break;
437 case SYS_DVBC_ANNEX_A:
614 ret = cxd2820r_sleep_c(fe); 438 ret = cxd2820r_sleep_c(fe);
615 439 break;
616 cxd2820r_unlock(priv, 1); 440 default:
441 ret = -EINVAL;
442 break;
617 } 443 }
618
619 return ret; 444 return ret;
620} 445}
621 446
622static int cxd2820r_get_tune_settings(struct dvb_frontend *fe, 447static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
623 struct dvb_frontend_tune_settings *s) 448 struct dvb_frontend_tune_settings *s)
624{ 449{
625 struct cxd2820r_priv *priv = fe->demodulator_priv;
626 int ret; 450 int ret;
627 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
628
629 if (fe->ops.info.type == FE_OFDM) {
630 /* DVB-T/T2 */
631 ret = cxd2820r_lock(priv, 0);
632 if (ret)
633 return ret;
634
635 switch (fe->dtv_property_cache.delivery_system) {
636 case SYS_DVBT:
637 ret = cxd2820r_get_tune_settings_t(fe, s);
638 break;
639 case SYS_DVBT2:
640 ret = cxd2820r_get_tune_settings_t2(fe, s);
641 break;
642 default:
643 ret = -EINVAL;
644 }
645 } else {
646 /* DVB-C */
647 ret = cxd2820r_lock(priv, 1);
648 if (ret)
649 return ret;
650 451
452 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
453 switch (fe->dtv_property_cache.delivery_system) {
454 case SYS_DVBT:
455 ret = cxd2820r_get_tune_settings_t(fe, s);
456 break;
457 case SYS_DVBT2:
458 ret = cxd2820r_get_tune_settings_t2(fe, s);
459 break;
460 case SYS_DVBC_ANNEX_A:
651 ret = cxd2820r_get_tune_settings_c(fe, s); 461 ret = cxd2820r_get_tune_settings_c(fe, s);
462 break;
463 default:
464 ret = -EINVAL;
465 break;
652 } 466 }
653
654 return ret; 467 return ret;
655} 468}
656 469
657static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe, 470static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
658 struct dvb_frontend_parameters *p)
659{ 471{
660 struct cxd2820r_priv *priv = fe->demodulator_priv; 472 struct cxd2820r_priv *priv = fe->demodulator_priv;
661 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 473 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
@@ -664,7 +476,7 @@ static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe,
664 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system); 476 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
665 477
666 /* switch between DVB-T and DVB-T2 when tune fails */ 478 /* switch between DVB-T and DVB-T2 when tune fails */
667 if (priv->last_tune_failed) { 479 if (priv->last_tune_failed && (priv->delivery_system != SYS_DVBC_ANNEX_A)) {
668 if (priv->delivery_system == SYS_DVBT) 480 if (priv->delivery_system == SYS_DVBT)
669 c->delivery_system = SYS_DVBT2; 481 c->delivery_system = SYS_DVBT2;
670 else 482 else
@@ -672,7 +484,7 @@ static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe,
672 } 484 }
673 485
674 /* set frontend */ 486 /* set frontend */
675 ret = cxd2820r_set_frontend(fe, p); 487 ret = cxd2820r_set_frontend(fe);
676 if (ret) 488 if (ret)
677 goto error; 489 goto error;
678 490
@@ -727,9 +539,7 @@ static void cxd2820r_release(struct dvb_frontend *fe)
727 struct cxd2820r_priv *priv = fe->demodulator_priv; 539 struct cxd2820r_priv *priv = fe->demodulator_priv;
728 dbg("%s", __func__); 540 dbg("%s", __func__);
729 541
730 if (fe->ops.info.type == FE_OFDM) 542 kfree(priv);
731 kfree(priv);
732
733 return; 543 return;
734} 544}
735 545
@@ -742,128 +552,79 @@ static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
742 return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1); 552 return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
743} 553}
744 554
745static const struct dvb_frontend_ops cxd2820r_ops[2]; 555static const struct dvb_frontend_ops cxd2820r_ops = {
556 .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
557 /* default: DVB-T/T2 */
558 .info = {
559 .name = "Sony CXD2820R (DVB-T/T2)",
560
561 .caps = FE_CAN_FEC_1_2 |
562 FE_CAN_FEC_2_3 |
563 FE_CAN_FEC_3_4 |
564 FE_CAN_FEC_5_6 |
565 FE_CAN_FEC_7_8 |
566 FE_CAN_FEC_AUTO |
567 FE_CAN_QPSK |
568 FE_CAN_QAM_16 |
569 FE_CAN_QAM_64 |
570 FE_CAN_QAM_256 |
571 FE_CAN_QAM_AUTO |
572 FE_CAN_TRANSMISSION_MODE_AUTO |
573 FE_CAN_GUARD_INTERVAL_AUTO |
574 FE_CAN_HIERARCHY_AUTO |
575 FE_CAN_MUTE_TS |
576 FE_CAN_2G_MODULATION
577 },
746 578
747struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg, 579 .release = cxd2820r_release,
748 struct i2c_adapter *i2c, struct dvb_frontend *fe) 580 .init = cxd2820r_init,
749{ 581 .sleep = cxd2820r_sleep,
750 int ret;
751 struct cxd2820r_priv *priv = NULL;
752 u8 tmp;
753 582
754 if (fe == NULL) { 583 .get_tune_settings = cxd2820r_get_tune_settings,
755 /* FE0 */ 584 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
756 /* allocate memory for the internal priv */
757 priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
758 if (priv == NULL)
759 goto error;
760 585
761 /* setup the priv */ 586 .get_frontend = cxd2820r_get_frontend,
762 priv->i2c = i2c;
763 memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
764 mutex_init(&priv->fe_lock);
765 587
766 priv->active_fe = -1; /* NONE */ 588 .get_frontend_algo = cxd2820r_get_frontend_algo,
589 .search = cxd2820r_search,
767 590
768 /* check if the demod is there */ 591 .read_status = cxd2820r_read_status,
769 priv->bank[0] = priv->bank[1] = 0xff; 592 .read_snr = cxd2820r_read_snr,
770 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp); 593 .read_ber = cxd2820r_read_ber,
771 dbg("%s: chip id=%02x", __func__, tmp); 594 .read_ucblocks = cxd2820r_read_ucblocks,
772 if (ret || tmp != 0xe1) 595 .read_signal_strength = cxd2820r_read_signal_strength,
773 goto error; 596};
774 597
775 /* create frontends */ 598struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
776 memcpy(&priv->fe[0].ops, &cxd2820r_ops[0], 599 struct i2c_adapter *i2c,
777 sizeof(struct dvb_frontend_ops)); 600 struct dvb_frontend *fe)
778 memcpy(&priv->fe[1].ops, &cxd2820r_ops[1], 601{
779 sizeof(struct dvb_frontend_ops)); 602 struct cxd2820r_priv *priv = NULL;
603 int ret;
604 u8 tmp;
780 605
781 priv->fe[0].demodulator_priv = priv; 606 priv = kzalloc(sizeof (struct cxd2820r_priv), GFP_KERNEL);
782 priv->fe[1].demodulator_priv = priv; 607 if (!priv)
608 goto error;
783 609
784 return &priv->fe[0]; 610 priv->i2c = i2c;
611 memcpy(&priv->cfg, cfg, sizeof (struct cxd2820r_config));
785 612
786 } else { 613 priv->bank[0] = priv->bank[1] = 0xff;
787 /* FE1: FE0 given as pointer, just return FE1 we have 614 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
788 * already created */ 615 dbg("%s: chip id=%02x", __func__, tmp);
789 priv = fe->demodulator_priv; 616 if (ret || tmp != 0xe1)
790 return &priv->fe[1]; 617 goto error;
791 }
792 618
619 memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof (struct dvb_frontend_ops));
620 priv->fe.demodulator_priv = priv;
621 return &priv->fe;
793error: 622error:
794 kfree(priv); 623 kfree(priv);
795 return NULL; 624 return NULL;
796} 625}
797EXPORT_SYMBOL(cxd2820r_attach); 626EXPORT_SYMBOL(cxd2820r_attach);
798 627
799static const struct dvb_frontend_ops cxd2820r_ops[2] = {
800 {
801 /* DVB-T/T2 */
802 .info = {
803 .name = "Sony CXD2820R (DVB-T/T2)",
804 .type = FE_OFDM,
805 .caps =
806 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
807 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
808 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
809 FE_CAN_QPSK | FE_CAN_QAM_16 |
810 FE_CAN_QAM_64 | FE_CAN_QAM_256 |
811 FE_CAN_QAM_AUTO |
812 FE_CAN_TRANSMISSION_MODE_AUTO |
813 FE_CAN_GUARD_INTERVAL_AUTO |
814 FE_CAN_HIERARCHY_AUTO |
815 FE_CAN_MUTE_TS |
816 FE_CAN_2G_MODULATION
817 },
818
819 .release = cxd2820r_release,
820 .init = cxd2820r_init,
821 .sleep = cxd2820r_sleep,
822
823 .get_tune_settings = cxd2820r_get_tune_settings,
824 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
825
826 .get_frontend = cxd2820r_get_frontend,
827
828 .get_frontend_algo = cxd2820r_get_frontend_algo,
829 .search = cxd2820r_search,
830
831 .read_status = cxd2820r_read_status,
832 .read_snr = cxd2820r_read_snr,
833 .read_ber = cxd2820r_read_ber,
834 .read_ucblocks = cxd2820r_read_ucblocks,
835 .read_signal_strength = cxd2820r_read_signal_strength,
836 },
837 {
838 /* DVB-C */
839 .info = {
840 .name = "Sony CXD2820R (DVB-C)",
841 .type = FE_QAM,
842 .caps =
843 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
844 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
845 FE_CAN_FEC_AUTO
846 },
847
848 .release = cxd2820r_release,
849 .init = cxd2820r_init,
850 .sleep = cxd2820r_sleep,
851
852 .get_tune_settings = cxd2820r_get_tune_settings,
853 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
854
855 .set_frontend = cxd2820r_set_frontend,
856 .get_frontend = cxd2820r_get_frontend,
857
858 .read_status = cxd2820r_read_status,
859 .read_snr = cxd2820r_read_snr,
860 .read_ber = cxd2820r_read_ber,
861 .read_ucblocks = cxd2820r_read_ucblocks,
862 .read_signal_strength = cxd2820r_read_signal_strength,
863 },
864};
865
866
867MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 628MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
868MODULE_DESCRIPTION("Sony CXD2820R demodulator driver"); 629MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
869MODULE_LICENSE("GPL"); 630MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/cxd2820r_priv.h b/drivers/media/dvb/frontends/cxd2820r_priv.h
index 95539134efd..9a9822cad9c 100644
--- a/drivers/media/dvb/frontends/cxd2820r_priv.h
+++ b/drivers/media/dvb/frontends/cxd2820r_priv.h
@@ -48,12 +48,9 @@ struct reg_val_mask {
48 48
49struct cxd2820r_priv { 49struct cxd2820r_priv {
50 struct i2c_adapter *i2c; 50 struct i2c_adapter *i2c;
51 struct dvb_frontend fe[2]; 51 struct dvb_frontend fe;
52 struct cxd2820r_config cfg; 52 struct cxd2820r_config cfg;
53 53
54 struct mutex fe_lock; /* FE lock */
55 int active_fe:2; /* FE lock, -1=NONE, 0=DVB-T/T2, 1=DVB-C */
56
57 bool ber_running; 54 bool ber_running;
58 55
59 u8 bank[2]; 56 u8 bank[2];
@@ -89,11 +86,9 @@ int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val);
89 86
90/* cxd2820r_c.c */ 87/* cxd2820r_c.c */
91 88
92int cxd2820r_get_frontend_c(struct dvb_frontend *fe, 89int cxd2820r_get_frontend_c(struct dvb_frontend *fe);
93 struct dvb_frontend_parameters *p);
94 90
95int cxd2820r_set_frontend_c(struct dvb_frontend *fe, 91int cxd2820r_set_frontend_c(struct dvb_frontend *fe);
96 struct dvb_frontend_parameters *params);
97 92
98int cxd2820r_read_status_c(struct dvb_frontend *fe, fe_status_t *status); 93int cxd2820r_read_status_c(struct dvb_frontend *fe, fe_status_t *status);
99 94
@@ -114,11 +109,9 @@ int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
114 109
115/* cxd2820r_t.c */ 110/* cxd2820r_t.c */
116 111
117int cxd2820r_get_frontend_t(struct dvb_frontend *fe, 112int cxd2820r_get_frontend_t(struct dvb_frontend *fe);
118 struct dvb_frontend_parameters *p);
119 113
120int cxd2820r_set_frontend_t(struct dvb_frontend *fe, 114int cxd2820r_set_frontend_t(struct dvb_frontend *fe);
121 struct dvb_frontend_parameters *params);
122 115
123int cxd2820r_read_status_t(struct dvb_frontend *fe, fe_status_t *status); 116int cxd2820r_read_status_t(struct dvb_frontend *fe, fe_status_t *status);
124 117
@@ -139,11 +132,9 @@ int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
139 132
140/* cxd2820r_t2.c */ 133/* cxd2820r_t2.c */
141 134
142int cxd2820r_get_frontend_t2(struct dvb_frontend *fe, 135int cxd2820r_get_frontend_t2(struct dvb_frontend *fe);
143 struct dvb_frontend_parameters *p);
144 136
145int cxd2820r_set_frontend_t2(struct dvb_frontend *fe, 137int cxd2820r_set_frontend_t2(struct dvb_frontend *fe);
146 struct dvb_frontend_parameters *params);
147 138
148int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status); 139int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status);
149 140
diff --git a/drivers/media/dvb/frontends/cxd2820r_t.c b/drivers/media/dvb/frontends/cxd2820r_t.c
index a04f9c81010..1a026239cdc 100644
--- a/drivers/media/dvb/frontends/cxd2820r_t.c
+++ b/drivers/media/dvb/frontends/cxd2820r_t.c
@@ -21,13 +21,12 @@
21 21
22#include "cxd2820r_priv.h" 22#include "cxd2820r_priv.h"
23 23
24int cxd2820r_set_frontend_t(struct dvb_frontend *fe, 24int cxd2820r_set_frontend_t(struct dvb_frontend *fe)
25 struct dvb_frontend_parameters *p)
26{ 25{
27 struct cxd2820r_priv *priv = fe->demodulator_priv; 26 struct cxd2820r_priv *priv = fe->demodulator_priv;
28 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 27 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
29 int ret, i; 28 int ret, i, bw_i;
30 u32 if_khz, if_ctl; 29 u32 if_freq, if_ctl;
31 u64 num; 30 u64 num;
32 u8 buf[3], bw_param; 31 u8 buf[3], bw_param;
33 u8 bw_params1[][5] = { 32 u8 bw_params1[][5] = {
@@ -57,6 +56,23 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
57 56
58 dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz); 57 dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz);
59 58
59 switch (c->bandwidth_hz) {
60 case 6000000:
61 bw_i = 0;
62 bw_param = 2;
63 break;
64 case 7000000:
65 bw_i = 1;
66 bw_param = 1;
67 break;
68 case 8000000:
69 bw_i = 2;
70 bw_param = 0;
71 break;
72 default:
73 return -EINVAL;
74 }
75
60 /* update GPIOs */ 76 /* update GPIOs */
61 ret = cxd2820r_gpio(fe); 77 ret = cxd2820r_gpio(fe);
62 if (ret) 78 if (ret)
@@ -64,7 +80,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
64 80
65 /* program tuner */ 81 /* program tuner */
66 if (fe->ops.tuner_ops.set_params) 82 if (fe->ops.tuner_ops.set_params)
67 fe->ops.tuner_ops.set_params(fe, p); 83 fe->ops.tuner_ops.set_params(fe);
68 84
69 if (priv->delivery_system != SYS_DVBT) { 85 if (priv->delivery_system != SYS_DVBT) {
70 for (i = 0; i < ARRAY_SIZE(tab); i++) { 86 for (i = 0; i < ARRAY_SIZE(tab); i++) {
@@ -78,27 +94,17 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
78 priv->delivery_system = SYS_DVBT; 94 priv->delivery_system = SYS_DVBT;
79 priv->ber_running = 0; /* tune stops BER counter */ 95 priv->ber_running = 0; /* tune stops BER counter */
80 96
81 switch (c->bandwidth_hz) { 97 /* program IF frequency */
82 case 6000000: 98 if (fe->ops.tuner_ops.get_if_frequency) {
83 if_khz = priv->cfg.if_dvbt_6; 99 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
84 i = 0; 100 if (ret)
85 bw_param = 2; 101 goto error;
86 break; 102 } else
87 case 7000000: 103 if_freq = 0;
88 if_khz = priv->cfg.if_dvbt_7; 104
89 i = 1; 105 dbg("%s: if_freq=%d", __func__, if_freq);
90 bw_param = 1;
91 break;
92 case 8000000:
93 if_khz = priv->cfg.if_dvbt_8;
94 i = 2;
95 bw_param = 0;
96 break;
97 default:
98 return -EINVAL;
99 }
100 106
101 num = if_khz; 107 num = if_freq / 1000; /* Hz => kHz */
102 num *= 0x1000000; 108 num *= 0x1000000;
103 if_ctl = cxd2820r_div_u64_round_closest(num, 41000); 109 if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
104 buf[0] = ((if_ctl >> 16) & 0xff); 110 buf[0] = ((if_ctl >> 16) & 0xff);
@@ -109,7 +115,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
109 if (ret) 115 if (ret)
110 goto error; 116 goto error;
111 117
112 ret = cxd2820r_wr_regs(priv, 0x0009f, bw_params1[i], 5); 118 ret = cxd2820r_wr_regs(priv, 0x0009f, bw_params1[bw_i], 5);
113 if (ret) 119 if (ret)
114 goto error; 120 goto error;
115 121
@@ -117,7 +123,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
117 if (ret) 123 if (ret)
118 goto error; 124 goto error;
119 125
120 ret = cxd2820r_wr_regs(priv, 0x000d9, bw_params2[i], 2); 126 ret = cxd2820r_wr_regs(priv, 0x000d9, bw_params2[bw_i], 2);
121 if (ret) 127 if (ret)
122 goto error; 128 goto error;
123 129
@@ -135,8 +141,7 @@ error:
135 return ret; 141 return ret;
136} 142}
137 143
138int cxd2820r_get_frontend_t(struct dvb_frontend *fe, 144int cxd2820r_get_frontend_t(struct dvb_frontend *fe)
139 struct dvb_frontend_parameters *p)
140{ 145{
141 struct cxd2820r_priv *priv = fe->demodulator_priv; 146 struct cxd2820r_priv *priv = fe->demodulator_priv;
142 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 147 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
diff --git a/drivers/media/dvb/frontends/cxd2820r_t2.c b/drivers/media/dvb/frontends/cxd2820r_t2.c
index 6548588309f..3a5759e0d23 100644
--- a/drivers/media/dvb/frontends/cxd2820r_t2.c
+++ b/drivers/media/dvb/frontends/cxd2820r_t2.c
@@ -21,13 +21,12 @@
21 21
22#include "cxd2820r_priv.h" 22#include "cxd2820r_priv.h"
23 23
24int cxd2820r_set_frontend_t2(struct dvb_frontend *fe, 24int cxd2820r_set_frontend_t2(struct dvb_frontend *fe)
25 struct dvb_frontend_parameters *params)
26{ 25{
27 struct cxd2820r_priv *priv = fe->demodulator_priv; 26 struct cxd2820r_priv *priv = fe->demodulator_priv;
28 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 27 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
29 int ret, i; 28 int ret, i, bw_i;
30 u32 if_khz, if_ctl; 29 u32 if_freq, if_ctl;
31 u64 num; 30 u64 num;
32 u8 buf[3], bw_param; 31 u8 buf[3], bw_param;
33 u8 bw_params1[][5] = { 32 u8 bw_params1[][5] = {
@@ -71,6 +70,27 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe,
71 70
72 dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz); 71 dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz);
73 72
73 switch (c->bandwidth_hz) {
74 case 5000000:
75 bw_i = 0;
76 bw_param = 3;
77 break;
78 case 6000000:
79 bw_i = 1;
80 bw_param = 2;
81 break;
82 case 7000000:
83 bw_i = 2;
84 bw_param = 1;
85 break;
86 case 8000000:
87 bw_i = 3;
88 bw_param = 0;
89 break;
90 default:
91 return -EINVAL;
92 }
93
74 /* update GPIOs */ 94 /* update GPIOs */
75 ret = cxd2820r_gpio(fe); 95 ret = cxd2820r_gpio(fe);
76 if (ret) 96 if (ret)
@@ -78,7 +98,7 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe,
78 98
79 /* program tuner */ 99 /* program tuner */
80 if (fe->ops.tuner_ops.set_params) 100 if (fe->ops.tuner_ops.set_params)
81 fe->ops.tuner_ops.set_params(fe, params); 101 fe->ops.tuner_ops.set_params(fe);
82 102
83 if (priv->delivery_system != SYS_DVBT2) { 103 if (priv->delivery_system != SYS_DVBT2) {
84 for (i = 0; i < ARRAY_SIZE(tab); i++) { 104 for (i = 0; i < ARRAY_SIZE(tab); i++) {
@@ -91,32 +111,17 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe,
91 111
92 priv->delivery_system = SYS_DVBT2; 112 priv->delivery_system = SYS_DVBT2;
93 113
94 switch (c->bandwidth_hz) { 114 /* program IF frequency */
95 case 5000000: 115 if (fe->ops.tuner_ops.get_if_frequency) {
96 if_khz = priv->cfg.if_dvbt2_5; 116 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
97 i = 0; 117 if (ret)
98 bw_param = 3; 118 goto error;
99 break; 119 } else
100 case 6000000: 120 if_freq = 0;
101 if_khz = priv->cfg.if_dvbt2_6; 121
102 i = 1; 122 dbg("%s: if_freq=%d", __func__, if_freq);
103 bw_param = 2;
104 break;
105 case 7000000:
106 if_khz = priv->cfg.if_dvbt2_7;
107 i = 2;
108 bw_param = 1;
109 break;
110 case 8000000:
111 if_khz = priv->cfg.if_dvbt2_8;
112 i = 3;
113 bw_param = 0;
114 break;
115 default:
116 return -EINVAL;
117 }
118 123
119 num = if_khz; 124 num = if_freq / 1000; /* Hz => kHz */
120 num *= 0x1000000; 125 num *= 0x1000000;
121 if_ctl = cxd2820r_div_u64_round_closest(num, 41000); 126 if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
122 buf[0] = ((if_ctl >> 16) & 0xff); 127 buf[0] = ((if_ctl >> 16) & 0xff);
@@ -127,7 +132,7 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe,
127 if (ret) 132 if (ret)
128 goto error; 133 goto error;
129 134
130 ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[i], 5); 135 ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[bw_i], 5);
131 if (ret) 136 if (ret)
132 goto error; 137 goto error;
133 138
@@ -150,8 +155,7 @@ error:
150 155
151} 156}
152 157
153int cxd2820r_get_frontend_t2(struct dvb_frontend *fe, 158int cxd2820r_get_frontend_t2(struct dvb_frontend *fe)
154 struct dvb_frontend_parameters *p)
155{ 159{
156 struct cxd2820r_priv *priv = fe->demodulator_priv; 160 struct cxd2820r_priv *priv = fe->demodulator_priv;
157 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 161 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
diff --git a/drivers/media/dvb/frontends/dib0070.c b/drivers/media/dvb/frontends/dib0070.c
index dc1cb17a6ea..3b024bfe980 100644
--- a/drivers/media/dvb/frontends/dib0070.c
+++ b/drivers/media/dvb/frontends/dib0070.c
@@ -150,7 +150,7 @@ static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
150 } \ 150 } \
151} while (0) 151} while (0)
152 152
153static int dib0070_set_bandwidth(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch) 153static int dib0070_set_bandwidth(struct dvb_frontend *fe)
154{ 154{
155 struct dib0070_state *state = fe->tuner_priv; 155 struct dib0070_state *state = fe->tuner_priv;
156 u16 tmp = dib0070_read_reg(state, 0x02) & 0x3fff; 156 u16 tmp = dib0070_read_reg(state, 0x02) & 0x3fff;
@@ -335,7 +335,7 @@ static const struct dib0070_lna_match dib0070_lna[] = {
335}; 335};
336 336
337#define LPF 100 337#define LPF 100
338static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch) 338static int dib0070_tune_digital(struct dvb_frontend *fe)
339{ 339{
340 struct dib0070_state *state = fe->tuner_priv; 340 struct dib0070_state *state = fe->tuner_priv;
341 341
@@ -507,7 +507,7 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par
507 507
508 *tune_state = CT_TUNER_STEP_5; 508 *tune_state = CT_TUNER_STEP_5;
509 } else if (*tune_state == CT_TUNER_STEP_5) { 509 } else if (*tune_state == CT_TUNER_STEP_5) {
510 dib0070_set_bandwidth(fe, ch); 510 dib0070_set_bandwidth(fe);
511 *tune_state = CT_TUNER_STOP; 511 *tune_state = CT_TUNER_STOP;
512 } else { 512 } else {
513 ret = FE_CALLBACK_TIME_NEVER; /* tuner finished, time to call again infinite */ 513 ret = FE_CALLBACK_TIME_NEVER; /* tuner finished, time to call again infinite */
@@ -516,7 +516,7 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par
516} 516}
517 517
518 518
519static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 519static int dib0070_tune(struct dvb_frontend *fe)
520{ 520{
521 struct dib0070_state *state = fe->tuner_priv; 521 struct dib0070_state *state = fe->tuner_priv;
522 uint32_t ret; 522 uint32_t ret;
@@ -524,7 +524,7 @@ static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters
524 state->tune_state = CT_TUNER_START; 524 state->tune_state = CT_TUNER_START;
525 525
526 do { 526 do {
527 ret = dib0070_tune_digital(fe, p); 527 ret = dib0070_tune_digital(fe);
528 if (ret != FE_CALLBACK_TIME_NEVER) 528 if (ret != FE_CALLBACK_TIME_NEVER)
529 msleep(ret/10); 529 msleep(ret/10);
530 else 530 else
diff --git a/drivers/media/dvb/frontends/dib0090.c b/drivers/media/dvb/frontends/dib0090.c
index b174d1c7858..224d81e8509 100644
--- a/drivers/media/dvb/frontends/dib0090.c
+++ b/drivers/media/dvb/frontends/dib0090.c
@@ -717,6 +717,34 @@ static const u16 rf_ramp_pwm_cband_7090[] = {
717 (0 << 10) | 109, /* RF_RAMP4, LNA 4 */ 717 (0 << 10) | 109, /* RF_RAMP4, LNA 4 */
718}; 718};
719 719
720static const uint16_t rf_ramp_pwm_cband_7090e_sensitivity[] = {
721 186,
722 40,
723 746,
724 (10 << 10) | 345,
725 (0 << 10) | 746,
726 (0 << 10) | 0,
727 (0 << 10) | 0,
728 (28 << 10) | 200,
729 (0 << 10) | 345,
730 (20 << 10) | 0,
731 (0 << 10) | 200,
732};
733
734static const uint16_t rf_ramp_pwm_cband_7090e_aci[] = {
735 86,
736 40,
737 345,
738 (0 << 10) | 0,
739 (0 << 10) | 0,
740 (0 << 10) | 0,
741 (0 << 10) | 0,
742 (28 << 10) | 200,
743 (0 << 10) | 345,
744 (20 << 10) | 0,
745 (0 << 10) | 200,
746};
747
720static const u16 rf_ramp_pwm_cband_8090[] = { 748static const u16 rf_ramp_pwm_cband_8090[] = {
721 345, /* max RF gain in 10th of dB */ 749 345, /* max RF gain in 10th of dB */
722 29, /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */ 750 29, /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
@@ -1076,8 +1104,16 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
1076 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs); 1104 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs);
1077 if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1) 1105 if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1)
1078 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_8090); 1106 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_8090);
1079 else if (state->identity.version == SOC_7090_P1G_11R1 || state->identity.version == SOC_7090_P1G_21R1) 1107 else if (state->identity.version == SOC_7090_P1G_11R1
1080 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090); 1108 || state->identity.version == SOC_7090_P1G_21R1) {
1109 if (state->config->is_dib7090e) {
1110 if (state->rf_ramp == NULL)
1111 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090e_sensitivity);
1112 else
1113 dib0090_set_rframp_pwm(state, state->rf_ramp);
1114 } else
1115 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090);
1116 }
1081 } else { 1117 } else {
1082 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband); 1118 dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband);
1083 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal); 1119 dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
@@ -1112,13 +1148,21 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
1112 else 1148 else
1113 dib0090_write_reg(state, 0x32, (0 << 11)); 1149 dib0090_write_reg(state, 0x32, (0 << 11));
1114 1150
1115 dib0090_write_reg(state, 0x04, 0x01); 1151 dib0090_write_reg(state, 0x04, 0x03);
1116 dib0090_write_reg(state, 0x39, (1 << 10)); 1152 dib0090_write_reg(state, 0x39, (1 << 10));
1117 } 1153 }
1118} 1154}
1119 1155
1120EXPORT_SYMBOL(dib0090_pwm_gain_reset); 1156EXPORT_SYMBOL(dib0090_pwm_gain_reset);
1121 1157
1158void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff)
1159{
1160 struct dib0090_state *state = fe->tuner_priv;
1161 if (DC_servo_cutoff < 4)
1162 dib0090_write_reg(state, 0x04, DC_servo_cutoff);
1163}
1164EXPORT_SYMBOL(dib0090_set_dc_servo);
1165
1122static u32 dib0090_get_slow_adc_val(struct dib0090_state *state) 1166static u32 dib0090_get_slow_adc_val(struct dib0090_state *state)
1123{ 1167{
1124 u16 adc_val = dib0090_read_reg(state, 0x1d); 1168 u16 adc_val = dib0090_read_reg(state, 0x1d);
@@ -1305,7 +1349,7 @@ void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 *
1305 1349
1306EXPORT_SYMBOL(dib0090_get_current_gain); 1350EXPORT_SYMBOL(dib0090_get_current_gain);
1307 1351
1308u16 dib0090_get_wbd_offset(struct dvb_frontend *fe) 1352u16 dib0090_get_wbd_target(struct dvb_frontend *fe)
1309{ 1353{
1310 struct dib0090_state *state = fe->tuner_priv; 1354 struct dib0090_state *state = fe->tuner_priv;
1311 u32 f_MHz = state->fe->dtv_property_cache.frequency / 1000000; 1355 u32 f_MHz = state->fe->dtv_property_cache.frequency / 1000000;
@@ -1342,9 +1386,57 @@ u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
1342 1386
1343 return state->wbd_offset + wbd_tcold; 1387 return state->wbd_offset + wbd_tcold;
1344} 1388}
1389EXPORT_SYMBOL(dib0090_get_wbd_target);
1345 1390
1391u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
1392{
1393 struct dib0090_state *state = fe->tuner_priv;
1394 return state->wbd_offset;
1395}
1346EXPORT_SYMBOL(dib0090_get_wbd_offset); 1396EXPORT_SYMBOL(dib0090_get_wbd_offset);
1347 1397
1398int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3)
1399{
1400 struct dib0090_state *state = fe->tuner_priv;
1401
1402 dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xfff8)
1403 | ((sw3 & 1) << 2) | ((sw2 & 1) << 1) | (sw1 & 1));
1404
1405 return 0;
1406}
1407EXPORT_SYMBOL(dib0090_set_switch);
1408
1409int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff)
1410{
1411 struct dib0090_state *state = fe->tuner_priv;
1412
1413 dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x7fff)
1414 | ((onoff & 1) << 15));
1415 return 0;
1416}
1417EXPORT_SYMBOL(dib0090_set_vga);
1418
1419int dib0090_update_rframp_7090(struct dvb_frontend *fe, u8 cfg_sensitivity)
1420{
1421 struct dib0090_state *state = fe->tuner_priv;
1422
1423 if ((!state->identity.p1g) || (!state->identity.in_soc)
1424 || ((state->identity.version != SOC_7090_P1G_21R1)
1425 && (state->identity.version != SOC_7090_P1G_11R1))) {
1426 dprintk("%s() function can only be used for dib7090P", __func__);
1427 return -ENODEV;
1428 }
1429
1430 if (cfg_sensitivity)
1431 state->rf_ramp = (const u16 *)&rf_ramp_pwm_cband_7090e_sensitivity;
1432 else
1433 state->rf_ramp = (const u16 *)&rf_ramp_pwm_cband_7090e_aci;
1434 dib0090_pwm_gain_reset(fe);
1435
1436 return 0;
1437}
1438EXPORT_SYMBOL(dib0090_update_rframp_7090);
1439
1348static const u16 dib0090_defaults[] = { 1440static const u16 dib0090_defaults[] = {
1349 1441
1350 25, 0x01, 1442 25, 0x01,
@@ -1430,7 +1522,7 @@ static void dib0090_set_default_config(struct dib0090_state *state, const u16 *
1430#define POLY_MIN (u8) 0 1522#define POLY_MIN (u8) 0
1431#define POLY_MAX (u8) 8 1523#define POLY_MAX (u8) 8
1432 1524
1433void dib0090_set_EFUSE(struct dib0090_state *state) 1525static void dib0090_set_EFUSE(struct dib0090_state *state)
1434{ 1526{
1435 u8 c, h, n; 1527 u8 c, h, n;
1436 u16 e2, e4; 1528 u16 e2, e4;
@@ -1505,7 +1597,10 @@ static int dib0090_reset(struct dvb_frontend *fe)
1505 dib0090_set_EFUSE(state); 1597 dib0090_set_EFUSE(state);
1506 1598
1507 /* Congigure in function of the crystal */ 1599 /* Congigure in function of the crystal */
1508 if (state->config->io.clock_khz >= 24000) 1600 if (state->config->force_crystal_mode != 0)
1601 dib0090_write_reg(state, 0x14,
1602 state->config->force_crystal_mode & 3);
1603 else if (state->config->io.clock_khz >= 24000)
1509 dib0090_write_reg(state, 0x14, 1); 1604 dib0090_write_reg(state, 0x14, 1);
1510 else 1605 else
1511 dib0090_write_reg(state, 0x14, 2); 1606 dib0090_write_reg(state, 0x14, 2);
@@ -1951,6 +2046,52 @@ static const struct dib0090_tuning dib0090_tuning_table_cband_7090[] = {
1951#endif 2046#endif
1952}; 2047};
1953 2048
2049static const struct dib0090_tuning dib0090_tuning_table_cband_7090e_sensitivity[] = {
2050#ifdef CONFIG_BAND_CBAND
2051 { 300000, 0 , 3, 0x8105, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
2052 { 380000, 0 , 10, 0x810F, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
2053 { 600000, 0 , 10, 0x815E, 0x280, 0x2d12, 0xb84e, EN_CAB },
2054 { 660000, 0 , 5, 0x85E3, 0x280, 0x2d12, 0xb84e, EN_CAB },
2055 { 720000, 0 , 5, 0x852E, 0x280, 0x2d12, 0xb84e, EN_CAB },
2056 { 860000, 0 , 4, 0x85E5, 0x280, 0x2d12, 0xb84e, EN_CAB },
2057#endif
2058};
2059
2060int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
2061 u8 cfg_sensitivity)
2062{
2063 struct dib0090_state *state = fe->tuner_priv;
2064 const struct dib0090_tuning *tune =
2065 dib0090_tuning_table_cband_7090e_sensitivity;
2066 const struct dib0090_tuning dib0090_tuning_table_cband_7090e_aci[] = {
2067 { 300000, 0 , 3, 0x8165, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
2068 { 650000, 0 , 4, 0x815B, 0x280, 0x2d12, 0xb84e, EN_CAB },
2069 { 860000, 0 , 5, 0x84EF, 0x280, 0x2d12, 0xb84e, EN_CAB },
2070 };
2071
2072 if ((!state->identity.p1g) || (!state->identity.in_soc)
2073 || ((state->identity.version != SOC_7090_P1G_21R1)
2074 && (state->identity.version != SOC_7090_P1G_11R1))) {
2075 dprintk("%s() function can only be used for dib7090", __func__);
2076 return -ENODEV;
2077 }
2078
2079 if (cfg_sensitivity)
2080 tune = dib0090_tuning_table_cband_7090e_sensitivity;
2081 else
2082 tune = dib0090_tuning_table_cband_7090e_aci;
2083
2084 while (state->rf_request > tune->max_freq)
2085 tune++;
2086
2087 dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x8000)
2088 | (tune->lna_bias & 0x7fff));
2089 dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xf83f)
2090 | ((tune->lna_tune << 6) & 0x07c0));
2091 return 0;
2092}
2093EXPORT_SYMBOL(dib0090_update_tuning_table_7090);
2094
1954static int dib0090_captrim_search(struct dib0090_state *state, enum frontend_tune_state *tune_state) 2095static int dib0090_captrim_search(struct dib0090_state *state, enum frontend_tune_state *tune_state)
1955{ 2096{
1956 int ret = 0; 2097 int ret = 0;
@@ -2199,12 +2340,18 @@ static int dib0090_tune(struct dvb_frontend *fe)
2199 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF 2340 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF
2200 || state->current_band & BAND_UHF) { 2341 || state->current_band & BAND_UHF) {
2201 state->current_band = BAND_CBAND; 2342 state->current_band = BAND_CBAND;
2202 tune = dib0090_tuning_table_cband_7090; 2343 if (state->config->is_dib7090e)
2344 tune = dib0090_tuning_table_cband_7090e_sensitivity;
2345 else
2346 tune = dib0090_tuning_table_cband_7090;
2203 } 2347 }
2204 } else { /* Use the CBAND input for all band under UHF */ 2348 } else { /* Use the CBAND input for all band under UHF */
2205 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF) { 2349 if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF) {
2206 state->current_band = BAND_CBAND; 2350 state->current_band = BAND_CBAND;
2207 tune = dib0090_tuning_table_cband_7090; 2351 if (state->config->is_dib7090e)
2352 tune = dib0090_tuning_table_cband_7090e_sensitivity;
2353 else
2354 tune = dib0090_tuning_table_cband_7090;
2208 } 2355 }
2209 } 2356 }
2210 } else 2357 } else
@@ -2419,7 +2566,7 @@ static int dib0090_get_frequency(struct dvb_frontend *fe, u32 * frequency)
2419 return 0; 2566 return 0;
2420} 2567}
2421 2568
2422static int dib0090_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 2569static int dib0090_set_params(struct dvb_frontend *fe)
2423{ 2570{
2424 struct dib0090_state *state = fe->tuner_priv; 2571 struct dib0090_state *state = fe->tuner_priv;
2425 u32 ret; 2572 u32 ret;
diff --git a/drivers/media/dvb/frontends/dib0090.h b/drivers/media/dvb/frontends/dib0090.h
index 13d85244ec1..781dc49de45 100644
--- a/drivers/media/dvb/frontends/dib0090.h
+++ b/drivers/media/dvb/frontends/dib0090.h
@@ -71,6 +71,8 @@ struct dib0090_config {
71 u8 fref_clock_ratio; 71 u8 fref_clock_ratio;
72 u16 force_cband_input; 72 u16 force_cband_input;
73 struct dib0090_wbd_slope *wbd; 73 struct dib0090_wbd_slope *wbd;
74 u8 is_dib7090e;
75 u8 force_crystal_mode;
74}; 76};
75 77
76#if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE)) 78#if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE))
@@ -78,13 +80,21 @@ extern struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c
78extern struct dvb_frontend *dib0090_fw_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config); 80extern struct dvb_frontend *dib0090_fw_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config);
79extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast); 81extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast);
80extern void dib0090_pwm_gain_reset(struct dvb_frontend *fe); 82extern void dib0090_pwm_gain_reset(struct dvb_frontend *fe);
81extern u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner); 83extern u16 dib0090_get_wbd_target(struct dvb_frontend *tuner);
84extern u16 dib0090_get_wbd_offset(struct dvb_frontend *fe);
82extern int dib0090_gain_control(struct dvb_frontend *fe); 85extern int dib0090_gain_control(struct dvb_frontend *fe);
83extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe); 86extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe);
84extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state); 87extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state);
85extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt); 88extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt);
89extern void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff);
90extern int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3);
91extern int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff);
92extern int dib0090_update_rframp_7090(struct dvb_frontend *fe,
93 u8 cfg_sensitivity);
94extern int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
95 u8 cfg_sensitivity);
86#else 96#else
87static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config) 97static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config)
88{ 98{
89 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 99 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
90 return NULL; 100 return NULL;
@@ -106,7 +116,13 @@ static inline void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
106 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 116 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
107} 117}
108 118
109static inline u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner) 119static inline u16 dib0090_get_wbd_target(struct dvb_frontend *tuner)
120{
121 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
122 return 0;
123}
124
125static inline u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
110{ 126{
111 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 127 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
112 return 0; 128 return 0;
@@ -134,6 +150,38 @@ static inline void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u
134{ 150{
135 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 151 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
136} 152}
153
154static inline void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff)
155{
156 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
157}
158
159static inline int dib0090_set_switch(struct dvb_frontend *fe,
160 u8 sw1, u8 sw2, u8 sw3)
161{
162 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
163 return -ENODEV;
164}
165
166static inline int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff)
167{
168 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
169 return -ENODEV;
170}
171
172static inline int dib0090_update_rframp_7090(struct dvb_frontend *fe,
173 u8 cfg_sensitivity)
174{
175 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
176 return -ENODEV;
177}
178
179static inline int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
180 u8 cfg_sensitivity)
181{
182 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
183 return -ENODEV;
184}
137#endif 185#endif
138 186
139#endif 187#endif
diff --git a/drivers/media/dvb/frontends/dib3000mb.c b/drivers/media/dvb/frontends/dib3000mb.c
index 437904cbf3e..af91e0c9233 100644
--- a/drivers/media/dvb/frontends/dib3000mb.c
+++ b/drivers/media/dvb/frontends/dib3000mb.c
@@ -112,39 +112,37 @@ static u16 dib3000_seq[2][2][2] = /* fft,gua, inv */
112 } 112 }
113 }; 113 };
114 114
115static int dib3000mb_get_frontend(struct dvb_frontend* fe, 115static int dib3000mb_get_frontend(struct dvb_frontend* fe);
116 struct dvb_frontend_parameters *fep);
117 116
118static int dib3000mb_set_frontend(struct dvb_frontend* fe, 117static int dib3000mb_set_frontend(struct dvb_frontend *fe, int tuner)
119 struct dvb_frontend_parameters *fep, int tuner)
120{ 118{
121 struct dib3000_state* state = fe->demodulator_priv; 119 struct dib3000_state* state = fe->demodulator_priv;
122 struct dvb_ofdm_parameters *ofdm = &fep->u.ofdm; 120 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
123 fe_code_rate_t fe_cr = FEC_NONE; 121 fe_code_rate_t fe_cr = FEC_NONE;
124 int search_state, seq; 122 int search_state, seq;
125 123
126 if (tuner && fe->ops.tuner_ops.set_params) { 124 if (tuner && fe->ops.tuner_ops.set_params) {
127 fe->ops.tuner_ops.set_params(fe, fep); 125 fe->ops.tuner_ops.set_params(fe);
128 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 126 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
129 127
130 deb_setf("bandwidth: "); 128 deb_setf("bandwidth: ");
131 switch (ofdm->bandwidth) { 129 switch (c->bandwidth_hz) {
132 case BANDWIDTH_8_MHZ: 130 case 8000000:
133 deb_setf("8 MHz\n"); 131 deb_setf("8 MHz\n");
134 wr_foreach(dib3000mb_reg_timing_freq, dib3000mb_timing_freq[2]); 132 wr_foreach(dib3000mb_reg_timing_freq, dib3000mb_timing_freq[2]);
135 wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_8mhz); 133 wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_8mhz);
136 break; 134 break;
137 case BANDWIDTH_7_MHZ: 135 case 7000000:
138 deb_setf("7 MHz\n"); 136 deb_setf("7 MHz\n");
139 wr_foreach(dib3000mb_reg_timing_freq, dib3000mb_timing_freq[1]); 137 wr_foreach(dib3000mb_reg_timing_freq, dib3000mb_timing_freq[1]);
140 wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_7mhz); 138 wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_7mhz);
141 break; 139 break;
142 case BANDWIDTH_6_MHZ: 140 case 6000000:
143 deb_setf("6 MHz\n"); 141 deb_setf("6 MHz\n");
144 wr_foreach(dib3000mb_reg_timing_freq, dib3000mb_timing_freq[0]); 142 wr_foreach(dib3000mb_reg_timing_freq, dib3000mb_timing_freq[0]);
145 wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_6mhz); 143 wr_foreach(dib3000mb_reg_bandwidth, dib3000mb_bandwidth_6mhz);
146 break; 144 break;
147 case BANDWIDTH_AUTO: 145 case 0:
148 return -EOPNOTSUPP; 146 return -EOPNOTSUPP;
149 default: 147 default:
150 err("unknown bandwidth value."); 148 err("unknown bandwidth value.");
@@ -154,7 +152,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
154 wr(DIB3000MB_REG_LOCK1_MASK, DIB3000MB_LOCK1_SEARCH_4); 152 wr(DIB3000MB_REG_LOCK1_MASK, DIB3000MB_LOCK1_SEARCH_4);
155 153
156 deb_setf("transmission mode: "); 154 deb_setf("transmission mode: ");
157 switch (ofdm->transmission_mode) { 155 switch (c->transmission_mode) {
158 case TRANSMISSION_MODE_2K: 156 case TRANSMISSION_MODE_2K:
159 deb_setf("2k\n"); 157 deb_setf("2k\n");
160 wr(DIB3000MB_REG_FFT, DIB3000_TRANSMISSION_MODE_2K); 158 wr(DIB3000MB_REG_FFT, DIB3000_TRANSMISSION_MODE_2K);
@@ -171,7 +169,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
171 } 169 }
172 170
173 deb_setf("guard: "); 171 deb_setf("guard: ");
174 switch (ofdm->guard_interval) { 172 switch (c->guard_interval) {
175 case GUARD_INTERVAL_1_32: 173 case GUARD_INTERVAL_1_32:
176 deb_setf("1_32\n"); 174 deb_setf("1_32\n");
177 wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_32); 175 wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_32);
@@ -196,7 +194,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
196 } 194 }
197 195
198 deb_setf("inversion: "); 196 deb_setf("inversion: ");
199 switch (fep->inversion) { 197 switch (c->inversion) {
200 case INVERSION_OFF: 198 case INVERSION_OFF:
201 deb_setf("off\n"); 199 deb_setf("off\n");
202 wr(DIB3000MB_REG_DDS_INV, DIB3000_DDS_INVERSION_OFF); 200 wr(DIB3000MB_REG_DDS_INV, DIB3000_DDS_INVERSION_OFF);
@@ -212,8 +210,8 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
212 return -EINVAL; 210 return -EINVAL;
213 } 211 }
214 212
215 deb_setf("constellation: "); 213 deb_setf("modulation: ");
216 switch (ofdm->constellation) { 214 switch (c->modulation) {
217 case QPSK: 215 case QPSK:
218 deb_setf("qpsk\n"); 216 deb_setf("qpsk\n");
219 wr(DIB3000MB_REG_QAM, DIB3000_CONSTELLATION_QPSK); 217 wr(DIB3000MB_REG_QAM, DIB3000_CONSTELLATION_QPSK);
@@ -232,7 +230,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
232 return -EINVAL; 230 return -EINVAL;
233 } 231 }
234 deb_setf("hierarchy: "); 232 deb_setf("hierarchy: ");
235 switch (ofdm->hierarchy_information) { 233 switch (c->hierarchy) {
236 case HIERARCHY_NONE: 234 case HIERARCHY_NONE:
237 deb_setf("none "); 235 deb_setf("none ");
238 /* fall through */ 236 /* fall through */
@@ -256,16 +254,16 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
256 } 254 }
257 255
258 deb_setf("hierarchy: "); 256 deb_setf("hierarchy: ");
259 if (ofdm->hierarchy_information == HIERARCHY_NONE) { 257 if (c->hierarchy == HIERARCHY_NONE) {
260 deb_setf("none\n"); 258 deb_setf("none\n");
261 wr(DIB3000MB_REG_VIT_HRCH, DIB3000_HRCH_OFF); 259 wr(DIB3000MB_REG_VIT_HRCH, DIB3000_HRCH_OFF);
262 wr(DIB3000MB_REG_VIT_HP, DIB3000_SELECT_HP); 260 wr(DIB3000MB_REG_VIT_HP, DIB3000_SELECT_HP);
263 fe_cr = ofdm->code_rate_HP; 261 fe_cr = c->code_rate_HP;
264 } else if (ofdm->hierarchy_information != HIERARCHY_AUTO) { 262 } else if (c->hierarchy != HIERARCHY_AUTO) {
265 deb_setf("on\n"); 263 deb_setf("on\n");
266 wr(DIB3000MB_REG_VIT_HRCH, DIB3000_HRCH_ON); 264 wr(DIB3000MB_REG_VIT_HRCH, DIB3000_HRCH_ON);
267 wr(DIB3000MB_REG_VIT_HP, DIB3000_SELECT_LP); 265 wr(DIB3000MB_REG_VIT_HP, DIB3000_SELECT_LP);
268 fe_cr = ofdm->code_rate_LP; 266 fe_cr = c->code_rate_LP;
269 } 267 }
270 deb_setf("fec: "); 268 deb_setf("fec: ");
271 switch (fe_cr) { 269 switch (fe_cr) {
@@ -300,9 +298,9 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
300 } 298 }
301 299
302 seq = dib3000_seq 300 seq = dib3000_seq
303 [ofdm->transmission_mode == TRANSMISSION_MODE_AUTO] 301 [c->transmission_mode == TRANSMISSION_MODE_AUTO]
304 [ofdm->guard_interval == GUARD_INTERVAL_AUTO] 302 [c->guard_interval == GUARD_INTERVAL_AUTO]
305 [fep->inversion == INVERSION_AUTO]; 303 [c->inversion == INVERSION_AUTO];
306 304
307 deb_setf("seq? %d\n", seq); 305 deb_setf("seq? %d\n", seq);
308 306
@@ -310,8 +308,8 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
310 308
311 wr(DIB3000MB_REG_ISI, seq ? DIB3000MB_ISI_INHIBIT : DIB3000MB_ISI_ACTIVATE); 309 wr(DIB3000MB_REG_ISI, seq ? DIB3000MB_ISI_INHIBIT : DIB3000MB_ISI_ACTIVATE);
312 310
313 if (ofdm->transmission_mode == TRANSMISSION_MODE_2K) { 311 if (c->transmission_mode == TRANSMISSION_MODE_2K) {
314 if (ofdm->guard_interval == GUARD_INTERVAL_1_8) { 312 if (c->guard_interval == GUARD_INTERVAL_1_8) {
315 wr(DIB3000MB_REG_SYNC_IMPROVEMENT, DIB3000MB_SYNC_IMPROVE_2K_1_8); 313 wr(DIB3000MB_REG_SYNC_IMPROVEMENT, DIB3000MB_SYNC_IMPROVE_2K_1_8);
316 } else { 314 } else {
317 wr(DIB3000MB_REG_SYNC_IMPROVEMENT, DIB3000MB_SYNC_IMPROVE_DEFAULT); 315 wr(DIB3000MB_REG_SYNC_IMPROVEMENT, DIB3000MB_SYNC_IMPROVE_DEFAULT);
@@ -339,10 +337,10 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
339 wr_foreach(dib3000mb_reg_agc_bandwidth, dib3000mb_agc_bandwidth_low); 337 wr_foreach(dib3000mb_reg_agc_bandwidth, dib3000mb_agc_bandwidth_low);
340 338
341 /* something has to be auto searched */ 339 /* something has to be auto searched */
342 if (ofdm->constellation == QAM_AUTO || 340 if (c->modulation == QAM_AUTO ||
343 ofdm->hierarchy_information == HIERARCHY_AUTO || 341 c->hierarchy == HIERARCHY_AUTO ||
344 fe_cr == FEC_AUTO || 342 fe_cr == FEC_AUTO ||
345 fep->inversion == INVERSION_AUTO) { 343 c->inversion == INVERSION_AUTO) {
346 int as_count=0; 344 int as_count=0;
347 345
348 deb_setf("autosearch enabled.\n"); 346 deb_setf("autosearch enabled.\n");
@@ -361,10 +359,9 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
361 deb_setf("search_state after autosearch %d after %d checks\n",search_state,as_count); 359 deb_setf("search_state after autosearch %d after %d checks\n",search_state,as_count);
362 360
363 if (search_state == 1) { 361 if (search_state == 1) {
364 struct dvb_frontend_parameters feps; 362 if (dib3000mb_get_frontend(fe) == 0) {
365 if (dib3000mb_get_frontend(fe, &feps) == 0) {
366 deb_setf("reading tuning data from frontend succeeded.\n"); 363 deb_setf("reading tuning data from frontend succeeded.\n");
367 return dib3000mb_set_frontend(fe, &feps, 0); 364 return dib3000mb_set_frontend(fe, 0);
368 } 365 }
369 } 366 }
370 367
@@ -453,11 +450,10 @@ static int dib3000mb_fe_init(struct dvb_frontend* fe, int mobile_mode)
453 return 0; 450 return 0;
454} 451}
455 452
456static int dib3000mb_get_frontend(struct dvb_frontend* fe, 453static int dib3000mb_get_frontend(struct dvb_frontend* fe)
457 struct dvb_frontend_parameters *fep)
458{ 454{
455 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
459 struct dib3000_state* state = fe->demodulator_priv; 456 struct dib3000_state* state = fe->demodulator_priv;
460 struct dvb_ofdm_parameters *ofdm = &fep->u.ofdm;
461 fe_code_rate_t *cr; 457 fe_code_rate_t *cr;
462 u16 tps_val; 458 u16 tps_val;
463 int inv_test1,inv_test2; 459 int inv_test1,inv_test2;
@@ -484,25 +480,25 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
484 else 480 else
485 inv_test2 = 2; 481 inv_test2 = 2;
486 482
487 fep->inversion = 483 c->inversion =
488 ((inv_test2 == 2) && (inv_test1==1 || inv_test1==0)) || 484 ((inv_test2 == 2) && (inv_test1==1 || inv_test1==0)) ||
489 ((inv_test2 == 0) && (inv_test1==1 || inv_test1==2)) ? 485 ((inv_test2 == 0) && (inv_test1==1 || inv_test1==2)) ?
490 INVERSION_ON : INVERSION_OFF; 486 INVERSION_ON : INVERSION_OFF;
491 487
492 deb_getf("inversion %d %d, %d\n", inv_test2, inv_test1, fep->inversion); 488 deb_getf("inversion %d %d, %d\n", inv_test2, inv_test1, c->inversion);
493 489
494 switch ((tps_val = rd(DIB3000MB_REG_TPS_QAM))) { 490 switch ((tps_val = rd(DIB3000MB_REG_TPS_QAM))) {
495 case DIB3000_CONSTELLATION_QPSK: 491 case DIB3000_CONSTELLATION_QPSK:
496 deb_getf("QPSK "); 492 deb_getf("QPSK ");
497 ofdm->constellation = QPSK; 493 c->modulation = QPSK;
498 break; 494 break;
499 case DIB3000_CONSTELLATION_16QAM: 495 case DIB3000_CONSTELLATION_16QAM:
500 deb_getf("QAM16 "); 496 deb_getf("QAM16 ");
501 ofdm->constellation = QAM_16; 497 c->modulation = QAM_16;
502 break; 498 break;
503 case DIB3000_CONSTELLATION_64QAM: 499 case DIB3000_CONSTELLATION_64QAM:
504 deb_getf("QAM64 "); 500 deb_getf("QAM64 ");
505 ofdm->constellation = QAM_64; 501 c->modulation = QAM_64;
506 break; 502 break;
507 default: 503 default:
508 err("Unexpected constellation returned by TPS (%d)", tps_val); 504 err("Unexpected constellation returned by TPS (%d)", tps_val);
@@ -512,24 +508,24 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
512 508
513 if (rd(DIB3000MB_REG_TPS_HRCH)) { 509 if (rd(DIB3000MB_REG_TPS_HRCH)) {
514 deb_getf("HRCH ON\n"); 510 deb_getf("HRCH ON\n");
515 cr = &ofdm->code_rate_LP; 511 cr = &c->code_rate_LP;
516 ofdm->code_rate_HP = FEC_NONE; 512 c->code_rate_HP = FEC_NONE;
517 switch ((tps_val = rd(DIB3000MB_REG_TPS_VIT_ALPHA))) { 513 switch ((tps_val = rd(DIB3000MB_REG_TPS_VIT_ALPHA))) {
518 case DIB3000_ALPHA_0: 514 case DIB3000_ALPHA_0:
519 deb_getf("HIERARCHY_NONE "); 515 deb_getf("HIERARCHY_NONE ");
520 ofdm->hierarchy_information = HIERARCHY_NONE; 516 c->hierarchy = HIERARCHY_NONE;
521 break; 517 break;
522 case DIB3000_ALPHA_1: 518 case DIB3000_ALPHA_1:
523 deb_getf("HIERARCHY_1 "); 519 deb_getf("HIERARCHY_1 ");
524 ofdm->hierarchy_information = HIERARCHY_1; 520 c->hierarchy = HIERARCHY_1;
525 break; 521 break;
526 case DIB3000_ALPHA_2: 522 case DIB3000_ALPHA_2:
527 deb_getf("HIERARCHY_2 "); 523 deb_getf("HIERARCHY_2 ");
528 ofdm->hierarchy_information = HIERARCHY_2; 524 c->hierarchy = HIERARCHY_2;
529 break; 525 break;
530 case DIB3000_ALPHA_4: 526 case DIB3000_ALPHA_4:
531 deb_getf("HIERARCHY_4 "); 527 deb_getf("HIERARCHY_4 ");
532 ofdm->hierarchy_information = HIERARCHY_4; 528 c->hierarchy = HIERARCHY_4;
533 break; 529 break;
534 default: 530 default:
535 err("Unexpected ALPHA value returned by TPS (%d)", tps_val); 531 err("Unexpected ALPHA value returned by TPS (%d)", tps_val);
@@ -540,9 +536,9 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
540 tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_LP); 536 tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_LP);
541 } else { 537 } else {
542 deb_getf("HRCH OFF\n"); 538 deb_getf("HRCH OFF\n");
543 cr = &ofdm->code_rate_HP; 539 cr = &c->code_rate_HP;
544 ofdm->code_rate_LP = FEC_NONE; 540 c->code_rate_LP = FEC_NONE;
545 ofdm->hierarchy_information = HIERARCHY_NONE; 541 c->hierarchy = HIERARCHY_NONE;
546 542
547 tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_HP); 543 tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_HP);
548 } 544 }
@@ -577,19 +573,19 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
577 switch ((tps_val = rd(DIB3000MB_REG_TPS_GUARD_TIME))) { 573 switch ((tps_val = rd(DIB3000MB_REG_TPS_GUARD_TIME))) {
578 case DIB3000_GUARD_TIME_1_32: 574 case DIB3000_GUARD_TIME_1_32:
579 deb_getf("GUARD_INTERVAL_1_32 "); 575 deb_getf("GUARD_INTERVAL_1_32 ");
580 ofdm->guard_interval = GUARD_INTERVAL_1_32; 576 c->guard_interval = GUARD_INTERVAL_1_32;
581 break; 577 break;
582 case DIB3000_GUARD_TIME_1_16: 578 case DIB3000_GUARD_TIME_1_16:
583 deb_getf("GUARD_INTERVAL_1_16 "); 579 deb_getf("GUARD_INTERVAL_1_16 ");
584 ofdm->guard_interval = GUARD_INTERVAL_1_16; 580 c->guard_interval = GUARD_INTERVAL_1_16;
585 break; 581 break;
586 case DIB3000_GUARD_TIME_1_8: 582 case DIB3000_GUARD_TIME_1_8:
587 deb_getf("GUARD_INTERVAL_1_8 "); 583 deb_getf("GUARD_INTERVAL_1_8 ");
588 ofdm->guard_interval = GUARD_INTERVAL_1_8; 584 c->guard_interval = GUARD_INTERVAL_1_8;
589 break; 585 break;
590 case DIB3000_GUARD_TIME_1_4: 586 case DIB3000_GUARD_TIME_1_4:
591 deb_getf("GUARD_INTERVAL_1_4 "); 587 deb_getf("GUARD_INTERVAL_1_4 ");
592 ofdm->guard_interval = GUARD_INTERVAL_1_4; 588 c->guard_interval = GUARD_INTERVAL_1_4;
593 break; 589 break;
594 default: 590 default:
595 err("Unexpected Guard Time returned by TPS (%d)", tps_val); 591 err("Unexpected Guard Time returned by TPS (%d)", tps_val);
@@ -600,11 +596,11 @@ static int dib3000mb_get_frontend(struct dvb_frontend* fe,
600 switch ((tps_val = rd(DIB3000MB_REG_TPS_FFT))) { 596 switch ((tps_val = rd(DIB3000MB_REG_TPS_FFT))) {
601 case DIB3000_TRANSMISSION_MODE_2K: 597 case DIB3000_TRANSMISSION_MODE_2K:
602 deb_getf("TRANSMISSION_MODE_2K "); 598 deb_getf("TRANSMISSION_MODE_2K ");
603 ofdm->transmission_mode = TRANSMISSION_MODE_2K; 599 c->transmission_mode = TRANSMISSION_MODE_2K;
604 break; 600 break;
605 case DIB3000_TRANSMISSION_MODE_8K: 601 case DIB3000_TRANSMISSION_MODE_8K:
606 deb_getf("TRANSMISSION_MODE_8K "); 602 deb_getf("TRANSMISSION_MODE_8K ");
607 ofdm->transmission_mode = TRANSMISSION_MODE_8K; 603 c->transmission_mode = TRANSMISSION_MODE_8K;
608 break; 604 break;
609 default: 605 default:
610 err("unexpected transmission mode return by TPS (%d)", tps_val); 606 err("unexpected transmission mode return by TPS (%d)", tps_val);
@@ -701,9 +697,9 @@ static int dib3000mb_fe_init_nonmobile(struct dvb_frontend* fe)
701 return dib3000mb_fe_init(fe, 0); 697 return dib3000mb_fe_init(fe, 0);
702} 698}
703 699
704static int dib3000mb_set_frontend_and_tuner(struct dvb_frontend* fe, struct dvb_frontend_parameters *fep) 700static int dib3000mb_set_frontend_and_tuner(struct dvb_frontend *fe)
705{ 701{
706 return dib3000mb_set_frontend(fe, fep, 1); 702 return dib3000mb_set_frontend(fe, 1);
707} 703}
708 704
709static void dib3000mb_release(struct dvb_frontend* fe) 705static void dib3000mb_release(struct dvb_frontend* fe)
@@ -794,10 +790,9 @@ error:
794} 790}
795 791
796static struct dvb_frontend_ops dib3000mb_ops = { 792static struct dvb_frontend_ops dib3000mb_ops = {
797 793 .delsys = { SYS_DVBT },
798 .info = { 794 .info = {
799 .name = "DiBcom 3000M-B DVB-T", 795 .name = "DiBcom 3000M-B DVB-T",
800 .type = FE_OFDM,
801 .frequency_min = 44250000, 796 .frequency_min = 44250000,
802 .frequency_max = 867250000, 797 .frequency_max = 867250000,
803 .frequency_stepsize = 62500, 798 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/dib3000mb_priv.h b/drivers/media/dvb/frontends/dib3000mb_priv.h
index 16c526591f3..9dc235aa44b 100644
--- a/drivers/media/dvb/frontends/dib3000mb_priv.h
+++ b/drivers/media/dvb/frontends/dib3000mb_priv.h
@@ -98,7 +98,7 @@ struct dib3000_state {
98 int timing_offset; 98 int timing_offset;
99 int timing_offset_comp_done; 99 int timing_offset_comp_done;
100 100
101 fe_bandwidth_t last_tuned_bw; 101 u32 last_tuned_bw;
102 u32 last_tuned_freq; 102 u32 last_tuned_freq;
103}; 103};
104 104
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c
index 088e7fadbe3..ffad181a969 100644
--- a/drivers/media/dvb/frontends/dib3000mc.c
+++ b/drivers/media/dvb/frontends/dib3000mc.c
@@ -40,7 +40,7 @@ struct dib3000mc_state {
40 40
41 u32 timf; 41 u32 timf;
42 42
43 fe_bandwidth_t current_bandwidth; 43 u32 current_bandwidth;
44 44
45 u16 dev_id; 45 u16 dev_id;
46 46
@@ -438,11 +438,14 @@ static void dib3000mc_set_adp_cfg(struct dib3000mc_state *state, s16 qam)
438 dib3000mc_write_word(state, reg, cfg[reg - 129]); 438 dib3000mc_write_word(state, reg, cfg[reg - 129]);
439} 439}
440 440
441static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_frontend_parameters *ch, u16 seq) 441static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state,
442 struct dtv_frontend_properties *ch, u16 seq)
442{ 443{
443 u16 value; 444 u16 value;
444 dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); 445 u32 bw = BANDWIDTH_TO_KHZ(ch->bandwidth_hz);
445 dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 0); 446
447 dib3000mc_set_bandwidth(state, bw);
448 dib3000mc_set_timing(state, ch->transmission_mode, bw, 0);
446 449
447// if (boost) 450// if (boost)
448// dib3000mc_write_word(state, 100, (11 << 6) + 6); 451// dib3000mc_write_word(state, 100, (11 << 6) + 6);
@@ -471,22 +474,22 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_
471 dib3000mc_write_word(state, 97,0); 474 dib3000mc_write_word(state, 97,0);
472 dib3000mc_write_word(state, 98,0); 475 dib3000mc_write_word(state, 98,0);
473 476
474 dib3000mc_set_impulse_noise(state, 0, ch->u.ofdm.transmission_mode); 477 dib3000mc_set_impulse_noise(state, 0, ch->transmission_mode);
475 478
476 value = 0; 479 value = 0;
477 switch (ch->u.ofdm.transmission_mode) { 480 switch (ch->transmission_mode) {
478 case TRANSMISSION_MODE_2K: value |= (0 << 7); break; 481 case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
479 default: 482 default:
480 case TRANSMISSION_MODE_8K: value |= (1 << 7); break; 483 case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
481 } 484 }
482 switch (ch->u.ofdm.guard_interval) { 485 switch (ch->guard_interval) {
483 case GUARD_INTERVAL_1_32: value |= (0 << 5); break; 486 case GUARD_INTERVAL_1_32: value |= (0 << 5); break;
484 case GUARD_INTERVAL_1_16: value |= (1 << 5); break; 487 case GUARD_INTERVAL_1_16: value |= (1 << 5); break;
485 case GUARD_INTERVAL_1_4: value |= (3 << 5); break; 488 case GUARD_INTERVAL_1_4: value |= (3 << 5); break;
486 default: 489 default:
487 case GUARD_INTERVAL_1_8: value |= (2 << 5); break; 490 case GUARD_INTERVAL_1_8: value |= (2 << 5); break;
488 } 491 }
489 switch (ch->u.ofdm.constellation) { 492 switch (ch->modulation) {
490 case QPSK: value |= (0 << 3); break; 493 case QPSK: value |= (0 << 3); break;
491 case QAM_16: value |= (1 << 3); break; 494 case QAM_16: value |= (1 << 3); break;
492 default: 495 default:
@@ -502,11 +505,11 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_
502 dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4)); 505 dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4));
503 506
504 value = 0; 507 value = 0;
505 if (ch->u.ofdm.hierarchy_information == 1) 508 if (ch->hierarchy == 1)
506 value |= (1 << 4); 509 value |= (1 << 4);
507 if (1 == 1) 510 if (1 == 1)
508 value |= 1; 511 value |= 1;
509 switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { 512 switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) {
510 case FEC_2_3: value |= (2 << 1); break; 513 case FEC_2_3: value |= (2 << 1); break;
511 case FEC_3_4: value |= (3 << 1); break; 514 case FEC_3_4: value |= (3 << 1); break;
512 case FEC_5_6: value |= (5 << 1); break; 515 case FEC_5_6: value |= (5 << 1); break;
@@ -517,12 +520,12 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_
517 dib3000mc_write_word(state, 181, value); 520 dib3000mc_write_word(state, 181, value);
518 521
519 // diversity synchro delay add 50% SFN margin 522 // diversity synchro delay add 50% SFN margin
520 switch (ch->u.ofdm.transmission_mode) { 523 switch (ch->transmission_mode) {
521 case TRANSMISSION_MODE_8K: value = 256; break; 524 case TRANSMISSION_MODE_8K: value = 256; break;
522 case TRANSMISSION_MODE_2K: 525 case TRANSMISSION_MODE_2K:
523 default: value = 64; break; 526 default: value = 64; break;
524 } 527 }
525 switch (ch->u.ofdm.guard_interval) { 528 switch (ch->guard_interval) {
526 case GUARD_INTERVAL_1_16: value *= 2; break; 529 case GUARD_INTERVAL_1_16: value *= 2; break;
527 case GUARD_INTERVAL_1_8: value *= 4; break; 530 case GUARD_INTERVAL_1_8: value *= 4; break;
528 case GUARD_INTERVAL_1_4: value *= 8; break; 531 case GUARD_INTERVAL_1_4: value *= 8; break;
@@ -540,27 +543,28 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_
540 543
541 msleep(30); 544 msleep(30);
542 545
543 dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->u.ofdm.transmission_mode); 546 dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->transmission_mode);
544} 547}
545 548
546static int dib3000mc_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *chan) 549static int dib3000mc_autosearch_start(struct dvb_frontend *demod)
547{ 550{
551 struct dtv_frontend_properties *chan = &demod->dtv_property_cache;
548 struct dib3000mc_state *state = demod->demodulator_priv; 552 struct dib3000mc_state *state = demod->demodulator_priv;
549 u16 reg; 553 u16 reg;
550// u32 val; 554// u32 val;
551 struct dvb_frontend_parameters schan; 555 struct dtv_frontend_properties schan;
552 556
553 schan = *chan; 557 schan = *chan;
554 558
555 /* TODO what is that ? */ 559 /* TODO what is that ? */
556 560
557 /* a channel for autosearch */ 561 /* a channel for autosearch */
558 schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 562 schan.transmission_mode = TRANSMISSION_MODE_8K;
559 schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 563 schan.guard_interval = GUARD_INTERVAL_1_32;
560 schan.u.ofdm.constellation = QAM_64; 564 schan.modulation = QAM_64;
561 schan.u.ofdm.code_rate_HP = FEC_2_3; 565 schan.code_rate_HP = FEC_2_3;
562 schan.u.ofdm.code_rate_LP = FEC_2_3; 566 schan.code_rate_LP = FEC_2_3;
563 schan.u.ofdm.hierarchy_information = 0; 567 schan.hierarchy = 0;
564 568
565 dib3000mc_set_channel_cfg(state, &schan, 11); 569 dib3000mc_set_channel_cfg(state, &schan, 11);
566 570
@@ -586,8 +590,9 @@ static int dib3000mc_autosearch_is_irq(struct dvb_frontend *demod)
586 return 0; // still pending 590 return 0; // still pending
587} 591}
588 592
589static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 593static int dib3000mc_tune(struct dvb_frontend *demod)
590{ 594{
595 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
591 struct dib3000mc_state *state = demod->demodulator_priv; 596 struct dib3000mc_state *state = demod->demodulator_priv;
592 597
593 // ** configure demod ** 598 // ** configure demod **
@@ -603,8 +608,8 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parame
603 dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift 608 dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift
604 } 609 }
605 610
606 dib3000mc_set_adp_cfg(state, (u8)ch->u.ofdm.constellation); 611 dib3000mc_set_adp_cfg(state, (u8)ch->modulation);
607 if (ch->u.ofdm.transmission_mode == TRANSMISSION_MODE_8K) { 612 if (ch->transmission_mode == TRANSMISSION_MODE_8K) {
608 dib3000mc_write_word(state, 26, 38528); 613 dib3000mc_write_word(state, 26, 38528);
609 dib3000mc_write_word(state, 33, 8); 614 dib3000mc_write_word(state, 33, 8);
610 } else { 615 } else {
@@ -613,7 +618,8 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parame
613 } 618 }
614 619
615 if (dib3000mc_read_word(state, 509) & 0x80) 620 if (dib3000mc_read_word(state, 509) & 0x80)
616 dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 1); 621 dib3000mc_set_timing(state, ch->transmission_mode,
622 BANDWIDTH_TO_KHZ(ch->bandwidth_hz), 1);
617 623
618 return 0; 624 return 0;
619} 625}
@@ -626,87 +632,87 @@ struct i2c_adapter * dib3000mc_get_tuner_i2c_master(struct dvb_frontend *demod,
626 632
627EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master); 633EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master);
628 634
629static int dib3000mc_get_frontend(struct dvb_frontend* fe, 635static int dib3000mc_get_frontend(struct dvb_frontend* fe)
630 struct dvb_frontend_parameters *fep)
631{ 636{
637 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
632 struct dib3000mc_state *state = fe->demodulator_priv; 638 struct dib3000mc_state *state = fe->demodulator_priv;
633 u16 tps = dib3000mc_read_word(state,458); 639 u16 tps = dib3000mc_read_word(state,458);
634 640
635 fep->inversion = INVERSION_AUTO; 641 fep->inversion = INVERSION_AUTO;
636 642
637 fep->u.ofdm.bandwidth = state->current_bandwidth; 643 fep->bandwidth_hz = state->current_bandwidth;
638 644
639 switch ((tps >> 8) & 0x1) { 645 switch ((tps >> 8) & 0x1) {
640 case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break; 646 case 0: fep->transmission_mode = TRANSMISSION_MODE_2K; break;
641 case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break; 647 case 1: fep->transmission_mode = TRANSMISSION_MODE_8K; break;
642 } 648 }
643 649
644 switch (tps & 0x3) { 650 switch (tps & 0x3) {
645 case 0: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; break; 651 case 0: fep->guard_interval = GUARD_INTERVAL_1_32; break;
646 case 1: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; break; 652 case 1: fep->guard_interval = GUARD_INTERVAL_1_16; break;
647 case 2: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; break; 653 case 2: fep->guard_interval = GUARD_INTERVAL_1_8; break;
648 case 3: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; break; 654 case 3: fep->guard_interval = GUARD_INTERVAL_1_4; break;
649 } 655 }
650 656
651 switch ((tps >> 13) & 0x3) { 657 switch ((tps >> 13) & 0x3) {
652 case 0: fep->u.ofdm.constellation = QPSK; break; 658 case 0: fep->modulation = QPSK; break;
653 case 1: fep->u.ofdm.constellation = QAM_16; break; 659 case 1: fep->modulation = QAM_16; break;
654 case 2: 660 case 2:
655 default: fep->u.ofdm.constellation = QAM_64; break; 661 default: fep->modulation = QAM_64; break;
656 } 662 }
657 663
658 /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ 664 /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */
659 /* (tps >> 12) & 0x1 == hrch is used, (tps >> 9) & 0x7 == alpha */ 665 /* (tps >> 12) & 0x1 == hrch is used, (tps >> 9) & 0x7 == alpha */
660 666
661 fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; 667 fep->hierarchy = HIERARCHY_NONE;
662 switch ((tps >> 5) & 0x7) { 668 switch ((tps >> 5) & 0x7) {
663 case 1: fep->u.ofdm.code_rate_HP = FEC_1_2; break; 669 case 1: fep->code_rate_HP = FEC_1_2; break;
664 case 2: fep->u.ofdm.code_rate_HP = FEC_2_3; break; 670 case 2: fep->code_rate_HP = FEC_2_3; break;
665 case 3: fep->u.ofdm.code_rate_HP = FEC_3_4; break; 671 case 3: fep->code_rate_HP = FEC_3_4; break;
666 case 5: fep->u.ofdm.code_rate_HP = FEC_5_6; break; 672 case 5: fep->code_rate_HP = FEC_5_6; break;
667 case 7: 673 case 7:
668 default: fep->u.ofdm.code_rate_HP = FEC_7_8; break; 674 default: fep->code_rate_HP = FEC_7_8; break;
669 675
670 } 676 }
671 677
672 switch ((tps >> 2) & 0x7) { 678 switch ((tps >> 2) & 0x7) {
673 case 1: fep->u.ofdm.code_rate_LP = FEC_1_2; break; 679 case 1: fep->code_rate_LP = FEC_1_2; break;
674 case 2: fep->u.ofdm.code_rate_LP = FEC_2_3; break; 680 case 2: fep->code_rate_LP = FEC_2_3; break;
675 case 3: fep->u.ofdm.code_rate_LP = FEC_3_4; break; 681 case 3: fep->code_rate_LP = FEC_3_4; break;
676 case 5: fep->u.ofdm.code_rate_LP = FEC_5_6; break; 682 case 5: fep->code_rate_LP = FEC_5_6; break;
677 case 7: 683 case 7:
678 default: fep->u.ofdm.code_rate_LP = FEC_7_8; break; 684 default: fep->code_rate_LP = FEC_7_8; break;
679 } 685 }
680 686
681 return 0; 687 return 0;
682} 688}
683 689
684static int dib3000mc_set_frontend(struct dvb_frontend* fe, 690static int dib3000mc_set_frontend(struct dvb_frontend *fe)
685 struct dvb_frontend_parameters *fep)
686{ 691{
692 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
687 struct dib3000mc_state *state = fe->demodulator_priv; 693 struct dib3000mc_state *state = fe->demodulator_priv;
688 int ret; 694 int ret;
689 695
690 dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z); 696 dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z);
691 697
692 state->current_bandwidth = fep->u.ofdm.bandwidth; 698 state->current_bandwidth = fep->bandwidth_hz;
693 dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth)); 699 dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->bandwidth_hz));
694 700
695 /* maybe the parameter has been changed */ 701 /* maybe the parameter has been changed */
696 state->sfn_workaround_active = buggy_sfn_workaround; 702 state->sfn_workaround_active = buggy_sfn_workaround;
697 703
698 if (fe->ops.tuner_ops.set_params) { 704 if (fe->ops.tuner_ops.set_params) {
699 fe->ops.tuner_ops.set_params(fe, fep); 705 fe->ops.tuner_ops.set_params(fe);
700 msleep(100); 706 msleep(100);
701 } 707 }
702 708
703 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || 709 if (fep->transmission_mode == TRANSMISSION_MODE_AUTO ||
704 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || 710 fep->guard_interval == GUARD_INTERVAL_AUTO ||
705 fep->u.ofdm.constellation == QAM_AUTO || 711 fep->modulation == QAM_AUTO ||
706 fep->u.ofdm.code_rate_HP == FEC_AUTO) { 712 fep->code_rate_HP == FEC_AUTO) {
707 int i = 1000, found; 713 int i = 1000, found;
708 714
709 dib3000mc_autosearch_start(fe, fep); 715 dib3000mc_autosearch_start(fe);
710 do { 716 do {
711 msleep(1); 717 msleep(1);
712 found = dib3000mc_autosearch_is_irq(fe); 718 found = dib3000mc_autosearch_is_irq(fe);
@@ -716,14 +722,14 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe,
716 if (found == 0 || found == 1) 722 if (found == 0 || found == 1)
717 return 0; // no channel found 723 return 0; // no channel found
718 724
719 dib3000mc_get_frontend(fe, fep); 725 dib3000mc_get_frontend(fe);
720 } 726 }
721 727
722 ret = dib3000mc_tune(fe, fep); 728 ret = dib3000mc_tune(fe);
723 729
724 /* make this a config parameter */ 730 /* make this a config parameter */
725 dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO); 731 dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO);
726 return ret; 732 return ret;
727} 733}
728 734
729static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat) 735static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat)
@@ -897,9 +903,9 @@ error:
897EXPORT_SYMBOL(dib3000mc_attach); 903EXPORT_SYMBOL(dib3000mc_attach);
898 904
899static struct dvb_frontend_ops dib3000mc_ops = { 905static struct dvb_frontend_ops dib3000mc_ops = {
906 .delsys = { SYS_DVBT },
900 .info = { 907 .info = {
901 .name = "DiBcom 3000MC/P", 908 .name = "DiBcom 3000MC/P",
902 .type = FE_OFDM,
903 .frequency_min = 44250000, 909 .frequency_min = 44250000,
904 .frequency_max = 867250000, 910 .frequency_max = 867250000,
905 .frequency_stepsize = 62500, 911 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/dib7000m.c b/drivers/media/dvb/frontends/dib7000m.c
index dbb76d75c93..148bf79236f 100644
--- a/drivers/media/dvb/frontends/dib7000m.c
+++ b/drivers/media/dvb/frontends/dib7000m.c
@@ -38,7 +38,7 @@ struct dib7000m_state {
38 u16 wbd_ref; 38 u16 wbd_ref;
39 39
40 u8 current_band; 40 u8 current_band;
41 fe_bandwidth_t current_bandwidth; 41 u32 current_bandwidth;
42 struct dibx000_agc_config *current_agc; 42 struct dibx000_agc_config *current_agc;
43 u32 timf; 43 u32 timf;
44 u32 timf_default; 44 u32 timf_default;
@@ -313,6 +313,9 @@ static int dib7000m_set_bandwidth(struct dib7000m_state *state, u32 bw)
313{ 313{
314 u32 timf; 314 u32 timf;
315 315
316 if (!bw)
317 bw = 8000;
318
316 // store the current bandwidth for later use 319 // store the current bandwidth for later use
317 state->current_bandwidth = bw; 320 state->current_bandwidth = bw;
318 321
@@ -742,8 +745,9 @@ static void dib7000m_update_timf(struct dib7000m_state *state)
742 dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->timf_default); 745 dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->timf_default);
743} 746}
744 747
745static int dib7000m_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 748static int dib7000m_agc_startup(struct dvb_frontend *demod)
746{ 749{
750 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
747 struct dib7000m_state *state = demod->demodulator_priv; 751 struct dib7000m_state *state = demod->demodulator_priv;
748 u16 cfg_72 = dib7000m_read_word(state, 72); 752 u16 cfg_72 = dib7000m_read_word(state, 72);
749 int ret = -1; 753 int ret = -1;
@@ -832,28 +836,29 @@ static int dib7000m_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_
832 return ret; 836 return ret;
833} 837}
834 838
835static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_frontend_parameters *ch, u8 seq) 839static void dib7000m_set_channel(struct dib7000m_state *state, struct dtv_frontend_properties *ch,
840 u8 seq)
836{ 841{
837 u16 value, est[4]; 842 u16 value, est[4];
838 843
839 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); 844 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz));
840 845
841 /* nfft, guard, qam, alpha */ 846 /* nfft, guard, qam, alpha */
842 value = 0; 847 value = 0;
843 switch (ch->u.ofdm.transmission_mode) { 848 switch (ch->transmission_mode) {
844 case TRANSMISSION_MODE_2K: value |= (0 << 7); break; 849 case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
845 case TRANSMISSION_MODE_4K: value |= (2 << 7); break; 850 case TRANSMISSION_MODE_4K: value |= (2 << 7); break;
846 default: 851 default:
847 case TRANSMISSION_MODE_8K: value |= (1 << 7); break; 852 case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
848 } 853 }
849 switch (ch->u.ofdm.guard_interval) { 854 switch (ch->guard_interval) {
850 case GUARD_INTERVAL_1_32: value |= (0 << 5); break; 855 case GUARD_INTERVAL_1_32: value |= (0 << 5); break;
851 case GUARD_INTERVAL_1_16: value |= (1 << 5); break; 856 case GUARD_INTERVAL_1_16: value |= (1 << 5); break;
852 case GUARD_INTERVAL_1_4: value |= (3 << 5); break; 857 case GUARD_INTERVAL_1_4: value |= (3 << 5); break;
853 default: 858 default:
854 case GUARD_INTERVAL_1_8: value |= (2 << 5); break; 859 case GUARD_INTERVAL_1_8: value |= (2 << 5); break;
855 } 860 }
856 switch (ch->u.ofdm.constellation) { 861 switch (ch->modulation) {
857 case QPSK: value |= (0 << 3); break; 862 case QPSK: value |= (0 << 3); break;
858 case QAM_16: value |= (1 << 3); break; 863 case QAM_16: value |= (1 << 3); break;
859 default: 864 default:
@@ -872,11 +877,11 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte
872 value = 0; 877 value = 0;
873 if (1 != 0) 878 if (1 != 0)
874 value |= (1 << 6); 879 value |= (1 << 6);
875 if (ch->u.ofdm.hierarchy_information == 1) 880 if (ch->hierarchy == 1)
876 value |= (1 << 4); 881 value |= (1 << 4);
877 if (1 == 1) 882 if (1 == 1)
878 value |= 1; 883 value |= 1;
879 switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { 884 switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) {
880 case FEC_2_3: value |= (2 << 1); break; 885 case FEC_2_3: value |= (2 << 1); break;
881 case FEC_3_4: value |= (3 << 1); break; 886 case FEC_3_4: value |= (3 << 1); break;
882 case FEC_5_6: value |= (5 << 1); break; 887 case FEC_5_6: value |= (5 << 1); break;
@@ -901,13 +906,13 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte
901 dib7000m_write_word(state, 33, (0 << 4) | 0x5); 906 dib7000m_write_word(state, 33, (0 << 4) | 0x5);
902 907
903 /* P_dvsy_sync_wait */ 908 /* P_dvsy_sync_wait */
904 switch (ch->u.ofdm.transmission_mode) { 909 switch (ch->transmission_mode) {
905 case TRANSMISSION_MODE_8K: value = 256; break; 910 case TRANSMISSION_MODE_8K: value = 256; break;
906 case TRANSMISSION_MODE_4K: value = 128; break; 911 case TRANSMISSION_MODE_4K: value = 128; break;
907 case TRANSMISSION_MODE_2K: 912 case TRANSMISSION_MODE_2K:
908 default: value = 64; break; 913 default: value = 64; break;
909 } 914 }
910 switch (ch->u.ofdm.guard_interval) { 915 switch (ch->guard_interval) {
911 case GUARD_INTERVAL_1_16: value *= 2; break; 916 case GUARD_INTERVAL_1_16: value *= 2; break;
912 case GUARD_INTERVAL_1_8: value *= 4; break; 917 case GUARD_INTERVAL_1_8: value *= 4; break;
913 case GUARD_INTERVAL_1_4: value *= 8; break; 918 case GUARD_INTERVAL_1_4: value *= 8; break;
@@ -925,7 +930,7 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte
925 dib7000m_set_diversity_in(&state->demod, state->div_state); 930 dib7000m_set_diversity_in(&state->demod, state->div_state);
926 931
927 /* channel estimation fine configuration */ 932 /* channel estimation fine configuration */
928 switch (ch->u.ofdm.constellation) { 933 switch (ch->modulation) {
929 case QAM_64: 934 case QAM_64:
930 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ 935 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */
931 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ 936 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */
@@ -952,25 +957,26 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte
952 dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD); 957 dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD);
953} 958}
954 959
955static int dib7000m_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 960static int dib7000m_autosearch_start(struct dvb_frontend *demod)
956{ 961{
962 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
957 struct dib7000m_state *state = demod->demodulator_priv; 963 struct dib7000m_state *state = demod->demodulator_priv;
958 struct dvb_frontend_parameters schan; 964 struct dtv_frontend_properties schan;
959 int ret = 0; 965 int ret = 0;
960 u32 value, factor; 966 u32 value, factor;
961 967
962 schan = *ch; 968 schan = *ch;
963 969
964 schan.u.ofdm.constellation = QAM_64; 970 schan.modulation = QAM_64;
965 schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 971 schan.guard_interval = GUARD_INTERVAL_1_32;
966 schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 972 schan.transmission_mode = TRANSMISSION_MODE_8K;
967 schan.u.ofdm.code_rate_HP = FEC_2_3; 973 schan.code_rate_HP = FEC_2_3;
968 schan.u.ofdm.code_rate_LP = FEC_3_4; 974 schan.code_rate_LP = FEC_3_4;
969 schan.u.ofdm.hierarchy_information = 0; 975 schan.hierarchy = 0;
970 976
971 dib7000m_set_channel(state, &schan, 7); 977 dib7000m_set_channel(state, &schan, 7);
972 978
973 factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth); 979 factor = BANDWIDTH_TO_KHZ(schan.bandwidth_hz);
974 if (factor >= 5000) 980 if (factor >= 5000)
975 factor = 1; 981 factor = 1;
976 else 982 else
@@ -1027,8 +1033,9 @@ static int dib7000m_autosearch_is_irq(struct dvb_frontend *demod)
1027 return dib7000m_autosearch_irq(state, 537); 1033 return dib7000m_autosearch_irq(state, 537);
1028} 1034}
1029 1035
1030static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 1036static int dib7000m_tune(struct dvb_frontend *demod)
1031{ 1037{
1038 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
1032 struct dib7000m_state *state = demod->demodulator_priv; 1039 struct dib7000m_state *state = demod->demodulator_priv;
1033 int ret = 0; 1040 int ret = 0;
1034 u16 value; 1041 u16 value;
@@ -1055,7 +1062,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1055 //dump_reg(state); 1062 //dump_reg(state);
1056 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ 1063 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */
1057 value = (6 << 8) | 0x80; 1064 value = (6 << 8) | 0x80;
1058 switch (ch->u.ofdm.transmission_mode) { 1065 switch (ch->transmission_mode) {
1059 case TRANSMISSION_MODE_2K: value |= (7 << 12); break; 1066 case TRANSMISSION_MODE_2K: value |= (7 << 12); break;
1060 case TRANSMISSION_MODE_4K: value |= (8 << 12); break; 1067 case TRANSMISSION_MODE_4K: value |= (8 << 12); break;
1061 default: 1068 default:
@@ -1065,7 +1072,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1065 1072
1066 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ 1073 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */
1067 value = (0 << 4); 1074 value = (0 << 4);
1068 switch (ch->u.ofdm.transmission_mode) { 1075 switch (ch->transmission_mode) {
1069 case TRANSMISSION_MODE_2K: value |= 0x6; break; 1076 case TRANSMISSION_MODE_2K: value |= 0x6; break;
1070 case TRANSMISSION_MODE_4K: value |= 0x7; break; 1077 case TRANSMISSION_MODE_4K: value |= 0x7; break;
1071 default: 1078 default:
@@ -1075,7 +1082,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1075 1082
1076 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ 1083 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */
1077 value = (0 << 4); 1084 value = (0 << 4);
1078 switch (ch->u.ofdm.transmission_mode) { 1085 switch (ch->transmission_mode) {
1079 case TRANSMISSION_MODE_2K: value |= 0x6; break; 1086 case TRANSMISSION_MODE_2K: value |= 0x6; break;
1080 case TRANSMISSION_MODE_4K: value |= 0x7; break; 1087 case TRANSMISSION_MODE_4K: value |= 0x7; break;
1081 default: 1088 default:
@@ -1087,7 +1094,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1087 if ((dib7000m_read_word(state, 535) >> 6) & 0x1) 1094 if ((dib7000m_read_word(state, 535) >> 6) & 0x1)
1088 dib7000m_update_timf(state); 1095 dib7000m_update_timf(state);
1089 1096
1090 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); 1097 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz));
1091 return ret; 1098 return ret;
1092} 1099}
1093 1100
@@ -1147,57 +1154,57 @@ static int dib7000m_identify(struct dib7000m_state *state)
1147} 1154}
1148 1155
1149 1156
1150static int dib7000m_get_frontend(struct dvb_frontend* fe, 1157static int dib7000m_get_frontend(struct dvb_frontend* fe)
1151 struct dvb_frontend_parameters *fep)
1152{ 1158{
1159 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
1153 struct dib7000m_state *state = fe->demodulator_priv; 1160 struct dib7000m_state *state = fe->demodulator_priv;
1154 u16 tps = dib7000m_read_word(state,480); 1161 u16 tps = dib7000m_read_word(state,480);
1155 1162
1156 fep->inversion = INVERSION_AUTO; 1163 fep->inversion = INVERSION_AUTO;
1157 1164
1158 fep->u.ofdm.bandwidth = state->current_bandwidth; 1165 fep->bandwidth_hz = BANDWIDTH_TO_HZ(state->current_bandwidth);
1159 1166
1160 switch ((tps >> 8) & 0x3) { 1167 switch ((tps >> 8) & 0x3) {
1161 case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break; 1168 case 0: fep->transmission_mode = TRANSMISSION_MODE_2K; break;
1162 case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break; 1169 case 1: fep->transmission_mode = TRANSMISSION_MODE_8K; break;
1163 /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */ 1170 /* case 2: fep->transmission_mode = TRANSMISSION_MODE_4K; break; */
1164 } 1171 }
1165 1172
1166 switch (tps & 0x3) { 1173 switch (tps & 0x3) {
1167 case 0: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; break; 1174 case 0: fep->guard_interval = GUARD_INTERVAL_1_32; break;
1168 case 1: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; break; 1175 case 1: fep->guard_interval = GUARD_INTERVAL_1_16; break;
1169 case 2: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; break; 1176 case 2: fep->guard_interval = GUARD_INTERVAL_1_8; break;
1170 case 3: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; break; 1177 case 3: fep->guard_interval = GUARD_INTERVAL_1_4; break;
1171 } 1178 }
1172 1179
1173 switch ((tps >> 14) & 0x3) { 1180 switch ((tps >> 14) & 0x3) {
1174 case 0: fep->u.ofdm.constellation = QPSK; break; 1181 case 0: fep->modulation = QPSK; break;
1175 case 1: fep->u.ofdm.constellation = QAM_16; break; 1182 case 1: fep->modulation = QAM_16; break;
1176 case 2: 1183 case 2:
1177 default: fep->u.ofdm.constellation = QAM_64; break; 1184 default: fep->modulation = QAM_64; break;
1178 } 1185 }
1179 1186
1180 /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ 1187 /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */
1181 /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */ 1188 /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */
1182 1189
1183 fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; 1190 fep->hierarchy = HIERARCHY_NONE;
1184 switch ((tps >> 5) & 0x7) { 1191 switch ((tps >> 5) & 0x7) {
1185 case 1: fep->u.ofdm.code_rate_HP = FEC_1_2; break; 1192 case 1: fep->code_rate_HP = FEC_1_2; break;
1186 case 2: fep->u.ofdm.code_rate_HP = FEC_2_3; break; 1193 case 2: fep->code_rate_HP = FEC_2_3; break;
1187 case 3: fep->u.ofdm.code_rate_HP = FEC_3_4; break; 1194 case 3: fep->code_rate_HP = FEC_3_4; break;
1188 case 5: fep->u.ofdm.code_rate_HP = FEC_5_6; break; 1195 case 5: fep->code_rate_HP = FEC_5_6; break;
1189 case 7: 1196 case 7:
1190 default: fep->u.ofdm.code_rate_HP = FEC_7_8; break; 1197 default: fep->code_rate_HP = FEC_7_8; break;
1191 1198
1192 } 1199 }
1193 1200
1194 switch ((tps >> 2) & 0x7) { 1201 switch ((tps >> 2) & 0x7) {
1195 case 1: fep->u.ofdm.code_rate_LP = FEC_1_2; break; 1202 case 1: fep->code_rate_LP = FEC_1_2; break;
1196 case 2: fep->u.ofdm.code_rate_LP = FEC_2_3; break; 1203 case 2: fep->code_rate_LP = FEC_2_3; break;
1197 case 3: fep->u.ofdm.code_rate_LP = FEC_3_4; break; 1204 case 3: fep->code_rate_LP = FEC_3_4; break;
1198 case 5: fep->u.ofdm.code_rate_LP = FEC_5_6; break; 1205 case 5: fep->code_rate_LP = FEC_5_6; break;
1199 case 7: 1206 case 7:
1200 default: fep->u.ofdm.code_rate_LP = FEC_7_8; break; 1207 default: fep->code_rate_LP = FEC_7_8; break;
1201 } 1208 }
1202 1209
1203 /* native interleaver: (dib7000m_read_word(state, 481) >> 5) & 0x1 */ 1210 /* native interleaver: (dib7000m_read_word(state, 481) >> 5) & 0x1 */
@@ -1205,35 +1212,34 @@ static int dib7000m_get_frontend(struct dvb_frontend* fe,
1205 return 0; 1212 return 0;
1206} 1213}
1207 1214
1208static int dib7000m_set_frontend(struct dvb_frontend* fe, 1215static int dib7000m_set_frontend(struct dvb_frontend *fe)
1209 struct dvb_frontend_parameters *fep)
1210{ 1216{
1217 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
1211 struct dib7000m_state *state = fe->demodulator_priv; 1218 struct dib7000m_state *state = fe->demodulator_priv;
1212 int time, ret; 1219 int time, ret;
1213 1220
1214 dib7000m_set_output_mode(state, OUTMODE_HIGH_Z); 1221 dib7000m_set_output_mode(state, OUTMODE_HIGH_Z);
1215 1222
1216 state->current_bandwidth = fep->u.ofdm.bandwidth; 1223 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->bandwidth_hz));
1217 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth));
1218 1224
1219 if (fe->ops.tuner_ops.set_params) 1225 if (fe->ops.tuner_ops.set_params)
1220 fe->ops.tuner_ops.set_params(fe, fep); 1226 fe->ops.tuner_ops.set_params(fe);
1221 1227
1222 /* start up the AGC */ 1228 /* start up the AGC */
1223 state->agc_state = 0; 1229 state->agc_state = 0;
1224 do { 1230 do {
1225 time = dib7000m_agc_startup(fe, fep); 1231 time = dib7000m_agc_startup(fe);
1226 if (time != -1) 1232 if (time != -1)
1227 msleep(time); 1233 msleep(time);
1228 } while (time != -1); 1234 } while (time != -1);
1229 1235
1230 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || 1236 if (fep->transmission_mode == TRANSMISSION_MODE_AUTO ||
1231 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || 1237 fep->guard_interval == GUARD_INTERVAL_AUTO ||
1232 fep->u.ofdm.constellation == QAM_AUTO || 1238 fep->modulation == QAM_AUTO ||
1233 fep->u.ofdm.code_rate_HP == FEC_AUTO) { 1239 fep->code_rate_HP == FEC_AUTO) {
1234 int i = 800, found; 1240 int i = 800, found;
1235 1241
1236 dib7000m_autosearch_start(fe, fep); 1242 dib7000m_autosearch_start(fe);
1237 do { 1243 do {
1238 msleep(1); 1244 msleep(1);
1239 found = dib7000m_autosearch_is_irq(fe); 1245 found = dib7000m_autosearch_is_irq(fe);
@@ -1243,10 +1249,10 @@ static int dib7000m_set_frontend(struct dvb_frontend* fe,
1243 if (found == 0 || found == 1) 1249 if (found == 0 || found == 1)
1244 return 0; // no channel found 1250 return 0; // no channel found
1245 1251
1246 dib7000m_get_frontend(fe, fep); 1252 dib7000m_get_frontend(fe);
1247 } 1253 }
1248 1254
1249 ret = dib7000m_tune(fe, fep); 1255 ret = dib7000m_tune(fe);
1250 1256
1251 /* make this a config parameter */ 1257 /* make this a config parameter */
1252 dib7000m_set_output_mode(state, OUTMODE_MPEG2_FIFO); 1258 dib7000m_set_output_mode(state, OUTMODE_MPEG2_FIFO);
@@ -1430,9 +1436,9 @@ error:
1430EXPORT_SYMBOL(dib7000m_attach); 1436EXPORT_SYMBOL(dib7000m_attach);
1431 1437
1432static struct dvb_frontend_ops dib7000m_ops = { 1438static struct dvb_frontend_ops dib7000m_ops = {
1439 .delsys = { SYS_DVBT },
1433 .info = { 1440 .info = {
1434 .name = "DiBcom 7000MA/MB/PA/PB/MC", 1441 .name = "DiBcom 7000MA/MB/PA/PB/MC",
1435 .type = FE_OFDM,
1436 .frequency_min = 44250000, 1442 .frequency_min = 44250000,
1437 .frequency_max = 867250000, 1443 .frequency_max = 867250000,
1438 .frequency_stepsize = 62500, 1444 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c
index ce8534ff142..5ceadc285b3 100644
--- a/drivers/media/dvb/frontends/dib7000p.c
+++ b/drivers/media/dvb/frontends/dib7000p.c
@@ -70,6 +70,8 @@ struct dib7000p_state {
70 u8 i2c_write_buffer[4]; 70 u8 i2c_write_buffer[4];
71 u8 i2c_read_buffer[2]; 71 u8 i2c_read_buffer[2];
72 struct mutex i2c_buffer_lock; 72 struct mutex i2c_buffer_lock;
73
74 u8 input_mode_mpeg;
73}; 75};
74 76
75enum dib7000p_power_mode { 77enum dib7000p_power_mode {
@@ -78,8 +80,11 @@ enum dib7000p_power_mode {
78 DIB7000P_POWER_INTERFACE_ONLY, 80 DIB7000P_POWER_INTERFACE_ONLY,
79}; 81};
80 82
83/* dib7090 specific fonctions */
81static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode); 84static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode);
82static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff); 85static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff);
86static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode);
87static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode);
83 88
84static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg) 89static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg)
85{ 90{
@@ -276,17 +281,23 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p
276 dib7000p_write_word(state, 774, reg_774); 281 dib7000p_write_word(state, 774, reg_774);
277 dib7000p_write_word(state, 775, reg_775); 282 dib7000p_write_word(state, 775, reg_775);
278 dib7000p_write_word(state, 776, reg_776); 283 dib7000p_write_word(state, 776, reg_776);
279 dib7000p_write_word(state, 899, reg_899);
280 dib7000p_write_word(state, 1280, reg_1280); 284 dib7000p_write_word(state, 1280, reg_1280);
285 if (state->version != SOC7090)
286 dib7000p_write_word(state, 899, reg_899);
281 287
282 return 0; 288 return 0;
283} 289}
284 290
285static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_adc_states no) 291static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_adc_states no)
286{ 292{
287 u16 reg_908 = dib7000p_read_word(state, 908), reg_909 = dib7000p_read_word(state, 909); 293 u16 reg_908 = 0, reg_909 = 0;
288 u16 reg; 294 u16 reg;
289 295
296 if (state->version != SOC7090) {
297 reg_908 = dib7000p_read_word(state, 908);
298 reg_909 = dib7000p_read_word(state, 909);
299 }
300
290 switch (no) { 301 switch (no) {
291 case DIBX000_SLOW_ADC_ON: 302 case DIBX000_SLOW_ADC_ON:
292 if (state->version == SOC7090) { 303 if (state->version == SOC7090) {
@@ -342,8 +353,10 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad
342 reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4; 353 reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4;
343 reg_908 |= (state->cfg.enable_current_mirror & 1) << 7; 354 reg_908 |= (state->cfg.enable_current_mirror & 1) << 7;
344 355
345 dib7000p_write_word(state, 908, reg_908); 356 if (state->version != SOC7090) {
346 dib7000p_write_word(state, 909, reg_909); 357 dib7000p_write_word(state, 908, reg_908);
358 dib7000p_write_word(state, 909, reg_909);
359 }
347} 360}
348 361
349static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw) 362static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw)
@@ -398,6 +411,24 @@ int dib7000p_set_wbd_ref(struct dvb_frontend *demod, u16 value)
398} 411}
399EXPORT_SYMBOL(dib7000p_set_wbd_ref); 412EXPORT_SYMBOL(dib7000p_set_wbd_ref);
400 413
414int dib7000p_get_agc_values(struct dvb_frontend *fe,
415 u16 *agc_global, u16 *agc1, u16 *agc2, u16 *wbd)
416{
417 struct dib7000p_state *state = fe->demodulator_priv;
418
419 if (agc_global != NULL)
420 *agc_global = dib7000p_read_word(state, 394);
421 if (agc1 != NULL)
422 *agc1 = dib7000p_read_word(state, 392);
423 if (agc2 != NULL)
424 *agc2 = dib7000p_read_word(state, 393);
425 if (wbd != NULL)
426 *wbd = dib7000p_read_word(state, 397);
427
428 return 0;
429}
430EXPORT_SYMBOL(dib7000p_get_agc_values);
431
401static void dib7000p_reset_pll(struct dib7000p_state *state) 432static void dib7000p_reset_pll(struct dib7000p_state *state)
402{ 433{
403 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0]; 434 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0];
@@ -519,7 +550,7 @@ static u16 dib7000p_defaults[] = {
519 // auto search configuration 550 // auto search configuration
520 3, 2, 551 3, 2,
521 0x0004, 552 0x0004,
522 0x1000, 553 (1<<3)|(1<<11)|(1<<12)|(1<<13),
523 0x0814, /* Equal Lock */ 554 0x0814, /* Equal Lock */
524 555
525 12, 6, 556 12, 6,
@@ -595,13 +626,6 @@ static u16 dib7000p_defaults[] = {
595 1, 235, 626 1, 235,
596 0x0062, 627 0x0062,
597 628
598 2, 901,
599 0x0006,
600 (3 << 10) | (1 << 6),
601
602 1, 905,
603 0x2c8e,
604
605 0, 629 0,
606}; 630};
607 631
@@ -618,15 +642,18 @@ static int dib7000p_demod_reset(struct dib7000p_state *state)
618 dib7000p_write_word(state, 770, 0xffff); 642 dib7000p_write_word(state, 770, 0xffff);
619 dib7000p_write_word(state, 771, 0xffff); 643 dib7000p_write_word(state, 771, 0xffff);
620 dib7000p_write_word(state, 772, 0x001f); 644 dib7000p_write_word(state, 772, 0x001f);
621 dib7000p_write_word(state, 898, 0x0003);
622 dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3))); 645 dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3)));
623 646
624 dib7000p_write_word(state, 770, 0); 647 dib7000p_write_word(state, 770, 0);
625 dib7000p_write_word(state, 771, 0); 648 dib7000p_write_word(state, 771, 0);
626 dib7000p_write_word(state, 772, 0); 649 dib7000p_write_word(state, 772, 0);
627 dib7000p_write_word(state, 898, 0);
628 dib7000p_write_word(state, 1280, 0); 650 dib7000p_write_word(state, 1280, 0);
629 651
652 if (state->version != SOC7090) {
653 dib7000p_write_word(state, 898, 0x0003);
654 dib7000p_write_word(state, 898, 0);
655 }
656
630 /* default */ 657 /* default */
631 dib7000p_reset_pll(state); 658 dib7000p_reset_pll(state);
632 659
@@ -640,7 +667,7 @@ static int dib7000p_demod_reset(struct dib7000p_state *state)
640 dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */ 667 dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */
641 dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */ 668 dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */
642 dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */ 669 dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */
643 dib7000p_write_word(state, 273, (1<<6) | 30); 670 dib7000p_write_word(state, 273, (0<<6) | 30);
644 } 671 }
645 if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0) 672 if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
646 dprintk("OUTPUT_MODE could not be reset."); 673 dprintk("OUTPUT_MODE could not be reset.");
@@ -655,7 +682,7 @@ static int dib7000p_demod_reset(struct dib7000p_state *state)
655 dib7000p_set_bandwidth(state, 8000); 682 dib7000p_set_bandwidth(state, 8000);
656 683
657 if (state->version == SOC7090) { 684 if (state->version == SOC7090) {
658 dib7000p_write_word(state, 36, 0x5755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noise */ 685 dib7000p_write_word(state, 36, 0x0755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noise */
659 } else { 686 } else {
660 if (state->cfg.tuner_is_baseband) 687 if (state->cfg.tuner_is_baseband)
661 dib7000p_write_word(state, 36, 0x0755); 688 dib7000p_write_word(state, 36, 0x0755);
@@ -664,6 +691,11 @@ static int dib7000p_demod_reset(struct dib7000p_state *state)
664 } 691 }
665 692
666 dib7000p_write_tab(state, dib7000p_defaults); 693 dib7000p_write_tab(state, dib7000p_defaults);
694 if (state->version != SOC7090) {
695 dib7000p_write_word(state, 901, 0x0006);
696 dib7000p_write_word(state, 902, (3 << 10) | (1 << 6));
697 dib7000p_write_word(state, 905, 0x2c8e);
698 }
667 699
668 dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); 700 dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
669 701
@@ -780,8 +812,9 @@ static void dib7000p_set_dds(struct dib7000p_state *state, s32 offset_khz)
780 } 812 }
781} 813}
782 814
783static int dib7000p_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 815static int dib7000p_agc_startup(struct dvb_frontend *demod)
784{ 816{
817 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
785 struct dib7000p_state *state = demod->demodulator_priv; 818 struct dib7000p_state *state = demod->demodulator_priv;
786 int ret = -1; 819 int ret = -1;
787 u8 *agc_state = &state->agc_state; 820 u8 *agc_state = &state->agc_state;
@@ -904,15 +937,16 @@ u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf)
904} 937}
905EXPORT_SYMBOL(dib7000p_ctrl_timf); 938EXPORT_SYMBOL(dib7000p_ctrl_timf);
906 939
907static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_frontend_parameters *ch, u8 seq) 940static void dib7000p_set_channel(struct dib7000p_state *state,
941 struct dtv_frontend_properties *ch, u8 seq)
908{ 942{
909 u16 value, est[4]; 943 u16 value, est[4];
910 944
911 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); 945 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz));
912 946
913 /* nfft, guard, qam, alpha */ 947 /* nfft, guard, qam, alpha */
914 value = 0; 948 value = 0;
915 switch (ch->u.ofdm.transmission_mode) { 949 switch (ch->transmission_mode) {
916 case TRANSMISSION_MODE_2K: 950 case TRANSMISSION_MODE_2K:
917 value |= (0 << 7); 951 value |= (0 << 7);
918 break; 952 break;
@@ -924,7 +958,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
924 value |= (1 << 7); 958 value |= (1 << 7);
925 break; 959 break;
926 } 960 }
927 switch (ch->u.ofdm.guard_interval) { 961 switch (ch->guard_interval) {
928 case GUARD_INTERVAL_1_32: 962 case GUARD_INTERVAL_1_32:
929 value |= (0 << 5); 963 value |= (0 << 5);
930 break; 964 break;
@@ -939,7 +973,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
939 value |= (2 << 5); 973 value |= (2 << 5);
940 break; 974 break;
941 } 975 }
942 switch (ch->u.ofdm.constellation) { 976 switch (ch->modulation) {
943 case QPSK: 977 case QPSK:
944 value |= (0 << 3); 978 value |= (0 << 3);
945 break; 979 break;
@@ -970,11 +1004,11 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
970 value = 0; 1004 value = 0;
971 if (1 != 0) 1005 if (1 != 0)
972 value |= (1 << 6); 1006 value |= (1 << 6);
973 if (ch->u.ofdm.hierarchy_information == 1) 1007 if (ch->hierarchy == 1)
974 value |= (1 << 4); 1008 value |= (1 << 4);
975 if (1 == 1) 1009 if (1 == 1)
976 value |= 1; 1010 value |= 1;
977 switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { 1011 switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) {
978 case FEC_2_3: 1012 case FEC_2_3:
979 value |= (2 << 1); 1013 value |= (2 << 1);
980 break; 1014 break;
@@ -1001,7 +1035,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
1001 dib7000p_write_word(state, 33, 0x0005); 1035 dib7000p_write_word(state, 33, 0x0005);
1002 1036
1003 /* P_dvsy_sync_wait */ 1037 /* P_dvsy_sync_wait */
1004 switch (ch->u.ofdm.transmission_mode) { 1038 switch (ch->transmission_mode) {
1005 case TRANSMISSION_MODE_8K: 1039 case TRANSMISSION_MODE_8K:
1006 value = 256; 1040 value = 256;
1007 break; 1041 break;
@@ -1013,7 +1047,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
1013 value = 64; 1047 value = 64;
1014 break; 1048 break;
1015 } 1049 }
1016 switch (ch->u.ofdm.guard_interval) { 1050 switch (ch->guard_interval) {
1017 case GUARD_INTERVAL_1_16: 1051 case GUARD_INTERVAL_1_16:
1018 value *= 2; 1052 value *= 2;
1019 break; 1053 break;
@@ -1034,11 +1068,11 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
1034 state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; 1068 state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay;
1035 1069
1036 /* deactive the possibility of diversity reception if extended interleaver */ 1070 /* deactive the possibility of diversity reception if extended interleaver */
1037 state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K; 1071 state->div_force_off = !1 && ch->transmission_mode != TRANSMISSION_MODE_8K;
1038 dib7000p_set_diversity_in(&state->demod, state->div_state); 1072 dib7000p_set_diversity_in(&state->demod, state->div_state);
1039 1073
1040 /* channel estimation fine configuration */ 1074 /* channel estimation fine configuration */
1041 switch (ch->u.ofdm.constellation) { 1075 switch (ch->modulation) {
1042 case QAM_64: 1076 case QAM_64:
1043 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ 1077 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */
1044 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ 1078 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */
@@ -1062,27 +1096,31 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
1062 dib7000p_write_word(state, 187 + value, est[value]); 1096 dib7000p_write_word(state, 187 + value, est[value]);
1063} 1097}
1064 1098
1065static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 1099static int dib7000p_autosearch_start(struct dvb_frontend *demod)
1066{ 1100{
1101 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
1067 struct dib7000p_state *state = demod->demodulator_priv; 1102 struct dib7000p_state *state = demod->demodulator_priv;
1068 struct dvb_frontend_parameters schan; 1103 struct dtv_frontend_properties schan;
1069 u32 value, factor; 1104 u32 value, factor;
1070 u32 internal = dib7000p_get_internal_freq(state); 1105 u32 internal = dib7000p_get_internal_freq(state);
1071 1106
1072 schan = *ch; 1107 schan = *ch;
1073 schan.u.ofdm.constellation = QAM_64; 1108 schan.modulation = QAM_64;
1074 schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 1109 schan.guard_interval = GUARD_INTERVAL_1_32;
1075 schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 1110 schan.transmission_mode = TRANSMISSION_MODE_8K;
1076 schan.u.ofdm.code_rate_HP = FEC_2_3; 1111 schan.code_rate_HP = FEC_2_3;
1077 schan.u.ofdm.code_rate_LP = FEC_3_4; 1112 schan.code_rate_LP = FEC_3_4;
1078 schan.u.ofdm.hierarchy_information = 0; 1113 schan.hierarchy = 0;
1079 1114
1080 dib7000p_set_channel(state, &schan, 7); 1115 dib7000p_set_channel(state, &schan, 7);
1081 1116
1082 factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth); 1117 factor = BANDWIDTH_TO_KHZ(ch->bandwidth_hz);
1083 if (factor >= 5000) 1118 if (factor >= 5000) {
1084 factor = 1; 1119 if (state->version == SOC7090)
1085 else 1120 factor = 2;
1121 else
1122 factor = 1;
1123 } else
1086 factor = 6; 1124 factor = 6;
1087 1125
1088 value = 30 * internal * factor; 1126 value = 30 * internal * factor;
@@ -1205,8 +1243,9 @@ static void dib7000p_spur_protect(struct dib7000p_state *state, u32 rf_khz, u32
1205 dib7000p_write_word(state, 143, 0); 1243 dib7000p_write_word(state, 143, 0);
1206} 1244}
1207 1245
1208static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) 1246static int dib7000p_tune(struct dvb_frontend *demod)
1209{ 1247{
1248 struct dtv_frontend_properties *ch = &demod->dtv_property_cache;
1210 struct dib7000p_state *state = demod->demodulator_priv; 1249 struct dib7000p_state *state = demod->demodulator_priv;
1211 u16 tmp = 0; 1250 u16 tmp = 0;
1212 1251
@@ -1239,7 +1278,7 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1239 1278
1240 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ 1279 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */
1241 tmp = (6 << 8) | 0x80; 1280 tmp = (6 << 8) | 0x80;
1242 switch (ch->u.ofdm.transmission_mode) { 1281 switch (ch->transmission_mode) {
1243 case TRANSMISSION_MODE_2K: 1282 case TRANSMISSION_MODE_2K:
1244 tmp |= (2 << 12); 1283 tmp |= (2 << 12);
1245 break; 1284 break;
@@ -1255,7 +1294,7 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1255 1294
1256 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ 1295 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */
1257 tmp = (0 << 4); 1296 tmp = (0 << 4);
1258 switch (ch->u.ofdm.transmission_mode) { 1297 switch (ch->transmission_mode) {
1259 case TRANSMISSION_MODE_2K: 1298 case TRANSMISSION_MODE_2K:
1260 tmp |= 0x6; 1299 tmp |= 0x6;
1261 break; 1300 break;
@@ -1271,7 +1310,7 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1271 1310
1272 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ 1311 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */
1273 tmp = (0 << 4); 1312 tmp = (0 << 4);
1274 switch (ch->u.ofdm.transmission_mode) { 1313 switch (ch->transmission_mode) {
1275 case TRANSMISSION_MODE_2K: 1314 case TRANSMISSION_MODE_2K:
1276 tmp |= 0x6; 1315 tmp |= 0x6;
1277 break; 1316 break;
@@ -1303,9 +1342,9 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
1303 } 1342 }
1304 1343
1305 if (state->cfg.spur_protect) 1344 if (state->cfg.spur_protect)
1306 dib7000p_spur_protect(state, ch->frequency / 1000, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); 1345 dib7000p_spur_protect(state, ch->frequency / 1000, BANDWIDTH_TO_KHZ(ch->bandwidth_hz));
1307 1346
1308 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); 1347 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz));
1309 return 0; 1348 return 0;
1310} 1349}
1311 1350
@@ -1323,7 +1362,7 @@ static int dib7000p_sleep(struct dvb_frontend *demod)
1323{ 1362{
1324 struct dib7000p_state *state = demod->demodulator_priv; 1363 struct dib7000p_state *state = demod->demodulator_priv;
1325 if (state->version == SOC7090) 1364 if (state->version == SOC7090)
1326 return dib7090_set_output_mode(demod, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); 1365 return dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
1327 return dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); 1366 return dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
1328} 1367}
1329 1368
@@ -1345,93 +1384,94 @@ static int dib7000p_identify(struct dib7000p_state *st)
1345 return 0; 1384 return 0;
1346} 1385}
1347 1386
1348static int dib7000p_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 1387static int dib7000p_get_frontend(struct dvb_frontend *fe)
1349{ 1388{
1389 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
1350 struct dib7000p_state *state = fe->demodulator_priv; 1390 struct dib7000p_state *state = fe->demodulator_priv;
1351 u16 tps = dib7000p_read_word(state, 463); 1391 u16 tps = dib7000p_read_word(state, 463);
1352 1392
1353 fep->inversion = INVERSION_AUTO; 1393 fep->inversion = INVERSION_AUTO;
1354 1394
1355 fep->u.ofdm.bandwidth = BANDWIDTH_TO_INDEX(state->current_bandwidth); 1395 fep->bandwidth_hz = BANDWIDTH_TO_HZ(state->current_bandwidth);
1356 1396
1357 switch ((tps >> 8) & 0x3) { 1397 switch ((tps >> 8) & 0x3) {
1358 case 0: 1398 case 0:
1359 fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; 1399 fep->transmission_mode = TRANSMISSION_MODE_2K;
1360 break; 1400 break;
1361 case 1: 1401 case 1:
1362 fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 1402 fep->transmission_mode = TRANSMISSION_MODE_8K;
1363 break; 1403 break;
1364 /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */ 1404 /* case 2: fep->transmission_mode = TRANSMISSION_MODE_4K; break; */
1365 } 1405 }
1366 1406
1367 switch (tps & 0x3) { 1407 switch (tps & 0x3) {
1368 case 0: 1408 case 0:
1369 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 1409 fep->guard_interval = GUARD_INTERVAL_1_32;
1370 break; 1410 break;
1371 case 1: 1411 case 1:
1372 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; 1412 fep->guard_interval = GUARD_INTERVAL_1_16;
1373 break; 1413 break;
1374 case 2: 1414 case 2:
1375 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; 1415 fep->guard_interval = GUARD_INTERVAL_1_8;
1376 break; 1416 break;
1377 case 3: 1417 case 3:
1378 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; 1418 fep->guard_interval = GUARD_INTERVAL_1_4;
1379 break; 1419 break;
1380 } 1420 }
1381 1421
1382 switch ((tps >> 14) & 0x3) { 1422 switch ((tps >> 14) & 0x3) {
1383 case 0: 1423 case 0:
1384 fep->u.ofdm.constellation = QPSK; 1424 fep->modulation = QPSK;
1385 break; 1425 break;
1386 case 1: 1426 case 1:
1387 fep->u.ofdm.constellation = QAM_16; 1427 fep->modulation = QAM_16;
1388 break; 1428 break;
1389 case 2: 1429 case 2:
1390 default: 1430 default:
1391 fep->u.ofdm.constellation = QAM_64; 1431 fep->modulation = QAM_64;
1392 break; 1432 break;
1393 } 1433 }
1394 1434
1395 /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ 1435 /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */
1396 /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */ 1436 /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */
1397 1437
1398 fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; 1438 fep->hierarchy = HIERARCHY_NONE;
1399 switch ((tps >> 5) & 0x7) { 1439 switch ((tps >> 5) & 0x7) {
1400 case 1: 1440 case 1:
1401 fep->u.ofdm.code_rate_HP = FEC_1_2; 1441 fep->code_rate_HP = FEC_1_2;
1402 break; 1442 break;
1403 case 2: 1443 case 2:
1404 fep->u.ofdm.code_rate_HP = FEC_2_3; 1444 fep->code_rate_HP = FEC_2_3;
1405 break; 1445 break;
1406 case 3: 1446 case 3:
1407 fep->u.ofdm.code_rate_HP = FEC_3_4; 1447 fep->code_rate_HP = FEC_3_4;
1408 break; 1448 break;
1409 case 5: 1449 case 5:
1410 fep->u.ofdm.code_rate_HP = FEC_5_6; 1450 fep->code_rate_HP = FEC_5_6;
1411 break; 1451 break;
1412 case 7: 1452 case 7:
1413 default: 1453 default:
1414 fep->u.ofdm.code_rate_HP = FEC_7_8; 1454 fep->code_rate_HP = FEC_7_8;
1415 break; 1455 break;
1416 1456
1417 } 1457 }
1418 1458
1419 switch ((tps >> 2) & 0x7) { 1459 switch ((tps >> 2) & 0x7) {
1420 case 1: 1460 case 1:
1421 fep->u.ofdm.code_rate_LP = FEC_1_2; 1461 fep->code_rate_LP = FEC_1_2;
1422 break; 1462 break;
1423 case 2: 1463 case 2:
1424 fep->u.ofdm.code_rate_LP = FEC_2_3; 1464 fep->code_rate_LP = FEC_2_3;
1425 break; 1465 break;
1426 case 3: 1466 case 3:
1427 fep->u.ofdm.code_rate_LP = FEC_3_4; 1467 fep->code_rate_LP = FEC_3_4;
1428 break; 1468 break;
1429 case 5: 1469 case 5:
1430 fep->u.ofdm.code_rate_LP = FEC_5_6; 1470 fep->code_rate_LP = FEC_5_6;
1431 break; 1471 break;
1432 case 7: 1472 case 7:
1433 default: 1473 default:
1434 fep->u.ofdm.code_rate_LP = FEC_7_8; 1474 fep->code_rate_LP = FEC_7_8;
1435 break; 1475 break;
1436 } 1476 }
1437 1477
@@ -1440,36 +1480,36 @@ static int dib7000p_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa
1440 return 0; 1480 return 0;
1441} 1481}
1442 1482
1443static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 1483static int dib7000p_set_frontend(struct dvb_frontend *fe)
1444{ 1484{
1485 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
1445 struct dib7000p_state *state = fe->demodulator_priv; 1486 struct dib7000p_state *state = fe->demodulator_priv;
1446 int time, ret; 1487 int time, ret;
1447 1488
1448 if (state->version == SOC7090) { 1489 if (state->version == SOC7090)
1449 dib7090_set_diversity_in(fe, 0); 1490 dib7090_set_diversity_in(fe, 0);
1450 dib7090_set_output_mode(fe, OUTMODE_HIGH_Z); 1491 else
1451 } else
1452 dib7000p_set_output_mode(state, OUTMODE_HIGH_Z); 1492 dib7000p_set_output_mode(state, OUTMODE_HIGH_Z);
1453 1493
1454 /* maybe the parameter has been changed */ 1494 /* maybe the parameter has been changed */
1455 state->sfn_workaround_active = buggy_sfn_workaround; 1495 state->sfn_workaround_active = buggy_sfn_workaround;
1456 1496
1457 if (fe->ops.tuner_ops.set_params) 1497 if (fe->ops.tuner_ops.set_params)
1458 fe->ops.tuner_ops.set_params(fe, fep); 1498 fe->ops.tuner_ops.set_params(fe);
1459 1499
1460 /* start up the AGC */ 1500 /* start up the AGC */
1461 state->agc_state = 0; 1501 state->agc_state = 0;
1462 do { 1502 do {
1463 time = dib7000p_agc_startup(fe, fep); 1503 time = dib7000p_agc_startup(fe);
1464 if (time != -1) 1504 if (time != -1)
1465 msleep(time); 1505 msleep(time);
1466 } while (time != -1); 1506 } while (time != -1);
1467 1507
1468 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || 1508 if (fep->transmission_mode == TRANSMISSION_MODE_AUTO ||
1469 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || fep->u.ofdm.constellation == QAM_AUTO || fep->u.ofdm.code_rate_HP == FEC_AUTO) { 1509 fep->guard_interval == GUARD_INTERVAL_AUTO || fep->modulation == QAM_AUTO || fep->code_rate_HP == FEC_AUTO) {
1470 int i = 800, found; 1510 int i = 800, found;
1471 1511
1472 dib7000p_autosearch_start(fe, fep); 1512 dib7000p_autosearch_start(fe);
1473 do { 1513 do {
1474 msleep(1); 1514 msleep(1);
1475 found = dib7000p_autosearch_is_irq(fe); 1515 found = dib7000p_autosearch_is_irq(fe);
@@ -1479,15 +1519,19 @@ static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa
1479 if (found == 0 || found == 1) 1519 if (found == 0 || found == 1)
1480 return 0; 1520 return 0;
1481 1521
1482 dib7000p_get_frontend(fe, fep); 1522 dib7000p_get_frontend(fe);
1483 } 1523 }
1484 1524
1485 ret = dib7000p_tune(fe, fep); 1525 ret = dib7000p_tune(fe);
1486 1526
1487 /* make this a config parameter */ 1527 /* make this a config parameter */
1488 if (state->version == SOC7090) 1528 if (state->version == SOC7090) {
1489 dib7090_set_output_mode(fe, state->cfg.output_mode); 1529 dib7090_set_output_mode(fe, state->cfg.output_mode);
1490 else 1530 if (state->cfg.enMpegOutput == 0) {
1531 dib7090_setDibTxMux(state, MPEG_ON_DIBTX);
1532 dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS);
1533 }
1534 } else
1491 dib7000p_set_output_mode(state, state->cfg.output_mode); 1535 dib7000p_set_output_mode(state, state->cfg.output_mode);
1492 1536
1493 return ret; 1537 return ret;
@@ -1831,7 +1875,8 @@ static int w7090p_tuner_rw_serpar(struct i2c_adapter *i2c_adap, struct i2c_msg m
1831 return num; 1875 return num;
1832} 1876}
1833 1877
1834int dib7090p_rw_on_apb(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num, u16 apb_address) 1878static int dib7090p_rw_on_apb(struct i2c_adapter *i2c_adap,
1879 struct i2c_msg msg[], int num, u16 apb_address)
1835{ 1880{
1836 struct dib7000p_state *state = i2c_get_adapdata(i2c_adap); 1881 struct dib7000p_state *state = i2c_get_adapdata(i2c_adap);
1837 u16 word; 1882 u16 word;
@@ -1933,10 +1978,10 @@ static int dib7090_tuner_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[]
1933 apb_address = 915; 1978 apb_address = 915;
1934 break; 1979 break;
1935 case 0x27: 1980 case 0x27:
1936 apb_address = 916; 1981 apb_address = 917;
1937 break; 1982 break;
1938 case 0x28: 1983 case 0x28:
1939 apb_address = 917; 1984 apb_address = 916;
1940 break; 1985 break;
1941 case 0x1d: 1986 case 0x1d:
1942 i = ((dib7000p_read_word(state, 72) >> 12) & 0x3); 1987 i = ((dib7000p_read_word(state, 72) >> 12) & 0x3);
@@ -2031,12 +2076,7 @@ static u32 dib7090_calcSyncFreq(u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32
2031 2076
2032static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 synchroMode, u32 syncWord, u32 syncSize) 2077static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 synchroMode, u32 syncWord, u32 syncSize)
2033{ 2078{
2034 u8 index_buf;
2035 u16 rx_copy_buf[22];
2036
2037 dprintk("Configure DibStream Tx"); 2079 dprintk("Configure DibStream Tx");
2038 for (index_buf = 0; index_buf < 22; index_buf++)
2039 rx_copy_buf[index_buf] = dib7000p_read_word(state, 1536+index_buf);
2040 2080
2041 dib7000p_write_word(state, 1615, 1); 2081 dib7000p_write_word(state, 1615, 1);
2042 dib7000p_write_word(state, 1603, P_Kin); 2082 dib7000p_write_word(state, 1603, P_Kin);
@@ -2048,9 +2088,6 @@ static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout
2048 dib7000p_write_word(state, 1612, syncSize); 2088 dib7000p_write_word(state, 1612, syncSize);
2049 dib7000p_write_word(state, 1615, 0); 2089 dib7000p_write_word(state, 1615, 0);
2050 2090
2051 for (index_buf = 0; index_buf < 22; index_buf++)
2052 dib7000p_write_word(state, 1536+index_buf, rx_copy_buf[index_buf]);
2053
2054 return 0; 2091 return 0;
2055} 2092}
2056 2093
@@ -2077,109 +2114,121 @@ static int dib7090_cfg_DibRx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout
2077 return 0; 2114 return 0;
2078} 2115}
2079 2116
2080static int dib7090_enDivOnHostBus(struct dib7000p_state *state) 2117static void dib7090_enMpegMux(struct dib7000p_state *state, int onoff)
2081{
2082 u16 reg;
2083
2084 dprintk("Enable Diversity on host bus");
2085 reg = (1 << 8) | (1 << 5);
2086 dib7000p_write_word(state, 1288, reg);
2087
2088 return dib7090_cfg_DibTx(state, 5, 5, 0, 0, 0, 0);
2089}
2090
2091static int dib7090_enAdcOnHostBus(struct dib7000p_state *state)
2092{
2093 u16 reg;
2094
2095 dprintk("Enable ADC on host bus");
2096 reg = (1 << 7) | (1 << 5);
2097 dib7000p_write_word(state, 1288, reg);
2098
2099 return dib7090_cfg_DibTx(state, 20, 5, 10, 0, 0, 0);
2100}
2101
2102static int dib7090_enMpegOnHostBus(struct dib7000p_state *state)
2103{ 2118{
2104 u16 reg; 2119 u16 reg_1287 = dib7000p_read_word(state, 1287);
2105
2106 dprintk("Enable Mpeg on host bus");
2107 reg = (1 << 9) | (1 << 5);
2108 dib7000p_write_word(state, 1288, reg);
2109 2120
2110 return dib7090_cfg_DibTx(state, 8, 5, 0, 0, 0, 0); 2121 switch (onoff) {
2111} 2122 case 1:
2123 reg_1287 &= ~(1<<7);
2124 break;
2125 case 0:
2126 reg_1287 |= (1<<7);
2127 break;
2128 }
2112 2129
2113static int dib7090_enMpegInput(struct dib7000p_state *state) 2130 dib7000p_write_word(state, 1287, reg_1287);
2114{
2115 dprintk("Enable Mpeg input");
2116 return dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); /*outputRate = 8 */
2117} 2131}
2118 2132
2119static int dib7090_enMpegMux(struct dib7000p_state *state, u16 pulseWidth, u16 enSerialMode, u16 enSerialClkDiv2) 2133static void dib7090_configMpegMux(struct dib7000p_state *state,
2134 u16 pulseWidth, u16 enSerialMode, u16 enSerialClkDiv2)
2120{ 2135{
2121 u16 reg = (1 << 7) | ((pulseWidth & 0x1f) << 2) | ((enSerialMode & 0x1) << 1) | (enSerialClkDiv2 & 0x1);
2122
2123 dprintk("Enable Mpeg mux"); 2136 dprintk("Enable Mpeg mux");
2124 dib7000p_write_word(state, 1287, reg);
2125 2137
2126 reg &= ~(1 << 7); 2138 dib7090_enMpegMux(state, 0);
2127 dib7000p_write_word(state, 1287, reg);
2128 2139
2129 reg = (1 << 4); 2140 /* If the input mode is MPEG do not divide the serial clock */
2130 dib7000p_write_word(state, 1288, reg); 2141 if ((enSerialMode == 1) && (state->input_mode_mpeg == 1))
2142 enSerialClkDiv2 = 0;
2131 2143
2132 return 0; 2144 dib7000p_write_word(state, 1287, ((pulseWidth & 0x1f) << 2)
2145 | ((enSerialMode & 0x1) << 1)
2146 | (enSerialClkDiv2 & 0x1));
2147
2148 dib7090_enMpegMux(state, 1);
2133} 2149}
2134 2150
2135static int dib7090_disableMpegMux(struct dib7000p_state *state) 2151static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode)
2136{ 2152{
2137 u16 reg; 2153 u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 7);
2138
2139 dprintk("Disable Mpeg mux");
2140 dib7000p_write_word(state, 1288, 0);
2141
2142 reg = dib7000p_read_word(state, 1287);
2143 reg &= ~(1 << 7);
2144 dib7000p_write_word(state, 1287, reg);
2145 2154
2146 return 0; 2155 switch (mode) {
2156 case MPEG_ON_DIBTX:
2157 dprintk("SET MPEG ON DIBSTREAM TX");
2158 dib7090_cfg_DibTx(state, 8, 5, 0, 0, 0, 0);
2159 reg_1288 |= (1<<9);
2160 break;
2161 case DIV_ON_DIBTX:
2162 dprintk("SET DIV_OUT ON DIBSTREAM TX");
2163 dib7090_cfg_DibTx(state, 5, 5, 0, 0, 0, 0);
2164 reg_1288 |= (1<<8);
2165 break;
2166 case ADC_ON_DIBTX:
2167 dprintk("SET ADC_OUT ON DIBSTREAM TX");
2168 dib7090_cfg_DibTx(state, 20, 5, 10, 0, 0, 0);
2169 reg_1288 |= (1<<7);
2170 break;
2171 default:
2172 break;
2173 }
2174 dib7000p_write_word(state, 1288, reg_1288);
2147} 2175}
2148 2176
2149static int dib7090_set_input_mode(struct dvb_frontend *fe, int mode) 2177static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode)
2150{ 2178{
2151 struct dib7000p_state *state = fe->demodulator_priv; 2179 u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 4);
2152 2180
2153 switch (mode) { 2181 switch (mode) {
2154 case INPUT_MODE_DIVERSITY: 2182 case DEMOUT_ON_HOSTBUS:
2155 dprintk("Enable diversity INPUT"); 2183 dprintk("SET DEM OUT OLD INTERF ON HOST BUS");
2156 dib7090_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0); 2184 dib7090_enMpegMux(state, 0);
2185 reg_1288 |= (1<<6);
2186 break;
2187 case DIBTX_ON_HOSTBUS:
2188 dprintk("SET DIBSTREAM TX ON HOST BUS");
2189 dib7090_enMpegMux(state, 0);
2190 reg_1288 |= (1<<5);
2157 break; 2191 break;
2158 case INPUT_MODE_MPEG: 2192 case MPEG_ON_HOSTBUS:
2159 dprintk("Enable Mpeg INPUT"); 2193 dprintk("SET MPEG MUX ON HOST BUS");
2160 dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); /*outputRate = 8 */ 2194 reg_1288 |= (1<<4);
2161 break; 2195 break;
2162 case INPUT_MODE_OFF:
2163 default: 2196 default:
2164 dprintk("Disable INPUT");
2165 dib7090_cfg_DibRx(state, 0, 0, 0, 0, 0, 0, 0);
2166 break; 2197 break;
2167 } 2198 }
2168 return 0; 2199 dib7000p_write_word(state, 1288, reg_1288);
2169} 2200}
2170 2201
2171static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff) 2202int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff)
2172{ 2203{
2204 struct dib7000p_state *state = fe->demodulator_priv;
2205 u16 reg_1287;
2206
2173 switch (onoff) { 2207 switch (onoff) {
2174 case 0: /* only use the internal way - not the diversity input */ 2208 case 0: /* only use the internal way - not the diversity input */
2175 dib7090_set_input_mode(fe, INPUT_MODE_MPEG); 2209 dprintk("%s mode OFF : by default Enable Mpeg INPUT", __func__);
2176 break; 2210 dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0);
2177 case 1: /* both ways */ 2211
2178 case 2: /* only the diversity input */ 2212 /* Do not divide the serial clock of MPEG MUX */
2179 dib7090_set_input_mode(fe, INPUT_MODE_DIVERSITY); 2213 /* in SERIAL MODE in case input mode MPEG is used */
2180 break; 2214 reg_1287 = dib7000p_read_word(state, 1287);
2215 /* enSerialClkDiv2 == 1 ? */
2216 if ((reg_1287 & 0x1) == 1) {
2217 /* force enSerialClkDiv2 = 0 */
2218 reg_1287 &= ~0x1;
2219 dib7000p_write_word(state, 1287, reg_1287);
2220 }
2221 state->input_mode_mpeg = 1;
2222 break;
2223 case 1: /* both ways */
2224 case 2: /* only the diversity input */
2225 dprintk("%s ON : Enable diversity INPUT", __func__);
2226 dib7090_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0);
2227 state->input_mode_mpeg = 0;
2228 break;
2181 } 2229 }
2182 2230
2231 dib7000p_set_diversity_in(&state->demod, onoff);
2183 return 0; 2232 return 0;
2184} 2233}
2185 2234
@@ -2204,69 +2253,63 @@ static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode)
2204 2253
2205 case OUTMODE_MPEG2_SERIAL: 2254 case OUTMODE_MPEG2_SERIAL:
2206 if (prefer_mpeg_mux_use) { 2255 if (prefer_mpeg_mux_use) {
2207 dprintk("Sip 7090P setting output mode TS_SERIAL using Mpeg Mux"); 2256 dprintk("setting output mode TS_SERIAL using Mpeg Mux");
2208 dib7090_enMpegOnHostBus(state); 2257 dib7090_configMpegMux(state, 3, 1, 1);
2209 dib7090_enMpegInput(state); 2258 dib7090_setHostBusMux(state, MPEG_ON_HOSTBUS);
2210 if (state->cfg.enMpegOutput == 1) 2259 } else {/* Use Smooth block */
2211 dib7090_enMpegMux(state, 3, 1, 1); 2260 dprintk("setting output mode TS_SERIAL using Smooth bloc");
2212 2261 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS);
2213 } else { /* Use Smooth block */ 2262 outreg |= (2<<6) | (0 << 1);
2214 dprintk("Sip 7090P setting output mode TS_SERIAL using Smooth bloc");
2215 dib7090_disableMpegMux(state);
2216 dib7000p_write_word(state, 1288, (1 << 6));
2217 outreg |= (2 << 6) | (0 << 1);
2218 } 2263 }
2219 break; 2264 break;
2220 2265
2221 case OUTMODE_MPEG2_PAR_GATED_CLK: 2266 case OUTMODE_MPEG2_PAR_GATED_CLK:
2222 if (prefer_mpeg_mux_use) { 2267 if (prefer_mpeg_mux_use) {
2223 dprintk("Sip 7090P setting output mode TS_PARALLEL_GATED using Mpeg Mux"); 2268 dprintk("setting output mode TS_PARALLEL_GATED using Mpeg Mux");
2224 dib7090_enMpegOnHostBus(state); 2269 dib7090_configMpegMux(state, 2, 0, 0);
2225 dib7090_enMpegInput(state); 2270 dib7090_setHostBusMux(state, MPEG_ON_HOSTBUS);
2226 if (state->cfg.enMpegOutput == 1) 2271 } else { /* Use Smooth block */
2227 dib7090_enMpegMux(state, 2, 0, 0); 2272 dprintk("setting output mode TS_PARALLEL_GATED using Smooth block");
2228 } else { /* Use Smooth block */ 2273 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS);
2229 dprintk("Sip 7090P setting output mode TS_PARALLEL_GATED using Smooth block"); 2274 outreg |= (0<<6);
2230 dib7090_disableMpegMux(state);
2231 dib7000p_write_word(state, 1288, (1 << 6));
2232 outreg |= (0 << 6);
2233 } 2275 }
2234 break; 2276 break;
2235 2277
2236 case OUTMODE_MPEG2_PAR_CONT_CLK: /* Using Smooth block only */ 2278 case OUTMODE_MPEG2_PAR_CONT_CLK: /* Using Smooth block only */
2237 dprintk("Sip 7090P setting output mode TS_PARALLEL_CONT using Smooth block"); 2279 dprintk("setting output mode TS_PARALLEL_CONT using Smooth block");
2238 dib7090_disableMpegMux(state); 2280 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS);
2239 dib7000p_write_word(state, 1288, (1 << 6)); 2281 outreg |= (1<<6);
2240 outreg |= (1 << 6);
2241 break; 2282 break;
2242 2283
2243 case OUTMODE_MPEG2_FIFO: /* Using Smooth block because not supported by new Mpeg Mux bloc */ 2284 case OUTMODE_MPEG2_FIFO: /* Using Smooth block because not supported by new Mpeg Mux bloc */
2244 dprintk("Sip 7090P setting output mode TS_FIFO using Smooth block"); 2285 dprintk("setting output mode TS_FIFO using Smooth block");
2245 dib7090_disableMpegMux(state); 2286 dib7090_setHostBusMux(state, DEMOUT_ON_HOSTBUS);
2246 dib7000p_write_word(state, 1288, (1 << 6)); 2287 outreg |= (5<<6);
2247 outreg |= (5 << 6);
2248 smo_mode |= (3 << 1); 2288 smo_mode |= (3 << 1);
2249 fifo_threshold = 512; 2289 fifo_threshold = 512;
2250 break; 2290 break;
2251 2291
2252 case OUTMODE_DIVERSITY: 2292 case OUTMODE_DIVERSITY:
2253 dprintk("Sip 7090P setting output mode MODE_DIVERSITY"); 2293 dprintk("setting output mode MODE_DIVERSITY");
2254 dib7090_disableMpegMux(state); 2294 dib7090_setDibTxMux(state, DIV_ON_DIBTX);
2255 dib7090_enDivOnHostBus(state); 2295 dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS);
2256 break; 2296 break;
2257 2297
2258 case OUTMODE_ANALOG_ADC: 2298 case OUTMODE_ANALOG_ADC:
2259 dprintk("Sip 7090P setting output mode MODE_ANALOG_ADC"); 2299 dprintk("setting output mode MODE_ANALOG_ADC");
2260 dib7090_enAdcOnHostBus(state); 2300 dib7090_setDibTxMux(state, ADC_ON_DIBTX);
2301 dib7090_setHostBusMux(state, DIBTX_ON_HOSTBUS);
2261 break; 2302 break;
2262 } 2303 }
2304 if (mode != OUTMODE_HIGH_Z)
2305 outreg |= (1 << 10);
2263 2306
2264 if (state->cfg.output_mpeg2_in_188_bytes) 2307 if (state->cfg.output_mpeg2_in_188_bytes)
2265 smo_mode |= (1 << 5); 2308 smo_mode |= (1 << 5);
2266 2309
2267 ret |= dib7000p_write_word(state, 235, smo_mode); 2310 ret |= dib7000p_write_word(state, 235, smo_mode);
2268 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */ 2311 ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */
2269 ret |= dib7000p_write_word(state, 1286, outreg | (1 << 10)); /* allways set Dout active = 1 !!! */ 2312 ret |= dib7000p_write_word(state, 1286, outreg);
2270 2313
2271 return ret; 2314 return ret;
2272} 2315}
@@ -2296,13 +2339,6 @@ int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff)
2296} 2339}
2297EXPORT_SYMBOL(dib7090_tuner_sleep); 2340EXPORT_SYMBOL(dib7090_tuner_sleep);
2298 2341
2299int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2300{
2301 dprintk("AGC restart callback: %d", restart);
2302 return 0;
2303}
2304EXPORT_SYMBOL(dib7090_agc_restart);
2305
2306int dib7090_get_adc_power(struct dvb_frontend *fe) 2342int dib7090_get_adc_power(struct dvb_frontend *fe)
2307{ 2343{
2308 return dib7000p_get_adc_power(fe); 2344 return dib7000p_get_adc_power(fe);
@@ -2391,9 +2427,9 @@ error:
2391EXPORT_SYMBOL(dib7000p_attach); 2427EXPORT_SYMBOL(dib7000p_attach);
2392 2428
2393static struct dvb_frontend_ops dib7000p_ops = { 2429static struct dvb_frontend_ops dib7000p_ops = {
2430 .delsys = { SYS_DVBT },
2394 .info = { 2431 .info = {
2395 .name = "DiBcom 7000PC", 2432 .name = "DiBcom 7000PC",
2396 .type = FE_OFDM,
2397 .frequency_min = 44250000, 2433 .frequency_min = 44250000,
2398 .frequency_max = 867250000, 2434 .frequency_max = 867250000,
2399 .frequency_stepsize = 62500, 2435 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/dib7000p.h b/drivers/media/dvb/frontends/dib7000p.h
index 0179f9474ba..b61b03a6e1e 100644
--- a/drivers/media/dvb/frontends/dib7000p.h
+++ b/drivers/media/dvb/frontends/dib7000p.h
@@ -56,11 +56,12 @@ extern int dib7000p_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
56extern int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff); 56extern int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
57extern int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw); 57extern int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw);
58extern u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf); 58extern u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf);
59extern int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart);
60extern int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff); 59extern int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff);
61extern int dib7090_get_adc_power(struct dvb_frontend *fe); 60extern int dib7090_get_adc_power(struct dvb_frontend *fe);
62extern struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe); 61extern struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe);
63extern int dib7090_slave_reset(struct dvb_frontend *fe); 62extern int dib7090_slave_reset(struct dvb_frontend *fe);
63extern int dib7000p_get_agc_values(struct dvb_frontend *fe,
64 u16 *agc_global, u16 *agc1, u16 *agc2, u16 *wbd);
64#else 65#else
65static inline struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg) 66static inline struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg)
66{ 67{
@@ -122,12 +123,6 @@ static inline u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf)
122 return 0; 123 return 0;
123} 124}
124 125
125static inline int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
126{
127 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
128 return -ENODEV;
129}
130
131static inline int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff) 126static inline int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff)
132{ 127{
133 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 128 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
@@ -151,6 +146,13 @@ static inline int dib7090_slave_reset(struct dvb_frontend *fe)
151 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 146 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
152 return -ENODEV; 147 return -ENODEV;
153} 148}
149
150static inline int dib7000p_get_agc_values(struct dvb_frontend *fe,
151 u16 *agc_global, u16 *agc1, u16 *agc2, u16 *wbd)
152{
153 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
154 return -ENODEV;
155}
154#endif 156#endif
155 157
156#endif 158#endif
diff --git a/drivers/media/dvb/frontends/dib8000.c b/drivers/media/dvb/frontends/dib8000.c
index fe284d5292f..9ca34f49500 100644
--- a/drivers/media/dvb/frontends/dib8000.c
+++ b/drivers/media/dvb/frontends/dib8000.c
@@ -81,11 +81,15 @@ struct dib8000_state {
81 u8 i2c_write_buffer[4]; 81 u8 i2c_write_buffer[4];
82 u8 i2c_read_buffer[2]; 82 u8 i2c_read_buffer[2];
83 struct mutex i2c_buffer_lock; 83 struct mutex i2c_buffer_lock;
84 u8 input_mode_mpeg;
85
86 u16 tuner_enable;
87 struct i2c_adapter dib8096p_tuner_adap;
84}; 88};
85 89
86enum dib8000_power_mode { 90enum dib8000_power_mode {
87 DIB8000M_POWER_ALL = 0, 91 DIB8000_POWER_ALL = 0,
88 DIB8000M_POWER_INTERFACE_ONLY, 92 DIB8000_POWER_INTERFACE_ONLY,
89}; 93};
90 94
91static u16 dib8000_i2c_read16(struct i2c_device *i2c, u16 reg) 95static u16 dib8000_i2c_read16(struct i2c_device *i2c, u16 reg)
@@ -428,20 +432,31 @@ static void dib8000_set_power_mode(struct dib8000_state *state, enum dib8000_pow
428 /* by default everything is going to be powered off */ 432 /* by default everything is going to be powered off */
429 u16 reg_774 = 0x3fff, reg_775 = 0xffff, reg_776 = 0xffff, 433 u16 reg_774 = 0x3fff, reg_775 = 0xffff, reg_776 = 0xffff,
430 reg_900 = (dib8000_read_word(state, 900) & 0xfffc) | 0x3, 434 reg_900 = (dib8000_read_word(state, 900) & 0xfffc) | 0x3,
435 reg_1280;
436
437 if (state->revision != 0x8090)
431 reg_1280 = (dib8000_read_word(state, 1280) & 0x00ff) | 0xff00; 438 reg_1280 = (dib8000_read_word(state, 1280) & 0x00ff) | 0xff00;
439 else
440 reg_1280 = (dib8000_read_word(state, 1280) & 0x707f) | 0x8f80;
432 441
433 /* now, depending on the requested mode, we power on */ 442 /* now, depending on the requested mode, we power on */
434 switch (mode) { 443 switch (mode) {
435 /* power up everything in the demod */ 444 /* power up everything in the demod */
436 case DIB8000M_POWER_ALL: 445 case DIB8000_POWER_ALL:
437 reg_774 = 0x0000; 446 reg_774 = 0x0000;
438 reg_775 = 0x0000; 447 reg_775 = 0x0000;
439 reg_776 = 0x0000; 448 reg_776 = 0x0000;
440 reg_900 &= 0xfffc; 449 reg_900 &= 0xfffc;
441 reg_1280 &= 0x00ff; 450 if (state->revision != 0x8090)
451 reg_1280 &= 0x00ff;
452 else
453 reg_1280 &= 0x707f;
442 break; 454 break;
443 case DIB8000M_POWER_INTERFACE_ONLY: 455 case DIB8000_POWER_INTERFACE_ONLY:
444 reg_1280 &= 0x00ff; 456 if (state->revision != 0x8090)
457 reg_1280 &= 0x00ff;
458 else
459 reg_1280 &= 0xfa7b;
445 break; 460 break;
446 } 461 }
447 462
@@ -453,19 +468,67 @@ static void dib8000_set_power_mode(struct dib8000_state *state, enum dib8000_pow
453 dib8000_write_word(state, 1280, reg_1280); 468 dib8000_write_word(state, 1280, reg_1280);
454} 469}
455 470
471static int dib8000_init_sdram(struct dib8000_state *state)
472{
473 u16 reg = 0;
474 dprintk("Init sdram");
475
476 reg = dib8000_read_word(state, 274)&0xfff0;
477 /* P_dintlv_delay_ram = 7 because of MobileSdram */
478 dib8000_write_word(state, 274, reg | 0x7);
479
480 dib8000_write_word(state, 1803, (7<<2));
481
482 reg = dib8000_read_word(state, 1280);
483 /* force restart P_restart_sdram */
484 dib8000_write_word(state, 1280, reg | (1<<2));
485
486 /* release restart P_restart_sdram */
487 dib8000_write_word(state, 1280, reg);
488
489 return 0;
490}
491
456static int dib8000_set_adc_state(struct dib8000_state *state, enum dibx000_adc_states no) 492static int dib8000_set_adc_state(struct dib8000_state *state, enum dibx000_adc_states no)
457{ 493{
458 int ret = 0; 494 int ret = 0;
459 u16 reg_907 = dib8000_read_word(state, 907), reg_908 = dib8000_read_word(state, 908); 495 u16 reg, reg_907 = dib8000_read_word(state, 907);
496 u16 reg_908 = dib8000_read_word(state, 908);
460 497
461 switch (no) { 498 switch (no) {
462 case DIBX000_SLOW_ADC_ON: 499 case DIBX000_SLOW_ADC_ON:
463 reg_908 |= (1 << 1) | (1 << 0); 500 if (state->revision != 0x8090) {
464 ret |= dib8000_write_word(state, 908, reg_908); 501 reg_908 |= (1 << 1) | (1 << 0);
465 reg_908 &= ~(1 << 1); 502 ret |= dib8000_write_word(state, 908, reg_908);
503 reg_908 &= ~(1 << 1);
504 } else {
505 reg = dib8000_read_word(state, 1925);
506 /* en_slowAdc = 1 & reset_sladc = 1 */
507 dib8000_write_word(state, 1925, reg |
508 (1<<4) | (1<<2));
509
510 /* read acces to make it works... strange ... */
511 reg = dib8000_read_word(state, 1925);
512 msleep(20);
513 /* en_slowAdc = 1 & reset_sladc = 0 */
514 dib8000_write_word(state, 1925, reg & ~(1<<4));
515
516 reg = dib8000_read_word(state, 921) & ~((0x3 << 14)
517 | (0x3 << 12));
518 /* ref = Vin1 => Vbg ; sel = Vin0 or Vin3 ;
519 (Vin2 = Vcm) */
520 dib8000_write_word(state, 921, reg | (1 << 14)
521 | (3 << 12));
522 }
466 break; 523 break;
467 524
468 case DIBX000_SLOW_ADC_OFF: 525 case DIBX000_SLOW_ADC_OFF:
526 if (state->revision == 0x8090) {
527 reg = dib8000_read_word(state, 1925);
528 /* reset_sladc = 1 en_slowAdc = 0 */
529 dib8000_write_word(state, 1925,
530 (reg & ~(1<<2)) | (1<<4));
531 }
469 reg_908 |= (1 << 1) | (1 << 0); 532 reg_908 |= (1 << 1) | (1 << 0);
470 break; 533 break;
471 534
@@ -521,7 +584,12 @@ static int dib8000_set_bandwidth(struct dvb_frontend *fe, u32 bw)
521 584
522static int dib8000_sad_calib(struct dib8000_state *state) 585static int dib8000_sad_calib(struct dib8000_state *state)
523{ 586{
524/* internal */ 587 if (state->revision == 0x8090) {
588 dprintk("%s: the sad calibration is not needed for the dib8096P",
589 __func__);
590 return 0;
591 }
592 /* internal */
525 dib8000_write_word(state, 923, (0 << 1) | (0 << 0)); 593 dib8000_write_word(state, 923, (0 << 1) | (0 << 0));
526 dib8000_write_word(state, 924, 776); // 0.625*3.3 / 4096 594 dib8000_write_word(state, 924, 776); // 0.625*3.3 / 4096
527 595
@@ -546,48 +614,129 @@ EXPORT_SYMBOL(dib8000_set_wbd_ref);
546static void dib8000_reset_pll_common(struct dib8000_state *state, const struct dibx000_bandwidth_config *bw) 614static void dib8000_reset_pll_common(struct dib8000_state *state, const struct dibx000_bandwidth_config *bw)
547{ 615{
548 dprintk("ifreq: %d %x, inversion: %d", bw->ifreq, bw->ifreq, bw->ifreq >> 25); 616 dprintk("ifreq: %d %x, inversion: %d", bw->ifreq, bw->ifreq, bw->ifreq >> 25);
549 dib8000_write_word(state, 23, (u16) (((bw->internal * 1000) >> 16) & 0xffff)); /* P_sec_len */ 617 if (state->revision != 0x8090) {
550 dib8000_write_word(state, 24, (u16) ((bw->internal * 1000) & 0xffff)); 618 dib8000_write_word(state, 23,
619 (u16) (((bw->internal * 1000) >> 16) & 0xffff));
620 dib8000_write_word(state, 24,
621 (u16) ((bw->internal * 1000) & 0xffff));
622 } else {
623 dib8000_write_word(state, 23, (u16) (((bw->internal / 2 * 1000) >> 16) & 0xffff));
624 dib8000_write_word(state, 24,
625 (u16) ((bw->internal / 2 * 1000) & 0xffff));
626 }
551 dib8000_write_word(state, 27, (u16) ((bw->ifreq >> 16) & 0x01ff)); 627 dib8000_write_word(state, 27, (u16) ((bw->ifreq >> 16) & 0x01ff));
552 dib8000_write_word(state, 28, (u16) (bw->ifreq & 0xffff)); 628 dib8000_write_word(state, 28, (u16) (bw->ifreq & 0xffff));
553 dib8000_write_word(state, 26, (u16) ((bw->ifreq >> 25) & 0x0003)); 629 dib8000_write_word(state, 26, (u16) ((bw->ifreq >> 25) & 0x0003));
554 630
555 dib8000_write_word(state, 922, bw->sad_cfg); 631 if (state->revision != 0x8090)
632 dib8000_write_word(state, 922, bw->sad_cfg);
556} 633}
557 634
558static void dib8000_reset_pll(struct dib8000_state *state) 635static void dib8000_reset_pll(struct dib8000_state *state)
559{ 636{
560 const struct dibx000_bandwidth_config *pll = state->cfg.pll; 637 const struct dibx000_bandwidth_config *pll = state->cfg.pll;
561 u16 clk_cfg1; 638 u16 clk_cfg1, reg;
562 639
563 // clk_cfg0 640 if (state->revision != 0x8090) {
564 dib8000_write_word(state, 901, (pll->pll_prediv << 8) | (pll->pll_ratio << 0)); 641 dib8000_write_word(state, 901,
565 642 (pll->pll_prediv << 8) | (pll->pll_ratio << 0));
566 // clk_cfg1 643
567 clk_cfg1 = (1 << 10) | (0 << 9) | (pll->IO_CLK_en_core << 8) | 644 clk_cfg1 = (1 << 10) | (0 << 9) | (pll->IO_CLK_en_core << 8) |
568 (pll->bypclk_div << 5) | (pll->enable_refdiv << 4) | (1 << 3) | 645 (pll->bypclk_div << 5) | (pll->enable_refdiv << 4) |
569 (pll->pll_range << 1) | (pll->pll_reset << 0); 646 (1 << 3) | (pll->pll_range << 1) |
570 647 (pll->pll_reset << 0);
571 dib8000_write_word(state, 902, clk_cfg1); 648
572 clk_cfg1 = (clk_cfg1 & 0xfff7) | (pll->pll_bypass << 3); 649 dib8000_write_word(state, 902, clk_cfg1);
573 dib8000_write_word(state, 902, clk_cfg1); 650 clk_cfg1 = (clk_cfg1 & 0xfff7) | (pll->pll_bypass << 3);
574 651 dib8000_write_word(state, 902, clk_cfg1);
575 dprintk("clk_cfg1: 0x%04x", clk_cfg1); /* 0x507 1 0 1 000 0 0 11 1 */ 652
576 653 dprintk("clk_cfg1: 0x%04x", clk_cfg1);
577 /* smpl_cfg: P_refclksel=2, P_ensmplsel=1 nodivsmpl=1 */ 654
578 if (state->cfg.pll->ADClkSrc == 0) 655 /* smpl_cfg: P_refclksel=2, P_ensmplsel=1 nodivsmpl=1 */
579 dib8000_write_word(state, 904, (0 << 15) | (0 << 12) | (0 << 10) | 656 if (state->cfg.pll->ADClkSrc == 0)
580 (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1)); 657 dib8000_write_word(state, 904,
581 else if (state->cfg.refclksel != 0) 658 (0 << 15) | (0 << 12) | (0 << 10) |
582 dib8000_write_word(state, 904, (0 << 15) | (1 << 12) | 659 (pll->modulo << 8) |
583 ((state->cfg.refclksel & 0x3) << 10) | (pll->modulo << 8) | 660 (pll->ADClkSrc << 7) | (0 << 1));
584 (pll->ADClkSrc << 7) | (0 << 1)); 661 else if (state->cfg.refclksel != 0)
585 else 662 dib8000_write_word(state, 904, (0 << 15) | (1 << 12) |
586 dib8000_write_word(state, 904, (0 << 15) | (1 << 12) | (3 << 10) | (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1)); 663 ((state->cfg.refclksel & 0x3) << 10) |
664 (pll->modulo << 8) |
665 (pll->ADClkSrc << 7) | (0 << 1));
666 else
667 dib8000_write_word(state, 904, (0 << 15) | (1 << 12) |
668 (3 << 10) | (pll->modulo << 8) |
669 (pll->ADClkSrc << 7) | (0 << 1));
670 } else {
671 dib8000_write_word(state, 1856, (!pll->pll_reset<<13) |
672 (pll->pll_range<<12) | (pll->pll_ratio<<6) |
673 (pll->pll_prediv));
674
675 reg = dib8000_read_word(state, 1857);
676 dib8000_write_word(state, 1857, reg|(!pll->pll_bypass<<15));
677
678 reg = dib8000_read_word(state, 1858); /* Force clk out pll /2 */
679 dib8000_write_word(state, 1858, reg | 1);
680
681 dib8000_write_word(state, 904, (pll->modulo << 8));
682 }
587 683
588 dib8000_reset_pll_common(state, pll); 684 dib8000_reset_pll_common(state, pll);
589} 685}
590 686
687int dib8000_update_pll(struct dvb_frontend *fe,
688 struct dibx000_bandwidth_config *pll)
689{
690 struct dib8000_state *state = fe->demodulator_priv;
691 u16 reg_1857, reg_1856 = dib8000_read_word(state, 1856);
692 u8 loopdiv, prediv;
693 u32 internal, xtal;
694
695 /* get back old values */
696 prediv = reg_1856 & 0x3f;
697 loopdiv = (reg_1856 >> 6) & 0x3f;
698
699 if ((pll != NULL) && (pll->pll_prediv != prediv ||
700 pll->pll_ratio != loopdiv)) {
701 dprintk("Updating pll (prediv: old = %d new = %d ; loopdiv : old = %d new = %d)", prediv, pll->pll_prediv, loopdiv, pll->pll_ratio);
702 reg_1856 &= 0xf000;
703 reg_1857 = dib8000_read_word(state, 1857);
704 /* disable PLL */
705 dib8000_write_word(state, 1857, reg_1857 & ~(1 << 15));
706
707 dib8000_write_word(state, 1856, reg_1856 |
708 ((pll->pll_ratio & 0x3f) << 6) |
709 (pll->pll_prediv & 0x3f));
710
711 /* write new system clk into P_sec_len */
712 internal = dib8000_read32(state, 23) / 1000;
713 dprintk("Old Internal = %d", internal);
714 xtal = 2 * (internal / loopdiv) * prediv;
715 internal = 1000 * (xtal/pll->pll_prediv) * pll->pll_ratio;
716 dprintk("Xtal = %d , New Fmem = %d New Fdemod = %d, New Fsampling = %d", xtal, internal/1000, internal/2000, internal/8000);
717 dprintk("New Internal = %d", internal);
718
719 dib8000_write_word(state, 23,
720 (u16) (((internal / 2) >> 16) & 0xffff));
721 dib8000_write_word(state, 24, (u16) ((internal / 2) & 0xffff));
722 /* enable PLL */
723 dib8000_write_word(state, 1857, reg_1857 | (1 << 15));
724
725 while (((dib8000_read_word(state, 1856)>>15)&0x1) != 1)
726 dprintk("Waiting for PLL to lock");
727
728 /* verify */
729 reg_1856 = dib8000_read_word(state, 1856);
730 dprintk("PLL Updated with prediv = %d and loopdiv = %d",
731 reg_1856&0x3f, (reg_1856>>6)&0x3f);
732
733 return 0;
734 }
735 return -EINVAL;
736}
737EXPORT_SYMBOL(dib8000_update_pll);
738
739
591static int dib8000_reset_gpio(struct dib8000_state *st) 740static int dib8000_reset_gpio(struct dib8000_state *st)
592{ 741{
593 /* reset the GPIOs */ 742 /* reset the GPIOs */
@@ -721,9 +870,6 @@ static const u16 dib8000_defaults[] = {
721 (3 << 5) | /* P_ctrl_pre_freq_step=3 */ 870 (3 << 5) | /* P_ctrl_pre_freq_step=3 */
722 (1 << 0), /* P_pre_freq_win_len=1 */ 871 (1 << 0), /* P_pre_freq_win_len=1 */
723 872
724 1, 903,
725 (0 << 4) | 2, // P_divclksel=0 P_divbitsel=2 (was clk=3,bit=1 for MPW)
726
727 0, 873 0,
728}; 874};
729 875
@@ -740,7 +886,8 @@ static u16 dib8000_identify(struct i2c_device *client)
740 } 886 }
741 887
742 value = dib8000_i2c_read16(client, 897); 888 value = dib8000_i2c_read16(client, 897);
743 if (value != 0x8000 && value != 0x8001 && value != 0x8002) { 889 if (value != 0x8000 && value != 0x8001 &&
890 value != 0x8002 && value != 0x8090) {
744 dprintk("wrong Device ID (%x)", value); 891 dprintk("wrong Device ID (%x)", value);
745 return 0; 892 return 0;
746 } 893 }
@@ -755,6 +902,9 @@ static u16 dib8000_identify(struct i2c_device *client)
755 case 0x8002: 902 case 0x8002:
756 dprintk("found DiB8000C"); 903 dprintk("found DiB8000C");
757 break; 904 break;
905 case 0x8090:
906 dprintk("found DiB8096P");
907 break;
758 } 908 }
759 return value; 909 return value;
760} 910}
@@ -763,17 +913,19 @@ static int dib8000_reset(struct dvb_frontend *fe)
763{ 913{
764 struct dib8000_state *state = fe->demodulator_priv; 914 struct dib8000_state *state = fe->demodulator_priv;
765 915
766 dib8000_write_word(state, 1287, 0x0003); /* sram lead in, rdy */
767
768 if ((state->revision = dib8000_identify(&state->i2c)) == 0) 916 if ((state->revision = dib8000_identify(&state->i2c)) == 0)
769 return -EINVAL; 917 return -EINVAL;
770 918
919 /* sram lead in, rdy */
920 if (state->revision != 0x8090)
921 dib8000_write_word(state, 1287, 0x0003);
922
771 if (state->revision == 0x8000) 923 if (state->revision == 0x8000)
772 dprintk("error : dib8000 MA not supported"); 924 dprintk("error : dib8000 MA not supported");
773 925
774 dibx000_reset_i2c_master(&state->i2c_master); 926 dibx000_reset_i2c_master(&state->i2c_master);
775 927
776 dib8000_set_power_mode(state, DIB8000M_POWER_ALL); 928 dib8000_set_power_mode(state, DIB8000_POWER_ALL);
777 929
778 /* always leave the VBG voltage on - it consumes almost nothing but takes a long time to start */ 930 /* always leave the VBG voltage on - it consumes almost nothing but takes a long time to start */
779 dib8000_set_adc_state(state, DIBX000_VBG_ENABLE); 931 dib8000_set_adc_state(state, DIBX000_VBG_ENABLE);
@@ -782,8 +934,10 @@ static int dib8000_reset(struct dvb_frontend *fe)
782 dib8000_write_word(state, 770, 0xffff); 934 dib8000_write_word(state, 770, 0xffff);
783 dib8000_write_word(state, 771, 0xffff); 935 dib8000_write_word(state, 771, 0xffff);
784 dib8000_write_word(state, 772, 0xfffc); 936 dib8000_write_word(state, 772, 0xfffc);
785 dib8000_write_word(state, 898, 0x000c); // sad 937 if (state->revision == 0x8090)
786 dib8000_write_word(state, 1280, 0x004d); 938 dib8000_write_word(state, 1280, 0x0045);
939 else
940 dib8000_write_word(state, 1280, 0x004d);
787 dib8000_write_word(state, 1281, 0x000c); 941 dib8000_write_word(state, 1281, 0x000c);
788 942
789 dib8000_write_word(state, 770, 0x0000); 943 dib8000_write_word(state, 770, 0x0000);
@@ -794,19 +948,25 @@ static int dib8000_reset(struct dvb_frontend *fe)
794 dib8000_write_word(state, 1281, 0x0000); 948 dib8000_write_word(state, 1281, 0x0000);
795 949
796 /* drives */ 950 /* drives */
797 if (state->cfg.drives) 951 if (state->revision != 0x8090) {
798 dib8000_write_word(state, 906, state->cfg.drives); 952 if (state->cfg.drives)
799 else { 953 dib8000_write_word(state, 906, state->cfg.drives);
800 dprintk("using standard PAD-drive-settings, please adjust settings in config-struct to be optimal."); 954 else {
801 dib8000_write_word(state, 906, 0x2d98); // min drive SDRAM - not optimal - adjust 955 dprintk("using standard PAD-drive-settings, please adjust settings in config-struct to be optimal.");
956 /* min drive SDRAM - not optimal - adjust */
957 dib8000_write_word(state, 906, 0x2d98);
958 }
802 } 959 }
803 960
804 dib8000_reset_pll(state); 961 dib8000_reset_pll(state);
962 if (state->revision != 0x8090)
963 dib8000_write_word(state, 898, 0x0004);
805 964
806 if (dib8000_reset_gpio(state) != 0) 965 if (dib8000_reset_gpio(state) != 0)
807 dprintk("GPIO reset was not successful."); 966 dprintk("GPIO reset was not successful.");
808 967
809 if (dib8000_set_output_mode(fe, OUTMODE_HIGH_Z) != 0) 968 if ((state->revision != 0x8090) &&
969 (dib8000_set_output_mode(fe, OUTMODE_HIGH_Z) != 0))
810 dprintk("OUTPUT_MODE could not be resetted."); 970 dprintk("OUTPUT_MODE could not be resetted.");
811 971
812 state->current_agc = NULL; 972 state->current_agc = NULL;
@@ -832,6 +992,8 @@ static int dib8000_reset(struct dvb_frontend *fe)
832 l = *n++; 992 l = *n++;
833 } 993 }
834 } 994 }
995 if (state->revision != 0x8090)
996 dib8000_write_word(state, 903, (0 << 4) | 2);
835 state->isdbt_cfg_loaded = 0; 997 state->isdbt_cfg_loaded = 0;
836 998
837 //div_cfg override for special configs 999 //div_cfg override for special configs
@@ -844,10 +1006,12 @@ static int dib8000_reset(struct dvb_frontend *fe)
844 dib8000_set_bandwidth(fe, 6000); 1006 dib8000_set_bandwidth(fe, 6000);
845 1007
846 dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON); 1008 dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON);
847 dib8000_sad_calib(state); 1009 if (state->revision != 0x8090) {
848 dib8000_set_adc_state(state, DIBX000_SLOW_ADC_OFF); 1010 dib8000_sad_calib(state);
1011 dib8000_set_adc_state(state, DIBX000_SLOW_ADC_OFF);
1012 }
849 1013
850 dib8000_set_power_mode(state, DIB8000M_POWER_INTERFACE_ONLY); 1014 dib8000_set_power_mode(state, DIB8000_POWER_INTERFACE_ONLY);
851 1015
852 return 0; 1016 return 0;
853} 1017}
@@ -879,6 +1043,8 @@ static int dib8000_set_agc_config(struct dib8000_state *state, u8 band)
879{ 1043{
880 struct dibx000_agc_config *agc = NULL; 1044 struct dibx000_agc_config *agc = NULL;
881 int i; 1045 int i;
1046 u16 reg;
1047
882 if (state->current_band == band && state->current_agc != NULL) 1048 if (state->current_band == band && state->current_agc != NULL)
883 return 0; 1049 return 0;
884 state->current_band = band; 1050 state->current_band = band;
@@ -914,6 +1080,12 @@ static int dib8000_set_agc_config(struct dib8000_state *state, u8 band)
914 dib8000_write_word(state, 106, state->wbd_ref); 1080 dib8000_write_word(state, 106, state->wbd_ref);
915 else // use default 1081 else // use default
916 dib8000_write_word(state, 106, agc->wbd_ref); 1082 dib8000_write_word(state, 106, agc->wbd_ref);
1083
1084 if (state->revision == 0x8090) {
1085 reg = dib8000_read_word(state, 922) & (0x3 << 2);
1086 dib8000_write_word(state, 922, reg | (agc->wbd_sel << 2));
1087 }
1088
917 dib8000_write_word(state, 107, (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8)); 1089 dib8000_write_word(state, 107, (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8));
918 dib8000_write_word(state, 108, agc->agc1_max); 1090 dib8000_write_word(state, 108, agc->agc1_max);
919 dib8000_write_word(state, 109, agc->agc1_min); 1091 dib8000_write_word(state, 109, agc->agc1_min);
@@ -925,7 +1097,10 @@ static int dib8000_set_agc_config(struct dib8000_state *state, u8 band)
925 dib8000_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2); 1097 dib8000_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
926 1098
927 dib8000_write_word(state, 75, agc->agc1_pt3); 1099 dib8000_write_word(state, 75, agc->agc1_pt3);
928 dib8000_write_word(state, 923, (dib8000_read_word(state, 923) & 0xffe3) | (agc->wbd_inv << 4) | (agc->wbd_sel << 2)); /*LB : 929 -> 923 */ 1100 if (state->revision != 0x8090)
1101 dib8000_write_word(state, 923,
1102 (dib8000_read_word(state, 923) & 0xffe3) |
1103 (agc->wbd_inv << 4) | (agc->wbd_sel << 2));
929 1104
930 return 0; 1105 return 0;
931} 1106}
@@ -968,14 +1143,30 @@ static int dib8000_agc_startup(struct dvb_frontend *fe)
968{ 1143{
969 struct dib8000_state *state = fe->demodulator_priv; 1144 struct dib8000_state *state = fe->demodulator_priv;
970 enum frontend_tune_state *tune_state = &state->tune_state; 1145 enum frontend_tune_state *tune_state = &state->tune_state;
971
972 int ret = 0; 1146 int ret = 0;
1147 u16 reg, upd_demod_gain_period = 0x8000;
973 1148
974 switch (*tune_state) { 1149 switch (*tune_state) {
975 case CT_AGC_START: 1150 case CT_AGC_START:
976 // set power-up level: interf+analog+AGC 1151 // set power-up level: interf+analog+AGC
977 1152
978 dib8000_set_adc_state(state, DIBX000_ADC_ON); 1153 if (state->revision != 0x8090)
1154 dib8000_set_adc_state(state, DIBX000_ADC_ON);
1155 else {
1156 dib8000_set_power_mode(state, DIB8000_POWER_ALL);
1157
1158 reg = dib8000_read_word(state, 1947)&0xff00;
1159 dib8000_write_word(state, 1946,
1160 upd_demod_gain_period & 0xFFFF);
1161 /* bit 14 = enDemodGain */
1162 dib8000_write_word(state, 1947, reg | (1<<14) |
1163 ((upd_demod_gain_period >> 16) & 0xFF));
1164
1165 /* enable adc i & q */
1166 reg = dib8000_read_word(state, 1920);
1167 dib8000_write_word(state, 1920, (reg | 0x3) &
1168 (~(1 << 7)));
1169 }
979 1170
980 if (dib8000_set_agc_config(state, (unsigned char)(BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000))) != 0) { 1171 if (dib8000_set_agc_config(state, (unsigned char)(BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000))) != 0) {
981 *tune_state = CT_AGC_STOP; 1172 *tune_state = CT_AGC_STOP;
@@ -1026,6 +1217,579 @@ static int dib8000_agc_startup(struct dvb_frontend *fe)
1026 1217
1027} 1218}
1028 1219
1220static void dib8096p_host_bus_drive(struct dib8000_state *state, u8 drive)
1221{
1222 u16 reg;
1223
1224 drive &= 0x7;
1225
1226 /* drive host bus 2, 3, 4 */
1227 reg = dib8000_read_word(state, 1798) &
1228 ~(0x7 | (0x7 << 6) | (0x7 << 12));
1229 reg |= (drive<<12) | (drive<<6) | drive;
1230 dib8000_write_word(state, 1798, reg);
1231
1232 /* drive host bus 5,6 */
1233 reg = dib8000_read_word(state, 1799) & ~((0x7 << 2) | (0x7 << 8));
1234 reg |= (drive<<8) | (drive<<2);
1235 dib8000_write_word(state, 1799, reg);
1236
1237 /* drive host bus 7, 8, 9 */
1238 reg = dib8000_read_word(state, 1800) &
1239 ~(0x7 | (0x7 << 6) | (0x7 << 12));
1240 reg |= (drive<<12) | (drive<<6) | drive;
1241 dib8000_write_word(state, 1800, reg);
1242
1243 /* drive host bus 10, 11 */
1244 reg = dib8000_read_word(state, 1801) & ~((0x7 << 2) | (0x7 << 8));
1245 reg |= (drive<<8) | (drive<<2);
1246 dib8000_write_word(state, 1801, reg);
1247
1248 /* drive host bus 12, 13, 14 */
1249 reg = dib8000_read_word(state, 1802) &
1250 ~(0x7 | (0x7 << 6) | (0x7 << 12));
1251 reg |= (drive<<12) | (drive<<6) | drive;
1252 dib8000_write_word(state, 1802, reg);
1253}
1254
1255static u32 dib8096p_calcSyncFreq(u32 P_Kin, u32 P_Kout,
1256 u32 insertExtSynchro, u32 syncSize)
1257{
1258 u32 quantif = 3;
1259 u32 nom = (insertExtSynchro * P_Kin+syncSize);
1260 u32 denom = P_Kout;
1261 u32 syncFreq = ((nom << quantif) / denom);
1262
1263 if ((syncFreq & ((1 << quantif) - 1)) != 0)
1264 syncFreq = (syncFreq >> quantif) + 1;
1265 else
1266 syncFreq = (syncFreq >> quantif);
1267
1268 if (syncFreq != 0)
1269 syncFreq = syncFreq - 1;
1270
1271 return syncFreq;
1272}
1273
1274static void dib8096p_cfg_DibTx(struct dib8000_state *state, u32 P_Kin,
1275 u32 P_Kout, u32 insertExtSynchro, u32 synchroMode,
1276 u32 syncWord, u32 syncSize)
1277{
1278 dprintk("Configure DibStream Tx");
1279
1280 dib8000_write_word(state, 1615, 1);
1281 dib8000_write_word(state, 1603, P_Kin);
1282 dib8000_write_word(state, 1605, P_Kout);
1283 dib8000_write_word(state, 1606, insertExtSynchro);
1284 dib8000_write_word(state, 1608, synchroMode);
1285 dib8000_write_word(state, 1609, (syncWord >> 16) & 0xffff);
1286 dib8000_write_word(state, 1610, syncWord & 0xffff);
1287 dib8000_write_word(state, 1612, syncSize);
1288 dib8000_write_word(state, 1615, 0);
1289}
1290
1291static void dib8096p_cfg_DibRx(struct dib8000_state *state, u32 P_Kin,
1292 u32 P_Kout, u32 synchroMode, u32 insertExtSynchro,
1293 u32 syncWord, u32 syncSize, u32 dataOutRate)
1294{
1295 u32 syncFreq;
1296
1297 dprintk("Configure DibStream Rx synchroMode = %d", synchroMode);
1298
1299 if ((P_Kin != 0) && (P_Kout != 0)) {
1300 syncFreq = dib8096p_calcSyncFreq(P_Kin, P_Kout,
1301 insertExtSynchro, syncSize);
1302 dib8000_write_word(state, 1542, syncFreq);
1303 }
1304
1305 dib8000_write_word(state, 1554, 1);
1306 dib8000_write_word(state, 1536, P_Kin);
1307 dib8000_write_word(state, 1537, P_Kout);
1308 dib8000_write_word(state, 1539, synchroMode);
1309 dib8000_write_word(state, 1540, (syncWord >> 16) & 0xffff);
1310 dib8000_write_word(state, 1541, syncWord & 0xffff);
1311 dib8000_write_word(state, 1543, syncSize);
1312 dib8000_write_word(state, 1544, dataOutRate);
1313 dib8000_write_word(state, 1554, 0);
1314}
1315
1316static void dib8096p_enMpegMux(struct dib8000_state *state, int onoff)
1317{
1318 u16 reg_1287;
1319
1320 reg_1287 = dib8000_read_word(state, 1287);
1321
1322 switch (onoff) {
1323 case 1:
1324 reg_1287 &= ~(1 << 8);
1325 break;
1326 case 0:
1327 reg_1287 |= (1 << 8);
1328 break;
1329 }
1330
1331 dib8000_write_word(state, 1287, reg_1287);
1332}
1333
1334static void dib8096p_configMpegMux(struct dib8000_state *state,
1335 u16 pulseWidth, u16 enSerialMode, u16 enSerialClkDiv2)
1336{
1337 u16 reg_1287;
1338
1339 dprintk("Enable Mpeg mux");
1340
1341 dib8096p_enMpegMux(state, 0);
1342
1343 /* If the input mode is MPEG do not divide the serial clock */
1344 if ((enSerialMode == 1) && (state->input_mode_mpeg == 1))
1345 enSerialClkDiv2 = 0;
1346
1347 reg_1287 = ((pulseWidth & 0x1f) << 3) |
1348 ((enSerialMode & 0x1) << 2) | (enSerialClkDiv2 & 0x1);
1349 dib8000_write_word(state, 1287, reg_1287);
1350
1351 dib8096p_enMpegMux(state, 1);
1352}
1353
1354static void dib8096p_setDibTxMux(struct dib8000_state *state, int mode)
1355{
1356 u16 reg_1288 = dib8000_read_word(state, 1288) & ~(0x7 << 7);
1357
1358 switch (mode) {
1359 case MPEG_ON_DIBTX:
1360 dprintk("SET MPEG ON DIBSTREAM TX");
1361 dib8096p_cfg_DibTx(state, 8, 5, 0, 0, 0, 0);
1362 reg_1288 |= (1 << 9); break;
1363 case DIV_ON_DIBTX:
1364 dprintk("SET DIV_OUT ON DIBSTREAM TX");
1365 dib8096p_cfg_DibTx(state, 5, 5, 0, 0, 0, 0);
1366 reg_1288 |= (1 << 8); break;
1367 case ADC_ON_DIBTX:
1368 dprintk("SET ADC_OUT ON DIBSTREAM TX");
1369 dib8096p_cfg_DibTx(state, 20, 5, 10, 0, 0, 0);
1370 reg_1288 |= (1 << 7); break;
1371 default:
1372 break;
1373 }
1374 dib8000_write_word(state, 1288, reg_1288);
1375}
1376
1377static void dib8096p_setHostBusMux(struct dib8000_state *state, int mode)
1378{
1379 u16 reg_1288 = dib8000_read_word(state, 1288) & ~(0x7 << 4);
1380
1381 switch (mode) {
1382 case DEMOUT_ON_HOSTBUS:
1383 dprintk("SET DEM OUT OLD INTERF ON HOST BUS");
1384 dib8096p_enMpegMux(state, 0);
1385 reg_1288 |= (1 << 6);
1386 break;
1387 case DIBTX_ON_HOSTBUS:
1388 dprintk("SET DIBSTREAM TX ON HOST BUS");
1389 dib8096p_enMpegMux(state, 0);
1390 reg_1288 |= (1 << 5);
1391 break;
1392 case MPEG_ON_HOSTBUS:
1393 dprintk("SET MPEG MUX ON HOST BUS");
1394 reg_1288 |= (1 << 4);
1395 break;
1396 default:
1397 break;
1398 }
1399 dib8000_write_word(state, 1288, reg_1288);
1400}
1401
1402static int dib8096p_set_diversity_in(struct dvb_frontend *fe, int onoff)
1403{
1404 struct dib8000_state *state = fe->demodulator_priv;
1405 u16 reg_1287;
1406
1407 switch (onoff) {
1408 case 0: /* only use the internal way - not the diversity input */
1409 dprintk("%s mode OFF : by default Enable Mpeg INPUT",
1410 __func__);
1411 /* outputRate = 8 */
1412 dib8096p_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0);
1413
1414 /* Do not divide the serial clock of MPEG MUX in
1415 SERIAL MODE in case input mode MPEG is used */
1416 reg_1287 = dib8000_read_word(state, 1287);
1417 /* enSerialClkDiv2 == 1 ? */
1418 if ((reg_1287 & 0x1) == 1) {
1419 /* force enSerialClkDiv2 = 0 */
1420 reg_1287 &= ~0x1;
1421 dib8000_write_word(state, 1287, reg_1287);
1422 }
1423 state->input_mode_mpeg = 1;
1424 break;
1425 case 1: /* both ways */
1426 case 2: /* only the diversity input */
1427 dprintk("%s ON : Enable diversity INPUT", __func__);
1428 dib8096p_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0);
1429 state->input_mode_mpeg = 0;
1430 break;
1431 }
1432
1433 dib8000_set_diversity_in(state->fe[0], onoff);
1434 return 0;
1435}
1436
1437static int dib8096p_set_output_mode(struct dvb_frontend *fe, int mode)
1438{
1439 struct dib8000_state *state = fe->demodulator_priv;
1440 u16 outreg, smo_mode, fifo_threshold;
1441 u8 prefer_mpeg_mux_use = 1;
1442 int ret = 0;
1443
1444 dib8096p_host_bus_drive(state, 1);
1445
1446 fifo_threshold = 1792;
1447 smo_mode = (dib8000_read_word(state, 299) & 0x0050) | (1 << 1);
1448 outreg = dib8000_read_word(state, 1286) &
1449 ~((1 << 10) | (0x7 << 6) | (1 << 1));
1450
1451 switch (mode) {
1452 case OUTMODE_HIGH_Z:
1453 outreg = 0;
1454 break;
1455
1456 case OUTMODE_MPEG2_SERIAL:
1457 if (prefer_mpeg_mux_use) {
1458 dprintk("dib8096P setting output mode TS_SERIAL using Mpeg Mux");
1459 dib8096p_configMpegMux(state, 3, 1, 1);
1460 dib8096p_setHostBusMux(state, MPEG_ON_HOSTBUS);
1461 } else {/* Use Smooth block */
1462 dprintk("dib8096P setting output mode TS_SERIAL using Smooth bloc");
1463 dib8096p_setHostBusMux(state,
1464 DEMOUT_ON_HOSTBUS);
1465 outreg |= (2 << 6) | (0 << 1);
1466 }
1467 break;
1468
1469 case OUTMODE_MPEG2_PAR_GATED_CLK:
1470 if (prefer_mpeg_mux_use) {
1471 dprintk("dib8096P setting output mode TS_PARALLEL_GATED using Mpeg Mux");
1472 dib8096p_configMpegMux(state, 2, 0, 0);
1473 dib8096p_setHostBusMux(state, MPEG_ON_HOSTBUS);
1474 } else { /* Use Smooth block */
1475 dprintk("dib8096P setting output mode TS_PARALLEL_GATED using Smooth block");
1476 dib8096p_setHostBusMux(state,
1477 DEMOUT_ON_HOSTBUS);
1478 outreg |= (0 << 6);
1479 }
1480 break;
1481
1482 case OUTMODE_MPEG2_PAR_CONT_CLK: /* Using Smooth block only */
1483 dprintk("dib8096P setting output mode TS_PARALLEL_CONT using Smooth block");
1484 dib8096p_setHostBusMux(state, DEMOUT_ON_HOSTBUS);
1485 outreg |= (1 << 6);
1486 break;
1487
1488 case OUTMODE_MPEG2_FIFO:
1489 /* Using Smooth block because not supported
1490 by new Mpeg Mux bloc */
1491 dprintk("dib8096P setting output mode TS_FIFO using Smooth block");
1492 dib8096p_setHostBusMux(state, DEMOUT_ON_HOSTBUS);
1493 outreg |= (5 << 6);
1494 smo_mode |= (3 << 1);
1495 fifo_threshold = 512;
1496 break;
1497
1498 case OUTMODE_DIVERSITY:
1499 dprintk("dib8096P setting output mode MODE_DIVERSITY");
1500 dib8096p_setDibTxMux(state, DIV_ON_DIBTX);
1501 dib8096p_setHostBusMux(state, DIBTX_ON_HOSTBUS);
1502 break;
1503
1504 case OUTMODE_ANALOG_ADC:
1505 dprintk("dib8096P setting output mode MODE_ANALOG_ADC");
1506 dib8096p_setDibTxMux(state, ADC_ON_DIBTX);
1507 dib8096p_setHostBusMux(state, DIBTX_ON_HOSTBUS);
1508 break;
1509 }
1510
1511 if (mode != OUTMODE_HIGH_Z)
1512 outreg |= (1<<10);
1513
1514 dprintk("output_mpeg2_in_188_bytes = %d",
1515 state->cfg.output_mpeg2_in_188_bytes);
1516 if (state->cfg.output_mpeg2_in_188_bytes)
1517 smo_mode |= (1 << 5);
1518
1519 ret |= dib8000_write_word(state, 299, smo_mode);
1520 /* synchronous fread */
1521 ret |= dib8000_write_word(state, 299 + 1, fifo_threshold);
1522 ret |= dib8000_write_word(state, 1286, outreg);
1523
1524 return ret;
1525}
1526
1527static int map_addr_to_serpar_number(struct i2c_msg *msg)
1528{
1529 if (msg->buf[0] <= 15)
1530 msg->buf[0] -= 1;
1531 else if (msg->buf[0] == 17)
1532 msg->buf[0] = 15;
1533 else if (msg->buf[0] == 16)
1534 msg->buf[0] = 17;
1535 else if (msg->buf[0] == 19)
1536 msg->buf[0] = 16;
1537 else if (msg->buf[0] >= 21 && msg->buf[0] <= 25)
1538 msg->buf[0] -= 3;
1539 else if (msg->buf[0] == 28)
1540 msg->buf[0] = 23;
1541 else if (msg->buf[0] == 99)
1542 msg->buf[0] = 99;
1543 else
1544 return -EINVAL;
1545 return 0;
1546}
1547
1548static int dib8096p_tuner_write_serpar(struct i2c_adapter *i2c_adap,
1549 struct i2c_msg msg[], int num)
1550{
1551 struct dib8000_state *state = i2c_get_adapdata(i2c_adap);
1552 u8 n_overflow = 1;
1553 u16 i = 1000;
1554 u16 serpar_num = msg[0].buf[0];
1555
1556 while (n_overflow == 1 && i) {
1557 n_overflow = (dib8000_read_word(state, 1984) >> 1) & 0x1;
1558 i--;
1559 if (i == 0)
1560 dprintk("Tuner ITF: write busy (overflow)");
1561 }
1562 dib8000_write_word(state, 1985, (1 << 6) | (serpar_num & 0x3f));
1563 dib8000_write_word(state, 1986, (msg[0].buf[1] << 8) | msg[0].buf[2]);
1564
1565 return num;
1566}
1567
1568static int dib8096p_tuner_read_serpar(struct i2c_adapter *i2c_adap,
1569 struct i2c_msg msg[], int num)
1570{
1571 struct dib8000_state *state = i2c_get_adapdata(i2c_adap);
1572 u8 n_overflow = 1, n_empty = 1;
1573 u16 i = 1000;
1574 u16 serpar_num = msg[0].buf[0];
1575 u16 read_word;
1576
1577 while (n_overflow == 1 && i) {
1578 n_overflow = (dib8000_read_word(state, 1984) >> 1) & 0x1;
1579 i--;
1580 if (i == 0)
1581 dprintk("TunerITF: read busy (overflow)");
1582 }
1583 dib8000_write_word(state, 1985, (0<<6) | (serpar_num&0x3f));
1584
1585 i = 1000;
1586 while (n_empty == 1 && i) {
1587 n_empty = dib8000_read_word(state, 1984)&0x1;
1588 i--;
1589 if (i == 0)
1590 dprintk("TunerITF: read busy (empty)");
1591 }
1592
1593 read_word = dib8000_read_word(state, 1987);
1594 msg[1].buf[0] = (read_word >> 8) & 0xff;
1595 msg[1].buf[1] = (read_word) & 0xff;
1596
1597 return num;
1598}
1599
1600static int dib8096p_tuner_rw_serpar(struct i2c_adapter *i2c_adap,
1601 struct i2c_msg msg[], int num)
1602{
1603 if (map_addr_to_serpar_number(&msg[0]) == 0) {
1604 if (num == 1) /* write */
1605 return dib8096p_tuner_write_serpar(i2c_adap, msg, 1);
1606 else /* read */
1607 return dib8096p_tuner_read_serpar(i2c_adap, msg, 2);
1608 }
1609 return num;
1610}
1611
1612static int dib8096p_rw_on_apb(struct i2c_adapter *i2c_adap,
1613 struct i2c_msg msg[], int num, u16 apb_address)
1614{
1615 struct dib8000_state *state = i2c_get_adapdata(i2c_adap);
1616 u16 word;
1617
1618 if (num == 1) { /* write */
1619 dib8000_write_word(state, apb_address,
1620 ((msg[0].buf[1] << 8) | (msg[0].buf[2])));
1621 } else {
1622 word = dib8000_read_word(state, apb_address);
1623 msg[1].buf[0] = (word >> 8) & 0xff;
1624 msg[1].buf[1] = (word) & 0xff;
1625 }
1626 return num;
1627}
1628
1629static int dib8096p_tuner_xfer(struct i2c_adapter *i2c_adap,
1630 struct i2c_msg msg[], int num)
1631{
1632 struct dib8000_state *state = i2c_get_adapdata(i2c_adap);
1633 u16 apb_address = 0, word;
1634 int i = 0;
1635
1636 switch (msg[0].buf[0]) {
1637 case 0x12:
1638 apb_address = 1920;
1639 break;
1640 case 0x14:
1641 apb_address = 1921;
1642 break;
1643 case 0x24:
1644 apb_address = 1922;
1645 break;
1646 case 0x1a:
1647 apb_address = 1923;
1648 break;
1649 case 0x22:
1650 apb_address = 1924;
1651 break;
1652 case 0x33:
1653 apb_address = 1926;
1654 break;
1655 case 0x34:
1656 apb_address = 1927;
1657 break;
1658 case 0x35:
1659 apb_address = 1928;
1660 break;
1661 case 0x36:
1662 apb_address = 1929;
1663 break;
1664 case 0x37:
1665 apb_address = 1930;
1666 break;
1667 case 0x38:
1668 apb_address = 1931;
1669 break;
1670 case 0x39:
1671 apb_address = 1932;
1672 break;
1673 case 0x2a:
1674 apb_address = 1935;
1675 break;
1676 case 0x2b:
1677 apb_address = 1936;
1678 break;
1679 case 0x2c:
1680 apb_address = 1937;
1681 break;
1682 case 0x2d:
1683 apb_address = 1938;
1684 break;
1685 case 0x2e:
1686 apb_address = 1939;
1687 break;
1688 case 0x2f:
1689 apb_address = 1940;
1690 break;
1691 case 0x30:
1692 apb_address = 1941;
1693 break;
1694 case 0x31:
1695 apb_address = 1942;
1696 break;
1697 case 0x32:
1698 apb_address = 1943;
1699 break;
1700 case 0x3e:
1701 apb_address = 1944;
1702 break;
1703 case 0x3f:
1704 apb_address = 1945;
1705 break;
1706 case 0x40:
1707 apb_address = 1948;
1708 break;
1709 case 0x25:
1710 apb_address = 936;
1711 break;
1712 case 0x26:
1713 apb_address = 937;
1714 break;
1715 case 0x27:
1716 apb_address = 938;
1717 break;
1718 case 0x28:
1719 apb_address = 939;
1720 break;
1721 case 0x1d:
1722 /* get sad sel request */
1723 i = ((dib8000_read_word(state, 921) >> 12)&0x3);
1724 word = dib8000_read_word(state, 924+i);
1725 msg[1].buf[0] = (word >> 8) & 0xff;
1726 msg[1].buf[1] = (word) & 0xff;
1727 return num;
1728 case 0x1f:
1729 if (num == 1) { /* write */
1730 word = (u16) ((msg[0].buf[1] << 8) |
1731 msg[0].buf[2]);
1732 /* in the VGAMODE Sel are located on bit 0/1 */
1733 word &= 0x3;
1734 word = (dib8000_read_word(state, 921) &
1735 ~(3<<12)) | (word<<12);
1736 /* Set the proper input */
1737 dib8000_write_word(state, 921, word);
1738 return num;
1739 }
1740 }
1741
1742 if (apb_address != 0) /* R/W acces via APB */
1743 return dib8096p_rw_on_apb(i2c_adap, msg, num, apb_address);
1744 else /* R/W access via SERPAR */
1745 return dib8096p_tuner_rw_serpar(i2c_adap, msg, num);
1746
1747 return 0;
1748}
1749
1750static u32 dib8096p_i2c_func(struct i2c_adapter *adapter)
1751{
1752 return I2C_FUNC_I2C;
1753}
1754
1755static struct i2c_algorithm dib8096p_tuner_xfer_algo = {
1756 .master_xfer = dib8096p_tuner_xfer,
1757 .functionality = dib8096p_i2c_func,
1758};
1759
1760struct i2c_adapter *dib8096p_get_i2c_tuner(struct dvb_frontend *fe)
1761{
1762 struct dib8000_state *st = fe->demodulator_priv;
1763 return &st->dib8096p_tuner_adap;
1764}
1765EXPORT_SYMBOL(dib8096p_get_i2c_tuner);
1766
1767int dib8096p_tuner_sleep(struct dvb_frontend *fe, int onoff)
1768{
1769 struct dib8000_state *state = fe->demodulator_priv;
1770 u16 en_cur_state;
1771
1772 dprintk("sleep dib8096p: %d", onoff);
1773
1774 en_cur_state = dib8000_read_word(state, 1922);
1775
1776 /* LNAs and MIX are ON and therefore it is a valid configuration */
1777 if (en_cur_state > 0xff)
1778 state->tuner_enable = en_cur_state ;
1779
1780 if (onoff)
1781 en_cur_state &= 0x00ff;
1782 else {
1783 if (state->tuner_enable != 0)
1784 en_cur_state = state->tuner_enable;
1785 }
1786
1787 dib8000_write_word(state, 1922, en_cur_state);
1788
1789 return 0;
1790}
1791EXPORT_SYMBOL(dib8096p_tuner_sleep);
1792
1029static const s32 lut_1000ln_mant[] = 1793static const s32 lut_1000ln_mant[] =
1030{ 1794{
1031 908, 7003, 7090, 7170, 7244, 7313, 7377, 7438, 7495, 7549, 7600 1795 908, 7003, 7090, 7170, 7244, 7313, 7377, 7438, 7495, 7549, 7600
@@ -1051,6 +1815,26 @@ s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode)
1051} 1815}
1052EXPORT_SYMBOL(dib8000_get_adc_power); 1816EXPORT_SYMBOL(dib8000_get_adc_power);
1053 1817
1818int dib8090p_get_dc_power(struct dvb_frontend *fe, u8 IQ)
1819{
1820 struct dib8000_state *state = fe->demodulator_priv;
1821 int val = 0;
1822
1823 switch (IQ) {
1824 case 1:
1825 val = dib8000_read_word(state, 403);
1826 break;
1827 case 0:
1828 val = dib8000_read_word(state, 404);
1829 break;
1830 }
1831 if (val & 0x200)
1832 val -= 1024;
1833
1834 return val;
1835}
1836EXPORT_SYMBOL(dib8090p_get_dc_power);
1837
1054static void dib8000_update_timf(struct dib8000_state *state) 1838static void dib8000_update_timf(struct dib8000_state *state)
1055{ 1839{
1056 u32 timf = state->timf = dib8000_read32(state, 435); 1840 u32 timf = state->timf = dib8000_read32(state, 435);
@@ -1060,6 +1844,26 @@ static void dib8000_update_timf(struct dib8000_state *state)
1060 dprintk("Updated timing frequency: %d (default: %d)", state->timf, state->timf_default); 1844 dprintk("Updated timing frequency: %d (default: %d)", state->timf, state->timf_default);
1061} 1845}
1062 1846
1847u32 dib8000_ctrl_timf(struct dvb_frontend *fe, uint8_t op, uint32_t timf)
1848{
1849 struct dib8000_state *state = fe->demodulator_priv;
1850
1851 switch (op) {
1852 case DEMOD_TIMF_SET:
1853 state->timf = timf;
1854 break;
1855 case DEMOD_TIMF_UPDATE:
1856 dib8000_update_timf(state);
1857 break;
1858 case DEMOD_TIMF_GET:
1859 break;
1860 }
1861 dib8000_set_bandwidth(state->fe[0], 6000);
1862
1863 return state->timf;
1864}
1865EXPORT_SYMBOL(dib8000_ctrl_timf);
1866
1063static const u16 adc_target_16dB[11] = { 1867static const u16 adc_target_16dB[11] = {
1064 (1 << 13) - 825 - 117, 1868 (1 << 13) - 825 - 117,
1065 (1 << 13) - 837 - 117, 1869 (1 << 13) - 837 - 117,
@@ -1086,6 +1890,9 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
1086 u16 init_prbs = 0xfff; 1890 u16 init_prbs = 0xfff;
1087 u16 ana_gain = 0; 1891 u16 ana_gain = 0;
1088 1892
1893 if (state->revision == 0x8090)
1894 dib8000_init_sdram(state);
1895
1089 if (state->ber_monitored_layer != LAYER_ALL) 1896 if (state->ber_monitored_layer != LAYER_ALL)
1090 dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & 0x60) | state->ber_monitored_layer); 1897 dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & 0x60) | state->ber_monitored_layer);
1091 else 1898 else
@@ -1418,7 +2225,10 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
1418 dprintk("nbseg_diff = %X (%d)", seg_diff_mask, seg_diff_mask); 2225 dprintk("nbseg_diff = %X (%d)", seg_diff_mask, seg_diff_mask);
1419 2226
1420 state->differential_constellation = (seg_diff_mask != 0); 2227 state->differential_constellation = (seg_diff_mask != 0);
1421 dib8000_set_diversity_in(state->fe[0], state->diversity_onoff); 2228 if (state->revision != 0x8090)
2229 dib8000_set_diversity_in(state->fe[0], state->diversity_onoff);
2230 else
2231 dib8096p_set_diversity_in(state->fe[0], state->diversity_onoff);
1422 2232
1423 if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) { 2233 if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
1424 if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 1) 2234 if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 1)
@@ -1870,7 +2680,7 @@ static int dib8000_tune(struct dvb_frontend *fe)
1870{ 2680{
1871 struct dib8000_state *state = fe->demodulator_priv; 2681 struct dib8000_state *state = fe->demodulator_priv;
1872 int ret = 0; 2682 int ret = 0;
1873 u16 value, mode = fft_to_mode(state); 2683 u16 lock, value, mode = fft_to_mode(state);
1874 2684
1875 // we are already tuned - just resuming from suspend 2685 // we are already tuned - just resuming from suspend
1876 if (state == NULL) 2686 if (state == NULL)
@@ -1924,7 +2734,11 @@ static int dib8000_tune(struct dvb_frontend *fe)
1924 } 2734 }
1925 2735
1926 // we achieved a coff_cpil_lock - it's time to update the timf 2736 // we achieved a coff_cpil_lock - it's time to update the timf
1927 if ((dib8000_read_word(state, 568) >> 11) & 0x1) 2737 if (state->revision != 0x8090)
2738 lock = dib8000_read_word(state, 568);
2739 else
2740 lock = dib8000_read_word(state, 570);
2741 if ((lock >> 11) & 0x1)
1928 dib8000_update_timf(state); 2742 dib8000_update_timf(state);
1929 2743
1930 //now that tune is finished, lock0 should lock on fec_mpeg to output this lock on MP_LOCK. It's changed in autosearch start 2744 //now that tune is finished, lock0 should lock on fec_mpeg to output this lock on MP_LOCK. It's changed in autosearch start
@@ -1946,11 +2760,14 @@ static int dib8000_wakeup(struct dvb_frontend *fe)
1946 u8 index_frontend; 2760 u8 index_frontend;
1947 int ret; 2761 int ret;
1948 2762
1949 dib8000_set_power_mode(state, DIB8000M_POWER_ALL); 2763 dib8000_set_power_mode(state, DIB8000_POWER_ALL);
1950 dib8000_set_adc_state(state, DIBX000_ADC_ON); 2764 dib8000_set_adc_state(state, DIBX000_ADC_ON);
1951 if (dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON) != 0) 2765 if (dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON) != 0)
1952 dprintk("could not start Slow ADC"); 2766 dprintk("could not start Slow ADC");
1953 2767
2768 if (state->revision != 0x8090)
2769 dib8000_sad_calib(state);
2770
1954 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) { 2771 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
1955 ret = state->fe[index_frontend]->ops.init(state->fe[index_frontend]); 2772 ret = state->fe[index_frontend]->ops.init(state->fe[index_frontend]);
1956 if (ret < 0) 2773 if (ret < 0)
@@ -1972,8 +2789,9 @@ static int dib8000_sleep(struct dvb_frontend *fe)
1972 return ret; 2789 return ret;
1973 } 2790 }
1974 2791
1975 dib8000_set_output_mode(fe, OUTMODE_HIGH_Z); 2792 if (state->revision != 0x8090)
1976 dib8000_set_power_mode(state, DIB8000M_POWER_INTERFACE_ONLY); 2793 dib8000_set_output_mode(fe, OUTMODE_HIGH_Z);
2794 dib8000_set_power_mode(state, DIB8000_POWER_INTERFACE_ONLY);
1977 return dib8000_set_adc_state(state, DIBX000_SLOW_ADC_OFF) | dib8000_set_adc_state(state, DIBX000_ADC_OFF); 2795 return dib8000_set_adc_state(state, DIBX000_SLOW_ADC_OFF) | dib8000_set_adc_state(state, DIBX000_ADC_OFF);
1978} 2796}
1979 2797
@@ -1992,7 +2810,7 @@ int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tun
1992} 2810}
1993EXPORT_SYMBOL(dib8000_set_tune_state); 2811EXPORT_SYMBOL(dib8000_set_tune_state);
1994 2812
1995static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 2813static int dib8000_get_frontend(struct dvb_frontend *fe)
1996{ 2814{
1997 struct dib8000_state *state = fe->demodulator_priv; 2815 struct dib8000_state *state = fe->demodulator_priv;
1998 u16 i, val = 0; 2816 u16 i, val = 0;
@@ -2006,7 +2824,7 @@ static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2006 if (stat&FE_HAS_SYNC) { 2824 if (stat&FE_HAS_SYNC) {
2007 dprintk("TMCC lock on the slave%i", index_frontend); 2825 dprintk("TMCC lock on the slave%i", index_frontend);
2008 /* synchronize the cache with the other frontends */ 2826 /* synchronize the cache with the other frontends */
2009 state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend], fep); 2827 state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend]);
2010 for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL); sub_index_frontend++) { 2828 for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL); sub_index_frontend++) {
2011 if (sub_index_frontend != index_frontend) { 2829 if (sub_index_frontend != index_frontend) {
2012 state->fe[sub_index_frontend]->dtv_property_cache.isdbt_sb_mode = state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode; 2830 state->fe[sub_index_frontend]->dtv_property_cache.isdbt_sb_mode = state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode;
@@ -2028,7 +2846,10 @@ static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2028 2846
2029 fe->dtv_property_cache.isdbt_sb_mode = dib8000_read_word(state, 508) & 0x1; 2847 fe->dtv_property_cache.isdbt_sb_mode = dib8000_read_word(state, 508) & 0x1;
2030 2848
2031 val = dib8000_read_word(state, 570); 2849 if (state->revision == 0x8090)
2850 val = dib8000_read_word(state, 572);
2851 else
2852 val = dib8000_read_word(state, 570);
2032 fe->dtv_property_cache.inversion = (val & 0x40) >> 6; 2853 fe->dtv_property_cache.inversion = (val & 0x40) >> 6;
2033 switch ((val & 0x30) >> 4) { 2854 switch ((val & 0x30) >> 4) {
2034 case 1: 2855 case 1:
@@ -2135,7 +2956,7 @@ static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2135 return 0; 2956 return 0;
2136} 2957}
2137 2958
2138static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 2959static int dib8000_set_frontend(struct dvb_frontend *fe)
2139{ 2960{
2140 struct dib8000_state *state = fe->demodulator_priv; 2961 struct dib8000_state *state = fe->demodulator_priv;
2141 u8 nbr_pending, exit_condition, index_frontend; 2962 u8 nbr_pending, exit_condition, index_frontend;
@@ -2158,9 +2979,14 @@ static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2158 state->fe[index_frontend]->dtv_property_cache.delivery_system = SYS_ISDBT; 2979 state->fe[index_frontend]->dtv_property_cache.delivery_system = SYS_ISDBT;
2159 memcpy(&state->fe[index_frontend]->dtv_property_cache, &fe->dtv_property_cache, sizeof(struct dtv_frontend_properties)); 2980 memcpy(&state->fe[index_frontend]->dtv_property_cache, &fe->dtv_property_cache, sizeof(struct dtv_frontend_properties));
2160 2981
2161 dib8000_set_output_mode(state->fe[index_frontend], OUTMODE_HIGH_Z); 2982 if (state->revision != 0x8090)
2983 dib8000_set_output_mode(state->fe[index_frontend],
2984 OUTMODE_HIGH_Z);
2985 else
2986 dib8096p_set_output_mode(state->fe[index_frontend],
2987 OUTMODE_HIGH_Z);
2162 if (state->fe[index_frontend]->ops.tuner_ops.set_params) 2988 if (state->fe[index_frontend]->ops.tuner_ops.set_params)
2163 state->fe[index_frontend]->ops.tuner_ops.set_params(state->fe[index_frontend], fep); 2989 state->fe[index_frontend]->ops.tuner_ops.set_params(state->fe[index_frontend]);
2164 2990
2165 dib8000_set_tune_state(state->fe[index_frontend], CT_AGC_START); 2991 dib8000_set_tune_state(state->fe[index_frontend], CT_AGC_START);
2166 } 2992 }
@@ -2215,7 +3041,7 @@ static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2215 ((state->fe[0]->dtv_property_cache.layer[1].segment_count == 0) || 3041 ((state->fe[0]->dtv_property_cache.layer[1].segment_count == 0) ||
2216 ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (2 << 0)) == 0)) && 3042 ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (2 << 0)) == 0)) &&
2217 ((state->fe[0]->dtv_property_cache.layer[2].segment_count == 0) || ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (3 << 0)) == 0)))) { 3043 ((state->fe[0]->dtv_property_cache.layer[2].segment_count == 0) || ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (3 << 0)) == 0)))) {
2218 int i = 80000; 3044 int i = 100;
2219 u8 found = 0; 3045 u8 found = 0;
2220 u8 tune_failed = 0; 3046 u8 tune_failed = 0;
2221 3047
@@ -2243,6 +3069,7 @@ static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2243 default: 3069 default:
2244 dprintk("unhandled autosearch result"); 3070 dprintk("unhandled autosearch result");
2245 case 1: 3071 case 1:
3072 tune_failed |= (1 << index_frontend);
2246 dprintk("autosearch failed for the frontend%i", index_frontend); 3073 dprintk("autosearch failed for the frontend%i", index_frontend);
2247 break; 3074 break;
2248 } 3075 }
@@ -2261,21 +3088,44 @@ static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2261 3088
2262 dprintk("tune success on frontend%i", index_frontend_success); 3089 dprintk("tune success on frontend%i", index_frontend_success);
2263 3090
2264 dib8000_get_frontend(fe, fep); 3091 dib8000_get_frontend(fe);
2265 } 3092 }
2266 3093
2267 for (index_frontend = 0, ret = 0; (ret >= 0) && (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) 3094 for (index_frontend = 0, ret = 0; (ret >= 0) && (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
2268 ret = dib8000_tune(state->fe[index_frontend]); 3095 ret = dib8000_tune(state->fe[index_frontend]);
2269 3096
2270 /* set output mode and diversity input */ 3097 /* set output mode and diversity input */
2271 dib8000_set_output_mode(state->fe[0], state->cfg.output_mode); 3098 if (state->revision != 0x8090) {
2272 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) { 3099 dib8000_set_output_mode(state->fe[0], state->cfg.output_mode);
2273 dib8000_set_output_mode(state->fe[index_frontend], OUTMODE_DIVERSITY); 3100 for (index_frontend = 1;
2274 dib8000_set_diversity_in(state->fe[index_frontend-1], 1); 3101 (index_frontend < MAX_NUMBER_OF_FRONTENDS) &&
2275 } 3102 (state->fe[index_frontend] != NULL);
3103 index_frontend++) {
3104 dib8000_set_output_mode(state->fe[index_frontend],
3105 OUTMODE_DIVERSITY);
3106 dib8000_set_diversity_in(state->fe[index_frontend-1], 1);
3107 }
2276 3108
2277 /* turn off the diversity of the last chip */ 3109 /* turn off the diversity of the last chip */
2278 dib8000_set_diversity_in(state->fe[index_frontend-1], 0); 3110 dib8000_set_diversity_in(state->fe[index_frontend-1], 0);
3111 } else {
3112 dib8096p_set_output_mode(state->fe[0], state->cfg.output_mode);
3113 if (state->cfg.enMpegOutput == 0) {
3114 dib8096p_setDibTxMux(state, MPEG_ON_DIBTX);
3115 dib8096p_setHostBusMux(state, DIBTX_ON_HOSTBUS);
3116 }
3117 for (index_frontend = 1;
3118 (index_frontend < MAX_NUMBER_OF_FRONTENDS) &&
3119 (state->fe[index_frontend] != NULL);
3120 index_frontend++) {
3121 dib8096p_set_output_mode(state->fe[index_frontend],
3122 OUTMODE_DIVERSITY);
3123 dib8096p_set_diversity_in(state->fe[index_frontend-1], 1);
3124 }
3125
3126 /* turn off the diversity of the last chip */
3127 dib8096p_set_diversity_in(state->fe[index_frontend-1], 0);
3128 }
2279 3129
2280 return ret; 3130 return ret;
2281} 3131}
@@ -2284,15 +3134,22 @@ static u16 dib8000_read_lock(struct dvb_frontend *fe)
2284{ 3134{
2285 struct dib8000_state *state = fe->demodulator_priv; 3135 struct dib8000_state *state = fe->demodulator_priv;
2286 3136
3137 if (state->revision == 0x8090)
3138 return dib8000_read_word(state, 570);
2287 return dib8000_read_word(state, 568); 3139 return dib8000_read_word(state, 568);
2288} 3140}
2289 3141
2290static int dib8000_read_status(struct dvb_frontend *fe, fe_status_t * stat) 3142static int dib8000_read_status(struct dvb_frontend *fe, fe_status_t * stat)
2291{ 3143{
2292 struct dib8000_state *state = fe->demodulator_priv; 3144 struct dib8000_state *state = fe->demodulator_priv;
2293 u16 lock_slave = 0, lock = dib8000_read_word(state, 568); 3145 u16 lock_slave = 0, lock;
2294 u8 index_frontend; 3146 u8 index_frontend;
2295 3147
3148 if (state->revision == 0x8090)
3149 lock = dib8000_read_word(state, 570);
3150 else
3151 lock = dib8000_read_word(state, 568);
3152
2296 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) 3153 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
2297 lock_slave |= dib8000_read_lock(state->fe[index_frontend]); 3154 lock_slave |= dib8000_read_lock(state->fe[index_frontend]);
2298 3155
@@ -2330,14 +3187,26 @@ static int dib8000_read_status(struct dvb_frontend *fe, fe_status_t * stat)
2330static int dib8000_read_ber(struct dvb_frontend *fe, u32 * ber) 3187static int dib8000_read_ber(struct dvb_frontend *fe, u32 * ber)
2331{ 3188{
2332 struct dib8000_state *state = fe->demodulator_priv; 3189 struct dib8000_state *state = fe->demodulator_priv;
2333 *ber = (dib8000_read_word(state, 560) << 16) | dib8000_read_word(state, 561); // 13 segments 3190
3191 /* 13 segments */
3192 if (state->revision == 0x8090)
3193 *ber = (dib8000_read_word(state, 562) << 16) |
3194 dib8000_read_word(state, 563);
3195 else
3196 *ber = (dib8000_read_word(state, 560) << 16) |
3197 dib8000_read_word(state, 561);
2334 return 0; 3198 return 0;
2335} 3199}
2336 3200
2337static int dib8000_read_unc_blocks(struct dvb_frontend *fe, u32 * unc) 3201static int dib8000_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)
2338{ 3202{
2339 struct dib8000_state *state = fe->demodulator_priv; 3203 struct dib8000_state *state = fe->demodulator_priv;
2340 *unc = dib8000_read_word(state, 565); // packet error on 13 seg 3204
3205 /* packet error on 13 seg */
3206 if (state->revision == 0x8090)
3207 *unc = dib8000_read_word(state, 567);
3208 else
3209 *unc = dib8000_read_word(state, 565);
2341 return 0; 3210 return 0;
2342} 3211}
2343 3212
@@ -2370,14 +3239,20 @@ static u32 dib8000_get_snr(struct dvb_frontend *fe)
2370 u32 n, s, exp; 3239 u32 n, s, exp;
2371 u16 val; 3240 u16 val;
2372 3241
2373 val = dib8000_read_word(state, 542); 3242 if (state->revision != 0x8090)
3243 val = dib8000_read_word(state, 542);
3244 else
3245 val = dib8000_read_word(state, 544);
2374 n = (val >> 6) & 0xff; 3246 n = (val >> 6) & 0xff;
2375 exp = (val & 0x3f); 3247 exp = (val & 0x3f);
2376 if ((exp & 0x20) != 0) 3248 if ((exp & 0x20) != 0)
2377 exp -= 0x40; 3249 exp -= 0x40;
2378 n <<= exp+16; 3250 n <<= exp+16;
2379 3251
2380 val = dib8000_read_word(state, 543); 3252 if (state->revision != 0x8090)
3253 val = dib8000_read_word(state, 543);
3254 else
3255 val = dib8000_read_word(state, 545);
2381 s = (val >> 6) & 0xff; 3256 s = (val >> 6) & 0xff;
2382 exp = (val & 0x3f); 3257 exp = (val & 0x3f);
2383 if ((exp & 0x20) != 0) 3258 if ((exp & 0x20) != 0)
@@ -2401,7 +3276,7 @@ static int dib8000_read_snr(struct dvb_frontend *fe, u16 * snr)
2401 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) 3276 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
2402 snr_master += dib8000_get_snr(state->fe[index_frontend]); 3277 snr_master += dib8000_get_snr(state->fe[index_frontend]);
2403 3278
2404 if (snr_master != 0) { 3279 if ((snr_master >> 16) != 0) {
2405 snr_master = 10*intlog10(snr_master>>16); 3280 snr_master = 10*intlog10(snr_master>>16);
2406 *snr = snr_master / ((1 << 24) / 10); 3281 *snr = snr_master / ((1 << 24) / 10);
2407 } 3282 }
@@ -2458,7 +3333,8 @@ struct dvb_frontend *dib8000_get_slave_frontend(struct dvb_frontend *fe, int sla
2458EXPORT_SYMBOL(dib8000_get_slave_frontend); 3333EXPORT_SYMBOL(dib8000_get_slave_frontend);
2459 3334
2460 3335
2461int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr) 3336int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods,
3337 u8 default_addr, u8 first_addr, u8 is_dib8096p)
2462{ 3338{
2463 int k = 0, ret = 0; 3339 int k = 0, ret = 0;
2464 u8 new_addr = 0; 3340 u8 new_addr = 0;
@@ -2488,9 +3364,12 @@ int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 defau
2488 new_addr = first_addr + (k << 1); 3364 new_addr = first_addr + (k << 1);
2489 3365
2490 client.addr = new_addr; 3366 client.addr = new_addr;
2491 dib8000_i2c_write16(&client, 1287, 0x0003); /* sram lead in, rdy */ 3367 if (!is_dib8096p)
2492 if (dib8000_identify(&client) == 0) {
2493 dib8000_i2c_write16(&client, 1287, 0x0003); /* sram lead in, rdy */ 3368 dib8000_i2c_write16(&client, 1287, 0x0003); /* sram lead in, rdy */
3369 if (dib8000_identify(&client) == 0) {
3370 /* sram lead in, rdy */
3371 if (!is_dib8096p)
3372 dib8000_i2c_write16(&client, 1287, 0x0003);
2494 client.addr = default_addr; 3373 client.addr = default_addr;
2495 if (dib8000_identify(&client) == 0) { 3374 if (dib8000_identify(&client) == 0) {
2496 dprintk("#%d: not identified", k); 3375 dprintk("#%d: not identified", k);
@@ -2549,6 +3428,7 @@ static void dib8000_release(struct dvb_frontend *fe)
2549 dvb_frontend_detach(st->fe[index_frontend]); 3428 dvb_frontend_detach(st->fe[index_frontend]);
2550 3429
2551 dibx000_exit_i2c_master(&st->i2c_master); 3430 dibx000_exit_i2c_master(&st->i2c_master);
3431 i2c_del_adapter(&st->dib8096p_tuner_adap);
2552 kfree(st->fe[0]); 3432 kfree(st->fe[0]);
2553 kfree(st); 3433 kfree(st);
2554} 3434}
@@ -2581,9 +3461,9 @@ int dib8000_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
2581EXPORT_SYMBOL(dib8000_pid_filter); 3461EXPORT_SYMBOL(dib8000_pid_filter);
2582 3462
2583static const struct dvb_frontend_ops dib8000_ops = { 3463static const struct dvb_frontend_ops dib8000_ops = {
3464 .delsys = { SYS_ISDBT },
2584 .info = { 3465 .info = {
2585 .name = "DiBcom 8000 ISDB-T", 3466 .name = "DiBcom 8000 ISDB-T",
2586 .type = FE_OFDM,
2587 .frequency_min = 44250000, 3467 .frequency_min = 44250000,
2588 .frequency_max = 867250000, 3468 .frequency_max = 867250000,
2589 .frequency_stepsize = 62500, 3469 .frequency_stepsize = 62500,
@@ -2651,6 +3531,15 @@ struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, s
2651 3531
2652 dibx000_init_i2c_master(&state->i2c_master, DIB8000, state->i2c.adap, state->i2c.addr); 3532 dibx000_init_i2c_master(&state->i2c_master, DIB8000, state->i2c.adap, state->i2c.addr);
2653 3533
3534 /* init 8096p tuner adapter */
3535 strncpy(state->dib8096p_tuner_adap.name, "DiB8096P tuner interface",
3536 sizeof(state->dib8096p_tuner_adap.name));
3537 state->dib8096p_tuner_adap.algo = &dib8096p_tuner_xfer_algo;
3538 state->dib8096p_tuner_adap.algo_data = NULL;
3539 state->dib8096p_tuner_adap.dev.parent = state->i2c.adap->dev.parent;
3540 i2c_set_adapdata(&state->dib8096p_tuner_adap, state);
3541 i2c_add_adapter(&state->dib8096p_tuner_adap);
3542
2654 dib8000_reset(fe); 3543 dib8000_reset(fe);
2655 3544
2656 dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & ~0x60) | (3 << 5)); /* ber_rs_len = 3 */ 3545 dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & ~0x60) | (3 << 5)); /* ber_rs_len = 3 */
diff --git a/drivers/media/dvb/frontends/dib8000.h b/drivers/media/dvb/frontends/dib8000.h
index 617f9eba3a0..39591bb172c 100644
--- a/drivers/media/dvb/frontends/dib8000.h
+++ b/drivers/media/dvb/frontends/dib8000.h
@@ -32,6 +32,7 @@ struct dib8000_config {
32 u8 div_cfg; 32 u8 div_cfg;
33 u8 output_mode; 33 u8 output_mode;
34 u8 refclksel; 34 u8 refclksel;
35 u8 enMpegOutput:1;
35}; 36};
36 37
37#define DEFAULT_DIB8000_I2C_ADDRESS 18 38#define DEFAULT_DIB8000_I2C_ADDRESS 18
@@ -40,7 +41,8 @@ struct dib8000_config {
40extern struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg); 41extern struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg);
41extern struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int); 42extern struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int);
42 43
43extern int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr); 44extern int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods,
45 u8 default_addr, u8 first_addr, u8 is_dib8096p);
44 46
45extern int dib8000_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val); 47extern int dib8000_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
46extern int dib8000_set_wbd_ref(struct dvb_frontend *, u16 value); 48extern int dib8000_set_wbd_ref(struct dvb_frontend *, u16 value);
@@ -50,6 +52,13 @@ extern int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_st
50extern enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe); 52extern enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe);
51extern void dib8000_pwm_agc_reset(struct dvb_frontend *fe); 53extern void dib8000_pwm_agc_reset(struct dvb_frontend *fe);
52extern s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode); 54extern s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode);
55extern struct i2c_adapter *dib8096p_get_i2c_tuner(struct dvb_frontend *fe);
56extern int dib8096p_tuner_sleep(struct dvb_frontend *fe, int onoff);
57extern int dib8090p_get_dc_power(struct dvb_frontend *fe, u8 IQ);
58extern u32 dib8000_ctrl_timf(struct dvb_frontend *fe,
59 uint8_t op, uint32_t timf);
60extern int dib8000_update_pll(struct dvb_frontend *fe,
61 struct dibx000_bandwidth_config *pll);
53extern int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave); 62extern int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave);
54extern int dib8000_remove_slave_frontend(struct dvb_frontend *fe); 63extern int dib8000_remove_slave_frontend(struct dvb_frontend *fe);
55extern struct dvb_frontend *dib8000_get_slave_frontend(struct dvb_frontend *fe, int slave_index); 64extern struct dvb_frontend *dib8000_get_slave_frontend(struct dvb_frontend *fe, int slave_index);
@@ -66,7 +75,9 @@ static inline struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *fe
66 return NULL; 75 return NULL;
67} 76}
68 77
69static inline int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr) 78static inline int dib8000_i2c_enumeration(struct i2c_adapter *host,
79 int no_of_demods, u8 default_addr, u8 first_addr,
80 u8 is_dib8096p)
70{ 81{
71 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 82 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
72 return -ENODEV; 83 return -ENODEV;
@@ -109,11 +120,38 @@ static inline void dib8000_pwm_agc_reset(struct dvb_frontend *fe)
109{ 120{
110 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 121 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
111} 122}
123static inline struct i2c_adapter *dib8096p_get_i2c_tuner(struct dvb_frontend *fe)
124{
125 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
126 return NULL;
127}
128static inline int dib8096p_tuner_sleep(struct dvb_frontend *fe, int onoff)
129{
130 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
131 return 0;
132}
112static inline s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode) 133static inline s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode)
113{ 134{
114 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 135 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
115 return 0; 136 return 0;
116} 137}
138static inline int dib8090p_get_dc_power(struct dvb_frontend *fe, u8 IQ)
139{
140 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
141 return 0;
142}
143static inline u32 dib8000_ctrl_timf(struct dvb_frontend *fe,
144 uint8_t op, uint32_t timf)
145{
146 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
147 return 0;
148}
149static inline int dib8000_update_pll(struct dvb_frontend *fe,
150 struct dibx000_bandwidth_config *pll)
151{
152 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
153 return -ENODEV;
154}
117static inline int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave) 155static inline int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave)
118{ 156{
119 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 157 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
diff --git a/drivers/media/dvb/frontends/dib9000.c b/drivers/media/dvb/frontends/dib9000.c
index 660f80661ed..863ef3cfab9 100644
--- a/drivers/media/dvb/frontends/dib9000.c
+++ b/drivers/media/dvb/frontends/dib9000.c
@@ -1136,7 +1136,7 @@ static int dib9000_fw_init(struct dib9000_state *state)
1136 return 0; 1136 return 0;
1137} 1137}
1138 1138
1139static void dib9000_fw_set_channel_head(struct dib9000_state *state, struct dvb_frontend_parameters *ch) 1139static void dib9000_fw_set_channel_head(struct dib9000_state *state)
1140{ 1140{
1141 u8 b[9]; 1141 u8 b[9];
1142 u32 freq = state->fe[0]->dtv_property_cache.frequency / 1000; 1142 u32 freq = state->fe[0]->dtv_property_cache.frequency / 1000;
@@ -1157,7 +1157,7 @@ static void dib9000_fw_set_channel_head(struct dib9000_state *state, struct dvb_
1157 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_HEAD, b); 1157 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_HEAD, b);
1158} 1158}
1159 1159
1160static int dib9000_fw_get_channel(struct dvb_frontend *fe, struct dvb_frontend_parameters *channel) 1160static int dib9000_fw_get_channel(struct dvb_frontend *fe)
1161{ 1161{
1162 struct dib9000_state *state = fe->demodulator_priv; 1162 struct dib9000_state *state = fe->demodulator_priv;
1163 struct dibDVBTChannel { 1163 struct dibDVBTChannel {
@@ -1309,7 +1309,7 @@ error:
1309 return ret; 1309 return ret;
1310} 1310}
1311 1311
1312static int dib9000_fw_set_channel_union(struct dvb_frontend *fe, struct dvb_frontend_parameters *channel) 1312static int dib9000_fw_set_channel_union(struct dvb_frontend *fe)
1313{ 1313{
1314 struct dib9000_state *state = fe->demodulator_priv; 1314 struct dib9000_state *state = fe->demodulator_priv;
1315 struct dibDVBTChannel { 1315 struct dibDVBTChannel {
@@ -1454,7 +1454,7 @@ static int dib9000_fw_set_channel_union(struct dvb_frontend *fe, struct dvb_fron
1454 return 0; 1454 return 0;
1455} 1455}
1456 1456
1457static int dib9000_fw_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch) 1457static int dib9000_fw_tune(struct dvb_frontend *fe)
1458{ 1458{
1459 struct dib9000_state *state = fe->demodulator_priv; 1459 struct dib9000_state *state = fe->demodulator_priv;
1460 int ret = 10, search = state->channel_status.status == CHANNEL_STATUS_PARAMETERS_UNKNOWN; 1460 int ret = 10, search = state->channel_status.status == CHANNEL_STATUS_PARAMETERS_UNKNOWN;
@@ -1462,7 +1462,7 @@ static int dib9000_fw_tune(struct dvb_frontend *fe, struct dvb_frontend_paramete
1462 1462
1463 switch (state->tune_state) { 1463 switch (state->tune_state) {
1464 case CT_DEMOD_START: 1464 case CT_DEMOD_START:
1465 dib9000_fw_set_channel_head(state, ch); 1465 dib9000_fw_set_channel_head(state);
1466 1466
1467 /* write the channel context - a channel is initialized to 0, so it is OK */ 1467 /* write the channel context - a channel is initialized to 0, so it is OK */
1468 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_CONTEXT, (u8 *) fe_info); 1468 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_CONTEXT, (u8 *) fe_info);
@@ -1471,7 +1471,7 @@ static int dib9000_fw_tune(struct dvb_frontend *fe, struct dvb_frontend_paramete
1471 if (search) 1471 if (search)
1472 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_SEARCH, NULL, 0); 1472 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_SEARCH, NULL, 0);
1473 else { 1473 else {
1474 dib9000_fw_set_channel_union(fe, ch); 1474 dib9000_fw_set_channel_union(fe);
1475 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_TUNE, NULL, 0); 1475 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_TUNE, NULL, 0);
1476 } 1476 }
1477 state->tune_state = CT_DEMOD_STEP_1; 1477 state->tune_state = CT_DEMOD_STEP_1;
@@ -1867,7 +1867,7 @@ static int dib9000_fe_get_tune_settings(struct dvb_frontend *fe, struct dvb_fron
1867 return 0; 1867 return 0;
1868} 1868}
1869 1869
1870static int dib9000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 1870static int dib9000_get_frontend(struct dvb_frontend *fe)
1871{ 1871{
1872 struct dib9000_state *state = fe->demodulator_priv; 1872 struct dib9000_state *state = fe->demodulator_priv;
1873 u8 index_frontend, sub_index_frontend; 1873 u8 index_frontend, sub_index_frontend;
@@ -1883,7 +1883,7 @@ static int dib9000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
1883 dprintk("TPS lock on the slave%i", index_frontend); 1883 dprintk("TPS lock on the slave%i", index_frontend);
1884 1884
1885 /* synchronize the cache with the other frontends */ 1885 /* synchronize the cache with the other frontends */
1886 state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend], fep); 1886 state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend]);
1887 for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL); 1887 for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL);
1888 sub_index_frontend++) { 1888 sub_index_frontend++) {
1889 if (sub_index_frontend != index_frontend) { 1889 if (sub_index_frontend != index_frontend) {
@@ -1911,7 +1911,7 @@ static int dib9000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
1911 } 1911 }
1912 1912
1913 /* get the channel from master chip */ 1913 /* get the channel from master chip */
1914 ret = dib9000_fw_get_channel(fe, fep); 1914 ret = dib9000_fw_get_channel(fe);
1915 if (ret != 0) 1915 if (ret != 0)
1916 goto return_value; 1916 goto return_value;
1917 1917
@@ -1958,7 +1958,7 @@ static int dib9000_set_channel_status(struct dvb_frontend *fe, struct dvb_fronte
1958 return 0; 1958 return 0;
1959} 1959}
1960 1960
1961static int dib9000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) 1961static int dib9000_set_frontend(struct dvb_frontend *fe)
1962{ 1962{
1963 struct dib9000_state *state = fe->demodulator_priv; 1963 struct dib9000_state *state = fe->demodulator_priv;
1964 int sleep_time, sleep_time_slave; 1964 int sleep_time, sleep_time_slave;
@@ -1983,8 +1983,10 @@ static int dib9000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
1983 fe->dtv_property_cache.delivery_system = SYS_DVBT; 1983 fe->dtv_property_cache.delivery_system = SYS_DVBT;
1984 1984
1985 /* set the master status */ 1985 /* set the master status */
1986 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || 1986 if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO ||
1987 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || fep->u.ofdm.constellation == QAM_AUTO || fep->u.ofdm.code_rate_HP == FEC_AUTO) { 1987 state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO ||
1988 state->fe[0]->dtv_property_cache.modulation == QAM_AUTO ||
1989 state->fe[0]->dtv_property_cache.code_rate_HP == FEC_AUTO) {
1988 /* no channel specified, autosearch the channel */ 1990 /* no channel specified, autosearch the channel */
1989 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_UNKNOWN; 1991 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_UNKNOWN;
1990 } else 1992 } else
@@ -2008,9 +2010,9 @@ static int dib9000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2008 exit_condition = 0; /* 0: tune pending; 1: tune failed; 2:tune success */ 2010 exit_condition = 0; /* 0: tune pending; 1: tune failed; 2:tune success */
2009 index_frontend_success = 0; 2011 index_frontend_success = 0;
2010 do { 2012 do {
2011 sleep_time = dib9000_fw_tune(state->fe[0], NULL); 2013 sleep_time = dib9000_fw_tune(state->fe[0]);
2012 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) { 2014 for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
2013 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend], NULL); 2015 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend]);
2014 if (sleep_time == FE_CALLBACK_TIME_NEVER) 2016 if (sleep_time == FE_CALLBACK_TIME_NEVER)
2015 sleep_time = sleep_time_slave; 2017 sleep_time = sleep_time_slave;
2016 else if ((sleep_time_slave != FE_CALLBACK_TIME_NEVER) && (sleep_time_slave > sleep_time)) 2018 else if ((sleep_time_slave != FE_CALLBACK_TIME_NEVER) && (sleep_time_slave > sleep_time))
@@ -2052,7 +2054,7 @@ static int dib9000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2052 2054
2053 /* synchronize all the channel cache */ 2055 /* synchronize all the channel cache */
2054 state->get_frontend_internal = 1; 2056 state->get_frontend_internal = 1;
2055 dib9000_get_frontend(state->fe[0], fep); 2057 dib9000_get_frontend(state->fe[0]);
2056 state->get_frontend_internal = 0; 2058 state->get_frontend_internal = 0;
2057 2059
2058 /* retune the other frontends with the found channel */ 2060 /* retune the other frontends with the found channel */
@@ -2068,7 +2070,7 @@ static int dib9000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
2068 sleep_time = FE_CALLBACK_TIME_NEVER; 2070 sleep_time = FE_CALLBACK_TIME_NEVER;
2069 for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) { 2071 for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
2070 if (index_frontend != index_frontend_success) { 2072 if (index_frontend != index_frontend_success) {
2071 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend], NULL); 2073 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend]);
2072 if (sleep_time == FE_CALLBACK_TIME_NEVER) 2074 if (sleep_time == FE_CALLBACK_TIME_NEVER)
2073 sleep_time = sleep_time_slave; 2075 sleep_time = sleep_time_slave;
2074 else if ((sleep_time_slave != FE_CALLBACK_TIME_NEVER) && (sleep_time_slave > sleep_time)) 2076 else if ((sleep_time_slave != FE_CALLBACK_TIME_NEVER) && (sleep_time_slave > sleep_time))
@@ -2495,9 +2497,9 @@ error:
2495EXPORT_SYMBOL(dib9000_attach); 2497EXPORT_SYMBOL(dib9000_attach);
2496 2498
2497static struct dvb_frontend_ops dib9000_ops = { 2499static struct dvb_frontend_ops dib9000_ops = {
2500 .delsys = { SYS_DVBT },
2498 .info = { 2501 .info = {
2499 .name = "DiBcom 9000", 2502 .name = "DiBcom 9000",
2500 .type = FE_OFDM,
2501 .frequency_min = 44250000, 2503 .frequency_min = 44250000,
2502 .frequency_max = 867250000, 2504 .frequency_max = 867250000,
2503 .frequency_stepsize = 62500, 2505 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/dibx000_common.h b/drivers/media/dvb/frontends/dibx000_common.h
index 5e011474be4..5f484881d7b 100644
--- a/drivers/media/dvb/frontends/dibx000_common.h
+++ b/drivers/media/dvb/frontends/dibx000_common.h
@@ -146,14 +146,8 @@ enum dibx000_adc_states {
146 DIBX000_VBG_DISABLE, 146 DIBX000_VBG_DISABLE,
147}; 147};
148 148
149#define BANDWIDTH_TO_KHZ(v) ((v) == BANDWIDTH_8_MHZ ? 8000 : \ 149#define BANDWIDTH_TO_KHZ(v) ((v) / 1000)
150 (v) == BANDWIDTH_7_MHZ ? 7000 : \ 150#define BANDWIDTH_TO_HZ(v) ((v) * 1000)
151 (v) == BANDWIDTH_6_MHZ ? 6000 : 8000)
152
153#define BANDWIDTH_TO_INDEX(v) ( \
154 (v) == 8000 ? BANDWIDTH_8_MHZ : \
155 (v) == 7000 ? BANDWIDTH_7_MHZ : \
156 (v) == 6000 ? BANDWIDTH_6_MHZ : BANDWIDTH_8_MHZ )
157 151
158/* Chip output mode. */ 152/* Chip output mode. */
159#define OUTMODE_HIGH_Z 0 153#define OUTMODE_HIGH_Z 0
@@ -276,4 +270,11 @@ struct dibSubbandSelection {
276#define DEMOD_TIMF_GET 0x01 270#define DEMOD_TIMF_GET 0x01
277#define DEMOD_TIMF_UPDATE 0x02 271#define DEMOD_TIMF_UPDATE 0x02
278 272
273#define MPEG_ON_DIBTX 1
274#define DIV_ON_DIBTX 2
275#define ADC_ON_DIBTX 3
276#define DEMOUT_ON_HOSTBUS 4
277#define DIBTX_ON_HOSTBUS 5
278#define MPEG_ON_HOSTBUS 6
279
279#endif 280#endif
diff --git a/drivers/media/dvb/frontends/drxd.h b/drivers/media/dvb/frontends/drxd.h
index 7113535844f..34398738f9b 100644
--- a/drivers/media/dvb/frontends/drxd.h
+++ b/drivers/media/dvb/frontends/drxd.h
@@ -48,8 +48,6 @@ struct drxd_config {
48 u8 disable_i2c_gate_ctrl; 48 u8 disable_i2c_gate_ctrl;
49 49
50 u32 IF; 50 u32 IF;
51 int (*pll_set) (void *priv, void *priv_params,
52 u8 pll_addr, u8 demoda_addr, s32 *off);
53 s16(*osc_deviation) (void *priv, s16 dev, int flag); 51 s16(*osc_deviation) (void *priv, s16 dev, int flag);
54}; 52};
55 53
diff --git a/drivers/media/dvb/frontends/drxd_hard.c b/drivers/media/dvb/frontends/drxd_hard.c
index 88e46f4cdbb..7bf39cda83c 100644
--- a/drivers/media/dvb/frontends/drxd_hard.c
+++ b/drivers/media/dvb/frontends/drxd_hard.c
@@ -120,7 +120,7 @@ enum EIFFilter {
120struct drxd_state { 120struct drxd_state {
121 struct dvb_frontend frontend; 121 struct dvb_frontend frontend;
122 struct dvb_frontend_ops ops; 122 struct dvb_frontend_ops ops;
123 struct dvb_frontend_parameters param; 123 struct dtv_frontend_properties props;
124 124
125 const struct firmware *fw; 125 const struct firmware *fw;
126 struct device *dev; 126 struct device *dev;
@@ -914,14 +914,13 @@ static int load_firmware(struct drxd_state *state, const char *fw_name)
914 return -EIO; 914 return -EIO;
915 } 915 }
916 916
917 state->microcode = kmalloc(fw->size, GFP_KERNEL); 917 state->microcode = kmemdup(fw->data, fw->size, GFP_KERNEL);
918 if (state->microcode == NULL) { 918 if (state->microcode == NULL) {
919 release_firmware(fw); 919 release_firmware(fw);
920 printk(KERN_ERR "drxd: firmware load failure: no memory\n"); 920 printk(KERN_ERR "drxd: firmware load failure: no memory\n");
921 return -ENOMEM; 921 return -ENOMEM;
922 } 922 }
923 923
924 memcpy(state->microcode, fw->data, fw->size);
925 state->microcode_length = fw->size; 924 state->microcode_length = fw->size;
926 release_firmware(fw); 925 release_firmware(fw);
927 return 0; 926 return 0;
@@ -1622,14 +1621,14 @@ static int CorrectSysClockDeviation(struct drxd_state *state)
1622 break; 1621 break;
1623 } 1622 }
1624 1623
1625 switch (state->param.u.ofdm.bandwidth) { 1624 switch (state->props.bandwidth_hz) {
1626 case BANDWIDTH_8_MHZ: 1625 case 8000000:
1627 bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; 1626 bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;
1628 break; 1627 break;
1629 case BANDWIDTH_7_MHZ: 1628 case 7000000:
1630 bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; 1629 bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ;
1631 break; 1630 break;
1632 case BANDWIDTH_6_MHZ: 1631 case 6000000:
1633 bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; 1632 bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ;
1634 break; 1633 break;
1635 default: 1634 default:
@@ -1804,7 +1803,7 @@ static int StartDiversity(struct drxd_state *state)
1804 status = WriteTable(state, state->m_StartDiversityEnd); 1803 status = WriteTable(state, state->m_StartDiversityEnd);
1805 if (status < 0) 1804 if (status < 0)
1806 break; 1805 break;
1807 if (state->param.u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { 1806 if (state->props.bandwidth_hz == 8000000) {
1808 status = WriteTable(state, state->m_DiversityDelay8MHZ); 1807 status = WriteTable(state, state->m_DiversityDelay8MHZ);
1809 if (status < 0) 1808 if (status < 0)
1810 break; 1809 break;
@@ -1906,7 +1905,7 @@ static int SetCfgNoiseCalibration(struct drxd_state *state,
1906 1905
1907static int DRX_Start(struct drxd_state *state, s32 off) 1906static int DRX_Start(struct drxd_state *state, s32 off)
1908{ 1907{
1909 struct dvb_ofdm_parameters *p = &state->param.u.ofdm; 1908 struct dtv_frontend_properties *p = &state->props;
1910 int status; 1909 int status;
1911 1910
1912 u16 transmissionParams = 0; 1911 u16 transmissionParams = 0;
@@ -1971,7 +1970,7 @@ static int DRX_Start(struct drxd_state *state, s32 off)
1971 if (status < 0) 1970 if (status < 0)
1972 break; 1971 break;
1973 1972
1974 mirrorFreqSpect = (state->param.inversion == INVERSION_ON); 1973 mirrorFreqSpect = (state->props.inversion == INVERSION_ON);
1975 1974
1976 switch (p->transmission_mode) { 1975 switch (p->transmission_mode) {
1977 default: /* Not set, detect it automatically */ 1976 default: /* Not set, detect it automatically */
@@ -2021,7 +2020,7 @@ static int DRX_Start(struct drxd_state *state, s32 off)
2021 break; 2020 break;
2022 } 2021 }
2023 2022
2024 switch (p->hierarchy_information) { 2023 switch (p->hierarchy) {
2025 case HIERARCHY_1: 2024 case HIERARCHY_1:
2026 transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1; 2025 transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1;
2027 if (state->type_A) { 2026 if (state->type_A) {
@@ -2147,7 +2146,7 @@ static int DRX_Start(struct drxd_state *state, s32 off)
2147 if (status < 0) 2146 if (status < 0)
2148 break; 2147 break;
2149 2148
2150 switch (p->constellation) { 2149 switch (p->modulation) {
2151 default: 2150 default:
2152 operationMode |= SC_RA_RAM_OP_AUTO_CONST__M; 2151 operationMode |= SC_RA_RAM_OP_AUTO_CONST__M;
2153 /* fall through , try first guess 2152 /* fall through , try first guess
@@ -2331,9 +2330,11 @@ static int DRX_Start(struct drxd_state *state, s32 off)
2331 by SC for fix for some 8K,1/8 guard but is restored by 2330 by SC for fix for some 8K,1/8 guard but is restored by
2332 InitEC and ResetEC 2331 InitEC and ResetEC
2333 functions */ 2332 functions */
2334 switch (p->bandwidth) { 2333 switch (p->bandwidth_hz) {
2335 case BANDWIDTH_AUTO: 2334 case 0:
2336 case BANDWIDTH_8_MHZ: 2335 p->bandwidth_hz = 8000000;
2336 /* fall through */
2337 case 8000000:
2337 /* (64/7)*(8/8)*1000000 */ 2338 /* (64/7)*(8/8)*1000000 */
2338 bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; 2339 bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;
2339 2340
@@ -2341,14 +2342,14 @@ static int DRX_Start(struct drxd_state *state, s32 off)
2341 status = Write16(state, 2342 status = Write16(state,
2342 FE_AG_REG_IND_DEL__A, 50, 0x0000); 2343 FE_AG_REG_IND_DEL__A, 50, 0x0000);
2343 break; 2344 break;
2344 case BANDWIDTH_7_MHZ: 2345 case 7000000:
2345 /* (64/7)*(7/8)*1000000 */ 2346 /* (64/7)*(7/8)*1000000 */
2346 bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; 2347 bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ;
2347 bandwidthParam = 0x4807; /*binary:0100 1000 0000 0111 */ 2348 bandwidthParam = 0x4807; /*binary:0100 1000 0000 0111 */
2348 status = Write16(state, 2349 status = Write16(state,
2349 FE_AG_REG_IND_DEL__A, 59, 0x0000); 2350 FE_AG_REG_IND_DEL__A, 59, 0x0000);
2350 break; 2351 break;
2351 case BANDWIDTH_6_MHZ: 2352 case 6000000:
2352 /* (64/7)*(6/8)*1000000 */ 2353 /* (64/7)*(6/8)*1000000 */
2353 bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; 2354 bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ;
2354 bandwidthParam = 0x0F07; /*binary: 0000 1111 0000 0111 */ 2355 bandwidthParam = 0x0F07; /*binary: 0000 1111 0000 0111 */
@@ -2887,41 +2888,26 @@ static int drxd_sleep(struct dvb_frontend *fe)
2887 return 0; 2888 return 0;
2888} 2889}
2889 2890
2890static int drxd_get_frontend(struct dvb_frontend *fe,
2891 struct dvb_frontend_parameters *param)
2892{
2893 return 0;
2894}
2895
2896static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) 2891static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
2897{ 2892{
2898 return drxd_config_i2c(fe, enable); 2893 return drxd_config_i2c(fe, enable);
2899} 2894}
2900 2895
2901static int drxd_set_frontend(struct dvb_frontend *fe, 2896static int drxd_set_frontend(struct dvb_frontend *fe)
2902 struct dvb_frontend_parameters *param)
2903{ 2897{
2898 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
2904 struct drxd_state *state = fe->demodulator_priv; 2899 struct drxd_state *state = fe->demodulator_priv;
2905 s32 off = 0; 2900 s32 off = 0;
2906 2901
2907 state->param = *param; 2902 state->props = *p;
2908 DRX_Stop(state); 2903 DRX_Stop(state);
2909 2904
2910 if (fe->ops.tuner_ops.set_params) { 2905 if (fe->ops.tuner_ops.set_params) {
2911 fe->ops.tuner_ops.set_params(fe, param); 2906 fe->ops.tuner_ops.set_params(fe);
2912 if (fe->ops.i2c_gate_ctrl) 2907 if (fe->ops.i2c_gate_ctrl)
2913 fe->ops.i2c_gate_ctrl(fe, 0); 2908 fe->ops.i2c_gate_ctrl(fe, 0);
2914 } 2909 }
2915 2910
2916 /* FIXME: move PLL drivers */
2917 if (state->config.pll_set &&
2918 state->config.pll_set(state->priv, param,
2919 state->config.pll_address,
2920 state->config.demoda_address, &off) < 0) {
2921 printk(KERN_ERR "Error in pll_set\n");
2922 return -1;
2923 }
2924
2925 msleep(200); 2911 msleep(200);
2926 2912
2927 return DRX_Start(state, off); 2913 return DRX_Start(state, off);
@@ -2935,10 +2921,9 @@ static void drxd_release(struct dvb_frontend *fe)
2935} 2921}
2936 2922
2937static struct dvb_frontend_ops drxd_ops = { 2923static struct dvb_frontend_ops drxd_ops = {
2938 2924 .delsys = { SYS_DVBT},
2939 .info = { 2925 .info = {
2940 .name = "Micronas DRXD DVB-T", 2926 .name = "Micronas DRXD DVB-T",
2941 .type = FE_OFDM,
2942 .frequency_min = 47125000, 2927 .frequency_min = 47125000,
2943 .frequency_max = 855250000, 2928 .frequency_max = 855250000,
2944 .frequency_stepsize = 166667, 2929 .frequency_stepsize = 166667,
@@ -2958,7 +2943,6 @@ static struct dvb_frontend_ops drxd_ops = {
2958 .i2c_gate_ctrl = drxd_i2c_gate_ctrl, 2943 .i2c_gate_ctrl = drxd_i2c_gate_ctrl,
2959 2944
2960 .set_frontend = drxd_set_frontend, 2945 .set_frontend = drxd_set_frontend,
2961 .get_frontend = drxd_get_frontend,
2962 .get_tune_settings = drxd_get_tune_settings, 2946 .get_tune_settings = drxd_get_tune_settings,
2963 2947
2964 .read_status = drxd_read_status, 2948 .read_status = drxd_read_status,
diff --git a/drivers/media/dvb/frontends/drxk.h b/drivers/media/dvb/frontends/drxk.h
index 58baf419560..020981844a8 100644
--- a/drivers/media/dvb/frontends/drxk.h
+++ b/drivers/media/dvb/frontends/drxk.h
@@ -8,6 +8,8 @@
8 * struct drxk_config - Configure the initial parameters for DRX-K 8 * struct drxk_config - Configure the initial parameters for DRX-K
9 * 9 *
10 * adr: I2C Address of the DRX-K 10 * adr: I2C Address of the DRX-K
11 * parallel_ts: true means that the device uses parallel TS,
12 * Serial otherwise.
11 * single_master: Device is on the single master mode 13 * single_master: Device is on the single master mode
12 * no_i2c_bridge: Don't switch the I2C bridge to talk with tuner 14 * no_i2c_bridge: Don't switch the I2C bridge to talk with tuner
13 * antenna_gpio: GPIO bit used to control the antenna 15 * antenna_gpio: GPIO bit used to control the antenna
@@ -22,22 +24,23 @@ struct drxk_config {
22 u8 adr; 24 u8 adr;
23 bool single_master; 25 bool single_master;
24 bool no_i2c_bridge; 26 bool no_i2c_bridge;
27 bool parallel_ts;
25 28
26 bool antenna_dvbt; 29 bool antenna_dvbt;
27 u16 antenna_gpio; 30 u16 antenna_gpio;
28 31
32 int chunk_size;
33
29 const char *microcode_name; 34 const char *microcode_name;
30}; 35};
31 36
32#if defined(CONFIG_DVB_DRXK) || (defined(CONFIG_DVB_DRXK_MODULE) \ 37#if defined(CONFIG_DVB_DRXK) || (defined(CONFIG_DVB_DRXK_MODULE) \
33 && defined(MODULE)) 38 && defined(MODULE))
34extern struct dvb_frontend *drxk_attach(const struct drxk_config *config, 39extern struct dvb_frontend *drxk_attach(const struct drxk_config *config,
35 struct i2c_adapter *i2c, 40 struct i2c_adapter *i2c);
36 struct dvb_frontend **fe_t);
37#else 41#else
38static inline struct dvb_frontend *drxk_attach(const struct drxk_config *config, 42static inline struct dvb_frontend *drxk_attach(const struct drxk_config *config,
39 struct i2c_adapter *i2c, 43 struct i2c_adapter *i2c)
40 struct dvb_frontend **fe_t)
41{ 44{
42 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 45 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
43 return NULL; 46 return NULL;
diff --git a/drivers/media/dvb/frontends/drxk_hard.c b/drivers/media/dvb/frontends/drxk_hard.c
index f6431ef827d..6980ed7b878 100644
--- a/drivers/media/dvb/frontends/drxk_hard.c
+++ b/drivers/media/dvb/frontends/drxk_hard.c
@@ -368,10 +368,10 @@ static int i2c_read(struct i2c_adapter *adap,
368 } 368 }
369 if (debug > 2) { 369 if (debug > 2) {
370 int i; 370 int i;
371 dprintk(2, ": read from "); 371 dprintk(2, ": read from");
372 for (i = 0; i < len; i++) 372 for (i = 0; i < len; i++)
373 printk(KERN_CONT " %02x", msg[i]); 373 printk(KERN_CONT " %02x", msg[i]);
374 printk(KERN_CONT "Value = "); 374 printk(KERN_CONT ", value = ");
375 for (i = 0; i < alen; i++) 375 for (i = 0; i < alen; i++)
376 printk(KERN_CONT " %02x", answ[i]); 376 printk(KERN_CONT " %02x", answ[i]);
377 printk(KERN_CONT "\n"); 377 printk(KERN_CONT "\n");
@@ -660,7 +660,6 @@ static int init_state(struct drxk_state *state)
660 /* io_pad_cfg_mode output mode is drive always */ 660 /* io_pad_cfg_mode output mode is drive always */
661 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 661 /* io_pad_cfg_drive is set to power 2 (23 mA) */
662 u32 ulGPIOCfg = 0x0113; 662 u32 ulGPIOCfg = 0x0113;
663 u32 ulSerialMode = 1;
664 u32 ulInvertTSClock = 0; 663 u32 ulInvertTSClock = 0;
665 u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH; 664 u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH;
666 u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH; 665 u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH;
@@ -681,7 +680,8 @@ static int init_state(struct drxk_state *state)
681 state->m_hasOOB = false; 680 state->m_hasOOB = false;
682 state->m_hasAudio = false; 681 state->m_hasAudio = false;
683 682
684 state->m_ChunkSize = 124; 683 if (!state->m_ChunkSize)
684 state->m_ChunkSize = 124;
685 685
686 state->m_oscClockFreq = 0; 686 state->m_oscClockFreq = 0;
687 state->m_smartAntInverted = false; 687 state->m_smartAntInverted = false;
@@ -810,8 +810,6 @@ static int init_state(struct drxk_state *state)
810 /* MPEG output configuration */ 810 /* MPEG output configuration */
811 state->m_enableMPEGOutput = true; /* If TRUE; enable MPEG ouput */ 811 state->m_enableMPEGOutput = true; /* If TRUE; enable MPEG ouput */
812 state->m_insertRSByte = false; /* If TRUE; insert RS byte */ 812 state->m_insertRSByte = false; /* If TRUE; insert RS byte */
813 state->m_enableParallel = true; /* If TRUE;
814 parallel out otherwise serial */
815 state->m_invertDATA = false; /* If TRUE; invert DATA signals */ 813 state->m_invertDATA = false; /* If TRUE; invert DATA signals */
816 state->m_invertERR = false; /* If TRUE; invert ERR signal */ 814 state->m_invertERR = false; /* If TRUE; invert ERR signal */
817 state->m_invertSTR = false; /* If TRUE; invert STR signals */ 815 state->m_invertSTR = false; /* If TRUE; invert STR signals */
@@ -856,8 +854,6 @@ static int init_state(struct drxk_state *state)
856 state->m_bPowerDown = false; 854 state->m_bPowerDown = false;
857 state->m_currentPowerMode = DRX_POWER_DOWN; 855 state->m_currentPowerMode = DRX_POWER_DOWN;
858 856
859 state->m_enableParallel = (ulSerialMode == 0);
860
861 state->m_rfmirror = (ulRfMirror == 0); 857 state->m_rfmirror = (ulRfMirror == 0);
862 state->m_IfAgcPol = false; 858 state->m_IfAgcPol = false;
863 return 0; 859 return 0;
@@ -946,6 +942,9 @@ static int GetDeviceCapabilities(struct drxk_state *state)
946 status = read32(state, SIO_TOP_JTAGID_LO__A, &sioTopJtagidLo); 942 status = read32(state, SIO_TOP_JTAGID_LO__A, &sioTopJtagidLo);
947 if (status < 0) 943 if (status < 0)
948 goto error; 944 goto error;
945
946printk(KERN_ERR "drxk: status = 0x%08x\n", sioTopJtagidLo);
947
949 /* driver 0.9.0 */ 948 /* driver 0.9.0 */
950 switch ((sioTopJtagidLo >> 29) & 0xF) { 949 switch ((sioTopJtagidLo >> 29) & 0xF) {
951 case 0: 950 case 0:
@@ -963,7 +962,8 @@ static int GetDeviceCapabilities(struct drxk_state *state)
963 default: 962 default:
964 state->m_deviceSpin = DRXK_SPIN_UNKNOWN; 963 state->m_deviceSpin = DRXK_SPIN_UNKNOWN;
965 status = -EINVAL; 964 status = -EINVAL;
966 printk(KERN_ERR "drxk: Spin unknown\n"); 965 printk(KERN_ERR "drxk: Spin %d unknown\n",
966 (sioTopJtagidLo >> 29) & 0xF);
967 goto error2; 967 goto error2;
968 } 968 }
969 switch ((sioTopJtagidLo >> 12) & 0xFF) { 969 switch ((sioTopJtagidLo >> 12) & 0xFF) {
@@ -1190,7 +1190,9 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
1190 u16 sioPdrMclkCfg = 0; 1190 u16 sioPdrMclkCfg = 0;
1191 u16 sioPdrMdxCfg = 0; 1191 u16 sioPdrMdxCfg = 0;
1192 1192
1193 dprintk(1, "\n"); 1193 dprintk(1, ": mpeg %s, %s mode\n",
1194 mpegEnable ? "enable" : "disable",
1195 state->m_enableParallel ? "parallel" : "serial");
1194 1196
1195 /* stop lock indicator process */ 1197 /* stop lock indicator process */
1196 status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); 1198 status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE);
@@ -1846,6 +1848,7 @@ static int SetOperationMode(struct drxk_state *state,
1846 */ 1848 */
1847 switch (oMode) { 1849 switch (oMode) {
1848 case OM_DVBT: 1850 case OM_DVBT:
1851 dprintk(1, ": DVB-T\n");
1849 state->m_OperationMode = oMode; 1852 state->m_OperationMode = oMode;
1850 status = SetDVBTStandard(state, oMode); 1853 status = SetDVBTStandard(state, oMode);
1851 if (status < 0) 1854 if (status < 0)
@@ -1853,6 +1856,8 @@ static int SetOperationMode(struct drxk_state *state,
1853 break; 1856 break;
1854 case OM_QAM_ITU_A: /* fallthrough */ 1857 case OM_QAM_ITU_A: /* fallthrough */
1855 case OM_QAM_ITU_C: 1858 case OM_QAM_ITU_C:
1859 dprintk(1, ": DVB-C Annex %c\n",
1860 (state->m_OperationMode == OM_QAM_ITU_A) ? 'A' : 'C');
1856 state->m_OperationMode = oMode; 1861 state->m_OperationMode = oMode;
1857 status = SetQAMStandard(state, oMode); 1862 status = SetQAMStandard(state, oMode);
1858 if (status < 0) 1863 if (status < 0)
@@ -1881,7 +1886,7 @@ static int Start(struct drxk_state *state, s32 offsetFreq,
1881 state->m_DrxkState != DRXK_DTV_STARTED) 1886 state->m_DrxkState != DRXK_DTV_STARTED)
1882 goto error; 1887 goto error;
1883 1888
1884 state->m_bMirrorFreqSpect = (state->param.inversion == INVERSION_ON); 1889 state->m_bMirrorFreqSpect = (state->props.inversion == INVERSION_ON);
1885 1890
1886 if (IntermediateFrequency < 0) { 1891 if (IntermediateFrequency < 0) {
1887 state->m_bMirrorFreqSpect = !state->m_bMirrorFreqSpect; 1892 state->m_bMirrorFreqSpect = !state->m_bMirrorFreqSpect;
@@ -2503,7 +2508,7 @@ static int GetQAMSignalToNoise(struct drxk_state *state,
2503 u16 qamSlErrPower = 0; /* accum. error between 2508 u16 qamSlErrPower = 0; /* accum. error between
2504 raw and sliced symbols */ 2509 raw and sliced symbols */
2505 u32 qamSlSigPower = 0; /* used for MER, depends of 2510 u32 qamSlSigPower = 0; /* used for MER, depends of
2506 QAM constellation */ 2511 QAM modulation */
2507 u32 qamSlMer = 0; /* QAM MER */ 2512 u32 qamSlMer = 0; /* QAM MER */
2508 2513
2509 dprintk(1, "\n"); 2514 dprintk(1, "\n");
@@ -2517,7 +2522,7 @@ static int GetQAMSignalToNoise(struct drxk_state *state,
2517 return -EINVAL; 2522 return -EINVAL;
2518 } 2523 }
2519 2524
2520 switch (state->param.u.qam.modulation) { 2525 switch (state->props.modulation) {
2521 case QAM_16: 2526 case QAM_16:
2522 qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM16 << 2; 2527 qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM16 << 2;
2523 break; 2528 break;
@@ -2748,7 +2753,7 @@ static int GetDVBCQuality(struct drxk_state *state, s32 *pQuality)
2748 if (status < 0) 2753 if (status < 0)
2749 break; 2754 break;
2750 2755
2751 switch (state->param.u.qam.modulation) { 2756 switch (state->props.modulation) {
2752 case QAM_16: 2757 case QAM_16:
2753 SignalToNoiseRel = SignalToNoise - 200; 2758 SignalToNoiseRel = SignalToNoise - 200;
2754 break; 2759 break;
@@ -3813,7 +3818,7 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3813 /*== Write channel settings to device =====================================*/ 3818 /*== Write channel settings to device =====================================*/
3814 3819
3815 /* mode */ 3820 /* mode */
3816 switch (state->param.u.ofdm.transmission_mode) { 3821 switch (state->props.transmission_mode) {
3817 case TRANSMISSION_MODE_AUTO: 3822 case TRANSMISSION_MODE_AUTO:
3818 default: 3823 default:
3819 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_MODE__M; 3824 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_MODE__M;
@@ -3827,7 +3832,7 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3827 } 3832 }
3828 3833
3829 /* guard */ 3834 /* guard */
3830 switch (state->param.u.ofdm.guard_interval) { 3835 switch (state->props.guard_interval) {
3831 default: 3836 default:
3832 case GUARD_INTERVAL_AUTO: 3837 case GUARD_INTERVAL_AUTO:
3833 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M; 3838 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M;
@@ -3847,7 +3852,7 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3847 } 3852 }
3848 3853
3849 /* hierarchy */ 3854 /* hierarchy */
3850 switch (state->param.u.ofdm.hierarchy_information) { 3855 switch (state->props.hierarchy) {
3851 case HIERARCHY_AUTO: 3856 case HIERARCHY_AUTO:
3852 case HIERARCHY_NONE: 3857 case HIERARCHY_NONE:
3853 default: 3858 default:
@@ -3867,8 +3872,8 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3867 } 3872 }
3868 3873
3869 3874
3870 /* constellation */ 3875 /* modulation */
3871 switch (state->param.u.ofdm.constellation) { 3876 switch (state->props.modulation) {
3872 case QAM_AUTO: 3877 case QAM_AUTO:
3873 default: 3878 default:
3874 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_CONST__M; 3879 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_CONST__M;
@@ -3911,7 +3916,7 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3911#endif 3916#endif
3912 3917
3913 /* coderate */ 3918 /* coderate */
3914 switch (state->param.u.ofdm.code_rate_HP) { 3919 switch (state->props.code_rate_HP) {
3915 case FEC_AUTO: 3920 case FEC_AUTO:
3916 default: 3921 default:
3917 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_RATE__M; 3922 operationMode |= OFDM_SC_RA_RAM_OP_AUTO_RATE__M;
@@ -3940,9 +3945,11 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3940 /* Also set parameters for EC_OC fix, note EC_OC_REG_TMD_HIL_MAR is changed 3945 /* Also set parameters for EC_OC fix, note EC_OC_REG_TMD_HIL_MAR is changed
3941 by SC for fix for some 8K,1/8 guard but is restored by InitEC and ResetEC 3946 by SC for fix for some 8K,1/8 guard but is restored by InitEC and ResetEC
3942 functions */ 3947 functions */
3943 switch (state->param.u.ofdm.bandwidth) { 3948 switch (state->props.bandwidth_hz) {
3944 case BANDWIDTH_AUTO: 3949 case 0:
3945 case BANDWIDTH_8_MHZ: 3950 state->props.bandwidth_hz = 8000000;
3951 /* fall though */
3952 case 8000000:
3946 bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ; 3953 bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ;
3947 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 3052); 3954 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 3052);
3948 if (status < 0) 3955 if (status < 0)
@@ -3961,7 +3968,7 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3961 if (status < 0) 3968 if (status < 0)
3962 goto error; 3969 goto error;
3963 break; 3970 break;
3964 case BANDWIDTH_7_MHZ: 3971 case 7000000:
3965 bandwidth = DRXK_BANDWIDTH_7MHZ_IN_HZ; 3972 bandwidth = DRXK_BANDWIDTH_7MHZ_IN_HZ;
3966 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 3491); 3973 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 3491);
3967 if (status < 0) 3974 if (status < 0)
@@ -3980,7 +3987,7 @@ static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz,
3980 if (status < 0) 3987 if (status < 0)
3981 goto error; 3988 goto error;
3982 break; 3989 break;
3983 case BANDWIDTH_6_MHZ: 3990 case 6000000:
3984 bandwidth = DRXK_BANDWIDTH_6MHZ_IN_HZ; 3991 bandwidth = DRXK_BANDWIDTH_6MHZ_IN_HZ;
3985 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 4073); 3992 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 4073);
3986 if (status < 0) 3993 if (status < 0)
@@ -4187,7 +4194,7 @@ error:
4187/** 4194/**
4188* \brief Setup of the QAM Measurement intervals for signal quality 4195* \brief Setup of the QAM Measurement intervals for signal quality
4189* \param demod instance of demod. 4196* \param demod instance of demod.
4190* \param constellation current constellation. 4197* \param modulation current modulation.
4191* \return DRXStatus_t. 4198* \return DRXStatus_t.
4192* 4199*
4193* NOTE: 4200* NOTE:
@@ -4196,7 +4203,7 @@ error:
4196* 4203*
4197*/ 4204*/
4198static int SetQAMMeasurement(struct drxk_state *state, 4205static int SetQAMMeasurement(struct drxk_state *state,
4199 enum EDrxkConstellation constellation, 4206 enum EDrxkConstellation modulation,
4200 u32 symbolRate) 4207 u32 symbolRate)
4201{ 4208{
4202 u32 fecBitsDesired = 0; /* BER accounting period */ 4209 u32 fecBitsDesired = 0; /* BER accounting period */
@@ -4210,11 +4217,11 @@ static int SetQAMMeasurement(struct drxk_state *state,
4210 fecRsPrescale = 1; 4217 fecRsPrescale = 1;
4211 /* fecBitsDesired = symbolRate [kHz] * 4218 /* fecBitsDesired = symbolRate [kHz] *
4212 FrameLenght [ms] * 4219 FrameLenght [ms] *
4213 (constellation + 1) * 4220 (modulation + 1) *
4214 SyncLoss (== 1) * 4221 SyncLoss (== 1) *
4215 ViterbiLoss (==1) 4222 ViterbiLoss (==1)
4216 */ 4223 */
4217 switch (constellation) { 4224 switch (modulation) {
4218 case DRX_CONSTELLATION_QAM16: 4225 case DRX_CONSTELLATION_QAM16:
4219 fecBitsDesired = 4 * symbolRate; 4226 fecBitsDesired = 4 * symbolRate;
4220 break; 4227 break;
@@ -5281,12 +5288,12 @@ static int QAMSetSymbolrate(struct drxk_state *state)
5281 /* Select & calculate correct IQM rate */ 5288 /* Select & calculate correct IQM rate */
5282 adcFrequency = (state->m_sysClockFreq * 1000) / 3; 5289 adcFrequency = (state->m_sysClockFreq * 1000) / 3;
5283 ratesel = 0; 5290 ratesel = 0;
5284 /* printk(KERN_DEBUG "drxk: SR %d\n", state->param.u.qam.symbol_rate); */ 5291 /* printk(KERN_DEBUG "drxk: SR %d\n", state->props.symbol_rate); */
5285 if (state->param.u.qam.symbol_rate <= 1188750) 5292 if (state->props.symbol_rate <= 1188750)
5286 ratesel = 3; 5293 ratesel = 3;
5287 else if (state->param.u.qam.symbol_rate <= 2377500) 5294 else if (state->props.symbol_rate <= 2377500)
5288 ratesel = 2; 5295 ratesel = 2;
5289 else if (state->param.u.qam.symbol_rate <= 4755000) 5296 else if (state->props.symbol_rate <= 4755000)
5290 ratesel = 1; 5297 ratesel = 1;
5291 status = write16(state, IQM_FD_RATESEL__A, ratesel); 5298 status = write16(state, IQM_FD_RATESEL__A, ratesel);
5292 if (status < 0) 5299 if (status < 0)
@@ -5295,7 +5302,7 @@ static int QAMSetSymbolrate(struct drxk_state *state)
5295 /* 5302 /*
5296 IqmRcRate = ((Fadc / (symbolrate * (4<<ratesel))) - 1) * (1<<23) 5303 IqmRcRate = ((Fadc / (symbolrate * (4<<ratesel))) - 1) * (1<<23)
5297 */ 5304 */
5298 symbFreq = state->param.u.qam.symbol_rate * (1 << ratesel); 5305 symbFreq = state->props.symbol_rate * (1 << ratesel);
5299 if (symbFreq == 0) { 5306 if (symbFreq == 0) {
5300 /* Divide by zero */ 5307 /* Divide by zero */
5301 status = -EINVAL; 5308 status = -EINVAL;
@@ -5311,7 +5318,7 @@ static int QAMSetSymbolrate(struct drxk_state *state)
5311 /* 5318 /*
5312 LcSymbFreq = round (.125 * symbolrate / adcFreq * (1<<15)) 5319 LcSymbFreq = round (.125 * symbolrate / adcFreq * (1<<15))
5313 */ 5320 */
5314 symbFreq = state->param.u.qam.symbol_rate; 5321 symbFreq = state->props.symbol_rate;
5315 if (adcFrequency == 0) { 5322 if (adcFrequency == 0) {
5316 /* Divide by zero */ 5323 /* Divide by zero */
5317 status = -EINVAL; 5324 status = -EINVAL;
@@ -5412,7 +5419,7 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5412 goto error; 5419 goto error;
5413 5420
5414 /* Set params */ 5421 /* Set params */
5415 switch (state->param.u.qam.modulation) { 5422 switch (state->props.modulation) {
5416 case QAM_256: 5423 case QAM_256:
5417 state->m_Constellation = DRX_CONSTELLATION_QAM256; 5424 state->m_Constellation = DRX_CONSTELLATION_QAM256;
5418 break; 5425 break;
@@ -5435,7 +5442,7 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5435 } 5442 }
5436 if (status < 0) 5443 if (status < 0)
5437 goto error; 5444 goto error;
5438 setParamParameters[0] = state->m_Constellation; /* constellation */ 5445 setParamParameters[0] = state->m_Constellation; /* modulation */
5439 setParamParameters[1] = DRXK_QAM_I12_J17; /* interleave mode */ 5446 setParamParameters[1] = DRXK_QAM_I12_J17; /* interleave mode */
5440 if (state->m_OperationMode == OM_QAM_ITU_C) 5447 if (state->m_OperationMode == OM_QAM_ITU_C)
5441 setParamParameters[2] = QAM_TOP_ANNEX_C; 5448 setParamParameters[2] = QAM_TOP_ANNEX_C;
@@ -5457,7 +5464,7 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5457 if (status < 0) 5464 if (status < 0)
5458 goto error; 5465 goto error;
5459 5466
5460 setParamParameters[0] = state->m_Constellation; /* constellation */ 5467 setParamParameters[0] = state->m_Constellation; /* modulation */
5461 setParamParameters[1] = DRXK_QAM_I12_J17; /* interleave mode */ 5468 setParamParameters[1] = DRXK_QAM_I12_J17; /* interleave mode */
5462 status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_SET_PARAM, 2, setParamParameters, 1, &cmdResult); 5469 status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_SET_PARAM, 2, setParamParameters, 1, &cmdResult);
5463 } 5470 }
@@ -5466,7 +5473,7 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5466 5473
5467 /* 5474 /*
5468 * STEP 3: enable the system in a mode where the ADC provides valid 5475 * STEP 3: enable the system in a mode where the ADC provides valid
5469 * signal setup constellation independent registers 5476 * signal setup modulation independent registers
5470 */ 5477 */
5471#if 0 5478#if 0
5472 status = SetFrequency(channel, tunerFreqOffset)); 5479 status = SetFrequency(channel, tunerFreqOffset));
@@ -5478,7 +5485,7 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5478 goto error; 5485 goto error;
5479 5486
5480 /* Setup BER measurement */ 5487 /* Setup BER measurement */
5481 status = SetQAMMeasurement(state, state->m_Constellation, state->param.u. qam.symbol_rate); 5488 status = SetQAMMeasurement(state, state->m_Constellation, state->props.symbol_rate);
5482 if (status < 0) 5489 if (status < 0)
5483 goto error; 5490 goto error;
5484 5491
@@ -5560,8 +5567,8 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5560 if (status < 0) 5567 if (status < 0)
5561 goto error; 5568 goto error;
5562 5569
5563 /* STEP 4: constellation specific setup */ 5570 /* STEP 4: modulation specific setup */
5564 switch (state->param.u.qam.modulation) { 5571 switch (state->props.modulation) {
5565 case QAM_16: 5572 case QAM_16:
5566 status = SetQAM16(state); 5573 status = SetQAM16(state);
5567 break; 5574 break;
@@ -5591,7 +5598,7 @@ static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz,
5591 goto error; 5598 goto error;
5592 5599
5593 /* Re-configure MPEG output, requires knowledge of channel bitrate */ 5600 /* Re-configure MPEG output, requires knowledge of channel bitrate */
5594 /* extAttr->currentChannel.constellation = channel->constellation; */ 5601 /* extAttr->currentChannel.modulation = channel->modulation; */
5595 /* extAttr->currentChannel.symbolrate = channel->symbolrate; */ 5602 /* extAttr->currentChannel.symbolrate = channel->symbolrate; */
5596 status = MPEGTSDtoSetup(state, state->m_OperationMode); 5603 status = MPEGTSDtoSetup(state, state->m_OperationMode);
5597 if (status < 0) 5604 if (status < 0)
@@ -6167,7 +6174,7 @@ error:
6167 return status; 6174 return status;
6168} 6175}
6169 6176
6170static void drxk_c_release(struct dvb_frontend *fe) 6177static void drxk_release(struct dvb_frontend *fe)
6171{ 6178{
6172 struct drxk_state *state = fe->demodulator_priv; 6179 struct drxk_state *state = fe->demodulator_priv;
6173 6180
@@ -6175,24 +6182,12 @@ static void drxk_c_release(struct dvb_frontend *fe)
6175 kfree(state); 6182 kfree(state);
6176} 6183}
6177 6184
6178static int drxk_c_init(struct dvb_frontend *fe) 6185static int drxk_sleep(struct dvb_frontend *fe)
6179{
6180 struct drxk_state *state = fe->demodulator_priv;
6181
6182 dprintk(1, "\n");
6183 if (mutex_trylock(&state->ctlock) == 0)
6184 return -EBUSY;
6185 SetOperationMode(state, OM_QAM_ITU_A);
6186 return 0;
6187}
6188
6189static int drxk_c_sleep(struct dvb_frontend *fe)
6190{ 6186{
6191 struct drxk_state *state = fe->demodulator_priv; 6187 struct drxk_state *state = fe->demodulator_priv;
6192 6188
6193 dprintk(1, "\n"); 6189 dprintk(1, "\n");
6194 ShutDown(state); 6190 ShutDown(state);
6195 mutex_unlock(&state->ctlock);
6196 return 0; 6191 return 0;
6197} 6192}
6198 6193
@@ -6204,9 +6199,10 @@ static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
6204 return ConfigureI2CBridge(state, enable ? true : false); 6199 return ConfigureI2CBridge(state, enable ? true : false);
6205} 6200}
6206 6201
6207static int drxk_set_parameters(struct dvb_frontend *fe, 6202static int drxk_set_parameters(struct dvb_frontend *fe)
6208 struct dvb_frontend_parameters *p)
6209{ 6203{
6204 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
6205 u32 delsys = p->delivery_system, old_delsys;
6210 struct drxk_state *state = fe->demodulator_priv; 6206 struct drxk_state *state = fe->demodulator_priv;
6211 u32 IF; 6207 u32 IF;
6212 6208
@@ -6218,14 +6214,39 @@ static int drxk_set_parameters(struct dvb_frontend *fe,
6218 return -EINVAL; 6214 return -EINVAL;
6219 } 6215 }
6220 6216
6221
6222 if (fe->ops.i2c_gate_ctrl) 6217 if (fe->ops.i2c_gate_ctrl)
6223 fe->ops.i2c_gate_ctrl(fe, 1); 6218 fe->ops.i2c_gate_ctrl(fe, 1);
6224 if (fe->ops.tuner_ops.set_params) 6219 if (fe->ops.tuner_ops.set_params)
6225 fe->ops.tuner_ops.set_params(fe, p); 6220 fe->ops.tuner_ops.set_params(fe);
6226 if (fe->ops.i2c_gate_ctrl) 6221 if (fe->ops.i2c_gate_ctrl)
6227 fe->ops.i2c_gate_ctrl(fe, 0); 6222 fe->ops.i2c_gate_ctrl(fe, 0);
6228 state->param = *p; 6223
6224 old_delsys = state->props.delivery_system;
6225 state->props = *p;
6226
6227 if (old_delsys != delsys) {
6228 ShutDown(state);
6229 switch (delsys) {
6230 case SYS_DVBC_ANNEX_A:
6231 case SYS_DVBC_ANNEX_C:
6232 if (!state->m_hasDVBC)
6233 return -EINVAL;
6234 state->m_itut_annex_c = (delsys == SYS_DVBC_ANNEX_C) ? true : false;
6235 if (state->m_itut_annex_c)
6236 SetOperationMode(state, OM_QAM_ITU_C);
6237 else
6238 SetOperationMode(state, OM_QAM_ITU_A);
6239 break;
6240 case SYS_DVBT:
6241 if (!state->m_hasDVBT)
6242 return -EINVAL;
6243 SetOperationMode(state, OM_DVBT);
6244 break;
6245 default:
6246 return -EINVAL;
6247 }
6248 }
6249
6229 fe->ops.tuner_ops.get_if_frequency(fe, &IF); 6250 fe->ops.tuner_ops.get_if_frequency(fe, &IF);
6230 Start(state, 0, IF); 6251 Start(state, 0, IF);
6231 6252
@@ -6234,13 +6255,6 @@ static int drxk_set_parameters(struct dvb_frontend *fe,
6234 return 0; 6255 return 0;
6235} 6256}
6236 6257
6237static int drxk_c_get_frontend(struct dvb_frontend *fe,
6238 struct dvb_frontend_parameters *p)
6239{
6240 dprintk(1, "\n");
6241 return 0;
6242}
6243
6244static int drxk_read_status(struct dvb_frontend *fe, fe_status_t *status) 6258static int drxk_read_status(struct dvb_frontend *fe, fe_status_t *status)
6245{ 6259{
6246 struct drxk_state *state = fe->demodulator_priv; 6260 struct drxk_state *state = fe->demodulator_priv;
@@ -6300,102 +6314,54 @@ static int drxk_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
6300 return 0; 6314 return 0;
6301} 6315}
6302 6316
6303static int drxk_c_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings 6317static int drxk_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings
6304 *sets) 6318 *sets)
6305{ 6319{
6306 dprintk(1, "\n"); 6320 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
6307 sets->min_delay_ms = 3000;
6308 sets->max_drift = 0;
6309 sets->step_size = 0;
6310 return 0;
6311}
6312
6313static void drxk_t_release(struct dvb_frontend *fe)
6314{
6315 /*
6316 * There's nothing to release here, as the state struct
6317 * is already freed by drxk_c_release.
6318 */
6319}
6320
6321static int drxk_t_init(struct dvb_frontend *fe)
6322{
6323 struct drxk_state *state = fe->demodulator_priv;
6324 6321
6325 dprintk(1, "\n"); 6322 dprintk(1, "\n");
6326 if (mutex_trylock(&state->ctlock) == 0) 6323 switch (p->delivery_system) {
6327 return -EBUSY; 6324 case SYS_DVBC_ANNEX_A:
6328 SetOperationMode(state, OM_DVBT); 6325 case SYS_DVBC_ANNEX_C:
6329 return 0; 6326 sets->min_delay_ms = 3000;
6330} 6327 sets->max_drift = 0;
6331 6328 sets->step_size = 0;
6332static int drxk_t_sleep(struct dvb_frontend *fe) 6329 return 0;
6333{ 6330 default:
6334 struct drxk_state *state = fe->demodulator_priv; 6331 /*
6335 6332 * For DVB-T, let it use the default DVB core way, that is:
6336 dprintk(1, "\n"); 6333 * fepriv->step_size = fe->ops.info.frequency_stepsize * 2
6337 mutex_unlock(&state->ctlock); 6334 */
6338 return 0; 6335 return -EINVAL;
6339} 6336 }
6340
6341static int drxk_t_get_frontend(struct dvb_frontend *fe,
6342 struct dvb_frontend_parameters *p)
6343{
6344 dprintk(1, "\n");
6345
6346 return 0;
6347} 6337}
6348 6338
6349static struct dvb_frontend_ops drxk_c_ops = { 6339static struct dvb_frontend_ops drxk_ops = {
6340 /* .delsys will be filled dynamically */
6350 .info = { 6341 .info = {
6351 .name = "DRXK DVB-C", 6342 .name = "DRXK",
6352 .type = FE_QAM, 6343 .frequency_min = 47000000,
6353 .frequency_stepsize = 62500, 6344 .frequency_max = 865000000,
6354 .frequency_min = 47000000, 6345 /* For DVB-C */
6355 .frequency_max = 862000000, 6346 .symbol_rate_min = 870000,
6356 .symbol_rate_min = 870000, 6347 .symbol_rate_max = 11700000,
6357 .symbol_rate_max = 11700000, 6348 /* For DVB-T */
6358 .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | 6349 .frequency_stepsize = 166667,
6359 FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_FEC_AUTO}, 6350
6360 .release = drxk_c_release, 6351 .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
6361 .init = drxk_c_init, 6352 FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_FEC_AUTO |
6362 .sleep = drxk_c_sleep, 6353 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
6354 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_MUTE_TS |
6355 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER |
6356 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO
6357 },
6358
6359 .release = drxk_release,
6360 .sleep = drxk_sleep,
6363 .i2c_gate_ctrl = drxk_gate_ctrl, 6361 .i2c_gate_ctrl = drxk_gate_ctrl,
6364 6362
6365 .set_frontend = drxk_set_parameters, 6363 .set_frontend = drxk_set_parameters,
6366 .get_frontend = drxk_c_get_frontend, 6364 .get_tune_settings = drxk_get_tune_settings,
6367 .get_tune_settings = drxk_c_get_tune_settings,
6368
6369 .read_status = drxk_read_status,
6370 .read_ber = drxk_read_ber,
6371 .read_signal_strength = drxk_read_signal_strength,
6372 .read_snr = drxk_read_snr,
6373 .read_ucblocks = drxk_read_ucblocks,
6374};
6375
6376static struct dvb_frontend_ops drxk_t_ops = {
6377 .info = {
6378 .name = "DRXK DVB-T",
6379 .type = FE_OFDM,
6380 .frequency_min = 47125000,
6381 .frequency_max = 865000000,
6382 .frequency_stepsize = 166667,
6383 .frequency_tolerance = 0,
6384 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
6385 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
6386 FE_CAN_FEC_AUTO |
6387 FE_CAN_QAM_16 | FE_CAN_QAM_64 |
6388 FE_CAN_QAM_AUTO |
6389 FE_CAN_TRANSMISSION_MODE_AUTO |
6390 FE_CAN_GUARD_INTERVAL_AUTO |
6391 FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER | FE_CAN_MUTE_TS},
6392 .release = drxk_t_release,
6393 .init = drxk_t_init,
6394 .sleep = drxk_t_sleep,
6395 .i2c_gate_ctrl = drxk_gate_ctrl,
6396
6397 .set_frontend = drxk_set_parameters,
6398 .get_frontend = drxk_t_get_frontend,
6399 6365
6400 .read_status = drxk_read_status, 6366 .read_status = drxk_read_status,
6401 .read_ber = drxk_read_ber, 6367 .read_ber = drxk_read_ber,
@@ -6405,9 +6371,10 @@ static struct dvb_frontend_ops drxk_t_ops = {
6405}; 6371};
6406 6372
6407struct dvb_frontend *drxk_attach(const struct drxk_config *config, 6373struct dvb_frontend *drxk_attach(const struct drxk_config *config,
6408 struct i2c_adapter *i2c, 6374 struct i2c_adapter *i2c)
6409 struct dvb_frontend **fe_t)
6410{ 6375{
6376 int n;
6377
6411 struct drxk_state *state = NULL; 6378 struct drxk_state *state = NULL;
6412 u8 adr = config->adr; 6379 u8 adr = config->adr;
6413 6380
@@ -6423,6 +6390,12 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
6423 state->no_i2c_bridge = config->no_i2c_bridge; 6390 state->no_i2c_bridge = config->no_i2c_bridge;
6424 state->antenna_gpio = config->antenna_gpio; 6391 state->antenna_gpio = config->antenna_gpio;
6425 state->antenna_dvbt = config->antenna_dvbt; 6392 state->antenna_dvbt = config->antenna_dvbt;
6393 state->m_ChunkSize = config->chunk_size;
6394
6395 if (config->parallel_ts)
6396 state->m_enableParallel = true;
6397 else
6398 state->m_enableParallel = false;
6426 6399
6427 /* NOTE: as more UIO bits will be used, add them to the mask */ 6400 /* NOTE: as more UIO bits will be used, add them to the mask */
6428 state->UIO_mask = config->antenna_gpio; 6401 state->UIO_mask = config->antenna_gpio;
@@ -6434,21 +6407,30 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
6434 state->m_GPIO &= ~state->antenna_gpio; 6407 state->m_GPIO &= ~state->antenna_gpio;
6435 6408
6436 mutex_init(&state->mutex); 6409 mutex_init(&state->mutex);
6437 mutex_init(&state->ctlock);
6438 6410
6439 memcpy(&state->c_frontend.ops, &drxk_c_ops, 6411 memcpy(&state->frontend.ops, &drxk_ops, sizeof(drxk_ops));
6440 sizeof(struct dvb_frontend_ops)); 6412 state->frontend.demodulator_priv = state;
6441 memcpy(&state->t_frontend.ops, &drxk_t_ops,
6442 sizeof(struct dvb_frontend_ops));
6443 state->c_frontend.demodulator_priv = state;
6444 state->t_frontend.demodulator_priv = state;
6445 6413
6446 init_state(state); 6414 init_state(state);
6447 if (init_drxk(state) < 0) 6415 if (init_drxk(state) < 0)
6448 goto error; 6416 goto error;
6449 *fe_t = &state->t_frontend;
6450 6417
6451 return &state->c_frontend; 6418 /* Initialize the supported delivery systems */
6419 n = 0;
6420 if (state->m_hasDVBC) {
6421 state->frontend.ops.delsys[n++] = SYS_DVBC_ANNEX_A;
6422 state->frontend.ops.delsys[n++] = SYS_DVBC_ANNEX_C;
6423 strlcat(state->frontend.ops.info.name, " DVB-C",
6424 sizeof(state->frontend.ops.info.name));
6425 }
6426 if (state->m_hasDVBT) {
6427 state->frontend.ops.delsys[n++] = SYS_DVBT;
6428 strlcat(state->frontend.ops.info.name, " DVB-T",
6429 sizeof(state->frontend.ops.info.name));
6430 }
6431
6432 printk(KERN_INFO "drxk: frontend initialized.\n");
6433 return &state->frontend;
6452 6434
6453error: 6435error:
6454 printk(KERN_ERR "drxk: not found\n"); 6436 printk(KERN_ERR "drxk: not found\n");
diff --git a/drivers/media/dvb/frontends/drxk_hard.h b/drivers/media/dvb/frontends/drxk_hard.h
index a05c32eecdc..3a58b73eb9b 100644
--- a/drivers/media/dvb/frontends/drxk_hard.h
+++ b/drivers/media/dvb/frontends/drxk_hard.h
@@ -195,9 +195,8 @@ struct DRXKOfdmScCmd_t {
195}; 195};
196 196
197struct drxk_state { 197struct drxk_state {
198 struct dvb_frontend c_frontend; 198 struct dvb_frontend frontend;
199 struct dvb_frontend t_frontend; 199 struct dtv_frontend_properties props;
200 struct dvb_frontend_parameters param;
201 struct device *dev; 200 struct device *dev;
202 201
203 struct i2c_adapter *i2c; 202 struct i2c_adapter *i2c;
@@ -205,7 +204,6 @@ struct drxk_state {
205 void *priv; 204 void *priv;
206 205
207 struct mutex mutex; 206 struct mutex mutex;
208 struct mutex ctlock;
209 207
210 u32 m_Instance; /**< Channel 1,2,3 or 4 */ 208 u32 m_Instance; /**< Channel 1,2,3 or 4 */
211 209
@@ -263,6 +261,8 @@ struct drxk_state {
263 u8 m_TSDataStrength; 261 u8 m_TSDataStrength;
264 u8 m_TSClockkStrength; 262 u8 m_TSClockkStrength;
265 263
264 bool m_itut_annex_c; /* If true, uses ITU-T DVB-C Annex C, instead of Annex A */
265
266 enum DRXMPEGStrWidth_t m_widthSTR; /**< MPEG start width */ 266 enum DRXMPEGStrWidth_t m_widthSTR; /**< MPEG start width */
267 u32 m_mpegTsStaticBitrate; /**< Maximum bitrate in b/s in case 267 u32 m_mpegTsStaticBitrate; /**< Maximum bitrate in b/s in case
268 static clockrate is selected */ 268 static clockrate is selected */
diff --git a/drivers/media/dvb/frontends/ds3000.c b/drivers/media/dvb/frontends/ds3000.c
index 90bf573308b..938777065de 100644
--- a/drivers/media/dvb/frontends/ds3000.c
+++ b/drivers/media/dvb/frontends/ds3000.c
@@ -934,20 +934,6 @@ error2:
934} 934}
935EXPORT_SYMBOL(ds3000_attach); 935EXPORT_SYMBOL(ds3000_attach);
936 936
937static int ds3000_set_property(struct dvb_frontend *fe,
938 struct dtv_property *tvp)
939{
940 dprintk("%s(..)\n", __func__);
941 return 0;
942}
943
944static int ds3000_get_property(struct dvb_frontend *fe,
945 struct dtv_property *tvp)
946{
947 dprintk("%s(..)\n", __func__);
948 return 0;
949}
950
951static int ds3000_set_carrier_offset(struct dvb_frontend *fe, 937static int ds3000_set_carrier_offset(struct dvb_frontend *fe,
952 s32 carrier_offset_khz) 938 s32 carrier_offset_khz)
953{ 939{
@@ -967,8 +953,7 @@ static int ds3000_set_carrier_offset(struct dvb_frontend *fe,
967 return 0; 953 return 0;
968} 954}
969 955
970static int ds3000_set_frontend(struct dvb_frontend *fe, 956static int ds3000_set_frontend(struct dvb_frontend *fe)
971 struct dvb_frontend_parameters *p)
972{ 957{
973 struct ds3000_state *state = fe->demodulator_priv; 958 struct ds3000_state *state = fe->demodulator_priv;
974 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 959 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
@@ -994,15 +979,15 @@ static int ds3000_set_frontend(struct dvb_frontend *fe,
994 div4 = 0; 979 div4 = 0;
995 980
996 /* calculate and set freq divider */ 981 /* calculate and set freq divider */
997 if (p->frequency < 1146000) { 982 if (c->frequency < 1146000) {
998 ds3000_tuner_writereg(state, 0x10, 0x11); 983 ds3000_tuner_writereg(state, 0x10, 0x11);
999 div4 = 1; 984 div4 = 1;
1000 ndiv = ((p->frequency * (6 + 8) * 4) + 985 ndiv = ((c->frequency * (6 + 8) * 4) +
1001 (DS3000_XTAL_FREQ / 2)) / 986 (DS3000_XTAL_FREQ / 2)) /
1002 DS3000_XTAL_FREQ - 1024; 987 DS3000_XTAL_FREQ - 1024;
1003 } else { 988 } else {
1004 ds3000_tuner_writereg(state, 0x10, 0x01); 989 ds3000_tuner_writereg(state, 0x10, 0x01);
1005 ndiv = ((p->frequency * (6 + 8) * 2) + 990 ndiv = ((c->frequency * (6 + 8) * 2) +
1006 (DS3000_XTAL_FREQ / 2)) / 991 (DS3000_XTAL_FREQ / 2)) /
1007 DS3000_XTAL_FREQ - 1024; 992 DS3000_XTAL_FREQ - 1024;
1008 } 993 }
@@ -1101,7 +1086,7 @@ static int ds3000_set_frontend(struct dvb_frontend *fe,
1101 msleep(60); 1086 msleep(60);
1102 1087
1103 offset_khz = (ndiv - ndiv % 2 + 1024) * DS3000_XTAL_FREQ 1088 offset_khz = (ndiv - ndiv % 2 + 1024) * DS3000_XTAL_FREQ
1104 / (6 + 8) / (div4 + 1) / 2 - p->frequency; 1089 / (6 + 8) / (div4 + 1) / 2 - c->frequency;
1105 1090
1106 /* ds3000 global reset */ 1091 /* ds3000 global reset */
1107 ds3000_writereg(state, 0x07, 0x80); 1092 ds3000_writereg(state, 0x07, 0x80);
@@ -1220,13 +1205,13 @@ static int ds3000_set_frontend(struct dvb_frontend *fe,
1220} 1205}
1221 1206
1222static int ds3000_tune(struct dvb_frontend *fe, 1207static int ds3000_tune(struct dvb_frontend *fe,
1223 struct dvb_frontend_parameters *p, 1208 bool re_tune,
1224 unsigned int mode_flags, 1209 unsigned int mode_flags,
1225 unsigned int *delay, 1210 unsigned int *delay,
1226 fe_status_t *status) 1211 fe_status_t *status)
1227{ 1212{
1228 if (p) { 1213 if (re_tune) {
1229 int ret = ds3000_set_frontend(fe, p); 1214 int ret = ds3000_set_frontend(fe);
1230 if (ret) 1215 if (ret)
1231 return ret; 1216 return ret;
1232 } 1217 }
@@ -1279,10 +1264,9 @@ static int ds3000_sleep(struct dvb_frontend *fe)
1279} 1264}
1280 1265
1281static struct dvb_frontend_ops ds3000_ops = { 1266static struct dvb_frontend_ops ds3000_ops = {
1282 1267 .delsys = { SYS_DVBS, SYS_DVBS2},
1283 .info = { 1268 .info = {
1284 .name = "Montage Technology DS3000/TS2020", 1269 .name = "Montage Technology DS3000/TS2020",
1285 .type = FE_QPSK,
1286 .frequency_min = 950000, 1270 .frequency_min = 950000,
1287 .frequency_max = 2150000, 1271 .frequency_max = 2150000,
1288 .frequency_stepsize = 1011, /* kHz for QPSK frontends */ 1272 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
@@ -1312,8 +1296,6 @@ static struct dvb_frontend_ops ds3000_ops = {
1312 .diseqc_send_burst = ds3000_diseqc_send_burst, 1296 .diseqc_send_burst = ds3000_diseqc_send_burst,
1313 .get_frontend_algo = ds3000_get_algo, 1297 .get_frontend_algo = ds3000_get_algo,
1314 1298
1315 .set_property = ds3000_set_property,
1316 .get_property = ds3000_get_property,
1317 .set_frontend = ds3000_set_frontend, 1299 .set_frontend = ds3000_set_frontend,
1318 .tune = ds3000_tune, 1300 .tune = ds3000_tune,
1319}; 1301};
diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c
index 62a65efdf8d..1ab34838221 100644
--- a/drivers/media/dvb/frontends/dvb-pll.c
+++ b/drivers/media/dvb/frontends/dvb-pll.c
@@ -61,8 +61,7 @@ struct dvb_pll_desc {
61 u32 min; 61 u32 min;
62 u32 max; 62 u32 max;
63 u32 iffreq; 63 u32 iffreq;
64 void (*set)(struct dvb_frontend *fe, u8 *buf, 64 void (*set)(struct dvb_frontend *fe, u8 *buf);
65 const struct dvb_frontend_parameters *params);
66 u8 *initdata; 65 u8 *initdata;
67 u8 *initdata2; 66 u8 *initdata2;
68 u8 *sleepdata; 67 u8 *sleepdata;
@@ -93,10 +92,10 @@ static struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
93 }, 92 },
94}; 93};
95 94
96static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf, 95static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf)
97 const struct dvb_frontend_parameters *params)
98{ 96{
99 if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth) 97 u32 bw = fe->dtv_property_cache.bandwidth_hz;
98 if (bw == 7000000)
100 buf[3] |= 0x10; 99 buf[3] |= 0x10;
101} 100}
102 101
@@ -186,10 +185,10 @@ static struct dvb_pll_desc dvb_pll_env57h1xd5 = {
186/* Philips TDA6650/TDA6651 185/* Philips TDA6650/TDA6651
187 * used in Panasonic ENV77H11D5 186 * used in Panasonic ENV77H11D5
188 */ 187 */
189static void tda665x_bw(struct dvb_frontend *fe, u8 *buf, 188static void tda665x_bw(struct dvb_frontend *fe, u8 *buf)
190 const struct dvb_frontend_parameters *params)
191{ 189{
192 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 190 u32 bw = fe->dtv_property_cache.bandwidth_hz;
191 if (bw == 8000000)
193 buf[3] |= 0x08; 192 buf[3] |= 0x08;
194} 193}
195 194
@@ -220,10 +219,10 @@ static struct dvb_pll_desc dvb_pll_tda665x = {
220/* Infineon TUA6034 219/* Infineon TUA6034
221 * used in LG TDTP E102P 220 * used in LG TDTP E102P
222 */ 221 */
223static void tua6034_bw(struct dvb_frontend *fe, u8 *buf, 222static void tua6034_bw(struct dvb_frontend *fe, u8 *buf)
224 const struct dvb_frontend_parameters *params)
225{ 223{
226 if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth) 224 u32 bw = fe->dtv_property_cache.bandwidth_hz;
225 if (bw == 7000000)
227 buf[3] |= 0x08; 226 buf[3] |= 0x08;
228} 227}
229 228
@@ -244,10 +243,10 @@ static struct dvb_pll_desc dvb_pll_tua6034 = {
244/* ALPS TDED4 243/* ALPS TDED4
245 * used in Nebula-Cards and USB boxes 244 * used in Nebula-Cards and USB boxes
246 */ 245 */
247static void tded4_bw(struct dvb_frontend *fe, u8 *buf, 246static void tded4_bw(struct dvb_frontend *fe, u8 *buf)
248 const struct dvb_frontend_parameters *params)
249{ 247{
250 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 248 u32 bw = fe->dtv_property_cache.bandwidth_hz;
249 if (bw == 8000000)
251 buf[3] |= 0x04; 250 buf[3] |= 0x04;
252} 251}
253 252
@@ -319,11 +318,11 @@ static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
319 }, 318 },
320}; 319};
321 320
322static void opera1_bw(struct dvb_frontend *fe, u8 *buf, 321static void opera1_bw(struct dvb_frontend *fe, u8 *buf)
323 const struct dvb_frontend_parameters *params)
324{ 322{
323 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
325 struct dvb_pll_priv *priv = fe->tuner_priv; 324 struct dvb_pll_priv *priv = fe->tuner_priv;
326 u32 b_w = (params->u.qpsk.symbol_rate * 27) / 32000; 325 u32 b_w = (c->symbol_rate * 27) / 32000;
327 struct i2c_msg msg = { 326 struct i2c_msg msg = {
328 .addr = priv->pll_i2c_address, 327 .addr = priv->pll_i2c_address,
329 .flags = 0, 328 .flags = 0,
@@ -392,8 +391,7 @@ static struct dvb_pll_desc dvb_pll_opera1 = {
392 } 391 }
393}; 392};
394 393
395static void samsung_dtos403ih102a_set(struct dvb_frontend *fe, u8 *buf, 394static void samsung_dtos403ih102a_set(struct dvb_frontend *fe, u8 *buf)
396 const struct dvb_frontend_parameters *params)
397{ 395{
398 struct dvb_pll_priv *priv = fe->tuner_priv; 396 struct dvb_pll_priv *priv = fe->tuner_priv;
399 struct i2c_msg msg = { 397 struct i2c_msg msg = {
@@ -537,30 +535,29 @@ static struct dvb_pll_desc *pll_list[] = {
537/* code */ 535/* code */
538 536
539static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf, 537static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
540 const struct dvb_frontend_parameters *params) 538 const u32 frequency)
541{ 539{
542 struct dvb_pll_priv *priv = fe->tuner_priv; 540 struct dvb_pll_priv *priv = fe->tuner_priv;
543 struct dvb_pll_desc *desc = priv->pll_desc; 541 struct dvb_pll_desc *desc = priv->pll_desc;
544 u32 div; 542 u32 div;
545 int i; 543 int i;
546 544
547 if (params->frequency != 0 && (params->frequency < desc->min || 545 if (frequency && (frequency < desc->min || frequency > desc->max))
548 params->frequency > desc->max))
549 return -EINVAL; 546 return -EINVAL;
550 547
551 for (i = 0; i < desc->count; i++) { 548 for (i = 0; i < desc->count; i++) {
552 if (params->frequency > desc->entries[i].limit) 549 if (frequency > desc->entries[i].limit)
553 continue; 550 continue;
554 break; 551 break;
555 } 552 }
556 553
557 if (debug) 554 if (debug)
558 printk("pll: %s: freq=%d | i=%d/%d\n", desc->name, 555 printk("pll: %s: freq=%d | i=%d/%d\n", desc->name,
559 params->frequency, i, desc->count); 556 frequency, i, desc->count);
560 if (i == desc->count) 557 if (i == desc->count)
561 return -EINVAL; 558 return -EINVAL;
562 559
563 div = (params->frequency + desc->iffreq + 560 div = (frequency + desc->iffreq +
564 desc->entries[i].stepsize/2) / desc->entries[i].stepsize; 561 desc->entries[i].stepsize/2) / desc->entries[i].stepsize;
565 buf[0] = div >> 8; 562 buf[0] = div >> 8;
566 buf[1] = div & 0xff; 563 buf[1] = div & 0xff;
@@ -568,7 +565,7 @@ static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
568 buf[3] = desc->entries[i].cb; 565 buf[3] = desc->entries[i].cb;
569 566
570 if (desc->set) 567 if (desc->set)
571 desc->set(fe, buf, params); 568 desc->set(fe, buf);
572 569
573 if (debug) 570 if (debug)
574 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", 571 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
@@ -611,9 +608,9 @@ static int dvb_pll_sleep(struct dvb_frontend *fe)
611 return -EINVAL; 608 return -EINVAL;
612} 609}
613 610
614static int dvb_pll_set_params(struct dvb_frontend *fe, 611static int dvb_pll_set_params(struct dvb_frontend *fe)
615 struct dvb_frontend_parameters *params)
616{ 612{
613 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
617 struct dvb_pll_priv *priv = fe->tuner_priv; 614 struct dvb_pll_priv *priv = fe->tuner_priv;
618 u8 buf[4]; 615 u8 buf[4];
619 struct i2c_msg msg = 616 struct i2c_msg msg =
@@ -625,7 +622,8 @@ static int dvb_pll_set_params(struct dvb_frontend *fe,
625 if (priv->i2c == NULL) 622 if (priv->i2c == NULL)
626 return -EINVAL; 623 return -EINVAL;
627 624
628 if ((result = dvb_pll_configure(fe, buf, params)) < 0) 625 result = dvb_pll_configure(fe, buf, c->frequency);
626 if (result < 0)
629 return result; 627 return result;
630 else 628 else
631 frequency = result; 629 frequency = result;
@@ -637,15 +635,15 @@ static int dvb_pll_set_params(struct dvb_frontend *fe,
637 } 635 }
638 636
639 priv->frequency = frequency; 637 priv->frequency = frequency;
640 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; 638 priv->bandwidth = c->bandwidth_hz;
641 639
642 return 0; 640 return 0;
643} 641}
644 642
645static int dvb_pll_calc_regs(struct dvb_frontend *fe, 643static int dvb_pll_calc_regs(struct dvb_frontend *fe,
646 struct dvb_frontend_parameters *params,
647 u8 *buf, int buf_len) 644 u8 *buf, int buf_len)
648{ 645{
646 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
649 struct dvb_pll_priv *priv = fe->tuner_priv; 647 struct dvb_pll_priv *priv = fe->tuner_priv;
650 int result; 648 int result;
651 u32 frequency = 0; 649 u32 frequency = 0;
@@ -653,7 +651,8 @@ static int dvb_pll_calc_regs(struct dvb_frontend *fe,
653 if (buf_len < 5) 651 if (buf_len < 5)
654 return -EINVAL; 652 return -EINVAL;
655 653
656 if ((result = dvb_pll_configure(fe, buf+1, params)) < 0) 654 result = dvb_pll_configure(fe, buf + 1, c->frequency);
655 if (result < 0)
657 return result; 656 return result;
658 else 657 else
659 frequency = result; 658 frequency = result;
@@ -661,7 +660,7 @@ static int dvb_pll_calc_regs(struct dvb_frontend *fe,
661 buf[0] = priv->pll_i2c_address; 660 buf[0] = priv->pll_i2c_address;
662 661
663 priv->frequency = frequency; 662 priv->frequency = frequency;
664 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; 663 priv->bandwidth = c->bandwidth_hz;
665 664
666 return 5; 665 return 5;
667} 666}
diff --git a/drivers/media/dvb/frontends/dvb_dummy_fe.c b/drivers/media/dvb/frontends/dvb_dummy_fe.c
index a7fc7e53a55..dcfc902c867 100644
--- a/drivers/media/dvb/frontends/dvb_dummy_fe.c
+++ b/drivers/media/dvb/frontends/dvb_dummy_fe.c
@@ -68,15 +68,18 @@ static int dvb_dummy_fe_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
68 return 0; 68 return 0;
69} 69}
70 70
71static int dvb_dummy_fe_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 71/*
72 * Only needed if it actually reads something from the hardware
73 */
74static int dvb_dummy_fe_get_frontend(struct dvb_frontend *fe)
72{ 75{
73 return 0; 76 return 0;
74} 77}
75 78
76static int dvb_dummy_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 79static int dvb_dummy_fe_set_frontend(struct dvb_frontend *fe)
77{ 80{
78 if (fe->ops.tuner_ops.set_params) { 81 if (fe->ops.tuner_ops.set_params) {
79 fe->ops.tuner_ops.set_params(fe, p); 82 fe->ops.tuner_ops.set_params(fe);
80 if (fe->ops.i2c_gate_ctrl) 83 if (fe->ops.i2c_gate_ctrl)
81 fe->ops.i2c_gate_ctrl(fe, 0); 84 fe->ops.i2c_gate_ctrl(fe, 0);
82 } 85 }
@@ -171,10 +174,9 @@ error:
171} 174}
172 175
173static struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops = { 176static struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops = {
174 177 .delsys = { SYS_DVBT },
175 .info = { 178 .info = {
176 .name = "Dummy DVB-T", 179 .name = "Dummy DVB-T",
177 .type = FE_OFDM,
178 .frequency_min = 0, 180 .frequency_min = 0,
179 .frequency_max = 863250000, 181 .frequency_max = 863250000,
180 .frequency_stepsize = 62500, 182 .frequency_stepsize = 62500,
@@ -203,10 +205,9 @@ static struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops = {
203}; 205};
204 206
205static struct dvb_frontend_ops dvb_dummy_fe_qam_ops = { 207static struct dvb_frontend_ops dvb_dummy_fe_qam_ops = {
206 208 .delsys = { SYS_DVBC_ANNEX_A },
207 .info = { 209 .info = {
208 .name = "Dummy DVB-C", 210 .name = "Dummy DVB-C",
209 .type = FE_QAM,
210 .frequency_stepsize = 62500, 211 .frequency_stepsize = 62500,
211 .frequency_min = 51000000, 212 .frequency_min = 51000000,
212 .frequency_max = 858000000, 213 .frequency_max = 858000000,
@@ -233,10 +234,9 @@ static struct dvb_frontend_ops dvb_dummy_fe_qam_ops = {
233}; 234};
234 235
235static struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops = { 236static struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops = {
236 237 .delsys = { SYS_DVBS },
237 .info = { 238 .info = {
238 .name = "Dummy DVB-S", 239 .name = "Dummy DVB-S",
239 .type = FE_QPSK,
240 .frequency_min = 950000, 240 .frequency_min = 950000,
241 .frequency_max = 2150000, 241 .frequency_max = 2150000,
242 .frequency_stepsize = 250, /* kHz for QPSK frontends */ 242 .frequency_stepsize = 250, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/ec100.c b/drivers/media/dvb/frontends/ec100.c
index 2414dc6ee5d..c56fddbf53b 100644
--- a/drivers/media/dvb/frontends/ec100.c
+++ b/drivers/media/dvb/frontends/ec100.c
@@ -76,19 +76,19 @@ static int ec100_read_reg(struct ec100_state *state, u8 reg, u8 *val)
76 return 0; 76 return 0;
77} 77}
78 78
79static int ec100_set_frontend(struct dvb_frontend *fe, 79static int ec100_set_frontend(struct dvb_frontend *fe)
80 struct dvb_frontend_parameters *params)
81{ 80{
81 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
82 struct ec100_state *state = fe->demodulator_priv; 82 struct ec100_state *state = fe->demodulator_priv;
83 int ret; 83 int ret;
84 u8 tmp, tmp2; 84 u8 tmp, tmp2;
85 85
86 deb_info("%s: freq:%d bw:%d\n", __func__, params->frequency, 86 deb_info("%s: freq:%d bw:%d\n", __func__, c->frequency,
87 params->u.ofdm.bandwidth); 87 c->bandwidth_hz);
88 88
89 /* program tuner */ 89 /* program tuner */
90 if (fe->ops.tuner_ops.set_params) 90 if (fe->ops.tuner_ops.set_params)
91 fe->ops.tuner_ops.set_params(fe, params); 91 fe->ops.tuner_ops.set_params(fe);
92 92
93 ret = ec100_write_reg(state, 0x04, 0x06); 93 ret = ec100_write_reg(state, 0x04, 0x06);
94 if (ret) 94 if (ret)
@@ -108,16 +108,16 @@ static int ec100_set_frontend(struct dvb_frontend *fe,
108 B 0x1b | 0xb7 | 0x00 | 0x49 108 B 0x1b | 0xb7 | 0x00 | 0x49
109 B 0x1c | 0x55 | 0x64 | 0x72 */ 109 B 0x1c | 0x55 | 0x64 | 0x72 */
110 110
111 switch (params->u.ofdm.bandwidth) { 111 switch (c->bandwidth_hz) {
112 case BANDWIDTH_6_MHZ: 112 case 6000000:
113 tmp = 0xb7; 113 tmp = 0xb7;
114 tmp2 = 0x55; 114 tmp2 = 0x55;
115 break; 115 break;
116 case BANDWIDTH_7_MHZ: 116 case 7000000:
117 tmp = 0x00; 117 tmp = 0x00;
118 tmp2 = 0x64; 118 tmp2 = 0x64;
119 break; 119 break;
120 case BANDWIDTH_8_MHZ: 120 case 8000000:
121 default: 121 default:
122 tmp = 0x49; 122 tmp = 0x49;
123 tmp2 = 0x72; 123 tmp2 = 0x72;
@@ -306,9 +306,9 @@ error:
306EXPORT_SYMBOL(ec100_attach); 306EXPORT_SYMBOL(ec100_attach);
307 307
308static struct dvb_frontend_ops ec100_ops = { 308static struct dvb_frontend_ops ec100_ops = {
309 .delsys = { SYS_DVBT },
309 .info = { 310 .info = {
310 .name = "E3C EC100 DVB-T", 311 .name = "E3C EC100 DVB-T",
311 .type = FE_OFDM,
312 .caps = 312 .caps =
313 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 313 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
314 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 314 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
diff --git a/drivers/media/dvb/frontends/hd29l2.c b/drivers/media/dvb/frontends/hd29l2.c
new file mode 100644
index 00000000000..a0031819083
--- /dev/null
+++ b/drivers/media/dvb/frontends/hd29l2.c
@@ -0,0 +1,861 @@
1/*
2 * HDIC HD29L2 DMB-TH demodulator driver
3 *
4 * Copyright (C) 2011 Metropolia University of Applied Sciences, Electria R&D
5 *
6 * Author: Antti Palosaari <crope@iki.fi>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include "hd29l2_priv.h"
24
25int hd29l2_debug;
26module_param_named(debug, hd29l2_debug, int, 0644);
27MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
28
29/* write multiple registers */
30static int hd29l2_wr_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len)
31{
32 int ret;
33 u8 buf[2 + len];
34 struct i2c_msg msg[1] = {
35 {
36 .addr = priv->cfg.i2c_addr,
37 .flags = 0,
38 .len = sizeof(buf),
39 .buf = buf,
40 }
41 };
42
43 buf[0] = 0x00;
44 buf[1] = reg;
45 memcpy(&buf[2], val, len);
46
47 ret = i2c_transfer(priv->i2c, msg, 1);
48 if (ret == 1) {
49 ret = 0;
50 } else {
51 warn("i2c wr failed=%d reg=%02x len=%d", ret, reg, len);
52 ret = -EREMOTEIO;
53 }
54
55 return ret;
56}
57
58/* read multiple registers */
59static int hd29l2_rd_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len)
60{
61 int ret;
62 u8 buf[2] = { 0x00, reg };
63 struct i2c_msg msg[2] = {
64 {
65 .addr = priv->cfg.i2c_addr,
66 .flags = 0,
67 .len = 2,
68 .buf = buf,
69 }, {
70 .addr = priv->cfg.i2c_addr,
71 .flags = I2C_M_RD,
72 .len = len,
73 .buf = val,
74 }
75 };
76
77 ret = i2c_transfer(priv->i2c, msg, 2);
78 if (ret == 2) {
79 ret = 0;
80 } else {
81 warn("i2c rd failed=%d reg=%02x len=%d", ret, reg, len);
82 ret = -EREMOTEIO;
83 }
84
85 return ret;
86}
87
88/* write single register */
89static int hd29l2_wr_reg(struct hd29l2_priv *priv, u8 reg, u8 val)
90{
91 return hd29l2_wr_regs(priv, reg, &val, 1);
92}
93
94/* read single register */
95static int hd29l2_rd_reg(struct hd29l2_priv *priv, u8 reg, u8 *val)
96{
97 return hd29l2_rd_regs(priv, reg, val, 1);
98}
99
100/* write single register with mask */
101static int hd29l2_wr_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 val, u8 mask)
102{
103 int ret;
104 u8 tmp;
105
106 /* no need for read if whole reg is written */
107 if (mask != 0xff) {
108 ret = hd29l2_rd_regs(priv, reg, &tmp, 1);
109 if (ret)
110 return ret;
111
112 val &= mask;
113 tmp &= ~mask;
114 val |= tmp;
115 }
116
117 return hd29l2_wr_regs(priv, reg, &val, 1);
118}
119
120/* read single register with mask */
121int hd29l2_rd_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 *val, u8 mask)
122{
123 int ret, i;
124 u8 tmp;
125
126 ret = hd29l2_rd_regs(priv, reg, &tmp, 1);
127 if (ret)
128 return ret;
129
130 tmp &= mask;
131
132 /* find position of the first bit */
133 for (i = 0; i < 8; i++) {
134 if ((mask >> i) & 0x01)
135 break;
136 }
137 *val = tmp >> i;
138
139 return 0;
140}
141
142static int hd29l2_soft_reset(struct hd29l2_priv *priv)
143{
144 int ret;
145 u8 tmp;
146
147 ret = hd29l2_rd_reg(priv, 0x26, &tmp);
148 if (ret)
149 goto err;
150
151 ret = hd29l2_wr_reg(priv, 0x26, 0x0d);
152 if (ret)
153 goto err;
154
155 usleep_range(10000, 20000);
156
157 ret = hd29l2_wr_reg(priv, 0x26, tmp);
158 if (ret)
159 goto err;
160
161 return 0;
162err:
163 dbg("%s: failed=%d", __func__, ret);
164 return ret;
165}
166
167static int hd29l2_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
168{
169 int ret, i;
170 struct hd29l2_priv *priv = fe->demodulator_priv;
171 u8 tmp;
172
173 dbg("%s: enable=%d", __func__, enable);
174
175 /* set tuner address for demod */
176 if (!priv->tuner_i2c_addr_programmed && enable) {
177 /* no need to set tuner address every time, once is enough */
178 ret = hd29l2_wr_reg(priv, 0x9d, priv->cfg.tuner_i2c_addr << 1);
179 if (ret)
180 goto err;
181
182 priv->tuner_i2c_addr_programmed = true;
183 }
184
185 /* open / close gate */
186 ret = hd29l2_wr_reg(priv, 0x9f, enable);
187 if (ret)
188 goto err;
189
190 /* wait demod ready */
191 for (i = 10; i; i--) {
192 ret = hd29l2_rd_reg(priv, 0x9e, &tmp);
193 if (ret)
194 goto err;
195
196 if (tmp == enable)
197 break;
198
199 usleep_range(5000, 10000);
200 }
201
202 dbg("%s: loop=%d", __func__, i);
203
204 return ret;
205err:
206 dbg("%s: failed=%d", __func__, ret);
207 return ret;
208}
209
210static int hd29l2_read_status(struct dvb_frontend *fe, fe_status_t *status)
211{
212 int ret;
213 struct hd29l2_priv *priv = fe->demodulator_priv;
214 u8 buf[2];
215
216 *status = 0;
217
218 ret = hd29l2_rd_reg(priv, 0x05, &buf[0]);
219 if (ret)
220 goto err;
221
222 if (buf[0] & 0x01) {
223 /* full lock */
224 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
225 FE_HAS_SYNC | FE_HAS_LOCK;
226 } else {
227 ret = hd29l2_rd_reg(priv, 0x0d, &buf[1]);
228 if (ret)
229 goto err;
230
231 if ((buf[1] & 0xfe) == 0x78)
232 /* partial lock */
233 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
234 FE_HAS_VITERBI | FE_HAS_SYNC;
235 }
236
237 priv->fe_status = *status;
238
239 return 0;
240err:
241 dbg("%s: failed=%d", __func__, ret);
242 return ret;
243}
244
245static int hd29l2_read_snr(struct dvb_frontend *fe, u16 *snr)
246{
247 int ret;
248 struct hd29l2_priv *priv = fe->demodulator_priv;
249 u8 buf[2];
250 u16 tmp;
251
252 if (!(priv->fe_status & FE_HAS_LOCK)) {
253 *snr = 0;
254 ret = 0;
255 goto err;
256 }
257
258 ret = hd29l2_rd_regs(priv, 0x0b, buf, 2);
259 if (ret)
260 goto err;
261
262 tmp = (buf[0] << 8) | buf[1];
263
264 /* report SNR in dB * 10 */
265 #define LOG10_20736_24 72422627 /* log10(20736) << 24 */
266 if (tmp)
267 *snr = (LOG10_20736_24 - intlog10(tmp)) / ((1 << 24) / 100);
268 else
269 *snr = 0;
270
271 return 0;
272err:
273 dbg("%s: failed=%d", __func__, ret);
274 return ret;
275}
276
277static int hd29l2_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
278{
279 int ret;
280 struct hd29l2_priv *priv = fe->demodulator_priv;
281 u8 buf[2];
282 u16 tmp;
283
284 *strength = 0;
285
286 ret = hd29l2_rd_regs(priv, 0xd5, buf, 2);
287 if (ret)
288 goto err;
289
290 tmp = buf[0] << 8 | buf[1];
291 tmp = ~tmp & 0x0fff;
292
293 /* scale value to 0x0000-0xffff from 0x0000-0x0fff */
294 *strength = tmp * 0xffff / 0x0fff;
295
296 return 0;
297err:
298 dbg("%s: failed=%d", __func__, ret);
299 return ret;
300}
301
302static int hd29l2_read_ber(struct dvb_frontend *fe, u32 *ber)
303{
304 int ret;
305 struct hd29l2_priv *priv = fe->demodulator_priv;
306 u8 buf[2];
307
308 if (!(priv->fe_status & FE_HAS_SYNC)) {
309 *ber = 0;
310 ret = 0;
311 goto err;
312 }
313
314 ret = hd29l2_rd_regs(priv, 0xd9, buf, 2);
315 if (ret) {
316 *ber = 0;
317 goto err;
318 }
319
320 /* LDPC BER */
321 *ber = ((buf[0] & 0x0f) << 8) | buf[1];
322
323 return 0;
324err:
325 dbg("%s: failed=%d", __func__, ret);
326 return ret;
327}
328
329static int hd29l2_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
330{
331 /* no way to read? */
332 *ucblocks = 0;
333 return 0;
334}
335
336static enum dvbfe_search hd29l2_search(struct dvb_frontend *fe)
337{
338 int ret, i;
339 struct hd29l2_priv *priv = fe->demodulator_priv;
340 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
341 u8 tmp, buf[3];
342 u8 modulation, carrier, guard_interval, interleave, code_rate;
343 u64 num64;
344 u32 if_freq, if_ctl;
345 bool auto_mode;
346
347 dbg("%s: delivery_system=%d frequency=%d bandwidth_hz=%d " \
348 "modulation=%d inversion=%d fec_inner=%d guard_interval=%d",
349 __func__,
350 c->delivery_system, c->frequency, c->bandwidth_hz,
351 c->modulation, c->inversion, c->fec_inner, c->guard_interval);
352
353 /* as for now we detect always params automatically */
354 auto_mode = true;
355
356 /* program tuner */
357 if (fe->ops.tuner_ops.set_params)
358 fe->ops.tuner_ops.set_params(fe);
359
360 /* get and program IF */
361 if (fe->ops.tuner_ops.get_if_frequency)
362 fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
363 else
364 if_freq = 0;
365
366 if (if_freq) {
367 /* normal IF */
368
369 /* calc IF control value */
370 num64 = if_freq;
371 num64 *= 0x800000;
372 num64 = div_u64(num64, HD29L2_XTAL);
373 num64 -= 0x800000;
374 if_ctl = num64;
375
376 tmp = 0xfc; /* tuner type normal */
377 } else {
378 /* zero IF */
379 if_ctl = 0;
380 tmp = 0xfe; /* tuner type Zero-IF */
381 }
382
383 buf[0] = ((if_ctl >> 0) & 0xff);
384 buf[1] = ((if_ctl >> 8) & 0xff);
385 buf[2] = ((if_ctl >> 16) & 0xff);
386
387 /* program IF control */
388 ret = hd29l2_wr_regs(priv, 0x14, buf, 3);
389 if (ret)
390 goto err;
391
392 /* program tuner type */
393 ret = hd29l2_wr_reg(priv, 0xab, tmp);
394 if (ret)
395 goto err;
396
397 dbg("%s: if_freq=%d if_ctl=%x", __func__, if_freq, if_ctl);
398
399 if (auto_mode) {
400 /*
401 * use auto mode
402 */
403
404 /* disable quick mode */
405 ret = hd29l2_wr_reg_mask(priv, 0xac, 0 << 7, 0x80);
406 if (ret)
407 goto err;
408
409 ret = hd29l2_wr_reg_mask(priv, 0x82, 1 << 1, 0x02);
410 if (ret)
411 goto err;
412
413 /* enable auto mode */
414 ret = hd29l2_wr_reg_mask(priv, 0x7d, 1 << 6, 0x40);
415 if (ret)
416 goto err;
417
418 ret = hd29l2_wr_reg_mask(priv, 0x81, 1 << 3, 0x08);
419 if (ret)
420 goto err;
421
422 /* soft reset */
423 ret = hd29l2_soft_reset(priv);
424 if (ret)
425 goto err;
426
427 /* detect modulation */
428 for (i = 30; i; i--) {
429 msleep(100);
430
431 ret = hd29l2_rd_reg(priv, 0x0d, &tmp);
432 if (ret)
433 goto err;
434
435 if ((((tmp & 0xf0) >= 0x10) &&
436 ((tmp & 0x0f) == 0x08)) || (tmp >= 0x2c))
437 break;
438 }
439
440 dbg("%s: loop=%d", __func__, i);
441
442 if (i == 0)
443 /* detection failed */
444 return DVBFE_ALGO_SEARCH_FAILED;
445
446 /* read modulation */
447 ret = hd29l2_rd_reg_mask(priv, 0x7d, &modulation, 0x07);
448 if (ret)
449 goto err;
450 } else {
451 /*
452 * use manual mode
453 */
454
455 modulation = HD29L2_QAM64;
456 carrier = HD29L2_CARRIER_MULTI;
457 guard_interval = HD29L2_PN945;
458 interleave = HD29L2_INTERLEAVER_420;
459 code_rate = HD29L2_CODE_RATE_08;
460
461 tmp = (code_rate << 3) | modulation;
462 ret = hd29l2_wr_reg_mask(priv, 0x7d, tmp, 0x5f);
463 if (ret)
464 goto err;
465
466 tmp = (carrier << 2) | guard_interval;
467 ret = hd29l2_wr_reg_mask(priv, 0x81, tmp, 0x0f);
468 if (ret)
469 goto err;
470
471 tmp = interleave;
472 ret = hd29l2_wr_reg_mask(priv, 0x82, tmp, 0x03);
473 if (ret)
474 goto err;
475 }
476
477 /* ensure modulation validy */
478 /* 0=QAM4_NR, 1=QAM4, 2=QAM16, 3=QAM32, 4=QAM64 */
479 if (modulation > (ARRAY_SIZE(reg_mod_vals_tab[0].val) - 1)) {
480 dbg("%s: modulation=%d not valid", __func__, modulation);
481 goto err;
482 }
483
484 /* program registers according to modulation */
485 for (i = 0; i < ARRAY_SIZE(reg_mod_vals_tab); i++) {
486 ret = hd29l2_wr_reg(priv, reg_mod_vals_tab[i].reg,
487 reg_mod_vals_tab[i].val[modulation]);
488 if (ret)
489 goto err;
490 }
491
492 /* read guard interval */
493 ret = hd29l2_rd_reg_mask(priv, 0x81, &guard_interval, 0x03);
494 if (ret)
495 goto err;
496
497 /* read carrier mode */
498 ret = hd29l2_rd_reg_mask(priv, 0x81, &carrier, 0x04);
499 if (ret)
500 goto err;
501
502 dbg("%s: modulation=%d guard_interval=%d carrier=%d",
503 __func__, modulation, guard_interval, carrier);
504
505 if ((carrier == HD29L2_CARRIER_MULTI) && (modulation == HD29L2_QAM64) &&
506 (guard_interval == HD29L2_PN945)) {
507 dbg("%s: C=3780 && QAM64 && PN945", __func__);
508
509 ret = hd29l2_wr_reg(priv, 0x42, 0x33);
510 if (ret)
511 goto err;
512
513 ret = hd29l2_wr_reg(priv, 0xdd, 0x01);
514 if (ret)
515 goto err;
516 }
517
518 usleep_range(10000, 20000);
519
520 /* soft reset */
521 ret = hd29l2_soft_reset(priv);
522 if (ret)
523 goto err;
524
525 /* wait demod lock */
526 for (i = 30; i; i--) {
527 msleep(100);
528
529 /* read lock bit */
530 ret = hd29l2_rd_reg_mask(priv, 0x05, &tmp, 0x01);
531 if (ret)
532 goto err;
533
534 if (tmp)
535 break;
536 }
537
538 dbg("%s: loop=%d", __func__, i);
539
540 if (i == 0)
541 return DVBFE_ALGO_SEARCH_AGAIN;
542
543 return DVBFE_ALGO_SEARCH_SUCCESS;
544err:
545 dbg("%s: failed=%d", __func__, ret);
546 return DVBFE_ALGO_SEARCH_ERROR;
547}
548
549static int hd29l2_get_frontend_algo(struct dvb_frontend *fe)
550{
551 return DVBFE_ALGO_CUSTOM;
552}
553
554static int hd29l2_get_frontend(struct dvb_frontend *fe)
555{
556 int ret;
557 struct hd29l2_priv *priv = fe->demodulator_priv;
558 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
559 u8 buf[3];
560 u32 if_ctl;
561 char *str_constellation, *str_code_rate, *str_constellation_code_rate,
562 *str_guard_interval, *str_carrier, *str_guard_interval_carrier,
563 *str_interleave, *str_interleave_;
564
565 ret = hd29l2_rd_reg(priv, 0x7d, &buf[0]);
566 if (ret)
567 goto err;
568
569 ret = hd29l2_rd_regs(priv, 0x81, &buf[1], 2);
570 if (ret)
571 goto err;
572
573 /* constellation, 0x7d[2:0] */
574 switch ((buf[0] >> 0) & 0x07) {
575 case 0: /* QAM4NR */
576 str_constellation = "QAM4NR";
577 c->modulation = QAM_AUTO; /* FIXME */
578 break;
579 case 1: /* QAM4 */
580 str_constellation = "QAM4";
581 c->modulation = QPSK; /* FIXME */
582 break;
583 case 2:
584 str_constellation = "QAM16";
585 c->modulation = QAM_16;
586 break;
587 case 3:
588 str_constellation = "QAM32";
589 c->modulation = QAM_32;
590 break;
591 case 4:
592 str_constellation = "QAM64";
593 c->modulation = QAM_64;
594 break;
595 default:
596 str_constellation = "?";
597 }
598
599 /* LDPC code rate, 0x7d[4:3] */
600 switch ((buf[0] >> 3) & 0x03) {
601 case 0: /* 0.4 */
602 str_code_rate = "0.4";
603 c->fec_inner = FEC_AUTO; /* FIXME */
604 break;
605 case 1: /* 0.6 */
606 str_code_rate = "0.6";
607 c->fec_inner = FEC_3_5;
608 break;
609 case 2: /* 0.8 */
610 str_code_rate = "0.8";
611 c->fec_inner = FEC_4_5;
612 break;
613 default:
614 str_code_rate = "?";
615 }
616
617 /* constellation & code rate set, 0x7d[6] */
618 switch ((buf[0] >> 6) & 0x01) {
619 case 0:
620 str_constellation_code_rate = "manual";
621 break;
622 case 1:
623 str_constellation_code_rate = "auto";
624 break;
625 default:
626 str_constellation_code_rate = "?";
627 }
628
629 /* frame header, 0x81[1:0] */
630 switch ((buf[1] >> 0) & 0x03) {
631 case 0: /* PN945 */
632 str_guard_interval = "PN945";
633 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */
634 break;
635 case 1: /* PN595 */
636 str_guard_interval = "PN595";
637 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */
638 break;
639 case 2: /* PN420 */
640 str_guard_interval = "PN420";
641 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */
642 break;
643 default:
644 str_guard_interval = "?";
645 }
646
647 /* carrier, 0x81[2] */
648 switch ((buf[1] >> 2) & 0x01) {
649 case 0:
650 str_carrier = "C=1";
651 break;
652 case 1:
653 str_carrier = "C=3780";
654 break;
655 default:
656 str_carrier = "?";
657 }
658
659 /* frame header & carrier set, 0x81[3] */
660 switch ((buf[1] >> 3) & 0x01) {
661 case 0:
662 str_guard_interval_carrier = "manual";
663 break;
664 case 1:
665 str_guard_interval_carrier = "auto";
666 break;
667 default:
668 str_guard_interval_carrier = "?";
669 }
670
671 /* interleave, 0x82[0] */
672 switch ((buf[2] >> 0) & 0x01) {
673 case 0:
674 str_interleave = "M=720";
675 break;
676 case 1:
677 str_interleave = "M=240";
678 break;
679 default:
680 str_interleave = "?";
681 }
682
683 /* interleave set, 0x82[1] */
684 switch ((buf[2] >> 1) & 0x01) {
685 case 0:
686 str_interleave_ = "manual";
687 break;
688 case 1:
689 str_interleave_ = "auto";
690 break;
691 default:
692 str_interleave_ = "?";
693 }
694
695 /*
696 * We can read out current detected NCO and use that value next
697 * time instead of calculating new value from targed IF.
698 * I think it will not effect receiver sensitivity but gaining lock
699 * after tune could be easier...
700 */
701 ret = hd29l2_rd_regs(priv, 0xb1, &buf[0], 3);
702 if (ret)
703 goto err;
704
705 if_ctl = (buf[0] << 16) | ((buf[1] - 7) << 8) | buf[2];
706
707 dbg("%s: %s %s %s | %s %s %s | %s %s | NCO=%06x", __func__,
708 str_constellation, str_code_rate, str_constellation_code_rate,
709 str_guard_interval, str_carrier, str_guard_interval_carrier,
710 str_interleave, str_interleave_, if_ctl);
711
712 return 0;
713err:
714 dbg("%s: failed=%d", __func__, ret);
715 return ret;
716}
717
718static int hd29l2_init(struct dvb_frontend *fe)
719{
720 int ret, i;
721 struct hd29l2_priv *priv = fe->demodulator_priv;
722 u8 tmp;
723 static const struct reg_val tab[] = {
724 { 0x3a, 0x06 },
725 { 0x3b, 0x03 },
726 { 0x3c, 0x04 },
727 { 0xaf, 0x06 },
728 { 0xb0, 0x1b },
729 { 0x80, 0x64 },
730 { 0x10, 0x38 },
731 };
732
733 dbg("%s:", __func__);
734
735 /* reset demod */
736 /* it is recommended to HW reset chip using RST_N pin */
737 if (fe->callback) {
738 ret = fe->callback(fe, DVB_FRONTEND_COMPONENT_DEMOD, 0, 0);
739 if (ret)
740 goto err;
741
742 /* reprogramming needed because HW reset clears registers */
743 priv->tuner_i2c_addr_programmed = false;
744 }
745
746 /* init */
747 for (i = 0; i < ARRAY_SIZE(tab); i++) {
748 ret = hd29l2_wr_reg(priv, tab[i].reg, tab[i].val);
749 if (ret)
750 goto err;
751 }
752
753 /* TS params */
754 ret = hd29l2_rd_reg(priv, 0x36, &tmp);
755 if (ret)
756 goto err;
757
758 tmp &= 0x1b;
759 tmp |= priv->cfg.ts_mode;
760 ret = hd29l2_wr_reg(priv, 0x36, tmp);
761 if (ret)
762 goto err;
763
764 ret = hd29l2_rd_reg(priv, 0x31, &tmp);
765 tmp &= 0xef;
766
767 if (!(priv->cfg.ts_mode >> 7))
768 /* set b4 for serial TS */
769 tmp |= 0x10;
770
771 ret = hd29l2_wr_reg(priv, 0x31, tmp);
772 if (ret)
773 goto err;
774
775 return ret;
776err:
777 dbg("%s: failed=%d", __func__, ret);
778 return ret;
779}
780
781static void hd29l2_release(struct dvb_frontend *fe)
782{
783 struct hd29l2_priv *priv = fe->demodulator_priv;
784 kfree(priv);
785}
786
787static struct dvb_frontend_ops hd29l2_ops;
788
789struct dvb_frontend *hd29l2_attach(const struct hd29l2_config *config,
790 struct i2c_adapter *i2c)
791{
792 int ret;
793 struct hd29l2_priv *priv = NULL;
794 u8 tmp;
795
796 /* allocate memory for the internal state */
797 priv = kzalloc(sizeof(struct hd29l2_priv), GFP_KERNEL);
798 if (priv == NULL)
799 goto err;
800
801 /* setup the state */
802 priv->i2c = i2c;
803 memcpy(&priv->cfg, config, sizeof(struct hd29l2_config));
804
805
806 /* check if the demod is there */
807 ret = hd29l2_rd_reg(priv, 0x00, &tmp);
808 if (ret)
809 goto err;
810
811 /* create dvb_frontend */
812 memcpy(&priv->fe.ops, &hd29l2_ops, sizeof(struct dvb_frontend_ops));
813 priv->fe.demodulator_priv = priv;
814
815 return &priv->fe;
816err:
817 kfree(priv);
818 return NULL;
819}
820EXPORT_SYMBOL(hd29l2_attach);
821
822static struct dvb_frontend_ops hd29l2_ops = {
823 .delsys = { SYS_DVBT },
824 .info = {
825 .name = "HDIC HD29L2 DMB-TH",
826 .frequency_min = 474000000,
827 .frequency_max = 858000000,
828 .frequency_stepsize = 10000,
829 .caps = FE_CAN_FEC_AUTO |
830 FE_CAN_QPSK |
831 FE_CAN_QAM_16 |
832 FE_CAN_QAM_32 |
833 FE_CAN_QAM_64 |
834 FE_CAN_QAM_AUTO |
835 FE_CAN_TRANSMISSION_MODE_AUTO |
836 FE_CAN_BANDWIDTH_AUTO |
837 FE_CAN_GUARD_INTERVAL_AUTO |
838 FE_CAN_HIERARCHY_AUTO |
839 FE_CAN_RECOVER
840 },
841
842 .release = hd29l2_release,
843
844 .init = hd29l2_init,
845
846 .get_frontend_algo = hd29l2_get_frontend_algo,
847 .search = hd29l2_search,
848 .get_frontend = hd29l2_get_frontend,
849
850 .read_status = hd29l2_read_status,
851 .read_snr = hd29l2_read_snr,
852 .read_signal_strength = hd29l2_read_signal_strength,
853 .read_ber = hd29l2_read_ber,
854 .read_ucblocks = hd29l2_read_ucblocks,
855
856 .i2c_gate_ctrl = hd29l2_i2c_gate_ctrl,
857};
858
859MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
860MODULE_DESCRIPTION("HDIC HD29L2 DMB-TH demodulator driver");
861MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/hd29l2.h b/drivers/media/dvb/frontends/hd29l2.h
new file mode 100644
index 00000000000..a7a64431364
--- /dev/null
+++ b/drivers/media/dvb/frontends/hd29l2.h
@@ -0,0 +1,66 @@
1/*
2 * HDIC HD29L2 DMB-TH demodulator driver
3 *
4 * Copyright (C) 2011 Metropolia University of Applied Sciences, Electria R&D
5 *
6 * Author: Antti Palosaari <crope@iki.fi>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef HD29L2_H
24#define HD29L2_H
25
26#include <linux/dvb/frontend.h>
27
28struct hd29l2_config {
29 /*
30 * demodulator I2C address
31 */
32 u8 i2c_addr;
33
34 /*
35 * tuner I2C address
36 * only needed when tuner is behind demod I2C-gate
37 */
38 u8 tuner_i2c_addr;
39
40 /*
41 * TS settings
42 */
43#define HD29L2_TS_SERIAL 0x00
44#define HD29L2_TS_PARALLEL 0x80
45#define HD29L2_TS_CLK_NORMAL 0x40
46#define HD29L2_TS_CLK_INVERTED 0x00
47#define HD29L2_TS_CLK_GATED 0x20
48#define HD29L2_TS_CLK_FREE 0x00
49 u8 ts_mode;
50};
51
52
53#if defined(CONFIG_DVB_HD29L2) || \
54 (defined(CONFIG_DVB_HD29L2_MODULE) && defined(MODULE))
55extern struct dvb_frontend *hd29l2_attach(const struct hd29l2_config *config,
56 struct i2c_adapter *i2c);
57#else
58static inline struct dvb_frontend *hd29l2_attach(
59const struct hd29l2_config *config, struct i2c_adapter *i2c)
60{
61 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
62 return NULL;
63}
64#endif
65
66#endif /* HD29L2_H */
diff --git a/drivers/media/dvb/frontends/hd29l2_priv.h b/drivers/media/dvb/frontends/hd29l2_priv.h
new file mode 100644
index 00000000000..ba16dc3ec2b
--- /dev/null
+++ b/drivers/media/dvb/frontends/hd29l2_priv.h
@@ -0,0 +1,314 @@
1/*
2 * HDIC HD29L2 DMB-TH demodulator driver
3 *
4 * Copyright (C) 2011 Metropolia University of Applied Sciences, Electria R&D
5 *
6 * Author: Antti Palosaari <crope@iki.fi>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef HD29L2_PRIV
24#define HD29L2_PRIV
25
26#include <linux/dvb/version.h>
27#include "dvb_frontend.h"
28#include "dvb_math.h"
29#include "hd29l2.h"
30
31#define LOG_PREFIX "hd29l2"
32
33#undef dbg
34#define dbg(f, arg...) \
35 if (hd29l2_debug) \
36 printk(KERN_INFO LOG_PREFIX": " f "\n" , ## arg)
37#undef err
38#define err(f, arg...) printk(KERN_ERR LOG_PREFIX": " f "\n" , ## arg)
39#undef info
40#define info(f, arg...) printk(KERN_INFO LOG_PREFIX": " f "\n" , ## arg)
41#undef warn
42#define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)
43
44#define HD29L2_XTAL 30400000 /* Hz */
45
46
47#define HD29L2_QAM4NR 0x00
48#define HD29L2_QAM4 0x01
49#define HD29L2_QAM16 0x02
50#define HD29L2_QAM32 0x03
51#define HD29L2_QAM64 0x04
52
53#define HD29L2_CODE_RATE_04 0x00
54#define HD29L2_CODE_RATE_06 0x08
55#define HD29L2_CODE_RATE_08 0x10
56
57#define HD29L2_PN945 0x00
58#define HD29L2_PN595 0x01
59#define HD29L2_PN420 0x02
60
61#define HD29L2_CARRIER_SINGLE 0x00
62#define HD29L2_CARRIER_MULTI 0x01
63
64#define HD29L2_INTERLEAVER_720 0x00
65#define HD29L2_INTERLEAVER_420 0x01
66
67struct reg_val {
68 u8 reg;
69 u8 val;
70};
71
72struct reg_mod_vals {
73 u8 reg;
74 u8 val[5];
75};
76
77struct hd29l2_priv {
78 struct i2c_adapter *i2c;
79 struct dvb_frontend fe;
80 struct hd29l2_config cfg;
81 u8 tuner_i2c_addr_programmed:1;
82
83 fe_status_t fe_status;
84};
85
86static const struct reg_mod_vals reg_mod_vals_tab[] = {
87 /* REG, QAM4NR, QAM4,QAM16,QAM32,QAM64 */
88 { 0x01, { 0x10, 0x10, 0x10, 0x10, 0x10 } },
89 { 0x02, { 0x07, 0x07, 0x07, 0x07, 0x07 } },
90 { 0x03, { 0x10, 0x10, 0x10, 0x10, 0x10 } },
91 { 0x04, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
92 { 0x05, { 0x61, 0x60, 0x60, 0x61, 0x60 } },
93 { 0x06, { 0xff, 0xff, 0xff, 0xff, 0xff } },
94 { 0x07, { 0xff, 0xff, 0xff, 0xff, 0xff } },
95 { 0x08, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
96 { 0x09, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
97 { 0x0a, { 0x15, 0x15, 0x03, 0x03, 0x03 } },
98 { 0x0d, { 0x78, 0x78, 0x88, 0x78, 0x78 } },
99 { 0x0e, { 0xa0, 0x90, 0xa0, 0xa0, 0xa0 } },
100 { 0x0f, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
101 { 0x10, { 0xa0, 0xa0, 0x58, 0x38, 0x38 } },
102 { 0x11, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
103 { 0x12, { 0x5a, 0x5a, 0x5a, 0x5a, 0x5a } },
104 { 0x13, { 0xa2, 0xa2, 0xa2, 0xa2, 0xa2 } },
105 { 0x17, { 0x40, 0x40, 0x40, 0x40, 0x40 } },
106 { 0x18, { 0x21, 0x21, 0x42, 0x52, 0x42 } },
107 { 0x19, { 0x21, 0x21, 0x62, 0x72, 0x62 } },
108 { 0x1a, { 0x32, 0x43, 0xa9, 0xb9, 0xa9 } },
109 { 0x1b, { 0x32, 0x43, 0xb9, 0xd8, 0xb9 } },
110 { 0x1c, { 0x02, 0x02, 0x03, 0x02, 0x03 } },
111 { 0x1d, { 0x0c, 0x0c, 0x01, 0x02, 0x02 } },
112 { 0x1e, { 0x02, 0x02, 0x02, 0x01, 0x02 } },
113 { 0x1f, { 0x02, 0x02, 0x01, 0x02, 0x04 } },
114 { 0x20, { 0x01, 0x02, 0x01, 0x01, 0x01 } },
115 { 0x21, { 0x08, 0x08, 0x0a, 0x0a, 0x0a } },
116 { 0x22, { 0x06, 0x06, 0x04, 0x05, 0x05 } },
117 { 0x23, { 0x06, 0x06, 0x05, 0x03, 0x05 } },
118 { 0x24, { 0x08, 0x08, 0x05, 0x07, 0x07 } },
119 { 0x25, { 0x16, 0x10, 0x10, 0x0a, 0x10 } },
120 { 0x26, { 0x14, 0x14, 0x04, 0x04, 0x04 } },
121 { 0x27, { 0x58, 0x58, 0x58, 0x5c, 0x58 } },
122 { 0x28, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
123 { 0x29, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
124 { 0x2a, { 0x08, 0x0a, 0x08, 0x08, 0x08 } },
125 { 0x2b, { 0x08, 0x08, 0x08, 0x08, 0x08 } },
126 { 0x2c, { 0x06, 0x06, 0x06, 0x06, 0x06 } },
127 { 0x2d, { 0x05, 0x06, 0x06, 0x06, 0x06 } },
128 { 0x2e, { 0x21, 0x21, 0x21, 0x21, 0x21 } },
129 { 0x2f, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
130 { 0x30, { 0x14, 0x14, 0x14, 0x14, 0x14 } },
131 { 0x33, { 0xb7, 0xb7, 0xb7, 0xb7, 0xb7 } },
132 { 0x34, { 0x81, 0x81, 0x81, 0x81, 0x81 } },
133 { 0x35, { 0x80, 0x80, 0x80, 0x80, 0x80 } },
134 { 0x37, { 0x70, 0x70, 0x70, 0x70, 0x70 } },
135 { 0x38, { 0x04, 0x04, 0x02, 0x02, 0x02 } },
136 { 0x39, { 0x07, 0x07, 0x05, 0x05, 0x05 } },
137 { 0x3a, { 0x06, 0x06, 0x06, 0x06, 0x06 } },
138 { 0x3b, { 0x03, 0x03, 0x03, 0x03, 0x03 } },
139 { 0x3c, { 0x07, 0x06, 0x04, 0x04, 0x04 } },
140 { 0x3d, { 0xf0, 0xf0, 0xf0, 0xf0, 0x80 } },
141 { 0x3e, { 0x60, 0x60, 0x60, 0x60, 0xff } },
142 { 0x3f, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
143 { 0x40, { 0x5b, 0x5b, 0x5b, 0x57, 0x50 } },
144 { 0x41, { 0x30, 0x30, 0x30, 0x30, 0x18 } },
145 { 0x42, { 0x20, 0x20, 0x20, 0x00, 0x30 } },
146 { 0x43, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
147 { 0x44, { 0x3f, 0x3f, 0x3f, 0x3f, 0x3f } },
148 { 0x45, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
149 { 0x46, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
150 { 0x47, { 0x00, 0x00, 0x95, 0x00, 0x95 } },
151 { 0x48, { 0xc0, 0xc0, 0xc0, 0xc0, 0xc0 } },
152 { 0x49, { 0xc0, 0xc0, 0xc0, 0xc0, 0xc0 } },
153 { 0x4a, { 0x40, 0x40, 0x33, 0x11, 0x11 } },
154 { 0x4b, { 0x40, 0x40, 0x00, 0x00, 0x00 } },
155 { 0x4c, { 0x40, 0x40, 0x99, 0x11, 0x11 } },
156 { 0x4d, { 0x40, 0x40, 0x00, 0x00, 0x00 } },
157 { 0x4e, { 0x40, 0x40, 0x66, 0x77, 0x77 } },
158 { 0x4f, { 0x40, 0x40, 0x00, 0x00, 0x00 } },
159 { 0x50, { 0x40, 0x40, 0x88, 0x33, 0x11 } },
160 { 0x51, { 0x40, 0x40, 0x00, 0x00, 0x00 } },
161 { 0x52, { 0x40, 0x40, 0x88, 0x02, 0x02 } },
162 { 0x53, { 0x40, 0x40, 0x00, 0x02, 0x02 } },
163 { 0x54, { 0x00, 0x00, 0x88, 0x33, 0x33 } },
164 { 0x55, { 0x40, 0x40, 0x00, 0x00, 0x00 } },
165 { 0x56, { 0x00, 0x00, 0x00, 0x0b, 0x00 } },
166 { 0x57, { 0x40, 0x40, 0x0a, 0x0b, 0x0a } },
167 { 0x58, { 0xaa, 0x00, 0x00, 0x00, 0x00 } },
168 { 0x59, { 0x7a, 0x40, 0x02, 0x02, 0x02 } },
169 { 0x5a, { 0x18, 0x18, 0x01, 0x01, 0x01 } },
170 { 0x5b, { 0x18, 0x18, 0x01, 0x01, 0x01 } },
171 { 0x5c, { 0x18, 0x18, 0x01, 0x01, 0x01 } },
172 { 0x5d, { 0x18, 0x18, 0x01, 0x01, 0x01 } },
173 { 0x5e, { 0xc0, 0xc0, 0xc0, 0xff, 0xc0 } },
174 { 0x5f, { 0xc0, 0xc0, 0xc0, 0xff, 0xc0 } },
175 { 0x60, { 0x40, 0x40, 0x00, 0x30, 0x30 } },
176 { 0x61, { 0x40, 0x40, 0x10, 0x30, 0x30 } },
177 { 0x62, { 0x40, 0x40, 0x00, 0x30, 0x30 } },
178 { 0x63, { 0x40, 0x40, 0x05, 0x30, 0x30 } },
179 { 0x64, { 0x40, 0x40, 0x06, 0x00, 0x30 } },
180 { 0x65, { 0x40, 0x40, 0x06, 0x08, 0x30 } },
181 { 0x66, { 0x40, 0x40, 0x00, 0x00, 0x20 } },
182 { 0x67, { 0x40, 0x40, 0x01, 0x04, 0x20 } },
183 { 0x68, { 0x00, 0x00, 0x30, 0x00, 0x20 } },
184 { 0x69, { 0xa0, 0xa0, 0x00, 0x08, 0x20 } },
185 { 0x6a, { 0x00, 0x00, 0x30, 0x00, 0x25 } },
186 { 0x6b, { 0xa0, 0xa0, 0x00, 0x06, 0x25 } },
187 { 0x6c, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
188 { 0x6d, { 0xa0, 0x60, 0x0c, 0x03, 0x0c } },
189 { 0x6e, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
190 { 0x6f, { 0xa0, 0x60, 0x04, 0x01, 0x04 } },
191 { 0x70, { 0x58, 0x58, 0xaa, 0xaa, 0xaa } },
192 { 0x71, { 0x58, 0x58, 0xaa, 0xaa, 0xaa } },
193 { 0x72, { 0x58, 0x58, 0xff, 0xff, 0xff } },
194 { 0x73, { 0x58, 0x58, 0xff, 0xff, 0xff } },
195 { 0x74, { 0x06, 0x06, 0x09, 0x05, 0x05 } },
196 { 0x75, { 0x06, 0x06, 0x0a, 0x10, 0x10 } },
197 { 0x76, { 0x10, 0x10, 0x06, 0x0a, 0x0a } },
198 { 0x77, { 0x12, 0x18, 0x28, 0x10, 0x28 } },
199 { 0x78, { 0xf8, 0xf8, 0xf8, 0xf8, 0xf8 } },
200 { 0x79, { 0x15, 0x15, 0x03, 0x03, 0x03 } },
201 { 0x7a, { 0x02, 0x02, 0x01, 0x04, 0x03 } },
202 { 0x7b, { 0x01, 0x02, 0x03, 0x03, 0x03 } },
203 { 0x7c, { 0x28, 0x28, 0x28, 0x28, 0x28 } },
204 { 0x7f, { 0x25, 0x92, 0x5f, 0x17, 0x2d } },
205 { 0x80, { 0x64, 0x64, 0x64, 0x74, 0x64 } },
206 { 0x83, { 0x06, 0x03, 0x04, 0x04, 0x04 } },
207 { 0x84, { 0xff, 0xff, 0xff, 0xff, 0xff } },
208 { 0x85, { 0x05, 0x05, 0x05, 0x05, 0x05 } },
209 { 0x86, { 0x00, 0x00, 0x11, 0x11, 0x11 } },
210 { 0x87, { 0x03, 0x03, 0x03, 0x03, 0x03 } },
211 { 0x88, { 0x09, 0x09, 0x09, 0x09, 0x09 } },
212 { 0x89, { 0x20, 0x20, 0x30, 0x20, 0x20 } },
213 { 0x8a, { 0x03, 0x03, 0x02, 0x03, 0x02 } },
214 { 0x8b, { 0x00, 0x07, 0x09, 0x00, 0x09 } },
215 { 0x8c, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
216 { 0x8d, { 0x4f, 0x4f, 0x4f, 0x3f, 0x4f } },
217 { 0x8e, { 0xf0, 0xf0, 0x60, 0xf0, 0xa0 } },
218 { 0x8f, { 0xe8, 0xe8, 0xe8, 0xe8, 0xe8 } },
219 { 0x90, { 0x10, 0x10, 0x10, 0x10, 0x10 } },
220 { 0x91, { 0x40, 0x40, 0x70, 0x70, 0x10 } },
221 { 0x92, { 0x00, 0x00, 0x00, 0x00, 0x04 } },
222 { 0x93, { 0x60, 0x60, 0x60, 0x60, 0x60 } },
223 { 0x94, { 0x00, 0x00, 0x00, 0x00, 0x03 } },
224 { 0x95, { 0x09, 0x09, 0x47, 0x47, 0x47 } },
225 { 0x96, { 0x80, 0xa0, 0xa0, 0x40, 0xa0 } },
226 { 0x97, { 0x60, 0x60, 0x60, 0x60, 0x60 } },
227 { 0x98, { 0x50, 0x50, 0x50, 0x30, 0x50 } },
228 { 0x99, { 0x10, 0x10, 0x10, 0x10, 0x10 } },
229 { 0x9a, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
230 { 0x9b, { 0x40, 0x40, 0x40, 0x30, 0x40 } },
231 { 0x9c, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
232 { 0xa0, { 0xf0, 0xf0, 0xf0, 0xf0, 0xf0 } },
233 { 0xa1, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
234 { 0xa2, { 0x30, 0x30, 0x00, 0x30, 0x00 } },
235 { 0xa3, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
236 { 0xa4, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
237 { 0xa5, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
238 { 0xa6, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
239 { 0xa7, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
240 { 0xa8, { 0x77, 0x77, 0x77, 0x77, 0x77 } },
241 { 0xa9, { 0x02, 0x02, 0x02, 0x02, 0x02 } },
242 { 0xaa, { 0x40, 0x40, 0x40, 0x40, 0x40 } },
243 { 0xac, { 0x1f, 0x1f, 0x1f, 0x1f, 0x1f } },
244 { 0xad, { 0x14, 0x14, 0x14, 0x14, 0x14 } },
245 { 0xae, { 0x78, 0x78, 0x78, 0x78, 0x78 } },
246 { 0xaf, { 0x06, 0x06, 0x06, 0x06, 0x07 } },
247 { 0xb0, { 0x1b, 0x1b, 0x1b, 0x19, 0x1b } },
248 { 0xb1, { 0x18, 0x17, 0x17, 0x18, 0x17 } },
249 { 0xb2, { 0x35, 0x82, 0x82, 0x38, 0x82 } },
250 { 0xb3, { 0xb6, 0xce, 0xc7, 0x5c, 0xb0 } },
251 { 0xb4, { 0x3f, 0x3e, 0x3e, 0x3f, 0x3e } },
252 { 0xb5, { 0x70, 0x58, 0x50, 0x68, 0x50 } },
253 { 0xb6, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
254 { 0xb7, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
255 { 0xb8, { 0x03, 0x03, 0x01, 0x01, 0x01 } },
256 { 0xb9, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
257 { 0xba, { 0x06, 0x06, 0x0a, 0x05, 0x0a } },
258 { 0xbb, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
259 { 0xbc, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
260 { 0xbd, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
261 { 0xbe, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
262 { 0xbf, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
263 { 0xc0, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
264 { 0xc1, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
265 { 0xc2, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
266 { 0xc3, { 0x00, 0x00, 0x88, 0x66, 0x88 } },
267 { 0xc4, { 0x10, 0x10, 0x00, 0x00, 0x00 } },
268 { 0xc5, { 0x00, 0x00, 0x44, 0x60, 0x44 } },
269 { 0xc6, { 0x10, 0x0a, 0x00, 0x00, 0x00 } },
270 { 0xc7, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
271 { 0xc8, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
272 { 0xc9, { 0x90, 0x04, 0x00, 0x00, 0x00 } },
273 { 0xca, { 0x90, 0x08, 0x01, 0x01, 0x01 } },
274 { 0xcb, { 0xa0, 0x04, 0x00, 0x44, 0x00 } },
275 { 0xcc, { 0xa0, 0x10, 0x03, 0x00, 0x03 } },
276 { 0xcd, { 0x06, 0x06, 0x06, 0x05, 0x06 } },
277 { 0xce, { 0x05, 0x05, 0x01, 0x01, 0x01 } },
278 { 0xcf, { 0x40, 0x20, 0x18, 0x18, 0x18 } },
279 { 0xd0, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
280 { 0xd1, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
281 { 0xd2, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
282 { 0xd3, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
283 { 0xd4, { 0x05, 0x05, 0x05, 0x05, 0x05 } },
284 { 0xd5, { 0x05, 0x05, 0x05, 0x03, 0x05 } },
285 { 0xd6, { 0xac, 0x22, 0xca, 0x8f, 0xca } },
286 { 0xd7, { 0x20, 0x20, 0x20, 0x20, 0x20 } },
287 { 0xd8, { 0x01, 0x01, 0x01, 0x01, 0x01 } },
288 { 0xd9, { 0x00, 0x00, 0x0f, 0x00, 0x0f } },
289 { 0xda, { 0x00, 0xff, 0xff, 0x0e, 0xff } },
290 { 0xdb, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
291 { 0xdc, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
292 { 0xdd, { 0x05, 0x05, 0x05, 0x05, 0x05 } },
293 { 0xde, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
294 { 0xdf, { 0x42, 0x42, 0x44, 0x44, 0x04 } },
295 { 0xe0, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
296 { 0xe1, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
297 { 0xe2, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
298 { 0xe3, { 0x00, 0x00, 0x26, 0x06, 0x26 } },
299 { 0xe4, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
300 { 0xe5, { 0x01, 0x0a, 0x01, 0x01, 0x01 } },
301 { 0xe6, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
302 { 0xe7, { 0x08, 0x08, 0x08, 0x08, 0x08 } },
303 { 0xe8, { 0x63, 0x63, 0x63, 0x63, 0x63 } },
304 { 0xe9, { 0x59, 0x59, 0x59, 0x59, 0x59 } },
305 { 0xea, { 0x80, 0x80, 0x20, 0x80, 0x80 } },
306 { 0xeb, { 0x37, 0x37, 0x78, 0x37, 0x77 } },
307 { 0xec, { 0x1f, 0x1f, 0x25, 0x25, 0x25 } },
308 { 0xed, { 0x0a, 0x0a, 0x0a, 0x0a, 0x0a } },
309 { 0xee, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
310 { 0xef, { 0x70, 0x70, 0x58, 0x38, 0x58 } },
311 { 0xf0, { 0x00, 0x00, 0x00, 0x00, 0x00 } },
312};
313
314#endif /* HD29L2_PRIV */
diff --git a/drivers/media/dvb/frontends/it913x-fe-priv.h b/drivers/media/dvb/frontends/it913x-fe-priv.h
index 1c6fb4b6625..93b086ea7e1 100644
--- a/drivers/media/dvb/frontends/it913x-fe-priv.h
+++ b/drivers/media/dvb/frontends/it913x-fe-priv.h
@@ -22,126 +22,126 @@ struct adctable { u32 adcFrequency;
22/* clock and coeff tables only table 3 is used with IT9137*/ 22/* clock and coeff tables only table 3 is used with IT9137*/
23/* TODO other tables relate AF9035 may be removed */ 23/* TODO other tables relate AF9035 may be removed */
24static struct adctable tab1[] = { 24static struct adctable tab1[] = {
25 { 20156250, BANDWIDTH_6_MHZ, 25 { 20156250, 6000000,
26 0x02b8ba6e, 0x015c5d37, 0x00ae340d, 0x00ae2e9b, 0x00ae292a, 26 0x02b8ba6e, 0x015c5d37, 0x00ae340d, 0x00ae2e9b, 0x00ae292a,
27 0x015c5d37, 0x00ae2e9b, 0x0057174e, 0x02f1, 0x015c }, 27 0x015c5d37, 0x00ae2e9b, 0x0057174e, 0x02f1, 0x015c },
28 { 20156250, BANDWIDTH_7_MHZ, 28 { 20156250, 7000000,
29 0x032cd980, 0x01966cc0, 0x00cb3cba, 0x00cb3660, 0x00cb3007, 29 0x032cd980, 0x01966cc0, 0x00cb3cba, 0x00cb3660, 0x00cb3007,
30 0x01966cc0, 0x00cb3660, 0x00659b30, 0x0285, 0x0196 }, 30 0x01966cc0, 0x00cb3660, 0x00659b30, 0x0285, 0x0196 },
31 { 20156250, BANDWIDTH_8_MHZ, 31 { 20156250, 8000000,
32 0x03a0f893, 0x01d07c49, 0x00e84567, 0x00e83e25, 0x00e836e3, 32 0x03a0f893, 0x01d07c49, 0x00e84567, 0x00e83e25, 0x00e836e3,
33 0x01d07c49, 0x00e83e25, 0x00741f12, 0x0234, 0x01d0 }, 33 0x01d07c49, 0x00e83e25, 0x00741f12, 0x0234, 0x01d0 },
34 { 20156250, BANDWIDTH_5_MHZ, 34 { 20156250, 5000000,
35 0x02449b5c, 0x01224dae, 0x00912b60, 0x009126d7, 0x0091224e, 35 0x02449b5c, 0x01224dae, 0x00912b60, 0x009126d7, 0x0091224e,
36 0x01224dae, 0x009126d7, 0x0048936b, 0x0387, 0x0122 } 36 0x01224dae, 0x009126d7, 0x0048936b, 0x0387, 0x0122 }
37}; 37};
38 38
39static struct adctable tab2[] = { 39static struct adctable tab2[] = {
40 { 20187500, BANDWIDTH_6_MHZ, 40 { 20187500, 6000000,
41 0x02b7a654, 0x015bd32a, 0x00adef04, 0x00ade995, 0x00ade426, 41 0x02b7a654, 0x015bd32a, 0x00adef04, 0x00ade995, 0x00ade426,
42 0x015bd32a, 0x00ade995, 0x0056f4ca, 0x02f2, 0x015c }, 42 0x015bd32a, 0x00ade995, 0x0056f4ca, 0x02f2, 0x015c },
43 { 20187500, BANDWIDTH_7_MHZ, 43 { 20187500, 7000000,
44 0x032b9761, 0x0195cbb1, 0x00caec30, 0x00cae5d8, 0x00cadf81, 44 0x032b9761, 0x0195cbb1, 0x00caec30, 0x00cae5d8, 0x00cadf81,
45 0x0195cbb1, 0x00cae5d8, 0x006572ec, 0x0286, 0x0196 }, 45 0x0195cbb1, 0x00cae5d8, 0x006572ec, 0x0286, 0x0196 },
46 { 20187500, BANDWIDTH_8_MHZ, 46 { 20187500, 8000000,
47 0x039f886f, 0x01cfc438, 0x00e7e95b, 0x00e7e21c, 0x00e7dadd, 47 0x039f886f, 0x01cfc438, 0x00e7e95b, 0x00e7e21c, 0x00e7dadd,
48 0x01cfc438, 0x00e7e21c, 0x0073f10e, 0x0235, 0x01d0 }, 48 0x01cfc438, 0x00e7e21c, 0x0073f10e, 0x0235, 0x01d0 },
49 { 20187500, BANDWIDTH_5_MHZ, 49 { 20187500, 5000000,
50 0x0243b546, 0x0121daa3, 0x0090f1d9, 0x0090ed51, 0x0090e8ca, 50 0x0243b546, 0x0121daa3, 0x0090f1d9, 0x0090ed51, 0x0090e8ca,
51 0x0121daa3, 0x0090ed51, 0x004876a9, 0x0388, 0x0122 } 51 0x0121daa3, 0x0090ed51, 0x004876a9, 0x0388, 0x0122 }
52 52
53}; 53};
54 54
55static struct adctable tab3[] = { 55static struct adctable tab3[] = {
56 { 20250000, BANDWIDTH_6_MHZ, 56 { 20250000, 6000000,
57 0x02b580ad, 0x015ac057, 0x00ad6597, 0x00ad602b, 0x00ad5ac1, 57 0x02b580ad, 0x015ac057, 0x00ad6597, 0x00ad602b, 0x00ad5ac1,
58 0x015ac057, 0x00ad602b, 0x0056b016, 0x02f4, 0x015b }, 58 0x015ac057, 0x00ad602b, 0x0056b016, 0x02f4, 0x015b },
59 { 20250000, BANDWIDTH_7_MHZ, 59 { 20250000, 7000000,
60 0x03291620, 0x01948b10, 0x00ca4bda, 0x00ca4588, 0x00ca3f36, 60 0x03291620, 0x01948b10, 0x00ca4bda, 0x00ca4588, 0x00ca3f36,
61 0x01948b10, 0x00ca4588, 0x006522c4, 0x0288, 0x0195 }, 61 0x01948b10, 0x00ca4588, 0x006522c4, 0x0288, 0x0195 },
62 { 20250000, BANDWIDTH_8_MHZ, 62 { 20250000, 8000000,
63 0x039cab92, 0x01ce55c9, 0x00e7321e, 0x00e72ae4, 0x00e723ab, 63 0x039cab92, 0x01ce55c9, 0x00e7321e, 0x00e72ae4, 0x00e723ab,
64 0x01ce55c9, 0x00e72ae4, 0x00739572, 0x0237, 0x01ce }, 64 0x01ce55c9, 0x00e72ae4, 0x00739572, 0x0237, 0x01ce },
65 { 20250000, BANDWIDTH_5_MHZ, 65 { 20250000, 5000000,
66 0x0241eb3b, 0x0120f59e, 0x00907f53, 0x00907acf, 0x0090764b, 66 0x0241eb3b, 0x0120f59e, 0x00907f53, 0x00907acf, 0x0090764b,
67 0x0120f59e, 0x00907acf, 0x00483d67, 0x038b, 0x0121 } 67 0x0120f59e, 0x00907acf, 0x00483d67, 0x038b, 0x0121 }
68 68
69}; 69};
70 70
71static struct adctable tab4[] = { 71static struct adctable tab4[] = {
72 { 20583333, BANDWIDTH_6_MHZ, 72 { 20583333, 6000000,
73 0x02aa4598, 0x015522cc, 0x00aa96bb, 0x00aa9166, 0x00aa8c12, 73 0x02aa4598, 0x015522cc, 0x00aa96bb, 0x00aa9166, 0x00aa8c12,
74 0x015522cc, 0x00aa9166, 0x005548b3, 0x0300, 0x0155 }, 74 0x015522cc, 0x00aa9166, 0x005548b3, 0x0300, 0x0155 },
75 { 20583333, BANDWIDTH_7_MHZ, 75 { 20583333, 7000000,
76 0x031bfbdc, 0x018dfdee, 0x00c7052f, 0x00c6fef7, 0x00c6f8bf, 76 0x031bfbdc, 0x018dfdee, 0x00c7052f, 0x00c6fef7, 0x00c6f8bf,
77 0x018dfdee, 0x00c6fef7, 0x00637f7b, 0x0293, 0x018e }, 77 0x018dfdee, 0x00c6fef7, 0x00637f7b, 0x0293, 0x018e },
78 { 20583333, BANDWIDTH_8_MHZ, 78 { 20583333, 8000000,
79 0x038db21f, 0x01c6d910, 0x00e373a3, 0x00e36c88, 0x00e3656d, 79 0x038db21f, 0x01c6d910, 0x00e373a3, 0x00e36c88, 0x00e3656d,
80 0x01c6d910, 0x00e36c88, 0x0071b644, 0x0240, 0x01c7 }, 80 0x01c6d910, 0x00e36c88, 0x0071b644, 0x0240, 0x01c7 },
81 { 20583333, BANDWIDTH_5_MHZ, 81 { 20583333, 5000000,
82 0x02388f54, 0x011c47aa, 0x008e2846, 0x008e23d5, 0x008e1f64, 82 0x02388f54, 0x011c47aa, 0x008e2846, 0x008e23d5, 0x008e1f64,
83 0x011c47aa, 0x008e23d5, 0x004711ea, 0x039a, 0x011c } 83 0x011c47aa, 0x008e23d5, 0x004711ea, 0x039a, 0x011c }
84 84
85}; 85};
86 86
87static struct adctable tab5[] = { 87static struct adctable tab5[] = {
88 { 20416667, BANDWIDTH_6_MHZ, 88 { 20416667, 6000000,
89 0x02afd765, 0x0157ebb3, 0x00abfb39, 0x00abf5d9, 0x00abf07a, 89 0x02afd765, 0x0157ebb3, 0x00abfb39, 0x00abf5d9, 0x00abf07a,
90 0x0157ebb3, 0x00abf5d9, 0x0055faed, 0x02fa, 0x0158 }, 90 0x0157ebb3, 0x00abf5d9, 0x0055faed, 0x02fa, 0x0158 },
91 { 20416667, BANDWIDTH_7_MHZ, 91 { 20416667, 7000000,
92 0x03227b4b, 0x01913da6, 0x00c8a518, 0x00c89ed3, 0x00c8988e, 92 0x03227b4b, 0x01913da6, 0x00c8a518, 0x00c89ed3, 0x00c8988e,
93 0x01913da6, 0x00c89ed3, 0x00644f69, 0x028d, 0x0191 }, 93 0x01913da6, 0x00c89ed3, 0x00644f69, 0x028d, 0x0191 },
94 { 20416667, BANDWIDTH_8_MHZ, 94 { 20416667, 8000000,
95 0x03951f32, 0x01ca8f99, 0x00e54ef7, 0x00e547cc, 0x00e540a2, 95 0x03951f32, 0x01ca8f99, 0x00e54ef7, 0x00e547cc, 0x00e540a2,
96 0x01ca8f99, 0x00e547cc, 0x0072a3e6, 0x023c, 0x01cb }, 96 0x01ca8f99, 0x00e547cc, 0x0072a3e6, 0x023c, 0x01cb },
97 { 20416667, BANDWIDTH_5_MHZ, 97 { 20416667, 5000000,
98 0x023d337f, 0x011e99c0, 0x008f515a, 0x008f4ce0, 0x008f4865, 98 0x023d337f, 0x011e99c0, 0x008f515a, 0x008f4ce0, 0x008f4865,
99 0x011e99c0, 0x008f4ce0, 0x0047a670, 0x0393, 0x011f } 99 0x011e99c0, 0x008f4ce0, 0x0047a670, 0x0393, 0x011f }
100 100
101}; 101};
102 102
103static struct adctable tab6[] = { 103static struct adctable tab6[] = {
104 { 20480000, BANDWIDTH_6_MHZ, 104 { 20480000, 6000000,
105 0x02adb6db, 0x0156db6e, 0x00ab7312, 0x00ab6db7, 0x00ab685c, 105 0x02adb6db, 0x0156db6e, 0x00ab7312, 0x00ab6db7, 0x00ab685c,
106 0x0156db6e, 0x00ab6db7, 0x0055b6db, 0x02fd, 0x0157 }, 106 0x0156db6e, 0x00ab6db7, 0x0055b6db, 0x02fd, 0x0157 },
107 { 20480000, BANDWIDTH_7_MHZ, 107 { 20480000, 7000000,
108 0x03200000, 0x01900000, 0x00c80640, 0x00c80000, 0x00c7f9c0, 108 0x03200000, 0x01900000, 0x00c80640, 0x00c80000, 0x00c7f9c0,
109 0x01900000, 0x00c80000, 0x00640000, 0x028f, 0x0190 }, 109 0x01900000, 0x00c80000, 0x00640000, 0x028f, 0x0190 },
110 { 20480000, BANDWIDTH_8_MHZ, 110 { 20480000, 8000000,
111 0x03924925, 0x01c92492, 0x00e4996e, 0x00e49249, 0x00e48b25, 111 0x03924925, 0x01c92492, 0x00e4996e, 0x00e49249, 0x00e48b25,
112 0x01c92492, 0x00e49249, 0x00724925, 0x023d, 0x01c9 }, 112 0x01c92492, 0x00e49249, 0x00724925, 0x023d, 0x01c9 },
113 { 20480000, BANDWIDTH_5_MHZ, 113 { 20480000, 5000000,
114 0x023b6db7, 0x011db6db, 0x008edfe5, 0x008edb6e, 0x008ed6f7, 114 0x023b6db7, 0x011db6db, 0x008edfe5, 0x008edb6e, 0x008ed6f7,
115 0x011db6db, 0x008edb6e, 0x00476db7, 0x0396, 0x011e } 115 0x011db6db, 0x008edb6e, 0x00476db7, 0x0396, 0x011e }
116}; 116};
117 117
118static struct adctable tab7[] = { 118static struct adctable tab7[] = {
119 { 20500000, BANDWIDTH_6_MHZ, 119 { 20500000, 6000000,
120 0x02ad0b99, 0x015685cc, 0x00ab4840, 0x00ab42e6, 0x00ab3d8c, 120 0x02ad0b99, 0x015685cc, 0x00ab4840, 0x00ab42e6, 0x00ab3d8c,
121 0x015685cc, 0x00ab42e6, 0x0055a173, 0x02fd, 0x0157 }, 121 0x015685cc, 0x00ab42e6, 0x0055a173, 0x02fd, 0x0157 },
122 { 20500000, BANDWIDTH_7_MHZ, 122 { 20500000, 7000000,
123 0x031f3832, 0x018f9c19, 0x00c7d44b, 0x00c7ce0c, 0x00c7c7ce, 123 0x031f3832, 0x018f9c19, 0x00c7d44b, 0x00c7ce0c, 0x00c7c7ce,
124 0x018f9c19, 0x00c7ce0c, 0x0063e706, 0x0290, 0x0190 }, 124 0x018f9c19, 0x00c7ce0c, 0x0063e706, 0x0290, 0x0190 },
125 { 20500000, BANDWIDTH_8_MHZ, 125 { 20500000, 8000000,
126 0x039164cb, 0x01c8b266, 0x00e46056, 0x00e45933, 0x00e45210, 126 0x039164cb, 0x01c8b266, 0x00e46056, 0x00e45933, 0x00e45210,
127 0x01c8b266, 0x00e45933, 0x00722c99, 0x023e, 0x01c9 }, 127 0x01c8b266, 0x00e45933, 0x00722c99, 0x023e, 0x01c9 },
128 { 20500000, BANDWIDTH_5_MHZ, 128 { 20500000, 5000000,
129 0x023adeff, 0x011d6f80, 0x008ebc36, 0x008eb7c0, 0x008eb34a, 129 0x023adeff, 0x011d6f80, 0x008ebc36, 0x008eb7c0, 0x008eb34a,
130 0x011d6f80, 0x008eb7c0, 0x00475be0, 0x0396, 0x011d } 130 0x011d6f80, 0x008eb7c0, 0x00475be0, 0x0396, 0x011d }
131 131
132}; 132};
133 133
134static struct adctable tab8[] = { 134static struct adctable tab8[] = {
135 { 20625000, BANDWIDTH_6_MHZ, 135 { 20625000, 6000000,
136 0x02a8e4bd, 0x0154725e, 0x00aa3e81, 0x00aa392f, 0x00aa33de, 136 0x02a8e4bd, 0x0154725e, 0x00aa3e81, 0x00aa392f, 0x00aa33de,
137 0x0154725e, 0x00aa392f, 0x00551c98, 0x0302, 0x0154 }, 137 0x0154725e, 0x00aa392f, 0x00551c98, 0x0302, 0x0154 },
138 { 20625000, BANDWIDTH_7_MHZ, 138 { 20625000, 7000000,
139 0x031a6032, 0x018d3019, 0x00c69e41, 0x00c6980c, 0x00c691d8, 139 0x031a6032, 0x018d3019, 0x00c69e41, 0x00c6980c, 0x00c691d8,
140 0x018d3019, 0x00c6980c, 0x00634c06, 0x0294, 0x018d }, 140 0x018d3019, 0x00c6980c, 0x00634c06, 0x0294, 0x018d },
141 { 20625000, BANDWIDTH_8_MHZ, 141 { 20625000, 8000000,
142 0x038bdba6, 0x01c5edd3, 0x00e2fe02, 0x00e2f6ea, 0x00e2efd2, 142 0x038bdba6, 0x01c5edd3, 0x00e2fe02, 0x00e2f6ea, 0x00e2efd2,
143 0x01c5edd3, 0x00e2f6ea, 0x00717b75, 0x0242, 0x01c6 }, 143 0x01c5edd3, 0x00e2f6ea, 0x00717b75, 0x0242, 0x01c6 },
144 { 20625000, BANDWIDTH_5_MHZ, 144 { 20625000, 5000000,
145 0x02376948, 0x011bb4a4, 0x008ddec1, 0x008dda52, 0x008dd5e3, 145 0x02376948, 0x011bb4a4, 0x008ddec1, 0x008dda52, 0x008dd5e3,
146 0x011bb4a4, 0x008dda52, 0x0046ed29, 0x039c, 0x011c } 146 0x011bb4a4, 0x008dda52, 0x0046ed29, 0x039c, 0x011c }
147 147
@@ -153,8 +153,7 @@ struct table {
153}; 153};
154 154
155static struct table fe_clockTable[] = { 155static struct table fe_clockTable[] = {
156 {12000000, tab3}, /* FPGA */ 156 {12000000, tab3}, /* 12.00MHz */
157 {16384000, tab6}, /* 16.38MHz */
158 {20480000, tab6}, /* 20.48MHz */ 157 {20480000, tab6}, /* 20.48MHz */
159 {36000000, tab3}, /* 36.00MHz */ 158 {36000000, tab3}, /* 36.00MHz */
160 {30000000, tab1}, /* 30.00MHz */ 159 {30000000, tab1}, /* 30.00MHz */
@@ -164,7 +163,6 @@ static struct table fe_clockTable[] = {
164 {34000000, tab2}, /* 34.00MHz */ 163 {34000000, tab2}, /* 34.00MHz */
165 {24000000, tab1}, /* 24.00MHz */ 164 {24000000, tab1}, /* 24.00MHz */
166 {22000000, tab8}, /* 22.00MHz */ 165 {22000000, tab8}, /* 22.00MHz */
167 {12000000, tab3} /* 12.00MHz */
168}; 166};
169 167
170/* fe get */ 168/* fe get */
@@ -205,6 +203,10 @@ fe_modulation_t fe_con[] = {
205 203
206/* Standard demodulator functions */ 204/* Standard demodulator functions */
207static struct it913xset set_solo_fe[] = { 205static struct it913xset set_solo_fe[] = {
206 {PRO_LINK, GPIOH5_EN, {0x01}, 0x01},
207 {PRO_LINK, GPIOH5_ON, {0x01}, 0x01},
208 {PRO_LINK, GPIOH5_O, {0x00}, 0x01},
209 {PRO_LINK, GPIOH5_O, {0x01}, 0x01},
208 {PRO_LINK, DVBT_INTEN, {0x04}, 0x01}, 210 {PRO_LINK, DVBT_INTEN, {0x04}, 0x01},
209 {PRO_LINK, DVBT_ENABLE, {0x05}, 0x01}, 211 {PRO_LINK, DVBT_ENABLE, {0x05}, 0x01},
210 {PRO_DMOD, MP2IF_MPEG_PAR_MODE, {0x00}, 0x01}, 212 {PRO_DMOD, MP2IF_MPEG_PAR_MODE, {0x00}, 0x01},
@@ -228,13 +230,127 @@ static struct it913xset init_1[] = {
228 {PRO_LINK, LOCK3_OUT, {0x01}, 0x01}, 230 {PRO_LINK, LOCK3_OUT, {0x01}, 0x01},
229 {PRO_LINK, PADMISCDRSR, {0x01}, 0x01}, 231 {PRO_LINK, PADMISCDRSR, {0x01}, 0x01},
230 {PRO_LINK, PADMISCDR2, {0x00}, 0x01}, 232 {PRO_LINK, PADMISCDR2, {0x00}, 0x01},
233 {PRO_DMOD, 0xec57, {0x00, 0x00}, 0x02},
231 {PRO_LINK, PADMISCDR4, {0x00}, 0x01}, /* Power up */ 234 {PRO_LINK, PADMISCDR4, {0x00}, 0x01}, /* Power up */
232 {PRO_LINK, PADMISCDR8, {0x00}, 0x01}, 235 {PRO_LINK, PADMISCDR8, {0x00}, 0x01},
233 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */ 236 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
234}; 237};
235 238
236/* ---------IT9137 0x38 tuner init---------- */ 239
237static struct it913xset it9137_set[] = { 240/* Version 1 types */
241static struct it913xset it9135_v1[] = {
242 {PRO_DMOD, 0x0051, {0x01}, 0x01},
243 {PRO_DMOD, 0x0070, {0x0a}, 0x01},
244 {PRO_DMOD, 0x007e, {0x04}, 0x01},
245 {PRO_DMOD, 0x0081, {0x0a}, 0x01},
246 {PRO_DMOD, 0x008a, {0x01}, 0x01},
247 {PRO_DMOD, 0x008e, {0x01}, 0x01},
248 {PRO_DMOD, 0x0092, {0x06}, 0x01},
249 {PRO_DMOD, 0x0099, {0x01}, 0x01},
250 {PRO_DMOD, 0x009f, {0xe1}, 0x01},
251 {PRO_DMOD, 0x00a0, {0xcf}, 0x01},
252 {PRO_DMOD, 0x00a3, {0x01}, 0x01},
253 {PRO_DMOD, 0x00a5, {0x01}, 0x01},
254 {PRO_DMOD, 0x00a6, {0x01}, 0x01},
255 {PRO_DMOD, 0x00a9, {0x00}, 0x01},
256 {PRO_DMOD, 0x00aa, {0x01}, 0x01},
257 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
258 {PRO_DMOD, 0x00c2, {0x05}, 0x01},
259 {PRO_DMOD, 0x00c6, {0x19}, 0x01},
260 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
261 {PRO_DMOD, 0xf016, {0x10}, 0x01},
262 {PRO_DMOD, 0xf017, {0x04}, 0x01},
263 {PRO_DMOD, 0xf018, {0x05}, 0x01},
264 {PRO_DMOD, 0xf019, {0x04}, 0x01},
265 {PRO_DMOD, 0xf01a, {0x05}, 0x01},
266 {PRO_DMOD, 0xf021, {0x03}, 0x01},
267 {PRO_DMOD, 0xf022, {0x0a}, 0x01},
268 {PRO_DMOD, 0xf023, {0x0a}, 0x01},
269 {PRO_DMOD, 0xf02b, {0x00}, 0x01},
270 {PRO_DMOD, 0xf02c, {0x01}, 0x01},
271 {PRO_DMOD, 0xf064, {0x03}, 0x01},
272 {PRO_DMOD, 0xf065, {0xf9}, 0x01},
273 {PRO_DMOD, 0xf066, {0x03}, 0x01},
274 {PRO_DMOD, 0xf067, {0x01}, 0x01},
275 {PRO_DMOD, 0xf06f, {0xe0}, 0x01},
276 {PRO_DMOD, 0xf070, {0x03}, 0x01},
277 {PRO_DMOD, 0xf072, {0x0f}, 0x01},
278 {PRO_DMOD, 0xf073, {0x03}, 0x01},
279 {PRO_DMOD, 0xf078, {0x00}, 0x01},
280 {PRO_DMOD, 0xf087, {0x00}, 0x01},
281 {PRO_DMOD, 0xf09b, {0x3f}, 0x01},
282 {PRO_DMOD, 0xf09c, {0x00}, 0x01},
283 {PRO_DMOD, 0xf09d, {0x20}, 0x01},
284 {PRO_DMOD, 0xf09e, {0x00}, 0x01},
285 {PRO_DMOD, 0xf09f, {0x0c}, 0x01},
286 {PRO_DMOD, 0xf0a0, {0x00}, 0x01},
287 {PRO_DMOD, 0xf130, {0x04}, 0x01},
288 {PRO_DMOD, 0xf132, {0x04}, 0x01},
289 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
290 {PRO_DMOD, 0xf146, {0x00}, 0x01},
291 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
292 {PRO_DMOD, 0xf14c, {0x00}, 0x01},
293 {PRO_DMOD, 0xf14d, {0x00}, 0x01},
294 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
295 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
296 {PRO_DMOD, 0xf15a, {0x00}, 0x01},
297 {PRO_DMOD, 0xf15b, {0x08}, 0x01},
298 {PRO_DMOD, 0xf15d, {0x03}, 0x01},
299 {PRO_DMOD, 0xf15e, {0x05}, 0x01},
300 {PRO_DMOD, 0xf163, {0x05}, 0x01},
301 {PRO_DMOD, 0xf166, {0x01}, 0x01},
302 {PRO_DMOD, 0xf167, {0x40}, 0x01},
303 {PRO_DMOD, 0xf168, {0x0f}, 0x01},
304 {PRO_DMOD, 0xf17a, {0x00}, 0x01},
305 {PRO_DMOD, 0xf17b, {0x00}, 0x01},
306 {PRO_DMOD, 0xf183, {0x01}, 0x01},
307 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
308 {PRO_DMOD, 0xf1bc, {0x36}, 0x01},
309 {PRO_DMOD, 0xf1bd, {0x00}, 0x01},
310 {PRO_DMOD, 0xf1cb, {0xa0}, 0x01},
311 {PRO_DMOD, 0xf1cc, {0x01}, 0x01},
312 {PRO_DMOD, 0xf204, {0x10}, 0x01},
313 {PRO_DMOD, 0xf214, {0x00}, 0x01},
314 {PRO_DMOD, 0xf40e, {0x0a}, 0x01},
315 {PRO_DMOD, 0xf40f, {0x40}, 0x01},
316 {PRO_DMOD, 0xf410, {0x08}, 0x01},
317 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
318 {PRO_DMOD, 0xf561, {0x15}, 0x01},
319 {PRO_DMOD, 0xf562, {0x20}, 0x01},
320 {PRO_DMOD, 0xf5df, {0xfb}, 0x01},
321 {PRO_DMOD, 0xf5e0, {0x00}, 0x01},
322 {PRO_DMOD, 0xf5e3, {0x09}, 0x01},
323 {PRO_DMOD, 0xf5e4, {0x01}, 0x01},
324 {PRO_DMOD, 0xf5e5, {0x01}, 0x01},
325 {PRO_DMOD, 0xf5f8, {0x01}, 0x01},
326 {PRO_DMOD, 0xf5fd, {0x01}, 0x01},
327 {PRO_DMOD, 0xf600, {0x05}, 0x01},
328 {PRO_DMOD, 0xf601, {0x08}, 0x01},
329 {PRO_DMOD, 0xf602, {0x0b}, 0x01},
330 {PRO_DMOD, 0xf603, {0x0e}, 0x01},
331 {PRO_DMOD, 0xf604, {0x11}, 0x01},
332 {PRO_DMOD, 0xf605, {0x14}, 0x01},
333 {PRO_DMOD, 0xf606, {0x17}, 0x01},
334 {PRO_DMOD, 0xf607, {0x1f}, 0x01},
335 {PRO_DMOD, 0xf60e, {0x00}, 0x01},
336 {PRO_DMOD, 0xf60f, {0x04}, 0x01},
337 {PRO_DMOD, 0xf610, {0x32}, 0x01},
338 {PRO_DMOD, 0xf611, {0x10}, 0x01},
339 {PRO_DMOD, 0xf707, {0xfc}, 0x01},
340 {PRO_DMOD, 0xf708, {0x00}, 0x01},
341 {PRO_DMOD, 0xf709, {0x37}, 0x01},
342 {PRO_DMOD, 0xf70a, {0x00}, 0x01},
343 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
344 {PRO_DMOD, 0xf80f, {0x40}, 0x01},
345 {PRO_DMOD, 0xf810, {0x54}, 0x01},
346 {PRO_DMOD, 0xf811, {0x5a}, 0x01},
347 {PRO_DMOD, 0xf905, {0x01}, 0x01},
348 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
349 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
350 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
351};
352
353static struct it913xset it9135_38[] = {
238 {PRO_DMOD, 0x0043, {0x00}, 0x01}, 354 {PRO_DMOD, 0x0043, {0x00}, 0x01},
239 {PRO_DMOD, 0x0046, {0x38}, 0x01}, 355 {PRO_DMOD, 0x0046, {0x38}, 0x01},
240 {PRO_DMOD, 0x0051, {0x01}, 0x01}, 356 {PRO_DMOD, 0x0051, {0x01}, 0x01},
@@ -244,7 +360,7 @@ static struct it913xset it9137_set[] = {
244 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0xc8, 0x01}, 0x05}, 360 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0xc8, 0x01}, 0x05},
245 {PRO_DMOD, 0x007e, {0x04, 0x00}, 0x02}, 361 {PRO_DMOD, 0x007e, {0x04, 0x00}, 0x02},
246 {PRO_DMOD, 0x0081, { 0x0a, 0x12, 0x02, 0x0a, 0x03, 0xc8, 0xb8, 362 {PRO_DMOD, 0x0081, { 0x0a, 0x12, 0x02, 0x0a, 0x03, 0xc8, 0xb8,
247 0xd0, 0xc3, 0x01 }, 0x0a}, 363 0xd0, 0xc3, 0x01}, 0x0a},
248 {PRO_DMOD, 0x008e, {0x01}, 0x01}, 364 {PRO_DMOD, 0x008e, {0x01}, 0x01},
249 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05}, 365 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05},
250 {PRO_DMOD, 0x0099, {0x01}, 0x01}, 366 {PRO_DMOD, 0x0099, {0x01}, 0x01},
@@ -262,15 +378,25 @@ static struct it913xset it9137_set[] = {
262 {PRO_DMOD, 0x00f3, {0x05, 0x8c, 0x8c}, 0x03}, 378 {PRO_DMOD, 0x00f3, {0x05, 0x8c, 0x8c}, 0x03},
263 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03}, 379 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03},
264 {PRO_DMOD, 0x00fc, { 0x02, 0x02, 0x02, 0x09, 0x50, 0x7b, 0x77, 380 {PRO_DMOD, 0x00fc, { 0x02, 0x02, 0x02, 0x09, 0x50, 0x7b, 0x77,
265 0x00, 0x02, 0xc8, 0x05, 0x7b }, 0x0c}, 381 0x00, 0x02, 0xc8, 0x05, 0x7b}, 0x0c},
266 {PRO_DMOD, 0x0109, {0x02}, 0x01}, 382 {PRO_DMOD, 0x0109, {0x02}, 0x01},
267 {PRO_DMOD, 0x0115, {0x0a, 0x03}, 0x02}, 383 {PRO_DMOD, 0x0115, {0x0a, 0x03, 0x02, 0x80}, 0x04},
268 {PRO_DMOD, 0x011a, {0xc8, 0x7b, 0xbc, 0xa0}, 0x04}, 384 {PRO_DMOD, 0x011a, {0xc8, 0x7b, 0x8a, 0xa0}, 0x04},
269 {PRO_DMOD, 0x0122, {0x02, 0x18, 0xc3}, 0x03}, 385 {PRO_DMOD, 0x0122, {0x02, 0x18, 0xc3}, 0x03},
270 {PRO_DMOD, 0x0127, {0x00, 0x07}, 0x02}, 386 {PRO_DMOD, 0x0127, {0x00, 0x07}, 0x02},
271 {PRO_DMOD, 0x012a, {0x53, 0x51, 0x4e, 0x43}, 0x04}, 387 {PRO_DMOD, 0x012a, {0x53, 0x51, 0x4e, 0x43}, 0x04},
272 {PRO_DMOD, 0x0137, {0x01, 0x00, 0x07, 0x00, 0x06}, 0x05}, 388 {PRO_DMOD, 0x0137, {0x01, 0x00, 0x07, 0x00, 0x06}, 0x05},
273 {PRO_DMOD, 0x013d, {0x00, 0x01, 0x5b, 0xc8}, 0x04}, 389 {PRO_DMOD, 0x013d, {0x00, 0x01, 0x5b, 0xc8, 0x59}, 0x05},
390 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
391 {PRO_DMOD, 0xf016, {0x10, 0x04, 0x05, 0x04, 0x05}, 0x05},
392 {PRO_DMOD, 0xf01f, {0x8c, 0x00, 0x03, 0x0a, 0x0a}, 0x05},
393 {PRO_DMOD, 0xf029, {0x8c, 0x00, 0x00, 0x01}, 0x04},
394 {PRO_DMOD, 0xf064, {0x03, 0xf9, 0x03, 0x01}, 0x04},
395 {PRO_DMOD, 0xf06f, {0xe0, 0x03}, 0x02},
396 {PRO_DMOD, 0xf072, {0x0f, 0x03}, 0x02},
397 {PRO_DMOD, 0xf077, {0x01, 0x00}, 0x02},
398 {PRO_DMOD, 0xf085, {0x00, 0x02, 0x00}, 0x03},
399 {PRO_DMOD, 0xf09b, {0x3f, 0x00, 0x20, 0x00, 0x0c, 0x00}, 0x06},
274 {PRO_DMOD, 0xf130, {0x04}, 0x01}, 400 {PRO_DMOD, 0xf130, {0x04}, 0x01},
275 {PRO_DMOD, 0xf132, {0x04}, 0x01}, 401 {PRO_DMOD, 0xf132, {0x04}, 0x01},
276 {PRO_DMOD, 0xf144, {0x1a}, 0x01}, 402 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
@@ -301,7 +427,7 @@ static struct it913xset it9137_set[] = {
301 {PRO_DMOD, 0xf5f8, {0x01}, 0x01}, 427 {PRO_DMOD, 0xf5f8, {0x01}, 0x01},
302 {PRO_DMOD, 0xf5fd, {0x01}, 0x01}, 428 {PRO_DMOD, 0xf5fd, {0x01}, 0x01},
303 {PRO_DMOD, 0xf600, { 0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17, 429 {PRO_DMOD, 0xf600, { 0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17,
304 0x1f }, 0x08}, 430 0x1f}, 0x08},
305 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04}, 431 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04},
306 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04}, 432 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04},
307 {PRO_DMOD, 0xf78b, {0x01}, 0x01}, 433 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
@@ -309,21 +435,605 @@ static struct it913xset it9137_set[] = {
309 {PRO_DMOD, 0xf905, {0x01}, 0x01}, 435 {PRO_DMOD, 0xf905, {0x01}, 0x01},
310 {PRO_DMOD, 0xfb06, {0x03}, 0x01}, 436 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
311 {PRO_DMOD, 0xfd8b, {0x00}, 0x01}, 437 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
312 {PRO_LINK, GPIOH5_EN, {0x01}, 0x01}, 438 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
313 {PRO_LINK, GPIOH5_ON, {0x01}, 0x01}, 439};
314 {PRO_LINK, GPIOH5_O, {0x00}, 0x01}, 440
315 {PRO_LINK, GPIOH5_O, {0x01}, 0x01}, 441static struct it913xset it9135_51[] = {
316 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */ 442 {PRO_DMOD, 0x0043, {0x00}, 0x01},
443 {PRO_DMOD, 0x0046, {0x51}, 0x01},
444 {PRO_DMOD, 0x0051, {0x01}, 0x01},
445 {PRO_DMOD, 0x005f, {0x00, 0x00}, 0x02},
446 {PRO_DMOD, 0x0068, {0x0a}, 0x01},
447 {PRO_DMOD, 0x0070, {0x0a, 0x06, 0x02}, 0x03},
448 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0xc8, 0x01}, 0x05},
449 {PRO_DMOD, 0x007e, {0x04, 0x00}, 0x02},
450 {PRO_DMOD, 0x0081, { 0x0a, 0x12, 0x02, 0x0a, 0x03, 0xc0, 0x96,
451 0xcf, 0xc3, 0x01}, 0x0a},
452 {PRO_DMOD, 0x008e, {0x01}, 0x01},
453 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05},
454 {PRO_DMOD, 0x0099, {0x01}, 0x01},
455 {PRO_DMOD, 0x009b, {0x3c, 0x28}, 0x02},
456 {PRO_DMOD, 0x009f, {0xe1, 0xcf}, 0x02},
457 {PRO_DMOD, 0x00a3, {0x01, 0x5a, 0x01, 0x01}, 0x04},
458 {PRO_DMOD, 0x00a9, {0x00, 0x01}, 0x02},
459 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
460 {PRO_DMOD, 0x00b3, {0x02, 0x3c}, 0x02},
461 {PRO_DMOD, 0x00b6, {0x14}, 0x01},
462 {PRO_DMOD, 0x00c0, {0x11, 0x00, 0x05}, 0x03},
463 {PRO_DMOD, 0x00c4, {0x00}, 0x01},
464 {PRO_DMOD, 0x00c6, {0x19, 0x00}, 0x02},
465 {PRO_DMOD, 0x00cc, {0x2e, 0x51, 0x33}, 0x03},
466 {PRO_DMOD, 0x00f3, {0x05, 0x8c, 0x8c}, 0x03},
467 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03},
468 {PRO_DMOD, 0x00fc, { 0x03, 0x02, 0x02, 0x09, 0x50, 0x7a, 0x77,
469 0x01, 0x02, 0xb0, 0x02, 0x7a}, 0x0c},
470 {PRO_DMOD, 0x0109, {0x02}, 0x01},
471 {PRO_DMOD, 0x0115, {0x0a, 0x03, 0x02, 0x80}, 0x04},
472 {PRO_DMOD, 0x011a, {0xc0, 0x7a, 0xac, 0x8c}, 0x04},
473 {PRO_DMOD, 0x0122, {0x02, 0x70, 0xa4}, 0x03},
474 {PRO_DMOD, 0x0127, {0x00, 0x07}, 0x02},
475 {PRO_DMOD, 0x012a, {0x53, 0x51, 0x4e, 0x43}, 0x04},
476 {PRO_DMOD, 0x0137, {0x01, 0x00, 0x07, 0x00, 0x06}, 0x05},
477 {PRO_DMOD, 0x013d, {0x00, 0x01, 0x5b, 0xc0, 0x59}, 0x05},
478 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
479 {PRO_DMOD, 0xf016, {0x10, 0x04, 0x05, 0x04, 0x05}, 0x05},
480 {PRO_DMOD, 0xf01f, {0x8c, 0x00, 0x03, 0x0a, 0x0a}, 0x05},
481 {PRO_DMOD, 0xf029, {0x8c, 0x00, 0x00, 0x01}, 0x04},
482 {PRO_DMOD, 0xf064, {0x03, 0xf9, 0x03, 0x01}, 0x04},
483 {PRO_DMOD, 0xf06f, {0xe0, 0x03}, 0x02},
484 {PRO_DMOD, 0xf072, {0x0f, 0x03}, 0x02},
485 {PRO_DMOD, 0xf077, {0x01, 0x00}, 0x02},
486 {PRO_DMOD, 0xf085, {0xc0, 0x01, 0x00}, 0x03},
487 {PRO_DMOD, 0xf09b, {0x3f, 0x00, 0x20, 0x00, 0x0c, 0x00}, 0x06},
488 {PRO_DMOD, 0xf130, {0x04}, 0x01},
489 {PRO_DMOD, 0xf132, {0x04}, 0x01},
490 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
491 {PRO_DMOD, 0xf146, {0x00}, 0x01},
492 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
493 {PRO_DMOD, 0xf14c, {0x00, 0x00}, 0x02},
494 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
495 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
496 {PRO_DMOD, 0xf15a, {0x00, 0x08}, 0x02},
497 {PRO_DMOD, 0xf15d, {0x03, 0x05}, 0x02},
498 {PRO_DMOD, 0xf163, {0x05}, 0x01},
499 {PRO_DMOD, 0xf166, {0x01, 0x40, 0x0f}, 0x03},
500 {PRO_DMOD, 0xf17a, {0x00, 0x00}, 0x02},
501 {PRO_DMOD, 0xf183, {0x01}, 0x01},
502 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
503 {PRO_DMOD, 0xf1bc, {0x36, 0x00}, 0x02},
504 {PRO_DMOD, 0xf1cb, {0xa0, 0x01}, 0x02},
505 {PRO_DMOD, 0xf204, {0x10}, 0x01},
506 {PRO_DMOD, 0xf214, {0x00}, 0x01},
507 {PRO_DMOD, 0xf24c, {0x88, 0x95, 0x9a, 0x90}, 0x04},
508 {PRO_DMOD, 0xf25a, {0x07, 0xe8, 0x03, 0xb0, 0x04}, 0x05},
509 {PRO_DMOD, 0xf270, {0x01, 0x02, 0x01, 0x02}, 0x04},
510 {PRO_DMOD, 0xf40e, {0x0a, 0x40, 0x08}, 0x03},
511 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
512 {PRO_DMOD, 0xf561, {0x15, 0x20}, 0x02},
513 {PRO_DMOD, 0xf5df, {0xfb, 0x00}, 0x02},
514 {PRO_DMOD, 0xf5e3, {0x09, 0x01, 0x01}, 0x03},
515 {PRO_DMOD, 0xf5f8, {0x01}, 0x01},
516 {PRO_DMOD, 0xf5fd, {0x01}, 0x01},
517 {PRO_DMOD, 0xf600, { 0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17,
518 0x1f}, 0x08},
519 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04},
520 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04},
521 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
522 {PRO_DMOD, 0xf80f, {0x40, 0x54, 0x5a}, 0x03},
523 {PRO_DMOD, 0xf905, {0x01}, 0x01},
524 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
525 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
526 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
527};
528
529static struct it913xset it9135_52[] = {
530 {PRO_DMOD, 0x0043, {0x00}, 0x01},
531 {PRO_DMOD, 0x0046, {0x52}, 0x01},
532 {PRO_DMOD, 0x0051, {0x01}, 0x01},
533 {PRO_DMOD, 0x005f, {0x00, 0x00}, 0x02},
534 {PRO_DMOD, 0x0068, {0x10}, 0x01},
535 {PRO_DMOD, 0x0070, {0x0a, 0x05, 0x02}, 0x03},
536 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0xa0, 0x01}, 0x05},
537 {PRO_DMOD, 0x007e, {0x04, 0x00}, 0x02},
538 {PRO_DMOD, 0x0081, { 0x0a, 0x12, 0x03, 0x0a, 0x03, 0xb3, 0x97,
539 0xc0, 0x9e, 0x01}, 0x0a},
540 {PRO_DMOD, 0x008e, {0x01}, 0x01},
541 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05},
542 {PRO_DMOD, 0x0099, {0x01}, 0x01},
543 {PRO_DMOD, 0x009b, {0x3c, 0x28}, 0x02},
544 {PRO_DMOD, 0x009f, {0xe1, 0xcf}, 0x02},
545 {PRO_DMOD, 0x00a3, {0x01, 0x5c, 0x01, 0x01}, 0x04},
546 {PRO_DMOD, 0x00a9, {0x00, 0x01}, 0x02},
547 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
548 {PRO_DMOD, 0x00b3, {0x02, 0x3c}, 0x02},
549 {PRO_DMOD, 0x00b6, {0x14}, 0x01},
550 {PRO_DMOD, 0x00c0, {0x11, 0x00, 0x05}, 0x03},
551 {PRO_DMOD, 0x00c4, {0x00}, 0x01},
552 {PRO_DMOD, 0x00c6, {0x19, 0x00}, 0x02},
553 {PRO_DMOD, 0x00cc, {0x2e, 0x51, 0x33}, 0x03},
554 {PRO_DMOD, 0x00f3, {0x05, 0x91, 0x8c}, 0x03},
555 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03},
556 {PRO_DMOD, 0x00fc, { 0x03, 0x02, 0x02, 0x09, 0x50, 0x74, 0x77,
557 0x02, 0x02, 0xae, 0x02, 0x6e}, 0x0c},
558 {PRO_DMOD, 0x0109, {0x02}, 0x01},
559 {PRO_DMOD, 0x0115, {0x0a, 0x03, 0x02, 0x80}, 0x04},
560 {PRO_DMOD, 0x011a, {0xcd, 0x62, 0xa4, 0x8c}, 0x04},
561 {PRO_DMOD, 0x0122, {0x03, 0x18, 0x9e}, 0x03},
562 {PRO_DMOD, 0x0127, {0x00, 0x07}, 0x02},
563 {PRO_DMOD, 0x012a, {0x53, 0x51, 0x4e, 0x43}, 0x04},
564 {PRO_DMOD, 0x0137, {0x00, 0x00, 0x07, 0x00, 0x06}, 0x05},
565 {PRO_DMOD, 0x013d, {0x00, 0x01, 0x5b, 0xb6, 0x59}, 0x05},
566 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
567 {PRO_DMOD, 0xf016, {0x10, 0x04, 0x05, 0x04, 0x05}, 0x05},
568 {PRO_DMOD, 0xf01f, {0x8c, 0x00, 0x03, 0x0a, 0x0a}, 0x05},
569 {PRO_DMOD, 0xf029, {0x8c, 0x00, 0x00, 0x01}, 0x04},
570 {PRO_DMOD, 0xf064, {0x03, 0xf9, 0x03, 0x01}, 0x04},
571 {PRO_DMOD, 0xf06f, {0xe0, 0x03}, 0x02},
572 {PRO_DMOD, 0xf072, {0x0f, 0x03}, 0x02},
573 {PRO_DMOD, 0xf077, {0x01, 0x00}, 0x02},
574 {PRO_DMOD, 0xf085, {0xc0, 0x01, 0x00}, 0x03},
575 {PRO_DMOD, 0xf09b, {0x3f, 0x00, 0x20, 0x00, 0x0c, 0x00}, 0x06},
576 {PRO_DMOD, 0xf130, {0x04}, 0x01},
577 {PRO_DMOD, 0xf132, {0x04}, 0x01},
578 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
579 {PRO_DMOD, 0xf146, {0x00}, 0x01},
580 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
581 {PRO_DMOD, 0xf14c, {0x00, 0x00}, 0x02},
582 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
583 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
584 {PRO_DMOD, 0xf15a, {0x00, 0x08}, 0x02},
585 {PRO_DMOD, 0xf15d, {0x03, 0x05}, 0x02},
586 {PRO_DMOD, 0xf163, {0x05}, 0x01},
587 {PRO_DMOD, 0xf166, {0x01, 0x40, 0x0f}, 0x03},
588 {PRO_DMOD, 0xf17a, {0x00, 0x00}, 0x02},
589 {PRO_DMOD, 0xf183, {0x01}, 0x01},
590 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
591 {PRO_DMOD, 0xf1bc, {0x36, 0x00}, 0x02},
592 {PRO_DMOD, 0xf1cb, {0xa0, 0x01}, 0x02},
593 {PRO_DMOD, 0xf204, {0x10}, 0x01},
594 {PRO_DMOD, 0xf214, {0x00}, 0x01},
595 {PRO_DMOD, 0xf24c, {0x88, 0x95, 0x9a, 0x90}, 0x04},
596 {PRO_DMOD, 0xf25a, {0x07, 0xe8, 0x03, 0xb0, 0x04}, 0x05},
597 {PRO_DMOD, 0xf270, {0x01, 0x02, 0x01, 0x02}, 0x04},
598 {PRO_DMOD, 0xf40e, {0x0a, 0x40, 0x08}, 0x03},
599 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
600 {PRO_DMOD, 0xf561, {0x15, 0x20}, 0x02},
601 {PRO_DMOD, 0xf5df, {0xfb, 0x00}, 0x02},
602 {PRO_DMOD, 0xf5e3, {0x09, 0x01, 0x01}, 0x03},
603 {PRO_DMOD, 0xf5f8, {0x01}, 0x01},
604 {PRO_DMOD, 0xf5fd, {0x01}, 0x01},
605 {PRO_DMOD, 0xf600, {0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17,
606 0x1f}, 0x08},
607 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04},
608 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04},
609 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
610 {PRO_DMOD, 0xf80f, {0x40, 0x54, 0x5a}, 0x03},
611 {PRO_DMOD, 0xf905, {0x01}, 0x01},
612 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
613 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
614 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
317}; 615};
318 616
617/* Version 2 types */
618static struct it913xset it9135_v2[] = {
619 {PRO_DMOD, 0x0051, {0x01}, 0x01},
620 {PRO_DMOD, 0x0070, {0x0a}, 0x01},
621 {PRO_DMOD, 0x007e, {0x04}, 0x01},
622 {PRO_DMOD, 0x0081, {0x0a}, 0x01},
623 {PRO_DMOD, 0x008a, {0x01}, 0x01},
624 {PRO_DMOD, 0x008e, {0x01}, 0x01},
625 {PRO_DMOD, 0x0092, {0x06}, 0x01},
626 {PRO_DMOD, 0x0099, {0x01}, 0x01},
627 {PRO_DMOD, 0x009f, {0xe1}, 0x01},
628 {PRO_DMOD, 0x00a0, {0xcf}, 0x01},
629 {PRO_DMOD, 0x00a3, {0x01}, 0x01},
630 {PRO_DMOD, 0x00a5, {0x01}, 0x01},
631 {PRO_DMOD, 0x00a6, {0x01}, 0x01},
632 {PRO_DMOD, 0x00a9, {0x00}, 0x01},
633 {PRO_DMOD, 0x00aa, {0x01}, 0x01},
634 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
635 {PRO_DMOD, 0x00c2, {0x05}, 0x01},
636 {PRO_DMOD, 0x00c6, {0x19}, 0x01},
637 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
638 {PRO_DMOD, 0xf02b, {0x00}, 0x01},
639 {PRO_DMOD, 0xf064, {0x03}, 0x01},
640 {PRO_DMOD, 0xf065, {0xf9}, 0x01},
641 {PRO_DMOD, 0xf066, {0x03}, 0x01},
642 {PRO_DMOD, 0xf067, {0x01}, 0x01},
643 {PRO_DMOD, 0xf06f, {0xe0}, 0x01},
644 {PRO_DMOD, 0xf070, {0x03}, 0x01},
645 {PRO_DMOD, 0xf072, {0x0f}, 0x01},
646 {PRO_DMOD, 0xf073, {0x03}, 0x01},
647 {PRO_DMOD, 0xf078, {0x00}, 0x01},
648 {PRO_DMOD, 0xf087, {0x00}, 0x01},
649 {PRO_DMOD, 0xf09b, {0x3f}, 0x01},
650 {PRO_DMOD, 0xf09c, {0x00}, 0x01},
651 {PRO_DMOD, 0xf09d, {0x20}, 0x01},
652 {PRO_DMOD, 0xf09e, {0x00}, 0x01},
653 {PRO_DMOD, 0xf09f, {0x0c}, 0x01},
654 {PRO_DMOD, 0xf0a0, {0x00}, 0x01},
655 {PRO_DMOD, 0xf130, {0x04}, 0x01},
656 {PRO_DMOD, 0xf132, {0x04}, 0x01},
657 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
658 {PRO_DMOD, 0xf146, {0x00}, 0x01},
659 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
660 {PRO_DMOD, 0xf14c, {0x00}, 0x01},
661 {PRO_DMOD, 0xf14d, {0x00}, 0x01},
662 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
663 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
664 {PRO_DMOD, 0xf15a, {0x00}, 0x01},
665 {PRO_DMOD, 0xf15b, {0x08}, 0x01},
666 {PRO_DMOD, 0xf15d, {0x03}, 0x01},
667 {PRO_DMOD, 0xf15e, {0x05}, 0x01},
668 {PRO_DMOD, 0xf163, {0x05}, 0x01},
669 {PRO_DMOD, 0xf166, {0x01}, 0x01},
670 {PRO_DMOD, 0xf167, {0x40}, 0x01},
671 {PRO_DMOD, 0xf168, {0x0f}, 0x01},
672 {PRO_DMOD, 0xf17a, {0x00}, 0x01},
673 {PRO_DMOD, 0xf17b, {0x00}, 0x01},
674 {PRO_DMOD, 0xf183, {0x01}, 0x01},
675 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
676 {PRO_DMOD, 0xf1bc, {0x36}, 0x01},
677 {PRO_DMOD, 0xf1bd, {0x00}, 0x01},
678 {PRO_DMOD, 0xf1cb, {0xa0}, 0x01},
679 {PRO_DMOD, 0xf1cc, {0x01}, 0x01},
680 {PRO_DMOD, 0xf204, {0x10}, 0x01},
681 {PRO_DMOD, 0xf214, {0x00}, 0x01},
682 {PRO_DMOD, 0xf40e, {0x0a}, 0x01},
683 {PRO_DMOD, 0xf40f, {0x40}, 0x01},
684 {PRO_DMOD, 0xf410, {0x08}, 0x01},
685 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
686 {PRO_DMOD, 0xf561, {0x15}, 0x01},
687 {PRO_DMOD, 0xf562, {0x20}, 0x01},
688 {PRO_DMOD, 0xf5e3, {0x09}, 0x01},
689 {PRO_DMOD, 0xf5e4, {0x01}, 0x01},
690 {PRO_DMOD, 0xf5e5, {0x01}, 0x01},
691 {PRO_DMOD, 0xf600, {0x05}, 0x01},
692 {PRO_DMOD, 0xf601, {0x08}, 0x01},
693 {PRO_DMOD, 0xf602, {0x0b}, 0x01},
694 {PRO_DMOD, 0xf603, {0x0e}, 0x01},
695 {PRO_DMOD, 0xf604, {0x11}, 0x01},
696 {PRO_DMOD, 0xf605, {0x14}, 0x01},
697 {PRO_DMOD, 0xf606, {0x17}, 0x01},
698 {PRO_DMOD, 0xf607, {0x1f}, 0x01},
699 {PRO_DMOD, 0xf60e, {0x00}, 0x01},
700 {PRO_DMOD, 0xf60f, {0x04}, 0x01},
701 {PRO_DMOD, 0xf610, {0x32}, 0x01},
702 {PRO_DMOD, 0xf611, {0x10}, 0x01},
703 {PRO_DMOD, 0xf707, {0xfc}, 0x01},
704 {PRO_DMOD, 0xf708, {0x00}, 0x01},
705 {PRO_DMOD, 0xf709, {0x37}, 0x01},
706 {PRO_DMOD, 0xf70a, {0x00}, 0x01},
707 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
708 {PRO_DMOD, 0xf80f, {0x40}, 0x01},
709 {PRO_DMOD, 0xf810, {0x54}, 0x01},
710 {PRO_DMOD, 0xf811, {0x5a}, 0x01},
711 {PRO_DMOD, 0xf905, {0x01}, 0x01},
712 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
713 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
714 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
715};
716
717static struct it913xset it9135_60[] = {
718 {PRO_DMOD, 0x0043, {0x00}, 0x01},
719 {PRO_DMOD, 0x0046, {0x60}, 0x01},
720 {PRO_DMOD, 0x0051, {0x01}, 0x01},
721 {PRO_DMOD, 0x005f, {0x00, 0x00}, 0x02},
722 {PRO_DMOD, 0x0068, {0x0a}, 0x01},
723 {PRO_DMOD, 0x006a, {0x03}, 0x01},
724 {PRO_DMOD, 0x0070, {0x0a, 0x05, 0x02}, 0x03},
725 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0x8c, 0x01}, 0x05},
726 {PRO_DMOD, 0x007e, {0x04}, 0x01},
727 {PRO_DMOD, 0x0081, {0x0a, 0x12}, 0x02},
728 {PRO_DMOD, 0x0084, {0x0a, 0x33, 0xbe, 0xa0, 0xc6, 0xb6, 0x01}, 0x07},
729 {PRO_DMOD, 0x008e, {0x01}, 0x01},
730 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05},
731 {PRO_DMOD, 0x0099, {0x01}, 0x01},
732 {PRO_DMOD, 0x009b, {0x3c, 0x28}, 0x02},
733 {PRO_DMOD, 0x009f, {0xe1, 0xcf}, 0x02},
734 {PRO_DMOD, 0x00a3, {0x01, 0x5a, 0x01, 0x01}, 0x04},
735 {PRO_DMOD, 0x00a9, {0x00, 0x01}, 0x02},
736 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
737 {PRO_DMOD, 0x00b3, {0x02, 0x3a}, 0x02},
738 {PRO_DMOD, 0x00b6, {0x14}, 0x01},
739 {PRO_DMOD, 0x00c0, {0x11, 0x00, 0x05, 0x01, 0x00}, 0x05},
740 {PRO_DMOD, 0x00c6, {0x19, 0x00}, 0x02},
741 {PRO_DMOD, 0x00cb, {0x32, 0x2c, 0x4f, 0x30}, 0x04},
742 {PRO_DMOD, 0x00f3, {0x05, 0xa0, 0x8c}, 0x03},
743 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03},
744 {PRO_DMOD, 0x00fc, { 0x03, 0x03, 0x02, 0x0a, 0x50, 0x7b, 0x8c,
745 0x00, 0x02, 0xbe, 0x00}, 0x0b},
746 {PRO_DMOD, 0x0109, {0x02}, 0x01},
747 {PRO_DMOD, 0x0115, {0x0a, 0x03}, 0x02},
748 {PRO_DMOD, 0x011a, {0xbe}, 0x01},
749 {PRO_DMOD, 0x0124, {0xae}, 0x01},
750 {PRO_DMOD, 0x0127, {0x00}, 0x01},
751 {PRO_DMOD, 0x012a, {0x56, 0x50, 0x47, 0x42}, 0x04},
752 {PRO_DMOD, 0x0137, {0x00}, 0x01},
753 {PRO_DMOD, 0x013b, {0x08}, 0x01},
754 {PRO_DMOD, 0x013f, {0x5b}, 0x01},
755 {PRO_DMOD, 0x0141, { 0x59, 0xf9, 0x19, 0x19, 0x8c, 0x8c, 0x8c,
756 0x6e, 0x8c, 0x50, 0x8c, 0x8c, 0xac, 0xc6,
757 0x33}, 0x0f},
758 {PRO_DMOD, 0x0151, {0x28}, 0x01},
759 {PRO_DMOD, 0x0153, {0xbc}, 0x01},
760 {PRO_DMOD, 0x0178, {0x09}, 0x01},
761 {PRO_DMOD, 0x0181, {0x94, 0x6e}, 0x02},
762 {PRO_DMOD, 0x0185, {0x24}, 0x01},
763 {PRO_DMOD, 0x0187, {0x00, 0x00, 0xbe, 0x02, 0x80}, 0x05},
764 {PRO_DMOD, 0xed02, {0xff}, 0x01},
765 {PRO_DMOD, 0xee42, {0xff}, 0x01},
766 {PRO_DMOD, 0xee82, {0xff}, 0x01},
767 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
768 {PRO_DMOD, 0xf01f, {0x8c, 0x00}, 0x02},
769 {PRO_DMOD, 0xf029, {0x8c, 0x00, 0x00}, 0x03},
770 {PRO_DMOD, 0xf064, {0x03, 0xf9, 0x03, 0x01}, 0x04},
771 {PRO_DMOD, 0xf06f, {0xe0, 0x03}, 0x02},
772 {PRO_DMOD, 0xf072, {0x0f, 0x03}, 0x02},
773 {PRO_DMOD, 0xf077, {0x01, 0x00}, 0x02},
774 {PRO_DMOD, 0xf087, {0x00}, 0x01},
775 {PRO_DMOD, 0xf09b, {0x3f, 0x00, 0x20, 0x00, 0x0c, 0x00}, 0x06},
776 {PRO_DMOD, 0xf130, {0x04}, 0x01},
777 {PRO_DMOD, 0xf132, {0x04}, 0x01},
778 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
779 {PRO_DMOD, 0xf146, {0x00}, 0x01},
780 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
781 {PRO_DMOD, 0xf14c, {0x00, 0x00}, 0x02},
782 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
783 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
784 {PRO_DMOD, 0xf15a, {0x00, 0x08}, 0x02},
785 {PRO_DMOD, 0xf15d, {0x03, 0x05}, 0x02},
786 {PRO_DMOD, 0xf163, {0x05}, 0x01},
787 {PRO_DMOD, 0xf166, {0x01, 0x40, 0x0f}, 0x03},
788 {PRO_DMOD, 0xf17a, {0x00, 0x00}, 0x02},
789 {PRO_DMOD, 0xf183, {0x01}, 0x01},
790 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
791 {PRO_DMOD, 0xf1bc, {0x36, 0x00}, 0x02},
792 {PRO_DMOD, 0xf1cb, {0xa0, 0x01}, 0x02},
793 {PRO_DMOD, 0xf204, {0x10}, 0x01},
794 {PRO_DMOD, 0xf214, {0x00}, 0x01},
795 {PRO_DMOD, 0xf24c, {0x88, 0x95, 0x9a, 0x90}, 0x04},
796 {PRO_DMOD, 0xf25a, {0x07, 0xe8, 0x03, 0xb0, 0x04}, 0x05},
797 {PRO_DMOD, 0xf270, {0x01, 0x02, 0x01, 0x02}, 0x04},
798 {PRO_DMOD, 0xf40e, {0x0a, 0x40, 0x08}, 0x03},
799 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
800 {PRO_DMOD, 0xf561, {0x15, 0x20}, 0x02},
801 {PRO_DMOD, 0xf5e3, {0x09, 0x01, 0x01}, 0x03},
802 {PRO_DMOD, 0xf600, {0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17
803 , 0x1f}, 0x08},
804 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04},
805 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04},
806 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
807 {PRO_DMOD, 0xf80f, {0x40, 0x54, 0x5a}, 0x03},
808 {PRO_DMOD, 0xf905, {0x01}, 0x01},
809 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
810 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
811 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
812};
813
814static struct it913xset it9135_61[] = {
815 {PRO_DMOD, 0x0043, {0x00}, 0x01},
816 {PRO_DMOD, 0x0046, {0x61}, 0x01},
817 {PRO_DMOD, 0x0051, {0x01}, 0x01},
818 {PRO_DMOD, 0x005f, {0x00, 0x00}, 0x02},
819 {PRO_DMOD, 0x0068, {0x06}, 0x01},
820 {PRO_DMOD, 0x006a, {0x03}, 0x01},
821 {PRO_DMOD, 0x0070, {0x0a, 0x05, 0x02}, 0x03},
822 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0x90, 0x01}, 0x05},
823 {PRO_DMOD, 0x007e, {0x04}, 0x01},
824 {PRO_DMOD, 0x0081, {0x0a, 0x12}, 0x02},
825 {PRO_DMOD, 0x0084, {0x0a, 0x33, 0xbc, 0x9c, 0xcc, 0xa8, 0x01}, 0x07},
826 {PRO_DMOD, 0x008e, {0x01}, 0x01},
827 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05},
828 {PRO_DMOD, 0x0099, {0x01}, 0x01},
829 {PRO_DMOD, 0x009b, {0x3c, 0x28}, 0x02},
830 {PRO_DMOD, 0x009f, {0xe1, 0xcf}, 0x02},
831 {PRO_DMOD, 0x00a3, {0x01, 0x5c, 0x01, 0x01}, 0x04},
832 {PRO_DMOD, 0x00a9, {0x00, 0x01}, 0x02},
833 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
834 {PRO_DMOD, 0x00b3, {0x02, 0x3a}, 0x02},
835 {PRO_DMOD, 0x00b6, {0x14}, 0x01},
836 {PRO_DMOD, 0x00c0, {0x11, 0x00, 0x05, 0x01, 0x00}, 0x05},
837 {PRO_DMOD, 0x00c6, {0x19, 0x00}, 0x02},
838 {PRO_DMOD, 0x00cb, {0x32, 0x2c, 0x4f, 0x30}, 0x04},
839 {PRO_DMOD, 0x00f3, {0x05, 0xa0, 0x8c}, 0x03},
840 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03},
841 {PRO_DMOD, 0x00fc, { 0x03, 0x03, 0x02, 0x08, 0x50, 0x7b, 0x8c,
842 0x01, 0x02, 0xc8, 0x00}, 0x0b},
843 {PRO_DMOD, 0x0109, {0x02}, 0x01},
844 {PRO_DMOD, 0x0115, {0x0a, 0x03}, 0x02},
845 {PRO_DMOD, 0x011a, {0xc6}, 0x01},
846 {PRO_DMOD, 0x0124, {0xa8}, 0x01},
847 {PRO_DMOD, 0x0127, {0x00}, 0x01},
848 {PRO_DMOD, 0x012a, {0x59, 0x50, 0x47, 0x42}, 0x04},
849 {PRO_DMOD, 0x0137, {0x00}, 0x01},
850 {PRO_DMOD, 0x013b, {0x05}, 0x01},
851 {PRO_DMOD, 0x013f, {0x5b}, 0x01},
852 {PRO_DMOD, 0x0141, { 0x59, 0xf9, 0x59, 0x59, 0x8c, 0x8c, 0x8c,
853 0x7b, 0x8c, 0x50, 0x8c, 0x8c, 0xa8, 0xc6,
854 0x33}, 0x0f},
855 {PRO_DMOD, 0x0151, {0x28}, 0x01},
856 {PRO_DMOD, 0x0153, {0xcc}, 0x01},
857 {PRO_DMOD, 0x0178, {0x09}, 0x01},
858 {PRO_DMOD, 0x0181, {0x9c, 0x76}, 0x02},
859 {PRO_DMOD, 0x0185, {0x28}, 0x01},
860 {PRO_DMOD, 0x0187, {0x01, 0x00, 0xaa, 0x02, 0x80}, 0x05},
861 {PRO_DMOD, 0xed02, {0xff}, 0x01},
862 {PRO_DMOD, 0xee42, {0xff}, 0x01},
863 {PRO_DMOD, 0xee82, {0xff}, 0x01},
864 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
865 {PRO_DMOD, 0xf01f, {0x8c, 0x00}, 0x02},
866 {PRO_DMOD, 0xf029, {0x8c, 0x00, 0x00}, 0x03},
867 {PRO_DMOD, 0xf064, {0x03, 0xf9, 0x03, 0x01}, 0x04},
868 {PRO_DMOD, 0xf06f, {0xe0, 0x03}, 0x02},
869 {PRO_DMOD, 0xf072, {0x0f, 0x03}, 0x02},
870 {PRO_DMOD, 0xf077, {0x01, 0x00}, 0x02},
871 {PRO_DMOD, 0xf087, {0x00}, 0x01},
872 {PRO_DMOD, 0xf09b, {0x3f, 0x00, 0x20, 0x00, 0x0c, 0x00}, 0x06},
873 {PRO_DMOD, 0xf130, {0x04}, 0x01},
874 {PRO_DMOD, 0xf132, {0x04}, 0x01},
875 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
876 {PRO_DMOD, 0xf146, {0x00}, 0x01},
877 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
878 {PRO_DMOD, 0xf14c, {0x00, 0x00}, 0x02},
879 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
880 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
881 {PRO_DMOD, 0xf15a, {0x00, 0x08}, 0x02},
882 {PRO_DMOD, 0xf15d, {0x03, 0x05}, 0x02},
883 {PRO_DMOD, 0xf163, {0x05}, 0x01},
884 {PRO_DMOD, 0xf166, {0x01, 0x40, 0x0f}, 0x03},
885 {PRO_DMOD, 0xf17a, {0x00, 0x00}, 0x02},
886 {PRO_DMOD, 0xf183, {0x01}, 0x01},
887 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
888 {PRO_DMOD, 0xf1bc, {0x36, 0x00}, 0x02},
889 {PRO_DMOD, 0xf1cb, {0xa0, 0x01}, 0x02},
890 {PRO_DMOD, 0xf204, {0x10}, 0x01},
891 {PRO_DMOD, 0xf214, {0x00}, 0x01},
892 {PRO_DMOD, 0xf24c, {0x88, 0x95, 0x9a, 0x90}, 0x04},
893 {PRO_DMOD, 0xf25a, {0x07, 0xe8, 0x03, 0xb0, 0x04}, 0x05},
894 {PRO_DMOD, 0xf270, {0x01, 0x02, 0x01, 0x02}, 0x04},
895 {PRO_DMOD, 0xf40e, {0x0a, 0x40, 0x08}, 0x03},
896 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
897 {PRO_DMOD, 0xf561, {0x15, 0x20}, 0x02},
898 {PRO_DMOD, 0xf5e3, {0x09, 0x01, 0x01}, 0x03},
899 {PRO_DMOD, 0xf600, { 0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17,
900 0x1f}, 0x08},
901 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04},
902 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04},
903 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
904 {PRO_DMOD, 0xf80f, {0x40, 0x54, 0x5a}, 0x03},
905 {PRO_DMOD, 0xf905, {0x01}, 0x01},
906 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
907 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
908 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
909};
910
911static struct it913xset it9135_62[] = {
912 {PRO_DMOD, 0x0043, {0x00}, 0x01},
913 {PRO_DMOD, 0x0046, {0x62}, 0x01},
914 {PRO_DMOD, 0x0051, {0x01}, 0x01},
915 {PRO_DMOD, 0x005f, {0x00, 0x00}, 0x02},
916 {PRO_DMOD, 0x0068, {0x0a}, 0x01},
917 {PRO_DMOD, 0x006a, {0x03}, 0x01},
918 {PRO_DMOD, 0x0070, {0x0a, 0x05, 0x02}, 0x03},
919 {PRO_DMOD, 0x0075, {0x8c, 0x8c, 0x8c, 0x8c, 0x01}, 0x05},
920 {PRO_DMOD, 0x007e, {0x04}, 0x01},
921 {PRO_DMOD, 0x0081, {0x0a, 0x12}, 0x02},
922 {PRO_DMOD, 0x0084, { 0x0a, 0x33, 0xb8, 0x9c, 0xb2, 0xa6, 0x01},
923 0x07},
924 {PRO_DMOD, 0x008e, {0x01}, 0x01},
925 {PRO_DMOD, 0x0092, {0x06, 0x00, 0x00, 0x00, 0x00}, 0x05},
926 {PRO_DMOD, 0x0099, {0x01}, 0x01},
927 {PRO_DMOD, 0x009b, {0x3c, 0x28}, 0x02},
928 {PRO_DMOD, 0x009f, {0xe1, 0xcf}, 0x02},
929 {PRO_DMOD, 0x00a3, {0x01, 0x5a, 0x01, 0x01}, 0x04},
930 {PRO_DMOD, 0x00a9, {0x00, 0x01}, 0x02},
931 {PRO_DMOD, 0x00b0, {0x01}, 0x01},
932 {PRO_DMOD, 0x00b3, {0x02, 0x3a}, 0x02},
933 {PRO_DMOD, 0x00b6, {0x14}, 0x01},
934 {PRO_DMOD, 0x00c0, {0x11, 0x00, 0x05, 0x01, 0x00}, 0x05},
935 {PRO_DMOD, 0x00c6, {0x19, 0x00}, 0x02},
936 {PRO_DMOD, 0x00cb, {0x32, 0x2c, 0x4f, 0x30}, 0x04},
937 {PRO_DMOD, 0x00f3, {0x05, 0x8c, 0x8c}, 0x03},
938 {PRO_DMOD, 0x00f8, {0x03, 0x06, 0x06}, 0x03},
939 {PRO_DMOD, 0x00fc, { 0x02, 0x03, 0x02, 0x09, 0x50, 0x6e, 0x8c,
940 0x02, 0x02, 0xc2, 0x00}, 0x0b},
941 {PRO_DMOD, 0x0109, {0x02}, 0x01},
942 {PRO_DMOD, 0x0115, {0x0a, 0x03}, 0x02},
943 {PRO_DMOD, 0x011a, {0xb8}, 0x01},
944 {PRO_DMOD, 0x0124, {0xa8}, 0x01},
945 {PRO_DMOD, 0x0127, {0x00}, 0x01},
946 {PRO_DMOD, 0x012a, {0x53, 0x51, 0x4e, 0x43}, 0x04},
947 {PRO_DMOD, 0x0137, {0x00}, 0x01},
948 {PRO_DMOD, 0x013b, {0x05}, 0x01},
949 {PRO_DMOD, 0x013f, {0x5b}, 0x01},
950 {PRO_DMOD, 0x0141, { 0x59, 0xf9, 0x59, 0x19, 0x8c, 0x8c, 0x8c,
951 0x7b, 0x8c, 0x50, 0x70, 0x8c, 0x96, 0xd0,
952 0x33}, 0x0f},
953 {PRO_DMOD, 0x0151, {0x28}, 0x01},
954 {PRO_DMOD, 0x0153, {0xb2}, 0x01},
955 {PRO_DMOD, 0x0178, {0x09}, 0x01},
956 {PRO_DMOD, 0x0181, {0x9c, 0x6e}, 0x02},
957 {PRO_DMOD, 0x0185, {0x24}, 0x01},
958 {PRO_DMOD, 0x0187, {0x00, 0x00, 0xb8, 0x02, 0x80}, 0x05},
959 {PRO_DMOD, 0xed02, {0xff}, 0x01},
960 {PRO_DMOD, 0xee42, {0xff}, 0x01},
961 {PRO_DMOD, 0xee82, {0xff}, 0x01},
962 {PRO_DMOD, 0xf000, {0x0f}, 0x01},
963 {PRO_DMOD, 0xf01f, {0x8c, 0x00}, 0x02},
964 {PRO_DMOD, 0xf029, {0x8c, 0x00, 0x00}, 0x03},
965 {PRO_DMOD, 0xf064, {0x03, 0xf9, 0x03, 0x01}, 0x04},
966 {PRO_DMOD, 0xf06f, {0xe0, 0x03}, 0x02},
967 {PRO_DMOD, 0xf072, {0x0f, 0x03}, 0x02},
968 {PRO_DMOD, 0xf077, {0x01, 0x00}, 0x02},
969 {PRO_DMOD, 0xf087, {0x00}, 0x01},
970 {PRO_DMOD, 0xf09b, {0x3f, 0x00, 0x20, 0x00, 0x0c, 0x00}, 0x06},
971 {PRO_DMOD, 0xf130, {0x04}, 0x01},
972 {PRO_DMOD, 0xf132, {0x04}, 0x01},
973 {PRO_DMOD, 0xf144, {0x1a}, 0x01},
974 {PRO_DMOD, 0xf146, {0x00}, 0x01},
975 {PRO_DMOD, 0xf14a, {0x01}, 0x01},
976 {PRO_DMOD, 0xf14c, {0x00, 0x00}, 0x02},
977 {PRO_DMOD, 0xf14f, {0x04}, 0x01},
978 {PRO_DMOD, 0xf158, {0x7f}, 0x01},
979 {PRO_DMOD, 0xf15a, {0x00, 0x08}, 0x02},
980 {PRO_DMOD, 0xf15d, {0x03, 0x05}, 0x02},
981 {PRO_DMOD, 0xf163, {0x05}, 0x01},
982 {PRO_DMOD, 0xf166, {0x01, 0x40, 0x0f}, 0x03},
983 {PRO_DMOD, 0xf17a, {0x00, 0x00}, 0x02},
984 {PRO_DMOD, 0xf183, {0x01}, 0x01},
985 {PRO_DMOD, 0xf19d, {0x40}, 0x01},
986 {PRO_DMOD, 0xf1bc, {0x36, 0x00}, 0x02},
987 {PRO_DMOD, 0xf1cb, {0xa0, 0x01}, 0x02},
988 {PRO_DMOD, 0xf204, {0x10}, 0x01},
989 {PRO_DMOD, 0xf214, {0x00}, 0x01},
990 {PRO_DMOD, 0xf24c, {0x88, 0x95, 0x9a, 0x90}, 0x04},
991 {PRO_DMOD, 0xf25a, {0x07, 0xe8, 0x03, 0xb0, 0x04}, 0x05},
992 {PRO_DMOD, 0xf270, {0x01, 0x02, 0x01, 0x02}, 0x04},
993 {PRO_DMOD, 0xf40e, {0x0a, 0x40, 0x08}, 0x03},
994 {PRO_DMOD, 0xf55f, {0x0a}, 0x01},
995 {PRO_DMOD, 0xf561, {0x15, 0x20}, 0x02},
996 {PRO_DMOD, 0xf5e3, {0x09, 0x01, 0x01}, 0x03},
997 {PRO_DMOD, 0xf600, { 0x05, 0x08, 0x0b, 0x0e, 0x11, 0x14, 0x17,
998 0x1f}, 0x08},
999 {PRO_DMOD, 0xf60e, {0x00, 0x04, 0x32, 0x10}, 0x04},
1000 {PRO_DMOD, 0xf707, {0xfc, 0x00, 0x37, 0x00}, 0x04},
1001 {PRO_DMOD, 0xf78b, {0x01}, 0x01},
1002 {PRO_DMOD, 0xf80f, {0x40, 0x54, 0x5a}, 0x03},
1003 {PRO_DMOD, 0xf905, {0x01}, 0x01},
1004 {PRO_DMOD, 0xfb06, {0x03}, 0x01},
1005 {PRO_DMOD, 0xfd8b, {0x00}, 0x01},
1006 {0xff, 0x0000, {0x00}, 0x00} /* Terminating Entry */
1007};
1008
1009/* Tuner setting scripts (still keeping it9137) */
319static struct it913xset it9137_tuner_off[] = { 1010static struct it913xset it9137_tuner_off[] = {
320 {PRO_DMOD, 0xfba8, {0x01}, 0x01}, /* Tuner Clock Off */ 1011 {PRO_DMOD, 0xfba8, {0x01}, 0x01}, /* Tuner Clock Off */
321 {PRO_DMOD, 0xec40, {0x00}, 0x01}, /* Power Down Tuner */ 1012 {PRO_DMOD, 0xec40, {0x00}, 0x01}, /* Power Down Tuner */
322 {PRO_DMOD, 0xec02, {0x3f, 0x1f, 0x3f, 0x3f}, 0x04}, 1013 {PRO_DMOD, 0xec02, {0x3f, 0x1f, 0x3f, 0x3f}, 0x04},
1014 {PRO_DMOD, 0xec06, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1015 0x00, 0x00, 0x00, 0x00}, 0x0c},
1016 {PRO_DMOD, 0xec12, {0x00, 0x00, 0x00, 0x00}, 0x04},
1017 {PRO_DMOD, 0xec17, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1018 0x00}, 0x09},
1019 {PRO_DMOD, 0xec22, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1020 0x00, 0x00}, 0x0a},
1021 {PRO_DMOD, 0xec20, {0x00}, 0x01},
323 {PRO_DMOD, 0xec3f, {0x01}, 0x01}, 1022 {PRO_DMOD, 0xec3f, {0x01}, 0x01},
324 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */ 1023 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */
325}; 1024};
326 1025
1026static struct it913xset set_it9135_template[] = {
1027 {PRO_DMOD, 0xee06, {0x00}, 0x01},
1028 {PRO_DMOD, 0xec56, {0x00}, 0x01},
1029 {PRO_DMOD, 0xec4c, {0x00}, 0x01},
1030 {PRO_DMOD, 0xec4d, {0x00}, 0x01},
1031 {PRO_DMOD, 0xec4e, {0x00}, 0x01},
1032 {PRO_DMOD, 0x011e, {0x00}, 0x01}, /* Older Devices */
1033 {PRO_DMOD, 0x011f, {0x00}, 0x01},
1034 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */
1035};
1036
327static struct it913xset set_it9137_template[] = { 1037static struct it913xset set_it9137_template[] = {
328 {PRO_DMOD, 0xee06, {0x00}, 0x01}, 1038 {PRO_DMOD, 0xee06, {0x00}, 0x01},
329 {PRO_DMOD, 0xec56, {0x00}, 0x01}, 1039 {PRO_DMOD, 0xec56, {0x00}, 0x01},
diff --git a/drivers/media/dvb/frontends/it913x-fe.c b/drivers/media/dvb/frontends/it913x-fe.c
index d4bd24eb470..ccc36bf2deb 100644
--- a/drivers/media/dvb/frontends/it913x-fe.c
+++ b/drivers/media/dvb/frontends/it913x-fe.c
@@ -46,13 +46,17 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able)).");
46 dprintk(level, name" (%02x%02x%02x%02x%02x%02x%02x%02x)", \ 46 dprintk(level, name" (%02x%02x%02x%02x%02x%02x%02x%02x)", \
47 *p, *(p+1), *(p+2), *(p+3), *(p+4), \ 47 *p, *(p+1), *(p+2), *(p+3), *(p+4), \
48 *(p+5), *(p+6), *(p+7)); 48 *(p+5), *(p+6), *(p+7));
49#define info(format, arg...) \
50 printk(KERN_INFO "it913x-fe: " format "\n" , ## arg)
49 51
50struct it913x_fe_state { 52struct it913x_fe_state {
51 struct dvb_frontend frontend; 53 struct dvb_frontend frontend;
52 struct i2c_adapter *i2c_adap; 54 struct i2c_adapter *i2c_adap;
55 struct ite_config *config;
53 u8 i2c_addr; 56 u8 i2c_addr;
54 u32 frequency; 57 u32 frequency;
55 u8 adf; 58 fe_modulation_t constellation;
59 fe_transmit_mode_t transmission_mode;
56 u32 crystalFrequency; 60 u32 crystalFrequency;
57 u32 adcFrequency; 61 u32 adcFrequency;
58 u8 tuner_type; 62 u8 tuner_type;
@@ -62,6 +66,7 @@ struct it913x_fe_state {
62 u8 tun_fdiv; 66 u8 tun_fdiv;
63 u8 tun_clk_mode; 67 u8 tun_clk_mode;
64 u32 tun_fn_min; 68 u32 tun_fn_min;
69 u32 ucblocks;
65}; 70};
66 71
67static int it913x_read_reg(struct it913x_fe_state *state, 72static int it913x_read_reg(struct it913x_fe_state *state,
@@ -211,20 +216,24 @@ static int it913x_init_tuner(struct it913x_fe_state *state)
211 state->tun_fn_min /= (state->tun_fdiv * nv_val); 216 state->tun_fn_min /= (state->tun_fdiv * nv_val);
212 deb_info("Tuner fn_min %d", state->tun_fn_min); 217 deb_info("Tuner fn_min %d", state->tun_fn_min);
213 218
214 for (i = 0; i < 50; i++) { 219 if (state->config->chip_ver > 1)
215 reg = it913x_read_reg_u8(state, 0xec82); 220 msleep(50);
216 if (reg > 0) 221 else {
217 break; 222 for (i = 0; i < 50; i++) {
218 if (reg < 0) 223 reg = it913x_read_reg_u8(state, 0xec82);
219 return -ENODEV; 224 if (reg > 0)
220 udelay(2000); 225 break;
226 if (reg < 0)
227 return -ENODEV;
228 udelay(2000);
229 }
221 } 230 }
222 231
223 return it913x_write_reg(state, PRO_DMOD, 0xed81, val); 232 return it913x_write_reg(state, PRO_DMOD, 0xed81, val);
224} 233}
225 234
226static int it9137_set_tuner(struct it913x_fe_state *state, 235static int it9137_set_tuner(struct it913x_fe_state *state,
227 enum fe_bandwidth bandwidth, u32 frequency_m) 236 u32 bandwidth, u32 frequency_m)
228{ 237{
229 struct it913xset *set_tuner = set_it9137_template; 238 struct it913xset *set_tuner = set_it9137_template;
230 int ret, reg; 239 int ret, reg;
@@ -237,6 +246,11 @@ static int it9137_set_tuner(struct it913x_fe_state *state,
237 u8 lna_band; 246 u8 lna_band;
238 u8 bw; 247 u8 bw;
239 248
249 if (state->config->firmware_ver == 1)
250 set_tuner = set_it9135_template;
251 else
252 set_tuner = set_it9137_template;
253
240 deb_info("Tuner Frequency %d Bandwidth %d", frequency, bandwidth); 254 deb_info("Tuner Frequency %d Bandwidth %d", frequency, bandwidth);
241 255
242 if (frequency >= 51000 && frequency <= 440000) { 256 if (frequency >= 51000 && frequency <= 440000) {
@@ -273,16 +287,21 @@ static int it9137_set_tuner(struct it913x_fe_state *state,
273 return -EINVAL; 287 return -EINVAL;
274 set_tuner[0].reg[0] = lna_band; 288 set_tuner[0].reg[0] = lna_band;
275 289
276 if (bandwidth == BANDWIDTH_5_MHZ) 290 switch (bandwidth) {
291 case 5000000:
277 bw = 0; 292 bw = 0;
278 else if (bandwidth == BANDWIDTH_6_MHZ) 293 break;
294 case 6000000:
279 bw = 2; 295 bw = 2;
280 else if (bandwidth == BANDWIDTH_7_MHZ) 296 break;
297 case 7000000:
281 bw = 4; 298 bw = 4;
282 else if (bandwidth == BANDWIDTH_8_MHZ) 299 break;
283 bw = 6; 300 default:
284 else 301 case 8000000:
285 bw = 6; 302 bw = 6;
303 break;
304 }
286 305
287 set_tuner[1].reg[0] = bw; 306 set_tuner[1].reg[0] = bw;
288 set_tuner[2].reg[0] = 0xa0 | (l_band << 3); 307 set_tuner[2].reg[0] = 0xa0 | (l_band << 3);
@@ -361,7 +380,7 @@ static int it9137_set_tuner(struct it913x_fe_state *state,
361} 380}
362 381
363static int it913x_fe_select_bw(struct it913x_fe_state *state, 382static int it913x_fe_select_bw(struct it913x_fe_state *state,
364 enum fe_bandwidth bandwidth, u32 adcFrequency) 383 u32 bandwidth, u32 adcFrequency)
365{ 384{
366 int ret, i; 385 int ret, i;
367 u8 buffer[256]; 386 u8 buffer[256];
@@ -374,17 +393,21 @@ static int it913x_fe_select_bw(struct it913x_fe_state *state,
374 393
375 deb_info("Bandwidth %d Adc %d", bandwidth, adcFrequency); 394 deb_info("Bandwidth %d Adc %d", bandwidth, adcFrequency);
376 395
377 if (bandwidth == BANDWIDTH_5_MHZ) 396 switch (bandwidth) {
397 case 5000000:
378 bw = 3; 398 bw = 3;
379 else if (bandwidth == BANDWIDTH_6_MHZ) 399 break;
400 case 6000000:
380 bw = 0; 401 bw = 0;
381 else if (bandwidth == BANDWIDTH_7_MHZ) 402 break;
403 case 7000000:
382 bw = 1; 404 bw = 1;
383 else if (bandwidth == BANDWIDTH_8_MHZ) 405 break;
384 bw = 2; 406 default:
385 else 407 case 8000000:
386 bw = 2; 408 bw = 2;
387 409 break;
410 }
388 ret = it913x_write_reg(state, PRO_DMOD, REG_BW, bw); 411 ret = it913x_write_reg(state, PRO_DMOD, REG_BW, bw);
389 412
390 if (state->table == NULL) 413 if (state->table == NULL)
@@ -492,31 +515,79 @@ static int it913x_fe_read_signal_strength(struct dvb_frontend *fe,
492 return 0; 515 return 0;
493} 516}
494 517
495static int it913x_fe_read_snr(struct dvb_frontend *fe, u16* snr) 518static int it913x_fe_read_snr(struct dvb_frontend *fe, u16 *snr)
496{ 519{
497 struct it913x_fe_state *state = fe->demodulator_priv; 520 struct it913x_fe_state *state = fe->demodulator_priv;
498 int ret = it913x_read_reg_u8(state, SIGNAL_QUALITY); 521 int ret;
499 ret = (ret * 0xff) / 0x64; 522 u8 reg[3];
500 ret |= (ret << 0x8); 523 u32 snr_val, snr_min, snr_max;
501 *snr = ~ret; 524 u32 temp;
502 return 0; 525
526 ret = it913x_read_reg(state, 0x2c, reg, sizeof(reg));
527
528 snr_val = (u32)(reg[2] << 16) | (reg[1] << 8) | reg[0];
529
530 ret |= it913x_read_reg(state, 0xf78b, reg, 1);
531 if (reg[0])
532 snr_val /= reg[0];
533
534 if (state->transmission_mode == TRANSMISSION_MODE_2K)
535 snr_val *= 4;
536 else if (state->transmission_mode == TRANSMISSION_MODE_4K)
537 snr_val *= 2;
538
539 if (state->constellation == QPSK) {
540 snr_min = 0xb4711;
541 snr_max = 0x191451;
542 } else if (state->constellation == QAM_16) {
543 snr_min = 0x4f0d5;
544 snr_max = 0xc7925;
545 } else if (state->constellation == QAM_64) {
546 snr_min = 0x256d0;
547 snr_max = 0x626be;
548 } else
549 return -EINVAL;
550
551 if (snr_val < snr_min)
552 *snr = 0;
553 else if (snr_val < snr_max) {
554 temp = (snr_val - snr_min) >> 5;
555 temp *= 0xffff;
556 temp /= (snr_max - snr_min) >> 5;
557 *snr = (u16)temp;
558 } else
559 *snr = 0xffff;
560
561 return (ret < 0) ? -ENODEV : 0;
503} 562}
504 563
505static int it913x_fe_read_ber(struct dvb_frontend *fe, u32 *ber) 564static int it913x_fe_read_ber(struct dvb_frontend *fe, u32 *ber)
506{ 565{
507 *ber = 0; 566 struct it913x_fe_state *state = fe->demodulator_priv;
567 int ret;
568 u8 reg[5];
569 /* Read Aborted Packets and Pre-Viterbi error rate 5 bytes */
570 ret = it913x_read_reg(state, RSD_ABORT_PKT_LSB, reg, sizeof(reg));
571 state->ucblocks += (u32)(reg[1] << 8) | reg[0];
572 *ber = (u32)(reg[4] << 16) | (reg[3] << 8) | reg[2];
508 return 0; 573 return 0;
509} 574}
510 575
511static int it913x_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 576static int it913x_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
512{ 577{
513 *ucblocks = 0; 578 struct it913x_fe_state *state = fe->demodulator_priv;
514 return 0; 579 int ret;
580 u8 reg[2];
581 /* Aborted Packets */
582 ret = it913x_read_reg(state, RSD_ABORT_PKT_LSB, reg, sizeof(reg));
583 state->ucblocks += (u32)(reg[1] << 8) | reg[0];
584 *ucblocks = state->ucblocks;
585 return ret;
515} 586}
516 587
517static int it913x_fe_get_frontend(struct dvb_frontend *fe, 588static int it913x_fe_get_frontend(struct dvb_frontend *fe)
518 struct dvb_frontend_parameters *p)
519{ 589{
590 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
520 struct it913x_fe_state *state = fe->demodulator_priv; 591 struct it913x_fe_state *state = fe->demodulator_priv;
521 int ret; 592 int ret;
522 u8 reg[8]; 593 u8 reg[8];
@@ -524,26 +595,30 @@ static int it913x_fe_get_frontend(struct dvb_frontend *fe,
524 ret = it913x_read_reg(state, REG_TPSD_TX_MODE, reg, sizeof(reg)); 595 ret = it913x_read_reg(state, REG_TPSD_TX_MODE, reg, sizeof(reg));
525 596
526 if (reg[3] < 3) 597 if (reg[3] < 3)
527 p->u.ofdm.constellation = fe_con[reg[3]]; 598 p->modulation = fe_con[reg[3]];
528 599
529 if (reg[0] < 3) 600 if (reg[0] < 3)
530 p->u.ofdm.transmission_mode = fe_mode[reg[0]]; 601 p->transmission_mode = fe_mode[reg[0]];
531 602
532 if (reg[1] < 4) 603 if (reg[1] < 4)
533 p->u.ofdm.guard_interval = fe_gi[reg[1]]; 604 p->guard_interval = fe_gi[reg[1]];
534 605
535 if (reg[2] < 4) 606 if (reg[2] < 4)
536 p->u.ofdm.hierarchy_information = fe_hi[reg[2]]; 607 p->hierarchy = fe_hi[reg[2]];
608
609 p->code_rate_HP = (reg[6] < 6) ? fe_code[reg[6]] : FEC_NONE;
610 p->code_rate_LP = (reg[7] < 6) ? fe_code[reg[7]] : FEC_NONE;
537 611
538 p->u.ofdm.code_rate_HP = (reg[6] < 6) ? fe_code[reg[6]] : FEC_NONE; 612 /* Update internal state to reflect the autodetected props */
539 p->u.ofdm.code_rate_LP = (reg[7] < 6) ? fe_code[reg[7]] : FEC_NONE; 613 state->constellation = p->modulation;
614 state->transmission_mode = p->transmission_mode;
540 615
541 return 0; 616 return 0;
542} 617}
543 618
544static int it913x_fe_set_frontend(struct dvb_frontend *fe, 619static int it913x_fe_set_frontend(struct dvb_frontend *fe)
545 struct dvb_frontend_parameters *p)
546{ 620{
621 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
547 struct it913x_fe_state *state = fe->demodulator_priv; 622 struct it913x_fe_state *state = fe->demodulator_priv;
548 int ret, i; 623 int ret, i;
549 u8 empty_ch, last_ch; 624 u8 empty_ch, last_ch;
@@ -551,7 +626,7 @@ static int it913x_fe_set_frontend(struct dvb_frontend *fe,
551 state->it913x_status = 0; 626 state->it913x_status = 0;
552 627
553 /* Set bw*/ 628 /* Set bw*/
554 ret = it913x_fe_select_bw(state, p->u.ofdm.bandwidth, 629 ret = it913x_fe_select_bw(state, p->bandwidth_hz,
555 state->adcFrequency); 630 state->adcFrequency);
556 631
557 /* Training Mode Off */ 632 /* Training Mode Off */
@@ -571,20 +646,25 @@ static int it913x_fe_set_frontend(struct dvb_frontend *fe,
571 i = 1; 646 i = 1;
572 else if ((p->frequency >= 1450000000) && (p->frequency <= 1680000000)) 647 else if ((p->frequency >= 1450000000) && (p->frequency <= 1680000000))
573 i = 2; 648 i = 2;
574 else 649 else
575 return -EOPNOTSUPP; 650 return -EOPNOTSUPP;
576 651
577 ret = it913x_write_reg(state, PRO_DMOD, FREE_BAND, i); 652 ret = it913x_write_reg(state, PRO_DMOD, FREE_BAND, i);
578 653
579 deb_info("Frontend Set Tuner Type %02x", state->tuner_type); 654 deb_info("Frontend Set Tuner Type %02x", state->tuner_type);
580 switch (state->tuner_type) { 655 switch (state->tuner_type) {
581 case IT9137: /* Tuner type 0x38 */ 656 case IT9135_38:
657 case IT9135_51:
658 case IT9135_52:
659 case IT9135_60:
660 case IT9135_61:
661 case IT9135_62:
582 ret = it9137_set_tuner(state, 662 ret = it9137_set_tuner(state,
583 p->u.ofdm.bandwidth, p->frequency); 663 p->bandwidth_hz, p->frequency);
584 break; 664 break;
585 default: 665 default:
586 if (fe->ops.tuner_ops.set_params) { 666 if (fe->ops.tuner_ops.set_params) {
587 fe->ops.tuner_ops.set_params(fe, p); 667 fe->ops.tuner_ops.set_params(fe);
588 if (fe->ops.i2c_gate_ctrl) 668 if (fe->ops.i2c_gate_ctrl)
589 fe->ops.i2c_gate_ctrl(fe, 0); 669 fe->ops.i2c_gate_ctrl(fe, 0);
590 } 670 }
@@ -678,16 +758,19 @@ static u32 compute_div(u32 a, u32 b, u32 x)
678 758
679static int it913x_fe_start(struct it913x_fe_state *state) 759static int it913x_fe_start(struct it913x_fe_state *state)
680{ 760{
681 struct it913xset *set_fe; 761 struct it913xset *set_lna;
682 struct it913xset *set_mode; 762 struct it913xset *set_mode;
683 int ret; 763 int ret;
684 u8 adf = (state->adf & 0xf); 764 u8 adf = (state->config->adf & 0xf);
685 u32 adc, xtal; 765 u32 adc, xtal;
686 u8 b[4]; 766 u8 b[4];
687 767
688 ret = it913x_init_tuner(state); 768 if (state->config->chip_ver == 1)
769 ret = it913x_init_tuner(state);
770
771 info("ADF table value :%02x", adf);
689 772
690 if (adf < 12) { 773 if (adf < 10) {
691 state->crystalFrequency = fe_clockTable[adf].xtal ; 774 state->crystalFrequency = fe_clockTable[adf].xtal ;
692 state->table = fe_clockTable[adf].table; 775 state->table = fe_clockTable[adf].table;
693 state->adcFrequency = state->table->adcFrequency; 776 state->adcFrequency = state->table->adcFrequency;
@@ -698,9 +781,6 @@ static int it913x_fe_start(struct it913x_fe_state *state)
698 } else 781 } else
699 return -EINVAL; 782 return -EINVAL;
700 783
701 deb_info("Xtal Freq :%d Adc Freq :%d Adc %08x Xtal %08x",
702 state->crystalFrequency, state->adcFrequency, adc, xtal);
703
704 /* Set LED indicator on GPIOH3 */ 784 /* Set LED indicator on GPIOH3 */
705 ret = it913x_write_reg(state, PRO_LINK, GPIOH3_EN, 0x1); 785 ret = it913x_write_reg(state, PRO_LINK, GPIOH3_EN, 0x1);
706 ret |= it913x_write_reg(state, PRO_LINK, GPIOH3_ON, 0x1); 786 ret |= it913x_write_reg(state, PRO_LINK, GPIOH3_ON, 0x1);
@@ -721,22 +801,71 @@ static int it913x_fe_start(struct it913x_fe_state *state)
721 b[2] = (adc >> 16) & 0xff; 801 b[2] = (adc >> 16) & 0xff;
722 ret |= it913x_write(state, PRO_DMOD, ADC_FREQ, b, 3); 802 ret |= it913x_write(state, PRO_DMOD, ADC_FREQ, b, 3);
723 803
804 if (state->config->adc_x2)
805 ret |= it913x_write_reg(state, PRO_DMOD, ADC_X_2, 0x01);
806 b[0] = 0;
807 b[1] = 0;
808 b[2] = 0;
809 ret |= it913x_write(state, PRO_DMOD, 0x0029, b, 3);
810
811 info("Crystal Frequency :%d Adc Frequency :%d ADC X2: %02x",
812 state->crystalFrequency, state->adcFrequency,
813 state->config->adc_x2);
814 deb_info("Xtal value :%04x Adc value :%04x", xtal, adc);
815
816 if (ret < 0)
817 return -ENODEV;
818
819 /* v1 or v2 tuner script */
820 if (state->config->chip_ver > 1)
821 ret = it913x_fe_script_loader(state, it9135_v2);
822 else
823 ret = it913x_fe_script_loader(state, it9135_v1);
824 if (ret < 0)
825 return ret;
826
827 /* LNA Scripts */
724 switch (state->tuner_type) { 828 switch (state->tuner_type) {
725 case IT9137: /* Tuner type 0x38 */ 829 case IT9135_51:
726 set_fe = it9137_set; 830 set_lna = it9135_51;
831 break;
832 case IT9135_52:
833 set_lna = it9135_52;
834 break;
835 case IT9135_60:
836 set_lna = it9135_60;
837 break;
838 case IT9135_61:
839 set_lna = it9135_61;
727 break; 840 break;
841 case IT9135_62:
842 set_lna = it9135_62;
843 break;
844 case IT9135_38:
728 default: 845 default:
729 return -EINVAL; 846 set_lna = it9135_38;
730 } 847 }
848 info("Tuner LNA type :%02x", state->tuner_type);
849
850 ret = it913x_fe_script_loader(state, set_lna);
851 if (ret < 0)
852 return ret;
853
854 if (state->config->chip_ver == 2) {
855 ret = it913x_write_reg(state, PRO_DMOD, TRIGGER_OFSM, 0x1);
856 ret |= it913x_write_reg(state, PRO_LINK, PADODPU, 0x0);
857 ret |= it913x_write_reg(state, PRO_LINK, AGC_O_D, 0x0);
858 ret |= it913x_init_tuner(state);
859 }
860 if (ret < 0)
861 return -ENODEV;
731 862
732 /* set the demod */
733 ret = it913x_fe_script_loader(state, set_fe);
734 /* Always solo frontend */ 863 /* Always solo frontend */
735 set_mode = set_solo_fe; 864 set_mode = set_solo_fe;
736 ret |= it913x_fe_script_loader(state, set_mode); 865 ret |= it913x_fe_script_loader(state, set_mode);
737 866
738 ret |= it913x_fe_suspend(state); 867 ret |= it913x_fe_suspend(state);
739 return 0; 868 return (ret < 0) ? -ENODEV : 0;
740} 869}
741 870
742static int it913x_fe_init(struct dvb_frontend *fe) 871static int it913x_fe_init(struct dvb_frontend *fe)
@@ -746,17 +875,11 @@ static int it913x_fe_init(struct dvb_frontend *fe)
746 /* Power Up Tuner - common all versions */ 875 /* Power Up Tuner - common all versions */
747 ret = it913x_write_reg(state, PRO_DMOD, 0xec40, 0x1); 876 ret = it913x_write_reg(state, PRO_DMOD, 0xec40, 0x1);
748 877
749 ret |= it913x_write_reg(state, PRO_DMOD, AFE_MEM0, 0x0);
750
751 ret |= it913x_fe_script_loader(state, init_1); 878 ret |= it913x_fe_script_loader(state, init_1);
752 879
753 switch (state->tuner_type) { 880 ret |= it913x_write_reg(state, PRO_DMOD, AFE_MEM0, 0x0);
754 case IT9137: 881
755 ret |= it913x_write_reg(state, PRO_DMOD, 0xfba8, 0x0); 882 ret |= it913x_write_reg(state, PRO_DMOD, 0xfba8, 0x0);
756 break;
757 default:
758 return -EINVAL;
759 }
760 883
761 return (ret < 0) ? -ENODEV : 0; 884 return (ret < 0) ? -ENODEV : 0;
762} 885}
@@ -770,19 +893,34 @@ static void it913x_fe_release(struct dvb_frontend *fe)
770static struct dvb_frontend_ops it913x_fe_ofdm_ops; 893static struct dvb_frontend_ops it913x_fe_ofdm_ops;
771 894
772struct dvb_frontend *it913x_fe_attach(struct i2c_adapter *i2c_adap, 895struct dvb_frontend *it913x_fe_attach(struct i2c_adapter *i2c_adap,
773 u8 i2c_addr, u8 adf, u8 type) 896 u8 i2c_addr, struct ite_config *config)
774{ 897{
775 struct it913x_fe_state *state = NULL; 898 struct it913x_fe_state *state = NULL;
776 int ret; 899 int ret;
900
777 /* allocate memory for the internal state */ 901 /* allocate memory for the internal state */
778 state = kzalloc(sizeof(struct it913x_fe_state), GFP_KERNEL); 902 state = kzalloc(sizeof(struct it913x_fe_state), GFP_KERNEL);
779 if (state == NULL) 903 if (state == NULL)
904 return NULL;
905 if (config == NULL)
780 goto error; 906 goto error;
781 907
782 state->i2c_adap = i2c_adap; 908 state->i2c_adap = i2c_adap;
783 state->i2c_addr = i2c_addr; 909 state->i2c_addr = i2c_addr;
784 state->adf = adf; 910 state->config = config;
785 state->tuner_type = type; 911
912 switch (state->config->tuner_id_0) {
913 case IT9135_51:
914 case IT9135_52:
915 case IT9135_60:
916 case IT9135_61:
917 case IT9135_62:
918 state->tuner_type = state->config->tuner_id_0;
919 break;
920 default:
921 case IT9135_38:
922 state->tuner_type = IT9135_38;
923 }
786 924
787 ret = it913x_fe_start(state); 925 ret = it913x_fe_start(state);
788 if (ret < 0) 926 if (ret < 0)
@@ -802,10 +940,9 @@ error:
802EXPORT_SYMBOL(it913x_fe_attach); 940EXPORT_SYMBOL(it913x_fe_attach);
803 941
804static struct dvb_frontend_ops it913x_fe_ofdm_ops = { 942static struct dvb_frontend_ops it913x_fe_ofdm_ops = {
805 943 .delsys = { SYS_DVBT },
806 .info = { 944 .info = {
807 .name = "it913x-fe DVB-T", 945 .name = "it913x-fe DVB-T",
808 .type = FE_OFDM,
809 .frequency_min = 51000000, 946 .frequency_min = 51000000,
810 .frequency_max = 1680000000, 947 .frequency_max = 1680000000,
811 .frequency_stepsize = 62500, 948 .frequency_stepsize = 62500,
@@ -835,5 +972,5 @@ static struct dvb_frontend_ops it913x_fe_ofdm_ops = {
835 972
836MODULE_DESCRIPTION("it913x Frontend and it9137 tuner"); 973MODULE_DESCRIPTION("it913x Frontend and it9137 tuner");
837MODULE_AUTHOR("Malcolm Priestley tvboxspy@gmail.com"); 974MODULE_AUTHOR("Malcolm Priestley tvboxspy@gmail.com");
838MODULE_VERSION("1.07"); 975MODULE_VERSION("1.13");
839MODULE_LICENSE("GPL"); 976MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/it913x-fe.h b/drivers/media/dvb/frontends/it913x-fe.h
index 9d97f32e690..c4a908e354e 100644
--- a/drivers/media/dvb/frontends/it913x-fe.h
+++ b/drivers/media/dvb/frontends/it913x-fe.h
@@ -23,13 +23,27 @@
23 23
24#include <linux/dvb/frontend.h> 24#include <linux/dvb/frontend.h>
25#include "dvb_frontend.h" 25#include "dvb_frontend.h"
26
27struct ite_config {
28 u8 chip_ver;
29 u16 chip_type;
30 u32 firmware;
31 u8 firmware_ver;
32 u8 adc_x2;
33 u8 tuner_id_0;
34 u8 tuner_id_1;
35 u8 dual_mode;
36 u8 adf;
37};
38
26#if defined(CONFIG_DVB_IT913X_FE) || (defined(CONFIG_DVB_IT913X_FE_MODULE) && \ 39#if defined(CONFIG_DVB_IT913X_FE) || (defined(CONFIG_DVB_IT913X_FE_MODULE) && \
27defined(MODULE)) 40defined(MODULE))
28extern struct dvb_frontend *it913x_fe_attach(struct i2c_adapter *i2c_adap, 41extern struct dvb_frontend *it913x_fe_attach(struct i2c_adapter *i2c_adap,
29 u8 i2c_addr, u8 adf, u8 type); 42 u8 i2c_addr, struct ite_config *config);
30#else 43#else
31static inline struct dvb_frontend *it913x_fe_attach( 44static inline struct dvb_frontend *it913x_fe_attach(
32 struct i2c_adapter *i2c_adap, u8 i2c_addr, u8 adf, u8 type) 45 struct i2c_adapter *i2c_adap,
46 u8 i2c_addr, struct ite_config *config)
33{ 47{
34 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 48 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
35 return NULL; 49 return NULL;
@@ -134,6 +148,16 @@ static inline struct dvb_frontend *it913x_fe_attach(
134#define COEFF_1_2048 0x0001 148#define COEFF_1_2048 0x0001
135#define XTAL_CLK 0x0025 149#define XTAL_CLK 0x0025
136#define BFS_FCW 0x0029 150#define BFS_FCW 0x0029
151
152/* Error Regs */
153#define RSD_ABORT_PKT_LSB 0x0032
154#define RSD_ABORT_PKT_MSB 0x0033
155#define RSD_BIT_ERR_0_7 0x0034
156#define RSD_BIT_ERR_8_15 0x0035
157#define RSD_BIT_ERR_23_16 0x0036
158#define RSD_BIT_COUNT_LSB 0x0037
159#define RSD_BIT_COUNT_MSB 0x0038
160
137#define TPSD_LOCK 0x003c 161#define TPSD_LOCK 0x003c
138#define TRAINING_MODE 0x0040 162#define TRAINING_MODE 0x0040
139#define ADC_X_2 0x0045 163#define ADC_X_2 0x0045
@@ -144,8 +168,14 @@ static inline struct dvb_frontend *it913x_fe_attach(
144#define EST_SIGNAL_LEVEL 0x004a 168#define EST_SIGNAL_LEVEL 0x004a
145#define FREE_BAND 0x004b 169#define FREE_BAND 0x004b
146#define SUSPEND_FLAG 0x004c 170#define SUSPEND_FLAG 0x004c
147/* Build in tuners */ 171/* Build in tuner types */
148#define IT9137 0x38 172#define IT9137 0x38
173#define IT9135_38 0x38
174#define IT9135_51 0x51
175#define IT9135_52 0x52
176#define IT9135_60 0x60
177#define IT9135_61 0x61
178#define IT9135_62 0x62
149 179
150enum { 180enum {
151 CMD_DEMOD_READ = 0, 181 CMD_DEMOD_READ = 0,
@@ -193,4 +223,11 @@ enum {
193 WRITE_CMD, 223 WRITE_CMD,
194}; 224};
195 225
226enum {
227 IT9135_AUTO = 0,
228 IT9137_FW,
229 IT9135_V1_FW,
230 IT9135_V2_FW,
231};
232
196#endif /* IT913X_FE_H */ 233#endif /* IT913X_FE_H */
diff --git a/drivers/media/dvb/frontends/itd1000.c b/drivers/media/dvb/frontends/itd1000.c
index aa9ccb821fa..316457584fe 100644
--- a/drivers/media/dvb/frontends/itd1000.c
+++ b/drivers/media/dvb/frontends/itd1000.c
@@ -250,13 +250,14 @@ static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz)
250 itd1000_set_vco(state, freq_khz); 250 itd1000_set_vco(state, freq_khz);
251} 251}
252 252
253static int itd1000_set_parameters(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 253static int itd1000_set_parameters(struct dvb_frontend *fe)
254{ 254{
255 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
255 struct itd1000_state *state = fe->tuner_priv; 256 struct itd1000_state *state = fe->tuner_priv;
256 u8 pllcon1; 257 u8 pllcon1;
257 258
258 itd1000_set_lo(state, p->frequency); 259 itd1000_set_lo(state, c->frequency);
259 itd1000_set_lpf_bw(state, p->u.qpsk.symbol_rate); 260 itd1000_set_lpf_bw(state, c->symbol_rate);
260 261
261 pllcon1 = itd1000_read_reg(state, PLLCON1) & 0x7f; 262 pllcon1 = itd1000_read_reg(state, PLLCON1) & 0x7f;
262 itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7)); 263 itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7));
diff --git a/drivers/media/dvb/frontends/ix2505v.c b/drivers/media/dvb/frontends/ix2505v.c
index 9a517a4bf96..bc5a82082aa 100644
--- a/drivers/media/dvb/frontends/ix2505v.c
+++ b/drivers/media/dvb/frontends/ix2505v.c
@@ -129,12 +129,12 @@ static int ix2505v_release(struct dvb_frontend *fe)
129 * 1 -> 8 -> 6 129 * 1 -> 8 -> 6
130 */ 130 */
131 131
132static int ix2505v_set_params(struct dvb_frontend *fe, 132static int ix2505v_set_params(struct dvb_frontend *fe)
133 struct dvb_frontend_parameters *params)
134{ 133{
134 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
135 struct ix2505v_state *state = fe->tuner_priv; 135 struct ix2505v_state *state = fe->tuner_priv;
136 u32 frequency = params->frequency; 136 u32 frequency = c->frequency;
137 u32 b_w = (params->u.qpsk.symbol_rate * 27) / 32000; 137 u32 b_w = (c->symbol_rate * 27) / 32000;
138 u32 div_factor, N , A, x; 138 u32 div_factor, N , A, x;
139 int ret = 0, len; 139 int ret = 0, len;
140 u8 gain, cc, ref, psc, local_osc, lpf; 140 u8 gain, cc, ref, psc, local_osc, lpf;
diff --git a/drivers/media/dvb/frontends/l64781.c b/drivers/media/dvb/frontends/l64781.c
index 445fa106806..36fcf559e36 100644
--- a/drivers/media/dvb/frontends/l64781.c
+++ b/drivers/media/dvb/frontends/l64781.c
@@ -117,18 +117,17 @@ static int reset_and_configure (struct l64781_state* state)
117 return (i2c_transfer(state->i2c, &msg, 1) == 1) ? 0 : -ENODEV; 117 return (i2c_transfer(state->i2c, &msg, 1) == 1) ? 0 : -ENODEV;
118} 118}
119 119
120static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_parameters *param) 120static int apply_frontend_param(struct dvb_frontend *fe)
121{ 121{
122 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
122 struct l64781_state* state = fe->demodulator_priv; 123 struct l64781_state* state = fe->demodulator_priv;
123 /* The coderates for FEC_NONE, FEC_4_5 and FEC_FEC_6_7 are arbitrary */ 124 /* The coderates for FEC_NONE, FEC_4_5 and FEC_FEC_6_7 are arbitrary */
124 static const u8 fec_tab[] = { 7, 0, 1, 2, 9, 3, 10, 4 }; 125 static const u8 fec_tab[] = { 7, 0, 1, 2, 9, 3, 10, 4 };
125 /* QPSK, QAM_16, QAM_64 */ 126 /* QPSK, QAM_16, QAM_64 */
126 static const u8 qam_tab [] = { 2, 4, 0, 6 }; 127 static const u8 qam_tab [] = { 2, 4, 0, 6 };
127 static const u8 bw_tab [] = { 8, 7, 6 }; /* 8Mhz, 7MHz, 6MHz */
128 static const u8 guard_tab [] = { 1, 2, 4, 8 }; 128 static const u8 guard_tab [] = { 1, 2, 4, 8 };
129 /* The Grundig 29504-401.04 Tuner comes with 18.432MHz crystal. */ 129 /* The Grundig 29504-401.04 Tuner comes with 18.432MHz crystal. */
130 static const u32 ppm = 8000; 130 static const u32 ppm = 8000;
131 struct dvb_ofdm_parameters *p = &param->u.ofdm;
132 u32 ddfs_offset_fixed; 131 u32 ddfs_offset_fixed;
133/* u32 ddfs_offset_variable = 0x6000-((1000000UL+ppm)/ */ 132/* u32 ddfs_offset_variable = 0x6000-((1000000UL+ppm)/ */
134/* bw_tab[p->bandWidth]<<10)/15625; */ 133/* bw_tab[p->bandWidth]<<10)/15625; */
@@ -137,18 +136,29 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
137 u8 val0x04; 136 u8 val0x04;
138 u8 val0x05; 137 u8 val0x05;
139 u8 val0x06; 138 u8 val0x06;
140 int bw = p->bandwidth - BANDWIDTH_8_MHZ; 139 int bw;
140
141 switch (p->bandwidth_hz) {
142 case 8000000:
143 bw = 8;
144 break;
145 case 7000000:
146 bw = 7;
147 break;
148 case 6000000:
149 bw = 6;
150 break;
151 default:
152 return -EINVAL;
153 }
141 154
142 if (fe->ops.tuner_ops.set_params) { 155 if (fe->ops.tuner_ops.set_params) {
143 fe->ops.tuner_ops.set_params(fe, param); 156 fe->ops.tuner_ops.set_params(fe);
144 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 157 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
145 } 158 }
146 159
147 if (param->inversion != INVERSION_ON && 160 if (p->inversion != INVERSION_ON &&
148 param->inversion != INVERSION_OFF) 161 p->inversion != INVERSION_OFF)
149 return -EINVAL;
150
151 if (bw < 0 || bw > 2)
152 return -EINVAL; 162 return -EINVAL;
153 163
154 if (p->code_rate_HP != FEC_1_2 && p->code_rate_HP != FEC_2_3 && 164 if (p->code_rate_HP != FEC_1_2 && p->code_rate_HP != FEC_2_3 &&
@@ -156,14 +166,14 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
156 p->code_rate_HP != FEC_7_8) 166 p->code_rate_HP != FEC_7_8)
157 return -EINVAL; 167 return -EINVAL;
158 168
159 if (p->hierarchy_information != HIERARCHY_NONE && 169 if (p->hierarchy != HIERARCHY_NONE &&
160 (p->code_rate_LP != FEC_1_2 && p->code_rate_LP != FEC_2_3 && 170 (p->code_rate_LP != FEC_1_2 && p->code_rate_LP != FEC_2_3 &&
161 p->code_rate_LP != FEC_3_4 && p->code_rate_LP != FEC_5_6 && 171 p->code_rate_LP != FEC_3_4 && p->code_rate_LP != FEC_5_6 &&
162 p->code_rate_LP != FEC_7_8)) 172 p->code_rate_LP != FEC_7_8))
163 return -EINVAL; 173 return -EINVAL;
164 174
165 if (p->constellation != QPSK && p->constellation != QAM_16 && 175 if (p->modulation != QPSK && p->modulation != QAM_16 &&
166 p->constellation != QAM_64) 176 p->modulation != QAM_64)
167 return -EINVAL; 177 return -EINVAL;
168 178
169 if (p->transmission_mode != TRANSMISSION_MODE_2K && 179 if (p->transmission_mode != TRANSMISSION_MODE_2K &&
@@ -174,22 +184,22 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
174 p->guard_interval > GUARD_INTERVAL_1_4) 184 p->guard_interval > GUARD_INTERVAL_1_4)
175 return -EINVAL; 185 return -EINVAL;
176 186
177 if (p->hierarchy_information < HIERARCHY_NONE || 187 if (p->hierarchy < HIERARCHY_NONE ||
178 p->hierarchy_information > HIERARCHY_4) 188 p->hierarchy > HIERARCHY_4)
179 return -EINVAL; 189 return -EINVAL;
180 190
181 ddfs_offset_fixed = 0x4000-(ppm<<16)/bw_tab[p->bandwidth]/1000000; 191 ddfs_offset_fixed = 0x4000-(ppm<<16)/bw/1000000;
182 192
183 /* This works up to 20000 ppm, it overflows if too large ppm! */ 193 /* This works up to 20000 ppm, it overflows if too large ppm! */
184 init_freq = (((8UL<<25) + (8UL<<19) / 25*ppm / (15625/25)) / 194 init_freq = (((8UL<<25) + (8UL<<19) / 25*ppm / (15625/25)) /
185 bw_tab[p->bandwidth] & 0xFFFFFF); 195 bw & 0xFFFFFF);
186 196
187 /* SPI bias calculation is slightly modified to fit in 32bit */ 197 /* SPI bias calculation is slightly modified to fit in 32bit */
188 /* will work for high ppm only... */ 198 /* will work for high ppm only... */
189 spi_bias = 378 * (1 << 10); 199 spi_bias = 378 * (1 << 10);
190 spi_bias *= 16; 200 spi_bias *= 16;
191 spi_bias *= bw_tab[p->bandwidth]; 201 spi_bias *= bw;
192 spi_bias *= qam_tab[p->constellation]; 202 spi_bias *= qam_tab[p->modulation];
193 spi_bias /= p->code_rate_HP + 1; 203 spi_bias /= p->code_rate_HP + 1;
194 spi_bias /= (guard_tab[p->guard_interval] + 32); 204 spi_bias /= (guard_tab[p->guard_interval] + 32);
195 spi_bias *= 1000; 205 spi_bias *= 1000;
@@ -199,10 +209,10 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
199 val0x04 = (p->transmission_mode << 2) | p->guard_interval; 209 val0x04 = (p->transmission_mode << 2) | p->guard_interval;
200 val0x05 = fec_tab[p->code_rate_HP]; 210 val0x05 = fec_tab[p->code_rate_HP];
201 211
202 if (p->hierarchy_information != HIERARCHY_NONE) 212 if (p->hierarchy != HIERARCHY_NONE)
203 val0x05 |= (p->code_rate_LP - FEC_1_2) << 3; 213 val0x05 |= (p->code_rate_LP - FEC_1_2) << 3;
204 214
205 val0x06 = (p->hierarchy_information << 2) | p->constellation; 215 val0x06 = (p->hierarchy << 2) | p->modulation;
206 216
207 l64781_writereg (state, 0x04, val0x04); 217 l64781_writereg (state, 0x04, val0x04);
208 l64781_writereg (state, 0x05, val0x05); 218 l64781_writereg (state, 0x05, val0x05);
@@ -220,7 +230,7 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
220 l64781_writereg (state, 0x1b, spi_bias & 0xff); 230 l64781_writereg (state, 0x1b, spi_bias & 0xff);
221 l64781_writereg (state, 0x1c, (spi_bias >> 8) & 0xff); 231 l64781_writereg (state, 0x1c, (spi_bias >> 8) & 0xff);
222 l64781_writereg (state, 0x1d, ((spi_bias >> 16) & 0x7f) | 232 l64781_writereg (state, 0x1d, ((spi_bias >> 16) & 0x7f) |
223 (param->inversion == INVERSION_ON ? 0x80 : 0x00)); 233 (p->inversion == INVERSION_ON ? 0x80 : 0x00));
224 234
225 l64781_writereg (state, 0x22, ddfs_offset_fixed & 0xff); 235 l64781_writereg (state, 0x22, ddfs_offset_fixed & 0xff);
226 l64781_writereg (state, 0x23, (ddfs_offset_fixed >> 8) & 0x3f); 236 l64781_writereg (state, 0x23, (ddfs_offset_fixed >> 8) & 0x3f);
@@ -233,8 +243,9 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
233 return 0; 243 return 0;
234} 244}
235 245
236static int get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* param) 246static int get_frontend(struct dvb_frontend *fe)
237{ 247{
248 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
238 struct l64781_state* state = fe->demodulator_priv; 249 struct l64781_state* state = fe->demodulator_priv;
239 int tmp; 250 int tmp;
240 251
@@ -242,98 +253,95 @@ static int get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters*
242 tmp = l64781_readreg(state, 0x04); 253 tmp = l64781_readreg(state, 0x04);
243 switch(tmp & 3) { 254 switch(tmp & 3) {
244 case 0: 255 case 0:
245 param->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 256 p->guard_interval = GUARD_INTERVAL_1_32;
246 break; 257 break;
247 case 1: 258 case 1:
248 param->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; 259 p->guard_interval = GUARD_INTERVAL_1_16;
249 break; 260 break;
250 case 2: 261 case 2:
251 param->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; 262 p->guard_interval = GUARD_INTERVAL_1_8;
252 break; 263 break;
253 case 3: 264 case 3:
254 param->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; 265 p->guard_interval = GUARD_INTERVAL_1_4;
255 break; 266 break;
256 } 267 }
257 switch((tmp >> 2) & 3) { 268 switch((tmp >> 2) & 3) {
258 case 0: 269 case 0:
259 param->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; 270 p->transmission_mode = TRANSMISSION_MODE_2K;
260 break; 271 break;
261 case 1: 272 case 1:
262 param->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 273 p->transmission_mode = TRANSMISSION_MODE_8K;
263 break; 274 break;
264 default: 275 default:
265 printk("Unexpected value for transmission_mode\n"); 276 printk(KERN_WARNING "Unexpected value for transmission_mode\n");
266 } 277 }
267 278
268
269
270 tmp = l64781_readreg(state, 0x05); 279 tmp = l64781_readreg(state, 0x05);
271 switch(tmp & 7) { 280 switch(tmp & 7) {
272 case 0: 281 case 0:
273 param->u.ofdm.code_rate_HP = FEC_1_2; 282 p->code_rate_HP = FEC_1_2;
274 break; 283 break;
275 case 1: 284 case 1:
276 param->u.ofdm.code_rate_HP = FEC_2_3; 285 p->code_rate_HP = FEC_2_3;
277 break; 286 break;
278 case 2: 287 case 2:
279 param->u.ofdm.code_rate_HP = FEC_3_4; 288 p->code_rate_HP = FEC_3_4;
280 break; 289 break;
281 case 3: 290 case 3:
282 param->u.ofdm.code_rate_HP = FEC_5_6; 291 p->code_rate_HP = FEC_5_6;
283 break; 292 break;
284 case 4: 293 case 4:
285 param->u.ofdm.code_rate_HP = FEC_7_8; 294 p->code_rate_HP = FEC_7_8;
286 break; 295 break;
287 default: 296 default:
288 printk("Unexpected value for code_rate_HP\n"); 297 printk("Unexpected value for code_rate_HP\n");
289 } 298 }
290 switch((tmp >> 3) & 7) { 299 switch((tmp >> 3) & 7) {
291 case 0: 300 case 0:
292 param->u.ofdm.code_rate_LP = FEC_1_2; 301 p->code_rate_LP = FEC_1_2;
293 break; 302 break;
294 case 1: 303 case 1:
295 param->u.ofdm.code_rate_LP = FEC_2_3; 304 p->code_rate_LP = FEC_2_3;
296 break; 305 break;
297 case 2: 306 case 2:
298 param->u.ofdm.code_rate_LP = FEC_3_4; 307 p->code_rate_LP = FEC_3_4;
299 break; 308 break;
300 case 3: 309 case 3:
301 param->u.ofdm.code_rate_LP = FEC_5_6; 310 p->code_rate_LP = FEC_5_6;
302 break; 311 break;
303 case 4: 312 case 4:
304 param->u.ofdm.code_rate_LP = FEC_7_8; 313 p->code_rate_LP = FEC_7_8;
305 break; 314 break;
306 default: 315 default:
307 printk("Unexpected value for code_rate_LP\n"); 316 printk("Unexpected value for code_rate_LP\n");
308 } 317 }
309 318
310
311 tmp = l64781_readreg(state, 0x06); 319 tmp = l64781_readreg(state, 0x06);
312 switch(tmp & 3) { 320 switch(tmp & 3) {
313 case 0: 321 case 0:
314 param->u.ofdm.constellation = QPSK; 322 p->modulation = QPSK;
315 break; 323 break;
316 case 1: 324 case 1:
317 param->u.ofdm.constellation = QAM_16; 325 p->modulation = QAM_16;
318 break; 326 break;
319 case 2: 327 case 2:
320 param->u.ofdm.constellation = QAM_64; 328 p->modulation = QAM_64;
321 break; 329 break;
322 default: 330 default:
323 printk("Unexpected value for constellation\n"); 331 printk(KERN_WARNING "Unexpected value for modulation\n");
324 } 332 }
325 switch((tmp >> 2) & 7) { 333 switch((tmp >> 2) & 7) {
326 case 0: 334 case 0:
327 param->u.ofdm.hierarchy_information = HIERARCHY_NONE; 335 p->hierarchy = HIERARCHY_NONE;
328 break; 336 break;
329 case 1: 337 case 1:
330 param->u.ofdm.hierarchy_information = HIERARCHY_1; 338 p->hierarchy = HIERARCHY_1;
331 break; 339 break;
332 case 2: 340 case 2:
333 param->u.ofdm.hierarchy_information = HIERARCHY_2; 341 p->hierarchy = HIERARCHY_2;
334 break; 342 break;
335 case 3: 343 case 3:
336 param->u.ofdm.hierarchy_information = HIERARCHY_4; 344 p->hierarchy = HIERARCHY_4;
337 break; 345 break;
338 default: 346 default:
339 printk("Unexpected value for hierarchy\n"); 347 printk("Unexpected value for hierarchy\n");
@@ -341,12 +349,12 @@ static int get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters*
341 349
342 350
343 tmp = l64781_readreg (state, 0x1d); 351 tmp = l64781_readreg (state, 0x1d);
344 param->inversion = (tmp & 0x80) ? INVERSION_ON : INVERSION_OFF; 352 p->inversion = (tmp & 0x80) ? INVERSION_ON : INVERSION_OFF;
345 353
346 tmp = (int) (l64781_readreg (state, 0x08) | 354 tmp = (int) (l64781_readreg (state, 0x08) |
347 (l64781_readreg (state, 0x09) << 8) | 355 (l64781_readreg (state, 0x09) << 8) |
348 (l64781_readreg (state, 0x0a) << 16)); 356 (l64781_readreg (state, 0x0a) << 16));
349 param->frequency += tmp; 357 p->frequency += tmp;
350 358
351 return 0; 359 return 0;
352} 360}
@@ -564,10 +572,9 @@ error:
564} 572}
565 573
566static struct dvb_frontend_ops l64781_ops = { 574static struct dvb_frontend_ops l64781_ops = {
567 575 .delsys = { SYS_DVBT },
568 .info = { 576 .info = {
569 .name = "LSI L64781 DVB-T", 577 .name = "LSI L64781 DVB-T",
570 .type = FE_OFDM,
571 /* .frequency_min = ???,*/ 578 /* .frequency_min = ???,*/
572 /* .frequency_max = ???,*/ 579 /* .frequency_max = ???,*/
573 .frequency_stepsize = 166666, 580 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/lgdt3305.c b/drivers/media/dvb/frontends/lgdt3305.c
index 3272881cb11..1d2c47378cf 100644
--- a/drivers/media/dvb/frontends/lgdt3305.c
+++ b/drivers/media/dvb/frontends/lgdt3305.c
@@ -266,7 +266,7 @@ fail:
266} 266}
267 267
268static int lgdt3305_set_modulation(struct lgdt3305_state *state, 268static int lgdt3305_set_modulation(struct lgdt3305_state *state,
269 struct dvb_frontend_parameters *param) 269 struct dtv_frontend_properties *p)
270{ 270{
271 u8 opermode; 271 u8 opermode;
272 int ret; 272 int ret;
@@ -279,7 +279,7 @@ static int lgdt3305_set_modulation(struct lgdt3305_state *state,
279 279
280 opermode &= ~0x03; 280 opermode &= ~0x03;
281 281
282 switch (param->u.vsb.modulation) { 282 switch (p->modulation) {
283 case VSB_8: 283 case VSB_8:
284 opermode |= 0x03; 284 opermode |= 0x03;
285 break; 285 break;
@@ -298,11 +298,11 @@ fail:
298} 298}
299 299
300static int lgdt3305_set_filter_extension(struct lgdt3305_state *state, 300static int lgdt3305_set_filter_extension(struct lgdt3305_state *state,
301 struct dvb_frontend_parameters *param) 301 struct dtv_frontend_properties *p)
302{ 302{
303 int val; 303 int val;
304 304
305 switch (param->u.vsb.modulation) { 305 switch (p->modulation) {
306 case VSB_8: 306 case VSB_8:
307 val = 0; 307 val = 0;
308 break; 308 break;
@@ -321,11 +321,11 @@ static int lgdt3305_set_filter_extension(struct lgdt3305_state *state,
321/* ------------------------------------------------------------------------ */ 321/* ------------------------------------------------------------------------ */
322 322
323static int lgdt3305_passband_digital_agc(struct lgdt3305_state *state, 323static int lgdt3305_passband_digital_agc(struct lgdt3305_state *state,
324 struct dvb_frontend_parameters *param) 324 struct dtv_frontend_properties *p)
325{ 325{
326 u16 agc_ref; 326 u16 agc_ref;
327 327
328 switch (param->u.vsb.modulation) { 328 switch (p->modulation) {
329 case VSB_8: 329 case VSB_8:
330 agc_ref = 0x32c4; 330 agc_ref = 0x32c4;
331 break; 331 break;
@@ -348,11 +348,11 @@ static int lgdt3305_passband_digital_agc(struct lgdt3305_state *state,
348} 348}
349 349
350static int lgdt3305_rfagc_loop(struct lgdt3305_state *state, 350static int lgdt3305_rfagc_loop(struct lgdt3305_state *state,
351 struct dvb_frontend_parameters *param) 351 struct dtv_frontend_properties *p)
352{ 352{
353 u16 ifbw, rfbw, agcdelay; 353 u16 ifbw, rfbw, agcdelay;
354 354
355 switch (param->u.vsb.modulation) { 355 switch (p->modulation) {
356 case VSB_8: 356 case VSB_8:
357 agcdelay = 0x04c0; 357 agcdelay = 0x04c0;
358 rfbw = 0x8000; 358 rfbw = 0x8000;
@@ -398,11 +398,11 @@ static int lgdt3305_rfagc_loop(struct lgdt3305_state *state,
398} 398}
399 399
400static int lgdt3305_agc_setup(struct lgdt3305_state *state, 400static int lgdt3305_agc_setup(struct lgdt3305_state *state,
401 struct dvb_frontend_parameters *param) 401 struct dtv_frontend_properties *p)
402{ 402{
403 int lockdten, acqen; 403 int lockdten, acqen;
404 404
405 switch (param->u.vsb.modulation) { 405 switch (p->modulation) {
406 case VSB_8: 406 case VSB_8:
407 lockdten = 0; 407 lockdten = 0;
408 acqen = 0; 408 acqen = 0;
@@ -432,15 +432,15 @@ static int lgdt3305_agc_setup(struct lgdt3305_state *state,
432 return -EINVAL; 432 return -EINVAL;
433 } 433 }
434 434
435 return lgdt3305_rfagc_loop(state, param); 435 return lgdt3305_rfagc_loop(state, p);
436} 436}
437 437
438static int lgdt3305_set_agc_power_ref(struct lgdt3305_state *state, 438static int lgdt3305_set_agc_power_ref(struct lgdt3305_state *state,
439 struct dvb_frontend_parameters *param) 439 struct dtv_frontend_properties *p)
440{ 440{
441 u16 usref = 0; 441 u16 usref = 0;
442 442
443 switch (param->u.vsb.modulation) { 443 switch (p->modulation) {
444 case VSB_8: 444 case VSB_8:
445 if (state->cfg->usref_8vsb) 445 if (state->cfg->usref_8vsb)
446 usref = state->cfg->usref_8vsb; 446 usref = state->cfg->usref_8vsb;
@@ -473,14 +473,14 @@ static int lgdt3305_set_agc_power_ref(struct lgdt3305_state *state,
473/* ------------------------------------------------------------------------ */ 473/* ------------------------------------------------------------------------ */
474 474
475static int lgdt3305_spectral_inversion(struct lgdt3305_state *state, 475static int lgdt3305_spectral_inversion(struct lgdt3305_state *state,
476 struct dvb_frontend_parameters *param, 476 struct dtv_frontend_properties *p,
477 int inversion) 477 int inversion)
478{ 478{
479 int ret; 479 int ret;
480 480
481 lg_dbg("(%d)\n", inversion); 481 lg_dbg("(%d)\n", inversion);
482 482
483 switch (param->u.vsb.modulation) { 483 switch (p->modulation) {
484 case VSB_8: 484 case VSB_8:
485 ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7, 485 ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7,
486 inversion ? 0xf9 : 0x79); 486 inversion ? 0xf9 : 0x79);
@@ -497,13 +497,13 @@ static int lgdt3305_spectral_inversion(struct lgdt3305_state *state,
497} 497}
498 498
499static int lgdt3305_set_if(struct lgdt3305_state *state, 499static int lgdt3305_set_if(struct lgdt3305_state *state,
500 struct dvb_frontend_parameters *param) 500 struct dtv_frontend_properties *p)
501{ 501{
502 u16 if_freq_khz; 502 u16 if_freq_khz;
503 u8 nco1, nco2, nco3, nco4; 503 u8 nco1, nco2, nco3, nco4;
504 u64 nco; 504 u64 nco;
505 505
506 switch (param->u.vsb.modulation) { 506 switch (p->modulation) {
507 case VSB_8: 507 case VSB_8:
508 if_freq_khz = state->cfg->vsb_if_khz; 508 if_freq_khz = state->cfg->vsb_if_khz;
509 break; 509 break;
@@ -517,7 +517,7 @@ static int lgdt3305_set_if(struct lgdt3305_state *state,
517 517
518 nco = if_freq_khz / 10; 518 nco = if_freq_khz / 10;
519 519
520 switch (param->u.vsb.modulation) { 520 switch (p->modulation) {
521 case VSB_8: 521 case VSB_8:
522 nco <<= 24; 522 nco <<= 24;
523 do_div(nco, 625); 523 do_div(nco, 625);
@@ -677,37 +677,37 @@ fail:
677 return ret; 677 return ret;
678} 678}
679 679
680static int lgdt3304_set_parameters(struct dvb_frontend *fe, 680static int lgdt3304_set_parameters(struct dvb_frontend *fe)
681 struct dvb_frontend_parameters *param)
682{ 681{
682 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
683 struct lgdt3305_state *state = fe->demodulator_priv; 683 struct lgdt3305_state *state = fe->demodulator_priv;
684 int ret; 684 int ret;
685 685
686 lg_dbg("(%d, %d)\n", param->frequency, param->u.vsb.modulation); 686 lg_dbg("(%d, %d)\n", p->frequency, p->modulation);
687 687
688 if (fe->ops.tuner_ops.set_params) { 688 if (fe->ops.tuner_ops.set_params) {
689 ret = fe->ops.tuner_ops.set_params(fe, param); 689 ret = fe->ops.tuner_ops.set_params(fe);
690 if (fe->ops.i2c_gate_ctrl) 690 if (fe->ops.i2c_gate_ctrl)
691 fe->ops.i2c_gate_ctrl(fe, 0); 691 fe->ops.i2c_gate_ctrl(fe, 0);
692 if (lg_fail(ret)) 692 if (lg_fail(ret))
693 goto fail; 693 goto fail;
694 state->current_frequency = param->frequency; 694 state->current_frequency = p->frequency;
695 } 695 }
696 696
697 ret = lgdt3305_set_modulation(state, param); 697 ret = lgdt3305_set_modulation(state, p);
698 if (lg_fail(ret)) 698 if (lg_fail(ret))
699 goto fail; 699 goto fail;
700 700
701 ret = lgdt3305_passband_digital_agc(state, param); 701 ret = lgdt3305_passband_digital_agc(state, p);
702 if (lg_fail(ret)) 702 if (lg_fail(ret))
703 goto fail; 703 goto fail;
704 704
705 ret = lgdt3305_agc_setup(state, param); 705 ret = lgdt3305_agc_setup(state, p);
706 if (lg_fail(ret)) 706 if (lg_fail(ret))
707 goto fail; 707 goto fail;
708 708
709 /* reg 0x030d is 3304-only... seen in vsb and qam usbsnoops... */ 709 /* reg 0x030d is 3304-only... seen in vsb and qam usbsnoops... */
710 switch (param->u.vsb.modulation) { 710 switch (p->modulation) {
711 case VSB_8: 711 case VSB_8:
712 lgdt3305_write_reg(state, 0x030d, 0x00); 712 lgdt3305_write_reg(state, 0x030d, 0x00);
713 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f); 713 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f);
@@ -718,7 +718,7 @@ static int lgdt3304_set_parameters(struct dvb_frontend *fe,
718 case QAM_64: 718 case QAM_64:
719 case QAM_256: 719 case QAM_256:
720 lgdt3305_write_reg(state, 0x030d, 0x14); 720 lgdt3305_write_reg(state, 0x030d, 0x14);
721 ret = lgdt3305_set_if(state, param); 721 ret = lgdt3305_set_if(state, p);
722 if (lg_fail(ret)) 722 if (lg_fail(ret))
723 goto fail; 723 goto fail;
724 break; 724 break;
@@ -727,13 +727,13 @@ static int lgdt3304_set_parameters(struct dvb_frontend *fe,
727 } 727 }
728 728
729 729
730 ret = lgdt3305_spectral_inversion(state, param, 730 ret = lgdt3305_spectral_inversion(state, p,
731 state->cfg->spectral_inversion 731 state->cfg->spectral_inversion
732 ? 1 : 0); 732 ? 1 : 0);
733 if (lg_fail(ret)) 733 if (lg_fail(ret))
734 goto fail; 734 goto fail;
735 735
736 state->current_modulation = param->u.vsb.modulation; 736 state->current_modulation = p->modulation;
737 737
738 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode); 738 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode);
739 if (lg_fail(ret)) 739 if (lg_fail(ret))
@@ -747,34 +747,34 @@ fail:
747 return ret; 747 return ret;
748} 748}
749 749
750static int lgdt3305_set_parameters(struct dvb_frontend *fe, 750static int lgdt3305_set_parameters(struct dvb_frontend *fe)
751 struct dvb_frontend_parameters *param)
752{ 751{
752 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
753 struct lgdt3305_state *state = fe->demodulator_priv; 753 struct lgdt3305_state *state = fe->demodulator_priv;
754 int ret; 754 int ret;
755 755
756 lg_dbg("(%d, %d)\n", param->frequency, param->u.vsb.modulation); 756 lg_dbg("(%d, %d)\n", p->frequency, p->modulation);
757 757
758 if (fe->ops.tuner_ops.set_params) { 758 if (fe->ops.tuner_ops.set_params) {
759 ret = fe->ops.tuner_ops.set_params(fe, param); 759 ret = fe->ops.tuner_ops.set_params(fe);
760 if (fe->ops.i2c_gate_ctrl) 760 if (fe->ops.i2c_gate_ctrl)
761 fe->ops.i2c_gate_ctrl(fe, 0); 761 fe->ops.i2c_gate_ctrl(fe, 0);
762 if (lg_fail(ret)) 762 if (lg_fail(ret))
763 goto fail; 763 goto fail;
764 state->current_frequency = param->frequency; 764 state->current_frequency = p->frequency;
765 } 765 }
766 766
767 ret = lgdt3305_set_modulation(state, param); 767 ret = lgdt3305_set_modulation(state, p);
768 if (lg_fail(ret)) 768 if (lg_fail(ret))
769 goto fail; 769 goto fail;
770 770
771 ret = lgdt3305_passband_digital_agc(state, param); 771 ret = lgdt3305_passband_digital_agc(state, p);
772 if (lg_fail(ret)) 772 if (lg_fail(ret))
773 goto fail; 773 goto fail;
774 ret = lgdt3305_set_agc_power_ref(state, param); 774 ret = lgdt3305_set_agc_power_ref(state, p);
775 if (lg_fail(ret)) 775 if (lg_fail(ret))
776 goto fail; 776 goto fail;
777 ret = lgdt3305_agc_setup(state, param); 777 ret = lgdt3305_agc_setup(state, p);
778 if (lg_fail(ret)) 778 if (lg_fail(ret))
779 goto fail; 779 goto fail;
780 780
@@ -786,20 +786,20 @@ static int lgdt3305_set_parameters(struct dvb_frontend *fe,
786 if (lg_fail(ret)) 786 if (lg_fail(ret))
787 goto fail; 787 goto fail;
788 788
789 ret = lgdt3305_set_if(state, param); 789 ret = lgdt3305_set_if(state, p);
790 if (lg_fail(ret)) 790 if (lg_fail(ret))
791 goto fail; 791 goto fail;
792 ret = lgdt3305_spectral_inversion(state, param, 792 ret = lgdt3305_spectral_inversion(state, p,
793 state->cfg->spectral_inversion 793 state->cfg->spectral_inversion
794 ? 1 : 0); 794 ? 1 : 0);
795 if (lg_fail(ret)) 795 if (lg_fail(ret))
796 goto fail; 796 goto fail;
797 797
798 ret = lgdt3305_set_filter_extension(state, param); 798 ret = lgdt3305_set_filter_extension(state, p);
799 if (lg_fail(ret)) 799 if (lg_fail(ret))
800 goto fail; 800 goto fail;
801 801
802 state->current_modulation = param->u.vsb.modulation; 802 state->current_modulation = p->modulation;
803 803
804 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode); 804 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode);
805 if (lg_fail(ret)) 805 if (lg_fail(ret))
@@ -813,15 +813,15 @@ fail:
813 return ret; 813 return ret;
814} 814}
815 815
816static int lgdt3305_get_frontend(struct dvb_frontend *fe, 816static int lgdt3305_get_frontend(struct dvb_frontend *fe)
817 struct dvb_frontend_parameters *param)
818{ 817{
818 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
819 struct lgdt3305_state *state = fe->demodulator_priv; 819 struct lgdt3305_state *state = fe->demodulator_priv;
820 820
821 lg_dbg("\n"); 821 lg_dbg("\n");
822 822
823 param->u.vsb.modulation = state->current_modulation; 823 p->modulation = state->current_modulation;
824 param->frequency = state->current_frequency; 824 p->frequency = state->current_frequency;
825 return 0; 825 return 0;
826} 826}
827 827
@@ -1166,9 +1166,9 @@ fail:
1166EXPORT_SYMBOL(lgdt3305_attach); 1166EXPORT_SYMBOL(lgdt3305_attach);
1167 1167
1168static struct dvb_frontend_ops lgdt3304_ops = { 1168static struct dvb_frontend_ops lgdt3304_ops = {
1169 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1169 .info = { 1170 .info = {
1170 .name = "LG Electronics LGDT3304 VSB/QAM Frontend", 1171 .name = "LG Electronics LGDT3304 VSB/QAM Frontend",
1171 .type = FE_ATSC,
1172 .frequency_min = 54000000, 1172 .frequency_min = 54000000,
1173 .frequency_max = 858000000, 1173 .frequency_max = 858000000,
1174 .frequency_stepsize = 62500, 1174 .frequency_stepsize = 62500,
@@ -1188,9 +1188,9 @@ static struct dvb_frontend_ops lgdt3304_ops = {
1188}; 1188};
1189 1189
1190static struct dvb_frontend_ops lgdt3305_ops = { 1190static struct dvb_frontend_ops lgdt3305_ops = {
1191 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1191 .info = { 1192 .info = {
1192 .name = "LG Electronics LGDT3305 VSB/QAM Frontend", 1193 .name = "LG Electronics LGDT3305 VSB/QAM Frontend",
1193 .type = FE_ATSC,
1194 .frequency_min = 54000000, 1194 .frequency_min = 54000000,
1195 .frequency_max = 858000000, 1195 .frequency_max = 858000000,
1196 .frequency_stepsize = 62500, 1196 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/lgdt330x.c b/drivers/media/dvb/frontends/lgdt330x.c
index 43971e63baa..c990d35a13d 100644
--- a/drivers/media/dvb/frontends/lgdt330x.c
+++ b/drivers/media/dvb/frontends/lgdt330x.c
@@ -288,6 +288,8 @@ static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
288 int err; 288 int err;
289 u8 buf[2]; 289 u8 buf[2];
290 290
291 *ucblocks = 0;
292
291 switch (state->config->demod_chip) { 293 switch (state->config->demod_chip) {
292 case LGDT3302: 294 case LGDT3302:
293 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1, 295 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
@@ -302,14 +304,16 @@ static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
302 "Only LGDT3302 and LGDT3303 are supported chips.\n"); 304 "Only LGDT3302 and LGDT3303 are supported chips.\n");
303 err = -ENODEV; 305 err = -ENODEV;
304 } 306 }
307 if (err < 0)
308 return err;
305 309
306 *ucblocks = (buf[0] << 8) | buf[1]; 310 *ucblocks = (buf[0] << 8) | buf[1];
307 return 0; 311 return 0;
308} 312}
309 313
310static int lgdt330x_set_parameters(struct dvb_frontend* fe, 314static int lgdt330x_set_parameters(struct dvb_frontend *fe)
311 struct dvb_frontend_parameters *param)
312{ 315{
316 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
313 /* 317 /*
314 * Array of byte pairs <address, value> 318 * Array of byte pairs <address, value>
315 * to initialize 8VSB for lgdt3303 chip 50 MHz IF 319 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
@@ -343,10 +347,10 @@ static int lgdt330x_set_parameters(struct dvb_frontend* fe,
343 347
344 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 }; 348 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
345 349
346 int err; 350 int err = 0;
347 /* Change only if we are actually changing the modulation */ 351 /* Change only if we are actually changing the modulation */
348 if (state->current_modulation != param->u.vsb.modulation) { 352 if (state->current_modulation != p->modulation) {
349 switch(param->u.vsb.modulation) { 353 switch (p->modulation) {
350 case VSB_8: 354 case VSB_8:
351 dprintk("%s: VSB_8 MODE\n", __func__); 355 dprintk("%s: VSB_8 MODE\n", __func__);
352 356
@@ -395,9 +399,14 @@ static int lgdt330x_set_parameters(struct dvb_frontend* fe,
395 } 399 }
396 break; 400 break;
397 default: 401 default:
398 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __func__, param->u.vsb.modulation); 402 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __func__, p->modulation);
399 return -1; 403 return -1;
400 } 404 }
405 if (err < 0)
406 printk(KERN_WARNING "lgdt330x: %s: error blasting "
407 "bytes to lgdt3303 for modulation type(%d)\n",
408 __func__, p->modulation);
409
401 /* 410 /*
402 * select serial or parallel MPEG harware interface 411 * select serial or parallel MPEG harware interface
403 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303 412 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
@@ -410,29 +419,29 @@ static int lgdt330x_set_parameters(struct dvb_frontend* fe,
410 sizeof(top_ctrl_cfg)); 419 sizeof(top_ctrl_cfg));
411 if (state->config->set_ts_params) 420 if (state->config->set_ts_params)
412 state->config->set_ts_params(fe, 0); 421 state->config->set_ts_params(fe, 0);
413 state->current_modulation = param->u.vsb.modulation; 422 state->current_modulation = p->modulation;
414 } 423 }
415 424
416 /* Tune to the specified frequency */ 425 /* Tune to the specified frequency */
417 if (fe->ops.tuner_ops.set_params) { 426 if (fe->ops.tuner_ops.set_params) {
418 fe->ops.tuner_ops.set_params(fe, param); 427 fe->ops.tuner_ops.set_params(fe);
419 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 428 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
420 } 429 }
421 430
422 /* Keep track of the new frequency */ 431 /* Keep track of the new frequency */
423 /* FIXME this is the wrong way to do this... */ 432 /* FIXME this is the wrong way to do this... */
424 /* The tuner is shared with the video4linux analog API */ 433 /* The tuner is shared with the video4linux analog API */
425 state->current_frequency = param->frequency; 434 state->current_frequency = p->frequency;
426 435
427 lgdt330x_SwReset(state); 436 lgdt330x_SwReset(state);
428 return 0; 437 return 0;
429} 438}
430 439
431static int lgdt330x_get_frontend(struct dvb_frontend* fe, 440static int lgdt330x_get_frontend(struct dvb_frontend *fe)
432 struct dvb_frontend_parameters* param)
433{ 441{
442 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
434 struct lgdt330x_state *state = fe->demodulator_priv; 443 struct lgdt330x_state *state = fe->demodulator_priv;
435 param->frequency = state->current_frequency; 444 p->frequency = state->current_frequency;
436 return 0; 445 return 0;
437} 446}
438 447
@@ -762,9 +771,9 @@ error:
762} 771}
763 772
764static struct dvb_frontend_ops lgdt3302_ops = { 773static struct dvb_frontend_ops lgdt3302_ops = {
774 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
765 .info = { 775 .info = {
766 .name= "LG Electronics LGDT3302 VSB/QAM Frontend", 776 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
767 .type = FE_ATSC,
768 .frequency_min= 54000000, 777 .frequency_min= 54000000,
769 .frequency_max= 858000000, 778 .frequency_max= 858000000,
770 .frequency_stepsize= 62500, 779 .frequency_stepsize= 62500,
@@ -785,9 +794,9 @@ static struct dvb_frontend_ops lgdt3302_ops = {
785}; 794};
786 795
787static struct dvb_frontend_ops lgdt3303_ops = { 796static struct dvb_frontend_ops lgdt3303_ops = {
797 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
788 .info = { 798 .info = {
789 .name= "LG Electronics LGDT3303 VSB/QAM Frontend", 799 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
790 .type = FE_ATSC,
791 .frequency_min= 54000000, 800 .frequency_min= 54000000,
792 .frequency_max= 858000000, 801 .frequency_max= 858000000,
793 .frequency_stepsize= 62500, 802 .frequency_stepsize= 62500,
diff --git a/drivers/media/dvb/frontends/lgs8gl5.c b/drivers/media/dvb/frontends/lgs8gl5.c
index bb37ed289a0..2cec8041a10 100644
--- a/drivers/media/dvb/frontends/lgs8gl5.c
+++ b/drivers/media/dvb/frontends/lgs8gl5.c
@@ -311,18 +311,18 @@ lgs8gl5_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
311 311
312 312
313static int 313static int
314lgs8gl5_set_frontend(struct dvb_frontend *fe, 314lgs8gl5_set_frontend(struct dvb_frontend *fe)
315 struct dvb_frontend_parameters *p)
316{ 315{
316 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
317 struct lgs8gl5_state *state = fe->demodulator_priv; 317 struct lgs8gl5_state *state = fe->demodulator_priv;
318 318
319 dprintk("%s\n", __func__); 319 dprintk("%s\n", __func__);
320 320
321 if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ) 321 if (p->bandwidth_hz != 8000000)
322 return -EINVAL; 322 return -EINVAL;
323 323
324 if (fe->ops.tuner_ops.set_params) { 324 if (fe->ops.tuner_ops.set_params) {
325 fe->ops.tuner_ops.set_params(fe, p); 325 fe->ops.tuner_ops.set_params(fe);
326 if (fe->ops.i2c_gate_ctrl) 326 if (fe->ops.i2c_gate_ctrl)
327 fe->ops.i2c_gate_ctrl(fe, 0); 327 fe->ops.i2c_gate_ctrl(fe, 0);
328 } 328 }
@@ -336,22 +336,21 @@ lgs8gl5_set_frontend(struct dvb_frontend *fe,
336 336
337 337
338static int 338static int
339lgs8gl5_get_frontend(struct dvb_frontend *fe, 339lgs8gl5_get_frontend(struct dvb_frontend *fe)
340 struct dvb_frontend_parameters *p)
341{ 340{
341 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
342 struct lgs8gl5_state *state = fe->demodulator_priv; 342 struct lgs8gl5_state *state = fe->demodulator_priv;
343 u8 inv = lgs8gl5_read_reg(state, REG_INVERSION); 343 u8 inv = lgs8gl5_read_reg(state, REG_INVERSION);
344 struct dvb_ofdm_parameters *o = &p->u.ofdm;
345 344
346 p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF; 345 p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF;
347 346
348 o->code_rate_HP = FEC_1_2; 347 p->code_rate_HP = FEC_1_2;
349 o->code_rate_LP = FEC_7_8; 348 p->code_rate_LP = FEC_7_8;
350 o->guard_interval = GUARD_INTERVAL_1_32; 349 p->guard_interval = GUARD_INTERVAL_1_32;
351 o->transmission_mode = TRANSMISSION_MODE_2K; 350 p->transmission_mode = TRANSMISSION_MODE_2K;
352 o->constellation = QAM_64; 351 p->modulation = QAM_64;
353 o->hierarchy_information = HIERARCHY_NONE; 352 p->hierarchy = HIERARCHY_NONE;
354 o->bandwidth = BANDWIDTH_8_MHZ; 353 p->bandwidth_hz = 8000000;
355 354
356 return 0; 355 return 0;
357} 356}
@@ -413,9 +412,9 @@ EXPORT_SYMBOL(lgs8gl5_attach);
413 412
414 413
415static struct dvb_frontend_ops lgs8gl5_ops = { 414static struct dvb_frontend_ops lgs8gl5_ops = {
415 .delsys = { SYS_DMBTH },
416 .info = { 416 .info = {
417 .name = "Legend Silicon LGS-8GL5 DMB-TH", 417 .name = "Legend Silicon LGS-8GL5 DMB-TH",
418 .type = FE_OFDM,
419 .frequency_min = 474000000, 418 .frequency_min = 474000000,
420 .frequency_max = 858000000, 419 .frequency_max = 858000000,
421 .frequency_stepsize = 10000, 420 .frequency_stepsize = 10000,
diff --git a/drivers/media/dvb/frontends/lgs8gxx.c b/drivers/media/dvb/frontends/lgs8gxx.c
index 1172b54689f..4de1d3520cd 100644
--- a/drivers/media/dvb/frontends/lgs8gxx.c
+++ b/drivers/media/dvb/frontends/lgs8gxx.c
@@ -669,16 +669,16 @@ static int lgs8gxx_write(struct dvb_frontend *fe, const u8 buf[], int len)
669 return lgs8gxx_write_reg(priv, buf[0], buf[1]); 669 return lgs8gxx_write_reg(priv, buf[0], buf[1]);
670} 670}
671 671
672static int lgs8gxx_set_fe(struct dvb_frontend *fe, 672static int lgs8gxx_set_fe(struct dvb_frontend *fe)
673 struct dvb_frontend_parameters *fe_params)
674{ 673{
674
675 struct lgs8gxx_state *priv = fe->demodulator_priv; 675 struct lgs8gxx_state *priv = fe->demodulator_priv;
676 676
677 dprintk("%s\n", __func__); 677 dprintk("%s\n", __func__);
678 678
679 /* set frequency */ 679 /* set frequency */
680 if (fe->ops.tuner_ops.set_params) { 680 if (fe->ops.tuner_ops.set_params) {
681 fe->ops.tuner_ops.set_params(fe, fe_params); 681 fe->ops.tuner_ops.set_params(fe);
682 if (fe->ops.i2c_gate_ctrl) 682 if (fe->ops.i2c_gate_ctrl)
683 fe->ops.i2c_gate_ctrl(fe, 0); 683 fe->ops.i2c_gate_ctrl(fe, 0);
684 } 684 }
@@ -691,9 +691,9 @@ static int lgs8gxx_set_fe(struct dvb_frontend *fe,
691 return 0; 691 return 0;
692} 692}
693 693
694static int lgs8gxx_get_fe(struct dvb_frontend *fe, 694static int lgs8gxx_get_fe(struct dvb_frontend *fe)
695 struct dvb_frontend_parameters *fe_params)
696{ 695{
696 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
697 dprintk("%s\n", __func__); 697 dprintk("%s\n", __func__);
698 698
699 /* TODO: get real readings from device */ 699 /* TODO: get real readings from device */
@@ -701,21 +701,21 @@ static int lgs8gxx_get_fe(struct dvb_frontend *fe,
701 fe_params->inversion = INVERSION_OFF; 701 fe_params->inversion = INVERSION_OFF;
702 702
703 /* bandwidth */ 703 /* bandwidth */
704 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 704 fe_params->bandwidth_hz = 8000000;
705 705
706 fe_params->u.ofdm.code_rate_HP = FEC_AUTO; 706 fe_params->code_rate_HP = FEC_AUTO;
707 fe_params->u.ofdm.code_rate_LP = FEC_AUTO; 707 fe_params->code_rate_LP = FEC_AUTO;
708 708
709 fe_params->u.ofdm.constellation = QAM_AUTO; 709 fe_params->modulation = QAM_AUTO;
710 710
711 /* transmission mode */ 711 /* transmission mode */
712 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO; 712 fe_params->transmission_mode = TRANSMISSION_MODE_AUTO;
713 713
714 /* guard interval */ 714 /* guard interval */
715 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO; 715 fe_params->guard_interval = GUARD_INTERVAL_AUTO;
716 716
717 /* hierarchy */ 717 /* hierarchy */
718 fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE; 718 fe_params->hierarchy = HIERARCHY_NONE;
719 719
720 return 0; 720 return 0;
721} 721}
@@ -994,9 +994,9 @@ static int lgs8gxx_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
994} 994}
995 995
996static struct dvb_frontend_ops lgs8gxx_ops = { 996static struct dvb_frontend_ops lgs8gxx_ops = {
997 .delsys = { SYS_DMBTH },
997 .info = { 998 .info = {
998 .name = "Legend Silicon LGS8913/LGS8GXX DMB-TH", 999 .name = "Legend Silicon LGS8913/LGS8GXX DMB-TH",
999 .type = FE_OFDM,
1000 .frequency_min = 474000000, 1000 .frequency_min = 474000000,
1001 .frequency_max = 858000000, 1001 .frequency_max = 858000000,
1002 .frequency_stepsize = 10000, 1002 .frequency_stepsize = 10000,
diff --git a/drivers/media/dvb/frontends/mb86a16.c b/drivers/media/dvb/frontends/mb86a16.c
index c283112051b..9ae40abfd71 100644
--- a/drivers/media/dvb/frontends/mb86a16.c
+++ b/drivers/media/dvb/frontends/mb86a16.c
@@ -1621,13 +1621,13 @@ err:
1621 return -EREMOTEIO; 1621 return -EREMOTEIO;
1622} 1622}
1623 1623
1624static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe, 1624static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe)
1625 struct dvb_frontend_parameters *p)
1626{ 1625{
1626 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1627 struct mb86a16_state *state = fe->demodulator_priv; 1627 struct mb86a16_state *state = fe->demodulator_priv;
1628 1628
1629 state->frequency = p->frequency / 1000; 1629 state->frequency = p->frequency / 1000;
1630 state->srate = p->u.qpsk.symbol_rate / 1000; 1630 state->srate = p->symbol_rate / 1000;
1631 1631
1632 if (!mb86a16_set_fe(state)) { 1632 if (!mb86a16_set_fe(state)) {
1633 dprintk(verbose, MB86A16_ERROR, 1, "Successfully acquired LOCK"); 1633 dprintk(verbose, MB86A16_ERROR, 1, "Successfully acquired LOCK");
@@ -1814,9 +1814,9 @@ static enum dvbfe_algo mb86a16_frontend_algo(struct dvb_frontend *fe)
1814} 1814}
1815 1815
1816static struct dvb_frontend_ops mb86a16_ops = { 1816static struct dvb_frontend_ops mb86a16_ops = {
1817 .delsys = { SYS_DVBS },
1817 .info = { 1818 .info = {
1818 .name = "Fujitsu MB86A16 DVB-S", 1819 .name = "Fujitsu MB86A16 DVB-S",
1819 .type = FE_QPSK,
1820 .frequency_min = 950000, 1820 .frequency_min = 950000,
1821 .frequency_max = 2150000, 1821 .frequency_max = 2150000,
1822 .frequency_stepsize = 3000, 1822 .frequency_stepsize = 3000,
diff --git a/drivers/media/dvb/frontends/mb86a20s.c b/drivers/media/dvb/frontends/mb86a20s.c
index 0f867a5055f..7fa3e472cdc 100644
--- a/drivers/media/dvb/frontends/mb86a20s.c
+++ b/drivers/media/dvb/frontends/mb86a20s.c
@@ -61,244 +61,111 @@ static struct regdata mb86a20s_init[] = {
61 { 0x70, 0xff }, 61 { 0x70, 0xff },
62 { 0x08, 0x01 }, 62 { 0x08, 0x01 },
63 { 0x09, 0x3e }, 63 { 0x09, 0x3e },
64 { 0x50, 0xd1 }, 64 { 0x50, 0xd1 }, { 0x51, 0x22 },
65 { 0x51, 0x22 },
66 { 0x39, 0x01 }, 65 { 0x39, 0x01 },
67 { 0x71, 0x00 }, 66 { 0x71, 0x00 },
68 { 0x28, 0x2a }, 67 { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
69 { 0x29, 0x00 }, 68 { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
70 { 0x2a, 0xff }, 69 { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
71 { 0x2b, 0x80 },
72 { 0x28, 0x20 },
73 { 0x29, 0x33 },
74 { 0x2a, 0xdf },
75 { 0x2b, 0xa9 },
76 { 0x3b, 0x21 }, 70 { 0x3b, 0x21 },
77 { 0x3c, 0x3a }, 71 { 0x3c, 0x3a },
78 { 0x01, 0x0d }, 72 { 0x01, 0x0d },
79 { 0x04, 0x08 }, 73 { 0x04, 0x08 }, { 0x05, 0x05 },
80 { 0x05, 0x05 }, 74 { 0x04, 0x0e }, { 0x05, 0x00 },
81 { 0x04, 0x0e }, 75 { 0x04, 0x0f }, { 0x05, 0x14 },
82 { 0x05, 0x00 }, 76 { 0x04, 0x0b }, { 0x05, 0x8c },
83 { 0x04, 0x0f }, 77 { 0x04, 0x00 }, { 0x05, 0x00 },
84 { 0x05, 0x14 }, 78 { 0x04, 0x01 }, { 0x05, 0x07 },
85 { 0x04, 0x0b }, 79 { 0x04, 0x02 }, { 0x05, 0x0f },
86 { 0x05, 0x8c }, 80 { 0x04, 0x03 }, { 0x05, 0xa0 },
87 { 0x04, 0x00 }, 81 { 0x04, 0x09 }, { 0x05, 0x00 },
88 { 0x05, 0x00 }, 82 { 0x04, 0x0a }, { 0x05, 0xff },
89 { 0x04, 0x01 }, 83 { 0x04, 0x27 }, { 0x05, 0x64 },
90 { 0x05, 0x07 }, 84 { 0x04, 0x28 }, { 0x05, 0x00 },
91 { 0x04, 0x02 }, 85 { 0x04, 0x1e }, { 0x05, 0xff },
92 { 0x05, 0x0f }, 86 { 0x04, 0x29 }, { 0x05, 0x0a },
93 { 0x04, 0x03 }, 87 { 0x04, 0x32 }, { 0x05, 0x0a },
94 { 0x05, 0xa0 }, 88 { 0x04, 0x14 }, { 0x05, 0x02 },
95 { 0x04, 0x09 }, 89 { 0x04, 0x04 }, { 0x05, 0x00 },
96 { 0x05, 0x00 }, 90 { 0x04, 0x05 }, { 0x05, 0x22 },
97 { 0x04, 0x0a }, 91 { 0x04, 0x06 }, { 0x05, 0x0e },
98 { 0x05, 0xff }, 92 { 0x04, 0x07 }, { 0x05, 0xd8 },
99 { 0x04, 0x27 }, 93 { 0x04, 0x12 }, { 0x05, 0x00 },
100 { 0x05, 0x64 }, 94 { 0x04, 0x13 }, { 0x05, 0xff },
101 { 0x04, 0x28 }, 95 { 0x04, 0x15 }, { 0x05, 0x4e },
102 { 0x05, 0x00 }, 96 { 0x04, 0x16 }, { 0x05, 0x20 },
103 { 0x04, 0x1e },
104 { 0x05, 0xff },
105 { 0x04, 0x29 },
106 { 0x05, 0x0a },
107 { 0x04, 0x32 },
108 { 0x05, 0x0a },
109 { 0x04, 0x14 },
110 { 0x05, 0x02 },
111 { 0x04, 0x04 },
112 { 0x05, 0x00 },
113 { 0x04, 0x05 },
114 { 0x05, 0x22 },
115 { 0x04, 0x06 },
116 { 0x05, 0x0e },
117 { 0x04, 0x07 },
118 { 0x05, 0xd8 },
119 { 0x04, 0x12 },
120 { 0x05, 0x00 },
121 { 0x04, 0x13 },
122 { 0x05, 0xff },
123 { 0x52, 0x01 }, 97 { 0x52, 0x01 },
124 { 0x50, 0xa7 }, 98 { 0x50, 0xa7 }, { 0x51, 0xff },
125 { 0x51, 0x00 }, 99 { 0x50, 0xa8 }, { 0x51, 0xff },
126 { 0x50, 0xa8 }, 100 { 0x50, 0xa9 }, { 0x51, 0xff },
127 { 0x51, 0xff }, 101 { 0x50, 0xaa }, { 0x51, 0xff },
128 { 0x50, 0xa9 }, 102 { 0x50, 0xab }, { 0x51, 0xff },
129 { 0x51, 0xff }, 103 { 0x50, 0xac }, { 0x51, 0xff },
130 { 0x50, 0xaa }, 104 { 0x50, 0xad }, { 0x51, 0xff },
131 { 0x51, 0x00 }, 105 { 0x50, 0xae }, { 0x51, 0xff },
132 { 0x50, 0xab }, 106 { 0x50, 0xaf }, { 0x51, 0xff },
133 { 0x51, 0xff },
134 { 0x50, 0xac },
135 { 0x51, 0xff },
136 { 0x50, 0xad },
137 { 0x51, 0x00 },
138 { 0x50, 0xae },
139 { 0x51, 0xff },
140 { 0x50, 0xaf },
141 { 0x51, 0xff },
142 { 0x5e, 0x07 }, 107 { 0x5e, 0x07 },
143 { 0x50, 0xdc }, 108 { 0x50, 0xdc }, { 0x51, 0x01 },
144 { 0x51, 0x01 }, 109 { 0x50, 0xdd }, { 0x51, 0xf4 },
145 { 0x50, 0xdd }, 110 { 0x50, 0xde }, { 0x51, 0x01 },
146 { 0x51, 0xf4 }, 111 { 0x50, 0xdf }, { 0x51, 0xf4 },
147 { 0x50, 0xde }, 112 { 0x50, 0xe0 }, { 0x51, 0x01 },
148 { 0x51, 0x01 }, 113 { 0x50, 0xe1 }, { 0x51, 0xf4 },
149 { 0x50, 0xdf }, 114 { 0x50, 0xb0 }, { 0x51, 0x07 },
150 { 0x51, 0xf4 }, 115 { 0x50, 0xb2 }, { 0x51, 0xff },
151 { 0x50, 0xe0 }, 116 { 0x50, 0xb3 }, { 0x51, 0xff },
152 { 0x51, 0x01 }, 117 { 0x50, 0xb4 }, { 0x51, 0xff },
153 { 0x50, 0xe1 }, 118 { 0x50, 0xb5 }, { 0x51, 0xff },
154 { 0x51, 0xf4 }, 119 { 0x50, 0xb6 }, { 0x51, 0xff },
155 { 0x50, 0xb0 }, 120 { 0x50, 0xb7 }, { 0x51, 0xff },
156 { 0x51, 0x07 }, 121 { 0x50, 0x50 }, { 0x51, 0x02 },
157 { 0x50, 0xb2 }, 122 { 0x50, 0x51 }, { 0x51, 0x04 },
158 { 0x51, 0xff },
159 { 0x50, 0xb3 },
160 { 0x51, 0xff },
161 { 0x50, 0xb4 },
162 { 0x51, 0xff },
163 { 0x50, 0xb5 },
164 { 0x51, 0xff },
165 { 0x50, 0xb6 },
166 { 0x51, 0xff },
167 { 0x50, 0xb7 },
168 { 0x51, 0xff },
169 { 0x50, 0x50 },
170 { 0x51, 0x02 },
171 { 0x50, 0x51 },
172 { 0x51, 0x04 },
173 { 0x45, 0x04 }, 123 { 0x45, 0x04 },
174 { 0x48, 0x04 }, 124 { 0x48, 0x04 },
175 { 0x50, 0xd5 }, 125 { 0x50, 0xd5 }, { 0x51, 0x01 }, /* Serial */
176 { 0x51, 0x01 }, /* Serial */ 126 { 0x50, 0xd6 }, { 0x51, 0x1f },
177 { 0x50, 0xd6 }, 127 { 0x50, 0xd2 }, { 0x51, 0x03 },
178 { 0x51, 0x1f }, 128 { 0x50, 0xd7 }, { 0x51, 0x3f },
179 { 0x50, 0xd2 }, 129 { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
180 { 0x51, 0x03 }, 130 { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
181 { 0x50, 0xd7 }, 131 { 0x04, 0x40 }, { 0x05, 0x01 },
182 { 0x51, 0x3f }, 132 { 0x28, 0x00 }, { 0x29, 0x10 },
133 { 0x28, 0x05 }, { 0x29, 0x02 },
183 { 0x1c, 0x01 }, 134 { 0x1c, 0x01 },
184 { 0x28, 0x06 }, 135 { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
185 { 0x29, 0x00 }, 136 { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
186 { 0x2a, 0x00 }, 137 { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
187 { 0x2b, 0x03 }, 138 { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
188 { 0x28, 0x07 }, 139 { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
189 { 0x29, 0x00 }, 140 { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
190 { 0x2a, 0x00 }, 141 { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
191 { 0x2b, 0x0d }, 142 { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
192 { 0x28, 0x08 }, 143 { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
193 { 0x29, 0x00 }, 144 { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
194 { 0x2a, 0x00 }, 145 { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
195 { 0x2b, 0x02 }, 146 { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
196 { 0x28, 0x09 }, 147 { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
197 { 0x29, 0x00 }, 148 { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
198 { 0x2a, 0x00 }, 149 { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
199 { 0x2b, 0x01 }, 150 { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
200 { 0x28, 0x0a }, 151 { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
201 { 0x29, 0x00 }, 152 { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
202 { 0x2a, 0x00 }, 153 { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
203 { 0x2b, 0x21 }, 154 { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
204 { 0x28, 0x0b }, 155 { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
205 { 0x29, 0x00 }, 156 { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
206 { 0x2a, 0x00 }, 157 { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
207 { 0x2b, 0x29 }, 158 { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
208 { 0x28, 0x0c }, 159 { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
209 { 0x29, 0x00 }, 160 { 0x50, 0x1e }, { 0x51, 0x5d },
210 { 0x2a, 0x00 }, 161 { 0x50, 0x22 }, { 0x51, 0x00 },
211 { 0x2b, 0x16 }, 162 { 0x50, 0x23 }, { 0x51, 0xc8 },
212 { 0x28, 0x0d }, 163 { 0x50, 0x24 }, { 0x51, 0x00 },
213 { 0x29, 0x00 }, 164 { 0x50, 0x25 }, { 0x51, 0xf0 },
214 { 0x2a, 0x00 }, 165 { 0x50, 0x26 }, { 0x51, 0x00 },
215 { 0x2b, 0x31 }, 166 { 0x50, 0x27 }, { 0x51, 0xc3 },
216 { 0x28, 0x0e }, 167 { 0x50, 0x39 }, { 0x51, 0x02 },
217 { 0x29, 0x00 }, 168 { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
218 { 0x2a, 0x00 },
219 { 0x2b, 0x0e },
220 { 0x28, 0x0f },
221 { 0x29, 0x00 },
222 { 0x2a, 0x00 },
223 { 0x2b, 0x4e },
224 { 0x28, 0x10 },
225 { 0x29, 0x00 },
226 { 0x2a, 0x00 },
227 { 0x2b, 0x46 },
228 { 0x28, 0x11 },
229 { 0x29, 0x00 },
230 { 0x2a, 0x00 },
231 { 0x2b, 0x0f },
232 { 0x28, 0x12 },
233 { 0x29, 0x00 },
234 { 0x2a, 0x00 },
235 { 0x2b, 0x56 },
236 { 0x28, 0x13 },
237 { 0x29, 0x00 },
238 { 0x2a, 0x00 },
239 { 0x2b, 0x35 },
240 { 0x28, 0x14 },
241 { 0x29, 0x00 },
242 { 0x2a, 0x01 },
243 { 0x2b, 0xbe },
244 { 0x28, 0x15 },
245 { 0x29, 0x00 },
246 { 0x2a, 0x01 },
247 { 0x2b, 0x84 },
248 { 0x28, 0x16 },
249 { 0x29, 0x00 },
250 { 0x2a, 0x03 },
251 { 0x2b, 0xee },
252 { 0x28, 0x17 },
253 { 0x29, 0x00 },
254 { 0x2a, 0x00 },
255 { 0x2b, 0x98 },
256 { 0x28, 0x18 },
257 { 0x29, 0x00 },
258 { 0x2a, 0x00 },
259 { 0x2b, 0x9f },
260 { 0x28, 0x19 },
261 { 0x29, 0x00 },
262 { 0x2a, 0x07 },
263 { 0x2b, 0xb2 },
264 { 0x28, 0x1a },
265 { 0x29, 0x00 },
266 { 0x2a, 0x06 },
267 { 0x2b, 0xc2 },
268 { 0x28, 0x1b },
269 { 0x29, 0x00 },
270 { 0x2a, 0x07 },
271 { 0x2b, 0x4a },
272 { 0x28, 0x1c },
273 { 0x29, 0x00 },
274 { 0x2a, 0x01 },
275 { 0x2b, 0xbc },
276 { 0x28, 0x1d },
277 { 0x29, 0x00 },
278 { 0x2a, 0x04 },
279 { 0x2b, 0xba },
280 { 0x28, 0x1e },
281 { 0x29, 0x00 },
282 { 0x2a, 0x06 },
283 { 0x2b, 0x14 },
284 { 0x50, 0x1e },
285 { 0x51, 0x5d },
286 { 0x50, 0x22 },
287 { 0x51, 0x00 },
288 { 0x50, 0x23 },
289 { 0x51, 0xc8 },
290 { 0x50, 0x24 },
291 { 0x51, 0x00 },
292 { 0x50, 0x25 },
293 { 0x51, 0xf0 },
294 { 0x50, 0x26 },
295 { 0x51, 0x00 },
296 { 0x50, 0x27 },
297 { 0x51, 0xc3 },
298 { 0x50, 0x39 },
299 { 0x51, 0x02 },
300 { 0x50, 0xd5 },
301 { 0x51, 0x01 },
302 { 0xd0, 0x00 }, 169 { 0xd0, 0x00 },
303}; 170};
304 171
@@ -485,18 +352,23 @@ static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
485 return 0; 352 return 0;
486} 353}
487 354
488static int mb86a20s_set_frontend(struct dvb_frontend *fe, 355static int mb86a20s_set_frontend(struct dvb_frontend *fe)
489 struct dvb_frontend_parameters *p)
490{ 356{
491 struct mb86a20s_state *state = fe->demodulator_priv; 357 struct mb86a20s_state *state = fe->demodulator_priv;
492 int rc; 358 int rc;
359#if 0
360 /*
361 * FIXME: Properly implement the set frontend properties
362 */
363 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
364#endif
493 365
494 dprintk("\n"); 366 dprintk("\n");
495 367
496 if (fe->ops.i2c_gate_ctrl) 368 if (fe->ops.i2c_gate_ctrl)
497 fe->ops.i2c_gate_ctrl(fe, 1); 369 fe->ops.i2c_gate_ctrl(fe, 1);
498 dprintk("Calling tuner set parameters\n"); 370 dprintk("Calling tuner set parameters\n");
499 fe->ops.tuner_ops.set_params(fe, p); 371 fe->ops.tuner_ops.set_params(fe);
500 372
501 /* 373 /*
502 * Make it more reliable: if, for some reason, the initial 374 * Make it more reliable: if, for some reason, the initial
@@ -520,22 +392,212 @@ static int mb86a20s_set_frontend(struct dvb_frontend *fe,
520 return rc; 392 return rc;
521} 393}
522 394
523static int mb86a20s_get_frontend(struct dvb_frontend *fe, 395static int mb86a20s_get_modulation(struct mb86a20s_state *state,
524 struct dvb_frontend_parameters *p) 396 unsigned layer)
397{
398 int rc;
399 static unsigned char reg[] = {
400 [0] = 0x86, /* Layer A */
401 [1] = 0x8a, /* Layer B */
402 [2] = 0x8e, /* Layer C */
403 };
404
405 if (layer > ARRAY_SIZE(reg))
406 return -EINVAL;
407 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
408 if (rc < 0)
409 return rc;
410 rc = mb86a20s_readreg(state, 0x6e);
411 if (rc < 0)
412 return rc;
413 switch ((rc & 0x70) >> 4) {
414 case 0:
415 return DQPSK;
416 case 1:
417 return QPSK;
418 case 2:
419 return QAM_16;
420 case 3:
421 return QAM_64;
422 default:
423 return QAM_AUTO;
424 }
425}
426
427static int mb86a20s_get_fec(struct mb86a20s_state *state,
428 unsigned layer)
525{ 429{
430 int rc;
526 431
527 /* FIXME: For now, it does nothing */ 432 static unsigned char reg[] = {
433 [0] = 0x87, /* Layer A */
434 [1] = 0x8b, /* Layer B */
435 [2] = 0x8f, /* Layer C */
436 };
528 437
529 fe->dtv_property_cache.bandwidth_hz = 6000000; 438 if (layer > ARRAY_SIZE(reg))
530 fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO; 439 return -EINVAL;
531 fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO; 440 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
532 fe->dtv_property_cache.isdbt_partial_reception = 0; 441 if (rc < 0)
442 return rc;
443 rc = mb86a20s_readreg(state, 0x6e);
444 if (rc < 0)
445 return rc;
446 switch (rc) {
447 case 0:
448 return FEC_1_2;
449 case 1:
450 return FEC_2_3;
451 case 2:
452 return FEC_3_4;
453 case 3:
454 return FEC_5_6;
455 case 4:
456 return FEC_7_8;
457 default:
458 return FEC_AUTO;
459 }
460}
461
462static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
463 unsigned layer)
464{
465 int rc;
466
467 static unsigned char reg[] = {
468 [0] = 0x88, /* Layer A */
469 [1] = 0x8c, /* Layer B */
470 [2] = 0x90, /* Layer C */
471 };
472
473 if (layer > ARRAY_SIZE(reg))
474 return -EINVAL;
475 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
476 if (rc < 0)
477 return rc;
478 rc = mb86a20s_readreg(state, 0x6e);
479 if (rc < 0)
480 return rc;
481 if (rc > 3)
482 return -EINVAL; /* Not used */
483 return rc;
484}
485
486static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
487 unsigned layer)
488{
489 int rc, count;
490
491 static unsigned char reg[] = {
492 [0] = 0x89, /* Layer A */
493 [1] = 0x8d, /* Layer B */
494 [2] = 0x91, /* Layer C */
495 };
496
497 if (layer > ARRAY_SIZE(reg))
498 return -EINVAL;
499 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
500 if (rc < 0)
501 return rc;
502 rc = mb86a20s_readreg(state, 0x6e);
503 if (rc < 0)
504 return rc;
505 count = (rc >> 4) & 0x0f;
506
507 return count;
508}
509
510static int mb86a20s_get_frontend(struct dvb_frontend *fe)
511{
512 struct mb86a20s_state *state = fe->demodulator_priv;
513 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
514 int i, rc;
515
516 /* Fixed parameters */
517 p->delivery_system = SYS_ISDBT;
518 p->bandwidth_hz = 6000000;
519
520 if (fe->ops.i2c_gate_ctrl)
521 fe->ops.i2c_gate_ctrl(fe, 0);
522
523 /* Check for partial reception */
524 rc = mb86a20s_writereg(state, 0x6d, 0x85);
525 if (rc >= 0)
526 rc = mb86a20s_readreg(state, 0x6e);
527 if (rc >= 0)
528 p->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
529
530 /* Get per-layer data */
531 p->isdbt_layer_enabled = 0;
532 for (i = 0; i < 3; i++) {
533 rc = mb86a20s_get_segment_count(state, i);
534 if (rc >= 0 && rc < 14)
535 p->layer[i].segment_count = rc;
536 if (rc == 0x0f)
537 continue;
538 p->isdbt_layer_enabled |= 1 << i;
539 rc = mb86a20s_get_modulation(state, i);
540 if (rc >= 0)
541 p->layer[i].modulation = rc;
542 rc = mb86a20s_get_fec(state, i);
543 if (rc >= 0)
544 p->layer[i].fec = rc;
545 rc = mb86a20s_get_interleaving(state, i);
546 if (rc >= 0)
547 p->layer[i].interleaving = rc;
548 }
549
550 p->isdbt_sb_mode = 0;
551 rc = mb86a20s_writereg(state, 0x6d, 0x84);
552 if ((rc >= 0) && ((rc & 0x60) == 0x20)) {
553 p->isdbt_sb_mode = 1;
554 /* At least, one segment should exist */
555 if (!p->isdbt_sb_segment_count)
556 p->isdbt_sb_segment_count = 1;
557 } else
558 p->isdbt_sb_segment_count = 0;
559
560 /* Get transmission mode and guard interval */
561 p->transmission_mode = TRANSMISSION_MODE_AUTO;
562 p->guard_interval = GUARD_INTERVAL_AUTO;
563 rc = mb86a20s_readreg(state, 0x07);
564 if (rc >= 0) {
565 if ((rc & 0x60) == 0x20) {
566 switch (rc & 0x0c >> 2) {
567 case 0:
568 p->transmission_mode = TRANSMISSION_MODE_2K;
569 break;
570 case 1:
571 p->transmission_mode = TRANSMISSION_MODE_4K;
572 break;
573 case 2:
574 p->transmission_mode = TRANSMISSION_MODE_8K;
575 break;
576 }
577 }
578 if (!(rc & 0x10)) {
579 switch (rc & 0x3) {
580 case 0:
581 p->guard_interval = GUARD_INTERVAL_1_4;
582 break;
583 case 1:
584 p->guard_interval = GUARD_INTERVAL_1_8;
585 break;
586 case 2:
587 p->guard_interval = GUARD_INTERVAL_1_16;
588 break;
589 }
590 }
591 }
592
593 if (fe->ops.i2c_gate_ctrl)
594 fe->ops.i2c_gate_ctrl(fe, 1);
533 595
534 return 0; 596 return 0;
535} 597}
536 598
537static int mb86a20s_tune(struct dvb_frontend *fe, 599static int mb86a20s_tune(struct dvb_frontend *fe,
538 struct dvb_frontend_parameters *params, 600 bool re_tune,
539 unsigned int mode_flags, 601 unsigned int mode_flags,
540 unsigned int *delay, 602 unsigned int *delay,
541 fe_status_t *status) 603 fe_status_t *status)
@@ -544,8 +606,8 @@ static int mb86a20s_tune(struct dvb_frontend *fe,
544 606
545 dprintk("\n"); 607 dprintk("\n");
546 608
547 if (params != NULL) 609 if (re_tune)
548 rc = mb86a20s_set_frontend(fe, params); 610 rc = mb86a20s_set_frontend(fe);
549 611
550 if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) 612 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
551 mb86a20s_read_status(fe, status); 613 mb86a20s_read_status(fe, status);
@@ -608,10 +670,10 @@ error:
608EXPORT_SYMBOL(mb86a20s_attach); 670EXPORT_SYMBOL(mb86a20s_attach);
609 671
610static struct dvb_frontend_ops mb86a20s_ops = { 672static struct dvb_frontend_ops mb86a20s_ops = {
673 .delsys = { SYS_ISDBT },
611 /* Use dib8000 values per default */ 674 /* Use dib8000 values per default */
612 .info = { 675 .info = {
613 .name = "Fujitsu mb86A20s", 676 .name = "Fujitsu mb86A20s",
614 .type = FE_OFDM,
615 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER | 677 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
616 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 678 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
617 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 679 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
diff --git a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c
index 83e6f1a1b70..e20bf13aa86 100644
--- a/drivers/media/dvb/frontends/mt312.c
+++ b/drivers/media/dvb/frontends/mt312.c
@@ -531,9 +531,9 @@ static int mt312_read_ucblocks(struct dvb_frontend *fe, u32 *ubc)
531 return 0; 531 return 0;
532} 532}
533 533
534static int mt312_set_frontend(struct dvb_frontend *fe, 534static int mt312_set_frontend(struct dvb_frontend *fe)
535 struct dvb_frontend_parameters *p)
536{ 535{
536 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
537 struct mt312_state *state = fe->demodulator_priv; 537 struct mt312_state *state = fe->demodulator_priv;
538 int ret; 538 int ret;
539 u8 buf[5], config_val; 539 u8 buf[5], config_val;
@@ -553,16 +553,16 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
553 || (p->inversion > INVERSION_ON)) 553 || (p->inversion > INVERSION_ON))
554 return -EINVAL; 554 return -EINVAL;
555 555
556 if ((p->u.qpsk.symbol_rate < fe->ops.info.symbol_rate_min) 556 if ((p->symbol_rate < fe->ops.info.symbol_rate_min)
557 || (p->u.qpsk.symbol_rate > fe->ops.info.symbol_rate_max)) 557 || (p->symbol_rate > fe->ops.info.symbol_rate_max))
558 return -EINVAL; 558 return -EINVAL;
559 559
560 if ((p->u.qpsk.fec_inner < FEC_NONE) 560 if ((p->fec_inner < FEC_NONE)
561 || (p->u.qpsk.fec_inner > FEC_AUTO)) 561 || (p->fec_inner > FEC_AUTO))
562 return -EINVAL; 562 return -EINVAL;
563 563
564 if ((p->u.qpsk.fec_inner == FEC_4_5) 564 if ((p->fec_inner == FEC_4_5)
565 || (p->u.qpsk.fec_inner == FEC_8_9)) 565 || (p->fec_inner == FEC_8_9))
566 return -EINVAL; 566 return -EINVAL;
567 567
568 switch (state->id) { 568 switch (state->id) {
@@ -574,7 +574,7 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
574 ret = mt312_readreg(state, CONFIG, &config_val); 574 ret = mt312_readreg(state, CONFIG, &config_val);
575 if (ret < 0) 575 if (ret < 0)
576 return ret; 576 return ret;
577 if (p->u.qpsk.symbol_rate >= 30000000) { 577 if (p->symbol_rate >= 30000000) {
578 /* Note that 30MS/s should use 90MHz */ 578 /* Note that 30MS/s should use 90MHz */
579 if (state->freq_mult == 6) { 579 if (state->freq_mult == 6) {
580 /* We are running 60MHz */ 580 /* We are running 60MHz */
@@ -603,25 +603,25 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
603 } 603 }
604 604
605 if (fe->ops.tuner_ops.set_params) { 605 if (fe->ops.tuner_ops.set_params) {
606 fe->ops.tuner_ops.set_params(fe, p); 606 fe->ops.tuner_ops.set_params(fe);
607 if (fe->ops.i2c_gate_ctrl) 607 if (fe->ops.i2c_gate_ctrl)
608 fe->ops.i2c_gate_ctrl(fe, 0); 608 fe->ops.i2c_gate_ctrl(fe, 0);
609 } 609 }
610 610
611 /* sr = (u16)(sr * 256.0 / 1000000.0) */ 611 /* sr = (u16)(sr * 256.0 / 1000000.0) */
612 sr = mt312_div(p->u.qpsk.symbol_rate * 4, 15625); 612 sr = mt312_div(p->symbol_rate * 4, 15625);
613 613
614 /* SYM_RATE */ 614 /* SYM_RATE */
615 buf[0] = (sr >> 8) & 0x3f; 615 buf[0] = (sr >> 8) & 0x3f;
616 buf[1] = (sr >> 0) & 0xff; 616 buf[1] = (sr >> 0) & 0xff;
617 617
618 /* VIT_MODE */ 618 /* VIT_MODE */
619 buf[2] = inv_tab[p->inversion] | fec_tab[p->u.qpsk.fec_inner]; 619 buf[2] = inv_tab[p->inversion] | fec_tab[p->fec_inner];
620 620
621 /* QPSK_CTRL */ 621 /* QPSK_CTRL */
622 buf[3] = 0x40; /* swap I and Q before QPSK demodulation */ 622 buf[3] = 0x40; /* swap I and Q before QPSK demodulation */
623 623
624 if (p->u.qpsk.symbol_rate < 10000000) 624 if (p->symbol_rate < 10000000)
625 buf[3] |= 0x04; /* use afc mode */ 625 buf[3] |= 0x04; /* use afc mode */
626 626
627 /* GO */ 627 /* GO */
@@ -636,9 +636,9 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
636 return 0; 636 return 0;
637} 637}
638 638
639static int mt312_get_frontend(struct dvb_frontend *fe, 639static int mt312_get_frontend(struct dvb_frontend *fe)
640 struct dvb_frontend_parameters *p)
641{ 640{
641 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
642 struct mt312_state *state = fe->demodulator_priv; 642 struct mt312_state *state = fe->demodulator_priv;
643 int ret; 643 int ret;
644 644
@@ -646,11 +646,11 @@ static int mt312_get_frontend(struct dvb_frontend *fe,
646 if (ret < 0) 646 if (ret < 0)
647 return ret; 647 return ret;
648 648
649 ret = mt312_get_symbol_rate(state, &p->u.qpsk.symbol_rate); 649 ret = mt312_get_symbol_rate(state, &p->symbol_rate);
650 if (ret < 0) 650 if (ret < 0)
651 return ret; 651 return ret;
652 652
653 ret = mt312_get_code_rate(state, &p->u.qpsk.fec_inner); 653 ret = mt312_get_code_rate(state, &p->fec_inner);
654 if (ret < 0) 654 if (ret < 0)
655 return ret; 655 return ret;
656 656
@@ -738,10 +738,9 @@ static void mt312_release(struct dvb_frontend *fe)
738 738
739#define MT312_SYS_CLK 90000000UL /* 90 MHz */ 739#define MT312_SYS_CLK 90000000UL /* 90 MHz */
740static struct dvb_frontend_ops mt312_ops = { 740static struct dvb_frontend_ops mt312_ops = {
741 741 .delsys = { SYS_DVBS },
742 .info = { 742 .info = {
743 .name = "Zarlink ???? DVB-S", 743 .name = "Zarlink ???? DVB-S",
744 .type = FE_QPSK,
745 .frequency_min = 950000, 744 .frequency_min = 950000,
746 .frequency_max = 2150000, 745 .frequency_max = 2150000,
747 /* FIXME: adjust freq to real used xtal */ 746 /* FIXME: adjust freq to real used xtal */
diff --git a/drivers/media/dvb/frontends/mt352.c b/drivers/media/dvb/frontends/mt352.c
index 319672f8e1a..2c3b50e828d 100644
--- a/drivers/media/dvb/frontends/mt352.c
+++ b/drivers/media/dvb/frontends/mt352.c
@@ -111,20 +111,20 @@ static int mt352_sleep(struct dvb_frontend* fe)
111} 111}
112 112
113static void mt352_calc_nominal_rate(struct mt352_state* state, 113static void mt352_calc_nominal_rate(struct mt352_state* state,
114 enum fe_bandwidth bandwidth, 114 u32 bandwidth,
115 unsigned char *buf) 115 unsigned char *buf)
116{ 116{
117 u32 adc_clock = 20480; /* 20.340 MHz */ 117 u32 adc_clock = 20480; /* 20.340 MHz */
118 u32 bw,value; 118 u32 bw,value;
119 119
120 switch (bandwidth) { 120 switch (bandwidth) {
121 case BANDWIDTH_6_MHZ: 121 case 6000000:
122 bw = 6; 122 bw = 6;
123 break; 123 break;
124 case BANDWIDTH_7_MHZ: 124 case 7000000:
125 bw = 7; 125 bw = 7;
126 break; 126 break;
127 case BANDWIDTH_8_MHZ: 127 case 8000000:
128 default: 128 default:
129 bw = 8; 129 bw = 8;
130 break; 130 break;
@@ -166,15 +166,14 @@ static void mt352_calc_input_freq(struct mt352_state* state,
166 buf[1] = lsb(value); 166 buf[1] = lsb(value);
167} 167}
168 168
169static int mt352_set_parameters(struct dvb_frontend* fe, 169static int mt352_set_parameters(struct dvb_frontend *fe)
170 struct dvb_frontend_parameters *param)
171{ 170{
171 struct dtv_frontend_properties *op = &fe->dtv_property_cache;
172 struct mt352_state* state = fe->demodulator_priv; 172 struct mt352_state* state = fe->demodulator_priv;
173 unsigned char buf[13]; 173 unsigned char buf[13];
174 static unsigned char tuner_go[] = { 0x5d, 0x01 }; 174 static unsigned char tuner_go[] = { 0x5d, 0x01 };
175 static unsigned char fsm_go[] = { 0x5e, 0x01 }; 175 static unsigned char fsm_go[] = { 0x5e, 0x01 };
176 unsigned int tps = 0; 176 unsigned int tps = 0;
177 struct dvb_ofdm_parameters *op = &param->u.ofdm;
178 177
179 switch (op->code_rate_HP) { 178 switch (op->code_rate_HP) {
180 case FEC_2_3: 179 case FEC_2_3:
@@ -213,14 +212,14 @@ static int mt352_set_parameters(struct dvb_frontend* fe,
213 case FEC_AUTO: 212 case FEC_AUTO:
214 break; 213 break;
215 case FEC_NONE: 214 case FEC_NONE:
216 if (op->hierarchy_information == HIERARCHY_AUTO || 215 if (op->hierarchy == HIERARCHY_AUTO ||
217 op->hierarchy_information == HIERARCHY_NONE) 216 op->hierarchy == HIERARCHY_NONE)
218 break; 217 break;
219 default: 218 default:
220 return -EINVAL; 219 return -EINVAL;
221 } 220 }
222 221
223 switch (op->constellation) { 222 switch (op->modulation) {
224 case QPSK: 223 case QPSK:
225 break; 224 break;
226 case QAM_AUTO: 225 case QAM_AUTO:
@@ -262,7 +261,7 @@ static int mt352_set_parameters(struct dvb_frontend* fe,
262 return -EINVAL; 261 return -EINVAL;
263 } 262 }
264 263
265 switch (op->hierarchy_information) { 264 switch (op->hierarchy) {
266 case HIERARCHY_AUTO: 265 case HIERARCHY_AUTO:
267 case HIERARCHY_NONE: 266 case HIERARCHY_NONE:
268 break; 267 break;
@@ -288,12 +287,12 @@ static int mt352_set_parameters(struct dvb_frontend* fe,
288 buf[3] = 0x50; // old 287 buf[3] = 0x50; // old
289// buf[3] = 0xf4; // pinnacle 288// buf[3] = 0xf4; // pinnacle
290 289
291 mt352_calc_nominal_rate(state, op->bandwidth, buf+4); 290 mt352_calc_nominal_rate(state, op->bandwidth_hz, buf+4);
292 mt352_calc_input_freq(state, buf+6); 291 mt352_calc_input_freq(state, buf+6);
293 292
294 if (state->config.no_tuner) { 293 if (state->config.no_tuner) {
295 if (fe->ops.tuner_ops.set_params) { 294 if (fe->ops.tuner_ops.set_params) {
296 fe->ops.tuner_ops.set_params(fe, param); 295 fe->ops.tuner_ops.set_params(fe);
297 if (fe->ops.i2c_gate_ctrl) 296 if (fe->ops.i2c_gate_ctrl)
298 fe->ops.i2c_gate_ctrl(fe, 0); 297 fe->ops.i2c_gate_ctrl(fe, 0);
299 } 298 }
@@ -302,7 +301,7 @@ static int mt352_set_parameters(struct dvb_frontend* fe,
302 _mt352_write(fe, fsm_go, 2); 301 _mt352_write(fe, fsm_go, 2);
303 } else { 302 } else {
304 if (fe->ops.tuner_ops.calc_regs) { 303 if (fe->ops.tuner_ops.calc_regs) {
305 fe->ops.tuner_ops.calc_regs(fe, param, buf+8, 5); 304 fe->ops.tuner_ops.calc_regs(fe, buf+8, 5);
306 buf[8] <<= 1; 305 buf[8] <<= 1;
307 _mt352_write(fe, buf, sizeof(buf)); 306 _mt352_write(fe, buf, sizeof(buf));
308 _mt352_write(fe, tuner_go, 2); 307 _mt352_write(fe, tuner_go, 2);
@@ -312,14 +311,13 @@ static int mt352_set_parameters(struct dvb_frontend* fe,
312 return 0; 311 return 0;
313} 312}
314 313
315static int mt352_get_parameters(struct dvb_frontend* fe, 314static int mt352_get_parameters(struct dvb_frontend* fe)
316 struct dvb_frontend_parameters *param)
317{ 315{
316 struct dtv_frontend_properties *op = &fe->dtv_property_cache;
318 struct mt352_state* state = fe->demodulator_priv; 317 struct mt352_state* state = fe->demodulator_priv;
319 u16 tps; 318 u16 tps;
320 u16 div; 319 u16 div;
321 u8 trl; 320 u8 trl;
322 struct dvb_ofdm_parameters *op = &param->u.ofdm;
323 static const u8 tps_fec_to_api[8] = 321 static const u8 tps_fec_to_api[8] =
324 { 322 {
325 FEC_1_2, 323 FEC_1_2,
@@ -348,16 +346,16 @@ static int mt352_get_parameters(struct dvb_frontend* fe,
348 switch ( (tps >> 13) & 3) 346 switch ( (tps >> 13) & 3)
349 { 347 {
350 case 0: 348 case 0:
351 op->constellation = QPSK; 349 op->modulation = QPSK;
352 break; 350 break;
353 case 1: 351 case 1:
354 op->constellation = QAM_16; 352 op->modulation = QAM_16;
355 break; 353 break;
356 case 2: 354 case 2:
357 op->constellation = QAM_64; 355 op->modulation = QAM_64;
358 break; 356 break;
359 default: 357 default:
360 op->constellation = QAM_AUTO; 358 op->modulation = QAM_AUTO;
361 break; 359 break;
362 } 360 }
363 361
@@ -385,36 +383,36 @@ static int mt352_get_parameters(struct dvb_frontend* fe,
385 switch ( (tps >> 10) & 7) 383 switch ( (tps >> 10) & 7)
386 { 384 {
387 case 0: 385 case 0:
388 op->hierarchy_information = HIERARCHY_NONE; 386 op->hierarchy = HIERARCHY_NONE;
389 break; 387 break;
390 case 1: 388 case 1:
391 op->hierarchy_information = HIERARCHY_1; 389 op->hierarchy = HIERARCHY_1;
392 break; 390 break;
393 case 2: 391 case 2:
394 op->hierarchy_information = HIERARCHY_2; 392 op->hierarchy = HIERARCHY_2;
395 break; 393 break;
396 case 3: 394 case 3:
397 op->hierarchy_information = HIERARCHY_4; 395 op->hierarchy = HIERARCHY_4;
398 break; 396 break;
399 default: 397 default:
400 op->hierarchy_information = HIERARCHY_AUTO; 398 op->hierarchy = HIERARCHY_AUTO;
401 break; 399 break;
402 } 400 }
403 401
404 param->frequency = ( 500 * (div - IF_FREQUENCYx6) ) / 3 * 1000; 402 op->frequency = (500 * (div - IF_FREQUENCYx6)) / 3 * 1000;
405 403
406 if (trl == 0x72) 404 if (trl == 0x72)
407 op->bandwidth = BANDWIDTH_8_MHZ; 405 op->bandwidth_hz = 8000000;
408 else if (trl == 0x64) 406 else if (trl == 0x64)
409 op->bandwidth = BANDWIDTH_7_MHZ; 407 op->bandwidth_hz = 7000000;
410 else 408 else
411 op->bandwidth = BANDWIDTH_6_MHZ; 409 op->bandwidth_hz = 6000000;
412 410
413 411
414 if (mt352_read_register(state, STATUS_2) & 0x02) 412 if (mt352_read_register(state, STATUS_2) & 0x02)
415 param->inversion = INVERSION_OFF; 413 op->inversion = INVERSION_OFF;
416 else 414 else
417 param->inversion = INVERSION_ON; 415 op->inversion = INVERSION_ON;
418 416
419 return 0; 417 return 0;
420} 418}
@@ -569,10 +567,9 @@ error:
569} 567}
570 568
571static struct dvb_frontend_ops mt352_ops = { 569static struct dvb_frontend_ops mt352_ops = {
572 570 .delsys = { SYS_DVBT },
573 .info = { 571 .info = {
574 .name = "Zarlink MT352 DVB-T", 572 .name = "Zarlink MT352 DVB-T",
575 .type = FE_OFDM,
576 .frequency_min = 174000000, 573 .frequency_min = 174000000,
577 .frequency_max = 862000000, 574 .frequency_max = 862000000,
578 .frequency_stepsize = 166667, 575 .frequency_stepsize = 166667,
diff --git a/drivers/media/dvb/frontends/nxt200x.c b/drivers/media/dvb/frontends/nxt200x.c
index eac20650499..49ca78d883b 100644
--- a/drivers/media/dvb/frontends/nxt200x.c
+++ b/drivers/media/dvb/frontends/nxt200x.c
@@ -528,9 +528,9 @@ static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware
528 return 0; 528 return 0;
529}; 529};
530 530
531static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe, 531static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
532 struct dvb_frontend_parameters *p)
533{ 532{
533 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
534 struct nxt200x_state* state = fe->demodulator_priv; 534 struct nxt200x_state* state = fe->demodulator_priv;
535 u8 buf[5]; 535 u8 buf[5];
536 536
@@ -546,7 +546,7 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
546 } 546 }
547 547
548 /* set additional params */ 548 /* set additional params */
549 switch (p->u.vsb.modulation) { 549 switch (p->modulation) {
550 case QAM_64: 550 case QAM_64:
551 case QAM_256: 551 case QAM_256:
552 /* Set punctured clock for QAM */ 552 /* Set punctured clock for QAM */
@@ -566,7 +566,7 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
566 566
567 if (fe->ops.tuner_ops.calc_regs) { 567 if (fe->ops.tuner_ops.calc_regs) {
568 /* get tuning information */ 568 /* get tuning information */
569 fe->ops.tuner_ops.calc_regs(fe, p, buf, 5); 569 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
570 570
571 /* write frequency information */ 571 /* write frequency information */
572 nxt200x_writetuner(state, buf); 572 nxt200x_writetuner(state, buf);
@@ -576,7 +576,7 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
576 nxt200x_agc_reset(state); 576 nxt200x_agc_reset(state);
577 577
578 /* set target power level */ 578 /* set target power level */
579 switch (p->u.vsb.modulation) { 579 switch (p->modulation) {
580 case QAM_64: 580 case QAM_64:
581 case QAM_256: 581 case QAM_256:
582 buf[0] = 0x74; 582 buf[0] = 0x74;
@@ -620,7 +620,7 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
620 } 620 }
621 621
622 /* write sdmx input */ 622 /* write sdmx input */
623 switch (p->u.vsb.modulation) { 623 switch (p->modulation) {
624 case QAM_64: 624 case QAM_64:
625 buf[0] = 0x68; 625 buf[0] = 0x68;
626 break; 626 break;
@@ -714,7 +714,7 @@ static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
714 } 714 }
715 715
716 /* write agc ucgp0 */ 716 /* write agc ucgp0 */
717 switch (p->u.vsb.modulation) { 717 switch (p->modulation) {
718 case QAM_64: 718 case QAM_64:
719 buf[0] = 0x02; 719 buf[0] = 0x02;
720 break; 720 break;
@@ -1203,10 +1203,9 @@ error:
1203} 1203}
1204 1204
1205static struct dvb_frontend_ops nxt200x_ops = { 1205static struct dvb_frontend_ops nxt200x_ops = {
1206 1206 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1207 .info = { 1207 .info = {
1208 .name = "Nextwave NXT200X VSB/QAM frontend", 1208 .name = "Nextwave NXT200X VSB/QAM frontend",
1209 .type = FE_ATSC,
1210 .frequency_min = 54000000, 1209 .frequency_min = 54000000,
1211 .frequency_max = 860000000, 1210 .frequency_max = 860000000,
1212 .frequency_stepsize = 166666, /* stepsize is just a guess */ 1211 .frequency_stepsize = 166666, /* stepsize is just a guess */
diff --git a/drivers/media/dvb/frontends/nxt6000.c b/drivers/media/dvb/frontends/nxt6000.c
index 6599b8fea9e..90ae6c72c0e 100644
--- a/drivers/media/dvb/frontends/nxt6000.c
+++ b/drivers/media/dvb/frontends/nxt6000.c
@@ -81,22 +81,21 @@ static void nxt6000_reset(struct nxt6000_state* state)
81 nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT); 81 nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT);
82} 82}
83 83
84static int nxt6000_set_bandwidth(struct nxt6000_state* state, fe_bandwidth_t bandwidth) 84static int nxt6000_set_bandwidth(struct nxt6000_state *state, u32 bandwidth)
85{ 85{
86 u16 nominal_rate; 86 u16 nominal_rate;
87 int result; 87 int result;
88 88
89 switch (bandwidth) { 89 switch (bandwidth) {
90 90 case 6000000:
91 case BANDWIDTH_6_MHZ:
92 nominal_rate = 0x55B7; 91 nominal_rate = 0x55B7;
93 break; 92 break;
94 93
95 case BANDWIDTH_7_MHZ: 94 case 7000000:
96 nominal_rate = 0x6400; 95 nominal_rate = 0x6400;
97 break; 96 break;
98 97
99 case BANDWIDTH_8_MHZ: 98 case 8000000:
100 nominal_rate = 0x7249; 99 nominal_rate = 0x7249;
101 break; 100 break;
102 101
@@ -457,23 +456,31 @@ static int nxt6000_init(struct dvb_frontend* fe)
457 return 0; 456 return 0;
458} 457}
459 458
460static int nxt6000_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *param) 459static int nxt6000_set_frontend(struct dvb_frontend *fe)
461{ 460{
461 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
462 struct nxt6000_state* state = fe->demodulator_priv; 462 struct nxt6000_state* state = fe->demodulator_priv;
463 int result; 463 int result;
464 464
465 if (fe->ops.tuner_ops.set_params) { 465 if (fe->ops.tuner_ops.set_params) {
466 fe->ops.tuner_ops.set_params(fe, param); 466 fe->ops.tuner_ops.set_params(fe);
467 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 467 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
468 } 468 }
469 469
470 if ((result = nxt6000_set_bandwidth(state, param->u.ofdm.bandwidth)) < 0) 470 result = nxt6000_set_bandwidth(state, p->bandwidth_hz);
471 if (result < 0)
471 return result; 472 return result;
472 if ((result = nxt6000_set_guard_interval(state, param->u.ofdm.guard_interval)) < 0) 473
474 result = nxt6000_set_guard_interval(state, p->guard_interval);
475 if (result < 0)
473 return result; 476 return result;
474 if ((result = nxt6000_set_transmission_mode(state, param->u.ofdm.transmission_mode)) < 0) 477
478 result = nxt6000_set_transmission_mode(state, p->transmission_mode);
479 if (result < 0)
475 return result; 480 return result;
476 if ((result = nxt6000_set_inversion(state, param->inversion)) < 0) 481
482 result = nxt6000_set_inversion(state, p->inversion);
483 if (result < 0)
477 return result; 484 return result;
478 485
479 msleep(500); 486 msleep(500);
@@ -566,10 +573,9 @@ error:
566} 573}
567 574
568static struct dvb_frontend_ops nxt6000_ops = { 575static struct dvb_frontend_ops nxt6000_ops = {
569 576 .delsys = { SYS_DVBT },
570 .info = { 577 .info = {
571 .name = "NxtWave NXT6000 DVB-T", 578 .name = "NxtWave NXT6000 DVB-T",
572 .type = FE_OFDM,
573 .frequency_min = 0, 579 .frequency_min = 0,
574 .frequency_max = 863250000, 580 .frequency_max = 863250000,
575 .frequency_stepsize = 62500, 581 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/or51132.c b/drivers/media/dvb/frontends/or51132.c
index 38e67accb8c..5ef921823c1 100644
--- a/drivers/media/dvb/frontends/or51132.c
+++ b/drivers/media/dvb/frontends/or51132.c
@@ -306,9 +306,9 @@ static int modulation_fw_class(fe_modulation_t modulation)
306 } 306 }
307} 307}
308 308
309static int or51132_set_parameters(struct dvb_frontend* fe, 309static int or51132_set_parameters(struct dvb_frontend *fe)
310 struct dvb_frontend_parameters *param)
311{ 310{
311 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
312 int ret; 312 int ret;
313 struct or51132_state* state = fe->demodulator_priv; 313 struct or51132_state* state = fe->demodulator_priv;
314 const struct firmware *fw; 314 const struct firmware *fw;
@@ -317,8 +317,8 @@ static int or51132_set_parameters(struct dvb_frontend* fe,
317 317
318 /* Upload new firmware only if we need a different one */ 318 /* Upload new firmware only if we need a different one */
319 if (modulation_fw_class(state->current_modulation) != 319 if (modulation_fw_class(state->current_modulation) !=
320 modulation_fw_class(param->u.vsb.modulation)) { 320 modulation_fw_class(p->modulation)) {
321 switch(modulation_fw_class(param->u.vsb.modulation)) { 321 switch (modulation_fw_class(p->modulation)) {
322 case MOD_FWCLASS_VSB: 322 case MOD_FWCLASS_VSB:
323 dprintk("set_parameters VSB MODE\n"); 323 dprintk("set_parameters VSB MODE\n");
324 fwname = OR51132_VSB_FIRMWARE; 324 fwname = OR51132_VSB_FIRMWARE;
@@ -335,7 +335,7 @@ static int or51132_set_parameters(struct dvb_frontend* fe,
335 break; 335 break;
336 default: 336 default:
337 printk("or51132: Modulation type(%d) UNSUPPORTED\n", 337 printk("or51132: Modulation type(%d) UNSUPPORTED\n",
338 param->u.vsb.modulation); 338 p->modulation);
339 return -1; 339 return -1;
340 } 340 }
341 printk("or51132: Waiting for firmware upload(%s)...\n", 341 printk("or51132: Waiting for firmware upload(%s)...\n",
@@ -357,13 +357,13 @@ static int or51132_set_parameters(struct dvb_frontend* fe,
357 state->config->set_ts_params(fe, clock_mode); 357 state->config->set_ts_params(fe, clock_mode);
358 } 358 }
359 /* Change only if we are actually changing the modulation */ 359 /* Change only if we are actually changing the modulation */
360 if (state->current_modulation != param->u.vsb.modulation) { 360 if (state->current_modulation != p->modulation) {
361 state->current_modulation = param->u.vsb.modulation; 361 state->current_modulation = p->modulation;
362 or51132_setmode(fe); 362 or51132_setmode(fe);
363 } 363 }
364 364
365 if (fe->ops.tuner_ops.set_params) { 365 if (fe->ops.tuner_ops.set_params) {
366 fe->ops.tuner_ops.set_params(fe, param); 366 fe->ops.tuner_ops.set_params(fe);
367 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 367 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
368 } 368 }
369 369
@@ -371,13 +371,13 @@ static int or51132_set_parameters(struct dvb_frontend* fe,
371 or51132_setmode(fe); 371 or51132_setmode(fe);
372 372
373 /* Update current frequency */ 373 /* Update current frequency */
374 state->current_frequency = param->frequency; 374 state->current_frequency = p->frequency;
375 return 0; 375 return 0;
376} 376}
377 377
378static int or51132_get_parameters(struct dvb_frontend* fe, 378static int or51132_get_parameters(struct dvb_frontend* fe)
379 struct dvb_frontend_parameters *param)
380{ 379{
380 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
381 struct or51132_state* state = fe->demodulator_priv; 381 struct or51132_state* state = fe->demodulator_priv;
382 int status; 382 int status;
383 int retry = 1; 383 int retry = 1;
@@ -389,21 +389,28 @@ start:
389 return -EREMOTEIO; 389 return -EREMOTEIO;
390 } 390 }
391 switch(status&0xff) { 391 switch(status&0xff) {
392 case 0x06: param->u.vsb.modulation = VSB_8; break; 392 case 0x06:
393 case 0x43: param->u.vsb.modulation = QAM_64; break; 393 p->modulation = VSB_8;
394 case 0x45: param->u.vsb.modulation = QAM_256; break; 394 break;
395 default: 395 case 0x43:
396 if (retry--) goto start; 396 p->modulation = QAM_64;
397 printk(KERN_WARNING "or51132: unknown status 0x%02x\n", 397 break;
398 status&0xff); 398 case 0x45:
399 return -EREMOTEIO; 399 p->modulation = QAM_256;
400 break;
401 default:
402 if (retry--)
403 goto start;
404 printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
405 status&0xff);
406 return -EREMOTEIO;
400 } 407 }
401 408
402 /* FIXME: Read frequency from frontend, take AFC into account */ 409 /* FIXME: Read frequency from frontend, take AFC into account */
403 param->frequency = state->current_frequency; 410 p->frequency = state->current_frequency;
404 411
405 /* FIXME: How to read inversion setting? Receiver 6 register? */ 412 /* FIXME: How to read inversion setting? Receiver 6 register? */
406 param->inversion = INVERSION_AUTO; 413 p->inversion = INVERSION_AUTO;
407 414
408 return 0; 415 return 0;
409} 416}
@@ -579,10 +586,9 @@ struct dvb_frontend* or51132_attach(const struct or51132_config* config,
579} 586}
580 587
581static struct dvb_frontend_ops or51132_ops = { 588static struct dvb_frontend_ops or51132_ops = {
582 589 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
583 .info = { 590 .info = {
584 .name = "Oren OR51132 VSB/QAM Frontend", 591 .name = "Oren OR51132 VSB/QAM Frontend",
585 .type = FE_ATSC,
586 .frequency_min = 44000000, 592 .frequency_min = 44000000,
587 .frequency_max = 958000000, 593 .frequency_max = 958000000,
588 .frequency_stepsize = 166666, 594 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/or51211.c b/drivers/media/dvb/frontends/or51211.c
index c709ce6771c..c625b57b433 100644
--- a/drivers/media/dvb/frontends/or51211.c
+++ b/drivers/media/dvb/frontends/or51211.c
@@ -218,15 +218,15 @@ static int or51211_setmode(struct dvb_frontend* fe, int mode)
218 return 0; 218 return 0;
219} 219}
220 220
221static int or51211_set_parameters(struct dvb_frontend* fe, 221static int or51211_set_parameters(struct dvb_frontend *fe)
222 struct dvb_frontend_parameters *param)
223{ 222{
223 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
224 struct or51211_state* state = fe->demodulator_priv; 224 struct or51211_state* state = fe->demodulator_priv;
225 225
226 /* Change only if we are actually changing the channel */ 226 /* Change only if we are actually changing the channel */
227 if (state->current_frequency != param->frequency) { 227 if (state->current_frequency != p->frequency) {
228 if (fe->ops.tuner_ops.set_params) { 228 if (fe->ops.tuner_ops.set_params) {
229 fe->ops.tuner_ops.set_params(fe, param); 229 fe->ops.tuner_ops.set_params(fe);
230 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 230 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
231 } 231 }
232 232
@@ -234,7 +234,7 @@ static int or51211_set_parameters(struct dvb_frontend* fe,
234 or51211_setmode(fe,0); 234 or51211_setmode(fe,0);
235 235
236 /* Update current frequency */ 236 /* Update current frequency */
237 state->current_frequency = param->frequency; 237 state->current_frequency = p->frequency;
238 } 238 }
239 return 0; 239 return 0;
240} 240}
@@ -544,10 +544,9 @@ struct dvb_frontend* or51211_attach(const struct or51211_config* config,
544} 544}
545 545
546static struct dvb_frontend_ops or51211_ops = { 546static struct dvb_frontend_ops or51211_ops = {
547 547 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
548 .info = { 548 .info = {
549 .name = "Oren OR51211 VSB Frontend", 549 .name = "Oren OR51211 VSB Frontend",
550 .type = FE_ATSC,
551 .frequency_min = 44000000, 550 .frequency_min = 44000000,
552 .frequency_max = 958000000, 551 .frequency_max = 958000000,
553 .frequency_stepsize = 166666, 552 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/s5h1409.c b/drivers/media/dvb/frontends/s5h1409.c
index 0e2f61a8978..f71b06221e1 100644
--- a/drivers/media/dvb/frontends/s5h1409.c
+++ b/drivers/media/dvb/frontends/s5h1409.c
@@ -631,9 +631,9 @@ static void s5h1409_set_qam_interleave_mode_legacy(struct dvb_frontend *fe)
631} 631}
632 632
633/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ 633/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
634static int s5h1409_set_frontend(struct dvb_frontend *fe, 634static int s5h1409_set_frontend(struct dvb_frontend *fe)
635 struct dvb_frontend_parameters *p)
636{ 635{
636 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
637 struct s5h1409_state *state = fe->demodulator_priv; 637 struct s5h1409_state *state = fe->demodulator_priv;
638 638
639 dprintk("%s(frequency=%d)\n", __func__, p->frequency); 639 dprintk("%s(frequency=%d)\n", __func__, p->frequency);
@@ -642,12 +642,12 @@ static int s5h1409_set_frontend(struct dvb_frontend *fe,
642 642
643 state->current_frequency = p->frequency; 643 state->current_frequency = p->frequency;
644 644
645 s5h1409_enable_modulation(fe, p->u.vsb.modulation); 645 s5h1409_enable_modulation(fe, p->modulation);
646 646
647 if (fe->ops.tuner_ops.set_params) { 647 if (fe->ops.tuner_ops.set_params) {
648 if (fe->ops.i2c_gate_ctrl) 648 if (fe->ops.i2c_gate_ctrl)
649 fe->ops.i2c_gate_ctrl(fe, 1); 649 fe->ops.i2c_gate_ctrl(fe, 1);
650 fe->ops.tuner_ops.set_params(fe, p); 650 fe->ops.tuner_ops.set_params(fe);
651 if (fe->ops.i2c_gate_ctrl) 651 if (fe->ops.i2c_gate_ctrl)
652 fe->ops.i2c_gate_ctrl(fe, 0); 652 fe->ops.i2c_gate_ctrl(fe, 0);
653 } 653 }
@@ -879,7 +879,36 @@ static int s5h1409_read_snr(struct dvb_frontend *fe, u16 *snr)
879static int s5h1409_read_signal_strength(struct dvb_frontend *fe, 879static int s5h1409_read_signal_strength(struct dvb_frontend *fe,
880 u16 *signal_strength) 880 u16 *signal_strength)
881{ 881{
882 return s5h1409_read_snr(fe, signal_strength); 882 /* borrowed from lgdt330x.c
883 *
884 * Calculate strength from SNR up to 35dB
885 * Even though the SNR can go higher than 35dB,
886 * there is some comfort factor in having a range of
887 * strong signals that can show at 100%
888 */
889 u16 snr;
890 u32 tmp;
891 int ret = s5h1409_read_snr(fe, &snr);
892
893 *signal_strength = 0;
894
895 if (0 == ret) {
896 /* The following calculation method was chosen
897 * purely for the sake of code re-use from the
898 * other demod drivers that use this method */
899
900 /* Convert from SNR in dB * 10 to 8.24 fixed-point */
901 tmp = (snr * ((1 << 24) / 10));
902
903 /* Convert from 8.24 fixed-point to
904 * scale the range 0 - 35*2^24 into 0 - 65535*/
905 if (tmp >= 8960 * 0x10000)
906 *signal_strength = 0xffff;
907 else
908 *signal_strength = tmp / 8960;
909 }
910
911 return ret;
883} 912}
884 913
885static int s5h1409_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 914static int s5h1409_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
@@ -896,13 +925,13 @@ static int s5h1409_read_ber(struct dvb_frontend *fe, u32 *ber)
896 return s5h1409_read_ucblocks(fe, ber); 925 return s5h1409_read_ucblocks(fe, ber);
897} 926}
898 927
899static int s5h1409_get_frontend(struct dvb_frontend *fe, 928static int s5h1409_get_frontend(struct dvb_frontend *fe)
900 struct dvb_frontend_parameters *p)
901{ 929{
930 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
902 struct s5h1409_state *state = fe->demodulator_priv; 931 struct s5h1409_state *state = fe->demodulator_priv;
903 932
904 p->frequency = state->current_frequency; 933 p->frequency = state->current_frequency;
905 p->u.vsb.modulation = state->current_modulation; 934 p->modulation = state->current_modulation;
906 935
907 return 0; 936 return 0;
908} 937}
@@ -967,10 +996,9 @@ error:
967EXPORT_SYMBOL(s5h1409_attach); 996EXPORT_SYMBOL(s5h1409_attach);
968 997
969static struct dvb_frontend_ops s5h1409_ops = { 998static struct dvb_frontend_ops s5h1409_ops = {
970 999 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
971 .info = { 1000 .info = {
972 .name = "Samsung S5H1409 QAM/8VSB Frontend", 1001 .name = "Samsung S5H1409 QAM/8VSB Frontend",
973 .type = FE_ATSC,
974 .frequency_min = 54000000, 1002 .frequency_min = 54000000,
975 .frequency_max = 858000000, 1003 .frequency_max = 858000000,
976 .frequency_stepsize = 62500, 1004 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/s5h1411.c b/drivers/media/dvb/frontends/s5h1411.c
index d8adf1e3201..6cc4b7a9dd6 100644
--- a/drivers/media/dvb/frontends/s5h1411.c
+++ b/drivers/media/dvb/frontends/s5h1411.c
@@ -585,9 +585,9 @@ static int s5h1411_register_reset(struct dvb_frontend *fe)
585} 585}
586 586
587/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ 587/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
588static int s5h1411_set_frontend(struct dvb_frontend *fe, 588static int s5h1411_set_frontend(struct dvb_frontend *fe)
589 struct dvb_frontend_parameters *p)
590{ 589{
590 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
591 struct s5h1411_state *state = fe->demodulator_priv; 591 struct s5h1411_state *state = fe->demodulator_priv;
592 592
593 dprintk("%s(frequency=%d)\n", __func__, p->frequency); 593 dprintk("%s(frequency=%d)\n", __func__, p->frequency);
@@ -596,13 +596,13 @@ static int s5h1411_set_frontend(struct dvb_frontend *fe,
596 596
597 state->current_frequency = p->frequency; 597 state->current_frequency = p->frequency;
598 598
599 s5h1411_enable_modulation(fe, p->u.vsb.modulation); 599 s5h1411_enable_modulation(fe, p->modulation);
600 600
601 if (fe->ops.tuner_ops.set_params) { 601 if (fe->ops.tuner_ops.set_params) {
602 if (fe->ops.i2c_gate_ctrl) 602 if (fe->ops.i2c_gate_ctrl)
603 fe->ops.i2c_gate_ctrl(fe, 1); 603 fe->ops.i2c_gate_ctrl(fe, 1);
604 604
605 fe->ops.tuner_ops.set_params(fe, p); 605 fe->ops.tuner_ops.set_params(fe);
606 606
607 if (fe->ops.i2c_gate_ctrl) 607 if (fe->ops.i2c_gate_ctrl)
608 fe->ops.i2c_gate_ctrl(fe, 0); 608 fe->ops.i2c_gate_ctrl(fe, 0);
@@ -794,7 +794,36 @@ static int s5h1411_read_snr(struct dvb_frontend *fe, u16 *snr)
794static int s5h1411_read_signal_strength(struct dvb_frontend *fe, 794static int s5h1411_read_signal_strength(struct dvb_frontend *fe,
795 u16 *signal_strength) 795 u16 *signal_strength)
796{ 796{
797 return s5h1411_read_snr(fe, signal_strength); 797 /* borrowed from lgdt330x.c
798 *
799 * Calculate strength from SNR up to 35dB
800 * Even though the SNR can go higher than 35dB,
801 * there is some comfort factor in having a range of
802 * strong signals that can show at 100%
803 */
804 u16 snr;
805 u32 tmp;
806 int ret = s5h1411_read_snr(fe, &snr);
807
808 *signal_strength = 0;
809
810 if (0 == ret) {
811 /* The following calculation method was chosen
812 * purely for the sake of code re-use from the
813 * other demod drivers that use this method */
814
815 /* Convert from SNR in dB * 10 to 8.24 fixed-point */
816 tmp = (snr * ((1 << 24) / 10));
817
818 /* Convert from 8.24 fixed-point to
819 * scale the range 0 - 35*2^24 into 0 - 65535*/
820 if (tmp >= 8960 * 0x10000)
821 *signal_strength = 0xffff;
822 else
823 *signal_strength = tmp / 8960;
824 }
825
826 return ret;
798} 827}
799 828
800static int s5h1411_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 829static int s5h1411_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
@@ -811,13 +840,13 @@ static int s5h1411_read_ber(struct dvb_frontend *fe, u32 *ber)
811 return s5h1411_read_ucblocks(fe, ber); 840 return s5h1411_read_ucblocks(fe, ber);
812} 841}
813 842
814static int s5h1411_get_frontend(struct dvb_frontend *fe, 843static int s5h1411_get_frontend(struct dvb_frontend *fe)
815 struct dvb_frontend_parameters *p)
816{ 844{
845 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
817 struct s5h1411_state *state = fe->demodulator_priv; 846 struct s5h1411_state *state = fe->demodulator_priv;
818 847
819 p->frequency = state->current_frequency; 848 p->frequency = state->current_frequency;
820 p->u.vsb.modulation = state->current_modulation; 849 p->modulation = state->current_modulation;
821 850
822 return 0; 851 return 0;
823} 852}
@@ -886,10 +915,9 @@ error:
886EXPORT_SYMBOL(s5h1411_attach); 915EXPORT_SYMBOL(s5h1411_attach);
887 916
888static struct dvb_frontend_ops s5h1411_ops = { 917static struct dvb_frontend_ops s5h1411_ops = {
889 918 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
890 .info = { 919 .info = {
891 .name = "Samsung S5H1411 QAM/8VSB Frontend", 920 .name = "Samsung S5H1411 QAM/8VSB Frontend",
892 .type = FE_ATSC,
893 .frequency_min = 54000000, 921 .frequency_min = 54000000,
894 .frequency_max = 858000000, 922 .frequency_max = 858000000,
895 .frequency_stepsize = 62500, 923 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c
index 3879d2e378a..2322257c69a 100644
--- a/drivers/media/dvb/frontends/s5h1420.c
+++ b/drivers/media/dvb/frontends/s5h1420.c
@@ -472,15 +472,15 @@ static void s5h1420_reset(struct s5h1420_state* state)
472} 472}
473 473
474static void s5h1420_setsymbolrate(struct s5h1420_state* state, 474static void s5h1420_setsymbolrate(struct s5h1420_state* state,
475 struct dvb_frontend_parameters *p) 475 struct dtv_frontend_properties *p)
476{ 476{
477 u8 v; 477 u8 v;
478 u64 val; 478 u64 val;
479 479
480 dprintk("enter %s\n", __func__); 480 dprintk("enter %s\n", __func__);
481 481
482 val = ((u64) p->u.qpsk.symbol_rate / 1000ULL) * (1ULL<<24); 482 val = ((u64) p->symbol_rate / 1000ULL) * (1ULL<<24);
483 if (p->u.qpsk.symbol_rate < 29000000) 483 if (p->symbol_rate < 29000000)
484 val *= 2; 484 val *= 2;
485 do_div(val, (state->fclk / 1000)); 485 do_div(val, (state->fclk / 1000));
486 486
@@ -543,7 +543,7 @@ static int s5h1420_getfreqoffset(struct s5h1420_state* state)
543} 543}
544 544
545static void s5h1420_setfec_inversion(struct s5h1420_state* state, 545static void s5h1420_setfec_inversion(struct s5h1420_state* state,
546 struct dvb_frontend_parameters *p) 546 struct dtv_frontend_properties *p)
547{ 547{
548 u8 inversion = 0; 548 u8 inversion = 0;
549 u8 vit08, vit09; 549 u8 vit08, vit09;
@@ -555,11 +555,11 @@ static void s5h1420_setfec_inversion(struct s5h1420_state* state,
555 else if (p->inversion == INVERSION_ON) 555 else if (p->inversion == INVERSION_ON)
556 inversion = state->config->invert ? 0 : 0x08; 556 inversion = state->config->invert ? 0 : 0x08;
557 557
558 if ((p->u.qpsk.fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) { 558 if ((p->fec_inner == FEC_AUTO) || (p->inversion == INVERSION_AUTO)) {
559 vit08 = 0x3f; 559 vit08 = 0x3f;
560 vit09 = 0; 560 vit09 = 0;
561 } else { 561 } else {
562 switch(p->u.qpsk.fec_inner) { 562 switch (p->fec_inner) {
563 case FEC_1_2: 563 case FEC_1_2:
564 vit08 = 0x01; vit09 = 0x10; 564 vit08 = 0x01; vit09 = 0x10;
565 break; 565 break;
@@ -628,9 +628,9 @@ static fe_spectral_inversion_t s5h1420_getinversion(struct s5h1420_state* state)
628 return INVERSION_OFF; 628 return INVERSION_OFF;
629} 629}
630 630
631static int s5h1420_set_frontend(struct dvb_frontend* fe, 631static int s5h1420_set_frontend(struct dvb_frontend *fe)
632 struct dvb_frontend_parameters *p)
633{ 632{
633 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
634 struct s5h1420_state* state = fe->demodulator_priv; 634 struct s5h1420_state* state = fe->demodulator_priv;
635 int frequency_delta; 635 int frequency_delta;
636 struct dvb_frontend_tune_settings fesettings; 636 struct dvb_frontend_tune_settings fesettings;
@@ -639,17 +639,16 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
639 dprintk("enter %s\n", __func__); 639 dprintk("enter %s\n", __func__);
640 640
641 /* check if we should do a fast-tune */ 641 /* check if we should do a fast-tune */
642 memcpy(&fesettings.parameters, p, sizeof(struct dvb_frontend_parameters));
643 s5h1420_get_tune_settings(fe, &fesettings); 642 s5h1420_get_tune_settings(fe, &fesettings);
644 frequency_delta = p->frequency - state->tunedfreq; 643 frequency_delta = p->frequency - state->tunedfreq;
645 if ((frequency_delta > -fesettings.max_drift) && 644 if ((frequency_delta > -fesettings.max_drift) &&
646 (frequency_delta < fesettings.max_drift) && 645 (frequency_delta < fesettings.max_drift) &&
647 (frequency_delta != 0) && 646 (frequency_delta != 0) &&
648 (state->fec_inner == p->u.qpsk.fec_inner) && 647 (state->fec_inner == p->fec_inner) &&
649 (state->symbol_rate == p->u.qpsk.symbol_rate)) { 648 (state->symbol_rate == p->symbol_rate)) {
650 649
651 if (fe->ops.tuner_ops.set_params) { 650 if (fe->ops.tuner_ops.set_params) {
652 fe->ops.tuner_ops.set_params(fe, p); 651 fe->ops.tuner_ops.set_params(fe);
653 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 652 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
654 } 653 }
655 if (fe->ops.tuner_ops.get_frequency) { 654 if (fe->ops.tuner_ops.get_frequency) {
@@ -669,13 +668,13 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
669 s5h1420_reset(state); 668 s5h1420_reset(state);
670 669
671 /* set s5h1420 fclk PLL according to desired symbol rate */ 670 /* set s5h1420 fclk PLL according to desired symbol rate */
672 if (p->u.qpsk.symbol_rate > 33000000) 671 if (p->symbol_rate > 33000000)
673 state->fclk = 80000000; 672 state->fclk = 80000000;
674 else if (p->u.qpsk.symbol_rate > 28500000) 673 else if (p->symbol_rate > 28500000)
675 state->fclk = 59000000; 674 state->fclk = 59000000;
676 else if (p->u.qpsk.symbol_rate > 25000000) 675 else if (p->symbol_rate > 25000000)
677 state->fclk = 86000000; 676 state->fclk = 86000000;
678 else if (p->u.qpsk.symbol_rate > 1900000) 677 else if (p->symbol_rate > 1900000)
679 state->fclk = 88000000; 678 state->fclk = 88000000;
680 else 679 else
681 state->fclk = 44000000; 680 state->fclk = 44000000;
@@ -705,7 +704,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
705 s5h1420_writereg(state, DiS01, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32)); 704 s5h1420_writereg(state, DiS01, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32));
706 705
707 /* TODO DC offset removal, config parameter ? */ 706 /* TODO DC offset removal, config parameter ? */
708 if (p->u.qpsk.symbol_rate > 29000000) 707 if (p->symbol_rate > 29000000)
709 s5h1420_writereg(state, QPSK01, 0xae | 0x10); 708 s5h1420_writereg(state, QPSK01, 0xae | 0x10);
710 else 709 else
711 s5h1420_writereg(state, QPSK01, 0xac | 0x10); 710 s5h1420_writereg(state, QPSK01, 0xac | 0x10);
@@ -718,15 +717,15 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
718 s5h1420_writereg(state, Loop01, 0xF0); 717 s5h1420_writereg(state, Loop01, 0xF0);
719 s5h1420_writereg(state, Loop02, 0x2a); /* e7 for s5h1420 */ 718 s5h1420_writereg(state, Loop02, 0x2a); /* e7 for s5h1420 */
720 s5h1420_writereg(state, Loop03, 0x79); /* 78 for s5h1420 */ 719 s5h1420_writereg(state, Loop03, 0x79); /* 78 for s5h1420 */
721 if (p->u.qpsk.symbol_rate > 20000000) 720 if (p->symbol_rate > 20000000)
722 s5h1420_writereg(state, Loop04, 0x79); 721 s5h1420_writereg(state, Loop04, 0x79);
723 else 722 else
724 s5h1420_writereg(state, Loop04, 0x58); 723 s5h1420_writereg(state, Loop04, 0x58);
725 s5h1420_writereg(state, Loop05, 0x6b); 724 s5h1420_writereg(state, Loop05, 0x6b);
726 725
727 if (p->u.qpsk.symbol_rate >= 8000000) 726 if (p->symbol_rate >= 8000000)
728 s5h1420_writereg(state, Post01, (0 << 6) | 0x10); 727 s5h1420_writereg(state, Post01, (0 << 6) | 0x10);
729 else if (p->u.qpsk.symbol_rate >= 4000000) 728 else if (p->symbol_rate >= 4000000)
730 s5h1420_writereg(state, Post01, (1 << 6) | 0x10); 729 s5h1420_writereg(state, Post01, (1 << 6) | 0x10);
731 else 730 else
732 s5h1420_writereg(state, Post01, (3 << 6) | 0x10); 731 s5h1420_writereg(state, Post01, (3 << 6) | 0x10);
@@ -744,7 +743,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
744 743
745 /* set tuner PLL */ 744 /* set tuner PLL */
746 if (fe->ops.tuner_ops.set_params) { 745 if (fe->ops.tuner_ops.set_params) {
747 fe->ops.tuner_ops.set_params(fe, p); 746 fe->ops.tuner_ops.set_params(fe);
748 if (fe->ops.i2c_gate_ctrl) 747 if (fe->ops.i2c_gate_ctrl)
749 fe->ops.i2c_gate_ctrl(fe, 0); 748 fe->ops.i2c_gate_ctrl(fe, 0);
750 s5h1420_setfreqoffset(state, 0); 749 s5h1420_setfreqoffset(state, 0);
@@ -757,8 +756,8 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
757 /* start QPSK */ 756 /* start QPSK */
758 s5h1420_writereg(state, QPSK01, s5h1420_readreg(state, QPSK01) | 1); 757 s5h1420_writereg(state, QPSK01, s5h1420_readreg(state, QPSK01) | 1);
759 758
760 state->fec_inner = p->u.qpsk.fec_inner; 759 state->fec_inner = p->fec_inner;
761 state->symbol_rate = p->u.qpsk.symbol_rate; 760 state->symbol_rate = p->symbol_rate;
762 state->postlocked = 0; 761 state->postlocked = 0;
763 state->tunedfreq = p->frequency; 762 state->tunedfreq = p->frequency;
764 763
@@ -766,15 +765,15 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe,
766 return 0; 765 return 0;
767} 766}
768 767
769static int s5h1420_get_frontend(struct dvb_frontend* fe, 768static int s5h1420_get_frontend(struct dvb_frontend* fe)
770 struct dvb_frontend_parameters *p)
771{ 769{
770 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
772 struct s5h1420_state* state = fe->demodulator_priv; 771 struct s5h1420_state* state = fe->demodulator_priv;
773 772
774 p->frequency = state->tunedfreq + s5h1420_getfreqoffset(state); 773 p->frequency = state->tunedfreq + s5h1420_getfreqoffset(state);
775 p->inversion = s5h1420_getinversion(state); 774 p->inversion = s5h1420_getinversion(state);
776 p->u.qpsk.symbol_rate = s5h1420_getsymbolrate(state); 775 p->symbol_rate = s5h1420_getsymbolrate(state);
777 p->u.qpsk.fec_inner = s5h1420_getfec(state); 776 p->fec_inner = s5h1420_getfec(state);
778 777
779 return 0; 778 return 0;
780} 779}
@@ -782,29 +781,30 @@ static int s5h1420_get_frontend(struct dvb_frontend* fe,
782static int s5h1420_get_tune_settings(struct dvb_frontend* fe, 781static int s5h1420_get_tune_settings(struct dvb_frontend* fe,
783 struct dvb_frontend_tune_settings* fesettings) 782 struct dvb_frontend_tune_settings* fesettings)
784{ 783{
785 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) { 784 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
785 if (p->symbol_rate > 20000000) {
786 fesettings->min_delay_ms = 50; 786 fesettings->min_delay_ms = 50;
787 fesettings->step_size = 2000; 787 fesettings->step_size = 2000;
788 fesettings->max_drift = 8000; 788 fesettings->max_drift = 8000;
789 } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) { 789 } else if (p->symbol_rate > 12000000) {
790 fesettings->min_delay_ms = 100; 790 fesettings->min_delay_ms = 100;
791 fesettings->step_size = 1500; 791 fesettings->step_size = 1500;
792 fesettings->max_drift = 9000; 792 fesettings->max_drift = 9000;
793 } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) { 793 } else if (p->symbol_rate > 8000000) {
794 fesettings->min_delay_ms = 100; 794 fesettings->min_delay_ms = 100;
795 fesettings->step_size = 1000; 795 fesettings->step_size = 1000;
796 fesettings->max_drift = 8000; 796 fesettings->max_drift = 8000;
797 } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) { 797 } else if (p->symbol_rate > 4000000) {
798 fesettings->min_delay_ms = 100; 798 fesettings->min_delay_ms = 100;
799 fesettings->step_size = 500; 799 fesettings->step_size = 500;
800 fesettings->max_drift = 7000; 800 fesettings->max_drift = 7000;
801 } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) { 801 } else if (p->symbol_rate > 2000000) {
802 fesettings->min_delay_ms = 200; 802 fesettings->min_delay_ms = 200;
803 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); 803 fesettings->step_size = (p->symbol_rate / 8000);
804 fesettings->max_drift = 14 * fesettings->step_size; 804 fesettings->max_drift = 14 * fesettings->step_size;
805 } else { 805 } else {
806 fesettings->min_delay_ms = 200; 806 fesettings->min_delay_ms = 200;
807 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); 807 fesettings->step_size = (p->symbol_rate / 8000);
808 fesettings->max_drift = 18 * fesettings->step_size; 808 fesettings->max_drift = 18 * fesettings->step_size;
809 } 809 }
810 810
@@ -937,10 +937,9 @@ error:
937EXPORT_SYMBOL(s5h1420_attach); 937EXPORT_SYMBOL(s5h1420_attach);
938 938
939static struct dvb_frontend_ops s5h1420_ops = { 939static struct dvb_frontend_ops s5h1420_ops = {
940 940 .delsys = { SYS_DVBS },
941 .info = { 941 .info = {
942 .name = "Samsung S5H1420/PnpNetwork PN1010 DVB-S", 942 .name = "Samsung S5H1420/PnpNetwork PN1010 DVB-S",
943 .type = FE_QPSK,
944 .frequency_min = 950000, 943 .frequency_min = 950000,
945 .frequency_max = 2150000, 944 .frequency_max = 2150000,
946 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 945 .frequency_stepsize = 125, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/s5h1432.c b/drivers/media/dvb/frontends/s5h1432.c
index 0c6dcb90d16..8352ce1c955 100644
--- a/drivers/media/dvb/frontends/s5h1432.c
+++ b/drivers/media/dvb/frontends/s5h1432.c
@@ -178,9 +178,9 @@ static int s5h1432_set_IF(struct dvb_frontend *fe, u32 ifFreqHz)
178} 178}
179 179
180/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ 180/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
181static int s5h1432_set_frontend(struct dvb_frontend *fe, 181static int s5h1432_set_frontend(struct dvb_frontend *fe)
182 struct dvb_frontend_parameters *p)
183{ 182{
183 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
184 u32 dvb_bandwidth = 8; 184 u32 dvb_bandwidth = 8;
185 struct s5h1432_state *state = fe->demodulator_priv; 185 struct s5h1432_state *state = fe->demodulator_priv;
186 186
@@ -188,26 +188,26 @@ static int s5h1432_set_frontend(struct dvb_frontend *fe,
188 /*current_frequency = p->frequency; */ 188 /*current_frequency = p->frequency; */
189 /*state->current_frequency = p->frequency; */ 189 /*state->current_frequency = p->frequency; */
190 } else { 190 } else {
191 fe->ops.tuner_ops.set_params(fe, p); 191 fe->ops.tuner_ops.set_params(fe);
192 msleep(300); 192 msleep(300);
193 s5h1432_set_channel_bandwidth(fe, dvb_bandwidth); 193 s5h1432_set_channel_bandwidth(fe, dvb_bandwidth);
194 switch (p->u.ofdm.bandwidth) { 194 switch (p->bandwidth_hz) {
195 case BANDWIDTH_6_MHZ: 195 case 6000000:
196 dvb_bandwidth = 6; 196 dvb_bandwidth = 6;
197 s5h1432_set_IF(fe, IF_FREQ_4_MHZ); 197 s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
198 break; 198 break;
199 case BANDWIDTH_7_MHZ: 199 case 7000000:
200 dvb_bandwidth = 7; 200 dvb_bandwidth = 7;
201 s5h1432_set_IF(fe, IF_FREQ_4_MHZ); 201 s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
202 break; 202 break;
203 case BANDWIDTH_8_MHZ: 203 case 8000000:
204 dvb_bandwidth = 8; 204 dvb_bandwidth = 8;
205 s5h1432_set_IF(fe, IF_FREQ_4_MHZ); 205 s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
206 break; 206 break;
207 default: 207 default:
208 return 0; 208 return 0;
209 } 209 }
210 /*fe->ops.tuner_ops.set_params(fe, p); */ 210 /*fe->ops.tuner_ops.set_params(fe); */
211/*Soft Reset chip*/ 211/*Soft Reset chip*/
212 msleep(30); 212 msleep(30);
213 s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a); 213 s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);
@@ -215,23 +215,23 @@ static int s5h1432_set_frontend(struct dvb_frontend *fe,
215 s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b); 215 s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);
216 216
217 s5h1432_set_channel_bandwidth(fe, dvb_bandwidth); 217 s5h1432_set_channel_bandwidth(fe, dvb_bandwidth);
218 switch (p->u.ofdm.bandwidth) { 218 switch (p->bandwidth_hz) {
219 case BANDWIDTH_6_MHZ: 219 case 6000000:
220 dvb_bandwidth = 6; 220 dvb_bandwidth = 6;
221 s5h1432_set_IF(fe, IF_FREQ_4_MHZ); 221 s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
222 break; 222 break;
223 case BANDWIDTH_7_MHZ: 223 case 7000000:
224 dvb_bandwidth = 7; 224 dvb_bandwidth = 7;
225 s5h1432_set_IF(fe, IF_FREQ_4_MHZ); 225 s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
226 break; 226 break;
227 case BANDWIDTH_8_MHZ: 227 case 8000000:
228 dvb_bandwidth = 8; 228 dvb_bandwidth = 8;
229 s5h1432_set_IF(fe, IF_FREQ_4_MHZ); 229 s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
230 break; 230 break;
231 default: 231 default:
232 return 0; 232 return 0;
233 } 233 }
234 /*fe->ops.tuner_ops.set_params(fe,p); */ 234 /*fe->ops.tuner_ops.set_params(fe); */
235 /*Soft Reset chip*/ 235 /*Soft Reset chip*/
236 msleep(30); 236 msleep(30);
237 s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a); 237 s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);
@@ -329,12 +329,6 @@ static int s5h1432_read_ber(struct dvb_frontend *fe, u32 *ber)
329 return 0; 329 return 0;
330} 330}
331 331
332static int s5h1432_get_frontend(struct dvb_frontend *fe,
333 struct dvb_frontend_parameters *p)
334{
335 return 0;
336}
337
338static int s5h1432_get_tune_settings(struct dvb_frontend *fe, 332static int s5h1432_get_tune_settings(struct dvb_frontend *fe,
339 struct dvb_frontend_tune_settings *tune) 333 struct dvb_frontend_tune_settings *tune)
340{ 334{
@@ -381,10 +375,9 @@ error:
381EXPORT_SYMBOL(s5h1432_attach); 375EXPORT_SYMBOL(s5h1432_attach);
382 376
383static struct dvb_frontend_ops s5h1432_ops = { 377static struct dvb_frontend_ops s5h1432_ops = {
384 378 .delsys = { SYS_DVBT },
385 .info = { 379 .info = {
386 .name = "Samsung s5h1432 DVB-T Frontend", 380 .name = "Samsung s5h1432 DVB-T Frontend",
387 .type = FE_OFDM,
388 .frequency_min = 177000000, 381 .frequency_min = 177000000,
389 .frequency_max = 858000000, 382 .frequency_max = 858000000,
390 .frequency_stepsize = 166666, 383 .frequency_stepsize = 166666,
@@ -397,7 +390,6 @@ static struct dvb_frontend_ops s5h1432_ops = {
397 .init = s5h1432_init, 390 .init = s5h1432_init,
398 .sleep = s5h1432_sleep, 391 .sleep = s5h1432_sleep,
399 .set_frontend = s5h1432_set_frontend, 392 .set_frontend = s5h1432_set_frontend,
400 .get_frontend = s5h1432_get_frontend,
401 .get_tune_settings = s5h1432_get_tune_settings, 393 .get_tune_settings = s5h1432_get_tune_settings,
402 .read_status = s5h1432_read_status, 394 .read_status = s5h1432_read_status,
403 .read_ber = s5h1432_read_ber, 395 .read_ber = s5h1432_read_ber,
diff --git a/drivers/media/dvb/frontends/s921.c b/drivers/media/dvb/frontends/s921.c
index ca0103d5f14..cd2288c0714 100644
--- a/drivers/media/dvb/frontends/s921.c
+++ b/drivers/media/dvb/frontends/s921.c
@@ -262,9 +262,9 @@ static int s921_i2c_readreg(struct s921_state *state, u8 i2c_addr, u8 reg)
262 s921_i2c_writeregdata(state, state->config->demod_address, \ 262 s921_i2c_writeregdata(state, state->config->demod_address, \
263 regdata, ARRAY_SIZE(regdata)) 263 regdata, ARRAY_SIZE(regdata))
264 264
265static int s921_pll_tune(struct dvb_frontend *fe, 265static int s921_pll_tune(struct dvb_frontend *fe)
266 struct dvb_frontend_parameters *p)
267{ 266{
267 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
268 struct s921_state *state = fe->demodulator_priv; 268 struct s921_state *state = fe->demodulator_priv;
269 int band, rc, i; 269 int band, rc, i;
270 unsigned long f_offset; 270 unsigned long f_offset;
@@ -414,9 +414,9 @@ static int s921_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
414 return 0; 414 return 0;
415} 415}
416 416
417static int s921_set_frontend(struct dvb_frontend *fe, 417static int s921_set_frontend(struct dvb_frontend *fe)
418 struct dvb_frontend_parameters *p)
419{ 418{
419 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
420 struct s921_state *state = fe->demodulator_priv; 420 struct s921_state *state = fe->demodulator_priv;
421 int rc; 421 int rc;
422 422
@@ -424,7 +424,7 @@ static int s921_set_frontend(struct dvb_frontend *fe,
424 424
425 /* FIXME: We don't know how to use non-auto mode */ 425 /* FIXME: We don't know how to use non-auto mode */
426 426
427 rc = s921_pll_tune(fe, p); 427 rc = s921_pll_tune(fe);
428 if (rc < 0) 428 if (rc < 0)
429 return rc; 429 return rc;
430 430
@@ -433,19 +433,20 @@ static int s921_set_frontend(struct dvb_frontend *fe,
433 return 0; 433 return 0;
434} 434}
435 435
436static int s921_get_frontend(struct dvb_frontend *fe, 436static int s921_get_frontend(struct dvb_frontend *fe)
437 struct dvb_frontend_parameters *p)
438{ 437{
438 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
439 struct s921_state *state = fe->demodulator_priv; 439 struct s921_state *state = fe->demodulator_priv;
440 440
441 /* FIXME: Probably it is possible to get it from regs f1 and f2 */ 441 /* FIXME: Probably it is possible to get it from regs f1 and f2 */
442 p->frequency = state->currentfreq; 442 p->frequency = state->currentfreq;
443 p->delivery_system = SYS_ISDBT;
443 444
444 return 0; 445 return 0;
445} 446}
446 447
447static int s921_tune(struct dvb_frontend *fe, 448static int s921_tune(struct dvb_frontend *fe,
448 struct dvb_frontend_parameters *params, 449 bool re_tune,
449 unsigned int mode_flags, 450 unsigned int mode_flags,
450 unsigned int *delay, 451 unsigned int *delay,
451 fe_status_t *status) 452 fe_status_t *status)
@@ -454,8 +455,8 @@ static int s921_tune(struct dvb_frontend *fe,
454 455
455 dprintk("\n"); 456 dprintk("\n");
456 457
457 if (params != NULL) 458 if (re_tune)
458 rc = s921_set_frontend(fe, params); 459 rc = s921_set_frontend(fe);
459 460
460 if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) 461 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
461 s921_read_status(fe, status); 462 s921_read_status(fe, status);
@@ -510,10 +511,10 @@ rcor:
510EXPORT_SYMBOL(s921_attach); 511EXPORT_SYMBOL(s921_attach);
511 512
512static struct dvb_frontend_ops s921_ops = { 513static struct dvb_frontend_ops s921_ops = {
514 .delsys = { SYS_ISDBT },
513 /* Use dib8000 values per default */ 515 /* Use dib8000 values per default */
514 .info = { 516 .info = {
515 .name = "Sharp S921", 517 .name = "Sharp S921",
516 .type = FE_OFDM,
517 .frequency_min = 470000000, 518 .frequency_min = 470000000,
518 /* 519 /*
519 * Max should be 770MHz instead, according with Sharp docs, 520 * Max should be 770MHz instead, according with Sharp docs,
diff --git a/drivers/media/dvb/frontends/si21xx.c b/drivers/media/dvb/frontends/si21xx.c
index 4b0c99a08a8..a68a64800df 100644
--- a/drivers/media/dvb/frontends/si21xx.c
+++ b/drivers/media/dvb/frontends/si21xx.c
@@ -690,20 +690,7 @@ static int si21xx_setacquire(struct dvb_frontend *fe, int symbrate,
690 return status; 690 return status;
691} 691}
692 692
693static int si21xx_set_property(struct dvb_frontend *fe, struct dtv_property *p) 693static int si21xx_set_frontend(struct dvb_frontend *fe)
694{
695 dprintk("%s(..)\n", __func__);
696 return 0;
697}
698
699static int si21xx_get_property(struct dvb_frontend *fe, struct dtv_property *p)
700{
701 dprintk("%s(..)\n", __func__);
702 return 0;
703}
704
705static int si21xx_set_frontend(struct dvb_frontend *fe,
706 struct dvb_frontend_parameters *dfp)
707{ 694{
708 struct si21xx_state *state = fe->demodulator_priv; 695 struct si21xx_state *state = fe->demodulator_priv;
709 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 696 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
@@ -877,10 +864,9 @@ static void si21xx_release(struct dvb_frontend *fe)
877} 864}
878 865
879static struct dvb_frontend_ops si21xx_ops = { 866static struct dvb_frontend_ops si21xx_ops = {
880 867 .delsys = { SYS_DVBS },
881 .info = { 868 .info = {
882 .name = "SL SI21XX DVB-S", 869 .name = "SL SI21XX DVB-S",
883 .type = FE_QPSK,
884 .frequency_min = 950000, 870 .frequency_min = 950000,
885 .frequency_max = 2150000, 871 .frequency_max = 2150000,
886 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 872 .frequency_stepsize = 125, /* kHz for QPSK frontends */
@@ -908,8 +894,6 @@ static struct dvb_frontend_ops si21xx_ops = {
908 .set_tone = si21xx_set_tone, 894 .set_tone = si21xx_set_tone,
909 .set_voltage = si21xx_set_voltage, 895 .set_voltage = si21xx_set_voltage,
910 896
911 .set_property = si21xx_set_property,
912 .get_property = si21xx_get_property,
913 .set_frontend = si21xx_set_frontend, 897 .set_frontend = si21xx_set_frontend,
914}; 898};
915 899
diff --git a/drivers/media/dvb/frontends/sp8870.c b/drivers/media/dvb/frontends/sp8870.c
index b85eb60a893..e37274c8f14 100644
--- a/drivers/media/dvb/frontends/sp8870.c
+++ b/drivers/media/dvb/frontends/sp8870.c
@@ -168,13 +168,13 @@ static int sp8870_read_data_valid_signal(struct sp8870_state* state)
168 return (sp8870_readreg(state, 0x0D02) > 0); 168 return (sp8870_readreg(state, 0x0D02) > 0);
169} 169}
170 170
171static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05) 171static int configure_reg0xc05 (struct dtv_frontend_properties *p, u16 *reg0xc05)
172{ 172{
173 int known_parameters = 1; 173 int known_parameters = 1;
174 174
175 *reg0xc05 = 0x000; 175 *reg0xc05 = 0x000;
176 176
177 switch (p->u.ofdm.constellation) { 177 switch (p->modulation) {
178 case QPSK: 178 case QPSK:
179 break; 179 break;
180 case QAM_16: 180 case QAM_16:
@@ -190,7 +190,7 @@ static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
190 return -EINVAL; 190 return -EINVAL;
191 }; 191 };
192 192
193 switch (p->u.ofdm.hierarchy_information) { 193 switch (p->hierarchy) {
194 case HIERARCHY_NONE: 194 case HIERARCHY_NONE:
195 break; 195 break;
196 case HIERARCHY_1: 196 case HIERARCHY_1:
@@ -209,7 +209,7 @@ static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
209 return -EINVAL; 209 return -EINVAL;
210 }; 210 };
211 211
212 switch (p->u.ofdm.code_rate_HP) { 212 switch (p->code_rate_HP) {
213 case FEC_1_2: 213 case FEC_1_2:
214 break; 214 break;
215 case FEC_2_3: 215 case FEC_2_3:
@@ -245,9 +245,9 @@ static int sp8870_wake_up(struct sp8870_state* state)
245 return sp8870_writereg(state, 0xC18, 0x00D); 245 return sp8870_writereg(state, 0xC18, 0x00D);
246} 246}
247 247
248static int sp8870_set_frontend_parameters (struct dvb_frontend* fe, 248static int sp8870_set_frontend_parameters(struct dvb_frontend *fe)
249 struct dvb_frontend_parameters *p)
250{ 249{
250 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
251 struct sp8870_state* state = fe->demodulator_priv; 251 struct sp8870_state* state = fe->demodulator_priv;
252 int err; 252 int err;
253 u16 reg0xc05; 253 u16 reg0xc05;
@@ -260,7 +260,7 @@ static int sp8870_set_frontend_parameters (struct dvb_frontend* fe,
260 260
261 // set tuner parameters 261 // set tuner parameters
262 if (fe->ops.tuner_ops.set_params) { 262 if (fe->ops.tuner_ops.set_params) {
263 fe->ops.tuner_ops.set_params(fe, p); 263 fe->ops.tuner_ops.set_params(fe);
264 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 264 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
265 } 265 }
266 266
@@ -277,15 +277,15 @@ static int sp8870_set_frontend_parameters (struct dvb_frontend* fe,
277 sp8870_writereg(state, 0x030A, 0x0000); 277 sp8870_writereg(state, 0x030A, 0x0000);
278 278
279 // filter for 6/7/8 Mhz channel 279 // filter for 6/7/8 Mhz channel
280 if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ) 280 if (p->bandwidth_hz == 6000000)
281 sp8870_writereg(state, 0x0311, 0x0002); 281 sp8870_writereg(state, 0x0311, 0x0002);
282 else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ) 282 else if (p->bandwidth_hz == 7000000)
283 sp8870_writereg(state, 0x0311, 0x0001); 283 sp8870_writereg(state, 0x0311, 0x0001);
284 else 284 else
285 sp8870_writereg(state, 0x0311, 0x0000); 285 sp8870_writereg(state, 0x0311, 0x0000);
286 286
287 // scan order: 2k first = 0x0000, 8k first = 0x0001 287 // scan order: 2k first = 0x0000, 8k first = 0x0001
288 if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K) 288 if (p->transmission_mode == TRANSMISSION_MODE_2K)
289 sp8870_writereg(state, 0x0338, 0x0000); 289 sp8870_writereg(state, 0x0338, 0x0000);
290 else 290 else
291 sp8870_writereg(state, 0x0338, 0x0001); 291 sp8870_writereg(state, 0x0338, 0x0001);
@@ -459,8 +459,9 @@ static int lockups;
459/* only for debugging: counter for channel switches */ 459/* only for debugging: counter for channel switches */
460static int switches; 460static int switches;
461 461
462static int sp8870_set_frontend (struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 462static int sp8870_set_frontend(struct dvb_frontend *fe)
463{ 463{
464 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
464 struct sp8870_state* state = fe->demodulator_priv; 465 struct sp8870_state* state = fe->demodulator_priv;
465 466
466 /* 467 /*
@@ -479,7 +480,8 @@ static int sp8870_set_frontend (struct dvb_frontend* fe, struct dvb_frontend_par
479 480
480 for (trials = 1; trials <= MAXTRIALS; trials++) { 481 for (trials = 1; trials <= MAXTRIALS; trials++) {
481 482
482 if ((err = sp8870_set_frontend_parameters(fe, p))) 483 err = sp8870_set_frontend_parameters(fe);
484 if (err)
483 return err; 485 return err;
484 486
485 for (check_count = 0; check_count < MAXCHECKS; check_count++) { 487 for (check_count = 0; check_count < MAXCHECKS; check_count++) {
@@ -579,10 +581,9 @@ error:
579} 581}
580 582
581static struct dvb_frontend_ops sp8870_ops = { 583static struct dvb_frontend_ops sp8870_ops = {
582 584 .delsys = { SYS_DVBT },
583 .info = { 585 .info = {
584 .name = "Spase SP8870 DVB-T", 586 .name = "Spase SP8870 DVB-T",
585 .type = FE_OFDM,
586 .frequency_min = 470000000, 587 .frequency_min = 470000000,
587 .frequency_max = 860000000, 588 .frequency_max = 860000000,
588 .frequency_stepsize = 166666, 589 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/sp887x.c b/drivers/media/dvb/frontends/sp887x.c
index 4a7c3d84260..f4096ccb226 100644
--- a/drivers/media/dvb/frontends/sp887x.c
+++ b/drivers/media/dvb/frontends/sp887x.c
@@ -209,13 +209,13 @@ static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware
209 return 0; 209 return 0;
210}; 210};
211 211
212static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05) 212static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
213{ 213{
214 int known_parameters = 1; 214 int known_parameters = 1;
215 215
216 *reg0xc05 = 0x000; 216 *reg0xc05 = 0x000;
217 217
218 switch (p->u.ofdm.constellation) { 218 switch (p->modulation) {
219 case QPSK: 219 case QPSK:
220 break; 220 break;
221 case QAM_16: 221 case QAM_16:
@@ -231,7 +231,7 @@ static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
231 return -EINVAL; 231 return -EINVAL;
232 }; 232 };
233 233
234 switch (p->u.ofdm.hierarchy_information) { 234 switch (p->hierarchy) {
235 case HIERARCHY_NONE: 235 case HIERARCHY_NONE:
236 break; 236 break;
237 case HIERARCHY_1: 237 case HIERARCHY_1:
@@ -250,7 +250,7 @@ static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
250 return -EINVAL; 250 return -EINVAL;
251 }; 251 };
252 252
253 switch (p->u.ofdm.code_rate_HP) { 253 switch (p->code_rate_HP) {
254 case FEC_1_2: 254 case FEC_1_2:
255 break; 255 break;
256 case FEC_2_3: 256 case FEC_2_3:
@@ -303,17 +303,30 @@ static void divide (int n, int d, int *quotient_i, int *quotient_f)
303} 303}
304 304
305static void sp887x_correct_offsets (struct sp887x_state* state, 305static void sp887x_correct_offsets (struct sp887x_state* state,
306 struct dvb_frontend_parameters *p, 306 struct dtv_frontend_properties *p,
307 int actual_freq) 307 int actual_freq)
308{ 308{
309 static const u32 srate_correction [] = { 1879617, 4544878, 8098561 }; 309 static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
310 int bw_index = p->u.ofdm.bandwidth - BANDWIDTH_8_MHZ; 310 int bw_index;
311 int freq_offset = actual_freq - p->frequency; 311 int freq_offset = actual_freq - p->frequency;
312 int sysclock = 61003; //[kHz] 312 int sysclock = 61003; //[kHz]
313 int ifreq = 36000000; 313 int ifreq = 36000000;
314 int freq; 314 int freq;
315 int frequency_shift; 315 int frequency_shift;
316 316
317 switch (p->bandwidth_hz) {
318 default:
319 case 8000000:
320 bw_index = 0;
321 break;
322 case 7000000:
323 bw_index = 1;
324 break;
325 case 6000000:
326 bw_index = 2;
327 break;
328 }
329
317 if (p->inversion == INVERSION_ON) 330 if (p->inversion == INVERSION_ON)
318 freq = ifreq - freq_offset; 331 freq = ifreq - freq_offset;
319 else 332 else
@@ -333,17 +346,17 @@ static void sp887x_correct_offsets (struct sp887x_state* state,
333 sp887x_writereg(state, 0x30a, frequency_shift & 0xfff); 346 sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
334} 347}
335 348
336static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe, 349static int sp887x_setup_frontend_parameters(struct dvb_frontend *fe)
337 struct dvb_frontend_parameters *p)
338{ 350{
351 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
339 struct sp887x_state* state = fe->demodulator_priv; 352 struct sp887x_state* state = fe->demodulator_priv;
340 unsigned actual_freq; 353 unsigned actual_freq;
341 int err; 354 int err;
342 u16 val, reg0xc05; 355 u16 val, reg0xc05;
343 356
344 if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ && 357 if (p->bandwidth_hz != 8000000 &&
345 p->u.ofdm.bandwidth != BANDWIDTH_7_MHZ && 358 p->bandwidth_hz != 7000000 &&
346 p->u.ofdm.bandwidth != BANDWIDTH_6_MHZ) 359 p->bandwidth_hz != 6000000)
347 return -EINVAL; 360 return -EINVAL;
348 361
349 if ((err = configure_reg0xc05(p, &reg0xc05))) 362 if ((err = configure_reg0xc05(p, &reg0xc05)))
@@ -353,7 +366,7 @@ static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
353 366
354 /* setup the PLL */ 367 /* setup the PLL */
355 if (fe->ops.tuner_ops.set_params) { 368 if (fe->ops.tuner_ops.set_params) {
356 fe->ops.tuner_ops.set_params(fe, p); 369 fe->ops.tuner_ops.set_params(fe);
357 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 370 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
358 } 371 }
359 if (fe->ops.tuner_ops.get_frequency) { 372 if (fe->ops.tuner_ops.get_frequency) {
@@ -369,9 +382,9 @@ static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
369 sp887x_correct_offsets(state, p, actual_freq); 382 sp887x_correct_offsets(state, p, actual_freq);
370 383
371 /* filter for 6/7/8 Mhz channel */ 384 /* filter for 6/7/8 Mhz channel */
372 if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ) 385 if (p->bandwidth_hz == 6000000)
373 val = 2; 386 val = 2;
374 else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ) 387 else if (p->bandwidth_hz == 7000000)
375 val = 1; 388 val = 1;
376 else 389 else
377 val = 0; 390 val = 0;
@@ -379,16 +392,16 @@ static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
379 sp887x_writereg(state, 0x311, val); 392 sp887x_writereg(state, 0x311, val);
380 393
381 /* scan order: 2k first = 0, 8k first = 1 */ 394 /* scan order: 2k first = 0, 8k first = 1 */
382 if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K) 395 if (p->transmission_mode == TRANSMISSION_MODE_2K)
383 sp887x_writereg(state, 0x338, 0x000); 396 sp887x_writereg(state, 0x338, 0x000);
384 else 397 else
385 sp887x_writereg(state, 0x338, 0x001); 398 sp887x_writereg(state, 0x338, 0x001);
386 399
387 sp887x_writereg(state, 0xc05, reg0xc05); 400 sp887x_writereg(state, 0xc05, reg0xc05);
388 401
389 if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ) 402 if (p->bandwidth_hz == 6000000)
390 val = 2 << 3; 403 val = 2 << 3;
391 else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ) 404 else if (p->bandwidth_hz == 7000000)
392 val = 3 << 3; 405 val = 3 << 3;
393 else 406 else
394 val = 0 << 3; 407 val = 0 << 3;
@@ -579,10 +592,9 @@ error:
579} 592}
580 593
581static struct dvb_frontend_ops sp887x_ops = { 594static struct dvb_frontend_ops sp887x_ops = {
582 595 .delsys = { SYS_DVBT },
583 .info = { 596 .info = {
584 .name = "Spase SP887x DVB-T", 597 .name = "Spase SP887x DVB-T",
585 .type = FE_OFDM,
586 .frequency_min = 50500000, 598 .frequency_min = 50500000,
587 .frequency_max = 858000000, 599 .frequency_max = 858000000,
588 .frequency_stepsize = 166666, 600 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/stb0899_drv.c b/drivers/media/dvb/frontends/stb0899_drv.c
index 8408ef877b4..38565beafe2 100644
--- a/drivers/media/dvb/frontends/stb0899_drv.c
+++ b/drivers/media/dvb/frontends/stb0899_drv.c
@@ -1431,7 +1431,7 @@ static void stb0899_set_iterations(struct stb0899_state *state)
1431 stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg); 1431 stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg);
1432} 1432}
1433 1433
1434static enum dvbfe_search stb0899_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 1434static enum dvbfe_search stb0899_search(struct dvb_frontend *fe)
1435{ 1435{
1436 struct stb0899_state *state = fe->demodulator_priv; 1436 struct stb0899_state *state = fe->demodulator_priv;
1437 struct stb0899_params *i_params = &state->params; 1437 struct stb0899_params *i_params = &state->params;
@@ -1441,8 +1441,8 @@ static enum dvbfe_search stb0899_search(struct dvb_frontend *fe, struct dvb_fron
1441 1441
1442 u32 SearchRange, gain; 1442 u32 SearchRange, gain;
1443 1443
1444 i_params->freq = p->frequency; 1444 i_params->freq = props->frequency;
1445 i_params->srate = p->u.qpsk.symbol_rate; 1445 i_params->srate = props->symbol_rate;
1446 state->delsys = props->delivery_system; 1446 state->delsys = props->delivery_system;
1447 dprintk(state->verbose, FE_DEBUG, 1, "delivery system=%d", state->delsys); 1447 dprintk(state->verbose, FE_DEBUG, 1, "delivery system=%d", state->delsys);
1448 1448
@@ -1568,34 +1568,15 @@ static enum dvbfe_search stb0899_search(struct dvb_frontend *fe, struct dvb_fron
1568 1568
1569 return DVBFE_ALGO_SEARCH_ERROR; 1569 return DVBFE_ALGO_SEARCH_ERROR;
1570} 1570}
1571/*
1572 * stb0899_track
1573 * periodically check the signal level against a specified
1574 * threshold level and perform derotator centering.
1575 * called once we have a lock from a successful search
1576 * event.
1577 *
1578 * Will be called periodically called to maintain the
1579 * lock.
1580 *
1581 * Will be used to get parameters as well as info from
1582 * the decoded baseband header
1583 *
1584 * Once a new lock has established, the internal state
1585 * frequency (internal->freq) is updated
1586 */
1587static int stb0899_track(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
1588{
1589 return 0;
1590}
1591 1571
1592static int stb0899_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 1572static int stb0899_get_frontend(struct dvb_frontend *fe)
1593{ 1573{
1574 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1594 struct stb0899_state *state = fe->demodulator_priv; 1575 struct stb0899_state *state = fe->demodulator_priv;
1595 struct stb0899_internal *internal = &state->internal; 1576 struct stb0899_internal *internal = &state->internal;
1596 1577
1597 dprintk(state->verbose, FE_DEBUG, 1, "Get params"); 1578 dprintk(state->verbose, FE_DEBUG, 1, "Get params");
1598 p->u.qpsk.symbol_rate = internal->srate; 1579 p->symbol_rate = internal->srate;
1599 1580
1600 return 0; 1581 return 0;
1601} 1582}
@@ -1606,10 +1587,9 @@ static enum dvbfe_algo stb0899_frontend_algo(struct dvb_frontend *fe)
1606} 1587}
1607 1588
1608static struct dvb_frontend_ops stb0899_ops = { 1589static struct dvb_frontend_ops stb0899_ops = {
1609 1590 .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
1610 .info = { 1591 .info = {
1611 .name = "STB0899 Multistandard", 1592 .name = "STB0899 Multistandard",
1612 .type = FE_QPSK,
1613 .frequency_min = 950000, 1593 .frequency_min = 950000,
1614 .frequency_max = 2150000, 1594 .frequency_max = 2150000,
1615 .frequency_stepsize = 0, 1595 .frequency_stepsize = 0,
@@ -1632,8 +1612,7 @@ static struct dvb_frontend_ops stb0899_ops = {
1632 1612
1633 .get_frontend_algo = stb0899_frontend_algo, 1613 .get_frontend_algo = stb0899_frontend_algo,
1634 .search = stb0899_search, 1614 .search = stb0899_search,
1635 .track = stb0899_track, 1615 .get_frontend = stb0899_get_frontend,
1636 .get_frontend = stb0899_get_frontend,
1637 1616
1638 1617
1639 .read_status = stb0899_read_status, 1618 .read_status = stb0899_read_status,
diff --git a/drivers/media/dvb/frontends/stb6000.c b/drivers/media/dvb/frontends/stb6000.c
index ed699647050..a0c3c526b13 100644
--- a/drivers/media/dvb/frontends/stb6000.c
+++ b/drivers/media/dvb/frontends/stb6000.c
@@ -75,9 +75,9 @@ static int stb6000_sleep(struct dvb_frontend *fe)
75 return (ret == 1) ? 0 : ret; 75 return (ret == 1) ? 0 : ret;
76} 76}
77 77
78static int stb6000_set_params(struct dvb_frontend *fe, 78static int stb6000_set_params(struct dvb_frontend *fe)
79 struct dvb_frontend_parameters *params)
80{ 79{
80 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
81 struct stb6000_priv *priv = fe->tuner_priv; 81 struct stb6000_priv *priv = fe->tuner_priv;
82 unsigned int n, m; 82 unsigned int n, m;
83 int ret; 83 int ret;
@@ -93,8 +93,8 @@ static int stb6000_set_params(struct dvb_frontend *fe,
93 93
94 dprintk("%s:\n", __func__); 94 dprintk("%s:\n", __func__);
95 95
96 freq_mhz = params->frequency / 1000; 96 freq_mhz = p->frequency / 1000;
97 bandwidth = params->u.qpsk.symbol_rate / 1000000; 97 bandwidth = p->symbol_rate / 1000000;
98 98
99 if (bandwidth > 31) 99 if (bandwidth > 31)
100 bandwidth = 31; 100 bandwidth = 31;
diff --git a/drivers/media/dvb/frontends/stb6100.c b/drivers/media/dvb/frontends/stb6100.c
index bc1a8af4f6e..def88abb30b 100644
--- a/drivers/media/dvb/frontends/stb6100.c
+++ b/drivers/media/dvb/frontends/stb6100.c
@@ -327,7 +327,7 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
327 int rc; 327 int rc;
328 const struct stb6100_lkup *ptr; 328 const struct stb6100_lkup *ptr;
329 struct stb6100_state *state = fe->tuner_priv; 329 struct stb6100_state *state = fe->tuner_priv;
330 struct dvb_frontend_parameters p; 330 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
331 331
332 u32 srate = 0, fvco, nint, nfrac; 332 u32 srate = 0, fvco, nint, nfrac;
333 u8 regs[STB6100_NUMREGS]; 333 u8 regs[STB6100_NUMREGS];
@@ -337,9 +337,9 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
337 337
338 if (fe->ops.get_frontend) { 338 if (fe->ops.get_frontend) {
339 dprintk(verbose, FE_DEBUG, 1, "Get frontend parameters"); 339 dprintk(verbose, FE_DEBUG, 1, "Get frontend parameters");
340 fe->ops.get_frontend(fe, &p); 340 fe->ops.get_frontend(fe);
341 } 341 }
342 srate = p.u.qpsk.symbol_rate; 342 srate = p->symbol_rate;
343 343
344 /* Set up tuner cleanly, LPF calibration on */ 344 /* Set up tuner cleanly, LPF calibration on */
345 rc = stb6100_write_reg(state, STB6100_FCCK, 0x4d | STB6100_FCCK_FCCK); 345 rc = stb6100_write_reg(state, STB6100_FCCK, 0x4d | STB6100_FCCK_FCCK);
diff --git a/drivers/media/dvb/frontends/stv0288.c b/drivers/media/dvb/frontends/stv0288.c
index 0aa3962ff18..fb5548a8220 100644
--- a/drivers/media/dvb/frontends/stv0288.c
+++ b/drivers/media/dvb/frontends/stv0288.c
@@ -452,14 +452,7 @@ static int stv0288_set_property(struct dvb_frontend *fe, struct dtv_property *p)
452 return 0; 452 return 0;
453} 453}
454 454
455static int stv0288_get_property(struct dvb_frontend *fe, struct dtv_property *p) 455static int stv0288_set_frontend(struct dvb_frontend *fe)
456{
457 dprintk("%s(..)\n", __func__);
458 return 0;
459}
460
461static int stv0288_set_frontend(struct dvb_frontend *fe,
462 struct dvb_frontend_parameters *dfp)
463{ 456{
464 struct stv0288_state *state = fe->demodulator_priv; 457 struct stv0288_state *state = fe->demodulator_priv;
465 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 458 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
@@ -481,10 +474,8 @@ static int stv0288_set_frontend(struct dvb_frontend *fe,
481 state->config->set_ts_params(fe, 0); 474 state->config->set_ts_params(fe, 0);
482 475
483 /* only frequency & symbol_rate are used for tuner*/ 476 /* only frequency & symbol_rate are used for tuner*/
484 dfp->frequency = c->frequency;
485 dfp->u.qpsk.symbol_rate = c->symbol_rate;
486 if (fe->ops.tuner_ops.set_params) { 477 if (fe->ops.tuner_ops.set_params) {
487 fe->ops.tuner_ops.set_params(fe, dfp); 478 fe->ops.tuner_ops.set_params(fe);
488 if (fe->ops.i2c_gate_ctrl) 479 if (fe->ops.i2c_gate_ctrl)
489 fe->ops.i2c_gate_ctrl(fe, 0); 480 fe->ops.i2c_gate_ctrl(fe, 0);
490 } 481 }
@@ -545,10 +536,9 @@ static void stv0288_release(struct dvb_frontend *fe)
545} 536}
546 537
547static struct dvb_frontend_ops stv0288_ops = { 538static struct dvb_frontend_ops stv0288_ops = {
548 539 .delsys = { SYS_DVBS },
549 .info = { 540 .info = {
550 .name = "ST STV0288 DVB-S", 541 .name = "ST STV0288 DVB-S",
551 .type = FE_QPSK,
552 .frequency_min = 950000, 542 .frequency_min = 950000,
553 .frequency_max = 2150000, 543 .frequency_max = 2150000,
554 .frequency_stepsize = 1000, /* kHz for QPSK frontends */ 544 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
@@ -578,7 +568,6 @@ static struct dvb_frontend_ops stv0288_ops = {
578 .set_voltage = stv0288_set_voltage, 568 .set_voltage = stv0288_set_voltage,
579 569
580 .set_property = stv0288_set_property, 570 .set_property = stv0288_set_property,
581 .get_property = stv0288_get_property,
582 .set_frontend = stv0288_set_frontend, 571 .set_frontend = stv0288_set_frontend,
583}; 572};
584 573
diff --git a/drivers/media/dvb/frontends/stv0297.c b/drivers/media/dvb/frontends/stv0297.c
index 84d88f33275..85c157a1fe5 100644
--- a/drivers/media/dvb/frontends/stv0297.c
+++ b/drivers/media/dvb/frontends/stv0297.c
@@ -404,8 +404,9 @@ static int stv0297_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks)
404 return 0; 404 return 0;
405} 405}
406 406
407static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 407static int stv0297_set_frontend(struct dvb_frontend *fe)
408{ 408{
409 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
409 struct stv0297_state *state = fe->demodulator_priv; 410 struct stv0297_state *state = fe->demodulator_priv;
410 int u_threshold; 411 int u_threshold;
411 int initial_u; 412 int initial_u;
@@ -417,7 +418,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
417 unsigned long timeout; 418 unsigned long timeout;
418 fe_spectral_inversion_t inversion; 419 fe_spectral_inversion_t inversion;
419 420
420 switch (p->u.qam.modulation) { 421 switch (p->modulation) {
421 case QAM_16: 422 case QAM_16:
422 case QAM_32: 423 case QAM_32:
423 case QAM_64: 424 case QAM_64:
@@ -455,7 +456,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
455 456
456 stv0297_init(fe); 457 stv0297_init(fe);
457 if (fe->ops.tuner_ops.set_params) { 458 if (fe->ops.tuner_ops.set_params) {
458 fe->ops.tuner_ops.set_params(fe, p); 459 fe->ops.tuner_ops.set_params(fe);
459 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 460 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
460 } 461 }
461 462
@@ -519,16 +520,16 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
519 stv0297_writereg_mask(state, 0x69, 0x0f, 0x00); 520 stv0297_writereg_mask(state, 0x69, 0x0f, 0x00);
520 521
521 /* set parameters */ 522 /* set parameters */
522 stv0297_set_qam(state, p->u.qam.modulation); 523 stv0297_set_qam(state, p->modulation);
523 stv0297_set_symbolrate(state, p->u.qam.symbol_rate / 1000); 524 stv0297_set_symbolrate(state, p->symbol_rate / 1000);
524 stv0297_set_sweeprate(state, sweeprate, p->u.qam.symbol_rate / 1000); 525 stv0297_set_sweeprate(state, sweeprate, p->symbol_rate / 1000);
525 stv0297_set_carrieroffset(state, carrieroffset); 526 stv0297_set_carrieroffset(state, carrieroffset);
526 stv0297_set_inversion(state, inversion); 527 stv0297_set_inversion(state, inversion);
527 528
528 /* kick off lock */ 529 /* kick off lock */
529 /* Disable corner detection for higher QAMs */ 530 /* Disable corner detection for higher QAMs */
530 if (p->u.qam.modulation == QAM_128 || 531 if (p->modulation == QAM_128 ||
531 p->u.qam.modulation == QAM_256) 532 p->modulation == QAM_256)
532 stv0297_writereg_mask(state, 0x88, 0x08, 0x00); 533 stv0297_writereg_mask(state, 0x88, 0x08, 0x00);
533 else 534 else
534 stv0297_writereg_mask(state, 0x88, 0x08, 0x08); 535 stv0297_writereg_mask(state, 0x88, 0x08, 0x08);
@@ -613,8 +614,9 @@ timeout:
613 return 0; 614 return 0;
614} 615}
615 616
616static int stv0297_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 617static int stv0297_get_frontend(struct dvb_frontend *fe)
617{ 618{
619 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
618 struct stv0297_state *state = fe->demodulator_priv; 620 struct stv0297_state *state = fe->demodulator_priv;
619 int reg_00, reg_83; 621 int reg_00, reg_83;
620 622
@@ -625,24 +627,24 @@ static int stv0297_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
625 p->inversion = (reg_83 & 0x08) ? INVERSION_ON : INVERSION_OFF; 627 p->inversion = (reg_83 & 0x08) ? INVERSION_ON : INVERSION_OFF;
626 if (state->config->invert) 628 if (state->config->invert)
627 p->inversion = (p->inversion == INVERSION_ON) ? INVERSION_OFF : INVERSION_ON; 629 p->inversion = (p->inversion == INVERSION_ON) ? INVERSION_OFF : INVERSION_ON;
628 p->u.qam.symbol_rate = stv0297_get_symbolrate(state) * 1000; 630 p->symbol_rate = stv0297_get_symbolrate(state) * 1000;
629 p->u.qam.fec_inner = FEC_NONE; 631 p->fec_inner = FEC_NONE;
630 632
631 switch ((reg_00 >> 4) & 0x7) { 633 switch ((reg_00 >> 4) & 0x7) {
632 case 0: 634 case 0:
633 p->u.qam.modulation = QAM_16; 635 p->modulation = QAM_16;
634 break; 636 break;
635 case 1: 637 case 1:
636 p->u.qam.modulation = QAM_32; 638 p->modulation = QAM_32;
637 break; 639 break;
638 case 2: 640 case 2:
639 p->u.qam.modulation = QAM_128; 641 p->modulation = QAM_128;
640 break; 642 break;
641 case 3: 643 case 3:
642 p->u.qam.modulation = QAM_256; 644 p->modulation = QAM_256;
643 break; 645 break;
644 case 4: 646 case 4:
645 p->u.qam.modulation = QAM_64; 647 p->modulation = QAM_64;
646 break; 648 break;
647 } 649 }
648 650
@@ -688,10 +690,9 @@ error:
688} 690}
689 691
690static struct dvb_frontend_ops stv0297_ops = { 692static struct dvb_frontend_ops stv0297_ops = {
691 693 .delsys = { SYS_DVBC_ANNEX_A },
692 .info = { 694 .info = {
693 .name = "ST STV0297 DVB-C", 695 .name = "ST STV0297 DVB-C",
694 .type = FE_QAM,
695 .frequency_min = 47000000, 696 .frequency_min = 47000000,
696 .frequency_max = 862000000, 697 .frequency_max = 862000000,
697 .frequency_stepsize = 62500, 698 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c
index 42684bec888..057b5f8effc 100644
--- a/drivers/media/dvb/frontends/stv0299.c
+++ b/drivers/media/dvb/frontends/stv0299.c
@@ -559,8 +559,9 @@ static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
559 return 0; 559 return 0;
560} 560}
561 561
562static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) 562static int stv0299_set_frontend(struct dvb_frontend *fe)
563{ 563{
564 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
564 struct stv0299_state* state = fe->demodulator_priv; 565 struct stv0299_state* state = fe->demodulator_priv;
565 int invval = 0; 566 int invval = 0;
566 567
@@ -579,24 +580,25 @@ static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
579 stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval); 580 stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval);
580 581
581 if (fe->ops.tuner_ops.set_params) { 582 if (fe->ops.tuner_ops.set_params) {
582 fe->ops.tuner_ops.set_params(fe, p); 583 fe->ops.tuner_ops.set_params(fe);
583 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 584 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
584 } 585 }
585 586
586 stv0299_set_FEC (state, p->u.qpsk.fec_inner); 587 stv0299_set_FEC(state, p->fec_inner);
587 stv0299_set_symbolrate (fe, p->u.qpsk.symbol_rate); 588 stv0299_set_symbolrate(fe, p->symbol_rate);
588 stv0299_writeregI(state, 0x22, 0x00); 589 stv0299_writeregI(state, 0x22, 0x00);
589 stv0299_writeregI(state, 0x23, 0x00); 590 stv0299_writeregI(state, 0x23, 0x00);
590 591
591 state->tuner_frequency = p->frequency; 592 state->tuner_frequency = p->frequency;
592 state->fec_inner = p->u.qpsk.fec_inner; 593 state->fec_inner = p->fec_inner;
593 state->symbol_rate = p->u.qpsk.symbol_rate; 594 state->symbol_rate = p->symbol_rate;
594 595
595 return 0; 596 return 0;
596} 597}
597 598
598static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) 599static int stv0299_get_frontend(struct dvb_frontend *fe)
599{ 600{
601 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
600 struct stv0299_state* state = fe->demodulator_priv; 602 struct stv0299_state* state = fe->demodulator_priv;
601 s32 derot_freq; 603 s32 derot_freq;
602 int invval; 604 int invval;
@@ -614,8 +616,8 @@ static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
614 if (state->config->invert) invval = (~invval) & 1; 616 if (state->config->invert) invval = (~invval) & 1;
615 p->inversion = invval ? INVERSION_ON : INVERSION_OFF; 617 p->inversion = invval ? INVERSION_ON : INVERSION_OFF;
616 618
617 p->u.qpsk.fec_inner = stv0299_get_fec (state); 619 p->fec_inner = stv0299_get_fec(state);
618 p->u.qpsk.symbol_rate = stv0299_get_symbolrate (state); 620 p->symbol_rate = stv0299_get_symbolrate(state);
619 621
620 return 0; 622 return 0;
621} 623}
@@ -646,14 +648,15 @@ static int stv0299_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
646static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) 648static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
647{ 649{
648 struct stv0299_state* state = fe->demodulator_priv; 650 struct stv0299_state* state = fe->demodulator_priv;
651 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
649 652
650 fesettings->min_delay_ms = state->config->min_delay_ms; 653 fesettings->min_delay_ms = state->config->min_delay_ms;
651 if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) { 654 if (p->symbol_rate < 10000000) {
652 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 32000; 655 fesettings->step_size = p->symbol_rate / 32000;
653 fesettings->max_drift = 5000; 656 fesettings->max_drift = 5000;
654 } else { 657 } else {
655 fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 16000; 658 fesettings->step_size = p->symbol_rate / 16000;
656 fesettings->max_drift = fesettings->parameters.u.qpsk.symbol_rate / 2000; 659 fesettings->max_drift = p->symbol_rate / 2000;
657 } 660 }
658 return 0; 661 return 0;
659} 662}
@@ -705,10 +708,9 @@ error:
705} 708}
706 709
707static struct dvb_frontend_ops stv0299_ops = { 710static struct dvb_frontend_ops stv0299_ops = {
708 711 .delsys = { SYS_DVBS },
709 .info = { 712 .info = {
710 .name = "ST STV0299 DVB-S", 713 .name = "ST STV0299 DVB-S",
711 .type = FE_QPSK,
712 .frequency_min = 950000, 714 .frequency_min = 950000,
713 .frequency_max = 2150000, 715 .frequency_max = 2150000,
714 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 716 .frequency_stepsize = 125, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/stv0367.c b/drivers/media/dvb/frontends/stv0367.c
index e57ab53e2e2..fdd20c7737b 100644
--- a/drivers/media/dvb/frontends/stv0367.c
+++ b/drivers/media/dvb/frontends/stv0367.c
@@ -1577,9 +1577,9 @@ int stv0367ter_init(struct dvb_frontend *fe)
1577 return 0; 1577 return 0;
1578} 1578}
1579 1579
1580static int stv0367ter_algo(struct dvb_frontend *fe, 1580static int stv0367ter_algo(struct dvb_frontend *fe)
1581 struct dvb_frontend_parameters *param)
1582{ 1581{
1582 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1583 struct stv0367_state *state = fe->demodulator_priv; 1583 struct stv0367_state *state = fe->demodulator_priv;
1584 struct stv0367ter_state *ter_state = state->ter_state; 1584 struct stv0367ter_state *ter_state = state->ter_state;
1585 int offset = 0, tempo = 0; 1585 int offset = 0, tempo = 0;
@@ -1591,7 +1591,7 @@ static int stv0367ter_algo(struct dvb_frontend *fe,
1591 1591
1592 dprintk("%s:\n", __func__); 1592 dprintk("%s:\n", __func__);
1593 1593
1594 ter_state->frequency = param->frequency; 1594 ter_state->frequency = p->frequency;
1595 ter_state->force = FE_TER_FORCENONE 1595 ter_state->force = FE_TER_FORCENONE
1596 + stv0367_readbits(state, F367TER_FORCE) * 2; 1596 + stv0367_readbits(state, F367TER_FORCE) * 2;
1597 ter_state->if_iq_mode = state->config->if_iq_mode; 1597 ter_state->if_iq_mode = state->config->if_iq_mode;
@@ -1620,7 +1620,7 @@ static int stv0367ter_algo(struct dvb_frontend *fe,
1620 1620
1621 usleep_range(5000, 7000); 1621 usleep_range(5000, 7000);
1622 1622
1623 switch (param->inversion) { 1623 switch (p->inversion) {
1624 case INVERSION_AUTO: 1624 case INVERSION_AUTO:
1625 default: 1625 default:
1626 dprintk("%s: inversion AUTO\n", __func__); 1626 dprintk("%s: inversion AUTO\n", __func__);
@@ -1636,10 +1636,10 @@ static int stv0367ter_algo(struct dvb_frontend *fe,
1636 case INVERSION_OFF: 1636 case INVERSION_OFF:
1637 if (ter_state->if_iq_mode == FE_TER_IQ_TUNER) 1637 if (ter_state->if_iq_mode == FE_TER_IQ_TUNER)
1638 stv0367_writebits(state, F367TER_IQ_INVERT, 1638 stv0367_writebits(state, F367TER_IQ_INVERT,
1639 param->inversion); 1639 p->inversion);
1640 else 1640 else
1641 stv0367_writebits(state, F367TER_INV_SPECTR, 1641 stv0367_writebits(state, F367TER_INV_SPECTR,
1642 param->inversion); 1642 p->inversion);
1643 1643
1644 break; 1644 break;
1645 } 1645 }
@@ -1806,10 +1806,9 @@ static int stv0367ter_algo(struct dvb_frontend *fe,
1806 return 0; 1806 return 0;
1807} 1807}
1808 1808
1809static int stv0367ter_set_frontend(struct dvb_frontend *fe, 1809static int stv0367ter_set_frontend(struct dvb_frontend *fe)
1810 struct dvb_frontend_parameters *param)
1811{ 1810{
1812 struct dvb_ofdm_parameters *op = &param->u.ofdm; 1811 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1813 struct stv0367_state *state = fe->demodulator_priv; 1812 struct stv0367_state *state = fe->demodulator_priv;
1814 struct stv0367ter_state *ter_state = state->ter_state; 1813 struct stv0367ter_state *ter_state = state->ter_state;
1815 1814
@@ -1822,12 +1821,12 @@ static int stv0367ter_set_frontend(struct dvb_frontend *fe,
1822 if (fe->ops.tuner_ops.set_params) { 1821 if (fe->ops.tuner_ops.set_params) {
1823 if (fe->ops.i2c_gate_ctrl) 1822 if (fe->ops.i2c_gate_ctrl)
1824 fe->ops.i2c_gate_ctrl(fe, 1); 1823 fe->ops.i2c_gate_ctrl(fe, 1);
1825 fe->ops.tuner_ops.set_params(fe, param); 1824 fe->ops.tuner_ops.set_params(fe);
1826 if (fe->ops.i2c_gate_ctrl) 1825 if (fe->ops.i2c_gate_ctrl)
1827 fe->ops.i2c_gate_ctrl(fe, 0); 1826 fe->ops.i2c_gate_ctrl(fe, 0);
1828 } 1827 }
1829 1828
1830 switch (op->transmission_mode) { 1829 switch (p->transmission_mode) {
1831 default: 1830 default:
1832 case TRANSMISSION_MODE_AUTO: 1831 case TRANSMISSION_MODE_AUTO:
1833 case TRANSMISSION_MODE_2K: 1832 case TRANSMISSION_MODE_2K:
@@ -1841,34 +1840,34 @@ static int stv0367ter_set_frontend(struct dvb_frontend *fe,
1841 break; 1840 break;
1842 } 1841 }
1843 1842
1844 switch (op->guard_interval) { 1843 switch (p->guard_interval) {
1845 default: 1844 default:
1846 case GUARD_INTERVAL_1_32: 1845 case GUARD_INTERVAL_1_32:
1847 case GUARD_INTERVAL_1_16: 1846 case GUARD_INTERVAL_1_16:
1848 case GUARD_INTERVAL_1_8: 1847 case GUARD_INTERVAL_1_8:
1849 case GUARD_INTERVAL_1_4: 1848 case GUARD_INTERVAL_1_4:
1850 ter_state->guard = op->guard_interval; 1849 ter_state->guard = p->guard_interval;
1851 break; 1850 break;
1852 case GUARD_INTERVAL_AUTO: 1851 case GUARD_INTERVAL_AUTO:
1853 ter_state->guard = GUARD_INTERVAL_1_32; 1852 ter_state->guard = GUARD_INTERVAL_1_32;
1854 break; 1853 break;
1855 } 1854 }
1856 1855
1857 switch (op->bandwidth) { 1856 switch (p->bandwidth_hz) {
1858 case BANDWIDTH_6_MHZ: 1857 case 6000000:
1859 ter_state->bw = FE_TER_CHAN_BW_6M; 1858 ter_state->bw = FE_TER_CHAN_BW_6M;
1860 break; 1859 break;
1861 case BANDWIDTH_7_MHZ: 1860 case 7000000:
1862 ter_state->bw = FE_TER_CHAN_BW_7M; 1861 ter_state->bw = FE_TER_CHAN_BW_7M;
1863 break; 1862 break;
1864 case BANDWIDTH_8_MHZ: 1863 case 8000000:
1865 default: 1864 default:
1866 ter_state->bw = FE_TER_CHAN_BW_8M; 1865 ter_state->bw = FE_TER_CHAN_BW_8M;
1867 } 1866 }
1868 1867
1869 ter_state->hierarchy = FE_TER_HIER_NONE; 1868 ter_state->hierarchy = FE_TER_HIER_NONE;
1870 1869
1871 switch (param->inversion) { 1870 switch (p->inversion) {
1872 case INVERSION_OFF: 1871 case INVERSION_OFF:
1873 case INVERSION_ON: 1872 case INVERSION_ON:
1874 num_trials = 1; 1873 num_trials = 1;
@@ -1885,14 +1884,14 @@ static int stv0367ter_set_frontend(struct dvb_frontend *fe,
1885 1884
1886 while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) { 1885 while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) {
1887 if (!ter_state->first_lock) { 1886 if (!ter_state->first_lock) {
1888 if (param->inversion == INVERSION_AUTO) 1887 if (p->inversion == INVERSION_AUTO)
1889 ter_state->sense = SenseTrials[index]; 1888 ter_state->sense = SenseTrials[index];
1890 1889
1891 } 1890 }
1892 stv0367ter_algo(fe,/* &pLook, result,*/ param); 1891 stv0367ter_algo(fe);
1893 1892
1894 if ((ter_state->state == FE_TER_LOCKOK) && 1893 if ((ter_state->state == FE_TER_LOCKOK) &&
1895 (param->inversion == INVERSION_AUTO) && 1894 (p->inversion == INVERSION_AUTO) &&
1896 (index == 1)) { 1895 (index == 1)) {
1897 /* invert spectrum sense */ 1896 /* invert spectrum sense */
1898 SenseTrials[index] = SenseTrials[0]; 1897 SenseTrials[index] = SenseTrials[0];
@@ -1927,50 +1926,48 @@ static int stv0367ter_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1927 return 0; 1926 return 0;
1928} 1927}
1929 1928
1930static int stv0367ter_get_frontend(struct dvb_frontend *fe, 1929static int stv0367ter_get_frontend(struct dvb_frontend *fe)
1931 struct dvb_frontend_parameters *param)
1932{ 1930{
1931 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1933 struct stv0367_state *state = fe->demodulator_priv; 1932 struct stv0367_state *state = fe->demodulator_priv;
1934 struct stv0367ter_state *ter_state = state->ter_state; 1933 struct stv0367ter_state *ter_state = state->ter_state;
1935 struct dvb_ofdm_parameters *op = &param->u.ofdm;
1936 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1937 1934
1938 int error = 0; 1935 int error = 0;
1939 enum stv0367_ter_mode mode; 1936 enum stv0367_ter_mode mode;
1940 int constell = 0,/* snr = 0,*/ Data = 0; 1937 int constell = 0,/* snr = 0,*/ Data = 0;
1941 1938
1942 param->frequency = stv0367_get_tuner_freq(fe); 1939 p->frequency = stv0367_get_tuner_freq(fe);
1943 if ((int)param->frequency < 0) 1940 if ((int)p->frequency < 0)
1944 param->frequency = c->frequency; 1941 p->frequency = -p->frequency;
1945 1942
1946 constell = stv0367_readbits(state, F367TER_TPS_CONST); 1943 constell = stv0367_readbits(state, F367TER_TPS_CONST);
1947 if (constell == 0) 1944 if (constell == 0)
1948 op->constellation = QPSK; 1945 p->modulation = QPSK;
1949 else if (constell == 1) 1946 else if (constell == 1)
1950 op->constellation = QAM_16; 1947 p->modulation = QAM_16;
1951 else 1948 else
1952 op->constellation = QAM_64; 1949 p->modulation = QAM_64;
1953 1950
1954 param->inversion = stv0367_readbits(state, F367TER_INV_SPECTR); 1951 p->inversion = stv0367_readbits(state, F367TER_INV_SPECTR);
1955 1952
1956 /* Get the Hierarchical mode */ 1953 /* Get the Hierarchical mode */
1957 Data = stv0367_readbits(state, F367TER_TPS_HIERMODE); 1954 Data = stv0367_readbits(state, F367TER_TPS_HIERMODE);
1958 1955
1959 switch (Data) { 1956 switch (Data) {
1960 case 0: 1957 case 0:
1961 op->hierarchy_information = HIERARCHY_NONE; 1958 p->hierarchy = HIERARCHY_NONE;
1962 break; 1959 break;
1963 case 1: 1960 case 1:
1964 op->hierarchy_information = HIERARCHY_1; 1961 p->hierarchy = HIERARCHY_1;
1965 break; 1962 break;
1966 case 2: 1963 case 2:
1967 op->hierarchy_information = HIERARCHY_2; 1964 p->hierarchy = HIERARCHY_2;
1968 break; 1965 break;
1969 case 3: 1966 case 3:
1970 op->hierarchy_information = HIERARCHY_4; 1967 p->hierarchy = HIERARCHY_4;
1971 break; 1968 break;
1972 default: 1969 default:
1973 op->hierarchy_information = HIERARCHY_AUTO; 1970 p->hierarchy = HIERARCHY_AUTO;
1974 break; /* error */ 1971 break; /* error */
1975 } 1972 }
1976 1973
@@ -1982,22 +1979,22 @@ static int stv0367ter_get_frontend(struct dvb_frontend *fe,
1982 1979
1983 switch (Data) { 1980 switch (Data) {
1984 case 0: 1981 case 0:
1985 op->code_rate_HP = FEC_1_2; 1982 p->code_rate_HP = FEC_1_2;
1986 break; 1983 break;
1987 case 1: 1984 case 1:
1988 op->code_rate_HP = FEC_2_3; 1985 p->code_rate_HP = FEC_2_3;
1989 break; 1986 break;
1990 case 2: 1987 case 2:
1991 op->code_rate_HP = FEC_3_4; 1988 p->code_rate_HP = FEC_3_4;
1992 break; 1989 break;
1993 case 3: 1990 case 3:
1994 op->code_rate_HP = FEC_5_6; 1991 p->code_rate_HP = FEC_5_6;
1995 break; 1992 break;
1996 case 4: 1993 case 4:
1997 op->code_rate_HP = FEC_7_8; 1994 p->code_rate_HP = FEC_7_8;
1998 break; 1995 break;
1999 default: 1996 default:
2000 op->code_rate_HP = FEC_AUTO; 1997 p->code_rate_HP = FEC_AUTO;
2001 break; /* error */ 1998 break; /* error */
2002 } 1999 }
2003 2000
@@ -2005,19 +2002,19 @@ static int stv0367ter_get_frontend(struct dvb_frontend *fe,
2005 2002
2006 switch (mode) { 2003 switch (mode) {
2007 case FE_TER_MODE_2K: 2004 case FE_TER_MODE_2K:
2008 op->transmission_mode = TRANSMISSION_MODE_2K; 2005 p->transmission_mode = TRANSMISSION_MODE_2K;
2009 break; 2006 break;
2010/* case FE_TER_MODE_4K: 2007/* case FE_TER_MODE_4K:
2011 op->transmission_mode = TRANSMISSION_MODE_4K; 2008 p->transmission_mode = TRANSMISSION_MODE_4K;
2012 break;*/ 2009 break;*/
2013 case FE_TER_MODE_8K: 2010 case FE_TER_MODE_8K:
2014 op->transmission_mode = TRANSMISSION_MODE_8K; 2011 p->transmission_mode = TRANSMISSION_MODE_8K;
2015 break; 2012 break;
2016 default: 2013 default:
2017 op->transmission_mode = TRANSMISSION_MODE_AUTO; 2014 p->transmission_mode = TRANSMISSION_MODE_AUTO;
2018 } 2015 }
2019 2016
2020 op->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD); 2017 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD);
2021 2018
2022 return error; 2019 return error;
2023} 2020}
@@ -2265,9 +2262,9 @@ static void stv0367_release(struct dvb_frontend *fe)
2265} 2262}
2266 2263
2267static struct dvb_frontend_ops stv0367ter_ops = { 2264static struct dvb_frontend_ops stv0367ter_ops = {
2265 .delsys = { SYS_DVBT },
2268 .info = { 2266 .info = {
2269 .name = "ST STV0367 DVB-T", 2267 .name = "ST STV0367 DVB-T",
2270 .type = FE_OFDM,
2271 .frequency_min = 47000000, 2268 .frequency_min = 47000000,
2272 .frequency_max = 862000000, 2269 .frequency_max = 862000000,
2273 .frequency_stepsize = 15625, 2270 .frequency_stepsize = 15625,
@@ -2822,9 +2819,8 @@ int stv0367cab_init(struct dvb_frontend *fe)
2822} 2819}
2823static 2820static
2824enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state, 2821enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2825 struct dvb_frontend_parameters *param) 2822 struct dtv_frontend_properties *p)
2826{ 2823{
2827 struct dvb_qam_parameters *op = &param->u.qam;
2828 struct stv0367cab_state *cab_state = state->cab_state; 2824 struct stv0367cab_state *cab_state = state->cab_state;
2829 enum stv0367_cab_signal_type signalType = FE_CAB_NOAGC; 2825 enum stv0367_cab_signal_type signalType = FE_CAB_NOAGC;
2830 u32 QAMFEC_Lock, QAM_Lock, u32_tmp, 2826 u32 QAMFEC_Lock, QAM_Lock, u32_tmp,
@@ -2839,7 +2835,7 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2839 /* A max lock time of 25 ms is allowed for delayed AGC */ 2835 /* A max lock time of 25 ms is allowed for delayed AGC */
2840 AGCTimeOut = 25; 2836 AGCTimeOut = 25;
2841 /* 100000 symbols needed by the TRL as a maximum value */ 2837 /* 100000 symbols needed by the TRL as a maximum value */
2842 TRLTimeOut = 100000000 / op->symbol_rate; 2838 TRLTimeOut = 100000000 / p->symbol_rate;
2843 /* CRLSymbols is the needed number of symbols to achieve a lock 2839 /* CRLSymbols is the needed number of symbols to achieve a lock
2844 within [-4%, +4%] of the symbol rate. 2840 within [-4%, +4%] of the symbol rate.
2845 CRL timeout is calculated 2841 CRL timeout is calculated
@@ -2849,7 +2845,7 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2849 A characterization must be performed 2845 A characterization must be performed
2850 with these echoes to get new timeout values. 2846 with these echoes to get new timeout values.
2851 */ 2847 */
2852 switch (op->modulation) { 2848 switch (p->modulation) {
2853 case QAM_16: 2849 case QAM_16:
2854 CRLSymbols = 150000; 2850 CRLSymbols = 150000;
2855 EQLTimeOut = 100; 2851 EQLTimeOut = 100;
@@ -2883,9 +2879,9 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2883 } else 2879 } else
2884#endif 2880#endif
2885 CRLTimeOut = (25 * CRLSymbols * (cab_state->search_range / 1000)) / 2881 CRLTimeOut = (25 * CRLSymbols * (cab_state->search_range / 1000)) /
2886 (op->symbol_rate / 1000); 2882 (p->symbol_rate / 1000);
2887 2883
2888 CRLTimeOut = (1000 * CRLTimeOut) / op->symbol_rate; 2884 CRLTimeOut = (1000 * CRLTimeOut) / p->symbol_rate;
2889 /* Timeouts below 50ms are coerced */ 2885 /* Timeouts below 50ms are coerced */
2890 if (CRLTimeOut < 50) 2886 if (CRLTimeOut < 50)
2891 CRLTimeOut = 50; 2887 CRLTimeOut = 50;
@@ -2915,7 +2911,7 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2915 stv0367cab_set_derot_freq(state, cab_state->adc_clk, 2911 stv0367cab_set_derot_freq(state, cab_state->adc_clk,
2916 (1000 * (s32)state->config->if_khz + cab_state->derot_offset)); 2912 (1000 * (s32)state->config->if_khz + cab_state->derot_offset));
2917 /* Disable the Allpass Filter when the symbol rate is out of range */ 2913 /* Disable the Allpass Filter when the symbol rate is out of range */
2918 if ((op->symbol_rate > 10800000) | (op->symbol_rate < 1800000)) { 2914 if ((p->symbol_rate > 10800000) | (p->symbol_rate < 1800000)) {
2919 stv0367_writebits(state, F367CAB_ADJ_EN, 0); 2915 stv0367_writebits(state, F367CAB_ADJ_EN, 0);
2920 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); 2916 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0);
2921 } 2917 }
@@ -2999,7 +2995,7 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2999 2995
3000 if (QAMFEC_Lock) { 2996 if (QAMFEC_Lock) {
3001 signalType = FE_CAB_DATAOK; 2997 signalType = FE_CAB_DATAOK;
3002 cab_state->modulation = op->modulation; 2998 cab_state->modulation = p->modulation;
3003 cab_state->spect_inv = stv0367_readbits(state, 2999 cab_state->spect_inv = stv0367_readbits(state,
3004 F367CAB_QUAD_INV); 3000 F367CAB_QUAD_INV);
3005#if 0 3001#if 0
@@ -3081,20 +3077,19 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
3081 return signalType; 3077 return signalType;
3082} 3078}
3083 3079
3084static int stv0367cab_set_frontend(struct dvb_frontend *fe, 3080static int stv0367cab_set_frontend(struct dvb_frontend *fe)
3085 struct dvb_frontend_parameters *param)
3086{ 3081{
3082 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
3087 struct stv0367_state *state = fe->demodulator_priv; 3083 struct stv0367_state *state = fe->demodulator_priv;
3088 struct stv0367cab_state *cab_state = state->cab_state; 3084 struct stv0367cab_state *cab_state = state->cab_state;
3089 struct dvb_qam_parameters *op = &param->u.qam;
3090 enum stv0367cab_mod QAMSize = 0; 3085 enum stv0367cab_mod QAMSize = 0;
3091 3086
3092 dprintk("%s: freq = %d, srate = %d\n", __func__, 3087 dprintk("%s: freq = %d, srate = %d\n", __func__,
3093 param->frequency, op->symbol_rate); 3088 p->frequency, p->symbol_rate);
3094 3089
3095 cab_state->derot_offset = 0; 3090 cab_state->derot_offset = 0;
3096 3091
3097 switch (op->modulation) { 3092 switch (p->modulation) {
3098 case QAM_16: 3093 case QAM_16:
3099 QAMSize = FE_CAB_MOD_QAM16; 3094 QAMSize = FE_CAB_MOD_QAM16;
3100 break; 3095 break;
@@ -3120,77 +3115,76 @@ static int stv0367cab_set_frontend(struct dvb_frontend *fe,
3120 if (fe->ops.tuner_ops.set_params) { 3115 if (fe->ops.tuner_ops.set_params) {
3121 if (fe->ops.i2c_gate_ctrl) 3116 if (fe->ops.i2c_gate_ctrl)
3122 fe->ops.i2c_gate_ctrl(fe, 1); 3117 fe->ops.i2c_gate_ctrl(fe, 1);
3123 fe->ops.tuner_ops.set_params(fe, param); 3118 fe->ops.tuner_ops.set_params(fe);
3124 if (fe->ops.i2c_gate_ctrl) 3119 if (fe->ops.i2c_gate_ctrl)
3125 fe->ops.i2c_gate_ctrl(fe, 0); 3120 fe->ops.i2c_gate_ctrl(fe, 0);
3126 } 3121 }
3127 3122
3128 stv0367cab_SetQamSize( 3123 stv0367cab_SetQamSize(
3129 state, 3124 state,
3130 op->symbol_rate, 3125 p->symbol_rate,
3131 QAMSize); 3126 QAMSize);
3132 3127
3133 stv0367cab_set_srate(state, 3128 stv0367cab_set_srate(state,
3134 cab_state->adc_clk, 3129 cab_state->adc_clk,
3135 cab_state->mclk, 3130 cab_state->mclk,
3136 op->symbol_rate, 3131 p->symbol_rate,
3137 QAMSize); 3132 QAMSize);
3138 /* Search algorithm launch, [-1.1*RangeOffset, +1.1*RangeOffset] scan */ 3133 /* Search algorithm launch, [-1.1*RangeOffset, +1.1*RangeOffset] scan */
3139 cab_state->state = stv0367cab_algo(state, param); 3134 cab_state->state = stv0367cab_algo(state, p);
3140 return 0; 3135 return 0;
3141} 3136}
3142 3137
3143static int stv0367cab_get_frontend(struct dvb_frontend *fe, 3138static int stv0367cab_get_frontend(struct dvb_frontend *fe)
3144 struct dvb_frontend_parameters *param)
3145{ 3139{
3140 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
3146 struct stv0367_state *state = fe->demodulator_priv; 3141 struct stv0367_state *state = fe->demodulator_priv;
3147 struct stv0367cab_state *cab_state = state->cab_state; 3142 struct stv0367cab_state *cab_state = state->cab_state;
3148 struct dvb_qam_parameters *op = &param->u.qam;
3149 3143
3150 enum stv0367cab_mod QAMSize; 3144 enum stv0367cab_mod QAMSize;
3151 3145
3152 dprintk("%s:\n", __func__); 3146 dprintk("%s:\n", __func__);
3153 3147
3154 op->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk); 3148 p->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk);
3155 3149
3156 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); 3150 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE);
3157 switch (QAMSize) { 3151 switch (QAMSize) {
3158 case FE_CAB_MOD_QAM16: 3152 case FE_CAB_MOD_QAM16:
3159 op->modulation = QAM_16; 3153 p->modulation = QAM_16;
3160 break; 3154 break;
3161 case FE_CAB_MOD_QAM32: 3155 case FE_CAB_MOD_QAM32:
3162 op->modulation = QAM_32; 3156 p->modulation = QAM_32;
3163 break; 3157 break;
3164 case FE_CAB_MOD_QAM64: 3158 case FE_CAB_MOD_QAM64:
3165 op->modulation = QAM_64; 3159 p->modulation = QAM_64;
3166 break; 3160 break;
3167 case FE_CAB_MOD_QAM128: 3161 case FE_CAB_MOD_QAM128:
3168 op->modulation = QAM_128; 3162 p->modulation = QAM_128;
3169 break; 3163 break;
3170 case QAM_256: 3164 case QAM_256:
3171 op->modulation = QAM_256; 3165 p->modulation = QAM_256;
3172 break; 3166 break;
3173 default: 3167 default:
3174 break; 3168 break;
3175 } 3169 }
3176 3170
3177 param->frequency = stv0367_get_tuner_freq(fe); 3171 p->frequency = stv0367_get_tuner_freq(fe);
3178 3172
3179 dprintk("%s: tuner frequency = %d\n", __func__, param->frequency); 3173 dprintk("%s: tuner frequency = %d\n", __func__, p->frequency);
3180 3174
3181 if (state->config->if_khz == 0) { 3175 if (state->config->if_khz == 0) {
3182 param->frequency += 3176 p->frequency +=
3183 (stv0367cab_get_derot_freq(state, cab_state->adc_clk) - 3177 (stv0367cab_get_derot_freq(state, cab_state->adc_clk) -
3184 cab_state->adc_clk / 4000); 3178 cab_state->adc_clk / 4000);
3185 return 0; 3179 return 0;
3186 } 3180 }
3187 3181
3188 if (state->config->if_khz > cab_state->adc_clk / 1000) 3182 if (state->config->if_khz > cab_state->adc_clk / 1000)
3189 param->frequency += (state->config->if_khz 3183 p->frequency += (state->config->if_khz
3190 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) 3184 - stv0367cab_get_derot_freq(state, cab_state->adc_clk)
3191 - cab_state->adc_clk / 1000); 3185 - cab_state->adc_clk / 1000);
3192 else 3186 else
3193 param->frequency += (state->config->if_khz 3187 p->frequency += (state->config->if_khz
3194 - stv0367cab_get_derot_freq(state, cab_state->adc_clk)); 3188 - stv0367cab_get_derot_freq(state, cab_state->adc_clk));
3195 3189
3196 return 0; 3190 return 0;
@@ -3386,9 +3380,9 @@ static int stv0367cab_read_ucblcks(struct dvb_frontend *fe, u32 *ucblocks)
3386}; 3380};
3387 3381
3388static struct dvb_frontend_ops stv0367cab_ops = { 3382static struct dvb_frontend_ops stv0367cab_ops = {
3383 .delsys = { SYS_DVBC_ANNEX_A },
3389 .info = { 3384 .info = {
3390 .name = "ST STV0367 DVB-C", 3385 .name = "ST STV0367 DVB-C",
3391 .type = FE_QAM,
3392 .frequency_min = 47000000, 3386 .frequency_min = 47000000,
3393 .frequency_max = 862000000, 3387 .frequency_max = 862000000,
3394 .frequency_stepsize = 62500, 3388 .frequency_stepsize = 62500,
diff --git a/drivers/media/dvb/frontends/stv0900_core.c b/drivers/media/dvb/frontends/stv0900_core.c
index 0ca316d6fff..7f1badaf0d0 100644
--- a/drivers/media/dvb/frontends/stv0900_core.c
+++ b/drivers/media/dvb/frontends/stv0900_core.c
@@ -973,22 +973,6 @@ static enum dvbfe_algo stv0900_frontend_algo(struct dvb_frontend *fe)
973 return DVBFE_ALGO_CUSTOM; 973 return DVBFE_ALGO_CUSTOM;
974} 974}
975 975
976static int stb0900_set_property(struct dvb_frontend *fe,
977 struct dtv_property *tvp)
978{
979 dprintk("%s(..)\n", __func__);
980
981 return 0;
982}
983
984static int stb0900_get_property(struct dvb_frontend *fe,
985 struct dtv_property *tvp)
986{
987 dprintk("%s(..)\n", __func__);
988
989 return 0;
990}
991
992void stv0900_start_search(struct stv0900_internal *intp, 976void stv0900_start_search(struct stv0900_internal *intp,
993 enum fe_stv0900_demod_num demod) 977 enum fe_stv0900_demod_num demod)
994{ 978{
@@ -1574,8 +1558,7 @@ static int stv0900_status(struct stv0900_internal *intp,
1574 return locked; 1558 return locked;
1575} 1559}
1576 1560
1577static enum dvbfe_search stv0900_search(struct dvb_frontend *fe, 1561static enum dvbfe_search stv0900_search(struct dvb_frontend *fe)
1578 struct dvb_frontend_parameters *params)
1579{ 1562{
1580 struct stv0900_state *state = fe->demodulator_priv; 1563 struct stv0900_state *state = fe->demodulator_priv;
1581 struct stv0900_internal *intp = state->internal; 1564 struct stv0900_internal *intp = state->internal;
@@ -1675,12 +1658,6 @@ static int stv0900_read_status(struct dvb_frontend *fe, enum fe_status *status)
1675 return 0; 1658 return 0;
1676} 1659}
1677 1660
1678static int stv0900_track(struct dvb_frontend *fe,
1679 struct dvb_frontend_parameters *p)
1680{
1681 return 0;
1682}
1683
1684static int stv0900_stop_ts(struct dvb_frontend *fe, int stop_ts) 1661static int stv0900_stop_ts(struct dvb_frontend *fe, int stop_ts)
1685{ 1662{
1686 1663
@@ -1866,24 +1843,23 @@ static int stv0900_sleep(struct dvb_frontend *fe)
1866 return 0; 1843 return 0;
1867} 1844}
1868 1845
1869static int stv0900_get_frontend(struct dvb_frontend *fe, 1846static int stv0900_get_frontend(struct dvb_frontend *fe)
1870 struct dvb_frontend_parameters *p)
1871{ 1847{
1848 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1872 struct stv0900_state *state = fe->demodulator_priv; 1849 struct stv0900_state *state = fe->demodulator_priv;
1873 struct stv0900_internal *intp = state->internal; 1850 struct stv0900_internal *intp = state->internal;
1874 enum fe_stv0900_demod_num demod = state->demod; 1851 enum fe_stv0900_demod_num demod = state->demod;
1875 struct stv0900_signal_info p_result = intp->result[demod]; 1852 struct stv0900_signal_info p_result = intp->result[demod];
1876 1853
1877 p->frequency = p_result.locked ? p_result.frequency : 0; 1854 p->frequency = p_result.locked ? p_result.frequency : 0;
1878 p->u.qpsk.symbol_rate = p_result.locked ? p_result.symbol_rate : 0; 1855 p->symbol_rate = p_result.locked ? p_result.symbol_rate : 0;
1879 return 0; 1856 return 0;
1880} 1857}
1881 1858
1882static struct dvb_frontend_ops stv0900_ops = { 1859static struct dvb_frontend_ops stv0900_ops = {
1883 1860 .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
1884 .info = { 1861 .info = {
1885 .name = "STV0900 frontend", 1862 .name = "STV0900 frontend",
1886 .type = FE_QPSK,
1887 .frequency_min = 950000, 1863 .frequency_min = 950000,
1888 .frequency_max = 2150000, 1864 .frequency_max = 2150000,
1889 .frequency_stepsize = 125, 1865 .frequency_stepsize = 125,
@@ -1907,10 +1883,7 @@ static struct dvb_frontend_ops stv0900_ops = {
1907 .diseqc_send_burst = stv0900_send_burst, 1883 .diseqc_send_burst = stv0900_send_burst,
1908 .diseqc_recv_slave_reply = stv0900_recv_slave_reply, 1884 .diseqc_recv_slave_reply = stv0900_recv_slave_reply,
1909 .set_tone = stv0900_set_tone, 1885 .set_tone = stv0900_set_tone,
1910 .set_property = stb0900_set_property,
1911 .get_property = stb0900_get_property,
1912 .search = stv0900_search, 1886 .search = stv0900_search,
1913 .track = stv0900_track,
1914 .read_status = stv0900_read_status, 1887 .read_status = stv0900_read_status,
1915 .read_ber = stv0900_read_ber, 1888 .read_ber = stv0900_read_ber,
1916 .read_signal_strength = stv0900_read_signal_strength, 1889 .read_signal_strength = stv0900_read_signal_strength,
diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c
index ebda41936b9..4aef1877ed4 100644
--- a/drivers/media/dvb/frontends/stv090x.c
+++ b/drivers/media/dvb/frontends/stv090x.c
@@ -3427,17 +3427,17 @@ err:
3427 return -1; 3427 return -1;
3428} 3428}
3429 3429
3430static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 3430static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
3431{ 3431{
3432 struct stv090x_state *state = fe->demodulator_priv; 3432 struct stv090x_state *state = fe->demodulator_priv;
3433 struct dtv_frontend_properties *props = &fe->dtv_property_cache; 3433 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3434 3434
3435 if (p->frequency == 0) 3435 if (props->frequency == 0)
3436 return DVBFE_ALGO_SEARCH_INVALID; 3436 return DVBFE_ALGO_SEARCH_INVALID;
3437 3437
3438 state->delsys = props->delivery_system; 3438 state->delsys = props->delivery_system;
3439 state->frequency = p->frequency; 3439 state->frequency = props->frequency;
3440 state->srate = p->u.qpsk.symbol_rate; 3440 state->srate = props->symbol_rate;
3441 state->search_mode = STV090x_SEARCH_AUTO; 3441 state->search_mode = STV090x_SEARCH_AUTO;
3442 state->algo = STV090x_COLD_SEARCH; 3442 state->algo = STV090x_COLD_SEARCH;
3443 state->fec = STV090x_PRERR; 3443 state->fec = STV090x_PRERR;
@@ -4712,10 +4712,9 @@ int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir, u8 value,
4712EXPORT_SYMBOL(stv090x_set_gpio); 4712EXPORT_SYMBOL(stv090x_set_gpio);
4713 4713
4714static struct dvb_frontend_ops stv090x_ops = { 4714static struct dvb_frontend_ops stv090x_ops = {
4715 4715 .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
4716 .info = { 4716 .info = {
4717 .name = "STV090x Multistandard", 4717 .name = "STV090x Multistandard",
4718 .type = FE_QPSK,
4719 .frequency_min = 950000, 4718 .frequency_min = 950000,
4720 .frequency_max = 2150000, 4719 .frequency_max = 2150000,
4721 .frequency_stepsize = 0, 4720 .frequency_stepsize = 0,
@@ -4743,7 +4742,7 @@ static struct dvb_frontend_ops stv090x_ops = {
4743 .read_status = stv090x_read_status, 4742 .read_status = stv090x_read_status,
4744 .read_ber = stv090x_read_per, 4743 .read_ber = stv090x_read_per,
4745 .read_signal_strength = stv090x_read_signal_strength, 4744 .read_signal_strength = stv090x_read_signal_strength,
4746 .read_snr = stv090x_read_cnr 4745 .read_snr = stv090x_read_cnr,
4747}; 4746};
4748 4747
4749 4748
diff --git a/drivers/media/dvb/frontends/stv6110.c b/drivers/media/dvb/frontends/stv6110.c
index 2dca7c8e514..20b5fa92c53 100644
--- a/drivers/media/dvb/frontends/stv6110.c
+++ b/drivers/media/dvb/frontends/stv6110.c
@@ -347,8 +347,7 @@ static int stv6110_set_frequency(struct dvb_frontend *fe, u32 frequency)
347 return 0; 347 return 0;
348} 348}
349 349
350static int stv6110_set_params(struct dvb_frontend *fe, 350static int stv6110_set_params(struct dvb_frontend *fe)
351 struct dvb_frontend_parameters *params)
352{ 351{
353 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 352 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
354 u32 bandwidth = carrier_width(c->symbol_rate, c->rolloff); 353 u32 bandwidth = carrier_width(c->symbol_rate, c->rolloff);
diff --git a/drivers/media/dvb/frontends/tda10021.c b/drivers/media/dvb/frontends/tda10021.c
index 6ca533ea0f0..1bff7f457e1 100644
--- a/drivers/media/dvb/frontends/tda10021.c
+++ b/drivers/media/dvb/frontends/tda10021.c
@@ -224,47 +224,86 @@ static int tda10021_init (struct dvb_frontend *fe)
224 return 0; 224 return 0;
225} 225}
226 226
227static int tda10021_set_parameters (struct dvb_frontend *fe, 227struct qam_params {
228 struct dvb_frontend_parameters *p) 228 u8 conf, agcref, lthr, mseth, aref;
229};
230
231static int tda10021_set_parameters(struct dvb_frontend *fe)
229{ 232{
233 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
234 u32 delsys = c->delivery_system;
235 unsigned qam = c->modulation;
236 bool is_annex_c;
237 u32 reg0x3d;
230 struct tda10021_state* state = fe->demodulator_priv; 238 struct tda10021_state* state = fe->demodulator_priv;
239 static const struct qam_params qam_params[] = {
240 /* Modulation Conf AGCref LTHR MSETH AREF */
241 [QPSK] = { 0x14, 0x78, 0x78, 0x8c, 0x96 },
242 [QAM_16] = { 0x00, 0x8c, 0x87, 0xa2, 0x91 },
243 [QAM_32] = { 0x04, 0x8c, 0x64, 0x74, 0x96 },
244 [QAM_64] = { 0x08, 0x6a, 0x46, 0x43, 0x6a },
245 [QAM_128] = { 0x0c, 0x78, 0x36, 0x34, 0x7e },
246 [QAM_256] = { 0x10, 0x5c, 0x26, 0x23, 0x6b },
247 };
248
249 switch (delsys) {
250 case SYS_DVBC_ANNEX_A:
251 is_annex_c = false;
252 break;
253 case SYS_DVBC_ANNEX_C:
254 is_annex_c = true;
255 break;
256 default:
257 return -EINVAL;
258 }
231 259
232 //table for QAM4-QAM256 ready QAM4 QAM16 QAM32 QAM64 QAM128 QAM256 260 /*
233 //CONF 261 * gcc optimizes the code bellow the same way as it would code:
234 static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c, 0x10 }; 262 * "if (qam > 5) return -EINVAL;"
235 //AGCREF value 263 * Yet, the code is clearer, as it shows what QAM standards are
236 static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78, 0x5c }; 264 * supported by the driver, and avoids the usage of magic numbers on
237 //LTHR value 265 * it.
238 static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36, 0x26 }; 266 */
239 //MSETH 267 switch (qam) {
240 static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34, 0x23 }; 268 case QPSK:
241 //AREF 269 case QAM_16:
242 static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e, 0x6b }; 270 case QAM_32:
243 271 case QAM_64:
244 int qam = p->u.qam.modulation; 272 case QAM_128:
245 273 case QAM_256:
246 if (qam < 0 || qam > 5) 274 break;
275 default:
247 return -EINVAL; 276 return -EINVAL;
277 }
248 278
249 if (p->inversion != INVERSION_ON && p->inversion != INVERSION_OFF) 279 if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)
250 return -EINVAL; 280 return -EINVAL;
251 281
252 //printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate); 282 /*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/
253 283
254 if (fe->ops.tuner_ops.set_params) { 284 if (fe->ops.tuner_ops.set_params) {
255 fe->ops.tuner_ops.set_params(fe, p); 285 fe->ops.tuner_ops.set_params(fe);
256 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 286 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
257 } 287 }
258 288
259 tda10021_set_symbolrate (state, p->u.qam.symbol_rate); 289 tda10021_set_symbolrate(state, c->symbol_rate);
260 _tda10021_writereg (state, 0x34, state->pwm); 290 _tda10021_writereg(state, 0x34, state->pwm);
261 291
262 _tda10021_writereg (state, 0x01, reg0x01[qam]); 292 _tda10021_writereg(state, 0x01, qam_params[qam].agcref);
263 _tda10021_writereg (state, 0x05, reg0x05[qam]); 293 _tda10021_writereg(state, 0x05, qam_params[qam].lthr);
264 _tda10021_writereg (state, 0x08, reg0x08[qam]); 294 _tda10021_writereg(state, 0x08, qam_params[qam].mseth);
265 _tda10021_writereg (state, 0x09, reg0x09[qam]); 295 _tda10021_writereg(state, 0x09, qam_params[qam].aref);
266 296
267 tda10021_setup_reg0 (state, reg0x00[qam], p->inversion); 297 /*
298 * Bit 0 == 0 means roll-off = 0.15 (Annex A)
299 * == 1 means roll-off = 0.13 (Annex C)
300 */
301 reg0x3d = tda10021_readreg (state, 0x3d);
302 if (is_annex_c)
303 _tda10021_writereg (state, 0x3d, 0x01 | reg0x3d);
304 else
305 _tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);
306 tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);
268 307
269 return 0; 308 return 0;
270} 309}
@@ -347,8 +386,9 @@ static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
347 return 0; 386 return 0;
348} 387}
349 388
350static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 389static int tda10021_get_frontend(struct dvb_frontend *fe)
351{ 390{
391 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
352 struct tda10021_state* state = fe->demodulator_priv; 392 struct tda10021_state* state = fe->demodulator_priv;
353 int sync; 393 int sync;
354 s8 afc = 0; 394 s8 afc = 0;
@@ -360,17 +400,17 @@ static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
360 printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" : 400 printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
361 "DVB: TDA10021(%d): [AFC (%d) %dHz]\n", 401 "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
362 state->frontend.dvb->num, afc, 402 state->frontend.dvb->num, afc,
363 -((s32)p->u.qam.symbol_rate * afc) >> 10); 403 -((s32)p->symbol_rate * afc) >> 10);
364 } 404 }
365 405
366 p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF; 406 p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
367 p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16; 407 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
368 408
369 p->u.qam.fec_inner = FEC_NONE; 409 p->fec_inner = FEC_NONE;
370 p->frequency = ((p->frequency + 31250) / 62500) * 62500; 410 p->frequency = ((p->frequency + 31250) / 62500) * 62500;
371 411
372 if (sync & 2) 412 if (sync & 2)
373 p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10; 413 p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
374 414
375 return 0; 415 return 0;
376} 416}
@@ -444,10 +484,9 @@ error:
444} 484}
445 485
446static struct dvb_frontend_ops tda10021_ops = { 486static struct dvb_frontend_ops tda10021_ops = {
447 487 .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
448 .info = { 488 .info = {
449 .name = "Philips TDA10021 DVB-C", 489 .name = "Philips TDA10021 DVB-C",
450 .type = FE_QAM,
451 .frequency_stepsize = 62500, 490 .frequency_stepsize = 62500,
452 .frequency_min = 47000000, 491 .frequency_min = 47000000,
453 .frequency_max = 862000000, 492 .frequency_max = 862000000,
diff --git a/drivers/media/dvb/frontends/tda10023.c b/drivers/media/dvb/frontends/tda10023.c
index a3c34eecdee..ca1e0d54b69 100644
--- a/drivers/media/dvb/frontends/tda10023.c
+++ b/drivers/media/dvb/frontends/tda10023.c
@@ -298,42 +298,80 @@ static int tda10023_init (struct dvb_frontend *fe)
298 return 0; 298 return 0;
299} 299}
300 300
301static int tda10023_set_parameters (struct dvb_frontend *fe, 301struct qam_params {
302 struct dvb_frontend_parameters *p) 302 u8 qam, lockthr, mseth, aref, agcrefnyq, eragnyq_thd;
303};
304
305static int tda10023_set_parameters(struct dvb_frontend *fe)
303{ 306{
307 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
308 u32 delsys = c->delivery_system;
309 unsigned qam = c->modulation;
310 bool is_annex_c;
304 struct tda10023_state* state = fe->demodulator_priv; 311 struct tda10023_state* state = fe->demodulator_priv;
305 312 static const struct qam_params qam_params[] = {
306 static int qamvals[6][6] = { 313 /* Modulation QAM LOCKTHR MSETH AREF AGCREFNYQ ERAGCNYQ_THD */
307 // QAM LOCKTHR MSETH AREF AGCREFNYQ ERAGCNYQ_THD 314 [QPSK] = { (5<<2), 0x78, 0x8c, 0x96, 0x78, 0x4c },
308 { (5<<2), 0x78, 0x8c, 0x96, 0x78, 0x4c }, // 4 QAM 315 [QAM_16] = { (0<<2), 0x87, 0xa2, 0x91, 0x8c, 0x57 },
309 { (0<<2), 0x87, 0xa2, 0x91, 0x8c, 0x57 }, // 16 QAM 316 [QAM_32] = { (1<<2), 0x64, 0x74, 0x96, 0x8c, 0x57 },
310 { (1<<2), 0x64, 0x74, 0x96, 0x8c, 0x57 }, // 32 QAM 317 [QAM_64] = { (2<<2), 0x46, 0x43, 0x6a, 0x6a, 0x44 },
311 { (2<<2), 0x46, 0x43, 0x6a, 0x6a, 0x44 }, // 64 QAM 318 [QAM_128] = { (3<<2), 0x36, 0x34, 0x7e, 0x78, 0x4c },
312 { (3<<2), 0x36, 0x34, 0x7e, 0x78, 0x4c }, // 128 QAM 319 [QAM_256] = { (4<<2), 0x26, 0x23, 0x6c, 0x5c, 0x3c },
313 { (4<<2), 0x26, 0x23, 0x6c, 0x5c, 0x3c }, // 256 QAM
314 }; 320 };
315 321
316 int qam = p->u.qam.modulation; 322 switch (delsys) {
323 case SYS_DVBC_ANNEX_A:
324 is_annex_c = false;
325 break;
326 case SYS_DVBC_ANNEX_C:
327 is_annex_c = true;
328 break;
329 default:
330 return -EINVAL;
331 }
317 332
318 if (qam < 0 || qam > 5) 333 /*
334 * gcc optimizes the code bellow the same way as it would code:
335 * "if (qam > 5) return -EINVAL;"
336 * Yet, the code is clearer, as it shows what QAM standards are
337 * supported by the driver, and avoids the usage of magic numbers on
338 * it.
339 */
340 switch (qam) {
341 case QPSK:
342 case QAM_16:
343 case QAM_32:
344 case QAM_64:
345 case QAM_128:
346 case QAM_256:
347 break;
348 default:
319 return -EINVAL; 349 return -EINVAL;
350 }
320 351
321 if (fe->ops.tuner_ops.set_params) { 352 if (fe->ops.tuner_ops.set_params) {
322 fe->ops.tuner_ops.set_params(fe, p); 353 fe->ops.tuner_ops.set_params(fe);
323 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 354 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
324 } 355 }
325 356
326 tda10023_set_symbolrate (state, p->u.qam.symbol_rate); 357 tda10023_set_symbolrate(state, c->symbol_rate);
327 tda10023_writereg (state, 0x05, qamvals[qam][1]); 358 tda10023_writereg(state, 0x05, qam_params[qam].lockthr);
328 tda10023_writereg (state, 0x08, qamvals[qam][2]); 359 tda10023_writereg(state, 0x08, qam_params[qam].mseth);
329 tda10023_writereg (state, 0x09, qamvals[qam][3]); 360 tda10023_writereg(state, 0x09, qam_params[qam].aref);
330 tda10023_writereg (state, 0xb4, qamvals[qam][4]); 361 tda10023_writereg(state, 0xb4, qam_params[qam].agcrefnyq);
331 tda10023_writereg (state, 0xb6, qamvals[qam][5]); 362 tda10023_writereg(state, 0xb6, qam_params[qam].eragnyq_thd);
332 363#if 0
333// tda10023_writereg (state, 0x04, (p->inversion?0x12:0x32)); 364 tda10023_writereg(state, 0x04, (c->inversion ? 0x12 : 0x32));
334// tda10023_writebit (state, 0x04, 0x60, (p->inversion?0:0x20)); 365 tda10023_writebit(state, 0x04, 0x60, (c->inversion ? 0 : 0x20));
335 tda10023_writebit (state, 0x04, 0x40, 0x40); 366#endif
336 tda10023_setup_reg0 (state, qamvals[qam][0]); 367 tda10023_writebit(state, 0x04, 0x40, 0x40);
368
369 if (is_annex_c)
370 tda10023_writebit(state, 0x3d, 0xfc, 0x03);
371 else
372 tda10023_writebit(state, 0x3d, 0xfc, 0x02);
373
374 tda10023_setup_reg0(state, qam_params[qam].qam);
337 375
338 return 0; 376 return 0;
339} 377}
@@ -418,8 +456,9 @@ static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
418 return 0; 456 return 0;
419} 457}
420 458
421static int tda10023_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 459static int tda10023_get_frontend(struct dvb_frontend *fe)
422{ 460{
461 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
423 struct tda10023_state* state = fe->demodulator_priv; 462 struct tda10023_state* state = fe->demodulator_priv;
424 int sync,inv; 463 int sync,inv;
425 s8 afc = 0; 464 s8 afc = 0;
@@ -433,17 +472,17 @@ static int tda10023_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
433 printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" : 472 printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
434 "DVB: TDA10023(%d): [AFC (%d) %dHz]\n", 473 "DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
435 state->frontend.dvb->num, afc, 474 state->frontend.dvb->num, afc,
436 -((s32)p->u.qam.symbol_rate * afc) >> 10); 475 -((s32)p->symbol_rate * afc) >> 10);
437 } 476 }
438 477
439 p->inversion = (inv&0x20?0:1); 478 p->inversion = (inv&0x20?0:1);
440 p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16; 479 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
441 480
442 p->u.qam.fec_inner = FEC_NONE; 481 p->fec_inner = FEC_NONE;
443 p->frequency = ((p->frequency + 31250) / 62500) * 62500; 482 p->frequency = ((p->frequency + 31250) / 62500) * 62500;
444 483
445 if (sync & 2) 484 if (sync & 2)
446 p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10; 485 p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
447 486
448 return 0; 487 return 0;
449} 488}
@@ -534,10 +573,9 @@ error:
534} 573}
535 574
536static struct dvb_frontend_ops tda10023_ops = { 575static struct dvb_frontend_ops tda10023_ops = {
537 576 .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
538 .info = { 577 .info = {
539 .name = "Philips TDA10023 DVB-C", 578 .name = "Philips TDA10023 DVB-C",
540 .type = FE_QAM,
541 .frequency_stepsize = 62500, 579 .frequency_stepsize = 62500,
542 .frequency_min = 47000000, 580 .frequency_min = 47000000,
543 .frequency_max = 862000000, 581 .frequency_max = 862000000,
@@ -557,7 +595,6 @@ static struct dvb_frontend_ops tda10023_ops = {
557 595
558 .set_frontend = tda10023_set_parameters, 596 .set_frontend = tda10023_set_parameters,
559 .get_frontend = tda10023_get_frontend, 597 .get_frontend = tda10023_get_frontend,
560
561 .read_status = tda10023_read_status, 598 .read_status = tda10023_read_status,
562 .read_ber = tda10023_read_ber, 599 .read_ber = tda10023_read_ber,
563 .read_signal_strength = tda10023_read_signal_strength, 600 .read_signal_strength = tda10023_read_signal_strength,
diff --git a/drivers/media/dvb/frontends/tda10048.c b/drivers/media/dvb/frontends/tda10048.c
index 7f105946a43..71fb63299de 100644
--- a/drivers/media/dvb/frontends/tda10048.c
+++ b/drivers/media/dvb/frontends/tda10048.c
@@ -153,7 +153,7 @@ struct tda10048_state {
153 u32 pll_pfactor; 153 u32 pll_pfactor;
154 u32 sample_freq; 154 u32 sample_freq;
155 155
156 enum fe_bandwidth bandwidth; 156 u32 bandwidth;
157}; 157};
158 158
159static struct init_tab { 159static struct init_tab {
@@ -341,21 +341,14 @@ static int tda10048_set_wref(struct dvb_frontend *fe, u32 sample_freq_hz,
341{ 341{
342 struct tda10048_state *state = fe->demodulator_priv; 342 struct tda10048_state *state = fe->demodulator_priv;
343 u64 t, z; 343 u64 t, z;
344 u32 b = 8000000;
345 344
346 dprintk(1, "%s()\n", __func__); 345 dprintk(1, "%s()\n", __func__);
347 346
348 if (sample_freq_hz == 0) 347 if (sample_freq_hz == 0)
349 return -EINVAL; 348 return -EINVAL;
350 349
351 if (bw == BANDWIDTH_6_MHZ)
352 b = 6000000;
353 else
354 if (bw == BANDWIDTH_7_MHZ)
355 b = 7000000;
356
357 /* WREF = (B / (7 * fs)) * 2^31 */ 350 /* WREF = (B / (7 * fs)) * 2^31 */
358 t = b * 10; 351 t = bw * 10;
359 /* avoid warning: this decimal constant is unsigned only in ISO C90 */ 352 /* avoid warning: this decimal constant is unsigned only in ISO C90 */
360 /* t *= 2147483648 on 32bit platforms */ 353 /* t *= 2147483648 on 32bit platforms */
361 t *= (2048 * 1024); 354 t *= (2048 * 1024);
@@ -378,25 +371,18 @@ static int tda10048_set_invwref(struct dvb_frontend *fe, u32 sample_freq_hz,
378{ 371{
379 struct tda10048_state *state = fe->demodulator_priv; 372 struct tda10048_state *state = fe->demodulator_priv;
380 u64 t; 373 u64 t;
381 u32 b = 8000000;
382 374
383 dprintk(1, "%s()\n", __func__); 375 dprintk(1, "%s()\n", __func__);
384 376
385 if (sample_freq_hz == 0) 377 if (sample_freq_hz == 0)
386 return -EINVAL; 378 return -EINVAL;
387 379
388 if (bw == BANDWIDTH_6_MHZ)
389 b = 6000000;
390 else
391 if (bw == BANDWIDTH_7_MHZ)
392 b = 7000000;
393
394 /* INVWREF = ((7 * fs) / B) * 2^5 */ 380 /* INVWREF = ((7 * fs) / B) * 2^5 */
395 t = sample_freq_hz; 381 t = sample_freq_hz;
396 t *= 7; 382 t *= 7;
397 t *= 32; 383 t *= 32;
398 t *= 10; 384 t *= 10;
399 do_div(t, b); 385 do_div(t, bw);
400 t += 5; 386 t += 5;
401 do_div(t, 10); 387 do_div(t, 10);
402 388
@@ -407,16 +393,16 @@ static int tda10048_set_invwref(struct dvb_frontend *fe, u32 sample_freq_hz,
407} 393}
408 394
409static int tda10048_set_bandwidth(struct dvb_frontend *fe, 395static int tda10048_set_bandwidth(struct dvb_frontend *fe,
410 enum fe_bandwidth bw) 396 u32 bw)
411{ 397{
412 struct tda10048_state *state = fe->demodulator_priv; 398 struct tda10048_state *state = fe->demodulator_priv;
413 dprintk(1, "%s(bw=%d)\n", __func__, bw); 399 dprintk(1, "%s(bw=%d)\n", __func__, bw);
414 400
415 /* Bandwidth setting may need to be adjusted */ 401 /* Bandwidth setting may need to be adjusted */
416 switch (bw) { 402 switch (bw) {
417 case BANDWIDTH_6_MHZ: 403 case 6000000:
418 case BANDWIDTH_7_MHZ: 404 case 7000000:
419 case BANDWIDTH_8_MHZ: 405 case 8000000:
420 tda10048_set_wref(fe, state->sample_freq, bw); 406 tda10048_set_wref(fe, state->sample_freq, bw);
421 tda10048_set_invwref(fe, state->sample_freq, bw); 407 tda10048_set_invwref(fe, state->sample_freq, bw);
422 break; 408 break;
@@ -430,7 +416,7 @@ static int tda10048_set_bandwidth(struct dvb_frontend *fe,
430 return 0; 416 return 0;
431} 417}
432 418
433static int tda10048_set_if(struct dvb_frontend *fe, enum fe_bandwidth bw) 419static int tda10048_set_if(struct dvb_frontend *fe, u32 bw)
434{ 420{
435 struct tda10048_state *state = fe->demodulator_priv; 421 struct tda10048_state *state = fe->demodulator_priv;
436 struct tda10048_config *config = &state->config; 422 struct tda10048_config *config = &state->config;
@@ -441,13 +427,13 @@ static int tda10048_set_if(struct dvb_frontend *fe, enum fe_bandwidth bw)
441 427
442 /* based on target bandwidth and clk we calculate pll factors */ 428 /* based on target bandwidth and clk we calculate pll factors */
443 switch (bw) { 429 switch (bw) {
444 case BANDWIDTH_6_MHZ: 430 case 6000000:
445 if_freq_khz = config->dtv6_if_freq_khz; 431 if_freq_khz = config->dtv6_if_freq_khz;
446 break; 432 break;
447 case BANDWIDTH_7_MHZ: 433 case 7000000:
448 if_freq_khz = config->dtv7_if_freq_khz; 434 if_freq_khz = config->dtv7_if_freq_khz;
449 break; 435 break;
450 case BANDWIDTH_8_MHZ: 436 case 8000000:
451 if_freq_khz = config->dtv8_if_freq_khz; 437 if_freq_khz = config->dtv8_if_freq_khz;
452 break; 438 break;
453 default: 439 default:
@@ -601,7 +587,7 @@ static int tda10048_set_inversion(struct dvb_frontend *fe, int inversion)
601 587
602/* Retrieve the demod settings */ 588/* Retrieve the demod settings */
603static int tda10048_get_tps(struct tda10048_state *state, 589static int tda10048_get_tps(struct tda10048_state *state,
604 struct dvb_ofdm_parameters *p) 590 struct dtv_frontend_properties *p)
605{ 591{
606 u8 val; 592 u8 val;
607 593
@@ -612,27 +598,27 @@ static int tda10048_get_tps(struct tda10048_state *state,
612 val = tda10048_readreg(state, TDA10048_OUT_CONF2); 598 val = tda10048_readreg(state, TDA10048_OUT_CONF2);
613 switch ((val & 0x60) >> 5) { 599 switch ((val & 0x60) >> 5) {
614 case 0: 600 case 0:
615 p->constellation = QPSK; 601 p->modulation = QPSK;
616 break; 602 break;
617 case 1: 603 case 1:
618 p->constellation = QAM_16; 604 p->modulation = QAM_16;
619 break; 605 break;
620 case 2: 606 case 2:
621 p->constellation = QAM_64; 607 p->modulation = QAM_64;
622 break; 608 break;
623 } 609 }
624 switch ((val & 0x18) >> 3) { 610 switch ((val & 0x18) >> 3) {
625 case 0: 611 case 0:
626 p->hierarchy_information = HIERARCHY_NONE; 612 p->hierarchy = HIERARCHY_NONE;
627 break; 613 break;
628 case 1: 614 case 1:
629 p->hierarchy_information = HIERARCHY_1; 615 p->hierarchy = HIERARCHY_1;
630 break; 616 break;
631 case 2: 617 case 2:
632 p->hierarchy_information = HIERARCHY_2; 618 p->hierarchy = HIERARCHY_2;
633 break; 619 break;
634 case 3: 620 case 3:
635 p->hierarchy_information = HIERARCHY_4; 621 p->hierarchy = HIERARCHY_4;
636 break; 622 break;
637 } 623 }
638 switch (val & 0x07) { 624 switch (val & 0x07) {
@@ -738,17 +724,17 @@ static int tda10048_output_mode(struct dvb_frontend *fe, int serial)
738 724
739/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ 725/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
740/* TODO: Support manual tuning with specific params */ 726/* TODO: Support manual tuning with specific params */
741static int tda10048_set_frontend(struct dvb_frontend *fe, 727static int tda10048_set_frontend(struct dvb_frontend *fe)
742 struct dvb_frontend_parameters *p)
743{ 728{
729 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
744 struct tda10048_state *state = fe->demodulator_priv; 730 struct tda10048_state *state = fe->demodulator_priv;
745 731
746 dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency); 732 dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
747 733
748 /* Update the I/F pll's if the bandwidth changes */ 734 /* Update the I/F pll's if the bandwidth changes */
749 if (p->u.ofdm.bandwidth != state->bandwidth) { 735 if (p->bandwidth_hz != state->bandwidth) {
750 tda10048_set_if(fe, p->u.ofdm.bandwidth); 736 tda10048_set_if(fe, p->bandwidth_hz);
751 tda10048_set_bandwidth(fe, p->u.ofdm.bandwidth); 737 tda10048_set_bandwidth(fe, p->bandwidth_hz);
752 } 738 }
753 739
754 if (fe->ops.tuner_ops.set_params) { 740 if (fe->ops.tuner_ops.set_params) {
@@ -756,7 +742,7 @@ static int tda10048_set_frontend(struct dvb_frontend *fe,
756 if (fe->ops.i2c_gate_ctrl) 742 if (fe->ops.i2c_gate_ctrl)
757 fe->ops.i2c_gate_ctrl(fe, 1); 743 fe->ops.i2c_gate_ctrl(fe, 1);
758 744
759 fe->ops.tuner_ops.set_params(fe, p); 745 fe->ops.tuner_ops.set_params(fe);
760 746
761 if (fe->ops.i2c_gate_ctrl) 747 if (fe->ops.i2c_gate_ctrl)
762 fe->ops.i2c_gate_ctrl(fe, 0); 748 fe->ops.i2c_gate_ctrl(fe, 0);
@@ -797,8 +783,8 @@ static int tda10048_init(struct dvb_frontend *fe)
797 tda10048_set_inversion(fe, config->inversion); 783 tda10048_set_inversion(fe, config->inversion);
798 784
799 /* Establish default RF values */ 785 /* Establish default RF values */
800 tda10048_set_if(fe, BANDWIDTH_8_MHZ); 786 tda10048_set_if(fe, 8000000);
801 tda10048_set_bandwidth(fe, BANDWIDTH_8_MHZ); 787 tda10048_set_bandwidth(fe, 8000000);
802 788
803 /* Ensure we leave the gate closed */ 789 /* Ensure we leave the gate closed */
804 tda10048_i2c_gate_ctrl(fe, 0); 790 tda10048_i2c_gate_ctrl(fe, 0);
@@ -1042,9 +1028,9 @@ static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1042 return 0; 1028 return 0;
1043} 1029}
1044 1030
1045static int tda10048_get_frontend(struct dvb_frontend *fe, 1031static int tda10048_get_frontend(struct dvb_frontend *fe)
1046 struct dvb_frontend_parameters *p)
1047{ 1032{
1033 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1048 struct tda10048_state *state = fe->demodulator_priv; 1034 struct tda10048_state *state = fe->demodulator_priv;
1049 1035
1050 dprintk(1, "%s()\n", __func__); 1036 dprintk(1, "%s()\n", __func__);
@@ -1052,7 +1038,7 @@ static int tda10048_get_frontend(struct dvb_frontend *fe,
1052 p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1) 1038 p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1)
1053 & 0x20 ? INVERSION_ON : INVERSION_OFF; 1039 & 0x20 ? INVERSION_ON : INVERSION_OFF;
1054 1040
1055 return tda10048_get_tps(state, &p->u.ofdm); 1041 return tda10048_get_tps(state, p);
1056} 1042}
1057 1043
1058static int tda10048_get_tune_settings(struct dvb_frontend *fe, 1044static int tda10048_get_tune_settings(struct dvb_frontend *fe,
@@ -1126,7 +1112,7 @@ struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
1126 memcpy(&state->config, config, sizeof(*config)); 1112 memcpy(&state->config, config, sizeof(*config));
1127 state->i2c = i2c; 1113 state->i2c = i2c;
1128 state->fwloaded = config->no_firmware; 1114 state->fwloaded = config->no_firmware;
1129 state->bandwidth = BANDWIDTH_8_MHZ; 1115 state->bandwidth = 8000000;
1130 1116
1131 /* check if the demod is present */ 1117 /* check if the demod is present */
1132 if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048) 1118 if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
@@ -1152,11 +1138,11 @@ struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
1152 tda10048_establish_defaults(&state->frontend); 1138 tda10048_establish_defaults(&state->frontend);
1153 1139
1154 /* Set the xtal and freq defaults */ 1140 /* Set the xtal and freq defaults */
1155 if (tda10048_set_if(&state->frontend, BANDWIDTH_8_MHZ) != 0) 1141 if (tda10048_set_if(&state->frontend, 8000000) != 0)
1156 goto error; 1142 goto error;
1157 1143
1158 /* Default bandwidth */ 1144 /* Default bandwidth */
1159 if (tda10048_set_bandwidth(&state->frontend, BANDWIDTH_8_MHZ) != 0) 1145 if (tda10048_set_bandwidth(&state->frontend, 8000000) != 0)
1160 goto error; 1146 goto error;
1161 1147
1162 /* Leave the gate closed */ 1148 /* Leave the gate closed */
@@ -1171,10 +1157,9 @@ error:
1171EXPORT_SYMBOL(tda10048_attach); 1157EXPORT_SYMBOL(tda10048_attach);
1172 1158
1173static struct dvb_frontend_ops tda10048_ops = { 1159static struct dvb_frontend_ops tda10048_ops = {
1174 1160 .delsys = { SYS_DVBT },
1175 .info = { 1161 .info = {
1176 .name = "NXP TDA10048HN DVB-T", 1162 .name = "NXP TDA10048HN DVB-T",
1177 .type = FE_OFDM,
1178 .frequency_min = 177000000, 1163 .frequency_min = 177000000,
1179 .frequency_max = 858000000, 1164 .frequency_max = 858000000,
1180 .frequency_stepsize = 166666, 1165 .frequency_stepsize = 166666,
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c
index ea485d92355..ae6f22aae67 100644
--- a/drivers/media/dvb/frontends/tda1004x.c
+++ b/drivers/media/dvb/frontends/tda1004x.c
@@ -224,22 +224,22 @@ static int tda1004x_disable_tuner_i2c(struct tda1004x_state *state)
224} 224}
225 225
226static int tda10045h_set_bandwidth(struct tda1004x_state *state, 226static int tda10045h_set_bandwidth(struct tda1004x_state *state,
227 fe_bandwidth_t bandwidth) 227 u32 bandwidth)
228{ 228{
229 static u8 bandwidth_6mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x60, 0x1e, 0xa7, 0x45, 0x4f }; 229 static u8 bandwidth_6mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x60, 0x1e, 0xa7, 0x45, 0x4f };
230 static u8 bandwidth_7mhz[] = { 0x02, 0x00, 0x37, 0x00, 0x4a, 0x2f, 0x6d, 0x76, 0xdb }; 230 static u8 bandwidth_7mhz[] = { 0x02, 0x00, 0x37, 0x00, 0x4a, 0x2f, 0x6d, 0x76, 0xdb };
231 static u8 bandwidth_8mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x48, 0x17, 0x89, 0xc7, 0x14 }; 231 static u8 bandwidth_8mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x48, 0x17, 0x89, 0xc7, 0x14 };
232 232
233 switch (bandwidth) { 233 switch (bandwidth) {
234 case BANDWIDTH_6_MHZ: 234 case 6000000:
235 tda1004x_write_buf(state, TDA10045H_CONFPLL_P, bandwidth_6mhz, sizeof(bandwidth_6mhz)); 235 tda1004x_write_buf(state, TDA10045H_CONFPLL_P, bandwidth_6mhz, sizeof(bandwidth_6mhz));
236 break; 236 break;
237 237
238 case BANDWIDTH_7_MHZ: 238 case 7000000:
239 tda1004x_write_buf(state, TDA10045H_CONFPLL_P, bandwidth_7mhz, sizeof(bandwidth_7mhz)); 239 tda1004x_write_buf(state, TDA10045H_CONFPLL_P, bandwidth_7mhz, sizeof(bandwidth_7mhz));
240 break; 240 break;
241 241
242 case BANDWIDTH_8_MHZ: 242 case 8000000:
243 tda1004x_write_buf(state, TDA10045H_CONFPLL_P, bandwidth_8mhz, sizeof(bandwidth_8mhz)); 243 tda1004x_write_buf(state, TDA10045H_CONFPLL_P, bandwidth_8mhz, sizeof(bandwidth_8mhz));
244 break; 244 break;
245 245
@@ -253,7 +253,7 @@ static int tda10045h_set_bandwidth(struct tda1004x_state *state,
253} 253}
254 254
255static int tda10046h_set_bandwidth(struct tda1004x_state *state, 255static int tda10046h_set_bandwidth(struct tda1004x_state *state,
256 fe_bandwidth_t bandwidth) 256 u32 bandwidth)
257{ 257{
258 static u8 bandwidth_6mhz_53M[] = { 0x7b, 0x2e, 0x11, 0xf0, 0xd2 }; 258 static u8 bandwidth_6mhz_53M[] = { 0x7b, 0x2e, 0x11, 0xf0, 0xd2 };
259 static u8 bandwidth_7mhz_53M[] = { 0x6a, 0x02, 0x6a, 0x43, 0x9f }; 259 static u8 bandwidth_7mhz_53M[] = { 0x6a, 0x02, 0x6a, 0x43, 0x9f };
@@ -270,7 +270,7 @@ static int tda10046h_set_bandwidth(struct tda1004x_state *state,
270 else 270 else
271 tda10046_clk53m = 1; 271 tda10046_clk53m = 1;
272 switch (bandwidth) { 272 switch (bandwidth) {
273 case BANDWIDTH_6_MHZ: 273 case 6000000:
274 if (tda10046_clk53m) 274 if (tda10046_clk53m)
275 tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz_53M, 275 tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz_53M,
276 sizeof(bandwidth_6mhz_53M)); 276 sizeof(bandwidth_6mhz_53M));
@@ -283,7 +283,7 @@ static int tda10046h_set_bandwidth(struct tda1004x_state *state,
283 } 283 }
284 break; 284 break;
285 285
286 case BANDWIDTH_7_MHZ: 286 case 7000000:
287 if (tda10046_clk53m) 287 if (tda10046_clk53m)
288 tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz_53M, 288 tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz_53M,
289 sizeof(bandwidth_7mhz_53M)); 289 sizeof(bandwidth_7mhz_53M));
@@ -296,7 +296,7 @@ static int tda10046h_set_bandwidth(struct tda1004x_state *state,
296 } 296 }
297 break; 297 break;
298 298
299 case BANDWIDTH_8_MHZ: 299 case 8000000:
300 if (tda10046_clk53m) 300 if (tda10046_clk53m)
301 tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz_53M, 301 tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz_53M,
302 sizeof(bandwidth_8mhz_53M)); 302 sizeof(bandwidth_8mhz_53M));
@@ -409,7 +409,7 @@ static int tda10045_fwupload(struct dvb_frontend* fe)
409 msleep(10); 409 msleep(10);
410 410
411 /* set parameters */ 411 /* set parameters */
412 tda10045h_set_bandwidth(state, BANDWIDTH_8_MHZ); 412 tda10045h_set_bandwidth(state, 8000000);
413 413
414 ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10045H_FWPAGE, TDA10045H_CODE_IN); 414 ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10045H_FWPAGE, TDA10045H_CODE_IN);
415 release_firmware(fw); 415 release_firmware(fw);
@@ -473,7 +473,7 @@ static void tda10046_init_plls(struct dvb_frontend* fe)
473 tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x3f); 473 tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x3f);
474 break; 474 break;
475 } 475 }
476 tda10046h_set_bandwidth(state, BANDWIDTH_8_MHZ); // default bandwidth 8 MHz 476 tda10046h_set_bandwidth(state, 8000000); /* default bandwidth 8 MHz */
477 /* let the PLLs settle */ 477 /* let the PLLs settle */
478 msleep(120); 478 msleep(120);
479} 479}
@@ -697,9 +697,9 @@ static int tda10046_init(struct dvb_frontend* fe)
697 return 0; 697 return 0;
698} 698}
699 699
700static int tda1004x_set_fe(struct dvb_frontend* fe, 700static int tda1004x_set_fe(struct dvb_frontend *fe)
701 struct dvb_frontend_parameters *fe_params)
702{ 701{
702 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
703 struct tda1004x_state* state = fe->demodulator_priv; 703 struct tda1004x_state* state = fe->demodulator_priv;
704 int tmp; 704 int tmp;
705 int inversion; 705 int inversion;
@@ -718,7 +718,7 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
718 718
719 // set frequency 719 // set frequency
720 if (fe->ops.tuner_ops.set_params) { 720 if (fe->ops.tuner_ops.set_params) {
721 fe->ops.tuner_ops.set_params(fe, fe_params); 721 fe->ops.tuner_ops.set_params(fe);
722 if (fe->ops.i2c_gate_ctrl) 722 if (fe->ops.i2c_gate_ctrl)
723 fe->ops.i2c_gate_ctrl(fe, 0); 723 fe->ops.i2c_gate_ctrl(fe, 0);
724 } 724 }
@@ -726,37 +726,37 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
726 // Hardcoded to use auto as much as possible on the TDA10045 as it 726 // Hardcoded to use auto as much as possible on the TDA10045 as it
727 // is very unreliable if AUTO mode is _not_ used. 727 // is very unreliable if AUTO mode is _not_ used.
728 if (state->demod_type == TDA1004X_DEMOD_TDA10045) { 728 if (state->demod_type == TDA1004X_DEMOD_TDA10045) {
729 fe_params->u.ofdm.code_rate_HP = FEC_AUTO; 729 fe_params->code_rate_HP = FEC_AUTO;
730 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO; 730 fe_params->guard_interval = GUARD_INTERVAL_AUTO;
731 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO; 731 fe_params->transmission_mode = TRANSMISSION_MODE_AUTO;
732 } 732 }
733 733
734 // Set standard params.. or put them to auto 734 // Set standard params.. or put them to auto
735 if ((fe_params->u.ofdm.code_rate_HP == FEC_AUTO) || 735 if ((fe_params->code_rate_HP == FEC_AUTO) ||
736 (fe_params->u.ofdm.code_rate_LP == FEC_AUTO) || 736 (fe_params->code_rate_LP == FEC_AUTO) ||
737 (fe_params->u.ofdm.constellation == QAM_AUTO) || 737 (fe_params->modulation == QAM_AUTO) ||
738 (fe_params->u.ofdm.hierarchy_information == HIERARCHY_AUTO)) { 738 (fe_params->hierarchy == HIERARCHY_AUTO)) {
739 tda1004x_write_mask(state, TDA1004X_AUTO, 1, 1); // enable auto 739 tda1004x_write_mask(state, TDA1004X_AUTO, 1, 1); // enable auto
740 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x03, 0); // turn off constellation bits 740 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x03, 0); /* turn off modulation bits */
741 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x60, 0); // turn off hierarchy bits 741 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x60, 0); // turn off hierarchy bits
742 tda1004x_write_mask(state, TDA1004X_IN_CONF2, 0x3f, 0); // turn off FEC bits 742 tda1004x_write_mask(state, TDA1004X_IN_CONF2, 0x3f, 0); // turn off FEC bits
743 } else { 743 } else {
744 tda1004x_write_mask(state, TDA1004X_AUTO, 1, 0); // disable auto 744 tda1004x_write_mask(state, TDA1004X_AUTO, 1, 0); // disable auto
745 745
746 // set HP FEC 746 // set HP FEC
747 tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_HP); 747 tmp = tda1004x_encode_fec(fe_params->code_rate_HP);
748 if (tmp < 0) 748 if (tmp < 0)
749 return tmp; 749 return tmp;
750 tda1004x_write_mask(state, TDA1004X_IN_CONF2, 7, tmp); 750 tda1004x_write_mask(state, TDA1004X_IN_CONF2, 7, tmp);
751 751
752 // set LP FEC 752 // set LP FEC
753 tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_LP); 753 tmp = tda1004x_encode_fec(fe_params->code_rate_LP);
754 if (tmp < 0) 754 if (tmp < 0)
755 return tmp; 755 return tmp;
756 tda1004x_write_mask(state, TDA1004X_IN_CONF2, 0x38, tmp << 3); 756 tda1004x_write_mask(state, TDA1004X_IN_CONF2, 0x38, tmp << 3);
757 757
758 // set constellation 758 /* set modulation */
759 switch (fe_params->u.ofdm.constellation) { 759 switch (fe_params->modulation) {
760 case QPSK: 760 case QPSK:
761 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 3, 0); 761 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 3, 0);
762 break; 762 break;
@@ -774,7 +774,7 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
774 } 774 }
775 775
776 // set hierarchy 776 // set hierarchy
777 switch (fe_params->u.ofdm.hierarchy_information) { 777 switch (fe_params->hierarchy) {
778 case HIERARCHY_NONE: 778 case HIERARCHY_NONE:
779 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x60, 0 << 5); 779 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x60, 0 << 5);
780 break; 780 break;
@@ -799,11 +799,11 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
799 // set bandwidth 799 // set bandwidth
800 switch (state->demod_type) { 800 switch (state->demod_type) {
801 case TDA1004X_DEMOD_TDA10045: 801 case TDA1004X_DEMOD_TDA10045:
802 tda10045h_set_bandwidth(state, fe_params->u.ofdm.bandwidth); 802 tda10045h_set_bandwidth(state, fe_params->bandwidth_hz);
803 break; 803 break;
804 804
805 case TDA1004X_DEMOD_TDA10046: 805 case TDA1004X_DEMOD_TDA10046:
806 tda10046h_set_bandwidth(state, fe_params->u.ofdm.bandwidth); 806 tda10046h_set_bandwidth(state, fe_params->bandwidth_hz);
807 break; 807 break;
808 } 808 }
809 809
@@ -825,7 +825,7 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
825 } 825 }
826 826
827 // set guard interval 827 // set guard interval
828 switch (fe_params->u.ofdm.guard_interval) { 828 switch (fe_params->guard_interval) {
829 case GUARD_INTERVAL_1_32: 829 case GUARD_INTERVAL_1_32:
830 tda1004x_write_mask(state, TDA1004X_AUTO, 2, 0); 830 tda1004x_write_mask(state, TDA1004X_AUTO, 2, 0);
831 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x0c, 0 << 2); 831 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
@@ -856,7 +856,7 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
856 } 856 }
857 857
858 // set transmission mode 858 // set transmission mode
859 switch (fe_params->u.ofdm.transmission_mode) { 859 switch (fe_params->transmission_mode) {
860 case TRANSMISSION_MODE_2K: 860 case TRANSMISSION_MODE_2K:
861 tda1004x_write_mask(state, TDA1004X_AUTO, 4, 0); 861 tda1004x_write_mask(state, TDA1004X_AUTO, 4, 0);
862 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x10, 0 << 4); 862 tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x10, 0 << 4);
@@ -895,8 +895,9 @@ static int tda1004x_set_fe(struct dvb_frontend* fe,
895 return 0; 895 return 0;
896} 896}
897 897
898static int tda1004x_get_fe(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params) 898static int tda1004x_get_fe(struct dvb_frontend *fe)
899{ 899{
900 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
900 struct tda1004x_state* state = fe->demodulator_priv; 901 struct tda1004x_state* state = fe->demodulator_priv;
901 902
902 dprintk("%s\n", __func__); 903 dprintk("%s\n", __func__);
@@ -913,13 +914,13 @@ static int tda1004x_get_fe(struct dvb_frontend* fe, struct dvb_frontend_paramete
913 case TDA1004X_DEMOD_TDA10045: 914 case TDA1004X_DEMOD_TDA10045:
914 switch (tda1004x_read_byte(state, TDA10045H_WREF_LSB)) { 915 switch (tda1004x_read_byte(state, TDA10045H_WREF_LSB)) {
915 case 0x14: 916 case 0x14:
916 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 917 fe_params->bandwidth_hz = 8000000;
917 break; 918 break;
918 case 0xdb: 919 case 0xdb:
919 fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ; 920 fe_params->bandwidth_hz = 7000000;
920 break; 921 break;
921 case 0x4f: 922 case 0x4f:
922 fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; 923 fe_params->bandwidth_hz = 6000000;
923 break; 924 break;
924 } 925 }
925 break; 926 break;
@@ -927,73 +928,73 @@ static int tda1004x_get_fe(struct dvb_frontend* fe, struct dvb_frontend_paramete
927 switch (tda1004x_read_byte(state, TDA10046H_TIME_WREF1)) { 928 switch (tda1004x_read_byte(state, TDA10046H_TIME_WREF1)) {
928 case 0x5c: 929 case 0x5c:
929 case 0x54: 930 case 0x54:
930 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; 931 fe_params->bandwidth_hz = 8000000;
931 break; 932 break;
932 case 0x6a: 933 case 0x6a:
933 case 0x60: 934 case 0x60:
934 fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ; 935 fe_params->bandwidth_hz = 7000000;
935 break; 936 break;
936 case 0x7b: 937 case 0x7b:
937 case 0x70: 938 case 0x70:
938 fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; 939 fe_params->bandwidth_hz = 6000000;
939 break; 940 break;
940 } 941 }
941 break; 942 break;
942 } 943 }
943 944
944 // FEC 945 // FEC
945 fe_params->u.ofdm.code_rate_HP = 946 fe_params->code_rate_HP =
946 tda1004x_decode_fec(tda1004x_read_byte(state, TDA1004X_OUT_CONF2) & 7); 947 tda1004x_decode_fec(tda1004x_read_byte(state, TDA1004X_OUT_CONF2) & 7);
947 fe_params->u.ofdm.code_rate_LP = 948 fe_params->code_rate_LP =
948 tda1004x_decode_fec((tda1004x_read_byte(state, TDA1004X_OUT_CONF2) >> 3) & 7); 949 tda1004x_decode_fec((tda1004x_read_byte(state, TDA1004X_OUT_CONF2) >> 3) & 7);
949 950
950 // constellation 951 /* modulation */
951 switch (tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 3) { 952 switch (tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 3) {
952 case 0: 953 case 0:
953 fe_params->u.ofdm.constellation = QPSK; 954 fe_params->modulation = QPSK;
954 break; 955 break;
955 case 1: 956 case 1:
956 fe_params->u.ofdm.constellation = QAM_16; 957 fe_params->modulation = QAM_16;
957 break; 958 break;
958 case 2: 959 case 2:
959 fe_params->u.ofdm.constellation = QAM_64; 960 fe_params->modulation = QAM_64;
960 break; 961 break;
961 } 962 }
962 963
963 // transmission mode 964 // transmission mode
964 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; 965 fe_params->transmission_mode = TRANSMISSION_MODE_2K;
965 if (tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 0x10) 966 if (tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 0x10)
966 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; 967 fe_params->transmission_mode = TRANSMISSION_MODE_8K;
967 968
968 // guard interval 969 // guard interval
969 switch ((tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 0x0c) >> 2) { 970 switch ((tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 0x0c) >> 2) {
970 case 0: 971 case 0:
971 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; 972 fe_params->guard_interval = GUARD_INTERVAL_1_32;
972 break; 973 break;
973 case 1: 974 case 1:
974 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; 975 fe_params->guard_interval = GUARD_INTERVAL_1_16;
975 break; 976 break;
976 case 2: 977 case 2:
977 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; 978 fe_params->guard_interval = GUARD_INTERVAL_1_8;
978 break; 979 break;
979 case 3: 980 case 3:
980 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; 981 fe_params->guard_interval = GUARD_INTERVAL_1_4;
981 break; 982 break;
982 } 983 }
983 984
984 // hierarchy 985 // hierarchy
985 switch ((tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 0x60) >> 5) { 986 switch ((tda1004x_read_byte(state, TDA1004X_OUT_CONF1) & 0x60) >> 5) {
986 case 0: 987 case 0:
987 fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE; 988 fe_params->hierarchy = HIERARCHY_NONE;
988 break; 989 break;
989 case 1: 990 case 1:
990 fe_params->u.ofdm.hierarchy_information = HIERARCHY_1; 991 fe_params->hierarchy = HIERARCHY_1;
991 break; 992 break;
992 case 2: 993 case 2:
993 fe_params->u.ofdm.hierarchy_information = HIERARCHY_2; 994 fe_params->hierarchy = HIERARCHY_2;
994 break; 995 break;
995 case 3: 996 case 3:
996 fe_params->u.ofdm.hierarchy_information = HIERARCHY_4; 997 fe_params->hierarchy = HIERARCHY_4;
997 break; 998 break;
998 } 999 }
999 1000
@@ -1231,9 +1232,9 @@ static void tda1004x_release(struct dvb_frontend* fe)
1231} 1232}
1232 1233
1233static struct dvb_frontend_ops tda10045_ops = { 1234static struct dvb_frontend_ops tda10045_ops = {
1235 .delsys = { SYS_DVBT },
1234 .info = { 1236 .info = {
1235 .name = "Philips TDA10045H DVB-T", 1237 .name = "Philips TDA10045H DVB-T",
1236 .type = FE_OFDM,
1237 .frequency_min = 51000000, 1238 .frequency_min = 51000000,
1238 .frequency_max = 858000000, 1239 .frequency_max = 858000000,
1239 .frequency_stepsize = 166667, 1240 .frequency_stepsize = 166667,
@@ -1301,9 +1302,9 @@ struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config,
1301} 1302}
1302 1303
1303static struct dvb_frontend_ops tda10046_ops = { 1304static struct dvb_frontend_ops tda10046_ops = {
1305 .delsys = { SYS_DVBT },
1304 .info = { 1306 .info = {
1305 .name = "Philips TDA10046H DVB-T", 1307 .name = "Philips TDA10046H DVB-T",
1306 .type = FE_OFDM,
1307 .frequency_min = 51000000, 1308 .frequency_min = 51000000,
1308 .frequency_max = 858000000, 1309 .frequency_max = 858000000,
1309 .frequency_stepsize = 166667, 1310 .frequency_stepsize = 166667,
diff --git a/drivers/media/dvb/frontends/tda10071.c b/drivers/media/dvb/frontends/tda10071.c
index 0c37434d19e..a9920502675 100644
--- a/drivers/media/dvb/frontends/tda10071.c
+++ b/drivers/media/dvb/frontends/tda10071.c
@@ -636,8 +636,7 @@ error:
636 return ret; 636 return ret;
637} 637}
638 638
639static int tda10071_set_frontend(struct dvb_frontend *fe, 639static int tda10071_set_frontend(struct dvb_frontend *fe)
640 struct dvb_frontend_parameters *params)
641{ 640{
642 struct tda10071_priv *priv = fe->demodulator_priv; 641 struct tda10071_priv *priv = fe->demodulator_priv;
643 struct tda10071_cmd cmd; 642 struct tda10071_cmd cmd;
@@ -777,8 +776,7 @@ error:
777 return ret; 776 return ret;
778} 777}
779 778
780static int tda10071_get_frontend(struct dvb_frontend *fe, 779static int tda10071_get_frontend(struct dvb_frontend *fe)
781 struct dvb_frontend_parameters *p)
782{ 780{
783 struct tda10071_priv *priv = fe->demodulator_priv; 781 struct tda10071_priv *priv = fe->demodulator_priv;
784 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 782 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
@@ -1217,9 +1215,9 @@ error:
1217EXPORT_SYMBOL(tda10071_attach); 1215EXPORT_SYMBOL(tda10071_attach);
1218 1216
1219static struct dvb_frontend_ops tda10071_ops = { 1217static struct dvb_frontend_ops tda10071_ops = {
1218 .delsys = { SYS_DVBT, SYS_DVBT2 },
1220 .info = { 1219 .info = {
1221 .name = "NXP TDA10071", 1220 .name = "NXP TDA10071",
1222 .type = FE_QPSK,
1223 .frequency_min = 950000, 1221 .frequency_min = 950000,
1224 .frequency_max = 2150000, 1222 .frequency_max = 2150000,
1225 .frequency_tolerance = 5000, 1223 .frequency_tolerance = 5000,
diff --git a/drivers/media/dvb/frontends/tda10086.c b/drivers/media/dvb/frontends/tda10086.c
index f2c8faac6f3..fcfe2e080cb 100644
--- a/drivers/media/dvb/frontends/tda10086.c
+++ b/drivers/media/dvb/frontends/tda10086.c
@@ -267,7 +267,7 @@ static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minic
267} 267}
268 268
269static int tda10086_set_inversion(struct tda10086_state *state, 269static int tda10086_set_inversion(struct tda10086_state *state,
270 struct dvb_frontend_parameters *fe_params) 270 struct dtv_frontend_properties *fe_params)
271{ 271{
272 u8 invval = 0x80; 272 u8 invval = 0x80;
273 273
@@ -292,7 +292,7 @@ static int tda10086_set_inversion(struct tda10086_state *state,
292} 292}
293 293
294static int tda10086_set_symbol_rate(struct tda10086_state *state, 294static int tda10086_set_symbol_rate(struct tda10086_state *state,
295 struct dvb_frontend_parameters *fe_params) 295 struct dtv_frontend_properties *fe_params)
296{ 296{
297 u8 dfn = 0; 297 u8 dfn = 0;
298 u8 afs = 0; 298 u8 afs = 0;
@@ -303,7 +303,7 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
303 u32 tmp; 303 u32 tmp;
304 u32 bdr; 304 u32 bdr;
305 u32 bdri; 305 u32 bdri;
306 u32 symbol_rate = fe_params->u.qpsk.symbol_rate; 306 u32 symbol_rate = fe_params->symbol_rate;
307 307
308 dprintk ("%s %i\n", __func__, symbol_rate); 308 dprintk ("%s %i\n", __func__, symbol_rate);
309 309
@@ -367,13 +367,13 @@ static int tda10086_set_symbol_rate(struct tda10086_state *state,
367} 367}
368 368
369static int tda10086_set_fec(struct tda10086_state *state, 369static int tda10086_set_fec(struct tda10086_state *state,
370 struct dvb_frontend_parameters *fe_params) 370 struct dtv_frontend_properties *fe_params)
371{ 371{
372 u8 fecval; 372 u8 fecval;
373 373
374 dprintk ("%s %i\n", __func__, fe_params->u.qpsk.fec_inner); 374 dprintk("%s %i\n", __func__, fe_params->fec_inner);
375 375
376 switch(fe_params->u.qpsk.fec_inner) { 376 switch (fe_params->fec_inner) {
377 case FEC_1_2: 377 case FEC_1_2:
378 fecval = 0x00; 378 fecval = 0x00;
379 break; 379 break;
@@ -409,9 +409,9 @@ static int tda10086_set_fec(struct tda10086_state *state,
409 return 0; 409 return 0;
410} 410}
411 411
412static int tda10086_set_frontend(struct dvb_frontend* fe, 412static int tda10086_set_frontend(struct dvb_frontend *fe)
413 struct dvb_frontend_parameters *fe_params)
414{ 413{
414 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
415 struct tda10086_state *state = fe->demodulator_priv; 415 struct tda10086_state *state = fe->demodulator_priv;
416 int ret; 416 int ret;
417 u32 freq = 0; 417 u32 freq = 0;
@@ -425,7 +425,7 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
425 425
426 /* set params */ 426 /* set params */
427 if (fe->ops.tuner_ops.set_params) { 427 if (fe->ops.tuner_ops.set_params) {
428 fe->ops.tuner_ops.set_params(fe, fe_params); 428 fe->ops.tuner_ops.set_params(fe);
429 if (fe->ops.i2c_gate_ctrl) 429 if (fe->ops.i2c_gate_ctrl)
430 fe->ops.i2c_gate_ctrl(fe, 0); 430 fe->ops.i2c_gate_ctrl(fe, 0);
431 431
@@ -452,13 +452,14 @@ static int tda10086_set_frontend(struct dvb_frontend* fe,
452 tda10086_write_mask(state, 0x10, 0x40, 0x40); 452 tda10086_write_mask(state, 0x10, 0x40, 0x40);
453 tda10086_write_mask(state, 0x00, 0x01, 0x00); 453 tda10086_write_mask(state, 0x00, 0x01, 0x00);
454 454
455 state->symbol_rate = fe_params->u.qpsk.symbol_rate; 455 state->symbol_rate = fe_params->symbol_rate;
456 state->frequency = fe_params->frequency; 456 state->frequency = fe_params->frequency;
457 return 0; 457 return 0;
458} 458}
459 459
460static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params) 460static int tda10086_get_frontend(struct dvb_frontend *fe)
461{ 461{
462 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
462 struct tda10086_state* state = fe->demodulator_priv; 463 struct tda10086_state* state = fe->demodulator_priv;
463 u8 val; 464 u8 val;
464 int tmp; 465 int tmp;
@@ -467,7 +468,7 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
467 dprintk ("%s\n", __func__); 468 dprintk ("%s\n", __func__);
468 469
469 /* check for invalid symbol rate */ 470 /* check for invalid symbol rate */
470 if (fe_params->u.qpsk.symbol_rate < 500000) 471 if (fe_params->symbol_rate < 500000)
471 return -EINVAL; 472 return -EINVAL;
472 473
473 /* calculate the updated frequency (note: we convert from Hz->kHz) */ 474 /* calculate the updated frequency (note: we convert from Hz->kHz) */
@@ -516,34 +517,34 @@ static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
516 tmp |= 0xffffff00; 517 tmp |= 0xffffff00;
517 tmp = (tmp * 480 * (1<<1)) / 128; 518 tmp = (tmp * 480 * (1<<1)) / 128;
518 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000); 519 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
519 fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp; 520 fe_params->symbol_rate = state->symbol_rate + tmp;
520 521
521 /* the FEC */ 522 /* the FEC */
522 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4; 523 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
523 switch(val) { 524 switch(val) {
524 case 0x00: 525 case 0x00:
525 fe_params->u.qpsk.fec_inner = FEC_1_2; 526 fe_params->fec_inner = FEC_1_2;
526 break; 527 break;
527 case 0x01: 528 case 0x01:
528 fe_params->u.qpsk.fec_inner = FEC_2_3; 529 fe_params->fec_inner = FEC_2_3;
529 break; 530 break;
530 case 0x02: 531 case 0x02:
531 fe_params->u.qpsk.fec_inner = FEC_3_4; 532 fe_params->fec_inner = FEC_3_4;
532 break; 533 break;
533 case 0x03: 534 case 0x03:
534 fe_params->u.qpsk.fec_inner = FEC_4_5; 535 fe_params->fec_inner = FEC_4_5;
535 break; 536 break;
536 case 0x04: 537 case 0x04:
537 fe_params->u.qpsk.fec_inner = FEC_5_6; 538 fe_params->fec_inner = FEC_5_6;
538 break; 539 break;
539 case 0x05: 540 case 0x05:
540 fe_params->u.qpsk.fec_inner = FEC_6_7; 541 fe_params->fec_inner = FEC_6_7;
541 break; 542 break;
542 case 0x06: 543 case 0x06:
543 fe_params->u.qpsk.fec_inner = FEC_7_8; 544 fe_params->fec_inner = FEC_7_8;
544 break; 545 break;
545 case 0x07: 546 case 0x07:
546 fe_params->u.qpsk.fec_inner = FEC_8_9; 547 fe_params->fec_inner = FEC_8_9;
547 break; 548 break;
548 } 549 }
549 550
@@ -664,29 +665,31 @@ static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
664 665
665static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) 666static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
666{ 667{
667 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) { 668 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
669
670 if (p->symbol_rate > 20000000) {
668 fesettings->min_delay_ms = 50; 671 fesettings->min_delay_ms = 50;
669 fesettings->step_size = 2000; 672 fesettings->step_size = 2000;
670 fesettings->max_drift = 8000; 673 fesettings->max_drift = 8000;
671 } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) { 674 } else if (p->symbol_rate > 12000000) {
672 fesettings->min_delay_ms = 100; 675 fesettings->min_delay_ms = 100;
673 fesettings->step_size = 1500; 676 fesettings->step_size = 1500;
674 fesettings->max_drift = 9000; 677 fesettings->max_drift = 9000;
675 } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) { 678 } else if (p->symbol_rate > 8000000) {
676 fesettings->min_delay_ms = 100; 679 fesettings->min_delay_ms = 100;
677 fesettings->step_size = 1000; 680 fesettings->step_size = 1000;
678 fesettings->max_drift = 8000; 681 fesettings->max_drift = 8000;
679 } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) { 682 } else if (p->symbol_rate > 4000000) {
680 fesettings->min_delay_ms = 100; 683 fesettings->min_delay_ms = 100;
681 fesettings->step_size = 500; 684 fesettings->step_size = 500;
682 fesettings->max_drift = 7000; 685 fesettings->max_drift = 7000;
683 } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) { 686 } else if (p->symbol_rate > 2000000) {
684 fesettings->min_delay_ms = 200; 687 fesettings->min_delay_ms = 200;
685 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); 688 fesettings->step_size = p->symbol_rate / 8000;
686 fesettings->max_drift = 14 * fesettings->step_size; 689 fesettings->max_drift = 14 * fesettings->step_size;
687 } else { 690 } else {
688 fesettings->min_delay_ms = 200; 691 fesettings->min_delay_ms = 200;
689 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000); 692 fesettings->step_size = p->symbol_rate / 8000;
690 fesettings->max_drift = 18 * fesettings->step_size; 693 fesettings->max_drift = 18 * fesettings->step_size;
691 } 694 }
692 695
@@ -701,10 +704,9 @@ static void tda10086_release(struct dvb_frontend* fe)
701} 704}
702 705
703static struct dvb_frontend_ops tda10086_ops = { 706static struct dvb_frontend_ops tda10086_ops = {
704 707 .delsys = { SYS_DVBS },
705 .info = { 708 .info = {
706 .name = "Philips TDA10086 DVB-S", 709 .name = "Philips TDA10086 DVB-S",
707 .type = FE_QPSK,
708 .frequency_min = 950000, 710 .frequency_min = 950000,
709 .frequency_max = 2150000, 711 .frequency_max = 2150000,
710 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 712 .frequency_stepsize = 125, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/tda18271c2dd.c b/drivers/media/dvb/frontends/tda18271c2dd.c
index 1b1bf200c55..86da3d81649 100644
--- a/drivers/media/dvb/frontends/tda18271c2dd.c
+++ b/drivers/media/dvb/frontends/tda18271c2dd.c
@@ -1123,55 +1123,51 @@ static int release(struct dvb_frontend *fe)
1123 return 0; 1123 return 0;
1124} 1124}
1125 1125
1126/*
1127 * As defined on EN 300 429 Annex A and on ITU-T J.83 annex A, the DVB-C
1128 * roll-off factor is 0.15.
1129 * According with the specs, the amount of the needed bandwith is given by:
1130 * Bw = Symbol_rate * (1 + 0.15)
1131 * As such, the maximum symbol rate supported by 6 MHz is
1132 * max_symbol_rate = 6 MHz / 1.15 = 5217391 Bauds
1133 *NOTE: For ITU-T J.83 Annex C, the roll-off factor is 0.13. So:
1134 * max_symbol_rate = 6 MHz / 1.13 = 5309735 Baud
1135 * That means that an adjustment is needed for Japan,
1136 * but, as currently DRX-K is hardcoded to Annex A, let's stick
1137 * with 0.15 roll-off factor.
1138 */
1139#define MAX_SYMBOL_RATE_6MHz 5217391
1140 1126
1141static int set_params(struct dvb_frontend *fe, 1127static int set_params(struct dvb_frontend *fe)
1142 struct dvb_frontend_parameters *params)
1143{ 1128{
1144 struct tda_state *state = fe->tuner_priv; 1129 struct tda_state *state = fe->tuner_priv;
1145 int status = 0; 1130 int status = 0;
1146 int Standard; 1131 int Standard;
1132 u32 bw = fe->dtv_property_cache.bandwidth_hz;
1133 u32 delsys = fe->dtv_property_cache.delivery_system;
1147 1134
1148 state->m_Frequency = params->frequency; 1135 state->m_Frequency = fe->dtv_property_cache.frequency;
1149 1136
1150 if (fe->ops.info.type == FE_OFDM) 1137 switch (delsys) {
1151 switch (params->u.ofdm.bandwidth) { 1138 case SYS_DVBT:
1152 case BANDWIDTH_6_MHZ: 1139 case SYS_DVBT2:
1140 switch (bw) {
1141 case 6000000:
1153 Standard = HF_DVBT_6MHZ; 1142 Standard = HF_DVBT_6MHZ;
1154 break; 1143 break;
1155 case BANDWIDTH_7_MHZ: 1144 case 7000000:
1156 Standard = HF_DVBT_7MHZ; 1145 Standard = HF_DVBT_7MHZ;
1157 break; 1146 break;
1158 default: 1147 case 8000000:
1159 case BANDWIDTH_8_MHZ:
1160 Standard = HF_DVBT_8MHZ; 1148 Standard = HF_DVBT_8MHZ;
1161 break; 1149 break;
1150 default:
1151 return -EINVAL;
1162 } 1152 }
1163 else if (fe->ops.info.type == FE_QAM) { 1153 case SYS_DVBC_ANNEX_A:
1164 if (params->u.qam.symbol_rate <= MAX_SYMBOL_RATE_6MHz) 1154 case SYS_DVBC_ANNEX_C:
1155 if (bw <= 6000000)
1165 Standard = HF_DVBC_6MHZ; 1156 Standard = HF_DVBC_6MHZ;
1157 else if (bw <= 7000000)
1158 Standard = HF_DVBC_7MHZ;
1166 else 1159 else
1167 Standard = HF_DVBC_8MHZ; 1160 Standard = HF_DVBC_8MHZ;
1168 } else 1161 break;
1162 default:
1169 return -EINVAL; 1163 return -EINVAL;
1164 }
1170 do { 1165 do {
1171 status = RFTrackingFiltersCorrection(state, params->frequency); 1166 status = RFTrackingFiltersCorrection(state, state->m_Frequency);
1172 if (status < 0) 1167 if (status < 0)
1173 break; 1168 break;
1174 status = ChannelConfiguration(state, params->frequency, Standard); 1169 status = ChannelConfiguration(state, state->m_Frequency,
1170 Standard);
1175 if (status < 0) 1171 if (status < 0)
1176 break; 1172 break;
1177 1173
diff --git a/drivers/media/dvb/frontends/tda8083.c b/drivers/media/dvb/frontends/tda8083.c
index 9369f7442f2..15912c96926 100644
--- a/drivers/media/dvb/frontends/tda8083.c
+++ b/drivers/media/dvb/frontends/tda8083.c
@@ -315,18 +315,19 @@ static int tda8083_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
315 return 0; 315 return 0;
316} 316}
317 317
318static int tda8083_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 318static int tda8083_set_frontend(struct dvb_frontend *fe)
319{ 319{
320 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
320 struct tda8083_state* state = fe->demodulator_priv; 321 struct tda8083_state* state = fe->demodulator_priv;
321 322
322 if (fe->ops.tuner_ops.set_params) { 323 if (fe->ops.tuner_ops.set_params) {
323 fe->ops.tuner_ops.set_params(fe, p); 324 fe->ops.tuner_ops.set_params(fe);
324 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 325 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
325 } 326 }
326 327
327 tda8083_set_inversion (state, p->inversion); 328 tda8083_set_inversion (state, p->inversion);
328 tda8083_set_fec (state, p->u.qpsk.fec_inner); 329 tda8083_set_fec(state, p->fec_inner);
329 tda8083_set_symbolrate (state, p->u.qpsk.symbol_rate); 330 tda8083_set_symbolrate(state, p->symbol_rate);
330 331
331 tda8083_writereg (state, 0x00, 0x3c); 332 tda8083_writereg (state, 0x00, 0x3c);
332 tda8083_writereg (state, 0x00, 0x04); 333 tda8083_writereg (state, 0x00, 0x04);
@@ -334,16 +335,17 @@ static int tda8083_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
334 return 0; 335 return 0;
335} 336}
336 337
337static int tda8083_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 338static int tda8083_get_frontend(struct dvb_frontend *fe)
338{ 339{
340 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
339 struct tda8083_state* state = fe->demodulator_priv; 341 struct tda8083_state* state = fe->demodulator_priv;
340 342
341 /* FIXME: get symbolrate & frequency offset...*/ 343 /* FIXME: get symbolrate & frequency offset...*/
342 /*p->frequency = ???;*/ 344 /*p->frequency = ???;*/
343 p->inversion = (tda8083_readreg (state, 0x0e) & 0x80) ? 345 p->inversion = (tda8083_readreg (state, 0x0e) & 0x80) ?
344 INVERSION_ON : INVERSION_OFF; 346 INVERSION_ON : INVERSION_OFF;
345 p->u.qpsk.fec_inner = tda8083_get_fec (state); 347 p->fec_inner = tda8083_get_fec(state);
346 /*p->u.qpsk.symbol_rate = tda8083_get_symbolrate (state);*/ 348 /*p->symbol_rate = tda8083_get_symbolrate (state);*/
347 349
348 return 0; 350 return 0;
349} 351}
@@ -438,10 +440,9 @@ error:
438} 440}
439 441
440static struct dvb_frontend_ops tda8083_ops = { 442static struct dvb_frontend_ops tda8083_ops = {
441 443 .delsys = { SYS_DVBS },
442 .info = { 444 .info = {
443 .name = "Philips TDA8083 DVB-S", 445 .name = "Philips TDA8083 DVB-S",
444 .type = FE_QPSK,
445 .frequency_min = 920000, /* TDA8060 */ 446 .frequency_min = 920000, /* TDA8060 */
446 .frequency_max = 2200000, /* TDA8060 */ 447 .frequency_max = 2200000, /* TDA8060 */
447 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 448 .frequency_stepsize = 125, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/tda826x.c b/drivers/media/dvb/frontends/tda826x.c
index 06c94800b94..04bbcc24de0 100644
--- a/drivers/media/dvb/frontends/tda826x.c
+++ b/drivers/media/dvb/frontends/tda826x.c
@@ -71,8 +71,9 @@ static int tda826x_sleep(struct dvb_frontend *fe)
71 return (ret == 1) ? 0 : ret; 71 return (ret == 1) ? 0 : ret;
72} 72}
73 73
74static int tda826x_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 74static int tda826x_set_params(struct dvb_frontend *fe)
75{ 75{
76 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
76 struct tda826x_priv *priv = fe->tuner_priv; 77 struct tda826x_priv *priv = fe->tuner_priv;
77 int ret; 78 int ret;
78 u32 div; 79 u32 div;
@@ -83,11 +84,11 @@ static int tda826x_set_params(struct dvb_frontend *fe, struct dvb_frontend_param
83 84
84 dprintk("%s:\n", __func__); 85 dprintk("%s:\n", __func__);
85 86
86 div = (params->frequency + (1000-1)) / 1000; 87 div = (p->frequency + (1000-1)) / 1000;
87 88
88 /* BW = ((1 + RO) * SR/2 + 5) * 1.3 [SR in MSPS, BW in MHz] */ 89 /* BW = ((1 + RO) * SR/2 + 5) * 1.3 [SR in MSPS, BW in MHz] */
89 /* with R0 = 0.35 and some transformations: */ 90 /* with R0 = 0.35 and some transformations: */
90 ksyms = params->u.qpsk.symbol_rate / 1000; 91 ksyms = p->symbol_rate / 1000;
91 bandwidth = (878 * ksyms + 6500000) / 1000000 + 1; 92 bandwidth = (878 * ksyms + 6500000) / 1000000 + 1;
92 if (bandwidth < 5) 93 if (bandwidth < 5)
93 bandwidth = 5; 94 bandwidth = 5;
diff --git a/drivers/media/dvb/frontends/tdhd1.h b/drivers/media/dvb/frontends/tdhd1.h
index 51f17067865..17750985db0 100644
--- a/drivers/media/dvb/frontends/tdhd1.h
+++ b/drivers/media/dvb/frontends/tdhd1.h
@@ -40,24 +40,25 @@ static struct tda1004x_config alps_tdhd1_204a_config = {
40 .request_firmware = alps_tdhd1_204_request_firmware 40 .request_firmware = alps_tdhd1_204_request_firmware
41}; 41};
42 42
43static int alps_tdhd1_204a_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 43static int alps_tdhd1_204a_tuner_set_params(struct dvb_frontend *fe)
44{ 44{
45 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
45 struct i2c_adapter *i2c = fe->tuner_priv; 46 struct i2c_adapter *i2c = fe->tuner_priv;
46 u8 data[4]; 47 u8 data[4];
47 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 48 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
48 u32 div; 49 u32 div;
49 50
50 div = (params->frequency + 36166666) / 166666; 51 div = (p->frequency + 36166666) / 166666;
51 52
52 data[0] = (div >> 8) & 0x7f; 53 data[0] = (div >> 8) & 0x7f;
53 data[1] = div & 0xff; 54 data[1] = div & 0xff;
54 data[2] = 0x85; 55 data[2] = 0x85;
55 56
56 if (params->frequency >= 174000000 && params->frequency <= 230000000) 57 if (p->frequency >= 174000000 && p->frequency <= 230000000)
57 data[3] = 0x02; 58 data[3] = 0x02;
58 else if (params->frequency >= 470000000 && params->frequency <= 823000000) 59 else if (p->frequency >= 470000000 && p->frequency <= 823000000)
59 data[3] = 0x0C; 60 data[3] = 0x0C;
60 else if (params->frequency > 823000000 && params->frequency <= 862000000) 61 else if (p->frequency > 823000000 && p->frequency <= 862000000)
61 data[3] = 0x8C; 62 data[3] = 0x8C;
62 else 63 else
63 return -EINVAL; 64 return -EINVAL;
diff --git a/drivers/media/dvb/frontends/tua6100.c b/drivers/media/dvb/frontends/tua6100.c
index bcb95c2ef29..029384d1fdd 100644
--- a/drivers/media/dvb/frontends/tua6100.c
+++ b/drivers/media/dvb/frontends/tua6100.c
@@ -67,9 +67,9 @@ static int tua6100_sleep(struct dvb_frontend *fe)
67 return (ret == 1) ? 0 : ret; 67 return (ret == 1) ? 0 : ret;
68} 68}
69 69
70static int tua6100_set_params(struct dvb_frontend *fe, 70static int tua6100_set_params(struct dvb_frontend *fe)
71 struct dvb_frontend_parameters *params)
72{ 71{
72 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
73 struct tua6100_priv *priv = fe->tuner_priv; 73 struct tua6100_priv *priv = fe->tuner_priv;
74 u32 div; 74 u32 div;
75 u32 prediv; 75 u32 prediv;
@@ -85,36 +85,37 @@ static int tua6100_set_params(struct dvb_frontend *fe,
85#define _ri 4000000 85#define _ri 4000000
86 86
87 // setup register 0 87 // setup register 0
88 if (params->frequency < 2000000) { 88 if (c->frequency < 2000000)
89 reg0[1] = 0x03; 89 reg0[1] = 0x03;
90 } else { 90 else
91 reg0[1] = 0x07; 91 reg0[1] = 0x07;
92 }
93 92
94 // setup register 1 93 // setup register 1
95 if (params->frequency < 1630000) { 94 if (c->frequency < 1630000)
96 reg1[1] = 0x2c; 95 reg1[1] = 0x2c;
97 } else { 96 else
98 reg1[1] = 0x0c; 97 reg1[1] = 0x0c;
99 } 98
100 if (_P == 64) 99 if (_P == 64)
101 reg1[1] |= 0x40; 100 reg1[1] |= 0x40;
102 if (params->frequency >= 1525000) 101 if (c->frequency >= 1525000)
103 reg1[1] |= 0x80; 102 reg1[1] |= 0x80;
104 103
105 // register 2 104 // register 2
106 reg2[1] = (_R >> 8) & 0x03; 105 reg2[1] = (_R >> 8) & 0x03;
107 reg2[2] = _R; 106 reg2[2] = _R;
108 if (params->frequency < 1455000) { 107 if (c->frequency < 1455000)
109 reg2[1] |= 0x1c; 108 reg2[1] |= 0x1c;
110 } else if (params->frequency < 1630000) { 109 else if (c->frequency < 1630000)
111 reg2[1] |= 0x0c; 110 reg2[1] |= 0x0c;
112 } else { 111 else
113 reg2[1] |= 0x1c; 112 reg2[1] |= 0x1c;
114 }
115 113
116 // The N divisor ratio (note: params->frequency is in kHz, but we need it in Hz) 114 /*
117 prediv = (params->frequency * _R) / (_ri / 1000); 115 * The N divisor ratio (note: c->frequency is in kHz, but we
116 * need it in Hz)
117 */
118 prediv = (c->frequency * _R) / (_ri / 1000);
118 div = prediv / _P; 119 div = prediv / _P;
119 reg1[1] |= (div >> 9) & 0x03; 120 reg1[1] |= (div >> 9) & 0x03;
120 reg1[2] = div >> 1; 121 reg1[2] = div >> 1;
diff --git a/drivers/media/dvb/frontends/ves1820.c b/drivers/media/dvb/frontends/ves1820.c
index 550a07a8a99..bb42b563c42 100644
--- a/drivers/media/dvb/frontends/ves1820.c
+++ b/drivers/media/dvb/frontends/ves1820.c
@@ -205,25 +205,26 @@ static int ves1820_init(struct dvb_frontend* fe)
205 return 0; 205 return 0;
206} 206}
207 207
208static int ves1820_set_parameters(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 208static int ves1820_set_parameters(struct dvb_frontend *fe)
209{ 209{
210 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
210 struct ves1820_state* state = fe->demodulator_priv; 211 struct ves1820_state* state = fe->demodulator_priv;
211 static const u8 reg0x00[] = { 0x00, 0x04, 0x08, 0x0c, 0x10 }; 212 static const u8 reg0x00[] = { 0x00, 0x04, 0x08, 0x0c, 0x10 };
212 static const u8 reg0x01[] = { 140, 140, 106, 100, 92 }; 213 static const u8 reg0x01[] = { 140, 140, 106, 100, 92 };
213 static const u8 reg0x05[] = { 135, 100, 70, 54, 38 }; 214 static const u8 reg0x05[] = { 135, 100, 70, 54, 38 };
214 static const u8 reg0x08[] = { 162, 116, 67, 52, 35 }; 215 static const u8 reg0x08[] = { 162, 116, 67, 52, 35 };
215 static const u8 reg0x09[] = { 145, 150, 106, 126, 107 }; 216 static const u8 reg0x09[] = { 145, 150, 106, 126, 107 };
216 int real_qam = p->u.qam.modulation - QAM_16; 217 int real_qam = p->modulation - QAM_16;
217 218
218 if (real_qam < 0 || real_qam > 4) 219 if (real_qam < 0 || real_qam > 4)
219 return -EINVAL; 220 return -EINVAL;
220 221
221 if (fe->ops.tuner_ops.set_params) { 222 if (fe->ops.tuner_ops.set_params) {
222 fe->ops.tuner_ops.set_params(fe, p); 223 fe->ops.tuner_ops.set_params(fe);
223 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 224 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
224 } 225 }
225 226
226 ves1820_set_symbolrate(state, p->u.qam.symbol_rate); 227 ves1820_set_symbolrate(state, p->symbol_rate);
227 ves1820_writereg(state, 0x34, state->pwm); 228 ves1820_writereg(state, 0x34, state->pwm);
228 229
229 ves1820_writereg(state, 0x01, reg0x01[real_qam]); 230 ves1820_writereg(state, 0x01, reg0x01[real_qam]);
@@ -309,8 +310,9 @@ static int ves1820_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
309 return 0; 310 return 0;
310} 311}
311 312
312static int ves1820_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 313static int ves1820_get_frontend(struct dvb_frontend *fe)
313{ 314{
315 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
314 struct ves1820_state* state = fe->demodulator_priv; 316 struct ves1820_state* state = fe->demodulator_priv;
315 int sync; 317 int sync;
316 s8 afc = 0; 318 s8 afc = 0;
@@ -320,7 +322,7 @@ static int ves1820_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
320 if (verbose) { 322 if (verbose) {
321 /* AFC only valid when carrier has been recovered */ 323 /* AFC only valid when carrier has been recovered */
322 printk(sync & 2 ? "ves1820: AFC (%d) %dHz\n" : 324 printk(sync & 2 ? "ves1820: AFC (%d) %dHz\n" :
323 "ves1820: [AFC (%d) %dHz]\n", afc, -((s32) p->u.qam.symbol_rate * afc) >> 10); 325 "ves1820: [AFC (%d) %dHz]\n", afc, -((s32) p->symbol_rate * afc) >> 10);
324 } 326 }
325 327
326 if (!state->config->invert) { 328 if (!state->config->invert) {
@@ -329,13 +331,13 @@ static int ves1820_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
329 p->inversion = (!(state->reg0 & 0x20)) ? INVERSION_ON : INVERSION_OFF; 331 p->inversion = (!(state->reg0 & 0x20)) ? INVERSION_ON : INVERSION_OFF;
330 } 332 }
331 333
332 p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16; 334 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
333 335
334 p->u.qam.fec_inner = FEC_NONE; 336 p->fec_inner = FEC_NONE;
335 337
336 p->frequency = ((p->frequency + 31250) / 62500) * 62500; 338 p->frequency = ((p->frequency + 31250) / 62500) * 62500;
337 if (sync & 2) 339 if (sync & 2)
338 p->frequency -= ((s32) p->u.qam.symbol_rate * afc) >> 10; 340 p->frequency -= ((s32) p->symbol_rate * afc) >> 10;
339 341
340 return 0; 342 return 0;
341} 343}
@@ -405,10 +407,9 @@ error:
405} 407}
406 408
407static struct dvb_frontend_ops ves1820_ops = { 409static struct dvb_frontend_ops ves1820_ops = {
408 410 .delsys = { SYS_DVBC_ANNEX_A },
409 .info = { 411 .info = {
410 .name = "VLSI VES1820 DVB-C", 412 .name = "VLSI VES1820 DVB-C",
411 .type = FE_QAM,
412 .frequency_stepsize = 62500, 413 .frequency_stepsize = 62500,
413 .frequency_min = 47000000, 414 .frequency_min = 47000000,
414 .frequency_max = 862000000, 415 .frequency_max = 862000000,
diff --git a/drivers/media/dvb/frontends/ves1x93.c b/drivers/media/dvb/frontends/ves1x93.c
index 8d7854c2fb0..9c17eacaec2 100644
--- a/drivers/media/dvb/frontends/ves1x93.c
+++ b/drivers/media/dvb/frontends/ves1x93.c
@@ -46,6 +46,7 @@ struct ves1x93_state {
46 u8 *init_1x93_wtab; 46 u8 *init_1x93_wtab;
47 u8 tab_size; 47 u8 tab_size;
48 u8 demod_type; 48 u8 demod_type;
49 u32 frequency;
49}; 50};
50 51
51static int debug; 52static int debug;
@@ -384,31 +385,34 @@ static int ves1x93_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
384 return 0; 385 return 0;
385} 386}
386 387
387static int ves1x93_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 388static int ves1x93_set_frontend(struct dvb_frontend *fe)
388{ 389{
390 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
389 struct ves1x93_state* state = fe->demodulator_priv; 391 struct ves1x93_state* state = fe->demodulator_priv;
390 392
391 if (fe->ops.tuner_ops.set_params) { 393 if (fe->ops.tuner_ops.set_params) {
392 fe->ops.tuner_ops.set_params(fe, p); 394 fe->ops.tuner_ops.set_params(fe);
393 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 395 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
394 } 396 }
395 ves1x93_set_inversion (state, p->inversion); 397 ves1x93_set_inversion (state, p->inversion);
396 ves1x93_set_fec (state, p->u.qpsk.fec_inner); 398 ves1x93_set_fec(state, p->fec_inner);
397 ves1x93_set_symbolrate (state, p->u.qpsk.symbol_rate); 399 ves1x93_set_symbolrate(state, p->symbol_rate);
398 state->inversion = p->inversion; 400 state->inversion = p->inversion;
401 state->frequency = p->frequency;
399 402
400 return 0; 403 return 0;
401} 404}
402 405
403static int ves1x93_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 406static int ves1x93_get_frontend(struct dvb_frontend *fe)
404{ 407{
408 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
405 struct ves1x93_state* state = fe->demodulator_priv; 409 struct ves1x93_state* state = fe->demodulator_priv;
406 int afc; 410 int afc;
407 411
408 afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1)))/2; 412 afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1)))/2;
409 afc = (afc * (int)(p->u.qpsk.symbol_rate/1000/8))/16; 413 afc = (afc * (int)(p->symbol_rate/1000/8))/16;
410 414
411 p->frequency -= afc; 415 p->frequency = state->frequency - afc;
412 416
413 /* 417 /*
414 * inversion indicator is only valid 418 * inversion indicator is only valid
@@ -417,7 +421,7 @@ static int ves1x93_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
417 if (state->inversion == INVERSION_AUTO) 421 if (state->inversion == INVERSION_AUTO)
418 p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ? 422 p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?
419 INVERSION_OFF : INVERSION_ON; 423 INVERSION_OFF : INVERSION_ON;
420 p->u.qpsk.fec_inner = ves1x93_get_fec (state); 424 p->fec_inner = ves1x93_get_fec(state);
421 /* XXX FIXME: timing offset !! */ 425 /* XXX FIXME: timing offset !! */
422 426
423 return 0; 427 return 0;
@@ -506,10 +510,9 @@ error:
506} 510}
507 511
508static struct dvb_frontend_ops ves1x93_ops = { 512static struct dvb_frontend_ops ves1x93_ops = {
509 513 .delsys = { SYS_DVBS },
510 .info = { 514 .info = {
511 .name = "VLSI VES1x93 DVB-S", 515 .name = "VLSI VES1x93 DVB-S",
512 .type = FE_QPSK,
513 .frequency_min = 950000, 516 .frequency_min = 950000,
514 .frequency_max = 2150000, 517 .frequency_max = 2150000,
515 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 518 .frequency_stepsize = 125, /* kHz for QPSK frontends */
diff --git a/drivers/media/dvb/frontends/zl10036.c b/drivers/media/dvb/frontends/zl10036.c
index 81aa984c551..0903d461b8f 100644
--- a/drivers/media/dvb/frontends/zl10036.c
+++ b/drivers/media/dvb/frontends/zl10036.c
@@ -305,12 +305,12 @@ static int zl10036_set_gain_params(struct zl10036_state *state,
305 return zl10036_write(state, buf, sizeof(buf)); 305 return zl10036_write(state, buf, sizeof(buf));
306} 306}
307 307
308static int zl10036_set_params(struct dvb_frontend *fe, 308static int zl10036_set_params(struct dvb_frontend *fe)
309 struct dvb_frontend_parameters *params)
310{ 309{
310 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
311 struct zl10036_state *state = fe->tuner_priv; 311 struct zl10036_state *state = fe->tuner_priv;
312 int ret = 0; 312 int ret = 0;
313 u32 frequency = params->frequency; 313 u32 frequency = p->frequency;
314 u32 fbw; 314 u32 fbw;
315 int i; 315 int i;
316 u8 c; 316 u8 c;
@@ -326,7 +326,7 @@ static int zl10036_set_params(struct dvb_frontend *fe,
326 * fBW = (alpha*symbolrate)/(2*0.8) 326 * fBW = (alpha*symbolrate)/(2*0.8)
327 * 1.35 / (2*0.8) = 27 / 32 327 * 1.35 / (2*0.8) = 27 / 32
328 */ 328 */
329 fbw = (27 * params->u.qpsk.symbol_rate) / 32; 329 fbw = (27 * p->symbol_rate) / 32;
330 330
331 /* scale to kHz */ 331 /* scale to kHz */
332 fbw /= 1000; 332 fbw /= 1000;
@@ -353,7 +353,7 @@ static int zl10036_set_params(struct dvb_frontend *fe,
353 if (ret < 0) 353 if (ret < 0)
354 goto error; 354 goto error;
355 355
356 ret = zl10036_set_frequency(state, params->frequency); 356 ret = zl10036_set_frequency(state, p->frequency);
357 if (ret < 0) 357 if (ret < 0)
358 goto error; 358 goto error;
359 359
diff --git a/drivers/media/dvb/frontends/zl10039.c b/drivers/media/dvb/frontends/zl10039.c
index c085e58a94b..eff9c5fde50 100644
--- a/drivers/media/dvb/frontends/zl10039.c
+++ b/drivers/media/dvb/frontends/zl10039.c
@@ -176,9 +176,9 @@ static int zl10039_sleep(struct dvb_frontend *fe)
176 return 0; 176 return 0;
177} 177}
178 178
179static int zl10039_set_params(struct dvb_frontend *fe, 179static int zl10039_set_params(struct dvb_frontend *fe)
180 struct dvb_frontend_parameters *params)
181{ 180{
181 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
182 struct zl10039_state *state = fe->tuner_priv; 182 struct zl10039_state *state = fe->tuner_priv;
183 u8 buf[6]; 183 u8 buf[6];
184 u8 bf; 184 u8 bf;
@@ -188,12 +188,12 @@ static int zl10039_set_params(struct dvb_frontend *fe,
188 188
189 dprintk("%s\n", __func__); 189 dprintk("%s\n", __func__);
190 dprintk("Set frequency = %d, symbol rate = %d\n", 190 dprintk("Set frequency = %d, symbol rate = %d\n",
191 params->frequency, params->u.qpsk.symbol_rate); 191 c->frequency, c->symbol_rate);
192 192
193 /* Assumed 10.111 MHz crystal oscillator */ 193 /* Assumed 10.111 MHz crystal oscillator */
194 /* Cancelled num/den 80 to prevent overflow */ 194 /* Cancelled num/den 80 to prevent overflow */
195 div = (params->frequency * 1000) / 126387; 195 div = (c->frequency * 1000) / 126387;
196 fbw = (params->u.qpsk.symbol_rate * 27) / 32000; 196 fbw = (c->symbol_rate * 27) / 32000;
197 /* Cancelled num/den 10 to prevent overflow */ 197 /* Cancelled num/den 10 to prevent overflow */
198 bf = ((fbw * 5088) / 1011100) - 1; 198 bf = ((fbw * 5088) / 1011100) - 1;
199 199
diff --git a/drivers/media/dvb/frontends/zl10353.c b/drivers/media/dvb/frontends/zl10353.c
index adbbf6d3d04..ac723789137 100644
--- a/drivers/media/dvb/frontends/zl10353.c
+++ b/drivers/media/dvb/frontends/zl10353.c
@@ -37,9 +37,9 @@ struct zl10353_state {
37 37
38 struct zl10353_config config; 38 struct zl10353_config config;
39 39
40 enum fe_bandwidth bandwidth; 40 u32 bandwidth;
41 u32 ucblocks; 41 u32 ucblocks;
42 u32 frequency; 42 u32 frequency;
43}; 43};
44 44
45static int debug; 45static int debug;
@@ -122,30 +122,17 @@ static void zl10353_dump_regs(struct dvb_frontend *fe)
122} 122}
123 123
124static void zl10353_calc_nominal_rate(struct dvb_frontend *fe, 124static void zl10353_calc_nominal_rate(struct dvb_frontend *fe,
125 enum fe_bandwidth bandwidth, 125 u32 bandwidth,
126 u16 *nominal_rate) 126 u16 *nominal_rate)
127{ 127{
128 struct zl10353_state *state = fe->demodulator_priv; 128 struct zl10353_state *state = fe->demodulator_priv;
129 u32 adc_clock = 450560; /* 45.056 MHz */ 129 u32 adc_clock = 450560; /* 45.056 MHz */
130 u64 value; 130 u64 value;
131 u8 bw; 131 u8 bw = bandwidth / 1000000;
132 132
133 if (state->config.adc_clock) 133 if (state->config.adc_clock)
134 adc_clock = state->config.adc_clock; 134 adc_clock = state->config.adc_clock;
135 135
136 switch (bandwidth) {
137 case BANDWIDTH_6_MHZ:
138 bw = 6;
139 break;
140 case BANDWIDTH_7_MHZ:
141 bw = 7;
142 break;
143 case BANDWIDTH_8_MHZ:
144 default:
145 bw = 8;
146 break;
147 }
148
149 value = (u64)10 * (1 << 23) / 7 * 125; 136 value = (u64)10 * (1 << 23) / 7 * 125;
150 value = (bw * value) + adc_clock / 2; 137 value = (bw * value) + adc_clock / 2;
151 do_div(value, adc_clock); 138 do_div(value, adc_clock);
@@ -192,16 +179,15 @@ static int zl10353_sleep(struct dvb_frontend *fe)
192 return 0; 179 return 0;
193} 180}
194 181
195static int zl10353_set_parameters(struct dvb_frontend *fe, 182static int zl10353_set_parameters(struct dvb_frontend *fe)
196 struct dvb_frontend_parameters *param)
197{ 183{
184 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
198 struct zl10353_state *state = fe->demodulator_priv; 185 struct zl10353_state *state = fe->demodulator_priv;
199 u16 nominal_rate, input_freq; 186 u16 nominal_rate, input_freq;
200 u8 pllbuf[6] = { 0x67 }, acq_ctl = 0; 187 u8 pllbuf[6] = { 0x67 }, acq_ctl = 0;
201 u16 tps = 0; 188 u16 tps = 0;
202 struct dvb_ofdm_parameters *op = &param->u.ofdm;
203 189
204 state->frequency = param->frequency; 190 state->frequency = c->frequency;
205 191
206 zl10353_single_write(fe, RESET, 0x80); 192 zl10353_single_write(fe, RESET, 0x80);
207 udelay(200); 193 udelay(200);
@@ -211,42 +197,44 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
211 197
212 zl10353_single_write(fe, AGC_TARGET, 0x28); 198 zl10353_single_write(fe, AGC_TARGET, 0x28);
213 199
214 if (op->transmission_mode != TRANSMISSION_MODE_AUTO) 200 if (c->transmission_mode != TRANSMISSION_MODE_AUTO)
215 acq_ctl |= (1 << 0); 201 acq_ctl |= (1 << 0);
216 if (op->guard_interval != GUARD_INTERVAL_AUTO) 202 if (c->guard_interval != GUARD_INTERVAL_AUTO)
217 acq_ctl |= (1 << 1); 203 acq_ctl |= (1 << 1);
218 zl10353_single_write(fe, ACQ_CTL, acq_ctl); 204 zl10353_single_write(fe, ACQ_CTL, acq_ctl);
219 205
220 switch (op->bandwidth) { 206 switch (c->bandwidth_hz) {
221 case BANDWIDTH_6_MHZ: 207 case 6000000:
222 /* These are extrapolated from the 7 and 8MHz values */ 208 /* These are extrapolated from the 7 and 8MHz values */
223 zl10353_single_write(fe, MCLK_RATIO, 0x97); 209 zl10353_single_write(fe, MCLK_RATIO, 0x97);
224 zl10353_single_write(fe, 0x64, 0x34); 210 zl10353_single_write(fe, 0x64, 0x34);
225 zl10353_single_write(fe, 0xcc, 0xdd); 211 zl10353_single_write(fe, 0xcc, 0xdd);
226 break; 212 break;
227 case BANDWIDTH_7_MHZ: 213 case 7000000:
228 zl10353_single_write(fe, MCLK_RATIO, 0x86); 214 zl10353_single_write(fe, MCLK_RATIO, 0x86);
229 zl10353_single_write(fe, 0x64, 0x35); 215 zl10353_single_write(fe, 0x64, 0x35);
230 zl10353_single_write(fe, 0xcc, 0x73); 216 zl10353_single_write(fe, 0xcc, 0x73);
231 break; 217 break;
232 case BANDWIDTH_8_MHZ:
233 default: 218 default:
219 c->bandwidth_hz = 8000000;
220 /* fall though */
221 case 8000000:
234 zl10353_single_write(fe, MCLK_RATIO, 0x75); 222 zl10353_single_write(fe, MCLK_RATIO, 0x75);
235 zl10353_single_write(fe, 0x64, 0x36); 223 zl10353_single_write(fe, 0x64, 0x36);
236 zl10353_single_write(fe, 0xcc, 0x73); 224 zl10353_single_write(fe, 0xcc, 0x73);
237 } 225 }
238 226
239 zl10353_calc_nominal_rate(fe, op->bandwidth, &nominal_rate); 227 zl10353_calc_nominal_rate(fe, c->bandwidth_hz, &nominal_rate);
240 zl10353_single_write(fe, TRL_NOMINAL_RATE_1, msb(nominal_rate)); 228 zl10353_single_write(fe, TRL_NOMINAL_RATE_1, msb(nominal_rate));
241 zl10353_single_write(fe, TRL_NOMINAL_RATE_0, lsb(nominal_rate)); 229 zl10353_single_write(fe, TRL_NOMINAL_RATE_0, lsb(nominal_rate));
242 state->bandwidth = op->bandwidth; 230 state->bandwidth = c->bandwidth_hz;
243 231
244 zl10353_calc_input_freq(fe, &input_freq); 232 zl10353_calc_input_freq(fe, &input_freq);
245 zl10353_single_write(fe, INPUT_FREQ_1, msb(input_freq)); 233 zl10353_single_write(fe, INPUT_FREQ_1, msb(input_freq));
246 zl10353_single_write(fe, INPUT_FREQ_0, lsb(input_freq)); 234 zl10353_single_write(fe, INPUT_FREQ_0, lsb(input_freq));
247 235
248 /* Hint at TPS settings */ 236 /* Hint at TPS settings */
249 switch (op->code_rate_HP) { 237 switch (c->code_rate_HP) {
250 case FEC_2_3: 238 case FEC_2_3:
251 tps |= (1 << 7); 239 tps |= (1 << 7);
252 break; 240 break;
@@ -266,7 +254,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
266 return -EINVAL; 254 return -EINVAL;
267 } 255 }
268 256
269 switch (op->code_rate_LP) { 257 switch (c->code_rate_LP) {
270 case FEC_2_3: 258 case FEC_2_3:
271 tps |= (1 << 4); 259 tps |= (1 << 4);
272 break; 260 break;
@@ -283,14 +271,14 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
283 case FEC_AUTO: 271 case FEC_AUTO:
284 break; 272 break;
285 case FEC_NONE: 273 case FEC_NONE:
286 if (op->hierarchy_information == HIERARCHY_AUTO || 274 if (c->hierarchy == HIERARCHY_AUTO ||
287 op->hierarchy_information == HIERARCHY_NONE) 275 c->hierarchy == HIERARCHY_NONE)
288 break; 276 break;
289 default: 277 default:
290 return -EINVAL; 278 return -EINVAL;
291 } 279 }
292 280
293 switch (op->constellation) { 281 switch (c->modulation) {
294 case QPSK: 282 case QPSK:
295 break; 283 break;
296 case QAM_AUTO: 284 case QAM_AUTO:
@@ -304,7 +292,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
304 return -EINVAL; 292 return -EINVAL;
305 } 293 }
306 294
307 switch (op->transmission_mode) { 295 switch (c->transmission_mode) {
308 case TRANSMISSION_MODE_2K: 296 case TRANSMISSION_MODE_2K:
309 case TRANSMISSION_MODE_AUTO: 297 case TRANSMISSION_MODE_AUTO:
310 break; 298 break;
@@ -315,7 +303,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
315 return -EINVAL; 303 return -EINVAL;
316 } 304 }
317 305
318 switch (op->guard_interval) { 306 switch (c->guard_interval) {
319 case GUARD_INTERVAL_1_32: 307 case GUARD_INTERVAL_1_32:
320 case GUARD_INTERVAL_AUTO: 308 case GUARD_INTERVAL_AUTO:
321 break; 309 break;
@@ -332,7 +320,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
332 return -EINVAL; 320 return -EINVAL;
333 } 321 }
334 322
335 switch (op->hierarchy_information) { 323 switch (c->hierarchy) {
336 case HIERARCHY_AUTO: 324 case HIERARCHY_AUTO:
337 case HIERARCHY_NONE: 325 case HIERARCHY_NONE:
338 break; 326 break;
@@ -362,12 +350,12 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
362 */ 350 */
363 if (state->config.no_tuner) { 351 if (state->config.no_tuner) {
364 if (fe->ops.tuner_ops.set_params) { 352 if (fe->ops.tuner_ops.set_params) {
365 fe->ops.tuner_ops.set_params(fe, param); 353 fe->ops.tuner_ops.set_params(fe);
366 if (fe->ops.i2c_gate_ctrl) 354 if (fe->ops.i2c_gate_ctrl)
367 fe->ops.i2c_gate_ctrl(fe, 0); 355 fe->ops.i2c_gate_ctrl(fe, 0);
368 } 356 }
369 } else if (fe->ops.tuner_ops.calc_regs) { 357 } else if (fe->ops.tuner_ops.calc_regs) {
370 fe->ops.tuner_ops.calc_regs(fe, param, pllbuf + 1, 5); 358 fe->ops.tuner_ops.calc_regs(fe, pllbuf + 1, 5);
371 pllbuf[1] <<= 1; 359 pllbuf[1] <<= 1;
372 zl10353_write(fe, pllbuf, sizeof(pllbuf)); 360 zl10353_write(fe, pllbuf, sizeof(pllbuf));
373 } 361 }
@@ -383,11 +371,10 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
383 return 0; 371 return 0;
384} 372}
385 373
386static int zl10353_get_parameters(struct dvb_frontend *fe, 374static int zl10353_get_parameters(struct dvb_frontend *fe)
387 struct dvb_frontend_parameters *param)
388{ 375{
376 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
389 struct zl10353_state *state = fe->demodulator_priv; 377 struct zl10353_state *state = fe->demodulator_priv;
390 struct dvb_ofdm_parameters *op = &param->u.ofdm;
391 int s6, s9; 378 int s6, s9;
392 u16 tps; 379 u16 tps;
393 static const u8 tps_fec_to_api[8] = { 380 static const u8 tps_fec_to_api[8] = {
@@ -411,66 +398,66 @@ static int zl10353_get_parameters(struct dvb_frontend *fe,
411 tps = zl10353_read_register(state, TPS_RECEIVED_1) << 8 | 398 tps = zl10353_read_register(state, TPS_RECEIVED_1) << 8 |
412 zl10353_read_register(state, TPS_RECEIVED_0); 399 zl10353_read_register(state, TPS_RECEIVED_0);
413 400
414 op->code_rate_HP = tps_fec_to_api[(tps >> 7) & 7]; 401 c->code_rate_HP = tps_fec_to_api[(tps >> 7) & 7];
415 op->code_rate_LP = tps_fec_to_api[(tps >> 4) & 7]; 402 c->code_rate_LP = tps_fec_to_api[(tps >> 4) & 7];
416 403
417 switch ((tps >> 13) & 3) { 404 switch ((tps >> 13) & 3) {
418 case 0: 405 case 0:
419 op->constellation = QPSK; 406 c->modulation = QPSK;
420 break; 407 break;
421 case 1: 408 case 1:
422 op->constellation = QAM_16; 409 c->modulation = QAM_16;
423 break; 410 break;
424 case 2: 411 case 2:
425 op->constellation = QAM_64; 412 c->modulation = QAM_64;
426 break; 413 break;
427 default: 414 default:
428 op->constellation = QAM_AUTO; 415 c->modulation = QAM_AUTO;
429 break; 416 break;
430 } 417 }
431 418
432 op->transmission_mode = (tps & 0x01) ? TRANSMISSION_MODE_8K : 419 c->transmission_mode = (tps & 0x01) ? TRANSMISSION_MODE_8K :
433 TRANSMISSION_MODE_2K; 420 TRANSMISSION_MODE_2K;
434 421
435 switch ((tps >> 2) & 3) { 422 switch ((tps >> 2) & 3) {
436 case 0: 423 case 0:
437 op->guard_interval = GUARD_INTERVAL_1_32; 424 c->guard_interval = GUARD_INTERVAL_1_32;
438 break; 425 break;
439 case 1: 426 case 1:
440 op->guard_interval = GUARD_INTERVAL_1_16; 427 c->guard_interval = GUARD_INTERVAL_1_16;
441 break; 428 break;
442 case 2: 429 case 2:
443 op->guard_interval = GUARD_INTERVAL_1_8; 430 c->guard_interval = GUARD_INTERVAL_1_8;
444 break; 431 break;
445 case 3: 432 case 3:
446 op->guard_interval = GUARD_INTERVAL_1_4; 433 c->guard_interval = GUARD_INTERVAL_1_4;
447 break; 434 break;
448 default: 435 default:
449 op->guard_interval = GUARD_INTERVAL_AUTO; 436 c->guard_interval = GUARD_INTERVAL_AUTO;
450 break; 437 break;
451 } 438 }
452 439
453 switch ((tps >> 10) & 7) { 440 switch ((tps >> 10) & 7) {
454 case 0: 441 case 0:
455 op->hierarchy_information = HIERARCHY_NONE; 442 c->hierarchy = HIERARCHY_NONE;
456 break; 443 break;
457 case 1: 444 case 1:
458 op->hierarchy_information = HIERARCHY_1; 445 c->hierarchy = HIERARCHY_1;
459 break; 446 break;
460 case 2: 447 case 2:
461 op->hierarchy_information = HIERARCHY_2; 448 c->hierarchy = HIERARCHY_2;
462 break; 449 break;
463 case 3: 450 case 3:
464 op->hierarchy_information = HIERARCHY_4; 451 c->hierarchy = HIERARCHY_4;
465 break; 452 break;
466 default: 453 default:
467 op->hierarchy_information = HIERARCHY_AUTO; 454 c->hierarchy = HIERARCHY_AUTO;
468 break; 455 break;
469 } 456 }
470 457
471 param->frequency = state->frequency; 458 c->frequency = state->frequency;
472 op->bandwidth = state->bandwidth; 459 c->bandwidth_hz = state->bandwidth;
473 param->inversion = INVERSION_AUTO; 460 c->inversion = INVERSION_AUTO;
474 461
475 return 0; 462 return 0;
476} 463}
@@ -651,10 +638,9 @@ error:
651} 638}
652 639
653static struct dvb_frontend_ops zl10353_ops = { 640static struct dvb_frontend_ops zl10353_ops = {
654 641 .delsys = { SYS_DVBT },
655 .info = { 642 .info = {
656 .name = "Zarlink ZL10353 DVB-T", 643 .name = "Zarlink ZL10353 DVB-T",
657 .type = FE_OFDM,
658 .frequency_min = 174000000, 644 .frequency_min = 174000000,
659 .frequency_max = 862000000, 645 .frequency_max = 862000000,
660 .frequency_stepsize = 166667, 646 .frequency_stepsize = 166667,
diff --git a/drivers/media/dvb/mantis/mantis_vp1033.c b/drivers/media/dvb/mantis/mantis_vp1033.c
index 2ae0afa7756..ad013e93ed1 100644
--- a/drivers/media/dvb/mantis/mantis_vp1033.c
+++ b/drivers/media/dvb/mantis/mantis_vp1033.c
@@ -83,9 +83,9 @@ u8 lgtdqcs001f_inittab[] = {
83#define MANTIS_MODEL_NAME "VP-1033" 83#define MANTIS_MODEL_NAME "VP-1033"
84#define MANTIS_DEV_TYPE "DVB-S/DSS" 84#define MANTIS_DEV_TYPE "DVB-S/DSS"
85 85
86int lgtdqcs001f_tuner_set(struct dvb_frontend *fe, 86int lgtdqcs001f_tuner_set(struct dvb_frontend *fe)
87 struct dvb_frontend_parameters *params)
88{ 87{
88 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
89 struct mantis_pci *mantis = fe->dvb->priv; 89 struct mantis_pci *mantis = fe->dvb->priv;
90 struct i2c_adapter *adapter = &mantis->adapter; 90 struct i2c_adapter *adapter = &mantis->adapter;
91 91
@@ -95,14 +95,14 @@ int lgtdqcs001f_tuner_set(struct dvb_frontend *fe,
95 95
96 struct i2c_msg msg = {.addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf)}; 96 struct i2c_msg msg = {.addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf)};
97 97
98 div = params->frequency / 250; 98 div = p->frequency / 250;
99 99
100 buf[0] = (div >> 8) & 0x7f; 100 buf[0] = (div >> 8) & 0x7f;
101 buf[1] = div & 0xff; 101 buf[1] = div & 0xff;
102 buf[2] = 0x83; 102 buf[2] = 0x83;
103 buf[3] = 0xc0; 103 buf[3] = 0xc0;
104 104
105 if (params->frequency < 1531000) 105 if (p->frequency < 1531000)
106 buf[3] |= 0x04; 106 buf[3] |= 0x04;
107 else 107 else
108 buf[3] &= ~0x04; 108 buf[3] &= ~0x04;
diff --git a/drivers/media/dvb/mantis/mantis_vp2033.c b/drivers/media/dvb/mantis/mantis_vp2033.c
index 06da0ddf05a..1ca6837fbe4 100644
--- a/drivers/media/dvb/mantis/mantis_vp2033.c
+++ b/drivers/media/dvb/mantis/mantis_vp2033.c
@@ -65,8 +65,9 @@ static u8 read_pwm(struct mantis_pci *mantis)
65 return pwm; 65 return pwm;
66} 66}
67 67
68static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 68static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe)
69{ 69{
70 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
70 struct mantis_pci *mantis = fe->dvb->priv; 71 struct mantis_pci *mantis = fe->dvb->priv;
71 struct i2c_adapter *adapter = &mantis->adapter; 72 struct i2c_adapter *adapter = &mantis->adapter;
72 73
@@ -77,13 +78,13 @@ static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe, struct dvb_fronten
77#define CU1216_IF 36125000 78#define CU1216_IF 36125000
78#define TUNER_MUL 62500 79#define TUNER_MUL 62500
79 80
80 u32 div = (params->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL; 81 u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
81 82
82 buf[0] = (div >> 8) & 0x7f; 83 buf[0] = (div >> 8) & 0x7f;
83 buf[1] = div & 0xff; 84 buf[1] = div & 0xff;
84 buf[2] = 0xce; 85 buf[2] = 0xce;
85 buf[3] = (params->frequency < 150000000 ? 0x01 : 86 buf[3] = (p->frequency < 150000000 ? 0x01 :
86 params->frequency < 445000000 ? 0x02 : 0x04); 87 p->frequency < 445000000 ? 0x02 : 0x04);
87 buf[4] = 0xde; 88 buf[4] = 0xde;
88 buf[5] = 0x20; 89 buf[5] = 0x20;
89 90
diff --git a/drivers/media/dvb/mantis/mantis_vp2040.c b/drivers/media/dvb/mantis/mantis_vp2040.c
index f72b137b765..d480741afd7 100644
--- a/drivers/media/dvb/mantis/mantis_vp2040.c
+++ b/drivers/media/dvb/mantis/mantis_vp2040.c
@@ -47,8 +47,9 @@ struct tda10023_config vp2040_tda10023_cu1216_config = {
47 .invert = 1, 47 .invert = 1,
48}; 48};
49 49
50static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 50static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe)
51{ 51{
52 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
52 struct mantis_pci *mantis = fe->dvb->priv; 53 struct mantis_pci *mantis = fe->dvb->priv;
53 struct i2c_adapter *adapter = &mantis->adapter; 54 struct i2c_adapter *adapter = &mantis->adapter;
54 55
@@ -59,13 +60,13 @@ static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe, struct dvb_fronten
59#define CU1216_IF 36125000 60#define CU1216_IF 36125000
60#define TUNER_MUL 62500 61#define TUNER_MUL 62500
61 62
62 u32 div = (params->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL; 63 u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
63 64
64 buf[0] = (div >> 8) & 0x7f; 65 buf[0] = (div >> 8) & 0x7f;
65 buf[1] = div & 0xff; 66 buf[1] = div & 0xff;
66 buf[2] = 0xce; 67 buf[2] = 0xce;
67 buf[3] = (params->frequency < 150000000 ? 0x01 : 68 buf[3] = (p->frequency < 150000000 ? 0x01 :
68 params->frequency < 445000000 ? 0x02 : 0x04); 69 p->frequency < 445000000 ? 0x02 : 0x04);
69 buf[4] = 0xde; 70 buf[4] = 0xde;
70 buf[5] = 0x20; 71 buf[5] = 0x20;
71 72
diff --git a/drivers/media/dvb/ngene/ngene-cards.c b/drivers/media/dvb/ngene/ngene-cards.c
index 05641922836..8418c02bcef 100644
--- a/drivers/media/dvb/ngene/ngene-cards.c
+++ b/drivers/media/dvb/ngene/ngene-cards.c
@@ -218,7 +218,7 @@ static int demod_attach_drxk(struct ngene_channel *chan,
218 memset(&config, 0, sizeof(config)); 218 memset(&config, 0, sizeof(config));
219 config.adr = 0x29 + (chan->number ^ 2); 219 config.adr = 0x29 + (chan->number ^ 2);
220 220
221 chan->fe = dvb_attach(drxk_attach, &config, i2c, &chan->fe2); 221 chan->fe = dvb_attach(drxk_attach, &config, i2c);
222 if (!chan->fe) { 222 if (!chan->fe) {
223 printk(KERN_ERR "No DRXK found!\n"); 223 printk(KERN_ERR "No DRXK found!\n");
224 return -ENODEV; 224 return -ENODEV;
diff --git a/drivers/media/dvb/pluto2/pluto2.c b/drivers/media/dvb/pluto2/pluto2.c
index 80fb5100446..e1f20c23698 100644
--- a/drivers/media/dvb/pluto2/pluto2.c
+++ b/drivers/media/dvb/pluto2/pluto2.c
@@ -445,9 +445,9 @@ static inline u32 divide(u32 numerator, u32 denominator)
445} 445}
446 446
447/* LG Innotek TDTE-E001P (Infineon TUA6034) */ 447/* LG Innotek TDTE-E001P (Infineon TUA6034) */
448static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe, 448static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe)
449 struct dvb_frontend_parameters *p)
450{ 449{
450 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
451 struct pluto *pluto = frontend_to_pluto(fe); 451 struct pluto *pluto = frontend_to_pluto(fe);
452 struct i2c_msg msg; 452 struct i2c_msg msg;
453 int ret; 453 int ret;
@@ -478,7 +478,7 @@ static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
478 else 478 else
479 buf[3] = 0x04; 479 buf[3] = 0x04;
480 480
481 if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 481 if (p->bandwidth_hz == 8000000)
482 buf[3] |= 0x08; 482 buf[3] |= 0x08;
483 483
484 if (sizeof(buf) == 6) { 484 if (sizeof(buf) == 6) {
diff --git a/drivers/media/dvb/pt1/va1j5jf8007s.c b/drivers/media/dvb/pt1/va1j5jf8007s.c
index 451641c0c1d..d980dfb21e5 100644
--- a/drivers/media/dvb/pt1/va1j5jf8007s.c
+++ b/drivers/media/dvb/pt1/va1j5jf8007s.c
@@ -385,7 +385,7 @@ va1j5jf8007s_check_ts_id(struct va1j5jf8007s_state *state, int *lock)
385 385
386static int 386static int
387va1j5jf8007s_tune(struct dvb_frontend *fe, 387va1j5jf8007s_tune(struct dvb_frontend *fe,
388 struct dvb_frontend_parameters *params, 388 bool re_tune,
389 unsigned int mode_flags, unsigned int *delay, 389 unsigned int mode_flags, unsigned int *delay,
390 fe_status_t *status) 390 fe_status_t *status)
391{ 391{
@@ -395,7 +395,7 @@ va1j5jf8007s_tune(struct dvb_frontend *fe,
395 395
396 state = fe->demodulator_priv; 396 state = fe->demodulator_priv;
397 397
398 if (params != NULL) 398 if (re_tune)
399 state->tune_state = VA1J5JF8007S_SET_FREQUENCY_1; 399 state->tune_state = VA1J5JF8007S_SET_FREQUENCY_1;
400 400
401 switch (state->tune_state) { 401 switch (state->tune_state) {
@@ -579,9 +579,9 @@ static void va1j5jf8007s_release(struct dvb_frontend *fe)
579} 579}
580 580
581static struct dvb_frontend_ops va1j5jf8007s_ops = { 581static struct dvb_frontend_ops va1j5jf8007s_ops = {
582 .delsys = { SYS_ISDBS },
582 .info = { 583 .info = {
583 .name = "VA1J5JF8007/VA1J5JF8011 ISDB-S", 584 .name = "VA1J5JF8007/VA1J5JF8011 ISDB-S",
584 .type = FE_QPSK,
585 .frequency_min = 950000, 585 .frequency_min = 950000,
586 .frequency_max = 2150000, 586 .frequency_max = 2150000,
587 .frequency_stepsize = 1000, 587 .frequency_stepsize = 1000,
diff --git a/drivers/media/dvb/pt1/va1j5jf8007t.c b/drivers/media/dvb/pt1/va1j5jf8007t.c
index 0f085c3e571..2db15159d51 100644
--- a/drivers/media/dvb/pt1/va1j5jf8007t.c
+++ b/drivers/media/dvb/pt1/va1j5jf8007t.c
@@ -264,7 +264,7 @@ static int va1j5jf8007t_check_modulation(struct va1j5jf8007t_state *state,
264 264
265static int 265static int
266va1j5jf8007t_tune(struct dvb_frontend *fe, 266va1j5jf8007t_tune(struct dvb_frontend *fe,
267 struct dvb_frontend_parameters *params, 267 bool re_tune,
268 unsigned int mode_flags, unsigned int *delay, 268 unsigned int mode_flags, unsigned int *delay,
269 fe_status_t *status) 269 fe_status_t *status)
270{ 270{
@@ -274,7 +274,7 @@ va1j5jf8007t_tune(struct dvb_frontend *fe,
274 274
275 state = fe->demodulator_priv; 275 state = fe->demodulator_priv;
276 276
277 if (params != NULL) 277 if (re_tune)
278 state->tune_state = VA1J5JF8007T_SET_FREQUENCY; 278 state->tune_state = VA1J5JF8007T_SET_FREQUENCY;
279 279
280 switch (state->tune_state) { 280 switch (state->tune_state) {
@@ -428,9 +428,9 @@ static void va1j5jf8007t_release(struct dvb_frontend *fe)
428} 428}
429 429
430static struct dvb_frontend_ops va1j5jf8007t_ops = { 430static struct dvb_frontend_ops va1j5jf8007t_ops = {
431 .delsys = { SYS_ISDBT },
431 .info = { 432 .info = {
432 .name = "VA1J5JF8007/VA1J5JF8011 ISDB-T", 433 .name = "VA1J5JF8007/VA1J5JF8011 ISDB-T",
433 .type = FE_OFDM,
434 .frequency_min = 90000000, 434 .frequency_min = 90000000,
435 .frequency_max = 770000000, 435 .frequency_max = 770000000,
436 .frequency_stepsize = 142857, 436 .frequency_stepsize = 142857,
diff --git a/drivers/media/dvb/siano/smsdvb.c b/drivers/media/dvb/siano/smsdvb.c
index 37c594f8278..654685c9303 100644
--- a/drivers/media/dvb/siano/smsdvb.c
+++ b/drivers/media/dvb/siano/smsdvb.c
@@ -50,7 +50,7 @@ struct smsdvb_client_t {
50 struct completion tune_done; 50 struct completion tune_done;
51 51
52 /* todo: save freq/band instead whole struct */ 52 /* todo: save freq/band instead whole struct */
53 struct dvb_frontend_parameters fe_params; 53 struct dtv_frontend_properties fe_params;
54 54
55 struct SMSHOSTLIB_STATISTICS_DVB_S sms_stat_dvb; 55 struct SMSHOSTLIB_STATISTICS_DVB_S sms_stat_dvb;
56 int event_fe_state; 56 int event_fe_state;
@@ -591,8 +591,7 @@ static int smsdvb_get_tune_settings(struct dvb_frontend *fe,
591 return 0; 591 return 0;
592} 592}
593 593
594static int smsdvb_dvbt_set_frontend(struct dvb_frontend *fe, 594static int smsdvb_dvbt_set_frontend(struct dvb_frontend *fe)
595 struct dvb_frontend_parameters *p)
596{ 595{
597 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 596 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
598 struct smsdvb_client_t *client = 597 struct smsdvb_client_t *client =
@@ -658,8 +657,7 @@ static int smsdvb_dvbt_set_frontend(struct dvb_frontend *fe,
658 &client->tune_done); 657 &client->tune_done);
659} 658}
660 659
661static int smsdvb_isdbt_set_frontend(struct dvb_frontend *fe, 660static int smsdvb_isdbt_set_frontend(struct dvb_frontend *fe)
662 struct dvb_frontend_parameters *p)
663{ 661{
664 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 662 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
665 struct smsdvb_client_t *client = 663 struct smsdvb_client_t *client =
@@ -723,8 +721,7 @@ static int smsdvb_isdbt_set_frontend(struct dvb_frontend *fe,
723 &client->tune_done); 721 &client->tune_done);
724} 722}
725 723
726static int smsdvb_set_frontend(struct dvb_frontend *fe, 724static int smsdvb_set_frontend(struct dvb_frontend *fe)
727 struct dvb_frontend_parameters *fep)
728{ 725{
729 struct smsdvb_client_t *client = 726 struct smsdvb_client_t *client =
730 container_of(fe, struct smsdvb_client_t, frontend); 727 container_of(fe, struct smsdvb_client_t, frontend);
@@ -733,18 +730,18 @@ static int smsdvb_set_frontend(struct dvb_frontend *fe,
733 switch (smscore_get_device_mode(coredev)) { 730 switch (smscore_get_device_mode(coredev)) {
734 case DEVICE_MODE_DVBT: 731 case DEVICE_MODE_DVBT:
735 case DEVICE_MODE_DVBT_BDA: 732 case DEVICE_MODE_DVBT_BDA:
736 return smsdvb_dvbt_set_frontend(fe, fep); 733 return smsdvb_dvbt_set_frontend(fe);
737 case DEVICE_MODE_ISDBT: 734 case DEVICE_MODE_ISDBT:
738 case DEVICE_MODE_ISDBT_BDA: 735 case DEVICE_MODE_ISDBT_BDA:
739 return smsdvb_isdbt_set_frontend(fe, fep); 736 return smsdvb_isdbt_set_frontend(fe);
740 default: 737 default:
741 return -EINVAL; 738 return -EINVAL;
742 } 739 }
743} 740}
744 741
745static int smsdvb_get_frontend(struct dvb_frontend *fe, 742static int smsdvb_get_frontend(struct dvb_frontend *fe)
746 struct dvb_frontend_parameters *fep)
747{ 743{
744 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
748 struct smsdvb_client_t *client = 745 struct smsdvb_client_t *client =
749 container_of(fe, struct smsdvb_client_t, frontend); 746 container_of(fe, struct smsdvb_client_t, frontend);
750 747
@@ -752,7 +749,7 @@ static int smsdvb_get_frontend(struct dvb_frontend *fe,
752 749
753 /* todo: */ 750 /* todo: */
754 memcpy(fep, &client->fe_params, 751 memcpy(fep, &client->fe_params,
755 sizeof(struct dvb_frontend_parameters)); 752 sizeof(struct dtv_frontend_properties));
756 753
757 return 0; 754 return 0;
758} 755}
@@ -789,7 +786,6 @@ static void smsdvb_release(struct dvb_frontend *fe)
789static struct dvb_frontend_ops smsdvb_fe_ops = { 786static struct dvb_frontend_ops smsdvb_fe_ops = {
790 .info = { 787 .info = {
791 .name = "Siano Mobile Digital MDTV Receiver", 788 .name = "Siano Mobile Digital MDTV Receiver",
792 .type = FE_OFDM,
793 .frequency_min = 44250000, 789 .frequency_min = 44250000,
794 .frequency_max = 867250000, 790 .frequency_max = 867250000,
795 .frequency_stepsize = 250000, 791 .frequency_stepsize = 250000,
@@ -873,6 +869,17 @@ static int smsdvb_hotplug(struct smscore_device_t *coredev,
873 memcpy(&client->frontend.ops, &smsdvb_fe_ops, 869 memcpy(&client->frontend.ops, &smsdvb_fe_ops,
874 sizeof(struct dvb_frontend_ops)); 870 sizeof(struct dvb_frontend_ops));
875 871
872 switch (smscore_get_device_mode(coredev)) {
873 case DEVICE_MODE_DVBT:
874 case DEVICE_MODE_DVBT_BDA:
875 smsdvb_fe_ops.delsys[0] = SYS_DVBT;
876 break;
877 case DEVICE_MODE_ISDBT:
878 case DEVICE_MODE_ISDBT_BDA:
879 smsdvb_fe_ops.delsys[0] = SYS_ISDBT;
880 break;
881 }
882
876 rc = dvb_register_frontend(&client->adapter, &client->frontend); 883 rc = dvb_register_frontend(&client->adapter, &client->frontend);
877 if (rc < 0) { 884 if (rc < 0) {
878 sms_err("frontend registration failed %d", rc); 885 sms_err("frontend registration failed %d", rc);
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c
index 3d20719fce1..6ecbcf61487 100644
--- a/drivers/media/dvb/ttpci/av7110.c
+++ b/drivers/media/dvb/ttpci/av7110.c
@@ -991,7 +991,7 @@ static int av7110_start_feed(struct dvb_demux_feed *feed)
991 991
992 if (feed->type == DMX_TYPE_TS) { 992 if (feed->type == DMX_TYPE_TS) {
993 if ((feed->ts_type & TS_DECODER) && 993 if ((feed->ts_type & TS_DECODER) &&
994 (feed->pes_type < DMX_TS_PES_OTHER)) { 994 (feed->pes_type <= DMX_TS_PES_PCR)) {
995 switch (demux->dmx.frontend->source) { 995 switch (demux->dmx.frontend->source) {
996 case DMX_MEMORY_FE: 996 case DMX_MEMORY_FE:
997 if (feed->ts_type & TS_DECODER) 997 if (feed->ts_type & TS_DECODER)
@@ -1568,20 +1568,27 @@ static int get_firmware(struct av7110* av7110)
1568 return ret; 1568 return ret;
1569} 1569}
1570 1570
1571static int alps_bsrv2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1571static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
1572{ 1572{
1573 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1573 struct av7110* av7110 = fe->dvb->priv; 1574 struct av7110* av7110 = fe->dvb->priv;
1574 u8 pwr = 0; 1575 u8 pwr = 0;
1575 u8 buf[4]; 1576 u8 buf[4];
1576 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; 1577 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
1577 u32 div = (params->frequency + 479500) / 125; 1578 u32 div = (p->frequency + 479500) / 125;
1578 1579
1579 if (params->frequency > 2000000) pwr = 3; 1580 if (p->frequency > 2000000)
1580 else if (params->frequency > 1800000) pwr = 2; 1581 pwr = 3;
1581 else if (params->frequency > 1600000) pwr = 1; 1582 else if (p->frequency > 1800000)
1582 else if (params->frequency > 1200000) pwr = 0; 1583 pwr = 2;
1583 else if (params->frequency >= 1100000) pwr = 1; 1584 else if (p->frequency > 1600000)
1584 else pwr = 2; 1585 pwr = 1;
1586 else if (p->frequency > 1200000)
1587 pwr = 0;
1588 else if (p->frequency >= 1100000)
1589 pwr = 1;
1590 else
1591 pwr = 2;
1585 1592
1586 buf[0] = (div >> 8) & 0x7f; 1593 buf[0] = (div >> 8) & 0x7f;
1587 buf[1] = div & 0xff; 1594 buf[1] = div & 0xff;
@@ -1604,19 +1611,20 @@ static struct ves1x93_config alps_bsrv2_config = {
1604 .invert_pwm = 0, 1611 .invert_pwm = 0,
1605}; 1612};
1606 1613
1607static int alps_tdbe2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1614static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
1608{ 1615{
1616 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1609 struct av7110* av7110 = fe->dvb->priv; 1617 struct av7110* av7110 = fe->dvb->priv;
1610 u32 div; 1618 u32 div;
1611 u8 data[4]; 1619 u8 data[4];
1612 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) }; 1620 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1613 1621
1614 div = (params->frequency + 35937500 + 31250) / 62500; 1622 div = (p->frequency + 35937500 + 31250) / 62500;
1615 1623
1616 data[0] = (div >> 8) & 0x7f; 1624 data[0] = (div >> 8) & 0x7f;
1617 data[1] = div & 0xff; 1625 data[1] = div & 0xff;
1618 data[2] = 0x85 | ((div >> 10) & 0x60); 1626 data[2] = 0x85 | ((div >> 10) & 0x60);
1619 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81); 1627 data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
1620 1628
1621 if (fe->ops.i2c_gate_ctrl) 1629 if (fe->ops.i2c_gate_ctrl)
1622 fe->ops.i2c_gate_ctrl(fe, 1); 1630 fe->ops.i2c_gate_ctrl(fe, 1);
@@ -1635,14 +1643,15 @@ static struct ves1820_config alps_tdbe2_config = {
1635 1643
1636 1644
1637 1645
1638static int grundig_29504_451_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1646static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
1639{ 1647{
1648 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1640 struct av7110* av7110 = fe->dvb->priv; 1649 struct av7110* av7110 = fe->dvb->priv;
1641 u32 div; 1650 u32 div;
1642 u8 data[4]; 1651 u8 data[4];
1643 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 1652 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1644 1653
1645 div = params->frequency / 125; 1654 div = p->frequency / 125;
1646 data[0] = (div >> 8) & 0x7f; 1655 data[0] = (div >> 8) & 0x7f;
1647 data[1] = div & 0xff; 1656 data[1] = div & 0xff;
1648 data[2] = 0x8e; 1657 data[2] = 0x8e;
@@ -1661,11 +1670,12 @@ static struct tda8083_config grundig_29504_451_config = {
1661 1670
1662 1671
1663 1672
1664static int philips_cd1516_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1673static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe)
1665{ 1674{
1675 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1666 struct av7110* av7110 = fe->dvb->priv; 1676 struct av7110* av7110 = fe->dvb->priv;
1667 u32 div; 1677 u32 div;
1668 u32 f = params->frequency; 1678 u32 f = p->frequency;
1669 u8 data[4]; 1679 u8 data[4];
1670 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 1680 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1671 1681
@@ -1692,16 +1702,17 @@ static struct ves1820_config philips_cd1516_config = {
1692 1702
1693 1703
1694 1704
1695static int alps_tdlb7_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1705static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe)
1696{ 1706{
1707 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1697 struct av7110* av7110 = fe->dvb->priv; 1708 struct av7110* av7110 = fe->dvb->priv;
1698 u32 div, pwr; 1709 u32 div, pwr;
1699 u8 data[4]; 1710 u8 data[4];
1700 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) }; 1711 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1701 1712
1702 div = (params->frequency + 36200000) / 166666; 1713 div = (p->frequency + 36200000) / 166666;
1703 1714
1704 if (params->frequency <= 782000000) 1715 if (p->frequency <= 782000000)
1705 pwr = 1; 1716 pwr = 1;
1706 else 1717 else
1707 pwr = 2; 1718 pwr = 2;
@@ -1829,8 +1840,9 @@ static u8 nexusca_stv0297_inittab[] = {
1829 0xff, 0xff, 1840 0xff, 0xff,
1830}; 1841};
1831 1842
1832static int nexusca_stv0297_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1843static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe)
1833{ 1844{
1845 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1834 struct av7110* av7110 = fe->dvb->priv; 1846 struct av7110* av7110 = fe->dvb->priv;
1835 u32 div; 1847 u32 div;
1836 u8 data[4]; 1848 u8 data[4];
@@ -1838,19 +1850,19 @@ static int nexusca_stv0297_tuner_set_params(struct dvb_frontend* fe, struct dvb_
1838 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 }; 1850 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1839 int i; 1851 int i;
1840 1852
1841 div = (params->frequency + 36150000 + 31250) / 62500; 1853 div = (p->frequency + 36150000 + 31250) / 62500;
1842 1854
1843 data[0] = (div >> 8) & 0x7f; 1855 data[0] = (div >> 8) & 0x7f;
1844 data[1] = div & 0xff; 1856 data[1] = div & 0xff;
1845 data[2] = 0xce; 1857 data[2] = 0xce;
1846 1858
1847 if (params->frequency < 45000000) 1859 if (p->frequency < 45000000)
1848 return -EINVAL; 1860 return -EINVAL;
1849 else if (params->frequency < 137000000) 1861 else if (p->frequency < 137000000)
1850 data[3] = 0x01; 1862 data[3] = 0x01;
1851 else if (params->frequency < 403000000) 1863 else if (p->frequency < 403000000)
1852 data[3] = 0x02; 1864 data[3] = 0x02;
1853 else if (params->frequency < 860000000) 1865 else if (p->frequency < 860000000)
1854 data[3] = 0x04; 1866 data[3] = 0x04;
1855 else 1867 else
1856 return -EINVAL; 1868 return -EINVAL;
@@ -1884,27 +1896,36 @@ static struct stv0297_config nexusca_stv0297_config = {
1884 1896
1885 1897
1886 1898
1887static int grundig_29504_401_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params) 1899static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
1888{ 1900{
1901 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1889 struct av7110* av7110 = fe->dvb->priv; 1902 struct av7110* av7110 = fe->dvb->priv;
1890 u32 div; 1903 u32 div;
1891 u8 cfg, cpump, band_select; 1904 u8 cfg, cpump, band_select;
1892 u8 data[4]; 1905 u8 data[4];
1893 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 1906 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1894 1907
1895 div = (36125000 + params->frequency) / 166666; 1908 div = (36125000 + p->frequency) / 166666;
1896 1909
1897 cfg = 0x88; 1910 cfg = 0x88;
1898 1911
1899 if (params->frequency < 175000000) cpump = 2; 1912 if (p->frequency < 175000000)
1900 else if (params->frequency < 390000000) cpump = 1; 1913 cpump = 2;
1901 else if (params->frequency < 470000000) cpump = 2; 1914 else if (p->frequency < 390000000)
1902 else if (params->frequency < 750000000) cpump = 1; 1915 cpump = 1;
1903 else cpump = 3; 1916 else if (p->frequency < 470000000)
1917 cpump = 2;
1918 else if (p->frequency < 750000000)
1919 cpump = 1;
1920 else
1921 cpump = 3;
1904 1922
1905 if (params->frequency < 175000000) band_select = 0x0e; 1923 if (p->frequency < 175000000)
1906 else if (params->frequency < 470000000) band_select = 0x05; 1924 band_select = 0x0e;
1907 else band_select = 0x03; 1925 else if (p->frequency < 470000000)
1926 band_select = 0x05;
1927 else
1928 band_select = 0x03;
1908 1929
1909 data[0] = (div >> 8) & 0x7f; 1930 data[0] = (div >> 8) & 0x7f;
1910 data[1] = div & 0xff; 1931 data[1] = div & 0xff;
@@ -1964,15 +1985,14 @@ static int av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status)
1964 return ret; 1985 return ret;
1965} 1986}
1966 1987
1967static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 1988static int av7110_fe_set_frontend(struct dvb_frontend *fe)
1968{ 1989{
1969 struct av7110* av7110 = fe->dvb->priv; 1990 struct av7110* av7110 = fe->dvb->priv;
1970 1991
1971 int ret = av7110_fe_lock_fix(av7110, 0); 1992 int ret = av7110_fe_lock_fix(av7110, 0);
1972 if (!ret) { 1993 if (!ret)
1973 av7110->saved_fe_params = *params; 1994 ret = av7110->fe_set_frontend(fe);
1974 ret = av7110->fe_set_frontend(fe, params); 1995
1975 }
1976 return ret; 1996 return ret;
1977} 1997}
1978 1998
@@ -2081,7 +2101,7 @@ static void dvb_s_recover(struct av7110* av7110)
2081 msleep(20); 2101 msleep(20);
2082 av7110_fe_set_tone(av7110->fe, av7110->saved_tone); 2102 av7110_fe_set_tone(av7110->fe, av7110->saved_tone);
2083 2103
2084 av7110_fe_set_frontend(av7110->fe, &av7110->saved_fe_params); 2104 av7110_fe_set_frontend(av7110->fe);
2085} 2105}
2086 2106
2087static u8 read_pwm(struct av7110* av7110) 2107static u8 read_pwm(struct av7110* av7110)
diff --git a/drivers/media/dvb/ttpci/av7110.h b/drivers/media/dvb/ttpci/av7110.h
index d85b8512ac3..88b3b2d6cc0 100644
--- a/drivers/media/dvb/ttpci/av7110.h
+++ b/drivers/media/dvb/ttpci/av7110.h
@@ -272,7 +272,6 @@ struct av7110 {
272 272
273 /* crash recovery */ 273 /* crash recovery */
274 void (*recover)(struct av7110* av7110); 274 void (*recover)(struct av7110* av7110);
275 struct dvb_frontend_parameters saved_fe_params;
276 fe_sec_voltage_t saved_voltage; 275 fe_sec_voltage_t saved_voltage;
277 fe_sec_tone_mode_t saved_tone; 276 fe_sec_tone_mode_t saved_tone;
278 struct dvb_diseqc_master_cmd saved_master_cmd; 277 struct dvb_diseqc_master_cmd saved_master_cmd;
@@ -286,7 +285,7 @@ struct av7110 {
286 int (*fe_set_tone)(struct dvb_frontend* fe, fe_sec_tone_mode_t tone); 285 int (*fe_set_tone)(struct dvb_frontend* fe, fe_sec_tone_mode_t tone);
287 int (*fe_set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage); 286 int (*fe_set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage);
288 int (*fe_dishnetwork_send_legacy_command)(struct dvb_frontend* fe, unsigned long cmd); 287 int (*fe_dishnetwork_send_legacy_command)(struct dvb_frontend* fe, unsigned long cmd);
289 int (*fe_set_frontend)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); 288 int (*fe_set_frontend)(struct dvb_frontend *fe);
290}; 289};
291 290
292 291
diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c
index 78d32f7e49f..8b32e282bf5 100644
--- a/drivers/media/dvb/ttpci/budget-av.c
+++ b/drivers/media/dvb/ttpci/budget-av.c
@@ -502,33 +502,33 @@ static int philips_su1278_ty_ci_set_symbol_rate(struct dvb_frontend *fe, u32 sra
502 return 0; 502 return 0;
503} 503}
504 504
505static int philips_su1278_ty_ci_tuner_set_params(struct dvb_frontend *fe, 505static int philips_su1278_ty_ci_tuner_set_params(struct dvb_frontend *fe)
506 struct dvb_frontend_parameters *params)
507{ 506{
507 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
508 u32 div; 508 u32 div;
509 u8 buf[4]; 509 u8 buf[4];
510 struct budget *budget = (struct budget *) fe->dvb->priv; 510 struct budget *budget = (struct budget *) fe->dvb->priv;
511 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) }; 511 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) };
512 512
513 if ((params->frequency < 950000) || (params->frequency > 2150000)) 513 if ((c->frequency < 950000) || (c->frequency > 2150000))
514 return -EINVAL; 514 return -EINVAL;
515 515
516 div = (params->frequency + (125 - 1)) / 125; // round correctly 516 div = (c->frequency + (125 - 1)) / 125; /* round correctly */
517 buf[0] = (div >> 8) & 0x7f; 517 buf[0] = (div >> 8) & 0x7f;
518 buf[1] = div & 0xff; 518 buf[1] = div & 0xff;
519 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; 519 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
520 buf[3] = 0x20; 520 buf[3] = 0x20;
521 521
522 if (params->u.qpsk.symbol_rate < 4000000) 522 if (c->symbol_rate < 4000000)
523 buf[3] |= 1; 523 buf[3] |= 1;
524 524
525 if (params->frequency < 1250000) 525 if (c->frequency < 1250000)
526 buf[3] |= 0; 526 buf[3] |= 0;
527 else if (params->frequency < 1550000) 527 else if (c->frequency < 1550000)
528 buf[3] |= 0x40; 528 buf[3] |= 0x40;
529 else if (params->frequency < 2050000) 529 else if (c->frequency < 2050000)
530 buf[3] |= 0x80; 530 buf[3] |= 0x80;
531 else if (params->frequency < 2150000) 531 else if (c->frequency < 2150000)
532 buf[3] |= 0xC0; 532 buf[3] |= 0xC0;
533 533
534 if (fe->ops.i2c_gate_ctrl) 534 if (fe->ops.i2c_gate_ctrl)
@@ -617,8 +617,9 @@ static struct stv0299_config cinergy_1200s_1894_0010_config = {
617 .set_symbol_rate = philips_su1278_ty_ci_set_symbol_rate, 617 .set_symbol_rate = philips_su1278_ty_ci_set_symbol_rate,
618}; 618};
619 619
620static int philips_cu1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 620static int philips_cu1216_tuner_set_params(struct dvb_frontend *fe)
621{ 621{
622 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
622 struct budget *budget = (struct budget *) fe->dvb->priv; 623 struct budget *budget = (struct budget *) fe->dvb->priv;
623 u8 buf[6]; 624 u8 buf[6];
624 struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) }; 625 struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
@@ -627,13 +628,13 @@ static int philips_cu1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_f
627#define CU1216_IF 36125000 628#define CU1216_IF 36125000
628#define TUNER_MUL 62500 629#define TUNER_MUL 62500
629 630
630 u32 div = (params->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL; 631 u32 div = (c->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
631 632
632 buf[0] = (div >> 8) & 0x7f; 633 buf[0] = (div >> 8) & 0x7f;
633 buf[1] = div & 0xff; 634 buf[1] = div & 0xff;
634 buf[2] = 0xce; 635 buf[2] = 0xce;
635 buf[3] = (params->frequency < 150000000 ? 0x01 : 636 buf[3] = (c->frequency < 150000000 ? 0x01 :
636 params->frequency < 445000000 ? 0x02 : 0x04); 637 c->frequency < 445000000 ? 0x02 : 0x04);
637 buf[4] = 0xde; 638 buf[4] = 0xde;
638 buf[5] = 0x20; 639 buf[5] = 0x20;
639 640
@@ -697,8 +698,9 @@ static int philips_tu1216_tuner_init(struct dvb_frontend *fe)
697 return 0; 698 return 0;
698} 699}
699 700
700static int philips_tu1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 701static int philips_tu1216_tuner_set_params(struct dvb_frontend *fe)
701{ 702{
703 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
702 struct budget *budget = (struct budget *) fe->dvb->priv; 704 struct budget *budget = (struct budget *) fe->dvb->priv;
703 u8 tuner_buf[4]; 705 u8 tuner_buf[4];
704 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,.len = 706 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,.len =
@@ -707,7 +709,7 @@ static int philips_tu1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_f
707 u8 band, cp, filter; 709 u8 band, cp, filter;
708 710
709 // determine charge pump 711 // determine charge pump
710 tuner_frequency = params->frequency + 36166000; 712 tuner_frequency = c->frequency + 36166000;
711 if (tuner_frequency < 87000000) 713 if (tuner_frequency < 87000000)
712 return -EINVAL; 714 return -EINVAL;
713 else if (tuner_frequency < 130000000) 715 else if (tuner_frequency < 130000000)
@@ -732,28 +734,28 @@ static int philips_tu1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_f
732 return -EINVAL; 734 return -EINVAL;
733 735
734 // determine band 736 // determine band
735 if (params->frequency < 49000000) 737 if (c->frequency < 49000000)
736 return -EINVAL; 738 return -EINVAL;
737 else if (params->frequency < 161000000) 739 else if (c->frequency < 161000000)
738 band = 1; 740 band = 1;
739 else if (params->frequency < 444000000) 741 else if (c->frequency < 444000000)
740 band = 2; 742 band = 2;
741 else if (params->frequency < 861000000) 743 else if (c->frequency < 861000000)
742 band = 4; 744 band = 4;
743 else 745 else
744 return -EINVAL; 746 return -EINVAL;
745 747
746 // setup PLL filter 748 // setup PLL filter
747 switch (params->u.ofdm.bandwidth) { 749 switch (c->bandwidth_hz) {
748 case BANDWIDTH_6_MHZ: 750 case 6000000:
749 filter = 0; 751 filter = 0;
750 break; 752 break;
751 753
752 case BANDWIDTH_7_MHZ: 754 case 7000000:
753 filter = 0; 755 filter = 0;
754 break; 756 break;
755 757
756 case BANDWIDTH_8_MHZ: 758 case 8000000:
757 filter = 1; 759 filter = 1;
758 break; 760 break;
759 761
@@ -763,7 +765,7 @@ static int philips_tu1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_f
763 765
764 // calculate divisor 766 // calculate divisor
765 // ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) 767 // ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
766 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; 768 tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000;
767 769
768 // setup tuner buffer 770 // setup tuner buffer
769 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; 771 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index ca02e972217..98e52417876 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -193,7 +193,6 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
193 dev->input_phys = budget_ci->ir.phys; 193 dev->input_phys = budget_ci->ir.phys;
194 dev->input_id.bustype = BUS_PCI; 194 dev->input_id.bustype = BUS_PCI;
195 dev->input_id.version = 1; 195 dev->input_id.version = 1;
196 dev->scanmask = 0xff;
197 if (saa->pci->subsystem_vendor) { 196 if (saa->pci->subsystem_vendor) {
198 dev->input_id.vendor = saa->pci->subsystem_vendor; 197 dev->input_id.vendor = saa->pci->subsystem_vendor;
199 dev->input_id.product = saa->pci->subsystem_device; 198 dev->input_id.product = saa->pci->subsystem_device;
@@ -234,6 +233,8 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
234 dev->map_name = RC_MAP_BUDGET_CI_OLD; 233 dev->map_name = RC_MAP_BUDGET_CI_OLD;
235 break; 234 break;
236 } 235 }
236 if (!budget_ci->ir.full_rc5)
237 dev->scanmask = 0xff;
237 238
238 error = rc_register_device(dev); 239 error = rc_register_device(dev);
239 if (error) { 240 if (error) {
@@ -659,33 +660,33 @@ static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate,
659 return 0; 660 return 0;
660} 661}
661 662
662static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe, 663static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe)
663 struct dvb_frontend_parameters *params)
664{ 664{
665 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
665 struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; 666 struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
666 u32 div; 667 u32 div;
667 u8 buf[4]; 668 u8 buf[4];
668 struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) }; 669 struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
669 670
670 if ((params->frequency < 950000) || (params->frequency > 2150000)) 671 if ((p->frequency < 950000) || (p->frequency > 2150000))
671 return -EINVAL; 672 return -EINVAL;
672 673
673 div = (params->frequency + (500 - 1)) / 500; // round correctly 674 div = (p->frequency + (500 - 1)) / 500; /* round correctly */
674 buf[0] = (div >> 8) & 0x7f; 675 buf[0] = (div >> 8) & 0x7f;
675 buf[1] = div & 0xff; 676 buf[1] = div & 0xff;
676 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2; 677 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
677 buf[3] = 0x20; 678 buf[3] = 0x20;
678 679
679 if (params->u.qpsk.symbol_rate < 4000000) 680 if (p->symbol_rate < 4000000)
680 buf[3] |= 1; 681 buf[3] |= 1;
681 682
682 if (params->frequency < 1250000) 683 if (p->frequency < 1250000)
683 buf[3] |= 0; 684 buf[3] |= 0;
684 else if (params->frequency < 1550000) 685 else if (p->frequency < 1550000)
685 buf[3] |= 0x40; 686 buf[3] |= 0x40;
686 else if (params->frequency < 2050000) 687 else if (p->frequency < 2050000)
687 buf[3] |= 0x80; 688 buf[3] |= 0x80;
688 else if (params->frequency < 2150000) 689 else if (p->frequency < 2150000)
689 buf[3] |= 0xC0; 690 buf[3] |= 0xC0;
690 691
691 if (fe->ops.i2c_gate_ctrl) 692 if (fe->ops.i2c_gate_ctrl)
@@ -740,8 +741,9 @@ static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
740 return 0; 741 return 0;
741} 742}
742 743
743static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 744static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe)
744{ 745{
746 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
745 struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; 747 struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
746 u8 tuner_buf[4]; 748 u8 tuner_buf[4];
747 struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) }; 749 struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
@@ -749,7 +751,7 @@ static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb
749 u8 band, cp, filter; 751 u8 band, cp, filter;
750 752
751 // determine charge pump 753 // determine charge pump
752 tuner_frequency = params->frequency + 36130000; 754 tuner_frequency = p->frequency + 36130000;
753 if (tuner_frequency < 87000000) 755 if (tuner_frequency < 87000000)
754 return -EINVAL; 756 return -EINVAL;
755 else if (tuner_frequency < 130000000) 757 else if (tuner_frequency < 130000000)
@@ -774,30 +776,30 @@ static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb
774 return -EINVAL; 776 return -EINVAL;
775 777
776 // determine band 778 // determine band
777 if (params->frequency < 49000000) 779 if (p->frequency < 49000000)
778 return -EINVAL; 780 return -EINVAL;
779 else if (params->frequency < 159000000) 781 else if (p->frequency < 159000000)
780 band = 1; 782 band = 1;
781 else if (params->frequency < 444000000) 783 else if (p->frequency < 444000000)
782 band = 2; 784 band = 2;
783 else if (params->frequency < 861000000) 785 else if (p->frequency < 861000000)
784 band = 4; 786 band = 4;
785 else 787 else
786 return -EINVAL; 788 return -EINVAL;
787 789
788 // setup PLL filter and TDA9889 790 // setup PLL filter and TDA9889
789 switch (params->u.ofdm.bandwidth) { 791 switch (p->bandwidth_hz) {
790 case BANDWIDTH_6_MHZ: 792 case 6000000:
791 tda1004x_writereg(fe, 0x0C, 0x14); 793 tda1004x_writereg(fe, 0x0C, 0x14);
792 filter = 0; 794 filter = 0;
793 break; 795 break;
794 796
795 case BANDWIDTH_7_MHZ: 797 case 7000000:
796 tda1004x_writereg(fe, 0x0C, 0x80); 798 tda1004x_writereg(fe, 0x0C, 0x80);
797 filter = 0; 799 filter = 0;
798 break; 800 break;
799 801
800 case BANDWIDTH_8_MHZ: 802 case 8000000:
801 tda1004x_writereg(fe, 0x0C, 0x14); 803 tda1004x_writereg(fe, 0x0C, 0x14);
802 filter = 1; 804 filter = 1;
803 break; 805 break;
@@ -808,7 +810,7 @@ static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb
808 810
809 // calculate divisor 811 // calculate divisor
810 // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6) 812 // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
811 tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000; 813 tuner_frequency = (((p->frequency / 1000) * 6) + 217280) / 1000;
812 814
813 // setup tuner buffer 815 // setup tuner buffer
814 tuner_buf[0] = tuner_frequency >> 8; 816 tuner_buf[0] = tuner_frequency >> 8;
@@ -855,8 +857,9 @@ static struct tda1004x_config philips_tdm1316l_config_invert = {
855 .request_firmware = philips_tdm1316l_request_firmware, 857 .request_firmware = philips_tdm1316l_request_firmware,
856}; 858};
857 859
858static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 860static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe)
859{ 861{
862 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
860 struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; 863 struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
861 u8 tuner_buf[5]; 864 u8 tuner_buf[5];
862 struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address, 865 struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
@@ -867,7 +870,7 @@ static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struc
867 u8 band, cp, filter; 870 u8 band, cp, filter;
868 871
869 // determine charge pump 872 // determine charge pump
870 tuner_frequency = params->frequency + 36125000; 873 tuner_frequency = p->frequency + 36125000;
871 if (tuner_frequency < 87000000) 874 if (tuner_frequency < 87000000)
872 return -EINVAL; 875 return -EINVAL;
873 else if (tuner_frequency < 130000000) { 876 else if (tuner_frequency < 130000000) {
@@ -904,7 +907,7 @@ static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struc
904 filter = 1; 907 filter = 1;
905 908
906 // calculate divisor 909 // calculate divisor
907 tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500; 910 tuner_frequency = (p->frequency + 36125000 + (62500/2)) / 62500;
908 911
909 // setup tuner buffer 912 // setup tuner buffer
910 tuner_buf[0] = tuner_frequency >> 8; 913 tuner_buf[0] = tuner_frequency >> 8;
diff --git a/drivers/media/dvb/ttpci/budget-patch.c b/drivers/media/dvb/ttpci/budget-patch.c
index 3395d1a9051..2cb35c23d2a 100644
--- a/drivers/media/dvb/ttpci/budget-patch.c
+++ b/drivers/media/dvb/ttpci/budget-patch.c
@@ -261,19 +261,25 @@ static int budget_patch_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_c
261 return 0; 261 return 0;
262} 262}
263 263
264static int alps_bsrv2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 264static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
265{ 265{
266 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
266 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; 267 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
267 u8 pwr = 0; 268 u8 pwr = 0;
268 u8 buf[4]; 269 u8 buf[4];
269 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; 270 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
270 u32 div = (params->frequency + 479500) / 125; 271 u32 div = (p->frequency + 479500) / 125;
271 272
272 if (params->frequency > 2000000) pwr = 3; 273 if (p->frequency > 2000000)
273 else if (params->frequency > 1800000) pwr = 2; 274 pwr = 3;
274 else if (params->frequency > 1600000) pwr = 1; 275 else if (p->frequency > 1800000)
275 else if (params->frequency > 1200000) pwr = 0; 276 pwr = 2;
276 else if (params->frequency >= 1100000) pwr = 1; 277 else if (p->frequency > 1600000)
278 pwr = 1;
279 else if (p->frequency > 1200000)
280 pwr = 0;
281 else if (p->frequency >= 1100000)
282 pwr = 1;
277 else pwr = 2; 283 else pwr = 2;
278 284
279 buf[0] = (div >> 8) & 0x7f; 285 buf[0] = (div >> 8) & 0x7f;
@@ -297,14 +303,15 @@ static struct ves1x93_config alps_bsrv2_config = {
297 .invert_pwm = 0, 303 .invert_pwm = 0,
298}; 304};
299 305
300static int grundig_29504_451_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 306static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
301{ 307{
308 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
302 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; 309 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
303 u32 div; 310 u32 div;
304 u8 data[4]; 311 u8 data[4];
305 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 312 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
306 313
307 div = params->frequency / 125; 314 div = p->frequency / 125;
308 data[0] = (div >> 8) & 0x7f; 315 data[0] = (div >> 8) & 0x7f;
309 data[1] = div & 0xff; 316 data[1] = div & 0xff;
310 data[2] = 0x8e; 317 data[2] = 0x8e;
diff --git a/drivers/media/dvb/ttpci/budget.c b/drivers/media/dvb/ttpci/budget.c
index d238fb9371a..b21bcce6670 100644
--- a/drivers/media/dvb/ttpci/budget.c
+++ b/drivers/media/dvb/ttpci/budget.c
@@ -200,19 +200,25 @@ static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t m
200 return 0; 200 return 0;
201} 201}
202 202
203static int alps_bsrv2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 203static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
204{ 204{
205 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
205 struct budget* budget = (struct budget*) fe->dvb->priv; 206 struct budget* budget = (struct budget*) fe->dvb->priv;
206 u8 pwr = 0; 207 u8 pwr = 0;
207 u8 buf[4]; 208 u8 buf[4];
208 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; 209 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
209 u32 div = (params->frequency + 479500) / 125; 210 u32 div = (c->frequency + 479500) / 125;
210 211
211 if (params->frequency > 2000000) pwr = 3; 212 if (c->frequency > 2000000)
212 else if (params->frequency > 1800000) pwr = 2; 213 pwr = 3;
213 else if (params->frequency > 1600000) pwr = 1; 214 else if (c->frequency > 1800000)
214 else if (params->frequency > 1200000) pwr = 0; 215 pwr = 2;
215 else if (params->frequency >= 1100000) pwr = 1; 216 else if (c->frequency > 1600000)
217 pwr = 1;
218 else if (c->frequency > 1200000)
219 pwr = 0;
220 else if (c->frequency >= 1100000)
221 pwr = 1;
216 else pwr = 2; 222 else pwr = 2;
217 223
218 buf[0] = (div >> 8) & 0x7f; 224 buf[0] = (div >> 8) & 0x7f;
@@ -236,19 +242,20 @@ static struct ves1x93_config alps_bsrv2_config =
236 .invert_pwm = 0, 242 .invert_pwm = 0,
237}; 243};
238 244
239static int alps_tdbe2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 245static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
240{ 246{
247 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
241 struct budget* budget = (struct budget*) fe->dvb->priv; 248 struct budget* budget = (struct budget*) fe->dvb->priv;
242 u32 div; 249 u32 div;
243 u8 data[4]; 250 u8 data[4];
244 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) }; 251 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
245 252
246 div = (params->frequency + 35937500 + 31250) / 62500; 253 div = (c->frequency + 35937500 + 31250) / 62500;
247 254
248 data[0] = (div >> 8) & 0x7f; 255 data[0] = (div >> 8) & 0x7f;
249 data[1] = div & 0xff; 256 data[1] = div & 0xff;
250 data[2] = 0x85 | ((div >> 10) & 0x60); 257 data[2] = 0x85 | ((div >> 10) & 0x60);
251 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81); 258 data[3] = (c->frequency < 174000000 ? 0x88 : c->frequency < 470000000 ? 0x84 : 0x81);
252 259
253 if (fe->ops.i2c_gate_ctrl) 260 if (fe->ops.i2c_gate_ctrl)
254 fe->ops.i2c_gate_ctrl(fe, 1); 261 fe->ops.i2c_gate_ctrl(fe, 1);
@@ -263,8 +270,9 @@ static struct ves1820_config alps_tdbe2_config = {
263 .selagc = VES1820_SELAGC_SIGNAMPERR, 270 .selagc = VES1820_SELAGC_SIGNAMPERR,
264}; 271};
265 272
266static int grundig_29504_401_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 273static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
267{ 274{
275 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
268 struct budget *budget = fe->dvb->priv; 276 struct budget *budget = fe->dvb->priv;
269 u8 *tuner_addr = fe->tuner_priv; 277 u8 *tuner_addr = fe->tuner_priv;
270 u32 div; 278 u32 div;
@@ -277,19 +285,27 @@ static int grundig_29504_401_tuner_set_params(struct dvb_frontend* fe, struct dv
277 else 285 else
278 msg.addr = 0x61; 286 msg.addr = 0x61;
279 287
280 div = (36125000 + params->frequency) / 166666; 288 div = (36125000 + c->frequency) / 166666;
281 289
282 cfg = 0x88; 290 cfg = 0x88;
283 291
284 if (params->frequency < 175000000) cpump = 2; 292 if (c->frequency < 175000000)
285 else if (params->frequency < 390000000) cpump = 1; 293 cpump = 2;
286 else if (params->frequency < 470000000) cpump = 2; 294 else if (c->frequency < 390000000)
287 else if (params->frequency < 750000000) cpump = 1; 295 cpump = 1;
288 else cpump = 3; 296 else if (c->frequency < 470000000)
297 cpump = 2;
298 else if (c->frequency < 750000000)
299 cpump = 1;
300 else
301 cpump = 3;
289 302
290 if (params->frequency < 175000000) band_select = 0x0e; 303 if (c->frequency < 175000000)
291 else if (params->frequency < 470000000) band_select = 0x05; 304 band_select = 0x0e;
292 else band_select = 0x03; 305 else if (c->frequency < 470000000)
306 band_select = 0x05;
307 else
308 band_select = 0x03;
293 309
294 data[0] = (div >> 8) & 0x7f; 310 data[0] = (div >> 8) & 0x7f;
295 data[1] = div & 0xff; 311 data[1] = div & 0xff;
@@ -312,14 +328,15 @@ static struct l64781_config grundig_29504_401_config_activy = {
312 328
313static u8 tuner_address_grundig_29504_401_activy = 0x60; 329static u8 tuner_address_grundig_29504_401_activy = 0x60;
314 330
315static int grundig_29504_451_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 331static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
316{ 332{
333 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
317 struct budget* budget = (struct budget*) fe->dvb->priv; 334 struct budget* budget = (struct budget*) fe->dvb->priv;
318 u32 div; 335 u32 div;
319 u8 data[4]; 336 u8 data[4];
320 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 337 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
321 338
322 div = params->frequency / 125; 339 div = c->frequency / 125;
323 data[0] = (div >> 8) & 0x7f; 340 data[0] = (div >> 8) & 0x7f;
324 data[1] = div & 0xff; 341 data[1] = div & 0xff;
325 data[2] = 0x8e; 342 data[2] = 0x8e;
@@ -335,14 +352,15 @@ static struct tda8083_config grundig_29504_451_config = {
335 .demod_address = 0x68, 352 .demod_address = 0x68,
336}; 353};
337 354
338static int s5h1420_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 355static int s5h1420_tuner_set_params(struct dvb_frontend *fe)
339{ 356{
357 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
340 struct budget* budget = (struct budget*) fe->dvb->priv; 358 struct budget* budget = (struct budget*) fe->dvb->priv;
341 u32 div; 359 u32 div;
342 u8 data[4]; 360 u8 data[4];
343 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; 361 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
344 362
345 div = params->frequency / 1000; 363 div = c->frequency / 1000;
346 data[0] = (div >> 8) & 0x7f; 364 data[0] = (div >> 8) & 0x7f;
347 data[1] = div & 0xff; 365 data[1] = div & 0xff;
348 data[2] = 0xc2; 366 data[2] = 0xc2;
diff --git a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
index e90192fdde1..5b682cc4c81 100644
--- a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
+++ b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
@@ -1017,19 +1017,20 @@ static u32 functionality(struct i2c_adapter *adapter)
1017 1017
1018 1018
1019 1019
1020static int alps_tdmb7_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 1020static int alps_tdmb7_tuner_set_params(struct dvb_frontend *fe)
1021{ 1021{
1022 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1022 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv; 1023 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv;
1023 u8 data[4]; 1024 u8 data[4];
1024 struct i2c_msg msg = {.addr=0x61, .flags=0, .buf=data, .len=sizeof(data) }; 1025 struct i2c_msg msg = {.addr=0x61, .flags=0, .buf=data, .len=sizeof(data) };
1025 u32 div; 1026 u32 div;
1026 1027
1027 div = (params->frequency + 36166667) / 166667; 1028 div = (p->frequency + 36166667) / 166667;
1028 1029
1029 data[0] = (div >> 8) & 0x7f; 1030 data[0] = (div >> 8) & 0x7f;
1030 data[1] = div & 0xff; 1031 data[1] = div & 0xff;
1031 data[2] = ((div >> 10) & 0x60) | 0x85; 1032 data[2] = ((div >> 10) & 0x60) | 0x85;
1032 data[3] = params->frequency < 592000000 ? 0x40 : 0x80; 1033 data[3] = p->frequency < 592000000 ? 0x40 : 0x80;
1033 1034
1034 if (fe->ops.i2c_gate_ctrl) 1035 if (fe->ops.i2c_gate_ctrl)
1035 fe->ops.i2c_gate_ctrl(fe, 1); 1036 fe->ops.i2c_gate_ctrl(fe, 1);
@@ -1071,8 +1072,9 @@ static int philips_tdm1316l_tuner_init(struct dvb_frontend* fe)
1071 return 0; 1072 return 0;
1072} 1073}
1073 1074
1074static int philips_tdm1316l_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 1075static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe)
1075{ 1076{
1077 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1076 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv; 1078 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv;
1077 u8 tuner_buf[4]; 1079 u8 tuner_buf[4];
1078 struct i2c_msg tuner_msg = {.addr=0x60, .flags=0, .buf=tuner_buf, .len=sizeof(tuner_buf) }; 1080 struct i2c_msg tuner_msg = {.addr=0x60, .flags=0, .buf=tuner_buf, .len=sizeof(tuner_buf) };
@@ -1080,7 +1082,7 @@ static int philips_tdm1316l_tuner_set_params(struct dvb_frontend* fe, struct dvb
1080 u8 band, cp, filter; 1082 u8 band, cp, filter;
1081 1083
1082 // determine charge pump 1084 // determine charge pump
1083 tuner_frequency = params->frequency + 36130000; 1085 tuner_frequency = p->frequency + 36130000;
1084 if (tuner_frequency < 87000000) return -EINVAL; 1086 if (tuner_frequency < 87000000) return -EINVAL;
1085 else if (tuner_frequency < 130000000) cp = 3; 1087 else if (tuner_frequency < 130000000) cp = 3;
1086 else if (tuner_frequency < 160000000) cp = 5; 1088 else if (tuner_frequency < 160000000) cp = 5;
@@ -1094,25 +1096,29 @@ static int philips_tdm1316l_tuner_set_params(struct dvb_frontend* fe, struct dvb
1094 else return -EINVAL; 1096 else return -EINVAL;
1095 1097
1096 // determine band 1098 // determine band
1097 if (params->frequency < 49000000) return -EINVAL; 1099 if (p->frequency < 49000000)
1098 else if (params->frequency < 159000000) band = 1; 1100 return -EINVAL;
1099 else if (params->frequency < 444000000) band = 2; 1101 else if (p->frequency < 159000000)
1100 else if (params->frequency < 861000000) band = 4; 1102 band = 1;
1103 else if (p->frequency < 444000000)
1104 band = 2;
1105 else if (p->frequency < 861000000)
1106 band = 4;
1101 else return -EINVAL; 1107 else return -EINVAL;
1102 1108
1103 // setup PLL filter 1109 // setup PLL filter
1104 switch (params->u.ofdm.bandwidth) { 1110 switch (p->bandwidth_hz) {
1105 case BANDWIDTH_6_MHZ: 1111 case 6000000:
1106 tda1004x_writereg(fe, 0x0C, 0); 1112 tda1004x_writereg(fe, 0x0C, 0);
1107 filter = 0; 1113 filter = 0;
1108 break; 1114 break;
1109 1115
1110 case BANDWIDTH_7_MHZ: 1116 case 7000000:
1111 tda1004x_writereg(fe, 0x0C, 0); 1117 tda1004x_writereg(fe, 0x0C, 0);
1112 filter = 0; 1118 filter = 0;
1113 break; 1119 break;
1114 1120
1115 case BANDWIDTH_8_MHZ: 1121 case 8000000:
1116 tda1004x_writereg(fe, 0x0C, 0xFF); 1122 tda1004x_writereg(fe, 0x0C, 0xFF);
1117 filter = 1; 1123 filter = 1;
1118 break; 1124 break;
@@ -1123,7 +1129,7 @@ static int philips_tdm1316l_tuner_set_params(struct dvb_frontend* fe, struct dvb
1123 1129
1124 // calculate divisor 1130 // calculate divisor
1125 // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6) 1131 // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
1126 tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000; 1132 tuner_frequency = (((p->frequency / 1000) * 6) + 217280) / 1000;
1127 1133
1128 // setup tuner buffer 1134 // setup tuner buffer
1129 tuner_buf[0] = tuner_frequency >> 8; 1135 tuner_buf[0] = tuner_frequency >> 8;
@@ -1273,23 +1279,24 @@ static int alps_stv0299_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32
1273 return 0; 1279 return 0;
1274} 1280}
1275 1281
1276static int philips_tsa5059_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 1282static int philips_tsa5059_tuner_set_params(struct dvb_frontend *fe)
1277{ 1283{
1284 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1278 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv; 1285 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv;
1279 u8 buf[4]; 1286 u8 buf[4];
1280 u32 div; 1287 u32 div;
1281 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) }; 1288 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) };
1282 1289
1283 if ((params->frequency < 950000) || (params->frequency > 2150000)) 1290 if ((p->frequency < 950000) || (p->frequency > 2150000))
1284 return -EINVAL; 1291 return -EINVAL;
1285 1292
1286 div = (params->frequency + (125 - 1)) / 125; // round correctly 1293 div = (p->frequency + (125 - 1)) / 125; /* round correctly */
1287 buf[0] = (div >> 8) & 0x7f; 1294 buf[0] = (div >> 8) & 0x7f;
1288 buf[1] = div & 0xff; 1295 buf[1] = div & 0xff;
1289 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; 1296 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1290 buf[3] = 0xC4; 1297 buf[3] = 0xC4;
1291 1298
1292 if (params->frequency > 1530000) 1299 if (p->frequency > 1530000)
1293 buf[3] = 0xC0; 1300 buf[3] = 0xC0;
1294 1301
1295 /* BSBE1 wants XCE bit set */ 1302 /* BSBE1 wants XCE bit set */
@@ -1316,14 +1323,15 @@ static struct stv0299_config alps_stv0299_config = {
1316 .set_symbol_rate = alps_stv0299_set_symbol_rate, 1323 .set_symbol_rate = alps_stv0299_set_symbol_rate,
1317}; 1324};
1318 1325
1319static int ttusb_novas_grundig_29504_491_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 1326static int ttusb_novas_grundig_29504_491_tuner_set_params(struct dvb_frontend *fe)
1320{ 1327{
1328 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1321 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv; 1329 struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv;
1322 u8 buf[4]; 1330 u8 buf[4];
1323 u32 div; 1331 u32 div;
1324 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) }; 1332 struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) };
1325 1333
1326 div = params->frequency / 125; 1334 div = p->frequency / 125;
1327 1335
1328 buf[0] = (div >> 8) & 0x7f; 1336 buf[0] = (div >> 8) & 0x7f;
1329 buf[1] = div & 0xff; 1337 buf[1] = div & 0xff;
@@ -1343,19 +1351,20 @@ static struct tda8083_config ttusb_novas_grundig_29504_491_config = {
1343 .demod_address = 0x68, 1351 .demod_address = 0x68,
1344}; 1352};
1345 1353
1346static int alps_tdbe2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) 1354static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
1347{ 1355{
1356 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1348 struct ttusb* ttusb = fe->dvb->priv; 1357 struct ttusb* ttusb = fe->dvb->priv;
1349 u32 div; 1358 u32 div;
1350 u8 data[4]; 1359 u8 data[4];
1351 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) }; 1360 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1352 1361
1353 div = (params->frequency + 35937500 + 31250) / 62500; 1362 div = (p->frequency + 35937500 + 31250) / 62500;
1354 1363
1355 data[0] = (div >> 8) & 0x7f; 1364 data[0] = (div >> 8) & 0x7f;
1356 data[1] = div & 0xff; 1365 data[1] = div & 0xff;
1357 data[2] = 0x85 | ((div >> 10) & 0x60); 1366 data[2] = 0x85 | ((div >> 10) & 0x60);
1358 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81); 1367 data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
1359 1368
1360 if (fe->ops.i2c_gate_ctrl) 1369 if (fe->ops.i2c_gate_ctrl)
1361 fe->ops.i2c_gate_ctrl(fe, 1); 1370 fe->ops.i2c_gate_ctrl(fe, 1);
@@ -1387,8 +1396,9 @@ static u8 read_pwm(struct ttusb* ttusb)
1387} 1396}
1388 1397
1389 1398
1390static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 1399static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe)
1391{ 1400{
1401 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1392 struct ttusb *ttusb = (struct ttusb *) fe->dvb->priv; 1402 struct ttusb *ttusb = (struct ttusb *) fe->dvb->priv;
1393 u8 tuner_buf[5]; 1403 u8 tuner_buf[5];
1394 struct i2c_msg tuner_msg = {.addr = 0x60, 1404 struct i2c_msg tuner_msg = {.addr = 0x60,
@@ -1399,7 +1409,7 @@ static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struc
1399 u8 band, cp, filter; 1409 u8 band, cp, filter;
1400 1410
1401 // determine charge pump 1411 // determine charge pump
1402 tuner_frequency = params->frequency; 1412 tuner_frequency = p->frequency;
1403 if (tuner_frequency < 87000000) {return -EINVAL;} 1413 if (tuner_frequency < 87000000) {return -EINVAL;}
1404 else if (tuner_frequency < 130000000) {cp = 3; band = 1;} 1414 else if (tuner_frequency < 130000000) {cp = 3; band = 1;}
1405 else if (tuner_frequency < 160000000) {cp = 5; band = 1;} 1415 else if (tuner_frequency < 160000000) {cp = 5; band = 1;}
@@ -1417,7 +1427,7 @@ static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struc
1417 1427
1418 // calculate divisor 1428 // calculate divisor
1419 // (Finput + Fif)/Fref; Fif = 36125000 Hz, Fref = 62500 Hz 1429 // (Finput + Fif)/Fref; Fif = 36125000 Hz, Fref = 62500 Hz
1420 tuner_frequency = ((params->frequency + 36125000) / 62500); 1430 tuner_frequency = ((p->frequency + 36125000) / 62500);
1421 1431
1422 // setup tuner buffer 1432 // setup tuner buffer
1423 tuner_buf[0] = tuner_frequency >> 8; 1433 tuner_buf[0] = tuner_frequency >> 8;
@@ -1694,10 +1704,8 @@ static int ttusb_probe(struct usb_interface *intf, const struct usb_device_id *i
1694 ttusb->i2c_adap.dev.parent = &udev->dev; 1704 ttusb->i2c_adap.dev.parent = &udev->dev;
1695 1705
1696 result = i2c_add_adapter(&ttusb->i2c_adap); 1706 result = i2c_add_adapter(&ttusb->i2c_adap);
1697 if (result) { 1707 if (result)
1698 dvb_unregister_adapter (&ttusb->adapter); 1708 goto err_unregister_adapter;
1699 return result;
1700 }
1701 1709
1702 memset(&ttusb->dvb_demux, 0, sizeof(ttusb->dvb_demux)); 1710 memset(&ttusb->dvb_demux, 0, sizeof(ttusb->dvb_demux));
1703 1711
@@ -1714,33 +1722,29 @@ static int ttusb_probe(struct usb_interface *intf, const struct usb_device_id *i
1714 ttusb->dvb_demux.stop_feed = ttusb_stop_feed; 1722 ttusb->dvb_demux.stop_feed = ttusb_stop_feed;
1715 ttusb->dvb_demux.write_to_decoder = NULL; 1723 ttusb->dvb_demux.write_to_decoder = NULL;
1716 1724
1717 if ((result = dvb_dmx_init(&ttusb->dvb_demux)) < 0) { 1725 result = dvb_dmx_init(&ttusb->dvb_demux);
1726 if (result < 0) {
1718 printk("ttusb_dvb: dvb_dmx_init failed (errno = %d)\n", result); 1727 printk("ttusb_dvb: dvb_dmx_init failed (errno = %d)\n", result);
1719 i2c_del_adapter(&ttusb->i2c_adap); 1728 result = -ENODEV;
1720 dvb_unregister_adapter (&ttusb->adapter); 1729 goto err_i2c_del_adapter;
1721 return -ENODEV;
1722 } 1730 }
1723//FIXME dmxdev (nur WAS?) 1731//FIXME dmxdev (nur WAS?)
1724 ttusb->dmxdev.filternum = ttusb->dvb_demux.filternum; 1732 ttusb->dmxdev.filternum = ttusb->dvb_demux.filternum;
1725 ttusb->dmxdev.demux = &ttusb->dvb_demux.dmx; 1733 ttusb->dmxdev.demux = &ttusb->dvb_demux.dmx;
1726 ttusb->dmxdev.capabilities = 0; 1734 ttusb->dmxdev.capabilities = 0;
1727 1735
1728 if ((result = dvb_dmxdev_init(&ttusb->dmxdev, &ttusb->adapter)) < 0) { 1736 result = dvb_dmxdev_init(&ttusb->dmxdev, &ttusb->adapter);
1737 if (result < 0) {
1729 printk("ttusb_dvb: dvb_dmxdev_init failed (errno = %d)\n", 1738 printk("ttusb_dvb: dvb_dmxdev_init failed (errno = %d)\n",
1730 result); 1739 result);
1731 dvb_dmx_release(&ttusb->dvb_demux); 1740 result = -ENODEV;
1732 i2c_del_adapter(&ttusb->i2c_adap); 1741 goto err_release_dmx;
1733 dvb_unregister_adapter (&ttusb->adapter);
1734 return -ENODEV;
1735 } 1742 }
1736 1743
1737 if (dvb_net_init(&ttusb->adapter, &ttusb->dvbnet, &ttusb->dvb_demux.dmx)) { 1744 if (dvb_net_init(&ttusb->adapter, &ttusb->dvbnet, &ttusb->dvb_demux.dmx)) {
1738 printk("ttusb_dvb: dvb_net_init failed!\n"); 1745 printk("ttusb_dvb: dvb_net_init failed!\n");
1739 dvb_dmxdev_release(&ttusb->dmxdev); 1746 result = -ENODEV;
1740 dvb_dmx_release(&ttusb->dvb_demux); 1747 goto err_release_dmxdev;
1741 i2c_del_adapter(&ttusb->i2c_adap);
1742 dvb_unregister_adapter (&ttusb->adapter);
1743 return -ENODEV;
1744 } 1748 }
1745 1749
1746 usb_set_intfdata(intf, (void *) ttusb); 1750 usb_set_intfdata(intf, (void *) ttusb);
@@ -1748,6 +1752,16 @@ static int ttusb_probe(struct usb_interface *intf, const struct usb_device_id *i
1748 frontend_init(ttusb); 1752 frontend_init(ttusb);
1749 1753
1750 return 0; 1754 return 0;
1755
1756err_release_dmxdev:
1757 dvb_dmxdev_release(&ttusb->dmxdev);
1758err_release_dmx:
1759 dvb_dmx_release(&ttusb->dvb_demux);
1760err_i2c_del_adapter:
1761 i2c_del_adapter(&ttusb->i2c_adap);
1762err_unregister_adapter:
1763 dvb_unregister_adapter (&ttusb->adapter);
1764 return result;
1751} 1765}
1752 1766
1753static void ttusb_disconnect(struct usb_interface *intf) 1767static void ttusb_disconnect(struct usb_interface *intf)
diff --git a/drivers/media/dvb/ttusb-dec/ttusbdecfe.c b/drivers/media/dvb/ttusb-dec/ttusbdecfe.c
index 21260aad1e5..5c45c9d0712 100644
--- a/drivers/media/dvb/ttusb-dec/ttusbdecfe.c
+++ b/drivers/media/dvb/ttusb-dec/ttusbdecfe.c
@@ -87,8 +87,9 @@ static int ttusbdecfe_dvbt_read_status(struct dvb_frontend *fe,
87 return 0; 87 return 0;
88} 88}
89 89
90static int ttusbdecfe_dvbt_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 90static int ttusbdecfe_dvbt_set_frontend(struct dvb_frontend *fe)
91{ 91{
92 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
92 struct ttusbdecfe_state* state = (struct ttusbdecfe_state*) fe->demodulator_priv; 93 struct ttusbdecfe_state* state = (struct ttusbdecfe_state*) fe->demodulator_priv;
93 u8 b[] = { 0x00, 0x00, 0x00, 0x03, 94 u8 b[] = { 0x00, 0x00, 0x00, 0x03,
94 0x00, 0x00, 0x00, 0x00, 95 0x00, 0x00, 0x00, 0x00,
@@ -113,8 +114,9 @@ static int ttusbdecfe_dvbt_get_tune_settings(struct dvb_frontend* fe,
113 return 0; 114 return 0;
114} 115}
115 116
116static int ttusbdecfe_dvbs_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 117static int ttusbdecfe_dvbs_set_frontend(struct dvb_frontend *fe)
117{ 118{
119 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
118 struct ttusbdecfe_state* state = (struct ttusbdecfe_state*) fe->demodulator_priv; 120 struct ttusbdecfe_state* state = (struct ttusbdecfe_state*) fe->demodulator_priv;
119 121
120 u8 b[] = { 0x00, 0x00, 0x00, 0x01, 122 u8 b[] = { 0x00, 0x00, 0x00, 0x01,
@@ -135,7 +137,7 @@ static int ttusbdecfe_dvbs_set_frontend(struct dvb_frontend* fe, struct dvb_fron
135 freq = htonl(p->frequency + 137 freq = htonl(p->frequency +
136 (state->hi_band ? LOF_HI : LOF_LO)); 138 (state->hi_band ? LOF_HI : LOF_LO));
137 memcpy(&b[4], &freq, sizeof(u32)); 139 memcpy(&b[4], &freq, sizeof(u32));
138 sym_rate = htonl(p->u.qam.symbol_rate); 140 sym_rate = htonl(p->symbol_rate);
139 memcpy(&b[12], &sym_rate, sizeof(u32)); 141 memcpy(&b[12], &sym_rate, sizeof(u32));
140 band = htonl(state->hi_band ? LOF_HI : LOF_LO); 142 band = htonl(state->hi_band ? LOF_HI : LOF_LO);
141 memcpy(&b[24], &band, sizeof(u32)); 143 memcpy(&b[24], &band, sizeof(u32));
@@ -241,10 +243,9 @@ struct dvb_frontend* ttusbdecfe_dvbs_attach(const struct ttusbdecfe_config* conf
241} 243}
242 244
243static struct dvb_frontend_ops ttusbdecfe_dvbt_ops = { 245static struct dvb_frontend_ops ttusbdecfe_dvbt_ops = {
244 246 .delsys = { SYS_DVBT },
245 .info = { 247 .info = {
246 .name = "TechnoTrend/Hauppauge DEC2000-t Frontend", 248 .name = "TechnoTrend/Hauppauge DEC2000-t Frontend",
247 .type = FE_OFDM,
248 .frequency_min = 51000000, 249 .frequency_min = 51000000,
249 .frequency_max = 858000000, 250 .frequency_max = 858000000,
250 .frequency_stepsize = 62500, 251 .frequency_stepsize = 62500,
@@ -265,10 +266,9 @@ static struct dvb_frontend_ops ttusbdecfe_dvbt_ops = {
265}; 266};
266 267
267static struct dvb_frontend_ops ttusbdecfe_dvbs_ops = { 268static struct dvb_frontend_ops ttusbdecfe_dvbs_ops = {
268 269 .delsys = { SYS_DVBS },
269 .info = { 270 .info = {
270 .name = "TechnoTrend/Hauppauge DEC3000-s Frontend", 271 .name = "TechnoTrend/Hauppauge DEC3000-s Frontend",
271 .type = FE_QPSK,
272 .frequency_min = 950000, 272 .frequency_min = 950000,
273 .frequency_max = 2150000, 273 .frequency_max = 2150000,
274 .frequency_stepsize = 125, 274 .frequency_stepsize = 125,
diff --git a/drivers/media/media-device.c b/drivers/media/media-device.c
index 6edc9ba8120..6f9eb94e85b 100644
--- a/drivers/media/media-device.c
+++ b/drivers/media/media-device.c
@@ -108,8 +108,7 @@ static long media_device_enum_entities(struct media_device *mdev,
108 u_ent.group_id = ent->group_id; 108 u_ent.group_id = ent->group_id;
109 u_ent.pads = ent->num_pads; 109 u_ent.pads = ent->num_pads;
110 u_ent.links = ent->num_links - ent->num_backlinks; 110 u_ent.links = ent->num_links - ent->num_backlinks;
111 u_ent.v4l.major = ent->v4l.major; 111 memcpy(&u_ent.raw, &ent->info, sizeof(ent->info));
112 u_ent.v4l.minor = ent->v4l.minor;
113 if (copy_to_user(uent, &u_ent, sizeof(u_ent))) 112 if (copy_to_user(uent, &u_ent, sizeof(u_ent)))
114 return -EFAULT; 113 return -EFAULT;
115 return 0; 114 return 0;
diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig
index ccd5f0d8a01..e954781c90b 100644
--- a/drivers/media/radio/Kconfig
+++ b/drivers/media/radio/Kconfig
@@ -11,6 +11,162 @@ menuconfig RADIO_ADAPTERS
11 11
12if RADIO_ADAPTERS && VIDEO_V4L2 12if RADIO_ADAPTERS && VIDEO_V4L2
13 13
14config RADIO_SI470X
15 bool "Silicon Labs Si470x FM Radio Receiver support"
16 depends on VIDEO_V4L2
17
18source "drivers/media/radio/si470x/Kconfig"
19
20config USB_MR800
21 tristate "AverMedia MR 800 USB FM radio support"
22 depends on USB && VIDEO_V4L2
23 ---help---
24 Say Y here if you want to connect this type of radio to your
25 computer's USB port. Note that the audio is not digital, and
26 you must connect the line out connector to a sound card or a
27 set of speakers.
28
29 To compile this driver as a module, choose M here: the
30 module will be called radio-mr800.
31
32config USB_DSBR
33 tristate "D-Link/GemTek USB FM radio support"
34 depends on USB && VIDEO_V4L2
35 ---help---
36 Say Y here if you want to connect this type of radio to your
37 computer's USB port. Note that the audio is not digital, and
38 you must connect the line out connector to a sound card or a
39 set of speakers.
40
41 To compile this driver as a module, choose M here: the
42 module will be called dsbr100.
43
44config RADIO_MAXIRADIO
45 tristate "Guillemot MAXI Radio FM 2000 radio"
46 depends on VIDEO_V4L2 && PCI
47 ---help---
48 Choose Y here if you have this radio card. This card may also be
49 found as Gemtek PCI FM.
50
51 In order to control your radio card, you will need to use programs
52 that are compatible with the Video For Linux API. Information on
53 this API and pointers to "v4l" programs may be found at
54 <file:Documentation/video4linux/API.html>.
55
56 To compile this driver as a module, choose M here: the
57 module will be called radio-maxiradio.
58
59
60config I2C_SI4713
61 tristate "I2C driver for Silicon Labs Si4713 device"
62 depends on I2C && VIDEO_V4L2
63 ---help---
64 Say Y here if you want support to Si4713 I2C device.
65 This device driver supports only i2c bus.
66
67 To compile this driver as a module, choose M here: the
68 module will be called si4713.
69
70config RADIO_SI4713
71 tristate "Silicon Labs Si4713 FM Radio Transmitter support"
72 depends on I2C && VIDEO_V4L2
73 select I2C_SI4713
74 ---help---
75 Say Y here if you want support to Si4713 FM Radio Transmitter.
76 This device can transmit audio through FM. It can transmit
77 RDS and RBDS signals as well. This module is the v4l2 radio
78 interface for the i2c driver of this device.
79
80 To compile this driver as a module, choose M here: the
81 module will be called radio-si4713.
82
83config RADIO_TEA5764
84 tristate "TEA5764 I2C FM radio support"
85 depends on I2C && VIDEO_V4L2
86 ---help---
87 Say Y here if you want to use the TEA5764 FM chip found in
88 EZX phones. This FM chip is present in EZX phones from Motorola,
89 connected to internal pxa I2C bus.
90
91 To compile this driver as a module, choose M here: the
92 module will be called radio-tea5764.
93
94config RADIO_TEA5764_XTAL
95 bool "TEA5764 crystal reference"
96 depends on RADIO_TEA5764=y
97 default y
98 help
99 Say Y here if TEA5764 have a 32768 Hz crystal in circuit, say N
100 here if TEA5764 reference frequency is connected in FREQIN.
101
102config RADIO_SAA7706H
103 tristate "SAA7706H Car Radio DSP"
104 depends on I2C && VIDEO_V4L2
105 ---help---
106 Say Y here if you want to use the SAA7706H Car radio Digital
107 Signal Processor, found for instance on the Russellville development
108 board. On the russellville the device is connected to internal
109 timberdale I2C bus.
110
111 To compile this driver as a module, choose M here: the
112 module will be called SAA7706H.
113
114config RADIO_TEF6862
115 tristate "TEF6862 Car Radio Enhanced Selectivity Tuner"
116 depends on I2C && VIDEO_V4L2
117 ---help---
118 Say Y here if you want to use the TEF6862 Car Radio Enhanced
119 Selectivity Tuner, found for instance on the Russellville development
120 board. On the russellville the device is connected to internal
121 timberdale I2C bus.
122
123 To compile this driver as a module, choose M here: the
124 module will be called TEF6862.
125
126config RADIO_TIMBERDALE
127 tristate "Enable the Timberdale radio driver"
128 depends on MFD_TIMBERDALE && VIDEO_V4L2
129 depends on I2C # for RADIO_SAA7706H
130 select RADIO_TEF6862
131 select RADIO_SAA7706H
132 ---help---
133 This is a kind of umbrella driver for the Radio Tuner and DSP
134 found behind the Timberdale FPGA on the Russellville board.
135 Enabling this driver will automatically select the DSP and tuner.
136
137config RADIO_WL1273
138 tristate "Texas Instruments WL1273 I2C FM Radio"
139 depends on I2C && VIDEO_V4L2
140 select MFD_CORE
141 select MFD_WL1273_CORE
142 select FW_LOADER
143 ---help---
144 Choose Y here if you have this FM radio chip.
145
146 In order to control your radio card, you will need to use programs
147 that are compatible with the Video For Linux 2 API. Information on
148 this API and pointers to "v4l2" programs may be found at
149 <file:Documentation/video4linux/API.html>.
150
151 To compile this driver as a module, choose M here: the
152 module will be called radio-wl1273.
153
154# TI's ST based wl128x FM radio
155source "drivers/media/radio/wl128x/Kconfig"
156
157#
158# ISA drivers configuration
159#
160
161menuconfig V4L_RADIO_ISA_DRIVERS
162 bool "ISA radio devices"
163 depends on ISA
164 default n
165 ---help---
166 Say Y here to enable support for these ISA drivers.
167
168if V4L_RADIO_ISA_DRIVERS
169
14config RADIO_CADET 170config RADIO_CADET
15 tristate "ADS Cadet AM/FM Tuner" 171 tristate "ADS Cadet AM/FM Tuner"
16 depends on ISA && VIDEO_V4L2 172 depends on ISA && VIDEO_V4L2
@@ -151,21 +307,6 @@ config RADIO_GEMTEK_PROBE
151 following ports will be probed: 0x20c, 0x30c, 0x24c, 0x34c, 0x248 and 307 following ports will be probed: 0x20c, 0x30c, 0x24c, 0x34c, 0x248 and
152 0x28c. 308 0x28c.
153 309
154config RADIO_MAXIRADIO
155 tristate "Guillemot MAXI Radio FM 2000 radio"
156 depends on VIDEO_V4L2 && PCI
157 ---help---
158 Choose Y here if you have this radio card. This card may also be
159 found as Gemtek PCI FM.
160
161 In order to control your radio card, you will need to use programs
162 that are compatible with the Video For Linux API. Information on
163 this API and pointers to "v4l" programs may be found at
164 <file:Documentation/video4linux/API.html>.
165
166 To compile this driver as a module, choose M here: the
167 module will be called radio-maxiradio.
168
169config RADIO_MIROPCM20 310config RADIO_MIROPCM20
170 tristate "miroSOUND PCM20 radio" 311 tristate "miroSOUND PCM20 radio"
171 depends on ISA && ISA_DMA_API && VIDEO_V4L2 && SND 312 depends on ISA && ISA_DMA_API && VIDEO_V4L2 && SND
@@ -316,130 +457,6 @@ config RADIO_ZOLTRIX_PORT
316 help 457 help
317 Enter the I/O port of your Zoltrix radio card. 458 Enter the I/O port of your Zoltrix radio card.
318 459
319config I2C_SI4713 460endif # V4L_RADIO_ISA_DRIVERS
320 tristate "I2C driver for Silicon Labs Si4713 device"
321 depends on I2C && VIDEO_V4L2
322 ---help---
323 Say Y here if you want support to Si4713 I2C device.
324 This device driver supports only i2c bus.
325
326 To compile this driver as a module, choose M here: the
327 module will be called si4713.
328
329config RADIO_SI4713
330 tristate "Silicon Labs Si4713 FM Radio Transmitter support"
331 depends on I2C && VIDEO_V4L2
332 select I2C_SI4713
333 ---help---
334 Say Y here if you want support to Si4713 FM Radio Transmitter.
335 This device can transmit audio through FM. It can transmit
336 RDS and RBDS signals as well. This module is the v4l2 radio
337 interface for the i2c driver of this device.
338
339 To compile this driver as a module, choose M here: the
340 module will be called radio-si4713.
341
342config USB_DSBR
343 tristate "D-Link/GemTek USB FM radio support"
344 depends on USB && VIDEO_V4L2
345 ---help---
346 Say Y here if you want to connect this type of radio to your
347 computer's USB port. Note that the audio is not digital, and
348 you must connect the line out connector to a sound card or a
349 set of speakers.
350
351 To compile this driver as a module, choose M here: the
352 module will be called dsbr100.
353
354config RADIO_SI470X
355 bool "Silicon Labs Si470x FM Radio Receiver support"
356 depends on VIDEO_V4L2
357
358source "drivers/media/radio/si470x/Kconfig"
359
360config USB_MR800
361 tristate "AverMedia MR 800 USB FM radio support"
362 depends on USB && VIDEO_V4L2
363 ---help---
364 Say Y here if you want to connect this type of radio to your
365 computer's USB port. Note that the audio is not digital, and
366 you must connect the line out connector to a sound card or a
367 set of speakers.
368
369 To compile this driver as a module, choose M here: the
370 module will be called radio-mr800.
371
372config RADIO_TEA5764
373 tristate "TEA5764 I2C FM radio support"
374 depends on I2C && VIDEO_V4L2
375 ---help---
376 Say Y here if you want to use the TEA5764 FM chip found in
377 EZX phones. This FM chip is present in EZX phones from Motorola,
378 connected to internal pxa I2C bus.
379
380 To compile this driver as a module, choose M here: the
381 module will be called radio-tea5764.
382
383config RADIO_TEA5764_XTAL
384 bool "TEA5764 crystal reference"
385 depends on RADIO_TEA5764=y
386 default y
387 help
388 Say Y here if TEA5764 have a 32768 Hz crystal in circuit, say N
389 here if TEA5764 reference frequency is connected in FREQIN.
390
391config RADIO_SAA7706H
392 tristate "SAA7706H Car Radio DSP"
393 depends on I2C && VIDEO_V4L2
394 ---help---
395 Say Y here if you want to use the SAA7706H Car radio Digital
396 Signal Processor, found for instance on the Russellville development
397 board. On the russellville the device is connected to internal
398 timberdale I2C bus.
399
400 To compile this driver as a module, choose M here: the
401 module will be called SAA7706H.
402
403config RADIO_TEF6862
404 tristate "TEF6862 Car Radio Enhanced Selectivity Tuner"
405 depends on I2C && VIDEO_V4L2
406 ---help---
407 Say Y here if you want to use the TEF6862 Car Radio Enhanced
408 Selectivity Tuner, found for instance on the Russellville development
409 board. On the russellville the device is connected to internal
410 timberdale I2C bus.
411
412 To compile this driver as a module, choose M here: the
413 module will be called TEF6862.
414
415config RADIO_TIMBERDALE
416 tristate "Enable the Timberdale radio driver"
417 depends on MFD_TIMBERDALE && VIDEO_V4L2
418 depends on I2C # for RADIO_SAA7706H
419 select RADIO_TEF6862
420 select RADIO_SAA7706H
421 ---help---
422 This is a kind of umbrella driver for the Radio Tuner and DSP
423 found behind the Timberdale FPGA on the Russellville board.
424 Enabling this driver will automatically select the DSP and tuner.
425
426config RADIO_WL1273
427 tristate "Texas Instruments WL1273 I2C FM Radio"
428 depends on I2C && VIDEO_V4L2
429 select MFD_WL1273_CORE
430 select FW_LOADER
431 ---help---
432 Choose Y here if you have this FM radio chip.
433
434 In order to control your radio card, you will need to use programs
435 that are compatible with the Video For Linux 2 API. Information on
436 this API and pointers to "v4l2" programs may be found at
437 <file:Documentation/video4linux/API.html>.
438
439 To compile this driver as a module, choose M here: the
440 module will be called radio-wl1273.
441
442# TI's ST based wl128x FM radio
443source "drivers/media/radio/wl128x/Kconfig"
444 461
445endif # RADIO_ADAPTERS 462endif # RADIO_ADAPTERS
diff --git a/drivers/media/radio/radio-si4713.c b/drivers/media/radio/radio-si4713.c
index d1fab588506..c54210c7fef 100644
--- a/drivers/media/radio/radio-si4713.c
+++ b/drivers/media/radio/radio-si4713.c
@@ -355,17 +355,4 @@ static struct platform_driver radio_si4713_pdriver = {
355 .remove = __exit_p(radio_si4713_pdriver_remove), 355 .remove = __exit_p(radio_si4713_pdriver_remove),
356}; 356};
357 357
358/* Module Interface */ 358module_platform_driver(radio_si4713_pdriver);
359static int __init radio_si4713_module_init(void)
360{
361 return platform_driver_register(&radio_si4713_pdriver);
362}
363
364static void __exit radio_si4713_module_exit(void)
365{
366 platform_driver_unregister(&radio_si4713_pdriver);
367}
368
369module_init(radio_si4713_module_init);
370module_exit(radio_si4713_module_exit);
371
diff --git a/drivers/media/radio/radio-timb.c b/drivers/media/radio/radio-timb.c
index 3e9209f84e0..5d9a90ac3a1 100644
--- a/drivers/media/radio/radio-timb.c
+++ b/drivers/media/radio/radio-timb.c
@@ -226,20 +226,7 @@ static struct platform_driver timbradio_platform_driver = {
226 .remove = timbradio_remove, 226 .remove = timbradio_remove,
227}; 227};
228 228
229/*--------------------------------------------------------------------------*/ 229module_platform_driver(timbradio_platform_driver);
230
231static int __init timbradio_init(void)
232{
233 return platform_driver_register(&timbradio_platform_driver);
234}
235
236static void __exit timbradio_exit(void)
237{
238 platform_driver_unregister(&timbradio_platform_driver);
239}
240
241module_init(timbradio_init);
242module_exit(timbradio_exit);
243 230
244MODULE_DESCRIPTION("Timberdale Radio driver"); 231MODULE_DESCRIPTION("Timberdale Radio driver");
245MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>"); 232MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
diff --git a/drivers/media/radio/radio-wl1273.c b/drivers/media/radio/radio-wl1273.c
index 8aa4968d57b..f1b607099b6 100644
--- a/drivers/media/radio/radio-wl1273.c
+++ b/drivers/media/radio/radio-wl1273.c
@@ -2148,8 +2148,6 @@ pdata_err:
2148 return r; 2148 return r;
2149} 2149}
2150 2150
2151MODULE_ALIAS("platform:wl1273_fm_radio");
2152
2153static struct platform_driver wl1273_fm_radio_driver = { 2151static struct platform_driver wl1273_fm_radio_driver = {
2154 .probe = wl1273_fm_radio_probe, 2152 .probe = wl1273_fm_radio_probe,
2155 .remove = __devexit_p(wl1273_fm_radio_remove), 2153 .remove = __devexit_p(wl1273_fm_radio_remove),
@@ -2159,20 +2157,9 @@ static struct platform_driver wl1273_fm_radio_driver = {
2159 }, 2157 },
2160}; 2158};
2161 2159
2162static int __init wl1273_fm_module_init(void) 2160module_platform_driver(wl1273_fm_radio_driver);
2163{
2164 pr_info("%s\n", __func__);
2165 return platform_driver_register(&wl1273_fm_radio_driver);
2166}
2167module_init(wl1273_fm_module_init);
2168
2169static void __exit wl1273_fm_module_exit(void)
2170{
2171 platform_driver_unregister(&wl1273_fm_radio_driver);
2172 pr_info(DRIVER_DESC ", Exiting.\n");
2173}
2174module_exit(wl1273_fm_module_exit);
2175 2161
2176MODULE_AUTHOR("Matti Aaltonen <matti.j.aaltonen@nokia.com>"); 2162MODULE_AUTHOR("Matti Aaltonen <matti.j.aaltonen@nokia.com>");
2177MODULE_DESCRIPTION(DRIVER_DESC); 2163MODULE_DESCRIPTION(DRIVER_DESC);
2178MODULE_LICENSE("GPL"); 2164MODULE_LICENSE("GPL");
2165MODULE_ALIAS("platform:wl1273_fm_radio");
diff --git a/drivers/media/radio/tef6862.c b/drivers/media/radio/tef6862.c
index 0991e197367..3408685b690 100644
--- a/drivers/media/radio/tef6862.c
+++ b/drivers/media/radio/tef6862.c
@@ -118,9 +118,11 @@ static int tef6862_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
118 i2cmsg[2] = pll & 0xff; 118 i2cmsg[2] = pll & 0xff;
119 119
120 err = i2c_master_send(client, i2cmsg, sizeof(i2cmsg)); 120 err = i2c_master_send(client, i2cmsg, sizeof(i2cmsg));
121 if (!err) 121 if (err != sizeof(i2cmsg))
122 state->freq = f->frequency; 122 return err < 0 ? err : -EIO;
123 return err; 123
124 state->freq = f->frequency;
125 return 0;
124} 126}
125 127
126static int tef6862_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f) 128static int tef6862_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
diff --git a/drivers/media/radio/wl128x/Kconfig b/drivers/media/radio/wl128x/Kconfig
index 749f67b192e..86b28579f0c 100644
--- a/drivers/media/radio/wl128x/Kconfig
+++ b/drivers/media/radio/wl128x/Kconfig
@@ -5,7 +5,7 @@ menu "Texas Instruments WL128x FM driver (ST based)"
5config RADIO_WL128X 5config RADIO_WL128X
6 tristate "Texas Instruments WL128x FM Radio" 6 tristate "Texas Instruments WL128x FM Radio"
7 depends on VIDEO_V4L2 && RFKILL 7 depends on VIDEO_V4L2 && RFKILL
8 select TI_ST 8 select TI_ST if NET && GPIOLIB
9 help 9 help
10 Choose Y here if you have this FM radio chip. 10 Choose Y here if you have this FM radio chip.
11 11
diff --git a/drivers/media/radio/wl128x/fmdrv_common.c b/drivers/media/radio/wl128x/fmdrv_common.c
index 5991ab60303..bf867a6b5ea 100644
--- a/drivers/media/radio/wl128x/fmdrv_common.c
+++ b/drivers/media/radio/wl128x/fmdrv_common.c
@@ -387,7 +387,7 @@ static void send_tasklet(unsigned long arg)
387 * Queues FM Channel-8 packet to FM TX queue and schedules FM TX tasklet for 387 * Queues FM Channel-8 packet to FM TX queue and schedules FM TX tasklet for
388 * transmission 388 * transmission
389 */ 389 */
390static u32 fm_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload, 390static int fm_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload,
391 int payload_len, struct completion *wait_completion) 391 int payload_len, struct completion *wait_completion)
392{ 392{
393 struct sk_buff *skb; 393 struct sk_buff *skb;
@@ -456,13 +456,13 @@ static u32 fm_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload,
456} 456}
457 457
458/* Sends FM Channel-8 command to the chip and waits for the response */ 458/* Sends FM Channel-8 command to the chip and waits for the response */
459u32 fmc_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload, 459int fmc_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload,
460 unsigned int payload_len, void *response, int *response_len) 460 unsigned int payload_len, void *response, int *response_len)
461{ 461{
462 struct sk_buff *skb; 462 struct sk_buff *skb;
463 struct fm_event_msg_hdr *evt_hdr; 463 struct fm_event_msg_hdr *evt_hdr;
464 unsigned long flags; 464 unsigned long flags;
465 u32 ret; 465 int ret;
466 466
467 init_completion(&fmdev->maintask_comp); 467 init_completion(&fmdev->maintask_comp);
468 ret = fm_send_cmd(fmdev, fm_op, type, payload, payload_len, 468 ret = fm_send_cmd(fmdev, fm_op, type, payload, payload_len,
@@ -470,8 +470,8 @@ u32 fmc_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload,
470 if (ret) 470 if (ret)
471 return ret; 471 return ret;
472 472
473 ret = wait_for_completion_timeout(&fmdev->maintask_comp, FM_DRV_TX_TIMEOUT); 473 if (!wait_for_completion_timeout(&fmdev->maintask_comp,
474 if (!ret) { 474 FM_DRV_TX_TIMEOUT)) {
475 fmerr("Timeout(%d sec),didn't get reg" 475 fmerr("Timeout(%d sec),didn't get reg"
476 "completion signal from RX tasklet\n", 476 "completion signal from RX tasklet\n",
477 jiffies_to_msecs(FM_DRV_TX_TIMEOUT) / 1000); 477 jiffies_to_msecs(FM_DRV_TX_TIMEOUT) / 1000);
@@ -508,7 +508,7 @@ u32 fmc_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload,
508} 508}
509 509
510/* --- Helper functions used in FM interrupt handlers ---*/ 510/* --- Helper functions used in FM interrupt handlers ---*/
511static inline u32 check_cmdresp_status(struct fmdev *fmdev, 511static inline int check_cmdresp_status(struct fmdev *fmdev,
512 struct sk_buff **skb) 512 struct sk_buff **skb)
513{ 513{
514 struct fm_event_msg_hdr *fm_evt_hdr; 514 struct fm_event_msg_hdr *fm_evt_hdr;
@@ -1058,7 +1058,7 @@ static void fm_irq_handle_intmsk_cmd_resp(struct fmdev *fmdev)
1058} 1058}
1059 1059
1060/* Returns availability of RDS data in internel buffer */ 1060/* Returns availability of RDS data in internel buffer */
1061u32 fmc_is_rds_data_available(struct fmdev *fmdev, struct file *file, 1061int fmc_is_rds_data_available(struct fmdev *fmdev, struct file *file,
1062 struct poll_table_struct *pts) 1062 struct poll_table_struct *pts)
1063{ 1063{
1064 poll_wait(file, &fmdev->rx.rds.read_queue, pts); 1064 poll_wait(file, &fmdev->rx.rds.read_queue, pts);
@@ -1069,7 +1069,7 @@ u32 fmc_is_rds_data_available(struct fmdev *fmdev, struct file *file,
1069} 1069}
1070 1070
1071/* Copies RDS data from internal buffer to user buffer */ 1071/* Copies RDS data from internal buffer to user buffer */
1072u32 fmc_transfer_rds_from_internal_buff(struct fmdev *fmdev, struct file *file, 1072int fmc_transfer_rds_from_internal_buff(struct fmdev *fmdev, struct file *file,
1073 u8 __user *buf, size_t count) 1073 u8 __user *buf, size_t count)
1074{ 1074{
1075 u32 block_count; 1075 u32 block_count;
@@ -1113,7 +1113,7 @@ u32 fmc_transfer_rds_from_internal_buff(struct fmdev *fmdev, struct file *file,
1113 return ret; 1113 return ret;
1114} 1114}
1115 1115
1116u32 fmc_set_freq(struct fmdev *fmdev, u32 freq_to_set) 1116int fmc_set_freq(struct fmdev *fmdev, u32 freq_to_set)
1117{ 1117{
1118 switch (fmdev->curr_fmmode) { 1118 switch (fmdev->curr_fmmode) {
1119 case FM_MODE_RX: 1119 case FM_MODE_RX:
@@ -1127,7 +1127,7 @@ u32 fmc_set_freq(struct fmdev *fmdev, u32 freq_to_set)
1127 } 1127 }
1128} 1128}
1129 1129
1130u32 fmc_get_freq(struct fmdev *fmdev, u32 *cur_tuned_frq) 1130int fmc_get_freq(struct fmdev *fmdev, u32 *cur_tuned_frq)
1131{ 1131{
1132 if (fmdev->rx.freq == FM_UNDEFINED_FREQ) { 1132 if (fmdev->rx.freq == FM_UNDEFINED_FREQ) {
1133 fmerr("RX frequency is not set\n"); 1133 fmerr("RX frequency is not set\n");
@@ -1153,7 +1153,7 @@ u32 fmc_get_freq(struct fmdev *fmdev, u32 *cur_tuned_frq)
1153 1153
1154} 1154}
1155 1155
1156u32 fmc_set_region(struct fmdev *fmdev, u8 region_to_set) 1156int fmc_set_region(struct fmdev *fmdev, u8 region_to_set)
1157{ 1157{
1158 switch (fmdev->curr_fmmode) { 1158 switch (fmdev->curr_fmmode) {
1159 case FM_MODE_RX: 1159 case FM_MODE_RX:
@@ -1167,7 +1167,7 @@ u32 fmc_set_region(struct fmdev *fmdev, u8 region_to_set)
1167 } 1167 }
1168} 1168}
1169 1169
1170u32 fmc_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset) 1170int fmc_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset)
1171{ 1171{
1172 switch (fmdev->curr_fmmode) { 1172 switch (fmdev->curr_fmmode) {
1173 case FM_MODE_RX: 1173 case FM_MODE_RX:
@@ -1181,7 +1181,7 @@ u32 fmc_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset)
1181 } 1181 }
1182} 1182}
1183 1183
1184u32 fmc_set_stereo_mono(struct fmdev *fmdev, u16 mode) 1184int fmc_set_stereo_mono(struct fmdev *fmdev, u16 mode)
1185{ 1185{
1186 switch (fmdev->curr_fmmode) { 1186 switch (fmdev->curr_fmmode) {
1187 case FM_MODE_RX: 1187 case FM_MODE_RX:
@@ -1195,7 +1195,7 @@ u32 fmc_set_stereo_mono(struct fmdev *fmdev, u16 mode)
1195 } 1195 }
1196} 1196}
1197 1197
1198u32 fmc_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis) 1198int fmc_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis)
1199{ 1199{
1200 switch (fmdev->curr_fmmode) { 1200 switch (fmdev->curr_fmmode) {
1201 case FM_MODE_RX: 1201 case FM_MODE_RX:
@@ -1210,10 +1210,10 @@ u32 fmc_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis)
1210} 1210}
1211 1211
1212/* Sends power off command to the chip */ 1212/* Sends power off command to the chip */
1213static u32 fm_power_down(struct fmdev *fmdev) 1213static int fm_power_down(struct fmdev *fmdev)
1214{ 1214{
1215 u16 payload; 1215 u16 payload;
1216 u32 ret; 1216 int ret;
1217 1217
1218 if (!test_bit(FM_CORE_READY, &fmdev->flag)) { 1218 if (!test_bit(FM_CORE_READY, &fmdev->flag)) {
1219 fmerr("FM core is not ready\n"); 1219 fmerr("FM core is not ready\n");
@@ -1234,7 +1234,7 @@ static u32 fm_power_down(struct fmdev *fmdev)
1234} 1234}
1235 1235
1236/* Reads init command from FM firmware file and loads to the chip */ 1236/* Reads init command from FM firmware file and loads to the chip */
1237static u32 fm_download_firmware(struct fmdev *fmdev, const u8 *fw_name) 1237static int fm_download_firmware(struct fmdev *fmdev, const u8 *fw_name)
1238{ 1238{
1239 const struct firmware *fw_entry; 1239 const struct firmware *fw_entry;
1240 struct bts_header *fw_header; 1240 struct bts_header *fw_header;
@@ -1299,7 +1299,7 @@ rel_fw:
1299} 1299}
1300 1300
1301/* Loads default RX configuration to the chip */ 1301/* Loads default RX configuration to the chip */
1302static u32 load_default_rx_configuration(struct fmdev *fmdev) 1302static int load_default_rx_configuration(struct fmdev *fmdev)
1303{ 1303{
1304 int ret; 1304 int ret;
1305 1305
@@ -1311,7 +1311,7 @@ static u32 load_default_rx_configuration(struct fmdev *fmdev)
1311} 1311}
1312 1312
1313/* Does FM power on sequence */ 1313/* Does FM power on sequence */
1314static u32 fm_power_up(struct fmdev *fmdev, u8 mode) 1314static int fm_power_up(struct fmdev *fmdev, u8 mode)
1315{ 1315{
1316 u16 payload, asic_id, asic_ver; 1316 u16 payload, asic_id, asic_ver;
1317 int resp_len, ret; 1317 int resp_len, ret;
@@ -1374,7 +1374,7 @@ rel:
1374} 1374}
1375 1375
1376/* Set FM Modes(TX, RX, OFF) */ 1376/* Set FM Modes(TX, RX, OFF) */
1377u32 fmc_set_mode(struct fmdev *fmdev, u8 fm_mode) 1377int fmc_set_mode(struct fmdev *fmdev, u8 fm_mode)
1378{ 1378{
1379 int ret = 0; 1379 int ret = 0;
1380 1380
@@ -1427,7 +1427,7 @@ u32 fmc_set_mode(struct fmdev *fmdev, u8 fm_mode)
1427} 1427}
1428 1428
1429/* Returns current FM mode (TX, RX, OFF) */ 1429/* Returns current FM mode (TX, RX, OFF) */
1430u32 fmc_get_mode(struct fmdev *fmdev, u8 *fmmode) 1430int fmc_get_mode(struct fmdev *fmdev, u8 *fmmode)
1431{ 1431{
1432 if (!test_bit(FM_CORE_READY, &fmdev->flag)) { 1432 if (!test_bit(FM_CORE_READY, &fmdev->flag)) {
1433 fmerr("FM core is not ready\n"); 1433 fmerr("FM core is not ready\n");
@@ -1483,10 +1483,10 @@ static void fm_st_reg_comp_cb(void *arg, char data)
1483 * This function will be called from FM V4L2 open function. 1483 * This function will be called from FM V4L2 open function.
1484 * Register with ST driver and initialize driver data. 1484 * Register with ST driver and initialize driver data.
1485 */ 1485 */
1486u32 fmc_prepare(struct fmdev *fmdev) 1486int fmc_prepare(struct fmdev *fmdev)
1487{ 1487{
1488 static struct st_proto_s fm_st_proto; 1488 static struct st_proto_s fm_st_proto;
1489 u32 ret; 1489 int ret;
1490 1490
1491 if (test_bit(FM_CORE_READY, &fmdev->flag)) { 1491 if (test_bit(FM_CORE_READY, &fmdev->flag)) {
1492 fmdbg("FM Core is already up\n"); 1492 fmdbg("FM Core is already up\n");
@@ -1512,10 +1512,8 @@ u32 fmc_prepare(struct fmdev *fmdev)
1512 fmdev->streg_cbdata = -EINPROGRESS; 1512 fmdev->streg_cbdata = -EINPROGRESS;
1513 fmdbg("%s waiting for ST reg completion signal\n", __func__); 1513 fmdbg("%s waiting for ST reg completion signal\n", __func__);
1514 1514
1515 ret = wait_for_completion_timeout(&wait_for_fmdrv_reg_comp, 1515 if (!wait_for_completion_timeout(&wait_for_fmdrv_reg_comp,
1516 FM_ST_REG_TIMEOUT); 1516 FM_ST_REG_TIMEOUT)) {
1517
1518 if (!ret) {
1519 fmerr("Timeout(%d sec), didn't get reg " 1517 fmerr("Timeout(%d sec), didn't get reg "
1520 "completion signal from ST\n", 1518 "completion signal from ST\n",
1521 jiffies_to_msecs(FM_ST_REG_TIMEOUT) / 1000); 1519 jiffies_to_msecs(FM_ST_REG_TIMEOUT) / 1000);
@@ -1589,10 +1587,10 @@ u32 fmc_prepare(struct fmdev *fmdev)
1589 * This function will be called from FM V4L2 release function. 1587 * This function will be called from FM V4L2 release function.
1590 * Unregister from ST driver. 1588 * Unregister from ST driver.
1591 */ 1589 */
1592u32 fmc_release(struct fmdev *fmdev) 1590int fmc_release(struct fmdev *fmdev)
1593{ 1591{
1594 static struct st_proto_s fm_st_proto; 1592 static struct st_proto_s fm_st_proto;
1595 u32 ret; 1593 int ret;
1596 1594
1597 if (!test_bit(FM_CORE_READY, &fmdev->flag)) { 1595 if (!test_bit(FM_CORE_READY, &fmdev->flag)) {
1598 fmdbg("FM Core is already down\n"); 1596 fmdbg("FM Core is already down\n");
@@ -1631,7 +1629,7 @@ u32 fmc_release(struct fmdev *fmdev)
1631static int __init fm_drv_init(void) 1629static int __init fm_drv_init(void)
1632{ 1630{
1633 struct fmdev *fmdev = NULL; 1631 struct fmdev *fmdev = NULL;
1634 u32 ret = -ENOMEM; 1632 int ret = -ENOMEM;
1635 1633
1636 fmdbg("FM driver version %s\n", FM_DRV_VERSION); 1634 fmdbg("FM driver version %s\n", FM_DRV_VERSION);
1637 1635
diff --git a/drivers/media/radio/wl128x/fmdrv_common.h b/drivers/media/radio/wl128x/fmdrv_common.h
index aee243bb663..d9b9c6cf83b 100644
--- a/drivers/media/radio/wl128x/fmdrv_common.h
+++ b/drivers/media/radio/wl128x/fmdrv_common.h
@@ -368,27 +368,27 @@ struct fm_event_msg_hdr {
368#define FM_TX_ANT_IMP_500 2 368#define FM_TX_ANT_IMP_500 2
369 369
370/* Functions exported by FM common sub-module */ 370/* Functions exported by FM common sub-module */
371u32 fmc_prepare(struct fmdev *); 371int fmc_prepare(struct fmdev *);
372u32 fmc_release(struct fmdev *); 372int fmc_release(struct fmdev *);
373 373
374void fmc_update_region_info(struct fmdev *, u8); 374void fmc_update_region_info(struct fmdev *, u8);
375u32 fmc_send_cmd(struct fmdev *, u8, u16, 375int fmc_send_cmd(struct fmdev *, u8, u16,
376 void *, unsigned int, void *, int *); 376 void *, unsigned int, void *, int *);
377u32 fmc_is_rds_data_available(struct fmdev *, struct file *, 377int fmc_is_rds_data_available(struct fmdev *, struct file *,
378 struct poll_table_struct *); 378 struct poll_table_struct *);
379u32 fmc_transfer_rds_from_internal_buff(struct fmdev *, struct file *, 379int fmc_transfer_rds_from_internal_buff(struct fmdev *, struct file *,
380 u8 __user *, size_t); 380 u8 __user *, size_t);
381 381
382u32 fmc_set_freq(struct fmdev *, u32); 382int fmc_set_freq(struct fmdev *, u32);
383u32 fmc_set_mode(struct fmdev *, u8); 383int fmc_set_mode(struct fmdev *, u8);
384u32 fmc_set_region(struct fmdev *, u8); 384int fmc_set_region(struct fmdev *, u8);
385u32 fmc_set_mute_mode(struct fmdev *, u8); 385int fmc_set_mute_mode(struct fmdev *, u8);
386u32 fmc_set_stereo_mono(struct fmdev *, u16); 386int fmc_set_stereo_mono(struct fmdev *, u16);
387u32 fmc_set_rds_mode(struct fmdev *, u8); 387int fmc_set_rds_mode(struct fmdev *, u8);
388 388
389u32 fmc_get_freq(struct fmdev *, u32 *); 389int fmc_get_freq(struct fmdev *, u32 *);
390u32 fmc_get_region(struct fmdev *, u8 *); 390int fmc_get_region(struct fmdev *, u8 *);
391u32 fmc_get_mode(struct fmdev *, u8 *); 391int fmc_get_mode(struct fmdev *, u8 *);
392 392
393/* 393/*
394 * channel spacing 394 * channel spacing
diff --git a/drivers/media/radio/wl128x/fmdrv_rx.c b/drivers/media/radio/wl128x/fmdrv_rx.c
index ec529b55b04..43fb72291be 100644
--- a/drivers/media/radio/wl128x/fmdrv_rx.c
+++ b/drivers/media/radio/wl128x/fmdrv_rx.c
@@ -43,12 +43,13 @@ void fm_rx_reset_station_info(struct fmdev *fmdev)
43 fmdev->rx.stat_info.af_list_max = 0; 43 fmdev->rx.stat_info.af_list_max = 0;
44} 44}
45 45
46u32 fm_rx_set_freq(struct fmdev *fmdev, u32 freq) 46int fm_rx_set_freq(struct fmdev *fmdev, u32 freq)
47{ 47{
48 unsigned long timeleft; 48 unsigned long timeleft;
49 u16 payload, curr_frq, intr_flag; 49 u16 payload, curr_frq, intr_flag;
50 u32 curr_frq_in_khz; 50 u32 curr_frq_in_khz;
51 u32 ret, resp_len; 51 u32 resp_len;
52 int ret;
52 53
53 if (freq < fmdev->rx.region.bot_freq || freq > fmdev->rx.region.top_freq) { 54 if (freq < fmdev->rx.region.bot_freq || freq > fmdev->rx.region.top_freq) {
54 fmerr("Invalid frequency %d\n", freq); 55 fmerr("Invalid frequency %d\n", freq);
@@ -141,10 +142,10 @@ exit:
141 return ret; 142 return ret;
142} 143}
143 144
144static u32 fm_rx_set_channel_spacing(struct fmdev *fmdev, u32 spacing) 145static int fm_rx_set_channel_spacing(struct fmdev *fmdev, u32 spacing)
145{ 146{
146 u16 payload; 147 u16 payload;
147 u32 ret; 148 int ret;
148 149
149 if (spacing > 0 && spacing <= 50000) 150 if (spacing > 0 && spacing <= 50000)
150 spacing = FM_CHANNEL_SPACING_50KHZ; 151 spacing = FM_CHANNEL_SPACING_50KHZ;
@@ -165,7 +166,7 @@ static u32 fm_rx_set_channel_spacing(struct fmdev *fmdev, u32 spacing)
165 return ret; 166 return ret;
166} 167}
167 168
168u32 fm_rx_seek(struct fmdev *fmdev, u32 seek_upward, 169int fm_rx_seek(struct fmdev *fmdev, u32 seek_upward,
169 u32 wrap_around, u32 spacing) 170 u32 wrap_around, u32 spacing)
170{ 171{
171 u32 resp_len; 172 u32 resp_len;
@@ -173,7 +174,7 @@ u32 fm_rx_seek(struct fmdev *fmdev, u32 seek_upward,
173 u16 payload, int_reason, intr_flag; 174 u16 payload, int_reason, intr_flag;
174 u16 offset, space_idx; 175 u16 offset, space_idx;
175 unsigned long timeleft; 176 unsigned long timeleft;
176 u32 ret; 177 int ret;
177 178
178 /* Set channel spacing */ 179 /* Set channel spacing */
179 ret = fm_rx_set_channel_spacing(fmdev, spacing); 180 ret = fm_rx_set_channel_spacing(fmdev, spacing);
@@ -296,10 +297,10 @@ again:
296 return ret; 297 return ret;
297} 298}
298 299
299u32 fm_rx_set_volume(struct fmdev *fmdev, u16 vol_to_set) 300int fm_rx_set_volume(struct fmdev *fmdev, u16 vol_to_set)
300{ 301{
301 u16 payload; 302 u16 payload;
302 u32 ret; 303 int ret;
303 304
304 if (fmdev->curr_fmmode != FM_MODE_RX) 305 if (fmdev->curr_fmmode != FM_MODE_RX)
305 return -EPERM; 306 return -EPERM;
@@ -322,7 +323,7 @@ u32 fm_rx_set_volume(struct fmdev *fmdev, u16 vol_to_set)
322} 323}
323 324
324/* Get volume */ 325/* Get volume */
325u32 fm_rx_get_volume(struct fmdev *fmdev, u16 *curr_vol) 326int fm_rx_get_volume(struct fmdev *fmdev, u16 *curr_vol)
326{ 327{
327 if (fmdev->curr_fmmode != FM_MODE_RX) 328 if (fmdev->curr_fmmode != FM_MODE_RX)
328 return -EPERM; 329 return -EPERM;
@@ -338,7 +339,7 @@ u32 fm_rx_get_volume(struct fmdev *fmdev, u16 *curr_vol)
338} 339}
339 340
340/* To get current band's bottom and top frequency */ 341/* To get current band's bottom and top frequency */
341u32 fm_rx_get_band_freq_range(struct fmdev *fmdev, u32 *bot_freq, u32 *top_freq) 342int fm_rx_get_band_freq_range(struct fmdev *fmdev, u32 *bot_freq, u32 *top_freq)
342{ 343{
343 if (bot_freq != NULL) 344 if (bot_freq != NULL)
344 *bot_freq = fmdev->rx.region.bot_freq; 345 *bot_freq = fmdev->rx.region.bot_freq;
@@ -356,11 +357,11 @@ void fm_rx_get_region(struct fmdev *fmdev, u8 *region)
356} 357}
357 358
358/* Sets band (0-Europe/US; 1-Japan) */ 359/* Sets band (0-Europe/US; 1-Japan) */
359u32 fm_rx_set_region(struct fmdev *fmdev, u8 region_to_set) 360int fm_rx_set_region(struct fmdev *fmdev, u8 region_to_set)
360{ 361{
361 u16 payload; 362 u16 payload;
362 u32 new_frq = 0; 363 u32 new_frq = 0;
363 u32 ret; 364 int ret;
364 365
365 if (region_to_set != FM_BAND_EUROPE_US && 366 if (region_to_set != FM_BAND_EUROPE_US &&
366 region_to_set != FM_BAND_JAPAN) { 367 region_to_set != FM_BAND_JAPAN) {
@@ -399,7 +400,7 @@ u32 fm_rx_set_region(struct fmdev *fmdev, u8 region_to_set)
399} 400}
400 401
401/* Reads current mute mode (Mute Off/On/Attenuate)*/ 402/* Reads current mute mode (Mute Off/On/Attenuate)*/
402u32 fm_rx_get_mute_mode(struct fmdev *fmdev, u8 *curr_mute_mode) 403int fm_rx_get_mute_mode(struct fmdev *fmdev, u8 *curr_mute_mode)
403{ 404{
404 if (fmdev->curr_fmmode != FM_MODE_RX) 405 if (fmdev->curr_fmmode != FM_MODE_RX)
405 return -EPERM; 406 return -EPERM;
@@ -414,10 +415,10 @@ u32 fm_rx_get_mute_mode(struct fmdev *fmdev, u8 *curr_mute_mode)
414 return 0; 415 return 0;
415} 416}
416 417
417static u32 fm_config_rx_mute_reg(struct fmdev *fmdev) 418static int fm_config_rx_mute_reg(struct fmdev *fmdev)
418{ 419{
419 u16 payload, muteval; 420 u16 payload, muteval;
420 u32 ret; 421 int ret;
421 422
422 muteval = 0; 423 muteval = 0;
423 switch (fmdev->rx.mute_mode) { 424 switch (fmdev->rx.mute_mode) {
@@ -448,10 +449,10 @@ static u32 fm_config_rx_mute_reg(struct fmdev *fmdev)
448} 449}
449 450
450/* Configures mute mode (Mute Off/On/Attenuate) */ 451/* Configures mute mode (Mute Off/On/Attenuate) */
451u32 fm_rx_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset) 452int fm_rx_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset)
452{ 453{
453 u8 org_state; 454 u8 org_state;
454 u32 ret; 455 int ret;
455 456
456 if (fmdev->rx.mute_mode == mute_mode_toset) 457 if (fmdev->rx.mute_mode == mute_mode_toset)
457 return 0; 458 return 0;
@@ -469,7 +470,7 @@ u32 fm_rx_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset)
469} 470}
470 471
471/* Gets RF dependent soft mute mode enable/disable status */ 472/* Gets RF dependent soft mute mode enable/disable status */
472u32 fm_rx_get_rfdepend_softmute(struct fmdev *fmdev, u8 *curr_mute_mode) 473int fm_rx_get_rfdepend_softmute(struct fmdev *fmdev, u8 *curr_mute_mode)
473{ 474{
474 if (fmdev->curr_fmmode != FM_MODE_RX) 475 if (fmdev->curr_fmmode != FM_MODE_RX)
475 return -EPERM; 476 return -EPERM;
@@ -485,10 +486,10 @@ u32 fm_rx_get_rfdepend_softmute(struct fmdev *fmdev, u8 *curr_mute_mode)
485} 486}
486 487
487/* Sets RF dependent soft mute mode */ 488/* Sets RF dependent soft mute mode */
488u32 fm_rx_set_rfdepend_softmute(struct fmdev *fmdev, u8 rfdepend_mute) 489int fm_rx_set_rfdepend_softmute(struct fmdev *fmdev, u8 rfdepend_mute)
489{ 490{
490 u8 org_state; 491 u8 org_state;
491 u32 ret; 492 int ret;
492 493
493 if (fmdev->curr_fmmode != FM_MODE_RX) 494 if (fmdev->curr_fmmode != FM_MODE_RX)
494 return -EPERM; 495 return -EPERM;
@@ -514,11 +515,11 @@ u32 fm_rx_set_rfdepend_softmute(struct fmdev *fmdev, u8 rfdepend_mute)
514} 515}
515 516
516/* Returns the signal strength level of current channel */ 517/* Returns the signal strength level of current channel */
517u32 fm_rx_get_rssi_level(struct fmdev *fmdev, u16 *rssilvl) 518int fm_rx_get_rssi_level(struct fmdev *fmdev, u16 *rssilvl)
518{ 519{
519 u16 curr_rssi_lel; 520 u16 curr_rssi_lel;
520 u32 resp_len; 521 u32 resp_len;
521 u32 ret; 522 int ret;
522 523
523 if (rssilvl == NULL) { 524 if (rssilvl == NULL) {
524 fmerr("Invalid memory\n"); 525 fmerr("Invalid memory\n");
@@ -539,10 +540,10 @@ u32 fm_rx_get_rssi_level(struct fmdev *fmdev, u16 *rssilvl)
539 * Sets the signal strength level that once reached 540 * Sets the signal strength level that once reached
540 * will stop the auto search process 541 * will stop the auto search process
541 */ 542 */
542u32 fm_rx_set_rssi_threshold(struct fmdev *fmdev, short rssi_lvl_toset) 543int fm_rx_set_rssi_threshold(struct fmdev *fmdev, short rssi_lvl_toset)
543{ 544{
544 u16 payload; 545 u16 payload;
545 u32 ret; 546 int ret;
546 547
547 if (rssi_lvl_toset < FM_RX_RSSI_THRESHOLD_MIN || 548 if (rssi_lvl_toset < FM_RX_RSSI_THRESHOLD_MIN ||
548 rssi_lvl_toset > FM_RX_RSSI_THRESHOLD_MAX) { 549 rssi_lvl_toset > FM_RX_RSSI_THRESHOLD_MAX) {
@@ -561,7 +562,7 @@ u32 fm_rx_set_rssi_threshold(struct fmdev *fmdev, short rssi_lvl_toset)
561} 562}
562 563
563/* Returns current RX RSSI threshold value */ 564/* Returns current RX RSSI threshold value */
564u32 fm_rx_get_rssi_threshold(struct fmdev *fmdev, short *curr_rssi_lvl) 565int fm_rx_get_rssi_threshold(struct fmdev *fmdev, short *curr_rssi_lvl)
565{ 566{
566 if (fmdev->curr_fmmode != FM_MODE_RX) 567 if (fmdev->curr_fmmode != FM_MODE_RX)
567 return -EPERM; 568 return -EPERM;
@@ -577,10 +578,10 @@ u32 fm_rx_get_rssi_threshold(struct fmdev *fmdev, short *curr_rssi_lvl)
577} 578}
578 579
579/* Sets RX stereo/mono modes */ 580/* Sets RX stereo/mono modes */
580u32 fm_rx_set_stereo_mono(struct fmdev *fmdev, u16 mode) 581int fm_rx_set_stereo_mono(struct fmdev *fmdev, u16 mode)
581{ 582{
582 u16 payload; 583 u16 payload;
583 u32 ret; 584 int ret;
584 585
585 if (mode != FM_STEREO_MODE && mode != FM_MONO_MODE) { 586 if (mode != FM_STEREO_MODE && mode != FM_MONO_MODE) {
586 fmerr("Invalid mode\n"); 587 fmerr("Invalid mode\n");
@@ -605,10 +606,11 @@ u32 fm_rx_set_stereo_mono(struct fmdev *fmdev, u16 mode)
605} 606}
606 607
607/* Gets current RX stereo/mono mode */ 608/* Gets current RX stereo/mono mode */
608u32 fm_rx_get_stereo_mono(struct fmdev *fmdev, u16 *mode) 609int fm_rx_get_stereo_mono(struct fmdev *fmdev, u16 *mode)
609{ 610{
610 u16 curr_mode; 611 u16 curr_mode;
611 u32 ret, resp_len; 612 u32 resp_len;
613 int ret;
612 614
613 if (mode == NULL) { 615 if (mode == NULL) {
614 fmerr("Invalid memory\n"); 616 fmerr("Invalid memory\n");
@@ -626,10 +628,10 @@ u32 fm_rx_get_stereo_mono(struct fmdev *fmdev, u16 *mode)
626} 628}
627 629
628/* Choose RX de-emphasis filter mode (50us/75us) */ 630/* Choose RX de-emphasis filter mode (50us/75us) */
629u32 fm_rx_set_deemphasis_mode(struct fmdev *fmdev, u16 mode) 631int fm_rx_set_deemphasis_mode(struct fmdev *fmdev, u16 mode)
630{ 632{
631 u16 payload; 633 u16 payload;
632 u32 ret; 634 int ret;
633 635
634 if (fmdev->curr_fmmode != FM_MODE_RX) 636 if (fmdev->curr_fmmode != FM_MODE_RX)
635 return -EPERM; 637 return -EPERM;
@@ -652,7 +654,7 @@ u32 fm_rx_set_deemphasis_mode(struct fmdev *fmdev, u16 mode)
652} 654}
653 655
654/* Gets current RX de-emphasis filter mode */ 656/* Gets current RX de-emphasis filter mode */
655u32 fm_rx_get_deemph_mode(struct fmdev *fmdev, u16 *curr_deemphasis_mode) 657int fm_rx_get_deemph_mode(struct fmdev *fmdev, u16 *curr_deemphasis_mode)
656{ 658{
657 if (fmdev->curr_fmmode != FM_MODE_RX) 659 if (fmdev->curr_fmmode != FM_MODE_RX)
658 return -EPERM; 660 return -EPERM;
@@ -668,10 +670,10 @@ u32 fm_rx_get_deemph_mode(struct fmdev *fmdev, u16 *curr_deemphasis_mode)
668} 670}
669 671
670/* Enable/Disable RX RDS */ 672/* Enable/Disable RX RDS */
671u32 fm_rx_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis) 673int fm_rx_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis)
672{ 674{
673 u16 payload; 675 u16 payload;
674 u32 ret; 676 int ret;
675 677
676 if (rds_en_dis != FM_RDS_ENABLE && rds_en_dis != FM_RDS_DISABLE) { 678 if (rds_en_dis != FM_RDS_ENABLE && rds_en_dis != FM_RDS_DISABLE) {
677 fmerr("Invalid rds option\n"); 679 fmerr("Invalid rds option\n");
@@ -743,7 +745,7 @@ u32 fm_rx_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis)
743} 745}
744 746
745/* Returns current RX RDS enable/disable status */ 747/* Returns current RX RDS enable/disable status */
746u32 fm_rx_get_rds_mode(struct fmdev *fmdev, u8 *curr_rds_en_dis) 748int fm_rx_get_rds_mode(struct fmdev *fmdev, u8 *curr_rds_en_dis)
747{ 749{
748 if (fmdev->curr_fmmode != FM_MODE_RX) 750 if (fmdev->curr_fmmode != FM_MODE_RX)
749 return -EPERM; 751 return -EPERM;
@@ -759,10 +761,10 @@ u32 fm_rx_get_rds_mode(struct fmdev *fmdev, u8 *curr_rds_en_dis)
759} 761}
760 762
761/* Sets RDS operation mode (RDS/RDBS) */ 763/* Sets RDS operation mode (RDS/RDBS) */
762u32 fm_rx_set_rds_system(struct fmdev *fmdev, u8 rds_mode) 764int fm_rx_set_rds_system(struct fmdev *fmdev, u8 rds_mode)
763{ 765{
764 u16 payload; 766 u16 payload;
765 u32 ret; 767 int ret;
766 768
767 if (fmdev->curr_fmmode != FM_MODE_RX) 769 if (fmdev->curr_fmmode != FM_MODE_RX)
768 return -EPERM; 770 return -EPERM;
@@ -784,7 +786,7 @@ u32 fm_rx_set_rds_system(struct fmdev *fmdev, u8 rds_mode)
784} 786}
785 787
786/* Returns current RDS operation mode */ 788/* Returns current RDS operation mode */
787u32 fm_rx_get_rds_system(struct fmdev *fmdev, u8 *rds_mode) 789int fm_rx_get_rds_system(struct fmdev *fmdev, u8 *rds_mode)
788{ 790{
789 if (fmdev->curr_fmmode != FM_MODE_RX) 791 if (fmdev->curr_fmmode != FM_MODE_RX)
790 return -EPERM; 792 return -EPERM;
@@ -800,10 +802,10 @@ u32 fm_rx_get_rds_system(struct fmdev *fmdev, u8 *rds_mode)
800} 802}
801 803
802/* Configures Alternate Frequency switch mode */ 804/* Configures Alternate Frequency switch mode */
803u32 fm_rx_set_af_switch(struct fmdev *fmdev, u8 af_mode) 805int fm_rx_set_af_switch(struct fmdev *fmdev, u8 af_mode)
804{ 806{
805 u16 payload; 807 u16 payload;
806 u32 ret; 808 int ret;
807 809
808 if (fmdev->curr_fmmode != FM_MODE_RX) 810 if (fmdev->curr_fmmode != FM_MODE_RX)
809 return -EPERM; 811 return -EPERM;
@@ -831,7 +833,7 @@ u32 fm_rx_set_af_switch(struct fmdev *fmdev, u8 af_mode)
831} 833}
832 834
833/* Returns Alternate Frequency switch status */ 835/* Returns Alternate Frequency switch status */
834u32 fm_rx_get_af_switch(struct fmdev *fmdev, u8 *af_mode) 836int fm_rx_get_af_switch(struct fmdev *fmdev, u8 *af_mode)
835{ 837{
836 if (fmdev->curr_fmmode != FM_MODE_RX) 838 if (fmdev->curr_fmmode != FM_MODE_RX)
837 return -EPERM; 839 return -EPERM;
diff --git a/drivers/media/radio/wl128x/fmdrv_rx.h b/drivers/media/radio/wl128x/fmdrv_rx.h
index 329e62f6be7..32add81f8d8 100644
--- a/drivers/media/radio/wl128x/fmdrv_rx.h
+++ b/drivers/media/radio/wl128x/fmdrv_rx.h
@@ -22,38 +22,38 @@
22#ifndef _FMDRV_RX_H 22#ifndef _FMDRV_RX_H
23#define _FMDRV_RX_H 23#define _FMDRV_RX_H
24 24
25u32 fm_rx_set_freq(struct fmdev *, u32); 25int fm_rx_set_freq(struct fmdev *, u32);
26u32 fm_rx_set_mute_mode(struct fmdev *, u8); 26int fm_rx_set_mute_mode(struct fmdev *, u8);
27u32 fm_rx_set_stereo_mono(struct fmdev *, u16); 27int fm_rx_set_stereo_mono(struct fmdev *, u16);
28u32 fm_rx_set_rds_mode(struct fmdev *, u8); 28int fm_rx_set_rds_mode(struct fmdev *, u8);
29u32 fm_rx_set_rds_system(struct fmdev *, u8); 29int fm_rx_set_rds_system(struct fmdev *, u8);
30u32 fm_rx_set_volume(struct fmdev *, u16); 30int fm_rx_set_volume(struct fmdev *, u16);
31u32 fm_rx_set_rssi_threshold(struct fmdev *, short); 31int fm_rx_set_rssi_threshold(struct fmdev *, short);
32u32 fm_rx_set_region(struct fmdev *, u8); 32int fm_rx_set_region(struct fmdev *, u8);
33u32 fm_rx_set_rfdepend_softmute(struct fmdev *, u8); 33int fm_rx_set_rfdepend_softmute(struct fmdev *, u8);
34u32 fm_rx_set_deemphasis_mode(struct fmdev *, u16); 34int fm_rx_set_deemphasis_mode(struct fmdev *, u16);
35u32 fm_rx_set_af_switch(struct fmdev *, u8); 35int fm_rx_set_af_switch(struct fmdev *, u8);
36 36
37void fm_rx_reset_rds_cache(struct fmdev *); 37void fm_rx_reset_rds_cache(struct fmdev *);
38void fm_rx_reset_station_info(struct fmdev *); 38void fm_rx_reset_station_info(struct fmdev *);
39 39
40u32 fm_rx_seek(struct fmdev *, u32, u32, u32); 40int fm_rx_seek(struct fmdev *, u32, u32, u32);
41 41
42u32 fm_rx_get_rds_mode(struct fmdev *, u8 *); 42int fm_rx_get_rds_mode(struct fmdev *, u8 *);
43u32 fm_rx_get_rds_system(struct fmdev *, u8 *); 43int fm_rx_get_rds_system(struct fmdev *, u8 *);
44u32 fm_rx_get_mute_mode(struct fmdev *, u8 *); 44int fm_rx_get_mute_mode(struct fmdev *, u8 *);
45u32 fm_rx_get_volume(struct fmdev *, u16 *); 45int fm_rx_get_volume(struct fmdev *, u16 *);
46u32 fm_rx_get_band_freq_range(struct fmdev *, 46int fm_rx_get_band_freq_range(struct fmdev *,
47 u32 *, u32 *); 47 u32 *, u32 *);
48u32 fm_rx_get_stereo_mono(struct fmdev *, u16 *); 48int fm_rx_get_stereo_mono(struct fmdev *, u16 *);
49u32 fm_rx_get_rssi_level(struct fmdev *, u16 *); 49int fm_rx_get_rssi_level(struct fmdev *, u16 *);
50u32 fm_rx_get_rssi_threshold(struct fmdev *, short *); 50int fm_rx_get_rssi_threshold(struct fmdev *, short *);
51u32 fm_rx_get_rfdepend_softmute(struct fmdev *, u8 *); 51int fm_rx_get_rfdepend_softmute(struct fmdev *, u8 *);
52u32 fm_rx_get_deemph_mode(struct fmdev *, u16 *); 52int fm_rx_get_deemph_mode(struct fmdev *, u16 *);
53u32 fm_rx_get_af_switch(struct fmdev *, u8 *); 53int fm_rx_get_af_switch(struct fmdev *, u8 *);
54void fm_rx_get_region(struct fmdev *, u8 *); 54void fm_rx_get_region(struct fmdev *, u8 *);
55 55
56u32 fm_rx_set_chanl_spacing(struct fmdev *, u8); 56int fm_rx_set_chanl_spacing(struct fmdev *, u8);
57u32 fm_rx_get_chanl_spacing(struct fmdev *, u8 *); 57int fm_rx_get_chanl_spacing(struct fmdev *, u8 *);
58#endif 58#endif
59 59
diff --git a/drivers/media/radio/wl128x/fmdrv_tx.c b/drivers/media/radio/wl128x/fmdrv_tx.c
index be54068b56a..6ea33e09d63 100644
--- a/drivers/media/radio/wl128x/fmdrv_tx.c
+++ b/drivers/media/radio/wl128x/fmdrv_tx.c
@@ -24,10 +24,10 @@
24#include "fmdrv_common.h" 24#include "fmdrv_common.h"
25#include "fmdrv_tx.h" 25#include "fmdrv_tx.h"
26 26
27u32 fm_tx_set_stereo_mono(struct fmdev *fmdev, u16 mode) 27int fm_tx_set_stereo_mono(struct fmdev *fmdev, u16 mode)
28{ 28{
29 u16 payload; 29 u16 payload;
30 u32 ret; 30 int ret;
31 31
32 if (fmdev->tx_data.aud_mode == mode) 32 if (fmdev->tx_data.aud_mode == mode)
33 return 0; 33 return 0;
@@ -46,10 +46,10 @@ u32 fm_tx_set_stereo_mono(struct fmdev *fmdev, u16 mode)
46 return ret; 46 return ret;
47} 47}
48 48
49static u32 set_rds_text(struct fmdev *fmdev, u8 *rds_text) 49static int set_rds_text(struct fmdev *fmdev, u8 *rds_text)
50{ 50{
51 u16 payload; 51 u16 payload;
52 u32 ret; 52 int ret;
53 53
54 ret = fmc_send_cmd(fmdev, RDS_DATA_SET, REG_WR, rds_text, 54 ret = fmc_send_cmd(fmdev, RDS_DATA_SET, REG_WR, rds_text,
55 strlen(rds_text), NULL, NULL); 55 strlen(rds_text), NULL, NULL);
@@ -66,10 +66,10 @@ static u32 set_rds_text(struct fmdev *fmdev, u8 *rds_text)
66 return 0; 66 return 0;
67} 67}
68 68
69static u32 set_rds_data_mode(struct fmdev *fmdev, u8 mode) 69static int set_rds_data_mode(struct fmdev *fmdev, u8 mode)
70{ 70{
71 u16 payload; 71 u16 payload;
72 u32 ret; 72 int ret;
73 73
74 /* Setting unique PI TODO: how unique? */ 74 /* Setting unique PI TODO: how unique? */
75 payload = (u16)0xcafe; 75 payload = (u16)0xcafe;
@@ -89,10 +89,10 @@ static u32 set_rds_data_mode(struct fmdev *fmdev, u8 mode)
89 return 0; 89 return 0;
90} 90}
91 91
92static u32 set_rds_len(struct fmdev *fmdev, u8 type, u16 len) 92static int set_rds_len(struct fmdev *fmdev, u8 type, u16 len)
93{ 93{
94 u16 payload; 94 u16 payload;
95 u32 ret; 95 int ret;
96 96
97 len |= type << 8; 97 len |= type << 8;
98 payload = len; 98 payload = len;
@@ -105,10 +105,10 @@ static u32 set_rds_len(struct fmdev *fmdev, u8 type, u16 len)
105 return 0; 105 return 0;
106} 106}
107 107
108u32 fm_tx_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis) 108int fm_tx_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis)
109{ 109{
110 u16 payload; 110 u16 payload;
111 u32 ret; 111 int ret;
112 u8 rds_text[] = "Zoom2\n"; 112 u8 rds_text[] = "Zoom2\n";
113 113
114 fmdbg("rds_en_dis:%d(E:%d, D:%d)\n", rds_en_dis, 114 fmdbg("rds_en_dis:%d(E:%d, D:%d)\n", rds_en_dis,
@@ -148,10 +148,10 @@ u32 fm_tx_set_rds_mode(struct fmdev *fmdev, u8 rds_en_dis)
148 return 0; 148 return 0;
149} 149}
150 150
151u32 fm_tx_set_radio_text(struct fmdev *fmdev, u8 *rds_text, u8 rds_type) 151int fm_tx_set_radio_text(struct fmdev *fmdev, u8 *rds_text, u8 rds_type)
152{ 152{
153 u16 payload; 153 u16 payload;
154 u32 ret; 154 int ret;
155 155
156 if (fmdev->curr_fmmode != FM_MODE_TX) 156 if (fmdev->curr_fmmode != FM_MODE_TX)
157 return -EPERM; 157 return -EPERM;
@@ -176,10 +176,10 @@ u32 fm_tx_set_radio_text(struct fmdev *fmdev, u8 *rds_text, u8 rds_type)
176 return 0; 176 return 0;
177} 177}
178 178
179u32 fm_tx_set_af(struct fmdev *fmdev, u32 af) 179int fm_tx_set_af(struct fmdev *fmdev, u32 af)
180{ 180{
181 u16 payload; 181 u16 payload;
182 u32 ret; 182 int ret;
183 183
184 if (fmdev->curr_fmmode != FM_MODE_TX) 184 if (fmdev->curr_fmmode != FM_MODE_TX)
185 return -EPERM; 185 return -EPERM;
@@ -196,10 +196,10 @@ u32 fm_tx_set_af(struct fmdev *fmdev, u32 af)
196 return 0; 196 return 0;
197} 197}
198 198
199u32 fm_tx_set_region(struct fmdev *fmdev, u8 region) 199int fm_tx_set_region(struct fmdev *fmdev, u8 region)
200{ 200{
201 u16 payload; 201 u16 payload;
202 u32 ret; 202 int ret;
203 203
204 if (region != FM_BAND_EUROPE_US && region != FM_BAND_JAPAN) { 204 if (region != FM_BAND_EUROPE_US && region != FM_BAND_JAPAN) {
205 fmerr("Invalid band\n"); 205 fmerr("Invalid band\n");
@@ -216,10 +216,10 @@ u32 fm_tx_set_region(struct fmdev *fmdev, u8 region)
216 return 0; 216 return 0;
217} 217}
218 218
219u32 fm_tx_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset) 219int fm_tx_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset)
220{ 220{
221 u16 payload; 221 u16 payload;
222 u32 ret; 222 int ret;
223 223
224 fmdbg("tx: mute mode %d\n", mute_mode_toset); 224 fmdbg("tx: mute mode %d\n", mute_mode_toset);
225 225
@@ -233,11 +233,11 @@ u32 fm_tx_set_mute_mode(struct fmdev *fmdev, u8 mute_mode_toset)
233} 233}
234 234
235/* Set TX Audio I/O */ 235/* Set TX Audio I/O */
236static u32 set_audio_io(struct fmdev *fmdev) 236static int set_audio_io(struct fmdev *fmdev)
237{ 237{
238 struct fmtx_data *tx = &fmdev->tx_data; 238 struct fmtx_data *tx = &fmdev->tx_data;
239 u16 payload; 239 u16 payload;
240 u32 ret; 240 int ret;
241 241
242 /* Set Audio I/O Enable */ 242 /* Set Audio I/O Enable */
243 payload = tx->audio_io; 243 payload = tx->audio_io;
@@ -251,12 +251,12 @@ static u32 set_audio_io(struct fmdev *fmdev)
251} 251}
252 252
253/* Start TX Transmission */ 253/* Start TX Transmission */
254static u32 enable_xmit(struct fmdev *fmdev, u8 new_xmit_state) 254static int enable_xmit(struct fmdev *fmdev, u8 new_xmit_state)
255{ 255{
256 struct fmtx_data *tx = &fmdev->tx_data; 256 struct fmtx_data *tx = &fmdev->tx_data;
257 unsigned long timeleft; 257 unsigned long timeleft;
258 u16 payload; 258 u16 payload;
259 u32 ret; 259 int ret;
260 260
261 /* Enable POWER_ENB interrupts */ 261 /* Enable POWER_ENB interrupts */
262 payload = FM_POW_ENB_EVENT; 262 payload = FM_POW_ENB_EVENT;
@@ -289,11 +289,11 @@ static u32 enable_xmit(struct fmdev *fmdev, u8 new_xmit_state)
289} 289}
290 290
291/* Set TX power level */ 291/* Set TX power level */
292u32 fm_tx_set_pwr_lvl(struct fmdev *fmdev, u8 new_pwr_lvl) 292int fm_tx_set_pwr_lvl(struct fmdev *fmdev, u8 new_pwr_lvl)
293{ 293{
294 u16 payload; 294 u16 payload;
295 struct fmtx_data *tx = &fmdev->tx_data; 295 struct fmtx_data *tx = &fmdev->tx_data;
296 u32 ret; 296 int ret;
297 297
298 if (fmdev->curr_fmmode != FM_MODE_TX) 298 if (fmdev->curr_fmmode != FM_MODE_TX)
299 return -EPERM; 299 return -EPERM;
@@ -328,11 +328,11 @@ u32 fm_tx_set_pwr_lvl(struct fmdev *fmdev, u8 new_pwr_lvl)
328 * Sets FM TX pre-emphasis filter value (OFF, 50us, or 75us) 328 * Sets FM TX pre-emphasis filter value (OFF, 50us, or 75us)
329 * Convert V4L2 specified filter values to chip specific filter values. 329 * Convert V4L2 specified filter values to chip specific filter values.
330 */ 330 */
331u32 fm_tx_set_preemph_filter(struct fmdev *fmdev, u32 preemphasis) 331int fm_tx_set_preemph_filter(struct fmdev *fmdev, u32 preemphasis)
332{ 332{
333 struct fmtx_data *tx = &fmdev->tx_data; 333 struct fmtx_data *tx = &fmdev->tx_data;
334 u16 payload; 334 u16 payload;
335 u32 ret; 335 int ret;
336 336
337 if (fmdev->curr_fmmode != FM_MODE_TX) 337 if (fmdev->curr_fmmode != FM_MODE_TX)
338 return -EPERM; 338 return -EPERM;
@@ -360,10 +360,11 @@ u32 fm_tx_set_preemph_filter(struct fmdev *fmdev, u32 preemphasis)
360} 360}
361 361
362/* Get the TX tuning capacitor value.*/ 362/* Get the TX tuning capacitor value.*/
363u32 fm_tx_get_tune_cap_val(struct fmdev *fmdev) 363int fm_tx_get_tune_cap_val(struct fmdev *fmdev)
364{ 364{
365 u16 curr_val; 365 u16 curr_val;
366 u32 ret, resp_len; 366 u32 resp_len;
367 int ret;
367 368
368 if (fmdev->curr_fmmode != FM_MODE_TX) 369 if (fmdev->curr_fmmode != FM_MODE_TX)
369 return -EPERM; 370 return -EPERM;
@@ -379,11 +380,11 @@ u32 fm_tx_get_tune_cap_val(struct fmdev *fmdev)
379} 380}
380 381
381/* Set TX Frequency */ 382/* Set TX Frequency */
382u32 fm_tx_set_freq(struct fmdev *fmdev, u32 freq_to_set) 383int fm_tx_set_freq(struct fmdev *fmdev, u32 freq_to_set)
383{ 384{
384 struct fmtx_data *tx = &fmdev->tx_data; 385 struct fmtx_data *tx = &fmdev->tx_data;
385 u16 payload, chanl_index; 386 u16 payload, chanl_index;
386 u32 ret; 387 int ret;
387 388
388 if (test_bit(FM_CORE_TX_XMITING, &fmdev->flag)) { 389 if (test_bit(FM_CORE_TX_XMITING, &fmdev->flag)) {
389 enable_xmit(fmdev, 0); 390 enable_xmit(fmdev, 0);
diff --git a/drivers/media/radio/wl128x/fmdrv_tx.h b/drivers/media/radio/wl128x/fmdrv_tx.h
index e393a2bdd49..11ae2e4c2d0 100644
--- a/drivers/media/radio/wl128x/fmdrv_tx.h
+++ b/drivers/media/radio/wl128x/fmdrv_tx.h
@@ -22,16 +22,16 @@
22#ifndef _FMDRV_TX_H 22#ifndef _FMDRV_TX_H
23#define _FMDRV_TX_H 23#define _FMDRV_TX_H
24 24
25u32 fm_tx_set_freq(struct fmdev *, u32); 25int fm_tx_set_freq(struct fmdev *, u32);
26u32 fm_tx_set_pwr_lvl(struct fmdev *, u8); 26int fm_tx_set_pwr_lvl(struct fmdev *, u8);
27u32 fm_tx_set_region(struct fmdev *, u8); 27int fm_tx_set_region(struct fmdev *, u8);
28u32 fm_tx_set_mute_mode(struct fmdev *, u8); 28int fm_tx_set_mute_mode(struct fmdev *, u8);
29u32 fm_tx_set_stereo_mono(struct fmdev *, u16); 29int fm_tx_set_stereo_mono(struct fmdev *, u16);
30u32 fm_tx_set_rds_mode(struct fmdev *, u8); 30int fm_tx_set_rds_mode(struct fmdev *, u8);
31u32 fm_tx_set_radio_text(struct fmdev *, u8 *, u8); 31int fm_tx_set_radio_text(struct fmdev *, u8 *, u8);
32u32 fm_tx_set_af(struct fmdev *, u32); 32int fm_tx_set_af(struct fmdev *, u32);
33u32 fm_tx_set_preemph_filter(struct fmdev *, u32); 33int fm_tx_set_preemph_filter(struct fmdev *, u32);
34u32 fm_tx_get_tune_cap_val(struct fmdev *); 34int fm_tx_get_tune_cap_val(struct fmdev *);
35 35
36#endif 36#endif
37 37
diff --git a/drivers/media/radio/wl128x/fmdrv_v4l2.c b/drivers/media/radio/wl128x/fmdrv_v4l2.c
index 4f5c43d2566..077d369a017 100644
--- a/drivers/media/radio/wl128x/fmdrv_v4l2.c
+++ b/drivers/media/radio/wl128x/fmdrv_v4l2.c
@@ -84,6 +84,7 @@ static ssize_t fm_v4l2_fops_write(struct file *file, const char __user * buf,
84 struct fmdev *fmdev; 84 struct fmdev *fmdev;
85 85
86 ret = copy_from_user(&rds, buf, sizeof(rds)); 86 ret = copy_from_user(&rds, buf, sizeof(rds));
87 rds.text[sizeof(rds.text) - 1] = '\0';
87 fmdbg("(%d)type: %d, text %s, af %d\n", 88 fmdbg("(%d)type: %d, text %s, af %d\n",
88 ret, rds.text_type, rds.text, rds.af_freq); 89 ret, rds.text_type, rds.text, rds.af_freq);
89 if (ret) 90 if (ret)
diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig
index aeb7f43dfb6..4df4affeea5 100644
--- a/drivers/media/rc/Kconfig
+++ b/drivers/media/rc/Kconfig
@@ -87,6 +87,16 @@ config IR_RC5_SZ_DECODER
87 uses an IR protocol that is almost standard RC-5, but not quite, 87 uses an IR protocol that is almost standard RC-5, but not quite,
88 as it uses an additional bit). 88 as it uses an additional bit).
89 89
90config IR_SANYO_DECODER
91 tristate "Enable IR raw decoder for the Sanyo protocol"
92 depends on RC_CORE
93 default y
94
95 ---help---
96 Enable this option if you have an infrared remote control which
97 uses the Sanyo protocol (Sanyo, Aiwa, Chinon remotes),
98 and you need software decoding support.
99
90config IR_MCE_KBD_DECODER 100config IR_MCE_KBD_DECODER
91 tristate "Enable IR raw decoder for the MCE keyboard/mouse protocol" 101 tristate "Enable IR raw decoder for the MCE keyboard/mouse protocol"
92 depends on RC_CORE 102 depends on RC_CORE
diff --git a/drivers/media/rc/Makefile b/drivers/media/rc/Makefile
index 2156e786b55..fb3dee2dd84 100644
--- a/drivers/media/rc/Makefile
+++ b/drivers/media/rc/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_IR_RC6_DECODER) += ir-rc6-decoder.o
10obj-$(CONFIG_IR_JVC_DECODER) += ir-jvc-decoder.o 10obj-$(CONFIG_IR_JVC_DECODER) += ir-jvc-decoder.o
11obj-$(CONFIG_IR_SONY_DECODER) += ir-sony-decoder.o 11obj-$(CONFIG_IR_SONY_DECODER) += ir-sony-decoder.o
12obj-$(CONFIG_IR_RC5_SZ_DECODER) += ir-rc5-sz-decoder.o 12obj-$(CONFIG_IR_RC5_SZ_DECODER) += ir-rc5-sz-decoder.o
13obj-$(CONFIG_IR_SANYO_DECODER) += ir-sanyo-decoder.o
13obj-$(CONFIG_IR_MCE_KBD_DECODER) += ir-mce_kbd-decoder.o 14obj-$(CONFIG_IR_MCE_KBD_DECODER) += ir-mce_kbd-decoder.o
14obj-$(CONFIG_IR_LIRC_CODEC) += ir-lirc-codec.o 15obj-$(CONFIG_IR_LIRC_CODEC) += ir-lirc-codec.o
15 16
diff --git a/drivers/media/rc/ir-nec-decoder.c b/drivers/media/rc/ir-nec-decoder.c
index 17f8db00435..3c9431a9f62 100644
--- a/drivers/media/rc/ir-nec-decoder.c
+++ b/drivers/media/rc/ir-nec-decoder.c
@@ -194,8 +194,8 @@ static int ir_nec_decode(struct rc_dev *dev, struct ir_raw_event ev)
194 return 0; 194 return 0;
195 } 195 }
196 196
197 IR_dprintk(1, "NEC decode failed at state %d (%uus %s)\n", 197 IR_dprintk(1, "NEC decode failed at count %d state %d (%uus %s)\n",
198 data->state, TO_US(ev.duration), TO_STR(ev.pulse)); 198 data->count, data->state, TO_US(ev.duration), TO_STR(ev.pulse));
199 data->state = STATE_INACTIVE; 199 data->state = STATE_INACTIVE;
200 return -EINVAL; 200 return -EINVAL;
201} 201}
diff --git a/drivers/media/rc/ir-raw.c b/drivers/media/rc/ir-raw.c
index 2e5cd3100b6..95e630998aa 100644
--- a/drivers/media/rc/ir-raw.c
+++ b/drivers/media/rc/ir-raw.c
@@ -357,6 +357,7 @@ static void init_decoders(struct work_struct *work)
357 load_rc6_decode(); 357 load_rc6_decode();
358 load_jvc_decode(); 358 load_jvc_decode();
359 load_sony_decode(); 359 load_sony_decode();
360 load_sanyo_decode();
360 load_mce_kbd_decode(); 361 load_mce_kbd_decode();
361 load_lirc_codec(); 362 load_lirc_codec();
362 363
diff --git a/drivers/media/rc/ir-rc6-decoder.c b/drivers/media/rc/ir-rc6-decoder.c
index 140fb67e2f8..4cfdd7fa4bb 100644
--- a/drivers/media/rc/ir-rc6-decoder.c
+++ b/drivers/media/rc/ir-rc6-decoder.c
@@ -18,24 +18,31 @@
18/* 18/*
19 * This decoder currently supports: 19 * This decoder currently supports:
20 * RC6-0-16 (standard toggle bit in header) 20 * RC6-0-16 (standard toggle bit in header)
21 * RC6-6A-20 (no toggle bit)
21 * RC6-6A-24 (no toggle bit) 22 * RC6-6A-24 (no toggle bit)
22 * RC6-6A-32 (MCE version with toggle bit in body) 23 * RC6-6A-32 (MCE version with toggle bit in body)
23 */ 24 */
24 25
25#define RC6_UNIT 444444 /* us */ 26#define RC6_UNIT 444444 /* nanosecs */
26#define RC6_HEADER_NBITS 4 /* not including toggle bit */ 27#define RC6_HEADER_NBITS 4 /* not including toggle bit */
27#define RC6_0_NBITS 16 28#define RC6_0_NBITS 16
28#define RC6_6A_SMALL_NBITS 24 29#define RC6_6A_32_NBITS 32
29#define RC6_6A_LARGE_NBITS 32 30#define RC6_6A_NBITS 128 /* Variable 8..128 */
30#define RC6_PREFIX_PULSE (6 * RC6_UNIT) 31#define RC6_PREFIX_PULSE (6 * RC6_UNIT)
31#define RC6_PREFIX_SPACE (2 * RC6_UNIT) 32#define RC6_PREFIX_SPACE (2 * RC6_UNIT)
32#define RC6_BIT_START (1 * RC6_UNIT) 33#define RC6_BIT_START (1 * RC6_UNIT)
33#define RC6_BIT_END (1 * RC6_UNIT) 34#define RC6_BIT_END (1 * RC6_UNIT)
34#define RC6_TOGGLE_START (2 * RC6_UNIT) 35#define RC6_TOGGLE_START (2 * RC6_UNIT)
35#define RC6_TOGGLE_END (2 * RC6_UNIT) 36#define RC6_TOGGLE_END (2 * RC6_UNIT)
37#define RC6_SUFFIX_SPACE (6 * RC6_UNIT)
36#define RC6_MODE_MASK 0x07 /* for the header bits */ 38#define RC6_MODE_MASK 0x07 /* for the header bits */
37#define RC6_STARTBIT_MASK 0x08 /* for the header bits */ 39#define RC6_STARTBIT_MASK 0x08 /* for the header bits */
38#define RC6_6A_MCE_TOGGLE_MASK 0x8000 /* for the body bits */ 40#define RC6_6A_MCE_TOGGLE_MASK 0x8000 /* for the body bits */
41#define RC6_6A_LCC_MASK 0xffff0000 /* RC6-6A-32 long customer code mask */
42#define RC6_6A_MCE_CC 0x800f0000 /* MCE customer code */
43#ifndef CHAR_BIT
44#define CHAR_BIT 8 /* Normally in <limits.h> */
45#endif
39 46
40enum rc6_mode { 47enum rc6_mode {
41 RC6_MODE_0, 48 RC6_MODE_0,
@@ -125,6 +132,7 @@ again:
125 break; 132 break;
126 133
127 data->state = STATE_HEADER_BIT_START; 134 data->state = STATE_HEADER_BIT_START;
135 data->header = 0;
128 return 0; 136 return 0;
129 137
130 case STATE_HEADER_BIT_START: 138 case STATE_HEADER_BIT_START:
@@ -171,20 +179,14 @@ again:
171 data->state = STATE_BODY_BIT_START; 179 data->state = STATE_BODY_BIT_START;
172 decrease_duration(&ev, RC6_TOGGLE_END); 180 decrease_duration(&ev, RC6_TOGGLE_END);
173 data->count = 0; 181 data->count = 0;
182 data->body = 0;
174 183
175 switch (rc6_mode(data)) { 184 switch (rc6_mode(data)) {
176 case RC6_MODE_0: 185 case RC6_MODE_0:
177 data->wanted_bits = RC6_0_NBITS; 186 data->wanted_bits = RC6_0_NBITS;
178 break; 187 break;
179 case RC6_MODE_6A: 188 case RC6_MODE_6A:
180 /* This might look weird, but we basically 189 data->wanted_bits = RC6_6A_NBITS;
181 check the value of the first body bit to
182 determine the number of bits in mode 6A */
183 if ((!ev.pulse && !geq_margin(ev.duration, RC6_UNIT, RC6_UNIT / 2)) ||
184 geq_margin(ev.duration, RC6_UNIT, RC6_UNIT / 2))
185 data->wanted_bits = RC6_6A_LARGE_NBITS;
186 else
187 data->wanted_bits = RC6_6A_SMALL_NBITS;
188 break; 190 break;
189 default: 191 default:
190 IR_dprintk(1, "RC6 unknown mode\n"); 192 IR_dprintk(1, "RC6 unknown mode\n");
@@ -193,15 +195,21 @@ again:
193 goto again; 195 goto again;
194 196
195 case STATE_BODY_BIT_START: 197 case STATE_BODY_BIT_START:
196 if (!eq_margin(ev.duration, RC6_BIT_START, RC6_UNIT / 2)) 198 if (eq_margin(ev.duration, RC6_BIT_START, RC6_UNIT / 2)) {
197 break; 199 /* Discard LSB's that won't fit in data->body */
198 200 if (data->count++ < CHAR_BIT * sizeof data->body) {
199 data->body <<= 1; 201 data->body <<= 1;
200 if (ev.pulse) 202 if (ev.pulse)
201 data->body |= 1; 203 data->body |= 1;
202 data->count++; 204 }
203 data->state = STATE_BODY_BIT_END; 205 data->state = STATE_BODY_BIT_END;
204 return 0; 206 return 0;
207 } else if (RC6_MODE_6A == rc6_mode(data) && !ev.pulse &&
208 geq_margin(ev.duration, RC6_SUFFIX_SPACE, RC6_UNIT / 2)) {
209 data->state = STATE_FINISHED;
210 goto again;
211 }
212 break;
205 213
206 case STATE_BODY_BIT_END: 214 case STATE_BODY_BIT_END:
207 if (!is_transition(&ev, &dev->raw->prev_ev)) 215 if (!is_transition(&ev, &dev->raw->prev_ev))
@@ -221,20 +229,27 @@ again:
221 229
222 switch (rc6_mode(data)) { 230 switch (rc6_mode(data)) {
223 case RC6_MODE_0: 231 case RC6_MODE_0:
224 scancode = data->body & 0xffff; 232 scancode = data->body;
225 toggle = data->toggle; 233 toggle = data->toggle;
226 IR_dprintk(1, "RC6(0) scancode 0x%04x (toggle: %u)\n", 234 IR_dprintk(1, "RC6(0) scancode 0x%04x (toggle: %u)\n",
227 scancode, toggle); 235 scancode, toggle);
228 break; 236 break;
229 case RC6_MODE_6A: 237 case RC6_MODE_6A:
230 if (data->wanted_bits == RC6_6A_LARGE_NBITS) { 238 if (data->count > CHAR_BIT * sizeof data->body) {
231 toggle = data->body & RC6_6A_MCE_TOGGLE_MASK ? 1 : 0; 239 IR_dprintk(1, "RC6 too many (%u) data bits\n",
232 scancode = data->body & ~RC6_6A_MCE_TOGGLE_MASK; 240 data->count);
241 goto out;
242 }
243
244 scancode = data->body;
245 if (data->count == RC6_6A_32_NBITS &&
246 (scancode & RC6_6A_LCC_MASK) == RC6_6A_MCE_CC) {
247 /* MCE RC */
248 toggle = (scancode & RC6_6A_MCE_TOGGLE_MASK) ? 1 : 0;
249 scancode &= ~RC6_6A_MCE_TOGGLE_MASK;
233 } else { 250 } else {
234 toggle = 0; 251 toggle = 0;
235 scancode = data->body & 0xffffff;
236 } 252 }
237
238 IR_dprintk(1, "RC6(6A) scancode 0x%08x (toggle: %u)\n", 253 IR_dprintk(1, "RC6(6A) scancode 0x%08x (toggle: %u)\n",
239 scancode, toggle); 254 scancode, toggle);
240 break; 255 break;
diff --git a/drivers/media/rc/ir-sanyo-decoder.c b/drivers/media/rc/ir-sanyo-decoder.c
new file mode 100644
index 00000000000..d38fbdd0b25
--- /dev/null
+++ b/drivers/media/rc/ir-sanyo-decoder.c
@@ -0,0 +1,205 @@
1/* ir-sanyo-decoder.c - handle SANYO IR Pulse/Space protocol
2 *
3 * Copyright (C) 2011 by Mauro Carvalho Chehab <mchehab@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * This protocol uses the NEC protocol timings. However, data is formatted as:
15 * 13 bits Custom Code
16 * 13 bits NOT(Custom Code)
17 * 8 bits Key data
18 * 8 bits NOT(Key data)
19 *
20 * According with LIRC, this protocol is used on Sanyo, Aiwa and Chinon
21 * Information for this protocol is available at the Sanyo LC7461 datasheet.
22 */
23
24#include <linux/module.h>
25#include <linux/bitrev.h>
26#include "rc-core-priv.h"
27
28#define SANYO_NBITS (13+13+8+8)
29#define SANYO_UNIT 562500 /* ns */
30#define SANYO_HEADER_PULSE (16 * SANYO_UNIT)
31#define SANYO_HEADER_SPACE (8 * SANYO_UNIT)
32#define SANYO_BIT_PULSE (1 * SANYO_UNIT)
33#define SANYO_BIT_0_SPACE (1 * SANYO_UNIT)
34#define SANYO_BIT_1_SPACE (3 * SANYO_UNIT)
35#define SANYO_REPEAT_SPACE (150 * SANYO_UNIT)
36#define SANYO_TRAILER_PULSE (1 * SANYO_UNIT)
37#define SANYO_TRAILER_SPACE (10 * SANYO_UNIT) /* in fact, 42 */
38
39enum sanyo_state {
40 STATE_INACTIVE,
41 STATE_HEADER_SPACE,
42 STATE_BIT_PULSE,
43 STATE_BIT_SPACE,
44 STATE_TRAILER_PULSE,
45 STATE_TRAILER_SPACE,
46};
47
48/**
49 * ir_sanyo_decode() - Decode one SANYO pulse or space
50 * @dev: the struct rc_dev descriptor of the device
51 * @duration: the struct ir_raw_event descriptor of the pulse/space
52 *
53 * This function returns -EINVAL if the pulse violates the state machine
54 */
55static int ir_sanyo_decode(struct rc_dev *dev, struct ir_raw_event ev)
56{
57 struct sanyo_dec *data = &dev->raw->sanyo;
58 u32 scancode;
59 u8 address, not_address, command, not_command;
60
61 if (!(dev->raw->enabled_protocols & RC_TYPE_SANYO))
62 return 0;
63
64 if (!is_timing_event(ev)) {
65 if (ev.reset) {
66 IR_dprintk(1, "SANYO event reset received. reset to state 0\n");
67 data->state = STATE_INACTIVE;
68 }
69 return 0;
70 }
71
72 IR_dprintk(2, "SANYO decode started at state %d (%uus %s)\n",
73 data->state, TO_US(ev.duration), TO_STR(ev.pulse));
74
75 switch (data->state) {
76
77 case STATE_INACTIVE:
78 if (!ev.pulse)
79 break;
80
81 if (eq_margin(ev.duration, SANYO_HEADER_PULSE, SANYO_UNIT / 2)) {
82 data->count = 0;
83 data->state = STATE_HEADER_SPACE;
84 return 0;
85 }
86 break;
87
88
89 case STATE_HEADER_SPACE:
90 if (ev.pulse)
91 break;
92
93 if (eq_margin(ev.duration, SANYO_HEADER_SPACE, SANYO_UNIT / 2)) {
94 data->state = STATE_BIT_PULSE;
95 return 0;
96 }
97
98 break;
99
100 case STATE_BIT_PULSE:
101 if (!ev.pulse)
102 break;
103
104 if (!eq_margin(ev.duration, SANYO_BIT_PULSE, SANYO_UNIT / 2))
105 break;
106
107 data->state = STATE_BIT_SPACE;
108 return 0;
109
110 case STATE_BIT_SPACE:
111 if (ev.pulse)
112 break;
113
114 if (!data->count && geq_margin(ev.duration, SANYO_REPEAT_SPACE, SANYO_UNIT / 2)) {
115 if (!dev->keypressed) {
116 IR_dprintk(1, "SANYO discarding last key repeat: event after key up\n");
117 } else {
118 rc_repeat(dev);
119 IR_dprintk(1, "SANYO repeat last key\n");
120 data->state = STATE_INACTIVE;
121 }
122 return 0;
123 }
124
125 data->bits <<= 1;
126 if (eq_margin(ev.duration, SANYO_BIT_1_SPACE, SANYO_UNIT / 2))
127 data->bits |= 1;
128 else if (!eq_margin(ev.duration, SANYO_BIT_0_SPACE, SANYO_UNIT / 2))
129 break;
130 data->count++;
131
132 if (data->count == SANYO_NBITS)
133 data->state = STATE_TRAILER_PULSE;
134 else
135 data->state = STATE_BIT_PULSE;
136
137 return 0;
138
139 case STATE_TRAILER_PULSE:
140 if (!ev.pulse)
141 break;
142
143 if (!eq_margin(ev.duration, SANYO_TRAILER_PULSE, SANYO_UNIT / 2))
144 break;
145
146 data->state = STATE_TRAILER_SPACE;
147 return 0;
148
149 case STATE_TRAILER_SPACE:
150 if (ev.pulse)
151 break;
152
153 if (!geq_margin(ev.duration, SANYO_TRAILER_SPACE, SANYO_UNIT / 2))
154 break;
155
156 address = bitrev16((data->bits >> 29) & 0x1fff) >> 3;
157 not_address = bitrev16((data->bits >> 16) & 0x1fff) >> 3;
158 command = bitrev8((data->bits >> 8) & 0xff);
159 not_command = bitrev8((data->bits >> 0) & 0xff);
160
161 if ((command ^ not_command) != 0xff) {
162 IR_dprintk(1, "SANYO checksum error: received 0x%08Lx\n",
163 data->bits);
164 data->state = STATE_INACTIVE;
165 return 0;
166 }
167
168 scancode = address << 8 | command;
169 IR_dprintk(1, "SANYO scancode: 0x%06x\n", scancode);
170 rc_keydown(dev, scancode, 0);
171 data->state = STATE_INACTIVE;
172 return 0;
173 }
174
175 IR_dprintk(1, "SANYO decode failed at count %d state %d (%uus %s)\n",
176 data->count, data->state, TO_US(ev.duration), TO_STR(ev.pulse));
177 data->state = STATE_INACTIVE;
178 return -EINVAL;
179}
180
181static struct ir_raw_handler sanyo_handler = {
182 .protocols = RC_TYPE_SANYO,
183 .decode = ir_sanyo_decode,
184};
185
186static int __init ir_sanyo_decode_init(void)
187{
188 ir_raw_handler_register(&sanyo_handler);
189
190 printk(KERN_INFO "IR SANYO protocol handler initialized\n");
191 return 0;
192}
193
194static void __exit ir_sanyo_decode_exit(void)
195{
196 ir_raw_handler_unregister(&sanyo_handler);
197}
198
199module_init(ir_sanyo_decode_init);
200module_exit(ir_sanyo_decode_exit);
201
202MODULE_LICENSE("GPL");
203MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
204MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
205MODULE_DESCRIPTION("SANYO IR protocol decoder");
diff --git a/drivers/media/rc/keymaps/rc-hauppauge.c b/drivers/media/rc/keymaps/rc-hauppauge.c
index e51c6163378..929bbbc1639 100644
--- a/drivers/media/rc/keymaps/rc-hauppauge.c
+++ b/drivers/media/rc/keymaps/rc-hauppauge.c
@@ -183,6 +183,57 @@ static struct rc_map_table rc5_hauppauge_new[] = {
183 { 0x1d3f, KEY_HOME }, 183 { 0x1d3f, KEY_HOME },
184 184
185 /* 185 /*
186 * Keycodes for PT# R-005 remote bundled with Haupauge HVR-930C
187 * Keycodes start with address = 0x1c
188 */
189 { 0x1c3b, KEY_GOTO },
190 { 0x1c3d, KEY_POWER },
191
192 { 0x1c14, KEY_UP },
193 { 0x1c15, KEY_DOWN },
194 { 0x1c16, KEY_LEFT },
195 { 0x1c17, KEY_RIGHT },
196 { 0x1c25, KEY_OK },
197
198 { 0x1c00, KEY_0 },
199 { 0x1c01, KEY_1 },
200 { 0x1c02, KEY_2 },
201 { 0x1c03, KEY_3 },
202 { 0x1c04, KEY_4 },
203 { 0x1c05, KEY_5 },
204 { 0x1c06, KEY_6 },
205 { 0x1c07, KEY_7 },
206 { 0x1c08, KEY_8 },
207 { 0x1c09, KEY_9 },
208
209 { 0x1c1f, KEY_EXIT }, /* BACK */
210 { 0x1c0d, KEY_MENU },
211 { 0x1c1c, KEY_TV },
212
213 { 0x1c10, KEY_VOLUMEUP },
214 { 0x1c11, KEY_VOLUMEDOWN },
215
216 { 0x1c20, KEY_CHANNELUP },
217 { 0x1c21, KEY_CHANNELDOWN },
218
219 { 0x1c0f, KEY_MUTE },
220 { 0x1c12, KEY_PREVIOUS }, /* Prev */
221
222 { 0x1c36, KEY_STOP },
223 { 0x1c37, KEY_RECORD },
224
225 { 0x1c24, KEY_LAST }, /* <| */
226 { 0x1c1e, KEY_NEXT }, /* >| */
227
228 { 0x1c0a, KEY_TEXT },
229 { 0x1c0e, KEY_SUBTITLE }, /* CC */
230
231 { 0x1c32, KEY_REWIND },
232 { 0x1c30, KEY_PAUSE },
233 { 0x1c35, KEY_PLAY },
234 { 0x1c34, KEY_FASTFORWARD },
235
236 /*
186 * Keycodes for the old Black Remote Controller 237 * Keycodes for the old Black Remote Controller
187 * This one also uses RC-5 protocol 238 * This one also uses RC-5 protocol
188 * Keycodes start with address = 0x00 239 * Keycodes start with address = 0x00
diff --git a/drivers/media/rc/keymaps/rc-videomate-m1f.c b/drivers/media/rc/keymaps/rc-videomate-m1f.c
index 3bd1de1f585..23ee05e5394 100644
--- a/drivers/media/rc/keymaps/rc-videomate-m1f.c
+++ b/drivers/media/rc/keymaps/rc-videomate-m1f.c
@@ -1,4 +1,4 @@
1/* videomate-m1f.h - Keytable for videomate_m1f Remote Controller 1/* videomate-k100.h - Keytable for videomate_k100 Remote Controller
2 * 2 *
3 * keymap imported from ir-keymaps.c 3 * keymap imported from ir-keymaps.c
4 * 4 *
@@ -13,7 +13,7 @@
13#include <media/rc-map.h> 13#include <media/rc-map.h>
14#include <linux/module.h> 14#include <linux/module.h>
15 15
16static struct rc_map_table videomate_m1f[] = { 16static struct rc_map_table videomate_k100[] = {
17 { 0x01, KEY_POWER }, 17 { 0x01, KEY_POWER },
18 { 0x31, KEY_TUNER }, 18 { 0x31, KEY_TUNER },
19 { 0x33, KEY_VIDEO }, 19 { 0x33, KEY_VIDEO },
@@ -67,27 +67,27 @@ static struct rc_map_table videomate_m1f[] = {
67 { 0x18, KEY_TEXT }, 67 { 0x18, KEY_TEXT },
68}; 68};
69 69
70static struct rc_map_list videomate_m1f_map = { 70static struct rc_map_list videomate_k100_map = {
71 .map = { 71 .map = {
72 .scan = videomate_m1f, 72 .scan = videomate_k100,
73 .size = ARRAY_SIZE(videomate_m1f), 73 .size = ARRAY_SIZE(videomate_k100),
74 .rc_type = RC_TYPE_UNKNOWN, /* Legacy IR type */ 74 .rc_type = RC_TYPE_UNKNOWN, /* Legacy IR type */
75 .name = RC_MAP_VIDEOMATE_M1F, 75 .name = RC_MAP_VIDEOMATE_K100,
76 } 76 }
77}; 77};
78 78
79static int __init init_rc_map_videomate_m1f(void) 79static int __init init_rc_map_videomate_k100(void)
80{ 80{
81 return rc_map_register(&videomate_m1f_map); 81 return rc_map_register(&videomate_k100_map);
82} 82}
83 83
84static void __exit exit_rc_map_videomate_m1f(void) 84static void __exit exit_rc_map_videomate_k100(void)
85{ 85{
86 rc_map_unregister(&videomate_m1f_map); 86 rc_map_unregister(&videomate_k100_map);
87} 87}
88 88
89module_init(init_rc_map_videomate_m1f) 89module_init(init_rc_map_videomate_k100)
90module_exit(exit_rc_map_videomate_m1f) 90module_exit(exit_rc_map_videomate_k100)
91 91
92MODULE_LICENSE("GPL"); 92MODULE_LICENSE("GPL");
93MODULE_AUTHOR("Pavel Osnova <pvosnova@gmail.com>"); 93MODULE_AUTHOR("Pavel Osnova <pvosnova@gmail.com>");
diff --git a/drivers/media/rc/rc-core-priv.h b/drivers/media/rc/rc-core-priv.h
index c6ca870e8b7..b72f8580e31 100644
--- a/drivers/media/rc/rc-core-priv.h
+++ b/drivers/media/rc/rc-core-priv.h
@@ -84,6 +84,11 @@ struct ir_raw_event_ctrl {
84 unsigned count; 84 unsigned count;
85 unsigned wanted_bits; 85 unsigned wanted_bits;
86 } rc5_sz; 86 } rc5_sz;
87 struct sanyo_dec {
88 int state;
89 unsigned count;
90 u64 bits;
91 } sanyo;
87 struct mce_kbd_dec { 92 struct mce_kbd_dec {
88 struct input_dev *idev; 93 struct input_dev *idev;
89 struct timer_list rx_timeout; 94 struct timer_list rx_timeout;
@@ -193,6 +198,13 @@ static inline void load_jvc_decode(void) { }
193static inline void load_sony_decode(void) { } 198static inline void load_sony_decode(void) { }
194#endif 199#endif
195 200
201/* from ir-sanyo-decoder.c */
202#ifdef CONFIG_IR_SANYO_DECODER_MODULE
203#define load_sanyo_decode() request_module("ir-sanyo-decoder")
204#else
205static inline void load_sanyo_decode(void) { }
206#endif
207
196/* from ir-mce_kbd-decoder.c */ 208/* from ir-mce_kbd-decoder.c */
197#ifdef CONFIG_IR_MCE_KBD_DECODER_MODULE 209#ifdef CONFIG_IR_MCE_KBD_DECODER_MODULE
198#define load_mce_kbd_decode() request_module("ir-mce_kbd-decoder") 210#define load_mce_kbd_decode() request_module("ir-mce_kbd-decoder")
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c
index f5db8b949bc..f6a930b70c6 100644
--- a/drivers/media/rc/rc-main.c
+++ b/drivers/media/rc/rc-main.c
@@ -736,6 +736,7 @@ static struct {
736 { RC_TYPE_JVC, "jvc" }, 736 { RC_TYPE_JVC, "jvc" },
737 { RC_TYPE_SONY, "sony" }, 737 { RC_TYPE_SONY, "sony" },
738 { RC_TYPE_RC5_SZ, "rc-5-sz" }, 738 { RC_TYPE_RC5_SZ, "rc-5-sz" },
739 { RC_TYPE_SANYO, "sanyo" },
739 { RC_TYPE_MCE_KBD, "mce_kbd" }, 740 { RC_TYPE_MCE_KBD, "mce_kbd" },
740 { RC_TYPE_LIRC, "lirc" }, 741 { RC_TYPE_LIRC, "lirc" },
741 { RC_TYPE_OTHER, "other" }, 742 { RC_TYPE_OTHER, "other" },
diff --git a/drivers/media/rc/redrat3.c b/drivers/media/rc/redrat3.c
index 07322fb75ef..ad95c67a4db 100644
--- a/drivers/media/rc/redrat3.c
+++ b/drivers/media/rc/redrat3.c
@@ -286,12 +286,6 @@ static void redrat3_issue_async(struct redrat3_dev *rr3)
286 286
287 rr3_ftr(rr3->dev, "Entering %s\n", __func__); 287 rr3_ftr(rr3->dev, "Entering %s\n", __func__);
288 288
289 if (!rr3->det_enabled) {
290 dev_warn(rr3->dev, "not issuing async read, "
291 "detector not enabled\n");
292 return;
293 }
294
295 memset(rr3->bulk_in_buf, 0, rr3->ep_in->wMaxPacketSize); 289 memset(rr3->bulk_in_buf, 0, rr3->ep_in->wMaxPacketSize);
296 res = usb_submit_urb(rr3->read_urb, GFP_ATOMIC); 290 res = usb_submit_urb(rr3->read_urb, GFP_ATOMIC);
297 if (res) 291 if (res)
@@ -827,6 +821,7 @@ out:
827static void redrat3_handle_async(struct urb *urb, struct pt_regs *regs) 821static void redrat3_handle_async(struct urb *urb, struct pt_regs *regs)
828{ 822{
829 struct redrat3_dev *rr3; 823 struct redrat3_dev *rr3;
824 int ret;
830 825
831 if (!urb) 826 if (!urb)
832 return; 827 return;
@@ -840,15 +835,13 @@ static void redrat3_handle_async(struct urb *urb, struct pt_regs *regs)
840 835
841 rr3_ftr(rr3->dev, "Entering %s\n", __func__); 836 rr3_ftr(rr3->dev, "Entering %s\n", __func__);
842 837
843 if (!rr3->det_enabled) {
844 rr3_dbg(rr3->dev, "received a read callback but detector "
845 "disabled - ignoring\n");
846 return;
847 }
848
849 switch (urb->status) { 838 switch (urb->status) {
850 case 0: 839 case 0:
851 redrat3_get_ir_data(rr3, urb->actual_length); 840 ret = redrat3_get_ir_data(rr3, urb->actual_length);
841 if (!ret) {
842 /* no error, prepare to read more */
843 redrat3_issue_async(rr3);
844 }
852 break; 845 break;
853 846
854 case -ECONNRESET: 847 case -ECONNRESET:
@@ -865,11 +858,6 @@ static void redrat3_handle_async(struct urb *urb, struct pt_regs *regs)
865 rr3->pkttype = 0; 858 rr3->pkttype = 0;
866 break; 859 break;
867 } 860 }
868
869 if (!rr3->transmitting)
870 redrat3_issue_async(rr3);
871 else
872 rr3_dbg(rr3->dev, "IR transmit in progress\n");
873} 861}
874 862
875static void redrat3_write_bulk_callback(struct urb *urb, struct pt_regs *regs) 863static void redrat3_write_bulk_callback(struct urb *urb, struct pt_regs *regs)
@@ -896,21 +884,24 @@ static u16 mod_freq_to_val(unsigned int mod_freq)
896 return (u16)(65536 - (mult / mod_freq)); 884 return (u16)(65536 - (mult / mod_freq));
897} 885}
898 886
899static int redrat3_set_tx_carrier(struct rc_dev *dev, u32 carrier) 887static int redrat3_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
900{ 888{
901 struct redrat3_dev *rr3 = dev->priv; 889 struct redrat3_dev *rr3 = rcdev->priv;
890 struct device *dev = rr3->dev;
902 891
892 rr3_dbg(dev, "Setting modulation frequency to %u", carrier);
903 rr3->carrier = carrier; 893 rr3->carrier = carrier;
904 894
905 return carrier; 895 return carrier;
906} 896}
907 897
908static int redrat3_transmit_ir(struct rc_dev *rcdev, int *txbuf, u32 n) 898static int redrat3_transmit_ir(struct rc_dev *rcdev, unsigned *txbuf,
899 unsigned count)
909{ 900{
910 struct redrat3_dev *rr3 = rcdev->priv; 901 struct redrat3_dev *rr3 = rcdev->priv;
911 struct device *dev = rr3->dev; 902 struct device *dev = rr3->dev;
912 struct redrat3_signal_header header; 903 struct redrat3_signal_header header;
913 int i, j, count, ret, ret_len, offset; 904 int i, j, ret, ret_len, offset;
914 int lencheck, cur_sample_len, pipe; 905 int lencheck, cur_sample_len, pipe;
915 char *buffer = NULL, *sigdata = NULL; 906 char *buffer = NULL, *sigdata = NULL;
916 int *sample_lens = NULL; 907 int *sample_lens = NULL;
@@ -928,20 +919,13 @@ static int redrat3_transmit_ir(struct rc_dev *rcdev, int *txbuf, u32 n)
928 return -EAGAIN; 919 return -EAGAIN;
929 } 920 }
930 921
931 count = n / sizeof(int);
932 if (count > (RR3_DRIVER_MAXLENS * 2)) 922 if (count > (RR3_DRIVER_MAXLENS * 2))
933 return -EINVAL; 923 return -EINVAL;
934 924
925 /* rr3 will disable rc detector on transmit */
926 rr3->det_enabled = false;
935 rr3->transmitting = true; 927 rr3->transmitting = true;
936 928
937 redrat3_disable_detector(rr3);
938
939 if (rr3->det_enabled) {
940 dev_err(dev, "%s: cannot tx while rx is enabled\n", __func__);
941 ret = -EIO;
942 goto out;
943 }
944
945 sample_lens = kzalloc(sizeof(int) * RR3_DRIVER_MAXLENS, GFP_KERNEL); 929 sample_lens = kzalloc(sizeof(int) * RR3_DRIVER_MAXLENS, GFP_KERNEL);
946 if (!sample_lens) { 930 if (!sample_lens) {
947 ret = -ENOMEM; 931 ret = -ENOMEM;
@@ -1055,7 +1039,7 @@ static int redrat3_transmit_ir(struct rc_dev *rcdev, int *txbuf, u32 n)
1055 if (ret < 0) 1039 if (ret < 0)
1056 dev_err(dev, "Error: control msg send failed, rc %d\n", ret); 1040 dev_err(dev, "Error: control msg send failed, rc %d\n", ret);
1057 else 1041 else
1058 ret = n; 1042 ret = count;
1059 1043
1060out: 1044out:
1061 kfree(sample_lens); 1045 kfree(sample_lens);
@@ -1063,8 +1047,8 @@ out:
1063 kfree(sigdata); 1047 kfree(sigdata);
1064 1048
1065 rr3->transmitting = false; 1049 rr3->transmitting = false;
1066 1050 /* rr3 re-enables rc detector because it was enabled before */
1067 redrat3_enable_detector(rr3); 1051 rr3->det_enabled = true;
1068 1052
1069 return ret; 1053 return ret;
1070} 1054}
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index b303a3f8a9f..9adada0d744 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -533,6 +533,13 @@ config VIDEO_ADP1653
533 This is a driver for the ADP1653 flash controller. It is used for 533 This is a driver for the ADP1653 flash controller. It is used for
534 example in Nokia N900. 534 example in Nokia N900.
535 535
536config VIDEO_AS3645A
537 tristate "AS3645A flash driver support"
538 depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
539 ---help---
540 This is a driver for the AS3645A and LM3555 flash controllers. It has
541 build in control for flash, torch and indicator LEDs.
542
536comment "Video improvement chips" 543comment "Video improvement chips"
537 544
538config VIDEO_UPD64031A 545config VIDEO_UPD64031A
@@ -580,25 +587,6 @@ config VIDEO_M52790
580 587
581endmenu # encoder / decoder chips 588endmenu # encoder / decoder chips
582 589
583config VIDEO_SH_VOU
584 tristate "SuperH VOU video output driver"
585 depends on VIDEO_DEV && ARCH_SHMOBILE
586 select VIDEOBUF_DMA_CONTIG
587 help
588 Support for the Video Output Unit (VOU) on SuperH SoCs.
589
590config VIDEO_VIU
591 tristate "Freescale VIU Video Driver"
592 depends on VIDEO_V4L2 && PPC_MPC512x
593 select VIDEOBUF_DMA_CONTIG
594 default y
595 ---help---
596 Support for Freescale VIU video driver. This device captures
597 video data, or overlays video on DIU frame buffer.
598
599 Say Y here if you want to enable VIU device on MPC5121e Rev2+.
600 In doubt, say N.
601
602config VIDEO_VIVI 590config VIDEO_VIVI
603 tristate "Virtual Video Driver" 591 tristate "Virtual Video Driver"
604 depends on VIDEO_DEV && VIDEO_V4L2 && !SPARC32 && !SPARC64 592 depends on VIDEO_DEV && VIDEO_V4L2 && !SPARC32 && !SPARC64
@@ -613,66 +601,130 @@ config VIDEO_VIVI
613 Say Y here if you want to test video apps or debug V4L devices. 601 Say Y here if you want to test video apps or debug V4L devices.
614 In doubt, say N. 602 In doubt, say N.
615 603
616source "drivers/media/video/davinci/Kconfig" 604#
605# USB Multimedia device configuration
606#
617 607
618source "drivers/media/video/omap/Kconfig" 608menuconfig V4L_USB_DRIVERS
609 bool "V4L USB devices"
610 depends on USB
611 default y
619 612
620source "drivers/media/video/bt8xx/Kconfig" 613if V4L_USB_DRIVERS
621 614
622config VIDEO_PMS 615source "drivers/media/video/uvc/Kconfig"
623 tristate "Mediavision Pro Movie Studio Video For Linux" 616
624 depends on ISA && VIDEO_V4L2 617source "drivers/media/video/gspca/Kconfig"
625 help 618
626 Say Y if you have such a thing. 619source "drivers/media/video/pvrusb2/Kconfig"
620
621source "drivers/media/video/hdpvr/Kconfig"
622
623source "drivers/media/video/em28xx/Kconfig"
624
625source "drivers/media/video/tlg2300/Kconfig"
626
627source "drivers/media/video/cx231xx/Kconfig"
628
629source "drivers/media/video/tm6000/Kconfig"
630
631source "drivers/media/video/usbvision/Kconfig"
632
633source "drivers/media/video/et61x251/Kconfig"
634
635source "drivers/media/video/sn9c102/Kconfig"
636
637source "drivers/media/video/pwc/Kconfig"
638
639source "drivers/media/video/cpia2/Kconfig"
640
641config USB_ZR364XX
642 tristate "USB ZR364XX Camera support"
643 depends on VIDEO_V4L2
644 select VIDEOBUF_GEN
645 select VIDEOBUF_VMALLOC
646 ---help---
647 Say Y here if you want to connect this type of camera to your
648 computer's USB port.
649 See <file:Documentation/video4linux/zr364xx.txt> for more info
650 and list of supported cameras.
627 651
628 To compile this driver as a module, choose M here: the 652 To compile this driver as a module, choose M here: the
629 module will be called pms. 653 module will be called zr364xx.
630 654
631config VIDEO_BWQCAM 655config USB_STKWEBCAM
632 tristate "Quickcam BW Video For Linux" 656 tristate "USB Syntek DC1125 Camera support"
633 depends on PARPORT && VIDEO_V4L2 657 depends on VIDEO_V4L2 && EXPERIMENTAL
634 help 658 ---help---
635 Say Y have if you the black and white version of the QuickCam 659 Say Y here if you want to use this type of camera.
636 camera. See the next option for the color version. 660 Supported devices are typically found in some Asus laptops,
661 with USB id 174f:a311 and 05e1:0501. Other Syntek cameras
662 may be supported by the stk11xx driver, from which this is
663 derived, see <http://sourceforge.net/projects/syntekdriver/>
637 664
638 To compile this driver as a module, choose M here: the 665 To compile this driver as a module, choose M here: the
639 module will be called bw-qcam. 666 module will be called stkwebcam.
640 667
641config VIDEO_CQCAM 668config USB_S2255
642 tristate "QuickCam Colour Video For Linux (EXPERIMENTAL)" 669 tristate "USB Sensoray 2255 video capture device"
643 depends on EXPERIMENTAL && PARPORT && VIDEO_V4L2 670 depends on VIDEO_V4L2
671 select VIDEOBUF_VMALLOC
672 default n
644 help 673 help
645 This is the video4linux driver for the colour version of the 674 Say Y here if you want support for the Sensoray 2255 USB device.
646 Connectix QuickCam. If you have one of these cameras, say Y here, 675 This driver can be compiled as a module, called s2255drv.
647 otherwise say N. This driver does not work with the original
648 monochrome QuickCam, QuickCam VC or QuickClip. It is also available
649 as a module (c-qcam).
650 Read <file:Documentation/video4linux/CQcam.txt> for more information.
651 676
652config VIDEO_W9966 677endif # V4L_USB_DRIVERS
653 tristate "W9966CF Webcam (FlyCam Supra and others) Video For Linux"
654 depends on PARPORT_1284 && PARPORT && VIDEO_V4L2
655 help
656 Video4linux driver for Winbond's w9966 based Webcams.
657 Currently tested with the LifeView FlyCam Supra.
658 If you have one of these cameras, say Y here
659 otherwise say N.
660 This driver is also available as a module (w9966).
661 678
662 Check out <file:Documentation/video4linux/w9966.txt> for more 679#
663 information. 680# PCI drivers configuration
681#
664 682
665source "drivers/media/video/cpia2/Kconfig" 683menuconfig V4L_PCI_DRIVERS
684 bool "V4L PCI(e) devices"
685 depends on PCI
686 default y
687 ---help---
688 Say Y here to enable support for these PCI(e) drivers.
666 689
667config VIDEO_VINO 690if V4L_PCI_DRIVERS
668 tristate "SGI Vino Video For Linux (EXPERIMENTAL)"
669 depends on I2C && SGI_IP22 && EXPERIMENTAL && VIDEO_V4L2
670 select VIDEO_SAA7191 if VIDEO_HELPER_CHIPS_AUTO
671 help
672 Say Y here to build in support for the Vino video input system found
673 on SGI Indy machines.
674 691
675source "drivers/media/video/zoran/Kconfig" 692source "drivers/media/video/au0828/Kconfig"
693
694source "drivers/media/video/bt8xx/Kconfig"
695
696source "drivers/media/video/cx18/Kconfig"
697
698source "drivers/media/video/cx23885/Kconfig"
699
700source "drivers/media/video/cx25821/Kconfig"
701
702source "drivers/media/video/cx88/Kconfig"
703
704config VIDEO_HEXIUM_GEMINI
705 tristate "Hexium Gemini frame grabber"
706 depends on PCI && VIDEO_V4L2 && I2C
707 select VIDEO_SAA7146_VV
708 ---help---
709 This is a video4linux driver for the Hexium Gemini frame
710 grabber card by Hexium. Please note that the Gemini Dual
711 card is *not* fully supported.
712
713 To compile this driver as a module, choose M here: the
714 module will be called hexium_gemini.
715
716config VIDEO_HEXIUM_ORION
717 tristate "Hexium HV-PCI6 and Orion frame grabber"
718 depends on PCI && VIDEO_V4L2 && I2C
719 select VIDEO_SAA7146_VV
720 ---help---
721 This is a video4linux driver for the Hexium HV-PCI6 and
722 Orion frame grabber cards by Hexium.
723
724 To compile this driver as a module, choose M here: the
725 module will be called hexium_orion.
726
727source "drivers/media/video/ivtv/Kconfig"
676 728
677config VIDEO_MEYE 729config VIDEO_MEYE
678 tristate "Sony Vaio Picturebook Motion Eye Video For Linux" 730 tristate "Sony Vaio Picturebook Motion Eye Video For Linux"
@@ -688,8 +740,6 @@ config VIDEO_MEYE
688 To compile this driver as a module, choose M here: the 740 To compile this driver as a module, choose M here: the
689 module will be called meye. 741 module will be called meye.
690 742
691source "drivers/media/video/saa7134/Kconfig"
692
693config VIDEO_MXB 743config VIDEO_MXB
694 tristate "Siemens-Nixdorf 'Multimedia eXtension Board'" 744 tristate "Siemens-Nixdorf 'Multimedia eXtension Board'"
695 depends on PCI && VIDEO_V4L2 && I2C 745 depends on PCI && VIDEO_V4L2 && I2C
@@ -706,28 +756,119 @@ config VIDEO_MXB
706 To compile this driver as a module, choose M here: the 756 To compile this driver as a module, choose M here: the
707 module will be called mxb. 757 module will be called mxb.
708 758
709config VIDEO_HEXIUM_ORION 759source "drivers/media/video/saa7134/Kconfig"
710 tristate "Hexium HV-PCI6 and Orion frame grabber" 760
711 depends on PCI && VIDEO_V4L2 && I2C 761source "drivers/media/video/saa7164/Kconfig"
712 select VIDEO_SAA7146_VV 762
763source "drivers/media/video/zoran/Kconfig"
764
765endif # V4L_PCI_DRIVERS
766
767#
768# ISA & parallel port drivers configuration
769#
770
771menuconfig V4L_ISA_PARPORT_DRIVERS
772 bool "V4L ISA and parallel port devices"
773 depends on ISA || PARPORT
774 default n
713 ---help--- 775 ---help---
714 This is a video4linux driver for the Hexium HV-PCI6 and 776 Say Y here to enable support for these ISA and parallel port drivers.
715 Orion frame grabber cards by Hexium. 777
778if V4L_ISA_PARPORT_DRIVERS
779
780config VIDEO_BWQCAM
781 tristate "Quickcam BW Video For Linux"
782 depends on PARPORT && VIDEO_V4L2
783 help
784 Say Y have if you the black and white version of the QuickCam
785 camera. See the next option for the color version.
716 786
717 To compile this driver as a module, choose M here: the 787 To compile this driver as a module, choose M here: the
718 module will be called hexium_orion. 788 module will be called bw-qcam.
719 789
720config VIDEO_HEXIUM_GEMINI 790config VIDEO_CQCAM
721 tristate "Hexium Gemini frame grabber" 791 tristate "QuickCam Colour Video For Linux"
722 depends on PCI && VIDEO_V4L2 && I2C 792 depends on PARPORT && VIDEO_V4L2
723 select VIDEO_SAA7146_VV 793 help
724 ---help--- 794 This is the video4linux driver for the colour version of the
725 This is a video4linux driver for the Hexium Gemini frame 795 Connectix QuickCam. If you have one of these cameras, say Y here,
726 grabber card by Hexium. Please note that the Gemini Dual 796 otherwise say N. This driver does not work with the original
727 card is *not* fully supported. 797 monochrome QuickCam, QuickCam VC or QuickClip. It is also available
798 as a module (c-qcam).
799 Read <file:Documentation/video4linux/CQcam.txt> for more information.
800
801config VIDEO_PMS
802 tristate "Mediavision Pro Movie Studio Video For Linux"
803 depends on ISA && VIDEO_V4L2
804 help
805 Say Y if you have the ISA Mediavision Pro Movie Studio
806 capture card.
728 807
729 To compile this driver as a module, choose M here: the 808 To compile this driver as a module, choose M here: the
730 module will be called hexium_gemini. 809 module will be called pms.
810
811config VIDEO_W9966
812 tristate "W9966CF Webcam (FlyCam Supra and others) Video For Linux"
813 depends on PARPORT_1284 && PARPORT && VIDEO_V4L2
814 help
815 Video4linux driver for Winbond's w9966 based Webcams.
816 Currently tested with the LifeView FlyCam Supra.
817 If you have one of these cameras, say Y here
818 otherwise say N.
819 This driver is also available as a module (w9966).
820
821 Check out <file:Documentation/video4linux/w9966.txt> for more
822 information.
823
824endif # V4L_ISA_PARPORT_DRIVERS
825
826menuconfig V4L_PLATFORM_DRIVERS
827 bool "V4L platform devices"
828 default n
829 ---help---
830 Say Y here to enable support for platform-specific V4L drivers.
831
832if V4L_PLATFORM_DRIVERS
833
834source "drivers/media/video/marvell-ccic/Kconfig"
835
836config VIDEO_VIA_CAMERA
837 tristate "VIAFB camera controller support"
838 depends on FB_VIA
839 select VIDEOBUF_DMA_SG
840 select VIDEO_OV7670
841 help
842 Driver support for the integrated camera controller in VIA
843 Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems
844 with ov7670 sensors.
845
846#
847# Platform multimedia device configuration
848#
849
850source "drivers/media/video/davinci/Kconfig"
851
852source "drivers/media/video/omap/Kconfig"
853
854config VIDEO_SH_VOU
855 tristate "SuperH VOU video output driver"
856 depends on VIDEO_DEV && ARCH_SHMOBILE
857 select VIDEOBUF_DMA_CONTIG
858 help
859 Support for the Video Output Unit (VOU) on SuperH SoCs.
860
861config VIDEO_VIU
862 tristate "Freescale VIU Video Driver"
863 depends on VIDEO_V4L2 && PPC_MPC512x
864 select VIDEOBUF_DMA_CONTIG
865 default y
866 ---help---
867 Support for Freescale VIU video driver. This device captures
868 video data, or overlays video on DIU frame buffer.
869
870 Say Y here if you want to enable VIU device on MPC5121e Rev2+.
871 In doubt, say N.
731 872
732config VIDEO_TIMBERDALE 873config VIDEO_TIMBERDALE
733 tristate "Support for timberdale Video In/LogiWIN" 874 tristate "Support for timberdale Video In/LogiWIN"
@@ -739,21 +880,13 @@ config VIDEO_TIMBERDALE
739 ---help--- 880 ---help---
740 Add support for the Video In peripherial of the timberdale FPGA. 881 Add support for the Video In peripherial of the timberdale FPGA.
741 882
742source "drivers/media/video/cx88/Kconfig" 883config VIDEO_VINO
743 884 tristate "SGI Vino Video For Linux"
744source "drivers/media/video/cx23885/Kconfig" 885 depends on I2C && SGI_IP22 && VIDEO_V4L2
745 886 select VIDEO_SAA7191 if VIDEO_HELPER_CHIPS_AUTO
746source "drivers/media/video/cx25821/Kconfig" 887 help
747 888 Say Y here to build in support for the Vino video input system found
748source "drivers/media/video/au0828/Kconfig" 889 on SGI Indy machines.
749
750source "drivers/media/video/ivtv/Kconfig"
751
752source "drivers/media/video/cx18/Kconfig"
753
754source "drivers/media/video/saa7164/Kconfig"
755
756source "drivers/media/video/marvell-ccic/Kconfig"
757 890
758config VIDEO_M32R_AR 891config VIDEO_M32R_AR
759 tristate "AR devices" 892 tristate "AR devices"
@@ -774,16 +907,6 @@ config VIDEO_M32R_AR_M64278
774 To compile this driver as a module, choose M here: the 907 To compile this driver as a module, choose M here: the
775 module will be called arv. 908 module will be called arv.
776 909
777config VIDEO_VIA_CAMERA
778 tristate "VIAFB camera controller support"
779 depends on FB_VIA
780 select VIDEOBUF_DMA_SG
781 select VIDEO_OV7670
782 help
783 Driver support for the integrated camera controller in VIA
784 Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems
785 with ov7670 sensors.
786
787config VIDEO_OMAP3 910config VIDEO_OMAP3
788 tristate "OMAP 3 Camera support (EXPERIMENTAL)" 911 tristate "OMAP 3 Camera support (EXPERIMENTAL)"
789 depends on OMAP_IOVMM && VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API && ARCH_OMAP3 && EXPERIMENTAL 912 depends on OMAP_IOVMM && VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API && ARCH_OMAP3 && EXPERIMENTAL
@@ -1002,78 +1125,7 @@ config VIDEO_S5P_MIPI_CSIS
1002 1125
1003source "drivers/media/video/s5p-tv/Kconfig" 1126source "drivers/media/video/s5p-tv/Kconfig"
1004 1127
1005# 1128endif # V4L_PLATFORM_DRIVERS
1006# USB Multimedia device configuration
1007#
1008
1009menuconfig V4L_USB_DRIVERS
1010 bool "V4L USB devices"
1011 depends on USB
1012 default y
1013
1014if V4L_USB_DRIVERS && USB
1015
1016source "drivers/media/video/uvc/Kconfig"
1017
1018source "drivers/media/video/gspca/Kconfig"
1019
1020source "drivers/media/video/pvrusb2/Kconfig"
1021
1022source "drivers/media/video/hdpvr/Kconfig"
1023
1024source "drivers/media/video/em28xx/Kconfig"
1025
1026source "drivers/media/video/tlg2300/Kconfig"
1027
1028source "drivers/media/video/cx231xx/Kconfig"
1029
1030source "drivers/media/video/tm6000/Kconfig"
1031
1032source "drivers/media/video/usbvision/Kconfig"
1033
1034source "drivers/media/video/et61x251/Kconfig"
1035
1036source "drivers/media/video/sn9c102/Kconfig"
1037
1038source "drivers/media/video/pwc/Kconfig"
1039
1040config USB_ZR364XX
1041 tristate "USB ZR364XX Camera support"
1042 depends on VIDEO_V4L2
1043 select VIDEOBUF_GEN
1044 select VIDEOBUF_VMALLOC
1045 ---help---
1046 Say Y here if you want to connect this type of camera to your
1047 computer's USB port.
1048 See <file:Documentation/video4linux/zr364xx.txt> for more info
1049 and list of supported cameras.
1050
1051 To compile this driver as a module, choose M here: the
1052 module will be called zr364xx.
1053
1054config USB_STKWEBCAM
1055 tristate "USB Syntek DC1125 Camera support"
1056 depends on VIDEO_V4L2 && EXPERIMENTAL
1057 ---help---
1058 Say Y here if you want to use this type of camera.
1059 Supported devices are typically found in some Asus laptops,
1060 with USB id 174f:a311 and 05e1:0501. Other Syntek cameras
1061 may be supported by the stk11xx driver, from which this is
1062 derived, see <http://sourceforge.net/projects/syntekdriver/>
1063
1064 To compile this driver as a module, choose M here: the
1065 module will be called stkwebcam.
1066
1067config USB_S2255
1068 tristate "USB Sensoray 2255 video capture device"
1069 depends on VIDEO_V4L2
1070 select VIDEOBUF_VMALLOC
1071 default n
1072 help
1073 Say Y here if you want support for the Sensoray 2255 USB device.
1074 This driver can be compiled as a module, called s2255drv.
1075
1076endif # V4L_USB_DRIVERS
1077endif # VIDEO_CAPTURE_DRIVERS 1129endif # VIDEO_CAPTURE_DRIVERS
1078 1130
1079menuconfig V4L_MEM2MEM_DRIVERS 1131menuconfig V4L_MEM2MEM_DRIVERS
@@ -1098,6 +1150,23 @@ config VIDEO_MEM2MEM_TESTDEV
1098 This is a virtual test device for the memory-to-memory driver 1150 This is a virtual test device for the memory-to-memory driver
1099 framework. 1151 framework.
1100 1152
1153config VIDEO_SAMSUNG_S5P_G2D
1154 tristate "Samsung S5P and EXYNOS4 G2D 2d graphics accelerator driver"
1155 depends on VIDEO_DEV && VIDEO_V4L2 && PLAT_S5P
1156 select VIDEOBUF2_DMA_CONTIG
1157 select V4L2_MEM2MEM_DEV
1158 default n
1159 ---help---
1160 This is a v4l2 driver for Samsung S5P and EXYNOS4 G2D
1161 2d graphics accelerator.
1162
1163config VIDEO_SAMSUNG_S5P_JPEG
1164 tristate "Samsung S5P/Exynos4 JPEG codec driver (EXPERIMENTAL)"
1165 depends on VIDEO_DEV && VIDEO_V4L2 && PLAT_S5P && EXPERIMENTAL
1166 select VIDEOBUF2_DMA_CONTIG
1167 select V4L2_MEM2MEM_DEV
1168 ---help---
1169 This is a v4l2 driver for Samsung S5P and EXYNOS4 JPEG codec
1101 1170
1102config VIDEO_SAMSUNG_S5P_MFC 1171config VIDEO_SAMSUNG_S5P_MFC
1103 tristate "Samsung S5P MFC 5.1 Video Codec" 1172 tristate "Samsung S5P MFC 5.1 Video Codec"
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 117f9c4b4cb..354138804cd 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o
74obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/ 74obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/
75obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o 75obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o
76obj-$(CONFIG_VIDEO_ADP1653) += adp1653.o 76obj-$(CONFIG_VIDEO_ADP1653) += adp1653.o
77obj-$(CONFIG_VIDEO_AS3645A) += as3645a.o
77 78
78obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o 79obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o
79obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o 80obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o
@@ -177,9 +178,12 @@ obj-$(CONFIG_VIDEO_OMAP1) += omap1_camera.o
177obj-$(CONFIG_VIDEO_ATMEL_ISI) += atmel-isi.o 178obj-$(CONFIG_VIDEO_ATMEL_ISI) += atmel-isi.o
178 179
179obj-$(CONFIG_VIDEO_SAMSUNG_S5P_FIMC) += s5p-fimc/ 180obj-$(CONFIG_VIDEO_SAMSUNG_S5P_FIMC) += s5p-fimc/
181obj-$(CONFIG_VIDEO_SAMSUNG_S5P_JPEG) += s5p-jpeg/
180obj-$(CONFIG_VIDEO_SAMSUNG_S5P_MFC) += s5p-mfc/ 182obj-$(CONFIG_VIDEO_SAMSUNG_S5P_MFC) += s5p-mfc/
181obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV) += s5p-tv/ 183obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV) += s5p-tv/
182 184
185obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D) += s5p-g2d/
186
183obj-$(CONFIG_ARCH_DAVINCI) += davinci/ 187obj-$(CONFIG_ARCH_DAVINCI) += davinci/
184 188
185obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o 189obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o
diff --git a/drivers/media/video/adv7170.c b/drivers/media/video/adv7170.c
index 23ba5c37c3e..879f1d83976 100644
--- a/drivers/media/video/adv7170.c
+++ b/drivers/media/video/adv7170.c
@@ -64,6 +64,11 @@ static inline struct adv7170 *to_adv7170(struct v4l2_subdev *sd)
64 64
65static char *inputs[] = { "pass_through", "play_back" }; 65static char *inputs[] = { "pass_through", "play_back" };
66 66
67static enum v4l2_mbus_pixelcode adv7170_codes[] = {
68 V4L2_MBUS_FMT_UYVY8_2X8,
69 V4L2_MBUS_FMT_UYVY8_1X16,
70};
71
67/* ----------------------------------------------------------------------- */ 72/* ----------------------------------------------------------------------- */
68 73
69static inline int adv7170_write(struct v4l2_subdev *sd, u8 reg, u8 value) 74static inline int adv7170_write(struct v4l2_subdev *sd, u8 reg, u8 value)
@@ -258,6 +263,60 @@ static int adv7170_s_routing(struct v4l2_subdev *sd,
258 return 0; 263 return 0;
259} 264}
260 265
266static int adv7170_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
267 enum v4l2_mbus_pixelcode *code)
268{
269 if (index >= ARRAY_SIZE(adv7170_codes))
270 return -EINVAL;
271
272 *code = adv7170_codes[index];
273 return 0;
274}
275
276static int adv7170_g_fmt(struct v4l2_subdev *sd,
277 struct v4l2_mbus_framefmt *mf)
278{
279 u8 val = adv7170_read(sd, 0x7);
280
281 if ((val & 0x40) == (1 << 6))
282 mf->code = V4L2_MBUS_FMT_UYVY8_1X16;
283 else
284 mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
285
286 mf->colorspace = V4L2_COLORSPACE_SMPTE170M;
287 mf->width = 0;
288 mf->height = 0;
289 mf->field = V4L2_FIELD_ANY;
290
291 return 0;
292}
293
294static int adv7170_s_fmt(struct v4l2_subdev *sd,
295 struct v4l2_mbus_framefmt *mf)
296{
297 u8 val = adv7170_read(sd, 0x7);
298 int ret;
299
300 switch (mf->code) {
301 case V4L2_MBUS_FMT_UYVY8_2X8:
302 val &= ~0x40;
303 break;
304
305 case V4L2_MBUS_FMT_UYVY8_1X16:
306 val |= 0x40;
307 break;
308
309 default:
310 v4l2_dbg(1, debug, sd,
311 "illegal v4l2_mbus_framefmt code: %d\n", mf->code);
312 return -EINVAL;
313 }
314
315 ret = adv7170_write(sd, 0x7, val);
316
317 return ret;
318}
319
261static int adv7170_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip) 320static int adv7170_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
262{ 321{
263 struct i2c_client *client = v4l2_get_subdevdata(sd); 322 struct i2c_client *client = v4l2_get_subdevdata(sd);
@@ -274,6 +333,9 @@ static const struct v4l2_subdev_core_ops adv7170_core_ops = {
274static const struct v4l2_subdev_video_ops adv7170_video_ops = { 333static const struct v4l2_subdev_video_ops adv7170_video_ops = {
275 .s_std_output = adv7170_s_std_output, 334 .s_std_output = adv7170_s_std_output,
276 .s_routing = adv7170_s_routing, 335 .s_routing = adv7170_s_routing,
336 .s_mbus_fmt = adv7170_s_fmt,
337 .g_mbus_fmt = adv7170_g_fmt,
338 .enum_mbus_fmt = adv7170_enum_fmt,
277}; 339};
278 340
279static const struct v4l2_subdev_ops adv7170_ops = { 341static const struct v4l2_subdev_ops adv7170_ops = {
diff --git a/drivers/media/video/as3645a.c b/drivers/media/video/as3645a.c
new file mode 100644
index 00000000000..ec859a58065
--- /dev/null
+++ b/drivers/media/video/as3645a.c
@@ -0,0 +1,904 @@
1/*
2 * drivers/media/video/as3645a.c - AS3645A and LM3555 flash controllers driver
3 *
4 * Copyright (C) 2008-2011 Nokia Corporation
5 * Copyright (c) 2011, Intel Corporation.
6 *
7 * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 * TODO:
24 * - Check hardware FSTROBE control when sensor driver add support for this
25 *
26 */
27
28#include <linux/delay.h>
29#include <linux/i2c.h>
30#include <linux/module.h>
31#include <linux/mutex.h>
32
33#include <media/as3645a.h>
34#include <media/v4l2-ctrls.h>
35#include <media/v4l2-device.h>
36
37#define AS_TIMER_MS_TO_CODE(t) (((t) - 100) / 50)
38#define AS_TIMER_CODE_TO_MS(c) (50 * (c) + 100)
39
40/* Register definitions */
41
42/* Read-only Design info register: Reset state: xxxx 0001 */
43#define AS_DESIGN_INFO_REG 0x00
44#define AS_DESIGN_INFO_FACTORY(x) (((x) >> 4))
45#define AS_DESIGN_INFO_MODEL(x) ((x) & 0x0f)
46
47/* Read-only Version control register: Reset state: 0000 0000
48 * for first engineering samples
49 */
50#define AS_VERSION_CONTROL_REG 0x01
51#define AS_VERSION_CONTROL_RFU(x) (((x) >> 4))
52#define AS_VERSION_CONTROL_VERSION(x) ((x) & 0x0f)
53
54/* Read / Write (Indicator and timer register): Reset state: 0000 1111 */
55#define AS_INDICATOR_AND_TIMER_REG 0x02
56#define AS_INDICATOR_AND_TIMER_TIMEOUT_SHIFT 0
57#define AS_INDICATOR_AND_TIMER_VREF_SHIFT 4
58#define AS_INDICATOR_AND_TIMER_INDICATOR_SHIFT 6
59
60/* Read / Write (Current set register): Reset state: 0110 1001 */
61#define AS_CURRENT_SET_REG 0x03
62#define AS_CURRENT_ASSIST_LIGHT_SHIFT 0
63#define AS_CURRENT_LED_DET_ON (1 << 3)
64#define AS_CURRENT_FLASH_CURRENT_SHIFT 4
65
66/* Read / Write (Control register): Reset state: 1011 0100 */
67#define AS_CONTROL_REG 0x04
68#define AS_CONTROL_MODE_SETTING_SHIFT 0
69#define AS_CONTROL_STROBE_ON (1 << 2)
70#define AS_CONTROL_OUT_ON (1 << 3)
71#define AS_CONTROL_EXT_TORCH_ON (1 << 4)
72#define AS_CONTROL_STROBE_TYPE_EDGE (0 << 5)
73#define AS_CONTROL_STROBE_TYPE_LEVEL (1 << 5)
74#define AS_CONTROL_COIL_PEAK_SHIFT 6
75
76/* Read only (D3 is read / write) (Fault and info): Reset state: 0000 x000 */
77#define AS_FAULT_INFO_REG 0x05
78#define AS_FAULT_INFO_INDUCTOR_PEAK_LIMIT (1 << 1)
79#define AS_FAULT_INFO_INDICATOR_LED (1 << 2)
80#define AS_FAULT_INFO_LED_AMOUNT (1 << 3)
81#define AS_FAULT_INFO_TIMEOUT (1 << 4)
82#define AS_FAULT_INFO_OVER_TEMPERATURE (1 << 5)
83#define AS_FAULT_INFO_SHORT_CIRCUIT (1 << 6)
84#define AS_FAULT_INFO_OVER_VOLTAGE (1 << 7)
85
86/* Boost register */
87#define AS_BOOST_REG 0x0d
88#define AS_BOOST_CURRENT_DISABLE (0 << 0)
89#define AS_BOOST_CURRENT_ENABLE (1 << 0)
90
91/* Password register is used to unlock boost register writing */
92#define AS_PASSWORD_REG 0x0f
93#define AS_PASSWORD_UNLOCK_VALUE 0x55
94
95enum as_mode {
96 AS_MODE_EXT_TORCH = 0 << AS_CONTROL_MODE_SETTING_SHIFT,
97 AS_MODE_INDICATOR = 1 << AS_CONTROL_MODE_SETTING_SHIFT,
98 AS_MODE_ASSIST = 2 << AS_CONTROL_MODE_SETTING_SHIFT,
99 AS_MODE_FLASH = 3 << AS_CONTROL_MODE_SETTING_SHIFT,
100};
101
102/*
103 * struct as3645a
104 *
105 * @subdev: V4L2 subdev
106 * @pdata: Flash platform data
107 * @power_lock: Protects power_count
108 * @power_count: Power reference count
109 * @led_mode: V4L2 flash LED mode
110 * @timeout: Flash timeout in microseconds
111 * @flash_current: Flash current (0=200mA ... 15=500mA). Maximum
112 * values are 400mA for two LEDs and 500mA for one LED.
113 * @assist_current: Torch/Assist light current (0=20mA, 1=40mA ... 7=160mA)
114 * @indicator_current: Indicator LED current (0=0mA, 1=2.5mA ... 4=10mA)
115 * @strobe_source: Flash strobe source (software or external)
116 */
117struct as3645a {
118 struct v4l2_subdev subdev;
119 const struct as3645a_platform_data *pdata;
120
121 struct mutex power_lock;
122 int power_count;
123
124 /* Controls */
125 struct v4l2_ctrl_handler ctrls;
126
127 enum v4l2_flash_led_mode led_mode;
128 unsigned int timeout;
129 u8 flash_current;
130 u8 assist_current;
131 u8 indicator_current;
132 enum v4l2_flash_strobe_source strobe_source;
133};
134
135#define to_as3645a(sd) container_of(sd, struct as3645a, subdev)
136
137/* Return negative errno else zero on success */
138static int as3645a_write(struct as3645a *flash, u8 addr, u8 val)
139{
140 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev);
141 int rval;
142
143 rval = i2c_smbus_write_byte_data(client, addr, val);
144
145 dev_dbg(&client->dev, "Write Addr:%02X Val:%02X %s\n", addr, val,
146 rval < 0 ? "fail" : "ok");
147
148 return rval;
149}
150
151/* Return negative errno else a data byte received from the device. */
152static int as3645a_read(struct as3645a *flash, u8 addr)
153{
154 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev);
155 int rval;
156
157 rval = i2c_smbus_read_byte_data(client, addr);
158
159 dev_dbg(&client->dev, "Read Addr:%02X Val:%02X %s\n", addr, rval,
160 rval < 0 ? "fail" : "ok");
161
162 return rval;
163}
164
165/* -----------------------------------------------------------------------------
166 * Hardware configuration and trigger
167 */
168
169/*
170 * as3645a_set_config - Set flash configuration registers
171 * @flash: The flash
172 *
173 * Configure the hardware with flash, assist and indicator currents, as well as
174 * flash timeout.
175 *
176 * Return 0 on success, or a negative error code if an I2C communication error
177 * occurred.
178 */
179static int as3645a_set_config(struct as3645a *flash)
180{
181 int ret;
182 u8 val;
183
184 val = (flash->flash_current << AS_CURRENT_FLASH_CURRENT_SHIFT)
185 | (flash->assist_current << AS_CURRENT_ASSIST_LIGHT_SHIFT)
186 | AS_CURRENT_LED_DET_ON;
187
188 ret = as3645a_write(flash, AS_CURRENT_SET_REG, val);
189 if (ret < 0)
190 return ret;
191
192 val = AS_TIMER_MS_TO_CODE(flash->timeout / 1000)
193 << AS_INDICATOR_AND_TIMER_TIMEOUT_SHIFT;
194
195 val |= (flash->pdata->vref << AS_INDICATOR_AND_TIMER_VREF_SHIFT)
196 | ((flash->indicator_current ? flash->indicator_current - 1 : 0)
197 << AS_INDICATOR_AND_TIMER_INDICATOR_SHIFT);
198
199 return as3645a_write(flash, AS_INDICATOR_AND_TIMER_REG, val);
200}
201
202/*
203 * as3645a_set_control - Set flash control register
204 * @flash: The flash
205 * @mode: Desired output mode
206 * @on: Desired output state
207 *
208 * Configure the hardware with output mode and state.
209 *
210 * Return 0 on success, or a negative error code if an I2C communication error
211 * occurred.
212 */
213static int
214as3645a_set_control(struct as3645a *flash, enum as_mode mode, bool on)
215{
216 u8 reg;
217
218 /* Configure output parameters and operation mode. */
219 reg = (flash->pdata->peak << AS_CONTROL_COIL_PEAK_SHIFT)
220 | (on ? AS_CONTROL_OUT_ON : 0)
221 | mode;
222
223 if (flash->led_mode == V4L2_FLASH_LED_MODE_FLASH &&
224 flash->strobe_source == V4L2_FLASH_STROBE_SOURCE_EXTERNAL) {
225 reg |= AS_CONTROL_STROBE_TYPE_LEVEL
226 | AS_CONTROL_STROBE_ON;
227 }
228
229 return as3645a_write(flash, AS_CONTROL_REG, reg);
230}
231
232/*
233 * as3645a_set_output - Configure output and operation mode
234 * @flash: Flash controller
235 * @strobe: Strobe the flash (only valid in flash mode)
236 *
237 * Turn the LEDs output on/off and set the operation mode based on the current
238 * parameters.
239 *
240 * The AS3645A can't control the indicator LED independently of the flash/torch
241 * LED. If the flash controller is in V4L2_FLASH_LED_MODE_NONE mode, set the
242 * chip to indicator mode. Otherwise set it to assist light (torch) or flash
243 * mode.
244 *
245 * In indicator and assist modes, turn the output on/off based on the indicator
246 * and torch currents. In software strobe flash mode, turn the output on/off
247 * based on the strobe parameter.
248 */
249static int as3645a_set_output(struct as3645a *flash, bool strobe)
250{
251 enum as_mode mode;
252 bool on;
253
254 switch (flash->led_mode) {
255 case V4L2_FLASH_LED_MODE_NONE:
256 on = flash->indicator_current != 0;
257 mode = AS_MODE_INDICATOR;
258 break;
259 case V4L2_FLASH_LED_MODE_TORCH:
260 on = true;
261 mode = AS_MODE_ASSIST;
262 break;
263 case V4L2_FLASH_LED_MODE_FLASH:
264 on = strobe;
265 mode = AS_MODE_FLASH;
266 break;
267 default:
268 BUG();
269 }
270
271 /* Configure output parameters and operation mode. */
272 return as3645a_set_control(flash, mode, on);
273}
274
275/* -----------------------------------------------------------------------------
276 * V4L2 controls
277 */
278
279static int as3645a_is_active(struct as3645a *flash)
280{
281 int ret;
282
283 ret = as3645a_read(flash, AS_CONTROL_REG);
284 return ret < 0 ? ret : !!(ret & AS_CONTROL_OUT_ON);
285}
286
287static int as3645a_read_fault(struct as3645a *flash)
288{
289 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev);
290 int rval;
291
292 /* NOTE: reading register clear fault status */
293 rval = as3645a_read(flash, AS_FAULT_INFO_REG);
294 if (rval < 0)
295 return rval;
296
297 if (rval & AS_FAULT_INFO_INDUCTOR_PEAK_LIMIT)
298 dev_dbg(&client->dev, "Inductor Peak limit fault\n");
299
300 if (rval & AS_FAULT_INFO_INDICATOR_LED)
301 dev_dbg(&client->dev, "Indicator LED fault: "
302 "Short circuit or open loop\n");
303
304 dev_dbg(&client->dev, "%u connected LEDs\n",
305 rval & AS_FAULT_INFO_LED_AMOUNT ? 2 : 1);
306
307 if (rval & AS_FAULT_INFO_TIMEOUT)
308 dev_dbg(&client->dev, "Timeout fault\n");
309
310 if (rval & AS_FAULT_INFO_OVER_TEMPERATURE)
311 dev_dbg(&client->dev, "Over temperature fault\n");
312
313 if (rval & AS_FAULT_INFO_SHORT_CIRCUIT)
314 dev_dbg(&client->dev, "Short circuit fault\n");
315
316 if (rval & AS_FAULT_INFO_OVER_VOLTAGE)
317 dev_dbg(&client->dev, "Over voltage fault: "
318 "Indicates missing capacitor or open connection\n");
319
320 return rval;
321}
322
323static int as3645a_get_ctrl(struct v4l2_ctrl *ctrl)
324{
325 struct as3645a *flash =
326 container_of(ctrl->handler, struct as3645a, ctrls);
327 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev);
328 int value;
329
330 switch (ctrl->id) {
331 case V4L2_CID_FLASH_FAULT:
332 value = as3645a_read_fault(flash);
333 if (value < 0)
334 return value;
335
336 ctrl->cur.val = 0;
337 if (value & AS_FAULT_INFO_SHORT_CIRCUIT)
338 ctrl->cur.val |= V4L2_FLASH_FAULT_SHORT_CIRCUIT;
339 if (value & AS_FAULT_INFO_OVER_TEMPERATURE)
340 ctrl->cur.val |= V4L2_FLASH_FAULT_OVER_TEMPERATURE;
341 if (value & AS_FAULT_INFO_TIMEOUT)
342 ctrl->cur.val |= V4L2_FLASH_FAULT_TIMEOUT;
343 if (value & AS_FAULT_INFO_OVER_VOLTAGE)
344 ctrl->cur.val |= V4L2_FLASH_FAULT_OVER_VOLTAGE;
345 if (value & AS_FAULT_INFO_INDUCTOR_PEAK_LIMIT)
346 ctrl->cur.val |= V4L2_FLASH_FAULT_OVER_CURRENT;
347 if (value & AS_FAULT_INFO_INDICATOR_LED)
348 ctrl->cur.val |= V4L2_FLASH_FAULT_INDICATOR;
349 break;
350
351 case V4L2_CID_FLASH_STROBE_STATUS:
352 if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH) {
353 ctrl->cur.val = 0;
354 break;
355 }
356
357 value = as3645a_is_active(flash);
358 if (value < 0)
359 return value;
360
361 ctrl->cur.val = value;
362 break;
363 }
364
365 dev_dbg(&client->dev, "G_CTRL %08x:%d\n", ctrl->id, ctrl->cur.val);
366
367 return 0;
368}
369
370static int as3645a_set_ctrl(struct v4l2_ctrl *ctrl)
371{
372 struct as3645a *flash =
373 container_of(ctrl->handler, struct as3645a, ctrls);
374 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev);
375 int ret;
376
377 dev_dbg(&client->dev, "S_CTRL %08x:%d\n", ctrl->id, ctrl->val);
378
379 /* If a control that doesn't apply to the current mode is modified,
380 * we store the value and return immediately. The setting will be
381 * applied when the LED mode is changed. Otherwise we apply the setting
382 * immediately.
383 */
384
385 switch (ctrl->id) {
386 case V4L2_CID_FLASH_LED_MODE:
387 if (flash->indicator_current)
388 return -EBUSY;
389
390 ret = as3645a_set_config(flash);
391 if (ret < 0)
392 return ret;
393
394 flash->led_mode = ctrl->val;
395 return as3645a_set_output(flash, false);
396
397 case V4L2_CID_FLASH_STROBE_SOURCE:
398 flash->strobe_source = ctrl->val;
399
400 /* Applies to flash mode only. */
401 if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
402 break;
403
404 return as3645a_set_output(flash, false);
405
406 case V4L2_CID_FLASH_STROBE:
407 if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
408 return -EBUSY;
409
410 return as3645a_set_output(flash, true);
411
412 case V4L2_CID_FLASH_STROBE_STOP:
413 if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
414 return -EBUSY;
415
416 return as3645a_set_output(flash, false);
417
418 case V4L2_CID_FLASH_TIMEOUT:
419 flash->timeout = ctrl->val;
420
421 /* Applies to flash mode only. */
422 if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
423 break;
424
425 return as3645a_set_config(flash);
426
427 case V4L2_CID_FLASH_INTENSITY:
428 flash->flash_current = (ctrl->val - AS3645A_FLASH_INTENSITY_MIN)
429 / AS3645A_FLASH_INTENSITY_STEP;
430
431 /* Applies to flash mode only. */
432 if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH)
433 break;
434
435 return as3645a_set_config(flash);
436
437 case V4L2_CID_FLASH_TORCH_INTENSITY:
438 flash->assist_current =
439 (ctrl->val - AS3645A_TORCH_INTENSITY_MIN)
440 / AS3645A_TORCH_INTENSITY_STEP;
441
442 /* Applies to torch mode only. */
443 if (flash->led_mode != V4L2_FLASH_LED_MODE_TORCH)
444 break;
445
446 return as3645a_set_config(flash);
447
448 case V4L2_CID_FLASH_INDICATOR_INTENSITY:
449 if (flash->led_mode != V4L2_FLASH_LED_MODE_NONE)
450 return -EBUSY;
451
452 flash->indicator_current =
453 (ctrl->val - AS3645A_INDICATOR_INTENSITY_MIN)
454 / AS3645A_INDICATOR_INTENSITY_STEP;
455
456 ret = as3645a_set_config(flash);
457 if (ret < 0)
458 return ret;
459
460 if ((ctrl->val == 0) == (ctrl->cur.val == 0))
461 break;
462
463 return as3645a_set_output(flash, false);
464 }
465
466 return 0;
467}
468
469static const struct v4l2_ctrl_ops as3645a_ctrl_ops = {
470 .g_volatile_ctrl = as3645a_get_ctrl,
471 .s_ctrl = as3645a_set_ctrl,
472};
473
474/* -----------------------------------------------------------------------------
475 * V4L2 subdev core operations
476 */
477
478/* Put device into know state. */
479static int as3645a_setup(struct as3645a *flash)
480{
481 struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev);
482 int ret;
483
484 /* clear errors */
485 ret = as3645a_read(flash, AS_FAULT_INFO_REG);
486 if (ret < 0)
487 return ret;
488
489 dev_dbg(&client->dev, "Fault info: %02x\n", ret);
490
491 ret = as3645a_set_config(flash);
492 if (ret < 0)
493 return ret;
494
495 ret = as3645a_set_output(flash, false);
496 if (ret < 0)
497 return ret;
498
499 /* read status */
500 ret = as3645a_read_fault(flash);
501 if (ret < 0)
502 return ret;
503
504 dev_dbg(&client->dev, "AS_INDICATOR_AND_TIMER_REG: %02x\n",
505 as3645a_read(flash, AS_INDICATOR_AND_TIMER_REG));
506 dev_dbg(&client->dev, "AS_CURRENT_SET_REG: %02x\n",
507 as3645a_read(flash, AS_CURRENT_SET_REG));
508 dev_dbg(&client->dev, "AS_CONTROL_REG: %02x\n",
509 as3645a_read(flash, AS_CONTROL_REG));
510
511 return ret & ~AS_FAULT_INFO_LED_AMOUNT ? -EIO : 0;
512}
513
514static int __as3645a_set_power(struct as3645a *flash, int on)
515{
516 int ret;
517
518 if (!on)
519 as3645a_set_control(flash, AS_MODE_EXT_TORCH, false);
520
521 if (flash->pdata->set_power) {
522 ret = flash->pdata->set_power(&flash->subdev, on);
523 if (ret < 0)
524 return ret;
525 }
526
527 if (!on)
528 return 0;
529
530 ret = as3645a_setup(flash);
531 if (ret < 0) {
532 if (flash->pdata->set_power)
533 flash->pdata->set_power(&flash->subdev, 0);
534 }
535
536 return ret;
537}
538
539static int as3645a_set_power(struct v4l2_subdev *sd, int on)
540{
541 struct as3645a *flash = to_as3645a(sd);
542 int ret = 0;
543
544 mutex_lock(&flash->power_lock);
545
546 if (flash->power_count == !on) {
547 ret = __as3645a_set_power(flash, !!on);
548 if (ret < 0)
549 goto done;
550 }
551
552 flash->power_count += on ? 1 : -1;
553 WARN_ON(flash->power_count < 0);
554
555done:
556 mutex_unlock(&flash->power_lock);
557 return ret;
558}
559
560static int as3645a_registered(struct v4l2_subdev *sd)
561{
562 struct as3645a *flash = to_as3645a(sd);
563 struct i2c_client *client = v4l2_get_subdevdata(sd);
564 int rval, man, model, rfu, version;
565 const char *vendor;
566
567 /* Power up the flash driver and read manufacturer ID, model ID, RFU
568 * and version.
569 */
570 rval = as3645a_set_power(&flash->subdev, 1);
571 if (rval < 0)
572 return rval;
573
574 rval = as3645a_read(flash, AS_DESIGN_INFO_REG);
575 if (rval < 0)
576 goto power_off;
577
578 man = AS_DESIGN_INFO_FACTORY(rval);
579 model = AS_DESIGN_INFO_MODEL(rval);
580
581 rval = as3645a_read(flash, AS_VERSION_CONTROL_REG);
582 if (rval < 0)
583 goto power_off;
584
585 rfu = AS_VERSION_CONTROL_RFU(rval);
586 version = AS_VERSION_CONTROL_VERSION(rval);
587
588 /* Verify the chip model and version. */
589 if (model != 0x01 || rfu != 0x00) {
590 dev_err(&client->dev, "AS3645A not detected "
591 "(model %d rfu %d)\n", model, rfu);
592 rval = -ENODEV;
593 goto power_off;
594 }
595
596 switch (man) {
597 case 1:
598 vendor = "AMS, Austria Micro Systems";
599 break;
600 case 2:
601 vendor = "ADI, Analog Devices Inc.";
602 break;
603 case 3:
604 vendor = "NSC, National Semiconductor";
605 break;
606 case 4:
607 vendor = "NXP";
608 break;
609 case 5:
610 vendor = "TI, Texas Instrument";
611 break;
612 default:
613 vendor = "Unknown";
614 }
615
616 dev_info(&client->dev, "Chip vendor: %s (%d) Version: %d\n", vendor,
617 man, version);
618
619 rval = as3645a_write(flash, AS_PASSWORD_REG, AS_PASSWORD_UNLOCK_VALUE);
620 if (rval < 0)
621 goto power_off;
622
623 rval = as3645a_write(flash, AS_BOOST_REG, AS_BOOST_CURRENT_DISABLE);
624 if (rval < 0)
625 goto power_off;
626
627 /* Setup default values. This makes sure that the chip is in a known
628 * state, in case the power rail can't be controlled.
629 */
630 rval = as3645a_setup(flash);
631
632power_off:
633 as3645a_set_power(&flash->subdev, 0);
634
635 return rval;
636}
637
638static int as3645a_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
639{
640 return as3645a_set_power(sd, 1);
641}
642
643static int as3645a_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
644{
645 return as3645a_set_power(sd, 0);
646}
647
648static const struct v4l2_subdev_core_ops as3645a_core_ops = {
649 .s_power = as3645a_set_power,
650};
651
652static const struct v4l2_subdev_ops as3645a_ops = {
653 .core = &as3645a_core_ops,
654};
655
656static const struct v4l2_subdev_internal_ops as3645a_internal_ops = {
657 .registered = as3645a_registered,
658 .open = as3645a_open,
659 .close = as3645a_close,
660};
661
662/* -----------------------------------------------------------------------------
663 * I2C driver
664 */
665#ifdef CONFIG_PM
666
667static int as3645a_suspend(struct device *dev)
668{
669 struct i2c_client *client = to_i2c_client(dev);
670 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
671 struct as3645a *flash = to_as3645a(subdev);
672 int rval;
673
674 if (flash->power_count == 0)
675 return 0;
676
677 rval = __as3645a_set_power(flash, 0);
678
679 dev_dbg(&client->dev, "Suspend %s\n", rval < 0 ? "failed" : "ok");
680
681 return rval;
682}
683
684static int as3645a_resume(struct device *dev)
685{
686 struct i2c_client *client = to_i2c_client(dev);
687 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
688 struct as3645a *flash = to_as3645a(subdev);
689 int rval;
690
691 if (flash->power_count == 0)
692 return 0;
693
694 rval = __as3645a_set_power(flash, 1);
695
696 dev_dbg(&client->dev, "Resume %s\n", rval < 0 ? "fail" : "ok");
697
698 return rval;
699}
700
701#else
702
703#define as3645a_suspend NULL
704#define as3645a_resume NULL
705
706#endif /* CONFIG_PM */
707
708/*
709 * as3645a_init_controls - Create controls
710 * @flash: The flash
711 *
712 * The number of LEDs reported in platform data is used to compute default
713 * limits. Parameters passed through platform data can override those limits.
714 */
715static int as3645a_init_controls(struct as3645a *flash)
716{
717 const struct as3645a_platform_data *pdata = flash->pdata;
718 struct v4l2_ctrl *ctrl;
719 int maximum;
720
721 v4l2_ctrl_handler_init(&flash->ctrls, 10);
722
723 /* V4L2_CID_FLASH_LED_MODE */
724 v4l2_ctrl_new_std_menu(&flash->ctrls, &as3645a_ctrl_ops,
725 V4L2_CID_FLASH_LED_MODE, 2, ~7,
726 V4L2_FLASH_LED_MODE_NONE);
727
728 /* V4L2_CID_FLASH_STROBE_SOURCE */
729 v4l2_ctrl_new_std_menu(&flash->ctrls, &as3645a_ctrl_ops,
730 V4L2_CID_FLASH_STROBE_SOURCE,
731 pdata->ext_strobe ? 1 : 0,
732 pdata->ext_strobe ? ~3 : ~1,
733 V4L2_FLASH_STROBE_SOURCE_SOFTWARE);
734
735 flash->strobe_source = V4L2_FLASH_STROBE_SOURCE_SOFTWARE;
736
737 /* V4L2_CID_FLASH_STROBE */
738 v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
739 V4L2_CID_FLASH_STROBE, 0, 0, 0, 0);
740
741 /* V4L2_CID_FLASH_STROBE_STOP */
742 v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
743 V4L2_CID_FLASH_STROBE_STOP, 0, 0, 0, 0);
744
745 /* V4L2_CID_FLASH_STROBE_STATUS */
746 ctrl = v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
747 V4L2_CID_FLASH_STROBE_STATUS, 0, 1, 1, 1);
748 if (ctrl != NULL)
749 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
750
751 /* V4L2_CID_FLASH_TIMEOUT */
752 maximum = pdata->timeout_max;
753
754 v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
755 V4L2_CID_FLASH_TIMEOUT, AS3645A_FLASH_TIMEOUT_MIN,
756 maximum, AS3645A_FLASH_TIMEOUT_STEP, maximum);
757
758 flash->timeout = maximum;
759
760 /* V4L2_CID_FLASH_INTENSITY */
761 maximum = pdata->flash_max_current;
762
763 v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
764 V4L2_CID_FLASH_INTENSITY, AS3645A_FLASH_INTENSITY_MIN,
765 maximum, AS3645A_FLASH_INTENSITY_STEP, maximum);
766
767 flash->flash_current = (maximum - AS3645A_FLASH_INTENSITY_MIN)
768 / AS3645A_FLASH_INTENSITY_STEP;
769
770 /* V4L2_CID_FLASH_TORCH_INTENSITY */
771 maximum = pdata->torch_max_current;
772
773 v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
774 V4L2_CID_FLASH_TORCH_INTENSITY,
775 AS3645A_TORCH_INTENSITY_MIN, maximum,
776 AS3645A_TORCH_INTENSITY_STEP,
777 AS3645A_TORCH_INTENSITY_MIN);
778
779 flash->assist_current = 0;
780
781 /* V4L2_CID_FLASH_INDICATOR_INTENSITY */
782 v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
783 V4L2_CID_FLASH_INDICATOR_INTENSITY,
784 AS3645A_INDICATOR_INTENSITY_MIN,
785 AS3645A_INDICATOR_INTENSITY_MAX,
786 AS3645A_INDICATOR_INTENSITY_STEP,
787 AS3645A_INDICATOR_INTENSITY_MIN);
788
789 flash->indicator_current = 0;
790
791 /* V4L2_CID_FLASH_FAULT */
792 ctrl = v4l2_ctrl_new_std(&flash->ctrls, &as3645a_ctrl_ops,
793 V4L2_CID_FLASH_FAULT, 0,
794 V4L2_FLASH_FAULT_OVER_VOLTAGE |
795 V4L2_FLASH_FAULT_TIMEOUT |
796 V4L2_FLASH_FAULT_OVER_TEMPERATURE |
797 V4L2_FLASH_FAULT_SHORT_CIRCUIT, 0, 0);
798 if (ctrl != NULL)
799 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
800
801 flash->subdev.ctrl_handler = &flash->ctrls;
802
803 return flash->ctrls.error;
804}
805
806static int as3645a_probe(struct i2c_client *client,
807 const struct i2c_device_id *devid)
808{
809 struct as3645a *flash;
810 int ret;
811
812 if (client->dev.platform_data == NULL)
813 return -ENODEV;
814
815 flash = kzalloc(sizeof(*flash), GFP_KERNEL);
816 if (flash == NULL)
817 return -ENOMEM;
818
819 flash->pdata = client->dev.platform_data;
820
821 v4l2_i2c_subdev_init(&flash->subdev, client, &as3645a_ops);
822 flash->subdev.internal_ops = &as3645a_internal_ops;
823 flash->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
824
825 ret = as3645a_init_controls(flash);
826 if (ret < 0)
827 goto done;
828
829 ret = media_entity_init(&flash->subdev.entity, 0, NULL, 0);
830 if (ret < 0)
831 goto done;
832
833 flash->subdev.entity.type = MEDIA_ENT_T_V4L2_SUBDEV_FLASH;
834
835 mutex_init(&flash->power_lock);
836
837 flash->led_mode = V4L2_FLASH_LED_MODE_NONE;
838
839done:
840 if (ret < 0) {
841 v4l2_ctrl_handler_free(&flash->ctrls);
842 kfree(flash);
843 }
844
845 return ret;
846}
847
848static int __exit as3645a_remove(struct i2c_client *client)
849{
850 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
851 struct as3645a *flash = to_as3645a(subdev);
852
853 v4l2_device_unregister_subdev(subdev);
854 v4l2_ctrl_handler_free(&flash->ctrls);
855 media_entity_cleanup(&flash->subdev.entity);
856 mutex_destroy(&flash->power_lock);
857 kfree(flash);
858
859 return 0;
860}
861
862static const struct i2c_device_id as3645a_id_table[] = {
863 { AS3645A_NAME, 0 },
864 { },
865};
866MODULE_DEVICE_TABLE(i2c, as3645a_id_table);
867
868static const struct dev_pm_ops as3645a_pm_ops = {
869 .suspend = as3645a_suspend,
870 .resume = as3645a_resume,
871};
872
873static struct i2c_driver as3645a_i2c_driver = {
874 .driver = {
875 .name = AS3645A_NAME,
876 .pm = &as3645a_pm_ops,
877 },
878 .probe = as3645a_probe,
879 .remove = __exit_p(as3645a_remove),
880 .id_table = as3645a_id_table,
881};
882
883static int __init as3645a_init(void)
884{
885 int rval;
886
887 rval = i2c_add_driver(&as3645a_i2c_driver);
888 if (rval)
889 pr_err("%s: Failed to register the driver\n", AS3645A_NAME);
890
891 return rval;
892}
893
894static void __exit as3645a_exit(void)
895{
896 i2c_del_driver(&as3645a_i2c_driver);
897}
898
899module_init(as3645a_init);
900module_exit(as3645a_exit);
901
902MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
903MODULE_DESCRIPTION("LED flash driver for AS3645A, LM3555 and their clones");
904MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c
index 8c775c59e12..9fe4519176a 100644
--- a/drivers/media/video/atmel-isi.c
+++ b/drivers/media/video/atmel-isi.c
@@ -90,7 +90,10 @@ struct atmel_isi {
90 struct isi_dma_desc dma_desc[MAX_BUFFER_NUM]; 90 struct isi_dma_desc dma_desc[MAX_BUFFER_NUM];
91 91
92 struct completion complete; 92 struct completion complete;
93 /* ISI peripherial clock */
93 struct clk *pclk; 94 struct clk *pclk;
95 /* ISI_MCK, feed to camera sensor to generate pixel clock */
96 struct clk *mck;
94 unsigned int irq; 97 unsigned int irq;
95 98
96 struct isi_platform_data *pdata; 99 struct isi_platform_data *pdata;
@@ -766,6 +769,12 @@ static int isi_camera_add_device(struct soc_camera_device *icd)
766 if (ret) 769 if (ret)
767 return ret; 770 return ret;
768 771
772 ret = clk_enable(isi->mck);
773 if (ret) {
774 clk_disable(isi->pclk);
775 return ret;
776 }
777
769 isi->icd = icd; 778 isi->icd = icd;
770 dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n", 779 dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n",
771 icd->devnum); 780 icd->devnum);
@@ -779,6 +788,7 @@ static void isi_camera_remove_device(struct soc_camera_device *icd)
779 788
780 BUG_ON(icd != isi->icd); 789 BUG_ON(icd != isi->icd);
781 790
791 clk_disable(isi->mck);
782 clk_disable(isi->pclk); 792 clk_disable(isi->pclk);
783 isi->icd = NULL; 793 isi->icd = NULL;
784 794
@@ -803,7 +813,7 @@ static int isi_camera_querycap(struct soc_camera_host *ici,
803 return 0; 813 return 0;
804} 814}
805 815
806static int isi_camera_set_bus_param(struct soc_camera_device *icd, u32 pixfmt) 816static int isi_camera_set_bus_param(struct soc_camera_device *icd)
807{ 817{
808 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 818 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
809 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 819 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
@@ -874,7 +884,7 @@ static int isi_camera_set_bus_param(struct soc_camera_device *icd, u32 pixfmt)
874 884
875 if (isi->pdata->has_emb_sync) 885 if (isi->pdata->has_emb_sync)
876 cfg1 |= ISI_CFG1_EMB_SYNC; 886 cfg1 |= ISI_CFG1_EMB_SYNC;
877 if (isi->pdata->isi_full_mode) 887 if (isi->pdata->full_mode)
878 cfg1 |= ISI_CFG1_FULL_MODE; 888 cfg1 |= ISI_CFG1_FULL_MODE;
879 889
880 isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); 890 isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
@@ -912,6 +922,7 @@ static int __devexit atmel_isi_remove(struct platform_device *pdev)
912 isi->fb_descriptors_phys); 922 isi->fb_descriptors_phys);
913 923
914 iounmap(isi->regs); 924 iounmap(isi->regs);
925 clk_put(isi->mck);
915 clk_put(isi->pclk); 926 clk_put(isi->pclk);
916 kfree(isi); 927 kfree(isi);
917 928
@@ -930,7 +941,7 @@ static int __devinit atmel_isi_probe(struct platform_device *pdev)
930 struct isi_platform_data *pdata; 941 struct isi_platform_data *pdata;
931 942
932 pdata = dev->platform_data; 943 pdata = dev->platform_data;
933 if (!pdata || !pdata->data_width_flags) { 944 if (!pdata || !pdata->data_width_flags || !pdata->mck_hz) {
934 dev_err(&pdev->dev, 945 dev_err(&pdev->dev,
935 "No config available for Atmel ISI\n"); 946 "No config available for Atmel ISI\n");
936 return -EINVAL; 947 return -EINVAL;
@@ -959,6 +970,19 @@ static int __devinit atmel_isi_probe(struct platform_device *pdev)
959 INIT_LIST_HEAD(&isi->video_buffer_list); 970 INIT_LIST_HEAD(&isi->video_buffer_list);
960 INIT_LIST_HEAD(&isi->dma_desc_head); 971 INIT_LIST_HEAD(&isi->dma_desc_head);
961 972
973 /* Get ISI_MCK, provided by programmable clock or external clock */
974 isi->mck = clk_get(dev, "isi_mck");
975 if (IS_ERR(isi->mck)) {
976 dev_err(dev, "Failed to get isi_mck\n");
977 ret = PTR_ERR(isi->mck);
978 goto err_clk_get;
979 }
980
981 /* Set ISI_MCK's frequency, it should be faster than pixel clock */
982 ret = clk_set_rate(isi->mck, pdata->mck_hz);
983 if (ret < 0)
984 goto err_set_mck_rate;
985
962 isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev, 986 isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev,
963 sizeof(struct fbd) * MAX_BUFFER_NUM, 987 sizeof(struct fbd) * MAX_BUFFER_NUM,
964 &isi->fb_descriptors_phys, 988 &isi->fb_descriptors_phys,
@@ -1034,9 +1058,12 @@ err_alloc_ctx:
1034 isi->p_fb_descriptors, 1058 isi->p_fb_descriptors,
1035 isi->fb_descriptors_phys); 1059 isi->fb_descriptors_phys);
1036err_alloc_descriptors: 1060err_alloc_descriptors:
1061err_set_mck_rate:
1062 clk_put(isi->mck);
1063err_clk_get:
1037 kfree(isi); 1064 kfree(isi);
1038err_alloc_isi: 1065err_alloc_isi:
1039 clk_put(isi->pclk); 1066 clk_put(pclk);
1040 1067
1041 return ret; 1068 return ret;
1042} 1069}
diff --git a/drivers/media/video/au0828/Kconfig b/drivers/media/video/au0828/Kconfig
index 0c3a5ba0e85..81ba9d9d1b5 100644
--- a/drivers/media/video/au0828/Kconfig
+++ b/drivers/media/video/au0828/Kconfig
@@ -2,6 +2,7 @@
2config VIDEO_AU0828 2config VIDEO_AU0828
3 tristate "Auvitek AU0828 support" 3 tristate "Auvitek AU0828 support"
4 depends on I2C && INPUT && DVB_CORE && USB && VIDEO_V4L2 4 depends on I2C && INPUT && DVB_CORE && USB && VIDEO_V4L2
5 depends on DVB_CAPTURE_DRIVERS
5 select I2C_ALGOBIT 6 select I2C_ALGOBIT
6 select VIDEO_TVEEPROM 7 select VIDEO_TVEEPROM
7 select VIDEOBUF_VMALLOC 8 select VIDEOBUF_VMALLOC
diff --git a/drivers/media/video/au0828/au0828-i2c.c b/drivers/media/video/au0828/au0828-i2c.c
index cbdb65c34f2..05c299fa5d7 100644
--- a/drivers/media/video/au0828/au0828-i2c.c
+++ b/drivers/media/video/au0828/au0828-i2c.c
@@ -348,7 +348,7 @@ static void do_i2c_scan(char *name, struct i2c_client *c)
348 } 348 }
349} 349}
350 350
351/* init + register i2c algo-bit adapter */ 351/* init + register i2c adapter */
352int au0828_i2c_register(struct au0828_dev *dev) 352int au0828_i2c_register(struct au0828_dev *dev)
353{ 353{
354 dprintk(1, "%s()\n", __func__); 354 dprintk(1, "%s()\n", __func__);
diff --git a/drivers/media/video/bt8xx/bt848.h b/drivers/media/video/bt8xx/bt848.h
index 0bcd95303bb..c37e6acffde 100644
--- a/drivers/media/video/bt8xx/bt848.h
+++ b/drivers/media/video/bt8xx/bt848.h
@@ -30,6 +30,10 @@
30#ifndef PCI_DEVICE_ID_BT849 30#ifndef PCI_DEVICE_ID_BT849
31#define PCI_DEVICE_ID_BT849 0x351 31#define PCI_DEVICE_ID_BT849 0x351
32#endif 32#endif
33#ifndef PCI_DEVICE_ID_FUSION879
34#define PCI_DEVICE_ID_FUSION879 0x36c
35#endif
36
33#ifndef PCI_DEVICE_ID_BT878 37#ifndef PCI_DEVICE_ID_BT878
34#define PCI_DEVICE_ID_BT878 0x36e 38#define PCI_DEVICE_ID_BT878 0x36e
35#endif 39#endif
@@ -37,7 +41,6 @@
37#define PCI_DEVICE_ID_BT879 0x36f 41#define PCI_DEVICE_ID_BT879 0x36f
38#endif 42#endif
39 43
40
41/* Brooktree 848 registers */ 44/* Brooktree 848 registers */
42 45
43#define BT848_DSTATUS 0x000 46#define BT848_DSTATUS 0x000
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index 5939021d8eb..ff2933ab705 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -80,6 +80,8 @@ static void phytec_muxsel(struct bttv *btv, unsigned int input);
80static void gv800s_muxsel(struct bttv *btv, unsigned int input); 80static void gv800s_muxsel(struct bttv *btv, unsigned int input);
81static void gv800s_init(struct bttv *btv); 81static void gv800s_init(struct bttv *btv);
82 82
83static void td3116_muxsel(struct bttv *btv, unsigned int input);
84
83static int terratec_active_radio_upgrade(struct bttv *btv); 85static int terratec_active_radio_upgrade(struct bttv *btv);
84static int tea5757_read(struct bttv *btv); 86static int tea5757_read(struct bttv *btv);
85static int tea5757_write(struct bttv *btv, int value); 87static int tea5757_write(struct bttv *btv, int value);
@@ -284,7 +286,8 @@ static struct CARD {
284 { 0x10b42636, BTTV_BOARD_HAUPPAUGE878, "STB ???" }, 286 { 0x10b42636, BTTV_BOARD_HAUPPAUGE878, "STB ???" },
285 { 0x217d6606, BTTV_BOARD_WINFAST2000, "Leadtek WinFast TV 2000" }, 287 { 0x217d6606, BTTV_BOARD_WINFAST2000, "Leadtek WinFast TV 2000" },
286 { 0xfff6f6ff, BTTV_BOARD_WINFAST2000, "Leadtek WinFast TV 2000" }, 288 { 0xfff6f6ff, BTTV_BOARD_WINFAST2000, "Leadtek WinFast TV 2000" },
287 { 0x03116000, BTTV_BOARD_SENSORAY311, "Sensoray 311" }, 289 { 0x03116000, BTTV_BOARD_SENSORAY311_611, "Sensoray 311" },
290 { 0x06116000, BTTV_BOARD_SENSORAY311_611, "Sensoray 611" },
288 { 0x00790e11, BTTV_BOARD_WINDVR, "Canopus WinDVR PCI" }, 291 { 0x00790e11, BTTV_BOARD_WINDVR, "Canopus WinDVR PCI" },
289 { 0xa0fca1a0, BTTV_BOARD_ZOLTRIX, "Face to Face Tvmax" }, 292 { 0xa0fca1a0, BTTV_BOARD_ZOLTRIX, "Face to Face Tvmax" },
290 { 0x82b2aa6a, BTTV_BOARD_SIMUS_GVC1100, "SIMUS GVC1100" }, 293 { 0x82b2aa6a, BTTV_BOARD_SIMUS_GVC1100, "SIMUS GVC1100" },
@@ -341,6 +344,7 @@ static struct CARD {
341 { 0x15401835, BTTV_BOARD_PV183, "Provideo PV183-6" }, 344 { 0x15401835, BTTV_BOARD_PV183, "Provideo PV183-6" },
342 { 0x15401836, BTTV_BOARD_PV183, "Provideo PV183-7" }, 345 { 0x15401836, BTTV_BOARD_PV183, "Provideo PV183-7" },
343 { 0x15401837, BTTV_BOARD_PV183, "Provideo PV183-8" }, 346 { 0x15401837, BTTV_BOARD_PV183, "Provideo PV183-8" },
347 { 0x3116f200, BTTV_BOARD_TVT_TD3116, "Tongwei Video Technology TD-3116" },
344 348
345 { 0, -1, NULL } 349 { 0, -1, NULL }
346}; 350};
@@ -1526,10 +1530,10 @@ struct tvcard bttv_tvcards[] = {
1526 GPIO20,22,23: R30,R29,R28 1530 GPIO20,22,23: R30,R29,R28
1527 */ 1531 */
1528 }, 1532 },
1529 [BTTV_BOARD_SENSORAY311] = { 1533 [BTTV_BOARD_SENSORAY311_611] = {
1530 /* Clay Kunz <ckunz@mail.arc.nasa.gov> */ 1534 /* Clay Kunz <ckunz@mail.arc.nasa.gov> */
1531 /* you must jumper JP5 for the card to work */ 1535 /* you must jumper JP5 for the 311 card (PC/104+) to work */
1532 .name = "Sensoray 311", 1536 .name = "Sensoray 311/611",
1533 .video_inputs = 5, 1537 .video_inputs = 5,
1534 /* .audio_inputs= 0, */ 1538 /* .audio_inputs= 0, */
1535 .svhs = 4, 1539 .svhs = 4,
@@ -2879,6 +2883,16 @@ struct tvcard bttv_tvcards[] = {
2879 .tuner_type = TUNER_ABSENT, 2883 .tuner_type = TUNER_ABSENT,
2880 .tuner_addr = ADDR_UNSET, 2884 .tuner_addr = ADDR_UNSET,
2881 }, 2885 },
2886 [BTTV_BOARD_TVT_TD3116] = {
2887 .name = "Tongwei Video Technology TD-3116",
2888 .video_inputs = 16,
2889 .gpiomask = 0xc00ff,
2890 .muxsel = MUXSEL(2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2),
2891 .muxsel_hook = td3116_muxsel,
2892 .svhs = NO_SVHS,
2893 .pll = PLL_28,
2894 .tuner_type = TUNER_ABSENT,
2895 },
2882}; 2896};
2883 2897
2884static const unsigned int bttv_num_tvcards = ARRAY_SIZE(bttv_tvcards); 2898static const unsigned int bttv_num_tvcards = ARRAY_SIZE(bttv_tvcards);
@@ -3228,6 +3242,42 @@ static void geovision_muxsel(struct bttv *btv, unsigned int input)
3228 gpio_bits(0xf, inmux); 3242 gpio_bits(0xf, inmux);
3229} 3243}
3230 3244
3245/*
3246 * The TD3116 has 2 74HC4051 muxes wired to the MUX0 input of a bt878.
3247 * The first 74HC4051 has the lower 8 inputs, the second one the higher 8.
3248 * The muxes are controlled via a 74HC373 latch which is connected to
3249 * GPIOs 0-7. GPIO 18 is connected to the LE signal of the latch.
3250 * Q0 of the latch is connected to the Enable (~E) input of the first
3251 * 74HC4051. Q1 - Q3 are connected to S0 - S2 of the same 74HC4051.
3252 * Q4 - Q7 are connected to the second 74HC4051 in the same way.
3253 */
3254
3255static void td3116_latch_value(struct bttv *btv, u32 value)
3256{
3257 gpio_bits((1<<18) | 0xff, value);
3258 gpio_bits((1<<18) | 0xff, (1<<18) | value);
3259 udelay(1);
3260 gpio_bits((1<<18) | 0xff, value);
3261}
3262
3263static void td3116_muxsel(struct bttv *btv, unsigned int input)
3264{
3265 u32 value;
3266 u32 highbit;
3267
3268 highbit = (input & 0x8) >> 3 ;
3269
3270 /* Disable outputs and set value in the mux */
3271 value = 0x11; /* Disable outputs */
3272 value |= ((input & 0x7) << 1) << (4 * highbit);
3273 td3116_latch_value(btv, value);
3274
3275 /* Enable the correct output */
3276 value &= ~0x11;
3277 value |= ((highbit ^ 0x1) << 4) | highbit;
3278 td3116_latch_value(btv, value);
3279}
3280
3231/* ----------------------------------------------------------------------- */ 3281/* ----------------------------------------------------------------------- */
3232 3282
3233static void bttv_reset_audio(struct bttv *btv) 3283static void bttv_reset_audio(struct bttv *btv)
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index 3dd06607aec..76c301f0509 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -4572,6 +4572,7 @@ static struct pci_device_id bttv_pci_tbl[] = {
4572 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_BT849), 0}, 4572 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_BT849), 0},
4573 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_BT878), 0}, 4573 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_BT878), 0},
4574 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_BT879), 0}, 4574 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_BT879), 0},
4575 {PCI_VDEVICE(BROOKTREE, PCI_DEVICE_ID_FUSION879), 0},
4575 {0,} 4576 {0,}
4576}; 4577};
4577 4578
diff --git a/drivers/media/video/bt8xx/bttv-i2c.c b/drivers/media/video/bt8xx/bttv-i2c.c
index e3952af7e56..580c8e68239 100644
--- a/drivers/media/video/bt8xx/bttv-i2c.c
+++ b/drivers/media/video/bt8xx/bttv-i2c.c
@@ -346,7 +346,7 @@ static void do_i2c_scan(char *name, struct i2c_client *c)
346 } 346 }
347} 347}
348 348
349/* init + register i2c algo-bit adapter */ 349/* init + register i2c adapter */
350int __devinit init_bttv_i2c(struct bttv *btv) 350int __devinit init_bttv_i2c(struct bttv *btv)
351{ 351{
352 strlcpy(btv->i2c_client.name, "bttv internal", I2C_NAME_SIZE); 352 strlcpy(btv->i2c_client.name, "bttv internal", I2C_NAME_SIZE);
diff --git a/drivers/media/video/bt8xx/bttv.h b/drivers/media/video/bt8xx/bttv.h
index c6333595c6b..c5171619ac7 100644
--- a/drivers/media/video/bt8xx/bttv.h
+++ b/drivers/media/video/bt8xx/bttv.h
@@ -96,7 +96,7 @@
96#define BTTV_BOARD_PV_BT878P_PLUS 0x46 96#define BTTV_BOARD_PV_BT878P_PLUS 0x46
97#define BTTV_BOARD_FLYVIDEO98EZ 0x47 97#define BTTV_BOARD_FLYVIDEO98EZ 0x47
98#define BTTV_BOARD_PV_BT878P_9B 0x48 98#define BTTV_BOARD_PV_BT878P_9B 0x48
99#define BTTV_BOARD_SENSORAY311 0x49 99#define BTTV_BOARD_SENSORAY311_611 0x49
100#define BTTV_BOARD_RV605 0x4a 100#define BTTV_BOARD_RV605 0x4a
101#define BTTV_BOARD_POWERCLR_MTV878 0x4b 101#define BTTV_BOARD_POWERCLR_MTV878 0x4b
102#define BTTV_BOARD_WINDVR 0x4c 102#define BTTV_BOARD_WINDVR 0x4c
@@ -183,6 +183,7 @@
183#define BTTV_BOARD_GEOVISION_GV800S 0x9d 183#define BTTV_BOARD_GEOVISION_GV800S 0x9d
184#define BTTV_BOARD_GEOVISION_GV800S_SL 0x9e 184#define BTTV_BOARD_GEOVISION_GV800S_SL 0x9e
185#define BTTV_BOARD_PV183 0x9f 185#define BTTV_BOARD_PV183 0x9f
186#define BTTV_BOARD_TVT_TD3116 0xa0
186 187
187 188
188/* more card-specific defines */ 189/* more card-specific defines */
diff --git a/drivers/media/video/cx18/cx18-i2c.c b/drivers/media/video/cx18/cx18-i2c.c
index 040aaa87579..51609d5c88c 100644
--- a/drivers/media/video/cx18/cx18-i2c.c
+++ b/drivers/media/video/cx18/cx18-i2c.c
@@ -232,7 +232,7 @@ static struct i2c_algo_bit_data cx18_i2c_algo_template = {
232 .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */ 232 .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
233}; 233};
234 234
235/* init + register i2c algo-bit adapter */ 235/* init + register i2c adapter */
236int init_cx18_i2c(struct cx18 *cx) 236int init_cx18_i2c(struct cx18 *cx)
237{ 237{
238 int i, err; 238 int i, err;
diff --git a/drivers/media/video/cx18/cx18-i2c.h b/drivers/media/video/cx18/cx18-i2c.h
index bdfd1921e30..1180fdc8d98 100644
--- a/drivers/media/video/cx18/cx18-i2c.h
+++ b/drivers/media/video/cx18/cx18-i2c.h
@@ -24,6 +24,6 @@
24int cx18_i2c_register(struct cx18 *cx, unsigned idx); 24int cx18_i2c_register(struct cx18 *cx, unsigned idx);
25struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw); 25struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw);
26 26
27/* init + register i2c algo-bit adapter */ 27/* init + register i2c adapter */
28int init_cx18_i2c(struct cx18 *cx); 28int init_cx18_i2c(struct cx18 *cx);
29void exit_cx18_i2c(struct cx18 *cx); 29void exit_cx18_i2c(struct cx18 *cx);
diff --git a/drivers/media/video/cx231xx/Kconfig b/drivers/media/video/cx231xx/Kconfig
index ae85a7a7bd7..446f692aabb 100644
--- a/drivers/media/video/cx231xx/Kconfig
+++ b/drivers/media/video/cx231xx/Kconfig
@@ -40,10 +40,10 @@ config VIDEO_CX231XX_ALSA
40 40
41config VIDEO_CX231XX_DVB 41config VIDEO_CX231XX_DVB
42 tristate "DVB/ATSC Support for Cx231xx based TV cards" 42 tristate "DVB/ATSC Support for Cx231xx based TV cards"
43 depends on VIDEO_CX231XX && DVB_CORE 43 depends on VIDEO_CX231XX && DVB_CORE && DVB_CAPTURE_DRIVERS
44 select VIDEOBUF_DVB 44 select VIDEOBUF_DVB
45 select MEDIA_TUNER_XC5000 if !DVB_FE_CUSTOMISE 45 select MEDIA_TUNER_XC5000 if !MEDIA_TUNER_CUSTOMISE
46 select MEDIA_TUNER_NXP18271 if !DVB_FE_CUSTOMISE 46 select MEDIA_TUNER_TDA18271 if !MEDIA_TUNER_CUSTOMISE
47 select DVB_MB86A20S if !DVB_FE_CUSTOMISE 47 select DVB_MB86A20S if !DVB_FE_CUSTOMISE
48 48
49 ---help--- 49 ---help---
diff --git a/drivers/media/video/cx231xx/cx231xx-audio.c b/drivers/media/video/cx231xx/cx231xx-audio.c
index 30d13c15739..a2c2b7d343e 100644
--- a/drivers/media/video/cx231xx/cx231xx-audio.c
+++ b/drivers/media/video/cx231xx/cx231xx-audio.c
@@ -111,6 +111,9 @@ static void cx231xx_audio_isocirq(struct urb *urb)
111 struct snd_pcm_substream *substream; 111 struct snd_pcm_substream *substream;
112 struct snd_pcm_runtime *runtime; 112 struct snd_pcm_runtime *runtime;
113 113
114 if (dev->state & DEV_DISCONNECTED)
115 return;
116
114 switch (urb->status) { 117 switch (urb->status) {
115 case 0: /* success */ 118 case 0: /* success */
116 case -ETIMEDOUT: /* NAK */ 119 case -ETIMEDOUT: /* NAK */
@@ -196,6 +199,9 @@ static void cx231xx_audio_bulkirq(struct urb *urb)
196 struct snd_pcm_substream *substream; 199 struct snd_pcm_substream *substream;
197 struct snd_pcm_runtime *runtime; 200 struct snd_pcm_runtime *runtime;
198 201
202 if (dev->state & DEV_DISCONNECTED)
203 return;
204
199 switch (urb->status) { 205 switch (urb->status) {
200 case 0: /* success */ 206 case 0: /* success */
201 case -ETIMEDOUT: /* NAK */ 207 case -ETIMEDOUT: /* NAK */
@@ -273,6 +279,9 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
273 279
274 cx231xx_info("%s: Starting ISO AUDIO transfers\n", __func__); 280 cx231xx_info("%s: Starting ISO AUDIO transfers\n", __func__);
275 281
282 if (dev->state & DEV_DISCONNECTED)
283 return -ENODEV;
284
276 sb_size = CX231XX_ISO_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size; 285 sb_size = CX231XX_ISO_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
277 286
278 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) { 287 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
@@ -298,7 +307,7 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
298 urb->context = dev; 307 urb->context = dev;
299 urb->pipe = usb_rcvisocpipe(dev->udev, 308 urb->pipe = usb_rcvisocpipe(dev->udev,
300 dev->adev.end_point_addr); 309 dev->adev.end_point_addr);
301 urb->transfer_flags = URB_ISO_ASAP; 310 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
302 urb->transfer_buffer = dev->adev.transfer_buffer[i]; 311 urb->transfer_buffer = dev->adev.transfer_buffer[i];
303 urb->interval = 1; 312 urb->interval = 1;
304 urb->complete = cx231xx_audio_isocirq; 313 urb->complete = cx231xx_audio_isocirq;
@@ -331,6 +340,9 @@ static int cx231xx_init_audio_bulk(struct cx231xx *dev)
331 340
332 cx231xx_info("%s: Starting BULK AUDIO transfers\n", __func__); 341 cx231xx_info("%s: Starting BULK AUDIO transfers\n", __func__);
333 342
343 if (dev->state & DEV_DISCONNECTED)
344 return -ENODEV;
345
334 sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size; 346 sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
335 347
336 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) { 348 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
@@ -356,7 +368,7 @@ static int cx231xx_init_audio_bulk(struct cx231xx *dev)
356 urb->context = dev; 368 urb->context = dev;
357 urb->pipe = usb_rcvbulkpipe(dev->udev, 369 urb->pipe = usb_rcvbulkpipe(dev->udev,
358 dev->adev.end_point_addr); 370 dev->adev.end_point_addr);
359 urb->transfer_flags = 0; 371 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
360 urb->transfer_buffer = dev->adev.transfer_buffer[i]; 372 urb->transfer_buffer = dev->adev.transfer_buffer[i];
361 urb->complete = cx231xx_audio_bulkirq; 373 urb->complete = cx231xx_audio_bulkirq;
362 urb->transfer_buffer_length = sb_size; 374 urb->transfer_buffer_length = sb_size;
@@ -432,6 +444,11 @@ static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
432 return -ENODEV; 444 return -ENODEV;
433 } 445 }
434 446
447 if (dev->state & DEV_DISCONNECTED) {
448 cx231xx_errdev("Can't open. the device was removed.\n");
449 return -ENODEV;
450 }
451
435 /* Sets volume, mute, etc */ 452 /* Sets volume, mute, etc */
436 dev->mute = 0; 453 dev->mute = 0;
437 454
@@ -571,6 +588,9 @@ static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream,
571 struct cx231xx *dev = snd_pcm_substream_chip(substream); 588 struct cx231xx *dev = snd_pcm_substream_chip(substream);
572 int retval; 589 int retval;
573 590
591 if (dev->state & DEV_DISCONNECTED)
592 return -ENODEV;
593
574 spin_lock(&dev->adev.slock); 594 spin_lock(&dev->adev.slock);
575 switch (cmd) { 595 switch (cmd) {
576 case SNDRV_PCM_TRIGGER_START: 596 case SNDRV_PCM_TRIGGER_START:
diff --git a/drivers/media/video/cx231xx/cx231xx-cards.c b/drivers/media/video/cx231xx/cx231xx-cards.c
index 60b021e7986..919ed77b32f 100644
--- a/drivers/media/video/cx231xx/cx231xx-cards.c
+++ b/drivers/media/video/cx231xx/cx231xx-cards.c
@@ -843,25 +843,34 @@ void cx231xx_release_resources(struct cx231xx *dev)
843 843
844 cx231xx_remove_from_devlist(dev); 844 cx231xx_remove_from_devlist(dev);
845 845
846 cx231xx_ir_exit(dev);
847
846 /* Release I2C buses */ 848 /* Release I2C buses */
847 cx231xx_dev_uninit(dev); 849 cx231xx_dev_uninit(dev);
848 850
849 cx231xx_ir_exit(dev); 851 /* delete v4l2 device */
852 v4l2_device_unregister(&dev->v4l2_dev);
850 853
851 usb_put_dev(dev->udev); 854 usb_put_dev(dev->udev);
852 855
853 /* Mark device as unused */ 856 /* Mark device as unused */
854 cx231xx_devused &= ~(1 << dev->devno); 857 clear_bit(dev->devno, &cx231xx_devused);
858
859 kfree(dev->video_mode.alt_max_pkt_size);
860 kfree(dev->vbi_mode.alt_max_pkt_size);
861 kfree(dev->sliced_cc_mode.alt_max_pkt_size);
862 kfree(dev->ts1_mode.alt_max_pkt_size);
863 kfree(dev);
864 dev = NULL;
855} 865}
856 866
857/* 867/*
858 * cx231xx_init_dev() 868 * cx231xx_init_dev()
859 * allocates and inits the device structs, registers i2c bus and v4l device 869 * allocates and inits the device structs, registers i2c bus and v4l device
860 */ 870 */
861static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev, 871static int cx231xx_init_dev(struct cx231xx *dev, struct usb_device *udev,
862 int minor) 872 int minor)
863{ 873{
864 struct cx231xx *dev = *devhandle;
865 int retval = -ENOMEM; 874 int retval = -ENOMEM;
866 int errCode; 875 int errCode;
867 unsigned int maxh, maxw; 876 unsigned int maxh, maxw;
@@ -1016,7 +1025,6 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1016 int i, isoc_pipe = 0; 1025 int i, isoc_pipe = 0;
1017 char *speed; 1026 char *speed;
1018 char descr[255] = ""; 1027 char descr[255] = "";
1019 struct usb_interface *lif = NULL;
1020 struct usb_interface_assoc_descriptor *assoc_desc; 1028 struct usb_interface_assoc_descriptor *assoc_desc;
1021 1029
1022 udev = usb_get_dev(interface_to_usbdev(interface)); 1030 udev = usb_get_dev(interface_to_usbdev(interface));
@@ -1030,21 +1038,21 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1030 return -ENODEV; 1038 return -ENODEV;
1031 1039
1032 /* Check to see next free device and mark as used */ 1040 /* Check to see next free device and mark as used */
1033 nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS); 1041 do {
1034 cx231xx_devused |= 1 << nr; 1042 nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS);
1035 1043 if (nr >= CX231XX_MAXBOARDS) {
1036 if (nr >= CX231XX_MAXBOARDS) { 1044 /* No free device slots */
1037 cx231xx_err(DRIVER_NAME 1045 cx231xx_err(DRIVER_NAME ": Supports only %i devices.\n",
1038 ": Supports only %i cx231xx boards.\n", CX231XX_MAXBOARDS); 1046 CX231XX_MAXBOARDS);
1039 cx231xx_devused &= ~(1 << nr); 1047 return -ENOMEM;
1040 return -ENOMEM; 1048 }
1041 } 1049 } while (test_and_set_bit(nr, &cx231xx_devused));
1042 1050
1043 /* allocate memory for our device state and initialize it */ 1051 /* allocate memory for our device state and initialize it */
1044 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1052 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1045 if (dev == NULL) { 1053 if (dev == NULL) {
1046 cx231xx_err(DRIVER_NAME ": out of memory!\n"); 1054 cx231xx_err(DRIVER_NAME ": out of memory!\n");
1047 cx231xx_devused &= ~(1 << nr); 1055 clear_bit(dev->devno, &cx231xx_devused);
1048 return -ENOMEM; 1056 return -ENOMEM;
1049 } 1057 }
1050 1058
@@ -1071,9 +1079,6 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1071 1079
1072 /* init CIR module TBD */ 1080 /* init CIR module TBD */
1073 1081
1074 /* store the current interface */
1075 lif = interface;
1076
1077 /*mode_tv: digital=1 or analog=0*/ 1082 /*mode_tv: digital=1 or analog=0*/
1078 dev->mode_tv = 0; 1083 dev->mode_tv = 0;
1079 1084
@@ -1113,9 +1118,6 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1113 le16_to_cpu(udev->descriptor.idProduct), 1118 le16_to_cpu(udev->descriptor.idProduct),
1114 dev->max_iad_interface_count); 1119 dev->max_iad_interface_count);
1115 1120
1116 /* store the interface 0 back */
1117 lif = udev->actconfig->interface[0];
1118
1119 /* increment interface count */ 1121 /* increment interface count */
1120 dev->interface_count++; 1122 dev->interface_count++;
1121 1123
@@ -1126,7 +1128,7 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1126 if (assoc_desc->bFirstInterface != ifnum) { 1128 if (assoc_desc->bFirstInterface != ifnum) {
1127 cx231xx_err(DRIVER_NAME ": Not found " 1129 cx231xx_err(DRIVER_NAME ": Not found "
1128 "matching IAD interface\n"); 1130 "matching IAD interface\n");
1129 cx231xx_devused &= ~(1 << nr); 1131 clear_bit(dev->devno, &cx231xx_devused);
1130 kfree(dev); 1132 kfree(dev);
1131 dev = NULL; 1133 dev = NULL;
1132 return -ENODEV; 1134 return -ENODEV;
@@ -1135,7 +1137,7 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1135 cx231xx_info("registering interface %d\n", ifnum); 1137 cx231xx_info("registering interface %d\n", ifnum);
1136 1138
1137 /* save our data pointer in this interface device */ 1139 /* save our data pointer in this interface device */
1138 usb_set_intfdata(lif, dev); 1140 usb_set_intfdata(interface, dev);
1139 1141
1140 /* 1142 /*
1141 * AV device initialization - only done at the last interface 1143 * AV device initialization - only done at the last interface
@@ -1145,19 +1147,19 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1145 retval = v4l2_device_register(&interface->dev, &dev->v4l2_dev); 1147 retval = v4l2_device_register(&interface->dev, &dev->v4l2_dev);
1146 if (retval) { 1148 if (retval) {
1147 cx231xx_errdev("v4l2_device_register failed\n"); 1149 cx231xx_errdev("v4l2_device_register failed\n");
1148 cx231xx_devused &= ~(1 << nr); 1150 clear_bit(dev->devno, &cx231xx_devused);
1149 kfree(dev); 1151 kfree(dev);
1150 dev = NULL; 1152 dev = NULL;
1151 return -EIO; 1153 return -EIO;
1152 } 1154 }
1153 /* allocate device struct */ 1155 /* allocate device struct */
1154 retval = cx231xx_init_dev(&dev, udev, nr); 1156 retval = cx231xx_init_dev(dev, udev, nr);
1155 if (retval) { 1157 if (retval) {
1156 cx231xx_devused &= ~(1 << dev->devno); 1158 clear_bit(dev->devno, &cx231xx_devused);
1157 v4l2_device_unregister(&dev->v4l2_dev); 1159 v4l2_device_unregister(&dev->v4l2_dev);
1158 kfree(dev); 1160 kfree(dev);
1159 dev = NULL; 1161 dev = NULL;
1160 usb_set_intfdata(lif, NULL); 1162 usb_set_intfdata(interface, NULL);
1161 1163
1162 return retval; 1164 return retval;
1163 } 1165 }
@@ -1178,7 +1180,7 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1178 1180
1179 if (dev->video_mode.alt_max_pkt_size == NULL) { 1181 if (dev->video_mode.alt_max_pkt_size == NULL) {
1180 cx231xx_errdev("out of memory!\n"); 1182 cx231xx_errdev("out of memory!\n");
1181 cx231xx_devused &= ~(1 << nr); 1183 clear_bit(dev->devno, &cx231xx_devused);
1182 v4l2_device_unregister(&dev->v4l2_dev); 1184 v4l2_device_unregister(&dev->v4l2_dev);
1183 kfree(dev); 1185 kfree(dev);
1184 dev = NULL; 1186 dev = NULL;
@@ -1212,7 +1214,7 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1212 1214
1213 if (dev->vbi_mode.alt_max_pkt_size == NULL) { 1215 if (dev->vbi_mode.alt_max_pkt_size == NULL) {
1214 cx231xx_errdev("out of memory!\n"); 1216 cx231xx_errdev("out of memory!\n");
1215 cx231xx_devused &= ~(1 << nr); 1217 clear_bit(dev->devno, &cx231xx_devused);
1216 v4l2_device_unregister(&dev->v4l2_dev); 1218 v4l2_device_unregister(&dev->v4l2_dev);
1217 kfree(dev); 1219 kfree(dev);
1218 dev = NULL; 1220 dev = NULL;
@@ -1247,7 +1249,7 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1247 1249
1248 if (dev->sliced_cc_mode.alt_max_pkt_size == NULL) { 1250 if (dev->sliced_cc_mode.alt_max_pkt_size == NULL) {
1249 cx231xx_errdev("out of memory!\n"); 1251 cx231xx_errdev("out of memory!\n");
1250 cx231xx_devused &= ~(1 << nr); 1252 clear_bit(dev->devno, &cx231xx_devused);
1251 v4l2_device_unregister(&dev->v4l2_dev); 1253 v4l2_device_unregister(&dev->v4l2_dev);
1252 kfree(dev); 1254 kfree(dev);
1253 dev = NULL; 1255 dev = NULL;
@@ -1283,7 +1285,7 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
1283 1285
1284 if (dev->ts1_mode.alt_max_pkt_size == NULL) { 1286 if (dev->ts1_mode.alt_max_pkt_size == NULL) {
1285 cx231xx_errdev("out of memory!\n"); 1287 cx231xx_errdev("out of memory!\n");
1286 cx231xx_devused &= ~(1 << nr); 1288 clear_bit(dev->devno, &cx231xx_devused);
1287 v4l2_device_unregister(&dev->v4l2_dev); 1289 v4l2_device_unregister(&dev->v4l2_dev);
1288 kfree(dev); 1290 kfree(dev);
1289 dev = NULL; 1291 dev = NULL;
@@ -1334,10 +1336,9 @@ static void cx231xx_usb_disconnect(struct usb_interface *interface)
1334 if (!dev->udev) 1336 if (!dev->udev)
1335 return; 1337 return;
1336 1338
1337 flush_request_modules(dev); 1339 dev->state |= DEV_DISCONNECTED;
1338 1340
1339 /* delete v4l2 device */ 1341 flush_request_modules(dev);
1340 v4l2_device_unregister(&dev->v4l2_dev);
1341 1342
1342 /* wait until all current v4l2 io is finished then deallocate 1343 /* wait until all current v4l2 io is finished then deallocate
1343 resources */ 1344 resources */
@@ -1351,31 +1352,24 @@ static void cx231xx_usb_disconnect(struct usb_interface *interface)
1351 "deallocation are deferred on close.\n", 1352 "deallocation are deferred on close.\n",
1352 video_device_node_name(dev->vdev)); 1353 video_device_node_name(dev->vdev));
1353 1354
1354 dev->state |= DEV_MISCONFIGURED; 1355 /* Even having users, it is safe to remove the RC i2c driver */
1356 cx231xx_ir_exit(dev);
1357
1355 if (dev->USE_ISO) 1358 if (dev->USE_ISO)
1356 cx231xx_uninit_isoc(dev); 1359 cx231xx_uninit_isoc(dev);
1357 else 1360 else
1358 cx231xx_uninit_bulk(dev); 1361 cx231xx_uninit_bulk(dev);
1359 dev->state |= DEV_DISCONNECTED;
1360 wake_up_interruptible(&dev->wait_frame); 1362 wake_up_interruptible(&dev->wait_frame);
1361 wake_up_interruptible(&dev->wait_stream); 1363 wake_up_interruptible(&dev->wait_stream);
1362 } else { 1364 } else {
1363 dev->state |= DEV_DISCONNECTED;
1364 cx231xx_release_resources(dev);
1365 } 1365 }
1366 1366
1367 cx231xx_close_extension(dev); 1367 cx231xx_close_extension(dev);
1368 1368
1369 mutex_unlock(&dev->lock); 1369 mutex_unlock(&dev->lock);
1370 1370
1371 if (!dev->users) { 1371 if (!dev->users)
1372 kfree(dev->video_mode.alt_max_pkt_size); 1372 cx231xx_release_resources(dev);
1373 kfree(dev->vbi_mode.alt_max_pkt_size);
1374 kfree(dev->sliced_cc_mode.alt_max_pkt_size);
1375 kfree(dev->ts1_mode.alt_max_pkt_size);
1376 kfree(dev);
1377 dev = NULL;
1378 }
1379} 1373}
1380 1374
1381static struct usb_driver cx231xx_usb_driver = { 1375static struct usb_driver cx231xx_usb_driver = {
diff --git a/drivers/media/video/cx231xx/cx231xx-core.c b/drivers/media/video/cx231xx/cx231xx-core.c
index d4457f9488e..08dd930f882 100644
--- a/drivers/media/video/cx231xx/cx231xx-core.c
+++ b/drivers/media/video/cx231xx/cx231xx-core.c
@@ -166,6 +166,9 @@ int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
166 u8 _i2c_nostop = 0; 166 u8 _i2c_nostop = 0;
167 u8 _i2c_reserve = 0; 167 u8 _i2c_reserve = 0;
168 168
169 if (dev->state & DEV_DISCONNECTED)
170 return -ENODEV;
171
169 /* Get the I2C period, nostop and reserve parameters */ 172 /* Get the I2C period, nostop and reserve parameters */
170 _i2c_period = i2c_bus->i2c_period; 173 _i2c_period = i2c_bus->i2c_period;
171 _i2c_nostop = i2c_bus->i2c_nostop; 174 _i2c_nostop = i2c_bus->i2c_nostop;
@@ -1071,7 +1074,7 @@ int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
1071 sb_size, cx231xx_isoc_irq_callback, dma_q, 1); 1074 sb_size, cx231xx_isoc_irq_callback, dma_q, 1);
1072 1075
1073 urb->number_of_packets = max_packets; 1076 urb->number_of_packets = max_packets;
1074 urb->transfer_flags = URB_ISO_ASAP; 1077 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1075 1078
1076 k = 0; 1079 k = 0;
1077 for (j = 0; j < max_packets; j++) { 1080 for (j = 0; j < max_packets; j++) {
@@ -1182,7 +1185,7 @@ int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
1182 return -ENOMEM; 1185 return -ENOMEM;
1183 } 1186 }
1184 dev->video_mode.bulk_ctl.urb[i] = urb; 1187 dev->video_mode.bulk_ctl.urb[i] = urb;
1185 urb->transfer_flags = 0; 1188 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
1186 1189
1187 dev->video_mode.bulk_ctl.transfer_buffer[i] = 1190 dev->video_mode.bulk_ctl.transfer_buffer[i] =
1188 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, 1191 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
diff --git a/drivers/media/video/cx231xx/cx231xx-dvb.c b/drivers/media/video/cx231xx/cx231xx-dvb.c
index da9a4a0aab7..7c4e360ba9b 100644
--- a/drivers/media/video/cx231xx/cx231xx-dvb.c
+++ b/drivers/media/video/cx231xx/cx231xx-dvb.c
@@ -196,7 +196,7 @@ static inline int dvb_isoc_copy(struct cx231xx *dev, struct urb *urb)
196 if (!dev) 196 if (!dev)
197 return 0; 197 return 0;
198 198
199 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) 199 if (dev->state & DEV_DISCONNECTED)
200 return 0; 200 return 0;
201 201
202 if (urb->status < 0) { 202 if (urb->status < 0) {
@@ -228,7 +228,7 @@ static inline int dvb_bulk_copy(struct cx231xx *dev, struct urb *urb)
228 if (!dev) 228 if (!dev)
229 return 0; 229 return 0;
230 230
231 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) 231 if (dev->state & DEV_DISCONNECTED)
232 return 0; 232 return 0;
233 233
234 if (urb->status < 0) { 234 if (urb->status < 0) {
diff --git a/drivers/media/video/cx231xx/cx231xx-input.c b/drivers/media/video/cx231xx/cx231xx-input.c
index 45e14cac462..96176e9db5a 100644
--- a/drivers/media/video/cx231xx/cx231xx-input.c
+++ b/drivers/media/video/cx231xx/cx231xx-input.c
@@ -27,12 +27,16 @@
27static int get_key_isdbt(struct IR_i2c *ir, u32 *ir_key, 27static int get_key_isdbt(struct IR_i2c *ir, u32 *ir_key,
28 u32 *ir_raw) 28 u32 *ir_raw)
29{ 29{
30 int rc;
30 u8 cmd, scancode; 31 u8 cmd, scancode;
31 32
32 dev_dbg(&ir->rc->input_dev->dev, "%s\n", __func__); 33 dev_dbg(&ir->rc->input_dev->dev, "%s\n", __func__);
33 34
34 /* poll IR chip */ 35 /* poll IR chip */
35 if (1 != i2c_master_recv(ir->c, &cmd, 1)) 36 rc = i2c_master_recv(ir->c, &cmd, 1);
37 if (rc < 0)
38 return rc;
39 if (rc != 1)
36 return -EIO; 40 return -EIO;
37 41
38 /* it seems that 0xFE indicates that a button is still hold 42 /* it seems that 0xFE indicates that a button is still hold
@@ -102,11 +106,14 @@ int cx231xx_ir_init(struct cx231xx *dev)
102 ir_i2c_bus = cx231xx_boards[dev->model].ir_i2c_master; 106 ir_i2c_bus = cx231xx_boards[dev->model].ir_i2c_master;
103 dev_dbg(&dev->udev->dev, "Trying to bind ir at bus %d, addr 0x%02x\n", 107 dev_dbg(&dev->udev->dev, "Trying to bind ir at bus %d, addr 0x%02x\n",
104 ir_i2c_bus, info.addr); 108 ir_i2c_bus, info.addr);
105 i2c_new_device(&dev->i2c_bus[ir_i2c_bus].i2c_adap, &info); 109 dev->ir_i2c_client = i2c_new_device(&dev->i2c_bus[ir_i2c_bus].i2c_adap, &info);
106 110
107 return 0; 111 return 0;
108} 112}
109 113
110void cx231xx_ir_exit(struct cx231xx *dev) 114void cx231xx_ir_exit(struct cx231xx *dev)
111{ 115{
116 if (dev->ir_i2c_client)
117 i2c_unregister_device(dev->ir_i2c_client);
118 dev->ir_i2c_client = NULL;
112} 119}
diff --git a/drivers/media/video/cx231xx/cx231xx-vbi.c b/drivers/media/video/cx231xx/cx231xx-vbi.c
index 1c7a4daafec..8cdee5f78f1 100644
--- a/drivers/media/video/cx231xx/cx231xx-vbi.c
+++ b/drivers/media/video/cx231xx/cx231xx-vbi.c
@@ -93,7 +93,7 @@ static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)
93 if (!dev) 93 if (!dev)
94 return 0; 94 return 0;
95 95
96 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) 96 if (dev->state & DEV_DISCONNECTED)
97 return 0; 97 return 0;
98 98
99 if (urb->status < 0) { 99 if (urb->status < 0) {
@@ -452,7 +452,7 @@ int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
452 return -ENOMEM; 452 return -ENOMEM;
453 } 453 }
454 dev->vbi_mode.bulk_ctl.urb[i] = urb; 454 dev->vbi_mode.bulk_ctl.urb[i] = urb;
455 urb->transfer_flags = 0; 455 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
456 456
457 dev->vbi_mode.bulk_ctl.transfer_buffer[i] = 457 dev->vbi_mode.bulk_ctl.transfer_buffer[i] =
458 kzalloc(sb_size, GFP_KERNEL); 458 kzalloc(sb_size, GFP_KERNEL);
diff --git a/drivers/media/video/cx231xx/cx231xx-video.c b/drivers/media/video/cx231xx/cx231xx-video.c
index 6e81f970dc7..829a41b0c9e 100644
--- a/drivers/media/video/cx231xx/cx231xx-video.c
+++ b/drivers/media/video/cx231xx/cx231xx-video.c
@@ -337,7 +337,7 @@ static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)
337 if (!dev) 337 if (!dev)
338 return 0; 338 return 0;
339 339
340 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) 340 if (dev->state & DEV_DISCONNECTED)
341 return 0; 341 return 0;
342 342
343 if (urb->status < 0) { 343 if (urb->status < 0) {
@@ -440,7 +440,7 @@ static inline int cx231xx_bulk_copy(struct cx231xx *dev, struct urb *urb)
440 if (!dev) 440 if (!dev)
441 return 0; 441 return 0;
442 442
443 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) 443 if (dev->state & DEV_DISCONNECTED)
444 return 0; 444 return 0;
445 445
446 if (urb->status < 0) { 446 if (urb->status < 0) {
@@ -1000,12 +1000,6 @@ static int check_dev(struct cx231xx *dev)
1000 cx231xx_errdev("v4l2 ioctl: device not present\n"); 1000 cx231xx_errdev("v4l2 ioctl: device not present\n");
1001 return -ENODEV; 1001 return -ENODEV;
1002 } 1002 }
1003
1004 if (dev->state & DEV_MISCONFIGURED) {
1005 cx231xx_errdev("v4l2 ioctl: device is misconfigured; "
1006 "close and open it again\n");
1007 return -EIO;
1008 }
1009 return 0; 1003 return 0;
1010} 1004}
1011 1005
@@ -2347,7 +2341,8 @@ static int cx231xx_v4l2_close(struct file *filp)
2347 return 0; 2341 return 0;
2348 } 2342 }
2349 2343
2350 if (dev->users == 1) { 2344 dev->users--;
2345 if (!dev->users) {
2351 videobuf_stop(&fh->vb_vidq); 2346 videobuf_stop(&fh->vb_vidq);
2352 videobuf_mmap_free(&fh->vb_vidq); 2347 videobuf_mmap_free(&fh->vb_vidq);
2353 2348
@@ -2374,7 +2369,6 @@ static int cx231xx_v4l2_close(struct file *filp)
2374 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); 2369 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
2375 } 2370 }
2376 kfree(fh); 2371 kfree(fh);
2377 dev->users--;
2378 wake_up_interruptible_nr(&dev->open, 1); 2372 wake_up_interruptible_nr(&dev->open, 1);
2379 return 0; 2373 return 0;
2380} 2374}
diff --git a/drivers/media/video/cx231xx/cx231xx.h b/drivers/media/video/cx231xx/cx231xx.h
index 2000bc64c49..e17447554a0 100644
--- a/drivers/media/video/cx231xx/cx231xx.h
+++ b/drivers/media/video/cx231xx/cx231xx.h
@@ -377,7 +377,6 @@ struct cx231xx_board {
377enum cx231xx_dev_state { 377enum cx231xx_dev_state {
378 DEV_INITIALIZED = 0x01, 378 DEV_INITIALIZED = 0x01,
379 DEV_DISCONNECTED = 0x02, 379 DEV_DISCONNECTED = 0x02,
380 DEV_MISCONFIGURED = 0x04,
381}; 380};
382 381
383enum AFE_MODE { 382enum AFE_MODE {
@@ -621,6 +620,7 @@ struct cx231xx {
621 620
622 /* For I2C IR support */ 621 /* For I2C IR support */
623 struct IR_i2c_init_data init_data; 622 struct IR_i2c_init_data init_data;
623 struct i2c_client *ir_i2c_client;
624 624
625 unsigned int stream_on:1; /* Locks streams */ 625 unsigned int stream_on:1; /* Locks streams */
626 unsigned int vbi_stream_on:1; /* Locks streams for VBI */ 626 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
diff --git a/drivers/media/video/cx23885/cx23885-417.c b/drivers/media/video/cx23885/cx23885-417.c
index 67c4a59bd88..f5c79e53e5a 100644
--- a/drivers/media/video/cx23885/cx23885-417.c
+++ b/drivers/media/video/cx23885/cx23885-417.c
@@ -900,6 +900,7 @@ static int cx23885_load_firmware(struct cx23885_dev *dev)
900 int i, retval = 0; 900 int i, retval = 0;
901 u32 value = 0; 901 u32 value = 0;
902 u32 gpio_output = 0; 902 u32 gpio_output = 0;
903 u32 gpio_value;
903 u32 checksum = 0; 904 u32 checksum = 0;
904 u32 *dataptr; 905 u32 *dataptr;
905 906
@@ -907,7 +908,7 @@ static int cx23885_load_firmware(struct cx23885_dev *dev)
907 908
908 /* Save GPIO settings before reset of APU */ 909 /* Save GPIO settings before reset of APU */
909 retval |= mc417_memory_read(dev, 0x9020, &gpio_output); 910 retval |= mc417_memory_read(dev, 0x9020, &gpio_output);
910 retval |= mc417_memory_read(dev, 0x900C, &value); 911 retval |= mc417_memory_read(dev, 0x900C, &gpio_value);
911 912
912 retval = mc417_register_write(dev, 913 retval = mc417_register_write(dev,
913 IVTV_REG_VPU, 0xFFFFFFED); 914 IVTV_REG_VPU, 0xFFFFFFED);
@@ -991,11 +992,18 @@ static int cx23885_load_firmware(struct cx23885_dev *dev)
991 992
992 /* F/W power up disturbs the GPIOs, restore state */ 993 /* F/W power up disturbs the GPIOs, restore state */
993 retval |= mc417_register_write(dev, 0x9020, gpio_output); 994 retval |= mc417_register_write(dev, 0x9020, gpio_output);
994 retval |= mc417_register_write(dev, 0x900C, value); 995 retval |= mc417_register_write(dev, 0x900C, gpio_value);
995 996
996 retval |= mc417_register_read(dev, IVTV_REG_VPU, &value); 997 retval |= mc417_register_read(dev, IVTV_REG_VPU, &value);
997 retval |= mc417_register_write(dev, IVTV_REG_VPU, value & 0xFFFFFFE8); 998 retval |= mc417_register_write(dev, IVTV_REG_VPU, value & 0xFFFFFFE8);
998 999
1000 /* Hardcoded GPIO's here */
1001 retval |= mc417_register_write(dev, 0x9020, 0x4000);
1002 retval |= mc417_register_write(dev, 0x900C, 0x4000);
1003
1004 mc417_register_read(dev, 0x9020, &gpio_output);
1005 mc417_register_read(dev, 0x900C, &gpio_value);
1006
999 if (retval < 0) 1007 if (retval < 0)
1000 printk(KERN_ERR "%s: Error with mc417_register_write\n", 1008 printk(KERN_ERR "%s: Error with mc417_register_write\n",
1001 __func__); 1009 __func__);
@@ -1015,6 +1023,12 @@ static void cx23885_codec_settings(struct cx23885_dev *dev)
1015{ 1023{
1016 dprintk(1, "%s()\n", __func__); 1024 dprintk(1, "%s()\n", __func__);
1017 1025
1026 /* Dynamically change the height based on video standard */
1027 if (dev->encodernorm.id & V4L2_STD_525_60)
1028 dev->ts1.height = 480;
1029 else
1030 dev->ts1.height = 576;
1031
1018 /* assign frame size */ 1032 /* assign frame size */
1019 cx23885_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0, 1033 cx23885_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0,
1020 dev->ts1.height, dev->ts1.width); 1034 dev->ts1.height, dev->ts1.width);
@@ -1030,7 +1044,7 @@ static void cx23885_codec_settings(struct cx23885_dev *dev)
1030 cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1); 1044 cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1);
1031} 1045}
1032 1046
1033static int cx23885_initialize_codec(struct cx23885_dev *dev) 1047static int cx23885_initialize_codec(struct cx23885_dev *dev, int startencoder)
1034{ 1048{
1035 int version; 1049 int version;
1036 int retval; 1050 int retval;
@@ -1112,9 +1126,11 @@ static int cx23885_initialize_codec(struct cx23885_dev *dev)
1112 mc417_memory_write(dev, 2120, 0x00000080); 1126 mc417_memory_write(dev, 2120, 0x00000080);
1113 1127
1114 /* start capturing to the host interface */ 1128 /* start capturing to the host interface */
1115 cx23885_api_cmd(dev, CX2341X_ENC_START_CAPTURE, 2, 0, 1129 if (startencoder) {
1116 CX23885_MPEG_CAPTURE, CX23885_RAW_BITS_NONE); 1130 cx23885_api_cmd(dev, CX2341X_ENC_START_CAPTURE, 2, 0,
1117 msleep(10); 1131 CX23885_MPEG_CAPTURE, CX23885_RAW_BITS_NONE);
1132 msleep(10);
1133 }
1118 1134
1119 return 0; 1135 return 0;
1120} 1136}
@@ -1196,6 +1212,16 @@ static int cx23885_querymenu(struct cx23885_dev *dev,
1196 cx2341x_ctrl_get_menu(&dev->mpeg_params, qmenu->id)); 1212 cx2341x_ctrl_get_menu(&dev->mpeg_params, qmenu->id));
1197} 1213}
1198 1214
1215static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1216{
1217 struct cx23885_fh *fh = file->private_data;
1218 struct cx23885_dev *dev = fh->dev;
1219
1220 call_all(dev, core, g_std, id);
1221
1222 return 0;
1223}
1224
1199static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *id) 1225static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *id)
1200{ 1226{
1201 struct cx23885_fh *fh = file->private_data; 1227 struct cx23885_fh *fh = file->private_data;
@@ -1208,55 +1234,31 @@ static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *id)
1208 if (i == ARRAY_SIZE(cx23885_tvnorms)) 1234 if (i == ARRAY_SIZE(cx23885_tvnorms))
1209 return -EINVAL; 1235 return -EINVAL;
1210 dev->encodernorm = cx23885_tvnorms[i]; 1236 dev->encodernorm = cx23885_tvnorms[i];
1237
1238 /* Have the drier core notify the subdevices */
1239 mutex_lock(&dev->lock);
1240 cx23885_set_tvnorm(dev, *id);
1241 mutex_unlock(&dev->lock);
1242
1211 return 0; 1243 return 0;
1212} 1244}
1213 1245
1214static int vidioc_enum_input(struct file *file, void *priv, 1246static int vidioc_enum_input(struct file *file, void *priv,
1215 struct v4l2_input *i) 1247 struct v4l2_input *i)
1216{ 1248{
1217 struct cx23885_fh *fh = file->private_data; 1249 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1218 struct cx23885_dev *dev = fh->dev; 1250 dprintk(1, "%s()\n", __func__);
1219 struct cx23885_input *input; 1251 return cx23885_enum_input(dev, i);
1220 int n;
1221
1222 if (i->index >= 4)
1223 return -EINVAL;
1224
1225 input = &cx23885_boards[dev->board].input[i->index];
1226
1227 if (input->type == 0)
1228 return -EINVAL;
1229
1230 /* FIXME
1231 * strcpy(i->name, input->name); */
1232 strcpy(i->name, "unset");
1233
1234 if (input->type == CX23885_VMUX_TELEVISION ||
1235 input->type == CX23885_VMUX_CABLE)
1236 i->type = V4L2_INPUT_TYPE_TUNER;
1237 else
1238 i->type = V4L2_INPUT_TYPE_CAMERA;
1239
1240 for (n = 0; n < ARRAY_SIZE(cx23885_tvnorms); n++)
1241 i->std |= cx23885_tvnorms[n].id;
1242 return 0;
1243} 1252}
1244 1253
1245static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) 1254static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1246{ 1255{
1247 struct cx23885_fh *fh = file->private_data; 1256 return cx23885_get_input(file, priv, i);
1248 struct cx23885_dev *dev = fh->dev;
1249
1250 *i = dev->input;
1251 return 0;
1252} 1257}
1253 1258
1254static int vidioc_s_input(struct file *file, void *priv, unsigned int i) 1259static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1255{ 1260{
1256 if (i >= 4) 1261 return cx23885_set_input(file, priv, i);
1257 return -EINVAL;
1258
1259 return 0;
1260} 1262}
1261 1263
1262static int vidioc_g_tuner(struct file *file, void *priv, 1264static int vidioc_g_tuner(struct file *file, void *priv,
@@ -1309,43 +1311,25 @@ static int vidioc_g_frequency(struct file *file, void *priv,
1309} 1311}
1310 1312
1311static int vidioc_s_frequency(struct file *file, void *priv, 1313static int vidioc_s_frequency(struct file *file, void *priv,
1312 struct v4l2_frequency *f) 1314 struct v4l2_frequency *f)
1313{ 1315{
1314 struct cx23885_fh *fh = file->private_data; 1316 return cx23885_set_frequency(file, priv, f);
1315 struct cx23885_dev *dev = fh->dev; 1317}
1316
1317 cx23885_api_cmd(fh->dev, CX2341X_ENC_STOP_CAPTURE, 3, 0,
1318 CX23885_END_NOW, CX23885_MPEG_CAPTURE,
1319 CX23885_RAW_BITS_NONE);
1320
1321 dprintk(1, "VIDIOC_S_FREQUENCY: dev type %d, f\n",
1322 dev->tuner_type);
1323 dprintk(1, "VIDIOC_S_FREQUENCY: f tuner %d, f type %d\n",
1324 f->tuner, f->type);
1325 if (UNSET == dev->tuner_type)
1326 return -EINVAL;
1327 if (f->tuner != 0)
1328 return -EINVAL;
1329 if (f->type != V4L2_TUNER_ANALOG_TV)
1330 return -EINVAL;
1331 dev->freq = f->frequency;
1332
1333 call_all(dev, tuner, s_frequency, f);
1334 1318
1335 cx23885_initialize_codec(dev); 1319static int vidioc_g_ctrl(struct file *file, void *priv,
1320 struct v4l2_control *ctl)
1321{
1322 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1336 1323
1337 return 0; 1324 return cx23885_get_control(dev, ctl);
1338} 1325}
1339 1326
1340static int vidioc_s_ctrl(struct file *file, void *priv, 1327static int vidioc_s_ctrl(struct file *file, void *priv,
1341 struct v4l2_control *ctl) 1328 struct v4l2_control *ctl)
1342{ 1329{
1343 struct cx23885_fh *fh = file->private_data; 1330 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1344 struct cx23885_dev *dev = fh->dev;
1345 1331
1346 /* Update the A/V core */ 1332 return cx23885_set_control(dev, ctl);
1347 call_all(dev, core, s_ctrl, ctl);
1348 return 0;
1349} 1333}
1350 1334
1351static int vidioc_querycap(struct file *file, void *priv, 1335static int vidioc_querycap(struct file *file, void *priv,
@@ -1636,7 +1620,7 @@ static ssize_t mpeg_read(struct file *file, char __user *data,
1636 /* Start mpeg encoder on first read. */ 1620 /* Start mpeg encoder on first read. */
1637 if (atomic_cmpxchg(&fh->v4l_reading, 0, 1) == 0) { 1621 if (atomic_cmpxchg(&fh->v4l_reading, 0, 1) == 0) {
1638 if (atomic_inc_return(&dev->v4l_reader_count) == 1) { 1622 if (atomic_inc_return(&dev->v4l_reader_count) == 1) {
1639 if (cx23885_initialize_codec(dev) < 0) 1623 if (cx23885_initialize_codec(dev, 1) < 0)
1640 return -EINVAL; 1624 return -EINVAL;
1641 } 1625 }
1642 } 1626 }
@@ -1677,6 +1661,8 @@ static struct v4l2_file_operations mpeg_fops = {
1677}; 1661};
1678 1662
1679static const struct v4l2_ioctl_ops mpeg_ioctl_ops = { 1663static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
1664 .vidioc_querystd = vidioc_g_std,
1665 .vidioc_g_std = vidioc_g_std,
1680 .vidioc_s_std = vidioc_s_std, 1666 .vidioc_s_std = vidioc_s_std,
1681 .vidioc_enum_input = vidioc_enum_input, 1667 .vidioc_enum_input = vidioc_enum_input,
1682 .vidioc_g_input = vidioc_g_input, 1668 .vidioc_g_input = vidioc_g_input,
@@ -1686,6 +1672,7 @@ static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
1686 .vidioc_g_frequency = vidioc_g_frequency, 1672 .vidioc_g_frequency = vidioc_g_frequency,
1687 .vidioc_s_frequency = vidioc_s_frequency, 1673 .vidioc_s_frequency = vidioc_s_frequency,
1688 .vidioc_s_ctrl = vidioc_s_ctrl, 1674 .vidioc_s_ctrl = vidioc_s_ctrl,
1675 .vidioc_g_ctrl = vidioc_g_ctrl,
1689 .vidioc_querycap = vidioc_querycap, 1676 .vidioc_querycap = vidioc_querycap,
1690 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, 1677 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1691 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, 1678 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
@@ -1746,8 +1733,8 @@ static struct video_device *cx23885_video_dev_alloc(
1746 if (NULL == vfd) 1733 if (NULL == vfd)
1747 return NULL; 1734 return NULL;
1748 *vfd = *template; 1735 *vfd = *template;
1749 snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", dev->name, 1736 snprintf(vfd->name, sizeof(vfd->name), "%s (%s)",
1750 type, cx23885_boards[tsport->dev->board].name); 1737 cx23885_boards[tsport->dev->board].name, type);
1751 vfd->parent = &pci->dev; 1738 vfd->parent = &pci->dev;
1752 vfd->release = video_device_release; 1739 vfd->release = video_device_release;
1753 return vfd; 1740 return vfd;
@@ -1791,5 +1778,11 @@ int cx23885_417_register(struct cx23885_dev *dev)
1791 printk(KERN_INFO "%s: registered device %s [mpeg]\n", 1778 printk(KERN_INFO "%s: registered device %s [mpeg]\n",
1792 dev->name, video_device_node_name(dev->v4l_device)); 1779 dev->name, video_device_node_name(dev->v4l_device));
1793 1780
1781 /* ST: Configure the encoder paramaters, but don't begin
1782 * encoding, this resolves an issue where the first time the
1783 * encoder is started video can be choppy.
1784 */
1785 cx23885_initialize_codec(dev, 0);
1786
1794 return 0; 1787 return 0;
1795} 1788}
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c
index c3cf08945e4..3c01be999e3 100644
--- a/drivers/media/video/cx23885/cx23885-cards.c
+++ b/drivers/media/video/cx23885/cx23885-cards.c
@@ -335,8 +335,33 @@ struct cx23885_board cx23885_boards[] = {
335 }, 335 },
336 [CX23885_BOARD_HAUPPAUGE_HVR1850] = { 336 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
337 .name = "Hauppauge WinTV-HVR1850", 337 .name = "Hauppauge WinTV-HVR1850",
338 .porta = CX23885_ANALOG_VIDEO,
338 .portb = CX23885_MPEG_ENCODER, 339 .portb = CX23885_MPEG_ENCODER,
339 .portc = CX23885_MPEG_DVB, 340 .portc = CX23885_MPEG_DVB,
341 .tuner_type = TUNER_ABSENT,
342 .tuner_addr = 0x42, /* 0x84 >> 1 */
343 .force_bff = 1,
344 .input = {{
345 .type = CX23885_VMUX_TELEVISION,
346 .vmux = CX25840_VIN7_CH3 |
347 CX25840_VIN5_CH2 |
348 CX25840_VIN2_CH1 |
349 CX25840_DIF_ON,
350 .amux = CX25840_AUDIO8,
351 }, {
352 .type = CX23885_VMUX_COMPOSITE1,
353 .vmux = CX25840_VIN7_CH3 |
354 CX25840_VIN4_CH2 |
355 CX25840_VIN6_CH1,
356 .amux = CX25840_AUDIO7,
357 }, {
358 .type = CX23885_VMUX_SVIDEO,
359 .vmux = CX25840_VIN7_CH3 |
360 CX25840_VIN4_CH2 |
361 CX25840_VIN8_CH1 |
362 CX25840_SVIDEO_ON,
363 .amux = CX25840_AUDIO7,
364 } },
340 }, 365 },
341 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = { 366 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
342 .name = "Compro VideoMate E800", 367 .name = "Compro VideoMate E800",
@@ -438,6 +463,41 @@ struct cx23885_board cx23885_boards[] = {
438 .gpio0 = 0, 463 .gpio0 = 0,
439 } }, 464 } },
440 }, 465 },
466 [CX23885_BOARD_MYGICA_X8507] = {
467 .name = "Mygica X8507",
468 .tuner_type = TUNER_XC5000,
469 .tuner_addr = 0x61,
470 .tuner_bus = 1,
471 .porta = CX23885_ANALOG_VIDEO,
472 .input = {
473 {
474 .type = CX23885_VMUX_TELEVISION,
475 .vmux = CX25840_COMPOSITE2,
476 .amux = CX25840_AUDIO8,
477 },
478 {
479 .type = CX23885_VMUX_COMPOSITE1,
480 .vmux = CX25840_COMPOSITE8,
481 },
482 {
483 .type = CX23885_VMUX_SVIDEO,
484 .vmux = CX25840_SVIDEO_LUMA3 |
485 CX25840_SVIDEO_CHROMA4,
486 },
487 {
488 .type = CX23885_VMUX_COMPONENT,
489 .vmux = CX25840_COMPONENT_ON |
490 CX25840_VIN1_CH1 |
491 CX25840_VIN6_CH2 |
492 CX25840_VIN7_CH3,
493 },
494 },
495 },
496 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
497 .name = "TerraTec Cinergy T PCIe Dual",
498 .portb = CX23885_MPEG_DVB,
499 .portc = CX23885_MPEG_DVB,
500 }
441}; 501};
442const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 502const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
443 503
@@ -637,6 +697,14 @@ struct cx23885_subid cx23885_subids[] = {
637 .subvendor = 0x1b55, 697 .subvendor = 0x1b55,
638 .subdevice = 0xe2e4, 698 .subdevice = 0xe2e4,
639 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF, 699 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
700 }, {
701 .subvendor = 0x14f1,
702 .subdevice = 0x8502,
703 .card = CX23885_BOARD_MYGICA_X8507,
704 }, {
705 .subvendor = 0x153b,
706 .subdevice = 0x117e,
707 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
640 }, 708 },
641}; 709};
642const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 710const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
@@ -1068,6 +1136,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev)
1068 break; 1136 break;
1069 case CX23885_BOARD_MYGICA_X8506: 1137 case CX23885_BOARD_MYGICA_X8506:
1070 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1138 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1139 case CX23885_BOARD_MYGICA_X8507:
1071 /* GPIO-0 (0)Analog / (1)Digital TV */ 1140 /* GPIO-0 (0)Analog / (1)Digital TV */
1072 /* GPIO-1 reset XC5000 */ 1141 /* GPIO-1 reset XC5000 */
1073 /* GPIO-2 reset LGS8GL5 / LGS8G75 */ 1142 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
@@ -1367,6 +1436,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1367 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1436 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1368 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1437 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1369 break; 1438 break;
1439 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1370 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1440 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1371 /* Defaults for VID B - Analog encoder */ 1441 /* Defaults for VID B - Analog encoder */
1372 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 1442 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
@@ -1377,6 +1447,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1377 /* APB_TSVALERR_POL (active low)*/ 1447 /* APB_TSVALERR_POL (active low)*/
1378 ts1->vld_misc_val = 0x2000; 1448 ts1->vld_misc_val = 0x2000;
1379 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); 1449 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1450 cx_write(0x130184, 0xc);
1380 1451
1381 /* Defaults for VID C */ 1452 /* Defaults for VID C */
1382 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1453 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
@@ -1396,6 +1467,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1396 break; 1467 break;
1397 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1468 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1398 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1469 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1470 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1399 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1471 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1400 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1472 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1401 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1473 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
@@ -1431,7 +1503,6 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1431 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1503 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1432 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1504 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1433 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1505 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1434 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1435 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1506 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1436 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1507 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1437 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1508 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
@@ -1468,6 +1539,8 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1468 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1539 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1469 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1540 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1470 case CX23885_BOARD_MPX885: 1541 case CX23885_BOARD_MPX885:
1542 case CX23885_BOARD_MYGICA_X8507:
1543 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1471 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 1544 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1472 &dev->i2c_bus[2].i2c_adap, 1545 &dev->i2c_bus[2].i2c_adap,
1473 "cx25840", 0x88 >> 1, NULL); 1546 "cx25840", 0x88 >> 1, NULL);
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
index 40e68b22015..6ad227029a0 100644
--- a/drivers/media/video/cx23885/cx23885-core.c
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -206,12 +206,12 @@ static struct sram_channel cx23887_sram_channels[] = {
206 .cnt2_reg = DMA1_CNT2, 206 .cnt2_reg = DMA1_CNT2,
207 }, 207 },
208 [SRAM_CH02] = { 208 [SRAM_CH02] = {
209 .name = "ch2", 209 .name = "VID A (VBI)",
210 .cmds_start = 0x0, 210 .cmds_start = 0x10050,
211 .ctrl_start = 0x0, 211 .ctrl_start = 0x105F0,
212 .cdt = 0x0, 212 .cdt = 0x10810,
213 .fifo_start = 0x0, 213 .fifo_start = 0x3000,
214 .fifo_size = 0x0, 214 .fifo_size = 0x1000,
215 .ptr1_reg = DMA2_PTR1, 215 .ptr1_reg = DMA2_PTR1,
216 .ptr2_reg = DMA2_PTR2, 216 .ptr2_reg = DMA2_PTR2,
217 .cnt1_reg = DMA2_CNT1, 217 .cnt1_reg = DMA2_CNT1,
@@ -266,12 +266,12 @@ static struct sram_channel cx23887_sram_channels[] = {
266 .cnt2_reg = DMA5_CNT2, 266 .cnt2_reg = DMA5_CNT2,
267 }, 267 },
268 [SRAM_CH07] = { 268 [SRAM_CH07] = {
269 .name = "ch7", 269 .name = "TV Audio",
270 .cmds_start = 0x0, 270 .cmds_start = 0x10190,
271 .ctrl_start = 0x0, 271 .ctrl_start = 0x106B0,
272 .cdt = 0x0, 272 .cdt = 0x10930,
273 .fifo_start = 0x0, 273 .fifo_start = 0x7000,
274 .fifo_size = 0x0, 274 .fifo_size = 0x1000,
275 .ptr1_reg = DMA6_PTR1, 275 .ptr1_reg = DMA6_PTR1,
276 .ptr2_reg = DMA6_PTR2, 276 .ptr2_reg = DMA6_PTR2,
277 .cnt1_reg = DMA6_CNT1, 277 .cnt1_reg = DMA6_CNT1,
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c
index bcb45be44bb..af8a225763d 100644
--- a/drivers/media/video/cx23885/cx23885-dvb.c
+++ b/drivers/media/video/cx23885/cx23885-dvb.c
@@ -61,6 +61,8 @@
61#include "cx23885-f300.h" 61#include "cx23885-f300.h"
62#include "altera-ci.h" 62#include "altera-ci.h"
63#include "stv0367.h" 63#include "stv0367.h"
64#include "drxk.h"
65#include "mt2063.h"
64 66
65static unsigned int debug; 67static unsigned int debug;
66 68
@@ -111,6 +113,8 @@ static void dvb_buf_release(struct videobuf_queue *q,
111 cx23885_free_buffer(q, (struct cx23885_buffer *)vb); 113 cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
112} 114}
113 115
116static int cx23885_dvb_set_frontend(struct dvb_frontend *fe);
117
114static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open) 118static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
115{ 119{
116 struct videobuf_dvb_frontends *f; 120 struct videobuf_dvb_frontends *f;
@@ -125,6 +129,12 @@ static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
125 129
126 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) 130 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
127 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); 131 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
132
133 /*
134 * FIXME: Improve this path to avoid calling the
135 * cx23885_dvb_set_frontend() every time it passes here.
136 */
137 cx23885_dvb_set_frontend(fe->dvb.frontend);
128} 138}
129 139
130static struct videobuf_queue_ops dvb_qops = { 140static struct videobuf_queue_ops dvb_qops = {
@@ -479,15 +489,15 @@ static struct xc5000_config mygica_x8506_xc5000_config = {
479 .if_khz = 5380, 489 .if_khz = 5380,
480}; 490};
481 491
482static int cx23885_dvb_set_frontend(struct dvb_frontend *fe, 492static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
483 struct dvb_frontend_parameters *param)
484{ 493{
494 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
485 struct cx23885_tsport *port = fe->dvb->priv; 495 struct cx23885_tsport *port = fe->dvb->priv;
486 struct cx23885_dev *dev = port->dev; 496 struct cx23885_dev *dev = port->dev;
487 497
488 switch (dev->board) { 498 switch (dev->board) {
489 case CX23885_BOARD_HAUPPAUGE_HVR1275: 499 case CX23885_BOARD_HAUPPAUGE_HVR1275:
490 switch (param->u.vsb.modulation) { 500 switch (p->modulation) {
491 case VSB_8: 501 case VSB_8:
492 cx23885_gpio_clear(dev, GPIO_5); 502 cx23885_gpio_clear(dev, GPIO_5);
493 break; 503 break;
@@ -507,31 +517,6 @@ static int cx23885_dvb_set_frontend(struct dvb_frontend *fe,
507 return 0; 517 return 0;
508} 518}
509 519
510static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend *fe,
511 unsigned int cmd, void *parg,
512 unsigned int stage)
513{
514 int err = 0;
515
516 switch (stage) {
517 case DVB_FE_IOCTL_PRE:
518
519 switch (cmd) {
520 case FE_SET_FRONTEND:
521 err = cx23885_dvb_set_frontend(fe,
522 (struct dvb_frontend_parameters *) parg);
523 break;
524 }
525 break;
526
527 case DVB_FE_IOCTL_POST:
528 /* no post-ioctl handling required */
529 break;
530 }
531 return err;
532};
533
534
535static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = { 520static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
536 .prod = LGS8GXX_PROD_LGS8G75, 521 .prod = LGS8GXX_PROD_LGS8G75,
537 .demod_address = 0x19, 522 .demod_address = 0x19,
@@ -617,6 +602,24 @@ static struct xc5000_config netup_xc5000_config[] = {
617 }, 602 },
618}; 603};
619 604
605static struct drxk_config terratec_drxk_config[] = {
606 {
607 .adr = 0x29,
608 .no_i2c_bridge = 1,
609 }, {
610 .adr = 0x2a,
611 .no_i2c_bridge = 1,
612 },
613};
614
615static struct mt2063_config terratec_mt2063_config[] = {
616 {
617 .tuner_address = 0x60,
618 }, {
619 .tuner_address = 0x67,
620 },
621};
622
620int netup_altera_fpga_rw(void *device, int flag, int data, int read) 623int netup_altera_fpga_rw(void *device, int flag, int data, int read)
621{ 624{
622 struct cx23885_dev *dev = (struct cx23885_dev *)device; 625 struct cx23885_dev *dev = (struct cx23885_dev *)device;
@@ -1043,6 +1046,20 @@ static int dvb_register(struct cx23885_tsport *port)
1043 } 1046 }
1044 break; 1047 break;
1045 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1048 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1049 i2c_bus = &dev->i2c_bus[0];
1050 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1051 &hcw_s5h1411_config,
1052 &i2c_bus->i2c_adap);
1053 if (fe0->dvb.frontend != NULL)
1054 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1055 0x60, &dev->i2c_bus[0].i2c_adap,
1056 &hauppauge_tda18271_config);
1057
1058 tda18271_attach(&dev->ts1.analog_fe,
1059 0x60, &dev->i2c_bus[1].i2c_adap,
1060 &hauppauge_tda18271_config);
1061
1062 break;
1046 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1063 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1047 i2c_bus = &dev->i2c_bus[0]; 1064 i2c_bus = &dev->i2c_bus[0];
1048 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1065 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
@@ -1118,6 +1135,39 @@ static int dvb_register(struct cx23885_tsport *port)
1118 goto frontend_detach; 1135 goto frontend_detach;
1119 } 1136 }
1120 break; 1137 break;
1138 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1139 i2c_bus = &dev->i2c_bus[0];
1140 i2c_bus2 = &dev->i2c_bus[1];
1141
1142 switch (port->nr) {
1143 /* port b */
1144 case 1:
1145 fe0->dvb.frontend = dvb_attach(drxk_attach,
1146 &terratec_drxk_config[0],
1147 &i2c_bus->i2c_adap);
1148 if (fe0->dvb.frontend != NULL) {
1149 if (!dvb_attach(mt2063_attach,
1150 fe0->dvb.frontend,
1151 &terratec_mt2063_config[0],
1152 &i2c_bus2->i2c_adap))
1153 goto frontend_detach;
1154 }
1155 break;
1156 /* port c */
1157 case 2:
1158 fe0->dvb.frontend = dvb_attach(drxk_attach,
1159 &terratec_drxk_config[1],
1160 &i2c_bus->i2c_adap);
1161 if (fe0->dvb.frontend != NULL) {
1162 if (!dvb_attach(mt2063_attach,
1163 fe0->dvb.frontend,
1164 &terratec_mt2063_config[1],
1165 &i2c_bus2->i2c_adap))
1166 goto frontend_detach;
1167 }
1168 break;
1169 }
1170 break;
1121 default: 1171 default:
1122 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " 1172 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1123 " isn't supported yet\n", 1173 " isn't supported yet\n",
@@ -1151,7 +1201,7 @@ static int dvb_register(struct cx23885_tsport *port)
1151 /* register everything */ 1201 /* register everything */
1152 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, 1202 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1153 &dev->pci->dev, adapter_nr, mfe_shared, 1203 &dev->pci->dev, adapter_nr, mfe_shared,
1154 cx23885_dvb_fe_ioctl_override); 1204 NULL);
1155 if (ret) 1205 if (ret)
1156 goto frontend_detach; 1206 goto frontend_detach;
1157 1207
diff --git a/drivers/media/video/cx23885/cx23885-i2c.c b/drivers/media/video/cx23885/cx23885-i2c.c
index 0ff7a9e98f3..be1e21d8295 100644
--- a/drivers/media/video/cx23885/cx23885-i2c.c
+++ b/drivers/media/video/cx23885/cx23885-i2c.c
@@ -309,7 +309,7 @@ static void do_i2c_scan(char *name, struct i2c_client *c)
309 } 309 }
310} 310}
311 311
312/* init + register i2c algo-bit adapter */ 312/* init + register i2c adapter */
313int cx23885_i2c_register(struct cx23885_i2c *bus) 313int cx23885_i2c_register(struct cx23885_i2c *bus)
314{ 314{
315 struct cx23885_dev *dev = bus->dev; 315 struct cx23885_dev *dev = bus->dev;
diff --git a/drivers/media/video/cx23885/cx23885-video.c b/drivers/media/video/cx23885/cx23885-video.c
index e730b926301..4bbf9bb97bd 100644
--- a/drivers/media/video/cx23885/cx23885-video.c
+++ b/drivers/media/video/cx23885/cx23885-video.c
@@ -253,9 +253,9 @@ static struct cx23885_ctrl cx23885_ctls[] = {
253 .id = V4L2_CID_AUDIO_VOLUME, 253 .id = V4L2_CID_AUDIO_VOLUME,
254 .name = "Volume", 254 .name = "Volume",
255 .minimum = 0, 255 .minimum = 0,
256 .maximum = 0x3f, 256 .maximum = 65535,
257 .step = 1, 257 .step = 65535 / 100,
258 .default_value = 0x3f, 258 .default_value = 65535,
259 .type = V4L2_CTRL_TYPE_INTEGER, 259 .type = V4L2_CTRL_TYPE_INTEGER,
260 }, 260 },
261 .reg = PATH1_VOL_CTL, 261 .reg = PATH1_VOL_CTL,
@@ -316,7 +316,7 @@ void cx23885_video_wakeup(struct cx23885_dev *dev,
316 __func__, bc); 316 __func__, bc);
317} 317}
318 318
319static int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm) 319int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm)
320{ 320{
321 dprintk(1, "%s(norm = 0x%08x) name: [%s]\n", 321 dprintk(1, "%s(norm = 0x%08x) name: [%s]\n",
322 __func__, 322 __func__,
@@ -344,8 +344,8 @@ static struct video_device *cx23885_vdev_init(struct cx23885_dev *dev,
344 *vfd = *template; 344 *vfd = *template;
345 vfd->v4l2_dev = &dev->v4l2_dev; 345 vfd->v4l2_dev = &dev->v4l2_dev;
346 vfd->release = video_device_release; 346 vfd->release = video_device_release;
347 snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", 347 snprintf(vfd->name, sizeof(vfd->name), "%s (%s)",
348 dev->name, type, cx23885_boards[dev->board].name); 348 cx23885_boards[dev->board].name, type);
349 video_set_drvdata(vfd, dev); 349 video_set_drvdata(vfd, dev);
350 return vfd; 350 return vfd;
351} 351}
@@ -492,7 +492,8 @@ static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input)
492 dev->input = input; 492 dev->input = input;
493 493
494 if (dev->board == CX23885_BOARD_MYGICA_X8506 || 494 if (dev->board == CX23885_BOARD_MYGICA_X8506 ||
495 dev->board == CX23885_BOARD_MAGICPRO_PROHDTVE2) { 495 dev->board == CX23885_BOARD_MAGICPRO_PROHDTVE2 ||
496 dev->board == CX23885_BOARD_MYGICA_X8507) {
496 /* Select Analog TV */ 497 /* Select Analog TV */
497 if (INPUT(input)->type == CX23885_VMUX_TELEVISION) 498 if (INPUT(input)->type == CX23885_VMUX_TELEVISION)
498 cx23885_gpio_clear(dev, GPIO_0); 499 cx23885_gpio_clear(dev, GPIO_0);
@@ -503,7 +504,8 @@ static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input)
503 INPUT(input)->vmux, 0, 0); 504 INPUT(input)->vmux, 0, 0);
504 505
505 if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1800) || 506 if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1800) ||
506 (dev->board == CX23885_BOARD_MPX885)) { 507 (dev->board == CX23885_BOARD_MPX885) ||
508 (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850)) {
507 /* Configure audio routing */ 509 /* Configure audio routing */
508 v4l2_subdev_call(dev->sd_cx25840, audio, s_routing, 510 v4l2_subdev_call(dev->sd_cx25840, audio, s_routing,
509 INPUT(input)->amux, 0, 0); 511 INPUT(input)->amux, 0, 0);
@@ -649,6 +651,7 @@ static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
649 int rc, init_buffer = 0; 651 int rc, init_buffer = 0;
650 u32 line0_offset, line1_offset; 652 u32 line0_offset, line1_offset;
651 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb); 653 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
654 int field_tff;
652 655
653 BUG_ON(NULL == fh->fmt); 656 BUG_ON(NULL == fh->fmt);
654 if (fh->width < 48 || fh->width > norm_maxw(dev->tvnorm) || 657 if (fh->width < 48 || fh->width > norm_maxw(dev->tvnorm) ||
@@ -690,15 +693,25 @@ static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
690 buf->bpl, 0, buf->vb.height); 693 buf->bpl, 0, buf->vb.height);
691 break; 694 break;
692 case V4L2_FIELD_INTERLACED: 695 case V4L2_FIELD_INTERLACED:
693 if (dev->tvnorm & V4L2_STD_NTSC) { 696 if (dev->tvnorm & V4L2_STD_NTSC)
697 /* NTSC or */
698 field_tff = 1;
699 else
700 field_tff = 0;
701
702 if (cx23885_boards[dev->board].force_bff)
703 /* PAL / SECAM OR 888 in NTSC MODE */
704 field_tff = 0;
705
706 if (field_tff) {
694 /* cx25840 transmits NTSC bottom field first */ 707 /* cx25840 transmits NTSC bottom field first */
695 dprintk(1, "%s() Creating NTSC risc\n", 708 dprintk(1, "%s() Creating TFF/NTSC risc\n",
696 __func__); 709 __func__);
697 line0_offset = buf->bpl; 710 line0_offset = buf->bpl;
698 line1_offset = 0; 711 line1_offset = 0;
699 } else { 712 } else {
700 /* All other formats are top field first */ 713 /* All other formats are top field first */
701 dprintk(1, "%s() Creating PAL/SECAM risc\n", 714 dprintk(1, "%s() Creating BFF/PAL/SECAM risc\n",
702 __func__); 715 __func__);
703 line0_offset = 0; 716 line0_offset = 0;
704 line1_offset = buf->bpl; 717 line1_offset = buf->bpl;
@@ -981,6 +994,8 @@ static int video_release(struct file *file)
981 } 994 }
982 995
983 videobuf_mmap_free(&fh->vidq); 996 videobuf_mmap_free(&fh->vidq);
997 videobuf_mmap_free(&fh->vbiq);
998
984 file->private_data = NULL; 999 file->private_data = NULL;
985 kfree(fh); 1000 kfree(fh);
986 1001
@@ -1002,7 +1017,7 @@ static int video_mmap(struct file *file, struct vm_area_struct *vma)
1002/* ------------------------------------------------------------------ */ 1017/* ------------------------------------------------------------------ */
1003/* VIDEO CTRL IOCTLS */ 1018/* VIDEO CTRL IOCTLS */
1004 1019
1005static int cx23885_get_control(struct cx23885_dev *dev, 1020int cx23885_get_control(struct cx23885_dev *dev,
1006 struct v4l2_control *ctl) 1021 struct v4l2_control *ctl)
1007{ 1022{
1008 dprintk(1, "%s() calling cx25840(VIDIOC_G_CTRL)\n", __func__); 1023 dprintk(1, "%s() calling cx25840(VIDIOC_G_CTRL)\n", __func__);
@@ -1010,7 +1025,7 @@ static int cx23885_get_control(struct cx23885_dev *dev,
1010 return 0; 1025 return 0;
1011} 1026}
1012 1027
1013static int cx23885_set_control(struct cx23885_dev *dev, 1028int cx23885_set_control(struct cx23885_dev *dev,
1014 struct v4l2_control *ctl) 1029 struct v4l2_control *ctl)
1015{ 1030{
1016 dprintk(1, "%s() calling cx25840(VIDIOC_S_CTRL)\n", __func__); 1031 dprintk(1, "%s() calling cx25840(VIDIOC_S_CTRL)\n", __func__);
@@ -1229,6 +1244,16 @@ static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1229 return 0; 1244 return 0;
1230} 1245}
1231 1246
1247static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1248{
1249 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1250 dprintk(1, "%s()\n", __func__);
1251
1252 call_all(dev, core, g_std, id);
1253
1254 return 0;
1255}
1256
1232static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *tvnorms) 1257static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *tvnorms)
1233{ 1258{
1234 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 1259 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
@@ -1241,7 +1266,7 @@ static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *tvnorms)
1241 return 0; 1266 return 0;
1242} 1267}
1243 1268
1244static int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i) 1269int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i)
1245{ 1270{
1246 static const char *iname[] = { 1271 static const char *iname[] = {
1247 [CX23885_VMUX_COMPOSITE1] = "Composite1", 1272 [CX23885_VMUX_COMPOSITE1] = "Composite1",
@@ -1278,6 +1303,15 @@ static int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i)
1278 if (INPUT(n)->type != CX23885_VMUX_TELEVISION) 1303 if (INPUT(n)->type != CX23885_VMUX_TELEVISION)
1279 i->audioset = 0x3; 1304 i->audioset = 0x3;
1280 1305
1306 if (dev->input == n) {
1307 /* enum'd input matches our configured input.
1308 * Ask the video decoder to process the call
1309 * and give it an oppertunity to update the
1310 * status field.
1311 */
1312 call_all(dev, video, g_input_status, &i->status);
1313 }
1314
1281 return 0; 1315 return 0;
1282} 1316}
1283 1317
@@ -1289,7 +1323,7 @@ static int vidioc_enum_input(struct file *file, void *priv,
1289 return cx23885_enum_input(dev, i); 1323 return cx23885_enum_input(dev, i);
1290} 1324}
1291 1325
1292static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) 1326int cx23885_get_input(struct file *file, void *priv, unsigned int *i)
1293{ 1327{
1294 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 1328 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1295 1329
@@ -1298,7 +1332,12 @@ static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1298 return 0; 1332 return 0;
1299} 1333}
1300 1334
1301static int vidioc_s_input(struct file *file, void *priv, unsigned int i) 1335static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1336{
1337 return cx23885_get_input(file, priv, i);
1338}
1339
1340int cx23885_set_input(struct file *file, void *priv, unsigned int i)
1302{ 1341{
1303 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 1342 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1304 1343
@@ -1322,6 +1361,11 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1322 return 0; 1361 return 0;
1323} 1362}
1324 1363
1364static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1365{
1366 return cx23885_set_input(file, priv, i);
1367}
1368
1325static int vidioc_log_status(struct file *file, void *priv) 1369static int vidioc_log_status(struct file *file, void *priv)
1326{ 1370{
1327 struct cx23885_fh *fh = priv; 1371 struct cx23885_fh *fh = priv;
@@ -1329,11 +1373,11 @@ static int vidioc_log_status(struct file *file, void *priv)
1329 1373
1330 printk(KERN_INFO 1374 printk(KERN_INFO
1331 "%s/0: ============ START LOG STATUS ============\n", 1375 "%s/0: ============ START LOG STATUS ============\n",
1332 dev->name); 1376 dev->name);
1333 call_all(dev, core, log_status); 1377 call_all(dev, core, log_status);
1334 printk(KERN_INFO 1378 printk(KERN_INFO
1335 "%s/0: ============= END LOG STATUS =============\n", 1379 "%s/0: ============= END LOG STATUS =============\n",
1336 dev->name); 1380 dev->name);
1337 return 0; 1381 return 0;
1338} 1382}
1339 1383
@@ -1471,6 +1515,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
1471 1515
1472static int cx23885_set_freq(struct cx23885_dev *dev, struct v4l2_frequency *f) 1516static int cx23885_set_freq(struct cx23885_dev *dev, struct v4l2_frequency *f)
1473{ 1517{
1518 struct v4l2_control ctrl;
1519
1474 if (unlikely(UNSET == dev->tuner_type)) 1520 if (unlikely(UNSET == dev->tuner_type))
1475 return -EINVAL; 1521 return -EINVAL;
1476 if (unlikely(f->tuner != 0)) 1522 if (unlikely(f->tuner != 0))
@@ -1479,29 +1525,102 @@ static int cx23885_set_freq(struct cx23885_dev *dev, struct v4l2_frequency *f)
1479 mutex_lock(&dev->lock); 1525 mutex_lock(&dev->lock);
1480 dev->freq = f->frequency; 1526 dev->freq = f->frequency;
1481 1527
1528 /* I need to mute audio here */
1529 ctrl.id = V4L2_CID_AUDIO_MUTE;
1530 ctrl.value = 1;
1531 cx23885_set_control(dev, &ctrl);
1532
1482 call_all(dev, tuner, s_frequency, f); 1533 call_all(dev, tuner, s_frequency, f);
1483 1534
1484 /* When changing channels it is required to reset TVAUDIO */ 1535 /* When changing channels it is required to reset TVAUDIO */
1485 msleep(10); 1536 msleep(100);
1537
1538 /* I need to unmute audio here */
1539 ctrl.value = 0;
1540 cx23885_set_control(dev, &ctrl);
1486 1541
1487 mutex_unlock(&dev->lock); 1542 mutex_unlock(&dev->lock);
1488 1543
1489 return 0; 1544 return 0;
1490} 1545}
1491 1546
1492static int vidioc_s_frequency(struct file *file, void *priv, 1547static int cx23885_set_freq_via_ops(struct cx23885_dev *dev,
1493 struct v4l2_frequency *f) 1548 struct v4l2_frequency *f)
1549{
1550 struct v4l2_control ctrl;
1551 struct videobuf_dvb_frontend *vfe;
1552 struct dvb_frontend *fe;
1553 int err = 0;
1554
1555 struct analog_parameters params = {
1556 .mode = V4L2_TUNER_ANALOG_TV,
1557 .audmode = V4L2_TUNER_MODE_STEREO,
1558 .std = dev->tvnorm,
1559 .frequency = f->frequency
1560 };
1561
1562 mutex_lock(&dev->lock);
1563 dev->freq = f->frequency;
1564
1565 /* I need to mute audio here */
1566 ctrl.id = V4L2_CID_AUDIO_MUTE;
1567 ctrl.value = 1;
1568 cx23885_set_control(dev, &ctrl);
1569
1570 /* If HVR1850 */
1571 dprintk(1, "%s() frequency=%d tuner=%d std=0x%llx\n", __func__,
1572 params.frequency, f->tuner, params.std);
1573
1574 vfe = videobuf_dvb_get_frontend(&dev->ts2.frontends, 1);
1575 if (!vfe)
1576 err = -EINVAL;
1577
1578 fe = vfe->dvb.frontend;
1579
1580 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850)
1581 fe = &dev->ts1.analog_fe;
1582
1583 if (fe && fe->ops.tuner_ops.set_analog_params) {
1584 call_all(dev, core, s_std, dev->tvnorm);
1585 fe->ops.tuner_ops.set_analog_params(fe, &params);
1586 }
1587 else
1588 printk(KERN_ERR "%s() No analog tuner, aborting\n", __func__);
1589
1590 /* When changing channels it is required to reset TVAUDIO */
1591 msleep(100);
1592
1593 /* I need to unmute audio here */
1594 ctrl.value = 0;
1595 cx23885_set_control(dev, &ctrl);
1596
1597 mutex_unlock(&dev->lock);
1598
1599 return 0;
1600}
1601
1602int cx23885_set_frequency(struct file *file, void *priv,
1603 struct v4l2_frequency *f)
1494{ 1604{
1495 struct cx23885_fh *fh = priv; 1605 struct cx23885_fh *fh = priv;
1496 struct cx23885_dev *dev = fh->dev; 1606 struct cx23885_dev *dev = fh->dev;
1607 int ret;
1497 1608
1498 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV)) 1609 switch (dev->board) {
1499 return -EINVAL; 1610 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1500 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO)) 1611 ret = cx23885_set_freq_via_ops(dev, f);
1501 return -EINVAL; 1612 break;
1613 default:
1614 ret = cx23885_set_freq(dev, f);
1615 }
1502 1616
1503 return 1617 return ret;
1504 cx23885_set_freq(dev, f); 1618}
1619
1620static int vidioc_s_frequency(struct file *file, void *priv,
1621 struct v4l2_frequency *f)
1622{
1623 return cx23885_set_frequency(file, priv, f);
1505} 1624}
1506 1625
1507/* ----------------------------------------------------------- */ 1626/* ----------------------------------------------------------- */
@@ -1613,6 +1732,8 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
1613 .vidioc_qbuf = vidioc_qbuf, 1732 .vidioc_qbuf = vidioc_qbuf,
1614 .vidioc_dqbuf = vidioc_dqbuf, 1733 .vidioc_dqbuf = vidioc_dqbuf,
1615 .vidioc_s_std = vidioc_s_std, 1734 .vidioc_s_std = vidioc_s_std,
1735 .vidioc_g_std = vidioc_g_std,
1736 .vidioc_querystd = vidioc_g_std,
1616 .vidioc_enum_input = vidioc_enum_input, 1737 .vidioc_enum_input = vidioc_enum_input,
1617 .vidioc_g_input = vidioc_g_input, 1738 .vidioc_g_input = vidioc_g_input,
1618 .vidioc_s_input = vidioc_s_input, 1739 .vidioc_s_input = vidioc_s_input,
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
index b49036fe3ff..f020f0568df 100644
--- a/drivers/media/video/cx23885/cx23885.h
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -87,6 +87,8 @@
87#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 87#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
88#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 88#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
89#define CX23885_BOARD_MPX885 32 89#define CX23885_BOARD_MPX885 32
90#define CX23885_BOARD_MYGICA_X8507 33
91#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
90 92
91#define GPIO_0 0x00000001 93#define GPIO_0 0x00000001
92#define GPIO_1 0x00000002 94#define GPIO_1 0x00000002
@@ -226,6 +228,8 @@ struct cx23885_board {
226 u32 clk_freq; 228 u32 clk_freq;
227 struct cx23885_input input[MAX_CX23885_INPUT]; 229 struct cx23885_input input[MAX_CX23885_INPUT];
228 int ci_type; /* for NetUP */ 230 int ci_type; /* for NetUP */
231 /* Force bottom field first during DMA (888 workaround) */
232 u32 force_bff;
229}; 233};
230 234
231struct cx23885_subid { 235struct cx23885_subid {
@@ -310,6 +314,9 @@ struct cx23885_tsport {
310 u32 num_frontends; 314 u32 num_frontends;
311 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 315 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
312 void *port_priv; 316 void *port_priv;
317
318 /* Workaround for a temp dvb_frontend that the tuner can attached to */
319 struct dvb_frontend analog_fe;
313}; 320};
314 321
315struct cx23885_kernel_ir { 322struct cx23885_kernel_ir {
@@ -574,6 +581,13 @@ extern void cx23885_video_unregister(struct cx23885_dev *dev);
574extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 581extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
575extern void cx23885_video_wakeup(struct cx23885_dev *dev, 582extern void cx23885_video_wakeup(struct cx23885_dev *dev,
576 struct cx23885_dmaqueue *q, u32 count); 583 struct cx23885_dmaqueue *q, u32 count);
584int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
585int cx23885_set_input(struct file *file, void *priv, unsigned int i);
586int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
587int cx23885_set_frequency(struct file *file, void *priv, struct v4l2_frequency *f);
588int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
589int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
590int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
577 591
578/* ----------------------------------------------------------- */ 592/* ----------------------------------------------------------- */
579/* cx23885-vbi.c */ 593/* cx23885-vbi.c */
diff --git a/drivers/media/video/cx25821/cx25821-alsa.c b/drivers/media/video/cx25821/cx25821-alsa.c
index 58be4f3bb3c..03cfac476b0 100644
--- a/drivers/media/video/cx25821/cx25821-alsa.c
+++ b/drivers/media/video/cx25821/cx25821-alsa.c
@@ -176,8 +176,7 @@ static int _cx25821_start_audio_dma(struct cx25821_audio_dev *chip)
176 176
177 /* Set the input mode to 16-bit */ 177 /* Set the input mode to 16-bit */
178 tmp = cx_read(AUD_A_CFG); 178 tmp = cx_read(AUD_A_CFG);
179 cx_write(AUD_A_CFG, 179 cx_write(AUD_A_CFG, tmp | FLD_AUD_DST_PK_MODE | FLD_AUD_DST_ENABLE |
180 tmp | FLD_AUD_DST_PK_MODE | FLD_AUD_DST_ENABLE |
181 FLD_AUD_CLK_ENABLE); 180 FLD_AUD_CLK_ENABLE);
182 181
183 /* 182 /*
@@ -188,9 +187,8 @@ static int _cx25821_start_audio_dma(struct cx25821_audio_dev *chip)
188 */ 187 */
189 188
190 /* Enables corresponding bits at AUD_INT_STAT */ 189 /* Enables corresponding bits at AUD_INT_STAT */
191 cx_write(AUD_A_INT_MSK, 190 cx_write(AUD_A_INT_MSK, FLD_AUD_DST_RISCI1 | FLD_AUD_DST_OF |
192 FLD_AUD_DST_RISCI1 | FLD_AUD_DST_OF | FLD_AUD_DST_SYNC | 191 FLD_AUD_DST_SYNC | FLD_AUD_DST_OPC_ERR);
193 FLD_AUD_DST_OPC_ERR);
194 192
195 /* Clean any pending interrupt bits already set */ 193 /* Clean any pending interrupt bits already set */
196 cx_write(AUD_A_INT_STAT, ~0); 194 cx_write(AUD_A_INT_STAT, ~0);
@@ -200,8 +198,8 @@ static int _cx25821_start_audio_dma(struct cx25821_audio_dev *chip)
200 198
201 /* Turn on audio downstream fifo and risc enable 0x101 */ 199 /* Turn on audio downstream fifo and risc enable 0x101 */
202 tmp = cx_read(AUD_INT_DMA_CTL); 200 tmp = cx_read(AUD_INT_DMA_CTL);
203 cx_set(AUD_INT_DMA_CTL, 201 cx_set(AUD_INT_DMA_CTL, tmp |
204 tmp | (FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN)); 202 (FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN));
205 203
206 mdelay(100); 204 mdelay(100);
207 return 0; 205 return 0;
@@ -220,9 +218,8 @@ static int _cx25821_stop_audio_dma(struct cx25821_audio_dev *chip)
220 218
221 /* disable irqs */ 219 /* disable irqs */
222 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT); 220 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
223 cx_clear(AUD_A_INT_MSK, 221 cx_clear(AUD_A_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
224 AUD_INT_OPC_ERR | AUD_INT_DN_SYNC | AUD_INT_DN_RISCI2 | 222 AUD_INT_DN_RISCI2 | AUD_INT_DN_RISCI1);
225 AUD_INT_DN_RISCI1);
226 223
227 return 0; 224 return 0;
228} 225}
@@ -234,15 +231,15 @@ static int _cx25821_stop_audio_dma(struct cx25821_audio_dev *chip)
234 */ 231 */
235static char *cx25821_aud_irqs[32] = { 232static char *cx25821_aud_irqs[32] = {
236 "dn_risci1", "up_risci1", "rds_dn_risc1", /* 0-2 */ 233 "dn_risci1", "up_risci1", "rds_dn_risc1", /* 0-2 */
237 NULL, /* reserved */ 234 NULL, /* reserved */
238 "dn_risci2", "up_risci2", "rds_dn_risc2", /* 4-6 */ 235 "dn_risci2", "up_risci2", "rds_dn_risc2", /* 4-6 */
239 NULL, /* reserved */ 236 NULL, /* reserved */
240 "dnf_of", "upf_uf", "rds_dnf_uf", /* 8-10 */ 237 "dnf_of", "upf_uf", "rds_dnf_uf", /* 8-10 */
241 NULL, /* reserved */ 238 NULL, /* reserved */
242 "dn_sync", "up_sync", "rds_dn_sync", /* 12-14 */ 239 "dn_sync", "up_sync", "rds_dn_sync", /* 12-14 */
243 NULL, /* reserved */ 240 NULL, /* reserved */
244 "opc_err", "par_err", "rip_err", /* 16-18 */ 241 "opc_err", "par_err", "rip_err", /* 16-18 */
245 "pci_abort", "ber_irq", "mchg_irq" /* 19-21 */ 242 "pci_abort", "ber_irq", "mchg_irq" /* 19-21 */
246}; 243};
247 244
248/* 245/*
@@ -258,10 +255,8 @@ static void cx25821_aud_irq(struct cx25821_audio_dev *chip, u32 status,
258 255
259 cx_write(AUD_A_INT_STAT, status); 256 cx_write(AUD_A_INT_STAT, status);
260 if (debug > 1 || (status & mask & ~0xff)) 257 if (debug > 1 || (status & mask & ~0xff))
261 cx25821_print_irqbits(dev->name, "irq aud", 258 cx25821_print_irqbits(dev->name, "irq aud", cx25821_aud_irqs,
262 cx25821_aud_irqs, 259 ARRAY_SIZE(cx25821_aud_irqs), status, mask);
263 ARRAY_SIZE(cx25821_aud_irqs), status,
264 mask);
265 260
266 /* risc op code error */ 261 /* risc op code error */
267 if (status & AUD_INT_OPC_ERR) { 262 if (status & AUD_INT_OPC_ERR) {
@@ -270,8 +265,7 @@ static void cx25821_aud_irq(struct cx25821_audio_dev *chip, u32 status,
270 cx_clear(AUD_INT_DMA_CTL, 265 cx_clear(AUD_INT_DMA_CTL,
271 FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN); 266 FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN);
272 cx25821_sram_channel_dump_audio(dev, 267 cx25821_sram_channel_dump_audio(dev,
273 &cx25821_sram_channels 268 &cx25821_sram_channels[AUDIO_SRAM_CHANNEL]);
274 [AUDIO_SRAM_CHANNEL]);
275 } 269 }
276 if (status & AUD_INT_DN_SYNC) { 270 if (status & AUD_INT_DN_SYNC) {
277 pr_warn("WARNING %s: Downstream sync error!\n", dev->name); 271 pr_warn("WARNING %s: Downstream sync error!\n", dev->name);
@@ -317,8 +311,9 @@ static irqreturn_t cx25821_irq(int irq, void *dev_id)
317 cx25821_aud_irq(chip, audint_status, 311 cx25821_aud_irq(chip, audint_status,
318 audint_mask); 312 audint_mask);
319 break; 313 break;
320 } else 314 } else {
321 goto out; 315 goto out;
316 }
322 } 317 }
323 318
324 handled = 1; 319 handled = 1;
@@ -361,9 +356,8 @@ static int dsp_buffer_free(struct cx25821_audio_dev *chip)
361 */ 356 */
362#define DEFAULT_FIFO_SIZE 384 357#define DEFAULT_FIFO_SIZE 384
363static struct snd_pcm_hardware snd_cx25821_digital_hw = { 358static struct snd_pcm_hardware snd_cx25821_digital_hw = {
364 .info = SNDRV_PCM_INFO_MMAP | 359 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
365 SNDRV_PCM_INFO_INTERLEAVED | 360 SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP_VALID,
366 SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP_VALID,
367 .formats = SNDRV_PCM_FMTBIT_S16_LE, 361 .formats = SNDRV_PCM_FMTBIT_S16_LE,
368 362
369 .rates = SNDRV_PCM_RATE_48000, 363 .rates = SNDRV_PCM_RATE_48000,
@@ -396,8 +390,8 @@ static int snd_cx25821_pcm_open(struct snd_pcm_substream *substream)
396 return -ENODEV; 390 return -ENODEV;
397 } 391 }
398 392
399 err = 393 err = snd_pcm_hw_constraint_pow2(runtime, 0,
400 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIODS); 394 SNDRV_PCM_HW_PARAM_PERIODS);
401 if (err < 0) 395 if (err < 0)
402 goto _error; 396 goto _error;
403 397
@@ -468,8 +462,7 @@ static int snd_cx25821_hw_params(struct snd_pcm_substream *substream,
468 dma = &buf->dma; 462 dma = &buf->dma;
469 videobuf_dma_init(dma); 463 videobuf_dma_init(dma);
470 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE, 464 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE,
471 (PAGE_ALIGN(chip->dma_size) >> 465 (PAGE_ALIGN(chip->dma_size) >> PAGE_SHIFT));
472 PAGE_SHIFT));
473 if (ret < 0) 466 if (ret < 0)
474 goto error; 467 goto error;
475 468
@@ -477,10 +470,8 @@ static int snd_cx25821_hw_params(struct snd_pcm_substream *substream,
477 if (ret < 0) 470 if (ret < 0)
478 goto error; 471 goto error;
479 472
480 ret = 473 ret = cx25821_risc_databuffer_audio(chip->pci, &buf->risc, dma->sglist,
481 cx25821_risc_databuffer_audio(chip->pci, &buf->risc, dma->sglist, 474 chip->period_size, chip->num_periods, 1);
482 chip->period_size, chip->num_periods,
483 1);
484 if (ret < 0) { 475 if (ret < 0) {
485 pr_info("DEBUG: ERROR after cx25821_risc_databuffer_audio()\n"); 476 pr_info("DEBUG: ERROR after cx25821_risc_databuffer_audio()\n");
486 goto error; 477 goto error;
@@ -686,7 +677,7 @@ static int cx25821_audio_initdev(struct cx25821_dev *dev)
686 } 677 }
687 678
688 err = snd_card_create(index[devno], id[devno], THIS_MODULE, 679 err = snd_card_create(index[devno], id[devno], THIS_MODULE,
689 sizeof(struct cx25821_audio_dev), &card); 680 sizeof(struct cx25821_audio_dev), &card);
690 if (err < 0) { 681 if (err < 0) {
691 pr_info("DEBUG ERROR: cannot create snd_card_new in %s\n", 682 pr_info("DEBUG ERROR: cannot create snd_card_new in %s\n",
692 __func__); 683 __func__);
@@ -711,8 +702,8 @@ static int cx25821_audio_initdev(struct cx25821_dev *dev)
711 IRQF_SHARED, chip->dev->name, chip); 702 IRQF_SHARED, chip->dev->name, chip);
712 703
713 if (err < 0) { 704 if (err < 0) {
714 pr_err("ERROR %s: can't get IRQ %d for ALSA\n", 705 pr_err("ERROR %s: can't get IRQ %d for ALSA\n", chip->dev->name,
715 chip->dev->name, dev->pci->irq); 706 dev->pci->irq);
716 goto error; 707 goto error;
717 } 708 }
718 709
@@ -730,8 +721,8 @@ static int cx25821_audio_initdev(struct cx25821_dev *dev)
730 chip->iobase, chip->irq); 721 chip->iobase, chip->irq);
731 strcpy(card->mixername, "CX25821"); 722 strcpy(card->mixername, "CX25821");
732 723
733 pr_info("%s/%i: ALSA support for cx25821 boards\n", 724 pr_info("%s/%i: ALSA support for cx25821 boards\n", card->driver,
734 card->driver, devno); 725 devno);
735 726
736 err = snd_card_register(card); 727 err = snd_card_register(card);
737 if (err < 0) { 728 if (err < 0) {
diff --git a/drivers/media/video/cx25821/cx25821-audio-upstream.c b/drivers/media/video/cx25821/cx25821-audio-upstream.c
index c20d6dece15..20c7ca3351a 100644
--- a/drivers/media/video/cx25821/cx25821-audio-upstream.c
+++ b/drivers/media/video/cx25821/cx25821-audio-upstream.c
@@ -107,7 +107,7 @@ static __le32 *cx25821_risc_field_upstream_audio(struct cx25821_dev *dev,
107{ 107{
108 unsigned int line; 108 unsigned int line;
109 struct sram_channel *sram_ch = 109 struct sram_channel *sram_ch =
110 dev->channels[dev->_audio_upstream_channel].sram_channels; 110 dev->channels[dev->_audio_upstream_channel].sram_channels;
111 int offset = 0; 111 int offset = 0;
112 112
113 /* scan lines */ 113 /* scan lines */
@@ -175,10 +175,8 @@ int cx25821_risc_buffer_upstream_audio(struct cx25821_dev *dev,
175 } 175 }
176 176
177 rp = cx25821_risc_field_upstream_audio(dev, rp, 177 rp = cx25821_risc_field_upstream_audio(dev, rp,
178 dev-> 178 dev->_audiodata_buf_phys_addr + databuf_offset,
179 _audiodata_buf_phys_addr 179 bpl, fifo_enable);
180 + databuf_offset, bpl,
181 fifo_enable);
182 180
183 if (USE_RISC_NOOP_AUDIO) { 181 if (USE_RISC_NOOP_AUDIO) {
184 for (i = 0; i < NUM_NO_OPS; i++) 182 for (i = 0; i < NUM_NO_OPS; i++)
@@ -193,7 +191,7 @@ int cx25821_risc_buffer_upstream_audio(struct cx25821_dev *dev,
193 191
194 /* Recalculate virtual address based on frame index */ 192 /* Recalculate virtual address based on frame index */
195 rp = dev->_risc_virt_addr + RISC_SYNC_INSTRUCTION_SIZE / 4 + 193 rp = dev->_risc_virt_addr + RISC_SYNC_INSTRUCTION_SIZE / 4 +
196 (AUDIO_RISC_DMA_BUF_SIZE * (frame + 1) / 4); 194 (AUDIO_RISC_DMA_BUF_SIZE * (frame + 1) / 4);
197 } 195 }
198 196
199 return 0; 197 return 0;
@@ -218,7 +216,7 @@ void cx25821_free_memory_audio(struct cx25821_dev *dev)
218void cx25821_stop_upstream_audio(struct cx25821_dev *dev) 216void cx25821_stop_upstream_audio(struct cx25821_dev *dev)
219{ 217{
220 struct sram_channel *sram_ch = 218 struct sram_channel *sram_ch =
221 dev->channels[AUDIO_UPSTREAM_SRAM_CHANNEL_B].sram_channels; 219 dev->channels[AUDIO_UPSTREAM_SRAM_CHANNEL_B].sram_channels;
222 u32 tmp = 0; 220 u32 tmp = 0;
223 221
224 if (!dev->_audio_is_running) { 222 if (!dev->_audio_is_running) {
@@ -286,14 +284,14 @@ int cx25821_get_audio_data(struct cx25821_dev *dev,
286 } else { 284 } else {
287 if (!(myfile->f_op)) { 285 if (!(myfile->f_op)) {
288 pr_err("%s(): File has no file operations registered!\n", 286 pr_err("%s(): File has no file operations registered!\n",
289 __func__); 287 __func__);
290 filp_close(myfile, NULL); 288 filp_close(myfile, NULL);
291 return -EIO; 289 return -EIO;
292 } 290 }
293 291
294 if (!myfile->f_op->read) { 292 if (!myfile->f_op->read) {
295 pr_err("%s(): File has no READ operations registered!\n", 293 pr_err("%s(): File has no READ operations registered!\n",
296 __func__); 294 __func__);
297 filp_close(myfile, NULL); 295 filp_close(myfile, NULL);
298 return -EIO; 296 return -EIO;
299 } 297 }
@@ -305,14 +303,14 @@ int cx25821_get_audio_data(struct cx25821_dev *dev,
305 for (i = 0; i < dev->_audio_lines_count; i++) { 303 for (i = 0; i < dev->_audio_lines_count; i++) {
306 pos = file_offset; 304 pos = file_offset;
307 305
308 vfs_read_retval = 306 vfs_read_retval = vfs_read(myfile, mybuf, line_size,
309 vfs_read(myfile, mybuf, line_size, &pos); 307 &pos);
310 308
311 if (vfs_read_retval > 0 && vfs_read_retval == line_size 309 if (vfs_read_retval > 0 && vfs_read_retval == line_size
312 && dev->_audiodata_buf_virt_addr != NULL) { 310 && dev->_audiodata_buf_virt_addr != NULL) {
313 memcpy((void *)(dev->_audiodata_buf_virt_addr + 311 memcpy((void *)(dev->_audiodata_buf_virt_addr +
314 frame_offset / 4), mybuf, 312 frame_offset / 4), mybuf,
315 vfs_read_retval); 313 vfs_read_retval);
316 } 314 }
317 315
318 file_offset += vfs_read_retval; 316 file_offset += vfs_read_retval;
@@ -328,8 +326,8 @@ int cx25821_get_audio_data(struct cx25821_dev *dev,
328 if (i > 0) 326 if (i > 0)
329 dev->_audioframe_count++; 327 dev->_audioframe_count++;
330 328
331 dev->_audiofile_status = 329 dev->_audiofile_status = (vfs_read_retval == line_size) ?
332 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 330 IN_PROGRESS : END_OF_FILE;
333 331
334 set_fs(old_fs); 332 set_fs(old_fs);
335 filp_close(myfile, NULL); 333 filp_close(myfile, NULL);
@@ -340,12 +338,12 @@ int cx25821_get_audio_data(struct cx25821_dev *dev,
340 338
341static void cx25821_audioups_handler(struct work_struct *work) 339static void cx25821_audioups_handler(struct work_struct *work)
342{ 340{
343 struct cx25821_dev *dev = 341 struct cx25821_dev *dev = container_of(work, struct cx25821_dev,
344 container_of(work, struct cx25821_dev, _audio_work_entry); 342 _audio_work_entry);
345 343
346 if (!dev) { 344 if (!dev) {
347 pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n", 345 pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n",
348 __func__); 346 __func__);
349 return; 347 return;
350 } 348 }
351 349
@@ -370,19 +368,19 @@ int cx25821_openfile_audio(struct cx25821_dev *dev,
370 if (IS_ERR(myfile)) { 368 if (IS_ERR(myfile)) {
371 const int open_errno = -PTR_ERR(myfile); 369 const int open_errno = -PTR_ERR(myfile);
372 pr_err("%s(): ERROR opening file(%s) with errno = %d!\n", 370 pr_err("%s(): ERROR opening file(%s) with errno = %d!\n",
373 __func__, dev->_audiofilename, open_errno); 371 __func__, dev->_audiofilename, open_errno);
374 return PTR_ERR(myfile); 372 return PTR_ERR(myfile);
375 } else { 373 } else {
376 if (!(myfile->f_op)) { 374 if (!(myfile->f_op)) {
377 pr_err("%s(): File has no file operations registered!\n", 375 pr_err("%s(): File has no file operations registered!\n",
378 __func__); 376 __func__);
379 filp_close(myfile, NULL); 377 filp_close(myfile, NULL);
380 return -EIO; 378 return -EIO;
381 } 379 }
382 380
383 if (!myfile->f_op->read) { 381 if (!myfile->f_op->read) {
384 pr_err("%s(): File has no READ operations registered!\n", 382 pr_err("%s(): File has no READ operations registered!\n",
385 __func__); 383 __func__);
386 filp_close(myfile, NULL); 384 filp_close(myfile, NULL);
387 return -EIO; 385 return -EIO;
388 } 386 }
@@ -395,12 +393,12 @@ int cx25821_openfile_audio(struct cx25821_dev *dev,
395 for (i = 0; i < dev->_audio_lines_count; i++) { 393 for (i = 0; i < dev->_audio_lines_count; i++) {
396 pos = offset; 394 pos = offset;
397 395
398 vfs_read_retval = 396 vfs_read_retval = vfs_read(myfile, mybuf,
399 vfs_read(myfile, mybuf, line_size, &pos); 397 line_size, &pos);
400 398
401 if (vfs_read_retval > 0 399 if (vfs_read_retval > 0 &&
402 && vfs_read_retval == line_size 400 vfs_read_retval == line_size &&
403 && dev->_audiodata_buf_virt_addr != NULL) { 401 dev->_audiodata_buf_virt_addr != NULL) {
404 memcpy((void *)(dev-> 402 memcpy((void *)(dev->
405 _audiodata_buf_virt_addr 403 _audiodata_buf_virt_addr
406 + offset / 4), mybuf, 404 + offset / 4), mybuf,
@@ -423,8 +421,8 @@ int cx25821_openfile_audio(struct cx25821_dev *dev,
423 break; 421 break;
424 } 422 }
425 423
426 dev->_audiofile_status = 424 dev->_audiofile_status = (vfs_read_retval == line_size) ?
427 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 425 IN_PROGRESS : END_OF_FILE;
428 426
429 set_fs(old_fs); 427 set_fs(old_fs);
430 myfile->f_pos = 0; 428 myfile->f_pos = 0;
@@ -444,9 +442,8 @@ static int cx25821_audio_upstream_buffer_prepare(struct cx25821_dev *dev,
444 442
445 cx25821_free_memory_audio(dev); 443 cx25821_free_memory_audio(dev);
446 444
447 dev->_risc_virt_addr = 445 dev->_risc_virt_addr = pci_alloc_consistent(dev->pci,
448 pci_alloc_consistent(dev->pci, dev->audio_upstream_riscbuf_size, 446 dev->audio_upstream_riscbuf_size, &dma_addr);
449 &dma_addr);
450 dev->_risc_virt_start_addr = dev->_risc_virt_addr; 447 dev->_risc_virt_start_addr = dev->_risc_virt_addr;
451 dev->_risc_phys_start_addr = dma_addr; 448 dev->_risc_phys_start_addr = dma_addr;
452 dev->_risc_phys_addr = dma_addr; 449 dev->_risc_phys_addr = dma_addr;
@@ -454,22 +451,21 @@ static int cx25821_audio_upstream_buffer_prepare(struct cx25821_dev *dev,
454 451
455 if (!dev->_risc_virt_addr) { 452 if (!dev->_risc_virt_addr) {
456 printk(KERN_DEBUG 453 printk(KERN_DEBUG
457 pr_fmt("ERROR: pci_alloc_consistent() FAILED to allocate memory for RISC program! Returning\n")); 454 pr_fmt("ERROR: pci_alloc_consistent() FAILED to allocate memory for RISC program! Returning\n"));
458 return -ENOMEM; 455 return -ENOMEM;
459 } 456 }
460 /* Clear out memory at address */ 457 /* Clear out memory at address */
461 memset(dev->_risc_virt_addr, 0, dev->_audiorisc_size); 458 memset(dev->_risc_virt_addr, 0, dev->_audiorisc_size);
462 459
463 /* For Audio Data buffer allocation */ 460 /* For Audio Data buffer allocation */
464 dev->_audiodata_buf_virt_addr = 461 dev->_audiodata_buf_virt_addr = pci_alloc_consistent(dev->pci,
465 pci_alloc_consistent(dev->pci, dev->audio_upstream_databuf_size, 462 dev->audio_upstream_databuf_size, &data_dma_addr);
466 &data_dma_addr);
467 dev->_audiodata_buf_phys_addr = data_dma_addr; 463 dev->_audiodata_buf_phys_addr = data_dma_addr;
468 dev->_audiodata_buf_size = dev->audio_upstream_databuf_size; 464 dev->_audiodata_buf_size = dev->audio_upstream_databuf_size;
469 465
470 if (!dev->_audiodata_buf_virt_addr) { 466 if (!dev->_audiodata_buf_virt_addr) {
471 printk(KERN_DEBUG 467 printk(KERN_DEBUG
472 pr_fmt("ERROR: pci_alloc_consistent() FAILED to allocate memory for data buffer! Returning\n")); 468 pr_fmt("ERROR: pci_alloc_consistent() FAILED to allocate memory for data buffer! Returning\n"));
473 return -ENOMEM; 469 return -ENOMEM;
474 } 470 }
475 /* Clear out memory at address */ 471 /* Clear out memory at address */
@@ -480,12 +476,11 @@ static int cx25821_audio_upstream_buffer_prepare(struct cx25821_dev *dev,
480 return ret; 476 return ret;
481 477
482 /* Creating RISC programs */ 478 /* Creating RISC programs */
483 ret = 479 ret = cx25821_risc_buffer_upstream_audio(dev, dev->pci, bpl,
484 cx25821_risc_buffer_upstream_audio(dev, dev->pci, bpl, 480 dev->_audio_lines_count);
485 dev->_audio_lines_count);
486 if (ret < 0) { 481 if (ret < 0) {
487 printk(KERN_DEBUG 482 printk(KERN_DEBUG
488 pr_fmt("ERROR creating audio upstream RISC programs!\n")); 483 pr_fmt("ERROR creating audio upstream RISC programs!\n"));
489 goto error; 484 goto error;
490 } 485 }
491 486
@@ -533,9 +528,9 @@ int cx25821_audio_upstream_irq(struct cx25821_dev *dev, int chan_num,
533 528
534 if (dev->_risc_virt_start_addr != NULL) { 529 if (dev->_risc_virt_start_addr != NULL) {
535 risc_phys_jump_addr = 530 risc_phys_jump_addr =
536 dev->_risc_phys_start_addr + 531 dev->_risc_phys_start_addr +
537 RISC_SYNC_INSTRUCTION_SIZE + 532 RISC_SYNC_INSTRUCTION_SIZE +
538 AUDIO_RISC_DMA_BUF_SIZE; 533 AUDIO_RISC_DMA_BUF_SIZE;
539 534
540 rp = cx25821_risc_field_upstream_audio(dev, 535 rp = cx25821_risc_field_upstream_audio(dev,
541 dev->_risc_virt_start_addr + 1, 536 dev->_risc_virt_start_addr + 1,
@@ -632,7 +627,7 @@ static void cx25821_wait_fifo_enable(struct cx25821_dev *dev,
632 /* 10 millisecond timeout */ 627 /* 10 millisecond timeout */
633 if (count++ > 1000) { 628 if (count++ > 1000) {
634 pr_err("ERROR: %s() fifo is NOT turned on. Timeout!\n", 629 pr_err("ERROR: %s() fifo is NOT turned on. Timeout!\n",
635 __func__); 630 __func__);
636 return; 631 return;
637 } 632 }
638 633
@@ -661,9 +656,9 @@ int cx25821_start_audio_dma_upstream(struct cx25821_dev *dev,
661 656
662 /* Set the input mode to 16-bit */ 657 /* Set the input mode to 16-bit */
663 tmp = cx_read(sram_ch->aud_cfg); 658 tmp = cx_read(sram_ch->aud_cfg);
664 tmp |= 659 tmp |= FLD_AUD_SRC_ENABLE | FLD_AUD_DST_PK_MODE | FLD_AUD_CLK_ENABLE |
665 FLD_AUD_SRC_ENABLE | FLD_AUD_DST_PK_MODE | FLD_AUD_CLK_ENABLE | 660 FLD_AUD_MASTER_MODE | FLD_AUD_CLK_SELECT_PLL_D |
666 FLD_AUD_MASTER_MODE | FLD_AUD_CLK_SELECT_PLL_D | FLD_AUD_SONY_MODE; 661 FLD_AUD_SONY_MODE;
667 cx_write(sram_ch->aud_cfg, tmp); 662 cx_write(sram_ch->aud_cfg, tmp);
668 663
669 /* Read and write back the interrupt status register to clear it */ 664 /* Read and write back the interrupt status register to clear it */
@@ -678,12 +673,11 @@ int cx25821_start_audio_dma_upstream(struct cx25821_dev *dev,
678 tmp = cx_read(sram_ch->int_msk); 673 tmp = cx_read(sram_ch->int_msk);
679 cx_write(sram_ch->int_msk, tmp |= _intr_msk); 674 cx_write(sram_ch->int_msk, tmp |= _intr_msk);
680 675
681 err = 676 err = request_irq(dev->pci->irq, cx25821_upstream_irq_audio,
682 request_irq(dev->pci->irq, cx25821_upstream_irq_audio,
683 IRQF_SHARED, dev->name, dev); 677 IRQF_SHARED, dev->name, dev);
684 if (err < 0) { 678 if (err < 0) {
685 pr_err("%s: can't get upstream IRQ %d\n", 679 pr_err("%s: can't get upstream IRQ %d\n", dev->name,
686 dev->name, dev->pci->irq); 680 dev->pci->irq);
687 goto fail_irq; 681 goto fail_irq;
688 } 682 }
689 683
@@ -726,7 +720,7 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
726 720
727 if (!dev->_irq_audio_queues) { 721 if (!dev->_irq_audio_queues) {
728 printk(KERN_DEBUG 722 printk(KERN_DEBUG
729 pr_fmt("ERROR: create_singlethread_workqueue() for Audio FAILED!\n")); 723 pr_fmt("ERROR: create_singlethread_workqueue() for Audio FAILED!\n"));
730 return -ENOMEM; 724 return -ENOMEM;
731 } 725 }
732 726
@@ -739,33 +733,30 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
739 733
740 if (dev->input_audiofilename) { 734 if (dev->input_audiofilename) {
741 str_length = strlen(dev->input_audiofilename); 735 str_length = strlen(dev->input_audiofilename);
742 dev->_audiofilename = kmalloc(str_length + 1, GFP_KERNEL); 736 dev->_audiofilename = kmemdup(dev->input_audiofilename,
737 str_length + 1, GFP_KERNEL);
743 738
744 if (!dev->_audiofilename) 739 if (!dev->_audiofilename)
745 goto error; 740 goto error;
746 741
747 memcpy(dev->_audiofilename, dev->input_audiofilename,
748 str_length + 1);
749
750 /* Default if filename is empty string */ 742 /* Default if filename is empty string */
751 if (strcmp(dev->input_audiofilename, "") == 0) 743 if (strcmp(dev->input_audiofilename, "") == 0)
752 dev->_audiofilename = "/root/audioGOOD.wav"; 744 dev->_audiofilename = "/root/audioGOOD.wav";
753 } else { 745 } else {
754 str_length = strlen(_defaultAudioName); 746 str_length = strlen(_defaultAudioName);
755 dev->_audiofilename = kmalloc(str_length + 1, GFP_KERNEL); 747 dev->_audiofilename = kmemdup(_defaultAudioName,
748 str_length + 1, GFP_KERNEL);
756 749
757 if (!dev->_audiofilename) 750 if (!dev->_audiofilename)
758 goto error; 751 goto error;
759
760 memcpy(dev->_audiofilename, _defaultAudioName, str_length + 1);
761 } 752 }
762 753
763 retval = cx25821_sram_channel_setup_upstream_audio(dev, sram_ch, 754 retval = cx25821_sram_channel_setup_upstream_audio(dev, sram_ch,
764 _line_size, 0); 755 _line_size, 0);
765 756
766 dev->audio_upstream_riscbuf_size = 757 dev->audio_upstream_riscbuf_size =
767 AUDIO_RISC_DMA_BUF_SIZE * NUM_AUDIO_PROGS + 758 AUDIO_RISC_DMA_BUF_SIZE * NUM_AUDIO_PROGS +
768 RISC_SYNC_INSTRUCTION_SIZE; 759 RISC_SYNC_INSTRUCTION_SIZE;
769 dev->audio_upstream_databuf_size = AUDIO_DATA_BUF_SZ * NUM_AUDIO_PROGS; 760 dev->audio_upstream_databuf_size = AUDIO_DATA_BUF_SZ * NUM_AUDIO_PROGS;
770 761
771 /* Allocating buffers and prepare RISC program */ 762 /* Allocating buffers and prepare RISC program */
@@ -773,7 +764,7 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
773 _line_size); 764 _line_size);
774 if (retval < 0) { 765 if (retval < 0) {
775 pr_err("%s: Failed to set up Audio upstream buffers!\n", 766 pr_err("%s: Failed to set up Audio upstream buffers!\n",
776 dev->name); 767 dev->name);
777 goto error; 768 goto error;
778 } 769 }
779 /* Start RISC engine */ 770 /* Start RISC engine */
diff --git a/drivers/media/video/cx25821/cx25821-audio.h b/drivers/media/video/cx25821/cx25821-audio.h
index 8eb55b7b88c..1fc2d24f511 100644
--- a/drivers/media/video/cx25821/cx25821-audio.h
+++ b/drivers/media/video/cx25821/cx25821-audio.h
@@ -23,39 +23,40 @@
23#ifndef __CX25821_AUDIO_H__ 23#ifndef __CX25821_AUDIO_H__
24#define __CX25821_AUDIO_H__ 24#define __CX25821_AUDIO_H__
25 25
26#define USE_RISC_NOOP 1 26#define USE_RISC_NOOP 1
27#define LINES_PER_BUFFER 15 27#define LINES_PER_BUFFER 15
28#define AUDIO_LINE_SIZE 128 28#define AUDIO_LINE_SIZE 128
29 29
30/* Number of buffer programs to use at once. */ 30/* Number of buffer programs to use at once. */
31#define NUMBER_OF_PROGRAMS 8 31#define NUMBER_OF_PROGRAMS 8
32 32
33/* 33/*
34 * Max size of the RISC program for a buffer. - worst case is 2 writes per line 34 * Max size of the RISC program for a buffer. - worst case is 2 writes per line
35 * Space is also added for the 4 no-op instructions added on the end. 35 * Space is also added for the 4 no-op instructions added on the end.
36 */ 36 */
37#ifndef USE_RISC_NOOP 37#ifndef USE_RISC_NOOP
38#define MAX_BUFFER_PROGRAM_SIZE \ 38#define MAX_BUFFER_PROGRAM_SIZE \
39 (2 * LINES_PER_BUFFER * RISC_WRITE_INSTRUCTION_SIZE + \ 39 (2 * LINES_PER_BUFFER * RISC_WRITE_INSTRUCTION_SIZE + \
40 RISC_WRITECR_INSTRUCTION_SIZE * 4) 40 RISC_WRITECR_INSTRUCTION_SIZE * 4)
41#endif 41#endif
42 42
43/* MAE 12 July 2005 Try to use NOOP RISC instruction instead */ 43/* MAE 12 July 2005 Try to use NOOP RISC instruction instead */
44#ifdef USE_RISC_NOOP 44#ifdef USE_RISC_NOOP
45#define MAX_BUFFER_PROGRAM_SIZE \ 45#define MAX_BUFFER_PROGRAM_SIZE \
46 (2 * LINES_PER_BUFFER * RISC_WRITE_INSTRUCTION_SIZE + \ 46 (2 * LINES_PER_BUFFER * RISC_WRITE_INSTRUCTION_SIZE + \
47 RISC_NOOP_INSTRUCTION_SIZE * 4) 47 RISC_NOOP_INSTRUCTION_SIZE * 4)
48#endif 48#endif
49 49
50/* Sizes of various instructions in bytes. Used when adding instructions. */ 50/* Sizes of various instructions in bytes. Used when adding instructions. */
51#define RISC_WRITE_INSTRUCTION_SIZE 12 51#define RISC_WRITE_INSTRUCTION_SIZE 12
52#define RISC_JUMP_INSTRUCTION_SIZE 12 52#define RISC_JUMP_INSTRUCTION_SIZE 12
53#define RISC_SKIP_INSTRUCTION_SIZE 4 53#define RISC_SKIP_INSTRUCTION_SIZE 4
54#define RISC_SYNC_INSTRUCTION_SIZE 4 54#define RISC_SYNC_INSTRUCTION_SIZE 4
55#define RISC_WRITECR_INSTRUCTION_SIZE 16 55#define RISC_WRITECR_INSTRUCTION_SIZE 16
56#define RISC_NOOP_INSTRUCTION_SIZE 4 56#define RISC_NOOP_INSTRUCTION_SIZE 4
57 57
58#define MAX_AUDIO_DMA_BUFFER_SIZE \ 58#define MAX_AUDIO_DMA_BUFFER_SIZE \
59(MAX_BUFFER_PROGRAM_SIZE * NUMBER_OF_PROGRAMS + RISC_SYNC_INSTRUCTION_SIZE) 59 (MAX_BUFFER_PROGRAM_SIZE * NUMBER_OF_PROGRAMS + \
60 RISC_SYNC_INSTRUCTION_SIZE)
60 61
61#endif 62#endif
diff --git a/drivers/media/video/cx25821/cx25821-cards.c b/drivers/media/video/cx25821/cx25821-cards.c
index 6ace60313b4..99988c98809 100644
--- a/drivers/media/video/cx25821/cx25821-cards.c
+++ b/drivers/media/video/cx25821/cx25821-cards.c
@@ -67,6 +67,6 @@ void cx25821_card_setup(struct cx25821_dev *dev)
67 if (dev->i2c_bus[0].i2c_rc == 0) { 67 if (dev->i2c_bus[0].i2c_rc == 0) {
68 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 68 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
69 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, 69 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
70 sizeof(eeprom)); 70 sizeof(eeprom));
71 } 71 }
72} 72}
diff --git a/drivers/media/video/cx25821/cx25821-core.c b/drivers/media/video/cx25821/cx25821-core.c
index a7fa38f9594..f617474f907 100644
--- a/drivers/media/video/cx25821/cx25821-core.c
+++ b/drivers/media/video/cx25821/cx25821-core.c
@@ -804,8 +804,8 @@ void cx25821_set_pixel_format(struct cx25821_dev *dev, int channel_select,
804 u32 format) 804 u32 format)
805{ 805{
806 if (channel_select <= 7 && channel_select >= 0) { 806 if (channel_select <= 7 && channel_select >= 0) {
807 cx_write(dev->channels[channel_select]. 807 cx_write(dev->channels[channel_select].sram_channels->pix_frmt,
808 sram_channels->pix_frmt, format); 808 format);
809 dev->channels[channel_select].pixel_formats = format; 809 dev->channels[channel_select].pixel_formats = format;
810 } 810 }
811} 811}
@@ -855,21 +855,19 @@ static void cx25821_initialize(struct cx25821_dev *dev)
855 } 855 }
856 856
857 cx25821_sram_channel_setup_audio(dev, 857 cx25821_sram_channel_setup_audio(dev,
858 dev->channels[SRAM_CH08].sram_channels, 858 dev->channels[SRAM_CH08].sram_channels, 128, 0);
859 128, 0);
860 859
861 cx25821_gpio_init(dev); 860 cx25821_gpio_init(dev);
862} 861}
863 862
864static int cx25821_get_resources(struct cx25821_dev *dev) 863static int cx25821_get_resources(struct cx25821_dev *dev)
865{ 864{
866 if (request_mem_region 865 if (request_mem_region(pci_resource_start(dev->pci, 0),
867 (pci_resource_start(dev->pci, 0), pci_resource_len(dev->pci, 0), 866 pci_resource_len(dev->pci, 0), dev->name))
868 dev->name))
869 return 0; 867 return 0;
870 868
871 pr_err("%s: can't get MMIO memory @ 0x%llx\n", 869 pr_err("%s: can't get MMIO memory @ 0x%llx\n",
872 dev->name, (unsigned long long)pci_resource_start(dev->pci, 0)); 870 dev->name, (unsigned long long)pci_resource_start(dev->pci, 0));
873 871
874 return -EBUSY; 872 return -EBUSY;
875} 873}
@@ -972,8 +970,7 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
972 dev->lmmio = ioremap(dev->base_io_addr, pci_resource_len(dev->pci, 0)); 970 dev->lmmio = ioremap(dev->base_io_addr, pci_resource_len(dev->pci, 0));
973 971
974 if (!dev->lmmio) { 972 if (!dev->lmmio) {
975 CX25821_ERR 973 CX25821_ERR("ioremap failed, maybe increasing __VMALLOC_RESERVE in page.h\n");
976 ("ioremap failed, maybe increasing __VMALLOC_RESERVE in page.h\n");
977 cx25821_iounmap(dev); 974 cx25821_iounmap(dev);
978 return -ENOMEM; 975 return -ENOMEM;
979 } 976 }
@@ -994,7 +991,7 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
994 * cx25821_i2c_register(&dev->i2c_bus[2]); */ 991 * cx25821_i2c_register(&dev->i2c_bus[2]); */
995 992
996 CX25821_INFO("i2c register! bus->i2c_rc = %d\n", 993 CX25821_INFO("i2c register! bus->i2c_rc = %d\n",
997 dev->i2c_bus[0].i2c_rc); 994 dev->i2c_bus[0].i2c_rc);
998 995
999 cx25821_card_setup(dev); 996 cx25821_card_setup(dev);
1000 997
@@ -1004,9 +1001,8 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
1004 cx25821_video_register(dev); 1001 cx25821_video_register(dev);
1005 1002
1006 /* register IOCTL device */ 1003 /* register IOCTL device */
1007 dev->ioctl_dev = 1004 dev->ioctl_dev = cx25821_vdev_init(dev, dev->pci,
1008 cx25821_vdev_init(dev, dev->pci, &cx25821_videoioctl_template, 1005 &cx25821_videoioctl_template, "video");
1009 "video");
1010 1006
1011 if (video_register_device 1007 if (video_register_device
1012 (dev->ioctl_dev, VFL_TYPE_GRABBER, VIDEO_IOCTL_CH) < 0) { 1008 (dev->ioctl_dev, VFL_TYPE_GRABBER, VIDEO_IOCTL_CH) < 0) {
@@ -1103,16 +1099,15 @@ static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist,
1103 } 1099 }
1104 if (bpl <= sg_dma_len(sg) - offset) { 1100 if (bpl <= sg_dma_len(sg) - offset) {
1105 /* fits into current chunk */ 1101 /* fits into current chunk */
1106 *(rp++) = 1102 *(rp++) = cpu_to_le32(RISC_WRITE | RISC_SOL | RISC_EOL |
1107 cpu_to_le32(RISC_WRITE | RISC_SOL | RISC_EOL | bpl); 1103 bpl);
1108 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset); 1104 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
1109 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 1105 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1110 offset += bpl; 1106 offset += bpl;
1111 } else { 1107 } else {
1112 /* scanline needs to be split */ 1108 /* scanline needs to be split */
1113 todo = bpl; 1109 todo = bpl;
1114 *(rp++) = 1110 *(rp++) = cpu_to_le32(RISC_WRITE | RISC_SOL |
1115 cpu_to_le32(RISC_WRITE | RISC_SOL |
1116 (sg_dma_len(sg) - offset)); 1111 (sg_dma_len(sg) - offset));
1117 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset); 1112 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
1118 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 1113 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
@@ -1120,8 +1115,8 @@ static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist,
1120 offset = 0; 1115 offset = 0;
1121 sg++; 1116 sg++;
1122 while (todo > sg_dma_len(sg)) { 1117 while (todo > sg_dma_len(sg)) {
1123 *(rp++) = 1118 *(rp++) = cpu_to_le32(RISC_WRITE |
1124 cpu_to_le32(RISC_WRITE | sg_dma_len(sg)); 1119 sg_dma_len(sg));
1125 *(rp++) = cpu_to_le32(sg_dma_address(sg)); 1120 *(rp++) = cpu_to_le32(sg_dma_address(sg));
1126 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 1121 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1127 todo -= sg_dma_len(sg); 1122 todo -= sg_dma_len(sg);
@@ -1160,8 +1155,8 @@ int cx25821_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
1160 can cause next bpl to start close to a page border. First DMA 1155 can cause next bpl to start close to a page border. First DMA
1161 region may be smaller than PAGE_SIZE */ 1156 region may be smaller than PAGE_SIZE */
1162 /* write and jump need and extra dword */ 1157 /* write and jump need and extra dword */
1163 instructions = 1158 instructions = fields * (1 + ((bpl + padding) * lines) / PAGE_SIZE +
1164 fields * (1 + ((bpl + padding) * lines) / PAGE_SIZE + lines); 1159 lines);
1165 instructions += 2; 1160 instructions += 2;
1166 rc = btcx_riscmem_alloc(pci, risc, instructions * 12); 1161 rc = btcx_riscmem_alloc(pci, risc, instructions * 12);
1167 1162
@@ -1215,8 +1210,8 @@ static __le32 *cx25821_risc_field_audio(__le32 * rp, struct scatterlist *sglist,
1215 1210
1216 if (bpl <= sg_dma_len(sg) - offset) { 1211 if (bpl <= sg_dma_len(sg) - offset) {
1217 /* fits into current chunk */ 1212 /* fits into current chunk */
1218 *(rp++) = 1213 *(rp++) = cpu_to_le32(RISC_WRITE | sol | RISC_EOL |
1219 cpu_to_le32(RISC_WRITE | sol | RISC_EOL | bpl); 1214 bpl);
1220 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset); 1215 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
1221 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 1216 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1222 offset += bpl; 1217 offset += bpl;
@@ -1224,7 +1219,7 @@ static __le32 *cx25821_risc_field_audio(__le32 * rp, struct scatterlist *sglist,
1224 /* scanline needs to be split */ 1219 /* scanline needs to be split */
1225 todo = bpl; 1220 todo = bpl;
1226 *(rp++) = cpu_to_le32(RISC_WRITE | sol | 1221 *(rp++) = cpu_to_le32(RISC_WRITE | sol |
1227 (sg_dma_len(sg) - offset)); 1222 (sg_dma_len(sg) - offset));
1228 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset); 1223 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
1229 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 1224 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1230 todo -= (sg_dma_len(sg) - offset); 1225 todo -= (sg_dma_len(sg) - offset);
@@ -1232,7 +1227,7 @@ static __le32 *cx25821_risc_field_audio(__le32 * rp, struct scatterlist *sglist,
1232 sg++; 1227 sg++;
1233 while (todo > sg_dma_len(sg)) { 1228 while (todo > sg_dma_len(sg)) {
1234 *(rp++) = cpu_to_le32(RISC_WRITE | 1229 *(rp++) = cpu_to_le32(RISC_WRITE |
1235 sg_dma_len(sg)); 1230 sg_dma_len(sg));
1236 *(rp++) = cpu_to_le32(sg_dma_address(sg)); 1231 *(rp++) = cpu_to_le32(sg_dma_address(sg));
1237 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 1232 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1238 todo -= sg_dma_len(sg); 1233 todo -= sg_dma_len(sg);
@@ -1339,8 +1334,8 @@ static irqreturn_t cx25821_irq(int irq, void *dev_id)
1339 sram_channels->int_stat); 1334 sram_channels->int_stat);
1340 1335
1341 if (vid_status) 1336 if (vid_status)
1342 handled += 1337 handled += cx25821_video_irq(dev, i,
1343 cx25821_video_irq(dev, i, vid_status); 1338 vid_status);
1344 1339
1345 cx_write(PCI_INT_STAT, mask[i]); 1340 cx_write(PCI_INT_STAT, mask[i]);
1346 } 1341 }
@@ -1427,9 +1422,8 @@ static int __devinit cx25821_initdev(struct pci_dev *pci_dev,
1427 goto fail_irq; 1422 goto fail_irq;
1428 } 1423 }
1429 1424
1430 err = 1425 err = request_irq(pci_dev->irq, cx25821_irq,
1431 request_irq(pci_dev->irq, cx25821_irq, IRQF_SHARED, 1426 IRQF_SHARED, dev->name, dev);
1432 dev->name, dev);
1433 1427
1434 if (err < 0) { 1428 if (err < 0) {
1435 pr_err("%s: can't get IRQ %d\n", dev->name, pci_dev->irq); 1429 pr_err("%s: can't get IRQ %d\n", dev->name, pci_dev->irq);
@@ -1512,6 +1506,5 @@ static void __exit cx25821_fini(void)
1512 pci_unregister_driver(&cx25821_pci_driver); 1506 pci_unregister_driver(&cx25821_pci_driver);
1513} 1507}
1514 1508
1515
1516module_init(cx25821_init); 1509module_init(cx25821_init);
1517module_exit(cx25821_fini); 1510module_exit(cx25821_fini);
diff --git a/drivers/media/video/cx25821/cx25821-i2c.c b/drivers/media/video/cx25821/cx25821-i2c.c
index 4d3d0ce4078..12d7300fa1e 100644
--- a/drivers/media/video/cx25821/cx25821-i2c.c
+++ b/drivers/media/video/cx25821/cx25821-i2c.c
@@ -252,8 +252,8 @@ static int i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
252 } else if (i + 1 < num && (msgs[i + 1].flags & I2C_M_RD) && 252 } else if (i + 1 < num && (msgs[i + 1].flags & I2C_M_RD) &&
253 msgs[i].addr == msgs[i + 1].addr) { 253 msgs[i].addr == msgs[i + 1].addr) {
254 /* write then read from same address */ 254 /* write then read from same address */
255 retval = 255 retval = i2c_sendbytes(i2c_adap, &msgs[i],
256 i2c_sendbytes(i2c_adap, &msgs[i], msgs[i + 1].len); 256 msgs[i + 1].len);
257 257
258 if (retval < 0) 258 if (retval < 0)
259 goto err; 259 goto err;
@@ -276,10 +276,8 @@ err:
276 276
277static u32 cx25821_functionality(struct i2c_adapter *adap) 277static u32 cx25821_functionality(struct i2c_adapter *adap)
278{ 278{
279 return I2C_FUNC_SMBUS_EMUL | 279 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C | I2C_FUNC_SMBUS_WORD_DATA |
280 I2C_FUNC_I2C | 280 I2C_FUNC_SMBUS_READ_WORD_DATA | I2C_FUNC_SMBUS_WRITE_WORD_DATA;
281 I2C_FUNC_SMBUS_WORD_DATA |
282 I2C_FUNC_SMBUS_READ_WORD_DATA | I2C_FUNC_SMBUS_WRITE_WORD_DATA;
283} 281}
284 282
285static struct i2c_algorithm cx25821_i2c_algo_template = { 283static struct i2c_algorithm cx25821_i2c_algo_template = {
@@ -300,7 +298,7 @@ static struct i2c_client cx25821_i2c_client_template = {
300 .name = "cx25821 internal", 298 .name = "cx25821 internal",
301}; 299};
302 300
303/* init + register i2c algo-bit adapter */ 301/* init + register i2c adapter */
304int cx25821_i2c_register(struct cx25821_i2c *bus) 302int cx25821_i2c_register(struct cx25821_i2c *bus)
305{ 303{
306 struct cx25821_dev *dev = bus->dev; 304 struct cx25821_dev *dev = bus->dev;
diff --git a/drivers/media/video/cx25821/cx25821-medusa-defines.h b/drivers/media/video/cx25821/cx25821-medusa-defines.h
index 60d197f5755..7a9e6470ba2 100644
--- a/drivers/media/video/cx25821/cx25821-medusa-defines.h
+++ b/drivers/media/video/cx25821/cx25821-medusa-defines.h
@@ -23,7 +23,7 @@
23#ifndef _MEDUSA_DEF_H_ 23#ifndef _MEDUSA_DEF_H_
24#define _MEDUSA_DEF_H_ 24#define _MEDUSA_DEF_H_
25 25
26/* Video deocder that we supported */ 26/* Video decoder that we supported */
27#define VDEC_A 0 27#define VDEC_A 0
28#define VDEC_B 1 28#define VDEC_B 1
29#define VDEC_C 2 29#define VDEC_C 2
@@ -34,9 +34,9 @@
34#define VDEC_H 7 34#define VDEC_H 7
35 35
36/* end of display sequence */ 36/* end of display sequence */
37#define END_OF_SEQ 0xF; 37#define END_OF_SEQ 0xF;
38 38
39/* registry string size */ 39/* registry string size */
40#define MAX_REGISTRY_SZ 40; 40#define MAX_REGISTRY_SZ 40;
41 41
42#endif 42#endif
diff --git a/drivers/media/video/cx25821/cx25821-medusa-reg.h b/drivers/media/video/cx25821/cx25821-medusa-reg.h
index 1c1c228352d..c98ac946b27 100644
--- a/drivers/media/video/cx25821/cx25821-medusa-reg.h
+++ b/drivers/media/video/cx25821/cx25821-medusa-reg.h
@@ -28,22 +28,22 @@
28#define HOST_REGISTER2 0x0001 28#define HOST_REGISTER2 0x0001
29 29
30/* Chip Configuration Registers */ 30/* Chip Configuration Registers */
31#define CHIP_CTRL 0x0100 31#define CHIP_CTRL 0x0100
32#define AFE_AB_CTRL 0x0104 32#define AFE_AB_CTRL 0x0104
33#define AFE_CD_CTRL 0x0108 33#define AFE_CD_CTRL 0x0108
34#define AFE_EF_CTRL 0x010C 34#define AFE_EF_CTRL 0x010C
35#define AFE_GH_CTRL 0x0110 35#define AFE_GH_CTRL 0x0110
36#define DENC_AB_CTRL 0x0114 36#define DENC_AB_CTRL 0x0114
37#define BYP_AB_CTRL 0x0118 37#define BYP_AB_CTRL 0x0118
38#define MON_A_CTRL 0x011C 38#define MON_A_CTRL 0x011C
39#define DISP_SEQ_A 0x0120 39#define DISP_SEQ_A 0x0120
40#define DISP_SEQ_B 0x0124 40#define DISP_SEQ_B 0x0124
41#define DISP_AB_CNT 0x0128 41#define DISP_AB_CNT 0x0128
42#define DISP_CD_CNT 0x012C 42#define DISP_CD_CNT 0x012C
43#define DISP_EF_CNT 0x0130 43#define DISP_EF_CNT 0x0130
44#define DISP_GH_CNT 0x0134 44#define DISP_GH_CNT 0x0134
45#define DISP_IJ_CNT 0x0138 45#define DISP_IJ_CNT 0x0138
46#define PIN_OE_CTRL 0x013C 46#define PIN_OE_CTRL 0x013C
47#define PIN_SPD_CTRL 0x0140 47#define PIN_SPD_CTRL 0x0140
48#define PIN_SPD_CTRL2 0x0144 48#define PIN_SPD_CTRL2 0x0144
49#define IRQ_STAT_CTRL 0x0148 49#define IRQ_STAT_CTRL 0x0148
@@ -51,8 +51,8 @@
51#define POWER_CTRL_CD 0x0150 51#define POWER_CTRL_CD 0x0150
52#define POWER_CTRL_EF 0x0154 52#define POWER_CTRL_EF 0x0154
53#define POWER_CTRL_GH 0x0158 53#define POWER_CTRL_GH 0x0158
54#define TUNE_CTRL 0x015C 54#define TUNE_CTRL 0x015C
55#define BIAS_CTRL 0x0160 55#define BIAS_CTRL 0x0160
56#define AFE_AB_DIAG_CTRL 0x0164 56#define AFE_AB_DIAG_CTRL 0x0164
57#define AFE_CD_DIAG_CTRL 0x0168 57#define AFE_CD_DIAG_CTRL 0x0168
58#define AFE_EF_DIAG_CTRL 0x016C 58#define AFE_EF_DIAG_CTRL 0x016C
@@ -61,17 +61,17 @@
61#define PLL_CD_DIAG_CTRL 0x0178 61#define PLL_CD_DIAG_CTRL 0x0178
62#define PLL_EF_DIAG_CTRL 0x017C 62#define PLL_EF_DIAG_CTRL 0x017C
63#define PLL_GH_DIAG_CTRL 0x0180 63#define PLL_GH_DIAG_CTRL 0x0180
64#define TEST_CTRL 0x0184 64#define TEST_CTRL 0x0184
65#define BIST_STAT 0x0188 65#define BIST_STAT 0x0188
66#define BIST_STAT2 0x018C 66#define BIST_STAT2 0x018C
67#define BIST_VID_PLL_AB_STAT 0x0190 67#define BIST_VID_PLL_AB_STAT 0x0190
68#define BIST_VID_PLL_CD_STAT 0x0194 68#define BIST_VID_PLL_CD_STAT 0x0194
69#define BIST_VID_PLL_EF_STAT 0x0198 69#define BIST_VID_PLL_EF_STAT 0x0198
70#define BIST_VID_PLL_GH_STAT 0x019C 70#define BIST_VID_PLL_GH_STAT 0x019C
71#define DLL_DIAG_CTRL 0x01A0 71#define DLL_DIAG_CTRL 0x01A0
72#define DEV_CH_ID_CTRL 0x01A4 72#define DEV_CH_ID_CTRL 0x01A4
73#define ABIST_CTRL_STATUS 0x01A8 73#define ABIST_CTRL_STATUS 0x01A8
74#define ABIST_FREQ 0x01AC 74#define ABIST_FREQ 0x01AC
75#define ABIST_GOERT_SHIFT 0x01B0 75#define ABIST_GOERT_SHIFT 0x01B0
76#define ABIST_COEF12 0x01B4 76#define ABIST_COEF12 0x01B4
77#define ABIST_COEF34 0x01B8 77#define ABIST_COEF34 0x01B8
@@ -92,357 +92,357 @@
92#define ABIST_CLAMP_E 0x01F4 92#define ABIST_CLAMP_E 0x01F4
93#define ABIST_CLAMP_F 0x01F8 93#define ABIST_CLAMP_F 0x01F8
94 94
95/* Digital Video Encoder A Registers */ 95/* Digital Video Encoder A Registers */
96#define DENC_A_REG_1 0x0200 96#define DENC_A_REG_1 0x0200
97#define DENC_A_REG_2 0x0204 97#define DENC_A_REG_2 0x0204
98#define DENC_A_REG_3 0x0208 98#define DENC_A_REG_3 0x0208
99#define DENC_A_REG_4 0x020C 99#define DENC_A_REG_4 0x020C
100#define DENC_A_REG_5 0x0210 100#define DENC_A_REG_5 0x0210
101#define DENC_A_REG_6 0x0214 101#define DENC_A_REG_6 0x0214
102#define DENC_A_REG_7 0x0218 102#define DENC_A_REG_7 0x0218
103#define DENC_A_REG_8 0x021C 103#define DENC_A_REG_8 0x021C
104 104
105/* Digital Video Encoder B Registers */ 105/* Digital Video Encoder B Registers */
106#define DENC_B_REG_1 0x0300 106#define DENC_B_REG_1 0x0300
107#define DENC_B_REG_2 0x0304 107#define DENC_B_REG_2 0x0304
108#define DENC_B_REG_3 0x0308 108#define DENC_B_REG_3 0x0308
109#define DENC_B_REG_4 0x030C 109#define DENC_B_REG_4 0x030C
110#define DENC_B_REG_5 0x0310 110#define DENC_B_REG_5 0x0310
111#define DENC_B_REG_6 0x0314 111#define DENC_B_REG_6 0x0314
112#define DENC_B_REG_7 0x0318 112#define DENC_B_REG_7 0x0318
113#define DENC_B_REG_8 0x031C 113#define DENC_B_REG_8 0x031C
114 114
115/* Video Decoder A Registers */ 115/* Video Decoder A Registers */
116#define MODE_CTRL 0x1000 116#define MODE_CTRL 0x1000
117#define OUT_CTRL1 0x1004 117#define OUT_CTRL1 0x1004
118#define OUT_CTRL_NS 0x1008 118#define OUT_CTRL_NS 0x1008
119#define GEN_STAT 0x100C 119#define GEN_STAT 0x100C
120#define INT_STAT_MASK 0x1010 120#define INT_STAT_MASK 0x1010
121#define LUMA_CTRL 0x1014 121#define LUMA_CTRL 0x1014
122#define CHROMA_CTRL 0x1018 122#define CHROMA_CTRL 0x1018
123#define CRUSH_CTRL 0x101C 123#define CRUSH_CTRL 0x101C
124#define HORIZ_TIM_CTRL 0x1020 124#define HORIZ_TIM_CTRL 0x1020
125#define VERT_TIM_CTRL 0x1024 125#define VERT_TIM_CTRL 0x1024
126#define MISC_TIM_CTRL 0x1028 126#define MISC_TIM_CTRL 0x1028
127#define FIELD_COUNT 0x102C 127#define FIELD_COUNT 0x102C
128#define HSCALE_CTRL 0x1030 128#define HSCALE_CTRL 0x1030
129#define VSCALE_CTRL 0x1034 129#define VSCALE_CTRL 0x1034
130#define MAN_VGA_CTRL 0x1038 130#define MAN_VGA_CTRL 0x1038
131#define MAN_AGC_CTRL 0x103C 131#define MAN_AGC_CTRL 0x103C
132#define DFE_CTRL1 0x1040 132#define DFE_CTRL1 0x1040
133#define DFE_CTRL2 0x1044 133#define DFE_CTRL2 0x1044
134#define DFE_CTRL3 0x1048 134#define DFE_CTRL3 0x1048
135#define PLL_CTRL 0x104C 135#define PLL_CTRL 0x104C
136#define PLL_CTRL_FAST 0x1050 136#define PLL_CTRL_FAST 0x1050
137#define HTL_CTRL 0x1054 137#define HTL_CTRL 0x1054
138#define SRC_CFG 0x1058 138#define SRC_CFG 0x1058
139#define SC_STEP_SIZE 0x105C 139#define SC_STEP_SIZE 0x105C
140#define SC_CONVERGE_CTRL 0x1060 140#define SC_CONVERGE_CTRL 0x1060
141#define SC_LOOP_CTRL 0x1064 141#define SC_LOOP_CTRL 0x1064
142#define COMB_2D_HFS_CFG 0x1068 142#define COMB_2D_HFS_CFG 0x1068
143#define COMB_2D_HFD_CFG 0x106C 143#define COMB_2D_HFD_CFG 0x106C
144#define COMB_2D_LF_CFG 0x1070 144#define COMB_2D_LF_CFG 0x1070
145#define COMB_2D_BLEND 0x1074 145#define COMB_2D_BLEND 0x1074
146#define COMB_MISC_CTRL 0x1078 146#define COMB_MISC_CTRL 0x1078
147#define COMB_FLAT_THRESH_CTRL 0x107C 147#define COMB_FLAT_THRESH_CTRL 0x107C
148#define COMB_TEST 0x1080 148#define COMB_TEST 0x1080
149#define BP_MISC_CTRL 0x1084 149#define BP_MISC_CTRL 0x1084
150#define VCR_DET_CTRL 0x1088 150#define VCR_DET_CTRL 0x1088
151#define NOISE_DET_CTRL 0x108C 151#define NOISE_DET_CTRL 0x108C
152#define COMB_FLAT_NOISE_CTRL 0x1090 152#define COMB_FLAT_NOISE_CTRL 0x1090
153#define VERSION 0x11F8 153#define VERSION 0x11F8
154#define SOFT_RST_CTRL 0x11FC 154#define SOFT_RST_CTRL 0x11FC
155 155
156/* Video Decoder B Registers */ 156/* Video Decoder B Registers */
157#define VDEC_B_MODE_CTRL 0x1200 157#define VDEC_B_MODE_CTRL 0x1200
158#define VDEC_B_OUT_CTRL1 0x1204 158#define VDEC_B_OUT_CTRL1 0x1204
159#define VDEC_B_OUT_CTRL_NS 0x1208 159#define VDEC_B_OUT_CTRL_NS 0x1208
160#define VDEC_B_GEN_STAT 0x120C 160#define VDEC_B_GEN_STAT 0x120C
161#define VDEC_B_INT_STAT_MASK 0x1210 161#define VDEC_B_INT_STAT_MASK 0x1210
162#define VDEC_B_LUMA_CTRL 0x1214 162#define VDEC_B_LUMA_CTRL 0x1214
163#define VDEC_B_CHROMA_CTRL 0x1218 163#define VDEC_B_CHROMA_CTRL 0x1218
164#define VDEC_B_CRUSH_CTRL 0x121C 164#define VDEC_B_CRUSH_CTRL 0x121C
165#define VDEC_B_HORIZ_TIM_CTRL 0x1220 165#define VDEC_B_HORIZ_TIM_CTRL 0x1220
166#define VDEC_B_VERT_TIM_CTRL 0x1224 166#define VDEC_B_VERT_TIM_CTRL 0x1224
167#define VDEC_B_MISC_TIM_CTRL 0x1228 167#define VDEC_B_MISC_TIM_CTRL 0x1228
168#define VDEC_B_FIELD_COUNT 0x122C 168#define VDEC_B_FIELD_COUNT 0x122C
169#define VDEC_B_HSCALE_CTRL 0x1230 169#define VDEC_B_HSCALE_CTRL 0x1230
170#define VDEC_B_VSCALE_CTRL 0x1234 170#define VDEC_B_VSCALE_CTRL 0x1234
171#define VDEC_B_MAN_VGA_CTRL 0x1238 171#define VDEC_B_MAN_VGA_CTRL 0x1238
172#define VDEC_B_MAN_AGC_CTRL 0x123C 172#define VDEC_B_MAN_AGC_CTRL 0x123C
173#define VDEC_B_DFE_CTRL1 0x1240 173#define VDEC_B_DFE_CTRL1 0x1240
174#define VDEC_B_DFE_CTRL2 0x1244 174#define VDEC_B_DFE_CTRL2 0x1244
175#define VDEC_B_DFE_CTRL3 0x1248 175#define VDEC_B_DFE_CTRL3 0x1248
176#define VDEC_B_PLL_CTRL 0x124C 176#define VDEC_B_PLL_CTRL 0x124C
177#define VDEC_B_PLL_CTRL_FAST 0x1250 177#define VDEC_B_PLL_CTRL_FAST 0x1250
178#define VDEC_B_HTL_CTRL 0x1254 178#define VDEC_B_HTL_CTRL 0x1254
179#define VDEC_B_SRC_CFG 0x1258 179#define VDEC_B_SRC_CFG 0x1258
180#define VDEC_B_SC_STEP_SIZE 0x125C 180#define VDEC_B_SC_STEP_SIZE 0x125C
181#define VDEC_B_SC_CONVERGE_CTRL 0x1260 181#define VDEC_B_SC_CONVERGE_CTRL 0x1260
182#define VDEC_B_SC_LOOP_CTRL 0x1264 182#define VDEC_B_SC_LOOP_CTRL 0x1264
183#define VDEC_B_COMB_2D_HFS_CFG 0x1268 183#define VDEC_B_COMB_2D_HFS_CFG 0x1268
184#define VDEC_B_COMB_2D_HFD_CFG 0x126C 184#define VDEC_B_COMB_2D_HFD_CFG 0x126C
185#define VDEC_B_COMB_2D_LF_CFG 0x1270 185#define VDEC_B_COMB_2D_LF_CFG 0x1270
186#define VDEC_B_COMB_2D_BLEND 0x1274 186#define VDEC_B_COMB_2D_BLEND 0x1274
187#define VDEC_B_COMB_MISC_CTRL 0x1278 187#define VDEC_B_COMB_MISC_CTRL 0x1278
188#define VDEC_B_COMB_FLAT_THRESH_CTRL 0x127C 188#define VDEC_B_COMB_FLAT_THRESH_CTRL 0x127C
189#define VDEC_B_COMB_TEST 0x1280 189#define VDEC_B_COMB_TEST 0x1280
190#define VDEC_B_BP_MISC_CTRL 0x1284 190#define VDEC_B_BP_MISC_CTRL 0x1284
191#define VDEC_B_VCR_DET_CTRL 0x1288 191#define VDEC_B_VCR_DET_CTRL 0x1288
192#define VDEC_B_NOISE_DET_CTRL 0x128C 192#define VDEC_B_NOISE_DET_CTRL 0x128C
193#define VDEC_B_COMB_FLAT_NOISE_CTRL 0x1290 193#define VDEC_B_COMB_FLAT_NOISE_CTRL 0x1290
194#define VDEC_B_VERSION 0x13F8 194#define VDEC_B_VERSION 0x13F8
195#define VDEC_B_SOFT_RST_CTRL 0x13FC 195#define VDEC_B_SOFT_RST_CTRL 0x13FC
196 196
197/* Video Decoder C Registers */ 197/* Video Decoder C Registers */
198#define VDEC_C_MODE_CTRL 0x1400 198#define VDEC_C_MODE_CTRL 0x1400
199#define VDEC_C_OUT_CTRL1 0x1404 199#define VDEC_C_OUT_CTRL1 0x1404
200#define VDEC_C_OUT_CTRL_NS 0x1408 200#define VDEC_C_OUT_CTRL_NS 0x1408
201#define VDEC_C_GEN_STAT 0x140C 201#define VDEC_C_GEN_STAT 0x140C
202#define VDEC_C_INT_STAT_MASK 0x1410 202#define VDEC_C_INT_STAT_MASK 0x1410
203#define VDEC_C_LUMA_CTRL 0x1414 203#define VDEC_C_LUMA_CTRL 0x1414
204#define VDEC_C_CHROMA_CTRL 0x1418 204#define VDEC_C_CHROMA_CTRL 0x1418
205#define VDEC_C_CRUSH_CTRL 0x141C 205#define VDEC_C_CRUSH_CTRL 0x141C
206#define VDEC_C_HORIZ_TIM_CTRL 0x1420 206#define VDEC_C_HORIZ_TIM_CTRL 0x1420
207#define VDEC_C_VERT_TIM_CTRL 0x1424 207#define VDEC_C_VERT_TIM_CTRL 0x1424
208#define VDEC_C_MISC_TIM_CTRL 0x1428 208#define VDEC_C_MISC_TIM_CTRL 0x1428
209#define VDEC_C_FIELD_COUNT 0x142C 209#define VDEC_C_FIELD_COUNT 0x142C
210#define VDEC_C_HSCALE_CTRL 0x1430 210#define VDEC_C_HSCALE_CTRL 0x1430
211#define VDEC_C_VSCALE_CTRL 0x1434 211#define VDEC_C_VSCALE_CTRL 0x1434
212#define VDEC_C_MAN_VGA_CTRL 0x1438 212#define VDEC_C_MAN_VGA_CTRL 0x1438
213#define VDEC_C_MAN_AGC_CTRL 0x143C 213#define VDEC_C_MAN_AGC_CTRL 0x143C
214#define VDEC_C_DFE_CTRL1 0x1440 214#define VDEC_C_DFE_CTRL1 0x1440
215#define VDEC_C_DFE_CTRL2 0x1444 215#define VDEC_C_DFE_CTRL2 0x1444
216#define VDEC_C_DFE_CTRL3 0x1448 216#define VDEC_C_DFE_CTRL3 0x1448
217#define VDEC_C_PLL_CTRL 0x144C 217#define VDEC_C_PLL_CTRL 0x144C
218#define VDEC_C_PLL_CTRL_FAST 0x1450 218#define VDEC_C_PLL_CTRL_FAST 0x1450
219#define VDEC_C_HTL_CTRL 0x1454 219#define VDEC_C_HTL_CTRL 0x1454
220#define VDEC_C_SRC_CFG 0x1458 220#define VDEC_C_SRC_CFG 0x1458
221#define VDEC_C_SC_STEP_SIZE 0x145C 221#define VDEC_C_SC_STEP_SIZE 0x145C
222#define VDEC_C_SC_CONVERGE_CTRL 0x1460 222#define VDEC_C_SC_CONVERGE_CTRL 0x1460
223#define VDEC_C_SC_LOOP_CTRL 0x1464 223#define VDEC_C_SC_LOOP_CTRL 0x1464
224#define VDEC_C_COMB_2D_HFS_CFG 0x1468 224#define VDEC_C_COMB_2D_HFS_CFG 0x1468
225#define VDEC_C_COMB_2D_HFD_CFG 0x146C 225#define VDEC_C_COMB_2D_HFD_CFG 0x146C
226#define VDEC_C_COMB_2D_LF_CFG 0x1470 226#define VDEC_C_COMB_2D_LF_CFG 0x1470
227#define VDEC_C_COMB_2D_BLEND 0x1474 227#define VDEC_C_COMB_2D_BLEND 0x1474
228#define VDEC_C_COMB_MISC_CTRL 0x1478 228#define VDEC_C_COMB_MISC_CTRL 0x1478
229#define VDEC_C_COMB_FLAT_THRESH_CTRL 0x147C 229#define VDEC_C_COMB_FLAT_THRESH_CTRL 0x147C
230#define VDEC_C_COMB_TEST 0x1480 230#define VDEC_C_COMB_TEST 0x1480
231#define VDEC_C_BP_MISC_CTRL 0x1484 231#define VDEC_C_BP_MISC_CTRL 0x1484
232#define VDEC_C_VCR_DET_CTRL 0x1488 232#define VDEC_C_VCR_DET_CTRL 0x1488
233#define VDEC_C_NOISE_DET_CTRL 0x148C 233#define VDEC_C_NOISE_DET_CTRL 0x148C
234#define VDEC_C_COMB_FLAT_NOISE_CTRL 0x1490 234#define VDEC_C_COMB_FLAT_NOISE_CTRL 0x1490
235#define VDEC_C_VERSION 0x15F8 235#define VDEC_C_VERSION 0x15F8
236#define VDEC_C_SOFT_RST_CTRL 0x15FC 236#define VDEC_C_SOFT_RST_CTRL 0x15FC
237 237
238/* Video Decoder D Registers */ 238/* Video Decoder D Registers */
239#define VDEC_D_MODE_CTRL 0x1600 239#define VDEC_D_MODE_CTRL 0x1600
240#define VDEC_D_OUT_CTRL1 0x1604 240#define VDEC_D_OUT_CTRL1 0x1604
241#define VDEC_D_OUT_CTRL_NS 0x1608 241#define VDEC_D_OUT_CTRL_NS 0x1608
242#define VDEC_D_GEN_STAT 0x160C 242#define VDEC_D_GEN_STAT 0x160C
243#define VDEC_D_INT_STAT_MASK 0x1610 243#define VDEC_D_INT_STAT_MASK 0x1610
244#define VDEC_D_LUMA_CTRL 0x1614 244#define VDEC_D_LUMA_CTRL 0x1614
245#define VDEC_D_CHROMA_CTRL 0x1618 245#define VDEC_D_CHROMA_CTRL 0x1618
246#define VDEC_D_CRUSH_CTRL 0x161C 246#define VDEC_D_CRUSH_CTRL 0x161C
247#define VDEC_D_HORIZ_TIM_CTRL 0x1620 247#define VDEC_D_HORIZ_TIM_CTRL 0x1620
248#define VDEC_D_VERT_TIM_CTRL 0x1624 248#define VDEC_D_VERT_TIM_CTRL 0x1624
249#define VDEC_D_MISC_TIM_CTRL 0x1628 249#define VDEC_D_MISC_TIM_CTRL 0x1628
250#define VDEC_D_FIELD_COUNT 0x162C 250#define VDEC_D_FIELD_COUNT 0x162C
251#define VDEC_D_HSCALE_CTRL 0x1630 251#define VDEC_D_HSCALE_CTRL 0x1630
252#define VDEC_D_VSCALE_CTRL 0x1634 252#define VDEC_D_VSCALE_CTRL 0x1634
253#define VDEC_D_MAN_VGA_CTRL 0x1638 253#define VDEC_D_MAN_VGA_CTRL 0x1638
254#define VDEC_D_MAN_AGC_CTRL 0x163C 254#define VDEC_D_MAN_AGC_CTRL 0x163C
255#define VDEC_D_DFE_CTRL1 0x1640 255#define VDEC_D_DFE_CTRL1 0x1640
256#define VDEC_D_DFE_CTRL2 0x1644 256#define VDEC_D_DFE_CTRL2 0x1644
257#define VDEC_D_DFE_CTRL3 0x1648 257#define VDEC_D_DFE_CTRL3 0x1648
258#define VDEC_D_PLL_CTRL 0x164C 258#define VDEC_D_PLL_CTRL 0x164C
259#define VDEC_D_PLL_CTRL_FAST 0x1650 259#define VDEC_D_PLL_CTRL_FAST 0x1650
260#define VDEC_D_HTL_CTRL 0x1654 260#define VDEC_D_HTL_CTRL 0x1654
261#define VDEC_D_SRC_CFG 0x1658 261#define VDEC_D_SRC_CFG 0x1658
262#define VDEC_D_SC_STEP_SIZE 0x165C 262#define VDEC_D_SC_STEP_SIZE 0x165C
263#define VDEC_D_SC_CONVERGE_CTRL 0x1660 263#define VDEC_D_SC_CONVERGE_CTRL 0x1660
264#define VDEC_D_SC_LOOP_CTRL 0x1664 264#define VDEC_D_SC_LOOP_CTRL 0x1664
265#define VDEC_D_COMB_2D_HFS_CFG 0x1668 265#define VDEC_D_COMB_2D_HFS_CFG 0x1668
266#define VDEC_D_COMB_2D_HFD_CFG 0x166C 266#define VDEC_D_COMB_2D_HFD_CFG 0x166C
267#define VDEC_D_COMB_2D_LF_CFG 0x1670 267#define VDEC_D_COMB_2D_LF_CFG 0x1670
268#define VDEC_D_COMB_2D_BLEND 0x1674 268#define VDEC_D_COMB_2D_BLEND 0x1674
269#define VDEC_D_COMB_MISC_CTRL 0x1678 269#define VDEC_D_COMB_MISC_CTRL 0x1678
270#define VDEC_D_COMB_FLAT_THRESH_CTRL 0x167C 270#define VDEC_D_COMB_FLAT_THRESH_CTRL 0x167C
271#define VDEC_D_COMB_TEST 0x1680 271#define VDEC_D_COMB_TEST 0x1680
272#define VDEC_D_BP_MISC_CTRL 0x1684 272#define VDEC_D_BP_MISC_CTRL 0x1684
273#define VDEC_D_VCR_DET_CTRL 0x1688 273#define VDEC_D_VCR_DET_CTRL 0x1688
274#define VDEC_D_NOISE_DET_CTRL 0x168C 274#define VDEC_D_NOISE_DET_CTRL 0x168C
275#define VDEC_D_COMB_FLAT_NOISE_CTRL 0x1690 275#define VDEC_D_COMB_FLAT_NOISE_CTRL 0x1690
276#define VDEC_D_VERSION 0x17F8 276#define VDEC_D_VERSION 0x17F8
277#define VDEC_D_SOFT_RST_CTRL 0x17FC 277#define VDEC_D_SOFT_RST_CTRL 0x17FC
278 278
279/* Video Decoder E Registers */ 279/* Video Decoder E Registers */
280#define VDEC_E_MODE_CTRL 0x1800 280#define VDEC_E_MODE_CTRL 0x1800
281#define VDEC_E_OUT_CTRL1 0x1804 281#define VDEC_E_OUT_CTRL1 0x1804
282#define VDEC_E_OUT_CTRL_NS 0x1808 282#define VDEC_E_OUT_CTRL_NS 0x1808
283#define VDEC_E_GEN_STAT 0x180C 283#define VDEC_E_GEN_STAT 0x180C
284#define VDEC_E_INT_STAT_MASK 0x1810 284#define VDEC_E_INT_STAT_MASK 0x1810
285#define VDEC_E_LUMA_CTRL 0x1814 285#define VDEC_E_LUMA_CTRL 0x1814
286#define VDEC_E_CHROMA_CTRL 0x1818 286#define VDEC_E_CHROMA_CTRL 0x1818
287#define VDEC_E_CRUSH_CTRL 0x181C 287#define VDEC_E_CRUSH_CTRL 0x181C
288#define VDEC_E_HORIZ_TIM_CTRL 0x1820 288#define VDEC_E_HORIZ_TIM_CTRL 0x1820
289#define VDEC_E_VERT_TIM_CTRL 0x1824 289#define VDEC_E_VERT_TIM_CTRL 0x1824
290#define VDEC_E_MISC_TIM_CTRL 0x1828 290#define VDEC_E_MISC_TIM_CTRL 0x1828
291#define VDEC_E_FIELD_COUNT 0x182C 291#define VDEC_E_FIELD_COUNT 0x182C
292#define VDEC_E_HSCALE_CTRL 0x1830 292#define VDEC_E_HSCALE_CTRL 0x1830
293#define VDEC_E_VSCALE_CTRL 0x1834 293#define VDEC_E_VSCALE_CTRL 0x1834
294#define VDEC_E_MAN_VGA_CTRL 0x1838 294#define VDEC_E_MAN_VGA_CTRL 0x1838
295#define VDEC_E_MAN_AGC_CTRL 0x183C 295#define VDEC_E_MAN_AGC_CTRL 0x183C
296#define VDEC_E_DFE_CTRL1 0x1840 296#define VDEC_E_DFE_CTRL1 0x1840
297#define VDEC_E_DFE_CTRL2 0x1844 297#define VDEC_E_DFE_CTRL2 0x1844
298#define VDEC_E_DFE_CTRL3 0x1848 298#define VDEC_E_DFE_CTRL3 0x1848
299#define VDEC_E_PLL_CTRL 0x184C 299#define VDEC_E_PLL_CTRL 0x184C
300#define VDEC_E_PLL_CTRL_FAST 0x1850 300#define VDEC_E_PLL_CTRL_FAST 0x1850
301#define VDEC_E_HTL_CTRL 0x1854 301#define VDEC_E_HTL_CTRL 0x1854
302#define VDEC_E_SRC_CFG 0x1858 302#define VDEC_E_SRC_CFG 0x1858
303#define VDEC_E_SC_STEP_SIZE 0x185C 303#define VDEC_E_SC_STEP_SIZE 0x185C
304#define VDEC_E_SC_CONVERGE_CTRL 0x1860 304#define VDEC_E_SC_CONVERGE_CTRL 0x1860
305#define VDEC_E_SC_LOOP_CTRL 0x1864 305#define VDEC_E_SC_LOOP_CTRL 0x1864
306#define VDEC_E_COMB_2D_HFS_CFG 0x1868 306#define VDEC_E_COMB_2D_HFS_CFG 0x1868
307#define VDEC_E_COMB_2D_HFD_CFG 0x186C 307#define VDEC_E_COMB_2D_HFD_CFG 0x186C
308#define VDEC_E_COMB_2D_LF_CFG 0x1870 308#define VDEC_E_COMB_2D_LF_CFG 0x1870
309#define VDEC_E_COMB_2D_BLEND 0x1874 309#define VDEC_E_COMB_2D_BLEND 0x1874
310#define VDEC_E_COMB_MISC_CTRL 0x1878 310#define VDEC_E_COMB_MISC_CTRL 0x1878
311#define VDEC_E_COMB_FLAT_THRESH_CTRL 0x187C 311#define VDEC_E_COMB_FLAT_THRESH_CTRL 0x187C
312#define VDEC_E_COMB_TEST 0x1880 312#define VDEC_E_COMB_TEST 0x1880
313#define VDEC_E_BP_MISC_CTRL 0x1884 313#define VDEC_E_BP_MISC_CTRL 0x1884
314#define VDEC_E_VCR_DET_CTRL 0x1888 314#define VDEC_E_VCR_DET_CTRL 0x1888
315#define VDEC_E_NOISE_DET_CTRL 0x188C 315#define VDEC_E_NOISE_DET_CTRL 0x188C
316#define VDEC_E_COMB_FLAT_NOISE_CTRL 0x1890 316#define VDEC_E_COMB_FLAT_NOISE_CTRL 0x1890
317#define VDEC_E_VERSION 0x19F8 317#define VDEC_E_VERSION 0x19F8
318#define VDEC_E_SOFT_RST_CTRL 0x19FC 318#define VDEC_E_SOFT_RST_CTRL 0x19FC
319 319
320/* Video Decoder F Registers */ 320/* Video Decoder F Registers */
321#define VDEC_F_MODE_CTRL 0x1A00 321#define VDEC_F_MODE_CTRL 0x1A00
322#define VDEC_F_OUT_CTRL1 0x1A04 322#define VDEC_F_OUT_CTRL1 0x1A04
323#define VDEC_F_OUT_CTRL_NS 0x1A08 323#define VDEC_F_OUT_CTRL_NS 0x1A08
324#define VDEC_F_GEN_STAT 0x1A0C 324#define VDEC_F_GEN_STAT 0x1A0C
325#define VDEC_F_INT_STAT_MASK 0x1A10 325#define VDEC_F_INT_STAT_MASK 0x1A10
326#define VDEC_F_LUMA_CTRL 0x1A14 326#define VDEC_F_LUMA_CTRL 0x1A14
327#define VDEC_F_CHROMA_CTRL 0x1A18 327#define VDEC_F_CHROMA_CTRL 0x1A18
328#define VDEC_F_CRUSH_CTRL 0x1A1C 328#define VDEC_F_CRUSH_CTRL 0x1A1C
329#define VDEC_F_HORIZ_TIM_CTRL 0x1A20 329#define VDEC_F_HORIZ_TIM_CTRL 0x1A20
330#define VDEC_F_VERT_TIM_CTRL 0x1A24 330#define VDEC_F_VERT_TIM_CTRL 0x1A24
331#define VDEC_F_MISC_TIM_CTRL 0x1A28 331#define VDEC_F_MISC_TIM_CTRL 0x1A28
332#define VDEC_F_FIELD_COUNT 0x1A2C 332#define VDEC_F_FIELD_COUNT 0x1A2C
333#define VDEC_F_HSCALE_CTRL 0x1A30 333#define VDEC_F_HSCALE_CTRL 0x1A30
334#define VDEC_F_VSCALE_CTRL 0x1A34 334#define VDEC_F_VSCALE_CTRL 0x1A34
335#define VDEC_F_MAN_VGA_CTRL 0x1A38 335#define VDEC_F_MAN_VGA_CTRL 0x1A38
336#define VDEC_F_MAN_AGC_CTRL 0x1A3C 336#define VDEC_F_MAN_AGC_CTRL 0x1A3C
337#define VDEC_F_DFE_CTRL1 0x1A40 337#define VDEC_F_DFE_CTRL1 0x1A40
338#define VDEC_F_DFE_CTRL2 0x1A44 338#define VDEC_F_DFE_CTRL2 0x1A44
339#define VDEC_F_DFE_CTRL3 0x1A48 339#define VDEC_F_DFE_CTRL3 0x1A48
340#define VDEC_F_PLL_CTRL 0x1A4C 340#define VDEC_F_PLL_CTRL 0x1A4C
341#define VDEC_F_PLL_CTRL_FAST 0x1A50 341#define VDEC_F_PLL_CTRL_FAST 0x1A50
342#define VDEC_F_HTL_CTRL 0x1A54 342#define VDEC_F_HTL_CTRL 0x1A54
343#define VDEC_F_SRC_CFG 0x1A58 343#define VDEC_F_SRC_CFG 0x1A58
344#define VDEC_F_SC_STEP_SIZE 0x1A5C 344#define VDEC_F_SC_STEP_SIZE 0x1A5C
345#define VDEC_F_SC_CONVERGE_CTRL 0x1A60 345#define VDEC_F_SC_CONVERGE_CTRL 0x1A60
346#define VDEC_F_SC_LOOP_CTRL 0x1A64 346#define VDEC_F_SC_LOOP_CTRL 0x1A64
347#define VDEC_F_COMB_2D_HFS_CFG 0x1A68 347#define VDEC_F_COMB_2D_HFS_CFG 0x1A68
348#define VDEC_F_COMB_2D_HFD_CFG 0x1A6C 348#define VDEC_F_COMB_2D_HFD_CFG 0x1A6C
349#define VDEC_F_COMB_2D_LF_CFG 0x1A70 349#define VDEC_F_COMB_2D_LF_CFG 0x1A70
350#define VDEC_F_COMB_2D_BLEND 0x1A74 350#define VDEC_F_COMB_2D_BLEND 0x1A74
351#define VDEC_F_COMB_MISC_CTRL 0x1A78 351#define VDEC_F_COMB_MISC_CTRL 0x1A78
352#define VDEC_F_COMB_FLAT_THRESH_CTRL 0x1A7C 352#define VDEC_F_COMB_FLAT_THRESH_CTRL 0x1A7C
353#define VDEC_F_COMB_TEST 0x1A80 353#define VDEC_F_COMB_TEST 0x1A80
354#define VDEC_F_BP_MISC_CTRL 0x1A84 354#define VDEC_F_BP_MISC_CTRL 0x1A84
355#define VDEC_F_VCR_DET_CTRL 0x1A88 355#define VDEC_F_VCR_DET_CTRL 0x1A88
356#define VDEC_F_NOISE_DET_CTRL 0x1A8C 356#define VDEC_F_NOISE_DET_CTRL 0x1A8C
357#define VDEC_F_COMB_FLAT_NOISE_CTRL 0x1A90 357#define VDEC_F_COMB_FLAT_NOISE_CTRL 0x1A90
358#define VDEC_F_VERSION 0x1BF8 358#define VDEC_F_VERSION 0x1BF8
359#define VDEC_F_SOFT_RST_CTRL 0x1BFC 359#define VDEC_F_SOFT_RST_CTRL 0x1BFC
360 360
361/* Video Decoder G Registers */ 361/* Video Decoder G Registers */
362#define VDEC_G_MODE_CTRL 0x1C00 362#define VDEC_G_MODE_CTRL 0x1C00
363#define VDEC_G_OUT_CTRL1 0x1C04 363#define VDEC_G_OUT_CTRL1 0x1C04
364#define VDEC_G_OUT_CTRL_NS 0x1C08 364#define VDEC_G_OUT_CTRL_NS 0x1C08
365#define VDEC_G_GEN_STAT 0x1C0C 365#define VDEC_G_GEN_STAT 0x1C0C
366#define VDEC_G_INT_STAT_MASK 0x1C10 366#define VDEC_G_INT_STAT_MASK 0x1C10
367#define VDEC_G_LUMA_CTRL 0x1C14 367#define VDEC_G_LUMA_CTRL 0x1C14
368#define VDEC_G_CHROMA_CTRL 0x1C18 368#define VDEC_G_CHROMA_CTRL 0x1C18
369#define VDEC_G_CRUSH_CTRL 0x1C1C 369#define VDEC_G_CRUSH_CTRL 0x1C1C
370#define VDEC_G_HORIZ_TIM_CTRL 0x1C20 370#define VDEC_G_HORIZ_TIM_CTRL 0x1C20
371#define VDEC_G_VERT_TIM_CTRL 0x1C24 371#define VDEC_G_VERT_TIM_CTRL 0x1C24
372#define VDEC_G_MISC_TIM_CTRL 0x1C28 372#define VDEC_G_MISC_TIM_CTRL 0x1C28
373#define VDEC_G_FIELD_COUNT 0x1C2C 373#define VDEC_G_FIELD_COUNT 0x1C2C
374#define VDEC_G_HSCALE_CTRL 0x1C30 374#define VDEC_G_HSCALE_CTRL 0x1C30
375#define VDEC_G_VSCALE_CTRL 0x1C34 375#define VDEC_G_VSCALE_CTRL 0x1C34
376#define VDEC_G_MAN_VGA_CTRL 0x1C38 376#define VDEC_G_MAN_VGA_CTRL 0x1C38
377#define VDEC_G_MAN_AGC_CTRL 0x1C3C 377#define VDEC_G_MAN_AGC_CTRL 0x1C3C
378#define VDEC_G_DFE_CTRL1 0x1C40 378#define VDEC_G_DFE_CTRL1 0x1C40
379#define VDEC_G_DFE_CTRL2 0x1C44 379#define VDEC_G_DFE_CTRL2 0x1C44
380#define VDEC_G_DFE_CTRL3 0x1C48 380#define VDEC_G_DFE_CTRL3 0x1C48
381#define VDEC_G_PLL_CTRL 0x1C4C 381#define VDEC_G_PLL_CTRL 0x1C4C
382#define VDEC_G_PLL_CTRL_FAST 0x1C50 382#define VDEC_G_PLL_CTRL_FAST 0x1C50
383#define VDEC_G_HTL_CTRL 0x1C54 383#define VDEC_G_HTL_CTRL 0x1C54
384#define VDEC_G_SRC_CFG 0x1C58 384#define VDEC_G_SRC_CFG 0x1C58
385#define VDEC_G_SC_STEP_SIZE 0x1C5C 385#define VDEC_G_SC_STEP_SIZE 0x1C5C
386#define VDEC_G_SC_CONVERGE_CTRL 0x1C60 386#define VDEC_G_SC_CONVERGE_CTRL 0x1C60
387#define VDEC_G_SC_LOOP_CTRL 0x1C64 387#define VDEC_G_SC_LOOP_CTRL 0x1C64
388#define VDEC_G_COMB_2D_HFS_CFG 0x1C68 388#define VDEC_G_COMB_2D_HFS_CFG 0x1C68
389#define VDEC_G_COMB_2D_HFD_CFG 0x1C6C 389#define VDEC_G_COMB_2D_HFD_CFG 0x1C6C
390#define VDEC_G_COMB_2D_LF_CFG 0x1C70 390#define VDEC_G_COMB_2D_LF_CFG 0x1C70
391#define VDEC_G_COMB_2D_BLEND 0x1C74 391#define VDEC_G_COMB_2D_BLEND 0x1C74
392#define VDEC_G_COMB_MISC_CTRL 0x1C78 392#define VDEC_G_COMB_MISC_CTRL 0x1C78
393#define VDEC_G_COMB_FLAT_THRESH_CTRL 0x1C7C 393#define VDEC_G_COMB_FLAT_THRESH_CTRL 0x1C7C
394#define VDEC_G_COMB_TEST 0x1C80 394#define VDEC_G_COMB_TEST 0x1C80
395#define VDEC_G_BP_MISC_CTRL 0x1C84 395#define VDEC_G_BP_MISC_CTRL 0x1C84
396#define VDEC_G_VCR_DET_CTRL 0x1C88 396#define VDEC_G_VCR_DET_CTRL 0x1C88
397#define VDEC_G_NOISE_DET_CTRL 0x1C8C 397#define VDEC_G_NOISE_DET_CTRL 0x1C8C
398#define VDEC_G_COMB_FLAT_NOISE_CTRL 0x1C90 398#define VDEC_G_COMB_FLAT_NOISE_CTRL 0x1C90
399#define VDEC_G_VERSION 0x1DF8 399#define VDEC_G_VERSION 0x1DF8
400#define VDEC_G_SOFT_RST_CTRL 0x1DFC 400#define VDEC_G_SOFT_RST_CTRL 0x1DFC
401 401
402/* Video Decoder H Registers */ 402/* Video Decoder H Registers */
403#define VDEC_H_MODE_CTRL 0x1E00 403#define VDEC_H_MODE_CTRL 0x1E00
404#define VDEC_H_OUT_CTRL1 0x1E04 404#define VDEC_H_OUT_CTRL1 0x1E04
405#define VDEC_H_OUT_CTRL_NS 0x1E08 405#define VDEC_H_OUT_CTRL_NS 0x1E08
406#define VDEC_H_GEN_STAT 0x1E0C 406#define VDEC_H_GEN_STAT 0x1E0C
407#define VDEC_H_INT_STAT_MASK 0x1E1E 407#define VDEC_H_INT_STAT_MASK 0x1E1E
408#define VDEC_H_LUMA_CTRL 0x1E14 408#define VDEC_H_LUMA_CTRL 0x1E14
409#define VDEC_H_CHROMA_CTRL 0x1E18 409#define VDEC_H_CHROMA_CTRL 0x1E18
410#define VDEC_H_CRUSH_CTRL 0x1E1C 410#define VDEC_H_CRUSH_CTRL 0x1E1C
411#define VDEC_H_HORIZ_TIM_CTRL 0x1E20 411#define VDEC_H_HORIZ_TIM_CTRL 0x1E20
412#define VDEC_H_VERT_TIM_CTRL 0x1E24 412#define VDEC_H_VERT_TIM_CTRL 0x1E24
413#define VDEC_H_MISC_TIM_CTRL 0x1E28 413#define VDEC_H_MISC_TIM_CTRL 0x1E28
414#define VDEC_H_FIELD_COUNT 0x1E2C 414#define VDEC_H_FIELD_COUNT 0x1E2C
415#define VDEC_H_HSCALE_CTRL 0x1E30 415#define VDEC_H_HSCALE_CTRL 0x1E30
416#define VDEC_H_VSCALE_CTRL 0x1E34 416#define VDEC_H_VSCALE_CTRL 0x1E34
417#define VDEC_H_MAN_VGA_CTRL 0x1E38 417#define VDEC_H_MAN_VGA_CTRL 0x1E38
418#define VDEC_H_MAN_AGC_CTRL 0x1E3C 418#define VDEC_H_MAN_AGC_CTRL 0x1E3C
419#define VDEC_H_DFE_CTRL1 0x1E40 419#define VDEC_H_DFE_CTRL1 0x1E40
420#define VDEC_H_DFE_CTRL2 0x1E44 420#define VDEC_H_DFE_CTRL2 0x1E44
421#define VDEC_H_DFE_CTRL3 0x1E48 421#define VDEC_H_DFE_CTRL3 0x1E48
422#define VDEC_H_PLL_CTRL 0x1E4C 422#define VDEC_H_PLL_CTRL 0x1E4C
423#define VDEC_H_PLL_CTRL_FAST 0x1E50 423#define VDEC_H_PLL_CTRL_FAST 0x1E50
424#define VDEC_H_HTL_CTRL 0x1E54 424#define VDEC_H_HTL_CTRL 0x1E54
425#define VDEC_H_SRC_CFG 0x1E58 425#define VDEC_H_SRC_CFG 0x1E58
426#define VDEC_H_SC_STEP_SIZE 0x1E5C 426#define VDEC_H_SC_STEP_SIZE 0x1E5C
427#define VDEC_H_SC_CONVERGE_CTRL 0x1E60 427#define VDEC_H_SC_CONVERGE_CTRL 0x1E60
428#define VDEC_H_SC_LOOP_CTRL 0x1E64 428#define VDEC_H_SC_LOOP_CTRL 0x1E64
429#define VDEC_H_COMB_2D_HFS_CFG 0x1E68 429#define VDEC_H_COMB_2D_HFS_CFG 0x1E68
430#define VDEC_H_COMB_2D_HFD_CFG 0x1E6C 430#define VDEC_H_COMB_2D_HFD_CFG 0x1E6C
431#define VDEC_H_COMB_2D_LF_CFG 0x1E70 431#define VDEC_H_COMB_2D_LF_CFG 0x1E70
432#define VDEC_H_COMB_2D_BLEND 0x1E74 432#define VDEC_H_COMB_2D_BLEND 0x1E74
433#define VDEC_H_COMB_MISC_CTRL 0x1E78 433#define VDEC_H_COMB_MISC_CTRL 0x1E78
434#define VDEC_H_COMB_FLAT_THRESH_CTRL 0x1E7C 434#define VDEC_H_COMB_FLAT_THRESH_CTRL 0x1E7C
435#define VDEC_H_COMB_TEST 0x1E80 435#define VDEC_H_COMB_TEST 0x1E80
436#define VDEC_H_BP_MISC_CTRL 0x1E84 436#define VDEC_H_BP_MISC_CTRL 0x1E84
437#define VDEC_H_VCR_DET_CTRL 0x1E88 437#define VDEC_H_VCR_DET_CTRL 0x1E88
438#define VDEC_H_NOISE_DET_CTRL 0x1E8C 438#define VDEC_H_NOISE_DET_CTRL 0x1E8C
439#define VDEC_H_COMB_FLAT_NOISE_CTRL 0x1E90 439#define VDEC_H_COMB_FLAT_NOISE_CTRL 0x1E90
440#define VDEC_H_VERSION 0x1FF8 440#define VDEC_H_VERSION 0x1FF8
441#define VDEC_H_SOFT_RST_CTRL 0x1FFC 441#define VDEC_H_SOFT_RST_CTRL 0x1FFC
442 442
443/*****************************************************************************/ 443/*****************************************************************************/
444/* LUMA_CTRL register fields */ 444/* LUMA_CTRL register fields */
445#define VDEC_A_BRITE_CTRL 0x1014 445#define VDEC_A_BRITE_CTRL 0x1014
446#define VDEC_A_CNTRST_CTRL 0x1015 446#define VDEC_A_CNTRST_CTRL 0x1015
447#define VDEC_A_PEAK_SEL 0x1016 447#define VDEC_A_PEAK_SEL 0x1016
448 448
diff --git a/drivers/media/video/cx25821/cx25821-medusa-video.c b/drivers/media/video/cx25821/cx25821-medusa-video.c
index fc780d0908d..298a68d98c2 100644
--- a/drivers/media/video/cx25821/cx25821-medusa-video.c
+++ b/drivers/media/video/cx25821/cx25821-medusa-video.c
@@ -99,82 +99,67 @@ static int medusa_initialize_ntsc(struct cx25821_dev *dev)
99 99
100 for (i = 0; i < MAX_DECODERS; i++) { 100 for (i = 0; i < MAX_DECODERS; i++) {
101 /* set video format NTSC-M */ 101 /* set video format NTSC-M */
102 value = 102 value = cx25821_i2c_read(&dev->i2c_bus[0],
103 cx25821_i2c_read(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i), 103 MODE_CTRL + (0x200 * i), &tmp);
104 &tmp);
105 value &= 0xFFFFFFF0; 104 value &= 0xFFFFFFF0;
106 /* enable the fast locking mode bit[16] */ 105 /* enable the fast locking mode bit[16] */
107 value |= 0x10001; 106 value |= 0x10001;
108 ret_val = 107 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
109 cx25821_i2c_write(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i), 108 MODE_CTRL + (0x200 * i), value);
110 value);
111 109
112 /* resolution NTSC 720x480 */ 110 /* resolution NTSC 720x480 */
113 value = 111 value = cx25821_i2c_read(&dev->i2c_bus[0],
114 cx25821_i2c_read(&dev->i2c_bus[0], 112 HORIZ_TIM_CTRL + (0x200 * i), &tmp);
115 HORIZ_TIM_CTRL + (0x200 * i), &tmp);
116 value &= 0x00C00C00; 113 value &= 0x00C00C00;
117 value |= 0x612D0074; 114 value |= 0x612D0074;
118 ret_val = 115 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
119 cx25821_i2c_write(&dev->i2c_bus[0], 116 HORIZ_TIM_CTRL + (0x200 * i), value);
120 HORIZ_TIM_CTRL + (0x200 * i), value);
121 117
122 value = 118 value = cx25821_i2c_read(&dev->i2c_bus[0],
123 cx25821_i2c_read(&dev->i2c_bus[0], 119 VERT_TIM_CTRL + (0x200 * i), &tmp);
124 VERT_TIM_CTRL + (0x200 * i), &tmp);
125 value &= 0x00C00C00; 120 value &= 0x00C00C00;
126 value |= 0x1C1E001A; /* vblank_cnt + 2 to get camera ID */ 121 value |= 0x1C1E001A; /* vblank_cnt + 2 to get camera ID */
127 ret_val = 122 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
128 cx25821_i2c_write(&dev->i2c_bus[0], 123 VERT_TIM_CTRL + (0x200 * i), value);
129 VERT_TIM_CTRL + (0x200 * i), value);
130 124
131 /* chroma subcarrier step size */ 125 /* chroma subcarrier step size */
132 ret_val = 126 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
133 cx25821_i2c_write(&dev->i2c_bus[0], 127 SC_STEP_SIZE + (0x200 * i), 0x43E00000);
134 SC_STEP_SIZE + (0x200 * i), 0x43E00000);
135 128
136 /* enable VIP optional active */ 129 /* enable VIP optional active */
137 value = 130 value = cx25821_i2c_read(&dev->i2c_bus[0],
138 cx25821_i2c_read(&dev->i2c_bus[0], 131 OUT_CTRL_NS + (0x200 * i), &tmp);
139 OUT_CTRL_NS + (0x200 * i), &tmp);
140 value &= 0xFFFBFFFF; 132 value &= 0xFFFBFFFF;
141 value |= 0x00040000; 133 value |= 0x00040000;
142 ret_val = 134 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
143 cx25821_i2c_write(&dev->i2c_bus[0], 135 OUT_CTRL_NS + (0x200 * i), value);
144 OUT_CTRL_NS + (0x200 * i), value);
145 136
146 /* enable VIP optional active (VIP_OPT_AL) for direct output. */ 137 /* enable VIP optional active (VIP_OPT_AL) for direct output. */
147 value = 138 value = cx25821_i2c_read(&dev->i2c_bus[0],
148 cx25821_i2c_read(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i), 139 OUT_CTRL1 + (0x200 * i), &tmp);
149 &tmp);
150 value &= 0xFFFBFFFF; 140 value &= 0xFFFBFFFF;
151 value |= 0x00040000; 141 value |= 0x00040000;
152 ret_val = 142 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
153 cx25821_i2c_write(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i), 143 OUT_CTRL1 + (0x200 * i), value);
154 value);
155 144
156 /* 145 /*
157 * clear VPRES_VERT_EN bit, fixes the chroma run away problem 146 * clear VPRES_VERT_EN bit, fixes the chroma run away problem
158 * when the input switching rate < 16 fields 147 * when the input switching rate < 16 fields
159 */ 148 */
160 value = 149 value = cx25821_i2c_read(&dev->i2c_bus[0],
161 cx25821_i2c_read(&dev->i2c_bus[0], 150 MISC_TIM_CTRL + (0x200 * i), &tmp);
162 MISC_TIM_CTRL + (0x200 * i), &tmp);
163 /* disable special play detection */ 151 /* disable special play detection */
164 value = setBitAtPos(value, 14); 152 value = setBitAtPos(value, 14);
165 value = clearBitAtPos(value, 15); 153 value = clearBitAtPos(value, 15);
166 ret_val = 154 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
167 cx25821_i2c_write(&dev->i2c_bus[0], 155 MISC_TIM_CTRL + (0x200 * i), value);
168 MISC_TIM_CTRL + (0x200 * i), value);
169 156
170 /* set vbi_gate_en to 0 */ 157 /* set vbi_gate_en to 0 */
171 value = 158 value = cx25821_i2c_read(&dev->i2c_bus[0],
172 cx25821_i2c_read(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i), 159 DFE_CTRL1 + (0x200 * i), &tmp);
173 &tmp);
174 value = clearBitAtPos(value, 29); 160 value = clearBitAtPos(value, 29);
175 ret_val = 161 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
176 cx25821_i2c_write(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i), 162 DFE_CTRL1 + (0x200 * i), value);
177 value);
178 163
179 /* Enable the generation of blue field output if no video */ 164 /* Enable the generation of blue field output if no video */
180 medusa_enable_bluefield_output(dev, i, 1); 165 medusa_enable_bluefield_output(dev, i, 1);
@@ -182,61 +167,49 @@ static int medusa_initialize_ntsc(struct cx25821_dev *dev)
182 167
183 for (i = 0; i < MAX_ENCODERS; i++) { 168 for (i = 0; i < MAX_ENCODERS; i++) {
184 /* NTSC hclock */ 169 /* NTSC hclock */
185 value = 170 value = cx25821_i2c_read(&dev->i2c_bus[0],
186 cx25821_i2c_read(&dev->i2c_bus[0], 171 DENC_A_REG_1 + (0x100 * i), &tmp);
187 DENC_A_REG_1 + (0x100 * i), &tmp);
188 value &= 0xF000FC00; 172 value &= 0xF000FC00;
189 value |= 0x06B402D0; 173 value |= 0x06B402D0;
190 ret_val = 174 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
191 cx25821_i2c_write(&dev->i2c_bus[0], 175 DENC_A_REG_1 + (0x100 * i), value);
192 DENC_A_REG_1 + (0x100 * i), value);
193 176
194 /* burst begin and burst end */ 177 /* burst begin and burst end */
195 value = 178 value = cx25821_i2c_read(&dev->i2c_bus[0],
196 cx25821_i2c_read(&dev->i2c_bus[0], 179 DENC_A_REG_2 + (0x100 * i), &tmp);
197 DENC_A_REG_2 + (0x100 * i), &tmp);
198 value &= 0xFF000000; 180 value &= 0xFF000000;
199 value |= 0x007E9054; 181 value |= 0x007E9054;
200 ret_val = 182 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
201 cx25821_i2c_write(&dev->i2c_bus[0], 183 DENC_A_REG_2 + (0x100 * i), value);
202 DENC_A_REG_2 + (0x100 * i), value);
203 184
204 value = 185 value = cx25821_i2c_read(&dev->i2c_bus[0],
205 cx25821_i2c_read(&dev->i2c_bus[0], 186 DENC_A_REG_3 + (0x100 * i), &tmp);
206 DENC_A_REG_3 + (0x100 * i), &tmp);
207 value &= 0xFC00FE00; 187 value &= 0xFC00FE00;
208 value |= 0x00EC00F0; 188 value |= 0x00EC00F0;
209 ret_val = 189 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
210 cx25821_i2c_write(&dev->i2c_bus[0], 190 DENC_A_REG_3 + (0x100 * i), value);
211 DENC_A_REG_3 + (0x100 * i), value);
212 191
213 /* set NTSC vblank, no phase alternation, 7.5 IRE pedestal */ 192 /* set NTSC vblank, no phase alternation, 7.5 IRE pedestal */
214 value = 193 value = cx25821_i2c_read(&dev->i2c_bus[0],
215 cx25821_i2c_read(&dev->i2c_bus[0], 194 DENC_A_REG_4 + (0x100 * i), &tmp);
216 DENC_A_REG_4 + (0x100 * i), &tmp);
217 value &= 0x00FCFFFF; 195 value &= 0x00FCFFFF;
218 value |= 0x13020000; 196 value |= 0x13020000;
219 ret_val = 197 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
220 cx25821_i2c_write(&dev->i2c_bus[0], 198 DENC_A_REG_4 + (0x100 * i), value);
221 DENC_A_REG_4 + (0x100 * i), value);
222 199
223 value = 200 value = cx25821_i2c_read(&dev->i2c_bus[0],
224 cx25821_i2c_read(&dev->i2c_bus[0], 201 DENC_A_REG_5 + (0x100 * i), &tmp);
225 DENC_A_REG_5 + (0x100 * i), &tmp);
226 value &= 0xFFFF0000; 202 value &= 0xFFFF0000;
227 value |= 0x0000E575; 203 value |= 0x0000E575;
228 ret_val = 204 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
229 cx25821_i2c_write(&dev->i2c_bus[0], 205 DENC_A_REG_5 + (0x100 * i), value);
230 DENC_A_REG_5 + (0x100 * i), value);
231 206
232 ret_val = 207 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
233 cx25821_i2c_write(&dev->i2c_bus[0], 208 DENC_A_REG_6 + (0x100 * i), 0x009A89C1);
234 DENC_A_REG_6 + (0x100 * i), 0x009A89C1);
235 209
236 /* Subcarrier Increment */ 210 /* Subcarrier Increment */
237 ret_val = 211 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
238 cx25821_i2c_write(&dev->i2c_bus[0], 212 DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);
239 DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);
240 } 213 }
241 214
242 /* set picture resolutions */ 215 /* set picture resolutions */
@@ -261,34 +234,27 @@ static int medusa_PALCombInit(struct cx25821_dev *dev, int dec)
261 u32 value = 0, tmp = 0; 234 u32 value = 0, tmp = 0;
262 235
263 /* Setup for 2D threshold */ 236 /* Setup for 2D threshold */
264 ret_val = 237 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
265 cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_HFS_CFG + (0x200 * dec), 238 COMB_2D_HFS_CFG + (0x200 * dec), 0x20002861);
266 0x20002861); 239 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
267 ret_val = 240 COMB_2D_HFD_CFG + (0x200 * dec), 0x20002861);
268 cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_HFD_CFG + (0x200 * dec), 241 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
269 0x20002861); 242 COMB_2D_LF_CFG + (0x200 * dec), 0x200A1023);
270 ret_val =
271 cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_LF_CFG + (0x200 * dec),
272 0x200A1023);
273 243
274 /* Setup flat chroma and luma thresholds */ 244 /* Setup flat chroma and luma thresholds */
275 value = 245 value = cx25821_i2c_read(&dev->i2c_bus[0],
276 cx25821_i2c_read(&dev->i2c_bus[0], 246 COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);
277 COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);
278 value &= 0x06230000; 247 value &= 0x06230000;
279 ret_val = 248 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
280 cx25821_i2c_write(&dev->i2c_bus[0], 249 COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);
281 COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);
282 250
283 /* set comb 2D blend */ 251 /* set comb 2D blend */
284 ret_val = 252 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
285 cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_BLEND + (0x200 * dec), 253 COMB_2D_BLEND + (0x200 * dec), 0x210F0F0F);
286 0x210F0F0F);
287 254
288 /* COMB MISC CONTROL */ 255 /* COMB MISC CONTROL */
289 ret_val = 256 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
290 cx25821_i2c_write(&dev->i2c_bus[0], COMB_MISC_CTRL + (0x200 * dec), 257 COMB_MISC_CTRL + (0x200 * dec), 0x41120A7F);
291 0x41120A7F);
292 258
293 return ret_val; 259 return ret_val;
294} 260}
@@ -304,83 +270,68 @@ static int medusa_initialize_pal(struct cx25821_dev *dev)
304 270
305 for (i = 0; i < MAX_DECODERS; i++) { 271 for (i = 0; i < MAX_DECODERS; i++) {
306 /* set video format PAL-BDGHI */ 272 /* set video format PAL-BDGHI */
307 value = 273 value = cx25821_i2c_read(&dev->i2c_bus[0],
308 cx25821_i2c_read(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i), 274 MODE_CTRL + (0x200 * i), &tmp);
309 &tmp);
310 value &= 0xFFFFFFF0; 275 value &= 0xFFFFFFF0;
311 /* enable the fast locking mode bit[16] */ 276 /* enable the fast locking mode bit[16] */
312 value |= 0x10004; 277 value |= 0x10004;
313 ret_val = 278 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
314 cx25821_i2c_write(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i), 279 MODE_CTRL + (0x200 * i), value);
315 value);
316 280
317 /* resolution PAL 720x576 */ 281 /* resolution PAL 720x576 */
318 value = 282 value = cx25821_i2c_read(&dev->i2c_bus[0],
319 cx25821_i2c_read(&dev->i2c_bus[0], 283 HORIZ_TIM_CTRL + (0x200 * i), &tmp);
320 HORIZ_TIM_CTRL + (0x200 * i), &tmp);
321 value &= 0x00C00C00; 284 value &= 0x00C00C00;
322 value |= 0x632D007D; 285 value |= 0x632D007D;
323 ret_val = 286 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
324 cx25821_i2c_write(&dev->i2c_bus[0], 287 HORIZ_TIM_CTRL + (0x200 * i), value);
325 HORIZ_TIM_CTRL + (0x200 * i), value);
326 288
327 /* vblank656_cnt=x26, vactive_cnt=240h, vblank_cnt=x24 */ 289 /* vblank656_cnt=x26, vactive_cnt=240h, vblank_cnt=x24 */
328 value = 290 value = cx25821_i2c_read(&dev->i2c_bus[0],
329 cx25821_i2c_read(&dev->i2c_bus[0], 291 VERT_TIM_CTRL + (0x200 * i), &tmp);
330 VERT_TIM_CTRL + (0x200 * i), &tmp);
331 value &= 0x00C00C00; 292 value &= 0x00C00C00;
332 value |= 0x28240026; /* vblank_cnt + 2 to get camera ID */ 293 value |= 0x28240026; /* vblank_cnt + 2 to get camera ID */
333 ret_val = 294 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
334 cx25821_i2c_write(&dev->i2c_bus[0], 295 VERT_TIM_CTRL + (0x200 * i), value);
335 VERT_TIM_CTRL + (0x200 * i), value);
336 296
337 /* chroma subcarrier step size */ 297 /* chroma subcarrier step size */
338 ret_val = 298 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
339 cx25821_i2c_write(&dev->i2c_bus[0], 299 SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);
340 SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);
341 300
342 /* enable VIP optional active */ 301 /* enable VIP optional active */
343 value = 302 value = cx25821_i2c_read(&dev->i2c_bus[0],
344 cx25821_i2c_read(&dev->i2c_bus[0], 303 OUT_CTRL_NS + (0x200 * i), &tmp);
345 OUT_CTRL_NS + (0x200 * i), &tmp);
346 value &= 0xFFFBFFFF; 304 value &= 0xFFFBFFFF;
347 value |= 0x00040000; 305 value |= 0x00040000;
348 ret_val = 306 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
349 cx25821_i2c_write(&dev->i2c_bus[0], 307 OUT_CTRL_NS + (0x200 * i), value);
350 OUT_CTRL_NS + (0x200 * i), value);
351 308
352 /* enable VIP optional active (VIP_OPT_AL) for direct output. */ 309 /* enable VIP optional active (VIP_OPT_AL) for direct output. */
353 value = 310 value = cx25821_i2c_read(&dev->i2c_bus[0],
354 cx25821_i2c_read(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i), 311 OUT_CTRL1 + (0x200 * i), &tmp);
355 &tmp);
356 value &= 0xFFFBFFFF; 312 value &= 0xFFFBFFFF;
357 value |= 0x00040000; 313 value |= 0x00040000;
358 ret_val = 314 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
359 cx25821_i2c_write(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i), 315 OUT_CTRL1 + (0x200 * i), value);
360 value);
361 316
362 /* 317 /*
363 * clear VPRES_VERT_EN bit, fixes the chroma run away problem 318 * clear VPRES_VERT_EN bit, fixes the chroma run away problem
364 * when the input switching rate < 16 fields 319 * when the input switching rate < 16 fields
365 */ 320 */
366 value = 321 value = cx25821_i2c_read(&dev->i2c_bus[0],
367 cx25821_i2c_read(&dev->i2c_bus[0], 322 MISC_TIM_CTRL + (0x200 * i), &tmp);
368 MISC_TIM_CTRL + (0x200 * i), &tmp);
369 /* disable special play detection */ 323 /* disable special play detection */
370 value = setBitAtPos(value, 14); 324 value = setBitAtPos(value, 14);
371 value = clearBitAtPos(value, 15); 325 value = clearBitAtPos(value, 15);
372 ret_val = 326 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
373 cx25821_i2c_write(&dev->i2c_bus[0], 327 MISC_TIM_CTRL + (0x200 * i), value);
374 MISC_TIM_CTRL + (0x200 * i), value);
375 328
376 /* set vbi_gate_en to 0 */ 329 /* set vbi_gate_en to 0 */
377 value = 330 value = cx25821_i2c_read(&dev->i2c_bus[0],
378 cx25821_i2c_read(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i), 331 DFE_CTRL1 + (0x200 * i), &tmp);
379 &tmp);
380 value = clearBitAtPos(value, 29); 332 value = clearBitAtPos(value, 29);
381 ret_val = 333 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
382 cx25821_i2c_write(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i), 334 DFE_CTRL1 + (0x200 * i), value);
383 value);
384 335
385 medusa_PALCombInit(dev, i); 336 medusa_PALCombInit(dev, i);
386 337
@@ -390,62 +341,50 @@ static int medusa_initialize_pal(struct cx25821_dev *dev)
390 341
391 for (i = 0; i < MAX_ENCODERS; i++) { 342 for (i = 0; i < MAX_ENCODERS; i++) {
392 /* PAL hclock */ 343 /* PAL hclock */
393 value = 344 value = cx25821_i2c_read(&dev->i2c_bus[0],
394 cx25821_i2c_read(&dev->i2c_bus[0], 345 DENC_A_REG_1 + (0x100 * i), &tmp);
395 DENC_A_REG_1 + (0x100 * i), &tmp);
396 value &= 0xF000FC00; 346 value &= 0xF000FC00;
397 value |= 0x06C002D0; 347 value |= 0x06C002D0;
398 ret_val = 348 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
399 cx25821_i2c_write(&dev->i2c_bus[0], 349 DENC_A_REG_1 + (0x100 * i), value);
400 DENC_A_REG_1 + (0x100 * i), value);
401 350
402 /* burst begin and burst end */ 351 /* burst begin and burst end */
403 value = 352 value = cx25821_i2c_read(&dev->i2c_bus[0],
404 cx25821_i2c_read(&dev->i2c_bus[0], 353 DENC_A_REG_2 + (0x100 * i), &tmp);
405 DENC_A_REG_2 + (0x100 * i), &tmp);
406 value &= 0xFF000000; 354 value &= 0xFF000000;
407 value |= 0x007E9754; 355 value |= 0x007E9754;
408 ret_val = 356 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
409 cx25821_i2c_write(&dev->i2c_bus[0], 357 DENC_A_REG_2 + (0x100 * i), value);
410 DENC_A_REG_2 + (0x100 * i), value);
411 358
412 /* hblank and vactive */ 359 /* hblank and vactive */
413 value = 360 value = cx25821_i2c_read(&dev->i2c_bus[0],
414 cx25821_i2c_read(&dev->i2c_bus[0], 361 DENC_A_REG_3 + (0x100 * i), &tmp);
415 DENC_A_REG_3 + (0x100 * i), &tmp);
416 value &= 0xFC00FE00; 362 value &= 0xFC00FE00;
417 value |= 0x00FC0120; 363 value |= 0x00FC0120;
418 ret_val = 364 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
419 cx25821_i2c_write(&dev->i2c_bus[0], 365 DENC_A_REG_3 + (0x100 * i), value);
420 DENC_A_REG_3 + (0x100 * i), value);
421 366
422 /* set PAL vblank, phase alternation, 0 IRE pedestal */ 367 /* set PAL vblank, phase alternation, 0 IRE pedestal */
423 value = 368 value = cx25821_i2c_read(&dev->i2c_bus[0],
424 cx25821_i2c_read(&dev->i2c_bus[0], 369 DENC_A_REG_4 + (0x100 * i), &tmp);
425 DENC_A_REG_4 + (0x100 * i), &tmp);
426 value &= 0x00FCFFFF; 370 value &= 0x00FCFFFF;
427 value |= 0x14010000; 371 value |= 0x14010000;
428 ret_val = 372 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
429 cx25821_i2c_write(&dev->i2c_bus[0], 373 DENC_A_REG_4 + (0x100 * i), value);
430 DENC_A_REG_4 + (0x100 * i), value);
431 374
432 value = 375 value = cx25821_i2c_read(&dev->i2c_bus[0],
433 cx25821_i2c_read(&dev->i2c_bus[0], 376 DENC_A_REG_5 + (0x100 * i), &tmp);
434 DENC_A_REG_5 + (0x100 * i), &tmp);
435 value &= 0xFFFF0000; 377 value &= 0xFFFF0000;
436 value |= 0x0000F078; 378 value |= 0x0000F078;
437 ret_val = 379 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
438 cx25821_i2c_write(&dev->i2c_bus[0], 380 DENC_A_REG_5 + (0x100 * i), value);
439 DENC_A_REG_5 + (0x100 * i), value);
440 381
441 ret_val = 382 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
442 cx25821_i2c_write(&dev->i2c_bus[0], 383 DENC_A_REG_6 + (0x100 * i), 0x00A493CF);
443 DENC_A_REG_6 + (0x100 * i), 0x00A493CF);
444 384
445 /* Subcarrier Increment */ 385 /* Subcarrier Increment */
446 ret_val = 386 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
447 cx25821_i2c_write(&dev->i2c_bus[0], 387 DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);
448 DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);
449 } 388 }
450 389
451 /* set picture resolutions */ 390 /* set picture resolutions */
@@ -499,7 +438,7 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,
499 438
500 mutex_lock(&dev->lock); 439 mutex_lock(&dev->lock);
501 440
502 /* validate the width - cannot be negative */ 441 /* validate the width */
503 if (width > MAX_WIDTH) { 442 if (width > MAX_WIDTH) {
504 pr_info("%s(): width %d > MAX_WIDTH %d ! resetting to MAX_WIDTH\n", 443 pr_info("%s(): width %d > MAX_WIDTH %d ! resetting to MAX_WIDTH\n",
505 __func__, width, MAX_WIDTH); 444 __func__, width, MAX_WIDTH);
@@ -543,12 +482,10 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,
543 482
544 for (; decoder < decoder_count; decoder++) { 483 for (; decoder < decoder_count; decoder++) {
545 /* write scaling values for each decoder */ 484 /* write scaling values for each decoder */
546 ret_val = 485 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
547 cx25821_i2c_write(&dev->i2c_bus[0], 486 HSCALE_CTRL + (0x200 * decoder), hscale);
548 HSCALE_CTRL + (0x200 * decoder), hscale); 487 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
549 ret_val = 488 VSCALE_CTRL + (0x200 * decoder), vscale);
550 cx25821_i2c_write(&dev->i2c_bus[0],
551 VSCALE_CTRL + (0x200 * decoder), vscale);
552 } 489 }
553 490
554 mutex_unlock(&dev->lock); 491 mutex_unlock(&dev->lock);
@@ -606,8 +543,8 @@ static void medusa_set_decoderduration(struct cx25821_dev *dev, int decoder,
606} 543}
607 544
608/* Map to Medusa register setting */ 545/* Map to Medusa register setting */
609static int mapM(int srcMin, 546static int mapM(int srcMin, int srcMax, int srcVal, int dstMin, int dstMax,
610 int srcMax, int srcVal, int dstMin, int dstMax, int *dstVal) 547 int *dstVal)
611{ 548{
612 int numerator; 549 int numerator;
613 int denominator; 550 int denominator;
@@ -654,23 +591,19 @@ int medusa_set_brightness(struct cx25821_dev *dev, int brightness, int decoder)
654 u32 val = 0, tmp = 0; 591 u32 val = 0, tmp = 0;
655 592
656 mutex_lock(&dev->lock); 593 mutex_lock(&dev->lock);
657 if ((brightness > VIDEO_PROCAMP_MAX) 594 if ((brightness > VIDEO_PROCAMP_MAX) ||
658 || (brightness < VIDEO_PROCAMP_MIN)) { 595 (brightness < VIDEO_PROCAMP_MIN)) {
659 mutex_unlock(&dev->lock); 596 mutex_unlock(&dev->lock);
660 return -1; 597 return -1;
661 } 598 }
662 ret_val = 599 ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, brightness,
663 mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, brightness, 600 SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
664 SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
665 value = convert_to_twos(value, 8); 601 value = convert_to_twos(value, 8);
666 val = 602 val = cx25821_i2c_read(&dev->i2c_bus[0],
667 cx25821_i2c_read(&dev->i2c_bus[0], 603 VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);
668 VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);
669 val &= 0xFFFFFF00; 604 val &= 0xFFFFFF00;
670 ret_val |= 605 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
671 cx25821_i2c_write(&dev->i2c_bus[0], 606 VDEC_A_BRITE_CTRL + (0x200 * decoder), val | value);
672 VDEC_A_BRITE_CTRL + (0x200 * decoder),
673 val | value);
674 mutex_unlock(&dev->lock); 607 mutex_unlock(&dev->lock);
675 return ret_val; 608 return ret_val;
676} 609}
@@ -688,17 +621,13 @@ int medusa_set_contrast(struct cx25821_dev *dev, int contrast, int decoder)
688 return -1; 621 return -1;
689 } 622 }
690 623
691 ret_val = 624 ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, contrast,
692 mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, contrast, 625 UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
693 UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value); 626 val = cx25821_i2c_read(&dev->i2c_bus[0],
694 val = 627 VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);
695 cx25821_i2c_read(&dev->i2c_bus[0],
696 VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);
697 val &= 0xFFFFFF00; 628 val &= 0xFFFFFF00;
698 ret_val |= 629 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
699 cx25821_i2c_write(&dev->i2c_bus[0], 630 VDEC_A_CNTRST_CTRL + (0x200 * decoder), val | value);
700 VDEC_A_CNTRST_CTRL + (0x200 * decoder),
701 val | value);
702 631
703 mutex_unlock(&dev->lock); 632 mutex_unlock(&dev->lock);
704 return ret_val; 633 return ret_val;
@@ -717,19 +646,16 @@ int medusa_set_hue(struct cx25821_dev *dev, int hue, int decoder)
717 return -1; 646 return -1;
718 } 647 }
719 648
720 ret_val = 649 ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, hue,
721 mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, hue, SIGNED_BYTE_MIN, 650 SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
722 SIGNED_BYTE_MAX, &value);
723 651
724 value = convert_to_twos(value, 8); 652 value = convert_to_twos(value, 8);
725 val = 653 val = cx25821_i2c_read(&dev->i2c_bus[0],
726 cx25821_i2c_read(&dev->i2c_bus[0], 654 VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);
727 VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);
728 val &= 0xFFFFFF00; 655 val &= 0xFFFFFF00;
729 656
730 ret_val |= 657 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
731 cx25821_i2c_write(&dev->i2c_bus[0], 658 VDEC_A_HUE_CTRL + (0x200 * decoder), val | value);
732 VDEC_A_HUE_CTRL + (0x200 * decoder), val | value);
733 659
734 mutex_unlock(&dev->lock); 660 mutex_unlock(&dev->lock);
735 return ret_val; 661 return ret_val;
@@ -743,33 +669,26 @@ int medusa_set_saturation(struct cx25821_dev *dev, int saturation, int decoder)
743 669
744 mutex_lock(&dev->lock); 670 mutex_lock(&dev->lock);
745 671
746 if ((saturation > VIDEO_PROCAMP_MAX) 672 if ((saturation > VIDEO_PROCAMP_MAX) ||
747 || (saturation < VIDEO_PROCAMP_MIN)) { 673 (saturation < VIDEO_PROCAMP_MIN)) {
748 mutex_unlock(&dev->lock); 674 mutex_unlock(&dev->lock);
749 return -1; 675 return -1;
750 } 676 }
751 677
752 ret_val = 678 ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, saturation,
753 mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, saturation, 679 UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
754 UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
755 680
756 val = 681 val = cx25821_i2c_read(&dev->i2c_bus[0],
757 cx25821_i2c_read(&dev->i2c_bus[0], 682 VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);
758 VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);
759 val &= 0xFFFFFF00; 683 val &= 0xFFFFFF00;
760 ret_val |= 684 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
761 cx25821_i2c_write(&dev->i2c_bus[0], 685 VDEC_A_USAT_CTRL + (0x200 * decoder), val | value);
762 VDEC_A_USAT_CTRL + (0x200 * decoder), 686
763 val | value); 687 val = cx25821_i2c_read(&dev->i2c_bus[0],
764 688 VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);
765 val =
766 cx25821_i2c_read(&dev->i2c_bus[0],
767 VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);
768 val &= 0xFFFFFF00; 689 val &= 0xFFFFFF00;
769 ret_val |= 690 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
770 cx25821_i2c_write(&dev->i2c_bus[0], 691 VDEC_A_VSAT_CTRL + (0x200 * decoder), val | value);
771 VDEC_A_VSAT_CTRL + (0x200 * decoder),
772 val | value);
773 692
774 mutex_unlock(&dev->lock); 693 mutex_unlock(&dev->lock);
775 return ret_val; 694 return ret_val;
@@ -830,9 +749,8 @@ int medusa_video_init(struct cx25821_dev *dev)
830 /* select AFE clock to output mode */ 749 /* select AFE clock to output mode */
831 value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp); 750 value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);
832 value &= 0x83FFFFFF; 751 value &= 0x83FFFFFF;
833 ret_val = 752 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL,
834 cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, 753 value | 0x10000000);
835 value | 0x10000000);
836 754
837 if (ret_val < 0) 755 if (ret_val < 0)
838 goto error; 756 goto error;
diff --git a/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c b/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c
index 2a724ddfa53..5a157cf4a95 100644
--- a/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c
+++ b/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c
@@ -65,9 +65,8 @@ static __le32 *cx25821_update_riscprogram_ch2(struct cx25821_dev *dev,
65 *(rp++) = cpu_to_le32(dev->_data_buf_phys_addr_ch2 + offset); 65 *(rp++) = cpu_to_le32(dev->_data_buf_phys_addr_ch2 + offset);
66 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 66 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
67 67
68 if ((lines <= NTSC_FIELD_HEIGHT) 68 if ((lines <= NTSC_FIELD_HEIGHT) ||
69 || (line < (NTSC_FIELD_HEIGHT - 1)) 69 (line < (NTSC_FIELD_HEIGHT - 1)) || !(dev->_isNTSC_ch2)) {
70 || !(dev->_isNTSC_ch2)) {
71 offset += dist_betwn_starts; 70 offset += dist_betwn_starts;
72 } 71 }
73 } 72 }
@@ -85,7 +84,7 @@ static __le32 *cx25821_risc_field_upstream_ch2(struct cx25821_dev *dev,
85{ 84{
86 unsigned int line, i; 85 unsigned int line, i;
87 struct sram_channel *sram_ch = 86 struct sram_channel *sram_ch =
88 dev->channels[dev->_channel2_upstream_select].sram_channels; 87 dev->channels[dev->_channel2_upstream_select].sram_channels;
89 int dist_betwn_starts = bpl * 2; 88 int dist_betwn_starts = bpl * 2;
90 89
91 /* sync instruction */ 90 /* sync instruction */
@@ -103,9 +102,8 @@ static __le32 *cx25821_risc_field_upstream_ch2(struct cx25821_dev *dev,
103 *(rp++) = cpu_to_le32(databuf_phys_addr + offset); 102 *(rp++) = cpu_to_le32(databuf_phys_addr + offset);
104 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 103 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
105 104
106 if ((lines <= NTSC_FIELD_HEIGHT) 105 if ((lines <= NTSC_FIELD_HEIGHT) ||
107 || (line < (NTSC_FIELD_HEIGHT - 1)) 106 (line < (NTSC_FIELD_HEIGHT - 1)) || !(dev->_isNTSC_ch2)) {
108 || !(dev->_isNTSC_ch2)) {
109 offset += dist_betwn_starts; 107 offset += dist_betwn_starts;
110 } 108 }
111 109
@@ -173,7 +171,7 @@ int cx25821_risc_buffer_upstream_ch2(struct cx25821_dev *dev,
173 171
174 fifo_enable = FIFO_DISABLE; 172 fifo_enable = FIFO_DISABLE;
175 173
176 /* Even field */ 174 /* Even field */
177 rp = cx25821_risc_field_upstream_ch2(dev, rp, 175 rp = cx25821_risc_field_upstream_ch2(dev, rp,
178 dev->_data_buf_phys_addr_ch2 + databuf_offset, 176 dev->_data_buf_phys_addr_ch2 + databuf_offset,
179 bottom_offset, 0x200, bpl, singlefield_lines, 177 bottom_offset, 0x200, bpl, singlefield_lines,
@@ -189,9 +187,9 @@ int cx25821_risc_buffer_upstream_ch2(struct cx25821_dev *dev,
189 } 187 }
190 188
191 /* 189 /*
192 Loop to 2ndFrameRISC or to Start of 190 * Loop to 2ndFrameRISC or to Start of
193 Risc program & generate IRQ 191 * Risc program & generate IRQ
194 */ 192 */
195 *(rp++) = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | risc_flag); 193 *(rp++) = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | risc_flag);
196 *(rp++) = cpu_to_le32(risc_phys_jump_addr); 194 *(rp++) = cpu_to_le32(risc_phys_jump_addr);
197 *(rp++) = cpu_to_le32(0); 195 *(rp++) = cpu_to_le32(0);
@@ -203,7 +201,7 @@ int cx25821_risc_buffer_upstream_ch2(struct cx25821_dev *dev,
203void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev) 201void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev)
204{ 202{
205 struct sram_channel *sram_ch = 203 struct sram_channel *sram_ch =
206 dev->channels[VID_UPSTREAM_SRAM_CHANNEL_J].sram_channels; 204 dev->channels[VID_UPSTREAM_SRAM_CHANNEL_J].sram_channels;
207 u32 tmp = 0; 205 u32 tmp = 0;
208 206
209 if (!dev->_is_running_ch2) { 207 if (!dev->_is_running_ch2) {
@@ -262,9 +260,8 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
262 struct file *myfile; 260 struct file *myfile;
263 int frame_index_temp = dev->_frame_index_ch2; 261 int frame_index_temp = dev->_frame_index_ch2;
264 int i = 0; 262 int i = 0;
265 int line_size = 263 int line_size = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ?
266 (dev->_pixel_format_ch2 == 264 Y411_LINE_SZ : Y422_LINE_SZ;
267 PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
268 int frame_size = 0; 265 int frame_size = 0;
269 int frame_offset = 0; 266 int frame_offset = 0;
270 ssize_t vfs_read_retval = 0; 267 ssize_t vfs_read_retval = 0;
@@ -277,14 +274,11 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
277 return 0; 274 return 0;
278 275
279 if (dev->_isNTSC_ch2) { 276 if (dev->_isNTSC_ch2) {
280 frame_size = 277 frame_size = (line_size == Y411_LINE_SZ) ?
281 (line_size == 278 FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422;
282 Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 :
283 FRAME_SIZE_NTSC_Y422;
284 } else { 279 } else {
285 frame_size = 280 frame_size = (line_size == Y411_LINE_SZ) ?
286 (line_size == 281 FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
287 Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
288 } 282 }
289 283
290 frame_offset = (frame_index_temp > 0) ? frame_size : 0; 284 frame_offset = (frame_index_temp > 0) ? frame_size : 0;
@@ -318,14 +312,14 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
318 for (i = 0; i < dev->_lines_count_ch2; i++) { 312 for (i = 0; i < dev->_lines_count_ch2; i++) {
319 pos = file_offset; 313 pos = file_offset;
320 314
321 vfs_read_retval = 315 vfs_read_retval = vfs_read(myfile, mybuf, line_size,
322 vfs_read(myfile, mybuf, line_size, &pos); 316 &pos);
323 317
324 if (vfs_read_retval > 0 && vfs_read_retval == line_size 318 if (vfs_read_retval > 0 && vfs_read_retval == line_size
325 && dev->_data_buf_virt_addr_ch2 != NULL) { 319 && dev->_data_buf_virt_addr_ch2 != NULL) {
326 memcpy((void *)(dev->_data_buf_virt_addr_ch2 + 320 memcpy((void *)(dev->_data_buf_virt_addr_ch2 +
327 frame_offset / 4), mybuf, 321 frame_offset / 4), mybuf,
328 vfs_read_retval); 322 vfs_read_retval);
329 } 323 }
330 324
331 file_offset += vfs_read_retval; 325 file_offset += vfs_read_retval;
@@ -341,8 +335,8 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
341 if (i > 0) 335 if (i > 0)
342 dev->_frame_count_ch2++; 336 dev->_frame_count_ch2++;
343 337
344 dev->_file_status_ch2 = 338 dev->_file_status_ch2 = (vfs_read_retval == line_size) ?
345 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 339 IN_PROGRESS : END_OF_FILE;
346 340
347 set_fs(old_fs); 341 set_fs(old_fs);
348 filp_close(myfile, NULL); 342 filp_close(myfile, NULL);
@@ -353,8 +347,8 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
353 347
354static void cx25821_vidups_handler_ch2(struct work_struct *work) 348static void cx25821_vidups_handler_ch2(struct work_struct *work)
355{ 349{
356 struct cx25821_dev *dev = 350 struct cx25821_dev *dev = container_of(work, struct cx25821_dev,
357 container_of(work, struct cx25821_dev, _irq_work_entry_ch2); 351 _irq_work_entry_ch2);
358 352
359 if (!dev) { 353 if (!dev) {
360 pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n", 354 pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n",
@@ -362,18 +356,16 @@ static void cx25821_vidups_handler_ch2(struct work_struct *work)
362 return; 356 return;
363 } 357 }
364 358
365 cx25821_get_frame_ch2(dev, 359 cx25821_get_frame_ch2(dev, dev->channels[dev->
366 dev->channels[dev-> 360 _channel2_upstream_select].sram_channels);
367 _channel2_upstream_select].sram_channels);
368} 361}
369 362
370int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch) 363int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
371{ 364{
372 struct file *myfile; 365 struct file *myfile;
373 int i = 0, j = 0; 366 int i = 0, j = 0;
374 int line_size = 367 int line_size = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ?
375 (dev->_pixel_format_ch2 == 368 Y411_LINE_SZ : Y422_LINE_SZ;
376 PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
377 ssize_t vfs_read_retval = 0; 369 ssize_t vfs_read_retval = 0;
378 char mybuf[line_size]; 370 char mybuf[line_size];
379 loff_t pos; 371 loff_t pos;
@@ -410,16 +402,16 @@ int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
410 for (i = 0; i < dev->_lines_count_ch2; i++) { 402 for (i = 0; i < dev->_lines_count_ch2; i++) {
411 pos = offset; 403 pos = offset;
412 404
413 vfs_read_retval = 405 vfs_read_retval = vfs_read(myfile, mybuf,
414 vfs_read(myfile, mybuf, line_size, &pos); 406 line_size, &pos);
415 407
416 if (vfs_read_retval > 0 408 if (vfs_read_retval > 0 &&
417 && vfs_read_retval == line_size 409 vfs_read_retval == line_size &&
418 && dev->_data_buf_virt_addr_ch2 != NULL) { 410 dev->_data_buf_virt_addr_ch2 != NULL) {
419 memcpy((void *)(dev-> 411 memcpy((void *)(dev->
420 _data_buf_virt_addr_ch2 412 _data_buf_virt_addr_ch2
421 + offset / 4), mybuf, 413 + offset / 4), mybuf,
422 vfs_read_retval); 414 vfs_read_retval);
423 } 415 }
424 416
425 offset += vfs_read_retval; 417 offset += vfs_read_retval;
@@ -438,8 +430,8 @@ int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
438 break; 430 break;
439 } 431 }
440 432
441 dev->_file_status_ch2 = 433 dev->_file_status_ch2 = (vfs_read_retval == line_size) ?
442 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 434 IN_PROGRESS : END_OF_FILE;
443 435
444 set_fs(old_fs); 436 set_fs(old_fs);
445 myfile->f_pos = 0; 437 myfile->f_pos = 0;
@@ -463,9 +455,8 @@ static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
463 dev->_dma_phys_addr_ch2); 455 dev->_dma_phys_addr_ch2);
464 } 456 }
465 457
466 dev->_dma_virt_addr_ch2 = 458 dev->_dma_virt_addr_ch2 = pci_alloc_consistent(dev->pci,
467 pci_alloc_consistent(dev->pci, dev->upstream_riscbuf_size_ch2, 459 dev->upstream_riscbuf_size_ch2, &dma_addr);
468 &dma_addr);
469 dev->_dma_virt_start_addr_ch2 = dev->_dma_virt_addr_ch2; 460 dev->_dma_virt_start_addr_ch2 = dev->_dma_virt_addr_ch2;
470 dev->_dma_phys_start_addr_ch2 = dma_addr; 461 dev->_dma_phys_start_addr_ch2 = dma_addr;
471 dev->_dma_phys_addr_ch2 = dma_addr; 462 dev->_dma_phys_addr_ch2 = dma_addr;
@@ -485,9 +476,8 @@ static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
485 dev->_data_buf_phys_addr_ch2); 476 dev->_data_buf_phys_addr_ch2);
486 } 477 }
487 /* For Video Data buffer allocation */ 478 /* For Video Data buffer allocation */
488 dev->_data_buf_virt_addr_ch2 = 479 dev->_data_buf_virt_addr_ch2 = pci_alloc_consistent(dev->pci,
489 pci_alloc_consistent(dev->pci, dev->upstream_databuf_size_ch2, 480 dev->upstream_databuf_size_ch2, &data_dma_addr);
490 &data_dma_addr);
491 dev->_data_buf_phys_addr_ch2 = data_dma_addr; 481 dev->_data_buf_phys_addr_ch2 = data_dma_addr;
492 dev->_data_buf_size_ch2 = dev->upstream_databuf_size_ch2; 482 dev->_data_buf_size_ch2 = dev->upstream_databuf_size_ch2;
493 483
@@ -563,8 +553,8 @@ int cx25821_video_upstream_irq_ch2(struct cx25821_dev *dev, int chan_num,
563 else 553 else
564 line_size_in_bytes = Y422_LINE_SZ; 554 line_size_in_bytes = Y422_LINE_SZ;
565 risc_phys_jump_addr = 555 risc_phys_jump_addr =
566 dev->_dma_phys_start_addr_ch2 + 556 dev->_dma_phys_start_addr_ch2 +
567 odd_risc_prog_size; 557 odd_risc_prog_size;
568 558
569 rp = cx25821_update_riscprogram_ch2(dev, 559 rp = cx25821_update_riscprogram_ch2(dev,
570 dev->_dma_virt_start_addr_ch2, 560 dev->_dma_virt_start_addr_ch2,
@@ -612,11 +602,9 @@ static irqreturn_t cx25821_upstream_irq_ch2(int irq, void *dev_id)
612 vid_status = cx_read(sram_ch->int_stat); 602 vid_status = cx_read(sram_ch->int_stat);
613 603
614 /* Only deal with our interrupt */ 604 /* Only deal with our interrupt */
615 if (vid_status) { 605 if (vid_status)
616 handled = 606 handled = cx25821_video_upstream_irq_ch2(dev, channel_num,
617 cx25821_video_upstream_irq_ch2(dev, channel_num, 607 vid_status);
618 vid_status);
619 }
620 608
621 if (handled < 0) 609 if (handled < 0)
622 cx25821_stop_upstream_video_ch2(dev); 610 cx25821_stop_upstream_video_ch2(dev);
@@ -691,8 +679,7 @@ int cx25821_start_video_dma_upstream_ch2(struct cx25821_dev *dev,
691 tmp = cx_read(sram_ch->int_msk); 679 tmp = cx_read(sram_ch->int_msk);
692 cx_write(sram_ch->int_msk, tmp |= _intr_msk); 680 cx_write(sram_ch->int_msk, tmp |= _intr_msk);
693 681
694 err = 682 err = request_irq(dev->pci->irq, cx25821_upstream_irq_ch2,
695 request_irq(dev->pci->irq, cx25821_upstream_irq_ch2,
696 IRQF_SHARED, dev->name, dev); 683 IRQF_SHARED, dev->name, dev);
697 if (err < 0) { 684 if (err < 0) {
698 pr_err("%s: can't get upstream IRQ %d\n", 685 pr_err("%s: can't get upstream IRQ %d\n",
@@ -752,45 +739,38 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
752 dev->_file_status_ch2 = RESET_STATUS; 739 dev->_file_status_ch2 = RESET_STATUS;
753 dev->_lines_count_ch2 = dev->_isNTSC_ch2 ? 480 : 576; 740 dev->_lines_count_ch2 = dev->_isNTSC_ch2 ? 480 : 576;
754 dev->_pixel_format_ch2 = pixel_format; 741 dev->_pixel_format_ch2 = pixel_format;
755 dev->_line_size_ch2 = 742 dev->_line_size_ch2 = (dev->_pixel_format_ch2 == PIXEL_FRMT_422) ?
756 (dev->_pixel_format_ch2 == 743 (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
757 PIXEL_FRMT_422) ? (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
758 data_frame_size = dev->_isNTSC_ch2 ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ; 744 data_frame_size = dev->_isNTSC_ch2 ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ;
759 risc_buffer_size = 745 risc_buffer_size = dev->_isNTSC_ch2 ?
760 dev->_isNTSC_ch2 ? NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE; 746 NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE;
761 747
762 if (dev->input_filename_ch2) { 748 if (dev->input_filename_ch2) {
763 str_length = strlen(dev->input_filename_ch2); 749 str_length = strlen(dev->input_filename_ch2);
764 dev->_filename_ch2 = kmalloc(str_length + 1, GFP_KERNEL); 750 dev->_filename_ch2 = kmemdup(dev->input_filename_ch2,
751 str_length + 1, GFP_KERNEL);
765 752
766 if (!dev->_filename_ch2) 753 if (!dev->_filename_ch2)
767 goto error; 754 goto error;
768
769 memcpy(dev->_filename_ch2, dev->input_filename_ch2,
770 str_length + 1);
771 } else { 755 } else {
772 str_length = strlen(dev->_defaultname_ch2); 756 str_length = strlen(dev->_defaultname_ch2);
773 dev->_filename_ch2 = kmalloc(str_length + 1, GFP_KERNEL); 757 dev->_filename_ch2 = kmemdup(dev->_defaultname_ch2,
758 str_length + 1, GFP_KERNEL);
774 759
775 if (!dev->_filename_ch2) 760 if (!dev->_filename_ch2)
776 goto error; 761 goto error;
777
778 memcpy(dev->_filename_ch2, dev->_defaultname_ch2,
779 str_length + 1);
780 } 762 }
781 763
782 /* Default if filename is empty string */ 764 /* Default if filename is empty string */
783 if (strcmp(dev->input_filename_ch2, "") == 0) { 765 if (strcmp(dev->input_filename_ch2, "") == 0) {
784 if (dev->_isNTSC_ch2) { 766 if (dev->_isNTSC_ch2) {
785 dev->_filename_ch2 = 767 dev->_filename_ch2 = (dev->_pixel_format_ch2 ==
786 (dev->_pixel_format_ch2 == 768 PIXEL_FRMT_411) ? "/root/vid411.yuv" :
787 PIXEL_FRMT_411) ? "/root/vid411.yuv" : 769 "/root/vidtest.yuv";
788 "/root/vidtest.yuv";
789 } else { 770 } else {
790 dev->_filename_ch2 = 771 dev->_filename_ch2 = (dev->_pixel_format_ch2 ==
791 (dev->_pixel_format_ch2 == 772 PIXEL_FRMT_411) ? "/root/pal411.yuv" :
792 PIXEL_FRMT_411) ? "/root/pal411.yuv" : 773 "/root/pal422.yuv";
793 "/root/pal422.yuv";
794 } 774 }
795 } 775 }
796 776
diff --git a/drivers/media/video/cx25821/cx25821-video-upstream.c b/drivers/media/video/cx25821/cx25821-video-upstream.c
index c0b80068f46..21e7d657f04 100644
--- a/drivers/media/video/cx25821/cx25821-video-upstream.c
+++ b/drivers/media/video/cx25821/cx25821-video-upstream.c
@@ -136,7 +136,7 @@ static __le32 *cx25821_risc_field_upstream(struct cx25821_dev *dev, __le32 * rp,
136{ 136{
137 unsigned int line, i; 137 unsigned int line, i;
138 struct sram_channel *sram_ch = 138 struct sram_channel *sram_ch =
139 dev->channels[dev->_channel_upstream_select].sram_channels; 139 dev->channels[dev->_channel_upstream_select].sram_channels;
140 int dist_betwn_starts = bpl * 2; 140 int dist_betwn_starts = bpl * 2;
141 141
142 /* sync instruction */ 142 /* sync instruction */
@@ -194,15 +194,12 @@ int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
194 if (dev->_isNTSC) { 194 if (dev->_isNTSC) {
195 odd_num_lines = singlefield_lines + 1; 195 odd_num_lines = singlefield_lines + 1;
196 risc_program_size = FRAME1_VID_PROG_SIZE; 196 risc_program_size = FRAME1_VID_PROG_SIZE;
197 frame_size = 197 frame_size = (bpl == Y411_LINE_SZ) ?
198 (bpl == 198 FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422;
199 Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 :
200 FRAME_SIZE_NTSC_Y422;
201 } else { 199 } else {
202 risc_program_size = PAL_VID_PROG_SIZE; 200 risc_program_size = PAL_VID_PROG_SIZE;
203 frame_size = 201 frame_size = (bpl == Y411_LINE_SZ) ?
204 (bpl == 202 FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
205 Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
206 } 203 }
207 204
208 /* Virtual address of Risc buffer program */ 205 /* Virtual address of Risc buffer program */
@@ -214,13 +211,9 @@ int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
214 if (UNSET != top_offset) { 211 if (UNSET != top_offset) {
215 fifo_enable = (frame == 0) ? FIFO_ENABLE : FIFO_DISABLE; 212 fifo_enable = (frame == 0) ? FIFO_ENABLE : FIFO_DISABLE;
216 rp = cx25821_risc_field_upstream(dev, rp, 213 rp = cx25821_risc_field_upstream(dev, rp,
217 dev-> 214 dev->_data_buf_phys_addr +
218 _data_buf_phys_addr + 215 databuf_offset, top_offset, 0, bpl,
219 databuf_offset, 216 odd_num_lines, fifo_enable, ODD_FIELD);
220 top_offset, 0, bpl,
221 odd_num_lines,
222 fifo_enable,
223 ODD_FIELD);
224 } 217 }
225 218
226 fifo_enable = FIFO_DISABLE; 219 fifo_enable = FIFO_DISABLE;
@@ -234,8 +227,8 @@ int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
234 227
235 if (frame == 0) { 228 if (frame == 0) {
236 risc_flag = RISC_CNT_RESET; 229 risc_flag = RISC_CNT_RESET;
237 risc_phys_jump_addr = 230 risc_phys_jump_addr = dev->_dma_phys_start_addr +
238 dev->_dma_phys_start_addr + risc_program_size; 231 risc_program_size;
239 } else { 232 } else {
240 risc_phys_jump_addr = dev->_dma_phys_start_addr; 233 risc_phys_jump_addr = dev->_dma_phys_start_addr;
241 risc_flag = RISC_CNT_INC; 234 risc_flag = RISC_CNT_INC;
@@ -255,7 +248,7 @@ int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
255void cx25821_stop_upstream_video_ch1(struct cx25821_dev *dev) 248void cx25821_stop_upstream_video_ch1(struct cx25821_dev *dev)
256{ 249{
257 struct sram_channel *sram_ch = 250 struct sram_channel *sram_ch =
258 dev->channels[VID_UPSTREAM_SRAM_CHANNEL_I].sram_channels; 251 dev->channels[VID_UPSTREAM_SRAM_CHANNEL_I].sram_channels;
259 u32 tmp = 0; 252 u32 tmp = 0;
260 253
261 if (!dev->_is_running) { 254 if (!dev->_is_running) {
@@ -312,9 +305,8 @@ int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
312 struct file *myfile; 305 struct file *myfile;
313 int frame_index_temp = dev->_frame_index; 306 int frame_index_temp = dev->_frame_index;
314 int i = 0; 307 int i = 0;
315 int line_size = 308 int line_size = (dev->_pixel_format == PIXEL_FRMT_411) ?
316 (dev->_pixel_format == 309 Y411_LINE_SZ : Y422_LINE_SZ;
317 PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
318 int frame_size = 0; 310 int frame_size = 0;
319 int frame_offset = 0; 311 int frame_offset = 0;
320 ssize_t vfs_read_retval = 0; 312 ssize_t vfs_read_retval = 0;
@@ -326,16 +318,12 @@ int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
326 if (dev->_file_status == END_OF_FILE) 318 if (dev->_file_status == END_OF_FILE)
327 return 0; 319 return 0;
328 320
329 if (dev->_isNTSC) { 321 if (dev->_isNTSC)
330 frame_size = 322 frame_size = (line_size == Y411_LINE_SZ) ?
331 (line_size == 323 FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422;
332 Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 : 324 else
333 FRAME_SIZE_NTSC_Y422; 325 frame_size = (line_size == Y411_LINE_SZ) ?
334 } else { 326 FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
335 frame_size =
336 (line_size ==
337 Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
338 }
339 327
340 frame_offset = (frame_index_temp > 0) ? frame_size : 0; 328 frame_offset = (frame_index_temp > 0) ? frame_size : 0;
341 file_offset = dev->_frame_count * frame_size; 329 file_offset = dev->_frame_count * frame_size;
@@ -369,8 +357,8 @@ int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
369 for (i = 0; i < dev->_lines_count; i++) { 357 for (i = 0; i < dev->_lines_count; i++) {
370 pos = file_offset; 358 pos = file_offset;
371 359
372 vfs_read_retval = 360 vfs_read_retval = vfs_read(myfile, mybuf, line_size,
373 vfs_read(myfile, mybuf, line_size, &pos); 361 &pos);
374 362
375 if (vfs_read_retval > 0 && vfs_read_retval == line_size 363 if (vfs_read_retval > 0 && vfs_read_retval == line_size
376 && dev->_data_buf_virt_addr != NULL) { 364 && dev->_data_buf_virt_addr != NULL) {
@@ -392,8 +380,8 @@ int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
392 if (i > 0) 380 if (i > 0)
393 dev->_frame_count++; 381 dev->_frame_count++;
394 382
395 dev->_file_status = 383 dev->_file_status = (vfs_read_retval == line_size) ?
396 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 384 IN_PROGRESS : END_OF_FILE;
397 385
398 set_fs(old_fs); 386 set_fs(old_fs);
399 filp_close(myfile, NULL); 387 filp_close(myfile, NULL);
@@ -404,8 +392,8 @@ int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
404 392
405static void cx25821_vidups_handler(struct work_struct *work) 393static void cx25821_vidups_handler(struct work_struct *work)
406{ 394{
407 struct cx25821_dev *dev = 395 struct cx25821_dev *dev = container_of(work, struct cx25821_dev,
408 container_of(work, struct cx25821_dev, _irq_work_entry); 396 _irq_work_entry);
409 397
410 if (!dev) { 398 if (!dev) {
411 pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n", 399 pr_err("ERROR %s(): since container_of(work_struct) FAILED!\n",
@@ -413,18 +401,16 @@ static void cx25821_vidups_handler(struct work_struct *work)
413 return; 401 return;
414 } 402 }
415 403
416 cx25821_get_frame(dev, 404 cx25821_get_frame(dev, dev->channels[dev->_channel_upstream_select].
417 dev->channels[dev->_channel_upstream_select]. 405 sram_channels);
418 sram_channels);
419} 406}
420 407
421int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch) 408int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch)
422{ 409{
423 struct file *myfile; 410 struct file *myfile;
424 int i = 0, j = 0; 411 int i = 0, j = 0;
425 int line_size = 412 int line_size = (dev->_pixel_format == PIXEL_FRMT_411) ?
426 (dev->_pixel_format == 413 Y411_LINE_SZ : Y422_LINE_SZ;
427 PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
428 ssize_t vfs_read_retval = 0; 414 ssize_t vfs_read_retval = 0;
429 char mybuf[line_size]; 415 char mybuf[line_size];
430 loff_t pos; 416 loff_t pos;
@@ -461,8 +447,8 @@ int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch)
461 for (i = 0; i < dev->_lines_count; i++) { 447 for (i = 0; i < dev->_lines_count; i++) {
462 pos = offset; 448 pos = offset;
463 449
464 vfs_read_retval = 450 vfs_read_retval = vfs_read(myfile, mybuf,
465 vfs_read(myfile, mybuf, line_size, &pos); 451 line_size, &pos);
466 452
467 if (vfs_read_retval > 0 453 if (vfs_read_retval > 0
468 && vfs_read_retval == line_size 454 && vfs_read_retval == line_size
@@ -489,8 +475,8 @@ int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch)
489 break; 475 break;
490 } 476 }
491 477
492 dev->_file_status = 478 dev->_file_status = (vfs_read_retval == line_size) ?
493 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 479 IN_PROGRESS : END_OF_FILE;
494 480
495 set_fs(old_fs); 481 set_fs(old_fs);
496 myfile->f_pos = 0; 482 myfile->f_pos = 0;
@@ -507,14 +493,12 @@ int cx25821_upstream_buffer_prepare(struct cx25821_dev *dev,
507 dma_addr_t dma_addr; 493 dma_addr_t dma_addr;
508 dma_addr_t data_dma_addr; 494 dma_addr_t data_dma_addr;
509 495
510 if (dev->_dma_virt_addr != NULL) { 496 if (dev->_dma_virt_addr != NULL)
511 pci_free_consistent(dev->pci, dev->upstream_riscbuf_size, 497 pci_free_consistent(dev->pci, dev->upstream_riscbuf_size,
512 dev->_dma_virt_addr, dev->_dma_phys_addr); 498 dev->_dma_virt_addr, dev->_dma_phys_addr);
513 }
514 499
515 dev->_dma_virt_addr = 500 dev->_dma_virt_addr = pci_alloc_consistent(dev->pci,
516 pci_alloc_consistent(dev->pci, dev->upstream_riscbuf_size, 501 dev->upstream_riscbuf_size, &dma_addr);
517 &dma_addr);
518 dev->_dma_virt_start_addr = dev->_dma_virt_addr; 502 dev->_dma_virt_start_addr = dev->_dma_virt_addr;
519 dev->_dma_phys_start_addr = dma_addr; 503 dev->_dma_phys_start_addr = dma_addr;
520 dev->_dma_phys_addr = dma_addr; 504 dev->_dma_phys_addr = dma_addr;
@@ -528,15 +512,13 @@ int cx25821_upstream_buffer_prepare(struct cx25821_dev *dev,
528 /* Clear memory at address */ 512 /* Clear memory at address */
529 memset(dev->_dma_virt_addr, 0, dev->_risc_size); 513 memset(dev->_dma_virt_addr, 0, dev->_risc_size);
530 514
531 if (dev->_data_buf_virt_addr != NULL) { 515 if (dev->_data_buf_virt_addr != NULL)
532 pci_free_consistent(dev->pci, dev->upstream_databuf_size, 516 pci_free_consistent(dev->pci, dev->upstream_databuf_size,
533 dev->_data_buf_virt_addr, 517 dev->_data_buf_virt_addr,
534 dev->_data_buf_phys_addr); 518 dev->_data_buf_phys_addr);
535 }
536 /* For Video Data buffer allocation */ 519 /* For Video Data buffer allocation */
537 dev->_data_buf_virt_addr = 520 dev->_data_buf_virt_addr = pci_alloc_consistent(dev->pci,
538 pci_alloc_consistent(dev->pci, dev->upstream_databuf_size, 521 dev->upstream_databuf_size, &data_dma_addr);
539 &data_dma_addr);
540 dev->_data_buf_phys_addr = data_dma_addr; 522 dev->_data_buf_phys_addr = data_dma_addr;
541 dev->_data_buf_size = dev->upstream_databuf_size; 523 dev->_data_buf_size = dev->upstream_databuf_size;
542 524
@@ -553,9 +535,8 @@ int cx25821_upstream_buffer_prepare(struct cx25821_dev *dev,
553 return ret; 535 return ret;
554 536
555 /* Create RISC programs */ 537 /* Create RISC programs */
556 ret = 538 ret = cx25821_risc_buffer_upstream(dev, dev->pci, 0, bpl,
557 cx25821_risc_buffer_upstream(dev, dev->pci, 0, bpl, 539 dev->_lines_count);
558 dev->_lines_count);
559 if (ret < 0) { 540 if (ret < 0) {
560 pr_info("Failed creating Video Upstream Risc programs!\n"); 541 pr_info("Failed creating Video Upstream Risc programs!\n");
561 goto error; 542 goto error;
@@ -672,10 +653,9 @@ static irqreturn_t cx25821_upstream_irq(int irq, void *dev_id)
672 vid_status = cx_read(sram_ch->int_stat); 653 vid_status = cx_read(sram_ch->int_stat);
673 654
674 /* Only deal with our interrupt */ 655 /* Only deal with our interrupt */
675 if (vid_status) { 656 if (vid_status)
676 handled = 657 handled = cx25821_video_upstream_irq(dev, channel_num,
677 cx25821_video_upstream_irq(dev, channel_num, vid_status); 658 vid_status);
678 }
679 659
680 if (handled < 0) 660 if (handled < 0)
681 cx25821_stop_upstream_video_ch1(dev); 661 cx25821_stop_upstream_video_ch1(dev);
@@ -747,8 +727,7 @@ int cx25821_start_video_dma_upstream(struct cx25821_dev *dev,
747 tmp = cx_read(sram_ch->int_msk); 727 tmp = cx_read(sram_ch->int_msk);
748 cx_write(sram_ch->int_msk, tmp |= _intr_msk); 728 cx_write(sram_ch->int_msk, tmp |= _intr_msk);
749 729
750 err = 730 err = request_irq(dev->pci->irq, cx25821_upstream_irq,
751 request_irq(dev->pci->irq, cx25821_upstream_irq,
752 IRQF_SHARED, dev->name, dev); 731 IRQF_SHARED, dev->name, dev);
753 if (err < 0) { 732 if (err < 0) {
754 pr_err("%s: can't get upstream IRQ %d\n", 733 pr_err("%s: can't get upstream IRQ %d\n",
@@ -807,43 +786,38 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
807 dev->_file_status = RESET_STATUS; 786 dev->_file_status = RESET_STATUS;
808 dev->_lines_count = dev->_isNTSC ? 480 : 576; 787 dev->_lines_count = dev->_isNTSC ? 480 : 576;
809 dev->_pixel_format = pixel_format; 788 dev->_pixel_format = pixel_format;
810 dev->_line_size = 789 dev->_line_size = (dev->_pixel_format == PIXEL_FRMT_422) ?
811 (dev->_pixel_format == 790 (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
812 PIXEL_FRMT_422) ? (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
813 data_frame_size = dev->_isNTSC ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ; 791 data_frame_size = dev->_isNTSC ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ;
814 risc_buffer_size = 792 risc_buffer_size = dev->_isNTSC ?
815 dev->_isNTSC ? NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE; 793 NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE;
816 794
817 if (dev->input_filename) { 795 if (dev->input_filename) {
818 str_length = strlen(dev->input_filename); 796 str_length = strlen(dev->input_filename);
819 dev->_filename = kmalloc(str_length + 1, GFP_KERNEL); 797 dev->_filename = kmemdup(dev->input_filename, str_length + 1,
798 GFP_KERNEL);
820 799
821 if (!dev->_filename) 800 if (!dev->_filename)
822 goto error; 801 goto error;
823
824 memcpy(dev->_filename, dev->input_filename, str_length + 1);
825 } else { 802 } else {
826 str_length = strlen(dev->_defaultname); 803 str_length = strlen(dev->_defaultname);
827 dev->_filename = kmalloc(str_length + 1, GFP_KERNEL); 804 dev->_filename = kmemdup(dev->_defaultname, str_length + 1,
805 GFP_KERNEL);
828 806
829 if (!dev->_filename) 807 if (!dev->_filename)
830 goto error; 808 goto error;
831
832 memcpy(dev->_filename, dev->_defaultname, str_length + 1);
833 } 809 }
834 810
835 /* Default if filename is empty string */ 811 /* Default if filename is empty string */
836 if (strcmp(dev->input_filename, "") == 0) { 812 if (strcmp(dev->input_filename, "") == 0) {
837 if (dev->_isNTSC) { 813 if (dev->_isNTSC) {
838 dev->_filename = 814 dev->_filename =
839 (dev->_pixel_format == 815 (dev->_pixel_format == PIXEL_FRMT_411) ?
840 PIXEL_FRMT_411) ? "/root/vid411.yuv" : 816 "/root/vid411.yuv" : "/root/vidtest.yuv";
841 "/root/vidtest.yuv";
842 } else { 817 } else {
843 dev->_filename = 818 dev->_filename =
844 (dev->_pixel_format == 819 (dev->_pixel_format == PIXEL_FRMT_411) ?
845 PIXEL_FRMT_411) ? "/root/pal411.yuv" : 820 "/root/pal411.yuv" : "/root/pal422.yuv";
846 "/root/pal422.yuv";
847 } 821 }
848 } 822 }
849 823
@@ -852,13 +826,11 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
852 dev->_file_status = RESET_STATUS; 826 dev->_file_status = RESET_STATUS;
853 dev->_lines_count = dev->_isNTSC ? 480 : 576; 827 dev->_lines_count = dev->_isNTSC ? 480 : 576;
854 dev->_pixel_format = pixel_format; 828 dev->_pixel_format = pixel_format;
855 dev->_line_size = 829 dev->_line_size = (dev->_pixel_format == PIXEL_FRMT_422) ?
856 (dev->_pixel_format == 830 (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
857 PIXEL_FRMT_422) ? (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
858 831
859 retval = 832 retval = cx25821_sram_channel_setup_upstream(dev, sram_ch,
860 cx25821_sram_channel_setup_upstream(dev, sram_ch, dev->_line_size, 833 dev->_line_size, 0);
861 0);
862 834
863 /* setup fifo + format */ 835 /* setup fifo + format */
864 cx25821_set_pixelengine(dev, sram_ch, dev->_pixel_format); 836 cx25821_set_pixelengine(dev, sram_ch, dev->_pixel_format);
diff --git a/drivers/media/video/cx25821/cx25821-video.c b/drivers/media/video/cx25821/cx25821-video.c
index 4d6907cda75..ffd8bc79c02 100644
--- a/drivers/media/video/cx25821/cx25821-video.c
+++ b/drivers/media/video/cx25821/cx25821-video.c
@@ -118,12 +118,12 @@ void cx25821_dump_video_queue(struct cx25821_dev *dev,
118 118
119 if (!list_empty(&q->active)) { 119 if (!list_empty(&q->active)) {
120 list_for_each(item, &q->active) 120 list_for_each(item, &q->active)
121 buf = list_entry(item, struct cx25821_buffer, vb.queue); 121 buf = list_entry(item, struct cx25821_buffer, vb.queue);
122 } 122 }
123 123
124 if (!list_empty(&q->queued)) { 124 if (!list_empty(&q->queued)) {
125 list_for_each(item, &q->queued) 125 list_for_each(item, &q->queued)
126 buf = list_entry(item, struct cx25821_buffer, vb.queue); 126 buf = list_entry(item, struct cx25821_buffer, vb.queue);
127 } 127 }
128 128
129} 129}
@@ -140,8 +140,8 @@ void cx25821_video_wakeup(struct cx25821_dev *dev, struct cx25821_dmaqueue *q,
140 break; 140 break;
141 } 141 }
142 142
143 buf = 143 buf = list_entry(q->active.next, struct cx25821_buffer,
144 list_entry(q->active.next, struct cx25821_buffer, vb.queue); 144 vb.queue);
145 145
146 /* count comes from the hw and it is 16bit wide -- 146 /* count comes from the hw and it is 16bit wide --
147 * this trick handles wrap-arounds correctly for 147 * this trick handles wrap-arounds correctly for
@@ -318,8 +318,8 @@ int cx25821_restart_video_queue(struct cx25821_dev *dev,
318 struct list_head *item; 318 struct list_head *item;
319 319
320 if (!list_empty(&q->active)) { 320 if (!list_empty(&q->active)) {
321 buf = 321 buf = list_entry(q->active.next, struct cx25821_buffer,
322 list_entry(q->active.next, struct cx25821_buffer, vb.queue); 322 vb.queue);
323 323
324 cx25821_start_video_dma(dev, q, buf, channel); 324 cx25821_start_video_dma(dev, q, buf, channel);
325 325
@@ -337,8 +337,8 @@ int cx25821_restart_video_queue(struct cx25821_dev *dev,
337 if (list_empty(&q->queued)) 337 if (list_empty(&q->queued))
338 return 0; 338 return 0;
339 339
340 buf = 340 buf = list_entry(q->queued.next, struct cx25821_buffer,
341 list_entry(q->queued.next, struct cx25821_buffer, vb.queue); 341 vb.queue);
342 342
343 if (NULL == prev) { 343 if (NULL == prev) {
344 list_move_tail(&buf->vb.queue, &q->active); 344 list_move_tail(&buf->vb.queue, &q->active);
@@ -375,8 +375,8 @@ void cx25821_vid_timeout(unsigned long data)
375 375
376 spin_lock_irqsave(&dev->slock, flags); 376 spin_lock_irqsave(&dev->slock, flags);
377 while (!list_empty(&q->active)) { 377 while (!list_empty(&q->active)) {
378 buf = 378 buf = list_entry(q->active.next, struct cx25821_buffer,
379 list_entry(q->active.next, struct cx25821_buffer, vb.queue); 379 vb.queue);
380 list_del(&buf->vb.queue); 380 list_del(&buf->vb.queue);
381 381
382 buf->vb.state = VIDEOBUF_ERROR; 382 buf->vb.state = VIDEOBUF_ERROR;
@@ -484,8 +484,7 @@ int cx25821_video_register(struct cx25821_dev *dev)
484 cx25821_init_controls(dev, i); 484 cx25821_init_controls(dev, i);
485 485
486 cx25821_risc_stopper(dev->pci, &dev->channels[i].vidq.stopper, 486 cx25821_risc_stopper(dev->pci, &dev->channels[i].vidq.stopper,
487 dev->channels[i].sram_channels->dma_ctl, 487 dev->channels[i].sram_channels->dma_ctl, 0x11, 0);
488 0x11, 0);
489 488
490 dev->channels[i].sram_channels = &cx25821_sram_channels[i]; 489 dev->channels[i].sram_channels = &cx25821_sram_channels[i];
491 dev->channels[i].video_dev = NULL; 490 dev->channels[i].video_dev = NULL;
@@ -499,15 +498,14 @@ int cx25821_video_register(struct cx25821_dev *dev)
499 dev->channels[i].timeout_data.dev = dev; 498 dev->channels[i].timeout_data.dev = dev;
500 dev->channels[i].timeout_data.channel = 499 dev->channels[i].timeout_data.channel =
501 &cx25821_sram_channels[i]; 500 &cx25821_sram_channels[i];
502 dev->channels[i].vidq.timeout.function = 501 dev->channels[i].vidq.timeout.function = cx25821_vid_timeout;
503 cx25821_vid_timeout;
504 dev->channels[i].vidq.timeout.data = 502 dev->channels[i].vidq.timeout.data =
505 (unsigned long)&dev->channels[i].timeout_data; 503 (unsigned long)&dev->channels[i].timeout_data;
506 init_timer(&dev->channels[i].vidq.timeout); 504 init_timer(&dev->channels[i].vidq.timeout);
507 505
508 /* register v4l devices */ 506 /* register v4l devices */
509 dev->channels[i].video_dev = cx25821_vdev_init(dev, 507 dev->channels[i].video_dev = cx25821_vdev_init(dev, dev->pci,
510 dev->pci, &cx25821_video_device, "video"); 508 &cx25821_video_device, "video");
511 509
512 err = video_register_device(dev->channels[i].video_dev, 510 err = video_register_device(dev->channels[i].video_dev,
513 VFL_TYPE_GRABBER, video_nr[dev->nr]); 511 VFL_TYPE_GRABBER, video_nr[dev->nr]);
@@ -528,7 +526,6 @@ int cx25821_video_register(struct cx25821_dev *dev)
528#endif 526#endif
529 mutex_unlock(&dev->lock); 527 mutex_unlock(&dev->lock);
530 528
531
532 return 0; 529 return 0;
533 530
534fail_unreg: 531fail_unreg:
@@ -558,7 +555,7 @@ int cx25821_buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
558 struct cx25821_fh *fh = q->priv_data; 555 struct cx25821_fh *fh = q->priv_data;
559 struct cx25821_dev *dev = fh->dev; 556 struct cx25821_dev *dev = fh->dev;
560 struct cx25821_buffer *buf = 557 struct cx25821_buffer *buf =
561 container_of(vb, struct cx25821_buffer, vb); 558 container_of(vb, struct cx25821_buffer, vb);
562 int rc, init_buffer = 0; 559 int rc, init_buffer = 0;
563 u32 line0_offset, line1_offset; 560 u32 line0_offset, line1_offset;
564 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb); 561 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
@@ -617,14 +614,13 @@ int cx25821_buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
617 if (channel_opened >= 0 && channel_opened <= 7) { 614 if (channel_opened >= 0 && channel_opened <= 7) {
618 if (dev->channels[channel_opened] 615 if (dev->channels[channel_opened]
619 .use_cif_resolution) { 616 .use_cif_resolution) {
620 if (dev->tvnorm & V4L2_STD_PAL_BG 617 if (dev->tvnorm & V4L2_STD_PAL_BG ||
621 || dev->tvnorm & V4L2_STD_PAL_DK) 618 dev->tvnorm & V4L2_STD_PAL_DK)
622 bpl_local = 352 << 1; 619 bpl_local = 352 << 1;
623 else 620 else
624 bpl_local = 621 bpl_local = dev->channels[
625 dev->channels[channel_opened]. 622 channel_opened].
626 cif_width << 623 cif_width << 1;
627 1;
628 } 624 }
629 } 625 }
630 } 626 }
@@ -685,7 +681,7 @@ void cx25821_buffer_release(struct videobuf_queue *q,
685 struct videobuf_buffer *vb) 681 struct videobuf_buffer *vb)
686{ 682{
687 struct cx25821_buffer *buf = 683 struct cx25821_buffer *buf =
688 container_of(vb, struct cx25821_buffer, vb); 684 container_of(vb, struct cx25821_buffer, vb);
689 685
690 cx25821_free_buffer(q, buf); 686 cx25821_free_buffer(q, buf);
691} 687}
@@ -723,7 +719,7 @@ int cx25821_video_mmap(struct file *file, struct vm_area_struct *vma)
723static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) 719static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
724{ 720{
725 struct cx25821_buffer *buf = 721 struct cx25821_buffer *buf =
726 container_of(vb, struct cx25821_buffer, vb); 722 container_of(vb, struct cx25821_buffer, vb);
727 struct cx25821_buffer *prev; 723 struct cx25821_buffer *prev;
728 struct cx25821_fh *fh = vq->priv_data; 724 struct cx25821_fh *fh = vq->priv_data;
729 struct cx25821_dev *dev = fh->dev; 725 struct cx25821_dev *dev = fh->dev;
@@ -814,7 +810,7 @@ static int video_open(struct file *file)
814 810
815 for (i = 0; i < MAX_VID_CHANNEL_NUM; i++) { 811 for (i = 0; i < MAX_VID_CHANNEL_NUM; i++) {
816 if (h->channels[i].video_dev && 812 if (h->channels[i].video_dev &&
817 h->channels[i].video_dev->minor == minor) { 813 h->channels[i].video_dev->minor == minor) {
818 dev = h; 814 dev = h;
819 ch_id = i; 815 ch_id = i;
820 type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 816 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
@@ -848,11 +844,10 @@ static int video_open(struct file *file)
848 844
849 v4l2_prio_open(&dev->channels[ch_id].prio, &fh->prio); 845 v4l2_prio_open(&dev->channels[ch_id].prio, &fh->prio);
850 846
851 videobuf_queue_sg_init(&fh->vidq, &cx25821_video_qops, 847 videobuf_queue_sg_init(&fh->vidq, &cx25821_video_qops, &dev->pci->dev,
852 &dev->pci->dev, &dev->slock, 848 &dev->slock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
853 V4L2_BUF_TYPE_VIDEO_CAPTURE, 849 V4L2_FIELD_INTERLACED, sizeof(struct cx25821_buffer),
854 V4L2_FIELD_INTERLACED, 850 fh, NULL);
855 sizeof(struct cx25821_buffer), fh, NULL);
856 851
857 dprintk(1, "post videobuf_queue_init()\n"); 852 dprintk(1, "post videobuf_queue_init()\n");
858 mutex_unlock(&cx25821_devlist_mutex); 853 mutex_unlock(&cx25821_devlist_mutex);
@@ -1168,8 +1163,8 @@ int cx25821_vidioc_querycap(struct file *file, void *priv,
1168 strlcpy(cap->card, cx25821_boards[dev->board].name, sizeof(cap->card)); 1163 strlcpy(cap->card, cx25821_boards[dev->board].name, sizeof(cap->card));
1169 sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); 1164 sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci));
1170 cap->version = CX25821_VERSION_CODE; 1165 cap->version = CX25821_VERSION_CODE;
1171 cap->capabilities = 1166 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
1172 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 1167 V4L2_CAP_STREAMING;
1173 if (UNSET != dev->tuner_type) 1168 if (UNSET != dev->tuner_type)
1174 cap->capabilities |= V4L2_CAP_TUNER; 1169 cap->capabilities |= V4L2_CAP_TUNER;
1175 return 0; 1170 return 0;
@@ -1454,38 +1449,38 @@ static const struct v4l2_queryctrl no_ctl = {
1454static struct v4l2_queryctrl cx25821_ctls[] = { 1449static struct v4l2_queryctrl cx25821_ctls[] = {
1455 /* --- video --- */ 1450 /* --- video --- */
1456 { 1451 {
1457 .id = V4L2_CID_BRIGHTNESS, 1452 .id = V4L2_CID_BRIGHTNESS,
1458 .name = "Brightness", 1453 .name = "Brightness",
1459 .minimum = 0, 1454 .minimum = 0,
1460 .maximum = 10000, 1455 .maximum = 10000,
1461 .step = 1, 1456 .step = 1,
1462 .default_value = 6200, 1457 .default_value = 6200,
1463 .type = V4L2_CTRL_TYPE_INTEGER, 1458 .type = V4L2_CTRL_TYPE_INTEGER,
1464 }, { 1459 }, {
1465 .id = V4L2_CID_CONTRAST, 1460 .id = V4L2_CID_CONTRAST,
1466 .name = "Contrast", 1461 .name = "Contrast",
1467 .minimum = 0, 1462 .minimum = 0,
1468 .maximum = 10000, 1463 .maximum = 10000,
1469 .step = 1, 1464 .step = 1,
1470 .default_value = 5000, 1465 .default_value = 5000,
1471 .type = V4L2_CTRL_TYPE_INTEGER, 1466 .type = V4L2_CTRL_TYPE_INTEGER,
1472 }, { 1467 }, {
1473 .id = V4L2_CID_SATURATION, 1468 .id = V4L2_CID_SATURATION,
1474 .name = "Saturation", 1469 .name = "Saturation",
1475 .minimum = 0, 1470 .minimum = 0,
1476 .maximum = 10000, 1471 .maximum = 10000,
1477 .step = 1, 1472 .step = 1,
1478 .default_value = 5000, 1473 .default_value = 5000,
1479 .type = V4L2_CTRL_TYPE_INTEGER, 1474 .type = V4L2_CTRL_TYPE_INTEGER,
1480 }, { 1475 }, {
1481 .id = V4L2_CID_HUE, 1476 .id = V4L2_CID_HUE,
1482 .name = "Hue", 1477 .name = "Hue",
1483 .minimum = 0, 1478 .minimum = 0,
1484 .maximum = 10000, 1479 .maximum = 10000,
1485 .step = 1, 1480 .step = 1,
1486 .default_value = 5000, 1481 .default_value = 5000,
1487 .type = V4L2_CTRL_TYPE_INTEGER, 1482 .type = V4L2_CTRL_TYPE_INTEGER,
1488 } 1483 }
1489}; 1484};
1490static const int CX25821_CTLS = ARRAY_SIZE(cx25821_ctls); 1485static const int CX25821_CTLS = ARRAY_SIZE(cx25821_ctls);
1491 1486
@@ -1623,7 +1618,8 @@ int cx25821_vidioc_cropcap(struct file *file, void *priv,
1623 1618
1624 if (cropcap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1619 if (cropcap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1625 return -EINVAL; 1620 return -EINVAL;
1626 cropcap->bounds.top = cropcap->bounds.left = 0; 1621 cropcap->bounds.top = 0;
1622 cropcap->bounds.left = 0;
1627 cropcap->bounds.width = 720; 1623 cropcap->bounds.width = 720;
1628 cropcap->bounds.height = dev->tvnorm == V4L2_STD_PAL_BG ? 576 : 480; 1624 cropcap->bounds.height = dev->tvnorm == V4L2_STD_PAL_BG ? 576 : 480;
1629 cropcap->pixelaspect.numerator = 1625 cropcap->pixelaspect.numerator =
@@ -1829,8 +1825,11 @@ static long video_ioctl_set(struct file *file, unsigned int cmd,
1829 struct downstream_user_struct *data_from_user; 1825 struct downstream_user_struct *data_from_user;
1830 int command; 1826 int command;
1831 int width = 720; 1827 int width = 720;
1832 int selected_channel = 0, pix_format = 0, i = 0; 1828 int selected_channel = 0;
1833 int cif_enable = 0, cif_width = 0; 1829 int pix_format = 0;
1830 int i = 0;
1831 int cif_enable = 0;
1832 int cif_width = 0;
1834 u32 value = 0; 1833 u32 value = 0;
1835 1834
1836 data_from_user = (struct downstream_user_struct *)arg; 1835 data_from_user = (struct downstream_user_struct *)arg;
@@ -1895,8 +1894,8 @@ static long video_ioctl_set(struct file *file, unsigned int cmd,
1895 } 1894 }
1896 1895
1897 if (selected_channel <= 7 && selected_channel >= 0) { 1896 if (selected_channel <= 7 && selected_channel >= 0) {
1898 dev->channels[selected_channel]. 1897 dev->channels[selected_channel].use_cif_resolution =
1899 use_cif_resolution = cif_enable; 1898 cif_enable;
1900 dev->channels[selected_channel].cif_width = width; 1899 dev->channels[selected_channel].cif_width = width;
1901 } else { 1900 } else {
1902 for (i = 0; i < VID_CHANNEL_NUM; i++) { 1901 for (i = 0; i < VID_CHANNEL_NUM; i++) {
@@ -1932,9 +1931,9 @@ static long video_ioctl_set(struct file *file, unsigned int cmd,
1932static long cx25821_video_ioctl(struct file *file, 1931static long cx25821_video_ioctl(struct file *file,
1933 unsigned int cmd, unsigned long arg) 1932 unsigned int cmd, unsigned long arg)
1934{ 1933{
1935 int ret = 0; 1934 int ret = 0;
1936 1935
1937 struct cx25821_fh *fh = file->private_data; 1936 struct cx25821_fh *fh = file->private_data;
1938 1937
1939 /* check to see if it's the video upstream */ 1938 /* check to see if it's the video upstream */
1940 if (fh->channel_id == SRAM_CH09) { 1939 if (fh->channel_id == SRAM_CH09) {
diff --git a/drivers/media/video/cx25821/cx25821.h b/drivers/media/video/cx25821/cx25821.h
index 2d2d0093282..b9aa801b00a 100644
--- a/drivers/media/video/cx25821/cx25821.h
+++ b/drivers/media/video/cx25821/cx25821.h
@@ -67,7 +67,7 @@
67#define MAX_CAMERAS 16 67#define MAX_CAMERAS 16
68 68
69/* Max number of inputs by card */ 69/* Max number of inputs by card */
70#define MAX_CX25821_INPUT 8 70#define MAX_CX25821_INPUT 8
71#define INPUT(nr) (&cx25821_boards[dev->board].input[nr]) 71#define INPUT(nr) (&cx25821_boards[dev->board].input[nr])
72#define RESOURCE_VIDEO0 1 72#define RESOURCE_VIDEO0 1
73#define RESOURCE_VIDEO1 2 73#define RESOURCE_VIDEO1 2
@@ -85,7 +85,7 @@
85 85
86#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 86#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
87 87
88#define UNKNOWN_BOARD 0 88#define UNKNOWN_BOARD 0
89#define CX25821_BOARD 1 89#define CX25821_BOARD 1
90 90
91/* Currently supported by the driver */ 91/* Currently supported by the driver */
diff --git a/drivers/media/video/cx25840/cx25840-audio.c b/drivers/media/video/cx25840/cx25840-audio.c
index 005f1109364..34b96c7cfd6 100644
--- a/drivers/media/video/cx25840/cx25840-audio.c
+++ b/drivers/media/video/cx25840/cx25840-audio.c
@@ -480,7 +480,6 @@ void cx25840_audio_set_path(struct i2c_client *client)
480 480
481static void set_volume(struct i2c_client *client, int volume) 481static void set_volume(struct i2c_client *client, int volume)
482{ 482{
483 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
484 int vol; 483 int vol;
485 484
486 /* Convert the volume to msp3400 values (0-127) */ 485 /* Convert the volume to msp3400 values (0-127) */
@@ -496,14 +495,7 @@ static void set_volume(struct i2c_client *client, int volume)
496 } 495 }
497 496
498 /* PATH1_VOLUME */ 497 /* PATH1_VOLUME */
499 if (is_cx2388x(state)) { 498 cx25840_write(client, 0x8d4, 228 - (vol * 2));
500 /* for cx23885 volume doesn't work,
501 * the calculation always results in
502 * e4 regardless.
503 */
504 cx25840_write(client, 0x8d4, volume);
505 } else
506 cx25840_write(client, 0x8d4, 228 - (vol * 2));
507} 499}
508 500
509static void set_balance(struct i2c_client *client, int balance) 501static void set_balance(struct i2c_client *client, int balance)
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c
index cd9976408ab..05247d4c340 100644
--- a/drivers/media/video/cx25840/cx25840-core.c
+++ b/drivers/media/video/cx25840/cx25840-core.c
@@ -18,6 +18,9 @@
18 * CX2388[578] IRQ handling, IO Pin mux configuration and other small fixes are 18 * CX2388[578] IRQ handling, IO Pin mux configuration and other small fixes are
19 * Copyright (C) 2010 Andy Walls <awalls@md.metrocast.net> 19 * Copyright (C) 2010 Andy Walls <awalls@md.metrocast.net>
20 * 20 *
21 * CX23888 DIF support for the HVR1850
22 * Copyright (C) 2011 Steven Toth <stoth@kernellabs.com>
23 *
21 * This program is free software; you can redistribute it and/or 24 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License 25 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version 2 26 * as published by the Free Software Foundation; either version 2
@@ -40,6 +43,7 @@
40#include <linux/videodev2.h> 43#include <linux/videodev2.h>
41#include <linux/i2c.h> 44#include <linux/i2c.h>
42#include <linux/delay.h> 45#include <linux/delay.h>
46#include <linux/math64.h>
43#include <media/v4l2-common.h> 47#include <media/v4l2-common.h>
44#include <media/v4l2-chip-ident.h> 48#include <media/v4l2-chip-ident.h>
45#include <media/cx25840.h> 49#include <media/cx25840.h>
@@ -80,6 +84,7 @@ MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
80 84
81 85
82/* ----------------------------------------------------------------------- */ 86/* ----------------------------------------------------------------------- */
87static void cx23885_std_setup(struct i2c_client *client);
83 88
84int cx25840_write(struct i2c_client *client, u16 addr, u8 value) 89int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
85{ 90{
@@ -498,8 +503,13 @@ static void cx23885_initialize(struct i2c_client *client)
498 * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz 503 * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
499 * 572.73 MHz before post divide 504 * 572.73 MHz before post divide
500 */ 505 */
501 cx25840_write4(client, 0x11c, 0x00e8ba26); 506 /* HVR1850 or 50MHz xtal */
502 cx25840_write4(client, 0x118, 0x0000040b); 507 cx25840_write(client, 0x2, 0x71);
508 cx25840_write4(client, 0x11c, 0x01d1744c);
509 cx25840_write4(client, 0x118, 0x00000416);
510 cx25840_write4(client, 0x404, 0x0010253e);
511 cx25840_write4(client, 0x42c, 0x42600000);
512 cx25840_write4(client, 0x44c, 0x161f1000);
503 break; 513 break;
504 case V4L2_IDENT_CX23887_AV: 514 case V4L2_IDENT_CX23887_AV:
505 /* 515 /*
@@ -533,8 +543,18 @@ static void cx23885_initialize(struct i2c_client *client)
533 * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz 543 * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz
534 * 432.0 MHz before post divide 544 * 432.0 MHz before post divide
535 */ 545 */
536 cx25840_write4(client, 0x10c, 0x002be2c9); 546
537 cx25840_write4(client, 0x108, 0x0000040f); 547 /* HVR1850 */
548 switch (state->id) {
549 case V4L2_IDENT_CX23888_AV:
550 /* 888/HVR1250 specific */
551 cx25840_write4(client, 0x10c, 0x13333333);
552 cx25840_write4(client, 0x108, 0x00000515);
553 break;
554 default:
555 cx25840_write4(client, 0x10c, 0x002be2c9);
556 cx25840_write4(client, 0x108, 0x0000040f);
557 }
538 558
539 /* Luma */ 559 /* Luma */
540 cx25840_write4(client, 0x414, 0x00107d12); 560 cx25840_write4(client, 0x414, 0x00107d12);
@@ -556,8 +576,9 @@ static void cx23885_initialize(struct i2c_client *client)
556 * 368.64 MHz before post divide 576 * 368.64 MHz before post divide
557 * 122.88 MHz / 0xa = 12.288 MHz 577 * 122.88 MHz / 0xa = 12.288 MHz
558 */ 578 */
559 cx25840_write4(client, 0x114, 0x00bedfa4); 579 /* HVR1850 or 50MHz xtal */
560 cx25840_write4(client, 0x110, 0x000a0307); 580 cx25840_write4(client, 0x114, 0x017dbf48);
581 cx25840_write4(client, 0x110, 0x000a030e);
561 break; 582 break;
562 case V4L2_IDENT_CX23887_AV: 583 case V4L2_IDENT_CX23887_AV:
563 /* 584 /*
@@ -617,7 +638,10 @@ static void cx23885_initialize(struct i2c_client *client)
617 finish_wait(&state->fw_wait, &wait); 638 finish_wait(&state->fw_wait, &wait);
618 destroy_workqueue(q); 639 destroy_workqueue(q);
619 640
620 cx25840_std_setup(client); 641 /* Call the cx23885 specific std setup func, we no longer rely on
642 * the generic cx24840 func.
643 */
644 cx23885_std_setup(client);
621 645
622 /* (re)set input */ 646 /* (re)set input */
623 set_input(client, state->vid_input, state->aud_input); 647 set_input(client, state->vid_input, state->aud_input);
@@ -631,6 +655,37 @@ static void cx23885_initialize(struct i2c_client *client)
631 /* Disable and clear audio interrupts - we don't use them */ 655 /* Disable and clear audio interrupts - we don't use them */
632 cx25840_write(client, CX25840_AUD_INT_CTRL_REG, 0xff); 656 cx25840_write(client, CX25840_AUD_INT_CTRL_REG, 0xff);
633 cx25840_write(client, CX25840_AUD_INT_STAT_REG, 0xff); 657 cx25840_write(client, CX25840_AUD_INT_STAT_REG, 0xff);
658
659 /* CC raw enable */
660 /* - VIP 1.1 control codes - 10bit, blue field enable.
661 * - enable raw data during vertical blanking.
662 * - enable ancillary Data insertion for 656 or VIP.
663 */
664 cx25840_write4(client, 0x404, 0x0010253e);
665
666 /* CC on - Undocumented Register */
667 cx25840_write(client, 0x42f, 0x66);
668
669 /* HVR-1250 / HVR1850 DIF related */
670 /* Power everything up */
671 cx25840_write4(client, 0x130, 0x0);
672
673 /* Undocumented */
674 cx25840_write4(client, 0x478, 0x6628021F);
675
676 /* AFE_CLK_OUT_CTRL - Select the clock output source as output */
677 cx25840_write4(client, 0x144, 0x5);
678
679 /* I2C_OUT_CTL - I2S output configuration as
680 * Master, Sony, Left justified, left sample on WS=1
681 */
682 cx25840_write4(client, 0x918, 0x1a0);
683
684 /* AFE_DIAG_CTRL1 */
685 cx25840_write4(client, 0x134, 0x000a1800);
686
687 /* AFE_DIAG_CTRL3 - Inverted Polarity for Audio and Video */
688 cx25840_write4(client, 0x13c, 0x00310000);
634} 689}
635 690
636/* ----------------------------------------------------------------------- */ 691/* ----------------------------------------------------------------------- */
@@ -945,9 +1000,14 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
945 vid_input <= CX25840_COMPOSITE8); 1000 vid_input <= CX25840_COMPOSITE8);
946 u8 is_component = (vid_input & CX25840_COMPONENT_ON) == 1001 u8 is_component = (vid_input & CX25840_COMPONENT_ON) ==
947 CX25840_COMPONENT_ON; 1002 CX25840_COMPONENT_ON;
1003 u8 is_dif = (vid_input & CX25840_DIF_ON) ==
1004 CX25840_DIF_ON;
1005 u8 is_svideo = (vid_input & CX25840_SVIDEO_ON) ==
1006 CX25840_SVIDEO_ON;
948 int luma = vid_input & 0xf0; 1007 int luma = vid_input & 0xf0;
949 int chroma = vid_input & 0xf00; 1008 int chroma = vid_input & 0xf00;
950 u8 reg; 1009 u8 reg;
1010 u32 val;
951 1011
952 v4l_dbg(1, cx25840_debug, client, 1012 v4l_dbg(1, cx25840_debug, client,
953 "decoder set video input %d, audio input %d\n", 1013 "decoder set video input %d, audio input %d\n",
@@ -1012,6 +1072,66 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
1012 else 1072 else
1013 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02); 1073 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
1014 1074
1075 if (is_cx2388x(state)) {
1076
1077 /* Enable or disable the DIF for tuner use */
1078 if (is_dif) {
1079 cx25840_and_or(client, 0x102, ~0x80, 0x80);
1080
1081 /* Set of defaults for NTSC and PAL */
1082 cx25840_write4(client, 0x31c, 0xc2262600);
1083 cx25840_write4(client, 0x320, 0xc2262600);
1084
1085 /* 18271 IF - Nobody else yet uses a different
1086 * tuner with the DIF, so these are reasonable
1087 * assumptions (HVR1250 and HVR1850 specific).
1088 */
1089 cx25840_write4(client, 0x318, 0xda262600);
1090 cx25840_write4(client, 0x33c, 0x2a24c800);
1091 cx25840_write4(client, 0x104, 0x0704dd00);
1092 } else {
1093 cx25840_write4(client, 0x300, 0x015c28f5);
1094
1095 cx25840_and_or(client, 0x102, ~0x80, 0);
1096 cx25840_write4(client, 0x340, 0xdf7df83);
1097 cx25840_write4(client, 0x104, 0x0704dd80);
1098 cx25840_write4(client, 0x314, 0x22400600);
1099 cx25840_write4(client, 0x318, 0x40002600);
1100 cx25840_write4(client, 0x324, 0x40002600);
1101 cx25840_write4(client, 0x32c, 0x0250e620);
1102 cx25840_write4(client, 0x39c, 0x01FF0B00);
1103
1104 cx25840_write4(client, 0x410, 0xffff0dbf);
1105 cx25840_write4(client, 0x414, 0x00137d03);
1106 cx25840_write4(client, 0x418, 0x01008080);
1107 cx25840_write4(client, 0x41c, 0x00000000);
1108 cx25840_write4(client, 0x420, 0x001c3e0f);
1109 cx25840_write4(client, 0x42c, 0x42600000);
1110 cx25840_write4(client, 0x430, 0x0000039b);
1111 cx25840_write4(client, 0x438, 0x00000000);
1112
1113 cx25840_write4(client, 0x440, 0xF8E3E824);
1114 cx25840_write4(client, 0x444, 0x401040dc);
1115 cx25840_write4(client, 0x448, 0xcd3f02a0);
1116 cx25840_write4(client, 0x44c, 0x161f1000);
1117 cx25840_write4(client, 0x450, 0x00000802);
1118
1119 cx25840_write4(client, 0x91c, 0x01000000);
1120 cx25840_write4(client, 0x8e0, 0x03063870);
1121 cx25840_write4(client, 0x8d4, 0x7FFF0024);
1122 cx25840_write4(client, 0x8d0, 0x00063073);
1123
1124 cx25840_write4(client, 0x8c8, 0x00010000);
1125 cx25840_write4(client, 0x8cc, 0x00080023);
1126
1127 /* DIF BYPASS */
1128 cx25840_write4(client, 0x33c, 0x2a04c800);
1129 }
1130
1131 /* Reset the DIF */
1132 cx25840_write4(client, 0x398, 0);
1133 }
1134
1015 if (!is_cx2388x(state) && !is_cx231xx(state)) { 1135 if (!is_cx2388x(state) && !is_cx231xx(state)) {
1016 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */ 1136 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
1017 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0); 1137 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
@@ -1036,6 +1156,33 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
1036 cx25840_and_or(client, 0x102, ~0x2, 0); 1156 cx25840_and_or(client, 0x102, ~0x2, 0);
1037 } 1157 }
1038 } 1158 }
1159
1160 /* cx23885 / SVIDEO */
1161 if (is_cx2388x(state) && is_svideo) {
1162#define AFE_CTRL (0x104)
1163#define MODE_CTRL (0x400)
1164 cx25840_and_or(client, 0x102, ~0x2, 0x2);
1165
1166 val = cx25840_read4(client, MODE_CTRL);
1167 val &= 0xFFFFF9FF;
1168
1169 /* YC */
1170 val |= 0x00000200;
1171 val &= ~0x2000;
1172 cx25840_write4(client, MODE_CTRL, val);
1173
1174 val = cx25840_read4(client, AFE_CTRL);
1175
1176 /* Chroma in select */
1177 val |= 0x00001000;
1178 val &= 0xfffffe7f;
1179 /* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8).
1180 * This sets them to use video rather than audio.
1181 * Only one of the two will be in use.
1182 */
1183 cx25840_write4(client, AFE_CTRL, val);
1184 } else
1185 cx25840_and_or(client, 0x102, ~0x2, 0);
1039 } 1186 }
1040 1187
1041 state->vid_input = vid_input; 1188 state->vid_input = vid_input;
@@ -1086,6 +1233,23 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
1086 cx25840_write4(client, 0x8d0, 0x1f063870); 1233 cx25840_write4(client, 0x8d0, 0x1f063870);
1087 } 1234 }
1088 1235
1236 if (is_cx2388x(state)) {
1237 /* HVR1850 */
1238 /* AUD_IO_CTRL - I2S Input, Parallel1*/
1239 /* - Channel 1 src - Parallel1 (Merlin out) */
1240 /* - Channel 2 src - Parallel2 (Merlin out) */
1241 /* - Channel 3 src - Parallel3 (Merlin AC97 out) */
1242 /* - I2S source and dir - Merlin, output */
1243 cx25840_write4(client, 0x124, 0x100);
1244
1245 if (!is_dif) {
1246 /* Stop microcontroller if we don't need it
1247 * to avoid audio popping on svideo/composite use.
1248 */
1249 cx25840_and_or(client, 0x803, ~0x10, 0x00);
1250 }
1251 }
1252
1089 return 0; 1253 return 0;
1090} 1254}
1091 1255
@@ -1134,7 +1298,10 @@ static int set_v4lstd(struct i2c_client *client)
1134 } 1298 }
1135 cx25840_and_or(client, 0x400, ~0xf, fmt); 1299 cx25840_and_or(client, 0x400, ~0xf, fmt);
1136 cx25840_and_or(client, 0x403, ~0x3, pal_m); 1300 cx25840_and_or(client, 0x403, ~0x3, pal_m);
1137 cx25840_std_setup(client); 1301 if (is_cx2388x(state))
1302 cx23885_std_setup(client);
1303 else
1304 cx25840_std_setup(client);
1138 if (!is_cx2583x(state)) 1305 if (!is_cx2583x(state))
1139 input_change(client); 1306 input_change(client);
1140 return 0; 1307 return 0;
@@ -1539,6 +1706,56 @@ static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1539 return 0; 1706 return 0;
1540} 1707}
1541 1708
1709/* Query the current detected video format */
1710static int cx25840_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
1711{
1712 struct i2c_client *client = v4l2_get_subdevdata(sd);
1713
1714 v4l2_std_id stds[] = {
1715 /* 0000 */ V4L2_STD_UNKNOWN,
1716
1717 /* 0001 */ V4L2_STD_NTSC_M,
1718 /* 0010 */ V4L2_STD_NTSC_M_JP,
1719 /* 0011 */ V4L2_STD_NTSC_443,
1720 /* 0100 */ V4L2_STD_PAL,
1721 /* 0101 */ V4L2_STD_PAL_M,
1722 /* 0110 */ V4L2_STD_PAL_N,
1723 /* 0111 */ V4L2_STD_PAL_Nc,
1724 /* 1000 */ V4L2_STD_PAL_60,
1725
1726 /* 1001 */ V4L2_STD_UNKNOWN,
1727 /* 1010 */ V4L2_STD_UNKNOWN,
1728 /* 1001 */ V4L2_STD_UNKNOWN,
1729 /* 1010 */ V4L2_STD_UNKNOWN,
1730 /* 1011 */ V4L2_STD_UNKNOWN,
1731 /* 1110 */ V4L2_STD_UNKNOWN,
1732 /* 1111 */ V4L2_STD_UNKNOWN
1733 };
1734
1735 u32 fmt = (cx25840_read4(client, 0x40c) >> 8) & 0xf;
1736 *std = stds[ fmt ];
1737
1738 v4l_dbg(1, cx25840_debug, client, "g_std fmt = %x, v4l2_std_id = 0x%x\n",
1739 fmt, (unsigned int)stds[ fmt ]);
1740
1741 return 0;
1742}
1743
1744static int cx25840_g_input_status(struct v4l2_subdev *sd, u32 *status)
1745{
1746 struct i2c_client *client = v4l2_get_subdevdata(sd);
1747
1748 /* A limited function that checks for signal status and returns
1749 * the state.
1750 */
1751
1752 /* Check for status of Horizontal lock (SRC lock isn't reliable) */
1753 if ((cx25840_read4(client, 0x40c) & 0x00010000) == 0)
1754 *status |= V4L2_IN_ST_NO_SIGNAL;
1755
1756 return 0;
1757}
1758
1542static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 1759static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1543{ 1760{
1544 struct cx25840_state *state = to_state(sd); 1761 struct cx25840_state *state = to_state(sd);
@@ -1565,6 +1782,9 @@ static int cx25840_s_video_routing(struct v4l2_subdev *sd,
1565 struct cx25840_state *state = to_state(sd); 1782 struct cx25840_state *state = to_state(sd);
1566 struct i2c_client *client = v4l2_get_subdevdata(sd); 1783 struct i2c_client *client = v4l2_get_subdevdata(sd);
1567 1784
1785 if (is_cx2388x(state))
1786 cx23885_std_setup(client);
1787
1568 return set_input(client, input, state->aud_input); 1788 return set_input(client, input, state->aud_input);
1569} 1789}
1570 1790
@@ -1574,6 +1794,8 @@ static int cx25840_s_audio_routing(struct v4l2_subdev *sd,
1574 struct cx25840_state *state = to_state(sd); 1794 struct cx25840_state *state = to_state(sd);
1575 struct i2c_client *client = v4l2_get_subdevdata(sd); 1795 struct i2c_client *client = v4l2_get_subdevdata(sd);
1576 1796
1797 if (is_cx2388x(state))
1798 cx23885_std_setup(client);
1577 return set_input(client, state->vid_input, input); 1799 return set_input(client, state->vid_input, input);
1578} 1800}
1579 1801
@@ -1786,6 +2008,3007 @@ static int cx25840_irq_handler(struct v4l2_subdev *sd, u32 status,
1786 2008
1787/* ----------------------------------------------------------------------- */ 2009/* ----------------------------------------------------------------------- */
1788 2010
2011#define DIF_PLL_FREQ_WORD (0x300)
2012#define DIF_BPF_COEFF01 (0x348)
2013#define DIF_BPF_COEFF23 (0x34c)
2014#define DIF_BPF_COEFF45 (0x350)
2015#define DIF_BPF_COEFF67 (0x354)
2016#define DIF_BPF_COEFF89 (0x358)
2017#define DIF_BPF_COEFF1011 (0x35c)
2018#define DIF_BPF_COEFF1213 (0x360)
2019#define DIF_BPF_COEFF1415 (0x364)
2020#define DIF_BPF_COEFF1617 (0x368)
2021#define DIF_BPF_COEFF1819 (0x36c)
2022#define DIF_BPF_COEFF2021 (0x370)
2023#define DIF_BPF_COEFF2223 (0x374)
2024#define DIF_BPF_COEFF2425 (0x378)
2025#define DIF_BPF_COEFF2627 (0x37c)
2026#define DIF_BPF_COEFF2829 (0x380)
2027#define DIF_BPF_COEFF3031 (0x384)
2028#define DIF_BPF_COEFF3233 (0x388)
2029#define DIF_BPF_COEFF3435 (0x38c)
2030#define DIF_BPF_COEFF36 (0x390)
2031
2032void cx23885_dif_setup(struct i2c_client *client, u32 ifHz)
2033{
2034 u64 pll_freq;
2035 u32 pll_freq_word;
2036
2037 v4l_dbg(1, cx25840_debug, client, "%s(%d)\n", __func__, ifHz);
2038
2039 /* Assuming TV */
2040 /* Calculate the PLL frequency word based on the adjusted ifHz */
2041 pll_freq = div_u64((u64)ifHz * 268435456, 50000000);
2042 pll_freq_word = (u32)pll_freq;
2043
2044 cx25840_write4(client, DIF_PLL_FREQ_WORD, pll_freq_word);
2045
2046 /* Round down to the nearest 100KHz */
2047 ifHz = (ifHz / 100000) * 100000;
2048
2049 if (ifHz < 3000000)
2050 ifHz = 3000000;
2051
2052 if (ifHz > 16000000)
2053 ifHz = 16000000;
2054
2055 v4l_dbg(1, cx25840_debug, client, "%s(%d) again\n", __func__, ifHz);
2056
2057 switch (ifHz) {
2058 case 3000000:
2059 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
2060 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080012);
2061 cx25840_write4(client, DIF_BPF_COEFF45, 0x001e0024);
2062 cx25840_write4(client, DIF_BPF_COEFF67, 0x001bfff8);
2063 cx25840_write4(client, DIF_BPF_COEFF89, 0xffb4ff50);
2064 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfed8fe68);
2065 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe24fe34);
2066 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfebaffc7);
2067 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014d031f);
2068 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04f0065d);
2069 cx25840_write4(client, DIF_BPF_COEFF2021, 0x07010688);
2070 cx25840_write4(client, DIF_BPF_COEFF2223, 0x04c901d6);
2071 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfe00f9d3);
2072 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf600f342);
2073 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf235f337);
2074 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf64efb22);
2075 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0105070f);
2076 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0c460fce);
2077 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2078 break;
2079
2080 case 3100000:
2081 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000001);
2082 cx25840_write4(client, DIF_BPF_COEFF23, 0x00070012);
2083 cx25840_write4(client, DIF_BPF_COEFF45, 0x00220032);
2084 cx25840_write4(client, DIF_BPF_COEFF67, 0x00370026);
2085 cx25840_write4(client, DIF_BPF_COEFF89, 0xfff0ff91);
2086 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff0efe7c);
2087 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe01fdcc);
2088 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe0afedb);
2089 cx25840_write4(client, DIF_BPF_COEFF1617, 0x00440224);
2090 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0434060c);
2091 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0738074e);
2092 cx25840_write4(client, DIF_BPF_COEFF2223, 0x06090361);
2093 cx25840_write4(client, DIF_BPF_COEFF2425, 0xff99fb39);
2094 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf6fef3b6);
2095 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf21af2a5);
2096 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf573fa33);
2097 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0034067d);
2098 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0bfb0fb9);
2099 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2100 break;
2101
2102 case 3200000:
2103 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000000);
2104 cx25840_write4(client, DIF_BPF_COEFF23, 0x0004000e);
2105 cx25840_write4(client, DIF_BPF_COEFF45, 0x00200038);
2106 cx25840_write4(client, DIF_BPF_COEFF67, 0x004c004f);
2107 cx25840_write4(client, DIF_BPF_COEFF89, 0x002fffdf);
2108 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff5cfeb6);
2109 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe0dfd92);
2110 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd7ffe03);
2111 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36010a);
2112 cx25840_write4(client, DIF_BPF_COEFF1819, 0x03410575);
2113 cx25840_write4(client, DIF_BPF_COEFF2021, 0x072607d2);
2114 cx25840_write4(client, DIF_BPF_COEFF2223, 0x071804d5);
2115 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0134fcb7);
2116 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf81ff451);
2117 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf223f22e);
2118 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf4a7f94b);
2119 cx25840_write4(client, DIF_BPF_COEFF3233, 0xff6405e8);
2120 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0bae0fa4);
2121 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2122 break;
2123
2124 case 3300000:
2125 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000ffff);
2126 cx25840_write4(client, DIF_BPF_COEFF23, 0x00000008);
2127 cx25840_write4(client, DIF_BPF_COEFF45, 0x001a0036);
2128 cx25840_write4(client, DIF_BPF_COEFF67, 0x0056006d);
2129 cx25840_write4(client, DIF_BPF_COEFF89, 0x00670030);
2130 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffbdff10);
2131 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe46fd8d);
2132 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd25fd4f);
2133 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35ffe0);
2134 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0224049f);
2135 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06c9080e);
2136 cx25840_write4(client, DIF_BPF_COEFF2223, 0x07ef0627);
2137 cx25840_write4(client, DIF_BPF_COEFF2425, 0x02c9fe45);
2138 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf961f513);
2139 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf250f1d2);
2140 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf3ecf869);
2141 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfe930552);
2142 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0b5f0f8f);
2143 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2144 break;
2145
2146 case 3400000:
2147 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffe);
2148 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffd0001);
2149 cx25840_write4(client, DIF_BPF_COEFF45, 0x000f002c);
2150 cx25840_write4(client, DIF_BPF_COEFF67, 0x0054007d);
2151 cx25840_write4(client, DIF_BPF_COEFF89, 0x0093007c);
2152 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0024ff82);
2153 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfea6fdbb);
2154 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd03fcca);
2155 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51feb9);
2156 cx25840_write4(client, DIF_BPF_COEFF1819, 0x00eb0392);
2157 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06270802);
2158 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08880750);
2159 cx25840_write4(client, DIF_BPF_COEFF2425, 0x044dffdb);
2160 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfabdf5f8);
2161 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2a0f193);
2162 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf342f78f);
2163 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfdc404b9);
2164 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0b0e0f78);
2165 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2166 break;
2167
2168 case 3500000:
2169 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffd);
2170 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffafff9);
2171 cx25840_write4(client, DIF_BPF_COEFF45, 0x0002001b);
2172 cx25840_write4(client, DIF_BPF_COEFF67, 0x0046007d);
2173 cx25840_write4(client, DIF_BPF_COEFF89, 0x00ad00ba);
2174 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00870000);
2175 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff26fe1a);
2176 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd1bfc7e);
2177 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99fda4);
2178 cx25840_write4(client, DIF_BPF_COEFF1819, 0xffa5025c);
2179 cx25840_write4(client, DIF_BPF_COEFF2021, 0x054507ad);
2180 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08dd0847);
2181 cx25840_write4(client, DIF_BPF_COEFF2425, 0x05b80172);
2182 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfc2ef6ff);
2183 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf313f170);
2184 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf2abf6bd);
2185 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfcf6041f);
2186 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0abc0f61);
2187 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2188 break;
2189
2190 case 3600000:
2191 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffd);
2192 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff3);
2193 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff50006);
2194 cx25840_write4(client, DIF_BPF_COEFF67, 0x002f006c);
2195 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b200e3);
2196 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00dc007e);
2197 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffb9fea0);
2198 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd6bfc71);
2199 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17fcb1);
2200 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfe65010b);
2201 cx25840_write4(client, DIF_BPF_COEFF2021, 0x042d0713);
2202 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08ec0906);
2203 cx25840_write4(client, DIF_BPF_COEFF2425, 0x07020302);
2204 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfdaff823);
2205 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf3a7f16a);
2206 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf228f5f5);
2207 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfc2a0384);
2208 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0a670f4a);
2209 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2210 break;
2211
2212 case 3700000:
2213 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
2214 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff7ffef);
2215 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe9fff1);
2216 cx25840_write4(client, DIF_BPF_COEFF67, 0x0010004d);
2217 cx25840_write4(client, DIF_BPF_COEFF89, 0x00a100f2);
2218 cx25840_write4(client, DIF_BPF_COEFF1011, 0x011a00f0);
2219 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0053ff44);
2220 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdedfca2);
2221 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3fbef);
2222 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfd39ffae);
2223 cx25840_write4(client, DIF_BPF_COEFF2021, 0x02ea0638);
2224 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08b50987);
2225 cx25840_write4(client, DIF_BPF_COEFF2425, 0x08230483);
2226 cx25840_write4(client, DIF_BPF_COEFF2627, 0xff39f960);
2227 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf45bf180);
2228 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf1b8f537);
2229 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfb6102e7);
2230 cx25840_write4(client, DIF_BPF_COEFF3435, 0x0a110f32);
2231 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2232 break;
2233
2234 case 3800000:
2235 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
2236 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9ffee);
2237 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe1ffdd);
2238 cx25840_write4(client, DIF_BPF_COEFF67, 0xfff00024);
2239 cx25840_write4(client, DIF_BPF_COEFF89, 0x007c00e5);
2240 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013a014a);
2241 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00e6fff8);
2242 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe98fd0f);
2243 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3fb67);
2244 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfc32fe54);
2245 cx25840_write4(client, DIF_BPF_COEFF2021, 0x01880525);
2246 cx25840_write4(client, DIF_BPF_COEFF2223, 0x083909c7);
2247 cx25840_write4(client, DIF_BPF_COEFF2425, 0x091505ee);
2248 cx25840_write4(client, DIF_BPF_COEFF2627, 0x00c7fab3);
2249 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf52df1b4);
2250 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf15df484);
2251 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfa9b0249);
2252 cx25840_write4(client, DIF_BPF_COEFF3435, 0x09ba0f19);
2253 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2254 break;
2255
2256 case 3900000:
2257 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000000);
2258 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffbfff0);
2259 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdeffcf);
2260 cx25840_write4(client, DIF_BPF_COEFF67, 0xffd1fff6);
2261 cx25840_write4(client, DIF_BPF_COEFF89, 0x004800be);
2262 cx25840_write4(client, DIF_BPF_COEFF1011, 0x01390184);
2263 cx25840_write4(client, DIF_BPF_COEFF1213, 0x016300ac);
2264 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff5efdb1);
2265 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17fb23);
2266 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb5cfd0d);
2267 cx25840_write4(client, DIF_BPF_COEFF2021, 0x001703e4);
2268 cx25840_write4(client, DIF_BPF_COEFF2223, 0x077b09c4);
2269 cx25840_write4(client, DIF_BPF_COEFF2425, 0x09d2073c);
2270 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0251fc18);
2271 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf61cf203);
2272 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf118f3dc);
2273 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf9d801aa);
2274 cx25840_write4(client, DIF_BPF_COEFF3435, 0x09600eff);
2275 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2276 break;
2277
2278 case 4000000:
2279 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000001);
2280 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffefff4);
2281 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe1ffc8);
2282 cx25840_write4(client, DIF_BPF_COEFF67, 0xffbaffca);
2283 cx25840_write4(client, DIF_BPF_COEFF89, 0x000b0082);
2284 cx25840_write4(client, DIF_BPF_COEFF1011, 0x01170198);
2285 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01c10152);
2286 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0030fe7b);
2287 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99fb24);
2288 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfac3fbe9);
2289 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfea5027f);
2290 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0683097f);
2291 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a560867);
2292 cx25840_write4(client, DIF_BPF_COEFF2627, 0x03d2fd89);
2293 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf723f26f);
2294 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0e8f341);
2295 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf919010a);
2296 cx25840_write4(client, DIF_BPF_COEFF3435, 0x09060ee5);
2297 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2298 break;
2299
2300 case 4100000:
2301 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010002);
2302 cx25840_write4(client, DIF_BPF_COEFF23, 0x0002fffb);
2303 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe8ffca);
2304 cx25840_write4(client, DIF_BPF_COEFF67, 0xffacffa4);
2305 cx25840_write4(client, DIF_BPF_COEFF89, 0xffcd0036);
2306 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00d70184);
2307 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01f601dc);
2308 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00ffff60);
2309 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51fb6d);
2310 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa6efaf5);
2311 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfd410103);
2312 cx25840_write4(client, DIF_BPF_COEFF2223, 0x055708f9);
2313 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a9e0969);
2314 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0543ff02);
2315 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf842f2f5);
2316 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0cef2b2);
2317 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf85e006b);
2318 cx25840_write4(client, DIF_BPF_COEFF3435, 0x08aa0ecb);
2319 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2320 break;
2321
2322 case 4200000:
2323 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010003);
2324 cx25840_write4(client, DIF_BPF_COEFF23, 0x00050003);
2325 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff3ffd3);
2326 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaaff8b);
2327 cx25840_write4(client, DIF_BPF_COEFF89, 0xff95ffe5);
2328 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0080014a);
2329 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01fe023f);
2330 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01ba0050);
2331 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35fbf8);
2332 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa62fa3b);
2333 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfbf9ff7e);
2334 cx25840_write4(client, DIF_BPF_COEFF2223, 0x04010836);
2335 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0aa90a3d);
2336 cx25840_write4(client, DIF_BPF_COEFF2627, 0x069f007f);
2337 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf975f395);
2338 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0cbf231);
2339 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf7a9ffcb);
2340 cx25840_write4(client, DIF_BPF_COEFF3435, 0x084c0eaf);
2341 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2342 break;
2343
2344 case 4300000:
2345 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010003);
2346 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008000a);
2347 cx25840_write4(client, DIF_BPF_COEFF45, 0x0000ffe4);
2348 cx25840_write4(client, DIF_BPF_COEFF67, 0xffb4ff81);
2349 cx25840_write4(client, DIF_BPF_COEFF89, 0xff6aff96);
2350 cx25840_write4(client, DIF_BPF_COEFF1011, 0x001c00f0);
2351 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01d70271);
2352 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0254013b);
2353 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36fcbd);
2354 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa9ff9c5);
2355 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfadbfdfe);
2356 cx25840_write4(client, DIF_BPF_COEFF2223, 0x028c073b);
2357 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a750adf);
2358 cx25840_write4(client, DIF_BPF_COEFF2627, 0x07e101fa);
2359 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfab8f44e);
2360 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0ddf1be);
2361 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf6f9ff2b);
2362 cx25840_write4(client, DIF_BPF_COEFF3435, 0x07ed0e94);
2363 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2364 break;
2365
2366 case 4400000:
2367 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
2368 cx25840_write4(client, DIF_BPF_COEFF23, 0x0009000f);
2369 cx25840_write4(client, DIF_BPF_COEFF45, 0x000efff8);
2370 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc9ff87);
2371 cx25840_write4(client, DIF_BPF_COEFF89, 0xff52ff54);
2372 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffb5007e);
2373 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01860270);
2374 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02c00210);
2375 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0044fdb2);
2376 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb22f997);
2377 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf9f2fc90);
2378 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0102060f);
2379 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a050b4c);
2380 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0902036e);
2381 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfc0af51e);
2382 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf106f15a);
2383 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf64efe8b);
2384 cx25840_write4(client, DIF_BPF_COEFF3435, 0x078d0e77);
2385 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2386 break;
2387
2388 case 4500000:
2389 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
2390 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080012);
2391 cx25840_write4(client, DIF_BPF_COEFF45, 0x0019000e);
2392 cx25840_write4(client, DIF_BPF_COEFF67, 0xffe5ff9e);
2393 cx25840_write4(client, DIF_BPF_COEFF89, 0xff4fff25);
2394 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff560000);
2395 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0112023b);
2396 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02f702c0);
2397 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014dfec8);
2398 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfbe5f9b3);
2399 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf947fb41);
2400 cx25840_write4(client, DIF_BPF_COEFF2223, 0xff7004b9);
2401 cx25840_write4(client, DIF_BPF_COEFF2425, 0x095a0b81);
2402 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0a0004d8);
2403 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfd65f603);
2404 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf144f104);
2405 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf5aafdec);
2406 cx25840_write4(client, DIF_BPF_COEFF3435, 0x072b0e5a);
2407 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2408 break;
2409
2410 case 4600000:
2411 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000001);
2412 cx25840_write4(client, DIF_BPF_COEFF23, 0x00060012);
2413 cx25840_write4(client, DIF_BPF_COEFF45, 0x00200022);
2414 cx25840_write4(client, DIF_BPF_COEFF67, 0x0005ffc1);
2415 cx25840_write4(client, DIF_BPF_COEFF89, 0xff61ff10);
2416 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff09ff82);
2417 cx25840_write4(client, DIF_BPF_COEFF1213, 0x008601d7);
2418 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02f50340);
2419 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0241fff0);
2420 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfcddfa19);
2421 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8e2fa1e);
2422 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfde30343);
2423 cx25840_write4(client, DIF_BPF_COEFF2425, 0x08790b7f);
2424 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0ad50631);
2425 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfec7f6fc);
2426 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf198f0bd);
2427 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf50dfd4e);
2428 cx25840_write4(client, DIF_BPF_COEFF3435, 0x06c90e3d);
2429 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2430 break;
2431
2432 case 4700000:
2433 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000ffff);
2434 cx25840_write4(client, DIF_BPF_COEFF23, 0x0003000f);
2435 cx25840_write4(client, DIF_BPF_COEFF45, 0x00220030);
2436 cx25840_write4(client, DIF_BPF_COEFF67, 0x0025ffed);
2437 cx25840_write4(client, DIF_BPF_COEFF89, 0xff87ff15);
2438 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfed6ff10);
2439 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffed014c);
2440 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02b90386);
2441 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03110119);
2442 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfdfefac4);
2443 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8c6f92f);
2444 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfc6701b7);
2445 cx25840_write4(client, DIF_BPF_COEFF2425, 0x07670b44);
2446 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0b7e0776);
2447 cx25840_write4(client, DIF_BPF_COEFF2829, 0x002df807);
2448 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf200f086);
2449 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf477fcb1);
2450 cx25840_write4(client, DIF_BPF_COEFF3435, 0x06650e1e);
2451 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2452 break;
2453
2454 case 4800000:
2455 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffe);
2456 cx25840_write4(client, DIF_BPF_COEFF23, 0xffff0009);
2457 cx25840_write4(client, DIF_BPF_COEFF45, 0x001e0038);
2458 cx25840_write4(client, DIF_BPF_COEFF67, 0x003f001b);
2459 cx25840_write4(client, DIF_BPF_COEFF89, 0xffbcff36);
2460 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec2feb6);
2461 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff5600a5);
2462 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0248038d);
2463 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b00232);
2464 cx25840_write4(client, DIF_BPF_COEFF1819, 0xff39fbab);
2465 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8f4f87f);
2466 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfb060020);
2467 cx25840_write4(client, DIF_BPF_COEFF2425, 0x062a0ad2);
2468 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0bf908a3);
2469 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0192f922);
2470 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf27df05e);
2471 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf3e8fc14);
2472 cx25840_write4(client, DIF_BPF_COEFF3435, 0x06000e00);
2473 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2474 break;
2475
2476 case 4900000:
2477 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffd);
2478 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffc0002);
2479 cx25840_write4(client, DIF_BPF_COEFF45, 0x00160037);
2480 cx25840_write4(client, DIF_BPF_COEFF67, 0x00510046);
2481 cx25840_write4(client, DIF_BPF_COEFF89, 0xfff9ff6d);
2482 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfed0fe7c);
2483 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfecefff0);
2484 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01aa0356);
2485 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0413032b);
2486 cx25840_write4(client, DIF_BPF_COEFF1819, 0x007ffcc5);
2487 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf96cf812);
2488 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf9cefe87);
2489 cx25840_write4(client, DIF_BPF_COEFF2425, 0x04c90a2c);
2490 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c4309b4);
2491 cx25840_write4(client, DIF_BPF_COEFF2829, 0x02f3fa4a);
2492 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf30ef046);
2493 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf361fb7a);
2494 cx25840_write4(client, DIF_BPF_COEFF3435, 0x059b0de0);
2495 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2496 break;
2497
2498 case 5000000:
2499 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffd);
2500 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9fffa);
2501 cx25840_write4(client, DIF_BPF_COEFF45, 0x000a002d);
2502 cx25840_write4(client, DIF_BPF_COEFF67, 0x00570067);
2503 cx25840_write4(client, DIF_BPF_COEFF89, 0x0037ffb5);
2504 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfefffe68);
2505 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe62ff3d);
2506 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00ec02e3);
2507 cx25840_write4(client, DIF_BPF_COEFF1617, 0x043503f6);
2508 cx25840_write4(client, DIF_BPF_COEFF1819, 0x01befe05);
2509 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfa27f7ee);
2510 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf8c6fcf8);
2511 cx25840_write4(client, DIF_BPF_COEFF2425, 0x034c0954);
2512 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c5c0aa4);
2513 cx25840_write4(client, DIF_BPF_COEFF2829, 0x044cfb7e);
2514 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf3b1f03f);
2515 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf2e2fae1);
2516 cx25840_write4(client, DIF_BPF_COEFF3435, 0x05340dc0);
2517 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2518 break;
2519
2520 case 5100000:
2521 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
2522 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff4);
2523 cx25840_write4(client, DIF_BPF_COEFF45, 0xfffd001e);
2524 cx25840_write4(client, DIF_BPF_COEFF67, 0x0051007b);
2525 cx25840_write4(client, DIF_BPF_COEFF89, 0x006e0006);
2526 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff48fe7c);
2527 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe1bfe9a);
2528 cx25840_write4(client, DIF_BPF_COEFF1415, 0x001d023e);
2529 cx25840_write4(client, DIF_BPF_COEFF1617, 0x04130488);
2530 cx25840_write4(client, DIF_BPF_COEFF1819, 0x02e6ff5b);
2531 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfb1ef812);
2532 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7f7fb7f);
2533 cx25840_write4(client, DIF_BPF_COEFF2425, 0x01bc084e);
2534 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c430b72);
2535 cx25840_write4(client, DIF_BPF_COEFF2829, 0x059afcba);
2536 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf467f046);
2537 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf26cfa4a);
2538 cx25840_write4(client, DIF_BPF_COEFF3435, 0x04cd0da0);
2539 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2540 break;
2541
2542 case 5200000:
2543 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
2544 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8ffef);
2545 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff00009);
2546 cx25840_write4(client, DIF_BPF_COEFF67, 0x003f007f);
2547 cx25840_write4(client, DIF_BPF_COEFF89, 0x00980056);
2548 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffa5feb6);
2549 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe00fe15);
2550 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff4b0170);
2551 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b004d7);
2552 cx25840_write4(client, DIF_BPF_COEFF1819, 0x03e800b9);
2553 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfc48f87f);
2554 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf768fa23);
2555 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0022071f);
2556 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0bf90c1b);
2557 cx25840_write4(client, DIF_BPF_COEFF2829, 0x06dafdfd);
2558 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf52df05e);
2559 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf1fef9b5);
2560 cx25840_write4(client, DIF_BPF_COEFF3435, 0x04640d7f);
2561 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2562 break;
2563
2564 case 5300000:
2565 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000ffff);
2566 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9ffee);
2567 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe6fff3);
2568 cx25840_write4(client, DIF_BPF_COEFF67, 0x00250072);
2569 cx25840_write4(client, DIF_BPF_COEFF89, 0x00af009c);
2570 cx25840_write4(client, DIF_BPF_COEFF1011, 0x000cff10);
2571 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe13fdb8);
2572 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe870089);
2573 cx25840_write4(client, DIF_BPF_COEFF1617, 0x031104e1);
2574 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04b8020f);
2575 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfd98f92f);
2576 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf71df8f0);
2577 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfe8805ce);
2578 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0b7e0c9c);
2579 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0808ff44);
2580 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf603f086);
2581 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf19af922);
2582 cx25840_write4(client, DIF_BPF_COEFF3435, 0x03fb0d5e);
2583 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2584 break;
2585
2586 case 5400000:
2587 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000001);
2588 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffcffef);
2589 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe0ffe0);
2590 cx25840_write4(client, DIF_BPF_COEFF67, 0x00050056);
2591 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b000d1);
2592 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0071ff82);
2593 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe53fd8c);
2594 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfddfff99);
2595 cx25840_write4(client, DIF_BPF_COEFF1617, 0x024104a3);
2596 cx25840_write4(client, DIF_BPF_COEFF1819, 0x054a034d);
2597 cx25840_write4(client, DIF_BPF_COEFF2021, 0xff01fa1e);
2598 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf717f7ed);
2599 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfcf50461);
2600 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0ad50cf4);
2601 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0921008d);
2602 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf6e7f0bd);
2603 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf13ff891);
2604 cx25840_write4(client, DIF_BPF_COEFF3435, 0x03920d3b);
2605 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2606 break;
2607
2608 case 5500000:
2609 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010002);
2610 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffffff3);
2611 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdeffd1);
2612 cx25840_write4(client, DIF_BPF_COEFF67, 0xffe5002f);
2613 cx25840_write4(client, DIF_BPF_COEFF89, 0x009c00ed);
2614 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00cb0000);
2615 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfebafd94);
2616 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd61feb0);
2617 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014d0422);
2618 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05970464);
2619 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0074fb41);
2620 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf759f721);
2621 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfb7502de);
2622 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0a000d21);
2623 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0a2201d4);
2624 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf7d9f104);
2625 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf0edf804);
2626 cx25840_write4(client, DIF_BPF_COEFF3435, 0x03280d19);
2627 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2628 break;
2629
2630 case 5600000:
2631 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010003);
2632 cx25840_write4(client, DIF_BPF_COEFF23, 0x0003fffa);
2633 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe3ffc9);
2634 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc90002);
2635 cx25840_write4(client, DIF_BPF_COEFF89, 0x007500ef);
2636 cx25840_write4(client, DIF_BPF_COEFF1011, 0x010e007e);
2637 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff3dfdcf);
2638 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd16fddd);
2639 cx25840_write4(client, DIF_BPF_COEFF1617, 0x00440365);
2640 cx25840_write4(client, DIF_BPF_COEFF1819, 0x059b0548);
2641 cx25840_write4(client, DIF_BPF_COEFF2021, 0x01e3fc90);
2642 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7dff691);
2643 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfa0f014d);
2644 cx25840_write4(client, DIF_BPF_COEFF2627, 0x09020d23);
2645 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0b0a0318);
2646 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf8d7f15a);
2647 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf0a5f779);
2648 cx25840_write4(client, DIF_BPF_COEFF3435, 0x02bd0cf6);
2649 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2650 break;
2651
2652 case 5700000:
2653 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010003);
2654 cx25840_write4(client, DIF_BPF_COEFF23, 0x00060001);
2655 cx25840_write4(client, DIF_BPF_COEFF45, 0xffecffc9);
2656 cx25840_write4(client, DIF_BPF_COEFF67, 0xffb4ffd4);
2657 cx25840_write4(client, DIF_BPF_COEFF89, 0x004000d5);
2658 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013600f0);
2659 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffd3fe39);
2660 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd04fd31);
2661 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff360277);
2662 cx25840_write4(client, DIF_BPF_COEFF1819, 0x055605ef);
2663 cx25840_write4(client, DIF_BPF_COEFF2021, 0x033efdfe);
2664 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf8a5f642);
2665 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf8cbffb6);
2666 cx25840_write4(client, DIF_BPF_COEFF2627, 0x07e10cfb);
2667 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0bd50456);
2668 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf9dff1be);
2669 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf067f6f2);
2670 cx25840_write4(client, DIF_BPF_COEFF3435, 0x02520cd2);
2671 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2672 break;
2673
2674 case 5800000:
2675 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
2676 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080009);
2677 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff8ffd2);
2678 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaaffac);
2679 cx25840_write4(client, DIF_BPF_COEFF89, 0x000200a3);
2680 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013c014a);
2681 cx25840_write4(client, DIF_BPF_COEFF1213, 0x006dfec9);
2682 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd2bfcb7);
2683 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe350165);
2684 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04cb0651);
2685 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0477ff7e);
2686 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf9a5f635);
2687 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf7b1fe20);
2688 cx25840_write4(client, DIF_BPF_COEFF2627, 0x069f0ca8);
2689 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0c81058b);
2690 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfaf0f231);
2691 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf033f66d);
2692 cx25840_write4(client, DIF_BPF_COEFF3435, 0x01e60cae);
2693 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2694 break;
2695
2696 case 5900000:
2697 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
2698 cx25840_write4(client, DIF_BPF_COEFF23, 0x0009000e);
2699 cx25840_write4(client, DIF_BPF_COEFF45, 0x0005ffe1);
2700 cx25840_write4(client, DIF_BPF_COEFF67, 0xffacff90);
2701 cx25840_write4(client, DIF_BPF_COEFF89, 0xffc5005f);
2702 cx25840_write4(client, DIF_BPF_COEFF1011, 0x01210184);
2703 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00fcff72);
2704 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd8afc77);
2705 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51003f);
2706 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04020669);
2707 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05830103);
2708 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfad7f66b);
2709 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf6c8fc93);
2710 cx25840_write4(client, DIF_BPF_COEFF2627, 0x05430c2b);
2711 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d0d06b5);
2712 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfc08f2b2);
2713 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf00af5ec);
2714 cx25840_write4(client, DIF_BPF_COEFF3435, 0x017b0c89);
2715 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2716 break;
2717
2718 case 6000000:
2719 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000001);
2720 cx25840_write4(client, DIF_BPF_COEFF23, 0x00070012);
2721 cx25840_write4(client, DIF_BPF_COEFF45, 0x0012fff5);
2722 cx25840_write4(client, DIF_BPF_COEFF67, 0xffbaff82);
2723 cx25840_write4(client, DIF_BPF_COEFF89, 0xff8e000f);
2724 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00e80198);
2725 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01750028);
2726 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe18fc75);
2727 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99ff15);
2728 cx25840_write4(client, DIF_BPF_COEFF1819, 0x03050636);
2729 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0656027f);
2730 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfc32f6e2);
2731 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf614fb17);
2732 cx25840_write4(client, DIF_BPF_COEFF2627, 0x03d20b87);
2733 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d7707d2);
2734 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfd26f341);
2735 cx25840_write4(client, DIF_BPF_COEFF3233, 0xefeaf56f);
2736 cx25840_write4(client, DIF_BPF_COEFF3435, 0x010f0c64);
2737 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2738 break;
2739
2740 case 6100000:
2741 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0000);
2742 cx25840_write4(client, DIF_BPF_COEFF23, 0x00050012);
2743 cx25840_write4(client, DIF_BPF_COEFF45, 0x001c000b);
2744 cx25840_write4(client, DIF_BPF_COEFF67, 0xffd1ff84);
2745 cx25840_write4(client, DIF_BPF_COEFF89, 0xff66ffbe);
2746 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00960184);
2747 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01cd00da);
2748 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfeccfcb2);
2749 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17fdf9);
2750 cx25840_write4(client, DIF_BPF_COEFF1819, 0x01e005bc);
2751 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06e703e4);
2752 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfdabf798);
2753 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf599f9b3);
2754 cx25840_write4(client, DIF_BPF_COEFF2627, 0x02510abd);
2755 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0dbf08df);
2756 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfe48f3dc);
2757 cx25840_write4(client, DIF_BPF_COEFF3233, 0xefd5f4f6);
2758 cx25840_write4(client, DIF_BPF_COEFF3435, 0x00a20c3e);
2759 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2760 break;
2761
2762 case 6200000:
2763 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffe);
2764 cx25840_write4(client, DIF_BPF_COEFF23, 0x0002000f);
2765 cx25840_write4(client, DIF_BPF_COEFF45, 0x0021001f);
2766 cx25840_write4(client, DIF_BPF_COEFF67, 0xfff0ff97);
2767 cx25840_write4(client, DIF_BPF_COEFF89, 0xff50ff74);
2768 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0034014a);
2769 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01fa0179);
2770 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff97fd2a);
2771 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3fcfa);
2772 cx25840_write4(client, DIF_BPF_COEFF1819, 0x00a304fe);
2773 cx25840_write4(client, DIF_BPF_COEFF2021, 0x07310525);
2774 cx25840_write4(client, DIF_BPF_COEFF2223, 0xff37f886);
2775 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf55cf86e);
2776 cx25840_write4(client, DIF_BPF_COEFF2627, 0x00c709d0);
2777 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0de209db);
2778 cx25840_write4(client, DIF_BPF_COEFF3031, 0xff6df484);
2779 cx25840_write4(client, DIF_BPF_COEFF3233, 0xefcbf481);
2780 cx25840_write4(client, DIF_BPF_COEFF3435, 0x00360c18);
2781 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2782 break;
2783
2784 case 6300000:
2785 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffd);
2786 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffe000a);
2787 cx25840_write4(client, DIF_BPF_COEFF45, 0x0021002f);
2788 cx25840_write4(client, DIF_BPF_COEFF67, 0x0010ffb8);
2789 cx25840_write4(client, DIF_BPF_COEFF89, 0xff50ff3b);
2790 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffcc00f0);
2791 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01fa01fa);
2792 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0069fdd4);
2793 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3fc26);
2794 cx25840_write4(client, DIF_BPF_COEFF1819, 0xff5d0407);
2795 cx25840_write4(client, DIF_BPF_COEFF2021, 0x07310638);
2796 cx25840_write4(client, DIF_BPF_COEFF2223, 0x00c9f9a8);
2797 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf55cf74e);
2798 cx25840_write4(client, DIF_BPF_COEFF2627, 0xff3908c3);
2799 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0de20ac3);
2800 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0093f537);
2801 cx25840_write4(client, DIF_BPF_COEFF3233, 0xefcbf410);
2802 cx25840_write4(client, DIF_BPF_COEFF3435, 0xffca0bf2);
2803 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2804 break;
2805
2806 case 6400000:
2807 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffd);
2808 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffb0003);
2809 cx25840_write4(client, DIF_BPF_COEFF45, 0x001c0037);
2810 cx25840_write4(client, DIF_BPF_COEFF67, 0x002fffe2);
2811 cx25840_write4(client, DIF_BPF_COEFF89, 0xff66ff17);
2812 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff6a007e);
2813 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01cd0251);
2814 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0134fea5);
2815 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17fb8b);
2816 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfe2002e0);
2817 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06e70713);
2818 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0255faf5);
2819 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf599f658);
2820 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfdaf0799);
2821 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0dbf0b96);
2822 cx25840_write4(client, DIF_BPF_COEFF3031, 0x01b8f5f5);
2823 cx25840_write4(client, DIF_BPF_COEFF3233, 0xefd5f3a3);
2824 cx25840_write4(client, DIF_BPF_COEFF3435, 0xff5e0bca);
2825 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2826 break;
2827
2828 case 6500000:
2829 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
2830 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9fffb);
2831 cx25840_write4(client, DIF_BPF_COEFF45, 0x00120037);
2832 cx25840_write4(client, DIF_BPF_COEFF67, 0x00460010);
2833 cx25840_write4(client, DIF_BPF_COEFF89, 0xff8eff0f);
2834 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff180000);
2835 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01750276);
2836 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01e8ff8d);
2837 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99fb31);
2838 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfcfb0198);
2839 cx25840_write4(client, DIF_BPF_COEFF2021, 0x065607ad);
2840 cx25840_write4(client, DIF_BPF_COEFF2223, 0x03cefc64);
2841 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf614f592);
2842 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfc2e0656);
2843 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d770c52);
2844 cx25840_write4(client, DIF_BPF_COEFF3031, 0x02daf6bd);
2845 cx25840_write4(client, DIF_BPF_COEFF3233, 0xefeaf33b);
2846 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfef10ba3);
2847 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2848 break;
2849
2850 case 6600000:
2851 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
2852 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff7fff5);
2853 cx25840_write4(client, DIF_BPF_COEFF45, 0x0005002f);
2854 cx25840_write4(client, DIF_BPF_COEFF67, 0x0054003c);
2855 cx25840_write4(client, DIF_BPF_COEFF89, 0xffc5ff22);
2856 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfedfff82);
2857 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00fc0267);
2858 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0276007e);
2859 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51fb1c);
2860 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfbfe003e);
2861 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05830802);
2862 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0529fdec);
2863 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf6c8f4fe);
2864 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfabd04ff);
2865 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d0d0cf6);
2866 cx25840_write4(client, DIF_BPF_COEFF3031, 0x03f8f78f);
2867 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf00af2d7);
2868 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfe850b7b);
2869 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2870 break;
2871
2872 case 6700000:
2873 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000ffff);
2874 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff0);
2875 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff80020);
2876 cx25840_write4(client, DIF_BPF_COEFF67, 0x00560060);
2877 cx25840_write4(client, DIF_BPF_COEFF89, 0x0002ff4e);
2878 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec4ff10);
2879 cx25840_write4(client, DIF_BPF_COEFF1213, 0x006d0225);
2880 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02d50166);
2881 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35fb4e);
2882 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb35fee1);
2883 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0477080e);
2884 cx25840_write4(client, DIF_BPF_COEFF2223, 0x065bff82);
2885 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf7b1f4a0);
2886 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf9610397);
2887 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0c810d80);
2888 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0510f869);
2889 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf033f278);
2890 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfe1a0b52);
2891 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2892 break;
2893
2894 case 6800000:
2895 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010000);
2896 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffaffee);
2897 cx25840_write4(client, DIF_BPF_COEFF45, 0xffec000c);
2898 cx25840_write4(client, DIF_BPF_COEFF67, 0x004c0078);
2899 cx25840_write4(client, DIF_BPF_COEFF89, 0x0040ff8e);
2900 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfecafeb6);
2901 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffd301b6);
2902 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02fc0235);
2903 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36fbc5);
2904 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfaaafd90);
2905 cx25840_write4(client, DIF_BPF_COEFF2021, 0x033e07d2);
2906 cx25840_write4(client, DIF_BPF_COEFF2223, 0x075b011b);
2907 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf8cbf47a);
2908 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf81f0224);
2909 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0bd50def);
2910 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0621f94b);
2911 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf067f21e);
2912 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfdae0b29);
2913 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2914 break;
2915
2916 case 6900000:
2917 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010001);
2918 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffdffef);
2919 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe3fff6);
2920 cx25840_write4(client, DIF_BPF_COEFF67, 0x0037007f);
2921 cx25840_write4(client, DIF_BPF_COEFF89, 0x0075ffdc);
2922 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfef2fe7c);
2923 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff3d0122);
2924 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02ea02dd);
2925 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0044fc79);
2926 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa65fc5d);
2927 cx25840_write4(client, DIF_BPF_COEFF2021, 0x01e3074e);
2928 cx25840_write4(client, DIF_BPF_COEFF2223, 0x082102ad);
2929 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfa0ff48c);
2930 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf6fe00a9);
2931 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0b0a0e43);
2932 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0729fa33);
2933 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf0a5f1c9);
2934 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfd430b00);
2935 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2936 break;
2937
2938 case 7000000:
2939 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010002);
2940 cx25840_write4(client, DIF_BPF_COEFF23, 0x0001fff3);
2941 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdeffe2);
2942 cx25840_write4(client, DIF_BPF_COEFF67, 0x001b0076);
2943 cx25840_write4(client, DIF_BPF_COEFF89, 0x009c002d);
2944 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff35fe68);
2945 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfeba0076);
2946 cx25840_write4(client, DIF_BPF_COEFF1415, 0x029f0352);
2947 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014dfd60);
2948 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa69fb53);
2949 cx25840_write4(client, DIF_BPF_COEFF2021, 0x00740688);
2950 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08a7042d);
2951 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfb75f4d6);
2952 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf600ff2d);
2953 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0a220e7a);
2954 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0827fb22);
2955 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf0edf17a);
2956 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfcd80ad6);
2957 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2958 break;
2959
2960 case 7100000:
2961 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
2962 cx25840_write4(client, DIF_BPF_COEFF23, 0x0004fff9);
2963 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe0ffd2);
2964 cx25840_write4(client, DIF_BPF_COEFF67, 0xfffb005e);
2965 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b0007a);
2966 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff8ffe7c);
2967 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe53ffc1);
2968 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0221038c);
2969 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0241fe6e);
2970 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfab6fa80);
2971 cx25840_write4(client, DIF_BPF_COEFF2021, 0xff010587);
2972 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08e90590);
2973 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfcf5f556);
2974 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf52bfdb3);
2975 cx25840_write4(client, DIF_BPF_COEFF2829, 0x09210e95);
2976 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0919fc15);
2977 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf13ff12f);
2978 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfc6e0aab);
2979 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
2980 break;
2981
2982 case 7200000:
2983 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
2984 cx25840_write4(client, DIF_BPF_COEFF23, 0x00070000);
2985 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe6ffc9);
2986 cx25840_write4(client, DIF_BPF_COEFF67, 0xffdb0039);
2987 cx25840_write4(client, DIF_BPF_COEFF89, 0x00af00b8);
2988 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfff4feb6);
2989 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe13ff10);
2990 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01790388);
2991 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0311ff92);
2992 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb48f9ed);
2993 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfd980453);
2994 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08e306cd);
2995 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfe88f60a);
2996 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf482fc40);
2997 cx25840_write4(client, DIF_BPF_COEFF2829, 0x08080e93);
2998 cx25840_write4(client, DIF_BPF_COEFF3031, 0x09fdfd0c);
2999 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf19af0ea);
3000 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfc050a81);
3001 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3002 break;
3003
3004 case 7300000:
3005 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
3006 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080008);
3007 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff0ffc9);
3008 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc1000d);
3009 cx25840_write4(client, DIF_BPF_COEFF89, 0x009800e2);
3010 cx25840_write4(client, DIF_BPF_COEFF1011, 0x005bff10);
3011 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe00fe74);
3012 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00b50345);
3013 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b000bc);
3014 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfc18f9a1);
3015 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfc4802f9);
3016 cx25840_write4(client, DIF_BPF_COEFF2223, 0x089807dc);
3017 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0022f6f0);
3018 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf407fada);
3019 cx25840_write4(client, DIF_BPF_COEFF2829, 0x06da0e74);
3020 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0ad3fe06);
3021 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf1fef0ab);
3022 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfb9c0a55);
3023 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3024 break;
3025
3026 case 7400000:
3027 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000001);
3028 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008000e);
3029 cx25840_write4(client, DIF_BPF_COEFF45, 0xfffdffd0);
3030 cx25840_write4(client, DIF_BPF_COEFF67, 0xffafffdf);
3031 cx25840_write4(client, DIF_BPF_COEFF89, 0x006e00f2);
3032 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00b8ff82);
3033 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe1bfdf8);
3034 cx25840_write4(client, DIF_BPF_COEFF1415, 0xffe302c8);
3035 cx25840_write4(client, DIF_BPF_COEFF1617, 0x041301dc);
3036 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfd1af99e);
3037 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfb1e0183);
3038 cx25840_write4(client, DIF_BPF_COEFF2223, 0x080908b5);
3039 cx25840_write4(client, DIF_BPF_COEFF2425, 0x01bcf801);
3040 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf3bdf985);
3041 cx25840_write4(client, DIF_BPF_COEFF2829, 0x059a0e38);
3042 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0b99ff03);
3043 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf26cf071);
3044 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfb330a2a);
3045 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3046 break;
3047
3048 case 7500000:
3049 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0000);
3050 cx25840_write4(client, DIF_BPF_COEFF23, 0x00070011);
3051 cx25840_write4(client, DIF_BPF_COEFF45, 0x000affdf);
3052 cx25840_write4(client, DIF_BPF_COEFF67, 0xffa9ffb5);
3053 cx25840_write4(client, DIF_BPF_COEFF89, 0x003700e6);
3054 cx25840_write4(client, DIF_BPF_COEFF1011, 0x01010000);
3055 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe62fda8);
3056 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff140219);
3057 cx25840_write4(client, DIF_BPF_COEFF1617, 0x043502e1);
3058 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfe42f9e6);
3059 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfa270000);
3060 cx25840_write4(client, DIF_BPF_COEFF2223, 0x073a0953);
3061 cx25840_write4(client, DIF_BPF_COEFF2425, 0x034cf939);
3062 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf3a4f845);
3063 cx25840_write4(client, DIF_BPF_COEFF2829, 0x044c0de1);
3064 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0c4f0000);
3065 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf2e2f03c);
3066 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfacc09fe);
3067 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3068 break;
3069
3070 case 7600000:
3071 cx25840_write4(client, DIF_BPF_COEFF01, 0xffffffff);
3072 cx25840_write4(client, DIF_BPF_COEFF23, 0x00040012);
3073 cx25840_write4(client, DIF_BPF_COEFF45, 0x0016fff3);
3074 cx25840_write4(client, DIF_BPF_COEFF67, 0xffafff95);
3075 cx25840_write4(client, DIF_BPF_COEFF89, 0xfff900c0);
3076 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0130007e);
3077 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfecefd89);
3078 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe560146);
3079 cx25840_write4(client, DIF_BPF_COEFF1617, 0x041303bc);
3080 cx25840_write4(client, DIF_BPF_COEFF1819, 0xff81fa76);
3081 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf96cfe7d);
3082 cx25840_write4(client, DIF_BPF_COEFF2223, 0x063209b1);
3083 cx25840_write4(client, DIF_BPF_COEFF2425, 0x04c9fa93);
3084 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf3bdf71e);
3085 cx25840_write4(client, DIF_BPF_COEFF2829, 0x02f30d6e);
3086 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0cf200fd);
3087 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf361f00e);
3088 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfa6509d1);
3089 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3090 break;
3091
3092 case 7700000:
3093 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffe);
3094 cx25840_write4(client, DIF_BPF_COEFF23, 0x00010010);
3095 cx25840_write4(client, DIF_BPF_COEFF45, 0x001e0008);
3096 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc1ff84);
3097 cx25840_write4(client, DIF_BPF_COEFF89, 0xffbc0084);
3098 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013e00f0);
3099 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff56fd9f);
3100 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdb8005c);
3101 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b00460);
3102 cx25840_write4(client, DIF_BPF_COEFF1819, 0x00c7fb45);
3103 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8f4fd07);
3104 cx25840_write4(client, DIF_BPF_COEFF2223, 0x04fa09ce);
3105 cx25840_write4(client, DIF_BPF_COEFF2425, 0x062afc07);
3106 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf407f614);
3107 cx25840_write4(client, DIF_BPF_COEFF2829, 0x01920ce0);
3108 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0d8301fa);
3109 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf3e8efe5);
3110 cx25840_write4(client, DIF_BPF_COEFF3435, 0xfa0009a4);
3111 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3112 break;
3113
3114 case 7800000:
3115 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3116 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffd000b);
3117 cx25840_write4(client, DIF_BPF_COEFF45, 0x0022001d);
3118 cx25840_write4(client, DIF_BPF_COEFF67, 0xffdbff82);
3119 cx25840_write4(client, DIF_BPF_COEFF89, 0xff870039);
3120 cx25840_write4(client, DIF_BPF_COEFF1011, 0x012a014a);
3121 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffedfde7);
3122 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd47ff6b);
3123 cx25840_write4(client, DIF_BPF_COEFF1617, 0x031104c6);
3124 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0202fc4c);
3125 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8c6fbad);
3126 cx25840_write4(client, DIF_BPF_COEFF2223, 0x039909a7);
3127 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0767fd8e);
3128 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf482f52b);
3129 cx25840_write4(client, DIF_BPF_COEFF2829, 0x002d0c39);
3130 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0e0002f4);
3131 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf477efc2);
3132 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf99b0977);
3133 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3134 break;
3135
3136 case 7900000:
3137 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3138 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffa0004);
3139 cx25840_write4(client, DIF_BPF_COEFF45, 0x0020002d);
3140 cx25840_write4(client, DIF_BPF_COEFF67, 0xfffbff91);
3141 cx25840_write4(client, DIF_BPF_COEFF89, 0xff61ffe8);
3142 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00f70184);
3143 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0086fe5c);
3144 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd0bfe85);
3145 cx25840_write4(client, DIF_BPF_COEFF1617, 0x024104e5);
3146 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0323fd7d);
3147 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8e2fa79);
3148 cx25840_write4(client, DIF_BPF_COEFF2223, 0x021d093f);
3149 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0879ff22);
3150 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf52bf465);
3151 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfec70b79);
3152 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0e6803eb);
3153 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf50defa5);
3154 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf937094a);
3155 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3156 break;
3157
3158 case 8000000:
3159 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
3160 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fffd);
3161 cx25840_write4(client, DIF_BPF_COEFF45, 0x00190036);
3162 cx25840_write4(client, DIF_BPF_COEFF67, 0x001bffaf);
3163 cx25840_write4(client, DIF_BPF_COEFF89, 0xff4fff99);
3164 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00aa0198);
3165 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0112fef3);
3166 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd09fdb9);
3167 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014d04be);
3168 cx25840_write4(client, DIF_BPF_COEFF1819, 0x041bfecc);
3169 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf947f978);
3170 cx25840_write4(client, DIF_BPF_COEFF2223, 0x00900897);
3171 cx25840_write4(client, DIF_BPF_COEFF2425, 0x095a00b9);
3172 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf600f3c5);
3173 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfd650aa3);
3174 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0ebc04de);
3175 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf5aaef8e);
3176 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf8d5091c);
3177 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3178 break;
3179
3180 case 8100000:
3181 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000ffff);
3182 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff7fff6);
3183 cx25840_write4(client, DIF_BPF_COEFF45, 0x000e0038);
3184 cx25840_write4(client, DIF_BPF_COEFF67, 0x0037ffd7);
3185 cx25840_write4(client, DIF_BPF_COEFF89, 0xff52ff56);
3186 cx25840_write4(client, DIF_BPF_COEFF1011, 0x004b0184);
3187 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0186ffa1);
3188 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd40fd16);
3189 cx25840_write4(client, DIF_BPF_COEFF1617, 0x00440452);
3190 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04de0029);
3191 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf9f2f8b2);
3192 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfefe07b5);
3193 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a05024d);
3194 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf6fef34d);
3195 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfc0a09b8);
3196 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0efa05cd);
3197 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf64eef7d);
3198 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf87308ed);
3199 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3200 break;
3201
3202 case 8200000:
3203 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010000);
3204 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff0);
3205 cx25840_write4(client, DIF_BPF_COEFF45, 0x00000031);
3206 cx25840_write4(client, DIF_BPF_COEFF67, 0x004c0005);
3207 cx25840_write4(client, DIF_BPF_COEFF89, 0xff6aff27);
3208 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffe4014a);
3209 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01d70057);
3210 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdacfca6);
3211 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff3603a7);
3212 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05610184);
3213 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfadbf82e);
3214 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfd74069f);
3215 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a7503d6);
3216 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf81ff2ff);
3217 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfab808b9);
3218 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0f2306b5);
3219 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf6f9ef72);
3220 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf81308bf);
3221 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3222 break;
3223
3224 case 8300000:
3225 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010001);
3226 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffbffee);
3227 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff30022);
3228 cx25840_write4(client, DIF_BPF_COEFF67, 0x00560032);
3229 cx25840_write4(client, DIF_BPF_COEFF89, 0xff95ff10);
3230 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff8000f0);
3231 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01fe0106);
3232 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe46fc71);
3233 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe3502c7);
3234 cx25840_write4(client, DIF_BPF_COEFF1819, 0x059e02ce);
3235 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfbf9f7f2);
3236 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfbff055b);
3237 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0aa9054c);
3238 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf961f2db);
3239 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf97507aa);
3240 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0f350797);
3241 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf7a9ef6d);
3242 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf7b40890);
3243 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3244 break;
3245
3246 case 8400000:
3247 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010002);
3248 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffeffee);
3249 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe8000f);
3250 cx25840_write4(client, DIF_BPF_COEFF67, 0x00540058);
3251 cx25840_write4(client, DIF_BPF_COEFF89, 0xffcdff14);
3252 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff29007e);
3253 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01f6019e);
3254 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff01fc7c);
3255 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd5101bf);
3256 cx25840_write4(client, DIF_BPF_COEFF1819, 0x059203f6);
3257 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfd41f7fe);
3258 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfaa903f3);
3259 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a9e06a9);
3260 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfabdf2e2);
3261 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf842068b);
3262 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0f320871);
3263 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf85eef6e);
3264 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf7560860);
3265 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3266 break;
3267
3268 case 8500000:
3269 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3270 cx25840_write4(client, DIF_BPF_COEFF23, 0x0002fff2);
3271 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe1fff9);
3272 cx25840_write4(client, DIF_BPF_COEFF67, 0x00460073);
3273 cx25840_write4(client, DIF_BPF_COEFF89, 0x000bff34);
3274 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfee90000);
3275 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01c10215);
3276 cx25840_write4(client, DIF_BPF_COEFF1415, 0xffd0fcc5);
3277 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99009d);
3278 cx25840_write4(client, DIF_BPF_COEFF1819, 0x053d04f1);
3279 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfea5f853);
3280 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf97d0270);
3281 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a5607e4);
3282 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfc2ef314);
3283 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf723055f);
3284 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0f180943);
3285 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf919ef75);
3286 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf6fa0830);
3287 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3288 break;
3289
3290 case 8600000:
3291 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3292 cx25840_write4(client, DIF_BPF_COEFF23, 0x0005fff8);
3293 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdeffe4);
3294 cx25840_write4(client, DIF_BPF_COEFF67, 0x002f007f);
3295 cx25840_write4(client, DIF_BPF_COEFF89, 0x0048ff6b);
3296 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec7ff82);
3297 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0163025f);
3298 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00a2fd47);
3299 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17ff73);
3300 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04a405b2);
3301 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0017f8ed);
3302 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf88500dc);
3303 cx25840_write4(client, DIF_BPF_COEFF2425, 0x09d208f9);
3304 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfdaff370);
3305 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf61c0429);
3306 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0ee80a0b);
3307 cx25840_write4(client, DIF_BPF_COEFF3233, 0xf9d8ef82);
3308 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf6a00800);
3309 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3310 break;
3311
3312 case 8700000:
3313 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3314 cx25840_write4(client, DIF_BPF_COEFF23, 0x0007ffff);
3315 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe1ffd4);
3316 cx25840_write4(client, DIF_BPF_COEFF67, 0x0010007a);
3317 cx25840_write4(client, DIF_BPF_COEFF89, 0x007cffb2);
3318 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec6ff10);
3319 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00e60277);
3320 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0168fdf9);
3321 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3fe50);
3322 cx25840_write4(client, DIF_BPF_COEFF1819, 0x03ce0631);
3323 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0188f9c8);
3324 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7c7ff43);
3325 cx25840_write4(client, DIF_BPF_COEFF2425, 0x091509e3);
3326 cx25840_write4(client, DIF_BPF_COEFF2627, 0xff39f3f6);
3327 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf52d02ea);
3328 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0ea30ac9);
3329 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfa9bef95);
3330 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf64607d0);
3331 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3332 break;
3333
3334 case 8800000:
3335 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
3336 cx25840_write4(client, DIF_BPF_COEFF23, 0x00090007);
3337 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe9ffca);
3338 cx25840_write4(client, DIF_BPF_COEFF67, 0xfff00065);
3339 cx25840_write4(client, DIF_BPF_COEFF89, 0x00a10003);
3340 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfee6feb6);
3341 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0053025b);
3342 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0213fed0);
3343 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3fd46);
3344 cx25840_write4(client, DIF_BPF_COEFF1819, 0x02c70668);
3345 cx25840_write4(client, DIF_BPF_COEFF2021, 0x02eafadb);
3346 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf74bfdae);
3347 cx25840_write4(client, DIF_BPF_COEFF2425, 0x08230a9c);
3348 cx25840_write4(client, DIF_BPF_COEFF2627, 0x00c7f4a3);
3349 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf45b01a6);
3350 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0e480b7c);
3351 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfb61efae);
3352 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf5ef079f);
3353 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3354 break;
3355
3356 case 8900000:
3357 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0000);
3358 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008000d);
3359 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff5ffc8);
3360 cx25840_write4(client, DIF_BPF_COEFF67, 0xffd10043);
3361 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b20053);
3362 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff24fe7c);
3363 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffb9020c);
3364 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0295ffbb);
3365 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17fc64);
3366 cx25840_write4(client, DIF_BPF_COEFF1819, 0x019b0654);
3367 cx25840_write4(client, DIF_BPF_COEFF2021, 0x042dfc1c);
3368 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf714fc2a);
3369 cx25840_write4(client, DIF_BPF_COEFF2425, 0x07020b21);
3370 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0251f575);
3371 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf3a7005e);
3372 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0dd80c24);
3373 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfc2aefcd);
3374 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf599076e);
3375 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3376 break;
3377
3378 case 9000000:
3379 cx25840_write4(client, DIF_BPF_COEFF01, 0xffffffff);
3380 cx25840_write4(client, DIF_BPF_COEFF23, 0x00060011);
3381 cx25840_write4(client, DIF_BPF_COEFF45, 0x0002ffcf);
3382 cx25840_write4(client, DIF_BPF_COEFF67, 0xffba0018);
3383 cx25840_write4(client, DIF_BPF_COEFF89, 0x00ad009a);
3384 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff79fe68);
3385 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff260192);
3386 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02e500ab);
3387 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99fbb6);
3388 cx25840_write4(client, DIF_BPF_COEFF1819, 0x005b05f7);
3389 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0545fd81);
3390 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf723fabf);
3391 cx25840_write4(client, DIF_BPF_COEFF2425, 0x05b80b70);
3392 cx25840_write4(client, DIF_BPF_COEFF2627, 0x03d2f669);
3393 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf313ff15);
3394 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0d550cbf);
3395 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfcf6eff2);
3396 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf544073d);
3397 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3398 break;
3399
3400 case 9100000:
3401 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffe);
3402 cx25840_write4(client, DIF_BPF_COEFF23, 0x00030012);
3403 cx25840_write4(client, DIF_BPF_COEFF45, 0x000fffdd);
3404 cx25840_write4(client, DIF_BPF_COEFF67, 0xffacffea);
3405 cx25840_write4(client, DIF_BPF_COEFF89, 0x009300cf);
3406 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffdcfe7c);
3407 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfea600f7);
3408 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02fd0190);
3409 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51fb46);
3410 cx25840_write4(client, DIF_BPF_COEFF1819, 0xff150554);
3411 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0627fefd);
3412 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf778f978);
3413 cx25840_write4(client, DIF_BPF_COEFF2425, 0x044d0b87);
3414 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0543f77d);
3415 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2a0fdcf);
3416 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0cbe0d4e);
3417 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfdc4f01d);
3418 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf4f2070b);
3419 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3420 break;
3421
3422 case 9200000:
3423 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3424 cx25840_write4(client, DIF_BPF_COEFF23, 0x00000010);
3425 cx25840_write4(client, DIF_BPF_COEFF45, 0x001afff0);
3426 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaaffbf);
3427 cx25840_write4(client, DIF_BPF_COEFF89, 0x006700ed);
3428 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0043feb6);
3429 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe460047);
3430 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02db0258);
3431 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35fb1b);
3432 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfddc0473);
3433 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06c90082);
3434 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf811f85e);
3435 cx25840_write4(client, DIF_BPF_COEFF2425, 0x02c90b66);
3436 cx25840_write4(client, DIF_BPF_COEFF2627, 0x069ff8ad);
3437 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf250fc8d);
3438 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0c140dcf);
3439 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfe93f04d);
3440 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf4a106d9);
3441 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3442 break;
3443
3444 case 9300000:
3445 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3446 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffc000c);
3447 cx25840_write4(client, DIF_BPF_COEFF45, 0x00200006);
3448 cx25840_write4(client, DIF_BPF_COEFF67, 0xffb4ff9c);
3449 cx25840_write4(client, DIF_BPF_COEFF89, 0x002f00ef);
3450 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00a4ff10);
3451 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe0dff92);
3452 cx25840_write4(client, DIF_BPF_COEFF1415, 0x028102f7);
3453 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36fb37);
3454 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfcbf035e);
3455 cx25840_write4(client, DIF_BPF_COEFF2021, 0x07260202);
3456 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf8e8f778);
3457 cx25840_write4(client, DIF_BPF_COEFF2425, 0x01340b0d);
3458 cx25840_write4(client, DIF_BPF_COEFF2627, 0x07e1f9f4);
3459 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf223fb51);
3460 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0b590e42);
3461 cx25840_write4(client, DIF_BPF_COEFF3233, 0xff64f083);
3462 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf45206a7);
3463 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3464 break;
3465
3466 case 9400000:
3467 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3468 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff90005);
3469 cx25840_write4(client, DIF_BPF_COEFF45, 0x0022001a);
3470 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc9ff86);
3471 cx25840_write4(client, DIF_BPF_COEFF89, 0xfff000d7);
3472 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00f2ff82);
3473 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe01fee5);
3474 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01f60362);
3475 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0044fb99);
3476 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfbcc0222);
3477 cx25840_write4(client, DIF_BPF_COEFF2021, 0x07380370);
3478 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf9f7f6cc);
3479 cx25840_write4(client, DIF_BPF_COEFF2425, 0xff990a7e);
3480 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0902fb50);
3481 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf21afa1f);
3482 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0a8d0ea6);
3483 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0034f0bf);
3484 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf4050675);
3485 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3486 break;
3487
3488 case 9500000:
3489 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
3490 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fffe);
3491 cx25840_write4(client, DIF_BPF_COEFF45, 0x001e002b);
3492 cx25840_write4(client, DIF_BPF_COEFF67, 0xffe5ff81);
3493 cx25840_write4(client, DIF_BPF_COEFF89, 0xffb400a5);
3494 cx25840_write4(client, DIF_BPF_COEFF1011, 0x01280000);
3495 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe24fe50);
3496 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01460390);
3497 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014dfc3a);
3498 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb1000ce);
3499 cx25840_write4(client, DIF_BPF_COEFF2021, 0x070104bf);
3500 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfb37f65f);
3501 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfe0009bc);
3502 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0a00fcbb);
3503 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf235f8f8);
3504 cx25840_write4(client, DIF_BPF_COEFF3031, 0x09b20efc);
3505 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0105f101);
3506 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf3ba0642);
3507 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3508 break;
3509
3510 case 9600000:
3511 cx25840_write4(client, DIF_BPF_COEFF01, 0x0001ffff);
3512 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff7);
3513 cx25840_write4(client, DIF_BPF_COEFF45, 0x00150036);
3514 cx25840_write4(client, DIF_BPF_COEFF67, 0x0005ff8c);
3515 cx25840_write4(client, DIF_BPF_COEFF89, 0xff810061);
3516 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013d007e);
3517 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe71fddf);
3518 cx25840_write4(client, DIF_BPF_COEFF1415, 0x007c0380);
3519 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0241fd13);
3520 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa94ff70);
3521 cx25840_write4(client, DIF_BPF_COEFF2021, 0x068005e2);
3522 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfc9bf633);
3523 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfc7308ca);
3524 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0ad5fe30);
3525 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf274f7e0);
3526 cx25840_write4(client, DIF_BPF_COEFF3031, 0x08c90f43);
3527 cx25840_write4(client, DIF_BPF_COEFF3233, 0x01d4f147);
3528 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf371060f);
3529 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3530 break;
3531
3532 case 9700000:
3533 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010001);
3534 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9fff1);
3535 cx25840_write4(client, DIF_BPF_COEFF45, 0x00090038);
3536 cx25840_write4(client, DIF_BPF_COEFF67, 0x0025ffa7);
3537 cx25840_write4(client, DIF_BPF_COEFF89, 0xff5e0012);
3538 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013200f0);
3539 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfee3fd9b);
3540 cx25840_write4(client, DIF_BPF_COEFF1415, 0xffaa0331);
3541 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0311fe15);
3542 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa60fe18);
3543 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05bd06d1);
3544 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfe1bf64a);
3545 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfafa07ae);
3546 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0b7effab);
3547 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2d5f6d7);
3548 cx25840_write4(client, DIF_BPF_COEFF3031, 0x07d30f7a);
3549 cx25840_write4(client, DIF_BPF_COEFF3233, 0x02a3f194);
3550 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf32905dc);
3551 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3552 break;
3553
3554 case 9800000:
3555 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010002);
3556 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffcffee);
3557 cx25840_write4(client, DIF_BPF_COEFF45, 0xfffb0032);
3558 cx25840_write4(client, DIF_BPF_COEFF67, 0x003fffcd);
3559 cx25840_write4(client, DIF_BPF_COEFF89, 0xff4effc1);
3560 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0106014a);
3561 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff6efd8a);
3562 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfedd02aa);
3563 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b0ff34);
3564 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa74fcd7);
3565 cx25840_write4(client, DIF_BPF_COEFF2021, 0x04bf0781);
3566 cx25840_write4(client, DIF_BPF_COEFF2223, 0xffaaf6a3);
3567 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf99e066b);
3568 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0bf90128);
3569 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf359f5e1);
3570 cx25840_write4(client, DIF_BPF_COEFF3031, 0x06d20fa2);
3571 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0370f1e5);
3572 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf2e405a8);
3573 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3574 break;
3575
3576 case 9900000:
3577 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3578 cx25840_write4(client, DIF_BPF_COEFF23, 0xffffffee);
3579 cx25840_write4(client, DIF_BPF_COEFF45, 0xffef0024);
3580 cx25840_write4(client, DIF_BPF_COEFF67, 0x0051fffa);
3581 cx25840_write4(client, DIF_BPF_COEFF89, 0xff54ff77);
3582 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00be0184);
3583 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0006fdad);
3584 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe2701f3);
3585 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0413005e);
3586 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfad1fbba);
3587 cx25840_write4(client, DIF_BPF_COEFF2021, 0x039007ee);
3588 cx25840_write4(client, DIF_BPF_COEFF2223, 0x013bf73d);
3589 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf868050a);
3590 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c4302a1);
3591 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf3fdf4fe);
3592 cx25840_write4(client, DIF_BPF_COEFF3031, 0x05c70fba);
3593 cx25840_write4(client, DIF_BPF_COEFF3233, 0x043bf23c);
3594 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf2a10575);
3595 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3596 break;
3597
3598 case 10000000:
3599 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3600 cx25840_write4(client, DIF_BPF_COEFF23, 0x0003fff1);
3601 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe50011);
3602 cx25840_write4(client, DIF_BPF_COEFF67, 0x00570027);
3603 cx25840_write4(client, DIF_BPF_COEFF89, 0xff70ff3c);
3604 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00620198);
3605 cx25840_write4(client, DIF_BPF_COEFF1213, 0x009efe01);
3606 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd95011a);
3607 cx25840_write4(client, DIF_BPF_COEFF1617, 0x04350183);
3608 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb71fad0);
3609 cx25840_write4(client, DIF_BPF_COEFF2021, 0x023c0812);
3610 cx25840_write4(client, DIF_BPF_COEFF2223, 0x02c3f811);
3611 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf75e0390);
3612 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c5c0411);
3613 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf4c1f432);
3614 cx25840_write4(client, DIF_BPF_COEFF3031, 0x04b30fc1);
3615 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0503f297);
3616 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf2610541);
3617 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3618 break;
3619
3620 case 10100000:
3621 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3622 cx25840_write4(client, DIF_BPF_COEFF23, 0x0006fff7);
3623 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdffffc);
3624 cx25840_write4(client, DIF_BPF_COEFF67, 0x00510050);
3625 cx25840_write4(client, DIF_BPF_COEFF89, 0xff9dff18);
3626 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfffc0184);
3627 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0128fe80);
3628 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd32002e);
3629 cx25840_write4(client, DIF_BPF_COEFF1617, 0x04130292);
3630 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfc4dfa21);
3631 cx25840_write4(client, DIF_BPF_COEFF2021, 0x00d107ee);
3632 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0435f91c);
3633 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf6850205);
3634 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c430573);
3635 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf5a1f37d);
3636 cx25840_write4(client, DIF_BPF_COEFF3031, 0x03990fba);
3637 cx25840_write4(client, DIF_BPF_COEFF3233, 0x05c7f2f8);
3638 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf222050d);
3639 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3640 break;
3641
3642 case 10200000:
3643 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
3644 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008fffe);
3645 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdfffe7);
3646 cx25840_write4(client, DIF_BPF_COEFF67, 0x003f006e);
3647 cx25840_write4(client, DIF_BPF_COEFF89, 0xffd6ff0f);
3648 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff96014a);
3649 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0197ff1f);
3650 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd05ff3e);
3651 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b0037c);
3652 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfd59f9b7);
3653 cx25840_write4(client, DIF_BPF_COEFF2021, 0xff5d0781);
3654 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0585fa56);
3655 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf5e4006f);
3656 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0bf906c4);
3657 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf69df2e0);
3658 cx25840_write4(client, DIF_BPF_COEFF3031, 0x02790fa2);
3659 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0688f35d);
3660 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf1e604d8);
3661 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3662 break;
3663
3664 case 10300000:
3665 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0001);
3666 cx25840_write4(client, DIF_BPF_COEFF23, 0x00090005);
3667 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe4ffd6);
3668 cx25840_write4(client, DIF_BPF_COEFF67, 0x0025007e);
3669 cx25840_write4(client, DIF_BPF_COEFF89, 0x0014ff20);
3670 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff3c00f0);
3671 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01e1ffd0);
3672 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd12fe5c);
3673 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03110433);
3674 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfe88f996);
3675 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfdf106d1);
3676 cx25840_write4(client, DIF_BPF_COEFF2223, 0x06aafbb7);
3677 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf57efed8);
3678 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0b7e07ff);
3679 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf7b0f25e);
3680 cx25840_write4(client, DIF_BPF_COEFF3031, 0x01560f7a);
3681 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0745f3c7);
3682 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf1ac04a4);
3683 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3684 break;
3685
3686 case 10400000:
3687 cx25840_write4(client, DIF_BPF_COEFF01, 0xffffffff);
3688 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008000c);
3689 cx25840_write4(client, DIF_BPF_COEFF45, 0xffedffcb);
3690 cx25840_write4(client, DIF_BPF_COEFF67, 0x0005007d);
3691 cx25840_write4(client, DIF_BPF_COEFF89, 0x0050ff4c);
3692 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfef6007e);
3693 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01ff0086);
3694 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd58fd97);
3695 cx25840_write4(client, DIF_BPF_COEFF1617, 0x024104ad);
3696 cx25840_write4(client, DIF_BPF_COEFF1819, 0xffcaf9c0);
3697 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfc9905e2);
3698 cx25840_write4(client, DIF_BPF_COEFF2223, 0x079afd35);
3699 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf555fd46);
3700 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0ad50920);
3701 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf8d9f1f6);
3702 cx25840_write4(client, DIF_BPF_COEFF3031, 0x00310f43);
3703 cx25840_write4(client, DIF_BPF_COEFF3233, 0x07fdf435);
3704 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf174046f);
3705 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3706 break;
3707
3708 case 10500000:
3709 cx25840_write4(client, DIF_BPF_COEFF01, 0xfffffffe);
3710 cx25840_write4(client, DIF_BPF_COEFF23, 0x00050011);
3711 cx25840_write4(client, DIF_BPF_COEFF45, 0xfffaffc8);
3712 cx25840_write4(client, DIF_BPF_COEFF67, 0xffe5006b);
3713 cx25840_write4(client, DIF_BPF_COEFF89, 0x0082ff8c);
3714 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfecc0000);
3715 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01f00130);
3716 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdd2fcfc);
3717 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014d04e3);
3718 cx25840_write4(client, DIF_BPF_COEFF1819, 0x010efa32);
3719 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfb6404bf);
3720 cx25840_write4(client, DIF_BPF_COEFF2223, 0x084efec5);
3721 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf569fbc2);
3722 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0a000a23);
3723 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfa15f1ab);
3724 cx25840_write4(client, DIF_BPF_COEFF3031, 0xff0b0efc);
3725 cx25840_write4(client, DIF_BPF_COEFF3233, 0x08b0f4a7);
3726 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf13f043a);
3727 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3728 break;
3729
3730 case 10600000:
3731 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3732 cx25840_write4(client, DIF_BPF_COEFF23, 0x00020012);
3733 cx25840_write4(client, DIF_BPF_COEFF45, 0x0007ffcd);
3734 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc9004c);
3735 cx25840_write4(client, DIF_BPF_COEFF89, 0x00a4ffd9);
3736 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec3ff82);
3737 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01b401c1);
3738 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe76fc97);
3739 cx25840_write4(client, DIF_BPF_COEFF1617, 0x004404d2);
3740 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0245fae8);
3741 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfa5f0370);
3742 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08c1005f);
3743 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf5bcfa52);
3744 cx25840_write4(client, DIF_BPF_COEFF2627, 0x09020b04);
3745 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfb60f17b);
3746 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfde70ea6);
3747 cx25840_write4(client, DIF_BPF_COEFF3233, 0x095df51e);
3748 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf10c0405);
3749 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3750 break;
3751
3752 case 10700000:
3753 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3754 cx25840_write4(client, DIF_BPF_COEFF23, 0xffff0011);
3755 cx25840_write4(client, DIF_BPF_COEFF45, 0x0014ffdb);
3756 cx25840_write4(client, DIF_BPF_COEFF67, 0xffb40023);
3757 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b2002a);
3758 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfedbff10);
3759 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0150022d);
3760 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff38fc6f);
3761 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36047b);
3762 cx25840_write4(client, DIF_BPF_COEFF1819, 0x035efbda);
3763 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf9940202);
3764 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08ee01f5);
3765 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf649f8fe);
3766 cx25840_write4(client, DIF_BPF_COEFF2627, 0x07e10bc2);
3767 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfcb6f169);
3768 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfcc60e42);
3769 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0a04f599);
3770 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf0db03d0);
3771 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3772 break;
3773
3774 case 10800000:
3775 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
3776 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffb000d);
3777 cx25840_write4(client, DIF_BPF_COEFF45, 0x001dffed);
3778 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaafff5);
3779 cx25840_write4(client, DIF_BPF_COEFF89, 0x00aa0077);
3780 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff13feb6);
3781 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00ce026b);
3782 cx25840_write4(client, DIF_BPF_COEFF1415, 0x000afc85);
3783 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe3503e3);
3784 cx25840_write4(client, DIF_BPF_COEFF1819, 0x044cfcfb);
3785 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf90c0082);
3786 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08d5037f);
3787 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf710f7cc);
3788 cx25840_write4(client, DIF_BPF_COEFF2627, 0x069f0c59);
3789 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfe16f173);
3790 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfbaa0dcf);
3791 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0aa5f617);
3792 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf0ad039b);
3793 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3794 break;
3795
3796 case 10900000:
3797 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
3798 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff90006);
3799 cx25840_write4(client, DIF_BPF_COEFF45, 0x00210003);
3800 cx25840_write4(client, DIF_BPF_COEFF67, 0xffacffc8);
3801 cx25840_write4(client, DIF_BPF_COEFF89, 0x008e00b6);
3802 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff63fe7c);
3803 cx25840_write4(client, DIF_BPF_COEFF1213, 0x003a0275);
3804 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00dafcda);
3805 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd510313);
3806 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0501fe40);
3807 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8cbfefd);
3808 cx25840_write4(client, DIF_BPF_COEFF2223, 0x087604f0);
3809 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf80af6c2);
3810 cx25840_write4(client, DIF_BPF_COEFF2627, 0x05430cc8);
3811 cx25840_write4(client, DIF_BPF_COEFF2829, 0xff7af19a);
3812 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfa940d4e);
3813 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0b3ff699);
3814 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf0810365);
3815 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3816 break;
3817
3818 case 11000000:
3819 cx25840_write4(client, DIF_BPF_COEFF01, 0x0001ffff);
3820 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8ffff);
3821 cx25840_write4(client, DIF_BPF_COEFF45, 0x00210018);
3822 cx25840_write4(client, DIF_BPF_COEFF67, 0xffbaffa3);
3823 cx25840_write4(client, DIF_BPF_COEFF89, 0x006000e1);
3824 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffc4fe68);
3825 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffa0024b);
3826 cx25840_write4(client, DIF_BPF_COEFF1415, 0x019afd66);
3827 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc990216);
3828 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0575ff99);
3829 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8d4fd81);
3830 cx25840_write4(client, DIF_BPF_COEFF2223, 0x07d40640);
3831 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf932f5e6);
3832 cx25840_write4(client, DIF_BPF_COEFF2627, 0x03d20d0d);
3833 cx25840_write4(client, DIF_BPF_COEFF2829, 0x00dff1de);
3834 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf9860cbf);
3835 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0bd1f71e);
3836 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf058032f);
3837 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3838 break;
3839
3840 case 11100000:
3841 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010000);
3842 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff8);
3843 cx25840_write4(client, DIF_BPF_COEFF45, 0x001b0029);
3844 cx25840_write4(client, DIF_BPF_COEFF67, 0xffd1ff8a);
3845 cx25840_write4(client, DIF_BPF_COEFF89, 0x002600f2);
3846 cx25840_write4(client, DIF_BPF_COEFF1011, 0x002cfe7c);
3847 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff0f01f0);
3848 cx25840_write4(client, DIF_BPF_COEFF1415, 0x023bfe20);
3849 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc1700fa);
3850 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05a200f7);
3851 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf927fc1c);
3852 cx25840_write4(client, DIF_BPF_COEFF2223, 0x06f40765);
3853 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfa82f53b);
3854 cx25840_write4(client, DIF_BPF_COEFF2627, 0x02510d27);
3855 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0243f23d);
3856 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf8810c24);
3857 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0c5cf7a7);
3858 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf03102fa);
3859 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3860 break;
3861
3862 case 11200000:
3863 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010002);
3864 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffafff2);
3865 cx25840_write4(client, DIF_BPF_COEFF45, 0x00110035);
3866 cx25840_write4(client, DIF_BPF_COEFF67, 0xfff0ff81);
3867 cx25840_write4(client, DIF_BPF_COEFF89, 0xffe700e7);
3868 cx25840_write4(client, DIF_BPF_COEFF1011, 0x008ffeb6);
3869 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe94016d);
3870 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02b0fefb);
3871 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3ffd1);
3872 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05850249);
3873 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf9c1fadb);
3874 cx25840_write4(client, DIF_BPF_COEFF2223, 0x05de0858);
3875 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfbf2f4c4);
3876 cx25840_write4(client, DIF_BPF_COEFF2627, 0x00c70d17);
3877 cx25840_write4(client, DIF_BPF_COEFF2829, 0x03a0f2b8);
3878 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf7870b7c);
3879 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0cdff833);
3880 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf00d02c4);
3881 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3882 break;
3883
3884 case 11300000:
3885 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3886 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffdffee);
3887 cx25840_write4(client, DIF_BPF_COEFF45, 0x00040038);
3888 cx25840_write4(client, DIF_BPF_COEFF67, 0x0010ff88);
3889 cx25840_write4(client, DIF_BPF_COEFF89, 0xffac00c2);
3890 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00e2ff10);
3891 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe3900cb);
3892 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02f1ffe9);
3893 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3feaa);
3894 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05210381);
3895 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfa9cf9c8);
3896 cx25840_write4(client, DIF_BPF_COEFF2223, 0x04990912);
3897 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfd7af484);
3898 cx25840_write4(client, DIF_BPF_COEFF2627, 0xff390cdb);
3899 cx25840_write4(client, DIF_BPF_COEFF2829, 0x04f4f34d);
3900 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf69a0ac9);
3901 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0d5af8c1);
3902 cx25840_write4(client, DIF_BPF_COEFF3435, 0xefec028e);
3903 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3904 break;
3905
3906 case 11400000:
3907 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3908 cx25840_write4(client, DIF_BPF_COEFF23, 0x0000ffee);
3909 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff60033);
3910 cx25840_write4(client, DIF_BPF_COEFF67, 0x002fff9f);
3911 cx25840_write4(client, DIF_BPF_COEFF89, 0xff7b0087);
3912 cx25840_write4(client, DIF_BPF_COEFF1011, 0x011eff82);
3913 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe080018);
3914 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02f900d8);
3915 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17fd96);
3916 cx25840_write4(client, DIF_BPF_COEFF1819, 0x04790490);
3917 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfbadf8ed);
3918 cx25840_write4(client, DIF_BPF_COEFF2223, 0x032f098e);
3919 cx25840_write4(client, DIF_BPF_COEFF2425, 0xff10f47d);
3920 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfdaf0c75);
3921 cx25840_write4(client, DIF_BPF_COEFF2829, 0x063cf3fc);
3922 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf5ba0a0b);
3923 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0dccf952);
3924 cx25840_write4(client, DIF_BPF_COEFF3435, 0xefcd0258);
3925 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3926 break;
3927
3928 case 11500000:
3929 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
3930 cx25840_write4(client, DIF_BPF_COEFF23, 0x0004fff1);
3931 cx25840_write4(client, DIF_BPF_COEFF45, 0xffea0026);
3932 cx25840_write4(client, DIF_BPF_COEFF67, 0x0046ffc3);
3933 cx25840_write4(client, DIF_BPF_COEFF89, 0xff5a003c);
3934 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013b0000);
3935 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe04ff63);
3936 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02c801b8);
3937 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99fca6);
3938 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0397056a);
3939 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfcecf853);
3940 cx25840_write4(client, DIF_BPF_COEFF2223, 0x01ad09c9);
3941 cx25840_write4(client, DIF_BPF_COEFF2425, 0x00acf4ad);
3942 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfc2e0be7);
3943 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0773f4c2);
3944 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf4e90943);
3945 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0e35f9e6);
3946 cx25840_write4(client, DIF_BPF_COEFF3435, 0xefb10221);
3947 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3948 break;
3949
3950 case 11600000:
3951 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
3952 cx25840_write4(client, DIF_BPF_COEFF23, 0x0007fff6);
3953 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe20014);
3954 cx25840_write4(client, DIF_BPF_COEFF67, 0x0054ffee);
3955 cx25840_write4(client, DIF_BPF_COEFF89, 0xff4effeb);
3956 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0137007e);
3957 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe2efebb);
3958 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0260027a);
3959 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51fbe6);
3960 cx25840_write4(client, DIF_BPF_COEFF1819, 0x02870605);
3961 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfe4af7fe);
3962 cx25840_write4(client, DIF_BPF_COEFF2223, 0x001d09c1);
3963 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0243f515);
3964 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfabd0b32);
3965 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0897f59e);
3966 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf4280871);
3967 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0e95fa7c);
3968 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef9701eb);
3969 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3970 break;
3971
3972 case 11700000:
3973 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0001);
3974 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008fffd);
3975 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdeffff);
3976 cx25840_write4(client, DIF_BPF_COEFF67, 0x0056001d);
3977 cx25840_write4(client, DIF_BPF_COEFF89, 0xff57ff9c);
3978 cx25840_write4(client, DIF_BPF_COEFF1011, 0x011300f0);
3979 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe82fe2e);
3980 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01ca0310);
3981 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35fb62);
3982 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0155065a);
3983 cx25840_write4(client, DIF_BPF_COEFF2021, 0xffbaf7f2);
3984 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfe8c0977);
3985 cx25840_write4(client, DIF_BPF_COEFF2425, 0x03cef5b2);
3986 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf9610a58);
3987 cx25840_write4(client, DIF_BPF_COEFF2829, 0x09a5f68f);
3988 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf3790797);
3989 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0eebfb14);
3990 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef8001b5);
3991 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
3992 break;
3993
3994 case 11800000:
3995 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0000);
3996 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080004);
3997 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe0ffe9);
3998 cx25840_write4(client, DIF_BPF_COEFF67, 0x004c0047);
3999 cx25840_write4(client, DIF_BPF_COEFF89, 0xff75ff58);
4000 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00d1014a);
4001 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfef9fdc8);
4002 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0111036f);
4003 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36fb21);
4004 cx25840_write4(client, DIF_BPF_COEFF1819, 0x00120665);
4005 cx25840_write4(client, DIF_BPF_COEFF2021, 0x012df82e);
4006 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfd0708ec);
4007 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0542f682);
4008 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf81f095c);
4009 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0a9af792);
4010 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf2db06b5);
4011 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0f38fbad);
4012 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef6c017e);
4013 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4014 break;
4015
4016 case 11900000:
4017 cx25840_write4(client, DIF_BPF_COEFF01, 0xffffffff);
4018 cx25840_write4(client, DIF_BPF_COEFF23, 0x0007000b);
4019 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe7ffd8);
4020 cx25840_write4(client, DIF_BPF_COEFF67, 0x00370068);
4021 cx25840_write4(client, DIF_BPF_COEFF89, 0xffa4ff28);
4022 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00790184);
4023 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff87fd91);
4024 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00430392);
4025 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0044fb26);
4026 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfece0626);
4027 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0294f8b2);
4028 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfb990825);
4029 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0698f77f);
4030 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf6fe0842);
4031 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0b73f8a7);
4032 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf25105cd);
4033 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0f7bfc48);
4034 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef5a0148);
4035 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4036 break;
4037
4038 case 12000000:
4039 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
4040 cx25840_write4(client, DIF_BPF_COEFF23, 0x00050010);
4041 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff2ffcc);
4042 cx25840_write4(client, DIF_BPF_COEFF67, 0x001b007b);
4043 cx25840_write4(client, DIF_BPF_COEFF89, 0xffdfff10);
4044 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00140198);
4045 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0020fd8e);
4046 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff710375);
4047 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014dfb73);
4048 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfd9a059f);
4049 cx25840_write4(client, DIF_BPF_COEFF2021, 0x03e0f978);
4050 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfa4e0726);
4051 cx25840_write4(client, DIF_BPF_COEFF2425, 0x07c8f8a7);
4052 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf600070c);
4053 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0c2ff9c9);
4054 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf1db04de);
4055 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0fb4fce5);
4056 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef4b0111);
4057 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4058 break;
4059
4060 case 12100000:
4061 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4062 cx25840_write4(client, DIF_BPF_COEFF23, 0x00010012);
4063 cx25840_write4(client, DIF_BPF_COEFF45, 0xffffffc8);
4064 cx25840_write4(client, DIF_BPF_COEFF67, 0xfffb007e);
4065 cx25840_write4(client, DIF_BPF_COEFF89, 0x001dff14);
4066 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffad0184);
4067 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00b7fdbe);
4068 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfea9031b);
4069 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0241fc01);
4070 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfc8504d6);
4071 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0504fa79);
4072 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf93005f6);
4073 cx25840_write4(client, DIF_BPF_COEFF2425, 0x08caf9f2);
4074 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf52b05c0);
4075 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0ccbfaf9);
4076 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf17903eb);
4077 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0fe3fd83);
4078 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef3f00db);
4079 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4080 break;
4081
4082 case 12200000:
4083 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4084 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffe0011);
4085 cx25840_write4(client, DIF_BPF_COEFF45, 0x000cffcc);
4086 cx25840_write4(client, DIF_BPF_COEFF67, 0xffdb0071);
4087 cx25840_write4(client, DIF_BPF_COEFF89, 0x0058ff32);
4088 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff4f014a);
4089 cx25840_write4(client, DIF_BPF_COEFF1213, 0x013cfe1f);
4090 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdfb028a);
4091 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0311fcc9);
4092 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb9d03d6);
4093 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05f4fbad);
4094 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf848049d);
4095 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0999fb5b);
4096 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf4820461);
4097 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d46fc32);
4098 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf12d02f4);
4099 cx25840_write4(client, DIF_BPF_COEFF3233, 0x1007fe21);
4100 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef3600a4);
4101 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4102 break;
4103
4104 case 12300000:
4105 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
4106 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffa000e);
4107 cx25840_write4(client, DIF_BPF_COEFF45, 0x0017ffd9);
4108 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc10055);
4109 cx25840_write4(client, DIF_BPF_COEFF89, 0x0088ff68);
4110 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff0400f0);
4111 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01a6fea7);
4112 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd7501cc);
4113 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b0fdc0);
4114 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfaef02a8);
4115 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06a7fd07);
4116 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf79d0326);
4117 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a31fcda);
4118 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf40702f3);
4119 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d9ffd72);
4120 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0f601fa);
4121 cx25840_write4(client, DIF_BPF_COEFF3233, 0x1021fec0);
4122 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef2f006d);
4123 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4124 break;
4125
4126 case 12400000:
4127 cx25840_write4(client, DIF_BPF_COEFF01, 0x0001ffff);
4128 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff80007);
4129 cx25840_write4(client, DIF_BPF_COEFF45, 0x001fffeb);
4130 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaf002d);
4131 cx25840_write4(client, DIF_BPF_COEFF89, 0x00a8ffb0);
4132 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfed3007e);
4133 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01e9ff4c);
4134 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd2000ee);
4135 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0413fed8);
4136 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa82015c);
4137 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0715fe7d);
4138 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7340198);
4139 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a8dfe69);
4140 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf3bd017c);
4141 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0dd5feb8);
4142 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0d500fd);
4143 cx25840_write4(client, DIF_BPF_COEFF3233, 0x1031ff60);
4144 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef2b0037);
4145 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4146 break;
4147
4148 case 12500000:
4149 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010000);
4150 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff70000);
4151 cx25840_write4(client, DIF_BPF_COEFF45, 0x00220000);
4152 cx25840_write4(client, DIF_BPF_COEFF67, 0xffa90000);
4153 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b30000);
4154 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec20000);
4155 cx25840_write4(client, DIF_BPF_COEFF1213, 0x02000000);
4156 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd030000);
4157 cx25840_write4(client, DIF_BPF_COEFF1617, 0x04350000);
4158 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa5e0000);
4159 cx25840_write4(client, DIF_BPF_COEFF2021, 0x073b0000);
4160 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7110000);
4161 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0aac0000);
4162 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf3a40000);
4163 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0de70000);
4164 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0c90000);
4165 cx25840_write4(client, DIF_BPF_COEFF3233, 0x10360000);
4166 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef290000);
4167 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4168 break;
4169
4170 case 12600000:
4171 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010001);
4172 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff8fff9);
4173 cx25840_write4(client, DIF_BPF_COEFF45, 0x001f0015);
4174 cx25840_write4(client, DIF_BPF_COEFF67, 0xffafffd3);
4175 cx25840_write4(client, DIF_BPF_COEFF89, 0x00a80050);
4176 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfed3ff82);
4177 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01e900b4);
4178 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd20ff12);
4179 cx25840_write4(client, DIF_BPF_COEFF1617, 0x04130128);
4180 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa82fea4);
4181 cx25840_write4(client, DIF_BPF_COEFF2021, 0x07150183);
4182 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf734fe68);
4183 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a8d0197);
4184 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf3bdfe84);
4185 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0dd50148);
4186 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0d5ff03);
4187 cx25840_write4(client, DIF_BPF_COEFF3233, 0x103100a0);
4188 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef2bffc9);
4189 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4190 break;
4191
4192 case 12700000:
4193 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
4194 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffafff2);
4195 cx25840_write4(client, DIF_BPF_COEFF45, 0x00170027);
4196 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc1ffab);
4197 cx25840_write4(client, DIF_BPF_COEFF89, 0x00880098);
4198 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff04ff10);
4199 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01a60159);
4200 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd75fe34);
4201 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b00240);
4202 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfaeffd58);
4203 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06a702f9);
4204 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf79dfcda);
4205 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0a310326);
4206 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf407fd0d);
4207 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d9f028e);
4208 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf0f6fe06);
4209 cx25840_write4(client, DIF_BPF_COEFF3233, 0x10210140);
4210 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef2fff93);
4211 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4212 break;
4213
4214 case 12800000:
4215 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4216 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffeffef);
4217 cx25840_write4(client, DIF_BPF_COEFF45, 0x000c0034);
4218 cx25840_write4(client, DIF_BPF_COEFF67, 0xffdbff8f);
4219 cx25840_write4(client, DIF_BPF_COEFF89, 0x005800ce);
4220 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff4ffeb6);
4221 cx25840_write4(client, DIF_BPF_COEFF1213, 0x013c01e1);
4222 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdfbfd76);
4223 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03110337);
4224 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb9dfc2a);
4225 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05f40453);
4226 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf848fb63);
4227 cx25840_write4(client, DIF_BPF_COEFF2425, 0x099904a5);
4228 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf482fb9f);
4229 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0d4603ce);
4230 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf12dfd0c);
4231 cx25840_write4(client, DIF_BPF_COEFF3233, 0x100701df);
4232 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef36ff5c);
4233 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4234 break;
4235
4236 case 12900000:
4237 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4238 cx25840_write4(client, DIF_BPF_COEFF23, 0x0001ffee);
4239 cx25840_write4(client, DIF_BPF_COEFF45, 0xffff0038);
4240 cx25840_write4(client, DIF_BPF_COEFF67, 0xfffbff82);
4241 cx25840_write4(client, DIF_BPF_COEFF89, 0x001d00ec);
4242 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffadfe7c);
4243 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00b70242);
4244 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfea9fce5);
4245 cx25840_write4(client, DIF_BPF_COEFF1617, 0x024103ff);
4246 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfc85fb2a);
4247 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05040587);
4248 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf930fa0a);
4249 cx25840_write4(client, DIF_BPF_COEFF2425, 0x08ca060e);
4250 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf52bfa40);
4251 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0ccb0507);
4252 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf179fc15);
4253 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0fe3027d);
4254 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef3fff25);
4255 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4256 break;
4257
4258 case 13000000:
4259 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
4260 cx25840_write4(client, DIF_BPF_COEFF23, 0x0005fff0);
4261 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff20034);
4262 cx25840_write4(client, DIF_BPF_COEFF67, 0x001bff85);
4263 cx25840_write4(client, DIF_BPF_COEFF89, 0xffdf00f0);
4264 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0014fe68);
4265 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00200272);
4266 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff71fc8b);
4267 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014d048d);
4268 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfd9afa61);
4269 cx25840_write4(client, DIF_BPF_COEFF2021, 0x03e00688);
4270 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfa4ef8da);
4271 cx25840_write4(client, DIF_BPF_COEFF2425, 0x07c80759);
4272 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf600f8f4);
4273 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0c2f0637);
4274 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf1dbfb22);
4275 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0fb4031b);
4276 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef4bfeef);
4277 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4278 break;
4279
4280 case 13100000:
4281 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0001);
4282 cx25840_write4(client, DIF_BPF_COEFF23, 0x0007fff5);
4283 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe70028);
4284 cx25840_write4(client, DIF_BPF_COEFF67, 0x0037ff98);
4285 cx25840_write4(client, DIF_BPF_COEFF89, 0xffa400d8);
4286 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0079fe7c);
4287 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff87026f);
4288 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0043fc6e);
4289 cx25840_write4(client, DIF_BPF_COEFF1617, 0x004404da);
4290 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfecef9da);
4291 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0294074e);
4292 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfb99f7db);
4293 cx25840_write4(client, DIF_BPF_COEFF2425, 0x06980881);
4294 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf6fef7be);
4295 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0b730759);
4296 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf251fa33);
4297 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0f7b03b8);
4298 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef5afeb8);
4299 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4300 break;
4301
4302 case 13200000:
4303 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0000);
4304 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008fffc);
4305 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe00017);
4306 cx25840_write4(client, DIF_BPF_COEFF67, 0x004cffb9);
4307 cx25840_write4(client, DIF_BPF_COEFF89, 0xff7500a8);
4308 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00d1feb6);
4309 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfef90238);
4310 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0111fc91);
4311 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff3604df);
4312 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0012f99b);
4313 cx25840_write4(client, DIF_BPF_COEFF2021, 0x012d07d2);
4314 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfd07f714);
4315 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0542097e);
4316 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf81ff6a4);
4317 cx25840_write4(client, DIF_BPF_COEFF2829, 0x0a9a086e);
4318 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf2dbf94b);
4319 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0f380453);
4320 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef6cfe82);
4321 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4322 break;
4323
4324 case 13300000:
4325 cx25840_write4(client, DIF_BPF_COEFF01, 0xffffffff);
4326 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080003);
4327 cx25840_write4(client, DIF_BPF_COEFF45, 0xffde0001);
4328 cx25840_write4(client, DIF_BPF_COEFF67, 0x0056ffe3);
4329 cx25840_write4(client, DIF_BPF_COEFF89, 0xff570064);
4330 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0113ff10);
4331 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe8201d2);
4332 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01cafcf0);
4333 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35049e);
4334 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0155f9a6);
4335 cx25840_write4(client, DIF_BPF_COEFF2021, 0xffba080e);
4336 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfe8cf689);
4337 cx25840_write4(client, DIF_BPF_COEFF2425, 0x03ce0a4e);
4338 cx25840_write4(client, DIF_BPF_COEFF2627, 0xf961f5a8);
4339 cx25840_write4(client, DIF_BPF_COEFF2829, 0x09a50971);
4340 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf379f869);
4341 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0eeb04ec);
4342 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef80fe4b);
4343 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4344 break;
4345
4346 case 13400000:
4347 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
4348 cx25840_write4(client, DIF_BPF_COEFF23, 0x0007000a);
4349 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe2ffec);
4350 cx25840_write4(client, DIF_BPF_COEFF67, 0x00540012);
4351 cx25840_write4(client, DIF_BPF_COEFF89, 0xff4e0015);
4352 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0137ff82);
4353 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe2e0145);
4354 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0260fd86);
4355 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51041a);
4356 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0287f9fb);
4357 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfe4a0802);
4358 cx25840_write4(client, DIF_BPF_COEFF2223, 0x001df63f);
4359 cx25840_write4(client, DIF_BPF_COEFF2425, 0x02430aeb);
4360 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfabdf4ce);
4361 cx25840_write4(client, DIF_BPF_COEFF2829, 0x08970a62);
4362 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf428f78f);
4363 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0e950584);
4364 cx25840_write4(client, DIF_BPF_COEFF3435, 0xef97fe15);
4365 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4366 break;
4367
4368 case 13500000:
4369 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4370 cx25840_write4(client, DIF_BPF_COEFF23, 0x0004000f);
4371 cx25840_write4(client, DIF_BPF_COEFF45, 0xffeaffda);
4372 cx25840_write4(client, DIF_BPF_COEFF67, 0x0046003d);
4373 cx25840_write4(client, DIF_BPF_COEFF89, 0xff5affc4);
4374 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013b0000);
4375 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe04009d);
4376 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02c8fe48);
4377 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99035a);
4378 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0397fa96);
4379 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfcec07ad);
4380 cx25840_write4(client, DIF_BPF_COEFF2223, 0x01adf637);
4381 cx25840_write4(client, DIF_BPF_COEFF2425, 0x00ac0b53);
4382 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfc2ef419);
4383 cx25840_write4(client, DIF_BPF_COEFF2829, 0x07730b3e);
4384 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf4e9f6bd);
4385 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0e35061a);
4386 cx25840_write4(client, DIF_BPF_COEFF3435, 0xefb1fddf);
4387 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4388 break;
4389
4390 case 13600000:
4391 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4392 cx25840_write4(client, DIF_BPF_COEFF23, 0x00000012);
4393 cx25840_write4(client, DIF_BPF_COEFF45, 0xfff6ffcd);
4394 cx25840_write4(client, DIF_BPF_COEFF67, 0x002f0061);
4395 cx25840_write4(client, DIF_BPF_COEFF89, 0xff7bff79);
4396 cx25840_write4(client, DIF_BPF_COEFF1011, 0x011e007e);
4397 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe08ffe8);
4398 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02f9ff28);
4399 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17026a);
4400 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0479fb70);
4401 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfbad0713);
4402 cx25840_write4(client, DIF_BPF_COEFF2223, 0x032ff672);
4403 cx25840_write4(client, DIF_BPF_COEFF2425, 0xff100b83);
4404 cx25840_write4(client, DIF_BPF_COEFF2627, 0xfdaff38b);
4405 cx25840_write4(client, DIF_BPF_COEFF2829, 0x063c0c04);
4406 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf5baf5f5);
4407 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0dcc06ae);
4408 cx25840_write4(client, DIF_BPF_COEFF3435, 0xefcdfda8);
4409 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4410 break;
4411
4412 case 13700000:
4413 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4414 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffd0012);
4415 cx25840_write4(client, DIF_BPF_COEFF45, 0x0004ffc8);
4416 cx25840_write4(client, DIF_BPF_COEFF67, 0x00100078);
4417 cx25840_write4(client, DIF_BPF_COEFF89, 0xffacff3e);
4418 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00e200f0);
4419 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe39ff35);
4420 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02f10017);
4421 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd30156);
4422 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0521fc7f);
4423 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfa9c0638);
4424 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0499f6ee);
4425 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfd7a0b7c);
4426 cx25840_write4(client, DIF_BPF_COEFF2627, 0xff39f325);
4427 cx25840_write4(client, DIF_BPF_COEFF2829, 0x04f40cb3);
4428 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf69af537);
4429 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0d5a073f);
4430 cx25840_write4(client, DIF_BPF_COEFF3435, 0xefecfd72);
4431 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4432 break;
4433
4434 case 13800000:
4435 cx25840_write4(client, DIF_BPF_COEFF01, 0x0001fffe);
4436 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffa000e);
4437 cx25840_write4(client, DIF_BPF_COEFF45, 0x0011ffcb);
4438 cx25840_write4(client, DIF_BPF_COEFF67, 0xfff0007f);
4439 cx25840_write4(client, DIF_BPF_COEFF89, 0xffe7ff19);
4440 cx25840_write4(client, DIF_BPF_COEFF1011, 0x008f014a);
4441 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe94fe93);
4442 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02b00105);
4443 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfbd3002f);
4444 cx25840_write4(client, DIF_BPF_COEFF1819, 0x0585fdb7);
4445 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf9c10525);
4446 cx25840_write4(client, DIF_BPF_COEFF2223, 0x05def7a8);
4447 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfbf20b3c);
4448 cx25840_write4(client, DIF_BPF_COEFF2627, 0x00c7f2e9);
4449 cx25840_write4(client, DIF_BPF_COEFF2829, 0x03a00d48);
4450 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf787f484);
4451 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0cdf07cd);
4452 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf00dfd3c);
4453 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4454 break;
4455
4456 case 13900000:
4457 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010000);
4458 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff80008);
4459 cx25840_write4(client, DIF_BPF_COEFF45, 0x001bffd7);
4460 cx25840_write4(client, DIF_BPF_COEFF67, 0xffd10076);
4461 cx25840_write4(client, DIF_BPF_COEFF89, 0x0026ff0e);
4462 cx25840_write4(client, DIF_BPF_COEFF1011, 0x002c0184);
4463 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff0ffe10);
4464 cx25840_write4(client, DIF_BPF_COEFF1415, 0x023b01e0);
4465 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc17ff06);
4466 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05a2ff09);
4467 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf92703e4);
4468 cx25840_write4(client, DIF_BPF_COEFF2223, 0x06f4f89b);
4469 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfa820ac5);
4470 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0251f2d9);
4471 cx25840_write4(client, DIF_BPF_COEFF2829, 0x02430dc3);
4472 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf881f3dc);
4473 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0c5c0859);
4474 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf031fd06);
4475 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4476 break;
4477
4478 case 14000000:
4479 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010001);
4480 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff80001);
4481 cx25840_write4(client, DIF_BPF_COEFF45, 0x0021ffe8);
4482 cx25840_write4(client, DIF_BPF_COEFF67, 0xffba005d);
4483 cx25840_write4(client, DIF_BPF_COEFF89, 0x0060ff1f);
4484 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffc40198);
4485 cx25840_write4(client, DIF_BPF_COEFF1213, 0xffa0fdb5);
4486 cx25840_write4(client, DIF_BPF_COEFF1415, 0x019a029a);
4487 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99fdea);
4488 cx25840_write4(client, DIF_BPF_COEFF1819, 0x05750067);
4489 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8d4027f);
4490 cx25840_write4(client, DIF_BPF_COEFF2223, 0x07d4f9c0);
4491 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf9320a1a);
4492 cx25840_write4(client, DIF_BPF_COEFF2627, 0x03d2f2f3);
4493 cx25840_write4(client, DIF_BPF_COEFF2829, 0x00df0e22);
4494 cx25840_write4(client, DIF_BPF_COEFF3031, 0xf986f341);
4495 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0bd108e2);
4496 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf058fcd1);
4497 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4498 break;
4499
4500 case 14100000:
4501 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
4502 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9fffa);
4503 cx25840_write4(client, DIF_BPF_COEFF45, 0x0021fffd);
4504 cx25840_write4(client, DIF_BPF_COEFF67, 0xffac0038);
4505 cx25840_write4(client, DIF_BPF_COEFF89, 0x008eff4a);
4506 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff630184);
4507 cx25840_write4(client, DIF_BPF_COEFF1213, 0x003afd8b);
4508 cx25840_write4(client, DIF_BPF_COEFF1415, 0x00da0326);
4509 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd51fced);
4510 cx25840_write4(client, DIF_BPF_COEFF1819, 0x050101c0);
4511 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf8cb0103);
4512 cx25840_write4(client, DIF_BPF_COEFF2223, 0x0876fb10);
4513 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf80a093e);
4514 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0543f338);
4515 cx25840_write4(client, DIF_BPF_COEFF2829, 0xff7a0e66);
4516 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfa94f2b2);
4517 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0b3f0967);
4518 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf081fc9b);
4519 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4520 break;
4521
4522 case 14200000:
4523 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4524 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffbfff3);
4525 cx25840_write4(client, DIF_BPF_COEFF45, 0x001d0013);
4526 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaa000b);
4527 cx25840_write4(client, DIF_BPF_COEFF89, 0x00aaff89);
4528 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff13014a);
4529 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00cefd95);
4530 cx25840_write4(client, DIF_BPF_COEFF1415, 0x000a037b);
4531 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe35fc1d);
4532 cx25840_write4(client, DIF_BPF_COEFF1819, 0x044c0305);
4533 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf90cff7e);
4534 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08d5fc81);
4535 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf7100834);
4536 cx25840_write4(client, DIF_BPF_COEFF2627, 0x069ff3a7);
4537 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfe160e8d);
4538 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfbaaf231);
4539 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0aa509e9);
4540 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf0adfc65);
4541 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4542 break;
4543
4544 case 14300000:
4545 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4546 cx25840_write4(client, DIF_BPF_COEFF23, 0xffffffef);
4547 cx25840_write4(client, DIF_BPF_COEFF45, 0x00140025);
4548 cx25840_write4(client, DIF_BPF_COEFF67, 0xffb4ffdd);
4549 cx25840_write4(client, DIF_BPF_COEFF89, 0x00b2ffd6);
4550 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfedb00f0);
4551 cx25840_write4(client, DIF_BPF_COEFF1213, 0x0150fdd3);
4552 cx25840_write4(client, DIF_BPF_COEFF1415, 0xff380391);
4553 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff36fb85);
4554 cx25840_write4(client, DIF_BPF_COEFF1819, 0x035e0426);
4555 cx25840_write4(client, DIF_BPF_COEFF2021, 0xf994fdfe);
4556 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08eefe0b);
4557 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf6490702);
4558 cx25840_write4(client, DIF_BPF_COEFF2627, 0x07e1f43e);
4559 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfcb60e97);
4560 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfcc6f1be);
4561 cx25840_write4(client, DIF_BPF_COEFF3233, 0x0a040a67);
4562 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf0dbfc30);
4563 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4564 break;
4565
4566 case 14400000:
4567 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4568 cx25840_write4(client, DIF_BPF_COEFF23, 0x0002ffee);
4569 cx25840_write4(client, DIF_BPF_COEFF45, 0x00070033);
4570 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc9ffb4);
4571 cx25840_write4(client, DIF_BPF_COEFF89, 0x00a40027);
4572 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfec3007e);
4573 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01b4fe3f);
4574 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe760369);
4575 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0044fb2e);
4576 cx25840_write4(client, DIF_BPF_COEFF1819, 0x02450518);
4577 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfa5ffc90);
4578 cx25840_write4(client, DIF_BPF_COEFF2223, 0x08c1ffa1);
4579 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf5bc05ae);
4580 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0902f4fc);
4581 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfb600e85);
4582 cx25840_write4(client, DIF_BPF_COEFF3031, 0xfde7f15a);
4583 cx25840_write4(client, DIF_BPF_COEFF3233, 0x095d0ae2);
4584 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf10cfbfb);
4585 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4586 break;
4587
4588 case 14500000:
4589 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0002);
4590 cx25840_write4(client, DIF_BPF_COEFF23, 0x0005ffef);
4591 cx25840_write4(client, DIF_BPF_COEFF45, 0xfffa0038);
4592 cx25840_write4(client, DIF_BPF_COEFF67, 0xffe5ff95);
4593 cx25840_write4(client, DIF_BPF_COEFF89, 0x00820074);
4594 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfecc0000);
4595 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01f0fed0);
4596 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfdd20304);
4597 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014dfb1d);
4598 cx25840_write4(client, DIF_BPF_COEFF1819, 0x010e05ce);
4599 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfb64fb41);
4600 cx25840_write4(client, DIF_BPF_COEFF2223, 0x084e013b);
4601 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf569043e);
4602 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0a00f5dd);
4603 cx25840_write4(client, DIF_BPF_COEFF2829, 0xfa150e55);
4604 cx25840_write4(client, DIF_BPF_COEFF3031, 0xff0bf104);
4605 cx25840_write4(client, DIF_BPF_COEFF3233, 0x08b00b59);
4606 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf13ffbc6);
4607 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4608 break;
4609
4610 case 14600000:
4611 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0001);
4612 cx25840_write4(client, DIF_BPF_COEFF23, 0x0008fff4);
4613 cx25840_write4(client, DIF_BPF_COEFF45, 0xffed0035);
4614 cx25840_write4(client, DIF_BPF_COEFF67, 0x0005ff83);
4615 cx25840_write4(client, DIF_BPF_COEFF89, 0x005000b4);
4616 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfef6ff82);
4617 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01ffff7a);
4618 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd580269);
4619 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0241fb53);
4620 cx25840_write4(client, DIF_BPF_COEFF1819, 0xffca0640);
4621 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfc99fa1e);
4622 cx25840_write4(client, DIF_BPF_COEFF2223, 0x079a02cb);
4623 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf55502ba);
4624 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0ad5f6e0);
4625 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf8d90e0a);
4626 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0031f0bd);
4627 cx25840_write4(client, DIF_BPF_COEFF3233, 0x07fd0bcb);
4628 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf174fb91);
4629 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4630 break;
4631
4632 case 14700000:
4633 cx25840_write4(client, DIF_BPF_COEFF01, 0xffffffff);
4634 cx25840_write4(client, DIF_BPF_COEFF23, 0x0009fffb);
4635 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe4002a);
4636 cx25840_write4(client, DIF_BPF_COEFF67, 0x0025ff82);
4637 cx25840_write4(client, DIF_BPF_COEFF89, 0x001400e0);
4638 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff3cff10);
4639 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01e10030);
4640 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd1201a4);
4641 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0311fbcd);
4642 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfe88066a);
4643 cx25840_write4(client, DIF_BPF_COEFF2021, 0xfdf1f92f);
4644 cx25840_write4(client, DIF_BPF_COEFF2223, 0x06aa0449);
4645 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf57e0128);
4646 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0b7ef801);
4647 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf7b00da2);
4648 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0156f086);
4649 cx25840_write4(client, DIF_BPF_COEFF3233, 0x07450c39);
4650 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf1acfb5c);
4651 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4652 break;
4653
4654 case 14800000:
4655 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffe);
4656 cx25840_write4(client, DIF_BPF_COEFF23, 0x00080002);
4657 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdf0019);
4658 cx25840_write4(client, DIF_BPF_COEFF67, 0x003fff92);
4659 cx25840_write4(client, DIF_BPF_COEFF89, 0xffd600f1);
4660 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff96feb6);
4661 cx25840_write4(client, DIF_BPF_COEFF1213, 0x019700e1);
4662 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd0500c2);
4663 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b0fc84);
4664 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfd590649);
4665 cx25840_write4(client, DIF_BPF_COEFF2021, 0xff5df87f);
4666 cx25840_write4(client, DIF_BPF_COEFF2223, 0x058505aa);
4667 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf5e4ff91);
4668 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0bf9f93c);
4669 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf69d0d20);
4670 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0279f05e);
4671 cx25840_write4(client, DIF_BPF_COEFF3233, 0x06880ca3);
4672 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf1e6fb28);
4673 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4674 break;
4675
4676 case 14900000:
4677 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4678 cx25840_write4(client, DIF_BPF_COEFF23, 0x00060009);
4679 cx25840_write4(client, DIF_BPF_COEFF45, 0xffdf0004);
4680 cx25840_write4(client, DIF_BPF_COEFF67, 0x0051ffb0);
4681 cx25840_write4(client, DIF_BPF_COEFF89, 0xff9d00e8);
4682 cx25840_write4(client, DIF_BPF_COEFF1011, 0xfffcfe7c);
4683 cx25840_write4(client, DIF_BPF_COEFF1213, 0x01280180);
4684 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd32ffd2);
4685 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0413fd6e);
4686 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfc4d05df);
4687 cx25840_write4(client, DIF_BPF_COEFF2021, 0x00d1f812);
4688 cx25840_write4(client, DIF_BPF_COEFF2223, 0x043506e4);
4689 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf685fdfb);
4690 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c43fa8d);
4691 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf5a10c83);
4692 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0399f046);
4693 cx25840_write4(client, DIF_BPF_COEFF3233, 0x05c70d08);
4694 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf222faf3);
4695 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4696 break;
4697
4698 case 15000000:
4699 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4700 cx25840_write4(client, DIF_BPF_COEFF23, 0x0003000f);
4701 cx25840_write4(client, DIF_BPF_COEFF45, 0xffe5ffef);
4702 cx25840_write4(client, DIF_BPF_COEFF67, 0x0057ffd9);
4703 cx25840_write4(client, DIF_BPF_COEFF89, 0xff7000c4);
4704 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0062fe68);
4705 cx25840_write4(client, DIF_BPF_COEFF1213, 0x009e01ff);
4706 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfd95fee6);
4707 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0435fe7d);
4708 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb710530);
4709 cx25840_write4(client, DIF_BPF_COEFF2021, 0x023cf7ee);
4710 cx25840_write4(client, DIF_BPF_COEFF2223, 0x02c307ef);
4711 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf75efc70);
4712 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c5cfbef);
4713 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf4c10bce);
4714 cx25840_write4(client, DIF_BPF_COEFF3031, 0x04b3f03f);
4715 cx25840_write4(client, DIF_BPF_COEFF3233, 0x05030d69);
4716 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf261fabf);
4717 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4718 break;
4719
4720 case 15100000:
4721 cx25840_write4(client, DIF_BPF_COEFF01, 0x0000fffd);
4722 cx25840_write4(client, DIF_BPF_COEFF23, 0xffff0012);
4723 cx25840_write4(client, DIF_BPF_COEFF45, 0xffefffdc);
4724 cx25840_write4(client, DIF_BPF_COEFF67, 0x00510006);
4725 cx25840_write4(client, DIF_BPF_COEFF89, 0xff540089);
4726 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00befe7c);
4727 cx25840_write4(client, DIF_BPF_COEFF1213, 0x00060253);
4728 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfe27fe0d);
4729 cx25840_write4(client, DIF_BPF_COEFF1617, 0x0413ffa2);
4730 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfad10446);
4731 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0390f812);
4732 cx25840_write4(client, DIF_BPF_COEFF2223, 0x013b08c3);
4733 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf868faf6);
4734 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0c43fd5f);
4735 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf3fd0b02);
4736 cx25840_write4(client, DIF_BPF_COEFF3031, 0x05c7f046);
4737 cx25840_write4(client, DIF_BPF_COEFF3233, 0x043b0dc4);
4738 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf2a1fa8b);
4739 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4740 break;
4741
4742 case 15200000:
4743 cx25840_write4(client, DIF_BPF_COEFF01, 0x0001fffe);
4744 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffc0012);
4745 cx25840_write4(client, DIF_BPF_COEFF45, 0xfffbffce);
4746 cx25840_write4(client, DIF_BPF_COEFF67, 0x003f0033);
4747 cx25840_write4(client, DIF_BPF_COEFF89, 0xff4e003f);
4748 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0106feb6);
4749 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff6e0276);
4750 cx25840_write4(client, DIF_BPF_COEFF1415, 0xfeddfd56);
4751 cx25840_write4(client, DIF_BPF_COEFF1617, 0x03b000cc);
4752 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa740329);
4753 cx25840_write4(client, DIF_BPF_COEFF2021, 0x04bff87f);
4754 cx25840_write4(client, DIF_BPF_COEFF2223, 0xffaa095d);
4755 cx25840_write4(client, DIF_BPF_COEFF2425, 0xf99ef995);
4756 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0bf9fed8);
4757 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf3590a1f);
4758 cx25840_write4(client, DIF_BPF_COEFF3031, 0x06d2f05e);
4759 cx25840_write4(client, DIF_BPF_COEFF3233, 0x03700e1b);
4760 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf2e4fa58);
4761 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4762 break;
4763
4764 case 15300000:
4765 cx25840_write4(client, DIF_BPF_COEFF01, 0x0001ffff);
4766 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9000f);
4767 cx25840_write4(client, DIF_BPF_COEFF45, 0x0009ffc8);
4768 cx25840_write4(client, DIF_BPF_COEFF67, 0x00250059);
4769 cx25840_write4(client, DIF_BPF_COEFF89, 0xff5effee);
4770 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0132ff10);
4771 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfee30265);
4772 cx25840_write4(client, DIF_BPF_COEFF1415, 0xffaafccf);
4773 cx25840_write4(client, DIF_BPF_COEFF1617, 0x031101eb);
4774 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa6001e8);
4775 cx25840_write4(client, DIF_BPF_COEFF2021, 0x05bdf92f);
4776 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfe1b09b6);
4777 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfafaf852);
4778 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0b7e0055);
4779 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2d50929);
4780 cx25840_write4(client, DIF_BPF_COEFF3031, 0x07d3f086);
4781 cx25840_write4(client, DIF_BPF_COEFF3233, 0x02a30e6c);
4782 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf329fa24);
4783 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4784 break;
4785
4786 case 15400000:
4787 cx25840_write4(client, DIF_BPF_COEFF01, 0x00010001);
4788 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff80009);
4789 cx25840_write4(client, DIF_BPF_COEFF45, 0x0015ffca);
4790 cx25840_write4(client, DIF_BPF_COEFF67, 0x00050074);
4791 cx25840_write4(client, DIF_BPF_COEFF89, 0xff81ff9f);
4792 cx25840_write4(client, DIF_BPF_COEFF1011, 0x013dff82);
4793 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe710221);
4794 cx25840_write4(client, DIF_BPF_COEFF1415, 0x007cfc80);
4795 cx25840_write4(client, DIF_BPF_COEFF1617, 0x024102ed);
4796 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfa940090);
4797 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0680fa1e);
4798 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfc9b09cd);
4799 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfc73f736);
4800 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0ad501d0);
4801 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2740820);
4802 cx25840_write4(client, DIF_BPF_COEFF3031, 0x08c9f0bd);
4803 cx25840_write4(client, DIF_BPF_COEFF3233, 0x01d40eb9);
4804 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf371f9f1);
4805 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4806 break;
4807
4808 case 15500000:
4809 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000002);
4810 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff80002);
4811 cx25840_write4(client, DIF_BPF_COEFF45, 0x001effd5);
4812 cx25840_write4(client, DIF_BPF_COEFF67, 0xffe5007f);
4813 cx25840_write4(client, DIF_BPF_COEFF89, 0xffb4ff5b);
4814 cx25840_write4(client, DIF_BPF_COEFF1011, 0x01280000);
4815 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe2401b0);
4816 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0146fc70);
4817 cx25840_write4(client, DIF_BPF_COEFF1617, 0x014d03c6);
4818 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfb10ff32);
4819 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0701fb41);
4820 cx25840_write4(client, DIF_BPF_COEFF2223, 0xfb3709a1);
4821 cx25840_write4(client, DIF_BPF_COEFF2425, 0xfe00f644);
4822 cx25840_write4(client, DIF_BPF_COEFF2627, 0x0a000345);
4823 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2350708);
4824 cx25840_write4(client, DIF_BPF_COEFF3031, 0x09b2f104);
4825 cx25840_write4(client, DIF_BPF_COEFF3233, 0x01050eff);
4826 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf3baf9be);
4827 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4828 break;
4829
4830 case 15600000:
4831 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4832 cx25840_write4(client, DIF_BPF_COEFF23, 0xfff9fffb);
4833 cx25840_write4(client, DIF_BPF_COEFF45, 0x0022ffe6);
4834 cx25840_write4(client, DIF_BPF_COEFF67, 0xffc9007a);
4835 cx25840_write4(client, DIF_BPF_COEFF89, 0xfff0ff29);
4836 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00f2007e);
4837 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe01011b);
4838 cx25840_write4(client, DIF_BPF_COEFF1415, 0x01f6fc9e);
4839 cx25840_write4(client, DIF_BPF_COEFF1617, 0x00440467);
4840 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfbccfdde);
4841 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0738fc90);
4842 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf9f70934);
4843 cx25840_write4(client, DIF_BPF_COEFF2425, 0xff99f582);
4844 cx25840_write4(client, DIF_BPF_COEFF2627, 0x090204b0);
4845 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf21a05e1);
4846 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0a8df15a);
4847 cx25840_write4(client, DIF_BPF_COEFF3233, 0x00340f41);
4848 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf405f98b);
4849 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4850 break;
4851
4852 case 15700000:
4853 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4854 cx25840_write4(client, DIF_BPF_COEFF23, 0xfffcfff4);
4855 cx25840_write4(client, DIF_BPF_COEFF45, 0x0020fffa);
4856 cx25840_write4(client, DIF_BPF_COEFF67, 0xffb40064);
4857 cx25840_write4(client, DIF_BPF_COEFF89, 0x002fff11);
4858 cx25840_write4(client, DIF_BPF_COEFF1011, 0x00a400f0);
4859 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe0d006e);
4860 cx25840_write4(client, DIF_BPF_COEFF1415, 0x0281fd09);
4861 cx25840_write4(client, DIF_BPF_COEFF1617, 0xff3604c9);
4862 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfcbffca2);
4863 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0726fdfe);
4864 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf8e80888);
4865 cx25840_write4(client, DIF_BPF_COEFF2425, 0x0134f4f3);
4866 cx25840_write4(client, DIF_BPF_COEFF2627, 0x07e1060c);
4867 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf22304af);
4868 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0b59f1be);
4869 cx25840_write4(client, DIF_BPF_COEFF3233, 0xff640f7d);
4870 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf452f959);
4871 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4872 break;
4873
4874 case 15800000:
4875 cx25840_write4(client, DIF_BPF_COEFF01, 0x00000003);
4876 cx25840_write4(client, DIF_BPF_COEFF23, 0x0000fff0);
4877 cx25840_write4(client, DIF_BPF_COEFF45, 0x001a0010);
4878 cx25840_write4(client, DIF_BPF_COEFF67, 0xffaa0041);
4879 cx25840_write4(client, DIF_BPF_COEFF89, 0x0067ff13);
4880 cx25840_write4(client, DIF_BPF_COEFF1011, 0x0043014a);
4881 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfe46ffb9);
4882 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02dbfda8);
4883 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfe3504e5);
4884 cx25840_write4(client, DIF_BPF_COEFF1819, 0xfddcfb8d);
4885 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06c9ff7e);
4886 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf81107a2);
4887 cx25840_write4(client, DIF_BPF_COEFF2425, 0x02c9f49a);
4888 cx25840_write4(client, DIF_BPF_COEFF2627, 0x069f0753);
4889 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2500373);
4890 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0c14f231);
4891 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfe930fb3);
4892 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf4a1f927);
4893 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4894 break;
4895
4896 case 15900000:
4897 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0002);
4898 cx25840_write4(client, DIF_BPF_COEFF23, 0x0003ffee);
4899 cx25840_write4(client, DIF_BPF_COEFF45, 0x000f0023);
4900 cx25840_write4(client, DIF_BPF_COEFF67, 0xffac0016);
4901 cx25840_write4(client, DIF_BPF_COEFF89, 0x0093ff31);
4902 cx25840_write4(client, DIF_BPF_COEFF1011, 0xffdc0184);
4903 cx25840_write4(client, DIF_BPF_COEFF1213, 0xfea6ff09);
4904 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02fdfe70);
4905 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfd5104ba);
4906 cx25840_write4(client, DIF_BPF_COEFF1819, 0xff15faac);
4907 cx25840_write4(client, DIF_BPF_COEFF2021, 0x06270103);
4908 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7780688);
4909 cx25840_write4(client, DIF_BPF_COEFF2425, 0x044df479);
4910 cx25840_write4(client, DIF_BPF_COEFF2627, 0x05430883);
4911 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf2a00231);
4912 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0cbef2b2);
4913 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfdc40fe3);
4914 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf4f2f8f5);
4915 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4916 break;
4917
4918 case 16000000:
4919 cx25840_write4(client, DIF_BPF_COEFF01, 0xffff0001);
4920 cx25840_write4(client, DIF_BPF_COEFF23, 0x0006ffef);
4921 cx25840_write4(client, DIF_BPF_COEFF45, 0x00020031);
4922 cx25840_write4(client, DIF_BPF_COEFF67, 0xffbaffe8);
4923 cx25840_write4(client, DIF_BPF_COEFF89, 0x00adff66);
4924 cx25840_write4(client, DIF_BPF_COEFF1011, 0xff790198);
4925 cx25840_write4(client, DIF_BPF_COEFF1213, 0xff26fe6e);
4926 cx25840_write4(client, DIF_BPF_COEFF1415, 0x02e5ff55);
4927 cx25840_write4(client, DIF_BPF_COEFF1617, 0xfc99044a);
4928 cx25840_write4(client, DIF_BPF_COEFF1819, 0x005bfa09);
4929 cx25840_write4(client, DIF_BPF_COEFF2021, 0x0545027f);
4930 cx25840_write4(client, DIF_BPF_COEFF2223, 0xf7230541);
4931 cx25840_write4(client, DIF_BPF_COEFF2425, 0x05b8f490);
4932 cx25840_write4(client, DIF_BPF_COEFF2627, 0x03d20997);
4933 cx25840_write4(client, DIF_BPF_COEFF2829, 0xf31300eb);
4934 cx25840_write4(client, DIF_BPF_COEFF3031, 0x0d55f341);
4935 cx25840_write4(client, DIF_BPF_COEFF3233, 0xfcf6100e);
4936 cx25840_write4(client, DIF_BPF_COEFF3435, 0xf544f8c3);
4937 cx25840_write4(client, DIF_BPF_COEFF36, 0x110d0000);
4938 break;
4939 }
4940}
4941
4942static void cx23885_std_setup(struct i2c_client *client)
4943{
4944 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
4945 v4l2_std_id std = state->std;
4946 u32 ifHz;
4947
4948 cx25840_write4(client, 0x478, 0x6628021F);
4949 cx25840_write4(client, 0x400, 0x0);
4950 cx25840_write4(client, 0x4b4, 0x20524030);
4951 cx25840_write4(client, 0x47c, 0x010a8263);
4952
4953 if (std & V4L2_STD_NTSC) {
4954 v4l_dbg(1, cx25840_debug, client, "%s() Selecting NTSC",
4955 __func__);
4956
4957 /* Horiz / vert timing */
4958 cx25840_write4(client, 0x428, 0x1e1e601a);
4959 cx25840_write4(client, 0x424, 0x5b2d007a);
4960
4961 /* DIF NTSC */
4962 cx25840_write4(client, 0x304, 0x6503bc0c);
4963 cx25840_write4(client, 0x308, 0xbd038c85);
4964 cx25840_write4(client, 0x30c, 0x1db4640a);
4965 cx25840_write4(client, 0x310, 0x00008800);
4966 cx25840_write4(client, 0x314, 0x44400400);
4967 cx25840_write4(client, 0x32c, 0x0c800800);
4968 cx25840_write4(client, 0x330, 0x27000100);
4969 cx25840_write4(client, 0x334, 0x1f296e1f);
4970 cx25840_write4(client, 0x338, 0x009f50c1);
4971 cx25840_write4(client, 0x340, 0x1befbf06);
4972 cx25840_write4(client, 0x344, 0x000035e8);
4973
4974 /* DIF I/F */
4975 ifHz = 5400000;
4976
4977 } else {
4978 v4l_dbg(1, cx25840_debug, client, "%s() Selecting PAL-BG",
4979 __func__);
4980
4981 /* Horiz / vert timing */
4982 cx25840_write4(client, 0x428, 0x28244024);
4983 cx25840_write4(client, 0x424, 0x5d2d0084);
4984
4985 /* DIF */
4986 cx25840_write4(client, 0x304, 0x6503bc0c);
4987 cx25840_write4(client, 0x308, 0xbd038c85);
4988 cx25840_write4(client, 0x30c, 0x1db4640a);
4989 cx25840_write4(client, 0x310, 0x00008800);
4990 cx25840_write4(client, 0x314, 0x44400600);
4991 cx25840_write4(client, 0x32c, 0x0c800800);
4992 cx25840_write4(client, 0x330, 0x27000100);
4993 cx25840_write4(client, 0x334, 0x213530ec);
4994 cx25840_write4(client, 0x338, 0x00a65ba8);
4995 cx25840_write4(client, 0x340, 0x1befbf06);
4996 cx25840_write4(client, 0x344, 0x000035e8);
4997
4998 /* DIF I/F */
4999 ifHz = 6000000;
5000 }
5001
5002 cx23885_dif_setup(client, ifHz);
5003
5004 /* Explicitly ensure the inputs are reconfigured after
5005 * a standard change.
5006 */
5007 set_input(client, state->vid_input, state->aud_input);
5008}
5009
5010/* ----------------------------------------------------------------------- */
5011
1789static const struct v4l2_ctrl_ops cx25840_ctrl_ops = { 5012static const struct v4l2_ctrl_ops cx25840_ctrl_ops = {
1790 .s_ctrl = cx25840_s_ctrl, 5013 .s_ctrl = cx25840_s_ctrl,
1791}; 5014};
@@ -1801,6 +5024,7 @@ static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1801 .queryctrl = v4l2_subdev_queryctrl, 5024 .queryctrl = v4l2_subdev_queryctrl,
1802 .querymenu = v4l2_subdev_querymenu, 5025 .querymenu = v4l2_subdev_querymenu,
1803 .s_std = cx25840_s_std, 5026 .s_std = cx25840_s_std,
5027 .g_std = cx25840_g_std,
1804 .reset = cx25840_reset, 5028 .reset = cx25840_reset,
1805 .load_fw = cx25840_load_fw, 5029 .load_fw = cx25840_load_fw,
1806 .s_io_pin_config = common_s_io_pin_config, 5030 .s_io_pin_config = common_s_io_pin_config,
@@ -1828,6 +5052,7 @@ static const struct v4l2_subdev_video_ops cx25840_video_ops = {
1828 .s_routing = cx25840_s_video_routing, 5052 .s_routing = cx25840_s_video_routing,
1829 .s_mbus_fmt = cx25840_s_mbus_fmt, 5053 .s_mbus_fmt = cx25840_s_mbus_fmt,
1830 .s_stream = cx25840_s_stream, 5054 .s_stream = cx25840_s_stream,
5055 .g_input_status = cx25840_g_input_status,
1831}; 5056};
1832 5057
1833static const struct v4l2_subdev_vbi_ops cx25840_vbi_ops = { 5058static const struct v4l2_subdev_vbi_ops cx25840_vbi_ops = {
diff --git a/drivers/media/video/cx88/Kconfig b/drivers/media/video/cx88/Kconfig
index 5c42abdf422..3598dc087b0 100644
--- a/drivers/media/video/cx88/Kconfig
+++ b/drivers/media/video/cx88/Kconfig
@@ -70,11 +70,6 @@ config VIDEO_CX88_DVB
70 To compile this driver as a module, choose M here: the 70 To compile this driver as a module, choose M here: the
71 module will be called cx88-dvb. 71 module will be called cx88-dvb.
72 72
73config VIDEO_CX88_MPEG
74 tristate
75 depends on VIDEO_CX88_DVB || VIDEO_CX88_BLACKBIRD
76 default y
77
78config VIDEO_CX88_VP3054 73config VIDEO_CX88_VP3054
79 tristate "VP-3054 Secondary I2C Bus Support" 74 tristate "VP-3054 Secondary I2C Bus Support"
80 default m 75 default m
@@ -84,3 +79,8 @@ config VIDEO_CX88_VP3054
84 Conexant 2388x chip and the MT352 demodulator, 79 Conexant 2388x chip and the MT352 demodulator,
85 which also require support for the VP-3054 80 which also require support for the VP-3054
86 Secondary I2C bus, such at DNTV Live! DVB-T Pro. 81 Secondary I2C bus, such at DNTV Live! DVB-T Pro.
82
83config VIDEO_CX88_MPEG
84 tristate
85 depends on VIDEO_CX88_DVB || VIDEO_CX88_BLACKBIRD
86 default y
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index 0d719faafd8..62c7ad050f9 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -1306,7 +1306,7 @@ static const struct cx88_board cx88_boards[] = {
1306 }, 1306 },
1307 [CX88_BOARD_WINFAST_DTV2000H_J] = { 1307 [CX88_BOARD_WINFAST_DTV2000H_J] = {
1308 .name = "WinFast DTV2000 H rev. J", 1308 .name = "WinFast DTV2000 H rev. J",
1309 .tuner_type = TUNER_PHILIPS_FMD1216ME_MK3, 1309 .tuner_type = TUNER_PHILIPS_FMD1216MEX_MK3,
1310 .radio_type = UNSET, 1310 .radio_type = UNSET,
1311 .tuner_addr = ADDR_UNSET, 1311 .tuner_addr = ADDR_UNSET,
1312 .radio_addr = ADDR_UNSET, 1312 .radio_addr = ADDR_UNSET,
@@ -1643,6 +1643,78 @@ static const struct cx88_board cx88_boards[] = {
1643 .gpio3 = 0x0000, 1643 .gpio3 = 0x0000,
1644 }, 1644 },
1645 }, 1645 },
1646 [CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36] = {
1647 .name = "Leadtek TV2000 XP Global (SC4100)",
1648 .tuner_type = TUNER_XC4000,
1649 .tuner_addr = 0x61,
1650 .radio_type = UNSET,
1651 .radio_addr = ADDR_UNSET,
1652 .input = { {
1653 .type = CX88_VMUX_TELEVISION,
1654 .vmux = 0,
1655 .gpio0 = 0x0400, /* pin 2 = 0 */
1656 .gpio1 = 0x0000,
1657 .gpio2 = 0x0C04, /* pin 18 = 1, pin 19 = 0 */
1658 .gpio3 = 0x0000,
1659 }, {
1660 .type = CX88_VMUX_COMPOSITE1,
1661 .vmux = 1,
1662 .gpio0 = 0x0400, /* pin 2 = 0 */
1663 .gpio1 = 0x0000,
1664 .gpio2 = 0x0C0C, /* pin 18 = 1, pin 19 = 1 */
1665 .gpio3 = 0x0000,
1666 }, {
1667 .type = CX88_VMUX_SVIDEO,
1668 .vmux = 2,
1669 .gpio0 = 0x0400, /* pin 2 = 0 */
1670 .gpio1 = 0x0000,
1671 .gpio2 = 0x0C0C, /* pin 18 = 1, pin 19 = 1 */
1672 .gpio3 = 0x0000,
1673 } },
1674 .radio = {
1675 .type = CX88_RADIO,
1676 .gpio0 = 0x0400, /* pin 2 = 0 */
1677 .gpio1 = 0x0000,
1678 .gpio2 = 0x0C00, /* pin 18 = 0, pin 19 = 0 */
1679 .gpio3 = 0x0000,
1680 },
1681 },
1682 [CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43] = {
1683 .name = "Leadtek TV2000 XP Global (XC4100)",
1684 .tuner_type = TUNER_XC4000,
1685 .tuner_addr = 0x61,
1686 .radio_type = UNSET,
1687 .radio_addr = ADDR_UNSET,
1688 .input = { {
1689 .type = CX88_VMUX_TELEVISION,
1690 .vmux = 0,
1691 .gpio0 = 0x0400, /* pin 2 = 0 */
1692 .gpio1 = 0x6040, /* pin 14 = 1, pin 13 = 0 */
1693 .gpio2 = 0x0000,
1694 .gpio3 = 0x0000,
1695 }, {
1696 .type = CX88_VMUX_COMPOSITE1,
1697 .vmux = 1,
1698 .gpio0 = 0x0400, /* pin 2 = 0 */
1699 .gpio1 = 0x6060, /* pin 14 = 1, pin 13 = 1 */
1700 .gpio2 = 0x0000,
1701 .gpio3 = 0x0000,
1702 }, {
1703 .type = CX88_VMUX_SVIDEO,
1704 .vmux = 2,
1705 .gpio0 = 0x0400, /* pin 2 = 0 */
1706 .gpio1 = 0x6060, /* pin 14 = 1, pin 13 = 1 */
1707 .gpio2 = 0x0000,
1708 .gpio3 = 0x0000,
1709 } },
1710 .radio = {
1711 .type = CX88_RADIO,
1712 .gpio0 = 0x0400, /* pin 2 = 0 */
1713 .gpio1 = 0x6000, /* pin 14 = 1, pin 13 = 0 */
1714 .gpio2 = 0x0000,
1715 .gpio3 = 0x0000,
1716 },
1717 },
1646 [CX88_BOARD_POWERCOLOR_REAL_ANGEL] = { 1718 [CX88_BOARD_POWERCOLOR_REAL_ANGEL] = {
1647 .name = "PowerColor RA330", /* Long names may confuse LIRC. */ 1719 .name = "PowerColor RA330", /* Long names may confuse LIRC. */
1648 .tuner_type = TUNER_XC2028, 1720 .tuner_type = TUNER_XC2028,
@@ -2719,6 +2791,21 @@ static const struct cx88_subid cx88_subids[] = {
2719 .subdevice = 0x6618, 2791 .subdevice = 0x6618,
2720 .card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL, 2792 .card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL,
2721 }, { 2793 }, {
2794 /* TV2000 XP Global [107d:6618] */
2795 .subvendor = 0x107d,
2796 .subdevice = 0x6619,
2797 .card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL,
2798 }, {
2799 /* WinFast TV2000 XP Global with XC4000 tuner */
2800 .subvendor = 0x107d,
2801 .subdevice = 0x6f36,
2802 .card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36,
2803 }, {
2804 /* WinFast TV2000 XP Global with XC4000 tuner and different GPIOs */
2805 .subvendor = 0x107d,
2806 .subdevice = 0x6f43,
2807 .card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43,
2808 }, {
2722 .subvendor = 0xb034, 2809 .subvendor = 0xb034,
2723 .subdevice = 0x3034, 2810 .subdevice = 0x3034,
2724 .card = CX88_BOARD_PROF_7301, 2811 .card = CX88_BOARD_PROF_7301,
@@ -3075,6 +3162,8 @@ static int cx88_xc4000_tuner_callback(struct cx88_core *core,
3075 switch (core->boardnr) { 3162 switch (core->boardnr) {
3076 case CX88_BOARD_WINFAST_DTV1800H_XC4000: 3163 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
3077 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 3164 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
3165 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36:
3166 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43:
3078 return cx88_xc4000_winfast2000h_plus_callback(core, 3167 return cx88_xc4000_winfast2000h_plus_callback(core,
3079 command, arg); 3168 command, arg);
3080 } 3169 }
@@ -3232,6 +3321,7 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
3232 cx_set(MO_GP0_IO, 0x00001010); 3321 cx_set(MO_GP0_IO, 0x00001010);
3233 break; 3322 break;
3234 3323
3324 case CX88_BOARD_WINFAST_DTV2000H_J:
3235 case CX88_BOARD_HAUPPAUGE_HVR3000: 3325 case CX88_BOARD_HAUPPAUGE_HVR3000:
3236 case CX88_BOARD_HAUPPAUGE_HVR4000: 3326 case CX88_BOARD_HAUPPAUGE_HVR4000:
3237 /* Init GPIO */ 3327 /* Init GPIO */
@@ -3250,6 +3340,8 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
3250 3340
3251 case CX88_BOARD_WINFAST_DTV1800H_XC4000: 3341 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
3252 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 3342 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
3343 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36:
3344 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43:
3253 cx88_xc4000_winfast2000h_plus_callback(core, 3345 cx88_xc4000_winfast2000h_plus_callback(core,
3254 XC4000_TUNER_RESET, 0); 3346 XC4000_TUNER_RESET, 0);
3255 break; 3347 break;
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index cf3d33ab541..003937cd72f 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -815,9 +815,9 @@ static const u8 samsung_smt_7020_inittab[] = {
815}; 815};
816 816
817 817
818static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe, 818static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
819 struct dvb_frontend_parameters *params)
820{ 819{
820 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
821 struct cx8802_dev *dev = fe->dvb->priv; 821 struct cx8802_dev *dev = fe->dvb->priv;
822 u8 buf[4]; 822 u8 buf[4];
823 u32 div; 823 u32 div;
@@ -827,14 +827,14 @@ static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
827 .buf = buf, 827 .buf = buf,
828 .len = sizeof(buf) }; 828 .len = sizeof(buf) };
829 829
830 div = params->frequency / 125; 830 div = c->frequency / 125;
831 831
832 buf[0] = (div >> 8) & 0x7f; 832 buf[0] = (div >> 8) & 0x7f;
833 buf[1] = div & 0xff; 833 buf[1] = div & 0xff;
834 buf[2] = 0x84; /* 0xC4 */ 834 buf[2] = 0x84; /* 0xC4 */
835 buf[3] = 0x00; 835 buf[3] = 0x00;
836 836
837 if (params->frequency < 1500000) 837 if (c->frequency < 1500000)
838 buf[3] |= 0x10; 838 buf[3] |= 0x10;
839 839
840 if (fe->ops.i2c_gate_ctrl) 840 if (fe->ops.i2c_gate_ctrl)
@@ -954,6 +954,7 @@ static int dvb_register(struct cx8802_dev *dev)
954 struct cx88_core *core = dev->core; 954 struct cx88_core *core = dev->core;
955 struct videobuf_dvb_frontend *fe0, *fe1 = NULL; 955 struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
956 int mfe_shared = 0; /* bus not shared by default */ 956 int mfe_shared = 0; /* bus not shared by default */
957 int res = -EINVAL;
957 958
958 if (0 != core->i2c_rc) { 959 if (0 != core->i2c_rc) {
959 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name); 960 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
@@ -999,7 +1000,6 @@ static int dvb_register(struct cx8802_dev *dev)
999 } 1000 }
1000 break; 1001 break;
1001 case CX88_BOARD_WINFAST_DTV2000H: 1002 case CX88_BOARD_WINFAST_DTV2000H:
1002 case CX88_BOARD_WINFAST_DTV2000H_J:
1003 case CX88_BOARD_HAUPPAUGE_HVR1100: 1003 case CX88_BOARD_HAUPPAUGE_HVR1100:
1004 case CX88_BOARD_HAUPPAUGE_HVR1100LP: 1004 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1005 case CX88_BOARD_HAUPPAUGE_HVR1300: 1005 case CX88_BOARD_HAUPPAUGE_HVR1300:
@@ -1013,6 +1013,17 @@ static int dvb_register(struct cx8802_dev *dev)
1013 goto frontend_detach; 1013 goto frontend_detach;
1014 } 1014 }
1015 break; 1015 break;
1016 case CX88_BOARD_WINFAST_DTV2000H_J:
1017 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1018 &hauppauge_hvr_config,
1019 &core->i2c_adap);
1020 if (fe0->dvb.frontend != NULL) {
1021 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1022 &core->i2c_adap, 0x61,
1023 TUNER_PHILIPS_FMD1216MEX_MK3))
1024 goto frontend_detach;
1025 }
1026 break;
1016 case CX88_BOARD_HAUPPAUGE_HVR3000: 1027 case CX88_BOARD_HAUPPAUGE_HVR3000:
1017 /* MFE frontend 1 */ 1028 /* MFE frontend 1 */
1018 mfe_shared = 1; 1029 mfe_shared = 1;
@@ -1566,13 +1577,16 @@ static int dvb_register(struct cx8802_dev *dev)
1566 call_all(core, core, s_power, 0); 1577 call_all(core, core, s_power, 0);
1567 1578
1568 /* register everything */ 1579 /* register everything */
1569 return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, 1580 res = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1570 &dev->pci->dev, adapter_nr, mfe_shared, NULL); 1581 &dev->pci->dev, adapter_nr, mfe_shared, NULL);
1582 if (res)
1583 goto frontend_detach;
1584 return res;
1571 1585
1572frontend_detach: 1586frontend_detach:
1573 core->gate_ctrl = NULL; 1587 core->gate_ctrl = NULL;
1574 videobuf_dvb_dealloc_frontends(&dev->frontends); 1588 videobuf_dvb_dealloc_frontends(&dev->frontends);
1575 return -EINVAL; 1589 return res;
1576} 1590}
1577 1591
1578/* ----------------------------------------------------------- */ 1592/* ----------------------------------------------------------- */
diff --git a/drivers/media/video/cx88/cx88-i2c.c b/drivers/media/video/cx88/cx88-i2c.c
index a1fe0abb6e4..de0f1af74e4 100644
--- a/drivers/media/video/cx88/cx88-i2c.c
+++ b/drivers/media/video/cx88/cx88-i2c.c
@@ -132,7 +132,7 @@ static void do_i2c_scan(const char *name, struct i2c_client *c)
132 } 132 }
133} 133}
134 134
135/* init + register i2c algo-bit adapter */ 135/* init + register i2c adapter */
136int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci) 136int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci)
137{ 137{
138 /* Prevents usage of invalid delay values */ 138 /* Prevents usage of invalid delay values */
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c
index e614201b5ed..ebf448c48ca 100644
--- a/drivers/media/video/cx88/cx88-input.c
+++ b/drivers/media/video/cx88/cx88-input.c
@@ -103,6 +103,8 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
103 case CX88_BOARD_WINFAST_DTV1800H_XC4000: 103 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
104 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 104 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
105 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: 105 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
106 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36:
107 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43:
106 gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900); 108 gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900);
107 auxgpio = gpio; 109 auxgpio = gpio;
108 break; 110 break;
@@ -302,6 +304,8 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
302 case CX88_BOARD_WINFAST2000XP_EXPERT: 304 case CX88_BOARD_WINFAST2000XP_EXPERT:
303 case CX88_BOARD_WINFAST_DTV1000: 305 case CX88_BOARD_WINFAST_DTV1000:
304 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: 306 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
307 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36:
308 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43:
305 ir_codes = RC_MAP_WINFAST; 309 ir_codes = RC_MAP_WINFAST;
306 ir->gpio_addr = MO_GP0_IO; 310 ir->gpio_addr = MO_GP0_IO;
307 ir->mask_keycode = 0x8f8; 311 ir->mask_keycode = 0x8f8;
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index fa8d307e1a3..c9659def2a7 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -244,6 +244,8 @@ extern const struct sram_channel const cx88_sram_channels[];
244#define CX88_BOARD_TEVII_S464 86 244#define CX88_BOARD_TEVII_S464 86
245#define CX88_BOARD_WINFAST_DTV2000H_PLUS 87 245#define CX88_BOARD_WINFAST_DTV2000H_PLUS 87
246#define CX88_BOARD_WINFAST_DTV1800H_XC4000 88 246#define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
247#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
248#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
247 249
248enum cx88_itype { 250enum cx88_itype {
249 CX88_VMUX_COMPOSITE1 = 1, 251 CX88_VMUX_COMPOSITE1 = 1,
diff --git a/drivers/media/video/davinci/dm355_ccdc.c b/drivers/media/video/davinci/dm355_ccdc.c
index bd443ee76ff..f83baf3a52b 100644
--- a/drivers/media/video/davinci/dm355_ccdc.c
+++ b/drivers/media/video/davinci/dm355_ccdc.c
@@ -1069,15 +1069,4 @@ static struct platform_driver dm355_ccdc_driver = {
1069 .probe = dm355_ccdc_probe, 1069 .probe = dm355_ccdc_probe,
1070}; 1070};
1071 1071
1072static int __init dm355_ccdc_init(void) 1072module_platform_driver(dm355_ccdc_driver);
1073{
1074 return platform_driver_register(&dm355_ccdc_driver);
1075}
1076
1077static void __exit dm355_ccdc_exit(void)
1078{
1079 platform_driver_unregister(&dm355_ccdc_driver);
1080}
1081
1082module_init(dm355_ccdc_init);
1083module_exit(dm355_ccdc_exit);
diff --git a/drivers/media/video/davinci/dm644x_ccdc.c b/drivers/media/video/davinci/dm644x_ccdc.c
index 8051c295647..9303fe553b0 100644
--- a/drivers/media/video/davinci/dm644x_ccdc.c
+++ b/drivers/media/video/davinci/dm644x_ccdc.c
@@ -1078,15 +1078,4 @@ static struct platform_driver dm644x_ccdc_driver = {
1078 .probe = dm644x_ccdc_probe, 1078 .probe = dm644x_ccdc_probe,
1079}; 1079};
1080 1080
1081static int __init dm644x_ccdc_init(void) 1081module_platform_driver(dm644x_ccdc_driver);
1082{
1083 return platform_driver_register(&dm644x_ccdc_driver);
1084}
1085
1086static void __exit dm644x_ccdc_exit(void)
1087{
1088 platform_driver_unregister(&dm644x_ccdc_driver);
1089}
1090
1091module_init(dm644x_ccdc_init);
1092module_exit(dm644x_ccdc_exit);
diff --git a/drivers/media/video/davinci/isif.c b/drivers/media/video/davinci/isif.c
index 29c29c66859..1e63852374b 100644
--- a/drivers/media/video/davinci/isif.c
+++ b/drivers/media/video/davinci/isif.c
@@ -1156,17 +1156,6 @@ static struct platform_driver isif_driver = {
1156 .probe = isif_probe, 1156 .probe = isif_probe,
1157}; 1157};
1158 1158
1159static int __init isif_init(void) 1159module_platform_driver(isif_driver);
1160{
1161 return platform_driver_register(&isif_driver);
1162}
1163
1164static void isif_exit(void)
1165{
1166 platform_driver_unregister(&isif_driver);
1167}
1168
1169module_init(isif_init);
1170module_exit(isif_exit);
1171 1160
1172MODULE_LICENSE("GPL"); 1161MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/davinci/vpbe.c b/drivers/media/video/davinci/vpbe.c
index d773d30de22..c4a82a1a8a9 100644
--- a/drivers/media/video/davinci/vpbe.c
+++ b/drivers/media/video/davinci/vpbe.c
@@ -141,11 +141,12 @@ static int vpbe_enum_outputs(struct vpbe_device *vpbe_dev,
141 return 0; 141 return 0;
142} 142}
143 143
144static int vpbe_get_mode_info(struct vpbe_device *vpbe_dev, char *mode) 144static int vpbe_get_mode_info(struct vpbe_device *vpbe_dev, char *mode,
145 int output_index)
145{ 146{
146 struct vpbe_config *cfg = vpbe_dev->cfg; 147 struct vpbe_config *cfg = vpbe_dev->cfg;
147 struct vpbe_enc_mode_info var; 148 struct vpbe_enc_mode_info var;
148 int curr_output = vpbe_dev->current_out_index; 149 int curr_output = output_index;
149 int i; 150 int i;
150 151
151 if (NULL == mode) 152 if (NULL == mode)
@@ -245,6 +246,8 @@ static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index)
245 struct encoder_config_info *curr_enc_info = 246 struct encoder_config_info *curr_enc_info =
246 vpbe_current_encoder_info(vpbe_dev); 247 vpbe_current_encoder_info(vpbe_dev);
247 struct vpbe_config *cfg = vpbe_dev->cfg; 248 struct vpbe_config *cfg = vpbe_dev->cfg;
249 struct venc_platform_data *venc_device = vpbe_dev->venc_device;
250 enum v4l2_mbus_pixelcode if_params;
248 int enc_out_index; 251 int enc_out_index;
249 int sd_index; 252 int sd_index;
250 int ret = 0; 253 int ret = 0;
@@ -274,6 +277,8 @@ static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index)
274 goto out; 277 goto out;
275 } 278 }
276 279
280 if_params = cfg->outputs[index].if_params;
281 venc_device->setup_if_config(if_params);
277 if (ret) 282 if (ret)
278 goto out; 283 goto out;
279 } 284 }
@@ -293,7 +298,7 @@ static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index)
293 * encoder. 298 * encoder.
294 */ 299 */
295 ret = vpbe_get_mode_info(vpbe_dev, 300 ret = vpbe_get_mode_info(vpbe_dev,
296 cfg->outputs[index].default_mode); 301 cfg->outputs[index].default_mode, index);
297 if (!ret) { 302 if (!ret) {
298 struct osd_state *osd_device = vpbe_dev->osd_device; 303 struct osd_state *osd_device = vpbe_dev->osd_device;
299 304
@@ -367,6 +372,11 @@ static int vpbe_s_dv_preset(struct vpbe_device *vpbe_dev,
367 372
368 ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, 373 ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video,
369 s_dv_preset, dv_preset); 374 s_dv_preset, dv_preset);
375 if (!ret && (vpbe_dev->amp != NULL)) {
376 /* Call amplifier subdevice */
377 ret = v4l2_subdev_call(vpbe_dev->amp, video,
378 s_dv_preset, dv_preset);
379 }
370 /* set the lcd controller output for the given mode */ 380 /* set the lcd controller output for the given mode */
371 if (!ret) { 381 if (!ret) {
372 struct osd_state *osd_device = vpbe_dev->osd_device; 382 struct osd_state *osd_device = vpbe_dev->osd_device;
@@ -566,6 +576,8 @@ static int platform_device_get(struct device *dev, void *data)
566 576
567 if (strcmp("vpbe-osd", pdev->name) == 0) 577 if (strcmp("vpbe-osd", pdev->name) == 0)
568 vpbe_dev->osd_device = platform_get_drvdata(pdev); 578 vpbe_dev->osd_device = platform_get_drvdata(pdev);
579 if (strcmp("vpbe-venc", pdev->name) == 0)
580 vpbe_dev->venc_device = dev_get_platdata(&pdev->dev);
569 581
570 return 0; 582 return 0;
571} 583}
@@ -584,6 +596,7 @@ static int platform_device_get(struct device *dev, void *data)
584static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev) 596static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev)
585{ 597{
586 struct encoder_config_info *enc_info; 598 struct encoder_config_info *enc_info;
599 struct amp_config_info *amp_info;
587 struct v4l2_subdev **enc_subdev; 600 struct v4l2_subdev **enc_subdev;
588 struct osd_state *osd_device; 601 struct osd_state *osd_device;
589 struct i2c_adapter *i2c_adap; 602 struct i2c_adapter *i2c_adap;
@@ -704,6 +717,32 @@ static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev)
704 v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c encoders" 717 v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c encoders"
705 " currently not supported"); 718 " currently not supported");
706 } 719 }
720 /* Add amplifier subdevice for dm365 */
721 if ((strcmp(vpbe_dev->cfg->module_name, "dm365-vpbe-display") == 0) &&
722 vpbe_dev->cfg->amp != NULL) {
723 amp_info = vpbe_dev->cfg->amp;
724 if (amp_info->is_i2c) {
725 vpbe_dev->amp = v4l2_i2c_new_subdev_board(
726 &vpbe_dev->v4l2_dev, i2c_adap,
727 &amp_info->board_info, NULL);
728 if (!vpbe_dev->amp) {
729 v4l2_err(&vpbe_dev->v4l2_dev,
730 "amplifier %s failed to register",
731 amp_info->module_name);
732 ret = -ENODEV;
733 goto vpbe_fail_amp_register;
734 }
735 v4l2_info(&vpbe_dev->v4l2_dev,
736 "v4l2 sub device %s registered\n",
737 amp_info->module_name);
738 } else {
739 vpbe_dev->amp = NULL;
740 v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c amplifiers"
741 " currently not supported");
742 }
743 } else {
744 vpbe_dev->amp = NULL;
745 }
707 746
708 /* set the current encoder and output to that of venc by default */ 747 /* set the current encoder and output to that of venc by default */
709 vpbe_dev->current_sd_index = 0; 748 vpbe_dev->current_sd_index = 0;
@@ -731,6 +770,8 @@ static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev)
731 /* TBD handling of bootargs for default output and mode */ 770 /* TBD handling of bootargs for default output and mode */
732 return 0; 771 return 0;
733 772
773vpbe_fail_amp_register:
774 kfree(vpbe_dev->amp);
734vpbe_fail_sd_register: 775vpbe_fail_sd_register:
735 kfree(vpbe_dev->encoders); 776 kfree(vpbe_dev->encoders);
736vpbe_fail_v4l2_device: 777vpbe_fail_v4l2_device:
@@ -757,6 +798,7 @@ static void vpbe_deinitialize(struct device *dev, struct vpbe_device *vpbe_dev)
757 if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) 798 if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0)
758 clk_put(vpbe_dev->dac_clk); 799 clk_put(vpbe_dev->dac_clk);
759 800
801 kfree(vpbe_dev->amp);
760 kfree(vpbe_dev->encoders); 802 kfree(vpbe_dev->encoders);
761 vpbe_dev->initialized = 0; 803 vpbe_dev->initialized = 0;
762 /* disable vpss clocks */ 804 /* disable vpss clocks */
@@ -811,8 +853,10 @@ static __devinit int vpbe_probe(struct platform_device *pdev)
811 853
812 if (cfg->outputs->num_modes > 0) 854 if (cfg->outputs->num_modes > 0)
813 vpbe_dev->current_timings = vpbe_dev->cfg->outputs[0].modes[0]; 855 vpbe_dev->current_timings = vpbe_dev->cfg->outputs[0].modes[0];
814 else 856 else {
857 kfree(vpbe_dev);
815 return -ENODEV; 858 return -ENODEV;
859 }
816 860
817 /* set the driver data in platform device */ 861 /* set the driver data in platform device */
818 platform_set_drvdata(pdev, vpbe_dev); 862 platform_set_drvdata(pdev, vpbe_dev);
@@ -839,26 +883,4 @@ static struct platform_driver vpbe_driver = {
839 .remove = vpbe_remove, 883 .remove = vpbe_remove,
840}; 884};
841 885
842/** 886module_platform_driver(vpbe_driver);
843 * vpbe_init: initialize the vpbe driver
844 *
845 * This function registers device and driver to the kernel
846 */
847static __init int vpbe_init(void)
848{
849 return platform_driver_register(&vpbe_driver);
850}
851
852/**
853 * vpbe_cleanup : cleanup function for vpbe driver
854 *
855 * This will un-registers the device and driver to the kernel
856 */
857static void vpbe_cleanup(void)
858{
859 platform_driver_unregister(&vpbe_driver);
860}
861
862/* Function for module initialization and cleanup */
863module_init(vpbe_init);
864module_exit(vpbe_cleanup);
diff --git a/drivers/media/video/davinci/vpbe_display.c b/drivers/media/video/davinci/vpbe_display.c
index 8588a86d9b4..1f3b1c72925 100644
--- a/drivers/media/video/davinci/vpbe_display.c
+++ b/drivers/media/video/davinci/vpbe_display.c
@@ -1746,15 +1746,16 @@ static __devinit int vpbe_display_probe(struct platform_device *pdev)
1746 for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { 1746 for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) {
1747 if (register_device(disp_dev->dev[i], disp_dev, pdev)) { 1747 if (register_device(disp_dev->dev[i], disp_dev, pdev)) {
1748 err = -ENODEV; 1748 err = -ENODEV;
1749 goto probe_out; 1749 goto probe_out_irq;
1750 } 1750 }
1751 } 1751 }
1752 1752
1753 printk(KERN_DEBUG "Successfully completed the probing of vpbe v4l2 device\n"); 1753 printk(KERN_DEBUG "Successfully completed the probing of vpbe v4l2 device\n");
1754 return 0; 1754 return 0;
1755 1755
1756probe_out: 1756probe_out_irq:
1757 free_irq(res->start, disp_dev); 1757 free_irq(res->start, disp_dev);
1758probe_out:
1758 for (k = 0; k < VPBE_DISPLAY_MAX_DEVICES; k++) { 1759 for (k = 0; k < VPBE_DISPLAY_MAX_DEVICES; k++) {
1759 /* Get the pointer to the layer object */ 1760 /* Get the pointer to the layer object */
1760 vpbe_display_layer = disp_dev->dev[k]; 1761 vpbe_display_layer = disp_dev->dev[k];
@@ -1816,43 +1817,7 @@ static struct platform_driver vpbe_display_driver = {
1816 .remove = __devexit_p(vpbe_display_remove), 1817 .remove = __devexit_p(vpbe_display_remove),
1817}; 1818};
1818 1819
1819/* 1820module_platform_driver(vpbe_display_driver);
1820 * vpbe_display_init()
1821 * This function registers device and driver to the kernel, requests irq
1822 * handler and allocates memory for layer objects
1823 */
1824static __devinit int vpbe_display_init(void)
1825{
1826 int err;
1827
1828 printk(KERN_DEBUG "vpbe_display_init\n");
1829
1830 /* Register driver to the kernel */
1831 err = platform_driver_register(&vpbe_display_driver);
1832 if (0 != err)
1833 return err;
1834
1835 printk(KERN_DEBUG "vpbe_display_init:"
1836 "VPBE V4L2 Display Driver V1.0 loaded\n");
1837 return 0;
1838}
1839
1840/*
1841 * vpbe_display_cleanup()
1842 * This function un-registers device and driver to the kernel, frees requested
1843 * irq handler and de-allocates memory allocated for layer objects.
1844 */
1845static void vpbe_display_cleanup(void)
1846{
1847 printk(KERN_DEBUG "vpbe_display_cleanup\n");
1848
1849 /* platform driver unregister */
1850 platform_driver_unregister(&vpbe_display_driver);
1851}
1852
1853/* Function for module initialization and cleanup */
1854module_init(vpbe_display_init);
1855module_exit(vpbe_display_cleanup);
1856 1821
1857MODULE_DESCRIPTION("TI DM644x/DM355/DM365 VPBE Display controller"); 1822MODULE_DESCRIPTION("TI DM644x/DM355/DM365 VPBE Display controller");
1858MODULE_LICENSE("GPL"); 1823MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/davinci/vpbe_osd.c b/drivers/media/video/davinci/vpbe_osd.c
index ceccf430251..d6488b79ae3 100644
--- a/drivers/media/video/davinci/vpbe_osd.c
+++ b/drivers/media/video/davinci/vpbe_osd.c
@@ -248,11 +248,29 @@ static void _osd_set_rec601_attenuation(struct osd_state *sd,
248 osd_modify(sd, OSD_OSDWIN0MD_ATN0E, 248 osd_modify(sd, OSD_OSDWIN0MD_ATN0E,
249 enable ? OSD_OSDWIN0MD_ATN0E : 0, 249 enable ? OSD_OSDWIN0MD_ATN0E : 0,
250 OSD_OSDWIN0MD); 250 OSD_OSDWIN0MD);
251 if (sd->vpbe_type == VPBE_VERSION_1)
252 osd_modify(sd, OSD_OSDWIN0MD_ATN0E,
253 enable ? OSD_OSDWIN0MD_ATN0E : 0,
254 OSD_OSDWIN0MD);
255 else if ((sd->vpbe_type == VPBE_VERSION_3) ||
256 (sd->vpbe_type == VPBE_VERSION_2))
257 osd_modify(sd, OSD_EXTMODE_ATNOSD0EN,
258 enable ? OSD_EXTMODE_ATNOSD0EN : 0,
259 OSD_EXTMODE);
251 break; 260 break;
252 case OSDWIN_OSD1: 261 case OSDWIN_OSD1:
253 osd_modify(sd, OSD_OSDWIN1MD_ATN1E, 262 osd_modify(sd, OSD_OSDWIN1MD_ATN1E,
254 enable ? OSD_OSDWIN1MD_ATN1E : 0, 263 enable ? OSD_OSDWIN1MD_ATN1E : 0,
255 OSD_OSDWIN1MD); 264 OSD_OSDWIN1MD);
265 if (sd->vpbe_type == VPBE_VERSION_1)
266 osd_modify(sd, OSD_OSDWIN1MD_ATN1E,
267 enable ? OSD_OSDWIN1MD_ATN1E : 0,
268 OSD_OSDWIN1MD);
269 else if ((sd->vpbe_type == VPBE_VERSION_3) ||
270 (sd->vpbe_type == VPBE_VERSION_2))
271 osd_modify(sd, OSD_EXTMODE_ATNOSD1EN,
272 enable ? OSD_EXTMODE_ATNOSD1EN : 0,
273 OSD_EXTMODE);
256 break; 274 break;
257 } 275 }
258} 276}
@@ -273,15 +291,71 @@ static void _osd_set_blending_factor(struct osd_state *sd,
273 } 291 }
274} 292}
275 293
294static void _osd_enable_rgb888_pixblend(struct osd_state *sd,
295 enum osd_win_layer osdwin)
296{
297
298 osd_modify(sd, OSD_MISCCTL_BLDSEL, 0, OSD_MISCCTL);
299 switch (osdwin) {
300 case OSDWIN_OSD0:
301 osd_modify(sd, OSD_EXTMODE_OSD0BLDCHR,
302 OSD_EXTMODE_OSD0BLDCHR, OSD_EXTMODE);
303 break;
304 case OSDWIN_OSD1:
305 osd_modify(sd, OSD_EXTMODE_OSD1BLDCHR,
306 OSD_EXTMODE_OSD1BLDCHR, OSD_EXTMODE);
307 break;
308 }
309}
310
276static void _osd_enable_color_key(struct osd_state *sd, 311static void _osd_enable_color_key(struct osd_state *sd,
277 enum osd_win_layer osdwin, 312 enum osd_win_layer osdwin,
278 unsigned colorkey, 313 unsigned colorkey,
279 enum osd_pix_format pixfmt) 314 enum osd_pix_format pixfmt)
280{ 315{
281 switch (pixfmt) { 316 switch (pixfmt) {
317 case PIXFMT_1BPP:
318 case PIXFMT_2BPP:
319 case PIXFMT_4BPP:
320 case PIXFMT_8BPP:
321 if (sd->vpbe_type == VPBE_VERSION_3) {
322 switch (osdwin) {
323 case OSDWIN_OSD0:
324 osd_modify(sd, OSD_TRANSPBMPIDX_BMP0,
325 colorkey <<
326 OSD_TRANSPBMPIDX_BMP0_SHIFT,
327 OSD_TRANSPBMPIDX);
328 break;
329 case OSDWIN_OSD1:
330 osd_modify(sd, OSD_TRANSPBMPIDX_BMP1,
331 colorkey <<
332 OSD_TRANSPBMPIDX_BMP1_SHIFT,
333 OSD_TRANSPBMPIDX);
334 break;
335 }
336 }
337 break;
282 case PIXFMT_RGB565: 338 case PIXFMT_RGB565:
283 osd_write(sd, colorkey & OSD_TRANSPVAL_RGBTRANS, 339 if (sd->vpbe_type == VPBE_VERSION_1)
284 OSD_TRANSPVAL); 340 osd_write(sd, colorkey & OSD_TRANSPVAL_RGBTRANS,
341 OSD_TRANSPVAL);
342 else if (sd->vpbe_type == VPBE_VERSION_3)
343 osd_write(sd, colorkey & OSD_TRANSPVALL_RGBL,
344 OSD_TRANSPVALL);
345 break;
346 case PIXFMT_YCbCrI:
347 case PIXFMT_YCrCbI:
348 if (sd->vpbe_type == VPBE_VERSION_3)
349 osd_modify(sd, OSD_TRANSPVALU_Y, colorkey,
350 OSD_TRANSPVALU);
351 break;
352 case PIXFMT_RGB888:
353 if (sd->vpbe_type == VPBE_VERSION_3) {
354 osd_write(sd, colorkey & OSD_TRANSPVALL_RGBL,
355 OSD_TRANSPVALL);
356 osd_modify(sd, OSD_TRANSPVALU_RGBU, colorkey >> 16,
357 OSD_TRANSPVALU);
358 }
285 break; 359 break;
286 default: 360 default:
287 break; 361 break;
@@ -470,23 +544,188 @@ static int osd_enable_layer(struct osd_state *sd, enum osd_layer layer,
470 return 0; 544 return 0;
471} 545}
472 546
547#define OSD_SRC_ADDR_HIGH4 0x7800000
548#define OSD_SRC_ADDR_HIGH7 0x7F0000
549#define OSD_SRCADD_OFSET_SFT 23
550#define OSD_SRCADD_ADD_SFT 16
551#define OSD_WINADL_MASK 0xFFFF
552#define OSD_WINOFST_MASK 0x1000
553#define VPBE_REG_BASE 0x80000000
554
473static void _osd_start_layer(struct osd_state *sd, enum osd_layer layer, 555static void _osd_start_layer(struct osd_state *sd, enum osd_layer layer,
474 unsigned long fb_base_phys, 556 unsigned long fb_base_phys,
475 unsigned long cbcr_ofst) 557 unsigned long cbcr_ofst)
476{ 558{
477 switch (layer) { 559
478 case WIN_OSD0: 560 if (sd->vpbe_type == VPBE_VERSION_1) {
479 osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN0ADR); 561 switch (layer) {
480 break; 562 case WIN_OSD0:
481 case WIN_VID0: 563 osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN0ADR);
482 osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR); 564 break;
483 break; 565 case WIN_VID0:
484 case WIN_OSD1: 566 osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR);
485 osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN1ADR); 567 break;
486 break; 568 case WIN_OSD1:
487 case WIN_VID1: 569 osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN1ADR);
488 osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN1ADR); 570 break;
489 break; 571 case WIN_VID1:
572 osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN1ADR);
573 break;
574 }
575 } else if (sd->vpbe_type == VPBE_VERSION_3) {
576 unsigned long fb_offset_32 =
577 (fb_base_phys - VPBE_REG_BASE) >> 5;
578
579 switch (layer) {
580 case WIN_OSD0:
581 osd_modify(sd, OSD_OSDWINADH_O0AH,
582 fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
583 OSD_OSDWINADH_O0AH_SHIFT),
584 OSD_OSDWINADH);
585 osd_write(sd, fb_offset_32 & OSD_OSDWIN0ADL_O0AL,
586 OSD_OSDWIN0ADL);
587 break;
588 case WIN_VID0:
589 osd_modify(sd, OSD_VIDWINADH_V0AH,
590 fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
591 OSD_VIDWINADH_V0AH_SHIFT),
592 OSD_VIDWINADH);
593 osd_write(sd, fb_offset_32 & OSD_VIDWIN0ADL_V0AL,
594 OSD_VIDWIN0ADL);
595 break;
596 case WIN_OSD1:
597 osd_modify(sd, OSD_OSDWINADH_O1AH,
598 fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
599 OSD_OSDWINADH_O1AH_SHIFT),
600 OSD_OSDWINADH);
601 osd_write(sd, fb_offset_32 & OSD_OSDWIN1ADL_O1AL,
602 OSD_OSDWIN1ADL);
603 break;
604 case WIN_VID1:
605 osd_modify(sd, OSD_VIDWINADH_V1AH,
606 fb_offset_32 >> (OSD_SRCADD_ADD_SFT -
607 OSD_VIDWINADH_V1AH_SHIFT),
608 OSD_VIDWINADH);
609 osd_write(sd, fb_offset_32 & OSD_VIDWIN1ADL_V1AL,
610 OSD_VIDWIN1ADL);
611 break;
612 }
613 } else if (sd->vpbe_type == VPBE_VERSION_2) {
614 struct osd_window_state *win = &sd->win[layer];
615 unsigned long fb_offset_32, cbcr_offset_32;
616
617 fb_offset_32 = fb_base_phys - VPBE_REG_BASE;
618 if (cbcr_ofst)
619 cbcr_offset_32 = cbcr_ofst;
620 else
621 cbcr_offset_32 = win->lconfig.line_length *
622 win->lconfig.ysize;
623 cbcr_offset_32 += fb_offset_32;
624 fb_offset_32 = fb_offset_32 >> 5;
625 cbcr_offset_32 = cbcr_offset_32 >> 5;
626 /*
627 * DM365: start address is 27-bit long address b26 - b23 are
628 * in offset register b12 - b9, and * bit 26 has to be '1'
629 */
630 if (win->lconfig.pixfmt == PIXFMT_NV12) {
631 switch (layer) {
632 case WIN_VID0:
633 case WIN_VID1:
634 /* Y is in VID0 */
635 osd_modify(sd, OSD_VIDWIN0OFST_V0AH,
636 ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
637 (OSD_SRCADD_OFSET_SFT -
638 OSD_WINOFST_AH_SHIFT)) |
639 OSD_WINOFST_MASK, OSD_VIDWIN0OFST);
640 osd_modify(sd, OSD_VIDWINADH_V0AH,
641 (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
642 (OSD_SRCADD_ADD_SFT -
643 OSD_VIDWINADH_V0AH_SHIFT),
644 OSD_VIDWINADH);
645 osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
646 OSD_VIDWIN0ADL);
647 /* CbCr is in VID1 */
648 osd_modify(sd, OSD_VIDWIN1OFST_V1AH,
649 ((cbcr_offset_32 &
650 OSD_SRC_ADDR_HIGH4) >>
651 (OSD_SRCADD_OFSET_SFT -
652 OSD_WINOFST_AH_SHIFT)) |
653 OSD_WINOFST_MASK, OSD_VIDWIN1OFST);
654 osd_modify(sd, OSD_VIDWINADH_V1AH,
655 (cbcr_offset_32 &
656 OSD_SRC_ADDR_HIGH7) >>
657 (OSD_SRCADD_ADD_SFT -
658 OSD_VIDWINADH_V1AH_SHIFT),
659 OSD_VIDWINADH);
660 osd_write(sd, cbcr_offset_32 & OSD_WINADL_MASK,
661 OSD_VIDWIN1ADL);
662 break;
663 default:
664 break;
665 }
666 }
667
668 switch (layer) {
669 case WIN_OSD0:
670 osd_modify(sd, OSD_OSDWIN0OFST_O0AH,
671 ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
672 (OSD_SRCADD_OFSET_SFT -
673 OSD_WINOFST_AH_SHIFT)) | OSD_WINOFST_MASK,
674 OSD_OSDWIN0OFST);
675 osd_modify(sd, OSD_OSDWINADH_O0AH,
676 (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
677 (OSD_SRCADD_ADD_SFT -
678 OSD_OSDWINADH_O0AH_SHIFT), OSD_OSDWINADH);
679 osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
680 OSD_OSDWIN0ADL);
681 break;
682 case WIN_VID0:
683 if (win->lconfig.pixfmt != PIXFMT_NV12) {
684 osd_modify(sd, OSD_VIDWIN0OFST_V0AH,
685 ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
686 (OSD_SRCADD_OFSET_SFT -
687 OSD_WINOFST_AH_SHIFT)) |
688 OSD_WINOFST_MASK, OSD_VIDWIN0OFST);
689 osd_modify(sd, OSD_VIDWINADH_V0AH,
690 (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
691 (OSD_SRCADD_ADD_SFT -
692 OSD_VIDWINADH_V0AH_SHIFT),
693 OSD_VIDWINADH);
694 osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
695 OSD_VIDWIN0ADL);
696 }
697 break;
698 case WIN_OSD1:
699 osd_modify(sd, OSD_OSDWIN1OFST_O1AH,
700 ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
701 (OSD_SRCADD_OFSET_SFT -
702 OSD_WINOFST_AH_SHIFT)) | OSD_WINOFST_MASK,
703 OSD_OSDWIN1OFST);
704 osd_modify(sd, OSD_OSDWINADH_O1AH,
705 (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
706 (OSD_SRCADD_ADD_SFT -
707 OSD_OSDWINADH_O1AH_SHIFT),
708 OSD_OSDWINADH);
709 osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
710 OSD_OSDWIN1ADL);
711 break;
712 case WIN_VID1:
713 if (win->lconfig.pixfmt != PIXFMT_NV12) {
714 osd_modify(sd, OSD_VIDWIN1OFST_V1AH,
715 ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >>
716 (OSD_SRCADD_OFSET_SFT -
717 OSD_WINOFST_AH_SHIFT)) |
718 OSD_WINOFST_MASK, OSD_VIDWIN1OFST);
719 osd_modify(sd, OSD_VIDWINADH_V1AH,
720 (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >>
721 (OSD_SRCADD_ADD_SFT -
722 OSD_VIDWINADH_V1AH_SHIFT),
723 OSD_VIDWINADH);
724 osd_write(sd, fb_offset_32 & OSD_WINADL_MASK,
725 OSD_VIDWIN1ADL);
726 }
727 break;
728 }
490 } 729 }
491} 730}
492 731
@@ -545,7 +784,7 @@ static int try_layer_config(struct osd_state *sd, enum osd_layer layer,
545{ 784{
546 struct osd_state *osd = sd; 785 struct osd_state *osd = sd;
547 struct osd_window_state *win = &osd->win[layer]; 786 struct osd_window_state *win = &osd->win[layer];
548 int bad_config; 787 int bad_config = 0;
549 788
550 /* verify that the pixel format is compatible with the layer */ 789 /* verify that the pixel format is compatible with the layer */
551 switch (lconfig->pixfmt) { 790 switch (lconfig->pixfmt) {
@@ -554,17 +793,25 @@ static int try_layer_config(struct osd_state *sd, enum osd_layer layer,
554 case PIXFMT_4BPP: 793 case PIXFMT_4BPP:
555 case PIXFMT_8BPP: 794 case PIXFMT_8BPP:
556 case PIXFMT_RGB565: 795 case PIXFMT_RGB565:
557 bad_config = !is_osd_win(layer); 796 if (osd->vpbe_type == VPBE_VERSION_1)
797 bad_config = !is_vid_win(layer);
558 break; 798 break;
559 case PIXFMT_YCbCrI: 799 case PIXFMT_YCbCrI:
560 case PIXFMT_YCrCbI: 800 case PIXFMT_YCrCbI:
561 bad_config = !is_vid_win(layer); 801 bad_config = !is_vid_win(layer);
562 break; 802 break;
563 case PIXFMT_RGB888: 803 case PIXFMT_RGB888:
564 bad_config = !is_vid_win(layer); 804 if (osd->vpbe_type == VPBE_VERSION_1)
805 bad_config = !is_vid_win(layer);
806 else if ((osd->vpbe_type == VPBE_VERSION_3) ||
807 (osd->vpbe_type == VPBE_VERSION_2))
808 bad_config = !is_osd_win(layer);
565 break; 809 break;
566 case PIXFMT_NV12: 810 case PIXFMT_NV12:
567 bad_config = 1; 811 if (osd->vpbe_type != VPBE_VERSION_2)
812 bad_config = 1;
813 else
814 bad_config = is_osd_win(layer);
568 break; 815 break;
569 case PIXFMT_OSD_ATTR: 816 case PIXFMT_OSD_ATTR:
570 bad_config = (layer != WIN_OSD1); 817 bad_config = (layer != WIN_OSD1);
@@ -584,7 +831,8 @@ static int try_layer_config(struct osd_state *sd, enum osd_layer layer,
584 831
585 /* DM6446: */ 832 /* DM6446: */
586 /* only one OSD window at a time can use RGB pixel formats */ 833 /* only one OSD window at a time can use RGB pixel formats */
587 if (is_osd_win(layer) && is_rgb_pixfmt(lconfig->pixfmt)) { 834 if ((osd->vpbe_type == VPBE_VERSION_1) &&
835 is_osd_win(layer) && is_rgb_pixfmt(lconfig->pixfmt)) {
588 enum osd_pix_format pixfmt; 836 enum osd_pix_format pixfmt;
589 if (layer == WIN_OSD0) 837 if (layer == WIN_OSD0)
590 pixfmt = osd->win[WIN_OSD1].lconfig.pixfmt; 838 pixfmt = osd->win[WIN_OSD1].lconfig.pixfmt;
@@ -602,7 +850,8 @@ static int try_layer_config(struct osd_state *sd, enum osd_layer layer,
602 } 850 }
603 851
604 /* DM6446: only one video window at a time can use RGB888 */ 852 /* DM6446: only one video window at a time can use RGB888 */
605 if (is_vid_win(layer) && lconfig->pixfmt == PIXFMT_RGB888) { 853 if ((osd->vpbe_type == VPBE_VERSION_1) && is_vid_win(layer) &&
854 lconfig->pixfmt == PIXFMT_RGB888) {
606 enum osd_pix_format pixfmt; 855 enum osd_pix_format pixfmt;
607 856
608 if (layer == WIN_VID0) 857 if (layer == WIN_VID0)
@@ -652,7 +901,8 @@ static void _osd_disable_vid_rgb888(struct osd_state *sd)
652 * The caller must ensure that neither video window is currently 901 * The caller must ensure that neither video window is currently
653 * configured for RGB888 pixel format. 902 * configured for RGB888 pixel format.
654 */ 903 */
655 osd_clear(sd, OSD_MISCCTL_RGBEN, OSD_MISCCTL); 904 if (sd->vpbe_type == VPBE_VERSION_1)
905 osd_clear(sd, OSD_MISCCTL_RGBEN, OSD_MISCCTL);
656} 906}
657 907
658static void _osd_enable_vid_rgb888(struct osd_state *sd, 908static void _osd_enable_vid_rgb888(struct osd_state *sd,
@@ -665,13 +915,14 @@ static void _osd_enable_vid_rgb888(struct osd_state *sd,
665 * currently configured for RGB888 pixel format, as this routine will 915 * currently configured for RGB888 pixel format, as this routine will
666 * disable RGB888 pixel format for the other window. 916 * disable RGB888 pixel format for the other window.
667 */ 917 */
668 if (layer == WIN_VID0) { 918 if (sd->vpbe_type == VPBE_VERSION_1) {
669 osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, 919 if (layer == WIN_VID0)
670 OSD_MISCCTL_RGBEN, OSD_MISCCTL); 920 osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
671 } else if (layer == WIN_VID1) { 921 OSD_MISCCTL_RGBEN, OSD_MISCCTL);
672 osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, 922 else if (layer == WIN_VID1)
673 OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, 923 osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
674 OSD_MISCCTL); 924 OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN,
925 OSD_MISCCTL);
675 } 926 }
676} 927}
677 928
@@ -697,9 +948,30 @@ static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer,
697 948
698 switch (layer) { 949 switch (layer) {
699 case WIN_OSD0: 950 case WIN_OSD0:
700 winmd_mask |= OSD_OSDWIN0MD_RGB0E; 951 if (sd->vpbe_type == VPBE_VERSION_1) {
701 if (lconfig->pixfmt == PIXFMT_RGB565) 952 winmd_mask |= OSD_OSDWIN0MD_RGB0E;
702 winmd |= OSD_OSDWIN0MD_RGB0E; 953 if (lconfig->pixfmt == PIXFMT_RGB565)
954 winmd |= OSD_OSDWIN0MD_RGB0E;
955 } else if ((sd->vpbe_type == VPBE_VERSION_3) ||
956 (sd->vpbe_type == VPBE_VERSION_2)) {
957 winmd_mask |= OSD_OSDWIN0MD_BMP0MD;
958 switch (lconfig->pixfmt) {
959 case PIXFMT_RGB565:
960 winmd |= (1 <<
961 OSD_OSDWIN0MD_BMP0MD_SHIFT);
962 break;
963 case PIXFMT_RGB888:
964 winmd |= (2 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
965 _osd_enable_rgb888_pixblend(sd, OSDWIN_OSD0);
966 break;
967 case PIXFMT_YCbCrI:
968 case PIXFMT_YCrCbI:
969 winmd |= (3 << OSD_OSDWIN0MD_BMP0MD_SHIFT);
970 break;
971 default:
972 break;
973 }
974 }
703 975
704 winmd_mask |= OSD_OSDWIN0MD_BMW0 | OSD_OSDWIN0MD_OFF0; 976 winmd_mask |= OSD_OSDWIN0MD_BMW0 | OSD_OSDWIN0MD_OFF0;
705 977
@@ -749,12 +1021,59 @@ static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer,
749 * For YUV420P format the register contents are 1021 * For YUV420P format the register contents are
750 * duplicated in both VID registers 1022 * duplicated in both VID registers
751 */ 1023 */
1024 if ((sd->vpbe_type == VPBE_VERSION_2) &&
1025 (lconfig->pixfmt == PIXFMT_NV12)) {
1026 /* other window also */
1027 if (lconfig->interlaced) {
1028 winmd_mask |= OSD_VIDWINMD_VFF1;
1029 winmd |= OSD_VIDWINMD_VFF1;
1030 osd_modify(sd, winmd_mask, winmd,
1031 OSD_VIDWINMD);
1032 }
1033
1034 osd_modify(sd, OSD_MISCCTL_S420D,
1035 OSD_MISCCTL_S420D, OSD_MISCCTL);
1036 osd_write(sd, lconfig->line_length >> 5,
1037 OSD_VIDWIN1OFST);
1038 osd_write(sd, lconfig->xpos, OSD_VIDWIN1XP);
1039 osd_write(sd, lconfig->xsize, OSD_VIDWIN1XL);
1040 /*
1041 * if NV21 pixfmt and line length not 32B
1042 * aligned (e.g. NTSC), Need to set window
1043 * X pixel size to be 32B aligned as well
1044 */
1045 if (lconfig->xsize % 32) {
1046 osd_write(sd,
1047 ((lconfig->xsize + 31) & ~31),
1048 OSD_VIDWIN1XL);
1049 osd_write(sd,
1050 ((lconfig->xsize + 31) & ~31),
1051 OSD_VIDWIN0XL);
1052 }
1053 } else if ((sd->vpbe_type == VPBE_VERSION_2) &&
1054 (lconfig->pixfmt != PIXFMT_NV12)) {
1055 osd_modify(sd, OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D,
1056 OSD_MISCCTL);
1057 }
1058
752 if (lconfig->interlaced) { 1059 if (lconfig->interlaced) {
753 osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN0YP); 1060 osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN0YP);
754 osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN0YL); 1061 osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN0YL);
1062 if ((sd->vpbe_type == VPBE_VERSION_2) &&
1063 lconfig->pixfmt == PIXFMT_NV12) {
1064 osd_write(sd, lconfig->ypos >> 1,
1065 OSD_VIDWIN1YP);
1066 osd_write(sd, lconfig->ysize >> 1,
1067 OSD_VIDWIN1YL);
1068 }
755 } else { 1069 } else {
756 osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP); 1070 osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP);
757 osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL); 1071 osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL);
1072 if ((sd->vpbe_type == VPBE_VERSION_2) &&
1073 lconfig->pixfmt == PIXFMT_NV12) {
1074 osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP);
1075 osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL);
1076 }
758 } 1077 }
759 break; 1078 break;
760 case WIN_OSD1: 1079 case WIN_OSD1:
@@ -764,14 +1083,43 @@ static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer,
764 * attribute mode to a normal mode. 1083 * attribute mode to a normal mode.
765 */ 1084 */
766 if (lconfig->pixfmt == PIXFMT_OSD_ATTR) { 1085 if (lconfig->pixfmt == PIXFMT_OSD_ATTR) {
767 winmd_mask |= 1086 if (sd->vpbe_type == VPBE_VERSION_1) {
768 OSD_OSDWIN1MD_ATN1E | OSD_OSDWIN1MD_RGB1E | 1087 winmd_mask |= OSD_OSDWIN1MD_ATN1E |
769 OSD_OSDWIN1MD_CLUTS1 | 1088 OSD_OSDWIN1MD_RGB1E | OSD_OSDWIN1MD_CLUTS1 |
770 OSD_OSDWIN1MD_BLND1 | OSD_OSDWIN1MD_TE1; 1089 OSD_OSDWIN1MD_BLND1 | OSD_OSDWIN1MD_TE1;
1090 } else {
1091 winmd_mask |= OSD_OSDWIN1MD_BMP1MD |
1092 OSD_OSDWIN1MD_CLUTS1 | OSD_OSDWIN1MD_BLND1 |
1093 OSD_OSDWIN1MD_TE1;
1094 }
771 } else { 1095 } else {
772 winmd_mask |= OSD_OSDWIN1MD_RGB1E; 1096 if (sd->vpbe_type == VPBE_VERSION_1) {
773 if (lconfig->pixfmt == PIXFMT_RGB565) 1097 winmd_mask |= OSD_OSDWIN1MD_RGB1E;
774 winmd |= OSD_OSDWIN1MD_RGB1E; 1098 if (lconfig->pixfmt == PIXFMT_RGB565)
1099 winmd |= OSD_OSDWIN1MD_RGB1E;
1100 } else if ((sd->vpbe_type == VPBE_VERSION_3)
1101 || (sd->vpbe_type == VPBE_VERSION_2)) {
1102 winmd_mask |= OSD_OSDWIN1MD_BMP1MD;
1103 switch (lconfig->pixfmt) {
1104 case PIXFMT_RGB565:
1105 winmd |=
1106 (1 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
1107 break;
1108 case PIXFMT_RGB888:
1109 winmd |=
1110 (2 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
1111 _osd_enable_rgb888_pixblend(sd,
1112 OSDWIN_OSD1);
1113 break;
1114 case PIXFMT_YCbCrI:
1115 case PIXFMT_YCrCbI:
1116 winmd |=
1117 (3 << OSD_OSDWIN1MD_BMP1MD_SHIFT);
1118 break;
1119 default:
1120 break;
1121 }
1122 }
775 1123
776 winmd_mask |= OSD_OSDWIN1MD_BMW1; 1124 winmd_mask |= OSD_OSDWIN1MD_BMW1;
777 switch (lconfig->pixfmt) { 1125 switch (lconfig->pixfmt) {
@@ -822,15 +1170,45 @@ static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer,
822 * For YUV420P format the register contents are 1170 * For YUV420P format the register contents are
823 * duplicated in both VID registers 1171 * duplicated in both VID registers
824 */ 1172 */
825 osd_modify(sd, OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D, 1173 if (sd->vpbe_type == VPBE_VERSION_2) {
826 OSD_MISCCTL); 1174 if (lconfig->pixfmt == PIXFMT_NV12) {
1175 /* other window also */
1176 if (lconfig->interlaced) {
1177 winmd_mask |= OSD_VIDWINMD_VFF0;
1178 winmd |= OSD_VIDWINMD_VFF0;
1179 osd_modify(sd, winmd_mask, winmd,
1180 OSD_VIDWINMD);
1181 }
1182 osd_modify(sd, OSD_MISCCTL_S420D,
1183 OSD_MISCCTL_S420D, OSD_MISCCTL);
1184 osd_write(sd, lconfig->line_length >> 5,
1185 OSD_VIDWIN0OFST);
1186 osd_write(sd, lconfig->xpos, OSD_VIDWIN0XP);
1187 osd_write(sd, lconfig->xsize, OSD_VIDWIN0XL);
1188 } else {
1189 osd_modify(sd, OSD_MISCCTL_S420D,
1190 ~OSD_MISCCTL_S420D, OSD_MISCCTL);
1191 }
1192 }
827 1193
828 if (lconfig->interlaced) { 1194 if (lconfig->interlaced) {
829 osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN1YP); 1195 osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN1YP);
830 osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN1YL); 1196 osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN1YL);
1197 if ((sd->vpbe_type == VPBE_VERSION_2) &&
1198 lconfig->pixfmt == PIXFMT_NV12) {
1199 osd_write(sd, lconfig->ypos >> 1,
1200 OSD_VIDWIN0YP);
1201 osd_write(sd, lconfig->ysize >> 1,
1202 OSD_VIDWIN0YL);
1203 }
831 } else { 1204 } else {
832 osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP); 1205 osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP);
833 osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL); 1206 osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL);
1207 if ((sd->vpbe_type == VPBE_VERSION_2) &&
1208 lconfig->pixfmt == PIXFMT_NV12) {
1209 osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP);
1210 osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL);
1211 }
834 } 1212 }
835 break; 1213 break;
836 } 1214 }
@@ -1089,6 +1467,11 @@ static void _osd_init(struct osd_state *sd)
1089 osd_write(sd, 0, OSD_OSDWIN1MD); 1467 osd_write(sd, 0, OSD_OSDWIN1MD);
1090 osd_write(sd, 0, OSD_RECTCUR); 1468 osd_write(sd, 0, OSD_RECTCUR);
1091 osd_write(sd, 0, OSD_MISCCTL); 1469 osd_write(sd, 0, OSD_MISCCTL);
1470 if (sd->vpbe_type == VPBE_VERSION_3) {
1471 osd_write(sd, 0, OSD_VBNDRY);
1472 osd_write(sd, 0, OSD_EXTMODE);
1473 osd_write(sd, OSD_MISCCTL_DMANG, OSD_MISCCTL);
1474 }
1092} 1475}
1093 1476
1094static void osd_set_left_margin(struct osd_state *sd, u32 val) 1477static void osd_set_left_margin(struct osd_state *sd, u32 val)
@@ -1110,6 +1493,14 @@ static int osd_initialize(struct osd_state *osd)
1110 /* set default Cb/Cr order */ 1493 /* set default Cb/Cr order */
1111 osd->yc_pixfmt = PIXFMT_YCbCrI; 1494 osd->yc_pixfmt = PIXFMT_YCbCrI;
1112 1495
1496 if (osd->vpbe_type == VPBE_VERSION_3) {
1497 /*
1498 * ROM CLUT1 on the DM355 is similar (identical?) to ROM CLUT0
1499 * on the DM6446, so make ROM_CLUT1 the default on the DM355.
1500 */
1501 osd->rom_clut = ROM_CLUT1;
1502 }
1503
1113 _osd_set_field_inversion(osd, osd->field_inversion); 1504 _osd_set_field_inversion(osd, osd->field_inversion);
1114 _osd_set_rom_clut(osd, osd->rom_clut); 1505 _osd_set_rom_clut(osd, osd->rom_clut);
1115 1506
@@ -1208,23 +1599,7 @@ static struct platform_driver osd_driver = {
1208 }, 1599 },
1209}; 1600};
1210 1601
1211static int osd_init(void) 1602module_platform_driver(osd_driver);
1212{
1213 if (platform_driver_register(&osd_driver)) {
1214 printk(KERN_ERR "Unable to register davinci osd driver\n");
1215 return -ENODEV;
1216 }
1217
1218 return 0;
1219}
1220
1221static void osd_exit(void)
1222{
1223 platform_driver_unregister(&osd_driver);
1224}
1225
1226module_init(osd_init);
1227module_exit(osd_exit);
1228 1603
1229MODULE_LICENSE("GPL"); 1604MODULE_LICENSE("GPL");
1230MODULE_DESCRIPTION("DaVinci OSD Manager Driver"); 1605MODULE_DESCRIPTION("DaVinci OSD Manager Driver");
diff --git a/drivers/media/video/davinci/vpbe_venc.c b/drivers/media/video/davinci/vpbe_venc.c
index 03a3e5c65ee..00e80f59d5d 100644
--- a/drivers/media/video/davinci/vpbe_venc.c
+++ b/drivers/media/video/davinci/vpbe_venc.c
@@ -99,6 +99,8 @@ static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
99 return val; 99 return val;
100} 100}
101 101
102#define VDAC_COMPONENT 0x543
103#define VDAC_S_VIDEO 0x210
102/* This function sets the dac of the VPBE for various outputs 104/* This function sets the dac of the VPBE for various outputs
103 */ 105 */
104static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index) 106static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
@@ -109,11 +111,12 @@ static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
109 venc_write(sd, VENC_DACSEL, 0); 111 venc_write(sd, VENC_DACSEL, 0);
110 break; 112 break;
111 case 1: 113 case 1:
112 v4l2_dbg(debug, 1, sd, "Setting output to S-Video\n"); 114 v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
113 venc_write(sd, VENC_DACSEL, 0x210); 115 venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
114 break; 116 break;
115 case 2: 117 case 2:
116 venc_write(sd, VENC_DACSEL, 0x543); 118 v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
119 venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
117 break; 120 break;
118 default: 121 default:
119 return -EINVAL; 122 return -EINVAL;
@@ -124,6 +127,8 @@ static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
124 127
125static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable) 128static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
126{ 129{
130 struct venc_state *venc = to_state(sd);
131 struct venc_platform_data *pdata = venc->pdata;
127 v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n"); 132 v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
128 133
129 if (benable) { 134 if (benable) {
@@ -155,7 +160,8 @@ static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
155 160
156 /* Disable LCD output control (accepting default polarity) */ 161 /* Disable LCD output control (accepting default polarity) */
157 venc_write(sd, VENC_LCDOUT, 0); 162 venc_write(sd, VENC_LCDOUT, 0);
158 venc_write(sd, VENC_CMPNT, 0x100); 163 if (pdata->venc_type != VPBE_VERSION_3)
164 venc_write(sd, VENC_CMPNT, 0x100);
159 venc_write(sd, VENC_HSPLS, 0); 165 venc_write(sd, VENC_HSPLS, 0);
160 venc_write(sd, VENC_HINT, 0); 166 venc_write(sd, VENC_HINT, 0);
161 venc_write(sd, VENC_HSTART, 0); 167 venc_write(sd, VENC_HSTART, 0);
@@ -178,11 +184,14 @@ static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
178 } 184 }
179} 185}
180 186
187#define VDAC_CONFIG_SD_V3 0x0E21A6B6
188#define VDAC_CONFIG_SD_V2 0x081141CF
181/* 189/*
182 * setting NTSC mode 190 * setting NTSC mode
183 */ 191 */
184static int venc_set_ntsc(struct v4l2_subdev *sd) 192static int venc_set_ntsc(struct v4l2_subdev *sd)
185{ 193{
194 u32 val;
186 struct venc_state *venc = to_state(sd); 195 struct venc_state *venc = to_state(sd);
187 struct venc_platform_data *pdata = venc->pdata; 196 struct venc_platform_data *pdata = venc->pdata;
188 197
@@ -195,12 +204,22 @@ static int venc_set_ntsc(struct v4l2_subdev *sd)
195 204
196 venc_enabledigitaloutput(sd, 0); 205 venc_enabledigitaloutput(sd, 0);
197 206
198 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */ 207 if (pdata->venc_type == VPBE_VERSION_3) {
199 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1); 208 venc_write(sd, VENC_CLKCTL, 0x01);
200 /* Set REC656 Mode */ 209 venc_write(sd, VENC_VIDCTL, 0);
201 venc_write(sd, VENC_YCCCTL, 0x1); 210 val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
202 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ); 211 } else if (pdata->venc_type == VPBE_VERSION_2) {
203 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS); 212 venc_write(sd, VENC_CLKCTL, 0x01);
213 venc_write(sd, VENC_VIDCTL, 0);
214 vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
215 } else {
216 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
217 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
218 /* Set REC656 Mode */
219 venc_write(sd, VENC_YCCCTL, 0x1);
220 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
221 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
222 }
204 223
205 venc_write(sd, VENC_VMOD, 0); 224 venc_write(sd, VENC_VMOD, 0);
206 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), 225 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
@@ -220,6 +239,7 @@ static int venc_set_ntsc(struct v4l2_subdev *sd)
220static int venc_set_pal(struct v4l2_subdev *sd) 239static int venc_set_pal(struct v4l2_subdev *sd)
221{ 240{
222 struct venc_state *venc = to_state(sd); 241 struct venc_state *venc = to_state(sd);
242 struct venc_platform_data *pdata = venc->pdata;
223 243
224 v4l2_dbg(debug, 2, sd, "venc_set_pal\n"); 244 v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
225 245
@@ -230,10 +250,20 @@ static int venc_set_pal(struct v4l2_subdev *sd)
230 250
231 venc_enabledigitaloutput(sd, 0); 251 venc_enabledigitaloutput(sd, 0);
232 252
233 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */ 253 if (pdata->venc_type == VPBE_VERSION_3) {
234 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1); 254 venc_write(sd, VENC_CLKCTL, 0x1);
235 /* Set REC656 Mode */ 255 venc_write(sd, VENC_VIDCTL, 0);
236 venc_write(sd, VENC_YCCCTL, 0x1); 256 vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
257 } else if (pdata->venc_type == VPBE_VERSION_2) {
258 venc_write(sd, VENC_CLKCTL, 0x1);
259 venc_write(sd, VENC_VIDCTL, 0);
260 vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
261 } else {
262 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
263 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
264 /* Set REC656 Mode */
265 venc_write(sd, VENC_YCCCTL, 0x1);
266 }
237 267
238 venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT, 268 venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
239 VENC_SYNCCTL_OVD); 269 VENC_SYNCCTL_OVD);
@@ -252,6 +282,7 @@ static int venc_set_pal(struct v4l2_subdev *sd)
252 return 0; 282 return 0;
253} 283}
254 284
285#define VDAC_CONFIG_HD_V2 0x081141EF
255/* 286/*
256 * venc_set_480p59_94 287 * venc_set_480p59_94
257 * 288 *
@@ -263,6 +294,9 @@ static int venc_set_480p59_94(struct v4l2_subdev *sd)
263 struct venc_platform_data *pdata = venc->pdata; 294 struct venc_platform_data *pdata = venc->pdata;
264 295
265 v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n"); 296 v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
297 if ((pdata->venc_type != VPBE_VERSION_1) &&
298 (pdata->venc_type != VPBE_VERSION_2))
299 return -EINVAL;
266 300
267 /* Setup clock at VPSS & VENC for SD */ 301 /* Setup clock at VPSS & VENC for SD */
268 if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_480P59_94) < 0) 302 if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_480P59_94) < 0)
@@ -270,12 +304,18 @@ static int venc_set_480p59_94(struct v4l2_subdev *sd)
270 304
271 venc_enabledigitaloutput(sd, 0); 305 venc_enabledigitaloutput(sd, 0);
272 306
307 if (pdata->venc_type == VPBE_VERSION_2)
308 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
273 venc_write(sd, VENC_OSDCLK0, 0); 309 venc_write(sd, VENC_OSDCLK0, 0);
274 venc_write(sd, VENC_OSDCLK1, 1); 310 venc_write(sd, VENC_OSDCLK1, 1);
275 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ, 311
276 VENC_VDPRO_DAFRQ); 312 if (pdata->venc_type == VPBE_VERSION_1) {
277 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS, 313 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
278 VENC_VDPRO_DAUPS); 314 VENC_VDPRO_DAFRQ);
315 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
316 VENC_VDPRO_DAUPS);
317 }
318
279 venc_write(sd, VENC_VMOD, 0); 319 venc_write(sd, VENC_VMOD, 0);
280 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), 320 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
281 VENC_VMOD_VIE); 321 VENC_VMOD_VIE);
@@ -302,19 +342,27 @@ static int venc_set_576p50(struct v4l2_subdev *sd)
302 342
303 v4l2_dbg(debug, 2, sd, "venc_set_576p50\n"); 343 v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
304 344
345 if ((pdata->venc_type != VPBE_VERSION_1) &&
346 (pdata->venc_type != VPBE_VERSION_2))
347 return -EINVAL;
305 /* Setup clock at VPSS & VENC for SD */ 348 /* Setup clock at VPSS & VENC for SD */
306 if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_576P50) < 0) 349 if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_576P50) < 0)
307 return -EINVAL; 350 return -EINVAL;
308 351
309 venc_enabledigitaloutput(sd, 0); 352 venc_enabledigitaloutput(sd, 0);
310 353
354 if (pdata->venc_type == VPBE_VERSION_2)
355 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
356
311 venc_write(sd, VENC_OSDCLK0, 0); 357 venc_write(sd, VENC_OSDCLK0, 0);
312 venc_write(sd, VENC_OSDCLK1, 1); 358 venc_write(sd, VENC_OSDCLK1, 1);
313 359
314 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ, 360 if (pdata->venc_type == VPBE_VERSION_1) {
315 VENC_VDPRO_DAFRQ); 361 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
316 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS, 362 VENC_VDPRO_DAFRQ);
317 VENC_VDPRO_DAUPS); 363 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
364 VENC_VDPRO_DAUPS);
365 }
318 366
319 venc_write(sd, VENC_VMOD, 0); 367 venc_write(sd, VENC_VMOD, 0);
320 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), 368 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
@@ -330,6 +378,63 @@ static int venc_set_576p50(struct v4l2_subdev *sd)
330 return 0; 378 return 0;
331} 379}
332 380
381/*
382 * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
383 */
384static int venc_set_720p60_internal(struct v4l2_subdev *sd)
385{
386 struct venc_state *venc = to_state(sd);
387 struct venc_platform_data *pdata = venc->pdata;
388
389 if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_720P60) < 0)
390 return -EINVAL;
391
392 venc_enabledigitaloutput(sd, 0);
393
394 venc_write(sd, VENC_OSDCLK0, 0);
395 venc_write(sd, VENC_OSDCLK1, 1);
396
397 venc_write(sd, VENC_VMOD, 0);
398 /* DM365 component HD mode */
399 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
400 VENC_VMOD_VIE);
401 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
402 venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
403 VENC_VMOD_TVTYP);
404 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
405 venc_write(sd, VENC_XHINTVL, 0);
406 return 0;
407}
408
409/*
410 * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
411 */
412static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
413{
414 struct venc_state *venc = to_state(sd);
415 struct venc_platform_data *pdata = venc->pdata;
416
417 if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_1080P30) < 0)
418 return -EINVAL;
419
420 venc_enabledigitaloutput(sd, 0);
421
422 venc_write(sd, VENC_OSDCLK0, 0);
423 venc_write(sd, VENC_OSDCLK1, 1);
424
425
426 venc_write(sd, VENC_VMOD, 0);
427 /* DM365 component HD mode */
428 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
429 VENC_VMOD_VIE);
430 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
431 venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
432 VENC_VMOD_TVTYP);
433 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
434 venc_write(sd, VENC_XHINTVL, 0);
435 return 0;
436}
437
333static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm) 438static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
334{ 439{
335 v4l2_dbg(debug, 1, sd, "venc_s_std_output\n"); 440 v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
@@ -345,13 +450,30 @@ static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
345static int venc_s_dv_preset(struct v4l2_subdev *sd, 450static int venc_s_dv_preset(struct v4l2_subdev *sd,
346 struct v4l2_dv_preset *dv_preset) 451 struct v4l2_dv_preset *dv_preset)
347{ 452{
453 struct venc_state *venc = to_state(sd);
454 int ret;
455
348 v4l2_dbg(debug, 1, sd, "venc_s_dv_preset\n"); 456 v4l2_dbg(debug, 1, sd, "venc_s_dv_preset\n");
349 457
350 if (dv_preset->preset == V4L2_DV_576P50) 458 if (dv_preset->preset == V4L2_DV_576P50)
351 return venc_set_576p50(sd); 459 return venc_set_576p50(sd);
352 else if (dv_preset->preset == V4L2_DV_480P59_94) 460 else if (dv_preset->preset == V4L2_DV_480P59_94)
353 return venc_set_480p59_94(sd); 461 return venc_set_480p59_94(sd);
354 462 else if ((dv_preset->preset == V4L2_DV_720P60) &&
463 (venc->pdata->venc_type == VPBE_VERSION_2)) {
464 /* TBD setup internal 720p mode here */
465 ret = venc_set_720p60_internal(sd);
466 /* for DM365 VPBE, there is DAC inside */
467 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
468 return ret;
469 } else if ((dv_preset->preset == V4L2_DV_1080I30) &&
470 (venc->pdata->venc_type == VPBE_VERSION_2)) {
471 /* TBD setup internal 1080i mode here */
472 ret = venc_set_1080i30_internal(sd);
473 /* for DM365 VPBE, there is DAC inside */
474 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
475 return ret;
476 }
355 return -EINVAL; 477 return -EINVAL;
356} 478}
357 479
@@ -508,11 +630,41 @@ static int venc_probe(struct platform_device *pdev)
508 goto release_venc_mem_region; 630 goto release_venc_mem_region;
509 } 631 }
510 632
633 if (venc->pdata->venc_type != VPBE_VERSION_1) {
634 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
635 if (!res) {
636 dev_err(venc->pdev,
637 "Unable to get VDAC_CONFIG address map\n");
638 ret = -ENODEV;
639 goto unmap_venc_io;
640 }
641
642 if (!request_mem_region(res->start,
643 resource_size(res), "venc")) {
644 dev_err(venc->pdev,
645 "Unable to reserve VDAC_CONFIG MMIO region\n");
646 ret = -ENODEV;
647 goto unmap_venc_io;
648 }
649
650 venc->vdaccfg_reg = ioremap_nocache(res->start,
651 resource_size(res));
652 if (!venc->vdaccfg_reg) {
653 dev_err(venc->pdev,
654 "Unable to map VDAC_CONFIG IO space\n");
655 ret = -ENODEV;
656 goto release_vdaccfg_mem_region;
657 }
658 }
511 spin_lock_init(&venc->lock); 659 spin_lock_init(&venc->lock);
512 platform_set_drvdata(pdev, venc); 660 platform_set_drvdata(pdev, venc);
513 dev_notice(venc->pdev, "VENC sub device probe success\n"); 661 dev_notice(venc->pdev, "VENC sub device probe success\n");
514 return 0; 662 return 0;
515 663
664release_vdaccfg_mem_region:
665 release_mem_region(res->start, resource_size(res));
666unmap_venc_io:
667 iounmap(venc->venc_base);
516release_venc_mem_region: 668release_venc_mem_region:
517 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 669 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
518 release_mem_region(res->start, resource_size(res)); 670 release_mem_region(res->start, resource_size(res));
@@ -529,6 +681,11 @@ static int venc_remove(struct platform_device *pdev)
529 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 681 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
530 iounmap((void *)venc->venc_base); 682 iounmap((void *)venc->venc_base);
531 release_mem_region(res->start, resource_size(res)); 683 release_mem_region(res->start, resource_size(res));
684 if (venc->pdata->venc_type != VPBE_VERSION_1) {
685 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
686 iounmap((void *)venc->vdaccfg_reg);
687 release_mem_region(res->start, resource_size(res));
688 }
532 kfree(venc); 689 kfree(venc);
533 690
534 return 0; 691 return 0;
@@ -543,23 +700,7 @@ static struct platform_driver venc_driver = {
543 }, 700 },
544}; 701};
545 702
546static int venc_init(void) 703module_platform_driver(venc_driver);
547{
548 if (platform_driver_register(&venc_driver)) {
549 printk(KERN_ERR "Unable to register venc driver\n");
550 return -ENODEV;
551 }
552 return 0;
553}
554
555static void venc_exit(void)
556{
557 platform_driver_unregister(&venc_driver);
558 return;
559}
560
561module_init(venc_init);
562module_exit(venc_exit);
563 704
564MODULE_LICENSE("GPL"); 705MODULE_LICENSE("GPL");
565MODULE_DESCRIPTION("VPBE VENC Driver"); 706MODULE_DESCRIPTION("VPBE VENC Driver");
diff --git a/drivers/media/video/davinci/vpfe_capture.c b/drivers/media/video/davinci/vpfe_capture.c
index 5b38fc93ff2..20cf271a774 100644
--- a/drivers/media/video/davinci/vpfe_capture.c
+++ b/drivers/media/video/davinci/vpfe_capture.c
@@ -2076,20 +2076,4 @@ static struct platform_driver vpfe_driver = {
2076 .remove = __devexit_p(vpfe_remove), 2076 .remove = __devexit_p(vpfe_remove),
2077}; 2077};
2078 2078
2079static __init int vpfe_init(void) 2079module_platform_driver(vpfe_driver);
2080{
2081 printk(KERN_NOTICE "vpfe_init\n");
2082 /* Register driver to the kernel */
2083 return platform_driver_register(&vpfe_driver);
2084}
2085
2086/*
2087 * vpfe_cleanup : This function un-registers device driver
2088 */
2089static void vpfe_cleanup(void)
2090{
2091 platform_driver_unregister(&vpfe_driver);
2092}
2093
2094module_init(vpfe_init);
2095module_exit(vpfe_cleanup);
diff --git a/drivers/media/video/davinci/vpif_capture.c b/drivers/media/video/davinci/vpif_capture.c
index 49e4deb5004..6504e40a31d 100644
--- a/drivers/media/video/davinci/vpif_capture.c
+++ b/drivers/media/video/davinci/vpif_capture.c
@@ -2177,6 +2177,12 @@ static __init int vpif_probe(struct platform_device *pdev)
2177 return err; 2177 return err;
2178 } 2178 }
2179 2179
2180 err = v4l2_device_register(vpif_dev, &vpif_obj.v4l2_dev);
2181 if (err) {
2182 v4l2_err(vpif_dev->driver, "Error registering v4l2 device\n");
2183 return err;
2184 }
2185
2180 k = 0; 2186 k = 0;
2181 while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, k))) { 2187 while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, k))) {
2182 for (i = res->start; i <= res->end; i++) { 2188 for (i = res->start; i <= res->end; i++) {
@@ -2246,12 +2252,6 @@ static __init int vpif_probe(struct platform_device *pdev)
2246 goto probe_out; 2252 goto probe_out;
2247 } 2253 }
2248 2254
2249 err = v4l2_device_register(vpif_dev, &vpif_obj.v4l2_dev);
2250 if (err) {
2251 v4l2_err(vpif_dev->driver, "Error registering v4l2 device\n");
2252 goto probe_subdev_out;
2253 }
2254
2255 for (i = 0; i < subdev_count; i++) { 2255 for (i = 0; i < subdev_count; i++) {
2256 subdevdata = &config->subdev_info[i]; 2256 subdevdata = &config->subdev_info[i];
2257 vpif_obj.sd[i] = 2257 vpif_obj.sd[i] =
@@ -2281,7 +2281,6 @@ probe_subdev_out:
2281 2281
2282 j = VPIF_CAPTURE_MAX_DEVICES; 2282 j = VPIF_CAPTURE_MAX_DEVICES;
2283probe_out: 2283probe_out:
2284 v4l2_device_unregister(&vpif_obj.v4l2_dev);
2285 for (k = 0; k < j; k++) { 2284 for (k = 0; k < j; k++) {
2286 /* Get the pointer to the channel object */ 2285 /* Get the pointer to the channel object */
2287 ch = vpif_obj.dev[k]; 2286 ch = vpif_obj.dev[k];
@@ -2303,6 +2302,7 @@ vpif_int_err:
2303 if (res) 2302 if (res)
2304 i = res->end; 2303 i = res->end;
2305 } 2304 }
2305 v4l2_device_unregister(&vpif_obj.v4l2_dev);
2306 return err; 2306 return err;
2307} 2307}
2308 2308
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c
index cff0768afbf..e2a7b77c39c 100644
--- a/drivers/media/video/em28xx/em28xx-audio.c
+++ b/drivers/media/video/em28xx/em28xx-audio.c
@@ -193,7 +193,7 @@ static int em28xx_init_audio_isoc(struct em28xx *dev)
193 193
194 urb->dev = dev->udev; 194 urb->dev = dev->udev;
195 urb->context = dev; 195 urb->context = dev;
196 urb->pipe = usb_rcvisocpipe(dev->udev, 0x83); 196 urb->pipe = usb_rcvisocpipe(dev->udev, EM28XX_EP_AUDIO);
197 urb->transfer_flags = URB_ISO_ASAP; 197 urb->transfer_flags = URB_ISO_ASAP;
198 urb->transfer_buffer = dev->adev.transfer_buffer[i]; 198 urb->transfer_buffer = dev->adev.transfer_buffer[i];
199 urb->interval = 1; 199 urb->interval = 1;
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 93807dcf944..4561cd89938 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -336,6 +336,23 @@ static struct em28xx_reg_seq pctv_460e[] = {
336 { -1, -1, -1, -1}, 336 { -1, -1, -1, -1},
337}; 337};
338 338
339#if 0
340static struct em28xx_reg_seq hauppauge_930c_gpio[] = {
341 {EM2874_R80_GPIO, 0x6f, 0xff, 10},
342 {EM2874_R80_GPIO, 0x4f, 0xff, 10}, /* xc5000 reset */
343 {EM2874_R80_GPIO, 0x6f, 0xff, 10},
344 {EM2874_R80_GPIO, 0x4f, 0xff, 10},
345 { -1, -1, -1, -1},
346};
347
348static struct em28xx_reg_seq hauppauge_930c_digital[] = {
349 {EM2874_R80_GPIO, 0xf6, 0xff, 10},
350 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
351 {EM2874_R80_GPIO, 0xa6, 0xff, 10},
352 { -1, -1, -1, -1},
353};
354#endif
355
339/* 356/*
340 * Board definitions 357 * Board definitions
341 */ 358 */
@@ -839,6 +856,10 @@ struct em28xx_board em28xx_boards[] = {
839 [EM2870_BOARD_KWORLD_355U] = { 856 [EM2870_BOARD_KWORLD_355U] = {
840 .name = "Kworld 355 U DVB-T", 857 .name = "Kworld 355 U DVB-T",
841 .valid = EM28XX_BOARD_NOT_VALIDATED, 858 .valid = EM28XX_BOARD_NOT_VALIDATED,
859 .tuner_type = TUNER_ABSENT,
860 .tuner_gpio = default_tuner_gpio,
861 .has_dvb = 1,
862 .dvb_gpio = default_digital,
842 }, 863 },
843 [EM2870_BOARD_PINNACLE_PCTV_DVB] = { 864 [EM2870_BOARD_PINNACLE_PCTV_DVB] = {
844 .name = "Pinnacle PCTV DVB-T", 865 .name = "Pinnacle PCTV DVB-T",
@@ -887,6 +908,37 @@ struct em28xx_board em28xx_boards[] = {
887 .tuner_addr = 0x41, 908 .tuner_addr = 0x41,
888 .dvb_gpio = terratec_h5_digital, /* FIXME: probably wrong */ 909 .dvb_gpio = terratec_h5_digital, /* FIXME: probably wrong */
889 .tuner_gpio = terratec_h5_gpio, 910 .tuner_gpio = terratec_h5_gpio,
911#else
912 .tuner_type = TUNER_ABSENT,
913#endif
914 .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT |
915 EM28XX_I2C_CLK_WAIT_ENABLE |
916 EM28XX_I2C_FREQ_400_KHZ,
917 },
918 [EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C] = {
919 .name = "Hauppauge WinTV HVR 930C",
920 .has_dvb = 1,
921#if 0 /* FIXME: Add analog support */
922 .tuner_type = TUNER_XC5000,
923 .tuner_addr = 0x41,
924 .dvb_gpio = hauppauge_930c_digital,
925 .tuner_gpio = hauppauge_930c_gpio,
926#else
927 .tuner_type = TUNER_ABSENT,
928#endif
929 .ir_codes = RC_MAP_HAUPPAUGE,
930 .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT |
931 EM28XX_I2C_CLK_WAIT_ENABLE |
932 EM28XX_I2C_FREQ_400_KHZ,
933 },
934 [EM2884_BOARD_CINERGY_HTC_STICK] = {
935 .name = "Terratec Cinergy HTC Stick",
936 .has_dvb = 1,
937#if 0
938 .tuner_type = TUNER_PHILIPS_TDA8290,
939 .tuner_addr = 0x41,
940 .dvb_gpio = terratec_h5_digital, /* FIXME: probably wrong */
941 .tuner_gpio = terratec_h5_gpio,
890#endif 942#endif
891 .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT | 943 .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT |
892 EM28XX_I2C_CLK_WAIT_ENABLE | 944 EM28XX_I2C_CLK_WAIT_ENABLE |
@@ -1127,7 +1179,7 @@ struct em28xx_board em28xx_boards[] = {
1127 .name = "Terratec Cinergy 200 USB", 1179 .name = "Terratec Cinergy 200 USB",
1128 .is_em2800 = 1, 1180 .is_em2800 = 1,
1129 .has_ir_i2c = 1, 1181 .has_ir_i2c = 1,
1130 .tuner_type = TUNER_LG_PAL_NEW_TAPC, 1182 .tuner_type = TUNER_LG_TALN,
1131 .tda9887_conf = TDA9887_PRESENT, 1183 .tda9887_conf = TDA9887_PRESENT,
1132 .decoder = EM28XX_SAA711X, 1184 .decoder = EM28XX_SAA711X,
1133 .input = { { 1185 .input = { {
@@ -1218,7 +1270,7 @@ struct em28xx_board em28xx_boards[] = {
1218 }, 1270 },
1219 [EM2820_BOARD_PINNACLE_DVC_90] = { 1271 [EM2820_BOARD_PINNACLE_DVC_90] = {
1220 .name = "Pinnacle Dazzle DVC 90/100/101/107 / Kaiser Baas Video to DVD maker " 1272 .name = "Pinnacle Dazzle DVC 90/100/101/107 / Kaiser Baas Video to DVD maker "
1221 "/ Kworld DVD Maker 2", 1273 "/ Kworld DVD Maker 2 / Plextor ConvertX PX-AV100U",
1222 .tuner_type = TUNER_ABSENT, /* capture only board */ 1274 .tuner_type = TUNER_ABSENT, /* capture only board */
1223 .decoder = EM28XX_SAA711X, 1275 .decoder = EM28XX_SAA711X,
1224 .input = { { 1276 .input = { {
@@ -1840,6 +1892,22 @@ struct em28xx_board em28xx_boards[] = {
1840 .has_dvb = 1, 1892 .has_dvb = 1,
1841 .ir_codes = RC_MAP_PINNACLE_PCTV_HD, 1893 .ir_codes = RC_MAP_PINNACLE_PCTV_HD,
1842 }, 1894 },
1895 /* eb1a:5006 Honestech VIDBOX NW03
1896 * Empia EM2860, Philips SAA7113, Empia EMP202, No Tuner */
1897 [EM2860_BOARD_HT_VIDBOX_NW03] = {
1898 .name = "Honestech Vidbox NW03",
1899 .tuner_type = TUNER_ABSENT,
1900 .decoder = EM28XX_SAA711X,
1901 .input = { {
1902 .type = EM28XX_VMUX_COMPOSITE1,
1903 .vmux = SAA7115_COMPOSITE0,
1904 .amux = EM28XX_AMUX_LINE_IN,
1905 }, {
1906 .type = EM28XX_VMUX_SVIDEO,
1907 .vmux = SAA7115_SVIDEO3, /* S-VIDEO needs confirming */
1908 .amux = EM28XX_AMUX_LINE_IN,
1909 } },
1910 },
1843}; 1911};
1844const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards); 1912const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards);
1845 1913
@@ -1899,6 +1967,8 @@ struct usb_device_id em28xx_id_table[] = {
1899 .driver_info = EM2800_BOARD_GRABBEEX_USB2800 }, 1967 .driver_info = EM2800_BOARD_GRABBEEX_USB2800 },
1900 { USB_DEVICE(0xeb1a, 0xe357), 1968 { USB_DEVICE(0xeb1a, 0xe357),
1901 .driver_info = EM2870_BOARD_KWORLD_355U }, 1969 .driver_info = EM2870_BOARD_KWORLD_355U },
1970 { USB_DEVICE(0xeb1a, 0xe359),
1971 .driver_info = EM2870_BOARD_KWORLD_355U },
1902 { USB_DEVICE(0x1b80, 0xe302), 1972 { USB_DEVICE(0x1b80, 0xe302),
1903 .driver_info = EM2820_BOARD_PINNACLE_DVC_90 }, /* Kaiser Baas Video to DVD maker */ 1973 .driver_info = EM2820_BOARD_PINNACLE_DVC_90 }, /* Kaiser Baas Video to DVD maker */
1904 { USB_DEVICE(0x1b80, 0xe304), 1974 { USB_DEVICE(0x1b80, 0xe304),
@@ -1914,17 +1984,23 @@ struct usb_device_id em28xx_id_table[] = {
1914 { USB_DEVICE(0x0ccd, 0x0042), 1984 { USB_DEVICE(0x0ccd, 0x0042),
1915 .driver_info = EM2882_BOARD_TERRATEC_HYBRID_XS }, 1985 .driver_info = EM2882_BOARD_TERRATEC_HYBRID_XS },
1916 { USB_DEVICE(0x0ccd, 0x0043), 1986 { USB_DEVICE(0x0ccd, 0x0043),
1987 .driver_info = EM2870_BOARD_TERRATEC_XS },
1988 { USB_DEVICE(0x0ccd, 0x008e), /* Cinergy HTC USB XS Rev. 1 */
1989 .driver_info = EM2884_BOARD_TERRATEC_H5 },
1990 { USB_DEVICE(0x0ccd, 0x00ac), /* Cinergy HTC USB XS Rev. 2 */
1991 .driver_info = EM2884_BOARD_TERRATEC_H5 },
1992 { USB_DEVICE(0x0ccd, 0x10a2), /* H5 Rev. 1 */
1917 .driver_info = EM2884_BOARD_TERRATEC_H5 }, 1993 .driver_info = EM2884_BOARD_TERRATEC_H5 },
1918 { USB_DEVICE(0x0ccd, 0x10a2), /* Rev. 1 */ 1994 { USB_DEVICE(0x0ccd, 0x10ad), /* H5 Rev. 2 */
1919 .driver_info = EM2884_BOARD_TERRATEC_H5 }, 1995 .driver_info = EM2884_BOARD_TERRATEC_H5 },
1920 { USB_DEVICE(0x0ccd, 0x10ad), /* Rev. 2 */
1921 .driver_info = EM2880_BOARD_TERRATEC_PRODIGY_XS },
1922 { USB_DEVICE(0x0ccd, 0x0084), 1996 { USB_DEVICE(0x0ccd, 0x0084),
1923 .driver_info = EM2860_BOARD_TERRATEC_AV350 }, 1997 .driver_info = EM2860_BOARD_TERRATEC_AV350 },
1924 { USB_DEVICE(0x0ccd, 0x0096), 1998 { USB_DEVICE(0x0ccd, 0x0096),
1925 .driver_info = EM2860_BOARD_TERRATEC_GRABBY }, 1999 .driver_info = EM2860_BOARD_TERRATEC_GRABBY },
1926 { USB_DEVICE(0x0ccd, 0x10AF), 2000 { USB_DEVICE(0x0ccd, 0x10AF),
1927 .driver_info = EM2860_BOARD_TERRATEC_GRABBY }, 2001 .driver_info = EM2860_BOARD_TERRATEC_GRABBY },
2002 { USB_DEVICE(0x0ccd, 0x00b2),
2003 .driver_info = EM2884_BOARD_CINERGY_HTC_STICK },
1928 { USB_DEVICE(0x0fd9, 0x0033), 2004 { USB_DEVICE(0x0fd9, 0x0033),
1929 .driver_info = EM2860_BOARD_ELGATO_VIDEO_CAPTURE}, 2005 .driver_info = EM2860_BOARD_ELGATO_VIDEO_CAPTURE},
1930 { USB_DEVICE(0x185b, 0x2870), 2006 { USB_DEVICE(0x185b, 0x2870),
@@ -1963,6 +2039,8 @@ struct usb_device_id em28xx_id_table[] = {
1963 .driver_info = EM2880_BOARD_PINNACLE_PCTV_HD_PRO }, 2039 .driver_info = EM2880_BOARD_PINNACLE_PCTV_HD_PRO },
1964 { USB_DEVICE(0x0413, 0x6023), 2040 { USB_DEVICE(0x0413, 0x6023),
1965 .driver_info = EM2800_BOARD_LEADTEK_WINFAST_USBII }, 2041 .driver_info = EM2800_BOARD_LEADTEK_WINFAST_USBII },
2042 { USB_DEVICE(0x093b, 0xa003),
2043 .driver_info = EM2820_BOARD_PINNACLE_DVC_90 },
1966 { USB_DEVICE(0x093b, 0xa005), 2044 { USB_DEVICE(0x093b, 0xa005),
1967 .driver_info = EM2861_BOARD_PLEXTOR_PX_TV100U }, 2045 .driver_info = EM2861_BOARD_PLEXTOR_PX_TV100U },
1968 { USB_DEVICE(0x04bb, 0x0515), 2046 { USB_DEVICE(0x04bb, 0x0515),
@@ -1975,6 +2053,12 @@ struct usb_device_id em28xx_id_table[] = {
1975 .driver_info = EM28174_BOARD_PCTV_290E }, 2053 .driver_info = EM28174_BOARD_PCTV_290E },
1976 { USB_DEVICE(0x2013, 0x024c), 2054 { USB_DEVICE(0x2013, 0x024c),
1977 .driver_info = EM28174_BOARD_PCTV_460E }, 2055 .driver_info = EM28174_BOARD_PCTV_460E },
2056 { USB_DEVICE(0x2040, 0x1605),
2057 .driver_info = EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C },
2058 { USB_DEVICE(0xeb1a, 0x5006),
2059 .driver_info = EM2860_BOARD_HT_VIDBOX_NW03 },
2060 { USB_DEVICE(0x1b80, 0xe309), /* Sveon STV40 */
2061 .driver_info = EM2860_BOARD_EASYCAP },
1978 { }, 2062 { },
1979}; 2063};
1980MODULE_DEVICE_TABLE(usb, em28xx_id_table); 2064MODULE_DEVICE_TABLE(usb, em28xx_id_table);
@@ -2028,10 +2112,10 @@ int em28xx_tuner_callback(void *ptr, int component, int command, int arg)
2028 int rc = 0; 2112 int rc = 0;
2029 struct em28xx *dev = ptr; 2113 struct em28xx *dev = ptr;
2030 2114
2031 if (dev->tuner_type != TUNER_XC2028) 2115 if (dev->tuner_type != TUNER_XC2028 && dev->tuner_type != TUNER_XC5000)
2032 return 0; 2116 return 0;
2033 2117
2034 if (command != XC2028_TUNER_RESET) 2118 if (command != XC2028_TUNER_RESET && command != XC5000_TUNER_RESET)
2035 return 0; 2119 return 0;
2036 2120
2037 rc = em28xx_gpio_set(dev, dev->board.tuner_gpio); 2121 rc = em28xx_gpio_set(dev, dev->board.tuner_gpio);
@@ -2203,7 +2287,8 @@ void em28xx_pre_card_setup(struct em28xx *dev)
2203 /* Set the initial XCLK and I2C clock values based on the board 2287 /* Set the initial XCLK and I2C clock values based on the board
2204 definition */ 2288 definition */
2205 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk & 0x7f); 2289 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk & 0x7f);
2206 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, dev->board.i2c_speed); 2290 if (!dev->board.is_em2800)
2291 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, dev->board.i2c_speed);
2207 msleep(50); 2292 msleep(50);
2208 2293
2209 /* request some modules */ 2294 /* request some modules */
@@ -2832,11 +2917,10 @@ void em28xx_release_resources(struct em28xx *dev)
2832 * em28xx_init_dev() 2917 * em28xx_init_dev()
2833 * allocates and inits the device structs, registers i2c bus and v4l device 2918 * allocates and inits the device structs, registers i2c bus and v4l device
2834 */ 2919 */
2835static int em28xx_init_dev(struct em28xx **devhandle, struct usb_device *udev, 2920static int em28xx_init_dev(struct em28xx *dev, struct usb_device *udev,
2836 struct usb_interface *interface, 2921 struct usb_interface *interface,
2837 int minor) 2922 int minor)
2838{ 2923{
2839 struct em28xx *dev = *devhandle;
2840 int retval; 2924 int retval;
2841 2925
2842 dev->udev = udev; 2926 dev->udev = udev;
@@ -2931,7 +3015,7 @@ static int em28xx_init_dev(struct em28xx **devhandle, struct usb_device *udev,
2931 3015
2932 if (!dev->board.is_em2800) { 3016 if (!dev->board.is_em2800) {
2933 /* Resets I2C speed */ 3017 /* Resets I2C speed */
2934 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, dev->board.i2c_speed); 3018 retval = em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, dev->board.i2c_speed);
2935 if (retval < 0) { 3019 if (retval < 0) {
2936 em28xx_errdev("%s: em28xx_write_reg failed!" 3020 em28xx_errdev("%s: em28xx_write_reg failed!"
2937 " retval [%d]\n", 3021 " retval [%d]\n",
@@ -3031,12 +3115,11 @@ unregister_dev:
3031static int em28xx_usb_probe(struct usb_interface *interface, 3115static int em28xx_usb_probe(struct usb_interface *interface,
3032 const struct usb_device_id *id) 3116 const struct usb_device_id *id)
3033{ 3117{
3034 const struct usb_endpoint_descriptor *endpoint;
3035 struct usb_device *udev; 3118 struct usb_device *udev;
3036 struct em28xx *dev = NULL; 3119 struct em28xx *dev = NULL;
3037 int retval; 3120 int retval;
3038 bool is_audio_only = false, has_audio = false; 3121 bool has_audio = false, has_video = false, has_dvb = false;
3039 int i, nr, isoc_pipe; 3122 int i, nr;
3040 const int ifnum = interface->altsetting[0].desc.bInterfaceNumber; 3123 const int ifnum = interface->altsetting[0].desc.bInterfaceNumber;
3041 char *speed; 3124 char *speed;
3042 char descr[255] = ""; 3125 char descr[255] = "";
@@ -3068,54 +3151,65 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3068 goto err; 3151 goto err;
3069 } 3152 }
3070 3153
3154 /* allocate memory for our device state and initialize it */
3155 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
3156 if (dev == NULL) {
3157 em28xx_err(DRIVER_NAME ": out of memory!\n");
3158 retval = -ENOMEM;
3159 goto err;
3160 }
3161
3162 /* compute alternate max packet sizes */
3163 dev->alt_max_pkt_size = kmalloc(sizeof(dev->alt_max_pkt_size[0]) *
3164 interface->num_altsetting, GFP_KERNEL);
3165 if (dev->alt_max_pkt_size == NULL) {
3166 em28xx_errdev("out of memory!\n");
3167 kfree(dev);
3168 retval = -ENOMEM;
3169 goto err;
3170 }
3171
3071 /* Get endpoints */ 3172 /* Get endpoints */
3072 for (i = 0; i < interface->num_altsetting; i++) { 3173 for (i = 0; i < interface->num_altsetting; i++) {
3073 int ep; 3174 int ep;
3074 3175
3075 for (ep = 0; ep < interface->altsetting[i].desc.bNumEndpoints; ep++) { 3176 for (ep = 0; ep < interface->altsetting[i].desc.bNumEndpoints; ep++) {
3076 struct usb_host_endpoint *e; 3177 const struct usb_endpoint_descriptor *e;
3077 e = &interface->altsetting[i].endpoint[ep]; 3178 int sizedescr, size;
3078 3179
3079 if (e->desc.bEndpointAddress == 0x83) 3180 e = &interface->altsetting[i].endpoint[ep].desc;
3080 has_audio = true; 3181
3182 sizedescr = le16_to_cpu(e->wMaxPacketSize);
3183 size = sizedescr & 0x7ff;
3184
3185 if (udev->speed == USB_SPEED_HIGH)
3186 size = size * hb_mult(sizedescr);
3187
3188 if (usb_endpoint_xfer_isoc(e) &&
3189 usb_endpoint_dir_in(e)) {
3190 switch (e->bEndpointAddress) {
3191 case EM28XX_EP_AUDIO:
3192 has_audio = true;
3193 break;
3194 case EM28XX_EP_ANALOG:
3195 has_video = true;
3196 dev->alt_max_pkt_size[i] = size;
3197 break;
3198 case EM28XX_EP_DIGITAL:
3199 has_dvb = true;
3200 if (size > dev->dvb_max_pkt_size) {
3201 dev->dvb_max_pkt_size = size;
3202 dev->dvb_alt = i;
3203 }
3204 break;
3205 }
3206 }
3081 } 3207 }
3082 } 3208 }
3083 3209
3084 endpoint = &interface->cur_altsetting->endpoint[0].desc; 3210 if (!(has_audio || has_video || has_dvb)) {
3085 3211 retval = -ENODEV;
3086 /* check if the device has the iso in endpoint at the correct place */ 3212 goto err_free;
3087 if (usb_endpoint_xfer_isoc(endpoint)
3088 &&
3089 (interface->altsetting[1].endpoint[0].desc.wMaxPacketSize == 940)) {
3090 /* It's a newer em2874/em2875 device */
3091 isoc_pipe = 0;
3092 } else {
3093 int check_interface = 1;
3094 isoc_pipe = 1;
3095 endpoint = &interface->cur_altsetting->endpoint[1].desc;
3096 if (!usb_endpoint_xfer_isoc(endpoint))
3097 check_interface = 0;
3098
3099 if (usb_endpoint_dir_out(endpoint))
3100 check_interface = 0;
3101
3102 if (!check_interface) {
3103 if (has_audio) {
3104 is_audio_only = true;
3105 } else {
3106 em28xx_err(DRIVER_NAME " video device (%04x:%04x): "
3107 "interface %i, class %i found.\n",
3108 le16_to_cpu(udev->descriptor.idVendor),
3109 le16_to_cpu(udev->descriptor.idProduct),
3110 ifnum,
3111 interface->altsetting[0].desc.bInterfaceClass);
3112 em28xx_err(DRIVER_NAME " This is an anciliary "
3113 "interface not used by the driver\n");
3114
3115 retval = -ENODEV;
3116 goto err;
3117 }
3118 }
3119 } 3213 }
3120 3214
3121 switch (udev->speed) { 3215 switch (udev->speed) {
@@ -3141,6 +3235,7 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3141 strlcat(descr, " ", sizeof(descr)); 3235 strlcat(descr, " ", sizeof(descr));
3142 strlcat(descr, udev->product, sizeof(descr)); 3236 strlcat(descr, udev->product, sizeof(descr));
3143 } 3237 }
3238
3144 if (*descr) 3239 if (*descr)
3145 strlcat(descr, " ", sizeof(descr)); 3240 strlcat(descr, " ", sizeof(descr));
3146 3241
@@ -3157,6 +3252,14 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3157 printk(KERN_INFO DRIVER_NAME 3252 printk(KERN_INFO DRIVER_NAME
3158 ": Audio Vendor Class interface %i found\n", 3253 ": Audio Vendor Class interface %i found\n",
3159 ifnum); 3254 ifnum);
3255 if (has_video)
3256 printk(KERN_INFO DRIVER_NAME
3257 ": Video interface %i found\n",
3258 ifnum);
3259 if (has_dvb)
3260 printk(KERN_INFO DRIVER_NAME
3261 ": DVB interface %i found\n",
3262 ifnum);
3160 3263
3161 /* 3264 /*
3162 * Make sure we have 480 Mbps of bandwidth, otherwise things like 3265 * Make sure we have 480 Mbps of bandwidth, otherwise things like
@@ -3168,22 +3271,14 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3168 printk(DRIVER_NAME ": Device must be connected to a high-speed" 3271 printk(DRIVER_NAME ": Device must be connected to a high-speed"
3169 " USB 2.0 port.\n"); 3272 " USB 2.0 port.\n");
3170 retval = -ENODEV; 3273 retval = -ENODEV;
3171 goto err; 3274 goto err_free;
3172 }
3173
3174 /* allocate memory for our device state and initialize it */
3175 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
3176 if (dev == NULL) {
3177 em28xx_err(DRIVER_NAME ": out of memory!\n");
3178 retval = -ENOMEM;
3179 goto err;
3180 } 3275 }
3181 3276
3182 snprintf(dev->name, sizeof(dev->name), "em28xx #%d", nr); 3277 snprintf(dev->name, sizeof(dev->name), "em28xx #%d", nr);
3183 dev->devno = nr; 3278 dev->devno = nr;
3184 dev->model = id->driver_info; 3279 dev->model = id->driver_info;
3185 dev->alt = -1; 3280 dev->alt = -1;
3186 dev->is_audio_only = is_audio_only; 3281 dev->is_audio_only = has_audio && !(has_video || has_dvb);
3187 dev->has_alsa_audio = has_audio; 3282 dev->has_alsa_audio = has_audio;
3188 dev->audio_ifnum = ifnum; 3283 dev->audio_ifnum = ifnum;
3189 3284
@@ -3196,26 +3291,7 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3196 } 3291 }
3197 } 3292 }
3198 3293
3199 /* compute alternate max packet sizes */
3200 dev->num_alt = interface->num_altsetting; 3294 dev->num_alt = interface->num_altsetting;
3201 dev->alt_max_pkt_size = kmalloc(32 * dev->num_alt, GFP_KERNEL);
3202
3203 if (dev->alt_max_pkt_size == NULL) {
3204 em28xx_errdev("out of memory!\n");
3205 kfree(dev);
3206 retval = -ENOMEM;
3207 goto err;
3208 }
3209
3210 for (i = 0; i < dev->num_alt ; i++) {
3211 u16 tmp = le16_to_cpu(interface->altsetting[i].endpoint[isoc_pipe].desc.wMaxPacketSize);
3212 unsigned int size = tmp & 0x7ff;
3213
3214 if (udev->speed == USB_SPEED_HIGH)
3215 size = size * hb_mult(tmp);
3216
3217 dev->alt_max_pkt_size[i] = size;
3218 }
3219 3295
3220 if ((card[nr] >= 0) && (card[nr] < em28xx_bcount)) 3296 if ((card[nr] >= 0) && (card[nr] < em28xx_bcount))
3221 dev->model = card[nr]; 3297 dev->model = card[nr];
@@ -3226,12 +3302,9 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3226 /* allocate device struct */ 3302 /* allocate device struct */
3227 mutex_init(&dev->lock); 3303 mutex_init(&dev->lock);
3228 mutex_lock(&dev->lock); 3304 mutex_lock(&dev->lock);
3229 retval = em28xx_init_dev(&dev, udev, interface, nr); 3305 retval = em28xx_init_dev(dev, udev, interface, nr);
3230 if (retval) { 3306 if (retval) {
3231 mutex_unlock(&dev->lock); 3307 goto unlock_and_free;
3232 kfree(dev->alt_max_pkt_size);
3233 kfree(dev);
3234 goto err;
3235 } 3308 }
3236 3309
3237 request_modules(dev); 3310 request_modules(dev);
@@ -3250,6 +3323,13 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3250 3323
3251 return 0; 3324 return 0;
3252 3325
3326unlock_and_free:
3327 mutex_unlock(&dev->lock);
3328
3329err_free:
3330 kfree(dev->alt_max_pkt_size);
3331 kfree(dev);
3332
3253err: 3333err:
3254 clear_bit(nr, &em28xx_devused); 3334 clear_bit(nr, &em28xx_devused);
3255 3335
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c
index 804a4ab47ac..0aacc96f9a2 100644
--- a/drivers/media/video/em28xx/em28xx-core.c
+++ b/drivers/media/video/em28xx/em28xx-core.c
@@ -568,7 +568,7 @@ int em28xx_audio_setup(struct em28xx *dev)
568 em28xx_warn("AC97 features = 0x%04x\n", feat); 568 em28xx_warn("AC97 features = 0x%04x\n", feat);
569 569
570 /* Try to identify what audio processor we have */ 570 /* Try to identify what audio processor we have */
571 if ((vid == 0xffffffff) && (feat == 0x6a90)) 571 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
572 dev->audio_mode.ac97 = EM28XX_AC97_EM202; 572 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
573 else if ((vid >> 8) == 0x838476) 573 else if ((vid >> 8) == 0x838476)
574 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL; 574 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
@@ -1070,7 +1070,8 @@ int em28xx_init_isoc(struct em28xx *dev, int max_packets,
1070 should also be using 'desc.bInterval' 1070 should also be using 'desc.bInterval'
1071 */ 1071 */
1072 pipe = usb_rcvisocpipe(dev->udev, 1072 pipe = usb_rcvisocpipe(dev->udev,
1073 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84); 1073 dev->mode == EM28XX_ANALOG_MODE ?
1074 EM28XX_EP_ANALOG : EM28XX_EP_DIGITAL);
1074 1075
1075 usb_fill_int_urb(urb, dev->udev, pipe, 1076 usb_fill_int_urb(urb, dev->udev, pipe,
1076 dev->isoc_ctl.transfer_buffer[i], sb_size, 1077 dev->isoc_ctl.transfer_buffer[i], sb_size,
@@ -1108,62 +1109,6 @@ int em28xx_init_isoc(struct em28xx *dev, int max_packets,
1108} 1109}
1109EXPORT_SYMBOL_GPL(em28xx_init_isoc); 1110EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1110 1111
1111/* Determine the packet size for the DVB stream for the given device
1112 (underlying value programmed into the eeprom) */
1113int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
1114{
1115 unsigned int chip_cfg2;
1116 unsigned int packet_size;
1117
1118 switch (dev->chip_id) {
1119 case CHIP_ID_EM2710:
1120 case CHIP_ID_EM2750:
1121 case CHIP_ID_EM2800:
1122 case CHIP_ID_EM2820:
1123 case CHIP_ID_EM2840:
1124 case CHIP_ID_EM2860:
1125 /* No DVB support */
1126 return -EINVAL;
1127 case CHIP_ID_EM2870:
1128 case CHIP_ID_EM2883:
1129 /* TS max packet size stored in bits 1-0 of R01 */
1130 chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
1131 switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
1132 case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
1133 packet_size = 188;
1134 break;
1135 case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
1136 packet_size = 376;
1137 break;
1138 case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
1139 packet_size = 564;
1140 break;
1141 case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
1142 packet_size = 752;
1143 break;
1144 }
1145 break;
1146 case CHIP_ID_EM2874:
1147 /*
1148 * FIXME: for now assumes 564 like it was before, but the
1149 * em2874 code should be added to return the proper value
1150 */
1151 packet_size = 564;
1152 break;
1153 case CHIP_ID_EM2884:
1154 case CHIP_ID_EM28174:
1155 default:
1156 /*
1157 * FIXME: same as em2874. 564 was enough for 22 Mbit DVB-T
1158 * but not enough for 44 Mbit DVB-C.
1159 */
1160 packet_size = 752;
1161 }
1162
1163 return packet_size;
1164}
1165EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);
1166
1167/* 1112/*
1168 * em28xx_wake_i2c() 1113 * em28xx_wake_i2c()
1169 * configure i2c attached devices 1114 * configure i2c attached devices
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c
index cef7a2d409c..9449423098e 100644
--- a/drivers/media/video/em28xx/em28xx-dvb.c
+++ b/drivers/media/video/em28xx/em28xx-dvb.c
@@ -44,6 +44,7 @@
44#include "drxk.h" 44#include "drxk.h"
45#include "tda10071.h" 45#include "tda10071.h"
46#include "a8293.h" 46#include "a8293.h"
47#include "qt1010.h"
47 48
48MODULE_DESCRIPTION("driver for em28xx based DVB cards"); 49MODULE_DESCRIPTION("driver for em28xx based DVB cards");
49MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); 50MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
@@ -163,12 +164,12 @@ static int em28xx_start_streaming(struct em28xx_dvb *dvb)
163 struct em28xx *dev = dvb->adapter.priv; 164 struct em28xx *dev = dvb->adapter.priv;
164 int max_dvb_packet_size; 165 int max_dvb_packet_size;
165 166
166 usb_set_interface(dev->udev, 0, 1); 167 usb_set_interface(dev->udev, 0, dev->dvb_alt);
167 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); 168 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
168 if (rc < 0) 169 if (rc < 0)
169 return rc; 170 return rc;
170 171
171 max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev); 172 max_dvb_packet_size = dev->dvb_max_pkt_size;
172 if (max_dvb_packet_size < 0) 173 if (max_dvb_packet_size < 0)
173 return max_dvb_packet_size; 174 return max_dvb_packet_size;
174 dprintk(1, "Using %d buffers each with %d bytes\n", 175 dprintk(1, "Using %d buffers each with %d bytes\n",
@@ -302,10 +303,12 @@ static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
302}; 303};
303 304
304static struct drxd_config em28xx_drxd = { 305static struct drxd_config em28xx_drxd = {
305 .index = 0, .demod_address = 0x70, .demod_revision = 0xa2, 306 .demod_address = 0x70,
306 .demoda_address = 0x00, .pll_address = 0x00, 307 .demod_revision = 0xa2,
307 .pll_type = DRXD_PLL_NONE, .clock = 12000, .insert_rs_byte = 1, 308 .pll_type = DRXD_PLL_NONE,
308 .pll_set = NULL, .osc_deviation = NULL, .IF = 42800000, 309 .clock = 12000,
310 .insert_rs_byte = 1,
311 .IF = 42800000,
309 .disable_i2c_gate_ctrl = 1, 312 .disable_i2c_gate_ctrl = 1,
310}; 313};
311 314
@@ -316,6 +319,14 @@ struct drxk_config terratec_h5_drxk = {
316 .microcode_name = "dvb-usb-terratec-h5-drxk.fw", 319 .microcode_name = "dvb-usb-terratec-h5-drxk.fw",
317}; 320};
318 321
322struct drxk_config hauppauge_930c_drxk = {
323 .adr = 0x29,
324 .single_master = 1,
325 .no_i2c_bridge = 1,
326 .microcode_name = "dvb-usb-hauppauge-hvr930c-drxk.fw",
327 .chunk_size = 56,
328};
329
319static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) 330static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
320{ 331{
321 struct em28xx_dvb *dvb = fe->sec_priv; 332 struct em28xx_dvb *dvb = fe->sec_priv;
@@ -334,6 +345,73 @@ static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
334 return status; 345 return status;
335} 346}
336 347
348static void hauppauge_hvr930c_init(struct em28xx *dev)
349{
350 int i;
351
352 struct em28xx_reg_seq hauppauge_hvr930c_init[] = {
353 {EM2874_R80_GPIO, 0xff, 0xff, 0x65},
354 {EM2874_R80_GPIO, 0xfb, 0xff, 0x32},
355 {EM2874_R80_GPIO, 0xff, 0xff, 0xb8},
356 { -1, -1, -1, -1},
357 };
358 struct em28xx_reg_seq hauppauge_hvr930c_end[] = {
359 {EM2874_R80_GPIO, 0xef, 0xff, 0x01},
360 {EM2874_R80_GPIO, 0xaf, 0xff, 0x65},
361 {EM2874_R80_GPIO, 0xef, 0xff, 0x76},
362 {EM2874_R80_GPIO, 0xef, 0xff, 0x01},
363 {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
364 {EM2874_R80_GPIO, 0xef, 0xff, 0x40},
365
366 {EM2874_R80_GPIO, 0xcf, 0xff, 0x65},
367 {EM2874_R80_GPIO, 0xef, 0xff, 0x65},
368 {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
369 {EM2874_R80_GPIO, 0xef, 0xff, 0x65},
370
371 { -1, -1, -1, -1},
372 };
373
374 struct {
375 unsigned char r[4];
376 int len;
377 } regs[] = {
378 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
379 {{ 0x01, 0x02 }, 2},
380 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
381 {{ 0x01, 0x00 }, 2},
382 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
383 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
384 {{ 0x01, 0x00 }, 2},
385 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
386 {{ 0x04, 0x00 }, 2},
387 {{ 0x00, 0x04 }, 2},
388 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
389 {{ 0x04, 0x14 }, 2},
390 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
391 };
392
393 em28xx_gpio_set(dev, hauppauge_hvr930c_init);
394 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
395 msleep(10);
396 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
397 msleep(10);
398
399 dev->i2c_client.addr = 0x82 >> 1;
400
401 for (i = 0; i < ARRAY_SIZE(regs); i++)
402 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
403 em28xx_gpio_set(dev, hauppauge_hvr930c_end);
404
405 msleep(100);
406
407 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
408 msleep(30);
409
410 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
411 msleep(10);
412
413}
414
337static void terratec_h5_init(struct em28xx *dev) 415static void terratec_h5_init(struct em28xx *dev)
338{ 416{
339 int i; 417 int i;
@@ -425,13 +503,6 @@ static struct tda10023_config em28xx_tda10023_config = {
425static struct cxd2820r_config em28xx_cxd2820r_config = { 503static struct cxd2820r_config em28xx_cxd2820r_config = {
426 .i2c_address = (0xd8 >> 1), 504 .i2c_address = (0xd8 >> 1),
427 .ts_mode = CXD2820R_TS_SERIAL, 505 .ts_mode = CXD2820R_TS_SERIAL,
428 .if_dvbt_6 = 3300,
429 .if_dvbt_7 = 3500,
430 .if_dvbt_8 = 4000,
431 .if_dvbt2_6 = 3300,
432 .if_dvbt2_7 = 3500,
433 .if_dvbt2_8 = 4000,
434 .if_dvbc = 5000,
435 506
436 /* enable LNA for DVB-T2 and DVB-C */ 507 /* enable LNA for DVB-T2 and DVB-C */
437 .gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L, 508 .gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
@@ -456,6 +527,17 @@ static const struct a8293_config em28xx_a8293_config = {
456 .i2c_addr = 0x08, /* (0x10 >> 1) */ 527 .i2c_addr = 0x08, /* (0x10 >> 1) */
457}; 528};
458 529
530static struct zl10353_config em28xx_zl10353_no_i2c_gate_dev = {
531 .demod_address = (0x1e >> 1),
532 .disable_i2c_gate_ctrl = 1,
533 .no_tuner = 1,
534 .parallel_ts = 1,
535};
536static struct qt1010_config em28xx_qt1010_config = {
537 .i2c_address = 0x62
538
539};
540
459/* ------------------------------------------------------------------ */ 541/* ------------------------------------------------------------------ */
460 542
461static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev) 543static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev)
@@ -708,6 +790,14 @@ static int em28xx_dvb_init(struct em28xx *dev)
708 goto out_free; 790 goto out_free;
709 } 791 }
710 break; 792 break;
793 case EM2870_BOARD_KWORLD_355U:
794 dvb->fe[0] = dvb_attach(zl10353_attach,
795 &em28xx_zl10353_no_i2c_gate_dev,
796 &dev->i2c_adap);
797 if (dvb->fe[0] != NULL)
798 dvb_attach(qt1010_attach, dvb->fe[0],
799 &dev->i2c_adap, &em28xx_qt1010_config);
800 break;
711 case EM2883_BOARD_KWORLD_HYBRID_330U: 801 case EM2883_BOARD_KWORLD_HYBRID_330U:
712 case EM2882_BOARD_EVGA_INDTUBE: 802 case EM2882_BOARD_EVGA_INDTUBE:
713 dvb->fe[0] = dvb_attach(s5h1409_attach, 803 dvb->fe[0] = dvb_attach(s5h1409_attach,
@@ -761,50 +851,72 @@ static int em28xx_dvb_init(struct em28xx *dev)
761 &dev->i2c_adap, &kworld_a340_config); 851 &dev->i2c_adap, &kworld_a340_config);
762 break; 852 break;
763 case EM28174_BOARD_PCTV_290E: 853 case EM28174_BOARD_PCTV_290E:
764 /* MFE
765 * FE 0 = DVB-T/T2 + FE 1 = DVB-C, both sharing same tuner. */
766 /* FE 0 */
767 dvb->fe[0] = dvb_attach(cxd2820r_attach, 854 dvb->fe[0] = dvb_attach(cxd2820r_attach,
768 &em28xx_cxd2820r_config, &dev->i2c_adap, NULL); 855 &em28xx_cxd2820r_config,
856 &dev->i2c_adap,
857 NULL);
769 if (dvb->fe[0]) { 858 if (dvb->fe[0]) {
770 /* FE 0 attach tuner */ 859 /* FE 0 attach tuner */
771 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60, 860 if (!dvb_attach(tda18271_attach,
772 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) { 861 dvb->fe[0],
862 0x60,
863 &dev->i2c_adap,
864 &em28xx_cxd2820r_tda18271_config)) {
865
773 dvb_frontend_detach(dvb->fe[0]); 866 dvb_frontend_detach(dvb->fe[0]);
774 result = -EINVAL; 867 result = -EINVAL;
775 goto out_free; 868 goto out_free;
776 } 869 }
777 /* FE 1. This dvb_attach() cannot fail. */ 870 }
778 dvb->fe[1] = dvb_attach(cxd2820r_attach, NULL, NULL, 871 break;
779 dvb->fe[0]); 872 case EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C:
780 dvb->fe[1]->id = 1; 873 {
781 /* FE 1 attach tuner */ 874 struct xc5000_config cfg;
782 if (!dvb_attach(tda18271_attach, dvb->fe[1], 0x60, 875 hauppauge_hvr930c_init(dev);
783 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) { 876
784 dvb_frontend_detach(dvb->fe[1]); 877 dvb->fe[0] = dvb_attach(drxk_attach,
785 /* leave FE 0 still active */ 878 &hauppauge_930c_drxk, &dev->i2c_adap);
786 } 879 if (!dvb->fe[0]) {
880 result = -EINVAL;
881 goto out_free;
882 }
883 /* FIXME: do we need a pll semaphore? */
884 dvb->fe[0]->sec_priv = dvb;
885 sema_init(&dvb->pll_mutex, 1);
886 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
887 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
787 888
788 mfe_shared = 1; 889 /* Attach xc5000 */
890 memset(&cfg, 0, sizeof(cfg));
891 cfg.i2c_address = 0x61;
892 cfg.if_khz = 4000;
893
894 if (dvb->fe[0]->ops.i2c_gate_ctrl)
895 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
896 if (!dvb_attach(xc5000_attach, dvb->fe[0], &dev->i2c_adap,
897 &cfg)) {
898 result = -EINVAL;
899 goto out_free;
789 } 900 }
901 if (dvb->fe[0]->ops.i2c_gate_ctrl)
902 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
903
790 break; 904 break;
905 }
791 case EM2884_BOARD_TERRATEC_H5: 906 case EM2884_BOARD_TERRATEC_H5:
907 case EM2884_BOARD_CINERGY_HTC_STICK:
792 terratec_h5_init(dev); 908 terratec_h5_init(dev);
793 909
794 dvb->dont_attach_fe1 = 1; 910 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap);
795
796 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap, &dvb->fe[1]);
797 if (!dvb->fe[0]) { 911 if (!dvb->fe[0]) {
798 result = -EINVAL; 912 result = -EINVAL;
799 goto out_free; 913 goto out_free;
800 } 914 }
801
802 /* FIXME: do we need a pll semaphore? */ 915 /* FIXME: do we need a pll semaphore? */
803 dvb->fe[0]->sec_priv = dvb; 916 dvb->fe[0]->sec_priv = dvb;
804 sema_init(&dvb->pll_mutex, 1); 917 sema_init(&dvb->pll_mutex, 1);
805 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl; 918 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
806 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl; 919 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
807 dvb->fe[1]->id = 1;
808 920
809 /* Attach tda18271 to DVB-C frontend */ 921 /* Attach tda18271 to DVB-C frontend */
810 if (dvb->fe[0]->ops.i2c_gate_ctrl) 922 if (dvb->fe[0]->ops.i2c_gate_ctrl)
@@ -816,12 +928,6 @@ static int em28xx_dvb_init(struct em28xx *dev)
816 if (dvb->fe[0]->ops.i2c_gate_ctrl) 928 if (dvb->fe[0]->ops.i2c_gate_ctrl)
817 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0); 929 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
818 930
819 /* Hack - needed by drxk/tda18271c2dd */
820 dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv;
821 memcpy(&dvb->fe[1]->ops.tuner_ops,
822 &dvb->fe[0]->ops.tuner_ops,
823 sizeof(dvb->fe[0]->ops.tuner_ops));
824
825 break; 931 break;
826 case EM28174_BOARD_PCTV_460E: 932 case EM28174_BOARD_PCTV_460E:
827 /* attach demod */ 933 /* attach demod */
@@ -845,6 +951,8 @@ static int em28xx_dvb_init(struct em28xx *dev)
845 } 951 }
846 /* define general-purpose callback pointer */ 952 /* define general-purpose callback pointer */
847 dvb->fe[0]->callback = em28xx_tuner_callback; 953 dvb->fe[0]->callback = em28xx_tuner_callback;
954 if (dvb->fe[1])
955 dvb->fe[1]->callback = em28xx_tuner_callback;
848 956
849 /* register everything */ 957 /* register everything */
850 result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev); 958 result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev);
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c
index 679da480428..2630b265b0e 100644
--- a/drivers/media/video/em28xx/em28xx-input.c
+++ b/drivers/media/video/em28xx/em28xx-input.c
@@ -306,7 +306,8 @@ static void em28xx_ir_handle_key(struct em28xx_IR *ir)
306 poll_result.rc_data[0], 306 poll_result.rc_data[0],
307 poll_result.toggle_bit); 307 poll_result.toggle_bit);
308 308
309 if (ir->dev->chip_id == CHIP_ID_EM2874) 309 if (ir->dev->chip_id == CHIP_ID_EM2874 ||
310 ir->dev->chip_id == CHIP_ID_EM2884)
310 /* The em2874 clears the readcount field every time the 311 /* The em2874 clears the readcount field every time the
311 register is read. The em2860/2880 datasheet says that it 312 register is read. The em2860/2880 datasheet says that it
312 is supposed to clear the readcount, but it doesn't. So with 313 is supposed to clear the readcount, but it doesn't. So with
@@ -371,13 +372,15 @@ int em28xx_ir_change_protocol(struct rc_dev *rc_dev, u64 rc_type)
371 case CHIP_ID_EM2883: 372 case CHIP_ID_EM2883:
372 ir->get_key = default_polling_getkey; 373 ir->get_key = default_polling_getkey;
373 break; 374 break;
375 case CHIP_ID_EM2884:
374 case CHIP_ID_EM2874: 376 case CHIP_ID_EM2874:
375 case CHIP_ID_EM28174: 377 case CHIP_ID_EM28174:
376 ir->get_key = em2874_polling_getkey; 378 ir->get_key = em2874_polling_getkey;
377 em28xx_write_regs(dev, EM2874_R50_IR_CONFIG, &ir_config, 1); 379 em28xx_write_regs(dev, EM2874_R50_IR_CONFIG, &ir_config, 1);
378 break; 380 break;
379 default: 381 default:
380 printk("Unrecognized em28xx chip id: IR not supported\n"); 382 printk("Unrecognized em28xx chip id 0x%02x: IR not supported\n",
383 dev->chip_id);
381 rc = -EINVAL; 384 rc = -EINVAL;
382 } 385 }
383 386
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h
index 66f792361b9..2f626850572 100644
--- a/drivers/media/video/em28xx/em28xx-reg.h
+++ b/drivers/media/video/em28xx/em28xx-reg.h
@@ -12,6 +12,11 @@
12#define EM_GPO_2 (1 << 2) 12#define EM_GPO_2 (1 << 2)
13#define EM_GPO_3 (1 << 3) 13#define EM_GPO_3 (1 << 3)
14 14
15/* em28xx endpoints */
16#define EM28XX_EP_ANALOG 0x82
17#define EM28XX_EP_AUDIO 0x83
18#define EM28XX_EP_DIGITAL 0x84
19
15/* em2800 registers */ 20/* em2800 registers */
16#define EM2800_R08_AUDIOSRC 0x08 21#define EM2800_R08_AUDIOSRC 0x08
17 22
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c
index 9b4557a2f6d..613300b51a9 100644
--- a/drivers/media/video/em28xx/em28xx-video.c
+++ b/drivers/media/video/em28xx/em28xx-video.c
@@ -1070,6 +1070,10 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1070 /* the em2800 can only scale down to 50% */ 1070 /* the em2800 can only scale down to 50% */
1071 height = height > (3 * maxh / 4) ? maxh : maxh / 2; 1071 height = height > (3 * maxh / 4) ? maxh : maxh / 2;
1072 width = width > (3 * maxw / 4) ? maxw : maxw / 2; 1072 width = width > (3 * maxw / 4) ? maxw : maxw / 2;
1073 /* MaxPacketSize for em2800 is too small to capture at full resolution
1074 * use half of maxw as the scaler can only scale to 50% */
1075 if (width == maxw && height == maxh)
1076 width /= 2;
1073 } else { 1077 } else {
1074 /* width must even because of the YUYV format 1078 /* width must even because of the YUYV format
1075 height must be even because of interlacing */ 1079 height must be even because of interlacing */
@@ -2503,6 +2507,7 @@ int em28xx_register_analog_devices(struct em28xx *dev)
2503{ 2507{
2504 u8 val; 2508 u8 val;
2505 int ret; 2509 int ret;
2510 unsigned int maxw;
2506 2511
2507 printk(KERN_INFO "%s: v4l2 driver version %s\n", 2512 printk(KERN_INFO "%s: v4l2 driver version %s\n",
2508 dev->name, EM28XX_VERSION); 2513 dev->name, EM28XX_VERSION);
@@ -2515,8 +2520,15 @@ int em28xx_register_analog_devices(struct em28xx *dev)
2515 2520
2516 /* Analog specific initialization */ 2521 /* Analog specific initialization */
2517 dev->format = &format[0]; 2522 dev->format = &format[0];
2523
2524 maxw = norm_maxw(dev);
2525 /* MaxPacketSize for em2800 is too small to capture at full resolution
2526 * use half of maxw as the scaler can only scale to 50% */
2527 if (dev->board.is_em2800)
2528 maxw /= 2;
2529
2518 em28xx_set_video_format(dev, format[0].fourcc, 2530 em28xx_set_video_format(dev, format[0].fourcc,
2519 norm_maxw(dev), norm_maxh(dev)); 2531 maxw, norm_maxh(dev));
2520 2532
2521 video_mux(dev, dev->ctl_input); 2533 video_mux(dev, dev->ctl_input);
2522 2534
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h
index 2a2cb7ed001..22e252bcc41 100644
--- a/drivers/media/video/em28xx/em28xx.h
+++ b/drivers/media/video/em28xx/em28xx.h
@@ -38,6 +38,7 @@
38#include <media/videobuf-dvb.h> 38#include <media/videobuf-dvb.h>
39#endif 39#endif
40#include "tuner-xc2028.h" 40#include "tuner-xc2028.h"
41#include "xc5000.h"
41#include "em28xx-reg.h" 42#include "em28xx-reg.h"
42 43
43/* Boards supported by driver */ 44/* Boards supported by driver */
@@ -121,6 +122,9 @@
121#define EM28174_BOARD_PCTV_290E 78 122#define EM28174_BOARD_PCTV_290E 78
122#define EM2884_BOARD_TERRATEC_H5 79 123#define EM2884_BOARD_TERRATEC_H5 79
123#define EM28174_BOARD_PCTV_460E 80 124#define EM28174_BOARD_PCTV_460E 80
125#define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81
126#define EM2884_BOARD_CINERGY_HTC_STICK 82
127#define EM2860_BOARD_HT_VIDBOX_NW03 83
124 128
125/* Limits minimum and default number of buffers */ 129/* Limits minimum and default number of buffers */
126#define EM28XX_MIN_BUF 4 130#define EM28XX_MIN_BUF 4
@@ -594,6 +598,8 @@ struct em28xx {
594 int max_pkt_size; /* max packet size of isoc transaction */ 598 int max_pkt_size; /* max packet size of isoc transaction */
595 int num_alt; /* Number of alternative settings */ 599 int num_alt; /* Number of alternative settings */
596 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 600 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
601 int dvb_alt; /* alternate for DVB */
602 unsigned int dvb_max_pkt_size; /* wMaxPacketSize for DVB */
597 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ 603 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
598 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc 604 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
599 transfer */ 605 transfer */
@@ -825,7 +831,7 @@ static inline unsigned int norm_maxw(struct em28xx *dev)
825 if (dev->board.is_webcam) 831 if (dev->board.is_webcam)
826 return dev->sensor_xres; 832 return dev->sensor_xres;
827 833
828 if (dev->board.max_range_640_480 || dev->board.is_em2800) 834 if (dev->board.max_range_640_480)
829 return 640; 835 return 640;
830 836
831 return 720; 837 return 720;
diff --git a/drivers/media/video/fsl-viu.c b/drivers/media/video/fsl-viu.c
index 27cb197d0bd..27e3e0c0b21 100644
--- a/drivers/media/video/fsl-viu.c
+++ b/drivers/media/video/fsl-viu.c
@@ -1661,18 +1661,7 @@ static struct platform_driver viu_of_platform_driver = {
1661 }, 1661 },
1662}; 1662};
1663 1663
1664static int __init viu_init(void) 1664module_platform_driver(viu_of_platform_driver);
1665{
1666 return platform_driver_register(&viu_of_platform_driver);
1667}
1668
1669static void __exit viu_exit(void)
1670{
1671 platform_driver_unregister(&viu_of_platform_driver);
1672}
1673
1674module_init(viu_init);
1675module_exit(viu_exit);
1676 1665
1677MODULE_DESCRIPTION("Freescale Video-In(VIU)"); 1666MODULE_DESCRIPTION("Freescale Video-In(VIU)");
1678MODULE_AUTHOR("Hongjun Chen"); 1667MODULE_AUTHOR("Hongjun Chen");
diff --git a/drivers/media/video/gspca/Kconfig b/drivers/media/video/gspca/Kconfig
index 103af3fe5aa..dfe268bfa4f 100644
--- a/drivers/media/video/gspca/Kconfig
+++ b/drivers/media/video/gspca/Kconfig
@@ -77,6 +77,16 @@ config USB_GSPCA_JEILINJ
77 To compile this driver as a module, choose M here: the 77 To compile this driver as a module, choose M here: the
78 module will be called gspca_jeilinj. 78 module will be called gspca_jeilinj.
79 79
80config USB_GSPCA_JL2005BCD
81 tristate "JL2005B/C/D USB V4L2 driver"
82 depends on VIDEO_V4L2 && USB_GSPCA
83 help
84 Say Y here if you want support for cameras based the
85 JL2005B, JL2005C, or JL2005D chip.
86
87 To compile this driver as a module, choose M here: the
88 module will be called gspca_jl2005bcd.
89
80config USB_GSPCA_KINECT 90config USB_GSPCA_KINECT
81 tristate "Kinect sensor device USB Camera Driver" 91 tristate "Kinect sensor device USB Camera Driver"
82 depends on VIDEO_V4L2 && USB_GSPCA 92 depends on VIDEO_V4L2 && USB_GSPCA
diff --git a/drivers/media/video/gspca/Makefile b/drivers/media/video/gspca/Makefile
index f345f494d0f..79ebe46e1ad 100644
--- a/drivers/media/video/gspca/Makefile
+++ b/drivers/media/video/gspca/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_USB_GSPCA_CPIA1) += gspca_cpia1.o
5obj-$(CONFIG_USB_GSPCA_ETOMS) += gspca_etoms.o 5obj-$(CONFIG_USB_GSPCA_ETOMS) += gspca_etoms.o
6obj-$(CONFIG_USB_GSPCA_FINEPIX) += gspca_finepix.o 6obj-$(CONFIG_USB_GSPCA_FINEPIX) += gspca_finepix.o
7obj-$(CONFIG_USB_GSPCA_JEILINJ) += gspca_jeilinj.o 7obj-$(CONFIG_USB_GSPCA_JEILINJ) += gspca_jeilinj.o
8obj-$(CONFIG_USB_GSPCA_JL2005BCD) += gspca_jl2005bcd.o
8obj-$(CONFIG_USB_GSPCA_KINECT) += gspca_kinect.o 9obj-$(CONFIG_USB_GSPCA_KINECT) += gspca_kinect.o
9obj-$(CONFIG_USB_GSPCA_KONICA) += gspca_konica.o 10obj-$(CONFIG_USB_GSPCA_KONICA) += gspca_konica.o
10obj-$(CONFIG_USB_GSPCA_MARS) += gspca_mars.o 11obj-$(CONFIG_USB_GSPCA_MARS) += gspca_mars.o
@@ -49,6 +50,7 @@ gspca_cpia1-objs := cpia1.o
49gspca_etoms-objs := etoms.o 50gspca_etoms-objs := etoms.o
50gspca_finepix-objs := finepix.o 51gspca_finepix-objs := finepix.o
51gspca_jeilinj-objs := jeilinj.o 52gspca_jeilinj-objs := jeilinj.o
53gspca_jl2005bcd-objs := jl2005bcd.o
52gspca_kinect-objs := kinect.o 54gspca_kinect-objs := kinect.o
53gspca_konica-objs := konica.o 55gspca_konica-objs := konica.o
54gspca_mars-objs := mars.o 56gspca_mars-objs := mars.o
diff --git a/drivers/media/video/gspca/benq.c b/drivers/media/video/gspca/benq.c
index 636627b57dc..9769f17915c 100644
--- a/drivers/media/video/gspca/benq.c
+++ b/drivers/media/video/gspca/benq.c
@@ -76,7 +76,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
76 gspca_dev->cam.cam_mode = vga_mode; 76 gspca_dev->cam.cam_mode = vga_mode;
77 gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode); 77 gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode);
78 gspca_dev->cam.no_urb_create = 1; 78 gspca_dev->cam.no_urb_create = 1;
79 gspca_dev->cam.reverse_alts = 1;
80 return 0; 79 return 0;
81} 80}
82 81
@@ -135,13 +134,17 @@ static int sd_start(struct gspca_dev *gspca_dev)
135 134
136static void sd_stopN(struct gspca_dev *gspca_dev) 135static void sd_stopN(struct gspca_dev *gspca_dev)
137{ 136{
137 struct usb_interface *intf;
138
138 reg_w(gspca_dev, 0x003c, 0x0003); 139 reg_w(gspca_dev, 0x003c, 0x0003);
139 reg_w(gspca_dev, 0x003c, 0x0004); 140 reg_w(gspca_dev, 0x003c, 0x0004);
140 reg_w(gspca_dev, 0x003c, 0x0005); 141 reg_w(gspca_dev, 0x003c, 0x0005);
141 reg_w(gspca_dev, 0x003c, 0x0006); 142 reg_w(gspca_dev, 0x003c, 0x0006);
142 reg_w(gspca_dev, 0x003c, 0x0007); 143 reg_w(gspca_dev, 0x003c, 0x0007);
144
145 intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
143 usb_set_interface(gspca_dev->dev, gspca_dev->iface, 146 usb_set_interface(gspca_dev->dev, gspca_dev->iface,
144 gspca_dev->nbalt - 1); 147 intf->num_altsetting - 1);
145} 148}
146 149
147static void sd_pkt_scan(struct gspca_dev *gspca_dev, 150static void sd_pkt_scan(struct gspca_dev *gspca_dev,
diff --git a/drivers/media/video/gspca/gl860/gl860.c b/drivers/media/video/gspca/gl860/gl860.c
index a8f54c20e58..c84e26006fc 100644
--- a/drivers/media/video/gspca/gl860/gl860.c
+++ b/drivers/media/video/gspca/gl860/gl860.c
@@ -337,7 +337,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
337 return -1; 337 return -1;
338 338
339 cam = &gspca_dev->cam; 339 cam = &gspca_dev->cam;
340 gspca_dev->nbalt = 4;
341 340
342 switch (sd->sensor) { 341 switch (sd->sensor) {
343 case ID_MI1320: 342 case ID_MI1320:
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 2ca10dfec91..ca5a2b139d0 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -633,23 +633,32 @@ static u32 which_bandwidth(struct gspca_dev *gspca_dev)
633 u32 bandwidth; 633 u32 bandwidth;
634 int i; 634 int i;
635 635
636 /* get the (max) image size */
636 i = gspca_dev->curr_mode; 637 i = gspca_dev->curr_mode;
637 bandwidth = gspca_dev->cam.cam_mode[i].sizeimage; 638 bandwidth = gspca_dev->cam.cam_mode[i].sizeimage;
638 639
639 /* if the image is compressed, estimate the mean image size */ 640 /* if the image is compressed, estimate its mean size */
640 if (bandwidth < gspca_dev->cam.cam_mode[i].width * 641 if (!gspca_dev->cam.needs_full_bandwidth &&
642 bandwidth < gspca_dev->cam.cam_mode[i].width *
641 gspca_dev->cam.cam_mode[i].height) 643 gspca_dev->cam.cam_mode[i].height)
642 bandwidth /= 3; 644 bandwidth = bandwidth * 3 / 8; /* 0.375 */
643 645
644 /* estimate the frame rate */ 646 /* estimate the frame rate */
645 if (gspca_dev->sd_desc->get_streamparm) { 647 if (gspca_dev->sd_desc->get_streamparm) {
646 struct v4l2_streamparm parm; 648 struct v4l2_streamparm parm;
647 649
648 parm.parm.capture.timeperframe.denominator = 15;
649 gspca_dev->sd_desc->get_streamparm(gspca_dev, &parm); 650 gspca_dev->sd_desc->get_streamparm(gspca_dev, &parm);
650 bandwidth *= parm.parm.capture.timeperframe.denominator; 651 bandwidth *= parm.parm.capture.timeperframe.denominator;
652 bandwidth /= parm.parm.capture.timeperframe.numerator;
651 } else { 653 } else {
652 bandwidth *= 15; /* 15 fps */ 654
655 /* don't hope more than 15 fps with USB 1.1 and
656 * image resolution >= 640x480 */
657 if (gspca_dev->width >= 640
658 && gspca_dev->dev->speed == USB_SPEED_FULL)
659 bandwidth *= 15; /* 15 fps */
660 else
661 bandwidth *= 30; /* 30 fps */
653 } 662 }
654 663
655 PDEBUG(D_STREAM, "min bandwidth: %d", bandwidth); 664 PDEBUG(D_STREAM, "min bandwidth: %d", bandwidth);
@@ -667,9 +676,8 @@ struct ep_tb_s {
667 * build the table of the endpoints 676 * build the table of the endpoints
668 * and compute the minimum bandwidth for the image transfer 677 * and compute the minimum bandwidth for the image transfer
669 */ 678 */
670static int build_ep_tb(struct gspca_dev *gspca_dev, 679static int build_isoc_ep_tb(struct gspca_dev *gspca_dev,
671 struct usb_interface *intf, 680 struct usb_interface *intf,
672 int xfer,
673 struct ep_tb_s *ep_tb) 681 struct ep_tb_s *ep_tb)
674{ 682{
675 struct usb_host_endpoint *ep; 683 struct usb_host_endpoint *ep;
@@ -687,17 +695,21 @@ static int build_ep_tb(struct gspca_dev *gspca_dev,
687 ep_tb->bandwidth = 2000 * 2000 * 120; 695 ep_tb->bandwidth = 2000 * 2000 * 120;
688 found = 0; 696 found = 0;
689 for (j = 0; j < nbalt; j++) { 697 for (j = 0; j < nbalt; j++) {
690 ep = alt_xfer(&intf->altsetting[j], xfer); 698 ep = alt_xfer(&intf->altsetting[j],
699 USB_ENDPOINT_XFER_ISOC);
691 if (ep == NULL) 700 if (ep == NULL)
692 continue; 701 continue;
702 if (ep->desc.bInterval == 0) {
703 pr_err("alt %d iso endp with 0 interval\n", j);
704 continue;
705 }
693 psize = le16_to_cpu(ep->desc.wMaxPacketSize); 706 psize = le16_to_cpu(ep->desc.wMaxPacketSize);
694 if (!gspca_dev->cam.bulk) /* isoc */ 707 psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3));
695 psize = (psize & 0x07ff) * 708 bandwidth = psize * 1000;
696 (1 + ((psize >> 11) & 3));
697 bandwidth = psize * ep->desc.bInterval * 1000;
698 if (gspca_dev->dev->speed == USB_SPEED_HIGH 709 if (gspca_dev->dev->speed == USB_SPEED_HIGH
699 || gspca_dev->dev->speed == USB_SPEED_SUPER) 710 || gspca_dev->dev->speed == USB_SPEED_SUPER)
700 bandwidth *= 8; 711 bandwidth *= 8;
712 bandwidth /= 1 << (ep->desc.bInterval - 1);
701 if (bandwidth <= last_bw) 713 if (bandwidth <= last_bw)
702 continue; 714 continue;
703 if (bandwidth < ep_tb->bandwidth) { 715 if (bandwidth < ep_tb->bandwidth) {
@@ -715,6 +727,23 @@ static int build_ep_tb(struct gspca_dev *gspca_dev,
715 ep_tb++; 727 ep_tb++;
716 } 728 }
717 729
730 /*
731 * If the camera:
732 * has a usb audio class interface (a built in usb mic); and
733 * is a usb 1 full speed device; and
734 * uses the max full speed iso bandwidth; and
735 * and has more than 1 alt setting
736 * then skip the highest alt setting to spare bandwidth for the mic
737 */
738 if (gspca_dev->audio &&
739 gspca_dev->dev->speed == USB_SPEED_FULL &&
740 last_bw >= 1000000 &&
741 i > 1) {
742 PDEBUG(D_STREAM, "dev has usb audio, skipping highest alt");
743 i--;
744 ep_tb--;
745 }
746
718 /* get the requested bandwidth and start at the highest atlsetting */ 747 /* get the requested bandwidth and start at the highest atlsetting */
719 bandwidth = which_bandwidth(gspca_dev); 748 bandwidth = which_bandwidth(gspca_dev);
720 ep_tb--; 749 ep_tb--;
@@ -790,10 +819,7 @@ static int create_urbs(struct gspca_dev *gspca_dev,
790 ep->desc.bEndpointAddress); 819 ep->desc.bEndpointAddress);
791 urb->transfer_flags = URB_ISO_ASAP 820 urb->transfer_flags = URB_ISO_ASAP
792 | URB_NO_TRANSFER_DMA_MAP; 821 | URB_NO_TRANSFER_DMA_MAP;
793 if (gspca_dev->dev->speed == USB_SPEED_LOW) 822 urb->interval = 1 << (ep->desc.bInterval - 1);
794 urb->interval = ep->desc.bInterval;
795 else
796 urb->interval = 1 << (ep->desc.bInterval - 1);
797 urb->complete = isoc_irq; 823 urb->complete = isoc_irq;
798 urb->number_of_packets = npkt; 824 urb->number_of_packets = npkt;
799 for (i = 0; i < npkt; i++) { 825 for (i = 0; i < npkt; i++) {
@@ -848,7 +874,7 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
848 xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK 874 xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK
849 : USB_ENDPOINT_XFER_ISOC; 875 : USB_ENDPOINT_XFER_ISOC;
850 876
851 /* if the subdriver forced an altsetting, get the endpoint */ 877 /* if bulk or the subdriver forced an altsetting, get the endpoint */
852 if (gspca_dev->alt != 0) { 878 if (gspca_dev->alt != 0) {
853 gspca_dev->alt--; /* (previous version compatibility) */ 879 gspca_dev->alt--; /* (previous version compatibility) */
854 ep = alt_xfer(&intf->altsetting[gspca_dev->alt], xfer); 880 ep = alt_xfer(&intf->altsetting[gspca_dev->alt], xfer);
@@ -863,7 +889,7 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
863 889
864 /* else, compute the minimum bandwidth 890 /* else, compute the minimum bandwidth
865 * and build the endpoint table */ 891 * and build the endpoint table */
866 alt_idx = build_ep_tb(gspca_dev, intf, xfer, ep_tb); 892 alt_idx = build_isoc_ep_tb(gspca_dev, intf, ep_tb);
867 if (alt_idx <= 0) { 893 if (alt_idx <= 0) {
868 pr_err("no transfer endpoint found\n"); 894 pr_err("no transfer endpoint found\n");
869 ret = -EIO; 895 ret = -EIO;
@@ -880,7 +906,7 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
880 for (;;) { 906 for (;;) {
881 if (alt != gspca_dev->alt) { 907 if (alt != gspca_dev->alt) {
882 alt = gspca_dev->alt; 908 alt = gspca_dev->alt;
883 if (gspca_dev->nbalt > 1) { 909 if (intf->num_altsetting > 1) {
884 ret = usb_set_interface(gspca_dev->dev, 910 ret = usb_set_interface(gspca_dev->dev,
885 gspca_dev->iface, 911 gspca_dev->iface,
886 alt); 912 alt);
@@ -2300,15 +2326,14 @@ int gspca_dev_probe2(struct usb_interface *intf,
2300 } 2326 }
2301 gspca_dev->dev = dev; 2327 gspca_dev->dev = dev;
2302 gspca_dev->iface = intf->cur_altsetting->desc.bInterfaceNumber; 2328 gspca_dev->iface = intf->cur_altsetting->desc.bInterfaceNumber;
2303 gspca_dev->nbalt = intf->num_altsetting;
2304 2329
2305 /* check if any audio device */ 2330 /* check if any audio device */
2306 if (dev->config->desc.bNumInterfaces != 1) { 2331 if (dev->actconfig->desc.bNumInterfaces != 1) {
2307 int i; 2332 int i;
2308 struct usb_interface *intf2; 2333 struct usb_interface *intf2;
2309 2334
2310 for (i = 0; i < dev->config->desc.bNumInterfaces; i++) { 2335 for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
2311 intf2 = dev->config->interface[i]; 2336 intf2 = dev->actconfig->interface[i];
2312 if (intf2 != NULL 2337 if (intf2 != NULL
2313 && intf2->altsetting != NULL 2338 && intf2->altsetting != NULL
2314 && intf2->altsetting->desc.bInterfaceClass == 2339 && intf2->altsetting->desc.bInterfaceClass ==
@@ -2389,7 +2414,7 @@ int gspca_dev_probe(struct usb_interface *intf,
2389 } 2414 }
2390 2415
2391 /* the USB video interface must be the first one */ 2416 /* the USB video interface must be the first one */
2392 if (dev->config->desc.bNumInterfaces != 1 2417 if (dev->actconfig->desc.bNumInterfaces != 1
2393 && intf->cur_altsetting->desc.bInterfaceNumber != 0) 2418 && intf->cur_altsetting->desc.bInterfaceNumber != 0)
2394 return -ENODEV; 2419 return -ENODEV;
2395 2420
diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h
index e444f16e149..589009f4496 100644
--- a/drivers/media/video/gspca/gspca.h
+++ b/drivers/media/video/gspca/gspca.h
@@ -69,7 +69,9 @@ struct cam {
69 u8 bulk; /* image transfer by 0:isoc / 1:bulk */ 69 u8 bulk; /* image transfer by 0:isoc / 1:bulk */
70 u8 npkt; /* number of packets in an ISOC message 70 u8 npkt; /* number of packets in an ISOC message
71 * 0 is the default value: 32 packets */ 71 * 0 is the default value: 32 packets */
72 u8 reverse_alts; /* Alt settings are in high to low order */ 72 u8 needs_full_bandwidth;/* Set this flag to notify the bandwidth calc.
73 * code that the cam fills all image buffers to
74 * the max, even when using compression. */
73}; 75};
74 76
75struct gspca_dev; 77struct gspca_dev;
@@ -208,7 +210,6 @@ struct gspca_dev {
208 char memory; /* memory type (V4L2_MEMORY_xxx) */ 210 char memory; /* memory type (V4L2_MEMORY_xxx) */
209 __u8 iface; /* USB interface number */ 211 __u8 iface; /* USB interface number */
210 __u8 alt; /* USB alternate setting */ 212 __u8 alt; /* USB alternate setting */
211 __u8 nbalt; /* number of USB alternate settings */
212 u8 audio; /* presence of audio device */ 213 u8 audio; /* presence of audio device */
213}; 214};
214 215
diff --git a/drivers/media/video/gspca/jl2005bcd.c b/drivers/media/video/gspca/jl2005bcd.c
new file mode 100644
index 00000000000..53f58ef367c
--- /dev/null
+++ b/drivers/media/video/gspca/jl2005bcd.c
@@ -0,0 +1,554 @@
1/*
2 * Jeilin JL2005B/C/D library
3 *
4 * Copyright (C) 2011 Theodore Kilgore <kilgota@auburn.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#define MODULE_NAME "jl2005bcd"
22
23#include <linux/workqueue.h>
24#include <linux/slab.h>
25#include "gspca.h"
26
27
28MODULE_AUTHOR("Theodore Kilgore <kilgota@auburn.edu>");
29MODULE_DESCRIPTION("JL2005B/C/D USB Camera Driver");
30MODULE_LICENSE("GPL");
31
32/* Default timeouts, in ms */
33#define JL2005C_CMD_TIMEOUT 500
34#define JL2005C_DATA_TIMEOUT 1000
35
36/* Maximum transfer size to use. */
37#define JL2005C_MAX_TRANSFER 0x200
38#define FRAME_HEADER_LEN 16
39
40
41/* specific webcam descriptor */
42struct sd {
43 struct gspca_dev gspca_dev; /* !! must be the first item */
44 unsigned char firmware_id[6];
45 const struct v4l2_pix_format *cap_mode;
46 /* Driver stuff */
47 struct work_struct work_struct;
48 struct workqueue_struct *work_thread;
49 u8 frame_brightness;
50 int block_size; /* block size of camera */
51 int vga; /* 1 if vga cam, 0 if cif cam */
52};
53
54
55/* Camera has two resolution settings. What they are depends on model. */
56static const struct v4l2_pix_format cif_mode[] = {
57 {176, 144, V4L2_PIX_FMT_JL2005BCD, V4L2_FIELD_NONE,
58 .bytesperline = 176,
59 .sizeimage = 176 * 144,
60 .colorspace = V4L2_COLORSPACE_SRGB,
61 .priv = 0},
62 {352, 288, V4L2_PIX_FMT_JL2005BCD, V4L2_FIELD_NONE,
63 .bytesperline = 352,
64 .sizeimage = 352 * 288,
65 .colorspace = V4L2_COLORSPACE_SRGB,
66 .priv = 0},
67};
68
69static const struct v4l2_pix_format vga_mode[] = {
70 {320, 240, V4L2_PIX_FMT_JL2005BCD, V4L2_FIELD_NONE,
71 .bytesperline = 320,
72 .sizeimage = 320 * 240,
73 .colorspace = V4L2_COLORSPACE_SRGB,
74 .priv = 0},
75 {640, 480, V4L2_PIX_FMT_JL2005BCD, V4L2_FIELD_NONE,
76 .bytesperline = 640,
77 .sizeimage = 640 * 480,
78 .colorspace = V4L2_COLORSPACE_SRGB,
79 .priv = 0},
80};
81
82/*
83 * cam uses endpoint 0x03 to send commands, 0x84 for read commands,
84 * and 0x82 for bulk data transfer.
85 */
86
87/* All commands are two bytes only */
88static int jl2005c_write2(struct gspca_dev *gspca_dev, unsigned char *command)
89{
90 int retval;
91
92 memcpy(gspca_dev->usb_buf, command, 2);
93 retval = usb_bulk_msg(gspca_dev->dev,
94 usb_sndbulkpipe(gspca_dev->dev, 3),
95 gspca_dev->usb_buf, 2, NULL, 500);
96 if (retval < 0)
97 pr_err("command write [%02x] error %d\n",
98 gspca_dev->usb_buf[0], retval);
99 return retval;
100}
101
102/* Response to a command is one byte in usb_buf[0], only if requested. */
103static int jl2005c_read1(struct gspca_dev *gspca_dev)
104{
105 int retval;
106
107 retval = usb_bulk_msg(gspca_dev->dev,
108 usb_rcvbulkpipe(gspca_dev->dev, 0x84),
109 gspca_dev->usb_buf, 1, NULL, 500);
110 if (retval < 0)
111 pr_err("read command [0x%02x] error %d\n",
112 gspca_dev->usb_buf[0], retval);
113 return retval;
114}
115
116/* Response appears in gspca_dev->usb_buf[0] */
117static int jl2005c_read_reg(struct gspca_dev *gspca_dev, unsigned char reg)
118{
119 int retval;
120
121 static u8 instruction[2] = {0x95, 0x00};
122 /* put register to read in byte 1 */
123 instruction[1] = reg;
124 /* Send the read request */
125 retval = jl2005c_write2(gspca_dev, instruction);
126 if (retval < 0)
127 return retval;
128 retval = jl2005c_read1(gspca_dev);
129
130 return retval;
131}
132
133static int jl2005c_start_new_frame(struct gspca_dev *gspca_dev)
134{
135 int i;
136 int retval;
137 int frame_brightness = 0;
138
139 static u8 instruction[2] = {0x7f, 0x01};
140
141 retval = jl2005c_write2(gspca_dev, instruction);
142 if (retval < 0)
143 return retval;
144
145 i = 0;
146 while (i < 20 && !frame_brightness) {
147 /* If we tried 20 times, give up. */
148 retval = jl2005c_read_reg(gspca_dev, 0x7e);
149 if (retval < 0)
150 return retval;
151 frame_brightness = gspca_dev->usb_buf[0];
152 retval = jl2005c_read_reg(gspca_dev, 0x7d);
153 if (retval < 0)
154 return retval;
155 i++;
156 }
157 PDEBUG(D_FRAM, "frame_brightness is 0x%02x", gspca_dev->usb_buf[0]);
158 return retval;
159}
160
161static int jl2005c_write_reg(struct gspca_dev *gspca_dev, unsigned char reg,
162 unsigned char value)
163{
164 int retval;
165 u8 instruction[2];
166
167 instruction[0] = reg;
168 instruction[1] = value;
169
170 retval = jl2005c_write2(gspca_dev, instruction);
171 if (retval < 0)
172 return retval;
173
174 return retval;
175}
176
177static int jl2005c_get_firmware_id(struct gspca_dev *gspca_dev)
178{
179 struct sd *sd = (struct sd *)gspca_dev;
180 int i = 0;
181 int retval = -1;
182 unsigned char regs_to_read[] = {0x57, 0x02, 0x03, 0x5d, 0x5e, 0x5f};
183
184 PDEBUG(D_PROBE, "Running jl2005c_get_firmware_id");
185 /* Read the first ID byte once for warmup */
186 retval = jl2005c_read_reg(gspca_dev, regs_to_read[0]);
187 PDEBUG(D_PROBE, "response is %02x", gspca_dev->usb_buf[0]);
188 if (retval < 0)
189 return retval;
190 /* Now actually get the ID string */
191 for (i = 0; i < 6; i++) {
192 retval = jl2005c_read_reg(gspca_dev, regs_to_read[i]);
193 if (retval < 0)
194 return retval;
195 sd->firmware_id[i] = gspca_dev->usb_buf[0];
196 }
197 PDEBUG(D_PROBE, "firmware ID is %02x%02x%02x%02x%02x%02x",
198 sd->firmware_id[0],
199 sd->firmware_id[1],
200 sd->firmware_id[2],
201 sd->firmware_id[3],
202 sd->firmware_id[4],
203 sd->firmware_id[5]);
204 return 0;
205}
206
207static int jl2005c_stream_start_vga_lg
208 (struct gspca_dev *gspca_dev)
209{
210 int i;
211 int retval = -1;
212 static u8 instruction[][2] = {
213 {0x05, 0x00},
214 {0x7c, 0x00},
215 {0x7d, 0x18},
216 {0x02, 0x00},
217 {0x01, 0x00},
218 {0x04, 0x52},
219 };
220
221 for (i = 0; i < ARRAY_SIZE(instruction); i++) {
222 msleep(60);
223 retval = jl2005c_write2(gspca_dev, instruction[i]);
224 if (retval < 0)
225 return retval;
226 }
227 msleep(60);
228 return retval;
229}
230
231static int jl2005c_stream_start_vga_small(struct gspca_dev *gspca_dev)
232{
233 int i;
234 int retval = -1;
235 static u8 instruction[][2] = {
236 {0x06, 0x00},
237 {0x7c, 0x00},
238 {0x7d, 0x1a},
239 {0x02, 0x00},
240 {0x01, 0x00},
241 {0x04, 0x52},
242 };
243
244 for (i = 0; i < ARRAY_SIZE(instruction); i++) {
245 msleep(60);
246 retval = jl2005c_write2(gspca_dev, instruction[i]);
247 if (retval < 0)
248 return retval;
249 }
250 msleep(60);
251 return retval;
252}
253
254static int jl2005c_stream_start_cif_lg(struct gspca_dev *gspca_dev)
255{
256 int i;
257 int retval = -1;
258 static u8 instruction[][2] = {
259 {0x05, 0x00},
260 {0x7c, 0x00},
261 {0x7d, 0x30},
262 {0x02, 0x00},
263 {0x01, 0x00},
264 {0x04, 0x42},
265 };
266
267 for (i = 0; i < ARRAY_SIZE(instruction); i++) {
268 msleep(60);
269 retval = jl2005c_write2(gspca_dev, instruction[i]);
270 if (retval < 0)
271 return retval;
272 }
273 msleep(60);
274 return retval;
275}
276
277static int jl2005c_stream_start_cif_small(struct gspca_dev *gspca_dev)
278{
279 int i;
280 int retval = -1;
281 static u8 instruction[][2] = {
282 {0x06, 0x00},
283 {0x7c, 0x00},
284 {0x7d, 0x32},
285 {0x02, 0x00},
286 {0x01, 0x00},
287 {0x04, 0x42},
288 };
289
290 for (i = 0; i < ARRAY_SIZE(instruction); i++) {
291 msleep(60);
292 retval = jl2005c_write2(gspca_dev, instruction[i]);
293 if (retval < 0)
294 return retval;
295 }
296 msleep(60);
297 return retval;
298}
299
300
301static int jl2005c_stop(struct gspca_dev *gspca_dev)
302{
303 int retval;
304
305 retval = jl2005c_write_reg(gspca_dev, 0x07, 0x00);
306 return retval;
307}
308
309/* This function is called as a workqueue function and runs whenever the camera
310 * is streaming data. Because it is a workqueue function it is allowed to sleep
311 * so we can use synchronous USB calls. To avoid possible collisions with other
312 * threads attempting to use the camera's USB interface the gspca usb_lock is
313 * used when performing the one USB control operation inside the workqueue,
314 * which tells the camera to close the stream. In practice the only thing
315 * which needs to be protected against is the usb_set_interface call that
316 * gspca makes during stream_off. Otherwise the camera doesn't provide any
317 * controls that the user could try to change.
318 */
319static void jl2005c_dostream(struct work_struct *work)
320{
321 struct sd *dev = container_of(work, struct sd, work_struct);
322 struct gspca_dev *gspca_dev = &dev->gspca_dev;
323 int bytes_left = 0; /* bytes remaining in current frame. */
324 int data_len; /* size to use for the next read. */
325 int header_read = 0;
326 unsigned char header_sig[2] = {0x4a, 0x4c};
327 int act_len;
328 int packet_type;
329 int ret;
330 u8 *buffer;
331
332 buffer = kmalloc(JL2005C_MAX_TRANSFER, GFP_KERNEL | GFP_DMA);
333 if (!buffer) {
334 pr_err("Couldn't allocate USB buffer\n");
335 goto quit_stream;
336 }
337
338 while (gspca_dev->present && gspca_dev->streaming) {
339 /* Check if this is a new frame. If so, start the frame first */
340 if (!header_read) {
341 mutex_lock(&gspca_dev->usb_lock);
342 ret = jl2005c_start_new_frame(gspca_dev);
343 mutex_unlock(&gspca_dev->usb_lock);
344 if (ret < 0)
345 goto quit_stream;
346 ret = usb_bulk_msg(gspca_dev->dev,
347 usb_rcvbulkpipe(gspca_dev->dev, 0x82),
348 buffer, JL2005C_MAX_TRANSFER, &act_len,
349 JL2005C_DATA_TIMEOUT);
350 PDEBUG(D_PACK,
351 "Got %d bytes out of %d for header",
352 act_len, JL2005C_MAX_TRANSFER);
353 if (ret < 0 || act_len < JL2005C_MAX_TRANSFER)
354 goto quit_stream;
355 /* Check whether we actually got the first blodk */
356 if (memcmp(header_sig, buffer, 2) != 0) {
357 pr_err("First block is not the first block\n");
358 goto quit_stream;
359 }
360 /* total size to fetch is byte 7, times blocksize
361 * of which we already got act_len */
362 bytes_left = buffer[0x07] * dev->block_size - act_len;
363 PDEBUG(D_PACK, "bytes_left = 0x%x", bytes_left);
364 /* We keep the header. It has other information, too.*/
365 packet_type = FIRST_PACKET;
366 gspca_frame_add(gspca_dev, packet_type,
367 buffer, act_len);
368 header_read = 1;
369 }
370 while (bytes_left > 0 && gspca_dev->present) {
371 data_len = bytes_left > JL2005C_MAX_TRANSFER ?
372 JL2005C_MAX_TRANSFER : bytes_left;
373 ret = usb_bulk_msg(gspca_dev->dev,
374 usb_rcvbulkpipe(gspca_dev->dev, 0x82),
375 buffer, data_len, &act_len,
376 JL2005C_DATA_TIMEOUT);
377 if (ret < 0 || act_len < data_len)
378 goto quit_stream;
379 PDEBUG(D_PACK,
380 "Got %d bytes out of %d for frame",
381 data_len, bytes_left);
382 bytes_left -= data_len;
383 if (bytes_left == 0) {
384 packet_type = LAST_PACKET;
385 header_read = 0;
386 } else
387 packet_type = INTER_PACKET;
388 gspca_frame_add(gspca_dev, packet_type,
389 buffer, data_len);
390 }
391 }
392quit_stream:
393 if (gspca_dev->present) {
394 mutex_lock(&gspca_dev->usb_lock);
395 jl2005c_stop(gspca_dev);
396 mutex_unlock(&gspca_dev->usb_lock);
397 }
398 kfree(buffer);
399}
400
401
402
403
404/* This function is called at probe time */
405static int sd_config(struct gspca_dev *gspca_dev,
406 const struct usb_device_id *id)
407{
408 struct cam *cam;
409 struct sd *sd = (struct sd *) gspca_dev;
410
411 cam = &gspca_dev->cam;
412 /* We don't use the buffer gspca allocates so make it small. */
413 cam->bulk_size = 64;
414 cam->bulk = 1;
415 /* For the rest, the camera needs to be detected */
416 jl2005c_get_firmware_id(gspca_dev);
417 /* Here are some known firmware IDs
418 * First some JL2005B cameras
419 * {0x41, 0x07, 0x04, 0x2c, 0xe8, 0xf2} Sakar KidzCam
420 * {0x45, 0x02, 0x08, 0xb9, 0x00, 0xd2} No-name JL2005B
421 * JL2005C cameras
422 * {0x01, 0x0c, 0x16, 0x10, 0xf8, 0xc8} Argus DC-1512
423 * {0x12, 0x04, 0x03, 0xc0, 0x00, 0xd8} ICarly
424 * {0x86, 0x08, 0x05, 0x02, 0x00, 0xd4} Jazz
425 *
426 * Based upon this scanty evidence, we can detect a CIF camera by
427 * testing byte 0 for 0x4x.
428 */
429 if ((sd->firmware_id[0] & 0xf0) == 0x40) {
430 cam->cam_mode = cif_mode;
431 cam->nmodes = ARRAY_SIZE(cif_mode);
432 sd->block_size = 0x80;
433 } else {
434 cam->cam_mode = vga_mode;
435 cam->nmodes = ARRAY_SIZE(vga_mode);
436 sd->block_size = 0x200;
437 }
438
439 INIT_WORK(&sd->work_struct, jl2005c_dostream);
440
441 return 0;
442}
443
444/* this function is called at probe and resume time */
445static int sd_init(struct gspca_dev *gspca_dev)
446{
447 return 0;
448}
449
450static int sd_start(struct gspca_dev *gspca_dev)
451{
452
453 struct sd *sd = (struct sd *) gspca_dev;
454 sd->cap_mode = gspca_dev->cam.cam_mode;
455
456 switch (gspca_dev->width) {
457 case 640:
458 PDEBUG(D_STREAM, "Start streaming at vga resolution");
459 jl2005c_stream_start_vga_lg(gspca_dev);
460 break;
461 case 320:
462 PDEBUG(D_STREAM, "Start streaming at qvga resolution");
463 jl2005c_stream_start_vga_small(gspca_dev);
464 break;
465 case 352:
466 PDEBUG(D_STREAM, "Start streaming at cif resolution");
467 jl2005c_stream_start_cif_lg(gspca_dev);
468 break;
469 case 176:
470 PDEBUG(D_STREAM, "Start streaming at qcif resolution");
471 jl2005c_stream_start_cif_small(gspca_dev);
472 break;
473 default:
474 pr_err("Unknown resolution specified\n");
475 return -1;
476 }
477
478 /* Start the workqueue function to do the streaming */
479 sd->work_thread = create_singlethread_workqueue(MODULE_NAME);
480 queue_work(sd->work_thread, &sd->work_struct);
481
482 return 0;
483}
484
485/* called on streamoff with alt==0 and on disconnect */
486/* the usb_lock is held at entry - restore on exit */
487static void sd_stop0(struct gspca_dev *gspca_dev)
488{
489 struct sd *dev = (struct sd *) gspca_dev;
490
491 /* wait for the work queue to terminate */
492 mutex_unlock(&gspca_dev->usb_lock);
493 /* This waits for sq905c_dostream to finish */
494 destroy_workqueue(dev->work_thread);
495 dev->work_thread = NULL;
496 mutex_lock(&gspca_dev->usb_lock);
497}
498
499
500
501/* sub-driver description */
502static const struct sd_desc sd_desc = {
503 .name = MODULE_NAME,
504 /* .ctrls = none have been detected */
505 /* .nctrls = ARRAY_SIZE(sd_ctrls), */
506 .config = sd_config,
507 .init = sd_init,
508 .start = sd_start,
509 .stop0 = sd_stop0,
510};
511
512/* -- module initialisation -- */
513static const __devinitdata struct usb_device_id device_table[] = {
514 {USB_DEVICE(0x0979, 0x0227)},
515 {}
516};
517MODULE_DEVICE_TABLE(usb, device_table);
518
519/* -- device connect -- */
520static int sd_probe(struct usb_interface *intf,
521 const struct usb_device_id *id)
522{
523 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
524 THIS_MODULE);
525}
526
527static struct usb_driver sd_driver = {
528 .name = MODULE_NAME,
529 .id_table = device_table,
530 .probe = sd_probe,
531 .disconnect = gspca_disconnect,
532#ifdef CONFIG_PM
533 .suspend = gspca_suspend,
534 .resume = gspca_resume,
535#endif
536};
537
538/* -- module insert / remove -- */
539static int __init sd_mod_init(void)
540{
541 int ret;
542
543 ret = usb_register(&sd_driver);
544 if (ret < 0)
545 return ret;
546 return 0;
547}
548static void __exit sd_mod_exit(void)
549{
550 usb_deregister(&sd_driver);
551}
552
553module_init(sd_mod_init);
554module_exit(sd_mod_exit);
diff --git a/drivers/media/video/gspca/konica.c b/drivers/media/video/gspca/konica.c
index b1da7f4096c..f0c0d74dfe9 100644
--- a/drivers/media/video/gspca/konica.c
+++ b/drivers/media/video/gspca/konica.c
@@ -247,9 +247,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
247 gspca_dev->cam.cam_mode = vga_mode; 247 gspca_dev->cam.cam_mode = vga_mode;
248 gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode); 248 gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode);
249 gspca_dev->cam.no_urb_create = 1; 249 gspca_dev->cam.no_urb_create = 1;
250 /* The highest alt setting has an isoc packetsize of 0, so we
251 don't want to use it */
252 gspca_dev->nbalt--;
253 250
254 sd->brightness = BRIGHTNESS_DEFAULT; 251 sd->brightness = BRIGHTNESS_DEFAULT;
255 sd->contrast = CONTRAST_DEFAULT; 252 sd->contrast = CONTRAST_DEFAULT;
diff --git a/drivers/media/video/gspca/mars.c b/drivers/media/video/gspca/mars.c
index 5c2ea05c46b..b0231465afa 100644
--- a/drivers/media/video/gspca/mars.c
+++ b/drivers/media/video/gspca/mars.c
@@ -263,7 +263,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
263 cam->nmodes = ARRAY_SIZE(vga_mode); 263 cam->nmodes = ARRAY_SIZE(vga_mode);
264 cam->ctrls = sd->ctrls; 264 cam->ctrls = sd->ctrls;
265 sd->quality = QUALITY_DEF; 265 sd->quality = QUALITY_DEF;
266 gspca_dev->nbalt = 9; /* use the altsetting 08 */
267 return 0; 266 return 0;
268} 267}
269 268
diff --git a/drivers/media/video/gspca/nw80x.c b/drivers/media/video/gspca/nw80x.c
index d4bec932177..7167cac7359 100644
--- a/drivers/media/video/gspca/nw80x.c
+++ b/drivers/media/video/gspca/nw80x.c
@@ -1763,8 +1763,8 @@ static int sd_config(struct gspca_dev *gspca_dev,
1763 if ((unsigned) webcam >= NWEBCAMS) 1763 if ((unsigned) webcam >= NWEBCAMS)
1764 webcam = 0; 1764 webcam = 0;
1765 sd->webcam = webcam; 1765 sd->webcam = webcam;
1766 gspca_dev->cam.reverse_alts = 1;
1767 gspca_dev->cam.ctrls = sd->ctrls; 1766 gspca_dev->cam.ctrls = sd->ctrls;
1767 gspca_dev->cam.needs_full_bandwidth = 1;
1768 sd->ag_cnt = -1; 1768 sd->ag_cnt = -1;
1769 1769
1770 /* 1770 /*
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index 08b8ce1dee1..739e8a2a2d3 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -3348,7 +3348,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
3348 case BRIDGE_W9968CF: 3348 case BRIDGE_W9968CF:
3349 cam->cam_mode = w9968cf_vga_mode; 3349 cam->cam_mode = w9968cf_vga_mode;
3350 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode); 3350 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3351 cam->reverse_alts = 1;
3352 break; 3351 break;
3353 } 3352 }
3354 3353
@@ -3684,8 +3683,8 @@ static void ov511_mode_init_regs(struct sd *sd)
3684 /* Check if we have enough bandwidth to disable compression */ 3683 /* Check if we have enough bandwidth to disable compression */
3685 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1; 3684 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3686 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2; 3685 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3687 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */ 3686 /* 1000 isoc packets/sec */
3688 if (needed > 1400 * packet_size) { 3687 if (needed > 1000 * packet_size) {
3689 /* Enable Y and UV quantization and compression */ 3688 /* Enable Y and UV quantization and compression */
3690 reg_w(sd, R511_COMP_EN, 0x07); 3689 reg_w(sd, R511_COMP_EN, 0x07);
3691 reg_w(sd, R511_COMP_LUT_EN, 0x03); 3690 reg_w(sd, R511_COMP_LUT_EN, 0x03);
diff --git a/drivers/media/video/gspca/ov534_9.c b/drivers/media/video/gspca/ov534_9.c
index f30060d5063..fbfa02affa1 100644
--- a/drivers/media/video/gspca/ov534_9.c
+++ b/drivers/media/video/gspca/ov534_9.c
@@ -71,6 +71,7 @@ struct sd {
71enum sensors { 71enum sensors {
72 SENSOR_OV965x, /* ov9657 */ 72 SENSOR_OV965x, /* ov9657 */
73 SENSOR_OV971x, /* ov9712 */ 73 SENSOR_OV971x, /* ov9712 */
74 SENSOR_OV562x, /* ov5621 */
74 NSENSORS 75 NSENSORS
75}; 76};
76 77
@@ -207,6 +208,14 @@ static const struct v4l2_pix_format ov971x_mode[] = {
207 } 208 }
208}; 209};
209 210
211static const struct v4l2_pix_format ov562x_mode[] = {
212 {2592, 1680, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
213 .bytesperline = 2592,
214 .sizeimage = 2592 * 1680,
215 .colorspace = V4L2_COLORSPACE_SRGB
216 }
217};
218
210static const u8 bridge_init[][2] = { 219static const u8 bridge_init[][2] = {
211 {0x88, 0xf8}, 220 {0x88, 0xf8},
212 {0x89, 0xff}, 221 {0x89, 0xff},
@@ -830,6 +839,124 @@ static const u8 ov965x_start_2_sxga[][2] = {
830 {0xa3, 0x41}, /* bd60 */ 839 {0xa3, 0x41}, /* bd60 */
831}; 840};
832 841
842static const u8 ov562x_init[][2] = {
843 {0x88, 0x20},
844 {0x89, 0x0a},
845 {0x8a, 0x90},
846 {0x8b, 0x06},
847 {0x8c, 0x01},
848 {0x8d, 0x10},
849 {0x1c, 0x00},
850 {0x1d, 0x48},
851 {0x1d, 0x00},
852 {0x1d, 0xff},
853 {0x1c, 0x0a},
854 {0x1d, 0x2e},
855 {0x1d, 0x1e},
856};
857
858static const u8 ov562x_init_2[][2] = {
859 {0x12, 0x80},
860 {0x11, 0x41},
861 {0x13, 0x00},
862 {0x10, 0x1e},
863 {0x3b, 0x07},
864 {0x5b, 0x40},
865 {0x39, 0x07},
866 {0x53, 0x02},
867 {0x54, 0x60},
868 {0x04, 0x20},
869 {0x27, 0x04},
870 {0x3d, 0x40},
871 {0x36, 0x00},
872 {0xc5, 0x04},
873 {0x4e, 0x00},
874 {0x4f, 0x93},
875 {0x50, 0x7b},
876 {0xca, 0x0c},
877 {0xcb, 0x0f},
878 {0x39, 0x07},
879 {0x4a, 0x10},
880 {0x3e, 0x0a},
881 {0x3d, 0x00},
882 {0x0c, 0x38},
883 {0x38, 0x90},
884 {0x46, 0x30},
885 {0x4f, 0x93},
886 {0x50, 0x7b},
887 {0xab, 0x00},
888 {0xca, 0x0c},
889 {0xcb, 0x0f},
890 {0x37, 0x02},
891 {0x44, 0x48},
892 {0x8d, 0x44},
893 {0x2a, 0x00},
894 {0x2b, 0x00},
895 {0x32, 0x00},
896 {0x38, 0x90},
897 {0x53, 0x02},
898 {0x54, 0x60},
899 {0x12, 0x00},
900 {0x17, 0x12},
901 {0x18, 0xb4},
902 {0x19, 0x0c},
903 {0x1a, 0xf4},
904 {0x03, 0x4a},
905 {0x89, 0x20},
906 {0x83, 0x80},
907 {0xb7, 0x9d},
908 {0xb6, 0x11},
909 {0xb5, 0x55},
910 {0xb4, 0x00},
911 {0xa9, 0xf0},
912 {0xa8, 0x0a},
913 {0xb8, 0xf0},
914 {0xb9, 0xf0},
915 {0xba, 0xf0},
916 {0x81, 0x07},
917 {0x63, 0x44},
918 {0x13, 0xc7},
919 {0x14, 0x60},
920 {0x33, 0x75},
921 {0x2c, 0x00},
922 {0x09, 0x00},
923 {0x35, 0x30},
924 {0x27, 0x04},
925 {0x3c, 0x07},
926 {0x3a, 0x0a},
927 {0x3b, 0x07},
928 {0x01, 0x40},
929 {0x02, 0x40},
930 {0x16, 0x40},
931 {0x52, 0xb0},
932 {0x51, 0x83},
933 {0x21, 0xbb},
934 {0x22, 0x10},
935 {0x23, 0x03},
936 {0x35, 0x38},
937 {0x20, 0x90},
938 {0x28, 0x30},
939 {0x73, 0xe1},
940 {0x6c, 0x00},
941 {0x6d, 0x80},
942 {0x6e, 0x00},
943 {0x70, 0x04},
944 {0x71, 0x00},
945 {0x8d, 0x04},
946 {0x64, 0x00},
947 {0x65, 0x00},
948 {0x66, 0x00},
949 {0x67, 0x00},
950 {0x68, 0x00},
951 {0x69, 0x00},
952 {0x6a, 0x00},
953 {0x6b, 0x00},
954 {0x71, 0x94},
955 {0x74, 0x20},
956 {0x80, 0x09},
957 {0x85, 0xc0},
958};
959
833static void reg_w_i(struct gspca_dev *gspca_dev, u16 reg, u8 val) 960static void reg_w_i(struct gspca_dev *gspca_dev, u16 reg, u8 val)
834{ 961{
835 struct usb_device *udev = gspca_dev->dev; 962 struct usb_device *udev = gspca_dev->dev;
@@ -1210,6 +1337,17 @@ static int sd_init(struct gspca_dev *gspca_dev)
1210 reg_w(gspca_dev, 0x56, 0x1f); 1337 reg_w(gspca_dev, 0x56, 0x1f);
1211 else 1338 else
1212 reg_w(gspca_dev, 0x56, 0x17); 1339 reg_w(gspca_dev, 0x56, 0x17);
1340 } else if ((sensor_id & 0xfff0) == 0x5620) {
1341 sd->sensor = SENSOR_OV562x;
1342
1343 gspca_dev->cam.cam_mode = ov562x_mode;
1344 gspca_dev->cam.nmodes = ARRAY_SIZE(ov562x_mode);
1345
1346 reg_w_array(gspca_dev, ov562x_init,
1347 ARRAY_SIZE(ov562x_init));
1348 sccb_w_array(gspca_dev, ov562x_init_2,
1349 ARRAY_SIZE(ov562x_init_2));
1350 reg_w(gspca_dev, 0xe0, 0x00);
1213 } else { 1351 } else {
1214 err("Unknown sensor %04x", sensor_id); 1352 err("Unknown sensor %04x", sensor_id);
1215 return -EINVAL; 1353 return -EINVAL;
@@ -1222,7 +1360,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
1222{ 1360{
1223 struct sd *sd = (struct sd *) gspca_dev; 1361 struct sd *sd = (struct sd *) gspca_dev;
1224 1362
1225 if (sd->sensor == SENSOR_OV971x) 1363 if (sd->sensor == SENSOR_OV971x || sd->sensor == SENSOR_OV562x)
1226 return gspca_dev->usb_err; 1364 return gspca_dev->usb_err;
1227 switch (gspca_dev->curr_mode) { 1365 switch (gspca_dev->curr_mode) {
1228 case QVGA_MODE: /* 320x240 */ 1366 case QVGA_MODE: /* 320x240 */
@@ -1409,6 +1547,7 @@ static const struct sd_desc sd_desc = {
1409static const struct usb_device_id device_table[] = { 1547static const struct usb_device_id device_table[] = {
1410 {USB_DEVICE(0x05a9, 0x8065)}, 1548 {USB_DEVICE(0x05a9, 0x8065)},
1411 {USB_DEVICE(0x06f8, 0x3003)}, 1549 {USB_DEVICE(0x06f8, 0x3003)},
1550 {USB_DEVICE(0x05a9, 0x1550)},
1412 {} 1551 {}
1413}; 1552};
1414 1553
diff --git a/drivers/media/video/gspca/pac207.c b/drivers/media/video/gspca/pac207.c
index ece8b1e82a1..3844c49f269 100644
--- a/drivers/media/video/gspca/pac207.c
+++ b/drivers/media/video/gspca/pac207.c
@@ -41,14 +41,14 @@ MODULE_LICENSE("GPL");
41#define PAC207_BRIGHTNESS_DEFAULT 46 41#define PAC207_BRIGHTNESS_DEFAULT 46
42 42
43#define PAC207_EXPOSURE_MIN 3 43#define PAC207_EXPOSURE_MIN 3
44#define PAC207_EXPOSURE_MAX 26 44#define PAC207_EXPOSURE_MAX 90 /* 1 sec expo time / 1 fps */
45#define PAC207_EXPOSURE_DEFAULT 5 /* power on default: 3 */ 45#define PAC207_EXPOSURE_DEFAULT 5 /* power on default: 3 */
46#define PAC207_EXPOSURE_KNEE 8 /* 4 = 30 fps, 11 = 8, 15 = 6 */ 46#define PAC207_EXPOSURE_KNEE 9 /* fps: 90 / exposure -> 9: 10 fps */
47 47
48#define PAC207_GAIN_MIN 0 48#define PAC207_GAIN_MIN 0
49#define PAC207_GAIN_MAX 31 49#define PAC207_GAIN_MAX 31
50#define PAC207_GAIN_DEFAULT 9 /* power on default: 9 */ 50#define PAC207_GAIN_DEFAULT 7 /* power on default: 9 */
51#define PAC207_GAIN_KNEE 31 51#define PAC207_GAIN_KNEE 15
52 52
53#define PAC207_AUTOGAIN_DEADZONE 30 53#define PAC207_AUTOGAIN_DEADZONE 30
54 54
@@ -332,7 +332,7 @@ static void pac207_do_auto_gain(struct gspca_dev *gspca_dev)
332 if (sd->autogain_ignore_frames > 0) 332 if (sd->autogain_ignore_frames > 0)
333 sd->autogain_ignore_frames--; 333 sd->autogain_ignore_frames--;
334 else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum, 334 else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum,
335 100, PAC207_AUTOGAIN_DEADZONE, 335 90, PAC207_AUTOGAIN_DEADZONE,
336 PAC207_GAIN_KNEE, PAC207_EXPOSURE_KNEE)) 336 PAC207_GAIN_KNEE, PAC207_EXPOSURE_KNEE))
337 sd->autogain_ignore_frames = PAC_AUTOGAIN_IGNORE_FRAMES; 337 sd->autogain_ignore_frames = PAC_AUTOGAIN_IGNORE_FRAMES;
338} 338}
diff --git a/drivers/media/video/gspca/pac7302.c b/drivers/media/video/gspca/pac7302.c
index 2811195258c..9db2b34d172 100644
--- a/drivers/media/video/gspca/pac7302.c
+++ b/drivers/media/video/gspca/pac7302.c
@@ -1197,6 +1197,7 @@ static const struct usb_device_id device_table[] = {
1197 {USB_DEVICE(0x093a, 0x2629), .driver_info = FL_VFLIP}, 1197 {USB_DEVICE(0x093a, 0x2629), .driver_info = FL_VFLIP},
1198 {USB_DEVICE(0x093a, 0x262a)}, 1198 {USB_DEVICE(0x093a, 0x262a)},
1199 {USB_DEVICE(0x093a, 0x262c)}, 1199 {USB_DEVICE(0x093a, 0x262c)},
1200 {USB_DEVICE(0x145f, 0x013c)},
1200 {} 1201 {}
1201}; 1202};
1202MODULE_DEVICE_TABLE(usb, device_table); 1203MODULE_DEVICE_TABLE(usb, device_table);
diff --git a/drivers/media/video/gspca/se401.c b/drivers/media/video/gspca/se401.c
index 1494e1829d3..bb70092c222 100644
--- a/drivers/media/video/gspca/se401.c
+++ b/drivers/media/video/gspca/se401.c
@@ -376,7 +376,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
376 cam->bulk_size = BULK_SIZE; 376 cam->bulk_size = BULK_SIZE;
377 cam->bulk_nurbs = 4; 377 cam->bulk_nurbs = 4;
378 cam->ctrls = sd->ctrls; 378 cam->ctrls = sd->ctrls;
379 gspca_dev->nbalt = 1; /* Ignore the bogus isoc alt settings */
380 sd->resetlevel = 0x2d; /* Set initial resetlevel */ 379 sd->resetlevel = 0x2d; /* Set initial resetlevel */
381 380
382 /* See if the camera supports brightness */ 381 /* See if the camera supports brightness */
@@ -395,6 +394,14 @@ static int sd_init(struct gspca_dev *gspca_dev)
395 return 0; 394 return 0;
396} 395}
397 396
397/* function called at start time before URB creation */
398static int sd_isoc_init(struct gspca_dev *gspca_dev)
399{
400 gspca_dev->alt = 1; /* Ignore the bogus isoc alt settings */
401
402 return gspca_dev->usb_err;
403}
404
398/* -- start the camera -- */ 405/* -- start the camera -- */
399static int sd_start(struct gspca_dev *gspca_dev) 406static int sd_start(struct gspca_dev *gspca_dev)
400{ 407{
@@ -714,6 +721,7 @@ static const struct sd_desc sd_desc = {
714 .nctrls = ARRAY_SIZE(sd_ctrls), 721 .nctrls = ARRAY_SIZE(sd_ctrls),
715 .config = sd_config, 722 .config = sd_config,
716 .init = sd_init, 723 .init = sd_init,
724 .isoc_init = sd_isoc_init,
717 .start = sd_start, 725 .start = sd_start,
718 .stopN = sd_stopN, 726 .stopN = sd_stopN,
719 .dq_callback = sd_dq_callback, 727 .dq_callback = sd_dq_callback,
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c
index 33cabc342dc..9e198b45c3c 100644
--- a/drivers/media/video/gspca/sn9c20x.c
+++ b/drivers/media/video/gspca/sn9c20x.c
@@ -2048,6 +2048,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
2048 struct cam *cam; 2048 struct cam *cam;
2049 2049
2050 cam = &gspca_dev->cam; 2050 cam = &gspca_dev->cam;
2051 cam->needs_full_bandwidth = 1;
2051 2052
2052 sd->sensor = (id->driver_info >> 8) & 0xff; 2053 sd->sensor = (id->driver_info >> 8) & 0xff;
2053 sd->i2c_addr = id->driver_info & 0xff; 2054 sd->i2c_addr = id->driver_info & 0xff;
@@ -2233,6 +2234,42 @@ static void configure_sensor_output(struct gspca_dev *gspca_dev, int mode)
2233 } 2234 }
2234} 2235}
2235 2236
2237static int sd_isoc_init(struct gspca_dev *gspca_dev)
2238{
2239 struct usb_interface *intf;
2240 u32 flags = gspca_dev->cam.cam_mode[(int)gspca_dev->curr_mode].priv;
2241
2242 /*
2243 * When using the SN9C20X_I420 fmt the sn9c20x needs more bandwidth
2244 * than our regular bandwidth calculations reserve, so we force the
2245 * use of a specific altsetting when using the SN9C20X_I420 fmt.
2246 */
2247 if (!(flags & (MODE_RAW | MODE_JPEG))) {
2248 intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
2249
2250 if (intf->num_altsetting != 9) {
2251 pr_warn("sn9c20x camera with unknown number of alt "
2252 "settings (%d), please report!\n",
2253 intf->num_altsetting);
2254 gspca_dev->alt = intf->num_altsetting;
2255 return 0;
2256 }
2257
2258 switch (gspca_dev->width) {
2259 case 160: /* 160x120 */
2260 gspca_dev->alt = 2;
2261 break;
2262 case 320: /* 320x240 */
2263 gspca_dev->alt = 6;
2264 break;
2265 default: /* >= 640x480 */
2266 gspca_dev->alt = 9;
2267 }
2268 }
2269
2270 return 0;
2271}
2272
2236#define HW_WIN(mode, hstart, vstart) \ 2273#define HW_WIN(mode, hstart, vstart) \
2237((const u8 []){hstart, 0, vstart, 0, \ 2274((const u8 []){hstart, 0, vstart, 0, \
2238(mode & MODE_SXGA ? 1280 >> 4 : 640 >> 4), \ 2275(mode & MODE_SXGA ? 1280 >> 4 : 640 >> 4), \
@@ -2473,6 +2510,7 @@ static const struct sd_desc sd_desc = {
2473 .nctrls = ARRAY_SIZE(sd_ctrls), 2510 .nctrls = ARRAY_SIZE(sd_ctrls),
2474 .config = sd_config, 2511 .config = sd_config,
2475 .init = sd_init, 2512 .init = sd_init,
2513 .isoc_init = sd_isoc_init,
2476 .start = sd_start, 2514 .start = sd_start,
2477 .stopN = sd_stopN, 2515 .stopN = sd_stopN,
2478 .pkt_scan = sd_pkt_scan, 2516 .pkt_scan = sd_pkt_scan,
diff --git a/drivers/media/video/gspca/sonixb.c b/drivers/media/video/gspca/sonixb.c
index ddb392dc4f2..6a1148d7fe9 100644
--- a/drivers/media/video/gspca/sonixb.c
+++ b/drivers/media/video/gspca/sonixb.c
@@ -1079,20 +1079,23 @@ static int sd_config(struct gspca_dev *gspca_dev,
1079 } 1079 }
1080 cam->npkt = 36; /* 36 packets per ISOC message */ 1080 cam->npkt = 36; /* 36 packets per ISOC message */
1081 1081
1082 if (sensor_data[sd->sensor].flags & F_COARSE_EXPO) {
1083 sd->ctrls[EXPOSURE].min = COARSE_EXPOSURE_MIN;
1084 sd->ctrls[EXPOSURE].max = COARSE_EXPOSURE_MAX;
1085 sd->ctrls[EXPOSURE].def = COARSE_EXPOSURE_DEF;
1086 }
1087
1088 return 0; 1082 return 0;
1089} 1083}
1090 1084
1091/* this function is called at probe and resume time */ 1085/* this function is called at probe and resume time */
1092static int sd_init(struct gspca_dev *gspca_dev) 1086static int sd_init(struct gspca_dev *gspca_dev)
1093{ 1087{
1088 struct sd *sd = (struct sd *) gspca_dev;
1094 const __u8 stop = 0x09; /* Disable stream turn of LED */ 1089 const __u8 stop = 0x09; /* Disable stream turn of LED */
1095 1090
1091 if (sensor_data[sd->sensor].flags & F_COARSE_EXPO) {
1092 sd->ctrls[EXPOSURE].min = COARSE_EXPOSURE_MIN;
1093 sd->ctrls[EXPOSURE].max = COARSE_EXPOSURE_MAX;
1094 sd->ctrls[EXPOSURE].def = COARSE_EXPOSURE_DEF;
1095 if (sd->ctrls[EXPOSURE].val > COARSE_EXPOSURE_MAX)
1096 sd->ctrls[EXPOSURE].val = COARSE_EXPOSURE_DEF;
1097 }
1098
1096 reg_w(gspca_dev, 0x01, &stop, 1); 1099 reg_w(gspca_dev, 0x01, &stop, 1);
1097 1100
1098 return 0; 1101 return 0;
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index afa3186b803..0c9e6ddabd2 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -1235,7 +1235,7 @@ static const u8 po2030n_sensor_param1[][8] = {
1235 {DELAY, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 8ms */ 1235 {DELAY, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 8ms */
1236 {0xa1, 0x6e, 0x1b, 0xf4, 0x00, 0x00, 0x00, 0x10}, 1236 {0xa1, 0x6e, 0x1b, 0xf4, 0x00, 0x00, 0x00, 0x10},
1237 {0xa1, 0x6e, 0x15, 0x04, 0x00, 0x00, 0x00, 0x10}, 1237 {0xa1, 0x6e, 0x15, 0x04, 0x00, 0x00, 0x00, 0x10},
1238 {0xd1, 0x6e, 0x16, 0x50, 0x40, 0x49, 0x40, 0x10}, 1238 {0xd1, 0x6e, 0x16, 0x40, 0x40, 0x40, 0x40, 0x10}, /* RGBG gains */
1239/*param2*/ 1239/*param2*/
1240 {0xa1, 0x6e, 0x1d, 0x00, 0x00, 0x00, 0x00, 0x10}, 1240 {0xa1, 0x6e, 0x1d, 0x00, 0x00, 0x00, 0x00, 0x10},
1241 {0xa1, 0x6e, 0x04, 0x03, 0x00, 0x00, 0x00, 0x10}, 1241 {0xa1, 0x6e, 0x04, 0x03, 0x00, 0x00, 0x00, 0x10},
@@ -1779,10 +1779,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
1779 sd->ag_cnt = -1; 1779 sd->ag_cnt = -1;
1780 sd->quality = QUALITY_DEF; 1780 sd->quality = QUALITY_DEF;
1781 1781
1782 /* if USB 1.1, let some bandwidth for the audio device */
1783 if (gspca_dev->audio && gspca_dev->dev->speed < USB_SPEED_HIGH)
1784 gspca_dev->nbalt--;
1785
1786 INIT_WORK(&sd->work, qual_upd); 1782 INIT_WORK(&sd->work, qual_upd);
1787 1783
1788 return 0; 1784 return 0;
@@ -2063,6 +2059,16 @@ static void setredblue(struct gspca_dev *gspca_dev)
2063{ 2059{
2064 struct sd *sd = (struct sd *) gspca_dev; 2060 struct sd *sd = (struct sd *) gspca_dev;
2065 2061
2062 if (sd->sensor == SENSOR_PO2030N) {
2063 u8 rg1b[] = /* red green1 blue (no g2) */
2064 {0xc1, 0x6e, 0x16, 0x00, 0x40, 0x00, 0x00, 0x10};
2065
2066 /* 0x40 = normal value = gain x 1 */
2067 rg1b[3] = sd->ctrls[RED].val * 2;
2068 rg1b[5] = sd->ctrls[BLUE].val * 2;
2069 i2c_w8(gspca_dev, rg1b);
2070 return;
2071 }
2066 reg_w1(gspca_dev, 0x05, sd->ctrls[RED].val); 2072 reg_w1(gspca_dev, 0x05, sd->ctrls[RED].val);
2067/* reg_w1(gspca_dev, 0x07, 32); */ 2073/* reg_w1(gspca_dev, 0x07, 32); */
2068 reg_w1(gspca_dev, 0x06, sd->ctrls[BLUE].val); 2074 reg_w1(gspca_dev, 0x06, sd->ctrls[BLUE].val);
@@ -2397,7 +2403,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
2397 reg_w1(gspca_dev, 0x17, reg17); 2403 reg_w1(gspca_dev, 0x17, reg17);
2398 reg01 &= ~S_PWR_DN; /* sensor power on */ 2404 reg01 &= ~S_PWR_DN; /* sensor power on */
2399 reg_w1(gspca_dev, 0x01, reg01); 2405 reg_w1(gspca_dev, 0x01, reg01);
2400 reg01 &= ~SYS_SEL_48M; 2406 reg01 &= ~SCL_SEL_OD; /* remove open-drain mode */
2401 reg_w1(gspca_dev, 0x01, reg01); 2407 reg_w1(gspca_dev, 0x01, reg01);
2402 2408
2403 switch (sd->sensor) { 2409 switch (sd->sensor) {
diff --git a/drivers/media/video/gspca/spca561.c b/drivers/media/video/gspca/spca561.c
index 259a0c73c66..4a5f209ce71 100644
--- a/drivers/media/video/gspca/spca561.c
+++ b/drivers/media/video/gspca/spca561.c
@@ -451,7 +451,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
451 } 451 }
452 452
453 cam = &gspca_dev->cam; 453 cam = &gspca_dev->cam;
454 gspca_dev->nbalt = 7 + 1; /* choose alternate 7 first */ 454 cam->needs_full_bandwidth = 1;
455 455
456 sd->chip_revision = id->driver_info; 456 sd->chip_revision = id->driver_info;
457 if (sd->chip_revision == Rev012A) { 457 if (sd->chip_revision == Rev012A) {
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c
index 6f878f6c6e9..91d99b4cc57 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx.c
@@ -304,7 +304,7 @@ static int stv06xx_isoc_init(struct gspca_dev *gspca_dev)
304 struct sd *sd = (struct sd *) gspca_dev; 304 struct sd *sd = (struct sd *) gspca_dev;
305 305
306 /* Start isoc bandwidth "negotiation" at max isoc bandwidth */ 306 /* Start isoc bandwidth "negotiation" at max isoc bandwidth */
307 alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1]; 307 alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
308 alt->endpoint[0].desc.wMaxPacketSize = 308 alt->endpoint[0].desc.wMaxPacketSize =
309 cpu_to_le16(sd->sensor->max_packet_size[gspca_dev->curr_mode]); 309 cpu_to_le16(sd->sensor->max_packet_size[gspca_dev->curr_mode]);
310 310
@@ -317,7 +317,7 @@ static int stv06xx_isoc_nego(struct gspca_dev *gspca_dev)
317 struct usb_host_interface *alt; 317 struct usb_host_interface *alt;
318 struct sd *sd = (struct sd *) gspca_dev; 318 struct sd *sd = (struct sd *) gspca_dev;
319 319
320 alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1]; 320 alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
321 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); 321 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
322 min_packet_size = sd->sensor->min_packet_size[gspca_dev->curr_mode]; 322 min_packet_size = sd->sensor->min_packet_size[gspca_dev->curr_mode];
323 if (packet_size <= min_packet_size) 323 if (packet_size <= min_packet_size)
diff --git a/drivers/media/video/gspca/t613.c b/drivers/media/video/gspca/t613.c
index ea44deb66af..9b9f85a8e60 100644
--- a/drivers/media/video/gspca/t613.c
+++ b/drivers/media/video/gspca/t613.c
@@ -30,6 +30,7 @@
30 30
31#define MODULE_NAME "t613" 31#define MODULE_NAME "t613"
32 32
33#include <linux/input.h>
33#include <linux/slab.h> 34#include <linux/slab.h>
34#include "gspca.h" 35#include "gspca.h"
35 36
@@ -57,6 +58,7 @@ struct sd {
57 u8 effect; 58 u8 effect;
58 59
59 u8 sensor; 60 u8 sensor;
61 u8 button_pressed;
60}; 62};
61enum sensors { 63enum sensors {
62 SENSOR_OM6802, 64 SENSOR_OM6802,
@@ -1095,15 +1097,35 @@ static void sd_stopN(struct gspca_dev *gspca_dev)
1095 msleep(20); 1097 msleep(20);
1096 reg_w(gspca_dev, 0x0309); 1098 reg_w(gspca_dev, 0x0309);
1097 } 1099 }
1100#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
1101 /* If the last button state is pressed, release it now! */
1102 if (sd->button_pressed) {
1103 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
1104 input_sync(gspca_dev->input_dev);
1105 sd->button_pressed = 0;
1106 }
1107#endif
1098} 1108}
1099 1109
1100static void sd_pkt_scan(struct gspca_dev *gspca_dev, 1110static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1101 u8 *data, /* isoc packet */ 1111 u8 *data, /* isoc packet */
1102 int len) /* iso packet length */ 1112 int len) /* iso packet length */
1103{ 1113{
1114 struct sd *sd = (struct sd *) gspca_dev;
1104 int pkt_type; 1115 int pkt_type;
1105 1116
1106 if (data[0] == 0x5a) { 1117 if (data[0] == 0x5a) {
1118#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
1119 if (len > 20) {
1120 u8 state = (data[20] & 0x80) ? 1 : 0;
1121 if (sd->button_pressed != state) {
1122 input_report_key(gspca_dev->input_dev,
1123 KEY_CAMERA, state);
1124 input_sync(gspca_dev->input_dev);
1125 sd->button_pressed = state;
1126 }
1127 }
1128#endif
1107 /* Control Packet, after this came the header again, 1129 /* Control Packet, after this came the header again,
1108 * but extra bytes came in the packet before this, 1130 * but extra bytes came in the packet before this,
1109 * sometimes an EOF arrives, sometimes not... */ 1131 * sometimes an EOF arrives, sometimes not... */
@@ -1410,6 +1432,9 @@ static const struct sd_desc sd_desc = {
1410 .stopN = sd_stopN, 1432 .stopN = sd_stopN,
1411 .pkt_scan = sd_pkt_scan, 1433 .pkt_scan = sd_pkt_scan,
1412 .querymenu = sd_querymenu, 1434 .querymenu = sd_querymenu,
1435#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
1436 .other_input = 1,
1437#endif
1413}; 1438};
1414 1439
1415/* -- module initialisation -- */ 1440/* -- module initialisation -- */
diff --git a/drivers/media/video/gspca/topro.c b/drivers/media/video/gspca/topro.c
index b2695b1dc60..444d3c5b907 100644
--- a/drivers/media/video/gspca/topro.c
+++ b/drivers/media/video/gspca/topro.c
@@ -3946,7 +3946,7 @@ static int get_fr_idx(struct gspca_dev *gspca_dev)
3946 /* 640x480 * 30 fps does not work */ 3946 /* 640x480 * 30 fps does not work */
3947 if (i == 6 /* if 30 fps */ 3947 if (i == 6 /* if 30 fps */
3948 && gspca_dev->width == 640) 3948 && gspca_dev->width == 640)
3949 i = 0x86; /* 15 fps */ 3949 i = 0x05; /* 15 fps */
3950 } else { 3950 } else {
3951 for (i = 0; i < ARRAY_SIZE(rates_6810) - 1; i++) { 3951 for (i = 0; i < ARRAY_SIZE(rates_6810) - 1; i++) {
3952 if (sd->framerate >= rates_6810[i]) 3952 if (sd->framerate >= rates_6810[i])
diff --git a/drivers/media/video/gspca/vicam.c b/drivers/media/video/gspca/vicam.c
index d12ea1518ac..911152e169d 100644
--- a/drivers/media/video/gspca/vicam.c
+++ b/drivers/media/video/gspca/vicam.c
@@ -324,7 +324,8 @@ static void sd_stop0(struct gspca_dev *gspca_dev)
324 dev->work_thread = NULL; 324 dev->work_thread = NULL;
325 mutex_lock(&gspca_dev->usb_lock); 325 mutex_lock(&gspca_dev->usb_lock);
326 326
327 vicam_set_camera_power(gspca_dev, 0); 327 if (gspca_dev->present)
328 vicam_set_camera_power(gspca_dev, 0);
328} 329}
329 330
330/* Table of supported USB devices */ 331/* Table of supported USB devices */
diff --git a/drivers/media/video/gspca/xirlink_cit.c b/drivers/media/video/gspca/xirlink_cit.c
index fbb6ed25ec3..ecada178bce 100644
--- a/drivers/media/video/gspca/xirlink_cit.c
+++ b/drivers/media/video/gspca/xirlink_cit.c
@@ -995,14 +995,12 @@ static int sd_config(struct gspca_dev *gspca_dev,
995 case CIT_MODEL0: 995 case CIT_MODEL0:
996 cam->cam_mode = model0_mode; 996 cam->cam_mode = model0_mode;
997 cam->nmodes = ARRAY_SIZE(model0_mode); 997 cam->nmodes = ARRAY_SIZE(model0_mode);
998 cam->reverse_alts = 1;
999 gspca_dev->ctrl_dis = ~((1 << SD_CONTRAST) | (1 << SD_HFLIP)); 998 gspca_dev->ctrl_dis = ~((1 << SD_CONTRAST) | (1 << SD_HFLIP));
1000 sd->sof_len = 4; 999 sd->sof_len = 4;
1001 break; 1000 break;
1002 case CIT_MODEL1: 1001 case CIT_MODEL1:
1003 cam->cam_mode = cif_yuv_mode; 1002 cam->cam_mode = cif_yuv_mode;
1004 cam->nmodes = ARRAY_SIZE(cif_yuv_mode); 1003 cam->nmodes = ARRAY_SIZE(cif_yuv_mode);
1005 cam->reverse_alts = 1;
1006 gspca_dev->ctrl_dis = (1 << SD_HUE) | (1 << SD_HFLIP); 1004 gspca_dev->ctrl_dis = (1 << SD_HUE) | (1 << SD_HFLIP);
1007 sd->sof_len = 4; 1005 sd->sof_len = 4;
1008 break; 1006 break;
@@ -2791,7 +2789,7 @@ static int sd_isoc_init(struct gspca_dev *gspca_dev)
2791 } 2789 }
2792 2790
2793 /* Start isoc bandwidth "negotiation" at max isoc bandwidth */ 2791 /* Start isoc bandwidth "negotiation" at max isoc bandwidth */
2794 alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1]; 2792 alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
2795 alt->endpoint[0].desc.wMaxPacketSize = cpu_to_le16(max_packet_size); 2793 alt->endpoint[0].desc.wMaxPacketSize = cpu_to_le16(max_packet_size);
2796 2794
2797 return 0; 2795 return 0;
@@ -2814,7 +2812,7 @@ static int sd_isoc_nego(struct gspca_dev *gspca_dev)
2814 break; 2812 break;
2815 } 2813 }
2816 2814
2817 alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1]; 2815 alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
2818 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); 2816 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
2819 if (packet_size <= min_packet_size) 2817 if (packet_size <= min_packet_size)
2820 return -EIO; 2818 return -EIO;
diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c
index 0202fead6b9..b9e15bb0328 100644
--- a/drivers/media/video/gspca/zc3xx.c
+++ b/drivers/media/video/gspca/zc3xx.c
@@ -5381,12 +5381,12 @@ static const struct usb_action tas5130c_NoFlikerScale[] = {
5381 {} 5381 {}
5382}; 5382};
5383 5383
5384static const struct usb_action gc0303_InitialScale[] = { 5384/* from usbvm305.inf 0ac8:305b 07/06/15 (3 - tas5130c) */
5385static const struct usb_action gc0303_Initial[] = {
5385 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */ 5386 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */
5386 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */ 5387 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */
5387 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */ 5388 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */
5388 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT}, /* 00,02,00,cc, 5389 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
5389 * 0<->10 */
5390 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc, */ 5390 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc, */
5391 {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW}, /* 00,04,80,cc, */ 5391 {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW}, /* 00,04,80,cc, */
5392 {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH}, /* 00,05,01,cc, */ 5392 {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH}, /* 00,05,01,cc, */
@@ -5405,29 +5405,22 @@ static const struct usb_action gc0303_InitialScale[] = {
5405 * 6<->8 */ 5405 * 6<->8 */
5406 {0xa0, 0x10, ZC3XX_R087_EXPTIMEMID}, /* 00,87,10,cc, */ 5406 {0xa0, 0x10, ZC3XX_R087_EXPTIMEMID}, /* 00,87,10,cc, */
5407 {0xa0, 0x98, ZC3XX_R08B_I2CDEVICEADDR}, /* 00,8b,98,cc, */ 5407 {0xa0, 0x98, ZC3XX_R08B_I2CDEVICEADDR}, /* 00,8b,98,cc, */
5408 {0xaa, 0x1b, 0x0024}, /* 00,1b,24,aa, */
5409 {0xdd, 0x00, 0x0080}, /* 00,00,80,dd, */
5410 {0xaa, 0x1b, 0x0000}, /* 00,1b,00,aa, */
5411 {0xaa, 0x13, 0x0002}, /* 00,13,02,aa, */
5412 {0xaa, 0x15, 0x0004}, /* 00,15,04,aa */
5413/*?? {0xaa, 0x01, 0x0000}, */
5414 {0xaa, 0x01, 0x0000}, 5408 {0xaa, 0x01, 0x0000},
5415 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa, */ 5409 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa, */
5416 {0xaa, 0x1c, 0x0017}, /* 00,1c,17,aa, */ 5410 {0xaa, 0x1c, 0x0017}, /* 00,1c,17,aa, */
5411 {0xaa, 0x1b, 0x0000},
5417 {0xa0, 0x82, ZC3XX_R086_EXPTIMEHIGH}, /* 00,86,82,cc, */ 5412 {0xa0, 0x82, ZC3XX_R086_EXPTIMEHIGH}, /* 00,86,82,cc, */
5418 {0xa0, 0x83, ZC3XX_R087_EXPTIMEMID}, /* 00,87,83,cc, */ 5413 {0xa0, 0x83, ZC3XX_R087_EXPTIMEMID}, /* 00,87,83,cc, */
5419 {0xa0, 0x84, ZC3XX_R088_EXPTIMELOW}, /* 00,88,84,cc, */ 5414 {0xa0, 0x84, ZC3XX_R088_EXPTIMELOW}, /* 00,88,84,cc, */
5420 {0xaa, 0x05, 0x0010}, /* 00,05,10,aa, */ 5415 {0xaa, 0x05, 0x0010}, /* 00,05,10,aa, */
5421 {0xaa, 0x0a, 0x0000}, /* 00,0a,00,aa, */ 5416 {0xaa, 0x0a, 0x0002},
5422 {0xaa, 0x0b, 0x00a0}, /* 00,0b,a0,aa, */ 5417 {0xaa, 0x0b, 0x0000},
5423 {0xaa, 0x0c, 0x0000}, /* 00,0c,00,aa, */ 5418 {0xaa, 0x0c, 0x0002},
5424 {0xaa, 0x0d, 0x00a0}, /* 00,0d,a0,aa, */ 5419 {0xaa, 0x0d, 0x0000},
5425 {0xaa, 0x0e, 0x0000}, /* 00,0e,00,aa, */ 5420 {0xaa, 0x0e, 0x0002},
5426 {0xaa, 0x0f, 0x00a0}, /* 00,0f,a0,aa, */ 5421 {0xaa, 0x0f, 0x0000},
5427 {0xaa, 0x10, 0x0000}, /* 00,10,00,aa, */ 5422 {0xaa, 0x10, 0x0002},
5428 {0xaa, 0x11, 0x00a0}, /* 00,11,a0,aa, */ 5423 {0xaa, 0x11, 0x0000},
5429/*?? {0xa0, 0x00, 0x0039},
5430 {0xa1, 0x01, 0x0037}, */
5431 {0xaa, 0x16, 0x0001}, /* 00,16,01,aa, */ 5424 {0xaa, 0x16, 0x0001}, /* 00,16,01,aa, */
5432 {0xaa, 0x17, 0x00e8}, /* 00,17,e6,aa, (e6 -> e8) */ 5425 {0xaa, 0x17, 0x00e8}, /* 00,17,e6,aa, (e6 -> e8) */
5433 {0xaa, 0x18, 0x0002}, /* 00,18,02,aa, */ 5426 {0xaa, 0x18, 0x0002}, /* 00,18,02,aa, */
@@ -5442,17 +5435,18 @@ static const struct usb_action gc0303_InitialScale[] = {
5442 {0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05}, /* 01,cb,13,cc, */ 5435 {0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05}, /* 01,cb,13,cc, */
5443 {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE}, /* 02,50,08,cc, */ 5436 {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE}, /* 02,50,08,cc, */
5444 {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS}, /* 03,01,08,cc, */ 5437 {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS}, /* 03,01,08,cc, */
5445 {0xa0, 0x60, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,60,cc, */ 5438 {0xa0, 0x58, ZC3XX_R1A8_DIGITALGAIN},
5446 {0xa0, 0x61, ZC3XX_R116_RGAIN}, /* 01,16,61,cc, */ 5439 {0xa0, 0x61, ZC3XX_R116_RGAIN}, /* 01,16,61,cc, */
5447 {0xa0, 0x65, ZC3XX_R118_BGAIN}, /* 01,18,65,cc */ 5440 {0xa0, 0x65, ZC3XX_R118_BGAIN}, /* 01,18,65,cc */
5441 {0xaa, 0x1b, 0x0000},
5448 {} 5442 {}
5449}; 5443};
5450 5444
5451static const struct usb_action gc0303_Initial[] = { 5445static const struct usb_action gc0303_InitialScale[] = {
5452 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */ 5446 {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL}, /* 00,00,01,cc, */
5453 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */ 5447 {0xa0, 0x02, ZC3XX_R008_CLOCKSETTING}, /* 00,08,02,cc, */
5454 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */ 5448 {0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT}, /* 00,10,01,cc, */
5455 {0xa0, 0x00, ZC3XX_R002_CLOCKSELECT}, /* 00,02,10,cc, */ 5449 {0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
5456 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc, */ 5450 {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH}, /* 00,03,02,cc, */
5457 {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW}, /* 00,04,80,cc, */ 5451 {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW}, /* 00,04,80,cc, */
5458 {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH}, /* 00,05,01,cc, */ 5452 {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH}, /* 00,05,01,cc, */
@@ -5471,34 +5465,26 @@ static const struct usb_action gc0303_Initial[] = {
5471 * 8<->6 */ 5465 * 8<->6 */
5472 {0xa0, 0x10, ZC3XX_R087_EXPTIMEMID}, /* 00,87,10,cc, */ 5466 {0xa0, 0x10, ZC3XX_R087_EXPTIMEMID}, /* 00,87,10,cc, */
5473 {0xa0, 0x98, ZC3XX_R08B_I2CDEVICEADDR}, /* 00,8b,98,cc, */ 5467 {0xa0, 0x98, ZC3XX_R08B_I2CDEVICEADDR}, /* 00,8b,98,cc, */
5474 {0xaa, 0x1b, 0x0024}, /* 00,1b,24,aa, */
5475 {0xdd, 0x00, 0x0080}, /* 00,00,80,dd, */
5476 {0xaa, 0x1b, 0x0000}, /* 00,1b,00,aa, */
5477 {0xaa, 0x13, 0x0002}, /* 00,13,02,aa, */
5478 {0xaa, 0x15, 0x0004}, /* 00,15,04,aa */
5479/*?? {0xaa, 0x01, 0x0000}, */
5480 {0xaa, 0x01, 0x0000}, 5468 {0xaa, 0x01, 0x0000},
5481 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa, */ 5469 {0xaa, 0x1a, 0x0000}, /* 00,1a,00,aa, */
5482 {0xaa, 0x1c, 0x0017}, /* 00,1c,17,aa, */ 5470 {0xaa, 0x1c, 0x0017}, /* 00,1c,17,aa, */
5471 {0xaa, 0x1b, 0x0000},
5483 {0xa0, 0x82, ZC3XX_R086_EXPTIMEHIGH}, /* 00,86,82,cc, */ 5472 {0xa0, 0x82, ZC3XX_R086_EXPTIMEHIGH}, /* 00,86,82,cc, */
5484 {0xa0, 0x83, ZC3XX_R087_EXPTIMEMID}, /* 00,87,83,cc, */ 5473 {0xa0, 0x83, ZC3XX_R087_EXPTIMEMID}, /* 00,87,83,cc, */
5485 {0xa0, 0x84, ZC3XX_R088_EXPTIMELOW}, /* 00,88,84,cc, */ 5474 {0xa0, 0x84, ZC3XX_R088_EXPTIMELOW}, /* 00,88,84,cc, */
5486 {0xaa, 0x05, 0x0010}, /* 00,05,10,aa, */ 5475 {0xaa, 0x05, 0x0010}, /* 00,05,10,aa, */
5487 {0xaa, 0x0a, 0x0000}, /* 00,0a,00,aa, */ 5476 {0xaa, 0x0a, 0x0001},
5488 {0xaa, 0x0b, 0x00a0}, /* 00,0b,a0,aa, */ 5477 {0xaa, 0x0b, 0x0000},
5489 {0xaa, 0x0c, 0x0000}, /* 00,0c,00,aa, */ 5478 {0xaa, 0x0c, 0x0001},
5490 {0xaa, 0x0d, 0x00a0}, /* 00,0d,a0,aa, */ 5479 {0xaa, 0x0d, 0x0000},
5491 {0xaa, 0x0e, 0x0000}, /* 00,0e,00,aa, */ 5480 {0xaa, 0x0e, 0x0001},
5492 {0xaa, 0x0f, 0x00a0}, /* 00,0f,a0,aa, */ 5481 {0xaa, 0x0f, 0x0000},
5493 {0xaa, 0x10, 0x0000}, /* 00,10,00,aa, */ 5482 {0xaa, 0x10, 0x0001},
5494 {0xaa, 0x11, 0x00a0}, /* 00,11,a0,aa, */ 5483 {0xaa, 0x11, 0x0000},
5495/*?? {0xa0, 0x00, 0x0039},
5496 {0xa1, 0x01, 0x0037}, */
5497 {0xaa, 0x16, 0x0001}, /* 00,16,01,aa, */ 5484 {0xaa, 0x16, 0x0001}, /* 00,16,01,aa, */
5498 {0xaa, 0x17, 0x00e8}, /* 00,17,e6,aa (e6 -> e8) */ 5485 {0xaa, 0x17, 0x00e8}, /* 00,17,e6,aa (e6 -> e8) */
5499 {0xaa, 0x18, 0x0002}, /* 00,18,02,aa, */ 5486 {0xaa, 0x18, 0x0002}, /* 00,18,02,aa, */
5500 {0xaa, 0x19, 0x0088}, /* 00,19,88,aa, */ 5487 {0xaa, 0x19, 0x0088}, /* 00,19,88,aa, */
5501 {0xaa, 0x20, 0x0020}, /* 00,20,20,aa, */
5502 {0xa0, 0xb7, ZC3XX_R101_SENSORCORRECTION}, /* 01,01,b7,cc, */ 5488 {0xa0, 0xb7, ZC3XX_R101_SENSORCORRECTION}, /* 01,01,b7,cc, */
5503 {0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC}, /* 00,12,05,cc, */ 5489 {0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC}, /* 00,12,05,cc, */
5504 {0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0d,cc, */ 5490 {0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0d,cc, */
@@ -5508,36 +5494,37 @@ static const struct usb_action gc0303_Initial[] = {
5508 {0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05}, /* 01,cb,13,cc, */ 5494 {0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05}, /* 01,cb,13,cc, */
5509 {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE}, /* 02,50,08,cc, */ 5495 {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE}, /* 02,50,08,cc, */
5510 {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS}, /* 03,01,08,cc, */ 5496 {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS}, /* 03,01,08,cc, */
5511 {0xa0, 0x60, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,60,cc, */ 5497 {0xa0, 0x58, ZC3XX_R1A8_DIGITALGAIN},
5512 {0xa0, 0x61, ZC3XX_R116_RGAIN}, /* 01,16,61,cc, */ 5498 {0xa0, 0x61, ZC3XX_R116_RGAIN}, /* 01,16,61,cc, */
5513 {0xa0, 0x65, ZC3XX_R118_BGAIN}, /* 01,18,65,cc */ 5499 {0xa0, 0x65, ZC3XX_R118_BGAIN}, /* 01,18,65,cc */
5500 {0xaa, 0x1b, 0x0000},
5514 {} 5501 {}
5515}; 5502};
5516static const struct usb_action gc0303_50HZScale[] = { 5503static const struct usb_action gc0303_50HZ[] = {
5517 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5504 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5518 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */ 5505 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */
5519 {0xaa, 0x84, 0x00aa}, /* 00,84,aa,aa */ 5506 {0xaa, 0x84, 0x0063},
5520 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */ 5507 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */
5521 {0xa0, 0x06, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,0d,cc, */ 5508 {0xa0, 0x06, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,0d,cc, */
5522 {0xa0, 0xa8, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,50,cc, */ 5509 {0xa0, 0xa8, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,50,cc, */
5523 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc, */ 5510 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc, */
5524 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc, */ 5511 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc, */
5525 {0xa0, 0x8e, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,47,cc, */ 5512 {0xa0, 0x47, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,47,cc, */
5526 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE}, /* 01,8c,0e,cc, */ 5513 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE}, /* 01,8c,0e,cc, */
5527 {0xa0, 0x15, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,15,cc, */ 5514 {0xa0, 0x15, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,15,cc, */
5528 {0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc, */ 5515 {0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc, */
5529 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc, */ 5516 {0xa0, 0x48, ZC3XX_R1AA_DIGITALGAINSTEP},
5530 {0xa0, 0x62, ZC3XX_R01D_HSYNC_0}, /* 00,1d,62,cc, */ 5517 {0xa0, 0x62, ZC3XX_R01D_HSYNC_0}, /* 00,1d,62,cc, */
5531 {0xa0, 0x90, ZC3XX_R01E_HSYNC_1}, /* 00,1e,90,cc, */ 5518 {0xa0, 0x90, ZC3XX_R01E_HSYNC_1}, /* 00,1e,90,cc, */
5532 {0xa0, 0xc8, ZC3XX_R01F_HSYNC_2}, /* 00,1f,c8,cc, */ 5519 {0xa0, 0xc8, ZC3XX_R01F_HSYNC_2}, /* 00,1f,c8,cc, */
5533 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc, */ 5520 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc, */
5534 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,1d,58,cc, */ 5521 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,1d,58,cc, */
5535 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */ 5522 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */
5536 {0xa0, 0x78, ZC3XX_R18D_YTARGET}, /* 01,8d,78,cc */ 5523 {0xa0, 0x7f, ZC3XX_R18D_YTARGET},
5537 {} 5524 {}
5538}; 5525};
5539 5526
5540static const struct usb_action gc0303_50HZ[] = { 5527static const struct usb_action gc0303_50HZScale[] = {
5541 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5528 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5542 {0xaa, 0x83, 0x0003}, /* 00,83,03,aa */ 5529 {0xaa, 0x83, 0x0003}, /* 00,83,03,aa */
5543 {0xaa, 0x84, 0x0054}, /* 00,84,54,aa */ 5530 {0xaa, 0x84, 0x0054}, /* 00,84,54,aa */
@@ -5550,21 +5537,21 @@ static const struct usb_action gc0303_50HZ[] = {
5550 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE}, /* 01,8c,0e,cc, */ 5537 {0xa0, 0x0e, ZC3XX_R18C_AEFREEZE}, /* 01,8c,0e,cc, */
5551 {0xa0, 0x15, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,15,cc, */ 5538 {0xa0, 0x15, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,15,cc, */
5552 {0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc, */ 5539 {0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc, */
5553 {0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc, */ 5540 {0xa0, 0x48, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,24,cc, */
5554 {0xa0, 0x62, ZC3XX_R01D_HSYNC_0}, /* 00,1d,62,cc, */ 5541 {0xa0, 0x62, ZC3XX_R01D_HSYNC_0}, /* 00,1d,62,cc, */
5555 {0xa0, 0x90, ZC3XX_R01E_HSYNC_1}, /* 00,1e,90,cc, */ 5542 {0xa0, 0x90, ZC3XX_R01E_HSYNC_1}, /* 00,1e,90,cc, */
5556 {0xa0, 0xc8, ZC3XX_R01F_HSYNC_2}, /* 00,1f,c8,cc, */ 5543 {0xa0, 0xc8, ZC3XX_R01F_HSYNC_2}, /* 00,1f,c8,cc, */
5557 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc, */ 5544 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc, */
5558 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,1d,58,cc, */ 5545 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,1d,58,cc, */
5559 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */ 5546 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */
5560 {0xa0, 0x78, ZC3XX_R18D_YTARGET}, /* 01,8d,78,cc */ 5547 {0xa0, 0x7f, ZC3XX_R18D_YTARGET},
5561 {} 5548 {}
5562}; 5549};
5563 5550
5564static const struct usb_action gc0303_60HZScale[] = { 5551static const struct usb_action gc0303_60HZ[] = {
5565 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5552 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5566 {0xaa, 0x83, 0x0001}, /* 00,83,01,aa */ 5553 {0xaa, 0x83, 0x0000},
5567 {0xaa, 0x84, 0x0062}, /* 00,84,62,aa */ 5554 {0xaa, 0x84, 0x003b},
5568 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */ 5555 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */
5569 {0xa0, 0x05, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,05,cc, */ 5556 {0xa0, 0x05, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,05,cc, */
5570 {0xa0, 0x88, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,88,cc, */ 5557 {0xa0, 0x88, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,88,cc, */
@@ -5581,14 +5568,14 @@ static const struct usb_action gc0303_60HZScale[] = {
5581 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc, */ 5568 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc, */
5582 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,1d,58,cc, */ 5569 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,1d,58,cc, */
5583 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */ 5570 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */
5584 {0xa0, 0x78, ZC3XX_R18D_YTARGET}, /* 01,8d,78,cc */ 5571 {0xa0, 0x80, ZC3XX_R18D_YTARGET},
5585 {} 5572 {}
5586}; 5573};
5587 5574
5588static const struct usb_action gc0303_60HZ[] = { 5575static const struct usb_action gc0303_60HZScale[] = {
5589 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5576 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5590 {0xaa, 0x83, 0x0002}, /* 00,83,02,aa */ 5577 {0xaa, 0x83, 0x0000},
5591 {0xaa, 0x84, 0x00c4}, /* 00,84,c4,aa */ 5578 {0xaa, 0x84, 0x0076},
5592 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */ 5579 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */
5593 {0xa0, 0x0b, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,1,0b,cc, */ 5580 {0xa0, 0x0b, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,1,0b,cc, */
5594 {0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,2,10,cc, */ 5581 {0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,2,10,cc, */
@@ -5605,18 +5592,18 @@ static const struct usb_action gc0303_60HZ[] = {
5605 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,0,ff,cc, */ 5592 {0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,0,ff,cc, */
5606 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,d,58,cc, */ 5593 {0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN}, /* 01,d,58,cc, */
5607 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */ 5594 {0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE}, /* 01,80,42,cc, */
5608 {0xa0, 0x78, ZC3XX_R18D_YTARGET}, /* 01,d,78,cc */ 5595 {0xa0, 0x80, ZC3XX_R18D_YTARGET},
5609 {} 5596 {}
5610}; 5597};
5611 5598
5612static const struct usb_action gc0303_NoFlikerScale[] = { 5599static const struct usb_action gc0303_NoFliker[] = {
5613 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */ 5600 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */
5614 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5601 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5615 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */ 5602 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */
5616 {0xaa, 0x84, 0x0020}, /* 00,84,20,aa */ 5603 {0xaa, 0x84, 0x0020}, /* 00,84,20,aa */
5617 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,0,00,cc, */ 5604 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,0,00,cc, */
5618 {0xa0, 0x05, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,05,cc, */ 5605 {0xa0, 0x00, ZC3XX_R191_EXPOSURELIMITMID},
5619 {0xa0, 0x88, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,88,cc, */ 5606 {0xa0, 0x48, ZC3XX_R192_EXPOSURELIMITLOW},
5620 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc, */ 5607 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc, */
5621 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc, */ 5608 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc, */
5622 {0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,10,cc, */ 5609 {0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,10,cc, */
@@ -5631,14 +5618,14 @@ static const struct usb_action gc0303_NoFlikerScale[] = {
5631 {} 5618 {}
5632}; 5619};
5633 5620
5634static const struct usb_action gc0303_NoFliker[] = { 5621static const struct usb_action gc0303_NoFlikerScale[] = {
5635 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */ 5622 {0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE}, /* 01,00,0c,cc, */
5636 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */ 5623 {0xaa, 0x82, 0x0000}, /* 00,82,00,aa */
5637 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */ 5624 {0xaa, 0x83, 0x0000}, /* 00,83,00,aa */
5638 {0xaa, 0x84, 0x0020}, /* 00,84,20,aa */ 5625 {0xaa, 0x84, 0x0020}, /* 00,84,20,aa */
5639 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */ 5626 {0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc, */
5640 {0xa0, 0x0b, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,0b,cc, */ 5627 {0xa0, 0x00, ZC3XX_R191_EXPOSURELIMITMID},
5641 {0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,10,cc, */ 5628 {0xa0, 0x48, ZC3XX_R192_EXPOSURELIMITLOW},
5642 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc, */ 5629 {0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc, */
5643 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc, */ 5630 {0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc, */
5644 {0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,10,cc, */ 5631 {0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,10,cc, */
@@ -5809,7 +5796,7 @@ static void setmatrix(struct gspca_dev *gspca_dev)
5809 static const u8 tas5130c_matrix[9] = 5796 static const u8 tas5130c_matrix[9] =
5810 {0x68, 0xec, 0xec, 0xec, 0x68, 0xec, 0xec, 0xec, 0x68}; 5797 {0x68, 0xec, 0xec, 0xec, 0x68, 0xec, 0xec, 0xec, 0x68};
5811 static const u8 gc0303_matrix[9] = 5798 static const u8 gc0303_matrix[9] =
5812 {0x7b, 0xea, 0xea, 0xea, 0x7b, 0xea, 0xea, 0xea, 0x7b}; 5799 {0x6c, 0xea, 0xea, 0xea, 0x6c, 0xea, 0xea, 0xea, 0x6c};
5813 static const u8 *matrix_tb[SENSOR_MAX] = { 5800 static const u8 *matrix_tb[SENSOR_MAX] = {
5814 [SENSOR_ADCM2700] = adcm2700_matrix, 5801 [SENSOR_ADCM2700] = adcm2700_matrix,
5815 [SENSOR_CS2102] = ov7620_matrix, 5802 [SENSOR_CS2102] = ov7620_matrix,
@@ -6426,10 +6413,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
6426 gspca_dev->cam.ctrls = sd->ctrls; 6413 gspca_dev->cam.ctrls = sd->ctrls;
6427 sd->quality = QUALITY_DEF; 6414 sd->quality = QUALITY_DEF;
6428 6415
6429 /* if USB 1.1, let some bandwidth for the audio device */
6430 if (gspca_dev->audio && gspca_dev->dev->speed < USB_SPEED_HIGH)
6431 gspca_dev->nbalt--;
6432
6433 return 0; 6416 return 0;
6434} 6417}
6435 6418
diff --git a/drivers/media/video/ir-kbd-i2c.c b/drivers/media/video/ir-kbd-i2c.c
index 3ab875d036e..a7c41d32f41 100644
--- a/drivers/media/video/ir-kbd-i2c.c
+++ b/drivers/media/video/ir-kbd-i2c.c
@@ -244,7 +244,7 @@ static int get_key_avermedia_cardbus(struct IR_i2c *ir,
244 244
245/* ----------------------------------------------------------------------- */ 245/* ----------------------------------------------------------------------- */
246 246
247static void ir_key_poll(struct IR_i2c *ir) 247static int ir_key_poll(struct IR_i2c *ir)
248{ 248{
249 static u32 ir_key, ir_raw; 249 static u32 ir_key, ir_raw;
250 int rc; 250 int rc;
@@ -253,20 +253,28 @@ static void ir_key_poll(struct IR_i2c *ir)
253 rc = ir->get_key(ir, &ir_key, &ir_raw); 253 rc = ir->get_key(ir, &ir_key, &ir_raw);
254 if (rc < 0) { 254 if (rc < 0) {
255 dprintk(2,"error\n"); 255 dprintk(2,"error\n");
256 return; 256 return rc;
257 } 257 }
258 258
259 if (rc) { 259 if (rc) {
260 dprintk(1, "%s: keycode = 0x%04x\n", __func__, ir_key); 260 dprintk(1, "%s: keycode = 0x%04x\n", __func__, ir_key);
261 rc_keydown(ir->rc, ir_key, 0); 261 rc_keydown(ir->rc, ir_key, 0);
262 } 262 }
263 return 0;
263} 264}
264 265
265static void ir_work(struct work_struct *work) 266static void ir_work(struct work_struct *work)
266{ 267{
268 int rc;
267 struct IR_i2c *ir = container_of(work, struct IR_i2c, work.work); 269 struct IR_i2c *ir = container_of(work, struct IR_i2c, work.work);
268 270
269 ir_key_poll(ir); 271 rc = ir_key_poll(ir);
272 if (rc == -ENODEV) {
273 rc_unregister_device(ir->rc);
274 ir->rc = NULL;
275 return;
276 }
277
270 schedule_delayed_work(&ir->work, msecs_to_jiffies(ir->polling_interval)); 278 schedule_delayed_work(&ir->work, msecs_to_jiffies(ir->polling_interval));
271} 279}
272 280
@@ -446,7 +454,8 @@ static int ir_remove(struct i2c_client *client)
446 cancel_delayed_work_sync(&ir->work); 454 cancel_delayed_work_sync(&ir->work);
447 455
448 /* unregister device */ 456 /* unregister device */
449 rc_unregister_device(ir->rc); 457 if (ir->rc)
458 rc_unregister_device(ir->rc);
450 459
451 /* free memory */ 460 /* free memory */
452 kfree(ir); 461 kfree(ir);
@@ -489,11 +498,3 @@ static void __exit ir_fini(void)
489 498
490module_init(ir_init); 499module_init(ir_init);
491module_exit(ir_fini); 500module_exit(ir_fini);
492
493/*
494 * Overrides for Emacs so that we follow Linus's tabbing style.
495 * ---------------------------------------------------------------------------
496 * Local variables:
497 * c-basic-offset: 8
498 * End:
499 */
diff --git a/drivers/media/video/ivtv/ivtv-i2c.h b/drivers/media/video/ivtv/ivtv-i2c.h
index 9332920ca4f..7b9ec1cfeb8 100644
--- a/drivers/media/video/ivtv/ivtv-i2c.h
+++ b/drivers/media/video/ivtv/ivtv-i2c.h
@@ -25,7 +25,7 @@ struct i2c_client *ivtv_i2c_new_ir_legacy(struct ivtv *itv);
25int ivtv_i2c_register(struct ivtv *itv, unsigned idx); 25int ivtv_i2c_register(struct ivtv *itv, unsigned idx);
26struct v4l2_subdev *ivtv_find_hw(struct ivtv *itv, u32 hw); 26struct v4l2_subdev *ivtv_find_hw(struct ivtv *itv, u32 hw);
27 27
28/* init + register i2c algo-bit adapter */ 28/* init + register i2c adapter */
29int init_ivtv_i2c(struct ivtv *itv); 29int init_ivtv_i2c(struct ivtv *itv);
30void exit_ivtv_i2c(struct ivtv *itv); 30void exit_ivtv_i2c(struct ivtv *itv);
31 31
diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h
index 82c8817bd32..4b021e1ee5f 100644
--- a/drivers/media/video/m5mols/m5mols.h
+++ b/drivers/media/video/m5mols/m5mols.h
@@ -163,7 +163,6 @@ struct m5mols_version {
163 * @ffmt: current fmt according to resolution type 163 * @ffmt: current fmt according to resolution type
164 * @res_type: current resolution type 164 * @res_type: current resolution type
165 * @irq_waitq: waitqueue for the capture 165 * @irq_waitq: waitqueue for the capture
166 * @work_irq: workqueue for the IRQ
167 * @flags: state variable for the interrupt handler 166 * @flags: state variable for the interrupt handler
168 * @handle: control handler 167 * @handle: control handler
169 * @autoexposure: Auto Exposure control 168 * @autoexposure: Auto Exposure control
@@ -175,14 +174,12 @@ struct m5mols_version {
175 * @ver: information of the version 174 * @ver: information of the version
176 * @cap: the capture mode attributes 175 * @cap: the capture mode attributes
177 * @power: current sensor's power status 176 * @power: current sensor's power status
178 * @ctrl_sync: true means all controls of the sensor are initialized 177 * @isp_ready: 1 when the ISP controller has completed booting
179 * @int_capture: true means the capture interrupt is issued once 178 * @ctrl_sync: 1 when the control handler state is restored in H/W
180 * @lock_ae: true means the Auto Exposure is locked 179 * @lock_ae: true means the Auto Exposure is locked
181 * @lock_awb: true means the Aut WhiteBalance is locked 180 * @lock_awb: true means the Aut WhiteBalance is locked
182 * @resolution: register value for current resolution 181 * @resolution: register value for current resolution
183 * @interrupt: register value for current interrupt status
184 * @mode: register value for current operation mode 182 * @mode: register value for current operation mode
185 * @mode_save: register value for current operation mode for saving
186 * @set_power: optional power callback to the board code 183 * @set_power: optional power callback to the board code
187 */ 184 */
188struct m5mols_info { 185struct m5mols_info {
@@ -191,16 +188,16 @@ struct m5mols_info {
191 struct media_pad pad; 188 struct media_pad pad;
192 struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX]; 189 struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX];
193 int res_type; 190 int res_type;
191
194 wait_queue_head_t irq_waitq; 192 wait_queue_head_t irq_waitq;
195 struct work_struct work_irq; 193 atomic_t irq_done;
196 unsigned long flags;
197 194
198 struct v4l2_ctrl_handler handle; 195 struct v4l2_ctrl_handler handle;
196
199 /* Autoexposure/exposure control cluster */ 197 /* Autoexposure/exposure control cluster */
200 struct { 198 struct v4l2_ctrl *autoexposure;
201 struct v4l2_ctrl *autoexposure; 199 struct v4l2_ctrl *exposure;
202 struct v4l2_ctrl *exposure; 200
203 };
204 struct v4l2_ctrl *autowb; 201 struct v4l2_ctrl *autowb;
205 struct v4l2_ctrl *colorfx; 202 struct v4l2_ctrl *colorfx;
206 struct v4l2_ctrl *saturation; 203 struct v4l2_ctrl *saturation;
@@ -208,21 +205,19 @@ struct m5mols_info {
208 205
209 struct m5mols_version ver; 206 struct m5mols_version ver;
210 struct m5mols_capture cap; 207 struct m5mols_capture cap;
211 bool power; 208
212 bool ctrl_sync; 209 unsigned int isp_ready:1;
210 unsigned int power:1;
211 unsigned int ctrl_sync:1;
212
213 bool lock_ae; 213 bool lock_ae;
214 bool lock_awb; 214 bool lock_awb;
215 u8 resolution; 215 u8 resolution;
216 u8 interrupt;
217 u8 mode; 216 u8 mode;
218 u8 mode_save; 217
219 int (*set_power)(struct device *dev, int on); 218 int (*set_power)(struct device *dev, int on);
220}; 219};
221 220
222#define ST_CAPT_IRQ 0
223
224#define is_powered(__info) (__info->power)
225#define is_ctrl_synced(__info) (__info->ctrl_sync)
226#define is_available_af(__info) (__info->ver.af) 221#define is_available_af(__info) (__info->ver.af)
227#define is_code(__code, __type) (__code == m5mols_default_ffmt[__type].code) 222#define is_code(__code, __type) (__code == m5mols_default_ffmt[__type].code)
228#define is_manufacturer(__info, __manufacturer) \ 223#define is_manufacturer(__info, __manufacturer) \
@@ -257,7 +252,15 @@ int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg_comb, u8 *val);
257int m5mols_read_u16(struct v4l2_subdev *sd, u32 reg_comb, u16 *val); 252int m5mols_read_u16(struct v4l2_subdev *sd, u32 reg_comb, u16 *val);
258int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg_comb, u32 *val); 253int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg_comb, u32 *val);
259int m5mols_write(struct v4l2_subdev *sd, u32 reg_comb, u32 val); 254int m5mols_write(struct v4l2_subdev *sd, u32 reg_comb, u32 val);
260int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 value); 255
256int m5mols_busy_wait(struct v4l2_subdev *sd, u32 reg, u32 value, u32 mask,
257 int timeout);
258
259/* Mask value for busy waiting until M-5MOLS I2C interface is initialized */
260#define M5MOLS_I2C_RDY_WAIT_FL (1 << 16)
261/* ISP state transition timeout, in ms */
262#define M5MOLS_MODE_CHANGE_TIMEOUT 200
263#define M5MOLS_BUSY_WAIT_DEF_TIMEOUT 250
261 264
262/* 265/*
263 * Mode operation of the M-5MOLS 266 * Mode operation of the M-5MOLS
@@ -282,7 +285,8 @@ int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 value);
282int m5mols_mode(struct m5mols_info *info, u8 mode); 285int m5mols_mode(struct m5mols_info *info, u8 mode);
283 286
284int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg); 287int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg);
285int m5mols_sync_controls(struct m5mols_info *info); 288int m5mols_wait_interrupt(struct v4l2_subdev *sd, u8 condition, u32 timeout);
289int m5mols_restore_controls(struct m5mols_info *info);
286int m5mols_start_capture(struct m5mols_info *info); 290int m5mols_start_capture(struct m5mols_info *info);
287int m5mols_do_scenemode(struct m5mols_info *info, u8 mode); 291int m5mols_do_scenemode(struct m5mols_info *info, u8 mode);
288int m5mols_lock_3a(struct m5mols_info *info, bool lock); 292int m5mols_lock_3a(struct m5mols_info *info, bool lock);
diff --git a/drivers/media/video/m5mols/m5mols_capture.c b/drivers/media/video/m5mols/m5mols_capture.c
index 3248ac80571..ba25e8e2ba4 100644
--- a/drivers/media/video/m5mols/m5mols_capture.c
+++ b/drivers/media/video/m5mols/m5mols_capture.c
@@ -1,3 +1,4 @@
1
1/* 2/*
2 * The Capture code for Fujitsu M-5MOLS ISP 3 * The Capture code for Fujitsu M-5MOLS ISP
3 * 4 *
@@ -25,26 +26,11 @@
25#include <media/v4l2-device.h> 26#include <media/v4l2-device.h>
26#include <media/v4l2-subdev.h> 27#include <media/v4l2-subdev.h>
27#include <media/m5mols.h> 28#include <media/m5mols.h>
29#include <media/s5p_fimc.h>
28 30
29#include "m5mols.h" 31#include "m5mols.h"
30#include "m5mols_reg.h" 32#include "m5mols_reg.h"
31 33
32static int m5mols_capture_error_handler(struct m5mols_info *info,
33 int timeout)
34{
35 int ret;
36
37 /* Disable all interrupts and clear relevant interrupt staus bits */
38 ret = m5mols_write(&info->sd, SYSTEM_INT_ENABLE,
39 info->interrupt & ~(REG_INT_CAPTURE));
40 if (ret)
41 return ret;
42
43 if (timeout == 0)
44 return -ETIMEDOUT;
45
46 return 0;
47}
48/** 34/**
49 * m5mols_read_rational - I2C read of a rational number 35 * m5mols_read_rational - I2C read of a rational number
50 * 36 *
@@ -121,69 +107,54 @@ int m5mols_start_capture(struct m5mols_info *info)
121{ 107{
122 struct v4l2_subdev *sd = &info->sd; 108 struct v4l2_subdev *sd = &info->sd;
123 u8 resolution = info->resolution; 109 u8 resolution = info->resolution;
124 int timeout;
125 int ret; 110 int ret;
126 111
127 /* 112 /*
128 * Preparing capture. Setting control & interrupt before entering 113 * Synchronize the controls, set the capture frame resolution and color
129 * capture mode 114 * format. The frame capture is initiated during switching from Monitor
130 * 115 * to Capture mode.
131 * 1) change to MONITOR mode for operating control & interrupt
132 * 2) set controls (considering v4l2_control value & lock 3A)
133 * 3) set interrupt
134 * 4) change to CAPTURE mode
135 */ 116 */
136 ret = m5mols_mode(info, REG_MONITOR); 117 ret = m5mols_mode(info, REG_MONITOR);
137 if (!ret) 118 if (!ret)
138 ret = m5mols_sync_controls(info); 119 ret = m5mols_restore_controls(info);
139 if (!ret) 120 if (!ret)
140 ret = m5mols_lock_3a(info, true); 121 ret = m5mols_write(sd, CAPP_YUVOUT_MAIN, REG_JPEG);
122 if (!ret)
123 ret = m5mols_write(sd, CAPP_MAIN_IMAGE_SIZE, resolution);
141 if (!ret) 124 if (!ret)
142 ret = m5mols_enable_interrupt(sd, REG_INT_CAPTURE); 125 ret = m5mols_lock_3a(info, true);
143 if (!ret) 126 if (!ret)
144 ret = m5mols_mode(info, REG_CAPTURE); 127 ret = m5mols_mode(info, REG_CAPTURE);
145 if (!ret) { 128 if (!ret)
146 /* Wait for capture interrupt, after changing capture mode */ 129 /* Wait until a frame is captured to ISP internal memory */
147 timeout = wait_event_interruptible_timeout(info->irq_waitq, 130 ret = m5mols_wait_interrupt(sd, REG_INT_CAPTURE, 2000);
148 test_bit(ST_CAPT_IRQ, &info->flags),
149 msecs_to_jiffies(2000));
150 if (test_and_clear_bit(ST_CAPT_IRQ, &info->flags))
151 ret = m5mols_capture_error_handler(info, timeout);
152 }
153 if (!ret) 131 if (!ret)
154 ret = m5mols_lock_3a(info, false); 132 ret = m5mols_lock_3a(info, false);
155 if (ret) 133 if (ret)
156 return ret; 134 return ret;
135
157 /* 136 /*
158 * Starting capture. Setting capture frame count and resolution and 137 * Initiate the captured data transfer to a MIPI-CSI receiver.
159 * the format(available format: JPEG, Bayer RAW, YUV).
160 *
161 * 1) select single or multi(enable to 25), format, size
162 * 2) set interrupt
163 * 3) start capture(for main image, now)
164 * 4) get information
165 * 5) notify file size to v4l2 device(e.g, to s5p-fimc v4l2 device)
166 */ 138 */
167 ret = m5mols_write(sd, CAPC_SEL_FRAME, 1); 139 ret = m5mols_write(sd, CAPC_SEL_FRAME, 1);
168 if (!ret) 140 if (!ret)
169 ret = m5mols_write(sd, CAPP_YUVOUT_MAIN, REG_JPEG);
170 if (!ret)
171 ret = m5mols_write(sd, CAPP_MAIN_IMAGE_SIZE, resolution);
172 if (!ret)
173 ret = m5mols_enable_interrupt(sd, REG_INT_CAPTURE);
174 if (!ret)
175 ret = m5mols_write(sd, CAPC_START, REG_CAP_START_MAIN); 141 ret = m5mols_write(sd, CAPC_START, REG_CAP_START_MAIN);
176 if (!ret) { 142 if (!ret) {
143 bool captured = false;
144 unsigned int size;
145
177 /* Wait for the capture completion interrupt */ 146 /* Wait for the capture completion interrupt */
178 timeout = wait_event_interruptible_timeout(info->irq_waitq, 147 ret = m5mols_wait_interrupt(sd, REG_INT_CAPTURE, 2000);
179 test_bit(ST_CAPT_IRQ, &info->flags), 148 if (!ret) {
180 msecs_to_jiffies(2000)); 149 captured = true;
181 if (test_and_clear_bit(ST_CAPT_IRQ, &info->flags)) {
182 ret = m5mols_capture_info(info); 150 ret = m5mols_capture_info(info);
183 if (!ret)
184 v4l2_subdev_notify(sd, 0, &info->cap.total);
185 } 151 }
152 size = captured ? info->cap.main : 0;
153 v4l2_dbg(1, m5mols_debug, sd, "%s: size: %d, thumb.: %d B\n",
154 __func__, size, info->cap.thumb);
155
156 v4l2_subdev_notify(sd, S5P_FIMC_TX_END_NOTIFY, &size);
186 } 157 }
187 158
188 return m5mols_capture_error_handler(info, timeout); 159 return ret;
189} 160}
diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c
index e0f09e53180..93d768db9f3 100644
--- a/drivers/media/video/m5mols/m5mols_core.c
+++ b/drivers/media/video/m5mols/m5mols_core.c
@@ -135,10 +135,13 @@ static u32 m5mols_swap_byte(u8 *data, u8 length)
135 * @reg: combination of size, category and command for the I2C packet 135 * @reg: combination of size, category and command for the I2C packet
136 * @size: desired size of I2C packet 136 * @size: desired size of I2C packet
137 * @val: read value 137 * @val: read value
138 *
139 * Returns 0 on success, or else negative errno.
138 */ 140 */
139static int m5mols_read(struct v4l2_subdev *sd, u32 size, u32 reg, u32 *val) 141static int m5mols_read(struct v4l2_subdev *sd, u32 size, u32 reg, u32 *val)
140{ 142{
141 struct i2c_client *client = v4l2_get_subdevdata(sd); 143 struct i2c_client *client = v4l2_get_subdevdata(sd);
144 struct m5mols_info *info = to_m5mols(sd);
142 u8 rbuf[M5MOLS_I2C_MAX_SIZE + 1]; 145 u8 rbuf[M5MOLS_I2C_MAX_SIZE + 1];
143 u8 category = I2C_CATEGORY(reg); 146 u8 category = I2C_CATEGORY(reg);
144 u8 cmd = I2C_COMMAND(reg); 147 u8 cmd = I2C_COMMAND(reg);
@@ -168,15 +171,17 @@ static int m5mols_read(struct v4l2_subdev *sd, u32 size, u32 reg, u32 *val)
168 usleep_range(200, 200); 171 usleep_range(200, 200);
169 172
170 ret = i2c_transfer(client->adapter, msg, 2); 173 ret = i2c_transfer(client->adapter, msg, 2);
171 if (ret < 0) { 174
172 v4l2_err(sd, "read failed: size:%d cat:%02x cmd:%02x. %d\n", 175 if (ret == 2) {
173 size, category, cmd, ret); 176 *val = m5mols_swap_byte(&rbuf[1], size);
174 return ret; 177 return 0;
175 } 178 }
176 179
177 *val = m5mols_swap_byte(&rbuf[1], size); 180 if (info->isp_ready)
181 v4l2_err(sd, "read failed: size:%d cat:%02x cmd:%02x. %d\n",
182 size, category, cmd, ret);
178 183
179 return 0; 184 return ret < 0 ? ret : -EIO;
180} 185}
181 186
182int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg, u8 *val) 187int m5mols_read_u8(struct v4l2_subdev *sd, u32 reg, u8 *val)
@@ -229,10 +234,13 @@ int m5mols_read_u32(struct v4l2_subdev *sd, u32 reg, u32 *val)
229 * m5mols_write - I2C command write function 234 * m5mols_write - I2C command write function
230 * @reg: combination of size, category and command for the I2C packet 235 * @reg: combination of size, category and command for the I2C packet
231 * @val: value to write 236 * @val: value to write
237 *
238 * Returns 0 on success, or else negative errno.
232 */ 239 */
233int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val) 240int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val)
234{ 241{
235 struct i2c_client *client = v4l2_get_subdevdata(sd); 242 struct i2c_client *client = v4l2_get_subdevdata(sd);
243 struct m5mols_info *info = to_m5mols(sd);
236 u8 wbuf[M5MOLS_I2C_MAX_SIZE + 4]; 244 u8 wbuf[M5MOLS_I2C_MAX_SIZE + 4];
237 u8 category = I2C_CATEGORY(reg); 245 u8 category = I2C_CATEGORY(reg);
238 u8 cmd = I2C_COMMAND(reg); 246 u8 cmd = I2C_COMMAND(reg);
@@ -263,28 +271,45 @@ int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val)
263 usleep_range(200, 200); 271 usleep_range(200, 200);
264 272
265 ret = i2c_transfer(client->adapter, msg, 1); 273 ret = i2c_transfer(client->adapter, msg, 1);
266 if (ret < 0) { 274 if (ret == 1)
267 v4l2_err(sd, "write failed: size:%d cat:%02x cmd:%02x. %d\n", 275 return 0;
268 size, category, cmd, ret);
269 return ret;
270 }
271 276
272 return 0; 277 if (info->isp_ready)
278 v4l2_err(sd, "write failed: cat:%02x cmd:%02x ret:%d\n",
279 category, cmd, ret);
280
281 return ret < 0 ? ret : -EIO;
273} 282}
274 283
275int m5mols_busy(struct v4l2_subdev *sd, u8 category, u8 cmd, u8 mask) 284/**
285 * m5mols_busy_wait - Busy waiting with I2C register polling
286 * @reg: the I2C_REG() address of an 8-bit status register to check
287 * @value: expected status register value
288 * @mask: bit mask for the read status register value
289 * @timeout: timeout in miliseconds, or -1 for default timeout
290 *
291 * The @reg register value is ORed with @mask before comparing with @value.
292 *
293 * Return: 0 if the requested condition became true within less than
294 * @timeout ms, or else negative errno.
295 */
296int m5mols_busy_wait(struct v4l2_subdev *sd, u32 reg, u32 value, u32 mask,
297 int timeout)
276{ 298{
277 u8 busy; 299 int ms = timeout < 0 ? M5MOLS_BUSY_WAIT_DEF_TIMEOUT : timeout;
278 int i; 300 unsigned long end = jiffies + msecs_to_jiffies(ms);
279 int ret; 301 u8 status;
280 302
281 for (i = 0; i < M5MOLS_I2C_CHECK_RETRY; i++) { 303 do {
282 ret = m5mols_read_u8(sd, I2C_REG(category, cmd, 1), &busy); 304 int ret = m5mols_read_u8(sd, reg, &status);
283 if (ret < 0) 305
306 if (ret < 0 && !(mask & M5MOLS_I2C_RDY_WAIT_FL))
284 return ret; 307 return ret;
285 if ((busy & mask) == mask) 308 if (!ret && (status & mask & 0xff) == (value & 0xff))
286 return 0; 309 return 0;
287 } 310 usleep_range(100, 250);
311 } while (ms > 0 && time_is_after_jiffies(end));
312
288 return -EBUSY; 313 return -EBUSY;
289} 314}
290 315
@@ -307,6 +332,20 @@ int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg)
307 return ret; 332 return ret;
308} 333}
309 334
335int m5mols_wait_interrupt(struct v4l2_subdev *sd, u8 irq_mask, u32 timeout)
336{
337 struct m5mols_info *info = to_m5mols(sd);
338
339 int ret = wait_event_interruptible_timeout(info->irq_waitq,
340 atomic_add_unless(&info->irq_done, -1, 0),
341 msecs_to_jiffies(timeout));
342 if (ret <= 0)
343 return ret ? ret : -ETIMEDOUT;
344
345 return m5mols_busy_wait(sd, SYSTEM_INT_FACTOR, irq_mask,
346 M5MOLS_I2C_RDY_WAIT_FL | irq_mask, -1);
347}
348
310/** 349/**
311 * m5mols_reg_mode - Write the mode and check busy status 350 * m5mols_reg_mode - Write the mode and check busy status
312 * 351 *
@@ -316,8 +355,10 @@ int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg)
316static int m5mols_reg_mode(struct v4l2_subdev *sd, u8 mode) 355static int m5mols_reg_mode(struct v4l2_subdev *sd, u8 mode)
317{ 356{
318 int ret = m5mols_write(sd, SYSTEM_SYSMODE, mode); 357 int ret = m5mols_write(sd, SYSTEM_SYSMODE, mode);
319 358 if (ret < 0)
320 return ret ? ret : m5mols_busy(sd, CAT_SYSTEM, CAT0_SYSMODE, mode); 359 return ret;
360 return m5mols_busy_wait(sd, SYSTEM_SYSMODE, mode, 0xff,
361 M5MOLS_MODE_CHANGE_TIMEOUT);
321} 362}
322 363
323/** 364/**
@@ -338,13 +379,13 @@ int m5mols_mode(struct m5mols_info *info, u8 mode)
338 return ret; 379 return ret;
339 380
340 ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, &reg); 381 ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, &reg);
341 if ((!ret && reg == mode) || ret) 382 if (ret || reg == mode)
342 return ret; 383 return ret;
343 384
344 switch (reg) { 385 switch (reg) {
345 case REG_PARAMETER: 386 case REG_PARAMETER:
346 ret = m5mols_reg_mode(sd, REG_MONITOR); 387 ret = m5mols_reg_mode(sd, REG_MONITOR);
347 if (!ret && mode == REG_MONITOR) 388 if (mode == REG_MONITOR)
348 break; 389 break;
349 if (!ret) 390 if (!ret)
350 ret = m5mols_reg_mode(sd, REG_CAPTURE); 391 ret = m5mols_reg_mode(sd, REG_CAPTURE);
@@ -361,7 +402,7 @@ int m5mols_mode(struct m5mols_info *info, u8 mode)
361 402
362 case REG_CAPTURE: 403 case REG_CAPTURE:
363 ret = m5mols_reg_mode(sd, REG_MONITOR); 404 ret = m5mols_reg_mode(sd, REG_MONITOR);
364 if (!ret && mode == REG_MONITOR) 405 if (mode == REG_MONITOR)
365 break; 406 break;
366 if (!ret) 407 if (!ret)
367 ret = m5mols_reg_mode(sd, REG_PARAMETER); 408 ret = m5mols_reg_mode(sd, REG_PARAMETER);
@@ -570,26 +611,25 @@ static struct v4l2_subdev_pad_ops m5mols_pad_ops = {
570}; 611};
571 612
572/** 613/**
573 * m5mols_sync_controls - Apply default scene mode and the current controls 614 * m5mols_restore_controls - Apply current control values to the registers
574 * 615 *
575 * This is used only streaming for syncing between v4l2_ctrl framework and 616 * m5mols_do_scenemode() handles all parameters for which there is yet no
576 * m5mols's controls. First, do the scenemode to the sensor, then call 617 * individual control. It should be replaced at some point by setting each
577 * v4l2_ctrl_handler_setup. It can be same between some commands and 618 * control individually, in required register set up order.
578 * the scenemode's in the default v4l2_ctrls. But, such commands of control
579 * should be prior to the scenemode's one.
580 */ 619 */
581int m5mols_sync_controls(struct m5mols_info *info) 620int m5mols_restore_controls(struct m5mols_info *info)
582{ 621{
583 int ret = -EINVAL; 622 int ret;
584 623
585 if (!is_ctrl_synced(info)) { 624 if (info->ctrl_sync)
586 ret = m5mols_do_scenemode(info, REG_SCENE_NORMAL); 625 return 0;
587 if (ret)
588 return ret;
589 626
590 v4l2_ctrl_handler_setup(&info->handle); 627 ret = m5mols_do_scenemode(info, REG_SCENE_NORMAL);
591 info->ctrl_sync = true; 628 if (ret)
592 } 629 return ret;
630
631 ret = v4l2_ctrl_handler_setup(&info->handle);
632 info->ctrl_sync = !ret;
593 633
594 return ret; 634 return ret;
595} 635}
@@ -613,7 +653,7 @@ static int m5mols_start_monitor(struct m5mols_info *info)
613 if (!ret) 653 if (!ret)
614 ret = m5mols_mode(info, REG_MONITOR); 654 ret = m5mols_mode(info, REG_MONITOR);
615 if (!ret) 655 if (!ret)
616 ret = m5mols_sync_controls(info); 656 ret = m5mols_restore_controls(info);
617 657
618 return ret; 658 return ret;
619} 659}
@@ -645,17 +685,25 @@ static int m5mols_s_ctrl(struct v4l2_ctrl *ctrl)
645{ 685{
646 struct v4l2_subdev *sd = to_sd(ctrl); 686 struct v4l2_subdev *sd = to_sd(ctrl);
647 struct m5mols_info *info = to_m5mols(sd); 687 struct m5mols_info *info = to_m5mols(sd);
688 int ispstate = info->mode;
648 int ret; 689 int ret;
649 690
650 info->mode_save = info->mode; 691 /*
692 * If needed, defer restoring the controls until
693 * the device is fully initialized.
694 */
695 if (!info->isp_ready) {
696 info->ctrl_sync = 0;
697 return 0;
698 }
651 699
652 ret = m5mols_mode(info, REG_PARAMETER); 700 ret = m5mols_mode(info, REG_PARAMETER);
653 if (!ret) 701 if (ret < 0)
654 ret = m5mols_set_ctrl(ctrl); 702 return ret;
655 if (!ret) 703 ret = m5mols_set_ctrl(ctrl);
656 ret = m5mols_mode(info, info->mode_save); 704 if (ret < 0)
657 705 return ret;
658 return ret; 706 return m5mols_mode(info, ispstate);
659} 707}
660 708
661static const struct v4l2_ctrl_ops m5mols_ctrl_ops = { 709static const struct v4l2_ctrl_ops m5mols_ctrl_ops = {
@@ -669,10 +717,10 @@ static int m5mols_sensor_power(struct m5mols_info *info, bool enable)
669 const struct m5mols_platform_data *pdata = info->pdata; 717 const struct m5mols_platform_data *pdata = info->pdata;
670 int ret; 718 int ret;
671 719
672 if (enable) { 720 if (info->power == enable)
673 if (is_powered(info)) 721 return 0;
674 return 0;
675 722
723 if (enable) {
676 if (info->set_power) { 724 if (info->set_power) {
677 ret = info->set_power(&client->dev, 1); 725 ret = info->set_power(&client->dev, 1);
678 if (ret) 726 if (ret)
@@ -686,15 +734,11 @@ static int m5mols_sensor_power(struct m5mols_info *info, bool enable)
686 } 734 }
687 735
688 gpio_set_value(pdata->gpio_reset, !pdata->reset_polarity); 736 gpio_set_value(pdata->gpio_reset, !pdata->reset_polarity);
689 usleep_range(1000, 1000); 737 info->power = 1;
690 info->power = true;
691 738
692 return ret; 739 return ret;
693 } 740 }
694 741
695 if (!is_powered(info))
696 return 0;
697
698 ret = regulator_bulk_disable(ARRAY_SIZE(supplies), supplies); 742 ret = regulator_bulk_disable(ARRAY_SIZE(supplies), supplies);
699 if (ret) 743 if (ret)
700 return ret; 744 return ret;
@@ -703,8 +747,9 @@ static int m5mols_sensor_power(struct m5mols_info *info, bool enable)
703 info->set_power(&client->dev, 0); 747 info->set_power(&client->dev, 0);
704 748
705 gpio_set_value(pdata->gpio_reset, pdata->reset_polarity); 749 gpio_set_value(pdata->gpio_reset, pdata->reset_polarity);
706 usleep_range(1000, 1000); 750
707 info->power = false; 751 info->isp_ready = 0;
752 info->power = 0;
708 753
709 return ret; 754 return ret;
710} 755}
@@ -717,21 +762,29 @@ int __attribute__ ((weak)) m5mols_update_fw(struct v4l2_subdev *sd,
717} 762}
718 763
719/** 764/**
720 * m5mols_sensor_armboot - Booting M-5MOLS internal ARM core. 765 * m5mols_fw_start - M-5MOLS internal ARM controller initialization
721 * 766 *
722 * Booting internal ARM core makes the M-5MOLS is ready for getting commands 767 * Execute the M-5MOLS internal ARM controller initialization sequence.
723 * with I2C. It's the first thing to be done after it powered up. It must wait 768 * This function should be called after the supply voltage has been
724 * at least 520ms recommended by M-5MOLS datasheet, after executing arm booting. 769 * applied and before any requests to the device are made.
725 */ 770 */
726static int m5mols_sensor_armboot(struct v4l2_subdev *sd) 771static int m5mols_fw_start(struct v4l2_subdev *sd)
727{ 772{
773 struct m5mols_info *info = to_m5mols(sd);
728 int ret; 774 int ret;
729 775
730 ret = m5mols_write(sd, FLASH_CAM_START, REG_START_ARM_BOOT); 776 atomic_set(&info->irq_done, 0);
777 /* Wait until I2C slave is initialized in Flash Writer mode */
778 ret = m5mols_busy_wait(sd, FLASH_CAM_START, REG_IN_FLASH_MODE,
779 M5MOLS_I2C_RDY_WAIT_FL | 0xff, -1);
780 if (!ret)
781 ret = m5mols_write(sd, FLASH_CAM_START, REG_START_ARM_BOOT);
782 if (!ret)
783 ret = m5mols_wait_interrupt(sd, REG_INT_MODE, 2000);
731 if (ret < 0) 784 if (ret < 0)
732 return ret; 785 return ret;
733 786
734 msleep(520); 787 info->isp_ready = 1;
735 788
736 ret = m5mols_get_version(sd); 789 ret = m5mols_get_version(sd);
737 if (!ret) 790 if (!ret)
@@ -743,7 +796,8 @@ static int m5mols_sensor_armboot(struct v4l2_subdev *sd)
743 796
744 ret = m5mols_write(sd, PARM_INTERFACE, REG_INTERFACE_MIPI); 797 ret = m5mols_write(sd, PARM_INTERFACE, REG_INTERFACE_MIPI);
745 if (!ret) 798 if (!ret)
746 ret = m5mols_enable_interrupt(sd, REG_INT_AF); 799 ret = m5mols_enable_interrupt(sd,
800 REG_INT_AF | REG_INT_CAPTURE);
747 801
748 return ret; 802 return ret;
749} 803}
@@ -780,7 +834,7 @@ static int m5mols_init_controls(struct m5mols_info *info)
780 4, (1 << V4L2_COLORFX_BW), V4L2_COLORFX_NONE); 834 4, (1 << V4L2_COLORFX_BW), V4L2_COLORFX_NONE);
781 info->autoexposure = v4l2_ctrl_new_std_menu(&info->handle, 835 info->autoexposure = v4l2_ctrl_new_std_menu(&info->handle,
782 &m5mols_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 836 &m5mols_ctrl_ops, V4L2_CID_EXPOSURE_AUTO,
783 1, 0, V4L2_EXPOSURE_MANUAL); 837 1, 0, V4L2_EXPOSURE_AUTO);
784 838
785 sd->ctrl_handler = &info->handle; 839 sd->ctrl_handler = &info->handle;
786 if (info->handle.error) { 840 if (info->handle.error) {
@@ -809,16 +863,7 @@ static int m5mols_s_power(struct v4l2_subdev *sd, int on)
809 if (on) { 863 if (on) {
810 ret = m5mols_sensor_power(info, true); 864 ret = m5mols_sensor_power(info, true);
811 if (!ret) 865 if (!ret)
812 ret = m5mols_sensor_armboot(sd); 866 ret = m5mols_fw_start(sd);
813 if (!ret)
814 ret = m5mols_init_controls(info);
815 if (ret)
816 return ret;
817
818 info->ffmt[M5MOLS_RESTYPE_MONITOR] =
819 m5mols_default_ffmt[M5MOLS_RESTYPE_MONITOR];
820 info->ffmt[M5MOLS_RESTYPE_CAPTURE] =
821 m5mols_default_ffmt[M5MOLS_RESTYPE_CAPTURE];
822 return ret; 867 return ret;
823 } 868 }
824 869
@@ -829,17 +874,14 @@ static int m5mols_s_power(struct v4l2_subdev *sd, int on)
829 if (!ret) 874 if (!ret)
830 ret = m5mols_write(sd, AF_MODE, REG_AF_POWEROFF); 875 ret = m5mols_write(sd, AF_MODE, REG_AF_POWEROFF);
831 if (!ret) 876 if (!ret)
832 ret = m5mols_busy(sd, CAT_SYSTEM, CAT0_STATUS, 877 ret = m5mols_busy_wait(sd, SYSTEM_STATUS, REG_AF_IDLE,
833 REG_AF_IDLE); 878 0xff, -1);
834 if (!ret) 879 if (ret < 0)
835 v4l2_info(sd, "Success soft-landing lens\n"); 880 v4l2_warn(sd, "Soft landing lens failed\n");
836 } 881 }
837 882
838 ret = m5mols_sensor_power(info, false); 883 ret = m5mols_sensor_power(info, false);
839 if (!ret) { 884 info->ctrl_sync = 0;
840 v4l2_ctrl_handler_free(&info->handle);
841 info->ctrl_sync = false;
842 }
843 885
844 return ret; 886 return ret;
845} 887}
@@ -865,52 +907,33 @@ static const struct v4l2_subdev_core_ops m5mols_core_ops = {
865 .log_status = m5mols_log_status, 907 .log_status = m5mols_log_status,
866}; 908};
867 909
910/*
911 * V4L2 subdev internal operations
912 */
913static int m5mols_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
914{
915 struct v4l2_mbus_framefmt *format = v4l2_subdev_get_try_format(fh, 0);
916
917 *format = m5mols_default_ffmt[0];
918 return 0;
919}
920
921static const struct v4l2_subdev_internal_ops m5mols_subdev_internal_ops = {
922 .open = m5mols_open,
923};
924
868static const struct v4l2_subdev_ops m5mols_ops = { 925static const struct v4l2_subdev_ops m5mols_ops = {
869 .core = &m5mols_core_ops, 926 .core = &m5mols_core_ops,
870 .pad = &m5mols_pad_ops, 927 .pad = &m5mols_pad_ops,
871 .video = &m5mols_video_ops, 928 .video = &m5mols_video_ops,
872}; 929};
873 930
874static void m5mols_irq_work(struct work_struct *work)
875{
876 struct m5mols_info *info =
877 container_of(work, struct m5mols_info, work_irq);
878 struct v4l2_subdev *sd = &info->sd;
879 u8 reg;
880 int ret;
881
882 if (!is_powered(info) ||
883 m5mols_read_u8(sd, SYSTEM_INT_FACTOR, &info->interrupt))
884 return;
885
886 switch (info->interrupt & REG_INT_MASK) {
887 case REG_INT_AF:
888 if (!is_available_af(info))
889 break;
890 ret = m5mols_read_u8(sd, AF_STATUS, &reg);
891 v4l2_dbg(2, m5mols_debug, sd, "AF %s\n",
892 reg == REG_AF_FAIL ? "Failed" :
893 reg == REG_AF_SUCCESS ? "Success" :
894 reg == REG_AF_IDLE ? "Idle" : "Busy");
895 break;
896 case REG_INT_CAPTURE:
897 if (!test_and_set_bit(ST_CAPT_IRQ, &info->flags))
898 wake_up_interruptible(&info->irq_waitq);
899
900 v4l2_dbg(2, m5mols_debug, sd, "CAPTURE\n");
901 break;
902 default:
903 v4l2_dbg(2, m5mols_debug, sd, "Undefined: %02x\n", reg);
904 break;
905 };
906}
907
908static irqreturn_t m5mols_irq_handler(int irq, void *data) 931static irqreturn_t m5mols_irq_handler(int irq, void *data)
909{ 932{
910 struct v4l2_subdev *sd = data; 933 struct m5mols_info *info = to_m5mols(data);
911 struct m5mols_info *info = to_m5mols(sd);
912 934
913 schedule_work(&info->work_irq); 935 atomic_set(&info->irq_done, 1);
936 wake_up_interruptible(&info->irq_waitq);
914 937
915 return IRQ_HANDLED; 938 return IRQ_HANDLED;
916} 939}
@@ -961,7 +984,9 @@ static int __devinit m5mols_probe(struct i2c_client *client,
961 sd = &info->sd; 984 sd = &info->sd;
962 strlcpy(sd->name, MODULE_NAME, sizeof(sd->name)); 985 strlcpy(sd->name, MODULE_NAME, sizeof(sd->name));
963 v4l2_i2c_subdev_init(sd, client, &m5mols_ops); 986 v4l2_i2c_subdev_init(sd, client, &m5mols_ops);
987 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
964 988
989 sd->internal_ops = &m5mols_subdev_internal_ops;
965 info->pad.flags = MEDIA_PAD_FL_SOURCE; 990 info->pad.flags = MEDIA_PAD_FL_SOURCE;
966 ret = media_entity_init(&sd->entity, 1, &info->pad, 0); 991 ret = media_entity_init(&sd->entity, 1, &info->pad, 0);
967 if (ret < 0) 992 if (ret < 0)
@@ -969,7 +994,6 @@ static int __devinit m5mols_probe(struct i2c_client *client,
969 sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR; 994 sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
970 995
971 init_waitqueue_head(&info->irq_waitq); 996 init_waitqueue_head(&info->irq_waitq);
972 INIT_WORK(&info->work_irq, m5mols_irq_work);
973 ret = request_irq(client->irq, m5mols_irq_handler, 997 ret = request_irq(client->irq, m5mols_irq_handler,
974 IRQF_TRIGGER_RISING, MODULE_NAME, sd); 998 IRQF_TRIGGER_RISING, MODULE_NAME, sd);
975 if (ret) { 999 if (ret) {
@@ -977,7 +1001,20 @@ static int __devinit m5mols_probe(struct i2c_client *client,
977 goto out_me; 1001 goto out_me;
978 } 1002 }
979 info->res_type = M5MOLS_RESTYPE_MONITOR; 1003 info->res_type = M5MOLS_RESTYPE_MONITOR;
980 return 0; 1004 info->ffmt[0] = m5mols_default_ffmt[0];
1005 info->ffmt[1] = m5mols_default_ffmt[1];
1006
1007 ret = m5mols_sensor_power(info, true);
1008 if (ret)
1009 goto out_me;
1010
1011 ret = m5mols_fw_start(sd);
1012 if (!ret)
1013 ret = m5mols_init_controls(info);
1014
1015 m5mols_sensor_power(info, false);
1016 if (!ret)
1017 return 0;
981out_me: 1018out_me:
982 media_entity_cleanup(&sd->entity); 1019 media_entity_cleanup(&sd->entity);
983out_reg: 1020out_reg:
@@ -995,6 +1032,7 @@ static int __devexit m5mols_remove(struct i2c_client *client)
995 struct m5mols_info *info = to_m5mols(sd); 1032 struct m5mols_info *info = to_m5mols(sd);
996 1033
997 v4l2_device_unregister_subdev(sd); 1034 v4l2_device_unregister_subdev(sd);
1035 v4l2_ctrl_handler_free(sd->ctrl_handler);
998 free_irq(client->irq, sd); 1036 free_irq(client->irq, sd);
999 1037
1000 regulator_bulk_free(ARRAY_SIZE(supplies), supplies); 1038 regulator_bulk_free(ARRAY_SIZE(supplies), supplies);
diff --git a/drivers/media/video/m5mols/m5mols_reg.h b/drivers/media/video/m5mols/m5mols_reg.h
index c755bd6edfe..ae4aced0f9b 100644
--- a/drivers/media/video/m5mols/m5mols_reg.h
+++ b/drivers/media/video/m5mols/m5mols_reg.h
@@ -55,39 +55,31 @@
55 * There is many registers between customer version address and awb one. For 55 * There is many registers between customer version address and awb one. For
56 * more specific contents, see definition if file m5mols.h. 56 * more specific contents, see definition if file m5mols.h.
57 */ 57 */
58#define CAT0_VER_CUSTOMER 0x00 /* customer version */ 58#define SYSTEM_VER_CUSTOMER I2C_REG(CAT_SYSTEM, 0x00, 1)
59#define CAT0_VER_PROJECT 0x01 /* project version */ 59#define SYSTEM_VER_PROJECT I2C_REG(CAT_SYSTEM, 0x01, 1)
60#define CAT0_VER_FIRMWARE 0x02 /* Firmware version */ 60#define SYSTEM_VER_FIRMWARE I2C_REG(CAT_SYSTEM, 0x02, 2)
61#define CAT0_VER_HARDWARE 0x04 /* Hardware version */ 61#define SYSTEM_VER_HARDWARE I2C_REG(CAT_SYSTEM, 0x04, 2)
62#define CAT0_VER_PARAMETER 0x06 /* Parameter version */ 62#define SYSTEM_VER_PARAMETER I2C_REG(CAT_SYSTEM, 0x06, 2)
63#define CAT0_VER_AWB 0x08 /* Auto WB version */ 63#define SYSTEM_VER_AWB I2C_REG(CAT_SYSTEM, 0x08, 2)
64#define CAT0_VER_STRING 0x0a /* string including M-5MOLS */ 64
65#define CAT0_SYSMODE 0x0b /* SYSTEM mode register */ 65#define SYSTEM_SYSMODE I2C_REG(CAT_SYSTEM, 0x0b, 1)
66#define CAT0_STATUS 0x0c /* SYSTEM mode status register */
67#define CAT0_INT_FACTOR 0x10 /* interrupt pending register */
68#define CAT0_INT_ENABLE 0x11 /* interrupt enable register */
69
70#define SYSTEM_VER_CUSTOMER I2C_REG(CAT_SYSTEM, CAT0_VER_CUSTOMER, 1)
71#define SYSTEM_VER_PROJECT I2C_REG(CAT_SYSTEM, CAT0_VER_PROJECT, 1)
72#define SYSTEM_VER_FIRMWARE I2C_REG(CAT_SYSTEM, CAT0_VER_FIRMWARE, 2)
73#define SYSTEM_VER_HARDWARE I2C_REG(CAT_SYSTEM, CAT0_VER_HARDWARE, 2)
74#define SYSTEM_VER_PARAMETER I2C_REG(CAT_SYSTEM, CAT0_VER_PARAMETER, 2)
75#define SYSTEM_VER_AWB I2C_REG(CAT_SYSTEM, CAT0_VER_AWB, 2)
76
77#define SYSTEM_SYSMODE I2C_REG(CAT_SYSTEM, CAT0_SYSMODE, 1)
78#define REG_SYSINIT 0x00 /* SYSTEM mode */ 66#define REG_SYSINIT 0x00 /* SYSTEM mode */
79#define REG_PARAMETER 0x01 /* PARAMETER mode */ 67#define REG_PARAMETER 0x01 /* PARAMETER mode */
80#define REG_MONITOR 0x02 /* MONITOR mode */ 68#define REG_MONITOR 0x02 /* MONITOR mode */
81#define REG_CAPTURE 0x03 /* CAPTURE mode */ 69#define REG_CAPTURE 0x03 /* CAPTURE mode */
82 70
83#define SYSTEM_CMD(__cmd) I2C_REG(CAT_SYSTEM, cmd, 1) 71#define SYSTEM_CMD(__cmd) I2C_REG(CAT_SYSTEM, cmd, 1)
84#define SYSTEM_VER_STRING I2C_REG(CAT_SYSTEM, CAT0_VER_STRING, 1) 72#define SYSTEM_VER_STRING I2C_REG(CAT_SYSTEM, 0x0a, 1)
85#define REG_SAMSUNG_ELECTRO "SE" /* Samsung Electro-Mechanics */ 73#define REG_SAMSUNG_ELECTRO "SE" /* Samsung Electro-Mechanics */
86#define REG_SAMSUNG_OPTICS "OP" /* Samsung Fiber-Optics */ 74#define REG_SAMSUNG_OPTICS "OP" /* Samsung Fiber-Optics */
87#define REG_SAMSUNG_TECHWIN "TB" /* Samsung Techwin */ 75#define REG_SAMSUNG_TECHWIN "TB" /* Samsung Techwin */
76/* SYSTEM mode status */
77#define SYSTEM_STATUS I2C_REG(CAT_SYSTEM, 0x0c, 1)
88 78
89#define SYSTEM_INT_FACTOR I2C_REG(CAT_SYSTEM, CAT0_INT_FACTOR, 1) 79/* Interrupt pending register */
90#define SYSTEM_INT_ENABLE I2C_REG(CAT_SYSTEM, CAT0_INT_ENABLE, 1) 80#define SYSTEM_INT_FACTOR I2C_REG(CAT_SYSTEM, 0x10, 1)
81/* interrupt enable register */
82#define SYSTEM_INT_ENABLE I2C_REG(CAT_SYSTEM, 0x11, 1)
91#define REG_INT_MODE (1 << 0) 83#define REG_INT_MODE (1 << 0)
92#define REG_INT_AF (1 << 1) 84#define REG_INT_AF (1 << 1)
93#define REG_INT_ZOOM (1 << 2) 85#define REG_INT_ZOOM (1 << 2)
@@ -105,20 +97,20 @@
105 * can handle with preview(MONITOR) resolution size/frame per second/interface 97 * can handle with preview(MONITOR) resolution size/frame per second/interface
106 * between the sensor and the Application Processor/even the image effect. 98 * between the sensor and the Application Processor/even the image effect.
107 */ 99 */
108#define CAT1_DATA_INTERFACE 0x00 /* interface between sensor and AP */
109#define CAT1_MONITOR_SIZE 0x01 /* resolution at the MONITOR mode */
110#define CAT1_MONITOR_FPS 0x02 /* frame per second at this mode */
111#define CAT1_EFFECT 0x0b /* image effects */
112 100
113#define PARM_MON_SIZE I2C_REG(CAT_PARAM, CAT1_MONITOR_SIZE, 1) 101/* Resolution in the MONITOR mode */
102#define PARM_MON_SIZE I2C_REG(CAT_PARAM, 0x01, 1)
114 103
115#define PARM_MON_FPS I2C_REG(CAT_PARAM, CAT1_MONITOR_FPS, 1) 104/* Frame rate */
105#define PARM_MON_FPS I2C_REG(CAT_PARAM, 0x02, 1)
116#define REG_FPS_30 0x02 106#define REG_FPS_30 0x02
117 107
118#define PARM_INTERFACE I2C_REG(CAT_PARAM, CAT1_DATA_INTERFACE, 1) 108/* Video bus between the sensor and a host processor */
109#define PARM_INTERFACE I2C_REG(CAT_PARAM, 0x00, 1)
119#define REG_INTERFACE_MIPI 0x02 110#define REG_INTERFACE_MIPI 0x02
120 111
121#define PARM_EFFECT I2C_REG(CAT_PARAM, CAT1_EFFECT, 1) 112/* Image effects */
113#define PARM_EFFECT I2C_REG(CAT_PARAM, 0x0b, 1)
122#define REG_EFFECT_OFF 0x00 114#define REG_EFFECT_OFF 0x00
123#define REG_EFFECT_NEGA 0x01 115#define REG_EFFECT_NEGA 0x01
124#define REG_EFFECT_EMBOSS 0x06 116#define REG_EFFECT_EMBOSS 0x06
@@ -135,39 +127,37 @@
135 * another options like zoom/color effect(different with effect in PARAMETER 127 * another options like zoom/color effect(different with effect in PARAMETER
136 * mode)/anti hand shaking algorithm. 128 * mode)/anti hand shaking algorithm.
137 */ 129 */
138#define CAT2_ZOOM 0x01 /* set the zoom position & execute */ 130
139#define CAT2_ZOOM_STEP 0x03 /* set the zoom step */ 131/* Target digital zoom position */
140#define CAT2_CFIXB 0x09 /* CB value for color effect */ 132#define MON_ZOOM I2C_REG(CAT_MONITOR, 0x01, 1)
141#define CAT2_CFIXR 0x0a /* CR value for color effect */ 133
142#define CAT2_COLOR_EFFECT 0x0b /* set on/off of color effect */ 134/* CR value for color effect */
143#define CAT2_CHROMA_LVL 0x0f /* set chroma level */ 135#define MON_CFIXR I2C_REG(CAT_MONITOR, 0x0a, 1)
144#define CAT2_CHROMA_EN 0x10 /* set on/off of choroma */ 136/* CB value for color effect */
145#define CAT2_EDGE_LVL 0x11 /* set sharpness level */ 137#define MON_CFIXB I2C_REG(CAT_MONITOR, 0x09, 1)
146#define CAT2_EDGE_EN 0x12 /* set on/off sharpness */
147#define CAT2_TONE_CTL 0x25 /* set tone color(contrast) */
148
149#define MON_ZOOM I2C_REG(CAT_MONITOR, CAT2_ZOOM, 1)
150
151#define MON_CFIXR I2C_REG(CAT_MONITOR, CAT2_CFIXR, 1)
152#define MON_CFIXB I2C_REG(CAT_MONITOR, CAT2_CFIXB, 1)
153#define REG_CFIXB_SEPIA 0xd8 138#define REG_CFIXB_SEPIA 0xd8
154#define REG_CFIXR_SEPIA 0x18 139#define REG_CFIXR_SEPIA 0x18
155 140
156#define MON_EFFECT I2C_REG(CAT_MONITOR, CAT2_COLOR_EFFECT, 1) 141#define MON_EFFECT I2C_REG(CAT_MONITOR, 0x0b, 1)
157#define REG_COLOR_EFFECT_OFF 0x00 142#define REG_COLOR_EFFECT_OFF 0x00
158#define REG_COLOR_EFFECT_ON 0x01 143#define REG_COLOR_EFFECT_ON 0x01
159 144
160#define MON_CHROMA_EN I2C_REG(CAT_MONITOR, CAT2_CHROMA_EN, 1) 145/* Chroma enable */
161#define MON_CHROMA_LVL I2C_REG(CAT_MONITOR, CAT2_CHROMA_LVL, 1) 146#define MON_CHROMA_EN I2C_REG(CAT_MONITOR, 0x10, 1)
147/* Chroma level */
148#define MON_CHROMA_LVL I2C_REG(CAT_MONITOR, 0x0f, 1)
162#define REG_CHROMA_OFF 0x00 149#define REG_CHROMA_OFF 0x00
163#define REG_CHROMA_ON 0x01 150#define REG_CHROMA_ON 0x01
164 151
165#define MON_EDGE_EN I2C_REG(CAT_MONITOR, CAT2_EDGE_EN, 1) 152/* Sharpness on/off */
166#define MON_EDGE_LVL I2C_REG(CAT_MONITOR, CAT2_EDGE_LVL, 1) 153#define MON_EDGE_EN I2C_REG(CAT_MONITOR, 0x12, 1)
154/* Sharpness level */
155#define MON_EDGE_LVL I2C_REG(CAT_MONITOR, 0x11, 1)
167#define REG_EDGE_OFF 0x00 156#define REG_EDGE_OFF 0x00
168#define REG_EDGE_ON 0x01 157#define REG_EDGE_ON 0x01
169 158
170#define MON_TONE_CTL I2C_REG(CAT_MONITOR, CAT2_TONE_CTL, 1) 159/* Set color tone (contrast) */
160#define MON_TONE_CTL I2C_REG(CAT_MONITOR, 0x25, 1)
171 161
172/* 162/*
173 * Category 3 - Auto Exposure 163 * Category 3 - Auto Exposure
@@ -179,27 +169,20 @@
179 * different. So, this category also provide getting the max/min values. And, 169 * different. So, this category also provide getting the max/min values. And,
180 * each MONITOR and CAPTURE mode has each gain/shutter/max exposure values. 170 * each MONITOR and CAPTURE mode has each gain/shutter/max exposure values.
181 */ 171 */
182#define CAT3_AE_LOCK 0x00 /* locking Auto exposure */ 172
183#define CAT3_AE_MODE 0x01 /* set AE mode, mode means range */ 173/* Auto Exposure locking */
184#define CAT3_ISO 0x05 /* set ISO */ 174#define AE_LOCK I2C_REG(CAT_AE, 0x00, 1)
185#define CAT3_EV_PRESET_MONITOR 0x0a /* EV(scenemode) preset for MONITOR */
186#define CAT3_EV_PRESET_CAPTURE 0x0b /* EV(scenemode) preset for CAPTURE */
187#define CAT3_MANUAL_GAIN_MON 0x12 /* meteoring value for the MONITOR */
188#define CAT3_MAX_GAIN_MON 0x1a /* max gain value for the MONITOR */
189#define CAT3_MANUAL_GAIN_CAP 0x26 /* meteoring value for the CAPTURE */
190#define CAT3_AE_INDEX 0x38 /* AE index */
191
192#define AE_LOCK I2C_REG(CAT_AE, CAT3_AE_LOCK, 1)
193#define REG_AE_UNLOCK 0x00 175#define REG_AE_UNLOCK 0x00
194#define REG_AE_LOCK 0x01 176#define REG_AE_LOCK 0x01
195 177
196#define AE_MODE I2C_REG(CAT_AE, CAT3_AE_MODE, 1) 178/* Auto Exposure algorithm mode */
179#define AE_MODE I2C_REG(CAT_AE, 0x01, 1)
197#define REG_AE_OFF 0x00 /* AE off */ 180#define REG_AE_OFF 0x00 /* AE off */
198#define REG_AE_ALL 0x01 /* calc AE in all block integral */ 181#define REG_AE_ALL 0x01 /* calc AE in all block integral */
199#define REG_AE_CENTER 0x03 /* calc AE in center weighted */ 182#define REG_AE_CENTER 0x03 /* calc AE in center weighted */
200#define REG_AE_SPOT 0x06 /* calc AE in specific spot */ 183#define REG_AE_SPOT 0x06 /* calc AE in specific spot */
201 184
202#define AE_ISO I2C_REG(CAT_AE, CAT3_ISO, 1) 185#define AE_ISO I2C_REG(CAT_AE, 0x05, 1)
203#define REG_ISO_AUTO 0x00 186#define REG_ISO_AUTO 0x00
204#define REG_ISO_50 0x01 187#define REG_ISO_50 0x01
205#define REG_ISO_100 0x02 188#define REG_ISO_100 0x02
@@ -207,8 +190,10 @@
207#define REG_ISO_400 0x04 190#define REG_ISO_400 0x04
208#define REG_ISO_800 0x05 191#define REG_ISO_800 0x05
209 192
210#define AE_EV_PRESET_MONITOR I2C_REG(CAT_AE, CAT3_EV_PRESET_MONITOR, 1) 193/* EV (scenemode) preset for MONITOR */
211#define AE_EV_PRESET_CAPTURE I2C_REG(CAT_AE, CAT3_EV_PRESET_CAPTURE, 1) 194#define AE_EV_PRESET_MONITOR I2C_REG(CAT_AE, 0x0a, 1)
195/* EV (scenemode) preset for CAPTURE */
196#define AE_EV_PRESET_CAPTURE I2C_REG(CAT_AE, 0x0b, 1)
212#define REG_SCENE_NORMAL 0x00 197#define REG_SCENE_NORMAL 0x00
213#define REG_SCENE_PORTRAIT 0x01 198#define REG_SCENE_PORTRAIT 0x01
214#define REG_SCENE_LANDSCAPE 0x02 199#define REG_SCENE_LANDSCAPE 0x02
@@ -224,11 +209,14 @@
224#define REG_SCENE_TEXT 0x0c 209#define REG_SCENE_TEXT 0x0c
225#define REG_SCENE_CANDLE 0x0d 210#define REG_SCENE_CANDLE 0x0d
226 211
227#define AE_MAN_GAIN_MON I2C_REG(CAT_AE, CAT3_MANUAL_GAIN_MON, 2) 212/* Manual gain in MONITOR mode */
228#define AE_MAX_GAIN_MON I2C_REG(CAT_AE, CAT3_MAX_GAIN_MON, 2) 213#define AE_MAN_GAIN_MON I2C_REG(CAT_AE, 0x12, 2)
229#define AE_MAN_GAIN_CAP I2C_REG(CAT_AE, CAT3_MANUAL_GAIN_CAP, 2) 214/* Maximum gain in MONITOR mode */
215#define AE_MAX_GAIN_MON I2C_REG(CAT_AE, 0x1a, 2)
216/* Manual gain in CAPTURE mode */
217#define AE_MAN_GAIN_CAP I2C_REG(CAT_AE, 0x26, 2)
230 218
231#define AE_INDEX I2C_REG(CAT_AE, CAT3_AE_INDEX, 1) 219#define AE_INDEX I2C_REG(CAT_AE, 0x38, 1)
232#define REG_AE_INDEX_20_NEG 0x00 220#define REG_AE_INDEX_20_NEG 0x00
233#define REG_AE_INDEX_15_NEG 0x01 221#define REG_AE_INDEX_15_NEG 0x01
234#define REG_AE_INDEX_10_NEG 0x02 222#define REG_AE_INDEX_10_NEG 0x02
@@ -241,22 +229,19 @@
241 229
242/* 230/*
243 * Category 6 - White Balance 231 * Category 6 - White Balance
244 *
245 * This category provide AWB locking/mode/preset/speed/gain bias, etc.
246 */ 232 */
247#define CAT6_AWB_LOCK 0x00 /* locking Auto Whitebalance */
248#define CAT6_AWB_MODE 0x02 /* set Auto or Manual */
249#define CAT6_AWB_MANUAL 0x03 /* set Manual(preset) value */
250 233
251#define AWB_LOCK I2C_REG(CAT_WB, CAT6_AWB_LOCK, 1) 234/* Auto Whitebalance locking */
235#define AWB_LOCK I2C_REG(CAT_WB, 0x00, 1)
252#define REG_AWB_UNLOCK 0x00 236#define REG_AWB_UNLOCK 0x00
253#define REG_AWB_LOCK 0x01 237#define REG_AWB_LOCK 0x01
254 238
255#define AWB_MODE I2C_REG(CAT_WB, CAT6_AWB_MODE, 1) 239#define AWB_MODE I2C_REG(CAT_WB, 0x02, 1)
256#define REG_AWB_AUTO 0x01 /* AWB off */ 240#define REG_AWB_AUTO 0x01 /* AWB off */
257#define REG_AWB_PRESET 0x02 /* AWB preset */ 241#define REG_AWB_PRESET 0x02 /* AWB preset */
258 242
259#define AWB_MANUAL I2C_REG(CAT_WB, CAT6_AWB_MANUAL, 1) 243/* Manual WB (preset) */
244#define AWB_MANUAL I2C_REG(CAT_WB, 0x03, 1)
260#define REG_AWB_INCANDESCENT 0x01 245#define REG_AWB_INCANDESCENT 0x01
261#define REG_AWB_FLUORESCENT_1 0x02 246#define REG_AWB_FLUORESCENT_1 0x02
262#define REG_AWB_FLUORESCENT_2 0x03 247#define REG_AWB_FLUORESCENT_2 0x03
@@ -269,42 +254,25 @@
269/* 254/*
270 * Category 7 - EXIF information 255 * Category 7 - EXIF information
271 */ 256 */
272#define CAT7_INFO_EXPTIME_NU 0x00 257#define EXIF_INFO_EXPTIME_NU I2C_REG(CAT_EXIF, 0x00, 4)
273#define CAT7_INFO_EXPTIME_DE 0x04 258#define EXIF_INFO_EXPTIME_DE I2C_REG(CAT_EXIF, 0x04, 4)
274#define CAT7_INFO_TV_NU 0x08 259#define EXIF_INFO_TV_NU I2C_REG(CAT_EXIF, 0x08, 4)
275#define CAT7_INFO_TV_DE 0x0c 260#define EXIF_INFO_TV_DE I2C_REG(CAT_EXIF, 0x0c, 4)
276#define CAT7_INFO_AV_NU 0x10 261#define EXIF_INFO_AV_NU I2C_REG(CAT_EXIF, 0x10, 4)
277#define CAT7_INFO_AV_DE 0x14 262#define EXIF_INFO_AV_DE I2C_REG(CAT_EXIF, 0x14, 4)
278#define CAT7_INFO_BV_NU 0x18 263#define EXIF_INFO_BV_NU I2C_REG(CAT_EXIF, 0x18, 4)
279#define CAT7_INFO_BV_DE 0x1c 264#define EXIF_INFO_BV_DE I2C_REG(CAT_EXIF, 0x1c, 4)
280#define CAT7_INFO_EBV_NU 0x20 265#define EXIF_INFO_EBV_NU I2C_REG(CAT_EXIF, 0x20, 4)
281#define CAT7_INFO_EBV_DE 0x24 266#define EXIF_INFO_EBV_DE I2C_REG(CAT_EXIF, 0x24, 4)
282#define CAT7_INFO_ISO 0x28 267#define EXIF_INFO_ISO I2C_REG(CAT_EXIF, 0x28, 2)
283#define CAT7_INFO_FLASH 0x2a 268#define EXIF_INFO_FLASH I2C_REG(CAT_EXIF, 0x2a, 2)
284#define CAT7_INFO_SDR 0x2c 269#define EXIF_INFO_SDR I2C_REG(CAT_EXIF, 0x2c, 2)
285#define CAT7_INFO_QVAL 0x2e 270#define EXIF_INFO_QVAL I2C_REG(CAT_EXIF, 0x2e, 2)
286
287#define EXIF_INFO_EXPTIME_NU I2C_REG(CAT_EXIF, CAT7_INFO_EXPTIME_NU, 4)
288#define EXIF_INFO_EXPTIME_DE I2C_REG(CAT_EXIF, CAT7_INFO_EXPTIME_DE, 4)
289#define EXIF_INFO_TV_NU I2C_REG(CAT_EXIF, CAT7_INFO_TV_NU, 4)
290#define EXIF_INFO_TV_DE I2C_REG(CAT_EXIF, CAT7_INFO_TV_DE, 4)
291#define EXIF_INFO_AV_NU I2C_REG(CAT_EXIF, CAT7_INFO_AV_NU, 4)
292#define EXIF_INFO_AV_DE I2C_REG(CAT_EXIF, CAT7_INFO_AV_DE, 4)
293#define EXIF_INFO_BV_NU I2C_REG(CAT_EXIF, CAT7_INFO_BV_NU, 4)
294#define EXIF_INFO_BV_DE I2C_REG(CAT_EXIF, CAT7_INFO_BV_DE, 4)
295#define EXIF_INFO_EBV_NU I2C_REG(CAT_EXIF, CAT7_INFO_EBV_NU, 4)
296#define EXIF_INFO_EBV_DE I2C_REG(CAT_EXIF, CAT7_INFO_EBV_DE, 4)
297#define EXIF_INFO_ISO I2C_REG(CAT_EXIF, CAT7_INFO_ISO, 2)
298#define EXIF_INFO_FLASH I2C_REG(CAT_EXIF, CAT7_INFO_FLASH, 2)
299#define EXIF_INFO_SDR I2C_REG(CAT_EXIF, CAT7_INFO_SDR, 2)
300#define EXIF_INFO_QVAL I2C_REG(CAT_EXIF, CAT7_INFO_QVAL, 2)
301 271
302/* 272/*
303 * Category 9 - Face Detection 273 * Category 9 - Face Detection
304 */ 274 */
305#define CAT9_FD_CTL 0x00 275#define FD_CTL I2C_REG(CAT_FD, 0x00, 1)
306
307#define FD_CTL I2C_REG(CAT_FD, CAT9_FD_CTL, 1)
308#define BIT_FD_EN 0 276#define BIT_FD_EN 0
309#define BIT_FD_DRAW_FACE_FRAME 4 277#define BIT_FD_DRAW_FACE_FRAME 4
310#define BIT_FD_DRAW_SMILE_LVL 6 278#define BIT_FD_DRAW_SMILE_LVL 6
@@ -314,62 +282,50 @@
314/* 282/*
315 * Category A - Lens Parameter 283 * Category A - Lens Parameter
316 */ 284 */
317#define CATA_AF_MODE 0x01 285#define AF_MODE I2C_REG(CAT_LENS, 0x01, 1)
318#define CATA_AF_EXECUTE 0x02
319#define CATA_AF_STATUS 0x03
320#define CATA_AF_VERSION 0x0a
321
322#define AF_MODE I2C_REG(CAT_LENS, CATA_AF_MODE, 1)
323#define REG_AF_NORMAL 0x00 /* Normal AF, one time */ 286#define REG_AF_NORMAL 0x00 /* Normal AF, one time */
324#define REG_AF_MACRO 0x01 /* Macro AF, one time */ 287#define REG_AF_MACRO 0x01 /* Macro AF, one time */
325#define REG_AF_POWEROFF 0x07 288#define REG_AF_POWEROFF 0x07
326 289
327#define AF_EXECUTE I2C_REG(CAT_LENS, CATA_AF_EXECUTE, 1) 290#define AF_EXECUTE I2C_REG(CAT_LENS, 0x02, 1)
328#define REG_AF_STOP 0x00 291#define REG_AF_STOP 0x00
329#define REG_AF_EXE_AUTO 0x01 292#define REG_AF_EXE_AUTO 0x01
330#define REG_AF_EXE_CAF 0x02 293#define REG_AF_EXE_CAF 0x02
331 294
332#define AF_STATUS I2C_REG(CAT_LENS, CATA_AF_STATUS, 1) 295#define AF_STATUS I2C_REG(CAT_LENS, 0x03, 1)
333#define REG_AF_FAIL 0x00 296#define REG_AF_FAIL 0x00
334#define REG_AF_SUCCESS 0x02 297#define REG_AF_SUCCESS 0x02
335#define REG_AF_IDLE 0x04 298#define REG_AF_IDLE 0x04
336#define REG_AF_BUSY 0x05 299#define REG_AF_BUSY 0x05
337 300
338#define AF_VERSION I2C_REG(CAT_LENS, CATA_AF_VERSION, 1) 301#define AF_VERSION I2C_REG(CAT_LENS, 0x0a, 1)
339 302
340/* 303/*
341 * Category B - CAPTURE Parameter 304 * Category B - CAPTURE Parameter
342 */ 305 */
343#define CATB_YUVOUT_MAIN 0x00 306#define CAPP_YUVOUT_MAIN I2C_REG(CAT_CAPT_PARM, 0x00, 1)
344#define CATB_MAIN_IMAGE_SIZE 0x01
345#define CATB_MCC_MODE 0x1d
346#define CATB_WDR_EN 0x2c
347#define CATB_LIGHT_CTRL 0x40
348#define CATB_FLASH_CTRL 0x41
349
350#define CAPP_YUVOUT_MAIN I2C_REG(CAT_CAPT_PARM, CATB_YUVOUT_MAIN, 1)
351#define REG_YUV422 0x00 307#define REG_YUV422 0x00
352#define REG_BAYER10 0x05 308#define REG_BAYER10 0x05
353#define REG_BAYER8 0x06 309#define REG_BAYER8 0x06
354#define REG_JPEG 0x10 310#define REG_JPEG 0x10
355 311
356#define CAPP_MAIN_IMAGE_SIZE I2C_REG(CAT_CAPT_PARM, CATB_MAIN_IMAGE_SIZE, 1) 312#define CAPP_MAIN_IMAGE_SIZE I2C_REG(CAT_CAPT_PARM, 0x01, 1)
357 313
358#define CAPP_MCC_MODE I2C_REG(CAT_CAPT_PARM, CATB_MCC_MODE, 1) 314#define CAPP_MCC_MODE I2C_REG(CAT_CAPT_PARM, 0x1d, 1)
359#define REG_MCC_OFF 0x00 315#define REG_MCC_OFF 0x00
360#define REG_MCC_NORMAL 0x01 316#define REG_MCC_NORMAL 0x01
361 317
362#define CAPP_WDR_EN I2C_REG(CAT_CAPT_PARM, CATB_WDR_EN, 1) 318#define CAPP_WDR_EN I2C_REG(CAT_CAPT_PARM, 0x2c, 1)
363#define REG_WDR_OFF 0x00 319#define REG_WDR_OFF 0x00
364#define REG_WDR_ON 0x01 320#define REG_WDR_ON 0x01
365#define REG_WDR_AUTO 0x02 321#define REG_WDR_AUTO 0x02
366 322
367#define CAPP_LIGHT_CTRL I2C_REG(CAT_CAPT_PARM, CATB_LIGHT_CTRL, 1) 323#define CAPP_LIGHT_CTRL I2C_REG(CAT_CAPT_PARM, 0x40, 1)
368#define REG_LIGHT_OFF 0x00 324#define REG_LIGHT_OFF 0x00
369#define REG_LIGHT_ON 0x01 325#define REG_LIGHT_ON 0x01
370#define REG_LIGHT_AUTO 0x02 326#define REG_LIGHT_AUTO 0x02
371 327
372#define CAPP_FLASH_CTRL I2C_REG(CAT_CAPT_PARM, CATB_FLASH_CTRL, 1) 328#define CAPP_FLASH_CTRL I2C_REG(CAT_CAPT_PARM, 0x41, 1)
373#define REG_FLASH_OFF 0x00 329#define REG_FLASH_OFF 0x00
374#define REG_FLASH_ON 0x01 330#define REG_FLASH_ON 0x01
375#define REG_FLASH_AUTO 0x02 331#define REG_FLASH_AUTO 0x02
@@ -377,34 +333,29 @@
377/* 333/*
378 * Category C - CAPTURE Control 334 * Category C - CAPTURE Control
379 */ 335 */
380#define CATC_CAP_MODE 0x00 336#define CAPC_MODE I2C_REG(CAT_CAPT_CTRL, 0x00, 1)
381#define CATC_CAP_SEL_FRAME 0x06 /* It determines Single or Multi */
382#define CATC_CAP_START 0x09
383#define CATC_CAP_IMAGE_SIZE 0x0d
384#define CATC_CAP_THUMB_SIZE 0x11
385
386#define CAPC_MODE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_MODE, 1)
387#define REG_CAP_NONE 0x00 337#define REG_CAP_NONE 0x00
388#define REG_CAP_ANTI_SHAKE 0x02 338#define REG_CAP_ANTI_SHAKE 0x02
389 339
390#define CAPC_SEL_FRAME I2C_REG(CAT_CAPT_CTRL, CATC_CAP_SEL_FRAME, 1) 340/* Select single- or multi-shot capture */
341#define CAPC_SEL_FRAME I2C_REG(CAT_CAPT_CTRL, 0x06, 1)
391 342
392#define CAPC_START I2C_REG(CAT_CAPT_CTRL, CATC_CAP_START, 1) 343#define CAPC_START I2C_REG(CAT_CAPT_CTRL, 0x09, 1)
393#define REG_CAP_START_MAIN 0x01 344#define REG_CAP_START_MAIN 0x01
394#define REG_CAP_START_THUMB 0x03 345#define REG_CAP_START_THUMB 0x03
395 346
396#define CAPC_IMAGE_SIZE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_IMAGE_SIZE, 4) 347#define CAPC_IMAGE_SIZE I2C_REG(CAT_CAPT_CTRL, 0x0d, 4)
397#define CAPC_THUMB_SIZE I2C_REG(CAT_CAPT_CTRL, CATC_CAP_THUMB_SIZE, 4) 348#define CAPC_THUMB_SIZE I2C_REG(CAT_CAPT_CTRL, 0x11, 4)
398 349
399/* 350/*
400 * Category F - Flash 351 * Category F - Flash
401 * 352 *
402 * This mode provides functions about internal flash stuff and system startup. 353 * This mode provides functions about internal flash stuff and system startup.
403 */ 354 */
404#define CATF_CAM_START 0x12 /* It starts internal ARM core booting
405 * after power-up */
406 355
407#define FLASH_CAM_START I2C_REG(CAT_FLASH, CATF_CAM_START, 1) 356/* Starts internal ARM core booting after power-up */
408#define REG_START_ARM_BOOT 0x01 357#define FLASH_CAM_START I2C_REG(CAT_FLASH, 0x12, 1)
358#define REG_START_ARM_BOOT 0x01 /* write value */
359#define REG_IN_FLASH_MODE 0x00 /* read value */
409 360
410#endif /* M5MOLS_REG_H */ 361#endif /* M5MOLS_REG_H */
diff --git a/drivers/media/video/marvell-ccic/mcam-core.c b/drivers/media/video/marvell-ccic/mcam-core.c
index 2c8fc0f6d69..37d20e73908 100644
--- a/drivers/media/video/marvell-ccic/mcam-core.c
+++ b/drivers/media/video/marvell-ccic/mcam-core.c
@@ -522,6 +522,15 @@ static void mcam_sg_next_buffer(struct mcam_camera *cam)
522 */ 522 */
523static void mcam_ctlr_dma_sg(struct mcam_camera *cam) 523static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
524{ 524{
525 /*
526 * The list-empty condition can hit us at resume time
527 * if the buffer list was empty when the system was suspended.
528 */
529 if (list_empty(&cam->buffers)) {
530 set_bit(CF_SG_RESTART, &cam->flags);
531 return;
532 }
533
525 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD); 534 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
526 mcam_sg_next_buffer(cam); 535 mcam_sg_next_buffer(cam);
527 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA); 536 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
@@ -566,6 +575,7 @@ static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
566 } else { 575 } else {
567 set_bit(CF_SG_RESTART, &cam->flags); 576 set_bit(CF_SG_RESTART, &cam->flags);
568 singles++; 577 singles++;
578 cam->vb_bufs[0] = NULL;
569 } 579 }
570 /* 580 /*
571 * Now we can give the completed frame back to user space. 581 * Now we can give the completed frame back to user space.
@@ -661,10 +671,10 @@ static int mcam_ctlr_configure(struct mcam_camera *cam)
661 unsigned long flags; 671 unsigned long flags;
662 672
663 spin_lock_irqsave(&cam->dev_lock, flags); 673 spin_lock_irqsave(&cam->dev_lock, flags);
674 clear_bit(CF_SG_RESTART, &cam->flags);
664 cam->dma_setup(cam); 675 cam->dma_setup(cam);
665 mcam_ctlr_image(cam); 676 mcam_ctlr_image(cam);
666 mcam_set_config_needed(cam, 0); 677 mcam_set_config_needed(cam, 0);
667 clear_bit(CF_SG_RESTART, &cam->flags);
668 spin_unlock_irqrestore(&cam->dev_lock, flags); 678 spin_unlock_irqrestore(&cam->dev_lock, flags);
669 return 0; 679 return 0;
670} 680}
@@ -873,7 +883,8 @@ static int mcam_read_setup(struct mcam_camera *cam)
873 mcam_reset_buffers(cam); 883 mcam_reset_buffers(cam);
874 mcam_ctlr_irq_enable(cam); 884 mcam_ctlr_irq_enable(cam);
875 cam->state = S_STREAMING; 885 cam->state = S_STREAMING;
876 mcam_ctlr_start(cam); 886 if (!test_bit(CF_SG_RESTART, &cam->flags))
887 mcam_ctlr_start(cam);
877 spin_unlock_irqrestore(&cam->dev_lock, flags); 888 spin_unlock_irqrestore(&cam->dev_lock, flags);
878 return 0; 889 return 0;
879} 890}
@@ -1818,11 +1829,15 @@ void mccic_shutdown(struct mcam_camera *cam)
1818 1829
1819void mccic_suspend(struct mcam_camera *cam) 1830void mccic_suspend(struct mcam_camera *cam)
1820{ 1831{
1821 enum mcam_state cstate = cam->state; 1832 mutex_lock(&cam->s_mutex);
1833 if (cam->users > 0) {
1834 enum mcam_state cstate = cam->state;
1822 1835
1823 mcam_ctlr_stop_dma(cam); 1836 mcam_ctlr_stop_dma(cam);
1824 mcam_ctlr_power_down(cam); 1837 mcam_ctlr_power_down(cam);
1825 cam->state = cstate; 1838 cam->state = cstate;
1839 }
1840 mutex_unlock(&cam->s_mutex);
1826} 1841}
1827 1842
1828int mccic_resume(struct mcam_camera *cam) 1843int mccic_resume(struct mcam_camera *cam)
@@ -1839,8 +1854,15 @@ int mccic_resume(struct mcam_camera *cam)
1839 mutex_unlock(&cam->s_mutex); 1854 mutex_unlock(&cam->s_mutex);
1840 1855
1841 set_bit(CF_CONFIG_NEEDED, &cam->flags); 1856 set_bit(CF_CONFIG_NEEDED, &cam->flags);
1842 if (cam->state == S_STREAMING) 1857 if (cam->state == S_STREAMING) {
1858 /*
1859 * If there was a buffer in the DMA engine at suspend
1860 * time, put it back on the queue or we'll forget about it.
1861 */
1862 if (cam->buffer_mode == B_DMA_sg && cam->vb_bufs[0])
1863 list_add(&cam->vb_bufs[0]->queue, &cam->buffers);
1843 ret = mcam_read_setup(cam); 1864 ret = mcam_read_setup(cam);
1865 }
1844 return ret; 1866 return ret;
1845} 1867}
1846#endif /* CONFIG_PM */ 1868#endif /* CONFIG_PM */
diff --git a/drivers/media/video/marvell-ccic/mmp-driver.c b/drivers/media/video/marvell-ccic/mmp-driver.c
index fb0b124b35f..0d64e2d7474 100644
--- a/drivers/media/video/marvell-ccic/mmp-driver.c
+++ b/drivers/media/video/marvell-ccic/mmp-driver.c
@@ -26,6 +26,7 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/list.h> 28#include <linux/list.h>
29#include <linux/pm.h>
29 30
30#include "mcam-core.h" 31#include "mcam-core.h"
31 32
@@ -310,10 +311,44 @@ static int mmpcam_platform_remove(struct platform_device *pdev)
310 return mmpcam_remove(cam); 311 return mmpcam_remove(cam);
311} 312}
312 313
314/*
315 * Suspend/resume support.
316 */
317#ifdef CONFIG_PM
318
319static int mmpcam_suspend(struct platform_device *pdev, pm_message_t state)
320{
321 struct mmp_camera *cam = mmpcam_find_device(pdev);
322
323 if (state.event != PM_EVENT_SUSPEND)
324 return 0;
325 mccic_suspend(&cam->mcam);
326 return 0;
327}
328
329static int mmpcam_resume(struct platform_device *pdev)
330{
331 struct mmp_camera *cam = mmpcam_find_device(pdev);
332
333 /*
334 * Power up unconditionally just in case the core tries to
335 * touch a register even if nothing was active before; trust
336 * me, it's better this way.
337 */
338 mmpcam_power_up(&cam->mcam);
339 return mccic_resume(&cam->mcam);
340}
341
342#endif
343
313 344
314static struct platform_driver mmpcam_driver = { 345static struct platform_driver mmpcam_driver = {
315 .probe = mmpcam_probe, 346 .probe = mmpcam_probe,
316 .remove = mmpcam_platform_remove, 347 .remove = mmpcam_platform_remove,
348#ifdef CONFIG_PM
349 .suspend = mmpcam_suspend,
350 .resume = mmpcam_resume,
351#endif
317 .driver = { 352 .driver = {
318 .name = "mmp-camera", 353 .name = "mmp-camera",
319 .owner = THIS_MODULE 354 .owner = THIS_MODULE
diff --git a/drivers/media/video/mt9m001.c b/drivers/media/video/mt9m001.c
index e2b1029b16c..097c9d3d04a 100644
--- a/drivers/media/video/mt9m001.c
+++ b/drivers/media/video/mt9m001.c
@@ -109,14 +109,13 @@ static struct mt9m001 *to_mt9m001(const struct i2c_client *client)
109 109
110static int reg_read(struct i2c_client *client, const u8 reg) 110static int reg_read(struct i2c_client *client, const u8 reg)
111{ 111{
112 s32 data = i2c_smbus_read_word_data(client, reg); 112 return i2c_smbus_read_word_swapped(client, reg);
113 return data < 0 ? data : swab16(data);
114} 113}
115 114
116static int reg_write(struct i2c_client *client, const u8 reg, 115static int reg_write(struct i2c_client *client, const u8 reg,
117 const u16 data) 116 const u16 data)
118{ 117{
119 return i2c_smbus_write_word_data(client, reg, swab16(data)); 118 return i2c_smbus_write_word_swapped(client, reg, data);
120} 119}
121 120
122static int reg_set(struct i2c_client *client, const u8 reg, 121static int reg_set(struct i2c_client *client, const u8 reg,
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c
index 398f96ffd35..bee65bff46e 100644
--- a/drivers/media/video/mt9m111.c
+++ b/drivers/media/video/mt9m111.c
@@ -139,25 +139,52 @@
139#define MT9M111_MAX_HEIGHT 1024 139#define MT9M111_MAX_HEIGHT 1024
140#define MT9M111_MAX_WIDTH 1280 140#define MT9M111_MAX_WIDTH 1280
141 141
142struct mt9m111_context {
143 u16 read_mode;
144 u16 blanking_h;
145 u16 blanking_v;
146 u16 reducer_xzoom;
147 u16 reducer_yzoom;
148 u16 reducer_xsize;
149 u16 reducer_ysize;
150 u16 output_fmt_ctrl2;
151 u16 control;
152};
153
154static struct mt9m111_context context_a = {
155 .read_mode = MT9M111_READ_MODE_A,
156 .blanking_h = MT9M111_HORIZONTAL_BLANKING_A,
157 .blanking_v = MT9M111_VERTICAL_BLANKING_A,
158 .reducer_xzoom = MT9M111_REDUCER_XZOOM_A,
159 .reducer_yzoom = MT9M111_REDUCER_YZOOM_A,
160 .reducer_xsize = MT9M111_REDUCER_XSIZE_A,
161 .reducer_ysize = MT9M111_REDUCER_YSIZE_A,
162 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A,
163 .control = MT9M111_CTXT_CTRL_RESTART,
164};
165
166static struct mt9m111_context context_b = {
167 .read_mode = MT9M111_READ_MODE_B,
168 .blanking_h = MT9M111_HORIZONTAL_BLANKING_B,
169 .blanking_v = MT9M111_VERTICAL_BLANKING_B,
170 .reducer_xzoom = MT9M111_REDUCER_XZOOM_B,
171 .reducer_yzoom = MT9M111_REDUCER_YZOOM_B,
172 .reducer_xsize = MT9M111_REDUCER_XSIZE_B,
173 .reducer_ysize = MT9M111_REDUCER_YSIZE_B,
174 .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B,
175 .control = MT9M111_CTXT_CTRL_RESTART |
176 MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
177 MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
178 MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
179 MT9M111_CTXT_CTRL_HBLANK_SEL_B,
180};
181
142/* MT9M111 has only one fixed colorspace per pixelcode */ 182/* MT9M111 has only one fixed colorspace per pixelcode */
143struct mt9m111_datafmt { 183struct mt9m111_datafmt {
144 enum v4l2_mbus_pixelcode code; 184 enum v4l2_mbus_pixelcode code;
145 enum v4l2_colorspace colorspace; 185 enum v4l2_colorspace colorspace;
146}; 186};
147 187
148/* Find a data format by a pixel code in an array */
149static const struct mt9m111_datafmt *mt9m111_find_datafmt(
150 enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
151 int n)
152{
153 int i;
154 for (i = 0; i < n; i++)
155 if (fmt[i].code == code)
156 return fmt + i;
157
158 return NULL;
159}
160
161static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { 188static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
162 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG}, 189 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
163 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG}, 190 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
@@ -173,27 +200,35 @@ static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
173 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, 200 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
174}; 201};
175 202
176enum mt9m111_context {
177 HIGHPOWER = 0,
178 LOWPOWER,
179};
180
181struct mt9m111 { 203struct mt9m111 {
182 struct v4l2_subdev subdev; 204 struct v4l2_subdev subdev;
183 struct v4l2_ctrl_handler hdl; 205 struct v4l2_ctrl_handler hdl;
184 struct v4l2_ctrl *gain; 206 struct v4l2_ctrl *gain;
185 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code 207 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
186 * from v4l2-chip-ident.h */ 208 * from v4l2-chip-ident.h */
187 enum mt9m111_context context; 209 struct mt9m111_context *ctx;
188 struct v4l2_rect rect; 210 struct v4l2_rect rect; /* cropping rectangle */
211 int width; /* output */
212 int height; /* sizes */
189 struct mutex power_lock; /* lock to protect power_count */ 213 struct mutex power_lock; /* lock to protect power_count */
190 int power_count; 214 int power_count;
191 const struct mt9m111_datafmt *fmt; 215 const struct mt9m111_datafmt *fmt;
192 int lastpage; /* PageMap cache value */ 216 int lastpage; /* PageMap cache value */
193 unsigned char datawidth; 217 unsigned char datawidth;
194 unsigned int powered:1;
195}; 218};
196 219
220/* Find a data format by a pixel code */
221static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111,
222 enum v4l2_mbus_pixelcode code)
223{
224 int i;
225 for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++)
226 if (mt9m111_colour_fmts[i].code == code)
227 return mt9m111_colour_fmts + i;
228
229 return mt9m111->fmt;
230}
231
197static struct mt9m111 *to_mt9m111(const struct i2c_client *client) 232static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
198{ 233{
199 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); 234 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
@@ -211,7 +246,7 @@ static int reg_page_map_set(struct i2c_client *client, const u16 reg)
211 if (page > 2) 246 if (page > 2)
212 return -EINVAL; 247 return -EINVAL;
213 248
214 ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page)); 249 ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
215 if (!ret) 250 if (!ret)
216 mt9m111->lastpage = page; 251 mt9m111->lastpage = page;
217 return ret; 252 return ret;
@@ -223,7 +258,7 @@ static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
223 258
224 ret = reg_page_map_set(client, reg); 259 ret = reg_page_map_set(client, reg);
225 if (!ret) 260 if (!ret)
226 ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff)); 261 ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
227 262
228 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); 263 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
229 return ret; 264 return ret;
@@ -236,8 +271,7 @@ static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
236 271
237 ret = reg_page_map_set(client, reg); 272 ret = reg_page_map_set(client, reg);
238 if (!ret) 273 if (!ret)
239 ret = i2c_smbus_write_word_data(client, reg & 0xff, 274 ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
240 swab16(data));
241 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); 275 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
242 return ret; 276 return ret;
243} 277}
@@ -276,76 +310,63 @@ static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
276} 310}
277 311
278static int mt9m111_set_context(struct mt9m111 *mt9m111, 312static int mt9m111_set_context(struct mt9m111 *mt9m111,
279 enum mt9m111_context ctxt) 313 struct mt9m111_context *ctx)
280{ 314{
281 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 315 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
282 int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B 316 return reg_write(CONTEXT_CONTROL, ctx->control);
283 | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
284 | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
285 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
286 | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
287 int valA = MT9M111_CTXT_CTRL_RESTART;
288
289 if (ctxt == HIGHPOWER)
290 return reg_write(CONTEXT_CONTROL, valB);
291 else
292 return reg_write(CONTEXT_CONTROL, valA);
293} 317}
294 318
295static int mt9m111_setup_rect(struct mt9m111 *mt9m111, 319static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
296 struct v4l2_rect *rect) 320 struct mt9m111_context *ctx, struct v4l2_rect *rect,
321 unsigned int width, unsigned int height)
297{ 322{
298 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 323 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
299 int ret, is_raw_format; 324 int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width);
300 int width = rect->width; 325 if (!ret)
301 int height = rect->height; 326 ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height);
327 if (!ret)
328 ret = mt9m111_reg_write(client, ctx->reducer_xsize, width);
329 if (!ret)
330 ret = mt9m111_reg_write(client, ctx->reducer_ysize, height);
331 return ret;
332}
302 333
303 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 || 334static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect,
304 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) 335 int width, int height, enum v4l2_mbus_pixelcode code)
305 is_raw_format = 1; 336{
306 else 337 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
307 is_raw_format = 0; 338 int ret;
308 339
309 ret = reg_write(COLUMN_START, rect->left); 340 ret = reg_write(COLUMN_START, rect->left);
310 if (!ret) 341 if (!ret)
311 ret = reg_write(ROW_START, rect->top); 342 ret = reg_write(ROW_START, rect->top);
312 343
313 if (is_raw_format) { 344 if (!ret)
314 if (!ret) 345 ret = reg_write(WINDOW_WIDTH, rect->width);
315 ret = reg_write(WINDOW_WIDTH, width); 346 if (!ret)
316 if (!ret) 347 ret = reg_write(WINDOW_HEIGHT, rect->height);
317 ret = reg_write(WINDOW_HEIGHT, height); 348
318 } else { 349 if (code != V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
319 if (!ret) 350 /* IFP in use, down-scaling possible */
320 ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
321 if (!ret)
322 ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
323 if (!ret)
324 ret = reg_write(REDUCER_XSIZE_B, width);
325 if (!ret)
326 ret = reg_write(REDUCER_YSIZE_B, height);
327 if (!ret)
328 ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
329 if (!ret)
330 ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
331 if (!ret) 351 if (!ret)
332 ret = reg_write(REDUCER_XSIZE_A, width); 352 ret = mt9m111_setup_rect_ctx(mt9m111, &context_b,
353 rect, width, height);
333 if (!ret) 354 if (!ret)
334 ret = reg_write(REDUCER_YSIZE_A, height); 355 ret = mt9m111_setup_rect_ctx(mt9m111, &context_a,
356 rect, width, height);
335 } 357 }
336 358
359 dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
360 __func__, code, rect->width, rect->height, rect->left, rect->top,
361 width, height, ret);
362
337 return ret; 363 return ret;
338} 364}
339 365
340static int mt9m111_enable(struct mt9m111 *mt9m111) 366static int mt9m111_enable(struct mt9m111 *mt9m111)
341{ 367{
342 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 368 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
343 int ret; 369 return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
344
345 ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
346 if (!ret)
347 mt9m111->powered = 1;
348 return ret;
349} 370}
350 371
351static int mt9m111_reset(struct mt9m111 *mt9m111) 372static int mt9m111_reset(struct mt9m111 *mt9m111)
@@ -363,43 +384,41 @@ static int mt9m111_reset(struct mt9m111 *mt9m111)
363 return ret; 384 return ret;
364} 385}
365 386
366static int mt9m111_make_rect(struct mt9m111 *mt9m111, 387static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
367 struct v4l2_rect *rect)
368{ 388{
389 struct v4l2_rect rect = a->c;
390 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
391 int width, height;
392 int ret;
393
394 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
395 return -EINVAL;
396
369 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 || 397 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
370 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) { 398 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
371 /* Bayer format - even size lengths */ 399 /* Bayer format - even size lengths */
372 rect->width = ALIGN(rect->width, 2); 400 rect.width = ALIGN(rect.width, 2);
373 rect->height = ALIGN(rect->height, 2); 401 rect.height = ALIGN(rect.height, 2);
374 /* Let the user play with the starting pixel */ 402 /* Let the user play with the starting pixel */
375 } 403 }
376 404
377 /* FIXME: the datasheet doesn't specify minimum sizes */ 405 /* FIXME: the datasheet doesn't specify minimum sizes */
378 soc_camera_limit_side(&rect->left, &rect->width, 406 soc_camera_limit_side(&rect.left, &rect.width,
379 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH); 407 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
380 408
381 soc_camera_limit_side(&rect->top, &rect->height, 409 soc_camera_limit_side(&rect.top, &rect.height,
382 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT); 410 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
383 411
384 return mt9m111_setup_rect(mt9m111, rect); 412 width = min(mt9m111->width, rect.width);
385} 413 height = min(mt9m111->height, rect.height);
386
387static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
388{
389 struct v4l2_rect rect = a->c;
390 struct i2c_client *client = v4l2_get_subdevdata(sd);
391 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
392 int ret;
393
394 dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
395 __func__, rect.left, rect.top, rect.width, rect.height);
396 414
397 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 415 ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code);
398 return -EINVAL; 416 if (!ret) {
399
400 ret = mt9m111_make_rect(mt9m111, &rect);
401 if (!ret)
402 mt9m111->rect = rect; 417 mt9m111->rect = rect;
418 mt9m111->width = width;
419 mt9m111->height = height;
420 }
421
403 return ret; 422 return ret;
404} 423}
405 424
@@ -434,8 +453,8 @@ static int mt9m111_g_fmt(struct v4l2_subdev *sd,
434{ 453{
435 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 454 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
436 455
437 mf->width = mt9m111->rect.width; 456 mf->width = mt9m111->width;
438 mf->height = mt9m111->rect.height; 457 mf->height = mt9m111->height;
439 mf->code = mt9m111->fmt->code; 458 mf->code = mt9m111->fmt->code;
440 mf->colorspace = mt9m111->fmt->colorspace; 459 mf->colorspace = mt9m111->fmt->colorspace;
441 mf->field = V4L2_FIELD_NONE; 460 mf->field = V4L2_FIELD_NONE;
@@ -504,46 +523,11 @@ static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
504 return -EINVAL; 523 return -EINVAL;
505 } 524 }
506 525
507 ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2, 526 ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
508 mask_outfmt2); 527 data_outfmt2, mask_outfmt2);
509 if (!ret) 528 if (!ret)
510 ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2, 529 ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
511 mask_outfmt2); 530 data_outfmt2, mask_outfmt2);
512
513 return ret;
514}
515
516static int mt9m111_s_fmt(struct v4l2_subdev *sd,
517 struct v4l2_mbus_framefmt *mf)
518{
519 struct i2c_client *client = v4l2_get_subdevdata(sd);
520 const struct mt9m111_datafmt *fmt;
521 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
522 struct v4l2_rect rect = {
523 .left = mt9m111->rect.left,
524 .top = mt9m111->rect.top,
525 .width = mf->width,
526 .height = mf->height,
527 };
528 int ret;
529
530 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
531 ARRAY_SIZE(mt9m111_colour_fmts));
532 if (!fmt)
533 return -EINVAL;
534
535 dev_dbg(&client->dev,
536 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
537 mf->code, rect.left, rect.top, rect.width, rect.height);
538
539 ret = mt9m111_make_rect(mt9m111, &rect);
540 if (!ret)
541 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
542 if (!ret) {
543 mt9m111->rect = rect;
544 mt9m111->fmt = fmt;
545 mf->colorspace = fmt->colorspace;
546 }
547 531
548 return ret; 532 return ret;
549} 533}
@@ -551,42 +535,71 @@ static int mt9m111_s_fmt(struct v4l2_subdev *sd,
551static int mt9m111_try_fmt(struct v4l2_subdev *sd, 535static int mt9m111_try_fmt(struct v4l2_subdev *sd,
552 struct v4l2_mbus_framefmt *mf) 536 struct v4l2_mbus_framefmt *mf)
553{ 537{
538 struct i2c_client *client = v4l2_get_subdevdata(sd);
554 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); 539 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
555 const struct mt9m111_datafmt *fmt; 540 const struct mt9m111_datafmt *fmt;
556 bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || 541 struct v4l2_rect *rect = &mt9m111->rect;
557 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE; 542 bool bayer;
558 543
559 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts, 544 fmt = mt9m111_find_datafmt(mt9m111, mf->code);
560 ARRAY_SIZE(mt9m111_colour_fmts)); 545
561 if (!fmt) { 546 bayer = fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
562 fmt = mt9m111->fmt; 547 fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
563 mf->code = fmt->code;
564 }
565 548
566 /* 549 /*
567 * With Bayer format enforce even side lengths, but let the user play 550 * With Bayer format enforce even side lengths, but let the user play
568 * with the starting pixel 551 * with the starting pixel
569 */ 552 */
553 if (bayer) {
554 rect->width = ALIGN(rect->width, 2);
555 rect->height = ALIGN(rect->height, 2);
556 }
570 557
571 if (mf->height > MT9M111_MAX_HEIGHT) 558 if (fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
572 mf->height = MT9M111_MAX_HEIGHT; 559 /* IFP bypass mode, no scaling */
573 else if (mf->height < 2) 560 mf->width = rect->width;
574 mf->height = 2; 561 mf->height = rect->height;
575 else if (bayer) 562 } else {
576 mf->height = ALIGN(mf->height, 2); 563 /* No upscaling */
564 if (mf->width > rect->width)
565 mf->width = rect->width;
566 if (mf->height > rect->height)
567 mf->height = rect->height;
568 }
577 569
578 if (mf->width > MT9M111_MAX_WIDTH) 570 dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__,
579 mf->width = MT9M111_MAX_WIDTH; 571 mf->width, mf->height, fmt->code);
580 else if (mf->width < 2)
581 mf->width = 2;
582 else if (bayer)
583 mf->width = ALIGN(mf->width, 2);
584 572
573 mf->code = fmt->code;
585 mf->colorspace = fmt->colorspace; 574 mf->colorspace = fmt->colorspace;
586 575
587 return 0; 576 return 0;
588} 577}
589 578
579static int mt9m111_s_fmt(struct v4l2_subdev *sd,
580 struct v4l2_mbus_framefmt *mf)
581{
582 const struct mt9m111_datafmt *fmt;
583 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
584 struct v4l2_rect *rect = &mt9m111->rect;
585 int ret;
586
587 mt9m111_try_fmt(sd, mf);
588 fmt = mt9m111_find_datafmt(mt9m111, mf->code);
589 /* try_fmt() guarantees fmt != NULL && fmt->code == mf->code */
590
591 ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code);
592 if (!ret)
593 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
594 if (!ret) {
595 mt9m111->width = mf->width;
596 mt9m111->height = mf->height;
597 mt9m111->fmt = fmt;
598 }
599
600 return ret;
601}
602
590static int mt9m111_g_chip_ident(struct v4l2_subdev *sd, 603static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
591 struct v4l2_dbg_chip_ident *id) 604 struct v4l2_dbg_chip_ident *id)
592{ 605{
@@ -650,17 +663,10 @@ static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
650 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 663 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
651 int ret; 664 int ret;
652 665
653 if (mt9m111->context == HIGHPOWER) { 666 if (flip)
654 if (flip) 667 ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
655 ret = reg_set(READ_MODE_B, mask); 668 else
656 else 669 ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
657 ret = reg_clear(READ_MODE_B, mask);
658 } else {
659 if (flip)
660 ret = reg_set(READ_MODE_A, mask);
661 else
662 ret = reg_clear(READ_MODE_A, mask);
663 }
664 670
665 return ret; 671 return ret;
666} 672}
@@ -738,30 +744,39 @@ static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
738 744
739static int mt9m111_suspend(struct mt9m111 *mt9m111) 745static int mt9m111_suspend(struct mt9m111 *mt9m111)
740{ 746{
747 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
748 int ret;
749
741 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111)); 750 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
742 751
743 return 0; 752 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
753 if (!ret)
754 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
755 MT9M111_RESET_OUTPUT_DISABLE |
756 MT9M111_RESET_ANALOG_STANDBY);
757 if (!ret)
758 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
759
760 return ret;
744} 761}
745 762
746static void mt9m111_restore_state(struct mt9m111 *mt9m111) 763static void mt9m111_restore_state(struct mt9m111 *mt9m111)
747{ 764{
748 mt9m111_set_context(mt9m111, mt9m111->context); 765 mt9m111_set_context(mt9m111, mt9m111->ctx);
749 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); 766 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
750 mt9m111_setup_rect(mt9m111, &mt9m111->rect); 767 mt9m111_setup_geometry(mt9m111, &mt9m111->rect,
768 mt9m111->width, mt9m111->height, mt9m111->fmt->code);
751 v4l2_ctrl_handler_setup(&mt9m111->hdl); 769 v4l2_ctrl_handler_setup(&mt9m111->hdl);
752} 770}
753 771
754static int mt9m111_resume(struct mt9m111 *mt9m111) 772static int mt9m111_resume(struct mt9m111 *mt9m111)
755{ 773{
756 int ret = 0; 774 int ret = mt9m111_enable(mt9m111);
775 if (!ret)
776 ret = mt9m111_reset(mt9m111);
777 if (!ret)
778 mt9m111_restore_state(mt9m111);
757 779
758 if (mt9m111->powered) {
759 ret = mt9m111_enable(mt9m111);
760 if (!ret)
761 ret = mt9m111_reset(mt9m111);
762 if (!ret)
763 mt9m111_restore_state(mt9m111);
764 }
765 return ret; 780 return ret;
766} 781}
767 782
@@ -770,12 +785,13 @@ static int mt9m111_init(struct mt9m111 *mt9m111)
770 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); 785 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
771 int ret; 786 int ret;
772 787
773 mt9m111->context = HIGHPOWER; 788 /* Default HIGHPOWER context */
789 mt9m111->ctx = &context_b;
774 ret = mt9m111_enable(mt9m111); 790 ret = mt9m111_enable(mt9m111);
775 if (!ret) 791 if (!ret)
776 ret = mt9m111_reset(mt9m111); 792 ret = mt9m111_reset(mt9m111);
777 if (!ret) 793 if (!ret)
778 ret = mt9m111_set_context(mt9m111, mt9m111->context); 794 ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
779 if (ret) 795 if (ret)
780 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); 796 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
781 return ret; 797 return ret;
diff --git a/drivers/media/video/mt9p031.c b/drivers/media/video/mt9p031.c
index 73c068993f0..93c3ec7426e 100644
--- a/drivers/media/video/mt9p031.c
+++ b/drivers/media/video/mt9p031.c
@@ -132,13 +132,12 @@ static struct mt9p031 *to_mt9p031(struct v4l2_subdev *sd)
132 132
133static int mt9p031_read(struct i2c_client *client, u8 reg) 133static int mt9p031_read(struct i2c_client *client, u8 reg)
134{ 134{
135 s32 data = i2c_smbus_read_word_data(client, reg); 135 return i2c_smbus_read_word_swapped(client, reg);
136 return data < 0 ? data : be16_to_cpu(data);
137} 136}
138 137
139static int mt9p031_write(struct i2c_client *client, u8 reg, u16 data) 138static int mt9p031_write(struct i2c_client *client, u8 reg, u16 data)
140{ 139{
141 return i2c_smbus_write_word_data(client, reg, cpu_to_be16(data)); 140 return i2c_smbus_write_word_swapped(client, reg, data);
142} 141}
143 142
144static int mt9p031_set_output_control(struct mt9p031 *mt9p031, u16 clear, 143static int mt9p031_set_output_control(struct mt9p031 *mt9p031, u16 clear,
diff --git a/drivers/media/video/mt9t001.c b/drivers/media/video/mt9t001.c
index 08074b8a273..cd81d04a529 100644
--- a/drivers/media/video/mt9t001.c
+++ b/drivers/media/video/mt9t001.c
@@ -133,13 +133,12 @@ static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
133 133
134static int mt9t001_read(struct i2c_client *client, u8 reg) 134static int mt9t001_read(struct i2c_client *client, u8 reg)
135{ 135{
136 s32 data = i2c_smbus_read_word_data(client, reg); 136 return i2c_smbus_read_word_swapped(client, reg);
137 return data < 0 ? data : be16_to_cpu(data);
138} 137}
139 138
140static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data) 139static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
141{ 140{
142 return i2c_smbus_write_word_data(client, reg, cpu_to_be16(data)); 141 return i2c_smbus_write_word_swapped(client, reg, data);
143} 142}
144 143
145static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear, 144static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
diff --git a/drivers/media/video/mt9t031.c b/drivers/media/video/mt9t031.c
index 0e78477452f..84add1aef13 100644
--- a/drivers/media/video/mt9t031.c
+++ b/drivers/media/video/mt9t031.c
@@ -90,14 +90,13 @@ static struct mt9t031 *to_mt9t031(const struct i2c_client *client)
90 90
91static int reg_read(struct i2c_client *client, const u8 reg) 91static int reg_read(struct i2c_client *client, const u8 reg)
92{ 92{
93 s32 data = i2c_smbus_read_word_data(client, reg); 93 return i2c_smbus_read_word_swapped(client, reg);
94 return data < 0 ? data : swab16(data);
95} 94}
96 95
97static int reg_write(struct i2c_client *client, const u8 reg, 96static int reg_write(struct i2c_client *client, const u8 reg,
98 const u16 data) 97 const u16 data)
99{ 98{
100 return i2c_smbus_write_word_data(client, reg, swab16(data)); 99 return i2c_smbus_write_word_swapped(client, reg, data);
101} 100}
102 101
103static int reg_set(struct i2c_client *client, const u8 reg, 102static int reg_set(struct i2c_client *client, const u8 reg,
diff --git a/drivers/media/video/mt9v022.c b/drivers/media/video/mt9v022.c
index 690ee0d42ee..944940758fa 100644
--- a/drivers/media/video/mt9v022.c
+++ b/drivers/media/video/mt9v022.c
@@ -130,14 +130,13 @@ static struct mt9v022 *to_mt9v022(const struct i2c_client *client)
130 130
131static int reg_read(struct i2c_client *client, const u8 reg) 131static int reg_read(struct i2c_client *client, const u8 reg)
132{ 132{
133 s32 data = i2c_smbus_read_word_data(client, reg); 133 return i2c_smbus_read_word_swapped(client, reg);
134 return data < 0 ? data : swab16(data);
135} 134}
136 135
137static int reg_write(struct i2c_client *client, const u8 reg, 136static int reg_write(struct i2c_client *client, const u8 reg,
138 const u16 data) 137 const u16 data)
139{ 138{
140 return i2c_smbus_write_word_data(client, reg, swab16(data)); 139 return i2c_smbus_write_word_swapped(client, reg, data);
141} 140}
142 141
143static int reg_set(struct i2c_client *client, const u8 reg, 142static int reg_set(struct i2c_client *client, const u8 reg,
diff --git a/drivers/media/video/mt9v032.c b/drivers/media/video/mt9v032.c
index f080c162123..d90b982cc21 100644
--- a/drivers/media/video/mt9v032.c
+++ b/drivers/media/video/mt9v032.c
@@ -139,10 +139,10 @@ static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
139 139
140static int mt9v032_read(struct i2c_client *client, const u8 reg) 140static int mt9v032_read(struct i2c_client *client, const u8 reg)
141{ 141{
142 s32 data = i2c_smbus_read_word_data(client, reg); 142 s32 data = i2c_smbus_read_word_swapped(client, reg);
143 dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__, 143 dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
144 swab16(data), reg); 144 data, reg);
145 return data < 0 ? data : swab16(data); 145 return data;
146} 146}
147 147
148static int mt9v032_write(struct i2c_client *client, const u8 reg, 148static int mt9v032_write(struct i2c_client *client, const u8 reg,
@@ -150,7 +150,7 @@ static int mt9v032_write(struct i2c_client *client, const u8 reg,
150{ 150{
151 dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__, 151 dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
152 data, reg); 152 data, reg);
153 return i2c_smbus_write_word_data(client, reg, swab16(data)); 153 return i2c_smbus_write_word_swapped(client, reg, data);
154} 154}
155 155
156static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set) 156static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c
index 18e94c7d2be..055d11ddb03 100644
--- a/drivers/media/video/mx1_camera.c
+++ b/drivers/media/video/mx1_camera.c
@@ -487,7 +487,7 @@ static int mx1_camera_set_crop(struct soc_camera_device *icd,
487 return v4l2_subdev_call(sd, video, s_crop, a); 487 return v4l2_subdev_call(sd, video, s_crop, a);
488} 488}
489 489
490static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) 490static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
491{ 491{
492 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 492 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
493 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 493 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c
index a803d9ea8fd..04aab0c538a 100644
--- a/drivers/media/video/mx2_camera.c
+++ b/drivers/media/video/mx2_camera.c
@@ -210,6 +210,22 @@
210 210
211#define MAX_VIDEO_MEM 16 211#define MAX_VIDEO_MEM 16
212 212
213struct mx2_prp_cfg {
214 int channel;
215 u32 in_fmt;
216 u32 out_fmt;
217 u32 src_pixel;
218 u32 ch1_pixel;
219 u32 irq_flags;
220};
221
222/* prp configuration for a client-host fmt pair */
223struct mx2_fmt_cfg {
224 enum v4l2_mbus_pixelcode in_fmt;
225 u32 out_fmt;
226 struct mx2_prp_cfg cfg;
227};
228
213struct mx2_camera_dev { 229struct mx2_camera_dev {
214 struct device *dev; 230 struct device *dev;
215 struct soc_camera_host soc_host; 231 struct soc_camera_host soc_host;
@@ -241,6 +257,8 @@ struct mx2_camera_dev {
241 void *discard_buffer; 257 void *discard_buffer;
242 dma_addr_t discard_buffer_dma; 258 dma_addr_t discard_buffer_dma;
243 size_t discard_size; 259 size_t discard_size;
260 struct mx2_fmt_cfg *emma_prp;
261 u32 frame_count;
244}; 262};
245 263
246/* buffer for one video frame */ 264/* buffer for one video frame */
@@ -253,6 +271,59 @@ struct mx2_buffer {
253 int bufnum; 271 int bufnum;
254}; 272};
255 273
274static struct mx2_fmt_cfg mx27_emma_prp_table[] = {
275 /*
276 * This is a generic configuration which is valid for most
277 * prp input-output format combinations.
278 * We set the incomming and outgoing pixelformat to a
279 * 16 Bit wide format and adjust the bytesperline
280 * accordingly. With this configuration the inputdata
281 * will not be changed by the emma and could be any type
282 * of 16 Bit Pixelformat.
283 */
284 {
285 .in_fmt = 0,
286 .out_fmt = 0,
287 .cfg = {
288 .channel = 1,
289 .in_fmt = PRP_CNTL_DATA_IN_RGB16,
290 .out_fmt = PRP_CNTL_CH1_OUT_RGB16,
291 .src_pixel = 0x2ca00565, /* RGB565 */
292 .ch1_pixel = 0x2ca00565, /* RGB565 */
293 .irq_flags = PRP_INTR_RDERR | PRP_INTR_CH1WERR |
294 PRP_INTR_CH1FC | PRP_INTR_LBOVF,
295 }
296 },
297 {
298 .in_fmt = V4L2_MBUS_FMT_YUYV8_2X8,
299 .out_fmt = V4L2_PIX_FMT_YUV420,
300 .cfg = {
301 .channel = 2,
302 .in_fmt = PRP_CNTL_DATA_IN_YUV422,
303 .out_fmt = PRP_CNTL_CH2_OUT_YUV420,
304 .src_pixel = 0x22000888, /* YUV422 (YUYV) */
305 .irq_flags = PRP_INTR_RDERR | PRP_INTR_CH2WERR |
306 PRP_INTR_CH2FC | PRP_INTR_LBOVF |
307 PRP_INTR_CH2OVF,
308 }
309 },
310};
311
312static struct mx2_fmt_cfg *mx27_emma_prp_get_format(
313 enum v4l2_mbus_pixelcode in_fmt,
314 u32 out_fmt)
315{
316 int i;
317
318 for (i = 1; i < ARRAY_SIZE(mx27_emma_prp_table); i++)
319 if ((mx27_emma_prp_table[i].in_fmt == in_fmt) &&
320 (mx27_emma_prp_table[i].out_fmt == out_fmt)) {
321 return &mx27_emma_prp_table[i];
322 }
323 /* If no match return the most generic configuration */
324 return &mx27_emma_prp_table[0];
325};
326
256static void mx2_camera_deactivate(struct mx2_camera_dev *pcdev) 327static void mx2_camera_deactivate(struct mx2_camera_dev *pcdev)
257{ 328{
258 unsigned long flags; 329 unsigned long flags;
@@ -301,6 +372,7 @@ static int mx2_camera_add_device(struct soc_camera_device *icd)
301 writel(pcdev->csicr1, pcdev->base_csi + CSICR1); 372 writel(pcdev->csicr1, pcdev->base_csi + CSICR1);
302 373
303 pcdev->icd = icd; 374 pcdev->icd = icd;
375 pcdev->frame_count = 0;
304 376
305 dev_info(icd->parent, "Camera driver attached to camera %d\n", 377 dev_info(icd->parent, "Camera driver attached to camera %d\n",
306 icd->devnum); 378 icd->devnum);
@@ -719,55 +791,77 @@ static void mx27_camera_emma_buf_init(struct soc_camera_device *icd,
719 struct soc_camera_host *ici = 791 struct soc_camera_host *ici =
720 to_soc_camera_host(icd->parent); 792 to_soc_camera_host(icd->parent);
721 struct mx2_camera_dev *pcdev = ici->priv; 793 struct mx2_camera_dev *pcdev = ici->priv;
794 struct mx2_fmt_cfg *prp = pcdev->emma_prp;
795 u32 imgsize = pcdev->icd->user_height * pcdev->icd->user_width;
796
797 if (prp->cfg.channel == 1) {
798 writel(pcdev->discard_buffer_dma,
799 pcdev->base_emma + PRP_DEST_RGB1_PTR);
800 writel(pcdev->discard_buffer_dma,
801 pcdev->base_emma + PRP_DEST_RGB2_PTR);
802
803 writel(PRP_CNTL_CH1EN |
804 PRP_CNTL_CSIEN |
805 prp->cfg.in_fmt |
806 prp->cfg.out_fmt |
807 PRP_CNTL_CH1_LEN |
808 PRP_CNTL_CH1BYP |
809 PRP_CNTL_CH1_TSKIP(0) |
810 PRP_CNTL_IN_TSKIP(0),
811 pcdev->base_emma + PRP_CNTL);
812
813 writel((icd->user_width << 16) | icd->user_height,
814 pcdev->base_emma + PRP_SRC_FRAME_SIZE);
815 writel((icd->user_width << 16) | icd->user_height,
816 pcdev->base_emma + PRP_CH1_OUT_IMAGE_SIZE);
817 writel(bytesperline,
818 pcdev->base_emma + PRP_DEST_CH1_LINE_STRIDE);
819 writel(prp->cfg.src_pixel,
820 pcdev->base_emma + PRP_SRC_PIXEL_FORMAT_CNTL);
821 writel(prp->cfg.ch1_pixel,
822 pcdev->base_emma + PRP_CH1_PIXEL_FORMAT_CNTL);
823 } else { /* channel 2 */
824 writel(pcdev->discard_buffer_dma,
825 pcdev->base_emma + PRP_DEST_Y_PTR);
826 writel(pcdev->discard_buffer_dma,
827 pcdev->base_emma + PRP_SOURCE_Y_PTR);
828
829 if (prp->cfg.out_fmt == PRP_CNTL_CH2_OUT_YUV420) {
830 writel(pcdev->discard_buffer_dma + imgsize,
831 pcdev->base_emma + PRP_DEST_CB_PTR);
832 writel(pcdev->discard_buffer_dma + ((5 * imgsize) / 4),
833 pcdev->base_emma + PRP_DEST_CR_PTR);
834 writel(pcdev->discard_buffer_dma + imgsize,
835 pcdev->base_emma + PRP_SOURCE_CB_PTR);
836 writel(pcdev->discard_buffer_dma + ((5 * imgsize) / 4),
837 pcdev->base_emma + PRP_SOURCE_CR_PTR);
838 }
722 839
723 writel(pcdev->discard_buffer_dma, 840 writel(PRP_CNTL_CH2EN |
724 pcdev->base_emma + PRP_DEST_RGB1_PTR);
725 writel(pcdev->discard_buffer_dma,
726 pcdev->base_emma + PRP_DEST_RGB2_PTR);
727
728 /*
729 * We only use the EMMA engine to get rid of the broken
730 * DMA Engine. No color space consversion at the moment.
731 * We set the incomming and outgoing pixelformat to an
732 * 16 Bit wide format and adjust the bytesperline
733 * accordingly. With this configuration the inputdata
734 * will not be changed by the emma and could be any type
735 * of 16 Bit Pixelformat.
736 */
737 writel(PRP_CNTL_CH1EN |
738 PRP_CNTL_CSIEN | 841 PRP_CNTL_CSIEN |
739 PRP_CNTL_DATA_IN_RGB16 | 842 prp->cfg.in_fmt |
740 PRP_CNTL_CH1_OUT_RGB16 | 843 prp->cfg.out_fmt |
741 PRP_CNTL_CH1_LEN | 844 PRP_CNTL_CH2_LEN |
742 PRP_CNTL_CH1BYP | 845 PRP_CNTL_CH2_TSKIP(0) |
743 PRP_CNTL_CH1_TSKIP(0) |
744 PRP_CNTL_IN_TSKIP(0), 846 PRP_CNTL_IN_TSKIP(0),
745 pcdev->base_emma + PRP_CNTL); 847 pcdev->base_emma + PRP_CNTL);
746 848
747 writel(((bytesperline >> 1) << 16) | icd->user_height, 849 writel((icd->user_width << 16) | icd->user_height,
748 pcdev->base_emma + PRP_SRC_FRAME_SIZE); 850 pcdev->base_emma + PRP_SRC_FRAME_SIZE);
749 writel(((bytesperline >> 1) << 16) | icd->user_height, 851
750 pcdev->base_emma + PRP_CH1_OUT_IMAGE_SIZE); 852 writel((icd->user_width << 16) | icd->user_height,
751 writel(bytesperline, 853 pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE);
752 pcdev->base_emma + PRP_DEST_CH1_LINE_STRIDE); 854
753 writel(0x2ca00565, /* RGB565 */ 855 writel(prp->cfg.src_pixel,
754 pcdev->base_emma + PRP_SRC_PIXEL_FORMAT_CNTL); 856 pcdev->base_emma + PRP_SRC_PIXEL_FORMAT_CNTL);
755 writel(0x2ca00565, /* RGB565 */ 857
756 pcdev->base_emma + PRP_CH1_PIXEL_FORMAT_CNTL); 858 }
757 859
758 /* Enable interrupts */ 860 /* Enable interrupts */
759 writel(PRP_INTR_RDERR | 861 writel(prp->cfg.irq_flags, pcdev->base_emma + PRP_INTR_CNTL);
760 PRP_INTR_CH1WERR |
761 PRP_INTR_CH2WERR |
762 PRP_INTR_CH1FC |
763 PRP_INTR_CH2FC |
764 PRP_INTR_LBOVF |
765 PRP_INTR_CH2OVF,
766 pcdev->base_emma + PRP_INTR_CNTL);
767} 862}
768 863
769static int mx2_camera_set_bus_param(struct soc_camera_device *icd, 864static int mx2_camera_set_bus_param(struct soc_camera_device *icd)
770 __u32 pixfmt)
771{ 865{
772 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 866 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
773 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 867 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
@@ -911,9 +1005,58 @@ static int mx2_camera_set_crop(struct soc_camera_device *icd,
911 return ret; 1005 return ret;
912} 1006}
913 1007
1008static int mx2_camera_get_formats(struct soc_camera_device *icd,
1009 unsigned int idx,
1010 struct soc_camera_format_xlate *xlate)
1011{
1012 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1013 const struct soc_mbus_pixelfmt *fmt;
1014 struct device *dev = icd->parent;
1015 enum v4l2_mbus_pixelcode code;
1016 int ret, formats = 0;
1017
1018 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
1019 if (ret < 0)
1020 /* no more formats */
1021 return 0;
1022
1023 fmt = soc_mbus_get_fmtdesc(code);
1024 if (!fmt) {
1025 dev_err(dev, "Invalid format code #%u: %d\n", idx, code);
1026 return 0;
1027 }
1028
1029 if (code == V4L2_MBUS_FMT_YUYV8_2X8) {
1030 formats++;
1031 if (xlate) {
1032 /*
1033 * CH2 can output YUV420 which is a standard format in
1034 * soc_mediabus.c
1035 */
1036 xlate->host_fmt =
1037 soc_mbus_get_fmtdesc(V4L2_MBUS_FMT_YUYV8_1_5X8);
1038 xlate->code = code;
1039 dev_dbg(dev, "Providing host format %s for sensor code %d\n",
1040 xlate->host_fmt->name, code);
1041 xlate++;
1042 }
1043 }
1044
1045 /* Generic pass-trough */
1046 formats++;
1047 if (xlate) {
1048 xlate->host_fmt = fmt;
1049 xlate->code = code;
1050 xlate++;
1051 }
1052 return formats;
1053}
1054
914static int mx2_camera_set_fmt(struct soc_camera_device *icd, 1055static int mx2_camera_set_fmt(struct soc_camera_device *icd,
915 struct v4l2_format *f) 1056 struct v4l2_format *f)
916{ 1057{
1058 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1059 struct mx2_camera_dev *pcdev = ici->priv;
917 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 1060 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
918 const struct soc_camera_format_xlate *xlate; 1061 const struct soc_camera_format_xlate *xlate;
919 struct v4l2_pix_format *pix = &f->fmt.pix; 1062 struct v4l2_pix_format *pix = &f->fmt.pix;
@@ -946,6 +1089,10 @@ static int mx2_camera_set_fmt(struct soc_camera_device *icd,
946 pix->colorspace = mf.colorspace; 1089 pix->colorspace = mf.colorspace;
947 icd->current_fmt = xlate; 1090 icd->current_fmt = xlate;
948 1091
1092 if (mx27_camera_emma(pcdev))
1093 pcdev->emma_prp = mx27_emma_prp_get_format(xlate->code,
1094 xlate->host_fmt->fourcc);
1095
949 return 0; 1096 return 0;
950} 1097}
951 1098
@@ -1011,7 +1158,12 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd,
1011 1158
1012 if (mf.field == V4L2_FIELD_ANY) 1159 if (mf.field == V4L2_FIELD_ANY)
1013 mf.field = V4L2_FIELD_NONE; 1160 mf.field = V4L2_FIELD_NONE;
1014 if (mf.field != V4L2_FIELD_NONE) { 1161 /*
1162 * Driver supports interlaced images provided they have
1163 * both fields so that they can be processed as if they
1164 * were progressive.
1165 */
1166 if (mf.field != V4L2_FIELD_NONE && !V4L2_FIELD_HAS_BOTH(mf.field)) {
1015 dev_err(icd->parent, "Field type %d unsupported.\n", 1167 dev_err(icd->parent, "Field type %d unsupported.\n",
1016 mf.field); 1168 mf.field);
1017 return -EINVAL; 1169 return -EINVAL;
@@ -1173,6 +1325,7 @@ static struct soc_camera_host_ops mx2_soc_camera_host_ops = {
1173 .remove = mx2_camera_remove_device, 1325 .remove = mx2_camera_remove_device,
1174 .set_fmt = mx2_camera_set_fmt, 1326 .set_fmt = mx2_camera_set_fmt,
1175 .set_crop = mx2_camera_set_crop, 1327 .set_crop = mx2_camera_set_crop,
1328 .get_formats = mx2_camera_get_formats,
1176 .try_fmt = mx2_camera_try_fmt, 1329 .try_fmt = mx2_camera_try_fmt,
1177 .init_videobuf = mx2_camera_init_videobuf, 1330 .init_videobuf = mx2_camera_init_videobuf,
1178 .reqbufs = mx2_camera_reqbufs, 1331 .reqbufs = mx2_camera_reqbufs,
@@ -1184,6 +1337,8 @@ static struct soc_camera_host_ops mx2_soc_camera_host_ops = {
1184static void mx27_camera_frame_done_emma(struct mx2_camera_dev *pcdev, 1337static void mx27_camera_frame_done_emma(struct mx2_camera_dev *pcdev,
1185 int bufnum, int state) 1338 int bufnum, int state)
1186{ 1339{
1340 u32 imgsize = pcdev->icd->user_height * pcdev->icd->user_width;
1341 struct mx2_fmt_cfg *prp = pcdev->emma_prp;
1187 struct mx2_buffer *buf; 1342 struct mx2_buffer *buf;
1188 struct videobuf_buffer *vb; 1343 struct videobuf_buffer *vb;
1189 unsigned long phys; 1344 unsigned long phys;
@@ -1197,12 +1352,22 @@ static void mx27_camera_frame_done_emma(struct mx2_camera_dev *pcdev,
1197 vb = &buf->vb; 1352 vb = &buf->vb;
1198#ifdef DEBUG 1353#ifdef DEBUG
1199 phys = videobuf_to_dma_contig(vb); 1354 phys = videobuf_to_dma_contig(vb);
1200 if (readl(pcdev->base_emma + PRP_DEST_RGB1_PTR + 4 * bufnum) 1355 if (prp->cfg.channel == 1) {
1201 != phys) { 1356 if (readl(pcdev->base_emma + PRP_DEST_RGB1_PTR +
1202 dev_err(pcdev->dev, "%p != %p\n", phys, 1357 4 * bufnum) != phys) {
1203 readl(pcdev->base_emma + 1358 dev_err(pcdev->dev, "%p != %p\n", phys,
1204 PRP_DEST_RGB1_PTR + 1359 readl(pcdev->base_emma +
1205 4 * bufnum)); 1360 PRP_DEST_RGB1_PTR +
1361 4 * bufnum));
1362 }
1363 } else {
1364 if (readl(pcdev->base_emma + PRP_DEST_Y_PTR -
1365 0x14 * bufnum) != phys) {
1366 dev_err(pcdev->dev, "%p != %p\n", phys,
1367 readl(pcdev->base_emma +
1368 PRP_DEST_Y_PTR -
1369 0x14 * bufnum));
1370 }
1206 } 1371 }
1207#endif 1372#endif
1208 dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, vb, 1373 dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, vb,
@@ -1211,14 +1376,29 @@ static void mx27_camera_frame_done_emma(struct mx2_camera_dev *pcdev,
1211 list_del(&vb->queue); 1376 list_del(&vb->queue);
1212 vb->state = state; 1377 vb->state = state;
1213 do_gettimeofday(&vb->ts); 1378 do_gettimeofday(&vb->ts);
1214 vb->field_count++; 1379 vb->field_count = pcdev->frame_count * 2;
1380 pcdev->frame_count++;
1215 1381
1216 wake_up(&vb->done); 1382 wake_up(&vb->done);
1217 } 1383 }
1218 1384
1219 if (list_empty(&pcdev->capture)) { 1385 if (list_empty(&pcdev->capture)) {
1220 writel(pcdev->discard_buffer_dma, pcdev->base_emma + 1386 if (prp->cfg.channel == 1) {
1221 PRP_DEST_RGB1_PTR + 4 * bufnum); 1387 writel(pcdev->discard_buffer_dma, pcdev->base_emma +
1388 PRP_DEST_RGB1_PTR + 4 * bufnum);
1389 } else {
1390 writel(pcdev->discard_buffer_dma, pcdev->base_emma +
1391 PRP_DEST_Y_PTR -
1392 0x14 * bufnum);
1393 if (prp->out_fmt == V4L2_PIX_FMT_YUV420) {
1394 writel(pcdev->discard_buffer_dma + imgsize,
1395 pcdev->base_emma + PRP_DEST_CB_PTR -
1396 0x14 * bufnum);
1397 writel(pcdev->discard_buffer_dma +
1398 ((5 * imgsize) / 4), pcdev->base_emma +
1399 PRP_DEST_CR_PTR - 0x14 * bufnum);
1400 }
1401 }
1222 return; 1402 return;
1223 } 1403 }
1224 1404
@@ -1233,7 +1413,18 @@ static void mx27_camera_frame_done_emma(struct mx2_camera_dev *pcdev,
1233 vb->state = VIDEOBUF_ACTIVE; 1413 vb->state = VIDEOBUF_ACTIVE;
1234 1414
1235 phys = videobuf_to_dma_contig(vb); 1415 phys = videobuf_to_dma_contig(vb);
1236 writel(phys, pcdev->base_emma + PRP_DEST_RGB1_PTR + 4 * bufnum); 1416 if (prp->cfg.channel == 1) {
1417 writel(phys, pcdev->base_emma + PRP_DEST_RGB1_PTR + 4 * bufnum);
1418 } else {
1419 writel(phys, pcdev->base_emma +
1420 PRP_DEST_Y_PTR - 0x14 * bufnum);
1421 if (prp->cfg.out_fmt == PRP_CNTL_CH2_OUT_YUV420) {
1422 writel(phys + imgsize, pcdev->base_emma +
1423 PRP_DEST_CB_PTR - 0x14 * bufnum);
1424 writel(phys + ((5 * imgsize) / 4), pcdev->base_emma +
1425 PRP_DEST_CR_PTR - 0x14 * bufnum);
1426 }
1427 }
1237} 1428}
1238 1429
1239static irqreturn_t mx27_camera_emma_irq(int irq_emma, void *data) 1430static irqreturn_t mx27_camera_emma_irq(int irq_emma, void *data)
@@ -1253,10 +1444,12 @@ static irqreturn_t mx27_camera_emma_irq(int irq_emma, void *data)
1253 * the next one. 1444 * the next one.
1254 */ 1445 */
1255 cntl = readl(pcdev->base_emma + PRP_CNTL); 1446 cntl = readl(pcdev->base_emma + PRP_CNTL);
1256 writel(cntl & ~PRP_CNTL_CH1EN, pcdev->base_emma + PRP_CNTL); 1447 writel(cntl & ~(PRP_CNTL_CH1EN | PRP_CNTL_CH2EN),
1448 pcdev->base_emma + PRP_CNTL);
1257 writel(cntl, pcdev->base_emma + PRP_CNTL); 1449 writel(cntl, pcdev->base_emma + PRP_CNTL);
1258 } 1450 }
1259 if ((status & (3 << 5)) == (3 << 5) 1451 if ((((status & (3 << 5)) == (3 << 5)) ||
1452 ((status & (3 << 3)) == (3 << 3)))
1260 && !list_empty(&pcdev->active_bufs)) { 1453 && !list_empty(&pcdev->active_bufs)) {
1261 /* 1454 /*
1262 * Both buffers have triggered, process the one we're expecting 1455 * Both buffers have triggered, process the one we're expecting
@@ -1267,9 +1460,9 @@ static irqreturn_t mx27_camera_emma_irq(int irq_emma, void *data)
1267 mx27_camera_frame_done_emma(pcdev, buf->bufnum, VIDEOBUF_DONE); 1460 mx27_camera_frame_done_emma(pcdev, buf->bufnum, VIDEOBUF_DONE);
1268 status &= ~(1 << (6 - buf->bufnum)); /* mark processed */ 1461 status &= ~(1 << (6 - buf->bufnum)); /* mark processed */
1269 } 1462 }
1270 if (status & (1 << 6)) 1463 if ((status & (1 << 6)) || (status & (1 << 4)))
1271 mx27_camera_frame_done_emma(pcdev, 0, VIDEOBUF_DONE); 1464 mx27_camera_frame_done_emma(pcdev, 0, VIDEOBUF_DONE);
1272 if (status & (1 << 5)) 1465 if ((status & (1 << 5)) || (status & (1 << 3)))
1273 mx27_camera_frame_done_emma(pcdev, 1, VIDEOBUF_DONE); 1466 mx27_camera_frame_done_emma(pcdev, 1, VIDEOBUF_DONE);
1274 1467
1275 writel(status, pcdev->base_emma + PRP_INTRSTATUS); 1468 writel(status, pcdev->base_emma + PRP_INTRSTATUS);
diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
index f96f92f00f9..0cb461dd396 100644
--- a/drivers/media/video/mx3_camera.c
+++ b/drivers/media/video/mx3_camera.c
@@ -982,12 +982,13 @@ static int mx3_camera_querycap(struct soc_camera_host *ici,
982 return 0; 982 return 0;
983} 983}
984 984
985static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) 985static int mx3_camera_set_bus_param(struct soc_camera_device *icd)
986{ 986{
987 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 987 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
988 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 988 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
989 struct mx3_camera_dev *mx3_cam = ici->priv; 989 struct mx3_camera_dev *mx3_cam = ici->priv;
990 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; 990 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
991 u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
991 unsigned long bus_flags, common_flags; 992 unsigned long bus_flags, common_flags;
992 u32 dw, sens_conf; 993 u32 dw, sens_conf;
993 const struct soc_mbus_pixelfmt *fmt; 994 const struct soc_mbus_pixelfmt *fmt;
@@ -1285,19 +1286,7 @@ static struct platform_driver mx3_camera_driver = {
1285 .remove = __devexit_p(mx3_camera_remove), 1286 .remove = __devexit_p(mx3_camera_remove),
1286}; 1287};
1287 1288
1288 1289module_platform_driver(mx3_camera_driver);
1289static int __init mx3_camera_init(void)
1290{
1291 return platform_driver_register(&mx3_camera_driver);
1292}
1293
1294static void __exit mx3_camera_exit(void)
1295{
1296 platform_driver_unregister(&mx3_camera_driver);
1297}
1298
1299module_init(mx3_camera_init);
1300module_exit(mx3_camera_exit);
1301 1290
1302MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver"); 1291MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1303MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>"); 1292MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c
index a378c2ce127..a277f95091e 100644
--- a/drivers/media/video/omap/omap_vout.c
+++ b/drivers/media/video/omap/omap_vout.c
@@ -524,10 +524,50 @@ static int omapvid_apply_changes(struct omap_vout_device *vout)
524 return 0; 524 return 0;
525} 525}
526 526
527static int omapvid_handle_interlace_display(struct omap_vout_device *vout,
528 unsigned int irqstatus, struct timeval timevalue)
529{
530 u32 fid;
531
532 if (vout->first_int) {
533 vout->first_int = 0;
534 goto err;
535 }
536
537 if (irqstatus & DISPC_IRQ_EVSYNC_ODD)
538 fid = 1;
539 else if (irqstatus & DISPC_IRQ_EVSYNC_EVEN)
540 fid = 0;
541 else
542 goto err;
543
544 vout->field_id ^= 1;
545 if (fid != vout->field_id) {
546 if (fid == 0)
547 vout->field_id = fid;
548 } else if (0 == fid) {
549 if (vout->cur_frm == vout->next_frm)
550 goto err;
551
552 vout->cur_frm->ts = timevalue;
553 vout->cur_frm->state = VIDEOBUF_DONE;
554 wake_up_interruptible(&vout->cur_frm->done);
555 vout->cur_frm = vout->next_frm;
556 } else {
557 if (list_empty(&vout->dma_queue) ||
558 (vout->cur_frm != vout->next_frm))
559 goto err;
560 }
561
562 return vout->field_id;
563err:
564 return 0;
565}
566
527static void omap_vout_isr(void *arg, unsigned int irqstatus) 567static void omap_vout_isr(void *arg, unsigned int irqstatus)
528{ 568{
529 int ret; 569 int ret, fid, mgr_id;
530 u32 addr, fid; 570 u32 addr, irq;
531 struct omap_overlay *ovl; 571 struct omap_overlay *ovl;
532 struct timeval timevalue; 572 struct timeval timevalue;
533 struct omapvideo_info *ovid; 573 struct omapvideo_info *ovid;
@@ -543,112 +583,73 @@ static void omap_vout_isr(void *arg, unsigned int irqstatus)
543 if (!ovl->manager || !ovl->manager->device) 583 if (!ovl->manager || !ovl->manager->device)
544 return; 584 return;
545 585
586 mgr_id = ovl->manager->id;
546 cur_display = ovl->manager->device; 587 cur_display = ovl->manager->device;
547 588
548 spin_lock(&vout->vbq_lock); 589 spin_lock(&vout->vbq_lock);
549 do_gettimeofday(&timevalue); 590 do_gettimeofday(&timevalue);
550 591
551 if (cur_display->type != OMAP_DISPLAY_TYPE_VENC) { 592 switch (cur_display->type) {
552 switch (cur_display->type) { 593 case OMAP_DISPLAY_TYPE_DSI:
553 case OMAP_DISPLAY_TYPE_DPI: 594 case OMAP_DISPLAY_TYPE_DPI:
554 if (!(irqstatus & (DISPC_IRQ_VSYNC | DISPC_IRQ_VSYNC2))) 595 if (mgr_id == OMAP_DSS_CHANNEL_LCD)
555 goto vout_isr_err; 596 irq = DISPC_IRQ_VSYNC;
556 break; 597 else if (mgr_id == OMAP_DSS_CHANNEL_LCD2)
557 case OMAP_DISPLAY_TYPE_HDMI: 598 irq = DISPC_IRQ_VSYNC2;
558 if (!(irqstatus & DISPC_IRQ_EVSYNC_EVEN)) 599 else
559 goto vout_isr_err;
560 break;
561 default:
562 goto vout_isr_err;
563 }
564 if (!vout->first_int && (vout->cur_frm != vout->next_frm)) {
565 vout->cur_frm->ts = timevalue;
566 vout->cur_frm->state = VIDEOBUF_DONE;
567 wake_up_interruptible(&vout->cur_frm->done);
568 vout->cur_frm = vout->next_frm;
569 }
570 vout->first_int = 0;
571 if (list_empty(&vout->dma_queue))
572 goto vout_isr_err; 600 goto vout_isr_err;
573 601
574 vout->next_frm = list_entry(vout->dma_queue.next, 602 if (!(irqstatus & irq))
575 struct videobuf_buffer, queue); 603 goto vout_isr_err;
576 list_del(&vout->next_frm->queue); 604 break;
577 605 case OMAP_DISPLAY_TYPE_VENC:
578 vout->next_frm->state = VIDEOBUF_ACTIVE; 606 fid = omapvid_handle_interlace_display(vout, irqstatus,
607 timevalue);
608 if (!fid)
609 goto vout_isr_err;
610 break;
611 case OMAP_DISPLAY_TYPE_HDMI:
612 if (!(irqstatus & DISPC_IRQ_EVSYNC_EVEN))
613 goto vout_isr_err;
614 break;
615 default:
616 goto vout_isr_err;
617 }
579 618
580 addr = (unsigned long) vout->queued_buf_addr[vout->next_frm->i] 619 if (!vout->first_int && (vout->cur_frm != vout->next_frm)) {
581 + vout->cropped_offset; 620 vout->cur_frm->ts = timevalue;
621 vout->cur_frm->state = VIDEOBUF_DONE;
622 wake_up_interruptible(&vout->cur_frm->done);
623 vout->cur_frm = vout->next_frm;
624 }
582 625
583 /* First save the configuration in ovelray structure */ 626 vout->first_int = 0;
584 ret = omapvid_init(vout, addr); 627 if (list_empty(&vout->dma_queue))
585 if (ret) 628 goto vout_isr_err;
586 printk(KERN_ERR VOUT_NAME
587 "failed to set overlay info\n");
588 /* Enable the pipeline and set the Go bit */
589 ret = omapvid_apply_changes(vout);
590 if (ret)
591 printk(KERN_ERR VOUT_NAME "failed to change mode\n");
592 } else {
593 629
594 if (vout->first_int) { 630 vout->next_frm = list_entry(vout->dma_queue.next,
595 vout->first_int = 0; 631 struct videobuf_buffer, queue);
596 goto vout_isr_err; 632 list_del(&vout->next_frm->queue);
597 }
598 if (irqstatus & DISPC_IRQ_EVSYNC_ODD)
599 fid = 1;
600 else if (irqstatus & DISPC_IRQ_EVSYNC_EVEN)
601 fid = 0;
602 else
603 goto vout_isr_err;
604 633
605 vout->field_id ^= 1; 634 vout->next_frm->state = VIDEOBUF_ACTIVE;
606 if (fid != vout->field_id) {
607 if (0 == fid)
608 vout->field_id = fid;
609 635
610 goto vout_isr_err; 636 addr = (unsigned long) vout->queued_buf_addr[vout->next_frm->i]
611 } 637 + vout->cropped_offset;
612 if (0 == fid) {
613 if (vout->cur_frm == vout->next_frm)
614 goto vout_isr_err;
615
616 vout->cur_frm->ts = timevalue;
617 vout->cur_frm->state = VIDEOBUF_DONE;
618 wake_up_interruptible(&vout->cur_frm->done);
619 vout->cur_frm = vout->next_frm;
620 } else if (1 == fid) {
621 if (list_empty(&vout->dma_queue) ||
622 (vout->cur_frm != vout->next_frm))
623 goto vout_isr_err;
624
625 vout->next_frm = list_entry(vout->dma_queue.next,
626 struct videobuf_buffer, queue);
627 list_del(&vout->next_frm->queue);
628
629 vout->next_frm->state = VIDEOBUF_ACTIVE;
630 addr = (unsigned long)
631 vout->queued_buf_addr[vout->next_frm->i] +
632 vout->cropped_offset;
633 /* First save the configuration in ovelray structure */
634 ret = omapvid_init(vout, addr);
635 if (ret)
636 printk(KERN_ERR VOUT_NAME
637 "failed to set overlay info\n");
638 /* Enable the pipeline and set the Go bit */
639 ret = omapvid_apply_changes(vout);
640 if (ret)
641 printk(KERN_ERR VOUT_NAME
642 "failed to change mode\n");
643 }
644 638
645 } 639 /* First save the configuration in ovelray structure */
640 ret = omapvid_init(vout, addr);
641 if (ret)
642 printk(KERN_ERR VOUT_NAME
643 "failed to set overlay info\n");
644 /* Enable the pipeline and set the Go bit */
645 ret = omapvid_apply_changes(vout);
646 if (ret)
647 printk(KERN_ERR VOUT_NAME "failed to change mode\n");
646 648
647vout_isr_err: 649vout_isr_err:
648 spin_unlock(&vout->vbq_lock); 650 spin_unlock(&vout->vbq_lock);
649} 651}
650 652
651
652/* Video buffer call backs */ 653/* Video buffer call backs */
653 654
654/* 655/*
@@ -664,10 +665,14 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count,
664 u32 phy_addr = 0, virt_addr = 0; 665 u32 phy_addr = 0, virt_addr = 0;
665 struct omap_vout_device *vout = q->priv_data; 666 struct omap_vout_device *vout = q->priv_data;
666 struct omapvideo_info *ovid = &vout->vid_info; 667 struct omapvideo_info *ovid = &vout->vid_info;
668 int vid_max_buf_size;
667 669
668 if (!vout) 670 if (!vout)
669 return -EINVAL; 671 return -EINVAL;
670 672
673 vid_max_buf_size = vout->vid == OMAP_VIDEO1 ? video1_bufsize :
674 video2_bufsize;
675
671 if (V4L2_BUF_TYPE_VIDEO_OUTPUT != q->type) 676 if (V4L2_BUF_TYPE_VIDEO_OUTPUT != q->type)
672 return -EINVAL; 677 return -EINVAL;
673 678
@@ -690,7 +695,7 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count,
690 video1_numbuffers : video2_numbuffers; 695 video1_numbuffers : video2_numbuffers;
691 696
692 /* Check the size of the buffer */ 697 /* Check the size of the buffer */
693 if (*size > vout->buffer_size) { 698 if (*size > vid_max_buf_size) {
694 v4l2_err(&vout->vid_dev->v4l2_dev, 699 v4l2_err(&vout->vid_dev->v4l2_dev,
695 "buffer allocation mismatch [%u] [%u]\n", 700 "buffer allocation mismatch [%u] [%u]\n",
696 *size, vout->buffer_size); 701 *size, vout->buffer_size);
diff --git a/drivers/media/video/omap/omap_voutdef.h b/drivers/media/video/omap/omap_voutdef.h
index d793501cafc..27a95d23b91 100644
--- a/drivers/media/video/omap/omap_voutdef.h
+++ b/drivers/media/video/omap/omap_voutdef.h
@@ -25,7 +25,7 @@
25#define MAC_VRFB_CTXS 4 25#define MAC_VRFB_CTXS 4
26#define MAX_VOUT_DEV 2 26#define MAX_VOUT_DEV 2
27#define MAX_OVLS 3 27#define MAX_OVLS 3
28#define MAX_DISPLAYS 3 28#define MAX_DISPLAYS 10
29#define MAX_MANAGERS 3 29#define MAX_MANAGERS 3
30 30
31#define QQVGA_WIDTH 160 31#define QQVGA_WIDTH 160
diff --git a/drivers/media/video/omap1_camera.c b/drivers/media/video/omap1_camera.c
index 6a6cf388bae..c20f5ecd679 100644
--- a/drivers/media/video/omap1_camera.c
+++ b/drivers/media/video/omap1_camera.c
@@ -1436,13 +1436,13 @@ static int omap1_cam_querycap(struct soc_camera_host *ici,
1436 return 0; 1436 return 0;
1437} 1437}
1438 1438
1439static int omap1_cam_set_bus_param(struct soc_camera_device *icd, 1439static int omap1_cam_set_bus_param(struct soc_camera_device *icd)
1440 __u32 pixfmt)
1441{ 1440{
1442 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 1441 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1443 struct device *dev = icd->parent; 1442 struct device *dev = icd->parent;
1444 struct soc_camera_host *ici = to_soc_camera_host(dev); 1443 struct soc_camera_host *ici = to_soc_camera_host(dev);
1445 struct omap1_cam_dev *pcdev = ici->priv; 1444 struct omap1_cam_dev *pcdev = ici->priv;
1445 u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
1446 const struct soc_camera_format_xlate *xlate; 1446 const struct soc_camera_format_xlate *xlate;
1447 const struct soc_mbus_pixelfmt *fmt; 1447 const struct soc_mbus_pixelfmt *fmt;
1448 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; 1448 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
@@ -1713,17 +1713,7 @@ static struct platform_driver omap1_cam_driver = {
1713 .remove = __exit_p(omap1_cam_remove), 1713 .remove = __exit_p(omap1_cam_remove),
1714}; 1714};
1715 1715
1716static int __init omap1_cam_init(void) 1716module_platform_driver(omap1_cam_driver);
1717{
1718 return platform_driver_register(&omap1_cam_driver);
1719}
1720module_init(omap1_cam_init);
1721
1722static void __exit omap1_cam_exit(void)
1723{
1724 platform_driver_unregister(&omap1_cam_driver);
1725}
1726module_exit(omap1_cam_exit);
1727 1717
1728module_param(sg_mode, bool, 0644); 1718module_param(sg_mode, bool, 0644);
1729MODULE_PARM_DESC(sg_mode, "videobuf mode, 0: dma-contig (default), 1: dma-sg"); 1719MODULE_PARM_DESC(sg_mode, "videobuf mode, 0: dma-contig (default), 1: dma-sg");
diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c
index 45522e60318..7d386414436 100644
--- a/drivers/media/video/omap24xxcam.c
+++ b/drivers/media/video/omap24xxcam.c
@@ -1868,21 +1868,7 @@ static struct platform_driver omap24xxcam_driver = {
1868 }, 1868 },
1869}; 1869};
1870 1870
1871/* 1871module_platform_driver(omap24xxcam_driver);
1872 *
1873 * Module initialisation and deinitialisation
1874 *
1875 */
1876
1877static int __init omap24xxcam_init(void)
1878{
1879 return platform_driver_register(&omap24xxcam_driver);
1880}
1881
1882static void __exit omap24xxcam_cleanup(void)
1883{
1884 platform_driver_unregister(&omap24xxcam_driver);
1885}
1886 1872
1887MODULE_AUTHOR("Sakari Ailus <sakari.ailus@nokia.com>"); 1873MODULE_AUTHOR("Sakari Ailus <sakari.ailus@nokia.com>");
1888MODULE_DESCRIPTION("OMAP24xx Video for Linux camera driver"); 1874MODULE_DESCRIPTION("OMAP24xx Video for Linux camera driver");
@@ -1894,6 +1880,3 @@ MODULE_PARM_DESC(video_nr,
1894module_param(capture_mem, int, 0); 1880module_param(capture_mem, int, 0);
1895MODULE_PARM_DESC(capture_mem, "Maximum amount of memory for capture " 1881MODULE_PARM_DESC(capture_mem, "Maximum amount of memory for capture "
1896 "buffers (default 4800kiB)"); 1882 "buffers (default 4800kiB)");
1897
1898module_init(omap24xxcam_init);
1899module_exit(omap24xxcam_cleanup);
diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c
index d4c48ef227f..12d5f923e1d 100644
--- a/drivers/media/video/omap3isp/isp.c
+++ b/drivers/media/video/omap3isp/isp.c
@@ -403,6 +403,7 @@ static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
403static void isp_isr_sbl(struct isp_device *isp) 403static void isp_isr_sbl(struct isp_device *isp)
404{ 404{
405 struct device *dev = isp->dev; 405 struct device *dev = isp->dev;
406 struct isp_pipeline *pipe;
406 u32 sbl_pcr; 407 u32 sbl_pcr;
407 408
408 /* 409 /*
@@ -416,27 +417,38 @@ static void isp_isr_sbl(struct isp_device *isp)
416 if (sbl_pcr) 417 if (sbl_pcr)
417 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr); 418 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
418 419
419 if (sbl_pcr & (ISPSBL_PCR_CCDC_WBL_OVF | ISPSBL_PCR_CSIA_WBL_OVF 420 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
420 | ISPSBL_PCR_CSIB_WBL_OVF)) { 421 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
421 isp->isp_ccdc.error = 1; 422 if (pipe != NULL)
422 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW) 423 pipe->error = true;
423 isp->isp_prev.error = 1; 424 }
424 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER) 425
425 isp->isp_res.error = 1; 426 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
428 if (pipe != NULL)
429 pipe->error = true;
430 }
431
432 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
433 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
434 if (pipe != NULL)
435 pipe->error = true;
426 } 436 }
427 437
428 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) { 438 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
429 isp->isp_prev.error = 1; 439 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
430 if (isp->isp_res.input == RESIZER_INPUT_VP && 440 if (pipe != NULL)
431 !(isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)) 441 pipe->error = true;
432 isp->isp_res.error = 1;
433 } 442 }
434 443
435 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF 444 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
436 | ISPSBL_PCR_RSZ2_WBL_OVF 445 | ISPSBL_PCR_RSZ2_WBL_OVF
437 | ISPSBL_PCR_RSZ3_WBL_OVF 446 | ISPSBL_PCR_RSZ3_WBL_OVF
438 | ISPSBL_PCR_RSZ4_WBL_OVF)) 447 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
439 isp->isp_res.error = 1; 448 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
449 if (pipe != NULL)
450 pipe->error = true;
451 }
440 452
441 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF) 453 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
442 omap3isp_stat_sbl_overflow(&isp->isp_af); 454 omap3isp_stat_sbl_overflow(&isp->isp_af);
@@ -464,24 +476,17 @@ static irqreturn_t isp_isr(int irq, void *_isp)
464 IRQ0STATUS_HS_VS_IRQ; 476 IRQ0STATUS_HS_VS_IRQ;
465 struct isp_device *isp = _isp; 477 struct isp_device *isp = _isp;
466 u32 irqstatus; 478 u32 irqstatus;
467 int ret;
468 479
469 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 480 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
470 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 481 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
471 482
472 isp_isr_sbl(isp); 483 isp_isr_sbl(isp);
473 484
474 if (irqstatus & IRQ0STATUS_CSIA_IRQ) { 485 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
475 ret = omap3isp_csi2_isr(&isp->isp_csi2a); 486 omap3isp_csi2_isr(&isp->isp_csi2a);
476 if (ret)
477 isp->isp_ccdc.error = 1;
478 }
479 487
480 if (irqstatus & IRQ0STATUS_CSIB_IRQ) { 488 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
481 ret = omap3isp_ccp2_isr(&isp->isp_ccp2); 489 omap3isp_ccp2_isr(&isp->isp_ccp2);
482 if (ret)
483 isp->isp_ccdc.error = 1;
484 }
485 490
486 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) { 491 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
487 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW) 492 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
@@ -2222,24 +2227,7 @@ static struct platform_driver omap3isp_driver = {
2222 }, 2227 },
2223}; 2228};
2224 2229
2225/* 2230module_platform_driver(omap3isp_driver);
2226 * isp_init - ISP module initialization.
2227 */
2228static int __init isp_init(void)
2229{
2230 return platform_driver_register(&omap3isp_driver);
2231}
2232
2233/*
2234 * isp_cleanup - ISP module cleanup.
2235 */
2236static void __exit isp_cleanup(void)
2237{
2238 platform_driver_unregister(&omap3isp_driver);
2239}
2240
2241module_init(isp_init);
2242module_exit(isp_cleanup);
2243 2231
2244MODULE_AUTHOR("Nokia Corporation"); 2232MODULE_AUTHOR("Nokia Corporation");
2245MODULE_DESCRIPTION("TI OMAP3 ISP driver"); 2233MODULE_DESCRIPTION("TI OMAP3 ISP driver");
diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c
index d341ba12593..a74a79701d3 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -1406,9 +1406,8 @@ static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1406 1406
1407static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc) 1407static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1408{ 1408{
1409 struct isp_pipeline *pipe = 1409 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1410 to_isp_pipeline(&ccdc->video_out.video.entity); 1410 struct video_device *vdev = &ccdc->subdev.devnode;
1411 struct video_device *vdev = ccdc->subdev.devnode;
1412 struct v4l2_event event; 1411 struct v4l2_event event;
1413 1412
1414 memset(&event, 0, sizeof(event)); 1413 memset(&event, 0, sizeof(event));
@@ -1428,8 +1427,11 @@ static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1428 unsigned long flags; 1427 unsigned long flags;
1429 1428
1430 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) { 1429 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1430 struct isp_pipeline *pipe =
1431 to_isp_pipeline(&ccdc->subdev.entity);
1432
1431 ccdc_lsc_error_handler(ccdc); 1433 ccdc_lsc_error_handler(ccdc);
1432 ccdc->error = 1; 1434 pipe->error = true;
1433 dev_dbg(to_device(ccdc), "lsc prefetch error\n"); 1435 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1434 } 1436 }
1435 1437
@@ -1504,7 +1506,7 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1504 goto done; 1506 goto done;
1505 } 1507 }
1506 1508
1507 buffer = omap3isp_video_buffer_next(&ccdc->video_out, ccdc->error); 1509 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1508 if (buffer != NULL) { 1510 if (buffer != NULL) {
1509 ccdc_set_outaddr(ccdc, buffer->isp_addr); 1511 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1510 restart = 1; 1512 restart = 1;
@@ -1518,7 +1520,6 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1518 ISP_PIPELINE_STREAM_SINGLESHOT); 1520 ISP_PIPELINE_STREAM_SINGLESHOT);
1519 1521
1520done: 1522done:
1521 ccdc->error = 0;
1522 return restart; 1523 return restart;
1523} 1524}
1524 1525
@@ -1744,7 +1745,6 @@ static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1744 */ 1745 */
1745 ccdc_config_vp(ccdc); 1746 ccdc_config_vp(ccdc);
1746 ccdc_enable_vp(ccdc, 1); 1747 ccdc_enable_vp(ccdc, 1);
1747 ccdc->error = 0;
1748 ccdc_print_status(ccdc); 1748 ccdc_print_status(ccdc);
1749 } 1749 }
1750 1750
diff --git a/drivers/media/video/omap3isp/ispccdc.h b/drivers/media/video/omap3isp/ispccdc.h
index 483a19cac1a..6d0264bab75 100644
--- a/drivers/media/video/omap3isp/ispccdc.h
+++ b/drivers/media/video/omap3isp/ispccdc.h
@@ -150,7 +150,6 @@ struct ispccdc_lsc {
150 * @input: Active input 150 * @input: Active input
151 * @output: Active outputs 151 * @output: Active outputs
152 * @video_out: Output video node 152 * @video_out: Output video node
153 * @error: A hardware error occurred during capture
154 * @alaw: A-law compression enabled (1) or disabled (0) 153 * @alaw: A-law compression enabled (1) or disabled (0)
155 * @lpf: Low pass filter enabled (1) or disabled (0) 154 * @lpf: Low pass filter enabled (1) or disabled (0)
156 * @obclamp: Optical-black clamp enabled (1) or disabled (0) 155 * @obclamp: Optical-black clamp enabled (1) or disabled (0)
@@ -178,7 +177,6 @@ struct isp_ccdc_device {
178 enum ccdc_input_entity input; 177 enum ccdc_input_entity input;
179 unsigned int output; 178 unsigned int output;
180 struct isp_video video_out; 179 struct isp_video video_out;
181 unsigned int error;
182 180
183 unsigned int alaw:1, 181 unsigned int alaw:1,
184 lpf:1, 182 lpf:1,
diff --git a/drivers/media/video/omap3isp/ispccp2.c b/drivers/media/video/omap3isp/ispccp2.c
index 904ca8c8b17..70ddbf35b22 100644
--- a/drivers/media/video/omap3isp/ispccp2.c
+++ b/drivers/media/video/omap3isp/ispccp2.c
@@ -556,7 +556,7 @@ static void ccp2_isr_buffer(struct isp_ccp2_device *ccp2)
556 struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity); 556 struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity);
557 struct isp_buffer *buffer; 557 struct isp_buffer *buffer;
558 558
559 buffer = omap3isp_video_buffer_next(&ccp2->video_in, ccp2->error); 559 buffer = omap3isp_video_buffer_next(&ccp2->video_in);
560 if (buffer != NULL) 560 if (buffer != NULL)
561 ccp2_set_inaddr(ccp2, buffer->isp_addr); 561 ccp2_set_inaddr(ccp2, buffer->isp_addr);
562 562
@@ -567,8 +567,6 @@ static void ccp2_isr_buffer(struct isp_ccp2_device *ccp2)
567 omap3isp_pipeline_set_stream(pipe, 567 omap3isp_pipeline_set_stream(pipe,
568 ISP_PIPELINE_STREAM_SINGLESHOT); 568 ISP_PIPELINE_STREAM_SINGLESHOT);
569 } 569 }
570
571 ccp2->error = 0;
572} 570}
573 571
574/* 572/*
@@ -576,13 +574,11 @@ static void ccp2_isr_buffer(struct isp_ccp2_device *ccp2)
576 * @ccp2: Pointer to ISP CCP2 device 574 * @ccp2: Pointer to ISP CCP2 device
577 * 575 *
578 * This will handle the CCP2 interrupts 576 * This will handle the CCP2 interrupts
579 *
580 * Returns -EIO in case of error, or 0 on success.
581 */ 577 */
582int omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2) 578void omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2)
583{ 579{
580 struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity);
584 struct isp_device *isp = to_isp_device(ccp2); 581 struct isp_device *isp = to_isp_device(ccp2);
585 int ret = 0;
586 static const u32 ISPCCP2_LC01_ERROR = 582 static const u32 ISPCCP2_LC01_ERROR =
587 ISPCCP2_LC01_IRQSTATUS_LC0_FIFO_OVF_IRQ | 583 ISPCCP2_LC01_IRQSTATUS_LC0_FIFO_OVF_IRQ |
588 ISPCCP2_LC01_IRQSTATUS_LC0_CRC_IRQ | 584 ISPCCP2_LC01_IRQSTATUS_LC0_CRC_IRQ |
@@ -604,19 +600,18 @@ int omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2)
604 ISPCCP2_LCM_IRQSTATUS); 600 ISPCCP2_LCM_IRQSTATUS);
605 /* Errors */ 601 /* Errors */
606 if (lcx_irqstatus & ISPCCP2_LC01_ERROR) { 602 if (lcx_irqstatus & ISPCCP2_LC01_ERROR) {
607 ccp2->error = 1; 603 pipe->error = true;
608 dev_dbg(isp->dev, "CCP2 err:%x\n", lcx_irqstatus); 604 dev_dbg(isp->dev, "CCP2 err:%x\n", lcx_irqstatus);
609 return -EIO; 605 return;
610 } 606 }
611 607
612 if (lcm_irqstatus & ISPCCP2_LCM_IRQSTATUS_OCPERROR_IRQ) { 608 if (lcm_irqstatus & ISPCCP2_LCM_IRQSTATUS_OCPERROR_IRQ) {
613 ccp2->error = 1; 609 pipe->error = true;
614 dev_dbg(isp->dev, "CCP2 OCP err:%x\n", lcm_irqstatus); 610 dev_dbg(isp->dev, "CCP2 OCP err:%x\n", lcm_irqstatus);
615 ret = -EIO;
616 } 611 }
617 612
618 if (omap3isp_module_sync_is_stopping(&ccp2->wait, &ccp2->stopping)) 613 if (omap3isp_module_sync_is_stopping(&ccp2->wait, &ccp2->stopping))
619 return 0; 614 return;
620 615
621 /* Frame number propagation */ 616 /* Frame number propagation */
622 if (lcx_irqstatus & ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ) { 617 if (lcx_irqstatus & ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ) {
@@ -629,8 +624,6 @@ int omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2)
629 /* Handle queued buffers on frame end interrupts */ 624 /* Handle queued buffers on frame end interrupts */
630 if (lcm_irqstatus & ISPCCP2_LCM_IRQSTATUS_EOF_IRQ) 625 if (lcm_irqstatus & ISPCCP2_LCM_IRQSTATUS_EOF_IRQ)
631 ccp2_isr_buffer(ccp2); 626 ccp2_isr_buffer(ccp2);
632
633 return ret;
634} 627}
635 628
636/* ----------------------------------------------------------------------------- 629/* -----------------------------------------------------------------------------
@@ -867,7 +860,6 @@ static int ccp2_s_stream(struct v4l2_subdev *sd, int enable)
867 if (enable == ISP_PIPELINE_STREAM_STOPPED) 860 if (enable == ISP_PIPELINE_STREAM_STOPPED)
868 return 0; 861 return 0;
869 atomic_set(&ccp2->stopping, 0); 862 atomic_set(&ccp2->stopping, 0);
870 ccp2->error = 0;
871 } 863 }
872 864
873 switch (enable) { 865 switch (enable) {
diff --git a/drivers/media/video/omap3isp/ispccp2.h b/drivers/media/video/omap3isp/ispccp2.h
index 6674e9de2cd..76d65f4576e 100644
--- a/drivers/media/video/omap3isp/ispccp2.h
+++ b/drivers/media/video/omap3isp/ispccp2.h
@@ -82,7 +82,6 @@ struct isp_ccp2_device {
82 struct isp_video video_in; 82 struct isp_video video_in;
83 struct isp_csiphy *phy; 83 struct isp_csiphy *phy;
84 struct regulator *vdds_csib; 84 struct regulator *vdds_csib;
85 unsigned int error;
86 enum isp_pipeline_stream_state state; 85 enum isp_pipeline_stream_state state;
87 wait_queue_head_t wait; 86 wait_queue_head_t wait;
88 atomic_t stopping; 87 atomic_t stopping;
@@ -94,6 +93,6 @@ void omap3isp_ccp2_cleanup(struct isp_device *isp);
94int omap3isp_ccp2_register_entities(struct isp_ccp2_device *ccp2, 93int omap3isp_ccp2_register_entities(struct isp_ccp2_device *ccp2,
95 struct v4l2_device *vdev); 94 struct v4l2_device *vdev);
96void omap3isp_ccp2_unregister_entities(struct isp_ccp2_device *ccp2); 95void omap3isp_ccp2_unregister_entities(struct isp_ccp2_device *ccp2);
97int omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2); 96void omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2);
98 97
99#endif /* OMAP3_ISP_CCP2_H */ 98#endif /* OMAP3_ISP_CCP2_H */
diff --git a/drivers/media/video/omap3isp/ispcsi2.c b/drivers/media/video/omap3isp/ispcsi2.c
index 0c5f1cb9d99..fcb5168996a 100644
--- a/drivers/media/video/omap3isp/ispcsi2.c
+++ b/drivers/media/video/omap3isp/ispcsi2.c
@@ -667,7 +667,7 @@ static void csi2_isr_buffer(struct isp_csi2_device *csi2)
667 667
668 csi2_ctx_enable(isp, csi2, 0, 0); 668 csi2_ctx_enable(isp, csi2, 0, 0);
669 669
670 buffer = omap3isp_video_buffer_next(&csi2->video_out, 0); 670 buffer = omap3isp_video_buffer_next(&csi2->video_out);
671 671
672 /* 672 /*
673 * Let video queue operation restart engine if there is an underrun 673 * Let video queue operation restart engine if there is an underrun
@@ -727,17 +727,15 @@ static void csi2_isr_ctx(struct isp_csi2_device *csi2,
727 727
728/* 728/*
729 * omap3isp_csi2_isr - CSI2 interrupt handling. 729 * omap3isp_csi2_isr - CSI2 interrupt handling.
730 *
731 * Return -EIO on Transmission error
732 */ 730 */
733int omap3isp_csi2_isr(struct isp_csi2_device *csi2) 731void omap3isp_csi2_isr(struct isp_csi2_device *csi2)
734{ 732{
733 struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity);
735 u32 csi2_irqstatus, cpxio1_irqstatus; 734 u32 csi2_irqstatus, cpxio1_irqstatus;
736 struct isp_device *isp = csi2->isp; 735 struct isp_device *isp = csi2->isp;
737 int retval = 0;
738 736
739 if (!csi2->available) 737 if (!csi2->available)
740 return -ENODEV; 738 return;
741 739
742 csi2_irqstatus = isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQSTATUS); 740 csi2_irqstatus = isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQSTATUS);
743 isp_reg_writel(isp, csi2_irqstatus, csi2->regs1, ISPCSI2_IRQSTATUS); 741 isp_reg_writel(isp, csi2_irqstatus, csi2->regs1, ISPCSI2_IRQSTATUS);
@@ -750,7 +748,7 @@ int omap3isp_csi2_isr(struct isp_csi2_device *csi2)
750 csi2->regs1, ISPCSI2_PHY_IRQSTATUS); 748 csi2->regs1, ISPCSI2_PHY_IRQSTATUS);
751 dev_dbg(isp->dev, "CSI2: ComplexIO Error IRQ " 749 dev_dbg(isp->dev, "CSI2: ComplexIO Error IRQ "
752 "%x\n", cpxio1_irqstatus); 750 "%x\n", cpxio1_irqstatus);
753 retval = -EIO; 751 pipe->error = true;
754 } 752 }
755 753
756 if (csi2_irqstatus & (ISPCSI2_IRQSTATUS_OCP_ERR_IRQ | 754 if (csi2_irqstatus & (ISPCSI2_IRQSTATUS_OCP_ERR_IRQ |
@@ -775,11 +773,11 @@ int omap3isp_csi2_isr(struct isp_csi2_device *csi2)
775 ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ) ? 1 : 0, 773 ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ) ? 1 : 0,
776 (csi2_irqstatus & 774 (csi2_irqstatus &
777 ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ) ? 1 : 0); 775 ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ) ? 1 : 0);
778 retval = -EIO; 776 pipe->error = true;
779 } 777 }
780 778
781 if (omap3isp_module_sync_is_stopping(&csi2->wait, &csi2->stopping)) 779 if (omap3isp_module_sync_is_stopping(&csi2->wait, &csi2->stopping))
782 return 0; 780 return;
783 781
784 /* Successful cases */ 782 /* Successful cases */
785 if (csi2_irqstatus & ISPCSI2_IRQSTATUS_CONTEXT(0)) 783 if (csi2_irqstatus & ISPCSI2_IRQSTATUS_CONTEXT(0))
@@ -787,8 +785,6 @@ int omap3isp_csi2_isr(struct isp_csi2_device *csi2)
787 785
788 if (csi2_irqstatus & ISPCSI2_IRQSTATUS_ECC_CORRECTION_IRQ) 786 if (csi2_irqstatus & ISPCSI2_IRQSTATUS_ECC_CORRECTION_IRQ)
789 dev_dbg(isp->dev, "CSI2: ECC correction done\n"); 787 dev_dbg(isp->dev, "CSI2: ECC correction done\n");
790
791 return retval;
792} 788}
793 789
794/* ----------------------------------------------------------------------------- 790/* -----------------------------------------------------------------------------
diff --git a/drivers/media/video/omap3isp/ispcsi2.h b/drivers/media/video/omap3isp/ispcsi2.h
index 456fb7fb8a0..885ad79a767 100644
--- a/drivers/media/video/omap3isp/ispcsi2.h
+++ b/drivers/media/video/omap3isp/ispcsi2.h
@@ -156,7 +156,7 @@ struct isp_csi2_device {
156 atomic_t stopping; 156 atomic_t stopping;
157}; 157};
158 158
159int omap3isp_csi2_isr(struct isp_csi2_device *csi2); 159void omap3isp_csi2_isr(struct isp_csi2_device *csi2);
160int omap3isp_csi2_reset(struct isp_csi2_device *csi2); 160int omap3isp_csi2_reset(struct isp_csi2_device *csi2);
161int omap3isp_csi2_init(struct isp_device *isp); 161int omap3isp_csi2_init(struct isp_device *isp);
162void omap3isp_csi2_cleanup(struct isp_device *isp); 162void omap3isp_csi2_cleanup(struct isp_device *isp);
diff --git a/drivers/media/video/omap3isp/isppreview.c b/drivers/media/video/omap3isp/isppreview.c
index ccb876fe023..6d0fb2c8c26 100644
--- a/drivers/media/video/omap3isp/isppreview.c
+++ b/drivers/media/video/omap3isp/isppreview.c
@@ -116,11 +116,11 @@ static struct omap3isp_prev_csc flr_prev_csc = {
116#define PREV_MIN_IN_HEIGHT 8 116#define PREV_MIN_IN_HEIGHT 8
117#define PREV_MAX_IN_HEIGHT 16384 117#define PREV_MAX_IN_HEIGHT 16384
118 118
119#define PREV_MIN_OUT_WIDTH 0 119#define PREV_MIN_OUT_WIDTH 0
120#define PREV_MIN_OUT_HEIGHT 0 120#define PREV_MIN_OUT_HEIGHT 0
121#define PREV_MAX_OUT_WIDTH 1280 121#define PREV_MAX_OUT_WIDTH_REV_1 1280
122#define PREV_MAX_OUT_WIDTH_ES2 3300 122#define PREV_MAX_OUT_WIDTH_REV_2 3300
123#define PREV_MAX_OUT_WIDTH_3630 4096 123#define PREV_MAX_OUT_WIDTH_REV_15 4096
124 124
125/* 125/*
126 * Coeficient Tables for the submodules in Preview. 126 * Coeficient Tables for the submodules in Preview.
@@ -1306,14 +1306,14 @@ static unsigned int preview_max_out_width(struct isp_prev_device *prev)
1306 1306
1307 switch (isp->revision) { 1307 switch (isp->revision) {
1308 case ISP_REVISION_1_0: 1308 case ISP_REVISION_1_0:
1309 return PREV_MAX_OUT_WIDTH; 1309 return PREV_MAX_OUT_WIDTH_REV_1;
1310 1310
1311 case ISP_REVISION_2_0: 1311 case ISP_REVISION_2_0:
1312 default: 1312 default:
1313 return PREV_MAX_OUT_WIDTH_ES2; 1313 return PREV_MAX_OUT_WIDTH_REV_2;
1314 1314
1315 case ISP_REVISION_15_0: 1315 case ISP_REVISION_15_0:
1316 return PREV_MAX_OUT_WIDTH_3630; 1316 return PREV_MAX_OUT_WIDTH_REV_15;
1317 } 1317 }
1318} 1318}
1319 1319
@@ -1404,16 +1404,14 @@ static void preview_isr_buffer(struct isp_prev_device *prev)
1404 int restart = 0; 1404 int restart = 0;
1405 1405
1406 if (prev->input == PREVIEW_INPUT_MEMORY) { 1406 if (prev->input == PREVIEW_INPUT_MEMORY) {
1407 buffer = omap3isp_video_buffer_next(&prev->video_in, 1407 buffer = omap3isp_video_buffer_next(&prev->video_in);
1408 prev->error);
1409 if (buffer != NULL) 1408 if (buffer != NULL)
1410 preview_set_inaddr(prev, buffer->isp_addr); 1409 preview_set_inaddr(prev, buffer->isp_addr);
1411 pipe->state |= ISP_PIPELINE_IDLE_INPUT; 1410 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
1412 } 1411 }
1413 1412
1414 if (prev->output & PREVIEW_OUTPUT_MEMORY) { 1413 if (prev->output & PREVIEW_OUTPUT_MEMORY) {
1415 buffer = omap3isp_video_buffer_next(&prev->video_out, 1414 buffer = omap3isp_video_buffer_next(&prev->video_out);
1416 prev->error);
1417 if (buffer != NULL) { 1415 if (buffer != NULL) {
1418 preview_set_outaddr(prev, buffer->isp_addr); 1416 preview_set_outaddr(prev, buffer->isp_addr);
1419 restart = 1; 1417 restart = 1;
@@ -1440,8 +1438,6 @@ static void preview_isr_buffer(struct isp_prev_device *prev)
1440 default: 1438 default:
1441 return; 1439 return;
1442 } 1440 }
1443
1444 prev->error = 0;
1445} 1441}
1446 1442
1447/* 1443/*
@@ -1565,7 +1561,6 @@ static int preview_set_stream(struct v4l2_subdev *sd, int enable)
1565 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_PREVIEW); 1561 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1566 preview_configure(prev); 1562 preview_configure(prev);
1567 atomic_set(&prev->stopping, 0); 1563 atomic_set(&prev->stopping, 0);
1568 prev->error = 0;
1569 preview_print_status(prev); 1564 preview_print_status(prev);
1570 } 1565 }
1571 1566
diff --git a/drivers/media/video/omap3isp/isppreview.h b/drivers/media/video/omap3isp/isppreview.h
index f54e775c2df..09686607973 100644
--- a/drivers/media/video/omap3isp/isppreview.h
+++ b/drivers/media/video/omap3isp/isppreview.h
@@ -157,7 +157,6 @@ struct isptables_update {
157 * @output: Bitmask of the active output 157 * @output: Bitmask of the active output
158 * @video_in: Input video entity 158 * @video_in: Input video entity
159 * @video_out: Output video entity 159 * @video_out: Output video entity
160 * @error: A hardware error occurred during capture
161 * @params: Module configuration data 160 * @params: Module configuration data
162 * @shadow_update: If set, update the hardware configured in the next interrupt 161 * @shadow_update: If set, update the hardware configured in the next interrupt
163 * @underrun: Whether the preview entity has queued buffers on the output 162 * @underrun: Whether the preview entity has queued buffers on the output
@@ -179,7 +178,6 @@ struct isp_prev_device {
179 unsigned int output; 178 unsigned int output;
180 struct isp_video video_in; 179 struct isp_video video_in;
181 struct isp_video video_out; 180 struct isp_video video_out;
182 unsigned int error;
183 181
184 struct prev_params params; 182 struct prev_params params;
185 unsigned int shadow_update:1; 183 unsigned int shadow_update:1;
diff --git a/drivers/media/video/omap3isp/ispresizer.c b/drivers/media/video/omap3isp/ispresizer.c
index 50e593bfcfa..6958a9e3dc2 100644
--- a/drivers/media/video/omap3isp/ispresizer.c
+++ b/drivers/media/video/omap3isp/ispresizer.c
@@ -1038,7 +1038,7 @@ static void resizer_isr_buffer(struct isp_res_device *res)
1038 /* Complete the output buffer and, if reading from memory, the input 1038 /* Complete the output buffer and, if reading from memory, the input
1039 * buffer. 1039 * buffer.
1040 */ 1040 */
1041 buffer = omap3isp_video_buffer_next(&res->video_out, res->error); 1041 buffer = omap3isp_video_buffer_next(&res->video_out);
1042 if (buffer != NULL) { 1042 if (buffer != NULL) {
1043 resizer_set_outaddr(res, buffer->isp_addr); 1043 resizer_set_outaddr(res, buffer->isp_addr);
1044 restart = 1; 1044 restart = 1;
@@ -1047,7 +1047,7 @@ static void resizer_isr_buffer(struct isp_res_device *res)
1047 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; 1047 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1048 1048
1049 if (res->input == RESIZER_INPUT_MEMORY) { 1049 if (res->input == RESIZER_INPUT_MEMORY) {
1050 buffer = omap3isp_video_buffer_next(&res->video_in, 0); 1050 buffer = omap3isp_video_buffer_next(&res->video_in);
1051 if (buffer != NULL) 1051 if (buffer != NULL)
1052 resizer_set_inaddr(res, buffer->isp_addr); 1052 resizer_set_inaddr(res, buffer->isp_addr);
1053 pipe->state |= ISP_PIPELINE_IDLE_INPUT; 1053 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
@@ -1064,8 +1064,6 @@ static void resizer_isr_buffer(struct isp_res_device *res)
1064 if (restart) 1064 if (restart)
1065 resizer_enable_oneshot(res); 1065 resizer_enable_oneshot(res);
1066 } 1066 }
1067
1068 res->error = 0;
1069} 1067}
1070 1068
1071/* 1069/*
@@ -1154,7 +1152,6 @@ static int resizer_set_stream(struct v4l2_subdev *sd, int enable)
1154 1152
1155 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_RESIZER); 1153 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_RESIZER);
1156 resizer_configure(res); 1154 resizer_configure(res);
1157 res->error = 0;
1158 resizer_print_status(res); 1155 resizer_print_status(res);
1159 } 1156 }
1160 1157
diff --git a/drivers/media/video/omap3isp/ispresizer.h b/drivers/media/video/omap3isp/ispresizer.h
index 76abc2e4212..70c1c0e1bbd 100644
--- a/drivers/media/video/omap3isp/ispresizer.h
+++ b/drivers/media/video/omap3isp/ispresizer.h
@@ -107,7 +107,6 @@ struct isp_res_device {
107 enum resizer_input_entity input; 107 enum resizer_input_entity input;
108 struct isp_video video_in; 108 struct isp_video video_in;
109 struct isp_video video_out; 109 struct isp_video video_out;
110 unsigned int error;
111 110
112 u32 addr_base; /* stored source buffer address in memory mode */ 111 u32 addr_base; /* stored source buffer address in memory mode */
113 u32 crop_offset; /* additional offset for crop in memory mode */ 112 u32 crop_offset; /* additional offset for crop in memory mode */
diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c
index bd3aebafafa..b0207005772 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -211,14 +211,14 @@ static void isp_video_pix_to_mbus(const struct v4l2_pix_format *pix,
211 mbus->width = pix->width; 211 mbus->width = pix->width;
212 mbus->height = pix->height; 212 mbus->height = pix->height;
213 213
214 for (i = 0; i < ARRAY_SIZE(formats); ++i) { 214 /* Skip the last format in the loop so that it will be selected if no
215 * match is found.
216 */
217 for (i = 0; i < ARRAY_SIZE(formats) - 1; ++i) {
215 if (formats[i].pixelformat == pix->pixelformat) 218 if (formats[i].pixelformat == pix->pixelformat)
216 break; 219 break;
217 } 220 }
218 221
219 if (WARN_ON(i == ARRAY_SIZE(formats)))
220 return;
221
222 mbus->code = formats[i].code; 222 mbus->code = formats[i].code;
223 mbus->colorspace = pix->colorspace; 223 mbus->colorspace = pix->colorspace;
224 mbus->field = pix->field; 224 mbus->field = pix->field;
@@ -581,21 +581,20 @@ static const struct isp_video_queue_operations isp_video_queue_ops = {
581/* 581/*
582 * omap3isp_video_buffer_next - Complete the current buffer and return the next 582 * omap3isp_video_buffer_next - Complete the current buffer and return the next
583 * @video: ISP video object 583 * @video: ISP video object
584 * @error: Whether an error occurred during capture
585 * 584 *
586 * Remove the current video buffer from the DMA queue and fill its timestamp, 585 * Remove the current video buffer from the DMA queue and fill its timestamp,
587 * field count and state fields before waking up its completion handler. 586 * field count and state fields before waking up its completion handler.
588 * 587 *
589 * The buffer state is set to VIDEOBUF_DONE if no error occurred (@error is 0) 588 * For capture video nodes the buffer state is set to ISP_BUF_STATE_DONE if no
590 * or VIDEOBUF_ERROR otherwise (@error is non-zero). 589 * error has been flagged in the pipeline, or to ISP_BUF_STATE_ERROR otherwise.
590 * For video output nodes the buffer state is always set to ISP_BUF_STATE_DONE.
591 * 591 *
592 * The DMA queue is expected to contain at least one buffer. 592 * The DMA queue is expected to contain at least one buffer.
593 * 593 *
594 * Return a pointer to the next buffer in the DMA queue, or NULL if the queue is 594 * Return a pointer to the next buffer in the DMA queue, or NULL if the queue is
595 * empty. 595 * empty.
596 */ 596 */
597struct isp_buffer *omap3isp_video_buffer_next(struct isp_video *video, 597struct isp_buffer *omap3isp_video_buffer_next(struct isp_video *video)
598 unsigned int error)
599{ 598{
600 struct isp_pipeline *pipe = to_isp_pipeline(&video->video.entity); 599 struct isp_pipeline *pipe = to_isp_pipeline(&video->video.entity);
601 struct isp_video_queue *queue = video->queue; 600 struct isp_video_queue *queue = video->queue;
@@ -630,7 +629,13 @@ struct isp_buffer *omap3isp_video_buffer_next(struct isp_video *video,
630 else 629 else
631 buf->vbuf.sequence = atomic_read(&pipe->frame_number); 630 buf->vbuf.sequence = atomic_read(&pipe->frame_number);
632 631
633 buf->state = error ? ISP_BUF_STATE_ERROR : ISP_BUF_STATE_DONE; 632 /* Report pipeline errors to userspace on the capture device side. */
633 if (queue->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && pipe->error) {
634 buf->state = ISP_BUF_STATE_ERROR;
635 pipe->error = false;
636 } else {
637 buf->state = ISP_BUF_STATE_DONE;
638 }
634 639
635 wake_up(&buf->wait); 640 wake_up(&buf->wait);
636 641
@@ -1016,6 +1021,8 @@ isp_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)
1016 if (ret < 0) 1021 if (ret < 0)
1017 goto error; 1022 goto error;
1018 1023
1024 pipe->error = false;
1025
1019 spin_lock_irqsave(&pipe->lock, flags); 1026 spin_lock_irqsave(&pipe->lock, flags);
1020 pipe->state &= ~ISP_PIPELINE_STREAM; 1027 pipe->state &= ~ISP_PIPELINE_STREAM;
1021 pipe->state |= state; 1028 pipe->state |= state;
diff --git a/drivers/media/video/omap3isp/ispvideo.h b/drivers/media/video/omap3isp/ispvideo.h
index 08cbfa144e6..d91bdb919be 100644
--- a/drivers/media/video/omap3isp/ispvideo.h
+++ b/drivers/media/video/omap3isp/ispvideo.h
@@ -85,6 +85,10 @@ enum isp_pipeline_state {
85 ISP_PIPELINE_STREAM = 64, 85 ISP_PIPELINE_STREAM = 64,
86}; 86};
87 87
88/*
89 * struct isp_pipeline - An ISP hardware pipeline
90 * @error: A hardware error occurred during capture
91 */
88struct isp_pipeline { 92struct isp_pipeline {
89 struct media_pipeline pipe; 93 struct media_pipeline pipe;
90 spinlock_t lock; /* Pipeline state and queue flags */ 94 spinlock_t lock; /* Pipeline state and queue flags */
@@ -96,6 +100,7 @@ struct isp_pipeline {
96 unsigned int max_rate; 100 unsigned int max_rate;
97 atomic_t frame_number; 101 atomic_t frame_number;
98 bool do_propagation; /* of frame number */ 102 bool do_propagation; /* of frame number */
103 bool error;
99 struct v4l2_fract max_timeperframe; 104 struct v4l2_fract max_timeperframe;
100}; 105};
101 106
@@ -194,8 +199,7 @@ void omap3isp_video_cleanup(struct isp_video *video);
194int omap3isp_video_register(struct isp_video *video, 199int omap3isp_video_register(struct isp_video *video,
195 struct v4l2_device *vdev); 200 struct v4l2_device *vdev);
196void omap3isp_video_unregister(struct isp_video *video); 201void omap3isp_video_unregister(struct isp_video *video);
197struct isp_buffer *omap3isp_video_buffer_next(struct isp_video *video, 202struct isp_buffer *omap3isp_video_buffer_next(struct isp_video *video);
198 unsigned int error);
199void omap3isp_video_resume(struct isp_video *video, int continuous); 203void omap3isp_video_resume(struct isp_video *video, int continuous);
200struct media_pad *omap3isp_video_remote_pad(struct isp_video *video); 204struct media_pad *omap3isp_video_remote_pad(struct isp_video *video);
201 205
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.c b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
index 122b45760f0..ebc2c7e3923 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
@@ -2546,8 +2546,9 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
2546 } 2546 }
2547 2547
2548 /* Define and configure additional controls from cx2341x module. */ 2548 /* Define and configure additional controls from cx2341x module. */
2549 hdw->mpeg_ctrl_info = kzalloc( 2549 hdw->mpeg_ctrl_info = kcalloc(MPEGDEF_COUNT,
2550 sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL); 2550 sizeof(*(hdw->mpeg_ctrl_info)),
2551 GFP_KERNEL);
2551 if (!hdw->mpeg_ctrl_info) goto fail; 2552 if (!hdw->mpeg_ctrl_info) goto fail;
2552 for (idx = 0; idx < MPEGDEF_COUNT; idx++) { 2553 for (idx = 0; idx < MPEGDEF_COUNT; idx++) {
2553 cptr = hdw->controls + idx + CTRLDEF_COUNT; 2554 cptr = hdw->controls + idx + CTRLDEF_COUNT;
diff --git a/drivers/media/video/pwc/pwc-ctrl.c b/drivers/media/video/pwc/pwc-ctrl.c
index 3977addf3ba..905d41d90c6 100644
--- a/drivers/media/video/pwc/pwc-ctrl.c
+++ b/drivers/media/video/pwc/pwc-ctrl.c
@@ -102,8 +102,6 @@ static struct Nala_table_entry Nala_table[PSZ_MAX][PWC_FPS_MAX_NALA] =
102#include "pwc-nala.h" 102#include "pwc-nala.h"
103}; 103};
104 104
105static void pwc_set_image_buffer_size(struct pwc_device *pdev);
106
107/****************************************************************************/ 105/****************************************************************************/
108 106
109static int _send_control_msg(struct pwc_device *pdev, 107static int _send_control_msg(struct pwc_device *pdev,
@@ -113,10 +111,9 @@ static int _send_control_msg(struct pwc_device *pdev,
113 void *kbuf = NULL; 111 void *kbuf = NULL;
114 112
115 if (buflen) { 113 if (buflen) {
116 kbuf = kmalloc(buflen, GFP_KERNEL); /* not allowed on stack */ 114 kbuf = kmemdup(buf, buflen, GFP_KERNEL); /* not allowed on stack */
117 if (kbuf == NULL) 115 if (kbuf == NULL)
118 return -ENOMEM; 116 return -ENOMEM;
119 memcpy(kbuf, buf, buflen);
120 } 117 }
121 118
122 rc = usb_control_msg(pdev->udev, usb_sndctrlpipe(pdev->udev, 0), 119 rc = usb_control_msg(pdev->udev, usb_sndctrlpipe(pdev->udev, 0),
@@ -171,7 +168,8 @@ int send_control_msg(struct pwc_device *pdev,
171 request, value, pdev->vcinterface, buf, buflen); 168 request, value, pdev->vcinterface, buf, buflen);
172} 169}
173 170
174static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames) 171static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames,
172 int *compression)
175{ 173{
176 unsigned char buf[3]; 174 unsigned char buf[3];
177 int ret, fps; 175 int ret, fps;
@@ -221,10 +219,10 @@ static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames)
221 219
222 /* Set various parameters */ 220 /* Set various parameters */
223 pdev->vframes = frames; 221 pdev->vframes = frames;
224 pdev->vsize = size;
225 pdev->valternate = pEntry->alternate; 222 pdev->valternate = pEntry->alternate;
226 pdev->image = pwc_image_sizes[size]; 223 pdev->width = pwc_image_sizes[size][0];
227 pdev->frame_size = (pdev->image.x * pdev->image.y * 3) / 2; 224 pdev->height = pwc_image_sizes[size][1];
225 pdev->frame_size = (pdev->width * pdev->height * 3) / 2;
228 if (pEntry->compressed) { 226 if (pEntry->compressed) {
229 if (pdev->release < 5) { /* 4 fold compression */ 227 if (pdev->release < 5) { /* 4 fold compression */
230 pdev->vbandlength = 528; 228 pdev->vbandlength = 528;
@@ -237,38 +235,40 @@ static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames)
237 } 235 }
238 else 236 else
239 pdev->vbandlength = 0; 237 pdev->vbandlength = 0;
238
239 /* Let pwc-if.c:isoc_init know we don't support higher compression */
240 *compression = 3;
241
240 return 0; 242 return 0;
241} 243}
242 244
243 245
244static int set_video_mode_Timon(struct pwc_device *pdev, int size, int frames, int compression, int snapshot) 246static int set_video_mode_Timon(struct pwc_device *pdev, int size, int frames,
247 int *compression)
245{ 248{
246 unsigned char buf[13]; 249 unsigned char buf[13];
247 const struct Timon_table_entry *pChoose; 250 const struct Timon_table_entry *pChoose;
248 int ret, fps; 251 int ret, fps;
249 252
250 if (size >= PSZ_MAX || frames < 5 || frames > 30 || compression < 0 || compression > 3) 253 if (size >= PSZ_MAX || frames < 5 || frames > 30 ||
254 *compression < 0 || *compression > 3)
251 return -EINVAL; 255 return -EINVAL;
252 if (size == PSZ_VGA && frames > 15) 256 if (size == PSZ_VGA && frames > 15)
253 return -EINVAL; 257 return -EINVAL;
254 fps = (frames / 5) - 1; 258 fps = (frames / 5) - 1;
255 259
256 /* Find a supported framerate with progressively higher compression ratios 260 /* Find a supported framerate with progressively higher compression */
257 if the preferred ratio is not available.
258 */
259 pChoose = NULL; 261 pChoose = NULL;
260 while (compression <= 3) { 262 while (*compression <= 3) {
261 pChoose = &Timon_table[size][fps][compression]; 263 pChoose = &Timon_table[size][fps][*compression];
262 if (pChoose->alternate != 0) 264 if (pChoose->alternate != 0)
263 break; 265 break;
264 compression++; 266 (*compression)++;
265 } 267 }
266 if (pChoose == NULL || pChoose->alternate == 0) 268 if (pChoose == NULL || pChoose->alternate == 0)
267 return -ENOENT; /* Not supported. */ 269 return -ENOENT; /* Not supported. */
268 270
269 memcpy(buf, pChoose->mode, 13); 271 memcpy(buf, pChoose->mode, 13);
270 if (snapshot)
271 buf[0] |= 0x80;
272 ret = send_video_command(pdev, pdev->vendpoint, buf, 13); 272 ret = send_video_command(pdev, pdev->vendpoint, buf, 13);
273 if (ret < 0) 273 if (ret < 0)
274 return ret; 274 return ret;
@@ -284,55 +284,38 @@ static int set_video_mode_Timon(struct pwc_device *pdev, int size, int frames, i
284 284
285 /* Set various parameters */ 285 /* Set various parameters */
286 pdev->vframes = frames; 286 pdev->vframes = frames;
287 pdev->vsize = size;
288 pdev->vsnapshot = snapshot;
289 pdev->valternate = pChoose->alternate; 287 pdev->valternate = pChoose->alternate;
290 pdev->image = pwc_image_sizes[size]; 288 pdev->width = pwc_image_sizes[size][0];
289 pdev->height = pwc_image_sizes[size][1];
291 pdev->vbandlength = pChoose->bandlength; 290 pdev->vbandlength = pChoose->bandlength;
292 if (pChoose->bandlength > 0) 291 if (pChoose->bandlength > 0)
293 pdev->frame_size = (pChoose->bandlength * pdev->image.y) / 4; 292 pdev->frame_size = (pChoose->bandlength * pdev->height) / 4;
294 else 293 else
295 pdev->frame_size = (pdev->image.x * pdev->image.y * 12) / 8; 294 pdev->frame_size = (pdev->width * pdev->height * 12) / 8;
296 return 0; 295 return 0;
297} 296}
298 297
299 298
300static int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames, int compression, int snapshot) 299static int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames,
300 int *compression)
301{ 301{
302 const struct Kiara_table_entry *pChoose = NULL; 302 const struct Kiara_table_entry *pChoose = NULL;
303 int fps, ret; 303 int fps, ret;
304 unsigned char buf[12]; 304 unsigned char buf[12];
305 struct Kiara_table_entry RawEntry = {6, 773, 1272, {0xAD, 0xF4, 0x10, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x03, 0x80}};
306 305
307 if (size >= PSZ_MAX || frames < 5 || frames > 30 || compression < 0 || compression > 3) 306 if (size >= PSZ_MAX || frames < 5 || frames > 30 ||
307 *compression < 0 || *compression > 3)
308 return -EINVAL; 308 return -EINVAL;
309 if (size == PSZ_VGA && frames > 15) 309 if (size == PSZ_VGA && frames > 15)
310 return -EINVAL; 310 return -EINVAL;
311 fps = (frames / 5) - 1; 311 fps = (frames / 5) - 1;
312 312
313 /* special case: VGA @ 5 fps and snapshot is raw bayer mode */ 313 /* Find a supported framerate with progressively higher compression */
314 if (size == PSZ_VGA && frames == 5 && snapshot && pdev->pixfmt != V4L2_PIX_FMT_YUV420) 314 while (*compression <= 3) {
315 { 315 pChoose = &Kiara_table[size][fps][*compression];
316 /* Only available in case the raw palette is selected or 316 if (pChoose->alternate != 0)
317 we have the decompressor available. This mode is 317 break;
318 only available in compressed form 318 (*compression)++;
319 */
320 PWC_DEBUG_SIZE("Choosing VGA/5 BAYER mode.\n");
321 pChoose = &RawEntry;
322 }
323 else
324 {
325 /* Find a supported framerate with progressively higher compression ratios
326 if the preferred ratio is not available.
327 Skip this step when using RAW modes.
328 */
329 snapshot = 0;
330 while (compression <= 3) {
331 pChoose = &Kiara_table[size][fps][compression];
332 if (pChoose->alternate != 0)
333 break;
334 compression++;
335 }
336 } 319 }
337 if (pChoose == NULL || pChoose->alternate == 0) 320 if (pChoose == NULL || pChoose->alternate == 0)
338 return -ENOENT; /* Not supported. */ 321 return -ENOENT; /* Not supported. */
@@ -341,8 +324,6 @@ static int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames, i
341 324
342 /* usb_control_msg won't take staticly allocated arrays as argument?? */ 325 /* usb_control_msg won't take staticly allocated arrays as argument?? */
343 memcpy(buf, pChoose->mode, 12); 326 memcpy(buf, pChoose->mode, 12);
344 if (snapshot)
345 buf[0] |= 0x80;
346 327
347 /* Firmware bug: video endpoint is 5, but commands are sent to endpoint 4 */ 328 /* Firmware bug: video endpoint is 5, but commands are sent to endpoint 4 */
348 ret = send_video_command(pdev, 4 /* pdev->vendpoint */, buf, 12); 329 ret = send_video_command(pdev, 4 /* pdev->vendpoint */, buf, 12);
@@ -359,61 +340,43 @@ static int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames, i
359 memcpy(pdev->cmd_buf, buf, 12); 340 memcpy(pdev->cmd_buf, buf, 12);
360 /* All set and go */ 341 /* All set and go */
361 pdev->vframes = frames; 342 pdev->vframes = frames;
362 pdev->vsize = size;
363 pdev->vsnapshot = snapshot;
364 pdev->valternate = pChoose->alternate; 343 pdev->valternate = pChoose->alternate;
365 pdev->image = pwc_image_sizes[size]; 344 pdev->width = pwc_image_sizes[size][0];
345 pdev->height = pwc_image_sizes[size][1];
366 pdev->vbandlength = pChoose->bandlength; 346 pdev->vbandlength = pChoose->bandlength;
367 if (pdev->vbandlength > 0) 347 if (pdev->vbandlength > 0)
368 pdev->frame_size = (pdev->vbandlength * pdev->image.y) / 4; 348 pdev->frame_size = (pdev->vbandlength * pdev->height) / 4;
369 else 349 else
370 pdev->frame_size = (pdev->image.x * pdev->image.y * 12) / 8; 350 pdev->frame_size = (pdev->width * pdev->height * 12) / 8;
371 PWC_TRACE("frame_size=%d, vframes=%d, vsize=%d, vsnapshot=%d, vbandlength=%d\n", 351 PWC_TRACE("frame_size=%d, vframes=%d, vsize=%d, vbandlength=%d\n",
372 pdev->frame_size,pdev->vframes,pdev->vsize,pdev->vsnapshot,pdev->vbandlength); 352 pdev->frame_size, pdev->vframes, size, pdev->vbandlength);
373 return 0; 353 return 0;
374} 354}
375 355
376 356int pwc_set_video_mode(struct pwc_device *pdev, int width, int height,
377 357 int frames, int *compression)
378/**
379 @pdev: device structure
380 @width: viewport width
381 @height: viewport height
382 @frame: framerate, in fps
383 @compression: preferred compression ratio
384 @snapshot: snapshot mode or streaming
385 */
386int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot)
387{ 358{
388 int ret, size; 359 int ret, size;
389 360
390 PWC_DEBUG_FLOW("set_video_mode(%dx%d @ %d, pixfmt %08x).\n", width, height, frames, pdev->pixfmt); 361 PWC_DEBUG_FLOW("set_video_mode(%dx%d @ %d, pixfmt %08x).\n", width, height, frames, pdev->pixfmt);
391 size = pwc_decode_size(pdev, width, height); 362 size = pwc_get_size(pdev, width, height);
392 if (size < 0) {
393 PWC_DEBUG_MODULE("Could not find suitable size.\n");
394 return -ERANGE;
395 }
396 PWC_TRACE("decode_size = %d.\n", size); 363 PWC_TRACE("decode_size = %d.\n", size);
397 364
398 if (DEVICE_USE_CODEC1(pdev->type)) { 365 if (DEVICE_USE_CODEC1(pdev->type)) {
399 ret = set_video_mode_Nala(pdev, size, frames); 366 ret = set_video_mode_Nala(pdev, size, frames, compression);
400 367
401 } else if (DEVICE_USE_CODEC3(pdev->type)) { 368 } else if (DEVICE_USE_CODEC3(pdev->type)) {
402 ret = set_video_mode_Kiara(pdev, size, frames, compression, snapshot); 369 ret = set_video_mode_Kiara(pdev, size, frames, compression);
403 370
404 } else { 371 } else {
405 ret = set_video_mode_Timon(pdev, size, frames, compression, snapshot); 372 ret = set_video_mode_Timon(pdev, size, frames, compression);
406 } 373 }
407 if (ret < 0) { 374 if (ret < 0) {
408 PWC_ERROR("Failed to set video mode %s@%d fps; return code = %d\n", size2name[size], frames, ret); 375 PWC_ERROR("Failed to set video mode %s@%d fps; return code = %d\n", size2name[size], frames, ret);
409 return ret; 376 return ret;
410 } 377 }
411 pdev->view.x = width;
412 pdev->view.y = height;
413 pdev->vcompression = compression;
414 pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size; 378 pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size;
415 pwc_set_image_buffer_size(pdev); 379 PWC_DEBUG_SIZE("Set resolution to %dx%d\n", pdev->width, pdev->height);
416 PWC_DEBUG_SIZE("Set viewport to %dx%d, image size is %dx%d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y);
417 return 0; 380 return 0;
418} 381}
419 382
@@ -470,34 +433,6 @@ unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned i
470 return ret; 433 return ret;
471} 434}
472 435
473static void pwc_set_image_buffer_size(struct pwc_device *pdev)
474{
475 int factor = 0;
476
477 /* for V4L2_PIX_FMT_YUV420 */
478 switch (pdev->pixfmt) {
479 case V4L2_PIX_FMT_YUV420:
480 factor = 6;
481 break;
482 case V4L2_PIX_FMT_PWC1:
483 case V4L2_PIX_FMT_PWC2:
484 factor = 6; /* can be uncompressed YUV420P */
485 break;
486 }
487
488 /* Set sizes in bytes */
489 pdev->image.size = pdev->image.x * pdev->image.y * factor / 4;
490 pdev->view.size = pdev->view.x * pdev->view.y * factor / 4;
491
492 /* Align offset, or you'll get some very weird results in
493 YUV420 mode... x must be multiple of 4 (to get the Y's in
494 place), and y even (or you'll mixup U & V). This is less of a
495 problem for YUV420P.
496 */
497 pdev->offset.x = ((pdev->view.x - pdev->image.x) / 2) & 0xFFFC;
498 pdev->offset.y = ((pdev->view.y - pdev->image.y) / 2) & 0xFFFE;
499}
500
501int pwc_get_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data) 436int pwc_get_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data)
502{ 437{
503 int ret; 438 int ret;
@@ -598,54 +533,6 @@ void pwc_camera_power(struct pwc_device *pdev, int power)
598 power ? "on" : "off", r); 533 power ? "on" : "off", r);
599} 534}
600 535
601static int pwc_set_wb_speed(struct pwc_device *pdev, int speed)
602{
603 unsigned char buf;
604
605 /* useful range is 0x01..0x20 */
606 buf = speed / 0x7f0;
607 return send_control_msg(pdev,
608 SET_CHROM_CTL, AWB_CONTROL_SPEED_FORMATTER, &buf, sizeof(buf));
609}
610
611static int pwc_get_wb_speed(struct pwc_device *pdev, int *value)
612{
613 unsigned char buf;
614 int ret;
615
616 ret = recv_control_msg(pdev,
617 GET_CHROM_CTL, AWB_CONTROL_SPEED_FORMATTER, &buf, sizeof(buf));
618 if (ret < 0)
619 return ret;
620 *value = buf * 0x7f0;
621 return 0;
622}
623
624
625static int pwc_set_wb_delay(struct pwc_device *pdev, int delay)
626{
627 unsigned char buf;
628
629 /* useful range is 0x01..0x3F */
630 buf = (delay >> 10);
631 return send_control_msg(pdev,
632 SET_CHROM_CTL, AWB_CONTROL_DELAY_FORMATTER, &buf, sizeof(buf));
633}
634
635static int pwc_get_wb_delay(struct pwc_device *pdev, int *value)
636{
637 unsigned char buf;
638 int ret;
639
640 ret = recv_control_msg(pdev,
641 GET_CHROM_CTL, AWB_CONTROL_DELAY_FORMATTER, &buf, sizeof(buf));
642 if (ret < 0)
643 return ret;
644 *value = buf << 10;
645 return 0;
646}
647
648
649int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value) 536int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value)
650{ 537{
651 unsigned char buf[2]; 538 unsigned char buf[2];
@@ -675,108 +562,6 @@ int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value)
675 return r; 562 return r;
676} 563}
677 564
678static int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value)
679{
680 unsigned char buf[2];
681 int ret;
682
683 if (pdev->type < 730) {
684 *on_value = -1;
685 *off_value = -1;
686 return 0;
687 }
688
689 ret = recv_control_msg(pdev,
690 GET_STATUS_CTL, LED_FORMATTER, &buf, sizeof(buf));
691 if (ret < 0)
692 return ret;
693 *on_value = buf[0] * 100;
694 *off_value = buf[1] * 100;
695 return 0;
696}
697
698static int _pwc_mpt_reset(struct pwc_device *pdev, int flags)
699{
700 unsigned char buf;
701
702 buf = flags & 0x03; // only lower two bits are currently used
703 return send_control_msg(pdev,
704 SET_MPT_CTL, PT_RESET_CONTROL_FORMATTER, &buf, sizeof(buf));
705}
706
707int pwc_mpt_reset(struct pwc_device *pdev, int flags)
708{
709 int ret;
710 ret = _pwc_mpt_reset(pdev, flags);
711 if (ret >= 0) {
712 pdev->pan_angle = 0;
713 pdev->tilt_angle = 0;
714 }
715 return ret;
716}
717
718static int _pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt)
719{
720 unsigned char buf[4];
721
722 /* set new relative angle; angles are expressed in degrees * 100,
723 but cam as .5 degree resolution, hence divide by 200. Also
724 the angle must be multiplied by 64 before it's send to
725 the cam (??)
726 */
727 pan = 64 * pan / 100;
728 tilt = -64 * tilt / 100; /* positive tilt is down, which is not what the user would expect */
729 buf[0] = pan & 0xFF;
730 buf[1] = (pan >> 8) & 0xFF;
731 buf[2] = tilt & 0xFF;
732 buf[3] = (tilt >> 8) & 0xFF;
733 return send_control_msg(pdev,
734 SET_MPT_CTL, PT_RELATIVE_CONTROL_FORMATTER, &buf, sizeof(buf));
735}
736
737int pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt)
738{
739 int ret;
740
741 /* check absolute ranges */
742 if (pan < pdev->angle_range.pan_min ||
743 pan > pdev->angle_range.pan_max ||
744 tilt < pdev->angle_range.tilt_min ||
745 tilt > pdev->angle_range.tilt_max)
746 return -ERANGE;
747
748 /* go to relative range, check again */
749 pan -= pdev->pan_angle;
750 tilt -= pdev->tilt_angle;
751 /* angles are specified in degrees * 100, thus the limit = 36000 */
752 if (pan < -36000 || pan > 36000 || tilt < -36000 || tilt > 36000)
753 return -ERANGE;
754
755 ret = _pwc_mpt_set_angle(pdev, pan, tilt);
756 if (ret >= 0) {
757 pdev->pan_angle += pan;
758 pdev->tilt_angle += tilt;
759 }
760 if (ret == -EPIPE) /* stall -> out of range */
761 ret = -ERANGE;
762 return ret;
763}
764
765static int pwc_mpt_get_status(struct pwc_device *pdev, struct pwc_mpt_status *status)
766{
767 int ret;
768 unsigned char buf[5];
769
770 ret = recv_control_msg(pdev,
771 GET_MPT_CTL, PT_STATUS_FORMATTER, &buf, sizeof(buf));
772 if (ret < 0)
773 return ret;
774 status->status = buf[0] & 0x7; // 3 bits are used for reporting
775 status->time_pan = (buf[1] << 8) + buf[2];
776 status->time_tilt = (buf[3] << 8) + buf[4];
777 return 0;
778}
779
780#ifdef CONFIG_USB_PWC_DEBUG 565#ifdef CONFIG_USB_PWC_DEBUG
781int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor) 566int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor)
782{ 567{
@@ -801,420 +586,3 @@ int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor)
801 return 0; 586 return 0;
802} 587}
803#endif 588#endif
804
805 /* End of Add-Ons */
806 /* ************************************************* */
807
808/* Linux 2.5.something and 2.6 pass direct pointers to arguments of
809 ioctl() calls. With 2.4, you have to do tedious copy_from_user()
810 and copy_to_user() calls. With these macros we circumvent this,
811 and let me maintain only one source file. The functionality is
812 exactly the same otherwise.
813 */
814
815/* define local variable for arg */
816#define ARG_DEF(ARG_type, ARG_name)\
817 ARG_type *ARG_name = arg;
818/* copy arg to local variable */
819#define ARG_IN(ARG_name) /* nothing */
820/* argument itself (referenced) */
821#define ARGR(ARG_name) (*ARG_name)
822/* argument address */
823#define ARGA(ARG_name) ARG_name
824/* copy local variable to arg */
825#define ARG_OUT(ARG_name) /* nothing */
826
827/*
828 * Our ctrls use native values, but the old custom pwc ioctl interface expects
829 * values from 0 - 65535, define 2 helper functions to scale things. */
830static int pwc_ioctl_g_ctrl(struct v4l2_ctrl *ctrl)
831{
832 return v4l2_ctrl_g_ctrl(ctrl) * 65535 / ctrl->maximum;
833}
834
835static int pwc_ioctl_s_ctrl(struct v4l2_ctrl *ctrl, int val)
836{
837 return v4l2_ctrl_s_ctrl(ctrl, val * ctrl->maximum / 65535);
838}
839
840long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg)
841{
842 long ret = 0;
843
844 switch(cmd) {
845 case VIDIOCPWCRUSER:
846 ret = pwc_button_ctrl(pdev, RESTORE_USER_DEFAULTS_FORMATTER);
847 break;
848
849 case VIDIOCPWCSUSER:
850 ret = pwc_button_ctrl(pdev, SAVE_USER_DEFAULTS_FORMATTER);
851 break;
852
853 case VIDIOCPWCFACTORY:
854 ret = pwc_button_ctrl(pdev, RESTORE_FACTORY_DEFAULTS_FORMATTER);
855 break;
856
857 case VIDIOCPWCSCQUAL:
858 {
859 ARG_DEF(int, qual)
860
861 if (vb2_is_streaming(&pdev->vb_queue)) {
862 ret = -EBUSY;
863 break;
864 }
865
866 ARG_IN(qual)
867 if (ARGR(qual) < 0 || ARGR(qual) > 3)
868 ret = -EINVAL;
869 else
870 ret = pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, ARGR(qual), pdev->vsnapshot);
871 break;
872 }
873
874 case VIDIOCPWCGCQUAL:
875 {
876 ARG_DEF(int, qual)
877
878 ARGR(qual) = pdev->vcompression;
879 ARG_OUT(qual)
880 break;
881 }
882
883 case VIDIOCPWCPROBE:
884 {
885 ARG_DEF(struct pwc_probe, probe)
886
887 strcpy(ARGR(probe).name, pdev->vdev.name);
888 ARGR(probe).type = pdev->type;
889 ARG_OUT(probe)
890 break;
891 }
892
893 case VIDIOCPWCGSERIAL:
894 {
895 ARG_DEF(struct pwc_serial, serial)
896
897 strcpy(ARGR(serial).serial, pdev->serial);
898 ARG_OUT(serial)
899 break;
900 }
901
902 case VIDIOCPWCSAGC:
903 {
904 ARG_DEF(int, agc)
905 ARG_IN(agc)
906 ret = v4l2_ctrl_s_ctrl(pdev->autogain, ARGR(agc) < 0);
907 if (ret == 0 && ARGR(agc) >= 0)
908 ret = pwc_ioctl_s_ctrl(pdev->gain, ARGR(agc));
909 break;
910 }
911
912 case VIDIOCPWCGAGC:
913 {
914 ARG_DEF(int, agc)
915 if (v4l2_ctrl_g_ctrl(pdev->autogain))
916 ARGR(agc) = -1;
917 else
918 ARGR(agc) = pwc_ioctl_g_ctrl(pdev->gain);
919 ARG_OUT(agc)
920 break;
921 }
922
923 case VIDIOCPWCSSHUTTER:
924 {
925 ARG_DEF(int, shutter)
926 ARG_IN(shutter)
927 ret = v4l2_ctrl_s_ctrl(pdev->exposure_auto,
928 /* Menu idx 0 = auto, idx 1 = manual */
929 ARGR(shutter) >= 0);
930 if (ret == 0 && ARGR(shutter) >= 0)
931 ret = pwc_ioctl_s_ctrl(pdev->exposure, ARGR(shutter));
932 break;
933 }
934
935 case VIDIOCPWCSAWB:
936 {
937 ARG_DEF(struct pwc_whitebalance, wb)
938 ARG_IN(wb)
939 ret = v4l2_ctrl_s_ctrl(pdev->auto_white_balance,
940 ARGR(wb).mode);
941 if (ret == 0 && ARGR(wb).mode == PWC_WB_MANUAL)
942 ret = pwc_ioctl_s_ctrl(pdev->red_balance,
943 ARGR(wb).manual_red);
944 if (ret == 0 && ARGR(wb).mode == PWC_WB_MANUAL)
945 ret = pwc_ioctl_s_ctrl(pdev->blue_balance,
946 ARGR(wb).manual_blue);
947 break;
948 }
949
950 case VIDIOCPWCGAWB:
951 {
952 ARG_DEF(struct pwc_whitebalance, wb)
953 ARGR(wb).mode = v4l2_ctrl_g_ctrl(pdev->auto_white_balance);
954 ARGR(wb).manual_red = ARGR(wb).read_red =
955 pwc_ioctl_g_ctrl(pdev->red_balance);
956 ARGR(wb).manual_blue = ARGR(wb).read_blue =
957 pwc_ioctl_g_ctrl(pdev->blue_balance);
958 ARG_OUT(wb)
959 break;
960 }
961
962 case VIDIOCPWCSAWBSPEED:
963 {
964 ARG_DEF(struct pwc_wb_speed, wbs)
965
966 if (ARGR(wbs).control_speed > 0) {
967 ret = pwc_set_wb_speed(pdev, ARGR(wbs).control_speed);
968 }
969 if (ARGR(wbs).control_delay > 0) {
970 ret = pwc_set_wb_delay(pdev, ARGR(wbs).control_delay);
971 }
972 break;
973 }
974
975 case VIDIOCPWCGAWBSPEED:
976 {
977 ARG_DEF(struct pwc_wb_speed, wbs)
978
979 ret = pwc_get_wb_speed(pdev, &ARGR(wbs).control_speed);
980 if (ret < 0)
981 break;
982 ret = pwc_get_wb_delay(pdev, &ARGR(wbs).control_delay);
983 if (ret < 0)
984 break;
985 ARG_OUT(wbs)
986 break;
987 }
988
989 case VIDIOCPWCSLED:
990 {
991 ARG_DEF(struct pwc_leds, leds)
992
993 ARG_IN(leds)
994 ret = pwc_set_leds(pdev, ARGR(leds).led_on, ARGR(leds).led_off);
995 break;
996 }
997
998
999 case VIDIOCPWCGLED:
1000 {
1001 ARG_DEF(struct pwc_leds, leds)
1002
1003 ret = pwc_get_leds(pdev, &ARGR(leds).led_on, &ARGR(leds).led_off);
1004 ARG_OUT(leds)
1005 break;
1006 }
1007
1008 case VIDIOCPWCSCONTOUR:
1009 {
1010 ARG_DEF(int, contour)
1011 ARG_IN(contour)
1012 ret = v4l2_ctrl_s_ctrl(pdev->autocontour, ARGR(contour) < 0);
1013 if (ret == 0 && ARGR(contour) >= 0)
1014 ret = pwc_ioctl_s_ctrl(pdev->contour, ARGR(contour));
1015 break;
1016 }
1017
1018 case VIDIOCPWCGCONTOUR:
1019 {
1020 ARG_DEF(int, contour)
1021 if (v4l2_ctrl_g_ctrl(pdev->autocontour))
1022 ARGR(contour) = -1;
1023 else
1024 ARGR(contour) = pwc_ioctl_g_ctrl(pdev->contour);
1025 ARG_OUT(contour)
1026 break;
1027 }
1028
1029 case VIDIOCPWCSBACKLIGHT:
1030 {
1031 ARG_DEF(int, backlight)
1032 ARG_IN(backlight)
1033 ret = v4l2_ctrl_s_ctrl(pdev->backlight, ARGR(backlight));
1034 break;
1035 }
1036
1037 case VIDIOCPWCGBACKLIGHT:
1038 {
1039 ARG_DEF(int, backlight)
1040 ARGR(backlight) = v4l2_ctrl_g_ctrl(pdev->backlight);
1041 ARG_OUT(backlight)
1042 break;
1043 }
1044
1045 case VIDIOCPWCSFLICKER:
1046 {
1047 ARG_DEF(int, flicker)
1048 ARG_IN(flicker)
1049 ret = v4l2_ctrl_s_ctrl(pdev->flicker, ARGR(flicker));
1050 break;
1051 }
1052
1053 case VIDIOCPWCGFLICKER:
1054 {
1055 ARG_DEF(int, flicker)
1056 ARGR(flicker) = v4l2_ctrl_g_ctrl(pdev->flicker);
1057 ARG_OUT(flicker)
1058 break;
1059 }
1060
1061 case VIDIOCPWCSDYNNOISE:
1062 {
1063 ARG_DEF(int, dynnoise)
1064 ARG_IN(dynnoise)
1065 ret = v4l2_ctrl_s_ctrl(pdev->noise_reduction, ARGR(dynnoise));
1066 break;
1067 }
1068
1069 case VIDIOCPWCGDYNNOISE:
1070 {
1071 ARG_DEF(int, dynnoise)
1072 ARGR(dynnoise) = v4l2_ctrl_g_ctrl(pdev->noise_reduction);
1073 ARG_OUT(dynnoise);
1074 break;
1075 }
1076
1077 case VIDIOCPWCGREALSIZE:
1078 {
1079 ARG_DEF(struct pwc_imagesize, size)
1080
1081 ARGR(size).width = pdev->image.x;
1082 ARGR(size).height = pdev->image.y;
1083 ARG_OUT(size)
1084 break;
1085 }
1086
1087 case VIDIOCPWCMPTRESET:
1088 {
1089 if (pdev->features & FEATURE_MOTOR_PANTILT)
1090 {
1091 ARG_DEF(int, flags)
1092
1093 ARG_IN(flags)
1094 ret = pwc_mpt_reset(pdev, ARGR(flags));
1095 }
1096 else
1097 {
1098 ret = -ENXIO;
1099 }
1100 break;
1101 }
1102
1103 case VIDIOCPWCMPTGRANGE:
1104 {
1105 if (pdev->features & FEATURE_MOTOR_PANTILT)
1106 {
1107 ARG_DEF(struct pwc_mpt_range, range)
1108
1109 ARGR(range) = pdev->angle_range;
1110 ARG_OUT(range)
1111 }
1112 else
1113 {
1114 ret = -ENXIO;
1115 }
1116 break;
1117 }
1118
1119 case VIDIOCPWCMPTSANGLE:
1120 {
1121 int new_pan, new_tilt;
1122
1123 if (pdev->features & FEATURE_MOTOR_PANTILT)
1124 {
1125 ARG_DEF(struct pwc_mpt_angles, angles)
1126
1127 ARG_IN(angles)
1128 /* The camera can only set relative angles, so
1129 do some calculations when getting an absolute angle .
1130 */
1131 if (ARGR(angles).absolute)
1132 {
1133 new_pan = ARGR(angles).pan;
1134 new_tilt = ARGR(angles).tilt;
1135 }
1136 else
1137 {
1138 new_pan = pdev->pan_angle + ARGR(angles).pan;
1139 new_tilt = pdev->tilt_angle + ARGR(angles).tilt;
1140 }
1141 ret = pwc_mpt_set_angle(pdev, new_pan, new_tilt);
1142 }
1143 else
1144 {
1145 ret = -ENXIO;
1146 }
1147 break;
1148 }
1149
1150 case VIDIOCPWCMPTGANGLE:
1151 {
1152
1153 if (pdev->features & FEATURE_MOTOR_PANTILT)
1154 {
1155 ARG_DEF(struct pwc_mpt_angles, angles)
1156
1157 ARGR(angles).absolute = 1;
1158 ARGR(angles).pan = pdev->pan_angle;
1159 ARGR(angles).tilt = pdev->tilt_angle;
1160 ARG_OUT(angles)
1161 }
1162 else
1163 {
1164 ret = -ENXIO;
1165 }
1166 break;
1167 }
1168
1169 case VIDIOCPWCMPTSTATUS:
1170 {
1171 if (pdev->features & FEATURE_MOTOR_PANTILT)
1172 {
1173 ARG_DEF(struct pwc_mpt_status, status)
1174
1175 ret = pwc_mpt_get_status(pdev, ARGA(status));
1176 ARG_OUT(status)
1177 }
1178 else
1179 {
1180 ret = -ENXIO;
1181 }
1182 break;
1183 }
1184
1185 case VIDIOCPWCGVIDCMD:
1186 {
1187 ARG_DEF(struct pwc_video_command, vcmd);
1188
1189 ARGR(vcmd).type = pdev->type;
1190 ARGR(vcmd).release = pdev->release;
1191 ARGR(vcmd).command_len = pdev->cmd_len;
1192 memcpy(&ARGR(vcmd).command_buf, pdev->cmd_buf, pdev->cmd_len);
1193 ARGR(vcmd).bandlength = pdev->vbandlength;
1194 ARGR(vcmd).frame_size = pdev->frame_size;
1195 ARG_OUT(vcmd)
1196 break;
1197 }
1198 /*
1199 case VIDIOCPWCGVIDTABLE:
1200 {
1201 ARG_DEF(struct pwc_table_init_buffer, table);
1202 ARGR(table).len = pdev->cmd_len;
1203 memcpy(&ARGR(table).buffer, pdev->decompress_data, pdev->decompressor->table_size);
1204 ARG_OUT(table)
1205 break;
1206 }
1207 */
1208
1209 default:
1210 ret = -ENOIOCTLCMD;
1211 break;
1212 }
1213
1214 if (ret > 0)
1215 return 0;
1216 return ret;
1217}
1218
1219
1220/* vim: set cinoptions= formatoptions=croql cindent shiftwidth=8 tabstop=8: */
diff --git a/drivers/media/video/pwc/pwc-dec23.c b/drivers/media/video/pwc/pwc-dec23.c
index 06a4e877ba4..2c6709112b2 100644
--- a/drivers/media/video/pwc/pwc-dec23.c
+++ b/drivers/media/video/pwc/pwc-dec23.c
@@ -27,7 +27,6 @@
27#include "pwc-timon.h" 27#include "pwc-timon.h"
28#include "pwc-kiara.h" 28#include "pwc-kiara.h"
29#include "pwc-dec23.h" 29#include "pwc-dec23.h"
30#include <media/pwc-ioctl.h>
31 30
32#include <linux/string.h> 31#include <linux/string.h>
33#include <linux/slab.h> 32#include <linux/slab.h>
@@ -51,13 +50,6 @@
51# define USE_LOOKUP_TABLE_TO_CLAMP 1 50# define USE_LOOKUP_TABLE_TO_CLAMP 1
52#endif 51#endif
53 52
54/*
55 * ENABLE_BAYER_DECODER
56 * 0: bayer decoder is not build (save some space)
57 * 1: bayer decoder is build and can be used
58 */
59#define ENABLE_BAYER_DECODER 0
60
61static void build_subblock_pattern(struct pwc_dec23_private *pdec) 53static void build_subblock_pattern(struct pwc_dec23_private *pdec)
62{ 54{
63 static const unsigned int initial_values[12] = { 55 static const unsigned int initial_values[12] = {
@@ -315,6 +307,8 @@ int pwc_dec23_init(struct pwc_device *pwc, int type, unsigned char *cmd)
315 } 307 }
316 pdec = pwc->decompress_data; 308 pdec = pwc->decompress_data;
317 309
310 mutex_init(&pdec->lock);
311
318 if (DEVICE_USE_CODEC3(type)) { 312 if (DEVICE_USE_CODEC3(type)) {
319 flags = cmd[2] & 0x18; 313 flags = cmd[2] & 0x18;
320 if (flags == 8) 314 if (flags == 8)
@@ -467,123 +461,6 @@ static void copy_image_block_CrCb(const int *src, unsigned char *dst, unsigned i
467#endif 461#endif
468} 462}
469 463
470#if ENABLE_BAYER_DECODER
471/*
472 * Format: 8x2 pixels
473 * . G . G . G . G . G . G . G
474 * . . . . . . . . . . . . . .
475 * . G . G . G . G . G . G . G
476 * . . . . . . . . . . . . . .
477 * or
478 * . . . . . . . . . . . . . .
479 * G . G . G . G . G . G . G .
480 * . . . . . . . . . . . . . .
481 * G . G . G . G . G . G . G .
482*/
483static void copy_image_block_Green(const int *src, unsigned char *dst, unsigned int bytes_per_line, unsigned int scalebits)
484{
485#if UNROLL_LOOP_FOR_COPY
486 /* Unroll all loops */
487 const unsigned char *cm = pwc_crop_table+MAX_OUTER_CROP_VALUE;
488 unsigned char *d = dst;
489 const int *c = src;
490
491 d[0] = cm[c[0] >> scalebits];
492 d[2] = cm[c[1] >> scalebits];
493 d[4] = cm[c[2] >> scalebits];
494 d[6] = cm[c[3] >> scalebits];
495 d[8] = cm[c[4] >> scalebits];
496 d[10] = cm[c[5] >> scalebits];
497 d[12] = cm[c[6] >> scalebits];
498 d[14] = cm[c[7] >> scalebits];
499
500 d = dst + bytes_per_line;
501 d[0] = cm[c[8] >> scalebits];
502 d[2] = cm[c[9] >> scalebits];
503 d[4] = cm[c[10] >> scalebits];
504 d[6] = cm[c[11] >> scalebits];
505 d[8] = cm[c[12] >> scalebits];
506 d[10] = cm[c[13] >> scalebits];
507 d[12] = cm[c[14] >> scalebits];
508 d[14] = cm[c[15] >> scalebits];
509#else
510 int i;
511 unsigned char *d;
512 const int *c = src;
513
514 d = dst;
515 for (i = 0; i < 8; i++, c++)
516 d[i*2] = CLAMP((*c) >> scalebits);
517
518 d = dst + bytes_per_line;
519 for (i = 0; i < 8; i++, c++)
520 d[i*2] = CLAMP((*c) >> scalebits);
521#endif
522}
523#endif
524
525#if ENABLE_BAYER_DECODER
526/*
527 * Format: 4x4 pixels
528 * R . R . R . R
529 * . B . B . B .
530 * R . R . R . R
531 * . B . B . B .
532 */
533static void copy_image_block_RedBlue(const int *src, unsigned char *dst, unsigned int bytes_per_line, unsigned int scalebits)
534{
535#if UNROLL_LOOP_FOR_COPY
536 /* Unroll all loops */
537 const unsigned char *cm = pwc_crop_table+MAX_OUTER_CROP_VALUE;
538 unsigned char *d = dst;
539 const int *c = src;
540
541 d[0] = cm[c[0] >> scalebits];
542 d[2] = cm[c[1] >> scalebits];
543 d[4] = cm[c[2] >> scalebits];
544 d[6] = cm[c[3] >> scalebits];
545
546 d = dst + bytes_per_line;
547 d[1] = cm[c[4] >> scalebits];
548 d[3] = cm[c[5] >> scalebits];
549 d[5] = cm[c[6] >> scalebits];
550 d[7] = cm[c[7] >> scalebits];
551
552 d = dst + bytes_per_line*2;
553 d[0] = cm[c[8] >> scalebits];
554 d[2] = cm[c[9] >> scalebits];
555 d[4] = cm[c[10] >> scalebits];
556 d[6] = cm[c[11] >> scalebits];
557
558 d = dst + bytes_per_line*3;
559 d[1] = cm[c[12] >> scalebits];
560 d[3] = cm[c[13] >> scalebits];
561 d[5] = cm[c[14] >> scalebits];
562 d[7] = cm[c[15] >> scalebits];
563#else
564 int i;
565 unsigned char *d;
566 const int *c = src;
567
568 d = dst;
569 for (i = 0; i < 4; i++, c++)
570 d[i*2] = CLAMP((*c) >> scalebits);
571
572 d = dst + bytes_per_line;
573 for (i = 0; i < 4; i++, c++)
574 d[i*2+1] = CLAMP((*c) >> scalebits);
575
576 d = dst + bytes_per_line*2;
577 for (i = 0; i < 4; i++, c++)
578 d[i*2] = CLAMP((*c) >> scalebits);
579
580 d = dst + bytes_per_line*3;
581 for (i = 0; i < 4; i++, c++)
582 d[i*2+1] = CLAMP((*c) >> scalebits);
583#endif
584}
585#endif
586
587/* 464/*
588 * To manage the stream, we keep bits in a 32 bits register. 465 * To manage the stream, we keep bits in a 32 bits register.
589 * fill_nbits(n): fill the reservoir with at least n bits 466 * fill_nbits(n): fill the reservoir with at least n bits
@@ -775,146 +652,45 @@ static void DecompressBand23(struct pwc_dec23_private *pdec,
775 652
776} 653}
777 654
778#if ENABLE_BAYER_DECODER
779/*
780 * Size need to be a multiple of 8 in width
781 *
782 * Return a block of four line encoded like this:
783 *
784 * G R G R G R G R G R G R G R G R
785 * B G B G B G B G B G B G B G B G
786 * G R G R G R G R G R G R G R G R
787 * B G B G B G B G B G B G B G B G
788 *
789 */
790static void DecompressBandBayer(struct pwc_dec23_private *pdec,
791 const unsigned char *rawyuv,
792 unsigned char *rgbbayer,
793 unsigned int compressed_image_width,
794 unsigned int real_image_width)
795{
796 int compression_index, nblocks;
797 const unsigned char *ptable0004;
798 const unsigned char *ptable8004;
799 unsigned char *dest;
800
801 pdec->reservoir = 0;
802 pdec->nbits_in_reservoir = 0;
803 pdec->stream = rawyuv + 1; /* The first byte of the stream is skipped */
804
805 get_nbits(pdec, 4, compression_index);
806
807 /* pass 1: uncompress RB component */
808 nblocks = compressed_image_width / 4;
809
810 ptable0004 = pdec->table_0004_pass1[compression_index];
811 ptable8004 = pdec->table_8004_pass1[compression_index];
812 dest = rgbbayer;
813
814 /* Each block decode a square of 4x4 */
815 while (nblocks) {
816 decode_block(pdec, ptable0004, ptable8004);
817 copy_image_block_RedBlue(pdec->temp_colors, rgbbayer, real_image_width, pdec->scalebits);
818 dest += 8;
819 nblocks--;
820 }
821
822 /* pass 2: uncompress G component */
823 nblocks = compressed_image_width / 8;
824
825 ptable0004 = pdec->table_0004_pass2[compression_index];
826 ptable8004 = pdec->table_8004_pass2[compression_index];
827
828 /* Each block decode a square of 4x4 */
829 while (nblocks) {
830 decode_block(pdec, ptable0004, ptable8004);
831 copy_image_block_Green(pdec->temp_colors, rgbbayer+1, real_image_width, pdec->scalebits);
832
833 decode_block(pdec, ptable0004, ptable8004);
834 copy_image_block_Green(pdec->temp_colors, rgbbayer+real_image_width, real_image_width, pdec->scalebits);
835
836 rgbbayer += 16;
837 nblocks -= 2;
838 }
839}
840#endif
841
842
843/** 655/**
844 * 656 *
845 * Uncompress a pwc23 buffer. 657 * Uncompress a pwc23 buffer.
846 * 658 *
847 * pwc.view: size of the image wanted
848 * pwc.image: size of the image returned by the camera
849 * pwc.offset: (x,y) to displayer image in the view
850 *
851 * src: raw data 659 * src: raw data
852 * dst: image output 660 * dst: image output
853 * flags: PWCX_FLAG_PLANAR or PWCX_FLAG_BAYER
854 */ 661 */
855void pwc_dec23_decompress(const struct pwc_device *pwc, 662void pwc_dec23_decompress(const struct pwc_device *pwc,
856 const void *src, 663 const void *src,
857 void *dst, 664 void *dst)
858 int flags)
859{ 665{
860 int bandlines_left, stride, bytes_per_block; 666 int bandlines_left, bytes_per_block;
861 667 struct pwc_dec23_private *pdec = pwc->decompress_data;
862 bandlines_left = pwc->image.y / 4; 668
863 bytes_per_block = pwc->view.x * 4; 669 /* YUV420P image format */
864 670 unsigned char *pout_planar_y;
865 if (flags & PWCX_FLAG_BAYER) { 671 unsigned char *pout_planar_u;
866#if ENABLE_BAYER_DECODER 672 unsigned char *pout_planar_v;
867 /* RGB Bayer format */ 673 unsigned int plane_size;
868 unsigned char *rgbout; 674
869 675 mutex_lock(&pdec->lock);
870 stride = pwc->view.x * pwc->offset.y; 676
871 rgbout = dst + stride + pwc->offset.x; 677 bandlines_left = pwc->height / 4;
872 678 bytes_per_block = pwc->width * 4;
873 679 plane_size = pwc->height * pwc->width;
874 while (bandlines_left--) { 680
875 681 pout_planar_y = dst;
876 DecompressBandBayer(pwc->decompress_data, 682 pout_planar_u = dst + plane_size;
877 src, 683 pout_planar_v = dst + plane_size + plane_size / 4;
878 rgbout, 684
879 pwc->image.x, pwc->view.x); 685 while (bandlines_left--) {
880 686 DecompressBand23(pwc->decompress_data,
881 src += pwc->vbandlength; 687 src,
882 rgbout += bytes_per_block; 688 pout_planar_y, pout_planar_u, pout_planar_v,
883 689 pwc->width, pwc->width);
884 } 690 src += pwc->vbandlength;
885#else 691 pout_planar_y += bytes_per_block;
886 memset(dst, 0, pwc->view.x * pwc->view.y); 692 pout_planar_u += pwc->width;
887#endif 693 pout_planar_v += pwc->width;
888
889 } else {
890 /* YUV420P image format */
891 unsigned char *pout_planar_y;
892 unsigned char *pout_planar_u;
893 unsigned char *pout_planar_v;
894 unsigned int plane_size;
895
896 plane_size = pwc->view.x * pwc->view.y;
897
898 /* offset in Y plane */
899 stride = pwc->view.x * pwc->offset.y;
900 pout_planar_y = dst + stride + pwc->offset.x;
901
902 /* offsets in U/V planes */
903 stride = (pwc->view.x * pwc->offset.y) / 4 + pwc->offset.x / 2;
904 pout_planar_u = dst + plane_size + stride;
905 pout_planar_v = dst + plane_size + plane_size / 4 + stride;
906
907 while (bandlines_left--) {
908
909 DecompressBand23(pwc->decompress_data,
910 src,
911 pout_planar_y, pout_planar_u, pout_planar_v,
912 pwc->image.x, pwc->view.x);
913 src += pwc->vbandlength;
914 pout_planar_y += bytes_per_block;
915 pout_planar_u += pwc->view.x;
916 pout_planar_v += pwc->view.x;
917
918 }
919 } 694 }
695 mutex_unlock(&pdec->lock);
920} 696}
diff --git a/drivers/media/video/pwc/pwc-dec23.h b/drivers/media/video/pwc/pwc-dec23.h
index a0ac4f3dff8..d64a3c281af 100644
--- a/drivers/media/video/pwc/pwc-dec23.h
+++ b/drivers/media/video/pwc/pwc-dec23.h
@@ -29,6 +29,8 @@
29 29
30struct pwc_dec23_private 30struct pwc_dec23_private
31{ 31{
32 struct mutex lock;
33
32 unsigned int scalebits; 34 unsigned int scalebits;
33 unsigned int nbitsmask, nbits; /* Number of bits of a color in the compressed stream */ 35 unsigned int nbitsmask, nbits; /* Number of bits of a color in the compressed stream */
34 36
@@ -52,6 +54,5 @@ struct pwc_dec23_private
52int pwc_dec23_init(struct pwc_device *pwc, int type, unsigned char *cmd); 54int pwc_dec23_init(struct pwc_device *pwc, int type, unsigned char *cmd);
53void pwc_dec23_decompress(const struct pwc_device *pwc, 55void pwc_dec23_decompress(const struct pwc_device *pwc,
54 const void *src, 56 const void *src,
55 void *dst, 57 void *dst);
56 int flags);
57#endif 58#endif
diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c
index 01ff643e682..943d37ad0d3 100644
--- a/drivers/media/video/pwc/pwc-if.c
+++ b/drivers/media/video/pwc/pwc-if.c
@@ -134,7 +134,6 @@ static int default_fps = 10;
134#endif 134#endif
135static int power_save = -1; 135static int power_save = -1;
136static int led_on = 100, led_off; /* defaults to LED that is on while in use */ 136static int led_on = 100, led_off; /* defaults to LED that is on while in use */
137static int pwc_preferred_compression = 1; /* 0..3 = uncompressed..high */
138static struct { 137static struct {
139 int type; 138 int type;
140 char serial_number[30]; 139 char serial_number[30];
@@ -144,17 +143,15 @@ static struct {
144 143
145/***/ 144/***/
146 145
147static int pwc_video_open(struct file *file);
148static int pwc_video_close(struct file *file); 146static int pwc_video_close(struct file *file);
149static ssize_t pwc_video_read(struct file *file, char __user *buf, 147static ssize_t pwc_video_read(struct file *file, char __user *buf,
150 size_t count, loff_t *ppos); 148 size_t count, loff_t *ppos);
151static unsigned int pwc_video_poll(struct file *file, poll_table *wait); 149static unsigned int pwc_video_poll(struct file *file, poll_table *wait);
152static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma); 150static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma);
153static void pwc_video_release(struct video_device *vfd);
154 151
155static const struct v4l2_file_operations pwc_fops = { 152static const struct v4l2_file_operations pwc_fops = {
156 .owner = THIS_MODULE, 153 .owner = THIS_MODULE,
157 .open = pwc_video_open, 154 .open = v4l2_fh_open,
158 .release = pwc_video_close, 155 .release = pwc_video_close,
159 .read = pwc_video_read, 156 .read = pwc_video_read,
160 .poll = pwc_video_poll, 157 .poll = pwc_video_poll,
@@ -163,7 +160,7 @@ static const struct v4l2_file_operations pwc_fops = {
163}; 160};
164static struct video_device pwc_template = { 161static struct video_device pwc_template = {
165 .name = "Philips Webcam", /* Filled in later */ 162 .name = "Philips Webcam", /* Filled in later */
166 .release = pwc_video_release, 163 .release = video_device_release_empty,
167 .fops = &pwc_fops, 164 .fops = &pwc_fops,
168 .ioctl_ops = &pwc_ioctl_ops, 165 .ioctl_ops = &pwc_ioctl_ops,
169}; 166};
@@ -191,7 +188,6 @@ static void pwc_snapshot_button(struct pwc_device *pdev, int down)
191{ 188{
192 if (down) { 189 if (down) {
193 PWC_TRACE("Snapshot button pressed.\n"); 190 PWC_TRACE("Snapshot button pressed.\n");
194 pdev->snapshot_button_status = 1;
195 } else { 191 } else {
196 PWC_TRACE("Snapshot button released.\n"); 192 PWC_TRACE("Snapshot button released.\n");
197 } 193 }
@@ -375,6 +371,7 @@ static int pwc_isoc_init(struct pwc_device *pdev)
375 int i, j, ret; 371 int i, j, ret;
376 struct usb_interface *intf; 372 struct usb_interface *intf;
377 struct usb_host_interface *idesc = NULL; 373 struct usb_host_interface *idesc = NULL;
374 int compression = 0; /* 0..3 = uncompressed..high */
378 375
379 if (pdev->iso_init) 376 if (pdev->iso_init)
380 return 0; 377 return 0;
@@ -386,6 +383,12 @@ static int pwc_isoc_init(struct pwc_device *pdev)
386 pdev->visoc_errors = 0; 383 pdev->visoc_errors = 0;
387 udev = pdev->udev; 384 udev = pdev->udev;
388 385
386retry:
387 /* We first try with low compression and then retry with a higher
388 compression setting if there is not enough bandwidth. */
389 ret = pwc_set_video_mode(pdev, pdev->width, pdev->height,
390 pdev->vframes, &compression);
391
389 /* Get the current alternate interface, adjust packet size */ 392 /* Get the current alternate interface, adjust packet size */
390 intf = usb_ifnum_to_if(udev, 0); 393 intf = usb_ifnum_to_if(udev, 0);
391 if (intf) 394 if (intf)
@@ -408,9 +411,12 @@ static int pwc_isoc_init(struct pwc_device *pdev)
408 } 411 }
409 412
410 /* Set alternate interface */ 413 /* Set alternate interface */
411 ret = 0;
412 PWC_DEBUG_OPEN("Setting alternate interface %d\n", pdev->valternate); 414 PWC_DEBUG_OPEN("Setting alternate interface %d\n", pdev->valternate);
413 ret = usb_set_interface(pdev->udev, 0, pdev->valternate); 415 ret = usb_set_interface(pdev->udev, 0, pdev->valternate);
416 if (ret == -ENOSPC && compression < 3) {
417 compression++;
418 goto retry;
419 }
414 if (ret < 0) 420 if (ret < 0)
415 return ret; 421 return ret;
416 422
@@ -454,6 +460,12 @@ static int pwc_isoc_init(struct pwc_device *pdev)
454 /* link */ 460 /* link */
455 for (i = 0; i < MAX_ISO_BUFS; i++) { 461 for (i = 0; i < MAX_ISO_BUFS; i++) {
456 ret = usb_submit_urb(pdev->urbs[i], GFP_KERNEL); 462 ret = usb_submit_urb(pdev->urbs[i], GFP_KERNEL);
463 if (ret == -ENOSPC && compression < 3) {
464 compression++;
465 pdev->iso_init = 1;
466 pwc_isoc_cleanup(pdev);
467 goto retry;
468 }
457 if (ret) { 469 if (ret) {
458 PWC_ERROR("isoc_init() submit_urb %d failed with error %d\n", i, ret); 470 PWC_ERROR("isoc_init() submit_urb %d failed with error %d\n", i, ret);
459 pdev->iso_init = 1; 471 pdev->iso_init = 1;
@@ -517,12 +529,11 @@ static void pwc_isoc_cleanup(struct pwc_device *pdev)
517 PWC_DEBUG_OPEN("<< pwc_isoc_cleanup()\n"); 529 PWC_DEBUG_OPEN("<< pwc_isoc_cleanup()\n");
518} 530}
519 531
520/*
521 * Release all queued buffers, no need to take queued_bufs_lock, since all
522 * iso urbs have been killed when we're called so pwc_isoc_handler won't run.
523 */
524static void pwc_cleanup_queued_bufs(struct pwc_device *pdev) 532static void pwc_cleanup_queued_bufs(struct pwc_device *pdev)
525{ 533{
534 unsigned long flags = 0;
535
536 spin_lock_irqsave(&pdev->queued_bufs_lock, flags);
526 while (!list_empty(&pdev->queued_bufs)) { 537 while (!list_empty(&pdev->queued_bufs)) {
527 struct pwc_frame_buf *buf; 538 struct pwc_frame_buf *buf;
528 539
@@ -531,84 +542,7 @@ static void pwc_cleanup_queued_bufs(struct pwc_device *pdev)
531 list_del(&buf->list); 542 list_del(&buf->list);
532 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); 543 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
533 } 544 }
534} 545 spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags);
535
536/*********
537 * sysfs
538 *********/
539static struct pwc_device *cd_to_pwc(struct device *cd)
540{
541 struct video_device *vdev = to_video_device(cd);
542 return video_get_drvdata(vdev);
543}
544
545static ssize_t show_pan_tilt(struct device *class_dev,
546 struct device_attribute *attr, char *buf)
547{
548 struct pwc_device *pdev = cd_to_pwc(class_dev);
549 return sprintf(buf, "%d %d\n", pdev->pan_angle, pdev->tilt_angle);
550}
551
552static ssize_t store_pan_tilt(struct device *class_dev,
553 struct device_attribute *attr,
554 const char *buf, size_t count)
555{
556 struct pwc_device *pdev = cd_to_pwc(class_dev);
557 int pan, tilt;
558 int ret = -EINVAL;
559
560 if (strncmp(buf, "reset", 5) == 0)
561 ret = pwc_mpt_reset(pdev, 0x3);
562
563 else if (sscanf(buf, "%d %d", &pan, &tilt) > 0)
564 ret = pwc_mpt_set_angle(pdev, pan, tilt);
565
566 if (ret < 0)
567 return ret;
568 return strlen(buf);
569}
570static DEVICE_ATTR(pan_tilt, S_IRUGO | S_IWUSR, show_pan_tilt,
571 store_pan_tilt);
572
573static ssize_t show_snapshot_button_status(struct device *class_dev,
574 struct device_attribute *attr, char *buf)
575{
576 struct pwc_device *pdev = cd_to_pwc(class_dev);
577 int status = pdev->snapshot_button_status;
578 pdev->snapshot_button_status = 0;
579 return sprintf(buf, "%d\n", status);
580}
581
582static DEVICE_ATTR(button, S_IRUGO | S_IWUSR, show_snapshot_button_status,
583 NULL);
584
585static int pwc_create_sysfs_files(struct pwc_device *pdev)
586{
587 int rc;
588
589 rc = device_create_file(&pdev->vdev.dev, &dev_attr_button);
590 if (rc)
591 goto err;
592 if (pdev->features & FEATURE_MOTOR_PANTILT) {
593 rc = device_create_file(&pdev->vdev.dev, &dev_attr_pan_tilt);
594 if (rc)
595 goto err_button;
596 }
597
598 return 0;
599
600err_button:
601 device_remove_file(&pdev->vdev.dev, &dev_attr_button);
602err:
603 PWC_ERROR("Could not create sysfs files.\n");
604 return rc;
605}
606
607static void pwc_remove_sysfs_files(struct pwc_device *pdev)
608{
609 if (pdev->features & FEATURE_MOTOR_PANTILT)
610 device_remove_file(&pdev->vdev.dev, &dev_attr_pan_tilt);
611 device_remove_file(&pdev->vdev.dev, &dev_attr_button);
612} 546}
613 547
614#ifdef CONFIG_USB_PWC_DEBUG 548#ifdef CONFIG_USB_PWC_DEBUG
@@ -644,25 +578,25 @@ static const char *pwc_sensor_type_to_string(unsigned int sensor_type)
644/***************************************************************************/ 578/***************************************************************************/
645/* Video4Linux functions */ 579/* Video4Linux functions */
646 580
647static int pwc_video_open(struct file *file) 581int pwc_test_n_set_capt_file(struct pwc_device *pdev, struct file *file)
648{ 582{
649 struct video_device *vdev = video_devdata(file); 583 int r = 0;
650 struct pwc_device *pdev;
651
652 PWC_DEBUG_OPEN(">> video_open called(vdev = 0x%p).\n", vdev);
653 584
654 pdev = video_get_drvdata(vdev); 585 mutex_lock(&pdev->capt_file_lock);
655 if (!pdev->udev) 586 if (pdev->capt_file != NULL &&
656 return -ENODEV; 587 pdev->capt_file != file) {
657 588 r = -EBUSY;
658 file->private_data = vdev; 589 goto leave;
659 PWC_DEBUG_OPEN("<< video_open() returns 0.\n"); 590 }
660 return 0; 591 pdev->capt_file = file;
592leave:
593 mutex_unlock(&pdev->capt_file_lock);
594 return r;
661} 595}
662 596
663static void pwc_video_release(struct video_device *vfd) 597static void pwc_video_release(struct v4l2_device *v)
664{ 598{
665 struct pwc_device *pdev = container_of(vfd, struct pwc_device, vdev); 599 struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev);
666 int hint; 600 int hint;
667 601
668 /* search device_hint[] table if we occupy a slot, by any chance */ 602 /* search device_hint[] table if we occupy a slot, by any chance */
@@ -685,44 +619,33 @@ static void pwc_video_release(struct video_device *vfd)
685 619
686static int pwc_video_close(struct file *file) 620static int pwc_video_close(struct file *file)
687{ 621{
688 struct video_device *vdev = file->private_data; 622 struct pwc_device *pdev = video_drvdata(file);
689 struct pwc_device *pdev;
690
691 PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev);
692 623
693 pdev = video_get_drvdata(vdev);
694 if (pdev->capt_file == file) { 624 if (pdev->capt_file == file) {
695 vb2_queue_release(&pdev->vb_queue); 625 vb2_queue_release(&pdev->vb_queue);
696 pdev->capt_file = NULL; 626 pdev->capt_file = NULL;
697 } 627 }
698 628 return v4l2_fh_release(file);
699 PWC_DEBUG_OPEN("<< video_close()\n");
700 return 0;
701} 629}
702 630
703static ssize_t pwc_video_read(struct file *file, char __user *buf, 631static ssize_t pwc_video_read(struct file *file, char __user *buf,
704 size_t count, loff_t *ppos) 632 size_t count, loff_t *ppos)
705{ 633{
706 struct video_device *vdev = file->private_data; 634 struct pwc_device *pdev = video_drvdata(file);
707 struct pwc_device *pdev = video_get_drvdata(vdev);
708 635
709 if (!pdev->udev) 636 if (!pdev->udev)
710 return -ENODEV; 637 return -ENODEV;
711 638
712 if (pdev->capt_file != NULL && 639 if (pwc_test_n_set_capt_file(pdev, file))
713 pdev->capt_file != file)
714 return -EBUSY; 640 return -EBUSY;
715 641
716 pdev->capt_file = file;
717
718 return vb2_read(&pdev->vb_queue, buf, count, ppos, 642 return vb2_read(&pdev->vb_queue, buf, count, ppos,
719 file->f_flags & O_NONBLOCK); 643 file->f_flags & O_NONBLOCK);
720} 644}
721 645
722static unsigned int pwc_video_poll(struct file *file, poll_table *wait) 646static unsigned int pwc_video_poll(struct file *file, poll_table *wait)
723{ 647{
724 struct video_device *vdev = file->private_data; 648 struct pwc_device *pdev = video_drvdata(file);
725 struct pwc_device *pdev = video_get_drvdata(vdev);
726 649
727 if (!pdev->udev) 650 if (!pdev->udev)
728 return POLL_ERR; 651 return POLL_ERR;
@@ -732,8 +655,7 @@ static unsigned int pwc_video_poll(struct file *file, poll_table *wait)
732 655
733static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma) 656static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma)
734{ 657{
735 struct video_device *vdev = file->private_data; 658 struct pwc_device *pdev = video_drvdata(file);
736 struct pwc_device *pdev = video_get_drvdata(vdev);
737 659
738 if (pdev->capt_file != file) 660 if (pdev->capt_file != file)
739 return -EBUSY; 661 return -EBUSY;
@@ -749,6 +671,7 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
749 unsigned int sizes[], void *alloc_ctxs[]) 671 unsigned int sizes[], void *alloc_ctxs[])
750{ 672{
751 struct pwc_device *pdev = vb2_get_drv_priv(vq); 673 struct pwc_device *pdev = vb2_get_drv_priv(vq);
674 int size;
752 675
753 if (*nbuffers < MIN_FRAMES) 676 if (*nbuffers < MIN_FRAMES)
754 *nbuffers = MIN_FRAMES; 677 *nbuffers = MIN_FRAMES;
@@ -757,7 +680,9 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
757 680
758 *nplanes = 1; 681 *nplanes = 1;
759 682
760 sizes[0] = PAGE_ALIGN((pdev->abs_max.x * pdev->abs_max.y * 3) / 2); 683 size = pwc_get_size(pdev, MAX_WIDTH, MAX_HEIGHT);
684 sizes[0] = PAGE_ALIGN(pwc_image_sizes[size][0] *
685 pwc_image_sizes[size][1] * 3 / 2);
761 686
762 return 0; 687 return 0;
763} 688}
@@ -812,56 +737,59 @@ static void buffer_queue(struct vb2_buffer *vb)
812 unsigned long flags = 0; 737 unsigned long flags = 0;
813 738
814 spin_lock_irqsave(&pdev->queued_bufs_lock, flags); 739 spin_lock_irqsave(&pdev->queued_bufs_lock, flags);
815 list_add_tail(&buf->list, &pdev->queued_bufs); 740 /* Check the device has not disconnected between prep and queuing */
741 if (pdev->udev)
742 list_add_tail(&buf->list, &pdev->queued_bufs);
743 else
744 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
816 spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags); 745 spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags);
817} 746}
818 747
819static int start_streaming(struct vb2_queue *vq, unsigned int count) 748static int start_streaming(struct vb2_queue *vq, unsigned int count)
820{ 749{
821 struct pwc_device *pdev = vb2_get_drv_priv(vq); 750 struct pwc_device *pdev = vb2_get_drv_priv(vq);
751 int r;
822 752
823 if (!pdev->udev) 753 mutex_lock(&pdev->udevlock);
824 return -ENODEV; 754 if (!pdev->udev) {
755 r = -ENODEV;
756 goto leave;
757 }
825 758
826 /* Turn on camera and set LEDS on */ 759 /* Turn on camera and set LEDS on */
827 pwc_camera_power(pdev, 1); 760 pwc_camera_power(pdev, 1);
828 if (pdev->power_save) {
829 /* Restore video mode */
830 pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y,
831 pdev->vframes, pdev->vcompression,
832 pdev->vsnapshot);
833 }
834 pwc_set_leds(pdev, led_on, led_off); 761 pwc_set_leds(pdev, led_on, led_off);
835 762
836 return pwc_isoc_init(pdev); 763 r = pwc_isoc_init(pdev);
764 if (r) {
765 /* If we failed turn camera and LEDS back off */
766 pwc_set_leds(pdev, 0, 0);
767 pwc_camera_power(pdev, 0);
768 /* And cleanup any queued bufs!! */
769 pwc_cleanup_queued_bufs(pdev);
770 }
771leave:
772 mutex_unlock(&pdev->udevlock);
773 return r;
837} 774}
838 775
839static int stop_streaming(struct vb2_queue *vq) 776static int stop_streaming(struct vb2_queue *vq)
840{ 777{
841 struct pwc_device *pdev = vb2_get_drv_priv(vq); 778 struct pwc_device *pdev = vb2_get_drv_priv(vq);
842 779
780 mutex_lock(&pdev->udevlock);
843 if (pdev->udev) { 781 if (pdev->udev) {
844 pwc_set_leds(pdev, 0, 0); 782 pwc_set_leds(pdev, 0, 0);
845 pwc_camera_power(pdev, 0); 783 pwc_camera_power(pdev, 0);
846 pwc_isoc_cleanup(pdev); 784 pwc_isoc_cleanup(pdev);
847 } 785 }
786 mutex_unlock(&pdev->udevlock);
787
848 pwc_cleanup_queued_bufs(pdev); 788 pwc_cleanup_queued_bufs(pdev);
849 789
850 return 0; 790 return 0;
851} 791}
852 792
853static void pwc_lock(struct vb2_queue *vq)
854{
855 struct pwc_device *pdev = vb2_get_drv_priv(vq);
856 mutex_lock(&pdev->modlock);
857}
858
859static void pwc_unlock(struct vb2_queue *vq)
860{
861 struct pwc_device *pdev = vb2_get_drv_priv(vq);
862 mutex_unlock(&pdev->modlock);
863}
864
865static struct vb2_ops pwc_vb_queue_ops = { 793static struct vb2_ops pwc_vb_queue_ops = {
866 .queue_setup = queue_setup, 794 .queue_setup = queue_setup,
867 .buf_init = buffer_init, 795 .buf_init = buffer_init,
@@ -871,8 +799,6 @@ static struct vb2_ops pwc_vb_queue_ops = {
871 .buf_queue = buffer_queue, 799 .buf_queue = buffer_queue,
872 .start_streaming = start_streaming, 800 .start_streaming = start_streaming,
873 .stop_streaming = stop_streaming, 801 .stop_streaming = stop_streaming,
874 .wait_prepare = pwc_unlock,
875 .wait_finish = pwc_lock,
876}; 802};
877 803
878/***************************************************************************/ 804/***************************************************************************/
@@ -889,6 +815,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
889 int vendor_id, product_id, type_id; 815 int vendor_id, product_id, type_id;
890 int hint, rc; 816 int hint, rc;
891 int features = 0; 817 int features = 0;
818 int compression = 0;
892 int video_nr = -1; /* default: use next available device */ 819 int video_nr = -1; /* default: use next available device */
893 int my_power_save = power_save; 820 int my_power_save = power_save;
894 char serial_number[30], *name; 821 char serial_number[30], *name;
@@ -1150,27 +1077,15 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1150 } 1077 }
1151 pdev->type = type_id; 1078 pdev->type = type_id;
1152 pdev->vframes = default_fps; 1079 pdev->vframes = default_fps;
1153 strcpy(pdev->serial, serial_number);
1154 pdev->features = features; 1080 pdev->features = features;
1155 if (vendor_id == 0x046D && product_id == 0x08B5) {
1156 /* Logitech QuickCam Orbit
1157 The ranges have been determined experimentally; they may differ from cam to cam.
1158 Also, the exact ranges left-right and up-down are different for my cam
1159 */
1160 pdev->angle_range.pan_min = -7000;
1161 pdev->angle_range.pan_max = 7000;
1162 pdev->angle_range.tilt_min = -3000;
1163 pdev->angle_range.tilt_max = 2500;
1164 }
1165 pwc_construct(pdev); /* set min/max sizes correct */ 1081 pwc_construct(pdev); /* set min/max sizes correct */
1166 1082
1167 mutex_init(&pdev->modlock); 1083 mutex_init(&pdev->capt_file_lock);
1168 mutex_init(&pdev->udevlock); 1084 mutex_init(&pdev->udevlock);
1169 spin_lock_init(&pdev->queued_bufs_lock); 1085 spin_lock_init(&pdev->queued_bufs_lock);
1170 INIT_LIST_HEAD(&pdev->queued_bufs); 1086 INIT_LIST_HEAD(&pdev->queued_bufs);
1171 1087
1172 pdev->udev = udev; 1088 pdev->udev = udev;
1173 pdev->vcompression = pwc_preferred_compression;
1174 pdev->power_save = my_power_save; 1089 pdev->power_save = my_power_save;
1175 1090
1176 /* Init videobuf2 queue structure */ 1091 /* Init videobuf2 queue structure */
@@ -1185,9 +1100,8 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1185 1100
1186 /* Init video_device structure */ 1101 /* Init video_device structure */
1187 memcpy(&pdev->vdev, &pwc_template, sizeof(pwc_template)); 1102 memcpy(&pdev->vdev, &pwc_template, sizeof(pwc_template));
1188 pdev->vdev.parent = &intf->dev;
1189 pdev->vdev.lock = &pdev->modlock;
1190 strcpy(pdev->vdev.name, name); 1103 strcpy(pdev->vdev.name, name);
1104 set_bit(V4L2_FL_USE_FH_PRIO, &pdev->vdev.flags);
1191 video_set_drvdata(&pdev->vdev, pdev); 1105 video_set_drvdata(&pdev->vdev, pdev);
1192 1106
1193 pdev->release = le16_to_cpu(udev->descriptor.bcdDevice); 1107 pdev->release = le16_to_cpu(udev->descriptor.bcdDevice);
@@ -1211,9 +1125,6 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1211 if (hint < MAX_DEV_HINTS) 1125 if (hint < MAX_DEV_HINTS)
1212 device_hint[hint].pdev = pdev; 1126 device_hint[hint].pdev = pdev;
1213 1127
1214 PWC_DEBUG_PROBE("probe() function returning struct at 0x%p.\n", pdev);
1215 usb_set_intfdata(intf, pdev);
1216
1217#ifdef CONFIG_USB_PWC_DEBUG 1128#ifdef CONFIG_USB_PWC_DEBUG
1218 /* Query sensor type */ 1129 /* Query sensor type */
1219 if (pwc_get_cmos_sensor(pdev, &rc) >= 0) { 1130 if (pwc_get_cmos_sensor(pdev, &rc) >= 0) {
@@ -1227,8 +1138,8 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1227 pwc_set_leds(pdev, 0, 0); 1138 pwc_set_leds(pdev, 0, 0);
1228 1139
1229 /* Setup intial videomode */ 1140 /* Setup intial videomode */
1230 rc = pwc_set_video_mode(pdev, pdev->view_max.x, pdev->view_max.y, 1141 rc = pwc_set_video_mode(pdev, MAX_WIDTH, MAX_HEIGHT, pdev->vframes,
1231 pdev->vframes, pdev->vcompression, 0); 1142 &compression);
1232 if (rc) 1143 if (rc)
1233 goto err_free_mem; 1144 goto err_free_mem;
1234 1145
@@ -1239,20 +1150,25 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1239 goto err_free_mem; 1150 goto err_free_mem;
1240 } 1151 }
1241 1152
1242 pdev->vdev.ctrl_handler = &pdev->ctrl_handler;
1243
1244 /* And powerdown the camera until streaming starts */ 1153 /* And powerdown the camera until streaming starts */
1245 pwc_camera_power(pdev, 0); 1154 pwc_camera_power(pdev, 0);
1246 1155
1156 /* Register the v4l2_device structure */
1157 pdev->v4l2_dev.release = pwc_video_release;
1158 rc = v4l2_device_register(&intf->dev, &pdev->v4l2_dev);
1159 if (rc) {
1160 PWC_ERROR("Failed to register v4l2-device (%d).\n", rc);
1161 goto err_free_controls;
1162 }
1163
1164 pdev->v4l2_dev.ctrl_handler = &pdev->ctrl_handler;
1165 pdev->vdev.v4l2_dev = &pdev->v4l2_dev;
1166
1247 rc = video_register_device(&pdev->vdev, VFL_TYPE_GRABBER, video_nr); 1167 rc = video_register_device(&pdev->vdev, VFL_TYPE_GRABBER, video_nr);
1248 if (rc < 0) { 1168 if (rc < 0) {
1249 PWC_ERROR("Failed to register as video device (%d).\n", rc); 1169 PWC_ERROR("Failed to register as video device (%d).\n", rc);
1250 goto err_free_controls; 1170 goto err_unregister_v4l2_dev;
1251 } 1171 }
1252 rc = pwc_create_sysfs_files(pdev);
1253 if (rc)
1254 goto err_video_unreg;
1255
1256 PWC_INFO("Registered as %s.\n", video_device_node_name(&pdev->vdev)); 1172 PWC_INFO("Registered as %s.\n", video_device_node_name(&pdev->vdev));
1257 1173
1258#ifdef CONFIG_USB_PWC_INPUT_EVDEV 1174#ifdef CONFIG_USB_PWC_INPUT_EVDEV
@@ -1261,7 +1177,6 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1261 if (!pdev->button_dev) { 1177 if (!pdev->button_dev) {
1262 PWC_ERROR("Err, insufficient memory for webcam snapshot button device."); 1178 PWC_ERROR("Err, insufficient memory for webcam snapshot button device.");
1263 rc = -ENOMEM; 1179 rc = -ENOMEM;
1264 pwc_remove_sysfs_files(pdev);
1265 goto err_video_unreg; 1180 goto err_video_unreg;
1266 } 1181 }
1267 1182
@@ -1279,7 +1194,6 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1279 if (rc) { 1194 if (rc) {
1280 input_free_device(pdev->button_dev); 1195 input_free_device(pdev->button_dev);
1281 pdev->button_dev = NULL; 1196 pdev->button_dev = NULL;
1282 pwc_remove_sysfs_files(pdev);
1283 goto err_video_unreg; 1197 goto err_video_unreg;
1284 } 1198 }
1285#endif 1199#endif
@@ -1287,13 +1201,14 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
1287 return 0; 1201 return 0;
1288 1202
1289err_video_unreg: 1203err_video_unreg:
1290 if (hint < MAX_DEV_HINTS)
1291 device_hint[hint].pdev = NULL;
1292 video_unregister_device(&pdev->vdev); 1204 video_unregister_device(&pdev->vdev);
1205err_unregister_v4l2_dev:
1206 v4l2_device_unregister(&pdev->v4l2_dev);
1293err_free_controls: 1207err_free_controls:
1294 v4l2_ctrl_handler_free(&pdev->ctrl_handler); 1208 v4l2_ctrl_handler_free(&pdev->ctrl_handler);
1295err_free_mem: 1209err_free_mem:
1296 usb_set_intfdata(intf, NULL); 1210 if (hint < MAX_DEV_HINTS)
1211 device_hint[hint].pdev = NULL;
1297 kfree(pdev); 1212 kfree(pdev);
1298 return rc; 1213 return rc;
1299} 1214}
@@ -1301,27 +1216,26 @@ err_free_mem:
1301/* The user yanked out the cable... */ 1216/* The user yanked out the cable... */
1302static void usb_pwc_disconnect(struct usb_interface *intf) 1217static void usb_pwc_disconnect(struct usb_interface *intf)
1303{ 1218{
1304 struct pwc_device *pdev = usb_get_intfdata(intf); 1219 struct v4l2_device *v = usb_get_intfdata(intf);
1220 struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev);
1305 1221
1306 mutex_lock(&pdev->udevlock); 1222 mutex_lock(&pdev->udevlock);
1307 mutex_lock(&pdev->modlock);
1308
1309 usb_set_intfdata(intf, NULL);
1310 /* No need to keep the urbs around after disconnection */ 1223 /* No need to keep the urbs around after disconnection */
1311 pwc_isoc_cleanup(pdev); 1224 pwc_isoc_cleanup(pdev);
1312 pwc_cleanup_queued_bufs(pdev);
1313 pdev->udev = NULL; 1225 pdev->udev = NULL;
1314
1315 mutex_unlock(&pdev->modlock);
1316 mutex_unlock(&pdev->udevlock); 1226 mutex_unlock(&pdev->udevlock);
1317 1227
1318 pwc_remove_sysfs_files(pdev); 1228 pwc_cleanup_queued_bufs(pdev);
1229
1319 video_unregister_device(&pdev->vdev); 1230 video_unregister_device(&pdev->vdev);
1231 v4l2_device_unregister(&pdev->v4l2_dev);
1320 1232
1321#ifdef CONFIG_USB_PWC_INPUT_EVDEV 1233#ifdef CONFIG_USB_PWC_INPUT_EVDEV
1322 if (pdev->button_dev) 1234 if (pdev->button_dev)
1323 input_unregister_device(pdev->button_dev); 1235 input_unregister_device(pdev->button_dev);
1324#endif 1236#endif
1237
1238 v4l2_device_put(&pdev->v4l2_dev);
1325} 1239}
1326 1240
1327 1241
@@ -1330,7 +1244,6 @@ static void usb_pwc_disconnect(struct usb_interface *intf)
1330 */ 1244 */
1331 1245
1332static int fps; 1246static int fps;
1333static int compression = -1;
1334static int leds[2] = { -1, -1 }; 1247static int leds[2] = { -1, -1 };
1335static unsigned int leds_nargs; 1248static unsigned int leds_nargs;
1336static char *dev_hint[MAX_DEV_HINTS]; 1249static char *dev_hint[MAX_DEV_HINTS];
@@ -1341,7 +1254,6 @@ module_param(fps, int, 0444);
1341module_param_named(trace, pwc_trace, int, 0644); 1254module_param_named(trace, pwc_trace, int, 0644);
1342#endif 1255#endif
1343module_param(power_save, int, 0644); 1256module_param(power_save, int, 0644);
1344module_param(compression, int, 0444);
1345module_param_array(leds, int, &leds_nargs, 0444); 1257module_param_array(leds, int, &leds_nargs, 0444);
1346module_param_array(dev_hint, charp, &dev_hint_nargs, 0444); 1258module_param_array(dev_hint, charp, &dev_hint_nargs, 0444);
1347 1259
@@ -1350,7 +1262,6 @@ MODULE_PARM_DESC(fps, "Initial frames per second. Varies with model, useful rang
1350MODULE_PARM_DESC(trace, "For debugging purposes"); 1262MODULE_PARM_DESC(trace, "For debugging purposes");
1351#endif 1263#endif
1352MODULE_PARM_DESC(power_save, "Turn power saving for new cameras on or off"); 1264MODULE_PARM_DESC(power_save, "Turn power saving for new cameras on or off");
1353MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)");
1354MODULE_PARM_DESC(leds, "LED on,off time in milliseconds"); 1265MODULE_PARM_DESC(leds, "LED on,off time in milliseconds");
1355MODULE_PARM_DESC(dev_hint, "Device node hints"); 1266MODULE_PARM_DESC(dev_hint, "Device node hints");
1356 1267
@@ -1384,14 +1295,6 @@ static int __init usb_pwc_init(void)
1384 PWC_DEBUG_MODULE("Default framerate set to %d.\n", default_fps); 1295 PWC_DEBUG_MODULE("Default framerate set to %d.\n", default_fps);
1385 } 1296 }
1386 1297
1387 if (compression >= 0) {
1388 if (compression > 3) {
1389 PWC_ERROR("Invalid compression setting; use a number between 0 (uncompressed) and 3 (high).\n");
1390 return -EINVAL;
1391 }
1392 pwc_preferred_compression = compression;
1393 PWC_DEBUG_MODULE("Preferred compression set to %d.\n", pwc_preferred_compression);
1394 }
1395 if (leds[0] >= 0) 1298 if (leds[0] >= 0)
1396 led_on = leds[0]; 1299 led_on = leds[0];
1397 if (leds[1] >= 0) 1300 if (leds[1] >= 0)
diff --git a/drivers/media/video/pwc/pwc-kiara.h b/drivers/media/video/pwc/pwc-kiara.h
index 047dad8c15f..8e02b7ac213 100644
--- a/drivers/media/video/pwc/pwc-kiara.h
+++ b/drivers/media/video/pwc/pwc-kiara.h
@@ -27,7 +27,7 @@
27#ifndef PWC_KIARA_H 27#ifndef PWC_KIARA_H
28#define PWC_KIARA_H 28#define PWC_KIARA_H
29 29
30#include <media/pwc-ioctl.h> 30#include "pwc.h"
31 31
32#define PWC_FPS_MAX_KIARA 6 32#define PWC_FPS_MAX_KIARA 6
33 33
diff --git a/drivers/media/video/pwc/pwc-misc.c b/drivers/media/video/pwc/pwc-misc.c
index 0b031336eab..23a55b5814f 100644
--- a/drivers/media/video/pwc/pwc-misc.c
+++ b/drivers/media/video/pwc/pwc-misc.c
@@ -27,67 +27,47 @@
27 27
28#include "pwc.h" 28#include "pwc.h"
29 29
30const struct pwc_coord pwc_image_sizes[PSZ_MAX] = 30const int pwc_image_sizes[PSZ_MAX][2] =
31{ 31{
32 { 128, 96, 0 }, /* sqcif */ 32 { 128, 96 }, /* sqcif */
33 { 160, 120, 0 }, /* qsif */ 33 { 160, 120 }, /* qsif */
34 { 176, 144, 0 }, /* qcif */ 34 { 176, 144 }, /* qcif */
35 { 320, 240, 0 }, /* sif */ 35 { 320, 240 }, /* sif */
36 { 352, 288, 0 }, /* cif */ 36 { 352, 288 }, /* cif */
37 { 640, 480, 0 }, /* vga */ 37 { 640, 480 }, /* vga */
38}; 38};
39 39
40/* x,y -> PSZ_ */ 40/* x,y -> PSZ_ */
41int pwc_decode_size(struct pwc_device *pdev, int width, int height) 41int pwc_get_size(struct pwc_device *pdev, int width, int height)
42{ 42{
43 int i, find; 43 int i;
44
45 /* Make sure we don't go beyond our max size.
46 NB: we have different limits for RAW and normal modes. In case
47 you don't have the decompressor loaded or use RAW mode,
48 the maximum viewable size is smaller.
49 */
50 if (pdev->pixfmt != V4L2_PIX_FMT_YUV420)
51 {
52 if (width > pdev->abs_max.x || height > pdev->abs_max.y)
53 {
54 PWC_DEBUG_SIZE("VIDEO_PALETTE_RAW: going beyond abs_max.\n");
55 return -1;
56 }
57 }
58 else
59 {
60 if (width > pdev->view_max.x || height > pdev->view_max.y)
61 {
62 PWC_DEBUG_SIZE("VIDEO_PALETTE_not RAW: going beyond view_max.\n");
63 return -1;
64 }
65 }
66 44
67 /* Find the largest size supported by the camera that fits into the 45 /* Find the largest size supported by the camera that fits into the
68 requested size. 46 requested size. */
69 */ 47 for (i = PSZ_MAX - 1; i >= 0; i--) {
70 find = -1; 48 if (!(pdev->image_mask & (1 << i)))
49 continue;
50
51 if (pwc_image_sizes[i][0] <= width &&
52 pwc_image_sizes[i][1] <= height)
53 return i;
54 }
55
56 /* No mode found, return the smallest mode we have */
71 for (i = 0; i < PSZ_MAX; i++) { 57 for (i = 0; i < PSZ_MAX; i++) {
72 if (pdev->image_mask & (1 << i)) { 58 if (pdev->image_mask & (1 << i))
73 if (pwc_image_sizes[i].x <= width && pwc_image_sizes[i].y <= height) 59 return i;
74 find = i;
75 }
76 } 60 }
77 return find; 61
62 /* Never reached there always is atleast one supported mode */
63 return 0;
78} 64}
79 65
80/* initialize variables depending on type and decompressor*/ 66/* initialize variables depending on type and decompressor */
81void pwc_construct(struct pwc_device *pdev) 67void pwc_construct(struct pwc_device *pdev)
82{ 68{
83 if (DEVICE_USE_CODEC1(pdev->type)) { 69 if (DEVICE_USE_CODEC1(pdev->type)) {
84 70
85 pdev->view_min.x = 128;
86 pdev->view_min.y = 96;
87 pdev->view_max.x = 352;
88 pdev->view_max.y = 288;
89 pdev->abs_max.x = 352;
90 pdev->abs_max.y = 288;
91 pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QCIF | 1 << PSZ_CIF; 71 pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QCIF | 1 << PSZ_CIF;
92 pdev->vcinterface = 2; 72 pdev->vcinterface = 2;
93 pdev->vendpoint = 4; 73 pdev->vendpoint = 4;
@@ -96,13 +76,7 @@ void pwc_construct(struct pwc_device *pdev)
96 76
97 } else if (DEVICE_USE_CODEC3(pdev->type)) { 77 } else if (DEVICE_USE_CODEC3(pdev->type)) {
98 78
99 pdev->view_min.x = 160;
100 pdev->view_min.y = 120;
101 pdev->view_max.x = 640;
102 pdev->view_max.y = 480;
103 pdev->image_mask = 1 << PSZ_QSIF | 1 << PSZ_SIF | 1 << PSZ_VGA; 79 pdev->image_mask = 1 << PSZ_QSIF | 1 << PSZ_SIF | 1 << PSZ_VGA;
104 pdev->abs_max.x = 640;
105 pdev->abs_max.y = 480;
106 pdev->vcinterface = 3; 80 pdev->vcinterface = 3;
107 pdev->vendpoint = 5; 81 pdev->vendpoint = 5;
108 pdev->frame_header_size = TOUCAM_HEADER_SIZE; 82 pdev->frame_header_size = TOUCAM_HEADER_SIZE;
@@ -110,20 +84,11 @@ void pwc_construct(struct pwc_device *pdev)
110 84
111 } else /* if (DEVICE_USE_CODEC2(pdev->type)) */ { 85 } else /* if (DEVICE_USE_CODEC2(pdev->type)) */ {
112 86
113 pdev->view_min.x = 128;
114 pdev->view_min.y = 96;
115 /* Anthill bug #38: PWC always reports max size, even without PWCX */
116 pdev->view_max.x = 640;
117 pdev->view_max.y = 480;
118 pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QSIF | 1 << PSZ_QCIF | 1 << PSZ_SIF | 1 << PSZ_CIF | 1 << PSZ_VGA; 87 pdev->image_mask = 1 << PSZ_SQCIF | 1 << PSZ_QSIF | 1 << PSZ_QCIF | 1 << PSZ_SIF | 1 << PSZ_CIF | 1 << PSZ_VGA;
119 pdev->abs_max.x = 640;
120 pdev->abs_max.y = 480;
121 pdev->vcinterface = 3; 88 pdev->vcinterface = 3;
122 pdev->vendpoint = 4; 89 pdev->vendpoint = 4;
123 pdev->frame_header_size = 0; 90 pdev->frame_header_size = 0;
124 pdev->frame_trailer_size = 0; 91 pdev->frame_trailer_size = 0;
125 } 92 }
126 pdev->pixfmt = V4L2_PIX_FMT_YUV420; /* default */ 93 pdev->pixfmt = V4L2_PIX_FMT_YUV420; /* default */
127 pdev->view_min.size = pdev->view_min.x * pdev->view_min.y;
128 pdev->view_max.size = pdev->view_max.x * pdev->view_max.y;
129} 94}
diff --git a/drivers/media/video/pwc/pwc-timon.h b/drivers/media/video/pwc/pwc-timon.h
index a6e22224c95..270c5b9010f 100644
--- a/drivers/media/video/pwc/pwc-timon.h
+++ b/drivers/media/video/pwc/pwc-timon.h
@@ -42,7 +42,7 @@
42#ifndef PWC_TIMON_H 42#ifndef PWC_TIMON_H
43#define PWC_TIMON_H 43#define PWC_TIMON_H
44 44
45#include <media/pwc-ioctl.h> 45#include "pwc.h"
46 46
47#define PWC_FPS_MAX_TIMON 6 47#define PWC_FPS_MAX_TIMON 6
48 48
diff --git a/drivers/media/video/pwc/pwc-uncompress.c b/drivers/media/video/pwc/pwc-uncompress.c
index 51265092bd3..b65903fbcf0 100644
--- a/drivers/media/video/pwc/pwc-uncompress.c
+++ b/drivers/media/video/pwc/pwc-uncompress.c
@@ -35,7 +35,7 @@
35 35
36int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf) 36int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf)
37{ 37{
38 int n, line, col, stride; 38 int n, line, col;
39 void *yuv, *image; 39 void *yuv, *image;
40 u16 *src; 40 u16 *src;
41 u16 *dsty, *dstu, *dstv; 41 u16 *dsty, *dstu, *dstv;
@@ -60,35 +60,23 @@ int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf)
60 return 0; 60 return 0;
61 } 61 }
62 62
63 vb2_set_plane_payload(&fbuf->vb, 0, pdev->view.size); 63 vb2_set_plane_payload(&fbuf->vb, 0,
64 pdev->width * pdev->height * 3 / 2);
64 65
65 if (pdev->vbandlength == 0) { 66 if (pdev->vbandlength == 0) {
66 /* Uncompressed mode. 67 /* Uncompressed mode.
67 * We copy the data into the output buffer, using the viewport
68 * size (which may be larger than the image size).
69 * Unfortunately we have to do a bit of byte stuffing to get
70 * the desired output format/size.
71 * 68 *
72 * We do some byte shuffling here to go from the 69 * We do some byte shuffling here to go from the
73 * native format to YUV420P. 70 * native format to YUV420P.
74 */ 71 */
75 src = (u16 *)yuv; 72 src = (u16 *)yuv;
76 n = pdev->view.x * pdev->view.y; 73 n = pdev->width * pdev->height;
74 dsty = (u16 *)(image);
75 dstu = (u16 *)(image + n);
76 dstv = (u16 *)(image + n + n / 4);
77 77
78 /* offset in Y plane */ 78 for (line = 0; line < pdev->height; line++) {
79 stride = pdev->view.x * pdev->offset.y + pdev->offset.x; 79 for (col = 0; col < pdev->width; col += 4) {
80 dsty = (u16 *)(image + stride);
81
82 /* offsets in U/V planes */
83 stride = pdev->view.x * pdev->offset.y / 4 + pdev->offset.x / 2;
84 dstu = (u16 *)(image + n + stride);
85 dstv = (u16 *)(image + n + n / 4 + stride);
86
87 /* increment after each line */
88 stride = (pdev->view.x - pdev->image.x) / 2; /* u16 is 2 bytes */
89
90 for (line = 0; line < pdev->image.y; line++) {
91 for (col = 0; col < pdev->image.x; col += 4) {
92 *dsty++ = *src++; 80 *dsty++ = *src++;
93 *dsty++ = *src++; 81 *dsty++ = *src++;
94 if (line & 1) 82 if (line & 1)
@@ -96,11 +84,6 @@ int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf)
96 else 84 else
97 *dstu++ = *src++; 85 *dstu++ = *src++;
98 } 86 }
99 dsty += stride;
100 if (line & 1)
101 dstv += (stride >> 1);
102 else
103 dstu += (stride >> 1);
104 } 87 }
105 88
106 return 0; 89 return 0;
@@ -111,12 +94,6 @@ int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf)
111 * the decompressor routines will write the data in planar format 94 * the decompressor routines will write the data in planar format
112 * immediately. 95 * immediately.
113 */ 96 */
114 if (pdev->vsize == PSZ_VGA && pdev->vframes == 5 && pdev->vsnapshot) {
115 PWC_ERROR("Mode Bayer is not supported for now\n");
116 /* flags |= PWCX_FLAG_BAYER; */
117 return -ENXIO; /* No such device or address: missing decompressor */
118 }
119
120 if (DEVICE_USE_CODEC1(pdev->type)) { 97 if (DEVICE_USE_CODEC1(pdev->type)) {
121 98
122 /* TODO & FIXME */ 99 /* TODO & FIXME */
@@ -124,10 +101,7 @@ int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf)
124 return -ENXIO; /* No such device or address: missing decompressor */ 101 return -ENXIO; /* No such device or address: missing decompressor */
125 102
126 } else { 103 } else {
127 pwc_dec23_decompress(pdev, yuv, image, PWCX_FLAG_PLANAR); 104 pwc_dec23_decompress(pdev, yuv, image);
128 } 105 }
129 return 0; 106 return 0;
130} 107}
131
132
133/* vim: set cino= formatoptions=croql cindent shiftwidth=8 tabstop=8: */
diff --git a/drivers/media/video/pwc/pwc-v4l.c b/drivers/media/video/pwc/pwc-v4l.c
index a10ff6b64ac..80e25842e84 100644
--- a/drivers/media/video/pwc/pwc-v4l.c
+++ b/drivers/media/video/pwc/pwc-v4l.c
@@ -49,6 +49,7 @@ static const struct v4l2_ctrl_ops pwc_ctrl_ops = {
49 49
50enum { awb_indoor, awb_outdoor, awb_fl, awb_manual, awb_auto }; 50enum { awb_indoor, awb_outdoor, awb_fl, awb_manual, awb_auto };
51enum { custom_autocontour, custom_contour, custom_noise_reduction, 51enum { custom_autocontour, custom_contour, custom_noise_reduction,
52 custom_awb_speed, custom_awb_delay,
52 custom_save_user, custom_restore_user, custom_restore_factory }; 53 custom_save_user, custom_restore_user, custom_restore_factory };
53 54
54const char * const pwc_auto_whitebal_qmenu[] = { 55const char * const pwc_auto_whitebal_qmenu[] = {
@@ -138,6 +139,26 @@ static const struct v4l2_ctrl_config pwc_restore_factory_cfg = {
138 .name = "Restore Factory Settings", 139 .name = "Restore Factory Settings",
139}; 140};
140 141
142static const struct v4l2_ctrl_config pwc_awb_speed_cfg = {
143 .ops = &pwc_ctrl_ops,
144 .id = PWC_CID_CUSTOM(awb_speed),
145 .type = V4L2_CTRL_TYPE_INTEGER,
146 .name = "Auto White Balance Speed",
147 .min = 1,
148 .max = 32,
149 .step = 1,
150};
151
152static const struct v4l2_ctrl_config pwc_awb_delay_cfg = {
153 .ops = &pwc_ctrl_ops,
154 .id = PWC_CID_CUSTOM(awb_delay),
155 .type = V4L2_CTRL_TYPE_INTEGER,
156 .name = "Auto White Balance Delay",
157 .min = 0,
158 .max = 63,
159 .step = 1,
160};
161
141int pwc_init_controls(struct pwc_device *pdev) 162int pwc_init_controls(struct pwc_device *pdev)
142{ 163{
143 struct v4l2_ctrl_handler *hdl; 164 struct v4l2_ctrl_handler *hdl;
@@ -338,6 +359,23 @@ int pwc_init_controls(struct pwc_device *pdev)
338 if (pdev->restore_factory) 359 if (pdev->restore_factory)
339 pdev->restore_factory->flags |= V4L2_CTRL_FLAG_UPDATE; 360 pdev->restore_factory->flags |= V4L2_CTRL_FLAG_UPDATE;
340 361
362 /* Auto White Balance speed & delay */
363 r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL,
364 AWB_CONTROL_SPEED_FORMATTER, &def);
365 if (r || def < 1 || def > 32)
366 def = 1;
367 cfg = pwc_awb_speed_cfg;
368 cfg.def = def;
369 pdev->awb_speed = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
370
371 r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL,
372 AWB_CONTROL_DELAY_FORMATTER, &def);
373 if (r || def > 63)
374 def = 0;
375 cfg = pwc_awb_delay_cfg;
376 cfg.def = def;
377 pdev->awb_delay = v4l2_ctrl_new_custom(hdl, &cfg, NULL);
378
341 if (!(pdev->features & FEATURE_MOTOR_PANTILT)) 379 if (!(pdev->features & FEATURE_MOTOR_PANTILT))
342 return hdl->error; 380 return hdl->error;
343 381
@@ -357,25 +395,16 @@ int pwc_init_controls(struct pwc_device *pdev)
357 return hdl->error; 395 return hdl->error;
358} 396}
359 397
360static void pwc_vidioc_fill_fmt(const struct pwc_device *pdev, struct v4l2_format *f) 398static void pwc_vidioc_fill_fmt(struct v4l2_format *f,
399 int width, int height, u32 pixfmt)
361{ 400{
362 memset(&f->fmt.pix, 0, sizeof(struct v4l2_pix_format)); 401 memset(&f->fmt.pix, 0, sizeof(struct v4l2_pix_format));
363 f->fmt.pix.width = pdev->view.x; 402 f->fmt.pix.width = width;
364 f->fmt.pix.height = pdev->view.y; 403 f->fmt.pix.height = height;
365 f->fmt.pix.field = V4L2_FIELD_NONE; 404 f->fmt.pix.field = V4L2_FIELD_NONE;
366 if (pdev->pixfmt == V4L2_PIX_FMT_YUV420) { 405 f->fmt.pix.pixelformat = pixfmt;
367 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; 406 f->fmt.pix.bytesperline = f->fmt.pix.width;
368 f->fmt.pix.bytesperline = (f->fmt.pix.width * 3)/2; 407 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.width * 3 / 2;
369 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
370 } else {
371 /* vbandlength contains 4 lines ... */
372 f->fmt.pix.bytesperline = pdev->vbandlength/4;
373 f->fmt.pix.sizeimage = pdev->frame_size + sizeof(struct pwc_raw_frame);
374 if (DEVICE_USE_CODEC1(pdev->type))
375 f->fmt.pix.pixelformat = V4L2_PIX_FMT_PWC1;
376 else
377 f->fmt.pix.pixelformat = V4L2_PIX_FMT_PWC2;
378 }
379 PWC_DEBUG_IOCTL("pwc_vidioc_fill_fmt() " 408 PWC_DEBUG_IOCTL("pwc_vidioc_fill_fmt() "
380 "width=%d, height=%d, bytesperline=%d, sizeimage=%d, pixelformat=%c%c%c%c\n", 409 "width=%d, height=%d, bytesperline=%d, sizeimage=%d, pixelformat=%c%c%c%c\n",
381 f->fmt.pix.width, 410 f->fmt.pix.width,
@@ -391,6 +420,8 @@ static void pwc_vidioc_fill_fmt(const struct pwc_device *pdev, struct v4l2_forma
391/* ioctl(VIDIOC_TRY_FMT) */ 420/* ioctl(VIDIOC_TRY_FMT) */
392static int pwc_vidioc_try_fmt(struct pwc_device *pdev, struct v4l2_format *f) 421static int pwc_vidioc_try_fmt(struct pwc_device *pdev, struct v4l2_format *f)
393{ 422{
423 int size;
424
394 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { 425 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {
395 PWC_DEBUG_IOCTL("Bad video type must be V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); 426 PWC_DEBUG_IOCTL("Bad video type must be V4L2_BUF_TYPE_VIDEO_CAPTURE\n");
396 return -EINVAL; 427 return -EINVAL;
@@ -417,15 +448,11 @@ static int pwc_vidioc_try_fmt(struct pwc_device *pdev, struct v4l2_format *f)
417 448
418 } 449 }
419 450
420 if (f->fmt.pix.width > pdev->view_max.x) 451 size = pwc_get_size(pdev, f->fmt.pix.width, f->fmt.pix.height);
421 f->fmt.pix.width = pdev->view_max.x; 452 pwc_vidioc_fill_fmt(f,
422 else if (f->fmt.pix.width < pdev->view_min.x) 453 pwc_image_sizes[size][0],
423 f->fmt.pix.width = pdev->view_min.x; 454 pwc_image_sizes[size][1],
424 455 f->fmt.pix.pixelformat);
425 if (f->fmt.pix.height > pdev->view_max.y)
426 f->fmt.pix.height = pdev->view_max.y;
427 else if (f->fmt.pix.height < pdev->view_min.y)
428 f->fmt.pix.height = pdev->view_min.y;
429 456
430 return 0; 457 return 0;
431} 458}
@@ -435,68 +462,50 @@ static int pwc_vidioc_try_fmt(struct pwc_device *pdev, struct v4l2_format *f)
435static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f) 462static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
436{ 463{
437 struct pwc_device *pdev = video_drvdata(file); 464 struct pwc_device *pdev = video_drvdata(file);
438 int ret, fps, snapshot, compression, pixelformat; 465 int ret, pixelformat, compression = 0;
439
440 if (!pdev->udev)
441 return -ENODEV;
442 466
443 if (pdev->capt_file != NULL && 467 if (pwc_test_n_set_capt_file(pdev, file))
444 pdev->capt_file != file)
445 return -EBUSY; 468 return -EBUSY;
446 469
447 pdev->capt_file = file;
448
449 ret = pwc_vidioc_try_fmt(pdev, f); 470 ret = pwc_vidioc_try_fmt(pdev, f);
450 if (ret<0) 471 if (ret < 0)
451 return ret; 472 return ret;
452 473
453 pixelformat = f->fmt.pix.pixelformat; 474 pixelformat = f->fmt.pix.pixelformat;
454 compression = pdev->vcompression;
455 snapshot = 0;
456 fps = pdev->vframes;
457 if (f->fmt.pix.priv) {
458 compression = (f->fmt.pix.priv & PWC_QLT_MASK) >> PWC_QLT_SHIFT;
459 snapshot = !!(f->fmt.pix.priv & PWC_FPS_SNAPSHOT);
460 fps = (f->fmt.pix.priv & PWC_FPS_FRMASK) >> PWC_FPS_SHIFT;
461 if (fps == 0)
462 fps = pdev->vframes;
463 }
464 475
465 if (pixelformat != V4L2_PIX_FMT_YUV420 && 476 mutex_lock(&pdev->udevlock);
466 pixelformat != V4L2_PIX_FMT_PWC1 && 477 if (!pdev->udev) {
467 pixelformat != V4L2_PIX_FMT_PWC2) 478 ret = -ENODEV;
468 return -EINVAL; 479 goto leave;
480 }
469 481
470 if (vb2_is_streaming(&pdev->vb_queue)) 482 if (pdev->iso_init) {
471 return -EBUSY; 483 ret = -EBUSY;
484 goto leave;
485 }
472 486
473 PWC_DEBUG_IOCTL("Trying to set format to: width=%d height=%d fps=%d " 487 PWC_DEBUG_IOCTL("Trying to set format to: width=%d height=%d fps=%d "
474 "compression=%d snapshot=%d format=%c%c%c%c\n", 488 "format=%c%c%c%c\n",
475 f->fmt.pix.width, f->fmt.pix.height, fps, 489 f->fmt.pix.width, f->fmt.pix.height, pdev->vframes,
476 compression, snapshot,
477 (pixelformat)&255, 490 (pixelformat)&255,
478 (pixelformat>>8)&255, 491 (pixelformat>>8)&255,
479 (pixelformat>>16)&255, 492 (pixelformat>>16)&255,
480 (pixelformat>>24)&255); 493 (pixelformat>>24)&255);
481 494
482 ret = pwc_set_video_mode(pdev, 495 ret = pwc_set_video_mode(pdev, f->fmt.pix.width, f->fmt.pix.height,
483 f->fmt.pix.width, 496 pdev->vframes, &compression);
484 f->fmt.pix.height,
485 fps,
486 compression,
487 snapshot);
488 497
489 PWC_DEBUG_IOCTL("pwc_set_video_mode(), return=%d\n", ret); 498 PWC_DEBUG_IOCTL("pwc_set_video_mode(), return=%d\n", ret);
490 499
491 if (ret) 500 if (ret == 0) {
492 return ret; 501 pdev->pixfmt = pixelformat;
493 502 pwc_vidioc_fill_fmt(f, pdev->width, pdev->height,
494 pdev->pixfmt = pixelformat; 503 pdev->pixfmt);
495 504 }
496 pwc_vidioc_fill_fmt(pdev, f);
497
498 return 0;
499 505
506leave:
507 mutex_unlock(&pdev->udevlock);
508 return ret;
500} 509}
501 510
502static int pwc_querycap(struct file *file, void *fh, struct v4l2_capability *cap) 511static int pwc_querycap(struct file *file, void *fh, struct v4l2_capability *cap)
@@ -536,30 +545,14 @@ static int pwc_s_input(struct file *file, void *fh, unsigned int i)
536 return i ? -EINVAL : 0; 545 return i ? -EINVAL : 0;
537} 546}
538 547
539static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 548static int pwc_g_volatile_ctrl_unlocked(struct v4l2_ctrl *ctrl)
540{ 549{
541 struct pwc_device *pdev = 550 struct pwc_device *pdev =
542 container_of(ctrl->handler, struct pwc_device, ctrl_handler); 551 container_of(ctrl->handler, struct pwc_device, ctrl_handler);
543 int ret = 0; 552 int ret = 0;
544 553
545 /* 554 if (!pdev->udev)
546 * Sometimes it can take quite long for the pwc to complete usb control 555 return -ENODEV;
547 * transfers, so release the modlock to give streaming by another
548 * process / thread the chance to continue with a dqbuf.
549 */
550 mutex_unlock(&pdev->modlock);
551
552 /*
553 * Take the udev-lock to protect against the disconnect handler
554 * completing and setting dev->udev to NULL underneath us. Other code
555 * does not need to do this since it is protected by the modlock.
556 */
557 mutex_lock(&pdev->udevlock);
558
559 if (!pdev->udev) {
560 ret = -ENODEV;
561 goto leave;
562 }
563 556
564 switch (ctrl->id) { 557 switch (ctrl->id) {
565 case V4L2_CID_AUTO_WHITE_BALANCE: 558 case V4L2_CID_AUTO_WHITE_BALANCE:
@@ -624,9 +617,18 @@ static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
624 if (ret) 617 if (ret)
625 PWC_ERROR("g_ctrl %s error %d\n", ctrl->name, ret); 618 PWC_ERROR("g_ctrl %s error %d\n", ctrl->name, ret);
626 619
627leave: 620 return ret;
621}
622
623static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
624{
625 struct pwc_device *pdev =
626 container_of(ctrl->handler, struct pwc_device, ctrl_handler);
627 int ret;
628
629 mutex_lock(&pdev->udevlock);
630 ret = pwc_g_volatile_ctrl_unlocked(ctrl);
628 mutex_unlock(&pdev->udevlock); 631 mutex_unlock(&pdev->udevlock);
629 mutex_lock(&pdev->modlock);
630 return ret; 632 return ret;
631} 633}
632 634
@@ -643,6 +645,15 @@ static int pwc_set_awb(struct pwc_device *pdev)
643 645
644 if (pdev->auto_white_balance->val != awb_manual) 646 if (pdev->auto_white_balance->val != awb_manual)
645 pdev->color_bal_valid = false; /* Force cache update */ 647 pdev->color_bal_valid = false; /* Force cache update */
648
649 /*
650 * If this is a preset, update our red / blue balance values
651 * so that events get generated for the new preset values
652 */
653 if (pdev->auto_white_balance->val == awb_indoor ||
654 pdev->auto_white_balance->val == awb_outdoor ||
655 pdev->auto_white_balance->val == awb_fl)
656 pwc_g_volatile_ctrl_unlocked(pdev->auto_white_balance);
646 } 657 }
647 if (pdev->auto_white_balance->val != awb_manual) 658 if (pdev->auto_white_balance->val != awb_manual)
648 return 0; 659 return 0;
@@ -806,8 +817,6 @@ static int pwc_s_ctrl(struct v4l2_ctrl *ctrl)
806 container_of(ctrl->handler, struct pwc_device, ctrl_handler); 817 container_of(ctrl->handler, struct pwc_device, ctrl_handler);
807 int ret = 0; 818 int ret = 0;
808 819
809 /* See the comments on locking in pwc_g_volatile_ctrl */
810 mutex_unlock(&pdev->modlock);
811 mutex_lock(&pdev->udevlock); 820 mutex_lock(&pdev->udevlock);
812 821
813 if (!pdev->udev) { 822 if (!pdev->udev) {
@@ -891,6 +900,16 @@ static int pwc_s_ctrl(struct v4l2_ctrl *ctrl)
891 ret = pwc_button_ctrl(pdev, 900 ret = pwc_button_ctrl(pdev,
892 RESTORE_FACTORY_DEFAULTS_FORMATTER); 901 RESTORE_FACTORY_DEFAULTS_FORMATTER);
893 break; 902 break;
903 case PWC_CID_CUSTOM(awb_speed):
904 ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
905 AWB_CONTROL_SPEED_FORMATTER,
906 ctrl->val);
907 break;
908 case PWC_CID_CUSTOM(awb_delay):
909 ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL,
910 AWB_CONTROL_DELAY_FORMATTER,
911 ctrl->val);
912 break;
894 case V4L2_CID_PAN_RELATIVE: 913 case V4L2_CID_PAN_RELATIVE:
895 ret = pwc_set_motor(pdev); 914 ret = pwc_set_motor(pdev);
896 break; 915 break;
@@ -903,7 +922,6 @@ static int pwc_s_ctrl(struct v4l2_ctrl *ctrl)
903 922
904leave: 923leave:
905 mutex_unlock(&pdev->udevlock); 924 mutex_unlock(&pdev->udevlock);
906 mutex_lock(&pdev->modlock);
907 return ret; 925 return ret;
908} 926}
909 927
@@ -933,9 +951,14 @@ static int pwc_g_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
933{ 951{
934 struct pwc_device *pdev = video_drvdata(file); 952 struct pwc_device *pdev = video_drvdata(file);
935 953
954 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
955 return -EINVAL;
956
957 mutex_lock(&pdev->udevlock); /* To avoid race with s_fmt */
936 PWC_DEBUG_IOCTL("ioctl(VIDIOC_G_FMT) return size %dx%d\n", 958 PWC_DEBUG_IOCTL("ioctl(VIDIOC_G_FMT) return size %dx%d\n",
937 pdev->image.x, pdev->image.y); 959 pdev->width, pdev->height);
938 pwc_vidioc_fill_fmt(pdev, f); 960 pwc_vidioc_fill_fmt(f, pdev->width, pdev->height, pdev->pixfmt);
961 mutex_unlock(&pdev->udevlock);
939 return 0; 962 return 0;
940} 963}
941 964
@@ -951,12 +974,9 @@ static int pwc_reqbufs(struct file *file, void *fh,
951{ 974{
952 struct pwc_device *pdev = video_drvdata(file); 975 struct pwc_device *pdev = video_drvdata(file);
953 976
954 if (pdev->capt_file != NULL && 977 if (pwc_test_n_set_capt_file(pdev, file))
955 pdev->capt_file != file)
956 return -EBUSY; 978 return -EBUSY;
957 979
958 pdev->capt_file = file;
959
960 return vb2_reqbufs(&pdev->vb_queue, rb); 980 return vb2_reqbufs(&pdev->vb_queue, rb);
961} 981}
962 982
@@ -1025,25 +1045,21 @@ static int pwc_enum_framesizes(struct file *file, void *fh,
1025 struct pwc_device *pdev = video_drvdata(file); 1045 struct pwc_device *pdev = video_drvdata(file);
1026 unsigned int i = 0, index = fsize->index; 1046 unsigned int i = 0, index = fsize->index;
1027 1047
1028 if (fsize->pixel_format == V4L2_PIX_FMT_YUV420) { 1048 if (fsize->pixel_format == V4L2_PIX_FMT_YUV420 ||
1049 (fsize->pixel_format == V4L2_PIX_FMT_PWC1 &&
1050 DEVICE_USE_CODEC1(pdev->type)) ||
1051 (fsize->pixel_format == V4L2_PIX_FMT_PWC2 &&
1052 DEVICE_USE_CODEC23(pdev->type))) {
1029 for (i = 0; i < PSZ_MAX; i++) { 1053 for (i = 0; i < PSZ_MAX; i++) {
1030 if (pdev->image_mask & (1UL << i)) { 1054 if (!(pdev->image_mask & (1UL << i)))
1031 if (!index--) { 1055 continue;
1032 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; 1056 if (!index--) {
1033 fsize->discrete.width = pwc_image_sizes[i].x; 1057 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1034 fsize->discrete.height = pwc_image_sizes[i].y; 1058 fsize->discrete.width = pwc_image_sizes[i][0];
1035 return 0; 1059 fsize->discrete.height = pwc_image_sizes[i][1];
1036 } 1060 return 0;
1037 } 1061 }
1038 } 1062 }
1039 } else if (fsize->index == 0 &&
1040 ((fsize->pixel_format == V4L2_PIX_FMT_PWC1 && DEVICE_USE_CODEC1(pdev->type)) ||
1041 (fsize->pixel_format == V4L2_PIX_FMT_PWC2 && DEVICE_USE_CODEC23(pdev->type)))) {
1042
1043 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1044 fsize->discrete.width = pdev->abs_max.x;
1045 fsize->discrete.height = pdev->abs_max.y;
1046 return 0;
1047 } 1063 }
1048 return -EINVAL; 1064 return -EINVAL;
1049} 1065}
@@ -1056,8 +1072,8 @@ static int pwc_enum_frameintervals(struct file *file, void *fh,
1056 unsigned int i; 1072 unsigned int i;
1057 1073
1058 for (i = 0; i < PSZ_MAX; i++) { 1074 for (i = 0; i < PSZ_MAX; i++) {
1059 if (pwc_image_sizes[i].x == fival->width && 1075 if (pwc_image_sizes[i][0] == fival->width &&
1060 pwc_image_sizes[i].y == fival->height) { 1076 pwc_image_sizes[i][1] == fival->height) {
1061 size = i; 1077 size = i;
1062 break; 1078 break;
1063 } 1079 }
@@ -1086,14 +1102,6 @@ static int pwc_log_status(struct file *file, void *priv)
1086 return 0; 1102 return 0;
1087} 1103}
1088 1104
1089static long pwc_default(struct file *file, void *fh, bool valid_prio,
1090 int cmd, void *arg)
1091{
1092 struct pwc_device *pdev = video_drvdata(file);
1093
1094 return pwc_ioctl(pdev, cmd, arg);
1095}
1096
1097const struct v4l2_ioctl_ops pwc_ioctl_ops = { 1105const struct v4l2_ioctl_ops pwc_ioctl_ops = {
1098 .vidioc_querycap = pwc_querycap, 1106 .vidioc_querycap = pwc_querycap,
1099 .vidioc_enum_input = pwc_enum_input, 1107 .vidioc_enum_input = pwc_enum_input,
@@ -1112,8 +1120,4 @@ const struct v4l2_ioctl_ops pwc_ioctl_ops = {
1112 .vidioc_log_status = pwc_log_status, 1120 .vidioc_log_status = pwc_log_status,
1113 .vidioc_enum_framesizes = pwc_enum_framesizes, 1121 .vidioc_enum_framesizes = pwc_enum_framesizes,
1114 .vidioc_enum_frameintervals = pwc_enum_frameintervals, 1122 .vidioc_enum_frameintervals = pwc_enum_frameintervals,
1115 .vidioc_default = pwc_default,
1116}; 1123};
1117
1118
1119/* vim: set cino= formatoptions=croql cindent shiftwidth=8 tabstop=8: */
diff --git a/drivers/media/video/pwc/pwc.h b/drivers/media/video/pwc/pwc.h
index 0e4e2d7b787..47c518fef17 100644
--- a/drivers/media/video/pwc/pwc.h
+++ b/drivers/media/video/pwc/pwc.h
@@ -35,15 +35,16 @@
35#include <asm/errno.h> 35#include <asm/errno.h>
36#include <linux/videodev2.h> 36#include <linux/videodev2.h>
37#include <media/v4l2-common.h> 37#include <media/v4l2-common.h>
38#include <media/v4l2-device.h>
38#include <media/v4l2-ioctl.h> 39#include <media/v4l2-ioctl.h>
39#include <media/v4l2-ctrls.h> 40#include <media/v4l2-ctrls.h>
41#include <media/v4l2-fh.h>
42#include <media/v4l2-event.h>
40#include <media/videobuf2-vmalloc.h> 43#include <media/videobuf2-vmalloc.h>
41#ifdef CONFIG_USB_PWC_INPUT_EVDEV 44#ifdef CONFIG_USB_PWC_INPUT_EVDEV
42#include <linux/input.h> 45#include <linux/input.h>
43#endif 46#endif
44 47
45#include <media/pwc-ioctl.h>
46
47/* Version block */ 48/* Version block */
48#define PWC_VERSION "10.0.15" 49#define PWC_VERSION "10.0.15"
49#define PWC_NAME "pwc" 50#define PWC_NAME "pwc"
@@ -106,6 +107,9 @@
106#define FEATURE_CODEC1 0x0002 107#define FEATURE_CODEC1 0x0002
107#define FEATURE_CODEC2 0x0004 108#define FEATURE_CODEC2 0x0004
108 109
110#define MAX_WIDTH 640
111#define MAX_HEIGHT 480
112
109/* Ignore errors in the first N frames, to allow for startup delays */ 113/* Ignore errors in the first N frames, to allow for startup delays */
110#define FRAME_LOWMARK 5 114#define FRAME_LOWMARK 5
111 115
@@ -186,6 +190,24 @@
186#define PT_RESET_CONTROL_FORMATTER 0x02 190#define PT_RESET_CONTROL_FORMATTER 0x02
187#define PT_STATUS_FORMATTER 0x03 191#define PT_STATUS_FORMATTER 0x03
188 192
193/* Enumeration of image sizes */
194#define PSZ_SQCIF 0x00
195#define PSZ_QSIF 0x01
196#define PSZ_QCIF 0x02
197#define PSZ_SIF 0x03
198#define PSZ_CIF 0x04
199#define PSZ_VGA 0x05
200#define PSZ_MAX 6
201
202struct pwc_raw_frame {
203 __le16 type; /* type of the webcam */
204 __le16 vbandlength; /* Size of 4 lines compressed (used by the
205 decompressor) */
206 __u8 cmd[4]; /* the four byte of the command (in case of
207 nala, only the first 3 bytes is filled) */
208 __u8 rawframe[0]; /* frame_size = H / 4 * vbandlength */
209} __packed;
210
189/* intermediate buffers with raw data from the USB cam */ 211/* intermediate buffers with raw data from the USB cam */
190struct pwc_frame_buf 212struct pwc_frame_buf
191{ 213{
@@ -198,33 +220,30 @@ struct pwc_frame_buf
198struct pwc_device 220struct pwc_device
199{ 221{
200 struct video_device vdev; 222 struct video_device vdev;
201 struct mutex modlock; 223 struct v4l2_device v4l2_dev;
202 224
203 /* Pointer to our usb_device, may be NULL after unplug */ 225 /* Pointer to our usb_device, may be NULL after unplug */
204 struct usb_device *udev; 226 struct usb_device *udev;
205 /* Protects the setting of udev to NULL by our disconnect handler */
206 struct mutex udevlock; 227 struct mutex udevlock;
207 228
208 /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */ 229 /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */
209 int type; 230 int type;
210 int release; /* release number */ 231 int release; /* release number */
211 int features; /* feature bits */ 232 int features; /* feature bits */
212 char serial[30]; /* serial number (string) */
213 233
214 /*** Video data ***/ 234 /*** Video data ***/
215 struct file *capt_file; /* file doing video capture */ 235 struct file *capt_file; /* file doing video capture */
236 struct mutex capt_file_lock;
216 int vendpoint; /* video isoc endpoint */ 237 int vendpoint; /* video isoc endpoint */
217 int vcinterface; /* video control interface */ 238 int vcinterface; /* video control interface */
218 int valternate; /* alternate interface needed */ 239 int valternate; /* alternate interface needed */
219 int vframes, vsize; /* frames-per-second & size (see PSZ_*) */ 240 int vframes; /* frames-per-second */
220 int pixfmt; /* pixelformat: V4L2_PIX_FMT_YUV420 or _PWCX */ 241 int pixfmt; /* pixelformat: V4L2_PIX_FMT_YUV420 or _PWCX */
221 int vframe_count; /* received frames */ 242 int vframe_count; /* received frames */
222 int vmax_packet_size; /* USB maxpacket size */ 243 int vmax_packet_size; /* USB maxpacket size */
223 int vlast_packet_size; /* for frame synchronisation */ 244 int vlast_packet_size; /* for frame synchronisation */
224 int visoc_errors; /* number of contiguous ISOC errors */ 245 int visoc_errors; /* number of contiguous ISOC errors */
225 int vcompression; /* desired compression factor */
226 int vbandlength; /* compressed band length; 0 is uncompressed */ 246 int vbandlength; /* compressed band length; 0 is uncompressed */
227 char vsnapshot; /* snapshot mode */
228 char vsync; /* used by isoc handler */ 247 char vsync; /* used by isoc handler */
229 char vmirror; /* for ToUCaM series */ 248 char vmirror; /* for ToUCaM series */
230 char power_save; /* Do powersaving for this cam */ 249 char power_save; /* Do powersaving for this cam */
@@ -262,21 +281,8 @@ struct pwc_device
262 * a gray or black border. view_min <= image <= view <= view_max; 281 * a gray or black border. view_min <= image <= view <= view_max;
263 */ 282 */
264 int image_mask; /* supported sizes */ 283 int image_mask; /* supported sizes */
265 struct pwc_coord view_min, view_max; /* minimum and maximum view */ 284 int width, height; /* current resolution */
266 struct pwc_coord abs_max; /* maximum supported size */
267 struct pwc_coord image, view; /* image and viewport size */
268 struct pwc_coord offset; /* offset of the viewport */
269
270 /*** motorized pan/tilt feature */
271 struct pwc_mpt_range angle_range;
272 int pan_angle; /* in degrees * 100 */
273 int tilt_angle; /* absolute angle; 0,0 is home */
274 285
275 /*
276 * Set to 1 when the user push the button, reset to 0
277 * when this value is read from sysfs.
278 */
279 int snapshot_button_status;
280#ifdef CONFIG_USB_PWC_INPUT_EVDEV 286#ifdef CONFIG_USB_PWC_INPUT_EVDEV
281 struct input_dev *button_dev; /* webcam snapshot button input */ 287 struct input_dev *button_dev; /* webcam snapshot button input */
282 char button_phys[64]; 288 char button_phys[64];
@@ -328,6 +334,8 @@ struct pwc_device
328 struct v4l2_ctrl *save_user; 334 struct v4l2_ctrl *save_user;
329 struct v4l2_ctrl *restore_user; 335 struct v4l2_ctrl *restore_user;
330 struct v4l2_ctrl *restore_factory; 336 struct v4l2_ctrl *restore_factory;
337 struct v4l2_ctrl *awb_speed;
338 struct v4l2_ctrl *awb_delay;
331 struct { 339 struct {
332 /* motor control cluster */ 340 /* motor control cluster */
333 struct v4l2_ctrl *motor_pan; 341 struct v4l2_ctrl *motor_pan;
@@ -344,19 +352,20 @@ struct pwc_device
344extern int pwc_trace; 352extern int pwc_trace;
345#endif 353#endif
346 354
355int pwc_test_n_set_capt_file(struct pwc_device *pdev, struct file *file);
356
347/** Functions in pwc-misc.c */ 357/** Functions in pwc-misc.c */
348/* sizes in pixels */ 358/* sizes in pixels */
349extern const struct pwc_coord pwc_image_sizes[PSZ_MAX]; 359extern const int pwc_image_sizes[PSZ_MAX][2];
350 360
351int pwc_decode_size(struct pwc_device *pdev, int width, int height); 361int pwc_get_size(struct pwc_device *pdev, int width, int height);
352void pwc_construct(struct pwc_device *pdev); 362void pwc_construct(struct pwc_device *pdev);
353 363
354/** Functions in pwc-ctrl.c */ 364/** Functions in pwc-ctrl.c */
355/* Request a certain video mode. Returns < 0 if not possible */ 365/* Request a certain video mode. Returns < 0 if not possible */
356extern int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot); 366extern int pwc_set_video_mode(struct pwc_device *pdev, int width, int height,
367 int frames, int *compression);
357extern unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned int size); 368extern unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned int size);
358extern int pwc_mpt_reset(struct pwc_device *pdev, int flags);
359extern int pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt);
360extern int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value); 369extern int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value);
361extern int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor); 370extern int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor);
362extern int send_control_msg(struct pwc_device *pdev, 371extern int send_control_msg(struct pwc_device *pdev,
@@ -375,9 +384,6 @@ int pwc_init_controls(struct pwc_device *pdev);
375/* Power down or up the camera; not supported by all models */ 384/* Power down or up the camera; not supported by all models */
376extern void pwc_camera_power(struct pwc_device *pdev, int power); 385extern void pwc_camera_power(struct pwc_device *pdev, int power);
377 386
378/* Private ioctl()s; see pwc-ioctl.h */
379extern long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg);
380
381extern const struct v4l2_ioctl_ops pwc_ioctl_ops; 387extern const struct v4l2_ioctl_ops pwc_ioctl_ops;
382 388
383/** pwc-uncompress.c */ 389/** pwc-uncompress.c */
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index 79fb22c89ae..0bd7da26d01 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -1133,12 +1133,13 @@ static void pxa_camera_setup_cicr(struct soc_camera_device *icd,
1133 __raw_writel(cicr0, pcdev->base + CICR0); 1133 __raw_writel(cicr0, pcdev->base + CICR0);
1134} 1134}
1135 1135
1136static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) 1136static int pxa_camera_set_bus_param(struct soc_camera_device *icd)
1137{ 1137{
1138 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 1138 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1139 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 1139 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1140 struct pxa_camera_dev *pcdev = ici->priv; 1140 struct pxa_camera_dev *pcdev = ici->priv;
1141 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; 1141 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
1142 u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
1142 unsigned long bus_flags, common_flags; 1143 unsigned long bus_flags, common_flags;
1143 int ret; 1144 int ret;
1144 struct pxa_cam *cam = icd->host_priv; 1145 struct pxa_cam *cam = icd->host_priv;
@@ -1851,19 +1852,7 @@ static struct platform_driver pxa_camera_driver = {
1851 .remove = __devexit_p(pxa_camera_remove), 1852 .remove = __devexit_p(pxa_camera_remove),
1852}; 1853};
1853 1854
1854 1855module_platform_driver(pxa_camera_driver);
1855static int __init pxa_camera_init(void)
1856{
1857 return platform_driver_register(&pxa_camera_driver);
1858}
1859
1860static void __exit pxa_camera_exit(void)
1861{
1862 platform_driver_unregister(&pxa_camera_driver);
1863}
1864
1865module_init(pxa_camera_init);
1866module_exit(pxa_camera_exit);
1867 1856
1868MODULE_DESCRIPTION("PXA27x SoC Camera Host driver"); 1857MODULE_DESCRIPTION("PXA27x SoC Camera Host driver");
1869MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); 1858MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c
index 2cc3b916672..510cfab477f 100644
--- a/drivers/media/video/s5p-fimc/fimc-capture.c
+++ b/drivers/media/video/s5p-fimc/fimc-capture.c
@@ -63,6 +63,8 @@ static int fimc_init_capture(struct fimc_dev *fimc)
63 fimc_hw_set_effect(ctx, false); 63 fimc_hw_set_effect(ctx, false);
64 fimc_hw_set_output_path(ctx); 64 fimc_hw_set_output_path(ctx);
65 fimc_hw_set_out_dma(ctx); 65 fimc_hw_set_out_dma(ctx);
66 if (fimc->variant->has_alpha)
67 fimc_hw_set_rgb_alpha(ctx);
66 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); 68 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
67 } 69 }
68 spin_unlock_irqrestore(&fimc->slock, flags); 70 spin_unlock_irqrestore(&fimc->slock, flags);
@@ -154,6 +156,8 @@ int fimc_capture_config_update(struct fimc_ctx *ctx)
154 fimc_hw_set_rotation(ctx); 156 fimc_hw_set_rotation(ctx);
155 fimc_prepare_dma_offset(ctx, &ctx->d_frame); 157 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
156 fimc_hw_set_out_dma(ctx); 158 fimc_hw_set_out_dma(ctx);
159 if (fimc->variant->has_alpha)
160 fimc_hw_set_rgb_alpha(ctx);
157 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); 161 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
158 } 162 }
159 spin_unlock(&ctx->slock); 163 spin_unlock(&ctx->slock);
@@ -812,6 +816,10 @@ static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f)
812 FIMC_SD_PAD_SOURCE); 816 FIMC_SD_PAD_SOURCE);
813 if (!ff->fmt) 817 if (!ff->fmt)
814 return -EINVAL; 818 return -EINVAL;
819
820 /* Update RGB Alpha control state and value range */
821 fimc_alpha_ctrl_update(ctx);
822
815 /* Try to match format at the host and the sensor */ 823 /* Try to match format at the host and the sensor */
816 if (!fimc->vid_cap.user_subdev_api) { 824 if (!fimc->vid_cap.user_subdev_api) {
817 mf->code = ff->fmt->mbus_code; 825 mf->code = ff->fmt->mbus_code;
@@ -1235,6 +1243,9 @@ static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1235 *mf = fmt->format; 1243 *mf = fmt->format;
1236 return 0; 1244 return 0;
1237 } 1245 }
1246 /* Update RGB Alpha control state and value range */
1247 fimc_alpha_ctrl_update(ctx);
1248
1238 fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ffmt->color)); 1249 fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ffmt->color));
1239 1250
1240 ff = fmt->pad == FIMC_SD_PAD_SINK ? 1251 ff = fmt->pad == FIMC_SD_PAD_SINK ?
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c
index 07c6254faee..f5cbb8a4c54 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.c
+++ b/drivers/media/video/s5p-fimc/fimc-core.c
@@ -52,13 +52,29 @@ static struct fimc_fmt fimc_formats[] = {
52 .colplanes = 1, 52 .colplanes = 1,
53 .flags = FMT_FLAGS_M2M, 53 .flags = FMT_FLAGS_M2M,
54 }, { 54 }, {
55 .name = "XRGB-8-8-8-8, 32 bpp", 55 .name = "ARGB8888, 32 bpp",
56 .fourcc = V4L2_PIX_FMT_RGB32, 56 .fourcc = V4L2_PIX_FMT_RGB32,
57 .depth = { 32 }, 57 .depth = { 32 },
58 .color = S5P_FIMC_RGB888, 58 .color = S5P_FIMC_RGB888,
59 .memplanes = 1, 59 .memplanes = 1,
60 .colplanes = 1, 60 .colplanes = 1,
61 .flags = FMT_FLAGS_M2M, 61 .flags = FMT_FLAGS_M2M | FMT_HAS_ALPHA,
62 }, {
63 .name = "ARGB1555",
64 .fourcc = V4L2_PIX_FMT_RGB555,
65 .depth = { 16 },
66 .color = S5P_FIMC_RGB555,
67 .memplanes = 1,
68 .colplanes = 1,
69 .flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA,
70 }, {
71 .name = "ARGB4444",
72 .fourcc = V4L2_PIX_FMT_RGB444,
73 .depth = { 16 },
74 .color = S5P_FIMC_RGB444,
75 .memplanes = 1,
76 .colplanes = 1,
77 .flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA,
62 }, { 78 }, {
63 .name = "YUV 4:2:2 packed, YCbYCr", 79 .name = "YUV 4:2:2 packed, YCbYCr",
64 .fourcc = V4L2_PIX_FMT_YUYV, 80 .fourcc = V4L2_PIX_FMT_YUYV,
@@ -171,6 +187,14 @@ static struct fimc_fmt fimc_formats[] = {
171 }, 187 },
172}; 188};
173 189
190static unsigned int get_m2m_fmt_flags(unsigned int stream_type)
191{
192 if (stream_type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
193 return FMT_FLAGS_M2M_IN;
194 else
195 return FMT_FLAGS_M2M_OUT;
196}
197
174int fimc_check_scaler_ratio(struct fimc_ctx *ctx, int sw, int sh, 198int fimc_check_scaler_ratio(struct fimc_ctx *ctx, int sw, int sh,
175 int dw, int dh, int rotation) 199 int dw, int dh, int rotation)
176{ 200{
@@ -652,8 +676,11 @@ static void fimc_dma_run(void *priv)
652 if (ctx->state & (FIMC_DST_ADDR | FIMC_PARAMS)) 676 if (ctx->state & (FIMC_DST_ADDR | FIMC_PARAMS))
653 fimc_hw_set_output_addr(fimc, &ctx->d_frame.paddr, -1); 677 fimc_hw_set_output_addr(fimc, &ctx->d_frame.paddr, -1);
654 678
655 if (ctx->state & FIMC_PARAMS) 679 if (ctx->state & FIMC_PARAMS) {
656 fimc_hw_set_out_dma(ctx); 680 fimc_hw_set_out_dma(ctx);
681 if (fimc->variant->has_alpha)
682 fimc_hw_set_rgb_alpha(ctx);
683 }
657 684
658 fimc_activate_capture(ctx); 685 fimc_activate_capture(ctx);
659 686
@@ -750,12 +777,11 @@ static struct vb2_ops fimc_qops = {
750#define ctrl_to_ctx(__ctrl) \ 777#define ctrl_to_ctx(__ctrl) \
751 container_of((__ctrl)->handler, struct fimc_ctx, ctrl_handler) 778 container_of((__ctrl)->handler, struct fimc_ctx, ctrl_handler)
752 779
753static int fimc_s_ctrl(struct v4l2_ctrl *ctrl) 780static int __fimc_s_ctrl(struct fimc_ctx *ctx, struct v4l2_ctrl *ctrl)
754{ 781{
755 struct fimc_ctx *ctx = ctrl_to_ctx(ctrl);
756 struct fimc_dev *fimc = ctx->fimc_dev; 782 struct fimc_dev *fimc = ctx->fimc_dev;
757 struct samsung_fimc_variant *variant = fimc->variant; 783 struct samsung_fimc_variant *variant = fimc->variant;
758 unsigned long flags; 784 unsigned int flags = FIMC_DST_FMT | FIMC_SRC_FMT;
759 int ret = 0; 785 int ret = 0;
760 786
761 if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) 787 if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE)
@@ -763,52 +789,63 @@ static int fimc_s_ctrl(struct v4l2_ctrl *ctrl)
763 789
764 switch (ctrl->id) { 790 switch (ctrl->id) {
765 case V4L2_CID_HFLIP: 791 case V4L2_CID_HFLIP:
766 spin_lock_irqsave(&ctx->slock, flags);
767 ctx->hflip = ctrl->val; 792 ctx->hflip = ctrl->val;
768 break; 793 break;
769 794
770 case V4L2_CID_VFLIP: 795 case V4L2_CID_VFLIP:
771 spin_lock_irqsave(&ctx->slock, flags);
772 ctx->vflip = ctrl->val; 796 ctx->vflip = ctrl->val;
773 break; 797 break;
774 798
775 case V4L2_CID_ROTATE: 799 case V4L2_CID_ROTATE:
776 if (fimc_capture_pending(fimc) || 800 if (fimc_capture_pending(fimc) ||
777 fimc_ctx_state_is_set(FIMC_DST_FMT | FIMC_SRC_FMT, ctx)) { 801 (ctx->state & flags) == flags) {
778 ret = fimc_check_scaler_ratio(ctx, ctx->s_frame.width, 802 ret = fimc_check_scaler_ratio(ctx, ctx->s_frame.width,
779 ctx->s_frame.height, ctx->d_frame.width, 803 ctx->s_frame.height, ctx->d_frame.width,
780 ctx->d_frame.height, ctrl->val); 804 ctx->d_frame.height, ctrl->val);
781 } 805 if (ret)
782 if (ret) { 806 return -EINVAL;
783 v4l2_err(fimc->m2m.vfd, "Out of scaler range\n");
784 return -EINVAL;
785 } 807 }
786 if ((ctrl->val == 90 || ctrl->val == 270) && 808 if ((ctrl->val == 90 || ctrl->val == 270) &&
787 !variant->has_out_rot) 809 !variant->has_out_rot)
788 return -EINVAL; 810 return -EINVAL;
789 spin_lock_irqsave(&ctx->slock, flags); 811
790 ctx->rotation = ctrl->val; 812 ctx->rotation = ctrl->val;
791 break; 813 break;
792 814
793 default: 815 case V4L2_CID_ALPHA_COMPONENT:
794 v4l2_err(fimc->v4l2_dev, "Invalid control: 0x%X\n", ctrl->id); 816 ctx->d_frame.alpha = ctrl->val;
795 return -EINVAL; 817 break;
796 } 818 }
797 ctx->state |= FIMC_PARAMS; 819 ctx->state |= FIMC_PARAMS;
798 set_bit(ST_CAPT_APPLY_CFG, &fimc->state); 820 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
799 spin_unlock_irqrestore(&ctx->slock, flags);
800 return 0; 821 return 0;
801} 822}
802 823
824static int fimc_s_ctrl(struct v4l2_ctrl *ctrl)
825{
826 struct fimc_ctx *ctx = ctrl_to_ctx(ctrl);
827 unsigned long flags;
828 int ret;
829
830 spin_lock_irqsave(&ctx->slock, flags);
831 ret = __fimc_s_ctrl(ctx, ctrl);
832 spin_unlock_irqrestore(&ctx->slock, flags);
833
834 return ret;
835}
836
803static const struct v4l2_ctrl_ops fimc_ctrl_ops = { 837static const struct v4l2_ctrl_ops fimc_ctrl_ops = {
804 .s_ctrl = fimc_s_ctrl, 838 .s_ctrl = fimc_s_ctrl,
805}; 839};
806 840
807int fimc_ctrls_create(struct fimc_ctx *ctx) 841int fimc_ctrls_create(struct fimc_ctx *ctx)
808{ 842{
843 struct samsung_fimc_variant *variant = ctx->fimc_dev->variant;
844 unsigned int max_alpha = fimc_get_alpha_mask(ctx->d_frame.fmt);
845
809 if (ctx->ctrls_rdy) 846 if (ctx->ctrls_rdy)
810 return 0; 847 return 0;
811 v4l2_ctrl_handler_init(&ctx->ctrl_handler, 3); 848 v4l2_ctrl_handler_init(&ctx->ctrl_handler, 4);
812 849
813 ctx->ctrl_rotate = v4l2_ctrl_new_std(&ctx->ctrl_handler, &fimc_ctrl_ops, 850 ctx->ctrl_rotate = v4l2_ctrl_new_std(&ctx->ctrl_handler, &fimc_ctrl_ops,
814 V4L2_CID_HFLIP, 0, 1, 1, 0); 851 V4L2_CID_HFLIP, 0, 1, 1, 0);
@@ -816,6 +853,13 @@ int fimc_ctrls_create(struct fimc_ctx *ctx)
816 V4L2_CID_VFLIP, 0, 1, 1, 0); 853 V4L2_CID_VFLIP, 0, 1, 1, 0);
817 ctx->ctrl_vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, &fimc_ctrl_ops, 854 ctx->ctrl_vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, &fimc_ctrl_ops,
818 V4L2_CID_ROTATE, 0, 270, 90, 0); 855 V4L2_CID_ROTATE, 0, 270, 90, 0);
856 if (variant->has_alpha)
857 ctx->ctrl_alpha = v4l2_ctrl_new_std(&ctx->ctrl_handler,
858 &fimc_ctrl_ops, V4L2_CID_ALPHA_COMPONENT,
859 0, max_alpha, 1, 0);
860 else
861 ctx->ctrl_alpha = NULL;
862
819 ctx->ctrls_rdy = ctx->ctrl_handler.error == 0; 863 ctx->ctrls_rdy = ctx->ctrl_handler.error == 0;
820 864
821 return ctx->ctrl_handler.error; 865 return ctx->ctrl_handler.error;
@@ -826,11 +870,14 @@ void fimc_ctrls_delete(struct fimc_ctx *ctx)
826 if (ctx->ctrls_rdy) { 870 if (ctx->ctrls_rdy) {
827 v4l2_ctrl_handler_free(&ctx->ctrl_handler); 871 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
828 ctx->ctrls_rdy = false; 872 ctx->ctrls_rdy = false;
873 ctx->ctrl_alpha = NULL;
829 } 874 }
830} 875}
831 876
832void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active) 877void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active)
833{ 878{
879 unsigned int has_alpha = ctx->d_frame.fmt->flags & FMT_HAS_ALPHA;
880
834 if (!ctx->ctrls_rdy) 881 if (!ctx->ctrls_rdy)
835 return; 882 return;
836 883
@@ -838,6 +885,8 @@ void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active)
838 v4l2_ctrl_activate(ctx->ctrl_rotate, active); 885 v4l2_ctrl_activate(ctx->ctrl_rotate, active);
839 v4l2_ctrl_activate(ctx->ctrl_hflip, active); 886 v4l2_ctrl_activate(ctx->ctrl_hflip, active);
840 v4l2_ctrl_activate(ctx->ctrl_vflip, active); 887 v4l2_ctrl_activate(ctx->ctrl_vflip, active);
888 if (ctx->ctrl_alpha)
889 v4l2_ctrl_activate(ctx->ctrl_alpha, active && has_alpha);
841 890
842 if (active) { 891 if (active) {
843 ctx->rotation = ctx->ctrl_rotate->val; 892 ctx->rotation = ctx->ctrl_rotate->val;
@@ -851,6 +900,24 @@ void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active)
851 mutex_unlock(&ctx->ctrl_handler.lock); 900 mutex_unlock(&ctx->ctrl_handler.lock);
852} 901}
853 902
903/* Update maximum value of the alpha color control */
904void fimc_alpha_ctrl_update(struct fimc_ctx *ctx)
905{
906 struct fimc_dev *fimc = ctx->fimc_dev;
907 struct v4l2_ctrl *ctrl = ctx->ctrl_alpha;
908
909 if (ctrl == NULL || !fimc->variant->has_alpha)
910 return;
911
912 v4l2_ctrl_lock(ctrl);
913 ctrl->maximum = fimc_get_alpha_mask(ctx->d_frame.fmt);
914
915 if (ctrl->cur.val > ctrl->maximum)
916 ctrl->cur.val = ctrl->maximum;
917
918 v4l2_ctrl_unlock(ctrl);
919}
920
854/* 921/*
855 * V4L2 ioctl handlers 922 * V4L2 ioctl handlers
856 */ 923 */
@@ -874,7 +941,8 @@ static int fimc_m2m_enum_fmt_mplane(struct file *file, void *priv,
874{ 941{
875 struct fimc_fmt *fmt; 942 struct fimc_fmt *fmt;
876 943
877 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_M2M, f->index); 944 fmt = fimc_find_format(NULL, NULL, get_m2m_fmt_flags(f->type),
945 f->index);
878 if (!fmt) 946 if (!fmt)
879 return -EINVAL; 947 return -EINVAL;
880 948
@@ -938,6 +1006,7 @@ void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height,
938 pix->colorspace = V4L2_COLORSPACE_JPEG; 1006 pix->colorspace = V4L2_COLORSPACE_JPEG;
939 pix->field = V4L2_FIELD_NONE; 1007 pix->field = V4L2_FIELD_NONE;
940 pix->num_planes = fmt->memplanes; 1008 pix->num_planes = fmt->memplanes;
1009 pix->pixelformat = fmt->fourcc;
941 pix->height = height; 1010 pix->height = height;
942 pix->width = width; 1011 pix->width = width;
943 1012
@@ -1017,7 +1086,8 @@ static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f)
1017 1086
1018 dbg("w: %d, h: %d", pix->width, pix->height); 1087 dbg("w: %d, h: %d", pix->width, pix->height);
1019 1088
1020 fmt = fimc_find_format(&pix->pixelformat, NULL, FMT_FLAGS_M2M, 0); 1089 fmt = fimc_find_format(&pix->pixelformat, NULL,
1090 get_m2m_fmt_flags(f->type), 0);
1021 if (WARN(fmt == NULL, "Pixel format lookup failed")) 1091 if (WARN(fmt == NULL, "Pixel format lookup failed"))
1022 return -EINVAL; 1092 return -EINVAL;
1023 1093
@@ -1087,10 +1157,13 @@ static int fimc_m2m_s_fmt_mplane(struct file *file, void *fh,
1087 1157
1088 pix = &f->fmt.pix_mp; 1158 pix = &f->fmt.pix_mp;
1089 frame->fmt = fimc_find_format(&pix->pixelformat, NULL, 1159 frame->fmt = fimc_find_format(&pix->pixelformat, NULL,
1090 FMT_FLAGS_M2M, 0); 1160 get_m2m_fmt_flags(f->type), 0);
1091 if (!frame->fmt) 1161 if (!frame->fmt)
1092 return -EINVAL; 1162 return -EINVAL;
1093 1163
1164 /* Update RGB Alpha control state and value range */
1165 fimc_alpha_ctrl_update(ctx);
1166
1094 for (i = 0; i < frame->fmt->colplanes; i++) { 1167 for (i = 0; i < frame->fmt->colplanes; i++) {
1095 frame->payload[i] = 1168 frame->payload[i] =
1096 (pix->width * pix->height * frame->fmt->depth[i]) / 8; 1169 (pix->width * pix->height * frame->fmt->depth[i]) / 8;
@@ -1374,6 +1447,12 @@ static int fimc_m2m_open(struct file *file)
1374 if (!ctx) 1447 if (!ctx)
1375 return -ENOMEM; 1448 return -ENOMEM;
1376 v4l2_fh_init(&ctx->fh, fimc->m2m.vfd); 1449 v4l2_fh_init(&ctx->fh, fimc->m2m.vfd);
1450 ctx->fimc_dev = fimc;
1451
1452 /* Default color format */
1453 ctx->s_frame.fmt = &fimc_formats[0];
1454 ctx->d_frame.fmt = &fimc_formats[0];
1455
1377 ret = fimc_ctrls_create(ctx); 1456 ret = fimc_ctrls_create(ctx);
1378 if (ret) 1457 if (ret)
1379 goto error_fh; 1458 goto error_fh;
@@ -1383,10 +1462,6 @@ static int fimc_m2m_open(struct file *file)
1383 file->private_data = &ctx->fh; 1462 file->private_data = &ctx->fh;
1384 v4l2_fh_add(&ctx->fh); 1463 v4l2_fh_add(&ctx->fh);
1385 1464
1386 ctx->fimc_dev = fimc;
1387 /* Default color format */
1388 ctx->s_frame.fmt = &fimc_formats[0];
1389 ctx->d_frame.fmt = &fimc_formats[0];
1390 /* Setup the device context for memory-to-memory mode */ 1465 /* Setup the device context for memory-to-memory mode */
1391 ctx->state = FIMC_CTX_M2M; 1466 ctx->state = FIMC_CTX_M2M;
1392 ctx->flags = 0; 1467 ctx->flags = 0;
@@ -1709,9 +1784,8 @@ static int fimc_runtime_resume(struct device *dev)
1709 /* Resume the capture or mem-to-mem device */ 1784 /* Resume the capture or mem-to-mem device */
1710 if (fimc_capture_busy(fimc)) 1785 if (fimc_capture_busy(fimc))
1711 return fimc_capture_resume(fimc); 1786 return fimc_capture_resume(fimc);
1712 else if (fimc_m2m_pending(fimc)) 1787
1713 return fimc_m2m_resume(fimc); 1788 return fimc_m2m_resume(fimc);
1714 return 0;
1715} 1789}
1716 1790
1717static int fimc_runtime_suspend(struct device *dev) 1791static int fimc_runtime_suspend(struct device *dev)
@@ -1893,6 +1967,7 @@ static struct samsung_fimc_variant fimc0_variant_exynos4 = {
1893 .has_cam_if = 1, 1967 .has_cam_if = 1,
1894 .has_cistatus2 = 1, 1968 .has_cistatus2 = 1,
1895 .has_mainscaler_ext = 1, 1969 .has_mainscaler_ext = 1,
1970 .has_alpha = 1,
1896 .min_inp_pixsize = 16, 1971 .min_inp_pixsize = 16,
1897 .min_out_pixsize = 16, 1972 .min_out_pixsize = 16,
1898 .hor_offs_align = 2, 1973 .hor_offs_align = 2,
@@ -1906,6 +1981,7 @@ static struct samsung_fimc_variant fimc3_variant_exynos4 = {
1906 .has_cam_if = 1, 1981 .has_cam_if = 1,
1907 .has_cistatus2 = 1, 1982 .has_cistatus2 = 1,
1908 .has_mainscaler_ext = 1, 1983 .has_mainscaler_ext = 1,
1984 .has_alpha = 1,
1909 .min_inp_pixsize = 16, 1985 .min_inp_pixsize = 16,
1910 .min_out_pixsize = 16, 1986 .min_out_pixsize = 16,
1911 .hor_offs_align = 2, 1987 .hor_offs_align = 2,
diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h
index c7f01c47b20..4e20560c73d 100644
--- a/drivers/media/video/s5p-fimc/fimc-core.h
+++ b/drivers/media/video/s5p-fimc/fimc-core.h
@@ -85,7 +85,9 @@ enum fimc_datapath {
85}; 85};
86 86
87enum fimc_color_fmt { 87enum fimc_color_fmt {
88 S5P_FIMC_RGB565 = 0x10, 88 S5P_FIMC_RGB444 = 0x10,
89 S5P_FIMC_RGB555,
90 S5P_FIMC_RGB565,
89 S5P_FIMC_RGB666, 91 S5P_FIMC_RGB666,
90 S5P_FIMC_RGB888, 92 S5P_FIMC_RGB888,
91 S5P_FIMC_RGB30_LOCAL, 93 S5P_FIMC_RGB30_LOCAL,
@@ -160,8 +162,11 @@ struct fimc_fmt {
160 u16 colplanes; 162 u16 colplanes;
161 u8 depth[VIDEO_MAX_PLANES]; 163 u8 depth[VIDEO_MAX_PLANES];
162 u16 flags; 164 u16 flags;
163#define FMT_FLAGS_CAM (1 << 0) 165#define FMT_FLAGS_CAM (1 << 0)
164#define FMT_FLAGS_M2M (1 << 1) 166#define FMT_FLAGS_M2M_IN (1 << 1)
167#define FMT_FLAGS_M2M_OUT (1 << 2)
168#define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
169#define FMT_HAS_ALPHA (1 << 3)
165}; 170};
166 171
167/** 172/**
@@ -283,6 +288,7 @@ struct fimc_frame {
283 struct fimc_addr paddr; 288 struct fimc_addr paddr;
284 struct fimc_dma_offset dma_offset; 289 struct fimc_dma_offset dma_offset;
285 struct fimc_fmt *fmt; 290 struct fimc_fmt *fmt;
291 u8 alpha;
286}; 292};
287 293
288/** 294/**
@@ -387,6 +393,7 @@ struct samsung_fimc_variant {
387 unsigned int has_cistatus2:1; 393 unsigned int has_cistatus2:1;
388 unsigned int has_mainscaler_ext:1; 394 unsigned int has_mainscaler_ext:1;
389 unsigned int has_cam_if:1; 395 unsigned int has_cam_if:1;
396 unsigned int has_alpha:1;
390 struct fimc_pix_limit *pix_limit; 397 struct fimc_pix_limit *pix_limit;
391 u16 min_inp_pixsize; 398 u16 min_inp_pixsize;
392 u16 min_out_pixsize; 399 u16 min_out_pixsize;
@@ -482,7 +489,8 @@ struct fimc_dev {
482 * @ctrl_handler: v4l2 controls handler 489 * @ctrl_handler: v4l2 controls handler
483 * @ctrl_rotate image rotation control 490 * @ctrl_rotate image rotation control
484 * @ctrl_hflip horizontal flip control 491 * @ctrl_hflip horizontal flip control
485 * @ctrl_vflip vartical flip control 492 * @ctrl_vflip vertical flip control
493 * @ctrl_alpha RGB alpha control
486 * @ctrls_rdy: true if the control handler is initialized 494 * @ctrls_rdy: true if the control handler is initialized
487 */ 495 */
488struct fimc_ctx { 496struct fimc_ctx {
@@ -509,6 +517,7 @@ struct fimc_ctx {
509 struct v4l2_ctrl *ctrl_rotate; 517 struct v4l2_ctrl *ctrl_rotate;
510 struct v4l2_ctrl *ctrl_hflip; 518 struct v4l2_ctrl *ctrl_hflip;
511 struct v4l2_ctrl *ctrl_vflip; 519 struct v4l2_ctrl *ctrl_vflip;
520 struct v4l2_ctrl *ctrl_alpha;
512 bool ctrls_rdy; 521 bool ctrls_rdy;
513}; 522};
514 523
@@ -578,6 +587,17 @@ static inline int tiled_fmt(struct fimc_fmt *fmt)
578 return fmt->fourcc == V4L2_PIX_FMT_NV12MT; 587 return fmt->fourcc == V4L2_PIX_FMT_NV12MT;
579} 588}
580 589
590/* Return the alpha component bit mask */
591static inline int fimc_get_alpha_mask(struct fimc_fmt *fmt)
592{
593 switch (fmt->color) {
594 case S5P_FIMC_RGB444: return 0x0f;
595 case S5P_FIMC_RGB555: return 0x01;
596 case S5P_FIMC_RGB888: return 0xff;
597 default: return 0;
598 };
599}
600
581static inline void fimc_hw_clear_irq(struct fimc_dev *dev) 601static inline void fimc_hw_clear_irq(struct fimc_dev *dev)
582{ 602{
583 u32 cfg = readl(dev->regs + S5P_CIGCTRL); 603 u32 cfg = readl(dev->regs + S5P_CIGCTRL);
@@ -674,6 +694,7 @@ void fimc_hw_set_prescaler(struct fimc_ctx *ctx);
674void fimc_hw_set_mainscaler(struct fimc_ctx *ctx); 694void fimc_hw_set_mainscaler(struct fimc_ctx *ctx);
675void fimc_hw_en_capture(struct fimc_ctx *ctx); 695void fimc_hw_en_capture(struct fimc_ctx *ctx);
676void fimc_hw_set_effect(struct fimc_ctx *ctx, bool active); 696void fimc_hw_set_effect(struct fimc_ctx *ctx, bool active);
697void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx);
677void fimc_hw_set_in_dma(struct fimc_ctx *ctx); 698void fimc_hw_set_in_dma(struct fimc_ctx *ctx);
678void fimc_hw_set_input_path(struct fimc_ctx *ctx); 699void fimc_hw_set_input_path(struct fimc_ctx *ctx);
679void fimc_hw_set_output_path(struct fimc_ctx *ctx); 700void fimc_hw_set_output_path(struct fimc_ctx *ctx);
@@ -695,6 +716,7 @@ int fimc_vidioc_enum_fmt_mplane(struct file *file, void *priv,
695int fimc_ctrls_create(struct fimc_ctx *ctx); 716int fimc_ctrls_create(struct fimc_ctx *ctx);
696void fimc_ctrls_delete(struct fimc_ctx *ctx); 717void fimc_ctrls_delete(struct fimc_ctx *ctx);
697void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active); 718void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active);
719void fimc_alpha_ctrl_update(struct fimc_ctx *ctx);
698int fimc_fill_format(struct fimc_frame *frame, struct v4l2_format *f); 720int fimc_fill_format(struct fimc_frame *frame, struct v4l2_format *f);
699void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height, 721void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height,
700 struct v4l2_pix_format_mplane *pix); 722 struct v4l2_pix_format_mplane *pix);
diff --git a/drivers/media/video/s5p-fimc/fimc-reg.c b/drivers/media/video/s5p-fimc/fimc-reg.c
index 44f5c2d1920..15466d0529c 100644
--- a/drivers/media/video/s5p-fimc/fimc-reg.c
+++ b/drivers/media/video/s5p-fimc/fimc-reg.c
@@ -117,7 +117,7 @@ void fimc_hw_set_target_format(struct fimc_ctx *ctx)
117 S5P_CITRGFMT_VSIZE_MASK); 117 S5P_CITRGFMT_VSIZE_MASK);
118 118
119 switch (frame->fmt->color) { 119 switch (frame->fmt->color) {
120 case S5P_FIMC_RGB565...S5P_FIMC_RGB888: 120 case S5P_FIMC_RGB444...S5P_FIMC_RGB888:
121 cfg |= S5P_CITRGFMT_RGB; 121 cfg |= S5P_CITRGFMT_RGB;
122 break; 122 break;
123 case S5P_FIMC_YCBCR420: 123 case S5P_FIMC_YCBCR420:
@@ -175,6 +175,7 @@ void fimc_hw_set_out_dma(struct fimc_ctx *ctx)
175 struct fimc_dev *dev = ctx->fimc_dev; 175 struct fimc_dev *dev = ctx->fimc_dev;
176 struct fimc_frame *frame = &ctx->d_frame; 176 struct fimc_frame *frame = &ctx->d_frame;
177 struct fimc_dma_offset *offset = &frame->dma_offset; 177 struct fimc_dma_offset *offset = &frame->dma_offset;
178 struct fimc_fmt *fmt = frame->fmt;
178 179
179 /* Set the input dma offsets. */ 180 /* Set the input dma offsets. */
180 cfg = 0; 181 cfg = 0;
@@ -198,15 +199,22 @@ void fimc_hw_set_out_dma(struct fimc_ctx *ctx)
198 cfg = readl(dev->regs + S5P_CIOCTRL); 199 cfg = readl(dev->regs + S5P_CIOCTRL);
199 200
200 cfg &= ~(S5P_CIOCTRL_ORDER2P_MASK | S5P_CIOCTRL_ORDER422_MASK | 201 cfg &= ~(S5P_CIOCTRL_ORDER2P_MASK | S5P_CIOCTRL_ORDER422_MASK |
201 S5P_CIOCTRL_YCBCR_PLANE_MASK); 202 S5P_CIOCTRL_YCBCR_PLANE_MASK | S5P_CIOCTRL_RGB16FMT_MASK);
202 203
203 if (frame->fmt->colplanes == 1) 204 if (fmt->colplanes == 1)
204 cfg |= ctx->out_order_1p; 205 cfg |= ctx->out_order_1p;
205 else if (frame->fmt->colplanes == 2) 206 else if (fmt->colplanes == 2)
206 cfg |= ctx->out_order_2p | S5P_CIOCTRL_YCBCR_2PLANE; 207 cfg |= ctx->out_order_2p | S5P_CIOCTRL_YCBCR_2PLANE;
207 else if (frame->fmt->colplanes == 3) 208 else if (fmt->colplanes == 3)
208 cfg |= S5P_CIOCTRL_YCBCR_3PLANE; 209 cfg |= S5P_CIOCTRL_YCBCR_3PLANE;
209 210
211 if (fmt->color == S5P_FIMC_RGB565)
212 cfg |= S5P_CIOCTRL_RGB565;
213 else if (fmt->color == S5P_FIMC_RGB555)
214 cfg |= S5P_CIOCTRL_ARGB1555;
215 else if (fmt->color == S5P_FIMC_RGB444)
216 cfg |= S5P_CIOCTRL_ARGB4444;
217
210 writel(cfg, dev->regs + S5P_CIOCTRL); 218 writel(cfg, dev->regs + S5P_CIOCTRL);
211} 219}
212 220
@@ -278,22 +286,28 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx)
278 if (sc->copy_mode) 286 if (sc->copy_mode)
279 cfg |= S5P_CISCCTRL_ONE2ONE; 287 cfg |= S5P_CISCCTRL_ONE2ONE;
280 288
281
282 if (ctx->in_path == FIMC_DMA) { 289 if (ctx->in_path == FIMC_DMA) {
283 if (src_frame->fmt->color == S5P_FIMC_RGB565) 290 switch (src_frame->fmt->color) {
291 case S5P_FIMC_RGB565:
284 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB565; 292 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB565;
285 else if (src_frame->fmt->color == S5P_FIMC_RGB666) 293 break;
294 case S5P_FIMC_RGB666:
286 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB666; 295 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB666;
287 else if (src_frame->fmt->color == S5P_FIMC_RGB888) 296 break;
297 case S5P_FIMC_RGB888:
288 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB888; 298 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB888;
299 break;
300 }
289 } 301 }
290 302
291 if (ctx->out_path == FIMC_DMA) { 303 if (ctx->out_path == FIMC_DMA) {
292 if (dst_frame->fmt->color == S5P_FIMC_RGB565) 304 u32 color = dst_frame->fmt->color;
305
306 if (color >= S5P_FIMC_RGB444 && color <= S5P_FIMC_RGB565)
293 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB565; 307 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB565;
294 else if (dst_frame->fmt->color == S5P_FIMC_RGB666) 308 else if (color == S5P_FIMC_RGB666)
295 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB666; 309 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB666;
296 else if (dst_frame->fmt->color == S5P_FIMC_RGB888) 310 else if (color == S5P_FIMC_RGB888)
297 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888; 311 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888;
298 } else { 312 } else {
299 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888; 313 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888;
@@ -379,6 +393,21 @@ void fimc_hw_set_effect(struct fimc_ctx *ctx, bool active)
379 writel(cfg, dev->regs + S5P_CIIMGEFF); 393 writel(cfg, dev->regs + S5P_CIIMGEFF);
380} 394}
381 395
396void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx)
397{
398 struct fimc_dev *dev = ctx->fimc_dev;
399 struct fimc_frame *frame = &ctx->d_frame;
400 u32 cfg;
401
402 if (!(frame->fmt->flags & FMT_HAS_ALPHA))
403 return;
404
405 cfg = readl(dev->regs + S5P_CIOCTRL);
406 cfg &= ~S5P_CIOCTRL_ALPHA_OUT_MASK;
407 cfg |= (frame->alpha << 4);
408 writel(cfg, dev->regs + S5P_CIOCTRL);
409}
410
382static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx) 411static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx)
383{ 412{
384 struct fimc_dev *dev = ctx->fimc_dev; 413 struct fimc_dev *dev = ctx->fimc_dev;
diff --git a/drivers/media/video/s5p-fimc/mipi-csis.c b/drivers/media/video/s5p-fimc/mipi-csis.c
index 59d79bc2f58..130335cf62f 100644
--- a/drivers/media/video/s5p-fimc/mipi-csis.c
+++ b/drivers/media/video/s5p-fimc/mipi-csis.c
@@ -427,6 +427,23 @@ static int s5pcsis_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
427 return 0; 427 return 0;
428} 428}
429 429
430static int s5pcsis_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
431{
432 struct v4l2_mbus_framefmt *format = v4l2_subdev_get_try_format(fh, 0);
433
434 format->colorspace = V4L2_COLORSPACE_JPEG;
435 format->code = s5pcsis_formats[0].code;
436 format->width = S5PCSIS_DEF_PIX_WIDTH;
437 format->height = S5PCSIS_DEF_PIX_HEIGHT;
438 format->field = V4L2_FIELD_NONE;
439
440 return 0;
441}
442
443static const struct v4l2_subdev_internal_ops s5pcsis_sd_internal_ops = {
444 .open = s5pcsis_open,
445};
446
430static struct v4l2_subdev_core_ops s5pcsis_core_ops = { 447static struct v4l2_subdev_core_ops s5pcsis_core_ops = {
431 .s_power = s5pcsis_s_power, 448 .s_power = s5pcsis_s_power,
432}; 449};
@@ -544,8 +561,13 @@ static int __devinit s5pcsis_probe(struct platform_device *pdev)
544 v4l2_subdev_init(&state->sd, &s5pcsis_subdev_ops); 561 v4l2_subdev_init(&state->sd, &s5pcsis_subdev_ops);
545 state->sd.owner = THIS_MODULE; 562 state->sd.owner = THIS_MODULE;
546 strlcpy(state->sd.name, dev_name(&pdev->dev), sizeof(state->sd.name)); 563 strlcpy(state->sd.name, dev_name(&pdev->dev), sizeof(state->sd.name));
564 state->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
547 state->csis_fmt = &s5pcsis_formats[0]; 565 state->csis_fmt = &s5pcsis_formats[0];
548 566
567 state->format.code = s5pcsis_formats[0].code;
568 state->format.width = S5PCSIS_DEF_PIX_WIDTH;
569 state->format.height = S5PCSIS_DEF_PIX_HEIGHT;
570
549 state->pads[CSIS_PAD_SINK].flags = MEDIA_PAD_FL_SINK; 571 state->pads[CSIS_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
550 state->pads[CSIS_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; 572 state->pads[CSIS_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
551 ret = media_entity_init(&state->sd.entity, 573 ret = media_entity_init(&state->sd.entity,
diff --git a/drivers/media/video/s5p-fimc/mipi-csis.h b/drivers/media/video/s5p-fimc/mipi-csis.h
index f5691336dd5..2709286396e 100644
--- a/drivers/media/video/s5p-fimc/mipi-csis.h
+++ b/drivers/media/video/s5p-fimc/mipi-csis.h
@@ -19,4 +19,7 @@
19#define CSIS_PAD_SOURCE 1 19#define CSIS_PAD_SOURCE 1
20#define CSIS_PADS_NUM 2 20#define CSIS_PADS_NUM 2
21 21
22#define S5PCSIS_DEF_PIX_WIDTH 640
23#define S5PCSIS_DEF_PIX_HEIGHT 480
24
22#endif 25#endif
diff --git a/drivers/media/video/s5p-fimc/regs-fimc.h b/drivers/media/video/s5p-fimc/regs-fimc.h
index c8e3b94bd91..c7a5bc51d57 100644
--- a/drivers/media/video/s5p-fimc/regs-fimc.h
+++ b/drivers/media/video/s5p-fimc/regs-fimc.h
@@ -107,6 +107,11 @@
107#define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3) 107#define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3)
108#define S5P_CIOCTRL_YCBCR_2PLANE (1 << 3) 108#define S5P_CIOCTRL_YCBCR_2PLANE (1 << 3)
109#define S5P_CIOCTRL_YCBCR_PLANE_MASK (1 << 3) 109#define S5P_CIOCTRL_YCBCR_PLANE_MASK (1 << 3)
110#define S5P_CIOCTRL_ALPHA_OUT_MASK (0xff << 4)
111#define S5P_CIOCTRL_RGB16FMT_MASK (3 << 16)
112#define S5P_CIOCTRL_RGB565 (0 << 16)
113#define S5P_CIOCTRL_ARGB1555 (1 << 16)
114#define S5P_CIOCTRL_ARGB4444 (2 << 16)
110#define S5P_CIOCTRL_ORDER2P_SHIFT (24) 115#define S5P_CIOCTRL_ORDER2P_SHIFT (24)
111#define S5P_CIOCTRL_ORDER2P_MASK (3 << 24) 116#define S5P_CIOCTRL_ORDER2P_MASK (3 << 24)
112#define S5P_CIOCTRL_ORDER422_2P_LSB_CRCB (0 << 24) 117#define S5P_CIOCTRL_ORDER422_2P_LSB_CRCB (0 << 24)
diff --git a/drivers/media/video/s5p-g2d/Makefile b/drivers/media/video/s5p-g2d/Makefile
new file mode 100644
index 00000000000..2c48c416a80
--- /dev/null
+++ b/drivers/media/video/s5p-g2d/Makefile
@@ -0,0 +1,3 @@
1s5p-g2d-objs := g2d.o g2d-hw.o
2
3obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D) += s5p-g2d.o
diff --git a/drivers/media/video/s5p-g2d/g2d-hw.c b/drivers/media/video/s5p-g2d/g2d-hw.c
new file mode 100644
index 00000000000..39937cf03c8
--- /dev/null
+++ b/drivers/media/video/s5p-g2d/g2d-hw.c
@@ -0,0 +1,104 @@
1/*
2 * Samsung S5P G2D - 2D Graphics Accelerator Driver
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * Kamil Debski, <k.debski@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version
11 */
12
13#include <linux/io.h>
14
15#include "g2d.h"
16#include "g2d-regs.h"
17
18#define w(x, a) writel((x), d->regs + (a))
19#define r(a) readl(d->regs + (a))
20
21/* g2d_reset clears all g2d registers */
22void g2d_reset(struct g2d_dev *d)
23{
24 w(1, SOFT_RESET_REG);
25}
26
27void g2d_set_src_size(struct g2d_dev *d, struct g2d_frame *f)
28{
29 u32 n;
30
31 w(f->stride & 0xFFFF, SRC_STRIDE_REG);
32
33 n = f->o_height & 0xFFF;
34 n <<= 16;
35 n |= f->o_width & 0xFFF;
36 w(n, SRC_LEFT_TOP_REG);
37
38 n = f->bottom & 0xFFF;
39 n <<= 16;
40 n |= f->right & 0xFFF;
41 w(n, SRC_RIGHT_BOTTOM_REG);
42
43 w(f->fmt->hw, SRC_COLOR_MODE_REG);
44}
45
46void g2d_set_src_addr(struct g2d_dev *d, dma_addr_t a)
47{
48 w(a, SRC_BASE_ADDR_REG);
49}
50
51void g2d_set_dst_size(struct g2d_dev *d, struct g2d_frame *f)
52{
53 u32 n;
54
55 w(f->stride & 0xFFFF, DST_STRIDE_REG);
56
57 n = f->o_height & 0xFFF;
58 n <<= 16;
59 n |= f->o_width & 0xFFF;
60 w(n, DST_LEFT_TOP_REG);
61
62 n = f->bottom & 0xFFF;
63 n <<= 16;
64 n |= f->right & 0xFFF;
65 w(n, DST_RIGHT_BOTTOM_REG);
66
67 w(f->fmt->hw, DST_COLOR_MODE_REG);
68}
69
70void g2d_set_dst_addr(struct g2d_dev *d, dma_addr_t a)
71{
72 w(a, DST_BASE_ADDR_REG);
73}
74
75void g2d_set_rop4(struct g2d_dev *d, u32 r)
76{
77 w(r, ROP4_REG);
78}
79
80u32 g2d_cmd_stretch(u32 e)
81{
82 e &= 1;
83 return e << 4;
84}
85
86void g2d_set_cmd(struct g2d_dev *d, u32 c)
87{
88 w(c, BITBLT_COMMAND_REG);
89}
90
91void g2d_start(struct g2d_dev *d)
92{
93 /* Clear cache */
94 w(0x7, CACHECTL_REG);
95 /* Enable interrupt */
96 w(1, INTEN_REG);
97 /* Start G2D engine */
98 w(1, BITBLT_START_REG);
99}
100
101void g2d_clear_int(struct g2d_dev *d)
102{
103 w(1, INTC_PEND_REG);
104}
diff --git a/drivers/media/video/s5p-g2d/g2d-regs.h b/drivers/media/video/s5p-g2d/g2d-regs.h
new file mode 100644
index 00000000000..02e1cf50da4
--- /dev/null
+++ b/drivers/media/video/s5p-g2d/g2d-regs.h
@@ -0,0 +1,115 @@
1/*
2 * Samsung S5P G2D - 2D Graphics Accelerator Driver
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * Kamil Debski, <k.debski@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version
11 */
12
13/* General Registers */
14#define SOFT_RESET_REG 0x0000 /* Software reset reg */
15#define INTEN_REG 0x0004 /* Interrupt Enable reg */
16#define INTC_PEND_REG 0x000C /* Interrupt Control Pending reg */
17#define FIFO_STAT_REG 0x0010 /* Command FIFO Status reg */
18#define AXI_ID_MODE_REG 0x0014 /* AXI Read ID Mode reg */
19#define CACHECTL_REG 0x0018 /* Cache & Buffer clear reg */
20#define AXI_MODE_REG 0x001C /* AXI Mode reg */
21
22/* Command Registers */
23#define BITBLT_START_REG 0x0100 /* BitBLT Start reg */
24#define BITBLT_COMMAND_REG 0x0104 /* Command reg for BitBLT */
25
26/* Parameter Setting Registers (Rotate & Direction) */
27#define ROTATE_REG 0x0200 /* Rotation reg */
28#define SRC_MSK_DIRECT_REG 0x0204 /* Src and Mask Direction reg */
29#define DST_PAT_DIRECT_REG 0x0208 /* Dest and Pattern Direction reg */
30
31/* Parameter Setting Registers (Src) */
32#define SRC_SELECT_REG 0x0300 /* Src Image Selection reg */
33#define SRC_BASE_ADDR_REG 0x0304 /* Src Image Base Address reg */
34#define SRC_STRIDE_REG 0x0308 /* Src Stride reg */
35#define SRC_COLOR_MODE_REG 0x030C /* Src Image Color Mode reg */
36#define SRC_LEFT_TOP_REG 0x0310 /* Src Left Top Coordinate reg */
37#define SRC_RIGHT_BOTTOM_REG 0x0314 /* Src Right Bottom Coordinate reg */
38
39/* Parameter Setting Registers (Dest) */
40#define DST_SELECT_REG 0x0400 /* Dest Image Selection reg */
41#define DST_BASE_ADDR_REG 0x0404 /* Dest Image Base Address reg */
42#define DST_STRIDE_REG 0x0408 /* Dest Stride reg */
43#define DST_COLOR_MODE_REG 0x040C /* Dest Image Color Mode reg */
44#define DST_LEFT_TOP_REG 0x0410 /* Dest Left Top Coordinate reg */
45#define DST_RIGHT_BOTTOM_REG 0x0414 /* Dest Right Bottom Coordinate reg */
46
47/* Parameter Setting Registers (Pattern) */
48#define PAT_BASE_ADDR_REG 0x0500 /* Pattern Image Base Address reg */
49#define PAT_SIZE_REG 0x0504 /* Pattern Image Size reg */
50#define PAT_COLOR_MODE_REG 0x0508 /* Pattern Image Color Mode reg */
51#define PAT_OFFSET_REG 0x050C /* Pattern Left Top Coordinate reg */
52#define PAT_STRIDE_REG 0x0510 /* Pattern Stride reg */
53
54/* Parameter Setting Registers (Mask) */
55#define MASK_BASE_ADDR_REG 0x0520 /* Mask Base Address reg */
56#define MASK_STRIDE_REG 0x0524 /* Mask Stride reg */
57
58/* Parameter Setting Registers (Clipping Window) */
59#define CW_LT_REG 0x0600 /* LeftTop coordinates of Clip Window */
60#define CW_RB_REG 0x0604 /* RightBottom coordinates of Clip
61 Window */
62
63/* Parameter Setting Registers (ROP & Alpha Setting) */
64#define THIRD_OPERAND_REG 0x0610 /* Third Operand Selection reg */
65#define ROP4_REG 0x0614 /* Raster Operation reg */
66#define ALPHA_REG 0x0618 /* Alpha value, Fading offset value */
67
68/* Parameter Setting Registers (Color) */
69#define FG_COLOR_REG 0x0700 /* Foreground Color reg */
70#define BG_COLOR_REG 0x0704 /* Background Color reg */
71#define BS_COLOR_REG 0x0708 /* Blue Screen Color reg */
72
73/* Parameter Setting Registers (Color Key) */
74#define SRC_COLORKEY_CTRL_REG 0x0710 /* Src Colorkey control reg */
75#define SRC_COLORKEY_DR_MIN_REG 0x0714 /* Src Colorkey Decision Reference
76 Min reg */
77#define SRC_COLORKEY_DR_MAX_REG 0x0718 /* Src Colorkey Decision Reference
78 Max reg */
79#define DST_COLORKEY_CTRL_REG 0x071C /* Dest Colorkey control reg */
80#define DST_COLORKEY_DR_MIN_REG 0x0720 /* Dest Colorkey Decision Reference
81 Min reg */
82#define DST_COLORKEY_DR_MAX_REG 0x0724 /* Dest Colorkey Decision Reference
83 Max reg */
84
85/* Color mode values */
86
87#define ORDER_XRGB 0
88#define ORDER_RGBX 1
89#define ORDER_XBGR 2
90#define ORDER_BGRX 3
91
92#define MODE_XRGB_8888 0
93#define MODE_ARGB_8888 1
94#define MODE_RGB_565 2
95#define MODE_XRGB_1555 3
96#define MODE_ARGB_1555 4
97#define MODE_XRGB_4444 5
98#define MODE_ARGB_4444 6
99#define MODE_PACKED_RGB_888 7
100
101#define COLOR_MODE(o, m) (((o) << 4) | (m))
102
103/* ROP4 operation values */
104#define ROP4_COPY 0xCCCC
105#define ROP4_INVERT 0x3333
106
107/* Hardware limits */
108#define MAX_WIDTH 8000
109#define MAX_HEIGHT 8000
110
111#define G2D_TIMEOUT 500
112
113#define DEFAULT_WIDTH 100
114#define DEFAULT_HEIGHT 100
115
diff --git a/drivers/media/video/s5p-g2d/g2d.c b/drivers/media/video/s5p-g2d/g2d.c
new file mode 100644
index 00000000000..c40b0dde188
--- /dev/null
+++ b/drivers/media/video/s5p-g2d/g2d.c
@@ -0,0 +1,810 @@
1/*
2 * Samsung S5P G2D - 2D Graphics Accelerator Driver
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * Kamil Debski, <k.debski@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version
11 */
12
13#include <linux/module.h>
14#include <linux/fs.h>
15#include <linux/version.h>
16#include <linux/timer.h>
17#include <linux/sched.h>
18#include <linux/slab.h>
19#include <linux/clk.h>
20#include <linux/interrupt.h>
21
22#include <linux/platform_device.h>
23#include <media/v4l2-mem2mem.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-ioctl.h>
26#include <media/videobuf2-core.h>
27#include <media/videobuf2-dma-contig.h>
28
29#include "g2d.h"
30#include "g2d-regs.h"
31
32#define fh2ctx(__fh) container_of(__fh, struct g2d_ctx, fh)
33
34static struct g2d_fmt formats[] = {
35 {
36 .name = "XRGB_8888",
37 .fourcc = V4L2_PIX_FMT_RGB32,
38 .depth = 32,
39 .hw = COLOR_MODE(ORDER_XRGB, MODE_XRGB_8888),
40 },
41 {
42 .name = "RGB_565",
43 .fourcc = V4L2_PIX_FMT_RGB565X,
44 .depth = 16,
45 .hw = COLOR_MODE(ORDER_XRGB, MODE_RGB_565),
46 },
47 {
48 .name = "XRGB_1555",
49 .fourcc = V4L2_PIX_FMT_RGB555X,
50 .depth = 16,
51 .hw = COLOR_MODE(ORDER_XRGB, MODE_XRGB_1555),
52 },
53 {
54 .name = "XRGB_4444",
55 .fourcc = V4L2_PIX_FMT_RGB444,
56 .depth = 16,
57 .hw = COLOR_MODE(ORDER_XRGB, MODE_XRGB_4444),
58 },
59 {
60 .name = "PACKED_RGB_888",
61 .fourcc = V4L2_PIX_FMT_RGB24,
62 .depth = 24,
63 .hw = COLOR_MODE(ORDER_XRGB, MODE_PACKED_RGB_888),
64 },
65};
66#define NUM_FORMATS ARRAY_SIZE(formats)
67
68struct g2d_frame def_frame = {
69 .width = DEFAULT_WIDTH,
70 .height = DEFAULT_HEIGHT,
71 .c_width = DEFAULT_WIDTH,
72 .c_height = DEFAULT_HEIGHT,
73 .o_width = 0,
74 .o_height = 0,
75 .fmt = &formats[0],
76 .right = DEFAULT_WIDTH,
77 .bottom = DEFAULT_HEIGHT,
78};
79
80struct g2d_fmt *find_fmt(struct v4l2_format *f)
81{
82 unsigned int i;
83 for (i = 0; i < NUM_FORMATS; i++) {
84 if (formats[i].fourcc == f->fmt.pix.pixelformat)
85 return &formats[i];
86 }
87 return NULL;
88}
89
90
91static struct g2d_frame *get_frame(struct g2d_ctx *ctx,
92 enum v4l2_buf_type type)
93{
94 switch (type) {
95 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
96 return &ctx->in;
97 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
98 return &ctx->out;
99 default:
100 return ERR_PTR(-EINVAL);
101 }
102}
103
104static int g2d_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
105 unsigned int *nbuffers, unsigned int *nplanes,
106 unsigned int sizes[], void *alloc_ctxs[])
107{
108 struct g2d_ctx *ctx = vb2_get_drv_priv(vq);
109 struct g2d_frame *f = get_frame(ctx, vq->type);
110
111 if (IS_ERR(f))
112 return PTR_ERR(f);
113
114 sizes[0] = f->size;
115 *nplanes = 1;
116 alloc_ctxs[0] = ctx->dev->alloc_ctx;
117
118 if (*nbuffers == 0)
119 *nbuffers = 1;
120
121 return 0;
122}
123
124static int g2d_buf_prepare(struct vb2_buffer *vb)
125{
126 struct g2d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
127 struct g2d_frame *f = get_frame(ctx, vb->vb2_queue->type);
128
129 if (IS_ERR(f))
130 return PTR_ERR(f);
131 vb2_set_plane_payload(vb, 0, f->size);
132 return 0;
133}
134
135static void g2d_buf_queue(struct vb2_buffer *vb)
136{
137 struct g2d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
138 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
139}
140
141
142static struct vb2_ops g2d_qops = {
143 .queue_setup = g2d_queue_setup,
144 .buf_prepare = g2d_buf_prepare,
145 .buf_queue = g2d_buf_queue,
146};
147
148static int queue_init(void *priv, struct vb2_queue *src_vq,
149 struct vb2_queue *dst_vq)
150{
151 struct g2d_ctx *ctx = priv;
152 int ret;
153
154 memset(src_vq, 0, sizeof(*src_vq));
155 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
156 src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
157 src_vq->drv_priv = ctx;
158 src_vq->ops = &g2d_qops;
159 src_vq->mem_ops = &vb2_dma_contig_memops;
160 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
161
162 ret = vb2_queue_init(src_vq);
163 if (ret)
164 return ret;
165
166 memset(dst_vq, 0, sizeof(*dst_vq));
167 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
168 dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
169 dst_vq->drv_priv = ctx;
170 dst_vq->ops = &g2d_qops;
171 dst_vq->mem_ops = &vb2_dma_contig_memops;
172 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
173
174 return vb2_queue_init(dst_vq);
175}
176
177static int g2d_s_ctrl(struct v4l2_ctrl *ctrl)
178{
179 struct g2d_ctx *ctx = container_of(ctrl->handler, struct g2d_ctx,
180 ctrl_handler);
181 switch (ctrl->id) {
182 case V4L2_CID_COLORFX:
183 if (ctrl->val == V4L2_COLORFX_NEGATIVE)
184 ctx->rop = ROP4_INVERT;
185 else
186 ctx->rop = ROP4_COPY;
187 default:
188 v4l2_err(&ctx->dev->v4l2_dev, "unknown control\n");
189 return -EINVAL;
190 }
191 return 0;
192}
193
194static const struct v4l2_ctrl_ops g2d_ctrl_ops = {
195 .s_ctrl = g2d_s_ctrl,
196};
197
198int g2d_setup_ctrls(struct g2d_ctx *ctx)
199{
200 struct g2d_dev *dev = ctx->dev;
201
202 v4l2_ctrl_handler_init(&ctx->ctrl_handler, 1);
203 if (ctx->ctrl_handler.error) {
204 v4l2_err(&dev->v4l2_dev, "v4l2_ctrl_handler_init failed\n");
205 return ctx->ctrl_handler.error;
206 }
207
208 v4l2_ctrl_new_std_menu(
209 &ctx->ctrl_handler,
210 &g2d_ctrl_ops,
211 V4L2_CID_COLORFX,
212 V4L2_COLORFX_NEGATIVE,
213 ~((1 << V4L2_COLORFX_NONE) | (1 << V4L2_COLORFX_NEGATIVE)),
214 V4L2_COLORFX_NONE);
215
216 if (ctx->ctrl_handler.error) {
217 v4l2_err(&dev->v4l2_dev, "v4l2_ctrl_handler_init failed\n");
218 return ctx->ctrl_handler.error;
219 }
220
221 return 0;
222}
223
224static int g2d_open(struct file *file)
225{
226 struct g2d_dev *dev = video_drvdata(file);
227 struct g2d_ctx *ctx = NULL;
228 int ret = 0;
229
230 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
231 if (!ctx)
232 return -ENOMEM;
233 ctx->dev = dev;
234 /* Set default formats */
235 ctx->in = def_frame;
236 ctx->out = def_frame;
237
238 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init);
239 if (IS_ERR(ctx->m2m_ctx)) {
240 ret = PTR_ERR(ctx->m2m_ctx);
241 kfree(ctx);
242 return ret;
243 }
244 v4l2_fh_init(&ctx->fh, video_devdata(file));
245 file->private_data = &ctx->fh;
246 v4l2_fh_add(&ctx->fh);
247
248 g2d_setup_ctrls(ctx);
249
250 /* Write the default values to the ctx struct */
251 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
252
253 ctx->fh.ctrl_handler = &ctx->ctrl_handler;
254
255 v4l2_info(&dev->v4l2_dev, "instance opened\n");
256 return 0;
257}
258
259static int g2d_release(struct file *file)
260{
261 struct g2d_dev *dev = video_drvdata(file);
262 struct g2d_ctx *ctx = fh2ctx(file->private_data);
263
264 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
265 v4l2_fh_del(&ctx->fh);
266 v4l2_fh_exit(&ctx->fh);
267 kfree(ctx);
268 v4l2_info(&dev->v4l2_dev, "instance closed\n");
269 return 0;
270}
271
272
273static int vidioc_querycap(struct file *file, void *priv,
274 struct v4l2_capability *cap)
275{
276 strncpy(cap->driver, G2D_NAME, sizeof(cap->driver) - 1);
277 strncpy(cap->card, G2D_NAME, sizeof(cap->card) - 1);
278 cap->bus_info[0] = 0;
279 cap->version = KERNEL_VERSION(1, 0, 0);
280 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT
281 | V4L2_CAP_STREAMING;
282 return 0;
283}
284
285static int vidioc_enum_fmt(struct file *file, void *prv, struct v4l2_fmtdesc *f)
286{
287 struct g2d_fmt *fmt;
288 if (f->index >= NUM_FORMATS)
289 return -EINVAL;
290 fmt = &formats[f->index];
291 f->pixelformat = fmt->fourcc;
292 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
293 return 0;
294}
295
296static int vidioc_g_fmt(struct file *file, void *prv, struct v4l2_format *f)
297{
298 struct g2d_ctx *ctx = prv;
299 struct vb2_queue *vq;
300 struct g2d_frame *frm;
301
302 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
303 if (!vq)
304 return -EINVAL;
305 frm = get_frame(ctx, f->type);
306 if (IS_ERR(frm))
307 return PTR_ERR(frm);
308
309 f->fmt.pix.width = frm->width;
310 f->fmt.pix.height = frm->height;
311 f->fmt.pix.field = V4L2_FIELD_NONE;
312 f->fmt.pix.pixelformat = frm->fmt->fourcc;
313 f->fmt.pix.bytesperline = (frm->width * frm->fmt->depth) >> 3;
314 f->fmt.pix.sizeimage = frm->size;
315 return 0;
316}
317
318static int vidioc_try_fmt(struct file *file, void *prv, struct v4l2_format *f)
319{
320 struct g2d_fmt *fmt;
321 enum v4l2_field *field;
322
323 fmt = find_fmt(f);
324 if (!fmt)
325 return -EINVAL;
326
327 field = &f->fmt.pix.field;
328 if (*field == V4L2_FIELD_ANY)
329 *field = V4L2_FIELD_NONE;
330 else if (*field != V4L2_FIELD_NONE)
331 return -EINVAL;
332
333 if (f->fmt.pix.width > MAX_WIDTH)
334 f->fmt.pix.width = MAX_WIDTH;
335 if (f->fmt.pix.height > MAX_HEIGHT)
336 f->fmt.pix.height = MAX_HEIGHT;
337
338 if (f->fmt.pix.width < 1)
339 f->fmt.pix.width = 1;
340 if (f->fmt.pix.height < 1)
341 f->fmt.pix.height = 1;
342
343 f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
344 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
345 return 0;
346}
347
348static int vidioc_s_fmt(struct file *file, void *prv, struct v4l2_format *f)
349{
350 struct g2d_ctx *ctx = prv;
351 struct g2d_dev *dev = ctx->dev;
352 struct vb2_queue *vq;
353 struct g2d_frame *frm;
354 struct g2d_fmt *fmt;
355 int ret = 0;
356
357 /* Adjust all values accordingly to the hardware capabilities
358 * and chosen format. */
359 ret = vidioc_try_fmt(file, prv, f);
360 if (ret)
361 return ret;
362 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
363 if (vb2_is_busy(vq)) {
364 v4l2_err(&dev->v4l2_dev, "queue (%d) bust\n", f->type);
365 return -EBUSY;
366 }
367 frm = get_frame(ctx, f->type);
368 if (IS_ERR(frm))
369 return PTR_ERR(frm);
370 fmt = find_fmt(f);
371 if (!fmt)
372 return -EINVAL;
373 frm->width = f->fmt.pix.width;
374 frm->height = f->fmt.pix.height;
375 frm->size = f->fmt.pix.sizeimage;
376 /* Reset crop settings */
377 frm->o_width = 0;
378 frm->o_height = 0;
379 frm->c_width = frm->width;
380 frm->c_height = frm->height;
381 frm->right = frm->width;
382 frm->bottom = frm->height;
383 frm->fmt = fmt;
384 frm->stride = f->fmt.pix.bytesperline;
385 return 0;
386}
387
388static unsigned int g2d_poll(struct file *file, struct poll_table_struct *wait)
389{
390 struct g2d_ctx *ctx = fh2ctx(file->private_data);
391 return v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
392}
393
394static int g2d_mmap(struct file *file, struct vm_area_struct *vma)
395{
396 struct g2d_ctx *ctx = fh2ctx(file->private_data);
397 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
398}
399
400static int vidioc_reqbufs(struct file *file, void *priv,
401 struct v4l2_requestbuffers *reqbufs)
402{
403 struct g2d_ctx *ctx = priv;
404 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
405}
406
407static int vidioc_querybuf(struct file *file, void *priv,
408 struct v4l2_buffer *buf)
409{
410 struct g2d_ctx *ctx = priv;
411 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
412}
413
414static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
415{
416 struct g2d_ctx *ctx = priv;
417 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
418}
419
420static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
421{
422 struct g2d_ctx *ctx = priv;
423 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
424}
425
426
427static int vidioc_streamon(struct file *file, void *priv,
428 enum v4l2_buf_type type)
429{
430 struct g2d_ctx *ctx = priv;
431 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
432}
433
434static int vidioc_streamoff(struct file *file, void *priv,
435 enum v4l2_buf_type type)
436{
437 struct g2d_ctx *ctx = priv;
438 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
439}
440
441static int vidioc_cropcap(struct file *file, void *priv,
442 struct v4l2_cropcap *cr)
443{
444 struct g2d_ctx *ctx = priv;
445 struct g2d_frame *f;
446
447 f = get_frame(ctx, cr->type);
448 if (IS_ERR(f))
449 return PTR_ERR(f);
450
451 cr->bounds.left = 0;
452 cr->bounds.top = 0;
453 cr->bounds.width = f->width;
454 cr->bounds.height = f->height;
455 cr->defrect = cr->bounds;
456 return 0;
457}
458
459static int vidioc_g_crop(struct file *file, void *prv, struct v4l2_crop *cr)
460{
461 struct g2d_ctx *ctx = prv;
462 struct g2d_frame *f;
463
464 f = get_frame(ctx, cr->type);
465 if (IS_ERR(f))
466 return PTR_ERR(f);
467
468 cr->c.left = f->o_height;
469 cr->c.top = f->o_width;
470 cr->c.width = f->c_width;
471 cr->c.height = f->c_height;
472 return 0;
473}
474
475static int vidioc_try_crop(struct file *file, void *prv, struct v4l2_crop *cr)
476{
477 struct g2d_ctx *ctx = prv;
478 struct g2d_dev *dev = ctx->dev;
479 struct g2d_frame *f;
480
481 f = get_frame(ctx, cr->type);
482 if (IS_ERR(f))
483 return PTR_ERR(f);
484
485 if (cr->c.top < 0 || cr->c.left < 0) {
486 v4l2_err(&dev->v4l2_dev,
487 "doesn't support negative values for top & left\n");
488 return -EINVAL;
489 }
490
491 return 0;
492}
493
494static int vidioc_s_crop(struct file *file, void *prv, struct v4l2_crop *cr)
495{
496 struct g2d_ctx *ctx = prv;
497 struct g2d_frame *f;
498 int ret;
499
500 ret = vidioc_try_crop(file, prv, cr);
501 if (ret)
502 return ret;
503 f = get_frame(ctx, cr->type);
504 if (IS_ERR(f))
505 return PTR_ERR(f);
506
507 f->c_width = cr->c.width;
508 f->c_height = cr->c.height;
509 f->o_width = cr->c.left;
510 f->o_height = cr->c.top;
511 f->bottom = f->o_height + f->c_height;
512 f->right = f->o_width + f->c_width;
513 return 0;
514}
515
516static void g2d_lock(void *prv)
517{
518 struct g2d_ctx *ctx = prv;
519 struct g2d_dev *dev = ctx->dev;
520 mutex_lock(&dev->mutex);
521}
522
523static void g2d_unlock(void *prv)
524{
525 struct g2d_ctx *ctx = prv;
526 struct g2d_dev *dev = ctx->dev;
527 mutex_unlock(&dev->mutex);
528}
529
530static void job_abort(void *prv)
531{
532 struct g2d_ctx *ctx = prv;
533 struct g2d_dev *dev = ctx->dev;
534 int ret;
535
536 if (dev->curr == 0) /* No job currently running */
537 return;
538
539 ret = wait_event_timeout(dev->irq_queue,
540 dev->curr == 0,
541 msecs_to_jiffies(G2D_TIMEOUT));
542}
543
544static void device_run(void *prv)
545{
546 struct g2d_ctx *ctx = prv;
547 struct g2d_dev *dev = ctx->dev;
548 struct vb2_buffer *src, *dst;
549 u32 cmd = 0;
550
551 dev->curr = ctx;
552
553 src = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
554 dst = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
555
556 clk_enable(dev->gate);
557 g2d_reset(dev);
558
559 g2d_set_src_size(dev, &ctx->in);
560 g2d_set_src_addr(dev, vb2_dma_contig_plane_dma_addr(src, 0));
561
562 g2d_set_dst_size(dev, &ctx->out);
563 g2d_set_dst_addr(dev, vb2_dma_contig_plane_dma_addr(dst, 0));
564
565 g2d_set_rop4(dev, ctx->rop);
566 if (ctx->in.c_width != ctx->out.c_width ||
567 ctx->in.c_height != ctx->out.c_height)
568 cmd |= g2d_cmd_stretch(1);
569 g2d_set_cmd(dev, cmd);
570 g2d_start(dev);
571}
572
573static irqreturn_t g2d_isr(int irq, void *prv)
574{
575 struct g2d_dev *dev = prv;
576 struct g2d_ctx *ctx = dev->curr;
577 struct vb2_buffer *src, *dst;
578
579 g2d_clear_int(dev);
580 clk_disable(dev->gate);
581
582 BUG_ON(ctx == 0);
583
584 src = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
585 dst = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
586
587 BUG_ON(src == 0);
588 BUG_ON(dst == 0);
589
590 v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE);
591 v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE);
592 v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
593
594 dev->curr = 0;
595 wake_up(&dev->irq_queue);
596 return IRQ_HANDLED;
597}
598
599static const struct v4l2_file_operations g2d_fops = {
600 .owner = THIS_MODULE,
601 .open = g2d_open,
602 .release = g2d_release,
603 .poll = g2d_poll,
604 .unlocked_ioctl = video_ioctl2,
605 .mmap = g2d_mmap,
606};
607
608static const struct v4l2_ioctl_ops g2d_ioctl_ops = {
609 .vidioc_querycap = vidioc_querycap,
610
611 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
612 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
613 .vidioc_try_fmt_vid_cap = vidioc_try_fmt,
614 .vidioc_s_fmt_vid_cap = vidioc_s_fmt,
615
616 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt,
617 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
618 .vidioc_try_fmt_vid_out = vidioc_try_fmt,
619 .vidioc_s_fmt_vid_out = vidioc_s_fmt,
620
621 .vidioc_reqbufs = vidioc_reqbufs,
622 .vidioc_querybuf = vidioc_querybuf,
623
624 .vidioc_qbuf = vidioc_qbuf,
625 .vidioc_dqbuf = vidioc_dqbuf,
626
627 .vidioc_streamon = vidioc_streamon,
628 .vidioc_streamoff = vidioc_streamoff,
629
630 .vidioc_g_crop = vidioc_g_crop,
631 .vidioc_s_crop = vidioc_s_crop,
632 .vidioc_cropcap = vidioc_cropcap,
633};
634
635static struct video_device g2d_videodev = {
636 .name = G2D_NAME,
637 .fops = &g2d_fops,
638 .ioctl_ops = &g2d_ioctl_ops,
639 .minor = -1,
640 .release = video_device_release,
641};
642
643static struct v4l2_m2m_ops g2d_m2m_ops = {
644 .device_run = device_run,
645 .job_abort = job_abort,
646 .lock = g2d_lock,
647 .unlock = g2d_unlock,
648};
649
650static int g2d_probe(struct platform_device *pdev)
651{
652 struct g2d_dev *dev;
653 struct video_device *vfd;
654 struct resource *res;
655 int ret = 0;
656
657 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
658 if (!dev)
659 return -ENOMEM;
660 spin_lock_init(&dev->irqlock);
661 mutex_init(&dev->mutex);
662 atomic_set(&dev->num_inst, 0);
663 init_waitqueue_head(&dev->irq_queue);
664
665 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
666 if (!res) {
667 dev_err(&pdev->dev, "failed to find registers\n");
668 ret = -ENOENT;
669 goto free_dev;
670 }
671
672 dev->res_regs = request_mem_region(res->start, resource_size(res),
673 dev_name(&pdev->dev));
674
675 if (!dev->res_regs) {
676 dev_err(&pdev->dev, "failed to obtain register region\n");
677 ret = -ENOENT;
678 goto free_dev;
679 }
680
681 dev->regs = ioremap(res->start, resource_size(res));
682 if (!dev->regs) {
683 dev_err(&pdev->dev, "failed to map registers\n");
684 ret = -ENOENT;
685 goto rel_res_regs;
686 }
687
688 dev->clk = clk_get(&pdev->dev, "sclk_fimg2d");
689 if (IS_ERR_OR_NULL(dev->clk)) {
690 dev_err(&pdev->dev, "failed to get g2d clock\n");
691 ret = -ENXIO;
692 goto unmap_regs;
693 }
694
695 dev->gate = clk_get(&pdev->dev, "fimg2d");
696 if (IS_ERR_OR_NULL(dev->gate)) {
697 dev_err(&pdev->dev, "failed to get g2d clock gate\n");
698 ret = -ENXIO;
699 goto put_clk;
700 }
701
702 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
703 if (!res) {
704 dev_err(&pdev->dev, "failed to find IRQ\n");
705 ret = -ENXIO;
706 goto put_clk_gate;
707 }
708
709 dev->irq = res->start;
710
711 ret = request_irq(dev->irq, g2d_isr, 0, pdev->name, dev);
712 if (ret) {
713 dev_err(&pdev->dev, "failed to install IRQ\n");
714 goto put_clk_gate;
715 }
716
717 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
718 if (IS_ERR(dev->alloc_ctx)) {
719 ret = PTR_ERR(dev->alloc_ctx);
720 goto rel_irq;
721 }
722
723 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
724 if (ret)
725 goto alloc_ctx_cleanup;
726 vfd = video_device_alloc();
727 if (!vfd) {
728 v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n");
729 ret = -ENOMEM;
730 goto unreg_v4l2_dev;
731 }
732 *vfd = g2d_videodev;
733 vfd->lock = &dev->mutex;
734 ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
735 if (ret) {
736 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
737 goto rel_vdev;
738 }
739 video_set_drvdata(vfd, dev);
740 snprintf(vfd->name, sizeof(vfd->name), "%s", g2d_videodev.name);
741 dev->vfd = vfd;
742 v4l2_info(&dev->v4l2_dev, "device registered as /dev/video%d\n",
743 vfd->num);
744 platform_set_drvdata(pdev, dev);
745 dev->m2m_dev = v4l2_m2m_init(&g2d_m2m_ops);
746 if (IS_ERR(dev->m2m_dev)) {
747 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
748 ret = PTR_ERR(dev->m2m_dev);
749 goto unreg_video_dev;
750 }
751
752 def_frame.stride = (def_frame.width * def_frame.fmt->depth) >> 3;
753
754 return 0;
755
756unreg_video_dev:
757 video_unregister_device(dev->vfd);
758rel_vdev:
759 video_device_release(vfd);
760unreg_v4l2_dev:
761 v4l2_device_unregister(&dev->v4l2_dev);
762alloc_ctx_cleanup:
763 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
764rel_irq:
765 free_irq(dev->irq, dev);
766put_clk_gate:
767 clk_put(dev->gate);
768put_clk:
769 clk_put(dev->clk);
770unmap_regs:
771 iounmap(dev->regs);
772rel_res_regs:
773 release_resource(dev->res_regs);
774free_dev:
775 kfree(dev);
776 return ret;
777}
778
779static int g2d_remove(struct platform_device *pdev)
780{
781 struct g2d_dev *dev = (struct g2d_dev *)platform_get_drvdata(pdev);
782
783 v4l2_info(&dev->v4l2_dev, "Removing " G2D_NAME);
784 v4l2_m2m_release(dev->m2m_dev);
785 video_unregister_device(dev->vfd);
786 v4l2_device_unregister(&dev->v4l2_dev);
787 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
788 free_irq(dev->irq, dev);
789 clk_put(dev->gate);
790 clk_put(dev->clk);
791 iounmap(dev->regs);
792 release_resource(dev->res_regs);
793 kfree(dev);
794 return 0;
795}
796
797static struct platform_driver g2d_pdrv = {
798 .probe = g2d_probe,
799 .remove = g2d_remove,
800 .driver = {
801 .name = G2D_NAME,
802 .owner = THIS_MODULE,
803 },
804};
805
806module_platform_driver(g2d_pdrv);
807
808MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>");
809MODULE_DESCRIPTION("S5P G2D 2d graphics accelerator driver");
810MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/s5p-g2d/g2d.h b/drivers/media/video/s5p-g2d/g2d.h
new file mode 100644
index 00000000000..5eae90107bf
--- /dev/null
+++ b/drivers/media/video/s5p-g2d/g2d.h
@@ -0,0 +1,83 @@
1/*
2 * Samsung S5P G2D - 2D Graphics Accelerator Driver
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * Kamil Debski, <k.debski@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version
11 */
12
13#include <media/v4l2-device.h>
14#include <media/v4l2-ctrls.h>
15
16#define G2D_NAME "s5p-g2d"
17
18struct g2d_dev {
19 struct v4l2_device v4l2_dev;
20 struct v4l2_m2m_dev *m2m_dev;
21 struct video_device *vfd;
22 struct mutex mutex;
23 spinlock_t irqlock;
24 atomic_t num_inst;
25 struct vb2_alloc_ctx *alloc_ctx;
26 struct resource *res_regs;
27 void __iomem *regs;
28 struct clk *clk;
29 struct clk *gate;
30 struct g2d_ctx *curr;
31 int irq;
32 wait_queue_head_t irq_queue;
33};
34
35struct g2d_frame {
36 /* Original dimensions */
37 u32 width;
38 u32 height;
39 /* Crop size */
40 u32 c_width;
41 u32 c_height;
42 /* Offset */
43 u32 o_width;
44 u32 o_height;
45 /* Image format */
46 struct g2d_fmt *fmt;
47 /* Variables that can calculated once and reused */
48 u32 stride;
49 u32 bottom;
50 u32 right;
51 u32 size;
52};
53
54struct g2d_ctx {
55 struct v4l2_fh fh;
56 struct g2d_dev *dev;
57 struct v4l2_m2m_ctx *m2m_ctx;
58 struct g2d_frame in;
59 struct g2d_frame out;
60 struct v4l2_ctrl_handler ctrl_handler;
61 u32 rop;
62};
63
64struct g2d_fmt {
65 char *name;
66 u32 fourcc;
67 int depth;
68 u32 hw;
69};
70
71
72void g2d_reset(struct g2d_dev *d);
73void g2d_set_src_size(struct g2d_dev *d, struct g2d_frame *f);
74void g2d_set_src_addr(struct g2d_dev *d, dma_addr_t a);
75void g2d_set_dst_size(struct g2d_dev *d, struct g2d_frame *f);
76void g2d_set_dst_addr(struct g2d_dev *d, dma_addr_t a);
77void g2d_start(struct g2d_dev *d);
78void g2d_clear_int(struct g2d_dev *d);
79void g2d_set_rop4(struct g2d_dev *d, u32 r);
80u32 g2d_cmd_stretch(u32 e);
81void g2d_set_cmd(struct g2d_dev *d, u32 c);
82
83
diff --git a/drivers/media/video/s5p-jpeg/Makefile b/drivers/media/video/s5p-jpeg/Makefile
new file mode 100644
index 00000000000..ddc2900d88a
--- /dev/null
+++ b/drivers/media/video/s5p-jpeg/Makefile
@@ -0,0 +1,2 @@
1s5p-jpeg-objs := jpeg-core.o
2obj-$(CONFIG_VIDEO_SAMSUNG_S5P_JPEG) := s5p-jpeg.o
diff --git a/drivers/media/video/s5p-jpeg/jpeg-core.c b/drivers/media/video/s5p-jpeg/jpeg-core.c
new file mode 100644
index 00000000000..f841a3e9845
--- /dev/null
+++ b/drivers/media/video/s5p-jpeg/jpeg-core.c
@@ -0,0 +1,1481 @@
1/* linux/drivers/media/video/s5p-jpeg/jpeg-core.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/clk.h>
14#include <linux/err.h>
15#include <linux/gfp.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/pm_runtime.h>
22#include <linux/slab.h>
23#include <linux/spinlock.h>
24#include <linux/string.h>
25#include <media/v4l2-mem2mem.h>
26#include <media/v4l2-ioctl.h>
27#include <media/videobuf2-core.h>
28#include <media/videobuf2-dma-contig.h>
29
30#include "jpeg-core.h"
31#include "jpeg-hw.h"
32
33static struct s5p_jpeg_fmt formats_enc[] = {
34 {
35 .name = "YUV 4:2:0 planar, YCbCr",
36 .fourcc = V4L2_PIX_FMT_YUV420,
37 .depth = 12,
38 .colplanes = 3,
39 .types = MEM2MEM_CAPTURE,
40 },
41 {
42 .name = "YUV 4:2:2 packed, YCbYCr",
43 .fourcc = V4L2_PIX_FMT_YUYV,
44 .depth = 16,
45 .colplanes = 1,
46 .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT,
47 },
48 {
49 .name = "RGB565",
50 .fourcc = V4L2_PIX_FMT_RGB565,
51 .depth = 16,
52 .colplanes = 1,
53 .types = MEM2MEM_OUTPUT,
54 },
55};
56#define NUM_FORMATS_ENC ARRAY_SIZE(formats_enc)
57
58static struct s5p_jpeg_fmt formats_dec[] = {
59 {
60 .name = "YUV 4:2:0 planar, YCbCr",
61 .fourcc = V4L2_PIX_FMT_YUV420,
62 .depth = 12,
63 .colplanes = 3,
64 .h_align = 4,
65 .v_align = 4,
66 .types = MEM2MEM_CAPTURE,
67 },
68 {
69 .name = "YUV 4:2:2 packed, YCbYCr",
70 .fourcc = V4L2_PIX_FMT_YUYV,
71 .depth = 16,
72 .colplanes = 1,
73 .h_align = 4,
74 .v_align = 3,
75 .types = MEM2MEM_CAPTURE,
76 },
77 {
78 .name = "JPEG JFIF",
79 .fourcc = V4L2_PIX_FMT_JPEG,
80 .colplanes = 1,
81 .types = MEM2MEM_OUTPUT,
82 },
83};
84#define NUM_FORMATS_DEC ARRAY_SIZE(formats_dec)
85
86static const unsigned char qtbl_luminance[4][64] = {
87 {/* level 1 - high quality */
88 8, 6, 6, 8, 12, 14, 16, 17,
89 6, 6, 6, 8, 10, 13, 12, 15,
90 6, 6, 7, 8, 13, 14, 18, 24,
91 8, 8, 8, 14, 13, 19, 24, 35,
92 12, 10, 13, 13, 20, 26, 34, 39,
93 14, 13, 14, 19, 26, 34, 39, 39,
94 16, 12, 18, 24, 34, 39, 39, 39,
95 17, 15, 24, 35, 39, 39, 39, 39
96 },
97 {/* level 2 */
98 12, 8, 8, 12, 17, 21, 24, 23,
99 8, 9, 9, 11, 15, 19, 18, 23,
100 8, 9, 10, 12, 19, 20, 27, 36,
101 12, 11, 12, 21, 20, 28, 36, 53,
102 17, 15, 19, 20, 30, 39, 51, 59,
103 21, 19, 20, 28, 39, 51, 59, 59,
104 24, 18, 27, 36, 51, 59, 59, 59,
105 23, 23, 36, 53, 59, 59, 59, 59
106 },
107 {/* level 3 */
108 16, 11, 11, 16, 23, 27, 31, 30,
109 11, 12, 12, 15, 20, 23, 23, 30,
110 11, 12, 13, 16, 23, 26, 35, 47,
111 16, 15, 16, 23, 26, 37, 47, 64,
112 23, 20, 23, 26, 39, 51, 64, 64,
113 27, 23, 26, 37, 51, 64, 64, 64,
114 31, 23, 35, 47, 64, 64, 64, 64,
115 30, 30, 47, 64, 64, 64, 64, 64
116 },
117 {/*level 4 - low quality */
118 20, 16, 25, 39, 50, 46, 62, 68,
119 16, 18, 23, 38, 38, 53, 65, 68,
120 25, 23, 31, 38, 53, 65, 68, 68,
121 39, 38, 38, 53, 65, 68, 68, 68,
122 50, 38, 53, 65, 68, 68, 68, 68,
123 46, 53, 65, 68, 68, 68, 68, 68,
124 62, 65, 68, 68, 68, 68, 68, 68,
125 68, 68, 68, 68, 68, 68, 68, 68
126 }
127};
128
129static const unsigned char qtbl_chrominance[4][64] = {
130 {/* level 1 - high quality */
131 9, 8, 9, 11, 14, 17, 19, 24,
132 8, 10, 9, 11, 14, 13, 17, 22,
133 9, 9, 13, 14, 13, 15, 23, 26,
134 11, 11, 14, 14, 15, 20, 26, 33,
135 14, 14, 13, 15, 20, 24, 33, 39,
136 17, 13, 15, 20, 24, 32, 39, 39,
137 19, 17, 23, 26, 33, 39, 39, 39,
138 24, 22, 26, 33, 39, 39, 39, 39
139 },
140 {/* level 2 */
141 13, 11, 13, 16, 20, 20, 29, 37,
142 11, 14, 14, 14, 16, 20, 26, 32,
143 13, 14, 15, 17, 20, 23, 35, 40,
144 16, 14, 17, 21, 23, 30, 40, 50,
145 20, 16, 20, 23, 30, 37, 50, 59,
146 20, 20, 23, 30, 37, 48, 59, 59,
147 29, 26, 35, 40, 50, 59, 59, 59,
148 37, 32, 40, 50, 59, 59, 59, 59
149 },
150 {/* level 3 */
151 17, 15, 17, 21, 20, 26, 38, 48,
152 15, 19, 18, 17, 20, 26, 35, 43,
153 17, 18, 20, 22, 26, 30, 46, 53,
154 21, 17, 22, 28, 30, 39, 53, 64,
155 20, 20, 26, 30, 39, 48, 64, 64,
156 26, 26, 30, 39, 48, 63, 64, 64,
157 38, 35, 46, 53, 64, 64, 64, 64,
158 48, 43, 53, 64, 64, 64, 64, 64
159 },
160 {/*level 4 - low quality */
161 21, 25, 32, 38, 54, 68, 68, 68,
162 25, 28, 24, 38, 54, 68, 68, 68,
163 32, 24, 32, 43, 66, 68, 68, 68,
164 38, 38, 43, 53, 68, 68, 68, 68,
165 54, 54, 66, 68, 68, 68, 68, 68,
166 68, 68, 68, 68, 68, 68, 68, 68,
167 68, 68, 68, 68, 68, 68, 68, 68,
168 68, 68, 68, 68, 68, 68, 68, 68
169 }
170};
171
172static const unsigned char hdctbl0[16] = {
173 0, 1, 5, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0
174};
175
176static const unsigned char hdctblg0[12] = {
177 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0xa, 0xb
178};
179static const unsigned char hactbl0[16] = {
180 0, 2, 1, 3, 3, 2, 4, 3, 5, 5, 4, 4, 0, 0, 1, 0x7d
181};
182static const unsigned char hactblg0[162] = {
183 0x01, 0x02, 0x03, 0x00, 0x04, 0x11, 0x05, 0x12,
184 0x21, 0x31, 0x41, 0x06, 0x13, 0x51, 0x61, 0x07,
185 0x22, 0x71, 0x14, 0x32, 0x81, 0x91, 0xa1, 0x08,
186 0x23, 0x42, 0xb1, 0xc1, 0x15, 0x52, 0xd1, 0xf0,
187 0x24, 0x33, 0x62, 0x72, 0x82, 0x09, 0x0a, 0x16,
188 0x17, 0x18, 0x19, 0x1a, 0x25, 0x26, 0x27, 0x28,
189 0x29, 0x2a, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
190 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
191 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,
192 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69,
193 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79,
194 0x7a, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89,
195 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98,
196 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
197 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6,
198 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, 0xc5,
199 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, 0xd3, 0xd4,
200 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xe1, 0xe2,
201 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea,
202 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8,
203 0xf9, 0xfa
204};
205
206static inline void jpeg_set_qtbl(void __iomem *regs, const unsigned char *qtbl,
207 unsigned long tab, int len)
208{
209 int i;
210
211 for (i = 0; i < len; i++)
212 writel((unsigned int)qtbl[i], regs + tab + (i * 0x04));
213}
214
215static inline void jpeg_set_qtbl_lum(void __iomem *regs, int quality)
216{
217 /* this driver fills quantisation table 0 with data for luma */
218 jpeg_set_qtbl(regs, qtbl_luminance[quality], S5P_JPG_QTBL_CONTENT(0),
219 ARRAY_SIZE(qtbl_luminance[quality]));
220}
221
222static inline void jpeg_set_qtbl_chr(void __iomem *regs, int quality)
223{
224 /* this driver fills quantisation table 1 with data for chroma */
225 jpeg_set_qtbl(regs, qtbl_chrominance[quality], S5P_JPG_QTBL_CONTENT(1),
226 ARRAY_SIZE(qtbl_chrominance[quality]));
227}
228
229static inline void jpeg_set_htbl(void __iomem *regs, const unsigned char *htbl,
230 unsigned long tab, int len)
231{
232 int i;
233
234 for (i = 0; i < len; i++)
235 writel((unsigned int)htbl[i], regs + tab + (i * 0x04));
236}
237
238static inline void jpeg_set_hdctbl(void __iomem *regs)
239{
240 /* this driver fills table 0 for this component */
241 jpeg_set_htbl(regs, hdctbl0, S5P_JPG_HDCTBL(0), ARRAY_SIZE(hdctbl0));
242}
243
244static inline void jpeg_set_hdctblg(void __iomem *regs)
245{
246 /* this driver fills table 0 for this component */
247 jpeg_set_htbl(regs, hdctblg0, S5P_JPG_HDCTBLG(0), ARRAY_SIZE(hdctblg0));
248}
249
250static inline void jpeg_set_hactbl(void __iomem *regs)
251{
252 /* this driver fills table 0 for this component */
253 jpeg_set_htbl(regs, hactbl0, S5P_JPG_HACTBL(0), ARRAY_SIZE(hactbl0));
254}
255
256static inline void jpeg_set_hactblg(void __iomem *regs)
257{
258 /* this driver fills table 0 for this component */
259 jpeg_set_htbl(regs, hactblg0, S5P_JPG_HACTBLG(0), ARRAY_SIZE(hactblg0));
260}
261
262/*
263 * ============================================================================
264 * Device file operations
265 * ============================================================================
266 */
267
268static int queue_init(void *priv, struct vb2_queue *src_vq,
269 struct vb2_queue *dst_vq);
270static struct s5p_jpeg_fmt *s5p_jpeg_find_format(unsigned int mode,
271 __u32 pixelformat);
272
273static int s5p_jpeg_open(struct file *file)
274{
275 struct s5p_jpeg *jpeg = video_drvdata(file);
276 struct video_device *vfd = video_devdata(file);
277 struct s5p_jpeg_ctx *ctx;
278 struct s5p_jpeg_fmt *out_fmt;
279
280 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
281 if (!ctx)
282 return -ENOMEM;
283
284 file->private_data = ctx;
285 ctx->jpeg = jpeg;
286 if (vfd == jpeg->vfd_encoder) {
287 ctx->mode = S5P_JPEG_ENCODE;
288 out_fmt = s5p_jpeg_find_format(ctx->mode, V4L2_PIX_FMT_RGB565);
289 } else {
290 ctx->mode = S5P_JPEG_DECODE;
291 out_fmt = s5p_jpeg_find_format(ctx->mode, V4L2_PIX_FMT_JPEG);
292 }
293
294 ctx->m2m_ctx = v4l2_m2m_ctx_init(jpeg->m2m_dev, ctx, queue_init);
295 if (IS_ERR(ctx->m2m_ctx)) {
296 int err = PTR_ERR(ctx->m2m_ctx);
297 kfree(ctx);
298 return err;
299 }
300
301 ctx->out_q.fmt = out_fmt;
302 ctx->cap_q.fmt = s5p_jpeg_find_format(ctx->mode, V4L2_PIX_FMT_YUYV);
303
304 return 0;
305}
306
307static int s5p_jpeg_release(struct file *file)
308{
309 struct s5p_jpeg_ctx *ctx = file->private_data;
310
311 v4l2_m2m_ctx_release(ctx->m2m_ctx);
312 kfree(ctx);
313
314 return 0;
315}
316
317static unsigned int s5p_jpeg_poll(struct file *file,
318 struct poll_table_struct *wait)
319{
320 struct s5p_jpeg_ctx *ctx = file->private_data;
321
322 return v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
323}
324
325static int s5p_jpeg_mmap(struct file *file, struct vm_area_struct *vma)
326{
327 struct s5p_jpeg_ctx *ctx = file->private_data;
328
329 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
330}
331
332static const struct v4l2_file_operations s5p_jpeg_fops = {
333 .owner = THIS_MODULE,
334 .open = s5p_jpeg_open,
335 .release = s5p_jpeg_release,
336 .poll = s5p_jpeg_poll,
337 .unlocked_ioctl = video_ioctl2,
338 .mmap = s5p_jpeg_mmap,
339};
340
341/*
342 * ============================================================================
343 * video ioctl operations
344 * ============================================================================
345 */
346
347static int get_byte(struct s5p_jpeg_buffer *buf)
348{
349 if (buf->curr >= buf->size)
350 return -1;
351
352 return ((unsigned char *)buf->data)[buf->curr++];
353}
354
355static int get_word_be(struct s5p_jpeg_buffer *buf, unsigned int *word)
356{
357 unsigned int temp;
358 int byte;
359
360 byte = get_byte(buf);
361 if (byte == -1)
362 return -1;
363 temp = byte << 8;
364 byte = get_byte(buf);
365 if (byte == -1)
366 return -1;
367 *word = (unsigned int)byte | temp;
368 return 0;
369}
370
371static void skip(struct s5p_jpeg_buffer *buf, long len)
372{
373 if (len <= 0)
374 return;
375
376 while (len--)
377 get_byte(buf);
378}
379
380static bool s5p_jpeg_parse_hdr(struct s5p_jpeg_q_data *result,
381 unsigned long buffer, unsigned long size)
382{
383 int c, components, notfound;
384 unsigned int height, width, word;
385 long length;
386 struct s5p_jpeg_buffer jpeg_buffer;
387
388 jpeg_buffer.size = size;
389 jpeg_buffer.data = buffer;
390 jpeg_buffer.curr = 0;
391
392 notfound = 1;
393 while (notfound) {
394 c = get_byte(&jpeg_buffer);
395 if (c == -1)
396 break;
397 if (c != 0xff)
398 continue;
399 do
400 c = get_byte(&jpeg_buffer);
401 while (c == 0xff);
402 if (c == -1)
403 break;
404 if (c == 0)
405 continue;
406 length = 0;
407 switch (c) {
408 /* SOF0: baseline JPEG */
409 case SOF0:
410 if (get_word_be(&jpeg_buffer, &word))
411 break;
412 if (get_byte(&jpeg_buffer) == -1)
413 break;
414 if (get_word_be(&jpeg_buffer, &height))
415 break;
416 if (get_word_be(&jpeg_buffer, &width))
417 break;
418 components = get_byte(&jpeg_buffer);
419 if (components == -1)
420 break;
421 notfound = 0;
422
423 skip(&jpeg_buffer, components * 3);
424 break;
425
426 /* skip payload-less markers */
427 case RST ... RST + 7:
428 case SOI:
429 case EOI:
430 case TEM:
431 break;
432
433 /* skip uninteresting payload markers */
434 default:
435 if (get_word_be(&jpeg_buffer, &word))
436 break;
437 length = (long)word - 2;
438 skip(&jpeg_buffer, length);
439 break;
440 }
441 }
442 result->w = width;
443 result->h = height;
444 result->size = components;
445 return !notfound;
446}
447
448static int s5p_jpeg_querycap(struct file *file, void *priv,
449 struct v4l2_capability *cap)
450{
451 struct s5p_jpeg_ctx *ctx = priv;
452
453 if (ctx->mode == S5P_JPEG_ENCODE) {
454 strlcpy(cap->driver, S5P_JPEG_M2M_NAME " encoder",
455 sizeof(cap->driver));
456 strlcpy(cap->card, S5P_JPEG_M2M_NAME " encoder",
457 sizeof(cap->card));
458 } else {
459 strlcpy(cap->driver, S5P_JPEG_M2M_NAME " decoder",
460 sizeof(cap->driver));
461 strlcpy(cap->card, S5P_JPEG_M2M_NAME " decoder",
462 sizeof(cap->card));
463 }
464 cap->bus_info[0] = 0;
465 cap->capabilities = V4L2_CAP_STREAMING |
466 V4L2_CAP_VIDEO_CAPTURE |
467 V4L2_CAP_VIDEO_OUTPUT;
468 return 0;
469}
470
471static int enum_fmt(struct s5p_jpeg_fmt *formats, int n,
472 struct v4l2_fmtdesc *f, u32 type)
473{
474 int i, num = 0;
475
476 for (i = 0; i < n; ++i) {
477 if (formats[i].types & type) {
478 /* index-th format of type type found ? */
479 if (num == f->index)
480 break;
481 /* Correct type but haven't reached our index yet,
482 * just increment per-type index */
483 ++num;
484 }
485 }
486
487 /* Format not found */
488 if (i >= n)
489 return -EINVAL;
490
491 strlcpy(f->description, formats[i].name, sizeof(f->description));
492 f->pixelformat = formats[i].fourcc;
493
494 return 0;
495}
496
497static int s5p_jpeg_enum_fmt_vid_cap(struct file *file, void *priv,
498 struct v4l2_fmtdesc *f)
499{
500 struct s5p_jpeg_ctx *ctx;
501
502 ctx = priv;
503
504 if (ctx->mode == S5P_JPEG_ENCODE)
505 return enum_fmt(formats_enc, NUM_FORMATS_ENC, f,
506 MEM2MEM_CAPTURE);
507
508 return enum_fmt(formats_dec, NUM_FORMATS_DEC, f, MEM2MEM_CAPTURE);
509}
510
511static int s5p_jpeg_enum_fmt_vid_out(struct file *file, void *priv,
512 struct v4l2_fmtdesc *f)
513{
514 struct s5p_jpeg_ctx *ctx;
515
516 ctx = priv;
517
518 if (ctx->mode == S5P_JPEG_ENCODE)
519 return enum_fmt(formats_enc, NUM_FORMATS_ENC, f,
520 MEM2MEM_OUTPUT);
521
522 return enum_fmt(formats_dec, NUM_FORMATS_DEC, f, MEM2MEM_OUTPUT);
523}
524
525static struct s5p_jpeg_q_data *get_q_data(struct s5p_jpeg_ctx *ctx,
526 enum v4l2_buf_type type)
527{
528 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
529 return &ctx->out_q;
530 if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
531 return &ctx->cap_q;
532
533 return NULL;
534}
535
536static int s5p_jpeg_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
537{
538 struct vb2_queue *vq;
539 struct s5p_jpeg_q_data *q_data = NULL;
540 struct v4l2_pix_format *pix = &f->fmt.pix;
541 struct s5p_jpeg_ctx *ct = priv;
542
543 vq = v4l2_m2m_get_vq(ct->m2m_ctx, f->type);
544 if (!vq)
545 return -EINVAL;
546
547 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
548 ct->mode == S5P_JPEG_DECODE && !ct->hdr_parsed)
549 return -EINVAL;
550 q_data = get_q_data(ct, f->type);
551 BUG_ON(q_data == NULL);
552
553 pix->width = q_data->w;
554 pix->height = q_data->h;
555 pix->field = V4L2_FIELD_NONE;
556 pix->pixelformat = q_data->fmt->fourcc;
557 pix->bytesperline = 0;
558 if (q_data->fmt->fourcc != V4L2_PIX_FMT_JPEG) {
559 u32 bpl = q_data->w;
560 if (q_data->fmt->colplanes == 1)
561 bpl = (bpl * q_data->fmt->depth) >> 3;
562 pix->bytesperline = bpl;
563 }
564 pix->sizeimage = q_data->size;
565
566 return 0;
567}
568
569static struct s5p_jpeg_fmt *s5p_jpeg_find_format(unsigned int mode,
570 u32 pixelformat)
571{
572 unsigned int k;
573 struct s5p_jpeg_fmt *formats;
574 int n;
575
576 if (mode == S5P_JPEG_ENCODE) {
577 formats = formats_enc;
578 n = NUM_FORMATS_ENC;
579 } else {
580 formats = formats_dec;
581 n = NUM_FORMATS_DEC;
582 }
583
584 for (k = 0; k < n; k++) {
585 struct s5p_jpeg_fmt *fmt = &formats[k];
586 if (fmt->fourcc == pixelformat)
587 return fmt;
588 }
589
590 return NULL;
591
592}
593
594static void jpeg_bound_align_image(u32 *w, unsigned int wmin, unsigned int wmax,
595 unsigned int walign,
596 u32 *h, unsigned int hmin, unsigned int hmax,
597 unsigned int halign)
598{
599 int width, height, w_step, h_step;
600
601 width = *w;
602 height = *h;
603
604 w_step = 1 << walign;
605 h_step = 1 << halign;
606 v4l_bound_align_image(w, wmin, wmax, walign, h, hmin, hmax, halign, 0);
607
608 if (*w < width && (*w + w_step) < wmax)
609 *w += w_step;
610 if (*h < height && (*h + h_step) < hmax)
611 *h += h_step;
612
613}
614
615static int vidioc_try_fmt(struct v4l2_format *f, struct s5p_jpeg_fmt *fmt,
616 struct s5p_jpeg_ctx *ctx, int q_type)
617{
618 struct v4l2_pix_format *pix = &f->fmt.pix;
619
620 if (pix->field == V4L2_FIELD_ANY)
621 pix->field = V4L2_FIELD_NONE;
622 else if (pix->field != V4L2_FIELD_NONE)
623 return -EINVAL;
624
625 /* V4L2 specification suggests the driver corrects the format struct
626 * if any of the dimensions is unsupported */
627 if (q_type == MEM2MEM_OUTPUT)
628 jpeg_bound_align_image(&pix->width, S5P_JPEG_MIN_WIDTH,
629 S5P_JPEG_MAX_WIDTH, 0,
630 &pix->height, S5P_JPEG_MIN_HEIGHT,
631 S5P_JPEG_MAX_HEIGHT, 0);
632 else
633 jpeg_bound_align_image(&pix->width, S5P_JPEG_MIN_WIDTH,
634 S5P_JPEG_MAX_WIDTH, fmt->h_align,
635 &pix->height, S5P_JPEG_MIN_HEIGHT,
636 S5P_JPEG_MAX_HEIGHT, fmt->v_align);
637
638 if (fmt->fourcc == V4L2_PIX_FMT_JPEG) {
639 if (pix->sizeimage <= 0)
640 pix->sizeimage = PAGE_SIZE;
641 pix->bytesperline = 0;
642 } else {
643 u32 bpl = pix->bytesperline;
644
645 if (fmt->colplanes > 1 && bpl < pix->width)
646 bpl = pix->width; /* planar */
647
648 if (fmt->colplanes == 1 && /* packed */
649 (bpl << 3) * fmt->depth < pix->width)
650 bpl = (pix->width * fmt->depth) >> 3;
651
652 pix->bytesperline = bpl;
653 pix->sizeimage = (pix->width * pix->height * fmt->depth) >> 3;
654 }
655
656 return 0;
657}
658
659static int s5p_jpeg_try_fmt_vid_cap(struct file *file, void *priv,
660 struct v4l2_format *f)
661{
662 struct s5p_jpeg_fmt *fmt;
663 struct s5p_jpeg_ctx *ctx = priv;
664
665 fmt = s5p_jpeg_find_format(ctx->mode, f->fmt.pix.pixelformat);
666 if (!fmt || !(fmt->types & MEM2MEM_CAPTURE)) {
667 v4l2_err(&ctx->jpeg->v4l2_dev,
668 "Fourcc format (0x%08x) invalid.\n",
669 f->fmt.pix.pixelformat);
670 return -EINVAL;
671 }
672
673 return vidioc_try_fmt(f, fmt, ctx, MEM2MEM_CAPTURE);
674}
675
676static int s5p_jpeg_try_fmt_vid_out(struct file *file, void *priv,
677 struct v4l2_format *f)
678{
679 struct s5p_jpeg_fmt *fmt;
680 struct s5p_jpeg_ctx *ctx = priv;
681
682 fmt = s5p_jpeg_find_format(ctx->mode, f->fmt.pix.pixelformat);
683 if (!fmt || !(fmt->types & MEM2MEM_OUTPUT)) {
684 v4l2_err(&ctx->jpeg->v4l2_dev,
685 "Fourcc format (0x%08x) invalid.\n",
686 f->fmt.pix.pixelformat);
687 return -EINVAL;
688 }
689
690 return vidioc_try_fmt(f, fmt, ctx, MEM2MEM_OUTPUT);
691}
692
693static int s5p_jpeg_s_fmt(struct s5p_jpeg_ctx *ct, struct v4l2_format *f)
694{
695 struct vb2_queue *vq;
696 struct s5p_jpeg_q_data *q_data = NULL;
697 struct v4l2_pix_format *pix = &f->fmt.pix;
698
699 vq = v4l2_m2m_get_vq(ct->m2m_ctx, f->type);
700 if (!vq)
701 return -EINVAL;
702
703 q_data = get_q_data(ct, f->type);
704 BUG_ON(q_data == NULL);
705
706 if (vb2_is_busy(vq)) {
707 v4l2_err(&ct->jpeg->v4l2_dev, "%s queue busy\n", __func__);
708 return -EBUSY;
709 }
710
711 q_data->fmt = s5p_jpeg_find_format(ct->mode, pix->pixelformat);
712 q_data->w = pix->width;
713 q_data->h = pix->height;
714 if (q_data->fmt->fourcc != V4L2_PIX_FMT_JPEG)
715 q_data->size = q_data->w * q_data->h * q_data->fmt->depth >> 3;
716 else
717 q_data->size = pix->sizeimage;
718
719 return 0;
720}
721
722static int s5p_jpeg_s_fmt_vid_cap(struct file *file, void *priv,
723 struct v4l2_format *f)
724{
725 int ret;
726
727 ret = s5p_jpeg_try_fmt_vid_cap(file, priv, f);
728 if (ret)
729 return ret;
730
731 return s5p_jpeg_s_fmt(priv, f);
732}
733
734static int s5p_jpeg_s_fmt_vid_out(struct file *file, void *priv,
735 struct v4l2_format *f)
736{
737 int ret;
738
739 ret = s5p_jpeg_try_fmt_vid_out(file, priv, f);
740 if (ret)
741 return ret;
742
743 return s5p_jpeg_s_fmt(priv, f);
744}
745
746static int s5p_jpeg_reqbufs(struct file *file, void *priv,
747 struct v4l2_requestbuffers *reqbufs)
748{
749 struct s5p_jpeg_ctx *ctx = priv;
750
751 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
752}
753
754static int s5p_jpeg_querybuf(struct file *file, void *priv,
755 struct v4l2_buffer *buf)
756{
757 struct s5p_jpeg_ctx *ctx = priv;
758
759 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
760}
761
762static int s5p_jpeg_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
763{
764 struct s5p_jpeg_ctx *ctx = priv;
765
766 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
767}
768
769static int s5p_jpeg_dqbuf(struct file *file, void *priv,
770 struct v4l2_buffer *buf)
771{
772 struct s5p_jpeg_ctx *ctx = priv;
773
774 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
775}
776
777static int s5p_jpeg_streamon(struct file *file, void *priv,
778 enum v4l2_buf_type type)
779{
780 struct s5p_jpeg_ctx *ctx = priv;
781
782 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
783}
784
785static int s5p_jpeg_streamoff(struct file *file, void *priv,
786 enum v4l2_buf_type type)
787{
788 struct s5p_jpeg_ctx *ctx = priv;
789
790 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
791}
792
793int s5p_jpeg_g_selection(struct file *file, void *priv,
794 struct v4l2_selection *s)
795{
796 struct s5p_jpeg_ctx *ctx = priv;
797
798 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT &&
799 s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
800 return -EINVAL;
801
802 /* For JPEG blob active == default == bounds */
803 switch (s->target) {
804 case V4L2_SEL_TGT_CROP_ACTIVE:
805 case V4L2_SEL_TGT_CROP_BOUNDS:
806 case V4L2_SEL_TGT_CROP_DEFAULT:
807 case V4L2_SEL_TGT_COMPOSE_ACTIVE:
808 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
809 s->r.width = ctx->out_q.w;
810 s->r.height = ctx->out_q.h;
811 break;
812 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
813 case V4L2_SEL_TGT_COMPOSE_PADDED:
814 s->r.width = ctx->cap_q.w;
815 s->r.height = ctx->cap_q.h;
816 break;
817 default:
818 return -EINVAL;
819 }
820 s->r.left = 0;
821 s->r.top = 0;
822 return 0;
823}
824
825static int s5p_jpeg_g_jpegcomp(struct file *file, void *priv,
826 struct v4l2_jpegcompression *compr)
827{
828 struct s5p_jpeg_ctx *ctx = priv;
829
830 if (ctx->mode == S5P_JPEG_DECODE)
831 return -ENOTTY;
832
833 memset(compr, 0, sizeof(*compr));
834 compr->quality = ctx->compr_quality;
835
836 return 0;
837}
838
839static int s5p_jpeg_s_jpegcomp(struct file *file, void *priv,
840 struct v4l2_jpegcompression *compr)
841{
842 struct s5p_jpeg_ctx *ctx = priv;
843
844 if (ctx->mode == S5P_JPEG_DECODE)
845 return -ENOTTY;
846
847 compr->quality = clamp(compr->quality, S5P_JPEG_COMPR_QUAL_BEST,
848 S5P_JPEG_COMPR_QUAL_WORST);
849
850 ctx->compr_quality = S5P_JPEG_COMPR_QUAL_WORST - compr->quality;
851
852 return 0;
853}
854
855static const struct v4l2_ioctl_ops s5p_jpeg_ioctl_ops = {
856 .vidioc_querycap = s5p_jpeg_querycap,
857
858 .vidioc_enum_fmt_vid_cap = s5p_jpeg_enum_fmt_vid_cap,
859 .vidioc_enum_fmt_vid_out = s5p_jpeg_enum_fmt_vid_out,
860
861 .vidioc_g_fmt_vid_cap = s5p_jpeg_g_fmt,
862 .vidioc_g_fmt_vid_out = s5p_jpeg_g_fmt,
863
864 .vidioc_try_fmt_vid_cap = s5p_jpeg_try_fmt_vid_cap,
865 .vidioc_try_fmt_vid_out = s5p_jpeg_try_fmt_vid_out,
866
867 .vidioc_s_fmt_vid_cap = s5p_jpeg_s_fmt_vid_cap,
868 .vidioc_s_fmt_vid_out = s5p_jpeg_s_fmt_vid_out,
869
870 .vidioc_reqbufs = s5p_jpeg_reqbufs,
871 .vidioc_querybuf = s5p_jpeg_querybuf,
872
873 .vidioc_qbuf = s5p_jpeg_qbuf,
874 .vidioc_dqbuf = s5p_jpeg_dqbuf,
875
876 .vidioc_streamon = s5p_jpeg_streamon,
877 .vidioc_streamoff = s5p_jpeg_streamoff,
878
879 .vidioc_g_selection = s5p_jpeg_g_selection,
880
881 .vidioc_g_jpegcomp = s5p_jpeg_g_jpegcomp,
882 .vidioc_s_jpegcomp = s5p_jpeg_s_jpegcomp,
883};
884
885/*
886 * ============================================================================
887 * mem2mem callbacks
888 * ============================================================================
889 */
890
891static void s5p_jpeg_device_run(void *priv)
892{
893 struct s5p_jpeg_ctx *ctx = priv;
894 struct s5p_jpeg *jpeg = ctx->jpeg;
895 struct vb2_buffer *src_buf, *dst_buf;
896 unsigned long src_addr, dst_addr;
897
898 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
899 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
900 src_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0);
901 dst_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
902
903 jpeg_reset(jpeg->regs);
904 jpeg_poweron(jpeg->regs);
905 jpeg_proc_mode(jpeg->regs, ctx->mode);
906 if (ctx->mode == S5P_JPEG_ENCODE) {
907 if (ctx->out_q.fmt->fourcc == V4L2_PIX_FMT_RGB565)
908 jpeg_input_raw_mode(jpeg->regs, S5P_JPEG_RAW_IN_565);
909 else
910 jpeg_input_raw_mode(jpeg->regs, S5P_JPEG_RAW_IN_422);
911 if (ctx->cap_q.fmt->fourcc == V4L2_PIX_FMT_YUYV)
912 jpeg_subsampling_mode(jpeg->regs,
913 S5P_JPEG_SUBSAMPLING_422);
914 else
915 jpeg_subsampling_mode(jpeg->regs,
916 S5P_JPEG_SUBSAMPLING_420);
917 jpeg_dri(jpeg->regs, 0);
918 jpeg_x(jpeg->regs, ctx->out_q.w);
919 jpeg_y(jpeg->regs, ctx->out_q.h);
920 jpeg_imgadr(jpeg->regs, src_addr);
921 jpeg_jpgadr(jpeg->regs, dst_addr);
922
923 /* ultimately comes from sizeimage from userspace */
924 jpeg_enc_stream_int(jpeg->regs, ctx->cap_q.size);
925
926 /* JPEG RGB to YCbCr conversion matrix */
927 jpeg_coef(jpeg->regs, 1, 1, S5P_JPEG_COEF11);
928 jpeg_coef(jpeg->regs, 1, 2, S5P_JPEG_COEF12);
929 jpeg_coef(jpeg->regs, 1, 3, S5P_JPEG_COEF13);
930 jpeg_coef(jpeg->regs, 2, 1, S5P_JPEG_COEF21);
931 jpeg_coef(jpeg->regs, 2, 2, S5P_JPEG_COEF22);
932 jpeg_coef(jpeg->regs, 2, 3, S5P_JPEG_COEF23);
933 jpeg_coef(jpeg->regs, 3, 1, S5P_JPEG_COEF31);
934 jpeg_coef(jpeg->regs, 3, 2, S5P_JPEG_COEF32);
935 jpeg_coef(jpeg->regs, 3, 3, S5P_JPEG_COEF33);
936
937 /*
938 * JPEG IP allows storing 4 quantization tables
939 * We fill table 0 for luma and table 1 for chroma
940 */
941 jpeg_set_qtbl_lum(jpeg->regs, ctx->compr_quality);
942 jpeg_set_qtbl_chr(jpeg->regs, ctx->compr_quality);
943 /* use table 0 for Y */
944 jpeg_qtbl(jpeg->regs, 1, 0);
945 /* use table 1 for Cb and Cr*/
946 jpeg_qtbl(jpeg->regs, 2, 1);
947 jpeg_qtbl(jpeg->regs, 3, 1);
948
949 /* Y, Cb, Cr use Huffman table 0 */
950 jpeg_htbl_ac(jpeg->regs, 1);
951 jpeg_htbl_dc(jpeg->regs, 1);
952 jpeg_htbl_ac(jpeg->regs, 2);
953 jpeg_htbl_dc(jpeg->regs, 2);
954 jpeg_htbl_ac(jpeg->regs, 3);
955 jpeg_htbl_dc(jpeg->regs, 3);
956 } else {
957 jpeg_rst_int_enable(jpeg->regs, true);
958 jpeg_data_num_int_enable(jpeg->regs, true);
959 jpeg_final_mcu_num_int_enable(jpeg->regs, true);
960 jpeg_outform_raw(jpeg->regs, S5P_JPEG_RAW_OUT_422);
961 jpeg_jpgadr(jpeg->regs, src_addr);
962 jpeg_imgadr(jpeg->regs, dst_addr);
963 }
964 jpeg_start(jpeg->regs);
965}
966
967static int s5p_jpeg_job_ready(void *priv)
968{
969 struct s5p_jpeg_ctx *ctx = priv;
970
971 if (ctx->mode == S5P_JPEG_DECODE)
972 return ctx->hdr_parsed;
973 return 1;
974}
975
976static void s5p_jpeg_job_abort(void *priv)
977{
978}
979
980static struct v4l2_m2m_ops s5p_jpeg_m2m_ops = {
981 .device_run = s5p_jpeg_device_run,
982 .job_ready = s5p_jpeg_job_ready,
983 .job_abort = s5p_jpeg_job_abort,
984};
985
986/*
987 * ============================================================================
988 * Queue operations
989 * ============================================================================
990 */
991
992static int s5p_jpeg_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers,
993 unsigned int *nplanes, unsigned int sizes[],
994 void *alloc_ctxs[])
995{
996 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(vq);
997 struct s5p_jpeg_q_data *q_data = NULL;
998 unsigned int size, count = *nbuffers;
999
1000 q_data = get_q_data(ctx, vq->type);
1001 BUG_ON(q_data == NULL);
1002
1003 size = q_data->size;
1004
1005 /*
1006 * header is parsed during decoding and parsed information stored
1007 * in the context so we do not allow another buffer to overwrite it
1008 */
1009 if (ctx->mode == S5P_JPEG_DECODE)
1010 count = 1;
1011
1012 *nbuffers = count;
1013 *nplanes = 1;
1014 sizes[0] = size;
1015 alloc_ctxs[0] = ctx->jpeg->alloc_ctx;
1016
1017 return 0;
1018}
1019
1020static int s5p_jpeg_buf_prepare(struct vb2_buffer *vb)
1021{
1022 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1023 struct s5p_jpeg_q_data *q_data = NULL;
1024
1025 q_data = get_q_data(ctx, vb->vb2_queue->type);
1026 BUG_ON(q_data == NULL);
1027
1028 if (vb2_plane_size(vb, 0) < q_data->size) {
1029 pr_err("%s data will not fit into plane (%lu < %lu)\n",
1030 __func__, vb2_plane_size(vb, 0),
1031 (long)q_data->size);
1032 return -EINVAL;
1033 }
1034
1035 vb2_set_plane_payload(vb, 0, q_data->size);
1036
1037 return 0;
1038}
1039
1040static void s5p_jpeg_buf_queue(struct vb2_buffer *vb)
1041{
1042 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1043
1044 if (ctx->mode == S5P_JPEG_DECODE &&
1045 vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1046 struct s5p_jpeg_q_data tmp, *q_data;
1047 ctx->hdr_parsed = s5p_jpeg_parse_hdr(&tmp,
1048 (unsigned long)vb2_plane_vaddr(vb, 0),
1049 min((unsigned long)ctx->out_q.size,
1050 vb2_get_plane_payload(vb, 0)));
1051 if (!ctx->hdr_parsed) {
1052 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
1053 return;
1054 }
1055
1056 q_data = &ctx->out_q;
1057 q_data->w = tmp.w;
1058 q_data->h = tmp.h;
1059
1060 q_data = &ctx->cap_q;
1061 q_data->w = tmp.w;
1062 q_data->h = tmp.h;
1063
1064 jpeg_bound_align_image(&q_data->w, S5P_JPEG_MIN_WIDTH,
1065 S5P_JPEG_MAX_WIDTH, q_data->fmt->h_align,
1066 &q_data->h, S5P_JPEG_MIN_HEIGHT,
1067 S5P_JPEG_MAX_HEIGHT, q_data->fmt->v_align
1068 );
1069 q_data->size = q_data->w * q_data->h * q_data->fmt->depth >> 3;
1070 }
1071 if (ctx->m2m_ctx)
1072 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1073}
1074
1075static void s5p_jpeg_wait_prepare(struct vb2_queue *vq)
1076{
1077 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(vq);
1078
1079 mutex_unlock(&ctx->jpeg->lock);
1080}
1081
1082static void s5p_jpeg_wait_finish(struct vb2_queue *vq)
1083{
1084 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(vq);
1085
1086 mutex_lock(&ctx->jpeg->lock);
1087}
1088
1089static int s5p_jpeg_start_streaming(struct vb2_queue *q, unsigned int count)
1090{
1091 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(q);
1092 int ret;
1093
1094 ret = pm_runtime_get_sync(ctx->jpeg->dev);
1095
1096 return ret > 0 ? 0 : ret;
1097}
1098
1099static int s5p_jpeg_stop_streaming(struct vb2_queue *q)
1100{
1101 struct s5p_jpeg_ctx *ctx = vb2_get_drv_priv(q);
1102
1103 pm_runtime_put(ctx->jpeg->dev);
1104
1105 return 0;
1106}
1107
1108static struct vb2_ops s5p_jpeg_qops = {
1109 .queue_setup = s5p_jpeg_queue_setup,
1110 .buf_prepare = s5p_jpeg_buf_prepare,
1111 .buf_queue = s5p_jpeg_buf_queue,
1112 .wait_prepare = s5p_jpeg_wait_prepare,
1113 .wait_finish = s5p_jpeg_wait_finish,
1114 .start_streaming = s5p_jpeg_start_streaming,
1115 .stop_streaming = s5p_jpeg_stop_streaming,
1116};
1117
1118static int queue_init(void *priv, struct vb2_queue *src_vq,
1119 struct vb2_queue *dst_vq)
1120{
1121 struct s5p_jpeg_ctx *ctx = priv;
1122 int ret;
1123
1124 memset(src_vq, 0, sizeof(*src_vq));
1125 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1126 src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1127 src_vq->drv_priv = ctx;
1128 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1129 src_vq->ops = &s5p_jpeg_qops;
1130 src_vq->mem_ops = &vb2_dma_contig_memops;
1131
1132 ret = vb2_queue_init(src_vq);
1133 if (ret)
1134 return ret;
1135
1136 memset(dst_vq, 0, sizeof(*dst_vq));
1137 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1138 dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1139 dst_vq->drv_priv = ctx;
1140 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1141 dst_vq->ops = &s5p_jpeg_qops;
1142 dst_vq->mem_ops = &vb2_dma_contig_memops;
1143
1144 return vb2_queue_init(dst_vq);
1145}
1146
1147/*
1148 * ============================================================================
1149 * ISR
1150 * ============================================================================
1151 */
1152
1153static irqreturn_t s5p_jpeg_irq(int irq, void *dev_id)
1154{
1155 struct s5p_jpeg *jpeg = dev_id;
1156 struct s5p_jpeg_ctx *curr_ctx;
1157 struct vb2_buffer *src_buf, *dst_buf;
1158 unsigned long payload_size = 0;
1159 enum vb2_buffer_state state = VB2_BUF_STATE_DONE;
1160 bool enc_jpeg_too_large = false;
1161 bool timer_elapsed = false;
1162 bool op_completed = false;
1163
1164 curr_ctx = v4l2_m2m_get_curr_priv(jpeg->m2m_dev);
1165
1166 src_buf = v4l2_m2m_src_buf_remove(curr_ctx->m2m_ctx);
1167 dst_buf = v4l2_m2m_dst_buf_remove(curr_ctx->m2m_ctx);
1168
1169 if (curr_ctx->mode == S5P_JPEG_ENCODE)
1170 enc_jpeg_too_large = jpeg_enc_stream_stat(jpeg->regs);
1171 timer_elapsed = jpeg_timer_stat(jpeg->regs);
1172 op_completed = jpeg_result_stat_ok(jpeg->regs);
1173 if (curr_ctx->mode == S5P_JPEG_DECODE)
1174 op_completed = op_completed && jpeg_stream_stat_ok(jpeg->regs);
1175
1176 if (enc_jpeg_too_large) {
1177 state = VB2_BUF_STATE_ERROR;
1178 jpeg_clear_enc_stream_stat(jpeg->regs);
1179 } else if (timer_elapsed) {
1180 state = VB2_BUF_STATE_ERROR;
1181 jpeg_clear_timer_stat(jpeg->regs);
1182 } else if (!op_completed) {
1183 state = VB2_BUF_STATE_ERROR;
1184 } else {
1185 payload_size = jpeg_compressed_size(jpeg->regs);
1186 }
1187
1188 v4l2_m2m_buf_done(src_buf, state);
1189 if (curr_ctx->mode == S5P_JPEG_ENCODE)
1190 vb2_set_plane_payload(dst_buf, 0, payload_size);
1191 v4l2_m2m_buf_done(dst_buf, state);
1192 v4l2_m2m_job_finish(jpeg->m2m_dev, curr_ctx->m2m_ctx);
1193
1194 jpeg_clear_int(jpeg->regs);
1195
1196 return IRQ_HANDLED;
1197}
1198
1199/*
1200 * ============================================================================
1201 * Driver basic infrastructure
1202 * ============================================================================
1203 */
1204
1205static int s5p_jpeg_probe(struct platform_device *pdev)
1206{
1207 struct s5p_jpeg *jpeg;
1208 struct resource *res;
1209 int ret;
1210
1211 /* JPEG IP abstraction struct */
1212 jpeg = kzalloc(sizeof(struct s5p_jpeg), GFP_KERNEL);
1213 if (!jpeg)
1214 return -ENOMEM;
1215
1216 mutex_init(&jpeg->lock);
1217 jpeg->dev = &pdev->dev;
1218
1219 /* memory-mapped registers */
1220 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1221 if (!res) {
1222 dev_err(&pdev->dev, "cannot find IO resource\n");
1223 ret = -ENOENT;
1224 goto jpeg_alloc_rollback;
1225 }
1226
1227 jpeg->ioarea = request_mem_region(res->start, resource_size(res),
1228 pdev->name);
1229 if (!jpeg->ioarea) {
1230 dev_err(&pdev->dev, "cannot request IO\n");
1231 ret = -ENXIO;
1232 goto jpeg_alloc_rollback;
1233 }
1234
1235 jpeg->regs = ioremap(res->start, resource_size(res));
1236 if (!jpeg->regs) {
1237 dev_err(&pdev->dev, "cannot map IO\n");
1238 ret = -ENXIO;
1239 goto mem_region_rollback;
1240 }
1241
1242 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
1243 jpeg->regs, jpeg->ioarea, res);
1244
1245 /* interrupt service routine registration */
1246 jpeg->irq = ret = platform_get_irq(pdev, 0);
1247 if (ret < 0) {
1248 dev_err(&pdev->dev, "cannot find IRQ\n");
1249 goto ioremap_rollback;
1250 }
1251
1252 ret = request_irq(jpeg->irq, s5p_jpeg_irq, 0,
1253 dev_name(&pdev->dev), jpeg);
1254
1255 if (ret) {
1256 dev_err(&pdev->dev, "cannot claim IRQ %d\n", jpeg->irq);
1257 goto ioremap_rollback;
1258 }
1259
1260 /* clocks */
1261 jpeg->clk = clk_get(&pdev->dev, "jpeg");
1262 if (IS_ERR(jpeg->clk)) {
1263 dev_err(&pdev->dev, "cannot get clock\n");
1264 ret = PTR_ERR(jpeg->clk);
1265 goto request_irq_rollback;
1266 }
1267 dev_dbg(&pdev->dev, "clock source %p\n", jpeg->clk);
1268 clk_enable(jpeg->clk);
1269
1270 /* v4l2 device */
1271 ret = v4l2_device_register(&pdev->dev, &jpeg->v4l2_dev);
1272 if (ret) {
1273 dev_err(&pdev->dev, "Failed to register v4l2 device\n");
1274 goto clk_get_rollback;
1275 }
1276
1277 /* mem2mem device */
1278 jpeg->m2m_dev = v4l2_m2m_init(&s5p_jpeg_m2m_ops);
1279 if (IS_ERR(jpeg->m2m_dev)) {
1280 v4l2_err(&jpeg->v4l2_dev, "Failed to init mem2mem device\n");
1281 ret = PTR_ERR(jpeg->m2m_dev);
1282 goto device_register_rollback;
1283 }
1284
1285 jpeg->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1286 if (IS_ERR(jpeg->alloc_ctx)) {
1287 v4l2_err(&jpeg->v4l2_dev, "Failed to init memory allocator\n");
1288 ret = PTR_ERR(jpeg->alloc_ctx);
1289 goto m2m_init_rollback;
1290 }
1291
1292 /* JPEG encoder /dev/videoX node */
1293 jpeg->vfd_encoder = video_device_alloc();
1294 if (!jpeg->vfd_encoder) {
1295 v4l2_err(&jpeg->v4l2_dev, "Failed to allocate video device\n");
1296 ret = -ENOMEM;
1297 goto vb2_allocator_rollback;
1298 }
1299 strlcpy(jpeg->vfd_encoder->name, S5P_JPEG_M2M_NAME,
1300 sizeof(jpeg->vfd_encoder->name));
1301 jpeg->vfd_encoder->fops = &s5p_jpeg_fops;
1302 jpeg->vfd_encoder->ioctl_ops = &s5p_jpeg_ioctl_ops;
1303 jpeg->vfd_encoder->minor = -1;
1304 jpeg->vfd_encoder->release = video_device_release;
1305 jpeg->vfd_encoder->lock = &jpeg->lock;
1306 jpeg->vfd_encoder->v4l2_dev = &jpeg->v4l2_dev;
1307
1308 ret = video_register_device(jpeg->vfd_encoder, VFL_TYPE_GRABBER, -1);
1309 if (ret) {
1310 v4l2_err(&jpeg->v4l2_dev, "Failed to register video device\n");
1311 goto enc_vdev_alloc_rollback;
1312 }
1313
1314 video_set_drvdata(jpeg->vfd_encoder, jpeg);
1315 v4l2_info(&jpeg->v4l2_dev,
1316 "encoder device registered as /dev/video%d\n",
1317 jpeg->vfd_encoder->num);
1318
1319 /* JPEG decoder /dev/videoX node */
1320 jpeg->vfd_decoder = video_device_alloc();
1321 if (!jpeg->vfd_decoder) {
1322 v4l2_err(&jpeg->v4l2_dev, "Failed to allocate video device\n");
1323 ret = -ENOMEM;
1324 goto enc_vdev_register_rollback;
1325 }
1326 strlcpy(jpeg->vfd_decoder->name, S5P_JPEG_M2M_NAME,
1327 sizeof(jpeg->vfd_decoder->name));
1328 jpeg->vfd_decoder->fops = &s5p_jpeg_fops;
1329 jpeg->vfd_decoder->ioctl_ops = &s5p_jpeg_ioctl_ops;
1330 jpeg->vfd_decoder->minor = -1;
1331 jpeg->vfd_decoder->release = video_device_release;
1332 jpeg->vfd_decoder->lock = &jpeg->lock;
1333 jpeg->vfd_decoder->v4l2_dev = &jpeg->v4l2_dev;
1334
1335 ret = video_register_device(jpeg->vfd_decoder, VFL_TYPE_GRABBER, -1);
1336 if (ret) {
1337 v4l2_err(&jpeg->v4l2_dev, "Failed to register video device\n");
1338 goto dec_vdev_alloc_rollback;
1339 }
1340
1341 video_set_drvdata(jpeg->vfd_decoder, jpeg);
1342 v4l2_info(&jpeg->v4l2_dev,
1343 "decoder device registered as /dev/video%d\n",
1344 jpeg->vfd_decoder->num);
1345
1346 /* final statements & power management */
1347 platform_set_drvdata(pdev, jpeg);
1348
1349 pm_runtime_enable(&pdev->dev);
1350
1351 v4l2_info(&jpeg->v4l2_dev, "Samsung S5P JPEG codec\n");
1352
1353 return 0;
1354
1355dec_vdev_alloc_rollback:
1356 video_device_release(jpeg->vfd_decoder);
1357
1358enc_vdev_register_rollback:
1359 video_unregister_device(jpeg->vfd_encoder);
1360
1361enc_vdev_alloc_rollback:
1362 video_device_release(jpeg->vfd_encoder);
1363
1364vb2_allocator_rollback:
1365 vb2_dma_contig_cleanup_ctx(jpeg->alloc_ctx);
1366
1367m2m_init_rollback:
1368 v4l2_m2m_release(jpeg->m2m_dev);
1369
1370device_register_rollback:
1371 v4l2_device_unregister(&jpeg->v4l2_dev);
1372
1373clk_get_rollback:
1374 clk_disable(jpeg->clk);
1375 clk_put(jpeg->clk);
1376
1377request_irq_rollback:
1378 free_irq(jpeg->irq, jpeg);
1379
1380ioremap_rollback:
1381 iounmap(jpeg->regs);
1382
1383mem_region_rollback:
1384 release_resource(jpeg->ioarea);
1385 release_mem_region(jpeg->ioarea->start, resource_size(jpeg->ioarea));
1386
1387jpeg_alloc_rollback:
1388 kfree(jpeg);
1389 return ret;
1390}
1391
1392static int s5p_jpeg_remove(struct platform_device *pdev)
1393{
1394 struct s5p_jpeg *jpeg = platform_get_drvdata(pdev);
1395
1396 pm_runtime_disable(jpeg->dev);
1397
1398 video_unregister_device(jpeg->vfd_decoder);
1399 video_device_release(jpeg->vfd_decoder);
1400 video_unregister_device(jpeg->vfd_encoder);
1401 video_device_release(jpeg->vfd_encoder);
1402 vb2_dma_contig_cleanup_ctx(jpeg->alloc_ctx);
1403 v4l2_m2m_release(jpeg->m2m_dev);
1404 v4l2_device_unregister(&jpeg->v4l2_dev);
1405
1406 clk_disable(jpeg->clk);
1407 clk_put(jpeg->clk);
1408
1409 free_irq(jpeg->irq, jpeg);
1410
1411 iounmap(jpeg->regs);
1412
1413 release_resource(jpeg->ioarea);
1414 release_mem_region(jpeg->ioarea->start, resource_size(jpeg->ioarea));
1415 kfree(jpeg);
1416
1417 return 0;
1418}
1419
1420static int s5p_jpeg_runtime_suspend(struct device *dev)
1421{
1422 return 0;
1423}
1424
1425static int s5p_jpeg_runtime_resume(struct device *dev)
1426{
1427 struct s5p_jpeg *jpeg = dev_get_drvdata(dev);
1428 /*
1429 * JPEG IP allows storing two Huffman tables for each component
1430 * We fill table 0 for each component
1431 */
1432 jpeg_set_hdctbl(jpeg->regs);
1433 jpeg_set_hdctblg(jpeg->regs);
1434 jpeg_set_hactbl(jpeg->regs);
1435 jpeg_set_hactblg(jpeg->regs);
1436 return 0;
1437}
1438
1439static const struct dev_pm_ops s5p_jpeg_pm_ops = {
1440 .runtime_suspend = s5p_jpeg_runtime_suspend,
1441 .runtime_resume = s5p_jpeg_runtime_resume,
1442};
1443
1444static struct platform_driver s5p_jpeg_driver = {
1445 .probe = s5p_jpeg_probe,
1446 .remove = s5p_jpeg_remove,
1447 .driver = {
1448 .owner = THIS_MODULE,
1449 .name = S5P_JPEG_M2M_NAME,
1450 .pm = &s5p_jpeg_pm_ops,
1451 },
1452};
1453
1454static int __init
1455s5p_jpeg_register(void)
1456{
1457 int ret;
1458
1459 pr_info("S5P JPEG V4L2 Driver, (c) 2011 Samsung Electronics\n");
1460
1461 ret = platform_driver_register(&s5p_jpeg_driver);
1462
1463 if (ret)
1464 pr_err("%s: failed to register jpeg driver\n", __func__);
1465
1466 return ret;
1467}
1468
1469static void __exit
1470s5p_jpeg_unregister(void)
1471{
1472 platform_driver_unregister(&s5p_jpeg_driver);
1473}
1474
1475module_init(s5p_jpeg_register);
1476module_exit(s5p_jpeg_unregister);
1477
1478MODULE_AUTHOR("Andrzej Pietrasiewicz <andrzej.p@samsung.com>");
1479MODULE_DESCRIPTION("Samsung JPEG codec driver");
1480MODULE_LICENSE("GPL");
1481
diff --git a/drivers/media/video/s5p-jpeg/jpeg-core.h b/drivers/media/video/s5p-jpeg/jpeg-core.h
new file mode 100644
index 00000000000..facad6114f5
--- /dev/null
+++ b/drivers/media/video/s5p-jpeg/jpeg-core.h
@@ -0,0 +1,143 @@
1/* linux/drivers/media/video/s5p-jpeg/jpeg-core.h
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef JPEG_CORE_H_
14#define JPEG_CORE_H_
15
16#include <media/v4l2-device.h>
17
18#define S5P_JPEG_M2M_NAME "s5p-jpeg"
19
20/* JPEG compression quality setting */
21#define S5P_JPEG_COMPR_QUAL_BEST 0
22#define S5P_JPEG_COMPR_QUAL_WORST 3
23
24/* JPEG RGB to YCbCr conversion matrix coefficients */
25#define S5P_JPEG_COEF11 0x4d
26#define S5P_JPEG_COEF12 0x97
27#define S5P_JPEG_COEF13 0x1e
28#define S5P_JPEG_COEF21 0x2c
29#define S5P_JPEG_COEF22 0x57
30#define S5P_JPEG_COEF23 0x83
31#define S5P_JPEG_COEF31 0x83
32#define S5P_JPEG_COEF32 0x6e
33#define S5P_JPEG_COEF33 0x13
34
35/* a selection of JPEG markers */
36#define TEM 0x01
37#define SOF0 0xc0
38#define RST 0xd0
39#define SOI 0xd8
40#define EOI 0xd9
41#define DHP 0xde
42
43/* Flags that indicate a format can be used for capture/output */
44#define MEM2MEM_CAPTURE (1 << 0)
45#define MEM2MEM_OUTPUT (1 << 1)
46
47/**
48 * struct s5p_jpeg - JPEG IP abstraction
49 * @lock: the mutex protecting this structure
50 * @v4l2_dev: v4l2 device for mem2mem mode
51 * @vfd_encoder: video device node for encoder mem2mem mode
52 * @vfd_decoder: video device node for decoder mem2mem mode
53 * @m2m_dev: v4l2 mem2mem device data
54 * @ioarea: JPEG IP memory region
55 * @regs: JPEG IP registers mapping
56 * @irq: JPEG IP irq
57 * @clk: JPEG IP clock
58 * @dev: JPEG IP struct device
59 * @alloc_ctx: videobuf2 memory allocator's context
60 */
61struct s5p_jpeg {
62 struct mutex lock;
63
64 struct v4l2_device v4l2_dev;
65 struct video_device *vfd_encoder;
66 struct video_device *vfd_decoder;
67 struct v4l2_m2m_dev *m2m_dev;
68
69 struct resource *ioarea;
70 void __iomem *regs;
71 unsigned int irq;
72 struct clk *clk;
73 struct device *dev;
74 void *alloc_ctx;
75};
76
77/**
78 * struct jpeg_fmt - driver's internal color format data
79 * @name: format descritpion
80 * @fourcc: the fourcc code, 0 if not applicable
81 * @depth: number of bits per pixel
82 * @colplanes: number of color planes (1 for packed formats)
83 * @h_align: horizontal alignment order (align to 2^h_align)
84 * @v_align: vertical alignment order (align to 2^v_align)
85 * @types: types of queue this format is applicable to
86 */
87struct s5p_jpeg_fmt {
88 char *name;
89 u32 fourcc;
90 int depth;
91 int colplanes;
92 int h_align;
93 int v_align;
94 u32 types;
95};
96
97/**
98 * s5p_jpeg_q_data - parameters of one queue
99 * @fmt: driver-specific format of this queue
100 * @w: image width
101 * @h: image height
102 * @size: image buffer size in bytes
103 */
104struct s5p_jpeg_q_data {
105 struct s5p_jpeg_fmt *fmt;
106 u32 w;
107 u32 h;
108 u32 size;
109};
110
111/**
112 * s5p_jpeg_ctx - the device context data
113 * @jpeg: JPEG IP device for this context
114 * @mode: compression (encode) operation or decompression (decode)
115 * @compr_quality: destination image quality in compression (encode) mode
116 * @m2m_ctx: mem2mem device context
117 * @out_q: source (output) queue information
118 * @cap_fmt: destination (capture) queue queue information
119 * @hdr_parsed: set if header has been parsed during decompression
120 */
121struct s5p_jpeg_ctx {
122 struct s5p_jpeg *jpeg;
123 unsigned int mode;
124 unsigned int compr_quality;
125 struct v4l2_m2m_ctx *m2m_ctx;
126 struct s5p_jpeg_q_data out_q;
127 struct s5p_jpeg_q_data cap_q;
128 bool hdr_parsed;
129};
130
131/**
132 * s5p_jpeg_buffer - description of memory containing input JPEG data
133 * @size: buffer size
134 * @curr: current position in the buffer
135 * @data: pointer to the data
136 */
137struct s5p_jpeg_buffer {
138 unsigned long size;
139 unsigned long curr;
140 unsigned long data;
141};
142
143#endif /* JPEG_CORE_H */
diff --git a/drivers/media/video/s5p-jpeg/jpeg-hw.h b/drivers/media/video/s5p-jpeg/jpeg-hw.h
new file mode 100644
index 00000000000..e10c744e9f2
--- /dev/null
+++ b/drivers/media/video/s5p-jpeg/jpeg-hw.h
@@ -0,0 +1,353 @@
1/* linux/drivers/media/video/s5p-jpeg/jpeg-hw.h
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef JPEG_HW_H_
13#define JPEG_HW_H_
14
15#include <linux/io.h>
16
17#include "jpeg-hw.h"
18#include "jpeg-regs.h"
19
20#define S5P_JPEG_MIN_WIDTH 32
21#define S5P_JPEG_MIN_HEIGHT 32
22#define S5P_JPEG_MAX_WIDTH 8192
23#define S5P_JPEG_MAX_HEIGHT 8192
24#define S5P_JPEG_ENCODE 0
25#define S5P_JPEG_DECODE 1
26#define S5P_JPEG_RAW_IN_565 0
27#define S5P_JPEG_RAW_IN_422 1
28#define S5P_JPEG_SUBSAMPLING_422 0
29#define S5P_JPEG_SUBSAMPLING_420 1
30#define S5P_JPEG_RAW_OUT_422 0
31#define S5P_JPEG_RAW_OUT_420 1
32
33static inline void jpeg_reset(void __iomem *regs)
34{
35 unsigned long reg;
36
37 writel(1, regs + S5P_JPG_SW_RESET);
38 reg = readl(regs + S5P_JPG_SW_RESET);
39 /* no other way but polling for when JPEG IP becomes operational */
40 while (reg != 0) {
41 cpu_relax();
42 reg = readl(regs + S5P_JPG_SW_RESET);
43 }
44}
45
46static inline void jpeg_poweron(void __iomem *regs)
47{
48 writel(S5P_POWER_ON, regs + S5P_JPGCLKCON);
49}
50
51static inline void jpeg_input_raw_mode(void __iomem *regs, unsigned long mode)
52{
53 unsigned long reg, m;
54
55 m = S5P_MOD_SEL_565;
56 if (mode == S5P_JPEG_RAW_IN_565)
57 m = S5P_MOD_SEL_565;
58 else if (mode == S5P_JPEG_RAW_IN_422)
59 m = S5P_MOD_SEL_422;
60
61 reg = readl(regs + S5P_JPGCMOD);
62 reg &= ~S5P_MOD_SEL_MASK;
63 reg |= m;
64 writel(reg, regs + S5P_JPGCMOD);
65}
66
67static inline void jpeg_input_raw_y16(void __iomem *regs, bool y16)
68{
69 unsigned long reg;
70
71 reg = readl(regs + S5P_JPGCMOD);
72 if (y16)
73 reg |= S5P_MODE_Y16;
74 else
75 reg &= ~S5P_MODE_Y16_MASK;
76 writel(reg, regs + S5P_JPGCMOD);
77}
78
79static inline void jpeg_proc_mode(void __iomem *regs, unsigned long mode)
80{
81 unsigned long reg, m;
82
83 m = S5P_PROC_MODE_DECOMPR;
84 if (mode == S5P_JPEG_ENCODE)
85 m = S5P_PROC_MODE_COMPR;
86 else
87 m = S5P_PROC_MODE_DECOMPR;
88 reg = readl(regs + S5P_JPGMOD);
89 reg &= ~S5P_PROC_MODE_MASK;
90 reg |= m;
91 writel(reg, regs + S5P_JPGMOD);
92}
93
94static inline void jpeg_subsampling_mode(void __iomem *regs, unsigned long mode)
95{
96 unsigned long reg, m;
97
98 m = S5P_SUBSAMPLING_MODE_422;
99 if (mode == S5P_JPEG_SUBSAMPLING_422)
100 m = S5P_SUBSAMPLING_MODE_422;
101 else if (mode == S5P_JPEG_SUBSAMPLING_420)
102 m = S5P_SUBSAMPLING_MODE_420;
103 reg = readl(regs + S5P_JPGMOD);
104 reg &= ~S5P_SUBSAMPLING_MODE_MASK;
105 reg |= m;
106 writel(reg, regs + S5P_JPGMOD);
107}
108
109static inline void jpeg_dri(void __iomem *regs, unsigned int dri)
110{
111 unsigned long reg;
112
113 reg = readl(regs + S5P_JPGDRI_U);
114 reg &= ~0xff;
115 reg |= (dri >> 8) & 0xff;
116 writel(reg, regs + S5P_JPGDRI_U);
117
118 reg = readl(regs + S5P_JPGDRI_L);
119 reg &= ~0xff;
120 reg |= dri & 0xff;
121 writel(reg, regs + S5P_JPGDRI_L);
122}
123
124static inline void jpeg_qtbl(void __iomem *regs, unsigned int t, unsigned int n)
125{
126 unsigned long reg;
127
128 reg = readl(regs + S5P_JPG_QTBL);
129 reg &= ~S5P_QT_NUMt_MASK(t);
130 reg |= (n << S5P_QT_NUMt_SHIFT(t)) & S5P_QT_NUMt_MASK(t);
131 writel(reg, regs + S5P_JPG_QTBL);
132}
133
134static inline void jpeg_htbl_ac(void __iomem *regs, unsigned int t)
135{
136 unsigned long reg;
137
138 reg = readl(regs + S5P_JPG_HTBL);
139 reg &= ~S5P_HT_NUMt_AC_MASK(t);
140 /* this driver uses table 0 for all color components */
141 reg |= (0 << S5P_HT_NUMt_AC_SHIFT(t)) & S5P_HT_NUMt_AC_MASK(t);
142 writel(reg, regs + S5P_JPG_HTBL);
143}
144
145static inline void jpeg_htbl_dc(void __iomem *regs, unsigned int t)
146{
147 unsigned long reg;
148
149 reg = readl(regs + S5P_JPG_HTBL);
150 reg &= ~S5P_HT_NUMt_DC_MASK(t);
151 /* this driver uses table 0 for all color components */
152 reg |= (0 << S5P_HT_NUMt_DC_SHIFT(t)) & S5P_HT_NUMt_DC_MASK(t);
153 writel(reg, regs + S5P_JPG_HTBL);
154}
155
156static inline void jpeg_y(void __iomem *regs, unsigned int y)
157{
158 unsigned long reg;
159
160 reg = readl(regs + S5P_JPGY_U);
161 reg &= ~0xff;
162 reg |= (y >> 8) & 0xff;
163 writel(reg, regs + S5P_JPGY_U);
164
165 reg = readl(regs + S5P_JPGY_L);
166 reg &= ~0xff;
167 reg |= y & 0xff;
168 writel(reg, regs + S5P_JPGY_L);
169}
170
171static inline void jpeg_x(void __iomem *regs, unsigned int x)
172{
173 unsigned long reg;
174
175 reg = readl(regs + S5P_JPGX_U);
176 reg &= ~0xff;
177 reg |= (x >> 8) & 0xff;
178 writel(reg, regs + S5P_JPGX_U);
179
180 reg = readl(regs + S5P_JPGX_L);
181 reg &= ~0xff;
182 reg |= x & 0xff;
183 writel(reg, regs + S5P_JPGX_L);
184}
185
186static inline void jpeg_rst_int_enable(void __iomem *regs, bool enable)
187{
188 unsigned long reg;
189
190 reg = readl(regs + S5P_JPGINTSE);
191 reg &= ~S5P_RSTm_INT_EN_MASK;
192 if (enable)
193 reg |= S5P_RSTm_INT_EN;
194 writel(reg, regs + S5P_JPGINTSE);
195}
196
197static inline void jpeg_data_num_int_enable(void __iomem *regs, bool enable)
198{
199 unsigned long reg;
200
201 reg = readl(regs + S5P_JPGINTSE);
202 reg &= ~S5P_DATA_NUM_INT_EN_MASK;
203 if (enable)
204 reg |= S5P_DATA_NUM_INT_EN;
205 writel(reg, regs + S5P_JPGINTSE);
206}
207
208static inline void jpeg_final_mcu_num_int_enable(void __iomem *regs, bool enbl)
209{
210 unsigned long reg;
211
212 reg = readl(regs + S5P_JPGINTSE);
213 reg &= ~S5P_FINAL_MCU_NUM_INT_EN_MASK;
214 if (enbl)
215 reg |= S5P_FINAL_MCU_NUM_INT_EN;
216 writel(reg, regs + S5P_JPGINTSE);
217}
218
219static inline void jpeg_timer_enable(void __iomem *regs, unsigned long val)
220{
221 unsigned long reg;
222
223 reg = readl(regs + S5P_JPG_TIMER_SE);
224 reg |= S5P_TIMER_INT_EN;
225 reg &= ~S5P_TIMER_INIT_MASK;
226 reg |= val & S5P_TIMER_INIT_MASK;
227 writel(reg, regs + S5P_JPG_TIMER_SE);
228}
229
230static inline void jpeg_timer_disable(void __iomem *regs)
231{
232 unsigned long reg;
233
234 reg = readl(regs + S5P_JPG_TIMER_SE);
235 reg &= ~S5P_TIMER_INT_EN_MASK;
236 writel(reg, regs + S5P_JPG_TIMER_SE);
237}
238
239static inline int jpeg_timer_stat(void __iomem *regs)
240{
241 return (int)((readl(regs + S5P_JPG_TIMER_ST) & S5P_TIMER_INT_STAT_MASK)
242 >> S5P_TIMER_INT_STAT_SHIFT);
243}
244
245static inline void jpeg_clear_timer_stat(void __iomem *regs)
246{
247 unsigned long reg;
248
249 reg = readl(regs + S5P_JPG_TIMER_SE);
250 reg &= ~S5P_TIMER_INT_STAT_MASK;
251 writel(reg, regs + S5P_JPG_TIMER_SE);
252}
253
254static inline void jpeg_enc_stream_int(void __iomem *regs, unsigned long size)
255{
256 unsigned long reg;
257
258 reg = readl(regs + S5P_JPG_ENC_STREAM_INTSE);
259 reg &= ~S5P_ENC_STREAM_BOUND_MASK;
260 reg |= S5P_ENC_STREAM_INT_EN;
261 reg |= size & S5P_ENC_STREAM_BOUND_MASK;
262 writel(reg, regs + S5P_JPG_ENC_STREAM_INTSE);
263}
264
265static inline int jpeg_enc_stream_stat(void __iomem *regs)
266{
267 return (int)(readl(regs + S5P_JPG_ENC_STREAM_INTST) &
268 S5P_ENC_STREAM_INT_STAT_MASK);
269}
270
271static inline void jpeg_clear_enc_stream_stat(void __iomem *regs)
272{
273 unsigned long reg;
274
275 reg = readl(regs + S5P_JPG_ENC_STREAM_INTSE);
276 reg &= ~S5P_ENC_STREAM_INT_MASK;
277 writel(reg, regs + S5P_JPG_ENC_STREAM_INTSE);
278}
279
280static inline void jpeg_outform_raw(void __iomem *regs, unsigned long format)
281{
282 unsigned long reg, f;
283
284 f = S5P_DEC_OUT_FORMAT_422;
285 if (format == S5P_JPEG_RAW_OUT_422)
286 f = S5P_DEC_OUT_FORMAT_422;
287 else if (format == S5P_JPEG_RAW_OUT_420)
288 f = S5P_DEC_OUT_FORMAT_420;
289 reg = readl(regs + S5P_JPG_OUTFORM);
290 reg &= ~S5P_DEC_OUT_FORMAT_MASK;
291 reg |= f;
292 writel(reg, regs + S5P_JPG_OUTFORM);
293}
294
295static inline void jpeg_jpgadr(void __iomem *regs, unsigned long addr)
296{
297 writel(addr, regs + S5P_JPG_JPGADR);
298}
299
300static inline void jpeg_imgadr(void __iomem *regs, unsigned long addr)
301{
302 writel(addr, regs + S5P_JPG_IMGADR);
303}
304
305static inline void jpeg_coef(void __iomem *regs, unsigned int i,
306 unsigned int j, unsigned int coef)
307{
308 unsigned long reg;
309
310 reg = readl(regs + S5P_JPG_COEF(i));
311 reg &= ~S5P_COEFn_MASK(j);
312 reg |= (coef << S5P_COEFn_SHIFT(j)) & S5P_COEFn_MASK(j);
313 writel(reg, regs + S5P_JPG_COEF(i));
314}
315
316static inline void jpeg_start(void __iomem *regs)
317{
318 writel(1, regs + S5P_JSTART);
319}
320
321static inline int jpeg_result_stat_ok(void __iomem *regs)
322{
323 return (int)((readl(regs + S5P_JPGINTST) & S5P_RESULT_STAT_MASK)
324 >> S5P_RESULT_STAT_SHIFT);
325}
326
327static inline int jpeg_stream_stat_ok(void __iomem *regs)
328{
329 return !(int)((readl(regs + S5P_JPGINTST) & S5P_STREAM_STAT_MASK)
330 >> S5P_STREAM_STAT_SHIFT);
331}
332
333static inline void jpeg_clear_int(void __iomem *regs)
334{
335 unsigned long reg;
336
337 reg = readl(regs + S5P_JPGINTST);
338 writel(S5P_INT_RELEASE, regs + S5P_JPGCOM);
339 reg = readl(regs + S5P_JPGOPR);
340}
341
342static inline unsigned int jpeg_compressed_size(void __iomem *regs)
343{
344 unsigned long jpeg_size = 0;
345
346 jpeg_size |= (readl(regs + S5P_JPGCNT_U) & 0xff) << 16;
347 jpeg_size |= (readl(regs + S5P_JPGCNT_M) & 0xff) << 8;
348 jpeg_size |= (readl(regs + S5P_JPGCNT_L) & 0xff);
349
350 return (unsigned int)jpeg_size;
351}
352
353#endif /* JPEG_HW_H_ */
diff --git a/drivers/media/video/s5p-jpeg/jpeg-regs.h b/drivers/media/video/s5p-jpeg/jpeg-regs.h
new file mode 100644
index 00000000000..91f4dd5f86d
--- /dev/null
+++ b/drivers/media/video/s5p-jpeg/jpeg-regs.h
@@ -0,0 +1,170 @@
1/* linux/drivers/media/video/s5p-jpeg/jpeg-regs.h
2 *
3 * Register definition file for Samsung JPEG codec driver
4 *
5 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 *
8 * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef JPEG_REGS_H_
16#define JPEG_REGS_H_
17
18/* JPEG mode register */
19#define S5P_JPGMOD 0x00
20#define S5P_PROC_MODE_MASK (0x1 << 3)
21#define S5P_PROC_MODE_DECOMPR (0x1 << 3)
22#define S5P_PROC_MODE_COMPR (0x0 << 3)
23#define S5P_SUBSAMPLING_MODE_MASK 0x7
24#define S5P_SUBSAMPLING_MODE_444 (0x0 << 0)
25#define S5P_SUBSAMPLING_MODE_422 (0x1 << 0)
26#define S5P_SUBSAMPLING_MODE_420 (0x2 << 0)
27#define S5P_SUBSAMPLING_MODE_GRAY (0x3 << 0)
28
29/* JPEG operation status register */
30#define S5P_JPGOPR 0x04
31
32/* Quantization tables*/
33#define S5P_JPG_QTBL 0x08
34#define S5P_QT_NUMt_SHIFT(t) (((t) - 1) << 1)
35#define S5P_QT_NUMt_MASK(t) (0x3 << S5P_QT_NUMt_SHIFT(t))
36
37/* Huffman tables */
38#define S5P_JPG_HTBL 0x0c
39#define S5P_HT_NUMt_AC_SHIFT(t) (((t) << 1) - 1)
40#define S5P_HT_NUMt_AC_MASK(t) (0x1 << S5P_HT_NUMt_AC_SHIFT(t))
41
42#define S5P_HT_NUMt_DC_SHIFT(t) (((t) - 1) << 1)
43#define S5P_HT_NUMt_DC_MASK(t) (0x1 << S5P_HT_NUMt_DC_SHIFT(t))
44
45/* JPEG restart interval register upper byte */
46#define S5P_JPGDRI_U 0x10
47
48/* JPEG restart interval register lower byte */
49#define S5P_JPGDRI_L 0x14
50
51/* JPEG vertical resolution register upper byte */
52#define S5P_JPGY_U 0x18
53
54/* JPEG vertical resolution register lower byte */
55#define S5P_JPGY_L 0x1c
56
57/* JPEG horizontal resolution register upper byte */
58#define S5P_JPGX_U 0x20
59
60/* JPEG horizontal resolution register lower byte */
61#define S5P_JPGX_L 0x24
62
63/* JPEG byte count register upper byte */
64#define S5P_JPGCNT_U 0x28
65
66/* JPEG byte count register middle byte */
67#define S5P_JPGCNT_M 0x2c
68
69/* JPEG byte count register lower byte */
70#define S5P_JPGCNT_L 0x30
71
72/* JPEG interrupt setting register */
73#define S5P_JPGINTSE 0x34
74#define S5P_RSTm_INT_EN_MASK (0x1 << 7)
75#define S5P_RSTm_INT_EN (0x1 << 7)
76#define S5P_DATA_NUM_INT_EN_MASK (0x1 << 6)
77#define S5P_DATA_NUM_INT_EN (0x1 << 6)
78#define S5P_FINAL_MCU_NUM_INT_EN_MASK (0x1 << 5)
79#define S5P_FINAL_MCU_NUM_INT_EN (0x1 << 5)
80
81/* JPEG interrupt status register */
82#define S5P_JPGINTST 0x38
83#define S5P_RESULT_STAT_SHIFT 6
84#define S5P_RESULT_STAT_MASK (0x1 << S5P_RESULT_STAT_SHIFT)
85#define S5P_STREAM_STAT_SHIFT 5
86#define S5P_STREAM_STAT_MASK (0x1 << S5P_STREAM_STAT_SHIFT)
87
88/* JPEG command register */
89#define S5P_JPGCOM 0x4c
90#define S5P_INT_RELEASE (0x1 << 2)
91
92/* Raw image data r/w address register */
93#define S5P_JPG_IMGADR 0x50
94
95/* JPEG file r/w address register */
96#define S5P_JPG_JPGADR 0x58
97
98/* Coefficient for RGB-to-YCbCr converter register */
99#define S5P_JPG_COEF(n) (0x5c + (((n) - 1) << 2))
100#define S5P_COEFn_SHIFT(j) ((3 - (j)) << 3)
101#define S5P_COEFn_MASK(j) (0xff << S5P_COEFn_SHIFT(j))
102
103/* JPEG color mode register */
104#define S5P_JPGCMOD 0x68
105#define S5P_MOD_SEL_MASK (0x7 << 5)
106#define S5P_MOD_SEL_422 (0x1 << 5)
107#define S5P_MOD_SEL_565 (0x2 << 5)
108#define S5P_MODE_Y16_MASK (0x1 << 1)
109#define S5P_MODE_Y16 (0x1 << 1)
110
111/* JPEG clock control register */
112#define S5P_JPGCLKCON 0x6c
113#define S5P_CLK_DOWN_READY (0x1 << 1)
114#define S5P_POWER_ON (0x1 << 0)
115
116/* JPEG start register */
117#define S5P_JSTART 0x70
118
119/* JPEG SW reset register */
120#define S5P_JPG_SW_RESET 0x78
121
122/* JPEG timer setting register */
123#define S5P_JPG_TIMER_SE 0x7c
124#define S5P_TIMER_INT_EN_MASK (0x1 << 31)
125#define S5P_TIMER_INT_EN (0x1 << 31)
126#define S5P_TIMER_INIT_MASK 0x7fffffff
127
128/* JPEG timer status register */
129#define S5P_JPG_TIMER_ST 0x80
130#define S5P_TIMER_INT_STAT_SHIFT 31
131#define S5P_TIMER_INT_STAT_MASK (0x1 << S5P_TIMER_INT_STAT_SHIFT)
132#define S5P_TIMER_CNT_SHIFT 0
133#define S5P_TIMER_CNT_MASK 0x7fffffff
134
135/* JPEG decompression output format register */
136#define S5P_JPG_OUTFORM 0x88
137#define S5P_DEC_OUT_FORMAT_MASK (0x1 << 0)
138#define S5P_DEC_OUT_FORMAT_422 (0x0 << 0)
139#define S5P_DEC_OUT_FORMAT_420 (0x1 << 0)
140
141/* JPEG version register */
142#define S5P_JPG_VERSION 0x8c
143
144/* JPEG compressed stream size interrupt setting register */
145#define S5P_JPG_ENC_STREAM_INTSE 0x98
146#define S5P_ENC_STREAM_INT_MASK (0x1 << 24)
147#define S5P_ENC_STREAM_INT_EN (0x1 << 24)
148#define S5P_ENC_STREAM_BOUND_MASK 0xffffff
149
150/* JPEG compressed stream size interrupt status register */
151#define S5P_JPG_ENC_STREAM_INTST 0x9c
152#define S5P_ENC_STREAM_INT_STAT_MASK 0x1
153
154/* JPEG quantizer table register */
155#define S5P_JPG_QTBL_CONTENT(n) (0x400 + (n) * 0x100)
156
157/* JPEG DC Huffman table register */
158#define S5P_JPG_HDCTBL(n) (0x800 + (n) * 0x400)
159
160/* JPEG DC Huffman table register */
161#define S5P_JPG_HDCTBLG(n) (0x840 + (n) * 0x400)
162
163/* JPEG AC Huffman table register */
164#define S5P_JPG_HACTBL(n) (0x880 + (n) * 0x400)
165
166/* JPEG AC Huffman table register */
167#define S5P_JPG_HACTBLG(n) (0x8c0 + (n) * 0x400)
168
169#endif /* JPEG_REGS_H_ */
170
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc.c b/drivers/media/video/s5p-mfc/s5p_mfc.c
index 8be8b54eb74..e43e128baf5 100644
--- a/drivers/media/video/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/video/s5p-mfc/s5p_mfc.c
@@ -1245,27 +1245,7 @@ static struct platform_driver s5p_mfc_driver = {
1245 }, 1245 },
1246}; 1246};
1247 1247
1248static char banner[] __initdata = 1248module_platform_driver(s5p_mfc_driver);
1249 "S5P MFC V4L2 Driver, (C) 2011 Samsung Electronics\n";
1250
1251static int __init s5p_mfc_init(void)
1252{
1253 int ret;
1254
1255 pr_info("%s", banner);
1256 ret = platform_driver_register(&s5p_mfc_driver);
1257 if (ret)
1258 pr_err("Platform device registration failed.\n");
1259 return ret;
1260}
1261
1262static void __exit s5p_mfc_exit(void)
1263{
1264 platform_driver_unregister(&s5p_mfc_driver);
1265}
1266
1267module_init(s5p_mfc_init);
1268module_exit(s5p_mfc_exit);
1269 1249
1270MODULE_LICENSE("GPL"); 1250MODULE_LICENSE("GPL");
1271MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>"); 1251MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>");
diff --git a/drivers/media/video/s5p-tv/hdmi_drv.c b/drivers/media/video/s5p-tv/hdmi_drv.c
index 0279e6e89fe..8b41a0410ab 100644
--- a/drivers/media/video/s5p-tv/hdmi_drv.c
+++ b/drivers/media/video/s5p-tv/hdmi_drv.c
@@ -838,8 +838,8 @@ static int hdmi_resources_init(struct hdmi_device *hdev)
838 dev_err(dev, "failed to get clock 'hdmiphy'\n"); 838 dev_err(dev, "failed to get clock 'hdmiphy'\n");
839 goto fail; 839 goto fail;
840 } 840 }
841 res->regul_bulk = kzalloc(ARRAY_SIZE(supply) * 841 res->regul_bulk = kcalloc(ARRAY_SIZE(supply),
842 sizeof res->regul_bulk[0], GFP_KERNEL); 842 sizeof(res->regul_bulk[0]), GFP_KERNEL);
843 if (!res->regul_bulk) { 843 if (!res->regul_bulk) {
844 dev_err(dev, "failed to get memory for regulators\n"); 844 dev_err(dev, "failed to get memory for regulators\n");
845 goto fail; 845 goto fail;
@@ -1016,28 +1016,4 @@ static struct platform_driver hdmi_driver __refdata = {
1016 } 1016 }
1017}; 1017};
1018 1018
1019/* D R I V E R I N I T I A L I Z A T I O N */ 1019module_platform_driver(hdmi_driver);
1020
1021static int __init hdmi_init(void)
1022{
1023 int ret;
1024 static const char banner[] __initdata = KERN_INFO \
1025 "Samsung HDMI output driver, "
1026 "(c) 2010-2011 Samsung Electronics Co., Ltd.\n";
1027 printk(banner);
1028
1029 ret = platform_driver_register(&hdmi_driver);
1030 if (ret)
1031 printk(KERN_ERR "HDMI platform driver register failed\n");
1032
1033 return ret;
1034}
1035module_init(hdmi_init);
1036
1037static void __exit hdmi_exit(void)
1038{
1039 platform_driver_unregister(&hdmi_driver);
1040}
1041module_exit(hdmi_exit);
1042
1043
diff --git a/drivers/media/video/s5p-tv/mixer.h b/drivers/media/video/s5p-tv/mixer.h
index 51ad59b3035..1597078c4a5 100644
--- a/drivers/media/video/s5p-tv/mixer.h
+++ b/drivers/media/video/s5p-tv/mixer.h
@@ -86,6 +86,17 @@ struct mxr_crop {
86 unsigned int field; 86 unsigned int field;
87}; 87};
88 88
89/** stages of geometry operations */
90enum mxr_geometry_stage {
91 MXR_GEOMETRY_SINK,
92 MXR_GEOMETRY_COMPOSE,
93 MXR_GEOMETRY_CROP,
94 MXR_GEOMETRY_SOURCE,
95};
96
97/* flag indicating that offset should be 0 */
98#define MXR_NO_OFFSET 0x80000000
99
89/** description of transformation from source to destination image */ 100/** description of transformation from source to destination image */
90struct mxr_geometry { 101struct mxr_geometry {
91 /** cropping for source image */ 102 /** cropping for source image */
@@ -133,7 +144,8 @@ struct mxr_layer_ops {
133 /** streaming stop/start */ 144 /** streaming stop/start */
134 void (*stream_set)(struct mxr_layer *, int); 145 void (*stream_set)(struct mxr_layer *, int);
135 /** adjusting geometry */ 146 /** adjusting geometry */
136 void (*fix_geometry)(struct mxr_layer *); 147 void (*fix_geometry)(struct mxr_layer *,
148 enum mxr_geometry_stage, unsigned long);
137}; 149};
138 150
139/** layer instance, a single window and content displayed on output */ 151/** layer instance, a single window and content displayed on output */
diff --git a/drivers/media/video/s5p-tv/mixer_grp_layer.c b/drivers/media/video/s5p-tv/mixer_grp_layer.c
index de8270c2b6e..b93a21f5aa1 100644
--- a/drivers/media/video/s5p-tv/mixer_grp_layer.c
+++ b/drivers/media/video/s5p-tv/mixer_grp_layer.c
@@ -101,47 +101,132 @@ static void mxr_graph_format_set(struct mxr_layer *layer)
101 layer->fmt, &layer->geo); 101 layer->fmt, &layer->geo);
102} 102}
103 103
104static void mxr_graph_fix_geometry(struct mxr_layer *layer) 104static inline unsigned int closest(unsigned int x, unsigned int a,
105 unsigned int b, unsigned long flags)
106{
107 unsigned int mid = (a + b) / 2;
108
109 /* choosing closest value with constraints according to table:
110 * -------------+-----+-----+-----+-------+
111 * flags | 0 | LE | GE | LE|GE |
112 * -------------+-----+-----+-----+-------+
113 * x <= a | a | a | a | a |
114 * a < x <= mid | a | a | b | a |
115 * mid < x < b | b | a | b | b |
116 * b <= x | b | b | b | b |
117 * -------------+-----+-----+-----+-------+
118 */
119
120 /* remove all non-constraint flags */
121 flags &= V4L2_SEL_FLAG_LE | V4L2_SEL_FLAG_GE;
122
123 if (x <= a)
124 return a;
125 if (x >= b)
126 return b;
127 if (flags == V4L2_SEL_FLAG_LE)
128 return a;
129 if (flags == V4L2_SEL_FLAG_GE)
130 return b;
131 if (x <= mid)
132 return a;
133 return b;
134}
135
136static inline unsigned int do_center(unsigned int center,
137 unsigned int size, unsigned int upper, unsigned int flags)
138{
139 unsigned int lower;
140
141 if (flags & MXR_NO_OFFSET)
142 return 0;
143
144 lower = center - min(center, size / 2);
145 return min(lower, upper - size);
146}
147
148static void mxr_graph_fix_geometry(struct mxr_layer *layer,
149 enum mxr_geometry_stage stage, unsigned long flags)
105{ 150{
106 struct mxr_geometry *geo = &layer->geo; 151 struct mxr_geometry *geo = &layer->geo;
152 struct mxr_crop *src = &geo->src;
153 struct mxr_crop *dst = &geo->dst;
154 unsigned int x_center, y_center;
107 155
108 /* limit to boundary size */ 156 switch (stage) {
109 geo->src.full_width = clamp_val(geo->src.full_width, 1, 32767);
110 geo->src.full_height = clamp_val(geo->src.full_height, 1, 2047);
111 geo->src.width = clamp_val(geo->src.width, 1, geo->src.full_width);
112 geo->src.width = min(geo->src.width, 2047U);
113 /* not possible to crop of Y axis */
114 geo->src.y_offset = min(geo->src.y_offset, geo->src.full_height - 1);
115 geo->src.height = geo->src.full_height - geo->src.y_offset;
116 /* limitting offset */
117 geo->src.x_offset = min(geo->src.x_offset,
118 geo->src.full_width - geo->src.width);
119
120 /* setting position in output */
121 geo->dst.width = min(geo->dst.width, geo->dst.full_width);
122 geo->dst.height = min(geo->dst.height, geo->dst.full_height);
123
124 /* Mixer supports only 1x and 2x scaling */
125 if (geo->dst.width >= 2 * geo->src.width) {
126 geo->x_ratio = 1;
127 geo->dst.width = 2 * geo->src.width;
128 } else {
129 geo->x_ratio = 0;
130 geo->dst.width = geo->src.width;
131 }
132 157
133 if (geo->dst.height >= 2 * geo->src.height) { 158 case MXR_GEOMETRY_SINK: /* nothing to be fixed here */
134 geo->y_ratio = 1; 159 flags = 0;
135 geo->dst.height = 2 * geo->src.height; 160 /* fall through */
136 } else { 161
137 geo->y_ratio = 0; 162 case MXR_GEOMETRY_COMPOSE:
138 geo->dst.height = geo->src.height; 163 /* remember center of the area */
139 } 164 x_center = dst->x_offset + dst->width / 2;
165 y_center = dst->y_offset + dst->height / 2;
166 /* round up/down to 2 multiple depending on flags */
167 if (flags & V4L2_SEL_FLAG_LE) {
168 dst->width = round_down(dst->width, 2);
169 dst->height = round_down(dst->height, 2);
170 } else {
171 dst->width = round_up(dst->width, 2);
172 dst->height = round_up(dst->height, 2);
173 }
174 /* assure that compose rect is inside display area */
175 dst->width = min(dst->width, dst->full_width);
176 dst->height = min(dst->height, dst->full_height);
177
178 /* ensure that compose is reachable using 2x scaling */
179 dst->width = min(dst->width, 2 * src->full_width);
180 dst->height = min(dst->height, 2 * src->full_height);
181
182 /* setup offsets */
183 dst->x_offset = do_center(x_center, dst->width,
184 dst->full_width, flags);
185 dst->y_offset = do_center(y_center, dst->height,
186 dst->full_height, flags);
187 flags = 0;
188 /* fall through */
140 189
141 geo->dst.x_offset = min(geo->dst.x_offset, 190 case MXR_GEOMETRY_CROP:
142 geo->dst.full_width - geo->dst.width); 191 /* remember center of the area */
143 geo->dst.y_offset = min(geo->dst.y_offset, 192 x_center = src->x_offset + src->width / 2;
144 geo->dst.full_height - geo->dst.height); 193 y_center = src->y_offset + src->height / 2;
194 /* ensure that cropping area lies inside the buffer */
195 if (src->full_width < dst->width)
196 src->width = dst->width / 2;
197 else
198 src->width = closest(src->width, dst->width / 2,
199 dst->width, flags);
200
201 if (src->width == dst->width)
202 geo->x_ratio = 0;
203 else
204 geo->x_ratio = 1;
205
206 if (src->full_height < dst->height)
207 src->height = dst->height / 2;
208 else
209 src->height = closest(src->height, dst->height / 2,
210 dst->height, flags);
211
212 if (src->height == dst->height)
213 geo->y_ratio = 0;
214 else
215 geo->y_ratio = 1;
216
217 /* setup offsets */
218 src->x_offset = do_center(x_center, src->width,
219 src->full_width, flags);
220 src->y_offset = do_center(y_center, src->height,
221 src->full_height, flags);
222 flags = 0;
223 /* fall through */
224 case MXR_GEOMETRY_SOURCE:
225 src->full_width = clamp_val(src->full_width,
226 src->width + src->x_offset, 32767);
227 src->full_height = clamp_val(src->full_height,
228 src->height + src->y_offset, 2047);
229 };
145} 230}
146 231
147/* PUBLIC API */ 232/* PUBLIC API */
diff --git a/drivers/media/video/s5p-tv/mixer_video.c b/drivers/media/video/s5p-tv/mixer_video.c
index b47d0c06ecf..7884baeff76 100644
--- a/drivers/media/video/s5p-tv/mixer_video.c
+++ b/drivers/media/video/s5p-tv/mixer_video.c
@@ -170,18 +170,22 @@ static int mxr_querycap(struct file *file, void *priv,
170 return 0; 170 return 0;
171} 171}
172 172
173/* Geometry handling */ 173static void mxr_geometry_dump(struct mxr_device *mdev, struct mxr_geometry *geo)
174static void mxr_layer_geo_fix(struct mxr_layer *layer)
175{ 174{
176 struct mxr_device *mdev = layer->mdev; 175 mxr_dbg(mdev, "src.full_size = (%u, %u)\n",
177 struct v4l2_mbus_framefmt mbus_fmt; 176 geo->src.full_width, geo->src.full_height);
178 177 mxr_dbg(mdev, "src.size = (%u, %u)\n",
179 /* TODO: add some dirty flag to avoid unnecessary adjustments */ 178 geo->src.width, geo->src.height);
180 mxr_get_mbus_fmt(mdev, &mbus_fmt); 179 mxr_dbg(mdev, "src.offset = (%u, %u)\n",
181 layer->geo.dst.full_width = mbus_fmt.width; 180 geo->src.x_offset, geo->src.y_offset);
182 layer->geo.dst.full_height = mbus_fmt.height; 181 mxr_dbg(mdev, "dst.full_size = (%u, %u)\n",
183 layer->geo.dst.field = mbus_fmt.field; 182 geo->dst.full_width, geo->dst.full_height);
184 layer->ops.fix_geometry(layer); 183 mxr_dbg(mdev, "dst.size = (%u, %u)\n",
184 geo->dst.width, geo->dst.height);
185 mxr_dbg(mdev, "dst.offset = (%u, %u)\n",
186 geo->dst.x_offset, geo->dst.y_offset);
187 mxr_dbg(mdev, "ratio = (%u, %u)\n",
188 geo->x_ratio, geo->y_ratio);
185} 189}
186 190
187static void mxr_layer_default_geo(struct mxr_layer *layer) 191static void mxr_layer_default_geo(struct mxr_layer *layer)
@@ -204,27 +208,29 @@ static void mxr_layer_default_geo(struct mxr_layer *layer)
204 layer->geo.src.width = layer->geo.src.full_width; 208 layer->geo.src.width = layer->geo.src.full_width;
205 layer->geo.src.height = layer->geo.src.full_height; 209 layer->geo.src.height = layer->geo.src.full_height;
206 210
207 layer->ops.fix_geometry(layer); 211 mxr_geometry_dump(mdev, &layer->geo);
212 layer->ops.fix_geometry(layer, MXR_GEOMETRY_SINK, 0);
213 mxr_geometry_dump(mdev, &layer->geo);
208} 214}
209 215
210static void mxr_geometry_dump(struct mxr_device *mdev, struct mxr_geometry *geo) 216static void mxr_layer_update_output(struct mxr_layer *layer)
211{ 217{
212 mxr_dbg(mdev, "src.full_size = (%u, %u)\n", 218 struct mxr_device *mdev = layer->mdev;
213 geo->src.full_width, geo->src.full_height); 219 struct v4l2_mbus_framefmt mbus_fmt;
214 mxr_dbg(mdev, "src.size = (%u, %u)\n", 220
215 geo->src.width, geo->src.height); 221 mxr_get_mbus_fmt(mdev, &mbus_fmt);
216 mxr_dbg(mdev, "src.offset = (%u, %u)\n", 222 /* checking if update is needed */
217 geo->src.x_offset, geo->src.y_offset); 223 if (layer->geo.dst.full_width == mbus_fmt.width &&
218 mxr_dbg(mdev, "dst.full_size = (%u, %u)\n", 224 layer->geo.dst.full_height == mbus_fmt.width)
219 geo->dst.full_width, geo->dst.full_height); 225 return;
220 mxr_dbg(mdev, "dst.size = (%u, %u)\n",
221 geo->dst.width, geo->dst.height);
222 mxr_dbg(mdev, "dst.offset = (%u, %u)\n",
223 geo->dst.x_offset, geo->dst.y_offset);
224 mxr_dbg(mdev, "ratio = (%u, %u)\n",
225 geo->x_ratio, geo->y_ratio);
226}
227 226
227 layer->geo.dst.full_width = mbus_fmt.width;
228 layer->geo.dst.full_height = mbus_fmt.height;
229 layer->geo.dst.field = mbus_fmt.field;
230 layer->ops.fix_geometry(layer, MXR_GEOMETRY_SINK, 0);
231
232 mxr_geometry_dump(mdev, &layer->geo);
233}
228 234
229static const struct mxr_format *find_format_by_fourcc( 235static const struct mxr_format *find_format_by_fourcc(
230 struct mxr_layer *layer, unsigned long fourcc); 236 struct mxr_layer *layer, unsigned long fourcc);
@@ -249,37 +255,6 @@ static int mxr_enum_fmt(struct file *file, void *priv,
249 return 0; 255 return 0;
250} 256}
251 257
252static int mxr_s_fmt(struct file *file, void *priv,
253 struct v4l2_format *f)
254{
255 struct mxr_layer *layer = video_drvdata(file);
256 const struct mxr_format *fmt;
257 struct v4l2_pix_format_mplane *pix;
258 struct mxr_device *mdev = layer->mdev;
259 struct mxr_geometry *geo = &layer->geo;
260
261 mxr_dbg(mdev, "%s:%d\n", __func__, __LINE__);
262
263 pix = &f->fmt.pix_mp;
264 fmt = find_format_by_fourcc(layer, pix->pixelformat);
265 if (fmt == NULL) {
266 mxr_warn(mdev, "not recognized fourcc: %08x\n",
267 pix->pixelformat);
268 return -EINVAL;
269 }
270 layer->fmt = fmt;
271 geo->src.full_width = pix->width;
272 geo->src.width = pix->width;
273 geo->src.full_height = pix->height;
274 geo->src.height = pix->height;
275 /* assure consistency of geometry */
276 mxr_layer_geo_fix(layer);
277 mxr_dbg(mdev, "width=%u height=%u span=%u\n",
278 geo->src.width, geo->src.height, geo->src.full_width);
279
280 return 0;
281}
282
283static unsigned int divup(unsigned int divident, unsigned int divisor) 258static unsigned int divup(unsigned int divident, unsigned int divisor)
284{ 259{
285 return (divident + divisor - 1) / divisor; 260 return (divident + divisor - 1) / divisor;
@@ -299,6 +274,10 @@ static void mxr_mplane_fill(struct v4l2_plane_pix_format *planes,
299{ 274{
300 int i; 275 int i;
301 276
277 /* checking if nothing to fill */
278 if (!planes)
279 return;
280
302 memset(planes, 0, sizeof(*planes) * fmt->num_subframes); 281 memset(planes, 0, sizeof(*planes) * fmt->num_subframes);
303 for (i = 0; i < fmt->num_planes; ++i) { 282 for (i = 0; i < fmt->num_planes; ++i) {
304 struct v4l2_plane_pix_format *plane = planes 283 struct v4l2_plane_pix_format *plane = planes
@@ -332,73 +311,194 @@ static int mxr_g_fmt(struct file *file, void *priv,
332 return 0; 311 return 0;
333} 312}
334 313
335static inline struct mxr_crop *choose_crop_by_type(struct mxr_geometry *geo, 314static int mxr_s_fmt(struct file *file, void *priv,
336 enum v4l2_buf_type type) 315 struct v4l2_format *f)
337{
338 switch (type) {
339 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
340 case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
341 return &geo->dst;
342 case V4L2_BUF_TYPE_VIDEO_OVERLAY:
343 return &geo->src;
344 default:
345 return NULL;
346 }
347}
348
349static int mxr_g_crop(struct file *file, void *fh, struct v4l2_crop *a)
350{ 316{
351 struct mxr_layer *layer = video_drvdata(file); 317 struct mxr_layer *layer = video_drvdata(file);
352 struct mxr_crop *crop; 318 const struct mxr_format *fmt;
319 struct v4l2_pix_format_mplane *pix;
320 struct mxr_device *mdev = layer->mdev;
321 struct mxr_geometry *geo = &layer->geo;
353 322
354 mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); 323 mxr_dbg(mdev, "%s:%d\n", __func__, __LINE__);
355 crop = choose_crop_by_type(&layer->geo, a->type); 324
356 if (crop == NULL) 325 pix = &f->fmt.pix_mp;
326 fmt = find_format_by_fourcc(layer, pix->pixelformat);
327 if (fmt == NULL) {
328 mxr_warn(mdev, "not recognized fourcc: %08x\n",
329 pix->pixelformat);
357 return -EINVAL; 330 return -EINVAL;
358 mxr_layer_geo_fix(layer); 331 }
359 a->c.left = crop->x_offset; 332 layer->fmt = fmt;
360 a->c.top = crop->y_offset; 333 /* set source size to highest accepted value */
361 a->c.width = crop->width; 334 geo->src.full_width = max(geo->dst.full_width, pix->width);
362 a->c.height = crop->height; 335 geo->src.full_height = max(geo->dst.full_height, pix->height);
336 layer->ops.fix_geometry(layer, MXR_GEOMETRY_SOURCE, 0);
337 mxr_geometry_dump(mdev, &layer->geo);
338 /* set cropping to total visible screen */
339 geo->src.width = pix->width;
340 geo->src.height = pix->height;
341 geo->src.x_offset = 0;
342 geo->src.y_offset = 0;
343 /* assure consistency of geometry */
344 layer->ops.fix_geometry(layer, MXR_GEOMETRY_CROP, MXR_NO_OFFSET);
345 mxr_geometry_dump(mdev, &layer->geo);
346 /* set full size to lowest possible value */
347 geo->src.full_width = 0;
348 geo->src.full_height = 0;
349 layer->ops.fix_geometry(layer, MXR_GEOMETRY_SOURCE, 0);
350 mxr_geometry_dump(mdev, &layer->geo);
351
352 /* returning results */
353 mxr_g_fmt(file, priv, f);
354
363 return 0; 355 return 0;
364} 356}
365 357
366static int mxr_s_crop(struct file *file, void *fh, struct v4l2_crop *a) 358static int mxr_g_selection(struct file *file, void *fh,
359 struct v4l2_selection *s)
367{ 360{
368 struct mxr_layer *layer = video_drvdata(file); 361 struct mxr_layer *layer = video_drvdata(file);
369 struct mxr_crop *crop; 362 struct mxr_geometry *geo = &layer->geo;
370 363
371 mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); 364 mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__);
372 crop = choose_crop_by_type(&layer->geo, a->type); 365
373 if (crop == NULL) 366 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT &&
367 s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
368 return -EINVAL;
369
370 switch (s->target) {
371 case V4L2_SEL_TGT_CROP_ACTIVE:
372 s->r.left = geo->src.x_offset;
373 s->r.top = geo->src.y_offset;
374 s->r.width = geo->src.width;
375 s->r.height = geo->src.height;
376 break;
377 case V4L2_SEL_TGT_CROP_DEFAULT:
378 case V4L2_SEL_TGT_CROP_BOUNDS:
379 s->r.left = 0;
380 s->r.top = 0;
381 s->r.width = geo->src.full_width;
382 s->r.height = geo->src.full_height;
383 break;
384 case V4L2_SEL_TGT_COMPOSE_ACTIVE:
385 case V4L2_SEL_TGT_COMPOSE_PADDED:
386 s->r.left = geo->dst.x_offset;
387 s->r.top = geo->dst.y_offset;
388 s->r.width = geo->dst.width;
389 s->r.height = geo->dst.height;
390 break;
391 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
392 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
393 s->r.left = 0;
394 s->r.top = 0;
395 s->r.width = geo->dst.full_width;
396 s->r.height = geo->dst.full_height;
397 break;
398 default:
374 return -EINVAL; 399 return -EINVAL;
375 crop->x_offset = a->c.left; 400 }
376 crop->y_offset = a->c.top; 401
377 crop->width = a->c.width;
378 crop->height = a->c.height;
379 mxr_layer_geo_fix(layer);
380 return 0; 402 return 0;
381} 403}
382 404
383static int mxr_cropcap(struct file *file, void *fh, struct v4l2_cropcap *a) 405/* returns 1 if rectangle 'a' is inside 'b' */
406static int mxr_is_rect_inside(struct v4l2_rect *a, struct v4l2_rect *b)
407{
408 if (a->left < b->left)
409 return 0;
410 if (a->top < b->top)
411 return 0;
412 if (a->left + a->width > b->left + b->width)
413 return 0;
414 if (a->top + a->height > b->top + b->height)
415 return 0;
416 return 1;
417}
418
419static int mxr_s_selection(struct file *file, void *fh,
420 struct v4l2_selection *s)
384{ 421{
385 struct mxr_layer *layer = video_drvdata(file); 422 struct mxr_layer *layer = video_drvdata(file);
386 struct mxr_crop *crop; 423 struct mxr_geometry *geo = &layer->geo;
424 struct mxr_crop *target = NULL;
425 enum mxr_geometry_stage stage;
426 struct mxr_geometry tmp;
427 struct v4l2_rect res;
387 428
388 mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); 429 memset(&res, 0, sizeof res);
389 crop = choose_crop_by_type(&layer->geo, a->type); 430
390 if (crop == NULL) 431 mxr_dbg(layer->mdev, "%s: rect: %dx%d@%d,%d\n", __func__,
432 s->r.width, s->r.height, s->r.left, s->r.top);
433
434 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT &&
435 s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
391 return -EINVAL; 436 return -EINVAL;
392 mxr_layer_geo_fix(layer); 437
393 a->bounds.left = 0; 438 switch (s->target) {
394 a->bounds.top = 0; 439 /* ignore read-only targets */
395 a->bounds.width = crop->full_width; 440 case V4L2_SEL_TGT_CROP_DEFAULT:
396 a->bounds.top = crop->full_height; 441 case V4L2_SEL_TGT_CROP_BOUNDS:
397 a->defrect = a->bounds; 442 res.width = geo->src.full_width;
398 /* setting pixel aspect to 1/1 */ 443 res.height = geo->src.full_height;
399 a->pixelaspect.numerator = 1; 444 break;
400 a->pixelaspect.denominator = 1; 445
446 /* ignore read-only targets */
447 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
448 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
449 res.width = geo->dst.full_width;
450 res.height = geo->dst.full_height;
451 break;
452
453 case V4L2_SEL_TGT_CROP_ACTIVE:
454 target = &geo->src;
455 stage = MXR_GEOMETRY_CROP;
456 break;
457 case V4L2_SEL_TGT_COMPOSE_ACTIVE:
458 case V4L2_SEL_TGT_COMPOSE_PADDED:
459 target = &geo->dst;
460 stage = MXR_GEOMETRY_COMPOSE;
461 break;
462 default:
463 return -EINVAL;
464 }
465 /* apply change and update geometry if needed */
466 if (target) {
467 /* backup current geometry if setup fails */
468 memcpy(&tmp, geo, sizeof tmp);
469
470 /* apply requested selection */
471 target->x_offset = s->r.left;
472 target->y_offset = s->r.top;
473 target->width = s->r.width;
474 target->height = s->r.height;
475
476 layer->ops.fix_geometry(layer, stage, s->flags);
477
478 /* retrieve update selection rectangle */
479 res.left = target->x_offset;
480 res.top = target->y_offset;
481 res.width = target->width;
482 res.height = target->height;
483
484 mxr_geometry_dump(layer->mdev, &layer->geo);
485 }
486
487 /* checking if the rectangle satisfies constraints */
488 if ((s->flags & V4L2_SEL_FLAG_LE) && !mxr_is_rect_inside(&res, &s->r))
489 goto fail;
490 if ((s->flags & V4L2_SEL_FLAG_GE) && !mxr_is_rect_inside(&s->r, &res))
491 goto fail;
492
493 /* return result rectangle */
494 s->r = res;
495
401 return 0; 496 return 0;
497fail:
498 /* restore old geometry, which is not touched if target is NULL */
499 if (target)
500 memcpy(geo, &tmp, sizeof tmp);
501 return -ERANGE;
402} 502}
403 503
404static int mxr_enum_dv_presets(struct file *file, void *fh, 504static int mxr_enum_dv_presets(struct file *file, void *fh,
@@ -438,6 +538,8 @@ static int mxr_s_dv_preset(struct file *file, void *fh,
438 538
439 mutex_unlock(&mdev->mutex); 539 mutex_unlock(&mdev->mutex);
440 540
541 mxr_layer_update_output(layer);
542
441 /* any failure should return EINVAL according to V4L2 doc */ 543 /* any failure should return EINVAL according to V4L2 doc */
442 return ret ? -EINVAL : 0; 544 return ret ? -EINVAL : 0;
443} 545}
@@ -478,6 +580,8 @@ static int mxr_s_std(struct file *file, void *fh, v4l2_std_id *norm)
478 580
479 mutex_unlock(&mdev->mutex); 581 mutex_unlock(&mdev->mutex);
480 582
583 mxr_layer_update_output(layer);
584
481 return ret ? -EINVAL : 0; 585 return ret ? -EINVAL : 0;
482} 586}
483 587
@@ -526,25 +630,27 @@ static int mxr_s_output(struct file *file, void *fh, unsigned int i)
526 struct video_device *vfd = video_devdata(file); 630 struct video_device *vfd = video_devdata(file);
527 struct mxr_layer *layer = video_drvdata(file); 631 struct mxr_layer *layer = video_drvdata(file);
528 struct mxr_device *mdev = layer->mdev; 632 struct mxr_device *mdev = layer->mdev;
529 int ret = 0;
530 633
531 if (i >= mdev->output_cnt || mdev->output[i] == NULL) 634 if (i >= mdev->output_cnt || mdev->output[i] == NULL)
532 return -EINVAL; 635 return -EINVAL;
533 636
534 mutex_lock(&mdev->mutex); 637 mutex_lock(&mdev->mutex);
535 if (mdev->n_output > 0) { 638 if (mdev->n_output > 0) {
536 ret = -EBUSY; 639 mutex_unlock(&mdev->mutex);
537 goto done; 640 return -EBUSY;
538 } 641 }
539 mdev->current_output = i; 642 mdev->current_output = i;
540 vfd->tvnorms = 0; 643 vfd->tvnorms = 0;
541 v4l2_subdev_call(to_outsd(mdev), video, g_tvnorms_output, 644 v4l2_subdev_call(to_outsd(mdev), video, g_tvnorms_output,
542 &vfd->tvnorms); 645 &vfd->tvnorms);
646 mutex_unlock(&mdev->mutex);
647
648 /* update layers geometry */
649 mxr_layer_update_output(layer);
650
543 mxr_dbg(mdev, "tvnorms = %08llx\n", vfd->tvnorms); 651 mxr_dbg(mdev, "tvnorms = %08llx\n", vfd->tvnorms);
544 652
545done: 653 return 0;
546 mutex_unlock(&mdev->mutex);
547 return ret;
548} 654}
549 655
550static int mxr_g_output(struct file *file, void *fh, unsigned int *p) 656static int mxr_g_output(struct file *file, void *fh, unsigned int *p)
@@ -633,10 +739,9 @@ static const struct v4l2_ioctl_ops mxr_ioctl_ops = {
633 .vidioc_enum_output = mxr_enum_output, 739 .vidioc_enum_output = mxr_enum_output,
634 .vidioc_s_output = mxr_s_output, 740 .vidioc_s_output = mxr_s_output,
635 .vidioc_g_output = mxr_g_output, 741 .vidioc_g_output = mxr_g_output,
636 /* Crop ioctls */ 742 /* selection ioctls */
637 .vidioc_g_crop = mxr_g_crop, 743 .vidioc_g_selection = mxr_g_selection,
638 .vidioc_s_crop = mxr_s_crop, 744 .vidioc_s_selection = mxr_s_selection,
639 .vidioc_cropcap = mxr_cropcap,
640}; 745};
641 746
642static int mxr_video_open(struct file *file) 747static int mxr_video_open(struct file *file)
@@ -805,10 +910,7 @@ static int start_streaming(struct vb2_queue *vq, unsigned int count)
805 /* block any changes in output configuration */ 910 /* block any changes in output configuration */
806 mxr_output_get(mdev); 911 mxr_output_get(mdev);
807 912
808 /* update layers geometry */ 913 mxr_layer_update_output(layer);
809 mxr_layer_geo_fix(layer);
810 mxr_geometry_dump(mdev, &layer->geo);
811
812 layer->ops.format_set(layer); 914 layer->ops.format_set(layer);
813 /* enabling layer in hardware */ 915 /* enabling layer in hardware */
814 spin_lock_irqsave(&layer->enq_slock, flags); 916 spin_lock_irqsave(&layer->enq_slock, flags);
diff --git a/drivers/media/video/s5p-tv/mixer_vp_layer.c b/drivers/media/video/s5p-tv/mixer_vp_layer.c
index f3bb2e34cb5..3d13a636877 100644
--- a/drivers/media/video/s5p-tv/mixer_vp_layer.c
+++ b/drivers/media/video/s5p-tv/mixer_vp_layer.c
@@ -127,47 +127,77 @@ static void mxr_vp_format_set(struct mxr_layer *layer)
127 mxr_reg_vp_format(layer->mdev, layer->fmt, &layer->geo); 127 mxr_reg_vp_format(layer->mdev, layer->fmt, &layer->geo);
128} 128}
129 129
130static void mxr_vp_fix_geometry(struct mxr_layer *layer) 130static inline unsigned int do_center(unsigned int center,
131 unsigned int size, unsigned int upper, unsigned int flags)
131{ 132{
132 struct mxr_geometry *geo = &layer->geo; 133 unsigned int lower;
134
135 if (flags & MXR_NO_OFFSET)
136 return 0;
137
138 lower = center - min(center, size / 2);
139 return min(lower, upper - size);
140}
133 141
134 /* align horizontal size to 8 pixels */ 142static void mxr_vp_fix_geometry(struct mxr_layer *layer,
135 geo->src.full_width = ALIGN(geo->src.full_width, 8); 143 enum mxr_geometry_stage stage, unsigned long flags)
136 /* limit to boundary size */ 144{
137 geo->src.full_width = clamp_val(geo->src.full_width, 8, 8192); 145 struct mxr_geometry *geo = &layer->geo;
138 geo->src.full_height = clamp_val(geo->src.full_height, 1, 8192); 146 struct mxr_crop *src = &geo->src;
139 geo->src.width = clamp_val(geo->src.width, 32, geo->src.full_width); 147 struct mxr_crop *dst = &geo->dst;
140 geo->src.width = min(geo->src.width, 2047U); 148 unsigned long x_center, y_center;
141 geo->src.height = clamp_val(geo->src.height, 4, geo->src.full_height); 149
142 geo->src.height = min(geo->src.height, 2047U); 150 switch (stage) {
143 151
144 /* setting size of output window */ 152 case MXR_GEOMETRY_SINK: /* nothing to be fixed here */
145 geo->dst.width = clamp_val(geo->dst.width, 8, geo->dst.full_width); 153 case MXR_GEOMETRY_COMPOSE:
146 geo->dst.height = clamp_val(geo->dst.height, 1, geo->dst.full_height); 154 /* remember center of the area */
147 155 x_center = dst->x_offset + dst->width / 2;
148 /* ensure that scaling is in range 1/4x to 16x */ 156 y_center = dst->y_offset + dst->height / 2;
149 if (geo->src.width >= 4 * geo->dst.width) 157
150 geo->src.width = 4 * geo->dst.width; 158 /* ensure that compose is reachable using 16x scaling */
151 if (geo->dst.width >= 16 * geo->src.width) 159 dst->width = clamp(dst->width, 8U, 16 * src->full_width);
152 geo->dst.width = 16 * geo->src.width; 160 dst->height = clamp(dst->height, 1U, 16 * src->full_height);
153 if (geo->src.height >= 4 * geo->dst.height) 161
154 geo->src.height = 4 * geo->dst.height; 162 /* setup offsets */
155 if (geo->dst.height >= 16 * geo->src.height) 163 dst->x_offset = do_center(x_center, dst->width,
156 geo->dst.height = 16 * geo->src.height; 164 dst->full_width, flags);
157 165 dst->y_offset = do_center(y_center, dst->height,
158 /* setting scaling ratio */ 166 dst->full_height, flags);
159 geo->x_ratio = (geo->src.width << 16) / geo->dst.width; 167 flags = 0; /* remove possible MXR_NO_OFFSET flag */
160 geo->y_ratio = (geo->src.height << 16) / geo->dst.height; 168 /* fall through */
161 169 case MXR_GEOMETRY_CROP:
162 /* adjust offsets */ 170 /* remember center of the area */
163 geo->src.x_offset = min(geo->src.x_offset, 171 x_center = src->x_offset + src->width / 2;
164 geo->src.full_width - geo->src.width); 172 y_center = src->y_offset + src->height / 2;
165 geo->src.y_offset = min(geo->src.y_offset, 173
166 geo->src.full_height - geo->src.height); 174 /* ensure scaling is between 0.25x .. 16x */
167 geo->dst.x_offset = min(geo->dst.x_offset, 175 src->width = clamp(src->width, round_up(dst->width / 16, 4),
168 geo->dst.full_width - geo->dst.width); 176 dst->width * 4);
169 geo->dst.y_offset = min(geo->dst.y_offset, 177 src->height = clamp(src->height, round_up(dst->height / 16, 4),
170 geo->dst.full_height - geo->dst.height); 178 dst->height * 4);
179
180 /* hardware limits */
181 src->width = clamp(src->width, 32U, 2047U);
182 src->height = clamp(src->height, 4U, 2047U);
183
184 /* setup offsets */
185 src->x_offset = do_center(x_center, src->width,
186 src->full_width, flags);
187 src->y_offset = do_center(y_center, src->height,
188 src->full_height, flags);
189
190 /* setting scaling ratio */
191 geo->x_ratio = (src->width << 16) / dst->width;
192 geo->y_ratio = (src->height << 16) / dst->height;
193 /* fall through */
194
195 case MXR_GEOMETRY_SOURCE:
196 src->full_width = clamp(src->full_width,
197 ALIGN(src->width + src->x_offset, 8), 8192U);
198 src->full_height = clamp(src->full_height,
199 src->height + src->y_offset, 8192U);
200 };
171} 201}
172 202
173/* PUBLIC API */ 203/* PUBLIC API */
diff --git a/drivers/media/video/s5p-tv/sdo_drv.c b/drivers/media/video/s5p-tv/sdo_drv.c
index 8cec67ef48c..059e7749ce9 100644
--- a/drivers/media/video/s5p-tv/sdo_drv.c
+++ b/drivers/media/video/s5p-tv/sdo_drv.c
@@ -457,24 +457,4 @@ static struct platform_driver sdo_driver __refdata = {
457 } 457 }
458}; 458};
459 459
460static int __init sdo_init(void) 460module_platform_driver(sdo_driver);
461{
462 int ret;
463 static const char banner[] __initdata = KERN_INFO \
464 "Samsung Standard Definition Output (SDO) driver, "
465 "(c) 2010-2011 Samsung Electronics Co., Ltd.\n";
466 printk(banner);
467
468 ret = platform_driver_register(&sdo_driver);
469 if (ret)
470 printk(KERN_ERR "SDO platform driver register failed\n");
471
472 return ret;
473}
474module_init(sdo_init);
475
476static void __exit sdo_exit(void)
477{
478 platform_driver_unregister(&sdo_driver);
479}
480module_exit(sdo_exit);
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index 0f9fb99adeb..065d0f6be4a 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -5691,6 +5691,27 @@ struct saa7134_board saa7134_boards[] = {
5691 .amux = LINE1, 5691 .amux = LINE1,
5692 }, 5692 },
5693 }, 5693 },
5694 [SAA7134_BOARD_SENSORAY811_911] = {
5695 .name = "Sensoray 811/911",
5696 .audio_clock = 0x00200000,
5697 .tuner_type = TUNER_ABSENT,
5698 .radio_type = UNSET,
5699 .tuner_addr = ADDR_UNSET,
5700 .radio_addr = ADDR_UNSET,
5701 .inputs = {{
5702 .name = name_comp1,
5703 .vmux = 0,
5704 .amux = LINE1,
5705 }, {
5706 .name = name_comp3,
5707 .vmux = 2,
5708 .amux = LINE1,
5709 }, {
5710 .name = name_svideo,
5711 .vmux = 8,
5712 .amux = LINE1,
5713 } },
5714 },
5694 5715
5695}; 5716};
5696 5717
@@ -6914,6 +6935,18 @@ struct pci_device_id saa7134_pci_tbl[] = {
6914 .subdevice = 0xd136, 6935 .subdevice = 0xd136,
6915 .driver_data = SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2, 6936 .driver_data = SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2,
6916 }, { 6937 }, {
6938 .vendor = PCI_VENDOR_ID_PHILIPS,
6939 .device = PCI_DEVICE_ID_PHILIPS_SAA7133,
6940 .subvendor = 0x6000,
6941 .subdevice = 0x0811,
6942 .driver_data = SAA7134_BOARD_SENSORAY811_911,
6943 }, {
6944 .vendor = PCI_VENDOR_ID_PHILIPS,
6945 .device = PCI_DEVICE_ID_PHILIPS_SAA7133,
6946 .subvendor = 0x6000,
6947 .subdevice = 0x0911,
6948 .driver_data = SAA7134_BOARD_SENSORAY811_911,
6949 }, {
6917 /* --- boards without eeprom + subsystem ID --- */ 6950 /* --- boards without eeprom + subsystem ID --- */
6918 .vendor = PCI_VENDOR_ID_PHILIPS, 6951 .vendor = PCI_VENDOR_ID_PHILIPS,
6919 .device = PCI_DEVICE_ID_PHILIPS_SAA7134, 6952 .device = PCI_DEVICE_ID_PHILIPS_SAA7134,
diff --git a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c
index ca65cda3e10..5fbb4e49495 100644
--- a/drivers/media/video/saa7134/saa7134-core.c
+++ b/drivers/media/video/saa7134/saa7134-core.c
@@ -1263,7 +1263,6 @@ static int saa7134_resume(struct pci_dev *pci_dev)
1263 saa7134_tvaudio_setmute(dev); 1263 saa7134_tvaudio_setmute(dev);
1264 saa7134_tvaudio_setvolume(dev, dev->ctl_volume); 1264 saa7134_tvaudio_setvolume(dev, dev->ctl_volume);
1265 saa7134_tvaudio_init(dev); 1265 saa7134_tvaudio_init(dev);
1266 saa7134_tvaudio_do_scan(dev);
1267 saa7134_enable_i2s(dev); 1266 saa7134_enable_i2s(dev);
1268 saa7134_hw_enable2(dev); 1267 saa7134_hw_enable2(dev);
1269 1268
diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c
index 1e4ef166988..089fa0fb5c9 100644
--- a/drivers/media/video/saa7134/saa7134-dvb.c
+++ b/drivers/media/video/saa7134/saa7134-dvb.c
@@ -183,9 +183,9 @@ static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
183 return 0; 183 return 0;
184} 184}
185 185
186static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, 186static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe)
187 struct dvb_frontend_parameters* params)
188{ 187{
188 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
189 u8 off[] = { 0x00, 0xf1}; 189 u8 off[] = { 0x00, 0xf1};
190 u8 on[] = { 0x00, 0x71}; 190 u8 on[] = { 0x00, 0x71};
191 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; 191 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
@@ -196,7 +196,7 @@ static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
196 /* set frequency (mt2050) */ 196 /* set frequency (mt2050) */
197 f.tuner = 0; 197 f.tuner = 0;
198 f.type = V4L2_TUNER_DIGITAL_TV; 198 f.type = V4L2_TUNER_DIGITAL_TV;
199 f.frequency = params->frequency / 1000 * 16 / 1000; 199 f.frequency = c->frequency / 1000 * 16 / 1000;
200 if (fe->ops.i2c_gate_ctrl) 200 if (fe->ops.i2c_gate_ctrl)
201 fe->ops.i2c_gate_ctrl(fe, 1); 201 fe->ops.i2c_gate_ctrl(fe, 1);
202 i2c_transfer(&dev->i2c_adap, &msg, 1); 202 i2c_transfer(&dev->i2c_adap, &msg, 1);
@@ -287,8 +287,9 @@ static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
287 * these tuners are tu1216, td1316(a) 287 * these tuners are tu1216, td1316(a)
288 */ 288 */
289 289
290static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 290static int philips_tda6651_pll_set(struct dvb_frontend *fe)
291{ 291{
292 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
292 struct saa7134_dev *dev = fe->dvb->priv; 293 struct saa7134_dev *dev = fe->dvb->priv;
293 struct tda1004x_state *state = fe->demodulator_priv; 294 struct tda1004x_state *state = fe->demodulator_priv;
294 u8 addr = state->config->tuner_address; 295 u8 addr = state->config->tuner_address;
@@ -299,7 +300,7 @@ static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_
299 u8 band, cp, filter; 300 u8 band, cp, filter;
300 301
301 /* determine charge pump */ 302 /* determine charge pump */
302 tuner_frequency = params->frequency + 36166000; 303 tuner_frequency = c->frequency + 36166000;
303 if (tuner_frequency < 87000000) 304 if (tuner_frequency < 87000000)
304 return -EINVAL; 305 return -EINVAL;
305 else if (tuner_frequency < 130000000) 306 else if (tuner_frequency < 130000000)
@@ -324,28 +325,28 @@ static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_
324 return -EINVAL; 325 return -EINVAL;
325 326
326 /* determine band */ 327 /* determine band */
327 if (params->frequency < 49000000) 328 if (c->frequency < 49000000)
328 return -EINVAL; 329 return -EINVAL;
329 else if (params->frequency < 161000000) 330 else if (c->frequency < 161000000)
330 band = 1; 331 band = 1;
331 else if (params->frequency < 444000000) 332 else if (c->frequency < 444000000)
332 band = 2; 333 band = 2;
333 else if (params->frequency < 861000000) 334 else if (c->frequency < 861000000)
334 band = 4; 335 band = 4;
335 else 336 else
336 return -EINVAL; 337 return -EINVAL;
337 338
338 /* setup PLL filter */ 339 /* setup PLL filter */
339 switch (params->u.ofdm.bandwidth) { 340 switch (c->bandwidth_hz) {
340 case BANDWIDTH_6_MHZ: 341 case 6000000:
341 filter = 0; 342 filter = 0;
342 break; 343 break;
343 344
344 case BANDWIDTH_7_MHZ: 345 case 7000000:
345 filter = 0; 346 filter = 0;
346 break; 347 break;
347 348
348 case BANDWIDTH_8_MHZ: 349 case 8000000:
349 filter = 1; 350 filter = 1;
350 break; 351 break;
351 352
@@ -356,7 +357,7 @@ static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_
356 /* calculate divisor 357 /* calculate divisor
357 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) 358 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
358 */ 359 */
359 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; 360 tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000;
360 361
361 /* setup tuner buffer */ 362 /* setup tuner buffer */
362 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; 363 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
@@ -436,9 +437,9 @@ static int philips_td1316_tuner_init(struct dvb_frontend *fe)
436 return 0; 437 return 0;
437} 438}
438 439
439static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) 440static int philips_td1316_tuner_set_params(struct dvb_frontend *fe)
440{ 441{
441 return philips_tda6651_pll_set(fe, params); 442 return philips_tda6651_pll_set(fe);
442} 443}
443 444
444static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) 445static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c
index d4ee24bf692..22ecd7297d2 100644
--- a/drivers/media/video/saa7134/saa7134-input.c
+++ b/drivers/media/video/saa7134/saa7134-input.c
@@ -235,22 +235,25 @@ static int get_key_purpletv(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
235 235
236static int get_key_hvr1110(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) 236static int get_key_hvr1110(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
237{ 237{
238 unsigned char buf[5], cod4, code3, code4; 238 unsigned char buf[5];
239 239
240 /* poll IR chip */ 240 /* poll IR chip */
241 if (5 != i2c_master_recv(ir->c, buf, 5)) 241 if (5 != i2c_master_recv(ir->c, buf, 5))
242 return -EIO; 242 return -EIO;
243 243
244 cod4 = buf[4]; 244 /* Check if some key were pressed */
245 code4 = (cod4 >> 2); 245 if (!(buf[0] & 0x80))
246 code3 = buf[3];
247 if (code3 == 0)
248 /* no key pressed */
249 return 0; 246 return 0;
250 247
251 /* return key */ 248 /*
252 *ir_key = code4; 249 * buf[3] & 0x80 is always high.
253 *ir_raw = code4; 250 * buf[3] & 0x40 is a parity bit. A repeat event is marked
251 * by preserving it into two separate readings
252 * buf[4] bits 0 and 1, and buf[1] and buf[2] are always
253 * zero.
254 */
255 *ir_key = 0x1fff & ((buf[3] << 8) | (buf[4] >> 2));
256 *ir_raw = *ir_key;
254 return 1; 257 return 1;
255} 258}
256 259
@@ -752,7 +755,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
752 polling = 50; /* ms */ 755 polling = 50; /* ms */
753 break; 756 break;
754 case SAA7134_BOARD_VIDEOMATE_M1F: 757 case SAA7134_BOARD_VIDEOMATE_M1F:
755 ir_codes = RC_MAP_VIDEOMATE_M1F; 758 ir_codes = RC_MAP_VIDEOMATE_K100;
756 mask_keycode = 0x0ff00; 759 mask_keycode = 0x0ff00;
757 mask_keyup = 0x040000; 760 mask_keyup = 0x040000;
758 break; 761 break;
diff --git a/drivers/media/video/saa7134/saa7134-tvaudio.c b/drivers/media/video/saa7134/saa7134-tvaudio.c
index 57e646bb48b..b7a99bee2f9 100644
--- a/drivers/media/video/saa7134/saa7134-tvaudio.c
+++ b/drivers/media/video/saa7134/saa7134-tvaudio.c
@@ -332,6 +332,13 @@ static int tvaudio_checkcarrier(struct saa7134_dev *dev, struct mainscan *scan)
332{ 332{
333 __s32 left,right,value; 333 __s32 left,right,value;
334 334
335 if (!(dev->tvnorm->id & scan->std)) {
336 value = 0;
337 dprintk("skipping %d.%03d MHz [%4s]\n",
338 scan->carr / 1000, scan->carr % 1000, scan->name);
339 return 0;
340 }
341
335 if (audio_debug > 1) { 342 if (audio_debug > 1) {
336 int i; 343 int i;
337 dprintk("debug %d:",scan->carr); 344 dprintk("debug %d:",scan->carr);
@@ -348,30 +355,25 @@ static int tvaudio_checkcarrier(struct saa7134_dev *dev, struct mainscan *scan)
348 } 355 }
349 printk("\n"); 356 printk("\n");
350 } 357 }
351 if (dev->tvnorm->id & scan->std) { 358
352 tvaudio_setcarrier(dev,scan->carr-90,scan->carr-90); 359 tvaudio_setcarrier(dev,scan->carr-90,scan->carr-90);
353 saa_readl(SAA7134_LEVEL_READOUT1 >> 2); 360 saa_readl(SAA7134_LEVEL_READOUT1 >> 2);
354 if (tvaudio_sleep(dev,SCAN_SAMPLE_DELAY)) 361 if (tvaudio_sleep(dev,SCAN_SAMPLE_DELAY))
355 return -1; 362 return -1;
356 left = saa_readl(SAA7134_LEVEL_READOUT1 >> 2); 363 left = saa_readl(SAA7134_LEVEL_READOUT1 >> 2);
357 364
358 tvaudio_setcarrier(dev,scan->carr+90,scan->carr+90); 365 tvaudio_setcarrier(dev,scan->carr+90,scan->carr+90);
359 saa_readl(SAA7134_LEVEL_READOUT1 >> 2); 366 saa_readl(SAA7134_LEVEL_READOUT1 >> 2);
360 if (tvaudio_sleep(dev,SCAN_SAMPLE_DELAY)) 367 if (tvaudio_sleep(dev,SCAN_SAMPLE_DELAY))
361 return -1; 368 return -1;
362 right = saa_readl(SAA7134_LEVEL_READOUT1 >> 2); 369 right = saa_readl(SAA7134_LEVEL_READOUT1 >> 2);
363 370
364 left >>= 16; 371 left >>= 16;
365 right >>= 16; 372 right >>= 16;
366 value = left > right ? left - right : right - left; 373 value = left > right ? left - right : right - left;
367 dprintk("scanning %d.%03d MHz [%4s] => dc is %5d [%d/%d]\n", 374 dprintk("scanning %d.%03d MHz [%4s] => dc is %5d [%d/%d]\n",
368 scan->carr / 1000, scan->carr % 1000, 375 scan->carr / 1000, scan->carr % 1000,
369 scan->name, value, left, right); 376 scan->name, value, left, right);
370 } else {
371 value = 0;
372 dprintk("skipping %d.%03d MHz [%4s]\n",
373 scan->carr / 1000, scan->carr % 1000, scan->name);
374 }
375 return value; 377 return value;
376} 378}
377 379
@@ -546,6 +548,7 @@ static int tvaudio_thread(void *data)
546 dev->tvnorm->name, carrier/1000, carrier%1000, 548 dev->tvnorm->name, carrier/1000, carrier%1000,
547 max1, max2); 549 max1, max2);
548 dev->last_carrier = carrier; 550 dev->last_carrier = carrier;
551 dev->automute = 0;
549 552
550 } else if (0 != dev->last_carrier) { 553 } else if (0 != dev->last_carrier) {
551 /* no carrier -- try last detected one as fallback */ 554 /* no carrier -- try last detected one as fallback */
@@ -553,6 +556,7 @@ static int tvaudio_thread(void *data)
553 dprintk("audio carrier scan failed, " 556 dprintk("audio carrier scan failed, "
554 "using %d.%03d MHz [last detected]\n", 557 "using %d.%03d MHz [last detected]\n",
555 carrier/1000, carrier%1000); 558 carrier/1000, carrier%1000);
559 dev->automute = 1;
556 560
557 } else { 561 } else {
558 /* no carrier + no fallback -- use default */ 562 /* no carrier + no fallback -- use default */
@@ -560,9 +564,9 @@ static int tvaudio_thread(void *data)
560 dprintk("audio carrier scan failed, " 564 dprintk("audio carrier scan failed, "
561 "using %d.%03d MHz [default]\n", 565 "using %d.%03d MHz [default]\n",
562 carrier/1000, carrier%1000); 566 carrier/1000, carrier%1000);
567 dev->automute = 1;
563 } 568 }
564 tvaudio_setcarrier(dev,carrier,carrier); 569 tvaudio_setcarrier(dev,carrier,carrier);
565 dev->automute = 0;
566 saa_andorb(SAA7134_STEREO_DAC_OUTPUT_SELECT, 0x30, 0x00); 570 saa_andorb(SAA7134_STEREO_DAC_OUTPUT_SELECT, 0x30, 0x00);
567 saa7134_tvaudio_setmute(dev); 571 saa7134_tvaudio_setmute(dev);
568 /* find the exact tv audio norm */ 572 /* find the exact tv audio norm */
@@ -601,7 +605,7 @@ static int tvaudio_thread(void *data)
601 if (kthread_should_stop()) 605 if (kthread_should_stop())
602 break; 606 break;
603 if (UNSET == dev->thread.mode) { 607 if (UNSET == dev->thread.mode) {
604 rx = tvaudio_getstereo(dev,&tvaudio[i]); 608 rx = tvaudio_getstereo(dev, &tvaudio[audio]);
605 mode = saa7134_tvaudio_rx2mode(rx); 609 mode = saa7134_tvaudio_rx2mode(rx);
606 } else { 610 } else {
607 mode = dev->thread.mode; 611 mode = dev->thread.mode;
@@ -1020,6 +1024,7 @@ int saa7134_tvaudio_init2(struct saa7134_dev *dev)
1020 } 1024 }
1021 1025
1022 dev->thread.thread = NULL; 1026 dev->thread.thread = NULL;
1027 dev->thread.scan1 = dev->thread.scan2 = 0;
1023 if (my_thread) { 1028 if (my_thread) {
1024 saa7134_tvaudio_init(dev); 1029 saa7134_tvaudio_init(dev);
1025 /* start tvaudio thread */ 1030 /* start tvaudio thread */
@@ -1029,13 +1034,19 @@ int saa7134_tvaudio_init2(struct saa7134_dev *dev)
1029 dev->name); 1034 dev->name);
1030 /* XXX: missing error handling here */ 1035 /* XXX: missing error handling here */
1031 } 1036 }
1032 saa7134_tvaudio_do_scan(dev);
1033 } 1037 }
1034 1038
1035 saa7134_enable_i2s(dev); 1039 saa7134_enable_i2s(dev);
1036 return 0; 1040 return 0;
1037} 1041}
1038 1042
1043int saa7134_tvaudio_close(struct saa7134_dev *dev)
1044{
1045 dev->automute = 1;
1046 /* anything else to undo? */
1047 return 0;
1048}
1049
1039int saa7134_tvaudio_fini(struct saa7134_dev *dev) 1050int saa7134_tvaudio_fini(struct saa7134_dev *dev)
1040{ 1051{
1041 /* shutdown tvaudio thread */ 1052 /* shutdown tvaudio thread */
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c
index 9cf7914f6f9..417034eb6ad 100644
--- a/drivers/media/video/saa7134/saa7134-video.c
+++ b/drivers/media/video/saa7134/saa7134-video.c
@@ -1462,6 +1462,8 @@ static int video_release(struct file *file)
1462 struct saa6588_command cmd; 1462 struct saa6588_command cmd;
1463 unsigned long flags; 1463 unsigned long flags;
1464 1464
1465 saa7134_tvaudio_close(dev);
1466
1465 /* turn off overlay */ 1467 /* turn off overlay */
1466 if (res_check(fh, RESOURCE_OVERLAY)) { 1468 if (res_check(fh, RESOURCE_OVERLAY)) {
1467 spin_lock_irqsave(&dev->slock,flags); 1469 spin_lock_irqsave(&dev->slock,flags);
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
index 9b550687213..42fba4f93c7 100644
--- a/drivers/media/video/saa7134/saa7134.h
+++ b/drivers/media/video/saa7134/saa7134.h
@@ -330,6 +330,7 @@ struct saa7134_card_ir {
330#define SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2 185 330#define SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2 185
331#define SAA7134_BOARD_BEHOLD_501 186 331#define SAA7134_BOARD_BEHOLD_501 186
332#define SAA7134_BOARD_BEHOLD_503FM 187 332#define SAA7134_BOARD_BEHOLD_503FM 187
333#define SAA7134_BOARD_SENSORAY811_911 188
333 334
334#define SAA7134_MAXBOARDS 32 335#define SAA7134_MAXBOARDS 32
335#define SAA7134_INPUT_MAX 8 336#define SAA7134_INPUT_MAX 8
@@ -817,6 +818,7 @@ void saa7134_tvaudio_init(struct saa7134_dev *dev);
817int saa7134_tvaudio_init2(struct saa7134_dev *dev); 818int saa7134_tvaudio_init2(struct saa7134_dev *dev);
818int saa7134_tvaudio_fini(struct saa7134_dev *dev); 819int saa7134_tvaudio_fini(struct saa7134_dev *dev);
819int saa7134_tvaudio_do_scan(struct saa7134_dev *dev); 820int saa7134_tvaudio_do_scan(struct saa7134_dev *dev);
821int saa7134_tvaudio_close(struct saa7134_dev *dev);
820 822
821int saa_dsp_writel(struct saa7134_dev *dev, int reg, u32 value); 823int saa_dsp_writel(struct saa7134_dev *dev, int reg, u32 value);
822 824
diff --git a/drivers/media/video/saa7164/saa7164-bus.c b/drivers/media/video/saa7164/saa7164-bus.c
index 466e1b02f91..a7f58a99875 100644
--- a/drivers/media/video/saa7164/saa7164-bus.c
+++ b/drivers/media/video/saa7164/saa7164-bus.c
@@ -149,7 +149,7 @@ int saa7164_bus_set(struct saa7164_dev *dev, struct tmComResInfo* msg,
149 saa7164_bus_verify(dev); 149 saa7164_bus_verify(dev);
150 150
151 msg->size = cpu_to_le16(msg->size); 151 msg->size = cpu_to_le16(msg->size);
152 msg->command = cpu_to_le16(msg->command); 152 msg->command = cpu_to_le32(msg->command);
153 msg->controlselector = cpu_to_le16(msg->controlselector); 153 msg->controlselector = cpu_to_le16(msg->controlselector);
154 154
155 if (msg->size > dev->bus.m_wMaxReqSize) { 155 if (msg->size > dev->bus.m_wMaxReqSize) {
@@ -464,7 +464,7 @@ int saa7164_bus_get(struct saa7164_dev *dev, struct tmComResInfo* msg,
464 464
465peekout: 465peekout:
466 msg->size = le16_to_cpu(msg->size); 466 msg->size = le16_to_cpu(msg->size);
467 msg->command = le16_to_cpu(msg->command); 467 msg->command = le32_to_cpu(msg->command);
468 msg->controlselector = le16_to_cpu(msg->controlselector); 468 msg->controlselector = le16_to_cpu(msg->controlselector);
469 ret = SAA_OK; 469 ret = SAA_OK;
470out: 470out:
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index c51decfcae1..f854d85a387 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -786,8 +786,7 @@ static struct v4l2_subdev *find_bus_subdev(struct sh_mobile_ceu_dev *pcdev,
786 V4L2_MBUS_DATA_ACTIVE_HIGH) 786 V4L2_MBUS_DATA_ACTIVE_HIGH)
787 787
788/* Capture is not running, no interrupts, no locking needed */ 788/* Capture is not running, no interrupts, no locking needed */
789static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, 789static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd)
790 __u32 pixfmt)
791{ 790{
792 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 791 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
793 struct sh_mobile_ceu_dev *pcdev = ici->priv; 792 struct sh_mobile_ceu_dev *pcdev = ici->priv;
@@ -925,11 +924,6 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
925 ceu_write(pcdev, CDOCR, value); 924 ceu_write(pcdev, CDOCR, value);
926 ceu_write(pcdev, CFWCR, 0); /* keep "datafetch firewall" disabled */ 925 ceu_write(pcdev, CFWCR, 0); /* keep "datafetch firewall" disabled */
927 926
928 dev_dbg(icd->parent, "S_FMT successful for %c%c%c%c %ux%u\n",
929 pixfmt & 0xff, (pixfmt >> 8) & 0xff,
930 (pixfmt >> 16) & 0xff, (pixfmt >> 24) & 0xff,
931 icd->user_width, icd->user_height);
932
933 capture_restore(pcdev, capsr); 927 capture_restore(pcdev, capsr);
934 928
935 /* not in bundle mode: skip CBDSR, CDAYR2, CDACR2, CDBYR2, CDBCR2 */ 929 /* not in bundle mode: skip CBDSR, CDAYR2, CDACR2, CDBYR2, CDBCR2 */
@@ -1966,8 +1960,7 @@ static int sh_mobile_ceu_set_livecrop(struct soc_camera_device *icd,
1966 if (!ret) { 1960 if (!ret) {
1967 icd->user_width = out_width & ~3; 1961 icd->user_width = out_width & ~3;
1968 icd->user_height = out_height & ~3; 1962 icd->user_height = out_height & ~3;
1969 ret = sh_mobile_ceu_set_bus_param(icd, 1963 ret = sh_mobile_ceu_set_bus_param(icd);
1970 icd->current_fmt->host_fmt->fourcc);
1971 } 1964 }
1972 } 1965 }
1973 1966
diff --git a/drivers/media/video/sh_mobile_csi2.c b/drivers/media/video/sh_mobile_csi2.c
index 8a652b53ff7..05286500b4d 100644
--- a/drivers/media/video/sh_mobile_csi2.c
+++ b/drivers/media/video/sh_mobile_csi2.c
@@ -390,18 +390,7 @@ static struct platform_driver __refdata sh_csi2_pdrv = {
390 }, 390 },
391}; 391};
392 392
393static int __init sh_csi2_init(void) 393module_platform_driver(sh_csi2_pdrv);
394{
395 return platform_driver_register(&sh_csi2_pdrv);
396}
397
398static void __exit sh_csi2_exit(void)
399{
400 platform_driver_unregister(&sh_csi2_pdrv);
401}
402
403module_init(sh_csi2_init);
404module_exit(sh_csi2_exit);
405 394
406MODULE_DESCRIPTION("SH-Mobile MIPI CSI-2 driver"); 395MODULE_DESCRIPTION("SH-Mobile MIPI CSI-2 driver");
407MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); 396MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index 62e4312515c..b82710745ba 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -487,7 +487,7 @@ static int soc_camera_set_fmt(struct soc_camera_device *icd,
487 icd->user_width, icd->user_height); 487 icd->user_width, icd->user_height);
488 488
489 /* set physical bus parameters */ 489 /* set physical bus parameters */
490 return ici->ops->set_bus_param(icd, pix->pixelformat); 490 return ici->ops->set_bus_param(icd);
491} 491}
492 492
493static int soc_camera_open(struct file *file) 493static int soc_camera_open(struct file *file)
@@ -600,9 +600,9 @@ static int soc_camera_close(struct file *file)
600 pm_runtime_suspend(&icd->vdev->dev); 600 pm_runtime_suspend(&icd->vdev->dev);
601 pm_runtime_disable(&icd->vdev->dev); 601 pm_runtime_disable(&icd->vdev->dev);
602 602
603 ici->ops->remove(icd);
604 if (ici->ops->init_videobuf2) 603 if (ici->ops->init_videobuf2)
605 vb2_queue_release(&icd->vb2_vidq); 604 vb2_queue_release(&icd->vb2_vidq);
605 ici->ops->remove(icd);
606 606
607 soc_camera_power_off(icd, icl); 607 soc_camera_power_off(icd, icl);
608 } 608 }
diff --git a/drivers/media/video/soc_camera_platform.c b/drivers/media/video/soc_camera_platform.c
index 4402a8a74f7..f59ccade07c 100644
--- a/drivers/media/video/soc_camera_platform.c
+++ b/drivers/media/video/soc_camera_platform.c
@@ -189,18 +189,7 @@ static struct platform_driver soc_camera_platform_driver = {
189 .remove = soc_camera_platform_remove, 189 .remove = soc_camera_platform_remove,
190}; 190};
191 191
192static int __init soc_camera_platform_module_init(void) 192module_platform_driver(soc_camera_platform_driver);
193{
194 return platform_driver_register(&soc_camera_platform_driver);
195}
196
197static void __exit soc_camera_platform_module_exit(void)
198{
199 platform_driver_unregister(&soc_camera_platform_driver);
200}
201
202module_init(soc_camera_platform_module_init);
203module_exit(soc_camera_platform_module_exit);
204 193
205MODULE_DESCRIPTION("SoC Camera Platform driver"); 194MODULE_DESCRIPTION("SoC Camera Platform driver");
206MODULE_AUTHOR("Magnus Damm"); 195MODULE_AUTHOR("Magnus Damm");
diff --git a/drivers/media/video/stk-webcam.c b/drivers/media/video/stk-webcam.c
index 3c61aec517a..d427f8436c7 100644
--- a/drivers/media/video/stk-webcam.c
+++ b/drivers/media/video/stk-webcam.c
@@ -377,8 +377,8 @@ static int stk_prepare_iso(struct stk_camera *dev)
377 if (dev->isobufs) 377 if (dev->isobufs)
378 STK_ERROR("isobufs already allocated. Bad\n"); 378 STK_ERROR("isobufs already allocated. Bad\n");
379 else 379 else
380 dev->isobufs = kzalloc(MAX_ISO_BUFS * sizeof(*dev->isobufs), 380 dev->isobufs = kcalloc(MAX_ISO_BUFS, sizeof(*dev->isobufs),
381 GFP_KERNEL); 381 GFP_KERNEL);
382 if (dev->isobufs == NULL) { 382 if (dev->isobufs == NULL) {
383 STK_ERROR("Unable to allocate iso buffers\n"); 383 STK_ERROR("Unable to allocate iso buffers\n");
384 return -ENOMEM; 384 return -ENOMEM;
diff --git a/drivers/media/video/timblogiw.c b/drivers/media/video/timblogiw.c
index a0895bf0748..0a2d75f0406 100644
--- a/drivers/media/video/timblogiw.c
+++ b/drivers/media/video/timblogiw.c
@@ -872,20 +872,7 @@ static struct platform_driver timblogiw_platform_driver = {
872 .remove = __devexit_p(timblogiw_remove), 872 .remove = __devexit_p(timblogiw_remove),
873}; 873};
874 874
875/* Module functions */ 875module_platform_driver(timblogiw_platform_driver);
876
877static int __init timblogiw_init(void)
878{
879 return platform_driver_register(&timblogiw_platform_driver);
880}
881
882static void __exit timblogiw_exit(void)
883{
884 platform_driver_unregister(&timblogiw_platform_driver);
885}
886
887module_init(timblogiw_init);
888module_exit(timblogiw_exit);
889 876
890MODULE_DESCRIPTION(TIMBLOGIWIN_NAME); 877MODULE_DESCRIPTION(TIMBLOGIWIN_NAME);
891MODULE_AUTHOR("Pelagicore AB <info@pelagicore.com>"); 878MODULE_AUTHOR("Pelagicore AB <info@pelagicore.com>");
diff --git a/drivers/media/video/tlg2300/pd-common.h b/drivers/media/video/tlg2300/pd-common.h
index 56564e6aaac..5dd73b7857d 100644
--- a/drivers/media/video/tlg2300/pd-common.h
+++ b/drivers/media/video/tlg2300/pd-common.h
@@ -140,7 +140,7 @@ struct pd_dvb_adapter {
140 u8 reserved[3]; 140 u8 reserved[3];
141 141
142 /* data for power resume*/ 142 /* data for power resume*/
143 struct dvb_frontend_parameters fe_param; 143 struct dtv_frontend_properties fe_param;
144 144
145 /* for channel scanning */ 145 /* for channel scanning */
146 int prev_freq; 146 int prev_freq;
diff --git a/drivers/media/video/tlg2300/pd-dvb.c b/drivers/media/video/tlg2300/pd-dvb.c
index d0da11ae19d..30fcb117e89 100644
--- a/drivers/media/video/tlg2300/pd-dvb.c
+++ b/drivers/media/video/tlg2300/pd-dvb.c
@@ -12,9 +12,9 @@
12static void dvb_urb_cleanup(struct pd_dvb_adapter *pd_dvb); 12static void dvb_urb_cleanup(struct pd_dvb_adapter *pd_dvb);
13 13
14static int dvb_bandwidth[][2] = { 14static int dvb_bandwidth[][2] = {
15 { TLG_BW_8, BANDWIDTH_8_MHZ }, 15 { TLG_BW_8, 8000000 },
16 { TLG_BW_7, BANDWIDTH_7_MHZ }, 16 { TLG_BW_7, 7000000 },
17 { TLG_BW_6, BANDWIDTH_6_MHZ } 17 { TLG_BW_6, 6000000 }
18}; 18};
19static int dvb_bandwidth_length = ARRAY_SIZE(dvb_bandwidth); 19static int dvb_bandwidth_length = ARRAY_SIZE(dvb_bandwidth);
20 20
@@ -146,9 +146,9 @@ static int fw_delay_overflow(struct pd_dvb_adapter *adapter)
146 return msec > 800 ? true : false; 146 return msec > 800 ? true : false;
147} 147}
148 148
149static int poseidon_set_fe(struct dvb_frontend *fe, 149static int poseidon_set_fe(struct dvb_frontend *fe)
150 struct dvb_frontend_parameters *fep)
151{ 150{
151 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
152 s32 ret = 0, cmd_status = 0; 152 s32 ret = 0, cmd_status = 0;
153 s32 i, bandwidth = -1; 153 s32 i, bandwidth = -1;
154 struct poseidon *pd = fe->demodulator_priv; 154 struct poseidon *pd = fe->demodulator_priv;
@@ -159,7 +159,7 @@ static int poseidon_set_fe(struct dvb_frontend *fe,
159 159
160 mutex_lock(&pd->lock); 160 mutex_lock(&pd->lock);
161 for (i = 0; i < dvb_bandwidth_length; i++) 161 for (i = 0; i < dvb_bandwidth_length; i++)
162 if (fep->u.ofdm.bandwidth == dvb_bandwidth[i][1]) 162 if (fep->bandwidth_hz == dvb_bandwidth[i][1])
163 bandwidth = dvb_bandwidth[i][0]; 163 bandwidth = dvb_bandwidth[i][0];
164 164
165 if (check_scan_ok(fep->frequency, bandwidth, pd_dvb)) { 165 if (check_scan_ok(fep->frequency, bandwidth, pd_dvb)) {
@@ -210,7 +210,7 @@ static int pm_dvb_resume(struct poseidon *pd)
210 210
211 poseidon_check_mode_dvbt(pd); 211 poseidon_check_mode_dvbt(pd);
212 msleep(300); 212 msleep(300);
213 poseidon_set_fe(&pd_dvb->dvb_fe, &pd_dvb->fe_param); 213 poseidon_set_fe(&pd_dvb->dvb_fe);
214 214
215 dvb_start_streaming(pd_dvb); 215 dvb_start_streaming(pd_dvb);
216 return 0; 216 return 0;
@@ -227,13 +227,13 @@ static s32 poseidon_fe_init(struct dvb_frontend *fe)
227 pd->pm_resume = pm_dvb_resume; 227 pd->pm_resume = pm_dvb_resume;
228#endif 228#endif
229 memset(&pd_dvb->fe_param, 0, 229 memset(&pd_dvb->fe_param, 0,
230 sizeof(struct dvb_frontend_parameters)); 230 sizeof(struct dtv_frontend_properties));
231 return 0; 231 return 0;
232} 232}
233 233
234static int poseidon_get_fe(struct dvb_frontend *fe, 234static int poseidon_get_fe(struct dvb_frontend *fe)
235 struct dvb_frontend_parameters *fep)
236{ 235{
236 struct dtv_frontend_properties *fep = &fe->dtv_property_cache;
237 struct poseidon *pd = fe->demodulator_priv; 237 struct poseidon *pd = fe->demodulator_priv;
238 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data; 238 struct pd_dvb_adapter *pd_dvb = &pd->dvb_data;
239 239
@@ -332,9 +332,9 @@ static int poseidon_read_unc_blocks(struct dvb_frontend *fe, u32 *unc)
332} 332}
333 333
334static struct dvb_frontend_ops poseidon_frontend_ops = { 334static struct dvb_frontend_ops poseidon_frontend_ops = {
335 .delsys = { SYS_DVBT },
335 .info = { 336 .info = {
336 .name = "Poseidon DVB-T", 337 .name = "Poseidon DVB-T",
337 .type = FE_OFDM,
338 .frequency_min = 174000000, 338 .frequency_min = 174000000,
339 .frequency_max = 862000000, 339 .frequency_max = 862000000,
340 .frequency_stepsize = 62500,/* FIXME */ 340 .frequency_stepsize = 62500,/* FIXME */
diff --git a/drivers/media/video/tm6000/Kconfig b/drivers/media/video/tm6000/Kconfig
index 114eec8a630..a43b77abd93 100644
--- a/drivers/media/video/tm6000/Kconfig
+++ b/drivers/media/video/tm6000/Kconfig
@@ -1,6 +1,6 @@
1config VIDEO_TM6000 1config VIDEO_TM6000
2 tristate "TV Master TM5600/6000/6010 driver" 2 tristate "TV Master TM5600/6000/6010 driver"
3 depends on VIDEO_DEV && I2C && INPUT && RC_CORE && USB && EXPERIMENTAL 3 depends on VIDEO_DEV && I2C && INPUT && RC_CORE && USB
4 select VIDEO_TUNER 4 select VIDEO_TUNER
5 select MEDIA_TUNER_XC2028 5 select MEDIA_TUNER_XC2028
6 select MEDIA_TUNER_XC5000 6 select MEDIA_TUNER_XC5000
@@ -16,7 +16,7 @@ config VIDEO_TM6000
16 16
17config VIDEO_TM6000_ALSA 17config VIDEO_TM6000_ALSA
18 tristate "TV Master TM5600/6000/6010 audio support" 18 tristate "TV Master TM5600/6000/6010 audio support"
19 depends on VIDEO_TM6000 && SND && EXPERIMENTAL 19 depends on VIDEO_TM6000 && SND
20 select SND_PCM 20 select SND_PCM
21 ---help--- 21 ---help---
22 This is a video4linux driver for direct (DMA) audio for 22 This is a video4linux driver for direct (DMA) audio for
@@ -27,7 +27,7 @@ config VIDEO_TM6000_ALSA
27 27
28config VIDEO_TM6000_DVB 28config VIDEO_TM6000_DVB
29 tristate "DVB Support for tm6000 based TV cards" 29 tristate "DVB Support for tm6000 based TV cards"
30 depends on VIDEO_TM6000 && DVB_CORE && USB && EXPERIMENTAL 30 depends on VIDEO_TM6000 && DVB_CORE && USB
31 select DVB_ZL10353 31 select DVB_ZL10353
32 ---help--- 32 ---help---
33 This adds support for DVB cards based on the tm5600/tm6000 chip. 33 This adds support for DVB cards based on the tm5600/tm6000 chip.
diff --git a/drivers/media/video/tm6000/tm6000-alsa.c b/drivers/media/video/tm6000/tm6000-alsa.c
index bb2047c1035..bd07ec70795 100644
--- a/drivers/media/video/tm6000/tm6000-alsa.c
+++ b/drivers/media/video/tm6000/tm6000-alsa.c
@@ -146,20 +146,21 @@ static int dsp_buffer_alloc(struct snd_pcm_substream *substream, int size)
146#define DEFAULT_FIFO_SIZE 4096 146#define DEFAULT_FIFO_SIZE 4096
147 147
148static struct snd_pcm_hardware snd_tm6000_digital_hw = { 148static struct snd_pcm_hardware snd_tm6000_digital_hw = {
149 .info = SNDRV_PCM_INFO_MMAP | 149 .info = SNDRV_PCM_INFO_BATCH |
150 SNDRV_PCM_INFO_MMAP |
150 SNDRV_PCM_INFO_INTERLEAVED | 151 SNDRV_PCM_INFO_INTERLEAVED |
151 SNDRV_PCM_INFO_BLOCK_TRANSFER | 152 SNDRV_PCM_INFO_BLOCK_TRANSFER |
152 SNDRV_PCM_INFO_MMAP_VALID, 153 SNDRV_PCM_INFO_MMAP_VALID,
153 .formats = SNDRV_PCM_FMTBIT_S16_LE, 154 .formats = SNDRV_PCM_FMTBIT_S16_LE,
154 155
155 .rates = SNDRV_PCM_RATE_CONTINUOUS, 156 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_KNOT,
156 .rate_min = 48000, 157 .rate_min = 48000,
157 .rate_max = 48000, 158 .rate_max = 48000,
158 .channels_min = 2, 159 .channels_min = 2,
159 .channels_max = 2, 160 .channels_max = 2,
160 .period_bytes_min = 64, 161 .period_bytes_min = 64,
161 .period_bytes_max = 12544, 162 .period_bytes_max = 12544,
162 .periods_min = 1, 163 .periods_min = 2,
163 .periods_max = 98, 164 .periods_max = 98,
164 .buffer_bytes_max = 62720 * 8, 165 .buffer_bytes_max = 62720 * 8,
165}; 166};
@@ -181,6 +182,7 @@ static int snd_tm6000_pcm_open(struct snd_pcm_substream *substream)
181 chip->substream = substream; 182 chip->substream = substream;
182 183
183 runtime->hw = snd_tm6000_digital_hw; 184 runtime->hw = snd_tm6000_digital_hw;
185 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
184 186
185 return 0; 187 return 0;
186_error: 188_error:
@@ -347,9 +349,13 @@ static int snd_tm6000_card_trigger(struct snd_pcm_substream *substream, int cmd)
347 int err = 0; 349 int err = 0;
348 350
349 switch (cmd) { 351 switch (cmd) {
352 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
353 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
350 case SNDRV_PCM_TRIGGER_START: 354 case SNDRV_PCM_TRIGGER_START:
351 atomic_set(&core->stream_started, 1); 355 atomic_set(&core->stream_started, 1);
352 break; 356 break;
357 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
358 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
353 case SNDRV_PCM_TRIGGER_STOP: 359 case SNDRV_PCM_TRIGGER_STOP:
354 atomic_set(&core->stream_started, 0); 360 atomic_set(&core->stream_started, 0);
355 break; 361 break;
@@ -371,6 +377,14 @@ static snd_pcm_uframes_t snd_tm6000_pointer(struct snd_pcm_substream *substream)
371 return chip->buf_pos; 377 return chip->buf_pos;
372} 378}
373 379
380static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs,
381 unsigned long offset)
382{
383 void *pageptr = subs->runtime->dma_area + offset;
384
385 return vmalloc_to_page(pageptr);
386}
387
374/* 388/*
375 * operators 389 * operators
376 */ 390 */
@@ -383,6 +397,7 @@ static struct snd_pcm_ops snd_tm6000_pcm_ops = {
383 .prepare = snd_tm6000_prepare, 397 .prepare = snd_tm6000_prepare,
384 .trigger = snd_tm6000_card_trigger, 398 .trigger = snd_tm6000_card_trigger,
385 .pointer = snd_tm6000_pointer, 399 .pointer = snd_tm6000_pointer,
400 .page = snd_pcm_get_vmalloc_page,
386}; 401};
387 402
388/* 403/*
diff --git a/drivers/media/video/tm6000/tm6000-cards.c b/drivers/media/video/tm6000/tm6000-cards.c
index ff939bc0e0b..034659b1317 100644
--- a/drivers/media/video/tm6000/tm6000-cards.c
+++ b/drivers/media/video/tm6000/tm6000-cards.c
@@ -351,6 +351,7 @@ static struct tm6000_board tm6000_boards[] = {
351 .tuner_addr = 0xc2 >> 1, 351 .tuner_addr = 0xc2 >> 1,
352 .demod_addr = 0x1e >> 1, 352 .demod_addr = 0x1e >> 1,
353 .type = TM6010, 353 .type = TM6010,
354 .ir_codes = RC_MAP_HAUPPAUGE,
354 .caps = { 355 .caps = {
355 .has_tuner = 1, 356 .has_tuner = 1,
356 .has_dvb = 1, 357 .has_dvb = 1,
@@ -639,6 +640,7 @@ static struct usb_device_id tm6000_id_table[] = {
639 { USB_DEVICE(0x6000, 0xdec3), .driver_info = TM6010_BOARD_BEHOLD_VOYAGER_LITE }, 640 { USB_DEVICE(0x6000, 0xdec3), .driver_info = TM6010_BOARD_BEHOLD_VOYAGER_LITE },
640 { } 641 { }
641}; 642};
643MODULE_DEVICE_TABLE(usb, tm6000_id_table);
642 644
643/* Control power led for show some activity */ 645/* Control power led for show some activity */
644void tm6000_flash_led(struct tm6000_core *dev, u8 state) 646void tm6000_flash_led(struct tm6000_core *dev, u8 state)
@@ -941,6 +943,7 @@ static void tm6000_config_tuner(struct tm6000_core *dev)
941 case TM6010_BOARD_HAUPPAUGE_900H: 943 case TM6010_BOARD_HAUPPAUGE_900H:
942 case TM6010_BOARD_TERRATEC_CINERGY_HYBRID_XE: 944 case TM6010_BOARD_TERRATEC_CINERGY_HYBRID_XE:
943 case TM6010_BOARD_TWINHAN_TU501: 945 case TM6010_BOARD_TWINHAN_TU501:
946 ctl.max_len = 80;
944 ctl.fname = "xc3028L-v36.fw"; 947 ctl.fname = "xc3028L-v36.fw";
945 break; 948 break;
946 default: 949 default:
@@ -1002,6 +1005,7 @@ static int fill_board_specific_data(struct tm6000_core *dev)
1002 /* setup per-model quirks */ 1005 /* setup per-model quirks */
1003 switch (dev->model) { 1006 switch (dev->model) {
1004 case TM6010_BOARD_TERRATEC_CINERGY_HYBRID_XE: 1007 case TM6010_BOARD_TERRATEC_CINERGY_HYBRID_XE:
1008 case TM6010_BOARD_HAUPPAUGE_900H:
1005 dev->quirks |= TM6000_QUIRK_NO_USB_DELAY; 1009 dev->quirks |= TM6000_QUIRK_NO_USB_DELAY;
1006 break; 1010 break;
1007 1011
@@ -1050,6 +1054,33 @@ static void use_alternative_detection_method(struct tm6000_core *dev)
1050 tm6000_boards[model].name, model); 1054 tm6000_boards[model].name, model);
1051} 1055}
1052 1056
1057#if defined(CONFIG_MODULES) && defined(MODULE)
1058static void request_module_async(struct work_struct *work)
1059{
1060 struct tm6000_core *dev = container_of(work, struct tm6000_core,
1061 request_module_wk);
1062
1063 request_module("tm6000-alsa");
1064
1065 if (dev->caps.has_dvb)
1066 request_module("tm6000-dvb");
1067}
1068
1069static void request_modules(struct tm6000_core *dev)
1070{
1071 INIT_WORK(&dev->request_module_wk, request_module_async);
1072 schedule_work(&dev->request_module_wk);
1073}
1074
1075static void flush_request_modules(struct tm6000_core *dev)
1076{
1077 flush_work_sync(&dev->request_module_wk);
1078}
1079#else
1080#define request_modules(dev)
1081#define flush_request_modules(dev)
1082#endif /* CONFIG_MODULES */
1083
1053static int tm6000_init_dev(struct tm6000_core *dev) 1084static int tm6000_init_dev(struct tm6000_core *dev)
1054{ 1085{
1055 struct v4l2_frequency f; 1086 struct v4l2_frequency f;
@@ -1112,6 +1143,8 @@ static int tm6000_init_dev(struct tm6000_core *dev)
1112 1143
1113 tm6000_ir_init(dev); 1144 tm6000_ir_init(dev);
1114 1145
1146 request_modules(dev);
1147
1115 mutex_unlock(&dev->lock); 1148 mutex_unlock(&dev->lock);
1116 return 0; 1149 return 0;
1117 1150
@@ -1324,6 +1357,8 @@ static void tm6000_usb_disconnect(struct usb_interface *interface)
1324 1357
1325 printk(KERN_INFO "tm6000: disconnecting %s\n", dev->name); 1358 printk(KERN_INFO "tm6000: disconnecting %s\n", dev->name);
1326 1359
1360 flush_request_modules(dev);
1361
1327 tm6000_ir_fini(dev); 1362 tm6000_ir_fini(dev);
1328 1363
1329 if (dev->gpio.power_led) { 1364 if (dev->gpio.power_led) {
diff --git a/drivers/media/video/tm6000/tm6000-core.c b/drivers/media/video/tm6000/tm6000-core.c
index 9783616a0da..22cc0116deb 100644
--- a/drivers/media/video/tm6000/tm6000-core.c
+++ b/drivers/media/video/tm6000/tm6000-core.c
@@ -38,6 +38,7 @@ int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
38 int ret, i; 38 int ret, i;
39 unsigned int pipe; 39 unsigned int pipe;
40 u8 *data = NULL; 40 u8 *data = NULL;
41 int delay = 5000;
41 42
42 mutex_lock(&dev->usb_lock); 43 mutex_lock(&dev->usb_lock);
43 44
@@ -88,7 +89,20 @@ int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
88 } 89 }
89 90
90 kfree(data); 91 kfree(data);
91 msleep(5); 92
93 if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY)
94 delay = 0;
95
96 if (req == REQ_16_SET_GET_I2C_WR1_RDN && !(req_type & USB_DIR_IN)) {
97 unsigned int tsleep;
98 /* Calculate delay time, 14000us for 64 bytes */
99 tsleep = (len * 200) + 200;
100 if (tsleep < delay)
101 tsleep = delay;
102 usleep_range(tsleep, tsleep + 1000);
103 }
104 else if (delay)
105 usleep_range(delay, delay + 1000);
92 106
93 mutex_unlock(&dev->usb_lock); 107 mutex_unlock(&dev->usb_lock);
94 return ret; 108 return ret;
@@ -125,14 +139,14 @@ int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
125 u8 new_index; 139 u8 new_index;
126 140
127 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req, 141 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
128 value, index, buf, 1); 142 value, 0, buf, 1);
129 143
130 if (rc < 0) 144 if (rc < 0)
131 return rc; 145 return rc;
132 146
133 new_index = (buf[0] & ~mask) | (index & mask); 147 new_index = (buf[0] & ~mask) | (index & mask);
134 148
135 if (new_index == index) 149 if (new_index == buf[0])
136 return 0; 150 return 0;
137 151
138 return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR, 152 return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
@@ -536,16 +550,16 @@ static struct reg_init tm6010_init_tab[] = {
536 550
537 { TM6010_REQ05_R18_IMASK7, 0x00 }, 551 { TM6010_REQ05_R18_IMASK7, 0x00 },
538 552
539 { TM6010_REQ07_RD8_IR_LEADER1, 0xaa }, 553 { TM6010_REQ07_RDC_IR_LEADER1, 0xaa },
540 { TM6010_REQ07_RD8_IR_LEADER0, 0x30 }, 554 { TM6010_REQ07_RDD_IR_LEADER0, 0x30 },
541 { TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20 }, 555 { TM6010_REQ07_RDE_IR_PULSE_CNT1, 0x20 },
542 { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0 }, 556 { TM6010_REQ07_RDF_IR_PULSE_CNT0, 0xd0 },
543 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 }, 557 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
544 { TM6010_REQ07_RD8_IR, 0x2f }, 558 { TM6010_REQ07_RD8_IR, 0x0f },
545 559
546 /* set remote wakeup key:any key wakeup */ 560 /* set remote wakeup key:any key wakeup */
547 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe }, 561 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
548 { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff }, 562 { TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff },
549}; 563};
550 564
551int tm6000_init(struct tm6000_core *dev) 565int tm6000_init(struct tm6000_core *dev)
@@ -599,55 +613,6 @@ int tm6000_init(struct tm6000_core *dev)
599 return rc; 613 return rc;
600} 614}
601 615
602int tm6000_reset(struct tm6000_core *dev)
603{
604 int pipe;
605 int err;
606
607 msleep(500);
608
609 err = usb_set_interface(dev->udev, dev->isoc_in.bInterfaceNumber, 0);
610 if (err < 0) {
611 tm6000_err("failed to select interface %d, alt. setting 0\n",
612 dev->isoc_in.bInterfaceNumber);
613 return err;
614 }
615
616 err = usb_reset_configuration(dev->udev);
617 if (err < 0) {
618 tm6000_err("failed to reset configuration\n");
619 return err;
620 }
621
622 if ((dev->quirks & TM6000_QUIRK_NO_USB_DELAY) == 0)
623 msleep(5);
624
625 /*
626 * Not all devices have int_in defined
627 */
628 if (!dev->int_in.endp)
629 return 0;
630
631 err = usb_set_interface(dev->udev, dev->isoc_in.bInterfaceNumber, 2);
632 if (err < 0) {
633 tm6000_err("failed to select interface %d, alt. setting 2\n",
634 dev->isoc_in.bInterfaceNumber);
635 return err;
636 }
637
638 msleep(5);
639
640 pipe = usb_rcvintpipe(dev->udev,
641 dev->int_in.endp->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
642
643 err = usb_clear_halt(dev->udev, pipe);
644 if (err < 0) {
645 tm6000_err("usb_clear_halt failed: %d\n", err);
646 return err;
647 }
648
649 return 0;
650}
651 616
652int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate) 617int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
653{ 618{
@@ -696,11 +661,13 @@ int tm6000_set_audio_rinput(struct tm6000_core *dev)
696 if (dev->dev_type == TM6010) { 661 if (dev->dev_type == TM6010) {
697 /* Audio crossbar setting, default SIF1 */ 662 /* Audio crossbar setting, default SIF1 */
698 u8 areg_f0; 663 u8 areg_f0;
664 u8 areg_07 = 0x10;
699 665
700 switch (dev->rinput.amux) { 666 switch (dev->rinput.amux) {
701 case TM6000_AMUX_SIF1: 667 case TM6000_AMUX_SIF1:
702 case TM6000_AMUX_SIF2: 668 case TM6000_AMUX_SIF2:
703 areg_f0 = 0x03; 669 areg_f0 = 0x03;
670 areg_07 = 0x30;
704 break; 671 break;
705 case TM6000_AMUX_ADC1: 672 case TM6000_AMUX_ADC1:
706 areg_f0 = 0x00; 673 areg_f0 = 0x00;
@@ -720,6 +687,9 @@ int tm6000_set_audio_rinput(struct tm6000_core *dev)
720 /* Set audio input crossbar */ 687 /* Set audio input crossbar */
721 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 688 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
722 areg_f0, 0x0f); 689 areg_f0, 0x0f);
690 /* Mux overflow workaround */
691 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
692 areg_07, 0xf0);
723 } else { 693 } else {
724 u8 areg_eb; 694 u8 areg_eb;
725 /* Audio setting, default LINE1 */ 695 /* Audio setting, default LINE1 */
diff --git a/drivers/media/video/tm6000/tm6000-dvb.c b/drivers/media/video/tm6000/tm6000-dvb.c
index 5e6c129a4be..e1f3f66e1e6 100644
--- a/drivers/media/video/tm6000/tm6000-dvb.c
+++ b/drivers/media/video/tm6000/tm6000-dvb.c
@@ -89,9 +89,19 @@ static void tm6000_urb_received(struct urb *urb)
89 int ret; 89 int ret;
90 struct tm6000_core *dev = urb->context; 90 struct tm6000_core *dev = urb->context;
91 91
92 if (urb->status != 0) 92 switch (urb->status) {
93 case 0:
94 case -ETIMEDOUT:
95 break;
96 case -ENOENT:
97 case -ECONNRESET:
98 case -ESHUTDOWN:
99 return;
100 default:
93 print_err_status(dev, 0, urb->status); 101 print_err_status(dev, 0, urb->status);
94 else if (urb->actual_length > 0) 102 }
103
104 if (urb->actual_length > 0)
95 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer, 105 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer,
96 urb->actual_length); 106 urb->actual_length);
97 107
@@ -151,7 +161,7 @@ static int tm6000_start_stream(struct tm6000_core *dev)
151 printk(KERN_ERR "tm6000: pipe resetted\n"); 161 printk(KERN_ERR "tm6000: pipe resetted\n");
152 162
153/* mutex_lock(&tm6000_driver.open_close_mutex); */ 163/* mutex_lock(&tm6000_driver.open_close_mutex); */
154 ret = usb_submit_urb(dvb->bulk_urb, GFP_KERNEL); 164 ret = usb_submit_urb(dvb->bulk_urb, GFP_ATOMIC);
155 165
156/* mutex_unlock(&tm6000_driver.open_close_mutex); */ 166/* mutex_unlock(&tm6000_driver.open_close_mutex); */
157 if (ret) { 167 if (ret) {
@@ -396,6 +406,11 @@ static int dvb_init(struct tm6000_core *dev)
396 if (!dev->caps.has_dvb) 406 if (!dev->caps.has_dvb)
397 return 0; 407 return 0;
398 408
409 if (dev->udev->speed == USB_SPEED_FULL) {
410 printk(KERN_INFO "This USB2.0 device cannot be run on a USB1.1 port. (it lacks a hardware PID filter)\n");
411 return 0;
412 }
413
399 dvb = kzalloc(sizeof(struct tm6000_dvb), GFP_KERNEL); 414 dvb = kzalloc(sizeof(struct tm6000_dvb), GFP_KERNEL);
400 if (!dvb) { 415 if (!dvb) {
401 printk(KERN_INFO "Cannot allocate memory\n"); 416 printk(KERN_INFO "Cannot allocate memory\n");
diff --git a/drivers/media/video/tm6000/tm6000-i2c.c b/drivers/media/video/tm6000/tm6000-i2c.c
index 0290bbf00c3..c7e23e3dd75 100644
--- a/drivers/media/video/tm6000/tm6000-i2c.c
+++ b/drivers/media/video/tm6000/tm6000-i2c.c
@@ -46,11 +46,10 @@ static int tm6000_i2c_send_regs(struct tm6000_core *dev, unsigned char addr,
46 __u8 reg, char *buf, int len) 46 __u8 reg, char *buf, int len)
47{ 47{
48 int rc; 48 int rc;
49 unsigned int tsleep;
50 unsigned int i2c_packet_limit = 16; 49 unsigned int i2c_packet_limit = 16;
51 50
52 if (dev->dev_type == TM6010) 51 if (dev->dev_type == TM6010)
53 i2c_packet_limit = 64; 52 i2c_packet_limit = 80;
54 53
55 if (!buf) 54 if (!buf)
56 return -1; 55 return -1;
@@ -71,10 +70,6 @@ static int tm6000_i2c_send_regs(struct tm6000_core *dev, unsigned char addr,
71 return rc; 70 return rc;
72 } 71 }
73 72
74 /* Calculate delay time, 14000us for 64 bytes */
75 tsleep = ((len * 200) + 200 + 1000) / 1000;
76 msleep(tsleep);
77
78 /* release mutex */ 73 /* release mutex */
79 return rc; 74 return rc;
80} 75}
@@ -145,7 +140,6 @@ static int tm6000_i2c_recv_regs16(struct tm6000_core *dev, unsigned char addr,
145 return rc; 140 return rc;
146 } 141 }
147 142
148 msleep(1400 / 1000);
149 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR | 143 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR |
150 USB_RECIP_DEVICE, REQ_35_AFTEK_TUNER_READ, 144 USB_RECIP_DEVICE, REQ_35_AFTEK_TUNER_READ,
151 reg, 0, buf, len); 145 reg, 0, buf, len);
diff --git a/drivers/media/video/tm6000/tm6000-input.c b/drivers/media/video/tm6000/tm6000-input.c
index 405d12729d0..7844607dd45 100644
--- a/drivers/media/video/tm6000/tm6000-input.c
+++ b/drivers/media/video/tm6000/tm6000-input.c
@@ -31,22 +31,25 @@
31 31
32static unsigned int ir_debug; 32static unsigned int ir_debug;
33module_param(ir_debug, int, 0644); 33module_param(ir_debug, int, 0644);
34MODULE_PARM_DESC(ir_debug, "enable debug message [IR]"); 34MODULE_PARM_DESC(ir_debug, "debug message level");
35 35
36static unsigned int enable_ir = 1; 36static unsigned int enable_ir = 1;
37module_param(enable_ir, int, 0644); 37module_param(enable_ir, int, 0644);
38MODULE_PARM_DESC(enable_ir, "enable ir (default is enable)"); 38MODULE_PARM_DESC(enable_ir, "enable ir (default is enable)");
39 39
40/* number of 50ms for ON-OFF-ON power led */ 40static unsigned int ir_clock_mhz = 12;
41/* show IR activity */ 41module_param(ir_clock_mhz, int, 0644);
42#define PWLED_OFF 2 42MODULE_PARM_DESC(enable_ir, "ir clock, in MHz");
43
44#define URB_SUBMIT_DELAY 100 /* ms - Delay to submit an URB request on retrial and init */
45#define URB_INT_LED_DELAY 100 /* ms - Delay to turn led on again on int mode */
43 46
44#undef dprintk 47#undef dprintk
45 48
46#define dprintk(fmt, arg...) \ 49#define dprintk(level, fmt, arg...) do {\
47 if (ir_debug) { \ 50 if (ir_debug >= level) \
48 printk(KERN_DEBUG "%s/ir: " fmt, ir->name , ## arg); \ 51 printk(KERN_DEBUG "%s/ir: " fmt, ir->name , ## arg); \
49 } 52 } while (0)
50 53
51struct tm6000_ir_poll_result { 54struct tm6000_ir_poll_result {
52 u16 rc_data; 55 u16 rc_data;
@@ -62,20 +65,15 @@ struct tm6000_IR {
62 int polling; 65 int polling;
63 struct delayed_work work; 66 struct delayed_work work;
64 u8 wait:1; 67 u8 wait:1;
65 u8 key:1; 68 u8 pwled:2;
66 u8 pwled:1; 69 u8 submit_urb:1;
67 u8 pwledcnt;
68 u16 key_addr; 70 u16 key_addr;
69 struct urb *int_urb; 71 struct urb *int_urb;
70 u8 *urb_data;
71
72 int (*get_key) (struct tm6000_IR *, struct tm6000_ir_poll_result *);
73 72
74 /* IR device properties */ 73 /* IR device properties */
75 u64 rc_type; 74 u64 rc_type;
76}; 75};
77 76
78
79void tm6000_ir_wait(struct tm6000_core *dev, u8 state) 77void tm6000_ir_wait(struct tm6000_core *dev, u8 state)
80{ 78{
81 struct tm6000_IR *ir = dev->ir; 79 struct tm6000_IR *ir = dev->ir;
@@ -83,62 +81,84 @@ void tm6000_ir_wait(struct tm6000_core *dev, u8 state)
83 if (!dev->ir) 81 if (!dev->ir)
84 return; 82 return;
85 83
84 dprintk(2, "%s: %i\n",__func__, ir->wait);
85
86 if (state) 86 if (state)
87 ir->wait = 1; 87 ir->wait = 1;
88 else 88 else
89 ir->wait = 0; 89 ir->wait = 0;
90} 90}
91 91
92
93static int tm6000_ir_config(struct tm6000_IR *ir) 92static int tm6000_ir_config(struct tm6000_IR *ir)
94{ 93{
95 struct tm6000_core *dev = ir->dev; 94 struct tm6000_core *dev = ir->dev;
96 u8 buf[10]; 95 u32 pulse = 0, leader = 0;
97 int rc; 96
97 dprintk(2, "%s\n",__func__);
98
99 /*
100 * The IR decoder supports RC-5 or NEC, with a configurable timing.
101 * The timing configuration there is not that accurate, as it uses
102 * approximate values. The NEC spec mentions a 562.5 unit period,
103 * and RC-5 uses a 888.8 period.
104 * Currently, driver assumes a clock provided by a 12 MHz XTAL, but
105 * a modprobe parameter can adjust it.
106 * Adjustments are required for other timings.
107 * It seems that the 900ms timing for NEC is used to detect a RC-5
108 * IR, in order to discard such decoding
109 */
98 110
99 switch (ir->rc_type) { 111 switch (ir->rc_type) {
100 case RC_TYPE_NEC: 112 case RC_TYPE_NEC:
101 /* Setup IR decoder for NEC standard 12MHz system clock */ 113 leader = 900; /* ms */
102 /* IR_LEADER_CNT = 0.9ms */ 114 pulse = 700; /* ms - the actual value would be 562 */
103 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_LEADER1, 0xaa);
104 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_LEADER0, 0x30);
105 /* IR_PULSE_CNT = 0.7ms */
106 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20);
107 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0);
108 /* Remote WAKEUP = enable */
109 tm6000_set_reg(dev, TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe);
110 /* IR_WKUP_SEL = Low byte in decoded IR data */
111 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff);
112 /* IR_WKU_ADD code */
113 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_ADD, 0xff);
114 tm6000_flash_led(dev, 0);
115 msleep(100);
116 tm6000_flash_led(dev, 1);
117 break; 115 break;
118 default: 116 default:
119 /* hack */ 117 case RC_TYPE_RC5:
120 buf[0] = 0xff; 118 leader = 900; /* ms - from the NEC decoding */
121 buf[1] = 0xff; 119 pulse = 1780; /* ms - The actual value would be 1776 */
122 buf[2] = 0xf2;
123 buf[3] = 0x2b;
124 buf[4] = 0x20;
125 buf[5] = 0x35;
126 buf[6] = 0x60;
127 buf[7] = 0x04;
128 buf[8] = 0xc0;
129 buf[9] = 0x08;
130
131 rc = tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR |
132 USB_RECIP_DEVICE, REQ_00_SET_IR_VALUE, 0, 0, buf, 0x0a);
133 msleep(100);
134
135 if (rc < 0) {
136 printk(KERN_INFO "IR configuration failed");
137 return rc;
138 }
139 break; 120 break;
140 } 121 }
141 122
123 pulse = ir_clock_mhz * pulse;
124 leader = ir_clock_mhz * leader;
125 if (ir->rc_type == RC_TYPE_NEC)
126 leader = leader | 0x8000;
127
128 dprintk(2, "%s: %s, %d MHz, leader = 0x%04x, pulse = 0x%06x \n",
129 __func__,
130 (ir->rc_type == RC_TYPE_NEC) ? "NEC" : "RC-5",
131 ir_clock_mhz, leader, pulse);
132
133 /* Remote WAKEUP = enable, normal mode, from IR decoder output */
134 tm6000_set_reg(dev, TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe);
135
136 /* Enable IR reception on non-busrt mode */
137 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR, 0x2f);
138
139 /* IR_WKUP_SEL = Low byte in decoded IR data */
140 tm6000_set_reg(dev, TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff);
141 /* IR_WKU_ADD code */
142 tm6000_set_reg(dev, TM6010_REQ07_RDB_IR_WAKEUP_ADD, 0xff);
143
144 tm6000_set_reg(dev, TM6010_REQ07_RDC_IR_LEADER1, leader >> 8);
145 tm6000_set_reg(dev, TM6010_REQ07_RDD_IR_LEADER0, leader);
146
147 tm6000_set_reg(dev, TM6010_REQ07_RDE_IR_PULSE_CNT1, pulse >> 8);
148 tm6000_set_reg(dev, TM6010_REQ07_RDF_IR_PULSE_CNT0, pulse);
149
150 if (!ir->polling)
151 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 0);
152 else
153 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 1);
154 msleep(10);
155
156 /* Shows that IR is working via the LED */
157 tm6000_flash_led(dev, 0);
158 msleep(100);
159 tm6000_flash_led(dev, 1);
160 ir->pwled = 1;
161
142 return 0; 162 return 0;
143} 163}
144 164
@@ -146,132 +166,124 @@ static void tm6000_ir_urb_received(struct urb *urb)
146{ 166{
147 struct tm6000_core *dev = urb->context; 167 struct tm6000_core *dev = urb->context;
148 struct tm6000_IR *ir = dev->ir; 168 struct tm6000_IR *ir = dev->ir;
169 struct tm6000_ir_poll_result poll_result;
170 char *buf;
149 int rc; 171 int rc;
150 172
151 if (urb->status != 0) 173 dprintk(2, "%s\n",__func__);
152 printk(KERN_INFO "not ready\n"); 174 if (urb->status < 0 || urb->actual_length <= 0) {
153 else if (urb->actual_length > 0) { 175 printk(KERN_INFO "tm6000: IR URB failure: status: %i, length %i\n",
154 memcpy(ir->urb_data, urb->transfer_buffer, urb->actual_length); 176 urb->status, urb->actual_length);
177 ir->submit_urb = 1;
178 schedule_delayed_work(&ir->work, msecs_to_jiffies(URB_SUBMIT_DELAY));
179 return;
180 }
181 buf = urb->transfer_buffer;
155 182
156 dprintk("data %02x %02x %02x %02x\n", ir->urb_data[0], 183 if (ir_debug)
157 ir->urb_data[1], ir->urb_data[2], ir->urb_data[3]); 184 print_hex_dump(KERN_DEBUG, "tm6000: IR data: ",
185 DUMP_PREFIX_OFFSET,16, 1,
186 buf, urb->actual_length, false);
158 187
159 ir->key = 1; 188 poll_result.rc_data = buf[0];
160 } 189 if (urb->actual_length > 1)
190 poll_result.rc_data |= buf[1] << 8;
191
192 dprintk(1, "%s, scancode: 0x%04x\n",__func__, poll_result.rc_data);
193 rc_keydown(ir->rc, poll_result.rc_data, 0);
161 194
162 rc = usb_submit_urb(urb, GFP_ATOMIC); 195 rc = usb_submit_urb(urb, GFP_ATOMIC);
196 /*
197 * Flash the led. We can't do it here, as it is running on IRQ context.
198 * So, use the scheduler to do it, in a few ms.
199 */
200 ir->pwled = 2;
201 schedule_delayed_work(&ir->work, msecs_to_jiffies(10));
163} 202}
164 203
165static int default_polling_getkey(struct tm6000_IR *ir, 204static void tm6000_ir_handle_key(struct work_struct *work)
166 struct tm6000_ir_poll_result *poll_result)
167{ 205{
206 struct tm6000_IR *ir = container_of(work, struct tm6000_IR, work.work);
168 struct tm6000_core *dev = ir->dev; 207 struct tm6000_core *dev = ir->dev;
208 struct tm6000_ir_poll_result poll_result;
169 int rc; 209 int rc;
170 u8 buf[2]; 210 u8 buf[2];
171 211
172 if (ir->wait && !&dev->int_in) 212 if (ir->wait)
173 return 0; 213 return;
174
175 if (&dev->int_in) {
176 switch (ir->rc_type) {
177 case RC_TYPE_RC5:
178 poll_result->rc_data = ir->urb_data[0];
179 break;
180 case RC_TYPE_NEC:
181 if (ir->urb_data[1] == ((ir->key_addr >> 8) & 0xff)) {
182 poll_result->rc_data = ir->urb_data[0]
183 | ir->urb_data[1] << 8;
184 }
185 break;
186 default:
187 poll_result->rc_data = ir->urb_data[0]
188 | ir->urb_data[1] << 8;
189 break;
190 }
191 } else {
192 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 0);
193 msleep(10);
194 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 1);
195 msleep(10);
196
197 if (ir->rc_type == RC_TYPE_RC5) {
198 rc = tm6000_read_write_usb(dev, USB_DIR_IN |
199 USB_TYPE_VENDOR | USB_RECIP_DEVICE,
200 REQ_02_GET_IR_CODE, 0, 0, buf, 1);
201
202 msleep(10);
203
204 dprintk("read data=%02x\n", buf[0]);
205 if (rc < 0)
206 return rc;
207 214
208 poll_result->rc_data = buf[0]; 215 dprintk(3, "%s\n",__func__);
209 } else {
210 rc = tm6000_read_write_usb(dev, USB_DIR_IN |
211 USB_TYPE_VENDOR | USB_RECIP_DEVICE,
212 REQ_02_GET_IR_CODE, 0, 0, buf, 2);
213 216
214 msleep(10); 217 rc = tm6000_read_write_usb(dev, USB_DIR_IN |
218 USB_TYPE_VENDOR | USB_RECIP_DEVICE,
219 REQ_02_GET_IR_CODE, 0, 0, buf, 2);
220 if (rc < 0)
221 return;
215 222
216 dprintk("read data=%04x\n", buf[0] | buf[1] << 8); 223 if (rc > 1)
217 if (rc < 0) 224 poll_result.rc_data = buf[0] | buf[1] << 8;
218 return rc; 225 else
226 poll_result.rc_data = buf[0];
219 227
220 poll_result->rc_data = buf[0] | buf[1] << 8; 228 /* Check if something was read */
229 if ((poll_result.rc_data & 0xff) == 0xff) {
230 if (!ir->pwled) {
231 tm6000_flash_led(dev, 1);
232 ir->pwled = 1;
221 } 233 }
222 if ((poll_result->rc_data & 0x00ff) != 0xff) 234 return;
223 ir->key = 1;
224 } 235 }
225 return 0; 236
237 dprintk(1, "%s, scancode: 0x%04x\n",__func__, poll_result.rc_data);
238 rc_keydown(ir->rc, poll_result.rc_data, 0);
239 tm6000_flash_led(dev, 0);
240 ir->pwled = 0;
241
242 /* Re-schedule polling */
243 schedule_delayed_work(&ir->work, msecs_to_jiffies(ir->polling));
226} 244}
227 245
228static void tm6000_ir_handle_key(struct tm6000_IR *ir) 246static void tm6000_ir_int_work(struct work_struct *work)
229{ 247{
248 struct tm6000_IR *ir = container_of(work, struct tm6000_IR, work.work);
230 struct tm6000_core *dev = ir->dev; 249 struct tm6000_core *dev = ir->dev;
231 int result; 250 int rc;
232 struct tm6000_ir_poll_result poll_result;
233 251
234 /* read the registers containing the IR status */ 252 dprintk(3, "%s, submit_urb = %d, pwled = %d\n",__func__, ir->submit_urb,
235 result = ir->get_key(ir, &poll_result); 253 ir->pwled);
236 if (result < 0) {
237 printk(KERN_INFO "ir->get_key() failed %d\n", result);
238 return;
239 }
240 254
241 dprintk("ir->get_key result data=%04x\n", poll_result.rc_data); 255 if (ir->submit_urb) {
256 dprintk(3, "Resubmit urb\n");
257 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 2, 0);
242 258
243 if (ir->pwled) { 259 rc = usb_submit_urb(ir->int_urb, GFP_ATOMIC);
244 if (ir->pwledcnt >= PWLED_OFF) { 260 if (rc < 0) {
245 ir->pwled = 0; 261 printk(KERN_ERR "tm6000: Can't submit an IR interrupt. Error %i\n",
246 ir->pwledcnt = 0; 262 rc);
247 tm6000_flash_led(dev, 1); 263 /* Retry in 100 ms */
248 } else 264 schedule_delayed_work(&ir->work, msecs_to_jiffies(URB_SUBMIT_DELAY));
249 ir->pwledcnt += 1; 265 return;
266 }
267 ir->submit_urb = 0;
250 } 268 }
251 269
252 if (ir->key) { 270 /* Led is enabled only if USB submit doesn't fail */
253 rc_keydown(ir->rc, poll_result.rc_data, 0); 271 if (ir->pwled == 2) {
254 ir->key = 0;
255 ir->pwled = 1;
256 ir->pwledcnt = 0;
257 tm6000_flash_led(dev, 0); 272 tm6000_flash_led(dev, 0);
273 ir->pwled = 0;
274 schedule_delayed_work(&ir->work, msecs_to_jiffies(URB_INT_LED_DELAY));
275 } else if (!ir->pwled) {
276 tm6000_flash_led(dev, 1);
277 ir->pwled = 1;
258 } 278 }
259 return;
260}
261
262static void tm6000_ir_work(struct work_struct *work)
263{
264 struct tm6000_IR *ir = container_of(work, struct tm6000_IR, work.work);
265
266 tm6000_ir_handle_key(ir);
267 schedule_delayed_work(&ir->work, msecs_to_jiffies(ir->polling));
268} 279}
269 280
270static int tm6000_ir_start(struct rc_dev *rc) 281static int tm6000_ir_start(struct rc_dev *rc)
271{ 282{
272 struct tm6000_IR *ir = rc->priv; 283 struct tm6000_IR *ir = rc->priv;
273 284
274 INIT_DELAYED_WORK(&ir->work, tm6000_ir_work); 285 dprintk(2, "%s\n",__func__);
286
275 schedule_delayed_work(&ir->work, 0); 287 schedule_delayed_work(&ir->work, 0);
276 288
277 return 0; 289 return 0;
@@ -281,6 +293,8 @@ static void tm6000_ir_stop(struct rc_dev *rc)
281{ 293{
282 struct tm6000_IR *ir = rc->priv; 294 struct tm6000_IR *ir = rc->priv;
283 295
296 dprintk(2, "%s\n",__func__);
297
284 cancel_delayed_work_sync(&ir->work); 298 cancel_delayed_work_sync(&ir->work);
285} 299}
286 300
@@ -291,10 +305,11 @@ static int tm6000_ir_change_protocol(struct rc_dev *rc, u64 rc_type)
291 if (!ir) 305 if (!ir)
292 return 0; 306 return 0;
293 307
308 dprintk(2, "%s\n",__func__);
309
294 if ((rc->rc_map.scan) && (rc_type == RC_TYPE_NEC)) 310 if ((rc->rc_map.scan) && (rc_type == RC_TYPE_NEC))
295 ir->key_addr = ((rc->rc_map.scan[0].scancode >> 8) & 0xffff); 311 ir->key_addr = ((rc->rc_map.scan[0].scancode >> 8) & 0xffff);
296 312
297 ir->get_key = default_polling_getkey;
298 ir->rc_type = rc_type; 313 ir->rc_type = rc_type;
299 314
300 tm6000_ir_config(ir); 315 tm6000_ir_config(ir);
@@ -302,17 +317,19 @@ static int tm6000_ir_change_protocol(struct rc_dev *rc, u64 rc_type)
302 return 0; 317 return 0;
303} 318}
304 319
305int tm6000_ir_int_start(struct tm6000_core *dev) 320static int __tm6000_ir_int_start(struct rc_dev *rc)
306{ 321{
307 struct tm6000_IR *ir = dev->ir; 322 struct tm6000_IR *ir = rc->priv;
323 struct tm6000_core *dev = ir->dev;
308 int pipe, size; 324 int pipe, size;
309 int err = -ENOMEM; 325 int err = -ENOMEM;
310 326
311
312 if (!ir) 327 if (!ir)
313 return -ENODEV; 328 return -ENODEV;
314 329
315 ir->int_urb = usb_alloc_urb(0, GFP_KERNEL); 330 dprintk(2, "%s\n",__func__);
331
332 ir->int_urb = usb_alloc_urb(0, GFP_ATOMIC);
316 if (!ir->int_urb) 333 if (!ir->int_urb)
317 return -ENOMEM; 334 return -ENOMEM;
318 335
@@ -321,42 +338,59 @@ int tm6000_ir_int_start(struct tm6000_core *dev)
321 & USB_ENDPOINT_NUMBER_MASK); 338 & USB_ENDPOINT_NUMBER_MASK);
322 339
323 size = usb_maxpacket(dev->udev, pipe, usb_pipeout(pipe)); 340 size = usb_maxpacket(dev->udev, pipe, usb_pipeout(pipe));
324 dprintk("IR max size: %d\n", size); 341 dprintk(1, "IR max size: %d\n", size);
325 342
326 ir->int_urb->transfer_buffer = kzalloc(size, GFP_KERNEL); 343 ir->int_urb->transfer_buffer = kzalloc(size, GFP_ATOMIC);
327 if (ir->int_urb->transfer_buffer == NULL) { 344 if (ir->int_urb->transfer_buffer == NULL) {
328 usb_free_urb(ir->int_urb); 345 usb_free_urb(ir->int_urb);
329 return err; 346 return err;
330 } 347 }
331 dprintk("int interval: %d\n", dev->int_in.endp->desc.bInterval); 348 dprintk(1, "int interval: %d\n", dev->int_in.endp->desc.bInterval);
349
332 usb_fill_int_urb(ir->int_urb, dev->udev, pipe, 350 usb_fill_int_urb(ir->int_urb, dev->udev, pipe,
333 ir->int_urb->transfer_buffer, size, 351 ir->int_urb->transfer_buffer, size,
334 tm6000_ir_urb_received, dev, 352 tm6000_ir_urb_received, dev,
335 dev->int_in.endp->desc.bInterval); 353 dev->int_in.endp->desc.bInterval);
336 err = usb_submit_urb(ir->int_urb, GFP_KERNEL); 354
337 if (err) { 355 ir->submit_urb = 1;
338 kfree(ir->int_urb->transfer_buffer); 356 schedule_delayed_work(&ir->work, msecs_to_jiffies(URB_SUBMIT_DELAY));
339 usb_free_urb(ir->int_urb);
340 return err;
341 }
342 ir->urb_data = kzalloc(size, GFP_KERNEL);
343 357
344 return 0; 358 return 0;
345} 359}
346 360
347void tm6000_ir_int_stop(struct tm6000_core *dev) 361static void __tm6000_ir_int_stop(struct rc_dev *rc)
348{ 362{
349 struct tm6000_IR *ir = dev->ir; 363 struct tm6000_IR *ir = rc->priv;
350 364
351 if (!ir) 365 if (!ir || !ir->int_urb)
352 return; 366 return;
353 367
368 dprintk(2, "%s\n",__func__);
369
354 usb_kill_urb(ir->int_urb); 370 usb_kill_urb(ir->int_urb);
355 kfree(ir->int_urb->transfer_buffer); 371 kfree(ir->int_urb->transfer_buffer);
356 usb_free_urb(ir->int_urb); 372 usb_free_urb(ir->int_urb);
357 ir->int_urb = NULL; 373 ir->int_urb = NULL;
358 kfree(ir->urb_data); 374}
359 ir->urb_data = NULL; 375
376int tm6000_ir_int_start(struct tm6000_core *dev)
377{
378 struct tm6000_IR *ir = dev->ir;
379
380 if (!ir)
381 return 0;
382
383 return __tm6000_ir_int_start(ir->rc);
384}
385
386void tm6000_ir_int_stop(struct tm6000_core *dev)
387{
388 struct tm6000_IR *ir = dev->ir;
389
390 if (!ir || !ir->rc)
391 return;
392
393 __tm6000_ir_int_stop(ir->rc);
360} 394}
361 395
362int tm6000_ir_init(struct tm6000_core *dev) 396int tm6000_ir_init(struct tm6000_core *dev)
@@ -374,29 +408,36 @@ int tm6000_ir_init(struct tm6000_core *dev)
374 if (!dev->ir_codes) 408 if (!dev->ir_codes)
375 return 0; 409 return 0;
376 410
377 ir = kzalloc(sizeof(*ir), GFP_KERNEL); 411 ir = kzalloc(sizeof(*ir), GFP_ATOMIC);
378 rc = rc_allocate_device(); 412 rc = rc_allocate_device();
379 if (!ir || !rc) 413 if (!ir || !rc)
380 goto out; 414 goto out;
381 415
416 dprintk(2, "%s\n", __func__);
417
382 /* record handles to ourself */ 418 /* record handles to ourself */
383 ir->dev = dev; 419 ir->dev = dev;
384 dev->ir = ir; 420 dev->ir = ir;
385 ir->rc = rc; 421 ir->rc = rc;
386 422
387 /* input einrichten */ 423 /* input setup */
388 rc->allowed_protos = RC_TYPE_RC5 | RC_TYPE_NEC; 424 rc->allowed_protos = RC_TYPE_RC5 | RC_TYPE_NEC;
425 /* Neded, in order to support NEC remotes with 24 or 32 bits */
426 rc->scanmask = 0xffff;
389 rc->priv = ir; 427 rc->priv = ir;
390 rc->change_protocol = tm6000_ir_change_protocol; 428 rc->change_protocol = tm6000_ir_change_protocol;
391 rc->open = tm6000_ir_start; 429 if (dev->int_in.endp) {
392 rc->close = tm6000_ir_stop; 430 rc->open = __tm6000_ir_int_start;
431 rc->close = __tm6000_ir_int_stop;
432 INIT_DELAYED_WORK(&ir->work, tm6000_ir_int_work);
433 } else {
434 rc->open = tm6000_ir_start;
435 rc->close = tm6000_ir_stop;
436 ir->polling = 50;
437 INIT_DELAYED_WORK(&ir->work, tm6000_ir_handle_key);
438 }
393 rc->driver_type = RC_DRIVER_SCANCODE; 439 rc->driver_type = RC_DRIVER_SCANCODE;
394 440
395 ir->polling = 50;
396 ir->pwled = 0;
397 ir->pwledcnt = 0;
398
399
400 snprintf(ir->name, sizeof(ir->name), "tm5600/60x0 IR (%s)", 441 snprintf(ir->name, sizeof(ir->name), "tm5600/60x0 IR (%s)",
401 dev->name); 442 dev->name);
402 443
@@ -415,15 +456,6 @@ int tm6000_ir_init(struct tm6000_core *dev)
415 rc->driver_name = "tm6000"; 456 rc->driver_name = "tm6000";
416 rc->dev.parent = &dev->udev->dev; 457 rc->dev.parent = &dev->udev->dev;
417 458
418 if (&dev->int_in) {
419 dprintk("IR over int\n");
420
421 err = tm6000_ir_int_start(dev);
422
423 if (err)
424 goto out;
425 }
426
427 /* ir register */ 459 /* ir register */
428 err = rc_register_device(rc); 460 err = rc_register_device(rc);
429 if (err) 461 if (err)
@@ -447,10 +479,19 @@ int tm6000_ir_fini(struct tm6000_core *dev)
447 if (!ir) 479 if (!ir)
448 return 0; 480 return 0;
449 481
482 dprintk(2, "%s\n",__func__);
483
450 rc_unregister_device(ir->rc); 484 rc_unregister_device(ir->rc);
451 485
452 if (ir->int_urb) 486 if (!ir->polling)
453 tm6000_ir_int_stop(dev); 487 __tm6000_ir_int_stop(ir->rc);
488
489 tm6000_ir_stop(ir->rc);
490
491 /* Turn off the led */
492 tm6000_flash_led(dev, 0);
493 ir->pwled = 0;
494
454 495
455 kfree(ir); 496 kfree(ir);
456 dev->ir = NULL; 497 dev->ir = NULL;
diff --git a/drivers/media/video/tm6000/tm6000-regs.h b/drivers/media/video/tm6000/tm6000-regs.h
index 7f491b6de93..a38c251ed57 100644
--- a/drivers/media/video/tm6000/tm6000-regs.h
+++ b/drivers/media/video/tm6000/tm6000-regs.h
@@ -284,19 +284,19 @@ enum {
284/* ONLY for TM6010 */ 284/* ONLY for TM6010 */
285#define TM6010_REQ07_RD8_IR 0x07, 0xd8 285#define TM6010_REQ07_RD8_IR 0x07, 0xd8
286/* ONLY for TM6010 */ 286/* ONLY for TM6010 */
287#define TM6010_REQ07_RD8_IR_BSIZE 0x07, 0xd9 287#define TM6010_REQ07_RD9_IR_BSIZE 0x07, 0xd9
288/* ONLY for TM6010 */ 288/* ONLY for TM6010 */
289#define TM6010_REQ07_RD8_IR_WAKEUP_SEL 0x07, 0xda 289#define TM6010_REQ07_RDA_IR_WAKEUP_SEL 0x07, 0xda
290/* ONLY for TM6010 */ 290/* ONLY for TM6010 */
291#define TM6010_REQ07_RD8_IR_WAKEUP_ADD 0x07, 0xdb 291#define TM6010_REQ07_RDB_IR_WAKEUP_ADD 0x07, 0xdb
292/* ONLY for TM6010 */ 292/* ONLY for TM6010 */
293#define TM6010_REQ07_RD8_IR_LEADER1 0x07, 0xdc 293#define TM6010_REQ07_RDC_IR_LEADER1 0x07, 0xdc
294/* ONLY for TM6010 */ 294/* ONLY for TM6010 */
295#define TM6010_REQ07_RD8_IR_LEADER0 0x07, 0xdd 295#define TM6010_REQ07_RDD_IR_LEADER0 0x07, 0xdd
296/* ONLY for TM6010 */ 296/* ONLY for TM6010 */
297#define TM6010_REQ07_RD8_IR_PULSE_CNT1 0x07, 0xde 297#define TM6010_REQ07_RDE_IR_PULSE_CNT1 0x07, 0xde
298/* ONLY for TM6010 */ 298/* ONLY for TM6010 */
299#define TM6010_REQ07_RD8_IR_PULSE_CNT0 0x07, 0xdf 299#define TM6010_REQ07_RDF_IR_PULSE_CNT0 0x07, 0xdf
300/* ONLY for TM6010 */ 300/* ONLY for TM6010 */
301#define TM6010_REQ07_RE0_DVIDEO_SOURCE 0x07, 0xe0 301#define TM6010_REQ07_RE0_DVIDEO_SOURCE 0x07, 0xe0
302/* ONLY for TM6010 */ 302/* ONLY for TM6010 */
diff --git a/drivers/media/video/tm6000/tm6000-stds.c b/drivers/media/video/tm6000/tm6000-stds.c
index 9a4145dc3d8..9dc0831d813 100644
--- a/drivers/media/video/tm6000/tm6000-stds.c
+++ b/drivers/media/video/tm6000/tm6000-stds.c
@@ -361,82 +361,51 @@ static int tm6000_set_audio_std(struct tm6000_core *dev)
361 return 0; 361 return 0;
362 } 362 }
363 363
364 switch (tm6010_a_mode) { 364 /*
365 * STD/MN shouldn't be affected by tm6010_a_mode, as there's just one
366 * audio standard for each V4L2_STD type.
367 */
368 if ((dev->norm & V4L2_STD_NTSC) == V4L2_STD_NTSC_M_KR) {
369 areg_05 |= 0x04;
370 } else if ((dev->norm & V4L2_STD_NTSC) == V4L2_STD_NTSC_M_JP) {
371 areg_05 |= 0x43;
372 } else if (dev->norm & V4L2_STD_MN) {
373 areg_05 |= 0x22;
374 } else switch (tm6010_a_mode) {
365 /* auto */ 375 /* auto */
366 case 0: 376 case 0:
367 switch (dev->norm) { 377 if ((dev->norm & V4L2_STD_SECAM) == V4L2_STD_SECAM_L)
368 case V4L2_STD_NTSC_M_KR:
369 areg_05 |= 0x00; 378 areg_05 |= 0x00;
370 break; 379 else /* Other PAL/SECAM standards */
371 case V4L2_STD_NTSC_M_JP:
372 areg_05 |= 0x40;
373 break;
374 case V4L2_STD_NTSC_M:
375 case V4L2_STD_PAL_M:
376 case V4L2_STD_PAL_N:
377 areg_05 |= 0x20;
378 break;
379 case V4L2_STD_PAL_Nc:
380 areg_05 |= 0x60;
381 break;
382 case V4L2_STD_SECAM_L:
383 areg_05 |= 0x00;
384 break;
385 case V4L2_STD_DK:
386 areg_05 |= 0x10; 380 areg_05 |= 0x10;
387 break;
388 }
389 break; 381 break;
390 /* A2 */ 382 /* A2 */
391 case 1: 383 case 1:
392 switch (dev->norm) { 384 if (dev->norm & V4L2_STD_DK)
393 case V4L2_STD_B:
394 case V4L2_STD_GH:
395 areg_05 = 0x05;
396 break;
397 case V4L2_STD_DK:
398 areg_05 = 0x09; 385 areg_05 = 0x09;
399 break; 386 else
400 } 387 areg_05 = 0x05;
401 break; 388 break;
402 /* NICAM */ 389 /* NICAM */
403 case 2: 390 case 2:
404 switch (dev->norm) { 391 if (dev->norm & V4L2_STD_DK) {
405 case V4L2_STD_B:
406 case V4L2_STD_GH:
407 areg_05 = 0x07;
408 break;
409 case V4L2_STD_DK:
410 areg_05 = 0x06; 392 areg_05 = 0x06;
411 break; 393 } else if (dev->norm & V4L2_STD_PAL_I) {
412 case V4L2_STD_PAL_I:
413 areg_05 = 0x08; 394 areg_05 = 0x08;
414 break; 395 } else if (dev->norm & V4L2_STD_SECAM_L) {
415 case V4L2_STD_SECAM_L:
416 areg_05 = 0x0a; 396 areg_05 = 0x0a;
417 areg_02 = 0x02; 397 areg_02 = 0x02;
418 break; 398 } else {
399 areg_05 = 0x07;
419 } 400 }
420 nicam_flag = 1; 401 nicam_flag = 1;
421 break; 402 break;
422 /* other */ 403 /* other */
423 case 3: 404 case 3:
424 switch (dev->norm) { 405 if (dev->norm & V4L2_STD_DK) {
425 /* DK3_A2 */
426 case V4L2_STD_DK:
427 areg_05 = 0x0b; 406 areg_05 = 0x0b;
428 break; 407 } else {
429 /* Korea */
430 case V4L2_STD_NTSC_M_KR:
431 areg_05 = 0x04;
432 break;
433 /* EIAJ */
434 case V4L2_STD_NTSC_M_JP:
435 areg_05 = 0x03;
436 break;
437 default:
438 areg_05 = 0x02; 408 areg_05 = 0x02;
439 break;
440 } 409 }
441 break; 410 break;
442 } 411 }
@@ -557,10 +526,16 @@ int tm6000_set_standard(struct tm6000_core *dev)
557 case TM6000_AMUX_ADC1: 526 case TM6000_AMUX_ADC1:
558 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 527 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
559 0x00, 0x0f); 528 0x00, 0x0f);
529 /* Mux overflow workaround */
530 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
531 0x10, 0xf0);
560 break; 532 break;
561 case TM6000_AMUX_ADC2: 533 case TM6000_AMUX_ADC2:
562 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 534 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
563 0x08, 0x0f); 535 0x08, 0x0f);
536 /* Mux overflow workaround */
537 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
538 0x10, 0xf0);
564 break; 539 break;
565 case TM6000_AMUX_SIF1: 540 case TM6000_AMUX_SIF1:
566 reg_08_e2 |= 0x02; 541 reg_08_e2 |= 0x02;
@@ -570,6 +545,9 @@ int tm6000_set_standard(struct tm6000_core *dev)
570 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3); 545 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3);
571 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 546 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
572 0x02, 0x0f); 547 0x02, 0x0f);
548 /* Mux overflow workaround */
549 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
550 0x30, 0xf0);
573 break; 551 break;
574 case TM6000_AMUX_SIF2: 552 case TM6000_AMUX_SIF2:
575 reg_08_e2 |= 0x02; 553 reg_08_e2 |= 0x02;
@@ -579,6 +557,9 @@ int tm6000_set_standard(struct tm6000_core *dev)
579 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf7); 557 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf7);
580 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 558 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
581 0x02, 0x0f); 559 0x02, 0x0f);
560 /* Mux overflow workaround */
561 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
562 0x30, 0xf0);
582 break; 563 break;
583 default: 564 default:
584 break; 565 break;
diff --git a/drivers/media/video/tm6000/tm6000-video.c b/drivers/media/video/tm6000/tm6000-video.c
index 1e5ace0b5d1..bc13db736e2 100644
--- a/drivers/media/video/tm6000/tm6000-video.c
+++ b/drivers/media/video/tm6000/tm6000-video.c
@@ -1605,16 +1605,25 @@ static int tm6000_release(struct file *file)
1605 res_free(dev, fh); 1605 res_free(dev, fh);
1606 1606
1607 if (!dev->users) { 1607 if (!dev->users) {
1608 int err;
1609
1610 tm6000_uninit_isoc(dev); 1608 tm6000_uninit_isoc(dev);
1611 1609
1610 /* Stop interrupt USB pipe */
1611 tm6000_ir_int_stop(dev);
1612
1613 usb_reset_configuration(dev->udev);
1614
1615 if (dev->int_in.endp)
1616 usb_set_interface(dev->udev,
1617 dev->isoc_in.bInterfaceNumber, 2);
1618 else
1619 usb_set_interface(dev->udev,
1620 dev->isoc_in.bInterfaceNumber, 0);
1621
1622 /* Start interrupt USB pipe */
1623 tm6000_ir_int_start(dev);
1624
1612 if (!fh->radio) 1625 if (!fh->radio)
1613 videobuf_mmap_free(&fh->vb_vidq); 1626 videobuf_mmap_free(&fh->vb_vidq);
1614
1615 err = tm6000_reset(dev);
1616 if (err < 0)
1617 dev_err(&vdev->dev, "reset failed: %d\n", err);
1618 } 1627 }
1619 1628
1620 kfree(fh); 1629 kfree(fh);
diff --git a/drivers/media/video/tm6000/tm6000.h b/drivers/media/video/tm6000/tm6000.h
index 2777e514eff..27ba659cfa8 100644
--- a/drivers/media/video/tm6000/tm6000.h
+++ b/drivers/media/video/tm6000/tm6000.h
@@ -188,6 +188,9 @@ struct tm6000_core {
188 /* Device Capabilities*/ 188 /* Device Capabilities*/
189 struct tm6000_capabilities caps; 189 struct tm6000_capabilities caps;
190 190
191 /* Used to load alsa/dvb */
192 struct work_struct request_module_wk;
193
191 /* Tuner configuration */ 194 /* Tuner configuration */
192 int tuner_type; /* type of the tuner */ 195 int tuner_type; /* type of the tuner */
193 int tuner_addr; /* tuner address */ 196 int tuner_addr; /* tuner address */
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c
index 11cc980b0cd..4059ea178c2 100644
--- a/drivers/media/video/tuner-core.c
+++ b/drivers/media/video/tuner-core.c
@@ -326,6 +326,7 @@ static void set_type(struct i2c_client *c, unsigned int type,
326 t->mode_mask = T_RADIO; 326 t->mode_mask = T_RADIO;
327 break; 327 break;
328 case TUNER_PHILIPS_FMD1216ME_MK3: 328 case TUNER_PHILIPS_FMD1216ME_MK3:
329 case TUNER_PHILIPS_FMD1216MEX_MK3:
329 buffer[0] = 0x0b; 330 buffer[0] = 0x0b;
330 buffer[1] = 0xdc; 331 buffer[1] = 0xdc;
331 buffer[2] = 0x9c; 332 buffer[2] = 0x9c;
diff --git a/drivers/media/video/tvp5150.c b/drivers/media/video/tvp5150.c
index 6abaa16ae13..6be9910a6e2 100644
--- a/drivers/media/video/tvp5150.c
+++ b/drivers/media/video/tvp5150.c
@@ -703,21 +703,21 @@ static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
703 /* First tests should be against specific std */ 703 /* First tests should be against specific std */
704 704
705 if (std == V4L2_STD_ALL) { 705 if (std == V4L2_STD_ALL) {
706 fmt = 0; /* Autodetect mode */ 706 fmt = VIDEO_STD_AUTO_SWITCH_BIT; /* Autodetect mode */
707 } else if (std & V4L2_STD_NTSC_443) { 707 } else if (std & V4L2_STD_NTSC_443) {
708 fmt = 0xa; 708 fmt = VIDEO_STD_NTSC_4_43_BIT;
709 } else if (std & V4L2_STD_PAL_M) { 709 } else if (std & V4L2_STD_PAL_M) {
710 fmt = 0x6; 710 fmt = VIDEO_STD_PAL_M_BIT;
711 } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) { 711 } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
712 fmt = 0x8; 712 fmt = VIDEO_STD_PAL_COMBINATION_N_BIT;
713 } else { 713 } else {
714 /* Then, test against generic ones */ 714 /* Then, test against generic ones */
715 if (std & V4L2_STD_NTSC) 715 if (std & V4L2_STD_NTSC)
716 fmt = 0x2; 716 fmt = VIDEO_STD_NTSC_MJ_BIT;
717 else if (std & V4L2_STD_PAL) 717 else if (std & V4L2_STD_PAL)
718 fmt = 0x4; 718 fmt = VIDEO_STD_PAL_BDGHIN_BIT;
719 else if (std & V4L2_STD_SECAM) 719 else if (std & V4L2_STD_SECAM)
720 fmt = 0xc; 720 fmt = VIDEO_STD_SECAM_BIT;
721 } 721 }
722 722
723 v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); 723 v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt);
@@ -779,6 +779,70 @@ static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl)
779 return -EINVAL; 779 return -EINVAL;
780} 780}
781 781
782static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
783{
784 int val = tvp5150_read(sd, TVP5150_STATUS_REG_5);
785
786 switch (val & 0x0F) {
787 case 0x01:
788 return V4L2_STD_NTSC;
789 case 0x03:
790 return V4L2_STD_PAL;
791 case 0x05:
792 return V4L2_STD_PAL_M;
793 case 0x07:
794 return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc;
795 case 0x09:
796 return V4L2_STD_NTSC_443;
797 case 0xb:
798 return V4L2_STD_SECAM;
799 default:
800 return V4L2_STD_UNKNOWN;
801 }
802}
803
804static int tvp5150_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
805 enum v4l2_mbus_pixelcode *code)
806{
807 if (index)
808 return -EINVAL;
809
810 *code = V4L2_MBUS_FMT_YUYV8_2X8;
811 return 0;
812}
813
814static int tvp5150_mbus_fmt(struct v4l2_subdev *sd,
815 struct v4l2_mbus_framefmt *f)
816{
817 struct tvp5150 *decoder = to_tvp5150(sd);
818 v4l2_std_id std;
819
820 if (f == NULL)
821 return -EINVAL;
822
823 tvp5150_reset(sd, 0);
824
825 /* Calculate height and width based on current standard */
826 if (decoder->norm == V4L2_STD_ALL)
827 std = tvp5150_read_std(sd);
828 else
829 std = decoder->norm;
830
831 f->width = 720;
832 if (std & V4L2_STD_525_60)
833 f->height = 480;
834 else
835 f->height = 576;
836
837 f->code = V4L2_MBUS_FMT_YUYV8_2X8;
838 f->field = V4L2_FIELD_SEQ_TB;
839 f->colorspace = V4L2_COLORSPACE_SMPTE170M;
840
841 v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width,
842 f->height);
843 return 0;
844}
845
782/**************************************************************************** 846/****************************************************************************
783 I2C Command 847 I2C Command
784 ****************************************************************************/ 848 ****************************************************************************/
@@ -931,6 +995,9 @@ static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
931 995
932static const struct v4l2_subdev_video_ops tvp5150_video_ops = { 996static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
933 .s_routing = tvp5150_s_routing, 997 .s_routing = tvp5150_s_routing,
998 .enum_mbus_fmt = tvp5150_enum_mbus_fmt,
999 .s_mbus_fmt = tvp5150_mbus_fmt,
1000 .try_mbus_fmt = tvp5150_mbus_fmt,
934}; 1001};
935 1002
936static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { 1003static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
diff --git a/drivers/media/video/usbvision/usbvision-i2c.c b/drivers/media/video/usbvision/usbvision-i2c.c
index d7f97513b28..89fec029e92 100644
--- a/drivers/media/video/usbvision/usbvision-i2c.c
+++ b/drivers/media/video/usbvision/usbvision-i2c.c
@@ -110,42 +110,20 @@ static inline int usb_find_address(struct i2c_adapter *i2c_adap,
110 110
111 unsigned char addr; 111 unsigned char addr;
112 int ret; 112 int ret;
113 if ((flags & I2C_M_TEN)) {
114 /* a ten bit address */
115 addr = 0xf0 | ((msg->addr >> 7) & 0x03);
116 /* try extended address code... */
117 ret = try_write_address(i2c_adap, addr, retries);
118 if (ret != 1) {
119 dev_err(&i2c_adap->dev,
120 "died at extended address code, while writing\n");
121 return -EREMOTEIO;
122 }
123 add[0] = addr;
124 if (flags & I2C_M_RD) {
125 /* okay, now switch into reading mode */
126 addr |= 0x01;
127 ret = try_read_address(i2c_adap, addr, retries);
128 if (ret != 1) {
129 dev_err(&i2c_adap->dev,
130 "died at extended address code, while reading\n");
131 return -EREMOTEIO;
132 }
133 }
134 113
135 } else { /* normal 7bit address */ 114 addr = (msg->addr << 1);
136 addr = (msg->addr << 1); 115 if (flags & I2C_M_RD)
137 if (flags & I2C_M_RD) 116 addr |= 1;
138 addr |= 1;
139 117
140 add[0] = addr; 118 add[0] = addr;
141 if (flags & I2C_M_RD) 119 if (flags & I2C_M_RD)
142 ret = try_read_address(i2c_adap, addr, retries); 120 ret = try_read_address(i2c_adap, addr, retries);
143 else 121 else
144 ret = try_write_address(i2c_adap, addr, retries); 122 ret = try_write_address(i2c_adap, addr, retries);
123
124 if (ret != 1)
125 return -EREMOTEIO;
145 126
146 if (ret != 1)
147 return -EREMOTEIO;
148 }
149 return 0; 127 return 0;
150} 128}
151 129
@@ -184,7 +162,7 @@ usbvision_i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
184 162
185static u32 functionality(struct i2c_adapter *adap) 163static u32 functionality(struct i2c_adapter *adap)
186{ 164{
187 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR; 165 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
188} 166}
189 167
190/* -----exported algorithm data: ------------------------------------- */ 168/* -----exported algorithm data: ------------------------------------- */
diff --git a/drivers/media/video/uvc/Kconfig b/drivers/media/video/uvc/Kconfig
index 2956a763721..6c197da531b 100644
--- a/drivers/media/video/uvc/Kconfig
+++ b/drivers/media/video/uvc/Kconfig
@@ -1,5 +1,6 @@
1config USB_VIDEO_CLASS 1config USB_VIDEO_CLASS
2 tristate "USB Video Class (UVC)" 2 tristate "USB Video Class (UVC)"
3 select VIDEOBUF2_VMALLOC
3 ---help--- 4 ---help---
4 Support for the USB Video Class (UVC). Currently only video 5 Support for the USB Video Class (UVC). Currently only video
5 input devices, such as webcams, are supported. 6 input devices, such as webcams, are supported.
diff --git a/drivers/media/video/uvc/Makefile b/drivers/media/video/uvc/Makefile
index 2071ca8a2f0..c26d12fdb8f 100644
--- a/drivers/media/video/uvc/Makefile
+++ b/drivers/media/video/uvc/Makefile
@@ -1,5 +1,5 @@
1uvcvideo-objs := uvc_driver.o uvc_queue.o uvc_v4l2.o uvc_video.o uvc_ctrl.o \ 1uvcvideo-objs := uvc_driver.o uvc_queue.o uvc_v4l2.o uvc_video.o uvc_ctrl.o \
2 uvc_status.o uvc_isight.o 2 uvc_status.o uvc_isight.o uvc_debugfs.o
3ifeq ($(CONFIG_MEDIA_CONTROLLER),y) 3ifeq ($(CONFIG_MEDIA_CONTROLLER),y)
4uvcvideo-objs += uvc_entity.o 4uvcvideo-objs += uvc_entity.o
5endif 5endif
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index 254d3268884..0efd3b10b35 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -878,8 +878,21 @@ static int uvc_ctrl_populate_cache(struct uvc_video_chain *chain,
878 chain->dev->intfnum, ctrl->info.selector, 878 chain->dev->intfnum, ctrl->info.selector,
879 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES), 879 uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES),
880 ctrl->info.size); 880 ctrl->info.size);
881 if (ret < 0) 881 if (ret < 0) {
882 return ret; 882 if (UVC_ENTITY_TYPE(ctrl->entity) !=
883 UVC_VC_EXTENSION_UNIT)
884 return ret;
885
886 /* GET_RES is mandatory for XU controls, but some
887 * cameras still choke on it. Ignore errors and set the
888 * resolution value to zero.
889 */
890 uvc_warn_once(chain->dev, UVC_WARN_XU_GET_RES,
891 "UVC non compliance - GET_RES failed on "
892 "an XU control. Enabling workaround.\n");
893 memset(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES), 0,
894 ctrl->info.size);
895 }
883 } 896 }
884 897
885 ctrl->cached = 1; 898 ctrl->cached = 1;
@@ -1861,7 +1874,7 @@ int uvc_ctrl_init_device(struct uvc_device *dev)
1861 if (ncontrols == 0) 1874 if (ncontrols == 0)
1862 continue; 1875 continue;
1863 1876
1864 entity->controls = kzalloc(ncontrols * sizeof(*ctrl), 1877 entity->controls = kcalloc(ncontrols, sizeof(*ctrl),
1865 GFP_KERNEL); 1878 GFP_KERNEL);
1866 if (entity->controls == NULL) 1879 if (entity->controls == NULL)
1867 return -ENOMEM; 1880 return -ENOMEM;
diff --git a/drivers/media/video/uvc/uvc_debugfs.c b/drivers/media/video/uvc/uvc_debugfs.c
new file mode 100644
index 00000000000..14561a5abb7
--- /dev/null
+++ b/drivers/media/video/uvc/uvc_debugfs.c
@@ -0,0 +1,136 @@
1/*
2 * uvc_debugfs.c -- USB Video Class driver - Debugging support
3 *
4 * Copyright (C) 2011
5 * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/debugfs.h>
16#include <linux/slab.h>
17#include <linux/usb.h>
18
19#include "uvcvideo.h"
20
21/* -----------------------------------------------------------------------------
22 * Statistics
23 */
24
25#define UVC_DEBUGFS_BUF_SIZE 1024
26
27struct uvc_debugfs_buffer {
28 size_t count;
29 char data[UVC_DEBUGFS_BUF_SIZE];
30};
31
32static int uvc_debugfs_stats_open(struct inode *inode, struct file *file)
33{
34 struct uvc_streaming *stream = inode->i_private;
35 struct uvc_debugfs_buffer *buf;
36
37 buf = kmalloc(sizeof(*buf), GFP_KERNEL);
38 if (buf == NULL)
39 return -ENOMEM;
40
41 buf->count = uvc_video_stats_dump(stream, buf->data, sizeof(buf->data));
42
43 file->private_data = buf;
44 return 0;
45}
46
47static ssize_t uvc_debugfs_stats_read(struct file *file, char __user *user_buf,
48 size_t nbytes, loff_t *ppos)
49{
50 struct uvc_debugfs_buffer *buf = file->private_data;
51
52 return simple_read_from_buffer(user_buf, nbytes, ppos, buf->data,
53 buf->count);
54}
55
56static int uvc_debugfs_stats_release(struct inode *inode, struct file *file)
57{
58 kfree(file->private_data);
59 file->private_data = NULL;
60
61 return 0;
62}
63
64static const struct file_operations uvc_debugfs_stats_fops = {
65 .owner = THIS_MODULE,
66 .open = uvc_debugfs_stats_open,
67 .llseek = no_llseek,
68 .read = uvc_debugfs_stats_read,
69 .release = uvc_debugfs_stats_release,
70};
71
72/* -----------------------------------------------------------------------------
73 * Global and stream initialization/cleanup
74 */
75
76static struct dentry *uvc_debugfs_root_dir;
77
78int uvc_debugfs_init_stream(struct uvc_streaming *stream)
79{
80 struct usb_device *udev = stream->dev->udev;
81 struct dentry *dent;
82 char dir_name[32];
83
84 if (uvc_debugfs_root_dir == NULL)
85 return -ENODEV;
86
87 sprintf(dir_name, "%u-%u", udev->bus->busnum, udev->devnum);
88
89 dent = debugfs_create_dir(dir_name, uvc_debugfs_root_dir);
90 if (IS_ERR_OR_NULL(dent)) {
91 uvc_printk(KERN_INFO, "Unable to create debugfs %s "
92 "directory.\n", dir_name);
93 return -ENODEV;
94 }
95
96 stream->debugfs_dir = dent;
97
98 dent = debugfs_create_file("stats", 0444, stream->debugfs_dir,
99 stream, &uvc_debugfs_stats_fops);
100 if (IS_ERR_OR_NULL(dent)) {
101 uvc_printk(KERN_INFO, "Unable to create debugfs stats file.\n");
102 uvc_debugfs_cleanup_stream(stream);
103 return -ENODEV;
104 }
105
106 return 0;
107}
108
109void uvc_debugfs_cleanup_stream(struct uvc_streaming *stream)
110{
111 if (stream->debugfs_dir == NULL)
112 return;
113
114 debugfs_remove_recursive(stream->debugfs_dir);
115 stream->debugfs_dir = NULL;
116}
117
118int uvc_debugfs_init(void)
119{
120 struct dentry *dir;
121
122 dir = debugfs_create_dir("uvcvideo", usb_debug_root);
123 if (IS_ERR_OR_NULL(dir)) {
124 uvc_printk(KERN_INFO, "Unable to create debugfs directory\n");
125 return -ENODATA;
126 }
127
128 uvc_debugfs_root_dir = dir;
129 return 0;
130}
131
132void uvc_debugfs_cleanup(void)
133{
134 if (uvc_debugfs_root_dir != NULL)
135 debugfs_remove_recursive(uvc_debugfs_root_dir);
136}
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c
index 656d4c9e3b9..a240d43d15d 100644
--- a/drivers/media/video/uvc/uvc_driver.c
+++ b/drivers/media/video/uvc/uvc_driver.c
@@ -1675,6 +1675,8 @@ static void uvc_unregister_video(struct uvc_device *dev)
1675 1675
1676 video_unregister_device(stream->vdev); 1676 video_unregister_device(stream->vdev);
1677 stream->vdev = NULL; 1677 stream->vdev = NULL;
1678
1679 uvc_debugfs_cleanup_stream(stream);
1678 } 1680 }
1679 1681
1680 /* Decrement the stream count and call uvc_delete explicitly if there 1682 /* Decrement the stream count and call uvc_delete explicitly if there
@@ -1700,6 +1702,8 @@ static int uvc_register_video(struct uvc_device *dev,
1700 return ret; 1702 return ret;
1701 } 1703 }
1702 1704
1705 uvc_debugfs_init_stream(stream);
1706
1703 /* Register the device with V4L. */ 1707 /* Register the device with V4L. */
1704 vdev = video_device_alloc(); 1708 vdev = video_device_alloc();
1705 if (vdev == NULL) { 1709 if (vdev == NULL) {
@@ -2033,6 +2037,15 @@ MODULE_PARM_DESC(timeout, "Streaming control requests timeout");
2033 * though they are compliant. 2037 * though they are compliant.
2034 */ 2038 */
2035static struct usb_device_id uvc_ids[] = { 2039static struct usb_device_id uvc_ids[] = {
2040 /* LogiLink Wireless Webcam */
2041 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE
2042 | USB_DEVICE_ID_MATCH_INT_INFO,
2043 .idVendor = 0x0416,
2044 .idProduct = 0xa91a,
2045 .bInterfaceClass = USB_CLASS_VIDEO,
2046 .bInterfaceSubClass = 1,
2047 .bInterfaceProtocol = 0,
2048 .driver_info = UVC_QUIRK_PROBE_MINMAX },
2036 /* Genius eFace 2025 */ 2049 /* Genius eFace 2025 */
2037 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE 2050 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE
2038 | USB_DEVICE_ID_MATCH_INT_INFO, 2051 | USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2396,17 +2409,24 @@ struct uvc_driver uvc_driver = {
2396 2409
2397static int __init uvc_init(void) 2410static int __init uvc_init(void)
2398{ 2411{
2399 int result; 2412 int ret;
2413
2414 uvc_debugfs_init();
2400 2415
2401 result = usb_register(&uvc_driver.driver); 2416 ret = usb_register(&uvc_driver.driver);
2402 if (result == 0) 2417 if (ret < 0) {
2403 printk(KERN_INFO DRIVER_DESC " (" DRIVER_VERSION ")\n"); 2418 uvc_debugfs_cleanup();
2404 return result; 2419 return ret;
2420 }
2421
2422 printk(KERN_INFO DRIVER_DESC " (" DRIVER_VERSION ")\n");
2423 return 0;
2405} 2424}
2406 2425
2407static void __exit uvc_cleanup(void) 2426static void __exit uvc_cleanup(void)
2408{ 2427{
2409 usb_deregister(&uvc_driver.driver); 2428 usb_deregister(&uvc_driver.driver);
2429 uvc_debugfs_cleanup();
2410} 2430}
2411 2431
2412module_init(uvc_init); 2432module_init(uvc_init);
diff --git a/drivers/media/video/uvc/uvc_isight.c b/drivers/media/video/uvc/uvc_isight.c
index 74bbe8f18f3..8510e7259e7 100644
--- a/drivers/media/video/uvc/uvc_isight.c
+++ b/drivers/media/video/uvc/uvc_isight.c
@@ -74,7 +74,7 @@ static int isight_decode(struct uvc_video_queue *queue, struct uvc_buffer *buf,
74 * Empty buffers (bytesused == 0) don't trigger end of frame detection 74 * Empty buffers (bytesused == 0) don't trigger end of frame detection
75 * as it doesn't make sense to return an empty buffer. 75 * as it doesn't make sense to return an empty buffer.
76 */ 76 */
77 if (is_header && buf->buf.bytesused != 0) { 77 if (is_header && buf->bytesused != 0) {
78 buf->state = UVC_BUF_STATE_DONE; 78 buf->state = UVC_BUF_STATE_DONE;
79 return -EAGAIN; 79 return -EAGAIN;
80 } 80 }
@@ -83,13 +83,13 @@ static int isight_decode(struct uvc_video_queue *queue, struct uvc_buffer *buf,
83 * contain no data. 83 * contain no data.
84 */ 84 */
85 if (!is_header) { 85 if (!is_header) {
86 maxlen = buf->buf.length - buf->buf.bytesused; 86 maxlen = buf->length - buf->bytesused;
87 mem = queue->mem + buf->buf.m.offset + buf->buf.bytesused; 87 mem = buf->mem + buf->bytesused;
88 nbytes = min(len, maxlen); 88 nbytes = min(len, maxlen);
89 memcpy(mem, data, nbytes); 89 memcpy(mem, data, nbytes);
90 buf->buf.bytesused += nbytes; 90 buf->bytesused += nbytes;
91 91
92 if (len > maxlen || buf->buf.bytesused == buf->buf.length) { 92 if (len > maxlen || buf->bytesused == buf->length) {
93 uvc_trace(UVC_TRACE_FRAME, "Frame complete " 93 uvc_trace(UVC_TRACE_FRAME, "Frame complete "
94 "(overflow).\n"); 94 "(overflow).\n");
95 buf->state = UVC_BUF_STATE_DONE; 95 buf->state = UVC_BUF_STATE_DONE;
diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c
index 677691c4450..518f77d3a4d 100644
--- a/drivers/media/video/uvc/uvc_queue.c
+++ b/drivers/media/video/uvc/uvc_queue.c
@@ -11,6 +11,7 @@
11 * 11 *
12 */ 12 */
13 13
14#include <linux/atomic.h>
14#include <linux/kernel.h> 15#include <linux/kernel.h>
15#include <linux/mm.h> 16#include <linux/mm.h>
16#include <linux/list.h> 17#include <linux/list.h>
@@ -19,7 +20,7 @@
19#include <linux/videodev2.h> 20#include <linux/videodev2.h>
20#include <linux/vmalloc.h> 21#include <linux/vmalloc.h>
21#include <linux/wait.h> 22#include <linux/wait.h>
22#include <linux/atomic.h> 23#include <media/videobuf2-vmalloc.h>
23 24
24#include "uvcvideo.h" 25#include "uvcvideo.h"
25 26
@@ -29,467 +30,211 @@
29 * Video queues is initialized by uvc_queue_init(). The function performs 30 * Video queues is initialized by uvc_queue_init(). The function performs
30 * basic initialization of the uvc_video_queue struct and never fails. 31 * basic initialization of the uvc_video_queue struct and never fails.
31 * 32 *
32 * Video buffer allocation and freeing are performed by uvc_alloc_buffers and 33 * Video buffers are managed by videobuf2. The driver uses a mutex to protect
33 * uvc_free_buffers respectively. The former acquires the video queue lock, 34 * the videobuf2 queue operations by serializing calls to videobuf2 and a
34 * while the later must be called with the lock held (so that allocation can 35 * spinlock to protect the IRQ queue that holds the buffers to be processed by
35 * free previously allocated buffers). Trying to free buffers that are mapped 36 * the driver.
36 * to user space will return -EBUSY.
37 *
38 * Video buffers are managed using two queues. However, unlike most USB video
39 * drivers that use an in queue and an out queue, we use a main queue to hold
40 * all queued buffers (both 'empty' and 'done' buffers), and an irq queue to
41 * hold empty buffers. This design (copied from video-buf) minimizes locking
42 * in interrupt, as only one queue is shared between interrupt and user
43 * contexts.
44 *
45 * Use cases
46 * ---------
47 *
48 * Unless stated otherwise, all operations that modify the irq buffers queue
49 * are protected by the irq spinlock.
50 *
51 * 1. The user queues the buffers, starts streaming and dequeues a buffer.
52 *
53 * The buffers are added to the main and irq queues. Both operations are
54 * protected by the queue lock, and the later is protected by the irq
55 * spinlock as well.
56 *
57 * The completion handler fetches a buffer from the irq queue and fills it
58 * with video data. If no buffer is available (irq queue empty), the handler
59 * returns immediately.
60 *
61 * When the buffer is full, the completion handler removes it from the irq
62 * queue, marks it as done (UVC_BUF_STATE_DONE) and wakes its wait queue.
63 * At that point, any process waiting on the buffer will be woken up. If a
64 * process tries to dequeue a buffer after it has been marked done, the
65 * dequeing will succeed immediately.
66 *
67 * 2. Buffers are queued, user is waiting on a buffer and the device gets
68 * disconnected.
69 *
70 * When the device is disconnected, the kernel calls the completion handler
71 * with an appropriate status code. The handler marks all buffers in the
72 * irq queue as being erroneous (UVC_BUF_STATE_ERROR) and wakes them up so
73 * that any process waiting on a buffer gets woken up.
74 *
75 * Waking up up the first buffer on the irq list is not enough, as the
76 * process waiting on the buffer might restart the dequeue operation
77 * immediately.
78 *
79 */ 37 */
80 38
81void uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type, 39/* -----------------------------------------------------------------------------
82 int drop_corrupted) 40 * videobuf2 queue operations
83{
84 mutex_init(&queue->mutex);
85 spin_lock_init(&queue->irqlock);
86 INIT_LIST_HEAD(&queue->mainqueue);
87 INIT_LIST_HEAD(&queue->irqqueue);
88 queue->flags = drop_corrupted ? UVC_QUEUE_DROP_CORRUPTED : 0;
89 queue->type = type;
90}
91
92/*
93 * Free the video buffers.
94 *
95 * This function must be called with the queue lock held.
96 */ 41 */
97static int __uvc_free_buffers(struct uvc_video_queue *queue) 42
43static int uvc_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
44 unsigned int *nbuffers, unsigned int *nplanes,
45 unsigned int sizes[], void *alloc_ctxs[])
98{ 46{
99 unsigned int i; 47 struct uvc_video_queue *queue = vb2_get_drv_priv(vq);
48 struct uvc_streaming *stream =
49 container_of(queue, struct uvc_streaming, queue);
100 50
101 for (i = 0; i < queue->count; ++i) { 51 if (*nbuffers > UVC_MAX_VIDEO_BUFFERS)
102 if (queue->buffer[i].vma_use_count != 0) 52 *nbuffers = UVC_MAX_VIDEO_BUFFERS;
103 return -EBUSY;
104 }
105 53
106 if (queue->count) { 54 *nplanes = 1;
107 uvc_queue_cancel(queue, 0); 55
108 INIT_LIST_HEAD(&queue->mainqueue); 56 sizes[0] = stream->ctrl.dwMaxVideoFrameSize;
109 vfree(queue->mem);
110 queue->count = 0;
111 }
112 57
113 return 0; 58 return 0;
114} 59}
115 60
116int uvc_free_buffers(struct uvc_video_queue *queue) 61static int uvc_buffer_prepare(struct vb2_buffer *vb)
117{ 62{
118 int ret; 63 struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
64 struct uvc_buffer *buf = container_of(vb, struct uvc_buffer, buf);
119 65
120 mutex_lock(&queue->mutex); 66 if (vb->v4l2_buf.type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
121 ret = __uvc_free_buffers(queue); 67 vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0)) {
122 mutex_unlock(&queue->mutex); 68 uvc_trace(UVC_TRACE_CAPTURE, "[E] Bytes used out of bounds.\n");
69 return -EINVAL;
70 }
123 71
124 return ret; 72 if (unlikely(queue->flags & UVC_QUEUE_DISCONNECTED))
125} 73 return -ENODEV;
126 74
127/* 75 buf->state = UVC_BUF_STATE_QUEUED;
128 * Allocate the video buffers. 76 buf->error = 0;
129 * 77 buf->mem = vb2_plane_vaddr(vb, 0);
130 * Pages are reserved to make sure they will not be swapped, as they will be 78 buf->length = vb2_plane_size(vb, 0);
131 * filled in the URB completion handler. 79 if (vb->v4l2_buf.type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
132 * 80 buf->bytesused = 0;
133 * Buffers will be individually mapped, so they must all be page aligned. 81 else
134 */ 82 buf->bytesused = vb2_get_plane_payload(vb, 0);
135int uvc_alloc_buffers(struct uvc_video_queue *queue, unsigned int nbuffers,
136 unsigned int buflength)
137{
138 unsigned int bufsize = PAGE_ALIGN(buflength);
139 unsigned int i;
140 void *mem = NULL;
141 int ret;
142 83
143 if (nbuffers > UVC_MAX_VIDEO_BUFFERS) 84 return 0;
144 nbuffers = UVC_MAX_VIDEO_BUFFERS; 85}
145 86
146 mutex_lock(&queue->mutex); 87static void uvc_buffer_queue(struct vb2_buffer *vb)
88{
89 struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
90 struct uvc_buffer *buf = container_of(vb, struct uvc_buffer, buf);
91 unsigned long flags;
147 92
148 if ((ret = __uvc_free_buffers(queue)) < 0) 93 spin_lock_irqsave(&queue->irqlock, flags);
149 goto done; 94 if (likely(!(queue->flags & UVC_QUEUE_DISCONNECTED))) {
95 list_add_tail(&buf->queue, &queue->irqqueue);
96 } else {
97 /* If the device is disconnected return the buffer to userspace
98 * directly. The next QBUF call will fail with -ENODEV.
99 */
100 buf->state = UVC_BUF_STATE_ERROR;
101 vb2_buffer_done(&buf->buf, VB2_BUF_STATE_ERROR);
102 }
150 103
151 /* Bail out if no buffers should be allocated. */ 104 spin_unlock_irqrestore(&queue->irqlock, flags);
152 if (nbuffers == 0) 105}
153 goto done;
154 106
155 /* Decrement the number of buffers until allocation succeeds. */ 107static int uvc_buffer_finish(struct vb2_buffer *vb)
156 for (; nbuffers > 0; --nbuffers) { 108{
157 mem = vmalloc_32(nbuffers * bufsize); 109 struct uvc_video_queue *queue = vb2_get_drv_priv(vb->vb2_queue);
158 if (mem != NULL) 110 struct uvc_streaming *stream =
159 break; 111 container_of(queue, struct uvc_streaming, queue);
160 } 112 struct uvc_buffer *buf = container_of(vb, struct uvc_buffer, buf);
161 113
162 if (mem == NULL) { 114 uvc_video_clock_update(stream, &vb->v4l2_buf, buf);
163 ret = -ENOMEM; 115 return 0;
164 goto done; 116}
165 }
166 117
167 for (i = 0; i < nbuffers; ++i) { 118static struct vb2_ops uvc_queue_qops = {
168 memset(&queue->buffer[i], 0, sizeof queue->buffer[i]); 119 .queue_setup = uvc_queue_setup,
169 queue->buffer[i].buf.index = i; 120 .buf_prepare = uvc_buffer_prepare,
170 queue->buffer[i].buf.m.offset = i * bufsize; 121 .buf_queue = uvc_buffer_queue,
171 queue->buffer[i].buf.length = buflength; 122 .buf_finish = uvc_buffer_finish,
172 queue->buffer[i].buf.type = queue->type; 123};
173 queue->buffer[i].buf.field = V4L2_FIELD_NONE;
174 queue->buffer[i].buf.memory = V4L2_MEMORY_MMAP;
175 queue->buffer[i].buf.flags = 0;
176 init_waitqueue_head(&queue->buffer[i].wait);
177 }
178 124
179 queue->mem = mem; 125void uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type,
180 queue->count = nbuffers; 126 int drop_corrupted)
181 queue->buf_size = bufsize; 127{
182 ret = nbuffers; 128 queue->queue.type = type;
129 queue->queue.io_modes = VB2_MMAP;
130 queue->queue.drv_priv = queue;
131 queue->queue.buf_struct_size = sizeof(struct uvc_buffer);
132 queue->queue.ops = &uvc_queue_qops;
133 queue->queue.mem_ops = &vb2_vmalloc_memops;
134 vb2_queue_init(&queue->queue);
183 135
184done: 136 mutex_init(&queue->mutex);
185 mutex_unlock(&queue->mutex); 137 spin_lock_init(&queue->irqlock);
186 return ret; 138 INIT_LIST_HEAD(&queue->irqqueue);
139 queue->flags = drop_corrupted ? UVC_QUEUE_DROP_CORRUPTED : 0;
187} 140}
188 141
189/* 142/* -----------------------------------------------------------------------------
190 * Check if buffers have been allocated. 143 * V4L2 queue operations
191 */ 144 */
192int uvc_queue_allocated(struct uvc_video_queue *queue) 145
146int uvc_alloc_buffers(struct uvc_video_queue *queue,
147 struct v4l2_requestbuffers *rb)
193{ 148{
194 int allocated; 149 int ret;
195 150
196 mutex_lock(&queue->mutex); 151 mutex_lock(&queue->mutex);
197 allocated = queue->count != 0; 152 ret = vb2_reqbufs(&queue->queue, rb);
198 mutex_unlock(&queue->mutex); 153 mutex_unlock(&queue->mutex);
199 154
200 return allocated; 155 return ret ? ret : rb->count;
201} 156}
202 157
203static void __uvc_query_buffer(struct uvc_buffer *buf, 158void uvc_free_buffers(struct uvc_video_queue *queue)
204 struct v4l2_buffer *v4l2_buf)
205{ 159{
206 memcpy(v4l2_buf, &buf->buf, sizeof *v4l2_buf); 160 mutex_lock(&queue->mutex);
207 161 vb2_queue_release(&queue->queue);
208 if (buf->vma_use_count) 162 mutex_unlock(&queue->mutex);
209 v4l2_buf->flags |= V4L2_BUF_FLAG_MAPPED;
210
211 switch (buf->state) {
212 case UVC_BUF_STATE_ERROR:
213 case UVC_BUF_STATE_DONE:
214 v4l2_buf->flags |= V4L2_BUF_FLAG_DONE;
215 break;
216 case UVC_BUF_STATE_QUEUED:
217 case UVC_BUF_STATE_ACTIVE:
218 case UVC_BUF_STATE_READY:
219 v4l2_buf->flags |= V4L2_BUF_FLAG_QUEUED;
220 break;
221 case UVC_BUF_STATE_IDLE:
222 default:
223 break;
224 }
225} 163}
226 164
227int uvc_query_buffer(struct uvc_video_queue *queue, 165int uvc_query_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *buf)
228 struct v4l2_buffer *v4l2_buf)
229{ 166{
230 int ret = 0; 167 int ret;
231 168
232 mutex_lock(&queue->mutex); 169 mutex_lock(&queue->mutex);
233 if (v4l2_buf->index >= queue->count) { 170 ret = vb2_querybuf(&queue->queue, buf);
234 ret = -EINVAL;
235 goto done;
236 }
237
238 __uvc_query_buffer(&queue->buffer[v4l2_buf->index], v4l2_buf);
239
240done:
241 mutex_unlock(&queue->mutex); 171 mutex_unlock(&queue->mutex);
172
242 return ret; 173 return ret;
243} 174}
244 175
245/* 176int uvc_queue_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *buf)
246 * Queue a video buffer. Attempting to queue a buffer that has already been
247 * queued will return -EINVAL.
248 */
249int uvc_queue_buffer(struct uvc_video_queue *queue,
250 struct v4l2_buffer *v4l2_buf)
251{ 177{
252 struct uvc_buffer *buf; 178 int ret;
253 unsigned long flags;
254 int ret = 0;
255
256 uvc_trace(UVC_TRACE_CAPTURE, "Queuing buffer %u.\n", v4l2_buf->index);
257
258 if (v4l2_buf->type != queue->type ||
259 v4l2_buf->memory != V4L2_MEMORY_MMAP) {
260 uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer type (%u) "
261 "and/or memory (%u).\n", v4l2_buf->type,
262 v4l2_buf->memory);
263 return -EINVAL;
264 }
265 179
266 mutex_lock(&queue->mutex); 180 mutex_lock(&queue->mutex);
267 if (v4l2_buf->index >= queue->count) { 181 ret = vb2_qbuf(&queue->queue, buf);
268 uvc_trace(UVC_TRACE_CAPTURE, "[E] Out of range index.\n");
269 ret = -EINVAL;
270 goto done;
271 }
272
273 buf = &queue->buffer[v4l2_buf->index];
274 if (buf->state != UVC_BUF_STATE_IDLE) {
275 uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer state "
276 "(%u).\n", buf->state);
277 ret = -EINVAL;
278 goto done;
279 }
280
281 if (v4l2_buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
282 v4l2_buf->bytesused > buf->buf.length) {
283 uvc_trace(UVC_TRACE_CAPTURE, "[E] Bytes used out of bounds.\n");
284 ret = -EINVAL;
285 goto done;
286 }
287
288 spin_lock_irqsave(&queue->irqlock, flags);
289 if (queue->flags & UVC_QUEUE_DISCONNECTED) {
290 spin_unlock_irqrestore(&queue->irqlock, flags);
291 ret = -ENODEV;
292 goto done;
293 }
294 buf->state = UVC_BUF_STATE_QUEUED;
295 if (v4l2_buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
296 buf->buf.bytesused = 0;
297 else
298 buf->buf.bytesused = v4l2_buf->bytesused;
299
300 list_add_tail(&buf->stream, &queue->mainqueue);
301 list_add_tail(&buf->queue, &queue->irqqueue);
302 spin_unlock_irqrestore(&queue->irqlock, flags);
303
304done:
305 mutex_unlock(&queue->mutex); 182 mutex_unlock(&queue->mutex);
306 return ret;
307}
308 183
309static int uvc_queue_waiton(struct uvc_buffer *buf, int nonblocking) 184 return ret;
310{
311 if (nonblocking) {
312 return (buf->state != UVC_BUF_STATE_QUEUED &&
313 buf->state != UVC_BUF_STATE_ACTIVE &&
314 buf->state != UVC_BUF_STATE_READY)
315 ? 0 : -EAGAIN;
316 }
317
318 return wait_event_interruptible(buf->wait,
319 buf->state != UVC_BUF_STATE_QUEUED &&
320 buf->state != UVC_BUF_STATE_ACTIVE &&
321 buf->state != UVC_BUF_STATE_READY);
322} 185}
323 186
324/* 187int uvc_dequeue_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *buf,
325 * Dequeue a video buffer. If nonblocking is false, block until a buffer is 188 int nonblocking)
326 * available.
327 */
328int uvc_dequeue_buffer(struct uvc_video_queue *queue,
329 struct v4l2_buffer *v4l2_buf, int nonblocking)
330{ 189{
331 struct uvc_buffer *buf; 190 int ret;
332 int ret = 0;
333
334 if (v4l2_buf->type != queue->type ||
335 v4l2_buf->memory != V4L2_MEMORY_MMAP) {
336 uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer type (%u) "
337 "and/or memory (%u).\n", v4l2_buf->type,
338 v4l2_buf->memory);
339 return -EINVAL;
340 }
341 191
342 mutex_lock(&queue->mutex); 192 mutex_lock(&queue->mutex);
343 if (list_empty(&queue->mainqueue)) { 193 ret = vb2_dqbuf(&queue->queue, buf, nonblocking);
344 uvc_trace(UVC_TRACE_CAPTURE, "[E] Empty buffer queue.\n");
345 ret = -EINVAL;
346 goto done;
347 }
348
349 buf = list_first_entry(&queue->mainqueue, struct uvc_buffer, stream);
350 if ((ret = uvc_queue_waiton(buf, nonblocking)) < 0)
351 goto done;
352
353 uvc_trace(UVC_TRACE_CAPTURE, "Dequeuing buffer %u (%u, %u bytes).\n",
354 buf->buf.index, buf->state, buf->buf.bytesused);
355
356 switch (buf->state) {
357 case UVC_BUF_STATE_ERROR:
358 uvc_trace(UVC_TRACE_CAPTURE, "[W] Corrupted data "
359 "(transmission error).\n");
360 ret = -EIO;
361 case UVC_BUF_STATE_DONE:
362 buf->state = UVC_BUF_STATE_IDLE;
363 break;
364
365 case UVC_BUF_STATE_IDLE:
366 case UVC_BUF_STATE_QUEUED:
367 case UVC_BUF_STATE_ACTIVE:
368 case UVC_BUF_STATE_READY:
369 default:
370 uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer state %u "
371 "(driver bug?).\n", buf->state);
372 ret = -EINVAL;
373 goto done;
374 }
375
376 list_del(&buf->stream);
377 __uvc_query_buffer(buf, v4l2_buf);
378
379done:
380 mutex_unlock(&queue->mutex); 194 mutex_unlock(&queue->mutex);
381 return ret;
382}
383 195
384/* 196 return ret;
385 * VMA operations.
386 */
387static void uvc_vm_open(struct vm_area_struct *vma)
388{
389 struct uvc_buffer *buffer = vma->vm_private_data;
390 buffer->vma_use_count++;
391}
392
393static void uvc_vm_close(struct vm_area_struct *vma)
394{
395 struct uvc_buffer *buffer = vma->vm_private_data;
396 buffer->vma_use_count--;
397} 197}
398 198
399static const struct vm_operations_struct uvc_vm_ops = {
400 .open = uvc_vm_open,
401 .close = uvc_vm_close,
402};
403
404/*
405 * Memory-map a video buffer.
406 *
407 * This function implements video buffers memory mapping and is intended to be
408 * used by the device mmap handler.
409 */
410int uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma) 199int uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma)
411{ 200{
412 struct uvc_buffer *uninitialized_var(buffer); 201 int ret;
413 struct page *page;
414 unsigned long addr, start, size;
415 unsigned int i;
416 int ret = 0;
417
418 start = vma->vm_start;
419 size = vma->vm_end - vma->vm_start;
420 202
421 mutex_lock(&queue->mutex); 203 mutex_lock(&queue->mutex);
204 ret = vb2_mmap(&queue->queue, vma);
205 mutex_unlock(&queue->mutex);
422 206
423 for (i = 0; i < queue->count; ++i) { 207 return ret;
424 buffer = &queue->buffer[i]; 208}
425 if ((buffer->buf.m.offset >> PAGE_SHIFT) == vma->vm_pgoff)
426 break;
427 }
428
429 if (i == queue->count || PAGE_ALIGN(size) != queue->buf_size) {
430 ret = -EINVAL;
431 goto done;
432 }
433
434 /*
435 * VM_IO marks the area as being an mmaped region for I/O to a
436 * device. It also prevents the region from being core dumped.
437 */
438 vma->vm_flags |= VM_IO;
439
440 addr = (unsigned long)queue->mem + buffer->buf.m.offset;
441#ifdef CONFIG_MMU
442 while (size > 0) {
443 page = vmalloc_to_page((void *)addr);
444 if ((ret = vm_insert_page(vma, start, page)) < 0)
445 goto done;
446
447 start += PAGE_SIZE;
448 addr += PAGE_SIZE;
449 size -= PAGE_SIZE;
450 }
451#endif
452 209
453 vma->vm_ops = &uvc_vm_ops; 210unsigned int uvc_queue_poll(struct uvc_video_queue *queue, struct file *file,
454 vma->vm_private_data = buffer; 211 poll_table *wait)
455 uvc_vm_open(vma); 212{
213 unsigned int ret;
456 214
457done: 215 mutex_lock(&queue->mutex);
216 ret = vb2_poll(&queue->queue, file, wait);
458 mutex_unlock(&queue->mutex); 217 mutex_unlock(&queue->mutex);
218
459 return ret; 219 return ret;
460} 220}
461 221
462/* 222/* -----------------------------------------------------------------------------
463 * Poll the video queue.
464 * 223 *
465 * This function implements video queue polling and is intended to be used by
466 * the device poll handler.
467 */ 224 */
468unsigned int uvc_queue_poll(struct uvc_video_queue *queue, struct file *file, 225
469 poll_table *wait) 226/*
227 * Check if buffers have been allocated.
228 */
229int uvc_queue_allocated(struct uvc_video_queue *queue)
470{ 230{
471 struct uvc_buffer *buf; 231 int allocated;
472 unsigned int mask = 0;
473 232
474 mutex_lock(&queue->mutex); 233 mutex_lock(&queue->mutex);
475 if (list_empty(&queue->mainqueue)) { 234 allocated = vb2_is_busy(&queue->queue);
476 mask |= POLLERR;
477 goto done;
478 }
479 buf = list_first_entry(&queue->mainqueue, struct uvc_buffer, stream);
480
481 poll_wait(file, &buf->wait, wait);
482 if (buf->state == UVC_BUF_STATE_DONE ||
483 buf->state == UVC_BUF_STATE_ERROR) {
484 if (queue->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
485 mask |= POLLIN | POLLRDNORM;
486 else
487 mask |= POLLOUT | POLLWRNORM;
488 }
489
490done:
491 mutex_unlock(&queue->mutex); 235 mutex_unlock(&queue->mutex);
492 return mask; 236
237 return allocated;
493} 238}
494 239
495#ifndef CONFIG_MMU 240#ifndef CONFIG_MMU
@@ -515,7 +260,7 @@ unsigned long uvc_queue_get_unmapped_area(struct uvc_video_queue *queue,
515 ret = -EINVAL; 260 ret = -EINVAL;
516 goto done; 261 goto done;
517 } 262 }
518 ret = (unsigned long)queue->mem + buffer->buf.m.offset; 263 ret = (unsigned long)buf->mem;
519done: 264done:
520 mutex_unlock(&queue->mutex); 265 mutex_unlock(&queue->mutex);
521 return ret; 266 return ret;
@@ -540,27 +285,24 @@ done:
540 */ 285 */
541int uvc_queue_enable(struct uvc_video_queue *queue, int enable) 286int uvc_queue_enable(struct uvc_video_queue *queue, int enable)
542{ 287{
543 unsigned int i; 288 unsigned long flags;
544 int ret = 0; 289 int ret;
545 290
546 mutex_lock(&queue->mutex); 291 mutex_lock(&queue->mutex);
547 if (enable) { 292 if (enable) {
548 if (uvc_queue_streaming(queue)) { 293 ret = vb2_streamon(&queue->queue, queue->queue.type);
549 ret = -EBUSY; 294 if (ret < 0)
550 goto done; 295 goto done;
551 } 296
552 queue->flags |= UVC_QUEUE_STREAMING;
553 queue->buf_used = 0; 297 queue->buf_used = 0;
554 } else { 298 } else {
555 uvc_queue_cancel(queue, 0); 299 ret = vb2_streamoff(&queue->queue, queue->queue.type);
556 INIT_LIST_HEAD(&queue->mainqueue); 300 if (ret < 0)
557 301 goto done;
558 for (i = 0; i < queue->count; ++i) {
559 queue->buffer[i].error = 0;
560 queue->buffer[i].state = UVC_BUF_STATE_IDLE;
561 }
562 302
563 queue->flags &= ~UVC_QUEUE_STREAMING; 303 spin_lock_irqsave(&queue->irqlock, flags);
304 INIT_LIST_HEAD(&queue->irqqueue);
305 spin_unlock_irqrestore(&queue->irqlock, flags);
564 } 306 }
565 307
566done: 308done:
@@ -591,12 +333,12 @@ void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect)
591 queue); 333 queue);
592 list_del(&buf->queue); 334 list_del(&buf->queue);
593 buf->state = UVC_BUF_STATE_ERROR; 335 buf->state = UVC_BUF_STATE_ERROR;
594 wake_up(&buf->wait); 336 vb2_buffer_done(&buf->buf, VB2_BUF_STATE_ERROR);
595 } 337 }
596 /* This must be protected by the irqlock spinlock to avoid race 338 /* This must be protected by the irqlock spinlock to avoid race
597 * conditions between uvc_queue_buffer and the disconnection event that 339 * conditions between uvc_buffer_queue and the disconnection event that
598 * could result in an interruptible wait in uvc_dequeue_buffer. Do not 340 * could result in an interruptible wait in uvc_dequeue_buffer. Do not
599 * blindly replace this logic by checking for the UVC_DEV_DISCONNECTED 341 * blindly replace this logic by checking for the UVC_QUEUE_DISCONNECTED
600 * state outside the queue code. 342 * state outside the queue code.
601 */ 343 */
602 if (disconnect) 344 if (disconnect)
@@ -613,14 +355,12 @@ struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
613 if ((queue->flags & UVC_QUEUE_DROP_CORRUPTED) && buf->error) { 355 if ((queue->flags & UVC_QUEUE_DROP_CORRUPTED) && buf->error) {
614 buf->error = 0; 356 buf->error = 0;
615 buf->state = UVC_BUF_STATE_QUEUED; 357 buf->state = UVC_BUF_STATE_QUEUED;
616 buf->buf.bytesused = 0; 358 vb2_set_plane_payload(&buf->buf, 0, 0);
617 return buf; 359 return buf;
618 } 360 }
619 361
620 spin_lock_irqsave(&queue->irqlock, flags); 362 spin_lock_irqsave(&queue->irqlock, flags);
621 list_del(&buf->queue); 363 list_del(&buf->queue);
622 buf->error = 0;
623 buf->state = UVC_BUF_STATE_DONE;
624 if (!list_empty(&queue->irqqueue)) 364 if (!list_empty(&queue->irqqueue))
625 nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer, 365 nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer,
626 queue); 366 queue);
@@ -628,7 +368,9 @@ struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
628 nextbuf = NULL; 368 nextbuf = NULL;
629 spin_unlock_irqrestore(&queue->irqlock, flags); 369 spin_unlock_irqrestore(&queue->irqlock, flags);
630 370
631 wake_up(&buf->wait); 371 buf->state = buf->error ? VB2_BUF_STATE_ERROR : UVC_BUF_STATE_DONE;
372 vb2_set_plane_payload(&buf->buf, 0, buf->bytesused);
373 vb2_buffer_done(&buf->buf, VB2_BUF_STATE_DONE);
374
632 return nextbuf; 375 return nextbuf;
633} 376}
634
diff --git a/drivers/media/video/uvc/uvc_v4l2.c b/drivers/media/video/uvc/uvc_v4l2.c
index dadf11f704d..2ae4f880ea0 100644
--- a/drivers/media/video/uvc/uvc_v4l2.c
+++ b/drivers/media/video/uvc/uvc_v4l2.c
@@ -58,6 +58,15 @@ static int uvc_ioctl_ctrl_map(struct uvc_video_chain *chain,
58 break; 58 break;
59 59
60 case V4L2_CTRL_TYPE_MENU: 60 case V4L2_CTRL_TYPE_MENU:
61 /* Prevent excessive memory consumption, as well as integer
62 * overflows.
63 */
64 if (xmap->menu_count == 0 ||
65 xmap->menu_count > UVC_MAX_CONTROL_MENU_ENTRIES) {
66 ret = -EINVAL;
67 goto done;
68 }
69
61 size = xmap->menu_count * sizeof(*map->menu_info); 70 size = xmap->menu_count * sizeof(*map->menu_info);
62 map->menu_info = kmalloc(size, GFP_KERNEL); 71 map->menu_info = kmalloc(size, GFP_KERNEL);
63 if (map->menu_info == NULL) { 72 if (map->menu_info == NULL) {
@@ -513,10 +522,7 @@ static int uvc_v4l2_release(struct file *file)
513 /* Only free resources if this is a privileged handle. */ 522 /* Only free resources if this is a privileged handle. */
514 if (uvc_has_privileges(handle)) { 523 if (uvc_has_privileges(handle)) {
515 uvc_video_enable(stream, 0); 524 uvc_video_enable(stream, 0);
516 525 uvc_free_buffers(&stream->queue);
517 if (uvc_free_buffers(&stream->queue) < 0)
518 uvc_printk(KERN_ERR, "uvc_v4l2_release: Unable to "
519 "free buffers.\n");
520 } 526 }
521 527
522 /* Release the file handle. */ 528 /* Release the file handle. */
@@ -914,19 +920,11 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
914 920
915 /* Buffers & streaming */ 921 /* Buffers & streaming */
916 case VIDIOC_REQBUFS: 922 case VIDIOC_REQBUFS:
917 {
918 struct v4l2_requestbuffers *rb = arg;
919
920 if (rb->type != stream->type ||
921 rb->memory != V4L2_MEMORY_MMAP)
922 return -EINVAL;
923
924 if ((ret = uvc_acquire_privileges(handle)) < 0) 923 if ((ret = uvc_acquire_privileges(handle)) < 0)
925 return ret; 924 return ret;
926 925
927 mutex_lock(&stream->mutex); 926 mutex_lock(&stream->mutex);
928 ret = uvc_alloc_buffers(&stream->queue, rb->count, 927 ret = uvc_alloc_buffers(&stream->queue, arg);
929 stream->ctrl.dwMaxVideoFrameSize);
930 mutex_unlock(&stream->mutex); 928 mutex_unlock(&stream->mutex);
931 if (ret < 0) 929 if (ret < 0)
932 return ret; 930 return ret;
@@ -934,18 +932,13 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
934 if (ret == 0) 932 if (ret == 0)
935 uvc_dismiss_privileges(handle); 933 uvc_dismiss_privileges(handle);
936 934
937 rb->count = ret;
938 ret = 0; 935 ret = 0;
939 break; 936 break;
940 }
941 937
942 case VIDIOC_QUERYBUF: 938 case VIDIOC_QUERYBUF:
943 { 939 {
944 struct v4l2_buffer *buf = arg; 940 struct v4l2_buffer *buf = arg;
945 941
946 if (buf->type != stream->type)
947 return -EINVAL;
948
949 if (!uvc_has_privileges(handle)) 942 if (!uvc_has_privileges(handle))
950 return -EBUSY; 943 return -EBUSY;
951 944
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index b015e8e5e8b..c7e69b8f81c 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -351,25 +351,553 @@ done:
351 return ret; 351 return ret;
352} 352}
353 353
354int uvc_commit_video(struct uvc_streaming *stream, 354static int uvc_commit_video(struct uvc_streaming *stream,
355 struct uvc_streaming_control *probe) 355 struct uvc_streaming_control *probe)
356{ 356{
357 return uvc_set_video_ctrl(stream, probe, 0); 357 return uvc_set_video_ctrl(stream, probe, 0);
358} 358}
359 359
360/* -----------------------------------------------------------------------------
361 * Clocks and timestamps
362 */
363
364static void
365uvc_video_clock_decode(struct uvc_streaming *stream, struct uvc_buffer *buf,
366 const __u8 *data, int len)
367{
368 struct uvc_clock_sample *sample;
369 unsigned int header_size;
370 bool has_pts = false;
371 bool has_scr = false;
372 unsigned long flags;
373 struct timespec ts;
374 u16 host_sof;
375 u16 dev_sof;
376
377 switch (data[1] & (UVC_STREAM_PTS | UVC_STREAM_SCR)) {
378 case UVC_STREAM_PTS | UVC_STREAM_SCR:
379 header_size = 12;
380 has_pts = true;
381 has_scr = true;
382 break;
383 case UVC_STREAM_PTS:
384 header_size = 6;
385 has_pts = true;
386 break;
387 case UVC_STREAM_SCR:
388 header_size = 8;
389 has_scr = true;
390 break;
391 default:
392 header_size = 2;
393 break;
394 }
395
396 /* Check for invalid headers. */
397 if (len < header_size)
398 return;
399
400 /* Extract the timestamps:
401 *
402 * - store the frame PTS in the buffer structure
403 * - if the SCR field is present, retrieve the host SOF counter and
404 * kernel timestamps and store them with the SCR STC and SOF fields
405 * in the ring buffer
406 */
407 if (has_pts && buf != NULL)
408 buf->pts = get_unaligned_le32(&data[2]);
409
410 if (!has_scr)
411 return;
412
413 /* To limit the amount of data, drop SCRs with an SOF identical to the
414 * previous one.
415 */
416 dev_sof = get_unaligned_le16(&data[header_size - 2]);
417 if (dev_sof == stream->clock.last_sof)
418 return;
419
420 stream->clock.last_sof = dev_sof;
421
422 host_sof = usb_get_current_frame_number(stream->dev->udev);
423 ktime_get_ts(&ts);
424
425 /* The UVC specification allows device implementations that can't obtain
426 * the USB frame number to keep their own frame counters as long as they
427 * match the size and frequency of the frame number associated with USB
428 * SOF tokens. The SOF values sent by such devices differ from the USB
429 * SOF tokens by a fixed offset that needs to be estimated and accounted
430 * for to make timestamp recovery as accurate as possible.
431 *
432 * The offset is estimated the first time a device SOF value is received
433 * as the difference between the host and device SOF values. As the two
434 * SOF values can differ slightly due to transmission delays, consider
435 * that the offset is null if the difference is not higher than 10 ms
436 * (negative differences can not happen and are thus considered as an
437 * offset). The video commit control wDelay field should be used to
438 * compute a dynamic threshold instead of using a fixed 10 ms value, but
439 * devices don't report reliable wDelay values.
440 *
441 * See uvc_video_clock_host_sof() for an explanation regarding why only
442 * the 8 LSBs of the delta are kept.
443 */
444 if (stream->clock.sof_offset == (u16)-1) {
445 u16 delta_sof = (host_sof - dev_sof) & 255;
446 if (delta_sof >= 10)
447 stream->clock.sof_offset = delta_sof;
448 else
449 stream->clock.sof_offset = 0;
450 }
451
452 dev_sof = (dev_sof + stream->clock.sof_offset) & 2047;
453
454 spin_lock_irqsave(&stream->clock.lock, flags);
455
456 sample = &stream->clock.samples[stream->clock.head];
457 sample->dev_stc = get_unaligned_le32(&data[header_size - 6]);
458 sample->dev_sof = dev_sof;
459 sample->host_sof = host_sof;
460 sample->host_ts = ts;
461
462 /* Update the sliding window head and count. */
463 stream->clock.head = (stream->clock.head + 1) % stream->clock.size;
464
465 if (stream->clock.count < stream->clock.size)
466 stream->clock.count++;
467
468 spin_unlock_irqrestore(&stream->clock.lock, flags);
469}
470
471static int uvc_video_clock_init(struct uvc_streaming *stream)
472{
473 struct uvc_clock *clock = &stream->clock;
474
475 spin_lock_init(&clock->lock);
476 clock->head = 0;
477 clock->count = 0;
478 clock->size = 32;
479 clock->last_sof = -1;
480 clock->sof_offset = -1;
481
482 clock->samples = kmalloc(clock->size * sizeof(*clock->samples),
483 GFP_KERNEL);
484 if (clock->samples == NULL)
485 return -ENOMEM;
486
487 return 0;
488}
489
490static void uvc_video_clock_cleanup(struct uvc_streaming *stream)
491{
492 kfree(stream->clock.samples);
493 stream->clock.samples = NULL;
494}
495
496/*
497 * uvc_video_clock_host_sof - Return the host SOF value for a clock sample
498 *
499 * Host SOF counters reported by usb_get_current_frame_number() usually don't
500 * cover the whole 11-bits SOF range (0-2047) but are limited to the HCI frame
501 * schedule window. They can be limited to 8, 9 or 10 bits depending on the host
502 * controller and its configuration.
503 *
504 * We thus need to recover the SOF value corresponding to the host frame number.
505 * As the device and host frame numbers are sampled in a short interval, the
506 * difference between their values should be equal to a small delta plus an
507 * integer multiple of 256 caused by the host frame number limited precision.
508 *
509 * To obtain the recovered host SOF value, compute the small delta by masking
510 * the high bits of the host frame counter and device SOF difference and add it
511 * to the device SOF value.
512 */
513static u16 uvc_video_clock_host_sof(const struct uvc_clock_sample *sample)
514{
515 /* The delta value can be negative. */
516 s8 delta_sof;
517
518 delta_sof = (sample->host_sof - sample->dev_sof) & 255;
519
520 return (sample->dev_sof + delta_sof) & 2047;
521}
522
523/*
524 * uvc_video_clock_update - Update the buffer timestamp
525 *
526 * This function converts the buffer PTS timestamp to the host clock domain by
527 * going through the USB SOF clock domain and stores the result in the V4L2
528 * buffer timestamp field.
529 *
530 * The relationship between the device clock and the host clock isn't known.
531 * However, the device and the host share the common USB SOF clock which can be
532 * used to recover that relationship.
533 *
534 * The relationship between the device clock and the USB SOF clock is considered
535 * to be linear over the clock samples sliding window and is given by
536 *
537 * SOF = m * PTS + p
538 *
539 * Several methods to compute the slope (m) and intercept (p) can be used. As
540 * the clock drift should be small compared to the sliding window size, we
541 * assume that the line that goes through the points at both ends of the window
542 * is a good approximation. Naming those points P1 and P2, we get
543 *
544 * SOF = (SOF2 - SOF1) / (STC2 - STC1) * PTS
545 * + (SOF1 * STC2 - SOF2 * STC1) / (STC2 - STC1)
546 *
547 * or
548 *
549 * SOF = ((SOF2 - SOF1) * PTS + SOF1 * STC2 - SOF2 * STC1) / (STC2 - STC1) (1)
550 *
551 * to avoid loosing precision in the division. Similarly, the host timestamp is
552 * computed with
553 *
554 * TS = ((TS2 - TS1) * PTS + TS1 * SOF2 - TS2 * SOF1) / (SOF2 - SOF1) (2)
555 *
556 * SOF values are coded on 11 bits by USB. We extend their precision with 16
557 * decimal bits, leading to a 11.16 coding.
558 *
559 * TODO: To avoid surprises with device clock values, PTS/STC timestamps should
560 * be normalized using the nominal device clock frequency reported through the
561 * UVC descriptors.
562 *
563 * Both the PTS/STC and SOF counters roll over, after a fixed but device
564 * specific amount of time for PTS/STC and after 2048ms for SOF. As long as the
565 * sliding window size is smaller than the rollover period, differences computed
566 * on unsigned integers will produce the correct result. However, the p term in
567 * the linear relations will be miscomputed.
568 *
569 * To fix the issue, we subtract a constant from the PTS and STC values to bring
570 * PTS to half the 32 bit STC range. The sliding window STC values then fit into
571 * the 32 bit range without any rollover.
572 *
573 * Similarly, we add 2048 to the device SOF values to make sure that the SOF
574 * computed by (1) will never be smaller than 0. This offset is then compensated
575 * by adding 2048 to the SOF values used in (2). However, this doesn't prevent
576 * rollovers between (1) and (2): the SOF value computed by (1) can be slightly
577 * lower than 4096, and the host SOF counters can have rolled over to 2048. This
578 * case is handled by subtracting 2048 from the SOF value if it exceeds the host
579 * SOF value at the end of the sliding window.
580 *
581 * Finally we subtract a constant from the host timestamps to bring the first
582 * timestamp of the sliding window to 1s.
583 */
584void uvc_video_clock_update(struct uvc_streaming *stream,
585 struct v4l2_buffer *v4l2_buf,
586 struct uvc_buffer *buf)
587{
588 struct uvc_clock *clock = &stream->clock;
589 struct uvc_clock_sample *first;
590 struct uvc_clock_sample *last;
591 unsigned long flags;
592 struct timespec ts;
593 u32 delta_stc;
594 u32 y1, y2;
595 u32 x1, x2;
596 u32 mean;
597 u32 sof;
598 u32 div;
599 u32 rem;
600 u64 y;
601
602 spin_lock_irqsave(&clock->lock, flags);
603
604 if (clock->count < clock->size)
605 goto done;
606
607 first = &clock->samples[clock->head];
608 last = &clock->samples[(clock->head - 1) % clock->size];
609
610 /* First step, PTS to SOF conversion. */
611 delta_stc = buf->pts - (1UL << 31);
612 x1 = first->dev_stc - delta_stc;
613 x2 = last->dev_stc - delta_stc;
614 y1 = (first->dev_sof + 2048) << 16;
615 y2 = (last->dev_sof + 2048) << 16;
616
617 if (y2 < y1)
618 y2 += 2048 << 16;
619
620 y = (u64)(y2 - y1) * (1ULL << 31) + (u64)y1 * (u64)x2
621 - (u64)y2 * (u64)x1;
622 y = div_u64(y, x2 - x1);
623
624 sof = y;
625
626 uvc_trace(UVC_TRACE_CLOCK, "%s: PTS %u y %llu.%06llu SOF %u.%06llu "
627 "(x1 %u x2 %u y1 %u y2 %u SOF offset %u)\n",
628 stream->dev->name, buf->pts,
629 y >> 16, div_u64((y & 0xffff) * 1000000, 65536),
630 sof >> 16, div_u64(((u64)sof & 0xffff) * 1000000LLU, 65536),
631 x1, x2, y1, y2, clock->sof_offset);
632
633 /* Second step, SOF to host clock conversion. */
634 ts = timespec_sub(last->host_ts, first->host_ts);
635 x1 = (uvc_video_clock_host_sof(first) + 2048) << 16;
636 x2 = (uvc_video_clock_host_sof(last) + 2048) << 16;
637 y1 = NSEC_PER_SEC;
638 y2 = (ts.tv_sec + 1) * NSEC_PER_SEC + ts.tv_nsec;
639
640 if (x2 < x1)
641 x2 += 2048 << 16;
642
643 /* Interpolated and host SOF timestamps can wrap around at slightly
644 * different times. Handle this by adding or removing 2048 to or from
645 * the computed SOF value to keep it close to the SOF samples mean
646 * value.
647 */
648 mean = (x1 + x2) / 2;
649 if (mean - (1024 << 16) > sof)
650 sof += 2048 << 16;
651 else if (sof > mean + (1024 << 16))
652 sof -= 2048 << 16;
653
654 y = (u64)(y2 - y1) * (u64)sof + (u64)y1 * (u64)x2
655 - (u64)y2 * (u64)x1;
656 y = div_u64(y, x2 - x1);
657
658 div = div_u64_rem(y, NSEC_PER_SEC, &rem);
659 ts.tv_sec = first->host_ts.tv_sec - 1 + div;
660 ts.tv_nsec = first->host_ts.tv_nsec + rem;
661 if (ts.tv_nsec >= NSEC_PER_SEC) {
662 ts.tv_sec++;
663 ts.tv_nsec -= NSEC_PER_SEC;
664 }
665
666 uvc_trace(UVC_TRACE_CLOCK, "%s: SOF %u.%06llu y %llu ts %lu.%06lu "
667 "buf ts %lu.%06lu (x1 %u/%u/%u x2 %u/%u/%u y1 %u y2 %u)\n",
668 stream->dev->name,
669 sof >> 16, div_u64(((u64)sof & 0xffff) * 1000000LLU, 65536),
670 y, ts.tv_sec, ts.tv_nsec / NSEC_PER_USEC,
671 v4l2_buf->timestamp.tv_sec, v4l2_buf->timestamp.tv_usec,
672 x1, first->host_sof, first->dev_sof,
673 x2, last->host_sof, last->dev_sof, y1, y2);
674
675 /* Update the V4L2 buffer. */
676 v4l2_buf->timestamp.tv_sec = ts.tv_sec;
677 v4l2_buf->timestamp.tv_usec = ts.tv_nsec / NSEC_PER_USEC;
678
679done:
680 spin_unlock_irqrestore(&stream->clock.lock, flags);
681}
682
360/* ------------------------------------------------------------------------ 683/* ------------------------------------------------------------------------
361 * Video codecs 684 * Stream statistics
362 */ 685 */
363 686
364/* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */ 687static void uvc_video_stats_decode(struct uvc_streaming *stream,
365#define UVC_STREAM_EOH (1 << 7) 688 const __u8 *data, int len)
366#define UVC_STREAM_ERR (1 << 6) 689{
367#define UVC_STREAM_STI (1 << 5) 690 unsigned int header_size;
368#define UVC_STREAM_RES (1 << 4) 691 bool has_pts = false;
369#define UVC_STREAM_SCR (1 << 3) 692 bool has_scr = false;
370#define UVC_STREAM_PTS (1 << 2) 693 u16 uninitialized_var(scr_sof);
371#define UVC_STREAM_EOF (1 << 1) 694 u32 uninitialized_var(scr_stc);
372#define UVC_STREAM_FID (1 << 0) 695 u32 uninitialized_var(pts);
696
697 if (stream->stats.stream.nb_frames == 0 &&
698 stream->stats.frame.nb_packets == 0)
699 ktime_get_ts(&stream->stats.stream.start_ts);
700
701 switch (data[1] & (UVC_STREAM_PTS | UVC_STREAM_SCR)) {
702 case UVC_STREAM_PTS | UVC_STREAM_SCR:
703 header_size = 12;
704 has_pts = true;
705 has_scr = true;
706 break;
707 case UVC_STREAM_PTS:
708 header_size = 6;
709 has_pts = true;
710 break;
711 case UVC_STREAM_SCR:
712 header_size = 8;
713 has_scr = true;
714 break;
715 default:
716 header_size = 2;
717 break;
718 }
719
720 /* Check for invalid headers. */
721 if (len < header_size || data[0] < header_size) {
722 stream->stats.frame.nb_invalid++;
723 return;
724 }
725
726 /* Extract the timestamps. */
727 if (has_pts)
728 pts = get_unaligned_le32(&data[2]);
729
730 if (has_scr) {
731 scr_stc = get_unaligned_le32(&data[header_size - 6]);
732 scr_sof = get_unaligned_le16(&data[header_size - 2]);
733 }
734
735 /* Is PTS constant through the whole frame ? */
736 if (has_pts && stream->stats.frame.nb_pts) {
737 if (stream->stats.frame.pts != pts) {
738 stream->stats.frame.nb_pts_diffs++;
739 stream->stats.frame.last_pts_diff =
740 stream->stats.frame.nb_packets;
741 }
742 }
743
744 if (has_pts) {
745 stream->stats.frame.nb_pts++;
746 stream->stats.frame.pts = pts;
747 }
748
749 /* Do all frames have a PTS in their first non-empty packet, or before
750 * their first empty packet ?
751 */
752 if (stream->stats.frame.size == 0) {
753 if (len > header_size)
754 stream->stats.frame.has_initial_pts = has_pts;
755 if (len == header_size && has_pts)
756 stream->stats.frame.has_early_pts = true;
757 }
758
759 /* Do the SCR.STC and SCR.SOF fields vary through the frame ? */
760 if (has_scr && stream->stats.frame.nb_scr) {
761 if (stream->stats.frame.scr_stc != scr_stc)
762 stream->stats.frame.nb_scr_diffs++;
763 }
764
765 if (has_scr) {
766 /* Expand the SOF counter to 32 bits and store its value. */
767 if (stream->stats.stream.nb_frames > 0 ||
768 stream->stats.frame.nb_scr > 0)
769 stream->stats.stream.scr_sof_count +=
770 (scr_sof - stream->stats.stream.scr_sof) % 2048;
771 stream->stats.stream.scr_sof = scr_sof;
772
773 stream->stats.frame.nb_scr++;
774 stream->stats.frame.scr_stc = scr_stc;
775 stream->stats.frame.scr_sof = scr_sof;
776
777 if (scr_sof < stream->stats.stream.min_sof)
778 stream->stats.stream.min_sof = scr_sof;
779 if (scr_sof > stream->stats.stream.max_sof)
780 stream->stats.stream.max_sof = scr_sof;
781 }
782
783 /* Record the first non-empty packet number. */
784 if (stream->stats.frame.size == 0 && len > header_size)
785 stream->stats.frame.first_data = stream->stats.frame.nb_packets;
786
787 /* Update the frame size. */
788 stream->stats.frame.size += len - header_size;
789
790 /* Update the packets counters. */
791 stream->stats.frame.nb_packets++;
792 if (len > header_size)
793 stream->stats.frame.nb_empty++;
794
795 if (data[1] & UVC_STREAM_ERR)
796 stream->stats.frame.nb_errors++;
797}
798
799static void uvc_video_stats_update(struct uvc_streaming *stream)
800{
801 struct uvc_stats_frame *frame = &stream->stats.frame;
802
803 uvc_trace(UVC_TRACE_STATS, "frame %u stats: %u/%u/%u packets, "
804 "%u/%u/%u pts (%searly %sinitial), %u/%u scr, "
805 "last pts/stc/sof %u/%u/%u\n",
806 stream->sequence, frame->first_data,
807 frame->nb_packets - frame->nb_empty, frame->nb_packets,
808 frame->nb_pts_diffs, frame->last_pts_diff, frame->nb_pts,
809 frame->has_early_pts ? "" : "!",
810 frame->has_initial_pts ? "" : "!",
811 frame->nb_scr_diffs, frame->nb_scr,
812 frame->pts, frame->scr_stc, frame->scr_sof);
813
814 stream->stats.stream.nb_frames++;
815 stream->stats.stream.nb_packets += stream->stats.frame.nb_packets;
816 stream->stats.stream.nb_empty += stream->stats.frame.nb_empty;
817 stream->stats.stream.nb_errors += stream->stats.frame.nb_errors;
818 stream->stats.stream.nb_invalid += stream->stats.frame.nb_invalid;
819
820 if (frame->has_early_pts)
821 stream->stats.stream.nb_pts_early++;
822 if (frame->has_initial_pts)
823 stream->stats.stream.nb_pts_initial++;
824 if (frame->last_pts_diff <= frame->first_data)
825 stream->stats.stream.nb_pts_constant++;
826 if (frame->nb_scr >= frame->nb_packets - frame->nb_empty)
827 stream->stats.stream.nb_scr_count_ok++;
828 if (frame->nb_scr_diffs + 1 == frame->nb_scr)
829 stream->stats.stream.nb_scr_diffs_ok++;
830
831 memset(&stream->stats.frame, 0, sizeof(stream->stats.frame));
832}
833
834size_t uvc_video_stats_dump(struct uvc_streaming *stream, char *buf,
835 size_t size)
836{
837 unsigned int scr_sof_freq;
838 unsigned int duration;
839 struct timespec ts;
840 size_t count = 0;
841
842 ts.tv_sec = stream->stats.stream.stop_ts.tv_sec
843 - stream->stats.stream.start_ts.tv_sec;
844 ts.tv_nsec = stream->stats.stream.stop_ts.tv_nsec
845 - stream->stats.stream.start_ts.tv_nsec;
846 if (ts.tv_nsec < 0) {
847 ts.tv_sec--;
848 ts.tv_nsec += 1000000000;
849 }
850
851 /* Compute the SCR.SOF frequency estimate. At the nominal 1kHz SOF
852 * frequency this will not overflow before more than 1h.
853 */
854 duration = ts.tv_sec * 1000 + ts.tv_nsec / 1000000;
855 if (duration != 0)
856 scr_sof_freq = stream->stats.stream.scr_sof_count * 1000
857 / duration;
858 else
859 scr_sof_freq = 0;
860
861 count += scnprintf(buf + count, size - count,
862 "frames: %u\npackets: %u\nempty: %u\n"
863 "errors: %u\ninvalid: %u\n",
864 stream->stats.stream.nb_frames,
865 stream->stats.stream.nb_packets,
866 stream->stats.stream.nb_empty,
867 stream->stats.stream.nb_errors,
868 stream->stats.stream.nb_invalid);
869 count += scnprintf(buf + count, size - count,
870 "pts: %u early, %u initial, %u ok\n",
871 stream->stats.stream.nb_pts_early,
872 stream->stats.stream.nb_pts_initial,
873 stream->stats.stream.nb_pts_constant);
874 count += scnprintf(buf + count, size - count,
875 "scr: %u count ok, %u diff ok\n",
876 stream->stats.stream.nb_scr_count_ok,
877 stream->stats.stream.nb_scr_diffs_ok);
878 count += scnprintf(buf + count, size - count,
879 "sof: %u <= sof <= %u, freq %u.%03u kHz\n",
880 stream->stats.stream.min_sof,
881 stream->stats.stream.max_sof,
882 scr_sof_freq / 1000, scr_sof_freq % 1000);
883
884 return count;
885}
886
887static void uvc_video_stats_start(struct uvc_streaming *stream)
888{
889 memset(&stream->stats, 0, sizeof(stream->stats));
890 stream->stats.stream.min_sof = 2048;
891}
892
893static void uvc_video_stats_stop(struct uvc_streaming *stream)
894{
895 ktime_get_ts(&stream->stats.stream.stop_ts);
896}
897
898/* ------------------------------------------------------------------------
899 * Video codecs
900 */
373 901
374/* Video payload decoding is handled by uvc_video_decode_start(), 902/* Video payload decoding is handled by uvc_video_decode_start(),
375 * uvc_video_decode_data() and uvc_video_decode_end(). 903 * uvc_video_decode_data() and uvc_video_decode_end().
@@ -416,14 +944,9 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
416 * - bHeaderLength value must be at least 2 bytes (see above) 944 * - bHeaderLength value must be at least 2 bytes (see above)
417 * - bHeaderLength value can't be larger than the packet size. 945 * - bHeaderLength value can't be larger than the packet size.
418 */ 946 */
419 if (len < 2 || data[0] < 2 || data[0] > len) 947 if (len < 2 || data[0] < 2 || data[0] > len) {
948 stream->stats.frame.nb_invalid++;
420 return -EINVAL; 949 return -EINVAL;
421
422 /* Skip payloads marked with the error bit ("error frames"). */
423 if (data[1] & UVC_STREAM_ERR) {
424 uvc_trace(UVC_TRACE_FRAME, "Dropping payload (error bit "
425 "set).\n");
426 return -ENODATA;
427 } 950 }
428 951
429 fid = data[1] & UVC_STREAM_FID; 952 fid = data[1] & UVC_STREAM_FID;
@@ -431,8 +954,14 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
431 /* Increase the sequence number regardless of any buffer states, so 954 /* Increase the sequence number regardless of any buffer states, so
432 * that discontinuous sequence numbers always indicate lost frames. 955 * that discontinuous sequence numbers always indicate lost frames.
433 */ 956 */
434 if (stream->last_fid != fid) 957 if (stream->last_fid != fid) {
435 stream->sequence++; 958 stream->sequence++;
959 if (stream->sequence)
960 uvc_video_stats_update(stream);
961 }
962
963 uvc_video_clock_decode(stream, buf, data, len);
964 uvc_video_stats_decode(stream, data, len);
436 965
437 /* Store the payload FID bit and return immediately when the buffer is 966 /* Store the payload FID bit and return immediately when the buffer is
438 * NULL. 967 * NULL.
@@ -442,6 +971,13 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
442 return -ENODATA; 971 return -ENODATA;
443 } 972 }
444 973
974 /* Mark the buffer as bad if the error bit is set. */
975 if (data[1] & UVC_STREAM_ERR) {
976 uvc_trace(UVC_TRACE_FRAME, "Marking buffer as bad (error bit "
977 "set).\n");
978 buf->error = 1;
979 }
980
445 /* Synchronize to the input stream by waiting for the FID bit to be 981 /* Synchronize to the input stream by waiting for the FID bit to be
446 * toggled when the the buffer state is not UVC_BUF_STATE_ACTIVE. 982 * toggled when the the buffer state is not UVC_BUF_STATE_ACTIVE.
447 * stream->last_fid is initialized to -1, so the first isochronous 983 * stream->last_fid is initialized to -1, so the first isochronous
@@ -467,9 +1003,10 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
467 else 1003 else
468 ktime_get_real_ts(&ts); 1004 ktime_get_real_ts(&ts);
469 1005
470 buf->buf.sequence = stream->sequence; 1006 buf->buf.v4l2_buf.sequence = stream->sequence;
471 buf->buf.timestamp.tv_sec = ts.tv_sec; 1007 buf->buf.v4l2_buf.timestamp.tv_sec = ts.tv_sec;
472 buf->buf.timestamp.tv_usec = ts.tv_nsec / NSEC_PER_USEC; 1008 buf->buf.v4l2_buf.timestamp.tv_usec =
1009 ts.tv_nsec / NSEC_PER_USEC;
473 1010
474 /* TODO: Handle PTS and SCR. */ 1011 /* TODO: Handle PTS and SCR. */
475 buf->state = UVC_BUF_STATE_ACTIVE; 1012 buf->state = UVC_BUF_STATE_ACTIVE;
@@ -490,7 +1027,7 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
490 * avoids detecting end of frame conditions at FID toggling if the 1027 * avoids detecting end of frame conditions at FID toggling if the
491 * previous payload had the EOF bit set. 1028 * previous payload had the EOF bit set.
492 */ 1029 */
493 if (fid != stream->last_fid && buf->buf.bytesused != 0) { 1030 if (fid != stream->last_fid && buf->bytesused != 0) {
494 uvc_trace(UVC_TRACE_FRAME, "Frame complete (FID bit " 1031 uvc_trace(UVC_TRACE_FRAME, "Frame complete (FID bit "
495 "toggled).\n"); 1032 "toggled).\n");
496 buf->state = UVC_BUF_STATE_READY; 1033 buf->state = UVC_BUF_STATE_READY;
@@ -505,7 +1042,6 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
505static void uvc_video_decode_data(struct uvc_streaming *stream, 1042static void uvc_video_decode_data(struct uvc_streaming *stream,
506 struct uvc_buffer *buf, const __u8 *data, int len) 1043 struct uvc_buffer *buf, const __u8 *data, int len)
507{ 1044{
508 struct uvc_video_queue *queue = &stream->queue;
509 unsigned int maxlen, nbytes; 1045 unsigned int maxlen, nbytes;
510 void *mem; 1046 void *mem;
511 1047
@@ -513,11 +1049,11 @@ static void uvc_video_decode_data(struct uvc_streaming *stream,
513 return; 1049 return;
514 1050
515 /* Copy the video data to the buffer. */ 1051 /* Copy the video data to the buffer. */
516 maxlen = buf->buf.length - buf->buf.bytesused; 1052 maxlen = buf->length - buf->bytesused;
517 mem = queue->mem + buf->buf.m.offset + buf->buf.bytesused; 1053 mem = buf->mem + buf->bytesused;
518 nbytes = min((unsigned int)len, maxlen); 1054 nbytes = min((unsigned int)len, maxlen);
519 memcpy(mem, data, nbytes); 1055 memcpy(mem, data, nbytes);
520 buf->buf.bytesused += nbytes; 1056 buf->bytesused += nbytes;
521 1057
522 /* Complete the current frame if the buffer size was exceeded. */ 1058 /* Complete the current frame if the buffer size was exceeded. */
523 if (len > maxlen) { 1059 if (len > maxlen) {
@@ -530,7 +1066,7 @@ static void uvc_video_decode_end(struct uvc_streaming *stream,
530 struct uvc_buffer *buf, const __u8 *data, int len) 1066 struct uvc_buffer *buf, const __u8 *data, int len)
531{ 1067{
532 /* Mark the buffer as done if the EOF marker is set. */ 1068 /* Mark the buffer as done if the EOF marker is set. */
533 if (data[1] & UVC_STREAM_EOF && buf->buf.bytesused != 0) { 1069 if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) {
534 uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n"); 1070 uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n");
535 if (data[0] == len) 1071 if (data[0] == len)
536 uvc_trace(UVC_TRACE_FRAME, "EOF in empty payload.\n"); 1072 uvc_trace(UVC_TRACE_FRAME, "EOF in empty payload.\n");
@@ -568,8 +1104,8 @@ static int uvc_video_encode_data(struct uvc_streaming *stream,
568 void *mem; 1104 void *mem;
569 1105
570 /* Copy video data to the URB buffer. */ 1106 /* Copy video data to the URB buffer. */
571 mem = queue->mem + buf->buf.m.offset + queue->buf_used; 1107 mem = buf->mem + queue->buf_used;
572 nbytes = min((unsigned int)len, buf->buf.bytesused - queue->buf_used); 1108 nbytes = min((unsigned int)len, buf->bytesused - queue->buf_used);
573 nbytes = min(stream->bulk.max_payload_size - stream->bulk.payload_size, 1109 nbytes = min(stream->bulk.max_payload_size - stream->bulk.payload_size,
574 nbytes); 1110 nbytes);
575 memcpy(data, mem, nbytes); 1111 memcpy(data, mem, nbytes);
@@ -624,7 +1160,7 @@ static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
624 urb->iso_frame_desc[i].actual_length); 1160 urb->iso_frame_desc[i].actual_length);
625 1161
626 if (buf->state == UVC_BUF_STATE_READY) { 1162 if (buf->state == UVC_BUF_STATE_READY) {
627 if (buf->buf.length != buf->buf.bytesused && 1163 if (buf->length != buf->bytesused &&
628 !(stream->cur_format->flags & 1164 !(stream->cur_format->flags &
629 UVC_FMT_FLAG_COMPRESSED)) 1165 UVC_FMT_FLAG_COMPRESSED))
630 buf->error = 1; 1166 buf->error = 1;
@@ -724,12 +1260,12 @@ static void uvc_video_encode_bulk(struct urb *urb, struct uvc_streaming *stream,
724 stream->bulk.payload_size += ret; 1260 stream->bulk.payload_size += ret;
725 len -= ret; 1261 len -= ret;
726 1262
727 if (buf->buf.bytesused == stream->queue.buf_used || 1263 if (buf->bytesused == stream->queue.buf_used ||
728 stream->bulk.payload_size == stream->bulk.max_payload_size) { 1264 stream->bulk.payload_size == stream->bulk.max_payload_size) {
729 if (buf->buf.bytesused == stream->queue.buf_used) { 1265 if (buf->bytesused == stream->queue.buf_used) {
730 stream->queue.buf_used = 0; 1266 stream->queue.buf_used = 0;
731 buf->state = UVC_BUF_STATE_READY; 1267 buf->state = UVC_BUF_STATE_READY;
732 buf->buf.sequence = ++stream->sequence; 1268 buf->buf.v4l2_buf.sequence = ++stream->sequence;
733 uvc_queue_next_buffer(&stream->queue, buf); 1269 uvc_queue_next_buffer(&stream->queue, buf);
734 stream->last_fid ^= UVC_STREAM_FID; 1270 stream->last_fid ^= UVC_STREAM_FID;
735 } 1271 }
@@ -870,6 +1406,8 @@ static void uvc_uninit_video(struct uvc_streaming *stream, int free_buffers)
870 struct urb *urb; 1406 struct urb *urb;
871 unsigned int i; 1407 unsigned int i;
872 1408
1409 uvc_video_stats_stop(stream);
1410
873 for (i = 0; i < UVC_URBS; ++i) { 1411 for (i = 0; i < UVC_URBS; ++i) {
874 urb = stream->urb[i]; 1412 urb = stream->urb[i];
875 if (urb == NULL) 1413 if (urb == NULL)
@@ -882,6 +1420,8 @@ static void uvc_uninit_video(struct uvc_streaming *stream, int free_buffers)
882 1420
883 if (free_buffers) 1421 if (free_buffers)
884 uvc_free_urb_buffers(stream); 1422 uvc_free_urb_buffers(stream);
1423
1424 uvc_video_clock_cleanup(stream);
885} 1425}
886 1426
887/* 1427/*
@@ -1009,6 +1549,12 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
1009 stream->bulk.skip_payload = 0; 1549 stream->bulk.skip_payload = 0;
1010 stream->bulk.payload_size = 0; 1550 stream->bulk.payload_size = 0;
1011 1551
1552 uvc_video_stats_start(stream);
1553
1554 ret = uvc_video_clock_init(stream);
1555 if (ret < 0)
1556 return ret;
1557
1012 if (intf->num_altsetting > 1) { 1558 if (intf->num_altsetting > 1) {
1013 struct usb_host_endpoint *best_ep = NULL; 1559 struct usb_host_endpoint *best_ep = NULL;
1014 unsigned int best_psize = 3 * 1024; 1560 unsigned int best_psize = 3 * 1024;
@@ -1283,6 +1829,11 @@ int uvc_video_enable(struct uvc_streaming *stream, int enable)
1283 return ret; 1829 return ret;
1284 } 1830 }
1285 1831
1286 return uvc_init_video(stream, GFP_KERNEL); 1832 ret = uvc_init_video(stream, GFP_KERNEL);
1287} 1833 if (ret < 0) {
1834 usb_set_interface(stream->dev->udev, stream->intfnum, 0);
1835 uvc_queue_enable(&stream->queue, 0);
1836 }
1288 1837
1838 return ret;
1839}
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h
index 4c1392ebcd4..67f88d85bb1 100644
--- a/drivers/media/video/uvc/uvcvideo.h
+++ b/drivers/media/video/uvc/uvcvideo.h
@@ -13,6 +13,7 @@
13#include <linux/videodev2.h> 13#include <linux/videodev2.h>
14#include <media/media-device.h> 14#include <media/media-device.h>
15#include <media/v4l2-device.h> 15#include <media/v4l2-device.h>
16#include <media/videobuf2-core.h>
16 17
17/* -------------------------------------------------------------------------- 18/* --------------------------------------------------------------------------
18 * UVC constants 19 * UVC constants
@@ -113,6 +114,7 @@
113 114
114/* Maximum allowed number of control mappings per device */ 115/* Maximum allowed number of control mappings per device */
115#define UVC_MAX_CONTROL_MAPPINGS 1024 116#define UVC_MAX_CONTROL_MAPPINGS 1024
117#define UVC_MAX_CONTROL_MENU_ENTRIES 32
116 118
117/* Devices quirks */ 119/* Devices quirks */
118#define UVC_QUIRK_STATUS_INTERVAL 0x00000001 120#define UVC_QUIRK_STATUS_INTERVAL 0x00000001
@@ -319,35 +321,30 @@ enum uvc_buffer_state {
319}; 321};
320 322
321struct uvc_buffer { 323struct uvc_buffer {
322 unsigned long vma_use_count; 324 struct vb2_buffer buf;
323 struct list_head stream;
324
325 /* Touched by interrupt handler. */
326 struct v4l2_buffer buf;
327 struct list_head queue; 325 struct list_head queue;
328 wait_queue_head_t wait; 326
329 enum uvc_buffer_state state; 327 enum uvc_buffer_state state;
330 unsigned int error; 328 unsigned int error;
329
330 void *mem;
331 unsigned int length;
332 unsigned int bytesused;
333
334 u32 pts;
331}; 335};
332 336
333#define UVC_QUEUE_STREAMING (1 << 0) 337#define UVC_QUEUE_DISCONNECTED (1 << 0)
334#define UVC_QUEUE_DISCONNECTED (1 << 1) 338#define UVC_QUEUE_DROP_CORRUPTED (1 << 1)
335#define UVC_QUEUE_DROP_CORRUPTED (1 << 2)
336 339
337struct uvc_video_queue { 340struct uvc_video_queue {
338 enum v4l2_buf_type type; 341 struct vb2_queue queue;
342 struct mutex mutex; /* Protects queue */
339 343
340 void *mem;
341 unsigned int flags; 344 unsigned int flags;
342
343 unsigned int count;
344 unsigned int buf_size;
345 unsigned int buf_used; 345 unsigned int buf_used;
346 struct uvc_buffer buffer[UVC_MAX_VIDEO_BUFFERS];
347 struct mutex mutex; /* protects buffers and mainqueue */
348 spinlock_t irqlock; /* protects irqqueue */
349 346
350 struct list_head mainqueue; 347 spinlock_t irqlock; /* Protects irqqueue */
351 struct list_head irqqueue; 348 struct list_head irqqueue;
352}; 349};
353 350
@@ -362,6 +359,51 @@ struct uvc_video_chain {
362 struct mutex ctrl_mutex; /* Protects ctrl.info */ 359 struct mutex ctrl_mutex; /* Protects ctrl.info */
363}; 360};
364 361
362struct uvc_stats_frame {
363 unsigned int size; /* Number of bytes captured */
364 unsigned int first_data; /* Index of the first non-empty packet */
365
366 unsigned int nb_packets; /* Number of packets */
367 unsigned int nb_empty; /* Number of empty packets */
368 unsigned int nb_invalid; /* Number of packets with an invalid header */
369 unsigned int nb_errors; /* Number of packets with the error bit set */
370
371 unsigned int nb_pts; /* Number of packets with a PTS timestamp */
372 unsigned int nb_pts_diffs; /* Number of PTS differences inside a frame */
373 unsigned int last_pts_diff; /* Index of the last PTS difference */
374 bool has_initial_pts; /* Whether the first non-empty packet has a PTS */
375 bool has_early_pts; /* Whether a PTS is present before the first non-empty packet */
376 u32 pts; /* PTS of the last packet */
377
378 unsigned int nb_scr; /* Number of packets with a SCR timestamp */
379 unsigned int nb_scr_diffs; /* Number of SCR.STC differences inside a frame */
380 u16 scr_sof; /* SCR.SOF of the last packet */
381 u32 scr_stc; /* SCR.STC of the last packet */
382};
383
384struct uvc_stats_stream {
385 struct timespec start_ts; /* Stream start timestamp */
386 struct timespec stop_ts; /* Stream stop timestamp */
387
388 unsigned int nb_frames; /* Number of frames */
389
390 unsigned int nb_packets; /* Number of packets */
391 unsigned int nb_empty; /* Number of empty packets */
392 unsigned int nb_invalid; /* Number of packets with an invalid header */
393 unsigned int nb_errors; /* Number of packets with the error bit set */
394
395 unsigned int nb_pts_constant; /* Number of frames with constant PTS */
396 unsigned int nb_pts_early; /* Number of frames with early PTS */
397 unsigned int nb_pts_initial; /* Number of frames with initial PTS */
398
399 unsigned int nb_scr_count_ok; /* Number of frames with at least one SCR per non empty packet */
400 unsigned int nb_scr_diffs_ok; /* Number of frames with varying SCR.STC */
401 unsigned int scr_sof_count; /* STC.SOF counter accumulated since stream start */
402 unsigned int scr_sof; /* STC.SOF of the last packet */
403 unsigned int min_sof; /* Minimum STC.SOF value */
404 unsigned int max_sof; /* Maximum STC.SOF value */
405};
406
365struct uvc_streaming { 407struct uvc_streaming {
366 struct list_head list; 408 struct list_head list;
367 struct uvc_device *dev; 409 struct uvc_device *dev;
@@ -387,6 +429,7 @@ struct uvc_streaming {
387 */ 429 */
388 struct mutex mutex; 430 struct mutex mutex;
389 431
432 /* Buffers queue. */
390 unsigned int frozen : 1; 433 unsigned int frozen : 1;
391 struct uvc_video_queue queue; 434 struct uvc_video_queue queue;
392 void (*decode) (struct urb *urb, struct uvc_streaming *video, 435 void (*decode) (struct urb *urb, struct uvc_streaming *video,
@@ -408,6 +451,32 @@ struct uvc_streaming {
408 451
409 __u32 sequence; 452 __u32 sequence;
410 __u8 last_fid; 453 __u8 last_fid;
454
455 /* debugfs */
456 struct dentry *debugfs_dir;
457 struct {
458 struct uvc_stats_frame frame;
459 struct uvc_stats_stream stream;
460 } stats;
461
462 /* Timestamps support. */
463 struct uvc_clock {
464 struct uvc_clock_sample {
465 u32 dev_stc;
466 u16 dev_sof;
467 struct timespec host_ts;
468 u16 host_sof;
469 } *samples;
470
471 unsigned int head;
472 unsigned int count;
473 unsigned int size;
474
475 u16 last_sof;
476 u16 sof_offset;
477
478 spinlock_t lock;
479 } clock;
411}; 480};
412 481
413enum uvc_device_state { 482enum uvc_device_state {
@@ -479,9 +548,12 @@ struct uvc_driver {
479#define UVC_TRACE_SUSPEND (1 << 8) 548#define UVC_TRACE_SUSPEND (1 << 8)
480#define UVC_TRACE_STATUS (1 << 9) 549#define UVC_TRACE_STATUS (1 << 9)
481#define UVC_TRACE_VIDEO (1 << 10) 550#define UVC_TRACE_VIDEO (1 << 10)
551#define UVC_TRACE_STATS (1 << 11)
552#define UVC_TRACE_CLOCK (1 << 12)
482 553
483#define UVC_WARN_MINMAX 0 554#define UVC_WARN_MINMAX 0
484#define UVC_WARN_PROBE_DEF 1 555#define UVC_WARN_PROBE_DEF 1
556#define UVC_WARN_XU_GET_RES 2
485 557
486extern unsigned int uvc_clock_param; 558extern unsigned int uvc_clock_param;
487extern unsigned int uvc_no_drop_param; 559extern unsigned int uvc_no_drop_param;
@@ -516,8 +588,8 @@ extern struct uvc_entity *uvc_entity_by_id(struct uvc_device *dev, int id);
516extern void uvc_queue_init(struct uvc_video_queue *queue, 588extern void uvc_queue_init(struct uvc_video_queue *queue,
517 enum v4l2_buf_type type, int drop_corrupted); 589 enum v4l2_buf_type type, int drop_corrupted);
518extern int uvc_alloc_buffers(struct uvc_video_queue *queue, 590extern int uvc_alloc_buffers(struct uvc_video_queue *queue,
519 unsigned int nbuffers, unsigned int buflength); 591 struct v4l2_requestbuffers *rb);
520extern int uvc_free_buffers(struct uvc_video_queue *queue); 592extern void uvc_free_buffers(struct uvc_video_queue *queue);
521extern int uvc_query_buffer(struct uvc_video_queue *queue, 593extern int uvc_query_buffer(struct uvc_video_queue *queue,
522 struct v4l2_buffer *v4l2_buf); 594 struct v4l2_buffer *v4l2_buf);
523extern int uvc_queue_buffer(struct uvc_video_queue *queue, 595extern int uvc_queue_buffer(struct uvc_video_queue *queue,
@@ -539,7 +611,7 @@ extern unsigned long uvc_queue_get_unmapped_area(struct uvc_video_queue *queue,
539extern int uvc_queue_allocated(struct uvc_video_queue *queue); 611extern int uvc_queue_allocated(struct uvc_video_queue *queue);
540static inline int uvc_queue_streaming(struct uvc_video_queue *queue) 612static inline int uvc_queue_streaming(struct uvc_video_queue *queue)
541{ 613{
542 return queue->flags & UVC_QUEUE_STREAMING; 614 return vb2_is_streaming(&queue->queue);
543} 615}
544 616
545/* V4L2 interface */ 617/* V4L2 interface */
@@ -556,10 +628,11 @@ extern int uvc_video_resume(struct uvc_streaming *stream, int reset);
556extern int uvc_video_enable(struct uvc_streaming *stream, int enable); 628extern int uvc_video_enable(struct uvc_streaming *stream, int enable);
557extern int uvc_probe_video(struct uvc_streaming *stream, 629extern int uvc_probe_video(struct uvc_streaming *stream,
558 struct uvc_streaming_control *probe); 630 struct uvc_streaming_control *probe);
559extern int uvc_commit_video(struct uvc_streaming *stream,
560 struct uvc_streaming_control *ctrl);
561extern int uvc_query_ctrl(struct uvc_device *dev, __u8 query, __u8 unit, 631extern int uvc_query_ctrl(struct uvc_device *dev, __u8 query, __u8 unit,
562 __u8 intfnum, __u8 cs, void *data, __u16 size); 632 __u8 intfnum, __u8 cs, void *data, __u16 size);
633void uvc_video_clock_update(struct uvc_streaming *stream,
634 struct v4l2_buffer *v4l2_buf,
635 struct uvc_buffer *buf);
563 636
564/* Status */ 637/* Status */
565extern int uvc_status_init(struct uvc_device *dev); 638extern int uvc_status_init(struct uvc_device *dev);
@@ -612,4 +685,13 @@ extern struct usb_host_endpoint *uvc_find_endpoint(
612void uvc_video_decode_isight(struct urb *urb, struct uvc_streaming *stream, 685void uvc_video_decode_isight(struct urb *urb, struct uvc_streaming *stream,
613 struct uvc_buffer *buf); 686 struct uvc_buffer *buf);
614 687
688/* debugfs and statistics */
689int uvc_debugfs_init(void);
690void uvc_debugfs_cleanup(void);
691int uvc_debugfs_init_stream(struct uvc_streaming *stream);
692void uvc_debugfs_cleanup_stream(struct uvc_streaming *stream);
693
694size_t uvc_video_stats_dump(struct uvc_streaming *stream, char *buf,
695 size_t size);
696
615#endif 697#endif
diff --git a/drivers/media/video/v4l2-compat-ioctl32.c b/drivers/media/video/v4l2-compat-ioctl32.c
index c68531b8827..af4419e6c65 100644
--- a/drivers/media/video/v4l2-compat-ioctl32.c
+++ b/drivers/media/video/v4l2-compat-ioctl32.c
@@ -985,6 +985,8 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
985 case VIDIOC_CROPCAP: 985 case VIDIOC_CROPCAP:
986 case VIDIOC_G_CROP: 986 case VIDIOC_G_CROP:
987 case VIDIOC_S_CROP: 987 case VIDIOC_S_CROP:
988 case VIDIOC_G_SELECTION:
989 case VIDIOC_S_SELECTION:
988 case VIDIOC_G_JPEGCOMP: 990 case VIDIOC_G_JPEGCOMP:
989 case VIDIOC_S_JPEGCOMP: 991 case VIDIOC_S_JPEGCOMP:
990 case VIDIOC_QUERYSTD: 992 case VIDIOC_QUERYSTD:
diff --git a/drivers/media/video/v4l2-ctrls.c b/drivers/media/video/v4l2-ctrls.c
index 0f415dade05..da1f4c2d2d4 100644
--- a/drivers/media/video/v4l2-ctrls.c
+++ b/drivers/media/video/v4l2-ctrls.c
@@ -467,6 +467,7 @@ const char *v4l2_ctrl_get_name(u32 id)
467 case V4L2_CID_ILLUMINATORS_2: return "Illuminator 2"; 467 case V4L2_CID_ILLUMINATORS_2: return "Illuminator 2";
468 case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: return "Minimum Number of Capture Buffers"; 468 case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: return "Minimum Number of Capture Buffers";
469 case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: return "Minimum Number of Output Buffers"; 469 case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: return "Minimum Number of Output Buffers";
470 case V4L2_CID_ALPHA_COMPONENT: return "Alpha Component";
470 471
471 /* MPEG controls */ 472 /* MPEG controls */
472 /* Keep the order of the 'case's the same as in videodev2.h! */ 473 /* Keep the order of the 'case's the same as in videodev2.h! */
@@ -1108,8 +1109,8 @@ int v4l2_ctrl_handler_init(struct v4l2_ctrl_handler *hdl,
1108 INIT_LIST_HEAD(&hdl->ctrls); 1109 INIT_LIST_HEAD(&hdl->ctrls);
1109 INIT_LIST_HEAD(&hdl->ctrl_refs); 1110 INIT_LIST_HEAD(&hdl->ctrl_refs);
1110 hdl->nr_of_buckets = 1 + nr_of_controls_hint / 8; 1111 hdl->nr_of_buckets = 1 + nr_of_controls_hint / 8;
1111 hdl->buckets = kzalloc(sizeof(hdl->buckets[0]) * hdl->nr_of_buckets, 1112 hdl->buckets = kcalloc(hdl->nr_of_buckets, sizeof(hdl->buckets[0]),
1112 GFP_KERNEL); 1113 GFP_KERNEL);
1113 hdl->error = hdl->buckets ? 0 : -ENOMEM; 1114 hdl->error = hdl->buckets ? 0 : -ENOMEM;
1114 return hdl->error; 1115 return hdl->error;
1115} 1116}
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c
index a5c9ed128b9..96e9615663e 100644
--- a/drivers/media/video/v4l2-dev.c
+++ b/drivers/media/video/v4l2-dev.c
@@ -146,10 +146,9 @@ static void v4l2_device_release(struct device *cd)
146 struct v4l2_device *v4l2_dev = vdev->v4l2_dev; 146 struct v4l2_device *v4l2_dev = vdev->v4l2_dev;
147 147
148 mutex_lock(&videodev_lock); 148 mutex_lock(&videodev_lock);
149 if (video_device[vdev->minor] != vdev) { 149 if (WARN_ON(video_device[vdev->minor] != vdev)) {
150 mutex_unlock(&videodev_lock);
151 /* should not happen */ 150 /* should not happen */
152 WARN_ON(1); 151 mutex_unlock(&videodev_lock);
153 return; 152 return;
154 } 153 }
155 154
@@ -168,7 +167,7 @@ static void v4l2_device_release(struct device *cd)
168 mutex_unlock(&videodev_lock); 167 mutex_unlock(&videodev_lock);
169 168
170#if defined(CONFIG_MEDIA_CONTROLLER) 169#if defined(CONFIG_MEDIA_CONTROLLER)
171 if (vdev->v4l2_dev && vdev->v4l2_dev->mdev && 170 if (v4l2_dev && v4l2_dev->mdev &&
172 vdev->vfl_type != VFL_TYPE_SUBDEV) 171 vdev->vfl_type != VFL_TYPE_SUBDEV)
173 media_device_unregister_entity(&vdev->entity); 172 media_device_unregister_entity(&vdev->entity);
174#endif 173#endif
@@ -556,8 +555,7 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
556 vdev->minor = -1; 555 vdev->minor = -1;
557 556
558 /* the release callback MUST be present */ 557 /* the release callback MUST be present */
559 WARN_ON(!vdev->release); 558 if (WARN_ON(!vdev->release))
560 if (!vdev->release)
561 return -EINVAL; 559 return -EINVAL;
562 560
563 /* v4l2_fh support */ 561 /* v4l2_fh support */
@@ -703,8 +701,8 @@ int __video_register_device(struct video_device *vdev, int type, int nr,
703 vdev->vfl_type != VFL_TYPE_SUBDEV) { 701 vdev->vfl_type != VFL_TYPE_SUBDEV) {
704 vdev->entity.type = MEDIA_ENT_T_DEVNODE_V4L; 702 vdev->entity.type = MEDIA_ENT_T_DEVNODE_V4L;
705 vdev->entity.name = vdev->name; 703 vdev->entity.name = vdev->name;
706 vdev->entity.v4l.major = VIDEO_MAJOR; 704 vdev->entity.info.v4l.major = VIDEO_MAJOR;
707 vdev->entity.v4l.minor = vdev->minor; 705 vdev->entity.info.v4l.minor = vdev->minor;
708 ret = media_device_register_entity(vdev->v4l2_dev->mdev, 706 ret = media_device_register_entity(vdev->v4l2_dev->mdev,
709 &vdev->entity); 707 &vdev->entity);
710 if (ret < 0) 708 if (ret < 0)
diff --git a/drivers/media/video/v4l2-device.c b/drivers/media/video/v4l2-device.c
index 0edd618b9dd..1f203b85a63 100644
--- a/drivers/media/video/v4l2-device.c
+++ b/drivers/media/video/v4l2-device.c
@@ -234,8 +234,8 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev)
234 goto clean_up; 234 goto clean_up;
235 } 235 }
236#if defined(CONFIG_MEDIA_CONTROLLER) 236#if defined(CONFIG_MEDIA_CONTROLLER)
237 sd->entity.v4l.major = VIDEO_MAJOR; 237 sd->entity.info.v4l.major = VIDEO_MAJOR;
238 sd->entity.v4l.minor = vdev->minor; 238 sd->entity.info.v4l.minor = vdev->minor;
239#endif 239#endif
240 sd->devnode = vdev; 240 sd->devnode = vdev;
241 } 241 }
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c
index e1da8fc9dd2..77feeb67e2d 100644
--- a/drivers/media/video/v4l2-ioctl.c
+++ b/drivers/media/video/v4l2-ioctl.c
@@ -238,6 +238,8 @@ static const char *v4l2_ioctls[] = {
238 [_IOC_NR(VIDIOC_CROPCAP)] = "VIDIOC_CROPCAP", 238 [_IOC_NR(VIDIOC_CROPCAP)] = "VIDIOC_CROPCAP",
239 [_IOC_NR(VIDIOC_G_CROP)] = "VIDIOC_G_CROP", 239 [_IOC_NR(VIDIOC_G_CROP)] = "VIDIOC_G_CROP",
240 [_IOC_NR(VIDIOC_S_CROP)] = "VIDIOC_S_CROP", 240 [_IOC_NR(VIDIOC_S_CROP)] = "VIDIOC_S_CROP",
241 [_IOC_NR(VIDIOC_G_SELECTION)] = "VIDIOC_G_SELECTION",
242 [_IOC_NR(VIDIOC_S_SELECTION)] = "VIDIOC_S_SELECTION",
241 [_IOC_NR(VIDIOC_G_JPEGCOMP)] = "VIDIOC_G_JPEGCOMP", 243 [_IOC_NR(VIDIOC_G_JPEGCOMP)] = "VIDIOC_G_JPEGCOMP",
242 [_IOC_NR(VIDIOC_S_JPEGCOMP)] = "VIDIOC_S_JPEGCOMP", 244 [_IOC_NR(VIDIOC_S_JPEGCOMP)] = "VIDIOC_S_JPEGCOMP",
243 [_IOC_NR(VIDIOC_QUERYSTD)] = "VIDIOC_QUERYSTD", 245 [_IOC_NR(VIDIOC_QUERYSTD)] = "VIDIOC_QUERYSTD",
@@ -1547,11 +1549,32 @@ static long __video_do_ioctl(struct file *file,
1547 { 1549 {
1548 struct v4l2_crop *p = arg; 1550 struct v4l2_crop *p = arg;
1549 1551
1550 if (!ops->vidioc_g_crop) 1552 if (!ops->vidioc_g_crop && !ops->vidioc_g_selection)
1551 break; 1553 break;
1552 1554
1553 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names)); 1555 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
1554 ret = ops->vidioc_g_crop(file, fh, p); 1556
1557 if (ops->vidioc_g_crop) {
1558 ret = ops->vidioc_g_crop(file, fh, p);
1559 } else {
1560 /* simulate capture crop using selection api */
1561 struct v4l2_selection s = {
1562 .type = p->type,
1563 };
1564
1565 /* crop means compose for output devices */
1566 if (V4L2_TYPE_IS_OUTPUT(p->type))
1567 s.target = V4L2_SEL_TGT_COMPOSE_ACTIVE;
1568 else
1569 s.target = V4L2_SEL_TGT_CROP_ACTIVE;
1570
1571 ret = ops->vidioc_g_selection(file, fh, &s);
1572
1573 /* copying results to old structure on success */
1574 if (!ret)
1575 p->c = s.r;
1576 }
1577
1555 if (!ret) 1578 if (!ret)
1556 dbgrect(vfd, "", &p->c); 1579 dbgrect(vfd, "", &p->c);
1557 break; 1580 break;
@@ -1560,15 +1583,65 @@ static long __video_do_ioctl(struct file *file,
1560 { 1583 {
1561 struct v4l2_crop *p = arg; 1584 struct v4l2_crop *p = arg;
1562 1585
1563 if (!ops->vidioc_s_crop) 1586 if (!ops->vidioc_s_crop && !ops->vidioc_s_selection)
1564 break; 1587 break;
1588
1565 if (ret_prio) { 1589 if (ret_prio) {
1566 ret = ret_prio; 1590 ret = ret_prio;
1567 break; 1591 break;
1568 } 1592 }
1569 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names)); 1593 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
1570 dbgrect(vfd, "", &p->c); 1594 dbgrect(vfd, "", &p->c);
1571 ret = ops->vidioc_s_crop(file, fh, p); 1595
1596 if (ops->vidioc_s_crop) {
1597 ret = ops->vidioc_s_crop(file, fh, p);
1598 } else {
1599 /* simulate capture crop using selection api */
1600 struct v4l2_selection s = {
1601 .type = p->type,
1602 .r = p->c,
1603 };
1604
1605 /* crop means compose for output devices */
1606 if (V4L2_TYPE_IS_OUTPUT(p->type))
1607 s.target = V4L2_SEL_TGT_COMPOSE_ACTIVE;
1608 else
1609 s.target = V4L2_SEL_TGT_CROP_ACTIVE;
1610
1611 ret = ops->vidioc_s_selection(file, fh, &s);
1612 }
1613 break;
1614 }
1615 case VIDIOC_G_SELECTION:
1616 {
1617 struct v4l2_selection *p = arg;
1618
1619 if (!ops->vidioc_g_selection)
1620 break;
1621
1622 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
1623
1624 ret = ops->vidioc_g_selection(file, fh, p);
1625 if (!ret)
1626 dbgrect(vfd, "", &p->r);
1627 break;
1628 }
1629 case VIDIOC_S_SELECTION:
1630 {
1631 struct v4l2_selection *p = arg;
1632
1633 if (!ops->vidioc_s_selection)
1634 break;
1635
1636 if (ret_prio) {
1637 ret = ret_prio;
1638 break;
1639 }
1640
1641 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
1642 dbgrect(vfd, "", &p->r);
1643
1644 ret = ops->vidioc_s_selection(file, fh, p);
1572 break; 1645 break;
1573 } 1646 }
1574 case VIDIOC_CROPCAP: 1647 case VIDIOC_CROPCAP:
@@ -1576,11 +1649,42 @@ static long __video_do_ioctl(struct file *file,
1576 struct v4l2_cropcap *p = arg; 1649 struct v4l2_cropcap *p = arg;
1577 1650
1578 /*FIXME: Should also show v4l2_fract pixelaspect */ 1651 /*FIXME: Should also show v4l2_fract pixelaspect */
1579 if (!ops->vidioc_cropcap) 1652 if (!ops->vidioc_cropcap && !ops->vidioc_g_selection)
1580 break; 1653 break;
1581 1654
1582 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names)); 1655 dbgarg(cmd, "type=%s\n", prt_names(p->type, v4l2_type_names));
1583 ret = ops->vidioc_cropcap(file, fh, p); 1656 if (ops->vidioc_cropcap) {
1657 ret = ops->vidioc_cropcap(file, fh, p);
1658 } else {
1659 struct v4l2_selection s = { .type = p->type };
1660
1661 /* obtaining bounds */
1662 if (V4L2_TYPE_IS_OUTPUT(p->type))
1663 s.target = V4L2_SEL_TGT_COMPOSE_BOUNDS;
1664 else
1665 s.target = V4L2_SEL_TGT_CROP_BOUNDS;
1666
1667 ret = ops->vidioc_g_selection(file, fh, &s);
1668 if (ret)
1669 break;
1670 p->bounds = s.r;
1671
1672 /* obtaining defrect */
1673 if (V4L2_TYPE_IS_OUTPUT(p->type))
1674 s.target = V4L2_SEL_TGT_COMPOSE_DEFAULT;
1675 else
1676 s.target = V4L2_SEL_TGT_CROP_DEFAULT;
1677
1678 ret = ops->vidioc_g_selection(file, fh, &s);
1679 if (ret)
1680 break;
1681 p->defrect = s.r;
1682
1683 /* setting trivial pixelaspect */
1684 p->pixelaspect.numerator = 1;
1685 p->pixelaspect.denominator = 1;
1686 }
1687
1584 if (!ret) { 1688 if (!ret) {
1585 dbgrect(vfd, "bounds ", &p->bounds); 1689 dbgrect(vfd, "bounds ", &p->bounds);
1586 dbgrect(vfd, "defrect ", &p->defrect); 1690 dbgrect(vfd, "defrect ", &p->defrect);
@@ -2226,6 +2330,10 @@ static int check_array_args(unsigned int cmd, void *parg, size_t *array_size,
2226 struct v4l2_ext_controls *ctrls = parg; 2330 struct v4l2_ext_controls *ctrls = parg;
2227 2331
2228 if (ctrls->count != 0) { 2332 if (ctrls->count != 0) {
2333 if (ctrls->count > V4L2_CID_MAX_CTRLS) {
2334 ret = -EINVAL;
2335 break;
2336 }
2229 *user_ptr = (void __user *)ctrls->controls; 2337 *user_ptr = (void __user *)ctrls->controls;
2230 *kernel_ptr = (void *)&ctrls->controls; 2338 *kernel_ptr = (void *)&ctrls->controls;
2231 *array_size = sizeof(struct v4l2_ext_control) 2339 *array_size = sizeof(struct v4l2_ext_control)
diff --git a/drivers/media/video/v4l2-subdev.c b/drivers/media/video/v4l2-subdev.c
index 65ade5f03c2..41d118ee2de 100644
--- a/drivers/media/video/v4l2-subdev.c
+++ b/drivers/media/video/v4l2-subdev.c
@@ -193,6 +193,10 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg)
193 return v4l2_subdev_call(sd, core, s_register, p); 193 return v4l2_subdev_call(sd, core, s_register, p);
194 } 194 }
195#endif 195#endif
196
197 case VIDIOC_LOG_STATUS:
198 return v4l2_subdev_call(sd, core, log_status);
199
196#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) 200#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
197 case VIDIOC_SUBDEV_G_FMT: { 201 case VIDIOC_SUBDEV_G_FMT: {
198 struct v4l2_subdev_format *format = arg; 202 struct v4l2_subdev_format *format = arg;
diff --git a/drivers/media/video/via-camera.c b/drivers/media/video/via-camera.c
index bfae41ba53c..20f7237b824 100644
--- a/drivers/media/video/via-camera.c
+++ b/drivers/media/video/via-camera.c
@@ -156,14 +156,10 @@ static struct via_format {
156 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 156 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
157 .bpp = 2, 157 .bpp = 2,
158 }, 158 },
159 {
160 .desc = "RGB 565",
161 .pixelformat = V4L2_PIX_FMT_RGB565,
162 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
163 .bpp = 2,
164 },
165 /* RGB444 and Bayer should be doable, but have never been 159 /* RGB444 and Bayer should be doable, but have never been
166 tested with this driver. */ 160 tested with this driver. RGB565 seems to work at the default
161 resolution, but results in color corruption when being scaled by
162 viacam_set_scaled(), and is disabled as a result. */
167}; 163};
168#define N_VIA_FMTS ARRAY_SIZE(via_formats) 164#define N_VIA_FMTS ARRAY_SIZE(via_formats)
169 165
@@ -1504,14 +1500,4 @@ static struct platform_driver viacam_driver = {
1504 .remove = viacam_remove, 1500 .remove = viacam_remove,
1505}; 1501};
1506 1502
1507static int viacam_init(void) 1503module_platform_driver(viacam_driver);
1508{
1509 return platform_driver_register(&viacam_driver);
1510}
1511module_init(viacam_init);
1512
1513static void viacam_exit(void)
1514{
1515 platform_driver_unregister(&viacam_driver);
1516}
1517module_exit(viacam_exit);
diff --git a/drivers/media/video/videobuf-dvb.c b/drivers/media/video/videobuf-dvb.c
index 3de7c7e4402..59cb54aa294 100644
--- a/drivers/media/video/videobuf-dvb.c
+++ b/drivers/media/video/videobuf-dvb.c
@@ -226,9 +226,10 @@ static int videobuf_dvb_register_frontend(struct dvb_adapter *adapter,
226 } 226 }
227 227
228 /* register network adapter */ 228 /* register network adapter */
229 dvb_net_init(adapter, &dvb->net, &dvb->demux.dmx); 229 result = dvb_net_init(adapter, &dvb->net, &dvb->demux.dmx);
230 if (dvb->net.dvbdev == NULL) { 230 if (result < 0) {
231 result = -ENOMEM; 231 printk(KERN_WARNING "%s: dvb_net_init failed (errno = %d)\n",
232 dvb->name, result);
232 goto fail_fe_conn; 233 goto fail_fe_conn;
233 } 234 }
234 return 0; 235 return 0;
diff --git a/drivers/media/video/videobuf2-core.c b/drivers/media/video/videobuf2-core.c
index 95a3f5e82ae..2e8f1df775b 100644
--- a/drivers/media/video/videobuf2-core.c
+++ b/drivers/media/video/videobuf2-core.c
@@ -30,7 +30,7 @@ module_param(debug, int, 0644);
30 printk(KERN_DEBUG "vb2: " fmt, ## arg); \ 30 printk(KERN_DEBUG "vb2: " fmt, ## arg); \
31 } while (0) 31 } while (0)
32 32
33#define call_memop(q, plane, op, args...) \ 33#define call_memop(q, op, args...) \
34 (((q)->mem_ops->op) ? \ 34 (((q)->mem_ops->op) ? \
35 ((q)->mem_ops->op(args)) : 0) 35 ((q)->mem_ops->op(args)) : 0)
36 36
@@ -52,7 +52,7 @@ static int __vb2_buf_mem_alloc(struct vb2_buffer *vb)
52 52
53 /* Allocate memory for all planes in this buffer */ 53 /* Allocate memory for all planes in this buffer */
54 for (plane = 0; plane < vb->num_planes; ++plane) { 54 for (plane = 0; plane < vb->num_planes; ++plane) {
55 mem_priv = call_memop(q, plane, alloc, q->alloc_ctx[plane], 55 mem_priv = call_memop(q, alloc, q->alloc_ctx[plane],
56 q->plane_sizes[plane]); 56 q->plane_sizes[plane]);
57 if (IS_ERR_OR_NULL(mem_priv)) 57 if (IS_ERR_OR_NULL(mem_priv))
58 goto free; 58 goto free;
@@ -65,8 +65,10 @@ static int __vb2_buf_mem_alloc(struct vb2_buffer *vb)
65 return 0; 65 return 0;
66free: 66free:
67 /* Free already allocated memory if one of the allocations failed */ 67 /* Free already allocated memory if one of the allocations failed */
68 for (; plane > 0; --plane) 68 for (; plane > 0; --plane) {
69 call_memop(q, plane, put, vb->planes[plane - 1].mem_priv); 69 call_memop(q, put, vb->planes[plane - 1].mem_priv);
70 vb->planes[plane - 1].mem_priv = NULL;
71 }
70 72
71 return -ENOMEM; 73 return -ENOMEM;
72} 74}
@@ -80,10 +82,10 @@ static void __vb2_buf_mem_free(struct vb2_buffer *vb)
80 unsigned int plane; 82 unsigned int plane;
81 83
82 for (plane = 0; plane < vb->num_planes; ++plane) { 84 for (plane = 0; plane < vb->num_planes; ++plane) {
83 call_memop(q, plane, put, vb->planes[plane].mem_priv); 85 call_memop(q, put, vb->planes[plane].mem_priv);
84 vb->planes[plane].mem_priv = NULL; 86 vb->planes[plane].mem_priv = NULL;
85 dprintk(3, "Freed plane %d of buffer %d\n", 87 dprintk(3, "Freed plane %d of buffer %d\n", plane,
86 plane, vb->v4l2_buf.index); 88 vb->v4l2_buf.index);
87 } 89 }
88} 90}
89 91
@@ -97,12 +99,9 @@ static void __vb2_buf_userptr_put(struct vb2_buffer *vb)
97 unsigned int plane; 99 unsigned int plane;
98 100
99 for (plane = 0; plane < vb->num_planes; ++plane) { 101 for (plane = 0; plane < vb->num_planes; ++plane) {
100 void *mem_priv = vb->planes[plane].mem_priv; 102 if (vb->planes[plane].mem_priv)
101 103 call_memop(q, put_userptr, vb->planes[plane].mem_priv);
102 if (mem_priv) { 104 vb->planes[plane].mem_priv = NULL;
103 call_memop(q, plane, put_userptr, mem_priv);
104 vb->planes[plane].mem_priv = NULL;
105 }
106 } 105 }
107} 106}
108 107
@@ -305,7 +304,7 @@ static bool __buffer_in_use(struct vb2_queue *q, struct vb2_buffer *vb)
305 * case anyway. If num_users() returns more than 1, 304 * case anyway. If num_users() returns more than 1,
306 * we are not the only user of the plane's memory. 305 * we are not the only user of the plane's memory.
307 */ 306 */
308 if (mem_priv && call_memop(q, plane, num_users, mem_priv) > 1) 307 if (mem_priv && call_memop(q, num_users, mem_priv) > 1)
309 return true; 308 return true;
310 } 309 }
311 return false; 310 return false;
@@ -731,10 +730,10 @@ void *vb2_plane_vaddr(struct vb2_buffer *vb, unsigned int plane_no)
731{ 730{
732 struct vb2_queue *q = vb->vb2_queue; 731 struct vb2_queue *q = vb->vb2_queue;
733 732
734 if (plane_no > vb->num_planes) 733 if (plane_no > vb->num_planes || !vb->planes[plane_no].mem_priv)
735 return NULL; 734 return NULL;
736 735
737 return call_memop(q, plane_no, vaddr, vb->planes[plane_no].mem_priv); 736 return call_memop(q, vaddr, vb->planes[plane_no].mem_priv);
738 737
739} 738}
740EXPORT_SYMBOL_GPL(vb2_plane_vaddr); 739EXPORT_SYMBOL_GPL(vb2_plane_vaddr);
@@ -754,10 +753,10 @@ void *vb2_plane_cookie(struct vb2_buffer *vb, unsigned int plane_no)
754{ 753{
755 struct vb2_queue *q = vb->vb2_queue; 754 struct vb2_queue *q = vb->vb2_queue;
756 755
757 if (plane_no > vb->num_planes) 756 if (plane_no > vb->num_planes || !vb->planes[plane_no].mem_priv)
758 return NULL; 757 return NULL;
759 758
760 return call_memop(q, plane_no, cookie, vb->planes[plane_no].mem_priv); 759 return call_memop(q, cookie, vb->planes[plane_no].mem_priv);
761} 760}
762EXPORT_SYMBOL_GPL(vb2_plane_cookie); 761EXPORT_SYMBOL_GPL(vb2_plane_cookie);
763 762
@@ -883,7 +882,8 @@ static int __qbuf_userptr(struct vb2_buffer *vb, const struct v4l2_buffer *b)
883 882
884 for (plane = 0; plane < vb->num_planes; ++plane) { 883 for (plane = 0; plane < vb->num_planes; ++plane) {
885 /* Skip the plane if already verified */ 884 /* Skip the plane if already verified */
886 if (vb->v4l2_planes[plane].m.userptr == planes[plane].m.userptr 885 if (vb->v4l2_planes[plane].m.userptr &&
886 vb->v4l2_planes[plane].m.userptr == planes[plane].m.userptr
887 && vb->v4l2_planes[plane].length == planes[plane].length) 887 && vb->v4l2_planes[plane].length == planes[plane].length)
888 continue; 888 continue;
889 889
@@ -898,27 +898,23 @@ static int __qbuf_userptr(struct vb2_buffer *vb, const struct v4l2_buffer *b)
898 898
899 /* Release previously acquired memory if present */ 899 /* Release previously acquired memory if present */
900 if (vb->planes[plane].mem_priv) 900 if (vb->planes[plane].mem_priv)
901 call_memop(q, plane, put_userptr, 901 call_memop(q, put_userptr, vb->planes[plane].mem_priv);
902 vb->planes[plane].mem_priv);
903 902
904 vb->planes[plane].mem_priv = NULL; 903 vb->planes[plane].mem_priv = NULL;
905 vb->v4l2_planes[plane].m.userptr = 0; 904 vb->v4l2_planes[plane].m.userptr = 0;
906 vb->v4l2_planes[plane].length = 0; 905 vb->v4l2_planes[plane].length = 0;
907 906
908 /* Acquire each plane's memory */ 907 /* Acquire each plane's memory */
909 if (q->mem_ops->get_userptr) { 908 mem_priv = call_memop(q, get_userptr, q->alloc_ctx[plane],
910 mem_priv = q->mem_ops->get_userptr(q->alloc_ctx[plane], 909 planes[plane].m.userptr,
911 planes[plane].m.userptr, 910 planes[plane].length, write);
912 planes[plane].length, 911 if (IS_ERR_OR_NULL(mem_priv)) {
913 write); 912 dprintk(1, "qbuf: failed acquiring userspace "
914 if (IS_ERR(mem_priv)) {
915 dprintk(1, "qbuf: failed acquiring userspace "
916 "memory for plane %d\n", plane); 913 "memory for plane %d\n", plane);
917 ret = PTR_ERR(mem_priv); 914 ret = mem_priv ? PTR_ERR(mem_priv) : -EINVAL;
918 goto err; 915 goto err;
919 }
920 vb->planes[plane].mem_priv = mem_priv;
921 } 916 }
917 vb->planes[plane].mem_priv = mem_priv;
922 } 918 }
923 919
924 /* 920 /*
@@ -943,8 +939,7 @@ err:
943 /* In case of errors, release planes that were already acquired */ 939 /* In case of errors, release planes that were already acquired */
944 for (plane = 0; plane < vb->num_planes; ++plane) { 940 for (plane = 0; plane < vb->num_planes; ++plane) {
945 if (vb->planes[plane].mem_priv) 941 if (vb->planes[plane].mem_priv)
946 call_memop(q, plane, put_userptr, 942 call_memop(q, put_userptr, vb->planes[plane].mem_priv);
947 vb->planes[plane].mem_priv);
948 vb->planes[plane].mem_priv = NULL; 943 vb->planes[plane].mem_priv = NULL;
949 vb->v4l2_planes[plane].m.userptr = 0; 944 vb->v4l2_planes[plane].m.userptr = 0;
950 vb->v4l2_planes[plane].length = 0; 945 vb->v4l2_planes[plane].length = 0;
@@ -1081,46 +1076,76 @@ EXPORT_SYMBOL_GPL(vb2_prepare_buf);
1081 */ 1076 */
1082int vb2_qbuf(struct vb2_queue *q, struct v4l2_buffer *b) 1077int vb2_qbuf(struct vb2_queue *q, struct v4l2_buffer *b)
1083{ 1078{
1079 struct rw_semaphore *mmap_sem = NULL;
1084 struct vb2_buffer *vb; 1080 struct vb2_buffer *vb;
1085 int ret; 1081 int ret = 0;
1082
1083 /*
1084 * In case of user pointer buffers vb2 allocator needs to get direct
1085 * access to userspace pages. This requires getting read access on
1086 * mmap semaphore in the current process structure. The same
1087 * semaphore is taken before calling mmap operation, while both mmap
1088 * and qbuf are called by the driver or v4l2 core with driver's lock
1089 * held. To avoid a AB-BA deadlock (mmap_sem then driver's lock in
1090 * mmap and driver's lock then mmap_sem in qbuf) the videobuf2 core
1091 * release driver's lock, takes mmap_sem and then takes again driver's
1092 * lock.
1093 *
1094 * To avoid race with other vb2 calls, which might be called after
1095 * releasing driver's lock, this operation is performed at the
1096 * beggining of qbuf processing. This way the queue status is
1097 * consistent after getting driver's lock back.
1098 */
1099 if (q->memory == V4L2_MEMORY_USERPTR) {
1100 mmap_sem = &current->mm->mmap_sem;
1101 call_qop(q, wait_prepare, q);
1102 down_read(mmap_sem);
1103 call_qop(q, wait_finish, q);
1104 }
1086 1105
1087 if (q->fileio) { 1106 if (q->fileio) {
1088 dprintk(1, "qbuf: file io in progress\n"); 1107 dprintk(1, "qbuf: file io in progress\n");
1089 return -EBUSY; 1108 ret = -EBUSY;
1109 goto unlock;
1090 } 1110 }
1091 1111
1092 if (b->type != q->type) { 1112 if (b->type != q->type) {
1093 dprintk(1, "qbuf: invalid buffer type\n"); 1113 dprintk(1, "qbuf: invalid buffer type\n");
1094 return -EINVAL; 1114 ret = -EINVAL;
1115 goto unlock;
1095 } 1116 }
1096 1117
1097 if (b->index >= q->num_buffers) { 1118 if (b->index >= q->num_buffers) {
1098 dprintk(1, "qbuf: buffer index out of range\n"); 1119 dprintk(1, "qbuf: buffer index out of range\n");
1099 return -EINVAL; 1120 ret = -EINVAL;
1121 goto unlock;
1100 } 1122 }
1101 1123
1102 vb = q->bufs[b->index]; 1124 vb = q->bufs[b->index];
1103 if (NULL == vb) { 1125 if (NULL == vb) {
1104 /* Should never happen */ 1126 /* Should never happen */
1105 dprintk(1, "qbuf: buffer is NULL\n"); 1127 dprintk(1, "qbuf: buffer is NULL\n");
1106 return -EINVAL; 1128 ret = -EINVAL;
1129 goto unlock;
1107 } 1130 }
1108 1131
1109 if (b->memory != q->memory) { 1132 if (b->memory != q->memory) {
1110 dprintk(1, "qbuf: invalid memory type\n"); 1133 dprintk(1, "qbuf: invalid memory type\n");
1111 return -EINVAL; 1134 ret = -EINVAL;
1135 goto unlock;
1112 } 1136 }
1113 1137
1114 switch (vb->state) { 1138 switch (vb->state) {
1115 case VB2_BUF_STATE_DEQUEUED: 1139 case VB2_BUF_STATE_DEQUEUED:
1116 ret = __buf_prepare(vb, b); 1140 ret = __buf_prepare(vb, b);
1117 if (ret) 1141 if (ret)
1118 return ret; 1142 goto unlock;
1119 case VB2_BUF_STATE_PREPARED: 1143 case VB2_BUF_STATE_PREPARED:
1120 break; 1144 break;
1121 default: 1145 default:
1122 dprintk(1, "qbuf: buffer already in use\n"); 1146 dprintk(1, "qbuf: buffer already in use\n");
1123 return -EINVAL; 1147 ret = -EINVAL;
1148 goto unlock;
1124 } 1149 }
1125 1150
1126 /* 1151 /*
@@ -1141,7 +1166,10 @@ int vb2_qbuf(struct vb2_queue *q, struct v4l2_buffer *b)
1141 __fill_v4l2_buffer(vb, b); 1166 __fill_v4l2_buffer(vb, b);
1142 1167
1143 dprintk(1, "qbuf of buffer %d succeeded\n", vb->v4l2_buf.index); 1168 dprintk(1, "qbuf of buffer %d succeeded\n", vb->v4l2_buf.index);
1144 return 0; 1169unlock:
1170 if (mmap_sem)
1171 up_read(mmap_sem);
1172 return ret;
1145} 1173}
1146EXPORT_SYMBOL_GPL(vb2_qbuf); 1174EXPORT_SYMBOL_GPL(vb2_qbuf);
1147 1175
@@ -1521,7 +1549,6 @@ static int __find_plane_by_offset(struct vb2_queue *q, unsigned long off,
1521int vb2_mmap(struct vb2_queue *q, struct vm_area_struct *vma) 1549int vb2_mmap(struct vb2_queue *q, struct vm_area_struct *vma)
1522{ 1550{
1523 unsigned long off = vma->vm_pgoff << PAGE_SHIFT; 1551 unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
1524 struct vb2_plane *vb_plane;
1525 struct vb2_buffer *vb; 1552 struct vb2_buffer *vb;
1526 unsigned int buffer, plane; 1553 unsigned int buffer, plane;
1527 int ret; 1554 int ret;
@@ -1558,9 +1585,8 @@ int vb2_mmap(struct vb2_queue *q, struct vm_area_struct *vma)
1558 return ret; 1585 return ret;
1559 1586
1560 vb = q->bufs[buffer]; 1587 vb = q->bufs[buffer];
1561 vb_plane = &vb->planes[plane];
1562 1588
1563 ret = q->mem_ops->mmap(vb_plane->mem_priv, vma); 1589 ret = call_memop(q, mmap, vb->planes[plane].mem_priv, vma);
1564 if (ret) 1590 if (ret)
1565 return ret; 1591 return ret;
1566 1592
diff --git a/drivers/media/video/videobuf2-dma-sg.c b/drivers/media/video/videobuf2-dma-sg.c
index 3bad8b105fe..25c3b360e1a 100644
--- a/drivers/media/video/videobuf2-dma-sg.c
+++ b/drivers/media/video/videobuf2-dma-sg.c
@@ -140,7 +140,6 @@ static void *vb2_dma_sg_get_userptr(void *alloc_ctx, unsigned long vaddr,
140 if (!buf->pages) 140 if (!buf->pages)
141 goto userptr_fail_pages_array_alloc; 141 goto userptr_fail_pages_array_alloc;
142 142
143 down_read(&current->mm->mmap_sem);
144 num_pages_from_user = get_user_pages(current, current->mm, 143 num_pages_from_user = get_user_pages(current, current->mm,
145 vaddr & PAGE_MASK, 144 vaddr & PAGE_MASK,
146 buf->sg_desc.num_pages, 145 buf->sg_desc.num_pages,
@@ -148,7 +147,7 @@ static void *vb2_dma_sg_get_userptr(void *alloc_ctx, unsigned long vaddr,
148 1, /* force */ 147 1, /* force */
149 buf->pages, 148 buf->pages,
150 NULL); 149 NULL);
151 up_read(&current->mm->mmap_sem); 150
152 if (num_pages_from_user != buf->sg_desc.num_pages) 151 if (num_pages_from_user != buf->sg_desc.num_pages)
153 goto userptr_fail_get_user_pages; 152 goto userptr_fail_get_user_pages;
154 153
diff --git a/drivers/media/video/videobuf2-memops.c b/drivers/media/video/videobuf2-memops.c
index 71a7a78c3fc..c41cb60245d 100644
--- a/drivers/media/video/videobuf2-memops.c
+++ b/drivers/media/video/videobuf2-memops.c
@@ -100,29 +100,26 @@ int vb2_get_contig_userptr(unsigned long vaddr, unsigned long size,
100 unsigned long offset, start, end; 100 unsigned long offset, start, end;
101 unsigned long this_pfn, prev_pfn; 101 unsigned long this_pfn, prev_pfn;
102 dma_addr_t pa = 0; 102 dma_addr_t pa = 0;
103 int ret = -EFAULT;
104 103
105 start = vaddr; 104 start = vaddr;
106 offset = start & ~PAGE_MASK; 105 offset = start & ~PAGE_MASK;
107 end = start + size; 106 end = start + size;
108 107
109 down_read(&mm->mmap_sem);
110 vma = find_vma(mm, start); 108 vma = find_vma(mm, start);
111 109
112 if (vma == NULL || vma->vm_end < end) 110 if (vma == NULL || vma->vm_end < end)
113 goto done; 111 return -EFAULT;
114 112
115 for (prev_pfn = 0; start < end; start += PAGE_SIZE) { 113 for (prev_pfn = 0; start < end; start += PAGE_SIZE) {
116 ret = follow_pfn(vma, start, &this_pfn); 114 int ret = follow_pfn(vma, start, &this_pfn);
117 if (ret) 115 if (ret)
118 goto done; 116 return ret;
119 117
120 if (prev_pfn == 0) 118 if (prev_pfn == 0)
121 pa = this_pfn << PAGE_SHIFT; 119 pa = this_pfn << PAGE_SHIFT;
122 else if (this_pfn != prev_pfn + 1) { 120 else if (this_pfn != prev_pfn + 1)
123 ret = -EFAULT; 121 return -EFAULT;
124 goto done; 122
125 }
126 prev_pfn = this_pfn; 123 prev_pfn = this_pfn;
127 } 124 }
128 125
@@ -130,16 +127,11 @@ int vb2_get_contig_userptr(unsigned long vaddr, unsigned long size,
130 * Memory is contigous, lock vma and return to the caller 127 * Memory is contigous, lock vma and return to the caller
131 */ 128 */
132 *res_vma = vb2_get_vma(vma); 129 *res_vma = vb2_get_vma(vma);
133 if (*res_vma == NULL) { 130 if (*res_vma == NULL)
134 ret = -ENOMEM; 131 return -ENOMEM;
135 goto done;
136 }
137 *res_pa = pa + offset;
138 ret = 0;
139 132
140done: 133 *res_pa = pa + offset;
141 up_read(&mm->mmap_sem); 134 return 0;
142 return ret;
143} 135}
144EXPORT_SYMBOL_GPL(vb2_get_contig_userptr); 136EXPORT_SYMBOL_GPL(vb2_get_contig_userptr);
145 137
diff --git a/drivers/media/video/videobuf2-vmalloc.c b/drivers/media/video/videobuf2-vmalloc.c
index a3a88423405..4e789a178f8 100644
--- a/drivers/media/video/videobuf2-vmalloc.c
+++ b/drivers/media/video/videobuf2-vmalloc.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/sched.h>
15#include <linux/slab.h> 16#include <linux/slab.h>
16#include <linux/vmalloc.h> 17#include <linux/vmalloc.h>
17 18
@@ -20,7 +21,10 @@
20 21
21struct vb2_vmalloc_buf { 22struct vb2_vmalloc_buf {
22 void *vaddr; 23 void *vaddr;
24 struct page **pages;
25 int write;
23 unsigned long size; 26 unsigned long size;
27 unsigned int n_pages;
24 atomic_t refcount; 28 atomic_t refcount;
25 struct vb2_vmarea_handler handler; 29 struct vb2_vmarea_handler handler;
26}; 30};
@@ -31,7 +35,7 @@ static void *vb2_vmalloc_alloc(void *alloc_ctx, unsigned long size)
31{ 35{
32 struct vb2_vmalloc_buf *buf; 36 struct vb2_vmalloc_buf *buf;
33 37
34 buf = kzalloc(sizeof *buf, GFP_KERNEL); 38 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
35 if (!buf) 39 if (!buf)
36 return NULL; 40 return NULL;
37 41
@@ -42,15 +46,12 @@ static void *vb2_vmalloc_alloc(void *alloc_ctx, unsigned long size)
42 buf->handler.arg = buf; 46 buf->handler.arg = buf;
43 47
44 if (!buf->vaddr) { 48 if (!buf->vaddr) {
45 printk(KERN_ERR "vmalloc of size %ld failed\n", buf->size); 49 pr_debug("vmalloc of size %ld failed\n", buf->size);
46 kfree(buf); 50 kfree(buf);
47 return NULL; 51 return NULL;
48 } 52 }
49 53
50 atomic_inc(&buf->refcount); 54 atomic_inc(&buf->refcount);
51 printk(KERN_DEBUG "Allocated vmalloc buffer of size %ld at vaddr=%p\n",
52 buf->size, buf->vaddr);
53
54 return buf; 55 return buf;
55} 56}
56 57
@@ -59,21 +60,84 @@ static void vb2_vmalloc_put(void *buf_priv)
59 struct vb2_vmalloc_buf *buf = buf_priv; 60 struct vb2_vmalloc_buf *buf = buf_priv;
60 61
61 if (atomic_dec_and_test(&buf->refcount)) { 62 if (atomic_dec_and_test(&buf->refcount)) {
62 printk(KERN_DEBUG "%s: Freeing vmalloc mem at vaddr=%p\n",
63 __func__, buf->vaddr);
64 vfree(buf->vaddr); 63 vfree(buf->vaddr);
65 kfree(buf); 64 kfree(buf);
66 } 65 }
67} 66}
68 67
69static void *vb2_vmalloc_vaddr(void *buf_priv) 68static void *vb2_vmalloc_get_userptr(void *alloc_ctx, unsigned long vaddr,
69 unsigned long size, int write)
70{
71 struct vb2_vmalloc_buf *buf;
72 unsigned long first, last;
73 int n_pages, offset;
74
75 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
76 if (!buf)
77 return NULL;
78
79 buf->write = write;
80 offset = vaddr & ~PAGE_MASK;
81 buf->size = size;
82
83 first = vaddr >> PAGE_SHIFT;
84 last = (vaddr + size - 1) >> PAGE_SHIFT;
85 buf->n_pages = last - first + 1;
86 buf->pages = kzalloc(buf->n_pages * sizeof(struct page *), GFP_KERNEL);
87 if (!buf->pages)
88 goto fail_pages_array_alloc;
89
90 /* current->mm->mmap_sem is taken by videobuf2 core */
91 n_pages = get_user_pages(current, current->mm, vaddr & PAGE_MASK,
92 buf->n_pages, write, 1, /* force */
93 buf->pages, NULL);
94 if (n_pages != buf->n_pages)
95 goto fail_get_user_pages;
96
97 buf->vaddr = vm_map_ram(buf->pages, buf->n_pages, -1, PAGE_KERNEL);
98 if (!buf->vaddr)
99 goto fail_get_user_pages;
100
101 buf->vaddr += offset;
102 return buf;
103
104fail_get_user_pages:
105 pr_debug("get_user_pages requested/got: %d/%d]\n", n_pages,
106 buf->n_pages);
107 while (--n_pages >= 0)
108 put_page(buf->pages[n_pages]);
109 kfree(buf->pages);
110
111fail_pages_array_alloc:
112 kfree(buf);
113
114 return NULL;
115}
116
117static void vb2_vmalloc_put_userptr(void *buf_priv)
70{ 118{
71 struct vb2_vmalloc_buf *buf = buf_priv; 119 struct vb2_vmalloc_buf *buf = buf_priv;
120 unsigned long vaddr = (unsigned long)buf->vaddr & PAGE_MASK;
121 unsigned int i;
122
123 if (vaddr)
124 vm_unmap_ram((void *)vaddr, buf->n_pages);
125 for (i = 0; i < buf->n_pages; ++i) {
126 if (buf->write)
127 set_page_dirty_lock(buf->pages[i]);
128 put_page(buf->pages[i]);
129 }
130 kfree(buf->pages);
131 kfree(buf);
132}
72 133
73 BUG_ON(!buf); 134static void *vb2_vmalloc_vaddr(void *buf_priv)
135{
136 struct vb2_vmalloc_buf *buf = buf_priv;
74 137
75 if (!buf->vaddr) { 138 if (!buf->vaddr) {
76 printk(KERN_ERR "Address of an unallocated plane requested\n"); 139 pr_err("Address of an unallocated plane requested "
140 "or cannot map user pointer\n");
77 return NULL; 141 return NULL;
78 } 142 }
79 143
@@ -92,13 +156,13 @@ static int vb2_vmalloc_mmap(void *buf_priv, struct vm_area_struct *vma)
92 int ret; 156 int ret;
93 157
94 if (!buf) { 158 if (!buf) {
95 printk(KERN_ERR "No memory to map\n"); 159 pr_err("No memory to map\n");
96 return -EINVAL; 160 return -EINVAL;
97 } 161 }
98 162
99 ret = remap_vmalloc_range(vma, buf->vaddr, 0); 163 ret = remap_vmalloc_range(vma, buf->vaddr, 0);
100 if (ret) { 164 if (ret) {
101 printk(KERN_ERR "Remapping vmalloc memory, error: %d\n", ret); 165 pr_err("Remapping vmalloc memory, error: %d\n", ret);
102 return ret; 166 return ret;
103 } 167 }
104 168
@@ -121,6 +185,8 @@ static int vb2_vmalloc_mmap(void *buf_priv, struct vm_area_struct *vma)
121const struct vb2_mem_ops vb2_vmalloc_memops = { 185const struct vb2_mem_ops vb2_vmalloc_memops = {
122 .alloc = vb2_vmalloc_alloc, 186 .alloc = vb2_vmalloc_alloc,
123 .put = vb2_vmalloc_put, 187 .put = vb2_vmalloc_put,
188 .get_userptr = vb2_vmalloc_get_userptr,
189 .put_userptr = vb2_vmalloc_put_userptr,
124 .vaddr = vb2_vmalloc_vaddr, 190 .vaddr = vb2_vmalloc_vaddr,
125 .mmap = vb2_vmalloc_mmap, 191 .mmap = vb2_vmalloc_mmap,
126 .num_users = vb2_vmalloc_num_users, 192 .num_users = vb2_vmalloc_num_users,
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c
index 52a0a3736c8..4d7391ec800 100644
--- a/drivers/media/video/vino.c
+++ b/drivers/media/video/vino.c
@@ -708,7 +708,7 @@ static int vino_allocate_buffer(struct vino_framebuffer *fb,
708 size, count); 708 size, count);
709 709
710 /* allocate memory for table with virtual (page) addresses */ 710 /* allocate memory for table with virtual (page) addresses */
711 fb->desc_table.virtual = (unsigned long *) 711 fb->desc_table.virtual =
712 kmalloc(count * sizeof(unsigned long), GFP_KERNEL); 712 kmalloc(count * sizeof(unsigned long), GFP_KERNEL);
713 if (!fb->desc_table.virtual) 713 if (!fb->desc_table.virtual)
714 return -ENOMEM; 714 return -ENOMEM;
diff --git a/drivers/staging/media/as102/Kconfig b/drivers/staging/media/as102/Kconfig
index 5865029db0f..28aba00dc62 100644
--- a/drivers/staging/media/as102/Kconfig
+++ b/drivers/staging/media/as102/Kconfig
@@ -1,6 +1,7 @@
1config DVB_AS102 1config DVB_AS102
2 tristate "Abilis AS102 DVB receiver" 2 tristate "Abilis AS102 DVB receiver"
3 depends on DVB_CORE && USB && I2C && INPUT 3 depends on DVB_CORE && USB && I2C && INPUT
4 select FW_LOADER
4 help 5 help
5 Choose Y or M here if you have a device containing an AS102 6 Choose Y or M here if you have a device containing an AS102
6 7
diff --git a/drivers/staging/media/as102/Makefile b/drivers/staging/media/as102/Makefile
index e7dbb6f814d..1bca43e847c 100644
--- a/drivers/staging/media/as102/Makefile
+++ b/drivers/staging/media/as102/Makefile
@@ -3,4 +3,4 @@ dvb-as102-objs := as102_drv.o as102_fw.o as10x_cmd.o as10x_cmd_stream.o \
3 3
4obj-$(CONFIG_DVB_AS102) += dvb-as102.o 4obj-$(CONFIG_DVB_AS102) += dvb-as102.o
5 5
6EXTRA_CFLAGS += -DCONFIG_AS102_USB -Idrivers/media/dvb/dvb-core 6EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core
diff --git a/drivers/staging/media/as102/as102_drv.c b/drivers/staging/media/as102/as102_drv.c
index 828526d4c28..aae0505a36c 100644
--- a/drivers/staging/media/as102/as102_drv.c
+++ b/drivers/staging/media/as102/as102_drv.c
@@ -24,7 +24,7 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/mm.h> 25#include <linux/mm.h>
26#include <linux/kref.h> 26#include <linux/kref.h>
27#include <asm/uaccess.h> 27#include <linux/uaccess.h>
28#include <linux/usb.h> 28#include <linux/usb.h>
29 29
30/* header file for Usb device driver*/ 30/* header file for Usb device driver*/
@@ -56,13 +56,11 @@ int elna_enable = 1;
56module_param_named(elna_enable, elna_enable, int, 0644); 56module_param_named(elna_enable, elna_enable, int, 0644);
57MODULE_PARM_DESC(elna_enable, "Activate eLNA (default: on)"); 57MODULE_PARM_DESC(elna_enable, "Activate eLNA (default: on)");
58 58
59#ifdef DVB_DEFINE_MOD_OPT_ADAPTER_NR
60DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 59DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
61#endif
62 60
63static void as102_stop_stream(struct as102_dev_t *dev) 61static void as102_stop_stream(struct as102_dev_t *dev)
64{ 62{
65 struct as102_bus_adapter_t *bus_adap; 63 struct as10x_bus_adapter_t *bus_adap;
66 64
67 if (dev != NULL) 65 if (dev != NULL)
68 bus_adap = &dev->bus_adap; 66 bus_adap = &dev->bus_adap;
@@ -85,7 +83,7 @@ static void as102_stop_stream(struct as102_dev_t *dev)
85 83
86static int as102_start_stream(struct as102_dev_t *dev) 84static int as102_start_stream(struct as102_dev_t *dev)
87{ 85{
88 struct as102_bus_adapter_t *bus_adap; 86 struct as10x_bus_adapter_t *bus_adap;
89 int ret = -EFAULT; 87 int ret = -EFAULT;
90 88
91 if (dev != NULL) 89 if (dev != NULL)
@@ -111,7 +109,7 @@ static int as102_start_stream(struct as102_dev_t *dev)
111static int as10x_pid_filter(struct as102_dev_t *dev, 109static int as10x_pid_filter(struct as102_dev_t *dev,
112 int index, u16 pid, int onoff) { 110 int index, u16 pid, int onoff) {
113 111
114 struct as102_bus_adapter_t *bus_adap = &dev->bus_adap; 112 struct as10x_bus_adapter_t *bus_adap = &dev->bus_adap;
115 int ret = -EFAULT; 113 int ret = -EFAULT;
116 114
117 ENTER(); 115 ENTER();
@@ -123,22 +121,22 @@ static int as10x_pid_filter(struct as102_dev_t *dev,
123 121
124 switch (onoff) { 122 switch (onoff) {
125 case 0: 123 case 0:
126 ret = as10x_cmd_del_PID_filter(bus_adap, (uint16_t) pid); 124 ret = as10x_cmd_del_PID_filter(bus_adap, (uint16_t) pid);
127 dprintk(debug, "DEL_PID_FILTER([%02d] 0x%04x) ret = %d\n", 125 dprintk(debug, "DEL_PID_FILTER([%02d] 0x%04x) ret = %d\n",
128 index, pid, ret); 126 index, pid, ret);
129 break; 127 break;
130 case 1: 128 case 1:
131 { 129 {
132 struct as10x_ts_filter filter; 130 struct as10x_ts_filter filter;
133 131
134 filter.type = TS_PID_TYPE_TS; 132 filter.type = TS_PID_TYPE_TS;
135 filter.idx = 0xFF; 133 filter.idx = 0xFF;
136 filter.pid = pid; 134 filter.pid = pid;
137 135
138 ret = as10x_cmd_add_PID_filter(bus_adap, &filter); 136 ret = as10x_cmd_add_PID_filter(bus_adap, &filter);
139 dprintk(debug, "ADD_PID_FILTER([%02d -> %02d], 0x%04x) ret = %d\n", 137 dprintk(debug, "ADD_PID_FILTER([%02d -> %02d], 0x%04x) ret = %d\n",
140 index, filter.idx, filter.pid, ret); 138 index, filter.idx, filter.pid, ret);
141 break; 139 break;
142 } 140 }
143 } 141 }
144 142
@@ -159,10 +157,9 @@ static int as102_dvb_dmx_start_feed(struct dvb_demux_feed *dvbdmxfeed)
159 if (mutex_lock_interruptible(&as102_dev->sem)) 157 if (mutex_lock_interruptible(&as102_dev->sem))
160 return -ERESTARTSYS; 158 return -ERESTARTSYS;
161 159
162 if (pid_filtering) { 160 if (pid_filtering)
163 as10x_pid_filter(as102_dev, 161 as10x_pid_filter(as102_dev, dvbdmxfeed->index,
164 dvbdmxfeed->index, dvbdmxfeed->pid, 1); 162 dvbdmxfeed->pid, 1);
165 }
166 163
167 if (as102_dev->streaming++ == 0) 164 if (as102_dev->streaming++ == 0)
168 ret = as102_start_stream(as102_dev); 165 ret = as102_start_stream(as102_dev);
@@ -185,10 +182,9 @@ static int as102_dvb_dmx_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
185 if (--as102_dev->streaming == 0) 182 if (--as102_dev->streaming == 0)
186 as102_stop_stream(as102_dev); 183 as102_stop_stream(as102_dev);
187 184
188 if (pid_filtering) { 185 if (pid_filtering)
189 as10x_pid_filter(as102_dev, 186 as10x_pid_filter(as102_dev, dvbdmxfeed->index,
190 dvbdmxfeed->index, dvbdmxfeed->pid, 0); 187 dvbdmxfeed->pid, 0);
191 }
192 188
193 mutex_unlock(&as102_dev->sem); 189 mutex_unlock(&as102_dev->sem);
194 LEAVE(); 190 LEAVE();
@@ -197,27 +193,16 @@ static int as102_dvb_dmx_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
197 193
198int as102_dvb_register(struct as102_dev_t *as102_dev) 194int as102_dvb_register(struct as102_dev_t *as102_dev)
199{ 195{
200 int ret = 0; 196 struct device *dev = &as102_dev->bus_adap.usb_dev->dev;
201 ENTER(); 197 int ret;
202 198
203 ret = dvb_register_adapter(&as102_dev->dvb_adap, 199 ret = dvb_register_adapter(&as102_dev->dvb_adap,
204 as102_dev->name, 200 as102_dev->name, THIS_MODULE,
205 THIS_MODULE, 201 dev, adapter_nr);
206#if defined(CONFIG_AS102_USB)
207 &as102_dev->bus_adap.usb_dev->dev
208#elif defined(CONFIG_AS102_SPI)
209 &as102_dev->bus_adap.spi_dev->dev
210#else
211#error >>> dvb_register_adapter <<<
212#endif
213#ifdef DVB_DEFINE_MOD_OPT_ADAPTER_NR
214 , adapter_nr
215#endif
216 );
217 if (ret < 0) { 202 if (ret < 0) {
218 err("%s: dvb_register_adapter() failed (errno = %d)", 203 dev_err(dev, "%s: dvb_register_adapter() failed: %d\n",
219 __func__, ret); 204 __func__, ret);
220 goto failed; 205 return ret;
221 } 206 }
222 207
223 as102_dev->dvb_dmx.priv = as102_dev; 208 as102_dev->dvb_dmx.priv = as102_dev;
@@ -235,22 +220,22 @@ int as102_dvb_register(struct as102_dev_t *as102_dev)
235 220
236 ret = dvb_dmx_init(&as102_dev->dvb_dmx); 221 ret = dvb_dmx_init(&as102_dev->dvb_dmx);
237 if (ret < 0) { 222 if (ret < 0) {
238 err("%s: dvb_dmx_init() failed (errno = %d)", __func__, ret); 223 dev_err(dev, "%s: dvb_dmx_init() failed: %d\n", __func__, ret);
239 goto failed; 224 goto edmxinit;
240 } 225 }
241 226
242 ret = dvb_dmxdev_init(&as102_dev->dvb_dmxdev, &as102_dev->dvb_adap); 227 ret = dvb_dmxdev_init(&as102_dev->dvb_dmxdev, &as102_dev->dvb_adap);
243 if (ret < 0) { 228 if (ret < 0) {
244 err("%s: dvb_dmxdev_init() failed (errno = %d)", __func__, 229 dev_err(dev, "%s: dvb_dmxdev_init() failed: %d\n",
245 ret); 230 __func__, ret);
246 goto failed; 231 goto edmxdinit;
247 } 232 }
248 233
249 ret = as102_dvb_register_fe(as102_dev, &as102_dev->dvb_fe); 234 ret = as102_dvb_register_fe(as102_dev, &as102_dev->dvb_fe);
250 if (ret < 0) { 235 if (ret < 0) {
251 err("%s: as102_dvb_register_frontend() failed (errno = %d)", 236 dev_err(dev, "%s: as102_dvb_register_frontend() failed: %d",
252 __func__, ret); 237 __func__, ret);
253 goto failed; 238 goto efereg;
254 } 239 }
255 240
256 /* init bus mutex for token locking */ 241 /* init bus mutex for token locking */
@@ -259,7 +244,6 @@ int as102_dvb_register(struct as102_dev_t *as102_dev)
259 /* init start / stop stream mutex */ 244 /* init start / stop stream mutex */
260 mutex_init(&as102_dev->sem); 245 mutex_init(&as102_dev->sem);
261 246
262#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
263 /* 247 /*
264 * try to load as102 firmware. If firmware upload failed, we'll be 248 * try to load as102 firmware. If firmware upload failed, we'll be
265 * able to upload it later. 249 * able to upload it later.
@@ -267,18 +251,21 @@ int as102_dvb_register(struct as102_dev_t *as102_dev)
267 if (fw_upload) 251 if (fw_upload)
268 try_then_request_module(as102_fw_upload(&as102_dev->bus_adap), 252 try_then_request_module(as102_fw_upload(&as102_dev->bus_adap),
269 "firmware_class"); 253 "firmware_class");
270#endif
271 254
272failed: 255 pr_info("Registered device %s", as102_dev->name);
273 LEAVE(); 256 return 0;
274 /* FIXME: free dvb_XXX */ 257
258efereg:
259 dvb_dmxdev_release(&as102_dev->dvb_dmxdev);
260edmxdinit:
261 dvb_dmx_release(&as102_dev->dvb_dmx);
262edmxinit:
263 dvb_unregister_adapter(&as102_dev->dvb_adap);
275 return ret; 264 return ret;
276} 265}
277 266
278void as102_dvb_unregister(struct as102_dev_t *as102_dev) 267void as102_dvb_unregister(struct as102_dev_t *as102_dev)
279{ 268{
280 ENTER();
281
282 /* unregister as102 frontend */ 269 /* unregister as102 frontend */
283 as102_dvb_unregister_fe(&as102_dev->dvb_fe); 270 as102_dvb_unregister_fe(&as102_dev->dvb_fe);
284 271
@@ -289,28 +276,18 @@ void as102_dvb_unregister(struct as102_dev_t *as102_dev)
289 /* unregister dvb adapter */ 276 /* unregister dvb adapter */
290 dvb_unregister_adapter(&as102_dev->dvb_adap); 277 dvb_unregister_adapter(&as102_dev->dvb_adap);
291 278
292 LEAVE(); 279 pr_info("Unregistered device %s", as102_dev->name);
293} 280}
294 281
295static int __init as102_driver_init(void) 282static int __init as102_driver_init(void)
296{ 283{
297 int ret = 0; 284 int ret;
298
299 ENTER();
300 285
301 /* register this driver with the low level subsystem */ 286 /* register this driver with the low level subsystem */
302#if defined(CONFIG_AS102_USB)
303 ret = usb_register(&as102_usb_driver); 287 ret = usb_register(&as102_usb_driver);
304 if (ret) 288 if (ret)
305 err("usb_register failed (ret = %d)", ret); 289 err("usb_register failed (ret = %d)", ret);
306#endif
307#if defined(CONFIG_AS102_SPI)
308 ret = spi_register_driver(&as102_spi_driver);
309 if (ret)
310 printk(KERN_ERR "spi_register failed (ret = %d)", ret);
311#endif
312 290
313 LEAVE();
314 return ret; 291 return ret;
315} 292}
316 293
@@ -327,15 +304,8 @@ module_init(as102_driver_init);
327 */ 304 */
328static void __exit as102_driver_exit(void) 305static void __exit as102_driver_exit(void)
329{ 306{
330 ENTER();
331 /* deregister this driver with the low level bus subsystem */ 307 /* deregister this driver with the low level bus subsystem */
332#if defined(CONFIG_AS102_USB)
333 usb_deregister(&as102_usb_driver); 308 usb_deregister(&as102_usb_driver);
334#endif
335#if defined(CONFIG_AS102_SPI)
336 spi_unregister_driver(&as102_spi_driver);
337#endif
338 LEAVE();
339} 309}
340 310
341/* 311/*
@@ -347,5 +317,3 @@ module_exit(as102_driver_exit);
347MODULE_DESCRIPTION(DRIVER_FULL_NAME); 317MODULE_DESCRIPTION(DRIVER_FULL_NAME);
348MODULE_LICENSE("GPL"); 318MODULE_LICENSE("GPL");
349MODULE_AUTHOR("Pierrick Hascoet <pierrick.hascoet@abilis.com>"); 319MODULE_AUTHOR("Pierrick Hascoet <pierrick.hascoet@abilis.com>");
350
351/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as102_drv.h b/drivers/staging/media/as102/as102_drv.h
index fd33f5a12dc..957f0ed0d81 100644
--- a/drivers/staging/media/as102/as102_drv.h
+++ b/drivers/staging/media/as102/as102_drv.h
@@ -17,38 +17,30 @@
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 18 */
19 19
20#if defined(CONFIG_AS102_USB)
21#include <linux/usb.h> 20#include <linux/usb.h>
22extern struct usb_driver as102_usb_driver; 21#include <dvb_demux.h>
23#endif 22#include <dvb_frontend.h>
24 23#include <dmxdev.h>
25#if defined(CONFIG_AS102_SPI) 24#include "as10x_cmd.h"
26#include <linux/platform_device.h> 25#include "as102_usb_drv.h"
27#include <linux/spi/spi.h>
28#include <linux/cdev.h>
29
30extern struct spi_driver as102_spi_driver;
31#endif
32
33#include "dvb_demux.h"
34#include "dvb_frontend.h"
35#include "dmxdev.h"
36 26
37#define DRIVER_FULL_NAME "Abilis Systems as10x usb driver" 27#define DRIVER_FULL_NAME "Abilis Systems as10x usb driver"
38#define DRIVER_NAME "as10x_usb" 28#define DRIVER_NAME "as10x_usb"
39 29
40extern int as102_debug; 30extern int as102_debug;
41#define debug as102_debug 31#define debug as102_debug
32extern struct usb_driver as102_usb_driver;
33extern int elna_enable;
42 34
43#define dprintk(debug, args...) \ 35#define dprintk(debug, args...) \
44 do { if (debug) { \ 36 do { if (debug) { \
45 printk(KERN_DEBUG "%s: ",__FUNCTION__); \ 37 pr_debug("%s: ", __func__); \
46 printk(args); \ 38 printk(args); \
47 } } while (0) 39 } } while (0)
48 40
49#ifdef TRACE 41#ifdef TRACE
50#define ENTER() printk(">> enter %s\n", __FUNCTION__) 42#define ENTER() pr_debug(">> enter %s\n", __func__)
51#define LEAVE() printk("<< leave %s\n", __FUNCTION__) 43#define LEAVE() pr_debug("<< leave %s\n", __func__)
52#else 44#else
53#define ENTER() 45#define ENTER()
54#define LEAVE() 46#define LEAVE()
@@ -59,39 +51,14 @@ extern int as102_debug;
59#define AS102_USB_BUF_SIZE 512 51#define AS102_USB_BUF_SIZE 512
60#define MAX_STREAM_URB 32 52#define MAX_STREAM_URB 32
61 53
62#include "as10x_cmd.h" 54struct as10x_bus_adapter_t {
63
64#if defined(CONFIG_AS102_USB)
65#include "as102_usb_drv.h"
66#endif
67
68#if defined(CONFIG_AS102_SPI)
69#include "as10x_spi_drv.h"
70#endif
71
72
73struct as102_bus_adapter_t {
74#if defined(CONFIG_AS102_USB)
75 struct usb_device *usb_dev; 55 struct usb_device *usb_dev;
76#elif defined(CONFIG_AS102_SPI)
77 struct spi_device *spi_dev;
78 struct cdev cdev; /* spidev raw device */
79
80 struct timer_list timer;
81 struct completion xfer_done;
82#endif
83 /* bus token lock */ 56 /* bus token lock */
84 struct mutex lock; 57 struct mutex lock;
85 /* low level interface for bus adapter */ 58 /* low level interface for bus adapter */
86 union as10x_bus_token_t { 59 union as10x_bus_token_t {
87#if defined(CONFIG_AS102_USB)
88 /* usb token */ 60 /* usb token */
89 struct as10x_usb_token_cmd_t usb; 61 struct as10x_usb_token_cmd_t usb;
90#endif
91#if defined(CONFIG_AS102_SPI)
92 /* spi token */
93 struct as10x_spi_token_cmd_t spi;
94#endif
95 } token; 62 } token;
96 63
97 /* token cmd xfer id */ 64 /* token cmd xfer id */
@@ -106,7 +73,7 @@ struct as102_bus_adapter_t {
106 73
107struct as102_dev_t { 74struct as102_dev_t {
108 const char *name; 75 const char *name;
109 struct as102_bus_adapter_t bus_adap; 76 struct as10x_bus_adapter_t bus_adap;
110 struct list_head device_entry; 77 struct list_head device_entry;
111 struct kref kref; 78 struct kref kref;
112 unsigned long minor; 79 unsigned long minor;
@@ -138,5 +105,3 @@ void as102_dvb_unregister(struct as102_dev_t *dev);
138 105
139int as102_dvb_register_fe(struct as102_dev_t *dev, struct dvb_frontend *fe); 106int as102_dvb_register_fe(struct as102_dev_t *dev, struct dvb_frontend *fe);
140int as102_dvb_unregister_fe(struct dvb_frontend *dev); 107int as102_dvb_unregister_fe(struct dvb_frontend *dev);
141
142/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as102_fe.c b/drivers/staging/media/as102/as102_fe.c
index 3550f905367..bdc5a38cddf 100644
--- a/drivers/staging/media/as102/as102_fe.c
+++ b/drivers/staging/media/as102/as102_fe.c
@@ -23,17 +23,15 @@
23#include "as10x_types.h" 23#include "as10x_types.h"
24#include "as10x_cmd.h" 24#include "as10x_cmd.h"
25 25
26extern int elna_enable; 26static void as10x_fe_copy_tps_parameters(struct dtv_frontend_properties *dst,
27
28static void as10x_fe_copy_tps_parameters(struct dvb_frontend_parameters *dst,
29 struct as10x_tps *src); 27 struct as10x_tps *src);
30 28
31static void as102_fe_copy_tune_parameters(struct as10x_tune_args *dst, 29static void as102_fe_copy_tune_parameters(struct as10x_tune_args *dst,
32 struct dvb_frontend_parameters *src); 30 struct dtv_frontend_properties *src);
33 31
34static int as102_fe_set_frontend(struct dvb_frontend *fe, 32static int as102_fe_set_frontend(struct dvb_frontend *fe)
35 struct dvb_frontend_parameters *params)
36{ 33{
34 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
37 int ret = 0; 35 int ret = 0;
38 struct as102_dev_t *dev; 36 struct as102_dev_t *dev;
39 struct as10x_tune_args tune_args = { 0 }; 37 struct as10x_tune_args tune_args = { 0 };
@@ -47,7 +45,7 @@ static int as102_fe_set_frontend(struct dvb_frontend *fe,
47 if (mutex_lock_interruptible(&dev->bus_adap.lock)) 45 if (mutex_lock_interruptible(&dev->bus_adap.lock))
48 return -EBUSY; 46 return -EBUSY;
49 47
50 as102_fe_copy_tune_parameters(&tune_args, params); 48 as102_fe_copy_tune_parameters(&tune_args, p);
51 49
52 /* send abilis command: SET_TUNE */ 50 /* send abilis command: SET_TUNE */
53 ret = as10x_cmd_set_tune(&dev->bus_adap, &tune_args); 51 ret = as10x_cmd_set_tune(&dev->bus_adap, &tune_args);
@@ -60,8 +58,9 @@ static int as102_fe_set_frontend(struct dvb_frontend *fe,
60 return (ret < 0) ? -EINVAL : 0; 58 return (ret < 0) ? -EINVAL : 0;
61} 59}
62 60
63static int as102_fe_get_frontend(struct dvb_frontend *fe, 61static int as102_fe_get_frontend(struct dvb_frontend *fe)
64 struct dvb_frontend_parameters *p) { 62{
63 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
65 int ret = 0; 64 int ret = 0;
66 struct as102_dev_t *dev; 65 struct as102_dev_t *dev;
67 struct as10x_tps tps = { 0 }; 66 struct as10x_tps tps = { 0 };
@@ -280,9 +279,9 @@ static int as102_fe_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
280} 279}
281 280
282static struct dvb_frontend_ops as102_fe_ops = { 281static struct dvb_frontend_ops as102_fe_ops = {
282 .delsys = { SYS_DVBT },
283 .info = { 283 .info = {
284 .name = "Unknown AS102 device", 284 .name = "Unknown AS102 device",
285 .type = FE_OFDM,
286 .frequency_min = 174000000, 285 .frequency_min = 174000000,
287 .frequency_max = 862000000, 286 .frequency_max = 862000000,
288 .frequency_stepsize = 166667, 287 .frequency_stepsize = 166667,
@@ -346,38 +345,36 @@ int as102_dvb_register_fe(struct as102_dev_t *as102_dev,
346 return errno; 345 return errno;
347} 346}
348 347
349static void as10x_fe_copy_tps_parameters(struct dvb_frontend_parameters *dst, 348static void as10x_fe_copy_tps_parameters(struct dtv_frontend_properties *fe_tps,
350 struct as10x_tps *as10x_tps) 349 struct as10x_tps *as10x_tps)
351{ 350{
352 351
353 struct dvb_ofdm_parameters *fe_tps = &dst->u.ofdm;
354
355 /* extract consteallation */ 352 /* extract consteallation */
356 switch (as10x_tps->constellation) { 353 switch (as10x_tps->modulation) {
357 case CONST_QPSK: 354 case CONST_QPSK:
358 fe_tps->constellation = QPSK; 355 fe_tps->modulation = QPSK;
359 break; 356 break;
360 case CONST_QAM16: 357 case CONST_QAM16:
361 fe_tps->constellation = QAM_16; 358 fe_tps->modulation = QAM_16;
362 break; 359 break;
363 case CONST_QAM64: 360 case CONST_QAM64:
364 fe_tps->constellation = QAM_64; 361 fe_tps->modulation = QAM_64;
365 break; 362 break;
366 } 363 }
367 364
368 /* extract hierarchy */ 365 /* extract hierarchy */
369 switch (as10x_tps->hierarchy) { 366 switch (as10x_tps->hierarchy) {
370 case HIER_NONE: 367 case HIER_NONE:
371 fe_tps->hierarchy_information = HIERARCHY_NONE; 368 fe_tps->hierarchy = HIERARCHY_NONE;
372 break; 369 break;
373 case HIER_ALPHA_1: 370 case HIER_ALPHA_1:
374 fe_tps->hierarchy_information = HIERARCHY_1; 371 fe_tps->hierarchy = HIERARCHY_1;
375 break; 372 break;
376 case HIER_ALPHA_2: 373 case HIER_ALPHA_2:
377 fe_tps->hierarchy_information = HIERARCHY_2; 374 fe_tps->hierarchy = HIERARCHY_2;
378 break; 375 break;
379 case HIER_ALPHA_4: 376 case HIER_ALPHA_4:
380 fe_tps->hierarchy_information = HIERARCHY_4; 377 fe_tps->hierarchy = HIERARCHY_4;
381 break; 378 break;
382 } 379 }
383 380
@@ -475,7 +472,7 @@ static uint8_t as102_fe_get_code_rate(fe_code_rate_t arg)
475} 472}
476 473
477static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args, 474static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
478 struct dvb_frontend_parameters *params) 475 struct dtv_frontend_properties *params)
479{ 476{
480 477
481 /* set frequency */ 478 /* set frequency */
@@ -484,21 +481,21 @@ static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
484 /* fix interleaving_mode */ 481 /* fix interleaving_mode */
485 tune_args->interleaving_mode = INTLV_NATIVE; 482 tune_args->interleaving_mode = INTLV_NATIVE;
486 483
487 switch (params->u.ofdm.bandwidth) { 484 switch (params->bandwidth_hz) {
488 case BANDWIDTH_8_MHZ: 485 case 8000000:
489 tune_args->bandwidth = BW_8_MHZ; 486 tune_args->bandwidth = BW_8_MHZ;
490 break; 487 break;
491 case BANDWIDTH_7_MHZ: 488 case 7000000:
492 tune_args->bandwidth = BW_7_MHZ; 489 tune_args->bandwidth = BW_7_MHZ;
493 break; 490 break;
494 case BANDWIDTH_6_MHZ: 491 case 6000000:
495 tune_args->bandwidth = BW_6_MHZ; 492 tune_args->bandwidth = BW_6_MHZ;
496 break; 493 break;
497 default: 494 default:
498 tune_args->bandwidth = BW_8_MHZ; 495 tune_args->bandwidth = BW_8_MHZ;
499 } 496 }
500 497
501 switch (params->u.ofdm.guard_interval) { 498 switch (params->guard_interval) {
502 case GUARD_INTERVAL_1_32: 499 case GUARD_INTERVAL_1_32:
503 tune_args->guard_interval = GUARD_INT_1_32; 500 tune_args->guard_interval = GUARD_INT_1_32;
504 break; 501 break;
@@ -517,22 +514,22 @@ static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
517 break; 514 break;
518 } 515 }
519 516
520 switch (params->u.ofdm.constellation) { 517 switch (params->modulation) {
521 case QPSK: 518 case QPSK:
522 tune_args->constellation = CONST_QPSK; 519 tune_args->modulation = CONST_QPSK;
523 break; 520 break;
524 case QAM_16: 521 case QAM_16:
525 tune_args->constellation = CONST_QAM16; 522 tune_args->modulation = CONST_QAM16;
526 break; 523 break;
527 case QAM_64: 524 case QAM_64:
528 tune_args->constellation = CONST_QAM64; 525 tune_args->modulation = CONST_QAM64;
529 break; 526 break;
530 default: 527 default:
531 tune_args->constellation = CONST_UNKNOWN; 528 tune_args->modulation = CONST_UNKNOWN;
532 break; 529 break;
533 } 530 }
534 531
535 switch (params->u.ofdm.transmission_mode) { 532 switch (params->transmission_mode) {
536 case TRANSMISSION_MODE_2K: 533 case TRANSMISSION_MODE_2K:
537 tune_args->transmission_mode = TRANS_MODE_2K; 534 tune_args->transmission_mode = TRANS_MODE_2K;
538 break; 535 break;
@@ -543,7 +540,7 @@ static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
543 tune_args->transmission_mode = TRANS_MODE_UNKNOWN; 540 tune_args->transmission_mode = TRANS_MODE_UNKNOWN;
544 } 541 }
545 542
546 switch (params->u.ofdm.hierarchy_information) { 543 switch (params->hierarchy) {
547 case HIERARCHY_NONE: 544 case HIERARCHY_NONE:
548 tune_args->hierarchy = HIER_NONE; 545 tune_args->hierarchy = HIER_NONE;
549 break; 546 break;
@@ -571,19 +568,19 @@ static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
571 * if HP/LP are both set to FEC_NONE, HP will be selected. 568 * if HP/LP are both set to FEC_NONE, HP will be selected.
572 */ 569 */
573 if ((tune_args->hierarchy != HIER_NONE) && 570 if ((tune_args->hierarchy != HIER_NONE) &&
574 ((params->u.ofdm.code_rate_LP == FEC_NONE) || 571 ((params->code_rate_LP == FEC_NONE) ||
575 (params->u.ofdm.code_rate_HP == FEC_NONE))) { 572 (params->code_rate_HP == FEC_NONE))) {
576 573
577 if (params->u.ofdm.code_rate_LP == FEC_NONE) { 574 if (params->code_rate_LP == FEC_NONE) {
578 tune_args->hier_select = HIER_HIGH_PRIORITY; 575 tune_args->hier_select = HIER_HIGH_PRIORITY;
579 tune_args->code_rate = 576 tune_args->code_rate =
580 as102_fe_get_code_rate(params->u.ofdm.code_rate_HP); 577 as102_fe_get_code_rate(params->code_rate_HP);
581 } 578 }
582 579
583 if (params->u.ofdm.code_rate_HP == FEC_NONE) { 580 if (params->code_rate_HP == FEC_NONE) {
584 tune_args->hier_select = HIER_LOW_PRIORITY; 581 tune_args->hier_select = HIER_LOW_PRIORITY;
585 tune_args->code_rate = 582 tune_args->code_rate =
586 as102_fe_get_code_rate(params->u.ofdm.code_rate_LP); 583 as102_fe_get_code_rate(params->code_rate_LP);
587 } 584 }
588 585
589 dprintk(debug, "\thierarchy: 0x%02x " 586 dprintk(debug, "\thierarchy: 0x%02x "
@@ -596,8 +593,6 @@ static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
596 tune_args->code_rate); 593 tune_args->code_rate);
597 } else { 594 } else {
598 tune_args->code_rate = 595 tune_args->code_rate =
599 as102_fe_get_code_rate(params->u.ofdm.code_rate_HP); 596 as102_fe_get_code_rate(params->code_rate_HP);
600 } 597 }
601} 598}
602
603/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as102_fw.c b/drivers/staging/media/as102/as102_fw.c
index c019df933cc..43ebc43e6b9 100644
--- a/drivers/staging/media/as102/as102_fw.c
+++ b/drivers/staging/media/as102/as102_fw.c
@@ -26,7 +26,6 @@
26#include "as102_drv.h" 26#include "as102_drv.h"
27#include "as102_fw.h" 27#include "as102_fw.h"
28 28
29#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
30char as102_st_fw1[] = "as102_data1_st.hex"; 29char as102_st_fw1[] = "as102_data1_st.hex";
31char as102_st_fw2[] = "as102_data2_st.hex"; 30char as102_st_fw2[] = "as102_data2_st.hex";
32char as102_dt_fw1[] = "as102_data1_dt.hex"; 31char as102_dt_fw1[] = "as102_data1_dt.hex";
@@ -59,7 +58,7 @@ static int parse_hex_line(unsigned char *fw_data, unsigned char *addr,
59 unsigned char *src, dst; 58 unsigned char *src, dst;
60 59
61 if (*fw_data++ != ':') { 60 if (*fw_data++ != ':') {
62 printk(KERN_ERR "invalid firmware file\n"); 61 pr_err("invalid firmware file\n");
63 return -EFAULT; 62 return -EFAULT;
64 } 63 }
65 64
@@ -102,7 +101,7 @@ static int parse_hex_line(unsigned char *fw_data, unsigned char *addr,
102 return (count * 2) + 2; 101 return (count * 2) + 2;
103} 102}
104 103
105static int as102_firmware_upload(struct as102_bus_adapter_t *bus_adap, 104static int as102_firmware_upload(struct as10x_bus_adapter_t *bus_adap,
106 unsigned char *cmd, 105 unsigned char *cmd,
107 const struct firmware *firmware) { 106 const struct firmware *firmware) {
108 107
@@ -163,19 +162,14 @@ error:
163 return (errno == 0) ? total_read_bytes : errno; 162 return (errno == 0) ? total_read_bytes : errno;
164} 163}
165 164
166int as102_fw_upload(struct as102_bus_adapter_t *bus_adap) 165int as102_fw_upload(struct as10x_bus_adapter_t *bus_adap)
167{ 166{
168 int errno = -EFAULT; 167 int errno = -EFAULT;
169 const struct firmware *firmware; 168 const struct firmware *firmware;
170 unsigned char *cmd_buf = NULL; 169 unsigned char *cmd_buf = NULL;
171 char *fw1, *fw2; 170 char *fw1, *fw2;
172
173#if defined(CONFIG_AS102_USB)
174 struct usb_device *dev = bus_adap->usb_dev; 171 struct usb_device *dev = bus_adap->usb_dev;
175#endif 172
176#if defined(CONFIG_AS102_SPI)
177 struct spi_device *dev = bus_adap->spi_dev;
178#endif
179 ENTER(); 173 ENTER();
180 174
181 /* select fw file to upload */ 175 /* select fw file to upload */
@@ -187,7 +181,6 @@ int as102_fw_upload(struct as102_bus_adapter_t *bus_adap)
187 fw2 = as102_st_fw2; 181 fw2 = as102_st_fw2;
188 } 182 }
189 183
190#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
191 /* allocate buffer to store firmware upload command and data */ 184 /* allocate buffer to store firmware upload command and data */
192 cmd_buf = kzalloc(MAX_FW_PKT_SIZE, GFP_KERNEL); 185 cmd_buf = kzalloc(MAX_FW_PKT_SIZE, GFP_KERNEL);
193 if (cmd_buf == NULL) { 186 if (cmd_buf == NULL) {
@@ -198,21 +191,21 @@ int as102_fw_upload(struct as102_bus_adapter_t *bus_adap)
198 /* request kernel to locate firmware file: part1 */ 191 /* request kernel to locate firmware file: part1 */
199 errno = request_firmware(&firmware, fw1, &dev->dev); 192 errno = request_firmware(&firmware, fw1, &dev->dev);
200 if (errno < 0) { 193 if (errno < 0) {
201 printk(KERN_ERR "%s: unable to locate firmware file: %s\n", 194 pr_err("%s: unable to locate firmware file: %s\n",
202 DRIVER_NAME, fw1); 195 DRIVER_NAME, fw1);
203 goto error; 196 goto error;
204 } 197 }
205 198
206 /* initiate firmware upload */ 199 /* initiate firmware upload */
207 errno = as102_firmware_upload(bus_adap, cmd_buf, firmware); 200 errno = as102_firmware_upload(bus_adap, cmd_buf, firmware);
208 if (errno < 0) { 201 if (errno < 0) {
209 printk(KERN_ERR "%s: error during firmware upload part1\n", 202 pr_err("%s: error during firmware upload part1\n",
210 DRIVER_NAME); 203 DRIVER_NAME);
211 goto error; 204 goto error;
212 } 205 }
213 206
214 printk(KERN_INFO "%s: fimrware: %s loaded with success\n", 207 pr_info("%s: firmware: %s loaded with success\n",
215 DRIVER_NAME, fw1); 208 DRIVER_NAME, fw1);
216 release_firmware(firmware); 209 release_firmware(firmware);
217 210
218 /* wait for boot to complete */ 211 /* wait for boot to complete */
@@ -221,31 +214,28 @@ int as102_fw_upload(struct as102_bus_adapter_t *bus_adap)
221 /* request kernel to locate firmware file: part2 */ 214 /* request kernel to locate firmware file: part2 */
222 errno = request_firmware(&firmware, fw2, &dev->dev); 215 errno = request_firmware(&firmware, fw2, &dev->dev);
223 if (errno < 0) { 216 if (errno < 0) {
224 printk(KERN_ERR "%s: unable to locate firmware file: %s\n", 217 pr_err("%s: unable to locate firmware file: %s\n",
225 DRIVER_NAME, fw2); 218 DRIVER_NAME, fw2);
226 goto error; 219 goto error;
227 } 220 }
228 221
229 /* initiate firmware upload */ 222 /* initiate firmware upload */
230 errno = as102_firmware_upload(bus_adap, cmd_buf, firmware); 223 errno = as102_firmware_upload(bus_adap, cmd_buf, firmware);
231 if (errno < 0) { 224 if (errno < 0) {
232 printk(KERN_ERR "%s: error during firmware upload part2\n", 225 pr_err("%s: error during firmware upload part2\n",
233 DRIVER_NAME); 226 DRIVER_NAME);
234 goto error; 227 goto error;
235 } 228 }
236 229
237 printk(KERN_INFO "%s: fimrware: %s loaded with success\n", 230 pr_info("%s: firmware: %s loaded with success\n",
238 DRIVER_NAME, fw2); 231 DRIVER_NAME, fw2);
239error: 232error:
240 /* free data buffer */ 233 /* free data buffer */
241 kfree(cmd_buf); 234 kfree(cmd_buf);
242 /* release firmware if needed */ 235 /* release firmware if needed */
243 if (firmware != NULL) 236 if (firmware != NULL)
244 release_firmware(firmware); 237 release_firmware(firmware);
245#endif 238
246 LEAVE(); 239 LEAVE();
247 return errno; 240 return errno;
248} 241}
249#endif
250
251/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as102_fw.h b/drivers/staging/media/as102/as102_fw.h
index 27e5347e2e1..bd21f055439 100644
--- a/drivers/staging/media/as102/as102_fw.h
+++ b/drivers/staging/media/as102/as102_fw.h
@@ -20,11 +20,10 @@
20 20
21extern int dual_tuner; 21extern int dual_tuner;
22 22
23#pragma pack(1)
24struct as10x_raw_fw_pkt { 23struct as10x_raw_fw_pkt {
25 unsigned char address[4]; 24 unsigned char address[4];
26 unsigned char data[MAX_FW_PKT_SIZE - 6]; 25 unsigned char data[MAX_FW_PKT_SIZE - 6];
27}; 26} __packed;
28 27
29struct as10x_fw_pkt_t { 28struct as10x_fw_pkt_t {
30 union { 29 union {
@@ -32,11 +31,8 @@ struct as10x_fw_pkt_t {
32 unsigned char length[2]; 31 unsigned char length[2];
33 } u; 32 } u;
34 struct as10x_raw_fw_pkt raw; 33 struct as10x_raw_fw_pkt raw;
35}; 34} __packed;
36#pragma pack()
37 35
38#ifdef __KERNEL__ 36#ifdef __KERNEL__
39int as102_fw_upload(struct as102_bus_adapter_t *bus_adap); 37int as102_fw_upload(struct as10x_bus_adapter_t *bus_adap);
40#endif 38#endif
41
42/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as102_usb_drv.c b/drivers/staging/media/as102/as102_usb_drv.c
index 264be2dbd2a..d775be0173e 100644
--- a/drivers/staging/media/as102/as102_usb_drv.c
+++ b/drivers/staging/media/as102/as102_usb_drv.c
@@ -42,30 +42,32 @@ static struct usb_device_id as102_usb_id_table[] = {
42 { USB_DEVICE(PCTV_74E_USB_VID, PCTV_74E_USB_PID) }, 42 { USB_DEVICE(PCTV_74E_USB_VID, PCTV_74E_USB_PID) },
43 { USB_DEVICE(ELGATO_EYETV_DTT_USB_VID, ELGATO_EYETV_DTT_USB_PID) }, 43 { USB_DEVICE(ELGATO_EYETV_DTT_USB_VID, ELGATO_EYETV_DTT_USB_PID) },
44 { USB_DEVICE(NBOX_DVBT_DONGLE_USB_VID, NBOX_DVBT_DONGLE_USB_PID) }, 44 { USB_DEVICE(NBOX_DVBT_DONGLE_USB_VID, NBOX_DVBT_DONGLE_USB_PID) },
45 { USB_DEVICE(SKY_IT_DIGITAL_KEY_USB_VID, SKY_IT_DIGITAL_KEY_USB_PID) },
45 { } /* Terminating entry */ 46 { } /* Terminating entry */
46}; 47};
47 48
48/* Note that this table must always have the same number of entries as the 49/* Note that this table must always have the same number of entries as the
49 as102_usb_id_table struct */ 50 as102_usb_id_table struct */
50static const char *as102_device_names[] = { 51static const char * const as102_device_names[] = {
51 AS102_REFERENCE_DESIGN, 52 AS102_REFERENCE_DESIGN,
52 AS102_PCTV_74E, 53 AS102_PCTV_74E,
53 AS102_ELGATO_EYETV_DTT_NAME, 54 AS102_ELGATO_EYETV_DTT_NAME,
54 AS102_NBOX_DVBT_DONGLE_NAME, 55 AS102_NBOX_DVBT_DONGLE_NAME,
56 AS102_SKY_IT_DIGITAL_KEY_NAME,
55 NULL /* Terminating entry */ 57 NULL /* Terminating entry */
56}; 58};
57 59
58struct usb_driver as102_usb_driver = { 60struct usb_driver as102_usb_driver = {
59 .name = DRIVER_FULL_NAME, 61 .name = DRIVER_FULL_NAME,
60 .probe = as102_usb_probe, 62 .probe = as102_usb_probe,
61 .disconnect = as102_usb_disconnect, 63 .disconnect = as102_usb_disconnect,
62 .id_table = as102_usb_id_table 64 .id_table = as102_usb_id_table
63}; 65};
64 66
65static const struct file_operations as102_dev_fops = { 67static const struct file_operations as102_dev_fops = {
66 .owner = THIS_MODULE, 68 .owner = THIS_MODULE,
67 .open = as102_open, 69 .open = as102_open,
68 .release = as102_release, 70 .release = as102_release,
69}; 71};
70 72
71static struct usb_class_driver as102_usb_class_driver = { 73static struct usb_class_driver as102_usb_class_driver = {
@@ -74,7 +76,7 @@ static struct usb_class_driver as102_usb_class_driver = {
74 .minor_base = AS102_DEVICE_MAJOR, 76 .minor_base = AS102_DEVICE_MAJOR,
75}; 77};
76 78
77static int as102_usb_xfer_cmd(struct as102_bus_adapter_t *bus_adap, 79static int as102_usb_xfer_cmd(struct as10x_bus_adapter_t *bus_adap,
78 unsigned char *send_buf, int send_buf_len, 80 unsigned char *send_buf, int send_buf_len,
79 unsigned char *recv_buf, int recv_buf_len) 81 unsigned char *recv_buf, int recv_buf_len)
80{ 82{
@@ -131,7 +133,7 @@ static int as102_usb_xfer_cmd(struct as102_bus_adapter_t *bus_adap,
131 return ret; 133 return ret;
132} 134}
133 135
134static int as102_send_ep1(struct as102_bus_adapter_t *bus_adap, 136static int as102_send_ep1(struct as10x_bus_adapter_t *bus_adap,
135 unsigned char *send_buf, 137 unsigned char *send_buf,
136 int send_buf_len, 138 int send_buf_len,
137 int swap32) 139 int swap32)
@@ -154,7 +156,7 @@ static int as102_send_ep1(struct as102_bus_adapter_t *bus_adap,
154 return ret ? ret : actual_len; 156 return ret ? ret : actual_len;
155} 157}
156 158
157static int as102_read_ep2(struct as102_bus_adapter_t *bus_adap, 159static int as102_read_ep2(struct as10x_bus_adapter_t *bus_adap,
158 unsigned char *recv_buf, int recv_buf_len) 160 unsigned char *recv_buf, int recv_buf_len)
159{ 161{
160 int ret = 0, actual_len; 162 int ret = 0, actual_len;
@@ -337,7 +339,7 @@ static void as102_usb_disconnect(struct usb_interface *intf)
337 /* decrement usage counter */ 339 /* decrement usage counter */
338 kref_put(&as102_dev->kref, as102_usb_release); 340 kref_put(&as102_dev->kref, as102_usb_release);
339 341
340 printk(KERN_INFO "%s: device has been disconnected\n", DRIVER_NAME); 342 pr_info("%s: device has been disconnected\n", DRIVER_NAME);
341 343
342 LEAVE(); 344 LEAVE();
343} 345}
@@ -351,19 +353,19 @@ static int as102_usb_probe(struct usb_interface *intf,
351 353
352 ENTER(); 354 ENTER();
353 355
354 as102_dev = kzalloc(sizeof(struct as102_dev_t), GFP_KERNEL);
355 if (as102_dev == NULL) {
356 err("%s: kzalloc failed", __func__);
357 return -ENOMEM;
358 }
359
360 /* This should never actually happen */ 356 /* This should never actually happen */
361 if ((sizeof(as102_usb_id_table) / sizeof(struct usb_device_id)) != 357 if ((sizeof(as102_usb_id_table) / sizeof(struct usb_device_id)) !=
362 (sizeof(as102_device_names) / sizeof(const char *))) { 358 (sizeof(as102_device_names) / sizeof(const char *))) {
363 printk(KERN_ERR "Device names table invalid size"); 359 pr_err("Device names table invalid size");
364 return -EINVAL; 360 return -EINVAL;
365 } 361 }
366 362
363 as102_dev = kzalloc(sizeof(struct as102_dev_t), GFP_KERNEL);
364 if (as102_dev == NULL) {
365 err("%s: kzalloc failed", __func__);
366 return -ENOMEM;
367 }
368
367 /* Assign the user-friendly device name */ 369 /* Assign the user-friendly device name */
368 for (i = 0; i < (sizeof(as102_usb_id_table) / 370 for (i = 0; i < (sizeof(as102_usb_id_table) /
369 sizeof(struct usb_device_id)); i++) { 371 sizeof(struct usb_device_id)); i++) {
@@ -399,7 +401,7 @@ static int as102_usb_probe(struct usb_interface *intf,
399 goto failed; 401 goto failed;
400 } 402 }
401 403
402 printk(KERN_INFO "%s: device has been detected\n", DRIVER_NAME); 404 pr_info("%s: device has been detected\n", DRIVER_NAME);
403 405
404 /* request buffer allocation for streaming */ 406 /* request buffer allocation for streaming */
405 ret = as102_alloc_usb_stream_buffer(as102_dev); 407 ret = as102_alloc_usb_stream_buffer(as102_dev);
@@ -432,8 +434,8 @@ static int as102_open(struct inode *inode, struct file *file)
432 /* fetch device from usb interface */ 434 /* fetch device from usb interface */
433 intf = usb_find_interface(&as102_usb_driver, minor); 435 intf = usb_find_interface(&as102_usb_driver, minor);
434 if (intf == NULL) { 436 if (intf == NULL) {
435 printk(KERN_ERR "%s: can't find device for minor %d\n", 437 pr_err("%s: can't find device for minor %d\n",
436 __func__, minor); 438 __func__, minor);
437 ret = -ENODEV; 439 ret = -ENODEV;
438 goto exit; 440 goto exit;
439 } 441 }
@@ -474,5 +476,3 @@ static int as102_release(struct inode *inode, struct file *file)
474} 476}
475 477
476MODULE_DEVICE_TABLE(usb, as102_usb_id_table); 478MODULE_DEVICE_TABLE(usb, as102_usb_id_table);
477
478/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as102_usb_drv.h b/drivers/staging/media/as102/as102_usb_drv.h
index fb1fc41dcd7..fc2884ab02a 100644
--- a/drivers/staging/media/as102/as102_usb_drv.h
+++ b/drivers/staging/media/as102/as102_usb_drv.h
@@ -47,6 +47,11 @@
47#define NBOX_DVBT_DONGLE_USB_VID 0x0b89 47#define NBOX_DVBT_DONGLE_USB_VID 0x0b89
48#define NBOX_DVBT_DONGLE_USB_PID 0x0007 48#define NBOX_DVBT_DONGLE_USB_PID 0x0007
49 49
50/* Sky Italia: Digital Key (green led) */
51#define AS102_SKY_IT_DIGITAL_KEY_NAME "Sky IT Digital Key (green led)"
52#define SKY_IT_DIGITAL_KEY_USB_VID 0x2137
53#define SKY_IT_DIGITAL_KEY_USB_PID 0x0001
54
50void as102_urb_stream_irq(struct urb *urb); 55void as102_urb_stream_irq(struct urb *urb);
51 56
52struct as10x_usb_token_cmd_t { 57struct as10x_usb_token_cmd_t {
@@ -56,4 +61,3 @@ struct as10x_usb_token_cmd_t {
56 struct as10x_cmd_t r; 61 struct as10x_cmd_t r;
57}; 62};
58#endif 63#endif
59/* EOF - vim: set textwidth=80 ts=8 sw=8 sts=8 noet: */
diff --git a/drivers/staging/media/as102/as10x_cmd.c b/drivers/staging/media/as102/as10x_cmd.c
index 0dcba806578..262bb94ad27 100644
--- a/drivers/staging/media/as102/as10x_cmd.c
+++ b/drivers/staging/media/as102/as10x_cmd.c
@@ -25,35 +25,35 @@
25 25
26/** 26/**
27 * as10x_cmd_turn_on - send turn on command to AS10x 27 * as10x_cmd_turn_on - send turn on command to AS10x
28 * @phandle: pointer to AS10x handle 28 * @adap: pointer to AS10x bus adapter
29 * 29 *
30 * Return 0 when no error, < 0 in case of error. 30 * Return 0 when no error, < 0 in case of error.
31 */ 31 */
32int as10x_cmd_turn_on(as10x_handle_t *phandle) 32int as10x_cmd_turn_on(struct as10x_bus_adapter_t *adap)
33{ 33{
34 int error; 34 int error;
35 struct as10x_cmd_t *pcmd, *prsp; 35 struct as10x_cmd_t *pcmd, *prsp;
36 36
37 ENTER(); 37 ENTER();
38 38
39 pcmd = phandle->cmd; 39 pcmd = adap->cmd;
40 prsp = phandle->rsp; 40 prsp = adap->rsp;
41 41
42 /* prepare command */ 42 /* prepare command */
43 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 43 as10x_cmd_build(pcmd, (++adap->cmd_xid),
44 sizeof(pcmd->body.turn_on.req)); 44 sizeof(pcmd->body.turn_on.req));
45 45
46 /* fill command */ 46 /* fill command */
47 pcmd->body.turn_on.req.proc_id = cpu_to_le16(CONTROL_PROC_TURNON); 47 pcmd->body.turn_on.req.proc_id = cpu_to_le16(CONTROL_PROC_TURNON);
48 48
49 /* send command */ 49 /* send command */
50 if (phandle->ops->xfer_cmd) { 50 if (adap->ops->xfer_cmd) {
51 error = phandle->ops->xfer_cmd(phandle, (uint8_t *) pcmd, 51 error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
52 sizeof(pcmd->body.turn_on.req) + 52 sizeof(pcmd->body.turn_on.req) +
53 HEADER_SIZE, 53 HEADER_SIZE,
54 (uint8_t *) prsp, 54 (uint8_t *) prsp,
55 sizeof(prsp->body.turn_on.rsp) + 55 sizeof(prsp->body.turn_on.rsp) +
56 HEADER_SIZE); 56 HEADER_SIZE);
57 } else { 57 } else {
58 error = AS10X_CMD_ERROR; 58 error = AS10X_CMD_ERROR;
59 } 59 }
@@ -71,31 +71,31 @@ out:
71 71
72/** 72/**
73 * as10x_cmd_turn_off - send turn off command to AS10x 73 * as10x_cmd_turn_off - send turn off command to AS10x
74 * @phandle: pointer to AS10x handle 74 * @adap: pointer to AS10x bus adapter
75 * 75 *
76 * Return 0 on success or negative value in case of error. 76 * Return 0 on success or negative value in case of error.
77 */ 77 */
78int as10x_cmd_turn_off(as10x_handle_t *phandle) 78int as10x_cmd_turn_off(struct as10x_bus_adapter_t *adap)
79{ 79{
80 int error; 80 int error;
81 struct as10x_cmd_t *pcmd, *prsp; 81 struct as10x_cmd_t *pcmd, *prsp;
82 82
83 ENTER(); 83 ENTER();
84 84
85 pcmd = phandle->cmd; 85 pcmd = adap->cmd;
86 prsp = phandle->rsp; 86 prsp = adap->rsp;
87 87
88 /* prepare command */ 88 /* prepare command */
89 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 89 as10x_cmd_build(pcmd, (++adap->cmd_xid),
90 sizeof(pcmd->body.turn_off.req)); 90 sizeof(pcmd->body.turn_off.req));
91 91
92 /* fill command */ 92 /* fill command */
93 pcmd->body.turn_off.req.proc_id = cpu_to_le16(CONTROL_PROC_TURNOFF); 93 pcmd->body.turn_off.req.proc_id = cpu_to_le16(CONTROL_PROC_TURNOFF);
94 94
95 /* send command */ 95 /* send command */
96 if (phandle->ops->xfer_cmd) { 96 if (adap->ops->xfer_cmd) {
97 error = phandle->ops->xfer_cmd( 97 error = adap->ops->xfer_cmd(
98 phandle, (uint8_t *) pcmd, 98 adap, (uint8_t *) pcmd,
99 sizeof(pcmd->body.turn_off.req) + HEADER_SIZE, 99 sizeof(pcmd->body.turn_off.req) + HEADER_SIZE,
100 (uint8_t *) prsp, 100 (uint8_t *) prsp,
101 sizeof(prsp->body.turn_off.rsp) + HEADER_SIZE); 101 sizeof(prsp->body.turn_off.rsp) + HEADER_SIZE);
@@ -116,23 +116,24 @@ out:
116 116
117/** 117/**
118 * as10x_cmd_set_tune - send set tune command to AS10x 118 * as10x_cmd_set_tune - send set tune command to AS10x
119 * @phandle: pointer to AS10x handle 119 * @adap: pointer to AS10x bus adapter
120 * @ptune: tune parameters 120 * @ptune: tune parameters
121 * 121 *
122 * Return 0 on success or negative value in case of error. 122 * Return 0 on success or negative value in case of error.
123 */ 123 */
124int as10x_cmd_set_tune(as10x_handle_t *phandle, struct as10x_tune_args *ptune) 124int as10x_cmd_set_tune(struct as10x_bus_adapter_t *adap,
125 struct as10x_tune_args *ptune)
125{ 126{
126 int error; 127 int error;
127 struct as10x_cmd_t *preq, *prsp; 128 struct as10x_cmd_t *preq, *prsp;
128 129
129 ENTER(); 130 ENTER();
130 131
131 preq = phandle->cmd; 132 preq = adap->cmd;
132 prsp = phandle->rsp; 133 prsp = adap->rsp;
133 134
134 /* prepare command */ 135 /* prepare command */
135 as10x_cmd_build(preq, (++phandle->cmd_xid), 136 as10x_cmd_build(preq, (++adap->cmd_xid),
136 sizeof(preq->body.set_tune.req)); 137 sizeof(preq->body.set_tune.req));
137 138
138 /* fill command */ 139 /* fill command */
@@ -140,7 +141,7 @@ int as10x_cmd_set_tune(as10x_handle_t *phandle, struct as10x_tune_args *ptune)
140 preq->body.set_tune.req.args.freq = cpu_to_le32(ptune->freq); 141 preq->body.set_tune.req.args.freq = cpu_to_le32(ptune->freq);
141 preq->body.set_tune.req.args.bandwidth = ptune->bandwidth; 142 preq->body.set_tune.req.args.bandwidth = ptune->bandwidth;
142 preq->body.set_tune.req.args.hier_select = ptune->hier_select; 143 preq->body.set_tune.req.args.hier_select = ptune->hier_select;
143 preq->body.set_tune.req.args.constellation = ptune->constellation; 144 preq->body.set_tune.req.args.modulation = ptune->modulation;
144 preq->body.set_tune.req.args.hierarchy = ptune->hierarchy; 145 preq->body.set_tune.req.args.hierarchy = ptune->hierarchy;
145 preq->body.set_tune.req.args.interleaving_mode = 146 preq->body.set_tune.req.args.interleaving_mode =
146 ptune->interleaving_mode; 147 ptune->interleaving_mode;
@@ -150,14 +151,14 @@ int as10x_cmd_set_tune(as10x_handle_t *phandle, struct as10x_tune_args *ptune)
150 ptune->transmission_mode; 151 ptune->transmission_mode;
151 152
152 /* send command */ 153 /* send command */
153 if (phandle->ops->xfer_cmd) { 154 if (adap->ops->xfer_cmd) {
154 error = phandle->ops->xfer_cmd(phandle, 155 error = adap->ops->xfer_cmd(adap,
155 (uint8_t *) preq, 156 (uint8_t *) preq,
156 sizeof(preq->body.set_tune.req) 157 sizeof(preq->body.set_tune.req)
157 + HEADER_SIZE, 158 + HEADER_SIZE,
158 (uint8_t *) prsp, 159 (uint8_t *) prsp,
159 sizeof(prsp->body.set_tune.rsp) 160 sizeof(prsp->body.set_tune.rsp)
160 + HEADER_SIZE); 161 + HEADER_SIZE);
161 } else { 162 } else {
162 error = AS10X_CMD_ERROR; 163 error = AS10X_CMD_ERROR;
163 } 164 }
@@ -175,12 +176,12 @@ out:
175 176
176/** 177/**
177 * as10x_cmd_get_tune_status - send get tune status command to AS10x 178 * as10x_cmd_get_tune_status - send get tune status command to AS10x
178 * @phandle: pointer to AS10x handle 179 * @adap: pointer to AS10x bus adapter
179 * @pstatus: pointer to updated status structure of the current tune 180 * @pstatus: pointer to updated status structure of the current tune
180 * 181 *
181 * Return 0 on success or negative value in case of error. 182 * Return 0 on success or negative value in case of error.
182 */ 183 */
183int as10x_cmd_get_tune_status(as10x_handle_t *phandle, 184int as10x_cmd_get_tune_status(struct as10x_bus_adapter_t *adap,
184 struct as10x_tune_status *pstatus) 185 struct as10x_tune_status *pstatus)
185{ 186{
186 int error; 187 int error;
@@ -188,11 +189,11 @@ int as10x_cmd_get_tune_status(as10x_handle_t *phandle,
188 189
189 ENTER(); 190 ENTER();
190 191
191 preq = phandle->cmd; 192 preq = adap->cmd;
192 prsp = phandle->rsp; 193 prsp = adap->rsp;
193 194
194 /* prepare command */ 195 /* prepare command */
195 as10x_cmd_build(preq, (++phandle->cmd_xid), 196 as10x_cmd_build(preq, (++adap->cmd_xid),
196 sizeof(preq->body.get_tune_status.req)); 197 sizeof(preq->body.get_tune_status.req));
197 198
198 /* fill command */ 199 /* fill command */
@@ -200,9 +201,9 @@ int as10x_cmd_get_tune_status(as10x_handle_t *phandle,
200 cpu_to_le16(CONTROL_PROC_GETTUNESTAT); 201 cpu_to_le16(CONTROL_PROC_GETTUNESTAT);
201 202
202 /* send command */ 203 /* send command */
203 if (phandle->ops->xfer_cmd) { 204 if (adap->ops->xfer_cmd) {
204 error = phandle->ops->xfer_cmd( 205 error = adap->ops->xfer_cmd(
205 phandle, 206 adap,
206 (uint8_t *) preq, 207 (uint8_t *) preq,
207 sizeof(preq->body.get_tune_status.req) + HEADER_SIZE, 208 sizeof(preq->body.get_tune_status.req) + HEADER_SIZE,
208 (uint8_t *) prsp, 209 (uint8_t *) prsp,
@@ -232,24 +233,24 @@ out:
232} 233}
233 234
234/** 235/**
235 * send get TPS command to AS10x 236 * as10x_cmd_get_tps - send get TPS command to AS10x
236 * @phandle: pointer to AS10x handle 237 * @adap: pointer to AS10x handle
237 * @ptps: pointer to TPS parameters structure 238 * @ptps: pointer to TPS parameters structure
238 * 239 *
239 * Return 0 on success or negative value in case of error. 240 * Return 0 on success or negative value in case of error.
240 */ 241 */
241int as10x_cmd_get_tps(as10x_handle_t *phandle, struct as10x_tps *ptps) 242int as10x_cmd_get_tps(struct as10x_bus_adapter_t *adap, struct as10x_tps *ptps)
242{ 243{
243 int error; 244 int error;
244 struct as10x_cmd_t *pcmd, *prsp; 245 struct as10x_cmd_t *pcmd, *prsp;
245 246
246 ENTER(); 247 ENTER();
247 248
248 pcmd = phandle->cmd; 249 pcmd = adap->cmd;
249 prsp = phandle->rsp; 250 prsp = adap->rsp;
250 251
251 /* prepare command */ 252 /* prepare command */
252 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 253 as10x_cmd_build(pcmd, (++adap->cmd_xid),
253 sizeof(pcmd->body.get_tps.req)); 254 sizeof(pcmd->body.get_tps.req));
254 255
255 /* fill command */ 256 /* fill command */
@@ -257,14 +258,14 @@ int as10x_cmd_get_tps(as10x_handle_t *phandle, struct as10x_tps *ptps)
257 cpu_to_le16(CONTROL_PROC_GETTPS); 258 cpu_to_le16(CONTROL_PROC_GETTPS);
258 259
259 /* send command */ 260 /* send command */
260 if (phandle->ops->xfer_cmd) { 261 if (adap->ops->xfer_cmd) {
261 error = phandle->ops->xfer_cmd(phandle, 262 error = adap->ops->xfer_cmd(adap,
262 (uint8_t *) pcmd, 263 (uint8_t *) pcmd,
263 sizeof(pcmd->body.get_tps.req) + 264 sizeof(pcmd->body.get_tps.req) +
264 HEADER_SIZE, 265 HEADER_SIZE,
265 (uint8_t *) prsp, 266 (uint8_t *) prsp,
266 sizeof(prsp->body.get_tps.rsp) + 267 sizeof(prsp->body.get_tps.rsp) +
267 HEADER_SIZE); 268 HEADER_SIZE);
268 } else { 269 } else {
269 error = AS10X_CMD_ERROR; 270 error = AS10X_CMD_ERROR;
270 } 271 }
@@ -278,7 +279,7 @@ int as10x_cmd_get_tps(as10x_handle_t *phandle, struct as10x_tps *ptps)
278 goto out; 279 goto out;
279 280
280 /* Response OK -> get response data */ 281 /* Response OK -> get response data */
281 ptps->constellation = prsp->body.get_tps.rsp.tps.constellation; 282 ptps->modulation = prsp->body.get_tps.rsp.tps.modulation;
282 ptps->hierarchy = prsp->body.get_tps.rsp.tps.hierarchy; 283 ptps->hierarchy = prsp->body.get_tps.rsp.tps.hierarchy;
283 ptps->interleaving_mode = prsp->body.get_tps.rsp.tps.interleaving_mode; 284 ptps->interleaving_mode = prsp->body.get_tps.rsp.tps.interleaving_mode;
284 ptps->code_rate_HP = prsp->body.get_tps.rsp.tps.code_rate_HP; 285 ptps->code_rate_HP = prsp->body.get_tps.rsp.tps.code_rate_HP;
@@ -296,12 +297,12 @@ out:
296 297
297/** 298/**
298 * as10x_cmd_get_demod_stats - send get demod stats command to AS10x 299 * as10x_cmd_get_demod_stats - send get demod stats command to AS10x
299 * @phandle: pointer to AS10x handle 300 * @adap: pointer to AS10x bus adapter
300 * @pdemod_stats: pointer to demod stats parameters structure 301 * @pdemod_stats: pointer to demod stats parameters structure
301 * 302 *
302 * Return 0 on success or negative value in case of error. 303 * Return 0 on success or negative value in case of error.
303 */ 304 */
304int as10x_cmd_get_demod_stats(as10x_handle_t *phandle, 305int as10x_cmd_get_demod_stats(struct as10x_bus_adapter_t *adap,
305 struct as10x_demod_stats *pdemod_stats) 306 struct as10x_demod_stats *pdemod_stats)
306{ 307{
307 int error; 308 int error;
@@ -309,11 +310,11 @@ int as10x_cmd_get_demod_stats(as10x_handle_t *phandle,
309 310
310 ENTER(); 311 ENTER();
311 312
312 pcmd = phandle->cmd; 313 pcmd = adap->cmd;
313 prsp = phandle->rsp; 314 prsp = adap->rsp;
314 315
315 /* prepare command */ 316 /* prepare command */
316 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 317 as10x_cmd_build(pcmd, (++adap->cmd_xid),
317 sizeof(pcmd->body.get_demod_stats.req)); 318 sizeof(pcmd->body.get_demod_stats.req));
318 319
319 /* fill command */ 320 /* fill command */
@@ -321,8 +322,8 @@ int as10x_cmd_get_demod_stats(as10x_handle_t *phandle,
321 cpu_to_le16(CONTROL_PROC_GET_DEMOD_STATS); 322 cpu_to_le16(CONTROL_PROC_GET_DEMOD_STATS);
322 323
323 /* send command */ 324 /* send command */
324 if (phandle->ops->xfer_cmd) { 325 if (adap->ops->xfer_cmd) {
325 error = phandle->ops->xfer_cmd(phandle, 326 error = adap->ops->xfer_cmd(adap,
326 (uint8_t *) pcmd, 327 (uint8_t *) pcmd,
327 sizeof(pcmd->body.get_demod_stats.req) 328 sizeof(pcmd->body.get_demod_stats.req)
328 + HEADER_SIZE, 329 + HEADER_SIZE,
@@ -360,13 +361,13 @@ out:
360 361
361/** 362/**
362 * as10x_cmd_get_impulse_resp - send get impulse response command to AS10x 363 * as10x_cmd_get_impulse_resp - send get impulse response command to AS10x
363 * @phandle: pointer to AS10x handle 364 * @adap: pointer to AS10x bus adapter
364 * @is_ready: pointer to value indicating when impulse 365 * @is_ready: pointer to value indicating when impulse
365 * response data is ready 366 * response data is ready
366 * 367 *
367 * Return 0 on success or negative value in case of error. 368 * Return 0 on success or negative value in case of error.
368 */ 369 */
369int as10x_cmd_get_impulse_resp(as10x_handle_t *phandle, 370int as10x_cmd_get_impulse_resp(struct as10x_bus_adapter_t *adap,
370 uint8_t *is_ready) 371 uint8_t *is_ready)
371{ 372{
372 int error; 373 int error;
@@ -374,11 +375,11 @@ int as10x_cmd_get_impulse_resp(as10x_handle_t *phandle,
374 375
375 ENTER(); 376 ENTER();
376 377
377 pcmd = phandle->cmd; 378 pcmd = adap->cmd;
378 prsp = phandle->rsp; 379 prsp = adap->rsp;
379 380
380 /* prepare command */ 381 /* prepare command */
381 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 382 as10x_cmd_build(pcmd, (++adap->cmd_xid),
382 sizeof(pcmd->body.get_impulse_rsp.req)); 383 sizeof(pcmd->body.get_impulse_rsp.req));
383 384
384 /* fill command */ 385 /* fill command */
@@ -386,8 +387,8 @@ int as10x_cmd_get_impulse_resp(as10x_handle_t *phandle,
386 cpu_to_le16(CONTROL_PROC_GET_IMPULSE_RESP); 387 cpu_to_le16(CONTROL_PROC_GET_IMPULSE_RESP);
387 388
388 /* send command */ 389 /* send command */
389 if (phandle->ops->xfer_cmd) { 390 if (adap->ops->xfer_cmd) {
390 error = phandle->ops->xfer_cmd(phandle, 391 error = adap->ops->xfer_cmd(adap,
391 (uint8_t *) pcmd, 392 (uint8_t *) pcmd,
392 sizeof(pcmd->body.get_impulse_rsp.req) 393 sizeof(pcmd->body.get_impulse_rsp.req)
393 + HEADER_SIZE, 394 + HEADER_SIZE,
diff --git a/drivers/staging/media/as102/as10x_cmd.h b/drivers/staging/media/as102/as10x_cmd.h
index 01a716380e0..4ea249e7ada 100644
--- a/drivers/staging/media/as102/as10x_cmd.h
+++ b/drivers/staging/media/as102/as10x_cmd.h
@@ -28,459 +28,456 @@
28/*********************************/ 28/*********************************/
29/* MACRO DEFINITIONS */ 29/* MACRO DEFINITIONS */
30/*********************************/ 30/*********************************/
31#define AS10X_CMD_ERROR -1 31#define AS10X_CMD_ERROR -1
32 32
33#define SERVICE_PROG_ID 0x0002 33#define SERVICE_PROG_ID 0x0002
34#define SERVICE_PROG_VERSION 0x0001 34#define SERVICE_PROG_VERSION 0x0001
35 35
36#define HIER_NONE 0x00 36#define HIER_NONE 0x00
37#define HIER_LOW_PRIORITY 0x01 37#define HIER_LOW_PRIORITY 0x01
38 38
39#define HEADER_SIZE (sizeof(struct as10x_cmd_header_t)) 39#define HEADER_SIZE (sizeof(struct as10x_cmd_header_t))
40 40
41/* context request types */ 41/* context request types */
42#define GET_CONTEXT_DATA 1 42#define GET_CONTEXT_DATA 1
43#define SET_CONTEXT_DATA 2 43#define SET_CONTEXT_DATA 2
44 44
45/* ODSP suspend modes */ 45/* ODSP suspend modes */
46#define CFG_MODE_ODSP_RESUME 0 46#define CFG_MODE_ODSP_RESUME 0
47#define CFG_MODE_ODSP_SUSPEND 1 47#define CFG_MODE_ODSP_SUSPEND 1
48 48
49/* Dump memory size */ 49/* Dump memory size */
50#define DUMP_BLOCK_SIZE_MAX 0x20 50#define DUMP_BLOCK_SIZE_MAX 0x20
51 51
52/*********************************/ 52/*********************************/
53/* TYPE DEFINITION */ 53/* TYPE DEFINITION */
54/*********************************/ 54/*********************************/
55typedef enum { 55enum control_proc {
56 CONTROL_PROC_TURNON = 0x0001, 56 CONTROL_PROC_TURNON = 0x0001,
57 CONTROL_PROC_TURNON_RSP = 0x0100, 57 CONTROL_PROC_TURNON_RSP = 0x0100,
58 CONTROL_PROC_SET_REGISTER = 0x0002, 58 CONTROL_PROC_SET_REGISTER = 0x0002,
59 CONTROL_PROC_SET_REGISTER_RSP = 0x0200, 59 CONTROL_PROC_SET_REGISTER_RSP = 0x0200,
60 CONTROL_PROC_GET_REGISTER = 0x0003, 60 CONTROL_PROC_GET_REGISTER = 0x0003,
61 CONTROL_PROC_GET_REGISTER_RSP = 0x0300, 61 CONTROL_PROC_GET_REGISTER_RSP = 0x0300,
62 CONTROL_PROC_SETTUNE = 0x000A, 62 CONTROL_PROC_SETTUNE = 0x000A,
63 CONTROL_PROC_SETTUNE_RSP = 0x0A00, 63 CONTROL_PROC_SETTUNE_RSP = 0x0A00,
64 CONTROL_PROC_GETTUNESTAT = 0x000B, 64 CONTROL_PROC_GETTUNESTAT = 0x000B,
65 CONTROL_PROC_GETTUNESTAT_RSP = 0x0B00, 65 CONTROL_PROC_GETTUNESTAT_RSP = 0x0B00,
66 CONTROL_PROC_GETTPS = 0x000D, 66 CONTROL_PROC_GETTPS = 0x000D,
67 CONTROL_PROC_GETTPS_RSP = 0x0D00, 67 CONTROL_PROC_GETTPS_RSP = 0x0D00,
68 CONTROL_PROC_SETFILTER = 0x000E, 68 CONTROL_PROC_SETFILTER = 0x000E,
69 CONTROL_PROC_SETFILTER_RSP = 0x0E00, 69 CONTROL_PROC_SETFILTER_RSP = 0x0E00,
70 CONTROL_PROC_REMOVEFILTER = 0x000F, 70 CONTROL_PROC_REMOVEFILTER = 0x000F,
71 CONTROL_PROC_REMOVEFILTER_RSP = 0x0F00, 71 CONTROL_PROC_REMOVEFILTER_RSP = 0x0F00,
72 CONTROL_PROC_GET_IMPULSE_RESP = 0x0012, 72 CONTROL_PROC_GET_IMPULSE_RESP = 0x0012,
73 CONTROL_PROC_GET_IMPULSE_RESP_RSP = 0x1200, 73 CONTROL_PROC_GET_IMPULSE_RESP_RSP = 0x1200,
74 CONTROL_PROC_START_STREAMING = 0x0013, 74 CONTROL_PROC_START_STREAMING = 0x0013,
75 CONTROL_PROC_START_STREAMING_RSP = 0x1300, 75 CONTROL_PROC_START_STREAMING_RSP = 0x1300,
76 CONTROL_PROC_STOP_STREAMING = 0x0014, 76 CONTROL_PROC_STOP_STREAMING = 0x0014,
77 CONTROL_PROC_STOP_STREAMING_RSP = 0x1400, 77 CONTROL_PROC_STOP_STREAMING_RSP = 0x1400,
78 CONTROL_PROC_GET_DEMOD_STATS = 0x0015, 78 CONTROL_PROC_GET_DEMOD_STATS = 0x0015,
79 CONTROL_PROC_GET_DEMOD_STATS_RSP = 0x1500, 79 CONTROL_PROC_GET_DEMOD_STATS_RSP = 0x1500,
80 CONTROL_PROC_ELNA_CHANGE_MODE = 0x0016, 80 CONTROL_PROC_ELNA_CHANGE_MODE = 0x0016,
81 CONTROL_PROC_ELNA_CHANGE_MODE_RSP = 0x1600, 81 CONTROL_PROC_ELNA_CHANGE_MODE_RSP = 0x1600,
82 CONTROL_PROC_ODSP_CHANGE_MODE = 0x0017, 82 CONTROL_PROC_ODSP_CHANGE_MODE = 0x0017,
83 CONTROL_PROC_ODSP_CHANGE_MODE_RSP = 0x1700, 83 CONTROL_PROC_ODSP_CHANGE_MODE_RSP = 0x1700,
84 CONTROL_PROC_AGC_CHANGE_MODE = 0x0018, 84 CONTROL_PROC_AGC_CHANGE_MODE = 0x0018,
85 CONTROL_PROC_AGC_CHANGE_MODE_RSP = 0x1800, 85 CONTROL_PROC_AGC_CHANGE_MODE_RSP = 0x1800,
86 86
87 CONTROL_PROC_CONTEXT = 0x00FC, 87 CONTROL_PROC_CONTEXT = 0x00FC,
88 CONTROL_PROC_CONTEXT_RSP = 0xFC00, 88 CONTROL_PROC_CONTEXT_RSP = 0xFC00,
89 CONTROL_PROC_DUMP_MEMORY = 0x00FD, 89 CONTROL_PROC_DUMP_MEMORY = 0x00FD,
90 CONTROL_PROC_DUMP_MEMORY_RSP = 0xFD00, 90 CONTROL_PROC_DUMP_MEMORY_RSP = 0xFD00,
91 CONTROL_PROC_DUMPLOG_MEMORY = 0x00FE, 91 CONTROL_PROC_DUMPLOG_MEMORY = 0x00FE,
92 CONTROL_PROC_DUMPLOG_MEMORY_RSP = 0xFE00, 92 CONTROL_PROC_DUMPLOG_MEMORY_RSP = 0xFE00,
93 CONTROL_PROC_TURNOFF = 0x00FF, 93 CONTROL_PROC_TURNOFF = 0x00FF,
94 CONTROL_PROC_TURNOFF_RSP = 0xFF00 94 CONTROL_PROC_TURNOFF_RSP = 0xFF00
95} control_proc; 95};
96 96
97 97union as10x_turn_on {
98#pragma pack(1) 98 /* request */
99typedef union { 99 struct {
100 /* request */ 100 /* request identifier */
101 struct { 101 uint16_t proc_id;
102 /* request identifier */ 102 } req;
103 uint16_t proc_id; 103 /* response */
104 } req; 104 struct {
105 /* response */ 105 /* response identifier */
106 struct { 106 uint16_t proc_id;
107 /* response identifier */ 107 /* error */
108 uint16_t proc_id; 108 uint8_t error;
109 /* error */ 109 } rsp;
110 uint8_t error; 110} __packed;
111 } rsp; 111
112} TURN_ON; 112union as10x_turn_off {
113 113 /* request */
114typedef union { 114 struct {
115 /* request */ 115 /* request identifier */
116 struct { 116 uint16_t proc_id;
117 /* request identifier */ 117 } req;
118 uint16_t proc_id; 118 /* response */
119 } req; 119 struct {
120 /* response */ 120 /* response identifier */
121 struct { 121 uint16_t proc_id;
122 /* response identifier */ 122 /* error */
123 uint16_t proc_id; 123 uint8_t err;
124 /* error */ 124 } rsp;
125 uint8_t err; 125} __packed;
126 } rsp; 126
127} TURN_OFF; 127union as10x_set_tune {
128 128 /* request */
129typedef union { 129 struct {
130 /* request */ 130 /* request identifier */
131 struct { 131 uint16_t proc_id;
132 /* request identifier */ 132 /* tune params */
133 uint16_t proc_id; 133 struct as10x_tune_args args;
134 /* tune params */ 134 } req;
135 struct as10x_tune_args args; 135 /* response */
136 } req; 136 struct {
137 /* response */ 137 /* response identifier */
138 struct { 138 uint16_t proc_id;
139 /* response identifier */ 139 /* response error */
140 uint16_t proc_id; 140 uint8_t error;
141 /* response error */ 141 } rsp;
142 uint8_t error; 142} __packed;
143 } rsp; 143
144} SET_TUNE; 144union as10x_get_tune_status {
145 145 /* request */
146typedef union { 146 struct {
147 /* request */ 147 /* request identifier */
148 struct { 148 uint16_t proc_id;
149 /* request identifier */ 149 } req;
150 uint16_t proc_id; 150 /* response */
151 } req; 151 struct {
152 /* response */ 152 /* response identifier */
153 struct { 153 uint16_t proc_id;
154 /* response identifier */ 154 /* response error */
155 uint16_t proc_id; 155 uint8_t error;
156 /* response error */ 156 /* tune status */
157 uint8_t error; 157 struct as10x_tune_status sts;
158 /* tune status */ 158 } rsp;
159 struct as10x_tune_status sts; 159} __packed;
160 } rsp; 160
161} GET_TUNE_STATUS; 161union as10x_get_tps {
162 162 /* request */
163typedef union { 163 struct {
164 /* request */ 164 /* request identifier */
165 struct { 165 uint16_t proc_id;
166 /* request identifier */ 166 } req;
167 uint16_t proc_id; 167 /* response */
168 } req; 168 struct {
169 /* response */ 169 /* response identifier */
170 struct { 170 uint16_t proc_id;
171 /* response identifier */ 171 /* response error */
172 uint16_t proc_id; 172 uint8_t error;
173 /* response error */ 173 /* tps details */
174 uint8_t error; 174 struct as10x_tps tps;
175 /* tps details */ 175 } rsp;
176 struct as10x_tps tps; 176} __packed;
177 } rsp; 177
178} GET_TPS; 178union as10x_common {
179 179 /* request */
180typedef union { 180 struct {
181 /* request */ 181 /* request identifier */
182 struct { 182 uint16_t proc_id;
183 /* request identifier */ 183 } req;
184 uint16_t proc_id; 184 /* response */
185 } req; 185 struct {
186 /* response */ 186 /* response identifier */
187 struct { 187 uint16_t proc_id;
188 /* response identifier */ 188 /* response error */
189 uint16_t proc_id; 189 uint8_t error;
190 /* response error */ 190 } rsp;
191 uint8_t error; 191} __packed;
192 } rsp; 192
193} COMMON; 193union as10x_add_pid_filter {
194 194 /* request */
195typedef union { 195 struct {
196 /* request */ 196 /* request identifier */
197 struct { 197 uint16_t proc_id;
198 /* request identifier */ 198 /* PID to filter */
199 uint16_t proc_id; 199 uint16_t pid;
200 /* PID to filter */ 200 /* stream type (MPE, PSI/SI or PES )*/
201 uint16_t pid; 201 uint8_t stream_type;
202 /* stream type (MPE, PSI/SI or PES )*/ 202 /* PID index in filter table */
203 uint8_t stream_type; 203 uint8_t idx;
204 /* PID index in filter table */ 204 } req;
205 uint8_t idx; 205 /* response */
206 } req; 206 struct {
207 /* response */ 207 /* response identifier */
208 struct { 208 uint16_t proc_id;
209 /* response identifier */ 209 /* response error */
210 uint16_t proc_id; 210 uint8_t error;
211 /* response error */ 211 /* Filter id */
212 uint8_t error; 212 uint8_t filter_id;
213 /* Filter id */ 213 } rsp;
214 uint8_t filter_id; 214} __packed;
215 } rsp; 215
216} ADD_PID_FILTER; 216union as10x_del_pid_filter {
217 217 /* request */
218typedef union { 218 struct {
219 /* request */ 219 /* request identifier */
220 struct { 220 uint16_t proc_id;
221 /* request identifier */ 221 /* PID to remove */
222 uint16_t proc_id; 222 uint16_t pid;
223 /* PID to remove */ 223 } req;
224 uint16_t pid; 224 /* response */
225 } req; 225 struct {
226 /* response */ 226 /* response identifier */
227 struct { 227 uint16_t proc_id;
228 /* response identifier */ 228 /* response error */
229 uint16_t proc_id; 229 uint8_t error;
230 /* response error */ 230 } rsp;
231 uint8_t error; 231} __packed;
232 } rsp; 232
233} DEL_PID_FILTER; 233union as10x_start_streaming {
234 234 /* request */
235typedef union { 235 struct {
236 /* request */ 236 /* request identifier */
237 struct { 237 uint16_t proc_id;
238 /* request identifier */ 238 } req;
239 uint16_t proc_id; 239 /* response */
240 } req; 240 struct {
241 /* response */ 241 /* response identifier */
242 struct { 242 uint16_t proc_id;
243 /* response identifier */ 243 /* error */
244 uint16_t proc_id; 244 uint8_t error;
245 /* error */ 245 } rsp;
246 uint8_t error; 246} __packed;
247 } rsp; 247
248} START_STREAMING; 248union as10x_stop_streaming {
249 249 /* request */
250typedef union { 250 struct {
251 /* request */ 251 /* request identifier */
252 struct { 252 uint16_t proc_id;
253 /* request identifier */ 253 } req;
254 uint16_t proc_id; 254 /* response */
255 } req; 255 struct {
256 /* response */ 256 /* response identifier */
257 struct { 257 uint16_t proc_id;
258 /* response identifier */ 258 /* error */
259 uint16_t proc_id; 259 uint8_t error;
260 /* error */ 260 } rsp;
261 uint8_t error; 261} __packed;
262 } rsp; 262
263} STOP_STREAMING; 263union as10x_get_demod_stats {
264 264 /* request */
265typedef union { 265 struct {
266 /* request */ 266 /* request identifier */
267 struct { 267 uint16_t proc_id;
268 /* request identifier */ 268 } req;
269 uint16_t proc_id; 269 /* response */
270 } req; 270 struct {
271 /* response */ 271 /* response identifier */
272 struct { 272 uint16_t proc_id;
273 /* response identifier */ 273 /* error */
274 uint16_t proc_id; 274 uint8_t error;
275 /* error */ 275 /* demod stats */
276 uint8_t error; 276 struct as10x_demod_stats stats;
277 /* demod stats */ 277 } rsp;
278 struct as10x_demod_stats stats; 278} __packed;
279 } rsp; 279
280} GET_DEMOD_STATS; 280union as10x_get_impulse_resp {
281 281 /* request */
282typedef union { 282 struct {
283 /* request */ 283 /* request identifier */
284 struct { 284 uint16_t proc_id;
285 /* request identifier */ 285 } req;
286 uint16_t proc_id; 286 /* response */
287 } req; 287 struct {
288 /* response */ 288 /* response identifier */
289 struct { 289 uint16_t proc_id;
290 /* response identifier */ 290 /* error */
291 uint16_t proc_id; 291 uint8_t error;
292 /* error */ 292 /* impulse response ready */
293 uint8_t error; 293 uint8_t is_ready;
294 /* impulse response ready */ 294 } rsp;
295 uint8_t is_ready; 295} __packed;
296 } rsp; 296
297} GET_IMPULSE_RESP; 297union as10x_fw_context {
298 298 /* request */
299typedef union { 299 struct {
300 /* request */ 300 /* request identifier */
301 struct { 301 uint16_t proc_id;
302 /* request identifier */ 302 /* value to write (for set context)*/
303 uint16_t proc_id; 303 struct as10x_register_value reg_val;
304 /* value to write (for set context)*/ 304 /* context tag */
305 struct as10x_register_value reg_val; 305 uint16_t tag;
306 /* context tag */ 306 /* context request type */
307 uint16_t tag; 307 uint16_t type;
308 /* context request type */ 308 } req;
309 uint16_t type; 309 /* response */
310 } req; 310 struct {
311 /* response */ 311 /* response identifier */
312 struct { 312 uint16_t proc_id;
313 /* response identifier */ 313 /* value read (for get context) */
314 uint16_t proc_id; 314 struct as10x_register_value reg_val;
315 /* value read (for get context) */ 315 /* context request type */
316 struct as10x_register_value reg_val; 316 uint16_t type;
317 /* context request type */ 317 /* error */
318 uint16_t type; 318 uint8_t error;
319 /* error */ 319 } rsp;
320 uint8_t error; 320} __packed;
321 } rsp; 321
322} FW_CONTEXT; 322union as10x_set_register {
323 323 /* request */
324typedef union { 324 struct {
325 /* request */ 325 /* response identifier */
326 struct { 326 uint16_t proc_id;
327 /* response identifier */ 327 /* register description */
328 uint16_t proc_id; 328 struct as10x_register_addr reg_addr;
329 /* register description */ 329 /* register content */
330 struct as10x_register_addr reg_addr; 330 struct as10x_register_value reg_val;
331 /* register content */ 331 } req;
332 struct as10x_register_value reg_val; 332 /* response */
333 } req; 333 struct {
334 /* response */ 334 /* response identifier */
335 struct { 335 uint16_t proc_id;
336 /* response identifier */ 336 /* error */
337 uint16_t proc_id; 337 uint8_t error;
338 /* error */ 338 } rsp;
339 uint8_t error; 339} __packed;
340 } rsp; 340
341} SET_REGISTER; 341union as10x_get_register {
342 342 /* request */
343typedef union { 343 struct {
344 /* request */ 344 /* response identifier */
345 struct { 345 uint16_t proc_id;
346 /* response identifier */ 346 /* register description */
347 uint16_t proc_id; 347 struct as10x_register_addr reg_addr;
348 /* register description */ 348 } req;
349 struct as10x_register_addr reg_addr; 349 /* response */
350 } req; 350 struct {
351 /* response */ 351 /* response identifier */
352 struct { 352 uint16_t proc_id;
353 /* response identifier */ 353 /* error */
354 uint16_t proc_id; 354 uint8_t error;
355 /* error */ 355 /* register content */
356 uint8_t error; 356 struct as10x_register_value reg_val;
357 /* register content */ 357 } rsp;
358 struct as10x_register_value reg_val; 358} __packed;
359 } rsp; 359
360} GET_REGISTER; 360union as10x_cfg_change_mode {
361 361 /* request */
362typedef union { 362 struct {
363 /* request */ 363 /* request identifier */
364 struct { 364 uint16_t proc_id;
365 /* request identifier */ 365 /* mode */
366 uint16_t proc_id; 366 uint8_t mode;
367 /* mode */ 367 } req;
368 uint8_t mode; 368 /* response */
369 } req; 369 struct {
370 /* response */ 370 /* response identifier */
371 struct { 371 uint16_t proc_id;
372 /* response identifier */ 372 /* error */
373 uint16_t proc_id; 373 uint8_t error;
374 /* error */ 374 } rsp;
375 uint8_t error; 375} __packed;
376 } rsp;
377} CFG_CHANGE_MODE;
378 376
379struct as10x_cmd_header_t { 377struct as10x_cmd_header_t {
380 uint16_t req_id; 378 uint16_t req_id;
381 uint16_t prog; 379 uint16_t prog;
382 uint16_t version; 380 uint16_t version;
383 uint16_t data_len; 381 uint16_t data_len;
384}; 382} __packed;
385 383
386#define DUMP_BLOCK_SIZE 16 384#define DUMP_BLOCK_SIZE 16
387typedef union { 385
388 /* request */ 386union as10x_dump_memory {
389 struct { 387 /* request */
390 /* request identifier */ 388 struct {
391 uint16_t proc_id; 389 /* request identifier */
392 /* dump memory type request */ 390 uint16_t proc_id;
393 uint8_t dump_req; 391 /* dump memory type request */
394 /* register description */ 392 uint8_t dump_req;
395 struct as10x_register_addr reg_addr; 393 /* register description */
396 /* nb blocks to read */ 394 struct as10x_register_addr reg_addr;
397 uint16_t num_blocks; 395 /* nb blocks to read */
398 } req; 396 uint16_t num_blocks;
399 /* response */ 397 } req;
400 struct { 398 /* response */
401 /* response identifier */ 399 struct {
402 uint16_t proc_id; 400 /* response identifier */
403 /* error */ 401 uint16_t proc_id;
404 uint8_t error; 402 /* error */
405 /* dump response */ 403 uint8_t error;
406 uint8_t dump_rsp; 404 /* dump response */
407 /* data */ 405 uint8_t dump_rsp;
408 union { 406 /* data */
409 uint8_t data8[DUMP_BLOCK_SIZE]; 407 union {
410 uint16_t data16[DUMP_BLOCK_SIZE / sizeof(uint16_t)]; 408 uint8_t data8[DUMP_BLOCK_SIZE];
411 uint32_t data32[DUMP_BLOCK_SIZE / sizeof(uint32_t)]; 409 uint16_t data16[DUMP_BLOCK_SIZE / sizeof(uint16_t)];
412 } u; 410 uint32_t data32[DUMP_BLOCK_SIZE / sizeof(uint32_t)];
413 } rsp; 411 } u;
414} DUMP_MEMORY; 412 } rsp;
415 413} __packed;
416typedef union { 414
417 struct { 415union as10x_dumplog_memory {
418 /* request identifier */ 416 struct {
419 uint16_t proc_id; 417 /* request identifier */
420 /* dump memory type request */ 418 uint16_t proc_id;
421 uint8_t dump_req; 419 /* dump memory type request */
422 } req; 420 uint8_t dump_req;
423 struct { 421 } req;
424 /* request identifier */ 422 struct {
425 uint16_t proc_id; 423 /* request identifier */
426 /* error */ 424 uint16_t proc_id;
427 uint8_t error; 425 /* error */
428 /* dump response */ 426 uint8_t error;
429 uint8_t dump_rsp; 427 /* dump response */
430 /* dump data */ 428 uint8_t dump_rsp;
431 uint8_t data[DUMP_BLOCK_SIZE]; 429 /* dump data */
432 } rsp; 430 uint8_t data[DUMP_BLOCK_SIZE];
433} DUMPLOG_MEMORY; 431 } rsp;
434 432} __packed;
435typedef union { 433
436 /* request */ 434union as10x_raw_data {
437 struct { 435 /* request */
438 uint16_t proc_id; 436 struct {
439 uint8_t data[64 - sizeof(struct as10x_cmd_header_t) -2 /* proc_id */]; 437 uint16_t proc_id;
440 } req; 438 uint8_t data[64 - sizeof(struct as10x_cmd_header_t)
441 /* response */ 439 - 2 /* proc_id */];
442 struct { 440 } req;
443 uint16_t proc_id; 441 /* response */
444 uint8_t error; 442 struct {
445 uint8_t data[64 - sizeof(struct as10x_cmd_header_t) /* header */ 443 uint16_t proc_id;
446 - 2 /* proc_id */ - 1 /* rc */]; 444 uint8_t error;
447 } rsp; 445 uint8_t data[64 - sizeof(struct as10x_cmd_header_t)
448} RAW_DATA; 446 - 2 /* proc_id */ - 1 /* rc */];
447 } rsp;
448} __packed;
449 449
450struct as10x_cmd_t { 450struct as10x_cmd_t {
451 /* header */ 451 struct as10x_cmd_header_t header;
452 struct as10x_cmd_header_t header; 452 union {
453 /* body */ 453 union as10x_turn_on turn_on;
454 union { 454 union as10x_turn_off turn_off;
455 TURN_ON turn_on; 455 union as10x_set_tune set_tune;
456 TURN_OFF turn_off; 456 union as10x_get_tune_status get_tune_status;
457 SET_TUNE set_tune; 457 union as10x_get_tps get_tps;
458 GET_TUNE_STATUS get_tune_status; 458 union as10x_common common;
459 GET_TPS get_tps; 459 union as10x_add_pid_filter add_pid_filter;
460 COMMON common; 460 union as10x_del_pid_filter del_pid_filter;
461 ADD_PID_FILTER add_pid_filter; 461 union as10x_start_streaming start_streaming;
462 DEL_PID_FILTER del_pid_filter; 462 union as10x_stop_streaming stop_streaming;
463 START_STREAMING start_streaming; 463 union as10x_get_demod_stats get_demod_stats;
464 STOP_STREAMING stop_streaming; 464 union as10x_get_impulse_resp get_impulse_rsp;
465 GET_DEMOD_STATS get_demod_stats; 465 union as10x_fw_context context;
466 GET_IMPULSE_RESP get_impulse_rsp; 466 union as10x_set_register set_register;
467 FW_CONTEXT context; 467 union as10x_get_register get_register;
468 SET_REGISTER set_register; 468 union as10x_cfg_change_mode cfg_change_mode;
469 GET_REGISTER get_register; 469 union as10x_dump_memory dump_memory;
470 CFG_CHANGE_MODE cfg_change_mode; 470 union as10x_dumplog_memory dumplog_memory;
471 DUMP_MEMORY dump_memory; 471 union as10x_raw_data raw_data;
472 DUMPLOG_MEMORY dumplog_memory; 472 } body;
473 RAW_DATA raw_data; 473} __packed;
474 } body;
475};
476 474
477struct as10x_token_cmd_t { 475struct as10x_token_cmd_t {
478 /* token cmd */ 476 /* token cmd */
479 struct as10x_cmd_t c; 477 struct as10x_cmd_t c;
480 /* token response */ 478 /* token response */
481 struct as10x_cmd_t r; 479 struct as10x_cmd_t r;
482}; 480} __packed;
483#pragma pack()
484 481
485 482
486/**************************/ 483/**************************/
@@ -491,50 +488,42 @@ void as10x_cmd_build(struct as10x_cmd_t *pcmd, uint16_t proc_id,
491 uint16_t cmd_len); 488 uint16_t cmd_len);
492int as10x_rsp_parse(struct as10x_cmd_t *r, uint16_t proc_id); 489int as10x_rsp_parse(struct as10x_cmd_t *r, uint16_t proc_id);
493 490
494#ifdef __cplusplus
495extern "C" {
496#endif
497
498/* as10x cmd */ 491/* as10x cmd */
499int as10x_cmd_turn_on(as10x_handle_t *phandle); 492int as10x_cmd_turn_on(struct as10x_bus_adapter_t *adap);
500int as10x_cmd_turn_off(as10x_handle_t *phandle); 493int as10x_cmd_turn_off(struct as10x_bus_adapter_t *adap);
501 494
502int as10x_cmd_set_tune(as10x_handle_t *phandle, 495int as10x_cmd_set_tune(struct as10x_bus_adapter_t *adap,
503 struct as10x_tune_args *ptune); 496 struct as10x_tune_args *ptune);
504 497
505int as10x_cmd_get_tune_status(as10x_handle_t *phandle, 498int as10x_cmd_get_tune_status(struct as10x_bus_adapter_t *adap,
506 struct as10x_tune_status *pstatus); 499 struct as10x_tune_status *pstatus);
507 500
508int as10x_cmd_get_tps(as10x_handle_t *phandle, 501int as10x_cmd_get_tps(struct as10x_bus_adapter_t *adap,
509 struct as10x_tps *ptps); 502 struct as10x_tps *ptps);
510 503
511int as10x_cmd_get_demod_stats(as10x_handle_t *phandle, 504int as10x_cmd_get_demod_stats(struct as10x_bus_adapter_t *adap,
512 struct as10x_demod_stats *pdemod_stats); 505 struct as10x_demod_stats *pdemod_stats);
513 506
514int as10x_cmd_get_impulse_resp(as10x_handle_t *phandle, 507int as10x_cmd_get_impulse_resp(struct as10x_bus_adapter_t *adap,
515 uint8_t *is_ready); 508 uint8_t *is_ready);
516 509
517/* as10x cmd stream */ 510/* as10x cmd stream */
518int as10x_cmd_add_PID_filter(as10x_handle_t *phandle, 511int as10x_cmd_add_PID_filter(struct as10x_bus_adapter_t *adap,
519 struct as10x_ts_filter *filter); 512 struct as10x_ts_filter *filter);
520int as10x_cmd_del_PID_filter(as10x_handle_t *phandle, 513int as10x_cmd_del_PID_filter(struct as10x_bus_adapter_t *adap,
521 uint16_t pid_value); 514 uint16_t pid_value);
522 515
523int as10x_cmd_start_streaming(as10x_handle_t *phandle); 516int as10x_cmd_start_streaming(struct as10x_bus_adapter_t *adap);
524int as10x_cmd_stop_streaming(as10x_handle_t *phandle); 517int as10x_cmd_stop_streaming(struct as10x_bus_adapter_t *adap);
525 518
526/* as10x cmd cfg */ 519/* as10x cmd cfg */
527int as10x_cmd_set_context(as10x_handle_t *phandle, 520int as10x_cmd_set_context(struct as10x_bus_adapter_t *adap,
528 uint16_t tag, 521 uint16_t tag,
529 uint32_t value); 522 uint32_t value);
530int as10x_cmd_get_context(as10x_handle_t *phandle, 523int as10x_cmd_get_context(struct as10x_bus_adapter_t *adap,
531 uint16_t tag, 524 uint16_t tag,
532 uint32_t *pvalue); 525 uint32_t *pvalue);
533 526
534int as10x_cmd_eLNA_change_mode(as10x_handle_t *phandle, uint8_t mode); 527int as10x_cmd_eLNA_change_mode(struct as10x_bus_adapter_t *adap, uint8_t mode);
535int as10x_context_rsp_parse(struct as10x_cmd_t *prsp, uint16_t proc_id); 528int as10x_context_rsp_parse(struct as10x_cmd_t *prsp, uint16_t proc_id);
536#ifdef __cplusplus
537}
538#endif
539#endif 529#endif
540/* EOF - vim: set textwidth=80 ts=3 sw=3 sts=3 et: */
diff --git a/drivers/staging/media/as102/as10x_cmd_cfg.c b/drivers/staging/media/as102/as10x_cmd_cfg.c
index ec6f69fcf39..d2a4bce8962 100644
--- a/drivers/staging/media/as102/as10x_cmd_cfg.c
+++ b/drivers/staging/media/as102/as10x_cmd_cfg.c
@@ -28,13 +28,13 @@
28 28
29/** 29/**
30 * as10x_cmd_get_context - Send get context command to AS10x 30 * as10x_cmd_get_context - Send get context command to AS10x
31 * @phandle: pointer to AS10x handle 31 * @adap: pointer to AS10x bus adapter
32 * @tag: context tag 32 * @tag: context tag
33 * @pvalue: pointer where to store context value read 33 * @pvalue: pointer where to store context value read
34 * 34 *
35 * Return 0 on success or negative value in case of error. 35 * Return 0 on success or negative value in case of error.
36 */ 36 */
37int as10x_cmd_get_context(as10x_handle_t *phandle, uint16_t tag, 37int as10x_cmd_get_context(struct as10x_bus_adapter_t *adap, uint16_t tag,
38 uint32_t *pvalue) 38 uint32_t *pvalue)
39{ 39{
40 int error; 40 int error;
@@ -42,11 +42,11 @@ int as10x_cmd_get_context(as10x_handle_t *phandle, uint16_t tag,
42 42
43 ENTER(); 43 ENTER();
44 44
45 pcmd = phandle->cmd; 45 pcmd = adap->cmd;
46 prsp = phandle->rsp; 46 prsp = adap->rsp;
47 47
48 /* prepare command */ 48 /* prepare command */
49 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 49 as10x_cmd_build(pcmd, (++adap->cmd_xid),
50 sizeof(pcmd->body.context.req)); 50 sizeof(pcmd->body.context.req));
51 51
52 /* fill command */ 52 /* fill command */
@@ -55,14 +55,14 @@ int as10x_cmd_get_context(as10x_handle_t *phandle, uint16_t tag,
55 pcmd->body.context.req.type = cpu_to_le16(GET_CONTEXT_DATA); 55 pcmd->body.context.req.type = cpu_to_le16(GET_CONTEXT_DATA);
56 56
57 /* send command */ 57 /* send command */
58 if (phandle->ops->xfer_cmd) { 58 if (adap->ops->xfer_cmd) {
59 error = phandle->ops->xfer_cmd(phandle, 59 error = adap->ops->xfer_cmd(adap,
60 (uint8_t *) pcmd, 60 (uint8_t *) pcmd,
61 sizeof(pcmd->body.context.req) 61 sizeof(pcmd->body.context.req)
62 + HEADER_SIZE, 62 + HEADER_SIZE,
63 (uint8_t *) prsp, 63 (uint8_t *) prsp,
64 sizeof(prsp->body.context.rsp) 64 sizeof(prsp->body.context.rsp)
65 + HEADER_SIZE); 65 + HEADER_SIZE);
66 } else { 66 } else {
67 error = AS10X_CMD_ERROR; 67 error = AS10X_CMD_ERROR;
68 } 68 }
@@ -87,13 +87,13 @@ out:
87 87
88/** 88/**
89 * as10x_cmd_set_context - send set context command to AS10x 89 * as10x_cmd_set_context - send set context command to AS10x
90 * @phandle: pointer to AS10x handle 90 * @adap: pointer to AS10x bus adapter
91 * @tag: context tag 91 * @tag: context tag
92 * @value: value to set in context 92 * @value: value to set in context
93 * 93 *
94 * Return 0 on success or negative value in case of error. 94 * Return 0 on success or negative value in case of error.
95 */ 95 */
96int as10x_cmd_set_context(as10x_handle_t *phandle, uint16_t tag, 96int as10x_cmd_set_context(struct as10x_bus_adapter_t *adap, uint16_t tag,
97 uint32_t value) 97 uint32_t value)
98{ 98{
99 int error; 99 int error;
@@ -101,11 +101,11 @@ int as10x_cmd_set_context(as10x_handle_t *phandle, uint16_t tag,
101 101
102 ENTER(); 102 ENTER();
103 103
104 pcmd = phandle->cmd; 104 pcmd = adap->cmd;
105 prsp = phandle->rsp; 105 prsp = adap->rsp;
106 106
107 /* prepare command */ 107 /* prepare command */
108 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 108 as10x_cmd_build(pcmd, (++adap->cmd_xid),
109 sizeof(pcmd->body.context.req)); 109 sizeof(pcmd->body.context.req));
110 110
111 /* fill command */ 111 /* fill command */
@@ -116,14 +116,14 @@ int as10x_cmd_set_context(as10x_handle_t *phandle, uint16_t tag,
116 pcmd->body.context.req.type = cpu_to_le16(SET_CONTEXT_DATA); 116 pcmd->body.context.req.type = cpu_to_le16(SET_CONTEXT_DATA);
117 117
118 /* send command */ 118 /* send command */
119 if (phandle->ops->xfer_cmd) { 119 if (adap->ops->xfer_cmd) {
120 error = phandle->ops->xfer_cmd(phandle, 120 error = adap->ops->xfer_cmd(adap,
121 (uint8_t *) pcmd, 121 (uint8_t *) pcmd,
122 sizeof(pcmd->body.context.req) 122 sizeof(pcmd->body.context.req)
123 + HEADER_SIZE, 123 + HEADER_SIZE,
124 (uint8_t *) prsp, 124 (uint8_t *) prsp,
125 sizeof(prsp->body.context.rsp) 125 sizeof(prsp->body.context.rsp)
126 + HEADER_SIZE); 126 + HEADER_SIZE);
127 } else { 127 } else {
128 error = AS10X_CMD_ERROR; 128 error = AS10X_CMD_ERROR;
129 } 129 }
@@ -142,7 +142,7 @@ out:
142 142
143/** 143/**
144 * as10x_cmd_eLNA_change_mode - send eLNA change mode command to AS10x 144 * as10x_cmd_eLNA_change_mode - send eLNA change mode command to AS10x
145 * @phandle: pointer to AS10x handle 145 * @adap: pointer to AS10x bus adapter
146 * @mode: mode selected: 146 * @mode: mode selected:
147 * - ON : 0x0 => eLNA always ON 147 * - ON : 0x0 => eLNA always ON
148 * - OFF : 0x1 => eLNA always OFF 148 * - OFF : 0x1 => eLNA always OFF
@@ -151,18 +151,18 @@ out:
151 * 151 *
152 * Return 0 on success or negative value in case of error. 152 * Return 0 on success or negative value in case of error.
153 */ 153 */
154int as10x_cmd_eLNA_change_mode(as10x_handle_t *phandle, uint8_t mode) 154int as10x_cmd_eLNA_change_mode(struct as10x_bus_adapter_t *adap, uint8_t mode)
155{ 155{
156 int error; 156 int error;
157 struct as10x_cmd_t *pcmd, *prsp; 157 struct as10x_cmd_t *pcmd, *prsp;
158 158
159 ENTER(); 159 ENTER();
160 160
161 pcmd = phandle->cmd; 161 pcmd = adap->cmd;
162 prsp = phandle->rsp; 162 prsp = adap->rsp;
163 163
164 /* prepare command */ 164 /* prepare command */
165 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 165 as10x_cmd_build(pcmd, (++adap->cmd_xid),
166 sizeof(pcmd->body.cfg_change_mode.req)); 166 sizeof(pcmd->body.cfg_change_mode.req));
167 167
168 /* fill command */ 168 /* fill command */
@@ -171,8 +171,8 @@ int as10x_cmd_eLNA_change_mode(as10x_handle_t *phandle, uint8_t mode)
171 pcmd->body.cfg_change_mode.req.mode = mode; 171 pcmd->body.cfg_change_mode.req.mode = mode;
172 172
173 /* send command */ 173 /* send command */
174 if (phandle->ops->xfer_cmd) { 174 if (adap->ops->xfer_cmd) {
175 error = phandle->ops->xfer_cmd(phandle, (uint8_t *) pcmd, 175 error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
176 sizeof(pcmd->body.cfg_change_mode.req) 176 sizeof(pcmd->body.cfg_change_mode.req)
177 + HEADER_SIZE, (uint8_t *) prsp, 177 + HEADER_SIZE, (uint8_t *) prsp,
178 sizeof(prsp->body.cfg_change_mode.rsp) 178 sizeof(prsp->body.cfg_change_mode.rsp)
diff --git a/drivers/staging/media/as102/as10x_cmd_stream.c b/drivers/staging/media/as102/as10x_cmd_stream.c
index 045c7068319..6d000f60fb0 100644
--- a/drivers/staging/media/as102/as10x_cmd_stream.c
+++ b/drivers/staging/media/as102/as10x_cmd_stream.c
@@ -23,12 +23,12 @@
23 23
24/** 24/**
25 * as10x_cmd_add_PID_filter - send add filter command to AS10x 25 * as10x_cmd_add_PID_filter - send add filter command to AS10x
26 * @phandle: pointer to AS10x handle 26 * @adap: pointer to AS10x bus adapter
27 * @filter: TSFilter filter for DVB-T 27 * @filter: TSFilter filter for DVB-T
28 * 28 *
29 * Return 0 on success or negative value in case of error. 29 * Return 0 on success or negative value in case of error.
30 */ 30 */
31int as10x_cmd_add_PID_filter(as10x_handle_t *phandle, 31int as10x_cmd_add_PID_filter(struct as10x_bus_adapter_t *adap,
32 struct as10x_ts_filter *filter) 32 struct as10x_ts_filter *filter)
33{ 33{
34 int error; 34 int error;
@@ -36,11 +36,11 @@ int as10x_cmd_add_PID_filter(as10x_handle_t *phandle,
36 36
37 ENTER(); 37 ENTER();
38 38
39 pcmd = phandle->cmd; 39 pcmd = adap->cmd;
40 prsp = phandle->rsp; 40 prsp = adap->rsp;
41 41
42 /* prepare command */ 42 /* prepare command */
43 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 43 as10x_cmd_build(pcmd, (++adap->cmd_xid),
44 sizeof(pcmd->body.add_pid_filter.req)); 44 sizeof(pcmd->body.add_pid_filter.req));
45 45
46 /* fill command */ 46 /* fill command */
@@ -55,8 +55,8 @@ int as10x_cmd_add_PID_filter(as10x_handle_t *phandle,
55 pcmd->body.add_pid_filter.req.idx = 0xFF; 55 pcmd->body.add_pid_filter.req.idx = 0xFF;
56 56
57 /* send command */ 57 /* send command */
58 if (phandle->ops->xfer_cmd) { 58 if (adap->ops->xfer_cmd) {
59 error = phandle->ops->xfer_cmd(phandle, (uint8_t *) pcmd, 59 error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
60 sizeof(pcmd->body.add_pid_filter.req) 60 sizeof(pcmd->body.add_pid_filter.req)
61 + HEADER_SIZE, (uint8_t *) prsp, 61 + HEADER_SIZE, (uint8_t *) prsp,
62 sizeof(prsp->body.add_pid_filter.rsp) 62 sizeof(prsp->body.add_pid_filter.rsp)
@@ -83,12 +83,12 @@ out:
83 83
84/** 84/**
85 * as10x_cmd_del_PID_filter - Send delete filter command to AS10x 85 * as10x_cmd_del_PID_filter - Send delete filter command to AS10x
86 * @phandle: pointer to AS10x handle 86 * @adap: pointer to AS10x bus adapte
87 * @pid_value: PID to delete 87 * @pid_value: PID to delete
88 * 88 *
89 * Return 0 on success or negative value in case of error. 89 * Return 0 on success or negative value in case of error.
90 */ 90 */
91int as10x_cmd_del_PID_filter(as10x_handle_t *phandle, 91int as10x_cmd_del_PID_filter(struct as10x_bus_adapter_t *adap,
92 uint16_t pid_value) 92 uint16_t pid_value)
93{ 93{
94 int error; 94 int error;
@@ -96,11 +96,11 @@ int as10x_cmd_del_PID_filter(as10x_handle_t *phandle,
96 96
97 ENTER(); 97 ENTER();
98 98
99 pcmd = phandle->cmd; 99 pcmd = adap->cmd;
100 prsp = phandle->rsp; 100 prsp = adap->rsp;
101 101
102 /* prepare command */ 102 /* prepare command */
103 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 103 as10x_cmd_build(pcmd, (++adap->cmd_xid),
104 sizeof(pcmd->body.del_pid_filter.req)); 104 sizeof(pcmd->body.del_pid_filter.req));
105 105
106 /* fill command */ 106 /* fill command */
@@ -109,8 +109,8 @@ int as10x_cmd_del_PID_filter(as10x_handle_t *phandle,
109 pcmd->body.del_pid_filter.req.pid = cpu_to_le16(pid_value); 109 pcmd->body.del_pid_filter.req.pid = cpu_to_le16(pid_value);
110 110
111 /* send command */ 111 /* send command */
112 if (phandle->ops->xfer_cmd) { 112 if (adap->ops->xfer_cmd) {
113 error = phandle->ops->xfer_cmd(phandle, (uint8_t *) pcmd, 113 error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
114 sizeof(pcmd->body.del_pid_filter.req) 114 sizeof(pcmd->body.del_pid_filter.req)
115 + HEADER_SIZE, (uint8_t *) prsp, 115 + HEADER_SIZE, (uint8_t *) prsp,
116 sizeof(prsp->body.del_pid_filter.rsp) 116 sizeof(prsp->body.del_pid_filter.rsp)
@@ -132,22 +132,22 @@ out:
132 132
133/** 133/**
134 * as10x_cmd_start_streaming - Send start streaming command to AS10x 134 * as10x_cmd_start_streaming - Send start streaming command to AS10x
135 * @phandle: pointer to AS10x handle 135 * @adap: pointer to AS10x bus adapter
136 * 136 *
137 * Return 0 on success or negative value in case of error. 137 * Return 0 on success or negative value in case of error.
138 */ 138 */
139int as10x_cmd_start_streaming(as10x_handle_t *phandle) 139int as10x_cmd_start_streaming(struct as10x_bus_adapter_t *adap)
140{ 140{
141 int error; 141 int error;
142 struct as10x_cmd_t *pcmd, *prsp; 142 struct as10x_cmd_t *pcmd, *prsp;
143 143
144 ENTER(); 144 ENTER();
145 145
146 pcmd = phandle->cmd; 146 pcmd = adap->cmd;
147 prsp = phandle->rsp; 147 prsp = adap->rsp;
148 148
149 /* prepare command */ 149 /* prepare command */
150 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 150 as10x_cmd_build(pcmd, (++adap->cmd_xid),
151 sizeof(pcmd->body.start_streaming.req)); 151 sizeof(pcmd->body.start_streaming.req));
152 152
153 /* fill command */ 153 /* fill command */
@@ -155,8 +155,8 @@ int as10x_cmd_start_streaming(as10x_handle_t *phandle)
155 cpu_to_le16(CONTROL_PROC_START_STREAMING); 155 cpu_to_le16(CONTROL_PROC_START_STREAMING);
156 156
157 /* send command */ 157 /* send command */
158 if (phandle->ops->xfer_cmd) { 158 if (adap->ops->xfer_cmd) {
159 error = phandle->ops->xfer_cmd(phandle, (uint8_t *) pcmd, 159 error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
160 sizeof(pcmd->body.start_streaming.req) 160 sizeof(pcmd->body.start_streaming.req)
161 + HEADER_SIZE, (uint8_t *) prsp, 161 + HEADER_SIZE, (uint8_t *) prsp,
162 sizeof(prsp->body.start_streaming.rsp) 162 sizeof(prsp->body.start_streaming.rsp)
@@ -178,22 +178,22 @@ out:
178 178
179/** 179/**
180 * as10x_cmd_stop_streaming - Send stop streaming command to AS10x 180 * as10x_cmd_stop_streaming - Send stop streaming command to AS10x
181 * @phandle: pointer to AS10x handle 181 * @adap: pointer to AS10x bus adapter
182 * 182 *
183 * Return 0 on success or negative value in case of error. 183 * Return 0 on success or negative value in case of error.
184 */ 184 */
185int as10x_cmd_stop_streaming(as10x_handle_t *phandle) 185int as10x_cmd_stop_streaming(struct as10x_bus_adapter_t *adap)
186{ 186{
187 int8_t error; 187 int8_t error;
188 struct as10x_cmd_t *pcmd, *prsp; 188 struct as10x_cmd_t *pcmd, *prsp;
189 189
190 ENTER(); 190 ENTER();
191 191
192 pcmd = phandle->cmd; 192 pcmd = adap->cmd;
193 prsp = phandle->rsp; 193 prsp = adap->rsp;
194 194
195 /* prepare command */ 195 /* prepare command */
196 as10x_cmd_build(pcmd, (++phandle->cmd_xid), 196 as10x_cmd_build(pcmd, (++adap->cmd_xid),
197 sizeof(pcmd->body.stop_streaming.req)); 197 sizeof(pcmd->body.stop_streaming.req));
198 198
199 /* fill command */ 199 /* fill command */
@@ -201,8 +201,8 @@ int as10x_cmd_stop_streaming(as10x_handle_t *phandle)
201 cpu_to_le16(CONTROL_PROC_STOP_STREAMING); 201 cpu_to_le16(CONTROL_PROC_STOP_STREAMING);
202 202
203 /* send command */ 203 /* send command */
204 if (phandle->ops->xfer_cmd) { 204 if (adap->ops->xfer_cmd) {
205 error = phandle->ops->xfer_cmd(phandle, (uint8_t *) pcmd, 205 error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
206 sizeof(pcmd->body.stop_streaming.req) 206 sizeof(pcmd->body.stop_streaming.req)
207 + HEADER_SIZE, (uint8_t *) prsp, 207 + HEADER_SIZE, (uint8_t *) prsp,
208 sizeof(prsp->body.stop_streaming.rsp) 208 sizeof(prsp->body.stop_streaming.rsp)
diff --git a/drivers/staging/media/as102/as10x_handle.h b/drivers/staging/media/as102/as10x_handle.h
index 4f01a76e982..62b9795ee42 100644
--- a/drivers/staging/media/as102/as10x_handle.h
+++ b/drivers/staging/media/as102/as10x_handle.h
@@ -17,41 +17,37 @@
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 18 */
19#ifdef __KERNEL__ 19#ifdef __KERNEL__
20struct as102_bus_adapter_t; 20struct as10x_bus_adapter_t;
21struct as102_dev_t; 21struct as102_dev_t;
22 22
23#define as10x_handle_t struct as102_bus_adapter_t
24#include "as10x_cmd.h" 23#include "as10x_cmd.h"
25 24
26/* values for "mode" field */ 25/* values for "mode" field */
27#define REGMODE8 8 26#define REGMODE8 8
28#define REGMODE16 16 27#define REGMODE16 16
29#define REGMODE32 32 28#define REGMODE32 32
30 29
31struct as102_priv_ops_t { 30struct as102_priv_ops_t {
32 int (*upload_fw_pkt) (struct as102_bus_adapter_t *bus_adap, 31 int (*upload_fw_pkt) (struct as10x_bus_adapter_t *bus_adap,
33 unsigned char *buf, int buflen, int swap32); 32 unsigned char *buf, int buflen, int swap32);
34 33
35 int (*send_cmd) (struct as102_bus_adapter_t *bus_adap, 34 int (*send_cmd) (struct as10x_bus_adapter_t *bus_adap,
36 unsigned char *buf, int buflen); 35 unsigned char *buf, int buflen);
37 36
38 int (*xfer_cmd) (struct as102_bus_adapter_t *bus_adap, 37 int (*xfer_cmd) (struct as10x_bus_adapter_t *bus_adap,
39 unsigned char *send_buf, int send_buf_len, 38 unsigned char *send_buf, int send_buf_len,
40 unsigned char *recv_buf, int recv_buf_len); 39 unsigned char *recv_buf, int recv_buf_len);
41/* 40
42 int (*pid_filter) (struct as102_bus_adapter_t *bus_adap,
43 int index, u16 pid, int onoff);
44*/
45 int (*start_stream) (struct as102_dev_t *dev); 41 int (*start_stream) (struct as102_dev_t *dev);
46 void (*stop_stream) (struct as102_dev_t *dev); 42 void (*stop_stream) (struct as102_dev_t *dev);
47 43
48 int (*reset_target) (struct as102_bus_adapter_t *bus_adap); 44 int (*reset_target) (struct as10x_bus_adapter_t *bus_adap);
49 45
50 int (*read_write)(struct as102_bus_adapter_t *bus_adap, uint8_t mode, 46 int (*read_write)(struct as10x_bus_adapter_t *bus_adap, uint8_t mode,
51 uint32_t rd_addr, uint16_t rd_len, 47 uint32_t rd_addr, uint16_t rd_len,
52 uint32_t wr_addr, uint16_t wr_len); 48 uint32_t wr_addr, uint16_t wr_len);
53 49
54 int (*as102_read_ep2) (struct as102_bus_adapter_t *bus_adap, 50 int (*as102_read_ep2) (struct as10x_bus_adapter_t *bus_adap,
55 unsigned char *recv_buf, 51 unsigned char *recv_buf,
56 int recv_buf_len); 52 int recv_buf_len);
57}; 53};
diff --git a/drivers/staging/media/as102/as10x_types.h b/drivers/staging/media/as102/as10x_types.h
index 3dedb3c1420..fde8140ae88 100644
--- a/drivers/staging/media/as102/as10x_types.h
+++ b/drivers/staging/media/as102/as10x_types.h
@@ -26,173 +26,169 @@
26/*********************************/ 26/*********************************/
27 27
28/* bandwidth constant values */ 28/* bandwidth constant values */
29#define BW_5_MHZ 0x00 29#define BW_5_MHZ 0x00
30#define BW_6_MHZ 0x01 30#define BW_6_MHZ 0x01
31#define BW_7_MHZ 0x02 31#define BW_7_MHZ 0x02
32#define BW_8_MHZ 0x03 32#define BW_8_MHZ 0x03
33 33
34/* hierarchy priority selection values */ 34/* hierarchy priority selection values */
35#define HIER_NO_PRIORITY 0x00 35#define HIER_NO_PRIORITY 0x00
36#define HIER_LOW_PRIORITY 0x01 36#define HIER_LOW_PRIORITY 0x01
37#define HIER_HIGH_PRIORITY 0x02 37#define HIER_HIGH_PRIORITY 0x02
38 38
39/* constellation available values */ 39/* constellation available values */
40#define CONST_QPSK 0x00 40#define CONST_QPSK 0x00
41#define CONST_QAM16 0x01 41#define CONST_QAM16 0x01
42#define CONST_QAM64 0x02 42#define CONST_QAM64 0x02
43#define CONST_UNKNOWN 0xFF 43#define CONST_UNKNOWN 0xFF
44 44
45/* hierarchy available values */ 45/* hierarchy available values */
46#define HIER_NONE 0x00 46#define HIER_NONE 0x00
47#define HIER_ALPHA_1 0x01 47#define HIER_ALPHA_1 0x01
48#define HIER_ALPHA_2 0x02 48#define HIER_ALPHA_2 0x02
49#define HIER_ALPHA_4 0x03 49#define HIER_ALPHA_4 0x03
50#define HIER_UNKNOWN 0xFF 50#define HIER_UNKNOWN 0xFF
51 51
52/* interleaving available values */ 52/* interleaving available values */
53#define INTLV_NATIVE 0x00 53#define INTLV_NATIVE 0x00
54#define INTLV_IN_DEPTH 0x01 54#define INTLV_IN_DEPTH 0x01
55#define INTLV_UNKNOWN 0xFF 55#define INTLV_UNKNOWN 0xFF
56 56
57/* code rate available values */ 57/* code rate available values */
58#define CODE_RATE_1_2 0x00 58#define CODE_RATE_1_2 0x00
59#define CODE_RATE_2_3 0x01 59#define CODE_RATE_2_3 0x01
60#define CODE_RATE_3_4 0x02 60#define CODE_RATE_3_4 0x02
61#define CODE_RATE_5_6 0x03 61#define CODE_RATE_5_6 0x03
62#define CODE_RATE_7_8 0x04 62#define CODE_RATE_7_8 0x04
63#define CODE_RATE_UNKNOWN 0xFF 63#define CODE_RATE_UNKNOWN 0xFF
64 64
65/* guard interval available values */ 65/* guard interval available values */
66#define GUARD_INT_1_32 0x00 66#define GUARD_INT_1_32 0x00
67#define GUARD_INT_1_16 0x01 67#define GUARD_INT_1_16 0x01
68#define GUARD_INT_1_8 0x02 68#define GUARD_INT_1_8 0x02
69#define GUARD_INT_1_4 0x03 69#define GUARD_INT_1_4 0x03
70#define GUARD_UNKNOWN 0xFF 70#define GUARD_UNKNOWN 0xFF
71 71
72/* transmission mode available values */ 72/* transmission mode available values */
73#define TRANS_MODE_2K 0x00 73#define TRANS_MODE_2K 0x00
74#define TRANS_MODE_8K 0x01 74#define TRANS_MODE_8K 0x01
75#define TRANS_MODE_4K 0x02 75#define TRANS_MODE_4K 0x02
76#define TRANS_MODE_UNKNOWN 0xFF 76#define TRANS_MODE_UNKNOWN 0xFF
77 77
78/* DVBH signalling available values */ 78/* DVBH signalling available values */
79#define TIMESLICING_PRESENT 0x01 79#define TIMESLICING_PRESENT 0x01
80#define MPE_FEC_PRESENT 0x02 80#define MPE_FEC_PRESENT 0x02
81 81
82/* tune state available */ 82/* tune state available */
83#define TUNE_STATUS_NOT_TUNED 0x00 83#define TUNE_STATUS_NOT_TUNED 0x00
84#define TUNE_STATUS_IDLE 0x01 84#define TUNE_STATUS_IDLE 0x01
85#define TUNE_STATUS_LOCKING 0x02 85#define TUNE_STATUS_LOCKING 0x02
86#define TUNE_STATUS_SIGNAL_DVB_OK 0x03 86#define TUNE_STATUS_SIGNAL_DVB_OK 0x03
87#define TUNE_STATUS_STREAM_DETECTED 0x04 87#define TUNE_STATUS_STREAM_DETECTED 0x04
88#define TUNE_STATUS_STREAM_TUNED 0x05 88#define TUNE_STATUS_STREAM_TUNED 0x05
89#define TUNE_STATUS_ERROR 0xFF 89#define TUNE_STATUS_ERROR 0xFF
90 90
91/* available TS FID filter types */ 91/* available TS FID filter types */
92#define TS_PID_TYPE_TS 0 92#define TS_PID_TYPE_TS 0
93#define TS_PID_TYPE_PSI_SI 1 93#define TS_PID_TYPE_PSI_SI 1
94#define TS_PID_TYPE_MPE 2 94#define TS_PID_TYPE_MPE 2
95 95
96/* number of echos available */ 96/* number of echos available */
97#define MAX_ECHOS 15 97#define MAX_ECHOS 15
98 98
99/* Context types */ 99/* Context types */
100#define CONTEXT_LNA 1010 100#define CONTEXT_LNA 1010
101#define CONTEXT_ELNA_HYSTERESIS 4003 101#define CONTEXT_ELNA_HYSTERESIS 4003
102#define CONTEXT_ELNA_GAIN 4004 102#define CONTEXT_ELNA_GAIN 4004
103#define CONTEXT_MER_THRESHOLD 5005 103#define CONTEXT_MER_THRESHOLD 5005
104#define CONTEXT_MER_OFFSET 5006 104#define CONTEXT_MER_OFFSET 5006
105#define CONTEXT_IR_STATE 7000 105#define CONTEXT_IR_STATE 7000
106#define CONTEXT_TSOUT_MSB_FIRST 7004 106#define CONTEXT_TSOUT_MSB_FIRST 7004
107#define CONTEXT_TSOUT_FALLING_EDGE 7005 107#define CONTEXT_TSOUT_FALLING_EDGE 7005
108 108
109/* Configuration modes */ 109/* Configuration modes */
110#define CFG_MODE_ON 0 110#define CFG_MODE_ON 0
111#define CFG_MODE_OFF 1 111#define CFG_MODE_OFF 1
112#define CFG_MODE_AUTO 2 112#define CFG_MODE_AUTO 2
113 113
114#pragma pack(1)
115struct as10x_tps { 114struct as10x_tps {
116 uint8_t constellation; 115 uint8_t modulation;
117 uint8_t hierarchy; 116 uint8_t hierarchy;
118 uint8_t interleaving_mode; 117 uint8_t interleaving_mode;
119 uint8_t code_rate_HP; 118 uint8_t code_rate_HP;
120 uint8_t code_rate_LP; 119 uint8_t code_rate_LP;
121 uint8_t guard_interval; 120 uint8_t guard_interval;
122 uint8_t transmission_mode; 121 uint8_t transmission_mode;
123 uint8_t DVBH_mask_HP; 122 uint8_t DVBH_mask_HP;
124 uint8_t DVBH_mask_LP; 123 uint8_t DVBH_mask_LP;
125 uint16_t cell_ID; 124 uint16_t cell_ID;
126}; 125} __packed;
127 126
128struct as10x_tune_args { 127struct as10x_tune_args {
129 /* frequency */ 128 /* frequency */
130 uint32_t freq; 129 uint32_t freq;
131 /* bandwidth */ 130 /* bandwidth */
132 uint8_t bandwidth; 131 uint8_t bandwidth;
133 /* hierarchy selection */ 132 /* hierarchy selection */
134 uint8_t hier_select; 133 uint8_t hier_select;
135 /* constellation */ 134 /* constellation */
136 uint8_t constellation; 135 uint8_t modulation;
137 /* hierarchy */ 136 /* hierarchy */
138 uint8_t hierarchy; 137 uint8_t hierarchy;
139 /* interleaving mode */ 138 /* interleaving mode */
140 uint8_t interleaving_mode; 139 uint8_t interleaving_mode;
141 /* code rate */ 140 /* code rate */
142 uint8_t code_rate; 141 uint8_t code_rate;
143 /* guard interval */ 142 /* guard interval */
144 uint8_t guard_interval; 143 uint8_t guard_interval;
145 /* transmission mode */ 144 /* transmission mode */
146 uint8_t transmission_mode; 145 uint8_t transmission_mode;
147}; 146} __packed;
148 147
149struct as10x_tune_status { 148struct as10x_tune_status {
150 /* tune status */ 149 /* tune status */
151 uint8_t tune_state; 150 uint8_t tune_state;
152 /* signal strength */ 151 /* signal strength */
153 int16_t signal_strength; 152 int16_t signal_strength;
154 /* packet error rate 10^-4 */ 153 /* packet error rate 10^-4 */
155 uint16_t PER; 154 uint16_t PER;
156 /* bit error rate 10^-4 */ 155 /* bit error rate 10^-4 */
157 uint16_t BER; 156 uint16_t BER;
158}; 157} __packed;
159 158
160struct as10x_demod_stats { 159struct as10x_demod_stats {
161 /* frame counter */ 160 /* frame counter */
162 uint32_t frame_count; 161 uint32_t frame_count;
163 /* Bad frame counter */ 162 /* Bad frame counter */
164 uint32_t bad_frame_count; 163 uint32_t bad_frame_count;
165 /* Number of wrong bytes fixed by Reed-Solomon */ 164 /* Number of wrong bytes fixed by Reed-Solomon */
166 uint32_t bytes_fixed_by_rs; 165 uint32_t bytes_fixed_by_rs;
167 /* Averaged MER */ 166 /* Averaged MER */
168 uint16_t mer; 167 uint16_t mer;
169 /* statistics calculation state indicator (started or not) */ 168 /* statistics calculation state indicator (started or not) */
170 uint8_t has_started; 169 uint8_t has_started;
171}; 170} __packed;
172 171
173struct as10x_ts_filter { 172struct as10x_ts_filter {
174 uint16_t pid; /** valid PID value 0x00 : 0x2000 */ 173 uint16_t pid; /* valid PID value 0x00 : 0x2000 */
175 uint8_t type; /** Red TS_PID_TYPE_<N> values */ 174 uint8_t type; /* Red TS_PID_TYPE_<N> values */
176 uint8_t idx; /** index in filtering table */ 175 uint8_t idx; /* index in filtering table */
177}; 176} __packed;
178 177
179struct as10x_register_value { 178struct as10x_register_value {
180 uint8_t mode; 179 uint8_t mode;
181 union { 180 union {
182 uint8_t value8; /* 8 bit value */ 181 uint8_t value8; /* 8 bit value */
183 uint16_t value16; /* 16 bit value */ 182 uint16_t value16; /* 16 bit value */
184 uint32_t value32; /* 32 bit value */ 183 uint32_t value32; /* 32 bit value */
185 }u; 184 } u;
186}; 185} __packed;
187
188#pragma pack()
189 186
190struct as10x_register_addr { 187struct as10x_register_addr {
191 /* register addr */ 188 /* register addr */
192 uint32_t addr; 189 uint32_t addr;
193 /* register mode access */ 190 /* register mode access */
194 uint8_t mode; 191 uint8_t mode;
195}; 192};
196 193
197
198#endif 194#endif
diff --git a/drivers/staging/media/dt3155v4l/dt3155v4l.c b/drivers/staging/media/dt3155v4l/dt3155v4l.c
index 04e93c49f03..280c84ec4cc 100644
--- a/drivers/staging/media/dt3155v4l/dt3155v4l.c
+++ b/drivers/staging/media/dt3155v4l/dt3155v4l.c
@@ -218,9 +218,10 @@ dt3155_start_acq(struct dt3155_priv *pd)
218 * driver-specific callbacks (vb2_ops) 218 * driver-specific callbacks (vb2_ops)
219 */ 219 */
220static int 220static int
221dt3155_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, 221dt3155_queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
222 unsigned int *num_planes, unsigned long sizes[], 222 unsigned int *num_buffers, unsigned int *num_planes,
223 void *alloc_ctxs[]) 223 unsigned int sizes[], void *alloc_ctxs[])
224
224{ 225{
225 struct dt3155_priv *pd = vb2_get_drv_priv(q); 226 struct dt3155_priv *pd = vb2_get_drv_priv(q);
226 void *ret; 227 void *ret;
@@ -262,12 +263,6 @@ dt3155_buf_prepare(struct vb2_buffer *vb)
262} 263}
263 264
264static int 265static int
265dt3155_start_streaming(struct vb2_queue *q)
266{
267 return 0;
268}
269
270static int
271dt3155_stop_streaming(struct vb2_queue *q) 266dt3155_stop_streaming(struct vb2_queue *q)
272{ 267{
273 struct dt3155_priv *pd = vb2_get_drv_priv(q); 268 struct dt3155_priv *pd = vb2_get_drv_priv(q);
@@ -308,7 +303,6 @@ const struct vb2_ops q_ops = {
308 .wait_prepare = dt3155_wait_prepare, 303 .wait_prepare = dt3155_wait_prepare,
309 .wait_finish = dt3155_wait_finish, 304 .wait_finish = dt3155_wait_finish,
310 .buf_prepare = dt3155_buf_prepare, 305 .buf_prepare = dt3155_buf_prepare,
311 .start_streaming = dt3155_start_streaming,
312 .stop_streaming = dt3155_stop_streaming, 306 .stop_streaming = dt3155_stop_streaming,
313 .buf_queue = dt3155_buf_queue, 307 .buf_queue = dt3155_buf_queue,
314}; 308};
@@ -914,9 +908,10 @@ dt3155_probe(struct pci_dev *pdev, const struct pci_device_id *id)
914 if (err) 908 if (err)
915 goto err_req_region; 909 goto err_req_region;
916 pd->regs = pci_iomap(pdev, 0, pci_resource_len(pd->pdev, 0)); 910 pd->regs = pci_iomap(pdev, 0, pci_resource_len(pd->pdev, 0));
917 if (!pd->regs) 911 if (!pd->regs) {
918 err = -ENOMEM; 912 err = -ENOMEM;
919 goto err_pci_iomap; 913 goto err_pci_iomap;
914 }
920 err = dt3155_init_board(pdev); 915 err = dt3155_init_board(pdev);
921 if (err) 916 if (err)
922 goto err_init_board; 917 goto err_init_board;
diff --git a/drivers/staging/media/easycap/easycap.h b/drivers/staging/media/easycap/easycap.h
index 7b256a948c2..a007e7442be 100644
--- a/drivers/staging/media/easycap/easycap.h
+++ b/drivers/staging/media/easycap/easycap.h
@@ -98,7 +98,6 @@
98#define EASYCAP_DRIVER_VERSION "0.9.01" 98#define EASYCAP_DRIVER_VERSION "0.9.01"
99#define EASYCAP_DRIVER_DESCRIPTION "easycapdc60" 99#define EASYCAP_DRIVER_DESCRIPTION "easycapdc60"
100 100
101#define USB_SKEL_MINOR_BASE 192
102#define DONGLE_MANY 8 101#define DONGLE_MANY 8
103#define INPUT_MANY 6 102#define INPUT_MANY 6
104/*---------------------------------------------------------------------------*/ 103/*---------------------------------------------------------------------------*/
@@ -324,8 +323,6 @@ struct easycap {
324 int lost[INPUT_MANY]; 323 int lost[INPUT_MANY];
325 int merit[180]; 324 int merit[180];
326 325
327 long long int dnbydt;
328
329 int video_interface; 326 int video_interface;
330 int video_altsetting_on; 327 int video_altsetting_on;
331 int video_altsetting_off; 328 int video_altsetting_off;
@@ -353,7 +350,6 @@ struct easycap {
353 u8 *pcache; 350 u8 *pcache;
354 int video_mt; 351 int video_mt;
355 int audio_mt; 352 int audio_mt;
356 long long audio_bytes;
357 u32 isequence; 353 u32 isequence;
358 354
359 int vma_many; 355 int vma_many;
@@ -450,9 +446,6 @@ struct easycap {
450 * SOUND PROPERTIES 446 * SOUND PROPERTIES
451 */ 447 */
452/*---------------------------------------------------------------------------*/ 448/*---------------------------------------------------------------------------*/
453
454 int audio_buffer_many;
455
456 int allocation_audio_urb; 449 int allocation_audio_urb;
457 int allocation_audio_page; 450 int allocation_audio_page;
458 int allocation_audio_struct; 451 int allocation_audio_struct;
@@ -469,72 +462,53 @@ struct easycap {
469 * VIDEO FUNCTION PROTOTYPES 462 * VIDEO FUNCTION PROTOTYPES
470 */ 463 */
471/*^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^*/ 464/*^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^*/
465int easycap_newinput(struct easycap *, int);
466void easycap_testcard(struct easycap *, int);
467int easycap_isdongle(struct easycap *);
468
472long easycap_unlocked_ioctl(struct file *, unsigned int, unsigned long); 469long easycap_unlocked_ioctl(struct file *, unsigned int, unsigned long);
473int easycap_dqbuf(struct easycap *, int); 470
474int submit_video_urbs(struct easycap *); 471int easycap_video_dqbuf(struct easycap *, int);
475int kill_video_urbs(struct easycap *); 472int easycap_video_submit_urbs(struct easycap *);
476int field2frame(struct easycap *); 473int easycap_video_kill_urbs(struct easycap *);
477int redaub(struct easycap *, void *, void *, 474int easycap_video_fillin_formats(void);
478 int, int, u8, u8, bool); 475
479void easycap_testcard(struct easycap *, int); 476int adjust_standard(struct easycap *, v4l2_std_id);
480int fillin_formats(void); 477int adjust_format(struct easycap *, u32, u32, u32, int, bool);
481int newinput(struct easycap *, int); 478int adjust_brightness(struct easycap *, int);
482int adjust_standard(struct easycap *, v4l2_std_id); 479int adjust_contrast(struct easycap *, int);
483int adjust_format(struct easycap *, u32, u32, u32, 480int adjust_saturation(struct easycap *, int);
484 int, bool); 481int adjust_hue(struct easycap *, int);
485int adjust_brightness(struct easycap *, int);
486int adjust_contrast(struct easycap *, int);
487int adjust_saturation(struct easycap *, int);
488int adjust_hue(struct easycap *, int);
489int adjust_volume(struct easycap *, int);
490/*---------------------------------------------------------------------------*/ 482/*---------------------------------------------------------------------------*/
491/* 483/*
492 * AUDIO FUNCTION PROTOTYPES 484 * AUDIO FUNCTION PROTOTYPES
493 */ 485 */
494/*---------------------------------------------------------------------------*/ 486/*---------------------------------------------------------------------------*/
495int easycap_alsa_probe(struct easycap *); 487int easycap_alsa_probe(struct easycap *);
496void easycap_alsa_complete(struct urb *); 488int easycap_audio_kill_urbs(struct easycap *);
497 489void easycap_alsa_complete(struct urb *);
498int easycap_sound_setup(struct easycap *);
499int submit_audio_urbs(struct easycap *);
500int kill_audio_urbs(struct easycap *);
501void easyoss_testtone(struct easycap *, int);
502int audio_setup(struct easycap *);
503/*---------------------------------------------------------------------------*/ 490/*---------------------------------------------------------------------------*/
504/* 491/*
505 * LOW-LEVEL FUNCTION PROTOTYPES 492 * LOW-LEVEL FUNCTION PROTOTYPES
506 */ 493 */
507/*---------------------------------------------------------------------------*/ 494/*---------------------------------------------------------------------------*/
508int audio_gainget(struct usb_device *); 495int easycap_audio_gainset(struct usb_device *, s8);
509int audio_gainset(struct usb_device *, s8); 496int easycap_audio_setup(struct easycap *);
510 497
511int set_interface(struct usb_device *, u16); 498int easycap_wakeup_device(struct usb_device *);
512int wakeup_device(struct usb_device *);
513int confirm_resolution(struct usb_device *);
514int confirm_stream(struct usb_device *);
515 499
516int setup_stk(struct usb_device *, bool); 500int setup_stk(struct usb_device *, bool);
517int setup_saa(struct usb_device *, bool); 501int setup_saa(struct usb_device *, bool);
518int setup_vt(struct usb_device *); 502int ready_saa(struct usb_device *);
519int check_stk(struct usb_device *, bool); 503int merit_saa(struct usb_device *);
520int check_saa(struct usb_device *, bool); 504int check_vt(struct usb_device *);
521int ready_saa(struct usb_device *); 505int select_input(struct usb_device *, int, int);
522int merit_saa(struct usb_device *); 506int set_resolution(struct usb_device *, u16, u16, u16, u16);
523int check_vt(struct usb_device *);
524int select_input(struct usb_device *, int, int);
525int set_resolution(struct usb_device *,
526 u16, u16, u16, u16);
527 507
528int read_saa(struct usb_device *, u16); 508int read_saa(struct usb_device *, u16);
529int read_stk(struct usb_device *, u32); 509int write_saa(struct usb_device *, u16, u16);
530int write_saa(struct usb_device *, u16, u16); 510int start_100(struct usb_device *);
531int write_000(struct usb_device *, u16, u16); 511int stop_100(struct usb_device *);
532int start_100(struct usb_device *);
533int stop_100(struct usb_device *);
534int write_300(struct usb_device *);
535int read_vt(struct usb_device *, u16);
536int write_vt(struct usb_device *, u16, u16);
537int isdongle(struct easycap *);
538/*---------------------------------------------------------------------------*/ 512/*---------------------------------------------------------------------------*/
539 513
540 514
@@ -588,7 +562,6 @@ extern bool easycap_readback;
588extern const struct easycap_standard easycap_standard[]; 562extern const struct easycap_standard easycap_standard[];
589extern struct easycap_format easycap_format[]; 563extern struct easycap_format easycap_format[];
590extern struct v4l2_queryctrl easycap_control[]; 564extern struct v4l2_queryctrl easycap_control[];
591extern struct usb_driver easycap_usb_driver;
592extern struct easycap_dongle easycapdc60_dongle[]; 565extern struct easycap_dongle easycapdc60_dongle[];
593 566
594#endif /* !__EASYCAP_H__ */ 567#endif /* !__EASYCAP_H__ */
diff --git a/drivers/staging/media/easycap/easycap_ioctl.c b/drivers/staging/media/easycap/easycap_ioctl.c
index c99addfb624..9413b37490c 100644
--- a/drivers/staging/media/easycap/easycap_ioctl.c
+++ b/drivers/staging/media/easycap/easycap_ioctl.c
@@ -25,7 +25,6 @@
25*/ 25*/
26/*****************************************************************************/ 26/*****************************************************************************/
27 27
28#include <linux/version.h>
29#include "easycap.h" 28#include "easycap.h"
30 29
31/*--------------------------------------------------------------------------*/ 30/*--------------------------------------------------------------------------*/
@@ -125,7 +124,7 @@ int adjust_standard(struct easycap *peasycap, v4l2_std_id std_id)
125 } 124 }
126 if (peasycap->video_isoc_streaming) { 125 if (peasycap->video_isoc_streaming) {
127 resubmit = true; 126 resubmit = true;
128 kill_video_urbs(peasycap); 127 easycap_video_kill_urbs(peasycap);
129 } else 128 } else
130 resubmit = false; 129 resubmit = false;
131/*--------------------------------------------------------------------------*/ 130/*--------------------------------------------------------------------------*/
@@ -331,7 +330,7 @@ int adjust_standard(struct easycap *peasycap, v4l2_std_id std_id)
331 "from 0x%02X to 0x%02X\n", reg, itwas, isnow); 330 "from 0x%02X to 0x%02X\n", reg, itwas, isnow);
332 } 331 }
333 if (resubmit) 332 if (resubmit)
334 submit_video_urbs(peasycap); 333 easycap_video_submit_urbs(peasycap);
335 return 0; 334 return 0;
336} 335}
337/*****************************************************************************/ 336/*****************************************************************************/
@@ -558,7 +557,7 @@ int adjust_format(struct easycap *peasycap,
558 peasycap->bytesperpixel * peasycap->width * peasycap->height; 557 peasycap->bytesperpixel * peasycap->width * peasycap->height;
559 if (peasycap->video_isoc_streaming) { 558 if (peasycap->video_isoc_streaming) {
560 resubmit = true; 559 resubmit = true;
561 kill_video_urbs(peasycap); 560 easycap_video_kill_urbs(peasycap);
562 } else 561 } else
563 resubmit = false; 562 resubmit = false;
564/*---------------------------------------------------------------------------*/ 563/*---------------------------------------------------------------------------*/
@@ -622,7 +621,7 @@ int adjust_format(struct easycap *peasycap,
622 } 621 }
623/*---------------------------------------------------------------------------*/ 622/*---------------------------------------------------------------------------*/
624 if (resubmit) 623 if (resubmit)
625 submit_video_urbs(peasycap); 624 easycap_video_submit_urbs(peasycap);
626 625
627 return peasycap_best_format - easycap_format; 626 return peasycap_best_format - easycap_format;
628} 627}
@@ -667,16 +666,15 @@ int adjust_brightness(struct easycap *peasycap, int value)
667 peasycap->inputset[peasycap->input].brightness_ok = 1; 666 peasycap->inputset[peasycap->input].brightness_ok = 1;
668 } else 667 } else
669 JOM(8, "%i=peasycap->input\n", peasycap->input); 668 JOM(8, "%i=peasycap->input\n", peasycap->input);
669
670 mood = 0x00FF & (unsigned int)peasycap->brightness; 670 mood = 0x00FF & (unsigned int)peasycap->brightness;
671 if (!write_saa(peasycap->pusb_device, 0x0A, mood)) { 671 if (write_saa(peasycap->pusb_device, 0x0A, mood)) {
672 SAM("adjusting brightness to 0x%02X\n", mood);
673 return 0;
674 } else {
675 SAM("WARNING: failed to adjust brightness " 672 SAM("WARNING: failed to adjust brightness "
676 "to 0x%02X\n", mood); 673 "to 0x%02X\n", mood);
677 return -ENOENT; 674 return -ENOENT;
678 } 675 }
679 break; 676 SAM("adjusting brightness to 0x%02X\n", mood);
677 return 0;
680 } 678 }
681 i1++; 679 i1++;
682 } 680 }
@@ -726,15 +724,13 @@ int adjust_contrast(struct easycap *peasycap, int value)
726 JOM(8, "%i=peasycap->input\n", peasycap->input); 724 JOM(8, "%i=peasycap->input\n", peasycap->input);
727 725
728 mood = 0x00FF & (unsigned int) (peasycap->contrast - 128); 726 mood = 0x00FF & (unsigned int) (peasycap->contrast - 128);
729 if (!write_saa(peasycap->pusb_device, 0x0B, mood)) { 727 if (write_saa(peasycap->pusb_device, 0x0B, mood)) {
730 SAM("adjusting contrast to 0x%02X\n", mood);
731 return 0;
732 } else {
733 SAM("WARNING: failed to adjust contrast to " 728 SAM("WARNING: failed to adjust contrast to "
734 "0x%02X\n", mood); 729 "0x%02X\n", mood);
735 return -ENOENT; 730 return -ENOENT;
736 } 731 }
737 break; 732 SAM("adjusting contrast to 0x%02X\n", mood);
733 return 0;
738 } 734 }
739 i1++; 735 i1++;
740 } 736 }
@@ -784,14 +780,13 @@ int adjust_saturation(struct easycap *peasycap, int value)
784 } else 780 } else
785 JOM(8, "%i=peasycap->input\n", peasycap->input); 781 JOM(8, "%i=peasycap->input\n", peasycap->input);
786 mood = 0x00FF & (unsigned int) (peasycap->saturation - 128); 782 mood = 0x00FF & (unsigned int) (peasycap->saturation - 128);
787 if (!write_saa(peasycap->pusb_device, 0x0C, mood)) { 783 if (write_saa(peasycap->pusb_device, 0x0C, mood)) {
788 SAM("adjusting saturation to 0x%02X\n", mood);
789 return 0;
790 } else {
791 SAM("WARNING: failed to adjust saturation to " 784 SAM("WARNING: failed to adjust saturation to "
792 "0x%02X\n", mood); 785 "0x%02X\n", mood);
793 return -ENOENT; 786 return -ENOENT;
794 } 787 }
788 SAM("adjusting saturation to 0x%02X\n", mood);
789 return 0;
795 break; 790 break;
796 } 791 }
797 i1++; 792 i1++;
@@ -839,13 +834,12 @@ int adjust_hue(struct easycap *peasycap, int value)
839 JOM(8, "%i=peasycap->input\n", peasycap->input); 834 JOM(8, "%i=peasycap->input\n", peasycap->input);
840 i2 = peasycap->hue - 128; 835 i2 = peasycap->hue - 128;
841 mood = 0x00FF & ((int) i2); 836 mood = 0x00FF & ((int) i2);
842 if (!write_saa(peasycap->pusb_device, 0x0D, mood)) { 837 if (write_saa(peasycap->pusb_device, 0x0D, mood)) {
843 SAM("adjusting hue to 0x%02X\n", mood);
844 return 0;
845 } else {
846 SAM("WARNING: failed to adjust hue to 0x%02X\n", mood); 838 SAM("WARNING: failed to adjust hue to 0x%02X\n", mood);
847 return -ENOENT; 839 return -ENOENT;
848 } 840 }
841 SAM("adjusting hue to 0x%02X\n", mood);
842 return 0;
849 break; 843 break;
850 } 844 }
851 i1++; 845 i1++;
@@ -854,7 +848,7 @@ int adjust_hue(struct easycap *peasycap, int value)
854 return -ENOENT; 848 return -ENOENT;
855} 849}
856/*****************************************************************************/ 850/*****************************************************************************/
857int adjust_volume(struct easycap *peasycap, int value) 851static int adjust_volume(struct easycap *peasycap, int value)
858{ 852{
859 s8 mood; 853 s8 mood;
860 int i1; 854 int i1;
@@ -885,15 +879,13 @@ int adjust_volume(struct easycap *peasycap, int value)
885 mood = (16 > peasycap->volume) ? 16 : 879 mood = (16 > peasycap->volume) ? 16 :
886 ((31 < peasycap->volume) ? 31 : 880 ((31 < peasycap->volume) ? 31 :
887 (s8) peasycap->volume); 881 (s8) peasycap->volume);
888 if (!audio_gainset(peasycap->pusb_device, mood)) { 882 if (!easycap_audio_gainset(peasycap->pusb_device, mood)) {
889 SAM("adjusting volume to 0x%02X\n", mood);
890 return 0;
891 } else {
892 SAM("WARNING: failed to adjust volume to " 883 SAM("WARNING: failed to adjust volume to "
893 "0x%2X\n", mood); 884 "0x%2X\n", mood);
894 return -ENOENT; 885 return -ENOENT;
895 } 886 }
896 break; 887 SAM("adjusting volume to 0x%02X\n", mood);
888 return 0;
897 } 889 }
898 i1++; 890 i1++;
899 } 891 }
@@ -971,7 +963,7 @@ long easycap_unlocked_ioctl(struct file *file,
971 SAM("ERROR: peasycap->pusb_device is NULL\n"); 963 SAM("ERROR: peasycap->pusb_device is NULL\n");
972 return -EFAULT; 964 return -EFAULT;
973 } 965 }
974 kd = isdongle(peasycap); 966 kd = easycap_isdongle(peasycap);
975 if (0 <= kd && DONGLE_MANY > kd) { 967 if (0 <= kd && DONGLE_MANY > kd) {
976 if (mutex_lock_interruptible(&easycapdc60_dongle[kd].mutex_video)) { 968 if (mutex_lock_interruptible(&easycapdc60_dongle[kd].mutex_video)) {
977 SAY("ERROR: cannot lock " 969 SAY("ERROR: cannot lock "
@@ -986,7 +978,7 @@ long easycap_unlocked_ioctl(struct file *file,
986 * IF NECESSARY, BAIL OUT. 978 * IF NECESSARY, BAIL OUT.
987 */ 979 */
988/*---------------------------------------------------------------------------*/ 980/*---------------------------------------------------------------------------*/
989 if (kd != isdongle(peasycap)) 981 if (kd != easycap_isdongle(peasycap))
990 return -ERESTARTSYS; 982 return -ERESTARTSYS;
991 if (!file) { 983 if (!file) {
992 SAY("ERROR: file is NULL\n"); 984 SAY("ERROR: file is NULL\n");
@@ -1226,7 +1218,7 @@ long easycap_unlocked_ioctl(struct file *file,
1226 return -EINVAL; 1218 return -EINVAL;
1227 } 1219 }
1228 1220
1229 rc = newinput(peasycap, (int)index); 1221 rc = easycap_newinput(peasycap, (int)index);
1230 if (0 == rc) { 1222 if (0 == rc) {
1231 JOM(8, "newinput(.,%i) OK\n", (int)index); 1223 JOM(8, "newinput(.,%i) OK\n", (int)index);
1232 } else { 1224 } else {
@@ -2209,7 +2201,7 @@ long easycap_unlocked_ioctl(struct file *file,
2209 2201
2210 if (!peasycap->polled) { 2202 if (!peasycap->polled) {
2211 do { 2203 do {
2212 rcdq = easycap_dqbuf(peasycap, 0); 2204 rcdq = easycap_video_dqbuf(peasycap, 0);
2213 if (-EIO == rcdq) { 2205 if (-EIO == rcdq) {
2214 JOM(8, "returning -EIO because " 2206 JOM(8, "returning -EIO because "
2215 "dqbuf() returned -EIO\n"); 2207 "dqbuf() returned -EIO\n");
@@ -2313,7 +2305,7 @@ long easycap_unlocked_ioctl(struct file *file,
2313 mutex_unlock(&easycapdc60_dongle[kd].mutex_video); 2305 mutex_unlock(&easycapdc60_dongle[kd].mutex_video);
2314 return -EFAULT; 2306 return -EFAULT;
2315 } 2307 }
2316 submit_video_urbs(peasycap); 2308 easycap_video_submit_urbs(peasycap);
2317 peasycap->video_idle = 0; 2309 peasycap->video_idle = 0;
2318 peasycap->audio_idle = 0; 2310 peasycap->audio_idle = 0;
2319 peasycap->video_eof = 0; 2311 peasycap->video_eof = 0;
diff --git a/drivers/staging/media/easycap/easycap_low.c b/drivers/staging/media/easycap/easycap_low.c
index 0385735ac6d..0380babed22 100644
--- a/drivers/staging/media/easycap/easycap_low.c
+++ b/drivers/staging/media/easycap/easycap_low.c
@@ -40,6 +40,7 @@
40 40
41#include "easycap.h" 41#include "easycap.h"
42 42
43
43#define GET(X, Y, Z) do { \ 44#define GET(X, Y, Z) do { \
44 int __rc; \ 45 int __rc; \
45 *(Z) = (u16)0; \ 46 *(Z) = (u16)0; \
@@ -59,9 +60,9 @@
59 60
60/*--------------------------------------------------------------------------*/ 61/*--------------------------------------------------------------------------*/
61static const struct stk1160config { 62static const struct stk1160config {
62 int reg; 63 u16 reg;
63 int set; 64 u16 set;
64} stk1160configPAL[256] = { 65} stk1160configPAL[] = {
65 {0x000, 0x0098}, 66 {0x000, 0x0098},
66 {0x002, 0x0093}, 67 {0x002, 0x0093},
67 68
@@ -103,7 +104,7 @@ static const struct stk1160config {
103 {0xFFF, 0xFFFF} 104 {0xFFF, 0xFFFF}
104}; 105};
105/*--------------------------------------------------------------------------*/ 106/*--------------------------------------------------------------------------*/
106static const struct stk1160config stk1160configNTSC[256] = { 107static const struct stk1160config stk1160configNTSC[] = {
107 {0x000, 0x0098}, 108 {0x000, 0x0098},
108 {0x002, 0x0093}, 109 {0x002, 0x0093},
109 110
@@ -146,9 +147,9 @@ static const struct stk1160config stk1160configNTSC[256] = {
146}; 147};
147/*--------------------------------------------------------------------------*/ 148/*--------------------------------------------------------------------------*/
148static const struct saa7113config { 149static const struct saa7113config {
149 int reg; 150 u8 reg;
150 int set; 151 u8 set;
151} saa7113configPAL[256] = { 152} saa7113configPAL[] = {
152 {0x01, 0x08}, 153 {0x01, 0x08},
153 {0x02, 0x80}, 154 {0x02, 0x80},
154 {0x03, 0x33}, 155 {0x03, 0x33},
@@ -202,7 +203,7 @@ static const struct saa7113config {
202 {0xFF, 0xFF} 203 {0xFF, 0xFF}
203}; 204};
204/*--------------------------------------------------------------------------*/ 205/*--------------------------------------------------------------------------*/
205static const struct saa7113config saa7113configNTSC[256] = { 206static const struct saa7113config saa7113configNTSC[] = {
206 {0x01, 0x08}, 207 {0x01, 0x08},
207 {0x02, 0x80}, 208 {0x02, 0x80},
208 {0x03, 0x33}, 209 {0x03, 0x33},
@@ -355,101 +356,6 @@ static int wait_i2c(struct usb_device *p)
355} 356}
356 357
357/****************************************************************************/ 358/****************************************************************************/
358int confirm_resolution(struct usb_device *p)
359{
360 u8 get0, get1, get2, get3, get4, get5, get6, get7;
361
362 if (!p)
363 return -ENODEV;
364 GET(p, 0x0110, &get0);
365 GET(p, 0x0111, &get1);
366 GET(p, 0x0112, &get2);
367 GET(p, 0x0113, &get3);
368 GET(p, 0x0114, &get4);
369 GET(p, 0x0115, &get5);
370 GET(p, 0x0116, &get6);
371 GET(p, 0x0117, &get7);
372 JOT(8, "0x%03X, 0x%03X, "
373 "0x%03X, 0x%03X, "
374 "0x%03X, 0x%03X, "
375 "0x%03X, 0x%03X\n",
376 get0, get1, get2, get3, get4, get5, get6, get7);
377 JOT(8, "....cf PAL_720x526: "
378 "0x%03X, 0x%03X, "
379 "0x%03X, 0x%03X, "
380 "0x%03X, 0x%03X, "
381 "0x%03X, 0x%03X\n",
382 0x000, 0x000, 0x001, 0x000, 0x5A0, 0x005, 0x121, 0x001);
383 JOT(8, "....cf PAL_704x526: "
384 "0x%03X, 0x%03X, "
385 "0x%03X, 0x%03X, "
386 "0x%03X, 0x%03X, "
387 "0x%03X, 0x%03X\n",
388 0x004, 0x000, 0x001, 0x000, 0x584, 0x005, 0x121, 0x001);
389 JOT(8, "....cf VGA_640x480: "
390 "0x%03X, 0x%03X, "
391 "0x%03X, 0x%03X, "
392 "0x%03X, 0x%03X, "
393 "0x%03X, 0x%03X\n",
394 0x008, 0x000, 0x020, 0x000, 0x508, 0x005, 0x110, 0x001);
395 return 0;
396}
397/****************************************************************************/
398int confirm_stream(struct usb_device *p)
399{
400 u16 get2;
401 u8 igot;
402
403 if (!p)
404 return -ENODEV;
405 GET(p, 0x0100, &igot); get2 = 0x80 & igot;
406 if (0x80 == get2)
407 JOT(8, "confirm_stream: OK\n");
408 else
409 JOT(8, "confirm_stream: STUCK\n");
410 return 0;
411}
412/****************************************************************************/
413int setup_stk(struct usb_device *p, bool ntsc)
414{
415 int i;
416 const struct stk1160config *cfg;
417 if (!p)
418 return -ENODEV;
419 cfg = (ntsc) ? stk1160configNTSC : stk1160configPAL;
420 for (i = 0; cfg[i].reg != 0xFFF; i++)
421 SET(p, cfg[i].reg, cfg[i].set);
422
423 write_300(p);
424
425 return 0;
426}
427/****************************************************************************/
428int setup_saa(struct usb_device *p, bool ntsc)
429{
430 int i, ir;
431 const struct saa7113config *cfg;
432 if (!p)
433 return -ENODEV;
434 cfg = (ntsc) ? saa7113configNTSC : saa7113configPAL;
435 for (i = 0; cfg[i].reg != 0xFF; i++)
436 ir = write_saa(p, cfg[i].reg, cfg[i].set);
437 return 0;
438}
439/****************************************************************************/
440int write_000(struct usb_device *p, u16 set2, u16 set0)
441{
442 u8 igot0, igot2;
443
444 if (!p)
445 return -ENODEV;
446 GET(p, 0x0002, &igot2);
447 GET(p, 0x0000, &igot0);
448 SET(p, 0x0002, set2);
449 SET(p, 0x0000, set0);
450 return 0;
451}
452/****************************************************************************/
453int write_saa(struct usb_device *p, u16 reg0, u16 set0) 359int write_saa(struct usb_device *p, u16 reg0, u16 set0)
454{ 360{
455 if (!p) 361 if (!p)
@@ -470,8 +376,7 @@ int write_saa(struct usb_device *p, u16 reg0, u16 set0)
470 * REGISTER 504: TARGET ADDRESS ON VT1612A 376 * REGISTER 504: TARGET ADDRESS ON VT1612A
471 */ 377 */
472/*--------------------------------------------------------------------------*/ 378/*--------------------------------------------------------------------------*/
473int 379static int write_vt(struct usb_device *p, u16 reg0, u16 set0)
474write_vt(struct usb_device *p, u16 reg0, u16 set0)
475{ 380{
476 u8 igot; 381 u8 igot;
477 u16 got502, got503; 382 u16 got502, got503;
@@ -508,7 +413,7 @@ write_vt(struct usb_device *p, u16 reg0, u16 set0)
508 * REGISTER 504: TARGET ADDRESS ON VT1612A 413 * REGISTER 504: TARGET ADDRESS ON VT1612A
509 */ 414 */
510/*--------------------------------------------------------------------------*/ 415/*--------------------------------------------------------------------------*/
511int read_vt(struct usb_device *p, u16 reg0) 416static int read_vt(struct usb_device *p, u16 reg0)
512{ 417{
513 u8 igot; 418 u8 igot;
514 u16 got502, got503; 419 u16 got502, got503;
@@ -532,7 +437,7 @@ int read_vt(struct usb_device *p, u16 reg0)
532 * THESE APPEAR TO HAVE NO EFFECT ON EITHER VIDEO OR AUDIO. 437 * THESE APPEAR TO HAVE NO EFFECT ON EITHER VIDEO OR AUDIO.
533 */ 438 */
534/*--------------------------------------------------------------------------*/ 439/*--------------------------------------------------------------------------*/
535int write_300(struct usb_device *p) 440static int write_300(struct usb_device *p)
536{ 441{
537 if (!p) 442 if (!p)
538 return -ENODEV; 443 return -ENODEV;
@@ -545,32 +450,36 @@ int write_300(struct usb_device *p)
545 return 0; 450 return 0;
546} 451}
547/****************************************************************************/ 452/****************************************************************************/
548/*--------------------------------------------------------------------------*/ 453/****************************************************************************/
549/* 454int setup_stk(struct usb_device *p, bool ntsc)
550 * NOTE: THE FOLLOWING IS NOT CHECKED:
551 * REGISTER 0x0F, WHICH IS INVOLVED IN CHROMINANCE AUTOMATIC GAIN CONTROL.
552 */
553/*--------------------------------------------------------------------------*/
554int check_saa(struct usb_device *p, bool ntsc)
555{ 455{
556 int i, ir, rc = 0; 456 int i;
557 struct saa7113config const *cfg; 457 const struct stk1160config *cfg;
558 if (!p) 458 if (!p)
559 return -ENODEV; 459 return -ENODEV;
460 cfg = (ntsc) ? stk1160configNTSC : stk1160configPAL;
461 for (i = 0; cfg[i].reg != 0xFFF; i++)
462 SET(p, cfg[i].reg, cfg[i].set);
463
464 write_300(p);
560 465
561 cfg = (ntsc) ? saa7113configNTSC : saa7113configPAL; 466 return 0;
467}
468/****************************************************************************/
469int setup_saa(struct usb_device *p, bool ntsc)
470{
471 int i, rc;
472 const struct saa7113config *cfg;
473 if (!p)
474 return -ENODEV;
475 cfg = (ntsc) ? saa7113configNTSC : saa7113configPAL;
562 for (i = 0; cfg[i].reg != 0xFF; i++) { 476 for (i = 0; cfg[i].reg != 0xFF; i++) {
563 if (0x0F == cfg[i].reg) 477 rc = write_saa(p, cfg[i].reg, cfg[i].set);
564 continue; 478 if (rc)
565 ir = read_saa(p, cfg[i].reg); 479 dev_err(&p->dev,
566 if (ir != cfg[i].set) { 480 "Failed to set SAA register %d", cfg[i].reg);
567 SAY("SAA register 0x%02X has 0x%02X, expected 0x%02X\n",
568 cfg[i].reg, ir, cfg[i].set);
569 rc--;
570 }
571 } 481 }
572 482 return 0;
573 return (rc < -8) ? rc : 0;
574} 483}
575/****************************************************************************/ 484/****************************************************************************/
576int merit_saa(struct usb_device *p) 485int merit_saa(struct usb_device *p)
@@ -609,60 +518,22 @@ int ready_saa(struct usb_device *p)
609 msleep(marktime); 518 msleep(marktime);
610 j++; 519 j++;
611 } 520 }
521
612 if (max == j) 522 if (max == j)
613 return -1; 523 return -1;
614 else {
615 if (0x20 & rc) {
616 rate = 2;
617 JOT(8, "hardware detects 60 Hz\n");
618 } else {
619 rate = 0;
620 JOT(8, "hardware detects 50 Hz\n");
621 }
622 if (0x80 & rc)
623 JOT(8, "hardware detects interlacing\n");
624 else {
625 rate++;
626 JOT(8, "hardware detects no interlacing\n");
627 }
628 }
629 return 0;
630}
631/****************************************************************************/
632/*--------------------------------------------------------------------------*/
633/*
634 * NOTE: THE FOLLOWING ARE NOT CHECKED:
635 * REGISTERS 0x000, 0x002: FUNCTIONALITY IS NOT KNOWN
636 * REGISTER 0x100: ACCEPT ALSO (0x80 | stk1160config....[.].set)
637 */
638/*--------------------------------------------------------------------------*/
639int check_stk(struct usb_device *p, bool ntsc)
640{
641 int i, ir;
642 const struct stk1160config *cfg;
643
644 if (!p)
645 return -ENODEV;
646 cfg = (ntsc) ? stk1160configNTSC : stk1160configPAL;
647
648 for (i = 0; 0xFFF != cfg[i].reg; i++) {
649 if (0x000 == cfg[i].reg || 0x002 == cfg[i].reg)
650 continue;
651 524
652 525 if (0x20 & rc) {
653 ir = read_stk(p, cfg[i].reg); 526 rate = 2;
654 if (0x100 == cfg[i].reg) { 527 JOT(8, "hardware detects 60 Hz\n");
655 if ((ir != (0xFF & cfg[i].set)) && 528 } else {
656 (ir != (0x80 | (0xFF & cfg[i].set))) && 529 rate = 0;
657 (0xFFFF != cfg[i].set)) { 530 JOT(8, "hardware detects 50 Hz\n");
658 SAY("STK reg[0x%03X]=0x%02X expected 0x%02X\n", 531 }
659 cfg[i].reg, ir, cfg[i].set); 532 if (0x80 & rc)
660 } 533 JOT(8, "hardware detects interlacing\n");
661 continue; 534 else {
662 } 535 rate++;
663 if ((ir != (0xFF & cfg[i].set)) && (0xFFFF != cfg[i].set)) 536 JOT(8, "hardware detects no interlacing\n");
664 SAY("STK register 0x%03X has 0x%02X,expected 0x%02X\n",
665 cfg[i].reg, ir, cfg[i].set);
666 } 537 }
667 return 0; 538 return 0;
668} 539}
@@ -682,7 +553,7 @@ int read_saa(struct usb_device *p, u16 reg0)
682 return igot; 553 return igot;
683} 554}
684/****************************************************************************/ 555/****************************************************************************/
685int read_stk(struct usb_device *p, u32 reg0) 556static int read_stk(struct usb_device *p, u32 reg0)
686{ 557{
687 u8 igot; 558 u8 igot;
688 559
@@ -692,27 +563,7 @@ int read_stk(struct usb_device *p, u32 reg0)
692 GET(p, reg0, &igot); 563 GET(p, reg0, &igot);
693 return igot; 564 return igot;
694} 565}
695/****************************************************************************/ 566int select_input(struct usb_device *p, int input, int mode)
696/*--------------------------------------------------------------------------*/
697/*
698 * HARDWARE USERSPACE INPUT NUMBER PHYSICAL INPUT DRIVER input VALUE
699 *
700 * CVBS+S-VIDEO 0 or 1 CVBS 1
701 * FOUR-CVBS 0 or 1 CVBS1 1
702 * FOUR-CVBS 2 CVBS2 2
703 * FOUR-CVBS 3 CVBS3 3
704 * FOUR-CVBS 4 CVBS4 4
705 * CVBS+S-VIDEO 5 S-VIDEO 5
706 *
707 * WHEN 5==input THE ARGUMENT mode MUST ALSO BE SUPPLIED:
708 *
709 * mode 7 => GAIN TO BE SET EXPLICITLY USING REGISTER 0x05 (UNTESTED)
710 * mode 9 => USE AUTOMATIC GAIN CONTROL (DEFAULT)
711 *
712*/
713/*---------------------------------------------------------------------------*/
714int
715select_input(struct usb_device *p, int input, int mode)
716{ 567{
717 int ir; 568 int ir;
718 569
@@ -877,10 +728,11 @@ int stop_100(struct usb_device *p)
877/****************************************************************************/ 728/****************************************************************************/
878/****************************************************************************/ 729/****************************************************************************/
879/*****************************************************************************/ 730/*****************************************************************************/
880int wakeup_device(struct usb_device *pusb_device) 731int easycap_wakeup_device(struct usb_device *pusb_device)
881{ 732{
882 if (!pusb_device) 733 if (!pusb_device)
883 return -ENODEV; 734 return -ENODEV;
735
884 return usb_control_msg(pusb_device, usb_sndctrlpipe(pusb_device, 0), 736 return usb_control_msg(pusb_device, usb_sndctrlpipe(pusb_device, 0),
885 USB_REQ_SET_FEATURE, 737 USB_REQ_SET_FEATURE,
886 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, 738 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
@@ -888,8 +740,7 @@ int wakeup_device(struct usb_device *pusb_device)
888 0, NULL, 0, 50000); 740 0, NULL, 0, 50000);
889} 741}
890/*****************************************************************************/ 742/*****************************************************************************/
891int 743int easycap_audio_setup(struct easycap *peasycap)
892audio_setup(struct easycap *peasycap)
893{ 744{
894 struct usb_device *pusb_device; 745 struct usb_device *pusb_device;
895 u8 buffer[1]; 746 u8 buffer[1];
@@ -970,7 +821,7 @@ audio_setup(struct easycap *peasycap)
970 * SELECT AUDIO SOURCE "LINE IN" AND SET THE AUDIO GAIN. 821 * SELECT AUDIO SOURCE "LINE IN" AND SET THE AUDIO GAIN.
971*/ 822*/
972/*---------------------------------------------------------------------------*/ 823/*---------------------------------------------------------------------------*/
973 if (0 != audio_gainset(pusb_device, peasycap->gain)) 824 if (easycap_audio_gainset(pusb_device, peasycap->gain))
974 SAY("ERROR: audio_gainset() failed\n"); 825 SAY("ERROR: audio_gainset() failed\n");
975 check_vt(pusb_device); 826 check_vt(pusb_device);
976 return 0; 827 return 0;
@@ -1047,7 +898,7 @@ int check_vt(struct usb_device *pusb_device)
1047 * 31 12.0 22.5 34.5 898 * 31 12.0 22.5 34.5
1048*/ 899*/
1049/*---------------------------------------------------------------------------*/ 900/*---------------------------------------------------------------------------*/
1050int audio_gainset(struct usb_device *pusb_device, s8 loud) 901int easycap_audio_gainset(struct usb_device *pusb_device, s8 loud)
1051{ 902{
1052 int igot; 903 int igot;
1053 u8 tmp; 904 u8 tmp;
@@ -1115,15 +966,3 @@ int audio_gainset(struct usb_device *pusb_device, s8 loud)
1115 return 0; 966 return 0;
1116} 967}
1117/*****************************************************************************/ 968/*****************************************************************************/
1118int audio_gainget(struct usb_device *pusb_device)
1119{
1120 int igot;
1121
1122 if (!pusb_device)
1123 return -ENODEV;
1124 igot = read_vt(pusb_device, 0x001C);
1125 if (0 > igot)
1126 SAY("ERROR: failed to read VT1612A register 0x1C\n");
1127 return igot;
1128}
1129/*****************************************************************************/
diff --git a/drivers/staging/media/easycap/easycap_main.c b/drivers/staging/media/easycap/easycap_main.c
index a45c0b50706..8ff5f38ea19 100644
--- a/drivers/staging/media/easycap/easycap_main.c
+++ b/drivers/staging/media/easycap/easycap_main.c
@@ -66,6 +66,10 @@ struct easycap_dongle easycapdc60_dongle[DONGLE_MANY];
66static struct mutex mutex_dongle; 66static struct mutex mutex_dongle;
67static void easycap_complete(struct urb *purb); 67static void easycap_complete(struct urb *purb);
68static int reset(struct easycap *peasycap); 68static int reset(struct easycap *peasycap);
69static int field2frame(struct easycap *peasycap);
70static int redaub(struct easycap *peasycap,
71 void *pad, void *pex, int much, int more,
72 u8 mask, u8 margin, bool isuy);
69 73
70const char *strerror(int err) 74const char *strerror(int err)
71{ 75{
@@ -109,23 +113,13 @@ const char *strerror(int err)
109#undef ERRNOSTR 113#undef ERRNOSTR
110} 114}
111 115
112/*---------------------------------------------------------------------------*/
113/*
114 * PARAMETERS USED WHEN REGISTERING THE VIDEO INTERFACE
115 *
116 * NOTE: SOME KERNELS IGNORE usb_class_driver.minor_base, AS MENTIONED BY
117 * CORBET ET AL. "LINUX DEVICE DRIVERS", 3rd EDITION, PAGE 253.
118 * THIS IS THE CASE FOR OpenSUSE.
119 */
120/*---------------------------------------------------------------------------*/
121/*^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^*/
122/****************************************************************************/ 116/****************************************************************************/
123/*---------------------------------------------------------------------------*/ 117/*---------------------------------------------------------------------------*/
124/* 118/*
125 * THIS ROUTINE DOES NOT DETECT DUPLICATE OCCURRENCES OF POINTER peasycap 119 * THIS ROUTINE DOES NOT DETECT DUPLICATE OCCURRENCES OF POINTER peasycap
126*/ 120*/
127/*---------------------------------------------------------------------------*/ 121/*---------------------------------------------------------------------------*/
128int isdongle(struct easycap *peasycap) 122int easycap_isdongle(struct easycap *peasycap)
129{ 123{
130 int k; 124 int k;
131 if (!peasycap) 125 if (!peasycap)
@@ -161,14 +155,13 @@ static int easycap_open(struct inode *inode, struct file *file)
161 if (!peasycap->pusb_device) { 155 if (!peasycap->pusb_device) {
162 SAM("ERROR: peasycap->pusb_device is NULL\n"); 156 SAM("ERROR: peasycap->pusb_device is NULL\n");
163 return -EFAULT; 157 return -EFAULT;
164 } else {
165 JOM(16, "peasycap->pusb_device=%p\n", peasycap->pusb_device);
166 } 158 }
159
160 JOM(16, "peasycap->pusb_device=%p\n", peasycap->pusb_device);
161
167 file->private_data = peasycap; 162 file->private_data = peasycap;
168 rc = wakeup_device(peasycap->pusb_device); 163 rc = easycap_wakeup_device(peasycap->pusb_device);
169 if (0 == rc) 164 if (rc) {
170 JOM(8, "wakeup_device() OK\n");
171 else {
172 SAM("ERROR: wakeup_device() rc = %i\n", rc); 165 SAM("ERROR: wakeup_device() rc = %i\n", rc);
173 if (-ENODEV == rc) 166 if (-ENODEV == rc)
174 SAM("ERROR: wakeup_device() returned -ENODEV\n"); 167 SAM("ERROR: wakeup_device() returned -ENODEV\n");
@@ -176,6 +169,7 @@ static int easycap_open(struct inode *inode, struct file *file)
176 SAM("ERROR: wakeup_device() rc = %i\n", rc); 169 SAM("ERROR: wakeup_device() rc = %i\n", rc);
177 return rc; 170 return rc;
178 } 171 }
172 JOM(8, "wakeup_device() OK\n");
179 peasycap->input = 0; 173 peasycap->input = 0;
180 rc = reset(peasycap); 174 rc = reset(peasycap);
181 if (rc) { 175 if (rc) {
@@ -303,7 +297,7 @@ static int reset(struct easycap *peasycap)
303 peasycap->saturation = -8192; 297 peasycap->saturation = -8192;
304 peasycap->hue = -8192; 298 peasycap->hue = -8192;
305 299
306 rc = newinput(peasycap, input); 300 rc = easycap_newinput(peasycap, input);
307 301
308 if (rc) { 302 if (rc) {
309 SAM("ERROR: newinput(.,%i) rc = %i\n", rc, input); 303 SAM("ERROR: newinput(.,%i) rc = %i\n", rc, input);
@@ -364,8 +358,7 @@ static int reset(struct easycap *peasycap)
364 * SO IT SHOULD WRITE ONLY SPARINGLY TO THE LOGFILE. 358 * SO IT SHOULD WRITE ONLY SPARINGLY TO THE LOGFILE.
365*/ 359*/
366/*---------------------------------------------------------------------------*/ 360/*---------------------------------------------------------------------------*/
367int 361int easycap_newinput(struct easycap *peasycap, int input)
368newinput(struct easycap *peasycap, int input)
369{ 362{
370 int rc, k, m, mood, off; 363 int rc, k, m, mood, off;
371 int inputnow, video_idlenow, audio_idlenow; 364 int inputnow, video_idlenow, audio_idlenow;
@@ -397,7 +390,7 @@ newinput(struct easycap *peasycap, int input)
397 peasycap->audio_idle = 1; 390 peasycap->audio_idle = 1;
398 if (peasycap->video_isoc_streaming) { 391 if (peasycap->video_isoc_streaming) {
399 resubmit = true; 392 resubmit = true;
400 kill_video_urbs(peasycap); 393 easycap_video_kill_urbs(peasycap);
401 } else { 394 } else {
402 resubmit = false; 395 resubmit = false;
403 } 396 }
@@ -532,7 +525,7 @@ newinput(struct easycap *peasycap, int input)
532 return -EFAULT; 525 return -EFAULT;
533 } 526 }
534 if (resubmit) 527 if (resubmit)
535 submit_video_urbs(peasycap); 528 easycap_video_submit_urbs(peasycap);
536 529
537 peasycap->video_isoc_sequence = VIDEO_ISOC_BUFFER_MANY - 1; 530 peasycap->video_isoc_sequence = VIDEO_ISOC_BUFFER_MANY - 1;
538 peasycap->video_idle = video_idlenow; 531 peasycap->video_idle = video_idlenow;
@@ -542,7 +535,7 @@ newinput(struct easycap *peasycap, int input)
542 return 0; 535 return 0;
543} 536}
544/*****************************************************************************/ 537/*****************************************************************************/
545int submit_video_urbs(struct easycap *peasycap) 538int easycap_video_submit_urbs(struct easycap *peasycap)
546{ 539{
547 struct data_urb *pdata_urb; 540 struct data_urb *pdata_urb;
548 struct urb *purb; 541 struct urb *purb;
@@ -616,43 +609,53 @@ int submit_video_urbs(struct easycap *peasycap)
616 peasycap->video_eof = 1; 609 peasycap->video_eof = 1;
617 } 610 }
618 611
619 if (isbad) { 612 if (isbad)
620 JOM(4, "attempting cleanup instead of submitting\n"); 613 easycap_video_kill_urbs(peasycap);
621 list_for_each(plist_head, (peasycap->purb_video_head)) { 614 else
622 pdata_urb = list_entry(plist_head,
623 struct data_urb, list_head);
624 if (pdata_urb) {
625 purb = pdata_urb->purb;
626 if (purb)
627 usb_kill_urb(purb);
628 }
629 }
630 peasycap->video_isoc_streaming = 0;
631 } else {
632 peasycap->video_isoc_streaming = 1; 615 peasycap->video_isoc_streaming = 1;
633 JOM(4, "submitted %i video urbs\n", m);
634 }
635 } else { 616 } else {
636 JOM(4, "already streaming video urbs\n"); 617 JOM(4, "already streaming video urbs\n");
637 } 618 }
638 return 0; 619 return 0;
639} 620}
640/*****************************************************************************/ 621/*****************************************************************************/
641int kill_video_urbs(struct easycap *peasycap) 622int easycap_audio_kill_urbs(struct easycap *peasycap)
642{ 623{
643 int m; 624 int m;
644 struct list_head *plist_head; 625 struct list_head *plist_head;
645 struct data_urb *pdata_urb; 626 struct data_urb *pdata_urb;
646 627
647 if (!peasycap) { 628 if (!peasycap->audio_isoc_streaming)
648 SAY("ERROR: peasycap is NULL\n"); 629 return 0;
630
631 if (!peasycap->purb_audio_head) {
632 SAM("ERROR: peasycap->purb_audio_head is NULL\n");
649 return -EFAULT; 633 return -EFAULT;
650 } 634 }
651 if (!peasycap->video_isoc_streaming) { 635
652 JOM(8, "%i=video_isoc_streaming, no video urbs killed\n", 636 peasycap->audio_isoc_streaming = 0;
653 peasycap->video_isoc_streaming); 637 m = 0;
654 return 0; 638 list_for_each(plist_head, peasycap->purb_audio_head) {
639 pdata_urb = list_entry(plist_head, struct data_urb, list_head);
640 if (pdata_urb && pdata_urb->purb) {
641 usb_kill_urb(pdata_urb->purb);
642 m++;
643 }
655 } 644 }
645
646 JOM(4, "%i audio urbs killed\n", m);
647
648 return 0;
649}
650int easycap_video_kill_urbs(struct easycap *peasycap)
651{
652 int m;
653 struct list_head *plist_head;
654 struct data_urb *pdata_urb;
655
656 if (!peasycap->video_isoc_streaming)
657 return 0;
658
656 if (!peasycap->purb_video_head) { 659 if (!peasycap->purb_video_head) {
657 SAM("ERROR: peasycap->purb_video_head is NULL\n"); 660 SAM("ERROR: peasycap->purb_video_head is NULL\n");
658 return -EFAULT; 661 return -EFAULT;
@@ -690,8 +693,8 @@ static int videodev_release(struct video_device *pvideo_device)
690 SAY("ending unsuccessfully\n"); 693 SAY("ending unsuccessfully\n");
691 return -EFAULT; 694 return -EFAULT;
692 } 695 }
693 if (0 != kill_video_urbs(peasycap)) { 696 if (easycap_video_kill_urbs(peasycap)) {
694 SAM("ERROR: kill_video_urbs() failed\n"); 697 SAM("ERROR: easycap_video_kill_urbs() failed\n");
695 return -EFAULT; 698 return -EFAULT;
696 } 699 }
697 JOM(4, "ending successfully\n"); 700 JOM(4, "ending successfully\n");
@@ -727,27 +730,22 @@ static void easycap_delete(struct kref *pkref)
727 SAM("ERROR: peasycap is NULL: cannot perform deletions\n"); 730 SAM("ERROR: peasycap is NULL: cannot perform deletions\n");
728 return; 731 return;
729 } 732 }
730 kd = isdongle(peasycap); 733 kd = easycap_isdongle(peasycap);
731/*---------------------------------------------------------------------------*/ 734/*---------------------------------------------------------------------------*/
732/* 735/*
733 * FREE VIDEO. 736 * FREE VIDEO.
734 */ 737 */
735/*---------------------------------------------------------------------------*/ 738/*---------------------------------------------------------------------------*/
736 if (peasycap->purb_video_head) { 739 if (peasycap->purb_video_head) {
737 JOM(4, "freeing video urbs\n");
738 m = 0; 740 m = 0;
739 list_for_each(plist_head, (peasycap->purb_video_head)) { 741 list_for_each(plist_head, peasycap->purb_video_head) {
740 pdata_urb = list_entry(plist_head, 742 pdata_urb = list_entry(plist_head,
741 struct data_urb, list_head); 743 struct data_urb, list_head);
742 if (!pdata_urb) { 744 if (pdata_urb && pdata_urb->purb) {
743 JOM(4, "ERROR: pdata_urb is NULL\n"); 745 usb_free_urb(pdata_urb->purb);
744 } else { 746 pdata_urb->purb = NULL;
745 if (pdata_urb->purb) { 747 peasycap->allocation_video_urb--;
746 usb_free_urb(pdata_urb->purb); 748 m++;
747 pdata_urb->purb = NULL;
748 peasycap->allocation_video_urb -= 1;
749 m++;
750 }
751 } 749 }
752 } 750 }
753 751
@@ -763,7 +761,6 @@ static void easycap_delete(struct kref *pkref)
763 peasycap->allocation_video_struct -= 761 peasycap->allocation_video_struct -=
764 sizeof(struct data_urb); 762 sizeof(struct data_urb);
765 kfree(pdata_urb); 763 kfree(pdata_urb);
766 pdata_urb = NULL;
767 m++; 764 m++;
768 } 765 }
769 } 766 }
@@ -828,15 +825,11 @@ static void easycap_delete(struct kref *pkref)
828 list_for_each(plist_head, (peasycap->purb_audio_head)) { 825 list_for_each(plist_head, (peasycap->purb_audio_head)) {
829 pdata_urb = list_entry(plist_head, 826 pdata_urb = list_entry(plist_head,
830 struct data_urb, list_head); 827 struct data_urb, list_head);
831 if (!pdata_urb) 828 if (pdata_urb && pdata_urb->purb) {
832 JOM(4, "ERROR: pdata_urb is NULL\n"); 829 usb_free_urb(pdata_urb->purb);
833 else { 830 pdata_urb->purb = NULL;
834 if (pdata_urb->purb) { 831 peasycap->allocation_audio_urb--;
835 usb_free_urb(pdata_urb->purb); 832 m++;
836 pdata_urb->purb = NULL;
837 peasycap->allocation_audio_urb -= 1;
838 m++;
839 }
840 } 833 }
841 } 834 }
842 JOM(4, "%i audio urbs freed\n", m); 835 JOM(4, "%i audio urbs freed\n", m);
@@ -851,7 +844,6 @@ static void easycap_delete(struct kref *pkref)
851 peasycap->allocation_audio_struct -= 844 peasycap->allocation_audio_struct -=
852 sizeof(struct data_urb); 845 sizeof(struct data_urb);
853 kfree(pdata_urb); 846 kfree(pdata_urb);
854 pdata_urb = NULL;
855 m++; 847 m++;
856 } 848 }
857 } 849 }
@@ -940,7 +932,7 @@ static unsigned int easycap_poll(struct file *file, poll_table *wait)
940 return -EFAULT; 932 return -EFAULT;
941 } 933 }
942/*---------------------------------------------------------------------------*/ 934/*---------------------------------------------------------------------------*/
943 kd = isdongle(peasycap); 935 kd = easycap_isdongle(peasycap);
944 if (0 <= kd && DONGLE_MANY > kd) { 936 if (0 <= kd && DONGLE_MANY > kd) {
945 if (mutex_lock_interruptible(&easycapdc60_dongle[kd].mutex_video)) { 937 if (mutex_lock_interruptible(&easycapdc60_dongle[kd].mutex_video)) {
946 SAY("ERROR: cannot down dongle[%i].mutex_video\n", kd); 938 SAY("ERROR: cannot down dongle[%i].mutex_video\n", kd);
@@ -952,7 +944,7 @@ static unsigned int easycap_poll(struct file *file, poll_table *wait)
952 * peasycap, IN WHICH CASE A REPEAT CALL TO isdongle() WILL FAIL. 944 * peasycap, IN WHICH CASE A REPEAT CALL TO isdongle() WILL FAIL.
953 * IF NECESSARY, BAIL OUT. 945 * IF NECESSARY, BAIL OUT.
954 */ 946 */
955 if (kd != isdongle(peasycap)) { 947 if (kd != easycap_isdongle(peasycap)) {
956 mutex_unlock(&easycapdc60_dongle[kd].mutex_video); 948 mutex_unlock(&easycapdc60_dongle[kd].mutex_video);
957 return -ERESTARTSYS; 949 return -ERESTARTSYS;
958 } 950 }
@@ -980,21 +972,21 @@ static unsigned int easycap_poll(struct file *file, poll_table *wait)
980 */ 972 */
981 return -ERESTARTSYS; 973 return -ERESTARTSYS;
982/*---------------------------------------------------------------------------*/ 974/*---------------------------------------------------------------------------*/
983 rc = easycap_dqbuf(peasycap, 0); 975 rc = easycap_video_dqbuf(peasycap, 0);
984 peasycap->polled = 1; 976 peasycap->polled = 1;
985 mutex_unlock(&easycapdc60_dongle[kd].mutex_video); 977 mutex_unlock(&easycapdc60_dongle[kd].mutex_video);
986 if (0 == rc) 978 if (rc)
987 return POLLIN | POLLRDNORM;
988 else
989 return POLLERR; 979 return POLLERR;
990 } 980
981 return POLLIN | POLLRDNORM;
982}
991/*****************************************************************************/ 983/*****************************************************************************/
992/*---------------------------------------------------------------------------*/ 984/*---------------------------------------------------------------------------*/
993/* 985/*
994 * IF mode IS NONZERO THIS ROUTINE RETURNS -EAGAIN RATHER THAN BLOCKING. 986 * IF mode IS NONZERO THIS ROUTINE RETURNS -EAGAIN RATHER THAN BLOCKING.
995 */ 987 */
996/*---------------------------------------------------------------------------*/ 988/*---------------------------------------------------------------------------*/
997int easycap_dqbuf(struct easycap *peasycap, int mode) 989int easycap_video_dqbuf(struct easycap *peasycap, int mode)
998{ 990{
999 int input, ifield, miss, rc; 991 int input, ifield, miss, rc;
1000 992
@@ -1080,7 +1072,7 @@ int easycap_dqbuf(struct easycap *peasycap, int mode)
1080 JOM(8, " ... failed returning -EIO\n"); 1072 JOM(8, " ... failed returning -EIO\n");
1081 peasycap->video_eof = 1; 1073 peasycap->video_eof = 1;
1082 peasycap->audio_eof = 1; 1074 peasycap->audio_eof = 1;
1083 kill_video_urbs(peasycap); 1075 easycap_video_kill_urbs(peasycap);
1084 return -EIO; 1076 return -EIO;
1085 } 1077 }
1086 peasycap->status = 0; 1078 peasycap->status = 0;
@@ -1090,7 +1082,7 @@ int easycap_dqbuf(struct easycap *peasycap, int mode)
1090 #endif /*PERSEVERE*/ 1082 #endif /*PERSEVERE*/
1091 peasycap->video_eof = 1; 1083 peasycap->video_eof = 1;
1092 peasycap->audio_eof = 1; 1084 peasycap->audio_eof = 1;
1093 kill_video_urbs(peasycap); 1085 easycap_video_kill_urbs(peasycap);
1094 JOM(8, "returning -EIO\n"); 1086 JOM(8, "returning -EIO\n");
1095 return -EIO; 1087 return -EIO;
1096 } 1088 }
@@ -1143,7 +1135,7 @@ int easycap_dqbuf(struct easycap *peasycap, int mode)
1143 JOM(8, " ... failed returning -EIO\n"); 1135 JOM(8, " ... failed returning -EIO\n");
1144 peasycap->video_eof = 1; 1136 peasycap->video_eof = 1;
1145 peasycap->audio_eof = 1; 1137 peasycap->audio_eof = 1;
1146 kill_video_urbs(peasycap); 1138 easycap_video_kill_urbs(peasycap);
1147 return -EIO; 1139 return -EIO;
1148 } 1140 }
1149 peasycap->status = 0; 1141 peasycap->status = 0;
@@ -1153,7 +1145,7 @@ int easycap_dqbuf(struct easycap *peasycap, int mode)
1153#endif /*PERSEVERE*/ 1145#endif /*PERSEVERE*/
1154 peasycap->video_eof = 1; 1146 peasycap->video_eof = 1;
1155 peasycap->audio_eof = 1; 1147 peasycap->audio_eof = 1;
1156 kill_video_urbs(peasycap); 1148 easycap_video_kill_urbs(peasycap);
1157 JOM(8, "returning -EIO\n"); 1149 JOM(8, "returning -EIO\n");
1158 return -EIO; 1150 return -EIO;
1159 } 1151 }
@@ -1207,12 +1199,9 @@ int easycap_dqbuf(struct easycap *peasycap, int mode)
1207 * WHEN BOOLEAN PARAMETER decimatepixel IS true, ONLY THE FIELD FOR WHICH 1199 * WHEN BOOLEAN PARAMETER decimatepixel IS true, ONLY THE FIELD FOR WHICH
1208 * odd==false IS TRANSFERRED TO THE FRAME BUFFER. 1200 * odd==false IS TRANSFERRED TO THE FRAME BUFFER.
1209 * 1201 *
1210 * THE BOOLEAN PARAMETER offerfields IS true ONLY WHEN THE USER PROGRAM
1211 * CHOOSES THE OPTION V4L2_FIELD_INTERLACED.
1212 */ 1202 */
1213/*---------------------------------------------------------------------------*/ 1203/*---------------------------------------------------------------------------*/
1214int 1204static int field2frame(struct easycap *peasycap)
1215field2frame(struct easycap *peasycap)
1216{ 1205{
1217 1206
1218 void *pex, *pad; 1207 void *pex, *pad;
@@ -1221,7 +1210,7 @@ field2frame(struct easycap *peasycap)
1221 int rc, bytesperpixel, multiplier; 1210 int rc, bytesperpixel, multiplier;
1222 int much, more, over, rump, caches, input; 1211 int much, more, over, rump, caches, input;
1223 u8 mask, margin; 1212 u8 mask, margin;
1224 bool odd, isuy, decimatepixel, offerfields, badinput; 1213 bool odd, isuy, decimatepixel, badinput;
1225 1214
1226 if (!peasycap) { 1215 if (!peasycap) {
1227 SAY("ERROR: peasycap is NULL\n"); 1216 SAY("ERROR: peasycap is NULL\n");
@@ -1237,8 +1226,6 @@ field2frame(struct easycap *peasycap)
1237 peasycap->field_buffer[peasycap->field_read][0].input, 1226 peasycap->field_buffer[peasycap->field_read][0].input,
1238 peasycap->field_read, peasycap->frame_fill); 1227 peasycap->field_read, peasycap->frame_fill);
1239 JOM(8, "===== %i=bytesperpixel\n", peasycap->bytesperpixel); 1228 JOM(8, "===== %i=bytesperpixel\n", peasycap->bytesperpixel);
1240 if (peasycap->offerfields)
1241 JOM(8, "===== offerfields\n");
1242 1229
1243/*---------------------------------------------------------------------------*/ 1230/*---------------------------------------------------------------------------*/
1244/* 1231/*
@@ -1260,7 +1247,6 @@ field2frame(struct easycap *peasycap)
1260#endif /*EASYCAP_TESTCARD*/ 1247#endif /*EASYCAP_TESTCARD*/
1261/*---------------------------------------------------------------------------*/ 1248/*---------------------------------------------------------------------------*/
1262 1249
1263 offerfields = peasycap->offerfields;
1264 bytesperpixel = peasycap->bytesperpixel; 1250 bytesperpixel = peasycap->bytesperpixel;
1265 decimatepixel = peasycap->decimatepixel; 1251 decimatepixel = peasycap->decimatepixel;
1266 1252
@@ -1601,9 +1587,9 @@ field2frame(struct easycap *peasycap)
1601 * REDUCE CODE LENGTH WILL GENERALLY IMPAIR RUNTIME PERFORMANCE. BEWARE. 1587 * REDUCE CODE LENGTH WILL GENERALLY IMPAIR RUNTIME PERFORMANCE. BEWARE.
1602 */ 1588 */
1603/*---------------------------------------------------------------------------*/ 1589/*---------------------------------------------------------------------------*/
1604int 1590static int redaub(struct easycap *peasycap,
1605redaub(struct easycap *peasycap, void *pad, void *pex, int much, int more, 1591 void *pad, void *pex, int much, int more,
1606 u8 mask, u8 margin, bool isuy) 1592 u8 mask, u8 margin, bool isuy)
1607{ 1593{
1608 static s32 ay[256], bu[256], rv[256], gu[256], gv[256]; 1594 static s32 ay[256], bu[256], rv[256], gu[256], gv[256];
1609 u8 *pcache; 1595 u8 *pcache;
@@ -2855,20 +2841,7 @@ static void easycap_complete(struct urb *purb)
2855 } 2841 }
2856 return; 2842 return;
2857} 2843}
2858static const struct file_operations easycap_fops = { 2844
2859 .owner = THIS_MODULE,
2860 .open = easycap_open,
2861 .unlocked_ioctl = easycap_unlocked_ioctl,
2862 .poll = easycap_poll,
2863 .mmap = easycap_mmap,
2864 .llseek = no_llseek,
2865};
2866static const struct usb_class_driver easycap_class = {
2867 .name = "usb/easycap%d",
2868 .fops = &easycap_fops,
2869 .minor_base = USB_SKEL_MINOR_BASE,
2870};
2871/*vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv*/
2872static const struct v4l2_file_operations v4l2_fops = { 2845static const struct v4l2_file_operations v4l2_fops = {
2873 .owner = THIS_MODULE, 2846 .owner = THIS_MODULE,
2874 .open = easycap_open_noinode, 2847 .open = easycap_open_noinode,
@@ -2917,6 +2890,7 @@ static int easycap_usb_probe(struct usb_interface *intf,
2917 SAY("ERROR: usb_host_interface not found\n"); 2890 SAY("ERROR: usb_host_interface not found\n");
2918 return -EFAULT; 2891 return -EFAULT;
2919 } 2892 }
2893
2920 interface = &alt->desc; 2894 interface = &alt->desc;
2921 if (!interface) { 2895 if (!interface) {
2922 SAY("ERROR: intf_descriptor is NULL\n"); 2896 SAY("ERROR: intf_descriptor is NULL\n");
@@ -2976,44 +2950,31 @@ static int easycap_usb_probe(struct usb_interface *intf,
2976 if (mutex_lock_interruptible(&mutex_dongle)) { 2950 if (mutex_lock_interruptible(&mutex_dongle)) {
2977 SAY("ERROR: cannot down mutex_dongle\n"); 2951 SAY("ERROR: cannot down mutex_dongle\n");
2978 return -ERESTARTSYS; 2952 return -ERESTARTSYS;
2979 } else { 2953 }
2980/*---------------------------------------------------------------------------*/ 2954
2981 /* 2955 for (ndong = 0; ndong < DONGLE_MANY; ndong++) {
2982 * FOR INTERFACES 1 AND 2 THE POINTER peasycap WILL NEED TO 2956 if ((!easycapdc60_dongle[ndong].peasycap) &&
2983 * TO BE THE SAME AS THAT ALLOCATED NOW FOR INTERFACE 0. 2957 (!mutex_is_locked(&easycapdc60_dongle
2984 * 2958 [ndong].mutex_video)) &&
2985 * NORMALLY ndong WILL NOT HAVE CHANGED SINCE INTERFACE 0 WAS 2959 (!mutex_is_locked(&easycapdc60_dongle
2986 * PROBED, BUT THIS MAY NOT BE THE CASE IF, FOR EXAMPLE, TWO 2960 [ndong].mutex_audio))) {
2987 * EASYCAPs ARE PLUGGED IN SIMULTANEOUSLY. 2961 easycapdc60_dongle[ndong].peasycap = peasycap;
2988 */ 2962 peasycap->isdongle = ndong;
2989/*---------------------------------------------------------------------------*/ 2963 JOM(8, "intf[%i]: peasycap-->easycap"
2990 for (ndong = 0; ndong < DONGLE_MANY; ndong++) { 2964 "_dongle[%i].peasycap\n",
2991 if ((!easycapdc60_dongle[ndong].peasycap) && 2965 bInterfaceNumber, ndong);
2992 (!mutex_is_locked(&easycapdc60_dongle 2966 break;
2993 [ndong].mutex_video)) &&
2994 (!mutex_is_locked(&easycapdc60_dongle
2995 [ndong].mutex_audio))) {
2996 easycapdc60_dongle[ndong].peasycap = peasycap;
2997 peasycap->isdongle = ndong;
2998 JOM(8, "intf[%i]: peasycap-->easycap"
2999 "_dongle[%i].peasycap\n",
3000 bInterfaceNumber, ndong);
3001 break;
3002 }
3003 }
3004 if (DONGLE_MANY <= ndong) {
3005 SAM("ERROR: too many dongles\n");
3006 mutex_unlock(&mutex_dongle);
3007 return -ENOMEM;
3008 } 2967 }
2968 }
2969
2970 if (DONGLE_MANY <= ndong) {
2971 SAM("ERROR: too many dongles\n");
3009 mutex_unlock(&mutex_dongle); 2972 mutex_unlock(&mutex_dongle);
2973 return -ENOMEM;
3010 } 2974 }
2975 mutex_unlock(&mutex_dongle);
2976
3011 peasycap->allocation_video_struct = sizeof(struct easycap); 2977 peasycap->allocation_video_struct = sizeof(struct easycap);
3012 peasycap->allocation_video_page = 0;
3013 peasycap->allocation_video_urb = 0;
3014 peasycap->allocation_audio_struct = 0;
3015 peasycap->allocation_audio_page = 0;
3016 peasycap->allocation_audio_urb = 0;
3017 2978
3018/*---------------------------------------------------------------------------*/ 2979/*---------------------------------------------------------------------------*/
3019/* 2980/*
@@ -3023,7 +2984,6 @@ static int easycap_usb_probe(struct usb_interface *intf,
3023 peasycap->pusb_device = usbdev; 2984 peasycap->pusb_device = usbdev;
3024 peasycap->pusb_interface = intf; 2985 peasycap->pusb_interface = intf;
3025 2986
3026 peasycap->ilk = 0;
3027 peasycap->microphone = false; 2987 peasycap->microphone = false;
3028 2988
3029 peasycap->video_interface = -1; 2989 peasycap->video_interface = -1;
@@ -3042,38 +3002,21 @@ static int easycap_usb_probe(struct usb_interface *intf,
3042 3002
3043 peasycap->frame_buffer_many = FRAME_BUFFER_MANY; 3003 peasycap->frame_buffer_many = FRAME_BUFFER_MANY;
3044 3004
3045 for (k = 0; k < INPUT_MANY; k++)
3046 peasycap->lost[k] = 0;
3047 peasycap->skip = 0;
3048 peasycap->skipped = 0;
3049 peasycap->offerfields = 0;
3050/*---------------------------------------------------------------------------*/ 3005/*---------------------------------------------------------------------------*/
3051/* 3006/*
3052 * DYNAMICALLY FILL IN THE AVAILABLE FORMATS ... 3007 * DYNAMICALLY FILL IN THE AVAILABLE FORMATS ...
3053 */ 3008 */
3054/*---------------------------------------------------------------------------*/ 3009/*---------------------------------------------------------------------------*/
3055 rc = fillin_formats(); 3010 rc = easycap_video_fillin_formats();
3056 if (0 > rc) { 3011 if (0 > rc) {
3057 SAM("ERROR: fillin_formats() rc = %i\n", rc); 3012 SAM("ERROR: fillin_formats() rc = %i\n", rc);
3058 return -EFAULT; 3013 return -EFAULT;
3059 } 3014 }
3060 JOM(4, "%i formats available\n", rc); 3015 JOM(4, "%i formats available\n", rc);
3061/*---------------------------------------------------------------------------*/ 3016
3062/* 3017 /* ... AND POPULATE easycap.inputset[] */
3063 * ... AND POPULATE easycap.inputset[] 3018
3064*/
3065/*---------------------------------------------------------------------------*/
3066 /* FIXME: maybe we just use memset 0 */
3067 inputset = peasycap->inputset; 3019 inputset = peasycap->inputset;
3068 for (k = 0; k < INPUT_MANY; k++) {
3069 inputset[k].input_ok = 0;
3070 inputset[k].standard_offset_ok = 0;
3071 inputset[k].format_offset_ok = 0;
3072 inputset[k].brightness_ok = 0;
3073 inputset[k].contrast_ok = 0;
3074 inputset[k].saturation_ok = 0;
3075 inputset[k].hue_ok = 0;
3076 }
3077 3020
3078 fmtidx = peasycap->ntsc ? NTSC_M : PAL_BGHIN; 3021 fmtidx = peasycap->ntsc ? NTSC_M : PAL_BGHIN;
3079 m = 0; 3022 m = 0;
@@ -3390,11 +3333,10 @@ static int easycap_usb_probe(struct usb_interface *intf,
3390 if (!isokalt) { 3333 if (!isokalt) {
3391 SAM("ERROR: no viable video_altsetting_on\n"); 3334 SAM("ERROR: no viable video_altsetting_on\n");
3392 return -ENOENT; 3335 return -ENOENT;
3393 } else {
3394 peasycap->video_altsetting_on = okalt[isokalt - 1];
3395 JOM(4, "%i=video_altsetting_on <====\n",
3396 peasycap->video_altsetting_on);
3397 } 3336 }
3337 peasycap->video_altsetting_on = okalt[isokalt - 1];
3338 JOM(4, "%i=video_altsetting_on <====\n",
3339 peasycap->video_altsetting_on);
3398/*---------------------------------------------------------------------------*/ 3340/*---------------------------------------------------------------------------*/
3399/* 3341/*
3400 * DECIDE THE VIDEO STREAMING PARAMETERS 3342 * DECIDE THE VIDEO STREAMING PARAMETERS
@@ -3480,8 +3422,9 @@ static int easycap_usb_probe(struct usb_interface *intf,
3480 SAM("ERROR: Could not allocate frame " 3422 SAM("ERROR: Could not allocate frame "
3481 "buffer %i page %i\n", k, m); 3423 "buffer %i page %i\n", k, m);
3482 return -ENOMEM; 3424 return -ENOMEM;
3483 } else 3425 }
3484 peasycap->allocation_video_page += 1; 3426
3427 peasycap->allocation_video_page += 1;
3485 peasycap->frame_buffer[k][m].pgo = pbuf; 3428 peasycap->frame_buffer[k][m].pgo = pbuf;
3486 } 3429 }
3487 peasycap->frame_buffer[k][m].pto = 3430 peasycap->frame_buffer[k][m].pto =
@@ -3510,11 +3453,11 @@ static int easycap_usb_probe(struct usb_interface *intf,
3510 SAM("ERROR: Could not allocate field" 3453 SAM("ERROR: Could not allocate field"
3511 " buffer %i page %i\n", k, m); 3454 " buffer %i page %i\n", k, m);
3512 return -ENOMEM; 3455 return -ENOMEM;
3513 }
3514 else
3515 peasycap->allocation_video_page += 1;
3516 peasycap->field_buffer[k][m].pgo = pbuf;
3517 } 3456 }
3457
3458 peasycap->allocation_video_page += 1;
3459 peasycap->field_buffer[k][m].pgo = pbuf;
3460 }
3518 peasycap->field_buffer[k][m].pto = 3461 peasycap->field_buffer[k][m].pto =
3519 peasycap->field_buffer[k][m].pgo; 3462 peasycap->field_buffer[k][m].pgo;
3520 } 3463 }
@@ -3538,9 +3481,9 @@ static int easycap_usb_probe(struct usb_interface *intf,
3538 SAM("ERROR: Could not allocate isoc video buffer " 3481 SAM("ERROR: Could not allocate isoc video buffer "
3539 "%i\n", k); 3482 "%i\n", k);
3540 return -ENOMEM; 3483 return -ENOMEM;
3541 } else 3484 }
3542 peasycap->allocation_video_page += 3485 peasycap->allocation_video_page +=
3543 BIT(VIDEO_ISOC_ORDER); 3486 BIT(VIDEO_ISOC_ORDER);
3544 3487
3545 peasycap->video_isoc_buffer[k].pgo = pbuf; 3488 peasycap->video_isoc_buffer[k].pgo = pbuf;
3546 peasycap->video_isoc_buffer[k].pto = 3489 peasycap->video_isoc_buffer[k].pto =
@@ -3569,15 +3512,17 @@ static int easycap_usb_probe(struct usb_interface *intf,
3569 SAM("ERROR: usb_alloc_urb returned NULL for buffer " 3512 SAM("ERROR: usb_alloc_urb returned NULL for buffer "
3570 "%i\n", k); 3513 "%i\n", k);
3571 return -ENOMEM; 3514 return -ENOMEM;
3572 } else 3515 }
3573 peasycap->allocation_video_urb += 1; 3516
3517 peasycap->allocation_video_urb += 1;
3574/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */ 3518/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
3575 pdata_urb = kzalloc(sizeof(struct data_urb), GFP_KERNEL); 3519 pdata_urb = kzalloc(sizeof(struct data_urb), GFP_KERNEL);
3576 if (!pdata_urb) { 3520 if (!pdata_urb) {
3577 SAM("ERROR: Could not allocate struct data_urb.\n"); 3521 SAM("ERROR: Could not allocate struct data_urb.\n");
3578 return -ENOMEM; 3522 return -ENOMEM;
3579 } else 3523 }
3580 peasycap->allocation_video_struct += 3524
3525 peasycap->allocation_video_struct +=
3581 sizeof(struct data_urb); 3526 sizeof(struct data_urb);
3582 3527
3583 pdata_urb->purb = purb; 3528 pdata_urb->purb = purb;
@@ -3694,13 +3639,12 @@ static int easycap_usb_probe(struct usb_interface *intf,
3694 err("Not able to register with videodev"); 3639 err("Not able to register with videodev");
3695 videodev_release(&(peasycap->video_device)); 3640 videodev_release(&(peasycap->video_device));
3696 return -ENODEV; 3641 return -ENODEV;
3697 } else {
3698 (peasycap->registered_video)++;
3699 SAM("registered with videodev: %i=minor\n",
3700 peasycap->video_device.minor);
3701 peasycap->minor = peasycap->video_device.minor;
3702 } 3642 }
3703/*^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^*/ 3643
3644 peasycap->registered_video++;
3645 SAM("registered with videodev: %i=minor\n",
3646 peasycap->video_device.minor);
3647 peasycap->minor = peasycap->video_device.minor;
3704 3648
3705 break; 3649 break;
3706 } 3650 }
@@ -3734,11 +3678,10 @@ static int easycap_usb_probe(struct usb_interface *intf,
3734 if (!isokalt) { 3678 if (!isokalt) {
3735 SAM("ERROR: no viable audio_altsetting_on\n"); 3679 SAM("ERROR: no viable audio_altsetting_on\n");
3736 return -ENOENT; 3680 return -ENOENT;
3737 } else {
3738 peasycap->audio_altsetting_on = okalt[isokalt - 1];
3739 JOM(4, "%i=audio_altsetting_on <====\n",
3740 peasycap->audio_altsetting_on);
3741 } 3681 }
3682 peasycap->audio_altsetting_on = okalt[isokalt - 1];
3683 JOM(4, "%i=audio_altsetting_on <====\n",
3684 peasycap->audio_altsetting_on);
3742 3685
3743 peasycap->audio_endpointnumber = okepn[isokalt - 1]; 3686 peasycap->audio_endpointnumber = okepn[isokalt - 1];
3744 JOM(4, "%i=audio_endpointnumber\n", peasycap->audio_endpointnumber); 3687 JOM(4, "%i=audio_endpointnumber\n", peasycap->audio_endpointnumber);
@@ -3847,8 +3790,8 @@ static int easycap_usb_probe(struct usb_interface *intf,
3847 SAM("ERROR: Could not allocate isoc audio buffer " 3790 SAM("ERROR: Could not allocate isoc audio buffer "
3848 "%i\n", k); 3791 "%i\n", k);
3849 return -ENOMEM; 3792 return -ENOMEM;
3850 } else 3793 }
3851 peasycap->allocation_audio_page += 3794 peasycap->allocation_audio_page +=
3852 BIT(AUDIO_ISOC_ORDER); 3795 BIT(AUDIO_ISOC_ORDER);
3853 3796
3854 peasycap->audio_isoc_buffer[k].pgo = pbuf; 3797 peasycap->audio_isoc_buffer[k].pgo = pbuf;
@@ -3996,12 +3939,9 @@ static void easycap_usb_disconnect(struct usb_interface *pusb_interface)
3996{ 3939{
3997 struct usb_host_interface *pusb_host_interface; 3940 struct usb_host_interface *pusb_host_interface;
3998 struct usb_interface_descriptor *pusb_interface_descriptor; 3941 struct usb_interface_descriptor *pusb_interface_descriptor;
3999 u8 bInterfaceNumber;
4000 struct easycap *peasycap; 3942 struct easycap *peasycap;
4001 3943 int minor, kd;
4002 struct list_head *plist_head; 3944 u8 bInterfaceNumber;
4003 struct data_urb *pdata_urb;
4004 int minor, m, kd;
4005 3945
4006 JOT(4, "\n"); 3946 JOT(4, "\n");
4007 3947
@@ -4036,45 +3976,14 @@ static void easycap_usb_disconnect(struct usb_interface *pusb_interface)
4036 peasycap->audio_eof = 1; 3976 peasycap->audio_eof = 1;
4037 wake_up_interruptible(&(peasycap->wq_video)); 3977 wake_up_interruptible(&(peasycap->wq_video));
4038 wake_up_interruptible(&(peasycap->wq_audio)); 3978 wake_up_interruptible(&(peasycap->wq_audio));
4039/*---------------------------------------------------------------------------*/ 3979
4040 switch (bInterfaceNumber) { 3980 switch (bInterfaceNumber) {
4041 case 0: { 3981 case 0:
4042 if (peasycap->purb_video_head) { 3982 easycap_video_kill_urbs(peasycap);
4043 JOM(4, "killing video urbs\n");
4044 m = 0;
4045 list_for_each(plist_head, peasycap->purb_video_head) {
4046 pdata_urb = list_entry(plist_head,
4047 struct data_urb, list_head);
4048 if (pdata_urb) {
4049 if (pdata_urb->purb) {
4050 usb_kill_urb(pdata_urb->purb);
4051 m++;
4052 }
4053 }
4054 }
4055 JOM(4, "%i video urbs killed\n", m);
4056 }
4057 break; 3983 break;
4058 } 3984 case 2:
4059/*---------------------------------------------------------------------------*/ 3985 easycap_audio_kill_urbs(peasycap);
4060 case 2: {
4061 if (peasycap->purb_audio_head) {
4062 JOM(4, "killing audio urbs\n");
4063 m = 0;
4064 list_for_each(plist_head, peasycap->purb_audio_head) {
4065 pdata_urb = list_entry(plist_head,
4066 struct data_urb, list_head);
4067 if (pdata_urb) {
4068 if (pdata_urb->purb) {
4069 usb_kill_urb(pdata_urb->purb);
4070 m++;
4071 }
4072 }
4073 }
4074 JOM(4, "%i audio urbs killed\n", m);
4075 }
4076 break; 3986 break;
4077 }
4078 default: 3987 default:
4079 break; 3988 break;
4080 } 3989 }
@@ -4087,7 +3996,7 @@ static void easycap_usb_disconnect(struct usb_interface *pusb_interface)
4087 * AN EasyCAP IS UNPLUGGED WHILE THE URBS ARE RUNNING. BEWARE. 3996 * AN EasyCAP IS UNPLUGGED WHILE THE URBS ARE RUNNING. BEWARE.
4088 */ 3997 */
4089/*--------------------------------------------------------------------------*/ 3998/*--------------------------------------------------------------------------*/
4090 kd = isdongle(peasycap); 3999 kd = easycap_isdongle(peasycap);
4091 switch (bInterfaceNumber) { 4000 switch (bInterfaceNumber) {
4092 case 0: { 4001 case 0: {
4093 if (0 <= kd && DONGLE_MANY > kd) { 4002 if (0 <= kd && DONGLE_MANY > kd) {
@@ -4212,7 +4121,7 @@ static struct usb_device_id easycap_usb_device_id_table[] = {
4212}; 4121};
4213 4122
4214MODULE_DEVICE_TABLE(usb, easycap_usb_device_id_table); 4123MODULE_DEVICE_TABLE(usb, easycap_usb_device_id_table);
4215struct usb_driver easycap_usb_driver = { 4124static struct usb_driver easycap_usb_driver = {
4216 .name = "easycap", 4125 .name = "easycap",
4217 .id_table = easycap_usb_device_id_table, 4126 .id_table = easycap_usb_device_id_table,
4218 .probe = easycap_usb_probe, 4127 .probe = easycap_usb_probe,
diff --git a/drivers/staging/media/easycap/easycap_settings.c b/drivers/staging/media/easycap/easycap_settings.c
index 70f59b13c34..3f5f5b3e5a3 100644
--- a/drivers/staging/media/easycap/easycap_settings.c
+++ b/drivers/staging/media/easycap/easycap_settings.c
@@ -313,7 +313,7 @@ const struct easycap_standard easycap_standard[] = {
313 313
314struct easycap_format easycap_format[1 + SETTINGS_MANY]; 314struct easycap_format easycap_format[1 + SETTINGS_MANY];
315 315
316int fillin_formats(void) 316int easycap_video_fillin_formats(void)
317{ 317{
318 const char *name1, *name2, *name3, *name4; 318 const char *name1, *name2, *name3, *name4;
319 struct v4l2_format *fmt; 319 struct v4l2_format *fmt;
diff --git a/drivers/staging/media/easycap/easycap_sound.c b/drivers/staging/media/easycap/easycap_sound.c
index b22bb39b5f6..8c8bcae8ded 100644
--- a/drivers/staging/media/easycap/easycap_sound.c
+++ b/drivers/staging/media/easycap/easycap_sound.c
@@ -56,6 +56,141 @@ static const struct snd_pcm_hardware alsa_hardware = {
56}; 56};
57 57
58 58
59/*---------------------------------------------------------------------------*/
60/*
61 * SUBMIT ALL AUDIO URBS.
62 */
63/*---------------------------------------------------------------------------*/
64static int easycap_audio_submit_urbs(struct easycap *peasycap)
65{
66 struct data_urb *pdata_urb;
67 struct urb *purb;
68 struct list_head *plist_head;
69 int j, isbad, nospc, m, rc;
70 int isbuf;
71
72 if (!peasycap->purb_audio_head) {
73 SAM("ERROR: peasycap->urb_audio_head uninitialized\n");
74 return -EFAULT;
75 }
76 if (!peasycap->pusb_device) {
77 SAM("ERROR: peasycap->pusb_device is NULL\n");
78 return -EFAULT;
79 }
80
81 if (peasycap->audio_isoc_streaming) {
82 JOM(4, "already streaming audio urbs\n");
83 return 0;
84 }
85
86 JOM(4, "initial submission of all audio urbs\n");
87 rc = usb_set_interface(peasycap->pusb_device,
88 peasycap->audio_interface,
89 peasycap->audio_altsetting_on);
90 JOM(8, "usb_set_interface(.,%i,%i) returned %i\n",
91 peasycap->audio_interface,
92 peasycap->audio_altsetting_on, rc);
93
94 isbad = 0;
95 nospc = 0;
96 m = 0;
97 list_for_each(plist_head, peasycap->purb_audio_head) {
98 pdata_urb = list_entry(plist_head, struct data_urb, list_head);
99 if (pdata_urb && pdata_urb->purb) {
100 purb = pdata_urb->purb;
101 isbuf = pdata_urb->isbuf;
102
103 purb->interval = 1;
104 purb->dev = peasycap->pusb_device;
105 purb->pipe = usb_rcvisocpipe(peasycap->pusb_device,
106 peasycap->audio_endpointnumber);
107 purb->transfer_flags = URB_ISO_ASAP;
108 purb->transfer_buffer = peasycap->audio_isoc_buffer[isbuf].pgo;
109 purb->transfer_buffer_length = peasycap->audio_isoc_buffer_size;
110 purb->complete = easycap_alsa_complete;
111 purb->context = peasycap;
112 purb->start_frame = 0;
113 purb->number_of_packets = peasycap->audio_isoc_framesperdesc;
114 for (j = 0; j < peasycap->audio_isoc_framesperdesc; j++) {
115 purb->iso_frame_desc[j].offset = j * peasycap->audio_isoc_maxframesize;
116 purb->iso_frame_desc[j].length = peasycap->audio_isoc_maxframesize;
117 }
118
119 rc = usb_submit_urb(purb, GFP_KERNEL);
120 if (rc) {
121 isbad++;
122 SAM("ERROR: usb_submit_urb() failed"
123 " for urb with rc: -%s: %d\n",
124 strerror(rc), rc);
125 } else {
126 m++;
127 }
128 } else {
129 isbad++;
130 }
131 }
132 if (nospc) {
133 SAM("-ENOSPC=usb_submit_urb() for %i urbs\n", nospc);
134 SAM("..... possibly inadequate USB bandwidth\n");
135 peasycap->audio_eof = 1;
136 }
137
138 if (isbad)
139 easycap_audio_kill_urbs(peasycap);
140 else
141 peasycap->audio_isoc_streaming = m;
142
143 return 0;
144}
145/*---------------------------------------------------------------------------*/
146/*
147 * COMMON AUDIO INITIALIZATION
148 */
149/*---------------------------------------------------------------------------*/
150static int easycap_sound_setup(struct easycap *peasycap)
151{
152 int rc;
153
154 JOM(4, "starting initialization\n");
155
156 if (!peasycap) {
157 SAY("ERROR: peasycap is NULL.\n");
158 return -EFAULT;
159 }
160 if (!peasycap->pusb_device) {
161 SAM("ERROR: peasycap->pusb_device is NULL\n");
162 return -ENODEV;
163 }
164 JOM(16, "0x%08lX=peasycap->pusb_device\n", (long int)peasycap->pusb_device);
165
166 rc = easycap_audio_setup(peasycap);
167 JOM(8, "audio_setup() returned %i\n", rc);
168
169 if (!peasycap->pusb_device) {
170 SAM("ERROR: peasycap->pusb_device has become NULL\n");
171 return -ENODEV;
172 }
173/*---------------------------------------------------------------------------*/
174 if (!peasycap->pusb_device) {
175 SAM("ERROR: peasycap->pusb_device has become NULL\n");
176 return -ENODEV;
177 }
178 rc = usb_set_interface(peasycap->pusb_device, peasycap->audio_interface,
179 peasycap->audio_altsetting_on);
180 JOM(8, "usb_set_interface(.,%i,%i) returned %i\n", peasycap->audio_interface,
181 peasycap->audio_altsetting_on, rc);
182
183 rc = easycap_wakeup_device(peasycap->pusb_device);
184 JOM(8, "wakeup_device() returned %i\n", rc);
185
186 peasycap->audio_eof = 0;
187 peasycap->audio_idle = 0;
188
189 easycap_audio_submit_urbs(peasycap);
190
191 JOM(4, "finished initialization\n");
192 return 0;
193}
59/*****************************************************************************/ 194/*****************************************************************************/
60/*---------------------------------------------------------------------------*/ 195/*---------------------------------------------------------------------------*/
61/* 196/*
@@ -64,8 +199,7 @@ static const struct snd_pcm_hardware alsa_hardware = {
64 * IT IS RESUBMITTED PROVIDED peasycap->audio_isoc_streaming IS NOT ZERO. 199 * IT IS RESUBMITTED PROVIDED peasycap->audio_isoc_streaming IS NOT ZERO.
65 */ 200 */
66/*---------------------------------------------------------------------------*/ 201/*---------------------------------------------------------------------------*/
67void 202void easycap_alsa_complete(struct urb *purb)
68easycap_alsa_complete(struct urb *purb)
69{ 203{
70 struct easycap *peasycap; 204 struct easycap *peasycap;
71 struct snd_pcm_substream *pss; 205 struct snd_pcm_substream *pss;
@@ -458,7 +592,6 @@ static int easycap_alsa_ack(struct snd_pcm_substream *pss)
458static int easycap_alsa_trigger(struct snd_pcm_substream *pss, int cmd) 592static int easycap_alsa_trigger(struct snd_pcm_substream *pss, int cmd)
459{ 593{
460 struct easycap *peasycap; 594 struct easycap *peasycap;
461 int retval;
462 595
463 JOT(4, "%i=cmd cf %i=START %i=STOP\n", cmd, SNDRV_PCM_TRIGGER_START, 596 JOT(4, "%i=cmd cf %i=START %i=STOP\n", cmd, SNDRV_PCM_TRIGGER_START,
464 SNDRV_PCM_TRIGGER_STOP); 597 SNDRV_PCM_TRIGGER_STOP);
@@ -481,7 +614,7 @@ static int easycap_alsa_trigger(struct snd_pcm_substream *pss, int cmd)
481 break; 614 break;
482 } 615 }
483 default: 616 default:
484 retval = -EINVAL; 617 return -EINVAL;
485 } 618 }
486 return 0; 619 return 0;
487} 620}
@@ -615,202 +748,3 @@ int easycap_alsa_probe(struct easycap *peasycap)
615 return 0; 748 return 0;
616} 749}
617 750
618/*****************************************************************************/
619/*****************************************************************************/
620/*****************************************************************************/
621/*****************************************************************************/
622/*****************************************************************************/
623/*****************************************************************************/
624/*---------------------------------------------------------------------------*/
625/*
626 * COMMON AUDIO INITIALIZATION
627 */
628/*---------------------------------------------------------------------------*/
629int
630easycap_sound_setup(struct easycap *peasycap)
631{
632 int rc;
633
634 JOM(4, "starting initialization\n");
635
636 if (!peasycap) {
637 SAY("ERROR: peasycap is NULL.\n");
638 return -EFAULT;
639 }
640 if (!peasycap->pusb_device) {
641 SAM("ERROR: peasycap->pusb_device is NULL\n");
642 return -ENODEV;
643 }
644 JOM(16, "0x%08lX=peasycap->pusb_device\n", (long int)peasycap->pusb_device);
645
646 rc = audio_setup(peasycap);
647 JOM(8, "audio_setup() returned %i\n", rc);
648
649 if (!peasycap->pusb_device) {
650 SAM("ERROR: peasycap->pusb_device has become NULL\n");
651 return -ENODEV;
652 }
653/*---------------------------------------------------------------------------*/
654 if (!peasycap->pusb_device) {
655 SAM("ERROR: peasycap->pusb_device has become NULL\n");
656 return -ENODEV;
657 }
658 rc = usb_set_interface(peasycap->pusb_device, peasycap->audio_interface,
659 peasycap->audio_altsetting_on);
660 JOM(8, "usb_set_interface(.,%i,%i) returned %i\n", peasycap->audio_interface,
661 peasycap->audio_altsetting_on, rc);
662
663 rc = wakeup_device(peasycap->pusb_device);
664 JOM(8, "wakeup_device() returned %i\n", rc);
665
666 peasycap->audio_eof = 0;
667 peasycap->audio_idle = 0;
668
669 submit_audio_urbs(peasycap);
670
671 JOM(4, "finished initialization\n");
672 return 0;
673}
674/*****************************************************************************/
675/*---------------------------------------------------------------------------*/
676/*
677 * SUBMIT ALL AUDIO URBS.
678 */
679/*---------------------------------------------------------------------------*/
680int
681submit_audio_urbs(struct easycap *peasycap)
682{
683 struct data_urb *pdata_urb;
684 struct urb *purb;
685 struct list_head *plist_head;
686 int j, isbad, nospc, m, rc;
687 int isbuf;
688
689 if (!peasycap) {
690 SAY("ERROR: peasycap is NULL\n");
691 return -EFAULT;
692 }
693 if (!peasycap->purb_audio_head) {
694 SAM("ERROR: peasycap->urb_audio_head uninitialized\n");
695 return -EFAULT;
696 }
697 if (!peasycap->pusb_device) {
698 SAM("ERROR: peasycap->pusb_device is NULL\n");
699 return -EFAULT;
700 }
701
702 if (peasycap->audio_isoc_streaming) {
703 JOM(4, "already streaming audio urbs\n");
704 return 0;
705 }
706
707 JOM(4, "initial submission of all audio urbs\n");
708 rc = usb_set_interface(peasycap->pusb_device,
709 peasycap->audio_interface,
710 peasycap->audio_altsetting_on);
711 JOM(8, "usb_set_interface(.,%i,%i) returned %i\n",
712 peasycap->audio_interface,
713 peasycap->audio_altsetting_on, rc);
714
715 isbad = 0;
716 nospc = 0;
717 m = 0;
718 list_for_each(plist_head, peasycap->purb_audio_head) {
719 pdata_urb = list_entry(plist_head, struct data_urb, list_head);
720 if (pdata_urb && pdata_urb->purb) {
721 purb = pdata_urb->purb;
722 isbuf = pdata_urb->isbuf;
723
724 purb->interval = 1;
725 purb->dev = peasycap->pusb_device;
726 purb->pipe = usb_rcvisocpipe(peasycap->pusb_device,
727 peasycap->audio_endpointnumber);
728 purb->transfer_flags = URB_ISO_ASAP;
729 purb->transfer_buffer = peasycap->audio_isoc_buffer[isbuf].pgo;
730 purb->transfer_buffer_length = peasycap->audio_isoc_buffer_size;
731 purb->complete = easycap_alsa_complete;
732 purb->context = peasycap;
733 purb->start_frame = 0;
734 purb->number_of_packets = peasycap->audio_isoc_framesperdesc;
735 for (j = 0; j < peasycap->audio_isoc_framesperdesc; j++) {
736 purb->iso_frame_desc[j].offset = j * peasycap->audio_isoc_maxframesize;
737 purb->iso_frame_desc[j].length = peasycap->audio_isoc_maxframesize;
738 }
739
740 rc = usb_submit_urb(purb, GFP_KERNEL);
741 if (rc) {
742 isbad++;
743 SAM("ERROR: usb_submit_urb() failed"
744 " for urb with rc: -%s: %d\n",
745 strerror(rc), rc);
746 } else {
747 m++;
748 }
749 } else {
750 isbad++;
751 }
752 }
753 if (nospc) {
754 SAM("-ENOSPC=usb_submit_urb() for %i urbs\n", nospc);
755 SAM("..... possibly inadequate USB bandwidth\n");
756 peasycap->audio_eof = 1;
757 }
758 if (isbad) {
759 JOM(4, "attempting cleanup instead of submitting\n");
760 list_for_each(plist_head, (peasycap->purb_audio_head)) {
761 pdata_urb = list_entry(plist_head, struct data_urb, list_head);
762 if (pdata_urb && pdata_urb->purb)
763 usb_kill_urb(pdata_urb->purb);
764 }
765 peasycap->audio_isoc_streaming = 0;
766 } else {
767 peasycap->audio_isoc_streaming = m;
768 JOM(4, "submitted %i audio urbs\n", m);
769 }
770
771 return 0;
772}
773/*****************************************************************************/
774/*---------------------------------------------------------------------------*/
775/*
776 * KILL ALL AUDIO URBS.
777 */
778/*---------------------------------------------------------------------------*/
779int
780kill_audio_urbs(struct easycap *peasycap)
781{
782 int m;
783 struct list_head *plist_head;
784 struct data_urb *pdata_urb;
785
786 if (!peasycap) {
787 SAY("ERROR: peasycap is NULL\n");
788 return -EFAULT;
789 }
790
791 if (!peasycap->audio_isoc_streaming) {
792 JOM(8, "%i=audio_isoc_streaming, no audio urbs killed\n",
793 peasycap->audio_isoc_streaming);
794 return 0;
795 }
796
797 if (!peasycap->purb_audio_head) {
798 SAM("ERROR: peasycap->purb_audio_head is NULL\n");
799 return -EFAULT;
800 }
801
802 peasycap->audio_isoc_streaming = 0;
803 JOM(4, "killing audio urbs\n");
804 m = 0;
805 list_for_each(plist_head, (peasycap->purb_audio_head)) {
806 pdata_urb = list_entry(plist_head, struct data_urb, list_head);
807 if (pdata_urb && pdata_urb->purb) {
808 usb_kill_urb(pdata_urb->purb);
809 m++;
810 }
811 }
812 JOM(4, "%i audio urbs killed\n", m);
813
814 return 0;
815}
816/*****************************************************************************/
diff --git a/drivers/staging/media/go7007/go7007-usb.c b/drivers/staging/media/go7007/go7007-usb.c
index b7175fe1b15..70e006b50f2 100644
--- a/drivers/staging/media/go7007/go7007-usb.c
+++ b/drivers/staging/media/go7007/go7007-usb.c
@@ -1054,7 +1054,13 @@ static int go7007_usb_probe(struct usb_interface *intf,
1054 else 1054 else
1055 go->hpi_ops = &go7007_usb_onboard_hpi_ops; 1055 go->hpi_ops = &go7007_usb_onboard_hpi_ops;
1056 go->hpi_context = usb; 1056 go->hpi_context = usb;
1057 usb_fill_int_urb(usb->intr_urb, usb->usbdev, 1057 if (go->board_id == GO7007_BOARDID_SENSORAY_2250)
1058 usb_fill_bulk_urb(usb->intr_urb, usb->usbdev,
1059 usb_rcvbulkpipe(usb->usbdev, 4),
1060 usb->intr_urb->transfer_buffer, 2*sizeof(u16),
1061 go7007_usb_readinterrupt_complete, go);
1062 else
1063 usb_fill_int_urb(usb->intr_urb, usb->usbdev,
1058 usb_rcvintpipe(usb->usbdev, 4), 1064 usb_rcvintpipe(usb->usbdev, 4),
1059 usb->intr_urb->transfer_buffer, 2*sizeof(u16), 1065 usb->intr_urb->transfer_buffer, 2*sizeof(u16),
1060 go7007_usb_readinterrupt_complete, go, 8); 1066 go7007_usb_readinterrupt_complete, go, 8);
diff --git a/drivers/staging/media/lirc/lirc_imon.c b/drivers/staging/media/lirc/lirc_imon.c
index f68218012f2..5f7f8cd3a66 100644
--- a/drivers/staging/media/lirc/lirc_imon.c
+++ b/drivers/staging/media/lirc/lirc_imon.c
@@ -63,7 +63,7 @@ static int display_open(struct inode *inode, struct file *file);
63static int display_close(struct inode *inode, struct file *file); 63static int display_close(struct inode *inode, struct file *file);
64 64
65/* VFD write operation */ 65/* VFD write operation */
66static ssize_t vfd_write(struct file *file, const char *buf, 66static ssize_t vfd_write(struct file *file, const char __user *buf,
67 size_t n_bytes, loff_t *pos); 67 size_t n_bytes, loff_t *pos);
68 68
69/* LIRC driver function prototypes */ 69/* LIRC driver function prototypes */
@@ -369,7 +369,7 @@ static int send_packet(struct imon_context *context)
369 * than 32 bytes are provided spaces will be appended to 369 * than 32 bytes are provided spaces will be appended to
370 * generate a full screen. 370 * generate a full screen.
371 */ 371 */
372static ssize_t vfd_write(struct file *file, const char *buf, 372static ssize_t vfd_write(struct file *file, const char __user *buf,
373 size_t n_bytes, loff_t *pos) 373 size_t n_bytes, loff_t *pos)
374{ 374{
375 int i; 375 int i;
diff --git a/drivers/staging/media/lirc/lirc_serial.c b/drivers/staging/media/lirc/lirc_serial.c
index 2aac67c9828..8dd8897ad86 100644
--- a/drivers/staging/media/lirc/lirc_serial.c
+++ b/drivers/staging/media/lirc/lirc_serial.c
@@ -773,7 +773,7 @@ static int hardware_init_port(void)
773 /* we fail, there's nothing here */ 773 /* we fail, there's nothing here */
774 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test " 774 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
775 "failed, cannot continue\n"); 775 "failed, cannot continue\n");
776 return -EINVAL; 776 return -ENODEV;
777 } 777 }
778 778
779 779
@@ -836,25 +836,22 @@ static int hardware_init_port(void)
836 return 0; 836 return 0;
837} 837}
838 838
839static int init_port(void) 839static int __devinit lirc_serial_probe(struct platform_device *dev)
840{ 840{
841 int i, nlow, nhigh, result; 841 int i, nlow, nhigh, result;
842 842
843 result = request_irq(irq, irq_handler, 843 result = request_irq(irq, irq_handler,
844 (share_irq ? IRQF_SHARED : 0), 844 (share_irq ? IRQF_SHARED : 0),
845 LIRC_DRIVER_NAME, (void *)&hardware); 845 LIRC_DRIVER_NAME, (void *)&hardware);
846 846 if (result < 0) {
847 switch (result) { 847 if (result == -EBUSY)
848 case -EBUSY: 848 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
849 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq); 849 irq);
850 return -EBUSY; 850 else if (result == -EINVAL)
851 case -EINVAL: 851 printk(KERN_ERR LIRC_DRIVER_NAME
852 printk(KERN_ERR LIRC_DRIVER_NAME 852 ": Bad irq number or handler\n");
853 ": Bad irq number or handler\n"); 853 return result;
854 return -EINVAL; 854 }
855 default:
856 break;
857 };
858 855
859 /* Reserve io region. */ 856 /* Reserve io region. */
860 /* 857 /*
@@ -875,11 +872,13 @@ static int init_port(void)
875 ": or compile the serial port driver as module and\n"); 872 ": or compile the serial port driver as module and\n");
876 printk(KERN_WARNING LIRC_DRIVER_NAME 873 printk(KERN_WARNING LIRC_DRIVER_NAME
877 ": make sure this module is loaded first\n"); 874 ": make sure this module is loaded first\n");
878 return -EBUSY; 875 result = -EBUSY;
876 goto exit_free_irq;
879 } 877 }
880 878
881 if (hardware_init_port() < 0) 879 result = hardware_init_port();
882 return -EINVAL; 880 if (result < 0)
881 goto exit_release_region;
883 882
884 /* Initialize pulse/space widths */ 883 /* Initialize pulse/space widths */
885 init_timing_params(duty_cycle, freq); 884 init_timing_params(duty_cycle, freq);
@@ -911,6 +910,28 @@ static int init_port(void)
911 910
912 dprintk("Interrupt %d, port %04x obtained\n", irq, io); 911 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
913 return 0; 912 return 0;
913
914exit_release_region:
915 if (iommap != 0)
916 release_mem_region(iommap, 8 << ioshift);
917 else
918 release_region(io, 8);
919exit_free_irq:
920 free_irq(irq, (void *)&hardware);
921
922 return result;
923}
924
925static int __devexit lirc_serial_remove(struct platform_device *dev)
926{
927 free_irq(irq, (void *)&hardware);
928
929 if (iommap != 0)
930 release_mem_region(iommap, 8 << ioshift);
931 else
932 release_region(io, 8);
933
934 return 0;
914} 935}
915 936
916static int set_use_inc(void *data) 937static int set_use_inc(void *data)
@@ -955,7 +976,7 @@ static ssize_t lirc_write(struct file *file, const char *buf,
955 int *wbuf; 976 int *wbuf;
956 977
957 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE)) 978 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
958 return -EBADF; 979 return -EPERM;
959 980
960 count = n / sizeof(int); 981 count = n / sizeof(int);
961 if (n % sizeof(int) || count % 2 == 0) 982 if (n % sizeof(int) || count % 2 == 0)
@@ -1006,11 +1027,11 @@ static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1006 return result; 1027 return result;
1007 /* only LIRC_MODE_PULSE supported */ 1028 /* only LIRC_MODE_PULSE supported */
1008 if (value != LIRC_MODE_PULSE) 1029 if (value != LIRC_MODE_PULSE)
1009 return -ENOSYS; 1030 return -EINVAL;
1010 break; 1031 break;
1011 1032
1012 case LIRC_GET_LENGTH: 1033 case LIRC_GET_LENGTH:
1013 return -ENOSYS; 1034 return -ENOIOCTLCMD;
1014 break; 1035 break;
1015 1036
1016 case LIRC_SET_SEND_DUTY_CYCLE: 1037 case LIRC_SET_SEND_DUTY_CYCLE:
@@ -1076,16 +1097,6 @@ static struct lirc_driver driver = {
1076 1097
1077static struct platform_device *lirc_serial_dev; 1098static struct platform_device *lirc_serial_dev;
1078 1099
1079static int __devinit lirc_serial_probe(struct platform_device *dev)
1080{
1081 return 0;
1082}
1083
1084static int __devexit lirc_serial_remove(struct platform_device *dev)
1085{
1086 return 0;
1087}
1088
1089static int lirc_serial_suspend(struct platform_device *dev, 1100static int lirc_serial_suspend(struct platform_device *dev,
1090 pm_message_t state) 1101 pm_message_t state)
1091{ 1102{
@@ -1111,11 +1122,11 @@ static void lirc_serial_exit(void);
1111static int lirc_serial_resume(struct platform_device *dev) 1122static int lirc_serial_resume(struct platform_device *dev)
1112{ 1123{
1113 unsigned long flags; 1124 unsigned long flags;
1125 int result;
1114 1126
1115 if (hardware_init_port() < 0) { 1127 result = hardware_init_port();
1116 lirc_serial_exit(); 1128 if (result < 0)
1117 return -EINVAL; 1129 return result;
1118 }
1119 1130
1120 spin_lock_irqsave(&hardware[type].lock, flags); 1131 spin_lock_irqsave(&hardware[type].lock, flags);
1121 /* Enable Interrupt */ 1132 /* Enable Interrupt */
@@ -1148,7 +1159,7 @@ static int __init lirc_serial_init(void)
1148 /* Init read buffer. */ 1159 /* Init read buffer. */
1149 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN); 1160 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1150 if (result < 0) 1161 if (result < 0)
1151 return -ENOMEM; 1162 return result;
1152 1163
1153 result = platform_driver_register(&lirc_serial_driver); 1164 result = platform_driver_register(&lirc_serial_driver);
1154 if (result) { 1165 if (result) {
@@ -1188,10 +1199,6 @@ static int __init lirc_serial_init_module(void)
1188{ 1199{
1189 int result; 1200 int result;
1190 1201
1191 result = lirc_serial_init();
1192 if (result)
1193 return result;
1194
1195 switch (type) { 1202 switch (type) {
1196 case LIRC_HOMEBREW: 1203 case LIRC_HOMEBREW:
1197 case LIRC_IRDEO: 1204 case LIRC_IRDEO:
@@ -1211,8 +1218,7 @@ static int __init lirc_serial_init_module(void)
1211 break; 1218 break;
1212#endif 1219#endif
1213 default: 1220 default:
1214 result = -EINVAL; 1221 return -EINVAL;
1215 goto exit_serial_exit;
1216 } 1222 }
1217 if (!softcarrier) { 1223 if (!softcarrier) {
1218 switch (type) { 1224 switch (type) {
@@ -1228,37 +1234,26 @@ static int __init lirc_serial_init_module(void)
1228 } 1234 }
1229 } 1235 }
1230 1236
1231 result = init_port(); 1237 result = lirc_serial_init();
1232 if (result < 0) 1238 if (result)
1233 goto exit_serial_exit; 1239 return result;
1240
1234 driver.features = hardware[type].features; 1241 driver.features = hardware[type].features;
1235 driver.dev = &lirc_serial_dev->dev; 1242 driver.dev = &lirc_serial_dev->dev;
1236 driver.minor = lirc_register_driver(&driver); 1243 driver.minor = lirc_register_driver(&driver);
1237 if (driver.minor < 0) { 1244 if (driver.minor < 0) {
1238 printk(KERN_ERR LIRC_DRIVER_NAME 1245 printk(KERN_ERR LIRC_DRIVER_NAME
1239 ": register_chrdev failed!\n"); 1246 ": register_chrdev failed!\n");
1240 result = -EIO; 1247 lirc_serial_exit();
1241 goto exit_release; 1248 return driver.minor;
1242 } 1249 }
1243 return 0; 1250 return 0;
1244exit_release:
1245 release_region(io, 8);
1246exit_serial_exit:
1247 lirc_serial_exit();
1248 return result;
1249} 1251}
1250 1252
1251static void __exit lirc_serial_exit_module(void) 1253static void __exit lirc_serial_exit_module(void)
1252{ 1254{
1253 lirc_serial_exit();
1254
1255 free_irq(irq, (void *)&hardware);
1256
1257 if (iommap != 0)
1258 release_mem_region(iommap, 8 << ioshift);
1259 else
1260 release_region(io, 8);
1261 lirc_unregister_driver(driver.minor); 1255 lirc_unregister_driver(driver.minor);
1256 lirc_serial_exit();
1262 dprintk("cleaned up module\n"); 1257 dprintk("cleaned up module\n");
1263} 1258}
1264 1259
diff --git a/drivers/staging/media/solo6x10/Makefile b/drivers/staging/media/solo6x10/Makefile
index 72816cf1670..337e38c3a0f 100644
--- a/drivers/staging/media/solo6x10/Makefile
+++ b/drivers/staging/media/solo6x10/Makefile
@@ -1,3 +1,3 @@
1solo6x10-y := core.o i2c.o p2m.o v4l2.o tw28.o gpio.o disp.o enc.o v4l2-enc.o g723.o 1solo6x10-y := core.o i2c.o p2m.o v4l2.o tw28.o gpio.o disp.o enc.o v4l2-enc.o g723.o
2 2
3obj-$(CONFIG_SOLO6X10) := solo6x10.o 3obj-$(CONFIG_SOLO6X10) += solo6x10.o
diff --git a/drivers/staging/media/solo6x10/jpeg.h b/drivers/staging/media/solo6x10/solo6x10-jpeg.h
index 50defec318c..50defec318c 100644
--- a/drivers/staging/media/solo6x10/jpeg.h
+++ b/drivers/staging/media/solo6x10/solo6x10-jpeg.h
diff --git a/drivers/staging/media/solo6x10/v4l2-enc.c b/drivers/staging/media/solo6x10/v4l2-enc.c
index bee7280bbed..f8f0da95228 100644
--- a/drivers/staging/media/solo6x10/v4l2-enc.c
+++ b/drivers/staging/media/solo6x10/v4l2-enc.c
@@ -26,7 +26,7 @@
26#include <media/videobuf-dma-sg.h> 26#include <media/videobuf-dma-sg.h>
27#include "solo6x10.h" 27#include "solo6x10.h"
28#include "tw28.h" 28#include "tw28.h"
29#include "jpeg.h" 29#include "solo6x10-jpeg.h"
30 30
31#define MIN_VID_BUFFERS 4 31#define MIN_VID_BUFFERS 4
32#define FRAME_BUF_SIZE (128 * 1024) 32#define FRAME_BUF_SIZE (128 * 1024)