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path: root/drivers/media/dvb/frontends/mb86a20s.c
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Diffstat (limited to 'drivers/media/dvb/frontends/mb86a20s.c')
-rw-r--r--drivers/media/dvb/frontends/mb86a20s.c546
1 files changed, 304 insertions, 242 deletions
diff --git a/drivers/media/dvb/frontends/mb86a20s.c b/drivers/media/dvb/frontends/mb86a20s.c
index 0f867a5055f..7fa3e472cdc 100644
--- a/drivers/media/dvb/frontends/mb86a20s.c
+++ b/drivers/media/dvb/frontends/mb86a20s.c
@@ -61,244 +61,111 @@ static struct regdata mb86a20s_init[] = {
61 { 0x70, 0xff }, 61 { 0x70, 0xff },
62 { 0x08, 0x01 }, 62 { 0x08, 0x01 },
63 { 0x09, 0x3e }, 63 { 0x09, 0x3e },
64 { 0x50, 0xd1 }, 64 { 0x50, 0xd1 }, { 0x51, 0x22 },
65 { 0x51, 0x22 },
66 { 0x39, 0x01 }, 65 { 0x39, 0x01 },
67 { 0x71, 0x00 }, 66 { 0x71, 0x00 },
68 { 0x28, 0x2a }, 67 { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
69 { 0x29, 0x00 }, 68 { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
70 { 0x2a, 0xff }, 69 { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
71 { 0x2b, 0x80 },
72 { 0x28, 0x20 },
73 { 0x29, 0x33 },
74 { 0x2a, 0xdf },
75 { 0x2b, 0xa9 },
76 { 0x3b, 0x21 }, 70 { 0x3b, 0x21 },
77 { 0x3c, 0x3a }, 71 { 0x3c, 0x3a },
78 { 0x01, 0x0d }, 72 { 0x01, 0x0d },
79 { 0x04, 0x08 }, 73 { 0x04, 0x08 }, { 0x05, 0x05 },
80 { 0x05, 0x05 }, 74 { 0x04, 0x0e }, { 0x05, 0x00 },
81 { 0x04, 0x0e }, 75 { 0x04, 0x0f }, { 0x05, 0x14 },
82 { 0x05, 0x00 }, 76 { 0x04, 0x0b }, { 0x05, 0x8c },
83 { 0x04, 0x0f }, 77 { 0x04, 0x00 }, { 0x05, 0x00 },
84 { 0x05, 0x14 }, 78 { 0x04, 0x01 }, { 0x05, 0x07 },
85 { 0x04, 0x0b }, 79 { 0x04, 0x02 }, { 0x05, 0x0f },
86 { 0x05, 0x8c }, 80 { 0x04, 0x03 }, { 0x05, 0xa0 },
87 { 0x04, 0x00 }, 81 { 0x04, 0x09 }, { 0x05, 0x00 },
88 { 0x05, 0x00 }, 82 { 0x04, 0x0a }, { 0x05, 0xff },
89 { 0x04, 0x01 }, 83 { 0x04, 0x27 }, { 0x05, 0x64 },
90 { 0x05, 0x07 }, 84 { 0x04, 0x28 }, { 0x05, 0x00 },
91 { 0x04, 0x02 }, 85 { 0x04, 0x1e }, { 0x05, 0xff },
92 { 0x05, 0x0f }, 86 { 0x04, 0x29 }, { 0x05, 0x0a },
93 { 0x04, 0x03 }, 87 { 0x04, 0x32 }, { 0x05, 0x0a },
94 { 0x05, 0xa0 }, 88 { 0x04, 0x14 }, { 0x05, 0x02 },
95 { 0x04, 0x09 }, 89 { 0x04, 0x04 }, { 0x05, 0x00 },
96 { 0x05, 0x00 }, 90 { 0x04, 0x05 }, { 0x05, 0x22 },
97 { 0x04, 0x0a }, 91 { 0x04, 0x06 }, { 0x05, 0x0e },
98 { 0x05, 0xff }, 92 { 0x04, 0x07 }, { 0x05, 0xd8 },
99 { 0x04, 0x27 }, 93 { 0x04, 0x12 }, { 0x05, 0x00 },
100 { 0x05, 0x64 }, 94 { 0x04, 0x13 }, { 0x05, 0xff },
101 { 0x04, 0x28 }, 95 { 0x04, 0x15 }, { 0x05, 0x4e },
102 { 0x05, 0x00 }, 96 { 0x04, 0x16 }, { 0x05, 0x20 },
103 { 0x04, 0x1e },
104 { 0x05, 0xff },
105 { 0x04, 0x29 },
106 { 0x05, 0x0a },
107 { 0x04, 0x32 },
108 { 0x05, 0x0a },
109 { 0x04, 0x14 },
110 { 0x05, 0x02 },
111 { 0x04, 0x04 },
112 { 0x05, 0x00 },
113 { 0x04, 0x05 },
114 { 0x05, 0x22 },
115 { 0x04, 0x06 },
116 { 0x05, 0x0e },
117 { 0x04, 0x07 },
118 { 0x05, 0xd8 },
119 { 0x04, 0x12 },
120 { 0x05, 0x00 },
121 { 0x04, 0x13 },
122 { 0x05, 0xff },
123 { 0x52, 0x01 }, 97 { 0x52, 0x01 },
124 { 0x50, 0xa7 }, 98 { 0x50, 0xa7 }, { 0x51, 0xff },
125 { 0x51, 0x00 }, 99 { 0x50, 0xa8 }, { 0x51, 0xff },
126 { 0x50, 0xa8 }, 100 { 0x50, 0xa9 }, { 0x51, 0xff },
127 { 0x51, 0xff }, 101 { 0x50, 0xaa }, { 0x51, 0xff },
128 { 0x50, 0xa9 }, 102 { 0x50, 0xab }, { 0x51, 0xff },
129 { 0x51, 0xff }, 103 { 0x50, 0xac }, { 0x51, 0xff },
130 { 0x50, 0xaa }, 104 { 0x50, 0xad }, { 0x51, 0xff },
131 { 0x51, 0x00 }, 105 { 0x50, 0xae }, { 0x51, 0xff },
132 { 0x50, 0xab }, 106 { 0x50, 0xaf }, { 0x51, 0xff },
133 { 0x51, 0xff },
134 { 0x50, 0xac },
135 { 0x51, 0xff },
136 { 0x50, 0xad },
137 { 0x51, 0x00 },
138 { 0x50, 0xae },
139 { 0x51, 0xff },
140 { 0x50, 0xaf },
141 { 0x51, 0xff },
142 { 0x5e, 0x07 }, 107 { 0x5e, 0x07 },
143 { 0x50, 0xdc }, 108 { 0x50, 0xdc }, { 0x51, 0x01 },
144 { 0x51, 0x01 }, 109 { 0x50, 0xdd }, { 0x51, 0xf4 },
145 { 0x50, 0xdd }, 110 { 0x50, 0xde }, { 0x51, 0x01 },
146 { 0x51, 0xf4 }, 111 { 0x50, 0xdf }, { 0x51, 0xf4 },
147 { 0x50, 0xde }, 112 { 0x50, 0xe0 }, { 0x51, 0x01 },
148 { 0x51, 0x01 }, 113 { 0x50, 0xe1 }, { 0x51, 0xf4 },
149 { 0x50, 0xdf }, 114 { 0x50, 0xb0 }, { 0x51, 0x07 },
150 { 0x51, 0xf4 }, 115 { 0x50, 0xb2 }, { 0x51, 0xff },
151 { 0x50, 0xe0 }, 116 { 0x50, 0xb3 }, { 0x51, 0xff },
152 { 0x51, 0x01 }, 117 { 0x50, 0xb4 }, { 0x51, 0xff },
153 { 0x50, 0xe1 }, 118 { 0x50, 0xb5 }, { 0x51, 0xff },
154 { 0x51, 0xf4 }, 119 { 0x50, 0xb6 }, { 0x51, 0xff },
155 { 0x50, 0xb0 }, 120 { 0x50, 0xb7 }, { 0x51, 0xff },
156 { 0x51, 0x07 }, 121 { 0x50, 0x50 }, { 0x51, 0x02 },
157 { 0x50, 0xb2 }, 122 { 0x50, 0x51 }, { 0x51, 0x04 },
158 { 0x51, 0xff },
159 { 0x50, 0xb3 },
160 { 0x51, 0xff },
161 { 0x50, 0xb4 },
162 { 0x51, 0xff },
163 { 0x50, 0xb5 },
164 { 0x51, 0xff },
165 { 0x50, 0xb6 },
166 { 0x51, 0xff },
167 { 0x50, 0xb7 },
168 { 0x51, 0xff },
169 { 0x50, 0x50 },
170 { 0x51, 0x02 },
171 { 0x50, 0x51 },
172 { 0x51, 0x04 },
173 { 0x45, 0x04 }, 123 { 0x45, 0x04 },
174 { 0x48, 0x04 }, 124 { 0x48, 0x04 },
175 { 0x50, 0xd5 }, 125 { 0x50, 0xd5 }, { 0x51, 0x01 }, /* Serial */
176 { 0x51, 0x01 }, /* Serial */ 126 { 0x50, 0xd6 }, { 0x51, 0x1f },
177 { 0x50, 0xd6 }, 127 { 0x50, 0xd2 }, { 0x51, 0x03 },
178 { 0x51, 0x1f }, 128 { 0x50, 0xd7 }, { 0x51, 0x3f },
179 { 0x50, 0xd2 }, 129 { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
180 { 0x51, 0x03 }, 130 { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
181 { 0x50, 0xd7 }, 131 { 0x04, 0x40 }, { 0x05, 0x01 },
182 { 0x51, 0x3f }, 132 { 0x28, 0x00 }, { 0x29, 0x10 },
133 { 0x28, 0x05 }, { 0x29, 0x02 },
183 { 0x1c, 0x01 }, 134 { 0x1c, 0x01 },
184 { 0x28, 0x06 }, 135 { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
185 { 0x29, 0x00 }, 136 { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
186 { 0x2a, 0x00 }, 137 { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
187 { 0x2b, 0x03 }, 138 { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
188 { 0x28, 0x07 }, 139 { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
189 { 0x29, 0x00 }, 140 { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
190 { 0x2a, 0x00 }, 141 { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
191 { 0x2b, 0x0d }, 142 { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
192 { 0x28, 0x08 }, 143 { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
193 { 0x29, 0x00 }, 144 { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
194 { 0x2a, 0x00 }, 145 { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
195 { 0x2b, 0x02 }, 146 { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
196 { 0x28, 0x09 }, 147 { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
197 { 0x29, 0x00 }, 148 { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
198 { 0x2a, 0x00 }, 149 { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
199 { 0x2b, 0x01 }, 150 { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
200 { 0x28, 0x0a }, 151 { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
201 { 0x29, 0x00 }, 152 { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
202 { 0x2a, 0x00 }, 153 { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
203 { 0x2b, 0x21 }, 154 { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
204 { 0x28, 0x0b }, 155 { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
205 { 0x29, 0x00 }, 156 { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
206 { 0x2a, 0x00 }, 157 { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
207 { 0x2b, 0x29 }, 158 { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
208 { 0x28, 0x0c }, 159 { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
209 { 0x29, 0x00 }, 160 { 0x50, 0x1e }, { 0x51, 0x5d },
210 { 0x2a, 0x00 }, 161 { 0x50, 0x22 }, { 0x51, 0x00 },
211 { 0x2b, 0x16 }, 162 { 0x50, 0x23 }, { 0x51, 0xc8 },
212 { 0x28, 0x0d }, 163 { 0x50, 0x24 }, { 0x51, 0x00 },
213 { 0x29, 0x00 }, 164 { 0x50, 0x25 }, { 0x51, 0xf0 },
214 { 0x2a, 0x00 }, 165 { 0x50, 0x26 }, { 0x51, 0x00 },
215 { 0x2b, 0x31 }, 166 { 0x50, 0x27 }, { 0x51, 0xc3 },
216 { 0x28, 0x0e }, 167 { 0x50, 0x39 }, { 0x51, 0x02 },
217 { 0x29, 0x00 }, 168 { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
218 { 0x2a, 0x00 },
219 { 0x2b, 0x0e },
220 { 0x28, 0x0f },
221 { 0x29, 0x00 },
222 { 0x2a, 0x00 },
223 { 0x2b, 0x4e },
224 { 0x28, 0x10 },
225 { 0x29, 0x00 },
226 { 0x2a, 0x00 },
227 { 0x2b, 0x46 },
228 { 0x28, 0x11 },
229 { 0x29, 0x00 },
230 { 0x2a, 0x00 },
231 { 0x2b, 0x0f },
232 { 0x28, 0x12 },
233 { 0x29, 0x00 },
234 { 0x2a, 0x00 },
235 { 0x2b, 0x56 },
236 { 0x28, 0x13 },
237 { 0x29, 0x00 },
238 { 0x2a, 0x00 },
239 { 0x2b, 0x35 },
240 { 0x28, 0x14 },
241 { 0x29, 0x00 },
242 { 0x2a, 0x01 },
243 { 0x2b, 0xbe },
244 { 0x28, 0x15 },
245 { 0x29, 0x00 },
246 { 0x2a, 0x01 },
247 { 0x2b, 0x84 },
248 { 0x28, 0x16 },
249 { 0x29, 0x00 },
250 { 0x2a, 0x03 },
251 { 0x2b, 0xee },
252 { 0x28, 0x17 },
253 { 0x29, 0x00 },
254 { 0x2a, 0x00 },
255 { 0x2b, 0x98 },
256 { 0x28, 0x18 },
257 { 0x29, 0x00 },
258 { 0x2a, 0x00 },
259 { 0x2b, 0x9f },
260 { 0x28, 0x19 },
261 { 0x29, 0x00 },
262 { 0x2a, 0x07 },
263 { 0x2b, 0xb2 },
264 { 0x28, 0x1a },
265 { 0x29, 0x00 },
266 { 0x2a, 0x06 },
267 { 0x2b, 0xc2 },
268 { 0x28, 0x1b },
269 { 0x29, 0x00 },
270 { 0x2a, 0x07 },
271 { 0x2b, 0x4a },
272 { 0x28, 0x1c },
273 { 0x29, 0x00 },
274 { 0x2a, 0x01 },
275 { 0x2b, 0xbc },
276 { 0x28, 0x1d },
277 { 0x29, 0x00 },
278 { 0x2a, 0x04 },
279 { 0x2b, 0xba },
280 { 0x28, 0x1e },
281 { 0x29, 0x00 },
282 { 0x2a, 0x06 },
283 { 0x2b, 0x14 },
284 { 0x50, 0x1e },
285 { 0x51, 0x5d },
286 { 0x50, 0x22 },
287 { 0x51, 0x00 },
288 { 0x50, 0x23 },
289 { 0x51, 0xc8 },
290 { 0x50, 0x24 },
291 { 0x51, 0x00 },
292 { 0x50, 0x25 },
293 { 0x51, 0xf0 },
294 { 0x50, 0x26 },
295 { 0x51, 0x00 },
296 { 0x50, 0x27 },
297 { 0x51, 0xc3 },
298 { 0x50, 0x39 },
299 { 0x51, 0x02 },
300 { 0x50, 0xd5 },
301 { 0x51, 0x01 },
302 { 0xd0, 0x00 }, 169 { 0xd0, 0x00 },
303}; 170};
304 171
@@ -485,18 +352,23 @@ static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
485 return 0; 352 return 0;
486} 353}
487 354
488static int mb86a20s_set_frontend(struct dvb_frontend *fe, 355static int mb86a20s_set_frontend(struct dvb_frontend *fe)
489 struct dvb_frontend_parameters *p)
490{ 356{
491 struct mb86a20s_state *state = fe->demodulator_priv; 357 struct mb86a20s_state *state = fe->demodulator_priv;
492 int rc; 358 int rc;
359#if 0
360 /*
361 * FIXME: Properly implement the set frontend properties
362 */
363 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
364#endif
493 365
494 dprintk("\n"); 366 dprintk("\n");
495 367
496 if (fe->ops.i2c_gate_ctrl) 368 if (fe->ops.i2c_gate_ctrl)
497 fe->ops.i2c_gate_ctrl(fe, 1); 369 fe->ops.i2c_gate_ctrl(fe, 1);
498 dprintk("Calling tuner set parameters\n"); 370 dprintk("Calling tuner set parameters\n");
499 fe->ops.tuner_ops.set_params(fe, p); 371 fe->ops.tuner_ops.set_params(fe);
500 372
501 /* 373 /*
502 * Make it more reliable: if, for some reason, the initial 374 * Make it more reliable: if, for some reason, the initial
@@ -520,22 +392,212 @@ static int mb86a20s_set_frontend(struct dvb_frontend *fe,
520 return rc; 392 return rc;
521} 393}
522 394
523static int mb86a20s_get_frontend(struct dvb_frontend *fe, 395static int mb86a20s_get_modulation(struct mb86a20s_state *state,
524 struct dvb_frontend_parameters *p) 396 unsigned layer)
397{
398 int rc;
399 static unsigned char reg[] = {
400 [0] = 0x86, /* Layer A */
401 [1] = 0x8a, /* Layer B */
402 [2] = 0x8e, /* Layer C */
403 };
404
405 if (layer > ARRAY_SIZE(reg))
406 return -EINVAL;
407 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
408 if (rc < 0)
409 return rc;
410 rc = mb86a20s_readreg(state, 0x6e);
411 if (rc < 0)
412 return rc;
413 switch ((rc & 0x70) >> 4) {
414 case 0:
415 return DQPSK;
416 case 1:
417 return QPSK;
418 case 2:
419 return QAM_16;
420 case 3:
421 return QAM_64;
422 default:
423 return QAM_AUTO;
424 }
425}
426
427static int mb86a20s_get_fec(struct mb86a20s_state *state,
428 unsigned layer)
525{ 429{
430 int rc;
526 431
527 /* FIXME: For now, it does nothing */ 432 static unsigned char reg[] = {
433 [0] = 0x87, /* Layer A */
434 [1] = 0x8b, /* Layer B */
435 [2] = 0x8f, /* Layer C */
436 };
528 437
529 fe->dtv_property_cache.bandwidth_hz = 6000000; 438 if (layer > ARRAY_SIZE(reg))
530 fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO; 439 return -EINVAL;
531 fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO; 440 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
532 fe->dtv_property_cache.isdbt_partial_reception = 0; 441 if (rc < 0)
442 return rc;
443 rc = mb86a20s_readreg(state, 0x6e);
444 if (rc < 0)
445 return rc;
446 switch (rc) {
447 case 0:
448 return FEC_1_2;
449 case 1:
450 return FEC_2_3;
451 case 2:
452 return FEC_3_4;
453 case 3:
454 return FEC_5_6;
455 case 4:
456 return FEC_7_8;
457 default:
458 return FEC_AUTO;
459 }
460}
461
462static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
463 unsigned layer)
464{
465 int rc;
466
467 static unsigned char reg[] = {
468 [0] = 0x88, /* Layer A */
469 [1] = 0x8c, /* Layer B */
470 [2] = 0x90, /* Layer C */
471 };
472
473 if (layer > ARRAY_SIZE(reg))
474 return -EINVAL;
475 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
476 if (rc < 0)
477 return rc;
478 rc = mb86a20s_readreg(state, 0x6e);
479 if (rc < 0)
480 return rc;
481 if (rc > 3)
482 return -EINVAL; /* Not used */
483 return rc;
484}
485
486static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
487 unsigned layer)
488{
489 int rc, count;
490
491 static unsigned char reg[] = {
492 [0] = 0x89, /* Layer A */
493 [1] = 0x8d, /* Layer B */
494 [2] = 0x91, /* Layer C */
495 };
496
497 if (layer > ARRAY_SIZE(reg))
498 return -EINVAL;
499 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
500 if (rc < 0)
501 return rc;
502 rc = mb86a20s_readreg(state, 0x6e);
503 if (rc < 0)
504 return rc;
505 count = (rc >> 4) & 0x0f;
506
507 return count;
508}
509
510static int mb86a20s_get_frontend(struct dvb_frontend *fe)
511{
512 struct mb86a20s_state *state = fe->demodulator_priv;
513 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
514 int i, rc;
515
516 /* Fixed parameters */
517 p->delivery_system = SYS_ISDBT;
518 p->bandwidth_hz = 6000000;
519
520 if (fe->ops.i2c_gate_ctrl)
521 fe->ops.i2c_gate_ctrl(fe, 0);
522
523 /* Check for partial reception */
524 rc = mb86a20s_writereg(state, 0x6d, 0x85);
525 if (rc >= 0)
526 rc = mb86a20s_readreg(state, 0x6e);
527 if (rc >= 0)
528 p->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
529
530 /* Get per-layer data */
531 p->isdbt_layer_enabled = 0;
532 for (i = 0; i < 3; i++) {
533 rc = mb86a20s_get_segment_count(state, i);
534 if (rc >= 0 && rc < 14)
535 p->layer[i].segment_count = rc;
536 if (rc == 0x0f)
537 continue;
538 p->isdbt_layer_enabled |= 1 << i;
539 rc = mb86a20s_get_modulation(state, i);
540 if (rc >= 0)
541 p->layer[i].modulation = rc;
542 rc = mb86a20s_get_fec(state, i);
543 if (rc >= 0)
544 p->layer[i].fec = rc;
545 rc = mb86a20s_get_interleaving(state, i);
546 if (rc >= 0)
547 p->layer[i].interleaving = rc;
548 }
549
550 p->isdbt_sb_mode = 0;
551 rc = mb86a20s_writereg(state, 0x6d, 0x84);
552 if ((rc >= 0) && ((rc & 0x60) == 0x20)) {
553 p->isdbt_sb_mode = 1;
554 /* At least, one segment should exist */
555 if (!p->isdbt_sb_segment_count)
556 p->isdbt_sb_segment_count = 1;
557 } else
558 p->isdbt_sb_segment_count = 0;
559
560 /* Get transmission mode and guard interval */
561 p->transmission_mode = TRANSMISSION_MODE_AUTO;
562 p->guard_interval = GUARD_INTERVAL_AUTO;
563 rc = mb86a20s_readreg(state, 0x07);
564 if (rc >= 0) {
565 if ((rc & 0x60) == 0x20) {
566 switch (rc & 0x0c >> 2) {
567 case 0:
568 p->transmission_mode = TRANSMISSION_MODE_2K;
569 break;
570 case 1:
571 p->transmission_mode = TRANSMISSION_MODE_4K;
572 break;
573 case 2:
574 p->transmission_mode = TRANSMISSION_MODE_8K;
575 break;
576 }
577 }
578 if (!(rc & 0x10)) {
579 switch (rc & 0x3) {
580 case 0:
581 p->guard_interval = GUARD_INTERVAL_1_4;
582 break;
583 case 1:
584 p->guard_interval = GUARD_INTERVAL_1_8;
585 break;
586 case 2:
587 p->guard_interval = GUARD_INTERVAL_1_16;
588 break;
589 }
590 }
591 }
592
593 if (fe->ops.i2c_gate_ctrl)
594 fe->ops.i2c_gate_ctrl(fe, 1);
533 595
534 return 0; 596 return 0;
535} 597}
536 598
537static int mb86a20s_tune(struct dvb_frontend *fe, 599static int mb86a20s_tune(struct dvb_frontend *fe,
538 struct dvb_frontend_parameters *params, 600 bool re_tune,
539 unsigned int mode_flags, 601 unsigned int mode_flags,
540 unsigned int *delay, 602 unsigned int *delay,
541 fe_status_t *status) 603 fe_status_t *status)
@@ -544,8 +606,8 @@ static int mb86a20s_tune(struct dvb_frontend *fe,
544 606
545 dprintk("\n"); 607 dprintk("\n");
546 608
547 if (params != NULL) 609 if (re_tune)
548 rc = mb86a20s_set_frontend(fe, params); 610 rc = mb86a20s_set_frontend(fe);
549 611
550 if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) 612 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
551 mb86a20s_read_status(fe, status); 613 mb86a20s_read_status(fe, status);
@@ -608,10 +670,10 @@ error:
608EXPORT_SYMBOL(mb86a20s_attach); 670EXPORT_SYMBOL(mb86a20s_attach);
609 671
610static struct dvb_frontend_ops mb86a20s_ops = { 672static struct dvb_frontend_ops mb86a20s_ops = {
673 .delsys = { SYS_ISDBT },
611 /* Use dib8000 values per default */ 674 /* Use dib8000 values per default */
612 .info = { 675 .info = {
613 .name = "Fujitsu mb86A20s", 676 .name = "Fujitsu mb86A20s",
614 .type = FE_OFDM,
615 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER | 677 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
616 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 678 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
617 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 679 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 21:44:41 -0400