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-rw-r--r--arch/powerpc/Kconfig15
-rw-r--r--arch/powerpc/Makefile28
-rw-r--r--arch/powerpc/boot/dts/bamboo.dts4
-rw-r--r--arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/b4si-post.dtsi15
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts128
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts128
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi18
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi18
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi70
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi16
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi18
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi47
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi30
-rw-r--r--arch/powerpc/boot/dts/fsl/t1023si-post.dtsi16
-rw-r--r--arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/t1040si-post.dtsi44
-rw-r--r--arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/t2081si-post.dtsi22
-rw-r--r--arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi61
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi24
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts4
-rw-r--r--arch/powerpc/boot/serial.c3
-rw-r--r--arch/powerpc/configs/fsl-emb-nonhw.config1
-rw-r--r--arch/powerpc/configs/g5_defconfig1
-rw-r--r--arch/powerpc/configs/guest.config13
-rw-r--r--arch/powerpc/configs/maple_defconfig1
-rw-r--r--arch/powerpc/configs/pmac32_defconfig1
-rw-r--r--arch/powerpc/configs/ppc64_defconfig81
-rw-r--r--arch/powerpc/configs/ppc6xx_defconfig1
-rw-r--r--arch/powerpc/configs/pseries_defconfig2
-rw-r--r--arch/powerpc/include/asm/Kbuild4
-rw-r--r--arch/powerpc/include/asm/asm-prototypes.h1
-rw-r--r--arch/powerpc/include/asm/book3s/32/hash.h1
-rw-r--r--arch/powerpc/include/asm/book3s/32/mmu-hash.h15
-rw-r--r--arch/powerpc/include/asm/book3s/32/pgalloc.h40
-rw-r--r--arch/powerpc/include/asm/book3s/32/pgtable.h46
-rw-r--r--arch/powerpc/include/asm/book3s/64/hash-4k.h6
-rw-r--r--arch/powerpc/include/asm/book3s/64/mmu.h9
-rw-r--r--arch/powerpc/include/asm/book3s/64/pgalloc.h6
-rw-r--r--arch/powerpc/include/asm/book3s/64/pgtable.h2
-rw-r--r--arch/powerpc/include/asm/cache.h2
-rw-r--r--arch/powerpc/include/asm/code-patching.h23
-rw-r--r--arch/powerpc/include/asm/cputable.h9
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h7
-rw-r--r--arch/powerpc/include/asm/fadump.h7
-rw-r--r--arch/powerpc/include/asm/feature-fixups.h12
-rw-r--r--arch/powerpc/include/asm/hugetlb.h15
-rw-r--r--arch/powerpc/include/asm/io.h13
-rw-r--r--arch/powerpc/include/asm/iommu.h17
-rw-r--r--arch/powerpc/include/asm/ipic.h1
-rw-r--r--arch/powerpc/include/asm/mmu.h49
-rw-r--r--arch/powerpc/include/asm/mmu_context.h32
-rw-r--r--arch/powerpc/include/asm/nohash/32/mmu-40x.h (renamed from arch/powerpc/include/asm/mmu-40x.h)0
-rw-r--r--arch/powerpc/include/asm/nohash/32/mmu-44x.h (renamed from arch/powerpc/include/asm/mmu-44x.h)3
-rw-r--r--arch/powerpc/include/asm/nohash/32/mmu-8xx.h (renamed from arch/powerpc/include/asm/mmu-8xx.h)4
-rw-r--r--arch/powerpc/include/asm/nohash/32/mmu.h25
-rw-r--r--arch/powerpc/include/asm/nohash/32/pgalloc.h27
-rw-r--r--arch/powerpc/include/asm/nohash/32/pgtable.h15
-rw-r--r--arch/powerpc/include/asm/nohash/32/pte-40x.h2
-rw-r--r--arch/powerpc/include/asm/nohash/32/pte-8xx.h3
-rw-r--r--arch/powerpc/include/asm/nohash/64/mmu.h12
-rw-r--r--arch/powerpc/include/asm/nohash/64/pgalloc.h5
-rw-r--r--arch/powerpc/include/asm/nohash/mmu-book3e.h (renamed from arch/powerpc/include/asm/mmu-book3e.h)0
-rw-r--r--arch/powerpc/include/asm/nohash/mmu.h11
-rw-r--r--arch/powerpc/include/asm/nohash/pgtable.h4
-rw-r--r--arch/powerpc/include/asm/opal.h1
-rw-r--r--arch/powerpc/include/asm/page.h18
-rw-r--r--arch/powerpc/include/asm/page_32.h3
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h1
-rw-r--r--arch/powerpc/include/asm/pci.h4
-rw-r--r--arch/powerpc/include/asm/perf_event.h3
-rw-r--r--arch/powerpc/include/asm/perf_event_server.h2
-rw-r--r--arch/powerpc/include/asm/pgtable-types.h4
-rw-r--r--arch/powerpc/include/asm/pgtable.h32
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h1
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h29
-rw-r--r--arch/powerpc/include/asm/reg.h4
-rw-r--r--arch/powerpc/include/asm/setup.h7
-rw-r--r--arch/powerpc/include/asm/sfp-machine.h92
-rw-r--r--arch/powerpc/include/asm/slice.h14
-rw-r--r--arch/powerpc/include/asm/syscall.h3
-rw-r--r--arch/powerpc/include/asm/systbl.h396
-rw-r--r--arch/powerpc/include/asm/time.h2
-rw-r--r--arch/powerpc/include/asm/tlb.h2
-rw-r--r--arch/powerpc/include/asm/uaccess.h2
-rw-r--r--arch/powerpc/include/asm/unistd.h3
-rw-r--r--arch/powerpc/include/uapi/asm/Kbuild2
-rw-r--r--arch/powerpc/include/uapi/asm/perf_regs.h1
-rw-r--r--arch/powerpc/include/uapi/asm/unistd.h389
-rw-r--r--arch/powerpc/kernel/Makefile12
-rw-r--r--arch/powerpc/kernel/btext.c16
-rw-r--r--arch/powerpc/kernel/cacheinfo.c2
-rw-r--r--arch/powerpc/kernel/cpu_setup_6xx.S2
-rw-r--r--arch/powerpc/kernel/cpu_setup_fsl_booke.S2
-rw-r--r--arch/powerpc/kernel/cputable.c10
-rw-r--r--arch/powerpc/kernel/dma-iommu.c2
-rw-r--r--arch/powerpc/kernel/dma-swiotlb.c6
-rw-r--r--arch/powerpc/kernel/dma.c31
-rw-r--r--arch/powerpc/kernel/eeh.c20
-rw-r--r--arch/powerpc/kernel/eeh_driver.c2
-rw-r--r--arch/powerpc/kernel/eeh_event.c9
-rw-r--r--arch/powerpc/kernel/entry_32.S10
-rw-r--r--arch/powerpc/kernel/entry_64.S16
-rw-r--r--arch/powerpc/kernel/exceptions-64e.S26
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S2
-rw-r--r--arch/powerpc/kernel/fadump.c154
-rw-r--r--arch/powerpc/kernel/head_32.S20
-rw-r--r--arch/powerpc/kernel/head_44x.S11
-rw-r--r--arch/powerpc/kernel/head_8xx.S369
-rw-r--r--arch/powerpc/kernel/head_booke.h6
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S15
-rw-r--r--arch/powerpc/kernel/iommu.c69
-rw-r--r--arch/powerpc/kernel/isa-bridge.c3
-rw-r--r--arch/powerpc/kernel/legacy_serial.c10
-rw-r--r--arch/powerpc/kernel/misc_32.S4
-rw-r--r--arch/powerpc/kernel/nvram_64.c1
-rw-r--r--arch/powerpc/kernel/pci_of_scan.c11
-rw-r--r--arch/powerpc/kernel/pmc.c2
-rw-r--r--arch/powerpc/kernel/prom.c10
-rw-r--r--arch/powerpc/kernel/ptrace.c54
-rw-r--r--arch/powerpc/kernel/security.c29
-rw-r--r--arch/powerpc/kernel/setup-common.c7
-rw-r--r--arch/powerpc/kernel/setup_32.c6
-rw-r--r--arch/powerpc/kernel/signal_32.c50
-rw-r--r--arch/powerpc/kernel/signal_64.c71
-rw-r--r--arch/powerpc/kernel/syscalls/Makefile63
-rw-r--r--arch/powerpc/kernel/syscalls/syscall.tbl427
-rw-r--r--arch/powerpc/kernel/syscalls/syscallhdr.sh37
-rw-r--r--arch/powerpc/kernel/syscalls/syscalltbl.sh36
-rw-r--r--arch/powerpc/kernel/sysfs.c2
-rw-r--r--arch/powerpc/kernel/systbl.S40
-rw-r--r--arch/powerpc/kernel/systbl_chk.c60
-rw-r--r--arch/powerpc/kernel/trace/ftrace.c2
-rw-r--r--arch/powerpc/kernel/traps.c3
-rw-r--r--arch/powerpc/kernel/vdso.c7
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S18
-rw-r--r--arch/powerpc/kvm/book3s_64_vio.c18
-rw-r--r--arch/powerpc/kvm/bookehv_interrupts.S4
-rw-r--r--arch/powerpc/kvm/e500.h2
-rw-r--r--arch/powerpc/kvm/e500_emulate.c7
-rw-r--r--arch/powerpc/lib/code-patching.c16
-rw-r--r--arch/powerpc/lib/feature-fixups.c27
-rw-r--r--arch/powerpc/mm/44x_mmu.c14
-rw-r--r--arch/powerpc/mm/8xx_mmu.c10
-rw-r--r--arch/powerpc/mm/Makefile11
-rw-r--r--arch/powerpc/mm/dma-noncoherent.c15
-rw-r--r--arch/powerpc/mm/dump_bats.c173
-rw-r--r--arch/powerpc/mm/dump_linuxpagetables-generic.c2
-rw-r--r--arch/powerpc/mm/dump_sr.c64
-rw-r--r--arch/powerpc/mm/fault.c49
-rw-r--r--arch/powerpc/mm/hash_low_32.S33
-rw-r--r--arch/powerpc/mm/hugetlbpage.c40
-rw-r--r--arch/powerpc/mm/init-common.c56
-rw-r--r--arch/powerpc/mm/mem.c51
-rw-r--r--arch/powerpc/mm/mmu_context.c10
-rw-r--r--arch/powerpc/mm/mmu_context_book3s64.c15
-rw-r--r--arch/powerpc/mm/mmu_context_iommu.c110
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c4
-rw-r--r--arch/powerpc/mm/mmu_decl.h2
-rw-r--r--arch/powerpc/mm/numa.c2
-rw-r--r--arch/powerpc/mm/pgtable-book3s64.c88
-rw-r--r--arch/powerpc/mm/pgtable-frag.c119
-rw-r--r--arch/powerpc/mm/pgtable.c26
-rw-r--r--arch/powerpc/mm/pgtable_32.c29
-rw-r--r--arch/powerpc/mm/pkeys.c25
-rw-r--r--arch/powerpc/mm/ppc_mmu_32.c51
-rw-r--r--arch/powerpc/mm/tlb_low_64e.S7
-rw-r--r--arch/powerpc/oprofile/Makefile2
-rw-r--r--arch/powerpc/oprofile/common.c2
-rw-r--r--arch/powerpc/perf/core-book3s.c39
-rw-r--r--arch/powerpc/perf/imc-pmu.c6
-rw-r--r--arch/powerpc/perf/isa207-common.c58
-rw-r--r--arch/powerpc/perf/isa207-common.h9
-rw-r--r--arch/powerpc/perf/perf_regs.c7
-rw-r--r--arch/powerpc/perf/power9-pmu.c22
-rw-r--r--arch/powerpc/platforms/44x/warp.c6
-rw-r--r--arch/powerpc/platforms/4xx/ocm.c17
-rw-r--r--arch/powerpc/platforms/4xx/pci.c7
-rw-r--r--arch/powerpc/platforms/512x/Kconfig2
-rw-r--r--arch/powerpc/platforms/52xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/52xx/efika.c6
-rw-r--r--arch/powerpc/platforms/82xx/Kconfig4
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/83xx/misc.c17
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c10
-rw-r--r--arch/powerpc/platforms/85xx/qemu_e500.c9
-rw-r--r--arch/powerpc/platforms/85xx/t1042rdb_diu.c2
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_smp.c3
-rw-r--r--arch/powerpc/platforms/Kconfig8
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype21
-rw-r--r--arch/powerpc/platforms/amigaone/Kconfig2
-rw-r--r--arch/powerpc/platforms/cell/cbe_regs.c6
-rw-r--r--arch/powerpc/platforms/cell/setup.c5
-rw-r--r--arch/powerpc/platforms/cell/spu_callbacks.c17
-rw-r--r--arch/powerpc/platforms/cell/spu_manage.c10
-rw-r--r--arch/powerpc/platforms/chrp/Kconfig2
-rw-r--r--arch/powerpc/platforms/chrp/pci.c4
-rw-r--r--arch/powerpc/platforms/chrp/setup.c10
-rw-r--r--arch/powerpc/platforms/embedded6xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/maple/pci.c6
-rw-r--r--arch/powerpc/platforms/pasemi/dma_lib.c4
-rw-r--r--arch/powerpc/platforms/pasemi/pci.c66
-rw-r--r--arch/powerpc/platforms/pasemi/setup.c86
-rw-r--r--arch/powerpc/platforms/powermac/cache.S4
-rw-r--r--arch/powerpc/platforms/powermac/feature.c14
-rw-r--r--arch/powerpc/platforms/powermac/low_i2c.c11
-rw-r--r--arch/powerpc/platforms/powermac/pci.c27
-rw-r--r--arch/powerpc/platforms/powermac/pfunc_base.c7
-rw-r--r--arch/powerpc/platforms/powermac/pic.c6
-rw-r--r--arch/powerpc/platforms/powermac/setup.c10
-rw-r--r--arch/powerpc/platforms/powermac/sleep.S4
-rw-r--r--arch/powerpc/platforms/powermac/smp.c3
-rw-r--r--arch/powerpc/platforms/powermac/udbg_adb.c2
-rw-r--r--arch/powerpc/platforms/powermac/udbg_scc.c2
-rw-r--r--arch/powerpc/platforms/powernv/eeh-powernv.c8
-rw-r--r--arch/powerpc/platforms/powernv/npu-dma.c564
-rw-r--r--arch/powerpc/platforms/powernv/opal-power.c3
-rw-r--r--arch/powerpc/platforms/powernv/opal.c5
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda-tce.c5
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c265
-rw-r--r--arch/powerpc/platforms/powernv/pci.c49
-rw-r--r--arch/powerpc/platforms/powernv/pci.h36
-rw-r--r--arch/powerpc/platforms/powernv/vas-debug.c28
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-memory.c16
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c88
-rw-r--r--arch/powerpc/platforms/pseries/pci.c22
-rw-r--r--arch/powerpc/platforms/pseries/pmem.c8
-rw-r--r--arch/powerpc/platforms/pseries/setup.c12
-rw-r--r--arch/powerpc/platforms/pseries/vio.c27
-rw-r--r--arch/powerpc/sysdev/Makefile2
-rw-r--r--arch/powerpc/sysdev/fsl_rio.h2
-rw-r--r--arch/powerpc/sysdev/fsl_rmu.c4
-rw-r--r--arch/powerpc/sysdev/ipic.c28
-rw-r--r--arch/powerpc/sysdev/scom.c4
-rw-r--r--arch/powerpc/sysdev/xive/common.c2
-rwxr-xr-xarch/powerpc/tools/checkpatch.sh1
-rw-r--r--arch/powerpc/xmon/xmon.c33
247 files changed, 3684 insertions, 3265 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8be31261aec8..a1e858e42ada 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -128,6 +128,7 @@ config PPC
128 # 128 #
129 # Please keep this list sorted alphabetically. 129 # Please keep this list sorted alphabetically.
130 # 130 #
131 select ARCH_HAS_DEBUG_VIRTUAL
131 select ARCH_HAS_DEVMEM_IS_ALLOWED 132 select ARCH_HAS_DEVMEM_IS_ALLOWED
132 select ARCH_HAS_DMA_SET_COHERENT_MASK 133 select ARCH_HAS_DMA_SET_COHERENT_MASK
133 select ARCH_HAS_ELF_RANDOMIZE 134 select ARCH_HAS_ELF_RANDOMIZE
@@ -374,9 +375,9 @@ config PPC_ADV_DEBUG_DAC_RANGE
374 depends on PPC_ADV_DEBUG_REGS && 44x 375 depends on PPC_ADV_DEBUG_REGS && 44x
375 default y 376 default y
376 377
377config ZONE_DMA32 378config ZONE_DMA
378 bool 379 bool
379 default y if PPC64 380 default y if PPC_BOOK3E_64
380 381
381config PGTABLE_LEVELS 382config PGTABLE_LEVELS
382 int 383 int
@@ -556,7 +557,7 @@ config RELOCATABLE_TEST
556 557
557config CRASH_DUMP 558config CRASH_DUMP
558 bool "Build a dump capture kernel" 559 bool "Build a dump capture kernel"
559 depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP) 560 depends on PPC64 || PPC_BOOK3S_32 || FSL_BOOKE || (44x && !SMP)
560 select RELOCATABLE if PPC64 || 44x || FSL_BOOKE 561 select RELOCATABLE if PPC64 || 44x || FSL_BOOKE
561 help 562 help
562 Build a kernel suitable for use as a dump capture kernel. 563 Build a kernel suitable for use as a dump capture kernel.
@@ -869,10 +870,6 @@ config ISA
869 have an IBM RS/6000 or pSeries machine, say Y. If you have an 870 have an IBM RS/6000 or pSeries machine, say Y. If you have an
870 embedded board, consult your board documentation. 871 embedded board, consult your board documentation.
871 872
872config ZONE_DMA
873 bool
874 default y
875
876config GENERIC_ISA_DMA 873config GENERIC_ISA_DMA
877 bool 874 bool
878 depends on ISA_DMA_API 875 depends on ISA_DMA_API
@@ -1096,7 +1093,7 @@ config PHYSICAL_START_BOOL
1096 1093
1097config PHYSICAL_START 1094config PHYSICAL_START
1098 hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL 1095 hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
1099 default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !NONSTATIC_KERNEL 1096 default "0x02000000" if PPC_BOOK3S && CRASH_DUMP && !NONSTATIC_KERNEL
1100 default "0x00000000" 1097 default "0x00000000"
1101 1098
1102config PHYSICAL_ALIGN 1099config PHYSICAL_ALIGN
@@ -1146,7 +1143,7 @@ config PIN_TLB_DATA
1146 1143
1147config PIN_TLB_IMMR 1144config PIN_TLB_IMMR
1148 bool "Pinned TLB for IMMR" 1145 bool "Pinned TLB for IMMR"
1149 depends on PIN_TLB 1146 depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
1150 default y 1147 default y
1151 1148
1152config PIN_TLB_TEXT 1149config PIN_TLB_TEXT
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 854199c9ab7e..488c9edffa58 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -30,6 +30,10 @@ endif
30endif 30endif
31endif 31endif
32 32
33ifdef CONFIG_PPC_BOOK3S_32
34KBUILD_CFLAGS += -mcpu=powerpc
35endif
36
33ifeq ($(CROSS_COMPILE),) 37ifeq ($(CROSS_COMPILE),)
34KBUILD_DEFCONFIG := $(shell uname -m)_defconfig 38KBUILD_DEFCONFIG := $(shell uname -m)_defconfig
35else 39else
@@ -152,7 +156,14 @@ endif
152CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc)) 156CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc))
153CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions) 157CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
154 158
155CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD) 159# Clang unconditionally reserves r2 on ppc32 and does not support the flag
160# https://bugs.llvm.org/show_bug.cgi?id=39555
161CFLAGS-$(CONFIG_PPC32) := $(call cc-option, -ffixed-r2)
162
163# Clang doesn't support -mmultiple / -mno-multiple
164# https://bugs.llvm.org/show_bug.cgi?id=39556
165CFLAGS-$(CONFIG_PPC32) += $(call cc-option, $(MULTIPLEWORD))
166
156CFLAGS-$(CONFIG_PPC32) += $(call cc-option,-mno-readonly-in-sdata) 167CFLAGS-$(CONFIG_PPC32) += $(call cc-option,-mno-readonly-in-sdata)
157 168
158ifdef CONFIG_PPC_BOOK3S_64 169ifdef CONFIG_PPC_BOOK3S_64
@@ -237,10 +248,6 @@ KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm)
237# often slow when they are implemented at all 248# often slow when they are implemented at all
238KBUILD_CFLAGS += $(call cc-option,-mno-string) 249KBUILD_CFLAGS += $(call cc-option,-mno-string)
239 250
240ifdef CONFIG_6xx
241KBUILD_CFLAGS += -mcpu=powerpc
242endif
243
244cpu-as-$(CONFIG_4xx) += -Wa,-m405 251cpu-as-$(CONFIG_4xx) += -Wa,-m405
245cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec) 252cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)
246cpu-as-$(CONFIG_E200) += -Wa,-me200 253cpu-as-$(CONFIG_E200) += -Wa,-me200
@@ -313,6 +320,14 @@ PHONY += ppc64le_defconfig
313ppc64le_defconfig: 320ppc64le_defconfig:
314 $(call merge_into_defconfig,ppc64_defconfig,le) 321 $(call merge_into_defconfig,ppc64_defconfig,le)
315 322
323PHONY += ppc64le_guest_defconfig
324ppc64le_guest_defconfig:
325 $(call merge_into_defconfig,ppc64_defconfig,le guest)
326
327PHONY += ppc64_guest_defconfig
328ppc64_guest_defconfig:
329 $(call merge_into_defconfig,ppc64_defconfig,be guest)
330
316PHONY += powernv_be_defconfig 331PHONY += powernv_be_defconfig
317powernv_be_defconfig: 332powernv_be_defconfig:
318 $(call merge_into_defconfig,powernv_defconfig,be) 333 $(call merge_into_defconfig,powernv_defconfig,be)
@@ -398,6 +413,9 @@ archclean:
398 413
399archprepare: checkbin 414archprepare: checkbin
400 415
416archheaders:
417 $(Q)$(MAKE) $(build)=arch/powerpc/kernel/syscalls all
418
401ifdef CONFIG_STACKPROTECTOR 419ifdef CONFIG_STACKPROTECTOR
402prepare: stack_protector_prepare 420prepare: stack_protector_prepare
403 421
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index 538e42b1120d..b5861fa3836c 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -268,8 +268,10 @@
268 /* Outbound ranges, one memory and one IO, 268 /* Outbound ranges, one memory and one IO,
269 * later cannot be changed. Chip supports a second 269 * later cannot be changed. Chip supports a second
270 * IO range but we don't use it for now 270 * IO range but we don't use it for now
271 * The chip also supports a larger memory range but
272 * it's not naturally aligned, so our code will break
271 */ 273 */
272 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000 274 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
273 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000 275 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
274 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; 276 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
275 277
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 88d8423f8ac5..bb7b9b9f3f5f 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -70,14 +70,14 @@
70 cpu0: PowerPC,e6500@0 { 70 cpu0: PowerPC,e6500@0 {
71 device_type = "cpu"; 71 device_type = "cpu";
72 reg = <0 1>; 72 reg = <0 1>;
73 clocks = <&mux0>; 73 clocks = <&clockgen 1 0>;
74 next-level-cache = <&L2_1>; 74 next-level-cache = <&L2_1>;
75 fsl,portid-mapping = <0x80000000>; 75 fsl,portid-mapping = <0x80000000>;
76 }; 76 };
77 cpu1: PowerPC,e6500@2 { 77 cpu1: PowerPC,e6500@2 {
78 device_type = "cpu"; 78 device_type = "cpu";
79 reg = <2 3>; 79 reg = <2 3>;
80 clocks = <&mux0>; 80 clocks = <&clockgen 1 0>;
81 next-level-cache = <&L2_1>; 81 next-level-cache = <&L2_1>;
82 fsl,portid-mapping = <0x80000000>; 82 fsl,portid-mapping = <0x80000000>;
83 }; 83 };
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index f3f968c51f4b..388ba1b15f8c 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -75,28 +75,28 @@
75 cpu0: PowerPC,e6500@0 { 75 cpu0: PowerPC,e6500@0 {
76 device_type = "cpu"; 76 device_type = "cpu";
77 reg = <0 1>; 77 reg = <0 1>;
78 clocks = <&mux0>; 78 clocks = <&clockgen 1 0>;
79 next-level-cache = <&L2_1>; 79 next-level-cache = <&L2_1>;
80 fsl,portid-mapping = <0x80000000>; 80 fsl,portid-mapping = <0x80000000>;
81 }; 81 };
82 cpu1: PowerPC,e6500@2 { 82 cpu1: PowerPC,e6500@2 {
83 device_type = "cpu"; 83 device_type = "cpu";
84 reg = <2 3>; 84 reg = <2 3>;
85 clocks = <&mux0>; 85 clocks = <&clockgen 1 0>;
86 next-level-cache = <&L2_1>; 86 next-level-cache = <&L2_1>;
87 fsl,portid-mapping = <0x80000000>; 87 fsl,portid-mapping = <0x80000000>;
88 }; 88 };
89 cpu2: PowerPC,e6500@4 { 89 cpu2: PowerPC,e6500@4 {
90 device_type = "cpu"; 90 device_type = "cpu";
91 reg = <4 5>; 91 reg = <4 5>;
92 clocks = <&mux0>; 92 clocks = <&clockgen 1 0>;
93 next-level-cache = <&L2_1>; 93 next-level-cache = <&L2_1>;
94 fsl,portid-mapping = <0x80000000>; 94 fsl,portid-mapping = <0x80000000>;
95 }; 95 };
96 cpu3: PowerPC,e6500@6 { 96 cpu3: PowerPC,e6500@6 {
97 device_type = "cpu"; 97 device_type = "cpu";
98 reg = <6 7>; 98 reg = <6 7>;
99 clocks = <&mux0>; 99 clocks = <&clockgen 1 0>;
100 next-level-cache = <&L2_1>; 100 next-level-cache = <&L2_1>;
101 fsl,portid-mapping = <0x80000000>; 101 fsl,portid-mapping = <0x80000000>;
102 }; 102 };
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 1b33f5157c8a..4f044b41a776 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -398,21 +398,6 @@
398 }; 398 };
399 399
400/include/ "qoriq-clockgen2.dtsi" 400/include/ "qoriq-clockgen2.dtsi"
401 clockgen: global-utilities@e1000 {
402 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
403 reg = <0xe1000 0x1000>;
404
405 mux0: mux0@0 {
406 #clock-cells = <0>;
407 reg = <0x0 0x4>;
408 compatible = "fsl,qoriq-core-mux-2.0";
409 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
410 <&pll1 0>, <&pll1 1>, <&pll1 2>;
411 clock-names = "pll0", "pll0-div2", "pll0-div4",
412 "pll1", "pll1-div2", "pll1-div4";
413 clock-output-names = "cmux0";
414 };
415 };
416 401
417 rcpm: global-utilities@e2000 { 402 rcpm: global-utilities@e2000 {
418 compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0"; 403 compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";
diff --git a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
index 11bea3e6a43f..58ac17496c89 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
@@ -169,100 +169,100 @@
169 interrupt-map-mask = <0xff00 0 0 7>; 169 interrupt-map-mask = <0xff00 0 0 7>;
170 interrupt-map = < 170 interrupt-map = <
171 /* IDSEL 0x11 func 0 - PCI slot 1 */ 171 /* IDSEL 0x11 func 0 - PCI slot 1 */
172 0x8800 0 0 1 &mpic 2 1 172 0x8800 0 0 1 &mpic 2 1 0 0
173 0x8800 0 0 2 &mpic 3 1 173 0x8800 0 0 2 &mpic 3 1 0 0
174 0x8800 0 0 3 &mpic 4 1 174 0x8800 0 0 3 &mpic 4 1 0 0
175 0x8800 0 0 4 &mpic 1 1 175 0x8800 0 0 4 &mpic 1 1 0 0
176 176
177 /* IDSEL 0x11 func 1 - PCI slot 1 */ 177 /* IDSEL 0x11 func 1 - PCI slot 1 */
178 0x8900 0 0 1 &mpic 2 1 178 0x8900 0 0 1 &mpic 2 1 0 0
179 0x8900 0 0 2 &mpic 3 1 179 0x8900 0 0 2 &mpic 3 1 0 0
180 0x8900 0 0 3 &mpic 4 1 180 0x8900 0 0 3 &mpic 4 1 0 0
181 0x8900 0 0 4 &mpic 1 1 181 0x8900 0 0 4 &mpic 1 1 0 0
182 182
183 /* IDSEL 0x11 func 2 - PCI slot 1 */ 183 /* IDSEL 0x11 func 2 - PCI slot 1 */
184 0x8a00 0 0 1 &mpic 2 1 184 0x8a00 0 0 1 &mpic 2 1 0 0
185 0x8a00 0 0 2 &mpic 3 1 185 0x8a00 0 0 2 &mpic 3 1 0 0
186 0x8a00 0 0 3 &mpic 4 1 186 0x8a00 0 0 3 &mpic 4 1 0 0
187 0x8a00 0 0 4 &mpic 1 1 187 0x8a00 0 0 4 &mpic 1 1 0 0
188 188
189 /* IDSEL 0x11 func 3 - PCI slot 1 */ 189 /* IDSEL 0x11 func 3 - PCI slot 1 */
190 0x8b00 0 0 1 &mpic 2 1 190 0x8b00 0 0 1 &mpic 2 1 0 0
191 0x8b00 0 0 2 &mpic 3 1 191 0x8b00 0 0 2 &mpic 3 1 0 0
192 0x8b00 0 0 3 &mpic 4 1 192 0x8b00 0 0 3 &mpic 4 1 0 0
193 0x8b00 0 0 4 &mpic 1 1 193 0x8b00 0 0 4 &mpic 1 1 0 0
194 194
195 /* IDSEL 0x11 func 4 - PCI slot 1 */ 195 /* IDSEL 0x11 func 4 - PCI slot 1 */
196 0x8c00 0 0 1 &mpic 2 1 196 0x8c00 0 0 1 &mpic 2 1 0 0
197 0x8c00 0 0 2 &mpic 3 1 197 0x8c00 0 0 2 &mpic 3 1 0 0
198 0x8c00 0 0 3 &mpic 4 1 198 0x8c00 0 0 3 &mpic 4 1 0 0
199 0x8c00 0 0 4 &mpic 1 1 199 0x8c00 0 0 4 &mpic 1 1 0 0
200 200
201 /* IDSEL 0x11 func 5 - PCI slot 1 */ 201 /* IDSEL 0x11 func 5 - PCI slot 1 */
202 0x8d00 0 0 1 &mpic 2 1 202 0x8d00 0 0 1 &mpic 2 1 0 0
203 0x8d00 0 0 2 &mpic 3 1 203 0x8d00 0 0 2 &mpic 3 1 0 0
204 0x8d00 0 0 3 &mpic 4 1 204 0x8d00 0 0 3 &mpic 4 1 0 0
205 0x8d00 0 0 4 &mpic 1 1 205 0x8d00 0 0 4 &mpic 1 1 0 0
206 206
207 /* IDSEL 0x11 func 6 - PCI slot 1 */ 207 /* IDSEL 0x11 func 6 - PCI slot 1 */
208 0x8e00 0 0 1 &mpic 2 1 208 0x8e00 0 0 1 &mpic 2 1 0 0
209 0x8e00 0 0 2 &mpic 3 1 209 0x8e00 0 0 2 &mpic 3 1 0 0
210 0x8e00 0 0 3 &mpic 4 1 210 0x8e00 0 0 3 &mpic 4 1 0 0
211 0x8e00 0 0 4 &mpic 1 1 211 0x8e00 0 0 4 &mpic 1 1 0 0
212 212
213 /* IDSEL 0x11 func 7 - PCI slot 1 */ 213 /* IDSEL 0x11 func 7 - PCI slot 1 */
214 0x8f00 0 0 1 &mpic 2 1 214 0x8f00 0 0 1 &mpic 2 1 0 0
215 0x8f00 0 0 2 &mpic 3 1 215 0x8f00 0 0 2 &mpic 3 1 0 0
216 0x8f00 0 0 3 &mpic 4 1 216 0x8f00 0 0 3 &mpic 4 1 0 0
217 0x8f00 0 0 4 &mpic 1 1 217 0x8f00 0 0 4 &mpic 1 1 0 0
218 218
219 /* IDSEL 0x12 func 0 - PCI slot 2 */ 219 /* IDSEL 0x12 func 0 - PCI slot 2 */
220 0x9000 0 0 1 &mpic 3 1 220 0x9000 0 0 1 &mpic 3 1 0 0
221 0x9000 0 0 2 &mpic 4 1 221 0x9000 0 0 2 &mpic 4 1 0 0
222 0x9000 0 0 3 &mpic 1 1 222 0x9000 0 0 3 &mpic 1 1 0 0
223 0x9000 0 0 4 &mpic 2 1 223 0x9000 0 0 4 &mpic 2 1 0 0
224 224
225 /* IDSEL 0x12 func 1 - PCI slot 2 */ 225 /* IDSEL 0x12 func 1 - PCI slot 2 */
226 0x9100 0 0 1 &mpic 3 1 226 0x9100 0 0 1 &mpic 3 1 0 0
227 0x9100 0 0 2 &mpic 4 1 227 0x9100 0 0 2 &mpic 4 1 0 0
228 0x9100 0 0 3 &mpic 1 1 228 0x9100 0 0 3 &mpic 1 1 0 0
229 0x9100 0 0 4 &mpic 2 1 229 0x9100 0 0 4 &mpic 2 1 0 0
230 230
231 /* IDSEL 0x12 func 2 - PCI slot 2 */ 231 /* IDSEL 0x12 func 2 - PCI slot 2 */
232 0x9200 0 0 1 &mpic 3 1 232 0x9200 0 0 1 &mpic 3 1 0 0
233 0x9200 0 0 2 &mpic 4 1 233 0x9200 0 0 2 &mpic 4 1 0 0
234 0x9200 0 0 3 &mpic 1 1 234 0x9200 0 0 3 &mpic 1 1 0 0
235 0x9200 0 0 4 &mpic 2 1 235 0x9200 0 0 4 &mpic 2 1 0 0
236 236
237 /* IDSEL 0x12 func 3 - PCI slot 2 */ 237 /* IDSEL 0x12 func 3 - PCI slot 2 */
238 0x9300 0 0 1 &mpic 3 1 238 0x9300 0 0 1 &mpic 3 1 0 0
239 0x9300 0 0 2 &mpic 4 1 239 0x9300 0 0 2 &mpic 4 1 0 0
240 0x9300 0 0 3 &mpic 1 1 240 0x9300 0 0 3 &mpic 1 1 0 0
241 0x9300 0 0 4 &mpic 2 1 241 0x9300 0 0 4 &mpic 2 1 0 0
242 242
243 /* IDSEL 0x12 func 4 - PCI slot 2 */ 243 /* IDSEL 0x12 func 4 - PCI slot 2 */
244 0x9400 0 0 1 &mpic 3 1 244 0x9400 0 0 1 &mpic 3 1 0 0
245 0x9400 0 0 2 &mpic 4 1 245 0x9400 0 0 2 &mpic 4 1 0 0
246 0x9400 0 0 3 &mpic 1 1 246 0x9400 0 0 3 &mpic 1 1 0 0
247 0x9400 0 0 4 &mpic 2 1 247 0x9400 0 0 4 &mpic 2 1 0 0
248 248
249 /* IDSEL 0x12 func 5 - PCI slot 2 */ 249 /* IDSEL 0x12 func 5 - PCI slot 2 */
250 0x9500 0 0 1 &mpic 3 1 250 0x9500 0 0 1 &mpic 3 1 0 0
251 0x9500 0 0 2 &mpic 4 1 251 0x9500 0 0 2 &mpic 4 1 0 0
252 0x9500 0 0 3 &mpic 1 1 252 0x9500 0 0 3 &mpic 1 1 0 0
253 0x9500 0 0 4 &mpic 2 1 253 0x9500 0 0 4 &mpic 2 1 0 0
254 254
255 /* IDSEL 0x12 func 6 - PCI slot 2 */ 255 /* IDSEL 0x12 func 6 - PCI slot 2 */
256 0x9600 0 0 1 &mpic 3 1 256 0x9600 0 0 1 &mpic 3 1 0 0
257 0x9600 0 0 2 &mpic 4 1 257 0x9600 0 0 2 &mpic 4 1 0 0
258 0x9600 0 0 3 &mpic 1 1 258 0x9600 0 0 3 &mpic 1 1 0 0
259 0x9600 0 0 4 &mpic 2 1 259 0x9600 0 0 4 &mpic 2 1 0 0
260 260
261 /* IDSEL 0x12 func 7 - PCI slot 2 */ 261 /* IDSEL 0x12 func 7 - PCI slot 2 */
262 0x9700 0 0 1 &mpic 3 1 262 0x9700 0 0 1 &mpic 3 1 0 0
263 0x9700 0 0 2 &mpic 4 1 263 0x9700 0 0 2 &mpic 4 1 0 0
264 0x9700 0 0 3 &mpic 1 1 264 0x9700 0 0 3 &mpic 1 1 0 0
265 0x9700 0 0 4 &mpic 2 1 265 0x9700 0 0 4 &mpic 2 1 0 0
266 266
267 // IDSEL 0x1c USB 267 // IDSEL 0x1c USB
268 0xe000 0 0 1 &i8259 12 2 268 0xe000 0 0 1 &i8259 12 2
diff --git a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
index 7ff62046a9ea..e64b91e321f6 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
@@ -136,100 +136,100 @@
136 interrupt-map-mask = <0xff00 0 0 7>; 136 interrupt-map-mask = <0xff00 0 0 7>;
137 interrupt-map = < 137 interrupt-map = <
138 /* IDSEL 0x11 func 0 - PCI slot 1 */ 138 /* IDSEL 0x11 func 0 - PCI slot 1 */
139 0x8800 0 0 1 &mpic 2 1 139 0x8800 0 0 1 &mpic 2 1 0 0
140 0x8800 0 0 2 &mpic 3 1 140 0x8800 0 0 2 &mpic 3 1 0 0
141 0x8800 0 0 3 &mpic 4 1 141 0x8800 0 0 3 &mpic 4 1 0 0
142 0x8800 0 0 4 &mpic 1 1 142 0x8800 0 0 4 &mpic 1 1 0 0
143 143
144 /* IDSEL 0x11 func 1 - PCI slot 1 */ 144 /* IDSEL 0x11 func 1 - PCI slot 1 */
145 0x8900 0 0 1 &mpic 2 1 145 0x8900 0 0 1 &mpic 2 1 0 0
146 0x8900 0 0 2 &mpic 3 1 146 0x8900 0 0 2 &mpic 3 1 0 0
147 0x8900 0 0 3 &mpic 4 1 147 0x8900 0 0 3 &mpic 4 1 0 0
148 0x8900 0 0 4 &mpic 1 1 148 0x8900 0 0 4 &mpic 1 1 0 0
149 149
150 /* IDSEL 0x11 func 2 - PCI slot 1 */ 150 /* IDSEL 0x11 func 2 - PCI slot 1 */
151 0x8a00 0 0 1 &mpic 2 1 151 0x8a00 0 0 1 &mpic 2 1 0 0
152 0x8a00 0 0 2 &mpic 3 1 152 0x8a00 0 0 2 &mpic 3 1 0 0
153 0x8a00 0 0 3 &mpic 4 1 153 0x8a00 0 0 3 &mpic 4 1 0 0
154 0x8a00 0 0 4 &mpic 1 1 154 0x8a00 0 0 4 &mpic 1 1 0 0
155 155
156 /* IDSEL 0x11 func 3 - PCI slot 1 */ 156 /* IDSEL 0x11 func 3 - PCI slot 1 */
157 0x8b00 0 0 1 &mpic 2 1 157 0x8b00 0 0 1 &mpic 2 1 0 0
158 0x8b00 0 0 2 &mpic 3 1 158 0x8b00 0 0 2 &mpic 3 1 0 0
159 0x8b00 0 0 3 &mpic 4 1 159 0x8b00 0 0 3 &mpic 4 1 0 0
160 0x8b00 0 0 4 &mpic 1 1 160 0x8b00 0 0 4 &mpic 1 1 0 0
161 161
162 /* IDSEL 0x11 func 4 - PCI slot 1 */ 162 /* IDSEL 0x11 func 4 - PCI slot 1 */
163 0x8c00 0 0 1 &mpic 2 1 163 0x8c00 0 0 1 &mpic 2 1 0 0
164 0x8c00 0 0 2 &mpic 3 1 164 0x8c00 0 0 2 &mpic 3 1 0 0
165 0x8c00 0 0 3 &mpic 4 1 165 0x8c00 0 0 3 &mpic 4 1 0 0
166 0x8c00 0 0 4 &mpic 1 1 166 0x8c00 0 0 4 &mpic 1 1 0 0
167 167
168 /* IDSEL 0x11 func 5 - PCI slot 1 */ 168 /* IDSEL 0x11 func 5 - PCI slot 1 */
169 0x8d00 0 0 1 &mpic 2 1 169 0x8d00 0 0 1 &mpic 2 1 0 0
170 0x8d00 0 0 2 &mpic 3 1 170 0x8d00 0 0 2 &mpic 3 1 0 0
171 0x8d00 0 0 3 &mpic 4 1 171 0x8d00 0 0 3 &mpic 4 1 0 0
172 0x8d00 0 0 4 &mpic 1 1 172 0x8d00 0 0 4 &mpic 1 1 0 0
173 173
174 /* IDSEL 0x11 func 6 - PCI slot 1 */ 174 /* IDSEL 0x11 func 6 - PCI slot 1 */
175 0x8e00 0 0 1 &mpic 2 1 175 0x8e00 0 0 1 &mpic 2 1 0 0
176 0x8e00 0 0 2 &mpic 3 1 176 0x8e00 0 0 2 &mpic 3 1 0 0
177 0x8e00 0 0 3 &mpic 4 1 177 0x8e00 0 0 3 &mpic 4 1 0 0
178 0x8e00 0 0 4 &mpic 1 1 178 0x8e00 0 0 4 &mpic 1 1 0 0
179 179
180 /* IDSEL 0x11 func 7 - PCI slot 1 */ 180 /* IDSEL 0x11 func 7 - PCI slot 1 */
181 0x8f00 0 0 1 &mpic 2 1 181 0x8f00 0 0 1 &mpic 2 1 0 0
182 0x8f00 0 0 2 &mpic 3 1 182 0x8f00 0 0 2 &mpic 3 1 0 0
183 0x8f00 0 0 3 &mpic 4 1 183 0x8f00 0 0 3 &mpic 4 1 0 0
184 0x8f00 0 0 4 &mpic 1 1 184 0x8f00 0 0 4 &mpic 1 1 0 0
185 185
186 /* IDSEL 0x12 func 0 - PCI slot 2 */ 186 /* IDSEL 0x12 func 0 - PCI slot 2 */
187 0x9000 0 0 1 &mpic 3 1 187 0x9000 0 0 1 &mpic 3 1 0 0
188 0x9000 0 0 2 &mpic 4 1 188 0x9000 0 0 2 &mpic 4 1 0 0
189 0x9000 0 0 3 &mpic 1 1 189 0x9000 0 0 3 &mpic 1 1 0 0
190 0x9000 0 0 4 &mpic 2 1 190 0x9000 0 0 4 &mpic 2 1 0 0
191 191
192 /* IDSEL 0x12 func 1 - PCI slot 2 */ 192 /* IDSEL 0x12 func 1 - PCI slot 2 */
193 0x9100 0 0 1 &mpic 3 1 193 0x9100 0 0 1 &mpic 3 1 0 0
194 0x9100 0 0 2 &mpic 4 1 194 0x9100 0 0 2 &mpic 4 1 0 0
195 0x9100 0 0 3 &mpic 1 1 195 0x9100 0 0 3 &mpic 1 1 0 0
196 0x9100 0 0 4 &mpic 2 1 196 0x9100 0 0 4 &mpic 2 1 0 0
197 197
198 /* IDSEL 0x12 func 2 - PCI slot 2 */ 198 /* IDSEL 0x12 func 2 - PCI slot 2 */
199 0x9200 0 0 1 &mpic 3 1 199 0x9200 0 0 1 &mpic 3 1 0 0
200 0x9200 0 0 2 &mpic 4 1 200 0x9200 0 0 2 &mpic 4 1 0 0
201 0x9200 0 0 3 &mpic 1 1 201 0x9200 0 0 3 &mpic 1 1 0 0
202 0x9200 0 0 4 &mpic 2 1 202 0x9200 0 0 4 &mpic 2 1 0 0
203 203
204 /* IDSEL 0x12 func 3 - PCI slot 2 */ 204 /* IDSEL 0x12 func 3 - PCI slot 2 */
205 0x9300 0 0 1 &mpic 3 1 205 0x9300 0 0 1 &mpic 3 1 0 0
206 0x9300 0 0 2 &mpic 4 1 206 0x9300 0 0 2 &mpic 4 1 0 0
207 0x9300 0 0 3 &mpic 1 1 207 0x9300 0 0 3 &mpic 1 1 0 0
208 0x9300 0 0 4 &mpic 2 1 208 0x9300 0 0 4 &mpic 2 1 0 0
209 209
210 /* IDSEL 0x12 func 4 - PCI slot 2 */ 210 /* IDSEL 0x12 func 4 - PCI slot 2 */
211 0x9400 0 0 1 &mpic 3 1 211 0x9400 0 0 1 &mpic 3 1 0 0
212 0x9400 0 0 2 &mpic 4 1 212 0x9400 0 0 2 &mpic 4 1 0 0
213 0x9400 0 0 3 &mpic 1 1 213 0x9400 0 0 3 &mpic 1 1 0 0
214 0x9400 0 0 4 &mpic 2 1 214 0x9400 0 0 4 &mpic 2 1 0 0
215 215
216 /* IDSEL 0x12 func 5 - PCI slot 2 */ 216 /* IDSEL 0x12 func 5 - PCI slot 2 */
217 0x9500 0 0 1 &mpic 3 1 217 0x9500 0 0 1 &mpic 3 1 0 0
218 0x9500 0 0 2 &mpic 4 1 218 0x9500 0 0 2 &mpic 4 1 0 0
219 0x9500 0 0 3 &mpic 1 1 219 0x9500 0 0 3 &mpic 1 1 0 0
220 0x9500 0 0 4 &mpic 2 1 220 0x9500 0 0 4 &mpic 2 1 0 0
221 221
222 /* IDSEL 0x12 func 6 - PCI slot 2 */ 222 /* IDSEL 0x12 func 6 - PCI slot 2 */
223 0x9600 0 0 1 &mpic 3 1 223 0x9600 0 0 1 &mpic 3 1 0 0
224 0x9600 0 0 2 &mpic 4 1 224 0x9600 0 0 2 &mpic 4 1 0 0
225 0x9600 0 0 3 &mpic 1 1 225 0x9600 0 0 3 &mpic 1 1 0 0
226 0x9600 0 0 4 &mpic 2 1 226 0x9600 0 0 4 &mpic 2 1 0 0
227 227
228 /* IDSEL 0x12 func 7 - PCI slot 2 */ 228 /* IDSEL 0x12 func 7 - PCI slot 2 */
229 0x9700 0 0 1 &mpic 3 1 229 0x9700 0 0 1 &mpic 3 1 0 0
230 0x9700 0 0 2 &mpic 4 1 230 0x9700 0 0 2 &mpic 4 1 0 0
231 0x9700 0 0 3 &mpic 1 1 231 0x9700 0 0 3 &mpic 1 1 0 0
232 0x9700 0 0 4 &mpic 2 1 232 0x9700 0 0 4 &mpic 2 1 0 0
233 233
234 // IDSEL 0x1c USB 234 // IDSEL 0x1c USB
235 0xe000 0 0 1 &i8259 12 2 235 0xe000 0 0 1 &i8259 12 2
diff --git a/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
index eeb7c65d5f22..50039d4fa278 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
@@ -97,6 +97,7 @@
97&pci0 { 97&pci0 {
98 compatible = "fsl,mpc8641-pcie"; 98 compatible = "fsl,mpc8641-pcie";
99 device_type = "pci"; 99 device_type = "pci";
100 #interrupt-cells = <1>;
100 #size-cells = <2>; 101 #size-cells = <2>;
101 #address-cells = <3>; 102 #address-cells = <3>;
102 bus-range = <0x0 0xff>; 103 bus-range = <0x0 0xff>;
@@ -123,6 +124,7 @@
123&pci1 { 124&pci1 {
124 compatible = "fsl,mpc8641-pcie"; 125 compatible = "fsl,mpc8641-pcie";
125 device_type = "pci"; 126 device_type = "pci";
127 #interrupt-cells = <1>;
126 #size-cells = <2>; 128 #size-cells = <2>;
127 #address-cells = <3>; 129 #address-cells = <3>;
128 bus-range = <0x0 0xff>; 130 bus-range = <0x0 0xff>;
diff --git a/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi b/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
index 25f81eea60e0..a13876c05c1e 100644
--- a/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
@@ -205,13 +205,13 @@
205 mdio@24000 { 205 mdio@24000 {
206 phy0: ethernet-phy@0 { 206 phy0: ethernet-phy@0 {
207 interrupt-parent = <&mpic>; 207 interrupt-parent = <&mpic>;
208 interrupts = <3 1>; 208 interrupts = <3 1 0 0>;
209 reg = <0x0>; 209 reg = <0x0>;
210 }; 210 };
211 211
212 phy1: ethernet-phy@1 { 212 phy1: ethernet-phy@1 {
213 interrupt-parent = <&mpic>; 213 interrupt-parent = <&mpic>;
214 interrupts = <2 1>; 214 interrupts = <2 1 0 0>;
215 reg = <0x1>; 215 reg = <0x1>;
216 }; 216 };
217 217
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 51e975d7631a..872e4485dc3f 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -327,24 +327,6 @@
327/include/ "qoriq-clockgen1.dtsi" 327/include/ "qoriq-clockgen1.dtsi"
328 global-utilities@e1000 { 328 global-utilities@e1000 {
329 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; 329 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
330
331 mux2: mux2@40 {
332 #clock-cells = <0>;
333 reg = <0x40 0x4>;
334 compatible = "fsl,qoriq-core-mux-1.0";
335 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
336 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
337 clock-output-names = "cmux2";
338 };
339
340 mux3: mux3@60 {
341 #clock-cells = <0>;
342 reg = <0x60 0x4>;
343 compatible = "fsl,qoriq-core-mux-1.0";
344 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
345 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
346 clock-output-names = "cmux3";
347 };
348 }; 330 };
349 331
350 rcpm: global-utilities@e2000 { 332 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 941274c41f21..6318962e8d14 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -89,7 +89,7 @@
89 cpu0: PowerPC,e500mc@0 { 89 cpu0: PowerPC,e500mc@0 {
90 device_type = "cpu"; 90 device_type = "cpu";
91 reg = <0>; 91 reg = <0>;
92 clocks = <&mux0>; 92 clocks = <&clockgen 1 0>;
93 next-level-cache = <&L2_0>; 93 next-level-cache = <&L2_0>;
94 fsl,portid-mapping = <0x80000000>; 94 fsl,portid-mapping = <0x80000000>;
95 L2_0: l2-cache { 95 L2_0: l2-cache {
@@ -99,7 +99,7 @@
99 cpu1: PowerPC,e500mc@1 { 99 cpu1: PowerPC,e500mc@1 {
100 device_type = "cpu"; 100 device_type = "cpu";
101 reg = <1>; 101 reg = <1>;
102 clocks = <&mux1>; 102 clocks = <&clockgen 1 1>;
103 next-level-cache = <&L2_1>; 103 next-level-cache = <&L2_1>;
104 fsl,portid-mapping = <0x40000000>; 104 fsl,portid-mapping = <0x40000000>;
105 L2_1: l2-cache { 105 L2_1: l2-cache {
@@ -109,7 +109,7 @@
109 cpu2: PowerPC,e500mc@2 { 109 cpu2: PowerPC,e500mc@2 {
110 device_type = "cpu"; 110 device_type = "cpu";
111 reg = <2>; 111 reg = <2>;
112 clocks = <&mux2>; 112 clocks = <&clockgen 1 2>;
113 next-level-cache = <&L2_2>; 113 next-level-cache = <&L2_2>;
114 fsl,portid-mapping = <0x20000000>; 114 fsl,portid-mapping = <0x20000000>;
115 L2_2: l2-cache { 115 L2_2: l2-cache {
@@ -119,7 +119,7 @@
119 cpu3: PowerPC,e500mc@3 { 119 cpu3: PowerPC,e500mc@3 {
120 device_type = "cpu"; 120 device_type = "cpu";
121 reg = <3>; 121 reg = <3>;
122 clocks = <&mux3>; 122 clocks = <&clockgen 1 3>;
123 next-level-cache = <&L2_3>; 123 next-level-cache = <&L2_3>;
124 fsl,portid-mapping = <0x10000000>; 124 fsl,portid-mapping = <0x10000000>;
125 L2_3: l2-cache { 125 L2_3: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 187676fa8d83..81bc75aca2e0 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -354,24 +354,6 @@
354/include/ "qoriq-clockgen1.dtsi" 354/include/ "qoriq-clockgen1.dtsi"
355 global-utilities@e1000 { 355 global-utilities@e1000 {
356 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; 356 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
357
358 mux2: mux2@40 {
359 #clock-cells = <0>;
360 reg = <0x40 0x4>;
361 compatible = "fsl,qoriq-core-mux-1.0";
362 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
363 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
364 clock-output-names = "cmux2";
365 };
366
367 mux3: mux3@60 {
368 #clock-cells = <0>;
369 reg = <0x60 0x4>;
370 compatible = "fsl,qoriq-core-mux-1.0";
371 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
372 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
373 clock-output-names = "cmux3";
374 };
375 }; 357 };
376 358
377 rcpm: global-utilities@e2000 { 359 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index 50b73e8e638f..db92f1151a48 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -90,7 +90,7 @@
90 cpu0: PowerPC,e500mc@0 { 90 cpu0: PowerPC,e500mc@0 {
91 device_type = "cpu"; 91 device_type = "cpu";
92 reg = <0>; 92 reg = <0>;
93 clocks = <&mux0>; 93 clocks = <&clockgen 1 0>;
94 next-level-cache = <&L2_0>; 94 next-level-cache = <&L2_0>;
95 fsl,portid-mapping = <0x80000000>; 95 fsl,portid-mapping = <0x80000000>;
96 L2_0: l2-cache { 96 L2_0: l2-cache {
@@ -100,7 +100,7 @@
100 cpu1: PowerPC,e500mc@1 { 100 cpu1: PowerPC,e500mc@1 {
101 device_type = "cpu"; 101 device_type = "cpu";
102 reg = <1>; 102 reg = <1>;
103 clocks = <&mux1>; 103 clocks = <&clockgen 1 1>;
104 next-level-cache = <&L2_1>; 104 next-level-cache = <&L2_1>;
105 fsl,portid-mapping = <0x40000000>; 105 fsl,portid-mapping = <0x40000000>;
106 L2_1: l2-cache { 106 L2_1: l2-cache {
@@ -110,7 +110,7 @@
110 cpu2: PowerPC,e500mc@2 { 110 cpu2: PowerPC,e500mc@2 {
111 device_type = "cpu"; 111 device_type = "cpu";
112 reg = <2>; 112 reg = <2>;
113 clocks = <&mux2>; 113 clocks = <&clockgen 1 2>;
114 next-level-cache = <&L2_2>; 114 next-level-cache = <&L2_2>;
115 fsl,portid-mapping = <0x20000000>; 115 fsl,portid-mapping = <0x20000000>;
116 L2_2: l2-cache { 116 L2_2: l2-cache {
@@ -120,7 +120,7 @@
120 cpu3: PowerPC,e500mc@3 { 120 cpu3: PowerPC,e500mc@3 {
121 device_type = "cpu"; 121 device_type = "cpu";
122 reg = <3>; 122 reg = <3>;
123 clocks = <&mux3>; 123 clocks = <&clockgen 1 3>;
124 next-level-cache = <&L2_3>; 124 next-level-cache = <&L2_3>;
125 fsl,portid-mapping = <0x10000000>; 125 fsl,portid-mapping = <0x10000000>;
126 L2_3: l2-cache { 126 L2_3: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index a0252085f858..4da49b6dd3f5 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -374,76 +374,6 @@
374/include/ "qoriq-clockgen1.dtsi" 374/include/ "qoriq-clockgen1.dtsi"
375 global-utilities@e1000 { 375 global-utilities@e1000 {
376 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0"; 376 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
377
378 pll2: pll2@840 {
379 #clock-cells = <1>;
380 reg = <0x840 0x4>;
381 compatible = "fsl,qoriq-core-pll-1.0";
382 clocks = <&sysclk>;
383 clock-output-names = "pll2", "pll2-div2";
384 };
385
386 pll3: pll3@860 {
387 #clock-cells = <1>;
388 reg = <0x860 0x4>;
389 compatible = "fsl,qoriq-core-pll-1.0";
390 clocks = <&sysclk>;
391 clock-output-names = "pll3", "pll3-div2";
392 };
393
394 mux2: mux2@40 {
395 #clock-cells = <0>;
396 reg = <0x40 0x4>;
397 compatible = "fsl,qoriq-core-mux-1.0";
398 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
399 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
400 clock-output-names = "cmux2";
401 };
402
403 mux3: mux3@60 {
404 #clock-cells = <0>;
405 reg = <0x60 0x4>;
406 compatible = "fsl,qoriq-core-mux-1.0";
407 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
408 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
409 clock-output-names = "cmux3";
410 };
411
412 mux4: mux4@80 {
413 #clock-cells = <0>;
414 reg = <0x80 0x4>;
415 compatible = "fsl,qoriq-core-mux-1.0";
416 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
417 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
418 clock-output-names = "cmux4";
419 };
420
421 mux5: mux5@a0 {
422 #clock-cells = <0>;
423 reg = <0xa0 0x4>;
424 compatible = "fsl,qoriq-core-mux-1.0";
425 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
426 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
427 clock-output-names = "cmux5";
428 };
429
430 mux6: mux6@c0 {
431 #clock-cells = <0>;
432 reg = <0xc0 0x4>;
433 compatible = "fsl,qoriq-core-mux-1.0";
434 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
435 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
436 clock-output-names = "cmux6";
437 };
438
439 mux7: mux7@e0 {
440 #clock-cells = <0>;
441 reg = <0xe0 0x4>;
442 compatible = "fsl,qoriq-core-mux-1.0";
443 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
444 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
445 clock-output-names = "cmux7";
446 };
447 }; 377 };
448 378
449 rcpm: global-utilities@e2000 { 379 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index d56a546b73e6..0a7c65a00e5e 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -94,7 +94,7 @@
94 cpu0: PowerPC,e500mc@0 { 94 cpu0: PowerPC,e500mc@0 {
95 device_type = "cpu"; 95 device_type = "cpu";
96 reg = <0>; 96 reg = <0>;
97 clocks = <&mux0>; 97 clocks = <&clockgen 1 0>;
98 next-level-cache = <&L2_0>; 98 next-level-cache = <&L2_0>;
99 fsl,portid-mapping = <0x80000000>; 99 fsl,portid-mapping = <0x80000000>;
100 L2_0: l2-cache { 100 L2_0: l2-cache {
@@ -104,7 +104,7 @@
104 cpu1: PowerPC,e500mc@1 { 104 cpu1: PowerPC,e500mc@1 {
105 device_type = "cpu"; 105 device_type = "cpu";
106 reg = <1>; 106 reg = <1>;
107 clocks = <&mux1>; 107 clocks = <&clockgen 1 1>;
108 next-level-cache = <&L2_1>; 108 next-level-cache = <&L2_1>;
109 fsl,portid-mapping = <0x40000000>; 109 fsl,portid-mapping = <0x40000000>;
110 L2_1: l2-cache { 110 L2_1: l2-cache {
@@ -114,7 +114,7 @@
114 cpu2: PowerPC,e500mc@2 { 114 cpu2: PowerPC,e500mc@2 {
115 device_type = "cpu"; 115 device_type = "cpu";
116 reg = <2>; 116 reg = <2>;
117 clocks = <&mux2>; 117 clocks = <&clockgen 1 2>;
118 next-level-cache = <&L2_2>; 118 next-level-cache = <&L2_2>;
119 fsl,portid-mapping = <0x20000000>; 119 fsl,portid-mapping = <0x20000000>;
120 L2_2: l2-cache { 120 L2_2: l2-cache {
@@ -124,7 +124,7 @@
124 cpu3: PowerPC,e500mc@3 { 124 cpu3: PowerPC,e500mc@3 {
125 device_type = "cpu"; 125 device_type = "cpu";
126 reg = <3>; 126 reg = <3>;
127 clocks = <&mux3>; 127 clocks = <&clockgen 1 3>;
128 next-level-cache = <&L2_3>; 128 next-level-cache = <&L2_3>;
129 fsl,portid-mapping = <0x10000000>; 129 fsl,portid-mapping = <0x10000000>;
130 L2_3: l2-cache { 130 L2_3: l2-cache {
@@ -134,7 +134,7 @@
134 cpu4: PowerPC,e500mc@4 { 134 cpu4: PowerPC,e500mc@4 {
135 device_type = "cpu"; 135 device_type = "cpu";
136 reg = <4>; 136 reg = <4>;
137 clocks = <&mux4>; 137 clocks = <&clockgen 1 4>;
138 next-level-cache = <&L2_4>; 138 next-level-cache = <&L2_4>;
139 fsl,portid-mapping = <0x08000000>; 139 fsl,portid-mapping = <0x08000000>;
140 L2_4: l2-cache { 140 L2_4: l2-cache {
@@ -144,7 +144,7 @@
144 cpu5: PowerPC,e500mc@5 { 144 cpu5: PowerPC,e500mc@5 {
145 device_type = "cpu"; 145 device_type = "cpu";
146 reg = <5>; 146 reg = <5>;
147 clocks = <&mux5>; 147 clocks = <&clockgen 1 5>;
148 next-level-cache = <&L2_5>; 148 next-level-cache = <&L2_5>;
149 fsl,portid-mapping = <0x04000000>; 149 fsl,portid-mapping = <0x04000000>;
150 L2_5: l2-cache { 150 L2_5: l2-cache {
@@ -154,7 +154,7 @@
154 cpu6: PowerPC,e500mc@6 { 154 cpu6: PowerPC,e500mc@6 {
155 device_type = "cpu"; 155 device_type = "cpu";
156 reg = <6>; 156 reg = <6>;
157 clocks = <&mux6>; 157 clocks = <&clockgen 1 6>;
158 next-level-cache = <&L2_6>; 158 next-level-cache = <&L2_6>;
159 fsl,portid-mapping = <0x02000000>; 159 fsl,portid-mapping = <0x02000000>;
160 L2_6: l2-cache { 160 L2_6: l2-cache {
@@ -164,7 +164,7 @@
164 cpu7: PowerPC,e500mc@7 { 164 cpu7: PowerPC,e500mc@7 {
165 device_type = "cpu"; 165 device_type = "cpu";
166 reg = <7>; 166 reg = <7>;
167 clocks = <&mux7>; 167 clocks = <&clockgen 1 7>;
168 next-level-cache = <&L2_7>; 168 next-level-cache = <&L2_7>;
169 fsl,portid-mapping = <0x01000000>; 169 fsl,portid-mapping = <0x01000000>;
170 L2_7: l2-cache { 170 L2_7: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index bfba0b4f1cbb..2d74ea85e5df 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -96,7 +96,7 @@
96 cpu0: PowerPC,e5500@0 { 96 cpu0: PowerPC,e5500@0 {
97 device_type = "cpu"; 97 device_type = "cpu";
98 reg = <0>; 98 reg = <0>;
99 clocks = <&mux0>; 99 clocks = <&clockgen 1 0>;
100 next-level-cache = <&L2_0>; 100 next-level-cache = <&L2_0>;
101 fsl,portid-mapping = <0x80000000>; 101 fsl,portid-mapping = <0x80000000>;
102 L2_0: l2-cache { 102 L2_0: l2-cache {
@@ -106,7 +106,7 @@
106 cpu1: PowerPC,e5500@1 { 106 cpu1: PowerPC,e5500@1 {
107 device_type = "cpu"; 107 device_type = "cpu";
108 reg = <1>; 108 reg = <1>;
109 clocks = <&mux1>; 109 clocks = <&clockgen 1 1>;
110 next-level-cache = <&L2_1>; 110 next-level-cache = <&L2_1>;
111 fsl,portid-mapping = <0x40000000>; 111 fsl,portid-mapping = <0x40000000>;
112 L2_1: l2-cache { 112 L2_1: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index e2bd9313e632..16b454b504e2 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -319,24 +319,6 @@
319/include/ "qoriq-clockgen1.dtsi" 319/include/ "qoriq-clockgen1.dtsi"
320 global-utilities@e1000 { 320 global-utilities@e1000 {
321 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0"; 321 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
322
323 mux2: mux2@40 {
324 #clock-cells = <0>;
325 reg = <0x40 0x4>;
326 compatible = "fsl,qoriq-core-mux-1.0";
327 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
328 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
329 clock-output-names = "cmux2";
330 };
331
332 mux3: mux3@60 {
333 #clock-cells = <0>;
334 reg = <0x60 0x4>;
335 compatible = "fsl,qoriq-core-mux-1.0";
336 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
337 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
338 clock-output-names = "cmux3";
339 };
340 }; 322 };
341 323
342 rcpm: global-utilities@e2000 { 324 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index dbd57750fc02..ed89dbbdacf0 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -102,7 +102,7 @@
102 cpu0: PowerPC,e5500@0 { 102 cpu0: PowerPC,e5500@0 {
103 device_type = "cpu"; 103 device_type = "cpu";
104 reg = <0>; 104 reg = <0>;
105 clocks = <&mux0>; 105 clocks = <&clockgen 1 0>;
106 next-level-cache = <&L2_0>; 106 next-level-cache = <&L2_0>;
107 fsl,portid-mapping = <0x80000000>; 107 fsl,portid-mapping = <0x80000000>;
108 L2_0: l2-cache { 108 L2_0: l2-cache {
@@ -112,7 +112,7 @@
112 cpu1: PowerPC,e5500@1 { 112 cpu1: PowerPC,e5500@1 {
113 device_type = "cpu"; 113 device_type = "cpu";
114 reg = <1>; 114 reg = <1>;
115 clocks = <&mux1>; 115 clocks = <&clockgen 1 1>;
116 next-level-cache = <&L2_1>; 116 next-level-cache = <&L2_1>;
117 fsl,portid-mapping = <0x40000000>; 117 fsl,portid-mapping = <0x40000000>;
118 L2_1: l2-cache { 118 L2_1: l2-cache {
@@ -122,7 +122,7 @@
122 cpu2: PowerPC,e5500@2 { 122 cpu2: PowerPC,e5500@2 {
123 device_type = "cpu"; 123 device_type = "cpu";
124 reg = <2>; 124 reg = <2>;
125 clocks = <&mux2>; 125 clocks = <&clockgen 1 2>;
126 next-level-cache = <&L2_2>; 126 next-level-cache = <&L2_2>;
127 fsl,portid-mapping = <0x20000000>; 127 fsl,portid-mapping = <0x20000000>;
128 L2_2: l2-cache { 128 L2_2: l2-cache {
@@ -132,7 +132,7 @@
132 cpu3: PowerPC,e5500@3 { 132 cpu3: PowerPC,e5500@3 {
133 device_type = "cpu"; 133 device_type = "cpu";
134 reg = <3>; 134 reg = <3>;
135 clocks = <&mux3>; 135 clocks = <&clockgen 1 3>;
136 next-level-cache = <&L2_3>; 136 next-level-cache = <&L2_3>;
137 fsl,portid-mapping = <0x10000000>; 137 fsl,portid-mapping = <0x10000000>;
138 L2_3: l2-cache { 138 L2_3: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
index 88cd70de4f86..463c1ed9ffdd 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
@@ -34,53 +34,6 @@
34 34
35clockgen: global-utilities@e1000 { 35clockgen: global-utilities@e1000 {
36 compatible = "fsl,qoriq-clockgen-1.0"; 36 compatible = "fsl,qoriq-clockgen-1.0";
37 ranges = <0x0 0xe1000 0x1000>;
38 reg = <0xe1000 0x1000>; 37 reg = <0xe1000 0x1000>;
39 clock-frequency = <0>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 #clock-cells = <2>; 38 #clock-cells = <2>;
43
44 sysclk: sysclk {
45 #clock-cells = <0>;
46 compatible = "fsl,qoriq-sysclk-1.0", "fixed-clock";
47 clock-output-names = "sysclk";
48 };
49 pll0: pll0@800 {
50 #clock-cells = <1>;
51 reg = <0x800 0x4>;
52 compatible = "fsl,qoriq-core-pll-1.0";
53 clocks = <&sysclk>;
54 clock-output-names = "pll0", "pll0-div2";
55 };
56 pll1: pll1@820 {
57 #clock-cells = <1>;
58 reg = <0x820 0x4>;
59 compatible = "fsl,qoriq-core-pll-1.0";
60 clocks = <&sysclk>;
61 clock-output-names = "pll1", "pll1-div2";
62 };
63 mux0: mux0@0 {
64 #clock-cells = <0>;
65 reg = <0x0 0x4>;
66 compatible = "fsl,qoriq-core-mux-1.0";
67 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
68 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
69 clock-output-names = "cmux0";
70 };
71 mux1: mux1@20 {
72 #clock-cells = <0>;
73 reg = <0x20 0x4>;
74 compatible = "fsl,qoriq-core-mux-1.0";
75 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
76 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
77 clock-output-names = "cmux1";
78 };
79 platform_pll: platform-pll@c00 {
80 #clock-cells = <1>;
81 reg = <0xc00 0x4>;
82 compatible = "fsl,qoriq-platform-pll-1.0";
83 clocks = <&sysclk>;
84 clock-output-names = "platform-pll", "platform-pll-div2";
85 };
86}; 39};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
index 6dfd7c5357ab..0361050bb56a 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
@@ -34,36 +34,6 @@
34 34
35clockgen: global-utilities@e1000 { 35clockgen: global-utilities@e1000 {
36 compatible = "fsl,qoriq-clockgen-2.0"; 36 compatible = "fsl,qoriq-clockgen-2.0";
37 ranges = <0x0 0xe1000 0x1000>;
38 reg = <0xe1000 0x1000>; 37 reg = <0xe1000 0x1000>;
39 #address-cells = <1>;
40 #size-cells = <1>;
41 #clock-cells = <2>; 38 #clock-cells = <2>;
42
43 sysclk: sysclk {
44 #clock-cells = <0>;
45 compatible = "fsl,qoriq-sysclk-2.0", "fixed-clock";
46 clock-output-names = "sysclk";
47 };
48 pll0: pll0@800 {
49 #clock-cells = <1>;
50 reg = <0x800 0x4>;
51 compatible = "fsl,qoriq-core-pll-2.0";
52 clocks = <&sysclk>;
53 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
54 };
55 pll1: pll1@820 {
56 #clock-cells = <1>;
57 reg = <0x820 0x4>;
58 compatible = "fsl,qoriq-core-pll-2.0";
59 clocks = <&sysclk>;
60 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
61 };
62 platform_pll: platform-pll@c00 {
63 #clock-cells = <1>;
64 reg = <0xc00 0x4>;
65 compatible = "fsl,qoriq-platform-pll-2.0";
66 clocks = <&sysclk>;
67 clock-output-names = "platform-pll", "platform-pll-div2";
68 };
69}; 39};
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 4908af501098..d552044c5afc 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -345,22 +345,6 @@
345/include/ "qoriq-clockgen2.dtsi" 345/include/ "qoriq-clockgen2.dtsi"
346 global-utilities@e1000 { 346 global-utilities@e1000 {
347 compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0"; 347 compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0";
348 mux0: mux0@0 {
349 #clock-cells = <0>;
350 reg = <0x0 4>;
351 compatible = "fsl,core-mux-clock";
352 clocks = <&pll0 0>, <&pll0 1>;
353 clock-names = "pll0_0", "pll0_1";
354 clock-output-names = "cmux0";
355 };
356 mux1: mux1@20 {
357 #clock-cells = <0>;
358 reg = <0x20 4>;
359 compatible = "fsl,core-mux-clock";
360 clocks = <&pll0 0>, <&pll0 1>;
361 clock-names = "pll0_0", "pll0_1";
362 clock-output-names = "cmux1";
363 };
364 }; 348 };
365 349
366 rcpm: global-utilities@e2000 { 350 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
index 9d08a363bab3..d87ea13164f2 100644
--- a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -74,7 +74,7 @@
74 cpu0: PowerPC,e5500@0 { 74 cpu0: PowerPC,e5500@0 {
75 device_type = "cpu"; 75 device_type = "cpu";
76 reg = <0>; 76 reg = <0>;
77 clocks = <&mux0>; 77 clocks = <&clockgen 1 0>;
78 next-level-cache = <&L2_1>; 78 next-level-cache = <&L2_1>;
79 #cooling-cells = <2>; 79 #cooling-cells = <2>;
80 L2_1: l2-cache { 80 L2_1: l2-cache {
@@ -84,7 +84,7 @@
84 cpu1: PowerPC,e5500@1 { 84 cpu1: PowerPC,e5500@1 {
85 device_type = "cpu"; 85 device_type = "cpu";
86 reg = <1>; 86 reg = <1>;
87 clocks = <&mux1>; 87 clocks = <&clockgen 1 1>;
88 next-level-cache = <&L2_2>; 88 next-level-cache = <&L2_2>;
89 #cooling-cells = <2>; 89 #cooling-cells = <2>;
90 L2_2: l2-cache { 90 L2_2: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 145c7f43b5b6..315d0557eefc 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -425,50 +425,6 @@
425/include/ "qoriq-clockgen2.dtsi" 425/include/ "qoriq-clockgen2.dtsi"
426 global-utilities@e1000 { 426 global-utilities@e1000 {
427 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0"; 427 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
428
429 mux0: mux0@0 {
430 #clock-cells = <0>;
431 reg = <0x0 4>;
432 compatible = "fsl,qoriq-core-mux-2.0";
433 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
434 <&pll1 0>, <&pll1 1>, <&pll1 2>;
435 clock-names = "pll0", "pll0-div2", "pll1-div4",
436 "pll1", "pll1-div2", "pll1-div4";
437 clock-output-names = "cmux0";
438 };
439
440 mux1: mux1@20 {
441 #clock-cells = <0>;
442 reg = <0x20 4>;
443 compatible = "fsl,qoriq-core-mux-2.0";
444 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
445 <&pll1 0>, <&pll1 1>, <&pll1 2>;
446 clock-names = "pll0", "pll0-div2", "pll1-div4",
447 "pll1", "pll1-div2", "pll1-div4";
448 clock-output-names = "cmux1";
449 };
450
451 mux2: mux2@40 {
452 #clock-cells = <0>;
453 reg = <0x40 4>;
454 compatible = "fsl,qoriq-core-mux-2.0";
455 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
456 <&pll1 0>, <&pll1 1>, <&pll1 2>;
457 clock-names = "pll0", "pll0-div2", "pll1-div4",
458 "pll1", "pll1-div2", "pll1-div4";
459 clock-output-names = "cmux2";
460 };
461
462 mux3: mux3@60 {
463 #clock-cells = <0>;
464 reg = <0x60 4>;
465 compatible = "fsl,qoriq-core-mux-2.0";
466 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
467 <&pll1 0>, <&pll1 1>, <&pll1 2>;
468 clock-names = "pll0_0", "pll0_1", "pll0_2",
469 "pll1_0", "pll1_1", "pll1_2";
470 clock-output-names = "cmux3";
471 };
472 }; 428 };
473 429
474 rcpm: global-utilities@e2000 { 430 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
index 6db0ee8b1384..dd59e4b69480 100644
--- a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
@@ -74,7 +74,7 @@
74 cpu0: PowerPC,e5500@0 { 74 cpu0: PowerPC,e5500@0 {
75 device_type = "cpu"; 75 device_type = "cpu";
76 reg = <0>; 76 reg = <0>;
77 clocks = <&mux0>; 77 clocks = <&clockgen 1 0>;
78 next-level-cache = <&L2_1>; 78 next-level-cache = <&L2_1>;
79 #cooling-cells = <2>; 79 #cooling-cells = <2>;
80 L2_1: l2-cache { 80 L2_1: l2-cache {
@@ -84,7 +84,7 @@
84 cpu1: PowerPC,e5500@1 { 84 cpu1: PowerPC,e5500@1 {
85 device_type = "cpu"; 85 device_type = "cpu";
86 reg = <1>; 86 reg = <1>;
87 clocks = <&mux1>; 87 clocks = <&clockgen 1 1>;
88 next-level-cache = <&L2_2>; 88 next-level-cache = <&L2_2>;
89 #cooling-cells = <2>; 89 #cooling-cells = <2>;
90 L2_2: l2-cache { 90 L2_2: l2-cache {
@@ -94,7 +94,7 @@
94 cpu2: PowerPC,e5500@2 { 94 cpu2: PowerPC,e5500@2 {
95 device_type = "cpu"; 95 device_type = "cpu";
96 reg = <2>; 96 reg = <2>;
97 clocks = <&mux2>; 97 clocks = <&clockgen 1 2>;
98 next-level-cache = <&L2_3>; 98 next-level-cache = <&L2_3>;
99 #cooling-cells = <2>; 99 #cooling-cells = <2>;
100 L2_3: l2-cache { 100 L2_3: l2-cache {
@@ -104,7 +104,7 @@
104 cpu3: PowerPC,e5500@3 { 104 cpu3: PowerPC,e5500@3 {
105 device_type = "cpu"; 105 device_type = "cpu";
106 reg = <3>; 106 reg = <3>;
107 clocks = <&mux3>; 107 clocks = <&clockgen 1 3>;
108 next-level-cache = <&L2_4>; 108 next-level-cache = <&L2_4>;
109 #cooling-cells = <2>; 109 #cooling-cells = <2>;
110 L2_4: l2-cache { 110 L2_4: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index a97296c64eb2..ecbb447920bc 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -535,28 +535,6 @@
535/include/ "qoriq-clockgen2.dtsi" 535/include/ "qoriq-clockgen2.dtsi"
536 global-utilities@e1000 { 536 global-utilities@e1000 {
537 compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0"; 537 compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0";
538
539 mux0: mux0@0 {
540 #clock-cells = <0>;
541 reg = <0x0 4>;
542 compatible = "fsl,qoriq-core-mux-2.0";
543 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
544 <&pll1 0>, <&pll1 1>, <&pll1 2>;
545 clock-names = "pll0", "pll0-div2", "pll0-div4",
546 "pll1", "pll1-div2", "pll1-div4";
547 clock-output-names = "cmux0";
548 };
549
550 mux1: mux1@20 {
551 #clock-cells = <0>;
552 reg = <0x20 4>;
553 compatible = "fsl,qoriq-core-mux-2.0";
554 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
555 <&pll1 0>, <&pll1 1>, <&pll1 2>;
556 clock-names = "pll0", "pll0-div2", "pll0-div4",
557 "pll1", "pll1-div2", "pll1-div4";
558 clock-output-names = "cmux1";
559 };
560 }; 538 };
561 539
562 rcpm: global-utilities@e2000 { 540 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
index c2e57203910d..3f745de44284 100644
--- a/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
@@ -81,28 +81,28 @@
81 cpu0: PowerPC,e6500@0 { 81 cpu0: PowerPC,e6500@0 {
82 device_type = "cpu"; 82 device_type = "cpu";
83 reg = <0 1>; 83 reg = <0 1>;
84 clocks = <&mux0>; 84 clocks = <&clockgen 1 0>;
85 next-level-cache = <&L2_1>; 85 next-level-cache = <&L2_1>;
86 fsl,portid-mapping = <0x80000000>; 86 fsl,portid-mapping = <0x80000000>;
87 }; 87 };
88 cpu1: PowerPC,e6500@2 { 88 cpu1: PowerPC,e6500@2 {
89 device_type = "cpu"; 89 device_type = "cpu";
90 reg = <2 3>; 90 reg = <2 3>;
91 clocks = <&mux0>; 91 clocks = <&clockgen 1 0>;
92 next-level-cache = <&L2_1>; 92 next-level-cache = <&L2_1>;
93 fsl,portid-mapping = <0x80000000>; 93 fsl,portid-mapping = <0x80000000>;
94 }; 94 };
95 cpu2: PowerPC,e6500@4 { 95 cpu2: PowerPC,e6500@4 {
96 device_type = "cpu"; 96 device_type = "cpu";
97 reg = <4 5>; 97 reg = <4 5>;
98 clocks = <&mux0>; 98 clocks = <&clockgen 1 0>;
99 next-level-cache = <&L2_1>; 99 next-level-cache = <&L2_1>;
100 fsl,portid-mapping = <0x80000000>; 100 fsl,portid-mapping = <0x80000000>;
101 }; 101 };
102 cpu3: PowerPC,e6500@6 { 102 cpu3: PowerPC,e6500@6 {
103 device_type = "cpu"; 103 device_type = "cpu";
104 reg = <6 7>; 104 reg = <6 7>;
105 clocks = <&mux0>; 105 clocks = <&clockgen 1 0>;
106 next-level-cache = <&L2_1>; 106 next-level-cache = <&L2_1>;
107 fsl,portid-mapping = <0x80000000>; 107 fsl,portid-mapping = <0x80000000>;
108 }; 108 };
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 68c4eadc19e3..fcac73486d48 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -950,67 +950,6 @@
950/include/ "qoriq-clockgen2.dtsi" 950/include/ "qoriq-clockgen2.dtsi"
951 global-utilities@e1000 { 951 global-utilities@e1000 {
952 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; 952 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
953
954 pll2: pll2@840 {
955 #clock-cells = <1>;
956 reg = <0x840 0x4>;
957 compatible = "fsl,qoriq-core-pll-2.0";
958 clocks = <&sysclk>;
959 clock-output-names = "pll2", "pll2-div2", "pll2-div4";
960 };
961
962 pll3: pll3@860 {
963 #clock-cells = <1>;
964 reg = <0x860 0x4>;
965 compatible = "fsl,qoriq-core-pll-2.0";
966 clocks = <&sysclk>;
967 clock-output-names = "pll3", "pll3-div2", "pll3-div4";
968 };
969
970 pll4: pll4@880 {
971 #clock-cells = <1>;
972 reg = <0x880 0x4>;
973 compatible = "fsl,qoriq-core-pll-2.0";
974 clocks = <&sysclk>;
975 clock-output-names = "pll4", "pll4-div2", "pll4-div4";
976 };
977
978 mux0: mux0@0 {
979 #clock-cells = <0>;
980 reg = <0x0 0x4>;
981 compatible = "fsl,qoriq-core-mux-2.0";
982 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
983 <&pll1 0>, <&pll1 1>, <&pll1 2>,
984 <&pll2 0>, <&pll2 1>, <&pll2 2>;
985 clock-names = "pll0", "pll0-div2", "pll0-div4",
986 "pll1", "pll1-div2", "pll1-div4",
987 "pll2", "pll2-div2", "pll2-div4";
988 clock-output-names = "cmux0";
989 };
990
991 mux1: mux1@20 {
992 #clock-cells = <0>;
993 reg = <0x20 0x4>;
994 compatible = "fsl,qoriq-core-mux-2.0";
995 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
996 <&pll1 0>, <&pll1 1>, <&pll1 2>,
997 <&pll2 0>, <&pll2 1>, <&pll2 2>;
998 clock-names = "pll0", "pll0-div2", "pll0-div4",
999 "pll1", "pll1-div2", "pll1-div4",
1000 "pll2", "pll2-div2", "pll2-div4";
1001 clock-output-names = "cmux1";
1002 };
1003
1004 mux2: mux2@40 {
1005 #clock-cells = <0>;
1006 reg = <0x40 0x4>;
1007 compatible = "fsl,qoriq-core-mux-2.0";
1008 clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
1009 <&pll4 0>, <&pll4 1>, <&pll4 2>;
1010 clock-names = "pll3", "pll3-div2", "pll3-div4",
1011 "pll4", "pll4-div2", "pll4-div4";
1012 clock-output-names = "cmux2";
1013 };
1014 }; 953 };
1015 954
1016 rcpm: global-utilities@e2000 { 955 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index 038cf8fadee4..632314c6faa9 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -90,84 +90,84 @@
90 cpu0: PowerPC,e6500@0 { 90 cpu0: PowerPC,e6500@0 {
91 device_type = "cpu"; 91 device_type = "cpu";
92 reg = <0 1>; 92 reg = <0 1>;
93 clocks = <&mux0>; 93 clocks = <&clockgen 1 0>;
94 next-level-cache = <&L2_1>; 94 next-level-cache = <&L2_1>;
95 fsl,portid-mapping = <0x80000000>; 95 fsl,portid-mapping = <0x80000000>;
96 }; 96 };
97 cpu1: PowerPC,e6500@2 { 97 cpu1: PowerPC,e6500@2 {
98 device_type = "cpu"; 98 device_type = "cpu";
99 reg = <2 3>; 99 reg = <2 3>;
100 clocks = <&mux0>; 100 clocks = <&clockgen 1 0>;
101 next-level-cache = <&L2_1>; 101 next-level-cache = <&L2_1>;
102 fsl,portid-mapping = <0x80000000>; 102 fsl,portid-mapping = <0x80000000>;
103 }; 103 };
104 cpu2: PowerPC,e6500@4 { 104 cpu2: PowerPC,e6500@4 {
105 device_type = "cpu"; 105 device_type = "cpu";
106 reg = <4 5>; 106 reg = <4 5>;
107 clocks = <&mux0>; 107 clocks = <&clockgen 1 0>;
108 next-level-cache = <&L2_1>; 108 next-level-cache = <&L2_1>;
109 fsl,portid-mapping = <0x80000000>; 109 fsl,portid-mapping = <0x80000000>;
110 }; 110 };
111 cpu3: PowerPC,e6500@6 { 111 cpu3: PowerPC,e6500@6 {
112 device_type = "cpu"; 112 device_type = "cpu";
113 reg = <6 7>; 113 reg = <6 7>;
114 clocks = <&mux0>; 114 clocks = <&clockgen 1 0>;
115 next-level-cache = <&L2_1>; 115 next-level-cache = <&L2_1>;
116 fsl,portid-mapping = <0x80000000>; 116 fsl,portid-mapping = <0x80000000>;
117 }; 117 };
118 cpu4: PowerPC,e6500@8 { 118 cpu4: PowerPC,e6500@8 {
119 device_type = "cpu"; 119 device_type = "cpu";
120 reg = <8 9>; 120 reg = <8 9>;
121 clocks = <&mux1>; 121 clocks = <&clockgen 1 1>;
122 next-level-cache = <&L2_2>; 122 next-level-cache = <&L2_2>;
123 fsl,portid-mapping = <0x40000000>; 123 fsl,portid-mapping = <0x40000000>;
124 }; 124 };
125 cpu5: PowerPC,e6500@10 { 125 cpu5: PowerPC,e6500@10 {
126 device_type = "cpu"; 126 device_type = "cpu";
127 reg = <10 11>; 127 reg = <10 11>;
128 clocks = <&mux1>; 128 clocks = <&clockgen 1 1>;
129 next-level-cache = <&L2_2>; 129 next-level-cache = <&L2_2>;
130 fsl,portid-mapping = <0x40000000>; 130 fsl,portid-mapping = <0x40000000>;
131 }; 131 };
132 cpu6: PowerPC,e6500@12 { 132 cpu6: PowerPC,e6500@12 {
133 device_type = "cpu"; 133 device_type = "cpu";
134 reg = <12 13>; 134 reg = <12 13>;
135 clocks = <&mux1>; 135 clocks = <&clockgen 1 1>;
136 next-level-cache = <&L2_2>; 136 next-level-cache = <&L2_2>;
137 fsl,portid-mapping = <0x40000000>; 137 fsl,portid-mapping = <0x40000000>;
138 }; 138 };
139 cpu7: PowerPC,e6500@14 { 139 cpu7: PowerPC,e6500@14 {
140 device_type = "cpu"; 140 device_type = "cpu";
141 reg = <14 15>; 141 reg = <14 15>;
142 clocks = <&mux1>; 142 clocks = <&clockgen 1 1>;
143 next-level-cache = <&L2_2>; 143 next-level-cache = <&L2_2>;
144 fsl,portid-mapping = <0x40000000>; 144 fsl,portid-mapping = <0x40000000>;
145 }; 145 };
146 cpu8: PowerPC,e6500@16 { 146 cpu8: PowerPC,e6500@16 {
147 device_type = "cpu"; 147 device_type = "cpu";
148 reg = <16 17>; 148 reg = <16 17>;
149 clocks = <&mux2>; 149 clocks = <&clockgen 1 2>;
150 next-level-cache = <&L2_3>; 150 next-level-cache = <&L2_3>;
151 fsl,portid-mapping = <0x20000000>; 151 fsl,portid-mapping = <0x20000000>;
152 }; 152 };
153 cpu9: PowerPC,e6500@18 { 153 cpu9: PowerPC,e6500@18 {
154 device_type = "cpu"; 154 device_type = "cpu";
155 reg = <18 19>; 155 reg = <18 19>;
156 clocks = <&mux2>; 156 clocks = <&clockgen 1 2>;
157 next-level-cache = <&L2_3>; 157 next-level-cache = <&L2_3>;
158 fsl,portid-mapping = <0x20000000>; 158 fsl,portid-mapping = <0x20000000>;
159 }; 159 };
160 cpu10: PowerPC,e6500@20 { 160 cpu10: PowerPC,e6500@20 {
161 device_type = "cpu"; 161 device_type = "cpu";
162 reg = <20 21>; 162 reg = <20 21>;
163 clocks = <&mux2>; 163 clocks = <&clockgen 1 2>;
164 next-level-cache = <&L2_3>; 164 next-level-cache = <&L2_3>;
165 fsl,portid-mapping = <0x20000000>; 165 fsl,portid-mapping = <0x20000000>;
166 }; 166 };
167 cpu11: PowerPC,e6500@22 { 167 cpu11: PowerPC,e6500@22 {
168 device_type = "cpu"; 168 device_type = "cpu";
169 reg = <22 23>; 169 reg = <22 23>;
170 clocks = <&mux2>; 170 clocks = <&clockgen 1 2>;
171 next-level-cache = <&L2_3>; 171 next-level-cache = <&L2_3>;
172 fsl,portid-mapping = <0x20000000>; 172 fsl,portid-mapping = <0x20000000>;
173 }; 173 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 647cae14c16d..be6ef3531b28 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -311,13 +311,9 @@
311 compatible = "fsl,ucc-mdio"; 311 compatible = "fsl,ucc-mdio";
312 312
313 phy00:ethernet-phy@0 { 313 phy00:ethernet-phy@0 {
314 interrupt-parent = <&ipic>;
315 interrupts = <0>;
316 reg = <0x0>; 314 reg = <0x0>;
317 }; 315 };
318 phy04:ethernet-phy@4 { 316 phy04:ethernet-phy@4 {
319 interrupt-parent = <&ipic>;
320 interrupts = <0>;
321 reg = <0x4>; 317 reg = <0x4>;
322 }; 318 };
323 }; 319 };
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index f045f8494bf9..b0491b8c0199 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -93,7 +93,8 @@ static void *serial_get_stdout_devp(void)
93 if (devp == NULL) 93 if (devp == NULL)
94 goto err_out; 94 goto err_out;
95 95
96 if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) { 96 if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0 ||
97 getprop(devp, "stdout-path", path, MAX_PATH_LEN) > 0) {
97 devp = finddevice(path); 98 devp = finddevice(path);
98 if (devp == NULL) 99 if (devp == NULL)
99 goto err_out; 100 goto err_out;
diff --git a/arch/powerpc/configs/fsl-emb-nonhw.config b/arch/powerpc/configs/fsl-emb-nonhw.config
index e0567dc41968..d592ba27b122 100644
--- a/arch/powerpc/configs/fsl-emb-nonhw.config
+++ b/arch/powerpc/configs/fsl-emb-nonhw.config
@@ -25,6 +25,7 @@ CONFIG_CRYPTO_SHA256=y
25CONFIG_CRYPTO_SHA512=y 25CONFIG_CRYPTO_SHA512=y
26CONFIG_DEBUG_FS=y 26CONFIG_DEBUG_FS=y
27CONFIG_DEBUG_INFO=y 27CONFIG_DEBUG_INFO=y
28CONFIG_DEBUG_KERNEL=y
28CONFIG_DEBUG_SHIRQ=y 29CONFIG_DEBUG_SHIRQ=y
29CONFIG_DETECT_HUNG_TASK=y 30CONFIG_DETECT_HUNG_TASK=y
30CONFIG_DEVTMPFS_MOUNT=y 31CONFIG_DEVTMPFS_MOUNT=y
diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig
index f686cc1eac0b..ceb3c770786f 100644
--- a/arch/powerpc/configs/g5_defconfig
+++ b/arch/powerpc/configs/g5_defconfig
@@ -246,7 +246,6 @@ CONFIG_DEBUG_KERNEL=y
246CONFIG_DEBUG_MUTEXES=y 246CONFIG_DEBUG_MUTEXES=y
247CONFIG_LATENCYTOP=y 247CONFIG_LATENCYTOP=y
248CONFIG_BOOTX_TEXT=y 248CONFIG_BOOTX_TEXT=y
249CONFIG_PPC_EARLY_DEBUG=y
250CONFIG_CRYPTO_TEST=m 249CONFIG_CRYPTO_TEST=m
251CONFIG_CRYPTO_PCBC=m 250CONFIG_CRYPTO_PCBC=m
252CONFIG_CRYPTO_HMAC=y 251CONFIG_CRYPTO_HMAC=y
diff --git a/arch/powerpc/configs/guest.config b/arch/powerpc/configs/guest.config
new file mode 100644
index 000000000000..8b8cd18ecd7c
--- /dev/null
+++ b/arch/powerpc/configs/guest.config
@@ -0,0 +1,13 @@
1CONFIG_VIRTIO_BLK=y
2CONFIG_VIRTIO_BLK_SCSI=y
3CONFIG_SCSI_VIRTIO=y
4CONFIG_VIRTIO_NET=y
5CONFIG_NET_FAILOVER=y
6CONFIG_VIRTIO_CONSOLE=y
7CONFIG_VIRTIO=y
8CONFIG_VIRTIO_PCI=y
9CONFIG_KVM_GUEST=y
10CONFIG_EPAPR_PARAVIRT=y
11CONFIG_VIRTIO_BALLOON=y
12CONFIG_VHOST_NET=y
13CONFIG_VHOST=y
diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig
index f71eddafb02f..c5f2005005d3 100644
--- a/arch/powerpc/configs/maple_defconfig
+++ b/arch/powerpc/configs/maple_defconfig
@@ -108,7 +108,6 @@ CONFIG_LATENCYTOP=y
108CONFIG_XMON=y 108CONFIG_XMON=y
109CONFIG_XMON_DEFAULT=y 109CONFIG_XMON_DEFAULT=y
110CONFIG_BOOTX_TEXT=y 110CONFIG_BOOTX_TEXT=y
111CONFIG_PPC_EARLY_DEBUG=y
112CONFIG_CRYPTO_ECB=m 111CONFIG_CRYPTO_ECB=m
113CONFIG_CRYPTO_PCBC=m 112CONFIG_CRYPTO_PCBC=m
114# CONFIG_CRYPTO_HW is not set 113# CONFIG_CRYPTO_HW is not set
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig
index 62948d198d7f..50b610b48914 100644
--- a/arch/powerpc/configs/pmac32_defconfig
+++ b/arch/powerpc/configs/pmac32_defconfig
@@ -297,7 +297,6 @@ CONFIG_LATENCYTOP=y
297CONFIG_XMON=y 297CONFIG_XMON=y
298CONFIG_XMON_DEFAULT=y 298CONFIG_XMON_DEFAULT=y
299CONFIG_BOOTX_TEXT=y 299CONFIG_BOOTX_TEXT=y
300CONFIG_PPC_EARLY_DEBUG=y
301CONFIG_CRYPTO_PCBC=m 300CONFIG_CRYPTO_PCBC=m
302CONFIG_CRYPTO_MD4=m 301CONFIG_CRYPTO_MD4=m
303CONFIG_CRYPTO_SHA512=m 302CONFIG_CRYPTO_SHA512=m
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index f2515674a1e2..91fdb619b484 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -1,4 +1,3 @@
1CONFIG_PPC64=y
2CONFIG_SYSVIPC=y 1CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y 2CONFIG_POSIX_MQUEUE=y
4CONFIG_NO_HZ=y 3CONFIG_NO_HZ=y
@@ -9,21 +8,22 @@ CONFIG_IKCONFIG=y
9CONFIG_IKCONFIG_PROC=y 8CONFIG_IKCONFIG_PROC=y
10CONFIG_LOG_BUF_SHIFT=18 9CONFIG_LOG_BUF_SHIFT=18
11CONFIG_LOG_CPU_MAX_BUF_SHIFT=13 10CONFIG_LOG_CPU_MAX_BUF_SHIFT=13
11CONFIG_NUMA_BALANCING=y
12CONFIG_CGROUPS=y 12CONFIG_CGROUPS=y
13CONFIG_MEMCG=y
14CONFIG_CGROUP_SCHED=y
15CONFIG_CGROUP_FREEZER=y
13CONFIG_CPUSETS=y 16CONFIG_CPUSETS=y
17CONFIG_CGROUP_DEVICE=y
18CONFIG_CGROUP_CPUACCT=y
19CONFIG_CGROUP_PERF=y
14CONFIG_CGROUP_BPF=y 20CONFIG_CGROUP_BPF=y
15CONFIG_BLK_DEV_INITRD=y 21CONFIG_BLK_DEV_INITRD=y
16CONFIG_BPF_SYSCALL=y 22CONFIG_BPF_SYSCALL=y
17# CONFIG_COMPAT_BRK is not set 23# CONFIG_COMPAT_BRK is not set
18CONFIG_PROFILING=y 24CONFIG_PROFILING=y
19CONFIG_OPROFILE=m 25CONFIG_PPC64=y
20CONFIG_KPROBES=y 26CONFIG_NR_CPUS=2048
21CONFIG_JUMP_LABEL=y
22CONFIG_MODULES=y
23CONFIG_MODULE_UNLOAD=y
24CONFIG_MODVERSIONS=y
25CONFIG_MODULE_SRCVERSION_ALL=y
26CONFIG_PARTITION_ADVANCED=y
27CONFIG_PPC_SPLPAR=y 27CONFIG_PPC_SPLPAR=y
28CONFIG_DTL=y 28CONFIG_DTL=y
29CONFIG_SCANLOG=m 29CONFIG_SCANLOG=m
@@ -45,14 +45,11 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
45CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y 45CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
46CONFIG_CPU_FREQ_PMAC64=y 46CONFIG_CPU_FREQ_PMAC64=y
47CONFIG_HZ_100=y 47CONFIG_HZ_100=y
48CONFIG_BINFMT_MISC=m
49CONFIG_PPC_TRANSACTIONAL_MEM=y 48CONFIG_PPC_TRANSACTIONAL_MEM=y
50CONFIG_KEXEC=y 49CONFIG_KEXEC=y
51CONFIG_KEXEC_FILE=y 50CONFIG_KEXEC_FILE=y
52CONFIG_CRASH_DUMP=y 51CONFIG_CRASH_DUMP=y
53CONFIG_IRQ_ALL_CPUS=y 52CONFIG_IRQ_ALL_CPUS=y
54CONFIG_KSM=y
55CONFIG_TRANSPARENT_HUGEPAGE=y
56CONFIG_PPC_64K_PAGES=y 53CONFIG_PPC_64K_PAGES=y
57CONFIG_SCHED_SMT=y 54CONFIG_SCHED_SMT=y
58CONFIG_HOTPLUG_PCI=y 55CONFIG_HOTPLUG_PCI=y
@@ -60,6 +57,23 @@ CONFIG_HOTPLUG_PCI_RPA=m
60CONFIG_HOTPLUG_PCI_RPA_DLPAR=m 57CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
61CONFIG_PCCARD=y 58CONFIG_PCCARD=y
62CONFIG_ELECTRA_CF=y 59CONFIG_ELECTRA_CF=y
60CONFIG_VIRTUALIZATION=y
61CONFIG_KVM_BOOK3S_64=m
62CONFIG_KVM_BOOK3S_64_HV=m
63CONFIG_VHOST_NET=m
64CONFIG_OPROFILE=m
65CONFIG_KPROBES=y
66CONFIG_JUMP_LABEL=y
67CONFIG_MODULES=y
68CONFIG_MODULE_UNLOAD=y
69CONFIG_MODVERSIONS=y
70CONFIG_MODULE_SRCVERSION_ALL=y
71CONFIG_PARTITION_ADVANCED=y
72CONFIG_BINFMT_MISC=m
73CONFIG_MEMORY_HOTPLUG=y
74CONFIG_MEMORY_HOTREMOVE=y
75CONFIG_KSM=y
76CONFIG_TRANSPARENT_HUGEPAGE=y
63CONFIG_NET=y 77CONFIG_NET=y
64CONFIG_PACKET=y 78CONFIG_PACKET=y
65CONFIG_UNIX=y 79CONFIG_UNIX=y
@@ -163,7 +177,6 @@ CONFIG_TIGON3=y
163CONFIG_BNX2X=m 177CONFIG_BNX2X=m
164CONFIG_CHELSIO_T1=m 178CONFIG_CHELSIO_T1=m
165CONFIG_BE2NET=m 179CONFIG_BE2NET=m
166CONFIG_S2IO=m
167CONFIG_IBMVETH=m 180CONFIG_IBMVETH=m
168CONFIG_EHEA=m 181CONFIG_EHEA=m
169CONFIG_E100=y 182CONFIG_E100=y
@@ -174,6 +187,7 @@ CONFIG_IXGBE=m
174CONFIG_I40E=m 187CONFIG_I40E=m
175CONFIG_MLX4_EN=m 188CONFIG_MLX4_EN=m
176CONFIG_MYRI10GE=m 189CONFIG_MYRI10GE=m
190CONFIG_S2IO=m
177CONFIG_PASEMI_MAC=y 191CONFIG_PASEMI_MAC=y
178CONFIG_QLGE=m 192CONFIG_QLGE=m
179CONFIG_NETXEN_NIC=m 193CONFIG_NETXEN_NIC=m
@@ -284,7 +298,7 @@ CONFIG_REISERFS_FS_SECURITY=y
284CONFIG_JFS_FS=m 298CONFIG_JFS_FS=m
285CONFIG_JFS_POSIX_ACL=y 299CONFIG_JFS_POSIX_ACL=y
286CONFIG_JFS_SECURITY=y 300CONFIG_JFS_SECURITY=y
287CONFIG_XFS_FS=m 301CONFIG_XFS_FS=y
288CONFIG_XFS_POSIX_ACL=y 302CONFIG_XFS_POSIX_ACL=y
289CONFIG_BTRFS_FS=m 303CONFIG_BTRFS_FS=m
290CONFIG_BTRFS_FS_POSIX_ACL=y 304CONFIG_BTRFS_FS_POSIX_ACL=y
@@ -323,25 +337,6 @@ CONFIG_NLS_CODEPAGE_437=y
323CONFIG_NLS_ASCII=y 337CONFIG_NLS_ASCII=y
324CONFIG_NLS_ISO8859_1=y 338CONFIG_NLS_ISO8859_1=y
325CONFIG_NLS_UTF8=y 339CONFIG_NLS_UTF8=y
326CONFIG_MAGIC_SYSRQ=y
327CONFIG_DEBUG_KERNEL=y
328CONFIG_DEBUG_STACK_USAGE=y
329CONFIG_DEBUG_STACKOVERFLOW=y
330CONFIG_SOFTLOCKUP_DETECTOR=y
331CONFIG_HARDLOCKUP_DETECTOR=y
332CONFIG_DEBUG_MUTEXES=y
333CONFIG_LATENCYTOP=y
334CONFIG_FTRACE=y
335CONFIG_FUNCTION_TRACER=y
336CONFIG_FUNCTION_GRAPH_TRACER=y
337CONFIG_SCHED_TRACER=y
338CONFIG_BLK_DEV_IO_TRACE=y
339CONFIG_CODE_PATCHING_SELFTEST=y
340CONFIG_FTR_FIXUP_SELFTEST=y
341CONFIG_MSI_BITMAP_SELFTEST=y
342CONFIG_XMON=y
343CONFIG_BOOTX_TEXT=y
344CONFIG_PPC_EARLY_DEBUG=y
345CONFIG_CRYPTO_TEST=m 340CONFIG_CRYPTO_TEST=m
346CONFIG_CRYPTO_PCBC=m 341CONFIG_CRYPTO_PCBC=m
347CONFIG_CRYPTO_HMAC=y 342CONFIG_CRYPTO_HMAC=y
@@ -364,8 +359,20 @@ CONFIG_CRYPTO_LZO=m
364CONFIG_CRYPTO_DEV_NX=y 359CONFIG_CRYPTO_DEV_NX=y
365CONFIG_CRYPTO_DEV_NX_ENCRYPT=m 360CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
366CONFIG_CRYPTO_DEV_VMX=y 361CONFIG_CRYPTO_DEV_VMX=y
367CONFIG_VIRTUALIZATION=y
368CONFIG_KVM_BOOK3S_64=m
369CONFIG_KVM_BOOK3S_64_HV=m
370CONFIG_VHOST_NET=m
371CONFIG_PRINTK_TIME=y 362CONFIG_PRINTK_TIME=y
363CONFIG_MAGIC_SYSRQ=y
364CONFIG_DEBUG_KERNEL=y
365CONFIG_DEBUG_STACK_USAGE=y
366CONFIG_DEBUG_STACKOVERFLOW=y
367CONFIG_SOFTLOCKUP_DETECTOR=y
368CONFIG_HARDLOCKUP_DETECTOR=y
369CONFIG_DEBUG_MUTEXES=y
370CONFIG_LATENCYTOP=y
371CONFIG_FUNCTION_TRACER=y
372CONFIG_SCHED_TRACER=y
373CONFIG_BLK_DEV_IO_TRACE=y
374CONFIG_CODE_PATCHING_SELFTEST=y
375CONFIG_FTR_FIXUP_SELFTEST=y
376CONFIG_MSI_BITMAP_SELFTEST=y
377CONFIG_XMON=y
378CONFIG_BOOTX_TEXT=y
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig
index 7ee736f20774..53687c3a70c4 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -1155,7 +1155,6 @@ CONFIG_STACK_TRACER=y
1155CONFIG_BLK_DEV_IO_TRACE=y 1155CONFIG_BLK_DEV_IO_TRACE=y
1156CONFIG_XMON=y 1156CONFIG_XMON=y
1157CONFIG_BOOTX_TEXT=y 1157CONFIG_BOOTX_TEXT=y
1158CONFIG_PPC_EARLY_DEBUG=y
1159CONFIG_SECURITY=y 1158CONFIG_SECURITY=y
1160CONFIG_SECURITY_NETWORK=y 1159CONFIG_SECURITY_NETWORK=y
1161CONFIG_SECURITY_NETWORK_XFRM=y 1160CONFIG_SECURITY_NETWORK_XFRM=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 5e09a40cbcbf..ea79c519863d 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -290,9 +290,7 @@ CONFIG_DEBUG_STACKOVERFLOW=y
290CONFIG_SOFTLOCKUP_DETECTOR=y 290CONFIG_SOFTLOCKUP_DETECTOR=y
291CONFIG_HARDLOCKUP_DETECTOR=y 291CONFIG_HARDLOCKUP_DETECTOR=y
292CONFIG_LATENCYTOP=y 292CONFIG_LATENCYTOP=y
293CONFIG_FTRACE=y
294CONFIG_FUNCTION_TRACER=y 293CONFIG_FUNCTION_TRACER=y
295CONFIG_FUNCTION_GRAPH_TRACER=y
296CONFIG_SCHED_TRACER=y 294CONFIG_SCHED_TRACER=y
297CONFIG_BLK_DEV_IO_TRACE=y 295CONFIG_BLK_DEV_IO_TRACE=y
298CONFIG_CODE_PATCHING_SELFTEST=y 296CONFIG_CODE_PATCHING_SELFTEST=y
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index 3196d227e351..77ff7fb24823 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -1,3 +1,7 @@
1generated-y += syscall_table_32.h
2generated-y += syscall_table_64.h
3generated-y += syscall_table_c32.h
4generated-y += syscall_table_spu.h
1generic-y += div64.h 5generic-y += div64.h
2generic-y += export.h 6generic-y += export.h
3generic-y += irq_regs.h 7generic-y += irq_regs.h
diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h
index ec691d489656..6f201b199c02 100644
--- a/arch/powerpc/include/asm/asm-prototypes.h
+++ b/arch/powerpc/include/asm/asm-prototypes.h
@@ -61,7 +61,6 @@ void RunModeException(struct pt_regs *regs);
61void single_step_exception(struct pt_regs *regs); 61void single_step_exception(struct pt_regs *regs);
62void program_check_exception(struct pt_regs *regs); 62void program_check_exception(struct pt_regs *regs);
63void alignment_exception(struct pt_regs *regs); 63void alignment_exception(struct pt_regs *regs);
64void slb_miss_bad_addr(struct pt_regs *regs);
65void StackOverflow(struct pt_regs *regs); 64void StackOverflow(struct pt_regs *regs);
66void kernel_fp_unavailable_exception(struct pt_regs *regs); 65void kernel_fp_unavailable_exception(struct pt_regs *regs);
67void altivec_unavailable_exception(struct pt_regs *regs); 66void altivec_unavailable_exception(struct pt_regs *regs);
diff --git a/arch/powerpc/include/asm/book3s/32/hash.h b/arch/powerpc/include/asm/book3s/32/hash.h
index f2892c7ab73e..2a0a467d2985 100644
--- a/arch/powerpc/include/asm/book3s/32/hash.h
+++ b/arch/powerpc/include/asm/book3s/32/hash.h
@@ -26,6 +26,7 @@
26#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */ 26#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
27#define _PAGE_DIRTY 0x080 /* C: page changed */ 27#define _PAGE_DIRTY 0x080 /* C: page changed */
28#define _PAGE_ACCESSED 0x100 /* R: page referenced */ 28#define _PAGE_ACCESSED 0x100 /* R: page referenced */
29#define _PAGE_EXEC 0x200 /* software: exec allowed */
29#define _PAGE_RW 0x400 /* software: user write access allowed */ 30#define _PAGE_RW 0x400 /* software: user write access allowed */
30#define _PAGE_SPECIAL 0x800 /* software: Special page */ 31#define _PAGE_SPECIAL 0x800 /* software: Special page */
31 32
diff --git a/arch/powerpc/include/asm/book3s/32/mmu-hash.h b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
index e38c91388c40..0c261ba2c826 100644
--- a/arch/powerpc/include/asm/book3s/32/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
@@ -1,6 +1,7 @@
1/* SPDX-License-Identifier: GPL-2.0 */ 1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_ 2#ifndef _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_
3#define _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_ 3#define _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_
4
4/* 5/*
5 * 32-bit hash table MMU support 6 * 32-bit hash table MMU support
6 */ 7 */
@@ -9,6 +10,8 @@
9 * BATs 10 * BATs
10 */ 11 */
11 12
13#include <asm/page.h>
14
12/* Block size masks */ 15/* Block size masks */
13#define BL_128K 0x000 16#define BL_128K 0x000
14#define BL_256K 0x001 17#define BL_256K 0x001
@@ -34,14 +37,20 @@
34#define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \ 37#define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \
35 ((x & 0x0000000e00000000ULL) >> 24) | \ 38 ((x & 0x0000000e00000000ULL) >> 24) | \
36 ((x & 0x0000000100000000ULL) >> 30))) 39 ((x & 0x0000000100000000ULL) >> 30)))
40#define PHYS_BAT_ADDR(x) (((u64)(x) & 0x00000000fffe0000ULL) | \
41 (((u64)(x) << 24) & 0x0000000e00000000ULL) | \
42 (((u64)(x) << 30) & 0x0000000100000000ULL))
37#else 43#else
38#define BAT_PHYS_ADDR(x) (x) 44#define BAT_PHYS_ADDR(x) (x)
45#define PHYS_BAT_ADDR(x) ((x) & 0xfffe0000)
39#endif 46#endif
40 47
41struct ppc_bat { 48struct ppc_bat {
42 u32 batu; 49 u32 batu;
43 u32 batl; 50 u32 batl;
44}; 51};
52
53typedef pte_t *pgtable_t;
45#endif /* !__ASSEMBLY__ */ 54#endif /* !__ASSEMBLY__ */
46 55
47/* 56/*
@@ -83,6 +92,12 @@ typedef struct {
83 unsigned long vdso_base; 92 unsigned long vdso_base;
84} mm_context_t; 93} mm_context_t;
85 94
95/* patch sites */
96extern s32 patch__hash_page_A0, patch__hash_page_A1, patch__hash_page_A2;
97extern s32 patch__hash_page_B, patch__hash_page_C;
98extern s32 patch__flush_hash_A0, patch__flush_hash_A1, patch__flush_hash_A2;
99extern s32 patch__flush_hash_B;
100
86#endif /* !__ASSEMBLY__ */ 101#endif /* !__ASSEMBLY__ */
87 102
88/* We happily ignore the smaller BATs on 601, we don't actually use 103/* We happily ignore the smaller BATs on 601, we don't actually use
diff --git a/arch/powerpc/include/asm/book3s/32/pgalloc.h b/arch/powerpc/include/asm/book3s/32/pgalloc.h
index 82e44b1a00ae..b5b955eb2fb7 100644
--- a/arch/powerpc/include/asm/book3s/32/pgalloc.h
+++ b/arch/powerpc/include/asm/book3s/32/pgalloc.h
@@ -25,10 +25,7 @@
25extern void __bad_pte(pmd_t *pmd); 25extern void __bad_pte(pmd_t *pmd);
26 26
27extern struct kmem_cache *pgtable_cache[]; 27extern struct kmem_cache *pgtable_cache[];
28#define PGT_CACHE(shift) ({ \ 28#define PGT_CACHE(shift) pgtable_cache[shift]
29 BUG_ON(!(shift)); \
30 pgtable_cache[(shift) - 1]; \
31 })
32 29
33static inline pgd_t *pgd_alloc(struct mm_struct *mm) 30static inline pgd_t *pgd_alloc(struct mm_struct *mm)
34{ 31{
@@ -50,8 +47,6 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
50#define __pmd_free_tlb(tlb,x,a) do { } while (0) 47#define __pmd_free_tlb(tlb,x,a) do { } while (0)
51/* #define pgd_populate(mm, pmd, pte) BUG() */ 48/* #define pgd_populate(mm, pmd, pte) BUG() */
52 49
53#ifndef CONFIG_BOOKE
54
55static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, 50static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
56 pte_t *pte) 51 pte_t *pte)
57{ 52{
@@ -61,46 +56,31 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
61static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, 56static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
62 pgtable_t pte_page) 57 pgtable_t pte_page)
63{ 58{
64 *pmdp = __pmd((page_to_pfn(pte_page) << PAGE_SHIFT) | _PMD_PRESENT); 59 *pmdp = __pmd(__pa(pte_page) | _PMD_PRESENT);
65}
66
67#define pmd_pgtable(pmd) pmd_page(pmd)
68#else
69
70static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
71 pte_t *pte)
72{
73 *pmdp = __pmd((unsigned long)pte | _PMD_PRESENT);
74}
75
76static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
77 pgtable_t pte_page)
78{
79 *pmdp = __pmd((unsigned long)lowmem_page_address(pte_page) | _PMD_PRESENT);
80} 60}
81 61
82#define pmd_pgtable(pmd) pmd_page(pmd) 62#define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
83#endif
84 63
85extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); 64extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
86extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr); 65extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
66void pte_frag_destroy(void *pte_frag);
67pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel);
68void pte_fragment_free(unsigned long *table, int kernel);
87 69
88static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 70static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
89{ 71{
90 free_page((unsigned long)pte); 72 pte_fragment_free((unsigned long *)pte, 1);
91} 73}
92 74
93static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) 75static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
94{ 76{
95 pgtable_page_dtor(ptepage); 77 pte_fragment_free((unsigned long *)ptepage, 0);
96 __free_page(ptepage);
97} 78}
98 79
99static inline void pgtable_free(void *table, unsigned index_size) 80static inline void pgtable_free(void *table, unsigned index_size)
100{ 81{
101 if (!index_size) { 82 if (!index_size) {
102 pgtable_page_dtor(virt_to_page(table)); 83 pte_fragment_free((unsigned long *)table, 0);
103 free_page((unsigned long)table);
104 } else { 84 } else {
105 BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE); 85 BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE);
106 kmem_cache_free(PGT_CACHE(index_size), table); 86 kmem_cache_free(PGT_CACHE(index_size), table);
@@ -138,6 +118,6 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
138static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table, 118static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
139 unsigned long address) 119 unsigned long address)
140{ 120{
141 pgtable_free_tlb(tlb, page_address(table), 0); 121 pgtable_free_tlb(tlb, table, 0);
142} 122}
143#endif /* _ASM_POWERPC_BOOK3S_32_PGALLOC_H */ 123#endif /* _ASM_POWERPC_BOOK3S_32_PGALLOC_H */
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index c21d33704633..49d76adb9bc5 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -10,9 +10,9 @@
10/* And here we include common definitions */ 10/* And here we include common definitions */
11 11
12#define _PAGE_KERNEL_RO 0 12#define _PAGE_KERNEL_RO 0
13#define _PAGE_KERNEL_ROX 0 13#define _PAGE_KERNEL_ROX (_PAGE_EXEC)
14#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW) 14#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW)
15#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW) 15#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
16 16
17#define _PAGE_HPTEFLAGS _PAGE_HASHPTE 17#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
18 18
@@ -66,11 +66,11 @@ static inline bool pte_user(pte_t pte)
66 */ 66 */
67#define PAGE_NONE __pgprot(_PAGE_BASE) 67#define PAGE_NONE __pgprot(_PAGE_BASE)
68#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) 68#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
69#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) 69#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
70#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) 70#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
71#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER) 71#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
72#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) 72#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
73#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER) 73#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
74 74
75/* Permission masks used for kernel mappings */ 75/* Permission masks used for kernel mappings */
76#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW) 76#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
@@ -318,7 +318,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
318 int psize) 318 int psize)
319{ 319{
320 unsigned long set = pte_val(entry) & 320 unsigned long set = pte_val(entry) &
321 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW); 321 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
322 322
323 pte_update(ptep, 0, set); 323 pte_update(ptep, 0, set);
324 324
@@ -328,24 +328,10 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
328#define __HAVE_ARCH_PTE_SAME 328#define __HAVE_ARCH_PTE_SAME
329#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0) 329#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
330 330
331/*
332 * Note that on Book E processors, the pmd contains the kernel virtual
333 * (lowmem) address of the pte page. The physical address is less useful
334 * because everything runs with translation enabled (even the TLB miss
335 * handler). On everything else the pmd contains the physical address
336 * of the pte page. -- paulus
337 */
338#ifndef CONFIG_BOOKE
339#define pmd_page_vaddr(pmd) \ 331#define pmd_page_vaddr(pmd) \
340 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 332 ((unsigned long)__va(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))
341#define pmd_page(pmd) \ 333#define pmd_page(pmd) \
342 pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT) 334 pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
343#else
344#define pmd_page_vaddr(pmd) \
345 ((unsigned long) (pmd_val(pmd) & PAGE_MASK))
346#define pmd_page(pmd) \
347 pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT))
348#endif
349 335
350/* to find an entry in a kernel page-table-directory */ 336/* to find an entry in a kernel page-table-directory */
351#define pgd_offset_k(address) pgd_offset(&init_mm, address) 337#define pgd_offset_k(address) pgd_offset(&init_mm, address)
@@ -360,7 +346,8 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
360#define pte_offset_kernel(dir, addr) \ 346#define pte_offset_kernel(dir, addr) \
361 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr)) 347 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
362#define pte_offset_map(dir, addr) \ 348#define pte_offset_map(dir, addr) \
363 ((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr)) 349 ((pte_t *)(kmap_atomic(pmd_page(*(dir))) + \
350 (pmd_page_vaddr(*(dir)) & ~PAGE_MASK)) + pte_index(addr))
364#define pte_unmap(pte) kunmap_atomic(pte) 351#define pte_unmap(pte) kunmap_atomic(pte)
365 352
366/* 353/*
@@ -384,7 +371,7 @@ static inline int pte_dirty(pte_t pte) { return !!(pte_val(pte) & _PAGE_DIRTY);
384static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); } 371static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); }
385static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); } 372static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
386static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; } 373static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
387static inline bool pte_exec(pte_t pte) { return true; } 374static inline bool pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
388 375
389static inline int pte_present(pte_t pte) 376static inline int pte_present(pte_t pte)
390{ 377{
@@ -451,7 +438,7 @@ static inline pte_t pte_wrprotect(pte_t pte)
451 438
452static inline pte_t pte_exprotect(pte_t pte) 439static inline pte_t pte_exprotect(pte_t pte)
453{ 440{
454 return pte; 441 return __pte(pte_val(pte) & ~_PAGE_EXEC);
455} 442}
456 443
457static inline pte_t pte_mkclean(pte_t pte) 444static inline pte_t pte_mkclean(pte_t pte)
@@ -466,7 +453,7 @@ static inline pte_t pte_mkold(pte_t pte)
466 453
467static inline pte_t pte_mkexec(pte_t pte) 454static inline pte_t pte_mkexec(pte_t pte)
468{ 455{
469 return pte; 456 return __pte(pte_val(pte) | _PAGE_EXEC);
470} 457}
471 458
472static inline pte_t pte_mkpte(pte_t pte) 459static inline pte_t pte_mkpte(pte_t pte)
@@ -524,7 +511,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
524static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, 511static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
525 pte_t *ptep, pte_t pte, int percpu) 512 pte_t *ptep, pte_t pte, int percpu)
526{ 513{
527#if defined(CONFIG_PPC_STD_MMU_32) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT) 514#if defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
528 /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the 515 /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the
529 * helper pte_update() which does an atomic update. We need to do that 516 * helper pte_update() which does an atomic update. We need to do that
530 * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a 517 * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a
@@ -537,7 +524,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
537 else 524 else
538 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte)); 525 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte));
539 526
540#elif defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) 527#elif defined(CONFIG_PTE_64BIT)
541 /* Second case is 32-bit with 64-bit PTE. In this case, we 528 /* Second case is 32-bit with 64-bit PTE. In this case, we
542 * can just store as long as we do the two halves in the right order 529 * can just store as long as we do the two halves in the right order
543 * with a barrier in between. This is possible because we take care, 530 * with a barrier in between. This is possible because we take care,
@@ -560,7 +547,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
560 : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) 547 : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
561 : "r" (pte) : "memory"); 548 : "r" (pte) : "memory");
562 549
563#elif defined(CONFIG_PPC_STD_MMU_32) 550#else
564 /* Third case is 32-bit hash table in UP mode, we need to preserve 551 /* Third case is 32-bit hash table in UP mode, we need to preserve
565 * the _PAGE_HASHPTE bit since we may not have invalidated the previous 552 * the _PAGE_HASHPTE bit since we may not have invalidated the previous
566 * translation in the hash yet (done in a subsequent flush_tlb_xxx()) 553 * translation in the hash yet (done in a subsequent flush_tlb_xxx())
@@ -568,9 +555,6 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
568 */ 555 */
569 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE) 556 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
570 | (pte_val(pte) & ~_PAGE_HASHPTE)); 557 | (pte_val(pte) & ~_PAGE_HASHPTE));
571
572#else
573#error "Not supported "
574#endif 558#endif
575} 559}
576 560
diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index 15bc16b1dc9c..cf5ba5254299 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -1,11 +1,7 @@
1/* SPDX-License-Identifier: GPL-2.0 */ 1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H 2#ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
3#define _ASM_POWERPC_BOOK3S_64_HASH_4K_H 3#define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
4/* 4
5 * Entries per page directory level. The PTE level must use a 64b record
6 * for each page table entry. The PMD and PGD level use a 32b record for
7 * each entry by assuming that each entry is page aligned.
8 */
9#define H_PTE_INDEX_SIZE 9 5#define H_PTE_INDEX_SIZE 9
10#define H_PMD_INDEX_SIZE 7 6#define H_PMD_INDEX_SIZE 7
11#define H_PUD_INDEX_SIZE 9 7#define H_PUD_INDEX_SIZE 9
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
index 6328857f259f..1ceee000c18d 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -2,6 +2,8 @@
2#ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_ 2#ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_
3#define _ASM_POWERPC_BOOK3S_64_MMU_H_ 3#define _ASM_POWERPC_BOOK3S_64_MMU_H_
4 4
5#include <asm/page.h>
6
5#ifndef __ASSEMBLY__ 7#ifndef __ASSEMBLY__
6/* 8/*
7 * Page size definition 9 * Page size definition
@@ -24,6 +26,13 @@ struct mmu_psize_def {
24}; 26};
25extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; 27extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
26 28
29/*
30 * For BOOK3s 64 with 4k and 64K linux page size
31 * we want to use pointers, because the page table
32 * actually store pfn
33 */
34typedef pte_t *pgtable_t;
35
27#endif /* __ASSEMBLY__ */ 36#endif /* __ASSEMBLY__ */
28 37
29/* 64-bit classic hash table MMU */ 38/* 64-bit classic hash table MMU */
diff --git a/arch/powerpc/include/asm/book3s/64/pgalloc.h b/arch/powerpc/include/asm/book3s/64/pgalloc.h
index 391ed2c3b697..4aba625389c4 100644
--- a/arch/powerpc/include/asm/book3s/64/pgalloc.h
+++ b/arch/powerpc/include/asm/book3s/64/pgalloc.h
@@ -37,10 +37,7 @@ extern struct vmemmap_backing *vmemmap_list;
37#define MAX_PGTABLE_INDEX_SIZE 0xf 37#define MAX_PGTABLE_INDEX_SIZE 0xf
38 38
39extern struct kmem_cache *pgtable_cache[]; 39extern struct kmem_cache *pgtable_cache[];
40#define PGT_CACHE(shift) ({ \ 40#define PGT_CACHE(shift) pgtable_cache[shift]
41 BUG_ON(!(shift)); \
42 pgtable_cache[(shift) - 1]; \
43 })
44 41
45extern pte_t *pte_fragment_alloc(struct mm_struct *, unsigned long, int); 42extern pte_t *pte_fragment_alloc(struct mm_struct *, unsigned long, int);
46extern pmd_t *pmd_fragment_alloc(struct mm_struct *, unsigned long); 43extern pmd_t *pmd_fragment_alloc(struct mm_struct *, unsigned long);
@@ -50,6 +47,7 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift);
50#ifdef CONFIG_SMP 47#ifdef CONFIG_SMP
51extern void __tlb_remove_table(void *_table); 48extern void __tlb_remove_table(void *_table);
52#endif 49#endif
50void pte_frag_destroy(void *pte_frag);
53 51
54static inline pgd_t *radix__pgd_alloc(struct mm_struct *mm) 52static inline pgd_t *radix__pgd_alloc(struct mm_struct *mm)
55{ 53{
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index 6c99e846a8c9..2e6ada28da64 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -1304,7 +1304,7 @@ static inline int pgd_devmap(pgd_t pgd)
1304} 1304}
1305#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1305#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1306 1306
1307static inline const int pud_pfn(pud_t pud) 1307static inline int pud_pfn(pud_t pud)
1308{ 1308{
1309 /* 1309 /*
1310 * Currently all calls to pud_pfn() are gated around a pud_devmap() 1310 * Currently all calls to pud_pfn() are gated around a pud_devmap()
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 66298461b640..40ea5b3781c6 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -71,7 +71,7 @@ extern struct ppc64_caches ppc64_caches;
71#else 71#else
72#define __read_mostly __attribute__((__section__(".data..read_mostly"))) 72#define __read_mostly __attribute__((__section__(".data..read_mostly")))
73 73
74#ifdef CONFIG_6xx 74#ifdef CONFIG_PPC_BOOK3S_32
75extern long _get_L2CR(void); 75extern long _get_L2CR(void);
76extern long _get_L3CR(void); 76extern long _get_L3CR(void);
77extern void _set_L2CR(unsigned long); 77extern void _set_L2CR(unsigned long);
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 3d5acd2b113a..2074b40f3fb5 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -33,14 +33,33 @@ unsigned int create_cond_branch(const unsigned int *addr,
33int patch_branch(unsigned int *addr, unsigned long target, int flags); 33int patch_branch(unsigned int *addr, unsigned long target, int flags);
34int patch_instruction(unsigned int *addr, unsigned int instr); 34int patch_instruction(unsigned int *addr, unsigned int instr);
35int raw_patch_instruction(unsigned int *addr, unsigned int instr); 35int raw_patch_instruction(unsigned int *addr, unsigned int instr);
36int patch_instruction_site(s32 *addr, unsigned int instr);
37int patch_branch_site(s32 *site, unsigned long target, int flags);
38 36
39static inline unsigned long patch_site_addr(s32 *site) 37static inline unsigned long patch_site_addr(s32 *site)
40{ 38{
41 return (unsigned long)site + *site; 39 return (unsigned long)site + *site;
42} 40}
43 41
42static inline int patch_instruction_site(s32 *site, unsigned int instr)
43{
44 return patch_instruction((unsigned int *)patch_site_addr(site), instr);
45}
46
47static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
48{
49 return patch_branch((unsigned int *)patch_site_addr(site), target, flags);
50}
51
52static inline int modify_instruction(unsigned int *addr, unsigned int clr,
53 unsigned int set)
54{
55 return patch_instruction(addr, (*addr & ~clr) | set);
56}
57
58static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
59{
60 return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
61}
62
44int instr_is_relative_branch(unsigned int instr); 63int instr_is_relative_branch(unsigned int instr);
45int instr_is_relative_link_branch(unsigned int instr); 64int instr_is_relative_link_branch(unsigned int instr);
46int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr); 65int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 29f49a35d6ee..d05f0c28e515 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -44,6 +44,7 @@ extern int machine_check_e500(struct pt_regs *regs);
44extern int machine_check_e200(struct pt_regs *regs); 44extern int machine_check_e200(struct pt_regs *regs);
45extern int machine_check_47x(struct pt_regs *regs); 45extern int machine_check_47x(struct pt_regs *regs);
46int machine_check_8xx(struct pt_regs *regs); 46int machine_check_8xx(struct pt_regs *regs);
47int machine_check_83xx(struct pt_regs *regs);
47 48
48extern void cpu_down_flush_e500v2(void); 49extern void cpu_down_flush_e500v2(void);
49extern void cpu_down_flush_e500mc(void); 50extern void cpu_down_flush_e500mc(void);
@@ -296,7 +297,7 @@ static inline void cpu_feature_keys_init(void) { }
296#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | \ 297#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | \
297 CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_USE_RTC) 298 CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_USE_RTC)
298#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ 299#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
299 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) 300 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE | CPU_FTR_NOEXECUTE)
300#define CPU_FTRS_604 (CPU_FTR_COMMON | CPU_FTR_PPC_LE) 301#define CPU_FTRS_604 (CPU_FTR_COMMON | CPU_FTR_PPC_LE)
301#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \ 302#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \
302 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_L2CR | \ 303 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_L2CR | \
@@ -367,15 +368,15 @@ static inline void cpu_feature_keys_init(void) { }
367 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 368 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
368 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \ 369 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
369 CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 370 CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
370#define CPU_FTRS_82XX (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE) 371#define CPU_FTRS_82XX (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_NOEXECUTE)
371#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ 372#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
372 CPU_FTR_MAYBE_CAN_NAP) 373 CPU_FTR_MAYBE_CAN_NAP)
373#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \ 374#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \
374 CPU_FTR_MAYBE_CAN_NAP | \ 375 CPU_FTR_MAYBE_CAN_NAP | \
375 CPU_FTR_COMMON) 376 CPU_FTR_COMMON | CPU_FTR_NOEXECUTE)
376#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \ 377#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \
377 CPU_FTR_MAYBE_CAN_NAP | \ 378 CPU_FTR_MAYBE_CAN_NAP | \
378 CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) 379 CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE | CPU_FTR_NOEXECUTE)
379#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON) 380#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON)
380#define CPU_FTRS_8XX (CPU_FTR_NOEXECUTE) 381#define CPU_FTRS_8XX (CPU_FTR_NOEXECUTE)
381#define CPU_FTRS_40X (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 382#define CPU_FTRS_40X (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 8fa394520af6..dacd0f93f2b2 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -39,9 +39,6 @@ extern int dma_nommu_mmap_coherent(struct device *dev,
39 * to ensure it is consistent. 39 * to ensure it is consistent.
40 */ 40 */
41struct device; 41struct device;
42extern void *__dma_alloc_coherent(struct device *dev, size_t size,
43 dma_addr_t *handle, gfp_t gfp);
44extern void __dma_free_coherent(size_t size, void *vaddr);
45extern void __dma_sync(void *vaddr, size_t size, int direction); 42extern void __dma_sync(void *vaddr, size_t size, int direction);
46extern void __dma_sync_page(struct page *page, unsigned long offset, 43extern void __dma_sync_page(struct page *page, unsigned long offset,
47 size_t size, int direction); 44 size_t size, int direction);
@@ -52,8 +49,6 @@ extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
52 * Cache coherent cores. 49 * Cache coherent cores.
53 */ 50 */
54 51
55#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
56#define __dma_free_coherent(size, addr) ((void)0)
57#define __dma_sync(addr, size, rw) ((void)0) 52#define __dma_sync(addr, size, rw) ((void)0)
58#define __dma_sync_page(pg, off, sz, rw) ((void)0) 53#define __dma_sync_page(pg, off, sz, rw) ((void)0)
59 54
@@ -112,7 +107,5 @@ extern int dma_set_mask(struct device *dev, u64 dma_mask);
112 107
113extern u64 __dma_get_required_mask(struct device *dev); 108extern u64 __dma_get_required_mask(struct device *dev);
114 109
115#define ARCH_HAS_DMA_MMAP_COHERENT
116
117#endif /* __KERNEL__ */ 110#endif /* __KERNEL__ */
118#endif /* _ASM_DMA_MAPPING_H */ 111#endif /* _ASM_DMA_MAPPING_H */
diff --git a/arch/powerpc/include/asm/fadump.h b/arch/powerpc/include/asm/fadump.h
index 1e7a33592e29..188776befaf9 100644
--- a/arch/powerpc/include/asm/fadump.h
+++ b/arch/powerpc/include/asm/fadump.h
@@ -48,6 +48,10 @@
48 48
49#define memblock_num_regions(memblock_type) (memblock.memblock_type.cnt) 49#define memblock_num_regions(memblock_type) (memblock.memblock_type.cnt)
50 50
51/* Alignement per CMA requirement. */
52#define FADUMP_CMA_ALIGNMENT (PAGE_SIZE << \
53 max_t(unsigned long, MAX_ORDER - 1, pageblock_order))
54
51/* Firmware provided dump sections */ 55/* Firmware provided dump sections */
52#define FADUMP_CPU_STATE_DATA 0x0001 56#define FADUMP_CPU_STATE_DATA 0x0001
53#define FADUMP_HPTE_REGION 0x0002 57#define FADUMP_HPTE_REGION 0x0002
@@ -141,6 +145,7 @@ struct fw_dump {
141 unsigned long fadump_supported:1; 145 unsigned long fadump_supported:1;
142 unsigned long dump_active:1; 146 unsigned long dump_active:1;
143 unsigned long dump_registered:1; 147 unsigned long dump_registered:1;
148 unsigned long nocma:1;
144}; 149};
145 150
146/* 151/*
@@ -200,7 +205,7 @@ struct fad_crash_memory_ranges {
200 unsigned long long size; 205 unsigned long long size;
201}; 206};
202 207
203extern int is_fadump_boot_memory_area(u64 addr, ulong size); 208extern int is_fadump_memory_area(u64 addr, ulong size);
204extern int early_init_dt_scan_fw_dump(unsigned long node, 209extern int early_init_dt_scan_fw_dump(unsigned long node,
205 const char *uname, int depth, void *data); 210 const char *uname, int depth, void *data);
206extern int fadump_reserve_mem(void); 211extern int fadump_reserve_mem(void);
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index 33b6f9c892c8..40a6c9261a6b 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -221,6 +221,17 @@ label##3: \
221 FTR_ENTRY_OFFSET 953b-954b; \ 221 FTR_ENTRY_OFFSET 953b-954b; \
222 .popsection; 222 .popsection;
223 223
224#define START_BTB_FLUSH_SECTION \
225955: \
226
227#define END_BTB_FLUSH_SECTION \
228956: \
229 .pushsection __btb_flush_fixup,"a"; \
230 .align 2; \
231957: \
232 FTR_ENTRY_OFFSET 955b-957b; \
233 FTR_ENTRY_OFFSET 956b-957b; \
234 .popsection;
224 235
225#ifndef __ASSEMBLY__ 236#ifndef __ASSEMBLY__
226#include <linux/types.h> 237#include <linux/types.h>
@@ -230,6 +241,7 @@ extern long __start___stf_entry_barrier_fixup, __stop___stf_entry_barrier_fixup;
230extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup; 241extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup;
231extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup; 242extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;
232extern long __start___barrier_nospec_fixup, __stop___barrier_nospec_fixup; 243extern long __start___barrier_nospec_fixup, __stop___barrier_nospec_fixup;
244extern long __start__btb_flush_fixup, __stop__btb_flush_fixup;
233 245
234void apply_feature_fixups(void); 246void apply_feature_fixups(void);
235void setup_feature_keys(void); 247void setup_feature_keys(void);
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 383da1ab9e23..8d40565ad0c3 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -5,8 +5,6 @@
5#ifdef CONFIG_HUGETLB_PAGE 5#ifdef CONFIG_HUGETLB_PAGE
6#include <asm/page.h> 6#include <asm/page.h>
7 7
8extern struct kmem_cache *hugepte_cache;
9
10#ifdef CONFIG_PPC_BOOK3S_64 8#ifdef CONFIG_PPC_BOOK3S_64
11 9
12#include <asm/book3s/64/hugetlb.h> 10#include <asm/book3s/64/hugetlb.h>
@@ -76,7 +74,9 @@ static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
76 unsigned long idx = 0; 74 unsigned long idx = 0;
77 75
78 pte_t *dir = hugepd_page(hpd); 76 pte_t *dir = hugepd_page(hpd);
79#ifndef CONFIG_PPC_FSL_BOOK3E 77#ifdef CONFIG_PPC_8xx
78 idx = (addr & ((1UL << pdshift) - 1)) >> PAGE_SHIFT;
79#elif !defined(CONFIG_PPC_FSL_BOOK3E)
80 idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd); 80 idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
81#endif 81#endif
82 82
@@ -129,15 +129,14 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
129static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, 129static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
130 unsigned long addr, pte_t *ptep) 130 unsigned long addr, pte_t *ptep)
131{ 131{
132 pte_t pte; 132 huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
133 pte = huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
134 flush_hugetlb_page(vma, addr); 133 flush_hugetlb_page(vma, addr);
135} 134}
136 135
137#define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS 136#define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS
138extern int huge_ptep_set_access_flags(struct vm_area_struct *vma, 137int huge_ptep_set_access_flags(struct vm_area_struct *vma,
139 unsigned long addr, pte_t *ptep, 138 unsigned long addr, pte_t *ptep,
140 pte_t pte, int dirty); 139 pte_t pte, int dirty);
141 140
142static inline void arch_clear_hugepage_flags(struct page *page) 141static inline void arch_clear_hugepage_flags(struct page *page)
143{ 142{
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index e746becd9d6f..7f19fbd3ba55 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -29,12 +29,14 @@ extern struct pci_dev *isa_bridge_pcidev;
29 29
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/compiler.h> 31#include <linux/compiler.h>
32#include <linux/mm.h>
32#include <asm/page.h> 33#include <asm/page.h>
33#include <asm/byteorder.h> 34#include <asm/byteorder.h>
34#include <asm/synch.h> 35#include <asm/synch.h>
35#include <asm/delay.h> 36#include <asm/delay.h>
36#include <asm/mmu.h> 37#include <asm/mmu.h>
37#include <asm/ppc_asm.h> 38#include <asm/ppc_asm.h>
39#include <asm/pgtable.h>
38 40
39#ifdef CONFIG_PPC64 41#ifdef CONFIG_PPC64
40#include <asm/paca.h> 42#include <asm/paca.h>
@@ -804,6 +806,8 @@ extern void __iounmap_at(void *ea, unsigned long size);
804 */ 806 */
805static inline unsigned long virt_to_phys(volatile void * address) 807static inline unsigned long virt_to_phys(volatile void * address)
806{ 808{
809 WARN_ON(IS_ENABLED(CONFIG_DEBUG_VIRTUAL) && !virt_addr_valid(address));
810
807 return __pa((unsigned long)address); 811 return __pa((unsigned long)address);
808} 812}
809 813
@@ -827,7 +831,14 @@ static inline void * phys_to_virt(unsigned long address)
827/* 831/*
828 * Change "struct page" to physical address. 832 * Change "struct page" to physical address.
829 */ 833 */
830#define page_to_phys(page) ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT) 834static inline phys_addr_t page_to_phys(struct page *page)
835{
836 unsigned long pfn = page_to_pfn(page);
837
838 WARN_ON(IS_ENABLED(CONFIG_DEBUG_VIRTUAL) && !pfn_valid(pfn));
839
840 return PFN_PHYS(pfn);
841}
831 842
832/* 843/*
833 * 32 bits still uses virt_to_bus() for it's implementation of DMA 844 * 32 bits still uses virt_to_bus() for it's implementation of DMA
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 35db0cbc9222..e847ff69cb2b 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -215,11 +215,12 @@ struct iommu_table_group {
215 215
216extern void iommu_register_group(struct iommu_table_group *table_group, 216extern void iommu_register_group(struct iommu_table_group *table_group,
217 int pci_domain_number, unsigned long pe_num); 217 int pci_domain_number, unsigned long pe_num);
218extern int iommu_add_device(struct device *dev); 218extern int iommu_add_device(struct iommu_table_group *table_group,
219 struct device *dev);
219extern void iommu_del_device(struct device *dev); 220extern void iommu_del_device(struct device *dev);
220extern int __init tce_iommu_bus_notifier_init(void); 221extern long iommu_tce_xchg(struct mm_struct *mm, struct iommu_table *tbl,
221extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry, 222 unsigned long entry, unsigned long *hpa,
222 unsigned long *hpa, enum dma_data_direction *direction); 223 enum dma_data_direction *direction);
223#else 224#else
224static inline void iommu_register_group(struct iommu_table_group *table_group, 225static inline void iommu_register_group(struct iommu_table_group *table_group,
225 int pci_domain_number, 226 int pci_domain_number,
@@ -227,7 +228,8 @@ static inline void iommu_register_group(struct iommu_table_group *table_group,
227{ 228{
228} 229}
229 230
230static inline int iommu_add_device(struct device *dev) 231static inline int iommu_add_device(struct iommu_table_group *table_group,
232 struct device *dev)
231{ 233{
232 return 0; 234 return 0;
233} 235}
@@ -235,11 +237,6 @@ static inline int iommu_add_device(struct device *dev)
235static inline void iommu_del_device(struct device *dev) 237static inline void iommu_del_device(struct device *dev)
236{ 238{
237} 239}
238
239static inline int __init tce_iommu_bus_notifier_init(void)
240{
241 return 0;
242}
243#endif /* !CONFIG_IOMMU_API */ 240#endif /* !CONFIG_IOMMU_API */
244 241
245int dma_iommu_mapping_error(struct device *dev, dma_addr_t dma_addr); 242int dma_iommu_mapping_error(struct device *dev, dma_addr_t dma_addr);
diff --git a/arch/powerpc/include/asm/ipic.h b/arch/powerpc/include/asm/ipic.h
index fb59829983b8..3dbd47f2bffe 100644
--- a/arch/powerpc/include/asm/ipic.h
+++ b/arch/powerpc/include/asm/ipic.h
@@ -69,7 +69,6 @@ enum ipic_mcp_irq {
69 IPIC_MCP_MU = 7, 69 IPIC_MCP_MU = 7,
70}; 70};
71 71
72extern int ipic_set_priority(unsigned int irq, unsigned int priority);
73extern void ipic_set_highest_priority(unsigned int irq); 72extern void ipic_set_highest_priority(unsigned int irq);
74extern void ipic_set_default_priority(void); 73extern void ipic_set_default_priority(void);
75extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq); 74extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq);
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index eb20eb3b8fb0..25607604a7a5 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -48,7 +48,7 @@
48#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000) 48#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
49 49
50/* Enable >32-bit physical addresses on 32-bit processor, only used 50/* Enable >32-bit physical addresses on 32-bit processor, only used
51 * by CONFIG_6xx currently as BookE supports that from day 1 51 * by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
52 */ 52 */
53#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000) 53#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
54 54
@@ -131,16 +131,37 @@ DECLARE_PER_CPU(int, next_tlbcam_idx);
131#endif 131#endif
132 132
133enum { 133enum {
134 MMU_FTRS_POSSIBLE = MMU_FTR_HPTE_TABLE | MMU_FTR_TYPE_8xx | 134 MMU_FTRS_POSSIBLE =
135 MMU_FTR_TYPE_40x | MMU_FTR_TYPE_44x | MMU_FTR_TYPE_FSL_E | 135#ifdef CONFIG_PPC_BOOK3S
136 MMU_FTR_TYPE_47x | MMU_FTR_USE_HIGH_BATS | MMU_FTR_BIG_PHYS | 136 MMU_FTR_HPTE_TABLE |
137 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_USE_TLBILX | 137#endif
138 MMU_FTR_LOCK_BCAST_INVAL | MMU_FTR_NEED_DTLB_SW_LRU | 138#ifdef CONFIG_PPC_8xx
139 MMU_FTR_TYPE_8xx |
140#endif
141#ifdef CONFIG_40x
142 MMU_FTR_TYPE_40x |
143#endif
144#ifdef CONFIG_44x
145 MMU_FTR_TYPE_44x |
146#endif
147#if defined(CONFIG_E200) || defined(CONFIG_E500)
148 MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
149#endif
150#ifdef CONFIG_PPC_47x
151 MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL |
152#endif
153#ifdef CONFIG_PPC_BOOK3S_32
154 MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU |
155#endif
156#ifdef CONFIG_PPC_BOOK3E_64
139 MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS | 157 MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
158#endif
159#ifdef CONFIG_PPC_BOOK3S_64
140 MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL | 160 MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
141 MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE | 161 MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
142 MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA | 162 MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |
143 MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA | 163 MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
164#endif
144#ifdef CONFIG_PPC_RADIX_MMU 165#ifdef CONFIG_PPC_RADIX_MMU
145 MMU_FTR_TYPE_RADIX | 166 MMU_FTR_TYPE_RADIX |
146#endif 167#endif
@@ -338,21 +359,11 @@ static inline void mmu_early_init_devtree(void) { }
338#endif /* __ASSEMBLY__ */ 359#endif /* __ASSEMBLY__ */
339#endif 360#endif
340 361
341#if defined(CONFIG_PPC_STD_MMU_32) 362#if defined(CONFIG_PPC_BOOK3S_32)
342/* 32-bit classic hash table MMU */ 363/* 32-bit classic hash table MMU */
343#include <asm/book3s/32/mmu-hash.h> 364#include <asm/book3s/32/mmu-hash.h>
344#elif defined(CONFIG_40x) 365#elif defined(CONFIG_PPC_MMU_NOHASH)
345/* 40x-style software loaded TLB */ 366#include <asm/nohash/mmu.h>
346# include <asm/mmu-40x.h>
347#elif defined(CONFIG_44x)
348/* 44x-style software loaded TLB */
349# include <asm/mmu-44x.h>
350#elif defined(CONFIG_PPC_BOOK3E_MMU)
351/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
352# include <asm/mmu-book3e.h>
353#elif defined (CONFIG_PPC_8xx)
354/* Motorola/Freescale 8xx software loaded TLB */
355# include <asm/mmu-8xx.h>
356#endif 367#endif
357 368
358#endif /* __KERNEL__ */ 369#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index 0381394a425b..6ee8195a2ffb 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -21,9 +21,12 @@ struct mm_iommu_table_group_mem_t;
21 21
22extern int isolate_lru_page(struct page *page); /* from internal.h */ 22extern int isolate_lru_page(struct page *page); /* from internal.h */
23extern bool mm_iommu_preregistered(struct mm_struct *mm); 23extern bool mm_iommu_preregistered(struct mm_struct *mm);
24extern long mm_iommu_get(struct mm_struct *mm, 24extern long mm_iommu_new(struct mm_struct *mm,
25 unsigned long ua, unsigned long entries, 25 unsigned long ua, unsigned long entries,
26 struct mm_iommu_table_group_mem_t **pmem); 26 struct mm_iommu_table_group_mem_t **pmem);
27extern long mm_iommu_newdev(struct mm_struct *mm, unsigned long ua,
28 unsigned long entries, unsigned long dev_hpa,
29 struct mm_iommu_table_group_mem_t **pmem);
27extern long mm_iommu_put(struct mm_struct *mm, 30extern long mm_iommu_put(struct mm_struct *mm,
28 struct mm_iommu_table_group_mem_t *mem); 31 struct mm_iommu_table_group_mem_t *mem);
29extern void mm_iommu_init(struct mm_struct *mm); 32extern void mm_iommu_init(struct mm_struct *mm);
@@ -32,15 +35,23 @@ extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm,
32 unsigned long ua, unsigned long size); 35 unsigned long ua, unsigned long size);
33extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm( 36extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(
34 struct mm_struct *mm, unsigned long ua, unsigned long size); 37 struct mm_struct *mm, unsigned long ua, unsigned long size);
35extern struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm, 38extern struct mm_iommu_table_group_mem_t *mm_iommu_get(struct mm_struct *mm,
36 unsigned long ua, unsigned long entries); 39 unsigned long ua, unsigned long entries);
37extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, 40extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
38 unsigned long ua, unsigned int pageshift, unsigned long *hpa); 41 unsigned long ua, unsigned int pageshift, unsigned long *hpa);
39extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem, 42extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
40 unsigned long ua, unsigned int pageshift, unsigned long *hpa); 43 unsigned long ua, unsigned int pageshift, unsigned long *hpa);
41extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua); 44extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua);
45extern bool mm_iommu_is_devmem(struct mm_struct *mm, unsigned long hpa,
46 unsigned int pageshift, unsigned long *size);
42extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem); 47extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);
43extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem); 48extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);
49#else
50static inline bool mm_iommu_is_devmem(struct mm_struct *mm, unsigned long hpa,
51 unsigned int pageshift, unsigned long *size)
52{
53 return false;
54}
44#endif 55#endif
45extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm); 56extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
46extern void set_context(unsigned long id, pgd_t *pgd); 57extern void set_context(unsigned long id, pgd_t *pgd);
@@ -217,13 +228,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm,
217#endif 228#endif
218} 229}
219 230
220static inline int arch_dup_mmap(struct mm_struct *oldmm, 231#ifdef CONFIG_PPC_BOOK3E_64
221 struct mm_struct *mm)
222{
223 return 0;
224}
225
226#ifndef CONFIG_PPC_BOOK3S_64
227static inline void arch_exit_mmap(struct mm_struct *mm) 232static inline void arch_exit_mmap(struct mm_struct *mm)
228{ 233{
229} 234}
@@ -247,6 +252,7 @@ static inline void arch_bprm_mm_init(struct mm_struct *mm,
247#ifdef CONFIG_PPC_MEM_KEYS 252#ifdef CONFIG_PPC_MEM_KEYS
248bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write, 253bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
249 bool execute, bool foreign); 254 bool execute, bool foreign);
255void arch_dup_pkeys(struct mm_struct *oldmm, struct mm_struct *mm);
250#else /* CONFIG_PPC_MEM_KEYS */ 256#else /* CONFIG_PPC_MEM_KEYS */
251static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, 257static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
252 bool write, bool execute, bool foreign) 258 bool write, bool execute, bool foreign)
@@ -259,6 +265,7 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
259#define thread_pkey_regs_save(thread) 265#define thread_pkey_regs_save(thread)
260#define thread_pkey_regs_restore(new_thread, old_thread) 266#define thread_pkey_regs_restore(new_thread, old_thread)
261#define thread_pkey_regs_init(thread) 267#define thread_pkey_regs_init(thread)
268#define arch_dup_pkeys(oldmm, mm)
262 269
263static inline u64 pte_to_hpte_pkey_bits(u64 pteflags) 270static inline u64 pte_to_hpte_pkey_bits(u64 pteflags)
264{ 271{
@@ -267,5 +274,12 @@ static inline u64 pte_to_hpte_pkey_bits(u64 pteflags)
267 274
268#endif /* CONFIG_PPC_MEM_KEYS */ 275#endif /* CONFIG_PPC_MEM_KEYS */
269 276
277static inline int arch_dup_mmap(struct mm_struct *oldmm,
278 struct mm_struct *mm)
279{
280 arch_dup_pkeys(oldmm, mm);
281 return 0;
282}
283
270#endif /* __KERNEL__ */ 284#endif /* __KERNEL__ */
271#endif /* __ASM_POWERPC_MMU_CONTEXT_H */ 285#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/arch/powerpc/include/asm/mmu-40x.h b/arch/powerpc/include/asm/nohash/32/mmu-40x.h
index 74f4edb5916e..74f4edb5916e 100644
--- a/arch/powerpc/include/asm/mmu-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu-40x.h
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/nohash/32/mmu-44x.h
index 295b3dbb2698..28aa3b339c5e 100644
--- a/arch/powerpc/include/asm/mmu-44x.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu-44x.h
@@ -111,6 +111,9 @@ typedef struct {
111 unsigned long vdso_base; 111 unsigned long vdso_base;
112} mm_context_t; 112} mm_context_t;
113 113
114/* patch sites */
115extern s32 patch__tlb_44x_hwater_D, patch__tlb_44x_hwater_I;
116
114#endif /* !__ASSEMBLY__ */ 117#endif /* !__ASSEMBLY__ */
115 118
116#ifndef CONFIG_PPC_EARLY_DEBUG_44x 119#ifndef CONFIG_PPC_EARLY_DEBUG_44x
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h
index fa05aa566ece..b0f764c827c0 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h
@@ -190,6 +190,7 @@ typedef struct {
190 struct slice_mask mask_8m; 190 struct slice_mask mask_8m;
191# endif 191# endif
192#endif 192#endif
193 void *pte_frag;
193} mm_context_t; 194} mm_context_t;
194 195
195#define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000) 196#define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000)
@@ -244,6 +245,9 @@ extern s32 patch__itlbmiss_perf, patch__dtlbmiss_perf;
244#define mmu_virtual_psize MMU_PAGE_4K 245#define mmu_virtual_psize MMU_PAGE_4K
245#elif defined(CONFIG_PPC_16K_PAGES) 246#elif defined(CONFIG_PPC_16K_PAGES)
246#define mmu_virtual_psize MMU_PAGE_16K 247#define mmu_virtual_psize MMU_PAGE_16K
248#define PTE_FRAG_NR 4
249#define PTE_FRAG_SIZE_SHIFT 12
250#define PTE_FRAG_SIZE (1UL << 12)
247#else 251#else
248#error "Unsupported PAGE_SIZE" 252#error "Unsupported PAGE_SIZE"
249#endif 253#endif
diff --git a/arch/powerpc/include/asm/nohash/32/mmu.h b/arch/powerpc/include/asm/nohash/32/mmu.h
new file mode 100644
index 000000000000..7d94a36d57d2
--- /dev/null
+++ b/arch/powerpc/include/asm/nohash/32/mmu.h
@@ -0,0 +1,25 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_NOHASH_32_MMU_H_
3#define _ASM_POWERPC_NOHASH_32_MMU_H_
4
5#include <asm/page.h>
6
7#if defined(CONFIG_40x)
8/* 40x-style software loaded TLB */
9#include <asm/nohash/32/mmu-40x.h>
10#elif defined(CONFIG_44x)
11/* 44x-style software loaded TLB */
12#include <asm/nohash/32/mmu-44x.h>
13#elif defined(CONFIG_PPC_BOOK3E_MMU)
14/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
15#include <asm/nohash/mmu-book3e.h>
16#elif defined (CONFIG_PPC_8xx)
17/* Motorola/Freescale 8xx software loaded TLB */
18#include <asm/nohash/32/mmu-8xx.h>
19#endif
20
21#ifndef __ASSEMBLY__
22typedef pte_t *pgtable_t;
23#endif
24
25#endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/32/pgalloc.h b/arch/powerpc/include/asm/nohash/32/pgalloc.h
index 8825953c225b..17963951bdb0 100644
--- a/arch/powerpc/include/asm/nohash/32/pgalloc.h
+++ b/arch/powerpc/include/asm/nohash/32/pgalloc.h
@@ -25,10 +25,7 @@
25extern void __bad_pte(pmd_t *pmd); 25extern void __bad_pte(pmd_t *pmd);
26 26
27extern struct kmem_cache *pgtable_cache[]; 27extern struct kmem_cache *pgtable_cache[];
28#define PGT_CACHE(shift) ({ \ 28#define PGT_CACHE(shift) pgtable_cache[shift]
29 BUG_ON(!(shift)); \
30 pgtable_cache[(shift) - 1]; \
31 })
32 29
33static inline pgd_t *pgd_alloc(struct mm_struct *mm) 30static inline pgd_t *pgd_alloc(struct mm_struct *mm)
34{ 31{
@@ -61,11 +58,10 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
61static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, 58static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
62 pgtable_t pte_page) 59 pgtable_t pte_page)
63{ 60{
64 *pmdp = __pmd((page_to_pfn(pte_page) << PAGE_SHIFT) | _PMD_USER | 61 *pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT);
65 _PMD_PRESENT);
66} 62}
67 63
68#define pmd_pgtable(pmd) pmd_page(pmd) 64#define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
69#else 65#else
70 66
71static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, 67static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
@@ -77,31 +73,32 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
77static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, 73static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
78 pgtable_t pte_page) 74 pgtable_t pte_page)
79{ 75{
80 *pmdp = __pmd((unsigned long)lowmem_page_address(pte_page) | _PMD_PRESENT); 76 *pmdp = __pmd((unsigned long)pte_page | _PMD_PRESENT);
81} 77}
82 78
83#define pmd_pgtable(pmd) pmd_page(pmd) 79#define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
84#endif 80#endif
85 81
86extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); 82extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
87extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr); 83extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
84void pte_frag_destroy(void *pte_frag);
85pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel);
86void pte_fragment_free(unsigned long *table, int kernel);
88 87
89static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 88static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
90{ 89{
91 free_page((unsigned long)pte); 90 pte_fragment_free((unsigned long *)pte, 1);
92} 91}
93 92
94static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) 93static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
95{ 94{
96 pgtable_page_dtor(ptepage); 95 pte_fragment_free((unsigned long *)ptepage, 0);
97 __free_page(ptepage);
98} 96}
99 97
100static inline void pgtable_free(void *table, unsigned index_size) 98static inline void pgtable_free(void *table, unsigned index_size)
101{ 99{
102 if (!index_size) { 100 if (!index_size) {
103 pgtable_page_dtor(virt_to_page(table)); 101 pte_fragment_free((unsigned long *)table, 0);
104 free_page((unsigned long)table);
105 } else { 102 } else {
106 BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE); 103 BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE);
107 kmem_cache_free(PGT_CACHE(index_size), table); 104 kmem_cache_free(PGT_CACHE(index_size), table);
@@ -140,6 +137,6 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
140 unsigned long address) 137 unsigned long address)
141{ 138{
142 tlb_flush_pgtable(tlb, address); 139 tlb_flush_pgtable(tlb, address);
143 pgtable_free_tlb(tlb, page_address(table), 0); 140 pgtable_free_tlb(tlb, table, 0);
144} 141}
145#endif /* _ASM_POWERPC_PGALLOC_32_H */ 142#endif /* _ASM_POWERPC_PGALLOC_32_H */
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index 3ffb0ff5a038..bed433358260 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -232,7 +232,13 @@ static inline unsigned long pte_update(pte_t *p,
232 : "cc" ); 232 : "cc" );
233#else /* PTE_ATOMIC_UPDATES */ 233#else /* PTE_ATOMIC_UPDATES */
234 unsigned long old = pte_val(*p); 234 unsigned long old = pte_val(*p);
235 *p = __pte((old & ~clr) | set); 235 unsigned long new = (old & ~clr) | set;
236
237#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)
238 p->pte = p->pte1 = p->pte2 = p->pte3 = new;
239#else
240 *p = __pte(new);
241#endif
236#endif /* !PTE_ATOMIC_UPDATES */ 242#endif /* !PTE_ATOMIC_UPDATES */
237 243
238#ifdef CONFIG_44x 244#ifdef CONFIG_44x
@@ -333,12 +339,12 @@ static inline int pte_young(pte_t pte)
333 */ 339 */
334#ifndef CONFIG_BOOKE 340#ifndef CONFIG_BOOKE
335#define pmd_page_vaddr(pmd) \ 341#define pmd_page_vaddr(pmd) \
336 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 342 ((unsigned long)__va(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))
337#define pmd_page(pmd) \ 343#define pmd_page(pmd) \
338 pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT) 344 pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
339#else 345#else
340#define pmd_page_vaddr(pmd) \ 346#define pmd_page_vaddr(pmd) \
341 ((unsigned long) (pmd_val(pmd) & PAGE_MASK)) 347 ((unsigned long)(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))
342#define pmd_page(pmd) \ 348#define pmd_page(pmd) \
343 pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT)) 349 pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT))
344#endif 350#endif
@@ -357,7 +363,8 @@ static inline int pte_young(pte_t pte)
357 (pmd_bad(*(dir)) ? NULL : (pte_t *)pmd_page_vaddr(*(dir)) + \ 363 (pmd_bad(*(dir)) ? NULL : (pte_t *)pmd_page_vaddr(*(dir)) + \
358 pte_index(addr)) 364 pte_index(addr))
359#define pte_offset_map(dir, addr) \ 365#define pte_offset_map(dir, addr) \
360 ((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr)) 366 ((pte_t *)(kmap_atomic(pmd_page(*(dir))) + \
367 (pmd_page_vaddr(*(dir)) & ~PAGE_MASK)) + pte_index(addr))
361#define pte_unmap(pte) kunmap_atomic(pte) 368#define pte_unmap(pte) kunmap_atomic(pte)
362 369
363/* 370/*
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
index 661f4599f2fc..12c6811e344b 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
@@ -33,7 +33,7 @@
33 * is cleared in the TLB miss handler before the TLB entry is loaded. 33 * is cleared in the TLB miss handler before the TLB entry is loaded.
34 * - All other bits of the PTE are loaded into TLBLO without 34 * - All other bits of the PTE are loaded into TLBLO without
35 * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for 35 * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
36 * software PTE bits. We actually use use bits 21, 24, 25, and 36 * software PTE bits. We actually use bits 21, 24, 25, and
37 * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and 37 * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
38 * PRESENT. 38 * PRESENT.
39 */ 39 */
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index 6bfe041ef59d..c9e4b2d90f65 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -65,9 +65,6 @@
65 65
66#define _PTE_NONE_MASK 0 66#define _PTE_NONE_MASK 0
67 67
68/* Until my rework is finished, 8xx still needs atomic PTE updates */
69#define PTE_ATOMIC_UPDATES 1
70
71#ifdef CONFIG_PPC_16K_PAGES 68#ifdef CONFIG_PPC_16K_PAGES
72#define _PAGE_PSIZE _PAGE_SPS 69#define _PAGE_PSIZE _PAGE_SPS
73#else 70#else
diff --git a/arch/powerpc/include/asm/nohash/64/mmu.h b/arch/powerpc/include/asm/nohash/64/mmu.h
new file mode 100644
index 000000000000..e6585480dfc4
--- /dev/null
+++ b/arch/powerpc/include/asm/nohash/64/mmu.h
@@ -0,0 +1,12 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_NOHASH_64_MMU_H_
3#define _ASM_POWERPC_NOHASH_64_MMU_H_
4
5/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
6#include <asm/nohash/mmu-book3e.h>
7
8#ifndef __ASSEMBLY__
9typedef struct page *pgtable_t;
10#endif
11
12#endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/64/pgalloc.h b/arch/powerpc/include/asm/nohash/64/pgalloc.h
index e2d62d033708..e95eb499a174 100644
--- a/arch/powerpc/include/asm/nohash/64/pgalloc.h
+++ b/arch/powerpc/include/asm/nohash/64/pgalloc.h
@@ -36,10 +36,7 @@ extern struct vmemmap_backing *vmemmap_list;
36#define MAX_PGTABLE_INDEX_SIZE 0xf 36#define MAX_PGTABLE_INDEX_SIZE 0xf
37 37
38extern struct kmem_cache *pgtable_cache[]; 38extern struct kmem_cache *pgtable_cache[];
39#define PGT_CACHE(shift) ({ \ 39#define PGT_CACHE(shift) pgtable_cache[shift]
40 BUG_ON(!(shift)); \
41 pgtable_cache[(shift) - 1]; \
42 })
43 40
44static inline pgd_t *pgd_alloc(struct mm_struct *mm) 41static inline pgd_t *pgd_alloc(struct mm_struct *mm)
45{ 42{
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/nohash/mmu-book3e.h
index e20072972e35..e20072972e35 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/nohash/mmu-book3e.h
diff --git a/arch/powerpc/include/asm/nohash/mmu.h b/arch/powerpc/include/asm/nohash/mmu.h
new file mode 100644
index 000000000000..a037cb1efb57
--- /dev/null
+++ b/arch/powerpc/include/asm/nohash/mmu.h
@@ -0,0 +1,11 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_NOHASH_MMU_H_
3#define _ASM_POWERPC_NOHASH_MMU_H_
4
5#ifdef CONFIG_PPC64
6#include <asm/nohash/64/mmu.h>
7#else
8#include <asm/nohash/32/mmu.h>
9#endif
10
11#endif /* _ASM_POWERPC_NOHASH_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index 70ff23974b59..1ca1c1864b32 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -209,7 +209,11 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
209 /* Anything else just stores the PTE normally. That covers all 64-bit 209 /* Anything else just stores the PTE normally. That covers all 64-bit
210 * cases, and 32-bit non-hash with 32-bit PTEs. 210 * cases, and 32-bit non-hash with 32-bit PTEs.
211 */ 211 */
212#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)
213 ptep->pte = ptep->pte1 = ptep->pte2 = ptep->pte3 = pte_val(pte);
214#else
212 *ptep = pte; 215 *ptep = pte;
216#endif
213 217
214 /* 218 /*
215 * With hardware tablewalk, a sync is needed to ensure that 219 * With hardware tablewalk, a sync is needed to ensure that
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index ff3866473afe..a55b01c90bb1 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -347,6 +347,7 @@ extern int opal_async_comp_init(void);
347extern int opal_sensor_init(void); 347extern int opal_sensor_init(void);
348extern int opal_hmi_handler_init(void); 348extern int opal_hmi_handler_init(void);
349extern int opal_event_init(void); 349extern int opal_event_init(void);
350int opal_power_control_init(void);
350 351
351extern int opal_machine_check(struct pt_regs *regs); 352extern int opal_machine_check(struct pt_regs *regs);
352extern bool opal_mce_check_early_recovery(struct pt_regs *regs); 353extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index f6a1265face2..5c5ea2413413 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -289,7 +289,7 @@ static inline bool pfn_valid(unsigned long pfn)
289 * page tables at arbitrary addresses, this breaks and will have to change. 289 * page tables at arbitrary addresses, this breaks and will have to change.
290 */ 290 */
291#ifdef CONFIG_PPC64 291#ifdef CONFIG_PPC64
292#define PD_HUGE 0x8000000000000000 292#define PD_HUGE 0x8000000000000000UL
293#else 293#else
294#define PD_HUGE 0x80000000 294#define PD_HUGE 0x80000000
295#endif 295#endif
@@ -335,23 +335,11 @@ void arch_free_page(struct page *page, int order);
335#endif 335#endif
336 336
337struct vm_area_struct; 337struct vm_area_struct;
338#ifdef CONFIG_PPC_BOOK3S_64
339/*
340 * For BOOK3s 64 with 4k and 64K linux page size
341 * we want to use pointers, because the page table
342 * actually store pfn
343 */
344typedef pte_t *pgtable_t;
345#else
346#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC64)
347typedef pte_t *pgtable_t;
348#else
349typedef struct page *pgtable_t;
350#endif
351#endif
352 338
353#include <asm-generic/memory_model.h> 339#include <asm-generic/memory_model.h>
354#endif /* __ASSEMBLY__ */ 340#endif /* __ASSEMBLY__ */
355#include <asm/slice.h> 341#include <asm/slice.h>
356 342
343#define ARCH_ZONE_DMA_BITS 31
344
357#endif /* _ASM_POWERPC_PAGE_H */ 345#endif /* _ASM_POWERPC_PAGE_H */
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index 5c378e9b78c8..683dfbc67ca8 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -22,7 +22,8 @@
22#define PTE_FLAGS_OFFSET 0 22#define PTE_FLAGS_OFFSET 0
23#endif 23#endif
24 24
25#ifdef CONFIG_PPC_256K_PAGES 25#if defined(CONFIG_PPC_256K_PAGES) || \
26 (defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES))
26#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2 - 2) /* 1/4 of a page */ 27#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2 - 2) /* 1/4 of a page */
27#else 28#else
28#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ 29#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 94d449031b18..aee4fcc24990 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -129,6 +129,7 @@ struct pci_controller {
129#endif /* CONFIG_PPC64 */ 129#endif /* CONFIG_PPC64 */
130 130
131 void *private_data; 131 void *private_data;
132 struct npu *npu;
132}; 133};
133 134
134/* These are used for config access before all the PCI probing 135/* These are used for config access before all the PCI probing
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 2af9ded80540..0c72f1897063 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -129,5 +129,9 @@ extern void pcibios_scan_phb(struct pci_controller *hose);
129 129
130extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev); 130extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev);
131extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index); 131extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index);
132extern int pnv_npu2_init(struct pci_controller *hose);
133extern int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid,
134 unsigned long msr);
135extern int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev);
132 136
133#endif /* __ASM_POWERPC_PCI_H */ 137#endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 16a49819da9a..35926cd6cd0b 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -39,4 +39,7 @@
39 (regs)->gpr[1] = current_stack_pointer(); \ 39 (regs)->gpr[1] = current_stack_pointer(); \
40 asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \ 40 asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \
41 } while (0) 41 } while (0)
42
43/* To support perf_regs sier update */
44extern bool is_sier_available(void);
42#endif 45#endif
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 67a8a9585d50..e60aeb46d6a0 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -41,6 +41,8 @@ struct power_pmu {
41 void (*get_mem_data_src)(union perf_mem_data_src *dsrc, 41 void (*get_mem_data_src)(union perf_mem_data_src *dsrc,
42 u32 flags, struct pt_regs *regs); 42 u32 flags, struct pt_regs *regs);
43 void (*get_mem_weight)(u64 *weight); 43 void (*get_mem_weight)(u64 *weight);
44 unsigned long group_constraint_mask;
45 unsigned long group_constraint_val;
44 u64 (*bhrb_filter_map)(u64 branch_sample_type); 46 u64 (*bhrb_filter_map)(u64 branch_sample_type);
45 void (*config_bhrb)(u64 pmu_bhrb_filter); 47 void (*config_bhrb)(u64 pmu_bhrb_filter);
46 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]); 48 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
diff --git a/arch/powerpc/include/asm/pgtable-types.h b/arch/powerpc/include/asm/pgtable-types.h
index eccb30b38b47..3b0edf041b2e 100644
--- a/arch/powerpc/include/asm/pgtable-types.h
+++ b/arch/powerpc/include/asm/pgtable-types.h
@@ -3,7 +3,11 @@
3#define _ASM_POWERPC_PGTABLE_TYPES_H 3#define _ASM_POWERPC_PGTABLE_TYPES_H
4 4
5/* PTE level */ 5/* PTE level */
6#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)
7typedef struct { pte_basic_t pte, pte1, pte2, pte3; } pte_t;
8#else
6typedef struct { pte_basic_t pte; } pte_t; 9typedef struct { pte_basic_t pte; } pte_t;
10#endif
7#define __pte(x) ((pte_t) { (x) }) 11#define __pte(x) ((pte_t) { (x) })
8static inline pte_basic_t pte_val(pte_t x) 12static inline pte_basic_t pte_val(pte_t x)
9{ 13{
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 9679b7519a35..dad1d27e196d 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -66,7 +66,6 @@ extern unsigned long empty_zero_page[];
66 66
67extern pgd_t swapper_pg_dir[]; 67extern pgd_t swapper_pg_dir[];
68 68
69void limit_zone_pfn(enum zone_type zone, unsigned long max_pfn);
70int dma_pfn_limit_to_zone(u64 pfn_limit); 69int dma_pfn_limit_to_zone(u64 pfn_limit);
71extern void paging_init(void); 70extern void paging_init(void);
72 71
@@ -101,7 +100,7 @@ extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
101/* can we use this in kvm */ 100/* can we use this in kvm */
102unsigned long vmalloc_to_phys(void *vmalloc_addr); 101unsigned long vmalloc_to_phys(void *vmalloc_addr);
103 102
104void pgtable_cache_add(unsigned shift, void (*ctor)(void *)); 103void pgtable_cache_add(unsigned int shift);
105void pgtable_cache_init(void); 104void pgtable_cache_init(void);
106 105
107#if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32) 106#if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32)
@@ -110,6 +109,35 @@ void mark_initmem_nx(void);
110static inline void mark_initmem_nx(void) { } 109static inline void mark_initmem_nx(void) { }
111#endif 110#endif
112 111
112/*
113 * When used, PTE_FRAG_NR is defined in subarch pgtable.h
114 * so we are sure it is included when arriving here.
115 */
116#ifdef PTE_FRAG_NR
117static inline void *pte_frag_get(mm_context_t *ctx)
118{
119 return ctx->pte_frag;
120}
121
122static inline void pte_frag_set(mm_context_t *ctx, void *p)
123{
124 ctx->pte_frag = p;
125}
126#else
127#define PTE_FRAG_NR 1
128#define PTE_FRAG_SIZE_SHIFT PAGE_SHIFT
129#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
130
131static inline void *pte_frag_get(mm_context_t *ctx)
132{
133 return NULL;
134}
135
136static inline void pte_frag_set(mm_context_t *ctx, void *p)
137{
138}
139#endif
140
113#endif /* __ASSEMBLY__ */ 141#endif /* __ASSEMBLY__ */
114 142
115#endif /* _ASM_POWERPC_PGTABLE_H */ 143#endif /* _ASM_POWERPC_PGTABLE_H */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index a6e9e314c707..7f693e0f7499 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -257,6 +257,7 @@
257#define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1ffffe 257#define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1ffffe
258#define PPC_INST_MFVSRD 0x7c000066 258#define PPC_INST_MFVSRD 0x7c000066
259#define PPC_INST_MTVSRD 0x7c000166 259#define PPC_INST_MTVSRD 0x7c000166
260#define PPC_INST_SC 0x44000002
260#define PPC_INST_SLBFEE 0x7c0007a7 261#define PPC_INST_SLBFEE 0x7c0007a7
261#define PPC_INST_SLBIA 0x7c0003e4 262#define PPC_INST_SLBIA 0x7c0003e4
262 263
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index b5d023680801..e0637730a8e7 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -480,26 +480,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
480 ori rd,rd,((KERNELBASE>>48)&0xFFFF);\ 480 ori rd,rd,((KERNELBASE>>48)&0xFFFF);\
481 rotldi rd,rd,48 481 rotldi rd,rd,48
482#else 482#else
483/*
484 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
485 * physical base address of RAM at compile time.
486 */
487#define toreal(rd) tophys(rd,rd) 483#define toreal(rd) tophys(rd,rd)
488#define fromreal(rd) tovirt(rd,rd) 484#define fromreal(rd) tovirt(rd,rd)
489 485
490#define tophys(rd,rs) \ 486#define tophys(rd, rs) addis rd, rs, -PAGE_OFFSET@h
4910: addis rd,rs,-PAGE_OFFSET@h; \ 487#define tovirt(rd, rs) addis rd, rs, PAGE_OFFSET@h
492 .section ".vtop_fixup","aw"; \
493 .align 1; \
494 .long 0b; \
495 .previous
496
497#define tovirt(rd,rs) \
4980: addis rd,rs,PAGE_OFFSET@h; \
499 .section ".ptov_fixup","aw"; \
500 .align 1; \
501 .long 0b; \
502 .previous
503#endif 488#endif
504 489
505#ifdef CONFIG_PPC_BOOK3S_64 490#ifdef CONFIG_PPC_BOOK3S_64
@@ -821,4 +806,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
821 stringify_in_c(.long (_target) - . ;) \ 806 stringify_in_c(.long (_target) - . ;) \
822 stringify_in_c(.previous) 807 stringify_in_c(.previous)
823 808
809#ifdef CONFIG_PPC_FSL_BOOK3E
810#define BTB_FLUSH(reg) \
811 lis reg,BUCSR_INIT@h; \
812 ori reg,reg,BUCSR_INIT@l; \
813 mtspr SPRN_BUCSR,reg; \
814 isync;
815#else
816#define BTB_FLUSH(reg)
817#endif /* CONFIG_PPC_FSL_BOOK3E */
818
824#endif /* _ASM_POWERPC_PPC_ASM_H */ 819#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index de52c3166ba4..1c98ef1f2d5b 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -582,7 +582,7 @@
582#define HID0_POWER9_RADIX __MASK(63 - 8) 582#define HID0_POWER9_RADIX __MASK(63 - 8)
583 583
584#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ 584#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
585#ifdef CONFIG_6xx 585#ifdef CONFIG_PPC_BOOK3S_32
586#define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */ 586#define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */
587#define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */ 587#define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */
588#define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */ 588#define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */
@@ -769,6 +769,8 @@
769#define SRR1_PROGTRAP 0x00020000 /* Trap */ 769#define SRR1_PROGTRAP 0x00020000 /* Trap */
770#define SRR1_PROGADDR 0x00010000 /* SRR0 contains subsequent addr */ 770#define SRR1_PROGADDR 0x00010000 /* SRR0 contains subsequent addr */
771 771
772#define SRR1_MCE_MCP 0x00080000 /* Machine check signal caused interrupt */
773
772#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ 774#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */
773#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ 775#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */
774#define HSRR1_DENORM 0x00100000 /* Denorm exception */ 776#define HSRR1_DENORM 0x00100000 /* Denorm exception */
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 1fffbba8d6a5..65676e2325b8 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -67,6 +67,13 @@ void do_barrier_nospec_fixups_range(bool enable, void *start, void *end);
67static inline void do_barrier_nospec_fixups_range(bool enable, void *start, void *end) { }; 67static inline void do_barrier_nospec_fixups_range(bool enable, void *start, void *end) { };
68#endif 68#endif
69 69
70#ifdef CONFIG_PPC_FSL_BOOK3E
71void setup_spectre_v2(void);
72#else
73static inline void setup_spectre_v2(void) {};
74#endif
75void do_btb_flush_fixups(void);
76
70#endif /* !__ASSEMBLY__ */ 77#endif /* !__ASSEMBLY__ */
71 78
72#endif /* _ASM_POWERPC_SETUP_H */ 79#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index d89beaba26ff..8b957aabb826 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -213,30 +213,18 @@
213 * respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow 213 * respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
214 * (i.e. carry out) is not stored anywhere, and is lost. 214 * (i.e. carry out) is not stored anywhere, and is lost.
215 */ 215 */
216#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 216#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
217 do { \ 217 do { \
218 if (__builtin_constant_p (bh) && (bh) == 0) \ 218 if (__builtin_constant_p (bh) && (bh) == 0) \
219 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ 219 __asm__ ("add%I4c %1,%3,%4\n\taddze %0,%2" \
220 : "=r" ((USItype)(sh)), \ 220 : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
221 "=&r" ((USItype)(sl)) \ 221 else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \
222 : "%r" ((USItype)(ah)), \ 222 __asm__ ("add%I4c %1,%3,%4\n\taddme %0,%2" \
223 "%r" ((USItype)(al)), \ 223 : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
224 "rI" ((USItype)(bl))); \
225 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
226 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
227 : "=r" ((USItype)(sh)), \
228 "=&r" ((USItype)(sl)) \
229 : "%r" ((USItype)(ah)), \
230 "%r" ((USItype)(al)), \
231 "rI" ((USItype)(bl))); \
232 else \ 224 else \
233 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ 225 __asm__ ("add%I5c %1,%4,%5\n\tadde %0,%2,%3" \
234 : "=r" ((USItype)(sh)), \ 226 : "=r" (sh), "=&r" (sl) \
235 "=&r" ((USItype)(sl)) \ 227 : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \
236 : "%r" ((USItype)(ah)), \
237 "r" ((USItype)(bh)), \
238 "%r" ((USItype)(al)), \
239 "rI" ((USItype)(bl))); \
240 } while (0) 228 } while (0)
241 229
242/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to 230/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
@@ -248,44 +236,24 @@
248 * and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere, 236 * and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
249 * and is lost. 237 * and is lost.
250 */ 238 */
251#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 239#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
252 do { \ 240 do { \
253 if (__builtin_constant_p (ah) && (ah) == 0) \ 241 if (__builtin_constant_p (ah) && (ah) == 0) \
254 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ 242 __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2" \
255 : "=r" ((USItype)(sh)), \ 243 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
256 "=&r" ((USItype)(sl)) \ 244 else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0) \
257 : "r" ((USItype)(bh)), \ 245 __asm__ ("subf%I3c %1,%4,%3\n\tsubfme %0,%2" \
258 "rI" ((USItype)(al)), \ 246 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
259 "r" ((USItype)(bl))); \
260 else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
261 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
262 : "=r" ((USItype)(sh)), \
263 "=&r" ((USItype)(sl)) \
264 : "r" ((USItype)(bh)), \
265 "rI" ((USItype)(al)), \
266 "r" ((USItype)(bl))); \
267 else if (__builtin_constant_p (bh) && (bh) == 0) \ 247 else if (__builtin_constant_p (bh) && (bh) == 0) \
268 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ 248 __asm__ ("subf%I3c %1,%4,%3\n\taddme %0,%2" \
269 : "=r" ((USItype)(sh)), \ 249 : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
270 "=&r" ((USItype)(sl)) \ 250 else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \
271 : "r" ((USItype)(ah)), \ 251 __asm__ ("subf%I3c %1,%4,%3\n\taddze %0,%2" \
272 "rI" ((USItype)(al)), \ 252 : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
273 "r" ((USItype)(bl))); \
274 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
275 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
276 : "=r" ((USItype)(sh)), \
277 "=&r" ((USItype)(sl)) \
278 : "r" ((USItype)(ah)), \
279 "rI" ((USItype)(al)), \
280 "r" ((USItype)(bl))); \
281 else \ 253 else \
282 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ 254 __asm__ ("subf%I4c %1,%5,%4\n\tsubfe %0,%3,%2" \
283 : "=r" ((USItype)(sh)), \ 255 : "=r" (sh), "=&r" (sl) \
284 "=&r" ((USItype)(sl)) \ 256 : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \
285 : "r" ((USItype)(ah)), \
286 "r" ((USItype)(bh)), \
287 "rI" ((USItype)(al)), \
288 "r" ((USItype)(bl))); \
289 } while (0) 257 } while (0)
290 258
291/* asm fragments for mul and div */ 259/* asm fragments for mul and div */
@@ -294,13 +262,10 @@
294 * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype 262 * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
295 * word product in HIGH_PROD and LOW_PROD. 263 * word product in HIGH_PROD and LOW_PROD.
296 */ 264 */
297#define umul_ppmm(ph, pl, m0, m1) \ 265#define umul_ppmm(ph, pl, m0, m1) \
298 do { \ 266 do { \
299 USItype __m0 = (m0), __m1 = (m1); \ 267 USItype __m0 = (m0), __m1 = (m1); \
300 __asm__ ("mulhwu %0,%1,%2" \ 268 __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
301 : "=r" ((USItype)(ph)) \
302 : "%r" (__m0), \
303 "r" (__m1)); \
304 (pl) = __m0 * __m1; \ 269 (pl) = __m0 * __m1; \
305 } while (0) 270 } while (0)
306 271
@@ -312,9 +277,10 @@
312 * significant bit of DENOMINATOR must be 1, then the pre-processor symbol 277 * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
313 * UDIV_NEEDS_NORMALIZATION is defined to 1. 278 * UDIV_NEEDS_NORMALIZATION is defined to 1.
314 */ 279 */
315#define udiv_qrnnd(q, r, n1, n0, d) \ 280#define udiv_qrnnd(q, r, n1, n0, d) \
316 do { \ 281 do { \
317 UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \ 282 UWtype __d1, __d0, __q1, __q0; \
283 UWtype __r1, __r0, __m; \
318 __d1 = __ll_highpart (d); \ 284 __d1 = __ll_highpart (d); \
319 __d0 = __ll_lowpart (d); \ 285 __d0 = __ll_lowpart (d); \
320 \ 286 \
@@ -325,7 +291,7 @@
325 if (__r1 < __m) \ 291 if (__r1 < __m) \
326 { \ 292 { \
327 __q1--, __r1 += (d); \ 293 __q1--, __r1 += (d); \
328 if (__r1 >= (d)) /* we didn't get carry when adding to __r1 */ \ 294 if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
329 if (__r1 < __m) \ 295 if (__r1 < __m) \
330 __q1--, __r1 += (d); \ 296 __q1--, __r1 += (d); \
331 } \ 297 } \
diff --git a/arch/powerpc/include/asm/slice.h b/arch/powerpc/include/asm/slice.h
index a595461c9cb0..44816cbc4198 100644
--- a/arch/powerpc/include/asm/slice.h
+++ b/arch/powerpc/include/asm/slice.h
@@ -10,6 +10,10 @@
10#include <asm/nohash/32/slice.h> 10#include <asm/nohash/32/slice.h>
11#endif 11#endif
12 12
13#ifndef __ASSEMBLY__
14
15struct mm_struct;
16
13#ifdef CONFIG_PPC_MM_SLICES 17#ifdef CONFIG_PPC_MM_SLICES
14 18
15#ifdef CONFIG_HUGETLB_PAGE 19#ifdef CONFIG_HUGETLB_PAGE
@@ -18,10 +22,6 @@
18#define HAVE_ARCH_UNMAPPED_AREA 22#define HAVE_ARCH_UNMAPPED_AREA
19#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 23#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
20 24
21#ifndef __ASSEMBLY__
22
23struct mm_struct;
24
25unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, 25unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
26 unsigned long flags, unsigned int psize, 26 unsigned long flags, unsigned int psize,
27 int topdown); 27 int topdown);
@@ -34,8 +34,12 @@ void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
34void slice_init_new_context_exec(struct mm_struct *mm); 34void slice_init_new_context_exec(struct mm_struct *mm);
35void slice_setup_new_exec(void); 35void slice_setup_new_exec(void);
36 36
37#endif /* __ASSEMBLY__ */ 37#else /* CONFIG_PPC_MM_SLICES */
38
39static inline void slice_init_new_context_exec(struct mm_struct *mm) {}
38 40
39#endif /* CONFIG_PPC_MM_SLICES */ 41#endif /* CONFIG_PPC_MM_SLICES */
40 42
43#endif /* __ASSEMBLY__ */
44
41#endif /* _ASM_POWERPC_SLICE_H */ 45#endif /* _ASM_POWERPC_SLICE_H */
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index ab9f3f0a8637..1a0e7a8b1c81 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -18,9 +18,8 @@
18#include <linux/thread_info.h> 18#include <linux/thread_info.h>
19 19
20/* ftrace syscalls requires exporting the sys_call_table */ 20/* ftrace syscalls requires exporting the sys_call_table */
21#ifdef CONFIG_FTRACE_SYSCALLS
22extern const unsigned long sys_call_table[]; 21extern const unsigned long sys_call_table[];
23#endif /* CONFIG_FTRACE_SYSCALLS */ 22extern const unsigned long compat_sys_call_table[];
24 23
25static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs) 24static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
26{ 25{
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
deleted file mode 100644
index 01b5171ea189..000000000000
--- a/arch/powerpc/include/asm/systbl.h
+++ /dev/null
@@ -1,396 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * List of powerpc syscalls. For the meaning of the _SPU suffix see
4 * arch/powerpc/platforms/cell/spu_callbacks.c
5 */
6
7SYSCALL(restart_syscall)
8SYSCALL(exit)
9PPC_SYS(fork)
10SYSCALL_SPU(read)
11SYSCALL_SPU(write)
12COMPAT_SYS_SPU(open)
13SYSCALL_SPU(close)
14SYSCALL_SPU(waitpid)
15SYSCALL_SPU(creat)
16SYSCALL_SPU(link)
17SYSCALL_SPU(unlink)
18COMPAT_SYS(execve)
19SYSCALL_SPU(chdir)
20COMPAT_SYS_SPU(time)
21SYSCALL_SPU(mknod)
22SYSCALL_SPU(chmod)
23SYSCALL_SPU(lchown)
24SYSCALL(ni_syscall)
25OLDSYS(stat)
26COMPAT_SYS_SPU(lseek)
27SYSCALL_SPU(getpid)
28COMPAT_SYS(mount)
29SYSX(sys_ni_syscall,sys_oldumount,sys_oldumount)
30SYSCALL_SPU(setuid)
31SYSCALL_SPU(getuid)
32COMPAT_SYS_SPU(stime)
33COMPAT_SYS(ptrace)
34SYSCALL_SPU(alarm)
35OLDSYS(fstat)
36SYSCALL(pause)
37COMPAT_SYS(utime)
38SYSCALL(ni_syscall)
39SYSCALL(ni_syscall)
40SYSCALL_SPU(access)
41SYSCALL_SPU(nice)
42SYSCALL(ni_syscall)
43SYSCALL_SPU(sync)
44SYSCALL_SPU(kill)
45SYSCALL_SPU(rename)
46SYSCALL_SPU(mkdir)
47SYSCALL_SPU(rmdir)
48SYSCALL_SPU(dup)
49SYSCALL_SPU(pipe)
50COMPAT_SYS_SPU(times)
51SYSCALL(ni_syscall)
52SYSCALL_SPU(brk)
53SYSCALL_SPU(setgid)
54SYSCALL_SPU(getgid)
55SYSCALL(signal)
56SYSCALL_SPU(geteuid)
57SYSCALL_SPU(getegid)
58SYSCALL(acct)
59SYSCALL(umount)
60SYSCALL(ni_syscall)
61COMPAT_SYS_SPU(ioctl)
62COMPAT_SYS_SPU(fcntl)
63SYSCALL(ni_syscall)
64SYSCALL_SPU(setpgid)
65SYSCALL(ni_syscall)
66SYSX(sys_ni_syscall,sys_olduname,sys_olduname)
67SYSCALL_SPU(umask)
68SYSCALL_SPU(chroot)
69COMPAT_SYS(ustat)
70SYSCALL_SPU(dup2)
71SYSCALL_SPU(getppid)
72SYSCALL_SPU(getpgrp)
73SYSCALL_SPU(setsid)
74SYS32ONLY(sigaction)
75SYSCALL_SPU(sgetmask)
76SYSCALL_SPU(ssetmask)
77SYSCALL_SPU(setreuid)
78SYSCALL_SPU(setregid)
79#define compat_sys_sigsuspend sys_sigsuspend
80SYS32ONLY(sigsuspend)
81SYSX(sys_ni_syscall,compat_sys_sigpending,sys_sigpending)
82SYSCALL_SPU(sethostname)
83COMPAT_SYS_SPU(setrlimit)
84SYSX(sys_ni_syscall,compat_sys_old_getrlimit,sys_old_getrlimit)
85COMPAT_SYS_SPU(getrusage)
86COMPAT_SYS_SPU(gettimeofday)
87COMPAT_SYS_SPU(settimeofday)
88SYSCALL_SPU(getgroups)
89SYSCALL_SPU(setgroups)
90SYSX(sys_ni_syscall,sys_ni_syscall,ppc_select)
91SYSCALL_SPU(symlink)
92OLDSYS(lstat)
93SYSCALL_SPU(readlink)
94SYSCALL(uselib)
95SYSCALL(swapon)
96SYSCALL(reboot)
97SYSX(sys_ni_syscall,compat_sys_old_readdir,sys_old_readdir)
98SYSCALL_SPU(mmap)
99SYSCALL_SPU(munmap)
100COMPAT_SYS_SPU(truncate)
101COMPAT_SYS_SPU(ftruncate)
102SYSCALL_SPU(fchmod)
103SYSCALL_SPU(fchown)
104SYSCALL_SPU(getpriority)
105SYSCALL_SPU(setpriority)
106SYSCALL(ni_syscall)
107COMPAT_SYS(statfs)
108COMPAT_SYS(fstatfs)
109SYSCALL(ni_syscall)
110COMPAT_SYS_SPU(socketcall)
111SYSCALL_SPU(syslog)
112COMPAT_SYS_SPU(setitimer)
113COMPAT_SYS_SPU(getitimer)
114COMPAT_SYS_SPU(newstat)
115COMPAT_SYS_SPU(newlstat)
116COMPAT_SYS_SPU(newfstat)
117SYSX(sys_ni_syscall,sys_uname,sys_uname)
118SYSCALL(ni_syscall)
119SYSCALL_SPU(vhangup)
120SYSCALL(ni_syscall)
121SYSCALL(ni_syscall)
122COMPAT_SYS_SPU(wait4)
123SYSCALL(swapoff)
124COMPAT_SYS_SPU(sysinfo)
125COMPAT_SYS(ipc)
126SYSCALL_SPU(fsync)
127SYS32ONLY(sigreturn)
128PPC_SYS(clone)
129SYSCALL_SPU(setdomainname)
130SYSCALL_SPU(newuname)
131SYSCALL(ni_syscall)
132COMPAT_SYS_SPU(adjtimex)
133SYSCALL_SPU(mprotect)
134SYSX(sys_ni_syscall,compat_sys_sigprocmask,sys_sigprocmask)
135SYSCALL(ni_syscall)
136SYSCALL(init_module)
137SYSCALL(delete_module)
138SYSCALL(ni_syscall)
139SYSCALL(quotactl)
140SYSCALL_SPU(getpgid)
141SYSCALL_SPU(fchdir)
142SYSCALL_SPU(bdflush)
143SYSCALL_SPU(sysfs)
144SYSX_SPU(ppc64_personality,ppc64_personality,sys_personality)
145SYSCALL(ni_syscall)
146SYSCALL_SPU(setfsuid)
147SYSCALL_SPU(setfsgid)
148SYSCALL_SPU(llseek)
149COMPAT_SYS_SPU(getdents)
150COMPAT_SPU_NEW(select)
151SYSCALL_SPU(flock)
152SYSCALL_SPU(msync)
153COMPAT_SYS_SPU(readv)
154COMPAT_SYS_SPU(writev)
155SYSCALL_SPU(getsid)
156SYSCALL_SPU(fdatasync)
157COMPAT_SYS(sysctl)
158SYSCALL_SPU(mlock)
159SYSCALL_SPU(munlock)
160SYSCALL_SPU(mlockall)
161SYSCALL_SPU(munlockall)
162SYSCALL_SPU(sched_setparam)
163SYSCALL_SPU(sched_getparam)
164SYSCALL_SPU(sched_setscheduler)
165SYSCALL_SPU(sched_getscheduler)
166SYSCALL_SPU(sched_yield)
167SYSCALL_SPU(sched_get_priority_max)
168SYSCALL_SPU(sched_get_priority_min)
169COMPAT_SYS_SPU(sched_rr_get_interval)
170COMPAT_SYS_SPU(nanosleep)
171SYSCALL_SPU(mremap)
172SYSCALL_SPU(setresuid)
173SYSCALL_SPU(getresuid)
174SYSCALL(ni_syscall)
175SYSCALL_SPU(poll)
176SYSCALL(ni_syscall)
177SYSCALL_SPU(setresgid)
178SYSCALL_SPU(getresgid)
179SYSCALL_SPU(prctl)
180COMPAT_SYS(rt_sigreturn)
181COMPAT_SYS(rt_sigaction)
182COMPAT_SYS(rt_sigprocmask)
183COMPAT_SYS(rt_sigpending)
184COMPAT_SYS(rt_sigtimedwait)
185COMPAT_SYS(rt_sigqueueinfo)
186COMPAT_SYS(rt_sigsuspend)
187COMPAT_SYS_SPU(pread64)
188COMPAT_SYS_SPU(pwrite64)
189SYSCALL_SPU(chown)
190SYSCALL_SPU(getcwd)
191SYSCALL_SPU(capget)
192SYSCALL_SPU(capset)
193COMPAT_SYS(sigaltstack)
194SYSX_SPU(sys_sendfile64,compat_sys_sendfile,sys_sendfile)
195SYSCALL(ni_syscall)
196SYSCALL(ni_syscall)
197PPC_SYS(vfork)
198COMPAT_SYS_SPU(getrlimit)
199COMPAT_SYS_SPU(readahead)
200SYS32ONLY(mmap2)
201SYS32ONLY(truncate64)
202SYS32ONLY(ftruncate64)
203SYSX(sys_ni_syscall,sys_stat64,sys_stat64)
204SYSX(sys_ni_syscall,sys_lstat64,sys_lstat64)
205SYSX(sys_ni_syscall,sys_fstat64,sys_fstat64)
206SYSCALL(pciconfig_read)
207SYSCALL(pciconfig_write)
208SYSCALL(pciconfig_iobase)
209SYSCALL(ni_syscall)
210SYSCALL_SPU(getdents64)
211SYSCALL_SPU(pivot_root)
212SYSX(sys_ni_syscall,compat_sys_fcntl64,sys_fcntl64)
213SYSCALL_SPU(madvise)
214SYSCALL_SPU(mincore)
215SYSCALL_SPU(gettid)
216SYSCALL_SPU(tkill)
217SYSCALL_SPU(setxattr)
218SYSCALL_SPU(lsetxattr)
219SYSCALL_SPU(fsetxattr)
220SYSCALL_SPU(getxattr)
221SYSCALL_SPU(lgetxattr)
222SYSCALL_SPU(fgetxattr)
223SYSCALL_SPU(listxattr)
224SYSCALL_SPU(llistxattr)
225SYSCALL_SPU(flistxattr)
226SYSCALL_SPU(removexattr)
227SYSCALL_SPU(lremovexattr)
228SYSCALL_SPU(fremovexattr)
229COMPAT_SYS_SPU(futex)
230COMPAT_SYS_SPU(sched_setaffinity)
231COMPAT_SYS_SPU(sched_getaffinity)
232SYSCALL(ni_syscall)
233SYSCALL(ni_syscall)
234SYS32ONLY(sendfile64)
235COMPAT_SYS_SPU(io_setup)
236SYSCALL_SPU(io_destroy)
237COMPAT_SYS_SPU(io_getevents)
238COMPAT_SYS_SPU(io_submit)
239SYSCALL_SPU(io_cancel)
240SYSCALL(set_tid_address)
241SYSX_SPU(sys_fadvise64,ppc32_fadvise64,sys_fadvise64)
242SYSCALL(exit_group)
243COMPAT_SYS(lookup_dcookie)
244SYSCALL_SPU(epoll_create)
245SYSCALL_SPU(epoll_ctl)
246SYSCALL_SPU(epoll_wait)
247SYSCALL_SPU(remap_file_pages)
248COMPAT_SYS_SPU(timer_create)
249COMPAT_SYS_SPU(timer_settime)
250COMPAT_SYS_SPU(timer_gettime)
251SYSCALL_SPU(timer_getoverrun)
252SYSCALL_SPU(timer_delete)
253COMPAT_SYS_SPU(clock_settime)
254COMPAT_SYS_SPU(clock_gettime)
255COMPAT_SYS_SPU(clock_getres)
256COMPAT_SYS_SPU(clock_nanosleep)
257SYSX(ppc64_swapcontext,ppc32_swapcontext,ppc_swapcontext)
258SYSCALL_SPU(tgkill)
259COMPAT_SYS_SPU(utimes)
260COMPAT_SYS_SPU(statfs64)
261COMPAT_SYS_SPU(fstatfs64)
262SYSX(sys_ni_syscall,ppc_fadvise64_64,ppc_fadvise64_64)
263SYSCALL_SPU(rtas)
264OLDSYS(debug_setcontext)
265SYSCALL(ni_syscall)
266COMPAT_SYS(migrate_pages)
267COMPAT_SYS(mbind)
268COMPAT_SYS(get_mempolicy)
269COMPAT_SYS(set_mempolicy)
270COMPAT_SYS(mq_open)
271SYSCALL(mq_unlink)
272COMPAT_SYS(mq_timedsend)
273COMPAT_SYS(mq_timedreceive)
274COMPAT_SYS(mq_notify)
275COMPAT_SYS(mq_getsetattr)
276COMPAT_SYS(kexec_load)
277SYSCALL(add_key)
278SYSCALL(request_key)
279COMPAT_SYS(keyctl)
280COMPAT_SYS(waitid)
281SYSCALL(ioprio_set)
282SYSCALL(ioprio_get)
283SYSCALL(inotify_init)
284SYSCALL(inotify_add_watch)
285SYSCALL(inotify_rm_watch)
286SYSCALL(spu_run)
287SYSCALL(spu_create)
288COMPAT_SYS(pselect6)
289COMPAT_SYS(ppoll)
290SYSCALL_SPU(unshare)
291SYSCALL_SPU(splice)
292SYSCALL_SPU(tee)
293COMPAT_SYS_SPU(vmsplice)
294COMPAT_SYS_SPU(openat)
295SYSCALL_SPU(mkdirat)
296SYSCALL_SPU(mknodat)
297SYSCALL_SPU(fchownat)
298COMPAT_SYS_SPU(futimesat)
299SYSX_SPU(sys_newfstatat,sys_fstatat64,sys_fstatat64)
300SYSCALL_SPU(unlinkat)
301SYSCALL_SPU(renameat)
302SYSCALL_SPU(linkat)
303SYSCALL_SPU(symlinkat)
304SYSCALL_SPU(readlinkat)
305SYSCALL_SPU(fchmodat)
306SYSCALL_SPU(faccessat)
307COMPAT_SYS_SPU(get_robust_list)
308COMPAT_SYS_SPU(set_robust_list)
309COMPAT_SYS_SPU(move_pages)
310SYSCALL_SPU(getcpu)
311COMPAT_SYS(epoll_pwait)
312COMPAT_SYS_SPU(utimensat)
313COMPAT_SYS_SPU(signalfd)
314SYSCALL_SPU(timerfd_create)
315SYSCALL_SPU(eventfd)
316COMPAT_SYS_SPU(sync_file_range2)
317COMPAT_SYS(fallocate)
318SYSCALL(subpage_prot)
319COMPAT_SYS_SPU(timerfd_settime)
320COMPAT_SYS_SPU(timerfd_gettime)
321COMPAT_SYS_SPU(signalfd4)
322SYSCALL_SPU(eventfd2)
323SYSCALL_SPU(epoll_create1)
324SYSCALL_SPU(dup3)
325SYSCALL_SPU(pipe2)
326SYSCALL(inotify_init1)
327SYSCALL_SPU(perf_event_open)
328COMPAT_SYS_SPU(preadv)
329COMPAT_SYS_SPU(pwritev)
330COMPAT_SYS(rt_tgsigqueueinfo)
331SYSCALL(fanotify_init)
332COMPAT_SYS(fanotify_mark)
333SYSCALL_SPU(prlimit64)
334SYSCALL_SPU(socket)
335SYSCALL_SPU(bind)
336SYSCALL_SPU(connect)
337SYSCALL_SPU(listen)
338SYSCALL_SPU(accept)
339SYSCALL_SPU(getsockname)
340SYSCALL_SPU(getpeername)
341SYSCALL_SPU(socketpair)
342SYSCALL_SPU(send)
343SYSCALL_SPU(sendto)
344COMPAT_SYS_SPU(recv)
345COMPAT_SYS_SPU(recvfrom)
346SYSCALL_SPU(shutdown)
347COMPAT_SYS_SPU(setsockopt)
348COMPAT_SYS_SPU(getsockopt)
349COMPAT_SYS_SPU(sendmsg)
350COMPAT_SYS_SPU(recvmsg)
351COMPAT_SYS_SPU(recvmmsg)
352SYSCALL_SPU(accept4)
353SYSCALL_SPU(name_to_handle_at)
354COMPAT_SYS_SPU(open_by_handle_at)
355COMPAT_SYS_SPU(clock_adjtime)
356SYSCALL_SPU(syncfs)
357COMPAT_SYS_SPU(sendmmsg)
358SYSCALL_SPU(setns)
359COMPAT_SYS(process_vm_readv)
360COMPAT_SYS(process_vm_writev)
361SYSCALL(finit_module)
362SYSCALL(kcmp) /* sys_kcmp */
363SYSCALL_SPU(sched_setattr)
364SYSCALL_SPU(sched_getattr)
365SYSCALL_SPU(renameat2)
366SYSCALL_SPU(seccomp)
367SYSCALL_SPU(getrandom)
368SYSCALL_SPU(memfd_create)
369SYSCALL_SPU(bpf)
370COMPAT_SYS(execveat)
371PPC64ONLY(switch_endian)
372SYSCALL_SPU(userfaultfd)
373SYSCALL_SPU(membarrier)
374SYSCALL(ni_syscall)
375SYSCALL(ni_syscall)
376SYSCALL(ni_syscall)
377SYSCALL(ni_syscall)
378SYSCALL(ni_syscall)
379SYSCALL(ni_syscall)
380SYSCALL(ni_syscall)
381SYSCALL(ni_syscall)
382SYSCALL(ni_syscall)
383SYSCALL(ni_syscall)
384SYSCALL(ni_syscall)
385SYSCALL(ni_syscall)
386SYSCALL(mlock2)
387SYSCALL(copy_file_range)
388COMPAT_SYS_SPU(preadv2)
389COMPAT_SYS_SPU(pwritev2)
390SYSCALL(kexec_file_load)
391SYSCALL(statx)
392SYSCALL(pkey_alloc)
393SYSCALL(pkey_free)
394SYSCALL(pkey_mprotect)
395SYSCALL(rseq)
396COMPAT_SYS(io_pgetevents)
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index b80d492ceb29..54bf7e68a7e1 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -43,7 +43,7 @@ struct div_result {
43 43
44/* Accessor functions for the timebase (RTC on 601) registers. */ 44/* Accessor functions for the timebase (RTC on 601) registers. */
45/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ 45/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
46#ifdef CONFIG_6xx 46#ifdef CONFIG_PPC_BOOK3S_32
47#define __USE_RTC() (cpu_has_feature(CPU_FTR_USE_RTC)) 47#define __USE_RTC() (cpu_has_feature(CPU_FTR_USE_RTC))
48#else 48#else
49#define __USE_RTC() 0 49#define __USE_RTC() 0
diff --git a/arch/powerpc/include/asm/tlb.h b/arch/powerpc/include/asm/tlb.h
index f0e571b2dc7c..e24c67d5ba75 100644
--- a/arch/powerpc/include/asm/tlb.h
+++ b/arch/powerpc/include/asm/tlb.h
@@ -40,7 +40,7 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
40static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, 40static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
41 unsigned long address) 41 unsigned long address)
42{ 42{
43#ifdef CONFIG_PPC_STD_MMU_32 43#ifdef CONFIG_PPC_BOOK3S_32
44 if (pte_val(*ptep) & _PAGE_HASHPTE) 44 if (pte_val(*ptep) & _PAGE_HASHPTE)
45 flush_hash_entry(tlb->mm, ptep, address); 45 flush_hash_entry(tlb->mm, ptep, address);
46#endif 46#endif
diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h
index 15bea9a0f260..ebc0b916dcf9 100644
--- a/arch/powerpc/include/asm/uaccess.h
+++ b/arch/powerpc/include/asm/uaccess.h
@@ -63,7 +63,7 @@ static inline int __access_ok(unsigned long addr, unsigned long size,
63#endif 63#endif
64 64
65#define access_ok(type, addr, size) \ 65#define access_ok(type, addr, size) \
66 (__chk_user_ptr(addr), \ 66 (__chk_user_ptr(addr), (void)(type), \
67 __access_ok((__force unsigned long)(addr), (size), get_fs())) 67 __access_ok((__force unsigned long)(addr), (size), get_fs()))
68 68
69/* 69/*
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index b0de85b477e1..a3c35e6d6ffb 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -11,8 +11,7 @@
11 11
12#include <uapi/asm/unistd.h> 12#include <uapi/asm/unistd.h>
13 13
14 14#define NR_syscalls __NR_syscalls
15#define NR_syscalls 389
16 15
17#define __NR__exit __NR_exit 16#define __NR__exit __NR_exit
18 17
diff --git a/arch/powerpc/include/uapi/asm/Kbuild b/arch/powerpc/include/uapi/asm/Kbuild
index 3712152206f3..8ab8ba1b71bc 100644
--- a/arch/powerpc/include/uapi/asm/Kbuild
+++ b/arch/powerpc/include/uapi/asm/Kbuild
@@ -1,6 +1,8 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4generated-y += unistd_32.h
5generated-y += unistd_64.h
4generic-y += param.h 6generic-y += param.h
5generic-y += poll.h 7generic-y += poll.h
6generic-y += resource.h 8generic-y += resource.h
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
index 9e52c86ccbd3..ff91192407d1 100644
--- a/arch/powerpc/include/uapi/asm/perf_regs.h
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -46,6 +46,7 @@ enum perf_event_powerpc_regs {
46 PERF_REG_POWERPC_TRAP, 46 PERF_REG_POWERPC_TRAP,
47 PERF_REG_POWERPC_DAR, 47 PERF_REG_POWERPC_DAR,
48 PERF_REG_POWERPC_DSISR, 48 PERF_REG_POWERPC_DSISR,
49 PERF_REG_POWERPC_SIER,
49 PERF_REG_POWERPC_MAX, 50 PERF_REG_POWERPC_MAX,
50}; 51};
51#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */ 52#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 985534d0b448..5f84e3dc98d0 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -10,395 +10,10 @@
10#ifndef _UAPI_ASM_POWERPC_UNISTD_H_ 10#ifndef _UAPI_ASM_POWERPC_UNISTD_H_
11#define _UAPI_ASM_POWERPC_UNISTD_H_ 11#define _UAPI_ASM_POWERPC_UNISTD_H_
12 12
13
14#define __NR_restart_syscall 0
15#define __NR_exit 1
16#define __NR_fork 2
17#define __NR_read 3
18#define __NR_write 4
19#define __NR_open 5
20#define __NR_close 6
21#define __NR_waitpid 7
22#define __NR_creat 8
23#define __NR_link 9
24#define __NR_unlink 10
25#define __NR_execve 11
26#define __NR_chdir 12
27#define __NR_time 13
28#define __NR_mknod 14
29#define __NR_chmod 15
30#define __NR_lchown 16
31#define __NR_break 17
32#define __NR_oldstat 18
33#define __NR_lseek 19
34#define __NR_getpid 20
35#define __NR_mount 21
36#define __NR_umount 22
37#define __NR_setuid 23
38#define __NR_getuid 24
39#define __NR_stime 25
40#define __NR_ptrace 26
41#define __NR_alarm 27
42#define __NR_oldfstat 28
43#define __NR_pause 29
44#define __NR_utime 30
45#define __NR_stty 31
46#define __NR_gtty 32
47#define __NR_access 33
48#define __NR_nice 34
49#define __NR_ftime 35
50#define __NR_sync 36
51#define __NR_kill 37
52#define __NR_rename 38
53#define __NR_mkdir 39
54#define __NR_rmdir 40
55#define __NR_dup 41
56#define __NR_pipe 42
57#define __NR_times 43
58#define __NR_prof 44
59#define __NR_brk 45
60#define __NR_setgid 46
61#define __NR_getgid 47
62#define __NR_signal 48
63#define __NR_geteuid 49
64#define __NR_getegid 50
65#define __NR_acct 51
66#define __NR_umount2 52
67#define __NR_lock 53
68#define __NR_ioctl 54
69#define __NR_fcntl 55
70#define __NR_mpx 56
71#define __NR_setpgid 57
72#define __NR_ulimit 58
73#define __NR_oldolduname 59
74#define __NR_umask 60
75#define __NR_chroot 61
76#define __NR_ustat 62
77#define __NR_dup2 63
78#define __NR_getppid 64
79#define __NR_getpgrp 65
80#define __NR_setsid 66
81#define __NR_sigaction 67
82#define __NR_sgetmask 68
83#define __NR_ssetmask 69
84#define __NR_setreuid 70
85#define __NR_setregid 71
86#define __NR_sigsuspend 72
87#define __NR_sigpending 73
88#define __NR_sethostname 74
89#define __NR_setrlimit 75
90#define __NR_getrlimit 76
91#define __NR_getrusage 77
92#define __NR_gettimeofday 78
93#define __NR_settimeofday 79
94#define __NR_getgroups 80
95#define __NR_setgroups 81
96#define __NR_select 82
97#define __NR_symlink 83
98#define __NR_oldlstat 84
99#define __NR_readlink 85
100#define __NR_uselib 86
101#define __NR_swapon 87
102#define __NR_reboot 88
103#define __NR_readdir 89
104#define __NR_mmap 90
105#define __NR_munmap 91
106#define __NR_truncate 92
107#define __NR_ftruncate 93
108#define __NR_fchmod 94
109#define __NR_fchown 95
110#define __NR_getpriority 96
111#define __NR_setpriority 97
112#define __NR_profil 98
113#define __NR_statfs 99
114#define __NR_fstatfs 100
115#define __NR_ioperm 101
116#define __NR_socketcall 102
117#define __NR_syslog 103
118#define __NR_setitimer 104
119#define __NR_getitimer 105
120#define __NR_stat 106
121#define __NR_lstat 107
122#define __NR_fstat 108
123#define __NR_olduname 109
124#define __NR_iopl 110
125#define __NR_vhangup 111
126#define __NR_idle 112
127#define __NR_vm86 113
128#define __NR_wait4 114
129#define __NR_swapoff 115
130#define __NR_sysinfo 116
131#define __NR_ipc 117
132#define __NR_fsync 118
133#define __NR_sigreturn 119
134#define __NR_clone 120
135#define __NR_setdomainname 121
136#define __NR_uname 122
137#define __NR_modify_ldt 123
138#define __NR_adjtimex 124
139#define __NR_mprotect 125
140#define __NR_sigprocmask 126
141#define __NR_create_module 127
142#define __NR_init_module 128
143#define __NR_delete_module 129
144#define __NR_get_kernel_syms 130
145#define __NR_quotactl 131
146#define __NR_getpgid 132
147#define __NR_fchdir 133
148#define __NR_bdflush 134
149#define __NR_sysfs 135
150#define __NR_personality 136
151#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
152#define __NR_setfsuid 138
153#define __NR_setfsgid 139
154#define __NR__llseek 140
155#define __NR_getdents 141
156#define __NR__newselect 142
157#define __NR_flock 143
158#define __NR_msync 144
159#define __NR_readv 145
160#define __NR_writev 146
161#define __NR_getsid 147
162#define __NR_fdatasync 148
163#define __NR__sysctl 149
164#define __NR_mlock 150
165#define __NR_munlock 151
166#define __NR_mlockall 152
167#define __NR_munlockall 153
168#define __NR_sched_setparam 154
169#define __NR_sched_getparam 155
170#define __NR_sched_setscheduler 156
171#define __NR_sched_getscheduler 157
172#define __NR_sched_yield 158
173#define __NR_sched_get_priority_max 159
174#define __NR_sched_get_priority_min 160
175#define __NR_sched_rr_get_interval 161
176#define __NR_nanosleep 162
177#define __NR_mremap 163
178#define __NR_setresuid 164
179#define __NR_getresuid 165
180#define __NR_query_module 166
181#define __NR_poll 167
182#define __NR_nfsservctl 168
183#define __NR_setresgid 169
184#define __NR_getresgid 170
185#define __NR_prctl 171
186#define __NR_rt_sigreturn 172
187#define __NR_rt_sigaction 173
188#define __NR_rt_sigprocmask 174
189#define __NR_rt_sigpending 175
190#define __NR_rt_sigtimedwait 176
191#define __NR_rt_sigqueueinfo 177
192#define __NR_rt_sigsuspend 178
193#define __NR_pread64 179
194#define __NR_pwrite64 180
195#define __NR_chown 181
196#define __NR_getcwd 182
197#define __NR_capget 183
198#define __NR_capset 184
199#define __NR_sigaltstack 185
200#define __NR_sendfile 186
201#define __NR_getpmsg 187 /* some people actually want streams */
202#define __NR_putpmsg 188 /* some people actually want streams */
203#define __NR_vfork 189
204#define __NR_ugetrlimit 190 /* SuS compliant getrlimit */
205#define __NR_readahead 191
206#ifndef __powerpc64__ /* these are 32-bit only */
207#define __NR_mmap2 192
208#define __NR_truncate64 193
209#define __NR_ftruncate64 194
210#define __NR_stat64 195
211#define __NR_lstat64 196
212#define __NR_fstat64 197
213#endif
214#define __NR_pciconfig_read 198
215#define __NR_pciconfig_write 199
216#define __NR_pciconfig_iobase 200
217#define __NR_multiplexer 201
218#define __NR_getdents64 202
219#define __NR_pivot_root 203
220#ifndef __powerpc64__
221#define __NR_fcntl64 204
222#endif
223#define __NR_madvise 205
224#define __NR_mincore 206
225#define __NR_gettid 207
226#define __NR_tkill 208
227#define __NR_setxattr 209
228#define __NR_lsetxattr 210
229#define __NR_fsetxattr 211
230#define __NR_getxattr 212
231#define __NR_lgetxattr 213
232#define __NR_fgetxattr 214
233#define __NR_listxattr 215
234#define __NR_llistxattr 216
235#define __NR_flistxattr 217
236#define __NR_removexattr 218
237#define __NR_lremovexattr 219
238#define __NR_fremovexattr 220
239#define __NR_futex 221
240#define __NR_sched_setaffinity 222
241#define __NR_sched_getaffinity 223
242/* 224 currently unused */
243#define __NR_tuxcall 225
244#ifndef __powerpc64__ 13#ifndef __powerpc64__
245#define __NR_sendfile64 226 14#include <asm/unistd_32.h>
246#endif
247#define __NR_io_setup 227
248#define __NR_io_destroy 228
249#define __NR_io_getevents 229
250#define __NR_io_submit 230
251#define __NR_io_cancel 231
252#define __NR_set_tid_address 232
253#define __NR_fadvise64 233
254#define __NR_exit_group 234
255#define __NR_lookup_dcookie 235
256#define __NR_epoll_create 236
257#define __NR_epoll_ctl 237
258#define __NR_epoll_wait 238
259#define __NR_remap_file_pages 239
260#define __NR_timer_create 240
261#define __NR_timer_settime 241
262#define __NR_timer_gettime 242
263#define __NR_timer_getoverrun 243
264#define __NR_timer_delete 244
265#define __NR_clock_settime 245
266#define __NR_clock_gettime 246
267#define __NR_clock_getres 247
268#define __NR_clock_nanosleep 248
269#define __NR_swapcontext 249
270#define __NR_tgkill 250
271#define __NR_utimes 251
272#define __NR_statfs64 252
273#define __NR_fstatfs64 253
274#ifndef __powerpc64__
275#define __NR_fadvise64_64 254
276#endif
277#define __NR_rtas 255
278#define __NR_sys_debug_setcontext 256
279/* Number 257 is reserved for vserver */
280#define __NR_migrate_pages 258
281#define __NR_mbind 259
282#define __NR_get_mempolicy 260
283#define __NR_set_mempolicy 261
284#define __NR_mq_open 262
285#define __NR_mq_unlink 263
286#define __NR_mq_timedsend 264
287#define __NR_mq_timedreceive 265
288#define __NR_mq_notify 266
289#define __NR_mq_getsetattr 267
290#define __NR_kexec_load 268
291#define __NR_add_key 269
292#define __NR_request_key 270
293#define __NR_keyctl 271
294#define __NR_waitid 272
295#define __NR_ioprio_set 273
296#define __NR_ioprio_get 274
297#define __NR_inotify_init 275
298#define __NR_inotify_add_watch 276
299#define __NR_inotify_rm_watch 277
300#define __NR_spu_run 278
301#define __NR_spu_create 279
302#define __NR_pselect6 280
303#define __NR_ppoll 281
304#define __NR_unshare 282
305#define __NR_splice 283
306#define __NR_tee 284
307#define __NR_vmsplice 285
308#define __NR_openat 286
309#define __NR_mkdirat 287
310#define __NR_mknodat 288
311#define __NR_fchownat 289
312#define __NR_futimesat 290
313#ifdef __powerpc64__
314#define __NR_newfstatat 291
315#else 15#else
316#define __NR_fstatat64 291 16#include <asm/unistd_64.h>
317#endif 17#endif
318#define __NR_unlinkat 292
319#define __NR_renameat 293
320#define __NR_linkat 294
321#define __NR_symlinkat 295
322#define __NR_readlinkat 296
323#define __NR_fchmodat 297
324#define __NR_faccessat 298
325#define __NR_get_robust_list 299
326#define __NR_set_robust_list 300
327#define __NR_move_pages 301
328#define __NR_getcpu 302
329#define __NR_epoll_pwait 303
330#define __NR_utimensat 304
331#define __NR_signalfd 305
332#define __NR_timerfd_create 306
333#define __NR_eventfd 307
334#define __NR_sync_file_range2 308
335#define __NR_fallocate 309
336#define __NR_subpage_prot 310
337#define __NR_timerfd_settime 311
338#define __NR_timerfd_gettime 312
339#define __NR_signalfd4 313
340#define __NR_eventfd2 314
341#define __NR_epoll_create1 315
342#define __NR_dup3 316
343#define __NR_pipe2 317
344#define __NR_inotify_init1 318
345#define __NR_perf_event_open 319
346#define __NR_preadv 320
347#define __NR_pwritev 321
348#define __NR_rt_tgsigqueueinfo 322
349#define __NR_fanotify_init 323
350#define __NR_fanotify_mark 324
351#define __NR_prlimit64 325
352#define __NR_socket 326
353#define __NR_bind 327
354#define __NR_connect 328
355#define __NR_listen 329
356#define __NR_accept 330
357#define __NR_getsockname 331
358#define __NR_getpeername 332
359#define __NR_socketpair 333
360#define __NR_send 334
361#define __NR_sendto 335
362#define __NR_recv 336
363#define __NR_recvfrom 337
364#define __NR_shutdown 338
365#define __NR_setsockopt 339
366#define __NR_getsockopt 340
367#define __NR_sendmsg 341
368#define __NR_recvmsg 342
369#define __NR_recvmmsg 343
370#define __NR_accept4 344
371#define __NR_name_to_handle_at 345
372#define __NR_open_by_handle_at 346
373#define __NR_clock_adjtime 347
374#define __NR_syncfs 348
375#define __NR_sendmmsg 349
376#define __NR_setns 350
377#define __NR_process_vm_readv 351
378#define __NR_process_vm_writev 352
379#define __NR_finit_module 353
380#define __NR_kcmp 354
381#define __NR_sched_setattr 355
382#define __NR_sched_getattr 356
383#define __NR_renameat2 357
384#define __NR_seccomp 358
385#define __NR_getrandom 359
386#define __NR_memfd_create 360
387#define __NR_bpf 361
388#define __NR_execveat 362
389#define __NR_switch_endian 363
390#define __NR_userfaultfd 364
391#define __NR_membarrier 365
392#define __NR_mlock2 378
393#define __NR_copy_file_range 379
394#define __NR_preadv2 380
395#define __NR_pwritev2 381
396#define __NR_kexec_file_load 382
397#define __NR_statx 383
398#define __NR_pkey_alloc 384
399#define __NR_pkey_free 385
400#define __NR_pkey_mprotect 386
401#define __NR_rseq 387
402#define __NR_io_pgetevents 388
403 18
404#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */ 19#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 53d4b8d5b54d..cb7f0bb9ee71 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -69,7 +69,7 @@ obj-$(CONFIG_FA_DUMP) += fadump.o
69ifdef CONFIG_PPC32 69ifdef CONFIG_PPC32
70obj-$(CONFIG_E500) += idle_e500.o 70obj-$(CONFIG_E500) += idle_e500.o
71endif 71endif
72obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o 72obj-$(CONFIG_PPC_BOOK3S_32) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
73obj-$(CONFIG_TAU) += tau_6xx.o 73obj-$(CONFIG_TAU) += tau_6xx.o
74obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o 74obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o
75ifdef CONFIG_FSL_BOOKE 75ifdef CONFIG_FSL_BOOKE
@@ -160,16 +160,6 @@ extra-$(CONFIG_ALTIVEC) += vector.o
160extra-$(CONFIG_PPC64) += entry_64.o 160extra-$(CONFIG_PPC64) += entry_64.o
161extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o 161extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
162 162
163extra-y += systbl_chk.i
164$(obj)/systbl.o: systbl_chk
165
166quiet_cmd_systbl_chk = CALL $<
167 cmd_systbl_chk = $(CONFIG_SHELL) $< $(obj)/systbl_chk.i
168
169PHONY += systbl_chk
170systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i
171 $(call cmd,systbl_chk)
172
173ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE 163ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
174$(obj)/built-in.a: prom_init_check 164$(obj)/built-in.a: prom_init_check
175 165
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index b4241ed1456e..6dfceaa820e4 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -232,20 +232,12 @@ static int btext_initialize(struct device_node *np)
232 232
233int __init btext_find_display(int allow_nonstdout) 233int __init btext_find_display(int allow_nonstdout)
234{ 234{
235 const char *name; 235 struct device_node *np = of_stdout;
236 struct device_node *np = NULL;
237 int rc = -ENODEV; 236 int rc = -ENODEV;
238 237
239 name = of_get_property(of_chosen, "linux,stdout-path", NULL); 238 if (!of_node_is_type(np, "display")) {
240 if (name != NULL) { 239 printk("boot stdout isn't a display !\n");
241 np = of_find_node_by_path(name); 240 np = NULL;
242 if (np != NULL) {
243 if (strcmp(np->type, "display") != 0) {
244 printk("boot stdout isn't a display !\n");
245 of_node_put(np);
246 np = NULL;
247 }
248 }
249 } 241 }
250 if (np) 242 if (np)
251 rc = btext_initialize(np); 243 rc = btext_initialize(np);
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index be57bd07596d..53102764fd2f 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -428,7 +428,7 @@ static void link_cache_lists(struct cache *smaller, struct cache *bigger)
428static void do_subsidiary_caches_debugcheck(struct cache *cache) 428static void do_subsidiary_caches_debugcheck(struct cache *cache)
429{ 429{
430 WARN_ON_ONCE(cache->level != 1); 430 WARN_ON_ONCE(cache->level != 1);
431 WARN_ON_ONCE(strcmp(cache->ofnode->type, "cpu")); 431 WARN_ON_ONCE(!of_node_is_type(cache->ofnode, "cpu"));
432} 432}
433 433
434static void do_subsidiary_caches(struct cache *cache) 434static void do_subsidiary_caches(struct cache *cache)
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index fa3c2c91290c..8c069e96c478 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -326,7 +326,7 @@ _GLOBAL(__save_cpu_setup)
326 lis r5,cpu_state_storage@h 326 lis r5,cpu_state_storage@h
327 ori r5,r5,cpu_state_storage@l 327 ori r5,r5,cpu_state_storage@l
328 328
329 /* Save HID0 (common to all CONFIG_6xx cpus) */ 329 /* Save HID0 (common to all CONFIG_PPC_BOOK3S_32 cpus) */
330 mfspr r3,SPRN_HID0 330 mfspr r3,SPRN_HID0
331 stw r3,CS_HID0(r5) 331 stw r3,CS_HID0(r5)
332 332
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 8d142e5d84cd..5fbc890d1094 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -17,7 +17,7 @@
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/cputable.h> 18#include <asm/cputable.h>
19#include <asm/ppc_asm.h> 19#include <asm/ppc_asm.h>
20#include <asm/mmu-book3e.h> 20#include <asm/nohash/mmu-book3e.h>
21#include <asm/asm-offsets.h> 21#include <asm/asm-offsets.h>
22#include <asm/mpc85xx.h> 22#include <asm/mpc85xx.h>
23 23
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 2da01340c84c..1eab54bc6ee9 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1141,6 +1141,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1141 .machine_check = machine_check_generic, 1141 .machine_check = machine_check_generic,
1142 .platform = "ppc603", 1142 .platform = "ppc603",
1143 }, 1143 },
1144#ifdef CONFIG_PPC_83xx
1144 { /* e300c1 (a 603e core, plus some) on 83xx */ 1145 { /* e300c1 (a 603e core, plus some) on 83xx */
1145 .pvr_mask = 0x7fff0000, 1146 .pvr_mask = 0x7fff0000,
1146 .pvr_value = 0x00830000, 1147 .pvr_value = 0x00830000,
@@ -1151,7 +1152,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1151 .icache_bsize = 32, 1152 .icache_bsize = 32,
1152 .dcache_bsize = 32, 1153 .dcache_bsize = 32,
1153 .cpu_setup = __setup_cpu_603, 1154 .cpu_setup = __setup_cpu_603,
1154 .machine_check = machine_check_generic, 1155 .machine_check = machine_check_83xx,
1155 .platform = "ppc603", 1156 .platform = "ppc603",
1156 }, 1157 },
1157 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1158 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
@@ -1165,7 +1166,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1165 .icache_bsize = 32, 1166 .icache_bsize = 32,
1166 .dcache_bsize = 32, 1167 .dcache_bsize = 32,
1167 .cpu_setup = __setup_cpu_603, 1168 .cpu_setup = __setup_cpu_603,
1168 .machine_check = machine_check_generic, 1169 .machine_check = machine_check_83xx,
1169 .platform = "ppc603", 1170 .platform = "ppc603",
1170 }, 1171 },
1171 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1172 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
@@ -1179,7 +1180,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1179 .icache_bsize = 32, 1180 .icache_bsize = 32,
1180 .dcache_bsize = 32, 1181 .dcache_bsize = 32,
1181 .cpu_setup = __setup_cpu_603, 1182 .cpu_setup = __setup_cpu_603,
1182 .machine_check = machine_check_generic, 1183 .machine_check = machine_check_83xx,
1183 .num_pmcs = 4, 1184 .num_pmcs = 4,
1184 .oprofile_cpu_type = "ppc/e300", 1185 .oprofile_cpu_type = "ppc/e300",
1185 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1186 .oprofile_type = PPC_OPROFILE_FSL_EMB,
@@ -1196,12 +1197,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
1196 .icache_bsize = 32, 1197 .icache_bsize = 32,
1197 .dcache_bsize = 32, 1198 .dcache_bsize = 32,
1198 .cpu_setup = __setup_cpu_603, 1199 .cpu_setup = __setup_cpu_603,
1199 .machine_check = machine_check_generic, 1200 .machine_check = machine_check_83xx,
1200 .num_pmcs = 4, 1201 .num_pmcs = 4,
1201 .oprofile_cpu_type = "ppc/e300", 1202 .oprofile_cpu_type = "ppc/e300",
1202 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1203 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1203 .platform = "ppc603", 1204 .platform = "ppc603",
1204 }, 1205 },
1206#endif
1205 { /* default match, we assume split I/D cache & TB (non-601)... */ 1207 { /* default match, we assume split I/D cache & TB (non-601)... */
1206 .pvr_mask = 0x00000000, 1208 .pvr_mask = 0x00000000,
1207 .pvr_value = 0x00000000, 1209 .pvr_value = 0x00000000,
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index f9fe2080ceb9..2ca6cfaebf65 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -6,7 +6,6 @@
6 * busses using the iommu infrastructure 6 * busses using the iommu infrastructure
7 */ 7 */
8 8
9#include <linux/export.h>
10#include <asm/iommu.h> 9#include <asm/iommu.h>
11 10
12/* 11/*
@@ -123,4 +122,3 @@ struct dma_map_ops dma_iommu_ops = {
123 .get_required_mask = dma_iommu_get_required_mask, 122 .get_required_mask = dma_iommu_get_required_mask,
124 .mapping_error = dma_iommu_mapping_error, 123 .mapping_error = dma_iommu_mapping_error,
125}; 124};
126EXPORT_SYMBOL(dma_iommu_ops);
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 5fc335f4d9cd..678811abccfc 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -108,12 +108,8 @@ int __init swiotlb_setup_bus_notifier(void)
108 108
109void __init swiotlb_detect_4g(void) 109void __init swiotlb_detect_4g(void)
110{ 110{
111 if ((memblock_end_of_DRAM() - 1) > 0xffffffff) { 111 if ((memblock_end_of_DRAM() - 1) > 0xffffffff)
112 ppc_swiotlb_enable = 1; 112 ppc_swiotlb_enable = 1;
113#ifdef CONFIG_ZONE_DMA32
114 limit_zone_pfn(ZONE_DMA32, (1ULL << 32) >> PAGE_SHIFT);
115#endif
116 }
117} 113}
118 114
119static int __init check_swiotlb_enabled(void) 115static int __init check_swiotlb_enabled(void)
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index dbfc7056d7df..b1903ebb2e9c 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -50,7 +50,8 @@ static int dma_nommu_dma_supported(struct device *dev, u64 mask)
50 return 1; 50 return 1;
51 51
52#ifdef CONFIG_FSL_SOC 52#ifdef CONFIG_FSL_SOC
53 /* Freescale gets another chance via ZONE_DMA/ZONE_DMA32, however 53 /*
54 * Freescale gets another chance via ZONE_DMA, however
54 * that will have to be refined if/when they support iommus 55 * that will have to be refined if/when they support iommus
55 */ 56 */
56 return 1; 57 return 1;
@@ -62,18 +63,12 @@ static int dma_nommu_dma_supported(struct device *dev, u64 mask)
62#endif 63#endif
63} 64}
64 65
66#ifndef CONFIG_NOT_COHERENT_CACHE
65void *__dma_nommu_alloc_coherent(struct device *dev, size_t size, 67void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
66 dma_addr_t *dma_handle, gfp_t flag, 68 dma_addr_t *dma_handle, gfp_t flag,
67 unsigned long attrs) 69 unsigned long attrs)
68{ 70{
69 void *ret; 71 void *ret;
70#ifdef CONFIG_NOT_COHERENT_CACHE
71 ret = __dma_alloc_coherent(dev, size, dma_handle, flag);
72 if (ret == NULL)
73 return NULL;
74 *dma_handle += get_dma_offset(dev);
75 return ret;
76#else
77 struct page *page; 72 struct page *page;
78 int node = dev_to_node(dev); 73 int node = dev_to_node(dev);
79#ifdef CONFIG_FSL_SOC 74#ifdef CONFIG_FSL_SOC
@@ -94,13 +89,10 @@ void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
94 } 89 }
95 90
96 switch (zone) { 91 switch (zone) {
92#ifdef CONFIG_ZONE_DMA
97 case ZONE_DMA: 93 case ZONE_DMA:
98 flag |= GFP_DMA; 94 flag |= GFP_DMA;
99 break; 95 break;
100#ifdef CONFIG_ZONE_DMA32
101 case ZONE_DMA32:
102 flag |= GFP_DMA32;
103 break;
104#endif 96#endif
105 }; 97 };
106#endif /* CONFIG_FSL_SOC */ 98#endif /* CONFIG_FSL_SOC */
@@ -113,19 +105,15 @@ void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
113 *dma_handle = __pa(ret) + get_dma_offset(dev); 105 *dma_handle = __pa(ret) + get_dma_offset(dev);
114 106
115 return ret; 107 return ret;
116#endif
117} 108}
118 109
119void __dma_nommu_free_coherent(struct device *dev, size_t size, 110void __dma_nommu_free_coherent(struct device *dev, size_t size,
120 void *vaddr, dma_addr_t dma_handle, 111 void *vaddr, dma_addr_t dma_handle,
121 unsigned long attrs) 112 unsigned long attrs)
122{ 113{
123#ifdef CONFIG_NOT_COHERENT_CACHE
124 __dma_free_coherent(size, vaddr);
125#else
126 free_pages((unsigned long)vaddr, get_order(size)); 114 free_pages((unsigned long)vaddr, get_order(size));
127#endif
128} 115}
116#endif /* !CONFIG_NOT_COHERENT_CACHE */
129 117
130static void *dma_nommu_alloc_coherent(struct device *dev, size_t size, 118static void *dma_nommu_alloc_coherent(struct device *dev, size_t size,
131 dma_addr_t *dma_handle, gfp_t flag, 119 dma_addr_t *dma_handle, gfp_t flag,
@@ -210,10 +198,15 @@ static int dma_nommu_map_sg(struct device *dev, struct scatterlist *sgl,
210 return nents; 198 return nents;
211} 199}
212 200
213static void dma_nommu_unmap_sg(struct device *dev, struct scatterlist *sg, 201static void dma_nommu_unmap_sg(struct device *dev, struct scatterlist *sgl,
214 int nents, enum dma_data_direction direction, 202 int nents, enum dma_data_direction direction,
215 unsigned long attrs) 203 unsigned long attrs)
216{ 204{
205 struct scatterlist *sg;
206 int i;
207
208 for_each_sg(sgl, sg, nents, i)
209 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
217} 210}
218 211
219static u64 dma_nommu_get_required_mask(struct device *dev) 212static u64 dma_nommu_get_required_mask(struct device *dev)
@@ -247,6 +240,8 @@ static inline void dma_nommu_unmap_page(struct device *dev,
247 enum dma_data_direction direction, 240 enum dma_data_direction direction,
248 unsigned long attrs) 241 unsigned long attrs)
249{ 242{
243 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
244 __dma_sync(bus_to_virt(dma_address), size, direction);
250} 245}
251 246
252#ifdef CONFIG_NOT_COHERENT_CACHE 247#ifdef CONFIG_NOT_COHERENT_CACHE
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 6cae6b56ffd6..3230137469ab 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -1808,10 +1808,10 @@ static int eeh_freeze_dbgfs_get(void *data, u64 *val)
1808 return 0; 1808 return 0;
1809} 1809}
1810 1810
1811DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get, 1811DEFINE_DEBUGFS_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1812 eeh_enable_dbgfs_set, "0x%llx\n"); 1812 eeh_enable_dbgfs_set, "0x%llx\n");
1813DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get, 1813DEFINE_DEBUGFS_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
1814 eeh_freeze_dbgfs_set, "0x%llx\n"); 1814 eeh_freeze_dbgfs_set, "0x%llx\n");
1815#endif 1815#endif
1816 1816
1817static int __init eeh_init_proc(void) 1817static int __init eeh_init_proc(void)
@@ -1819,12 +1819,12 @@ static int __init eeh_init_proc(void)
1819 if (machine_is(pseries) || machine_is(powernv)) { 1819 if (machine_is(pseries) || machine_is(powernv)) {
1820 proc_create_single("powerpc/eeh", 0, NULL, proc_eeh_show); 1820 proc_create_single("powerpc/eeh", 0, NULL, proc_eeh_show);
1821#ifdef CONFIG_DEBUG_FS 1821#ifdef CONFIG_DEBUG_FS
1822 debugfs_create_file("eeh_enable", 0600, 1822 debugfs_create_file_unsafe("eeh_enable", 0600,
1823 powerpc_debugfs_root, NULL, 1823 powerpc_debugfs_root, NULL,
1824 &eeh_enable_dbgfs_ops); 1824 &eeh_enable_dbgfs_ops);
1825 debugfs_create_file("eeh_max_freezes", 0600, 1825 debugfs_create_file_unsafe("eeh_max_freezes", 0600,
1826 powerpc_debugfs_root, NULL, 1826 powerpc_debugfs_root, NULL,
1827 &eeh_freeze_dbgfs_ops); 1827 &eeh_freeze_dbgfs_ops);
1828#endif 1828#endif
1829 } 1829 }
1830 1830
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 9446248eb6b8..99eab7bc7edc 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -60,7 +60,7 @@ static int eeh_result_priority(enum pci_ers_result result)
60 } 60 }
61}; 61};
62 62
63const char *pci_ers_result_name(enum pci_ers_result result) 63static const char *pci_ers_result_name(enum pci_ers_result result)
64{ 64{
65 switch (result) { 65 switch (result) {
66 case PCI_ERS_RESULT_NONE: 66 case PCI_ERS_RESULT_NONE:
diff --git a/arch/powerpc/kernel/eeh_event.c b/arch/powerpc/kernel/eeh_event.c
index 61c9356bf9c9..227e57f980df 100644
--- a/arch/powerpc/kernel/eeh_event.c
+++ b/arch/powerpc/kernel/eeh_event.c
@@ -35,7 +35,7 @@
35 */ 35 */
36 36
37static DEFINE_SPINLOCK(eeh_eventlist_lock); 37static DEFINE_SPINLOCK(eeh_eventlist_lock);
38static struct semaphore eeh_eventlist_sem; 38static DECLARE_COMPLETION(eeh_eventlist_event);
39static LIST_HEAD(eeh_eventlist); 39static LIST_HEAD(eeh_eventlist);
40 40
41/** 41/**
@@ -55,7 +55,7 @@ static int eeh_event_handler(void * dummy)
55 struct eeh_pe *pe; 55 struct eeh_pe *pe;
56 56
57 while (!kthread_should_stop()) { 57 while (!kthread_should_stop()) {
58 if (down_interruptible(&eeh_eventlist_sem)) 58 if (wait_for_completion_interruptible(&eeh_eventlist_event))
59 break; 59 break;
60 60
61 /* Fetch EEH event from the queue */ 61 /* Fetch EEH event from the queue */
@@ -102,9 +102,6 @@ int eeh_event_init(void)
102 struct task_struct *t; 102 struct task_struct *t;
103 int ret = 0; 103 int ret = 0;
104 104
105 /* Initialize semaphore */
106 sema_init(&eeh_eventlist_sem, 0);
107
108 t = kthread_run(eeh_event_handler, NULL, "eehd"); 105 t = kthread_run(eeh_event_handler, NULL, "eehd");
109 if (IS_ERR(t)) { 106 if (IS_ERR(t)) {
110 ret = PTR_ERR(t); 107 ret = PTR_ERR(t);
@@ -142,7 +139,7 @@ int eeh_send_failure_event(struct eeh_pe *pe)
142 spin_unlock_irqrestore(&eeh_eventlist_lock, flags); 139 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
143 140
144 /* For EEH deamon to knick in */ 141 /* For EEH deamon to knick in */
145 up(&eeh_eventlist_sem); 142 complete(&eeh_eventlist_event);
146 143
147 return 0; 144 return 0;
148} 145}
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 77decded1175..0768dfd8a64e 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -200,14 +200,14 @@ transfer_to_handler:
200 cmplw r1,r9 /* if r1 <= ksp_limit */ 200 cmplw r1,r9 /* if r1 <= ksp_limit */
201 ble- stack_ovf /* then the kernel stack overflowed */ 201 ble- stack_ovf /* then the kernel stack overflowed */
2025: 2025:
203#if defined(CONFIG_6xx) || defined(CONFIG_E500) 203#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
204 CURRENT_THREAD_INFO(r9, r1) 204 CURRENT_THREAD_INFO(r9, r1)
205 tophys(r9,r9) /* check local flags */ 205 tophys(r9,r9) /* check local flags */
206 lwz r12,TI_LOCAL_FLAGS(r9) 206 lwz r12,TI_LOCAL_FLAGS(r9)
207 mtcrf 0x01,r12 207 mtcrf 0x01,r12
208 bt- 31-TLF_NAPPING,4f 208 bt- 31-TLF_NAPPING,4f
209 bt- 31-TLF_SLEEPING,7f 209 bt- 31-TLF_SLEEPING,7f
210#endif /* CONFIG_6xx || CONFIG_E500 */ 210#endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_E500 */
211 .globl transfer_to_handler_cont 211 .globl transfer_to_handler_cont
212transfer_to_handler_cont: 212transfer_to_handler_cont:
2133: 2133:
@@ -273,7 +273,7 @@ reenable_mmu: /* re-enable mmu so we can */
273 RFI /* jump to handler, enable MMU */ 273 RFI /* jump to handler, enable MMU */
274#endif /* CONFIG_TRACE_IRQFLAGS */ 274#endif /* CONFIG_TRACE_IRQFLAGS */
275 275
276#if defined (CONFIG_6xx) || defined(CONFIG_E500) 276#if defined (CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
2774: rlwinm r12,r12,0,~_TLF_NAPPING 2774: rlwinm r12,r12,0,~_TLF_NAPPING
278 stw r12,TI_LOCAL_FLAGS(r9) 278 stw r12,TI_LOCAL_FLAGS(r9)
279 b power_save_ppc32_restore 279 b power_save_ppc32_restore
@@ -612,7 +612,7 @@ ppc_swapcontext:
612handle_page_fault: 612handle_page_fault:
613 stw r4,_DAR(r1) 613 stw r4,_DAR(r1)
614 addi r3,r1,STACK_FRAME_OVERHEAD 614 addi r3,r1,STACK_FRAME_OVERHEAD
615#ifdef CONFIG_6xx 615#ifdef CONFIG_PPC_BOOK3S_32
616 andis. r0,r5,DSISR_DABRMATCH@h 616 andis. r0,r5,DSISR_DABRMATCH@h
617 bne- handle_dabr_fault 617 bne- handle_dabr_fault
618#endif 618#endif
@@ -629,7 +629,7 @@ handle_page_fault:
629 bl bad_page_fault 629 bl bad_page_fault
630 b ret_from_except_full 630 b ret_from_except_full
631 631
632#ifdef CONFIG_6xx 632#ifdef CONFIG_PPC_BOOK3S_32
633 /* We have a data breakpoint exception - handle it */ 633 /* We have a data breakpoint exception - handle it */
634handle_dabr_fault: 634handle_dabr_fault:
635 SAVE_NVGPRS(r1) 635 SAVE_NVGPRS(r1)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 7b1693adff2a..435927f549c4 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -54,6 +54,9 @@
54SYS_CALL_TABLE: 54SYS_CALL_TABLE:
55 .tc sys_call_table[TC],sys_call_table 55 .tc sys_call_table[TC],sys_call_table
56 56
57COMPAT_SYS_CALL_TABLE:
58 .tc compat_sys_call_table[TC],compat_sys_call_table
59
57/* This value is used to mark exception frames on the stack. */ 60/* This value is used to mark exception frames on the stack. */
58exception_marker: 61exception_marker:
59 .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER 62 .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
@@ -80,6 +83,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM)
80 std r0,GPR0(r1) 83 std r0,GPR0(r1)
81 std r10,GPR1(r1) 84 std r10,GPR1(r1)
82 beq 2f /* if from kernel mode */ 85 beq 2f /* if from kernel mode */
86#ifdef CONFIG_PPC_FSL_BOOK3E
87START_BTB_FLUSH_SECTION
88 BTB_FLUSH(r10)
89END_BTB_FLUSH_SECTION
90#endif
83 ACCOUNT_CPU_USER_ENTRY(r13, r10, r11) 91 ACCOUNT_CPU_USER_ENTRY(r13, r10, r11)
842: std r2,GPR2(r1) 922: std r2,GPR2(r1)
85 std r3,GPR3(r1) 93 std r3,GPR3(r1)
@@ -173,7 +181,7 @@ system_call: /* label this so stack traces look sane */
173 ld r11,SYS_CALL_TABLE@toc(2) 181 ld r11,SYS_CALL_TABLE@toc(2)
174 andis. r10,r10,_TIF_32BIT@h 182 andis. r10,r10,_TIF_32BIT@h
175 beq 15f 183 beq 15f
176 addi r11,r11,8 /* use 32-bit syscall entries */ 184 ld r11,COMPAT_SYS_CALL_TABLE@toc(2)
177 clrldi r3,r3,32 185 clrldi r3,r3,32
178 clrldi r4,r4,32 186 clrldi r4,r4,32
179 clrldi r5,r5,32 187 clrldi r5,r5,32
@@ -181,7 +189,7 @@ system_call: /* label this so stack traces look sane */
181 clrldi r7,r7,32 189 clrldi r7,r7,32
182 clrldi r8,r8,32 190 clrldi r8,r8,32
18315: 19115:
184 slwi r0,r0,4 192 slwi r0,r0,3
185 193
186 barrier_nospec_asm 194 barrier_nospec_asm
187 /* 195 /*
@@ -286,6 +294,10 @@ BEGIN_FTR_SECTION
286 HMT_MEDIUM_LOW 294 HMT_MEDIUM_LOW
287END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) 295END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
288 296
297#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
298 std r8, PACATMSCRATCH(r13)
299#endif
300
289 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */ 301 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
290 ld r2,GPR2(r1) 302 ld r2,GPR2(r1)
291 ld r1,GPR1(r1) 303 ld r1,GPR1(r1)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 6d6e144a28ce..afb638778f44 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -296,7 +296,8 @@ ret_from_mc_except:
296 andi. r10,r11,MSR_PR; /* save stack pointer */ \ 296 andi. r10,r11,MSR_PR; /* save stack pointer */ \
297 beq 1f; /* branch around if supervisor */ \ 297 beq 1f; /* branch around if supervisor */ \
298 ld r1,PACAKSAVE(r13); /* get kernel stack coming from usr */\ 298 ld r1,PACAKSAVE(r13); /* get kernel stack coming from usr */\
2991: cmpdi cr1,r1,0; /* check if SP makes sense */ \ 2991: type##_BTB_FLUSH \
300 cmpdi cr1,r1,0; /* check if SP makes sense */ \
300 bge- cr1,exc_##n##_bad_stack;/* bad stack (TODO: out of line) */ \ 301 bge- cr1,exc_##n##_bad_stack;/* bad stack (TODO: out of line) */ \
301 mfspr r10,SPRN_##type##_SRR0; /* read SRR0 before touching stack */ 302 mfspr r10,SPRN_##type##_SRR0; /* read SRR0 before touching stack */
302 303
@@ -328,6 +329,29 @@ ret_from_mc_except:
328#define SPRN_MC_SRR0 SPRN_MCSRR0 329#define SPRN_MC_SRR0 SPRN_MCSRR0
329#define SPRN_MC_SRR1 SPRN_MCSRR1 330#define SPRN_MC_SRR1 SPRN_MCSRR1
330 331
332#ifdef CONFIG_PPC_FSL_BOOK3E
333#define GEN_BTB_FLUSH \
334 START_BTB_FLUSH_SECTION \
335 beq 1f; \
336 BTB_FLUSH(r10) \
337 1: \
338 END_BTB_FLUSH_SECTION
339
340#define CRIT_BTB_FLUSH \
341 START_BTB_FLUSH_SECTION \
342 BTB_FLUSH(r10) \
343 END_BTB_FLUSH_SECTION
344
345#define DBG_BTB_FLUSH CRIT_BTB_FLUSH
346#define MC_BTB_FLUSH CRIT_BTB_FLUSH
347#define GDBELL_BTB_FLUSH GEN_BTB_FLUSH
348#else
349#define GEN_BTB_FLUSH
350#define CRIT_BTB_FLUSH
351#define DBG_BTB_FLUSH
352#define GDBELL_BTB_FLUSH
353#endif
354
331#define NORMAL_EXCEPTION_PROLOG(n, intnum, addition) \ 355#define NORMAL_EXCEPTION_PROLOG(n, intnum, addition) \
332 EXCEPTION_PROLOG(n, intnum, GEN, addition##_GEN(n)) 356 EXCEPTION_PROLOG(n, intnum, GEN, addition##_GEN(n))
333 357
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index db2691ff4c0b..9e253ce27e08 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1040,7 +1040,7 @@ TRAMP_REAL_BEGIN(hmi_exception_early)
1040 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) 1040 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1041 EXCEPTION_PROLOG_COMMON_3(0xe60) 1041 EXCEPTION_PROLOG_COMMON_3(0xe60)
1042 addi r3,r1,STACK_FRAME_OVERHEAD 1042 addi r3,r1,STACK_FRAME_OVERHEAD
1043 BRANCH_LINK_TO_FAR(hmi_exception_realmode) /* Function call ABI */ 1043 BRANCH_LINK_TO_FAR(DOTSYM(hmi_exception_realmode)) /* Function call ABI */
1044 cmpdi cr0,r3,0 1044 cmpdi cr0,r3,0
1045 1045
1046 /* Windup the stack. */ 1046 /* Windup the stack. */
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index 761b28b1427d..45a8d0be1c96 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -35,6 +35,7 @@
35#include <linux/kobject.h> 35#include <linux/kobject.h>
36#include <linux/sysfs.h> 36#include <linux/sysfs.h>
37#include <linux/slab.h> 37#include <linux/slab.h>
38#include <linux/cma.h>
38 39
39#include <asm/debugfs.h> 40#include <asm/debugfs.h>
40#include <asm/page.h> 41#include <asm/page.h>
@@ -46,6 +47,9 @@
46static struct fw_dump fw_dump; 47static struct fw_dump fw_dump;
47static struct fadump_mem_struct fdm; 48static struct fadump_mem_struct fdm;
48static const struct fadump_mem_struct *fdm_active; 49static const struct fadump_mem_struct *fdm_active;
50#ifdef CONFIG_CMA
51static struct cma *fadump_cma;
52#endif
49 53
50static DEFINE_MUTEX(fadump_mutex); 54static DEFINE_MUTEX(fadump_mutex);
51struct fad_crash_memory_ranges *crash_memory_ranges; 55struct fad_crash_memory_ranges *crash_memory_ranges;
@@ -53,6 +57,67 @@ int crash_memory_ranges_size;
53int crash_mem_ranges; 57int crash_mem_ranges;
54int max_crash_mem_ranges; 58int max_crash_mem_ranges;
55 59
60#ifdef CONFIG_CMA
61/*
62 * fadump_cma_init() - Initialize CMA area from a fadump reserved memory
63 *
64 * This function initializes CMA area from fadump reserved memory.
65 * The total size of fadump reserved memory covers for boot memory size
66 * + cpu data size + hpte size and metadata.
67 * Initialize only the area equivalent to boot memory size for CMA use.
68 * The reamining portion of fadump reserved memory will be not given
69 * to CMA and pages for thoes will stay reserved. boot memory size is
70 * aligned per CMA requirement to satisy cma_init_reserved_mem() call.
71 * But for some reason even if it fails we still have the memory reservation
72 * with us and we can still continue doing fadump.
73 */
74int __init fadump_cma_init(void)
75{
76 unsigned long long base, size;
77 int rc;
78
79 if (!fw_dump.fadump_enabled)
80 return 0;
81
82 /*
83 * Do not use CMA if user has provided fadump=nocma kernel parameter.
84 * Return 1 to continue with fadump old behaviour.
85 */
86 if (fw_dump.nocma)
87 return 1;
88
89 base = fw_dump.reserve_dump_area_start;
90 size = fw_dump.boot_memory_size;
91
92 if (!size)
93 return 0;
94
95 rc = cma_init_reserved_mem(base, size, 0, "fadump_cma", &fadump_cma);
96 if (rc) {
97 pr_err("Failed to init cma area for firmware-assisted dump,%d\n", rc);
98 /*
99 * Though the CMA init has failed we still have memory
100 * reservation with us. The reserved memory will be
101 * blocked from production system usage. Hence return 1,
102 * so that we can continue with fadump.
103 */
104 return 1;
105 }
106
107 /*
108 * So we now have successfully initialized cma area for fadump.
109 */
110 pr_info("Initialized 0x%lx bytes cma area at %ldMB from 0x%lx "
111 "bytes of memory reserved for firmware-assisted dump\n",
112 cma_get_size(fadump_cma),
113 (unsigned long)cma_get_base(fadump_cma) >> 20,
114 fw_dump.reserve_dump_area_size);
115 return 1;
116}
117#else
118static int __init fadump_cma_init(void) { return 1; }
119#endif /* CONFIG_CMA */
120
56/* Scan the Firmware Assisted dump configuration details. */ 121/* Scan the Firmware Assisted dump configuration details. */
57int __init early_init_dt_scan_fw_dump(unsigned long node, 122int __init early_init_dt_scan_fw_dump(unsigned long node,
58 const char *uname, int depth, void *data) 123 const char *uname, int depth, void *data)
@@ -118,13 +183,19 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
118 183
119/* 184/*
120 * If fadump is registered, check if the memory provided 185 * If fadump is registered, check if the memory provided
121 * falls within boot memory area. 186 * falls within boot memory area and reserved memory area.
122 */ 187 */
123int is_fadump_boot_memory_area(u64 addr, ulong size) 188int is_fadump_memory_area(u64 addr, ulong size)
124{ 189{
190 u64 d_start = fw_dump.reserve_dump_area_start;
191 u64 d_end = d_start + fw_dump.reserve_dump_area_size;
192
125 if (!fw_dump.dump_registered) 193 if (!fw_dump.dump_registered)
126 return 0; 194 return 0;
127 195
196 if (((addr + size) > d_start) && (addr <= d_end))
197 return 1;
198
128 return (addr + size) > RMA_START && addr <= fw_dump.boot_memory_size; 199 return (addr + size) > RMA_START && addr <= fw_dump.boot_memory_size;
129} 200}
130 201
@@ -172,6 +243,35 @@ static int is_boot_memory_area_contiguous(void)
172 return ret; 243 return ret;
173} 244}
174 245
246/*
247 * Returns true, if there are no holes in reserved memory area,
248 * false otherwise.
249 */
250static bool is_reserved_memory_area_contiguous(void)
251{
252 struct memblock_region *reg;
253 unsigned long start, end;
254 unsigned long d_start = fw_dump.reserve_dump_area_start;
255 unsigned long d_end = d_start + fw_dump.reserve_dump_area_size;
256
257 for_each_memblock(memory, reg) {
258 start = max(d_start, (unsigned long)reg->base);
259 end = min(d_end, (unsigned long)(reg->base + reg->size));
260 if (d_start < end) {
261 /* Memory hole from d_start to start */
262 if (start > d_start)
263 break;
264
265 if (end == d_end)
266 return true;
267
268 d_start = end + 1;
269 }
270 }
271
272 return false;
273}
274
175/* Print firmware assisted dump configurations for debugging purpose. */ 275/* Print firmware assisted dump configurations for debugging purpose. */
176static void fadump_show_config(void) 276static void fadump_show_config(void)
177{ 277{
@@ -378,8 +478,15 @@ int __init fadump_reserve_mem(void)
378 */ 478 */
379 if (fdm_active) 479 if (fdm_active)
380 fw_dump.boot_memory_size = be64_to_cpu(fdm_active->rmr_region.source_len); 480 fw_dump.boot_memory_size = be64_to_cpu(fdm_active->rmr_region.source_len);
381 else 481 else {
382 fw_dump.boot_memory_size = fadump_calculate_reserve_size(); 482 fw_dump.boot_memory_size = fadump_calculate_reserve_size();
483#ifdef CONFIG_CMA
484 if (!fw_dump.nocma)
485 fw_dump.boot_memory_size =
486 ALIGN(fw_dump.boot_memory_size,
487 FADUMP_CMA_ALIGNMENT);
488#endif
489 }
383 490
384 /* 491 /*
385 * Calculate the memory boundary. 492 * Calculate the memory boundary.
@@ -426,8 +533,9 @@ int __init fadump_reserve_mem(void)
426 fw_dump.fadumphdr_addr = 533 fw_dump.fadumphdr_addr =
427 be64_to_cpu(fdm_active->rmr_region.destination_address) + 534 be64_to_cpu(fdm_active->rmr_region.destination_address) +
428 be64_to_cpu(fdm_active->rmr_region.source_len); 535 be64_to_cpu(fdm_active->rmr_region.source_len);
429 pr_debug("fadumphdr_addr = %p\n", 536 pr_debug("fadumphdr_addr = %pa\n", &fw_dump.fadumphdr_addr);
430 (void *) fw_dump.fadumphdr_addr); 537 fw_dump.reserve_dump_area_start = base;
538 fw_dump.reserve_dump_area_size = size;
431 } else { 539 } else {
432 size = get_fadump_area_size(); 540 size = get_fadump_area_size();
433 541
@@ -455,10 +563,11 @@ int __init fadump_reserve_mem(void)
455 (unsigned long)(size >> 20), 563 (unsigned long)(size >> 20),
456 (unsigned long)(base >> 20), 564 (unsigned long)(base >> 20),
457 (unsigned long)(memblock_phys_mem_size() >> 20)); 565 (unsigned long)(memblock_phys_mem_size() >> 20));
458 }
459 566
460 fw_dump.reserve_dump_area_start = base; 567 fw_dump.reserve_dump_area_start = base;
461 fw_dump.reserve_dump_area_size = size; 568 fw_dump.reserve_dump_area_size = size;
569 return fadump_cma_init();
570 }
462 return 1; 571 return 1;
463} 572}
464 573
@@ -477,6 +586,10 @@ static int __init early_fadump_param(char *p)
477 fw_dump.fadump_enabled = 1; 586 fw_dump.fadump_enabled = 1;
478 else if (strncmp(p, "off", 3) == 0) 587 else if (strncmp(p, "off", 3) == 0)
479 fw_dump.fadump_enabled = 0; 588 fw_dump.fadump_enabled = 0;
589 else if (strncmp(p, "nocma", 5) == 0) {
590 fw_dump.fadump_enabled = 1;
591 fw_dump.nocma = 1;
592 }
480 593
481 return 0; 594 return 0;
482} 595}
@@ -525,8 +638,10 @@ static int register_fw_dump(struct fadump_mem_struct *fdm)
525 break; 638 break;
526 case -3: 639 case -3:
527 if (!is_boot_memory_area_contiguous()) 640 if (!is_boot_memory_area_contiguous())
528 pr_err("Can't have holes in boot memory area while " 641 pr_err("Can't have holes in boot memory area while registering fadump\n");
529 "registering fadump\n"); 642 else if (!is_reserved_memory_area_contiguous())
643 pr_err("Can't have holes in reserved memory area while"
644 " registering fadump\n");
530 645
531 printk(KERN_ERR "Failed to register firmware-assisted kernel" 646 printk(KERN_ERR "Failed to register firmware-assisted kernel"
532 " dump. Parameter Error(%d).\n", rc); 647 " dump. Parameter Error(%d).\n", rc);
@@ -1229,7 +1344,7 @@ static int fadump_unregister_dump(struct fadump_mem_struct *fdm)
1229 return 0; 1344 return 0;
1230} 1345}
1231 1346
1232static int fadump_invalidate_dump(struct fadump_mem_struct *fdm) 1347static int fadump_invalidate_dump(const struct fadump_mem_struct *fdm)
1233{ 1348{
1234 int rc = 0; 1349 int rc = 0;
1235 unsigned int wait_time; 1350 unsigned int wait_time;
@@ -1260,9 +1375,8 @@ void fadump_cleanup(void)
1260{ 1375{
1261 /* Invalidate the registration only if dump is active. */ 1376 /* Invalidate the registration only if dump is active. */
1262 if (fw_dump.dump_active) { 1377 if (fw_dump.dump_active) {
1263 init_fadump_mem_struct(&fdm, 1378 /* pass the same memory dump structure provided by platform */
1264 be64_to_cpu(fdm_active->cpu_state_data.destination_address)); 1379 fadump_invalidate_dump(fdm_active);
1265 fadump_invalidate_dump(&fdm);
1266 } else if (fw_dump.dump_registered) { 1380 } else if (fw_dump.dump_registered) {
1267 /* Un-register Firmware-assisted dump if it was registered. */ 1381 /* Un-register Firmware-assisted dump if it was registered. */
1268 fadump_unregister_dump(&fdm); 1382 fadump_unregister_dump(&fdm);
@@ -1531,17 +1645,7 @@ static struct kobj_attribute fadump_register_attr = __ATTR(fadump_registered,
1531 0644, fadump_register_show, 1645 0644, fadump_register_show,
1532 fadump_register_store); 1646 fadump_register_store);
1533 1647
1534static int fadump_region_open(struct inode *inode, struct file *file) 1648DEFINE_SHOW_ATTRIBUTE(fadump_region);
1535{
1536 return single_open(file, fadump_region_show, inode->i_private);
1537}
1538
1539static const struct file_operations fadump_region_fops = {
1540 .open = fadump_region_open,
1541 .read = seq_read,
1542 .llseek = seq_lseek,
1543 .release = single_release,
1544};
1545 1649
1546static void fadump_init_files(void) 1650static void fadump_init_files(void)
1547{ 1651{
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 61ca27929355..05b08db3901d 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -176,10 +176,10 @@ __after_mmu_off:
176 bl reloc_offset 176 bl reloc_offset
177 li r24,0 /* cpu# */ 177 li r24,0 /* cpu# */
178 bl call_setup_cpu /* Call setup_cpu for this CPU */ 178 bl call_setup_cpu /* Call setup_cpu for this CPU */
179#ifdef CONFIG_6xx 179#ifdef CONFIG_PPC_BOOK3S_32
180 bl reloc_offset 180 bl reloc_offset
181 bl init_idle_6xx 181 bl init_idle_6xx
182#endif /* CONFIG_6xx */ 182#endif /* CONFIG_PPC_BOOK3S_32 */
183 183
184 184
185/* 185/*
@@ -393,7 +393,9 @@ DataAccess:
393 bne 1f /* if not, try to put a PTE */ 393 bne 1f /* if not, try to put a PTE */
394 mfspr r4,SPRN_DAR /* into the hash table */ 394 mfspr r4,SPRN_DAR /* into the hash table */
395 rlwinm r3,r10,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */ 395 rlwinm r3,r10,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */
396BEGIN_MMU_FTR_SECTION
396 bl hash_page 397 bl hash_page
398END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
3971: lwz r5,_DSISR(r11) /* get DSISR value */ 3991: lwz r5,_DSISR(r11) /* get DSISR value */
398 mfspr r4,SPRN_DAR 400 mfspr r4,SPRN_DAR
399 EXC_XFER_LITE(0x300, handle_page_fault) 401 EXC_XFER_LITE(0x300, handle_page_fault)
@@ -408,7 +410,9 @@ InstructionAccess:
408 beq 1f /* if so, try to put a PTE */ 410 beq 1f /* if so, try to put a PTE */
409 li r3,0 /* into the hash table */ 411 li r3,0 /* into the hash table */
410 mr r4,r12 /* SRR0 is fault address */ 412 mr r4,r12 /* SRR0 is fault address */
413BEGIN_MMU_FTR_SECTION
411 bl hash_page 414 bl hash_page
415END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
4121: mr r4,r12 4161: mr r4,r12
413 andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */ 417 andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
414 EXC_XFER_LITE(0x400, handle_page_fault) 418 EXC_XFER_LITE(0x400, handle_page_fault)
@@ -499,7 +503,7 @@ InstructionTLBMiss:
499 lis r1,PAGE_OFFSET@h /* check if kernel address */ 503 lis r1,PAGE_OFFSET@h /* check if kernel address */
500 cmplw 0,r1,r3 504 cmplw 0,r1,r3
501 mfspr r2,SPRN_SPRG_THREAD 505 mfspr r2,SPRN_SPRG_THREAD
502 li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ 506 li r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */
503 lwz r2,PGDIR(r2) 507 lwz r2,PGDIR(r2)
504 bge- 112f 508 bge- 112f
505 mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ 509 mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
@@ -836,10 +840,10 @@ __secondary_start:
836 lis r3,-KERNELBASE@h 840 lis r3,-KERNELBASE@h
837 mr r4,r24 841 mr r4,r24
838 bl call_setup_cpu /* Call setup_cpu for this CPU */ 842 bl call_setup_cpu /* Call setup_cpu for this CPU */
839#ifdef CONFIG_6xx 843#ifdef CONFIG_PPC_BOOK3S_32
840 lis r3,-KERNELBASE@h 844 lis r3,-KERNELBASE@h
841 bl init_idle_6xx 845 bl init_idle_6xx
842#endif /* CONFIG_6xx */ 846#endif /* CONFIG_PPC_BOOK3S_32 */
843 847
844 /* get current_thread_info and current */ 848 /* get current_thread_info and current */
845 lis r1,secondary_ti@ha 849 lis r1,secondary_ti@ha
@@ -880,14 +884,14 @@ __secondary_start:
880 884
881/* 885/*
882 * Those generic dummy functions are kept for CPUs not 886 * Those generic dummy functions are kept for CPUs not
883 * included in CONFIG_6xx 887 * included in CONFIG_PPC_BOOK3S_32
884 */ 888 */
885#if !defined(CONFIG_6xx) 889#if !defined(CONFIG_PPC_BOOK3S_32)
886_ENTRY(__save_cpu_setup) 890_ENTRY(__save_cpu_setup)
887 blr 891 blr
888_ENTRY(__restore_cpu_setup) 892_ENTRY(__restore_cpu_setup)
889 blr 893 blr
890#endif /* !defined(CONFIG_6xx) */ 894#endif /* !defined(CONFIG_PPC_BOOK3S_32) */
891 895
892 896
893/* 897/*
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 37e4a7cf0065..bf23c19c92d6 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -40,6 +40,7 @@
40#include <asm/ptrace.h> 40#include <asm/ptrace.h>
41#include <asm/synch.h> 41#include <asm/synch.h>
42#include <asm/export.h> 42#include <asm/export.h>
43#include <asm/code-patching-asm.h>
43#include "head_booke.h" 44#include "head_booke.h"
44 45
45 46
@@ -382,10 +383,9 @@ interrupt_base:
382 /* Increment, rollover, and store TLB index */ 383 /* Increment, rollover, and store TLB index */
383 addi r13,r13,1 384 addi r13,r13,1
384 385
386 patch_site 0f, patch__tlb_44x_hwater_D
385 /* Compare with watermark (instruction gets patched) */ 387 /* Compare with watermark (instruction gets patched) */
386 .globl tlb_44x_patch_hwater_D 3880: cmpwi 0,r13,1 /* reserve entries */
387tlb_44x_patch_hwater_D:
388 cmpwi 0,r13,1 /* reserve entries */
389 ble 5f 389 ble 5f
390 li r13,0 390 li r13,0
3915: 3915:
@@ -478,10 +478,9 @@ tlb_44x_patch_hwater_D:
478 /* Increment, rollover, and store TLB index */ 478 /* Increment, rollover, and store TLB index */
479 addi r13,r13,1 479 addi r13,r13,1
480 480
481 patch_site 0f, patch__tlb_44x_hwater_I
481 /* Compare with watermark (instruction gets patched) */ 482 /* Compare with watermark (instruction gets patched) */
482 .globl tlb_44x_patch_hwater_I 4830: cmpwi 0,r13,1 /* reserve entries */
483tlb_44x_patch_hwater_I:
484 cmpwi 0,r13,1 /* reserve entries */
485 ble 5f 484 ble 5f
486 li r13,0 485 li r13,0
4875: 4865:
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 3b67b9533c82..57deb1e9ffea 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -106,6 +106,23 @@ turn_on_mmu:
106 mtspr SPRN_SRR0,r0 106 mtspr SPRN_SRR0,r0
107 rfi /* enables MMU */ 107 rfi /* enables MMU */
108 108
109
110#ifdef CONFIG_PERF_EVENTS
111 .align 4
112
113 .globl itlb_miss_counter
114itlb_miss_counter:
115 .space 4
116
117 .globl dtlb_miss_counter
118dtlb_miss_counter:
119 .space 4
120
121 .globl instruction_counter
122instruction_counter:
123 .space 4
124#endif
125
109/* 126/*
110 * Exception entry code. This code runs with address translation 127 * Exception entry code. This code runs with address translation
111 * turned off, i.e. using physical addresses. 128 * turned off, i.e. using physical addresses.
@@ -149,6 +166,9 @@ turn_on_mmu:
149 li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \ 166 li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
150 mtmsr r10; \ 167 mtmsr r10; \
151 stw r0,GPR0(r11); \ 168 stw r0,GPR0(r11); \
169 lis r10, STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */ \
170 addi r10, r10, STACK_FRAME_REGS_MARKER@l; \
171 stw r10, 8(r11); \
152 SAVE_4GPRS(3, r11); \ 172 SAVE_4GPRS(3, r11); \
153 SAVE_2GPRS(7, r11) 173 SAVE_2GPRS(7, r11)
154 174
@@ -275,7 +295,7 @@ SystemCall:
275 . = 0x1100 295 . = 0x1100
276/* 296/*
277 * For the MPC8xx, this is a software tablewalk to load the instruction 297 * For the MPC8xx, this is a software tablewalk to load the instruction
278 * TLB. The task switch loads the M_TW register with the pointer to the first 298 * TLB. The task switch loads the M_TWB register with the pointer to the first
279 * level table. 299 * level table.
280 * If we discover there is no second level table (value is zero) or if there 300 * If we discover there is no second level table (value is zero) or if there
281 * is an invalid pte, we load that into the TLB, which causes another fault 301 * is an invalid pte, we load that into the TLB, which causes another fault
@@ -285,186 +305,154 @@ SystemCall:
285 */ 305 */
286 306
287#ifdef CONFIG_8xx_CPU15 307#ifdef CONFIG_8xx_CPU15
288#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr) \ 308#define INVALIDATE_ADJACENT_PAGES_CPU15(addr) \
289 addi tmp, addr, PAGE_SIZE; \ 309 addi addr, addr, PAGE_SIZE; \
290 tlbie tmp; \ 310 tlbie addr; \
291 addi tmp, addr, -PAGE_SIZE; \ 311 addi addr, addr, -(PAGE_SIZE << 1); \
292 tlbie tmp 312 tlbie addr; \
313 addi addr, addr, PAGE_SIZE
293#else 314#else
294#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr) 315#define INVALIDATE_ADJACENT_PAGES_CPU15(addr)
295#endif 316#endif
296 317
297InstructionTLBMiss: 318InstructionTLBMiss:
298 mtspr SPRN_SPRG_SCRATCH0, r10 319 mtspr SPRN_SPRG_SCRATCH0, r10
320#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
299 mtspr SPRN_SPRG_SCRATCH1, r11 321 mtspr SPRN_SPRG_SCRATCH1, r11
300#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
301 mtspr SPRN_SPRG_SCRATCH2, r12
302#endif 322#endif
303 323
304 /* If we are faulting a kernel address, we have to use the 324 /* If we are faulting a kernel address, we have to use the
305 * kernel page tables. 325 * kernel page tables.
306 */ 326 */
307 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ 327 mfspr r10, SPRN_SRR0 /* Get effective address of fault */
308 INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10) 328 INVALIDATE_ADJACENT_PAGES_CPU15(r10)
329 mtspr SPRN_MD_EPN, r10
309 /* Only modules will cause ITLB Misses as we always 330 /* Only modules will cause ITLB Misses as we always
310 * pin the first 8MB of kernel memory */ 331 * pin the first 8MB of kernel memory */
311#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
312 mfcr r12
313#endif
314#ifdef ITLB_MISS_KERNEL 332#ifdef ITLB_MISS_KERNEL
333 mfcr r11
315#if defined(SIMPLE_KERNEL_ADDRESS) && defined(CONFIG_PIN_TLB_TEXT) 334#if defined(SIMPLE_KERNEL_ADDRESS) && defined(CONFIG_PIN_TLB_TEXT)
316 andis. r11, r10, 0x8000 /* Address >= 0x80000000 */ 335 cmpi cr0, r10, 0 /* Address >= 0x80000000 */
317#else 336#else
318 rlwinm r11, r10, 16, 0xfff8 337 rlwinm r10, r10, 16, 0xfff8
319 cmpli cr0, r11, PAGE_OFFSET@h 338 cmpli cr0, r10, PAGE_OFFSET@h
320#ifndef CONFIG_PIN_TLB_TEXT 339#ifndef CONFIG_PIN_TLB_TEXT
321 /* It is assumed that kernel code fits into the first 8M page */ 340 /* It is assumed that kernel code fits into the first 8M page */
3220: cmpli cr7, r11, (PAGE_OFFSET + 0x0800000)@h 3410: cmpli cr7, r10, (PAGE_OFFSET + 0x0800000)@h
323 patch_site 0b, patch__itlbmiss_linmem_top 342 patch_site 0b, patch__itlbmiss_linmem_top
324#endif 343#endif
325#endif 344#endif
326#endif 345#endif
327 mfspr r11, SPRN_M_TW /* Get level 1 table */ 346 mfspr r10, SPRN_M_TWB /* Get level 1 table */
328#ifdef ITLB_MISS_KERNEL 347#ifdef ITLB_MISS_KERNEL
329#if defined(SIMPLE_KERNEL_ADDRESS) && defined(CONFIG_PIN_TLB_TEXT) 348#if defined(SIMPLE_KERNEL_ADDRESS) && defined(CONFIG_PIN_TLB_TEXT)
330 beq+ 3f 349 bge+ 3f
331#else 350#else
332 blt+ 3f 351 blt+ 3f
333#endif 352#endif
334#ifndef CONFIG_PIN_TLB_TEXT 353#ifndef CONFIG_PIN_TLB_TEXT
335 blt cr7, ITLBMissLinear 354 blt cr7, ITLBMissLinear
336#endif 355#endif
337 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 356 rlwinm r10, r10, 0, 20, 31
357 oris r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
3383: 3583:
339#endif 359#endif
340 /* Insert level 1 index */ 360 lwz r10, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */
341 rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 361 mtspr SPRN_MI_TWC, r10 /* Set segment attributes */
342 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
343 362
344 /* Extract level 2 index */ 363 mtspr SPRN_MD_TWC, r10
345 rlwinm r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 364 mfspr r10, SPRN_MD_TWC
346#ifdef CONFIG_HUGETLB_PAGE
347 mtcr r11
348 bt- 28, 10f /* bit 28 = Large page (8M) */
349 bt- 29, 20f /* bit 29 = Large page (8M or 512k) */
350#endif
351 rlwimi r10, r11, 0, 0, 32 - PAGE_SHIFT - 1 /* Add level 2 base */
352 lwz r10, 0(r10) /* Get the pte */ 365 lwz r10, 0(r10) /* Get the pte */
3534: 366#ifdef ITLB_MISS_KERNEL
354#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE) 367 mtcr r11
355 mtcr r12
356#endif 368#endif
357 /* Load the MI_TWC with the attributes for this "segment." */
358 mtspr SPRN_MI_TWC, r11 /* Set segment attributes */
359
360#ifdef CONFIG_SWAP 369#ifdef CONFIG_SWAP
361 rlwinm r11, r10, 32-5, _PAGE_PRESENT 370 rlwinm r11, r10, 32-5, _PAGE_PRESENT
362 and r11, r11, r10 371 and r11, r11, r10
363 rlwimi r10, r11, 0, _PAGE_PRESENT 372 rlwimi r10, r11, 0, _PAGE_PRESENT
364#endif 373#endif
365 li r11, RPN_PATTERN | 0x200
366 /* The Linux PTE won't go exactly into the MMU TLB. 374 /* The Linux PTE won't go exactly into the MMU TLB.
367 * Software indicator bits 20 and 23 must be clear. 375 * Software indicator bits 20 and 23 must be clear.
368 * Software indicator bits 22, 24, 25, 26, and 27 must be 376 * Software indicator bits 22, 24, 25, 26, and 27 must be
369 * set. All other Linux PTE bits control the behavior 377 * set. All other Linux PTE bits control the behavior
370 * of the MMU. 378 * of the MMU.
371 */ 379 */
372 rlwimi r11, r10, 4, 0x0400 /* Copy _PAGE_EXEC into bit 21 */ 380 rlwimi r10, r10, 0, 0x0f00 /* Clear bits 20-23 */
373 rlwimi r10, r11, 0, 0x0ff0 /* Set 22, 24-27, clear 20,23 */ 381 rlwimi r10, r10, 4, 0x0400 /* Copy _PAGE_EXEC into bit 21 */
382 ori r10, r10, RPN_PATTERN | 0x200 /* Set 22 and 24-27 */
374 mtspr SPRN_MI_RPN, r10 /* Update TLB entry */ 383 mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
375 384
376 /* Restore registers */ 385 /* Restore registers */
3770: mfspr r10, SPRN_SPRG_SCRATCH0 3860: mfspr r10, SPRN_SPRG_SCRATCH0
387#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
378 mfspr r11, SPRN_SPRG_SCRATCH1 388 mfspr r11, SPRN_SPRG_SCRATCH1
379#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
380 mfspr r12, SPRN_SPRG_SCRATCH2
381#endif 389#endif
382 rfi 390 rfi
383 patch_site 0b, patch__itlbmiss_exit_1 391 patch_site 0b, patch__itlbmiss_exit_1
384 392
385#ifdef CONFIG_PERF_EVENTS 393#ifdef CONFIG_PERF_EVENTS
386 patch_site 0f, patch__itlbmiss_perf 394 patch_site 0f, patch__itlbmiss_perf
3870: lis r10, (itlb_miss_counter - PAGE_OFFSET)@ha 3950: lwz r10, (itlb_miss_counter - PAGE_OFFSET)@l(0)
388 lwz r11, (itlb_miss_counter - PAGE_OFFSET)@l(r10) 396 addi r10, r10, 1
389 addi r11, r11, 1 397 stw r10, (itlb_miss_counter - PAGE_OFFSET)@l(0)
390 stw r11, (itlb_miss_counter - PAGE_OFFSET)@l(r10)
391#endif
392 mfspr r10, SPRN_SPRG_SCRATCH0 398 mfspr r10, SPRN_SPRG_SCRATCH0
399#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
393 mfspr r11, SPRN_SPRG_SCRATCH1 400 mfspr r11, SPRN_SPRG_SCRATCH1
394#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
395 mfspr r12, SPRN_SPRG_SCRATCH2
396#endif 401#endif
397 rfi 402 rfi
398
399#ifdef CONFIG_HUGETLB_PAGE
40010: /* 8M pages */
401#ifdef CONFIG_PPC_16K_PAGES
402 /* Extract level 2 index */
403 rlwinm r10, r10, 32 - (PAGE_SHIFT_8M - PAGE_SHIFT), 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1), 29
404 /* Add level 2 base */
405 rlwimi r10, r11, 0, 0, 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1) - 1
406#else
407 /* Level 2 base */
408 rlwinm r10, r11, 0, ~HUGEPD_SHIFT_MASK
409#endif 403#endif
410 lwz r10, 0(r10) /* Get the pte */
411 b 4b
412 404
41320: /* 512k pages */ 405#ifndef CONFIG_PIN_TLB_TEXT
414 /* Extract level 2 index */ 406ITLBMissLinear:
415 rlwinm r10, r10, 32 - (PAGE_SHIFT_512K - PAGE_SHIFT), 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1), 29 407 mtcr r11
416 /* Add level 2 base */ 408 /* Set 8M byte page and mark it valid */
417 rlwimi r10, r11, 0, 0, 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1) - 1 409 li r11, MI_PS8MEG | MI_SVALID
418 lwz r10, 0(r10) /* Get the pte */ 410 mtspr SPRN_MI_TWC, r11
419 b 4b 411 rlwinm r10, r10, 20, 0x0f800000 /* 8xx supports max 256Mb RAM */
412 ori r10, r10, 0xf0 | MI_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
413 _PAGE_PRESENT
414 mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
415
4160: mfspr r10, SPRN_SPRG_SCRATCH0
417 mfspr r11, SPRN_SPRG_SCRATCH1
418 rfi
419 patch_site 0b, patch__itlbmiss_exit_2
420#endif 420#endif
421 421
422 . = 0x1200 422 . = 0x1200
423DataStoreTLBMiss: 423DataStoreTLBMiss:
424 mtspr SPRN_SPRG_SCRATCH0, r10 424 mtspr SPRN_SPRG_SCRATCH0, r10
425 mtspr SPRN_SPRG_SCRATCH1, r11 425 mtspr SPRN_SPRG_SCRATCH1, r11
426 mtspr SPRN_SPRG_SCRATCH2, r12 426 mfcr r11
427 mfcr r12
428 427
429 /* If we are faulting a kernel address, we have to use the 428 /* If we are faulting a kernel address, we have to use the
430 * kernel page tables. 429 * kernel page tables.
431 */ 430 */
432 mfspr r10, SPRN_MD_EPN 431 mfspr r10, SPRN_MD_EPN
433 rlwinm r11, r10, 16, 0xfff8 432 rlwinm r10, r10, 16, 0xfff8
434 cmpli cr0, r11, PAGE_OFFSET@h 433 cmpli cr0, r10, PAGE_OFFSET@h
435 mfspr r11, SPRN_M_TW /* Get level 1 table */
436 blt+ 3f
437 rlwinm r11, r10, 16, 0xfff8
438#ifndef CONFIG_PIN_TLB_IMMR 434#ifndef CONFIG_PIN_TLB_IMMR
439 cmpli cr0, r11, VIRT_IMMR_BASE@h 435 cmpli cr6, r10, VIRT_IMMR_BASE@h
440#endif 436#endif
4410: cmpli cr7, r11, (PAGE_OFFSET + 0x1800000)@h 4370: cmpli cr7, r10, (PAGE_OFFSET + 0x1800000)@h
442 patch_site 0b, patch__dtlbmiss_linmem_top 438 patch_site 0b, patch__dtlbmiss_linmem_top
439
440 mfspr r10, SPRN_M_TWB /* Get level 1 table */
441 blt+ 3f
443#ifndef CONFIG_PIN_TLB_IMMR 442#ifndef CONFIG_PIN_TLB_IMMR
4440: beq- DTLBMissIMMR 4430: beq- cr6, DTLBMissIMMR
445 patch_site 0b, patch__dtlbmiss_immr_jmp 444 patch_site 0b, patch__dtlbmiss_immr_jmp
446#endif 445#endif
447 blt cr7, DTLBMissLinear 446 blt cr7, DTLBMissLinear
448 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 447 rlwinm r10, r10, 0, 20, 31
448 oris r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
4493: 4493:
450
451 /* Insert level 1 index */
452 rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
453 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
454
455 /* We have a pte table, so load fetch the pte from the table.
456 */
457 /* Extract level 2 index */
458 rlwinm r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
459#ifdef CONFIG_HUGETLB_PAGE
460 mtcr r11 450 mtcr r11
461 bt- 28, 10f /* bit 28 = Large page (8M) */ 451 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */
462 bt- 29, 20f /* bit 29 = Large page (8M or 512k) */ 452
463#endif 453 mtspr SPRN_MD_TWC, r11
464 rlwimi r10, r11, 0, 0, 32 - PAGE_SHIFT - 1 /* Add level 2 base */ 454 mfspr r10, SPRN_MD_TWC
465 lwz r10, 0(r10) /* Get the pte */ 455 lwz r10, 0(r10) /* Get the pte */
4664:
467 mtcr r12
468 456
469 /* Insert the Guarded flag into the TWC from the Linux PTE. 457 /* Insert the Guarded flag into the TWC from the Linux PTE.
470 * It is bit 27 of both the Linux PTE and the TWC (at least 458 * It is bit 27 of both the Linux PTE and the TWC (at least
@@ -503,44 +491,55 @@ DataStoreTLBMiss:
503 491
5040: mfspr r10, SPRN_SPRG_SCRATCH0 4920: mfspr r10, SPRN_SPRG_SCRATCH0
505 mfspr r11, SPRN_SPRG_SCRATCH1 493 mfspr r11, SPRN_SPRG_SCRATCH1
506 mfspr r12, SPRN_SPRG_SCRATCH2
507 rfi 494 rfi
508 patch_site 0b, patch__dtlbmiss_exit_1 495 patch_site 0b, patch__dtlbmiss_exit_1
509 496
510#ifdef CONFIG_PERF_EVENTS 497#ifdef CONFIG_PERF_EVENTS
511 patch_site 0f, patch__dtlbmiss_perf 498 patch_site 0f, patch__dtlbmiss_perf
5120: lis r10, (dtlb_miss_counter - PAGE_OFFSET)@ha 4990: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)
513 lwz r11, (dtlb_miss_counter - PAGE_OFFSET)@l(r10) 500 addi r10, r10, 1
514 addi r11, r11, 1 501 stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)
515 stw r11, (dtlb_miss_counter - PAGE_OFFSET)@l(r10)
516#endif
517 mfspr r10, SPRN_SPRG_SCRATCH0 502 mfspr r10, SPRN_SPRG_SCRATCH0
518 mfspr r11, SPRN_SPRG_SCRATCH1 503 mfspr r11, SPRN_SPRG_SCRATCH1
519 mfspr r12, SPRN_SPRG_SCRATCH2
520 rfi 504 rfi
521
522#ifdef CONFIG_HUGETLB_PAGE
52310: /* 8M pages */
524 /* Extract level 2 index */
525#ifdef CONFIG_PPC_16K_PAGES
526 rlwinm r10, r10, 32 - (PAGE_SHIFT_8M - PAGE_SHIFT), 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1), 29
527 /* Add level 2 base */
528 rlwimi r10, r11, 0, 0, 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1) - 1
529#else
530 /* Level 2 base */
531 rlwinm r10, r11, 0, ~HUGEPD_SHIFT_MASK
532#endif 505#endif
533 lwz r10, 0(r10) /* Get the pte */
534 b 4b
535 506
53620: /* 512k pages */ 507DTLBMissIMMR:
537 /* Extract level 2 index */ 508 mtcr r11
538 rlwinm r10, r10, 32 - (PAGE_SHIFT_512K - PAGE_SHIFT), 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1), 29 509 /* Set 512k byte guarded page and mark it valid */
539 /* Add level 2 base */ 510 li r10, MD_PS512K | MD_GUARDED | MD_SVALID
540 rlwimi r10, r11, 0, 0, 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1) - 1 511 mtspr SPRN_MD_TWC, r10
541 lwz r10, 0(r10) /* Get the pte */ 512 mfspr r10, SPRN_IMMR /* Get current IMMR */
542 b 4b 513 rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */
543#endif 514 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
515 _PAGE_PRESENT | _PAGE_NO_CACHE
516 mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
517
518 li r11, RPN_PATTERN
519 mtspr SPRN_DAR, r11 /* Tag DAR */
520
5210: mfspr r10, SPRN_SPRG_SCRATCH0
522 mfspr r11, SPRN_SPRG_SCRATCH1
523 rfi
524 patch_site 0b, patch__dtlbmiss_exit_2
525
526DTLBMissLinear:
527 mtcr r11
528 /* Set 8M byte page and mark it valid */
529 li r11, MD_PS8MEG | MD_SVALID
530 mtspr SPRN_MD_TWC, r11
531 rlwinm r10, r10, 20, 0x0f800000 /* 8xx supports max 256Mb RAM */
532 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
533 _PAGE_PRESENT
534 mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
535
536 li r11, RPN_PATTERN
537 mtspr SPRN_DAR, r11 /* Tag DAR */
538
5390: mfspr r10, SPRN_SPRG_SCRATCH0
540 mfspr r11, SPRN_SPRG_SCRATCH1
541 rfi
542 patch_site 0b, patch__dtlbmiss_exit_3
544 543
545/* This is an instruction TLB error on the MPC8xx. This could be due 544/* This is an instruction TLB error on the MPC8xx. This could be due
546 * to many reasons, such as executing guarded memory or illegal instruction 545 * to many reasons, such as executing guarded memory or illegal instruction
@@ -625,16 +624,13 @@ DataBreakpoint:
625 . = 0x1d00 624 . = 0x1d00
626InstructionBreakpoint: 625InstructionBreakpoint:
627 mtspr SPRN_SPRG_SCRATCH0, r10 626 mtspr SPRN_SPRG_SCRATCH0, r10
628 mtspr SPRN_SPRG_SCRATCH1, r11 627 lwz r10, (instruction_counter - PAGE_OFFSET)@l(0)
629 lis r10, (instruction_counter - PAGE_OFFSET)@ha 628 addi r10, r10, -1
630 lwz r11, (instruction_counter - PAGE_OFFSET)@l(r10) 629 stw r10, (instruction_counter - PAGE_OFFSET)@l(0)
631 addi r11, r11, -1
632 stw r11, (instruction_counter - PAGE_OFFSET)@l(r10)
633 lis r10, 0xffff 630 lis r10, 0xffff
634 ori r10, r10, 0x01 631 ori r10, r10, 0x01
635 mtspr SPRN_COUNTA, r10 632 mtspr SPRN_COUNTA, r10
636 mfspr r10, SPRN_SPRG_SCRATCH0 633 mfspr r10, SPRN_SPRG_SCRATCH0
637 mfspr r11, SPRN_SPRG_SCRATCH1
638 rfi 634 rfi
639#else 635#else
640 EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE) 636 EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
@@ -644,67 +640,6 @@ InstructionBreakpoint:
644 640
645 . = 0x2000 641 . = 0x2000
646 642
647/*
648 * Bottom part of DataStoreTLBMiss handlers for IMMR area and linear RAM.
649 * not enough space in the DataStoreTLBMiss area.
650 */
651DTLBMissIMMR:
652 mtcr r12
653 /* Set 512k byte guarded page and mark it valid */
654 li r10, MD_PS512K | MD_GUARDED | MD_SVALID
655 mtspr SPRN_MD_TWC, r10
656 mfspr r10, SPRN_IMMR /* Get current IMMR */
657 rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */
658 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
659 _PAGE_PRESENT | _PAGE_NO_CACHE
660 mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
661
662 li r11, RPN_PATTERN
663 mtspr SPRN_DAR, r11 /* Tag DAR */
664
6650: mfspr r10, SPRN_SPRG_SCRATCH0
666 mfspr r11, SPRN_SPRG_SCRATCH1
667 mfspr r12, SPRN_SPRG_SCRATCH2
668 rfi
669 patch_site 0b, patch__dtlbmiss_exit_2
670
671DTLBMissLinear:
672 mtcr r12
673 /* Set 8M byte page and mark it valid */
674 li r11, MD_PS8MEG | MD_SVALID
675 mtspr SPRN_MD_TWC, r11
676 rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
677 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
678 _PAGE_PRESENT
679 mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
680
681 li r11, RPN_PATTERN
682 mtspr SPRN_DAR, r11 /* Tag DAR */
683
6840: mfspr r10, SPRN_SPRG_SCRATCH0
685 mfspr r11, SPRN_SPRG_SCRATCH1
686 mfspr r12, SPRN_SPRG_SCRATCH2
687 rfi
688 patch_site 0b, patch__dtlbmiss_exit_3
689
690#ifndef CONFIG_PIN_TLB_TEXT
691ITLBMissLinear:
692 mtcr r12
693 /* Set 8M byte page and mark it valid */
694 li r11, MI_PS8MEG | MI_SVALID
695 mtspr SPRN_MI_TWC, r11
696 rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
697 ori r10, r10, 0xf0 | MI_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
698 _PAGE_PRESENT
699 mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
700
7010: mfspr r10, SPRN_SPRG_SCRATCH0
702 mfspr r11, SPRN_SPRG_SCRATCH1
703 mfspr r12, SPRN_SPRG_SCRATCH2
704 rfi
705 patch_site 0b, patch__itlbmiss_exit_2
706#endif
707
708/* This is the procedure to calculate the data EA for buggy dcbx,dcbi instructions 643/* This is the procedure to calculate the data EA for buggy dcbx,dcbi instructions
709 * by decoding the registers used by the dcbx instruction and adding them. 644 * by decoding the registers used by the dcbx instruction and adding them.
710 * DAR is set to the calculated address. 645 * DAR is set to the calculated address.
@@ -712,12 +647,13 @@ ITLBMissLinear:
712 /* define if you don't want to use self modifying code */ 647 /* define if you don't want to use self modifying code */
713#define NO_SELF_MODIFYING_CODE 648#define NO_SELF_MODIFYING_CODE
714FixupDAR:/* Entry point for dcbx workaround. */ 649FixupDAR:/* Entry point for dcbx workaround. */
715 mtspr SPRN_SPRG_SCRATCH2, r10 650 mtspr SPRN_M_TW, r10
716 /* fetch instruction from memory. */ 651 /* fetch instruction from memory. */
717 mfspr r10, SPRN_SRR0 652 mfspr r10, SPRN_SRR0
653 mtspr SPRN_MD_EPN, r10
718 rlwinm r11, r10, 16, 0xfff8 654 rlwinm r11, r10, 16, 0xfff8
719 cmpli cr0, r11, PAGE_OFFSET@h 655 cmpli cr0, r11, PAGE_OFFSET@h
720 mfspr r11, SPRN_M_TW /* Get level 1 table */ 656 mfspr r11, SPRN_M_TWB /* Get level 1 table */
721 blt+ 3f 657 blt+ 3f
722 rlwinm r11, r10, 16, 0xfff8 658 rlwinm r11, r10, 16, 0xfff8
723 659
@@ -727,17 +663,17 @@ FixupDAR:/* Entry point for dcbx workaround. */
727 /* create physical page address from effective address */ 663 /* create physical page address from effective address */
728 tophys(r11, r10) 664 tophys(r11, r10)
729 blt- cr7, 201f 665 blt- cr7, 201f
730 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 666 mfspr r11, SPRN_M_TWB /* Get level 1 table */
731 /* Insert level 1 index */ 667 rlwinm r11, r11, 0, 20, 31
7323: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 668 oris r11, r11, (swapper_pg_dir - PAGE_OFFSET)@ha
6693:
733 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ 670 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
671 mtspr SPRN_MD_TWC, r11
734 mtcr r11 672 mtcr r11
673 mfspr r11, SPRN_MD_TWC
674 lwz r11, 0(r11) /* Get the pte */
735 bt 28,200f /* bit 28 = Large page (8M) */ 675 bt 28,200f /* bit 28 = Large page (8M) */
736 bt 29,202f /* bit 29 = Large page (8M or 512K) */ 676 bt 29,202f /* bit 29 = Large page (8M or 512K) */
737 rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */
738 /* Insert level 2 index */
739 rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
740 lwz r11, 0(r11) /* Get the pte */
741 /* concat physical page address(r11) and page offset(r10) */ 677 /* concat physical page address(r11) and page offset(r10) */
742 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31 678 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31
743201: lwz r11,0(r11) 679201: lwz r11,0(r11)
@@ -756,26 +692,15 @@ FixupDAR:/* Entry point for dcbx workaround. */
756 beq+ 142f 692 beq+ 142f
757 cmpwi cr0, r10, 1964 /* Is icbi? */ 693 cmpwi cr0, r10, 1964 /* Is icbi? */
758 beq+ 142f 694 beq+ 142f
759141: mfspr r10,SPRN_SPRG_SCRATCH2 695141: mfspr r10,SPRN_M_TW
760 b DARFixed /* Nope, go back to normal TLB processing */ 696 b DARFixed /* Nope, go back to normal TLB processing */
761 697
762 /* concat physical page address(r11) and page offset(r10) */
763200: 698200:
764#ifdef CONFIG_PPC_16K_PAGES
765 rlwinm r11, r11, 0, 0, 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1) - 1
766 rlwimi r11, r10, 32 - (PAGE_SHIFT_8M - 2), 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1), 29
767#else
768 rlwinm r11, r10, 0, ~HUGEPD_SHIFT_MASK
769#endif
770 lwz r11, 0(r11) /* Get the pte */
771 /* concat physical page address(r11) and page offset(r10) */ 699 /* concat physical page address(r11) and page offset(r10) */
772 rlwimi r11, r10, 0, 32 - PAGE_SHIFT_8M, 31 700 rlwimi r11, r10, 0, 32 - PAGE_SHIFT_8M, 31
773 b 201b 701 b 201b
774 702
775202: 703202:
776 rlwinm r11, r11, 0, 0, 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1) - 1
777 rlwimi r11, r10, 32 - (PAGE_SHIFT_512K - 2), 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1), 29
778 lwz r11, 0(r11) /* Get the pte */
779 /* concat physical page address(r11) and page offset(r10) */ 704 /* concat physical page address(r11) and page offset(r10) */
780 rlwimi r11, r10, 0, 32 - PAGE_SHIFT_512K, 31 705 rlwimi r11, r10, 0, 32 - PAGE_SHIFT_512K, 31
781 b 201b 706 b 201b
@@ -802,7 +727,7 @@ modified_instr:
802 bne+ 143f 727 bne+ 143f
803 subf r10,r0,r10 /* r10=r10-r0, only if reg RA is r0 */ 728 subf r10,r0,r10 /* r10=r10-r0, only if reg RA is r0 */
804143: mtdar r10 /* store faulting EA in DAR */ 729143: mtdar r10 /* store faulting EA in DAR */
805 mfspr r10,SPRN_SPRG_SCRATCH2 730 mfspr r10,SPRN_M_TW
806 b DARFixed /* Go back to normal TLB handling */ 731 b DARFixed /* Go back to normal TLB handling */
807#else 732#else
808 mfctr r10 733 mfctr r10
@@ -856,7 +781,7 @@ modified_instr:
856 mfdar r11 781 mfdar r11
857 mtctr r11 /* restore ctr reg from DAR */ 782 mtctr r11 /* restore ctr reg from DAR */
858 mtdar r10 /* save fault EA to DAR */ 783 mtdar r10 /* save fault EA to DAR */
859 mfspr r10,SPRN_SPRG_SCRATCH2 784 mfspr r10,SPRN_M_TW
860 b DARFixed /* Go back to normal TLB handling */ 785 b DARFixed /* Go back to normal TLB handling */
861 786
862 /* special handling for r10,r11 since these are modified already */ 787 /* special handling for r10,r11 since these are modified already */
@@ -891,7 +816,7 @@ start_here:
891 816
892 lis r6, swapper_pg_dir@ha 817 lis r6, swapper_pg_dir@ha
893 tophys(r6,r6) 818 tophys(r6,r6)
894 mtspr SPRN_M_TW, r6 819 mtspr SPRN_M_TWB, r6
895 820
896 bl early_init /* We have to do this with MMU on */ 821 bl early_init /* We have to do this with MMU on */
897 822
@@ -1065,17 +990,3 @@ swapper_pg_dir:
1065 */ 990 */
1066abatron_pteptrs: 991abatron_pteptrs:
1067 .space 8 992 .space 8
1068
1069#ifdef CONFIG_PERF_EVENTS
1070 .globl itlb_miss_counter
1071itlb_miss_counter:
1072 .space 4
1073
1074 .globl dtlb_miss_counter
1075dtlb_miss_counter:
1076 .space 4
1077
1078 .globl instruction_counter
1079instruction_counter:
1080 .space 4
1081#endif
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index d0862a100d29..15ac51072eb3 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -43,6 +43,9 @@
43 andi. r11, r11, MSR_PR; /* check whether user or kernel */\ 43 andi. r11, r11, MSR_PR; /* check whether user or kernel */\
44 mr r11, r1; \ 44 mr r11, r1; \
45 beq 1f; \ 45 beq 1f; \
46START_BTB_FLUSH_SECTION \
47 BTB_FLUSH(r11) \
48END_BTB_FLUSH_SECTION \
46 /* if from user, start at top of this thread's kernel stack */ \ 49 /* if from user, start at top of this thread's kernel stack */ \
47 lwz r11, THREAD_INFO-THREAD(r10); \ 50 lwz r11, THREAD_INFO-THREAD(r10); \
48 ALLOC_STACK_FRAME(r11, THREAD_SIZE); \ 51 ALLOC_STACK_FRAME(r11, THREAD_SIZE); \
@@ -128,6 +131,9 @@
128 stw r9,_CCR(r8); /* save CR on stack */\ 131 stw r9,_CCR(r8); /* save CR on stack */\
129 mfspr r11,exc_level_srr1; /* check whether user or kernel */\ 132 mfspr r11,exc_level_srr1; /* check whether user or kernel */\
130 DO_KVM BOOKE_INTERRUPT_##intno exc_level_srr1; \ 133 DO_KVM BOOKE_INTERRUPT_##intno exc_level_srr1; \
134START_BTB_FLUSH_SECTION \
135 BTB_FLUSH(r10) \
136END_BTB_FLUSH_SECTION \
131 andi. r11,r11,MSR_PR; \ 137 andi. r11,r11,MSR_PR; \
132 mfspr r11,SPRN_SPRG_THREAD; /* if from user, start at top of */\ 138 mfspr r11,SPRN_SPRG_THREAD; /* if from user, start at top of */\
133 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ 139 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index e2750b856c8f..2386ce2a9c6e 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -453,6 +453,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
453 mfcr r13 453 mfcr r13
454 stw r13, THREAD_NORMSAVE(3)(r10) 454 stw r13, THREAD_NORMSAVE(3)(r10)
455 DO_KVM BOOKE_INTERRUPT_DTLB_MISS SPRN_SRR1 455 DO_KVM BOOKE_INTERRUPT_DTLB_MISS SPRN_SRR1
456START_BTB_FLUSH_SECTION
457 mfspr r11, SPRN_SRR1
458 andi. r10,r11,MSR_PR
459 beq 1f
460 BTB_FLUSH(r10)
4611:
462END_BTB_FLUSH_SECTION
456 mfspr r10, SPRN_DEAR /* Get faulting address */ 463 mfspr r10, SPRN_DEAR /* Get faulting address */
457 464
458 /* If we are faulting a kernel address, we have to use the 465 /* If we are faulting a kernel address, we have to use the
@@ -547,6 +554,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
547 mfcr r13 554 mfcr r13
548 stw r13, THREAD_NORMSAVE(3)(r10) 555 stw r13, THREAD_NORMSAVE(3)(r10)
549 DO_KVM BOOKE_INTERRUPT_ITLB_MISS SPRN_SRR1 556 DO_KVM BOOKE_INTERRUPT_ITLB_MISS SPRN_SRR1
557START_BTB_FLUSH_SECTION
558 mfspr r11, SPRN_SRR1
559 andi. r10,r11,MSR_PR
560 beq 1f
561 BTB_FLUSH(r10)
5621:
563END_BTB_FLUSH_SECTION
564
550 mfspr r10, SPRN_SRR0 /* Get faulting address */ 565 mfspr r10, SPRN_SRR0 /* Get faulting address */
551 566
552 /* If we are faulting a kernel address, we have to use the 567 /* If we are faulting a kernel address, we have to use the
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index f0dc680e659a..9d5d109f15c0 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -47,6 +47,7 @@
47#include <asm/fadump.h> 47#include <asm/fadump.h>
48#include <asm/vio.h> 48#include <asm/vio.h>
49#include <asm/tce.h> 49#include <asm/tce.h>
50#include <asm/mmu_context.h>
50 51
51#define DBG(...) 52#define DBG(...)
52 53
@@ -993,15 +994,19 @@ int iommu_tce_check_gpa(unsigned long page_shift, unsigned long gpa)
993} 994}
994EXPORT_SYMBOL_GPL(iommu_tce_check_gpa); 995EXPORT_SYMBOL_GPL(iommu_tce_check_gpa);
995 996
996long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry, 997long iommu_tce_xchg(struct mm_struct *mm, struct iommu_table *tbl,
997 unsigned long *hpa, enum dma_data_direction *direction) 998 unsigned long entry, unsigned long *hpa,
999 enum dma_data_direction *direction)
998{ 1000{
999 long ret; 1001 long ret;
1002 unsigned long size = 0;
1000 1003
1001 ret = tbl->it_ops->exchange(tbl, entry, hpa, direction); 1004 ret = tbl->it_ops->exchange(tbl, entry, hpa, direction);
1002 1005
1003 if (!ret && ((*direction == DMA_FROM_DEVICE) || 1006 if (!ret && ((*direction == DMA_FROM_DEVICE) ||
1004 (*direction == DMA_BIDIRECTIONAL))) 1007 (*direction == DMA_BIDIRECTIONAL)) &&
1008 !mm_iommu_is_devmem(mm, *hpa, tbl->it_page_shift,
1009 &size))
1005 SetPageDirty(pfn_to_page(*hpa >> PAGE_SHIFT)); 1010 SetPageDirty(pfn_to_page(*hpa >> PAGE_SHIFT));
1006 1011
1007 /* if (unlikely(ret)) 1012 /* if (unlikely(ret))
@@ -1073,11 +1078,8 @@ void iommu_release_ownership(struct iommu_table *tbl)
1073} 1078}
1074EXPORT_SYMBOL_GPL(iommu_release_ownership); 1079EXPORT_SYMBOL_GPL(iommu_release_ownership);
1075 1080
1076int iommu_add_device(struct device *dev) 1081int iommu_add_device(struct iommu_table_group *table_group, struct device *dev)
1077{ 1082{
1078 struct iommu_table *tbl;
1079 struct iommu_table_group_link *tgl;
1080
1081 /* 1083 /*
1082 * The sysfs entries should be populated before 1084 * The sysfs entries should be populated before
1083 * binding IOMMU group. If sysfs entries isn't 1085 * binding IOMMU group. If sysfs entries isn't
@@ -1093,32 +1095,10 @@ int iommu_add_device(struct device *dev)
1093 return -EBUSY; 1095 return -EBUSY;
1094 } 1096 }
1095 1097
1096 tbl = get_iommu_table_base(dev);
1097 if (!tbl) {
1098 pr_debug("%s: Skipping device %s with no tbl\n",
1099 __func__, dev_name(dev));
1100 return 0;
1101 }
1102
1103 tgl = list_first_entry_or_null(&tbl->it_group_list,
1104 struct iommu_table_group_link, next);
1105 if (!tgl) {
1106 pr_debug("%s: Skipping device %s with no group\n",
1107 __func__, dev_name(dev));
1108 return 0;
1109 }
1110 pr_debug("%s: Adding %s to iommu group %d\n", 1098 pr_debug("%s: Adding %s to iommu group %d\n",
1111 __func__, dev_name(dev), 1099 __func__, dev_name(dev), iommu_group_id(table_group->group));
1112 iommu_group_id(tgl->table_group->group));
1113
1114 if (PAGE_SIZE < IOMMU_PAGE_SIZE(tbl)) {
1115 pr_err("%s: Invalid IOMMU page size %lx (%lx) on %s\n",
1116 __func__, IOMMU_PAGE_SIZE(tbl),
1117 PAGE_SIZE, dev_name(dev));
1118 return -EINVAL;
1119 }
1120 1100
1121 return iommu_group_add_device(tgl->table_group->group, dev); 1101 return iommu_group_add_device(table_group->group, dev);
1122} 1102}
1123EXPORT_SYMBOL_GPL(iommu_add_device); 1103EXPORT_SYMBOL_GPL(iommu_add_device);
1124 1104
@@ -1138,31 +1118,4 @@ void iommu_del_device(struct device *dev)
1138 iommu_group_remove_device(dev); 1118 iommu_group_remove_device(dev);
1139} 1119}
1140EXPORT_SYMBOL_GPL(iommu_del_device); 1120EXPORT_SYMBOL_GPL(iommu_del_device);
1141
1142static int tce_iommu_bus_notifier(struct notifier_block *nb,
1143 unsigned long action, void *data)
1144{
1145 struct device *dev = data;
1146
1147 switch (action) {
1148 case BUS_NOTIFY_ADD_DEVICE:
1149 return iommu_add_device(dev);
1150 case BUS_NOTIFY_DEL_DEVICE:
1151 if (dev->iommu_group)
1152 iommu_del_device(dev);
1153 return 0;
1154 default:
1155 return 0;
1156 }
1157}
1158
1159static struct notifier_block tce_iommu_bus_nb = {
1160 .notifier_call = tce_iommu_bus_notifier,
1161};
1162
1163int __init tce_iommu_bus_notifier_init(void)
1164{
1165 bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb);
1166 return 0;
1167}
1168#endif /* CONFIG_IOMMU_API */ 1121#endif /* CONFIG_IOMMU_API */
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index fda3ae48480c..0e7099da4f25 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -327,8 +327,7 @@ static int isa_bridge_notify(struct notifier_block *nb, unsigned long action,
327 /* Check if we have no ISA device, and this happens to be one, 327 /* Check if we have no ISA device, and this happens to be one,
328 * register it as such if it has an OF device 328 * register it as such if it has an OF device
329 */ 329 */
330 if (!isa_bridge_devnode && devnode && devnode->type && 330 if (!isa_bridge_devnode && of_node_is_type(devnode, "isa"))
331 !strcmp(devnode->type, "isa"))
332 isa_bridge_find_late(pdev, devnode); 331 isa_bridge_find_late(pdev, devnode);
333 332
334 return 0; 333 return 0;
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 5b9dce17f0c9..7cea5978f21f 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -192,7 +192,7 @@ static int __init add_legacy_soc_port(struct device_node *np,
192 /* Add port, irq will be dealt with later. We passed a translated 192 /* Add port, irq will be dealt with later. We passed a translated
193 * IO port value. It will be fixed up later along with the irq 193 * IO port value. It will be fixed up later along with the irq
194 */ 194 */
195 if (tsi && !strcmp(tsi->type, "tsi-bridge")) 195 if (of_node_is_type(tsi, "tsi-bridge"))
196 return add_legacy_port(np, -1, UPIO_TSI, addr, addr, 196 return add_legacy_port(np, -1, UPIO_TSI, addr, addr,
197 0, legacy_port_flags, 0); 197 0, legacy_port_flags, 0);
198 else 198 else
@@ -400,8 +400,7 @@ void __init find_legacy_serial_ports(void)
400 /* Next, fill our array with ISA ports */ 400 /* Next, fill our array with ISA ports */
401 for_each_node_by_type(np, "serial") { 401 for_each_node_by_type(np, "serial") {
402 struct device_node *isa = of_get_parent(np); 402 struct device_node *isa = of_get_parent(np);
403 if (isa && (!strcmp(isa->name, "isa") || 403 if (of_node_name_eq(isa, "isa") || of_node_name_eq(isa, "lpc")) {
404 !strcmp(isa->name, "lpc"))) {
405 if (of_device_is_available(np)) { 404 if (of_device_is_available(np)) {
406 index = add_legacy_isa_port(np, isa); 405 index = add_legacy_isa_port(np, isa);
407 if (index >= 0 && np == stdout) 406 if (index >= 0 && np == stdout)
@@ -415,11 +414,12 @@ void __init find_legacy_serial_ports(void)
415 /* Next, try to locate PCI ports */ 414 /* Next, try to locate PCI ports */
416 for (np = NULL; (np = of_find_all_nodes(np));) { 415 for (np = NULL; (np = of_find_all_nodes(np));) {
417 struct device_node *pci, *parent = of_get_parent(np); 416 struct device_node *pci, *parent = of_get_parent(np);
418 if (parent && !strcmp(parent->name, "isa")) { 417 if (of_node_name_eq(parent, "isa")) {
419 of_node_put(parent); 418 of_node_put(parent);
420 continue; 419 continue;
421 } 420 }
422 if (strcmp(np->name, "serial") && strcmp(np->type, "serial")) { 421 if (!of_node_name_eq(np, "serial") &&
422 !of_node_is_type(np, "serial")) {
423 of_node_put(parent); 423 of_node_put(parent);
424 continue; 424 continue;
425 } 425 }
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 695b24a2d954..57d2ffb2d45c 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -153,7 +153,7 @@ _GLOBAL(call_setup_cpu)
153 mtctr r5 153 mtctr r5
154 bctr 154 bctr
155 155
156#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) 156#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_PPC_BOOK3S_32)
157 157
158/* This gets called by via-pmu.c to switch the PLL selection 158/* This gets called by via-pmu.c to switch the PLL selection
159 * on 750fx CPU. This function should really be moved to some 159 * on 750fx CPU. This function should really be moved to some
@@ -223,7 +223,7 @@ _GLOBAL(low_choose_7447a_dfs)
223 mtmsr r7 223 mtmsr r7
224 blr 224 blr
225 225
226#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ 226#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_PPC_BOOK3S_32 */
227 227
228/* 228/*
229 * complement mask on the msr then "or" some values on. 229 * complement mask on the msr then "or" some values on.
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index 22e9d281324d..06e2eda2430e 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -809,6 +809,7 @@ static long dev_nvram_ioctl(struct file *file, unsigned int cmd,
809#ifdef CONFIG_PPC_PMAC 809#ifdef CONFIG_PPC_PMAC
810 case OBSOLETE_PMAC_NVRAM_GET_OFFSET: 810 case OBSOLETE_PMAC_NVRAM_GET_OFFSET:
811 printk(KERN_WARNING "nvram: Using obsolete PMAC_NVRAM_GET_OFFSET ioctl\n"); 811 printk(KERN_WARNING "nvram: Using obsolete PMAC_NVRAM_GET_OFFSET ioctl\n");
812 /* fall through */
812 case IOC_NVRAM_GET_OFFSET: { 813 case IOC_NVRAM_GET_OFFSET: {
813 int part, offset; 814 int part, offset;
814 815
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 98f04725def7..24191ea2d9a7 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -125,16 +125,13 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
125 struct pci_bus *bus, int devfn) 125 struct pci_bus *bus, int devfn)
126{ 126{
127 struct pci_dev *dev; 127 struct pci_dev *dev;
128 const char *type;
129 128
130 dev = pci_alloc_dev(bus); 129 dev = pci_alloc_dev(bus);
131 if (!dev) 130 if (!dev)
132 return NULL; 131 return NULL;
133 type = of_get_property(node, "device_type", NULL);
134 if (type == NULL)
135 type = "";
136 132
137 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type); 133 pr_debug(" create device, devfn: %x, type: %s\n", devfn,
134 of_node_get_device_type(node));
138 135
139 dev->dev.of_node = of_node_get(node); 136 dev->dev.of_node = of_node_get(node);
140 dev->dev.parent = bus->bridge; 137 dev->dev.parent = bus->bridge;
@@ -167,12 +164,12 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
167 /* Early fixups, before probing the BARs */ 164 /* Early fixups, before probing the BARs */
168 pci_fixup_device(pci_fixup_early, dev); 165 pci_fixup_device(pci_fixup_early, dev);
169 166
170 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) { 167 if (of_node_is_type(node, "pci") || of_node_is_type(node, "pciex")) {
171 /* a PCI-PCI bridge */ 168 /* a PCI-PCI bridge */
172 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE; 169 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
173 dev->rom_base_reg = PCI_ROM_ADDRESS1; 170 dev->rom_base_reg = PCI_ROM_ADDRESS1;
174 set_pcie_hotplug_bridge(dev); 171 set_pcie_hotplug_bridge(dev);
175 } else if (!strcmp(type, "cardbus")) { 172 } else if (of_node_is_type(node, "cardbus")) {
176 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS; 173 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
177 } else { 174 } else {
178 dev->hdr_type = PCI_HEADER_TYPE_NORMAL; 175 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
diff --git a/arch/powerpc/kernel/pmc.c b/arch/powerpc/kernel/pmc.c
index 58eaa3ddf7b9..2de71faca911 100644
--- a/arch/powerpc/kernel/pmc.c
+++ b/arch/powerpc/kernel/pmc.c
@@ -29,7 +29,7 @@ static void dummy_perf(struct pt_regs *regs)
29{ 29{
30#if defined(CONFIG_FSL_EMB_PERFMON) 30#if defined(CONFIG_FSL_EMB_PERFMON)
31 mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE); 31 mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
32#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx) 32#elif defined(CONFIG_PPC64) || defined(CONFIG_PPC_BOOK3S_32)
33 if (cur_cpu_spec->pmc_type == PPC_PMC_IBM) 33 if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
34 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO)); 34 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
35#else 35#else
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index fe758cedb93f..4181ec715f88 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -124,12 +124,12 @@ static void __init move_device_tree(void)
124 size = fdt_totalsize(initial_boot_params); 124 size = fdt_totalsize(initial_boot_params);
125 125
126 if ((memory_limit && (start + size) > PHYSICAL_START + memory_limit) || 126 if ((memory_limit && (start + size) > PHYSICAL_START + memory_limit) ||
127 overlaps_crashkernel(start, size) || 127 !memblock_is_memory(start + size - 1) ||
128 overlaps_initrd(start, size)) { 128 overlaps_crashkernel(start, size) || overlaps_initrd(start, size)) {
129 p = __va(memblock_phys_alloc(size, PAGE_SIZE)); 129 p = __va(memblock_phys_alloc(size, PAGE_SIZE));
130 memcpy(p, initial_boot_params, size); 130 memcpy(p, initial_boot_params, size);
131 initial_boot_params = p; 131 initial_boot_params = p;
132 DBG("Moved device tree to 0x%p\n", p); 132 DBG("Moved device tree to 0x%px\n", p);
133 } 133 }
134 134
135 DBG("<- move_device_tree\n"); 135 DBG("<- move_device_tree\n");
@@ -689,7 +689,7 @@ void __init early_init_devtree(void *params)
689{ 689{
690 phys_addr_t limit; 690 phys_addr_t limit;
691 691
692 DBG(" -> early_init_devtree(%p)\n", params); 692 DBG(" -> early_init_devtree(%px)\n", params);
693 693
694 /* Too early to BUG_ON(), do it by hand */ 694 /* Too early to BUG_ON(), do it by hand */
695 if (!early_init_dt_verify(params)) 695 if (!early_init_dt_verify(params))
@@ -749,7 +749,7 @@ void __init early_init_devtree(void *params)
749 memblock_allow_resize(); 749 memblock_allow_resize();
750 memblock_dump_all(); 750 memblock_dump_all();
751 751
752 DBG("Phys. mem: %llx\n", memblock_phys_mem_size()); 752 DBG("Phys. mem: %llx\n", (unsigned long long)memblock_phys_mem_size());
753 753
754 /* We may need to relocate the flat tree, do it now. 754 /* We may need to relocate the flat tree, do it now.
755 * FIXME .. and the initrd too? */ 755 * FIXME .. and the initrd too? */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 714c3480c52d..cdd5d1d3ae41 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -3263,32 +3263,40 @@ static inline int do_seccomp(struct pt_regs *regs) { return 0; }
3263 */ 3263 */
3264long do_syscall_trace_enter(struct pt_regs *regs) 3264long do_syscall_trace_enter(struct pt_regs *regs)
3265{ 3265{
3266 u32 flags;
3267
3266 user_exit(); 3268 user_exit();
3267 3269
3268 if (test_thread_flag(TIF_SYSCALL_EMU)) { 3270 flags = READ_ONCE(current_thread_info()->flags) &
3269 /* 3271 (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE);
3270 * A nonzero return code from tracehook_report_syscall_entry()
3271 * tells us to prevent the syscall execution, but we are not
3272 * going to execute it anyway.
3273 *
3274 * Returning -1 will skip the syscall execution. We want to
3275 * avoid clobbering any register also, thus, not 'gotoing'
3276 * skip label.
3277 */
3278 if (tracehook_report_syscall_entry(regs))
3279 ;
3280 return -1;
3281 }
3282 3272
3283 /* 3273 if (flags) {
3284 * The tracer may decide to abort the syscall, if so tracehook 3274 int rc = tracehook_report_syscall_entry(regs);
3285 * will return !0. Note that the tracer may also just change 3275
3286 * regs->gpr[0] to an invalid syscall number, that is handled 3276 if (unlikely(flags & _TIF_SYSCALL_EMU)) {
3287 * below on the exit path. 3277 /*
3288 */ 3278 * A nonzero return code from
3289 if (test_thread_flag(TIF_SYSCALL_TRACE) && 3279 * tracehook_report_syscall_entry() tells us to prevent
3290 tracehook_report_syscall_entry(regs)) 3280 * the syscall execution, but we are not going to
3291 goto skip; 3281 * execute it anyway.
3282 *
3283 * Returning -1 will skip the syscall execution. We want
3284 * to avoid clobbering any registers, so we don't goto
3285 * the skip label below.
3286 */
3287 return -1;
3288 }
3289
3290 if (rc) {
3291 /*
3292 * The tracer decided to abort the syscall. Note that
3293 * the tracer may also just change regs->gpr[0] to an
3294 * invalid syscall number, that is handled below on the
3295 * exit path.
3296 */
3297 goto skip;
3298 }
3299 }
3292 3300
3293 /* Run seccomp after ptrace; allow it to set gpr[3]. */ 3301 /* Run seccomp after ptrace; allow it to set gpr[3]. */
3294 if (do_seccomp(regs)) 3302 if (do_seccomp(regs))
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index f6f469fc4073..9b8631533e02 100644
--- a/arch/powerpc/kernel/security.c
+++ b/arch/powerpc/kernel/security.c
@@ -4,6 +4,7 @@
4// 4//
5// Copyright 2018, Michael Ellerman, IBM Corporation. 5// Copyright 2018, Michael Ellerman, IBM Corporation.
6 6
7#include <linux/cpu.h>
7#include <linux/kernel.h> 8#include <linux/kernel.h>
8#include <linux/device.h> 9#include <linux/device.h>
9#include <linux/seq_buf.h> 10#include <linux/seq_buf.h>
@@ -22,10 +23,14 @@ enum count_cache_flush_type {
22 COUNT_CACHE_FLUSH_SW = 0x2, 23 COUNT_CACHE_FLUSH_SW = 0x2,
23 COUNT_CACHE_FLUSH_HW = 0x4, 24 COUNT_CACHE_FLUSH_HW = 0x4,
24}; 25};
25static enum count_cache_flush_type count_cache_flush_type; 26static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
26 27
27bool barrier_nospec_enabled; 28bool barrier_nospec_enabled;
28static bool no_nospec; 29static bool no_nospec;
30static bool btb_flush_enabled;
31#ifdef CONFIG_PPC_FSL_BOOK3E
32static bool no_spectrev2;
33#endif
29 34
30static void enable_barrier_nospec(bool enable) 35static void enable_barrier_nospec(bool enable)
31{ 36{
@@ -101,6 +106,23 @@ static __init int barrier_nospec_debugfs_init(void)
101device_initcall(barrier_nospec_debugfs_init); 106device_initcall(barrier_nospec_debugfs_init);
102#endif /* CONFIG_DEBUG_FS */ 107#endif /* CONFIG_DEBUG_FS */
103 108
109#ifdef CONFIG_PPC_FSL_BOOK3E
110static int __init handle_nospectre_v2(char *p)
111{
112 no_spectrev2 = true;
113
114 return 0;
115}
116early_param("nospectre_v2", handle_nospectre_v2);
117void setup_spectre_v2(void)
118{
119 if (no_spectrev2)
120 do_btb_flush_fixups();
121 else
122 btb_flush_enabled = true;
123}
124#endif /* CONFIG_PPC_FSL_BOOK3E */
125
104#ifdef CONFIG_PPC_BOOK3S_64 126#ifdef CONFIG_PPC_BOOK3S_64
105ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf) 127ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
106{ 128{
@@ -191,8 +213,11 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
191 213
192 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW) 214 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
193 seq_buf_printf(&s, "(hardware accelerated)"); 215 seq_buf_printf(&s, "(hardware accelerated)");
194 } else 216 } else if (btb_flush_enabled) {
217 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
218 } else {
195 seq_buf_printf(&s, "Vulnerable"); 219 seq_buf_printf(&s, "Vulnerable");
220 }
196 221
197 seq_buf_printf(&s, "\n"); 222 seq_buf_printf(&s, "\n");
198 223
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 93ee3703b42f..ca00fbb97cf8 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -687,7 +687,7 @@ int check_legacy_ioport(unsigned long base_port)
687 return ret; 687 return ret;
688 parent = of_get_parent(np); 688 parent = of_get_parent(np);
689 if (parent) { 689 if (parent) {
690 if (strcmp(parent->type, "isa") == 0) 690 if (of_node_is_type(parent, "isa"))
691 ret = 0; 691 ret = 0;
692 of_node_put(parent); 692 of_node_put(parent);
693 } 693 }
@@ -800,7 +800,7 @@ static __init void print_system_info(void)
800#ifdef CONFIG_PPC_BOOK3S_64 800#ifdef CONFIG_PPC_BOOK3S_64
801 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 801 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
802#endif 802#endif
803#ifdef CONFIG_PPC_STD_MMU_32 803#ifdef CONFIG_PPC_BOOK3S_32
804 pr_info("Hash_size = 0x%lx\n", Hash_size); 804 pr_info("Hash_size = 0x%lx\n", Hash_size);
805#endif 805#endif
806 pr_info("phys_mem_size = 0x%llx\n", 806 pr_info("phys_mem_size = 0x%llx\n",
@@ -830,7 +830,7 @@ static __init void print_system_info(void)
830 if (htab_hash_mask) 830 if (htab_hash_mask)
831 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); 831 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
832#endif 832#endif
833#ifdef CONFIG_PPC_STD_MMU_32 833#ifdef CONFIG_PPC_BOOK3S_32
834 if (Hash) 834 if (Hash)
835 pr_info("Hash = 0x%p\n", Hash); 835 pr_info("Hash = 0x%p\n", Hash);
836 if (Hash_mask) 836 if (Hash_mask)
@@ -974,6 +974,7 @@ void __init setup_arch(char **cmdline_p)
974 ppc_md.setup_arch(); 974 ppc_md.setup_arch();
975 975
976 setup_barrier_nospec(); 976 setup_barrier_nospec();
977 setup_spectre_v2();
977 978
978 paging_init(); 979 paging_init();
979 980
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 81909600013a..947f904688b0 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -59,7 +59,6 @@ unsigned long ISA_DMA_THRESHOLD;
59unsigned int DMA_MODE_READ; 59unsigned int DMA_MODE_READ;
60unsigned int DMA_MODE_WRITE; 60unsigned int DMA_MODE_WRITE;
61 61
62EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
63EXPORT_SYMBOL(DMA_MODE_READ); 62EXPORT_SYMBOL(DMA_MODE_READ);
64EXPORT_SYMBOL(DMA_MODE_WRITE); 63EXPORT_SYMBOL(DMA_MODE_WRITE);
65 64
@@ -101,8 +100,7 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
101 */ 100 */
102notrace void __init machine_init(u64 dt_ptr) 101notrace void __init machine_init(u64 dt_ptr)
103{ 102{
104 unsigned int *addr = (unsigned int *)((unsigned long)&patch__memset_nocache + 103 unsigned int *addr = (unsigned int *)patch_site_addr(&patch__memset_nocache);
105 patch__memset_nocache);
106 unsigned long insn; 104 unsigned long insn;
107 105
108 /* Configure static keys first, now that we're relocated. */ 106 /* Configure static keys first, now that we're relocated. */
@@ -240,7 +238,7 @@ void __init exc_lvl_early_init(void)
240 238
241void __init setup_power_save(void) 239void __init setup_power_save(void)
242{ 240{
243#ifdef CONFIG_6xx 241#ifdef CONFIG_PPC_BOOK3S_32
244 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 242 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
245 cpu_has_feature(CPU_FTR_CAN_NAP)) 243 cpu_has_feature(CPU_FTR_CAN_NAP))
246 ppc_md.power_save = ppc6xx_idle; 244 ppc_md.power_save = ppc6xx_idle;
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index e6474a45cef5..2d47cc79e5b3 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -470,9 +470,9 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
470 return 1; 470 return 1;
471 471
472 if (sigret) { 472 if (sigret) {
473 /* Set up the sigreturn trampoline: li r0,sigret; sc */ 473 /* Set up the sigreturn trampoline: li 0,sigret; sc */
474 if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) 474 if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
475 || __put_user(0x44000002UL, &frame->tramp[1])) 475 || __put_user(PPC_INST_SC, &frame->tramp[1]))
476 return 1; 476 return 1;
477 flush_icache_range((unsigned long) &frame->tramp[0], 477 flush_icache_range((unsigned long) &frame->tramp[0],
478 (unsigned long) &frame->tramp[2]); 478 (unsigned long) &frame->tramp[2]);
@@ -619,9 +619,9 @@ static int save_tm_user_regs(struct pt_regs *regs,
619 if (__put_user(msr, &frame->mc_gregs[PT_MSR])) 619 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
620 return 1; 620 return 1;
621 if (sigret) { 621 if (sigret) {
622 /* Set up the sigreturn trampoline: li r0,sigret; sc */ 622 /* Set up the sigreturn trampoline: li 0,sigret; sc */
623 if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) 623 if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
624 || __put_user(0x44000002UL, &frame->tramp[1])) 624 || __put_user(PPC_INST_SC, &frame->tramp[1]))
625 return 1; 625 return 1;
626 flush_icache_range((unsigned long) &frame->tramp[0], 626 flush_icache_range((unsigned long) &frame->tramp[0],
627 (unsigned long) &frame->tramp[2]); 627 (unsigned long) &frame->tramp[2]);
@@ -848,7 +848,23 @@ static long restore_tm_user_regs(struct pt_regs *regs,
848 /* If TM bits are set to the reserved value, it's an invalid context */ 848 /* If TM bits are set to the reserved value, it's an invalid context */
849 if (MSR_TM_RESV(msr_hi)) 849 if (MSR_TM_RESV(msr_hi))
850 return 1; 850 return 1;
851 /* Pull in the MSR TM bits from the user context */ 851
852 /*
853 * Disabling preemption, since it is unsafe to be preempted
854 * with MSR[TS] set without recheckpointing.
855 */
856 preempt_disable();
857
858 /*
859 * CAUTION:
860 * After regs->MSR[TS] being updated, make sure that get_user(),
861 * put_user() or similar functions are *not* called. These
862 * functions can generate page faults which will cause the process
863 * to be de-scheduled with MSR[TS] set but without calling
864 * tm_recheckpoint(). This can cause a bug.
865 *
866 * Pull in the MSR TM bits from the user context
867 */
852 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK); 868 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
853 /* Now, recheckpoint. This loads up all of the checkpointed (older) 869 /* Now, recheckpoint. This loads up all of the checkpointed (older)
854 * registers, including FP and V[S]Rs. After recheckpointing, the 870 * registers, including FP and V[S]Rs. After recheckpointing, the
@@ -873,6 +889,8 @@ static long restore_tm_user_regs(struct pt_regs *regs,
873 } 889 }
874#endif 890#endif
875 891
892 preempt_enable();
893
876 return 0; 894 return 0;
877} 895}
878#endif 896#endif
@@ -1140,11 +1158,11 @@ SYSCALL_DEFINE0(rt_sigreturn)
1140{ 1158{
1141 struct rt_sigframe __user *rt_sf; 1159 struct rt_sigframe __user *rt_sf;
1142 struct pt_regs *regs = current_pt_regs(); 1160 struct pt_regs *regs = current_pt_regs();
1161 int tm_restore = 0;
1143#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1162#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1144 struct ucontext __user *uc_transact; 1163 struct ucontext __user *uc_transact;
1145 unsigned long msr_hi; 1164 unsigned long msr_hi;
1146 unsigned long tmp; 1165 unsigned long tmp;
1147 int tm_restore = 0;
1148#endif 1166#endif
1149 /* Always make any pending restarted system calls return -EINTR */ 1167 /* Always make any pending restarted system calls return -EINTR */
1150 current->restart_block.fn = do_no_restart_syscall; 1168 current->restart_block.fn = do_no_restart_syscall;
@@ -1192,11 +1210,19 @@ SYSCALL_DEFINE0(rt_sigreturn)
1192 goto bad; 1210 goto bad;
1193 } 1211 }
1194 } 1212 }
1195 if (!tm_restore) 1213 if (!tm_restore) {
1196 /* Fall through, for non-TM restore */ 1214 /*
1215 * Unset regs->msr because ucontext MSR TS is not
1216 * set, and recheckpoint was not called. This avoid
1217 * hitting a TM Bad thing at RFID
1218 */
1219 regs->msr &= ~MSR_TS_MASK;
1220 }
1221 /* Fall through, for non-TM restore */
1197#endif 1222#endif
1198 if (do_setcontext(&rt_sf->uc, regs, 1)) 1223 if (!tm_restore)
1199 goto bad; 1224 if (do_setcontext(&rt_sf->uc, regs, 1))
1225 goto bad;
1200 1226
1201 /* 1227 /*
1202 * It's not clear whether or why it is desirable to save the 1228 * It's not clear whether or why it is desirable to save the
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 83d51bf586c7..0935fe6c282a 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -467,20 +467,6 @@ static long restore_tm_sigcontexts(struct task_struct *tsk,
467 if (MSR_TM_RESV(msr)) 467 if (MSR_TM_RESV(msr))
468 return -EINVAL; 468 return -EINVAL;
469 469
470 /* pull in MSR TS bits from user context */
471 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
472
473 /*
474 * Ensure that TM is enabled in regs->msr before we leave the signal
475 * handler. It could be the case that (a) user disabled the TM bit
476 * through the manipulation of the MSR bits in uc_mcontext or (b) the
477 * TM bit was disabled because a sufficient number of context switches
478 * happened whilst in the signal handler and load_tm overflowed,
479 * disabling the TM bit. In either case we can end up with an illegal
480 * TM state leading to a TM Bad Thing when we return to userspace.
481 */
482 regs->msr |= MSR_TM;
483
484 /* pull in MSR LE from user context */ 470 /* pull in MSR LE from user context */
485 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); 471 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
486 472
@@ -572,6 +558,34 @@ static long restore_tm_sigcontexts(struct task_struct *tsk,
572 tm_enable(); 558 tm_enable();
573 /* Make sure the transaction is marked as failed */ 559 /* Make sure the transaction is marked as failed */
574 tsk->thread.tm_texasr |= TEXASR_FS; 560 tsk->thread.tm_texasr |= TEXASR_FS;
561
562 /*
563 * Disabling preemption, since it is unsafe to be preempted
564 * with MSR[TS] set without recheckpointing.
565 */
566 preempt_disable();
567
568 /* pull in MSR TS bits from user context */
569 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
570
571 /*
572 * Ensure that TM is enabled in regs->msr before we leave the signal
573 * handler. It could be the case that (a) user disabled the TM bit
574 * through the manipulation of the MSR bits in uc_mcontext or (b) the
575 * TM bit was disabled because a sufficient number of context switches
576 * happened whilst in the signal handler and load_tm overflowed,
577 * disabling the TM bit. In either case we can end up with an illegal
578 * TM state leading to a TM Bad Thing when we return to userspace.
579 *
580 * CAUTION:
581 * After regs->MSR[TS] being updated, make sure that get_user(),
582 * put_user() or similar functions are *not* called. These
583 * functions can generate page faults which will cause the process
584 * to be de-scheduled with MSR[TS] set but without calling
585 * tm_recheckpoint(). This can cause a bug.
586 */
587 regs->msr |= MSR_TM;
588
575 /* This loads the checkpointed FP/VEC state, if used */ 589 /* This loads the checkpointed FP/VEC state, if used */
576 tm_recheckpoint(&tsk->thread); 590 tm_recheckpoint(&tsk->thread);
577 591
@@ -585,6 +599,8 @@ static long restore_tm_sigcontexts(struct task_struct *tsk,
585 regs->msr |= MSR_VEC; 599 regs->msr |= MSR_VEC;
586 } 600 }
587 601
602 preempt_enable();
603
588 return err; 604 return err;
589} 605}
590#endif 606#endif
@@ -598,11 +614,12 @@ static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp)
598 long err = 0; 614 long err = 0;
599 615
600 /* addi r1, r1, __SIGNAL_FRAMESIZE # Pop the dummy stackframe */ 616 /* addi r1, r1, __SIGNAL_FRAMESIZE # Pop the dummy stackframe */
601 err |= __put_user(0x38210000UL | (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]); 617 err |= __put_user(PPC_INST_ADDI | __PPC_RT(R1) | __PPC_RA(R1) |
618 (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]);
602 /* li r0, __NR_[rt_]sigreturn| */ 619 /* li r0, __NR_[rt_]sigreturn| */
603 err |= __put_user(0x38000000UL | (syscall & 0xffff), &tramp[1]); 620 err |= __put_user(PPC_INST_ADDI | (syscall & 0xffff), &tramp[1]);
604 /* sc */ 621 /* sc */
605 err |= __put_user(0x44000002UL, &tramp[2]); 622 err |= __put_user(PPC_INST_SC, &tramp[2]);
606 623
607 /* Minimal traceback info */ 624 /* Minimal traceback info */
608 for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++) 625 for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++)
@@ -740,11 +757,23 @@ SYSCALL_DEFINE0(rt_sigreturn)
740 &uc_transact->uc_mcontext)) 757 &uc_transact->uc_mcontext))
741 goto badframe; 758 goto badframe;
742 } 759 }
743 else
744 /* Fall through, for non-TM restore */
745#endif 760#endif
746 if (restore_sigcontext(current, NULL, 1, &uc->uc_mcontext)) 761 /* Fall through, for non-TM restore */
747 goto badframe; 762 if (!MSR_TM_ACTIVE(msr)) {
763 /*
764 * Unset MSR[TS] on the thread regs since MSR from user
765 * context does not have MSR active, and recheckpoint was
766 * not called since restore_tm_sigcontexts() was not called
767 * also.
768 *
769 * If not unsetting it, the code can RFID to userspace with
770 * MSR[TS] set, but without CPU in the proper state,
771 * causing a TM bad thing.
772 */
773 current->thread.regs->msr &= ~MSR_TS_MASK;
774 if (restore_sigcontext(current, NULL, 1, &uc->uc_mcontext))
775 goto badframe;
776 }
748 777
749 if (restore_altstack(&uc->uc_stack)) 778 if (restore_altstack(&uc->uc_stack))
750 goto badframe; 779 goto badframe;
diff --git a/arch/powerpc/kernel/syscalls/Makefile b/arch/powerpc/kernel/syscalls/Makefile
new file mode 100644
index 000000000000..27b48954808d
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/Makefile
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: GPL-2.0
2kapi := arch/$(SRCARCH)/include/generated/asm
3uapi := arch/$(SRCARCH)/include/generated/uapi/asm
4
5_dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)') \
6 $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)')
7
8syscall := $(srctree)/$(src)/syscall.tbl
9syshdr := $(srctree)/$(src)/syscallhdr.sh
10systbl := $(srctree)/$(src)/syscalltbl.sh
11
12quiet_cmd_syshdr = SYSHDR $@
13 cmd_syshdr = $(CONFIG_SHELL) '$(syshdr)' '$<' '$@' \
14 '$(syshdr_abis_$(basetarget))' \
15 '$(syshdr_pfx_$(basetarget))' \
16 '$(syshdr_offset_$(basetarget))'
17
18quiet_cmd_systbl = SYSTBL $@
19 cmd_systbl = $(CONFIG_SHELL) '$(systbl)' '$<' '$@' \
20 '$(systbl_abis_$(basetarget))' \
21 '$(systbl_abi_$(basetarget))' \
22 '$(systbl_offset_$(basetarget))'
23
24syshdr_abis_unistd_32 := common,nospu,32
25$(uapi)/unistd_32.h: $(syscall) $(syshdr)
26 $(call if_changed,syshdr)
27
28syshdr_abis_unistd_64 := common,nospu,64
29$(uapi)/unistd_64.h: $(syscall) $(syshdr)
30 $(call if_changed,syshdr)
31
32systbl_abis_syscall_table_32 := common,nospu,32
33systbl_abi_syscall_table_32 := 32
34$(kapi)/syscall_table_32.h: $(syscall) $(systbl)
35 $(call if_changed,systbl)
36
37systbl_abis_syscall_table_64 := common,nospu,64
38systbl_abi_syscall_table_64 := 64
39$(kapi)/syscall_table_64.h: $(syscall) $(systbl)
40 $(call if_changed,systbl)
41
42systbl_abis_syscall_table_c32 := common,nospu,32
43systbl_abi_syscall_table_c32 := c32
44$(kapi)/syscall_table_c32.h: $(syscall) $(systbl)
45 $(call if_changed,systbl)
46
47systbl_abis_syscall_table_spu := common,spu
48systbl_abi_syscall_table_spu := spu
49$(kapi)/syscall_table_spu.h: $(syscall) $(systbl)
50 $(call if_changed,systbl)
51
52uapisyshdr-y += unistd_32.h unistd_64.h
53kapisyshdr-y += syscall_table_32.h \
54 syscall_table_64.h \
55 syscall_table_c32.h \
56 syscall_table_spu.h
57
58targets += $(uapisyshdr-y) $(kapisyshdr-y)
59
60PHONY += all
61all: $(addprefix $(uapi)/,$(uapisyshdr-y))
62all: $(addprefix $(kapi)/,$(kapisyshdr-y))
63 @:
diff --git a/arch/powerpc/kernel/syscalls/syscall.tbl b/arch/powerpc/kernel/syscalls/syscall.tbl
new file mode 100644
index 000000000000..db3bbb8744af
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/syscall.tbl
@@ -0,0 +1,427 @@
1# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
2#
3# system call numbers and entry vectors for powerpc
4#
5# The format is:
6# <number> <abi> <name> <entry point> <compat entry point>
7#
8# The <abi> can be common, spu, nospu, 64, or 32 for this file.
9#
100 nospu restart_syscall sys_restart_syscall
111 nospu exit sys_exit
122 nospu fork ppc_fork
133 common read sys_read
144 common write sys_write
155 common open sys_open compat_sys_open
166 common close sys_close
177 common waitpid sys_waitpid
188 common creat sys_creat
199 common link sys_link
2010 common unlink sys_unlink
2111 nospu execve sys_execve compat_sys_execve
2212 common chdir sys_chdir
2313 common time sys_time compat_sys_time
2414 common mknod sys_mknod
2515 common chmod sys_chmod
2616 common lchown sys_lchown
2717 common break sys_ni_syscall
2818 32 oldstat sys_stat sys_ni_syscall
2918 64 oldstat sys_ni_syscall
3018 spu oldstat sys_ni_syscall
3119 common lseek sys_lseek compat_sys_lseek
3220 common getpid sys_getpid
3321 nospu mount sys_mount compat_sys_mount
3422 32 umount sys_oldumount
3522 64 umount sys_ni_syscall
3622 spu umount sys_ni_syscall
3723 common setuid sys_setuid
3824 common getuid sys_getuid
3925 common stime sys_stime compat_sys_stime
4026 nospu ptrace sys_ptrace compat_sys_ptrace
4127 common alarm sys_alarm
4228 32 oldfstat sys_fstat sys_ni_syscall
4328 64 oldfstat sys_ni_syscall
4428 spu oldfstat sys_ni_syscall
4529 nospu pause sys_pause
4630 nospu utime sys_utime compat_sys_utime
4731 common stty sys_ni_syscall
4832 common gtty sys_ni_syscall
4933 common access sys_access
5034 common nice sys_nice
5135 common ftime sys_ni_syscall
5236 common sync sys_sync
5337 common kill sys_kill
5438 common rename sys_rename
5539 common mkdir sys_mkdir
5640 common rmdir sys_rmdir
5741 common dup sys_dup
5842 common pipe sys_pipe
5943 common times sys_times compat_sys_times
6044 common prof sys_ni_syscall
6145 common brk sys_brk
6246 common setgid sys_setgid
6347 common getgid sys_getgid
6448 nospu signal sys_signal
6549 common geteuid sys_geteuid
6650 common getegid sys_getegid
6751 nospu acct sys_acct
6852 nospu umount2 sys_umount
6953 common lock sys_ni_syscall
7054 common ioctl sys_ioctl compat_sys_ioctl
7155 common fcntl sys_fcntl compat_sys_fcntl
7256 common mpx sys_ni_syscall
7357 common setpgid sys_setpgid
7458 common ulimit sys_ni_syscall
7559 32 oldolduname sys_olduname
7659 64 oldolduname sys_ni_syscall
7759 spu oldolduname sys_ni_syscall
7860 common umask sys_umask
7961 common chroot sys_chroot
8062 nospu ustat sys_ustat compat_sys_ustat
8163 common dup2 sys_dup2
8264 common getppid sys_getppid
8365 common getpgrp sys_getpgrp
8466 common setsid sys_setsid
8567 32 sigaction sys_sigaction compat_sys_sigaction
8667 64 sigaction sys_ni_syscall
8767 spu sigaction sys_ni_syscall
8868 common sgetmask sys_sgetmask
8969 common ssetmask sys_ssetmask
9070 common setreuid sys_setreuid
9171 common setregid sys_setregid
9272 32 sigsuspend sys_sigsuspend
9372 64 sigsuspend sys_ni_syscall
9472 spu sigsuspend sys_ni_syscall
9573 32 sigpending sys_sigpending compat_sys_sigpending
9673 64 sigpending sys_ni_syscall
9773 spu sigpending sys_ni_syscall
9874 common sethostname sys_sethostname
9975 common setrlimit sys_setrlimit compat_sys_setrlimit
10076 32 getrlimit sys_old_getrlimit compat_sys_old_getrlimit
10176 64 getrlimit sys_ni_syscall
10276 spu getrlimit sys_ni_syscall
10377 common getrusage sys_getrusage compat_sys_getrusage
10478 common gettimeofday sys_gettimeofday compat_sys_gettimeofday
10579 common settimeofday sys_settimeofday compat_sys_settimeofday
10680 common getgroups sys_getgroups
10781 common setgroups sys_setgroups
10882 32 select ppc_select sys_ni_syscall
10982 64 select sys_ni_syscall
11082 spu select sys_ni_syscall
11183 common symlink sys_symlink
11284 32 oldlstat sys_lstat sys_ni_syscall
11384 64 oldlstat sys_ni_syscall
11484 spu oldlstat sys_ni_syscall
11585 common readlink sys_readlink
11686 nospu uselib sys_uselib
11787 nospu swapon sys_swapon
11888 nospu reboot sys_reboot
11989 32 readdir sys_old_readdir compat_sys_old_readdir
12089 64 readdir sys_ni_syscall
12189 spu readdir sys_ni_syscall
12290 common mmap sys_mmap
12391 common munmap sys_munmap
12492 common truncate sys_truncate compat_sys_truncate
12593 common ftruncate sys_ftruncate compat_sys_ftruncate
12694 common fchmod sys_fchmod
12795 common fchown sys_fchown
12896 common getpriority sys_getpriority
12997 common setpriority sys_setpriority
13098 common profil sys_ni_syscall
13199 nospu statfs sys_statfs compat_sys_statfs
132100 nospu fstatfs sys_fstatfs compat_sys_fstatfs
133101 common ioperm sys_ni_syscall
134102 common socketcall sys_socketcall compat_sys_socketcall
135103 common syslog sys_syslog
136104 common setitimer sys_setitimer compat_sys_setitimer
137105 common getitimer sys_getitimer compat_sys_getitimer
138106 common stat sys_newstat compat_sys_newstat
139107 common lstat sys_newlstat compat_sys_newlstat
140108 common fstat sys_newfstat compat_sys_newfstat
141109 32 olduname sys_uname
142109 64 olduname sys_ni_syscall
143109 spu olduname sys_ni_syscall
144110 common iopl sys_ni_syscall
145111 common vhangup sys_vhangup
146112 common idle sys_ni_syscall
147113 common vm86 sys_ni_syscall
148114 common wait4 sys_wait4 compat_sys_wait4
149115 nospu swapoff sys_swapoff
150116 common sysinfo sys_sysinfo compat_sys_sysinfo
151117 nospu ipc sys_ipc compat_sys_ipc
152118 common fsync sys_fsync
153119 32 sigreturn sys_sigreturn compat_sys_sigreturn
154119 64 sigreturn sys_ni_syscall
155119 spu sigreturn sys_ni_syscall
156120 nospu clone ppc_clone
157121 common setdomainname sys_setdomainname
158122 common uname sys_newuname
159123 common modify_ldt sys_ni_syscall
160124 common adjtimex sys_adjtimex compat_sys_adjtimex
161125 common mprotect sys_mprotect
162126 32 sigprocmask sys_sigprocmask compat_sys_sigprocmask
163126 64 sigprocmask sys_ni_syscall
164126 spu sigprocmask sys_ni_syscall
165127 common create_module sys_ni_syscall
166128 nospu init_module sys_init_module
167129 nospu delete_module sys_delete_module
168130 common get_kernel_syms sys_ni_syscall
169131 nospu quotactl sys_quotactl
170132 common getpgid sys_getpgid
171133 common fchdir sys_fchdir
172134 common bdflush sys_bdflush
173135 common sysfs sys_sysfs
174136 32 personality sys_personality ppc64_personality
175136 64 personality ppc64_personality
176136 spu personality ppc64_personality
177137 common afs_syscall sys_ni_syscall
178138 common setfsuid sys_setfsuid
179139 common setfsgid sys_setfsgid
180140 common _llseek sys_llseek
181141 common getdents sys_getdents compat_sys_getdents
182142 common _newselect sys_select compat_sys_select
183143 common flock sys_flock
184144 common msync sys_msync
185145 common readv sys_readv compat_sys_readv
186146 common writev sys_writev compat_sys_writev
187147 common getsid sys_getsid
188148 common fdatasync sys_fdatasync
189149 nospu _sysctl sys_sysctl compat_sys_sysctl
190150 common mlock sys_mlock
191151 common munlock sys_munlock
192152 common mlockall sys_mlockall
193153 common munlockall sys_munlockall
194154 common sched_setparam sys_sched_setparam
195155 common sched_getparam sys_sched_getparam
196156 common sched_setscheduler sys_sched_setscheduler
197157 common sched_getscheduler sys_sched_getscheduler
198158 common sched_yield sys_sched_yield
199159 common sched_get_priority_max sys_sched_get_priority_max
200160 common sched_get_priority_min sys_sched_get_priority_min
201161 common sched_rr_get_interval sys_sched_rr_get_interval compat_sys_sched_rr_get_interval
202162 common nanosleep sys_nanosleep compat_sys_nanosleep
203163 common mremap sys_mremap
204164 common setresuid sys_setresuid
205165 common getresuid sys_getresuid
206166 common query_module sys_ni_syscall
207167 common poll sys_poll
208168 common nfsservctl sys_ni_syscall
209169 common setresgid sys_setresgid
210170 common getresgid sys_getresgid
211171 common prctl sys_prctl
212172 nospu rt_sigreturn sys_rt_sigreturn compat_sys_rt_sigreturn
213173 nospu rt_sigaction sys_rt_sigaction compat_sys_rt_sigaction
214174 nospu rt_sigprocmask sys_rt_sigprocmask compat_sys_rt_sigprocmask
215175 nospu rt_sigpending sys_rt_sigpending compat_sys_rt_sigpending
216176 nospu rt_sigtimedwait sys_rt_sigtimedwait compat_sys_rt_sigtimedwait
217177 nospu rt_sigqueueinfo sys_rt_sigqueueinfo compat_sys_rt_sigqueueinfo
218178 nospu rt_sigsuspend sys_rt_sigsuspend compat_sys_rt_sigsuspend
219179 common pread64 sys_pread64 compat_sys_pread64
220180 common pwrite64 sys_pwrite64 compat_sys_pwrite64
221181 common chown sys_chown
222182 common getcwd sys_getcwd
223183 common capget sys_capget
224184 common capset sys_capset
225185 nospu sigaltstack sys_sigaltstack compat_sys_sigaltstack
226186 32 sendfile sys_sendfile compat_sys_sendfile
227186 64 sendfile sys_sendfile64
228186 spu sendfile sys_sendfile64
229187 common getpmsg sys_ni_syscall
230188 common putpmsg sys_ni_syscall
231189 nospu vfork ppc_vfork
232190 common ugetrlimit sys_getrlimit compat_sys_getrlimit
233191 common readahead sys_readahead compat_sys_readahead
234192 32 mmap2 sys_mmap2 compat_sys_mmap2
235193 32 truncate64 sys_truncate64 compat_sys_truncate64
236194 32 ftruncate64 sys_ftruncate64 compat_sys_ftruncate64
237195 32 stat64 sys_stat64
238196 32 lstat64 sys_lstat64
239197 32 fstat64 sys_fstat64
240198 nospu pciconfig_read sys_pciconfig_read
241199 nospu pciconfig_write sys_pciconfig_write
242200 nospu pciconfig_iobase sys_pciconfig_iobase
243201 common multiplexer sys_ni_syscall
244202 common getdents64 sys_getdents64
245203 common pivot_root sys_pivot_root
246204 32 fcntl64 sys_fcntl64 compat_sys_fcntl64
247205 common madvise sys_madvise
248206 common mincore sys_mincore
249207 common gettid sys_gettid
250208 common tkill sys_tkill
251209 common setxattr sys_setxattr
252210 common lsetxattr sys_lsetxattr
253211 common fsetxattr sys_fsetxattr
254212 common getxattr sys_getxattr
255213 common lgetxattr sys_lgetxattr
256214 common fgetxattr sys_fgetxattr
257215 common listxattr sys_listxattr
258216 common llistxattr sys_llistxattr
259217 common flistxattr sys_flistxattr
260218 common removexattr sys_removexattr
261219 common lremovexattr sys_lremovexattr
262220 common fremovexattr sys_fremovexattr
263221 common futex sys_futex compat_sys_futex
264222 common sched_setaffinity sys_sched_setaffinity compat_sys_sched_setaffinity
265223 common sched_getaffinity sys_sched_getaffinity compat_sys_sched_getaffinity
266# 224 unused
267225 common tuxcall sys_ni_syscall
268226 32 sendfile64 sys_sendfile64 compat_sys_sendfile64
269227 common io_setup sys_io_setup compat_sys_io_setup
270228 common io_destroy sys_io_destroy
271229 common io_getevents sys_io_getevents compat_sys_io_getevents
272230 common io_submit sys_io_submit compat_sys_io_submit
273231 common io_cancel sys_io_cancel
274232 nospu set_tid_address sys_set_tid_address
275233 common fadvise64 sys_fadvise64 ppc32_fadvise64
276234 nospu exit_group sys_exit_group
277235 nospu lookup_dcookie sys_lookup_dcookie compat_sys_lookup_dcookie
278236 common epoll_create sys_epoll_create
279237 common epoll_ctl sys_epoll_ctl
280238 common epoll_wait sys_epoll_wait
281239 common remap_file_pages sys_remap_file_pages
282240 common timer_create sys_timer_create compat_sys_timer_create
283241 common timer_settime sys_timer_settime compat_sys_timer_settime
284242 common timer_gettime sys_timer_gettime compat_sys_timer_gettime
285243 common timer_getoverrun sys_timer_getoverrun
286244 common timer_delete sys_timer_delete
287245 common clock_settime sys_clock_settime compat_sys_clock_settime
288246 common clock_gettime sys_clock_gettime compat_sys_clock_gettime
289247 common clock_getres sys_clock_getres compat_sys_clock_getres
290248 common clock_nanosleep sys_clock_nanosleep compat_sys_clock_nanosleep
291249 32 swapcontext ppc_swapcontext ppc32_swapcontext
292249 64 swapcontext ppc64_swapcontext
293249 spu swapcontext sys_ni_syscall
294250 common tgkill sys_tgkill
295251 common utimes sys_utimes compat_sys_utimes
296252 common statfs64 sys_statfs64 compat_sys_statfs64
297253 common fstatfs64 sys_fstatfs64 compat_sys_fstatfs64
298254 32 fadvise64_64 ppc_fadvise64_64
299254 spu fadvise64_64 sys_ni_syscall
300255 common rtas sys_rtas
301256 32 sys_debug_setcontext sys_debug_setcontext sys_ni_syscall
302256 64 sys_debug_setcontext sys_ni_syscall
303256 spu sys_debug_setcontext sys_ni_syscall
304# 257 reserved for vserver
305258 nospu migrate_pages sys_migrate_pages compat_sys_migrate_pages
306259 nospu mbind sys_mbind compat_sys_mbind
307260 nospu get_mempolicy sys_get_mempolicy compat_sys_get_mempolicy
308261 nospu set_mempolicy sys_set_mempolicy compat_sys_set_mempolicy
309262 nospu mq_open sys_mq_open compat_sys_mq_open
310263 nospu mq_unlink sys_mq_unlink
311264 nospu mq_timedsend sys_mq_timedsend compat_sys_mq_timedsend
312265 nospu mq_timedreceive sys_mq_timedreceive compat_sys_mq_timedreceive
313266 nospu mq_notify sys_mq_notify compat_sys_mq_notify
314267 nospu mq_getsetattr sys_mq_getsetattr compat_sys_mq_getsetattr
315268 nospu kexec_load sys_kexec_load compat_sys_kexec_load
316269 nospu add_key sys_add_key
317270 nospu request_key sys_request_key
318271 nospu keyctl sys_keyctl compat_sys_keyctl
319272 nospu waitid sys_waitid compat_sys_waitid
320273 nospu ioprio_set sys_ioprio_set
321274 nospu ioprio_get sys_ioprio_get
322275 nospu inotify_init sys_inotify_init
323276 nospu inotify_add_watch sys_inotify_add_watch
324277 nospu inotify_rm_watch sys_inotify_rm_watch
325278 nospu spu_run sys_spu_run
326279 nospu spu_create sys_spu_create
327280 nospu pselect6 sys_pselect6 compat_sys_pselect6
328281 nospu ppoll sys_ppoll compat_sys_ppoll
329282 common unshare sys_unshare
330283 common splice sys_splice
331284 common tee sys_tee
332285 common vmsplice sys_vmsplice compat_sys_vmsplice
333286 common openat sys_openat compat_sys_openat
334287 common mkdirat sys_mkdirat
335288 common mknodat sys_mknodat
336289 common fchownat sys_fchownat
337290 common futimesat sys_futimesat compat_sys_futimesat
338291 32 fstatat64 sys_fstatat64
339291 64 newfstatat sys_newfstatat
340291 spu newfstatat sys_newfstatat
341292 common unlinkat sys_unlinkat
342293 common renameat sys_renameat
343294 common linkat sys_linkat
344295 common symlinkat sys_symlinkat
345296 common readlinkat sys_readlinkat
346297 common fchmodat sys_fchmodat
347298 common faccessat sys_faccessat
348299 common get_robust_list sys_get_robust_list compat_sys_get_robust_list
349300 common set_robust_list sys_set_robust_list compat_sys_set_robust_list
350301 common move_pages sys_move_pages compat_sys_move_pages
351302 common getcpu sys_getcpu
352303 nospu epoll_pwait sys_epoll_pwait compat_sys_epoll_pwait
353304 common utimensat sys_utimensat compat_sys_utimensat
354305 common signalfd sys_signalfd compat_sys_signalfd
355306 common timerfd_create sys_timerfd_create
356307 common eventfd sys_eventfd
357308 common sync_file_range2 sys_sync_file_range2 compat_sys_sync_file_range2
358309 nospu fallocate sys_fallocate compat_sys_fallocate
359310 nospu subpage_prot sys_subpage_prot
360311 common timerfd_settime sys_timerfd_settime compat_sys_timerfd_settime
361312 common timerfd_gettime sys_timerfd_gettime compat_sys_timerfd_gettime
362313 common signalfd4 sys_signalfd4 compat_sys_signalfd4
363314 common eventfd2 sys_eventfd2
364315 common epoll_create1 sys_epoll_create1
365316 common dup3 sys_dup3
366317 common pipe2 sys_pipe2
367318 nospu inotify_init1 sys_inotify_init1
368319 common perf_event_open sys_perf_event_open
369320 common preadv sys_preadv compat_sys_preadv
370321 common pwritev sys_pwritev compat_sys_pwritev
371322 nospu rt_tgsigqueueinfo sys_rt_tgsigqueueinfo compat_sys_rt_tgsigqueueinfo
372323 nospu fanotify_init sys_fanotify_init
373324 nospu fanotify_mark sys_fanotify_mark compat_sys_fanotify_mark
374325 common prlimit64 sys_prlimit64
375326 common socket sys_socket
376327 common bind sys_bind
377328 common connect sys_connect
378329 common listen sys_listen
379330 common accept sys_accept
380331 common getsockname sys_getsockname
381332 common getpeername sys_getpeername
382333 common socketpair sys_socketpair
383334 common send sys_send
384335 common sendto sys_sendto
385336 common recv sys_recv compat_sys_recv
386337 common recvfrom sys_recvfrom compat_sys_recvfrom
387338 common shutdown sys_shutdown
388339 common setsockopt sys_setsockopt compat_sys_setsockopt
389340 common getsockopt sys_getsockopt compat_sys_getsockopt
390341 common sendmsg sys_sendmsg compat_sys_sendmsg
391342 common recvmsg sys_recvmsg compat_sys_recvmsg
392343 common recvmmsg sys_recvmmsg compat_sys_recvmmsg
393344 common accept4 sys_accept4
394345 common name_to_handle_at sys_name_to_handle_at
395346 common open_by_handle_at sys_open_by_handle_at compat_sys_open_by_handle_at
396347 common clock_adjtime sys_clock_adjtime compat_sys_clock_adjtime
397348 common syncfs sys_syncfs
398349 common sendmmsg sys_sendmmsg compat_sys_sendmmsg
399350 common setns sys_setns
400351 nospu process_vm_readv sys_process_vm_readv compat_sys_process_vm_readv
401352 nospu process_vm_writev sys_process_vm_writev compat_sys_process_vm_writev
402353 nospu finit_module sys_finit_module
403354 nospu kcmp sys_kcmp
404355 common sched_setattr sys_sched_setattr
405356 common sched_getattr sys_sched_getattr
406357 common renameat2 sys_renameat2
407358 common seccomp sys_seccomp
408359 common getrandom sys_getrandom
409360 common memfd_create sys_memfd_create
410361 common bpf sys_bpf
411362 nospu execveat sys_execveat compat_sys_execveat
412363 32 switch_endian sys_ni_syscall
413363 64 switch_endian ppc_switch_endian
414363 spu switch_endian sys_ni_syscall
415364 common userfaultfd sys_userfaultfd
416365 common membarrier sys_membarrier
417378 nospu mlock2 sys_mlock2
418379 nospu copy_file_range sys_copy_file_range
419380 common preadv2 sys_preadv2 compat_sys_preadv2
420381 common pwritev2 sys_pwritev2 compat_sys_pwritev2
421382 nospu kexec_file_load sys_kexec_file_load
422383 nospu statx sys_statx
423384 nospu pkey_alloc sys_pkey_alloc
424385 nospu pkey_free sys_pkey_free
425386 nospu pkey_mprotect sys_pkey_mprotect
426387 nospu rseq sys_rseq
427388 nospu io_pgetevents sys_io_pgetevents compat_sys_io_pgetevents
diff --git a/arch/powerpc/kernel/syscalls/syscallhdr.sh b/arch/powerpc/kernel/syscalls/syscallhdr.sh
new file mode 100644
index 000000000000..c0a9a32937f1
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/syscallhdr.sh
@@ -0,0 +1,37 @@
1#!/bin/sh
2# SPDX-License-Identifier: GPL-2.0
3
4in="$1"
5out="$2"
6my_abis=`echo "($3)" | tr ',' '|'`
7prefix="$4"
8offset="$5"
9
10fileguard=_UAPI_ASM_POWERPC_`basename "$out" | sed \
11 -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
12 -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
13grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
14 printf "#ifndef %s\n" "${fileguard}"
15 printf "#define %s\n" "${fileguard}"
16 printf "\n"
17
18 nxt=0
19 while read nr abi name entry compat ; do
20 if [ -z "$offset" ]; then
21 printf "#define __NR_%s%s\t%s\n" \
22 "${prefix}" "${name}" "${nr}"
23 else
24 printf "#define __NR_%s%s\t(%s + %s)\n" \
25 "${prefix}" "${name}" "${offset}" "${nr}"
26 fi
27 nxt=$((nr+1))
28 done
29
30 printf "\n"
31 printf "#ifdef __KERNEL__\n"
32 printf "#define __NR_syscalls\t%s\n" "${nxt}"
33 printf "#endif\n"
34 printf "\n"
35 printf "#endif /* %s */" "${fileguard}"
36 printf "\n"
37) > "$out"
diff --git a/arch/powerpc/kernel/syscalls/syscalltbl.sh b/arch/powerpc/kernel/syscalls/syscalltbl.sh
new file mode 100644
index 000000000000..fd620490a542
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/syscalltbl.sh
@@ -0,0 +1,36 @@
1#!/bin/sh
2# SPDX-License-Identifier: GPL-2.0
3
4in="$1"
5out="$2"
6my_abis=`echo "($3)" | tr ',' '|'`
7my_abi="$4"
8offset="$5"
9
10emit() {
11 t_nxt="$1"
12 t_nr="$2"
13 t_entry="$3"
14
15 while [ $t_nxt -lt $t_nr ]; do
16 printf "__SYSCALL(%s,sys_ni_syscall, )\n" "${t_nxt}"
17 t_nxt=$((t_nxt+1))
18 done
19 printf "__SYSCALL(%s,%s, )\n" "${t_nxt}" "${t_entry}"
20}
21
22grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
23 nxt=0
24 if [ -z "$offset" ]; then
25 offset=0
26 fi
27
28 while read nr abi name entry compat ; do
29 if [ "$my_abi" = "c32" ] && [ ! -z "$compat" ]; then
30 emit $((nxt+offset)) $((nr+offset)) $compat
31 else
32 emit $((nxt+offset)) $((nr+offset)) $entry
33 fi
34 nxt=$((nr+1))
35 done
36) > "$out"
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 755dc98a57ae..e8e93c2c7d03 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -457,7 +457,7 @@ static ssize_t __used \
457#define HAS_PPC_PMC_CLASSIC 1 457#define HAS_PPC_PMC_CLASSIC 1
458#define HAS_PPC_PMC_IBM 1 458#define HAS_PPC_PMC_IBM 1
459#define HAS_PPC_PMC_PA6T 1 459#define HAS_PPC_PMC_PA6T 1
460#elif defined(CONFIG_6xx) 460#elif defined(CONFIG_PPC_BOOK3S_32)
461#define HAS_PPC_PMC_CLASSIC 1 461#define HAS_PPC_PMC_CLASSIC 1
462#define HAS_PPC_PMC_IBM 1 462#define HAS_PPC_PMC_IBM 1
463#define HAS_PPC_PMC_G4 1 463#define HAS_PPC_PMC_G4 1
diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S
index 919a32746ede..23265a28740b 100644
--- a/arch/powerpc/kernel/systbl.S
+++ b/arch/powerpc/kernel/systbl.S
@@ -16,28 +16,6 @@
16 16
17#include <asm/ppc_asm.h> 17#include <asm/ppc_asm.h>
18 18
19#ifdef CONFIG_PPC64
20#define SYSCALL(func) .8byte DOTSYM(sys_##func),DOTSYM(sys_##func)
21#define COMPAT_SYS(func) .8byte DOTSYM(sys_##func),DOTSYM(compat_sys_##func)
22#define PPC_SYS(func) .8byte DOTSYM(ppc_##func),DOTSYM(ppc_##func)
23#define OLDSYS(func) .8byte DOTSYM(sys_ni_syscall),DOTSYM(sys_ni_syscall)
24#define SYS32ONLY(func) .8byte DOTSYM(sys_ni_syscall),DOTSYM(compat_sys_##func)
25#define PPC64ONLY(func) .8byte DOTSYM(ppc_##func),DOTSYM(sys_ni_syscall)
26#define SYSX(f, f3264, f32) .8byte DOTSYM(f),DOTSYM(f3264)
27#else
28#define SYSCALL(func) .long sys_##func
29#define COMPAT_SYS(func) .long sys_##func
30#define PPC_SYS(func) .long ppc_##func
31#define OLDSYS(func) .long sys_##func
32#define SYS32ONLY(func) .long sys_##func
33#define PPC64ONLY(func) .long sys_ni_syscall
34#define SYSX(f, f3264, f32) .long f32
35#endif
36#define SYSCALL_SPU(func) SYSCALL(func)
37#define COMPAT_SYS_SPU(func) COMPAT_SYS(func)
38#define COMPAT_SPU_NEW(func) COMPAT_SYS(func)
39#define SYSX_SPU(f, f3264, f32) SYSX(f, f3264, f32)
40
41.section .rodata,"a" 19.section .rodata,"a"
42 20
43#ifdef CONFIG_PPC64 21#ifdef CONFIG_PPC64
@@ -46,5 +24,21 @@
46 24
47.globl sys_call_table 25.globl sys_call_table
48sys_call_table: 26sys_call_table:
27#ifdef CONFIG_PPC64
28#define __SYSCALL(nr, entry, nargs) .8byte DOTSYM(entry)
29#include <asm/syscall_table_64.h>
30#undef __SYSCALL
31#else
32#define __SYSCALL(nr, entry, nargs) .long entry
33#include <asm/syscall_table_32.h>
34#undef __SYSCALL
35#endif
49 36
50#include <asm/systbl.h> 37#ifdef CONFIG_COMPAT
38.globl compat_sys_call_table
39compat_sys_call_table:
40#define compat_sys_sigsuspend sys_sigsuspend
41#define __SYSCALL(nr, entry, nargs) .8byte DOTSYM(entry)
42#include <asm/syscall_table_c32.h>
43#undef __SYSCALL
44#endif
diff --git a/arch/powerpc/kernel/systbl_chk.c b/arch/powerpc/kernel/systbl_chk.c
deleted file mode 100644
index 4653258722ac..000000000000
--- a/arch/powerpc/kernel/systbl_chk.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * This file, when run through CPP produces a list of syscall numbers
3 * in the order of systbl.h. That way we can check for gaps and syscalls
4 * that are out of order.
5 *
6 * Unfortunately, we cannot check for the correct ordering of entries
7 * using SYSX().
8 *
9 * Copyright © IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16#include <asm/unistd.h>
17
18#define SYSCALL(func) __NR_##func
19#define COMPAT_SYS(func) __NR_##func
20#define PPC_SYS(func) __NR_##func
21#ifdef CONFIG_PPC64
22#define OLDSYS(func) -1
23#define SYS32ONLY(func) -1
24#define PPC64ONLY(func) __NR_##func
25#else
26#define OLDSYS(func) __NR_old##func
27#define SYS32ONLY(func) __NR_##func
28#define PPC64ONLY(func) -1
29#endif
30#define SYSX(f, f3264, f32) -1
31
32#define SYSCALL_SPU(func) SYSCALL(func)
33#define COMPAT_SYS_SPU(func) COMPAT_SYS(func)
34#define COMPAT_SPU_NEW(func) COMPAT_SYS(_new##func)
35#define SYSX_SPU(f, f3264, f32) SYSX(f, f3264, f32)
36
37/* Just insert a marker for ni_syscalls */
38#define __NR_ni_syscall -1
39
40/*
41 * These are the known exceptions.
42 * Hopefully, there will be no more.
43 */
44#define __NR_llseek __NR__llseek
45#undef __NR_umount
46#define __NR_umount __NR_umount2
47#define __NR_old_getrlimit __NR_getrlimit
48#define __NR_newstat __NR_stat
49#define __NR_newlstat __NR_lstat
50#define __NR_newfstat __NR_fstat
51#define __NR_newuname __NR_uname
52#define __NR_sysctl __NR__sysctl
53#define __NR_olddebug_setcontext __NR_sys_debug_setcontext
54
55/* We call sys_ugetrlimit for syscall number __NR_getrlimit */
56#define getrlimit ugetrlimit
57
58START_TABLE
59#include <asm/systbl.h>
60END_TABLE NR_syscalls
diff --git a/arch/powerpc/kernel/trace/ftrace.c b/arch/powerpc/kernel/trace/ftrace.c
index b65c8a34ad6e..29746dc28df5 100644
--- a/arch/powerpc/kernel/trace/ftrace.c
+++ b/arch/powerpc/kernel/trace/ftrace.c
@@ -107,7 +107,7 @@ static int is_b_op(unsigned int op)
107 107
108static unsigned long find_bl_target(unsigned long ip, unsigned int op) 108static unsigned long find_bl_target(unsigned long ip, unsigned int op)
109{ 109{
110 static int offset; 110 int offset;
111 111
112 offset = (op & 0x03fffffc); 112 offset = (op & 0x03fffffc);
113 /* make it signed */ 113 /* make it signed */
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 9a86572db1ef..00af2c4febf4 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1434,7 +1434,8 @@ void program_check_exception(struct pt_regs *regs)
1434 goto bail; 1434 goto bail;
1435 } else { 1435 } else {
1436 printk(KERN_EMERG "Unexpected TM Bad Thing exception " 1436 printk(KERN_EMERG "Unexpected TM Bad Thing exception "
1437 "at %lx (msr 0x%lx)\n", regs->nip, regs->msr); 1437 "at %lx (msr 0x%lx) tm_scratch=%llx\n",
1438 regs->nip, regs->msr, get_paca()->tm_scratch);
1438 die("Unrecoverable exception", regs, SIGABRT); 1439 die("Unrecoverable exception", regs, SIGABRT);
1439 } 1440 }
1440 } 1441 }
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 65b3bdb99f0b..7725a9714736 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -671,15 +671,18 @@ static void __init vdso_setup_syscall_map(void)
671{ 671{
672 unsigned int i; 672 unsigned int i;
673 extern unsigned long *sys_call_table; 673 extern unsigned long *sys_call_table;
674#ifdef CONFIG_PPC64
675 extern unsigned long *compat_sys_call_table;
676#endif
674 extern unsigned long sys_ni_syscall; 677 extern unsigned long sys_ni_syscall;
675 678
676 679
677 for (i = 0; i < NR_syscalls; i++) { 680 for (i = 0; i < NR_syscalls; i++) {
678#ifdef CONFIG_PPC64 681#ifdef CONFIG_PPC64
679 if (sys_call_table[i*2] != sys_ni_syscall) 682 if (sys_call_table[i] != sys_ni_syscall)
680 vdso_data->syscall_map_64[i >> 5] |= 683 vdso_data->syscall_map_64[i >> 5] |=
681 0x80000000UL >> (i & 0x1f); 684 0x80000000UL >> (i & 0x1f);
682 if (sys_call_table[i*2+1] != sys_ni_syscall) 685 if (compat_sys_call_table[i] != sys_ni_syscall)
683 vdso_data->syscall_map_32[i >> 5] |= 686 vdso_data->syscall_map_32[i >> 5] |=
684 0x80000000UL >> (i & 0x1f); 687 0x80000000UL >> (i & 0x1f);
685#else /* CONFIG_PPC64 */ 688#else /* CONFIG_PPC64 */
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 434581bcd5b4..ad1c77f71f54 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -170,6 +170,14 @@ SECTIONS
170 } 170 }
171#endif /* CONFIG_PPC_BARRIER_NOSPEC */ 171#endif /* CONFIG_PPC_BARRIER_NOSPEC */
172 172
173#ifdef CONFIG_PPC_FSL_BOOK3E
174 . = ALIGN(8);
175 __spec_btb_flush_fixup : AT(ADDR(__spec_btb_flush_fixup) - LOAD_OFFSET) {
176 __start__btb_flush_fixup = .;
177 *(__btb_flush_fixup)
178 __stop__btb_flush_fixup = .;
179 }
180#endif
173 EXCEPTION_TABLE(0) 181 EXCEPTION_TABLE(0)
174 182
175 NOTES :kernel :notes 183 NOTES :kernel :notes
@@ -206,12 +214,6 @@ SECTIONS
206 214
207 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { 215 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
208 INIT_DATA 216 INIT_DATA
209 __vtop_table_begin = .;
210 KEEP(*(.vtop_fixup));
211 __vtop_table_end = .;
212 __ptov_table_begin = .;
213 KEEP(*(.ptov_fixup));
214 __ptov_table_end = .;
215 } 217 }
216 218
217 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { 219 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
@@ -308,6 +310,10 @@ SECTIONS
308#ifdef CONFIG_PPC32 310#ifdef CONFIG_PPC32
309 .data : AT(ADDR(.data) - LOAD_OFFSET) { 311 .data : AT(ADDR(.data) - LOAD_OFFSET) {
310 DATA_DATA 312 DATA_DATA
313#ifdef CONFIG_UBSAN
314 *(.data..Lubsan_data*)
315 *(.data..Lubsan_type*)
316#endif
311 *(.data.rel*) 317 *(.data.rel*)
312 *(SDATA_MAIN) 318 *(SDATA_MAIN)
313 *(.sdata2) 319 *(.sdata2)
diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c
index 62a8d03ba7e9..532ab79734c7 100644
--- a/arch/powerpc/kvm/book3s_64_vio.c
+++ b/arch/powerpc/kvm/book3s_64_vio.c
@@ -397,12 +397,13 @@ static long kvmppc_tce_validate(struct kvmppc_spapr_tce_table *stt,
397 return H_SUCCESS; 397 return H_SUCCESS;
398} 398}
399 399
400static void kvmppc_clear_tce(struct iommu_table *tbl, unsigned long entry) 400static void kvmppc_clear_tce(struct mm_struct *mm, struct iommu_table *tbl,
401 unsigned long entry)
401{ 402{
402 unsigned long hpa = 0; 403 unsigned long hpa = 0;
403 enum dma_data_direction dir = DMA_NONE; 404 enum dma_data_direction dir = DMA_NONE;
404 405
405 iommu_tce_xchg(tbl, entry, &hpa, &dir); 406 iommu_tce_xchg(mm, tbl, entry, &hpa, &dir);
406} 407}
407 408
408static long kvmppc_tce_iommu_mapped_dec(struct kvm *kvm, 409static long kvmppc_tce_iommu_mapped_dec(struct kvm *kvm,
@@ -433,7 +434,7 @@ static long kvmppc_tce_iommu_do_unmap(struct kvm *kvm,
433 unsigned long hpa = 0; 434 unsigned long hpa = 0;
434 long ret; 435 long ret;
435 436
436 if (WARN_ON_ONCE(iommu_tce_xchg(tbl, entry, &hpa, &dir))) 437 if (WARN_ON_ONCE(iommu_tce_xchg(kvm->mm, tbl, entry, &hpa, &dir)))
437 return H_TOO_HARD; 438 return H_TOO_HARD;
438 439
439 if (dir == DMA_NONE) 440 if (dir == DMA_NONE)
@@ -441,7 +442,7 @@ static long kvmppc_tce_iommu_do_unmap(struct kvm *kvm,
441 442
442 ret = kvmppc_tce_iommu_mapped_dec(kvm, tbl, entry); 443 ret = kvmppc_tce_iommu_mapped_dec(kvm, tbl, entry);
443 if (ret != H_SUCCESS) 444 if (ret != H_SUCCESS)
444 iommu_tce_xchg(tbl, entry, &hpa, &dir); 445 iommu_tce_xchg(kvm->mm, tbl, entry, &hpa, &dir);
445 446
446 return ret; 447 return ret;
447} 448}
@@ -487,7 +488,7 @@ long kvmppc_tce_iommu_do_map(struct kvm *kvm, struct iommu_table *tbl,
487 if (mm_iommu_mapped_inc(mem)) 488 if (mm_iommu_mapped_inc(mem))
488 return H_TOO_HARD; 489 return H_TOO_HARD;
489 490
490 ret = iommu_tce_xchg(tbl, entry, &hpa, &dir); 491 ret = iommu_tce_xchg(kvm->mm, tbl, entry, &hpa, &dir);
491 if (WARN_ON_ONCE(ret)) { 492 if (WARN_ON_ONCE(ret)) {
492 mm_iommu_mapped_dec(mem); 493 mm_iommu_mapped_dec(mem);
493 return H_TOO_HARD; 494 return H_TOO_HARD;
@@ -566,7 +567,7 @@ long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
566 entry, ua, dir); 567 entry, ua, dir);
567 568
568 if (ret != H_SUCCESS) { 569 if (ret != H_SUCCESS) {
569 kvmppc_clear_tce(stit->tbl, entry); 570 kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
570 goto unlock_exit; 571 goto unlock_exit;
571 } 572 }
572 } 573 }
@@ -655,7 +656,8 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
655 iommu_tce_direction(tce)); 656 iommu_tce_direction(tce));
656 657
657 if (ret != H_SUCCESS) { 658 if (ret != H_SUCCESS) {
658 kvmppc_clear_tce(stit->tbl, entry); 659 kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl,
660 entry);
659 goto unlock_exit; 661 goto unlock_exit;
660 } 662 }
661 } 663 }
@@ -704,7 +706,7 @@ long kvmppc_h_stuff_tce(struct kvm_vcpu *vcpu,
704 return ret; 706 return ret;
705 707
706 WARN_ON_ONCE(1); 708 WARN_ON_ONCE(1);
707 kvmppc_clear_tce(stit->tbl, entry); 709 kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
708 } 710 }
709 } 711 }
710 712
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 051af7d97327..4e5081e58409 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -75,6 +75,10 @@
75 PPC_LL r1, VCPU_HOST_STACK(r4) 75 PPC_LL r1, VCPU_HOST_STACK(r4)
76 PPC_LL r2, HOST_R2(r1) 76 PPC_LL r2, HOST_R2(r1)
77 77
78START_BTB_FLUSH_SECTION
79 BTB_FLUSH(r10)
80END_BTB_FLUSH_SECTION
81
78 mfspr r10, SPRN_PID 82 mfspr r10, SPRN_PID
79 lwz r8, VCPU_HOST_PID(r4) 83 lwz r8, VCPU_HOST_PID(r4)
80 PPC_LL r11, VCPU_SHARED(r4) 84 PPC_LL r11, VCPU_SHARED(r4)
diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 94f04fcb373e..962ee90a0dfe 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -20,7 +20,7 @@
20#define KVM_E500_H 20#define KVM_E500_H
21 21
22#include <linux/kvm_host.h> 22#include <linux/kvm_host.h>
23#include <asm/mmu-book3e.h> 23#include <asm/nohash/mmu-book3e.h>
24#include <asm/tlb.h> 24#include <asm/tlb.h>
25#include <asm/cputhreads.h> 25#include <asm/cputhreads.h>
26 26
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index 3f8189eb56ed..fde1de08b4d7 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -277,6 +277,13 @@ int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_va
277 vcpu->arch.pwrmgtcr0 = spr_val; 277 vcpu->arch.pwrmgtcr0 = spr_val;
278 break; 278 break;
279 279
280 case SPRN_BUCSR:
281 /*
282 * If we are here, it means that we have already flushed the
283 * branch predictor, so just return to guest.
284 */
285 break;
286
280 /* extra exceptions */ 287 /* extra exceptions */
281#ifdef CONFIG_SPE_POSSIBLE 288#ifdef CONFIG_SPE_POSSIBLE
282 case SPRN_IVOR32: 289 case SPRN_IVOR32:
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 89502cbccb1b..506413a2c25e 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -204,22 +204,6 @@ int patch_branch(unsigned int *addr, unsigned long target, int flags)
204 return patch_instruction(addr, create_branch(addr, target, flags)); 204 return patch_instruction(addr, create_branch(addr, target, flags));
205} 205}
206 206
207int patch_branch_site(s32 *site, unsigned long target, int flags)
208{
209 unsigned int *addr;
210
211 addr = (unsigned int *)((unsigned long)site + *site);
212 return patch_instruction(addr, create_branch(addr, target, flags));
213}
214
215int patch_instruction_site(s32 *site, unsigned int instr)
216{
217 unsigned int *addr;
218
219 addr = (unsigned int *)((unsigned long)site + *site);
220 return patch_instruction(addr, instr);
221}
222
223bool is_offset_in_branch_range(long offset) 207bool is_offset_in_branch_range(long offset)
224{ 208{
225 /* 209 /*
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index e613b02bb2f0..5169cc805464 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -118,7 +118,7 @@ void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
118} 118}
119 119
120#ifdef CONFIG_PPC_BOOK3S_64 120#ifdef CONFIG_PPC_BOOK3S_64
121void do_stf_entry_barrier_fixups(enum stf_barrier_type types) 121static void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
122{ 122{
123 unsigned int instrs[3], *dest; 123 unsigned int instrs[3], *dest;
124 long *start, *end; 124 long *start, *end;
@@ -168,7 +168,7 @@ void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
168 : "unknown"); 168 : "unknown");
169} 169}
170 170
171void do_stf_exit_barrier_fixups(enum stf_barrier_type types) 171static void do_stf_exit_barrier_fixups(enum stf_barrier_type types)
172{ 172{
173 unsigned int instrs[6], *dest; 173 unsigned int instrs[6], *dest;
174 long *start, *end; 174 long *start, *end;
@@ -347,6 +347,29 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_
347 347
348 printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i); 348 printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
349} 349}
350
351static void patch_btb_flush_section(long *curr)
352{
353 unsigned int *start, *end;
354
355 start = (void *)curr + *curr;
356 end = (void *)curr + *(curr + 1);
357 for (; start < end; start++) {
358 pr_devel("patching dest %lx\n", (unsigned long)start);
359 patch_instruction(start, PPC_INST_NOP);
360 }
361}
362
363void do_btb_flush_fixups(void)
364{
365 long *start, *end;
366
367 start = PTRRELOC(&__start__btb_flush_fixup);
368 end = PTRRELOC(&__stop__btb_flush_fixup);
369
370 for (; start < end; start += 2)
371 patch_btb_flush_section(start);
372}
350#endif /* CONFIG_PPC_FSL_BOOK3E */ 373#endif /* CONFIG_PPC_FSL_BOOK3E */
351 374
352void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end) 375void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 12d92518e898..ea2b9af08a48 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -29,6 +29,7 @@
29#include <asm/mmu.h> 29#include <asm/mmu.h>
30#include <asm/page.h> 30#include <asm/page.h>
31#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
32#include <asm/code-patching.h>
32 33
33#include "mmu_decl.h" 34#include "mmu_decl.h"
34 35
@@ -43,22 +44,13 @@ unsigned long tlb_47x_boltmap[1024/8];
43 44
44static void ppc44x_update_tlb_hwater(void) 45static void ppc44x_update_tlb_hwater(void)
45{ 46{
46 extern unsigned int tlb_44x_patch_hwater_D[];
47 extern unsigned int tlb_44x_patch_hwater_I[];
48
49 /* The TLB miss handlers hard codes the watermark in a cmpli 47 /* The TLB miss handlers hard codes the watermark in a cmpli
50 * instruction to improve performances rather than loading it 48 * instruction to improve performances rather than loading it
51 * from the global variable. Thus, we patch the instructions 49 * from the global variable. Thus, we patch the instructions
52 * in the 2 TLB miss handlers when updating the value 50 * in the 2 TLB miss handlers when updating the value
53 */ 51 */
54 tlb_44x_patch_hwater_D[0] = (tlb_44x_patch_hwater_D[0] & 0xffff0000) | 52 modify_instruction_site(&patch__tlb_44x_hwater_D, 0xffff, tlb_44x_hwater);
55 tlb_44x_hwater; 53 modify_instruction_site(&patch__tlb_44x_hwater_I, 0xffff, tlb_44x_hwater);
56 flush_icache_range((unsigned long)&tlb_44x_patch_hwater_D[0],
57 (unsigned long)&tlb_44x_patch_hwater_D[1]);
58 tlb_44x_patch_hwater_I[0] = (tlb_44x_patch_hwater_I[0] & 0xffff0000) |
59 tlb_44x_hwater;
60 flush_icache_range((unsigned long)&tlb_44x_patch_hwater_I[0],
61 (unsigned long)&tlb_44x_patch_hwater_I[1]);
62} 54}
63 55
64/* 56/*
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 01b7f5107c3a..bfa503cff351 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -100,11 +100,7 @@ static void __init mmu_mapin_immr(void)
100 100
101static void __init mmu_patch_cmp_limit(s32 *site, unsigned long mapped) 101static void __init mmu_patch_cmp_limit(s32 *site, unsigned long mapped)
102{ 102{
103 unsigned int instr = *(unsigned int *)patch_site_addr(site); 103 modify_instruction_site(site, 0xffff, (unsigned long)__va(mapped) >> 16);
104
105 instr &= 0xffff0000;
106 instr |= (unsigned long)__va(mapped) >> 16;
107 patch_instruction_site(site, instr);
108} 104}
109 105
110unsigned long __init mmu_mapin_ram(unsigned long top) 106unsigned long __init mmu_mapin_ram(unsigned long top)
@@ -175,12 +171,12 @@ void set_context(unsigned long id, pgd_t *pgd)
175 *(ptr + 1) = pgd; 171 *(ptr + 1) = pgd;
176#endif 172#endif
177 173
178 /* Register M_TW will contain base address of level 1 table minus the 174 /* Register M_TWB will contain base address of level 1 table minus the
179 * lower part of the kernel PGDIR base address, so that all accesses to 175 * lower part of the kernel PGDIR base address, so that all accesses to
180 * level 1 table are done relative to lower part of kernel PGDIR base 176 * level 1 table are done relative to lower part of kernel PGDIR base
181 * address. 177 * address.
182 */ 178 */
183 mtspr(SPRN_M_TW, __pa(pgd) - offset); 179 mtspr(SPRN_M_TWB, __pa(pgd) - offset);
184 180
185 /* Update context */ 181 /* Update context */
186 mtspr(SPRN_M_CASID, id - 1); 182 mtspr(SPRN_M_CASID, id - 1);
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index ca96e7be4d0e..f965fc33a8b7 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -15,10 +15,13 @@ obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
15obj-$(CONFIG_PPC_BOOK3E) += tlb_low_$(BITS)e.o 15obj-$(CONFIG_PPC_BOOK3E) += tlb_low_$(BITS)e.o
16hash64-$(CONFIG_PPC_NATIVE) := hash_native_64.o 16hash64-$(CONFIG_PPC_NATIVE) := hash_native_64.o
17obj-$(CONFIG_PPC_BOOK3E_64) += pgtable-book3e.o 17obj-$(CONFIG_PPC_BOOK3E_64) += pgtable-book3e.o
18obj-$(CONFIG_PPC_BOOK3S_64) += pgtable-hash64.o hash_utils_64.o slb.o $(hash64-y) mmu_context_book3s64.o pgtable-book3s64.o 18obj-$(CONFIG_PPC_BOOK3S_64) += pgtable-hash64.o hash_utils_64.o slb.o \
19 $(hash64-y) mmu_context_book3s64.o \
20 pgtable-book3s64.o pgtable-frag.o
21obj-$(CONFIG_PPC32) += pgtable-frag.o
19obj-$(CONFIG_PPC_RADIX_MMU) += pgtable-radix.o tlb-radix.o 22obj-$(CONFIG_PPC_RADIX_MMU) += pgtable-radix.o tlb-radix.o
20obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o hash_low_32.o mmu_context_hash32.o 23obj-$(CONFIG_PPC_BOOK3S_32) += ppc_mmu_32.o hash_low_32.o mmu_context_hash32.o
21obj-$(CONFIG_PPC_STD_MMU) += tlb_hash$(BITS).o 24obj-$(CONFIG_PPC_BOOK3S) += tlb_hash$(BITS).o
22ifdef CONFIG_PPC_BOOK3S_64 25ifdef CONFIG_PPC_BOOK3S_64
23obj-$(CONFIG_PPC_4K_PAGES) += hash64_4k.o 26obj-$(CONFIG_PPC_4K_PAGES) += hash64_4k.o
24obj-$(CONFIG_PPC_64K_PAGES) += hash64_64k.o 27obj-$(CONFIG_PPC_64K_PAGES) += hash64_64k.o
@@ -47,7 +50,7 @@ ifdef CONFIG_PPC_PTDUMP
47obj-$(CONFIG_4xx) += dump_linuxpagetables-generic.o 50obj-$(CONFIG_4xx) += dump_linuxpagetables-generic.o
48obj-$(CONFIG_PPC_8xx) += dump_linuxpagetables-8xx.o 51obj-$(CONFIG_PPC_8xx) += dump_linuxpagetables-8xx.o
49obj-$(CONFIG_PPC_BOOK3E_MMU) += dump_linuxpagetables-generic.o 52obj-$(CONFIG_PPC_BOOK3E_MMU) += dump_linuxpagetables-generic.o
50obj-$(CONFIG_PPC_BOOK3S_32) += dump_linuxpagetables-generic.o 53obj-$(CONFIG_PPC_BOOK3S_32) += dump_linuxpagetables-generic.o dump_bats.o dump_sr.o
51obj-$(CONFIG_PPC_BOOK3S_64) += dump_linuxpagetables-book3s64.o 54obj-$(CONFIG_PPC_BOOK3S_64) += dump_linuxpagetables-book3s64.o
52endif 55endif
53obj-$(CONFIG_PPC_HTDUMP) += dump_hashpagetable.o 56obj-$(CONFIG_PPC_HTDUMP) += dump_hashpagetable.o
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index b6e7b5952ab5..e955539686a4 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -29,7 +29,7 @@
29#include <linux/string.h> 29#include <linux/string.h>
30#include <linux/types.h> 30#include <linux/types.h>
31#include <linux/highmem.h> 31#include <linux/highmem.h>
32#include <linux/dma-mapping.h> 32#include <linux/dma-direct.h>
33#include <linux/export.h> 33#include <linux/export.h>
34 34
35#include <asm/tlbflush.h> 35#include <asm/tlbflush.h>
@@ -151,8 +151,8 @@ static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsi
151 * Allocate DMA-coherent memory space and return both the kernel remapped 151 * Allocate DMA-coherent memory space and return both the kernel remapped
152 * virtual and bus address for that space. 152 * virtual and bus address for that space.
153 */ 153 */
154void * 154void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
155__dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) 155 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
156{ 156{
157 struct page *page; 157 struct page *page;
158 struct ppc_vm_region *c; 158 struct ppc_vm_region *c;
@@ -223,7 +223,7 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
223 /* 223 /*
224 * Set the "dma handle" 224 * Set the "dma handle"
225 */ 225 */
226 *handle = page_to_phys(page); 226 *dma_handle = phys_to_dma(dev, page_to_phys(page));
227 227
228 do { 228 do {
229 SetPageReserved(page); 229 SetPageReserved(page);
@@ -249,12 +249,12 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
249 no_page: 249 no_page:
250 return NULL; 250 return NULL;
251} 251}
252EXPORT_SYMBOL(__dma_alloc_coherent);
253 252
254/* 253/*
255 * free a page as defined by the above mapping. 254 * free a page as defined by the above mapping.
256 */ 255 */
257void __dma_free_coherent(size_t size, void *vaddr) 256void __dma_nommu_free_coherent(struct device *dev, size_t size, void *vaddr,
257 dma_addr_t dma_handle, unsigned long attrs)
258{ 258{
259 struct ppc_vm_region *c; 259 struct ppc_vm_region *c;
260 unsigned long flags, addr; 260 unsigned long flags, addr;
@@ -309,7 +309,6 @@ void __dma_free_coherent(size_t size, void *vaddr)
309 __func__, vaddr); 309 __func__, vaddr);
310 dump_stack(); 310 dump_stack();
311} 311}
312EXPORT_SYMBOL(__dma_free_coherent);
313 312
314/* 313/*
315 * make an area consistent. 314 * make an area consistent.
@@ -401,7 +400,7 @@ EXPORT_SYMBOL(__dma_sync_page);
401 400
402/* 401/*
403 * Return the PFN for a given cpu virtual address returned by 402 * Return the PFN for a given cpu virtual address returned by
404 * __dma_alloc_coherent. This is used by dma_mmap_coherent() 403 * __dma_nommu_alloc_coherent. This is used by dma_mmap_coherent()
405 */ 404 */
406unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr) 405unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr)
407{ 406{
diff --git a/arch/powerpc/mm/dump_bats.c b/arch/powerpc/mm/dump_bats.c
new file mode 100644
index 000000000000..a0d23e96e841
--- /dev/null
+++ b/arch/powerpc/mm/dump_bats.c
@@ -0,0 +1,173 @@
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018, Christophe Leroy CS S.I.
4 * <christophe.leroy@c-s.fr>
5 *
6 * This dumps the content of BATS
7 */
8
9#include <asm/debugfs.h>
10#include <asm/pgtable.h>
11#include <asm/cpu_has_feature.h>
12
13static char *pp_601(int k, int pp)
14{
15 if (pp == 0)
16 return k ? "NA" : "RWX";
17 if (pp == 1)
18 return k ? "ROX" : "RWX";
19 if (pp == 2)
20 return k ? "RWX" : "RWX";
21 return k ? "ROX" : "ROX";
22}
23
24static void bat_show_601(struct seq_file *m, int idx, u32 lower, u32 upper)
25{
26 u32 blpi = upper & 0xfffe0000;
27 u32 k = (upper >> 2) & 3;
28 u32 pp = upper & 3;
29 phys_addr_t pbn = PHYS_BAT_ADDR(lower);
30 u32 bsm = lower & 0x3ff;
31 u32 size = (bsm + 1) << 17;
32
33 seq_printf(m, "%d: ", idx);
34 if (!(lower & 0x40)) {
35 seq_puts(m, " -\n");
36 return;
37 }
38
39 seq_printf(m, "0x%08x-0x%08x ", blpi, blpi + size - 1);
40#ifdef CONFIG_PHYS_64BIT
41 seq_printf(m, "0x%016llx ", pbn);
42#else
43 seq_printf(m, "0x%08x ", pbn);
44#endif
45
46 seq_printf(m, "Kernel %s User %s", pp_601(k & 2, pp), pp_601(k & 1, pp));
47
48 if (lower & _PAGE_WRITETHRU)
49 seq_puts(m, "write through ");
50 if (lower & _PAGE_NO_CACHE)
51 seq_puts(m, "no cache ");
52 if (lower & _PAGE_COHERENT)
53 seq_puts(m, "coherent ");
54 seq_puts(m, "\n");
55}
56
57#define BAT_SHOW_601(_m, _n, _l, _u) bat_show_601(_m, _n, mfspr(_l), mfspr(_u))
58
59static int bats_show_601(struct seq_file *m, void *v)
60{
61 seq_puts(m, "---[ Block Address Translation ]---\n");
62
63 BAT_SHOW_601(m, 0, SPRN_IBAT0L, SPRN_IBAT0U);
64 BAT_SHOW_601(m, 1, SPRN_IBAT1L, SPRN_IBAT1U);
65 BAT_SHOW_601(m, 2, SPRN_IBAT2L, SPRN_IBAT2U);
66 BAT_SHOW_601(m, 3, SPRN_IBAT3L, SPRN_IBAT3U);
67
68 return 0;
69}
70
71static void bat_show_603(struct seq_file *m, int idx, u32 lower, u32 upper, bool is_d)
72{
73 u32 bepi = upper & 0xfffe0000;
74 u32 bl = (upper >> 2) & 0x7ff;
75 u32 k = upper & 3;
76 phys_addr_t brpn = PHYS_BAT_ADDR(lower);
77 u32 size = (bl + 1) << 17;
78
79 seq_printf(m, "%d: ", idx);
80 if (k == 0) {
81 seq_puts(m, " -\n");
82 return;
83 }
84
85 seq_printf(m, "0x%08x-0x%08x ", bepi, bepi + size - 1);
86#ifdef CONFIG_PHYS_64BIT
87 seq_printf(m, "0x%016llx ", brpn);
88#else
89 seq_printf(m, "0x%08x ", brpn);
90#endif
91
92 if (k == 1)
93 seq_puts(m, "User ");
94 else if (k == 2)
95 seq_puts(m, "Kernel ");
96 else
97 seq_puts(m, "Kernel/User ");
98
99 if (lower & BPP_RX)
100 seq_puts(m, is_d ? "RO " : "EXEC ");
101 else if (lower & BPP_RW)
102 seq_puts(m, is_d ? "RW " : "EXEC ");
103 else
104 seq_puts(m, is_d ? "NA " : "NX ");
105
106 if (lower & _PAGE_WRITETHRU)
107 seq_puts(m, "write through ");
108 if (lower & _PAGE_NO_CACHE)
109 seq_puts(m, "no cache ");
110 if (lower & _PAGE_COHERENT)
111 seq_puts(m, "coherent ");
112 if (lower & _PAGE_GUARDED)
113 seq_puts(m, "guarded ");
114 seq_puts(m, "\n");
115}
116
117#define BAT_SHOW_603(_m, _n, _l, _u, _d) bat_show_603(_m, _n, mfspr(_l), mfspr(_u), _d)
118
119static int bats_show_603(struct seq_file *m, void *v)
120{
121 seq_puts(m, "---[ Instruction Block Address Translation ]---\n");
122
123 BAT_SHOW_603(m, 0, SPRN_IBAT0L, SPRN_IBAT0U, false);
124 BAT_SHOW_603(m, 1, SPRN_IBAT1L, SPRN_IBAT1U, false);
125 BAT_SHOW_603(m, 2, SPRN_IBAT2L, SPRN_IBAT2U, false);
126 BAT_SHOW_603(m, 3, SPRN_IBAT3L, SPRN_IBAT3U, false);
127 if (mmu_has_feature(MMU_FTR_USE_HIGH_BATS)) {
128 BAT_SHOW_603(m, 4, SPRN_IBAT4L, SPRN_IBAT4U, false);
129 BAT_SHOW_603(m, 5, SPRN_IBAT5L, SPRN_IBAT5U, false);
130 BAT_SHOW_603(m, 6, SPRN_IBAT6L, SPRN_IBAT6U, false);
131 BAT_SHOW_603(m, 7, SPRN_IBAT7L, SPRN_IBAT7U, false);
132 }
133
134 seq_puts(m, "\n---[ Data Block Address Translation ]---\n");
135
136 BAT_SHOW_603(m, 0, SPRN_DBAT0L, SPRN_DBAT0U, true);
137 BAT_SHOW_603(m, 1, SPRN_DBAT1L, SPRN_DBAT1U, true);
138 BAT_SHOW_603(m, 2, SPRN_DBAT2L, SPRN_DBAT2U, true);
139 BAT_SHOW_603(m, 3, SPRN_DBAT3L, SPRN_DBAT3U, true);
140 if (mmu_has_feature(MMU_FTR_USE_HIGH_BATS)) {
141 BAT_SHOW_603(m, 4, SPRN_DBAT4L, SPRN_DBAT4U, true);
142 BAT_SHOW_603(m, 5, SPRN_DBAT5L, SPRN_DBAT5U, true);
143 BAT_SHOW_603(m, 6, SPRN_DBAT6L, SPRN_DBAT6U, true);
144 BAT_SHOW_603(m, 7, SPRN_DBAT7L, SPRN_DBAT7U, true);
145 }
146
147 return 0;
148}
149
150static int bats_open(struct inode *inode, struct file *file)
151{
152 if (cpu_has_feature(CPU_FTR_601))
153 return single_open(file, bats_show_601, NULL);
154
155 return single_open(file, bats_show_603, NULL);
156}
157
158static const struct file_operations bats_fops = {
159 .open = bats_open,
160 .read = seq_read,
161 .llseek = seq_lseek,
162 .release = single_release,
163};
164
165static int __init bats_init(void)
166{
167 struct dentry *debugfs_file;
168
169 debugfs_file = debugfs_create_file("block_address_translation", 0400,
170 powerpc_debugfs_root, NULL, &bats_fops);
171 return debugfs_file ? 0 : -ENOMEM;
172}
173device_initcall(bats_init);
diff --git a/arch/powerpc/mm/dump_linuxpagetables-generic.c b/arch/powerpc/mm/dump_linuxpagetables-generic.c
index 1e3829ec1348..3fe98a0974c6 100644
--- a/arch/powerpc/mm/dump_linuxpagetables-generic.c
+++ b/arch/powerpc/mm/dump_linuxpagetables-generic.c
@@ -21,13 +21,11 @@ static const struct flag_info flag_array[] = {
21 .set = "rw", 21 .set = "rw",
22 .clear = "r ", 22 .clear = "r ",
23 }, { 23 }, {
24#ifndef CONFIG_PPC_BOOK3S_32
25 .mask = _PAGE_EXEC, 24 .mask = _PAGE_EXEC,
26 .val = _PAGE_EXEC, 25 .val = _PAGE_EXEC,
27 .set = " X ", 26 .set = " X ",
28 .clear = " ", 27 .clear = " ",
29 }, { 28 }, {
30#endif
31 .mask = _PAGE_PRESENT, 29 .mask = _PAGE_PRESENT,
32 .val = _PAGE_PRESENT, 30 .val = _PAGE_PRESENT,
33 .set = "present", 31 .set = "present",
diff --git a/arch/powerpc/mm/dump_sr.c b/arch/powerpc/mm/dump_sr.c
new file mode 100644
index 000000000000..501843664bb9
--- /dev/null
+++ b/arch/powerpc/mm/dump_sr.c
@@ -0,0 +1,64 @@
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018, Christophe Leroy CS S.I.
4 * <christophe.leroy@c-s.fr>
5 *
6 * This dumps the content of Segment Registers
7 */
8
9#include <asm/debugfs.h>
10
11static void seg_show(struct seq_file *m, int i)
12{
13 u32 val = mfsrin(i << 28);
14
15 seq_printf(m, "0x%01x0000000-0x%01xfffffff ", i, i);
16 seq_printf(m, "Kern key %d ", (val >> 30) & 1);
17 seq_printf(m, "User key %d ", (val >> 29) & 1);
18 if (val & 0x80000000) {
19 seq_printf(m, "Device 0x%03x", (val >> 20) & 0x1ff);
20 seq_printf(m, "-0x%05x", val & 0xfffff);
21 } else {
22 if (val & 0x10000000)
23 seq_puts(m, "No Exec ");
24 seq_printf(m, "VSID 0x%06x", val & 0xffffff);
25 }
26 seq_puts(m, "\n");
27}
28
29static int sr_show(struct seq_file *m, void *v)
30{
31 int i;
32
33 seq_puts(m, "---[ User Segments ]---\n");
34 for (i = 0; i < TASK_SIZE >> 28; i++)
35 seg_show(m, i);
36
37 seq_puts(m, "\n---[ Kernel Segments ]---\n");
38 for (; i < 16; i++)
39 seg_show(m, i);
40
41 return 0;
42}
43
44static int sr_open(struct inode *inode, struct file *file)
45{
46 return single_open(file, sr_show, NULL);
47}
48
49static const struct file_operations sr_fops = {
50 .open = sr_open,
51 .read = seq_read,
52 .llseek = seq_lseek,
53 .release = single_release,
54};
55
56static int __init sr_init(void)
57{
58 struct dentry *debugfs_file;
59
60 debugfs_file = debugfs_create_file("segment_registers", 0400,
61 powerpc_debugfs_root, NULL, &sr_fops);
62 return debugfs_file ? 0 : -ENOMEM;
63}
64device_initcall(sr_init);
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 2e6fb1d758c3..a6dcfda3e11e 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -226,7 +226,9 @@ static int mm_fault_error(struct pt_regs *regs, unsigned long addr,
226static bool bad_kernel_fault(bool is_exec, unsigned long error_code, 226static bool bad_kernel_fault(bool is_exec, unsigned long error_code,
227 unsigned long address) 227 unsigned long address)
228{ 228{
229 if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT))) { 229 /* NX faults set DSISR_PROTFAULT on the 8xx, DSISR_NOEXEC_OR_G on others */
230 if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT |
231 DSISR_PROTFAULT))) {
230 printk_ratelimited(KERN_CRIT "kernel tried to execute" 232 printk_ratelimited(KERN_CRIT "kernel tried to execute"
231 " exec-protected page (%lx) -" 233 " exec-protected page (%lx) -"
232 "exploit attempt? (uid: %d)\n", 234 "exploit attempt? (uid: %d)\n",
@@ -341,10 +343,21 @@ static inline void cmo_account_page_fault(void)
341static inline void cmo_account_page_fault(void) { } 343static inline void cmo_account_page_fault(void) { }
342#endif /* CONFIG_PPC_SMLPAR */ 344#endif /* CONFIG_PPC_SMLPAR */
343 345
344#ifdef CONFIG_PPC_STD_MMU 346#ifdef CONFIG_PPC_BOOK3S
345static void sanity_check_fault(bool is_write, unsigned long error_code) 347static void sanity_check_fault(bool is_write, bool is_user,
348 unsigned long error_code, unsigned long address)
346{ 349{
347 /* 350 /*
351 * Userspace trying to access kernel address, we get PROTFAULT for that.
352 */
353 if (is_user && address >= TASK_SIZE) {
354 pr_crit_ratelimited("%s[%d]: User access of kernel address (%lx) - exploit attempt? (uid: %d)\n",
355 current->comm, current->pid, address,
356 from_kuid(&init_user_ns, current_uid()));
357 return;
358 }
359
360 /*
348 * For hash translation mode, we should never get a 361 * For hash translation mode, we should never get a
349 * PROTFAULT. Any update to pte to reduce access will result in us 362 * PROTFAULT. Any update to pte to reduce access will result in us
350 * removing the hash page table entry, thus resulting in a DSISR_NOHPTE 363 * removing the hash page table entry, thus resulting in a DSISR_NOHPTE
@@ -373,12 +386,15 @@ static void sanity_check_fault(bool is_write, unsigned long error_code)
373 * For radix, we can get prot fault for autonuma case, because radix 386 * For radix, we can get prot fault for autonuma case, because radix
374 * page table will have them marked noaccess for user. 387 * page table will have them marked noaccess for user.
375 */ 388 */
376 if (!radix_enabled() && !is_write) 389 if (radix_enabled() || is_write)
377 WARN_ON_ONCE(error_code & DSISR_PROTFAULT); 390 return;
391
392 WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
378} 393}
379#else 394#else
380static void sanity_check_fault(bool is_write, unsigned long error_code) { } 395static void sanity_check_fault(bool is_write, bool is_user,
381#endif /* CONFIG_PPC_STD_MMU */ 396 unsigned long error_code, unsigned long address) { }
397#endif /* CONFIG_PPC_BOOK3S */
382 398
383/* 399/*
384 * Define the correct "is_write" bit in error_code based 400 * Define the correct "is_write" bit in error_code based
@@ -435,7 +451,7 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
435 } 451 }
436 452
437 /* Additional sanity check(s) */ 453 /* Additional sanity check(s) */
438 sanity_check_fault(is_write, error_code); 454 sanity_check_fault(is_write, is_user, error_code, address);
439 455
440 /* 456 /*
441 * The kernel should never take an execute fault nor should it 457 * The kernel should never take an execute fault nor should it
@@ -637,21 +653,22 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
637 case 0x300: 653 case 0x300:
638 case 0x380: 654 case 0x380:
639 case 0xe00: 655 case 0xe00:
640 printk(KERN_ALERT "Unable to handle kernel paging request for " 656 pr_alert("BUG: %s at 0x%08lx\n",
641 "data at address 0x%08lx\n", regs->dar); 657 regs->dar < PAGE_SIZE ? "Kernel NULL pointer dereference" :
658 "Unable to handle kernel data access", regs->dar);
642 break; 659 break;
643 case 0x400: 660 case 0x400:
644 case 0x480: 661 case 0x480:
645 printk(KERN_ALERT "Unable to handle kernel paging request for " 662 pr_alert("BUG: Unable to handle kernel instruction fetch%s",
646 "instruction fetch\n"); 663 regs->nip < PAGE_SIZE ? " (NULL pointer?)\n" : "\n");
647 break; 664 break;
648 case 0x600: 665 case 0x600:
649 printk(KERN_ALERT "Unable to handle kernel paging request for " 666 pr_alert("BUG: Unable to handle kernel unaligned access at 0x%08lx\n",
650 "unaligned access at address 0x%08lx\n", regs->dar); 667 regs->dar);
651 break; 668 break;
652 default: 669 default:
653 printk(KERN_ALERT "Unable to handle kernel paging request for " 670 pr_alert("BUG: Unable to handle unknown paging fault at 0x%08lx\n",
654 "unknown fault\n"); 671 regs->dar);
655 break; 672 break;
656 } 673 }
657 printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n", 674 printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index 26acf6c8c20c..1e2df3e9f9ea 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -28,6 +28,7 @@
28#include <asm/asm-offsets.h> 28#include <asm/asm-offsets.h>
29#include <asm/export.h> 29#include <asm/export.h>
30#include <asm/feature-fixups.h> 30#include <asm/feature-fixups.h>
31#include <asm/code-patching-asm.h>
31 32
32#ifdef CONFIG_SMP 33#ifdef CONFIG_SMP
33 .section .bss 34 .section .bss
@@ -337,11 +338,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
337 rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */ 338 rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */
338 SET_V(r5) /* set V (valid) bit */ 339 SET_V(r5) /* set V (valid) bit */
339 340
341 patch_site 0f, patch__hash_page_A0
342 patch_site 1f, patch__hash_page_A1
343 patch_site 2f, patch__hash_page_A2
340 /* Get the address of the primary PTE group in the hash table (r3) */ 344 /* Get the address of the primary PTE group in the hash table (r3) */
341_GLOBAL(hash_page_patch_A) 3450: addis r0,r7,Hash_base@h /* base address of hash table */
342 addis r0,r7,Hash_base@h /* base address of hash table */ 3461: rlwimi r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */
343 rlwimi r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */ 3472: rlwinm r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
344 rlwinm r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
345 xor r3,r3,r0 /* make primary hash */ 348 xor r3,r3,r0 /* make primary hash */
346 li r0,8 /* PTEs/group */ 349 li r0,8 /* PTEs/group */
347 350
@@ -366,10 +369,10 @@ _GLOBAL(hash_page_patch_A)
366 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ 369 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
367 beq+ found_slot 370 beq+ found_slot
368 371
372 patch_site 0f, patch__hash_page_B
369 /* Search the secondary PTEG for a matching PTE */ 373 /* Search the secondary PTEG for a matching PTE */
370 ori r5,r5,PTE_H /* set H (secondary hash) bit */ 374 ori r5,r5,PTE_H /* set H (secondary hash) bit */
371_GLOBAL(hash_page_patch_B) 3750: xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
372 xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
373 xori r4,r4,(-PTEG_SIZE & 0xffff) 376 xori r4,r4,(-PTEG_SIZE & 0xffff)
374 addi r4,r4,-HPTE_SIZE 377 addi r4,r4,-HPTE_SIZE
375 mtctr r0 378 mtctr r0
@@ -393,10 +396,10 @@ _GLOBAL(hash_page_patch_B)
393 addi r6,r6,1 396 addi r6,r6,1
394 stw r6,primary_pteg_full@l(r4) 397 stw r6,primary_pteg_full@l(r4)
395 398
399 patch_site 0f, patch__hash_page_C
396 /* Search the secondary PTEG for an empty slot */ 400 /* Search the secondary PTEG for an empty slot */
397 ori r5,r5,PTE_H /* set H (secondary hash) bit */ 401 ori r5,r5,PTE_H /* set H (secondary hash) bit */
398_GLOBAL(hash_page_patch_C) 4020: xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
399 xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
400 xori r4,r4,(-PTEG_SIZE & 0xffff) 403 xori r4,r4,(-PTEG_SIZE & 0xffff)
401 addi r4,r4,-HPTE_SIZE 404 addi r4,r4,-HPTE_SIZE
402 mtctr r0 405 mtctr r0
@@ -577,11 +580,13 @@ _GLOBAL(flush_hash_pages)
577 stwcx. r8,0,r5 /* update the pte */ 580 stwcx. r8,0,r5 /* update the pte */
578 bne- 33b 581 bne- 33b
579 582
583 patch_site 0f, patch__flush_hash_A0
584 patch_site 1f, patch__flush_hash_A1
585 patch_site 2f, patch__flush_hash_A2
580 /* Get the address of the primary PTE group in the hash table (r3) */ 586 /* Get the address of the primary PTE group in the hash table (r3) */
581_GLOBAL(flush_hash_patch_A) 5870: addis r8,r7,Hash_base@h /* base address of hash table */
582 addis r8,r7,Hash_base@h /* base address of hash table */ 5881: rlwimi r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */
583 rlwimi r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */ 5892: rlwinm r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
584 rlwinm r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
585 xor r8,r0,r8 /* make primary hash */ 590 xor r8,r0,r8 /* make primary hash */
586 591
587 /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */ 592 /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
@@ -593,11 +598,11 @@ _GLOBAL(flush_hash_patch_A)
593 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ 598 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
594 beq+ 3f 599 beq+ 3f
595 600
601 patch_site 0f, patch__flush_hash_B
596 /* Search the secondary PTEG for a matching PTE */ 602 /* Search the secondary PTEG for a matching PTE */
597 ori r11,r11,PTE_H /* set H (secondary hash) bit */ 603 ori r11,r11,PTE_H /* set H (secondary hash) bit */
598 li r0,8 /* PTEs/group */ 604 li r0,8 /* PTEs/group */
599_GLOBAL(flush_hash_patch_B) 6050: xoris r12,r8,Hash_msk>>16 /* compute secondary hash */
600 xoris r12,r8,Hash_msk>>16 /* compute secondary hash */
601 xori r12,r12,(-PTEG_SIZE & 0xffff) 606 xori r12,r12,(-PTEG_SIZE & 0xffff)
602 addi r12,r12,-HPTE_SIZE 607 addi r12,r12,-HPTE_SIZE
603 mtctr r0 608 mtctr r0
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 4c01e9a01a74..9e732bb2c84a 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -42,6 +42,8 @@ EXPORT_SYMBOL(HPAGE_SHIFT);
42 42
43#define hugepd_none(hpd) (hpd_val(hpd) == 0) 43#define hugepd_none(hpd) (hpd_val(hpd) == 0)
44 44
45#define PTE_T_ORDER (__builtin_ffs(sizeof(pte_t)) - __builtin_ffs(sizeof(void *)))
46
45pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long sz) 47pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long sz)
46{ 48{
47 /* 49 /*
@@ -61,14 +63,17 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
61 int num_hugepd; 63 int num_hugepd;
62 64
63 if (pshift >= pdshift) { 65 if (pshift >= pdshift) {
64 cachep = hugepte_cache; 66 cachep = PGT_CACHE(PTE_T_ORDER);
65 num_hugepd = 1 << (pshift - pdshift); 67 num_hugepd = 1 << (pshift - pdshift);
68 } else if (IS_ENABLED(CONFIG_PPC_8xx)) {
69 cachep = PGT_CACHE(PTE_INDEX_SIZE);
70 num_hugepd = 1;
66 } else { 71 } else {
67 cachep = PGT_CACHE(pdshift - pshift); 72 cachep = PGT_CACHE(pdshift - pshift);
68 num_hugepd = 1; 73 num_hugepd = 1;
69 } 74 }
70 75
71 new = kmem_cache_zalloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL)); 76 new = kmem_cache_alloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL));
72 77
73 BUG_ON(pshift > HUGEPD_SHIFT_MASK); 78 BUG_ON(pshift > HUGEPD_SHIFT_MASK);
74 BUG_ON((unsigned long)new & HUGEPD_SHIFT_MASK); 79 BUG_ON((unsigned long)new & HUGEPD_SHIFT_MASK);
@@ -264,7 +269,7 @@ static void hugepd_free_rcu_callback(struct rcu_head *head)
264 unsigned int i; 269 unsigned int i;
265 270
266 for (i = 0; i < batch->index; i++) 271 for (i = 0; i < batch->index; i++)
267 kmem_cache_free(hugepte_cache, batch->ptes[i]); 272 kmem_cache_free(PGT_CACHE(PTE_T_ORDER), batch->ptes[i]);
268 273
269 free_page((unsigned long)batch); 274 free_page((unsigned long)batch);
270} 275}
@@ -277,7 +282,7 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
277 282
278 if (atomic_read(&tlb->mm->mm_users) < 2 || 283 if (atomic_read(&tlb->mm->mm_users) < 2 ||
279 mm_is_thread_local(tlb->mm)) { 284 mm_is_thread_local(tlb->mm)) {
280 kmem_cache_free(hugepte_cache, hugepte); 285 kmem_cache_free(PGT_CACHE(PTE_T_ORDER), hugepte);
281 put_cpu_var(hugepd_freelist_cur); 286 put_cpu_var(hugepd_freelist_cur);
282 return; 287 return;
283 } 288 }
@@ -329,6 +334,9 @@ static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshif
329 334
330 if (shift >= pdshift) 335 if (shift >= pdshift)
331 hugepd_free(tlb, hugepte); 336 hugepd_free(tlb, hugepte);
337 else if (IS_ENABLED(CONFIG_PPC_8xx))
338 pgtable_free_tlb(tlb, hugepte,
339 get_hugepd_cache_index(PTE_INDEX_SIZE));
332 else 340 else
333 pgtable_free_tlb(tlb, hugepte, 341 pgtable_free_tlb(tlb, hugepte,
334 get_hugepd_cache_index(pdshift - shift)); 342 get_hugepd_cache_index(pdshift - shift));
@@ -652,7 +660,6 @@ static int __init hugepage_setup_sz(char *str)
652} 660}
653__setup("hugepagesz=", hugepage_setup_sz); 661__setup("hugepagesz=", hugepage_setup_sz);
654 662
655struct kmem_cache *hugepte_cache;
656static int __init hugetlbpage_init(void) 663static int __init hugetlbpage_init(void)
657{ 664{
658 int psize; 665 int psize;
@@ -699,24 +706,13 @@ static int __init hugetlbpage_init(void)
699 * if we have pdshift and shift value same, we don't 706 * if we have pdshift and shift value same, we don't
700 * use pgt cache for hugepd. 707 * use pgt cache for hugepd.
701 */ 708 */
702 if (pdshift > shift) 709 if (pdshift > shift && IS_ENABLED(CONFIG_PPC_8xx))
703 pgtable_cache_add(pdshift - shift, NULL); 710 pgtable_cache_add(PTE_INDEX_SIZE);
711 else if (pdshift > shift)
712 pgtable_cache_add(pdshift - shift);
704#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx) 713#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
705 else if (!hugepte_cache) { 714 else
706 /* 715 pgtable_cache_add(PTE_T_ORDER);
707 * Create a kmem cache for hugeptes. The bottom bits in
708 * the pte have size information encoded in them, so
709 * align them to allow this
710 */
711 hugepte_cache = kmem_cache_create("hugepte-cache",
712 sizeof(pte_t),
713 HUGEPD_SHIFT_MASK + 1,
714 0, NULL);
715 if (hugepte_cache == NULL)
716 panic("%s: Unable to create kmem cache "
717 "for hugeptes\n", __func__);
718
719 }
720#endif 716#endif
721 } 717 }
722 718
diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c
index 2b656e67f2ea..1e6910eb70ed 100644
--- a/arch/powerpc/mm/init-common.c
+++ b/arch/powerpc/mm/init-common.c
@@ -25,22 +25,40 @@
25#include <asm/pgalloc.h> 25#include <asm/pgalloc.h>
26#include <asm/pgtable.h> 26#include <asm/pgtable.h>
27 27
28static void pgd_ctor(void *addr) 28#define CTOR(shift) static void ctor_##shift(void *addr) \
29{ 29{ \
30 memset(addr, 0, PGD_TABLE_SIZE); 30 memset(addr, 0, sizeof(void *) << (shift)); \
31} 31}
32 32
33static void pud_ctor(void *addr) 33CTOR(0); CTOR(1); CTOR(2); CTOR(3); CTOR(4); CTOR(5); CTOR(6); CTOR(7);
34{ 34CTOR(8); CTOR(9); CTOR(10); CTOR(11); CTOR(12); CTOR(13); CTOR(14); CTOR(15);
35 memset(addr, 0, PUD_TABLE_SIZE);
36}
37 35
38static void pmd_ctor(void *addr) 36static inline void (*ctor(int shift))(void *)
39{ 37{
40 memset(addr, 0, PMD_TABLE_SIZE); 38 BUILD_BUG_ON(MAX_PGTABLE_INDEX_SIZE != 15);
39
40 switch (shift) {
41 case 0: return ctor_0;
42 case 1: return ctor_1;
43 case 2: return ctor_2;
44 case 3: return ctor_3;
45 case 4: return ctor_4;
46 case 5: return ctor_5;
47 case 6: return ctor_6;
48 case 7: return ctor_7;
49 case 8: return ctor_8;
50 case 9: return ctor_9;
51 case 10: return ctor_10;
52 case 11: return ctor_11;
53 case 12: return ctor_12;
54 case 13: return ctor_13;
55 case 14: return ctor_14;
56 case 15: return ctor_15;
57 }
58 return NULL;
41} 59}
42 60
43struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE]; 61struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE + 1];
44EXPORT_SYMBOL_GPL(pgtable_cache); /* used by kvm_hv module */ 62EXPORT_SYMBOL_GPL(pgtable_cache); /* used by kvm_hv module */
45 63
46/* 64/*
@@ -50,7 +68,7 @@ EXPORT_SYMBOL_GPL(pgtable_cache); /* used by kvm_hv module */
50 * everything else. Caches created by this function are used for all 68 * everything else. Caches created by this function are used for all
51 * the higher level pagetables, and for hugepage pagetables. 69 * the higher level pagetables, and for hugepage pagetables.
52 */ 70 */
53void pgtable_cache_add(unsigned shift, void (*ctor)(void *)) 71void pgtable_cache_add(unsigned int shift)
54{ 72{
55 char *name; 73 char *name;
56 unsigned long table_size = sizeof(void *) << shift; 74 unsigned long table_size = sizeof(void *) << shift;
@@ -71,19 +89,19 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
71 * moment, gcc doesn't seem to recognize is_power_of_2 as a 89 * moment, gcc doesn't seem to recognize is_power_of_2 as a
72 * constant expression, so so much for that. */ 90 * constant expression, so so much for that. */
73 BUG_ON(!is_power_of_2(minalign)); 91 BUG_ON(!is_power_of_2(minalign));
74 BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE)); 92 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
75 93
76 if (PGT_CACHE(shift)) 94 if (PGT_CACHE(shift))
77 return; /* Already have a cache of this size */ 95 return; /* Already have a cache of this size */
78 96
79 align = max_t(unsigned long, align, minalign); 97 align = max_t(unsigned long, align, minalign);
80 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift); 98 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
81 new = kmem_cache_create(name, table_size, align, 0, ctor); 99 new = kmem_cache_create(name, table_size, align, 0, ctor(shift));
82 if (!new) 100 if (!new)
83 panic("Could not allocate pgtable cache for order %d", shift); 101 panic("Could not allocate pgtable cache for order %d", shift);
84 102
85 kfree(name); 103 kfree(name);
86 pgtable_cache[shift - 1] = new; 104 pgtable_cache[shift] = new;
87 105
88 pr_debug("Allocated pgtable cache for order %d\n", shift); 106 pr_debug("Allocated pgtable cache for order %d\n", shift);
89} 107}
@@ -91,15 +109,15 @@ EXPORT_SYMBOL_GPL(pgtable_cache_add); /* used by kvm_hv module */
91 109
92void pgtable_cache_init(void) 110void pgtable_cache_init(void)
93{ 111{
94 pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor); 112 pgtable_cache_add(PGD_INDEX_SIZE);
95 113
96 if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX)) 114 if (PMD_CACHE_INDEX)
97 pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor); 115 pgtable_cache_add(PMD_CACHE_INDEX);
98 /* 116 /*
99 * In all current configs, when the PUD index exists it's the 117 * In all current configs, when the PUD index exists it's the
100 * same size as either the pgd or pmd index except with THP enabled 118 * same size as either the pgd or pmd index except with THP enabled
101 * on book3s 64 119 * on book3s 64
102 */ 120 */
103 if (PUD_CACHE_INDEX && !PGT_CACHE(PUD_CACHE_INDEX)) 121 if (PUD_CACHE_INDEX)
104 pgtable_cache_add(PUD_CACHE_INDEX, pud_ctor); 122 pgtable_cache_add(PUD_CACHE_INDEX);
105} 123}
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 0a64fffabee1..20394e52fe27 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -246,35 +246,19 @@ static int __init mark_nonram_nosave(void)
246} 246}
247#endif 247#endif
248 248
249static bool zone_limits_final;
250
251/* 249/*
252 * The memory zones past TOP_ZONE are managed by generic mm code. 250 * Zones usage:
253 * These should be set to zero since that's what every other 251 *
254 * architecture does. 252 * We setup ZONE_DMA to be 31-bits on all platforms and ZONE_NORMAL to be
253 * everything else. GFP_DMA32 page allocations automatically fall back to
254 * ZONE_DMA.
255 *
256 * By using 31-bit unconditionally, we can exploit ARCH_ZONE_DMA_BITS to
257 * inform the generic DMA mapping code. 32-bit only devices (if not handled
258 * by an IOMMU anyway) will take a first dip into ZONE_NORMAL and get
259 * otherwise served by ZONE_DMA.
255 */ 260 */
256static unsigned long max_zone_pfns[MAX_NR_ZONES] = { 261static unsigned long max_zone_pfns[MAX_NR_ZONES];
257 [0 ... TOP_ZONE ] = ~0UL,
258 [TOP_ZONE + 1 ... MAX_NR_ZONES - 1] = 0
259};
260
261/*
262 * Restrict the specified zone and all more restrictive zones
263 * to be below the specified pfn. May not be called after
264 * paging_init().
265 */
266void __init limit_zone_pfn(enum zone_type zone, unsigned long pfn_limit)
267{
268 int i;
269
270 if (WARN_ON(zone_limits_final))
271 return;
272
273 for (i = zone; i >= 0; i--) {
274 if (max_zone_pfns[i] > pfn_limit)
275 max_zone_pfns[i] = pfn_limit;
276 }
277}
278 262
279/* 263/*
280 * Find the least restrictive zone that is entirely below the 264 * Find the least restrictive zone that is entirely below the
@@ -324,11 +308,14 @@ void __init paging_init(void)
324 printk(KERN_DEBUG "Memory hole size: %ldMB\n", 308 printk(KERN_DEBUG "Memory hole size: %ldMB\n",
325 (long int)((top_of_ram - total_ram) >> 20)); 309 (long int)((top_of_ram - total_ram) >> 20));
326 310
311#ifdef CONFIG_ZONE_DMA
312 max_zone_pfns[ZONE_DMA] = min(max_low_pfn, 0x7fffffffUL >> PAGE_SHIFT);
313#endif
314 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
327#ifdef CONFIG_HIGHMEM 315#ifdef CONFIG_HIGHMEM
328 limit_zone_pfn(ZONE_NORMAL, lowmem_end_addr >> PAGE_SHIFT); 316 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
329#endif 317#endif
330 limit_zone_pfn(TOP_ZONE, top_of_ram >> PAGE_SHIFT); 318
331 zone_limits_final = true;
332 free_area_init_nodes(max_zone_pfns); 319 free_area_init_nodes(max_zone_pfns);
333 320
334 mark_nonram_nosave(); 321 mark_nonram_nosave();
@@ -503,7 +490,7 @@ EXPORT_SYMBOL(flush_icache_user_range);
503void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, 490void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
504 pte_t *ptep) 491 pte_t *ptep)
505{ 492{
506#ifdef CONFIG_PPC_STD_MMU 493#ifdef CONFIG_PPC_BOOK3S
507 /* 494 /*
508 * We don't need to worry about _PAGE_PRESENT here because we are 495 * We don't need to worry about _PAGE_PRESENT here because we are
509 * called with either mm->page_table_lock held or ptl lock held 496 * called with either mm->page_table_lock held or ptl lock held
@@ -541,7 +528,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
541 } 528 }
542 529
543 hash_preload(vma->vm_mm, address, is_exec, trap); 530 hash_preload(vma->vm_mm, address, is_exec, trap);
544#endif /* CONFIG_PPC_STD_MMU */ 531#endif /* CONFIG_PPC_BOOK3S */
545#if (defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_FSL_BOOK3E)) \ 532#if (defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_FSL_BOOK3E)) \
546 && defined(CONFIG_HUGETLB_PAGE) 533 && defined(CONFIG_HUGETLB_PAGE)
547 if (is_vm_hugetlb_page(vma)) 534 if (is_vm_hugetlb_page(vma))
diff --git a/arch/powerpc/mm/mmu_context.c b/arch/powerpc/mm/mmu_context.c
index f84e14f23e50..bb52320b7369 100644
--- a/arch/powerpc/mm/mmu_context.c
+++ b/arch/powerpc/mm/mmu_context.c
@@ -15,6 +15,7 @@
15#include <linux/sched/mm.h> 15#include <linux/sched/mm.h>
16 16
17#include <asm/mmu_context.h> 17#include <asm/mmu_context.h>
18#include <asm/pgalloc.h>
18 19
19#if defined(CONFIG_PPC32) 20#if defined(CONFIG_PPC32)
20static inline void switch_mm_pgdir(struct task_struct *tsk, 21static inline void switch_mm_pgdir(struct task_struct *tsk,
@@ -97,3 +98,12 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
97 switch_mmu_context(prev, next, tsk); 98 switch_mmu_context(prev, next, tsk);
98} 99}
99 100
101#ifdef CONFIG_PPC32
102void arch_exit_mmap(struct mm_struct *mm)
103{
104 void *frag = pte_frag_get(&mm->context);
105
106 if (frag)
107 pte_frag_destroy(frag);
108}
109#endif
diff --git a/arch/powerpc/mm/mmu_context_book3s64.c b/arch/powerpc/mm/mmu_context_book3s64.c
index 510f103d7813..f720c5cc0b5e 100644
--- a/arch/powerpc/mm/mmu_context_book3s64.c
+++ b/arch/powerpc/mm/mmu_context_book3s64.c
@@ -164,21 +164,6 @@ static void destroy_contexts(mm_context_t *ctx)
164 } 164 }
165} 165}
166 166
167static void pte_frag_destroy(void *pte_frag)
168{
169 int count;
170 struct page *page;
171
172 page = virt_to_page(pte_frag);
173 /* drop all the pending references */
174 count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
175 /* We allow PTE_FRAG_NR fragments from a PTE page */
176 if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {
177 pgtable_page_dtor(page);
178 __free_page(page);
179 }
180}
181
182static void pmd_frag_destroy(void *pmd_frag) 167static void pmd_frag_destroy(void *pmd_frag)
183{ 168{
184 int count; 169 int count;
diff --git a/arch/powerpc/mm/mmu_context_iommu.c b/arch/powerpc/mm/mmu_context_iommu.c
index 56c2234cc6ae..a712a650a8b6 100644
--- a/arch/powerpc/mm/mmu_context_iommu.c
+++ b/arch/powerpc/mm/mmu_context_iommu.c
@@ -36,6 +36,8 @@ struct mm_iommu_table_group_mem_t {
36 u64 ua; /* userspace address */ 36 u64 ua; /* userspace address */
37 u64 entries; /* number of entries in hpas[] */ 37 u64 entries; /* number of entries in hpas[] */
38 u64 *hpas; /* vmalloc'ed */ 38 u64 *hpas; /* vmalloc'ed */
39#define MM_IOMMU_TABLE_INVALID_HPA ((uint64_t)-1)
40 u64 dev_hpa; /* Device memory base address */
39}; 41};
40 42
41static long mm_iommu_adjust_locked_vm(struct mm_struct *mm, 43static long mm_iommu_adjust_locked_vm(struct mm_struct *mm,
@@ -126,7 +128,8 @@ static int mm_iommu_move_page_from_cma(struct page *page)
126 return 0; 128 return 0;
127} 129}
128 130
129long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries, 131static long mm_iommu_do_alloc(struct mm_struct *mm, unsigned long ua,
132 unsigned long entries, unsigned long dev_hpa,
130 struct mm_iommu_table_group_mem_t **pmem) 133 struct mm_iommu_table_group_mem_t **pmem)
131{ 134{
132 struct mm_iommu_table_group_mem_t *mem; 135 struct mm_iommu_table_group_mem_t *mem;
@@ -140,12 +143,6 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
140 143
141 list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list, 144 list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list,
142 next) { 145 next) {
143 if ((mem->ua == ua) && (mem->entries == entries)) {
144 ++mem->used;
145 *pmem = mem;
146 goto unlock_exit;
147 }
148
149 /* Overlap? */ 146 /* Overlap? */
150 if ((mem->ua < (ua + (entries << PAGE_SHIFT))) && 147 if ((mem->ua < (ua + (entries << PAGE_SHIFT))) &&
151 (ua < (mem->ua + 148 (ua < (mem->ua +
@@ -156,11 +153,13 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
156 153
157 } 154 }
158 155
159 ret = mm_iommu_adjust_locked_vm(mm, entries, true); 156 if (dev_hpa == MM_IOMMU_TABLE_INVALID_HPA) {
160 if (ret) 157 ret = mm_iommu_adjust_locked_vm(mm, entries, true);
161 goto unlock_exit; 158 if (ret)
159 goto unlock_exit;
162 160
163 locked_entries = entries; 161 locked_entries = entries;
162 }
164 163
165 mem = kzalloc(sizeof(*mem), GFP_KERNEL); 164 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
166 if (!mem) { 165 if (!mem) {
@@ -168,6 +167,13 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
168 goto unlock_exit; 167 goto unlock_exit;
169 } 168 }
170 169
170 if (dev_hpa != MM_IOMMU_TABLE_INVALID_HPA) {
171 mem->pageshift = __ffs(dev_hpa | (entries << PAGE_SHIFT));
172 mem->dev_hpa = dev_hpa;
173 goto good_exit;
174 }
175 mem->dev_hpa = MM_IOMMU_TABLE_INVALID_HPA;
176
171 /* 177 /*
172 * For a starting point for a maximum page size calculation 178 * For a starting point for a maximum page size calculation
173 * we use @ua and @entries natural alignment to allow IOMMU pages 179 * we use @ua and @entries natural alignment to allow IOMMU pages
@@ -236,6 +242,7 @@ populate:
236 mem->hpas[i] = page_to_pfn(page) << PAGE_SHIFT; 242 mem->hpas[i] = page_to_pfn(page) << PAGE_SHIFT;
237 } 243 }
238 244
245good_exit:
239 atomic64_set(&mem->mapped, 1); 246 atomic64_set(&mem->mapped, 1);
240 mem->used = 1; 247 mem->used = 1;
241 mem->ua = ua; 248 mem->ua = ua;
@@ -252,13 +259,31 @@ unlock_exit:
252 259
253 return ret; 260 return ret;
254} 261}
255EXPORT_SYMBOL_GPL(mm_iommu_get); 262
263long mm_iommu_new(struct mm_struct *mm, unsigned long ua, unsigned long entries,
264 struct mm_iommu_table_group_mem_t **pmem)
265{
266 return mm_iommu_do_alloc(mm, ua, entries, MM_IOMMU_TABLE_INVALID_HPA,
267 pmem);
268}
269EXPORT_SYMBOL_GPL(mm_iommu_new);
270
271long mm_iommu_newdev(struct mm_struct *mm, unsigned long ua,
272 unsigned long entries, unsigned long dev_hpa,
273 struct mm_iommu_table_group_mem_t **pmem)
274{
275 return mm_iommu_do_alloc(mm, ua, entries, dev_hpa, pmem);
276}
277EXPORT_SYMBOL_GPL(mm_iommu_newdev);
256 278
257static void mm_iommu_unpin(struct mm_iommu_table_group_mem_t *mem) 279static void mm_iommu_unpin(struct mm_iommu_table_group_mem_t *mem)
258{ 280{
259 long i; 281 long i;
260 struct page *page = NULL; 282 struct page *page = NULL;
261 283
284 if (!mem->hpas)
285 return;
286
262 for (i = 0; i < mem->entries; ++i) { 287 for (i = 0; i < mem->entries; ++i) {
263 if (!mem->hpas[i]) 288 if (!mem->hpas[i])
264 continue; 289 continue;
@@ -300,6 +325,7 @@ static void mm_iommu_release(struct mm_iommu_table_group_mem_t *mem)
300long mm_iommu_put(struct mm_struct *mm, struct mm_iommu_table_group_mem_t *mem) 325long mm_iommu_put(struct mm_struct *mm, struct mm_iommu_table_group_mem_t *mem)
301{ 326{
302 long ret = 0; 327 long ret = 0;
328 unsigned long entries, dev_hpa;
303 329
304 mutex_lock(&mem_list_mutex); 330 mutex_lock(&mem_list_mutex);
305 331
@@ -321,9 +347,12 @@ long mm_iommu_put(struct mm_struct *mm, struct mm_iommu_table_group_mem_t *mem)
321 } 347 }
322 348
323 /* @mapped became 0 so now mappings are disabled, release the region */ 349 /* @mapped became 0 so now mappings are disabled, release the region */
350 entries = mem->entries;
351 dev_hpa = mem->dev_hpa;
324 mm_iommu_release(mem); 352 mm_iommu_release(mem);
325 353
326 mm_iommu_adjust_locked_vm(mm, mem->entries, false); 354 if (dev_hpa == MM_IOMMU_TABLE_INVALID_HPA)
355 mm_iommu_adjust_locked_vm(mm, entries, false);
327 356
328unlock_exit: 357unlock_exit:
329 mutex_unlock(&mem_list_mutex); 358 mutex_unlock(&mem_list_mutex);
@@ -368,27 +397,32 @@ struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(struct mm_struct *mm,
368 return ret; 397 return ret;
369} 398}
370 399
371struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm, 400struct mm_iommu_table_group_mem_t *mm_iommu_get(struct mm_struct *mm,
372 unsigned long ua, unsigned long entries) 401 unsigned long ua, unsigned long entries)
373{ 402{
374 struct mm_iommu_table_group_mem_t *mem, *ret = NULL; 403 struct mm_iommu_table_group_mem_t *mem, *ret = NULL;
375 404
405 mutex_lock(&mem_list_mutex);
406
376 list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list, next) { 407 list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list, next) {
377 if ((mem->ua == ua) && (mem->entries == entries)) { 408 if ((mem->ua == ua) && (mem->entries == entries)) {
378 ret = mem; 409 ret = mem;
410 ++mem->used;
379 break; 411 break;
380 } 412 }
381 } 413 }
382 414
415 mutex_unlock(&mem_list_mutex);
416
383 return ret; 417 return ret;
384} 418}
385EXPORT_SYMBOL_GPL(mm_iommu_find); 419EXPORT_SYMBOL_GPL(mm_iommu_get);
386 420
387long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, 421long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
388 unsigned long ua, unsigned int pageshift, unsigned long *hpa) 422 unsigned long ua, unsigned int pageshift, unsigned long *hpa)
389{ 423{
390 const long entry = (ua - mem->ua) >> PAGE_SHIFT; 424 const long entry = (ua - mem->ua) >> PAGE_SHIFT;
391 u64 *va = &mem->hpas[entry]; 425 u64 *va;
392 426
393 if (entry >= mem->entries) 427 if (entry >= mem->entries)
394 return -EFAULT; 428 return -EFAULT;
@@ -396,6 +430,12 @@ long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
396 if (pageshift > mem->pageshift) 430 if (pageshift > mem->pageshift)
397 return -EFAULT; 431 return -EFAULT;
398 432
433 if (!mem->hpas) {
434 *hpa = mem->dev_hpa + (ua - mem->ua);
435 return 0;
436 }
437
438 va = &mem->hpas[entry];
399 *hpa = (*va & MM_IOMMU_TABLE_GROUP_PAGE_MASK) | (ua & ~PAGE_MASK); 439 *hpa = (*va & MM_IOMMU_TABLE_GROUP_PAGE_MASK) | (ua & ~PAGE_MASK);
400 440
401 return 0; 441 return 0;
@@ -406,7 +446,6 @@ long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
406 unsigned long ua, unsigned int pageshift, unsigned long *hpa) 446 unsigned long ua, unsigned int pageshift, unsigned long *hpa)
407{ 447{
408 const long entry = (ua - mem->ua) >> PAGE_SHIFT; 448 const long entry = (ua - mem->ua) >> PAGE_SHIFT;
409 void *va = &mem->hpas[entry];
410 unsigned long *pa; 449 unsigned long *pa;
411 450
412 if (entry >= mem->entries) 451 if (entry >= mem->entries)
@@ -415,7 +454,12 @@ long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
415 if (pageshift > mem->pageshift) 454 if (pageshift > mem->pageshift)
416 return -EFAULT; 455 return -EFAULT;
417 456
418 pa = (void *) vmalloc_to_phys(va); 457 if (!mem->hpas) {
458 *hpa = mem->dev_hpa + (ua - mem->ua);
459 return 0;
460 }
461
462 pa = (void *) vmalloc_to_phys(&mem->hpas[entry]);
419 if (!pa) 463 if (!pa)
420 return -EFAULT; 464 return -EFAULT;
421 465
@@ -435,6 +479,9 @@ extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua)
435 if (!mem) 479 if (!mem)
436 return; 480 return;
437 481
482 if (mem->dev_hpa != MM_IOMMU_TABLE_INVALID_HPA)
483 return;
484
438 entry = (ua - mem->ua) >> PAGE_SHIFT; 485 entry = (ua - mem->ua) >> PAGE_SHIFT;
439 va = &mem->hpas[entry]; 486 va = &mem->hpas[entry];
440 487
@@ -445,6 +492,33 @@ extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua)
445 *pa |= MM_IOMMU_TABLE_GROUP_PAGE_DIRTY; 492 *pa |= MM_IOMMU_TABLE_GROUP_PAGE_DIRTY;
446} 493}
447 494
495bool mm_iommu_is_devmem(struct mm_struct *mm, unsigned long hpa,
496 unsigned int pageshift, unsigned long *size)
497{
498 struct mm_iommu_table_group_mem_t *mem;
499 unsigned long end;
500
501 list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list, next) {
502 if (mem->dev_hpa == MM_IOMMU_TABLE_INVALID_HPA)
503 continue;
504
505 end = mem->dev_hpa + (mem->entries << PAGE_SHIFT);
506 if ((mem->dev_hpa <= hpa) && (hpa < end)) {
507 /*
508 * Since the IOMMU page size might be bigger than
509 * PAGE_SIZE, the amount of preregistered memory
510 * starting from @hpa might be smaller than 1<<pageshift
511 * and the caller needs to distinguish this situation.
512 */
513 *size = min(1UL << pageshift, end - hpa);
514 return true;
515 }
516 }
517
518 return false;
519}
520EXPORT_SYMBOL_GPL(mm_iommu_is_devmem);
521
448long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem) 522long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem)
449{ 523{
450 if (atomic64_inc_not_zero(&mem->mapped)) 524 if (atomic64_inc_not_zero(&mem->mapped))
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 2faca46ad720..22d71a58167f 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -372,7 +372,6 @@ int init_new_context(struct task_struct *t, struct mm_struct *mm)
372{ 372{
373 pr_hard("initing context for mm @%p\n", mm); 373 pr_hard("initing context for mm @%p\n", mm);
374 374
375#ifdef CONFIG_PPC_MM_SLICES
376 /* 375 /*
377 * We have MMU_NO_CONTEXT set to be ~0. Hence check 376 * We have MMU_NO_CONTEXT set to be ~0. Hence check
378 * explicitly against context.id == 0. This ensures that we properly 377 * explicitly against context.id == 0. This ensures that we properly
@@ -382,9 +381,9 @@ int init_new_context(struct task_struct *t, struct mm_struct *mm)
382 */ 381 */
383 if (mm->context.id == 0) 382 if (mm->context.id == 0)
384 slice_init_new_context_exec(mm); 383 slice_init_new_context_exec(mm);
385#endif
386 mm->context.id = MMU_NO_CONTEXT; 384 mm->context.id = MMU_NO_CONTEXT;
387 mm->context.active = 0; 385 mm->context.active = 0;
386 pte_frag_set(&mm->context, NULL);
388 return 0; 387 return 0;
389} 388}
390 389
@@ -487,4 +486,3 @@ void __init mmu_context_init(void)
487 next_context = FIRST_CONTEXT; 486 next_context = FIRST_CONTEXT;
488 nr_free_contexts = LAST_CONTEXT - FIRST_CONTEXT + 1; 487 nr_free_contexts = LAST_CONTEXT - FIRST_CONTEXT + 1;
489} 488}
490
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 8574fbbc45e0..c4a717da65eb 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -155,7 +155,7 @@ struct tlbcam {
155}; 155};
156#endif 156#endif
157 157
158#if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) 158#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
159/* 6xx have BATS */ 159/* 6xx have BATS */
160/* FSL_BOOKE have TLBCAM */ 160/* FSL_BOOKE have TLBCAM */
161/* 8xx have LTLB */ 161/* 8xx have LTLB */
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index ce28ae5ca080..87f0dd004295 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1475,7 +1475,7 @@ static int dt_update_callback(struct notifier_block *nb,
1475 1475
1476 switch (action) { 1476 switch (action) {
1477 case OF_RECONFIG_UPDATE_PROPERTY: 1477 case OF_RECONFIG_UPDATE_PROPERTY:
1478 if (!of_prop_cmp(update->dn->type, "cpu") && 1478 if (of_node_is_type(update->dn, "cpu") &&
1479 !of_prop_cmp(update->prop->name, "ibm,associativity")) { 1479 !of_prop_cmp(update->prop->name, "ibm,associativity")) {
1480 u32 core_id; 1480 u32 core_id;
1481 of_property_read_u32(update->dn, "reg", &core_id); 1481 of_property_read_u32(update->dn, "reg", &core_id);
diff --git a/arch/powerpc/mm/pgtable-book3s64.c b/arch/powerpc/mm/pgtable-book3s64.c
index 9f93c9f985c5..f3c31f5e1026 100644
--- a/arch/powerpc/mm/pgtable-book3s64.c
+++ b/arch/powerpc/mm/pgtable-book3s64.c
@@ -244,6 +244,9 @@ static pmd_t *get_pmd_from_cache(struct mm_struct *mm)
244{ 244{
245 void *pmd_frag, *ret; 245 void *pmd_frag, *ret;
246 246
247 if (PMD_FRAG_NR == 1)
248 return NULL;
249
247 spin_lock(&mm->page_table_lock); 250 spin_lock(&mm->page_table_lock);
248 ret = mm->context.pmd_frag; 251 ret = mm->context.pmd_frag;
249 if (ret) { 252 if (ret) {
@@ -322,91 +325,6 @@ void pmd_fragment_free(unsigned long *pmd)
322 } 325 }
323} 326}
324 327
325static pte_t *get_pte_from_cache(struct mm_struct *mm)
326{
327 void *pte_frag, *ret;
328
329 spin_lock(&mm->page_table_lock);
330 ret = mm->context.pte_frag;
331 if (ret) {
332 pte_frag = ret + PTE_FRAG_SIZE;
333 /*
334 * If we have taken up all the fragments mark PTE page NULL
335 */
336 if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
337 pte_frag = NULL;
338 mm->context.pte_frag = pte_frag;
339 }
340 spin_unlock(&mm->page_table_lock);
341 return (pte_t *)ret;
342}
343
344static pte_t *__alloc_for_ptecache(struct mm_struct *mm, int kernel)
345{
346 void *ret = NULL;
347 struct page *page;
348
349 if (!kernel) {
350 page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);
351 if (!page)
352 return NULL;
353 if (!pgtable_page_ctor(page)) {
354 __free_page(page);
355 return NULL;
356 }
357 } else {
358 page = alloc_page(PGALLOC_GFP);
359 if (!page)
360 return NULL;
361 }
362
363 atomic_set(&page->pt_frag_refcount, 1);
364
365 ret = page_address(page);
366 /*
367 * if we support only one fragment just return the
368 * allocated page.
369 */
370 if (PTE_FRAG_NR == 1)
371 return ret;
372 spin_lock(&mm->page_table_lock);
373 /*
374 * If we find pgtable_page set, we return
375 * the allocated page with single fragement
376 * count.
377 */
378 if (likely(!mm->context.pte_frag)) {
379 atomic_set(&page->pt_frag_refcount, PTE_FRAG_NR);
380 mm->context.pte_frag = ret + PTE_FRAG_SIZE;
381 }
382 spin_unlock(&mm->page_table_lock);
383
384 return (pte_t *)ret;
385}
386
387pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
388{
389 pte_t *pte;
390
391 pte = get_pte_from_cache(mm);
392 if (pte)
393 return pte;
394
395 return __alloc_for_ptecache(mm, kernel);
396}
397
398void pte_fragment_free(unsigned long *table, int kernel)
399{
400 struct page *page = virt_to_page(table);
401
402 BUG_ON(atomic_read(&page->pt_frag_refcount) <= 0);
403 if (atomic_dec_and_test(&page->pt_frag_refcount)) {
404 if (!kernel)
405 pgtable_page_dtor(page);
406 __free_page(page);
407 }
408}
409
410static inline void pgtable_free(void *table, int index) 328static inline void pgtable_free(void *table, int index)
411{ 329{
412 switch (index) { 330 switch (index) {
diff --git a/arch/powerpc/mm/pgtable-frag.c b/arch/powerpc/mm/pgtable-frag.c
new file mode 100644
index 000000000000..af23a587f019
--- /dev/null
+++ b/arch/powerpc/mm/pgtable-frag.c
@@ -0,0 +1,119 @@
1// SPDX-License-Identifier: GPL-2.0
2
3/*
4 * Handling Page Tables through page fragments
5 *
6 */
7
8#include <linux/kernel.h>
9#include <linux/gfp.h>
10#include <linux/mm.h>
11#include <linux/percpu.h>
12#include <linux/hardirq.h>
13#include <linux/hugetlb.h>
14#include <asm/pgalloc.h>
15#include <asm/tlbflush.h>
16#include <asm/tlb.h>
17
18void pte_frag_destroy(void *pte_frag)
19{
20 int count;
21 struct page *page;
22
23 page = virt_to_page(pte_frag);
24 /* drop all the pending references */
25 count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
26 /* We allow PTE_FRAG_NR fragments from a PTE page */
27 if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {
28 pgtable_page_dtor(page);
29 __free_page(page);
30 }
31}
32
33static pte_t *get_pte_from_cache(struct mm_struct *mm)
34{
35 void *pte_frag, *ret;
36
37 if (PTE_FRAG_NR == 1)
38 return NULL;
39
40 spin_lock(&mm->page_table_lock);
41 ret = pte_frag_get(&mm->context);
42 if (ret) {
43 pte_frag = ret + PTE_FRAG_SIZE;
44 /*
45 * If we have taken up all the fragments mark PTE page NULL
46 */
47 if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
48 pte_frag = NULL;
49 pte_frag_set(&mm->context, pte_frag);
50 }
51 spin_unlock(&mm->page_table_lock);
52 return (pte_t *)ret;
53}
54
55static pte_t *__alloc_for_ptecache(struct mm_struct *mm, int kernel)
56{
57 void *ret = NULL;
58 struct page *page;
59
60 if (!kernel) {
61 page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);
62 if (!page)
63 return NULL;
64 if (!pgtable_page_ctor(page)) {
65 __free_page(page);
66 return NULL;
67 }
68 } else {
69 page = alloc_page(PGALLOC_GFP);
70 if (!page)
71 return NULL;
72 }
73
74 atomic_set(&page->pt_frag_refcount, 1);
75
76 ret = page_address(page);
77 /*
78 * if we support only one fragment just return the
79 * allocated page.
80 */
81 if (PTE_FRAG_NR == 1)
82 return ret;
83 spin_lock(&mm->page_table_lock);
84 /*
85 * If we find pgtable_page set, we return
86 * the allocated page with single fragement
87 * count.
88 */
89 if (likely(!pte_frag_get(&mm->context))) {
90 atomic_set(&page->pt_frag_refcount, PTE_FRAG_NR);
91 pte_frag_set(&mm->context, ret + PTE_FRAG_SIZE);
92 }
93 spin_unlock(&mm->page_table_lock);
94
95 return (pte_t *)ret;
96}
97
98pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
99{
100 pte_t *pte;
101
102 pte = get_pte_from_cache(mm);
103 if (pte)
104 return pte;
105
106 return __alloc_for_ptecache(mm, kernel);
107}
108
109void pte_fragment_free(unsigned long *table, int kernel)
110{
111 struct page *page = virt_to_page(table);
112
113 BUG_ON(atomic_read(&page->pt_frag_refcount) <= 0);
114 if (atomic_dec_and_test(&page->pt_frag_refcount)) {
115 if (!kernel)
116 pgtable_page_dtor(page);
117 __free_page(page);
118 }
119}
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 010e1c616cb2..d3d61d29b4f1 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -74,7 +74,7 @@ static struct page *maybe_pte_to_page(pte_t pte)
74 * support falls into the same category. 74 * support falls into the same category.
75 */ 75 */
76 76
77static pte_t set_pte_filter(pte_t pte) 77static pte_t set_pte_filter_hash(pte_t pte)
78{ 78{
79 if (radix_enabled()) 79 if (radix_enabled())
80 return pte; 80 return pte;
@@ -93,14 +93,12 @@ static pte_t set_pte_filter(pte_t pte)
93 return pte; 93 return pte;
94} 94}
95 95
96static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
97 int dirty)
98{
99 return pte;
100}
101
102#else /* CONFIG_PPC_BOOK3S */ 96#else /* CONFIG_PPC_BOOK3S */
103 97
98static pte_t set_pte_filter_hash(pte_t pte) { return pte; }
99
100#endif /* CONFIG_PPC_BOOK3S */
101
104/* Embedded type MMU with HW exec support. This is a bit more complicated 102/* Embedded type MMU with HW exec support. This is a bit more complicated
105 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so 103 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
106 * instead we "filter out" the exec permission for non clean pages. 104 * instead we "filter out" the exec permission for non clean pages.
@@ -109,6 +107,9 @@ static pte_t set_pte_filter(pte_t pte)
109{ 107{
110 struct page *pg; 108 struct page *pg;
111 109
110 if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
111 return set_pte_filter_hash(pte);
112
112 /* No exec permission in the first place, move on */ 113 /* No exec permission in the first place, move on */
113 if (!pte_exec(pte) || !pte_looks_normal(pte)) 114 if (!pte_exec(pte) || !pte_looks_normal(pte))
114 return pte; 115 return pte;
@@ -138,6 +139,9 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
138{ 139{
139 struct page *pg; 140 struct page *pg;
140 141
142 if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
143 return pte;
144
141 /* So here, we only care about exec faults, as we use them 145 /* So here, we only care about exec faults, as we use them
142 * to recover lost _PAGE_EXEC and perform I$/D$ coherency 146 * to recover lost _PAGE_EXEC and perform I$/D$ coherency
143 * if necessary. Also if _PAGE_EXEC is already set, same deal, 147 * if necessary. Also if _PAGE_EXEC is already set, same deal,
@@ -172,8 +176,6 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
172 return pte_mkexec(pte); 176 return pte_mkexec(pte);
173} 177}
174 178
175#endif /* CONFIG_PPC_BOOK3S */
176
177/* 179/*
178 * set_pte stores a linux PTE into the linux page table. 180 * set_pte stores a linux PTE into the linux page table.
179 */ 181 */
@@ -221,9 +223,9 @@ int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
221} 223}
222 224
223#ifdef CONFIG_HUGETLB_PAGE 225#ifdef CONFIG_HUGETLB_PAGE
224extern int huge_ptep_set_access_flags(struct vm_area_struct *vma, 226int huge_ptep_set_access_flags(struct vm_area_struct *vma,
225 unsigned long addr, pte_t *ptep, 227 unsigned long addr, pte_t *ptep,
226 pte_t pte, int dirty) 228 pte_t pte, int dirty)
227{ 229{
228#ifdef HUGETLB_NEED_PRELOAD 230#ifdef HUGETLB_NEED_PRELOAD
229 /* 231 /*
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index bda3c6f1bd32..d67215248d82 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -45,32 +45,15 @@ extern char etext[], _stext[], _sinittext[], _einittext[];
45 45
46__ref pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) 46__ref pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
47{ 47{
48 pte_t *pte; 48 if (!slab_is_available())
49 return memblock_alloc(PTE_FRAG_SIZE, PTE_FRAG_SIZE);
49 50
50 if (slab_is_available()) { 51 return (pte_t *)pte_fragment_alloc(mm, address, 1);
51 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
52 } else {
53 pte = __va(memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE));
54 if (pte)
55 clear_page(pte);
56 }
57 return pte;
58} 52}
59 53
60pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) 54pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
61{ 55{
62 struct page *ptepage; 56 return (pgtable_t)pte_fragment_alloc(mm, address, 0);
63
64 gfp_t flags = GFP_KERNEL | __GFP_ZERO | __GFP_ACCOUNT;
65
66 ptepage = alloc_pages(flags, 0);
67 if (!ptepage)
68 return NULL;
69 if (!pgtable_page_ctor(ptepage)) {
70 __free_page(ptepage);
71 return NULL;
72 }
73 return ptepage;
74} 57}
75 58
76void __iomem * 59void __iomem *
@@ -160,7 +143,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, pgprot_t prot, void *call
160 * Don't allow anybody to remap normal RAM that we're using. 143 * Don't allow anybody to remap normal RAM that we're using.
161 * mem_init() sets high_memory so only do the check after that. 144 * mem_init() sets high_memory so only do the check after that.
162 */ 145 */
163 if (slab_is_available() && (p < virt_to_phys(high_memory)) && 146 if (slab_is_available() && p <= virt_to_phys(high_memory - 1) &&
164 page_is_ram(__phys_to_pfn(p))) { 147 page_is_ram(__phys_to_pfn(p))) {
165 printk("__ioremap(): phys addr 0x%llx is RAM lr %ps\n", 148 printk("__ioremap(): phys addr 0x%llx is RAM lr %ps\n",
166 (unsigned long long)p, __builtin_return_address(0)); 149 (unsigned long long)p, __builtin_return_address(0));
@@ -260,7 +243,7 @@ static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
260 ktext = ((char *)v >= _stext && (char *)v < etext) || 243 ktext = ((char *)v >= _stext && (char *)v < etext) ||
261 ((char *)v >= _sinittext && (char *)v < _einittext); 244 ((char *)v >= _sinittext && (char *)v < _einittext);
262 map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL); 245 map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL);
263#ifdef CONFIG_PPC_STD_MMU_32 246#ifdef CONFIG_PPC_BOOK3S_32
264 if (ktext) 247 if (ktext)
265 hash_preload(&init_mm, v, false, 0x300); 248 hash_preload(&init_mm, v, false, 0x300);
266#endif 249#endif
diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c
index b271b283c785..587807763737 100644
--- a/arch/powerpc/mm/pkeys.c
+++ b/arch/powerpc/mm/pkeys.c
@@ -6,20 +6,21 @@
6 */ 6 */
7 7
8#include <asm/mman.h> 8#include <asm/mman.h>
9#include <asm/mmu_context.h>
9#include <asm/setup.h> 10#include <asm/setup.h>
10#include <linux/pkeys.h> 11#include <linux/pkeys.h>
11#include <linux/of_device.h> 12#include <linux/of_device.h>
12 13
13DEFINE_STATIC_KEY_TRUE(pkey_disabled); 14DEFINE_STATIC_KEY_TRUE(pkey_disabled);
14bool pkey_execute_disable_supported;
15int pkeys_total; /* Total pkeys as per device tree */ 15int pkeys_total; /* Total pkeys as per device tree */
16bool pkeys_devtree_defined; /* pkey property exported by device tree */
17u32 initial_allocation_mask; /* Bits set for the initially allocated keys */ 16u32 initial_allocation_mask; /* Bits set for the initially allocated keys */
18u32 reserved_allocation_mask; /* Bits set for reserved keys */ 17u32 reserved_allocation_mask; /* Bits set for reserved keys */
19u64 pkey_amr_mask; /* Bits in AMR not to be touched */ 18static bool pkey_execute_disable_supported;
20u64 pkey_iamr_mask; /* Bits in AMR not to be touched */ 19static bool pkeys_devtree_defined; /* property exported by device tree */
21u64 pkey_uamor_mask; /* Bits in UMOR not to be touched */ 20static u64 pkey_amr_mask; /* Bits in AMR not to be touched */
22int execute_only_key = 2; 21static u64 pkey_iamr_mask; /* Bits in AMR not to be touched */
22static u64 pkey_uamor_mask; /* Bits in UMOR not to be touched */
23static int execute_only_key = 2;
23 24
24#define AMR_BITS_PER_PKEY 2 25#define AMR_BITS_PER_PKEY 2
25#define AMR_RD_BIT 0x1UL 26#define AMR_RD_BIT 0x1UL
@@ -57,7 +58,7 @@ static inline bool pkey_mmu_enabled(void)
57 return cpu_has_feature(CPU_FTR_PKEY); 58 return cpu_has_feature(CPU_FTR_PKEY);
58} 59}
59 60
60int pkey_initialize(void) 61static int pkey_initialize(void)
61{ 62{
62 int os_reserved, i; 63 int os_reserved, i;
63 64
@@ -414,3 +415,13 @@ bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
414 415
415 return pkey_access_permitted(vma_pkey(vma), write, execute); 416 return pkey_access_permitted(vma_pkey(vma), write, execute);
416} 417}
418
419void arch_dup_pkeys(struct mm_struct *oldmm, struct mm_struct *mm)
420{
421 if (static_branch_likely(&pkey_disabled))
422 return;
423
424 /* Duplicate the oldmm pkey state in mm: */
425 mm_pkey_allocation_map(mm) = mm_pkey_allocation_map(oldmm);
426 mm->context.execute_only_pkey = oldmm->context.execute_only_pkey;
427}
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index f6f575bae3bc..3f4193201ee7 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -31,6 +31,7 @@
31#include <asm/prom.h> 31#include <asm/prom.h>
32#include <asm/mmu.h> 32#include <asm/mmu.h>
33#include <asm/machdep.h> 33#include <asm/machdep.h>
34#include <asm/code-patching.h>
34 35
35#include "mmu_decl.h" 36#include "mmu_decl.h"
36 37
@@ -52,7 +53,7 @@ struct batrange { /* stores address ranges mapped by BATs */
52phys_addr_t v_block_mapped(unsigned long va) 53phys_addr_t v_block_mapped(unsigned long va)
53{ 54{
54 int b; 55 int b;
55 for (b = 0; b < 4; ++b) 56 for (b = 0; b < ARRAY_SIZE(bat_addrs); ++b)
56 if (va >= bat_addrs[b].start && va < bat_addrs[b].limit) 57 if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
57 return bat_addrs[b].phys + (va - bat_addrs[b].start); 58 return bat_addrs[b].phys + (va - bat_addrs[b].start);
58 return 0; 59 return 0;
@@ -64,7 +65,7 @@ phys_addr_t v_block_mapped(unsigned long va)
64unsigned long p_block_mapped(phys_addr_t pa) 65unsigned long p_block_mapped(phys_addr_t pa)
65{ 66{
66 int b; 67 int b;
67 for (b = 0; b < 4; ++b) 68 for (b = 0; b < ARRAY_SIZE(bat_addrs); ++b)
68 if (pa >= bat_addrs[b].phys 69 if (pa >= bat_addrs[b].phys
69 && pa < (bat_addrs[b].limit-bat_addrs[b].start) 70 && pa < (bat_addrs[b].limit-bat_addrs[b].start)
70 +bat_addrs[b].phys) 71 +bat_addrs[b].phys)
@@ -182,22 +183,8 @@ void __init MMU_init_hw(void)
182 unsigned int hmask, mb, mb2; 183 unsigned int hmask, mb, mb2;
183 unsigned int n_hpteg, lg_n_hpteg; 184 unsigned int n_hpteg, lg_n_hpteg;
184 185
185 extern unsigned int hash_page_patch_A[]; 186 if (!mmu_has_feature(MMU_FTR_HPTE_TABLE))
186 extern unsigned int hash_page_patch_B[], hash_page_patch_C[];
187 extern unsigned int hash_page[];
188 extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
189
190 if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) {
191 /*
192 * Put a blr (procedure return) instruction at the
193 * start of hash_page, since we can still get DSI
194 * exceptions on a 603.
195 */
196 hash_page[0] = 0x4e800020;
197 flush_icache_range((unsigned long) &hash_page[0],
198 (unsigned long) &hash_page[1]);
199 return; 187 return;
200 }
201 188
202 if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105); 189 if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105);
203 190
@@ -244,31 +231,19 @@ void __init MMU_init_hw(void)
244 if (lg_n_hpteg > 16) 231 if (lg_n_hpteg > 16)
245 mb2 = 16 - LG_HPTEG_SIZE; 232 mb2 = 16 - LG_HPTEG_SIZE;
246 233
247 hash_page_patch_A[0] = (hash_page_patch_A[0] & ~0xffff) 234 modify_instruction_site(&patch__hash_page_A0, 0xffff, (unsigned int)Hash >> 16);
248 | ((unsigned int)(Hash) >> 16); 235 modify_instruction_site(&patch__hash_page_A1, 0x7c0, mb << 6);
249 hash_page_patch_A[1] = (hash_page_patch_A[1] & ~0x7c0) | (mb << 6); 236 modify_instruction_site(&patch__hash_page_A2, 0x7c0, mb2 << 6);
250 hash_page_patch_A[2] = (hash_page_patch_A[2] & ~0x7c0) | (mb2 << 6); 237 modify_instruction_site(&patch__hash_page_B, 0xffff, hmask);
251 hash_page_patch_B[0] = (hash_page_patch_B[0] & ~0xffff) | hmask; 238 modify_instruction_site(&patch__hash_page_C, 0xffff, hmask);
252 hash_page_patch_C[0] = (hash_page_patch_C[0] & ~0xffff) | hmask;
253
254 /*
255 * Ensure that the locations we've patched have been written
256 * out from the data cache and invalidated in the instruction
257 * cache, on those machines with split caches.
258 */
259 flush_icache_range((unsigned long) &hash_page_patch_A[0],
260 (unsigned long) &hash_page_patch_C[1]);
261 239
262 /* 240 /*
263 * Patch up the instructions in hashtable.S:flush_hash_page 241 * Patch up the instructions in hashtable.S:flush_hash_page
264 */ 242 */
265 flush_hash_patch_A[0] = (flush_hash_patch_A[0] & ~0xffff) 243 modify_instruction_site(&patch__flush_hash_A0, 0xffff, (unsigned int)Hash >> 16);
266 | ((unsigned int)(Hash) >> 16); 244 modify_instruction_site(&patch__flush_hash_A1, 0x7c0, mb << 6);
267 flush_hash_patch_A[1] = (flush_hash_patch_A[1] & ~0x7c0) | (mb << 6); 245 modify_instruction_site(&patch__flush_hash_A2, 0x7c0, mb2 << 6);
268 flush_hash_patch_A[2] = (flush_hash_patch_A[2] & ~0x7c0) | (mb2 << 6); 246 modify_instruction_site(&patch__flush_hash_B, 0xffff, hmask);
269 flush_hash_patch_B[0] = (flush_hash_patch_B[0] & ~0xffff) | hmask;
270 flush_icache_range((unsigned long) &flush_hash_patch_A[0],
271 (unsigned long) &flush_hash_patch_B[1]);
272 247
273 if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205); 248 if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205);
274} 249}
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 7fd20c52a8ec..9ed90064f542 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -70,6 +70,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
70 std r15,EX_TLB_R15(r12) 70 std r15,EX_TLB_R15(r12)
71 std r10,EX_TLB_CR(r12) 71 std r10,EX_TLB_CR(r12)
72#ifdef CONFIG_PPC_FSL_BOOK3E 72#ifdef CONFIG_PPC_FSL_BOOK3E
73START_BTB_FLUSH_SECTION
74 mfspr r11, SPRN_SRR1
75 andi. r10,r11,MSR_PR
76 beq 1f
77 BTB_FLUSH(r10)
781:
79END_BTB_FLUSH_SECTION
73 std r7,EX_TLB_R7(r12) 80 std r7,EX_TLB_R7(r12)
74#endif 81#endif
75 TLB_MISS_PROLOG_STATS 82 TLB_MISS_PROLOG_STATS
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index 8d26d7416481..bb2d94c8cbe6 100644
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -16,4 +16,4 @@ oprofile-$(CONFIG_OPROFILE_CELL) += op_model_cell.o \
16 cell/spu_task_sync.o 16 cell/spu_task_sync.o
17oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_power4.o op_model_pa6t.o 17oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_power4.o op_model_pa6t.o
18oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o 18oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o
19oprofile-$(CONFIG_6xx) += op_model_7450.o 19oprofile-$(CONFIG_PPC_BOOK3S_32) += op_model_7450.o
diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index bf094c5a4bd9..a11132865504 100644
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -212,7 +212,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
212 model = &op_model_pa6t; 212 model = &op_model_pa6t;
213 break; 213 break;
214#endif 214#endif
215#ifdef CONFIG_6xx 215#ifdef CONFIG_PPC_BOOK3S_32
216 case PPC_OPROFILE_G4: 216 case PPC_OPROFILE_G4:
217 model = &op_model_7450; 217 model = &op_model_7450;
218 break; 218 break;
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 81f8a0c838ae..b0723002a396 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -10,6 +10,7 @@
10 */ 10 */
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/sched.h> 12#include <linux/sched.h>
13#include <linux/sched/clock.h>
13#include <linux/perf_event.h> 14#include <linux/perf_event.h>
14#include <linux/percpu.h> 15#include <linux/percpu.h>
15#include <linux/hardirq.h> 16#include <linux/hardirq.h>
@@ -130,6 +131,14 @@ static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {}
130static void pmao_restore_workaround(bool ebb) { } 131static void pmao_restore_workaround(bool ebb) { }
131#endif /* CONFIG_PPC32 */ 132#endif /* CONFIG_PPC32 */
132 133
134bool is_sier_available(void)
135{
136 if (ppmu->flags & PPMU_HAS_SIER)
137 return true;
138
139 return false;
140}
141
133static bool regs_use_siar(struct pt_regs *regs) 142static bool regs_use_siar(struct pt_regs *regs)
134{ 143{
135 /* 144 /*
@@ -864,6 +873,8 @@ static int power_check_constraints(struct cpu_hw_events *cpuhw,
864 int i, j; 873 int i, j;
865 unsigned long addf = ppmu->add_fields; 874 unsigned long addf = ppmu->add_fields;
866 unsigned long tadd = ppmu->test_adder; 875 unsigned long tadd = ppmu->test_adder;
876 unsigned long grp_mask = ppmu->group_constraint_mask;
877 unsigned long grp_val = ppmu->group_constraint_val;
867 878
868 if (n_ev > ppmu->n_counter) 879 if (n_ev > ppmu->n_counter)
869 return -1; 880 return -1;
@@ -884,15 +895,23 @@ static int power_check_constraints(struct cpu_hw_events *cpuhw,
884 for (i = 0; i < n_ev; ++i) { 895 for (i = 0; i < n_ev; ++i) {
885 nv = (value | cpuhw->avalues[i][0]) + 896 nv = (value | cpuhw->avalues[i][0]) +
886 (value & cpuhw->avalues[i][0] & addf); 897 (value & cpuhw->avalues[i][0] & addf);
887 if ((((nv + tadd) ^ value) & mask) != 0 || 898
888 (((nv + tadd) ^ cpuhw->avalues[i][0]) & 899 if (((((nv + tadd) ^ value) & mask) & (~grp_mask)) != 0)
889 cpuhw->amasks[i][0]) != 0) 900 break;
901
902 if (((((nv + tadd) ^ cpuhw->avalues[i][0]) & cpuhw->amasks[i][0])
903 & (~grp_mask)) != 0)
890 break; 904 break;
905
891 value = nv; 906 value = nv;
892 mask |= cpuhw->amasks[i][0]; 907 mask |= cpuhw->amasks[i][0];
893 } 908 }
894 if (i == n_ev) 909 if (i == n_ev) {
895 return 0; /* all OK */ 910 if ((value & mask & grp_mask) != (mask & grp_val))
911 return -1;
912 else
913 return 0; /* all OK */
914 }
896 915
897 /* doesn't work, gather alternatives... */ 916 /* doesn't work, gather alternatives... */
898 if (!ppmu->get_alternatives) 917 if (!ppmu->get_alternatives)
@@ -2148,7 +2167,7 @@ static bool pmc_overflow(unsigned long val)
2148/* 2167/*
2149 * Performance monitor interrupt stuff 2168 * Performance monitor interrupt stuff
2150 */ 2169 */
2151static void perf_event_interrupt(struct pt_regs *regs) 2170static void __perf_event_interrupt(struct pt_regs *regs)
2152{ 2171{
2153 int i, j; 2172 int i, j;
2154 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events); 2173 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
@@ -2232,6 +2251,14 @@ static void perf_event_interrupt(struct pt_regs *regs)
2232 irq_exit(); 2251 irq_exit();
2233} 2252}
2234 2253
2254static void perf_event_interrupt(struct pt_regs *regs)
2255{
2256 u64 start_clock = sched_clock();
2257
2258 __perf_event_interrupt(regs);
2259 perf_sample_event_took(sched_clock() - start_clock);
2260}
2261
2235static int power_pmu_prepare_cpu(unsigned int cpu) 2262static int power_pmu_prepare_cpu(unsigned int cpu)
2236{ 2263{
2237 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu); 2264 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c
index 6954636b16d1..f292a3f284f1 100644
--- a/arch/powerpc/perf/imc-pmu.c
+++ b/arch/powerpc/perf/imc-pmu.c
@@ -28,13 +28,13 @@ static DEFINE_MUTEX(nest_init_lock);
28static DEFINE_PER_CPU(struct imc_pmu_ref *, local_nest_imc_refc); 28static DEFINE_PER_CPU(struct imc_pmu_ref *, local_nest_imc_refc);
29static struct imc_pmu **per_nest_pmu_arr; 29static struct imc_pmu **per_nest_pmu_arr;
30static cpumask_t nest_imc_cpumask; 30static cpumask_t nest_imc_cpumask;
31struct imc_pmu_ref *nest_imc_refc; 31static struct imc_pmu_ref *nest_imc_refc;
32static int nest_pmus; 32static int nest_pmus;
33 33
34/* Core IMC data structures and variables */ 34/* Core IMC data structures and variables */
35 35
36static cpumask_t core_imc_cpumask; 36static cpumask_t core_imc_cpumask;
37struct imc_pmu_ref *core_imc_refc; 37static struct imc_pmu_ref *core_imc_refc;
38static struct imc_pmu *core_imc_pmu; 38static struct imc_pmu *core_imc_pmu;
39 39
40/* Thread IMC data structures and variables */ 40/* Thread IMC data structures and variables */
@@ -43,7 +43,7 @@ static DEFINE_PER_CPU(u64 *, thread_imc_mem);
43static struct imc_pmu *thread_imc_pmu; 43static struct imc_pmu *thread_imc_pmu;
44static int thread_imc_mem_size; 44static int thread_imc_mem_size;
45 45
46struct imc_pmu *imc_event_to_pmu(struct perf_event *event) 46static struct imc_pmu *imc_event_to_pmu(struct perf_event *event)
47{ 47{
48 return container_of(event->pmu, struct imc_pmu, pmu); 48 return container_of(event->pmu, struct imc_pmu, pmu);
49} 49}
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c
index 177de814286f..a6c24d866b2f 100644
--- a/arch/powerpc/perf/isa207-common.c
+++ b/arch/powerpc/perf/isa207-common.c
@@ -148,6 +148,14 @@ static bool is_thresh_cmp_valid(u64 event)
148 return true; 148 return true;
149} 149}
150 150
151static unsigned int dc_ic_rld_quad_l1_sel(u64 event)
152{
153 unsigned int cache;
154
155 cache = (event >> EVENT_CACHE_SEL_SHIFT) & MMCR1_DC_IC_QUAL_MASK;
156 return cache;
157}
158
151static inline u64 isa207_find_source(u64 idx, u32 sub_idx) 159static inline u64 isa207_find_source(u64 idx, u32 sub_idx)
152{ 160{
153 u64 ret = PERF_MEM_NA; 161 u64 ret = PERF_MEM_NA;
@@ -226,8 +234,13 @@ void isa207_get_mem_weight(u64 *weight)
226 u64 mmcra = mfspr(SPRN_MMCRA); 234 u64 mmcra = mfspr(SPRN_MMCRA);
227 u64 exp = MMCRA_THR_CTR_EXP(mmcra); 235 u64 exp = MMCRA_THR_CTR_EXP(mmcra);
228 u64 mantissa = MMCRA_THR_CTR_MANT(mmcra); 236 u64 mantissa = MMCRA_THR_CTR_MANT(mmcra);
237 u64 sier = mfspr(SPRN_SIER);
238 u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
229 239
230 *weight = mantissa << (2 * exp); 240 if (val == 0 || val == 7)
241 *weight = 0;
242 else
243 *weight = mantissa << (2 * exp);
231} 244}
232 245
233int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) 246int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
@@ -274,19 +287,27 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
274 } 287 }
275 288
276 if (unit >= 6 && unit <= 9) { 289 if (unit >= 6 && unit <= 9) {
277 /* 290 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
278 * L2/L3 events contain a cache selector field, which is 291 mask |= CNST_CACHE_GROUP_MASK;
279 * supposed to be programmed into MMCRC. However MMCRC is only 292 value |= CNST_CACHE_GROUP_VAL(event & 0xff);
280 * HV writable, and there is no API for guest kernels to modify 293
281 * it. The solution is for the hypervisor to initialise the 294 mask |= CNST_CACHE_PMC4_MASK;
282 * field to zeroes, and for us to only ever allow events that 295 if (pmc == 4)
283 * have a cache selector of zero. The bank selector (bit 3) is 296 value |= CNST_CACHE_PMC4_VAL;
284 * irrelevant, as long as the rest of the value is 0. 297 } else if (cache & 0x7) {
285 */ 298 /*
286 if (cache & 0x7) 299 * L2/L3 events contain a cache selector field, which is
300 * supposed to be programmed into MMCRC. However MMCRC is only
301 * HV writable, and there is no API for guest kernels to modify
302 * it. The solution is for the hypervisor to initialise the
303 * field to zeroes, and for us to only ever allow events that
304 * have a cache selector of zero. The bank selector (bit 3) is
305 * irrelevant, as long as the rest of the value is 0.
306 */
287 return -1; 307 return -1;
308 }
288 309
289 } else if (event & EVENT_IS_L1) { 310 } else if (cpu_has_feature(CPU_FTR_ARCH_300) || (event & EVENT_IS_L1)) {
290 mask |= CNST_L1_QUAL_MASK; 311 mask |= CNST_L1_QUAL_MASK;
291 value |= CNST_L1_QUAL_VAL(cache); 312 value |= CNST_L1_QUAL_VAL(cache);
292 } 313 }
@@ -389,11 +410,14 @@ int isa207_compute_mmcr(u64 event[], int n_ev,
389 /* In continuous sampling mode, update SDAR on TLB miss */ 410 /* In continuous sampling mode, update SDAR on TLB miss */
390 mmcra_sdar_mode(event[i], &mmcra); 411 mmcra_sdar_mode(event[i], &mmcra);
391 412
392 if (event[i] & EVENT_IS_L1) { 413 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
393 cache = event[i] >> EVENT_CACHE_SEL_SHIFT; 414 cache = dc_ic_rld_quad_l1_sel(event[i]);
394 mmcr1 |= (cache & 1) << MMCR1_IC_QUAL_SHIFT; 415 mmcr1 |= (cache) << MMCR1_DC_IC_QUAL_SHIFT;
395 cache >>= 1; 416 } else {
396 mmcr1 |= (cache & 1) << MMCR1_DC_QUAL_SHIFT; 417 if (event[i] & EVENT_IS_L1) {
418 cache = dc_ic_rld_quad_l1_sel(event[i]);
419 mmcr1 |= (cache) << MMCR1_DC_IC_QUAL_SHIFT;
420 }
397 } 421 }
398 422
399 if (is_event_marked(event[i])) { 423 if (is_event_marked(event[i])) {
diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h
index 0028f4b9490d..91350f42a662 100644
--- a/arch/powerpc/perf/isa207-common.h
+++ b/arch/powerpc/perf/isa207-common.h
@@ -134,6 +134,11 @@
134#define CNST_SAMPLE_VAL(v) (((v) & EVENT_SAMPLE_MASK) << 16) 134#define CNST_SAMPLE_VAL(v) (((v) & EVENT_SAMPLE_MASK) << 16)
135#define CNST_SAMPLE_MASK CNST_SAMPLE_VAL(EVENT_SAMPLE_MASK) 135#define CNST_SAMPLE_MASK CNST_SAMPLE_VAL(EVENT_SAMPLE_MASK)
136 136
137#define CNST_CACHE_GROUP_VAL(v) (((v) & 0xffull) << 55)
138#define CNST_CACHE_GROUP_MASK CNST_CACHE_GROUP_VAL(0xff)
139#define CNST_CACHE_PMC4_VAL (1ull << 54)
140#define CNST_CACHE_PMC4_MASK CNST_CACHE_PMC4_VAL
141
137/* 142/*
138 * For NC we are counting up to 4 events. This requires three bits, and we need 143 * For NC we are counting up to 4 events. This requires three bits, and we need
139 * the fifth event to overflow and set the 4th bit. To achieve that we bias the 144 * the fifth event to overflow and set the 4th bit. To achieve that we bias the
@@ -163,8 +168,8 @@
163#define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) 168#define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1))
164#define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) 169#define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8)
165#define MMCR1_FAB_SHIFT 36 170#define MMCR1_FAB_SHIFT 36
166#define MMCR1_DC_QUAL_SHIFT 47 171#define MMCR1_DC_IC_QUAL_MASK 0x3
167#define MMCR1_IC_QUAL_SHIFT 46 172#define MMCR1_DC_IC_QUAL_SHIFT 46
168 173
169/* MMCR1 Combine bits macro for power9 */ 174/* MMCR1 Combine bits macro for power9 */
170#define p9_MMCR1_COMBINE_SHIFT(pmc) (38 - ((pmc - 1) * 2)) 175#define p9_MMCR1_COMBINE_SHIFT(pmc) (38 - ((pmc - 1) * 2))
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
index 09ceea6175ba..5c36b3a8d47a 100644
--- a/arch/powerpc/perf/perf_regs.c
+++ b/arch/powerpc/perf/perf_regs.c
@@ -69,6 +69,7 @@ static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
69 PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap), 69 PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
70 PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar), 70 PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
71 PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr), 71 PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
72 PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),
72}; 73};
73 74
74u64 perf_reg_value(struct pt_regs *regs, int idx) 75u64 perf_reg_value(struct pt_regs *regs, int idx)
@@ -76,6 +77,12 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
76 if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX)) 77 if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
77 return 0; 78 return 0;
78 79
80 if (idx == PERF_REG_POWERPC_SIER &&
81 (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
82 IS_ENABLED(CONFIG_PPC32) ||
83 !is_sier_available()))
84 return 0;
85
79 return regs_get_register(regs, pt_regs_offset[idx]); 86 return regs_get_register(regs, pt_regs_offset[idx]);
80} 87}
81 88
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index e012b1030a5b..0ff9c43733e9 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -63,16 +63,8 @@
63 * MMCRA[9:11] = thresh_cmp[0:2] 63 * MMCRA[9:11] = thresh_cmp[0:2]
64 * MMCRA[12:18] = thresh_cmp[3:9] 64 * MMCRA[12:18] = thresh_cmp[3:9]
65 * 65 *
66 * if unit == 6 or unit == 7 66 * MMCR1[16] = cache_sel[2]
67 * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL) 67 * MMCR1[17] = cache_sel[3]
68 * else if unit == 8 or unit == 9:
69 * if cache_sel[0] == 0: # L3 bank
70 * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0)
71 * else if cache_sel[0] == 1:
72 * MMCRC[50:51] = cache_sel[2:3] (L3EVENT_SEL1)
73 * else if cache_sel[1]: # L1 event
74 * MMCR1[16] = cache_sel[2]
75 * MMCR1[17] = cache_sel[3]
76 * 68 *
77 * if mark: 69 * if mark:
78 * MMCRA[63] = 1 (SAMPLE_ENABLE) 70 * MMCRA[63] = 1 (SAMPLE_ENABLE)
@@ -179,8 +171,6 @@ CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_WRITE);
179CACHE_EVENT_ATTR(LLC-load-misses, PM_DATA_FROM_L3MISS); 171CACHE_EVENT_ATTR(LLC-load-misses, PM_DATA_FROM_L3MISS);
180CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3); 172CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
181CACHE_EVENT_ATTR(LLC-prefetches, PM_L3_PREF_ALL); 173CACHE_EVENT_ATTR(LLC-prefetches, PM_L3_PREF_ALL);
182CACHE_EVENT_ATTR(LLC-store-misses, PM_L2_ST_MISS);
183CACHE_EVENT_ATTR(LLC-stores, PM_L2_ST);
184CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL); 174CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL);
185CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL); 175CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL);
186CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS); 176CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS);
@@ -205,8 +195,6 @@ static struct attribute *power9_events_attr[] = {
205 CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS), 195 CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),
206 CACHE_EVENT_PTR(PM_DATA_FROM_L3), 196 CACHE_EVENT_PTR(PM_DATA_FROM_L3),
207 CACHE_EVENT_PTR(PM_L3_PREF_ALL), 197 CACHE_EVENT_PTR(PM_L3_PREF_ALL),
208 CACHE_EVENT_PTR(PM_L2_ST_MISS),
209 CACHE_EVENT_PTR(PM_L2_ST),
210 CACHE_EVENT_PTR(PM_BR_MPRED_CMPL), 198 CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
211 CACHE_EVENT_PTR(PM_BR_CMPL), 199 CACHE_EVENT_PTR(PM_BR_CMPL),
212 CACHE_EVENT_PTR(PM_DTLB_MISS), 200 CACHE_EVENT_PTR(PM_DTLB_MISS),
@@ -354,8 +342,8 @@ static int power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
354 [ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS, 342 [ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS,
355 }, 343 },
356 [ C(OP_WRITE) ] = { 344 [ C(OP_WRITE) ] = {
357 [ C(RESULT_ACCESS) ] = PM_L2_ST, 345 [ C(RESULT_ACCESS) ] = 0,
358 [ C(RESULT_MISS) ] = PM_L2_ST_MISS, 346 [ C(RESULT_MISS) ] = 0,
359 }, 347 },
360 [ C(OP_PREFETCH) ] = { 348 [ C(OP_PREFETCH) ] = {
361 [ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL, 349 [ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL,
@@ -427,6 +415,8 @@ static struct power_pmu power9_pmu = {
427 .n_counter = MAX_PMU_COUNTERS, 415 .n_counter = MAX_PMU_COUNTERS,
428 .add_fields = ISA207_ADD_FIELDS, 416 .add_fields = ISA207_ADD_FIELDS,
429 .test_adder = ISA207_TEST_ADDER, 417 .test_adder = ISA207_TEST_ADDER,
418 .group_constraint_mask = CNST_CACHE_PMC4_MASK,
419 .group_constraint_val = CNST_CACHE_PMC4_VAL,
430 .compute_mmcr = isa207_compute_mmcr, 420 .compute_mmcr = isa207_compute_mmcr,
431 .config_bhrb = power9_config_bhrb, 421 .config_bhrb = power9_config_bhrb,
432 .bhrb_filter_map = power9_bhrb_filter_map, 422 .bhrb_filter_map = power9_bhrb_filter_map,
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index a886c2c22097..f467247fd1c4 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -47,7 +47,7 @@ static int __init warp_probe(void)
47 if (!of_machine_is_compatible("pika,warp")) 47 if (!of_machine_is_compatible("pika,warp"))
48 return 0; 48 return 0;
49 49
50 /* For __dma_alloc_coherent */ 50 /* For __dma_nommu_alloc_coherent */
51 ISA_DMA_THRESHOLD = ~0L; 51 ISA_DMA_THRESHOLD = ~0L;
52 52
53 return 1; 53 return 1;
@@ -179,9 +179,9 @@ static int pika_setup_leds(void)
179 } 179 }
180 180
181 for_each_child_of_node(np, child) 181 for_each_child_of_node(np, child)
182 if (strcmp(child->name, "green") == 0) 182 if (of_node_name_eq(child, "green"))
183 green_led = of_get_gpio(child, 0); 183 green_led = of_get_gpio(child, 0);
184 else if (strcmp(child->name, "red") == 0) 184 else if (of_node_name_eq(child, "red"))
185 red_led = of_get_gpio(child, 0); 185 red_led = of_get_gpio(child, 0);
186 186
187 of_node_put(np); 187 of_node_put(np);
diff --git a/arch/powerpc/platforms/4xx/ocm.c b/arch/powerpc/platforms/4xx/ocm.c
index f5bbd4563342..f2610a02844a 100644
--- a/arch/powerpc/platforms/4xx/ocm.c
+++ b/arch/powerpc/platforms/4xx/ocm.c
@@ -223,8 +223,6 @@ static void __init ocm_init_node(int count, struct device_node *node)
223 INIT_LIST_HEAD(&ocm->c.list); 223 INIT_LIST_HEAD(&ocm->c.list);
224 224
225 ocm->ready = 1; 225 ocm->ready = 1;
226
227 return;
228} 226}
229 227
230static int ocm_debugfs_show(struct seq_file *m, void *v) 228static int ocm_debugfs_show(struct seq_file *m, void *v)
@@ -242,9 +240,7 @@ static int ocm_debugfs_show(struct seq_file *m, void *v)
242 seq_printf(m, "PhysAddr : 0x%llx\n", ocm->phys); 240 seq_printf(m, "PhysAddr : 0x%llx\n", ocm->phys);
243 seq_printf(m, "MemTotal : %d Bytes\n", ocm->memtotal); 241 seq_printf(m, "MemTotal : %d Bytes\n", ocm->memtotal);
244 seq_printf(m, "MemTotal(NC) : %d Bytes\n", ocm->nc.memtotal); 242 seq_printf(m, "MemTotal(NC) : %d Bytes\n", ocm->nc.memtotal);
245 seq_printf(m, "MemTotal(C) : %d Bytes\n", ocm->c.memtotal); 243 seq_printf(m, "MemTotal(C) : %d Bytes\n\n", ocm->c.memtotal);
246
247 seq_printf(m, "\n");
248 244
249 seq_printf(m, "NC.PhysAddr : 0x%llx\n", ocm->nc.phys); 245 seq_printf(m, "NC.PhysAddr : 0x%llx\n", ocm->nc.phys);
250 seq_printf(m, "NC.VirtAddr : 0x%p\n", ocm->nc.virt); 246 seq_printf(m, "NC.VirtAddr : 0x%p\n", ocm->nc.virt);
@@ -256,9 +252,7 @@ static int ocm_debugfs_show(struct seq_file *m, void *v)
256 blk->size, blk->owner); 252 blk->size, blk->owner);
257 } 253 }
258 254
259 seq_printf(m, "\n"); 255 seq_printf(m, "\nC.PhysAddr : 0x%llx\n", ocm->c.phys);
260
261 seq_printf(m, "C.PhysAddr : 0x%llx\n", ocm->c.phys);
262 seq_printf(m, "C.VirtAddr : 0x%p\n", ocm->c.virt); 256 seq_printf(m, "C.VirtAddr : 0x%p\n", ocm->c.virt);
263 seq_printf(m, "C.MemTotal : %d Bytes\n", ocm->c.memtotal); 257 seq_printf(m, "C.MemTotal : %d Bytes\n", ocm->c.memtotal);
264 seq_printf(m, "C.MemFree : %d Bytes\n", ocm->c.memfree); 258 seq_printf(m, "C.MemFree : %d Bytes\n", ocm->c.memfree);
@@ -268,7 +262,7 @@ static int ocm_debugfs_show(struct seq_file *m, void *v)
268 blk->size, blk->owner); 262 blk->size, blk->owner);
269 } 263 }
270 264
271 seq_printf(m, "\n"); 265 seq_putc(m, '\n');
272 } 266 }
273 267
274 return 0; 268 return 0;
@@ -338,7 +332,6 @@ void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
338 332
339 ocm_blk = kzalloc(sizeof(*ocm_blk), GFP_KERNEL); 333 ocm_blk = kzalloc(sizeof(*ocm_blk), GFP_KERNEL);
340 if (!ocm_blk) { 334 if (!ocm_blk) {
341 printk(KERN_ERR "PPC4XX OCM: could not allocate ocm block");
342 rh_free(ocm_reg->rh, offset); 335 rh_free(ocm_reg->rh, offset);
343 break; 336 break;
344 } 337 }
@@ -392,10 +385,8 @@ static int __init ppc4xx_ocm_init(void)
392 return 0; 385 return 0;
393 386
394 ocm_nodes = kzalloc((count * sizeof(struct ocm_info)), GFP_KERNEL); 387 ocm_nodes = kzalloc((count * sizeof(struct ocm_info)), GFP_KERNEL);
395 if (!ocm_nodes) { 388 if (!ocm_nodes)
396 printk(KERN_ERR "PPC4XX OCM: failed to allocate OCM nodes!\n");
397 return -ENOMEM; 389 return -ENOMEM;
398 }
399 390
400 ocm_count = count; 391 ocm_count = count;
401 count = 0; 392 count = 0;
diff --git a/arch/powerpc/platforms/4xx/pci.c b/arch/powerpc/platforms/4xx/pci.c
index 5aca523551ae..e6e2adcc7b64 100644
--- a/arch/powerpc/platforms/4xx/pci.c
+++ b/arch/powerpc/platforms/4xx/pci.c
@@ -1399,7 +1399,6 @@ static void __init ppc_476fpe_pciex_check_link(struct ppc4xx_pciex_port *port)
1399 printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index); 1399 printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index);
1400 1400
1401 iounmap(mbase); 1401 iounmap(mbase);
1402 return;
1403} 1402}
1404 1403
1405static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata = 1404static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata =
@@ -2081,7 +2080,6 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
2081 const u32 *pval; 2080 const u32 *pval;
2082 int portno; 2081 int portno;
2083 unsigned int dcrs; 2082 unsigned int dcrs;
2084 const char *val;
2085 2083
2086 /* First, proceed to core initialization as we assume there's 2084 /* First, proceed to core initialization as we assume there's
2087 * only one PCIe core in the system 2085 * only one PCIe core in the system
@@ -2127,10 +2125,9 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
2127 * Resulting from this setup this PCIe port will be configured 2125 * Resulting from this setup this PCIe port will be configured
2128 * as root-complex or as endpoint. 2126 * as root-complex or as endpoint.
2129 */ 2127 */
2130 val = of_get_property(port->node, "device_type", NULL); 2128 if (of_node_is_type(port->node, "pci-endpoint")) {
2131 if (!strcmp(val, "pci-endpoint")) {
2132 port->endpoint = 1; 2129 port->endpoint = 1;
2133 } else if (!strcmp(val, "pci")) { 2130 } else if (of_node_is_type(port->node, "pci")) {
2134 port->endpoint = 0; 2131 port->endpoint = 0;
2135 } else { 2132 } else {
2136 printk(KERN_ERR "PCIE: missing or incorrect device_type for %pOF\n", 2133 printk(KERN_ERR "PCIE: missing or incorrect device_type for %pOF\n",
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index b59eab6cbb1b..0c495823152c 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2config PPC_MPC512x 2config PPC_MPC512x
3 bool "512x-based boards" 3 bool "512x-based boards"
4 depends on 6xx 4 depends on PPC_BOOK3S_32
5 select COMMON_CLK 5 select COMMON_CLK
6 select FSL_SOC 6 select FSL_SOC
7 select IPIC 7 select IPIC
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 55a587070342..67f8c2d8fc0e 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2config PPC_MPC52xx 2config PPC_MPC52xx
3 bool "52xx-based boards" 3 bool "52xx-based boards"
4 depends on 6xx 4 depends on PPC_BOOK3S_32
5 select COMMON_CLK 5 select COMMON_CLK
6 select PPC_PCI_CHOICE 6 select PPC_PCI_CHOICE
7 7
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 1ecbf176d35a..61538869e88a 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -82,11 +82,9 @@ static void __init efika_pcisetup(void)
82 return; 82 return;
83 } 83 }
84 84
85 for (pcictrl = NULL;;) { 85 for_each_child_of_node(root, pcictrl)
86 pcictrl = of_get_next_child(root, pcictrl); 86 if (of_node_name_eq(pcictrl, "pci"))
87 if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
88 break; 87 break;
89 }
90 88
91 of_node_put(root); 89 of_node_put(root);
92 90
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 1947a88bc69f..1af81de1c4e6 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2menuconfig PPC_82xx 2menuconfig PPC_82xx
3 bool "82xx-based boards (PQ II)" 3 bool "82xx-based boards (PQ II)"
4 depends on 6xx 4 depends on PPC_BOOK3S_32
5 5
6if PPC_82xx 6if PPC_82xx
7 7
@@ -54,7 +54,7 @@ config PQ2ADS
54 54
55config 8260 55config 8260
56 bool 56 bool
57 depends on 6xx 57 depends on PPC_BOOK3S_32
58 select CPM2 58 select CPM2
59 help 59 help
60 The MPC8260 is a typical embedded CPU made by Freescale. Selecting 60 The MPC8260 is a typical embedded CPU made by Freescale. Selecting
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 071f53b0c0a0..ff0c69dfdf1a 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2menuconfig PPC_83xx 2menuconfig PPC_83xx
3 bool "83xx-based boards" 3 bool "83xx-based boards"
4 depends on 6xx 4 depends on PPC_BOOK3S_32
5 select PPC_UDBG_16550 5 select PPC_UDBG_16550
6 select PPC_PCI_CHOICE 6 select PPC_PCI_CHOICE
7 select FSL_PCI if PCI 7 select FSL_PCI if PCI
diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c
index d75c9816a5c9..2b6589fe812d 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -14,6 +14,7 @@
14#include <linux/of_platform.h> 14#include <linux/of_platform.h>
15#include <linux/pci.h> 15#include <linux/pci.h>
16 16
17#include <asm/debug.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <asm/hw_irq.h> 19#include <asm/hw_irq.h>
19#include <asm/ipic.h> 20#include <asm/ipic.h>
@@ -150,3 +151,19 @@ void __init mpc83xx_setup_arch(void)
150 151
151 mpc83xx_setup_pci(); 152 mpc83xx_setup_pci();
152} 153}
154
155int machine_check_83xx(struct pt_regs *regs)
156{
157 u32 mask = 1 << (31 - IPIC_MCP_WDT);
158
159 if (!(regs->msr & SRR1_MCE_MCP) || !(ipic_get_mcp_status() & mask))
160 return machine_check_generic(regs);
161 ipic_clear_mcp_status(mask);
162
163 if (debugger_fault_handler(regs))
164 return 1;
165
166 die("Watchdog NMI Reset", regs, 0);
167
168 return 1;
169}
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index ac191a7a1337..b0dac307bebf 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -68,16 +68,6 @@ void __init corenet_gen_setup_arch(void)
68 68
69 swiotlb_detect_4g(); 69 swiotlb_detect_4g();
70 70
71#if defined(CONFIG_FSL_PCI) && defined(CONFIG_ZONE_DMA32)
72 /*
73 * Inbound windows don't cover the full lower 4 GiB
74 * due to conflicts with PCICSRBAR and outbound windows,
75 * so limit the DMA32 zone to 2 GiB, to allow consistent
76 * allocations to succeed.
77 */
78 limit_zone_pfn(ZONE_DMA32, 1UL << (31 - PAGE_SHIFT));
79#endif
80
81 pr_info("%s board\n", ppc_md.name); 71 pr_info("%s board\n", ppc_md.name);
82 72
83 mpc85xx_qe_init(); 73 mpc85xx_qe_init();
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
index b63a8548366f..27631c607f3d 100644
--- a/arch/powerpc/platforms/85xx/qemu_e500.c
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -45,15 +45,6 @@ static void __init qemu_e500_setup_arch(void)
45 45
46 fsl_pci_assign_primary(); 46 fsl_pci_assign_primary();
47 swiotlb_detect_4g(); 47 swiotlb_detect_4g();
48#if defined(CONFIG_FSL_PCI) && defined(CONFIG_ZONE_DMA32)
49 /*
50 * Inbound windows don't cover the full lower 4 GiB
51 * due to conflicts with PCICSRBAR and outbound windows,
52 * so limit the DMA32 zone to 2 GiB, to allow consistent
53 * allocations to succeed.
54 */
55 limit_zone_pfn(ZONE_DMA32, 1UL << (31 - PAGE_SHIFT));
56#endif
57 mpc85xx_smp_init(); 48 mpc85xx_smp_init();
58} 49}
59 50
diff --git a/arch/powerpc/platforms/85xx/t1042rdb_diu.c b/arch/powerpc/platforms/85xx/t1042rdb_diu.c
index dac36ba82fea..2d1652108ba1 100644
--- a/arch/powerpc/platforms/85xx/t1042rdb_diu.c
+++ b/arch/powerpc/platforms/85xx/t1042rdb_diu.c
@@ -39,7 +39,7 @@ struct device_node *cpld_node;
39 */ 39 */
40static void t1042rdb_set_monitor_port(enum fsl_diu_monitor_port port) 40static void t1042rdb_set_monitor_port(enum fsl_diu_monitor_port port)
41{ 41{
42 static void __iomem *cpld_base; 42 void __iomem *cpld_base;
43 43
44 cpld_base = of_iomap(cpld_node, 0); 44 cpld_base = of_iomap(cpld_node, 0);
45 if (!cpld_base) { 45 if (!cpld_base) {
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index bcd179d3ed92..df692aa6b578 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -2,7 +2,7 @@
2config PPC_86xx 2config PPC_86xx
3menuconfig PPC_86xx 3menuconfig PPC_86xx
4 bool "86xx-based boards" 4 bool "86xx-based boards"
5 depends on 6xx 5 depends on PPC_BOOK3S_32
6 select FSL_SOC 6 select FSL_SOC
7 select ALTIVEC 7 select ALTIVEC
8 help 8 help
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index 020e84a47a32..9f2c1ecc85c3 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -86,8 +86,7 @@ smp_86xx_kick_cpu(int nr)
86 mdelay(1); 86 mdelay(1);
87 87
88 /* Restore the exception vector */ 88 /* Restore the exception vector */
89 *vector = save_vector; 89 patch_instruction(vector, save_vector);
90 flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
91 90
92 local_irq_restore(flags); 91 local_irq_restore(flags);
93 92
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 260a56b7602d..5c48dd823e15 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -40,7 +40,7 @@ config EPAPR_PARAVIRT
40 40
41config PPC_NATIVE 41config PPC_NATIVE
42 bool 42 bool
43 depends on 6xx || PPC64 43 depends on PPC_BOOK3S_32 || PPC64
44 help 44 help
45 Support for running natively on the hardware, i.e. without 45 Support for running natively on the hardware, i.e. without
46 a hypervisor. This option is not user-selectable but should 46 a hypervisor. This option is not user-selectable but should
@@ -48,7 +48,7 @@ config PPC_NATIVE
48 48
49config PPC_OF_BOOT_TRAMPOLINE 49config PPC_OF_BOOT_TRAMPOLINE
50 bool "Support booting from Open Firmware or yaboot" 50 bool "Support booting from Open Firmware or yaboot"
51 depends on 6xx || PPC64 51 depends on PPC_BOOK3S_32 || PPC64
52 default y 52 default y
53 help 53 help
54 Support from booting from Open Firmware or yaboot using an 54 Support from booting from Open Firmware or yaboot using an
@@ -197,7 +197,7 @@ endmenu
197 197
198config PPC601_SYNC_FIX 198config PPC601_SYNC_FIX
199 bool "Workarounds for PPC601 bugs" 199 bool "Workarounds for PPC601 bugs"
200 depends on 6xx && PPC_PMAC 200 depends on PPC_BOOK3S_32 && PPC_PMAC
201 help 201 help
202 Some versions of the PPC601 (the first PowerPC chip) have bugs which 202 Some versions of the PPC601 (the first PowerPC chip) have bugs which
203 mean that extra synchronization instructions are required near 203 mean that extra synchronization instructions are required near
@@ -211,7 +211,7 @@ config PPC601_SYNC_FIX
211 211
212config TAU 212config TAU
213 bool "On-chip CPU temperature sensor support" 213 bool "On-chip CPU temperature sensor support"
214 depends on 6xx 214 depends on PPC_BOOK3S_32
215 help 215 help
216 G3 and G4 processors have an on-chip temperature sensor called the 216 G3 and G4 processors have an on-chip temperature sensor called the
217 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 217 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f4e2c5729374..ab176fd3dfb5 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -24,6 +24,7 @@ choice
24config PPC_BOOK3S_32 24config PPC_BOOK3S_32
25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" 25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
26 select PPC_FPU 26 select PPC_FPU
27 select PPC_HAVE_PMU_SUPPORT
27 28
28config PPC_85xx 29config PPC_85xx
29 bool "Freescale 85xx" 30 bool "Freescale 85xx"
@@ -179,11 +180,6 @@ config PPC_BOOK3E
179 def_bool y 180 def_bool y
180 depends on PPC_BOOK3E_64 181 depends on PPC_BOOK3E_64
181 182
182config 6xx
183 def_bool y
184 depends on PPC32 && PPC_BOOK3S
185 select PPC_HAVE_PMU_SUPPORT
186
187config E500 183config E500
188 select FSL_EMB_PERFMON 184 select FSL_EMB_PERFMON
189 select PPC_FSL_BOOK3E 185 select PPC_FSL_BOOK3E
@@ -266,7 +262,7 @@ config PHYS_64BIT
266 262
267config ALTIVEC 263config ALTIVEC
268 bool "AltiVec Support" 264 bool "AltiVec Support"
269 depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64) 265 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
270 ---help--- 266 ---help---
271 This option enables kernel support for the Altivec extensions to the 267 This option enables kernel support for the Altivec extensions to the
272 PowerPC processor. The kernel currently supports saving and restoring 268 PowerPC processor. The kernel currently supports saving and restoring
@@ -316,14 +312,6 @@ config SPE
316 312
317 If in doubt, say Y here. 313 If in doubt, say Y here.
318 314
319config PPC_STD_MMU
320 def_bool y
321 depends on PPC_BOOK3S
322
323config PPC_STD_MMU_32
324 def_bool y
325 depends on PPC_STD_MMU && PPC32
326
327config ARCH_ENABLE_SPLIT_PMD_PTLOCK 315config ARCH_ENABLE_SPLIT_PMD_PTLOCK
328 def_bool y 316 def_bool y
329 depends on PPC_BOOK3S_64 317 depends on PPC_BOOK3S_64
@@ -358,7 +346,7 @@ config ARCH_ENABLE_HUGEPAGE_MIGRATION
358 346
359config PPC_MMU_NOHASH 347config PPC_MMU_NOHASH
360 def_bool y 348 def_bool y
361 depends on !PPC_STD_MMU 349 depends on !PPC_BOOK3S
362 350
363config PPC_BOOK3E_MMU 351config PPC_BOOK3E_MMU
364 def_bool y 352 def_bool y
@@ -412,7 +400,8 @@ config NR_CPUS
412 400
413config NOT_COHERENT_CACHE 401config NOT_COHERENT_CACHE
414 bool 402 bool
415 depends on 4xx || PPC_8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON 403 depends on 4xx || PPC_8xx || E200 || PPC_MPC512x || \
404 GAMECUBE_COMMON || AMIGAONE
416 default n if PPC_47x 405 default n if PPC_47x
417 default y 406 default y
418 407
diff --git a/arch/powerpc/platforms/amigaone/Kconfig b/arch/powerpc/platforms/amigaone/Kconfig
index 03dc1e37c25b..e03d26d41957 100644
--- a/arch/powerpc/platforms/amigaone/Kconfig
+++ b/arch/powerpc/platforms/amigaone/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2config AMIGAONE 2config AMIGAONE
3 bool "Eyetech AmigaOne/MAI Teron" 3 bool "Eyetech AmigaOne/MAI Teron"
4 depends on 6xx && BROKEN_ON_SMP 4 depends on PPC_BOOK3S_32 && BROKEN_ON_SMP
5 select PPC_I8259 5 select PPC_I8259
6 select PPC_INDIRECT_PCI 6 select PPC_INDIRECT_PCI
7 select PPC_UDBG_16550 7 select PPC_UDBG_16550
diff --git a/arch/powerpc/platforms/cell/cbe_regs.c b/arch/powerpc/platforms/cell/cbe_regs.c
index b926438d73af..27ee65b89099 100644
--- a/arch/powerpc/platforms/cell/cbe_regs.c
+++ b/arch/powerpc/platforms/cell/cbe_regs.c
@@ -53,7 +53,7 @@ static struct cbe_regs_map *cbe_find_map(struct device_node *np)
53 int i; 53 int i;
54 struct device_node *tmp_np; 54 struct device_node *tmp_np;
55 55
56 if (strcasecmp(np->type, "spe")) { 56 if (!of_node_is_type(np, "spe")) {
57 for (i = 0; i < cbe_regs_map_count; i++) 57 for (i = 0; i < cbe_regs_map_count; i++)
58 if (cbe_regs_maps[i].cpu_node == np || 58 if (cbe_regs_maps[i].cpu_node == np ||
59 cbe_regs_maps[i].be_node == np) 59 cbe_regs_maps[i].be_node == np)
@@ -70,8 +70,8 @@ static struct cbe_regs_map *cbe_find_map(struct device_node *np)
70 tmp_np = tmp_np->parent; 70 tmp_np = tmp_np->parent;
71 /* on a correct devicetree we wont get up to root */ 71 /* on a correct devicetree we wont get up to root */
72 BUG_ON(!tmp_np); 72 BUG_ON(!tmp_np);
73 } while (strcasecmp(tmp_np->type, "cpu") && 73 } while (!of_node_is_type(tmp_np, "cpu") ||
74 strcasecmp(tmp_np->type, "be")); 74 !of_node_is_type(tmp_np, "be"));
75 75
76 np->data = cbe_find_map(tmp_np); 76 np->data = cbe_find_map(tmp_np);
77 77
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 7d31b8d14661..e2e1371a71e2 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -131,7 +131,7 @@ static int cell_setup_phb(struct pci_controller *phb)
131 131
132 np = phb->dn; 132 np = phb->dn;
133 model = of_get_property(np, "model", NULL); 133 model = of_get_property(np, "model", NULL);
134 if (model == NULL || strcmp(np->name, "pci")) 134 if (model == NULL || !of_node_name_eq(np, "pci"))
135 return 0; 135 return 0;
136 136
137 /* Setup workarounds for spider */ 137 /* Setup workarounds for spider */
@@ -168,8 +168,7 @@ static int __init cell_publish_devices(void)
168 * platform devices for the PCI host bridges 168 * platform devices for the PCI host bridges
169 */ 169 */
170 for_each_child_of_node(root, np) { 170 for_each_child_of_node(root, np) {
171 if (np->type == NULL || (strcmp(np->type, "pci") != 0 && 171 if (!of_node_is_type(np, "pci") && !of_node_is_type(np, "pciex"))
172 strcmp(np->type, "pciex") != 0))
173 continue; 172 continue;
174 of_platform_device_create(np, NULL, NULL); 173 of_platform_device_create(np, NULL, NULL);
175 } 174 }
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index 8ae86200ef6c..125f2a5f02de 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -34,20 +34,9 @@
34 */ 34 */
35 35
36static void *spu_syscall_table[] = { 36static void *spu_syscall_table[] = {
37#define SYSCALL(func) sys_ni_syscall, 37#define __SYSCALL(nr, entry, nargs) entry,
38#define COMPAT_SYS(func) sys_ni_syscall, 38#include <asm/syscall_table_spu.h>
39#define PPC_SYS(func) sys_ni_syscall, 39#undef __SYSCALL
40#define OLDSYS(func) sys_ni_syscall,
41#define SYS32ONLY(func) sys_ni_syscall,
42#define PPC64ONLY(func) sys_ni_syscall,
43#define SYSX(f, f3264, f32) sys_ni_syscall,
44
45#define SYSCALL_SPU(func) sys_##func,
46#define COMPAT_SYS_SPU(func) sys_##func,
47#define COMPAT_SPU_NEW(func) sys_##func,
48#define SYSX_SPU(f, f3264, f32) f,
49
50#include <asm/systbl.h>
51}; 40};
52 41
53long spu_sys_callback(struct spu_syscall_block *s) 42long spu_sys_callback(struct spu_syscall_block *s)
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c
index f7e36373f6e0..bed935c51ec2 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -458,7 +458,6 @@ static void init_affinity_node(int cbe)
458 struct device_node *vic_dn, *last_spu_dn; 458 struct device_node *vic_dn, *last_spu_dn;
459 phandle avoid_ph; 459 phandle avoid_ph;
460 const phandle *vic_handles; 460 const phandle *vic_handles;
461 const char *name;
462 int lenp, i, added; 461 int lenp, i, added;
463 462
464 last_spu = list_first_entry(&cbe_spu_info[cbe].spus, struct spu, 463 last_spu = list_first_entry(&cbe_spu_info[cbe].spus, struct spu,
@@ -480,12 +479,7 @@ static void init_affinity_node(int cbe)
480 if (!vic_dn) 479 if (!vic_dn)
481 continue; 480 continue;
482 481
483 /* a neighbour might be spe, mic-tm, or bif0 */ 482 if (of_node_name_eq(vic_dn, "spe") ) {
484 name = of_get_property(vic_dn, "name", NULL);
485 if (!name)
486 continue;
487
488 if (strcmp(name, "spe") == 0) {
489 spu = devnode_spu(cbe, vic_dn); 483 spu = devnode_spu(cbe, vic_dn);
490 avoid_ph = last_spu_dn->phandle; 484 avoid_ph = last_spu_dn->phandle;
491 } else { 485 } else {
@@ -498,7 +492,7 @@ static void init_affinity_node(int cbe)
498 spu = neighbour_spu(cbe, vic_dn, last_spu_dn); 492 spu = neighbour_spu(cbe, vic_dn, last_spu_dn);
499 if (!spu) 493 if (!spu)
500 continue; 494 continue;
501 if (!strcmp(name, "mic-tm")) { 495 if (of_node_name_eq(vic_dn, "mic-tm")) {
502 last_spu->has_mem_affinity = 1; 496 last_spu->has_mem_affinity = 1;
503 spu->has_mem_affinity = 1; 497 spu->has_mem_affinity = 1;
504 } 498 }
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig
index ead99eff875a..43a2484aad49 100644
--- a/arch/powerpc/platforms/chrp/Kconfig
+++ b/arch/powerpc/platforms/chrp/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2config PPC_CHRP 2config PPC_CHRP
3 bool "Common Hardware Reference Platform (CHRP) based machines" 3 bool "Common Hardware Reference Platform (CHRP) based machines"
4 depends on 6xx 4 depends on PPC_BOOK3S_32
5 select HAVE_PCSPKR_PLATFORM 5 select HAVE_PCSPKR_PLATFORM
6 select MPIC 6 select MPIC
7 select PPC_I8259 7 select PPC_I8259
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 5ddb57b82921..b020c757d2bf 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -230,8 +230,8 @@ chrp_find_bridges(void)
230 else if (strncmp(machine, "Pegasos", 7) == 0) 230 else if (strncmp(machine, "Pegasos", 7) == 0)
231 is_pegasos = 1; 231 is_pegasos = 1;
232 } 232 }
233 for (dev = root->child; dev != NULL; dev = dev->sibling) { 233 for_each_child_of_node(root, dev) {
234 if (dev->type == NULL || strcmp(dev->type, "pci") != 0) 234 if (!of_node_is_type(dev, "pci"))
235 continue; 235 continue;
236 ++index; 236 ++index;
237 /* The GG2 bridge on the LongTrail doesn't have an address */ 237 /* The GG2 bridge on the LongTrail doesn't have an address */
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index d6d8ffc0271e..e66644e0fb40 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -280,20 +280,14 @@ static __init void chrp_init(void)
280 node = of_find_node_by_path(property); 280 node = of_find_node_by_path(property);
281 if (!node) 281 if (!node)
282 return; 282 return;
283 property = of_get_property(node, "device_type", NULL); 283 if (!of_node_is_type(node, "serial"))
284 if (!property)
285 goto out_put;
286 if (strcmp(property, "serial"))
287 goto out_put; 284 goto out_put;
288 /* 285 /*
289 * The 9pin connector is either /failsafe 286 * The 9pin connector is either /failsafe
290 * or /pci@80000000/isa@C/serial@i2F8 287 * or /pci@80000000/isa@C/serial@i2F8
291 * The optional graphics card has also type 'serial' in VGA mode. 288 * The optional graphics card has also type 'serial' in VGA mode.
292 */ 289 */
293 property = of_get_property(node, "name", NULL); 290 if (of_node_name_eq(node, "failsafe") || of_node_name_eq(node, "serial"))
294 if (!property)
295 goto out_put;
296 if (!strcmp(property, "failsafe") || !strcmp(property, "serial"))
297 add_preferred_console("ttyS", 0, NULL); 291 add_preferred_console("ttyS", 0, NULL);
298out_put: 292out_put:
299 of_node_put(node); 293 of_node_put(node);
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8ea16db5ff48..527d4aa46537 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: GPL-2.0 1# SPDX-License-Identifier: GPL-2.0
2config EMBEDDED6xx 2config EMBEDDED6xx
3 bool "Embedded 6xx/7xx/7xxx-based boards" 3 bool "Embedded 6xx/7xx/7xxx-based boards"
4 depends on 6xx && BROKEN_ON_SMP 4 depends on PPC_BOOK3S_32 && BROKEN_ON_SMP
5 5
6config LINKSTATION 6config LINKSTATION
7 bool "Linkstation / Kurobox(HG) from Buffalo" 7 bool "Linkstation / Kurobox(HG) from Buffalo"
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index e3821379e86f..13fba004b7e7 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -604,10 +604,8 @@ void __init maple_pci_init(void)
604 printk(KERN_CRIT "maple_find_bridges: can't find root of device tree\n"); 604 printk(KERN_CRIT "maple_find_bridges: can't find root of device tree\n");
605 return; 605 return;
606 } 606 }
607 for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) { 607 for_each_child_of_node(root, np) {
608 if (!np->type) 608 if (!of_node_is_type(np, "pci") && !of_node_is_type(np, "ht"))
609 continue;
610 if (strcmp(np->type, "pci") && strcmp(np->type, "ht"))
611 continue; 609 continue;
612 if ((of_device_is_compatible(np, "u4-pcie") || 610 if ((of_device_is_compatible(np, "u4-pcie") ||
613 of_device_is_compatible(np, "u3-agp")) && 611 of_device_is_compatible(np, "u3-agp")) &&
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c
index 53384eb42a76..d18d16489a15 100644
--- a/arch/powerpc/platforms/pasemi/dma_lib.c
+++ b/arch/powerpc/platforms/pasemi/dma_lib.c
@@ -255,15 +255,13 @@ int pasemi_dma_alloc_ring(struct pasemi_dmachan *chan, int ring_size)
255 255
256 chan->ring_size = ring_size; 256 chan->ring_size = ring_size;
257 257
258 chan->ring_virt = dma_alloc_coherent(&dma_pdev->dev, 258 chan->ring_virt = dma_zalloc_coherent(&dma_pdev->dev,
259 ring_size * sizeof(u64), 259 ring_size * sizeof(u64),
260 &chan->ring_dma, GFP_KERNEL); 260 &chan->ring_dma, GFP_KERNEL);
261 261
262 if (!chan->ring_virt) 262 if (!chan->ring_virt)
263 return -ENOMEM; 263 return -ENOMEM;
264 264
265 memset(chan->ring_virt, 0, ring_size * sizeof(u64));
266
267 return 0; 265 return 0;
268} 266}
269EXPORT_SYMBOL(pasemi_dma_alloc_ring); 267EXPORT_SYMBOL(pasemi_dma_alloc_ring);
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index c3c64172482d..fdc839d93837 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -27,6 +27,7 @@
27#include <linux/pci.h> 27#include <linux/pci.h>
28 28
29#include <asm/pci-bridge.h> 29#include <asm/pci-bridge.h>
30#include <asm/isa-bridge.h>
30#include <asm/machdep.h> 31#include <asm/machdep.h>
31 32
32#include <asm/ppc-pci.h> 33#include <asm/ppc-pci.h>
@@ -108,6 +109,61 @@ static int workaround_5945(struct pci_bus *bus, unsigned int devfn,
108 return 1; 109 return 1;
109} 110}
110 111
112#ifdef CONFIG_PPC_PASEMI_NEMO
113#define PXP_ERR_CFG_REG 0x4
114#define PXP_IGNORE_PCIE_ERRORS 0x800
115#define SB600_BUS 5
116
117static void sb600_set_flag(int bus)
118{
119 static void __iomem *iob_mapbase = NULL;
120 struct resource res;
121 struct device_node *dn;
122 int err;
123
124 if (iob_mapbase == NULL) {
125 dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
126 if (!dn) {
127 pr_crit("NEMO SB600 missing iob node\n");
128 return;
129 }
130
131 err = of_address_to_resource(dn, 0, &res);
132 of_node_put(dn);
133
134 if (err) {
135 pr_crit("NEMO SB600 missing resource\n");
136 return;
137 }
138
139 pr_info("NEMO SB600 IOB base %08llx\n",res.start);
140
141 iob_mapbase = ioremap(res.start + 0x100, 0x94);
142 }
143
144 if (iob_mapbase != NULL) {
145 if (bus == SB600_BUS) {
146 /*
147 * This is the SB600's bus, tell the PCI-e root port
148 * to allow non-zero devices to enumerate.
149 */
150 out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) | PXP_IGNORE_PCIE_ERRORS);
151 } else {
152 /*
153 * Only scan device 0 on other busses
154 */
155 out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) & ~PXP_IGNORE_PCIE_ERRORS);
156 }
157 }
158}
159
160#else
161
162static void sb600_set_flag(int bus)
163{
164}
165#endif
166
111static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn, 167static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
112 int offset, int len, u32 *val) 168 int offset, int len, u32 *val)
113{ 169{
@@ -126,6 +182,8 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
126 182
127 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); 183 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
128 184
185 sb600_set_flag(bus->number);
186
129 /* 187 /*
130 * Note: the caller has already checked that offset is 188 * Note: the caller has already checked that offset is
131 * suitably aligned and that len is 1, 2 or 4. 189 * suitably aligned and that len is 1, 2 or 4.
@@ -160,6 +218,8 @@ static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
160 218
161 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); 219 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
162 220
221 sb600_set_flag(bus->number);
222
163 /* 223 /*
164 * Note: the caller has already checked that offset is 224 * Note: the caller has already checked that offset is
165 * suitably aligned and that len is 1, 2 or 4. 225 * suitably aligned and that len is 1, 2 or 4.
@@ -210,6 +270,12 @@ static int __init pas_add_bridge(struct device_node *dev)
210 /* Interpret the "ranges" property */ 270 /* Interpret the "ranges" property */
211 pci_process_bridge_OF_ranges(hose, dev, 1); 271 pci_process_bridge_OF_ranges(hose, dev, 1);
212 272
273 /*
274 * Scan for an isa bridge. This is needed to find the SB600 on the nemo
275 * and does nothing on machines without one.
276 */
277 isa_bridge_find_early(hose);
278
213 return 0; 279 return 0;
214} 280}
215 281
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 9a6eb04cca83..c0532999f854 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -34,6 +34,7 @@
34#include <asm/prom.h> 34#include <asm/prom.h>
35#include <asm/iommu.h> 35#include <asm/iommu.h>
36#include <asm/machdep.h> 36#include <asm/machdep.h>
37#include <asm/i8259.h>
37#include <asm/mpic.h> 38#include <asm/mpic.h>
38#include <asm/smp.h> 39#include <asm/smp.h>
39#include <asm/time.h> 40#include <asm/time.h>
@@ -72,6 +73,40 @@ static void __noreturn pas_restart(char *cmd)
72 out_le32(reset_reg, 0x6000000); 73 out_le32(reset_reg, 0x6000000);
73} 74}
74 75
76#ifdef CONFIG_PPC_PASEMI_NEMO
77void pas_shutdown(void)
78{
79 /* Set the PLD bit that makes the SB600 think the power button is being pressed */
80 void __iomem *pld_map = ioremap(0xf5000000,4096);
81 while (1)
82 out_8(pld_map+7,0x01);
83}
84
85/* RTC platform device structure as is not in device tree */
86static struct resource rtc_resource[] = {{
87 .name = "rtc",
88 .start = 0x70,
89 .end = 0x71,
90 .flags = IORESOURCE_IO,
91}, {
92 .name = "rtc",
93 .start = 8,
94 .end = 8,
95 .flags = IORESOURCE_IRQ,
96}};
97
98static inline void nemo_init_rtc(void)
99{
100 platform_device_register_simple("rtc_cmos", -1, rtc_resource, 2);
101}
102
103#else
104
105static inline void nemo_init_rtc(void)
106{
107}
108#endif
109
75#ifdef CONFIG_SMP 110#ifdef CONFIG_SMP
76static arch_spinlock_t timebase_lock; 111static arch_spinlock_t timebase_lock;
77static unsigned long timebase; 112static unsigned long timebase;
@@ -183,6 +218,42 @@ static int __init pas_setup_mce_regs(void)
183} 218}
184machine_device_initcall(pasemi, pas_setup_mce_regs); 219machine_device_initcall(pasemi, pas_setup_mce_regs);
185 220
221#ifdef CONFIG_PPC_PASEMI_NEMO
222static void sb600_8259_cascade(struct irq_desc *desc)
223{
224 struct irq_chip *chip = irq_desc_get_chip(desc);
225 unsigned int cascade_irq = i8259_irq();
226
227 if (cascade_irq)
228 generic_handle_irq(cascade_irq);
229
230 chip->irq_eoi(&desc->irq_data);
231}
232
233static void nemo_init_IRQ(struct mpic *mpic)
234{
235 struct device_node *np;
236 int gpio_virq;
237 /* Connect the SB600's legacy i8259 controller */
238 np = of_find_node_by_path("/pxp@0,e0000000");
239 i8259_init(np, 0);
240 of_node_put(np);
241
242 gpio_virq = irq_create_mapping(NULL, 3);
243 irq_set_irq_type(gpio_virq, IRQ_TYPE_LEVEL_HIGH);
244 irq_set_chained_handler(gpio_virq, sb600_8259_cascade);
245 mpic_unmask_irq(irq_get_irq_data(gpio_virq));
246
247 irq_set_default_host(mpic->irqhost);
248}
249
250#else
251
252static inline void nemo_init_IRQ(struct mpic *mpic)
253{
254}
255#endif
256
186static __init void pas_init_IRQ(void) 257static __init void pas_init_IRQ(void)
187{ 258{
188 struct device_node *np; 259 struct device_node *np;
@@ -243,6 +314,8 @@ static __init void pas_init_IRQ(void)
243 mpic_unmask_irq(irq_get_irq_data(nmi_virq)); 314 mpic_unmask_irq(irq_get_irq_data(nmi_virq));
244 } 315 }
245 316
317 nemo_init_IRQ(mpic);
318
246 of_node_put(mpic_node); 319 of_node_put(mpic_node);
247 of_node_put(root); 320 of_node_put(root);
248} 321}
@@ -404,6 +477,8 @@ static int __init pasemi_publish_devices(void)
404 /* Publish OF platform devices for SDC and other non-PCI devices */ 477 /* Publish OF platform devices for SDC and other non-PCI devices */
405 of_platform_bus_probe(NULL, pasemi_bus_ids, NULL); 478 of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
406 479
480 nemo_init_rtc();
481
407 return 0; 482 return 0;
408} 483}
409machine_device_initcall(pasemi, pasemi_publish_devices); 484machine_device_initcall(pasemi, pasemi_publish_devices);
@@ -418,6 +493,17 @@ static int __init pas_probe(void)
418 !of_machine_is_compatible("pasemi,pwrficient")) 493 !of_machine_is_compatible("pasemi,pwrficient"))
419 return 0; 494 return 0;
420 495
496#ifdef CONFIG_PPC_PASEMI_NEMO
497 /*
498 * Check for the Nemo motherboard here, if we are running on one
499 * change the machine definition to fit
500 */
501 if (of_machine_is_compatible("pasemi,nemo")) {
502 pm_power_off = pas_shutdown;
503 ppc_md.name = "A-EON Amigaone X1000";
504 }
505#endif
506
421 iommu_init_early_pasemi(); 507 iommu_init_early_pasemi();
422 508
423 return 1; 509 return 1;
diff --git a/arch/powerpc/platforms/powermac/cache.S b/arch/powerpc/platforms/powermac/cache.S
index 27862feee4a5..f0641b6e6075 100644
--- a/arch/powerpc/platforms/powermac/cache.S
+++ b/arch/powerpc/platforms/powermac/cache.S
@@ -28,7 +28,7 @@
28 */ 28 */
29 29
30_GLOBAL(flush_disable_caches) 30_GLOBAL(flush_disable_caches)
31#ifndef CONFIG_6xx 31#ifndef CONFIG_PPC_BOOK3S_32
32 blr 32 blr
33#else 33#else
34BEGIN_FTR_SECTION 34BEGIN_FTR_SECTION
@@ -356,4 +356,4 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
356 mtmsr r11 /* restore DR and EE */ 356 mtmsr r11 /* restore DR and EE */
357 isync 357 isync
358 blr 358 blr
359#endif /* CONFIG_6xx */ 359#endif /* CONFIG_PPC_BOOK3S_32 */
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index ed2f54b3f173..c3e5ee8b5175 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -51,7 +51,7 @@
51#define DBG(fmt...) 51#define DBG(fmt...)
52#endif 52#endif
53 53
54#ifdef CONFIG_6xx 54#ifdef CONFIG_PPC_BOOK3S_32
55extern int powersave_lowspeed; 55extern int powersave_lowspeed;
56#endif 56#endif
57 57
@@ -173,9 +173,9 @@ static long ohare_htw_scc_enable(struct device_node *node, long param,
173 macio = macio_find(node, 0); 173 macio = macio_find(node, 0);
174 if (!macio) 174 if (!macio)
175 return -ENODEV; 175 return -ENODEV;
176 if (!strcmp(node->name, "ch-a")) 176 if (of_node_name_eq(node, "ch-a"))
177 chan_mask = MACIO_FLAG_SCCA_ON; 177 chan_mask = MACIO_FLAG_SCCA_ON;
178 else if (!strcmp(node->name, "ch-b")) 178 else if (of_node_name_eq(node, "ch-b"))
179 chan_mask = MACIO_FLAG_SCCB_ON; 179 chan_mask = MACIO_FLAG_SCCB_ON;
180 else 180 else
181 return -ENODEV; 181 return -ENODEV;
@@ -610,9 +610,9 @@ static long core99_scc_enable(struct device_node *node, long param, long value)
610 macio = macio_find(node, 0); 610 macio = macio_find(node, 0);
611 if (!macio) 611 if (!macio)
612 return -ENODEV; 612 return -ENODEV;
613 if (!strcmp(node->name, "ch-a")) 613 if (of_node_name_eq(node, "ch-a"))
614 chan_mask = MACIO_FLAG_SCCA_ON; 614 chan_mask = MACIO_FLAG_SCCA_ON;
615 else if (!strcmp(node->name, "ch-b")) 615 else if (of_node_name_eq(node, "ch-b"))
616 chan_mask = MACIO_FLAG_SCCB_ON; 616 chan_mask = MACIO_FLAG_SCCB_ON;
617 else 617 else
618 return -ENODEV; 618 return -ENODEV;
@@ -1392,8 +1392,7 @@ static long g5_mpic_enable(struct device_node *node, long param, long value)
1392 1392
1393 if (parent == NULL) 1393 if (parent == NULL)
1394 return 0; 1394 return 0;
1395 is_u3 = strcmp(parent->name, "u3") == 0 || 1395 is_u3 = of_node_name_eq(parent, "u3") || of_node_name_eq(parent, "u4");
1396 strcmp(parent->name, "u4") == 0;
1397 of_node_put(parent); 1396 of_node_put(parent);
1398 if (!is_u3) 1397 if (!is_u3)
1399 return 0; 1398 return 0;
@@ -1471,6 +1470,7 @@ static long g5_i2s_enable(struct device_node *node, long param, long value)
1471 case 2: 1470 case 2:
1472 if (macio->type == macio_shasta) 1471 if (macio->type == macio_shasta)
1473 break; 1472 break;
1473 /* fall through */
1474 default: 1474 default:
1475 return -ENODEV; 1475 return -ENODEV;
1476 } 1476 }
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index d4d411820597..4de058a20d2b 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -617,7 +617,7 @@ static void __init kw_i2c_probe(void)
617 * but not for now 617 * but not for now
618 */ 618 */
619 child = of_get_next_child(np, NULL); 619 child = of_get_next_child(np, NULL);
620 multibus = !child || strcmp(child->name, "i2c-bus"); 620 multibus = !of_node_name_eq(child, "i2c-bus");
621 of_node_put(child); 621 of_node_put(child);
622 622
623 /* For a multibus setup, we get the bus count based on the 623 /* For a multibus setup, we get the bus count based on the
@@ -917,10 +917,9 @@ static void __init smu_i2c_probe(void)
917 * type as older device trees mix i2c busses and other things 917 * type as older device trees mix i2c busses and other things
918 * at the same level 918 * at the same level
919 */ 919 */
920 for (busnode = NULL; 920 for_each_child_of_node(controller, busnode) {
921 (busnode = of_get_next_child(controller, busnode)) != NULL;) { 921 if (!of_node_is_type(busnode, "i2c") &&
922 if (strcmp(busnode->type, "i2c") && 922 !of_node_is_type(busnode, "i2c-bus"))
923 strcmp(busnode->type, "i2c-bus"))
924 continue; 923 continue;
925 reg = of_get_property(busnode, "reg", NULL); 924 reg = of_get_property(busnode, "reg", NULL);
926 if (reg == NULL) 925 if (reg == NULL)
@@ -1206,7 +1205,7 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1206 if (bus != pmac_i2c_find_bus(np)) 1205 if (bus != pmac_i2c_find_bus(np))
1207 continue; 1206 continue;
1208 for (p = whitelist; p->name != NULL; p++) { 1207 for (p = whitelist; p->name != NULL; p++) {
1209 if (strcmp(np->name, p->name)) 1208 if (!of_node_name_eq(np, p->name))
1210 continue; 1209 continue;
1211 if (p->compatible && 1210 if (p->compatible &&
1212 !of_device_is_compatible(np, p->compatible)) 1211 !of_device_is_compatible(np, p->compatible))
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 04527d13d5a4..3d7420503c37 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -501,9 +501,7 @@ static void __init init_p2pbridge(void)
501 /* XXX it would be better here to identify the specific 501 /* XXX it would be better here to identify the specific
502 PCI-PCI bridge chip we have. */ 502 PCI-PCI bridge chip we have. */
503 p2pbridge = of_find_node_by_name(NULL, "pci-bridge"); 503 p2pbridge = of_find_node_by_name(NULL, "pci-bridge");
504 if (p2pbridge == NULL 504 if (p2pbridge == NULL || !of_node_name_eq(p2pbridge->parent, "pci"))
505 || p2pbridge->parent == NULL
506 || strcmp(p2pbridge->parent->name, "pci") != 0)
507 goto done; 505 goto done;
508 if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) { 506 if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) {
509 DBG("Can't find PCI infos for PCI<->PCI bridge\n"); 507 DBG("Can't find PCI infos for PCI<->PCI bridge\n");
@@ -828,14 +826,14 @@ static int __init pmac_add_bridge(struct device_node *dev)
828 if (of_device_is_compatible(dev, "uni-north")) { 826 if (of_device_is_compatible(dev, "uni-north")) {
829 primary = setup_uninorth(hose, &rsrc); 827 primary = setup_uninorth(hose, &rsrc);
830 disp_name = "UniNorth"; 828 disp_name = "UniNorth";
831 } else if (strcmp(dev->name, "pci") == 0) { 829 } else if (of_node_name_eq(dev, "pci")) {
832 /* XXX assume this is a mpc106 (grackle) */ 830 /* XXX assume this is a mpc106 (grackle) */
833 setup_grackle(hose); 831 setup_grackle(hose);
834 disp_name = "Grackle (MPC106)"; 832 disp_name = "Grackle (MPC106)";
835 } else if (strcmp(dev->name, "bandit") == 0) { 833 } else if (of_node_name_eq(dev, "bandit")) {
836 setup_bandit(hose, &rsrc); 834 setup_bandit(hose, &rsrc);
837 disp_name = "Bandit"; 835 disp_name = "Bandit";
838 } else if (strcmp(dev->name, "chaos") == 0) { 836 } else if (of_node_name_eq(dev, "chaos")) {
839 setup_chaos(hose, &rsrc); 837 setup_chaos(hose, &rsrc);
840 disp_name = "Chaos"; 838 disp_name = "Chaos";
841 primary = 0; 839 primary = 0;
@@ -914,16 +912,14 @@ void __init pmac_pci_init(void)
914 "of device tree\n"); 912 "of device tree\n");
915 return; 913 return;
916 } 914 }
917 for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) { 915 for_each_child_of_node(root, np) {
918 if (np->name == NULL) 916 if (of_node_name_eq(np, "bandit")
919 continue; 917 || of_node_name_eq(np, "chaos")
920 if (strcmp(np->name, "bandit") == 0 918 || of_node_name_eq(np, "pci")) {
921 || strcmp(np->name, "chaos") == 0
922 || strcmp(np->name, "pci") == 0) {
923 if (pmac_add_bridge(np) == 0) 919 if (pmac_add_bridge(np) == 0)
924 of_node_get(np); 920 of_node_get(np);
925 } 921 }
926 if (strcmp(np->name, "ht") == 0) { 922 if (of_node_name_eq(np, "ht")) {
927 of_node_get(np); 923 of_node_get(np);
928 ht = np; 924 ht = np;
929 } 925 }
@@ -983,7 +979,7 @@ static bool pmac_pci_enable_device_hook(struct pci_dev *dev)
983 /* Firewire & GMAC were disabled after PCI probe, the driver is 979 /* Firewire & GMAC were disabled after PCI probe, the driver is
984 * claiming them, we must re-enable them now. 980 * claiming them, we must re-enable them now.
985 */ 981 */
986 if (uninorth_child && !strcmp(node->name, "firewire") && 982 if (uninorth_child && of_node_name_eq(node, "firewire") &&
987 (of_device_is_compatible(node, "pci106b,18") || 983 (of_device_is_compatible(node, "pci106b,18") ||
988 of_device_is_compatible(node, "pci106b,30") || 984 of_device_is_compatible(node, "pci106b,30") ||
989 of_device_is_compatible(node, "pci11c1,5811"))) { 985 of_device_is_compatible(node, "pci11c1,5811"))) {
@@ -991,7 +987,7 @@ static bool pmac_pci_enable_device_hook(struct pci_dev *dev)
991 pmac_call_feature(PMAC_FTR_1394_ENABLE, node, 0, 1); 987 pmac_call_feature(PMAC_FTR_1394_ENABLE, node, 0, 1);
992 updatecfg = 1; 988 updatecfg = 1;
993 } 989 }
994 if (uninorth_child && !strcmp(node->name, "ethernet") && 990 if (uninorth_child && of_node_name_eq(node, "ethernet") &&
995 of_device_is_compatible(node, "gmac")) { 991 of_device_is_compatible(node, "gmac")) {
996 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, node, 0, 1); 992 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, node, 0, 1);
997 updatecfg = 1; 993 updatecfg = 1;
@@ -1262,4 +1258,3 @@ struct pci_controller_ops pmac_pci_controller_ops = {
1262 .enable_device_hook = pmac_pci_enable_device_hook, 1258 .enable_device_hook = pmac_pci_enable_device_hook,
1263#endif 1259#endif
1264}; 1260};
1265
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index fd2e210559c8..62311e84a423 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -101,9 +101,8 @@ static void macio_gpio_init_one(struct macio_chip *macio)
101 * Find the "gpio" parent node 101 * Find the "gpio" parent node
102 */ 102 */
103 103
104 for (gparent = NULL; 104 for_each_child_of_node(macio->of_node, gparent)
105 (gparent = of_get_next_child(macio->of_node, gparent)) != NULL;) 105 if (of_node_name_eq(gparent, "gpio"))
106 if (strcmp(gparent->name, "gpio") == 0)
107 break; 106 break;
108 if (gparent == NULL) 107 if (gparent == NULL)
109 return; 108 return;
@@ -313,7 +312,7 @@ static void uninorth_install_pfunc(void)
313 * Install handlers for the hwclock child if any 312 * Install handlers for the hwclock child if any
314 */ 313 */
315 for (np = NULL; (np = of_get_next_child(uninorth_node, np)) != NULL;) 314 for (np = NULL; (np = of_get_next_child(uninorth_node, np)) != NULL;)
316 if (strcmp(np->name, "hw-clock") == 0) { 315 if (of_node_name_eq(np, "hw-clock")) {
317 unin_hwclock = np; 316 unin_hwclock = np;
318 break; 317 break;
319 } 318 }
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 57bbff465964..c292ffac2ed4 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -417,7 +417,7 @@ int of_irq_parse_oldworld(struct device_node *device, int index,
417 if (ints != NULL) 417 if (ints != NULL)
418 break; 418 break;
419 device = device->parent; 419 device = device->parent;
420 if (device && strcmp(device->type, "pci") != 0) 420 if (!of_node_is_type(device, "pci"))
421 break; 421 break;
422 } 422 }
423 if (ints == NULL) 423 if (ints == NULL)
@@ -553,13 +553,13 @@ void __init pmac_pic_init(void)
553 553
554 for_each_node_with_property(np, "interrupt-controller") { 554 for_each_node_with_property(np, "interrupt-controller") {
555 /* Skip /chosen/interrupt-controller */ 555 /* Skip /chosen/interrupt-controller */
556 if (strcmp(np->name, "chosen") == 0) 556 if (of_node_name_eq(np, "chosen"))
557 continue; 557 continue;
558 /* It seems like at least one person wants 558 /* It seems like at least one person wants
559 * to use BootX on a machine with an AppleKiwi 559 * to use BootX on a machine with an AppleKiwi
560 * controller which happens to pretend to be an 560 * controller which happens to pretend to be an
561 * interrupt controller too. */ 561 * interrupt controller too. */
562 if (strcmp(np->name, "AppleKiwi") == 0) 562 if (of_node_name_eq(np, "AppleKiwi"))
563 continue; 563 continue;
564 /* I think we found one ! */ 564 /* I think we found one ! */
565 of_irq_dflt_pic = np; 565 of_irq_dflt_pic = np;
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 2f00e3daafb0..2e8221e20ee8 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -560,15 +560,9 @@ static int __init check_pmac_serial_console(void)
560 } 560 }
561 pr_debug("stdout is %pOF\n", prom_stdout); 561 pr_debug("stdout is %pOF\n", prom_stdout);
562 562
563 name = of_get_property(prom_stdout, "name", NULL); 563 if (of_node_name_eq(prom_stdout, "ch-a"))
564 if (!name) {
565 pr_debug(" stdout package has no name !\n");
566 goto not_found;
567 }
568
569 if (strcmp(name, "ch-a") == 0)
570 offset = 0; 564 offset = 0;
571 else if (strcmp(name, "ch-b") == 0) 565 else if (of_node_name_eq(prom_stdout, "ch-b"))
572 offset = 1; 566 offset = 1;
573 else 567 else
574 goto not_found; 568 goto not_found;
diff --git a/arch/powerpc/platforms/powermac/sleep.S b/arch/powerpc/platforms/powermac/sleep.S
index f89808b9713d..fb64b09cad9d 100644
--- a/arch/powerpc/platforms/powermac/sleep.S
+++ b/arch/powerpc/platforms/powermac/sleep.S
@@ -56,7 +56,7 @@
56 * vector that will be called by the ROM on wakeup 56 * vector that will be called by the ROM on wakeup
57 */ 57 */
58_GLOBAL(low_sleep_handler) 58_GLOBAL(low_sleep_handler)
59#ifndef CONFIG_6xx 59#ifndef CONFIG_PPC_BOOK3S_32
60 blr 60 blr
61#else 61#else
62 mflr r0 62 mflr r0
@@ -394,5 +394,5 @@ sleep_storage:
394 .long 0 394 .long 0
395 .balign L1_CACHE_BYTES, 0 395 .balign L1_CACHE_BYTES, 0
396 396
397#endif /* CONFIG_6xx */ 397#endif /* CONFIG_PPC_BOOK3S_32 */
398 .section .text 398 .section .text
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 447da6db450a..35be6e0b886d 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -832,8 +832,7 @@ static int smp_core99_kick_cpu(int nr)
832 mdelay(1); 832 mdelay(1);
833 833
834 /* Restore our exception vector */ 834 /* Restore our exception vector */
835 *vector = save_vector; 835 patch_instruction(vector, save_vector);
836 flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
837 836
838 local_irq_restore(flags); 837 local_irq_restore(flags);
839 if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347); 838 if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
diff --git a/arch/powerpc/platforms/powermac/udbg_adb.c b/arch/powerpc/platforms/powermac/udbg_adb.c
index 64f38f0d15ed..12158bb4fed7 100644
--- a/arch/powerpc/platforms/powermac/udbg_adb.c
+++ b/arch/powerpc/platforms/powermac/udbg_adb.c
@@ -194,7 +194,7 @@ int __init udbg_adb_init(int force_btext)
194 */ 194 */
195 for_each_node_by_name(np, "keyboard") { 195 for_each_node_by_name(np, "keyboard") {
196 struct device_node *parent = of_get_parent(np); 196 struct device_node *parent = of_get_parent(np);
197 int found = (parent && strcmp(parent->type, "adb") == 0); 197 int found = of_node_is_type(parent, "adb");
198 of_node_put(parent); 198 of_node_put(parent);
199 if (found) 199 if (found)
200 break; 200 break;
diff --git a/arch/powerpc/platforms/powermac/udbg_scc.c b/arch/powerpc/platforms/powermac/udbg_scc.c
index 8901973ed683..415b74d7c253 100644
--- a/arch/powerpc/platforms/powermac/udbg_scc.c
+++ b/arch/powerpc/platforms/powermac/udbg_scc.c
@@ -87,7 +87,7 @@ void udbg_scc_init(int force_scc)
87 for (ch = NULL; (ch = of_get_next_child(escc, ch)) != NULL;) { 87 for (ch = NULL; (ch = of_get_next_child(escc, ch)) != NULL;) {
88 if (ch == stdout) 88 if (ch == stdout)
89 ch_def = of_node_get(ch); 89 ch_def = of_node_get(ch);
90 if (strcmp(ch->name, "ch-a") == 0) 90 if (of_node_name_eq(ch, "ch-a"))
91 ch_a = of_node_get(ch); 91 ch_a = of_node_get(ch);
92 } 92 }
93 if (ch_def == NULL && !force_scc) 93 if (ch_def == NULL && !force_scc)
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index abc0be7507c8..f38078976c5d 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -564,8 +564,8 @@ static void pnv_eeh_get_phb_diag(struct eeh_pe *pe)
564static int pnv_eeh_get_phb_state(struct eeh_pe *pe) 564static int pnv_eeh_get_phb_state(struct eeh_pe *pe)
565{ 565{
566 struct pnv_phb *phb = pe->phb->private_data; 566 struct pnv_phb *phb = pe->phb->private_data;
567 u8 fstate; 567 u8 fstate = 0;
568 __be16 pcierr; 568 __be16 pcierr = 0;
569 s64 rc; 569 s64 rc;
570 int result = 0; 570 int result = 0;
571 571
@@ -603,8 +603,8 @@ static int pnv_eeh_get_phb_state(struct eeh_pe *pe)
603static int pnv_eeh_get_pe_state(struct eeh_pe *pe) 603static int pnv_eeh_get_pe_state(struct eeh_pe *pe)
604{ 604{
605 struct pnv_phb *phb = pe->phb->private_data; 605 struct pnv_phb *phb = pe->phb->private_data;
606 u8 fstate; 606 u8 fstate = 0;
607 __be16 pcierr; 607 __be16 pcierr = 0;
608 s64 rc; 608 s64 rc;
609 int result; 609 int result;
610 610
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c
index 75b935252981..d7f742ed48ba 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -9,32 +9,19 @@
9 * License as published by the Free Software Foundation. 9 * License as published by the Free Software Foundation.
10 */ 10 */
11 11
12#include <linux/slab.h>
13#include <linux/mmu_notifier.h> 12#include <linux/mmu_notifier.h>
14#include <linux/mmu_context.h> 13#include <linux/mmu_context.h>
15#include <linux/of.h> 14#include <linux/of.h>
16#include <linux/export.h>
17#include <linux/pci.h> 15#include <linux/pci.h>
18#include <linux/memblock.h> 16#include <linux/memblock.h>
19#include <linux/iommu.h>
20#include <linux/sizes.h> 17#include <linux/sizes.h>
21 18
22#include <asm/debugfs.h> 19#include <asm/debugfs.h>
23#include <asm/tlb.h>
24#include <asm/powernv.h> 20#include <asm/powernv.h>
25#include <asm/reg.h>
26#include <asm/opal.h>
27#include <asm/io.h>
28#include <asm/iommu.h>
29#include <asm/pnv-pci.h>
30#include <asm/msi_bitmap.h>
31#include <asm/opal.h> 21#include <asm/opal.h>
32 22
33#include "powernv.h"
34#include "pci.h" 23#include "pci.h"
35 24
36#define npu_to_phb(x) container_of(x, struct pnv_phb, npu)
37
38/* 25/*
39 * spinlock to protect initialisation of an npu_context for a particular 26 * spinlock to protect initialisation of an npu_context for a particular
40 * mm_struct. 27 * mm_struct.
@@ -133,15 +120,25 @@ static struct pnv_ioda_pe *get_gpu_pci_dev_and_pe(struct pnv_ioda_pe *npe,
133 return pe; 120 return pe;
134} 121}
135 122
136long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, 123static long pnv_npu_unset_window(struct iommu_table_group *table_group,
124 int num);
125
126static long pnv_npu_set_window(struct iommu_table_group *table_group, int num,
137 struct iommu_table *tbl) 127 struct iommu_table *tbl)
138{ 128{
129 struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
130 table_group);
139 struct pnv_phb *phb = npe->phb; 131 struct pnv_phb *phb = npe->phb;
140 int64_t rc; 132 int64_t rc;
141 const unsigned long size = tbl->it_indirect_levels ? 133 const unsigned long size = tbl->it_indirect_levels ?
142 tbl->it_level_size : tbl->it_size; 134 tbl->it_level_size : tbl->it_size;
143 const __u64 start_addr = tbl->it_offset << tbl->it_page_shift; 135 const __u64 start_addr = tbl->it_offset << tbl->it_page_shift;
144 const __u64 win_size = tbl->it_size << tbl->it_page_shift; 136 const __u64 win_size = tbl->it_size << tbl->it_page_shift;
137 int num2 = (num == 0) ? 1 : 0;
138
139 /* NPU has just one TVE so if there is another table, remove it first */
140 if (npe->table_group.tables[num2])
141 pnv_npu_unset_window(&npe->table_group, num2);
145 142
146 pe_info(npe, "Setting up window %llx..%llx pg=%lx\n", 143 pe_info(npe, "Setting up window %llx..%llx pg=%lx\n",
147 start_addr, start_addr + win_size - 1, 144 start_addr, start_addr + win_size - 1,
@@ -167,11 +164,16 @@ long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
167 return 0; 164 return 0;
168} 165}
169 166
170long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num) 167static long pnv_npu_unset_window(struct iommu_table_group *table_group, int num)
171{ 168{
169 struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
170 table_group);
172 struct pnv_phb *phb = npe->phb; 171 struct pnv_phb *phb = npe->phb;
173 int64_t rc; 172 int64_t rc;
174 173
174 if (!npe->table_group.tables[num])
175 return 0;
176
175 pe_info(npe, "Removing DMA window\n"); 177 pe_info(npe, "Removing DMA window\n");
176 178
177 rc = opal_pci_map_pe_dma_window(phb->opal_id, npe->pe_number, 179 rc = opal_pci_map_pe_dma_window(phb->opal_id, npe->pe_number,
@@ -210,7 +212,8 @@ static void pnv_npu_dma_set_32(struct pnv_ioda_pe *npe)
210 if (!gpe) 212 if (!gpe)
211 return; 213 return;
212 214
213 rc = pnv_npu_set_window(npe, 0, gpe->table_group.tables[0]); 215 rc = pnv_npu_set_window(&npe->table_group, 0,
216 gpe->table_group.tables[0]);
214 217
215 /* 218 /*
216 * NVLink devices use the same TCE table configuration as 219 * NVLink devices use the same TCE table configuration as
@@ -235,7 +238,7 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe *npe)
235 if (phb->type != PNV_PHB_NPU_NVLINK || !npe->pdev) 238 if (phb->type != PNV_PHB_NPU_NVLINK || !npe->pdev)
236 return -EINVAL; 239 return -EINVAL;
237 240
238 rc = pnv_npu_unset_window(npe, 0); 241 rc = pnv_npu_unset_window(&npe->table_group, 0);
239 if (rc != OPAL_SUCCESS) 242 if (rc != OPAL_SUCCESS)
240 return rc; 243 return rc;
241 244
@@ -288,11 +291,15 @@ void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass)
288 } 291 }
289} 292}
290 293
294#ifdef CONFIG_IOMMU_API
291/* Switch ownership from platform code to external user (e.g. VFIO) */ 295/* Switch ownership from platform code to external user (e.g. VFIO) */
292void pnv_npu_take_ownership(struct pnv_ioda_pe *npe) 296static void pnv_npu_take_ownership(struct iommu_table_group *table_group)
293{ 297{
298 struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
299 table_group);
294 struct pnv_phb *phb = npe->phb; 300 struct pnv_phb *phb = npe->phb;
295 int64_t rc; 301 int64_t rc;
302 struct pci_dev *gpdev = NULL;
296 303
297 /* 304 /*
298 * Note: NPU has just a single TVE in the hardware which means that 305 * Note: NPU has just a single TVE in the hardware which means that
@@ -301,7 +308,7 @@ void pnv_npu_take_ownership(struct pnv_ioda_pe *npe)
301 * if it was enabled at the moment of ownership change. 308 * if it was enabled at the moment of ownership change.
302 */ 309 */
303 if (npe->table_group.tables[0]) { 310 if (npe->table_group.tables[0]) {
304 pnv_npu_unset_window(npe, 0); 311 pnv_npu_unset_window(&npe->table_group, 0);
305 return; 312 return;
306 } 313 }
307 314
@@ -314,30 +321,315 @@ void pnv_npu_take_ownership(struct pnv_ioda_pe *npe)
314 return; 321 return;
315 } 322 }
316 pnv_pci_ioda2_tce_invalidate_entire(npe->phb, false); 323 pnv_pci_ioda2_tce_invalidate_entire(npe->phb, false);
324
325 get_gpu_pci_dev_and_pe(npe, &gpdev);
326 if (gpdev)
327 pnv_npu2_unmap_lpar_dev(gpdev);
317} 328}
318 329
319struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe) 330static void pnv_npu_release_ownership(struct iommu_table_group *table_group)
320{ 331{
321 struct pnv_phb *phb = npe->phb; 332 struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
322 struct pci_bus *pbus = phb->hose->bus; 333 table_group);
323 struct pci_dev *npdev, *gpdev = NULL, *gptmp; 334 struct pci_dev *gpdev = NULL;
324 struct pnv_ioda_pe *gpe = get_gpu_pci_dev_and_pe(npe, &gpdev); 335
336 get_gpu_pci_dev_and_pe(npe, &gpdev);
337 if (gpdev)
338 pnv_npu2_map_lpar_dev(gpdev, 0, MSR_DR | MSR_PR | MSR_HV);
339}
340
341static struct iommu_table_group_ops pnv_pci_npu_ops = {
342 .set_window = pnv_npu_set_window,
343 .unset_window = pnv_npu_unset_window,
344 .take_ownership = pnv_npu_take_ownership,
345 .release_ownership = pnv_npu_release_ownership,
346};
347#endif /* !CONFIG_IOMMU_API */
348
349/*
350 * NPU2 ATS
351 */
352/* Maximum possible number of ATSD MMIO registers per NPU */
353#define NV_NMMU_ATSD_REGS 8
354#define NV_NPU_MAX_PE_NUM 16
355
356/*
357 * A compound NPU IOMMU group which might consist of 1 GPU + 2xNPUs (POWER8) or
358 * up to 3 x (GPU + 2xNPUs) (POWER9).
359 */
360struct npu_comp {
361 struct iommu_table_group table_group;
362 int pe_num;
363 struct pnv_ioda_pe *pe[NV_NPU_MAX_PE_NUM];
364};
365
366/* An NPU descriptor, valid for POWER9 only */
367struct npu {
368 int index;
369 __be64 *mmio_atsd_regs[NV_NMMU_ATSD_REGS];
370 unsigned int mmio_atsd_count;
371
372 /* Bitmask for MMIO register usage */
373 unsigned long mmio_atsd_usage;
374
375 /* Do we need to explicitly flush the nest mmu? */
376 bool nmmu_flush;
377
378 struct npu_comp npucomp;
379};
380
381#ifdef CONFIG_IOMMU_API
382static long pnv_npu_peers_create_table_userspace(
383 struct iommu_table_group *table_group,
384 int num, __u32 page_shift, __u64 window_size, __u32 levels,
385 struct iommu_table **ptbl)
386{
387 struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
388 table_group);
389
390 if (!npucomp->pe_num || !npucomp->pe[0] ||
391 !npucomp->pe[0]->table_group.ops ||
392 !npucomp->pe[0]->table_group.ops->create_table)
393 return -EFAULT;
394
395 return npucomp->pe[0]->table_group.ops->create_table(
396 &npucomp->pe[0]->table_group, num, page_shift,
397 window_size, levels, ptbl);
398}
399
400static long pnv_npu_peers_set_window(struct iommu_table_group *table_group,
401 int num, struct iommu_table *tbl)
402{
403 int i, j;
404 long ret = 0;
405 struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
406 table_group);
407
408 for (i = 0; i < npucomp->pe_num; ++i) {
409 struct pnv_ioda_pe *pe = npucomp->pe[i];
410
411 if (!pe->table_group.ops->set_window)
412 continue;
413
414 ret = pe->table_group.ops->set_window(&pe->table_group,
415 num, tbl);
416 if (ret)
417 break;
418 }
419
420 if (ret) {
421 for (j = 0; j < i; ++j) {
422 struct pnv_ioda_pe *pe = npucomp->pe[j];
423
424 if (!pe->table_group.ops->unset_window)
425 continue;
426
427 ret = pe->table_group.ops->unset_window(
428 &pe->table_group, num);
429 if (ret)
430 break;
431 }
432 } else {
433 table_group->tables[num] = iommu_tce_table_get(tbl);
434 }
435
436 return ret;
437}
325 438
326 if (!gpe || !gpdev) 439static long pnv_npu_peers_unset_window(struct iommu_table_group *table_group,
440 int num)
441{
442 int i, j;
443 long ret = 0;
444 struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
445 table_group);
446
447 for (i = 0; i < npucomp->pe_num; ++i) {
448 struct pnv_ioda_pe *pe = npucomp->pe[i];
449
450 WARN_ON(npucomp->table_group.tables[num] !=
451 table_group->tables[num]);
452 if (!npucomp->table_group.tables[num])
453 continue;
454
455 if (!pe->table_group.ops->unset_window)
456 continue;
457
458 ret = pe->table_group.ops->unset_window(&pe->table_group, num);
459 if (ret)
460 break;
461 }
462
463 if (ret) {
464 for (j = 0; j < i; ++j) {
465 struct pnv_ioda_pe *pe = npucomp->pe[j];
466
467 if (!npucomp->table_group.tables[num])
468 continue;
469
470 if (!pe->table_group.ops->set_window)
471 continue;
472
473 ret = pe->table_group.ops->set_window(&pe->table_group,
474 num, table_group->tables[num]);
475 if (ret)
476 break;
477 }
478 } else if (table_group->tables[num]) {
479 iommu_tce_table_put(table_group->tables[num]);
480 table_group->tables[num] = NULL;
481 }
482
483 return ret;
484}
485
486static void pnv_npu_peers_take_ownership(struct iommu_table_group *table_group)
487{
488 int i;
489 struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
490 table_group);
491
492 for (i = 0; i < npucomp->pe_num; ++i) {
493 struct pnv_ioda_pe *pe = npucomp->pe[i];
494
495 if (!pe->table_group.ops->take_ownership)
496 continue;
497 pe->table_group.ops->take_ownership(&pe->table_group);
498 }
499}
500
501static void pnv_npu_peers_release_ownership(
502 struct iommu_table_group *table_group)
503{
504 int i;
505 struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
506 table_group);
507
508 for (i = 0; i < npucomp->pe_num; ++i) {
509 struct pnv_ioda_pe *pe = npucomp->pe[i];
510
511 if (!pe->table_group.ops->release_ownership)
512 continue;
513 pe->table_group.ops->release_ownership(&pe->table_group);
514 }
515}
516
517static struct iommu_table_group_ops pnv_npu_peers_ops = {
518 .get_table_size = pnv_pci_ioda2_get_table_size,
519 .create_table = pnv_npu_peers_create_table_userspace,
520 .set_window = pnv_npu_peers_set_window,
521 .unset_window = pnv_npu_peers_unset_window,
522 .take_ownership = pnv_npu_peers_take_ownership,
523 .release_ownership = pnv_npu_peers_release_ownership,
524};
525
526static void pnv_comp_attach_table_group(struct npu_comp *npucomp,
527 struct pnv_ioda_pe *pe)
528{
529 if (WARN_ON(npucomp->pe_num == NV_NPU_MAX_PE_NUM))
530 return;
531
532 npucomp->pe[npucomp->pe_num] = pe;
533 ++npucomp->pe_num;
534}
535
536struct iommu_table_group *pnv_try_setup_npu_table_group(struct pnv_ioda_pe *pe)
537{
538 struct iommu_table_group *table_group;
539 struct npu_comp *npucomp;
540 struct pci_dev *gpdev = NULL;
541 struct pci_controller *hose;
542 struct pci_dev *npdev = NULL;
543
544 list_for_each_entry(gpdev, &pe->pbus->devices, bus_list) {
545 npdev = pnv_pci_get_npu_dev(gpdev, 0);
546 if (npdev)
547 break;
548 }
549
550 if (!npdev)
551 /* It is not an NPU attached device, skip */
552 return NULL;
553
554 hose = pci_bus_to_host(npdev->bus);
555
556 if (hose->npu) {
557 table_group = &hose->npu->npucomp.table_group;
558
559 if (!table_group->group) {
560 table_group->ops = &pnv_npu_peers_ops;
561 iommu_register_group(table_group,
562 hose->global_number,
563 pe->pe_number);
564 }
565 } else {
566 /* Create a group for 1 GPU and attached NPUs for POWER8 */
567 pe->npucomp = kzalloc(sizeof(pe->npucomp), GFP_KERNEL);
568 table_group = &pe->npucomp->table_group;
569 table_group->ops = &pnv_npu_peers_ops;
570 iommu_register_group(table_group, hose->global_number,
571 pe->pe_number);
572 }
573
574 /* Steal capabilities from a GPU PE */
575 table_group->max_dynamic_windows_supported =
576 pe->table_group.max_dynamic_windows_supported;
577 table_group->tce32_start = pe->table_group.tce32_start;
578 table_group->tce32_size = pe->table_group.tce32_size;
579 table_group->max_levels = pe->table_group.max_levels;
580 if (!table_group->pgsizes)
581 table_group->pgsizes = pe->table_group.pgsizes;
582
583 npucomp = container_of(table_group, struct npu_comp, table_group);
584 pnv_comp_attach_table_group(npucomp, pe);
585
586 return table_group;
587}
588
589struct iommu_table_group *pnv_npu_compound_attach(struct pnv_ioda_pe *pe)
590{
591 struct iommu_table_group *table_group;
592 struct npu_comp *npucomp;
593 struct pci_dev *gpdev = NULL;
594 struct pci_dev *npdev;
595 struct pnv_ioda_pe *gpe = get_gpu_pci_dev_and_pe(pe, &gpdev);
596
597 WARN_ON(!(pe->flags & PNV_IODA_PE_DEV));
598 if (!gpe)
327 return NULL; 599 return NULL;
328 600
329 list_for_each_entry(npdev, &pbus->devices, bus_list) { 601 /*
330 gptmp = pnv_pci_get_gpu_dev(npdev); 602 * IODA2 bridges get this set up from pci_controller_ops::setup_bridge
603 * but NPU bridges do not have this hook defined so we do it here.
604 * We do not setup other table group parameters as they won't be used
605 * anyway - NVLink bridges are subordinate PEs.
606 */
607 pe->table_group.ops = &pnv_pci_npu_ops;
608
609 table_group = iommu_group_get_iommudata(
610 iommu_group_get(&gpdev->dev));
611
612 /*
613 * On P9 NPU PHB and PCI PHB support different page sizes,
614 * keep only matching. We expect here that NVLink bridge PE pgsizes is
615 * initialized by the caller.
616 */
617 table_group->pgsizes &= pe->table_group.pgsizes;
618 npucomp = container_of(table_group, struct npu_comp, table_group);
619 pnv_comp_attach_table_group(npucomp, pe);
620
621 list_for_each_entry(npdev, &pe->phb->hose->bus->devices, bus_list) {
622 struct pci_dev *gpdevtmp = pnv_pci_get_gpu_dev(npdev);
331 623
332 if (gptmp != gpdev) 624 if (gpdevtmp != gpdev)
333 continue; 625 continue;
334 626
335 pe_info(gpe, "Attached NPU %s\n", dev_name(&npdev->dev)); 627 iommu_add_device(table_group, &npdev->dev);
336 iommu_group_add_device(gpe->table_group.group, &npdev->dev);
337 } 628 }
338 629
339 return gpe; 630 return table_group;
340} 631}
632#endif /* CONFIG_IOMMU_API */
341 633
342/* Maximum number of nvlinks per npu */ 634/* Maximum number of nvlinks per npu */
343#define NV_MAX_LINKS 6 635#define NV_MAX_LINKS 6
@@ -490,7 +782,6 @@ static void acquire_atsd_reg(struct npu_context *npu_context,
490 int i, j; 782 int i, j;
491 struct npu *npu; 783 struct npu *npu;
492 struct pci_dev *npdev; 784 struct pci_dev *npdev;
493 struct pnv_phb *nphb;
494 785
495 for (i = 0; i <= max_npu2_index; i++) { 786 for (i = 0; i <= max_npu2_index; i++) {
496 mmio_atsd_reg[i].reg = -1; 787 mmio_atsd_reg[i].reg = -1;
@@ -505,8 +796,10 @@ static void acquire_atsd_reg(struct npu_context *npu_context,
505 if (!npdev) 796 if (!npdev)
506 continue; 797 continue;
507 798
508 nphb = pci_bus_to_host(npdev->bus)->private_data; 799 npu = pci_bus_to_host(npdev->bus)->npu;
509 npu = &nphb->npu; 800 if (!npu)
801 continue;
802
510 mmio_atsd_reg[i].npu = npu; 803 mmio_atsd_reg[i].npu = npu;
511 mmio_atsd_reg[i].reg = get_mmio_atsd_reg(npu); 804 mmio_atsd_reg[i].reg = get_mmio_atsd_reg(npu);
512 while (mmio_atsd_reg[i].reg < 0) { 805 while (mmio_atsd_reg[i].reg < 0) {
@@ -671,9 +964,9 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
671 u32 nvlink_index; 964 u32 nvlink_index;
672 struct device_node *nvlink_dn; 965 struct device_node *nvlink_dn;
673 struct mm_struct *mm = current->mm; 966 struct mm_struct *mm = current->mm;
674 struct pnv_phb *nphb;
675 struct npu *npu; 967 struct npu *npu;
676 struct npu_context *npu_context; 968 struct npu_context *npu_context;
969 struct pci_controller *hose;
677 970
678 /* 971 /*
679 * At present we don't support GPUs connected to multiple NPUs and I'm 972 * At present we don't support GPUs connected to multiple NPUs and I'm
@@ -681,13 +974,14 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
681 */ 974 */
682 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0); 975 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
683 976
684 if (!firmware_has_feature(FW_FEATURE_OPAL))
685 return ERR_PTR(-ENODEV);
686
687 if (!npdev) 977 if (!npdev)
688 /* No nvlink associated with this GPU device */ 978 /* No nvlink associated with this GPU device */
689 return ERR_PTR(-ENODEV); 979 return ERR_PTR(-ENODEV);
690 980
981 /* We only support DR/PR/HV in pnv_npu2_map_lpar_dev() */
982 if (flags & ~(MSR_DR | MSR_PR | MSR_HV))
983 return ERR_PTR(-EINVAL);
984
691 nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0); 985 nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0);
692 if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index", 986 if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
693 &nvlink_index))) 987 &nvlink_index)))
@@ -701,20 +995,10 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
701 return ERR_PTR(-EINVAL); 995 return ERR_PTR(-EINVAL);
702 } 996 }
703 997
704 nphb = pci_bus_to_host(npdev->bus)->private_data; 998 hose = pci_bus_to_host(npdev->bus);
705 npu = &nphb->npu; 999 npu = hose->npu;
706 1000 if (!npu)
707 /* 1001 return ERR_PTR(-ENODEV);
708 * Setup the NPU context table for a particular GPU. These need to be
709 * per-GPU as we need the tables to filter ATSDs when there are no
710 * active contexts on a particular GPU. It is safe for these to be
711 * called concurrently with destroy as the OPAL call takes appropriate
712 * locks and refcounts on init/destroy.
713 */
714 rc = opal_npu_init_context(nphb->opal_id, mm->context.id, flags,
715 PCI_DEVID(gpdev->bus->number, gpdev->devfn));
716 if (rc < 0)
717 return ERR_PTR(-ENOSPC);
718 1002
719 /* 1003 /*
720 * We store the npu pci device so we can more easily get at the 1004 * We store the npu pci device so we can more easily get at the
@@ -726,9 +1010,6 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
726 if (npu_context->release_cb != cb || 1010 if (npu_context->release_cb != cb ||
727 npu_context->priv != priv) { 1011 npu_context->priv != priv) {
728 spin_unlock(&npu_context_lock); 1012 spin_unlock(&npu_context_lock);
729 opal_npu_destroy_context(nphb->opal_id, mm->context.id,
730 PCI_DEVID(gpdev->bus->number,
731 gpdev->devfn));
732 return ERR_PTR(-EINVAL); 1013 return ERR_PTR(-EINVAL);
733 } 1014 }
734 1015
@@ -754,9 +1035,6 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
754 1035
755 if (rc) { 1036 if (rc) {
756 kfree(npu_context); 1037 kfree(npu_context);
757 opal_npu_destroy_context(nphb->opal_id, mm->context.id,
758 PCI_DEVID(gpdev->bus->number,
759 gpdev->devfn));
760 return ERR_PTR(rc); 1038 return ERR_PTR(rc);
761 } 1039 }
762 1040
@@ -776,7 +1054,7 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
776 */ 1054 */
777 WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], npdev); 1055 WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], npdev);
778 1056
779 if (!nphb->npu.nmmu_flush) { 1057 if (!npu->nmmu_flush) {
780 /* 1058 /*
781 * If we're not explicitly flushing ourselves we need to mark 1059 * If we're not explicitly flushing ourselves we need to mark
782 * the thread for global flushes 1060 * the thread for global flushes
@@ -809,27 +1087,24 @@ void pnv_npu2_destroy_context(struct npu_context *npu_context,
809 struct pci_dev *gpdev) 1087 struct pci_dev *gpdev)
810{ 1088{
811 int removed; 1089 int removed;
812 struct pnv_phb *nphb;
813 struct npu *npu; 1090 struct npu *npu;
814 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0); 1091 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
815 struct device_node *nvlink_dn; 1092 struct device_node *nvlink_dn;
816 u32 nvlink_index; 1093 u32 nvlink_index;
1094 struct pci_controller *hose;
817 1095
818 if (WARN_ON(!npdev)) 1096 if (WARN_ON(!npdev))
819 return; 1097 return;
820 1098
821 if (!firmware_has_feature(FW_FEATURE_OPAL)) 1099 hose = pci_bus_to_host(npdev->bus);
1100 npu = hose->npu;
1101 if (!npu)
822 return; 1102 return;
823
824 nphb = pci_bus_to_host(npdev->bus)->private_data;
825 npu = &nphb->npu;
826 nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0); 1103 nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0);
827 if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index", 1104 if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
828 &nvlink_index))) 1105 &nvlink_index)))
829 return; 1106 return;
830 WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], NULL); 1107 WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], NULL);
831 opal_npu_destroy_context(nphb->opal_id, npu_context->mm->context.id,
832 PCI_DEVID(gpdev->bus->number, gpdev->devfn));
833 spin_lock(&npu_context_lock); 1108 spin_lock(&npu_context_lock);
834 removed = kref_put(&npu_context->kref, pnv_npu2_release_context); 1109 removed = kref_put(&npu_context->kref, pnv_npu2_release_context);
835 spin_unlock(&npu_context_lock); 1110 spin_unlock(&npu_context_lock);
@@ -857,13 +1132,12 @@ int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea,
857 u64 rc = 0, result = 0; 1132 u64 rc = 0, result = 0;
858 int i, is_write; 1133 int i, is_write;
859 struct page *page[1]; 1134 struct page *page[1];
1135 const char __user *u;
1136 char c;
860 1137
861 /* mmap_sem should be held so the struct_mm must be present */ 1138 /* mmap_sem should be held so the struct_mm must be present */
862 struct mm_struct *mm = context->mm; 1139 struct mm_struct *mm = context->mm;
863 1140
864 if (!firmware_has_feature(FW_FEATURE_OPAL))
865 return -ENODEV;
866
867 WARN_ON(!rwsem_is_locked(&mm->mmap_sem)); 1141 WARN_ON(!rwsem_is_locked(&mm->mmap_sem));
868 1142
869 for (i = 0; i < count; i++) { 1143 for (i = 0; i < count; i++) {
@@ -872,18 +1146,17 @@ int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea,
872 is_write ? FOLL_WRITE : 0, 1146 is_write ? FOLL_WRITE : 0,
873 page, NULL, NULL); 1147 page, NULL, NULL);
874 1148
875 /*
876 * To support virtualised environments we will have to do an
877 * access to the page to ensure it gets faulted into the
878 * hypervisor. For the moment virtualisation is not supported in
879 * other areas so leave the access out.
880 */
881 if (rc != 1) { 1149 if (rc != 1) {
882 status[i] = rc; 1150 status[i] = rc;
883 result = -EFAULT; 1151 result = -EFAULT;
884 continue; 1152 continue;
885 } 1153 }
886 1154
1155 /* Make sure partition scoped tree gets a pte */
1156 u = page_address(page[0]);
1157 if (__get_user(c, u))
1158 result = -EFAULT;
1159
887 status[i] = 0; 1160 status[i] = 0;
888 put_page(page[0]); 1161 put_page(page[0]);
889 } 1162 }
@@ -892,42 +1165,127 @@ int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea,
892} 1165}
893EXPORT_SYMBOL(pnv_npu2_handle_fault); 1166EXPORT_SYMBOL(pnv_npu2_handle_fault);
894 1167
895int pnv_npu2_init(struct pnv_phb *phb) 1168int pnv_npu2_init(struct pci_controller *hose)
896{ 1169{
897 unsigned int i; 1170 unsigned int i;
898 u64 mmio_atsd; 1171 u64 mmio_atsd;
899 struct device_node *dn;
900 struct pci_dev *gpdev;
901 static int npu_index; 1172 static int npu_index;
902 uint64_t rc = 0; 1173 struct npu *npu;
903 1174 int ret;
904 phb->npu.nmmu_flush = 1175
905 of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush"); 1176 npu = kzalloc(sizeof(*npu), GFP_KERNEL);
906 for_each_child_of_node(phb->hose->dn, dn) { 1177 if (!npu)
907 gpdev = pnv_pci_get_gpu_dev(get_pci_dev(dn)); 1178 return -ENOMEM;
908 if (gpdev) {
909 rc = opal_npu_map_lpar(phb->opal_id,
910 PCI_DEVID(gpdev->bus->number, gpdev->devfn),
911 0, 0);
912 if (rc)
913 dev_err(&gpdev->dev,
914 "Error %lld mapping device to LPAR\n",
915 rc);
916 }
917 }
918 1179
919 for (i = 0; !of_property_read_u64_index(phb->hose->dn, "ibm,mmio-atsd", 1180 npu->nmmu_flush = of_property_read_bool(hose->dn, "ibm,nmmu-flush");
920 i, &mmio_atsd); i++)
921 phb->npu.mmio_atsd_regs[i] = ioremap(mmio_atsd, 32);
922 1181
923 pr_info("NPU%lld: Found %d MMIO ATSD registers", phb->opal_id, i); 1182 for (i = 0; i < ARRAY_SIZE(npu->mmio_atsd_regs) &&
924 phb->npu.mmio_atsd_count = i; 1183 !of_property_read_u64_index(hose->dn, "ibm,mmio-atsd",
925 phb->npu.mmio_atsd_usage = 0; 1184 i, &mmio_atsd); i++)
1185 npu->mmio_atsd_regs[i] = ioremap(mmio_atsd, 32);
1186
1187 pr_info("NPU%d: Found %d MMIO ATSD registers", hose->global_number, i);
1188 npu->mmio_atsd_count = i;
1189 npu->mmio_atsd_usage = 0;
926 npu_index++; 1190 npu_index++;
927 if (WARN_ON(npu_index >= NV_MAX_NPUS)) 1191 if (WARN_ON(npu_index >= NV_MAX_NPUS)) {
928 return -ENOSPC; 1192 ret = -ENOSPC;
1193 goto fail_exit;
1194 }
929 max_npu2_index = npu_index; 1195 max_npu2_index = npu_index;
930 phb->npu.index = npu_index; 1196 npu->index = npu_index;
1197 hose->npu = npu;
1198
1199 return 0;
1200
1201fail_exit:
1202 for (i = 0; i < npu->mmio_atsd_count; ++i)
1203 iounmap(npu->mmio_atsd_regs[i]);
1204
1205 kfree(npu);
1206
1207 return ret;
1208}
1209
1210int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid,
1211 unsigned long msr)
1212{
1213 int ret;
1214 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
1215 struct pci_controller *hose;
1216 struct pnv_phb *nphb;
1217
1218 if (!npdev)
1219 return -ENODEV;
1220
1221 hose = pci_bus_to_host(npdev->bus);
1222 nphb = hose->private_data;
1223
1224 dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=%u\n",
1225 nphb->opal_id, lparid);
1226 /*
1227 * Currently we only support radix and non-zero LPCR only makes sense
1228 * for hash tables so skiboot expects the LPCR parameter to be a zero.
1229 */
1230 ret = opal_npu_map_lpar(nphb->opal_id,
1231 PCI_DEVID(gpdev->bus->number, gpdev->devfn), lparid,
1232 0 /* LPCR bits */);
1233 if (ret) {
1234 dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret);
1235 return ret;
1236 }
1237
1238 dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n",
1239 nphb->opal_id, msr);
1240 ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr,
1241 PCI_DEVID(gpdev->bus->number, gpdev->devfn));
1242 if (ret < 0)
1243 dev_err(&gpdev->dev, "Failed to init context: %d\n", ret);
1244 else
1245 ret = 0;
931 1246
932 return 0; 1247 return 0;
933} 1248}
1249EXPORT_SYMBOL_GPL(pnv_npu2_map_lpar_dev);
1250
1251void pnv_npu2_map_lpar(struct pnv_ioda_pe *gpe, unsigned long msr)
1252{
1253 struct pci_dev *gpdev;
1254
1255 list_for_each_entry(gpdev, &gpe->pbus->devices, bus_list)
1256 pnv_npu2_map_lpar_dev(gpdev, 0, msr);
1257}
1258
1259int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev)
1260{
1261 int ret;
1262 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
1263 struct pci_controller *hose;
1264 struct pnv_phb *nphb;
1265
1266 if (!npdev)
1267 return -ENODEV;
1268
1269 hose = pci_bus_to_host(npdev->bus);
1270 nphb = hose->private_data;
1271
1272 dev_dbg(&gpdev->dev, "destroy context opalid=%llu\n",
1273 nphb->opal_id);
1274 ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/,
1275 PCI_DEVID(gpdev->bus->number, gpdev->devfn));
1276 if (ret < 0) {
1277 dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret);
1278 return ret;
1279 }
1280
1281 /* Set LPID to 0 anyway, just to be safe */
1282 dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=0\n", nphb->opal_id);
1283 ret = opal_npu_map_lpar(nphb->opal_id,
1284 PCI_DEVID(gpdev->bus->number, gpdev->devfn), 0 /*LPID*/,
1285 0 /* LPCR bits */);
1286 if (ret)
1287 dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret);
1288
1289 return ret;
1290}
1291EXPORT_SYMBOL_GPL(pnv_npu2_unmap_lpar_dev);
diff --git a/arch/powerpc/platforms/powernv/opal-power.c b/arch/powerpc/platforms/powernv/opal-power.c
index 58dc3308237f..89ab1da57657 100644
--- a/arch/powerpc/platforms/powernv/opal-power.c
+++ b/arch/powerpc/platforms/powernv/opal-power.c
@@ -138,7 +138,7 @@ static struct notifier_block opal_power_control_nb = {
138 .priority = 0, 138 .priority = 0,
139}; 139};
140 140
141static int __init opal_power_control_init(void) 141int __init opal_power_control_init(void)
142{ 142{
143 int ret, supported = 0; 143 int ret, supported = 0;
144 struct device_node *np; 144 struct device_node *np;
@@ -176,4 +176,3 @@ static int __init opal_power_control_init(void)
176 176
177 return 0; 177 return 0;
178} 178}
179machine_subsys_initcall(powernv, opal_power_control_init);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index beed86f4224b..79586f127521 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -877,7 +877,7 @@ static int __init opal_init(void)
877 consoles = of_find_node_by_path("/ibm,opal/consoles"); 877 consoles = of_find_node_by_path("/ibm,opal/consoles");
878 if (consoles) { 878 if (consoles) {
879 for_each_child_of_node(consoles, np) { 879 for_each_child_of_node(consoles, np) {
880 if (strcmp(np->name, "serial")) 880 if (!of_node_name_eq(np, "serial"))
881 continue; 881 continue;
882 of_platform_device_create(np, NULL, NULL); 882 of_platform_device_create(np, NULL, NULL);
883 } 883 }
@@ -960,6 +960,9 @@ static int __init opal_init(void)
960 /* Initialise OPAL sensor groups */ 960 /* Initialise OPAL sensor groups */
961 opal_sensor_groups_init(); 961 opal_sensor_groups_init();
962 962
963 /* Initialise OPAL Power control interface */
964 opal_power_control_init();
965
963 return 0; 966 return 0;
964} 967}
965machine_subsys_initcall(powernv, opal_init); 968machine_subsys_initcall(powernv, opal_init);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda-tce.c b/arch/powerpc/platforms/powernv/pci-ioda-tce.c
index fe9691040f54..697449afb3f7 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda-tce.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda-tce.c
@@ -299,7 +299,7 @@ long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
299 if (alloc_userspace_copy) { 299 if (alloc_userspace_copy) {
300 offset = 0; 300 offset = 0;
301 uas = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift, 301 uas = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
302 levels, tce_table_size, &offset, 302 tmplevels, tce_table_size, &offset,
303 &total_allocated_uas); 303 &total_allocated_uas);
304 if (!uas) 304 if (!uas)
305 goto free_tces_exit; 305 goto free_tces_exit;
@@ -368,6 +368,7 @@ void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,
368 found = false; 368 found = false;
369 for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) { 369 for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {
370 if (table_group->tables[i] == tbl) { 370 if (table_group->tables[i] == tbl) {
371 iommu_tce_table_put(tbl);
371 table_group->tables[i] = NULL; 372 table_group->tables[i] = NULL;
372 found = true; 373 found = true;
373 break; 374 break;
@@ -393,7 +394,7 @@ long pnv_pci_link_table_and_group(int node, int num,
393 tgl->table_group = table_group; 394 tgl->table_group = table_group;
394 list_add_rcu(&tgl->next, &tbl->it_group_list); 395 list_add_rcu(&tgl->next, &tbl->it_group_list);
395 396
396 table_group->tables[num] = tbl; 397 table_group->tables[num] = iommu_tce_table_get(tbl);
397 398
398 return 0; 399 return 0;
399} 400}
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index dd807446801e..1d6406a051f1 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -190,7 +190,8 @@ static void pnv_ioda_free_pe(struct pnv_ioda_pe *pe)
190 unsigned int pe_num = pe->pe_number; 190 unsigned int pe_num = pe->pe_number;
191 191
192 WARN_ON(pe->pdev); 192 WARN_ON(pe->pdev);
193 193 WARN_ON(pe->npucomp); /* NPUs are not supposed to be freed */
194 kfree(pe->npucomp);
194 memset(pe, 0, sizeof(struct pnv_ioda_pe)); 195 memset(pe, 0, sizeof(struct pnv_ioda_pe));
195 clear_bit(pe_num, phb->ioda.pe_alloc); 196 clear_bit(pe_num, phb->ioda.pe_alloc);
196} 197}
@@ -517,8 +518,6 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb)
517 phb->init_m64 = pnv_ioda1_init_m64; 518 phb->init_m64 = pnv_ioda1_init_m64;
518 else 519 else
519 phb->init_m64 = pnv_ioda2_init_m64; 520 phb->init_m64 = pnv_ioda2_init_m64;
520 phb->reserve_m64_pe = pnv_ioda_reserve_m64_pe;
521 phb->pick_m64_pe = pnv_ioda_pick_m64_pe;
522} 521}
523 522
524static void pnv_ioda_freeze_pe(struct pnv_phb *phb, int pe_no) 523static void pnv_ioda_freeze_pe(struct pnv_phb *phb, int pe_no)
@@ -604,8 +603,8 @@ static int pnv_ioda_unfreeze_pe(struct pnv_phb *phb, int pe_no, int opt)
604static int pnv_ioda_get_pe_state(struct pnv_phb *phb, int pe_no) 603static int pnv_ioda_get_pe_state(struct pnv_phb *phb, int pe_no)
605{ 604{
606 struct pnv_ioda_pe *slave, *pe; 605 struct pnv_ioda_pe *slave, *pe;
607 u8 fstate, state; 606 u8 fstate = 0, state;
608 __be16 pcierr; 607 __be16 pcierr = 0;
609 s64 rc; 608 s64 rc;
610 609
611 /* Sanity check on PE number */ 610 /* Sanity check on PE number */
@@ -663,10 +662,6 @@ static int pnv_ioda_get_pe_state(struct pnv_phb *phb, int pe_no)
663 return state; 662 return state;
664} 663}
665 664
666/* Currently those 2 are only used when MSIs are enabled, this will change
667 * but in the meantime, we need to protect them to avoid warnings
668 */
669#ifdef CONFIG_PCI_MSI
670struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev) 665struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
671{ 666{
672 struct pci_controller *hose = pci_bus_to_host(dev->bus); 667 struct pci_controller *hose = pci_bus_to_host(dev->bus);
@@ -679,7 +674,6 @@ struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
679 return NULL; 674 return NULL;
680 return &phb->ioda.pe_array[pdn->pe_number]; 675 return &phb->ioda.pe_array[pdn->pe_number];
681} 676}
682#endif /* CONFIG_PCI_MSI */
683 677
684static int pnv_ioda_set_one_peltv(struct pnv_phb *phb, 678static int pnv_ioda_set_one_peltv(struct pnv_phb *phb,
685 struct pnv_ioda_pe *parent, 679 struct pnv_ioda_pe *parent,
@@ -1160,8 +1154,8 @@ static struct pnv_ioda_pe *pnv_ioda_setup_bus_PE(struct pci_bus *bus, bool all)
1160 pe = &phb->ioda.pe_array[phb->ioda.root_pe_idx]; 1154 pe = &phb->ioda.pe_array[phb->ioda.root_pe_idx];
1161 1155
1162 /* Check if PE is determined by M64 */ 1156 /* Check if PE is determined by M64 */
1163 if (!pe && phb->pick_m64_pe) 1157 if (!pe)
1164 pe = phb->pick_m64_pe(bus, all); 1158 pe = pnv_ioda_pick_m64_pe(bus, all);
1165 1159
1166 /* The PE number isn't pinned by M64 */ 1160 /* The PE number isn't pinned by M64 */
1167 if (!pe) 1161 if (!pe)
@@ -1273,19 +1267,20 @@ static void pnv_ioda_setup_npu_PEs(struct pci_bus *bus)
1273 1267
1274static void pnv_pci_ioda_setup_PEs(void) 1268static void pnv_pci_ioda_setup_PEs(void)
1275{ 1269{
1276 struct pci_controller *hose, *tmp; 1270 struct pci_controller *hose;
1277 struct pnv_phb *phb; 1271 struct pnv_phb *phb;
1278 struct pci_bus *bus; 1272 struct pci_bus *bus;
1279 struct pci_dev *pdev; 1273 struct pci_dev *pdev;
1274 struct pnv_ioda_pe *pe;
1280 1275
1281 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 1276 list_for_each_entry(hose, &hose_list, list_node) {
1282 phb = hose->private_data; 1277 phb = hose->private_data;
1283 if (phb->type == PNV_PHB_NPU_NVLINK) { 1278 if (phb->type == PNV_PHB_NPU_NVLINK) {
1284 /* PE#0 is needed for error reporting */ 1279 /* PE#0 is needed for error reporting */
1285 pnv_ioda_reserve_pe(phb, 0); 1280 pnv_ioda_reserve_pe(phb, 0);
1286 pnv_ioda_setup_npu_PEs(hose->bus); 1281 pnv_ioda_setup_npu_PEs(hose->bus);
1287 if (phb->model == PNV_PHB_MODEL_NPU2) 1282 if (phb->model == PNV_PHB_MODEL_NPU2)
1288 pnv_npu2_init(phb); 1283 WARN_ON_ONCE(pnv_npu2_init(hose));
1289 } 1284 }
1290 if (phb->type == PNV_PHB_NPU_OCAPI) { 1285 if (phb->type == PNV_PHB_NPU_OCAPI) {
1291 bus = hose->bus; 1286 bus = hose->bus;
@@ -1293,6 +1288,14 @@ static void pnv_pci_ioda_setup_PEs(void)
1293 pnv_ioda_setup_dev_PE(pdev); 1288 pnv_ioda_setup_dev_PE(pdev);
1294 } 1289 }
1295 } 1290 }
1291 list_for_each_entry(hose, &hose_list, list_node) {
1292 phb = hose->private_data;
1293 if (phb->type != PNV_PHB_IODA2)
1294 continue;
1295
1296 list_for_each_entry(pe, &phb->ioda.pe_list, list)
1297 pnv_npu2_map_lpar(pe, MSR_DR | MSR_PR | MSR_HV);
1298 }
1296} 1299}
1297 1300
1298#ifdef CONFIG_PCI_IOV 1301#ifdef CONFIG_PCI_IOV
@@ -1531,6 +1534,11 @@ void pnv_pci_sriov_disable(struct pci_dev *pdev)
1531 1534
1532static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, 1535static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
1533 struct pnv_ioda_pe *pe); 1536 struct pnv_ioda_pe *pe);
1537#ifdef CONFIG_IOMMU_API
1538static void pnv_ioda_setup_bus_iommu_group(struct pnv_ioda_pe *pe,
1539 struct iommu_table_group *table_group, struct pci_bus *bus);
1540
1541#endif
1534static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs) 1542static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)
1535{ 1543{
1536 struct pci_bus *bus; 1544 struct pci_bus *bus;
@@ -1584,6 +1592,9 @@ static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)
1584 mutex_unlock(&phb->ioda.pe_list_mutex); 1592 mutex_unlock(&phb->ioda.pe_list_mutex);
1585 1593
1586 pnv_pci_ioda2_setup_dma_pe(phb, pe); 1594 pnv_pci_ioda2_setup_dma_pe(phb, pe);
1595#ifdef CONFIG_IOMMU_API
1596 pnv_ioda_setup_bus_iommu_group(pe, &pe->table_group, NULL);
1597#endif
1587 } 1598 }
1588} 1599}
1589 1600
@@ -1923,21 +1934,16 @@ static u64 pnv_pci_ioda_dma_get_required_mask(struct pci_dev *pdev)
1923 return mask; 1934 return mask;
1924} 1935}
1925 1936
1926static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, 1937static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus)
1927 struct pci_bus *bus,
1928 bool add_to_group)
1929{ 1938{
1930 struct pci_dev *dev; 1939 struct pci_dev *dev;
1931 1940
1932 list_for_each_entry(dev, &bus->devices, bus_list) { 1941 list_for_each_entry(dev, &bus->devices, bus_list) {
1933 set_iommu_table_base(&dev->dev, pe->table_group.tables[0]); 1942 set_iommu_table_base(&dev->dev, pe->table_group.tables[0]);
1934 set_dma_offset(&dev->dev, pe->tce_bypass_base); 1943 set_dma_offset(&dev->dev, pe->tce_bypass_base);
1935 if (add_to_group)
1936 iommu_add_device(&dev->dev);
1937 1944
1938 if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate) 1945 if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate)
1939 pnv_ioda_setup_bus_dma(pe, dev->subordinate, 1946 pnv_ioda_setup_bus_dma(pe, dev->subordinate);
1940 add_to_group);
1941 } 1947 }
1942} 1948}
1943 1949
@@ -2366,16 +2372,8 @@ found:
2366 pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift; 2372 pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift;
2367 iommu_init_table(tbl, phb->hose->node); 2373 iommu_init_table(tbl, phb->hose->node);
2368 2374
2369 if (pe->flags & PNV_IODA_PE_DEV) { 2375 if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
2370 /* 2376 pnv_ioda_setup_bus_dma(pe, pe->pbus);
2371 * Setting table base here only for carrying iommu_group
2372 * further down to let iommu_add_device() do the job.
2373 * pnv_pci_ioda_dma_dev_setup will override it later anyway.
2374 */
2375 set_iommu_table_base(&pe->pdev->dev, tbl);
2376 iommu_add_device(&pe->pdev->dev);
2377 } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
2378 pnv_ioda_setup_bus_dma(pe, pe->pbus, true);
2379 2377
2380 return; 2378 return;
2381 fail: 2379 fail:
@@ -2527,14 +2525,6 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe)
2527 if (!pnv_iommu_bypass_disabled) 2525 if (!pnv_iommu_bypass_disabled)
2528 pnv_pci_ioda2_set_bypass(pe, true); 2526 pnv_pci_ioda2_set_bypass(pe, true);
2529 2527
2530 /*
2531 * Setting table base here only for carrying iommu_group
2532 * further down to let iommu_add_device() do the job.
2533 * pnv_pci_ioda_dma_dev_setup will override it later anyway.
2534 */
2535 if (pe->flags & PNV_IODA_PE_DEV)
2536 set_iommu_table_base(&pe->pdev->dev, tbl);
2537
2538 return 0; 2528 return 0;
2539} 2529}
2540 2530
@@ -2565,7 +2555,7 @@ static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,
2565#endif 2555#endif
2566 2556
2567#ifdef CONFIG_IOMMU_API 2557#ifdef CONFIG_IOMMU_API
2568static unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift, 2558unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,
2569 __u64 window_size, __u32 levels) 2559 __u64 window_size, __u32 levels)
2570{ 2560{
2571 unsigned long bytes = 0; 2561 unsigned long bytes = 0;
@@ -2616,7 +2606,7 @@ static void pnv_ioda2_take_ownership(struct iommu_table_group *table_group)
2616 pnv_pci_ioda2_set_bypass(pe, false); 2606 pnv_pci_ioda2_set_bypass(pe, false);
2617 pnv_pci_ioda2_unset_window(&pe->table_group, 0); 2607 pnv_pci_ioda2_unset_window(&pe->table_group, 0);
2618 if (pe->pbus) 2608 if (pe->pbus)
2619 pnv_ioda_setup_bus_dma(pe, pe->pbus, false); 2609 pnv_ioda_setup_bus_dma(pe, pe->pbus);
2620 iommu_tce_table_put(tbl); 2610 iommu_tce_table_put(tbl);
2621} 2611}
2622 2612
@@ -2627,7 +2617,7 @@ static void pnv_ioda2_release_ownership(struct iommu_table_group *table_group)
2627 2617
2628 pnv_pci_ioda2_setup_default_config(pe); 2618 pnv_pci_ioda2_setup_default_config(pe);
2629 if (pe->pbus) 2619 if (pe->pbus)
2630 pnv_ioda_setup_bus_dma(pe, pe->pbus, false); 2620 pnv_ioda_setup_bus_dma(pe, pe->pbus);
2631} 2621}
2632 2622
2633static struct iommu_table_group_ops pnv_pci_ioda2_ops = { 2623static struct iommu_table_group_ops pnv_pci_ioda2_ops = {
@@ -2639,131 +2629,100 @@ static struct iommu_table_group_ops pnv_pci_ioda2_ops = {
2639 .release_ownership = pnv_ioda2_release_ownership, 2629 .release_ownership = pnv_ioda2_release_ownership,
2640}; 2630};
2641 2631
2642static int gpe_table_group_to_npe_cb(struct device *dev, void *opaque) 2632static void pnv_ioda_setup_bus_iommu_group_add_devices(struct pnv_ioda_pe *pe,
2633 struct iommu_table_group *table_group,
2634 struct pci_bus *bus)
2643{ 2635{
2644 struct pci_controller *hose; 2636 struct pci_dev *dev;
2645 struct pnv_phb *phb;
2646 struct pnv_ioda_pe **ptmppe = opaque;
2647 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
2648 struct pci_dn *pdn = pci_get_pdn(pdev);
2649
2650 if (!pdn || pdn->pe_number == IODA_INVALID_PE)
2651 return 0;
2652
2653 hose = pci_bus_to_host(pdev->bus);
2654 phb = hose->private_data;
2655 if (phb->type != PNV_PHB_NPU_NVLINK)
2656 return 0;
2657 2637
2658 *ptmppe = &phb->ioda.pe_array[pdn->pe_number]; 2638 list_for_each_entry(dev, &bus->devices, bus_list) {
2639 iommu_add_device(table_group, &dev->dev);
2659 2640
2660 return 1; 2641 if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate)
2642 pnv_ioda_setup_bus_iommu_group_add_devices(pe,
2643 table_group, dev->subordinate);
2644 }
2661} 2645}
2662 2646
2663/* 2647static void pnv_ioda_setup_bus_iommu_group(struct pnv_ioda_pe *pe,
2664 * This returns PE of associated NPU. 2648 struct iommu_table_group *table_group, struct pci_bus *bus)
2665 * This assumes that NPU is in the same IOMMU group with GPU and there is
2666 * no other PEs.
2667 */
2668static struct pnv_ioda_pe *gpe_table_group_to_npe(
2669 struct iommu_table_group *table_group)
2670{ 2649{
2671 struct pnv_ioda_pe *npe = NULL;
2672 int ret = iommu_group_for_each_dev(table_group->group, &npe,
2673 gpe_table_group_to_npe_cb);
2674 2650
2675 BUG_ON(!ret || !npe); 2651 if (pe->flags & PNV_IODA_PE_DEV)
2652 iommu_add_device(table_group, &pe->pdev->dev);
2676 2653
2677 return npe; 2654 if ((pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) || bus)
2655 pnv_ioda_setup_bus_iommu_group_add_devices(pe, table_group,
2656 bus);
2678} 2657}
2679 2658
2680static long pnv_pci_ioda2_npu_set_window(struct iommu_table_group *table_group, 2659static unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb);
2681 int num, struct iommu_table *tbl)
2682{
2683 struct pnv_ioda_pe *npe = gpe_table_group_to_npe(table_group);
2684 int num2 = (num == 0) ? 1 : 0;
2685 long ret = pnv_pci_ioda2_set_window(table_group, num, tbl);
2686
2687 if (ret)
2688 return ret;
2689
2690 if (table_group->tables[num2])
2691 pnv_npu_unset_window(npe, num2);
2692
2693 ret = pnv_npu_set_window(npe, num, tbl);
2694 if (ret) {
2695 pnv_pci_ioda2_unset_window(table_group, num);
2696 if (table_group->tables[num2])
2697 pnv_npu_set_window(npe, num2,
2698 table_group->tables[num2]);
2699 }
2700
2701 return ret;
2702}
2703 2660
2704static long pnv_pci_ioda2_npu_unset_window( 2661static void pnv_pci_ioda_setup_iommu_api(void)
2705 struct iommu_table_group *table_group,
2706 int num)
2707{ 2662{
2708 struct pnv_ioda_pe *npe = gpe_table_group_to_npe(table_group); 2663 struct pci_controller *hose;
2709 int num2 = (num == 0) ? 1 : 0; 2664 struct pnv_phb *phb;
2710 long ret = pnv_pci_ioda2_unset_window(table_group, num); 2665 struct pnv_ioda_pe *pe;
2711
2712 if (ret)
2713 return ret;
2714
2715 if (!npe->table_group.tables[num])
2716 return 0;
2717
2718 ret = pnv_npu_unset_window(npe, num);
2719 if (ret)
2720 return ret;
2721
2722 if (table_group->tables[num2])
2723 ret = pnv_npu_set_window(npe, num2, table_group->tables[num2]);
2724
2725 return ret;
2726}
2727 2666
2728static void pnv_ioda2_npu_take_ownership(struct iommu_table_group *table_group)
2729{
2730 /* 2667 /*
2731 * Detach NPU first as pnv_ioda2_take_ownership() will destroy 2668 * There are 4 types of PEs:
2732 * the iommu_table if 32bit DMA is enabled. 2669 * - PNV_IODA_PE_BUS: a downstream port with an adapter,
2670 * created from pnv_pci_setup_bridge();
2671 * - PNV_IODA_PE_BUS_ALL: a PCI-PCIX bridge with devices behind it,
2672 * created from pnv_pci_setup_bridge();
2673 * - PNV_IODA_PE_VF: a SRIOV virtual function,
2674 * created from pnv_pcibios_sriov_enable();
2675 * - PNV_IODA_PE_DEV: an NPU or OCAPI device,
2676 * created from pnv_pci_ioda_fixup().
2677 *
2678 * Normally a PE is represented by an IOMMU group, however for
2679 * devices with side channels the groups need to be more strict.
2733 */ 2680 */
2734 pnv_npu_take_ownership(gpe_table_group_to_npe(table_group)); 2681 list_for_each_entry(hose, &hose_list, list_node) {
2735 pnv_ioda2_take_ownership(table_group); 2682 phb = hose->private_data;
2736}
2737 2683
2738static struct iommu_table_group_ops pnv_pci_ioda2_npu_ops = { 2684 if (phb->type == PNV_PHB_NPU_NVLINK)
2739 .get_table_size = pnv_pci_ioda2_get_table_size, 2685 continue;
2740 .create_table = pnv_pci_ioda2_create_table_userspace,
2741 .set_window = pnv_pci_ioda2_npu_set_window,
2742 .unset_window = pnv_pci_ioda2_npu_unset_window,
2743 .take_ownership = pnv_ioda2_npu_take_ownership,
2744 .release_ownership = pnv_ioda2_release_ownership,
2745};
2746 2686
2747static void pnv_pci_ioda_setup_iommu_api(void) 2687 list_for_each_entry(pe, &phb->ioda.pe_list, list) {
2748{ 2688 struct iommu_table_group *table_group;
2749 struct pci_controller *hose, *tmp; 2689
2750 struct pnv_phb *phb; 2690 table_group = pnv_try_setup_npu_table_group(pe);
2751 struct pnv_ioda_pe *pe, *gpe; 2691 if (!table_group) {
2692 if (!pnv_pci_ioda_pe_dma_weight(pe))
2693 continue;
2694
2695 table_group = &pe->table_group;
2696 iommu_register_group(&pe->table_group,
2697 pe->phb->hose->global_number,
2698 pe->pe_number);
2699 }
2700 pnv_ioda_setup_bus_iommu_group(pe, table_group,
2701 pe->pbus);
2702 }
2703 }
2752 2704
2753 /* 2705 /*
2754 * Now we have all PHBs discovered, time to add NPU devices to 2706 * Now we have all PHBs discovered, time to add NPU devices to
2755 * the corresponding IOMMU groups. 2707 * the corresponding IOMMU groups.
2756 */ 2708 */
2757 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 2709 list_for_each_entry(hose, &hose_list, list_node) {
2710 unsigned long pgsizes;
2711
2758 phb = hose->private_data; 2712 phb = hose->private_data;
2759 2713
2760 if (phb->type != PNV_PHB_NPU_NVLINK) 2714 if (phb->type != PNV_PHB_NPU_NVLINK)
2761 continue; 2715 continue;
2762 2716
2717 pgsizes = pnv_ioda_parse_tce_sizes(phb);
2763 list_for_each_entry(pe, &phb->ioda.pe_list, list) { 2718 list_for_each_entry(pe, &phb->ioda.pe_list, list) {
2764 gpe = pnv_pci_npu_setup_iommu(pe); 2719 /*
2765 if (gpe) 2720 * IODA2 bridges get this set up from
2766 gpe->table_group.ops = &pnv_pci_ioda2_npu_ops; 2721 * pci_controller_ops::setup_bridge but NPU bridges
2722 * do not have this hook defined so we do it here.
2723 */
2724 pe->table_group.pgsizes = pgsizes;
2725 pnv_npu_compound_attach(pe);
2767 } 2726 }
2768 } 2727 }
2769} 2728}
@@ -2810,9 +2769,6 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
2810 /* TVE #1 is selected by PCI address bit 59 */ 2769 /* TVE #1 is selected by PCI address bit 59 */
2811 pe->tce_bypass_base = 1ull << 59; 2770 pe->tce_bypass_base = 1ull << 59;
2812 2771
2813 iommu_register_group(&pe->table_group, phb->hose->global_number,
2814 pe->pe_number);
2815
2816 /* The PE will reserve all possible 32-bits space */ 2772 /* The PE will reserve all possible 32-bits space */
2817 pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n", 2773 pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n",
2818 phb->ioda.m32_pci_base); 2774 phb->ioda.m32_pci_base);
@@ -2833,10 +2789,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
2833 return; 2789 return;
2834 2790
2835 if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) 2791 if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
2836 pnv_ioda_setup_bus_dma(pe, pe->pbus, true); 2792 pnv_ioda_setup_bus_dma(pe, pe->pbus);
2837} 2793}
2838 2794
2839#ifdef CONFIG_PCI_MSI
2840int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq) 2795int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq)
2841{ 2796{
2842 struct pnv_phb *phb = container_of(chip, struct pnv_phb, 2797 struct pnv_phb *phb = container_of(chip, struct pnv_phb,
@@ -2982,9 +2937,6 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
2982 pr_info(" Allocated bitmap for %d MSIs (base IRQ 0x%x)\n", 2937 pr_info(" Allocated bitmap for %d MSIs (base IRQ 0x%x)\n",
2983 count, phb->msi_base); 2938 count, phb->msi_base);
2984} 2939}
2985#else
2986static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) { }
2987#endif /* CONFIG_PCI_MSI */
2988 2940
2989#ifdef CONFIG_PCI_IOV 2941#ifdef CONFIG_PCI_IOV
2990static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev) 2942static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
@@ -3402,8 +3354,7 @@ static void pnv_pci_setup_bridge(struct pci_bus *bus, unsigned long type)
3402 return; 3354 return;
3403 3355
3404 /* Reserve PEs according to used M64 resources */ 3356 /* Reserve PEs according to used M64 resources */
3405 if (phb->reserve_m64_pe) 3357 pnv_ioda_reserve_m64_pe(bus, NULL, all);
3406 phb->reserve_m64_pe(bus, NULL, all);
3407 3358
3408 /* 3359 /*
3409 * Assign PE. We might run here because of partial hotplug. 3360 * Assign PE. We might run here because of partial hotplug.
@@ -3687,6 +3638,15 @@ static void pnv_pci_release_device(struct pci_dev *pdev)
3687 pnv_ioda_release_pe(pe); 3638 pnv_ioda_release_pe(pe);
3688} 3639}
3689 3640
3641static void pnv_npu_disable_device(struct pci_dev *pdev)
3642{
3643 struct eeh_dev *edev = pci_dev_to_eeh_dev(pdev);
3644 struct eeh_pe *eehpe = edev ? edev->pe : NULL;
3645
3646 if (eehpe && eeh_ops && eeh_ops->reset)
3647 eeh_ops->reset(eehpe, EEH_RESET_HOT);
3648}
3649
3690static void pnv_pci_ioda_shutdown(struct pci_controller *hose) 3650static void pnv_pci_ioda_shutdown(struct pci_controller *hose)
3691{ 3651{
3692 struct pnv_phb *phb = hose->private_data; 3652 struct pnv_phb *phb = hose->private_data;
@@ -3698,10 +3658,8 @@ static void pnv_pci_ioda_shutdown(struct pci_controller *hose)
3698static const struct pci_controller_ops pnv_pci_ioda_controller_ops = { 3658static const struct pci_controller_ops pnv_pci_ioda_controller_ops = {
3699 .dma_dev_setup = pnv_pci_dma_dev_setup, 3659 .dma_dev_setup = pnv_pci_dma_dev_setup,
3700 .dma_bus_setup = pnv_pci_dma_bus_setup, 3660 .dma_bus_setup = pnv_pci_dma_bus_setup,
3701#ifdef CONFIG_PCI_MSI
3702 .setup_msi_irqs = pnv_setup_msi_irqs, 3661 .setup_msi_irqs = pnv_setup_msi_irqs,
3703 .teardown_msi_irqs = pnv_teardown_msi_irqs, 3662 .teardown_msi_irqs = pnv_teardown_msi_irqs,
3704#endif
3705 .enable_device_hook = pnv_pci_enable_device_hook, 3663 .enable_device_hook = pnv_pci_enable_device_hook,
3706 .release_device = pnv_pci_release_device, 3664 .release_device = pnv_pci_release_device,
3707 .window_alignment = pnv_pci_window_alignment, 3665 .window_alignment = pnv_pci_window_alignment,
@@ -3722,15 +3680,14 @@ static int pnv_npu_dma_set_mask(struct pci_dev *npdev, u64 dma_mask)
3722 3680
3723static const struct pci_controller_ops pnv_npu_ioda_controller_ops = { 3681static const struct pci_controller_ops pnv_npu_ioda_controller_ops = {
3724 .dma_dev_setup = pnv_pci_dma_dev_setup, 3682 .dma_dev_setup = pnv_pci_dma_dev_setup,
3725#ifdef CONFIG_PCI_MSI
3726 .setup_msi_irqs = pnv_setup_msi_irqs, 3683 .setup_msi_irqs = pnv_setup_msi_irqs,
3727 .teardown_msi_irqs = pnv_teardown_msi_irqs, 3684 .teardown_msi_irqs = pnv_teardown_msi_irqs,
3728#endif
3729 .enable_device_hook = pnv_pci_enable_device_hook, 3685 .enable_device_hook = pnv_pci_enable_device_hook,
3730 .window_alignment = pnv_pci_window_alignment, 3686 .window_alignment = pnv_pci_window_alignment,
3731 .reset_secondary_bus = pnv_pci_reset_secondary_bus, 3687 .reset_secondary_bus = pnv_pci_reset_secondary_bus,
3732 .dma_set_mask = pnv_npu_dma_set_mask, 3688 .dma_set_mask = pnv_npu_dma_set_mask,
3733 .shutdown = pnv_pci_ioda_shutdown, 3689 .shutdown = pnv_pci_ioda_shutdown,
3690 .disable_device = pnv_npu_disable_device,
3734}; 3691};
3735 3692
3736static const struct pci_controller_ops pnv_npu_ocapi_ioda_controller_ops = { 3693static const struct pci_controller_ops pnv_npu_ocapi_ioda_controller_ops = {
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 13aef2323bbc..45fb70b4bfa7 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -160,7 +160,6 @@ exit:
160} 160}
161EXPORT_SYMBOL_GPL(pnv_pci_set_power_state); 161EXPORT_SYMBOL_GPL(pnv_pci_set_power_state);
162 162
163#ifdef CONFIG_PCI_MSI
164int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 163int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
165{ 164{
166 struct pci_controller *hose = pci_bus_to_host(pdev->bus); 165 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
@@ -229,7 +228,6 @@ void pnv_teardown_msi_irqs(struct pci_dev *pdev)
229 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, 1); 228 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, 1);
230 } 229 }
231} 230}
232#endif /* CONFIG_PCI_MSI */
233 231
234/* Nicely print the contents of the PE State Tables (PEST). */ 232/* Nicely print the contents of the PE State Tables (PEST). */
235static void pnv_pci_dump_pest(__be64 pestA[], __be64 pestB[], int pest_size) 233static void pnv_pci_dump_pest(__be64 pestA[], __be64 pestB[], int pest_size)
@@ -602,8 +600,8 @@ static void pnv_pci_handle_eeh_config(struct pnv_phb *phb, u32 pe_no)
602static void pnv_pci_config_check_eeh(struct pci_dn *pdn) 600static void pnv_pci_config_check_eeh(struct pci_dn *pdn)
603{ 601{
604 struct pnv_phb *phb = pdn->phb->private_data; 602 struct pnv_phb *phb = pdn->phb->private_data;
605 u8 fstate; 603 u8 fstate = 0;
606 __be16 pcierr; 604 __be16 pcierr = 0;
607 unsigned int pe_no; 605 unsigned int pe_no;
608 s64 rc; 606 s64 rc;
609 607
@@ -1127,4 +1125,45 @@ void __init pnv_pci_init(void)
1127 set_pci_dma_ops(&dma_iommu_ops); 1125 set_pci_dma_ops(&dma_iommu_ops);
1128} 1126}
1129 1127
1130machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init); 1128static int pnv_tce_iommu_bus_notifier(struct notifier_block *nb,
1129 unsigned long action, void *data)
1130{
1131 struct device *dev = data;
1132 struct pci_dev *pdev;
1133 struct pci_dn *pdn;
1134 struct pnv_ioda_pe *pe;
1135 struct pci_controller *hose;
1136 struct pnv_phb *phb;
1137
1138 switch (action) {
1139 case BUS_NOTIFY_ADD_DEVICE:
1140 pdev = to_pci_dev(dev);
1141 pdn = pci_get_pdn(pdev);
1142 hose = pci_bus_to_host(pdev->bus);
1143 phb = hose->private_data;
1144
1145 WARN_ON_ONCE(!phb);
1146 if (!pdn || pdn->pe_number == IODA_INVALID_PE || !phb)
1147 return 0;
1148
1149 pe = &phb->ioda.pe_array[pdn->pe_number];
1150 iommu_add_device(&pe->table_group, dev);
1151 return 0;
1152 case BUS_NOTIFY_DEL_DEVICE:
1153 iommu_del_device(dev);
1154 return 0;
1155 default:
1156 return 0;
1157 }
1158}
1159
1160static struct notifier_block pnv_tce_iommu_bus_nb = {
1161 .notifier_call = pnv_tce_iommu_bus_notifier,
1162};
1163
1164static int __init pnv_tce_iommu_bus_notifier_init(void)
1165{
1166 bus_register_notifier(&pci_bus_type, &pnv_tce_iommu_bus_nb);
1167 return 0;
1168}
1169machine_subsys_initcall_sync(powernv, pnv_tce_iommu_bus_notifier_init);
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 8b37b28e3831..8e36da379252 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -8,9 +8,6 @@
8 8
9struct pci_dn; 9struct pci_dn;
10 10
11/* Maximum possible number of ATSD MMIO registers per NPU */
12#define NV_NMMU_ATSD_REGS 8
13
14enum pnv_phb_type { 11enum pnv_phb_type {
15 PNV_PHB_IODA1 = 0, 12 PNV_PHB_IODA1 = 0,
16 PNV_PHB_IODA2 = 1, 13 PNV_PHB_IODA2 = 1,
@@ -65,6 +62,7 @@ struct pnv_ioda_pe {
65 62
66 /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */ 63 /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */
67 struct iommu_table_group table_group; 64 struct iommu_table_group table_group;
65 struct npu_comp *npucomp;
68 66
69 /* 64-bit TCE bypass region */ 67 /* 64-bit TCE bypass region */
70 bool tce_bypass_enabled; 68 bool tce_bypass_enabled;
@@ -106,20 +104,14 @@ struct pnv_phb {
106 struct dentry *dbgfs; 104 struct dentry *dbgfs;
107#endif 105#endif
108 106
109#ifdef CONFIG_PCI_MSI
110 unsigned int msi_base; 107 unsigned int msi_base;
111 unsigned int msi32_support; 108 unsigned int msi32_support;
112 struct msi_bitmap msi_bmp; 109 struct msi_bitmap msi_bmp;
113#endif
114 int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev, 110 int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev,
115 unsigned int hwirq, unsigned int virq, 111 unsigned int hwirq, unsigned int virq,
116 unsigned int is_64, struct msi_msg *msg); 112 unsigned int is_64, struct msi_msg *msg);
117 void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev); 113 void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev);
118 void (*fixup_phb)(struct pci_controller *hose);
119 int (*init_m64)(struct pnv_phb *phb); 114 int (*init_m64)(struct pnv_phb *phb);
120 void (*reserve_m64_pe)(struct pci_bus *bus,
121 unsigned long *pe_bitmap, bool all);
122 struct pnv_ioda_pe *(*pick_m64_pe)(struct pci_bus *bus, bool all);
123 int (*get_pe_state)(struct pnv_phb *phb, int pe_no); 115 int (*get_pe_state)(struct pnv_phb *phb, int pe_no);
124 void (*freeze_pe)(struct pnv_phb *phb, int pe_no); 116 void (*freeze_pe)(struct pnv_phb *phb, int pe_no);
125 int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt); 117 int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt);
@@ -180,19 +172,6 @@ struct pnv_phb {
180 unsigned int diag_data_size; 172 unsigned int diag_data_size;
181 u8 *diag_data; 173 u8 *diag_data;
182 174
183 /* Nvlink2 data */
184 struct npu {
185 int index;
186 __be64 *mmio_atsd_regs[NV_NMMU_ATSD_REGS];
187 unsigned int mmio_atsd_count;
188
189 /* Bitmask for MMIO register usage */
190 unsigned long mmio_atsd_usage;
191
192 /* Do we need to explicitly flush the nest mmu? */
193 bool nmmu_flush;
194 } npu;
195
196 int p2p_target_count; 175 int p2p_target_count;
197}; 176};
198 177
@@ -210,6 +189,7 @@ extern void pnv_pci_init_ioda_hub(struct device_node *np);
210extern void pnv_pci_init_ioda2_phb(struct device_node *np); 189extern void pnv_pci_init_ioda2_phb(struct device_node *np);
211extern void pnv_pci_init_npu_phb(struct device_node *np); 190extern void pnv_pci_init_npu_phb(struct device_node *np);
212extern void pnv_pci_init_npu2_opencapi_phb(struct device_node *np); 191extern void pnv_pci_init_npu2_opencapi_phb(struct device_node *np);
192extern void pnv_npu2_map_lpar(struct pnv_ioda_pe *gpe, unsigned long msr);
213extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); 193extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev);
214extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); 194extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);
215 195
@@ -220,6 +200,8 @@ extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
220extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev); 200extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev);
221extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq); 201extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq);
222extern void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable); 202extern void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
203extern unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,
204 __u64 window_size, __u32 levels);
223extern int pnv_eeh_post_init(void); 205extern int pnv_eeh_post_init(void);
224 206
225extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, 207extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
@@ -235,12 +217,10 @@ extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
235extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); 217extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass);
236extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm); 218extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm);
237extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe); 219extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe);
238extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, 220extern struct iommu_table_group *pnv_try_setup_npu_table_group(
239 struct iommu_table *tbl); 221 struct pnv_ioda_pe *pe);
240extern long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num); 222extern struct iommu_table_group *pnv_npu_compound_attach(
241extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe); 223 struct pnv_ioda_pe *pe);
242extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe);
243extern int pnv_npu2_init(struct pnv_phb *phb);
244 224
245/* pci-ioda-tce.c */ 225/* pci-ioda-tce.c */
246#define POWERNV_IOMMU_DEFAULT_LEVELS 1 226#define POWERNV_IOMMU_DEFAULT_LEVELS 1
diff --git a/arch/powerpc/platforms/powernv/vas-debug.c b/arch/powerpc/platforms/powernv/vas-debug.c
index 4f7276ebdf9c..4d3929fbc08f 100644
--- a/arch/powerpc/platforms/powernv/vas-debug.c
+++ b/arch/powerpc/platforms/powernv/vas-debug.c
@@ -30,7 +30,7 @@ static char *cop_to_str(int cop)
30 } 30 }
31} 31}
32 32
33static int info_dbg_show(struct seq_file *s, void *private) 33static int info_show(struct seq_file *s, void *private)
34{ 34{
35 struct vas_window *window = s->private; 35 struct vas_window *window = s->private;
36 36
@@ -49,17 +49,7 @@ unlock:
49 return 0; 49 return 0;
50} 50}
51 51
52static int info_dbg_open(struct inode *inode, struct file *file) 52DEFINE_SHOW_ATTRIBUTE(info);
53{
54 return single_open(file, info_dbg_show, inode->i_private);
55}
56
57static const struct file_operations info_fops = {
58 .open = info_dbg_open,
59 .read = seq_read,
60 .llseek = seq_lseek,
61 .release = single_release,
62};
63 53
64static inline void print_reg(struct seq_file *s, struct vas_window *win, 54static inline void print_reg(struct seq_file *s, struct vas_window *win,
65 char *name, u32 reg) 55 char *name, u32 reg)
@@ -67,7 +57,7 @@ static inline void print_reg(struct seq_file *s, struct vas_window *win,
67 seq_printf(s, "0x%016llx %s\n", read_hvwc_reg(win, name, reg), name); 57 seq_printf(s, "0x%016llx %s\n", read_hvwc_reg(win, name, reg), name);
68} 58}
69 59
70static int hvwc_dbg_show(struct seq_file *s, void *private) 60static int hvwc_show(struct seq_file *s, void *private)
71{ 61{
72 struct vas_window *window = s->private; 62 struct vas_window *window = s->private;
73 63
@@ -115,17 +105,7 @@ unlock:
115 return 0; 105 return 0;
116} 106}
117 107
118static int hvwc_dbg_open(struct inode *inode, struct file *file) 108DEFINE_SHOW_ATTRIBUTE(hvwc);
119{
120 return single_open(file, hvwc_dbg_show, inode->i_private);
121}
122
123static const struct file_operations hvwc_fops = {
124 .open = hvwc_dbg_open,
125 .read = seq_read,
126 .llseek = seq_lseek,
127 .release = single_release,
128};
129 109
130void vas_window_free_dbgdir(struct vas_window *window) 110void vas_window_free_dbgdir(struct vas_window *window)
131{ 111{
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 2a983b5a52e1..d291b618a559 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -197,6 +197,7 @@ static int update_lmb_associativity_index(struct drmem_lmb *lmb)
197 197
198 found = find_aa_index(dr_node, ala_prop, lmb_assoc, &aa_index); 198 found = find_aa_index(dr_node, ala_prop, lmb_assoc, &aa_index);
199 199
200 of_node_put(dr_node);
200 dlpar_free_cc_nodes(lmb_node); 201 dlpar_free_cc_nodes(lmb_node);
201 202
202 if (!found) { 203 if (!found) {
@@ -313,7 +314,6 @@ out:
313 314
314static int pseries_remove_mem_node(struct device_node *np) 315static int pseries_remove_mem_node(struct device_node *np)
315{ 316{
316 const char *type;
317 const __be32 *regs; 317 const __be32 *regs;
318 unsigned long base; 318 unsigned long base;
319 unsigned int lmb_size; 319 unsigned int lmb_size;
@@ -322,8 +322,7 @@ static int pseries_remove_mem_node(struct device_node *np)
322 /* 322 /*
323 * Check to see if we are actually removing memory 323 * Check to see if we are actually removing memory
324 */ 324 */
325 type = of_get_property(np, "device_type", NULL); 325 if (!of_node_is_type(np, "memory"))
326 if (type == NULL || strcmp(type, "memory") != 0)
327 return 0; 326 return 0;
328 327
329 /* 328 /*
@@ -355,8 +354,11 @@ static bool lmb_is_removable(struct drmem_lmb *lmb)
355 phys_addr = lmb->base_addr; 354 phys_addr = lmb->base_addr;
356 355
357#ifdef CONFIG_FA_DUMP 356#ifdef CONFIG_FA_DUMP
358 /* Don't hot-remove memory that falls in fadump boot memory area */ 357 /*
359 if (is_fadump_boot_memory_area(phys_addr, block_sz)) 358 * Don't hot-remove memory that falls in fadump boot memory area
359 * and memory that is reserved for capturing old kernel memory.
360 */
361 if (is_fadump_memory_area(phys_addr, block_sz))
360 return false; 362 return false;
361#endif 363#endif
362 364
@@ -936,7 +938,6 @@ int dlpar_memory(struct pseries_hp_errorlog *hp_elog)
936 938
937static int pseries_add_mem_node(struct device_node *np) 939static int pseries_add_mem_node(struct device_node *np)
938{ 940{
939 const char *type;
940 const __be32 *regs; 941 const __be32 *regs;
941 unsigned long base; 942 unsigned long base;
942 unsigned int lmb_size; 943 unsigned int lmb_size;
@@ -945,8 +946,7 @@ static int pseries_add_mem_node(struct device_node *np)
945 /* 946 /*
946 * Check to see if we are actually adding memory 947 * Check to see if we are actually adding memory
947 */ 948 */
948 type = of_get_property(np, "device_type", NULL); 949 if (!of_node_is_type(np, "memory"))
949 if (type == NULL || strcmp(type, "memory") != 0)
950 return 0; 950 return 0;
951 951
952 /* 952 /*
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 06f02960b439..8fc8fe0b9848 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -57,7 +57,6 @@ static struct iommu_table_group *iommu_pseries_alloc_group(int node)
57{ 57{
58 struct iommu_table_group *table_group; 58 struct iommu_table_group *table_group;
59 struct iommu_table *tbl; 59 struct iommu_table *tbl;
60 struct iommu_table_group_link *tgl;
61 60
62 table_group = kzalloc_node(sizeof(struct iommu_table_group), GFP_KERNEL, 61 table_group = kzalloc_node(sizeof(struct iommu_table_group), GFP_KERNEL,
63 node); 62 node);
@@ -68,22 +67,13 @@ static struct iommu_table_group *iommu_pseries_alloc_group(int node)
68 if (!tbl) 67 if (!tbl)
69 goto free_group; 68 goto free_group;
70 69
71 tgl = kzalloc_node(sizeof(struct iommu_table_group_link), GFP_KERNEL,
72 node);
73 if (!tgl)
74 goto free_table;
75
76 INIT_LIST_HEAD_RCU(&tbl->it_group_list); 70 INIT_LIST_HEAD_RCU(&tbl->it_group_list);
77 kref_init(&tbl->it_kref); 71 kref_init(&tbl->it_kref);
78 tgl->table_group = table_group;
79 list_add_rcu(&tgl->next, &tbl->it_group_list);
80 72
81 table_group->tables[0] = tbl; 73 table_group->tables[0] = tbl;
82 74
83 return table_group; 75 return table_group;
84 76
85free_table:
86 kfree(tbl);
87free_group: 77free_group:
88 kfree(table_group); 78 kfree(table_group);
89 return NULL; 79 return NULL;
@@ -93,23 +83,12 @@ static void iommu_pseries_free_group(struct iommu_table_group *table_group,
93 const char *node_name) 83 const char *node_name)
94{ 84{
95 struct iommu_table *tbl; 85 struct iommu_table *tbl;
96#ifdef CONFIG_IOMMU_API
97 struct iommu_table_group_link *tgl;
98#endif
99 86
100 if (!table_group) 87 if (!table_group)
101 return; 88 return;
102 89
103 tbl = table_group->tables[0]; 90 tbl = table_group->tables[0];
104#ifdef CONFIG_IOMMU_API 91#ifdef CONFIG_IOMMU_API
105 tgl = list_first_entry_or_null(&tbl->it_group_list,
106 struct iommu_table_group_link, next);
107
108 WARN_ON_ONCE(!tgl);
109 if (tgl) {
110 list_del_rcu(&tgl->next);
111 kfree(tgl);
112 }
113 if (table_group->group) { 92 if (table_group->group) {
114 iommu_group_put(table_group->group); 93 iommu_group_put(table_group->group);
115 BUG_ON(table_group->group); 94 BUG_ON(table_group->group);
@@ -645,7 +624,6 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
645 iommu_table_setparms(pci->phb, dn, tbl); 624 iommu_table_setparms(pci->phb, dn, tbl);
646 tbl->it_ops = &iommu_table_pseries_ops; 625 tbl->it_ops = &iommu_table_pseries_ops;
647 iommu_init_table(tbl, pci->phb->node); 626 iommu_init_table(tbl, pci->phb->node);
648 iommu_register_group(pci->table_group, pci_domain_nr(bus), 0);
649 627
650 /* Divide the rest (1.75GB) among the children */ 628 /* Divide the rest (1.75GB) among the children */
651 pci->phb->dma_window_size = 0x80000000ul; 629 pci->phb->dma_window_size = 0x80000000ul;
@@ -756,10 +734,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
756 iommu_table_setparms(phb, dn, tbl); 734 iommu_table_setparms(phb, dn, tbl);
757 tbl->it_ops = &iommu_table_pseries_ops; 735 tbl->it_ops = &iommu_table_pseries_ops;
758 iommu_init_table(tbl, phb->node); 736 iommu_init_table(tbl, phb->node);
759 iommu_register_group(PCI_DN(dn)->table_group,
760 pci_domain_nr(phb->bus), 0);
761 set_iommu_table_base(&dev->dev, tbl); 737 set_iommu_table_base(&dev->dev, tbl);
762 iommu_add_device(&dev->dev);
763 return; 738 return;
764 } 739 }
765 740
@@ -770,11 +745,10 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
770 while (dn && PCI_DN(dn) && PCI_DN(dn)->table_group == NULL) 745 while (dn && PCI_DN(dn) && PCI_DN(dn)->table_group == NULL)
771 dn = dn->parent; 746 dn = dn->parent;
772 747
773 if (dn && PCI_DN(dn)) { 748 if (dn && PCI_DN(dn))
774 set_iommu_table_base(&dev->dev, 749 set_iommu_table_base(&dev->dev,
775 PCI_DN(dn)->table_group->tables[0]); 750 PCI_DN(dn)->table_group->tables[0]);
776 iommu_add_device(&dev->dev); 751 else
777 } else
778 printk(KERN_WARNING "iommu: Device %s has no iommu table\n", 752 printk(KERN_WARNING "iommu: Device %s has no iommu table\n",
779 pci_name(dev)); 753 pci_name(dev));
780} 754}
@@ -964,6 +938,37 @@ struct failed_ddw_pdn {
964 938
965static LIST_HEAD(failed_ddw_pdn_list); 939static LIST_HEAD(failed_ddw_pdn_list);
966 940
941static phys_addr_t ddw_memory_hotplug_max(void)
942{
943 phys_addr_t max_addr = memory_hotplug_max();
944 struct device_node *memory;
945
946 for_each_node_by_type(memory, "memory") {
947 unsigned long start, size;
948 int ranges, n_mem_addr_cells, n_mem_size_cells, len;
949 const __be32 *memcell_buf;
950
951 memcell_buf = of_get_property(memory, "reg", &len);
952 if (!memcell_buf || len <= 0)
953 continue;
954
955 n_mem_addr_cells = of_n_addr_cells(memory);
956 n_mem_size_cells = of_n_size_cells(memory);
957
958 /* ranges in cell */
959 ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells);
960
961 start = of_read_number(memcell_buf, n_mem_addr_cells);
962 memcell_buf += n_mem_addr_cells;
963 size = of_read_number(memcell_buf, n_mem_size_cells);
964 memcell_buf += n_mem_size_cells;
965
966 max_addr = max_t(phys_addr_t, max_addr, start + size);
967 }
968
969 return max_addr;
970}
971
967/* 972/*
968 * If the PE supports dynamic dma windows, and there is space for a table 973 * If the PE supports dynamic dma windows, and there is space for a table
969 * that can map all pages in a linear offset, then setup such a table, 974 * that can map all pages in a linear offset, then setup such a table,
@@ -1053,7 +1058,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
1053 } 1058 }
1054 /* verify the window * number of ptes will map the partition */ 1059 /* verify the window * number of ptes will map the partition */
1055 /* check largest block * page size > max memory hotplug addr */ 1060 /* check largest block * page size > max memory hotplug addr */
1056 max_addr = memory_hotplug_max(); 1061 max_addr = ddw_memory_hotplug_max();
1057 if (query.largest_available_block < (max_addr >> page_shift)) { 1062 if (query.largest_available_block < (max_addr >> page_shift)) {
1058 dev_dbg(&dev->dev, "can't map partition max 0x%llx with %u " 1063 dev_dbg(&dev->dev, "can't map partition max 0x%llx with %u "
1059 "%llu-sized pages\n", max_addr, query.largest_available_block, 1064 "%llu-sized pages\n", max_addr, query.largest_available_block,
@@ -1190,7 +1195,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
1190 } 1195 }
1191 1196
1192 set_iommu_table_base(&dev->dev, pci->table_group->tables[0]); 1197 set_iommu_table_base(&dev->dev, pci->table_group->tables[0]);
1193 iommu_add_device(&dev->dev); 1198 iommu_add_device(pci->table_group, &dev->dev);
1194} 1199}
1195 1200
1196static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask) 1201static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask)
@@ -1395,4 +1400,27 @@ static int __init disable_multitce(char *str)
1395 1400
1396__setup("multitce=", disable_multitce); 1401__setup("multitce=", disable_multitce);
1397 1402
1403static int tce_iommu_bus_notifier(struct notifier_block *nb,
1404 unsigned long action, void *data)
1405{
1406 struct device *dev = data;
1407
1408 switch (action) {
1409 case BUS_NOTIFY_DEL_DEVICE:
1410 iommu_del_device(dev);
1411 return 0;
1412 default:
1413 return 0;
1414 }
1415}
1416
1417static struct notifier_block tce_iommu_bus_nb = {
1418 .notifier_call = tce_iommu_bus_notifier,
1419};
1420
1421static int __init tce_iommu_bus_notifier_init(void)
1422{
1423 bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb);
1424 return 0;
1425}
1398machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init); 1426machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init);
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 41d8a4d1d02e..7725825d887d 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -29,6 +29,7 @@
29#include <asm/pci-bridge.h> 29#include <asm/pci-bridge.h>
30#include <asm/prom.h> 30#include <asm/prom.h>
31#include <asm/ppc-pci.h> 31#include <asm/ppc-pci.h>
32#include <asm/pci.h>
32#include "pseries.h" 33#include "pseries.h"
33 34
34#if 0 35#if 0
@@ -237,6 +238,8 @@ static void __init pSeries_request_regions(void)
237 238
238void __init pSeries_final_fixup(void) 239void __init pSeries_final_fixup(void)
239{ 240{
241 struct pci_controller *hose;
242
240 pSeries_request_regions(); 243 pSeries_request_regions();
241 244
242 eeh_probe_devices(); 245 eeh_probe_devices();
@@ -246,6 +249,25 @@ void __init pSeries_final_fixup(void)
246 ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable; 249 ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable;
247 ppc_md.pcibios_sriov_disable = pseries_pcibios_sriov_disable; 250 ppc_md.pcibios_sriov_disable = pseries_pcibios_sriov_disable;
248#endif 251#endif
252 list_for_each_entry(hose, &hose_list, list_node) {
253 struct device_node *dn = hose->dn, *nvdn;
254
255 while (1) {
256 dn = of_find_all_nodes(dn);
257 if (!dn)
258 break;
259 nvdn = of_parse_phandle(dn, "ibm,nvlink", 0);
260 if (!nvdn)
261 continue;
262 if (!of_device_is_compatible(nvdn, "ibm,npu-link"))
263 continue;
264 if (!of_device_is_compatible(nvdn->parent,
265 "ibm,power9-npu"))
266 continue;
267 WARN_ON_ONCE(pnv_npu2_init(hose));
268 break;
269 }
270 }
249} 271}
250 272
251/* 273/*
diff --git a/arch/powerpc/platforms/pseries/pmem.c b/arch/powerpc/platforms/pseries/pmem.c
index a27f40eb57b1..27f0a915c8a9 100644
--- a/arch/powerpc/platforms/pseries/pmem.c
+++ b/arch/powerpc/platforms/pseries/pmem.c
@@ -52,8 +52,8 @@ static ssize_t pmem_drc_add_node(u32 drc_index)
52 /* NB: The of reconfig notifier creates platform device from the node */ 52 /* NB: The of reconfig notifier creates platform device from the node */
53 rc = dlpar_attach_node(dn, pmem_node); 53 rc = dlpar_attach_node(dn, pmem_node);
54 if (rc) { 54 if (rc) {
55 pr_err("Failed to attach node %s, rc: %d, drc index: %x\n", 55 pr_err("Failed to attach node %pOF, rc: %d, drc index: %x\n",
56 dn->name, rc, drc_index); 56 dn, rc, drc_index);
57 57
58 if (dlpar_release_drc(drc_index)) 58 if (dlpar_release_drc(drc_index))
59 dlpar_free_cc_nodes(dn); 59 dlpar_free_cc_nodes(dn);
@@ -93,8 +93,8 @@ static ssize_t pmem_drc_remove_node(u32 drc_index)
93 93
94 rc = dlpar_release_drc(drc_index); 94 rc = dlpar_release_drc(drc_index);
95 if (rc) { 95 if (rc) {
96 pr_err("Failed to release drc (%x) for CPU %s, rc: %d\n", 96 pr_err("Failed to release drc (%x) for CPU %pOFn, rc: %d\n",
97 drc_index, dn->name, rc); 97 drc_index, dn, rc);
98 dlpar_attach_node(dn, pmem_node); 98 dlpar_attach_node(dn, pmem_node);
99 return rc; 99 return rc;
100 } 100 }
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 0f553dcfa548..41f62ca27c63 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -190,7 +190,7 @@ static void __init pseries_setup_i8259_cascade(void)
190 of_node_put(old); 190 of_node_put(old);
191 if (np == NULL) 191 if (np == NULL)
192 break; 192 break;
193 if (strcmp(np->name, "pci") != 0) 193 if (!of_node_name_eq(np, "pci"))
194 continue; 194 continue;
195 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 195 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
196 if (addrp == NULL) 196 if (addrp == NULL)
@@ -469,8 +469,8 @@ static void __init find_and_init_phbs(void)
469 struct device_node *root = of_find_node_by_path("/"); 469 struct device_node *root = of_find_node_by_path("/");
470 470
471 for_each_child_of_node(root, node) { 471 for_each_child_of_node(root, node) {
472 if (node->type == NULL || (strcmp(node->type, "pci") != 0 && 472 if (!of_node_is_type(node, "pci") &&
473 strcmp(node->type, "pciex") != 0)) 473 !of_node_is_type(node, "pciex"))
474 continue; 474 continue;
475 475
476 phb = pcibios_alloc_controller(node); 476 phb = pcibios_alloc_controller(node);
@@ -978,11 +978,7 @@ static void pseries_power_off(void)
978 978
979static int __init pSeries_probe(void) 979static int __init pSeries_probe(void)
980{ 980{
981 const char *dtype = of_get_property(of_root, "device_type", NULL); 981 if (!of_node_is_type(of_root, "chrp"))
982
983 if (dtype == NULL)
984 return 0;
985 if (strcmp(dtype, "chrp"))
986 return 0; 982 return 0;
987 983
988 /* Cell blades firmware claims to be chrp while it's not. Until this 984 /* Cell blades firmware claims to be chrp while it's not. Until this
diff --git a/arch/powerpc/platforms/pseries/vio.c b/arch/powerpc/platforms/pseries/vio.c
index 88f1ad1d6309..93cc9eec6601 100644
--- a/arch/powerpc/platforms/pseries/vio.c
+++ b/arch/powerpc/platforms/pseries/vio.c
@@ -1356,9 +1356,9 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
1356 */ 1356 */
1357 parent_node = of_get_parent(of_node); 1357 parent_node = of_get_parent(of_node);
1358 if (parent_node) { 1358 if (parent_node) {
1359 if (!strcmp(parent_node->type, "ibm,platform-facilities")) 1359 if (of_node_is_type(parent_node, "ibm,platform-facilities"))
1360 family = PFO; 1360 family = PFO;
1361 else if (!strcmp(parent_node->type, "vdevice")) 1361 else if (of_node_is_type(parent_node, "vdevice"))
1362 family = VDEVICE; 1362 family = VDEVICE;
1363 else { 1363 else {
1364 pr_warn("%s: parent(%pOF) of %pOFn not recognized.\n", 1364 pr_warn("%s: parent(%pOF) of %pOFn not recognized.\n",
@@ -1395,9 +1395,8 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
1395 if (viodev->family == VDEVICE) { 1395 if (viodev->family == VDEVICE) {
1396 unsigned int unit_address; 1396 unsigned int unit_address;
1397 1397
1398 if (of_node->type != NULL) 1398 viodev->type = of_node_get_device_type(of_node);
1399 viodev->type = of_node->type; 1399 if (!viodev->type) {
1400 else {
1401 pr_warn("%s: node %pOFn is missing the 'device_type' " 1400 pr_warn("%s: node %pOFn is missing the 'device_type' "
1402 "property.\n", __func__, of_node); 1401 "property.\n", __func__, of_node);
1403 goto out; 1402 goto out;
@@ -1672,32 +1671,30 @@ struct vio_dev *vio_find_node(struct device_node *vnode)
1672{ 1671{
1673 char kobj_name[20]; 1672 char kobj_name[20];
1674 struct device_node *vnode_parent; 1673 struct device_node *vnode_parent;
1675 const char *dev_type;
1676 1674
1677 vnode_parent = of_get_parent(vnode); 1675 vnode_parent = of_get_parent(vnode);
1678 if (!vnode_parent) 1676 if (!vnode_parent)
1679 return NULL; 1677 return NULL;
1680 1678
1681 dev_type = of_get_property(vnode_parent, "device_type", NULL);
1682 of_node_put(vnode_parent);
1683 if (!dev_type)
1684 return NULL;
1685
1686 /* construct the kobject name from the device node */ 1679 /* construct the kobject name from the device node */
1687 if (!strcmp(dev_type, "vdevice")) { 1680 if (of_node_is_type(vnode_parent, "vdevice")) {
1688 const __be32 *prop; 1681 const __be32 *prop;
1689 1682
1690 prop = of_get_property(vnode, "reg", NULL); 1683 prop = of_get_property(vnode, "reg", NULL);
1691 if (!prop) 1684 if (!prop)
1692 return NULL; 1685 goto out;
1693 snprintf(kobj_name, sizeof(kobj_name), "%x", 1686 snprintf(kobj_name, sizeof(kobj_name), "%x",
1694 (uint32_t)of_read_number(prop, 1)); 1687 (uint32_t)of_read_number(prop, 1));
1695 } else if (!strcmp(dev_type, "ibm,platform-facilities")) 1688 } else if (of_node_is_type(vnode_parent, "ibm,platform-facilities"))
1696 snprintf(kobj_name, sizeof(kobj_name), "%pOFn", vnode); 1689 snprintf(kobj_name, sizeof(kobj_name), "%pOFn", vnode);
1697 else 1690 else
1698 return NULL; 1691 goto out;
1699 1692
1693 of_node_put(vnode_parent);
1700 return vio_find_name(kobj_name); 1694 return vio_find_name(kobj_name);
1695out:
1696 of_node_put(vnode_parent);
1697 return NULL;
1701} 1698}
1702EXPORT_SYMBOL(vio_find_node); 1699EXPORT_SYMBOL(vio_find_node);
1703 1700
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 2caa4defdfb6..aaf23283ba0c 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -48,7 +48,7 @@ obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o
48obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o 48obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o
49 49
50ifdef CONFIG_SUSPEND 50ifdef CONFIG_SUSPEND
51obj-$(CONFIG_6xx) += 6xx-suspend.o 51obj-$(CONFIG_PPC_BOOK3S_32) += 6xx-suspend.o
52endif 52endif
53 53
54obj-$(CONFIG_PPC_SCOM) += scom.o 54obj-$(CONFIG_PPC_SCOM) += scom.o
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
index 12dd18fd4795..6c13d9a7b7b2 100644
--- a/arch/powerpc/sysdev/fsl_rio.h
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -41,7 +41,7 @@
41#define DOORBELL_ROWAR_PCI 0x02000000 /* PCI window */ 41#define DOORBELL_ROWAR_PCI 0x02000000 /* PCI window */
42#define DOORBELL_ROWAR_NREAD 0x00040000 /* NREAD */ 42#define DOORBELL_ROWAR_NREAD 0x00040000 /* NREAD */
43#define DOORBELL_ROWAR_MAINTRD 0x00070000 /* maintenance read */ 43#define DOORBELL_ROWAR_MAINTRD 0x00070000 /* maintenance read */
44#define DOORBELL_ROWAR_RES 0x00002000 /* wrtpy: reserverd */ 44#define DOORBELL_ROWAR_RES 0x00002000 /* wrtpy: reserved */
45#define DOORBELL_ROWAR_MAINTWD 0x00007000 45#define DOORBELL_ROWAR_MAINTWD 0x00007000
46#define DOORBELL_ROWAR_SIZE 0x0000000b /* window size is 4k */ 46#define DOORBELL_ROWAR_SIZE 0x0000000b /* window size is 4k */
47 47
diff --git a/arch/powerpc/sysdev/fsl_rmu.c b/arch/powerpc/sysdev/fsl_rmu.c
index 88b35a3dcdc5..8b0ebf3940d2 100644
--- a/arch/powerpc/sysdev/fsl_rmu.c
+++ b/arch/powerpc/sysdev/fsl_rmu.c
@@ -756,15 +756,13 @@ fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
756 } 756 }
757 757
758 /* Initialize outbound message descriptor ring */ 758 /* Initialize outbound message descriptor ring */
759 rmu->msg_tx_ring.virt = dma_alloc_coherent(priv->dev, 759 rmu->msg_tx_ring.virt = dma_zalloc_coherent(priv->dev,
760 rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE, 760 rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
761 &rmu->msg_tx_ring.phys, GFP_KERNEL); 761 &rmu->msg_tx_ring.phys, GFP_KERNEL);
762 if (!rmu->msg_tx_ring.virt) { 762 if (!rmu->msg_tx_ring.virt) {
763 rc = -ENOMEM; 763 rc = -ENOMEM;
764 goto out_dma; 764 goto out_dma;
765 } 765 }
766 memset(rmu->msg_tx_ring.virt, 0,
767 rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE);
768 rmu->msg_tx_ring.tx_slot = 0; 766 rmu->msg_tx_ring.tx_slot = 0;
769 767
770 /* Point dequeue/enqueue pointers at first entry in ring */ 768 /* Point dequeue/enqueue pointers at first entry in ring */
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 6300123ce965..8030a0f55e96 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -771,34 +771,6 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
771 return ipic; 771 return ipic;
772} 772}
773 773
774int ipic_set_priority(unsigned int virq, unsigned int priority)
775{
776 struct ipic *ipic = ipic_from_irq(virq);
777 unsigned int src = virq_to_hw(virq);
778 u32 temp;
779
780 if (priority > 7)
781 return -EINVAL;
782 if (src > 127)
783 return -EINVAL;
784 if (ipic_info[src].prio == 0)
785 return -EINVAL;
786
787 temp = ipic_read(ipic->regs, ipic_info[src].prio);
788
789 if (priority < 4) {
790 temp &= ~(0x7 << (20 + (3 - priority) * 3));
791 temp |= ipic_info[src].prio_mask << (20 + (3 - priority) * 3);
792 } else {
793 temp &= ~(0x7 << (4 + (7 - priority) * 3));
794 temp |= ipic_info[src].prio_mask << (4 + (7 - priority) * 3);
795 }
796
797 ipic_write(ipic->regs, ipic_info[src].prio, temp);
798
799 return 0;
800}
801
802void ipic_set_highest_priority(unsigned int virq) 774void ipic_set_highest_priority(unsigned int virq)
803{ 775{
804 struct ipic *ipic = ipic_from_irq(virq); 776 struct ipic *ipic = ipic_from_irq(virq);
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 0f6fd5d04d33..a707b24a7ddb 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -60,7 +60,7 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
60 parent = scom_find_parent(dev); 60 parent = scom_find_parent(dev);
61 61
62 if (parent == NULL) 62 if (parent == NULL)
63 return 0; 63 return NULL;
64 64
65 /* 65 /*
66 * We support "scom-reg" properties for adding scom registers 66 * We support "scom-reg" properties for adding scom registers
@@ -83,7 +83,7 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
83 size >>= 2; 83 size >>= 2;
84 84
85 if (index >= (size / (2*cells))) 85 if (index >= (size / (2*cells)))
86 return 0; 86 return NULL;
87 87
88 reg = of_read_number(&prop[index * cells * 2], cells); 88 reg = of_read_number(&prop[index * cells * 2], cells);
89 cnt = of_read_number(&prop[index * cells * 2 + cells], cells); 89 cnt = of_read_number(&prop[index * cells * 2 + cells], cells);
diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c
index 9824074ec1b5..94a69a62f5db 100644
--- a/arch/powerpc/sysdev/xive/common.c
+++ b/arch/powerpc/sysdev/xive/common.c
@@ -309,7 +309,7 @@ static void xive_do_queue_eoi(struct xive_cpu *xc)
309 * EOI an interrupt at the source. There are several methods 309 * EOI an interrupt at the source. There are several methods
310 * to do this depending on the HW version and source type 310 * to do this depending on the HW version and source type
311 */ 311 */
312void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd) 312static void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd)
313{ 313{
314 /* If the XIVE supports the new "store EOI facility, use it */ 314 /* If the XIVE supports the new "store EOI facility, use it */
315 if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI) 315 if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI)
diff --git a/arch/powerpc/tools/checkpatch.sh b/arch/powerpc/tools/checkpatch.sh
index 1fad3fb90e7c..3ce5c093b19d 100755
--- a/arch/powerpc/tools/checkpatch.sh
+++ b/arch/powerpc/tools/checkpatch.sh
@@ -19,4 +19,5 @@ exec $script_base/../../../scripts/checkpatch.pl \
19 --ignore GLOBAL_INITIALISERS \ 19 --ignore GLOBAL_INITIALISERS \
20 --ignore LINE_SPACING \ 20 --ignore LINE_SPACING \
21 --ignore MULTIPLE_ASSIGNMENTS \ 21 --ignore MULTIPLE_ASSIGNMENTS \
22 --ignore DT_SPLIT_BINDING_PATCH \
22 $@ 23 $@
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 36b8dc47a3c3..757b8499aba2 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -75,6 +75,9 @@ static int xmon_gate;
75#define xmon_owner 0 75#define xmon_owner 0
76#endif /* CONFIG_SMP */ 76#endif /* CONFIG_SMP */
77 77
78#ifdef CONFIG_PPC_PSERIES
79static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
80#endif
78static unsigned long in_xmon __read_mostly = 0; 81static unsigned long in_xmon __read_mostly = 0;
79static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT); 82static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
80 83
@@ -273,7 +276,7 @@ Commands:\n\
273 X exit monitor and don't recover\n" 276 X exit monitor and don't recover\n"
274#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E) 277#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
275" u dump segment table or SLB\n" 278" u dump segment table or SLB\n"
276#elif defined(CONFIG_PPC_STD_MMU_32) 279#elif defined(CONFIG_PPC_BOOK3S_32)
277" u dump segment registers\n" 280" u dump segment registers\n"
278#elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E) 281#elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
279" u dump TLB\n" 282" u dump TLB\n"
@@ -358,7 +361,6 @@ static inline void disable_surveillance(void)
358#ifdef CONFIG_PPC_PSERIES 361#ifdef CONFIG_PPC_PSERIES
359 /* Since this can't be a module, args should end up below 4GB. */ 362 /* Since this can't be a module, args should end up below 4GB. */
360 static struct rtas_args args; 363 static struct rtas_args args;
361 int token;
362 364
363 /* 365 /*
364 * At this point we have got all the cpus we can into 366 * At this point we have got all the cpus we can into
@@ -367,11 +369,11 @@ static inline void disable_surveillance(void)
367 * If we did try to take rtas.lock there would be a 369 * If we did try to take rtas.lock there would be a
368 * real possibility of deadlock. 370 * real possibility of deadlock.
369 */ 371 */
370 token = rtas_token("set-indicator"); 372 if (set_indicator_token == RTAS_UNKNOWN_SERVICE)
371 if (token == RTAS_UNKNOWN_SERVICE)
372 return; 373 return;
373 374
374 rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0); 375 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL,
376 SURVEILLANCE_TOKEN, 0, 0);
375 377
376#endif /* CONFIG_PPC_PSERIES */ 378#endif /* CONFIG_PPC_PSERIES */
377} 379}
@@ -1058,7 +1060,7 @@ cmds(struct pt_regs *excp)
1058 case 'P': 1060 case 'P':
1059 show_tasks(); 1061 show_tasks();
1060 break; 1062 break;
1061#ifdef CONFIG_PPC_STD_MMU 1063#ifdef CONFIG_PPC_BOOK3S
1062 case 'u': 1064 case 'u':
1063 dump_segments(); 1065 dump_segments();
1064 break; 1066 break;
@@ -2793,7 +2795,7 @@ print_address(unsigned long addr)
2793 xmon_print_symbol(addr, "\t# ", ""); 2795 xmon_print_symbol(addr, "\t# ", "");
2794} 2796}
2795 2797
2796void 2798static void
2797dump_log_buf(void) 2799dump_log_buf(void)
2798{ 2800{
2799 struct kmsg_dumper dumper = { .active = 1 }; 2801 struct kmsg_dumper dumper = { .active = 1 };
@@ -2994,13 +2996,13 @@ static void show_task(struct task_struct *tsk)
2994 2996
2995 printf("%px %016lx %6d %6d %c %2d %s\n", tsk, 2997 printf("%px %016lx %6d %6d %c %2d %s\n", tsk,
2996 tsk->thread.ksp, 2998 tsk->thread.ksp,
2997 tsk->pid, tsk->parent->pid, 2999 tsk->pid, rcu_dereference(tsk->parent)->pid,
2998 state, task_thread_info(tsk)->cpu, 3000 state, task_thread_info(tsk)->cpu,
2999 tsk->comm); 3001 tsk->comm);
3000} 3002}
3001 3003
3002#ifdef CONFIG_PPC_BOOK3S_64 3004#ifdef CONFIG_PPC_BOOK3S_64
3003void format_pte(void *ptep, unsigned long pte) 3005static void format_pte(void *ptep, unsigned long pte)
3004{ 3006{
3005 pte_t entry = __pte(pte); 3007 pte_t entry = __pte(pte);
3006 3008
@@ -3495,14 +3497,14 @@ void dump_segments(void)
3495} 3497}
3496#endif 3498#endif
3497 3499
3498#ifdef CONFIG_PPC_STD_MMU_32 3500#ifdef CONFIG_PPC_BOOK3S_32
3499void dump_segments(void) 3501void dump_segments(void)
3500{ 3502{
3501 int i; 3503 int i;
3502 3504
3503 printf("sr0-15 ="); 3505 printf("sr0-15 =");
3504 for (i = 0; i < 16; ++i) 3506 for (i = 0; i < 16; ++i)
3505 printf(" %x", mfsrin(i)); 3507 printf(" %x", mfsrin(i << 28));
3506 printf("\n"); 3508 printf("\n");
3507} 3509}
3508#endif 3510#endif
@@ -3688,6 +3690,14 @@ static void xmon_init(int enable)
3688 __debugger_iabr_match = xmon_iabr_match; 3690 __debugger_iabr_match = xmon_iabr_match;
3689 __debugger_break_match = xmon_break_match; 3691 __debugger_break_match = xmon_break_match;
3690 __debugger_fault_handler = xmon_fault_handler; 3692 __debugger_fault_handler = xmon_fault_handler;
3693
3694#ifdef CONFIG_PPC_PSERIES
3695 /*
3696 * Get the token here to avoid trying to get a lock
3697 * during the crash, causing a deadlock.
3698 */
3699 set_indicator_token = rtas_token("set-indicator");
3700#endif
3691 } else { 3701 } else {
3692 __debugger = NULL; 3702 __debugger = NULL;
3693 __debugger_ipi = NULL; 3703 __debugger_ipi = NULL;
@@ -4033,6 +4043,7 @@ static int do_spu_cmd(void)
4033 subcmd = inchar(); 4043 subcmd = inchar();
4034 if (isxdigit(subcmd) || subcmd == '\n') 4044 if (isxdigit(subcmd) || subcmd == '\n')
4035 termch = subcmd; 4045 termch = subcmd;
4046 /* fall through */
4036 case 'f': 4047 case 'f':
4037 scanhex(&num); 4048 scanhex(&num);
4038 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) { 4049 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-27 16:55:09 -0400